From 709b67f1ce29cfe6ca230d2989844ff8a0e34861 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Wed, 9 Dec 2020 21:36:54 +0100
Subject: [PATCH 001/214] Introduce rust-toolchain

Make use of the new format, introduced in
https://blog.rust-lang.org/2020/11/27/Rustup-1.23.0.html#new-format-for-rust-toolchain
---
 README.CN.md   | 15 ++++-----------
 README.md      | 18 ++++++------------
 rust-toolchain |  4 ++++
 3 files changed, 14 insertions(+), 23 deletions(-)
 create mode 100644 rust-toolchain

diff --git a/README.CN.md b/README.CN.md
index ed767da69..9d82c8ada 100644
--- a/README.CN.md
+++ b/README.CN.md
@@ -52,26 +52,19 @@ _带上我最诚挚的问候,<br>Andre ([@andre-richter])_
 3. 安装正确的`Rust`工具链:
    1. 如果你已经安装了一个版本的Rust:
       ```bash
-      rustup toolchain add nightly-2020-11-20
-      rustup default nightly-2020-11-20
-      rustup component add llvm-tools-preview
-      rustup target add aarch64-unknown-none-softfloat
       cargo install cargo-binutils rustfilt
       ```
 
-   2. 如果你想要全新安装:
+   1. 如果你想要全新安装:
       ```bash
-      curl --proto '=https' --tlsv1.2 -sSf https://sh.rustup.rs | sh -s -- \
-          --default-toolchain nightly-2020-11-20                           \
-          --component llvm-tools-preview
+      curl --proto '=https' --tlsv1.2 -sSf https://sh.rustup.rs | sh
 
       source $HOME/.cargo/env
-      rustup target add aarch64-unknown-none-softfloat
       cargo install cargo-binutils rustfilt
       ```
 
-4. 如果你使用 `Visual Studio Code`，我强烈推荐你安装[Rust Analyzer 扩展]。
-5. 如果你使用的**不是**Linux，那么你还需要安装一些`Ruby` gems。
+1. 如果你使用 `Visual Studio Code`，我强烈推荐你安装[Rust Analyzer 扩展]。
+1. 如果你使用的**不是**Linux，那么你还需要安装一些`Ruby` gems。
 
 ```bash
 sudo gem install bundler
diff --git a/README.md b/README.md
index 5af62a962..845aa87d1 100644
--- a/README.md
+++ b/README.md
@@ -65,29 +65,23 @@ other Unix flavors such as **macOS**, but this is only _experimental_.
 
 1. [Install Docker][install_docker].
 1. Ensure your user account is in the [docker group].
-1. Install a suitable `Rust` toolchain:
+1. Prepare the `Rust` toolchain. Most of it will be handled on first use through the
+   [rust-toolchain](rust-toolchain) file. What's left for us to do is:
    1. If you already have a version of Rust installed:
       ```bash
-      rustup toolchain add nightly-2020-11-20
-      rustup default nightly-2020-11-20
-      rustup component add llvm-tools-preview
-      rustup target add aarch64-unknown-none-softfloat
       cargo install cargo-binutils rustfilt
       ```
 
-   2. If you need a fresh install:
+   1. If you need to install Rust from scratch:
       ```bash
-      curl --proto '=https' --tlsv1.2 -sSf https://sh.rustup.rs | sh -s -- \
-          --default-toolchain nightly-2020-11-20                           \
-          --component llvm-tools-preview
+      curl --proto '=https' --tlsv1.2 -sSf https://sh.rustup.rs | sh
 
       source $HOME/.cargo/env
-      rustup target add aarch64-unknown-none-softfloat
       cargo install cargo-binutils rustfilt
       ```
 
-3. In case you use `Visual Studio Code`, I strongly recommend installing the [Rust Analyzer extension].
-4. If you are **NOT** running Linux, some `Ruby` gems are needed as well:
+1. In case you use `Visual Studio Code`, I strongly recommend installing the [Rust Analyzer extension].
+1. If you are **NOT** running Linux, some `Ruby` gems are needed as well:
 
    ```bash
    sudo gem install bundler
diff --git a/rust-toolchain b/rust-toolchain
new file mode 100644
index 000000000..9c4710ceb
--- /dev/null
+++ b/rust-toolchain
@@ -0,0 +1,4 @@
+[toolchain]
+channel = "nightly-2020-12-08"
+components = ["llvm-tools-preview"]
+targets = ["aarch64-unknown-none-softfloat"]

From d2fd4913ae6866026fbc814f851702bba292ce59 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Wed, 9 Dec 2020 21:45:10 +0100
Subject: [PATCH 002/214] CI: Ignore rust-toolchain and use latest nightly

---
 .github/workflows/build_rpi3.yml       | 1 +
 .github/workflows/build_rpi4.yml       | 1 +
 .github/workflows/sanity.yml           | 1 +
 .github/workflows/test_integration.yml | 1 +
 .github/workflows/test_unit.yml        | 1 +
 5 files changed, 5 insertions(+)

diff --git a/.github/workflows/build_rpi3.yml b/.github/workflows/build_rpi3.yml
index ec9a49e00..c3bc3992e 100644
--- a/.github/workflows/build_rpi3.yml
+++ b/.github/workflows/build_rpi3.yml
@@ -31,6 +31,7 @@ jobs:
           ruby-version: "2.7"
       - name: Set up Rust nightly
         run: |
+          rm rust-toolchain
           rustup self update
           rustup toolchain install nightly --component llvm-tools-preview
           rustup default nightly
diff --git a/.github/workflows/build_rpi4.yml b/.github/workflows/build_rpi4.yml
index 12f8dc498..8d479e8d9 100644
--- a/.github/workflows/build_rpi4.yml
+++ b/.github/workflows/build_rpi4.yml
@@ -31,6 +31,7 @@ jobs:
           ruby-version: "2.7"
       - name: Set up Rust nightly
         run: |
+          rm rust-toolchain
           rustup self update
           rustup toolchain install nightly --component llvm-tools-preview
           rustup default nightly
diff --git a/.github/workflows/sanity.yml b/.github/workflows/sanity.yml
index 3d4d85625..46c559a8e 100644
--- a/.github/workflows/sanity.yml
+++ b/.github/workflows/sanity.yml
@@ -33,6 +33,7 @@ jobs:
           npm install prettier
       - name: Set up Rust nightly
         run: |
+          rm rust-toolchain
           rustup self update
           rustup toolchain install nightly --component rustfmt clippy
           rustup default nightly
diff --git a/.github/workflows/test_integration.yml b/.github/workflows/test_integration.yml
index cf5d70082..fa2fda987 100644
--- a/.github/workflows/test_integration.yml
+++ b/.github/workflows/test_integration.yml
@@ -31,6 +31,7 @@ jobs:
           ruby-version: "2.7"
       - name: Set up Rust nightly
         run: |
+          rm rust-toolchain
           rustup self update
           rustup toolchain install nightly --component llvm-tools-preview
           rustup default nightly
diff --git a/.github/workflows/test_unit.yml b/.github/workflows/test_unit.yml
index d090e8a4c..741ff352b 100644
--- a/.github/workflows/test_unit.yml
+++ b/.github/workflows/test_unit.yml
@@ -31,6 +31,7 @@ jobs:
           ruby-version: "2.7"
       - name: Set up Rust nightly
         run: |
+          rm rust-toolchain
           rustup self update
           rustup toolchain install nightly --component llvm-tools-preview
           rustup default nightly

From d212348931b08b2d37b0a120cc053e863b4910a2 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Wed, 9 Dec 2020 22:27:30 +0100
Subject: [PATCH 003/214] Bump compiler version.

We have to remove the `#[naked]` attribute from `_start` for now, since it emits
a warning now when used with non-asm statements in the function body. For now,
just hope for the compiler's mercy to not emit code using the stack pointer
before we've actually set up a stack.
---
 04_zero_overhead_abstraction/README.md        |   9 +++++----
 .../src/_arch/aarch64/cpu.rs                  |   5 +++--
 05_safe_globals/src/_arch/aarch64/cpu.rs      |   5 +++--
 06_drivers_gpio_uart/README.md                |   2 +-
 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs |   5 +++--
 07_uart_chainloader/README.md                 |   6 +++---
 07_uart_chainloader/src/_arch/aarch64/cpu.rs  |   5 +++--
 08_timestamps/README.md                       |   8 ++++----
 08_timestamps/src/_arch/aarch64/cpu.rs        |   5 +++--
 09_hw_debug_JTAG/src/_arch/aarch64/cpu.rs     |   5 +++--
 10_privilege_level/README.md                  |  12 ++++++++++--
 10_privilege_level/src/_arch/aarch64/cpu.rs   |   7 +++++--
 .../src/_arch/aarch64/cpu.rs                  |   7 +++++--
 .../src/_arch/aarch64/cpu.rs                  |   7 +++++--
 13_integrated_testing/README.md               |   2 +-
 .../src/_arch/aarch64/cpu.rs                  |   7 +++++--
 .../src/_arch/aarch64/cpu.rs                  |   7 +++++--
 15_virtual_mem_part2_mmio_remap/README.md     |   2 +-
 .../src/_arch/aarch64/cpu.rs                  |   7 +++++--
 X1_JTAG_boot/jtag_boot_rpi3.img               | Bin 8400 -> 8064 bytes
 X1_JTAG_boot/jtag_boot_rpi4.img               | Bin 7088 -> 6800 bytes
 X1_JTAG_boot/src/_arch/aarch64/cpu.rs         |   5 +++--
 rust-toolchain                                |   2 +-
 23 files changed, 77 insertions(+), 43 deletions(-)

diff --git a/04_zero_overhead_abstraction/README.md b/04_zero_overhead_abstraction/README.md
index c7ff8a5f6..ca679c52a 100644
--- a/04_zero_overhead_abstraction/README.md
+++ b/04_zero_overhead_abstraction/README.md
@@ -53,7 +53,7 @@ diff -uNr 03_hacky_hello_world/src/_arch/aarch64/cpu/smp.rs 04_zero_overhead_abs
 diff -uNr 03_hacky_hello_world/src/_arch/aarch64/cpu.rs 04_zero_overhead_abstraction/src/_arch/aarch64/cpu.rs
 --- 03_hacky_hello_world/src/_arch/aarch64/cpu.rs
 +++ 04_zero_overhead_abstraction/src/_arch/aarch64/cpu.rs
-@@ -4,8 +4,34 @@
+@@ -4,8 +4,35 @@
 
  //! Architectural processor code.
 
@@ -72,8 +72,9 @@ diff -uNr 03_hacky_hello_world/src/_arch/aarch64/cpu.rs 04_zero_overhead_abstrac
 +///
 +/// # Safety
 +///
-+/// - Linker script must ensure to place this function at `0x80_000`.
-+#[naked]
++/// - Linker script must ensure to place this function where it is expected by the target machine.
++/// - We have to hope that the compiler omits any stack pointer usage before the stack pointer is
++///   actually set (`SP.set()`).
 +#[no_mangle]
 +pub unsafe fn _start() -> ! {
 +    use crate::runtime_init;
@@ -90,7 +91,7 @@ diff -uNr 03_hacky_hello_world/src/_arch/aarch64/cpu.rs 04_zero_overhead_abstrac
 
  //--------------------------------------------------------------------------------------------------
  // Public Code
-@@ -14,13 +40,7 @@
+@@ -14,13 +41,7 @@
  /// Pause execution on the core.
  #[inline(always)]
  pub fn wait_forever() -> ! {
diff --git a/04_zero_overhead_abstraction/src/_arch/aarch64/cpu.rs b/04_zero_overhead_abstraction/src/_arch/aarch64/cpu.rs
index d49c8aba0..64c5397fb 100644
--- a/04_zero_overhead_abstraction/src/_arch/aarch64/cpu.rs
+++ b/04_zero_overhead_abstraction/src/_arch/aarch64/cpu.rs
@@ -17,8 +17,9 @@ use cortex_a::{asm, regs::*};
 ///
 /// # Safety
 ///
-/// - Linker script must ensure to place this function at `0x80_000`.
-#[naked]
+/// - Linker script must ensure to place this function where it is expected by the target machine.
+/// - We have to hope that the compiler omits any stack pointer usage before the stack pointer is
+///   actually set (`SP.set()`).
 #[no_mangle]
 pub unsafe fn _start() -> ! {
     use crate::runtime_init;
diff --git a/05_safe_globals/src/_arch/aarch64/cpu.rs b/05_safe_globals/src/_arch/aarch64/cpu.rs
index d49c8aba0..64c5397fb 100644
--- a/05_safe_globals/src/_arch/aarch64/cpu.rs
+++ b/05_safe_globals/src/_arch/aarch64/cpu.rs
@@ -17,8 +17,9 @@ use cortex_a::{asm, regs::*};
 ///
 /// # Safety
 ///
-/// - Linker script must ensure to place this function at `0x80_000`.
-#[naked]
+/// - Linker script must ensure to place this function where it is expected by the target machine.
+/// - We have to hope that the compiler omits any stack pointer usage before the stack pointer is
+///   actually set (`SP.set()`).
 #[no_mangle]
 pub unsafe fn _start() -> ! {
     use crate::runtime_init;
diff --git a/06_drivers_gpio_uart/README.md b/06_drivers_gpio_uart/README.md
index 1bd8b26ae..08568cf5b 100644
--- a/06_drivers_gpio_uart/README.md
+++ b/06_drivers_gpio_uart/README.md
@@ -183,7 +183,7 @@ diff -uNr 05_safe_globals/Makefile 06_drivers_gpio_uart/Makefile
 diff -uNr 05_safe_globals/src/_arch/aarch64/cpu.rs 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
 --- 05_safe_globals/src/_arch/aarch64/cpu.rs
 +++ 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
-@@ -37,6 +37,17 @@
+@@ -38,6 +38,17 @@
  // Public Code
  //--------------------------------------------------------------------------------------------------
 
diff --git a/06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs b/06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
index 53f131f88..1d5190ee1 100644
--- a/06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
+++ b/06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
@@ -17,8 +17,9 @@ use cortex_a::{asm, regs::*};
 ///
 /// # Safety
 ///
-/// - Linker script must ensure to place this function at `0x80_000`.
-#[naked]
+/// - Linker script must ensure to place this function where it is expected by the target machine.
+/// - We have to hope that the compiler omits any stack pointer usage before the stack pointer is
+///   actually set (`SP.set()`).
 #[no_mangle]
 pub unsafe fn _start() -> ! {
     use crate::runtime_init;
diff --git a/07_uart_chainloader/README.md b/07_uart_chainloader/README.md
index 378b6eb5d..0b48ef90a 100644
--- a/07_uart_chainloader/README.md
+++ b/07_uart_chainloader/README.md
@@ -179,8 +179,8 @@ diff -uNr 06_drivers_gpio_uart/Makefile 07_uart_chainloader/Makefile
 diff -uNr 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs 07_uart_chainloader/src/_arch/aarch64/cpu.rs
 --- 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
 +++ 07_uart_chainloader/src/_arch/aarch64/cpu.rs
-@@ -21,12 +21,12 @@
- #[naked]
+@@ -22,12 +22,12 @@
+ ///   actually set (`SP.set()`).
  #[no_mangle]
  pub unsafe fn _start() -> ! {
 -    use crate::runtime_init;
@@ -194,7 +194,7 @@ diff -uNr 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs 07_uart_chainloader/src/
      } else {
          // If not core0, infinitely wait for events.
          wait_forever()
-@@ -55,3 +55,19 @@
+@@ -56,3 +56,19 @@
          asm::wfe()
      }
  }
diff --git a/07_uart_chainloader/src/_arch/aarch64/cpu.rs b/07_uart_chainloader/src/_arch/aarch64/cpu.rs
index 3121e75ee..bd974d4d5 100644
--- a/07_uart_chainloader/src/_arch/aarch64/cpu.rs
+++ b/07_uart_chainloader/src/_arch/aarch64/cpu.rs
@@ -17,8 +17,9 @@ use cortex_a::{asm, regs::*};
 ///
 /// # Safety
 ///
-/// - Linker script must ensure to place this function at `0x80_000`.
-#[naked]
+/// - Linker script must ensure to place this function where it is expected by the target machine.
+/// - We have to hope that the compiler omits any stack pointer usage before the stack pointer is
+///   actually set (`SP.set()`).
 #[no_mangle]
 pub unsafe fn _start() -> ! {
     use crate::relocate;
diff --git a/08_timestamps/README.md b/08_timestamps/README.md
index b1244dcec..3148aa3a9 100644
--- a/08_timestamps/README.md
+++ b/08_timestamps/README.md
@@ -115,8 +115,8 @@ diff -uNr 07_uart_chainloader/Makefile 08_timestamps/Makefile
 diff -uNr 07_uart_chainloader/src/_arch/aarch64/cpu.rs 08_timestamps/src/_arch/aarch64/cpu.rs
 --- 07_uart_chainloader/src/_arch/aarch64/cpu.rs
 +++ 08_timestamps/src/_arch/aarch64/cpu.rs
-@@ -21,12 +21,12 @@
- #[naked]
+@@ -22,12 +22,12 @@
+ ///   actually set (`SP.set()`).
  #[no_mangle]
  pub unsafe fn _start() -> ! {
 -    use crate::relocate;
@@ -130,7 +130,7 @@ diff -uNr 07_uart_chainloader/src/_arch/aarch64/cpu.rs 08_timestamps/src/_arch/a
      } else {
          // If not core0, infinitely wait for events.
          wait_forever()
-@@ -39,15 +39,6 @@
+@@ -40,15 +40,6 @@
 
  pub use asm::nop;
 
@@ -146,7 +146,7 @@ diff -uNr 07_uart_chainloader/src/_arch/aarch64/cpu.rs 08_timestamps/src/_arch/a
  /// Pause execution on the core.
  #[inline(always)]
  pub fn wait_forever() -> ! {
-@@ -55,19 +46,3 @@
+@@ -56,19 +47,3 @@
          asm::wfe()
      }
  }
diff --git a/08_timestamps/src/_arch/aarch64/cpu.rs b/08_timestamps/src/_arch/aarch64/cpu.rs
index 3f502ee02..eac29d8d7 100644
--- a/08_timestamps/src/_arch/aarch64/cpu.rs
+++ b/08_timestamps/src/_arch/aarch64/cpu.rs
@@ -17,8 +17,9 @@ use cortex_a::{asm, regs::*};
 ///
 /// # Safety
 ///
-/// - Linker script must ensure to place this function at `0x80_000`.
-#[naked]
+/// - Linker script must ensure to place this function where it is expected by the target machine.
+/// - We have to hope that the compiler omits any stack pointer usage before the stack pointer is
+///   actually set (`SP.set()`).
 #[no_mangle]
 pub unsafe fn _start() -> ! {
     use crate::runtime_init;
diff --git a/09_hw_debug_JTAG/src/_arch/aarch64/cpu.rs b/09_hw_debug_JTAG/src/_arch/aarch64/cpu.rs
index 3f502ee02..eac29d8d7 100644
--- a/09_hw_debug_JTAG/src/_arch/aarch64/cpu.rs
+++ b/09_hw_debug_JTAG/src/_arch/aarch64/cpu.rs
@@ -17,8 +17,9 @@ use cortex_a::{asm, regs::*};
 ///
 /// # Safety
 ///
-/// - Linker script must ensure to place this function at `0x80_000`.
-#[naked]
+/// - Linker script must ensure to place this function where it is expected by the target machine.
+/// - We have to hope that the compiler omits any stack pointer usage before the stack pointer is
+///   actually set (`SP.set()`).
 #[no_mangle]
 pub unsafe fn _start() -> ! {
     use crate::runtime_init;
diff --git a/10_privilege_level/README.md b/10_privilege_level/README.md
index c1e162876..a9035cec9 100644
--- a/10_privilege_level/README.md
+++ b/10_privilege_level/README.md
@@ -225,8 +225,14 @@ Minipush 1.0
 diff -uNr 09_hw_debug_JTAG/src/_arch/aarch64/cpu.rs 10_privilege_level/src/_arch/aarch64/cpu.rs
 --- 09_hw_debug_JTAG/src/_arch/aarch64/cpu.rs
 +++ 10_privilege_level/src/_arch/aarch64/cpu.rs
-@@ -21,18 +21,59 @@
- #[naked]
+@@ -18,22 +18,65 @@
+ /// # Safety
+ ///
+ /// - Linker script must ensure to place this function where it is expected by the target machine.
+-/// - We have to hope that the compiler omits any stack pointer usage before the stack pointer is
+-///   actually set (`SP.set()`).
++/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
++///   a stack for EL2.
  #[no_mangle]
  pub unsafe fn _start() -> ! {
 -    use crate::runtime_init;
@@ -252,6 +258,8 @@ diff -uNr 09_hw_debug_JTAG/src/_arch/aarch64/cpu.rs 10_privilege_level/src/_arch
 +/// - The HW state of EL1 must be prepared in a sound way.
 +/// - Exception return from EL2 must must continue execution in EL1 with
 +///   `runtime_init::runtime_init()`.
++/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
++///   a stack for EL2.
 +#[inline(always)]
 +unsafe fn el2_to_el1_transition() -> ! {
 +    use crate::runtime_init;
diff --git a/10_privilege_level/src/_arch/aarch64/cpu.rs b/10_privilege_level/src/_arch/aarch64/cpu.rs
index 3e5e57530..e546dd606 100644
--- a/10_privilege_level/src/_arch/aarch64/cpu.rs
+++ b/10_privilege_level/src/_arch/aarch64/cpu.rs
@@ -17,8 +17,9 @@ use cortex_a::{asm, regs::*};
 ///
 /// # Safety
 ///
-/// - Linker script must ensure to place this function at `0x80_000`.
-#[naked]
+/// - Linker script must ensure to place this function where it is expected by the target machine.
+/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
+///   a stack for EL2.
 #[no_mangle]
 pub unsafe fn _start() -> ! {
     // Expect the boot core to start in EL2.
@@ -39,6 +40,8 @@ pub unsafe fn _start() -> ! {
 /// - The HW state of EL1 must be prepared in a sound way.
 /// - Exception return from EL2 must must continue execution in EL1 with
 ///   `runtime_init::runtime_init()`.
+/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
+///   a stack for EL2.
 #[inline(always)]
 unsafe fn el2_to_el1_transition() -> ! {
     use crate::runtime_init;
diff --git a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu.rs b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu.rs
index 3e5e57530..e546dd606 100644
--- a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu.rs
@@ -17,8 +17,9 @@ use cortex_a::{asm, regs::*};
 ///
 /// # Safety
 ///
-/// - Linker script must ensure to place this function at `0x80_000`.
-#[naked]
+/// - Linker script must ensure to place this function where it is expected by the target machine.
+/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
+///   a stack for EL2.
 #[no_mangle]
 pub unsafe fn _start() -> ! {
     // Expect the boot core to start in EL2.
@@ -39,6 +40,8 @@ pub unsafe fn _start() -> ! {
 /// - The HW state of EL1 must be prepared in a sound way.
 /// - Exception return from EL2 must must continue execution in EL1 with
 ///   `runtime_init::runtime_init()`.
+/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
+///   a stack for EL2.
 #[inline(always)]
 unsafe fn el2_to_el1_transition() -> ! {
     use crate::runtime_init;
diff --git a/12_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs b/12_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs
index 3e5e57530..e546dd606 100644
--- a/12_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs
+++ b/12_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs
@@ -17,8 +17,9 @@ use cortex_a::{asm, regs::*};
 ///
 /// # Safety
 ///
-/// - Linker script must ensure to place this function at `0x80_000`.
-#[naked]
+/// - Linker script must ensure to place this function where it is expected by the target machine.
+/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
+///   a stack for EL2.
 #[no_mangle]
 pub unsafe fn _start() -> ! {
     // Expect the boot core to start in EL2.
@@ -39,6 +40,8 @@ pub unsafe fn _start() -> ! {
 /// - The HW state of EL1 must be prepared in a sound way.
 /// - Exception return from EL2 must must continue execution in EL1 with
 ///   `runtime_init::runtime_init()`.
+/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
+///   a stack for EL2.
 #[inline(always)]
 unsafe fn el2_to_el1_transition() -> ! {
     use crate::runtime_init;
diff --git a/13_integrated_testing/README.md b/13_integrated_testing/README.md
index 755576f95..e9509fd7e 100644
--- a/13_integrated_testing/README.md
+++ b/13_integrated_testing/README.md
@@ -935,7 +935,7 @@ diff -uNr 12_exceptions_part1_groundwork/Makefile 13_integrated_testing/Makefile
 diff -uNr 12_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs 13_integrated_testing/src/_arch/aarch64/cpu.rs
 --- 12_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs
 +++ 13_integrated_testing/src/_arch/aarch64/cpu.rs
-@@ -87,3 +87,20 @@
+@@ -90,3 +90,20 @@
          asm::wfe()
      }
  }
diff --git a/13_integrated_testing/src/_arch/aarch64/cpu.rs b/13_integrated_testing/src/_arch/aarch64/cpu.rs
index 7d146d230..3e3ac706f 100644
--- a/13_integrated_testing/src/_arch/aarch64/cpu.rs
+++ b/13_integrated_testing/src/_arch/aarch64/cpu.rs
@@ -17,8 +17,9 @@ use cortex_a::{asm, regs::*};
 ///
 /// # Safety
 ///
-/// - Linker script must ensure to place this function at `0x80_000`.
-#[naked]
+/// - Linker script must ensure to place this function where it is expected by the target machine.
+/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
+///   a stack for EL2.
 #[no_mangle]
 pub unsafe fn _start() -> ! {
     // Expect the boot core to start in EL2.
@@ -39,6 +40,8 @@ pub unsafe fn _start() -> ! {
 /// - The HW state of EL1 must be prepared in a sound way.
 /// - Exception return from EL2 must must continue execution in EL1 with
 ///   `runtime_init::runtime_init()`.
+/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
+///   a stack for EL2.
 #[inline(always)]
 unsafe fn el2_to_el1_transition() -> ! {
     use crate::runtime_init;
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu.rs b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu.rs
index 7d146d230..3e3ac706f 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu.rs
@@ -17,8 +17,9 @@ use cortex_a::{asm, regs::*};
 ///
 /// # Safety
 ///
-/// - Linker script must ensure to place this function at `0x80_000`.
-#[naked]
+/// - Linker script must ensure to place this function where it is expected by the target machine.
+/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
+///   a stack for EL2.
 #[no_mangle]
 pub unsafe fn _start() -> ! {
     // Expect the boot core to start in EL2.
@@ -39,6 +40,8 @@ pub unsafe fn _start() -> ! {
 /// - The HW state of EL1 must be prepared in a sound way.
 /// - Exception return from EL2 must must continue execution in EL1 with
 ///   `runtime_init::runtime_init()`.
+/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
+///   a stack for EL2.
 #[inline(always)]
 unsafe fn el2_to_el1_transition() -> ! {
     use crate::runtime_init;
diff --git a/15_virtual_mem_part2_mmio_remap/README.md b/15_virtual_mem_part2_mmio_remap/README.md
index 44a9eebd7..6dd7d6301 100644
--- a/15_virtual_mem_part2_mmio_remap/README.md
+++ b/15_virtual_mem_part2_mmio_remap/README.md
@@ -311,7 +311,7 @@ Minipush 1.0
 diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu.rs 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu.rs
 --- 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu.rs
 +++ 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu.rs
-@@ -68,7 +68,7 @@
+@@ -71,7 +71,7 @@
      ELR_EL2.set(runtime_init::runtime_init as *const () as u64);
 
      // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it.
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu.rs b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu.rs
index c68f1817d..d8bcc895c 100644
--- a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu.rs
@@ -17,8 +17,9 @@ use cortex_a::{asm, regs::*};
 ///
 /// # Safety
 ///
-/// - Linker script must ensure to place this function at `0x80_000`.
-#[naked]
+/// - Linker script must ensure to place this function where it is expected by the target machine.
+/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
+///   a stack for EL2.
 #[no_mangle]
 pub unsafe fn _start() -> ! {
     // Expect the boot core to start in EL2.
@@ -39,6 +40,8 @@ pub unsafe fn _start() -> ! {
 /// - The HW state of EL1 must be prepared in a sound way.
 /// - Exception return from EL2 must must continue execution in EL1 with
 ///   `runtime_init::runtime_init()`.
+/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
+///   a stack for EL2.
 #[inline(always)]
 unsafe fn el2_to_el1_transition() -> ! {
     use crate::runtime_init;
diff --git a/X1_JTAG_boot/jtag_boot_rpi3.img b/X1_JTAG_boot/jtag_boot_rpi3.img
index 064b41a451738e818b8ee9fe4b4aed8939d8088f..6d23c37d397a23916acbf64b4df727d723bf9647 100755
GIT binary patch
delta 2821
zcmcgudu&@*8UOCRwsUWuwd2@HocLbH<Z&I=N8B#)+Q!#u(UR~8xLL<TBS}H4=_F9n
zi3!wVH$fsK1$=f=I<h}Vx<9t-ts14>6e9s~{@LS?Q7D_lCWO-o%}%<NwrGvlB$w~l
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zD?tdL6OzW};l%0RnP5f+ZZ%y3gINI*zM93Z-bS!Z!CGfpkP_eEwcJj&IF4H#=3!7W
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Hs~r9Z<<V5l

delta 3175
zcmb7FeNYtV8Gm+{J9gm^?zrO{ZqEbp4g}(*!qEvVU@`*6bdcDZNs8b{P(+5)Ozl*A
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diff --git a/X1_JTAG_boot/jtag_boot_rpi4.img b/X1_JTAG_boot/jtag_boot_rpi4.img
index 44e2fb7942454363644d51bf123834042de58a42..7517a699601e9f8a33042bf149d397324b7e364e 100755
GIT binary patch
delta 1380
zcmah|Uuaup6hGg+NprJijY;#rtxa}qvvknPrpB<D+;p3;fNaFl!9dzNaJ4=t-5v%`
zla4(MIxye9iBJ%_iVrtWlXSy8C~fyL84Pt&ecMfoc-#61XK8cSuJPR58)1F%gL}_+
z&UeoFo%8$7cPn0axzJ7)zUpY^ymJ<~K>%(=@?NSe16|^QeqMTwixA>tL;Sd}B2ooy
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z?8k7j_;~ov_m5#jVLw}6;VL3?Hl>J{oou>W|96yLwCz}M+vj-T5kY%$&MH@jn&ges
zHhKM|AfINgy<*O9huP5<NxLv8$(_WzcIWcdsf}isy}Cz|V-88H@Io<6Qj3xU;^*Cx
z762%0E&!c+8))ER3)OgEQN29$wHk-A%1H@z84~IO>W84bGV`%~g1~Ib4u4M*7<kt$
zOvbE|mLh?*2<pNgmvRqB$409Hk+c}(vnwLVD>EO--vQii0r0HwoyCT&kx1H=Xddc`
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z3@oyaxd*M8`4HQ5JugUYR6*FkSciLnn|HGF?gQQ<bZr?ZR#doFiBTl5@F3mJO70#m
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zvF5WIJBFXmiGXMJ#Br_1DwQWK`Rth2bEwA(WdUt=C}!=yLRt4~_zLMBs&g1ac_2lE
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z&{m_otQRHV8>;1yxSZ9XTYr%vzDNw%dWsEf)n0n0(dieAM#Ej~thbk&>t@XR2Dk2J
zOWq{8#L_;$khfxHT<p5<UZxr_l)43fcE6z`qxE%seEj`!-2LM->^{@J+fVheC;sHY
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z4R;e18tCeChWjr8wi@i_ZU&h<l+65}cOhs*xy*FBl<>=&cBg6oB*>;huQy5qri8*=
QHORQOLGDzDooO5V7xZb5U;qFB

delta 1668
zcmah}ZERCj7=F*a?RLw?)~@aP<>;*&blqT$4w*pQE}NLRC?<2FG10F3!11-3t_Xg%
z2qsHLq{oBNs3b#;@ys9043YW6Y>X%i35j49{nu_WYg#1%4Oy8m-`jg<0{-wM?K$t)
z^M0J?+~h-JP09Pn+}Bklf<0w`69iz)mvGS3JkU82=;`rC1Ro(z780W`9<HS+)TKpX
zbU99V#t%Fj7x)0c2^r*{Q^ntL6F@Rk4K$E8(-OqWqW|8*PWl8SIx>C(&xnMk+Ey?G
zp7k4ft`V^sMYbTW6CQVumm4}r1EvZP7tQ#;=c!`C)wJ)5TAE2QG&_0ny({wRuWpPC
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zDTzPFW=gB$znI`mf0>ex?Nqpz*mGy!9{T8PDV!NvrSL$hl241$s7zXBVKp=z+|kNi
z*r9V8=*QhaH(xEIx5Ua(=}72YrU@n_QQ4fCht1M7%8e)=d5aGbIO8?J^%Q|lFIaQk
zrO=tFfMLm~<h{fd&-u_G{r<+)%%1*5AWFVg9hC@NI`SsJ2=I*=z?Kocqbs@<z=RGs
zXSxe8HwFL26aK{@9K;tE)k4k}t8p7)7<>v(<A4FXOc|l+`C_;}Vt~$6bt?}K$GLMJ
z=<97jrPWGa^%+@YMP=hVB9HRrHi4?wf$(FksVXXBn!-6zg)Fg-Zn(YtfyRspjTx9F
zaH>&dMzU082cqr`H`8NNYuG|rfE;C(@`sTFtlaQEOO=04HnDfiTgf#xWv&kXdVAR+
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zmb4_gGYeUR#LkXe_Xxf^wq*6H&3uN<OaryEwYFIMwpyAghJ4m9a<wQ4pWkvE2NySL
z<5s^2)%ZogfIrkbU0U9FSEEWmYjiTe=4}l^S3R@ZpA=$N)@^V0byXrJF1hdzkkI7{
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z#khu*bZ8(R9Xf>Lufg-Z`e#sYLH)kn-O+IL)nHE~+7}#*_5^qBj|KNfdK;pH1q9ix
z;puSjfK!w4<_l|kG#ZKG$>Y-vmAc_xN3)Y%sce2wc4_g*j>4+eW#n{W-J7q*#abQL
z+LInF?2zvMp)QZ;a?GmPwSRz>{g_=leWLGpA+I^t-M`|lCxw;l{T4mY&CWa52{Ue%
xbvC#EpZ7U^M(RA(rS1y;zSQ;Qcvjc9ZWeVt#wJ~|;PkLL*G}PO58LA2`42fO)4l)z

diff --git a/X1_JTAG_boot/src/_arch/aarch64/cpu.rs b/X1_JTAG_boot/src/_arch/aarch64/cpu.rs
index 3f502ee02..eac29d8d7 100644
--- a/X1_JTAG_boot/src/_arch/aarch64/cpu.rs
+++ b/X1_JTAG_boot/src/_arch/aarch64/cpu.rs
@@ -17,8 +17,9 @@ use cortex_a::{asm, regs::*};
 ///
 /// # Safety
 ///
-/// - Linker script must ensure to place this function at `0x80_000`.
-#[naked]
+/// - Linker script must ensure to place this function where it is expected by the target machine.
+/// - We have to hope that the compiler omits any stack pointer usage before the stack pointer is
+///   actually set (`SP.set()`).
 #[no_mangle]
 pub unsafe fn _start() -> ! {
     use crate::runtime_init;
diff --git a/rust-toolchain b/rust-toolchain
index 9c4710ceb..23eb56819 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1,4 +1,4 @@
 [toolchain]
-channel = "nightly-2020-12-08"
+channel = "nightly-2020-12-09"
 components = ["llvm-tools-preview"]
 targets = ["aarch64-unknown-none-softfloat"]

From 3a430163b5675f7e5b24b4ea02a81caee3e6040f Mon Sep 17 00:00:00 2001
From: myl7 <myl.ustc@gmail.com>
Date: Fri, 11 Dec 2020 04:10:42 +0800
Subject: [PATCH 004/214] Remove redundant spaces.

---
 00_before_we_start/README.CN.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/00_before_we_start/README.CN.md b/00_before_we_start/README.CN.md
index 8d609d00f..58f0af400 100644
--- a/00_before_we_start/README.CN.md
+++ b/00_before_we_start/README.CN.md
@@ -2,7 +2,7 @@
 
 下面的文本内容是1：1 复制的文档。在每个教程的内核主要源代码文档的头部。它描述了源代码的主要结构并且试着去传达各个方法背后的理念。请阅读文章以便你能熟悉你在教程中将会遇到的东西。这将帮助你更好的浏览代码和理解不同章节的区别和增量内容。
 
-另请注意，以下文字将引用源代码文件（例如`** / memory.rs`）或在本教程的第一批教程中尚不存在的功能。 它们将被逐渐添加到本教程。
+另请注意，以下文字将引用源代码文件（例如`**/memory.rs`）或在本教程的第一批教程中尚不存在的功能。 它们将被逐渐添加到本教程。
 
 玩的开心！
 

From b74a931d01b3e23c3b588159d196165f858efcf3 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre-richter@users.noreply.github.com>
Date: Thu, 17 Dec 2020 09:46:56 +0100
Subject: [PATCH 005/214] Update minipush.rb

Fixes #89
---
 utils/minipush.rb | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/utils/minipush.rb b/utils/minipush.rb
index 9c743bd32..a6ccaa73f 100755
--- a/utils/minipush.rb
+++ b/utils/minipush.rb
@@ -28,7 +28,7 @@ def initialize(serial_name, binary_image_path)
     # The three characters signaling the request token are expected to arrive as the last three
     # characters _at the end_ of a character stream (e.g. after a header print from Miniload).
     def wait_for_binary_request
-        Timeout.timeout(7) do
+        Timeout.timeout(30) do
             loop do
                 received = @target_serial.readpartial(4096)
 

From dad68abdc6721f2d9e0eeedb35d39649649bbb21 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Wed, 23 Dec 2020 22:41:10 +0100
Subject: [PATCH 006/214] Update dependencies

---
 04_zero_overhead_abstraction/Cargo.lock          |  8 ++++----
 05_safe_globals/Cargo.lock                       |  8 ++++----
 06_drivers_gpio_uart/Cargo.lock                  |  8 ++++----
 07_uart_chainloader/Cargo.lock                   |  8 ++++----
 08_timestamps/Cargo.lock                         |  8 ++++----
 09_hw_debug_JTAG/Cargo.lock                      |  8 ++++----
 10_privilege_level/Cargo.lock                    |  8 ++++----
 11_virtual_mem_part1_identity_mapping/Cargo.lock |  8 ++++----
 12_exceptions_part1_groundwork/Cargo.lock        |  8 ++++----
 13_integrated_testing/Cargo.lock                 | 16 ++++++++--------
 14_exceptions_part2_peripheral_IRQs/Cargo.lock   | 16 ++++++++--------
 15_virtual_mem_part2_mmio_remap/Cargo.lock       | 16 ++++++++--------
 12 files changed, 60 insertions(+), 60 deletions(-)

diff --git a/04_zero_overhead_abstraction/Cargo.lock b/04_zero_overhead_abstraction/Cargo.lock
index fd6d5c737..235957ef8 100644
--- a/04_zero_overhead_abstraction/Cargo.lock
+++ b/04_zero_overhead_abstraction/Cargo.lock
@@ -2,9 +2,9 @@
 # It is not intended for manual editing.
 [[package]]
 name = "cortex-a"
-version = "5.0.0"
+version = "5.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "626fdbb0f6fa1e6be6df0e94795998894c4ad08d3221e12209a6c0b4f546a0c4"
+checksum = "dc37a4862a4f5b40df96f5e0f3bd4ce6a1bd8bb59a965cd476844673faf83896"
 dependencies = [
  "register",
 ]
@@ -18,9 +18,9 @@ dependencies = [
 
 [[package]]
 name = "register"
-version = "1.0.0"
+version = "1.0.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "185fff3cbc031a1d17b86a980f8014002da35f9187cf4370728e0eb1eeff6829"
+checksum = "faf386c0c48fea132b7fbbf71c32d1b1d62e7c59043bbabdd15c9ed9f254517e"
 dependencies = [
  "tock-registers",
 ]
diff --git a/05_safe_globals/Cargo.lock b/05_safe_globals/Cargo.lock
index fd6d5c737..235957ef8 100644
--- a/05_safe_globals/Cargo.lock
+++ b/05_safe_globals/Cargo.lock
@@ -2,9 +2,9 @@
 # It is not intended for manual editing.
 [[package]]
 name = "cortex-a"
-version = "5.0.0"
+version = "5.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "626fdbb0f6fa1e6be6df0e94795998894c4ad08d3221e12209a6c0b4f546a0c4"
+checksum = "dc37a4862a4f5b40df96f5e0f3bd4ce6a1bd8bb59a965cd476844673faf83896"
 dependencies = [
  "register",
 ]
@@ -18,9 +18,9 @@ dependencies = [
 
 [[package]]
 name = "register"
-version = "1.0.0"
+version = "1.0.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "185fff3cbc031a1d17b86a980f8014002da35f9187cf4370728e0eb1eeff6829"
+checksum = "faf386c0c48fea132b7fbbf71c32d1b1d62e7c59043bbabdd15c9ed9f254517e"
 dependencies = [
  "tock-registers",
 ]
diff --git a/06_drivers_gpio_uart/Cargo.lock b/06_drivers_gpio_uart/Cargo.lock
index 7b2456e16..115e07626 100644
--- a/06_drivers_gpio_uart/Cargo.lock
+++ b/06_drivers_gpio_uart/Cargo.lock
@@ -2,9 +2,9 @@
 # It is not intended for manual editing.
 [[package]]
 name = "cortex-a"
-version = "5.0.0"
+version = "5.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "626fdbb0f6fa1e6be6df0e94795998894c4ad08d3221e12209a6c0b4f546a0c4"
+checksum = "dc37a4862a4f5b40df96f5e0f3bd4ce6a1bd8bb59a965cd476844673faf83896"
 dependencies = [
  "register",
 ]
@@ -19,9 +19,9 @@ dependencies = [
 
 [[package]]
 name = "register"
-version = "1.0.0"
+version = "1.0.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "185fff3cbc031a1d17b86a980f8014002da35f9187cf4370728e0eb1eeff6829"
+checksum = "faf386c0c48fea132b7fbbf71c32d1b1d62e7c59043bbabdd15c9ed9f254517e"
 dependencies = [
  "tock-registers",
 ]
diff --git a/07_uart_chainloader/Cargo.lock b/07_uart_chainloader/Cargo.lock
index 7b2456e16..115e07626 100644
--- a/07_uart_chainloader/Cargo.lock
+++ b/07_uart_chainloader/Cargo.lock
@@ -2,9 +2,9 @@
 # It is not intended for manual editing.
 [[package]]
 name = "cortex-a"
-version = "5.0.0"
+version = "5.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "626fdbb0f6fa1e6be6df0e94795998894c4ad08d3221e12209a6c0b4f546a0c4"
+checksum = "dc37a4862a4f5b40df96f5e0f3bd4ce6a1bd8bb59a965cd476844673faf83896"
 dependencies = [
  "register",
 ]
@@ -19,9 +19,9 @@ dependencies = [
 
 [[package]]
 name = "register"
-version = "1.0.0"
+version = "1.0.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "185fff3cbc031a1d17b86a980f8014002da35f9187cf4370728e0eb1eeff6829"
+checksum = "faf386c0c48fea132b7fbbf71c32d1b1d62e7c59043bbabdd15c9ed9f254517e"
 dependencies = [
  "tock-registers",
 ]
diff --git a/08_timestamps/Cargo.lock b/08_timestamps/Cargo.lock
index 7b2456e16..115e07626 100644
--- a/08_timestamps/Cargo.lock
+++ b/08_timestamps/Cargo.lock
@@ -2,9 +2,9 @@
 # It is not intended for manual editing.
 [[package]]
 name = "cortex-a"
-version = "5.0.0"
+version = "5.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "626fdbb0f6fa1e6be6df0e94795998894c4ad08d3221e12209a6c0b4f546a0c4"
+checksum = "dc37a4862a4f5b40df96f5e0f3bd4ce6a1bd8bb59a965cd476844673faf83896"
 dependencies = [
  "register",
 ]
@@ -19,9 +19,9 @@ dependencies = [
 
 [[package]]
 name = "register"
-version = "1.0.0"
+version = "1.0.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "185fff3cbc031a1d17b86a980f8014002da35f9187cf4370728e0eb1eeff6829"
+checksum = "faf386c0c48fea132b7fbbf71c32d1b1d62e7c59043bbabdd15c9ed9f254517e"
 dependencies = [
  "tock-registers",
 ]
diff --git a/09_hw_debug_JTAG/Cargo.lock b/09_hw_debug_JTAG/Cargo.lock
index 7b2456e16..115e07626 100644
--- a/09_hw_debug_JTAG/Cargo.lock
+++ b/09_hw_debug_JTAG/Cargo.lock
@@ -2,9 +2,9 @@
 # It is not intended for manual editing.
 [[package]]
 name = "cortex-a"
-version = "5.0.0"
+version = "5.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "626fdbb0f6fa1e6be6df0e94795998894c4ad08d3221e12209a6c0b4f546a0c4"
+checksum = "dc37a4862a4f5b40df96f5e0f3bd4ce6a1bd8bb59a965cd476844673faf83896"
 dependencies = [
  "register",
 ]
@@ -19,9 +19,9 @@ dependencies = [
 
 [[package]]
 name = "register"
-version = "1.0.0"
+version = "1.0.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "185fff3cbc031a1d17b86a980f8014002da35f9187cf4370728e0eb1eeff6829"
+checksum = "faf386c0c48fea132b7fbbf71c32d1b1d62e7c59043bbabdd15c9ed9f254517e"
 dependencies = [
  "tock-registers",
 ]
diff --git a/10_privilege_level/Cargo.lock b/10_privilege_level/Cargo.lock
index 7b2456e16..115e07626 100644
--- a/10_privilege_level/Cargo.lock
+++ b/10_privilege_level/Cargo.lock
@@ -2,9 +2,9 @@
 # It is not intended for manual editing.
 [[package]]
 name = "cortex-a"
-version = "5.0.0"
+version = "5.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "626fdbb0f6fa1e6be6df0e94795998894c4ad08d3221e12209a6c0b4f546a0c4"
+checksum = "dc37a4862a4f5b40df96f5e0f3bd4ce6a1bd8bb59a965cd476844673faf83896"
 dependencies = [
  "register",
 ]
@@ -19,9 +19,9 @@ dependencies = [
 
 [[package]]
 name = "register"
-version = "1.0.0"
+version = "1.0.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "185fff3cbc031a1d17b86a980f8014002da35f9187cf4370728e0eb1eeff6829"
+checksum = "faf386c0c48fea132b7fbbf71c32d1b1d62e7c59043bbabdd15c9ed9f254517e"
 dependencies = [
  "tock-registers",
 ]
diff --git a/11_virtual_mem_part1_identity_mapping/Cargo.lock b/11_virtual_mem_part1_identity_mapping/Cargo.lock
index 7b2456e16..115e07626 100644
--- a/11_virtual_mem_part1_identity_mapping/Cargo.lock
+++ b/11_virtual_mem_part1_identity_mapping/Cargo.lock
@@ -2,9 +2,9 @@
 # It is not intended for manual editing.
 [[package]]
 name = "cortex-a"
-version = "5.0.0"
+version = "5.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "626fdbb0f6fa1e6be6df0e94795998894c4ad08d3221e12209a6c0b4f546a0c4"
+checksum = "dc37a4862a4f5b40df96f5e0f3bd4ce6a1bd8bb59a965cd476844673faf83896"
 dependencies = [
  "register",
 ]
@@ -19,9 +19,9 @@ dependencies = [
 
 [[package]]
 name = "register"
-version = "1.0.0"
+version = "1.0.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "185fff3cbc031a1d17b86a980f8014002da35f9187cf4370728e0eb1eeff6829"
+checksum = "faf386c0c48fea132b7fbbf71c32d1b1d62e7c59043bbabdd15c9ed9f254517e"
 dependencies = [
  "tock-registers",
 ]
diff --git a/12_exceptions_part1_groundwork/Cargo.lock b/12_exceptions_part1_groundwork/Cargo.lock
index 7b2456e16..115e07626 100644
--- a/12_exceptions_part1_groundwork/Cargo.lock
+++ b/12_exceptions_part1_groundwork/Cargo.lock
@@ -2,9 +2,9 @@
 # It is not intended for manual editing.
 [[package]]
 name = "cortex-a"
-version = "5.0.0"
+version = "5.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "626fdbb0f6fa1e6be6df0e94795998894c4ad08d3221e12209a6c0b4f546a0c4"
+checksum = "dc37a4862a4f5b40df96f5e0f3bd4ce6a1bd8bb59a965cd476844673faf83896"
 dependencies = [
  "register",
 ]
@@ -19,9 +19,9 @@ dependencies = [
 
 [[package]]
 name = "register"
-version = "1.0.0"
+version = "1.0.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "185fff3cbc031a1d17b86a980f8014002da35f9187cf4370728e0eb1eeff6829"
+checksum = "faf386c0c48fea132b7fbbf71c32d1b1d62e7c59043bbabdd15c9ed9f254517e"
 dependencies = [
  "tock-registers",
 ]
diff --git a/13_integrated_testing/Cargo.lock b/13_integrated_testing/Cargo.lock
index 8930bc96d..0334159de 100644
--- a/13_integrated_testing/Cargo.lock
+++ b/13_integrated_testing/Cargo.lock
@@ -2,9 +2,9 @@
 # It is not intended for manual editing.
 [[package]]
 name = "cortex-a"
-version = "5.0.0"
+version = "5.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "626fdbb0f6fa1e6be6df0e94795998894c4ad08d3221e12209a6c0b4f546a0c4"
+checksum = "dc37a4862a4f5b40df96f5e0f3bd4ce6a1bd8bb59a965cd476844673faf83896"
 dependencies = [
  "register",
 ]
@@ -37,27 +37,27 @@ checksum = "b73ae13954572c7ca0ec48ba9fe6a59c0392066eba62f8cb384ffd5addf538c5"
 
 [[package]]
 name = "quote"
-version = "1.0.7"
+version = "1.0.8"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "aa563d17ecb180e500da1cfd2b028310ac758de548efdd203e18f283af693f37"
+checksum = "991431c3519a3f36861882da93630ce66b52918dcf1b8e2fd66b397fc96f28df"
 dependencies = [
  "proc-macro2",
 ]
 
 [[package]]
 name = "register"
-version = "1.0.0"
+version = "1.0.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "185fff3cbc031a1d17b86a980f8014002da35f9187cf4370728e0eb1eeff6829"
+checksum = "faf386c0c48fea132b7fbbf71c32d1b1d62e7c59043bbabdd15c9ed9f254517e"
 dependencies = [
  "tock-registers",
 ]
 
 [[package]]
 name = "syn"
-version = "1.0.50"
+version = "1.0.55"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "443b4178719c5a851e1bde36ce12da21d74a0e60b4d982ec3385a933c812f0f6"
+checksum = "a571a711dddd09019ccc628e1b17fe87c59b09d513c06c026877aa708334f37a"
 dependencies = [
  "proc-macro2",
  "quote",
diff --git a/14_exceptions_part2_peripheral_IRQs/Cargo.lock b/14_exceptions_part2_peripheral_IRQs/Cargo.lock
index 8930bc96d..0334159de 100644
--- a/14_exceptions_part2_peripheral_IRQs/Cargo.lock
+++ b/14_exceptions_part2_peripheral_IRQs/Cargo.lock
@@ -2,9 +2,9 @@
 # It is not intended for manual editing.
 [[package]]
 name = "cortex-a"
-version = "5.0.0"
+version = "5.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "626fdbb0f6fa1e6be6df0e94795998894c4ad08d3221e12209a6c0b4f546a0c4"
+checksum = "dc37a4862a4f5b40df96f5e0f3bd4ce6a1bd8bb59a965cd476844673faf83896"
 dependencies = [
  "register",
 ]
@@ -37,27 +37,27 @@ checksum = "b73ae13954572c7ca0ec48ba9fe6a59c0392066eba62f8cb384ffd5addf538c5"
 
 [[package]]
 name = "quote"
-version = "1.0.7"
+version = "1.0.8"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "aa563d17ecb180e500da1cfd2b028310ac758de548efdd203e18f283af693f37"
+checksum = "991431c3519a3f36861882da93630ce66b52918dcf1b8e2fd66b397fc96f28df"
 dependencies = [
  "proc-macro2",
 ]
 
 [[package]]
 name = "register"
-version = "1.0.0"
+version = "1.0.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "185fff3cbc031a1d17b86a980f8014002da35f9187cf4370728e0eb1eeff6829"
+checksum = "faf386c0c48fea132b7fbbf71c32d1b1d62e7c59043bbabdd15c9ed9f254517e"
 dependencies = [
  "tock-registers",
 ]
 
 [[package]]
 name = "syn"
-version = "1.0.50"
+version = "1.0.55"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "443b4178719c5a851e1bde36ce12da21d74a0e60b4d982ec3385a933c812f0f6"
+checksum = "a571a711dddd09019ccc628e1b17fe87c59b09d513c06c026877aa708334f37a"
 dependencies = [
  "proc-macro2",
  "quote",
diff --git a/15_virtual_mem_part2_mmio_remap/Cargo.lock b/15_virtual_mem_part2_mmio_remap/Cargo.lock
index 8930bc96d..0334159de 100644
--- a/15_virtual_mem_part2_mmio_remap/Cargo.lock
+++ b/15_virtual_mem_part2_mmio_remap/Cargo.lock
@@ -2,9 +2,9 @@
 # It is not intended for manual editing.
 [[package]]
 name = "cortex-a"
-version = "5.0.0"
+version = "5.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "626fdbb0f6fa1e6be6df0e94795998894c4ad08d3221e12209a6c0b4f546a0c4"
+checksum = "dc37a4862a4f5b40df96f5e0f3bd4ce6a1bd8bb59a965cd476844673faf83896"
 dependencies = [
  "register",
 ]
@@ -37,27 +37,27 @@ checksum = "b73ae13954572c7ca0ec48ba9fe6a59c0392066eba62f8cb384ffd5addf538c5"
 
 [[package]]
 name = "quote"
-version = "1.0.7"
+version = "1.0.8"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "aa563d17ecb180e500da1cfd2b028310ac758de548efdd203e18f283af693f37"
+checksum = "991431c3519a3f36861882da93630ce66b52918dcf1b8e2fd66b397fc96f28df"
 dependencies = [
  "proc-macro2",
 ]
 
 [[package]]
 name = "register"
-version = "1.0.0"
+version = "1.0.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "185fff3cbc031a1d17b86a980f8014002da35f9187cf4370728e0eb1eeff6829"
+checksum = "faf386c0c48fea132b7fbbf71c32d1b1d62e7c59043bbabdd15c9ed9f254517e"
 dependencies = [
  "tock-registers",
 ]
 
 [[package]]
 name = "syn"
-version = "1.0.50"
+version = "1.0.55"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "443b4178719c5a851e1bde36ce12da21d74a0e60b4d982ec3385a933c812f0f6"
+checksum = "a571a711dddd09019ccc628e1b17fe87c59b09d513c06c026877aa708334f37a"
 dependencies = [
  "proc-macro2",
  "quote",

From 18c7259c6065fcc8444eb9a7f116ce8ba5bbe248 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sat, 26 Dec 2020 23:59:16 +0100
Subject: [PATCH 007/214] Default to externally powered RPis

Addresses issues in #86
---
 06_drivers_gpio_uart/README.md                |  27 +++---
 06_drivers_gpio_uart/src/main.rs              |   7 --
 07_uart_chainloader/README.md                 |  85 ++++++++++--------
 07_uart_chainloader/demo_payload_rpi3.img     | Bin 7384 -> 6712 bytes
 07_uart_chainloader/demo_payload_rpi4.img     | Bin 7240 -> 6592 bytes
 07_uart_chainloader/update.sh                 |   8 ++
 08_timestamps/README.md                       |  37 +++++---
 09_hw_debug_JTAG/README.md                    |   7 +-
 10_privilege_level/README.md                  |  31 +++----
 .../README.md                                 |  37 ++++----
 12_exceptions_part1_groundwork/README.md      |  83 ++++++++---------
 14_exceptions_part2_peripheral_IRQs/README.md |  82 ++++++++---------
 15_virtual_mem_part2_mmio_remap/README.md     |  56 ++++++------
 README.md                                     |   5 +-
 doc/wiring.fzz                                | Bin 0 -> 61259 bytes
 doc/wiring.png                                | Bin 100836 -> 81105 bytes
 utils/devtool.rb                              |   3 +-
 utils/minipush.rb                             |  27 +++---
 utils/miniterm.rb                             |  11 ++-
 19 files changed, 269 insertions(+), 237 deletions(-)
 create mode 100755 07_uart_chainloader/update.sh
 create mode 100644 doc/wiring.fzz

diff --git a/06_drivers_gpio_uart/README.md b/06_drivers_gpio_uart/README.md
index 08568cf5b..e3d502b60 100644
--- a/06_drivers_gpio_uart/README.md
+++ b/06_drivers_gpio_uart/README.md
@@ -49,7 +49,7 @@ init_uart_clock=48000000
     - [bootcode.bin](https://github.com/raspberrypi/firmware/raw/master/boot/bootcode.bin)
     - [fixup.dat](https://github.com/raspberrypi/firmware/raw/master/boot/fixup.dat)
     - [start.elf](https://github.com/raspberrypi/firmware/raw/master/boot/start.elf)
-4. Run `make` and copy the [kernel8.img](kernel8.img) onto the SD card.
+4. Run `make`.
 
 ### Pi 4
 
@@ -57,15 +57,15 @@ init_uart_clock=48000000
     - [fixup4.dat](https://github.com/raspberrypi/firmware/raw/master/boot/fixup4.dat)
     - [start4.elf](https://github.com/raspberrypi/firmware/raw/master/boot/start4.elf)
     - [bcm2711-rpi-4-b.dtb](https://github.com/raspberrypi/firmware/raw/master/boot/bcm2711-rpi-4-b.dtb)
-4. Run `BSP=rpi4 make` and copy the [kernel8.img](kernel8.img) onto the SD card.
+4. Run `BSP=rpi4 make`.
+
 
 _**Note**: Should it not work on your RPi4, try renaming `start4.elf` to `start.elf` (without the 4)
 on the SD card._
 
 ### Common again
 
-5. Insert the SD card into the RPi and connect the USB serial to your host PC.
-    - Wiring diagram at [top-level README](../README.md#usb-serial).
+5. Copy the `kernel8.img` onto the SD card and insert it back into the RPi.
 6. Run the `miniterm` target, which opens the UART device on the host:
 
 ```console
@@ -81,14 +81,16 @@ $ make miniterm
 $ DEV_SERIAL=/dev/tty.usbserial-0001 make miniterm
 ```
 
-7. Hit <kbd>Enter</kbd> after seeing "`Connected`" to kick off the kernel boot process and observe
-   the output:
+7. Connect the USB serial to your host PC.
+    - Wiring diagram at [top-level README](../README.md#-usb-serial-output).
+    - Make sure that you **DID NOT** connect the power pin of the USB serial. Only RX/TX and GND.
+8. Connect the RPi to the (USB) power cable and observe the output:
 
 ```console
 Miniterm 1.0
 
-
-[MT] ✅ Connected
+[MT] ⏳ Waiting for /dev/ttyUSB0
+[MT] ✅ Serial connected
 [0] Booting on: Raspberry Pi 3
 [1] Drivers loaded:
       1. BCM GPIO
@@ -1212,7 +1214,7 @@ diff -uNr 05_safe_globals/src/main.rs 06_drivers_gpio_uart/src/main.rs
  mod memory;
  mod panic_wait;
  mod print;
-@@ -116,16 +126,53 @@
+@@ -116,16 +126,46 @@
  /// # Safety
  ///
  /// - Only a single core must be active and running this function.
@@ -1239,13 +1241,6 @@ diff -uNr 05_safe_globals/src/main.rs 06_drivers_gpio_uart/src/main.rs
 +    use console::interface::All;
 +    use driver::interface::DriverManager;
 +
-+    // Wait for user to hit Enter.
-+    loop {
-+        if bsp::console::console().read_char() == '\n' {
-+            break;
-+        }
-+    }
-+
 +    println!("[0] Booting on: {}", bsp::board_name());
 +
 +    println!("[1] Drivers loaded:");
diff --git a/06_drivers_gpio_uart/src/main.rs b/06_drivers_gpio_uart/src/main.rs
index 4e6840ad1..9e58e80b7 100644
--- a/06_drivers_gpio_uart/src/main.rs
+++ b/06_drivers_gpio_uart/src/main.rs
@@ -147,13 +147,6 @@ fn kernel_main() -> ! {
     use console::interface::All;
     use driver::interface::DriverManager;
 
-    // Wait for user to hit Enter.
-    loop {
-        if bsp::console::console().read_char() == '\n' {
-            break;
-        }
-    }
-
     println!("[0] Booting on: {}", bsp::board_name());
 
     println!("[1] Drivers loaded:");
diff --git a/07_uart_chainloader/README.md b/07_uart_chainloader/README.md
index 0b48ef90a..8872bc18c 100644
--- a/07_uart_chainloader/README.md
+++ b/07_uart_chainloader/README.md
@@ -25,10 +25,13 @@ Our chainloader is called `MiniLoad` and is inspired by [raspbootin].
 
 You can try it with this tutorial already:
 1. Depending on your target hardware:`make` or `BSP=rpi4 make`.
-2. Copy `kernel8.img` to the SD card.
-3. Execute `make chainboot` or `BSP=rpi4 make chainboot`.
-4. Now plug in the USB Serial.
-5. Observe the loader fetching a kernel over `UART`:
+1. Copy `kernel8.img` to the SD card.
+1. Execute `make chainboot` or `BSP=rpi4 make chainboot`.
+1. Connect the USB serial to your host PC.
+    - Wiring diagram at [top-level README](../README.md#-usb-serial-output).
+    - Make sure that you **DID NOT** connect the power pin of the USB serial. Only RX/TX and GND.
+1. Connect the RPi to the (USB) power cable.
+1. Observe the loader fetching a kernel over `UART`:
 
 > ❗ **NOTE**: By default, `make chainboot` tries to connect to `/dev/ttyUSB0`.
 > Should the USB serial on your system have a different name, you have to provide it explicitly. For
@@ -44,7 +47,8 @@ $ make chainboot
 Minipush 1.0
 
 [MP] ⏳ Waiting for /dev/ttyUSB0
-[MP] ✅ Connected
+[MP] ✅ Serial connected
+[MP] 🔌 Please power the target now
  __  __ _      _ _                 _
 |  \/  (_)_ _ (_) |   ___  __ _ __| |
 | |\/| | | ' \| | |__/ _ \/ _` / _` |
@@ -53,7 +57,7 @@ Minipush 1.0
            Raspberry Pi 3
 
 [ML] Requesting binary
-[MP] ⏩ Pushing 7 KiB ==========================================🦀 100% 0 KiB/s Time: 00:00:00
+[MP] ⏩ Pushing 6 KiB ==========================================🦀 100% 0 KiB/s Time: 00:00:00
 [ML] Loaded! Executing the payload now
 
 [0] Booting on: Raspberry Pi 3
@@ -429,18 +433,23 @@ diff -uNr 06_drivers_gpio_uart/src/main.rs 07_uart_chainloader/src/main.rs
  mod runtime_init;
  mod synchronization;
 
-@@ -144,35 +148,52 @@
+@@ -144,28 +148,52 @@
 
  /// The main function running after the early init.
  fn kernel_main() -> ! {
 +    use bsp::console::console;
      use console::interface::All;
 -    use driver::interface::DriverManager;
+-
+-    println!("[0] Booting on: {}", bsp::board_name());
 
--    // Wait for user to hit Enter.
--    loop {
--        if bsp::console::console().read_char() == '\n' {
--            break;
+-    println!("[1] Drivers loaded:");
+-    for (i, driver) in bsp::driver::driver_manager()
+-        .all_device_drivers()
+-        .iter()
+-        .enumerate()
+-    {
+-        println!("      {}. {}", i + 1, driver.compatible());
 +    println!(" __  __ _      _ _                 _ ");
 +    println!("|  \\/  (_)_ _ (_) |   ___  __ _ __| |");
 +    println!("| |\\/| | | ' \\| | |__/ _ \\/ _` / _` |");
@@ -458,8 +467,17 @@ diff -uNr 06_drivers_gpio_uart/src/main.rs 07_uart_chainloader/src/main.rs
 +    // Notify `Minipush` to send the binary.
 +    for _ in 0..3 {
 +        console().write_char(3 as char);
-+    }
-+
+     }
+
+-    println!(
+-        "[2] Chars written: {}",
+-        bsp::console::console().chars_written()
+-    );
+-    println!("[3] Echoing input now");
+-
+-    loop {
+-        let c = bsp::console::console().read_char();
+-        bsp::console::console().write_char(c);
 +    // Read the binary's size.
 +    let mut size: u32 = u32::from(console().read_char() as u8);
 +    size |= u32::from(console().read_char() as u8) << 8;
@@ -475,34 +493,15 @@ diff -uNr 06_drivers_gpio_uart/src/main.rs 07_uart_chainloader/src/main.rs
 +        // Read the kernel byte by byte.
 +        for i in 0..size {
 +            core::ptr::write_volatile(kernel_addr.offset(i as isize), console().read_char() as u8)
-         }
++        }
      }
-
--    println!("[0] Booting on: {}", bsp::board_name());
++
 +    println!("[ML] Loaded! Executing the payload now\n");
 +    console().flush();
-
--    println!("[1] Drivers loaded:");
--    for (i, driver) in bsp::driver::driver_manager()
--        .all_device_drivers()
--        .iter()
--        .enumerate()
--    {
--        println!("      {}. {}", i + 1, driver.compatible());
--    }
++
 +    // Use black magic to get a function pointer.
 +    let kernel: fn() -> ! = unsafe { core::mem::transmute(kernel_addr) };
-
--    println!(
--        "[2] Chars written: {}",
--        bsp::console::console().chars_written()
--    );
--    println!("[3] Echoing input now");
--
--    loop {
--        let c = bsp::console::console().read_char();
--        bsp::console::console().write_char(c);
--    }
++
 +    // Jump to loaded kernel!
 +    kernel()
  }
@@ -583,4 +582,18 @@ diff -uNr 06_drivers_gpio_uart/src/runtime_init.rs 07_uart_chainloader/src/runti
  pub unsafe fn runtime_init() -> ! {
      zero_bss();
 
+
+diff -uNr 06_drivers_gpio_uart/update.sh 07_uart_chainloader/update.sh
+--- 06_drivers_gpio_uart/update.sh
++++ 07_uart_chainloader/update.sh
+@@ -0,0 +1,8 @@
++#!/usr/bin/env bash
++
++cd ../06_drivers_gpio_uart
++BSP=rpi4 make
++cp kernel8.img ../07_uart_chainloader/demo_payload_rpi4.img
++make
++cp kernel8.img ../07_uart_chainloader/demo_payload_rpi3.img
++rm kernel8.img
+
 ```
diff --git a/07_uart_chainloader/demo_payload_rpi3.img b/07_uart_chainloader/demo_payload_rpi3.img
index 9adf8152f7447be4c0d35ec20c96f7c67c377510..cb83285f1b2ca41d0175a18604b3e5cca9882987 100755
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diff --git a/07_uart_chainloader/demo_payload_rpi4.img b/07_uart_chainloader/demo_payload_rpi4.img
index c3b1ede6cc6ba9075e528da9dfaa43ef960e33ed..9abdf41e85b09f016e2b760668f110cab1de31e2 100755
GIT binary patch
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diff --git a/07_uart_chainloader/update.sh b/07_uart_chainloader/update.sh
new file mode 100755
index 000000000..7d57d0a62
--- /dev/null
+++ b/07_uart_chainloader/update.sh
@@ -0,0 +1,8 @@
+#!/usr/bin/env bash
+
+cd ../06_drivers_gpio_uart
+BSP=rpi4 make
+cp kernel8.img ../07_uart_chainloader/demo_payload_rpi4.img
+make
+cp kernel8.img ../07_uart_chainloader/demo_payload_rpi3.img
+rm kernel8.img
diff --git a/08_timestamps/README.md b/08_timestamps/README.md
index 3148aa3a9..9ec2e42fc 100644
--- a/08_timestamps/README.md
+++ b/08_timestamps/README.md
@@ -15,7 +15,8 @@ $ make chainboot
 Minipush 1.0
 
 [MP] ⏳ Waiting for /dev/ttyUSB0
-[MP] ✅ Connected
+[MP] ✅ Serial connected
+[MP] 🔌 Please power the target now
  __  __ _      _ _                 _
 |  \/  (_)_ _ (_) |   ___  __ _ __| |
 | |\/| | | ' \| | |__/ _ \/ _` / _` |
@@ -24,19 +25,18 @@ Minipush 1.0
            Raspberry Pi 3
 
 [ML] Requesting binary
-[MP] ⏩ Pushing 12 KiB =========================================🦀 100% 0 KiB/s Time: 00:00:00
+[MP] ⏩ Pushing 11 KiB =========================================🦀 100% 0 KiB/s Time: 00:00:00
 [ML] Loaded! Executing the payload now
 
-[    0.586140] Booting on: Raspberry Pi 3
-[    0.587227] Architectural timer resolution: 52 ns
-[    0.589530] Drivers loaded:
-[    0.590876]       1. BCM GPIO
-[    0.592309]       2. BCM PL011 UART
-[W   0.594005] Spin duration smaller than architecturally supported, skipping
-[    0.597392] Spinning for 1 second
-[    1.599001] Spinning for 1 second
-[    2.599872] Spinning for 1 second
-
+[    0.543941] Booting on: Raspberry Pi 3
+[    0.545059] Architectural timer resolution: 52 ns
+[    0.547358] Drivers loaded:
+[    0.548703]       1. BCM GPIO
+[    0.550135]       2. BCM PL011 UART
+[W   0.551828] Spin duration smaller than architecturally supported, skipping
+[    0.555212] Spinning for 1 second
+[    1.556818] Spinning for 1 second
+[    2.557690] Spinning for 1 second
 ```
 
 ## Diff to previous
@@ -754,4 +754,17 @@ diff -uNr 07_uart_chainloader/src/time.rs 08_timestamps/src/time.rs
 +    }
 +}
 
+diff -uNr 07_uart_chainloader/update.sh 08_timestamps/update.sh
+--- 07_uart_chainloader/update.sh
++++ 08_timestamps/update.sh
+@@ -1,8 +0,0 @@
+-#!/usr/bin/env bash
+-
+-cd ../06_drivers_gpio_uart
+-BSP=rpi4 make
+-cp kernel8.img ../07_uart_chainloader/demo_payload_rpi4.img
+-make
+-cp kernel8.img ../07_uart_chainloader/demo_payload_rpi3.img
+-rm kernel8.img
+
 ```
diff --git a/09_hw_debug_JTAG/README.md b/09_hw_debug_JTAG/README.md
index 93b66a66f..12cf0cc1e 100644
--- a/09_hw_debug_JTAG/README.md
+++ b/09_hw_debug_JTAG/README.md
@@ -157,7 +157,8 @@ $ make jtagboot
 Minipush 1.0
 
 [MP] ⏳ Waiting for /dev/ttyUSB0
-[MP] ✅ Connected
+[MP] ✅ Serial connected
+[MP] 🔌 Please power the target now
  __  __ _      _ _                 _
 |  \/  (_)_ _ (_) |   ___  __ _ __| |
 | |\/| | | ' \| | |__/ _ \/ _` / _` |
@@ -166,10 +167,10 @@ Minipush 1.0
            Raspberry Pi 3
 
 [ML] Requesting binary
-[MP] ⏩ Pushing 8 KiB ==========================================🦀 100% 0 KiB/s Time: 00:00:00
+[MP] ⏩ Pushing 7 KiB ==========================================🦀 100% 0 KiB/s Time: 00:00:00
 [ML] Loaded! Executing the payload now
 
-[    0.372110] Parking CPU core. Please connect over JTAG now.
+[    0.394532] Parking CPU core. Please connect over JTAG now.
 ```
 
 It is important to keep the USB serial connected and the terminal with the `jtagboot` open and
diff --git a/10_privilege_level/README.md b/10_privilege_level/README.md
index a9035cec9..84ccf9248 100644
--- a/10_privilege_level/README.md
+++ b/10_privilege_level/README.md
@@ -192,7 +192,8 @@ $ make chainboot
 Minipush 1.0
 
 [MP] ⏳ Waiting for /dev/ttyUSB0
-[MP] ✅ Connected
+[MP] ✅ Serial connected
+[MP] 🔌 Please power the target now
  __  __ _      _ _                 _
 |  \/  (_)_ _ (_) |   ___  __ _ __| |
 | |\/| | | ' \| | |__/ _ \/ _` / _` |
@@ -201,22 +202,22 @@ Minipush 1.0
            Raspberry Pi 3
 
 [ML] Requesting binary
-[MP] ⏩ Pushing 15 KiB =========================================🦀 100% 0 KiB/s Time: 00:00:00
+[MP] ⏩ Pushing 13 KiB =========================================🦀 100% 0 KiB/s Time: 00:00:00
 [ML] Loaded! Executing the payload now
 
-[    0.703812] Booting on: Raspberry Pi 3
-[    0.704900] Current privilege level: EL1
-[    0.706811] Exception handling state:
-[    0.708592]       Debug:  Masked
-[    0.710156]       SError: Masked
-[    0.711719]       IRQ:    Masked
-[    0.713283]       FIQ:    Masked
-[    0.714848] Architectural timer resolution: 52 ns
-[    0.717149] Drivers loaded:
-[    0.718496]       1. BCM GPIO
-[    0.719929]       2. BCM PL011 UART
-[    0.721623] Timer test, spinning for 1 second
-[    1.723753] Echoing input now
+[    0.637617] Booting on: Raspberry Pi 3
+[    0.638737] Current privilege level: EL1
+[    0.640645] Exception handling state:
+[    0.642424]       Debug:  Masked
+[    0.643986]       SError: Masked
+[    0.645548]       IRQ:    Masked
+[    0.647110]       FIQ:    Masked
+[    0.648672] Architectural timer resolution: 52 ns
+[    0.650971] Drivers loaded:
+[    0.652316]       1. BCM GPIO
+[    0.653748]       2. BCM PL011 UART
+[    0.655440] Timer test, spinning for 1 second
+[    1.657567] Echoing input now
 ```
 
 ## Diff to previous
diff --git a/11_virtual_mem_part1_identity_mapping/README.md b/11_virtual_mem_part1_identity_mapping/README.md
index 4d9299a27..0533361b1 100644
--- a/11_virtual_mem_part1_identity_mapping/README.md
+++ b/11_virtual_mem_part1_identity_mapping/README.md
@@ -264,7 +264,8 @@ $ make chainboot
 Minipush 1.0
 
 [MP] ⏳ Waiting for /dev/ttyUSB0
-[MP] ✅ Connected
+[MP] ✅ Serial connected
+[MP] 🔌 Please power the target now
  __  __ _      _ _                 _
 |  \/  (_)_ _ (_) |   ___  __ _ __| |
 | |\/| | | ' \| | |__/ _ \/ _` / _` |
@@ -276,24 +277,24 @@ Minipush 1.0
 [MP] ⏩ Pushing 64 KiB ========================================🦀 100% 32 KiB/s Time: 00:00:02
 [ML] Loaded! Executing the payload now
 
-[    3.085343] Booting on: Raspberry Pi 3
-[    3.086427] MMU online. Special regions:
-[    3.088339]       0x00080000 - 0x0008ffff |  64 KiB | C   RO PX  | Kernel code and RO data
-[    3.092422]       0x1fff0000 - 0x1fffffff |  64 KiB | Dev RW PXN | Remapped Device MMIO
-[    3.096375]       0x3f000000 - 0x4000ffff |  16 MiB | Dev RW PXN | Device MMIO
-[    3.099937] Current privilege level: EL1
-[    3.101848] Exception handling state:
-[    3.103629]       Debug:  Masked
-[    3.105192]       SError: Masked
-[    3.106756]       IRQ:    Masked
-[    3.108320]       FIQ:    Masked
-[    3.109884] Architectural timer resolution: 52 ns
-[    3.112186] Drivers loaded:
-[    3.113532]       1. BCM GPIO
-[    3.114966]       2. BCM PL011 UART
-[    3.116660] Timer test, spinning for 1 second
+[    3.175017] Booting on: Raspberry Pi 3
+[    3.176100] MMU online. Special regions:
+[    3.178009]       0x00080000 - 0x0008ffff |  64 KiB | C   RO PX  | Kernel code and RO data
+[    3.182088]       0x1fff0000 - 0x1fffffff |  64 KiB | Dev RW PXN | Remapped Device MMIO
+[    3.186036]       0x3f000000 - 0x4000ffff |  16 MiB | Dev RW PXN | Device MMIO
+[    3.189594] Current privilege level: EL1
+[    3.191502] Exception handling state:
+[    3.193281]       Debug:  Masked
+[    3.194843]       SError: Masked
+[    3.196405]       IRQ:    Masked
+[    3.197967]       FIQ:    Masked
+[    3.199529] Architectural timer resolution: 52 ns
+[    3.201828] Drivers loaded:
+[    3.203173]       1. BCM GPIO
+[    3.204605]       2. BCM PL011 UART
+[    3.206297] Timer test, spinning for 1 second
 [     !!!    ] Writing through the remapped UART at 0x1FFF_1000
-[    4.120828] Echoing input now
+[    4.210458] Echoing input now
 ```
 
 ## Diff to previous
diff --git a/12_exceptions_part1_groundwork/README.md b/12_exceptions_part1_groundwork/README.md
index 04f20cd65..21c0f0eef 100644
--- a/12_exceptions_part1_groundwork/README.md
+++ b/12_exceptions_part1_groundwork/README.md
@@ -399,7 +399,8 @@ $ make chainboot
 Minipush 1.0
 
 [MP] ⏳ Waiting for /dev/ttyUSB0
-[MP] ✅ Connected
+[MP] ✅ Serial connected
+[MP] 🔌 Please power the target now
  __  __ _      _ _                 _
 |  \/  (_)_ _ (_) |   ___  __ _ __| |
 | |\/| | | ' \| | |__/ _ \/ _` / _` |
@@ -411,29 +412,29 @@ Minipush 1.0
 [MP] ⏩ Pushing 64 KiB ========================================🦀 100% 32 KiB/s Time: 00:00:02
 [ML] Loaded! Executing the payload now
 
-[    3.006343] Booting on: Raspberry Pi 3
-[    3.007428] MMU online. Special regions:
-[    3.009339]       0x00080000 - 0x0008ffff |  64 KiB | C   RO PX  | Kernel code and RO data
-[    3.013422]       0x3f000000 - 0x4000ffff |  16 MiB | Dev RW PXN | Device MMIO
-[    3.016985] Current privilege level: EL1
-[    3.018895] Exception handling state:
-[    3.020676]       Debug:  Masked
-[    3.022240]       SError: Masked
-[    3.023804]       IRQ:    Masked
-[    3.025368]       FIQ:    Masked
-[    3.026931] Architectural timer resolution: 52 ns
-[    3.029234] Drivers loaded:
-[    3.030580]       1. BCM GPIO
-[    3.032014]       2. BCM PL011 UART
-[    3.033708] Timer test, spinning for 1 second
-[    4.035837]
-[    4.035841] Trying to write to address 8 GiB...
-[    4.038006] ************************************************
-[    4.040785] Whoa! We recovered from a synchronous exception!
-[    4.043565] ************************************************
-[    4.046345]
-[    4.047040] Let's try again
-[    4.048387] Trying to write to address 9 GiB...
+[    3.090618] Booting on: Raspberry Pi 3
+[    3.091701] MMU online. Special regions:
+[    3.093610]       0x00080000 - 0x0008ffff |  64 KiB | C   RO PX  | Kernel code and RO data
+[    3.097688]       0x3f000000 - 0x4000ffff |  16 MiB | Dev RW PXN | Device MMIO
+[    3.101246] Current privilege level: EL1
+[    3.103155] Exception handling state:
+[    3.104934]       Debug:  Masked
+[    3.106496]       SError: Masked
+[    3.108058]       IRQ:    Masked
+[    3.109619]       FIQ:    Masked
+[    3.111181] Architectural timer resolution: 52 ns
+[    3.113481] Drivers loaded:
+[    3.114826]       1. BCM GPIO
+[    3.116257]       2. BCM PL011 UART
+[    3.117950] Timer test, spinning for 1 second
+[    4.120076]
+[    4.120079] Trying to write to address 8 GiB...
+[    4.122242] ************************************************
+[    4.125018] Whoa! We recovered from a synchronous exception!
+[    4.127795] ************************************************
+[    4.130571]
+[    4.131266] Let's try again
+[    4.132611] Trying to write to address 9 GiB...
 
 Kernel panic:
 
@@ -442,7 +443,7 @@ FAR_EL1: 0x0000000240000000
 ESR_EL1: 0x96000004
       Exception Class         (EC) : 0x25 - Data Abort, current EL
       Instr Specific Syndrome (ISS): 0x4
-ELR_EL1: 0x0000000000080db4
+ELR_EL1: 0x0000000000081454
 SPSR_EL1: 0x600003c5
       Flags:
             Negative (N): Not set
@@ -457,22 +458,22 @@ SPSR_EL1: 0x600003c5
       Illegal Execution State (IL): Not set
 
 General purpose register:
-      x0 : 0x0000000000000000         x1 : 0x00000000000858f6
-      x2 : 0x0000000000000026         x3 : 0x0000000000082a0c
-      x4 : 0x000000000007fc7c         x5 : 0x0000000000000003
-      x6 : 0x0000000000000000         x7 : 0x7f91bc052b2b0208
-      x8 : 0x0000000240000000         x9 : 0x00000000000858f6
-      x10: 0x000000000000041d         x11: 0x000000003f201000
-      x12: 0x0000000000000019         x13: 0x000000000007fc7d
-      x14: 0x000000000007fdc8         x15: 0x0000000000000040
-      x16: 0x0000000000000000         x17: 0x0000000000000040
-      x18: 0x9e06782800000028         x19: 0x000000003b9aca00
-      x20: 0x00000000000003e8         x21: 0x0000000000082f58
-      x22: 0x00000000000830cc         x23: 0x0000000000090008
-      x24: 0x00000000000f4240         x25: 0x0000000000085248
-      x26: 0x00000000000856e0         x27: 0x00000000000857c0
-      x28: 0x00000000000830cc         x29: 0x0000000000085530
-      lr : 0x0000000000080da8
+      x0 : 0x0000000000000000         x1 : 0x0000000000085726
+      x2 : 0x0000000000000026         x3 : 0x0000000000083bf0
+      x4 : 0x0000000000000003         x5 : 0xfb4f101900000000
+      x6 : 0x0000000000000000         x7 : 0x7e9198052b2b0200
+      x8 : 0x0000000240000000         x9 : 0x000000003f201000
+      x10: 0x0000000000000019         x11: 0x0000000000000000
+      x12: 0x0000000000000006         x13: 0x0000000000000031
+      x14: 0x000000000007fc2d         x15: 0x0000000000000000
+      x16: 0x0000000000000040         x17: 0xb557f006f276cfb6
+      x18: 0x0000000000000003         x19: 0x0000000000090008
+      x20: 0x0000000000085510         x21: 0x000000003b9aca00
+      x22: 0x00000000000003e8         x23: 0x000000000008160c
+      x24: 0x0000000000082264         x25: 0x00000000000f4240
+      x26: 0xffffffffc4653600         x27: 0x00000000000855f0
+      x28: 0x0000000000083f84         x29: 0x0000000000086810
+      lr : 0x0000000000081448
 ```
 
 ## Diff to previous
diff --git a/14_exceptions_part2_peripheral_IRQs/README.md b/14_exceptions_part2_peripheral_IRQs/README.md
index e983470be..e3fa7e512 100644
--- a/14_exceptions_part2_peripheral_IRQs/README.md
+++ b/14_exceptions_part2_peripheral_IRQs/README.md
@@ -665,7 +665,8 @@ $ make chainboot
 Minipush 1.0
 
 [MP] ⏳ Waiting for /dev/ttyUSB0
-[MP] ✅ Connected
+[MP] ✅ Serial connected
+[MP] 🔌 Please power the target now
  __  __ _      _ _                 _
 |  \/  (_)_ _ (_) |   ___  __ _ __| |
 | |\/| | | ' \| | |__/ _ \/ _` / _` |
@@ -677,25 +678,25 @@ Minipush 1.0
 [MP] ⏩ Pushing 66 KiB ========================================🦀 100% 33 KiB/s Time: 00:00:02
 [ML] Loaded! Executing the payload now
 
-[    3.134937] Booting on: Raspberry Pi 3
-[    3.136023] MMU online. Special regions:
-[    3.137934]       0x00080000 - 0x0008ffff |  64 KiB | C   RO PX  | Kernel code and RO data
-[    3.142017]       0x3f000000 - 0x4000ffff |  16 MiB | Dev RW PXN | Device MMIO
-[    3.145579] Current privilege level: EL1
-[    3.147490] Exception handling state:
-[    3.149271]       Debug:  Masked
-[    3.150835]       SError: Masked
-[    3.152398]       IRQ:    Unmasked
-[    3.154049]       FIQ:    Masked
-[    3.155613] Architectural timer resolution: 52 ns
-[    3.157915] Drivers loaded:
-[    3.159262]       1. BCM GPIO
-[    3.160695]       2. BCM PL011 UART
-[    3.162389]       3. BCM Interrupt Controller
-[    3.164518] Registered IRQ handlers:
-[    3.166255]       Peripheral handler:
-[    3.168038]              57. BCM PL011 UART
-[    3.170078] Echoing input now
+[    3.203172] Booting on: Raspberry Pi 3
+[    3.204255] MMU online. Special regions:
+[    3.206164]       0x00080000 - 0x0008ffff |  64 KiB | C   RO PX  | Kernel code and RO data
+[    3.210242]       0x3f000000 - 0x4000ffff |  16 MiB | Dev RW PXN | Device MMIO
+[    3.213800] Current privilege level: EL1
+[    3.215709] Exception handling state:
+[    3.217487]       Debug:  Masked
+[    3.219049]       SError: Masked
+[    3.220611]       IRQ:    Unmasked
+[    3.222260]       FIQ:    Masked
+[    3.223822] Architectural timer resolution: 52 ns
+[    3.226121] Drivers loaded:
+[    3.227466]       1. BCM GPIO
+[    3.228898]       2. BCM PL011 UART
+[    3.230590]       3. BCM Interrupt Controller
+[    3.232716] Registered IRQ handlers:
+[    3.234451]       Peripheral handler:
+[    3.236232]              57. BCM PL011 UART
+[    3.238269] Echoing input now
 ```
 
 Raspberry Pi 4:
@@ -706,7 +707,8 @@ $ BSP=rpi4 make chainboot
 Minipush 1.0
 
 [MP] ⏳ Waiting for /dev/ttyUSB0
-[MP] ✅ Connected
+[MP] ✅ Serial connected
+[MP] 🔌 Please power the target now
  __  __ _      _ _                 _
 |  \/  (_)_ _ (_) |   ___  __ _ __| |
 | |\/| | | ' \| | |__/ _ \/ _` / _` |
@@ -718,25 +720,25 @@ Minipush 1.0
 [MP] ⏩ Pushing 73 KiB ========================================🦀 100% 24 KiB/s Time: 00:00:03
 [ML] Loaded! Executing the payload now
 
-[    3.413865] Booting on: Raspberry Pi 4
-[    3.414255] MMU online. Special regions:
-[    3.416166]       0x00080000 - 0x0008ffff |  64 KiB | C   RO PX  | Kernel code and RO data
-[    3.420249]       0xfe000000 - 0xff84ffff |  24 MiB | Dev RW PXN | Device MMIO
-[    3.423811] Current privilege level: EL1
-[    3.425722] Exception handling state:
-[    3.427503]       Debug:  Masked
-[    3.429067]       SError: Masked
-[    3.430630]       IRQ:    Unmasked
-[    3.432281]       FIQ:    Masked
-[    3.433845] Architectural timer resolution: 18 ns
-[    3.436147] Drivers loaded:
-[    3.437494]       1. BCM GPIO
-[    3.438927]       2. BCM PL011 UART
-[    3.440621]       3. GICv2 (ARM Generic Interrupt Controller v2)
-[    3.443575] Registered IRQ handlers:
-[    3.445312]       Peripheral handler:
-[    3.447096]             153. BCM PL011 UART
-[    3.449136] Echoing input now
+[    3.486234] Booting on: Raspberry Pi 4
+[    3.486623] MMU online. Special regions:
+[    3.488532]       0x00080000 - 0x0008ffff |  64 KiB | C   RO PX  | Kernel code and RO data
+[    3.492610]       0xfe000000 - 0xff84ffff |  24 MiB | Dev RW PXN | Device MMIO
+[    3.496167] Current privilege level: EL1
+[    3.498076] Exception handling state:
+[    3.499855]       Debug:  Masked
+[    3.501417]       SError: Masked
+[    3.502979]       IRQ:    Unmasked
+[    3.504628]       FIQ:    Masked
+[    3.506189] Architectural timer resolution: 18 ns
+[    3.508489] Drivers loaded:
+[    3.509834]       1. BCM GPIO
+[    3.511266]       2. BCM PL011 UART
+[    3.512958]       3. GICv2 (ARM Generic Interrupt Controller v2)
+[    3.515908] Registered IRQ handlers:
+[    3.517643]       Peripheral handler:
+[    3.519425]             153. BCM PL011 UART
+[    3.521463] Echoing input now
 ```
 
 ## Diff to previous
diff --git a/15_virtual_mem_part2_mmio_remap/README.md b/15_virtual_mem_part2_mmio_remap/README.md
index 6dd7d6301..312bb5f19 100644
--- a/15_virtual_mem_part2_mmio_remap/README.md
+++ b/15_virtual_mem_part2_mmio_remap/README.md
@@ -244,7 +244,8 @@ $ make chainboot
 Minipush 1.0
 
 [MP] ⏳ Waiting for /dev/ttyUSB0
-[MP] ✅ Connected
+[MP] ✅ Serial connected
+[MP] 🔌 Please power the target now
  __  __ _      _ _                 _
 |  \/  (_)_ _ (_) |   ___  __ _ __| |
 | |\/| | | ' \| | |__/ _ \/ _` / _` |
@@ -256,18 +257,18 @@ Minipush 1.0
 [MP] ⏩ Pushing 67 KiB ========================================🦀 100% 33 KiB/s Time: 00:00:02
 [ML] Loaded! Executing the payload now
 
-[    3.041355] Booting on: Raspberry Pi 3
-[    3.042438] MMU online:
-[    3.043609]       -----------------------------------------------------------------------------------------------------------------
-[    3.049466]               Virtual                      Physical            Size       Attr                    Entity
-[    3.055323]       -----------------------------------------------------------------------------------------------------------------
-[    3.061183]       0x000070000..0x00007FFFF --> 0x000070000..0x00007FFFF |  64 KiB | C   RW XN | Kernel boot-core stack
-[    3.066476]       0x000080000..0x00008FFFF --> 0x000080000..0x00008FFFF |  64 KiB | C   RO X  | Kernel code and RO data
-[    3.071812]       0x000090000..0x0001AFFFF --> 0x000090000..0x0001AFFFF |   1 MiB | C   RW XN | Kernel data and bss
-[    3.076975]       0x1F0000000..0x1F000FFFF --> 0x03F200000..0x03F20FFFF |  64 KiB | Dev RW XN | BCM GPIO
-[    3.081658]                                                                                   | BCM PL011 UART
-[    3.086606]       0x1F0010000..0x1F001FFFF --> 0x03F000000..0x03F00FFFF |  64 KiB | Dev RW XN | BCM Peripheral Interrupt Controller
-[    3.092462]       -----------------------------------------------------------------------------------------------------------------
+[    3.064756] Booting on: Raspberry Pi 3
+[    3.065839] MMU online:
+[    3.067010]       -----------------------------------------------------------------------------------------------------------------
+[    3.072868]               Virtual                      Physical            Size       Attr                    Entity
+[    3.078725]       -----------------------------------------------------------------------------------------------------------------
+[    3.084585]       0x000070000..0x00007FFFF --> 0x000070000..0x00007FFFF |  64 KiB | C   RW XN | Kernel boot-core stack
+[    3.089877]       0x000080000..0x00008FFFF --> 0x000080000..0x00008FFFF |  64 KiB | C   RO X  | Kernel code and RO data
+[    3.095213]       0x000090000..0x0001BFFFF --> 0x000090000..0x0001BFFFF |   1 MiB | C   RW XN | Kernel data and bss
+[    3.100376]       0x1F0000000..0x1F000FFFF --> 0x03F200000..0x03F20FFFF |  64 KiB | Dev RW XN | BCM GPIO
+[    3.105060]                                                                                   | BCM PL011 UART
+[    3.110008]       0x1F0010000..0x1F001FFFF --> 0x03F000000..0x03F00FFFF |  64 KiB | Dev RW XN | BCM Peripheral Interrupt Controller
+[    3.115863]       -----------------------------------------------------------------------------------------------------------------
 ```
 
 Raspberry Pi 4:
@@ -278,7 +279,8 @@ $ BSP=rpi4 make chainboot
 Minipush 1.0
 
 [MP] ⏳ Waiting for /dev/ttyUSB0
-[MP] ✅ Connected
+[MP] ✅ Serial connected
+[MP] 🔌 Please power the target now
  __  __ _      _ _                 _
 |  \/  (_)_ _ (_) |   ___  __ _ __| |
 | |\/| | | ' \| | |__/ _ \/ _` / _` |
@@ -290,19 +292,19 @@ Minipush 1.0
 [MP] ⏩ Pushing 74 KiB ========================================🦀 100% 24 KiB/s Time: 00:00:03
 [ML] Loaded! Executing the payload now
 
-[    3.376642] Booting on: Raspberry Pi 4
-[    3.377030] MMU online:
-[    3.378202]       -----------------------------------------------------------------------------------------------------------------
-[    3.384059]               Virtual                      Physical            Size       Attr                    Entity
-[    3.389916]       -----------------------------------------------------------------------------------------------------------------
-[    3.395775]       0x000070000..0x00007FFFF --> 0x000070000..0x00007FFFF |  64 KiB | C   RW XN | Kernel boot-core stack
-[    3.401069]       0x000080000..0x00008FFFF --> 0x000080000..0x00008FFFF |  64 KiB | C   RO X  | Kernel code and RO data
-[    3.406404]       0x000090000..0x0001AFFFF --> 0x000090000..0x0001AFFFF |   1 MiB | C   RW XN | Kernel data and bss
-[    3.411566]       0x1F0000000..0x1F000FFFF --> 0x0FE200000..0x0FE20FFFF |  64 KiB | Dev RW XN | BCM GPIO
-[    3.416251]                                                                                   | BCM PL011 UART
-[    3.421198]       0x1F0010000..0x1F001FFFF --> 0x0FF840000..0x0FF84FFFF |  64 KiB | Dev RW XN | GICD
-[    3.425709]                                                                                   | GICC
-[    3.430221]       -----------------------------------------------------------------------------------------------------------------
+[    3.379342] Booting on: Raspberry Pi 4
+[    3.379731] MMU online:
+[    3.380902]       -----------------------------------------------------------------------------------------------------------------
+[    3.386759]               Virtual                      Physical            Size       Attr                    Entity
+[    3.392616]       -----------------------------------------------------------------------------------------------------------------
+[    3.398475]       0x000070000..0x00007FFFF --> 0x000070000..0x00007FFFF |  64 KiB | C   RW XN | Kernel boot-core stack
+[    3.403768]       0x000080000..0x00008FFFF --> 0x000080000..0x00008FFFF |  64 KiB | C   RO X  | Kernel code and RO data
+[    3.409104]       0x000090000..0x0001BFFFF --> 0x000090000..0x0001BFFFF |   1 MiB | C   RW XN | Kernel data and bss
+[    3.414267]       0x1F0000000..0x1F000FFFF --> 0x0FE200000..0x0FE20FFFF |  64 KiB | Dev RW XN | BCM GPIO
+[    3.418951]                                                                                   | BCM PL011 UART
+[    3.423898]       0x1F0010000..0x1F001FFFF --> 0x0FF840000..0x0FF84FFFF |  64 KiB | Dev RW XN | GICD
+[    3.428409]                                                                                   | GICC
+[    3.432921]       -----------------------------------------------------------------------------------------------------------------
 ```
 
 ## Diff to previous
diff --git a/README.md b/README.md
index 845aa87d1..00cbe66ef 100644
--- a/README.md
+++ b/README.md
@@ -120,11 +120,10 @@ provided container, please refer to the repository's [docker](docker) folder.
 ## 📟 USB Serial Output
 
 Since the kernel developed in the tutorials runs on the real hardware, it is highly recommended to
-get a USB serial debug cable to get the full experience. The cable also powers the Raspberry once
-you connect it, so you don't need extra power over the dedicated power-USB.
+get a USB serial cable to get the full experience.
 
 - You can find USB-to-serial cables that should work right away at [\[1\]] [\[2\]].
-- You connect it to the GPIO pins `14/15` as shown below.
+- You connect it to `GND` and GPIO pins `14/15` as shown below.
 - [Tutorial 6](06_drivers_gpio_uart) is the first where you can use it. Check it out for
   instructions on how to prepare the SD card to boot your self-made kernel from it.
 - Starting with [tutorial 7](07_uart_chainloader), booting kernels on your Raspberry is getting
diff --git a/doc/wiring.fzz b/doc/wiring.fzz
new file mode 100644
index 0000000000000000000000000000000000000000..55f80ec8d4dd865b1c77762c04d5d520cad12c5a
GIT binary patch
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diff --git a/utils/devtool.rb b/utils/devtool.rb
index d104f31c6..823cdcda7 100755
--- a/utils/devtool.rb
+++ b/utils/devtool.rb
@@ -146,7 +146,8 @@ def make(bsp = nil)
     def make_xtra
         return if @user_has_supplied_crates
 
-        puts 'Make Xtra crates'.light_blue
+        puts 'Make Xtra stuff'.light_blue
+        system('cd 07_uart_chainloader && bash update.sh')
         system('cd X1_JTAG_boot && bash update.sh')
     end
 
diff --git a/utils/minipush.rb b/utils/minipush.rb
index a6ccaa73f..710013437 100755
--- a/utils/minipush.rb
+++ b/utils/minipush.rb
@@ -17,7 +17,7 @@ class MiniPush < MiniTerm
     def initialize(serial_name, binary_image_path)
         super(serial_name)
 
-        @name_short = 'MP'
+        @name_short = 'MP' # override
         @binary_image_path = binary_image_path
         @binary_size = nil
         @binary_image = nil
@@ -28,11 +28,13 @@ def initialize(serial_name, binary_image_path)
     # The three characters signaling the request token are expected to arrive as the last three
     # characters _at the end_ of a character stream (e.g. after a header print from Miniload).
     def wait_for_binary_request
-        Timeout.timeout(30) do
-            loop do
-                received = @target_serial.readpartial(4096)
+        puts "[#{@name_short}] 🔌 Please power the target now"
 
-                raise ConnectionError if received.nil?
+        # Timeout for the request token starts after the first sign of life was received.
+        received = @target_serial.readpartial(4096)
+        Timeout.timeout(10) do
+            loop do
+                raise ProtocolError if received.nil?
 
                 if received.chars.last(3) == ["\u{3}", "\u{3}", "\u{3}"]
                     # Print the last chunk minus the request token.
@@ -41,6 +43,8 @@ def wait_for_binary_request
                 end
 
                 print received
+
+                received = @target_serial.readpartial(4096)
             end
         end
     end
@@ -70,18 +74,20 @@ def send_binary
         end
     end
 
-    # When the serial is still powered.
-    def handle_protocol_error
+    # override
+    def handle_reconnect
         connetion_reset
 
         puts
         puts "[#{@name_short}] ⚡ " \
-             "#{'Protocol Error: Remove and insert the USB serial again'.light_red}"
+             "#{'Connection or protocol Error: '.light_red}" \
+             "#{'Remove power and USB serial. Reinsert serial first, then power'.light_red}"
         sleep(1) while serial_connected?
     end
 
     public
 
+    # override
     def run
         open_serial
         wait_for_binary_request
@@ -89,12 +95,9 @@ def run
         send_size
         send_binary
         terminal
-    rescue ConnectionError, EOFError, Errno::EIO
+    rescue ConnectionError, EOFError, Errno::EIO, ProtocolError, Timeout::Error
         handle_reconnect
         retry
-    rescue ProtocolError, Timeout::Error
-        handle_protocol_error
-        retry
     rescue StandardError => e
         handle_unexpected(e)
     ensure
diff --git a/utils/miniterm.rb b/utils/miniterm.rb
index fb05189ae..6b2c2f633 100755
--- a/utils/miniterm.rb
+++ b/utils/miniterm.rb
@@ -29,11 +29,12 @@ def serial_connected?
     end
 
     def wait_for_serial
-        loop do
-            break if serial_connected?
+        return if serial_connected?
 
-            print "\r[#{@name_short}] ⏳ Waiting for #{@target_serial_name}"
+        puts "[#{@name_short}] ⏳ Waiting for #{@target_serial_name}"
+        loop do
             sleep(1)
+            break if serial_connected?
         end
     end
 
@@ -45,12 +46,10 @@ def open_serial
         # Ensure all output is immediately flushed to the device.
         @target_serial.sync = true
     rescue Errno::EACCES => e
-        puts
         puts "[#{@name_short}] 🚫 #{e.message} - Maybe try with 'sudo'"
         exit
     else
-        puts
-        puts "[#{@name_short}] ✅ Connected"
+        puts "[#{@name_short}] ✅ Serial connected"
     end
 
     def terminal

From 53c1163c51931ac5c58da03cffeb46ada2486f22 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sun, 27 Dec 2020 00:20:24 +0100
Subject: [PATCH 008/214] 01: Remove LTO to fix linking bug.

For some reason, LTO caused "_start" to start at 0x00080020
instead of 0x00080000.
---
 01_wait_forever/Cargo.toml               |  3 --
 01_wait_forever/src/_arch/aarch64/cpu.rs | 18 --------
 01_wait_forever/src/panic_wait.rs        |  4 +-
 02_runtime_init/README.md                | 57 ++++++++++++++++++++++++
 4 files changed, 59 insertions(+), 23 deletions(-)

diff --git a/01_wait_forever/Cargo.toml b/01_wait_forever/Cargo.toml
index 0f798fcbe..0595aa573 100644
--- a/01_wait_forever/Cargo.toml
+++ b/01_wait_forever/Cargo.toml
@@ -4,9 +4,6 @@ version = "0.1.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
 edition = "2018"
 
-[profile.release]
-lto = true
-
 # The features section is used to select the target board.
 [features]
 default = []
diff --git a/01_wait_forever/src/_arch/aarch64/cpu.rs b/01_wait_forever/src/_arch/aarch64/cpu.rs
index 1d3e871a6..12837a3b3 100644
--- a/01_wait_forever/src/_arch/aarch64/cpu.rs
+++ b/01_wait_forever/src/_arch/aarch64/cpu.rs
@@ -6,21 +6,3 @@
 
 // Assembly counterpart to this file.
 global_asm!(include_str!("cpu.S"));
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Pause execution on the core.
-#[inline(always)]
-pub fn wait_forever() -> ! {
-    unsafe {
-        loop {
-            #[rustfmt::skip]
-            asm!(
-                "wfe",
-                options(nomem, nostack, preserves_flags)
-            );
-        }
-    }
-}
diff --git a/01_wait_forever/src/panic_wait.rs b/01_wait_forever/src/panic_wait.rs
index 560a1724e..0a70c7215 100644
--- a/01_wait_forever/src/panic_wait.rs
+++ b/01_wait_forever/src/panic_wait.rs
@@ -4,10 +4,10 @@
 
 //! A panic handler that infinitely waits.
 
-use crate::cpu;
+// use crate::cpu;
 use core::panic::PanicInfo;
 
 #[panic_handler]
 fn panic(_info: &PanicInfo) -> ! {
-    cpu::wait_forever()
+    unimplemented!()
 }
diff --git a/02_runtime_init/README.md b/02_runtime_init/README.md
index e54520cd3..75a6fa1b8 100644
--- a/02_runtime_init/README.md
+++ b/02_runtime_init/README.md
@@ -23,6 +23,46 @@
 ## Diff to previous
 ```diff
 
+diff -uNr 01_wait_forever/Cargo.toml 02_runtime_init/Cargo.toml
+--- 01_wait_forever/Cargo.toml
++++ 02_runtime_init/Cargo.toml
+@@ -4,6 +4,9 @@
+ authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+ edition = "2018"
+
++[profile.release]
++lto = true
++
+ # The features section is used to select the target board.
+ [features]
+ default = []
+
+diff -uNr 01_wait_forever/src/_arch/aarch64/cpu.rs 02_runtime_init/src/_arch/aarch64/cpu.rs
+--- 01_wait_forever/src/_arch/aarch64/cpu.rs
++++ 02_runtime_init/src/_arch/aarch64/cpu.rs
+@@ -6,3 +6,21 @@
+
+ // Assembly counterpart to this file.
+ global_asm!(include_str!("cpu.S"));
++
++//--------------------------------------------------------------------------------------------------
++// Public Code
++//--------------------------------------------------------------------------------------------------
++
++/// Pause execution on the core.
++#[inline(always)]
++pub fn wait_forever() -> ! {
++    unsafe {
++        loop {
++            #[rustfmt::skip]
++            asm!(
++                "wfe",
++                options(nomem, nostack, preserves_flags)
++            );
++        }
++    }
++}
+
 diff -uNr 01_wait_forever/src/_arch/aarch64/cpu.S 02_runtime_init/src/_arch/aarch64/cpu.S
 --- 01_wait_forever/src/_arch/aarch64/cpu.S
 +++ 02_runtime_init/src/_arch/aarch64/cpu.S
@@ -191,6 +231,23 @@ diff -uNr 01_wait_forever/src/memory.rs 02_runtime_init/src/memory.rs
 +    }
 +}
 
+diff -uNr 01_wait_forever/src/panic_wait.rs 02_runtime_init/src/panic_wait.rs
+--- 01_wait_forever/src/panic_wait.rs
++++ 02_runtime_init/src/panic_wait.rs
+@@ -4,10 +4,10 @@
+
+ //! A panic handler that infinitely waits.
+
+-// use crate::cpu;
++use crate::cpu;
+ use core::panic::PanicInfo;
+
+ #[panic_handler]
+ fn panic(_info: &PanicInfo) -> ! {
+-    unimplemented!()
++    cpu::wait_forever()
+ }
+
 diff -uNr 01_wait_forever/src/runtime_init.rs 02_runtime_init/src/runtime_init.rs
 --- 01_wait_forever/src/runtime_init.rs
 +++ 02_runtime_init/src/runtime_init.rs

From 4caf880e0c32b34c1c5276734ad2188ab1a342fa Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sun, 27 Dec 2020 00:35:47 +0100
Subject: [PATCH 009/214] Update README

---
 01_wait_forever/README.md | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/01_wait_forever/README.md b/01_wait_forever/README.md
index b1927c9bb..0bd3e7429 100644
--- a/01_wait_forever/README.md
+++ b/01_wait_forever/README.md
@@ -25,8 +25,8 @@
     - `#![no_std]`, `#![no_main]`
 - `cpu.S`: Assembly `_start()` function that executes `wfe` (Wait For Event), halting all cores that
   are executing `_start()`.
-- We (have to) define a `#[panic_handler]` function.
-    - Just waits infinitely for a cpu event.
+- We (have to) define a `#[panic_handler]` function to make the compiler happy.
+    - Make it `unimplemented!()` because it will be stripped out since it is not used.
 
 [inner attributes]: https://doc.rust-lang.org/reference/attributes.html
 

From 4618858f4549fcbb80e3790d33d9b8745c8f3dea Mon Sep 17 00:00:00 2001
From: Andre Richter <andre-richter@users.noreply.github.com>
Date: Sun, 27 Dec 2020 22:58:10 +0100
Subject: [PATCH 010/214] Update panic_wait.rs

---
 01_wait_forever/src/panic_wait.rs | 1 -
 1 file changed, 1 deletion(-)

diff --git a/01_wait_forever/src/panic_wait.rs b/01_wait_forever/src/panic_wait.rs
index 0a70c7215..1a9bec2a1 100644
--- a/01_wait_forever/src/panic_wait.rs
+++ b/01_wait_forever/src/panic_wait.rs
@@ -4,7 +4,6 @@
 
 //! A panic handler that infinitely waits.
 
-// use crate::cpu;
 use core::panic::PanicInfo;
 
 #[panic_handler]

From cf34736f555c99c180bf5107751786a66deedda0 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 28 Dec 2020 15:23:36 +0100
Subject: [PATCH 011/214] update deps

---
 13_integrated_testing/Cargo.lock               | 8 ++++----
 14_exceptions_part2_peripheral_IRQs/Cargo.lock | 8 ++++----
 15_virtual_mem_part2_mmio_remap/Cargo.lock     | 8 ++++----
 3 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/13_integrated_testing/Cargo.lock b/13_integrated_testing/Cargo.lock
index 0334159de..5ce481b37 100644
--- a/13_integrated_testing/Cargo.lock
+++ b/13_integrated_testing/Cargo.lock
@@ -31,9 +31,9 @@ dependencies = [
 
 [[package]]
 name = "qemu-exit"
-version = "1.0.0"
+version = "1.0.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "b73ae13954572c7ca0ec48ba9fe6a59c0392066eba62f8cb384ffd5addf538c5"
+checksum = "0e64f0ef443037525a562c4fa6ad3460a351ec10c7ebb0b6c49a87a576d0d1b5"
 
 [[package]]
 name = "quote"
@@ -55,9 +55,9 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.55"
+version = "1.0.56"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "a571a711dddd09019ccc628e1b17fe87c59b09d513c06c026877aa708334f37a"
+checksum = "a9802ddde94170d186eeee5005b798d9c159fa970403f1be19976d0cfb939b72"
 dependencies = [
  "proc-macro2",
  "quote",
diff --git a/14_exceptions_part2_peripheral_IRQs/Cargo.lock b/14_exceptions_part2_peripheral_IRQs/Cargo.lock
index 0334159de..5ce481b37 100644
--- a/14_exceptions_part2_peripheral_IRQs/Cargo.lock
+++ b/14_exceptions_part2_peripheral_IRQs/Cargo.lock
@@ -31,9 +31,9 @@ dependencies = [
 
 [[package]]
 name = "qemu-exit"
-version = "1.0.0"
+version = "1.0.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "b73ae13954572c7ca0ec48ba9fe6a59c0392066eba62f8cb384ffd5addf538c5"
+checksum = "0e64f0ef443037525a562c4fa6ad3460a351ec10c7ebb0b6c49a87a576d0d1b5"
 
 [[package]]
 name = "quote"
@@ -55,9 +55,9 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.55"
+version = "1.0.56"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "a571a711dddd09019ccc628e1b17fe87c59b09d513c06c026877aa708334f37a"
+checksum = "a9802ddde94170d186eeee5005b798d9c159fa970403f1be19976d0cfb939b72"
 dependencies = [
  "proc-macro2",
  "quote",
diff --git a/15_virtual_mem_part2_mmio_remap/Cargo.lock b/15_virtual_mem_part2_mmio_remap/Cargo.lock
index 0334159de..5ce481b37 100644
--- a/15_virtual_mem_part2_mmio_remap/Cargo.lock
+++ b/15_virtual_mem_part2_mmio_remap/Cargo.lock
@@ -31,9 +31,9 @@ dependencies = [
 
 [[package]]
 name = "qemu-exit"
-version = "1.0.0"
+version = "1.0.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "b73ae13954572c7ca0ec48ba9fe6a59c0392066eba62f8cb384ffd5addf538c5"
+checksum = "0e64f0ef443037525a562c4fa6ad3460a351ec10c7ebb0b6c49a87a576d0d1b5"
 
 [[package]]
 name = "quote"
@@ -55,9 +55,9 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.55"
+version = "1.0.56"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "a571a711dddd09019ccc628e1b17fe87c59b09d513c06c026877aa708334f37a"
+checksum = "a9802ddde94170d186eeee5005b798d9c159fa970403f1be19976d0cfb939b72"
 dependencies = [
  "proc-macro2",
  "quote",

From 44bb3f89429e28a5855e205ee1472784c88d580d Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Fri, 1 Jan 2021 11:28:32 +0100
Subject: [PATCH 012/214] Update copyright year

---
 .githooks/pre-commit                          |  2 +-
 01_wait_forever/Makefile                      |  2 +-
 01_wait_forever/src/_arch/aarch64/cpu.S       |  2 +-
 01_wait_forever/src/_arch/aarch64/cpu.rs      |  2 +-
 01_wait_forever/src/bsp.rs                    |  2 +-
 01_wait_forever/src/bsp/raspberrypi.rs        |  2 +-
 01_wait_forever/src/bsp/raspberrypi/link.ld   |  2 +-
 01_wait_forever/src/cpu.rs                    |  2 +-
 01_wait_forever/src/main.rs                   |  2 +-
 01_wait_forever/src/panic_wait.rs             |  2 +-
 02_runtime_init/Makefile                      |  2 +-
 02_runtime_init/README.CN.md                  |  4 ++--
 02_runtime_init/README.md                     |  9 ++++-----
 02_runtime_init/src/_arch/aarch64/cpu.S       |  2 +-
 02_runtime_init/src/_arch/aarch64/cpu.rs      |  2 +-
 02_runtime_init/src/bsp.rs                    |  2 +-
 02_runtime_init/src/bsp/raspberrypi.rs        |  2 +-
 02_runtime_init/src/bsp/raspberrypi/link.ld   |  2 +-
 02_runtime_init/src/bsp/raspberrypi/memory.rs |  2 +-
 02_runtime_init/src/cpu.rs                    |  2 +-
 02_runtime_init/src/main.rs                   |  2 +-
 02_runtime_init/src/memory.rs                 |  2 +-
 02_runtime_init/src/panic_wait.rs             |  2 +-
 02_runtime_init/src/runtime_init.rs           |  2 +-
 03_hacky_hello_world/Makefile                 |  2 +-
 03_hacky_hello_world/README.md                |  6 +++---
 03_hacky_hello_world/src/_arch/aarch64/cpu.S  |  2 +-
 03_hacky_hello_world/src/_arch/aarch64/cpu.rs |  2 +-
 03_hacky_hello_world/src/bsp.rs               |  2 +-
 03_hacky_hello_world/src/bsp/raspberrypi.rs   |  2 +-
 .../src/bsp/raspberrypi/console.rs            |  2 +-
 .../src/bsp/raspberrypi/link.ld               |  2 +-
 .../src/bsp/raspberrypi/memory.rs             |  2 +-
 03_hacky_hello_world/src/console.rs           |  2 +-
 03_hacky_hello_world/src/cpu.rs               |  2 +-
 03_hacky_hello_world/src/main.rs              |  2 +-
 03_hacky_hello_world/src/memory.rs            |  2 +-
 03_hacky_hello_world/src/panic_wait.rs        |  2 +-
 03_hacky_hello_world/src/print.rs             |  2 +-
 03_hacky_hello_world/src/runtime_init.rs      |  2 +-
 04_zero_overhead_abstraction/Makefile         |  2 +-
 04_zero_overhead_abstraction/README.md        |  8 ++++----
 .../src/_arch/aarch64/cpu.rs                  |  2 +-
 .../src/_arch/aarch64/cpu/smp.rs              |  2 +-
 04_zero_overhead_abstraction/src/bsp.rs       |  2 +-
 .../src/bsp/raspberrypi.rs                    |  2 +-
 .../src/bsp/raspberrypi/console.rs            |  2 +-
 .../src/bsp/raspberrypi/cpu.rs                |  2 +-
 .../src/bsp/raspberrypi/link.ld               |  2 +-
 .../src/bsp/raspberrypi/memory.rs             |  2 +-
 04_zero_overhead_abstraction/src/console.rs   |  2 +-
 04_zero_overhead_abstraction/src/cpu.rs       |  2 +-
 04_zero_overhead_abstraction/src/cpu/smp.rs   |  2 +-
 04_zero_overhead_abstraction/src/main.rs      |  2 +-
 04_zero_overhead_abstraction/src/memory.rs    |  2 +-
 .../src/panic_wait.rs                         |  2 +-
 04_zero_overhead_abstraction/src/print.rs     |  2 +-
 .../src/runtime_init.rs                       |  2 +-
 05_safe_globals/Makefile                      |  2 +-
 05_safe_globals/README.md                     |  2 +-
 05_safe_globals/src/_arch/aarch64/cpu.rs      |  2 +-
 05_safe_globals/src/_arch/aarch64/cpu/smp.rs  |  2 +-
 05_safe_globals/src/bsp.rs                    |  2 +-
 05_safe_globals/src/bsp/raspberrypi.rs        |  2 +-
 .../src/bsp/raspberrypi/console.rs            |  2 +-
 05_safe_globals/src/bsp/raspberrypi/cpu.rs    |  2 +-
 05_safe_globals/src/bsp/raspberrypi/link.ld   |  2 +-
 05_safe_globals/src/bsp/raspberrypi/memory.rs |  2 +-
 05_safe_globals/src/console.rs                |  2 +-
 05_safe_globals/src/cpu.rs                    |  2 +-
 05_safe_globals/src/cpu/smp.rs                |  2 +-
 05_safe_globals/src/main.rs                   |  2 +-
 05_safe_globals/src/memory.rs                 |  2 +-
 05_safe_globals/src/panic_wait.rs             |  2 +-
 05_safe_globals/src/print.rs                  |  2 +-
 05_safe_globals/src/runtime_init.rs           |  2 +-
 05_safe_globals/src/synchronization.rs        |  2 +-
 06_drivers_gpio_uart/Makefile                 |  2 +-
 06_drivers_gpio_uart/README.md                | 14 ++++++-------
 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs |  2 +-
 .../src/_arch/aarch64/cpu/smp.rs              |  2 +-
 06_drivers_gpio_uart/src/bsp.rs               |  2 +-
 06_drivers_gpio_uart/src/bsp/device_driver.rs |  2 +-
 .../src/bsp/device_driver/bcm.rs              |  2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  2 +-
 .../src/bsp/device_driver/common.rs           |  2 +-
 06_drivers_gpio_uart/src/bsp/raspberrypi.rs   |  2 +-
 .../src/bsp/raspberrypi/console.rs            |  2 +-
 .../src/bsp/raspberrypi/cpu.rs                |  2 +-
 .../src/bsp/raspberrypi/driver.rs             |  2 +-
 .../src/bsp/raspberrypi/link.ld               |  2 +-
 .../src/bsp/raspberrypi/memory.rs             |  2 +-
 06_drivers_gpio_uart/src/console.rs           |  2 +-
 06_drivers_gpio_uart/src/cpu.rs               |  2 +-
 06_drivers_gpio_uart/src/cpu/smp.rs           |  2 +-
 06_drivers_gpio_uart/src/driver.rs            |  2 +-
 06_drivers_gpio_uart/src/main.rs              |  2 +-
 06_drivers_gpio_uart/src/memory.rs            |  2 +-
 06_drivers_gpio_uart/src/panic_wait.rs        |  2 +-
 06_drivers_gpio_uart/src/print.rs             |  2 +-
 06_drivers_gpio_uart/src/runtime_init.rs      |  2 +-
 06_drivers_gpio_uart/src/synchronization.rs   |  2 +-
 07_uart_chainloader/Makefile                  |  2 +-
 07_uart_chainloader/README.md                 |  2 +-
 07_uart_chainloader/src/_arch/aarch64/cpu.rs  |  2 +-
 .../src/_arch/aarch64/cpu/smp.rs              |  2 +-
 07_uart_chainloader/src/bsp.rs                |  2 +-
 07_uart_chainloader/src/bsp/device_driver.rs  |  2 +-
 .../src/bsp/device_driver/bcm.rs              |  2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  2 +-
 .../src/bsp/device_driver/common.rs           |  2 +-
 07_uart_chainloader/src/bsp/raspberrypi.rs    |  2 +-
 .../src/bsp/raspberrypi/console.rs            |  2 +-
 .../src/bsp/raspberrypi/cpu.rs                |  2 +-
 .../src/bsp/raspberrypi/driver.rs             |  2 +-
 .../src/bsp/raspberrypi/link.ld               |  2 +-
 .../src/bsp/raspberrypi/memory.rs             |  2 +-
 07_uart_chainloader/src/console.rs            |  2 +-
 07_uart_chainloader/src/cpu.rs                |  2 +-
 07_uart_chainloader/src/cpu/smp.rs            |  2 +-
 07_uart_chainloader/src/driver.rs             |  2 +-
 07_uart_chainloader/src/main.rs               |  2 +-
 07_uart_chainloader/src/memory.rs             |  2 +-
 07_uart_chainloader/src/panic_wait.rs         |  2 +-
 07_uart_chainloader/src/print.rs              |  2 +-
 07_uart_chainloader/src/relocate.rs           |  2 +-
 07_uart_chainloader/src/runtime_init.rs       |  2 +-
 07_uart_chainloader/src/synchronization.rs    |  2 +-
 08_timestamps/Makefile                        |  2 +-
 08_timestamps/README.md                       |  6 +++---
 08_timestamps/src/_arch/aarch64/cpu.rs        |  2 +-
 08_timestamps/src/_arch/aarch64/cpu/smp.rs    |  2 +-
 08_timestamps/src/_arch/aarch64/time.rs       |  2 +-
 08_timestamps/src/bsp.rs                      |  2 +-
 08_timestamps/src/bsp/device_driver.rs        |  2 +-
 08_timestamps/src/bsp/device_driver/bcm.rs    |  2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  2 +-
 08_timestamps/src/bsp/device_driver/common.rs |  2 +-
 08_timestamps/src/bsp/raspberrypi.rs          |  2 +-
 08_timestamps/src/bsp/raspberrypi/console.rs  |  2 +-
 08_timestamps/src/bsp/raspberrypi/cpu.rs      |  2 +-
 08_timestamps/src/bsp/raspberrypi/driver.rs   |  2 +-
 08_timestamps/src/bsp/raspberrypi/link.ld     |  2 +-
 08_timestamps/src/bsp/raspberrypi/memory.rs   |  2 +-
 08_timestamps/src/console.rs                  |  2 +-
 08_timestamps/src/cpu.rs                      |  2 +-
 08_timestamps/src/cpu/smp.rs                  |  2 +-
 08_timestamps/src/driver.rs                   |  2 +-
 08_timestamps/src/main.rs                     |  2 +-
 08_timestamps/src/memory.rs                   |  2 +-
 08_timestamps/src/panic_wait.rs               |  2 +-
 08_timestamps/src/print.rs                    |  2 +-
 08_timestamps/src/runtime_init.rs             |  2 +-
 08_timestamps/src/synchronization.rs          |  2 +-
 08_timestamps/src/time.rs                     |  2 +-
 09_hw_debug_JTAG/Makefile                     |  2 +-
 09_hw_debug_JTAG/src/_arch/aarch64/cpu.rs     |  2 +-
 09_hw_debug_JTAG/src/_arch/aarch64/cpu/smp.rs |  2 +-
 09_hw_debug_JTAG/src/_arch/aarch64/time.rs    |  2 +-
 09_hw_debug_JTAG/src/bsp.rs                   |  2 +-
 09_hw_debug_JTAG/src/bsp/device_driver.rs     |  2 +-
 09_hw_debug_JTAG/src/bsp/device_driver/bcm.rs |  2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  2 +-
 .../src/bsp/device_driver/common.rs           |  2 +-
 09_hw_debug_JTAG/src/bsp/raspberrypi.rs       |  2 +-
 .../src/bsp/raspberrypi/console.rs            |  2 +-
 09_hw_debug_JTAG/src/bsp/raspberrypi/cpu.rs   |  2 +-
 .../src/bsp/raspberrypi/driver.rs             |  2 +-
 09_hw_debug_JTAG/src/bsp/raspberrypi/link.ld  |  2 +-
 .../src/bsp/raspberrypi/memory.rs             |  2 +-
 09_hw_debug_JTAG/src/console.rs               |  2 +-
 09_hw_debug_JTAG/src/cpu.rs                   |  2 +-
 09_hw_debug_JTAG/src/cpu/smp.rs               |  2 +-
 09_hw_debug_JTAG/src/driver.rs                |  2 +-
 09_hw_debug_JTAG/src/main.rs                  |  2 +-
 09_hw_debug_JTAG/src/memory.rs                |  2 +-
 09_hw_debug_JTAG/src/panic_wait.rs            |  2 +-
 09_hw_debug_JTAG/src/print.rs                 |  2 +-
 09_hw_debug_JTAG/src/runtime_init.rs          |  2 +-
 09_hw_debug_JTAG/src/synchronization.rs       |  2 +-
 09_hw_debug_JTAG/src/time.rs                  |  2 +-
 10_privilege_level/Makefile                   |  2 +-
 10_privilege_level/README.md                  |  8 ++++----
 10_privilege_level/src/_arch/aarch64/cpu.rs   |  2 +-
 .../src/_arch/aarch64/cpu/smp.rs              |  2 +-
 .../src/_arch/aarch64/exception.rs            |  2 +-
 .../_arch/aarch64/exception/asynchronous.rs   |  2 +-
 10_privilege_level/src/_arch/aarch64/time.rs  |  2 +-
 10_privilege_level/src/bsp.rs                 |  2 +-
 10_privilege_level/src/bsp/device_driver.rs   |  2 +-
 .../src/bsp/device_driver/bcm.rs              |  2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  2 +-
 .../src/bsp/device_driver/common.rs           |  2 +-
 10_privilege_level/src/bsp/raspberrypi.rs     |  2 +-
 .../src/bsp/raspberrypi/console.rs            |  2 +-
 10_privilege_level/src/bsp/raspberrypi/cpu.rs |  2 +-
 .../src/bsp/raspberrypi/driver.rs             |  2 +-
 .../src/bsp/raspberrypi/link.ld               |  2 +-
 .../src/bsp/raspberrypi/memory.rs             |  2 +-
 10_privilege_level/src/console.rs             |  2 +-
 10_privilege_level/src/cpu.rs                 |  2 +-
 10_privilege_level/src/cpu/smp.rs             |  2 +-
 10_privilege_level/src/driver.rs              |  2 +-
 10_privilege_level/src/exception.rs           |  2 +-
 .../src/exception/asynchronous.rs             |  2 +-
 10_privilege_level/src/main.rs                |  2 +-
 10_privilege_level/src/memory.rs              |  2 +-
 10_privilege_level/src/panic_wait.rs          |  2 +-
 10_privilege_level/src/print.rs               |  2 +-
 10_privilege_level/src/runtime_init.rs        |  2 +-
 10_privilege_level/src/synchronization.rs     |  2 +-
 10_privilege_level/src/time.rs                |  2 +-
 .../Makefile                                  |  2 +-
 .../README.md                                 |  6 +++---
 .../src/_arch/aarch64/cpu.rs                  |  2 +-
 .../src/_arch/aarch64/cpu/smp.rs              |  2 +-
 .../src/_arch/aarch64/exception.rs            |  2 +-
 .../_arch/aarch64/exception/asynchronous.rs   |  2 +-
 .../src/_arch/aarch64/memory/mmu.rs           |  2 +-
 .../src/_arch/aarch64/time.rs                 |  2 +-
 .../src/bsp.rs                                |  2 +-
 .../src/bsp/device_driver.rs                  |  2 +-
 .../src/bsp/device_driver/bcm.rs              |  2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  2 +-
 .../src/bsp/device_driver/common.rs           |  2 +-
 .../src/bsp/raspberrypi.rs                    |  2 +-
 .../src/bsp/raspberrypi/console.rs            |  2 +-
 .../src/bsp/raspberrypi/cpu.rs                |  2 +-
 .../src/bsp/raspberrypi/driver.rs             |  2 +-
 .../src/bsp/raspberrypi/link.ld               |  2 +-
 .../src/bsp/raspberrypi/memory.rs             |  2 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |  2 +-
 .../src/console.rs                            |  2 +-
 .../src/cpu.rs                                |  2 +-
 .../src/cpu/smp.rs                            |  2 +-
 .../src/driver.rs                             |  2 +-
 .../src/exception.rs                          |  2 +-
 .../src/exception/asynchronous.rs             |  2 +-
 .../src/main.rs                               |  2 +-
 .../src/memory.rs                             |  2 +-
 .../src/memory/mmu.rs                         |  2 +-
 .../src/panic_wait.rs                         |  2 +-
 .../src/print.rs                              |  2 +-
 .../src/runtime_init.rs                       |  2 +-
 .../src/synchronization.rs                    |  2 +-
 .../src/time.rs                               |  2 +-
 12_exceptions_part1_groundwork/Makefile       |  2 +-
 12_exceptions_part1_groundwork/README.md      |  2 +-
 .../src/_arch/aarch64/cpu.rs                  |  2 +-
 .../src/_arch/aarch64/cpu/smp.rs              |  2 +-
 .../src/_arch/aarch64/exception.S             |  2 +-
 .../src/_arch/aarch64/exception.rs            |  2 +-
 .../_arch/aarch64/exception/asynchronous.rs   |  2 +-
 .../src/_arch/aarch64/memory/mmu.rs           |  2 +-
 .../src/_arch/aarch64/time.rs                 |  2 +-
 12_exceptions_part1_groundwork/src/bsp.rs     |  2 +-
 .../src/bsp/device_driver.rs                  |  2 +-
 .../src/bsp/device_driver/bcm.rs              |  2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  2 +-
 .../src/bsp/device_driver/common.rs           |  2 +-
 .../src/bsp/raspberrypi.rs                    |  2 +-
 .../src/bsp/raspberrypi/console.rs            |  2 +-
 .../src/bsp/raspberrypi/cpu.rs                |  2 +-
 .../src/bsp/raspberrypi/driver.rs             |  2 +-
 .../src/bsp/raspberrypi/link.ld               |  2 +-
 .../src/bsp/raspberrypi/memory.rs             |  2 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |  2 +-
 12_exceptions_part1_groundwork/src/console.rs |  2 +-
 12_exceptions_part1_groundwork/src/cpu.rs     |  2 +-
 12_exceptions_part1_groundwork/src/cpu/smp.rs |  2 +-
 12_exceptions_part1_groundwork/src/driver.rs  |  2 +-
 .../src/exception.rs                          |  2 +-
 .../src/exception/asynchronous.rs             |  2 +-
 12_exceptions_part1_groundwork/src/main.rs    |  2 +-
 12_exceptions_part1_groundwork/src/memory.rs  |  2 +-
 .../src/memory/mmu.rs                         |  2 +-
 .../src/panic_wait.rs                         |  2 +-
 12_exceptions_part1_groundwork/src/print.rs   |  2 +-
 .../src/runtime_init.rs                       |  2 +-
 .../src/synchronization.rs                    |  2 +-
 12_exceptions_part1_groundwork/src/time.rs    |  2 +-
 13_integrated_testing/Makefile                |  2 +-
 13_integrated_testing/README.md               | 20 +++++++++----------
 .../src/_arch/aarch64/cpu.rs                  |  2 +-
 .../src/_arch/aarch64/cpu/smp.rs              |  2 +-
 .../src/_arch/aarch64/exception.S             |  2 +-
 .../src/_arch/aarch64/exception.rs            |  2 +-
 .../_arch/aarch64/exception/asynchronous.rs   |  2 +-
 .../src/_arch/aarch64/memory/mmu.rs           |  2 +-
 .../src/_arch/aarch64/time.rs                 |  2 +-
 13_integrated_testing/src/bsp.rs              |  2 +-
 .../src/bsp/device_driver.rs                  |  2 +-
 .../src/bsp/device_driver/bcm.rs              |  2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  2 +-
 .../src/bsp/device_driver/common.rs           |  2 +-
 13_integrated_testing/src/bsp/raspberrypi.rs  |  2 +-
 .../src/bsp/raspberrypi/console.rs            |  2 +-
 .../src/bsp/raspberrypi/cpu.rs                |  2 +-
 .../src/bsp/raspberrypi/driver.rs             |  2 +-
 .../src/bsp/raspberrypi/link.ld               |  2 +-
 .../src/bsp/raspberrypi/memory.rs             |  2 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |  2 +-
 13_integrated_testing/src/console.rs          |  2 +-
 13_integrated_testing/src/cpu.rs              |  2 +-
 13_integrated_testing/src/cpu/smp.rs          |  2 +-
 13_integrated_testing/src/driver.rs           |  2 +-
 13_integrated_testing/src/exception.rs        |  2 +-
 .../src/exception/asynchronous.rs             |  2 +-
 13_integrated_testing/src/lib.rs              |  2 +-
 13_integrated_testing/src/main.rs             |  2 +-
 13_integrated_testing/src/memory.rs           |  2 +-
 13_integrated_testing/src/memory/mmu.rs       |  2 +-
 13_integrated_testing/src/panic_wait.rs       |  2 +-
 13_integrated_testing/src/print.rs            |  2 +-
 13_integrated_testing/src/runtime_init.rs     |  2 +-
 13_integrated_testing/src/synchronization.rs  |  2 +-
 13_integrated_testing/src/time.rs             |  2 +-
 13_integrated_testing/test-macros/src/lib.rs  |  2 +-
 13_integrated_testing/test-types/src/lib.rs   |  2 +-
 .../tests/00_console_sanity.rb                |  2 +-
 .../tests/00_console_sanity.rs                |  2 +-
 .../tests/01_timer_sanity.rs                  |  2 +-
 .../tests/02_exception_sync_page_fault.rs     |  2 +-
 .../tests/panic_exit_failure/mod.rs           |  2 +-
 .../tests/panic_exit_success/mod.rs           |  2 +-
 13_integrated_testing/tests/runner.rb         |  2 +-
 14_exceptions_part2_peripheral_IRQs/Makefile  |  2 +-
 14_exceptions_part2_peripheral_IRQs/README.md | 20 +++++++++----------
 .../src/_arch/aarch64/cpu.rs                  |  2 +-
 .../src/_arch/aarch64/cpu/smp.rs              |  2 +-
 .../src/_arch/aarch64/exception.S             |  2 +-
 .../src/_arch/aarch64/exception.rs            |  2 +-
 .../_arch/aarch64/exception/asynchronous.rs   |  2 +-
 .../src/_arch/aarch64/memory/mmu.rs           |  2 +-
 .../src/_arch/aarch64/time.rs                 |  2 +-
 .../src/bsp.rs                                |  2 +-
 .../src/bsp/device_driver.rs                  |  2 +-
 .../src/bsp/device_driver/arm.rs              |  2 +-
 .../src/bsp/device_driver/arm/gicv2.rs        |  2 +-
 .../src/bsp/device_driver/arm/gicv2/gicc.rs   |  2 +-
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |  2 +-
 .../src/bsp/device_driver/bcm.rs              |  2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  2 +-
 .../bcm/bcm2xxx_interrupt_controller.rs       |  2 +-
 .../peripheral_ic.rs                          |  2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  2 +-
 .../src/bsp/device_driver/common.rs           |  2 +-
 .../src/bsp/raspberrypi.rs                    |  2 +-
 .../src/bsp/raspberrypi/console.rs            |  2 +-
 .../src/bsp/raspberrypi/cpu.rs                |  2 +-
 .../src/bsp/raspberrypi/driver.rs             |  2 +-
 .../src/bsp/raspberrypi/exception.rs          |  2 +-
 .../bsp/raspberrypi/exception/asynchronous.rs |  2 +-
 .../src/bsp/raspberrypi/link.ld               |  2 +-
 .../src/bsp/raspberrypi/memory.rs             |  2 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |  2 +-
 .../src/console.rs                            |  2 +-
 .../src/cpu.rs                                |  2 +-
 .../src/cpu/smp.rs                            |  2 +-
 .../src/driver.rs                             |  2 +-
 .../src/exception.rs                          |  2 +-
 .../src/exception/asynchronous.rs             |  2 +-
 .../src/lib.rs                                |  2 +-
 .../src/main.rs                               |  2 +-
 .../src/memory.rs                             |  2 +-
 .../src/memory/mmu.rs                         |  2 +-
 .../src/panic_wait.rs                         |  2 +-
 .../src/print.rs                              |  2 +-
 .../src/runtime_init.rs                       |  2 +-
 .../src/state.rs                              |  2 +-
 .../src/synchronization.rs                    |  2 +-
 .../src/time.rs                               |  2 +-
 .../test-macros/src/lib.rs                    |  2 +-
 .../test-types/src/lib.rs                     |  2 +-
 .../tests/00_console_sanity.rb                |  2 +-
 .../tests/00_console_sanity.rs                |  2 +-
 .../tests/01_timer_sanity.rs                  |  2 +-
 .../tests/02_exception_sync_page_fault.rs     |  2 +-
 .../tests/03_exception_irq_sanity.rs          |  2 +-
 .../tests/panic_exit_failure/mod.rs           |  2 +-
 .../tests/panic_exit_success/mod.rs           |  2 +-
 .../tests/runner.rb                           |  2 +-
 15_virtual_mem_part2_mmio_remap/Makefile      |  2 +-
 15_virtual_mem_part2_mmio_remap/README.md     | 12 +++++------
 .../src/_arch/aarch64/cpu.rs                  |  2 +-
 .../src/_arch/aarch64/cpu/smp.rs              |  2 +-
 .../src/_arch/aarch64/exception.S             |  2 +-
 .../src/_arch/aarch64/exception.rs            |  2 +-
 .../_arch/aarch64/exception/asynchronous.rs   |  2 +-
 .../src/_arch/aarch64/memory/mmu.rs           |  2 +-
 .../src/_arch/aarch64/time.rs                 |  2 +-
 15_virtual_mem_part2_mmio_remap/src/bsp.rs    |  2 +-
 .../src/bsp/device_driver.rs                  |  2 +-
 .../src/bsp/device_driver/arm.rs              |  2 +-
 .../src/bsp/device_driver/arm/gicv2.rs        |  2 +-
 .../src/bsp/device_driver/arm/gicv2/gicc.rs   |  2 +-
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |  2 +-
 .../src/bsp/device_driver/bcm.rs              |  2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  2 +-
 .../bcm/bcm2xxx_interrupt_controller.rs       |  2 +-
 .../peripheral_ic.rs                          |  2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  2 +-
 .../src/bsp/device_driver/common.rs           |  2 +-
 .../src/bsp/raspberrypi.rs                    |  2 +-
 .../src/bsp/raspberrypi/console.rs            |  2 +-
 .../src/bsp/raspberrypi/cpu.rs                |  2 +-
 .../src/bsp/raspberrypi/driver.rs             |  2 +-
 .../src/bsp/raspberrypi/exception.rs          |  2 +-
 .../bsp/raspberrypi/exception/asynchronous.rs |  2 +-
 .../src/bsp/raspberrypi/link.ld               |  2 +-
 .../src/bsp/raspberrypi/memory.rs             |  2 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |  2 +-
 15_virtual_mem_part2_mmio_remap/src/common.rs |  2 +-
 .../src/console.rs                            |  2 +-
 15_virtual_mem_part2_mmio_remap/src/cpu.rs    |  2 +-
 .../src/cpu/smp.rs                            |  2 +-
 15_virtual_mem_part2_mmio_remap/src/driver.rs |  2 +-
 .../src/exception.rs                          |  2 +-
 .../src/exception/asynchronous.rs             |  2 +-
 15_virtual_mem_part2_mmio_remap/src/lib.rs    |  2 +-
 15_virtual_mem_part2_mmio_remap/src/main.rs   |  2 +-
 15_virtual_mem_part2_mmio_remap/src/memory.rs |  2 +-
 .../src/memory/mmu.rs                         |  2 +-
 .../src/memory/mmu/mapping_record.rs          |  2 +-
 .../src/memory/mmu/types.rs                   |  2 +-
 .../src/panic_wait.rs                         |  2 +-
 15_virtual_mem_part2_mmio_remap/src/print.rs  |  2 +-
 .../src/runtime_init.rs                       |  2 +-
 15_virtual_mem_part2_mmio_remap/src/state.rs  |  2 +-
 .../src/synchronization.rs                    |  2 +-
 15_virtual_mem_part2_mmio_remap/src/time.rs   |  2 +-
 .../test-macros/src/lib.rs                    |  2 +-
 .../test-types/src/lib.rs                     |  2 +-
 .../tests/00_console_sanity.rb                |  2 +-
 .../tests/00_console_sanity.rs                |  2 +-
 .../tests/01_timer_sanity.rs                  |  2 +-
 .../tests/02_exception_sync_page_fault.rs     |  2 +-
 .../tests/03_exception_irq_sanity.rs          |  2 +-
 .../tests/panic_exit_failure/mod.rs           |  2 +-
 .../tests/panic_exit_success/mod.rs           |  2 +-
 .../tests/runner.rb                           |  2 +-
 X1_JTAG_boot/Makefile                         |  2 +-
 X1_JTAG_boot/src/_arch/aarch64/cpu.rs         |  2 +-
 X1_JTAG_boot/src/_arch/aarch64/cpu/smp.rs     |  2 +-
 X1_JTAG_boot/src/_arch/aarch64/time.rs        |  2 +-
 X1_JTAG_boot/src/bsp.rs                       |  2 +-
 X1_JTAG_boot/src/bsp/device_driver.rs         |  2 +-
 X1_JTAG_boot/src/bsp/device_driver/bcm.rs     |  2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  2 +-
 X1_JTAG_boot/src/bsp/device_driver/common.rs  |  2 +-
 X1_JTAG_boot/src/bsp/raspberrypi.rs           |  2 +-
 X1_JTAG_boot/src/bsp/raspberrypi/console.rs   |  2 +-
 X1_JTAG_boot/src/bsp/raspberrypi/cpu.rs       |  2 +-
 X1_JTAG_boot/src/bsp/raspberrypi/driver.rs    |  2 +-
 X1_JTAG_boot/src/bsp/raspberrypi/link.ld      |  2 +-
 X1_JTAG_boot/src/bsp/raspberrypi/memory.rs    |  2 +-
 X1_JTAG_boot/src/console.rs                   |  2 +-
 X1_JTAG_boot/src/cpu.rs                       |  2 +-
 X1_JTAG_boot/src/cpu/smp.rs                   |  2 +-
 X1_JTAG_boot/src/driver.rs                    |  2 +-
 X1_JTAG_boot/src/main.rs                      |  2 +-
 X1_JTAG_boot/src/memory.rs                    |  2 +-
 X1_JTAG_boot/src/panic_wait.rs                |  2 +-
 X1_JTAG_boot/src/print.rs                     |  2 +-
 X1_JTAG_boot/src/runtime_init.rs              |  2 +-
 X1_JTAG_boot/src/synchronization.rs           |  2 +-
 X1_JTAG_boot/src/time.rs                      |  2 +-
 docker/rustembedded-osdev-utils/Dockerfile    |  4 ++--
 docker/rustembedded-osdev-utils/Makefile      |  2 +-
 utils/devtool.rb                              |  2 +-
 utils/devtool/copyright.rb                    |  2 +-
 utils/diff_tut_folders.bash                   |  4 ++--
 utils/minipush.rb                             |  2 +-
 utils/minipush/progressbar_patch.rb           |  2 +-
 utils/miniterm.rb                             |  2 +-
 utils/update_copyright.rb                     | 20 +++++++++++++++++++
 485 files changed, 551 insertions(+), 532 deletions(-)
 create mode 100755 utils/update_copyright.rb

diff --git a/.githooks/pre-commit b/.githooks/pre-commit
index 9696481b9..6636f0075 100755
--- a/.githooks/pre-commit
+++ b/.githooks/pre-commit
@@ -3,7 +3,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 require 'rubygems'
 require 'bundler/setup'
diff --git a/01_wait_forever/Makefile b/01_wait_forever/Makefile
index 1481f8a45..ef6395f1b 100644
--- a/01_wait_forever/Makefile
+++ b/01_wait_forever/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 # Default to the RPi3
 BSP ?= rpi3
diff --git a/01_wait_forever/src/_arch/aarch64/cpu.S b/01_wait_forever/src/_arch/aarch64/cpu.S
index bd80689c7..2de0c61c5 100644
--- a/01_wait_forever/src/_arch/aarch64/cpu.S
+++ b/01_wait_forever/src/_arch/aarch64/cpu.S
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 .section ".text._start"
 
diff --git a/01_wait_forever/src/_arch/aarch64/cpu.rs b/01_wait_forever/src/_arch/aarch64/cpu.rs
index 12837a3b3..6d24fe289 100644
--- a/01_wait_forever/src/_arch/aarch64/cpu.rs
+++ b/01_wait_forever/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 
diff --git a/01_wait_forever/src/bsp.rs b/01_wait_forever/src/bsp.rs
index db48385eb..8f0d27c87 100644
--- a/01_wait_forever/src/bsp.rs
+++ b/01_wait_forever/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional re-exporting of Board Support Packages.
 
diff --git a/01_wait_forever/src/bsp/raspberrypi.rs b/01_wait_forever/src/bsp/raspberrypi.rs
index cdaac7405..e7a4b6af2 100644
--- a/01_wait_forever/src/bsp/raspberrypi.rs
+++ b/01_wait_forever/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/01_wait_forever/src/bsp/raspberrypi/link.ld b/01_wait_forever/src/bsp/raspberrypi/link.ld
index c95db067b..81f01c11d 100644
--- a/01_wait_forever/src/bsp/raspberrypi/link.ld
+++ b/01_wait_forever/src/bsp/raspberrypi/link.ld
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT OR Apache-2.0
  *
- * Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+ * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
 SECTIONS
diff --git a/01_wait_forever/src/cpu.rs b/01_wait_forever/src/cpu.rs
index fd5c9794e..27aea2041 100644
--- a/01_wait_forever/src/cpu.rs
+++ b/01_wait_forever/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/01_wait_forever/src/main.rs b/01_wait_forever/src/main.rs
index 28b68b59f..883453535 100644
--- a/01_wait_forever/src/main.rs
+++ b/01_wait_forever/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/01_wait_forever/src/panic_wait.rs b/01_wait_forever/src/panic_wait.rs
index 1a9bec2a1..2887ed170 100644
--- a/01_wait_forever/src/panic_wait.rs
+++ b/01_wait_forever/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/02_runtime_init/Makefile b/02_runtime_init/Makefile
index 1481f8a45..ef6395f1b 100644
--- a/02_runtime_init/Makefile
+++ b/02_runtime_init/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 # Default to the RPi3
 BSP ?= rpi3
diff --git a/02_runtime_init/README.CN.md b/02_runtime_init/README.CN.md
index eb932091d..1369031d6 100644
--- a/02_runtime_init/README.CN.md
+++ b/02_runtime_init/README.CN.md
@@ -105,7 +105,7 @@ diff -uNr 01_wait_forever/src/memory.rs 02_runtime_init/src/memory.rs
 @@ -0,0 +1,29 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Memory Management.
 +
@@ -139,7 +139,7 @@ diff -uNr 01_wait_forever/src/runtime_init.rs 02_runtime_init/src/runtime_init.r
 @@ -0,0 +1,58 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Rust runtime initialization code.
 +
diff --git a/02_runtime_init/README.md b/02_runtime_init/README.md
index 75a6fa1b8..206424f9e 100644
--- a/02_runtime_init/README.md
+++ b/02_runtime_init/README.md
@@ -123,7 +123,7 @@ diff -uNr 01_wait_forever/src/bsp/raspberrypi/memory.rs 02_runtime_init/src/bsp/
 @@ -0,0 +1,37 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! BSP Memory Management.
 +
@@ -202,7 +202,7 @@ diff -uNr 01_wait_forever/src/memory.rs 02_runtime_init/src/memory.rs
 @@ -0,0 +1,30 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Memory Management.
 +
@@ -234,11 +234,10 @@ diff -uNr 01_wait_forever/src/memory.rs 02_runtime_init/src/memory.rs
 diff -uNr 01_wait_forever/src/panic_wait.rs 02_runtime_init/src/panic_wait.rs
 --- 01_wait_forever/src/panic_wait.rs
 +++ 02_runtime_init/src/panic_wait.rs
-@@ -4,10 +4,10 @@
+@@ -4,9 +4,10 @@
 
  //! A panic handler that infinitely waits.
 
--// use crate::cpu;
 +use crate::cpu;
  use core::panic::PanicInfo;
 
@@ -254,7 +253,7 @@ diff -uNr 01_wait_forever/src/runtime_init.rs 02_runtime_init/src/runtime_init.r
 @@ -0,0 +1,38 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Rust runtime initialization code.
 +
diff --git a/02_runtime_init/src/_arch/aarch64/cpu.S b/02_runtime_init/src/_arch/aarch64/cpu.S
index 3ed5c0613..449cf5027 100644
--- a/02_runtime_init/src/_arch/aarch64/cpu.S
+++ b/02_runtime_init/src/_arch/aarch64/cpu.S
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 .section ".text._start"
 
diff --git a/02_runtime_init/src/_arch/aarch64/cpu.rs b/02_runtime_init/src/_arch/aarch64/cpu.rs
index 1d3e871a6..6ca5986aa 100644
--- a/02_runtime_init/src/_arch/aarch64/cpu.rs
+++ b/02_runtime_init/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 
diff --git a/02_runtime_init/src/bsp.rs b/02_runtime_init/src/bsp.rs
index db48385eb..8f0d27c87 100644
--- a/02_runtime_init/src/bsp.rs
+++ b/02_runtime_init/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional re-exporting of Board Support Packages.
 
diff --git a/02_runtime_init/src/bsp/raspberrypi.rs b/02_runtime_init/src/bsp/raspberrypi.rs
index e4ecbd1d8..f9bd5b888 100644
--- a/02_runtime_init/src/bsp/raspberrypi.rs
+++ b/02_runtime_init/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/02_runtime_init/src/bsp/raspberrypi/link.ld b/02_runtime_init/src/bsp/raspberrypi/link.ld
index c03bb5e54..573abc5f0 100644
--- a/02_runtime_init/src/bsp/raspberrypi/link.ld
+++ b/02_runtime_init/src/bsp/raspberrypi/link.ld
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT OR Apache-2.0
  *
- * Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+ * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
 SECTIONS
diff --git a/02_runtime_init/src/bsp/raspberrypi/memory.rs b/02_runtime_init/src/bsp/raspberrypi/memory.rs
index 25ba9f156..5c6b1ea5b 100644
--- a/02_runtime_init/src/bsp/raspberrypi/memory.rs
+++ b/02_runtime_init/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 
diff --git a/02_runtime_init/src/cpu.rs b/02_runtime_init/src/cpu.rs
index fd5c9794e..27aea2041 100644
--- a/02_runtime_init/src/cpu.rs
+++ b/02_runtime_init/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/02_runtime_init/src/main.rs b/02_runtime_init/src/main.rs
index 336824a16..76e7a772f 100644
--- a/02_runtime_init/src/main.rs
+++ b/02_runtime_init/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/02_runtime_init/src/memory.rs b/02_runtime_init/src/memory.rs
index 827b8b850..1f79e0c95 100644
--- a/02_runtime_init/src/memory.rs
+++ b/02_runtime_init/src/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management.
 
diff --git a/02_runtime_init/src/panic_wait.rs b/02_runtime_init/src/panic_wait.rs
index 560a1724e..a1705688d 100644
--- a/02_runtime_init/src/panic_wait.rs
+++ b/02_runtime_init/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/02_runtime_init/src/runtime_init.rs b/02_runtime_init/src/runtime_init.rs
index 0e3702b47..068dde843 100644
--- a/02_runtime_init/src/runtime_init.rs
+++ b/02_runtime_init/src/runtime_init.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Rust runtime initialization code.
 
diff --git a/03_hacky_hello_world/Makefile b/03_hacky_hello_world/Makefile
index a9b0f82ce..90238d091 100644
--- a/03_hacky_hello_world/Makefile
+++ b/03_hacky_hello_world/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 # Default to the RPi3
 BSP ?= rpi3
diff --git a/03_hacky_hello_world/README.md b/03_hacky_hello_world/README.md
index 4fac48da4..95760f02d 100644
--- a/03_hacky_hello_world/README.md
+++ b/03_hacky_hello_world/README.md
@@ -56,7 +56,7 @@ diff -uNr 02_runtime_init/src/bsp/raspberrypi/console.rs 03_hacky_hello_world/sr
 @@ -0,0 +1,47 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! BSP console facilities.
 +
@@ -118,7 +118,7 @@ diff -uNr 02_runtime_init/src/console.rs 03_hacky_hello_world/src/console.rs
 @@ -0,0 +1,19 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! System console.
 +
@@ -200,7 +200,7 @@ diff -uNr 02_runtime_init/src/print.rs 03_hacky_hello_world/src/print.rs
 @@ -0,0 +1,38 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Printing facilities.
 +
diff --git a/03_hacky_hello_world/src/_arch/aarch64/cpu.S b/03_hacky_hello_world/src/_arch/aarch64/cpu.S
index 3ed5c0613..449cf5027 100644
--- a/03_hacky_hello_world/src/_arch/aarch64/cpu.S
+++ b/03_hacky_hello_world/src/_arch/aarch64/cpu.S
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 .section ".text._start"
 
diff --git a/03_hacky_hello_world/src/_arch/aarch64/cpu.rs b/03_hacky_hello_world/src/_arch/aarch64/cpu.rs
index 1d3e871a6..6ca5986aa 100644
--- a/03_hacky_hello_world/src/_arch/aarch64/cpu.rs
+++ b/03_hacky_hello_world/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 
diff --git a/03_hacky_hello_world/src/bsp.rs b/03_hacky_hello_world/src/bsp.rs
index db48385eb..8f0d27c87 100644
--- a/03_hacky_hello_world/src/bsp.rs
+++ b/03_hacky_hello_world/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional re-exporting of Board Support Packages.
 
diff --git a/03_hacky_hello_world/src/bsp/raspberrypi.rs b/03_hacky_hello_world/src/bsp/raspberrypi.rs
index fba4f0a26..ac9d53e95 100644
--- a/03_hacky_hello_world/src/bsp/raspberrypi.rs
+++ b/03_hacky_hello_world/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/03_hacky_hello_world/src/bsp/raspberrypi/console.rs b/03_hacky_hello_world/src/bsp/raspberrypi/console.rs
index 0b699e62b..fca7042e6 100644
--- a/03_hacky_hello_world/src/bsp/raspberrypi/console.rs
+++ b/03_hacky_hello_world/src/bsp/raspberrypi/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP console facilities.
 
diff --git a/03_hacky_hello_world/src/bsp/raspberrypi/link.ld b/03_hacky_hello_world/src/bsp/raspberrypi/link.ld
index c03bb5e54..573abc5f0 100644
--- a/03_hacky_hello_world/src/bsp/raspberrypi/link.ld
+++ b/03_hacky_hello_world/src/bsp/raspberrypi/link.ld
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT OR Apache-2.0
  *
- * Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+ * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
 SECTIONS
diff --git a/03_hacky_hello_world/src/bsp/raspberrypi/memory.rs b/03_hacky_hello_world/src/bsp/raspberrypi/memory.rs
index 25ba9f156..5c6b1ea5b 100644
--- a/03_hacky_hello_world/src/bsp/raspberrypi/memory.rs
+++ b/03_hacky_hello_world/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 
diff --git a/03_hacky_hello_world/src/console.rs b/03_hacky_hello_world/src/console.rs
index 3a3b638bb..27b79f7dd 100644
--- a/03_hacky_hello_world/src/console.rs
+++ b/03_hacky_hello_world/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/03_hacky_hello_world/src/cpu.rs b/03_hacky_hello_world/src/cpu.rs
index fd5c9794e..27aea2041 100644
--- a/03_hacky_hello_world/src/cpu.rs
+++ b/03_hacky_hello_world/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/03_hacky_hello_world/src/main.rs b/03_hacky_hello_world/src/main.rs
index 8b6f4b252..3a4cf64c4 100644
--- a/03_hacky_hello_world/src/main.rs
+++ b/03_hacky_hello_world/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/03_hacky_hello_world/src/memory.rs b/03_hacky_hello_world/src/memory.rs
index 827b8b850..1f79e0c95 100644
--- a/03_hacky_hello_world/src/memory.rs
+++ b/03_hacky_hello_world/src/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management.
 
diff --git a/03_hacky_hello_world/src/panic_wait.rs b/03_hacky_hello_world/src/panic_wait.rs
index b4d5bc1ae..255eedeeb 100644
--- a/03_hacky_hello_world/src/panic_wait.rs
+++ b/03_hacky_hello_world/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/03_hacky_hello_world/src/print.rs b/03_hacky_hello_world/src/print.rs
index 77ebd8b40..59ec9e8ee 100644
--- a/03_hacky_hello_world/src/print.rs
+++ b/03_hacky_hello_world/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing facilities.
 
diff --git a/03_hacky_hello_world/src/runtime_init.rs b/03_hacky_hello_world/src/runtime_init.rs
index 0e3702b47..068dde843 100644
--- a/03_hacky_hello_world/src/runtime_init.rs
+++ b/03_hacky_hello_world/src/runtime_init.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Rust runtime initialization code.
 
diff --git a/04_zero_overhead_abstraction/Makefile b/04_zero_overhead_abstraction/Makefile
index a9b0f82ce..90238d091 100644
--- a/04_zero_overhead_abstraction/Makefile
+++ b/04_zero_overhead_abstraction/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 # Default to the RPi3
 BSP ?= rpi3
diff --git a/04_zero_overhead_abstraction/README.md b/04_zero_overhead_abstraction/README.md
index ca679c52a..003108219 100644
--- a/04_zero_overhead_abstraction/README.md
+++ b/04_zero_overhead_abstraction/README.md
@@ -29,7 +29,7 @@ diff -uNr 03_hacky_hello_world/src/_arch/aarch64/cpu/smp.rs 04_zero_overhead_abs
 @@ -0,0 +1,22 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Architectural symmetric multiprocessing.
 +
@@ -114,7 +114,7 @@ diff -uNr 03_hacky_hello_world/src/_arch/aarch64/cpu.S 04_zero_overhead_abstract
 @@ -1,21 +0,0 @@
 -// SPDX-License-Identifier: MIT OR Apache-2.0
 -//
--// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 -
 -.section ".text._start"
 -
@@ -140,7 +140,7 @@ diff -uNr 03_hacky_hello_world/src/bsp/raspberrypi/cpu.rs 04_zero_overhead_abstr
 @@ -0,0 +1,12 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! BSP Processor code.
 +
@@ -197,7 +197,7 @@ diff -uNr 03_hacky_hello_world/src/cpu/smp.rs 04_zero_overhead_abstraction/src/c
 @@ -0,0 +1,10 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Symmetric multiprocessing.
 +
diff --git a/04_zero_overhead_abstraction/src/_arch/aarch64/cpu.rs b/04_zero_overhead_abstraction/src/_arch/aarch64/cpu.rs
index 64c5397fb..61a68a18e 100644
--- a/04_zero_overhead_abstraction/src/_arch/aarch64/cpu.rs
+++ b/04_zero_overhead_abstraction/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 
diff --git a/04_zero_overhead_abstraction/src/_arch/aarch64/cpu/smp.rs b/04_zero_overhead_abstraction/src/_arch/aarch64/cpu/smp.rs
index 8429e1d2b..c80f7e780 100644
--- a/04_zero_overhead_abstraction/src/_arch/aarch64/cpu/smp.rs
+++ b/04_zero_overhead_abstraction/src/_arch/aarch64/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
 
diff --git a/04_zero_overhead_abstraction/src/bsp.rs b/04_zero_overhead_abstraction/src/bsp.rs
index db48385eb..8f0d27c87 100644
--- a/04_zero_overhead_abstraction/src/bsp.rs
+++ b/04_zero_overhead_abstraction/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional re-exporting of Board Support Packages.
 
diff --git a/04_zero_overhead_abstraction/src/bsp/raspberrypi.rs b/04_zero_overhead_abstraction/src/bsp/raspberrypi.rs
index 0ad1b2aed..fdb7551a1 100644
--- a/04_zero_overhead_abstraction/src/bsp/raspberrypi.rs
+++ b/04_zero_overhead_abstraction/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/04_zero_overhead_abstraction/src/bsp/raspberrypi/console.rs b/04_zero_overhead_abstraction/src/bsp/raspberrypi/console.rs
index 0b699e62b..fca7042e6 100644
--- a/04_zero_overhead_abstraction/src/bsp/raspberrypi/console.rs
+++ b/04_zero_overhead_abstraction/src/bsp/raspberrypi/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP console facilities.
 
diff --git a/04_zero_overhead_abstraction/src/bsp/raspberrypi/cpu.rs b/04_zero_overhead_abstraction/src/bsp/raspberrypi/cpu.rs
index 8410a9615..3951618d7 100644
--- a/04_zero_overhead_abstraction/src/bsp/raspberrypi/cpu.rs
+++ b/04_zero_overhead_abstraction/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/04_zero_overhead_abstraction/src/bsp/raspberrypi/link.ld b/04_zero_overhead_abstraction/src/bsp/raspberrypi/link.ld
index c03bb5e54..573abc5f0 100644
--- a/04_zero_overhead_abstraction/src/bsp/raspberrypi/link.ld
+++ b/04_zero_overhead_abstraction/src/bsp/raspberrypi/link.ld
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT OR Apache-2.0
  *
- * Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+ * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
 SECTIONS
diff --git a/04_zero_overhead_abstraction/src/bsp/raspberrypi/memory.rs b/04_zero_overhead_abstraction/src/bsp/raspberrypi/memory.rs
index 51cc958ad..77fdafd7a 100644
--- a/04_zero_overhead_abstraction/src/bsp/raspberrypi/memory.rs
+++ b/04_zero_overhead_abstraction/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 
diff --git a/04_zero_overhead_abstraction/src/console.rs b/04_zero_overhead_abstraction/src/console.rs
index 3a3b638bb..27b79f7dd 100644
--- a/04_zero_overhead_abstraction/src/console.rs
+++ b/04_zero_overhead_abstraction/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/04_zero_overhead_abstraction/src/cpu.rs b/04_zero_overhead_abstraction/src/cpu.rs
index 9c67c0e7d..c9e5af72c 100644
--- a/04_zero_overhead_abstraction/src/cpu.rs
+++ b/04_zero_overhead_abstraction/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/04_zero_overhead_abstraction/src/cpu/smp.rs b/04_zero_overhead_abstraction/src/cpu/smp.rs
index b1428884d..90ecbdf30 100644
--- a/04_zero_overhead_abstraction/src/cpu/smp.rs
+++ b/04_zero_overhead_abstraction/src/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Symmetric multiprocessing.
 
diff --git a/04_zero_overhead_abstraction/src/main.rs b/04_zero_overhead_abstraction/src/main.rs
index da1a257da..22e179229 100644
--- a/04_zero_overhead_abstraction/src/main.rs
+++ b/04_zero_overhead_abstraction/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/04_zero_overhead_abstraction/src/memory.rs b/04_zero_overhead_abstraction/src/memory.rs
index 827b8b850..1f79e0c95 100644
--- a/04_zero_overhead_abstraction/src/memory.rs
+++ b/04_zero_overhead_abstraction/src/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management.
 
diff --git a/04_zero_overhead_abstraction/src/panic_wait.rs b/04_zero_overhead_abstraction/src/panic_wait.rs
index b4d5bc1ae..255eedeeb 100644
--- a/04_zero_overhead_abstraction/src/panic_wait.rs
+++ b/04_zero_overhead_abstraction/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/04_zero_overhead_abstraction/src/print.rs b/04_zero_overhead_abstraction/src/print.rs
index 77ebd8b40..59ec9e8ee 100644
--- a/04_zero_overhead_abstraction/src/print.rs
+++ b/04_zero_overhead_abstraction/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing facilities.
 
diff --git a/04_zero_overhead_abstraction/src/runtime_init.rs b/04_zero_overhead_abstraction/src/runtime_init.rs
index 9de285958..ee0946863 100644
--- a/04_zero_overhead_abstraction/src/runtime_init.rs
+++ b/04_zero_overhead_abstraction/src/runtime_init.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Rust runtime initialization code.
 
diff --git a/05_safe_globals/Makefile b/05_safe_globals/Makefile
index a9b0f82ce..90238d091 100644
--- a/05_safe_globals/Makefile
+++ b/05_safe_globals/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 # Default to the RPi3
 BSP ?= rpi3
diff --git a/05_safe_globals/README.md b/05_safe_globals/README.md
index 1cbe90b8e..a66e7f2b4 100644
--- a/05_safe_globals/README.md
+++ b/05_safe_globals/README.md
@@ -253,7 +253,7 @@ diff -uNr 04_zero_overhead_abstraction/src/synchronization.rs 05_safe_globals/sr
 @@ -0,0 +1,76 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Synchronization primitives.
 +//!
diff --git a/05_safe_globals/src/_arch/aarch64/cpu.rs b/05_safe_globals/src/_arch/aarch64/cpu.rs
index 64c5397fb..61a68a18e 100644
--- a/05_safe_globals/src/_arch/aarch64/cpu.rs
+++ b/05_safe_globals/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 
diff --git a/05_safe_globals/src/_arch/aarch64/cpu/smp.rs b/05_safe_globals/src/_arch/aarch64/cpu/smp.rs
index 8429e1d2b..c80f7e780 100644
--- a/05_safe_globals/src/_arch/aarch64/cpu/smp.rs
+++ b/05_safe_globals/src/_arch/aarch64/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
 
diff --git a/05_safe_globals/src/bsp.rs b/05_safe_globals/src/bsp.rs
index db48385eb..8f0d27c87 100644
--- a/05_safe_globals/src/bsp.rs
+++ b/05_safe_globals/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional re-exporting of Board Support Packages.
 
diff --git a/05_safe_globals/src/bsp/raspberrypi.rs b/05_safe_globals/src/bsp/raspberrypi.rs
index 0ad1b2aed..fdb7551a1 100644
--- a/05_safe_globals/src/bsp/raspberrypi.rs
+++ b/05_safe_globals/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/05_safe_globals/src/bsp/raspberrypi/console.rs b/05_safe_globals/src/bsp/raspberrypi/console.rs
index 074f4fa17..f340d940f 100644
--- a/05_safe_globals/src/bsp/raspberrypi/console.rs
+++ b/05_safe_globals/src/bsp/raspberrypi/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP console facilities.
 
diff --git a/05_safe_globals/src/bsp/raspberrypi/cpu.rs b/05_safe_globals/src/bsp/raspberrypi/cpu.rs
index 8410a9615..3951618d7 100644
--- a/05_safe_globals/src/bsp/raspberrypi/cpu.rs
+++ b/05_safe_globals/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/05_safe_globals/src/bsp/raspberrypi/link.ld b/05_safe_globals/src/bsp/raspberrypi/link.ld
index c03bb5e54..573abc5f0 100644
--- a/05_safe_globals/src/bsp/raspberrypi/link.ld
+++ b/05_safe_globals/src/bsp/raspberrypi/link.ld
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT OR Apache-2.0
  *
- * Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+ * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
 SECTIONS
diff --git a/05_safe_globals/src/bsp/raspberrypi/memory.rs b/05_safe_globals/src/bsp/raspberrypi/memory.rs
index 51cc958ad..77fdafd7a 100644
--- a/05_safe_globals/src/bsp/raspberrypi/memory.rs
+++ b/05_safe_globals/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 
diff --git a/05_safe_globals/src/console.rs b/05_safe_globals/src/console.rs
index 12b31c636..658cf66df 100644
--- a/05_safe_globals/src/console.rs
+++ b/05_safe_globals/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/05_safe_globals/src/cpu.rs b/05_safe_globals/src/cpu.rs
index 9c67c0e7d..c9e5af72c 100644
--- a/05_safe_globals/src/cpu.rs
+++ b/05_safe_globals/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/05_safe_globals/src/cpu/smp.rs b/05_safe_globals/src/cpu/smp.rs
index b1428884d..90ecbdf30 100644
--- a/05_safe_globals/src/cpu/smp.rs
+++ b/05_safe_globals/src/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Symmetric multiprocessing.
 
diff --git a/05_safe_globals/src/main.rs b/05_safe_globals/src/main.rs
index 6a57de237..2c29444fd 100644
--- a/05_safe_globals/src/main.rs
+++ b/05_safe_globals/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/05_safe_globals/src/memory.rs b/05_safe_globals/src/memory.rs
index 827b8b850..1f79e0c95 100644
--- a/05_safe_globals/src/memory.rs
+++ b/05_safe_globals/src/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management.
 
diff --git a/05_safe_globals/src/panic_wait.rs b/05_safe_globals/src/panic_wait.rs
index b4d5bc1ae..255eedeeb 100644
--- a/05_safe_globals/src/panic_wait.rs
+++ b/05_safe_globals/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/05_safe_globals/src/print.rs b/05_safe_globals/src/print.rs
index 77ebd8b40..59ec9e8ee 100644
--- a/05_safe_globals/src/print.rs
+++ b/05_safe_globals/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing facilities.
 
diff --git a/05_safe_globals/src/runtime_init.rs b/05_safe_globals/src/runtime_init.rs
index 9de285958..ee0946863 100644
--- a/05_safe_globals/src/runtime_init.rs
+++ b/05_safe_globals/src/runtime_init.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Rust runtime initialization code.
 
diff --git a/05_safe_globals/src/synchronization.rs b/05_safe_globals/src/synchronization.rs
index 6de32807c..f956b5cdd 100644
--- a/05_safe_globals/src/synchronization.rs
+++ b/05_safe_globals/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/06_drivers_gpio_uart/Makefile b/06_drivers_gpio_uart/Makefile
index 06c268de7..0fde2eb8d 100644
--- a/06_drivers_gpio_uart/Makefile
+++ b/06_drivers_gpio_uart/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 # Default to the RPi3
 BSP ?= rpi3
diff --git a/06_drivers_gpio_uart/README.md b/06_drivers_gpio_uart/README.md
index e3d502b60..33df63e87 100644
--- a/06_drivers_gpio_uart/README.md
+++ b/06_drivers_gpio_uart/README.md
@@ -210,7 +210,7 @@ diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 06_drivers_g
 @@ -0,0 +1,221 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! GPIO Driver.
 +
@@ -436,7 +436,7 @@ diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 06_dri
 @@ -0,0 +1,305 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! PL011 UART driver.
 +
@@ -746,7 +746,7 @@ diff -uNr 05_safe_globals/src/bsp/device_driver/bcm.rs 06_drivers_gpio_uart/src/
 @@ -0,0 +1,11 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! BCM driver top level.
 +
@@ -762,7 +762,7 @@ diff -uNr 05_safe_globals/src/bsp/device_driver/common.rs 06_drivers_gpio_uart/s
 @@ -0,0 +1,38 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Common device driver code.
 +
@@ -805,7 +805,7 @@ diff -uNr 05_safe_globals/src/bsp/device_driver.rs 06_drivers_gpio_uart/src/bsp/
 @@ -0,0 +1,12 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Device driver.
 +
@@ -958,7 +958,7 @@ diff -uNr 05_safe_globals/src/bsp/raspberrypi/driver.rs 06_drivers_gpio_uart/src
 @@ -0,0 +1,49 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! BSP driver support.
 +
@@ -1137,7 +1137,7 @@ diff -uNr 05_safe_globals/src/driver.rs 06_drivers_gpio_uart/src/driver.rs
 @@ -0,0 +1,44 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Driver support.
 +
diff --git a/06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs b/06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
index 1d5190ee1..0f545a008 100644
--- a/06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
+++ b/06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 
diff --git a/06_drivers_gpio_uart/src/_arch/aarch64/cpu/smp.rs b/06_drivers_gpio_uart/src/_arch/aarch64/cpu/smp.rs
index 8429e1d2b..c80f7e780 100644
--- a/06_drivers_gpio_uart/src/_arch/aarch64/cpu/smp.rs
+++ b/06_drivers_gpio_uart/src/_arch/aarch64/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
 
diff --git a/06_drivers_gpio_uart/src/bsp.rs b/06_drivers_gpio_uart/src/bsp.rs
index 3a5657ade..257502491 100644
--- a/06_drivers_gpio_uart/src/bsp.rs
+++ b/06_drivers_gpio_uart/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional re-exporting of Board Support Packages.
 
diff --git a/06_drivers_gpio_uart/src/bsp/device_driver.rs b/06_drivers_gpio_uart/src/bsp/device_driver.rs
index ce7396f22..2fcbc83e7 100644
--- a/06_drivers_gpio_uart/src/bsp/device_driver.rs
+++ b/06_drivers_gpio_uart/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/06_drivers_gpio_uart/src/bsp/device_driver/bcm.rs b/06_drivers_gpio_uart/src/bsp/device_driver/bcm.rs
index 59071d5d8..77613d261 100644
--- a/06_drivers_gpio_uart/src/bsp/device_driver/bcm.rs
+++ b/06_drivers_gpio_uart/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index f5abbee8a..771151e76 100644
--- a/06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index f17a51ece..de0bf813b 100644
--- a/06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 
diff --git a/06_drivers_gpio_uart/src/bsp/device_driver/common.rs b/06_drivers_gpio_uart/src/bsp/device_driver/common.rs
index cd2c07601..41553b7a5 100644
--- a/06_drivers_gpio_uart/src/bsp/device_driver/common.rs
+++ b/06_drivers_gpio_uart/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/06_drivers_gpio_uart/src/bsp/raspberrypi.rs b/06_drivers_gpio_uart/src/bsp/raspberrypi.rs
index 10888d37f..c0b639c97 100644
--- a/06_drivers_gpio_uart/src/bsp/raspberrypi.rs
+++ b/06_drivers_gpio_uart/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/06_drivers_gpio_uart/src/bsp/raspberrypi/console.rs b/06_drivers_gpio_uart/src/bsp/raspberrypi/console.rs
index d1b60dd82..c6bb5263c 100644
--- a/06_drivers_gpio_uart/src/bsp/raspberrypi/console.rs
+++ b/06_drivers_gpio_uart/src/bsp/raspberrypi/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP console facilities.
 
diff --git a/06_drivers_gpio_uart/src/bsp/raspberrypi/cpu.rs b/06_drivers_gpio_uart/src/bsp/raspberrypi/cpu.rs
index 8410a9615..3951618d7 100644
--- a/06_drivers_gpio_uart/src/bsp/raspberrypi/cpu.rs
+++ b/06_drivers_gpio_uart/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/06_drivers_gpio_uart/src/bsp/raspberrypi/driver.rs b/06_drivers_gpio_uart/src/bsp/raspberrypi/driver.rs
index fe24dd71b..ab910185c 100644
--- a/06_drivers_gpio_uart/src/bsp/raspberrypi/driver.rs
+++ b/06_drivers_gpio_uart/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/06_drivers_gpio_uart/src/bsp/raspberrypi/link.ld b/06_drivers_gpio_uart/src/bsp/raspberrypi/link.ld
index c03bb5e54..573abc5f0 100644
--- a/06_drivers_gpio_uart/src/bsp/raspberrypi/link.ld
+++ b/06_drivers_gpio_uart/src/bsp/raspberrypi/link.ld
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT OR Apache-2.0
  *
- * Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+ * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
 SECTIONS
diff --git a/06_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs b/06_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
index fae051257..fb47b1418 100644
--- a/06_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
+++ b/06_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 
diff --git a/06_drivers_gpio_uart/src/console.rs b/06_drivers_gpio_uart/src/console.rs
index 2644e12c2..0a2385947 100644
--- a/06_drivers_gpio_uart/src/console.rs
+++ b/06_drivers_gpio_uart/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/06_drivers_gpio_uart/src/cpu.rs b/06_drivers_gpio_uart/src/cpu.rs
index 9c67c0e7d..c9e5af72c 100644
--- a/06_drivers_gpio_uart/src/cpu.rs
+++ b/06_drivers_gpio_uart/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/06_drivers_gpio_uart/src/cpu/smp.rs b/06_drivers_gpio_uart/src/cpu/smp.rs
index b1428884d..90ecbdf30 100644
--- a/06_drivers_gpio_uart/src/cpu/smp.rs
+++ b/06_drivers_gpio_uart/src/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Symmetric multiprocessing.
 
diff --git a/06_drivers_gpio_uart/src/driver.rs b/06_drivers_gpio_uart/src/driver.rs
index e2875b876..6e8c5533a 100644
--- a/06_drivers_gpio_uart/src/driver.rs
+++ b/06_drivers_gpio_uart/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/06_drivers_gpio_uart/src/main.rs b/06_drivers_gpio_uart/src/main.rs
index 9e58e80b7..c45f7f785 100644
--- a/06_drivers_gpio_uart/src/main.rs
+++ b/06_drivers_gpio_uart/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/06_drivers_gpio_uart/src/memory.rs b/06_drivers_gpio_uart/src/memory.rs
index 827b8b850..1f79e0c95 100644
--- a/06_drivers_gpio_uart/src/memory.rs
+++ b/06_drivers_gpio_uart/src/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management.
 
diff --git a/06_drivers_gpio_uart/src/panic_wait.rs b/06_drivers_gpio_uart/src/panic_wait.rs
index 1386e1e23..7980f5de5 100644
--- a/06_drivers_gpio_uart/src/panic_wait.rs
+++ b/06_drivers_gpio_uart/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/06_drivers_gpio_uart/src/print.rs b/06_drivers_gpio_uart/src/print.rs
index 77ebd8b40..59ec9e8ee 100644
--- a/06_drivers_gpio_uart/src/print.rs
+++ b/06_drivers_gpio_uart/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing facilities.
 
diff --git a/06_drivers_gpio_uart/src/runtime_init.rs b/06_drivers_gpio_uart/src/runtime_init.rs
index 9de285958..ee0946863 100644
--- a/06_drivers_gpio_uart/src/runtime_init.rs
+++ b/06_drivers_gpio_uart/src/runtime_init.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Rust runtime initialization code.
 
diff --git a/06_drivers_gpio_uart/src/synchronization.rs b/06_drivers_gpio_uart/src/synchronization.rs
index 6de32807c..f956b5cdd 100644
--- a/06_drivers_gpio_uart/src/synchronization.rs
+++ b/06_drivers_gpio_uart/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/07_uart_chainloader/Makefile b/07_uart_chainloader/Makefile
index 884a29f73..1fc61b6b2 100644
--- a/07_uart_chainloader/Makefile
+++ b/07_uart_chainloader/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 # Default to the RPi3
 BSP ?= rpi3
diff --git a/07_uart_chainloader/README.md b/07_uart_chainloader/README.md
index 8872bc18c..1491c84b8 100644
--- a/07_uart_chainloader/README.md
+++ b/07_uart_chainloader/README.md
@@ -512,7 +512,7 @@ diff -uNr 06_drivers_gpio_uart/src/relocate.rs 07_uart_chainloader/src/relocate.
 @@ -0,0 +1,51 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Relocation code.
 +
diff --git a/07_uart_chainloader/src/_arch/aarch64/cpu.rs b/07_uart_chainloader/src/_arch/aarch64/cpu.rs
index bd974d4d5..ccafe9ff6 100644
--- a/07_uart_chainloader/src/_arch/aarch64/cpu.rs
+++ b/07_uart_chainloader/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 
diff --git a/07_uart_chainloader/src/_arch/aarch64/cpu/smp.rs b/07_uart_chainloader/src/_arch/aarch64/cpu/smp.rs
index 8429e1d2b..c80f7e780 100644
--- a/07_uart_chainloader/src/_arch/aarch64/cpu/smp.rs
+++ b/07_uart_chainloader/src/_arch/aarch64/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
 
diff --git a/07_uart_chainloader/src/bsp.rs b/07_uart_chainloader/src/bsp.rs
index 3a5657ade..257502491 100644
--- a/07_uart_chainloader/src/bsp.rs
+++ b/07_uart_chainloader/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional re-exporting of Board Support Packages.
 
diff --git a/07_uart_chainloader/src/bsp/device_driver.rs b/07_uart_chainloader/src/bsp/device_driver.rs
index ce7396f22..2fcbc83e7 100644
--- a/07_uart_chainloader/src/bsp/device_driver.rs
+++ b/07_uart_chainloader/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/07_uart_chainloader/src/bsp/device_driver/bcm.rs b/07_uart_chainloader/src/bsp/device_driver/bcm.rs
index 59071d5d8..77613d261 100644
--- a/07_uart_chainloader/src/bsp/device_driver/bcm.rs
+++ b/07_uart_chainloader/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index f5abbee8a..771151e76 100644
--- a/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index a17d63ee7..1eb98fc4f 100644
--- a/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 
diff --git a/07_uart_chainloader/src/bsp/device_driver/common.rs b/07_uart_chainloader/src/bsp/device_driver/common.rs
index cd2c07601..41553b7a5 100644
--- a/07_uart_chainloader/src/bsp/device_driver/common.rs
+++ b/07_uart_chainloader/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/07_uart_chainloader/src/bsp/raspberrypi.rs b/07_uart_chainloader/src/bsp/raspberrypi.rs
index 10888d37f..c0b639c97 100644
--- a/07_uart_chainloader/src/bsp/raspberrypi.rs
+++ b/07_uart_chainloader/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/07_uart_chainloader/src/bsp/raspberrypi/console.rs b/07_uart_chainloader/src/bsp/raspberrypi/console.rs
index d1b60dd82..c6bb5263c 100644
--- a/07_uart_chainloader/src/bsp/raspberrypi/console.rs
+++ b/07_uart_chainloader/src/bsp/raspberrypi/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP console facilities.
 
diff --git a/07_uart_chainloader/src/bsp/raspberrypi/cpu.rs b/07_uart_chainloader/src/bsp/raspberrypi/cpu.rs
index 8410a9615..3951618d7 100644
--- a/07_uart_chainloader/src/bsp/raspberrypi/cpu.rs
+++ b/07_uart_chainloader/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/07_uart_chainloader/src/bsp/raspberrypi/driver.rs b/07_uart_chainloader/src/bsp/raspberrypi/driver.rs
index fe24dd71b..ab910185c 100644
--- a/07_uart_chainloader/src/bsp/raspberrypi/driver.rs
+++ b/07_uart_chainloader/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/07_uart_chainloader/src/bsp/raspberrypi/link.ld b/07_uart_chainloader/src/bsp/raspberrypi/link.ld
index a6dc653ab..721856cbc 100644
--- a/07_uart_chainloader/src/bsp/raspberrypi/link.ld
+++ b/07_uart_chainloader/src/bsp/raspberrypi/link.ld
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT OR Apache-2.0
  *
- * Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+ * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
 SECTIONS
diff --git a/07_uart_chainloader/src/bsp/raspberrypi/memory.rs b/07_uart_chainloader/src/bsp/raspberrypi/memory.rs
index 0af09903d..4b2642e36 100644
--- a/07_uart_chainloader/src/bsp/raspberrypi/memory.rs
+++ b/07_uart_chainloader/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 
diff --git a/07_uart_chainloader/src/console.rs b/07_uart_chainloader/src/console.rs
index e6323a20d..2d38cc1d1 100644
--- a/07_uart_chainloader/src/console.rs
+++ b/07_uart_chainloader/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/07_uart_chainloader/src/cpu.rs b/07_uart_chainloader/src/cpu.rs
index 9c67c0e7d..c9e5af72c 100644
--- a/07_uart_chainloader/src/cpu.rs
+++ b/07_uart_chainloader/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/07_uart_chainloader/src/cpu/smp.rs b/07_uart_chainloader/src/cpu/smp.rs
index b1428884d..90ecbdf30 100644
--- a/07_uart_chainloader/src/cpu/smp.rs
+++ b/07_uart_chainloader/src/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Symmetric multiprocessing.
 
diff --git a/07_uart_chainloader/src/driver.rs b/07_uart_chainloader/src/driver.rs
index e2875b876..6e8c5533a 100644
--- a/07_uart_chainloader/src/driver.rs
+++ b/07_uart_chainloader/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/07_uart_chainloader/src/main.rs b/07_uart_chainloader/src/main.rs
index 6640c754b..e71ab16cd 100644
--- a/07_uart_chainloader/src/main.rs
+++ b/07_uart_chainloader/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/07_uart_chainloader/src/memory.rs b/07_uart_chainloader/src/memory.rs
index 827b8b850..1f79e0c95 100644
--- a/07_uart_chainloader/src/memory.rs
+++ b/07_uart_chainloader/src/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management.
 
diff --git a/07_uart_chainloader/src/panic_wait.rs b/07_uart_chainloader/src/panic_wait.rs
index 1386e1e23..7980f5de5 100644
--- a/07_uart_chainloader/src/panic_wait.rs
+++ b/07_uart_chainloader/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/07_uart_chainloader/src/print.rs b/07_uart_chainloader/src/print.rs
index 77ebd8b40..59ec9e8ee 100644
--- a/07_uart_chainloader/src/print.rs
+++ b/07_uart_chainloader/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing facilities.
 
diff --git a/07_uart_chainloader/src/relocate.rs b/07_uart_chainloader/src/relocate.rs
index bbedfa475..85ddab672 100644
--- a/07_uart_chainloader/src/relocate.rs
+++ b/07_uart_chainloader/src/relocate.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Relocation code.
 
diff --git a/07_uart_chainloader/src/runtime_init.rs b/07_uart_chainloader/src/runtime_init.rs
index 8ed768d4e..5e9b74974 100644
--- a/07_uart_chainloader/src/runtime_init.rs
+++ b/07_uart_chainloader/src/runtime_init.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Rust runtime initialization code.
 
diff --git a/07_uart_chainloader/src/synchronization.rs b/07_uart_chainloader/src/synchronization.rs
index 6de32807c..f956b5cdd 100644
--- a/07_uart_chainloader/src/synchronization.rs
+++ b/07_uart_chainloader/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/08_timestamps/Makefile b/08_timestamps/Makefile
index 2f04337ed..071167b9e 100644
--- a/08_timestamps/Makefile
+++ b/08_timestamps/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 # Default to the RPi3
 BSP ?= rpi3
diff --git a/08_timestamps/README.md b/08_timestamps/README.md
index 9ec2e42fc..cf3173bdc 100644
--- a/08_timestamps/README.md
+++ b/08_timestamps/README.md
@@ -173,7 +173,7 @@ diff -uNr 07_uart_chainloader/src/_arch/aarch64/time.rs 08_timestamps/src/_arch/
 @@ -0,0 +1,98 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Architectural timer primitives.
 +
@@ -643,7 +643,7 @@ diff -uNr 07_uart_chainloader/src/relocate.rs 08_timestamps/src/relocate.rs
 @@ -1,51 +0,0 @@
 -// SPDX-License-Identifier: MIT OR Apache-2.0
 -//
--// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 -
 -//! Relocation code.
 -
@@ -720,7 +720,7 @@ diff -uNr 07_uart_chainloader/src/time.rs 08_timestamps/src/time.rs
 @@ -0,0 +1,35 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Timer primitives.
 +
diff --git a/08_timestamps/src/_arch/aarch64/cpu.rs b/08_timestamps/src/_arch/aarch64/cpu.rs
index eac29d8d7..6072751db 100644
--- a/08_timestamps/src/_arch/aarch64/cpu.rs
+++ b/08_timestamps/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 
diff --git a/08_timestamps/src/_arch/aarch64/cpu/smp.rs b/08_timestamps/src/_arch/aarch64/cpu/smp.rs
index 8429e1d2b..c80f7e780 100644
--- a/08_timestamps/src/_arch/aarch64/cpu/smp.rs
+++ b/08_timestamps/src/_arch/aarch64/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
 
diff --git a/08_timestamps/src/_arch/aarch64/time.rs b/08_timestamps/src/_arch/aarch64/time.rs
index af98ddd01..7f1bc6963 100644
--- a/08_timestamps/src/_arch/aarch64/time.rs
+++ b/08_timestamps/src/_arch/aarch64/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
 
diff --git a/08_timestamps/src/bsp.rs b/08_timestamps/src/bsp.rs
index 3a5657ade..257502491 100644
--- a/08_timestamps/src/bsp.rs
+++ b/08_timestamps/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional re-exporting of Board Support Packages.
 
diff --git a/08_timestamps/src/bsp/device_driver.rs b/08_timestamps/src/bsp/device_driver.rs
index ce7396f22..2fcbc83e7 100644
--- a/08_timestamps/src/bsp/device_driver.rs
+++ b/08_timestamps/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/08_timestamps/src/bsp/device_driver/bcm.rs b/08_timestamps/src/bsp/device_driver/bcm.rs
index 59071d5d8..77613d261 100644
--- a/08_timestamps/src/bsp/device_driver/bcm.rs
+++ b/08_timestamps/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 15bd3b78b..41d8b861c 100644
--- a/08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index e39bc7cdb..66b734638 100644
--- a/08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 
diff --git a/08_timestamps/src/bsp/device_driver/common.rs b/08_timestamps/src/bsp/device_driver/common.rs
index cd2c07601..41553b7a5 100644
--- a/08_timestamps/src/bsp/device_driver/common.rs
+++ b/08_timestamps/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/08_timestamps/src/bsp/raspberrypi.rs b/08_timestamps/src/bsp/raspberrypi.rs
index 10888d37f..c0b639c97 100644
--- a/08_timestamps/src/bsp/raspberrypi.rs
+++ b/08_timestamps/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/08_timestamps/src/bsp/raspberrypi/console.rs b/08_timestamps/src/bsp/raspberrypi/console.rs
index d1b60dd82..c6bb5263c 100644
--- a/08_timestamps/src/bsp/raspberrypi/console.rs
+++ b/08_timestamps/src/bsp/raspberrypi/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP console facilities.
 
diff --git a/08_timestamps/src/bsp/raspberrypi/cpu.rs b/08_timestamps/src/bsp/raspberrypi/cpu.rs
index 8410a9615..3951618d7 100644
--- a/08_timestamps/src/bsp/raspberrypi/cpu.rs
+++ b/08_timestamps/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/08_timestamps/src/bsp/raspberrypi/driver.rs b/08_timestamps/src/bsp/raspberrypi/driver.rs
index fe24dd71b..ab910185c 100644
--- a/08_timestamps/src/bsp/raspberrypi/driver.rs
+++ b/08_timestamps/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/08_timestamps/src/bsp/raspberrypi/link.ld b/08_timestamps/src/bsp/raspberrypi/link.ld
index c03bb5e54..573abc5f0 100644
--- a/08_timestamps/src/bsp/raspberrypi/link.ld
+++ b/08_timestamps/src/bsp/raspberrypi/link.ld
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT OR Apache-2.0
  *
- * Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+ * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
 SECTIONS
diff --git a/08_timestamps/src/bsp/raspberrypi/memory.rs b/08_timestamps/src/bsp/raspberrypi/memory.rs
index fae051257..fb47b1418 100644
--- a/08_timestamps/src/bsp/raspberrypi/memory.rs
+++ b/08_timestamps/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 
diff --git a/08_timestamps/src/console.rs b/08_timestamps/src/console.rs
index e6323a20d..2d38cc1d1 100644
--- a/08_timestamps/src/console.rs
+++ b/08_timestamps/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/08_timestamps/src/cpu.rs b/08_timestamps/src/cpu.rs
index 9c67c0e7d..c9e5af72c 100644
--- a/08_timestamps/src/cpu.rs
+++ b/08_timestamps/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/08_timestamps/src/cpu/smp.rs b/08_timestamps/src/cpu/smp.rs
index b1428884d..90ecbdf30 100644
--- a/08_timestamps/src/cpu/smp.rs
+++ b/08_timestamps/src/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Symmetric multiprocessing.
 
diff --git a/08_timestamps/src/driver.rs b/08_timestamps/src/driver.rs
index e2875b876..6e8c5533a 100644
--- a/08_timestamps/src/driver.rs
+++ b/08_timestamps/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/08_timestamps/src/main.rs b/08_timestamps/src/main.rs
index 2c9f1fb7f..4dad25714 100644
--- a/08_timestamps/src/main.rs
+++ b/08_timestamps/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/08_timestamps/src/memory.rs b/08_timestamps/src/memory.rs
index 827b8b850..1f79e0c95 100644
--- a/08_timestamps/src/memory.rs
+++ b/08_timestamps/src/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management.
 
diff --git a/08_timestamps/src/panic_wait.rs b/08_timestamps/src/panic_wait.rs
index 1386e1e23..7980f5de5 100644
--- a/08_timestamps/src/panic_wait.rs
+++ b/08_timestamps/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/08_timestamps/src/print.rs b/08_timestamps/src/print.rs
index 8b6f3f988..1ea96b6ad 100644
--- a/08_timestamps/src/print.rs
+++ b/08_timestamps/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing facilities.
 
diff --git a/08_timestamps/src/runtime_init.rs b/08_timestamps/src/runtime_init.rs
index 9de285958..ee0946863 100644
--- a/08_timestamps/src/runtime_init.rs
+++ b/08_timestamps/src/runtime_init.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Rust runtime initialization code.
 
diff --git a/08_timestamps/src/synchronization.rs b/08_timestamps/src/synchronization.rs
index 6de32807c..f956b5cdd 100644
--- a/08_timestamps/src/synchronization.rs
+++ b/08_timestamps/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/08_timestamps/src/time.rs b/08_timestamps/src/time.rs
index cd3ceec33..4f2f4e38f 100644
--- a/08_timestamps/src/time.rs
+++ b/08_timestamps/src/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer primitives.
 
diff --git a/09_hw_debug_JTAG/Makefile b/09_hw_debug_JTAG/Makefile
index 5f49b1af5..9254018cf 100644
--- a/09_hw_debug_JTAG/Makefile
+++ b/09_hw_debug_JTAG/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 # Default to the RPi3
 BSP ?= rpi3
diff --git a/09_hw_debug_JTAG/src/_arch/aarch64/cpu.rs b/09_hw_debug_JTAG/src/_arch/aarch64/cpu.rs
index eac29d8d7..6072751db 100644
--- a/09_hw_debug_JTAG/src/_arch/aarch64/cpu.rs
+++ b/09_hw_debug_JTAG/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 
diff --git a/09_hw_debug_JTAG/src/_arch/aarch64/cpu/smp.rs b/09_hw_debug_JTAG/src/_arch/aarch64/cpu/smp.rs
index 8429e1d2b..c80f7e780 100644
--- a/09_hw_debug_JTAG/src/_arch/aarch64/cpu/smp.rs
+++ b/09_hw_debug_JTAG/src/_arch/aarch64/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
 
diff --git a/09_hw_debug_JTAG/src/_arch/aarch64/time.rs b/09_hw_debug_JTAG/src/_arch/aarch64/time.rs
index af98ddd01..7f1bc6963 100644
--- a/09_hw_debug_JTAG/src/_arch/aarch64/time.rs
+++ b/09_hw_debug_JTAG/src/_arch/aarch64/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
 
diff --git a/09_hw_debug_JTAG/src/bsp.rs b/09_hw_debug_JTAG/src/bsp.rs
index 3a5657ade..257502491 100644
--- a/09_hw_debug_JTAG/src/bsp.rs
+++ b/09_hw_debug_JTAG/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional re-exporting of Board Support Packages.
 
diff --git a/09_hw_debug_JTAG/src/bsp/device_driver.rs b/09_hw_debug_JTAG/src/bsp/device_driver.rs
index ce7396f22..2fcbc83e7 100644
--- a/09_hw_debug_JTAG/src/bsp/device_driver.rs
+++ b/09_hw_debug_JTAG/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/09_hw_debug_JTAG/src/bsp/device_driver/bcm.rs b/09_hw_debug_JTAG/src/bsp/device_driver/bcm.rs
index 59071d5d8..77613d261 100644
--- a/09_hw_debug_JTAG/src/bsp/device_driver/bcm.rs
+++ b/09_hw_debug_JTAG/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 15bd3b78b..41d8b861c 100644
--- a/09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index e39bc7cdb..66b734638 100644
--- a/09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 
diff --git a/09_hw_debug_JTAG/src/bsp/device_driver/common.rs b/09_hw_debug_JTAG/src/bsp/device_driver/common.rs
index cd2c07601..41553b7a5 100644
--- a/09_hw_debug_JTAG/src/bsp/device_driver/common.rs
+++ b/09_hw_debug_JTAG/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/09_hw_debug_JTAG/src/bsp/raspberrypi.rs b/09_hw_debug_JTAG/src/bsp/raspberrypi.rs
index 10888d37f..c0b639c97 100644
--- a/09_hw_debug_JTAG/src/bsp/raspberrypi.rs
+++ b/09_hw_debug_JTAG/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/09_hw_debug_JTAG/src/bsp/raspberrypi/console.rs b/09_hw_debug_JTAG/src/bsp/raspberrypi/console.rs
index d1b60dd82..c6bb5263c 100644
--- a/09_hw_debug_JTAG/src/bsp/raspberrypi/console.rs
+++ b/09_hw_debug_JTAG/src/bsp/raspberrypi/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP console facilities.
 
diff --git a/09_hw_debug_JTAG/src/bsp/raspberrypi/cpu.rs b/09_hw_debug_JTAG/src/bsp/raspberrypi/cpu.rs
index 8410a9615..3951618d7 100644
--- a/09_hw_debug_JTAG/src/bsp/raspberrypi/cpu.rs
+++ b/09_hw_debug_JTAG/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/09_hw_debug_JTAG/src/bsp/raspberrypi/driver.rs b/09_hw_debug_JTAG/src/bsp/raspberrypi/driver.rs
index fe24dd71b..ab910185c 100644
--- a/09_hw_debug_JTAG/src/bsp/raspberrypi/driver.rs
+++ b/09_hw_debug_JTAG/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/09_hw_debug_JTAG/src/bsp/raspberrypi/link.ld b/09_hw_debug_JTAG/src/bsp/raspberrypi/link.ld
index c03bb5e54..573abc5f0 100644
--- a/09_hw_debug_JTAG/src/bsp/raspberrypi/link.ld
+++ b/09_hw_debug_JTAG/src/bsp/raspberrypi/link.ld
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT OR Apache-2.0
  *
- * Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+ * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
 SECTIONS
diff --git a/09_hw_debug_JTAG/src/bsp/raspberrypi/memory.rs b/09_hw_debug_JTAG/src/bsp/raspberrypi/memory.rs
index fae051257..fb47b1418 100644
--- a/09_hw_debug_JTAG/src/bsp/raspberrypi/memory.rs
+++ b/09_hw_debug_JTAG/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 
diff --git a/09_hw_debug_JTAG/src/console.rs b/09_hw_debug_JTAG/src/console.rs
index e6323a20d..2d38cc1d1 100644
--- a/09_hw_debug_JTAG/src/console.rs
+++ b/09_hw_debug_JTAG/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/09_hw_debug_JTAG/src/cpu.rs b/09_hw_debug_JTAG/src/cpu.rs
index 9c67c0e7d..c9e5af72c 100644
--- a/09_hw_debug_JTAG/src/cpu.rs
+++ b/09_hw_debug_JTAG/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/09_hw_debug_JTAG/src/cpu/smp.rs b/09_hw_debug_JTAG/src/cpu/smp.rs
index b1428884d..90ecbdf30 100644
--- a/09_hw_debug_JTAG/src/cpu/smp.rs
+++ b/09_hw_debug_JTAG/src/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Symmetric multiprocessing.
 
diff --git a/09_hw_debug_JTAG/src/driver.rs b/09_hw_debug_JTAG/src/driver.rs
index e2875b876..6e8c5533a 100644
--- a/09_hw_debug_JTAG/src/driver.rs
+++ b/09_hw_debug_JTAG/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/09_hw_debug_JTAG/src/main.rs b/09_hw_debug_JTAG/src/main.rs
index 2c9f1fb7f..4dad25714 100644
--- a/09_hw_debug_JTAG/src/main.rs
+++ b/09_hw_debug_JTAG/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/09_hw_debug_JTAG/src/memory.rs b/09_hw_debug_JTAG/src/memory.rs
index 827b8b850..1f79e0c95 100644
--- a/09_hw_debug_JTAG/src/memory.rs
+++ b/09_hw_debug_JTAG/src/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management.
 
diff --git a/09_hw_debug_JTAG/src/panic_wait.rs b/09_hw_debug_JTAG/src/panic_wait.rs
index 1386e1e23..7980f5de5 100644
--- a/09_hw_debug_JTAG/src/panic_wait.rs
+++ b/09_hw_debug_JTAG/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/09_hw_debug_JTAG/src/print.rs b/09_hw_debug_JTAG/src/print.rs
index 8b6f3f988..1ea96b6ad 100644
--- a/09_hw_debug_JTAG/src/print.rs
+++ b/09_hw_debug_JTAG/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing facilities.
 
diff --git a/09_hw_debug_JTAG/src/runtime_init.rs b/09_hw_debug_JTAG/src/runtime_init.rs
index 9de285958..ee0946863 100644
--- a/09_hw_debug_JTAG/src/runtime_init.rs
+++ b/09_hw_debug_JTAG/src/runtime_init.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Rust runtime initialization code.
 
diff --git a/09_hw_debug_JTAG/src/synchronization.rs b/09_hw_debug_JTAG/src/synchronization.rs
index 6de32807c..f956b5cdd 100644
--- a/09_hw_debug_JTAG/src/synchronization.rs
+++ b/09_hw_debug_JTAG/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/09_hw_debug_JTAG/src/time.rs b/09_hw_debug_JTAG/src/time.rs
index cd3ceec33..4f2f4e38f 100644
--- a/09_hw_debug_JTAG/src/time.rs
+++ b/09_hw_debug_JTAG/src/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer primitives.
 
diff --git a/10_privilege_level/Makefile b/10_privilege_level/Makefile
index 5f49b1af5..9254018cf 100644
--- a/10_privilege_level/Makefile
+++ b/10_privilege_level/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 # Default to the RPi3
 BSP ?= rpi3
diff --git a/10_privilege_level/README.md b/10_privilege_level/README.md
index 84ccf9248..fab885983 100644
--- a/10_privilege_level/README.md
+++ b/10_privilege_level/README.md
@@ -306,7 +306,7 @@ diff -uNr 09_hw_debug_JTAG/src/_arch/aarch64/exception/asynchronous.rs 10_privil
 @@ -0,0 +1,74 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Architectural asynchronous exception handling.
 +
@@ -385,7 +385,7 @@ diff -uNr 09_hw_debug_JTAG/src/_arch/aarch64/exception.rs 10_privilege_level/src
 @@ -0,0 +1,23 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Architectural synchronous and asynchronous exception handling.
 +
@@ -413,7 +413,7 @@ diff -uNr 09_hw_debug_JTAG/src/exception/asynchronous.rs 10_privilege_level/src/
 @@ -0,0 +1,10 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Asynchronous exception handling.
 +
@@ -428,7 +428,7 @@ diff -uNr 09_hw_debug_JTAG/src/exception.rs 10_privilege_level/src/exception.rs
 @@ -0,0 +1,26 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Synchronous and asynchronous exception handling.
 +
diff --git a/10_privilege_level/src/_arch/aarch64/cpu.rs b/10_privilege_level/src/_arch/aarch64/cpu.rs
index e546dd606..3846968b3 100644
--- a/10_privilege_level/src/_arch/aarch64/cpu.rs
+++ b/10_privilege_level/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 
diff --git a/10_privilege_level/src/_arch/aarch64/cpu/smp.rs b/10_privilege_level/src/_arch/aarch64/cpu/smp.rs
index 8429e1d2b..c80f7e780 100644
--- a/10_privilege_level/src/_arch/aarch64/cpu/smp.rs
+++ b/10_privilege_level/src/_arch/aarch64/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
 
diff --git a/10_privilege_level/src/_arch/aarch64/exception.rs b/10_privilege_level/src/_arch/aarch64/exception.rs
index ebfef8c82..b6ee28b8c 100644
--- a/10_privilege_level/src/_arch/aarch64/exception.rs
+++ b/10_privilege_level/src/_arch/aarch64/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural synchronous and asynchronous exception handling.
 
diff --git a/10_privilege_level/src/_arch/aarch64/exception/asynchronous.rs b/10_privilege_level/src/_arch/aarch64/exception/asynchronous.rs
index f660544c1..445f490eb 100644
--- a/10_privilege_level/src/_arch/aarch64/exception/asynchronous.rs
+++ b/10_privilege_level/src/_arch/aarch64/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural asynchronous exception handling.
 
diff --git a/10_privilege_level/src/_arch/aarch64/time.rs b/10_privilege_level/src/_arch/aarch64/time.rs
index af98ddd01..7f1bc6963 100644
--- a/10_privilege_level/src/_arch/aarch64/time.rs
+++ b/10_privilege_level/src/_arch/aarch64/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
 
diff --git a/10_privilege_level/src/bsp.rs b/10_privilege_level/src/bsp.rs
index 3a5657ade..257502491 100644
--- a/10_privilege_level/src/bsp.rs
+++ b/10_privilege_level/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional re-exporting of Board Support Packages.
 
diff --git a/10_privilege_level/src/bsp/device_driver.rs b/10_privilege_level/src/bsp/device_driver.rs
index ce7396f22..2fcbc83e7 100644
--- a/10_privilege_level/src/bsp/device_driver.rs
+++ b/10_privilege_level/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/10_privilege_level/src/bsp/device_driver/bcm.rs b/10_privilege_level/src/bsp/device_driver/bcm.rs
index 59071d5d8..77613d261 100644
--- a/10_privilege_level/src/bsp/device_driver/bcm.rs
+++ b/10_privilege_level/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 15bd3b78b..41d8b861c 100644
--- a/10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index e39bc7cdb..66b734638 100644
--- a/10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 
diff --git a/10_privilege_level/src/bsp/device_driver/common.rs b/10_privilege_level/src/bsp/device_driver/common.rs
index cd2c07601..41553b7a5 100644
--- a/10_privilege_level/src/bsp/device_driver/common.rs
+++ b/10_privilege_level/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/10_privilege_level/src/bsp/raspberrypi.rs b/10_privilege_level/src/bsp/raspberrypi.rs
index 10888d37f..c0b639c97 100644
--- a/10_privilege_level/src/bsp/raspberrypi.rs
+++ b/10_privilege_level/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/10_privilege_level/src/bsp/raspberrypi/console.rs b/10_privilege_level/src/bsp/raspberrypi/console.rs
index d1b60dd82..c6bb5263c 100644
--- a/10_privilege_level/src/bsp/raspberrypi/console.rs
+++ b/10_privilege_level/src/bsp/raspberrypi/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP console facilities.
 
diff --git a/10_privilege_level/src/bsp/raspberrypi/cpu.rs b/10_privilege_level/src/bsp/raspberrypi/cpu.rs
index 8410a9615..3951618d7 100644
--- a/10_privilege_level/src/bsp/raspberrypi/cpu.rs
+++ b/10_privilege_level/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/10_privilege_level/src/bsp/raspberrypi/driver.rs b/10_privilege_level/src/bsp/raspberrypi/driver.rs
index fe24dd71b..ab910185c 100644
--- a/10_privilege_level/src/bsp/raspberrypi/driver.rs
+++ b/10_privilege_level/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/10_privilege_level/src/bsp/raspberrypi/link.ld b/10_privilege_level/src/bsp/raspberrypi/link.ld
index c03bb5e54..573abc5f0 100644
--- a/10_privilege_level/src/bsp/raspberrypi/link.ld
+++ b/10_privilege_level/src/bsp/raspberrypi/link.ld
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT OR Apache-2.0
  *
- * Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+ * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
 SECTIONS
diff --git a/10_privilege_level/src/bsp/raspberrypi/memory.rs b/10_privilege_level/src/bsp/raspberrypi/memory.rs
index fae051257..fb47b1418 100644
--- a/10_privilege_level/src/bsp/raspberrypi/memory.rs
+++ b/10_privilege_level/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 
diff --git a/10_privilege_level/src/console.rs b/10_privilege_level/src/console.rs
index e6323a20d..2d38cc1d1 100644
--- a/10_privilege_level/src/console.rs
+++ b/10_privilege_level/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/10_privilege_level/src/cpu.rs b/10_privilege_level/src/cpu.rs
index 9c67c0e7d..c9e5af72c 100644
--- a/10_privilege_level/src/cpu.rs
+++ b/10_privilege_level/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/10_privilege_level/src/cpu/smp.rs b/10_privilege_level/src/cpu/smp.rs
index b1428884d..90ecbdf30 100644
--- a/10_privilege_level/src/cpu/smp.rs
+++ b/10_privilege_level/src/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Symmetric multiprocessing.
 
diff --git a/10_privilege_level/src/driver.rs b/10_privilege_level/src/driver.rs
index e2875b876..6e8c5533a 100644
--- a/10_privilege_level/src/driver.rs
+++ b/10_privilege_level/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/10_privilege_level/src/exception.rs b/10_privilege_level/src/exception.rs
index d2e621795..432c606b9 100644
--- a/10_privilege_level/src/exception.rs
+++ b/10_privilege_level/src/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronous and asynchronous exception handling.
 
diff --git a/10_privilege_level/src/exception/asynchronous.rs b/10_privilege_level/src/exception/asynchronous.rs
index 3c75f90a2..fbdba9579 100644
--- a/10_privilege_level/src/exception/asynchronous.rs
+++ b/10_privilege_level/src/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Asynchronous exception handling.
 
diff --git a/10_privilege_level/src/main.rs b/10_privilege_level/src/main.rs
index 1cc057ac8..faa42f902 100644
--- a/10_privilege_level/src/main.rs
+++ b/10_privilege_level/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/10_privilege_level/src/memory.rs b/10_privilege_level/src/memory.rs
index 827b8b850..1f79e0c95 100644
--- a/10_privilege_level/src/memory.rs
+++ b/10_privilege_level/src/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management.
 
diff --git a/10_privilege_level/src/panic_wait.rs b/10_privilege_level/src/panic_wait.rs
index 1386e1e23..7980f5de5 100644
--- a/10_privilege_level/src/panic_wait.rs
+++ b/10_privilege_level/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/10_privilege_level/src/print.rs b/10_privilege_level/src/print.rs
index 8b6f3f988..1ea96b6ad 100644
--- a/10_privilege_level/src/print.rs
+++ b/10_privilege_level/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing facilities.
 
diff --git a/10_privilege_level/src/runtime_init.rs b/10_privilege_level/src/runtime_init.rs
index 9de285958..ee0946863 100644
--- a/10_privilege_level/src/runtime_init.rs
+++ b/10_privilege_level/src/runtime_init.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Rust runtime initialization code.
 
diff --git a/10_privilege_level/src/synchronization.rs b/10_privilege_level/src/synchronization.rs
index 6de32807c..f956b5cdd 100644
--- a/10_privilege_level/src/synchronization.rs
+++ b/10_privilege_level/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/10_privilege_level/src/time.rs b/10_privilege_level/src/time.rs
index cd3ceec33..4f2f4e38f 100644
--- a/10_privilege_level/src/time.rs
+++ b/10_privilege_level/src/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer primitives.
 
diff --git a/11_virtual_mem_part1_identity_mapping/Makefile b/11_virtual_mem_part1_identity_mapping/Makefile
index 5f49b1af5..9254018cf 100644
--- a/11_virtual_mem_part1_identity_mapping/Makefile
+++ b/11_virtual_mem_part1_identity_mapping/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 # Default to the RPi3
 BSP ?= rpi3
diff --git a/11_virtual_mem_part1_identity_mapping/README.md b/11_virtual_mem_part1_identity_mapping/README.md
index 0533361b1..c8c35972e 100644
--- a/11_virtual_mem_part1_identity_mapping/README.md
+++ b/11_virtual_mem_part1_identity_mapping/README.md
@@ -306,7 +306,7 @@ diff -uNr 10_privilege_level/src/_arch/aarch64/memory/mmu.rs 11_virtual_mem_part
 @@ -0,0 +1,333 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Memory Management Unit Driver.
 +//!
@@ -665,7 +665,7 @@ diff -uNr 10_privilege_level/src/bsp/raspberrypi/memory/mmu.rs 11_virtual_mem_pa
 @@ -0,0 +1,88 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! BSP Memory Management Unit.
 +
@@ -918,7 +918,7 @@ diff -uNr 10_privilege_level/src/memory/mmu.rs 11_virtual_mem_part1_identity_map
 @@ -0,0 +1,199 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Memory Management Unit.
 +//!
diff --git a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu.rs b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu.rs
index e546dd606..3846968b3 100644
--- a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/smp.rs b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/smp.rs
index 8429e1d2b..c80f7e780 100644
--- a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/smp.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs
index ebfef8c82..b6ee28b8c 100644
--- a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural synchronous and asynchronous exception handling.
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception/asynchronous.rs b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception/asynchronous.rs
index f660544c1..445f490eb 100644
--- a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception/asynchronous.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural asynchronous exception handling.
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
index ff653a091..aeacbe8ec 100644
--- a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit Driver.
 //!
diff --git a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs
index af98ddd01..7f1bc6963 100644
--- a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp.rs b/11_virtual_mem_part1_identity_mapping/src/bsp.rs
index 5add2e382..3d7587673 100644
--- a/11_virtual_mem_part1_identity_mapping/src/bsp.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional re-exporting of Board Support Packages.
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver.rs b/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver.rs
index ce7396f22..2fcbc83e7 100644
--- a/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm.rs b/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm.rs
index 59071d5d8..77613d261 100644
--- a/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 15bd3b78b..41d8b861c 100644
--- a/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index e39bc7cdb..66b734638 100644
--- a/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/common.rs b/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/common.rs
index cd2c07601..41553b7a5 100644
--- a/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/common.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi.rs b/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi.rs
index 10888d37f..c0b639c97 100644
--- a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/console.rs b/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/console.rs
index d1b60dd82..c6bb5263c 100644
--- a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/console.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP console facilities.
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/cpu.rs b/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/cpu.rs
index 8410a9615..3951618d7 100644
--- a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/cpu.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/driver.rs b/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/driver.rs
index fe24dd71b..ab910185c 100644
--- a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/driver.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld b/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
index 5b5adbaa6..aec8e79b7 100644
--- a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
+++ b/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT OR Apache-2.0
  *
- * Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+ * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
 SECTIONS
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs b/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs
index 810acd8af..9ab302324 100644
--- a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs b/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
index 00990c7ef..6930b6755 100644
--- a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management Unit.
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/console.rs b/11_virtual_mem_part1_identity_mapping/src/console.rs
index e6323a20d..2d38cc1d1 100644
--- a/11_virtual_mem_part1_identity_mapping/src/console.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/cpu.rs b/11_virtual_mem_part1_identity_mapping/src/cpu.rs
index 9c67c0e7d..c9e5af72c 100644
--- a/11_virtual_mem_part1_identity_mapping/src/cpu.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/cpu/smp.rs b/11_virtual_mem_part1_identity_mapping/src/cpu/smp.rs
index b1428884d..90ecbdf30 100644
--- a/11_virtual_mem_part1_identity_mapping/src/cpu/smp.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Symmetric multiprocessing.
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/driver.rs b/11_virtual_mem_part1_identity_mapping/src/driver.rs
index e2875b876..6e8c5533a 100644
--- a/11_virtual_mem_part1_identity_mapping/src/driver.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/exception.rs b/11_virtual_mem_part1_identity_mapping/src/exception.rs
index d2e621795..432c606b9 100644
--- a/11_virtual_mem_part1_identity_mapping/src/exception.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronous and asynchronous exception handling.
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/exception/asynchronous.rs b/11_virtual_mem_part1_identity_mapping/src/exception/asynchronous.rs
index 3c75f90a2..fbdba9579 100644
--- a/11_virtual_mem_part1_identity_mapping/src/exception/asynchronous.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Asynchronous exception handling.
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/main.rs b/11_virtual_mem_part1_identity_mapping/src/main.rs
index 680e28194..eed8b35c6 100644
--- a/11_virtual_mem_part1_identity_mapping/src/main.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/11_virtual_mem_part1_identity_mapping/src/memory.rs b/11_virtual_mem_part1_identity_mapping/src/memory.rs
index 59236a120..e8cc752f5 100644
--- a/11_virtual_mem_part1_identity_mapping/src/memory.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management.
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/memory/mmu.rs b/11_virtual_mem_part1_identity_mapping/src/memory/mmu.rs
index 9675b8ab6..4880ce913 100644
--- a/11_virtual_mem_part1_identity_mapping/src/memory/mmu.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit.
 //!
diff --git a/11_virtual_mem_part1_identity_mapping/src/panic_wait.rs b/11_virtual_mem_part1_identity_mapping/src/panic_wait.rs
index 1386e1e23..7980f5de5 100644
--- a/11_virtual_mem_part1_identity_mapping/src/panic_wait.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/print.rs b/11_virtual_mem_part1_identity_mapping/src/print.rs
index 8b6f3f988..1ea96b6ad 100644
--- a/11_virtual_mem_part1_identity_mapping/src/print.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing facilities.
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/runtime_init.rs b/11_virtual_mem_part1_identity_mapping/src/runtime_init.rs
index 9de285958..ee0946863 100644
--- a/11_virtual_mem_part1_identity_mapping/src/runtime_init.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/runtime_init.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Rust runtime initialization code.
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/synchronization.rs b/11_virtual_mem_part1_identity_mapping/src/synchronization.rs
index 6de32807c..f956b5cdd 100644
--- a/11_virtual_mem_part1_identity_mapping/src/synchronization.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/11_virtual_mem_part1_identity_mapping/src/time.rs b/11_virtual_mem_part1_identity_mapping/src/time.rs
index cd3ceec33..4f2f4e38f 100644
--- a/11_virtual_mem_part1_identity_mapping/src/time.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer primitives.
 
diff --git a/12_exceptions_part1_groundwork/Makefile b/12_exceptions_part1_groundwork/Makefile
index 5f49b1af5..9254018cf 100644
--- a/12_exceptions_part1_groundwork/Makefile
+++ b/12_exceptions_part1_groundwork/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 # Default to the RPi3
 BSP ?= rpi3
diff --git a/12_exceptions_part1_groundwork/README.md b/12_exceptions_part1_groundwork/README.md
index 21c0f0eef..f70a33c54 100644
--- a/12_exceptions_part1_groundwork/README.md
+++ b/12_exceptions_part1_groundwork/README.md
@@ -745,7 +745,7 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.S 12
 @@ -0,0 +1,138 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +/// Call the function provided by parameter `\handler` after saving the exception context. Provide
 +/// the context as the first parameter to '\handler'.
diff --git a/12_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs b/12_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs
index e546dd606..3846968b3 100644
--- a/12_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs
+++ b/12_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 
diff --git a/12_exceptions_part1_groundwork/src/_arch/aarch64/cpu/smp.rs b/12_exceptions_part1_groundwork/src/_arch/aarch64/cpu/smp.rs
index 8429e1d2b..c80f7e780 100644
--- a/12_exceptions_part1_groundwork/src/_arch/aarch64/cpu/smp.rs
+++ b/12_exceptions_part1_groundwork/src/_arch/aarch64/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
 
diff --git a/12_exceptions_part1_groundwork/src/_arch/aarch64/exception.S b/12_exceptions_part1_groundwork/src/_arch/aarch64/exception.S
index ee3b5497e..4d125334c 100644
--- a/12_exceptions_part1_groundwork/src/_arch/aarch64/exception.S
+++ b/12_exceptions_part1_groundwork/src/_arch/aarch64/exception.S
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 /// Call the function provided by parameter `\handler` after saving the exception context. Provide
 /// the context as the first parameter to '\handler'.
diff --git a/12_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs b/12_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
index d932445c3..10d003542 100644
--- a/12_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
+++ b/12_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural synchronous and asynchronous exception handling.
 
diff --git a/12_exceptions_part1_groundwork/src/_arch/aarch64/exception/asynchronous.rs b/12_exceptions_part1_groundwork/src/_arch/aarch64/exception/asynchronous.rs
index f660544c1..445f490eb 100644
--- a/12_exceptions_part1_groundwork/src/_arch/aarch64/exception/asynchronous.rs
+++ b/12_exceptions_part1_groundwork/src/_arch/aarch64/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural asynchronous exception handling.
 
diff --git a/12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs b/12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
index ff653a091..aeacbe8ec 100644
--- a/12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
+++ b/12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit Driver.
 //!
diff --git a/12_exceptions_part1_groundwork/src/_arch/aarch64/time.rs b/12_exceptions_part1_groundwork/src/_arch/aarch64/time.rs
index af98ddd01..7f1bc6963 100644
--- a/12_exceptions_part1_groundwork/src/_arch/aarch64/time.rs
+++ b/12_exceptions_part1_groundwork/src/_arch/aarch64/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
 
diff --git a/12_exceptions_part1_groundwork/src/bsp.rs b/12_exceptions_part1_groundwork/src/bsp.rs
index 3a5657ade..257502491 100644
--- a/12_exceptions_part1_groundwork/src/bsp.rs
+++ b/12_exceptions_part1_groundwork/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional re-exporting of Board Support Packages.
 
diff --git a/12_exceptions_part1_groundwork/src/bsp/device_driver.rs b/12_exceptions_part1_groundwork/src/bsp/device_driver.rs
index ce7396f22..2fcbc83e7 100644
--- a/12_exceptions_part1_groundwork/src/bsp/device_driver.rs
+++ b/12_exceptions_part1_groundwork/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm.rs b/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm.rs
index 59071d5d8..77613d261 100644
--- a/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm.rs
+++ b/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 15bd3b78b..41d8b861c 100644
--- a/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index e39bc7cdb..66b734638 100644
--- a/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 
diff --git a/12_exceptions_part1_groundwork/src/bsp/device_driver/common.rs b/12_exceptions_part1_groundwork/src/bsp/device_driver/common.rs
index cd2c07601..41553b7a5 100644
--- a/12_exceptions_part1_groundwork/src/bsp/device_driver/common.rs
+++ b/12_exceptions_part1_groundwork/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/12_exceptions_part1_groundwork/src/bsp/raspberrypi.rs b/12_exceptions_part1_groundwork/src/bsp/raspberrypi.rs
index 10888d37f..c0b639c97 100644
--- a/12_exceptions_part1_groundwork/src/bsp/raspberrypi.rs
+++ b/12_exceptions_part1_groundwork/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/console.rs b/12_exceptions_part1_groundwork/src/bsp/raspberrypi/console.rs
index d1b60dd82..c6bb5263c 100644
--- a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/console.rs
+++ b/12_exceptions_part1_groundwork/src/bsp/raspberrypi/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP console facilities.
 
diff --git a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/cpu.rs b/12_exceptions_part1_groundwork/src/bsp/raspberrypi/cpu.rs
index 8410a9615..3951618d7 100644
--- a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/cpu.rs
+++ b/12_exceptions_part1_groundwork/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/driver.rs b/12_exceptions_part1_groundwork/src/bsp/raspberrypi/driver.rs
index fe24dd71b..ab910185c 100644
--- a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/driver.rs
+++ b/12_exceptions_part1_groundwork/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/link.ld b/12_exceptions_part1_groundwork/src/bsp/raspberrypi/link.ld
index 90d096ffe..4dfe60c7f 100644
--- a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/link.ld
+++ b/12_exceptions_part1_groundwork/src/bsp/raspberrypi/link.ld
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT OR Apache-2.0
  *
- * Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+ * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
 SECTIONS
diff --git a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory.rs b/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory.rs
index 810acd8af..9ab302324 100644
--- a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory.rs
+++ b/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 
diff --git a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs b/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
index 5658ddb6d..1114bcce2 100644
--- a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
+++ b/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management Unit.
 
diff --git a/12_exceptions_part1_groundwork/src/console.rs b/12_exceptions_part1_groundwork/src/console.rs
index e6323a20d..2d38cc1d1 100644
--- a/12_exceptions_part1_groundwork/src/console.rs
+++ b/12_exceptions_part1_groundwork/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/12_exceptions_part1_groundwork/src/cpu.rs b/12_exceptions_part1_groundwork/src/cpu.rs
index 9c67c0e7d..c9e5af72c 100644
--- a/12_exceptions_part1_groundwork/src/cpu.rs
+++ b/12_exceptions_part1_groundwork/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/12_exceptions_part1_groundwork/src/cpu/smp.rs b/12_exceptions_part1_groundwork/src/cpu/smp.rs
index b1428884d..90ecbdf30 100644
--- a/12_exceptions_part1_groundwork/src/cpu/smp.rs
+++ b/12_exceptions_part1_groundwork/src/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Symmetric multiprocessing.
 
diff --git a/12_exceptions_part1_groundwork/src/driver.rs b/12_exceptions_part1_groundwork/src/driver.rs
index e2875b876..6e8c5533a 100644
--- a/12_exceptions_part1_groundwork/src/driver.rs
+++ b/12_exceptions_part1_groundwork/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/12_exceptions_part1_groundwork/src/exception.rs b/12_exceptions_part1_groundwork/src/exception.rs
index d2e621795..432c606b9 100644
--- a/12_exceptions_part1_groundwork/src/exception.rs
+++ b/12_exceptions_part1_groundwork/src/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronous and asynchronous exception handling.
 
diff --git a/12_exceptions_part1_groundwork/src/exception/asynchronous.rs b/12_exceptions_part1_groundwork/src/exception/asynchronous.rs
index 3c75f90a2..fbdba9579 100644
--- a/12_exceptions_part1_groundwork/src/exception/asynchronous.rs
+++ b/12_exceptions_part1_groundwork/src/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Asynchronous exception handling.
 
diff --git a/12_exceptions_part1_groundwork/src/main.rs b/12_exceptions_part1_groundwork/src/main.rs
index 6f59108aa..66a32d085 100644
--- a/12_exceptions_part1_groundwork/src/main.rs
+++ b/12_exceptions_part1_groundwork/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/12_exceptions_part1_groundwork/src/memory.rs b/12_exceptions_part1_groundwork/src/memory.rs
index 59236a120..e8cc752f5 100644
--- a/12_exceptions_part1_groundwork/src/memory.rs
+++ b/12_exceptions_part1_groundwork/src/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management.
 
diff --git a/12_exceptions_part1_groundwork/src/memory/mmu.rs b/12_exceptions_part1_groundwork/src/memory/mmu.rs
index 25a18bf99..826cda6c9 100644
--- a/12_exceptions_part1_groundwork/src/memory/mmu.rs
+++ b/12_exceptions_part1_groundwork/src/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit.
 //!
diff --git a/12_exceptions_part1_groundwork/src/panic_wait.rs b/12_exceptions_part1_groundwork/src/panic_wait.rs
index 1386e1e23..7980f5de5 100644
--- a/12_exceptions_part1_groundwork/src/panic_wait.rs
+++ b/12_exceptions_part1_groundwork/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/12_exceptions_part1_groundwork/src/print.rs b/12_exceptions_part1_groundwork/src/print.rs
index 8b6f3f988..1ea96b6ad 100644
--- a/12_exceptions_part1_groundwork/src/print.rs
+++ b/12_exceptions_part1_groundwork/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing facilities.
 
diff --git a/12_exceptions_part1_groundwork/src/runtime_init.rs b/12_exceptions_part1_groundwork/src/runtime_init.rs
index 9de285958..ee0946863 100644
--- a/12_exceptions_part1_groundwork/src/runtime_init.rs
+++ b/12_exceptions_part1_groundwork/src/runtime_init.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Rust runtime initialization code.
 
diff --git a/12_exceptions_part1_groundwork/src/synchronization.rs b/12_exceptions_part1_groundwork/src/synchronization.rs
index 6de32807c..f956b5cdd 100644
--- a/12_exceptions_part1_groundwork/src/synchronization.rs
+++ b/12_exceptions_part1_groundwork/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/12_exceptions_part1_groundwork/src/time.rs b/12_exceptions_part1_groundwork/src/time.rs
index cd3ceec33..4f2f4e38f 100644
--- a/12_exceptions_part1_groundwork/src/time.rs
+++ b/12_exceptions_part1_groundwork/src/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer primitives.
 
diff --git a/13_integrated_testing/Makefile b/13_integrated_testing/Makefile
index ad567bb5c..9f7ea9a39 100644
--- a/13_integrated_testing/Makefile
+++ b/13_integrated_testing/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 # Default to the RPi3
 BSP ?= rpi3
diff --git a/13_integrated_testing/README.md b/13_integrated_testing/README.md
index e9509fd7e..3ecdc0396 100644
--- a/13_integrated_testing/README.md
+++ b/13_integrated_testing/README.md
@@ -1133,7 +1133,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/lib.rs 13_integrated_testing/src/li
 @@ -0,0 +1,170 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +// Rust embedded logo for `make doc`.
 +#![doc(html_logo_url = "https://git.io/JeGIp")]
@@ -1644,7 +1644,7 @@ diff -uNr 12_exceptions_part1_groundwork/test-macros/src/lib.rs 13_integrated_te
 @@ -0,0 +1,29 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2019-2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +use proc_macro::TokenStream;
 +use proc_macro2::Span;
@@ -1680,7 +1680,7 @@ diff -uNr 12_exceptions_part1_groundwork/tests/00_console_sanity.rb 13_integrate
 +
 +# SPDX-License-Identifier: MIT OR Apache-2.0
 +#
-+# Copyright (c) 2019-2020 Andre Richter <andre.o.richter@gmail.com>
++# Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +require 'expect'
 +
@@ -1733,7 +1733,7 @@ diff -uNr 12_exceptions_part1_groundwork/tests/00_console_sanity.rs 13_integrate
 @@ -0,0 +1,36 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2019-2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Console sanity tests - RX, TX and statistics.
 +
@@ -1774,7 +1774,7 @@ diff -uNr 12_exceptions_part1_groundwork/tests/01_timer_sanity.rs 13_integrated_
 @@ -0,0 +1,50 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2019-2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Timer sanity tests.
 +
@@ -1829,7 +1829,7 @@ diff -uNr 12_exceptions_part1_groundwork/tests/02_exception_sync_page_fault.rs 1
 @@ -0,0 +1,44 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2019-2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Page faults must result in synchronous exceptions.
 +
@@ -1878,7 +1878,7 @@ diff -uNr 12_exceptions_part1_groundwork/tests/panic_exit_failure/mod.rs 13_inte
 @@ -0,0 +1,9 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2019-2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +/// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
 +#[no_mangle]
@@ -1892,7 +1892,7 @@ diff -uNr 12_exceptions_part1_groundwork/tests/panic_exit_success/mod.rs 13_inte
 @@ -0,0 +1,9 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2019-2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +/// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
 +#[no_mangle]
@@ -1909,7 +1909,7 @@ diff -uNr 12_exceptions_part1_groundwork/tests/runner.rb 13_integrated_testing/t
 +
 +# SPDX-License-Identifier: MIT OR Apache-2.0
 +#
-+# Copyright (c) 2019-2020 Andre Richter <andre.o.richter@gmail.com>
++# Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +require 'English'
 +require 'pty'
@@ -2064,7 +2064,7 @@ diff -uNr 12_exceptions_part1_groundwork/test-types/src/lib.rs 13_integrated_tes
 @@ -0,0 +1,16 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2019-2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Types for the `custom_test_frameworks` implementation.
 +
diff --git a/13_integrated_testing/src/_arch/aarch64/cpu.rs b/13_integrated_testing/src/_arch/aarch64/cpu.rs
index 3e3ac706f..491f17ca8 100644
--- a/13_integrated_testing/src/_arch/aarch64/cpu.rs
+++ b/13_integrated_testing/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 
diff --git a/13_integrated_testing/src/_arch/aarch64/cpu/smp.rs b/13_integrated_testing/src/_arch/aarch64/cpu/smp.rs
index 8429e1d2b..c80f7e780 100644
--- a/13_integrated_testing/src/_arch/aarch64/cpu/smp.rs
+++ b/13_integrated_testing/src/_arch/aarch64/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
 
diff --git a/13_integrated_testing/src/_arch/aarch64/exception.S b/13_integrated_testing/src/_arch/aarch64/exception.S
index ee3b5497e..4d125334c 100644
--- a/13_integrated_testing/src/_arch/aarch64/exception.S
+++ b/13_integrated_testing/src/_arch/aarch64/exception.S
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 /// Call the function provided by parameter `\handler` after saving the exception context. Provide
 /// the context as the first parameter to '\handler'.
diff --git a/13_integrated_testing/src/_arch/aarch64/exception.rs b/13_integrated_testing/src/_arch/aarch64/exception.rs
index 56f3e6074..7070d8140 100644
--- a/13_integrated_testing/src/_arch/aarch64/exception.rs
+++ b/13_integrated_testing/src/_arch/aarch64/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural synchronous and asynchronous exception handling.
 
diff --git a/13_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs b/13_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs
index f660544c1..445f490eb 100644
--- a/13_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs
+++ b/13_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural asynchronous exception handling.
 
diff --git a/13_integrated_testing/src/_arch/aarch64/memory/mmu.rs b/13_integrated_testing/src/_arch/aarch64/memory/mmu.rs
index 1ccb3fd71..5061f6007 100644
--- a/13_integrated_testing/src/_arch/aarch64/memory/mmu.rs
+++ b/13_integrated_testing/src/_arch/aarch64/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit Driver.
 //!
diff --git a/13_integrated_testing/src/_arch/aarch64/time.rs b/13_integrated_testing/src/_arch/aarch64/time.rs
index af98ddd01..7f1bc6963 100644
--- a/13_integrated_testing/src/_arch/aarch64/time.rs
+++ b/13_integrated_testing/src/_arch/aarch64/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
 
diff --git a/13_integrated_testing/src/bsp.rs b/13_integrated_testing/src/bsp.rs
index 3a5657ade..257502491 100644
--- a/13_integrated_testing/src/bsp.rs
+++ b/13_integrated_testing/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional re-exporting of Board Support Packages.
 
diff --git a/13_integrated_testing/src/bsp/device_driver.rs b/13_integrated_testing/src/bsp/device_driver.rs
index ce7396f22..2fcbc83e7 100644
--- a/13_integrated_testing/src/bsp/device_driver.rs
+++ b/13_integrated_testing/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/13_integrated_testing/src/bsp/device_driver/bcm.rs b/13_integrated_testing/src/bsp/device_driver/bcm.rs
index 59071d5d8..77613d261 100644
--- a/13_integrated_testing/src/bsp/device_driver/bcm.rs
+++ b/13_integrated_testing/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 15bd3b78b..41d8b861c 100644
--- a/13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index e39bc7cdb..66b734638 100644
--- a/13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 
diff --git a/13_integrated_testing/src/bsp/device_driver/common.rs b/13_integrated_testing/src/bsp/device_driver/common.rs
index cd2c07601..41553b7a5 100644
--- a/13_integrated_testing/src/bsp/device_driver/common.rs
+++ b/13_integrated_testing/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/13_integrated_testing/src/bsp/raspberrypi.rs b/13_integrated_testing/src/bsp/raspberrypi.rs
index 10888d37f..c0b639c97 100644
--- a/13_integrated_testing/src/bsp/raspberrypi.rs
+++ b/13_integrated_testing/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/13_integrated_testing/src/bsp/raspberrypi/console.rs b/13_integrated_testing/src/bsp/raspberrypi/console.rs
index 16b2f59bc..d6f95e4e9 100644
--- a/13_integrated_testing/src/bsp/raspberrypi/console.rs
+++ b/13_integrated_testing/src/bsp/raspberrypi/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP console facilities.
 
diff --git a/13_integrated_testing/src/bsp/raspberrypi/cpu.rs b/13_integrated_testing/src/bsp/raspberrypi/cpu.rs
index 8410a9615..3951618d7 100644
--- a/13_integrated_testing/src/bsp/raspberrypi/cpu.rs
+++ b/13_integrated_testing/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/13_integrated_testing/src/bsp/raspberrypi/driver.rs b/13_integrated_testing/src/bsp/raspberrypi/driver.rs
index fe24dd71b..ab910185c 100644
--- a/13_integrated_testing/src/bsp/raspberrypi/driver.rs
+++ b/13_integrated_testing/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/13_integrated_testing/src/bsp/raspberrypi/link.ld b/13_integrated_testing/src/bsp/raspberrypi/link.ld
index 90d096ffe..4dfe60c7f 100644
--- a/13_integrated_testing/src/bsp/raspberrypi/link.ld
+++ b/13_integrated_testing/src/bsp/raspberrypi/link.ld
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT OR Apache-2.0
  *
- * Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+ * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
 SECTIONS
diff --git a/13_integrated_testing/src/bsp/raspberrypi/memory.rs b/13_integrated_testing/src/bsp/raspberrypi/memory.rs
index 810acd8af..9ab302324 100644
--- a/13_integrated_testing/src/bsp/raspberrypi/memory.rs
+++ b/13_integrated_testing/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 
diff --git a/13_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs b/13_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs
index d5078b5a0..d41de813c 100644
--- a/13_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs
+++ b/13_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management Unit.
 
diff --git a/13_integrated_testing/src/console.rs b/13_integrated_testing/src/console.rs
index e6323a20d..2d38cc1d1 100644
--- a/13_integrated_testing/src/console.rs
+++ b/13_integrated_testing/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/13_integrated_testing/src/cpu.rs b/13_integrated_testing/src/cpu.rs
index 9c67c0e7d..c9e5af72c 100644
--- a/13_integrated_testing/src/cpu.rs
+++ b/13_integrated_testing/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/13_integrated_testing/src/cpu/smp.rs b/13_integrated_testing/src/cpu/smp.rs
index b1428884d..90ecbdf30 100644
--- a/13_integrated_testing/src/cpu/smp.rs
+++ b/13_integrated_testing/src/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Symmetric multiprocessing.
 
diff --git a/13_integrated_testing/src/driver.rs b/13_integrated_testing/src/driver.rs
index e2875b876..6e8c5533a 100644
--- a/13_integrated_testing/src/driver.rs
+++ b/13_integrated_testing/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/13_integrated_testing/src/exception.rs b/13_integrated_testing/src/exception.rs
index 81ea2b26e..dfa852a87 100644
--- a/13_integrated_testing/src/exception.rs
+++ b/13_integrated_testing/src/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronous and asynchronous exception handling.
 
diff --git a/13_integrated_testing/src/exception/asynchronous.rs b/13_integrated_testing/src/exception/asynchronous.rs
index 3c75f90a2..fbdba9579 100644
--- a/13_integrated_testing/src/exception/asynchronous.rs
+++ b/13_integrated_testing/src/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Asynchronous exception handling.
 
diff --git a/13_integrated_testing/src/lib.rs b/13_integrated_testing/src/lib.rs
index 19e6f24fc..8e60240f2 100644
--- a/13_integrated_testing/src/lib.rs
+++ b/13_integrated_testing/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/13_integrated_testing/src/main.rs b/13_integrated_testing/src/main.rs
index 250172057..989bd045c 100644
--- a/13_integrated_testing/src/main.rs
+++ b/13_integrated_testing/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/13_integrated_testing/src/memory.rs b/13_integrated_testing/src/memory.rs
index 32353d4f6..1ef0285a6 100644
--- a/13_integrated_testing/src/memory.rs
+++ b/13_integrated_testing/src/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management.
 
diff --git a/13_integrated_testing/src/memory/mmu.rs b/13_integrated_testing/src/memory/mmu.rs
index 39f3ef3cd..163419ec0 100644
--- a/13_integrated_testing/src/memory/mmu.rs
+++ b/13_integrated_testing/src/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit.
 //!
diff --git a/13_integrated_testing/src/panic_wait.rs b/13_integrated_testing/src/panic_wait.rs
index 218c0a884..76438a9bf 100644
--- a/13_integrated_testing/src/panic_wait.rs
+++ b/13_integrated_testing/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/13_integrated_testing/src/print.rs b/13_integrated_testing/src/print.rs
index 8b6f3f988..1ea96b6ad 100644
--- a/13_integrated_testing/src/print.rs
+++ b/13_integrated_testing/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing facilities.
 
diff --git a/13_integrated_testing/src/runtime_init.rs b/13_integrated_testing/src/runtime_init.rs
index 1306578dd..0a1c685cd 100644
--- a/13_integrated_testing/src/runtime_init.rs
+++ b/13_integrated_testing/src/runtime_init.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Rust runtime initialization code.
 
diff --git a/13_integrated_testing/src/synchronization.rs b/13_integrated_testing/src/synchronization.rs
index 6de32807c..f956b5cdd 100644
--- a/13_integrated_testing/src/synchronization.rs
+++ b/13_integrated_testing/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/13_integrated_testing/src/time.rs b/13_integrated_testing/src/time.rs
index cd3ceec33..4f2f4e38f 100644
--- a/13_integrated_testing/src/time.rs
+++ b/13_integrated_testing/src/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer primitives.
 
diff --git a/13_integrated_testing/test-macros/src/lib.rs b/13_integrated_testing/test-macros/src/lib.rs
index 092c4806e..36c95e8a6 100644
--- a/13_integrated_testing/test-macros/src/lib.rs
+++ b/13_integrated_testing/test-macros/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 
 use proc_macro::TokenStream;
 use proc_macro2::Span;
diff --git a/13_integrated_testing/test-types/src/lib.rs b/13_integrated_testing/test-types/src/lib.rs
index 371bb5574..fe7d918f5 100644
--- a/13_integrated_testing/test-types/src/lib.rs
+++ b/13_integrated_testing/test-types/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Types for the `custom_test_frameworks` implementation.
 
diff --git a/13_integrated_testing/tests/00_console_sanity.rb b/13_integrated_testing/tests/00_console_sanity.rb
index a6b549b2a..dfd6b16ea 100644
--- a/13_integrated_testing/tests/00_console_sanity.rb
+++ b/13_integrated_testing/tests/00_console_sanity.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2019-2020 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 
 require 'expect'
 
diff --git a/13_integrated_testing/tests/00_console_sanity.rs b/13_integrated_testing/tests/00_console_sanity.rs
index 5aa38f098..08b654aef 100644
--- a/13_integrated_testing/tests/00_console_sanity.rs
+++ b/13_integrated_testing/tests/00_console_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Console sanity tests - RX, TX and statistics.
 
diff --git a/13_integrated_testing/tests/01_timer_sanity.rs b/13_integrated_testing/tests/01_timer_sanity.rs
index e0b3c1622..52dca0fca 100644
--- a/13_integrated_testing/tests/01_timer_sanity.rs
+++ b/13_integrated_testing/tests/01_timer_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer sanity tests.
 
diff --git a/13_integrated_testing/tests/02_exception_sync_page_fault.rs b/13_integrated_testing/tests/02_exception_sync_page_fault.rs
index 64fc5486e..bf2ba29f1 100644
--- a/13_integrated_testing/tests/02_exception_sync_page_fault.rs
+++ b/13_integrated_testing/tests/02_exception_sync_page_fault.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Page faults must result in synchronous exceptions.
 
diff --git a/13_integrated_testing/tests/panic_exit_failure/mod.rs b/13_integrated_testing/tests/panic_exit_failure/mod.rs
index b4ac73d1e..af2ba3781 100644
--- a/13_integrated_testing/tests/panic_exit_failure/mod.rs
+++ b/13_integrated_testing/tests/panic_exit_failure/mod.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 
 /// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
 #[no_mangle]
diff --git a/13_integrated_testing/tests/panic_exit_success/mod.rs b/13_integrated_testing/tests/panic_exit_success/mod.rs
index 54bb072d7..29d1f9750 100644
--- a/13_integrated_testing/tests/panic_exit_success/mod.rs
+++ b/13_integrated_testing/tests/panic_exit_success/mod.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 
 /// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
 #[no_mangle]
diff --git a/13_integrated_testing/tests/runner.rb b/13_integrated_testing/tests/runner.rb
index 2a0aa393e..53116e088 100755
--- a/13_integrated_testing/tests/runner.rb
+++ b/13_integrated_testing/tests/runner.rb
@@ -3,7 +3,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2019-2020 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 
 require 'English'
 require 'pty'
diff --git a/14_exceptions_part2_peripheral_IRQs/Makefile b/14_exceptions_part2_peripheral_IRQs/Makefile
index 58361af8a..4f7561dbd 100644
--- a/14_exceptions_part2_peripheral_IRQs/Makefile
+++ b/14_exceptions_part2_peripheral_IRQs/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 # Default to the RPi3
 BSP ?= rpi3
diff --git a/14_exceptions_part2_peripheral_IRQs/README.md b/14_exceptions_part2_peripheral_IRQs/README.md
index e3fa7e512..58e1bf22e 100644
--- a/14_exceptions_part2_peripheral_IRQs/README.md
+++ b/14_exceptions_part2_peripheral_IRQs/README.md
@@ -878,7 +878,7 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/arm/gicv2/gicc.rs 14_excep
 @@ -0,0 +1,137 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! GICC Driver - GIC CPU interface.
 +
@@ -1020,7 +1020,7 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/arm/gicv2/gicd.rs 14_excep
 @@ -0,0 +1,195 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! GICD Driver - GIC Distributor.
 +//!
@@ -1220,7 +1220,7 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/arm/gicv2.rs 14_exceptions
 @@ -0,0 +1,219 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! GICv2 Driver - ARM Generic Interrupt Controller v2.
 +//!
@@ -1444,7 +1444,7 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/arm.rs 14_exceptions_part2
 @@ -0,0 +1,9 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! ARM driver top level.
 +
@@ -1489,7 +1489,7 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_interrupt_cont
 @@ -0,0 +1,163 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Peripheral Interrupt regsler Driver.
 +
@@ -1657,7 +1657,7 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_interrupt_cont
 @@ -0,0 +1,131 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Interrupt Controller Driver.
 +
@@ -2095,7 +2095,7 @@ diff -uNr 13_integrated_testing/src/bsp/raspberrypi/exception/asynchronous.rs 14
 @@ -0,0 +1,36 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! BSP asynchronous exception handling.
 +
@@ -2136,7 +2136,7 @@ diff -uNr 13_integrated_testing/src/bsp/raspberrypi/exception.rs 14_exceptions_p
 @@ -0,0 +1,7 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! BSP synchronous and asynchronous exception handling.
 +
@@ -2511,7 +2511,7 @@ diff -uNr 13_integrated_testing/src/state.rs 14_exceptions_part2_peripheral_IRQs
 @@ -0,0 +1,92 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! State information about the kernel itself.
 +
@@ -2725,7 +2725,7 @@ diff -uNr 13_integrated_testing/tests/03_exception_irq_sanity.rs 14_exceptions_p
 @@ -0,0 +1,68 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! IRQ handling sanity tests.
 +
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu.rs b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu.rs
index 3e3ac706f..491f17ca8 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs
index 8429e1d2b..c80f7e780 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.S b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.S
index ee3b5497e..4d125334c 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.S
+++ b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.S
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 /// Call the function provided by parameter `\handler` after saving the exception context. Provide
 /// the context as the first parameter to '\handler'.
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
index a4451cde6..99fbd85bd 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural synchronous and asynchronous exception handling.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs
index df6a5c3f7..968eedf34 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural asynchronous exception handling.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
index 1ccb3fd71..5061f6007 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit Driver.
 //!
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/time.rs b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/time.rs
index af98ddd01..7f1bc6963 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/time.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp.rs b/14_exceptions_part2_peripheral_IRQs/src/bsp.rs
index 3a5657ade..257502491 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional re-exporting of Board Support Packages.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver.rs b/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver.rs
index 3fe1fa555..eac6bdd16 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm.rs b/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm.rs
index 6d9d3bdf0..0bb1bd4b6 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! ARM driver top level.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs b/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs
index 9981b9794..edbc41660 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICv2 Driver - ARM Generic Interrupt Controller v2.
 //!
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs b/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs
index c6708cdcd..424bafba3 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICC Driver - GIC CPU interface.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicd.rs b/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicd.rs
index 35f7eecd0..32c428089 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicd.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICD Driver - GIC Distributor.
 //!
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm.rs b/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm.rs
index 5e4c9e705..01bcaa895 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 88e68be13..aaf9e1caf 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
index 6b11224b6..dbe9988e8 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Interrupt Controller Driver.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index 94af8d746..79814d8c3 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Peripheral Interrupt regsler Driver.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 3207539c0..29bf95c13 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/common.rs b/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/common.rs
index cd2c07601..41553b7a5 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/common.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi.rs b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi.rs
index 25af58d6d..a2e2fa9a6 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/console.rs b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/console.rs
index 16b2f59bc..d6f95e4e9 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/console.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP console facilities.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/cpu.rs b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/cpu.rs
index 8410a9615..3951618d7 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/cpu.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/driver.rs b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/driver.rs
index 0b2348fbc..58949a815 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/driver.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception.rs b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception.rs
index 55e821198..94d0728ff 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP synchronous and asynchronous exception handling.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception/asynchronous.rs b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception/asynchronous.rs
index 787d59269..a253daa94 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception/asynchronous.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP asynchronous exception handling.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld
index 90d096ffe..4dfe60c7f 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT OR Apache-2.0
  *
- * Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+ * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
 SECTIONS
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
index 8cb07905b..44c20e2c8 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
index d5078b5a0..d41de813c 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management Unit.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/console.rs b/14_exceptions_part2_peripheral_IRQs/src/console.rs
index e6323a20d..2d38cc1d1 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/console.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/cpu.rs b/14_exceptions_part2_peripheral_IRQs/src/cpu.rs
index 9c67c0e7d..c9e5af72c 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/cpu.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/cpu/smp.rs b/14_exceptions_part2_peripheral_IRQs/src/cpu/smp.rs
index b1428884d..90ecbdf30 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/cpu/smp.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Symmetric multiprocessing.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/driver.rs b/14_exceptions_part2_peripheral_IRQs/src/driver.rs
index b7d44dad5..380eace51 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/driver.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/exception.rs b/14_exceptions_part2_peripheral_IRQs/src/exception.rs
index 81ea2b26e..dfa852a87 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/exception.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronous and asynchronous exception handling.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/exception/asynchronous.rs b/14_exceptions_part2_peripheral_IRQs/src/exception/asynchronous.rs
index 1a3902a3b..c16ce0077 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/exception/asynchronous.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Asynchronous exception handling.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/lib.rs b/14_exceptions_part2_peripheral_IRQs/src/lib.rs
index 100ed3f13..141adc3ab 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/lib.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/14_exceptions_part2_peripheral_IRQs/src/main.rs b/14_exceptions_part2_peripheral_IRQs/src/main.rs
index 737796134..6a21c8d41 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/main.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/14_exceptions_part2_peripheral_IRQs/src/memory.rs b/14_exceptions_part2_peripheral_IRQs/src/memory.rs
index 32353d4f6..1ef0285a6 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/memory.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs b/14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs
index 39f3ef3cd..163419ec0 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit.
 //!
diff --git a/14_exceptions_part2_peripheral_IRQs/src/panic_wait.rs b/14_exceptions_part2_peripheral_IRQs/src/panic_wait.rs
index 52a89d172..0b724abd7 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/panic_wait.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/print.rs b/14_exceptions_part2_peripheral_IRQs/src/print.rs
index 8b6f3f988..1ea96b6ad 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/print.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing facilities.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/runtime_init.rs b/14_exceptions_part2_peripheral_IRQs/src/runtime_init.rs
index 1306578dd..0a1c685cd 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/runtime_init.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/runtime_init.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Rust runtime initialization code.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/state.rs b/14_exceptions_part2_peripheral_IRQs/src/state.rs
index af1d93482..d08e67d6e 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/state.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/state.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! State information about the kernel itself.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/synchronization.rs b/14_exceptions_part2_peripheral_IRQs/src/synchronization.rs
index 039df47a4..6133826eb 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/synchronization.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/14_exceptions_part2_peripheral_IRQs/src/time.rs b/14_exceptions_part2_peripheral_IRQs/src/time.rs
index cd3ceec33..4f2f4e38f 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/time.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer primitives.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/test-macros/src/lib.rs b/14_exceptions_part2_peripheral_IRQs/test-macros/src/lib.rs
index 092c4806e..36c95e8a6 100644
--- a/14_exceptions_part2_peripheral_IRQs/test-macros/src/lib.rs
+++ b/14_exceptions_part2_peripheral_IRQs/test-macros/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 
 use proc_macro::TokenStream;
 use proc_macro2::Span;
diff --git a/14_exceptions_part2_peripheral_IRQs/test-types/src/lib.rs b/14_exceptions_part2_peripheral_IRQs/test-types/src/lib.rs
index 371bb5574..fe7d918f5 100644
--- a/14_exceptions_part2_peripheral_IRQs/test-types/src/lib.rs
+++ b/14_exceptions_part2_peripheral_IRQs/test-types/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Types for the `custom_test_frameworks` implementation.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rb b/14_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rb
index a6b549b2a..dfd6b16ea 100644
--- a/14_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rb
+++ b/14_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2019-2020 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 
 require 'expect'
 
diff --git a/14_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs b/14_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs
index 5aa38f098..08b654aef 100644
--- a/14_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs
+++ b/14_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Console sanity tests - RX, TX and statistics.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/tests/01_timer_sanity.rs b/14_exceptions_part2_peripheral_IRQs/tests/01_timer_sanity.rs
index e0b3c1622..52dca0fca 100644
--- a/14_exceptions_part2_peripheral_IRQs/tests/01_timer_sanity.rs
+++ b/14_exceptions_part2_peripheral_IRQs/tests/01_timer_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer sanity tests.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs b/14_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs
index 64fc5486e..bf2ba29f1 100644
--- a/14_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs
+++ b/14_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Page faults must result in synchronous exceptions.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/tests/03_exception_irq_sanity.rs b/14_exceptions_part2_peripheral_IRQs/tests/03_exception_irq_sanity.rs
index 6e2ae8f7c..1f3bb7702 100644
--- a/14_exceptions_part2_peripheral_IRQs/tests/03_exception_irq_sanity.rs
+++ b/14_exceptions_part2_peripheral_IRQs/tests/03_exception_irq_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! IRQ handling sanity tests.
 
diff --git a/14_exceptions_part2_peripheral_IRQs/tests/panic_exit_failure/mod.rs b/14_exceptions_part2_peripheral_IRQs/tests/panic_exit_failure/mod.rs
index b4ac73d1e..af2ba3781 100644
--- a/14_exceptions_part2_peripheral_IRQs/tests/panic_exit_failure/mod.rs
+++ b/14_exceptions_part2_peripheral_IRQs/tests/panic_exit_failure/mod.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 
 /// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
 #[no_mangle]
diff --git a/14_exceptions_part2_peripheral_IRQs/tests/panic_exit_success/mod.rs b/14_exceptions_part2_peripheral_IRQs/tests/panic_exit_success/mod.rs
index 54bb072d7..29d1f9750 100644
--- a/14_exceptions_part2_peripheral_IRQs/tests/panic_exit_success/mod.rs
+++ b/14_exceptions_part2_peripheral_IRQs/tests/panic_exit_success/mod.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 
 /// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
 #[no_mangle]
diff --git a/14_exceptions_part2_peripheral_IRQs/tests/runner.rb b/14_exceptions_part2_peripheral_IRQs/tests/runner.rb
index 2a0aa393e..53116e088 100755
--- a/14_exceptions_part2_peripheral_IRQs/tests/runner.rb
+++ b/14_exceptions_part2_peripheral_IRQs/tests/runner.rb
@@ -3,7 +3,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2019-2020 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 
 require 'English'
 require 'pty'
diff --git a/15_virtual_mem_part2_mmio_remap/Makefile b/15_virtual_mem_part2_mmio_remap/Makefile
index 58361af8a..4f7561dbd 100644
--- a/15_virtual_mem_part2_mmio_remap/Makefile
+++ b/15_virtual_mem_part2_mmio_remap/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 # Default to the RPi3
 BSP ?= rpi3
diff --git a/15_virtual_mem_part2_mmio_remap/README.md b/15_virtual_mem_part2_mmio_remap/README.md
index 312bb5f19..f7a9b1921 100644
--- a/15_virtual_mem_part2_mmio_remap/README.md
+++ b/15_virtual_mem_part2_mmio_remap/README.md
@@ -1140,7 +1140,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
 +++ 15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
 @@ -2,12 +2,14 @@
  //
- // Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+ // Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 -//! Peripheral Interrupt regsler Driver.
 +//! Peripheral Interrupt Controller Driver.
@@ -1695,7 +1695,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 15_v
 --- 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
 +++ 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
 @@ -3,9 +3,41 @@
- // Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+ // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
  //! BSP Memory Management.
 +//!
@@ -1943,7 +1943,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/common.rs 15_virtual_mem_part2
 @@ -0,0 +1,21 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! General purpose code.
 +
@@ -2089,7 +2089,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/mapping_record.rs 1
 @@ -0,0 +1,221 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! A record of mapped pages.
 +
@@ -2315,7 +2315,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 15_virtual
 @@ -0,0 +1,283 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Memory Management Unit Types.
 +
@@ -2601,7 +2601,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 15_virtual_mem_p
 --- 14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs
 +++ 15_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
 @@ -3,23 +3,18 @@
- // Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+ // Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
  //! Memory Management Unit.
 -//!
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu.rs b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu.rs
index d8bcc895c..6ecea1825 100644
--- a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/smp.rs b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/smp.rs
index 8429e1d2b..c80f7e780 100644
--- a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/smp.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.S b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.S
index ee3b5497e..4d125334c 100644
--- a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.S
+++ b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.S
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 /// Call the function provided by parameter `\handler` after saving the exception context. Provide
 /// the context as the first parameter to '\handler'.
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
index a4451cde6..99fbd85bd 100644
--- a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural synchronous and asynchronous exception handling.
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception/asynchronous.rs b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception/asynchronous.rs
index df6a5c3f7..968eedf34 100644
--- a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception/asynchronous.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural asynchronous exception handling.
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
index cf0989bef..0e45185e3 100644
--- a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit Driver.
 //!
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/time.rs b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/time.rs
index e9b0234db..a2c57eb09 100644
--- a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/time.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp.rs b/15_virtual_mem_part2_mmio_remap/src/bsp.rs
index 3a5657ade..257502491 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional re-exporting of Board Support Packages.
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver.rs
index 3fe1fa555..eac6bdd16 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm.rs
index 6d9d3bdf0..0bb1bd4b6 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! ARM driver top level.
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs
index 9b23af353..e7a37697e 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICv2 Driver - ARM Generic Interrupt Controller v2.
 //!
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicc.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicc.rs
index ee1b64087..a1279f956 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicc.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicc.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICC Driver - GIC CPU interface.
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicd.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicd.rs
index f221e7246..5f56e54a1 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicd.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICD Driver - GIC Distributor.
 //!
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm.rs
index 5e4c9e705..01bcaa895 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 680ad4cb9..c1fa1d14c 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
index d6ecf677a..dfc5b66ed 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Interrupt Controller Driver.
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index 35cf7c1db..8fe915b34 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Peripheral Interrupt Controller Driver.
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 374331741..c2354d430 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/common.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/common.rs
index cd2c07601..41553b7a5 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/common.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi.rs
index 7ffb72499..10d482781 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs
index c5d0e05a5..f63a9e9bb 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP console facilities.
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/cpu.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/cpu.rs
index 8410a9615..3951618d7 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/cpu.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/driver.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/driver.rs
index 313b957e0..4d5007e4e 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/driver.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/exception.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/exception.rs
index 55e821198..94d0728ff 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/exception.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP synchronous and asynchronous exception handling.
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/exception/asynchronous.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/exception/asynchronous.rs
index 787d59269..a253daa94 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/exception/asynchronous.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP asynchronous exception handling.
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
index ae5c28196..e5975256f 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT OR Apache-2.0
  *
- * Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+ * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
 SECTIONS
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
index 5c05e2080..9d359cb7c 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 //!
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
index 41f55941d..fc16c87c2 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management Unit.
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/common.rs b/15_virtual_mem_part2_mmio_remap/src/common.rs
index 58209804b..71443cfbd 100644
--- a/15_virtual_mem_part2_mmio_remap/src/common.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! General purpose code.
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/console.rs b/15_virtual_mem_part2_mmio_remap/src/console.rs
index e6323a20d..2d38cc1d1 100644
--- a/15_virtual_mem_part2_mmio_remap/src/console.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/cpu.rs b/15_virtual_mem_part2_mmio_remap/src/cpu.rs
index 9c67c0e7d..c9e5af72c 100644
--- a/15_virtual_mem_part2_mmio_remap/src/cpu.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/cpu/smp.rs b/15_virtual_mem_part2_mmio_remap/src/cpu/smp.rs
index b1428884d..90ecbdf30 100644
--- a/15_virtual_mem_part2_mmio_remap/src/cpu/smp.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Symmetric multiprocessing.
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/driver.rs b/15_virtual_mem_part2_mmio_remap/src/driver.rs
index b6875b7f7..83fac4a7c 100644
--- a/15_virtual_mem_part2_mmio_remap/src/driver.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/exception.rs b/15_virtual_mem_part2_mmio_remap/src/exception.rs
index 81ea2b26e..dfa852a87 100644
--- a/15_virtual_mem_part2_mmio_remap/src/exception.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronous and asynchronous exception handling.
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/exception/asynchronous.rs b/15_virtual_mem_part2_mmio_remap/src/exception/asynchronous.rs
index 1a3902a3b..c16ce0077 100644
--- a/15_virtual_mem_part2_mmio_remap/src/exception/asynchronous.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Asynchronous exception handling.
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/lib.rs b/15_virtual_mem_part2_mmio_remap/src/lib.rs
index 50789867e..9ff2a50c7 100644
--- a/15_virtual_mem_part2_mmio_remap/src/lib.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/15_virtual_mem_part2_mmio_remap/src/main.rs b/15_virtual_mem_part2_mmio_remap/src/main.rs
index d693bee68..11bb6902d 100644
--- a/15_virtual_mem_part2_mmio_remap/src/main.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/15_virtual_mem_part2_mmio_remap/src/memory.rs b/15_virtual_mem_part2_mmio_remap/src/memory.rs
index 32353d4f6..1ef0285a6 100644
--- a/15_virtual_mem_part2_mmio_remap/src/memory.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management.
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/memory/mmu.rs b/15_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
index 778fd646f..9204874a9 100644
--- a/15_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit.
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs b/15_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs
index f46e629ed..cd3378089 100644
--- a/15_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! A record of mapped pages.
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs b/15_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
index d0098f6f2..cea7bb39c 100644
--- a/15_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit Types.
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/panic_wait.rs b/15_virtual_mem_part2_mmio_remap/src/panic_wait.rs
index 52a89d172..0b724abd7 100644
--- a/15_virtual_mem_part2_mmio_remap/src/panic_wait.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/print.rs b/15_virtual_mem_part2_mmio_remap/src/print.rs
index 8b6f3f988..1ea96b6ad 100644
--- a/15_virtual_mem_part2_mmio_remap/src/print.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing facilities.
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/runtime_init.rs b/15_virtual_mem_part2_mmio_remap/src/runtime_init.rs
index 1306578dd..0a1c685cd 100644
--- a/15_virtual_mem_part2_mmio_remap/src/runtime_init.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/runtime_init.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Rust runtime initialization code.
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/state.rs b/15_virtual_mem_part2_mmio_remap/src/state.rs
index af1d93482..d08e67d6e 100644
--- a/15_virtual_mem_part2_mmio_remap/src/state.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/state.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! State information about the kernel itself.
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/synchronization.rs b/15_virtual_mem_part2_mmio_remap/src/synchronization.rs
index 039df47a4..6133826eb 100644
--- a/15_virtual_mem_part2_mmio_remap/src/synchronization.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/15_virtual_mem_part2_mmio_remap/src/time.rs b/15_virtual_mem_part2_mmio_remap/src/time.rs
index cd3ceec33..4f2f4e38f 100644
--- a/15_virtual_mem_part2_mmio_remap/src/time.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer primitives.
 
diff --git a/15_virtual_mem_part2_mmio_remap/test-macros/src/lib.rs b/15_virtual_mem_part2_mmio_remap/test-macros/src/lib.rs
index 092c4806e..36c95e8a6 100644
--- a/15_virtual_mem_part2_mmio_remap/test-macros/src/lib.rs
+++ b/15_virtual_mem_part2_mmio_remap/test-macros/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 
 use proc_macro::TokenStream;
 use proc_macro2::Span;
diff --git a/15_virtual_mem_part2_mmio_remap/test-types/src/lib.rs b/15_virtual_mem_part2_mmio_remap/test-types/src/lib.rs
index 371bb5574..fe7d918f5 100644
--- a/15_virtual_mem_part2_mmio_remap/test-types/src/lib.rs
+++ b/15_virtual_mem_part2_mmio_remap/test-types/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Types for the `custom_test_frameworks` implementation.
 
diff --git a/15_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rb b/15_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rb
index a6b549b2a..dfd6b16ea 100644
--- a/15_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rb
+++ b/15_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2019-2020 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 
 require 'expect'
 
diff --git a/15_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs b/15_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs
index 5aa38f098..08b654aef 100644
--- a/15_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs
+++ b/15_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Console sanity tests - RX, TX and statistics.
 
diff --git a/15_virtual_mem_part2_mmio_remap/tests/01_timer_sanity.rs b/15_virtual_mem_part2_mmio_remap/tests/01_timer_sanity.rs
index e0b3c1622..52dca0fca 100644
--- a/15_virtual_mem_part2_mmio_remap/tests/01_timer_sanity.rs
+++ b/15_virtual_mem_part2_mmio_remap/tests/01_timer_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer sanity tests.
 
diff --git a/15_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs b/15_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
index 0e219a8fb..858357a4d 100644
--- a/15_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
+++ b/15_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Page faults must result in synchronous exceptions.
 
diff --git a/15_virtual_mem_part2_mmio_remap/tests/03_exception_irq_sanity.rs b/15_virtual_mem_part2_mmio_remap/tests/03_exception_irq_sanity.rs
index 6e2ae8f7c..1f3bb7702 100644
--- a/15_virtual_mem_part2_mmio_remap/tests/03_exception_irq_sanity.rs
+++ b/15_virtual_mem_part2_mmio_remap/tests/03_exception_irq_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! IRQ handling sanity tests.
 
diff --git a/15_virtual_mem_part2_mmio_remap/tests/panic_exit_failure/mod.rs b/15_virtual_mem_part2_mmio_remap/tests/panic_exit_failure/mod.rs
index b4ac73d1e..af2ba3781 100644
--- a/15_virtual_mem_part2_mmio_remap/tests/panic_exit_failure/mod.rs
+++ b/15_virtual_mem_part2_mmio_remap/tests/panic_exit_failure/mod.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 
 /// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
 #[no_mangle]
diff --git a/15_virtual_mem_part2_mmio_remap/tests/panic_exit_success/mod.rs b/15_virtual_mem_part2_mmio_remap/tests/panic_exit_success/mod.rs
index 54bb072d7..29d1f9750 100644
--- a/15_virtual_mem_part2_mmio_remap/tests/panic_exit_success/mod.rs
+++ b/15_virtual_mem_part2_mmio_remap/tests/panic_exit_success/mod.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 
 /// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
 #[no_mangle]
diff --git a/15_virtual_mem_part2_mmio_remap/tests/runner.rb b/15_virtual_mem_part2_mmio_remap/tests/runner.rb
index 2a0aa393e..53116e088 100755
--- a/15_virtual_mem_part2_mmio_remap/tests/runner.rb
+++ b/15_virtual_mem_part2_mmio_remap/tests/runner.rb
@@ -3,7 +3,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2019-2020 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 
 require 'English'
 require 'pty'
diff --git a/X1_JTAG_boot/Makefile b/X1_JTAG_boot/Makefile
index 2f04337ed..071167b9e 100644
--- a/X1_JTAG_boot/Makefile
+++ b/X1_JTAG_boot/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 # Default to the RPi3
 BSP ?= rpi3
diff --git a/X1_JTAG_boot/src/_arch/aarch64/cpu.rs b/X1_JTAG_boot/src/_arch/aarch64/cpu.rs
index eac29d8d7..6072751db 100644
--- a/X1_JTAG_boot/src/_arch/aarch64/cpu.rs
+++ b/X1_JTAG_boot/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 
diff --git a/X1_JTAG_boot/src/_arch/aarch64/cpu/smp.rs b/X1_JTAG_boot/src/_arch/aarch64/cpu/smp.rs
index 8429e1d2b..c80f7e780 100644
--- a/X1_JTAG_boot/src/_arch/aarch64/cpu/smp.rs
+++ b/X1_JTAG_boot/src/_arch/aarch64/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
 
diff --git a/X1_JTAG_boot/src/_arch/aarch64/time.rs b/X1_JTAG_boot/src/_arch/aarch64/time.rs
index af98ddd01..7f1bc6963 100644
--- a/X1_JTAG_boot/src/_arch/aarch64/time.rs
+++ b/X1_JTAG_boot/src/_arch/aarch64/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
 
diff --git a/X1_JTAG_boot/src/bsp.rs b/X1_JTAG_boot/src/bsp.rs
index 3a5657ade..257502491 100644
--- a/X1_JTAG_boot/src/bsp.rs
+++ b/X1_JTAG_boot/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional re-exporting of Board Support Packages.
 
diff --git a/X1_JTAG_boot/src/bsp/device_driver.rs b/X1_JTAG_boot/src/bsp/device_driver.rs
index ce7396f22..2fcbc83e7 100644
--- a/X1_JTAG_boot/src/bsp/device_driver.rs
+++ b/X1_JTAG_boot/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/X1_JTAG_boot/src/bsp/device_driver/bcm.rs b/X1_JTAG_boot/src/bsp/device_driver/bcm.rs
index 59071d5d8..77613d261 100644
--- a/X1_JTAG_boot/src/bsp/device_driver/bcm.rs
+++ b/X1_JTAG_boot/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 15bd3b78b..41d8b861c 100644
--- a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index e39bc7cdb..66b734638 100644
--- a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 
diff --git a/X1_JTAG_boot/src/bsp/device_driver/common.rs b/X1_JTAG_boot/src/bsp/device_driver/common.rs
index cd2c07601..41553b7a5 100644
--- a/X1_JTAG_boot/src/bsp/device_driver/common.rs
+++ b/X1_JTAG_boot/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/X1_JTAG_boot/src/bsp/raspberrypi.rs b/X1_JTAG_boot/src/bsp/raspberrypi.rs
index a4a812327..ecc6fd108 100644
--- a/X1_JTAG_boot/src/bsp/raspberrypi.rs
+++ b/X1_JTAG_boot/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/X1_JTAG_boot/src/bsp/raspberrypi/console.rs b/X1_JTAG_boot/src/bsp/raspberrypi/console.rs
index d1b60dd82..c6bb5263c 100644
--- a/X1_JTAG_boot/src/bsp/raspberrypi/console.rs
+++ b/X1_JTAG_boot/src/bsp/raspberrypi/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP console facilities.
 
diff --git a/X1_JTAG_boot/src/bsp/raspberrypi/cpu.rs b/X1_JTAG_boot/src/bsp/raspberrypi/cpu.rs
index 8410a9615..3951618d7 100644
--- a/X1_JTAG_boot/src/bsp/raspberrypi/cpu.rs
+++ b/X1_JTAG_boot/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/X1_JTAG_boot/src/bsp/raspberrypi/driver.rs b/X1_JTAG_boot/src/bsp/raspberrypi/driver.rs
index fe24dd71b..ab910185c 100644
--- a/X1_JTAG_boot/src/bsp/raspberrypi/driver.rs
+++ b/X1_JTAG_boot/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/X1_JTAG_boot/src/bsp/raspberrypi/link.ld b/X1_JTAG_boot/src/bsp/raspberrypi/link.ld
index c03bb5e54..573abc5f0 100644
--- a/X1_JTAG_boot/src/bsp/raspberrypi/link.ld
+++ b/X1_JTAG_boot/src/bsp/raspberrypi/link.ld
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT OR Apache-2.0
  *
- * Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+ * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
 SECTIONS
diff --git a/X1_JTAG_boot/src/bsp/raspberrypi/memory.rs b/X1_JTAG_boot/src/bsp/raspberrypi/memory.rs
index fae051257..fb47b1418 100644
--- a/X1_JTAG_boot/src/bsp/raspberrypi/memory.rs
+++ b/X1_JTAG_boot/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 
diff --git a/X1_JTAG_boot/src/console.rs b/X1_JTAG_boot/src/console.rs
index e6323a20d..2d38cc1d1 100644
--- a/X1_JTAG_boot/src/console.rs
+++ b/X1_JTAG_boot/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/X1_JTAG_boot/src/cpu.rs b/X1_JTAG_boot/src/cpu.rs
index 9c67c0e7d..c9e5af72c 100644
--- a/X1_JTAG_boot/src/cpu.rs
+++ b/X1_JTAG_boot/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/X1_JTAG_boot/src/cpu/smp.rs b/X1_JTAG_boot/src/cpu/smp.rs
index b1428884d..90ecbdf30 100644
--- a/X1_JTAG_boot/src/cpu/smp.rs
+++ b/X1_JTAG_boot/src/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Symmetric multiprocessing.
 
diff --git a/X1_JTAG_boot/src/driver.rs b/X1_JTAG_boot/src/driver.rs
index e2875b876..6e8c5533a 100644
--- a/X1_JTAG_boot/src/driver.rs
+++ b/X1_JTAG_boot/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/X1_JTAG_boot/src/main.rs b/X1_JTAG_boot/src/main.rs
index 85db786de..5e54c329c 100644
--- a/X1_JTAG_boot/src/main.rs
+++ b/X1_JTAG_boot/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/X1_JTAG_boot/src/memory.rs b/X1_JTAG_boot/src/memory.rs
index 827b8b850..1f79e0c95 100644
--- a/X1_JTAG_boot/src/memory.rs
+++ b/X1_JTAG_boot/src/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management.
 
diff --git a/X1_JTAG_boot/src/panic_wait.rs b/X1_JTAG_boot/src/panic_wait.rs
index 1386e1e23..7980f5de5 100644
--- a/X1_JTAG_boot/src/panic_wait.rs
+++ b/X1_JTAG_boot/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/X1_JTAG_boot/src/print.rs b/X1_JTAG_boot/src/print.rs
index 8b6f3f988..1ea96b6ad 100644
--- a/X1_JTAG_boot/src/print.rs
+++ b/X1_JTAG_boot/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing facilities.
 
diff --git a/X1_JTAG_boot/src/runtime_init.rs b/X1_JTAG_boot/src/runtime_init.rs
index 9de285958..ee0946863 100644
--- a/X1_JTAG_boot/src/runtime_init.rs
+++ b/X1_JTAG_boot/src/runtime_init.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Rust runtime initialization code.
 
diff --git a/X1_JTAG_boot/src/synchronization.rs b/X1_JTAG_boot/src/synchronization.rs
index 6de32807c..f956b5cdd 100644
--- a/X1_JTAG_boot/src/synchronization.rs
+++ b/X1_JTAG_boot/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/X1_JTAG_boot/src/time.rs b/X1_JTAG_boot/src/time.rs
index cd3ceec33..4f2f4e38f 100644
--- a/X1_JTAG_boot/src/time.rs
+++ b/X1_JTAG_boot/src/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer primitives.
 
diff --git a/docker/rustembedded-osdev-utils/Dockerfile b/docker/rustembedded-osdev-utils/Dockerfile
index 0ee3d9886..7127bd14b 100644
--- a/docker/rustembedded-osdev-utils/Dockerfile
+++ b/docker/rustembedded-osdev-utils/Dockerfile
@@ -1,7 +1,7 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2017-2020 Andre Richter <andre.o.richter@gmail.com>
-## Copyright (c) 2019-2020 Nao Taco <naotaco@gmail.com>
+## Copyright (c) 2017-2021 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2019-2021 Nao Taco <naotaco@gmail.com>
 FROM ubuntu:20.04
 
 ARG VCS_REF
diff --git a/docker/rustembedded-osdev-utils/Makefile b/docker/rustembedded-osdev-utils/Makefile
index 4b9f70f5e..e40b5ac4f 100644
--- a/docker/rustembedded-osdev-utils/Makefile
+++ b/docker/rustembedded-osdev-utils/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2019-2020 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 
 default: docker_build
 
diff --git a/utils/devtool.rb b/utils/devtool.rb
index 823cdcda7..47e3404af 100755
--- a/utils/devtool.rb
+++ b/utils/devtool.rb
@@ -3,7 +3,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 require 'rubygems'
 require 'bundler/setup'
diff --git a/utils/devtool/copyright.rb b/utils/devtool/copyright.rb
index 5da012562..956efce10 100644
--- a/utils/devtool/copyright.rb
+++ b/utils/devtool/copyright.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 require 'colorize'
 
diff --git a/utils/diff_tut_folders.bash b/utils/diff_tut_folders.bash
index 6952f8e8b..65a0e7fa6 100755
--- a/utils/diff_tut_folders.bash
+++ b/utils/diff_tut_folders.bash
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 DIFF=$(
     diff -uNr \
@@ -13,7 +13,7 @@ DIFF=$(
 	 -x Cargo.lock \
 	 -x target \
 	 $1 $2 \
-	| sed -r "s/[12][90][127][90]-[0-9][0-9]-[0-9][0-9] .*//g" \
+	| sed -r "s/[12][90][127][0-9]-[0-9][0-9]-[0-9][0-9] .*//g" \
 	| sed -r "s/[[:space:]]*$//g" \
 	| sed -r "s/%/modulo/g" \
         | sed -r "s/diff -uNr -x README.md -x README.CN.md -x kernel -x kernel8.img -x Cargo.lock -x target/\ndiff -uNr/g"
diff --git a/utils/minipush.rb b/utils/minipush.rb
index 710013437..e06433a8a 100755
--- a/utils/minipush.rb
+++ b/utils/minipush.rb
@@ -3,7 +3,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 require_relative 'miniterm'
 require 'ruby-progressbar'
diff --git a/utils/minipush/progressbar_patch.rb b/utils/minipush/progressbar_patch.rb
index 734540646..2be5ad5a3 100644
--- a/utils/minipush/progressbar_patch.rb
+++ b/utils/minipush/progressbar_patch.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 # Monkey-patch ruby-progressbar so that it supports reporting the progress in KiB instead of Byte.
 
diff --git a/utils/miniterm.rb b/utils/miniterm.rb
index 6b2c2f633..0875ada55 100755
--- a/utils/miniterm.rb
+++ b/utils/miniterm.rb
@@ -3,7 +3,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
 require 'rubygems'
 require 'bundler/setup'
diff --git a/utils/update_copyright.rb b/utils/update_copyright.rb
new file mode 100755
index 000000000..2d56fd816
--- /dev/null
+++ b/utils/update_copyright.rb
@@ -0,0 +1,20 @@
+#!/usr/bin/env ruby
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+require 'date'
+
+files = `git ls-files`.split("\n")
+files = files.delete_if { |f| File.symlink?(f) }
+files = files.join(' ')
+
+year = Date.today.year
+
+# Update "Copyright (c) 20..-20.."
+`sed -i -- 's,\\(Copyright .c. 20..\\)-20..,\\1-#{year},g' #{files}`
+
+# Update "Copyright (c) 20.. Name" -> "Copyright (c) 20..-20.. Name"
+`sed -i -- 's,\\(Copyright .c. 20..\\) ,\\1-#{year} ,g' #{files}`

From 9b89f297d70f6df1fe7656947f6c8da3c56ecc4a Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Fri, 1 Jan 2021 12:04:01 +0100
Subject: [PATCH 013/214] Update dependencies

---
 04_zero_overhead_abstraction/Cargo.lock       |   8 ++++----
 05_safe_globals/Cargo.lock                    |   8 ++++----
 06_drivers_gpio_uart/Cargo.lock               |   8 ++++----
 07_uart_chainloader/Cargo.lock                |   8 ++++----
 07_uart_chainloader/demo_payload_rpi3.img     | Bin 6712 -> 6712 bytes
 07_uart_chainloader/demo_payload_rpi4.img     | Bin 6592 -> 6592 bytes
 08_timestamps/Cargo.lock                      |   8 ++++----
 09_hw_debug_JTAG/Cargo.lock                   |   8 ++++----
 10_privilege_level/Cargo.lock                 |   8 ++++----
 .../Cargo.lock                                |   8 ++++----
 12_exceptions_part1_groundwork/Cargo.lock     |   8 ++++----
 13_integrated_testing/Cargo.lock              |  12 ++++++------
 .../Cargo.lock                                |  12 ++++++------
 15_virtual_mem_part2_mmio_remap/Cargo.lock    |  12 ++++++------
 14 files changed, 54 insertions(+), 54 deletions(-)

diff --git a/04_zero_overhead_abstraction/Cargo.lock b/04_zero_overhead_abstraction/Cargo.lock
index 235957ef8..dd0cd5773 100644
--- a/04_zero_overhead_abstraction/Cargo.lock
+++ b/04_zero_overhead_abstraction/Cargo.lock
@@ -2,9 +2,9 @@
 # It is not intended for manual editing.
 [[package]]
 name = "cortex-a"
-version = "5.1.0"
+version = "5.1.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "dc37a4862a4f5b40df96f5e0f3bd4ce6a1bd8bb59a965cd476844673faf83896"
+checksum = "7c9b7504606c9e83a6b35e6f99db890084baf13fbbed67603fcc2a62b2cfe62b"
 dependencies = [
  "register",
 ]
@@ -18,9 +18,9 @@ dependencies = [
 
 [[package]]
 name = "register"
-version = "1.0.1"
+version = "1.0.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "faf386c0c48fea132b7fbbf71c32d1b1d62e7c59043bbabdd15c9ed9f254517e"
+checksum = "f4a247de29ab7cc8f5006cfe775c4a81c704f9914c5e2a79696862e643135433"
 dependencies = [
  "tock-registers",
 ]
diff --git a/05_safe_globals/Cargo.lock b/05_safe_globals/Cargo.lock
index 235957ef8..dd0cd5773 100644
--- a/05_safe_globals/Cargo.lock
+++ b/05_safe_globals/Cargo.lock
@@ -2,9 +2,9 @@
 # It is not intended for manual editing.
 [[package]]
 name = "cortex-a"
-version = "5.1.0"
+version = "5.1.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "dc37a4862a4f5b40df96f5e0f3bd4ce6a1bd8bb59a965cd476844673faf83896"
+checksum = "7c9b7504606c9e83a6b35e6f99db890084baf13fbbed67603fcc2a62b2cfe62b"
 dependencies = [
  "register",
 ]
@@ -18,9 +18,9 @@ dependencies = [
 
 [[package]]
 name = "register"
-version = "1.0.1"
+version = "1.0.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "faf386c0c48fea132b7fbbf71c32d1b1d62e7c59043bbabdd15c9ed9f254517e"
+checksum = "f4a247de29ab7cc8f5006cfe775c4a81c704f9914c5e2a79696862e643135433"
 dependencies = [
  "tock-registers",
 ]
diff --git a/06_drivers_gpio_uart/Cargo.lock b/06_drivers_gpio_uart/Cargo.lock
index 115e07626..e2d680a76 100644
--- a/06_drivers_gpio_uart/Cargo.lock
+++ b/06_drivers_gpio_uart/Cargo.lock
@@ -2,9 +2,9 @@
 # It is not intended for manual editing.
 [[package]]
 name = "cortex-a"
-version = "5.1.0"
+version = "5.1.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "dc37a4862a4f5b40df96f5e0f3bd4ce6a1bd8bb59a965cd476844673faf83896"
+checksum = "7c9b7504606c9e83a6b35e6f99db890084baf13fbbed67603fcc2a62b2cfe62b"
 dependencies = [
  "register",
 ]
@@ -19,9 +19,9 @@ dependencies = [
 
 [[package]]
 name = "register"
-version = "1.0.1"
+version = "1.0.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "faf386c0c48fea132b7fbbf71c32d1b1d62e7c59043bbabdd15c9ed9f254517e"
+checksum = "f4a247de29ab7cc8f5006cfe775c4a81c704f9914c5e2a79696862e643135433"
 dependencies = [
  "tock-registers",
 ]
diff --git a/07_uart_chainloader/Cargo.lock b/07_uart_chainloader/Cargo.lock
index 115e07626..e2d680a76 100644
--- a/07_uart_chainloader/Cargo.lock
+++ b/07_uart_chainloader/Cargo.lock
@@ -2,9 +2,9 @@
 # It is not intended for manual editing.
 [[package]]
 name = "cortex-a"
-version = "5.1.0"
+version = "5.1.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "dc37a4862a4f5b40df96f5e0f3bd4ce6a1bd8bb59a965cd476844673faf83896"
+checksum = "7c9b7504606c9e83a6b35e6f99db890084baf13fbbed67603fcc2a62b2cfe62b"
 dependencies = [
  "register",
 ]
@@ -19,9 +19,9 @@ dependencies = [
 
 [[package]]
 name = "register"
-version = "1.0.1"
+version = "1.0.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "faf386c0c48fea132b7fbbf71c32d1b1d62e7c59043bbabdd15c9ed9f254517e"
+checksum = "f4a247de29ab7cc8f5006cfe775c4a81c704f9914c5e2a79696862e643135433"
 dependencies = [
  "tock-registers",
 ]
diff --git a/07_uart_chainloader/demo_payload_rpi3.img b/07_uart_chainloader/demo_payload_rpi3.img
index cb83285f1b2ca41d0175a18604b3e5cca9882987..7b314d3c9d3ff8f3360db8b5c7c4e5f4b0989ed9 100755
GIT binary patch
delta 115
zcmdmCvcqJ<MSiA_B9kxkJ2I}EEGiJf^hsoMwtz3w<UK+WlLdqmnH)to7Ym<cl;lux
zSow&Van%E6j#UqtIaf9O`!CMG;P5kVa;T^=6OZubF41jFKzg#1gc^v-f>2tLa+5bm
MRDcv{N%AoQ00LwqssI20

delta 120
zcmdmCvcqJ<MSdnh(aD$j9T`_m78M9#5)$2<E#S+<a)3Gh+T<NV5tBuPW0^jRY%Uf)
z$tcOd;PA8f-+yrq6^E6Nm>E|+VCGo$kePE;-Q-YFW2PNKo4Z7}F#+kxP7-P$Dhons
RNy<&$AW;EQpe4!22mrnyC++|M

diff --git a/07_uart_chainloader/demo_payload_rpi4.img b/07_uart_chainloader/demo_payload_rpi4.img
index 9abdf41e85b09f016e2b760668f110cab1de31e2..a7c0fdc068b7a1db1a3e23a3c4c940d9805fde3b 100755
GIT binary patch
delta 359
zcmX?Le86~u3d;fJ_-h+gSeO{sZPsMk%*uFW^IdiWR>sGh`FNKz3Mm>*<Yr))z{9|>
z;gvJP#B4^J$;bIp8FMG=@~1Oin>>}jn{nl2MS=T#9~l^?JZNWH`ThU@58s70^9gQa
zoP0vag;94huduYB*#H026&Mt*{6EZi@t-ln&##j$g_kqxO@1gmpOI~Hqlmg}<3EUs
zN6d_?I9ME3K49ipwd~)2aRvs5pHn6u74dddVc=i@0SJkp1DGHp8c-PtDBsE1S0TX1
zz|c@3)G;W8f#JpEKv8kVH=8p><C&OL7$%<*SA&}=0X7+7W(+gL%p52Uvm2_6ff35c
Pm~1FfFNs_Bq{Mds-U(GF

delta 359
zcmX?Le86~u%0>+qCdT!fb(uD^GG5*Mkllcl@$zON-sOx!f<_a$85kz;FfeR*<;*ZK
z`=j;b(|oCnd6NzK(;2T%p2^?MxN5Shz<s_?3=C5qv@@;z{{R1n?@XJ81h+A=9AJ*W
zHu;2*3!~0tUSVlL(f|LaD=;Wr`G1)4;y+`CpI;_h3NL5Wo%~REJ|pYoMiF({hJO$h
zkC+)(aj-b7e89}HYU#iK;tUK9KPOK<D&p;UM2Ld{1Rx}W_F;mEs6b^zpnNB1Uxff4
z14BcFP{*JU28Jh-14YFdUu@14jb~yyA~gAwxEkC{39!isGb5NGW@bQXnB7oi42)1l
Q%49={dP&@}CndfE03mi+UH||9

diff --git a/08_timestamps/Cargo.lock b/08_timestamps/Cargo.lock
index 115e07626..e2d680a76 100644
--- a/08_timestamps/Cargo.lock
+++ b/08_timestamps/Cargo.lock
@@ -2,9 +2,9 @@
 # It is not intended for manual editing.
 [[package]]
 name = "cortex-a"
-version = "5.1.0"
+version = "5.1.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "dc37a4862a4f5b40df96f5e0f3bd4ce6a1bd8bb59a965cd476844673faf83896"
+checksum = "7c9b7504606c9e83a6b35e6f99db890084baf13fbbed67603fcc2a62b2cfe62b"
 dependencies = [
  "register",
 ]
@@ -19,9 +19,9 @@ dependencies = [
 
 [[package]]
 name = "register"
-version = "1.0.1"
+version = "1.0.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "faf386c0c48fea132b7fbbf71c32d1b1d62e7c59043bbabdd15c9ed9f254517e"
+checksum = "f4a247de29ab7cc8f5006cfe775c4a81c704f9914c5e2a79696862e643135433"
 dependencies = [
  "tock-registers",
 ]
diff --git a/09_hw_debug_JTAG/Cargo.lock b/09_hw_debug_JTAG/Cargo.lock
index 115e07626..e2d680a76 100644
--- a/09_hw_debug_JTAG/Cargo.lock
+++ b/09_hw_debug_JTAG/Cargo.lock
@@ -2,9 +2,9 @@
 # It is not intended for manual editing.
 [[package]]
 name = "cortex-a"
-version = "5.1.0"
+version = "5.1.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "dc37a4862a4f5b40df96f5e0f3bd4ce6a1bd8bb59a965cd476844673faf83896"
+checksum = "7c9b7504606c9e83a6b35e6f99db890084baf13fbbed67603fcc2a62b2cfe62b"
 dependencies = [
  "register",
 ]
@@ -19,9 +19,9 @@ dependencies = [
 
 [[package]]
 name = "register"
-version = "1.0.1"
+version = "1.0.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "faf386c0c48fea132b7fbbf71c32d1b1d62e7c59043bbabdd15c9ed9f254517e"
+checksum = "f4a247de29ab7cc8f5006cfe775c4a81c704f9914c5e2a79696862e643135433"
 dependencies = [
  "tock-registers",
 ]
diff --git a/10_privilege_level/Cargo.lock b/10_privilege_level/Cargo.lock
index 115e07626..e2d680a76 100644
--- a/10_privilege_level/Cargo.lock
+++ b/10_privilege_level/Cargo.lock
@@ -2,9 +2,9 @@
 # It is not intended for manual editing.
 [[package]]
 name = "cortex-a"
-version = "5.1.0"
+version = "5.1.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "dc37a4862a4f5b40df96f5e0f3bd4ce6a1bd8bb59a965cd476844673faf83896"
+checksum = "7c9b7504606c9e83a6b35e6f99db890084baf13fbbed67603fcc2a62b2cfe62b"
 dependencies = [
  "register",
 ]
@@ -19,9 +19,9 @@ dependencies = [
 
 [[package]]
 name = "register"
-version = "1.0.1"
+version = "1.0.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "faf386c0c48fea132b7fbbf71c32d1b1d62e7c59043bbabdd15c9ed9f254517e"
+checksum = "f4a247de29ab7cc8f5006cfe775c4a81c704f9914c5e2a79696862e643135433"
 dependencies = [
  "tock-registers",
 ]
diff --git a/11_virtual_mem_part1_identity_mapping/Cargo.lock b/11_virtual_mem_part1_identity_mapping/Cargo.lock
index 115e07626..e2d680a76 100644
--- a/11_virtual_mem_part1_identity_mapping/Cargo.lock
+++ b/11_virtual_mem_part1_identity_mapping/Cargo.lock
@@ -2,9 +2,9 @@
 # It is not intended for manual editing.
 [[package]]
 name = "cortex-a"
-version = "5.1.0"
+version = "5.1.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "dc37a4862a4f5b40df96f5e0f3bd4ce6a1bd8bb59a965cd476844673faf83896"
+checksum = "7c9b7504606c9e83a6b35e6f99db890084baf13fbbed67603fcc2a62b2cfe62b"
 dependencies = [
  "register",
 ]
@@ -19,9 +19,9 @@ dependencies = [
 
 [[package]]
 name = "register"
-version = "1.0.1"
+version = "1.0.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "faf386c0c48fea132b7fbbf71c32d1b1d62e7c59043bbabdd15c9ed9f254517e"
+checksum = "f4a247de29ab7cc8f5006cfe775c4a81c704f9914c5e2a79696862e643135433"
 dependencies = [
  "tock-registers",
 ]
diff --git a/12_exceptions_part1_groundwork/Cargo.lock b/12_exceptions_part1_groundwork/Cargo.lock
index 115e07626..e2d680a76 100644
--- a/12_exceptions_part1_groundwork/Cargo.lock
+++ b/12_exceptions_part1_groundwork/Cargo.lock
@@ -2,9 +2,9 @@
 # It is not intended for manual editing.
 [[package]]
 name = "cortex-a"
-version = "5.1.0"
+version = "5.1.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "dc37a4862a4f5b40df96f5e0f3bd4ce6a1bd8bb59a965cd476844673faf83896"
+checksum = "7c9b7504606c9e83a6b35e6f99db890084baf13fbbed67603fcc2a62b2cfe62b"
 dependencies = [
  "register",
 ]
@@ -19,9 +19,9 @@ dependencies = [
 
 [[package]]
 name = "register"
-version = "1.0.1"
+version = "1.0.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "faf386c0c48fea132b7fbbf71c32d1b1d62e7c59043bbabdd15c9ed9f254517e"
+checksum = "f4a247de29ab7cc8f5006cfe775c4a81c704f9914c5e2a79696862e643135433"
 dependencies = [
  "tock-registers",
 ]
diff --git a/13_integrated_testing/Cargo.lock b/13_integrated_testing/Cargo.lock
index 5ce481b37..d4776fc26 100644
--- a/13_integrated_testing/Cargo.lock
+++ b/13_integrated_testing/Cargo.lock
@@ -2,9 +2,9 @@
 # It is not intended for manual editing.
 [[package]]
 name = "cortex-a"
-version = "5.1.0"
+version = "5.1.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "dc37a4862a4f5b40df96f5e0f3bd4ce6a1bd8bb59a965cd476844673faf83896"
+checksum = "7c9b7504606c9e83a6b35e6f99db890084baf13fbbed67603fcc2a62b2cfe62b"
 dependencies = [
  "register",
 ]
@@ -31,9 +31,9 @@ dependencies = [
 
 [[package]]
 name = "qemu-exit"
-version = "1.0.1"
+version = "1.0.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "0e64f0ef443037525a562c4fa6ad3460a351ec10c7ebb0b6c49a87a576d0d1b5"
+checksum = "702abe3c3255be20a4d67bda326c4117081a49a57afaf752de4845091bc6b476"
 
 [[package]]
 name = "quote"
@@ -46,9 +46,9 @@ dependencies = [
 
 [[package]]
 name = "register"
-version = "1.0.1"
+version = "1.0.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "faf386c0c48fea132b7fbbf71c32d1b1d62e7c59043bbabdd15c9ed9f254517e"
+checksum = "f4a247de29ab7cc8f5006cfe775c4a81c704f9914c5e2a79696862e643135433"
 dependencies = [
  "tock-registers",
 ]
diff --git a/14_exceptions_part2_peripheral_IRQs/Cargo.lock b/14_exceptions_part2_peripheral_IRQs/Cargo.lock
index 5ce481b37..d4776fc26 100644
--- a/14_exceptions_part2_peripheral_IRQs/Cargo.lock
+++ b/14_exceptions_part2_peripheral_IRQs/Cargo.lock
@@ -2,9 +2,9 @@
 # It is not intended for manual editing.
 [[package]]
 name = "cortex-a"
-version = "5.1.0"
+version = "5.1.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "dc37a4862a4f5b40df96f5e0f3bd4ce6a1bd8bb59a965cd476844673faf83896"
+checksum = "7c9b7504606c9e83a6b35e6f99db890084baf13fbbed67603fcc2a62b2cfe62b"
 dependencies = [
  "register",
 ]
@@ -31,9 +31,9 @@ dependencies = [
 
 [[package]]
 name = "qemu-exit"
-version = "1.0.1"
+version = "1.0.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "0e64f0ef443037525a562c4fa6ad3460a351ec10c7ebb0b6c49a87a576d0d1b5"
+checksum = "702abe3c3255be20a4d67bda326c4117081a49a57afaf752de4845091bc6b476"
 
 [[package]]
 name = "quote"
@@ -46,9 +46,9 @@ dependencies = [
 
 [[package]]
 name = "register"
-version = "1.0.1"
+version = "1.0.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "faf386c0c48fea132b7fbbf71c32d1b1d62e7c59043bbabdd15c9ed9f254517e"
+checksum = "f4a247de29ab7cc8f5006cfe775c4a81c704f9914c5e2a79696862e643135433"
 dependencies = [
  "tock-registers",
 ]
diff --git a/15_virtual_mem_part2_mmio_remap/Cargo.lock b/15_virtual_mem_part2_mmio_remap/Cargo.lock
index 5ce481b37..d4776fc26 100644
--- a/15_virtual_mem_part2_mmio_remap/Cargo.lock
+++ b/15_virtual_mem_part2_mmio_remap/Cargo.lock
@@ -2,9 +2,9 @@
 # It is not intended for manual editing.
 [[package]]
 name = "cortex-a"
-version = "5.1.0"
+version = "5.1.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "dc37a4862a4f5b40df96f5e0f3bd4ce6a1bd8bb59a965cd476844673faf83896"
+checksum = "7c9b7504606c9e83a6b35e6f99db890084baf13fbbed67603fcc2a62b2cfe62b"
 dependencies = [
  "register",
 ]
@@ -31,9 +31,9 @@ dependencies = [
 
 [[package]]
 name = "qemu-exit"
-version = "1.0.1"
+version = "1.0.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "0e64f0ef443037525a562c4fa6ad3460a351ec10c7ebb0b6c49a87a576d0d1b5"
+checksum = "702abe3c3255be20a4d67bda326c4117081a49a57afaf752de4845091bc6b476"
 
 [[package]]
 name = "quote"
@@ -46,9 +46,9 @@ dependencies = [
 
 [[package]]
 name = "register"
-version = "1.0.1"
+version = "1.0.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "faf386c0c48fea132b7fbbf71c32d1b1d62e7c59043bbabdd15c9ed9f254517e"
+checksum = "f4a247de29ab7cc8f5006cfe775c4a81c704f9914c5e2a79696862e643135433"
 dependencies = [
  "tock-registers",
 ]

From 1d2b5ad0221f64f2e3de0dba793ff46713d1426c Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Fri, 1 Jan 2021 21:03:18 +0100
Subject: [PATCH 014/214] Memory Mapping: Improve various aspects

---
 .../README.md                                 | 49 ++++++++---
 .../src/_arch/aarch64/memory/mmu.rs           | 16 +++-
 .../src/bsp/raspberrypi/memory.rs             | 13 +++
 .../src/bsp/raspberrypi/memory/mmu.rs         |  7 +-
 12_exceptions_part1_groundwork/README.md      | 80 ++++++++---------
 .../src/_arch/aarch64/memory/mmu.rs           | 16 +++-
 .../src/bsp/raspberrypi/memory.rs             | 13 +++
 .../src/bsp/raspberrypi/memory/mmu.rs         |  7 +-
 12_exceptions_part1_groundwork/src/main.rs    |  4 +-
 13_integrated_testing/README.md               |  8 +-
 .../src/_arch/aarch64/memory/mmu.rs           | 16 +++-
 .../src/bsp/raspberrypi/memory.rs             | 13 +++
 .../src/bsp/raspberrypi/memory/mmu.rs         |  7 +-
 14_exceptions_part2_peripheral_IRQs/README.md |  4 +-
 .../src/_arch/aarch64/memory/mmu.rs           | 16 +++-
 .../src/bsp/raspberrypi/memory.rs             | 13 +++
 .../src/bsp/raspberrypi/memory/mmu.rs         |  7 +-
 15_virtual_mem_part2_mmio_remap/README.md     | 86 ++++++++++++-------
 .../src/_arch/aarch64/memory/mmu.rs           | 12 ++-
 19 files changed, 278 insertions(+), 109 deletions(-)

diff --git a/11_virtual_mem_part1_identity_mapping/README.md b/11_virtual_mem_part1_identity_mapping/README.md
index c8c35972e..df84c9669 100644
--- a/11_virtual_mem_part1_identity_mapping/README.md
+++ b/11_virtual_mem_part1_identity_mapping/README.md
@@ -140,7 +140,6 @@ struct FixedSizeTranslationTable<const NUM_TABLES: usize> {
     lvl2: [TableDescriptor; NUM_TABLES],
 }
 
-/// Usually evaluates to 1 GiB for RPi3 and 4 GiB for RPi 4.
 const NUM_LVL2_TABLES: usize = bsp::memory::mmu::addr_space_size() >> FIVETWELVE_MIB_SHIFT;
 type ArchTranslationTable = FixedSizeTranslationTable<NUM_LVL2_TABLES>;
 
@@ -205,7 +204,7 @@ virtual addresses:
 - Since we identity map the whole `Device MMIO` region, it is accessible by asserting its physical
   base address (`0x3F20_1000` or `0xFA20_1000` depending on which RPi you use) after the `MMU` is
   turned on.
-- Additionally, it is also mapped into the last `64 KiB` entry of the `lvl3` table, making it
+- Additionally, it is also mapped into the last `64 KiB` slot in the first `512 MiB`, making it
   accessible through base address `0x1FFF_1000`.
 
 The following block diagram visualizes the underlying translation for the second mapping.
@@ -303,7 +302,7 @@ Minipush 1.0
 diff -uNr 10_privilege_level/src/_arch/aarch64/memory/mmu.rs 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
 --- 10_privilege_level/src/_arch/aarch64/memory/mmu.rs
 +++ 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
-@@ -0,0 +1,333 @@
+@@ -0,0 +1,343 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -343,6 +342,12 @@ diff -uNr 10_privilege_level/src/_arch/aarch64/memory/mmu.rs 11_virtual_mem_part
 +// A level 3 page descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-17.
 +register_bitfields! {u64,
 +    STAGE1_PAGE_DESCRIPTOR [
++        /// Unprivileged execute-never.
++        UXN      OFFSET(54) NUMBITS(1) [
++            False = 0,
++            True = 1
++        ],
++
 +        /// Privileged execute-never.
 +        PXN      OFFSET(53) NUMBITS(1) [
 +            False = 0,
@@ -416,7 +421,6 @@ diff -uNr 10_privilege_level/src/_arch/aarch64/memory/mmu.rs 11_virtual_mem_part
 +    lvl2: [TableDescriptor; NUM_TABLES],
 +}
 +
-+/// Usually evaluates to 1 GiB for RPi3 and 4 GiB for RPi 4.
 +const NUM_LVL2_TABLES: usize = bsp::memory::mmu::addr_space_size() >> FIVETWELVE_MIB_SHIFT;
 +type ArchTranslationTable = FixedSizeTranslationTable<NUM_LVL2_TABLES>;
 +
@@ -500,13 +504,16 @@ diff -uNr 10_privilege_level/src/_arch/aarch64/memory/mmu.rs 11_virtual_mem_part
 +            AccessPermissions::ReadWrite => STAGE1_PAGE_DESCRIPTOR::AP::RW_EL1,
 +        };
 +
-+        // Execute Never.
++        // The execute-never attribute is mapped to PXN in AArch64.
 +        desc += if attribute_fields.execute_never {
 +            STAGE1_PAGE_DESCRIPTOR::PXN::True
 +        } else {
 +            STAGE1_PAGE_DESCRIPTOR::PXN::False
 +        };
 +
++        // Always set unprivileged exectue-never as long as userspace is not implemented yet.
++        desc += STAGE1_PAGE_DESCRIPTOR::UXN::True;
++
 +        desc
 +    }
 +}
@@ -579,16 +586,18 @@ diff -uNr 10_privilege_level/src/_arch/aarch64/memory/mmu.rs 11_virtual_mem_part
 +/// Configure various settings of stage 1 of the EL1 translation regime.
 +fn configure_translation_control() {
 +    let ips = ID_AA64MMFR0_EL1.read(ID_AA64MMFR0_EL1::PARange);
++    let t0sz: u64 = bsp::memory::mmu::addr_space_size().trailing_zeros().into();
 +
 +    TCR_EL1.write(
 +        TCR_EL1::TBI0::Ignored
 +            + TCR_EL1::IPS.val(ips)
++            + TCR_EL1::EPD1::DisableTTBR1Walks
 +            + TCR_EL1::TG0::KiB_64
 +            + TCR_EL1::SH0::Inner
 +            + TCR_EL1::ORGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
 +            + TCR_EL1::IRGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
 +            + TCR_EL1::EPD0::EnableTTBR0Walks
-+            + TCR_EL1::T0SZ.val(32), // TTBR0 spans 4 GiB total.
++            + TCR_EL1::T0SZ.val(t0sz),
 +    );
 +}
 +
@@ -662,7 +671,7 @@ diff -uNr 10_privilege_level/src/bsp/raspberrypi/link.ld 11_virtual_mem_part1_id
 diff -uNr 10_privilege_level/src/bsp/raspberrypi/memory/mmu.rs 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
 --- 10_privilege_level/src/bsp/raspberrypi/memory/mmu.rs
 +++ 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
-@@ -0,0 +1,88 @@
+@@ -0,0 +1,93 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -743,8 +752,13 @@ diff -uNr 10_privilege_level/src/bsp/raspberrypi/memory/mmu.rs 11_virtual_mem_pa
 +//--------------------------------------------------------------------------------------------------
 +
 +/// Return the address space size in bytes.
++///
++/// Guarantees size to be a power of two.
 +pub const fn addr_space_size() -> usize {
-+    memory_map::END_INCLUSIVE + 1
++    let size = memory_map::END_INCLUSIVE + 1;
++    assert!(size.is_power_of_two());
++
++    size
 +}
 +
 +/// Return a reference to the virtual memory layout.
@@ -773,16 +787,29 @@ diff -uNr 10_privilege_level/src/bsp/raspberrypi/memory.rs 11_virtual_mem_part1_
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -23,6 +27,8 @@
+@@ -23,6 +27,21 @@
  /// The board's memory map.
  #[rustfmt::skip]
  pub(super) mod map {
++    /// The inclusive end address of the memory map.
++    ///
++    /// End address + 1 must be power of two.
++    ///
++    /// # Note
++    ///
++    /// RPi3 and RPi4 boards can have different amounts of RAM. To make our code lean for
++    /// educational purposes, we set the max size of the address space to 4 GiB regardless of board.
++    /// This way, we can map the entire range that we need (end of MMIO for RPi4) in one take.
++    ///
++    /// However, making this trade-off has the downside of making it possible for the CPU to assert a
++    /// physical address that is not backed by any DRAM (e.g. accessing an address close to 4 GiB on
++    /// an RPi3 that comes with 1 GiB of RAM). This would result in a crash or other kind of error.
 +    pub const END_INCLUSIVE:       usize = 0xFFFF_FFFF;
 +
      pub const BOOT_CORE_STACK_END: usize = 0x8_0000;
 
      pub const GPIO_OFFSET:         usize = 0x0020_0000;
-@@ -36,6 +42,7 @@
+@@ -36,6 +55,7 @@
          pub const START:            usize =         0x3F00_0000;
          pub const GPIO_START:       usize = START + GPIO_OFFSET;
          pub const PL011_UART_START: usize = START + UART_OFFSET;
@@ -790,7 +817,7 @@ diff -uNr 10_privilege_level/src/bsp/raspberrypi/memory.rs 11_virtual_mem_part1_
      }
 
      /// Physical devices.
-@@ -46,10 +53,35 @@
+@@ -46,10 +66,35 @@
          pub const START:            usize =         0xFE00_0000;
          pub const GPIO_START:       usize = START + GPIO_OFFSET;
          pub const PL011_UART_START: usize = START + UART_OFFSET;
diff --git a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
index aeacbe8ec..69023cef1 100644
--- a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
@@ -37,6 +37,12 @@ register_bitfields! {u64,
 // A level 3 page descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-17.
 register_bitfields! {u64,
     STAGE1_PAGE_DESCRIPTOR [
+        /// Unprivileged execute-never.
+        UXN      OFFSET(54) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
         /// Privileged execute-never.
         PXN      OFFSET(53) NUMBITS(1) [
             False = 0,
@@ -110,7 +116,6 @@ struct FixedSizeTranslationTable<const NUM_TABLES: usize> {
     lvl2: [TableDescriptor; NUM_TABLES],
 }
 
-/// Usually evaluates to 1 GiB for RPi3 and 4 GiB for RPi 4.
 const NUM_LVL2_TABLES: usize = bsp::memory::mmu::addr_space_size() >> FIVETWELVE_MIB_SHIFT;
 type ArchTranslationTable = FixedSizeTranslationTable<NUM_LVL2_TABLES>;
 
@@ -194,13 +199,16 @@ impl convert::From<AttributeFields>
             AccessPermissions::ReadWrite => STAGE1_PAGE_DESCRIPTOR::AP::RW_EL1,
         };
 
-        // Execute Never.
+        // The execute-never attribute is mapped to PXN in AArch64.
         desc += if attribute_fields.execute_never {
             STAGE1_PAGE_DESCRIPTOR::PXN::True
         } else {
             STAGE1_PAGE_DESCRIPTOR::PXN::False
         };
 
+        // Always set unprivileged exectue-never as long as userspace is not implemented yet.
+        desc += STAGE1_PAGE_DESCRIPTOR::UXN::True;
+
         desc
     }
 }
@@ -273,16 +281,18 @@ unsafe fn populate_tt_entries() -> Result<(), &'static str> {
 /// Configure various settings of stage 1 of the EL1 translation regime.
 fn configure_translation_control() {
     let ips = ID_AA64MMFR0_EL1.read(ID_AA64MMFR0_EL1::PARange);
+    let t0sz: u64 = bsp::memory::mmu::addr_space_size().trailing_zeros().into();
 
     TCR_EL1.write(
         TCR_EL1::TBI0::Ignored
             + TCR_EL1::IPS.val(ips)
+            + TCR_EL1::EPD1::DisableTTBR1Walks
             + TCR_EL1::TG0::KiB_64
             + TCR_EL1::SH0::Inner
             + TCR_EL1::ORGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
             + TCR_EL1::IRGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
             + TCR_EL1::EPD0::EnableTTBR0Walks
-            + TCR_EL1::T0SZ.val(32), // TTBR0 spans 4 GiB total.
+            + TCR_EL1::T0SZ.val(t0sz),
     );
 }
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs b/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs
index 9ab302324..d4bcf0a3b 100644
--- a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs
@@ -27,6 +27,19 @@ extern "Rust" {
 /// The board's memory map.
 #[rustfmt::skip]
 pub(super) mod map {
+    /// The inclusive end address of the memory map.
+    ///
+    /// End address + 1 must be power of two.
+    ///
+    /// # Note
+    ///
+    /// RPi3 and RPi4 boards can have different amounts of RAM. To make our code lean for
+    /// educational purposes, we set the max size of the address space to 4 GiB regardless of board.
+    /// This way, we can map the entire range that we need (end of MMIO for RPi4) in one take.
+    ///
+    /// However, making this trade-off has the downside of making it possible for the CPU to assert a
+    /// physical address that is not backed by any DRAM (e.g. accessing an address close to 4 GiB on
+    /// an RPi3 that comes with 1 GiB of RAM). This would result in a crash or other kind of error.
     pub const END_INCLUSIVE:       usize = 0xFFFF_FFFF;
 
     pub const BOOT_CORE_STACK_END: usize = 0x8_0000;
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs b/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
index 6930b6755..982fc0655 100644
--- a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
@@ -78,8 +78,13 @@ fn mmio_range_inclusive() -> RangeInclusive<usize> {
 //--------------------------------------------------------------------------------------------------
 
 /// Return the address space size in bytes.
+///
+/// Guarantees size to be a power of two.
 pub const fn addr_space_size() -> usize {
-    memory_map::END_INCLUSIVE + 1
+    let size = memory_map::END_INCLUSIVE + 1;
+    assert!(size.is_power_of_two());
+
+    size
 }
 
 /// Return a reference to the virtual memory layout.
diff --git a/12_exceptions_part1_groundwork/README.md b/12_exceptions_part1_groundwork/README.md
index f70a33c54..979636866 100644
--- a/12_exceptions_part1_groundwork/README.md
+++ b/12_exceptions_part1_groundwork/README.md
@@ -350,14 +350,14 @@ we cause a data abort exception by reading from memory address `8 GiB`:
 // For demo purposes, the exception handler will catch the faulting 8 GiB address and allow
 // execution to continue.
 info!("");
-info!("Trying to write to address 8 GiB...");
+info!("Trying to read from address 8 GiB...");
 let mut big_addr: u64 = 8 * 1024 * 1024 * 1024;
 unsafe { core::ptr::read_volatile(big_addr as *mut u64) };
 ```
 
 This triggers our exception code, because we try to read from a virtual address for which no mapping
-has been installed. Remember, we only installed identity-mapped page tables for the first `1 GiB`
-(RPi3) or `4 GiB` (RPi4) of address space in the previous tutorial.
+has been installed. Remember, we only installed up to `4 GiB` of address space in the previous
+tutorial.
 
 To survive this exception, the respective handler has a special demo case:
 
@@ -412,29 +412,29 @@ Minipush 1.0
 [MP] ⏩ Pushing 64 KiB ========================================🦀 100% 32 KiB/s Time: 00:00:02
 [ML] Loaded! Executing the payload now
 
-[    3.090618] Booting on: Raspberry Pi 3
-[    3.091701] MMU online. Special regions:
-[    3.093610]       0x00080000 - 0x0008ffff |  64 KiB | C   RO PX  | Kernel code and RO data
-[    3.097688]       0x3f000000 - 0x4000ffff |  16 MiB | Dev RW PXN | Device MMIO
-[    3.101246] Current privilege level: EL1
-[    3.103155] Exception handling state:
-[    3.104934]       Debug:  Masked
-[    3.106496]       SError: Masked
-[    3.108058]       IRQ:    Masked
-[    3.109619]       FIQ:    Masked
-[    3.111181] Architectural timer resolution: 52 ns
-[    3.113481] Drivers loaded:
-[    3.114826]       1. BCM GPIO
-[    3.116257]       2. BCM PL011 UART
-[    3.117950] Timer test, spinning for 1 second
-[    4.120076]
-[    4.120079] Trying to write to address 8 GiB...
-[    4.122242] ************************************************
-[    4.125018] Whoa! We recovered from a synchronous exception!
-[    4.127795] ************************************************
-[    4.130571]
-[    4.131266] Let's try again
-[    4.132611] Trying to write to address 9 GiB...
+[    3.091032] Booting on: Raspberry Pi 3
+[    3.092116] MMU online. Special regions:
+[    3.094025]       0x00080000 - 0x0008ffff |  64 KiB | C   RO PX  | Kernel code and RO data
+[    3.098103]       0x3f000000 - 0x4000ffff |  16 MiB | Dev RW PXN | Device MMIO
+[    3.101661] Current privilege level: EL1
+[    3.103570] Exception handling state:
+[    3.105348]       Debug:  Masked
+[    3.106910]       SError: Masked
+[    3.108472]       IRQ:    Masked
+[    3.110034]       FIQ:    Masked
+[    3.111596] Architectural timer resolution: 52 ns
+[    3.113895] Drivers loaded:
+[    3.115240]       1. BCM GPIO
+[    3.116672]       2. BCM PL011 UART
+[    3.118364] Timer test, spinning for 1 second
+[    4.120490]
+[    4.120494] Trying to read from address 8 GiB...
+[    4.122700] ************************************************
+[    4.125476] Whoa! We recovered from a synchronous exception!
+[    4.128253] ************************************************
+[    4.131030]
+[    4.131724] Let's try again
+[    4.133069] Trying to read from address 9 GiB...
 
 Kernel panic:
 
@@ -443,7 +443,7 @@ FAR_EL1: 0x0000000240000000
 ESR_EL1: 0x96000004
       Exception Class         (EC) : 0x25 - Data Abort, current EL
       Instr Specific Syndrome (ISS): 0x4
-ELR_EL1: 0x0000000000081454
+ELR_EL1: 0x0000000000081458
 SPSR_EL1: 0x600003c5
       Flags:
             Negative (N): Not set
@@ -458,22 +458,22 @@ SPSR_EL1: 0x600003c5
       Illegal Execution State (IL): Not set
 
 General purpose register:
-      x0 : 0x0000000000000000         x1 : 0x0000000000085726
-      x2 : 0x0000000000000026         x3 : 0x0000000000083bf0
-      x4 : 0x0000000000000003         x5 : 0xfb4f101900000000
-      x6 : 0x0000000000000000         x7 : 0x7e9198052b2b0200
+      x0 : 0x0000000000000000         x1 : 0x0000000000085727
+      x2 : 0x0000000000000027         x3 : 0x0000000000000000
+      x4 : 0x0000000000000002         x5 : 0x3f27329c00000000
+      x6 : 0x0000000000000000         x7 : 0xdbd1b90800000000
       x8 : 0x0000000240000000         x9 : 0x000000003f201000
-      x10: 0x0000000000000019         x11: 0x0000000000000000
-      x12: 0x0000000000000006         x13: 0x0000000000000031
+      x10: 0x0000000000000019         x11: 0x00000000000819d0
+      x12: 0x0000000000000000         x13: 0x0000000000000033
       x14: 0x000000000007fc2d         x15: 0x0000000000000000
-      x16: 0x0000000000000040         x17: 0xb557f006f276cfb6
+      x16: 0x0000000000000040         x17: 0xfd7f702255f847d0
       x18: 0x0000000000000003         x19: 0x0000000000090008
       x20: 0x0000000000085510         x21: 0x000000003b9aca00
-      x22: 0x00000000000003e8         x23: 0x000000000008160c
-      x24: 0x0000000000082264         x25: 0x00000000000f4240
+      x22: 0x00000000000003e8         x23: 0x0000000000081610
+      x24: 0x0000000000082268         x25: 0x00000000000f4240
       x26: 0xffffffffc4653600         x27: 0x00000000000855f0
-      x28: 0x0000000000083f84         x29: 0x0000000000086810
-      lr : 0x0000000000081448
+      x28: 0x0000000000083f80         x29: 0x0000000000086810
+      lr : 0x000000000008144c
 ```
 
 ## Diff to previous
@@ -989,7 +989,7 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/main.rs 12_exceptions_part1_
 +    // For demo purposes, the exception handler will catch the faulting 8 GiB address and allow
 +    // execution to continue.
 +    info!("");
-+    info!("Trying to write to address 8 GiB...");
++    info!("Trying to read from address 8 GiB...");
 +    let mut big_addr: u64 = 8 * 1024 * 1024 * 1024;
 +    unsafe { core::ptr::read_volatile(big_addr as *mut u64) };
 +
@@ -1000,7 +1000,7 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/main.rs 12_exceptions_part1_
 +    info!("Let's try again");
 +
 +    // Now use address 9 GiB. The exception handler won't forgive us this time.
-+    info!("Trying to write to address 9 GiB...");
++    info!("Trying to read from address 9 GiB...");
 +    big_addr = 9 * 1024 * 1024 * 1024;
 +    unsafe { core::ptr::read_volatile(big_addr as *mut u64) };
 
diff --git a/12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs b/12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
index aeacbe8ec..69023cef1 100644
--- a/12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
+++ b/12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
@@ -37,6 +37,12 @@ register_bitfields! {u64,
 // A level 3 page descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-17.
 register_bitfields! {u64,
     STAGE1_PAGE_DESCRIPTOR [
+        /// Unprivileged execute-never.
+        UXN      OFFSET(54) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
         /// Privileged execute-never.
         PXN      OFFSET(53) NUMBITS(1) [
             False = 0,
@@ -110,7 +116,6 @@ struct FixedSizeTranslationTable<const NUM_TABLES: usize> {
     lvl2: [TableDescriptor; NUM_TABLES],
 }
 
-/// Usually evaluates to 1 GiB for RPi3 and 4 GiB for RPi 4.
 const NUM_LVL2_TABLES: usize = bsp::memory::mmu::addr_space_size() >> FIVETWELVE_MIB_SHIFT;
 type ArchTranslationTable = FixedSizeTranslationTable<NUM_LVL2_TABLES>;
 
@@ -194,13 +199,16 @@ impl convert::From<AttributeFields>
             AccessPermissions::ReadWrite => STAGE1_PAGE_DESCRIPTOR::AP::RW_EL1,
         };
 
-        // Execute Never.
+        // The execute-never attribute is mapped to PXN in AArch64.
         desc += if attribute_fields.execute_never {
             STAGE1_PAGE_DESCRIPTOR::PXN::True
         } else {
             STAGE1_PAGE_DESCRIPTOR::PXN::False
         };
 
+        // Always set unprivileged exectue-never as long as userspace is not implemented yet.
+        desc += STAGE1_PAGE_DESCRIPTOR::UXN::True;
+
         desc
     }
 }
@@ -273,16 +281,18 @@ unsafe fn populate_tt_entries() -> Result<(), &'static str> {
 /// Configure various settings of stage 1 of the EL1 translation regime.
 fn configure_translation_control() {
     let ips = ID_AA64MMFR0_EL1.read(ID_AA64MMFR0_EL1::PARange);
+    let t0sz: u64 = bsp::memory::mmu::addr_space_size().trailing_zeros().into();
 
     TCR_EL1.write(
         TCR_EL1::TBI0::Ignored
             + TCR_EL1::IPS.val(ips)
+            + TCR_EL1::EPD1::DisableTTBR1Walks
             + TCR_EL1::TG0::KiB_64
             + TCR_EL1::SH0::Inner
             + TCR_EL1::ORGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
             + TCR_EL1::IRGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
             + TCR_EL1::EPD0::EnableTTBR0Walks
-            + TCR_EL1::T0SZ.val(32), // TTBR0 spans 4 GiB total.
+            + TCR_EL1::T0SZ.val(t0sz),
     );
 }
 
diff --git a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory.rs b/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory.rs
index 9ab302324..d4bcf0a3b 100644
--- a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory.rs
+++ b/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory.rs
@@ -27,6 +27,19 @@ extern "Rust" {
 /// The board's memory map.
 #[rustfmt::skip]
 pub(super) mod map {
+    /// The inclusive end address of the memory map.
+    ///
+    /// End address + 1 must be power of two.
+    ///
+    /// # Note
+    ///
+    /// RPi3 and RPi4 boards can have different amounts of RAM. To make our code lean for
+    /// educational purposes, we set the max size of the address space to 4 GiB regardless of board.
+    /// This way, we can map the entire range that we need (end of MMIO for RPi4) in one take.
+    ///
+    /// However, making this trade-off has the downside of making it possible for the CPU to assert a
+    /// physical address that is not backed by any DRAM (e.g. accessing an address close to 4 GiB on
+    /// an RPi3 that comes with 1 GiB of RAM). This would result in a crash or other kind of error.
     pub const END_INCLUSIVE:       usize = 0xFFFF_FFFF;
 
     pub const BOOT_CORE_STACK_END: usize = 0x8_0000;
diff --git a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs b/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
index 1114bcce2..59d736a7c 100644
--- a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
+++ b/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
@@ -63,8 +63,13 @@ fn mmio_range_inclusive() -> RangeInclusive<usize> {
 //--------------------------------------------------------------------------------------------------
 
 /// Return the address space size in bytes.
+///
+/// Guarantees size to be a power of two.
 pub const fn addr_space_size() -> usize {
-    memory_map::END_INCLUSIVE + 1
+    let size = memory_map::END_INCLUSIVE + 1;
+    assert!(size.is_power_of_two());
+
+    size
 }
 
 /// Return a reference to the virtual memory layout.
diff --git a/12_exceptions_part1_groundwork/src/main.rs b/12_exceptions_part1_groundwork/src/main.rs
index 66a32d085..4d8f5d7c3 100644
--- a/12_exceptions_part1_groundwork/src/main.rs
+++ b/12_exceptions_part1_groundwork/src/main.rs
@@ -204,7 +204,7 @@ fn kernel_main() -> ! {
     // For demo purposes, the exception handler will catch the faulting 8 GiB address and allow
     // execution to continue.
     info!("");
-    info!("Trying to write to address 8 GiB...");
+    info!("Trying to read from address 8 GiB...");
     let mut big_addr: u64 = 8 * 1024 * 1024 * 1024;
     unsafe { core::ptr::read_volatile(big_addr as *mut u64) };
 
@@ -215,7 +215,7 @@ fn kernel_main() -> ! {
     info!("Let's try again");
 
     // Now use address 9 GiB. The exception handler won't forgive us this time.
-    info!("Trying to write to address 9 GiB...");
+    info!("Trying to read from address 9 GiB...");
     big_addr = 9 * 1024 * 1024 * 1024;
     unsafe { core::ptr::read_volatile(big_addr as *mut u64) };
 
diff --git a/13_integrated_testing/README.md b/13_integrated_testing/README.md
index 3ecdc0396..5f8baf23a 100644
--- a/13_integrated_testing/README.md
+++ b/13_integrated_testing/README.md
@@ -990,7 +990,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs 13_integ
 diff -uNr 12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs 13_integrated_testing/src/_arch/aarch64/memory/mmu.rs
 --- 12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
 +++ 13_integrated_testing/src/_arch/aarch64/memory/mmu.rs
-@@ -331,3 +331,40 @@
+@@ -341,3 +341,40 @@
          Ok(())
      }
  }
@@ -1053,7 +1053,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/bsp/raspberrypi/console.rs 13_integ
 diff -uNr 12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs 13_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs
 --- 12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
 +++ 13_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs
-@@ -71,3 +71,46 @@
+@@ -76,3 +76,46 @@
  pub fn virt_mem_layout() -> &'static KernelVirtualLayout<{ NUM_MEM_RANGES }> {
      &LAYOUT
  }
@@ -1469,7 +1469,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/m
 -    // For demo purposes, the exception handler will catch the faulting 8 GiB address and allow
 -    // execution to continue.
 -    info!("");
--    info!("Trying to write to address 8 GiB...");
+-    info!("Trying to read from address 8 GiB...");
 -    let mut big_addr: u64 = 8 * 1024 * 1024 * 1024;
 -    unsafe { core::ptr::read_volatile(big_addr as *mut u64) };
 -
@@ -1480,7 +1480,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/m
 -    info!("Let's try again");
 -
 -    // Now use address 9 GiB. The exception handler won't forgive us this time.
--    info!("Trying to write to address 9 GiB...");
+-    info!("Trying to read from address 9 GiB...");
 -    big_addr = 9 * 1024 * 1024 * 1024;
 -    unsafe { core::ptr::read_volatile(big_addr as *mut u64) };
 -
diff --git a/13_integrated_testing/src/_arch/aarch64/memory/mmu.rs b/13_integrated_testing/src/_arch/aarch64/memory/mmu.rs
index 5061f6007..9b658e864 100644
--- a/13_integrated_testing/src/_arch/aarch64/memory/mmu.rs
+++ b/13_integrated_testing/src/_arch/aarch64/memory/mmu.rs
@@ -37,6 +37,12 @@ register_bitfields! {u64,
 // A level 3 page descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-17.
 register_bitfields! {u64,
     STAGE1_PAGE_DESCRIPTOR [
+        /// Unprivileged execute-never.
+        UXN      OFFSET(54) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
         /// Privileged execute-never.
         PXN      OFFSET(53) NUMBITS(1) [
             False = 0,
@@ -110,7 +116,6 @@ struct FixedSizeTranslationTable<const NUM_TABLES: usize> {
     lvl2: [TableDescriptor; NUM_TABLES],
 }
 
-/// Usually evaluates to 1 GiB for RPi3 and 4 GiB for RPi 4.
 const NUM_LVL2_TABLES: usize = bsp::memory::mmu::addr_space_size() >> FIVETWELVE_MIB_SHIFT;
 type ArchTranslationTable = FixedSizeTranslationTable<NUM_LVL2_TABLES>;
 
@@ -194,13 +199,16 @@ impl convert::From<AttributeFields>
             AccessPermissions::ReadWrite => STAGE1_PAGE_DESCRIPTOR::AP::RW_EL1,
         };
 
-        // Execute Never.
+        // The execute-never attribute is mapped to PXN in AArch64.
         desc += if attribute_fields.execute_never {
             STAGE1_PAGE_DESCRIPTOR::PXN::True
         } else {
             STAGE1_PAGE_DESCRIPTOR::PXN::False
         };
 
+        // Always set unprivileged exectue-never as long as userspace is not implemented yet.
+        desc += STAGE1_PAGE_DESCRIPTOR::UXN::True;
+
         desc
     }
 }
@@ -273,16 +281,18 @@ unsafe fn populate_tt_entries() -> Result<(), &'static str> {
 /// Configure various settings of stage 1 of the EL1 translation regime.
 fn configure_translation_control() {
     let ips = ID_AA64MMFR0_EL1.read(ID_AA64MMFR0_EL1::PARange);
+    let t0sz: u64 = bsp::memory::mmu::addr_space_size().trailing_zeros().into();
 
     TCR_EL1.write(
         TCR_EL1::TBI0::Ignored
             + TCR_EL1::IPS.val(ips)
+            + TCR_EL1::EPD1::DisableTTBR1Walks
             + TCR_EL1::TG0::KiB_64
             + TCR_EL1::SH0::Inner
             + TCR_EL1::ORGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
             + TCR_EL1::IRGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
             + TCR_EL1::EPD0::EnableTTBR0Walks
-            + TCR_EL1::T0SZ.val(32), // TTBR0 spans 4 GiB total.
+            + TCR_EL1::T0SZ.val(t0sz),
     );
 }
 
diff --git a/13_integrated_testing/src/bsp/raspberrypi/memory.rs b/13_integrated_testing/src/bsp/raspberrypi/memory.rs
index 9ab302324..d4bcf0a3b 100644
--- a/13_integrated_testing/src/bsp/raspberrypi/memory.rs
+++ b/13_integrated_testing/src/bsp/raspberrypi/memory.rs
@@ -27,6 +27,19 @@ extern "Rust" {
 /// The board's memory map.
 #[rustfmt::skip]
 pub(super) mod map {
+    /// The inclusive end address of the memory map.
+    ///
+    /// End address + 1 must be power of two.
+    ///
+    /// # Note
+    ///
+    /// RPi3 and RPi4 boards can have different amounts of RAM. To make our code lean for
+    /// educational purposes, we set the max size of the address space to 4 GiB regardless of board.
+    /// This way, we can map the entire range that we need (end of MMIO for RPi4) in one take.
+    ///
+    /// However, making this trade-off has the downside of making it possible for the CPU to assert a
+    /// physical address that is not backed by any DRAM (e.g. accessing an address close to 4 GiB on
+    /// an RPi3 that comes with 1 GiB of RAM). This would result in a crash or other kind of error.
     pub const END_INCLUSIVE:       usize = 0xFFFF_FFFF;
 
     pub const BOOT_CORE_STACK_END: usize = 0x8_0000;
diff --git a/13_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs b/13_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs
index d41de813c..485b8a46a 100644
--- a/13_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs
+++ b/13_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs
@@ -63,8 +63,13 @@ fn mmio_range_inclusive() -> RangeInclusive<usize> {
 //--------------------------------------------------------------------------------------------------
 
 /// Return the address space size in bytes.
+///
+/// Guarantees size to be a power of two.
 pub const fn addr_space_size() -> usize {
-    memory_map::END_INCLUSIVE + 1
+    let size = memory_map::END_INCLUSIVE + 1;
+    assert!(size.is_power_of_two());
+
+    size
 }
 
 /// Return a reference to the virtual memory layout.
diff --git a/14_exceptions_part2_peripheral_IRQs/README.md b/14_exceptions_part2_peripheral_IRQs/README.md
index 58e1bf22e..042c3f601 100644
--- a/14_exceptions_part2_peripheral_IRQs/README.md
+++ b/14_exceptions_part2_peripheral_IRQs/README.md
@@ -2145,7 +2145,7 @@ diff -uNr 13_integrated_testing/src/bsp/raspberrypi/exception.rs 14_exceptions_p
 diff -uNr 13_integrated_testing/src/bsp/raspberrypi/memory.rs 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
 --- 13_integrated_testing/src/bsp/raspberrypi/memory.rs
 +++ 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
-@@ -39,10 +39,12 @@
+@@ -52,10 +52,12 @@
      pub mod mmio {
          use super::*;
 
@@ -2162,7 +2162,7 @@ diff -uNr 13_integrated_testing/src/bsp/raspberrypi/memory.rs 14_exceptions_part
      }
 
      /// Physical devices.
-@@ -53,6 +55,8 @@
+@@ -66,6 +68,8 @@
          pub const START:            usize =         0xFE00_0000;
          pub const GPIO_START:       usize = START + GPIO_OFFSET;
          pub const PL011_UART_START: usize = START + UART_OFFSET;
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
index 5061f6007..9b658e864 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
@@ -37,6 +37,12 @@ register_bitfields! {u64,
 // A level 3 page descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-17.
 register_bitfields! {u64,
     STAGE1_PAGE_DESCRIPTOR [
+        /// Unprivileged execute-never.
+        UXN      OFFSET(54) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
         /// Privileged execute-never.
         PXN      OFFSET(53) NUMBITS(1) [
             False = 0,
@@ -110,7 +116,6 @@ struct FixedSizeTranslationTable<const NUM_TABLES: usize> {
     lvl2: [TableDescriptor; NUM_TABLES],
 }
 
-/// Usually evaluates to 1 GiB for RPi3 and 4 GiB for RPi 4.
 const NUM_LVL2_TABLES: usize = bsp::memory::mmu::addr_space_size() >> FIVETWELVE_MIB_SHIFT;
 type ArchTranslationTable = FixedSizeTranslationTable<NUM_LVL2_TABLES>;
 
@@ -194,13 +199,16 @@ impl convert::From<AttributeFields>
             AccessPermissions::ReadWrite => STAGE1_PAGE_DESCRIPTOR::AP::RW_EL1,
         };
 
-        // Execute Never.
+        // The execute-never attribute is mapped to PXN in AArch64.
         desc += if attribute_fields.execute_never {
             STAGE1_PAGE_DESCRIPTOR::PXN::True
         } else {
             STAGE1_PAGE_DESCRIPTOR::PXN::False
         };
 
+        // Always set unprivileged exectue-never as long as userspace is not implemented yet.
+        desc += STAGE1_PAGE_DESCRIPTOR::UXN::True;
+
         desc
     }
 }
@@ -273,16 +281,18 @@ unsafe fn populate_tt_entries() -> Result<(), &'static str> {
 /// Configure various settings of stage 1 of the EL1 translation regime.
 fn configure_translation_control() {
     let ips = ID_AA64MMFR0_EL1.read(ID_AA64MMFR0_EL1::PARange);
+    let t0sz: u64 = bsp::memory::mmu::addr_space_size().trailing_zeros().into();
 
     TCR_EL1.write(
         TCR_EL1::TBI0::Ignored
             + TCR_EL1::IPS.val(ips)
+            + TCR_EL1::EPD1::DisableTTBR1Walks
             + TCR_EL1::TG0::KiB_64
             + TCR_EL1::SH0::Inner
             + TCR_EL1::ORGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
             + TCR_EL1::IRGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
             + TCR_EL1::EPD0::EnableTTBR0Walks
-            + TCR_EL1::T0SZ.val(32), // TTBR0 spans 4 GiB total.
+            + TCR_EL1::T0SZ.val(t0sz),
     );
 }
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
index 44c20e2c8..4ac3b57b9 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
@@ -27,6 +27,19 @@ extern "Rust" {
 /// The board's memory map.
 #[rustfmt::skip]
 pub(super) mod map {
+    /// The inclusive end address of the memory map.
+    ///
+    /// End address + 1 must be power of two.
+    ///
+    /// # Note
+    ///
+    /// RPi3 and RPi4 boards can have different amounts of RAM. To make our code lean for
+    /// educational purposes, we set the max size of the address space to 4 GiB regardless of board.
+    /// This way, we can map the entire range that we need (end of MMIO for RPi4) in one take.
+    ///
+    /// However, making this trade-off has the downside of making it possible for the CPU to assert a
+    /// physical address that is not backed by any DRAM (e.g. accessing an address close to 4 GiB on
+    /// an RPi3 that comes with 1 GiB of RAM). This would result in a crash or other kind of error.
     pub const END_INCLUSIVE:       usize = 0xFFFF_FFFF;
 
     pub const BOOT_CORE_STACK_END: usize = 0x8_0000;
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
index d41de813c..485b8a46a 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
@@ -63,8 +63,13 @@ fn mmio_range_inclusive() -> RangeInclusive<usize> {
 //--------------------------------------------------------------------------------------------------
 
 /// Return the address space size in bytes.
+///
+/// Guarantees size to be a power of two.
 pub const fn addr_space_size() -> usize {
-    memory_map::END_INCLUSIVE + 1
+    let size = memory_map::END_INCLUSIVE + 1;
+    assert!(size.is_power_of_two());
+
+    size
 }
 
 /// Return a reference to the virtual memory layout.
diff --git a/15_virtual_mem_part2_mmio_remap/README.md b/15_virtual_mem_part2_mmio_remap/README.md
index f7a9b1921..ab11fbfa6 100644
--- a/15_virtual_mem_part2_mmio_remap/README.md
+++ b/15_virtual_mem_part2_mmio_remap/README.md
@@ -357,7 +357,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 15
 
  // A table descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-15.
  register_bitfields! {u64,
-@@ -81,9 +91,6 @@
+@@ -87,9 +97,6 @@
      ]
  }
 
@@ -367,7 +367,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 15
  /// A table descriptor for 64 KiB aperture.
  ///
  /// The output points to the next table.
-@@ -98,36 +105,65 @@
+@@ -104,35 +111,65 @@
  #[repr(transparent)]
  struct PageDescriptor(u64);
 
@@ -417,7 +417,6 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 15
      lvl2: [TableDescriptor; NUM_TABLES],
 -}
 
--/// Usually evaluates to 1 GiB for RPi3 and 4 GiB for RPi 4.
 -const NUM_LVL2_TABLES: usize = bsp::memory::mmu::addr_space_size() >> FIVETWELVE_MIB_SHIFT;
 -type ArchTranslationTable = FixedSizeTranslationTable<NUM_LVL2_TABLES>;
 +    /// Index of the next free MMIO page.
@@ -449,7 +448,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 15
 
  //--------------------------------------------------------------------------------------------------
  // Global instances
-@@ -138,7 +174,8 @@
+@@ -143,7 +180,8 @@
  /// # Safety
  ///
  /// - Supposed to land in `.bss`. Therefore, ensure that all initial member values boil down to "0".
@@ -459,7 +458,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 15
 
  static MMU: MemoryManagementUnit = MemoryManagementUnit;
 
-@@ -146,13 +183,15 @@
+@@ -151,13 +189,15 @@
  // Private Code
  //--------------------------------------------------------------------------------------------------
 
@@ -481,7 +480,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 15
      }
  }
 
-@@ -160,7 +199,7 @@
+@@ -165,7 +205,7 @@
      fn from(next_lvl_table_addr: usize) -> Self {
          let val = InMemoryRegister::<u64, STAGE1_TABLE_DESCRIPTOR::Register>::new(0);
 
@@ -490,7 +489,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 15
          val.write(
              STAGE1_TABLE_DESCRIPTOR::VALID::True
                  + STAGE1_TABLE_DESCRIPTOR::TYPE::Table
-@@ -207,23 +246,33 @@
+@@ -215,23 +255,33 @@
 
  impl PageDescriptor {
      /// Create an instance.
@@ -527,7 +526,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 15
      /// Create an instance.
      pub const fn new() -> Self {
          assert!(NUM_TABLES > 0);
-@@ -231,7 +280,55 @@
+@@ -239,7 +289,55 @@
          Self {
              lvl3: [[PageDescriptor(0); 8192]; NUM_TABLES],
              lvl2: [TableDescriptor(0); NUM_TABLES],
@@ -583,7 +582,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 15
      }
  }
 
-@@ -248,28 +345,6 @@
+@@ -256,32 +354,9 @@
      );
  }
 
@@ -612,16 +611,20 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 15
  /// Configure various settings of stage 1 of the EL1 translation regime.
  fn configure_translation_control() {
      let ips = ID_AA64MMFR0_EL1.read(ID_AA64MMFR0_EL1::PARange);
-@@ -282,7 +357,7 @@
+-    let t0sz: u64 = bsp::memory::mmu::addr_space_size().trailing_zeros().into();
+
+     TCR_EL1.write(
+         TCR_EL1::TBI0::Ignored
+@@ -292,7 +367,7 @@
              + TCR_EL1::ORGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
              + TCR_EL1::IRGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
              + TCR_EL1::EPD0::EnableTTBR0Walks
--            + TCR_EL1::T0SZ.val(32), // TTBR0 spans 4 GiB total.
+-            + TCR_EL1::T0SZ.val(t0sz),
 +            + TCR_EL1::T0SZ.val(T0SZ),
      );
  }
 
-@@ -290,17 +365,126 @@
+@@ -300,17 +375,126 @@
  // Public Code
  //--------------------------------------------------------------------------------------------------
 
@@ -751,7 +754,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 15
          // Fail early if translation granule is not supported. Both RPis support it, though.
          if !ID_AA64MMFR0_EL1.matches_all(ID_AA64MMFR0_EL1::TGran64::Supported) {
              return Err("Translation granule not supported in HW");
-@@ -309,11 +493,8 @@
+@@ -319,11 +503,8 @@
          // Prepare the memory attribute indirection register.
          set_up_mair();
 
@@ -764,7 +767,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 15
 
          configure_translation_control();
 
-@@ -337,6 +518,9 @@
+@@ -347,6 +528,9 @@
  //--------------------------------------------------------------------------------------------------
 
  #[cfg(test)]
@@ -774,7 +777,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 15
  mod tests {
      use super::*;
      use test_macros::kernel_test;
-@@ -363,7 +547,7 @@
+@@ -373,7 +557,7 @@
      #[kernel_test]
      fn kernel_tables_in_bss() {
          let bss_range = bsp::memory::bss_range_inclusive();
@@ -1465,7 +1468,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld 15_vir
 diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
 --- 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +++ 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
-@@ -4,72 +4,128 @@
+@@ -4,77 +4,128 @@
 
  //! BSP Memory Management Unit.
 
@@ -1584,23 +1587,22 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
  //--------------------------------------------------------------------------------------------------
 
 -/// Return the address space size in bytes.
--pub const fn addr_space_size() -> usize {
--    memory_map::END_INCLUSIVE + 1
 +/// Pointer to the last page of the physical address space.
 +pub fn phys_addr_space_end_page() -> *const Page<Physical> {
 +    common::align_down(
 +        super::phys_addr_space_end().into_usize(),
 +        KernelGranule::SIZE,
 +    ) as *const Page<_>
- }
-
--/// Return a reference to the virtual memory layout.
--pub fn virt_mem_layout() -> &'static KernelVirtualLayout<{ NUM_MEM_RANGES }> {
--    &LAYOUT
++}
++
 +/// Map the kernel binary.
 +///
 +/// # Safety
-+///
+ ///
+-/// Guarantees size to be a power of two.
+-pub const fn addr_space_size() -> usize {
+-    let size = memory_map::END_INCLUSIVE + 1;
+-    assert!(size.is_power_of_two());
 +/// - Any miscalculation or attribute error will likely be fatal. Needs careful manual checking.
 +pub unsafe fn kernel_map_binary() -> Result<(), &'static str> {
 +    kernel_mmu::kernel_map_pages_at(
@@ -1613,7 +1615,9 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +            execute_never: true,
 +        },
 +    )?;
-+
+
+-    size
+-}
 +    kernel_mmu::kernel_map_pages_at(
 +        "Kernel code and RO data",
 +        &phys_ro_page_desc(),
@@ -1624,7 +1628,10 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +            execute_never: false,
 +        },
 +    )?;
-+
+
+-/// Return a reference to the virtual memory layout.
+-pub fn virt_mem_layout() -> &'static KernelVirtualLayout<{ NUM_MEM_RANGES }> {
+-    &LAYOUT
 +    kernel_mmu::kernel_map_pages_at(
 +        "Kernel data and bss",
 +        &phys_data_page_desc(),
@@ -1640,7 +1647,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -84,14 +140,12 @@
+@@ -89,14 +140,12 @@
      /// Check alignment of the kernel's virtual memory layout sections.
      #[kernel_test]
      fn virt_mem_layout_sections_are_64KiB_aligned() {
@@ -1660,7 +1667,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
              assert!(end >= start);
          }
      }
-@@ -99,17 +153,18 @@
+@@ -104,17 +153,18 @@
      /// Ensure the kernel's virtual memory layout is free of overlaps.
      #[kernel_test]
      fn virt_mem_layout_has_no_overlaps() {
@@ -1736,7 +1743,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 15_v
  use core::{cell::UnsafeCell, ops::RangeInclusive};
 
  //--------------------------------------------------------------------------------------------------
-@@ -17,34 +49,39 @@
+@@ -17,47 +49,39 @@
      static __bss_start: UnsafeCell<u64>;
      static __bss_end_inclusive: UnsafeCell<u64>;
      static __ro_start: UnsafeCell<()>;
@@ -1753,6 +1760,19 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 15_v
 +/// The board's physical memory map.
  #[rustfmt::skip]
  pub(super) mod map {
+-    /// The inclusive end address of the memory map.
+-    ///
+-    /// End address + 1 must be power of two.
+-    ///
+-    /// # Note
+-    ///
+-    /// RPi3 and RPi4 boards can have different amounts of RAM. To make our code lean for
+-    /// educational purposes, we set the max size of the address space to 4 GiB regardless of board.
+-    /// This way, we can map the entire range that we need (end of MMIO for RPi4) in one take.
+-    ///
+-    /// However, making this trade-off has the downside of making it possible for the CPU to assert a
+-    /// physical address that is not backed by any DRAM (e.g. accessing an address close to 4 GiB on
+-    /// an RPi3 that comes with 1 GiB of RAM). This would result in a crash or other kind of error.
 -    pub const END_INCLUSIVE:       usize = 0xFFFF_FFFF;
 +    use super::*;
 
@@ -1789,7 +1809,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 15_v
      }
 
      /// Physical devices.
-@@ -52,13 +89,22 @@
+@@ -65,13 +89,22 @@
      pub mod mmio {
          use super::*;
 
@@ -1818,7 +1838,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 15_v
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -71,8 +117,8 @@
+@@ -84,8 +117,8 @@
  ///
  /// - Value is provided by the linker script and must be trusted as-is.
  #[inline(always)]
@@ -1829,7 +1849,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 15_v
  }
 
  /// Size of the Read-Only (RO) range of the kernel binary.
-@@ -81,8 +127,42 @@
+@@ -94,8 +127,42 @@
  ///
  /// - Value is provided by the linker script and must be trusted as-is.
  #[inline(always)]
@@ -1874,7 +1894,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 15_v
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -91,8 +171,10 @@
+@@ -104,8 +171,10 @@
 
  /// Exclusive end address of the boot core's stack.
  #[inline(always)]
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
index 0e45185e3..8abb997e2 100644
--- a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
@@ -47,6 +47,12 @@ register_bitfields! {u64,
 // A level 3 page descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-17.
 register_bitfields! {u64,
     STAGE1_PAGE_DESCRIPTOR [
+        /// Unprivileged execute-never.
+        UXN      OFFSET(54) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
         /// Privileged execute-never.
         PXN      OFFSET(53) NUMBITS(1) [
             False = 0,
@@ -233,13 +239,16 @@ impl convert::From<AttributeFields>
             AccessPermissions::ReadWrite => STAGE1_PAGE_DESCRIPTOR::AP::RW_EL1,
         };
 
-        // Execute Never.
+        // The execute-never attribute is mapped to PXN in AArch64.
         desc += if attribute_fields.execute_never {
             STAGE1_PAGE_DESCRIPTOR::PXN::True
         } else {
             STAGE1_PAGE_DESCRIPTOR::PXN::False
         };
 
+        // Always set unprivileged exectue-never as long as userspace is not implemented yet.
+        desc += STAGE1_PAGE_DESCRIPTOR::UXN::True;
+
         desc
     }
 }
@@ -352,6 +361,7 @@ fn configure_translation_control() {
     TCR_EL1.write(
         TCR_EL1::TBI0::Ignored
             + TCR_EL1::IPS.val(ips)
+            + TCR_EL1::EPD1::DisableTTBR1Walks
             + TCR_EL1::TG0::KiB_64
             + TCR_EL1::SH0::Inner
             + TCR_EL1::ORGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable

From fb33dddacf3834a52df597eb3f469649227fbd8e Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Fri, 1 Jan 2021 21:07:58 +0100
Subject: [PATCH 015/214] Copyright update, again

---
 LICENSE-MIT               | 2 +-
 utils/update_copyright.rb | 7 ++-----
 2 files changed, 3 insertions(+), 6 deletions(-)

diff --git a/LICENSE-MIT b/LICENSE-MIT
index e91db966e..cfd323793 100644
--- a/LICENSE-MIT
+++ b/LICENSE-MIT
@@ -1,6 +1,6 @@
 MIT License
 
-Copyright (C) 2018-2020 by the respective authors
+Copyright (C) 2018-2021 by the respective authors
 
 Permission is hereby granted, free of charge, to any person obtaining a copy
 of this software and associated documentation files (the "Software"), to deal
diff --git a/utils/update_copyright.rb b/utils/update_copyright.rb
index 2d56fd816..c86d8ac30 100755
--- a/utils/update_copyright.rb
+++ b/utils/update_copyright.rb
@@ -13,8 +13,5 @@
 
 year = Date.today.year
 
-# Update "Copyright (c) 20..-20.."
-`sed -i -- 's,\\(Copyright .c. 20..\\)-20..,\\1-#{year},g' #{files}`
-
-# Update "Copyright (c) 20.. Name" -> "Copyright (c) 20..-20.. Name"
-`sed -i -- 's,\\(Copyright .c. 20..\\) ,\\1-#{year} ,g' #{files}`
+`sed -i -- 's,\\(Copyright .* 20..\\)-20..,\\1-#{year},g' #{files}`
+`sed -i -- 's,\\(Copyright .* #{year - 1}\\) ,\\1-#{year} ,g' #{files}`

From 269df3e25d6c72ddf9d995787691b2e855a34065 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Fri, 1 Jan 2021 21:13:09 +0100
Subject: [PATCH 016/214] Update toolchain

---
 07_uart_chainloader/demo_payload_rpi3.img | Bin 6712 -> 6712 bytes
 X1_JTAG_boot/jtag_boot_rpi3.img           | Bin 8064 -> 8064 bytes
 rust-toolchain                            |   2 +-
 3 files changed, 1 insertion(+), 1 deletion(-)

diff --git a/07_uart_chainloader/demo_payload_rpi3.img b/07_uart_chainloader/demo_payload_rpi3.img
index 7b314d3c9d3ff8f3360db8b5c7c4e5f4b0989ed9..a002d0525555b040896b5c76cbfb2571010361bd 100755
GIT binary patch
delta 61
zcmV-D0K)&cG`KXd(GLO<6_e8smI4wLvuh9r0|N0BvvU*40T}=QK>2h2{}%`(K&j#b
T0jl5w2&&-&395dxRTbj|nyeNw

delta 61
zcmV-D0K)&cG`KXd(GLRg6qC~rmICq=vuh9r0|G%6vvU*40T~D+K&j#b0jl5w2&&-&
T395kp{}%uNK>2R7RTbj|&juGh

diff --git a/X1_JTAG_boot/jtag_boot_rpi3.img b/X1_JTAG_boot/jtag_boot_rpi3.img
index 6d23c37d397a23916acbf64b4df727d723bf9647..e2653eb1b0788a031a8c78cf2eee9dee4b4b351f 100755
GIT binary patch
delta 59
zcmZp$Z?NAmQ;2cl=2=4KOhD?A$azM_kDC{XwJ}O^s5q>A#LT$r0W-&{hs>O-)c^e#
PXJBynDZ1HF!k!%fqRbV@

delta 59
zcmZp$Z?NAmQ;6~4=2=4KOhD?A$azM_g_{?NwJ}OEFgW~_`uAU)L&ag`BWA``512Vt
PJ!IxwrMlTs!k!%frrH&|

diff --git a/rust-toolchain b/rust-toolchain
index 23eb56819..b50e4d140 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1,4 +1,4 @@
 [toolchain]
-channel = "nightly-2020-12-09"
+channel = "nightly-2021-01-01"
 components = ["llvm-tools-preview"]
 targets = ["aarch64-unknown-none-softfloat"]

From ee52e8e288ef6f00416eed94921c2b0e1acfab73 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Fri, 1 Jan 2021 23:12:42 +0100
Subject: [PATCH 017/214] Bump UART to 576000 baud

---
 06_drivers_gpio_uart/README.md                |  18 ++++++++++--------
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  16 +++++++++-------
 07_uart_chainloader/README.md                 |   4 ++--
 07_uart_chainloader/demo_payload_rpi3.img     | Bin 6712 -> 6720 bytes
 07_uart_chainloader/demo_payload_rpi4.img     | Bin 6592 -> 6600 bytes
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  16 +++++++++-------
 08_timestamps/README.md                       |   2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  16 +++++++++-------
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  16 +++++++++-------
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  16 +++++++++-------
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  16 +++++++++-------
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  16 +++++++++-------
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  16 +++++++++-------
 14_exceptions_part2_peripheral_IRQs/README.md |  12 ++++++------
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  16 +++++++++-------
 15_virtual_mem_part2_mmio_remap/README.md     |  16 ++++++++--------
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  16 +++++++++-------
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  16 +++++++++-------
 utils/miniterm.rb                             |   2 +-
 19 files changed, 127 insertions(+), 103 deletions(-)

diff --git a/06_drivers_gpio_uart/README.md b/06_drivers_gpio_uart/README.md
index 33df63e87..0588109df 100644
--- a/06_drivers_gpio_uart/README.md
+++ b/06_drivers_gpio_uart/README.md
@@ -433,7 +433,7 @@ diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 06_drivers_g
 diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 --- 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 +++ 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
-@@ -0,0 +1,305 @@
+@@ -0,0 +1,307 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -610,19 +610,21 @@ diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 06_dri
 +
 +    /// Set up baud rate and characteristics.
 +    ///
-+    /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
-+    /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
-+    /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
-+    /// approximation we can get. A 5 modulo error margin is acceptable for UART and we're now at 0,01 modulo.
++    /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
 +    ///
-+    /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
++    /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
++    /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
++    ///
++    /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
++    /// give the best approximation we can get. A 5 modulo error margin is acceptable for UART and we're
++    /// now at 0.01 modulo.
 +    pub fn init(&mut self) {
 +        // Turn it off temporarily.
 +        self.registers.CR.set(0);
 +
 +        self.registers.ICR.write(ICR::ALL::CLEAR);
-+        self.registers.IBRD.write(IBRD::IBRD.val(13));
-+        self.registers.FBRD.write(FBRD::FBRD.val(1));
++        self.registers.IBRD.write(IBRD::IBRD.val(5));
++        self.registers.FBRD.write(FBRD::FBRD.val(13));
 +        self.registers
 +            .LCRH
 +            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
diff --git a/06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index de0bf813b..fdd92f65e 100644
--- a/06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -174,19 +174,21 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
-    /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
-    /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
-    /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
+    /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
     ///
-    /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
+    /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
+    /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
+    ///
+    /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
+    /// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
+    /// now at 0.01 %.
     pub fn init(&mut self) {
         // Turn it off temporarily.
         self.registers.CR.set(0);
 
         self.registers.ICR.write(ICR::ALL::CLEAR);
-        self.registers.IBRD.write(IBRD::IBRD.val(13));
-        self.registers.FBRD.write(FBRD::FBRD.val(1));
+        self.registers.IBRD.write(IBRD::IBRD.val(5));
+        self.registers.FBRD.write(FBRD::FBRD.val(13));
         self.registers
             .LCRH
             .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
diff --git a/07_uart_chainloader/README.md b/07_uart_chainloader/README.md
index 1491c84b8..2b7d797b7 100644
--- a/07_uart_chainloader/README.md
+++ b/07_uart_chainloader/README.md
@@ -222,7 +222,7 @@ diff -uNr 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs 07_uart_chainloader/src/
 diff -uNr 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 --- 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 +++ 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
-@@ -268,6 +268,15 @@
+@@ -270,6 +270,15 @@
          // readability.
          self.inner.lock(|inner| fmt::Write::write_fmt(inner, args))
      }
@@ -238,7 +238,7 @@ diff -uNr 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 0
  }
 
  impl console::interface::Read for PL011Uart {
-@@ -278,18 +287,20 @@
+@@ -280,18 +289,20 @@
                  cpu::nop();
              }
 
diff --git a/07_uart_chainloader/demo_payload_rpi3.img b/07_uart_chainloader/demo_payload_rpi3.img
index a002d0525555b040896b5c76cbfb2571010361bd..983c85c293b8c3a8cf564f8951f2ae20016e22c5 100755
GIT binary patch
delta 1105
zcmaJ<OK1~O6uoaIlP20WnI@B8P1BfaGf@|{)mmI+N-0VU3PD{cXzK^DsI>@g6q<^N
z;D<i05;uaMRSJR<m1bpw;KGG;p~aPq6(o%)xKJ3i#yiaef8c}5aL>DQ&b{Z|>8_cs
zd-YP|O9xzK0Qbzdz~e?CBK5Hb2=W<u-<%5!D-Sp#N2EN%^KzfY+W8SjHdA>5d<|qX
zmslH*-^ADQAS)G8j_pihZFpMQD5(J)bw+VkxgoJYVbr;cDO9TW7M|68lUcm*ba_=`
zZ}4g3es%?QkHLm;#FJpR@rtKU@6dQf25#0l^LAr#Si#Lc;N^Blek+Mq+LgSUaD4*5
zdbYU765IzcdGa<6c$?iU%IDT=GzcE|rri@!{!pS84SeM7tUsINrtF_8`@m|z&)#Ii
z*%n@|)<~%&r4BL!PpO>^r6?!i$pI3xe^oaty)8D$7qydVm}+X)qW#w0C^S7+fIr><
zW9!)E$hIi%ZfZUh?zb)xdNiz9^;*AmIcyY<Ew*=ms8)kOoHB)j0-%i_7+T4Pm2Bpm
zxsuPzj4%GE=31fkg^TVllFM$j-%2S)aYXZXrW7c;zh*No!eZBOuRn;Nn%1^3o$C~7
z=6ZhwU`OJ6je+c$Bpf&UbdTwT2g@j5AWH{S4Nv;^9;CshST?h~F`KamO*1IQjQ~$;
zP&Dr_p6rcHCx^0`)I@B$a)6$?L^;*iwDt?=w^s2=H(1qiM}8q8=gSG;I^kt{nfWKc
zLo~<`cK8pD|4)d1`kzqJ7AhrprS6xI?Tm{SsXSg2dbe23nO3#yA7^LUmYnT4XRP9O
zN5jHeyO7c3V6I-;a8r&=y`iwT9cbIfuvhc3GliYn9;QN=^nN=%SPBH=iC_&4h?^df
zOCk@U6-bY3p<0z!pgF-sb}t<!?)@VFC|GEfm(Jhyul`b<6}eN?&;8kj1UW1Q4~JVL
zwKld2xunQXU{5IKPHMH=O*kCd&Svp`sGH?+A+%4wF4|QEz5O*PE(qKs@EneXM<s~h
He0bMSPi-b^

delta 1103
zcmZuvO=uHA7@gV8ripEupJtnEW7>^dZGI4xR(tT!Eg`5CEC%tQX#WIlQG+cABG^>K
zi>>W2f+xY?X$yi7mF8qhp%f3Lp!6u43KC;I^q_RBb^SKGLa7c6?Dx%^_ujnyiXC$u
zFYB24_crtxBlJ@Jgh)ipH!(@<QX5H;?OSyqSyM0_VVjs3q7T?4UphdBZP|2X0g(jC
zrYB1hiDc<V_7u+L<F;PRlq7nGJIZYEG-D6b749ih;`15%Im`hx7RkS>`N?9OU#!&`
zJWm(v2k|70xn(TV5x0cz(MRrN%*&Gsi-=ldR}5njHAK`TBIP!lasosvZJgqSer$kl
zxsN-~NTdOwnX!Ac#}jgv_L5Z}4-cU?JYCL#FnPTO7Df8T(_S|iB`WKmEjJ*omVWm{
zU4zY}ted0&iF;3Bk>2vQyK-Ry!ZSS}W?c0i<08!l$q#Qk_R_d7#0x3yMHu;(IYizb
zK{pTLsixBcJ?{$*@F{H)y4QG4tMjI`DM2n=-)`&trt1L&oGfe`Y@|wLNZv;VxNQ1<
zaUWS@G1>mDKM|4m!2#zFA!Vm4rNue9Fv9!W;~XkDx3X!6i>~^PH<zL$2D=M8z78XF
zR{CY$gji;vPmeXk+(kQjwFl}i5M|GXpN=(L>c`o193E9$pG~h1A-IkT#zVV!REUU;
zB--6F7wrekM9ZA|9FxR6)PON)jpSn!`^kDI()4kg@<n2mvIKu6!6|DChzMX_rbqmj
z$9ITS$$_9M_CFCI_$y+(+L4pUdW|ViPOwU~2ZK`{H$}?Z`V+LJcl?v&vsN=naX;xc
z+zeS!8bAz&Q1L)@qE)tKwglUlZUoak_FE4)T4e>|pH*20oH=Lj<}dOW@X5^}sP9;Z
z17^)wz0~MvW)!|dR=?5e@5Xs34s?yXEH;mYnifnpNT|9ri^Xr%pRF23ySjGcS9Yl`
zS+(85FI%<cmO;~WK5#_{Hkq=rWk<B?tF$}V;uLxF^bj2m_TnX42zKHe-3a#K8G1$t
Vc(ayi_g_==wvb^q1zHi#{Q(i3GVuTa

diff --git a/07_uart_chainloader/demo_payload_rpi4.img b/07_uart_chainloader/demo_payload_rpi4.img
index a7c0fdc068b7a1db1a3e23a3c4c940d9805fde3b..979c0dfd3ee8fbc6f5c4485c3bbe440cb6cd26ec 100755
GIT binary patch
delta 1228
zcmZ8hU1$_n6h3!;;*4#R-DH0o=<Mtg$4yKnrtM;-xWNb}f`L`gCwD_0Bw`7T;Onm9
zLquD0bA>{oP}4#?@g=Y=Wc9&a(}(s&lePv#gx!F$Dn3QUA)4{rnH#a*mvhh0J>Pe~
zb7!jkfA!Drkhab%aG3zin}zZhQV;1(glUbGa#cCMqCwU%`k><3{l2xKl+(M!p0Mxa
zePOeUjw_|y<3*r7n7w2ssaa(Y<%6VA-ldEXVzP5;hV-#(>UG>-Q$HzRZrM##tV@rU
z|JkxGlY#QB4_rwiadx|PluWR`wyar-(^+gMf0T6!V63?Nq~(o0;5-}AY(TzHWixGu
zgN=6Dv=qB31Ko<z;VbM#n?VvR63C>fN&m*HG%fJ*5rFBHRjj`!*&Vn)eRCVt&}t?-
z6G)K)`ytS2Ug@N1L=9v7k7Uy8?G{!0d9lStm8Q)CTM1a&>^54LLvw3P4Q?m1?9-ru
z#}5S$@+Lv+t41ds#wN{QW&5$K*zUioy`B3RaQr4ATK^g7s!ZtB4fp$!3Yj$-9FNQ>
z+XzOnPozCX?y@i2Exj@5+){xaYOs^-oyGfu&L#9t-B+9s?+!ZO#<P{LUt5`{t{X*J
zrXi7}GTO0Hf+}dwgX!Uns-@gIVkIE)AIH(}3_9IvwsH|CcQPF6?^bc97}H@cr$2xS
zpTGYGxIh-w@k|<RWG~U4i~}6$edRav6YS%TWNTH0-}xX!Xt-lf5pQh}s2E|W=mW-r
zjpNYI8Vh<W+M2PDE}+GHa||d~$5Wt|qC;FQOSau2jy46}NSc-^M!?l0bafGEFWxAt
z!sq#fe8)uvrtqBh=Z#6XDA^bAW;3BKPJzSb5hjl`4j>H;;fIh0hd+QchBhf|5fmDx
zfRt_jg(Rs*1z*D30U|9<K|u<z?tb<^@#{%n{6dQE<V9TlqEH{FKBp;JyDn>UzijZS
zWt|z%;`E@ad^<EwhNfbO`_8IGd|wi={gaauleoVs;`p|`^?uz?>}+Ij@yDotIv}cy
zxbNd#ymdk3L&85JeEdqh^?rRp<Tp`|3BN_u9~Zu0D}liVq9@|N3D_l(o)`X0R*M??
qQphJ&XOE&I<QUr><Nu6rVtM?Umt)ajKvcJFl44G5f=sdT_|Z4*fn+%V

delta 1162
zcmZ8fOK1~O6uoaIQ!`cDO!Jw<g40RVG*t^)F{p@BtWYc18b#eT#f4P-Pz1qMlHx}E
z(C4ctuBw7M3Zg`z(M_Y9cBA;KiU?IuVnwj{fuY**&dgKP2jRYR@11jR&UvFPBP}<U
z2-VkpFh~Gy=tgm+u$U}`FfEgOW<=~B_k&?+%b?`O4PG>{CNK2vDPSkX^<lD*_WJUf
z$@@STLq2ny#Hl{S-iw<^xwzcdNeE&6Qkp32j&v9Accl5n!Kzh6!oE~%@$sx_k?6$-
zvu#0m6J-x;ddNPutk%%8F?s>%#JPr*1#R43FFcxA1J>70zX`Z646#$STa|Jhtt5SB
zMFd)n*^UDHUaJvckw7}tr_(W9w~_?69sw8_zlZ&=1T%>DgBKQ2KSn=chXM&=uycWW
zy--h6I5mv<+d|yswsVsCEmvitN&~vV#sf)z{~|gehOSOANogegtXa|U^Uca8heS!P
zE!WcyB&l2$%}Lv5+D|02(ZOl3JdzNdxCr#ENa(d0`%GSf^cN8<cbQf;qo~LesY{S&
zY;|2ye%)q0kbrJ}&GyvQ=U%p1#}Vy)>9giMYqL(ojMBcJ$@C}NR#BD#fH)N~?#eb$
zAI2jS4ep#CDW93fSq;$e)R`kcYO|UoqjU_N+Y=78G)d?w=47~<k>5ed@!xv`jzCE&
z<2Nack#)rXu@_+5(jOj~S77sk@tPqCZaGHqR7Y@47Uf4bN?I67a;rA%NGlh#;p&=v
zrn;;RH)Szmy|T--Z=mCRf;uX-W8Y*#H0>N(n*g*y;_^Gn5&HH%&}Qe~un$2)!Xfw+
zn?sS_cI0eC&i21K%Q~&h0&6lUnx5Tp>hhwkf84+s4ri6aIc=}_N6C@6r=*c^dmJST
z>}Dt!yfouzZdikEMC~UQ6rYEBiIR`vpubLuZHcJ*#fX>1cj%rH#{$P^+0n?l+-cS8
z3h=BN^DwUJo&v9jINr}OzG(OS-@lXBe^2e=xQh30=a_FHfXX(iyJJIq>?ki^;rKHf
xQ#E-s<Sq4rO{txvi?v46B*hL#yHio#r*L{F8u;_`d@awbjKmI*JnM_?_ywKuLgN4c

diff --git a/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 1eb98fc4f..1678cf00f 100644
--- a/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -174,19 +174,21 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
-    /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
-    /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
-    /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
+    /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
     ///
-    /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
+    /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
+    /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
+    ///
+    /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
+    /// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
+    /// now at 0.01 %.
     pub fn init(&mut self) {
         // Turn it off temporarily.
         self.registers.CR.set(0);
 
         self.registers.ICR.write(ICR::ALL::CLEAR);
-        self.registers.IBRD.write(IBRD::IBRD.val(13));
-        self.registers.FBRD.write(FBRD::FBRD.val(1));
+        self.registers.IBRD.write(IBRD::IBRD.val(5));
+        self.registers.FBRD.write(FBRD::FBRD.val(13));
         self.registers
             .LCRH
             .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
diff --git a/08_timestamps/README.md b/08_timestamps/README.md
index cf3173bdc..dedf93c89 100644
--- a/08_timestamps/README.md
+++ b/08_timestamps/README.md
@@ -309,7 +309,7 @@ diff -uNr 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 08_times
 diff -uNr 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 --- 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 +++ 08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
-@@ -287,11 +287,18 @@
+@@ -289,11 +289,18 @@
                  cpu::nop();
              }
 
diff --git a/08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 66b734638..46cceff92 100644
--- a/08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -174,19 +174,21 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
-    /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
-    /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
-    /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
+    /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
     ///
-    /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
+    /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
+    /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
+    ///
+    /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
+    /// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
+    /// now at 0.01 %.
     pub fn init(&mut self) {
         // Turn it off temporarily.
         self.registers.CR.set(0);
 
         self.registers.ICR.write(ICR::ALL::CLEAR);
-        self.registers.IBRD.write(IBRD::IBRD.val(13));
-        self.registers.FBRD.write(FBRD::FBRD.val(1));
+        self.registers.IBRD.write(IBRD::IBRD.val(5));
+        self.registers.FBRD.write(FBRD::FBRD.val(13));
         self.registers
             .LCRH
             .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
diff --git a/09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 66b734638..46cceff92 100644
--- a/09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -174,19 +174,21 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
-    /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
-    /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
-    /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
+    /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
     ///
-    /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
+    /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
+    /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
+    ///
+    /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
+    /// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
+    /// now at 0.01 %.
     pub fn init(&mut self) {
         // Turn it off temporarily.
         self.registers.CR.set(0);
 
         self.registers.ICR.write(ICR::ALL::CLEAR);
-        self.registers.IBRD.write(IBRD::IBRD.val(13));
-        self.registers.FBRD.write(FBRD::FBRD.val(1));
+        self.registers.IBRD.write(IBRD::IBRD.val(5));
+        self.registers.FBRD.write(FBRD::FBRD.val(13));
         self.registers
             .LCRH
             .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
diff --git a/10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 66b734638..46cceff92 100644
--- a/10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -174,19 +174,21 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
-    /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
-    /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
-    /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
+    /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
     ///
-    /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
+    /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
+    /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
+    ///
+    /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
+    /// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
+    /// now at 0.01 %.
     pub fn init(&mut self) {
         // Turn it off temporarily.
         self.registers.CR.set(0);
 
         self.registers.ICR.write(ICR::ALL::CLEAR);
-        self.registers.IBRD.write(IBRD::IBRD.val(13));
-        self.registers.FBRD.write(FBRD::FBRD.val(1));
+        self.registers.IBRD.write(IBRD::IBRD.val(5));
+        self.registers.FBRD.write(FBRD::FBRD.val(13));
         self.registers
             .LCRH
             .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 66b734638..46cceff92 100644
--- a/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -174,19 +174,21 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
-    /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
-    /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
-    /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
+    /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
     ///
-    /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
+    /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
+    /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
+    ///
+    /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
+    /// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
+    /// now at 0.01 %.
     pub fn init(&mut self) {
         // Turn it off temporarily.
         self.registers.CR.set(0);
 
         self.registers.ICR.write(ICR::ALL::CLEAR);
-        self.registers.IBRD.write(IBRD::IBRD.val(13));
-        self.registers.FBRD.write(FBRD::FBRD.val(1));
+        self.registers.IBRD.write(IBRD::IBRD.val(5));
+        self.registers.FBRD.write(FBRD::FBRD.val(13));
         self.registers
             .LCRH
             .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
diff --git a/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 66b734638..46cceff92 100644
--- a/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -174,19 +174,21 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
-    /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
-    /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
-    /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
+    /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
     ///
-    /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
+    /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
+    /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
+    ///
+    /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
+    /// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
+    /// now at 0.01 %.
     pub fn init(&mut self) {
         // Turn it off temporarily.
         self.registers.CR.set(0);
 
         self.registers.ICR.write(ICR::ALL::CLEAR);
-        self.registers.IBRD.write(IBRD::IBRD.val(13));
-        self.registers.FBRD.write(FBRD::FBRD.val(1));
+        self.registers.IBRD.write(IBRD::IBRD.val(5));
+        self.registers.FBRD.write(FBRD::FBRD.val(13));
         self.registers
             .LCRH
             .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
diff --git a/13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 66b734638..46cceff92 100644
--- a/13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -174,19 +174,21 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
-    /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
-    /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
-    /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
+    /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
     ///
-    /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
+    /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
+    /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
+    ///
+    /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
+    /// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
+    /// now at 0.01 %.
     pub fn init(&mut self) {
         // Turn it off temporarily.
         self.registers.CR.set(0);
 
         self.registers.ICR.write(ICR::ALL::CLEAR);
-        self.registers.IBRD.write(IBRD::IBRD.val(13));
-        self.registers.FBRD.write(FBRD::FBRD.val(1));
+        self.registers.IBRD.write(IBRD::IBRD.val(5));
+        self.registers.FBRD.write(FBRD::FBRD.val(13));
         self.registers
             .LCRH
             .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
diff --git a/14_exceptions_part2_peripheral_IRQs/README.md b/14_exceptions_part2_peripheral_IRQs/README.md
index 042c3f601..d9baef354 100644
--- a/14_exceptions_part2_peripheral_IRQs/README.md
+++ b/14_exceptions_part2_peripheral_IRQs/README.md
@@ -1885,7 +1885,7 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -190,6 +242,10 @@
+@@ -192,6 +244,10 @@
          self.registers
              .LCRH
              .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
@@ -1896,7 +1896,7 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
          self.registers
              .CR
              .write(CR::UARTEN::Enabled + CR::TXE::Enabled + CR::RXE::Enabled);
-@@ -207,6 +263,35 @@
+@@ -209,6 +265,35 @@
 
          self.chars_written += 1;
      }
@@ -1932,7 +1932,7 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
  }
 
  /// Implementing `core::fmt::Write` enables usage of the `format_args!` macros, which in turn are
-@@ -229,12 +314,18 @@
+@@ -231,12 +316,18 @@
  }
 
  impl PL011Uart {
@@ -1953,7 +1953,7 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
          }
      }
  }
-@@ -254,6 +345,21 @@
+@@ -256,6 +347,21 @@
 
          Ok(())
      }
@@ -1975,7 +1975,7 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
  }
 
  impl console::interface::Write for PL011Uart {
-@@ -281,25 +387,8 @@
+@@ -283,25 +389,8 @@
 
  impl console::interface::Read for PL011Uart {
      fn read_char(&self) -> char {
@@ -2003,7 +2003,7 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
      }
 
      fn clear(&self) {
-@@ -321,3 +410,24 @@
+@@ -323,3 +412,24 @@
          self.inner.lock(|inner| inner.chars_read)
      }
  }
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 29bf95c13..9504cfc31 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -226,19 +226,21 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
-    /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
-    /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
-    /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
+    /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
     ///
-    /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
+    /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
+    /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
+    ///
+    /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
+    /// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
+    /// now at 0.01 %.
     pub fn init(&mut self) {
         // Turn it off temporarily.
         self.registers.CR.set(0);
 
         self.registers.ICR.write(ICR::ALL::CLEAR);
-        self.registers.IBRD.write(IBRD::IBRD.val(13));
-        self.registers.FBRD.write(FBRD::FBRD.val(1));
+        self.registers.IBRD.write(IBRD::IBRD.val(5));
+        self.registers.FBRD.write(FBRD::FBRD.val(13));
         self.registers
             .LCRH
             .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
diff --git a/15_virtual_mem_part2_mmio_remap/README.md b/15_virtual_mem_part2_mmio_remap/README.md
index ab11fbfa6..77f6ad626 100644
--- a/15_virtual_mem_part2_mmio_remap/README.md
+++ b/15_virtual_mem_part2_mmio_remap/README.md
@@ -1304,10 +1304,10 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
      inner: IRQSafeNullLock<PL011UartInner>,
      irq_number: bsp::device_driver::IRQNumber,
  }
-@@ -232,7 +237,15 @@
-     /// approximation we can get. A 5 modulo error margin is acceptable for UART and we're now at 0,01 modulo.
-     ///
-     /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
+@@ -234,7 +239,15 @@
+     /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
+     /// give the best approximation we can get. A 5 modulo error margin is acceptable for UART and we're
+     /// now at 0.01 modulo.
 -    pub fn init(&mut self) {
 +    ///
 +    /// # Safety
@@ -1321,7 +1321,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
          // Turn it off temporarily.
          self.registers.CR.set(0);
 
-@@ -249,6 +262,8 @@
+@@ -251,6 +264,8 @@
          self.registers
              .CR
              .write(CR::UARTEN::Enabled + CR::TXE::Enabled + CR::RXE::Enabled);
@@ -1330,7 +1330,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
      }
 
      /// Send a character.
-@@ -318,13 +333,18 @@
+@@ -320,13 +335,18 @@
      ///
      /// # Safety
      ///
@@ -1352,7 +1352,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
              irq_number,
          }
      }
-@@ -341,7 +361,14 @@
+@@ -343,7 +363,14 @@
      }
 
      unsafe fn init(&self) -> Result<(), &'static str> {
@@ -1368,7 +1368,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
 
          Ok(())
      }
-@@ -360,6 +387,16 @@
+@@ -362,6 +389,16 @@
 
          Ok(())
      }
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index c2354d430..b2fc254bd 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -231,12 +231,14 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
-    /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
-    /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
-    /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
+    /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
     ///
-    /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
+    /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
+    /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
+    ///
+    /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
+    /// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
+    /// now at 0.01 %.
     ///
     /// # Safety
     ///
@@ -250,8 +252,8 @@ impl PL011UartInner {
         self.registers.CR.set(0);
 
         self.registers.ICR.write(ICR::ALL::CLEAR);
-        self.registers.IBRD.write(IBRD::IBRD.val(13));
-        self.registers.FBRD.write(FBRD::FBRD.val(1));
+        self.registers.IBRD.write(IBRD::IBRD.val(5));
+        self.registers.FBRD.write(FBRD::FBRD.val(13));
         self.registers
             .LCRH
             .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
diff --git a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 66b734638..46cceff92 100644
--- a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -174,19 +174,21 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
-    /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
-    /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
-    /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
+    /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
     ///
-    /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
+    /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
+    /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
+    ///
+    /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
+    /// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
+    /// now at 0.01 %.
     pub fn init(&mut self) {
         // Turn it off temporarily.
         self.registers.CR.set(0);
 
         self.registers.ICR.write(ICR::ALL::CLEAR);
-        self.registers.IBRD.write(IBRD::IBRD.val(13));
-        self.registers.FBRD.write(FBRD::FBRD.val(1));
+        self.registers.IBRD.write(IBRD::IBRD.val(5));
+        self.registers.FBRD.write(FBRD::FBRD.val(13));
         self.registers
             .LCRH
             .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
diff --git a/utils/miniterm.rb b/utils/miniterm.rb
index 0875ada55..010761cd8 100755
--- a/utils/miniterm.rb
+++ b/utils/miniterm.rb
@@ -41,7 +41,7 @@ def wait_for_serial
     def open_serial
         wait_for_serial
 
-        @target_serial = SerialPort.new(@target_serial_name, 230_400, 8, 1, SerialPort::NONE)
+        @target_serial = SerialPort.new(@target_serial_name, 576_000, 8, 1, SerialPort::NONE)
 
         # Ensure all output is immediately flushed to the device.
         @target_serial.sync = true

From f2a891236e24289e9f4eb9c6c31ee01f67a4a036 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sat, 2 Jan 2021 16:00:16 +0100
Subject: [PATCH 018/214] Remove unused feature

---
 04_zero_overhead_abstraction/README.md        |   5 ++---
 04_zero_overhead_abstraction/src/main.rs      |   1 -
 05_safe_globals/README.md                     |   8 ++++----
 05_safe_globals/src/main.rs                   |   1 -
 06_drivers_gpio_uart/README.md                |   6 +++---
 06_drivers_gpio_uart/src/main.rs              |   1 -
 07_uart_chainloader/README.md                 |   8 ++++----
 07_uart_chainloader/demo_payload_rpi3.img     | Bin 6720 -> 6720 bytes
 07_uart_chainloader/demo_payload_rpi4.img     | Bin 6600 -> 6600 bytes
 07_uart_chainloader/src/main.rs               |   1 -
 08_timestamps/README.md                       |   8 ++++----
 08_timestamps/src/main.rs                     |   1 -
 09_hw_debug_JTAG/src/main.rs                  |   1 -
 10_privilege_level/README.md                  |   6 +++---
 10_privilege_level/src/main.rs                |   1 -
 .../README.md                                 |   8 ++++----
 .../src/main.rs                               |   1 -
 12_exceptions_part1_groundwork/README.md      |   6 +++---
 12_exceptions_part1_groundwork/src/main.rs    |   1 -
 13_integrated_testing/README.md               |  12 +++++-------
 13_integrated_testing/src/lib.rs              |   1 -
 14_exceptions_part2_peripheral_IRQs/README.md |   2 +-
 .../src/lib.rs                                |   1 -
 15_virtual_mem_part2_mmio_remap/README.md     |   2 +-
 15_virtual_mem_part2_mmio_remap/src/lib.rs    |   1 -
 X1_JTAG_boot/jtag_boot_rpi3.img               | Bin 8064 -> 8080 bytes
 X1_JTAG_boot/jtag_boot_rpi4.img               | Bin 6800 -> 6800 bytes
 X1_JTAG_boot/src/main.rs                      |   1 -
 28 files changed, 34 insertions(+), 50 deletions(-)

diff --git a/04_zero_overhead_abstraction/README.md b/04_zero_overhead_abstraction/README.md
index 003108219..1e8d4c6d9 100644
--- a/04_zero_overhead_abstraction/README.md
+++ b/04_zero_overhead_abstraction/README.md
@@ -219,18 +219,17 @@ diff -uNr 03_hacky_hello_world/src/cpu.rs 04_zero_overhead_abstraction/src/cpu.r
 diff -uNr 03_hacky_hello_world/src/main.rs 04_zero_overhead_abstraction/src/main.rs
 --- 03_hacky_hello_world/src/main.rs
 +++ 04_zero_overhead_abstraction/src/main.rs
-@@ -92,9 +92,8 @@
+@@ -92,9 +92,7 @@
  //! - `crate::memory::*`
  //! - `crate::bsp::memory::*`
 
 -#![feature(asm)]
  #![feature(format_args_nl)]
 -#![feature(global_asm)]
-+#![feature(naked_functions)]
  #![feature(panic_info_message)]
  #![no_main]
  #![no_std]
-@@ -116,7 +115,8 @@
+@@ -116,7 +114,8 @@
  ///
  /// - Only a single core must be active and running this function.
  unsafe fn kernel_init() -> ! {
diff --git a/04_zero_overhead_abstraction/src/main.rs b/04_zero_overhead_abstraction/src/main.rs
index 22e179229..cd4c99e58 100644
--- a/04_zero_overhead_abstraction/src/main.rs
+++ b/04_zero_overhead_abstraction/src/main.rs
@@ -93,7 +93,6 @@
 //! - `crate::bsp::memory::*`
 
 #![feature(format_args_nl)]
-#![feature(naked_functions)]
 #![feature(panic_info_message)]
 #![no_main]
 #![no_std]
diff --git a/05_safe_globals/README.md b/05_safe_globals/README.md
index a66e7f2b4..537b0ba3b 100644
--- a/05_safe_globals/README.md
+++ b/05_safe_globals/README.md
@@ -213,15 +213,15 @@ diff -uNr 04_zero_overhead_abstraction/src/console.rs 05_safe_globals/src/consol
 diff -uNr 04_zero_overhead_abstraction/src/main.rs 05_safe_globals/src/main.rs
 --- 04_zero_overhead_abstraction/src/main.rs
 +++ 05_safe_globals/src/main.rs
-@@ -95,6 +95,7 @@
+@@ -94,6 +94,7 @@
+
  #![feature(format_args_nl)]
- #![feature(naked_functions)]
  #![feature(panic_info_message)]
 +#![feature(trait_alias)]
  #![no_main]
  #![no_std]
 
-@@ -108,6 +109,7 @@
+@@ -107,6 +108,7 @@
  mod panic_wait;
  mod print;
  mod runtime_init;
@@ -229,7 +229,7 @@ diff -uNr 04_zero_overhead_abstraction/src/main.rs 05_safe_globals/src/main.rs
 
  /// Early init code.
  ///
-@@ -115,8 +117,15 @@
+@@ -114,8 +116,15 @@
  ///
  /// - Only a single core must be active and running this function.
  unsafe fn kernel_init() -> ! {
diff --git a/05_safe_globals/src/main.rs b/05_safe_globals/src/main.rs
index 2c29444fd..64d4c5fd6 100644
--- a/05_safe_globals/src/main.rs
+++ b/05_safe_globals/src/main.rs
@@ -93,7 +93,6 @@
 //! - `crate::bsp::memory::*`
 
 #![feature(format_args_nl)]
-#![feature(naked_functions)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
 #![no_main]
diff --git a/06_drivers_gpio_uart/README.md b/06_drivers_gpio_uart/README.md
index 0588109df..4c030e744 100644
--- a/06_drivers_gpio_uart/README.md
+++ b/06_drivers_gpio_uart/README.md
@@ -1206,9 +1206,9 @@ diff -uNr 05_safe_globals/src/main.rs 06_drivers_gpio_uart/src/main.rs
 
 +#![feature(const_fn_fn_ptr_basics)]
  #![feature(format_args_nl)]
- #![feature(naked_functions)]
  #![feature(panic_info_message)]
-@@ -105,6 +114,7 @@
+ #![feature(trait_alias)]
+@@ -104,6 +113,7 @@
  mod bsp;
  mod console;
  mod cpu;
@@ -1216,7 +1216,7 @@ diff -uNr 05_safe_globals/src/main.rs 06_drivers_gpio_uart/src/main.rs
  mod memory;
  mod panic_wait;
  mod print;
-@@ -116,16 +126,46 @@
+@@ -115,16 +125,46 @@
  /// # Safety
  ///
  /// - Only a single core must be active and running this function.
diff --git a/06_drivers_gpio_uart/src/main.rs b/06_drivers_gpio_uart/src/main.rs
index c45f7f785..e0bf47a93 100644
--- a/06_drivers_gpio_uart/src/main.rs
+++ b/06_drivers_gpio_uart/src/main.rs
@@ -102,7 +102,6 @@
 
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
-#![feature(naked_functions)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
 #![no_main]
diff --git a/07_uart_chainloader/README.md b/07_uart_chainloader/README.md
index 2b7d797b7..b87b4bed0 100644
--- a/07_uart_chainloader/README.md
+++ b/07_uart_chainloader/README.md
@@ -413,9 +413,9 @@ diff -uNr 06_drivers_gpio_uart/src/main.rs 07_uart_chainloader/src/main.rs
  #![feature(const_fn_fn_ptr_basics)]
 +#![feature(core_intrinsics)]
  #![feature(format_args_nl)]
- #![feature(naked_functions)]
  #![feature(panic_info_message)]
-@@ -109,7 +111,8 @@
+ #![feature(trait_alias)]
+@@ -108,7 +110,8 @@
  #![no_std]
 
  // `mod cpu` provides the `_start()` function, the first function to run. `_start()` then calls
@@ -425,7 +425,7 @@ diff -uNr 06_drivers_gpio_uart/src/main.rs 07_uart_chainloader/src/main.rs
 
  mod bsp;
  mod console;
-@@ -118,6 +121,7 @@
+@@ -117,6 +120,7 @@
  mod memory;
  mod panic_wait;
  mod print;
@@ -433,7 +433,7 @@ diff -uNr 06_drivers_gpio_uart/src/main.rs 07_uart_chainloader/src/main.rs
  mod runtime_init;
  mod synchronization;
 
-@@ -144,28 +148,52 @@
+@@ -143,28 +147,52 @@
 
  /// The main function running after the early init.
  fn kernel_main() -> ! {
diff --git a/07_uart_chainloader/demo_payload_rpi3.img b/07_uart_chainloader/demo_payload_rpi3.img
index 983c85c293b8c3a8cf564f8951f2ae20016e22c5..34c3214cfbe8d37cc863e86b50c5d3630ce0304e 100755
GIT binary patch
delta 14
VcmX?La=>JRfH-5@W<ha%W&kKE1XKV3

delta 14
VcmX?La=>JRfH-6OW<ha%W&kKK1XTb4

diff --git a/07_uart_chainloader/demo_payload_rpi4.img b/07_uart_chainloader/demo_payload_rpi4.img
index 979c0dfd3ee8fbc6f5c4485c3bbe440cb6cd26ec..c7919ed6517de38049e1f9fd7eb05966c58a4063 100755
GIT binary patch
delta 14
VcmX?Me8PCc3^B&G%`?UHnE@}q1#kcW

delta 14
VcmX?Me8PCc3^B&`%`?UHnE@}w1#tiX

diff --git a/07_uart_chainloader/src/main.rs b/07_uart_chainloader/src/main.rs
index e71ab16cd..2e436374c 100644
--- a/07_uart_chainloader/src/main.rs
+++ b/07_uart_chainloader/src/main.rs
@@ -104,7 +104,6 @@
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
-#![feature(naked_functions)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
 #![no_main]
diff --git a/08_timestamps/README.md b/08_timestamps/README.md
index dedf93c89..0bd342521 100644
--- a/08_timestamps/README.md
+++ b/08_timestamps/README.md
@@ -462,9 +462,9 @@ diff -uNr 07_uart_chainloader/src/main.rs 08_timestamps/src/main.rs
  #![feature(const_fn_fn_ptr_basics)]
 -#![feature(core_intrinsics)]
  #![feature(format_args_nl)]
- #![feature(naked_functions)]
  #![feature(panic_info_message)]
-@@ -111,8 +111,7 @@
+ #![feature(trait_alias)]
+@@ -110,8 +110,7 @@
  #![no_std]
 
  // `mod cpu` provides the `_start()` function, the first function to run. `_start()` then calls
@@ -474,7 +474,7 @@ diff -uNr 07_uart_chainloader/src/main.rs 08_timestamps/src/main.rs
 
  mod bsp;
  mod console;
-@@ -121,9 +120,9 @@
+@@ -120,9 +119,9 @@
  mod memory;
  mod panic_wait;
  mod print;
@@ -485,7 +485,7 @@ diff -uNr 07_uart_chainloader/src/main.rs 08_timestamps/src/main.rs
 
  /// Early init code.
  ///
-@@ -148,52 +147,31 @@
+@@ -147,52 +146,31 @@
 
  /// The main function running after the early init.
  fn kernel_main() -> ! {
diff --git a/08_timestamps/src/main.rs b/08_timestamps/src/main.rs
index 4dad25714..b9db5fef4 100644
--- a/08_timestamps/src/main.rs
+++ b/08_timestamps/src/main.rs
@@ -104,7 +104,6 @@
 
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
-#![feature(naked_functions)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
 #![no_main]
diff --git a/09_hw_debug_JTAG/src/main.rs b/09_hw_debug_JTAG/src/main.rs
index 4dad25714..b9db5fef4 100644
--- a/09_hw_debug_JTAG/src/main.rs
+++ b/09_hw_debug_JTAG/src/main.rs
@@ -104,7 +104,6 @@
 
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
-#![feature(naked_functions)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
 #![no_main]
diff --git a/10_privilege_level/README.md b/10_privilege_level/README.md
index fab885983..8716099e8 100644
--- a/10_privilege_level/README.md
+++ b/10_privilege_level/README.md
@@ -456,7 +456,7 @@ diff -uNr 09_hw_debug_JTAG/src/exception.rs 10_privilege_level/src/exception.rs
 diff -uNr 09_hw_debug_JTAG/src/main.rs 10_privilege_level/src/main.rs
 --- 09_hw_debug_JTAG/src/main.rs
 +++ 10_privilege_level/src/main.rs
-@@ -117,6 +117,7 @@
+@@ -116,6 +116,7 @@
  mod console;
  mod cpu;
  mod driver;
@@ -464,7 +464,7 @@ diff -uNr 09_hw_debug_JTAG/src/main.rs 10_privilege_level/src/main.rs
  mod memory;
  mod panic_wait;
  mod print;
-@@ -147,12 +148,19 @@
+@@ -146,12 +147,19 @@
 
  /// The main function running after the early init.
  fn kernel_main() -> ! {
@@ -484,7 +484,7 @@ diff -uNr 09_hw_debug_JTAG/src/main.rs 10_privilege_level/src/main.rs
      info!(
          "Architectural timer resolution: {} ns",
          time::time_manager().resolution().as_nanos()
-@@ -167,11 +175,12 @@
+@@ -166,11 +174,12 @@
          info!("      {}. {}", i + 1, driver.compatible());
      }
 
diff --git a/10_privilege_level/src/main.rs b/10_privilege_level/src/main.rs
index faa42f902..0c730ff96 100644
--- a/10_privilege_level/src/main.rs
+++ b/10_privilege_level/src/main.rs
@@ -104,7 +104,6 @@
 
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
-#![feature(naked_functions)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
 #![no_main]
diff --git a/11_virtual_mem_part1_identity_mapping/README.md b/11_virtual_mem_part1_identity_mapping/README.md
index df84c9669..6216fd65e 100644
--- a/11_virtual_mem_part1_identity_mapping/README.md
+++ b/11_virtual_mem_part1_identity_mapping/README.md
@@ -892,9 +892,9 @@ diff -uNr 10_privilege_level/src/main.rs 11_virtual_mem_part1_identity_mapping/s
 +#![feature(const_generics)]
 +#![feature(const_panic)]
  #![feature(format_args_nl)]
- #![feature(naked_functions)]
  #![feature(panic_info_message)]
-@@ -130,9 +135,18 @@
+ #![feature(trait_alias)]
+@@ -129,9 +134,18 @@
  /// # Safety
  ///
  /// - Only a single core must be active and running this function.
@@ -914,7 +914,7 @@ diff -uNr 10_privilege_level/src/main.rs 11_virtual_mem_part1_identity_mapping/s
 
      for i in bsp::driver::driver_manager().all_device_drivers().iter() {
          if let Err(x) = i.init() {
-@@ -155,6 +169,9 @@
+@@ -154,6 +168,9 @@
 
      info!("Booting on: {}", bsp::board_name());
 
@@ -924,7 +924,7 @@ diff -uNr 10_privilege_level/src/main.rs 11_virtual_mem_part1_identity_mapping/s
      let (_, privilege_level) = exception::current_privilege_level();
      info!("Current privilege level: {}", privilege_level);
 
-@@ -178,6 +195,13 @@
+@@ -177,6 +194,13 @@
      info!("Timer test, spinning for 1 second");
      time::time_manager().spin_for(Duration::from_secs(1));
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/main.rs b/11_virtual_mem_part1_identity_mapping/src/main.rs
index eed8b35c6..41ca22e33 100644
--- a/11_virtual_mem_part1_identity_mapping/src/main.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/main.rs
@@ -109,7 +109,6 @@
 #![feature(const_generics)]
 #![feature(const_panic)]
 #![feature(format_args_nl)]
-#![feature(naked_functions)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
 #![no_main]
diff --git a/12_exceptions_part1_groundwork/README.md b/12_exceptions_part1_groundwork/README.md
index 979636866..c6264088f 100644
--- a/12_exceptions_part1_groundwork/README.md
+++ b/12_exceptions_part1_groundwork/README.md
@@ -961,10 +961,10 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/main.rs 12_exceptions_part1_
  #![feature(const_panic)]
  #![feature(format_args_nl)]
 +#![feature(global_asm)]
- #![feature(naked_functions)]
  #![feature(panic_info_message)]
  #![feature(trait_alias)]
-@@ -144,6 +145,8 @@
+ #![no_main]
+@@ -143,6 +144,8 @@
      use driver::interface::DriverManager;
      use memory::mmu::interface::MMU;
 
@@ -973,7 +973,7 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/main.rs 12_exceptions_part1_
      if let Err(string) = memory::mmu::mmu().init() {
          panic!("MMU: {}", string);
      }
-@@ -195,13 +198,28 @@
+@@ -194,13 +197,28 @@
      info!("Timer test, spinning for 1 second");
      time::time_manager().spin_for(Duration::from_secs(1));
 
diff --git a/12_exceptions_part1_groundwork/src/main.rs b/12_exceptions_part1_groundwork/src/main.rs
index 4d8f5d7c3..495840e87 100644
--- a/12_exceptions_part1_groundwork/src/main.rs
+++ b/12_exceptions_part1_groundwork/src/main.rs
@@ -110,7 +110,6 @@
 #![feature(const_panic)]
 #![feature(format_args_nl)]
 #![feature(global_asm)]
-#![feature(naked_functions)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
 #![no_main]
diff --git a/13_integrated_testing/README.md b/13_integrated_testing/README.md
index 5f8baf23a..a282e6593 100644
--- a/13_integrated_testing/README.md
+++ b/13_integrated_testing/README.md
@@ -1130,7 +1130,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/exception.rs 13_integrated_testing/
 diff -uNr 12_exceptions_part1_groundwork/src/lib.rs 13_integrated_testing/src/lib.rs
 --- 12_exceptions_part1_groundwork/src/lib.rs
 +++ 13_integrated_testing/src/lib.rs
-@@ -0,0 +1,170 @@
+@@ -0,0 +1,169 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -1246,7 +1246,6 @@ diff -uNr 12_exceptions_part1_groundwork/src/lib.rs 13_integrated_testing/src/li
 +#![feature(format_args_nl)]
 +#![feature(global_asm)]
 +#![feature(linkage)]
-+#![feature(naked_functions)]
 +#![feature(panic_info_message)]
 +#![feature(trait_alias)]
 +#![no_std]
@@ -1305,7 +1304,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/lib.rs 13_integrated_testing/src/li
 diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/main.rs
 --- 12_exceptions_part1_groundwork/src/main.rs
 +++ 13_integrated_testing/src/main.rs
-@@ -6,130 +6,12 @@
+@@ -6,129 +6,12 @@
  #![doc(html_logo_url = "https://git.io/JeGIp")]
 
  //! The `kernel` binary.
@@ -1414,7 +1413,6 @@ diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/m
 +
  #![feature(format_args_nl)]
 -#![feature(global_asm)]
--#![feature(naked_functions)]
 -#![feature(panic_info_message)]
 -#![feature(trait_alias)]
  #![no_main]
@@ -1438,7 +1436,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/m
 
  /// Early init code.
  ///
-@@ -141,6 +23,7 @@
+@@ -140,6 +23,7 @@
  ///       - Without it, any atomic operations, e.g. the yet-to-be-introduced spinlocks in the device
  ///         drivers (which currently employ NullLocks instead of spinlocks), will fail to work on
  ///         the RPi SoCs.
@@ -1446,7 +1444,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/m
  unsafe fn kernel_init() -> ! {
      use driver::interface::DriverManager;
      use memory::mmu::interface::MMU;
-@@ -166,9 +49,7 @@
+@@ -165,9 +49,7 @@
  /// The main function running after the early init.
  fn kernel_main() -> ! {
      use console::interface::All;
@@ -1456,7 +1454,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/m
 
      info!("Booting on: {}", bsp::board_name());
 
-@@ -195,31 +76,6 @@
+@@ -194,31 +76,6 @@
          info!("      {}. {}", i + 1, driver.compatible());
      }
 
diff --git a/13_integrated_testing/src/lib.rs b/13_integrated_testing/src/lib.rs
index 8e60240f2..f958ae5d5 100644
--- a/13_integrated_testing/src/lib.rs
+++ b/13_integrated_testing/src/lib.rs
@@ -113,7 +113,6 @@
 #![feature(format_args_nl)]
 #![feature(global_asm)]
 #![feature(linkage)]
-#![feature(naked_functions)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
 #![no_std]
diff --git a/14_exceptions_part2_peripheral_IRQs/README.md b/14_exceptions_part2_peripheral_IRQs/README.md
index d9baef354..dc18b75f4 100644
--- a/14_exceptions_part2_peripheral_IRQs/README.md
+++ b/14_exceptions_part2_peripheral_IRQs/README.md
@@ -2407,7 +2407,7 @@ diff -uNr 13_integrated_testing/src/lib.rs 14_exceptions_part2_peripheral_IRQs/s
  #![feature(format_args_nl)]
  #![feature(global_asm)]
  #![feature(linkage)]
-@@ -137,6 +144,7 @@
+@@ -136,6 +143,7 @@
  pub mod exception;
  pub mod memory;
  pub mod print;
diff --git a/14_exceptions_part2_peripheral_IRQs/src/lib.rs b/14_exceptions_part2_peripheral_IRQs/src/lib.rs
index 141adc3ab..635732bd8 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/lib.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/lib.rs
@@ -120,7 +120,6 @@
 #![feature(format_args_nl)]
 #![feature(global_asm)]
 #![feature(linkage)]
-#![feature(naked_functions)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
 #![no_std]
diff --git a/15_virtual_mem_part2_mmio_remap/README.md b/15_virtual_mem_part2_mmio_remap/README.md
index 77f6ad626..fb574abf4 100644
--- a/15_virtual_mem_part2_mmio_remap/README.md
+++ b/15_virtual_mem_part2_mmio_remap/README.md
@@ -2038,7 +2038,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/lib.rs 15_virtual_mem_part2_mm
  #![feature(const_fn_fn_ptr_basics)]
  #![feature(const_generics)]
  #![feature(const_panic)]
-@@ -138,6 +139,7 @@
+@@ -137,6 +138,7 @@
  mod synchronization;
 
  pub mod bsp;
diff --git a/15_virtual_mem_part2_mmio_remap/src/lib.rs b/15_virtual_mem_part2_mmio_remap/src/lib.rs
index 9ff2a50c7..e66dd3e86 100644
--- a/15_virtual_mem_part2_mmio_remap/src/lib.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/lib.rs
@@ -121,7 +121,6 @@
 #![feature(format_args_nl)]
 #![feature(global_asm)]
 #![feature(linkage)]
-#![feature(naked_functions)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
 #![no_std]
diff --git a/X1_JTAG_boot/jtag_boot_rpi3.img b/X1_JTAG_boot/jtag_boot_rpi3.img
index e2653eb1b0788a031a8c78cf2eee9dee4b4b351f..443facda4297a662552100554a1bd6de4427e137 100755
GIT binary patch
delta 1309
zcmb7DUu;uV82`?_z2#oZx^`XHwH>|fhADTL;5Hd-plwGCFdiVqL}KFTm~lKUW-t0;
z+My4!7k2oNX?#(M8CRW*RLw5DtS>(Bq@tMk)J?^<CSc@&RkB^b)83G%iNTYc-1Gha
z{eJhHLTWCx<da&@DR6-SER}x(o`CM6E{(93m2SQwpS-0)x^4na$q~t9I4d7y<M^$-
zkIfXluH(!-KEw^ygOkb_`M*+9>>Iq{j^TFqN32x5;f^Y7wRqcOOY8%@?VVsV=yhGh
za_iUZSG?*=OYtP$^G&f;JmpVP%B+7UrF`kvCFsT<{A0|*!M2HDDbDX)k<IEZsA~Xo
zM_yli&$ou3wduWyo&3{{mv6R^_pL=WI=V4^b8*$+L}sow3DztWvVSaWF^Lr3Z|iT#
z4e^O`A0Jl=**9}I7!WhZ0#PlU<O#Wu9a+IMfr<RJgLO?wTZe<~1DXQXX|naV!OGb7
zyf|y{PF8yttfw7Y#B{PZkCrYA#hR+YoPerkp5X@V6jOiG7(55$lW0SFKOc9|#PWXr
z;{$s>4)O0qzR1Ow+6}4uNj%p+(o4*1GVt;iw<$O!3In`+0C*+oG7k~AT2e6^Wo!T+
zv`>?cQ^5gJ@WWuLV`euWC26WrsE>Z(jaI2mLxy1gvk&Pe`6*|(04CFR(T2at)X&#s
z#v_|ekRp$<LKfC>sv{Q4x#4ppAOb|-=Y{D?4{*buz)Ky&d2*}d%AW@-e-W&YsmkLm
zWCahMfkj}r9t2BVIxV9w8@WREu^D~2_6BfINna+pEYVi*G}t~~TaZnI&K28bRt^BK
z?t!{}NihYw7dGtqvI4tL#^vvA+YSjxcp|htpCi~R{jbvm;6-tEpUIjOd?a8r<iCLJ
z5Wo^cyyhVwdBv>uxJ;D*tMn!+dA9)8%by@*xj*fv{-tkxxOolVA8zQofQinK_V}h9
z0(x)(%yjD1tGSA~&b`ckBKFYHaEH+h?~&99u7wBtE=QX|`h|_<ags^w#`<URFL*ej
zXZ~;1C(aa~)Af4Mj2va*R~)E2x|$$fbL?a2?|PLj;n}WapS-OZ>u^fLj!loDvDTeh
zk7J+3)vjGbszc*ZX>E1#`|)bz3a)QUOH9Y%*qHIV6Yx9j#Wzj6?D$(9|6MG_CfPAG
H^ymKq)e~>A

delta 1314
zcmb7DO>7%Q6n?Yob$7Ai*h!opJ9zE3!g4AR#i3~(3SOszw&768AfXD$O&UaUicl_y
z1M;?TK#>p`9yG0bNm`+>fzW~hWpD9?Lr;aaAaSWvpmIWll=eVPNR~J21@SAvNKZ5G
z&3p5{@0*#KoSC~4lA7O8;B5wQrTQ)K<Vv!vOGB*5+|5_ylV7P|)GdaSa#TtKPRmDF
z62FumW%+W@_cZe-vpikdjpIs@;-4!y#__5@j(h#@veV_O{+Pn%%Xb2f#76N>aE#?K
z=sSzm=4<SG{3v8d)rat2Xp+t2sc?!?ro;Ov<+HFZtt9d5aFM-?11)2b`2_#*vTUvO
zLR|xxdFqv=3!#hnVT<0g+QUECe&Ko(MPFZ1W5e51*O%tgoXE_qkApo8X5sF_E{jOv
zPc50IM3#@u_3=@~EWDP$fmYG8*c#Iy#gnpG7&7rp>saaIBXvzN>|>F(eoX;;f_(iQ
zu=9>HE7lsED`@Aze$4a5o=*PG@ydHbv4(0eBcQ76ah@j2G4%(H!81THi45QnAN5hk
zxkLP$EoU|Xi5ntc<l^&fY3X(^zS%a^L(JD@;MHAzOK?gW{k(b@crE3#juN-^lw!GM
zl?-mRO_7e1k$zI}VkFm|-_M6hnzb0zhd&L**60{lhDhd#-|43KDX+NzCX@Nd;7>AT
z_-&c-=uQKq$Yabbz%ov@$2$x^e1Zf-fN1@0VXC$VczQE|m)ZwQl%-Or^cL8qvtaj7
zS|Df^HeLm;Gq438Jpwj?;#yu`PLG&{2TtqD;t>Wa`ZCF73y$LG^#f2(R|a{_@maOQ
zz&93T%ekaj0@-uh&g_Z;`%fn1n~vjj2sn--Svb;>D2)<qmF{bT02IaAf2Lsl3osWD
zHFW|06EJH08!(kXsjCP1MgZzgNwI4Ce3l!d|4=LWU0@GyJ5SD<KRb{7P1|a=@dQT(
zU2QF5ARd6a*ARt^RasqJm9@pxj?)43{UUg*Q!l^Rd60#V#;MC6hK6?60qK4h-t8Lb
zI~Qwg(mlFk>%oRk#N6@M;+uFPs^|Z2)djCh$UF7@vK>9nx<>Ryv(E0uJmL8UCc9r^
zb9lZx)pyU^Yxhbu4<P*rchtQ7fag!+W_NG)zL)i1Y5n5mXRs2zjB4DFHsd%PFQ%)W
bcwz5&F&kvpym+%0zlC4K$C-gy{n=ju+U<T(

diff --git a/X1_JTAG_boot/jtag_boot_rpi4.img b/X1_JTAG_boot/jtag_boot_rpi4.img
index 7517a699601e9f8a33042bf149d397324b7e364e..253652d1d962970ed45ec347f2bfc399f81cf240 100755
GIT binary patch
delta 275
zcmbPWI>B^<1{33<&6-RhjJymDL7b`#J2@B}ey(KP+{LWM%cwAUqres>L6Obrf|5*p
z2Ur=lykKUS$jQJkLG$C}K4EKbpdNWfhMn@F3_Cd;<#()P1e(z(zk`zxNFS8np_u@r
zf$}es8796kXZXnh)XCAPI?)rT?}a+^%K!B&D_<xxOw<JOCku#(uqyrgKiy%nricS8
zP-G?J<UA2EMUWvLK*Ky?2C+j8TBr=x_+s)x5oOk&fB#Qsn0!)1S+)ddh601a6$YS3
zp8oqU{)m}z6$gvM$_LCGt3FQV6t&+RAUc7Ov2*i7v35pI5mBI{fIww)p@cjW07H3N
AxBvhE

delta 304
zcmbPWI>B^<1{33f&6-RhjJ%8uL7b`#J2@B}erhso?qXKsWt5w|QD6(xN8!!sf|5*p
z3s@PpykKUS$jQJkLG$9|K4I$wpdNWfhMn@F3_Cd;<#%W@0L^HW-@(P#5X5y*euq{9
zkOs=XNM@MG1=Qu$s5<e5Im1s6pt@Je%q#!bv#flf%rNnVI_pYCpuA#(=)?z$87DqE
z%rH^;-~Z_flXXQLEP$4P42}mH6c4n>185Nk&;n1OMIJy)G=P?PAX~CfdEyIphM%t{
zuM|;c{rwkY%taAp*)ouU3<_5mfF6AQ@4xsXX2w+<EDkFlFmtT>JXuiGo`nGjHv5Q9
aVPx#u{7|f&k&{Q110=>Ev$;@0o(TXLG-Ztd

diff --git a/X1_JTAG_boot/src/main.rs b/X1_JTAG_boot/src/main.rs
index 5e54c329c..340acd4eb 100644
--- a/X1_JTAG_boot/src/main.rs
+++ b/X1_JTAG_boot/src/main.rs
@@ -104,7 +104,6 @@
 
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
-#![feature(naked_functions)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
 #![no_main]

From ff382c3fafa6257e37c208015cbea3aa3d1b2515 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sat, 2 Jan 2021 16:04:27 +0100
Subject: [PATCH 019/214] Remove comment

---
 04_zero_overhead_abstraction/README.md                | 5 ++---
 04_zero_overhead_abstraction/src/_arch/aarch64/cpu.rs | 1 -
 05_safe_globals/src/_arch/aarch64/cpu.rs              | 1 -
 06_drivers_gpio_uart/README.md                        | 2 +-
 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs         | 1 -
 07_uart_chainloader/README.md                         | 5 ++---
 07_uart_chainloader/src/_arch/aarch64/cpu.rs          | 1 -
 08_timestamps/README.md                               | 7 +++----
 08_timestamps/src/_arch/aarch64/cpu.rs                | 1 -
 09_hw_debug_JTAG/src/_arch/aarch64/cpu.rs             | 1 -
 10_privilege_level/README.md                          | 4 ++--
 11 files changed, 10 insertions(+), 19 deletions(-)

diff --git a/04_zero_overhead_abstraction/README.md b/04_zero_overhead_abstraction/README.md
index 1e8d4c6d9..ce452fb79 100644
--- a/04_zero_overhead_abstraction/README.md
+++ b/04_zero_overhead_abstraction/README.md
@@ -53,7 +53,7 @@ diff -uNr 03_hacky_hello_world/src/_arch/aarch64/cpu/smp.rs 04_zero_overhead_abs
 diff -uNr 03_hacky_hello_world/src/_arch/aarch64/cpu.rs 04_zero_overhead_abstraction/src/_arch/aarch64/cpu.rs
 --- 03_hacky_hello_world/src/_arch/aarch64/cpu.rs
 +++ 04_zero_overhead_abstraction/src/_arch/aarch64/cpu.rs
-@@ -4,8 +4,35 @@
+@@ -4,8 +4,34 @@
 
  //! Architectural processor code.
 
@@ -79,7 +79,6 @@ diff -uNr 03_hacky_hello_world/src/_arch/aarch64/cpu.rs 04_zero_overhead_abstrac
 +pub unsafe fn _start() -> ! {
 +    use crate::runtime_init;
 +
-+    // Expect the boot core to start in EL2.
 +    if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
 +        SP.set(bsp::memory::boot_core_stack_end() as u64);
 +        runtime_init::runtime_init()
@@ -91,7 +90,7 @@ diff -uNr 03_hacky_hello_world/src/_arch/aarch64/cpu.rs 04_zero_overhead_abstrac
 
  //--------------------------------------------------------------------------------------------------
  // Public Code
-@@ -14,13 +41,7 @@
+@@ -14,13 +40,7 @@
  /// Pause execution on the core.
  #[inline(always)]
  pub fn wait_forever() -> ! {
diff --git a/04_zero_overhead_abstraction/src/_arch/aarch64/cpu.rs b/04_zero_overhead_abstraction/src/_arch/aarch64/cpu.rs
index 61a68a18e..b02903c90 100644
--- a/04_zero_overhead_abstraction/src/_arch/aarch64/cpu.rs
+++ b/04_zero_overhead_abstraction/src/_arch/aarch64/cpu.rs
@@ -24,7 +24,6 @@ use cortex_a::{asm, regs::*};
 pub unsafe fn _start() -> ! {
     use crate::runtime_init;
 
-    // Expect the boot core to start in EL2.
     if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
         SP.set(bsp::memory::boot_core_stack_end() as u64);
         runtime_init::runtime_init()
diff --git a/05_safe_globals/src/_arch/aarch64/cpu.rs b/05_safe_globals/src/_arch/aarch64/cpu.rs
index 61a68a18e..b02903c90 100644
--- a/05_safe_globals/src/_arch/aarch64/cpu.rs
+++ b/05_safe_globals/src/_arch/aarch64/cpu.rs
@@ -24,7 +24,6 @@ use cortex_a::{asm, regs::*};
 pub unsafe fn _start() -> ! {
     use crate::runtime_init;
 
-    // Expect the boot core to start in EL2.
     if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
         SP.set(bsp::memory::boot_core_stack_end() as u64);
         runtime_init::runtime_init()
diff --git a/06_drivers_gpio_uart/README.md b/06_drivers_gpio_uart/README.md
index 4c030e744..7e3da3ba5 100644
--- a/06_drivers_gpio_uart/README.md
+++ b/06_drivers_gpio_uart/README.md
@@ -185,7 +185,7 @@ diff -uNr 05_safe_globals/Makefile 06_drivers_gpio_uart/Makefile
 diff -uNr 05_safe_globals/src/_arch/aarch64/cpu.rs 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
 --- 05_safe_globals/src/_arch/aarch64/cpu.rs
 +++ 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
-@@ -38,6 +38,17 @@
+@@ -37,6 +37,17 @@
  // Public Code
  //--------------------------------------------------------------------------------------------------
 
diff --git a/06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs b/06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
index 0f545a008..dfc6be130 100644
--- a/06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
+++ b/06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
@@ -24,7 +24,6 @@ use cortex_a::{asm, regs::*};
 pub unsafe fn _start() -> ! {
     use crate::runtime_init;
 
-    // Expect the boot core to start in EL2.
     if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
         SP.set(bsp::memory::boot_core_stack_end() as u64);
         runtime_init::runtime_init()
diff --git a/07_uart_chainloader/README.md b/07_uart_chainloader/README.md
index b87b4bed0..ef90e02ee 100644
--- a/07_uart_chainloader/README.md
+++ b/07_uart_chainloader/README.md
@@ -183,14 +183,13 @@ diff -uNr 06_drivers_gpio_uart/Makefile 07_uart_chainloader/Makefile
 diff -uNr 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs 07_uart_chainloader/src/_arch/aarch64/cpu.rs
 --- 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
 +++ 07_uart_chainloader/src/_arch/aarch64/cpu.rs
-@@ -22,12 +22,12 @@
+@@ -22,11 +22,11 @@
  ///   actually set (`SP.set()`).
  #[no_mangle]
  pub unsafe fn _start() -> ! {
 -    use crate::runtime_init;
 +    use crate::relocate;
 
-     // Expect the boot core to start in EL2.
      if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
          SP.set(bsp::memory::boot_core_stack_end() as u64);
 -        runtime_init::runtime_init()
@@ -198,7 +197,7 @@ diff -uNr 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs 07_uart_chainloader/src/
      } else {
          // If not core0, infinitely wait for events.
          wait_forever()
-@@ -56,3 +56,19 @@
+@@ -55,3 +55,19 @@
          asm::wfe()
      }
  }
diff --git a/07_uart_chainloader/src/_arch/aarch64/cpu.rs b/07_uart_chainloader/src/_arch/aarch64/cpu.rs
index ccafe9ff6..1895b6f16 100644
--- a/07_uart_chainloader/src/_arch/aarch64/cpu.rs
+++ b/07_uart_chainloader/src/_arch/aarch64/cpu.rs
@@ -24,7 +24,6 @@ use cortex_a::{asm, regs::*};
 pub unsafe fn _start() -> ! {
     use crate::relocate;
 
-    // Expect the boot core to start in EL2.
     if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
         SP.set(bsp::memory::boot_core_stack_end() as u64);
         relocate::relocate_self()
diff --git a/08_timestamps/README.md b/08_timestamps/README.md
index 0bd342521..45a5c270e 100644
--- a/08_timestamps/README.md
+++ b/08_timestamps/README.md
@@ -115,14 +115,13 @@ diff -uNr 07_uart_chainloader/Makefile 08_timestamps/Makefile
 diff -uNr 07_uart_chainloader/src/_arch/aarch64/cpu.rs 08_timestamps/src/_arch/aarch64/cpu.rs
 --- 07_uart_chainloader/src/_arch/aarch64/cpu.rs
 +++ 08_timestamps/src/_arch/aarch64/cpu.rs
-@@ -22,12 +22,12 @@
+@@ -22,11 +22,11 @@
  ///   actually set (`SP.set()`).
  #[no_mangle]
  pub unsafe fn _start() -> ! {
 -    use crate::relocate;
 +    use crate::runtime_init;
 
-     // Expect the boot core to start in EL2.
      if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
          SP.set(bsp::memory::boot_core_stack_end() as u64);
 -        relocate::relocate_self()
@@ -130,7 +129,7 @@ diff -uNr 07_uart_chainloader/src/_arch/aarch64/cpu.rs 08_timestamps/src/_arch/a
      } else {
          // If not core0, infinitely wait for events.
          wait_forever()
-@@ -40,15 +40,6 @@
+@@ -39,15 +39,6 @@
 
  pub use asm::nop;
 
@@ -146,7 +145,7 @@ diff -uNr 07_uart_chainloader/src/_arch/aarch64/cpu.rs 08_timestamps/src/_arch/a
  /// Pause execution on the core.
  #[inline(always)]
  pub fn wait_forever() -> ! {
-@@ -56,19 +47,3 @@
+@@ -55,19 +46,3 @@
          asm::wfe()
      }
  }
diff --git a/08_timestamps/src/_arch/aarch64/cpu.rs b/08_timestamps/src/_arch/aarch64/cpu.rs
index 6072751db..a65a06827 100644
--- a/08_timestamps/src/_arch/aarch64/cpu.rs
+++ b/08_timestamps/src/_arch/aarch64/cpu.rs
@@ -24,7 +24,6 @@ use cortex_a::{asm, regs::*};
 pub unsafe fn _start() -> ! {
     use crate::runtime_init;
 
-    // Expect the boot core to start in EL2.
     if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
         SP.set(bsp::memory::boot_core_stack_end() as u64);
         runtime_init::runtime_init()
diff --git a/09_hw_debug_JTAG/src/_arch/aarch64/cpu.rs b/09_hw_debug_JTAG/src/_arch/aarch64/cpu.rs
index 6072751db..a65a06827 100644
--- a/09_hw_debug_JTAG/src/_arch/aarch64/cpu.rs
+++ b/09_hw_debug_JTAG/src/_arch/aarch64/cpu.rs
@@ -24,7 +24,6 @@ use cortex_a::{asm, regs::*};
 pub unsafe fn _start() -> ! {
     use crate::runtime_init;
 
-    // Expect the boot core to start in EL2.
     if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
         SP.set(bsp::memory::boot_core_stack_end() as u64);
         runtime_init::runtime_init()
diff --git a/10_privilege_level/README.md b/10_privilege_level/README.md
index 8716099e8..3ffa1bbe4 100644
--- a/10_privilege_level/README.md
+++ b/10_privilege_level/README.md
@@ -226,7 +226,7 @@ Minipush 1.0
 diff -uNr 09_hw_debug_JTAG/src/_arch/aarch64/cpu.rs 10_privilege_level/src/_arch/aarch64/cpu.rs
 --- 09_hw_debug_JTAG/src/_arch/aarch64/cpu.rs
 +++ 10_privilege_level/src/_arch/aarch64/cpu.rs
-@@ -18,22 +18,65 @@
+@@ -18,21 +18,65 @@
  /// # Safety
  ///
  /// - Linker script must ensure to place this function where it is expected by the target machine.
@@ -238,10 +238,10 @@ diff -uNr 09_hw_debug_JTAG/src/_arch/aarch64/cpu.rs 10_privilege_level/src/_arch
  pub unsafe fn _start() -> ! {
 -    use crate::runtime_init;
 -
-     // Expect the boot core to start in EL2.
 -    if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
 -        SP.set(bsp::memory::boot_core_stack_end() as u64);
 -        runtime_init::runtime_init()
++    // Expect the boot core to start in EL2.
 +    if (bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id())
 +        && (CurrentEL.get() == CurrentEL::EL::EL2.value)
 +    {

From c35a30cd0bce2725c3a2586309b7edd3875fb117 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 4 Jan 2021 14:37:17 +0100
Subject: [PATCH 020/214] Bump UART to 921_600 baud + other bugfixes

Fixes #95
Fixes #98

Co-authored-by: Takumasa Sakao <sakataku7@gmail.com>
---
 06_drivers_gpio_uart/README.md                | 158 +++++++++++++-----
 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs |   1 -
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   | 130 ++++++++++----
 06_drivers_gpio_uart/src/console.rs           |   7 +
 06_drivers_gpio_uart/src/main.rs              |   3 +
 07_uart_chainloader/README.md                 | 158 ++++++++----------
 07_uart_chainloader/demo_payload_rpi3.img     | Bin 6720 -> 6856 bytes
 07_uart_chainloader/demo_payload_rpi4.img     | Bin 6600 -> 6728 bytes
 07_uart_chainloader/src/_arch/aarch64/cpu.rs  |   1 -
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |   2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   | 126 ++++++++++----
 07_uart_chainloader/src/console.rs            |   6 +-
 07_uart_chainloader/src/main.rs               |   5 +-
 08_timestamps/README.md                       |  91 +++++++---
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   | 135 ++++++++++-----
 08_timestamps/src/console.rs                  |   6 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   | 135 ++++++++++-----
 09_hw_debug_JTAG/src/console.rs               |   6 +-
 10_privilege_level/README.md                  |  10 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   | 135 ++++++++++-----
 10_privilege_level/src/console.rs             |   6 +-
 10_privilege_level/src/main.rs                |   4 +
 .../README.md                                 |   8 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   | 135 ++++++++++-----
 .../src/console.rs                            |   6 +-
 .../src/main.rs                               |   4 +
 12_exceptions_part1_groundwork/README.md      |   6 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   | 135 ++++++++++-----
 12_exceptions_part1_groundwork/src/console.rs |   6 +-
 12_exceptions_part1_groundwork/src/main.rs    |   4 +
 13_integrated_testing/README.md               |  10 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   | 135 ++++++++++-----
 13_integrated_testing/src/console.rs          |   6 +-
 13_integrated_testing/src/main.rs             |   4 +
 14_exceptions_part2_peripheral_IRQs/README.md | 118 +++----------
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  85 +++++++---
 .../src/console.rs                            |   6 +-
 15_virtual_mem_part2_mmio_remap/README.md     |  20 +--
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  85 +++++++---
 .../src/console.rs                            |   6 +-
 X1_JTAG_boot/jtag_boot_rpi3.img               | Bin 8080 -> 8240 bytes
 X1_JTAG_boot/jtag_boot_rpi4.img               | Bin 6800 -> 7968 bytes
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   | 135 ++++++++++-----
 X1_JTAG_boot/src/console.rs                   |   6 +-
 utils/minipush.rb                             |  21 ++-
 utils/miniterm.rb                             |   4 +-
 46 files changed, 1356 insertions(+), 714 deletions(-)

diff --git a/06_drivers_gpio_uart/README.md b/06_drivers_gpio_uart/README.md
index 7e3da3ba5..6ca14cfe0 100644
--- a/06_drivers_gpio_uart/README.md
+++ b/06_drivers_gpio_uart/README.md
@@ -185,14 +185,13 @@ diff -uNr 05_safe_globals/Makefile 06_drivers_gpio_uart/Makefile
 diff -uNr 05_safe_globals/src/_arch/aarch64/cpu.rs 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
 --- 05_safe_globals/src/_arch/aarch64/cpu.rs
 +++ 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
-@@ -37,6 +37,17 @@
+@@ -37,6 +37,16 @@
  // Public Code
  //--------------------------------------------------------------------------------------------------
 
 +pub use asm::nop;
 +
 +/// Spin for `n` cycles.
-+#[cfg(feature = "bsp_rpi3")]
 +#[inline(always)]
 +pub fn spin_for_cycles(n: usize) {
 +    for _ in 0..n {
@@ -433,7 +432,7 @@ diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 06_drivers_g
 diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 --- 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 +++ 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
-@@ -0,0 +1,307 @@
+@@ -0,0 +1,381 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -572,6 +571,12 @@ diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 06_dri
 +/// Abstraction for the associated MMIO registers.
 +type Registers = MMIODerefWrapper<RegisterBlock>;
 +
++#[derive(PartialEq)]
++enum BlockingMode {
++    Blocking,
++    NonBlocking,
++}
++
 +//--------------------------------------------------------------------------------------------------
 +// Public Definitions
 +//--------------------------------------------------------------------------------------------------
@@ -610,24 +615,41 @@ diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 06_dri
 +
 +    /// Set up baud rate and characteristics.
 +    ///
-+    /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
++    /// This results in 8N1 and 921_600 baud.
 +    ///
-+    /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
-+    /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
++    /// The calculation for the BRD is (we set the clock to 48 MHz in config.txt):
++    /// `(48_000_000 / 16) / 921_600 = 3.2552083`. `3` goes to the `IBRD` (integer field).
 +    ///
-+    /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
-+    /// give the best approximation we can get. A 5 modulo error margin is acceptable for UART and we're
-+    /// now at 0.01 modulo.
++    /// The `FBRD` (fractional field) is only 6 bits so `0.2552083 * 64 = 16.3 rounded to 16` will
++    /// give the best approximation we can get. A 5modulo error margin is acceptable for UART and we're
++    /// now at 0.02modulo.
 +    pub fn init(&mut self) {
-+        // Turn it off temporarily.
++        // Execution can arrive here while there are still characters queued in the TX FIFO and
++        // actively being sent out by the UART hardware. If the UART is turned off in this case,
++        // those queued characters would be lost.
++        //
++        // For example, this can happen during runtime on a call to panic!(), because panic!()
++        // initializes its own UART instance and calls init().
++        //
++        // Hence, flush first to ensure all pending characters are transmitted.
++        self.flush();
++
++        // Turn the UART off temporarily.
 +        self.registers.CR.set(0);
 +
++        // Clear all pending interrupts.
 +        self.registers.ICR.write(ICR::ALL::CLEAR);
-+        self.registers.IBRD.write(IBRD::IBRD.val(5));
-+        self.registers.FBRD.write(FBRD::FBRD.val(13));
++
++        // Set the baud rate.
++        self.registers.IBRD.write(IBRD::IBRD.val(3));
++        self.registers.FBRD.write(FBRD::FBRD.val(16));
++
++        // Set 8N1 + FIFO on.
 +        self.registers
 +            .LCRH
-+            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
++            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled);
++
++        // Turn the UART on.
 +        self.registers
 +            .CR
 +            .write(CR::UARTEN::Enabled + CR::TXE::Enabled + CR::RXE::Enabled);
@@ -645,6 +667,58 @@ diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 06_dri
 +
 +        self.chars_written += 1;
 +    }
++
++    /// Block execution until the last buffered character has been physically put on the TX wire.
++    fn flush(&self) {
++        // The bit time for 921_600 baud is 1 / 921_600 = 1.09 µs. 8N1 has a total of 10 bits per
++        // symbol (start bit, 8 data bits, stop bit), so one symbol takes round about 10 * 1.09 =
++        // 10.9 µs, or 10_900 ns. Round it up to 12_000 ns to be on the safe side.
++        //
++        // Now make an educated guess for a good delay value. According to Wikipedia, the fastest
++        // RPi4 clocks around 1.5 GHz.
++        //
++        // So lets try to be on the safe side and default to 24_000 cycles, which would equal 12_000
++        // ns would the CPU be clocked at 2 GHz.
++        const CHAR_TIME_SAFE: usize = 24_000;
++
++        // Spin until TX FIFO empty is set.
++        while !self.registers.FR.matches_all(FR::TXFE::SET) {
++            cpu::nop();
++        }
++
++        // After the last character has been queued for transmission, wait for the time of one
++        // character + some extra time for safety.
++        cpu::spin_for_cycles(CHAR_TIME_SAFE);
++    }
++
++    /// Retrieve a character.
++    fn read_char_converting(&mut self, blocking_mode: BlockingMode) -> Option<char> {
++        // If RX FIFO is empty,
++        if self.registers.FR.matches_all(FR::RXFE::SET) {
++            // immediately return in non-blocking mode.
++            if blocking_mode == BlockingMode::NonBlocking {
++                return None;
++            }
++
++            // Otherwise, wait until a char was received.
++            while self.registers.FR.matches_all(FR::RXFE::SET) {
++                cpu::nop();
++            }
++        }
++
++        // Read one character.
++        let mut ret = self.registers.DR.get() as u8 as char;
++
++        // Convert carrige return to newline.
++        if ret == '\r' {
++            ret = '\n'
++        }
++
++        // Update statistics.
++        self.chars_read += 1;
++
++        Some(ret)
++    }
 +}
 +
 +/// Implementing `core::fmt::Write` enables usage of the `format_args!` macros, which in turn are
@@ -667,6 +741,8 @@ diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 06_dri
 +}
 +
 +impl PL011Uart {
++    /// Create an instance.
++    ///
 +    /// # Safety
 +    ///
 +    /// - The user must ensure to provide a correct MMIO start address.
@@ -706,29 +782,26 @@ diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 06_dri
 +        // readability.
 +        self.inner.lock(|inner| fmt::Write::write_fmt(inner, args))
 +    }
++
++    fn flush(&self) {
++        // Spin until TX FIFO empty is set.
++        self.inner.lock(|inner| inner.flush());
++    }
 +}
 +
 +impl console::interface::Read for PL011Uart {
 +    fn read_char(&self) -> char {
-+        self.inner.lock(|inner| {
-+            // Spin while RX FIFO empty is set.
-+            while inner.registers.FR.matches_all(FR::RXFE::SET) {
-+                cpu::nop();
-+            }
-+
-+            // Read one character.
-+            let mut ret = inner.registers.DR.get() as u8 as char;
-+
-+            // Convert carrige return to newline.
-+            if ret == '\r' {
-+                ret = '\n'
-+            }
-+
-+            // Update statistics.
-+            inner.chars_read += 1;
++        self.inner
++            .lock(|inner| inner.read_char_converting(BlockingMode::Blocking).unwrap())
++    }
 +
-+            ret
-+        })
++    fn clear_rx(&self) {
++        // Read from the RX FIFO until it is indicating empty.
++        while self
++            .inner
++            .lock(|inner| inner.read_char_converting(BlockingMode::NonBlocking))
++            .is_some()
++        {}
 +    }
 +}
 +
@@ -1096,7 +1169,7 @@ diff -uNr 05_safe_globals/src/bsp.rs 06_drivers_gpio_uart/src/bsp.rs
 diff -uNr 05_safe_globals/src/console.rs 06_drivers_gpio_uart/src/console.rs
 --- 05_safe_globals/src/console.rs
 +++ 06_drivers_gpio_uart/src/console.rs
-@@ -14,18 +14,34 @@
+@@ -14,8 +14,26 @@
 
      /// Console write functions.
      pub trait Write {
@@ -1105,19 +1178,25 @@ diff -uNr 05_safe_globals/src/console.rs 06_drivers_gpio_uart/src/console.rs
 +
          /// Write a Rust format string.
          fn write_fmt(&self, args: fmt::Arguments) -> fmt::Result;
-     }
-
++
++        /// Block execution until the last buffered character has been physically put on the TX
++        /// wire.
++        fn flush(&self);
++    }
++
 +    /// Console read functions.
 +    pub trait Read {
 +        /// Read a single character.
 +        fn read_char(&self) -> char {
 +            ' '
 +        }
-+    }
 +
++        /// Clear RX buffers, if any.
++        fn clear_rx(&self);
+     }
+
      /// Console statistics.
-     pub trait Statistics {
-         /// Return the number of characters written.
+@@ -24,8 +42,13 @@
          fn chars_written(&self) -> usize {
              0
          }
@@ -1216,7 +1295,7 @@ diff -uNr 05_safe_globals/src/main.rs 06_drivers_gpio_uart/src/main.rs
  mod memory;
  mod panic_wait;
  mod print;
-@@ -115,16 +125,46 @@
+@@ -115,16 +125,49 @@
  /// # Safety
  ///
  /// - Only a single core must be active and running this function.
@@ -1240,6 +1319,7 @@ diff -uNr 05_safe_globals/src/main.rs 06_drivers_gpio_uart/src/main.rs
 -    println!("[0] Hello from pure Rust!");
 +/// The main function running after the early init.
 +fn kernel_main() -> ! {
++    use bsp::console::console;
 +    use console::interface::All;
 +    use driver::interface::DriverManager;
 +
@@ -1263,6 +1343,8 @@ diff -uNr 05_safe_globals/src/main.rs 06_drivers_gpio_uart/src/main.rs
 
 -    println!("[2] Stopping here.");
 -    cpu::wait_forever()
++    // Discard any spurious received characters before going into echo mode.
++    console().clear_rx();
 +    loop {
 +        let c = bsp::console::console().read_char();
 +        bsp::console::console().write_char(c);
diff --git a/06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs b/06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
index dfc6be130..2d5d0b04a 100644
--- a/06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
+++ b/06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
@@ -40,7 +40,6 @@ pub unsafe fn _start() -> ! {
 pub use asm::nop;
 
 /// Spin for `n` cycles.
-#[cfg(feature = "bsp_rpi3")]
 #[inline(always)]
 pub fn spin_for_cycles(n: usize) {
     for _ in 0..n {
diff --git a/06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index fdd92f65e..39834723b 100644
--- a/06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -136,6 +136,12 @@ register_structs! {
 /// Abstraction for the associated MMIO registers.
 type Registers = MMIODerefWrapper<RegisterBlock>;
 
+#[derive(PartialEq)]
+enum BlockingMode {
+    Blocking,
+    NonBlocking,
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -174,24 +180,41 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
+    /// This results in 8N1 and 921_600 baud.
     ///
-    /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
-    /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
+    /// The calculation for the BRD is (we set the clock to 48 MHz in config.txt):
+    /// `(48_000_000 / 16) / 921_600 = 3.2552083`. `3` goes to the `IBRD` (integer field).
     ///
-    /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
-    /// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
-    /// now at 0.01 %.
+    /// The `FBRD` (fractional field) is only 6 bits so `0.2552083 * 64 = 16.3 rounded to 16` will
+    /// give the best approximation we can get. A 5% error margin is acceptable for UART and we're
+    /// now at 0.02%.
     pub fn init(&mut self) {
-        // Turn it off temporarily.
+        // Execution can arrive here while there are still characters queued in the TX FIFO and
+        // actively being sent out by the UART hardware. If the UART is turned off in this case,
+        // those queued characters would be lost.
+        //
+        // For example, this can happen during runtime on a call to panic!(), because panic!()
+        // initializes its own UART instance and calls init().
+        //
+        // Hence, flush first to ensure all pending characters are transmitted.
+        self.flush();
+
+        // Turn the UART off temporarily.
         self.registers.CR.set(0);
 
+        // Clear all pending interrupts.
         self.registers.ICR.write(ICR::ALL::CLEAR);
-        self.registers.IBRD.write(IBRD::IBRD.val(5));
-        self.registers.FBRD.write(FBRD::FBRD.val(13));
+
+        // Set the baud rate.
+        self.registers.IBRD.write(IBRD::IBRD.val(3));
+        self.registers.FBRD.write(FBRD::FBRD.val(16));
+
+        // Set 8N1 + FIFO on.
         self.registers
             .LCRH
-            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
+            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled);
+
+        // Turn the UART on.
         self.registers
             .CR
             .write(CR::UARTEN::Enabled + CR::TXE::Enabled + CR::RXE::Enabled);
@@ -209,6 +232,58 @@ impl PL011UartInner {
 
         self.chars_written += 1;
     }
+
+    /// Block execution until the last buffered character has been physically put on the TX wire.
+    fn flush(&self) {
+        // The bit time for 921_600 baud is 1 / 921_600 = 1.09 µs. 8N1 has a total of 10 bits per
+        // symbol (start bit, 8 data bits, stop bit), so one symbol takes round about 10 * 1.09 =
+        // 10.9 µs, or 10_900 ns. Round it up to 12_000 ns to be on the safe side.
+        //
+        // Now make an educated guess for a good delay value. According to Wikipedia, the fastest
+        // RPi4 clocks around 1.5 GHz.
+        //
+        // So lets try to be on the safe side and default to 24_000 cycles, which would equal 12_000
+        // ns would the CPU be clocked at 2 GHz.
+        const CHAR_TIME_SAFE: usize = 24_000;
+
+        // Spin until TX FIFO empty is set.
+        while !self.registers.FR.matches_all(FR::TXFE::SET) {
+            cpu::nop();
+        }
+
+        // After the last character has been queued for transmission, wait for the time of one
+        // character + some extra time for safety.
+        cpu::spin_for_cycles(CHAR_TIME_SAFE);
+    }
+
+    /// Retrieve a character.
+    fn read_char_converting(&mut self, blocking_mode: BlockingMode) -> Option<char> {
+        // If RX FIFO is empty,
+        if self.registers.FR.matches_all(FR::RXFE::SET) {
+            // immediately return in non-blocking mode.
+            if blocking_mode == BlockingMode::NonBlocking {
+                return None;
+            }
+
+            // Otherwise, wait until a char was received.
+            while self.registers.FR.matches_all(FR::RXFE::SET) {
+                cpu::nop();
+            }
+        }
+
+        // Read one character.
+        let mut ret = self.registers.DR.get() as u8 as char;
+
+        // Convert carrige return to newline.
+        if ret == '\r' {
+            ret = '\n'
+        }
+
+        // Update statistics.
+        self.chars_read += 1;
+
+        Some(ret)
+    }
 }
 
 /// Implementing `core::fmt::Write` enables usage of the `format_args!` macros, which in turn are
@@ -231,6 +306,8 @@ impl fmt::Write for PL011UartInner {
 }
 
 impl PL011Uart {
+    /// Create an instance.
+    ///
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
@@ -270,29 +347,26 @@ impl console::interface::Write for PL011Uart {
         // readability.
         self.inner.lock(|inner| fmt::Write::write_fmt(inner, args))
     }
+
+    fn flush(&self) {
+        // Spin until TX FIFO empty is set.
+        self.inner.lock(|inner| inner.flush());
+    }
 }
 
 impl console::interface::Read for PL011Uart {
     fn read_char(&self) -> char {
-        self.inner.lock(|inner| {
-            // Spin while RX FIFO empty is set.
-            while inner.registers.FR.matches_all(FR::RXFE::SET) {
-                cpu::nop();
-            }
-
-            // Read one character.
-            let mut ret = inner.registers.DR.get() as u8 as char;
-
-            // Convert carrige return to newline.
-            if ret == '\r' {
-                ret = '\n'
-            }
-
-            // Update statistics.
-            inner.chars_read += 1;
+        self.inner
+            .lock(|inner| inner.read_char_converting(BlockingMode::Blocking).unwrap())
+    }
 
-            ret
-        })
+    fn clear_rx(&self) {
+        // Read from the RX FIFO until it is indicating empty.
+        while self
+            .inner
+            .lock(|inner| inner.read_char_converting(BlockingMode::NonBlocking))
+            .is_some()
+        {}
     }
 }
 
diff --git a/06_drivers_gpio_uart/src/console.rs b/06_drivers_gpio_uart/src/console.rs
index 0a2385947..3552823cc 100644
--- a/06_drivers_gpio_uart/src/console.rs
+++ b/06_drivers_gpio_uart/src/console.rs
@@ -19,6 +19,10 @@ pub mod interface {
 
         /// Write a Rust format string.
         fn write_fmt(&self, args: fmt::Arguments) -> fmt::Result;
+
+        /// Block execution until the last buffered character has been physically put on the TX
+        /// wire.
+        fn flush(&self);
     }
 
     /// Console read functions.
@@ -27,6 +31,9 @@ pub mod interface {
         fn read_char(&self) -> char {
             ' '
         }
+
+        /// Clear RX buffers, if any.
+        fn clear_rx(&self);
     }
 
     /// Console statistics.
diff --git a/06_drivers_gpio_uart/src/main.rs b/06_drivers_gpio_uart/src/main.rs
index e0bf47a93..1674b9e42 100644
--- a/06_drivers_gpio_uart/src/main.rs
+++ b/06_drivers_gpio_uart/src/main.rs
@@ -143,6 +143,7 @@ unsafe fn kernel_init() -> ! {
 
 /// The main function running after the early init.
 fn kernel_main() -> ! {
+    use bsp::console::console;
     use console::interface::All;
     use driver::interface::DriverManager;
 
@@ -163,6 +164,8 @@ fn kernel_main() -> ! {
     );
     println!("[3] Echoing input now");
 
+    // Discard any spurious received characters before going into echo mode.
+    console().clear_rx();
     loop {
         let c = bsp::console::console().read_char();
         bsp::console::console().write_char(c);
diff --git a/07_uart_chainloader/README.md b/07_uart_chainloader/README.md
index ef90e02ee..fe6251109 100644
--- a/07_uart_chainloader/README.md
+++ b/07_uart_chainloader/README.md
@@ -197,7 +197,7 @@ diff -uNr 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs 07_uart_chainloader/src/
      } else {
          // If not core0, infinitely wait for events.
          wait_forever()
-@@ -55,3 +55,19 @@
+@@ -54,3 +54,19 @@
          asm::wfe()
      }
  }
@@ -218,55 +218,62 @@ diff -uNr 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs 07_uart_chainloader/src/
 +    core::intrinsics::unreachable()
 +}
 
+diff -uNr 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+--- 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
++++ 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+@@ -144,7 +144,7 @@
+         // Make an educated guess for a good delay value (Sequence described in the BCM2837
+         // peripherals PDF).
+         //
+-        // - According to Wikipedia, the fastest Pi3 clocks around 1.4 GHz.
++        // - According to Wikipedia, the fastest RPi4 clocks around 1.5 GHz.
+         // - The Linux 2837 GPIO driver waits 1 µs between the steps.
+         //
+         // So lets try to be on the safe side and default to 2000 cycles, which would equal 1 µs
+
 diff -uNr 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 --- 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 +++ 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
-@@ -270,6 +270,15 @@
-         // readability.
-         self.inner.lock(|inner| fmt::Write::write_fmt(inner, args))
+@@ -257,7 +257,7 @@
      }
-+
-+    fn flush(&self) {
-+        // Spin until TX FIFO empty is set.
-+        self.inner.lock(|inner| {
-+            while !inner.registers.FR.matches_all(FR::TXFE::SET) {
-+                cpu::nop();
-+            }
-+        });
-+    }
- }
 
- impl console::interface::Read for PL011Uart {
-@@ -280,18 +289,20 @@
-                 cpu::nop();
-             }
+     /// Retrieve a character.
+-    fn read_char_converting(&mut self, blocking_mode: BlockingMode) -> Option<char> {
++    fn read_char(&mut self, blocking_mode: BlockingMode) -> Option<char> {
+         // If RX FIFO is empty,
+         if self.registers.FR.matches_all(FR::RXFE::SET) {
+             // immediately return in non-blocking mode.
+@@ -272,12 +272,7 @@
+         }
 
--            // Read one character.
--            let mut ret = inner.registers.DR.get() as u8 as char;
--
--            // Convert carrige return to newline.
--            if ret == '\r' {
--                ret = '\n'
--            }
+         // Read one character.
+-        let mut ret = self.registers.DR.get() as u8 as char;
 -
-             // Update statistics.
-             inner.chars_read += 1;
+-        // Convert carrige return to newline.
+-        if ret == '\r' {
+-            ret = '\n'
+-        }
++        let ret = self.registers.DR.get() as u8 as char;
+
+         // Update statistics.
+         self.chars_read += 1;
+@@ -357,14 +352,14 @@
+ impl console::interface::Read for PL011Uart {
+     fn read_char(&self) -> char {
+         self.inner
+-            .lock(|inner| inner.read_char_converting(BlockingMode::Blocking).unwrap())
++            .lock(|inner| inner.read_char(BlockingMode::Blocking).unwrap())
+     }
 
--            ret
-+            // Read one character.
-+            inner.registers.DR.get() as u8 as char
-+        })
-+    }
-+
-+    fn clear(&self) {
-+        self.inner.lock(|inner| {
-+            // Read from the RX FIFO until it is indicating empty.
-+            while !inner.registers.FR.matches_all(FR::RXFE::SET) {
-+                inner.registers.DR.get();
-+            }
-         })
+     fn clear_rx(&self) {
+         // Read from the RX FIFO until it is indicating empty.
+         while self
+             .inner
+-            .lock(|inner| inner.read_char_converting(BlockingMode::NonBlocking))
++            .lock(|inner| inner.read_char(BlockingMode::NonBlocking))
+             .is_some()
+         {}
      }
- }
 
 diff -uNr 06_drivers_gpio_uart/src/bsp/raspberrypi/link.ld 07_uart_chainloader/src/bsp/raspberrypi/link.ld
 --- 06_drivers_gpio_uart/src/bsp/raspberrypi/link.ld
@@ -376,31 +383,6 @@ diff -uNr 06_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs 07_uart_chainloader
      unsafe {
          range = RangeInclusive::new(__bss_start.get(), __bss_end_inclusive.get());
 
-diff -uNr 06_drivers_gpio_uart/src/console.rs 07_uart_chainloader/src/console.rs
---- 06_drivers_gpio_uart/src/console.rs
-+++ 07_uart_chainloader/src/console.rs
-@@ -19,6 +19,10 @@
-
-         /// Write a Rust format string.
-         fn write_fmt(&self, args: fmt::Arguments) -> fmt::Result;
-+
-+        /// Block execution until the last character has been physically put on the TX wire
-+        /// (draining TX buffers/FIFOs, if any).
-+        fn flush(&self);
-     }
-
-     /// Console read functions.
-@@ -27,6 +31,9 @@
-         fn read_char(&self) -> char {
-             ' '
-         }
-+
-+        /// Clear RX buffers, if any.
-+        fn clear(&self);
-     }
-
-     /// Console statistics.
-
 diff -uNr 06_drivers_gpio_uart/src/main.rs 07_uart_chainloader/src/main.rs
 --- 06_drivers_gpio_uart/src/main.rs
 +++ 07_uart_chainloader/src/main.rs
@@ -432,23 +414,13 @@ diff -uNr 06_drivers_gpio_uart/src/main.rs 07_uart_chainloader/src/main.rs
  mod runtime_init;
  mod synchronization;
 
-@@ -143,28 +147,52 @@
-
- /// The main function running after the early init.
+@@ -145,29 +149,49 @@
  fn kernel_main() -> ! {
-+    use bsp::console::console;
+     use bsp::console::console;
      use console::interface::All;
 -    use driver::interface::DriverManager;
--
--    println!("[0] Booting on: {}", bsp::board_name());
 
--    println!("[1] Drivers loaded:");
--    for (i, driver) in bsp::driver::driver_manager()
--        .all_device_drivers()
--        .iter()
--        .enumerate()
--    {
--        println!("      {}. {}", i + 1, driver.compatible());
+-    println!("[0] Booting on: {}", bsp::board_name());
 +    println!(" __  __ _      _ _                 _ ");
 +    println!("|  \\/  (_)_ _ (_) |   ___  __ _ __| |");
 +    println!("| |\\/| | | ' \\| | |__/ _ \\/ _` / _` |");
@@ -458,22 +430,30 @@ diff -uNr 06_drivers_gpio_uart/src/main.rs 07_uart_chainloader/src/main.rs
 +    println!();
 +    println!("[ML] Requesting binary");
 +    console().flush();
-+
-+    // Clear the RX FIFOs, if any, of spurious received characters before starting with the loader
-+    // protocol.
-+    console().clear();
-+
-+    // Notify `Minipush` to send the binary.
-+    for _ in 0..3 {
-+        console().write_char(3 as char);
-     }
+
+-    println!("[1] Drivers loaded:");
+-    for (i, driver) in bsp::driver::driver_manager()
+-        .all_device_drivers()
+-        .iter()
+-        .enumerate()
+-    {
+-        println!("      {}. {}", i + 1, driver.compatible());
+-    }
++    // Discard any spurious received characters before starting with the loader protocol.
++    console().clear_rx();
 
 -    println!(
 -        "[2] Chars written: {}",
 -        bsp::console::console().chars_written()
 -    );
 -    println!("[3] Echoing input now");
--
++    // Notify `Minipush` to send the binary.
++    for _ in 0..3 {
++        console().write_char(3 as char);
++    }
+
+-    // Discard any spurious received characters before going into echo mode.
+-    console().clear_rx();
 -    loop {
 -        let c = bsp::console::console().read_char();
 -        bsp::console::console().write_char(c);
diff --git a/07_uart_chainloader/demo_payload_rpi3.img b/07_uart_chainloader/demo_payload_rpi3.img
index 34c3214cfbe8d37cc863e86b50c5d3630ce0304e..47a0ae1037b18fa72ffdd9262c664c64bfc89289 100755
GIT binary patch
delta 1724
zcmcgsZ)jUp6hHU9{BPGJYtok&7n8J0)0b?PZfjCOme?7btqRLJoeW(<L8b-EswnD*
z1W{?}z+P^3p9bp&>dQV@i8A8{>7Nf>QE&q-`0aHnq)~*5(q?mgo}0Xh%<o>fynF8N
z{Q13e&p8W+uJzCCA*(d7LO%HP=P2=RnP8Rx%xgaa4d;CHrU-P7g@rD1xSSDu<cW|>
z7sS(RHb~d)a=J1F1Ib`W{GOjz^;E+C#dMa-iWxQ+b$uk*2bC9~nC1HGVz3m<K&4?D
zfr?#V?}~|tgNL(<YIPZ?f~rH|ZmMC}bx|nk1)^4?pw`%?I3TRc<+$ldB80oyo92Yj
z=VRlR0K0C!AcTG8am!Q0gQiMerq$?Is%9lBce7Fc!TPHxJnSp4v<wpAxU<}{>qF9U
z>;P>6m}$k}wIe{s`W~X^NPw-h<;fMMIMYHgz{Z@N!cr%D&p8-7Cea!?)2tSirzae`
zpK54UjhfV>$hj6Zt9Ep!%mvtOr%XO!Ue`VcjnH<ye0eFxhFyL~I7rvB5>G1|cPYW5
z3;MZ@7dQHx=|MlrT#$a=+1=2&>Wav@Ht6>l*zBbk=EYO0wnII}{&a;p23_>lWuUW{
zLbR$kiE!s}ci62tAbAQMYGQloHX6Lno^|^K1YdJU?#tOAdB%bdh@O@8Am!1AP?;NF
zbt_WZ0!fbj!zv$YFxqkl3Kvb#Z$r%fOs3AiF?{$Mgpw(et~m0U`j8o@BX6$r`xo_S
zVu%#8W&lr|U?Dt^R>u$@vp_wL_}3(qjH6vE+KmNZ_c_E0{cv`eO#55W$3E0~e5W_T
z3yPn=(R)uNf75k|8xQY98^9fu0f~sXO}HV{O-GA+Y2IASz6}wqU_!Tc^z$JIea8t;
zn~GWciA+6aMuJ|?!I&8<@fKF-3AVQT(Ly**72GLe`^8RRgnJemUKN^0%fSVO?)j_f
zt&u*i`wnb#{Z*`YqBk*pncUbp2z3o3Phx6qKYcU-HuwySeP#m-X{b-4Et@H-7X($q
z0-r+PwO*pK$@T{e;#=7uMOJ7Nd><-3n4(Fe&-nQo_L<G-Gn>(8XD~)ehKfVL?|!JX
zv=y_B=i7z$xnefvhDvP|Xxs}G-q$^-%lRKgJ7qCSYf0pKnIIpN>fh+XZtQAyV-+j=
z<}y$d{z%cv5}xD#C%qm{Z#_aaWK*+3ozp9Ddi*7A*zMIqliunb{rtkVe&|1ypmjGZ
zAs40mHy$x6f$I@0O#r1a&orD(d_M8n1~{umc67<MH?3mzlr+(Xn7wow@0I}AsCPdZ
zVAPu;f3O=~iEOhC@3)Ul%E;+oYf);-SUruEnV1-#z|$4uzQee`SMMStQmSyl*R*yS
zT0wtP#y4%ODFesh&{(e;GR~XEx>rAE;CG{*G-QjR|C}KkY()tA*^=~p_+umPbpxL_
z<ZVOdd63-m-X^;R<2%64`l6VlK3Q_S;%s6kW%i{Hhqj;n?mOJX4&22;hF7=2hJVwz
UUB<oBxJOcN$S;vewjn?LH;(D-D*ylh

delta 1531
zcmb7EUuauZ82`>qZj$~@?vk72rpuBvtx2jf*RIWqXwr^g*N1{}xCbBBG7zUzjK0Y*
zX;ql?k2#!5MSQ3$sJ9>}QCRjcTlz3XoGZ8@4CHohl4Y9@K6$6z^*i_84Yvou1BY|J
z@B4k<@4LVA=i9-x{ng#%9F3kQvtM3I5&4o6774%?+OI$p`5?XG0QwP22uU(fD+pnd
zfe>AD9NqFjURR+~+;+rPWBZ`a?O4HDTY90c61M6X8uVbPcAUJVhotCnXQkNO0QxYd
z&XFFPSWZz5DU32v8!3m{+zaYWCOQuY>!DiCIY9){!`>5z1S!bQi)RJGmuPL-HB17S
zo*4<zM(UiZxrxfl{8GE+zUdGW!P@1vQ6g+~)?yu>kRa)&Z2(o?Nb?}jm$o0LbK4Pi
zxpRsvuqV8EVX}*rz1_m;I9u_K_U)5t6N_nXm&*H2z;3ExS|jCD$FT2aN>p3WpPBAr
zUY|l#mhnB(T1rwsa=d;z&5rsatt3jf`eiO5d&`%Jt$AS(bE+~<tXWNCoy>HUel4H|
zi22^vt1NfGV8D(o&ZJS7z-q$}dIxKf;=w<>^!5tS#hE>{VOWju#GI6n;;oQ<4hw1y
z|LR|u@FpusVF81)Qg7F?8?rCB@;YbFtVbzlA4jmsDrG_y5wbjXud9(gW=CziqGgnn
z?_l*1sT5mrHAR#Q`n-~_&qI7D7I$3Y-#-|s>^#ZWC!z)Y^C;}PAOihn5K51d`N%|6
z)E5x50BIA?zb_bj5fAkfN<p7P><LBG+wHn9@1(M~3?l>p2dfSwb>al*p~oh>>6BP0
zzO8lRsU&pgj<FPn_)omSSv*!PQbF$%^Ys_yz(Ah}^_JU}qDNwa|EXt5hGuZ)i08&}
zfWyhZtxQuA?tcgV<gxDz<8ZrS#f%NId1nCh8_04B<?>wp^fk=|UvU|(<KY;WWLEP}
z9C6JQV-(3S9D5(?pCNP=)oSak6uF`~{7Y1t=47aAD}<&;VrSBmm15s?>`e0*-h*|t
z5yM*<!`#fry|kGHot+GXU18*&bg>Tu&y@cUO%nc-Ce3NqleFmu-6%WN>q&>oHT2+p
zYLrFw$_CKic8n!WH}>Nun0qjCZxhyftWC)GQVyK5H-Q5Q{x@h3na_iU&jNoM_)`J+
zG?dt;>?bGLHF<!vv(0dbJr+zWnj4A#HBd2gTxF%;j}j>NM~B(dp->_jvb;eXJ8av6
zZHL*rp<G!GTPUCHU9xN4WgvDO@0&S(x2xb4HphebpC4eoXxlCuzjc2X4p>syc=-85
zJYw}RX7i<O`&HXEwUE-Xg*srb?Mx4+P^W|vYMu02v5R3gstgIL!roAxv|{~tV;|Um
aC)wTbHIMU@?f2S#Y)Xi{LV%SbNB#kA+@2)>

diff --git a/07_uart_chainloader/demo_payload_rpi4.img b/07_uart_chainloader/demo_payload_rpi4.img
index c7919ed6517de38049e1f9fd7eb05966c58a4063..14e578c1784483707bb257c94ea90a0cb9d7cb97 100755
GIT binary patch
delta 1870
zcmb_cTWlLe6uq-+JG*%~#;-W3V>=HV+msN}#JohDRzYeCYOpH!=tmL?f;K``-H(8T
zWJ5uara~D_qzWOCKBS@zA5aA(tX7aTd^CV)D<D(?fs+c!xPU07NjGi0+}YiPHiAD!
z+PyP#&)j?F&Y3yec6QU~1~PrpZx`I>Eigs^J_z-DXzmiw1rg}mlU+iH^m^$u$t0)5
zzBvgJs_aW-hvB|>ASiyz`?FeShy3wKl8+-+xH7G2I|8kc<=8;CVRu6&DK{B?SzvF9
z9ZjW}D_0^a`5B-QboYcBX%2JFi^7DKCQ3dGN`a~3{lq)jX4y_iBRgP?6AwFOJ*EHs
zlVi3Ah_jJK2D~&M{zS=@5QRthX>z{gH<5TI&y{T^!hZXtv*HBt?7Nqi0gRSo+QJr~
zgO5K%50P4Su5y4JWUcnDa4kKCG{lO8+7E#_ZHsWB_#mi%ZI=|lH82&VBm?vZ_LluI
zhYJ&0lsqQGZH)FDtz}F0fPDkaVdTP!b~p&ZZ{BB3Rgp*ooyFSm&2Y2_(Q^y9`g=if
zVt@acW-6hTLVh+>)sS8-J)tW_?Qo_F+OLYB>WHI$y-aRIe^lS7=hxC!<yzXN;IWPJ
zW4nPFu8Tx3;{w`WF-CtSv^V3v@=j1)h#NcBjDFWdC4sTr>w>bRX@4v|RYjK%0A2R<
zfubG<s_rDp8}&eq1$C^&5eWQ4?L3Cfl|p<chP{DdbE0!%h&}Jv_>6}xUIJ4+gr4T<
zC5S&~OQ?$&`KlLG87V~O{j`TudRJ5mnnlsRwkkTsIH;>z$sr5Ah4(N<!UplRG7Qu)
z&Ee&R5)H&Vh&W<_c3vde*R2;Tin1&~Fy2WL+0szA+GE9o3RzV?zefvq^x%<L0bDTx
z+1+<1ltJ_l+CYt={|gd~$8g=CAMQxE!@g}~q^2BW970Sv#<&YHkEV+)9bE5x@TJxg
z|6S9(eDStoSf5|PF{)-1f{j!}yDL*qEofhb27Oxt)=csm66ZS6iMzYis5Oxtv1F2a
z+^)8$74Hhp$uN<We}*i-d&d3aT8YrKUPtV766vx`V26<`Oa)A`c`8f?FwmVhjRb4h
z*WfzG&*B9w(+r<BLoO8CKrJ8{Nqi+KefDYUhz&mEYhoccEnt;%F;Ir_ykzu6uXNJO
zF_Koaw4g+>Olyp>l%>cvIuBVH=ht2c?EmWv;e%{oBbJ{BuD~?{S_j%nv~I{o`q3gL
zzYAy{g`wYp=_b0B3n$FZIIFn^juW~t1JuV$X@mAYJQ58{e=FO9Mie{@^?xUu{x7yA
zCfoT2{l@0QqN20M2Tn`ltAV$6P38?KV%)$l{LNU_Hr=L~T%)0x{w5v6HS@Ho8N3=3
z?6gaA4i~x566%m{QE(7u-??6{xmkiKZ)up&Xc9}gzv_{Ex4XN%#u(+Jx9(JGZwh-c
za~|I<y{*Ruz3iap;k3WnSYBnq#?A1nS!L6Y?}^?P&9L|c>TNwfw=V5Pb8Iv5Kbm8c
zt^ng~tM}QO<{E=WubJ*1bNoUz``lYs+Uqvl{ciTB_YwIeyD_}Tx~k*kBzv*?$=21m
eBjyGiW<qWg_>G$Lc5{B55#L@xs$nVL6MqA{Zas?t

delta 1698
zcmZ8hZ%kWN6hF7GrGFT-(3VpE?De%_T~V?iW6g|lWx^~Z&ZHrZWQjobL8dcAO#Ech
z;-8E;SbDugK4~^JhR3o5tr{AQ1M$Q7AYvRCW0n;7QjtX+VdD+qdG33!#Br1MoO{o|
z-~F9)->sv!n$k7o>(6VQChw#fMhU>A)Z?MKRiG;Z&<`>#CW$=mr86Xzm=?O1Y!Fk#
zM#yTiO_wsH681VnC+rL1ShEfD9KavXXOrsad2=eUHVgDIbRCw0RGO}%In1vniJT7$
z^4bxQ*I9}AIPqqlH9t>Ckd0ZQ#KV5Fe53u>X2y%2B<>)M^m=JN{GFV$5}9YXo!PYB
z6^JLZT6~h2R!cMClFvwm^aL#iNOK5l&j5XeJVl3zpRJbml780aY(f2^Q?wqWBn5Pd
z-EclvR*q@SavoDUFskF4pB1}AXBEw1{MwE>7J$HQnH_gUA`+cLHu7Q6yeqKI(h5fZ
zZj#-ozyAFpiq}uuq-u8A6-pM!By?w29h-JS^M(M5=5ei>MvxFMdVduRYW3BmMczyn
z$w*w9H)0#{YzagoYX#*x=D1n{&4)2A?*_$#exn~BLc3>T17I|F(Ih`m)xRH<yXeEW
zfj;c)23h$8sB)IbLqVW=Kn>0RBFKF_iE5VBzbtZ`>rqe&h4l#_bO8$n91uN=_H8Vf
z6WkMTvca;3h=<-^1!GbO{gwl>LbR_arrgJx8$M9%2rjZ*&3-KtISq({U*S4>rYsQM
zqoKD(qk+@E|N6YcJmw>eL7mT4x*f^K7NxZY|JJIE_+!}-2pkgw!XnpyRKw8`63gDG
zh4P!t@LB^IsXCopZdK+jKu<55l`H6U1rBQgT%T8uU;tz<+-X&Y(dWV)vvR;l{OV3P
zdRJ9_fCV8CqyoxwsQ@*jd<P^AT(1SG;WXidaDev3R;At&%U;Hzf7$D4s<%K^ur0PS
zr`wkdQ;iiVOivKopXUKO8~)Wp_s-viEpD4r)y@i4x2dz_=iMeyHnGgK1-|5Cs{6a~
z4VmQkuse<)ZVvF0xe&<le@@UpLPU-u4}A#14ikwuUeR{4=&ghe9ov^7%ipbthoTp<
z_7-tUMq=%Q;*`A<<%~EL=|PG1{5ha}G_;wW2{F;5x0BG7S)dIFDQ1D@ZlqsDriL&p
zufSnlLO2eDvgQQEfl%rVC=Sf(KqMTp9g&P<46oje=iP`Vj%aL%q8-t26mdk;UO-|+
zBwa|eZCNtrMvygV_+3$x_=NEZ?M-nA=LbQW5hQG@M;~cpE~vM$C#3oCHYQo4*X{mv
zmp447yst@YJk+r>-odK873=(OVHItyTiHGDe8*7bqvn|keQz?{+6D&t2T;Fmoa2{6
zTl@X4RxpR}>Ewq#J=|ruiGF=wsCvn;<BQhT8^#_#LfYEz-(%PdWxI@hk>UTMu{YqF
zKxA{im#W5%vI~ZJ(%5hLSV!eS$AU*kmGiKH%2W0}r@rlCGnG-&$dt-6jfJy-5m{yw
Z<T8domvQbi&P6up?>7zk***UY{{esD4Q&7b

diff --git a/07_uart_chainloader/src/_arch/aarch64/cpu.rs b/07_uart_chainloader/src/_arch/aarch64/cpu.rs
index 1895b6f16..184347d78 100644
--- a/07_uart_chainloader/src/_arch/aarch64/cpu.rs
+++ b/07_uart_chainloader/src/_arch/aarch64/cpu.rs
@@ -40,7 +40,6 @@ pub unsafe fn _start() -> ! {
 pub use asm::nop;
 
 /// Spin for `n` cycles.
-#[cfg(feature = "bsp_rpi3")]
 #[inline(always)]
 pub fn spin_for_cycles(n: usize) {
     for _ in 0..n {
diff --git a/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 771151e76..9d41900d7 100644
--- a/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -144,7 +144,7 @@ impl GPIOInner {
         // Make an educated guess for a good delay value (Sequence described in the BCM2837
         // peripherals PDF).
         //
-        // - According to Wikipedia, the fastest Pi3 clocks around 1.4 GHz.
+        // - According to Wikipedia, the fastest RPi4 clocks around 1.5 GHz.
         // - The Linux 2837 GPIO driver waits 1 µs between the steps.
         //
         // So lets try to be on the safe side and default to 2000 cycles, which would equal 1 µs
diff --git a/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 1678cf00f..9a92c9d21 100644
--- a/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -136,6 +136,12 @@ register_structs! {
 /// Abstraction for the associated MMIO registers.
 type Registers = MMIODerefWrapper<RegisterBlock>;
 
+#[derive(PartialEq)]
+enum BlockingMode {
+    Blocking,
+    NonBlocking,
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -174,24 +180,41 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
+    /// This results in 8N1 and 921_600 baud.
     ///
-    /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
-    /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
+    /// The calculation for the BRD is (we set the clock to 48 MHz in config.txt):
+    /// `(48_000_000 / 16) / 921_600 = 3.2552083`. `3` goes to the `IBRD` (integer field).
     ///
-    /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
-    /// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
-    /// now at 0.01 %.
+    /// The `FBRD` (fractional field) is only 6 bits so `0.2552083 * 64 = 16.3 rounded to 16` will
+    /// give the best approximation we can get. A 5% error margin is acceptable for UART and we're
+    /// now at 0.02%.
     pub fn init(&mut self) {
-        // Turn it off temporarily.
+        // Execution can arrive here while there are still characters queued in the TX FIFO and
+        // actively being sent out by the UART hardware. If the UART is turned off in this case,
+        // those queued characters would be lost.
+        //
+        // For example, this can happen during runtime on a call to panic!(), because panic!()
+        // initializes its own UART instance and calls init().
+        //
+        // Hence, flush first to ensure all pending characters are transmitted.
+        self.flush();
+
+        // Turn the UART off temporarily.
         self.registers.CR.set(0);
 
+        // Clear all pending interrupts.
         self.registers.ICR.write(ICR::ALL::CLEAR);
-        self.registers.IBRD.write(IBRD::IBRD.val(5));
-        self.registers.FBRD.write(FBRD::FBRD.val(13));
+
+        // Set the baud rate.
+        self.registers.IBRD.write(IBRD::IBRD.val(3));
+        self.registers.FBRD.write(FBRD::FBRD.val(16));
+
+        // Set 8N1 + FIFO on.
         self.registers
             .LCRH
-            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
+            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled);
+
+        // Turn the UART on.
         self.registers
             .CR
             .write(CR::UARTEN::Enabled + CR::TXE::Enabled + CR::RXE::Enabled);
@@ -209,6 +232,53 @@ impl PL011UartInner {
 
         self.chars_written += 1;
     }
+
+    /// Block execution until the last buffered character has been physically put on the TX wire.
+    fn flush(&self) {
+        // The bit time for 921_600 baud is 1 / 921_600 = 1.09 µs. 8N1 has a total of 10 bits per
+        // symbol (start bit, 8 data bits, stop bit), so one symbol takes round about 10 * 1.09 =
+        // 10.9 µs, or 10_900 ns. Round it up to 12_000 ns to be on the safe side.
+        //
+        // Now make an educated guess for a good delay value. According to Wikipedia, the fastest
+        // RPi4 clocks around 1.5 GHz.
+        //
+        // So lets try to be on the safe side and default to 24_000 cycles, which would equal 12_000
+        // ns would the CPU be clocked at 2 GHz.
+        const CHAR_TIME_SAFE: usize = 24_000;
+
+        // Spin until TX FIFO empty is set.
+        while !self.registers.FR.matches_all(FR::TXFE::SET) {
+            cpu::nop();
+        }
+
+        // After the last character has been queued for transmission, wait for the time of one
+        // character + some extra time for safety.
+        cpu::spin_for_cycles(CHAR_TIME_SAFE);
+    }
+
+    /// Retrieve a character.
+    fn read_char(&mut self, blocking_mode: BlockingMode) -> Option<char> {
+        // If RX FIFO is empty,
+        if self.registers.FR.matches_all(FR::RXFE::SET) {
+            // immediately return in non-blocking mode.
+            if blocking_mode == BlockingMode::NonBlocking {
+                return None;
+            }
+
+            // Otherwise, wait until a char was received.
+            while self.registers.FR.matches_all(FR::RXFE::SET) {
+                cpu::nop();
+            }
+        }
+
+        // Read one character.
+        let ret = self.registers.DR.get() as u8 as char;
+
+        // Update statistics.
+        self.chars_read += 1;
+
+        Some(ret)
+    }
 }
 
 /// Implementing `core::fmt::Write` enables usage of the `format_args!` macros, which in turn are
@@ -231,6 +301,8 @@ impl fmt::Write for PL011UartInner {
 }
 
 impl PL011Uart {
+    /// Create an instance.
+    ///
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
@@ -273,37 +345,23 @@ impl console::interface::Write for PL011Uart {
 
     fn flush(&self) {
         // Spin until TX FIFO empty is set.
-        self.inner.lock(|inner| {
-            while !inner.registers.FR.matches_all(FR::TXFE::SET) {
-                cpu::nop();
-            }
-        });
+        self.inner.lock(|inner| inner.flush());
     }
 }
 
 impl console::interface::Read for PL011Uart {
     fn read_char(&self) -> char {
-        self.inner.lock(|inner| {
-            // Spin while RX FIFO empty is set.
-            while inner.registers.FR.matches_all(FR::RXFE::SET) {
-                cpu::nop();
-            }
-
-            // Update statistics.
-            inner.chars_read += 1;
-
-            // Read one character.
-            inner.registers.DR.get() as u8 as char
-        })
+        self.inner
+            .lock(|inner| inner.read_char(BlockingMode::Blocking).unwrap())
     }
 
-    fn clear(&self) {
-        self.inner.lock(|inner| {
-            // Read from the RX FIFO until it is indicating empty.
-            while !inner.registers.FR.matches_all(FR::RXFE::SET) {
-                inner.registers.DR.get();
-            }
-        })
+    fn clear_rx(&self) {
+        // Read from the RX FIFO until it is indicating empty.
+        while self
+            .inner
+            .lock(|inner| inner.read_char(BlockingMode::NonBlocking))
+            .is_some()
+        {}
     }
 }
 
diff --git a/07_uart_chainloader/src/console.rs b/07_uart_chainloader/src/console.rs
index 2d38cc1d1..3552823cc 100644
--- a/07_uart_chainloader/src/console.rs
+++ b/07_uart_chainloader/src/console.rs
@@ -20,8 +20,8 @@ pub mod interface {
         /// Write a Rust format string.
         fn write_fmt(&self, args: fmt::Arguments) -> fmt::Result;
 
-        /// Block execution until the last character has been physically put on the TX wire
-        /// (draining TX buffers/FIFOs, if any).
+        /// Block execution until the last buffered character has been physically put on the TX
+        /// wire.
         fn flush(&self);
     }
 
@@ -33,7 +33,7 @@ pub mod interface {
         }
 
         /// Clear RX buffers, if any.
-        fn clear(&self);
+        fn clear_rx(&self);
     }
 
     /// Console statistics.
diff --git a/07_uart_chainloader/src/main.rs b/07_uart_chainloader/src/main.rs
index 2e436374c..c8f2a91f6 100644
--- a/07_uart_chainloader/src/main.rs
+++ b/07_uart_chainloader/src/main.rs
@@ -160,9 +160,8 @@ fn kernel_main() -> ! {
     println!("[ML] Requesting binary");
     console().flush();
 
-    // Clear the RX FIFOs, if any, of spurious received characters before starting with the loader
-    // protocol.
-    console().clear();
+    // Discard any spurious received characters before starting with the loader protocol.
+    console().clear_rx();
 
     // Notify `Minipush` to send the binary.
     for _ in 0..3 {
diff --git a/08_timestamps/README.md b/08_timestamps/README.md
index 45a5c270e..111b1168c 100644
--- a/08_timestamps/README.md
+++ b/08_timestamps/README.md
@@ -129,12 +129,11 @@ diff -uNr 07_uart_chainloader/src/_arch/aarch64/cpu.rs 08_timestamps/src/_arch/a
      } else {
          // If not core0, infinitely wait for events.
          wait_forever()
-@@ -39,15 +39,6 @@
+@@ -39,14 +39,6 @@
 
  pub use asm::nop;
 
 -/// Spin for `n` cycles.
--#[cfg(feature = "bsp_rpi3")]
 -#[inline(always)]
 -pub fn spin_for_cycles(n: usize) {
 -    for _ in 0..n {
@@ -145,7 +144,7 @@ diff -uNr 07_uart_chainloader/src/_arch/aarch64/cpu.rs 08_timestamps/src/_arch/a
  /// Pause execution on the core.
  #[inline(always)]
  pub fn wait_forever() -> ! {
-@@ -55,19 +46,3 @@
+@@ -54,19 +46,3 @@
          asm::wfe()
      }
  }
@@ -283,7 +282,7 @@ diff -uNr 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 08_times
 -        // Make an educated guess for a good delay value (Sequence described in the BCM2837
 -        // peripherals PDF).
 -        //
--        // - According to Wikipedia, the fastest Pi3 clocks around 1.4 GHz.
+-        // - According to Wikipedia, the fastest RPi4 clocks around 1.5 GHz.
 -        // - The Linux 2837 GPIO driver waits 1 µs between the steps.
 -        //
 -        // So lets try to be on the safe side and default to 2000 cycles, which would equal 1 µs
@@ -308,27 +307,72 @@ diff -uNr 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 08_times
 diff -uNr 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 --- 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 +++ 08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
-@@ -289,11 +289,18 @@
-                 cpu::nop();
-             }
+@@ -235,16 +235,13 @@
 
-+            // Read one character.
-+            let mut ret = inner.registers.DR.get() as u8 as char;
-+
-+            // Convert carrige return to newline.
-+            if ret == '\r' {
-+                ret = '\n'
-+            }
+     /// Block execution until the last buffered character has been physically put on the TX wire.
+     fn flush(&self) {
++        use crate::{time, time::interface::TimeManager};
++        use core::time::Duration;
 +
-             // Update statistics.
-             inner.chars_read += 1;
+         // The bit time for 921_600 baud is 1 / 921_600 = 1.09 µs. 8N1 has a total of 10 bits per
+         // symbol (start bit, 8 data bits, stop bit), so one symbol takes round about 10 * 1.09 =
+         // 10.9 µs, or 10_900 ns. Round it up to 12_000 ns to be on the safe side.
+-        //
+-        // Now make an educated guess for a good delay value. According to Wikipedia, the fastest
+-        // RPi4 clocks around 1.5 GHz.
+-        //
+-        // So lets try to be on the safe side and default to 24_000 cycles, which would equal 12_000
+-        // ns would the CPU be clocked at 2 GHz.
+-        const CHAR_TIME_SAFE: usize = 24_000;
++        const CHAR_TIME_SAFE: Duration = Duration::from_nanos(12_000);
+
+         // Spin until TX FIFO empty is set.
+         while !self.registers.FR.matches_all(FR::TXFE::SET) {
+@@ -253,11 +250,11 @@
+
+         // After the last character has been queued for transmission, wait for the time of one
+         // character + some extra time for safety.
+-        cpu::spin_for_cycles(CHAR_TIME_SAFE);
++        time::time_manager().spin_for(CHAR_TIME_SAFE);
+     }
 
--            // Read one character.
--            inner.registers.DR.get() as u8 as char
-+            ret
-         })
+     /// Retrieve a character.
+-    fn read_char(&mut self, blocking_mode: BlockingMode) -> Option<char> {
++    fn read_char_converting(&mut self, blocking_mode: BlockingMode) -> Option<char> {
+         // If RX FIFO is empty,
+         if self.registers.FR.matches_all(FR::RXFE::SET) {
+             // immediately return in non-blocking mode.
+@@ -272,7 +269,12 @@
+         }
+
+         // Read one character.
+-        let ret = self.registers.DR.get() as u8 as char;
++        let mut ret = self.registers.DR.get() as u8 as char;
++
++        // Convert carrige return to newline.
++        if ret == '\r' {
++            ret = '\n'
++        }
+
+         // Update statistics.
+         self.chars_read += 1;
+@@ -352,14 +354,14 @@
+ impl console::interface::Read for PL011Uart {
+     fn read_char(&self) -> char {
+         self.inner
+-            .lock(|inner| inner.read_char(BlockingMode::Blocking).unwrap())
++            .lock(|inner| inner.read_char_converting(BlockingMode::Blocking).unwrap())
      }
 
+     fn clear_rx(&self) {
+         // Read from the RX FIFO until it is indicating empty.
+         while self
+             .inner
+-            .lock(|inner| inner.read_char(BlockingMode::NonBlocking))
++            .lock(|inner| inner.read_char_converting(BlockingMode::NonBlocking))
+             .is_some()
+         {}
+     }
 
 diff -uNr 07_uart_chainloader/src/bsp/raspberrypi/link.ld 08_timestamps/src/bsp/raspberrypi/link.ld
 --- 07_uart_chainloader/src/bsp/raspberrypi/link.ld
@@ -484,7 +528,7 @@ diff -uNr 07_uart_chainloader/src/main.rs 08_timestamps/src/main.rs
 
  /// Early init code.
  ///
-@@ -147,52 +146,31 @@
+@@ -147,51 +146,31 @@
 
  /// The main function running after the early init.
  fn kernel_main() -> ! {
@@ -504,9 +548,8 @@ diff -uNr 07_uart_chainloader/src/main.rs 08_timestamps/src/main.rs
 -    println!("[ML] Requesting binary");
 -    console().flush();
 -
--    // Clear the RX FIFOs, if any, of spurious received characters before starting with the loader
--    // protocol.
--    console().clear();
+-    // Discard any spurious received characters before starting with the loader protocol.
+-    console().clear_rx();
 -
 -    // Notify `Minipush` to send the binary.
 -    for _ in 0..3 {
diff --git a/08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 46cceff92..876aa461d 100644
--- a/08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -136,6 +136,12 @@ register_structs! {
 /// Abstraction for the associated MMIO registers.
 type Registers = MMIODerefWrapper<RegisterBlock>;
 
+#[derive(PartialEq)]
+enum BlockingMode {
+    Blocking,
+    NonBlocking,
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -174,24 +180,41 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
+    /// This results in 8N1 and 921_600 baud.
     ///
-    /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
-    /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
+    /// The calculation for the BRD is (we set the clock to 48 MHz in config.txt):
+    /// `(48_000_000 / 16) / 921_600 = 3.2552083`. `3` goes to the `IBRD` (integer field).
     ///
-    /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
-    /// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
-    /// now at 0.01 %.
+    /// The `FBRD` (fractional field) is only 6 bits so `0.2552083 * 64 = 16.3 rounded to 16` will
+    /// give the best approximation we can get. A 5% error margin is acceptable for UART and we're
+    /// now at 0.02%.
     pub fn init(&mut self) {
-        // Turn it off temporarily.
+        // Execution can arrive here while there are still characters queued in the TX FIFO and
+        // actively being sent out by the UART hardware. If the UART is turned off in this case,
+        // those queued characters would be lost.
+        //
+        // For example, this can happen during runtime on a call to panic!(), because panic!()
+        // initializes its own UART instance and calls init().
+        //
+        // Hence, flush first to ensure all pending characters are transmitted.
+        self.flush();
+
+        // Turn the UART off temporarily.
         self.registers.CR.set(0);
 
+        // Clear all pending interrupts.
         self.registers.ICR.write(ICR::ALL::CLEAR);
-        self.registers.IBRD.write(IBRD::IBRD.val(5));
-        self.registers.FBRD.write(FBRD::FBRD.val(13));
+
+        // Set the baud rate.
+        self.registers.IBRD.write(IBRD::IBRD.val(3));
+        self.registers.FBRD.write(FBRD::FBRD.val(16));
+
+        // Set 8N1 + FIFO on.
         self.registers
             .LCRH
-            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
+            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled);
+
+        // Turn the UART on.
         self.registers
             .CR
             .write(CR::UARTEN::Enabled + CR::TXE::Enabled + CR::RXE::Enabled);
@@ -209,6 +232,55 @@ impl PL011UartInner {
 
         self.chars_written += 1;
     }
+
+    /// Block execution until the last buffered character has been physically put on the TX wire.
+    fn flush(&self) {
+        use crate::{time, time::interface::TimeManager};
+        use core::time::Duration;
+
+        // The bit time for 921_600 baud is 1 / 921_600 = 1.09 µs. 8N1 has a total of 10 bits per
+        // symbol (start bit, 8 data bits, stop bit), so one symbol takes round about 10 * 1.09 =
+        // 10.9 µs, or 10_900 ns. Round it up to 12_000 ns to be on the safe side.
+        const CHAR_TIME_SAFE: Duration = Duration::from_nanos(12_000);
+
+        // Spin until TX FIFO empty is set.
+        while !self.registers.FR.matches_all(FR::TXFE::SET) {
+            cpu::nop();
+        }
+
+        // After the last character has been queued for transmission, wait for the time of one
+        // character + some extra time for safety.
+        time::time_manager().spin_for(CHAR_TIME_SAFE);
+    }
+
+    /// Retrieve a character.
+    fn read_char_converting(&mut self, blocking_mode: BlockingMode) -> Option<char> {
+        // If RX FIFO is empty,
+        if self.registers.FR.matches_all(FR::RXFE::SET) {
+            // immediately return in non-blocking mode.
+            if blocking_mode == BlockingMode::NonBlocking {
+                return None;
+            }
+
+            // Otherwise, wait until a char was received.
+            while self.registers.FR.matches_all(FR::RXFE::SET) {
+                cpu::nop();
+            }
+        }
+
+        // Read one character.
+        let mut ret = self.registers.DR.get() as u8 as char;
+
+        // Convert carrige return to newline.
+        if ret == '\r' {
+            ret = '\n'
+        }
+
+        // Update statistics.
+        self.chars_read += 1;
+
+        Some(ret)
+    }
 }
 
 /// Implementing `core::fmt::Write` enables usage of the `format_args!` macros, which in turn are
@@ -231,6 +303,8 @@ impl fmt::Write for PL011UartInner {
 }
 
 impl PL011Uart {
+    /// Create an instance.
+    ///
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
@@ -273,44 +347,23 @@ impl console::interface::Write for PL011Uart {
 
     fn flush(&self) {
         // Spin until TX FIFO empty is set.
-        self.inner.lock(|inner| {
-            while !inner.registers.FR.matches_all(FR::TXFE::SET) {
-                cpu::nop();
-            }
-        });
+        self.inner.lock(|inner| inner.flush());
     }
 }
 
 impl console::interface::Read for PL011Uart {
     fn read_char(&self) -> char {
-        self.inner.lock(|inner| {
-            // Spin while RX FIFO empty is set.
-            while inner.registers.FR.matches_all(FR::RXFE::SET) {
-                cpu::nop();
-            }
-
-            // Read one character.
-            let mut ret = inner.registers.DR.get() as u8 as char;
-
-            // Convert carrige return to newline.
-            if ret == '\r' {
-                ret = '\n'
-            }
-
-            // Update statistics.
-            inner.chars_read += 1;
-
-            ret
-        })
+        self.inner
+            .lock(|inner| inner.read_char_converting(BlockingMode::Blocking).unwrap())
     }
 
-    fn clear(&self) {
-        self.inner.lock(|inner| {
-            // Read from the RX FIFO until it is indicating empty.
-            while !inner.registers.FR.matches_all(FR::RXFE::SET) {
-                inner.registers.DR.get();
-            }
-        })
+    fn clear_rx(&self) {
+        // Read from the RX FIFO until it is indicating empty.
+        while self
+            .inner
+            .lock(|inner| inner.read_char_converting(BlockingMode::NonBlocking))
+            .is_some()
+        {}
     }
 }
 
diff --git a/08_timestamps/src/console.rs b/08_timestamps/src/console.rs
index 2d38cc1d1..3552823cc 100644
--- a/08_timestamps/src/console.rs
+++ b/08_timestamps/src/console.rs
@@ -20,8 +20,8 @@ pub mod interface {
         /// Write a Rust format string.
         fn write_fmt(&self, args: fmt::Arguments) -> fmt::Result;
 
-        /// Block execution until the last character has been physically put on the TX wire
-        /// (draining TX buffers/FIFOs, if any).
+        /// Block execution until the last buffered character has been physically put on the TX
+        /// wire.
         fn flush(&self);
     }
 
@@ -33,7 +33,7 @@ pub mod interface {
         }
 
         /// Clear RX buffers, if any.
-        fn clear(&self);
+        fn clear_rx(&self);
     }
 
     /// Console statistics.
diff --git a/09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 46cceff92..876aa461d 100644
--- a/09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -136,6 +136,12 @@ register_structs! {
 /// Abstraction for the associated MMIO registers.
 type Registers = MMIODerefWrapper<RegisterBlock>;
 
+#[derive(PartialEq)]
+enum BlockingMode {
+    Blocking,
+    NonBlocking,
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -174,24 +180,41 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
+    /// This results in 8N1 and 921_600 baud.
     ///
-    /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
-    /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
+    /// The calculation for the BRD is (we set the clock to 48 MHz in config.txt):
+    /// `(48_000_000 / 16) / 921_600 = 3.2552083`. `3` goes to the `IBRD` (integer field).
     ///
-    /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
-    /// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
-    /// now at 0.01 %.
+    /// The `FBRD` (fractional field) is only 6 bits so `0.2552083 * 64 = 16.3 rounded to 16` will
+    /// give the best approximation we can get. A 5% error margin is acceptable for UART and we're
+    /// now at 0.02%.
     pub fn init(&mut self) {
-        // Turn it off temporarily.
+        // Execution can arrive here while there are still characters queued in the TX FIFO and
+        // actively being sent out by the UART hardware. If the UART is turned off in this case,
+        // those queued characters would be lost.
+        //
+        // For example, this can happen during runtime on a call to panic!(), because panic!()
+        // initializes its own UART instance and calls init().
+        //
+        // Hence, flush first to ensure all pending characters are transmitted.
+        self.flush();
+
+        // Turn the UART off temporarily.
         self.registers.CR.set(0);
 
+        // Clear all pending interrupts.
         self.registers.ICR.write(ICR::ALL::CLEAR);
-        self.registers.IBRD.write(IBRD::IBRD.val(5));
-        self.registers.FBRD.write(FBRD::FBRD.val(13));
+
+        // Set the baud rate.
+        self.registers.IBRD.write(IBRD::IBRD.val(3));
+        self.registers.FBRD.write(FBRD::FBRD.val(16));
+
+        // Set 8N1 + FIFO on.
         self.registers
             .LCRH
-            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
+            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled);
+
+        // Turn the UART on.
         self.registers
             .CR
             .write(CR::UARTEN::Enabled + CR::TXE::Enabled + CR::RXE::Enabled);
@@ -209,6 +232,55 @@ impl PL011UartInner {
 
         self.chars_written += 1;
     }
+
+    /// Block execution until the last buffered character has been physically put on the TX wire.
+    fn flush(&self) {
+        use crate::{time, time::interface::TimeManager};
+        use core::time::Duration;
+
+        // The bit time for 921_600 baud is 1 / 921_600 = 1.09 µs. 8N1 has a total of 10 bits per
+        // symbol (start bit, 8 data bits, stop bit), so one symbol takes round about 10 * 1.09 =
+        // 10.9 µs, or 10_900 ns. Round it up to 12_000 ns to be on the safe side.
+        const CHAR_TIME_SAFE: Duration = Duration::from_nanos(12_000);
+
+        // Spin until TX FIFO empty is set.
+        while !self.registers.FR.matches_all(FR::TXFE::SET) {
+            cpu::nop();
+        }
+
+        // After the last character has been queued for transmission, wait for the time of one
+        // character + some extra time for safety.
+        time::time_manager().spin_for(CHAR_TIME_SAFE);
+    }
+
+    /// Retrieve a character.
+    fn read_char_converting(&mut self, blocking_mode: BlockingMode) -> Option<char> {
+        // If RX FIFO is empty,
+        if self.registers.FR.matches_all(FR::RXFE::SET) {
+            // immediately return in non-blocking mode.
+            if blocking_mode == BlockingMode::NonBlocking {
+                return None;
+            }
+
+            // Otherwise, wait until a char was received.
+            while self.registers.FR.matches_all(FR::RXFE::SET) {
+                cpu::nop();
+            }
+        }
+
+        // Read one character.
+        let mut ret = self.registers.DR.get() as u8 as char;
+
+        // Convert carrige return to newline.
+        if ret == '\r' {
+            ret = '\n'
+        }
+
+        // Update statistics.
+        self.chars_read += 1;
+
+        Some(ret)
+    }
 }
 
 /// Implementing `core::fmt::Write` enables usage of the `format_args!` macros, which in turn are
@@ -231,6 +303,8 @@ impl fmt::Write for PL011UartInner {
 }
 
 impl PL011Uart {
+    /// Create an instance.
+    ///
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
@@ -273,44 +347,23 @@ impl console::interface::Write for PL011Uart {
 
     fn flush(&self) {
         // Spin until TX FIFO empty is set.
-        self.inner.lock(|inner| {
-            while !inner.registers.FR.matches_all(FR::TXFE::SET) {
-                cpu::nop();
-            }
-        });
+        self.inner.lock(|inner| inner.flush());
     }
 }
 
 impl console::interface::Read for PL011Uart {
     fn read_char(&self) -> char {
-        self.inner.lock(|inner| {
-            // Spin while RX FIFO empty is set.
-            while inner.registers.FR.matches_all(FR::RXFE::SET) {
-                cpu::nop();
-            }
-
-            // Read one character.
-            let mut ret = inner.registers.DR.get() as u8 as char;
-
-            // Convert carrige return to newline.
-            if ret == '\r' {
-                ret = '\n'
-            }
-
-            // Update statistics.
-            inner.chars_read += 1;
-
-            ret
-        })
+        self.inner
+            .lock(|inner| inner.read_char_converting(BlockingMode::Blocking).unwrap())
     }
 
-    fn clear(&self) {
-        self.inner.lock(|inner| {
-            // Read from the RX FIFO until it is indicating empty.
-            while !inner.registers.FR.matches_all(FR::RXFE::SET) {
-                inner.registers.DR.get();
-            }
-        })
+    fn clear_rx(&self) {
+        // Read from the RX FIFO until it is indicating empty.
+        while self
+            .inner
+            .lock(|inner| inner.read_char_converting(BlockingMode::NonBlocking))
+            .is_some()
+        {}
     }
 }
 
diff --git a/09_hw_debug_JTAG/src/console.rs b/09_hw_debug_JTAG/src/console.rs
index 2d38cc1d1..3552823cc 100644
--- a/09_hw_debug_JTAG/src/console.rs
+++ b/09_hw_debug_JTAG/src/console.rs
@@ -20,8 +20,8 @@ pub mod interface {
         /// Write a Rust format string.
         fn write_fmt(&self, args: fmt::Arguments) -> fmt::Result;
 
-        /// Block execution until the last character has been physically put on the TX wire
-        /// (draining TX buffers/FIFOs, if any).
+        /// Block execution until the last buffered character has been physically put on the TX
+        /// wire.
         fn flush(&self);
     }
 
@@ -33,7 +33,7 @@ pub mod interface {
         }
 
         /// Clear RX buffers, if any.
-        fn clear(&self);
+        fn clear_rx(&self);
     }
 
     /// Console statistics.
diff --git a/10_privilege_level/README.md b/10_privilege_level/README.md
index 3ffa1bbe4..8cd313810 100644
--- a/10_privilege_level/README.md
+++ b/10_privilege_level/README.md
@@ -464,10 +464,11 @@ diff -uNr 09_hw_debug_JTAG/src/main.rs 10_privilege_level/src/main.rs
  mod memory;
  mod panic_wait;
  mod print;
-@@ -146,12 +147,19 @@
+@@ -146,12 +147,20 @@
 
  /// The main function running after the early init.
  fn kernel_main() -> ! {
++    use bsp::console::console;
 +    use console::interface::All;
      use core::time::Duration;
      use driver::interface::DriverManager;
@@ -484,7 +485,7 @@ diff -uNr 09_hw_debug_JTAG/src/main.rs 10_privilege_level/src/main.rs
      info!(
          "Architectural timer resolution: {} ns",
          time::time_manager().resolution().as_nanos()
-@@ -166,11 +174,12 @@
+@@ -166,11 +175,15 @@
          info!("      {}. {}", i + 1, driver.compatible());
      }
 
@@ -492,8 +493,11 @@ diff -uNr 09_hw_debug_JTAG/src/main.rs 10_privilege_level/src/main.rs
 -    time::time_manager().spin_for(Duration::from_nanos(1));
 +    info!("Timer test, spinning for 1 second");
 +    time::time_manager().spin_for(Duration::from_secs(1));
-
++
 +    info!("Echoing input now");
+
++    // Discard any spurious received characters before going into echo mode.
++    console().clear_rx();
      loop {
 -        info!("Spinning for 1 second");
 -        time::time_manager().spin_for(Duration::from_secs(1));
diff --git a/10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 46cceff92..876aa461d 100644
--- a/10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -136,6 +136,12 @@ register_structs! {
 /// Abstraction for the associated MMIO registers.
 type Registers = MMIODerefWrapper<RegisterBlock>;
 
+#[derive(PartialEq)]
+enum BlockingMode {
+    Blocking,
+    NonBlocking,
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -174,24 +180,41 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
+    /// This results in 8N1 and 921_600 baud.
     ///
-    /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
-    /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
+    /// The calculation for the BRD is (we set the clock to 48 MHz in config.txt):
+    /// `(48_000_000 / 16) / 921_600 = 3.2552083`. `3` goes to the `IBRD` (integer field).
     ///
-    /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
-    /// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
-    /// now at 0.01 %.
+    /// The `FBRD` (fractional field) is only 6 bits so `0.2552083 * 64 = 16.3 rounded to 16` will
+    /// give the best approximation we can get. A 5% error margin is acceptable for UART and we're
+    /// now at 0.02%.
     pub fn init(&mut self) {
-        // Turn it off temporarily.
+        // Execution can arrive here while there are still characters queued in the TX FIFO and
+        // actively being sent out by the UART hardware. If the UART is turned off in this case,
+        // those queued characters would be lost.
+        //
+        // For example, this can happen during runtime on a call to panic!(), because panic!()
+        // initializes its own UART instance and calls init().
+        //
+        // Hence, flush first to ensure all pending characters are transmitted.
+        self.flush();
+
+        // Turn the UART off temporarily.
         self.registers.CR.set(0);
 
+        // Clear all pending interrupts.
         self.registers.ICR.write(ICR::ALL::CLEAR);
-        self.registers.IBRD.write(IBRD::IBRD.val(5));
-        self.registers.FBRD.write(FBRD::FBRD.val(13));
+
+        // Set the baud rate.
+        self.registers.IBRD.write(IBRD::IBRD.val(3));
+        self.registers.FBRD.write(FBRD::FBRD.val(16));
+
+        // Set 8N1 + FIFO on.
         self.registers
             .LCRH
-            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
+            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled);
+
+        // Turn the UART on.
         self.registers
             .CR
             .write(CR::UARTEN::Enabled + CR::TXE::Enabled + CR::RXE::Enabled);
@@ -209,6 +232,55 @@ impl PL011UartInner {
 
         self.chars_written += 1;
     }
+
+    /// Block execution until the last buffered character has been physically put on the TX wire.
+    fn flush(&self) {
+        use crate::{time, time::interface::TimeManager};
+        use core::time::Duration;
+
+        // The bit time for 921_600 baud is 1 / 921_600 = 1.09 µs. 8N1 has a total of 10 bits per
+        // symbol (start bit, 8 data bits, stop bit), so one symbol takes round about 10 * 1.09 =
+        // 10.9 µs, or 10_900 ns. Round it up to 12_000 ns to be on the safe side.
+        const CHAR_TIME_SAFE: Duration = Duration::from_nanos(12_000);
+
+        // Spin until TX FIFO empty is set.
+        while !self.registers.FR.matches_all(FR::TXFE::SET) {
+            cpu::nop();
+        }
+
+        // After the last character has been queued for transmission, wait for the time of one
+        // character + some extra time for safety.
+        time::time_manager().spin_for(CHAR_TIME_SAFE);
+    }
+
+    /// Retrieve a character.
+    fn read_char_converting(&mut self, blocking_mode: BlockingMode) -> Option<char> {
+        // If RX FIFO is empty,
+        if self.registers.FR.matches_all(FR::RXFE::SET) {
+            // immediately return in non-blocking mode.
+            if blocking_mode == BlockingMode::NonBlocking {
+                return None;
+            }
+
+            // Otherwise, wait until a char was received.
+            while self.registers.FR.matches_all(FR::RXFE::SET) {
+                cpu::nop();
+            }
+        }
+
+        // Read one character.
+        let mut ret = self.registers.DR.get() as u8 as char;
+
+        // Convert carrige return to newline.
+        if ret == '\r' {
+            ret = '\n'
+        }
+
+        // Update statistics.
+        self.chars_read += 1;
+
+        Some(ret)
+    }
 }
 
 /// Implementing `core::fmt::Write` enables usage of the `format_args!` macros, which in turn are
@@ -231,6 +303,8 @@ impl fmt::Write for PL011UartInner {
 }
 
 impl PL011Uart {
+    /// Create an instance.
+    ///
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
@@ -273,44 +347,23 @@ impl console::interface::Write for PL011Uart {
 
     fn flush(&self) {
         // Spin until TX FIFO empty is set.
-        self.inner.lock(|inner| {
-            while !inner.registers.FR.matches_all(FR::TXFE::SET) {
-                cpu::nop();
-            }
-        });
+        self.inner.lock(|inner| inner.flush());
     }
 }
 
 impl console::interface::Read for PL011Uart {
     fn read_char(&self) -> char {
-        self.inner.lock(|inner| {
-            // Spin while RX FIFO empty is set.
-            while inner.registers.FR.matches_all(FR::RXFE::SET) {
-                cpu::nop();
-            }
-
-            // Read one character.
-            let mut ret = inner.registers.DR.get() as u8 as char;
-
-            // Convert carrige return to newline.
-            if ret == '\r' {
-                ret = '\n'
-            }
-
-            // Update statistics.
-            inner.chars_read += 1;
-
-            ret
-        })
+        self.inner
+            .lock(|inner| inner.read_char_converting(BlockingMode::Blocking).unwrap())
     }
 
-    fn clear(&self) {
-        self.inner.lock(|inner| {
-            // Read from the RX FIFO until it is indicating empty.
-            while !inner.registers.FR.matches_all(FR::RXFE::SET) {
-                inner.registers.DR.get();
-            }
-        })
+    fn clear_rx(&self) {
+        // Read from the RX FIFO until it is indicating empty.
+        while self
+            .inner
+            .lock(|inner| inner.read_char_converting(BlockingMode::NonBlocking))
+            .is_some()
+        {}
     }
 }
 
diff --git a/10_privilege_level/src/console.rs b/10_privilege_level/src/console.rs
index 2d38cc1d1..3552823cc 100644
--- a/10_privilege_level/src/console.rs
+++ b/10_privilege_level/src/console.rs
@@ -20,8 +20,8 @@ pub mod interface {
         /// Write a Rust format string.
         fn write_fmt(&self, args: fmt::Arguments) -> fmt::Result;
 
-        /// Block execution until the last character has been physically put on the TX wire
-        /// (draining TX buffers/FIFOs, if any).
+        /// Block execution until the last buffered character has been physically put on the TX
+        /// wire.
         fn flush(&self);
     }
 
@@ -33,7 +33,7 @@ pub mod interface {
         }
 
         /// Clear RX buffers, if any.
-        fn clear(&self);
+        fn clear_rx(&self);
     }
 
     /// Console statistics.
diff --git a/10_privilege_level/src/main.rs b/10_privilege_level/src/main.rs
index 0c730ff96..fc2bd6912 100644
--- a/10_privilege_level/src/main.rs
+++ b/10_privilege_level/src/main.rs
@@ -147,6 +147,7 @@ unsafe fn kernel_init() -> ! {
 
 /// The main function running after the early init.
 fn kernel_main() -> ! {
+    use bsp::console::console;
     use console::interface::All;
     use core::time::Duration;
     use driver::interface::DriverManager;
@@ -178,6 +179,9 @@ fn kernel_main() -> ! {
     time::time_manager().spin_for(Duration::from_secs(1));
 
     info!("Echoing input now");
+
+    // Discard any spurious received characters before going into echo mode.
+    console().clear_rx();
     loop {
         let c = bsp::console::console().read_char();
         bsp::console::console().write_char(c);
diff --git a/11_virtual_mem_part1_identity_mapping/README.md b/11_virtual_mem_part1_identity_mapping/README.md
index 6216fd65e..c64442967 100644
--- a/11_virtual_mem_part1_identity_mapping/README.md
+++ b/11_virtual_mem_part1_identity_mapping/README.md
@@ -914,7 +914,7 @@ diff -uNr 10_privilege_level/src/main.rs 11_virtual_mem_part1_identity_mapping/s
 
      for i in bsp::driver::driver_manager().all_device_drivers().iter() {
          if let Err(x) = i.init() {
-@@ -154,6 +168,9 @@
+@@ -155,6 +169,9 @@
 
      info!("Booting on: {}", bsp::board_name());
 
@@ -924,7 +924,7 @@ diff -uNr 10_privilege_level/src/main.rs 11_virtual_mem_part1_identity_mapping/s
      let (_, privilege_level) = exception::current_privilege_level();
      info!("Current privilege level: {}", privilege_level);
 
-@@ -177,6 +194,13 @@
+@@ -178,6 +195,13 @@
      info!("Timer test, spinning for 1 second");
      time::time_manager().spin_for(Duration::from_secs(1));
 
@@ -936,8 +936,8 @@ diff -uNr 10_privilege_level/src/main.rs 11_virtual_mem_part1_identity_mapping/s
 +    .unwrap();
 +
      info!("Echoing input now");
-     loop {
-         let c = bsp::console::console().read_char();
+
+     // Discard any spurious received characters before going into echo mode.
 
 diff -uNr 10_privilege_level/src/memory/mmu.rs 11_virtual_mem_part1_identity_mapping/src/memory/mmu.rs
 --- 10_privilege_level/src/memory/mmu.rs
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 46cceff92..876aa461d 100644
--- a/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -136,6 +136,12 @@ register_structs! {
 /// Abstraction for the associated MMIO registers.
 type Registers = MMIODerefWrapper<RegisterBlock>;
 
+#[derive(PartialEq)]
+enum BlockingMode {
+    Blocking,
+    NonBlocking,
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -174,24 +180,41 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
+    /// This results in 8N1 and 921_600 baud.
     ///
-    /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
-    /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
+    /// The calculation for the BRD is (we set the clock to 48 MHz in config.txt):
+    /// `(48_000_000 / 16) / 921_600 = 3.2552083`. `3` goes to the `IBRD` (integer field).
     ///
-    /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
-    /// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
-    /// now at 0.01 %.
+    /// The `FBRD` (fractional field) is only 6 bits so `0.2552083 * 64 = 16.3 rounded to 16` will
+    /// give the best approximation we can get. A 5% error margin is acceptable for UART and we're
+    /// now at 0.02%.
     pub fn init(&mut self) {
-        // Turn it off temporarily.
+        // Execution can arrive here while there are still characters queued in the TX FIFO and
+        // actively being sent out by the UART hardware. If the UART is turned off in this case,
+        // those queued characters would be lost.
+        //
+        // For example, this can happen during runtime on a call to panic!(), because panic!()
+        // initializes its own UART instance and calls init().
+        //
+        // Hence, flush first to ensure all pending characters are transmitted.
+        self.flush();
+
+        // Turn the UART off temporarily.
         self.registers.CR.set(0);
 
+        // Clear all pending interrupts.
         self.registers.ICR.write(ICR::ALL::CLEAR);
-        self.registers.IBRD.write(IBRD::IBRD.val(5));
-        self.registers.FBRD.write(FBRD::FBRD.val(13));
+
+        // Set the baud rate.
+        self.registers.IBRD.write(IBRD::IBRD.val(3));
+        self.registers.FBRD.write(FBRD::FBRD.val(16));
+
+        // Set 8N1 + FIFO on.
         self.registers
             .LCRH
-            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
+            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled);
+
+        // Turn the UART on.
         self.registers
             .CR
             .write(CR::UARTEN::Enabled + CR::TXE::Enabled + CR::RXE::Enabled);
@@ -209,6 +232,55 @@ impl PL011UartInner {
 
         self.chars_written += 1;
     }
+
+    /// Block execution until the last buffered character has been physically put on the TX wire.
+    fn flush(&self) {
+        use crate::{time, time::interface::TimeManager};
+        use core::time::Duration;
+
+        // The bit time for 921_600 baud is 1 / 921_600 = 1.09 µs. 8N1 has a total of 10 bits per
+        // symbol (start bit, 8 data bits, stop bit), so one symbol takes round about 10 * 1.09 =
+        // 10.9 µs, or 10_900 ns. Round it up to 12_000 ns to be on the safe side.
+        const CHAR_TIME_SAFE: Duration = Duration::from_nanos(12_000);
+
+        // Spin until TX FIFO empty is set.
+        while !self.registers.FR.matches_all(FR::TXFE::SET) {
+            cpu::nop();
+        }
+
+        // After the last character has been queued for transmission, wait for the time of one
+        // character + some extra time for safety.
+        time::time_manager().spin_for(CHAR_TIME_SAFE);
+    }
+
+    /// Retrieve a character.
+    fn read_char_converting(&mut self, blocking_mode: BlockingMode) -> Option<char> {
+        // If RX FIFO is empty,
+        if self.registers.FR.matches_all(FR::RXFE::SET) {
+            // immediately return in non-blocking mode.
+            if blocking_mode == BlockingMode::NonBlocking {
+                return None;
+            }
+
+            // Otherwise, wait until a char was received.
+            while self.registers.FR.matches_all(FR::RXFE::SET) {
+                cpu::nop();
+            }
+        }
+
+        // Read one character.
+        let mut ret = self.registers.DR.get() as u8 as char;
+
+        // Convert carrige return to newline.
+        if ret == '\r' {
+            ret = '\n'
+        }
+
+        // Update statistics.
+        self.chars_read += 1;
+
+        Some(ret)
+    }
 }
 
 /// Implementing `core::fmt::Write` enables usage of the `format_args!` macros, which in turn are
@@ -231,6 +303,8 @@ impl fmt::Write for PL011UartInner {
 }
 
 impl PL011Uart {
+    /// Create an instance.
+    ///
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
@@ -273,44 +347,23 @@ impl console::interface::Write for PL011Uart {
 
     fn flush(&self) {
         // Spin until TX FIFO empty is set.
-        self.inner.lock(|inner| {
-            while !inner.registers.FR.matches_all(FR::TXFE::SET) {
-                cpu::nop();
-            }
-        });
+        self.inner.lock(|inner| inner.flush());
     }
 }
 
 impl console::interface::Read for PL011Uart {
     fn read_char(&self) -> char {
-        self.inner.lock(|inner| {
-            // Spin while RX FIFO empty is set.
-            while inner.registers.FR.matches_all(FR::RXFE::SET) {
-                cpu::nop();
-            }
-
-            // Read one character.
-            let mut ret = inner.registers.DR.get() as u8 as char;
-
-            // Convert carrige return to newline.
-            if ret == '\r' {
-                ret = '\n'
-            }
-
-            // Update statistics.
-            inner.chars_read += 1;
-
-            ret
-        })
+        self.inner
+            .lock(|inner| inner.read_char_converting(BlockingMode::Blocking).unwrap())
     }
 
-    fn clear(&self) {
-        self.inner.lock(|inner| {
-            // Read from the RX FIFO until it is indicating empty.
-            while !inner.registers.FR.matches_all(FR::RXFE::SET) {
-                inner.registers.DR.get();
-            }
-        })
+    fn clear_rx(&self) {
+        // Read from the RX FIFO until it is indicating empty.
+        while self
+            .inner
+            .lock(|inner| inner.read_char_converting(BlockingMode::NonBlocking))
+            .is_some()
+        {}
     }
 }
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/console.rs b/11_virtual_mem_part1_identity_mapping/src/console.rs
index 2d38cc1d1..3552823cc 100644
--- a/11_virtual_mem_part1_identity_mapping/src/console.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/console.rs
@@ -20,8 +20,8 @@ pub mod interface {
         /// Write a Rust format string.
         fn write_fmt(&self, args: fmt::Arguments) -> fmt::Result;
 
-        /// Block execution until the last character has been physically put on the TX wire
-        /// (draining TX buffers/FIFOs, if any).
+        /// Block execution until the last buffered character has been physically put on the TX
+        /// wire.
         fn flush(&self);
     }
 
@@ -33,7 +33,7 @@ pub mod interface {
         }
 
         /// Clear RX buffers, if any.
-        fn clear(&self);
+        fn clear_rx(&self);
     }
 
     /// Console statistics.
diff --git a/11_virtual_mem_part1_identity_mapping/src/main.rs b/11_virtual_mem_part1_identity_mapping/src/main.rs
index 41ca22e33..259715354 100644
--- a/11_virtual_mem_part1_identity_mapping/src/main.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/main.rs
@@ -161,6 +161,7 @@ unsafe fn kernel_init() -> ! {
 
 /// The main function running after the early init.
 fn kernel_main() -> ! {
+    use bsp::console::console;
     use console::interface::All;
     use core::time::Duration;
     use driver::interface::DriverManager;
@@ -202,6 +203,9 @@ fn kernel_main() -> ! {
     .unwrap();
 
     info!("Echoing input now");
+
+    // Discard any spurious received characters before going into echo mode.
+    console().clear_rx();
     loop {
         let c = bsp::console::console().read_char();
         bsp::console::console().write_char(c);
diff --git a/12_exceptions_part1_groundwork/README.md b/12_exceptions_part1_groundwork/README.md
index c6264088f..be16673f5 100644
--- a/12_exceptions_part1_groundwork/README.md
+++ b/12_exceptions_part1_groundwork/README.md
@@ -973,7 +973,7 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/main.rs 12_exceptions_part1_
      if let Err(string) = memory::mmu::mmu().init() {
          panic!("MMU: {}", string);
      }
-@@ -194,13 +197,28 @@
+@@ -195,13 +198,28 @@
      info!("Timer test, spinning for 1 second");
      time::time_manager().spin_for(Duration::from_secs(1));
 
@@ -1006,8 +1006,8 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/main.rs 12_exceptions_part1_
 
 +    // Will never reach here in this tutorial.
      info!("Echoing input now");
-     loop {
-         let c = bsp::console::console().read_char();
+
+     // Discard any spurious received characters before going into echo mode.
 
 diff -uNr 11_virtual_mem_part1_identity_mapping/src/memory/mmu.rs 12_exceptions_part1_groundwork/src/memory/mmu.rs
 --- 11_virtual_mem_part1_identity_mapping/src/memory/mmu.rs
diff --git a/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 46cceff92..876aa461d 100644
--- a/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -136,6 +136,12 @@ register_structs! {
 /// Abstraction for the associated MMIO registers.
 type Registers = MMIODerefWrapper<RegisterBlock>;
 
+#[derive(PartialEq)]
+enum BlockingMode {
+    Blocking,
+    NonBlocking,
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -174,24 +180,41 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
+    /// This results in 8N1 and 921_600 baud.
     ///
-    /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
-    /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
+    /// The calculation for the BRD is (we set the clock to 48 MHz in config.txt):
+    /// `(48_000_000 / 16) / 921_600 = 3.2552083`. `3` goes to the `IBRD` (integer field).
     ///
-    /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
-    /// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
-    /// now at 0.01 %.
+    /// The `FBRD` (fractional field) is only 6 bits so `0.2552083 * 64 = 16.3 rounded to 16` will
+    /// give the best approximation we can get. A 5% error margin is acceptable for UART and we're
+    /// now at 0.02%.
     pub fn init(&mut self) {
-        // Turn it off temporarily.
+        // Execution can arrive here while there are still characters queued in the TX FIFO and
+        // actively being sent out by the UART hardware. If the UART is turned off in this case,
+        // those queued characters would be lost.
+        //
+        // For example, this can happen during runtime on a call to panic!(), because panic!()
+        // initializes its own UART instance and calls init().
+        //
+        // Hence, flush first to ensure all pending characters are transmitted.
+        self.flush();
+
+        // Turn the UART off temporarily.
         self.registers.CR.set(0);
 
+        // Clear all pending interrupts.
         self.registers.ICR.write(ICR::ALL::CLEAR);
-        self.registers.IBRD.write(IBRD::IBRD.val(5));
-        self.registers.FBRD.write(FBRD::FBRD.val(13));
+
+        // Set the baud rate.
+        self.registers.IBRD.write(IBRD::IBRD.val(3));
+        self.registers.FBRD.write(FBRD::FBRD.val(16));
+
+        // Set 8N1 + FIFO on.
         self.registers
             .LCRH
-            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
+            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled);
+
+        // Turn the UART on.
         self.registers
             .CR
             .write(CR::UARTEN::Enabled + CR::TXE::Enabled + CR::RXE::Enabled);
@@ -209,6 +232,55 @@ impl PL011UartInner {
 
         self.chars_written += 1;
     }
+
+    /// Block execution until the last buffered character has been physically put on the TX wire.
+    fn flush(&self) {
+        use crate::{time, time::interface::TimeManager};
+        use core::time::Duration;
+
+        // The bit time for 921_600 baud is 1 / 921_600 = 1.09 µs. 8N1 has a total of 10 bits per
+        // symbol (start bit, 8 data bits, stop bit), so one symbol takes round about 10 * 1.09 =
+        // 10.9 µs, or 10_900 ns. Round it up to 12_000 ns to be on the safe side.
+        const CHAR_TIME_SAFE: Duration = Duration::from_nanos(12_000);
+
+        // Spin until TX FIFO empty is set.
+        while !self.registers.FR.matches_all(FR::TXFE::SET) {
+            cpu::nop();
+        }
+
+        // After the last character has been queued for transmission, wait for the time of one
+        // character + some extra time for safety.
+        time::time_manager().spin_for(CHAR_TIME_SAFE);
+    }
+
+    /// Retrieve a character.
+    fn read_char_converting(&mut self, blocking_mode: BlockingMode) -> Option<char> {
+        // If RX FIFO is empty,
+        if self.registers.FR.matches_all(FR::RXFE::SET) {
+            // immediately return in non-blocking mode.
+            if blocking_mode == BlockingMode::NonBlocking {
+                return None;
+            }
+
+            // Otherwise, wait until a char was received.
+            while self.registers.FR.matches_all(FR::RXFE::SET) {
+                cpu::nop();
+            }
+        }
+
+        // Read one character.
+        let mut ret = self.registers.DR.get() as u8 as char;
+
+        // Convert carrige return to newline.
+        if ret == '\r' {
+            ret = '\n'
+        }
+
+        // Update statistics.
+        self.chars_read += 1;
+
+        Some(ret)
+    }
 }
 
 /// Implementing `core::fmt::Write` enables usage of the `format_args!` macros, which in turn are
@@ -231,6 +303,8 @@ impl fmt::Write for PL011UartInner {
 }
 
 impl PL011Uart {
+    /// Create an instance.
+    ///
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
@@ -273,44 +347,23 @@ impl console::interface::Write for PL011Uart {
 
     fn flush(&self) {
         // Spin until TX FIFO empty is set.
-        self.inner.lock(|inner| {
-            while !inner.registers.FR.matches_all(FR::TXFE::SET) {
-                cpu::nop();
-            }
-        });
+        self.inner.lock(|inner| inner.flush());
     }
 }
 
 impl console::interface::Read for PL011Uart {
     fn read_char(&self) -> char {
-        self.inner.lock(|inner| {
-            // Spin while RX FIFO empty is set.
-            while inner.registers.FR.matches_all(FR::RXFE::SET) {
-                cpu::nop();
-            }
-
-            // Read one character.
-            let mut ret = inner.registers.DR.get() as u8 as char;
-
-            // Convert carrige return to newline.
-            if ret == '\r' {
-                ret = '\n'
-            }
-
-            // Update statistics.
-            inner.chars_read += 1;
-
-            ret
-        })
+        self.inner
+            .lock(|inner| inner.read_char_converting(BlockingMode::Blocking).unwrap())
     }
 
-    fn clear(&self) {
-        self.inner.lock(|inner| {
-            // Read from the RX FIFO until it is indicating empty.
-            while !inner.registers.FR.matches_all(FR::RXFE::SET) {
-                inner.registers.DR.get();
-            }
-        })
+    fn clear_rx(&self) {
+        // Read from the RX FIFO until it is indicating empty.
+        while self
+            .inner
+            .lock(|inner| inner.read_char_converting(BlockingMode::NonBlocking))
+            .is_some()
+        {}
     }
 }
 
diff --git a/12_exceptions_part1_groundwork/src/console.rs b/12_exceptions_part1_groundwork/src/console.rs
index 2d38cc1d1..3552823cc 100644
--- a/12_exceptions_part1_groundwork/src/console.rs
+++ b/12_exceptions_part1_groundwork/src/console.rs
@@ -20,8 +20,8 @@ pub mod interface {
         /// Write a Rust format string.
         fn write_fmt(&self, args: fmt::Arguments) -> fmt::Result;
 
-        /// Block execution until the last character has been physically put on the TX wire
-        /// (draining TX buffers/FIFOs, if any).
+        /// Block execution until the last buffered character has been physically put on the TX
+        /// wire.
         fn flush(&self);
     }
 
@@ -33,7 +33,7 @@ pub mod interface {
         }
 
         /// Clear RX buffers, if any.
-        fn clear(&self);
+        fn clear_rx(&self);
     }
 
     /// Console statistics.
diff --git a/12_exceptions_part1_groundwork/src/main.rs b/12_exceptions_part1_groundwork/src/main.rs
index 495840e87..a2cf77527 100644
--- a/12_exceptions_part1_groundwork/src/main.rs
+++ b/12_exceptions_part1_groundwork/src/main.rs
@@ -164,6 +164,7 @@ unsafe fn kernel_init() -> ! {
 
 /// The main function running after the early init.
 fn kernel_main() -> ! {
+    use bsp::console::console;
     use console::interface::All;
     use core::time::Duration;
     use driver::interface::DriverManager;
@@ -220,6 +221,9 @@ fn kernel_main() -> ! {
 
     // Will never reach here in this tutorial.
     info!("Echoing input now");
+
+    // Discard any spurious received characters before going into echo mode.
+    console().clear_rx();
     loop {
         let c = bsp::console::console().read_char();
         bsp::console::console().write_char(c);
diff --git a/13_integrated_testing/README.md b/13_integrated_testing/README.md
index a282e6593..849cbbfb2 100644
--- a/13_integrated_testing/README.md
+++ b/13_integrated_testing/README.md
@@ -1444,9 +1444,9 @@ diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/m
  unsafe fn kernel_init() -> ! {
      use driver::interface::DriverManager;
      use memory::mmu::interface::MMU;
-@@ -165,9 +49,7 @@
- /// The main function running after the early init.
+@@ -166,9 +50,7 @@
  fn kernel_main() -> ! {
+     use bsp::console::console;
      use console::interface::All;
 -    use core::time::Duration;
      use driver::interface::DriverManager;
@@ -1454,7 +1454,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/m
 
      info!("Booting on: {}", bsp::board_name());
 
-@@ -194,31 +76,6 @@
+@@ -195,31 +77,6 @@
          info!("      {}. {}", i + 1, driver.compatible());
      }
 
@@ -1484,8 +1484,8 @@ diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/m
 -
 -    // Will never reach here in this tutorial.
      info!("Echoing input now");
-     loop {
-         let c = bsp::console::console().read_char();
+
+     // Discard any spurious received characters before going into echo mode.
 
 diff -uNr 12_exceptions_part1_groundwork/src/memory/mmu.rs 13_integrated_testing/src/memory/mmu.rs
 --- 12_exceptions_part1_groundwork/src/memory/mmu.rs
diff --git a/13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 46cceff92..876aa461d 100644
--- a/13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -136,6 +136,12 @@ register_structs! {
 /// Abstraction for the associated MMIO registers.
 type Registers = MMIODerefWrapper<RegisterBlock>;
 
+#[derive(PartialEq)]
+enum BlockingMode {
+    Blocking,
+    NonBlocking,
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -174,24 +180,41 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
+    /// This results in 8N1 and 921_600 baud.
     ///
-    /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
-    /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
+    /// The calculation for the BRD is (we set the clock to 48 MHz in config.txt):
+    /// `(48_000_000 / 16) / 921_600 = 3.2552083`. `3` goes to the `IBRD` (integer field).
     ///
-    /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
-    /// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
-    /// now at 0.01 %.
+    /// The `FBRD` (fractional field) is only 6 bits so `0.2552083 * 64 = 16.3 rounded to 16` will
+    /// give the best approximation we can get. A 5% error margin is acceptable for UART and we're
+    /// now at 0.02%.
     pub fn init(&mut self) {
-        // Turn it off temporarily.
+        // Execution can arrive here while there are still characters queued in the TX FIFO and
+        // actively being sent out by the UART hardware. If the UART is turned off in this case,
+        // those queued characters would be lost.
+        //
+        // For example, this can happen during runtime on a call to panic!(), because panic!()
+        // initializes its own UART instance and calls init().
+        //
+        // Hence, flush first to ensure all pending characters are transmitted.
+        self.flush();
+
+        // Turn the UART off temporarily.
         self.registers.CR.set(0);
 
+        // Clear all pending interrupts.
         self.registers.ICR.write(ICR::ALL::CLEAR);
-        self.registers.IBRD.write(IBRD::IBRD.val(5));
-        self.registers.FBRD.write(FBRD::FBRD.val(13));
+
+        // Set the baud rate.
+        self.registers.IBRD.write(IBRD::IBRD.val(3));
+        self.registers.FBRD.write(FBRD::FBRD.val(16));
+
+        // Set 8N1 + FIFO on.
         self.registers
             .LCRH
-            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
+            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled);
+
+        // Turn the UART on.
         self.registers
             .CR
             .write(CR::UARTEN::Enabled + CR::TXE::Enabled + CR::RXE::Enabled);
@@ -209,6 +232,55 @@ impl PL011UartInner {
 
         self.chars_written += 1;
     }
+
+    /// Block execution until the last buffered character has been physically put on the TX wire.
+    fn flush(&self) {
+        use crate::{time, time::interface::TimeManager};
+        use core::time::Duration;
+
+        // The bit time for 921_600 baud is 1 / 921_600 = 1.09 µs. 8N1 has a total of 10 bits per
+        // symbol (start bit, 8 data bits, stop bit), so one symbol takes round about 10 * 1.09 =
+        // 10.9 µs, or 10_900 ns. Round it up to 12_000 ns to be on the safe side.
+        const CHAR_TIME_SAFE: Duration = Duration::from_nanos(12_000);
+
+        // Spin until TX FIFO empty is set.
+        while !self.registers.FR.matches_all(FR::TXFE::SET) {
+            cpu::nop();
+        }
+
+        // After the last character has been queued for transmission, wait for the time of one
+        // character + some extra time for safety.
+        time::time_manager().spin_for(CHAR_TIME_SAFE);
+    }
+
+    /// Retrieve a character.
+    fn read_char_converting(&mut self, blocking_mode: BlockingMode) -> Option<char> {
+        // If RX FIFO is empty,
+        if self.registers.FR.matches_all(FR::RXFE::SET) {
+            // immediately return in non-blocking mode.
+            if blocking_mode == BlockingMode::NonBlocking {
+                return None;
+            }
+
+            // Otherwise, wait until a char was received.
+            while self.registers.FR.matches_all(FR::RXFE::SET) {
+                cpu::nop();
+            }
+        }
+
+        // Read one character.
+        let mut ret = self.registers.DR.get() as u8 as char;
+
+        // Convert carrige return to newline.
+        if ret == '\r' {
+            ret = '\n'
+        }
+
+        // Update statistics.
+        self.chars_read += 1;
+
+        Some(ret)
+    }
 }
 
 /// Implementing `core::fmt::Write` enables usage of the `format_args!` macros, which in turn are
@@ -231,6 +303,8 @@ impl fmt::Write for PL011UartInner {
 }
 
 impl PL011Uart {
+    /// Create an instance.
+    ///
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
@@ -273,44 +347,23 @@ impl console::interface::Write for PL011Uart {
 
     fn flush(&self) {
         // Spin until TX FIFO empty is set.
-        self.inner.lock(|inner| {
-            while !inner.registers.FR.matches_all(FR::TXFE::SET) {
-                cpu::nop();
-            }
-        });
+        self.inner.lock(|inner| inner.flush());
     }
 }
 
 impl console::interface::Read for PL011Uart {
     fn read_char(&self) -> char {
-        self.inner.lock(|inner| {
-            // Spin while RX FIFO empty is set.
-            while inner.registers.FR.matches_all(FR::RXFE::SET) {
-                cpu::nop();
-            }
-
-            // Read one character.
-            let mut ret = inner.registers.DR.get() as u8 as char;
-
-            // Convert carrige return to newline.
-            if ret == '\r' {
-                ret = '\n'
-            }
-
-            // Update statistics.
-            inner.chars_read += 1;
-
-            ret
-        })
+        self.inner
+            .lock(|inner| inner.read_char_converting(BlockingMode::Blocking).unwrap())
     }
 
-    fn clear(&self) {
-        self.inner.lock(|inner| {
-            // Read from the RX FIFO until it is indicating empty.
-            while !inner.registers.FR.matches_all(FR::RXFE::SET) {
-                inner.registers.DR.get();
-            }
-        })
+    fn clear_rx(&self) {
+        // Read from the RX FIFO until it is indicating empty.
+        while self
+            .inner
+            .lock(|inner| inner.read_char_converting(BlockingMode::NonBlocking))
+            .is_some()
+        {}
     }
 }
 
diff --git a/13_integrated_testing/src/console.rs b/13_integrated_testing/src/console.rs
index 2d38cc1d1..3552823cc 100644
--- a/13_integrated_testing/src/console.rs
+++ b/13_integrated_testing/src/console.rs
@@ -20,8 +20,8 @@ pub mod interface {
         /// Write a Rust format string.
         fn write_fmt(&self, args: fmt::Arguments) -> fmt::Result;
 
-        /// Block execution until the last character has been physically put on the TX wire
-        /// (draining TX buffers/FIFOs, if any).
+        /// Block execution until the last buffered character has been physically put on the TX
+        /// wire.
         fn flush(&self);
     }
 
@@ -33,7 +33,7 @@ pub mod interface {
         }
 
         /// Clear RX buffers, if any.
-        fn clear(&self);
+        fn clear_rx(&self);
     }
 
     /// Console statistics.
diff --git a/13_integrated_testing/src/main.rs b/13_integrated_testing/src/main.rs
index 989bd045c..769f9e8f0 100644
--- a/13_integrated_testing/src/main.rs
+++ b/13_integrated_testing/src/main.rs
@@ -48,6 +48,7 @@ unsafe fn kernel_init() -> ! {
 
 /// The main function running after the early init.
 fn kernel_main() -> ! {
+    use bsp::console::console;
     use console::interface::All;
     use driver::interface::DriverManager;
 
@@ -77,6 +78,9 @@ fn kernel_main() -> ! {
     }
 
     info!("Echoing input now");
+
+    // Discard any spurious received characters before going into echo mode.
+    console().clear_rx();
     loop {
         let c = bsp::console::console().read_char();
         bsp::console::console().write_char(c);
diff --git a/14_exceptions_part2_peripheral_IRQs/README.md b/14_exceptions_part2_peripheral_IRQs/README.md
index dc18b75f4..8e68edcb8 100644
--- a/14_exceptions_part2_peripheral_IRQs/README.md
+++ b/14_exceptions_part2_peripheral_IRQs/README.md
@@ -1862,20 +1862,7 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
          (0x44 => ICR: WriteOnly<u32, ICR::Register>),
          (0x48 => @END),
      }
-@@ -136,6 +181,12 @@
- /// Abstraction for the associated MMIO registers.
- type Registers = MMIODerefWrapper<RegisterBlock>;
-
-+#[derive(PartialEq)]
-+enum BlockingMode {
-+    Blocking,
-+    NonBlocking,
-+}
-+
- //--------------------------------------------------------------------------------------------------
- // Public Definitions
- //--------------------------------------------------------------------------------------------------
-@@ -151,7 +202,8 @@
+@@ -157,7 +202,8 @@
 
  /// Representation of the UART.
  pub struct PL011Uart {
@@ -1885,59 +1872,22 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -192,6 +244,10 @@
-         self.registers
+@@ -214,6 +260,14 @@
              .LCRH
-             .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
-+        self.registers.IFLS.write(IFLS::RXIFLSEL::OneEigth); // RX FIFO fill level at 1/8
+             .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled);
+
++        // Set RX FIFO fill level at 1/8.
++        self.registers.IFLS.write(IFLS::RXIFLSEL::OneEigth);
++
++        // Enable RX IRQ + RX timeout IRQ.
 +        self.registers
 +            .IMSC
-+            .write(IMSC::RXIM::Enabled + IMSC::RTIM::Enabled); // RX IRQ + RX timeout IRQ
++            .write(IMSC::RXIM::Enabled + IMSC::RTIM::Enabled);
++
+         // Turn the UART on.
          self.registers
              .CR
-             .write(CR::UARTEN::Enabled + CR::TXE::Enabled + CR::RXE::Enabled);
-@@ -209,6 +265,35 @@
-
-         self.chars_written += 1;
-     }
-+
-+    /// Retrieve a character.
-+    fn read_char_converting(&mut self, blocking_mode: BlockingMode) -> Option<char> {
-+        // If RX FIFO is empty,
-+        if self.registers.FR.matches_all(FR::RXFE::SET) {
-+            // immediately return in non-blocking mode.
-+            if blocking_mode == BlockingMode::NonBlocking {
-+                return None;
-+            }
-+
-+            // Otherwise, wait until a char was received.
-+            while self.registers.FR.matches_all(FR::RXFE::SET) {
-+                cpu::nop();
-+            }
-+        }
-+
-+        // Read one character.
-+        let mut ret = self.registers.DR.get() as u8 as char;
-+
-+        // Convert carrige return to newline.
-+        if ret == '\r' {
-+            ret = '\n'
-+        }
-+
-+        // Update statistics.
-+        self.chars_read += 1;
-+
-+        Some(ret)
-+    }
- }
-
- /// Implementing `core::fmt::Write` enables usage of the `format_args!` macros, which in turn are
-@@ -231,12 +316,18 @@
- }
-
- impl PL011Uart {
-+    /// Create an instance.
-+    ///
+@@ -308,9 +362,13 @@
      /// # Safety
      ///
      /// - The user must ensure to provide a correct MMIO start address.
@@ -1953,7 +1903,7 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
          }
      }
  }
-@@ -256,6 +347,21 @@
+@@ -330,6 +388,21 @@
 
          Ok(())
      }
@@ -1975,35 +1925,7 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
  }
 
  impl console::interface::Write for PL011Uart {
-@@ -283,25 +389,8 @@
-
- impl console::interface::Read for PL011Uart {
-     fn read_char(&self) -> char {
--        self.inner.lock(|inner| {
--            // Spin while RX FIFO empty is set.
--            while inner.registers.FR.matches_all(FR::RXFE::SET) {
--                cpu::nop();
--            }
--
--            // Read one character.
--            let mut ret = inner.registers.DR.get() as u8 as char;
--
--            // Convert carrige return to newline.
--            if ret == '\r' {
--                ret = '\n'
--            }
--
--            // Update statistics.
--            inner.chars_read += 1;
--
--            ret
--        })
-+        self.inner
-+            .lock(|inner| inner.read_char_converting(BlockingMode::Blocking).unwrap())
-     }
-
-     fn clear(&self) {
-@@ -323,3 +412,24 @@
+@@ -376,3 +449,24 @@
          self.inner.lock(|inner| inner.chars_read)
      }
  }
@@ -2439,7 +2361,7 @@ diff -uNr 13_integrated_testing/src/main.rs 14_exceptions_part2_peripheral_IRQs/
  #[no_mangle]
  unsafe fn kernel_init() -> ! {
      use driver::interface::DriverManager;
-@@ -42,14 +42,27 @@
+@@ -42,15 +42,27 @@
      bsp::driver::driver_manager().post_device_driver_init();
      // println! is usable from here on.
 
@@ -2462,24 +2384,28 @@ diff -uNr 13_integrated_testing/src/main.rs 14_exceptions_part2_peripheral_IRQs/
 
  /// The main function running after the early init.
  fn kernel_main() -> ! {
+-    use bsp::console::console;
 -    use console::interface::All;
      use driver::interface::DriverManager;
 +    use exception::asynchronous::interface::IRQManager;
 
      info!("Booting on: {}", bsp::board_name());
 
-@@ -76,9 +89,9 @@
+@@ -77,12 +89,9 @@
          info!("      {}. {}", i + 1, driver.compatible());
      }
 
+-    info!("Echoing input now");
 +    info!("Registered IRQ handlers:");
 +    bsp::exception::asynchronous::irq_manager().print_handler();
-+
-     info!("Echoing input now");
+
+-    // Discard any spurious received characters before going into echo mode.
+-    console().clear_rx();
 -    loop {
 -        let c = bsp::console::console().read_char();
 -        bsp::console::console().write_char(c);
 -    }
++    info!("Echoing input now");
 +    cpu::wait_forever();
  }
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 9504cfc31..7b3a85cf0 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -226,28 +226,49 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
+    /// This results in 8N1 and 921_600 baud.
     ///
-    /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
-    /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
+    /// The calculation for the BRD is (we set the clock to 48 MHz in config.txt):
+    /// `(48_000_000 / 16) / 921_600 = 3.2552083`. `3` goes to the `IBRD` (integer field).
     ///
-    /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
-    /// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
-    /// now at 0.01 %.
+    /// The `FBRD` (fractional field) is only 6 bits so `0.2552083 * 64 = 16.3 rounded to 16` will
+    /// give the best approximation we can get. A 5% error margin is acceptable for UART and we're
+    /// now at 0.02%.
     pub fn init(&mut self) {
-        // Turn it off temporarily.
+        // Execution can arrive here while there are still characters queued in the TX FIFO and
+        // actively being sent out by the UART hardware. If the UART is turned off in this case,
+        // those queued characters would be lost.
+        //
+        // For example, this can happen during runtime on a call to panic!(), because panic!()
+        // initializes its own UART instance and calls init().
+        //
+        // Hence, flush first to ensure all pending characters are transmitted.
+        self.flush();
+
+        // Turn the UART off temporarily.
         self.registers.CR.set(0);
 
+        // Clear all pending interrupts.
         self.registers.ICR.write(ICR::ALL::CLEAR);
-        self.registers.IBRD.write(IBRD::IBRD.val(5));
-        self.registers.FBRD.write(FBRD::FBRD.val(13));
+
+        // Set the baud rate.
+        self.registers.IBRD.write(IBRD::IBRD.val(3));
+        self.registers.FBRD.write(FBRD::FBRD.val(16));
+
+        // Set 8N1 + FIFO on.
         self.registers
             .LCRH
-            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
-        self.registers.IFLS.write(IFLS::RXIFLSEL::OneEigth); // RX FIFO fill level at 1/8
+            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled);
+
+        // Set RX FIFO fill level at 1/8.
+        self.registers.IFLS.write(IFLS::RXIFLSEL::OneEigth);
+
+        // Enable RX IRQ + RX timeout IRQ.
         self.registers
             .IMSC
-            .write(IMSC::RXIM::Enabled + IMSC::RTIM::Enabled); // RX IRQ + RX timeout IRQ
+            .write(IMSC::RXIM::Enabled + IMSC::RTIM::Enabled);
+
+        // Turn the UART on.
         self.registers
             .CR
             .write(CR::UARTEN::Enabled + CR::TXE::Enabled + CR::RXE::Enabled);
@@ -266,6 +287,26 @@ impl PL011UartInner {
         self.chars_written += 1;
     }
 
+    /// Block execution until the last buffered character has been physically put on the TX wire.
+    fn flush(&self) {
+        use crate::{time, time::interface::TimeManager};
+        use core::time::Duration;
+
+        // The bit time for 921_600 baud is 1 / 921_600 = 1.09 µs. 8N1 has a total of 10 bits per
+        // symbol (start bit, 8 data bits, stop bit), so one symbol takes round about 10 * 1.09 =
+        // 10.9 µs, or 10_900 ns. Round it up to 12_000 ns to be on the safe side.
+        const CHAR_TIME_SAFE: Duration = Duration::from_nanos(12_000);
+
+        // Spin until TX FIFO empty is set.
+        while !self.registers.FR.matches_all(FR::TXFE::SET) {
+            cpu::nop();
+        }
+
+        // After the last character has been queued for transmission, wait for the time of one
+        // character + some extra time for safety.
+        time::time_manager().spin_for(CHAR_TIME_SAFE);
+    }
+
     /// Retrieve a character.
     fn read_char_converting(&mut self, blocking_mode: BlockingMode) -> Option<char> {
         // If RX FIFO is empty,
@@ -379,11 +420,7 @@ impl console::interface::Write for PL011Uart {
 
     fn flush(&self) {
         // Spin until TX FIFO empty is set.
-        self.inner.lock(|inner| {
-            while !inner.registers.FR.matches_all(FR::TXFE::SET) {
-                cpu::nop();
-            }
-        });
+        self.inner.lock(|inner| inner.flush());
     }
 }
 
@@ -393,13 +430,13 @@ impl console::interface::Read for PL011Uart {
             .lock(|inner| inner.read_char_converting(BlockingMode::Blocking).unwrap())
     }
 
-    fn clear(&self) {
-        self.inner.lock(|inner| {
-            // Read from the RX FIFO until it is indicating empty.
-            while !inner.registers.FR.matches_all(FR::RXFE::SET) {
-                inner.registers.DR.get();
-            }
-        })
+    fn clear_rx(&self) {
+        // Read from the RX FIFO until it is indicating empty.
+        while self
+            .inner
+            .lock(|inner| inner.read_char_converting(BlockingMode::NonBlocking))
+            .is_some()
+        {}
     }
 }
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/console.rs b/14_exceptions_part2_peripheral_IRQs/src/console.rs
index 2d38cc1d1..3552823cc 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/console.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/console.rs
@@ -20,8 +20,8 @@ pub mod interface {
         /// Write a Rust format string.
         fn write_fmt(&self, args: fmt::Arguments) -> fmt::Result;
 
-        /// Block execution until the last character has been physically put on the TX wire
-        /// (draining TX buffers/FIFOs, if any).
+        /// Block execution until the last buffered character has been physically put on the TX
+        /// wire.
         fn flush(&self);
     }
 
@@ -33,7 +33,7 @@ pub mod interface {
         }
 
         /// Clear RX buffers, if any.
-        fn clear(&self);
+        fn clear_rx(&self);
     }
 
     /// Console statistics.
diff --git a/15_virtual_mem_part2_mmio_remap/README.md b/15_virtual_mem_part2_mmio_remap/README.md
index fb574abf4..acb48ded6 100644
--- a/15_virtual_mem_part2_mmio_remap/README.md
+++ b/15_virtual_mem_part2_mmio_remap/README.md
@@ -1305,9 +1305,9 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
      irq_number: bsp::device_driver::IRQNumber,
  }
 @@ -234,7 +239,15 @@
-     /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
-     /// give the best approximation we can get. A 5 modulo error margin is acceptable for UART and we're
-     /// now at 0.01 modulo.
+     /// The `FBRD` (fractional field) is only 6 bits so `0.2552083 * 64 = 16.3 rounded to 16` will
+     /// give the best approximation we can get. A 5modulo error margin is acceptable for UART and we're
+     /// now at 0.02modulo.
 -    pub fn init(&mut self) {
 +    ///
 +    /// # Safety
@@ -1318,10 +1318,10 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
 +            self.registers = Registers::new(addr);
 +        }
 +
-         // Turn it off temporarily.
-         self.registers.CR.set(0);
-
-@@ -251,6 +264,8 @@
+         // Execution can arrive here while there are still characters queued in the TX FIFO and
+         // actively being sent out by the UART hardware. If the UART is turned off in this case,
+         // those queued characters would be lost.
+@@ -272,6 +285,8 @@
          self.registers
              .CR
              .write(CR::UARTEN::Enabled + CR::TXE::Enabled + CR::RXE::Enabled);
@@ -1330,7 +1330,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
      }
 
      /// Send a character.
-@@ -320,13 +335,18 @@
+@@ -361,13 +376,18 @@
      ///
      /// # Safety
      ///
@@ -1352,7 +1352,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
              irq_number,
          }
      }
-@@ -343,7 +363,14 @@
+@@ -384,7 +404,14 @@
      }
 
      unsafe fn init(&self) -> Result<(), &'static str> {
@@ -1368,7 +1368,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
 
          Ok(())
      }
-@@ -362,6 +389,16 @@
+@@ -403,6 +430,16 @@
 
          Ok(())
      }
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index b2fc254bd..e404f11bf 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -231,14 +231,14 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
+    /// This results in 8N1 and 921_600 baud.
     ///
-    /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
-    /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
+    /// The calculation for the BRD is (we set the clock to 48 MHz in config.txt):
+    /// `(48_000_000 / 16) / 921_600 = 3.2552083`. `3` goes to the `IBRD` (integer field).
     ///
-    /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
-    /// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
-    /// now at 0.01 %.
+    /// The `FBRD` (fractional field) is only 6 bits so `0.2552083 * 64 = 16.3 rounded to 16` will
+    /// give the best approximation we can get. A 5% error margin is acceptable for UART and we're
+    /// now at 0.02%.
     ///
     /// # Safety
     ///
@@ -248,19 +248,40 @@ impl PL011UartInner {
             self.registers = Registers::new(addr);
         }
 
-        // Turn it off temporarily.
+        // Execution can arrive here while there are still characters queued in the TX FIFO and
+        // actively being sent out by the UART hardware. If the UART is turned off in this case,
+        // those queued characters would be lost.
+        //
+        // For example, this can happen during runtime on a call to panic!(), because panic!()
+        // initializes its own UART instance and calls init().
+        //
+        // Hence, flush first to ensure all pending characters are transmitted.
+        self.flush();
+
+        // Turn the UART off temporarily.
         self.registers.CR.set(0);
 
+        // Clear all pending interrupts.
         self.registers.ICR.write(ICR::ALL::CLEAR);
-        self.registers.IBRD.write(IBRD::IBRD.val(5));
-        self.registers.FBRD.write(FBRD::FBRD.val(13));
+
+        // Set the baud rate.
+        self.registers.IBRD.write(IBRD::IBRD.val(3));
+        self.registers.FBRD.write(FBRD::FBRD.val(16));
+
+        // Set 8N1 + FIFO on.
         self.registers
             .LCRH
-            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
-        self.registers.IFLS.write(IFLS::RXIFLSEL::OneEigth); // RX FIFO fill level at 1/8
+            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled);
+
+        // Set RX FIFO fill level at 1/8.
+        self.registers.IFLS.write(IFLS::RXIFLSEL::OneEigth);
+
+        // Enable RX IRQ + RX timeout IRQ.
         self.registers
             .IMSC
-            .write(IMSC::RXIM::Enabled + IMSC::RTIM::Enabled); // RX IRQ + RX timeout IRQ
+            .write(IMSC::RXIM::Enabled + IMSC::RTIM::Enabled);
+
+        // Turn the UART on.
         self.registers
             .CR
             .write(CR::UARTEN::Enabled + CR::TXE::Enabled + CR::RXE::Enabled);
@@ -281,6 +302,26 @@ impl PL011UartInner {
         self.chars_written += 1;
     }
 
+    /// Block execution until the last buffered character has been physically put on the TX wire.
+    fn flush(&self) {
+        use crate::{time, time::interface::TimeManager};
+        use core::time::Duration;
+
+        // The bit time for 921_600 baud is 1 / 921_600 = 1.09 µs. 8N1 has a total of 10 bits per
+        // symbol (start bit, 8 data bits, stop bit), so one symbol takes round about 10 * 1.09 =
+        // 10.9 µs, or 10_900 ns. Round it up to 12_000 ns to be on the safe side.
+        const CHAR_TIME_SAFE: Duration = Duration::from_nanos(12_000);
+
+        // Spin until TX FIFO empty is set.
+        while !self.registers.FR.matches_all(FR::TXFE::SET) {
+            cpu::nop();
+        }
+
+        // After the last character has been queued for transmission, wait for the time of one
+        // character + some extra time for safety.
+        time::time_manager().spin_for(CHAR_TIME_SAFE);
+    }
+
     /// Retrieve a character.
     fn read_char_converting(&mut self, blocking_mode: BlockingMode) -> Option<char> {
         // If RX FIFO is empty,
@@ -416,11 +457,7 @@ impl console::interface::Write for PL011Uart {
 
     fn flush(&self) {
         // Spin until TX FIFO empty is set.
-        self.inner.lock(|inner| {
-            while !inner.registers.FR.matches_all(FR::TXFE::SET) {
-                cpu::nop();
-            }
-        });
+        self.inner.lock(|inner| inner.flush());
     }
 }
 
@@ -430,13 +467,13 @@ impl console::interface::Read for PL011Uart {
             .lock(|inner| inner.read_char_converting(BlockingMode::Blocking).unwrap())
     }
 
-    fn clear(&self) {
-        self.inner.lock(|inner| {
-            // Read from the RX FIFO until it is indicating empty.
-            while !inner.registers.FR.matches_all(FR::RXFE::SET) {
-                inner.registers.DR.get();
-            }
-        })
+    fn clear_rx(&self) {
+        // Read from the RX FIFO until it is indicating empty.
+        while self
+            .inner
+            .lock(|inner| inner.read_char_converting(BlockingMode::NonBlocking))
+            .is_some()
+        {}
     }
 }
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/console.rs b/15_virtual_mem_part2_mmio_remap/src/console.rs
index 2d38cc1d1..3552823cc 100644
--- a/15_virtual_mem_part2_mmio_remap/src/console.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/console.rs
@@ -20,8 +20,8 @@ pub mod interface {
         /// Write a Rust format string.
         fn write_fmt(&self, args: fmt::Arguments) -> fmt::Result;
 
-        /// Block execution until the last character has been physically put on the TX wire
-        /// (draining TX buffers/FIFOs, if any).
+        /// Block execution until the last buffered character has been physically put on the TX
+        /// wire.
         fn flush(&self);
     }
 
@@ -33,7 +33,7 @@ pub mod interface {
         }
 
         /// Clear RX buffers, if any.
-        fn clear(&self);
+        fn clear_rx(&self);
     }
 
     /// Console statistics.
diff --git a/X1_JTAG_boot/jtag_boot_rpi3.img b/X1_JTAG_boot/jtag_boot_rpi3.img
index 443facda4297a662552100554a1bd6de4427e137..4248095748295740449cb7c013902e8a4ea778fb 100755
GIT binary patch
delta 2340
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diff --git a/X1_JTAG_boot/jtag_boot_rpi4.img b/X1_JTAG_boot/jtag_boot_rpi4.img
index 253652d1d962970ed45ec347f2bfc399f81cf240..0813b2badedf8feb242081bdb478505ffd4044ee 100755
GIT binary patch
delta 2426
zcma)7Yiv_x7=F(=ZFf$0V}sFc9o?y8ux==q0Yhd+H-fVA11UsJys$A~bPP7T5ioIS
z31C3@aXvl_xN5>B2F?%#hY7_PH!$jgL1cn|{Lu{wZO277qcpM|-*YJrOw^Nn{l4!#
z@AY|~^H!R7xJoKuP3AKWD?53U84fT2r=4z*L~Z~X<bb@wbyu<ZOpS7p{eEn@RUYA>
ziwAc?$a9DHz=DcGk-Mgz`;<lV`AFq8;ip|*Ye!#5;jBZE6j-IoT)38I(+gRpfeZlY
z@)<jEby!339Spg*m?81cEOLqPO{Xwg+wbbQ6mpF&>o0Mp*{zt0=Lk=R+8C0C=Y7s+
z2-=^%JTQ$6olKGMo#f@FD<N-F!wLUw4ibAI=)F6WkyAT@-dH&#1k`o)mJ@47SI9H!
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zjMb9c6(+eEt8d2Y@6EKxr!XP4@@N?(c+}_XU1UbbhoSvg`96Girzk}(K_vLm_5A{(
z?-~uP?=Lx$Y9B62bw#n_+eN&5dl@7iBC&%ZgNV-Ch{Rzt%ms7`!3x6R-XP8*Cfs)(
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oG635gdh%IDw(9Q2wZV|%AG-Ezbx?oavotGzItLL4U6}vEU&}(_;{X5v

delta 1556
zcmZXUZ)jUp6u{4YFE4#B)pkw$@~?lAEN!zy1l?BWbYzLOlJtvPm@))yYZ1o$FbRIx
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zfd;<ss>F9)Bw-DW4Wv($_R>z&A3*x%IM7#T4$*Vb5L@q=c3nvjKkMvxpZ((fmPFWR
zz3GSML-a#DgZyB+H4Wh#*0^+i`$=eRKC7B|{xU2@C^3MZ0XWYt^yS8T`e-BWGI=Hs
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zX<5HdUOhx_uLDKm^0|6~cA>nM8DN+7q?8$CKkJVb?dlM$4xwkat+_OTv8jmsqh(os
zn-bzw!c|WhaT=A4d`e`qeYF^s(Kl=CrY@9cA!hG0qZs)=aW78gR2RzH!HHH<Nmt)>
z8TpfX-@c@R6+~N6gN3|y6RJG09js=OlwW!R<zb@U)(9N46F$AifvN4GGq_Q|fcZD}
zP1xe`Us=|%S1bp>S|!)F_d%<PKuZdI&ac;w-{_@yrA6}{ykF0kUlcf5Ee2+G<1pSa
zF|#CHJ%OYgFiViueI~DBT&@mP-kV{xg>|TEned{?`?C~Yw0m<oylD3&`Wv%A8wa4J
z;$hU%2+iTTMqI{PVx42yQBdRt#VIH+#Yb3*RiL|hDU|<8@fI%R$$1mJji4TcY<5G-
zgOEu9>A{2^gye_O5b_gT!@;J|K82uJ1Xc0z<PektW)U=3Y*Tg!%1iiM1f@-l&&Q@M
z-UEr`9J2MdH3xUB{rC04{IJstkr6wF_rmL<7XV-R&27t%y|$pb(q>Io7dki4U~jNA
z%GUg2-UN)o0oV_2z}CXC>1EzPD)feeH1`aA0roHyb~12naw~AZTk|_}Y+ZXy6bh#b
zsQuw{>^@=N8Q1W!!a(ZamRRl}0NfGtcGjKg?h5~2b~JRET^M}4_*%$GbVPui7W30$
zzUg)R&M!b)_UVo`EMz+l|CsF2jyo<p+6f`saU!f2+Nh0PPT)@gmK+$BE(O_lgQ>|K
z;s1*+2c1<tVm~g^_!+|9E$r_F*$YF@DE5rK7>toERti4C=7-|akr4ZO==pyDWF@i?

diff --git a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 46cceff92..876aa461d 100644
--- a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -136,6 +136,12 @@ register_structs! {
 /// Abstraction for the associated MMIO registers.
 type Registers = MMIODerefWrapper<RegisterBlock>;
 
+#[derive(PartialEq)]
+enum BlockingMode {
+    Blocking,
+    NonBlocking,
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -174,24 +180,41 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
+    /// This results in 8N1 and 921_600 baud.
     ///
-    /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
-    /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
+    /// The calculation for the BRD is (we set the clock to 48 MHz in config.txt):
+    /// `(48_000_000 / 16) / 921_600 = 3.2552083`. `3` goes to the `IBRD` (integer field).
     ///
-    /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
-    /// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
-    /// now at 0.01 %.
+    /// The `FBRD` (fractional field) is only 6 bits so `0.2552083 * 64 = 16.3 rounded to 16` will
+    /// give the best approximation we can get. A 5% error margin is acceptable for UART and we're
+    /// now at 0.02%.
     pub fn init(&mut self) {
-        // Turn it off temporarily.
+        // Execution can arrive here while there are still characters queued in the TX FIFO and
+        // actively being sent out by the UART hardware. If the UART is turned off in this case,
+        // those queued characters would be lost.
+        //
+        // For example, this can happen during runtime on a call to panic!(), because panic!()
+        // initializes its own UART instance and calls init().
+        //
+        // Hence, flush first to ensure all pending characters are transmitted.
+        self.flush();
+
+        // Turn the UART off temporarily.
         self.registers.CR.set(0);
 
+        // Clear all pending interrupts.
         self.registers.ICR.write(ICR::ALL::CLEAR);
-        self.registers.IBRD.write(IBRD::IBRD.val(5));
-        self.registers.FBRD.write(FBRD::FBRD.val(13));
+
+        // Set the baud rate.
+        self.registers.IBRD.write(IBRD::IBRD.val(3));
+        self.registers.FBRD.write(FBRD::FBRD.val(16));
+
+        // Set 8N1 + FIFO on.
         self.registers
             .LCRH
-            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
+            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled);
+
+        // Turn the UART on.
         self.registers
             .CR
             .write(CR::UARTEN::Enabled + CR::TXE::Enabled + CR::RXE::Enabled);
@@ -209,6 +232,55 @@ impl PL011UartInner {
 
         self.chars_written += 1;
     }
+
+    /// Block execution until the last buffered character has been physically put on the TX wire.
+    fn flush(&self) {
+        use crate::{time, time::interface::TimeManager};
+        use core::time::Duration;
+
+        // The bit time for 921_600 baud is 1 / 921_600 = 1.09 µs. 8N1 has a total of 10 bits per
+        // symbol (start bit, 8 data bits, stop bit), so one symbol takes round about 10 * 1.09 =
+        // 10.9 µs, or 10_900 ns. Round it up to 12_000 ns to be on the safe side.
+        const CHAR_TIME_SAFE: Duration = Duration::from_nanos(12_000);
+
+        // Spin until TX FIFO empty is set.
+        while !self.registers.FR.matches_all(FR::TXFE::SET) {
+            cpu::nop();
+        }
+
+        // After the last character has been queued for transmission, wait for the time of one
+        // character + some extra time for safety.
+        time::time_manager().spin_for(CHAR_TIME_SAFE);
+    }
+
+    /// Retrieve a character.
+    fn read_char_converting(&mut self, blocking_mode: BlockingMode) -> Option<char> {
+        // If RX FIFO is empty,
+        if self.registers.FR.matches_all(FR::RXFE::SET) {
+            // immediately return in non-blocking mode.
+            if blocking_mode == BlockingMode::NonBlocking {
+                return None;
+            }
+
+            // Otherwise, wait until a char was received.
+            while self.registers.FR.matches_all(FR::RXFE::SET) {
+                cpu::nop();
+            }
+        }
+
+        // Read one character.
+        let mut ret = self.registers.DR.get() as u8 as char;
+
+        // Convert carrige return to newline.
+        if ret == '\r' {
+            ret = '\n'
+        }
+
+        // Update statistics.
+        self.chars_read += 1;
+
+        Some(ret)
+    }
 }
 
 /// Implementing `core::fmt::Write` enables usage of the `format_args!` macros, which in turn are
@@ -231,6 +303,8 @@ impl fmt::Write for PL011UartInner {
 }
 
 impl PL011Uart {
+    /// Create an instance.
+    ///
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
@@ -273,44 +347,23 @@ impl console::interface::Write for PL011Uart {
 
     fn flush(&self) {
         // Spin until TX FIFO empty is set.
-        self.inner.lock(|inner| {
-            while !inner.registers.FR.matches_all(FR::TXFE::SET) {
-                cpu::nop();
-            }
-        });
+        self.inner.lock(|inner| inner.flush());
     }
 }
 
 impl console::interface::Read for PL011Uart {
     fn read_char(&self) -> char {
-        self.inner.lock(|inner| {
-            // Spin while RX FIFO empty is set.
-            while inner.registers.FR.matches_all(FR::RXFE::SET) {
-                cpu::nop();
-            }
-
-            // Read one character.
-            let mut ret = inner.registers.DR.get() as u8 as char;
-
-            // Convert carrige return to newline.
-            if ret == '\r' {
-                ret = '\n'
-            }
-
-            // Update statistics.
-            inner.chars_read += 1;
-
-            ret
-        })
+        self.inner
+            .lock(|inner| inner.read_char_converting(BlockingMode::Blocking).unwrap())
     }
 
-    fn clear(&self) {
-        self.inner.lock(|inner| {
-            // Read from the RX FIFO until it is indicating empty.
-            while !inner.registers.FR.matches_all(FR::RXFE::SET) {
-                inner.registers.DR.get();
-            }
-        })
+    fn clear_rx(&self) {
+        // Read from the RX FIFO until it is indicating empty.
+        while self
+            .inner
+            .lock(|inner| inner.read_char_converting(BlockingMode::NonBlocking))
+            .is_some()
+        {}
     }
 }
 
diff --git a/X1_JTAG_boot/src/console.rs b/X1_JTAG_boot/src/console.rs
index 2d38cc1d1..3552823cc 100644
--- a/X1_JTAG_boot/src/console.rs
+++ b/X1_JTAG_boot/src/console.rs
@@ -20,8 +20,8 @@ pub mod interface {
         /// Write a Rust format string.
         fn write_fmt(&self, args: fmt::Arguments) -> fmt::Result;
 
-        /// Block execution until the last character has been physically put on the TX wire
-        /// (draining TX buffers/FIFOs, if any).
+        /// Block execution until the last buffered character has been physically put on the TX
+        /// wire.
         fn flush(&self);
     }
 
@@ -33,7 +33,7 @@ pub mod interface {
         }
 
         /// Clear RX buffers, if any.
-        fn clear(&self);
+        fn clear_rx(&self);
     }
 
     /// Console statistics.
diff --git a/utils/minipush.rb b/utils/minipush.rb
index e06433a8a..bda97bb1f 100755
--- a/utils/minipush.rb
+++ b/utils/minipush.rb
@@ -25,24 +25,29 @@ def initialize(serial_name, binary_image_path)
 
     private
 
-    # The three characters signaling the request token are expected to arrive as the last three
-    # characters _at the end_ of a character stream (e.g. after a header print from Miniload).
+    # The three characters signaling the request token form the consecutive sequence "\x03\x03\x03".
     def wait_for_binary_request
         puts "[#{@name_short}] 🔌 Please power the target now"
 
         # Timeout for the request token starts after the first sign of life was received.
         received = @target_serial.readpartial(4096)
         Timeout.timeout(10) do
+            count = 0
+
             loop do
                 raise ProtocolError if received.nil?
 
-                if received.chars.last(3) == ["\u{3}", "\u{3}", "\u{3}"]
-                    # Print the last chunk minus the request token.
-                    print received[0..-4]
-                    return
-                end
+                received.chars.each do |c|
+                    if c == "\u{3}"
+                        count += 1
+                        return true if count == 3
+                    else
+                        # A normal character resets token counting.
+                        count = 0
 
-                print received
+                        print c
+                    end
+                end
 
                 received = @target_serial.readpartial(4096)
             end
diff --git a/utils/miniterm.rb b/utils/miniterm.rb
index 010761cd8..091566697 100755
--- a/utils/miniterm.rb
+++ b/utils/miniterm.rb
@@ -11,6 +11,8 @@
 require 'colorize'
 require 'serialport'
 
+SERIAL_BAUD = 921_600
+
 class ConnectionError < StandardError; end
 
 # The main class
@@ -41,7 +43,7 @@ def wait_for_serial
     def open_serial
         wait_for_serial
 
-        @target_serial = SerialPort.new(@target_serial_name, 576_000, 8, 1, SerialPort::NONE)
+        @target_serial = SerialPort.new(@target_serial_name, SERIAL_BAUD, 8, 1, SerialPort::NONE)
 
         # Ensure all output is immediately flushed to the device.
         @target_serial.sync = true

From 4d1f84bbfffb322b724a1fa178b74d0e315fcbee Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 4 Jan 2021 17:51:38 +0100
Subject: [PATCH 021/214] Add pull request template

---
 .github/pull_request_template.md | 13 +++++++++++++
 .github/workflows/sanity.yml     |  2 +-
 contributor_setup.sh             | 28 ++++++++++++++++++++++++++++
 utils/devtool.rb                 |  2 +-
 4 files changed, 43 insertions(+), 2 deletions(-)
 create mode 100644 .github/pull_request_template.md

diff --git a/.github/pull_request_template.md b/.github/pull_request_template.md
new file mode 100644
index 000000000..983399703
--- /dev/null
+++ b/.github/pull_request_template.md
@@ -0,0 +1,13 @@
+### Description
+
+<Please describe the issues fixed by this PR>
+
+Related Issue: <Insert link here if applicable>
+
+### Pre-commit steps
+
+ - [ ] Tested on QEMU and real HW Rasperry Pi.
+     - Not needed if it is just a README change or similar.
+ - [ ] Ran `./contributor_setup.sh` followed by `./devtool ready_for_publish`
+     - You'll need `Ruby` with `Bundler` and `NPM` installed locally.
+     - This step is optional, but much appreciated if done.
diff --git a/.github/workflows/sanity.yml b/.github/workflows/sanity.yml
index 46c559a8e..2c4551f2d 100644
--- a/.github/workflows/sanity.yml
+++ b/.github/workflows/sanity.yml
@@ -41,7 +41,7 @@ jobs:
       - name: Setup misspell
         run: |
           curl -L -o ./install-misspell.sh https://git.io/misspell
-          sh ./install-misspell.sh -b ~/bin
+          sh ./install-misspell.sh -b .vendor
       - name: Run checks
         run: |
           BSP=rpi3 bundle exec ruby utils/devtool.rb clippy
diff --git a/contributor_setup.sh b/contributor_setup.sh
index d379dba7d..8bad881fe 100755
--- a/contributor_setup.sh
+++ b/contributor_setup.sh
@@ -2,7 +2,35 @@
 
 git config core.hooksPath .githooks
 
+#
+# Ruby and Bundler
+#
+if ! command -v bundle &> /dev/null
+then
+    echo "'bundle' could not be found. Please install Ruby and Bundler."
+    exit
+fi
 bundle config set path '.vendor/bundle'
 bundle install
 
+#
+# NPM
+#
+if ! command -v npm &> /dev/null
+then
+    echo "'npm' could not be found. Please install it."
+    exit
+fi
 npm install --save-dev --save-exact prettier
+
+#
+# Misspell
+#
+if ! command -v curl &> /dev/null
+then
+    echo "'curl' could not be found. Please install it."
+    exit
+fi
+curl -L -o ./install-misspell.sh https://git.io/misspell
+sh ./install-misspell.sh -b .vendor
+rm install-misspell.sh
diff --git a/utils/devtool.rb b/utils/devtool.rb
index 47e3404af..66271202f 100755
--- a/utils/devtool.rb
+++ b/utils/devtool.rb
@@ -165,7 +165,7 @@ def copyright
 
     def misspell
         puts 'Misspell'.light_blue
-        exit(1) unless system("~/bin/misspell -error #{tracked_files.join(' ')}")
+        exit(1) unless system(".vendor/misspell -error #{tracked_files.join(' ')}")
     end
 
     def rubocop

From e815b346032ed70db95d611a1ee81c1f8c55e34b Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 4 Jan 2021 22:13:40 +0100
Subject: [PATCH 022/214] Update READMEs

---
 08_timestamps/README.md |  5 +++--
 README.md               | 11 ++++++-----
 2 files changed, 9 insertions(+), 7 deletions(-)

diff --git a/08_timestamps/README.md b/08_timestamps/README.md
index 111b1168c..b79121c0f 100644
--- a/08_timestamps/README.md
+++ b/08_timestamps/README.md
@@ -2,8 +2,9 @@
 
 ## tl;dr
 
-- We add abstractions for the architectural timer, implement it for `aarch64` and use it to annotate
-  prints with timestamps.
+- We add abstractions for the architectural timer and implement them for `_arch/aarch64`.
+- The new timer functions are used to annotate UART prints with timestamps, and to get rid of the
+  cycle-based delays in the `GPIO` and `UART` device drivers, which boosts accuracy.
 - A `warn!()` macro is added.
 
 ## Test it
diff --git a/README.md b/README.md
index 00cbe66ef..daf3b7d74 100644
--- a/README.md
+++ b/README.md
@@ -92,15 +92,15 @@ other Unix flavors such as **macOS**, but this is only _experimental_.
 [docker group]: https://docs.docker.com/engine/install/linux-postinstall/
 [Rust Analyzer extension]: https://marketplace.visualstudio.com/items?itemName=matklad.rust-analyzer
 
-### 🧰 The Long Version: Eliminating Toolchain Hassle
+### 🧰 More Details: Eliminating Toolchain Hassle
 
 This series tries to put a strong focus on user friendliness. Therefore, efforts were made to
-eliminate the biggest painpoint in embedded development as much as possible: Toolchain hassle.
+eliminate the biggest painpoint in embedded development as much as possible: `Toolchain hassle`.
 
 Rust itself is already helping a lot in that regard, because it has built-in support for
 cross-compilation. All that we need for cross-compiling from an `x86` host to the Raspberry Pi's
-`AArch64` architecture is to install the respective target through `rustup`. However, besides the
-Rust compiler, we will use some more tools. Among others:
+`AArch64` architecture will be automatically installed by `rustup`. However, besides the Rust
+compiler, we will use some more tools. Among others:
 
 - `QEMU` to emulate our kernel on the host system.
 - A self-made tool called `Minipush` to load a kernel onto the Raspberry Pi on-demand over `UART`.
@@ -122,7 +122,8 @@ provided container, please refer to the repository's [docker](docker) folder.
 Since the kernel developed in the tutorials runs on the real hardware, it is highly recommended to
 get a USB serial cable to get the full experience.
 
-- You can find USB-to-serial cables that should work right away at [\[1\]] [\[2\]].
+- You can find USB-to-serial cables that should work right away at [\[1\]] [\[2\]], but many others
+  will work too. Ideally, your cable is based on the `CP2102` chip.
 - You connect it to `GND` and GPIO pins `14/15` as shown below.
 - [Tutorial 6](06_drivers_gpio_uart) is the first where you can use it. Check it out for
   instructions on how to prepare the SD card to boot your self-made kernel from it.

From e7cb61b3899cde97ab253543a9eb102e8d1511eb Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sat, 23 Jan 2021 22:43:59 +0100
Subject: [PATCH 023/214] Refactoring

- Don't wildcard-import from arch modules. Make it explicit.
- Put translation table code into its own module.
- Put boot code in boot.rs instead of cpu.rs
- Other minor changes, most memory subsystem.
---
 00_before_we_start/README.md                  |   37 +-
 01_wait_forever/Makefile                      |    3 +-
 01_wait_forever/README.md                     |    4 +-
 01_wait_forever/src/_arch/aarch64/cpu.rs      |    8 -
 .../src/_arch/aarch64/{cpu.S => cpu/boot.S}   |    0
 01_wait_forever/src/_arch/aarch64/cpu/boot.rs |   15 +
 01_wait_forever/src/bsp.rs                    |    2 +-
 01_wait_forever/src/cpu.rs                    |    5 +-
 01_wait_forever/src/cpu/boot.rs               |    9 +
 01_wait_forever/src/main.rs                   |   35 +-
 02_runtime_init/Makefile                      |    3 +-
 02_runtime_init/README.CN.md                  |  205 ++-
 02_runtime_init/README.md                     |   95 +-
 02_runtime_init/src/_arch/aarch64/cpu.rs      |   10 +-
 .../src/_arch/aarch64/{cpu.S => cpu/boot.S}   |    0
 02_runtime_init/src/_arch/aarch64/cpu/boot.rs |   15 +
 02_runtime_init/src/bsp.rs                    |    2 +-
 02_runtime_init/src/cpu.rs                    |    8 +-
 02_runtime_init/src/cpu/boot.rs               |    9 +
 02_runtime_init/src/main.rs                   |   37 +-
 03_hacky_hello_world/Makefile                 |    3 +-
 03_hacky_hello_world/README.md                |   20 +-
 03_hacky_hello_world/src/_arch/aarch64/cpu.rs |   10 +-
 .../src/_arch/aarch64/{cpu.S => cpu/boot.S}   |    0
 .../src/_arch/aarch64/cpu/boot.rs             |   15 +
 03_hacky_hello_world/src/bsp.rs               |    2 +-
 03_hacky_hello_world/src/cpu.rs               |    8 +-
 03_hacky_hello_world/src/cpu/boot.rs          |    9 +
 03_hacky_hello_world/src/main.rs              |   39 +-
 03_hacky_hello_world/src/print.rs             |    2 +-
 04_zero_overhead_abstraction/Makefile         |    3 +-
 04_zero_overhead_abstraction/README.md        |  168 ++-
 .../src/_arch/aarch64/cpu.rs                  |   36 +-
 .../src/_arch/aarch64/cpu/boot.rs             |   41 +
 .../src/_arch/aarch64/cpu/smp.rs              |    7 +
 04_zero_overhead_abstraction/src/bsp.rs       |    2 +-
 04_zero_overhead_abstraction/src/cpu.rs       |    8 +-
 04_zero_overhead_abstraction/src/cpu/boot.rs  |    9 +
 04_zero_overhead_abstraction/src/cpu/smp.rs   |    8 +-
 04_zero_overhead_abstraction/src/main.rs      |   39 +-
 04_zero_overhead_abstraction/src/print.rs     |    2 +-
 05_safe_globals/Makefile                      |    3 +-
 05_safe_globals/README.md                     |   14 +-
 05_safe_globals/src/_arch/aarch64/cpu.rs      |   36 +-
 05_safe_globals/src/_arch/aarch64/cpu/boot.rs |   41 +
 05_safe_globals/src/_arch/aarch64/cpu/smp.rs  |    7 +
 05_safe_globals/src/bsp.rs                    |    2 +-
 05_safe_globals/src/cpu.rs                    |    8 +-
 05_safe_globals/src/cpu/boot.rs               |    9 +
 05_safe_globals/src/cpu/smp.rs                |    8 +-
 05_safe_globals/src/main.rs                   |   39 +-
 05_safe_globals/src/print.rs                  |    2 +-
 06_drivers_gpio_uart/Makefile                 |    3 +-
 06_drivers_gpio_uart/README.md                |   63 +-
 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs |   38 +-
 .../src/_arch/aarch64/cpu/boot.rs             |   41 +
 .../src/_arch/aarch64/cpu/smp.rs              |    7 +
 06_drivers_gpio_uart/src/bsp.rs               |    2 +-
 06_drivers_gpio_uart/src/console.rs           |    3 +-
 06_drivers_gpio_uart/src/cpu.rs               |    8 +-
 06_drivers_gpio_uart/src/cpu/boot.rs          |    9 +
 06_drivers_gpio_uart/src/cpu/smp.rs           |    8 +-
 06_drivers_gpio_uart/src/main.rs              |   47 +-
 06_drivers_gpio_uart/src/print.rs             |    2 +-
 07_uart_chainloader/Makefile                  |    3 +-
 07_uart_chainloader/README.md                 |   77 +-
 07_uart_chainloader/demo_payload_rpi3.img     |  Bin 6856 -> 6856 bytes
 07_uart_chainloader/demo_payload_rpi4.img     |  Bin 6728 -> 6728 bytes
 07_uart_chainloader/src/_arch/aarch64/cpu.rs  |   38 +-
 .../src/_arch/aarch64/cpu/boot.rs             |   41 +
 .../src/_arch/aarch64/cpu/smp.rs              |    7 +
 07_uart_chainloader/src/bsp.rs                |    2 +-
 07_uart_chainloader/src/console.rs            |    3 +-
 07_uart_chainloader/src/cpu.rs                |    8 +-
 07_uart_chainloader/src/cpu/boot.rs           |    9 +
 07_uart_chainloader/src/cpu/smp.rs            |    8 +-
 07_uart_chainloader/src/main.rs               |   51 +-
 07_uart_chainloader/src/print.rs              |    2 +-
 08_timestamps/Makefile                        |    3 +-
 08_timestamps/README.md                       |   94 +-
 08_timestamps/src/_arch/aarch64/cpu.rs        |   38 +-
 08_timestamps/src/_arch/aarch64/cpu/boot.rs   |   41 +
 08_timestamps/src/_arch/aarch64/cpu/smp.rs    |    7 +
 08_timestamps/src/_arch/aarch64/time.rs       |    9 +-
 08_timestamps/src/bsp.rs                      |    2 +-
 08_timestamps/src/console.rs                  |    3 +-
 08_timestamps/src/cpu.rs                      |    8 +-
 08_timestamps/src/cpu/boot.rs                 |    9 +
 08_timestamps/src/cpu/smp.rs                  |    8 +-
 08_timestamps/src/main.rs                     |   49 +-
 08_timestamps/src/print.rs                    |    2 +-
 08_timestamps/src/time.rs                     |    8 +-
 09_hw_debug_JTAG/Makefile                     |    3 +-
 09_hw_debug_JTAG/README.md                    |   10 +-
 09_hw_debug_JTAG/src/_arch/aarch64/cpu.rs     |   38 +-
 .../src/_arch/aarch64/cpu/boot.rs             |   41 +
 09_hw_debug_JTAG/src/_arch/aarch64/cpu/smp.rs |    7 +
 09_hw_debug_JTAG/src/_arch/aarch64/time.rs    |    9 +-
 09_hw_debug_JTAG/src/bsp.rs                   |    2 +-
 09_hw_debug_JTAG/src/console.rs               |    3 +-
 09_hw_debug_JTAG/src/cpu.rs                   |    8 +-
 09_hw_debug_JTAG/src/cpu/boot.rs              |    9 +
 09_hw_debug_JTAG/src/cpu/smp.rs               |    8 +-
 09_hw_debug_JTAG/src/main.rs                  |   49 +-
 09_hw_debug_JTAG/src/print.rs                 |    2 +-
 09_hw_debug_JTAG/src/time.rs                  |    8 +-
 10_privilege_level/Makefile                   |    3 +-
 10_privilege_level/README.md                  |  156 ++-
 10_privilege_level/src/_arch/aarch64/cpu.rs   |   82 +-
 .../src/_arch/aarch64/cpu/boot.rs             |   89 ++
 .../src/_arch/aarch64/cpu/smp.rs              |    7 +
 .../src/_arch/aarch64/exception.rs            |    7 +
 .../_arch/aarch64/exception/asynchronous.rs   |    7 +
 10_privilege_level/src/_arch/aarch64/time.rs  |    9 +-
 10_privilege_level/src/bsp.rs                 |    2 +-
 10_privilege_level/src/console.rs             |    3 +-
 10_privilege_level/src/cpu.rs                 |    8 +-
 10_privilege_level/src/cpu/boot.rs            |    9 +
 10_privilege_level/src/cpu/smp.rs             |    8 +-
 10_privilege_level/src/exception.rs           |    6 +-
 .../src/exception/asynchronous.rs             |    8 +-
 10_privilege_level/src/main.rs                |   49 +-
 10_privilege_level/src/print.rs               |    2 +-
 10_privilege_level/src/time.rs                |    8 +-
 .../Makefile                                  |    3 +-
 .../README.md                                 |  572 +++++---
 .../src/_arch/aarch64/cpu.rs                  |   82 +-
 .../src/_arch/aarch64/cpu/boot.rs             |   89 ++
 .../src/_arch/aarch64/cpu/smp.rs              |    7 +
 .../src/_arch/aarch64/exception.rs            |    7 +
 .../_arch/aarch64/exception/asynchronous.rs   |    7 +
 .../src/_arch/aarch64/memory/mmu.rs           |  311 +----
 .../aarch64/memory/mmu/translation_table.rs   |  288 ++++
 .../src/_arch/aarch64/time.rs                 |    9 +-
 .../src/bsp.rs                                |    2 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |   17 +-
 .../src/console.rs                            |    3 +-
 .../src/cpu.rs                                |    8 +-
 .../src/cpu/boot.rs                           |    9 +
 .../src/cpu/smp.rs                            |    8 +-
 .../src/exception.rs                          |    6 +-
 .../src/exception/asynchronous.rs             |    8 +-
 .../src/main.rs                               |   51 +-
 .../src/memory/mmu.rs                         |   54 +-
 .../src/memory/mmu/translation_table.rs       |   14 +
 .../src/print.rs                              |    2 +-
 .../src/time.rs                               |    8 +-
 12_exceptions_part1_groundwork/Makefile       |    3 +-
 12_exceptions_part1_groundwork/README.md      |   69 +-
 .../src/_arch/aarch64/cpu.rs                  |   82 +-
 .../src/_arch/aarch64/cpu/boot.rs             |   89 ++
 .../src/_arch/aarch64/cpu/smp.rs              |    7 +
 .../src/_arch/aarch64/exception.rs            |    7 +
 .../_arch/aarch64/exception/asynchronous.rs   |    7 +
 .../src/_arch/aarch64/memory/mmu.rs           |  311 +----
 .../aarch64/memory/mmu/translation_table.rs   |  288 ++++
 .../src/_arch/aarch64/time.rs                 |    9 +-
 12_exceptions_part1_groundwork/src/bsp.rs     |    2 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |   17 +-
 12_exceptions_part1_groundwork/src/console.rs |    3 +-
 12_exceptions_part1_groundwork/src/cpu.rs     |    8 +-
 .../src/cpu/boot.rs                           |    9 +
 12_exceptions_part1_groundwork/src/cpu/smp.rs |    8 +-
 .../src/exception.rs                          |    6 +-
 .../src/exception/asynchronous.rs             |    8 +-
 12_exceptions_part1_groundwork/src/main.rs    |   51 +-
 .../src/memory/mmu.rs                         |   53 +-
 .../src/memory/mmu/translation_table.rs       |   14 +
 12_exceptions_part1_groundwork/src/print.rs   |    2 +-
 12_exceptions_part1_groundwork/src/time.rs    |    8 +-
 13_integrated_testing/Makefile                |    3 +-
 13_integrated_testing/README.md               |  183 +--
 .../src/_arch/aarch64/cpu.rs                  |   82 +-
 .../src/_arch/aarch64/cpu/boot.rs             |   89 ++
 .../src/_arch/aarch64/cpu/smp.rs              |    7 +
 .../src/_arch/aarch64/exception.rs            |    7 +
 .../_arch/aarch64/exception/asynchronous.rs   |    7 +
 .../src/_arch/aarch64/memory/mmu.rs           |  329 +----
 .../aarch64/memory/mmu/translation_table.rs   |  316 +++++
 .../src/_arch/aarch64/time.rs                 |    9 +-
 13_integrated_testing/src/bsp.rs              |    2 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |   17 +-
 13_integrated_testing/src/console.rs          |    3 +-
 13_integrated_testing/src/cpu.rs              |    8 +-
 13_integrated_testing/src/cpu/boot.rs         |    9 +
 13_integrated_testing/src/cpu/smp.rs          |    8 +-
 13_integrated_testing/src/exception.rs        |    6 +-
 .../src/exception/asynchronous.rs             |    8 +-
 13_integrated_testing/src/lib.rs              |   53 +-
 13_integrated_testing/src/memory/mmu.rs       |   53 +-
 .../src/memory/mmu/translation_table.rs       |   14 +
 13_integrated_testing/src/print.rs            |    2 +-
 13_integrated_testing/src/time.rs             |    8 +-
 14_exceptions_part2_peripheral_IRQs/README.md |   71 +-
 .../src/_arch/aarch64/cpu.rs                  |   82 +-
 .../src/_arch/aarch64/cpu/boot.rs             |   89 ++
 .../src/_arch/aarch64/cpu/smp.rs              |    7 +
 .../src/_arch/aarch64/exception.rs            |    7 +
 .../_arch/aarch64/exception/asynchronous.rs   |    7 +
 .../src/_arch/aarch64/memory/mmu.rs           |  329 +----
 .../aarch64/memory/mmu/translation_table.rs   |  316 +++++
 .../src/_arch/aarch64/time.rs                 |    9 +-
 .../src/bsp.rs                                |    2 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |   17 +-
 .../src/console.rs                            |    3 +-
 .../src/cpu.rs                                |    8 +-
 .../src/cpu/boot.rs                           |    9 +
 .../src/cpu/smp.rs                            |    8 +-
 .../src/exception.rs                          |    6 +-
 .../src/exception/asynchronous.rs             |   13 +-
 .../src/lib.rs                                |   58 +-
 .../src/memory/mmu.rs                         |   53 +-
 .../src/memory/mmu/translation_table.rs       |   14 +
 .../src/print.rs                              |    2 +-
 .../src/state.rs                              |    2 +-
 .../src/time.rs                               |    8 +-
 15_virtual_mem_part2_mmio_remap/README.md     | 1197 ++++++++---------
 .../src/_arch/aarch64/cpu.rs                  |   82 +-
 .../src/_arch/aarch64/cpu/boot.rs             |   89 ++
 .../src/_arch/aarch64/cpu/smp.rs              |    7 +
 .../src/_arch/aarch64/exception.rs            |    7 +
 .../_arch/aarch64/exception/asynchronous.rs   |    7 +
 .../src/_arch/aarch64/memory/mmu.rs           |  507 +------
 .../aarch64/memory/mmu/translation_table.rs   |  462 +++++++
 .../src/_arch/aarch64/time.rs                 |    7 +
 15_virtual_mem_part2_mmio_remap/src/bsp.rs    |    2 +-
 .../src/bsp/device_driver/arm/gicv2.rs        |    2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |    2 +-
 .../bcm/bcm2xxx_interrupt_controller.rs       |    2 +-
 .../peripheral_ic.rs                          |    2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |    2 +-
 .../src/bsp/raspberrypi/memory.rs             |    2 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |   17 +-
 .../src/console.rs                            |    3 +-
 15_virtual_mem_part2_mmio_remap/src/cpu.rs    |    8 +-
 .../src/cpu/boot.rs                           |    9 +
 .../src/cpu/smp.rs                            |    8 +-
 .../src/exception.rs                          |    6 +-
 .../src/exception/asynchronous.rs             |   13 +-
 15_virtual_mem_part2_mmio_remap/src/lib.rs    |   58 +-
 15_virtual_mem_part2_mmio_remap/src/memory.rs |   75 +-
 .../src/memory/mmu.rs                         |  160 +--
 .../src/memory/mmu/mapping_record.rs          |   10 +-
 .../src/memory/mmu/translation_table.rs       |  111 ++
 .../src/memory/mmu/types.rs                   |   80 +-
 15_virtual_mem_part2_mmio_remap/src/print.rs  |    2 +-
 15_virtual_mem_part2_mmio_remap/src/state.rs  |    2 +-
 15_virtual_mem_part2_mmio_remap/src/time.rs   |    8 +-
 X1_JTAG_boot/Cargo.lock                       |   12 +-
 X1_JTAG_boot/Cargo.toml                       |    4 +-
 X1_JTAG_boot/Makefile                         |    3 +-
 X1_JTAG_boot/jtag_boot_rpi3.img               |  Bin 8240 -> 8240 bytes
 X1_JTAG_boot/jtag_boot_rpi4.img               |  Bin 7968 -> 7968 bytes
 X1_JTAG_boot/src/_arch/aarch64/cpu.rs         |   39 +-
 X1_JTAG_boot/src/_arch/aarch64/cpu/boot.rs    |   41 +
 X1_JTAG_boot/src/_arch/aarch64/cpu/smp.rs     |    7 +
 X1_JTAG_boot/src/_arch/aarch64/time.rs        |    9 +-
 X1_JTAG_boot/src/bsp.rs                       |    2 +-
 X1_JTAG_boot/src/console.rs                   |    3 +-
 X1_JTAG_boot/src/cpu.rs                       |    8 +-
 X1_JTAG_boot/src/cpu/boot.rs                  |    9 +
 X1_JTAG_boot/src/cpu/smp.rs                   |    8 +-
 X1_JTAG_boot/src/main.rs                      |   49 +-
 X1_JTAG_boot/src/print.rs                     |    2 +-
 X1_JTAG_boot/src/time.rs                      |    8 +-
 rust-toolchain                                |    2 +-
 266 files changed, 6393 insertions(+), 4254 deletions(-)
 delete mode 100644 01_wait_forever/src/_arch/aarch64/cpu.rs
 rename 01_wait_forever/src/_arch/aarch64/{cpu.S => cpu/boot.S} (100%)
 create mode 100644 01_wait_forever/src/_arch/aarch64/cpu/boot.rs
 create mode 100644 01_wait_forever/src/cpu/boot.rs
 rename 02_runtime_init/src/_arch/aarch64/{cpu.S => cpu/boot.S} (100%)
 create mode 100644 02_runtime_init/src/_arch/aarch64/cpu/boot.rs
 create mode 100644 02_runtime_init/src/cpu/boot.rs
 rename 03_hacky_hello_world/src/_arch/aarch64/{cpu.S => cpu/boot.S} (100%)
 create mode 100644 03_hacky_hello_world/src/_arch/aarch64/cpu/boot.rs
 create mode 100644 03_hacky_hello_world/src/cpu/boot.rs
 create mode 100644 04_zero_overhead_abstraction/src/_arch/aarch64/cpu/boot.rs
 create mode 100644 04_zero_overhead_abstraction/src/cpu/boot.rs
 create mode 100644 05_safe_globals/src/_arch/aarch64/cpu/boot.rs
 create mode 100644 05_safe_globals/src/cpu/boot.rs
 create mode 100644 06_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs
 create mode 100644 06_drivers_gpio_uart/src/cpu/boot.rs
 create mode 100644 07_uart_chainloader/src/_arch/aarch64/cpu/boot.rs
 create mode 100644 07_uart_chainloader/src/cpu/boot.rs
 create mode 100644 08_timestamps/src/_arch/aarch64/cpu/boot.rs
 create mode 100644 08_timestamps/src/cpu/boot.rs
 create mode 100644 09_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs
 create mode 100644 09_hw_debug_JTAG/src/cpu/boot.rs
 create mode 100644 10_privilege_level/src/_arch/aarch64/cpu/boot.rs
 create mode 100644 10_privilege_level/src/cpu/boot.rs
 create mode 100644 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs
 create mode 100644 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs
 create mode 100644 11_virtual_mem_part1_identity_mapping/src/cpu/boot.rs
 create mode 100644 11_virtual_mem_part1_identity_mapping/src/memory/mmu/translation_table.rs
 create mode 100644 12_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs
 create mode 100644 12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs
 create mode 100644 12_exceptions_part1_groundwork/src/cpu/boot.rs
 create mode 100644 12_exceptions_part1_groundwork/src/memory/mmu/translation_table.rs
 create mode 100644 13_integrated_testing/src/_arch/aarch64/cpu/boot.rs
 create mode 100644 13_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs
 create mode 100644 13_integrated_testing/src/cpu/boot.rs
 create mode 100644 13_integrated_testing/src/memory/mmu/translation_table.rs
 create mode 100644 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.rs
 create mode 100644 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs
 create mode 100644 14_exceptions_part2_peripheral_IRQs/src/cpu/boot.rs
 create mode 100644 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.rs
 create mode 100644 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs
 create mode 100644 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
 create mode 100644 15_virtual_mem_part2_mmio_remap/src/cpu/boot.rs
 create mode 100644 15_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs
 create mode 100644 X1_JTAG_boot/src/_arch/aarch64/cpu/boot.rs
 create mode 100644 X1_JTAG_boot/src/cpu/boot.rs

diff --git a/00_before_we_start/README.md b/00_before_we_start/README.md
index 02c25118e..60e060bcc 100644
--- a/00_before_we_start/README.md
+++ b/00_before_we_start/README.md
@@ -12,7 +12,7 @@ the tutorials advance.
 
 Have fun!
 
-## Code organization and architecture
+# Code organization and architecture
 
 The code is divided into different *modules*, each representing a typical **subsystem** of the
 `kernel`. Top-level module files of subsystems reside directly in the `src` folder. For example,
@@ -25,15 +25,22 @@ architecture. For each supported processor architecture, there exists a subfolde
 for example, `src/_arch/aarch64`.
 
 The architecture folders mirror the subsystem modules laid out in `src`. For example, architectural
-code that belongs to the `kernel`'s memory subsystem (`src/memory.rs`) would go into
-`src/_arch/aarch64/memory.rs`. The latter file is directly included and re-exported in
-`src/memory.rs`, so that the architectural code parts are transparent with respect to the code's
-module organization. That means a public function `foo()` defined in `src/_arch/aarch64/memory.rs`
-would be reachable as `crate::memory::foo()` only.
+code that belongs to the `kernel`'s MMU subsystem (`src/memory/mmu.rs`) would go into
+`src/_arch/aarch64/memory/mmu.rs`. The latter file is loaded as a module in `src/memory/mmu.rs`
+using the `path attribute`. Usually, the chosen module name is the generic module's name prefixed
+with `arch_`.
 
-The `_` in `_arch` denotes that this folder is not part of the standard module hierarchy. Rather,
-it's contents are conditionally pulled into respective files using the `#[path =
-"_arch/xxx/yyy.rs"]` attribute.
+For example, this is the top of `src/memory/mmu.rs`:
+
+```
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/memory/mmu.rs"]
+mod arch_mmu;
+```
+
+Often times, items from the `arch_ module` will be publicly reexported by the parent module. This
+way, each architecture specific module can provide its implementation of an item, while the caller
+must not be concerned which architecture has been conditionally compiled.
 
 ## BSP code
 
@@ -42,9 +49,8 @@ target board specific definitions and functions. These are things such as the bo
 instances of drivers for devices that are featured on the respective board.
 
 Just like processor architecture code, the `BSP` code's module structure tries to mirror the
-`kernel`'s subsystem modules, but there is no transparent re-exporting this time. That means
-whatever is provided must be called starting from the `bsp` namespace, e.g.
-`bsp::driver::driver_manager()`.
+`kernel`'s subsystem modules, but there is no reexporting this time. That means whatever is provided
+must be called starting from the `bsp` namespace, e.g. `bsp::driver::driver_manager()`.
 
 ## Kernel interfaces
 
@@ -96,3 +102,10 @@ From a namespace perspective, **memory** subsystem code lives in:
 
 - `crate::memory::*`
 - `crate::bsp::memory::*`
+
+# Boot flow
+
+1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
+    - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
+
+
diff --git a/01_wait_forever/Makefile b/01_wait_forever/Makefile
index ef6395f1b..abecc406b 100644
--- a/01_wait_forever/Makefile
+++ b/01_wait_forever/Makefile
@@ -34,8 +34,9 @@ export LINKER_FILE
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
+FEATURES      = bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
-    --features bsp_$(BSP)          \
+    --features $(FEATURES)         \
     --release
 
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
diff --git a/01_wait_forever/README.md b/01_wait_forever/README.md
index 0bd3e7429..785e9817e 100644
--- a/01_wait_forever/README.md
+++ b/01_wait_forever/README.md
@@ -23,8 +23,8 @@
     - Only `.text` section.
 - `main.rs`: Important [inner attributes]:
     - `#![no_std]`, `#![no_main]`
-- `cpu.S`: Assembly `_start()` function that executes `wfe` (Wait For Event), halting all cores that
-  are executing `_start()`.
+- `boot.S`: Assembly `_start()` function that executes `wfe` (Wait For Event), halting all cores
+  that are executing `_start()`.
 - We (have to) define a `#[panic_handler]` function to make the compiler happy.
     - Make it `unimplemented!()` because it will be stripped out since it is not used.
 
diff --git a/01_wait_forever/src/_arch/aarch64/cpu.rs b/01_wait_forever/src/_arch/aarch64/cpu.rs
deleted file mode 100644
index 6d24fe289..000000000
--- a/01_wait_forever/src/_arch/aarch64/cpu.rs
+++ /dev/null
@@ -1,8 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Architectural processor code.
-
-// Assembly counterpart to this file.
-global_asm!(include_str!("cpu.S"));
diff --git a/01_wait_forever/src/_arch/aarch64/cpu.S b/01_wait_forever/src/_arch/aarch64/cpu/boot.S
similarity index 100%
rename from 01_wait_forever/src/_arch/aarch64/cpu.S
rename to 01_wait_forever/src/_arch/aarch64/cpu/boot.S
diff --git a/01_wait_forever/src/_arch/aarch64/cpu/boot.rs b/01_wait_forever/src/_arch/aarch64/cpu/boot.rs
new file mode 100644
index 000000000..c3c325d3a
--- /dev/null
+++ b/01_wait_forever/src/_arch/aarch64/cpu/boot.rs
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural boot code.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::boot::arch_boot
+
+// Assembly counterpart to this file. Includes function _start().
+global_asm!(include_str!("boot.S"));
diff --git a/01_wait_forever/src/bsp.rs b/01_wait_forever/src/bsp.rs
index 8f0d27c87..2b92251f5 100644
--- a/01_wait_forever/src/bsp.rs
+++ b/01_wait_forever/src/bsp.rs
@@ -2,7 +2,7 @@
 //
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-//! Conditional re-exporting of Board Support Packages.
+//! Conditional reexporting of Board Support Packages.
 
 #[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
 mod raspberrypi;
diff --git a/01_wait_forever/src/cpu.rs b/01_wait_forever/src/cpu.rs
index 27aea2041..c3962ff8e 100644
--- a/01_wait_forever/src/cpu.rs
+++ b/01_wait_forever/src/cpu.rs
@@ -4,7 +4,4 @@
 
 //! Processor code.
 
-#[cfg(target_arch = "aarch64")]
-#[path = "_arch/aarch64/cpu.rs"]
-mod arch_cpu;
-pub use arch_cpu::*;
+mod boot;
diff --git a/01_wait_forever/src/cpu/boot.rs b/01_wait_forever/src/cpu/boot.rs
new file mode 100644
index 000000000..1dc5c1808
--- /dev/null
+++ b/01_wait_forever/src/cpu/boot.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Boot code.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/cpu/boot.rs"]
+mod arch_boot;
diff --git a/01_wait_forever/src/main.rs b/01_wait_forever/src/main.rs
index 883453535..10cf6bb42 100644
--- a/01_wait_forever/src/main.rs
+++ b/01_wait_forever/src/main.rs
@@ -20,15 +20,22 @@
 //! `src/_arch`, for example, `src/_arch/aarch64`.
 //!
 //! The architecture folders mirror the subsystem modules laid out in `src`. For example,
-//! architectural code that belongs to the `kernel`'s memory subsystem (`src/memory.rs`) would go
-//! into `src/_arch/aarch64/memory.rs`. The latter file is directly included and re-exported in
-//! `src/memory.rs`, so that the architectural code parts are transparent with respect to the code's
-//! module organization. That means a public function `foo()` defined in
-//! `src/_arch/aarch64/memory.rs` would be reachable as `crate::memory::foo()` only.
+//! architectural code that belongs to the `kernel`'s MMU subsystem (`src/memory/mmu.rs`) would go
+//! into `src/_arch/aarch64/memory/mmu.rs`. The latter file is loaded as a module in
+//! `src/memory/mmu.rs` using the `path attribute`. Usually, the chosen module name is the generic
+//! module's name prefixed with `arch_`.
 //!
-//! The `_` in `_arch` denotes that this folder is not part of the standard module hierarchy.
-//! Rather, it's contents are conditionally pulled into respective files using the `#[path =
-//! "_arch/xxx/yyy.rs"]` attribute.
+//! For example, this is the top of `src/memory/mmu.rs`:
+//!
+//! ```
+//! #[cfg(target_arch = "aarch64")]
+//! #[path = "../_arch/aarch64/memory/mmu.rs"]
+//! mod arch_mmu;
+//! ```
+//!
+//! Often times, items from the `arch_ module` will be publicly reexported by the parent module.
+//! This way, each architecture specific module can provide its implementation of an item, while the
+//! caller must not be concerned which architecture has been conditionally compiled.
 //!
 //! ## BSP code
 //!
@@ -37,9 +44,8 @@
 //! or instances of drivers for devices that are featured on the respective board.
 //!
 //! Just like processor architecture code, the `BSP` code's module structure tries to mirror the
-//! `kernel`'s subsystem modules, but there is no transparent re-exporting this time. That means
-//! whatever is provided must be called starting from the `bsp` namespace, e.g.
-//! `bsp::driver::driver_manager()`.
+//! `kernel`'s subsystem modules, but there is no reexporting this time. That means whatever is
+//! provided must be called starting from the `bsp` namespace, e.g. `bsp::driver::driver_manager()`.
 //!
 //! ## Kernel interfaces
 //!
@@ -91,14 +97,17 @@
 //!
 //! - `crate::memory::*`
 //! - `crate::bsp::memory::*`
+//!
+//! # Boot flow
+//!
+//! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.S`.
 
 #![feature(asm)]
 #![feature(global_asm)]
 #![no_main]
 #![no_std]
 
-// `mod cpu` provides the `_start()` function, the first function to run.
-
 mod bsp;
 mod cpu;
 mod panic_wait;
diff --git a/02_runtime_init/Makefile b/02_runtime_init/Makefile
index ef6395f1b..abecc406b 100644
--- a/02_runtime_init/Makefile
+++ b/02_runtime_init/Makefile
@@ -34,8 +34,9 @@ export LINKER_FILE
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
+FEATURES      = bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
-    --features bsp_$(BSP)          \
+    --features $(FEATURES)         \
     --release
 
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
diff --git a/02_runtime_init/README.CN.md b/02_runtime_init/README.CN.md
index 1369031d6..0ffecb496 100644
--- a/02_runtime_init/README.CN.md
+++ b/02_runtime_init/README.CN.md
@@ -2,7 +2,7 @@
 
 ## tl;dr
 
-我们拓展了`cpu.S`，在第一次启动的时候调用Rust代码。在Rust的代码中先清零了[bss] section，然后通过调用`panic()`挂起CPU。再次运行`make qemu`看看新增加的代码是怎么运行的。
+我们拓展了`boot.S`，在第一次启动的时候调用Rust代码。在Rust的代码中先清零了[bss] section，然后通过调用`panic()`挂起CPU。再次运行`make qemu`看看新增加的代码是怎么运行的。
 
 ## 值得注意的变化
 
@@ -21,9 +21,23 @@
 ## 相比之前的变化（diff）
 ```diff
 
-diff -uNr 01_wait_forever/src/_arch/aarch64/cpu.S 02_runtime_init/src/_arch/aarch64/cpu.S
---- 01_wait_forever/src/_arch/aarch64/cpu.S
-+++ 02_runtime_init/src/_arch/aarch64/cpu.S
+diff -uNr 01_wait_forever/Cargo.toml 02_runtime_init/Cargo.toml
+--- 01_wait_forever/Cargo.toml
++++ 02_runtime_init/Cargo.toml
+@@ -4,6 +4,9 @@
+ authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+ edition = "2018"
+
++[profile.release]
++lto = true
++
+ # The features section is used to select the target board.
+ [features]
+ default = []
+
+diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.S 02_runtime_init/src/_arch/aarch64/cpu/boot.S
+--- 01_wait_forever/src/_arch/aarch64/cpu/boot.S
++++ 02_runtime_init/src/_arch/aarch64/cpu/boot.S
 @@ -7,5 +7,15 @@
  .global _start
 
@@ -43,10 +57,45 @@ diff -uNr 01_wait_forever/src/_arch/aarch64/cpu.S 02_runtime_init/src/_arch/aarc
 +    b       1b              // We should never reach here. But just in case,
 +                            // park this core aswell
 
+diff -uNr 01_wait_forever/src/_arch/aarch64/cpu.rs 02_runtime_init/src/_arch/aarch64/cpu.rs
+--- 01_wait_forever/src/_arch/aarch64/cpu.rs
++++ 02_runtime_init/src/_arch/aarch64/cpu.rs
+@@ -0,0 +1,30 @@
++// SPDX-License-Identifier: MIT OR Apache-2.0
++//
++// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
++
++//! Architectural processor code.
++//!
++//! # Orientation
++//!
++//! Since arch modules are imported into generic modules using the path attribute, the path of this
++//! file is:
++//!
++//! crate::cpu::arch_cpu
++
++//--------------------------------------------------------------------------------------------------
++// Public Code
++//--------------------------------------------------------------------------------------------------
++
++/// Pause execution on the core.
++#[inline(always)]
++pub fn wait_forever() -> ! {
++    unsafe {
++        loop {
++            #[rustfmt::skip]
++            asm!(
++                "wfe",
++                options(nomem, nostack, preserves_flags)
++            );
++        }
++    }
++}
+
 diff -uNr 01_wait_forever/src/bsp/raspberrypi/link.ld 02_runtime_init/src/bsp/raspberrypi/link.ld
 --- 01_wait_forever/src/bsp/raspberrypi/link.ld
 +++ 02_runtime_init/src/bsp/raspberrypi/link.ld
-@@ -13,5 +13,24 @@
+@@ -13,5 +13,27 @@
          *(.text._start) *(.text*)
      }
 
@@ -66,22 +115,97 @@ diff -uNr 01_wait_forever/src/bsp/raspberrypi/link.ld 02_runtime_init/src/bsp/ra
 +        __bss_start = .;
 +        *(.bss*);
 +        . = ALIGN(8);
-+        __bss_end = .;
++
++        /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
++        . += 8;
++        __bss_end_inclusive = . - 8;
 +    }
 +
      /DISCARD/ : { *(.comment*) }
  }
 
+diff -uNr 01_wait_forever/src/bsp/raspberrypi/memory.rs 02_runtime_init/src/bsp/raspberrypi/memory.rs
+--- 01_wait_forever/src/bsp/raspberrypi/memory.rs
++++ 02_runtime_init/src/bsp/raspberrypi/memory.rs
+@@ -0,0 +1,37 @@
++// SPDX-License-Identifier: MIT OR Apache-2.0
++//
++// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
++
++//! BSP Memory Management.
++
++use core::{cell::UnsafeCell, ops::RangeInclusive};
++
++//--------------------------------------------------------------------------------------------------
++// Private Definitions
++//--------------------------------------------------------------------------------------------------
++
++// Symbols from the linker script.
++extern "Rust" {
++    static __bss_start: UnsafeCell<u64>;
++    static __bss_end_inclusive: UnsafeCell<u64>;
++}
++
++//--------------------------------------------------------------------------------------------------
++// Public Code
++//--------------------------------------------------------------------------------------------------
++
++/// Return the inclusive range spanning the .bss section.
++///
++/// # Safety
++///
++/// - Values are provided by the linker script and must be trusted as-is.
++/// - The linker-provided addresses must be u64 aligned.
++pub fn bss_range_inclusive() -> RangeInclusive<*mut u64> {
++    let range;
++    unsafe {
++        range = RangeInclusive::new(__bss_start.get(), __bss_end_inclusive.get());
++    }
++    assert!(!range.is_empty());
++
++    range
++}
+
+diff -uNr 01_wait_forever/src/bsp/raspberrypi.rs 02_runtime_init/src/bsp/raspberrypi.rs
+--- 01_wait_forever/src/bsp/raspberrypi.rs
++++ 02_runtime_init/src/bsp/raspberrypi.rs
+@@ -4,4 +4,4 @@
+
+ //! Top-level BSP file for the Raspberry Pi 3 and 4.
+
+-// Coming soon.
++pub mod memory;
+
+diff -uNr 01_wait_forever/src/cpu.rs 02_runtime_init/src/cpu.rs
+--- 01_wait_forever/src/cpu.rs
++++ 02_runtime_init/src/cpu.rs
+@@ -4,4 +4,13 @@
+
+ //! Processor code.
+
++#[cfg(target_arch = "aarch64")]
++#[path = "_arch/aarch64/cpu.rs"]
++mod arch_cpu;
++
+ mod boot;
++
++//--------------------------------------------------------------------------------------------------
++// Architectural Public Reexports
++//--------------------------------------------------------------------------------------------------
++pub use arch_cpu::wait_forever;
+
 diff -uNr 01_wait_forever/src/main.rs 02_runtime_init/src/main.rs
 --- 01_wait_forever/src/main.rs
 +++ 02_runtime_init/src/main.rs
-@@ -97,10 +97,20 @@
- #![no_main]
- #![no_std]
+@@ -102,6 +102,7 @@
+ //!
+ //! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
+ //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
++//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
+ //!
+ //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 
--// `mod cpu` provides the `_start()` function, the first function to run.
-+// `mod cpu` provides the `_start()` function, the first function to run. `_start()` then calls
-+// `runtime_init()`, which jumps to `kernel_init()`.
+@@ -112,6 +113,15 @@
 
  mod bsp;
  mod cpu;
@@ -102,73 +226,70 @@ diff -uNr 01_wait_forever/src/main.rs 02_runtime_init/src/main.rs
 diff -uNr 01_wait_forever/src/memory.rs 02_runtime_init/src/memory.rs
 --- 01_wait_forever/src/memory.rs
 +++ 02_runtime_init/src/memory.rs
-@@ -0,0 +1,29 @@
+@@ -0,0 +1,30 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Memory Management.
 +
-+use core::ops::Range;
++use core::ops::RangeInclusive;
 +
 +//--------------------------------------------------------------------------------------------------
 +// Public Code
 +//--------------------------------------------------------------------------------------------------
 +
-+/// Zero out a memory region.
++/// Zero out an inclusive memory range.
 +///
 +/// # Safety
 +///
 +/// - `range.start` and `range.end` must be valid.
 +/// - `range.start` and `range.end` must be `T` aligned.
-+pub unsafe fn zero_volatile<T>(range: Range<*mut T>)
++pub unsafe fn zero_volatile<T>(range: RangeInclusive<*mut T>)
 +where
 +    T: From<u8>,
 +{
-+    let mut ptr = range.start;
++    let mut ptr = *range.start();
++    let end_inclusive = *range.end();
 +
-+    while ptr < range.end {
++    while ptr <= end_inclusive {
 +        core::ptr::write_volatile(ptr, T::from(0));
 +        ptr = ptr.offset(1);
 +    }
 +}
 
+diff -uNr 01_wait_forever/src/panic_wait.rs 02_runtime_init/src/panic_wait.rs
+--- 01_wait_forever/src/panic_wait.rs
++++ 02_runtime_init/src/panic_wait.rs
+@@ -4,9 +4,10 @@
+
+ //! A panic handler that infinitely waits.
+
++use crate::cpu;
+ use core::panic::PanicInfo;
+
+ #[panic_handler]
+ fn panic(_info: &PanicInfo) -> ! {
+-    unimplemented!()
++    cpu::wait_forever()
+ }
+
 diff -uNr 01_wait_forever/src/runtime_init.rs 02_runtime_init/src/runtime_init.rs
 --- 01_wait_forever/src/runtime_init.rs
 +++ 02_runtime_init/src/runtime_init.rs
-@@ -0,0 +1,58 @@
+@@ -0,0 +1,38 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Rust runtime initialization code.
 +
-+use crate::memory;
-+use core::ops::Range;
++use crate::{bsp, memory};
 +
 +//--------------------------------------------------------------------------------------------------
 +// Private Code
 +//--------------------------------------------------------------------------------------------------
 +
-+/// Return the range spanning the .bss section.
-+///
-+/// # Safety
-+///
-+/// - The symbol-provided addresses must be valid.
-+/// - The symbol-provided addresses must be usize aligned.
-+unsafe fn bss_range() -> Range<*mut usize> {
-+    extern "C" {
-+        // Boundaries of the .bss section, provided by linker script symbols.
-+        static mut __bss_start: usize;
-+        static mut __bss_end: usize;
-+    }
-+
-+    Range {
-+        start: &mut __bss_start,
-+        end: &mut __bss_end,
-+    }
-+}
-+
 +/// Zero out the .bss section.
 +///
 +/// # Safety
@@ -176,7 +297,7 @@ diff -uNr 01_wait_forever/src/runtime_init.rs 02_runtime_init/src/runtime_init.r
 +/// - Must only be called pre `kernel_init()`.
 +#[inline(always)]
 +unsafe fn zero_bss() {
-+    memory::zero_volatile(bss_range());
++    memory::zero_volatile(bsp::memory::bss_range_inclusive());
 +}
 +
 +//--------------------------------------------------------------------------------------------------
@@ -190,7 +311,7 @@ diff -uNr 01_wait_forever/src/runtime_init.rs 02_runtime_init/src/runtime_init.r
 +///
 +/// - Only a single core must be active and running this function.
 +#[no_mangle]
-+pub unsafe extern "C" fn runtime_init() -> ! {
++pub unsafe fn runtime_init() -> ! {
 +    zero_bss();
 +
 +    crate::kernel_init()
diff --git a/02_runtime_init/README.md b/02_runtime_init/README.md
index 206424f9e..7948aae4a 100644
--- a/02_runtime_init/README.md
+++ b/02_runtime_init/README.md
@@ -2,7 +2,7 @@
 
 ## tl;dr
 
-- We extend `cpu.S` to call into Rust code for the first time. There, we zero the [bss] section
+- We extend `boot.S` to call into Rust code for the first time. There, we zero the [bss] section
   before execution is halted with a call to `panic()`.
 - Check out `make qemu` again to see the additional code run.
 
@@ -37,13 +37,44 @@ diff -uNr 01_wait_forever/Cargo.toml 02_runtime_init/Cargo.toml
  [features]
  default = []
 
+diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.S 02_runtime_init/src/_arch/aarch64/cpu/boot.S
+--- 01_wait_forever/src/_arch/aarch64/cpu/boot.S
++++ 02_runtime_init/src/_arch/aarch64/cpu/boot.S
+@@ -7,5 +7,15 @@
+ .global _start
+
+ _start:
+-1:  wfe         // Wait for event
+-    b       1b  // In case an event happened, jump back to 1
++    mrs     x1, mpidr_el1   // Read Multiprocessor Affinity Register
++    and     x1, x1, #3      // Clear all bits except [1:0], which hold core id
++    cbz     x1, 2f          // Jump to label 2 if we are core 0
++1:  wfe                     // Wait for event
++    b       1b              // In case an event happened, jump back to 1
++2:                          // If we are here, we are core0
++    ldr     x1, =_start     // Load address of function "_start()"
++    mov     sp, x1          // Set start of stack to before our code, aka first
++                            // address before "_start()"
++    bl      runtime_init    // Jump to the "runtime_init()" kernel function
++    b       1b              // We should never reach here. But just in case,
++                            // park this core aswell
+
 diff -uNr 01_wait_forever/src/_arch/aarch64/cpu.rs 02_runtime_init/src/_arch/aarch64/cpu.rs
 --- 01_wait_forever/src/_arch/aarch64/cpu.rs
 +++ 02_runtime_init/src/_arch/aarch64/cpu.rs
-@@ -6,3 +6,21 @@
-
- // Assembly counterpart to this file.
- global_asm!(include_str!("cpu.S"));
+@@ -0,0 +1,30 @@
++// SPDX-License-Identifier: MIT OR Apache-2.0
++//
++// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
++
++//! Architectural processor code.
++//!
++//! # Orientation
++//!
++//! Since arch modules are imported into generic modules using the path attribute, the path of this
++//! file is:
++//!
++//! crate::cpu::arch_cpu
 +
 +//--------------------------------------------------------------------------------------------------
 +// Public Code
@@ -63,28 +94,6 @@ diff -uNr 01_wait_forever/src/_arch/aarch64/cpu.rs 02_runtime_init/src/_arch/aar
 +    }
 +}
 
-diff -uNr 01_wait_forever/src/_arch/aarch64/cpu.S 02_runtime_init/src/_arch/aarch64/cpu.S
---- 01_wait_forever/src/_arch/aarch64/cpu.S
-+++ 02_runtime_init/src/_arch/aarch64/cpu.S
-@@ -7,5 +7,15 @@
- .global _start
-
- _start:
--1:  wfe         // Wait for event
--    b       1b  // In case an event happened, jump back to 1
-+    mrs     x1, mpidr_el1   // Read Multiprocessor Affinity Register
-+    and     x1, x1, #3      // Clear all bits except [1:0], which hold core id
-+    cbz     x1, 2f          // Jump to label 2 if we are core 0
-+1:  wfe                     // Wait for event
-+    b       1b              // In case an event happened, jump back to 1
-+2:                          // If we are here, we are core0
-+    ldr     x1, =_start     // Load address of function "_start()"
-+    mov     sp, x1          // Set start of stack to before our code, aka first
-+                            // address before "_start()"
-+    bl      runtime_init    // Jump to the "runtime_init()" kernel function
-+    b       1b              // We should never reach here. But just in case,
-+                            // park this core aswell
-
 diff -uNr 01_wait_forever/src/bsp/raspberrypi/link.ld 02_runtime_init/src/bsp/raspberrypi/link.ld
 --- 01_wait_forever/src/bsp/raspberrypi/link.ld
 +++ 02_runtime_init/src/bsp/raspberrypi/link.ld
@@ -169,16 +178,36 @@ diff -uNr 01_wait_forever/src/bsp/raspberrypi.rs 02_runtime_init/src/bsp/raspber
 -// Coming soon.
 +pub mod memory;
 
+diff -uNr 01_wait_forever/src/cpu.rs 02_runtime_init/src/cpu.rs
+--- 01_wait_forever/src/cpu.rs
++++ 02_runtime_init/src/cpu.rs
+@@ -4,4 +4,13 @@
+
+ //! Processor code.
+
++#[cfg(target_arch = "aarch64")]
++#[path = "_arch/aarch64/cpu.rs"]
++mod arch_cpu;
++
+ mod boot;
++
++//--------------------------------------------------------------------------------------------------
++// Architectural Public Reexports
++//--------------------------------------------------------------------------------------------------
++pub use arch_cpu::wait_forever;
+
 diff -uNr 01_wait_forever/src/main.rs 02_runtime_init/src/main.rs
 --- 01_wait_forever/src/main.rs
 +++ 02_runtime_init/src/main.rs
-@@ -97,10 +97,20 @@
- #![no_main]
- #![no_std]
+@@ -102,6 +102,7 @@
+ //!
+ //! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
+ //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.S`.
++//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
 
--// `mod cpu` provides the `_start()` function, the first function to run.
-+// `mod cpu` provides the `_start()` function, the first function to run. `_start()` then calls
-+// `runtime_init()`, which jumps to `kernel_init()`.
+ #![feature(asm)]
+ #![feature(global_asm)]
+@@ -110,6 +111,15 @@
 
  mod bsp;
  mod cpu;
diff --git a/02_runtime_init/src/_arch/aarch64/cpu.rs b/02_runtime_init/src/_arch/aarch64/cpu.rs
index 6ca5986aa..4fd7e3132 100644
--- a/02_runtime_init/src/_arch/aarch64/cpu.rs
+++ b/02_runtime_init/src/_arch/aarch64/cpu.rs
@@ -3,9 +3,13 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
-
-// Assembly counterpart to this file.
-global_asm!(include_str!("cpu.S"));
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::arch_cpu
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/02_runtime_init/src/_arch/aarch64/cpu.S b/02_runtime_init/src/_arch/aarch64/cpu/boot.S
similarity index 100%
rename from 02_runtime_init/src/_arch/aarch64/cpu.S
rename to 02_runtime_init/src/_arch/aarch64/cpu/boot.S
diff --git a/02_runtime_init/src/_arch/aarch64/cpu/boot.rs b/02_runtime_init/src/_arch/aarch64/cpu/boot.rs
new file mode 100644
index 000000000..c3c325d3a
--- /dev/null
+++ b/02_runtime_init/src/_arch/aarch64/cpu/boot.rs
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural boot code.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::boot::arch_boot
+
+// Assembly counterpart to this file. Includes function _start().
+global_asm!(include_str!("boot.S"));
diff --git a/02_runtime_init/src/bsp.rs b/02_runtime_init/src/bsp.rs
index 8f0d27c87..2b92251f5 100644
--- a/02_runtime_init/src/bsp.rs
+++ b/02_runtime_init/src/bsp.rs
@@ -2,7 +2,7 @@
 //
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-//! Conditional re-exporting of Board Support Packages.
+//! Conditional reexporting of Board Support Packages.
 
 #[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
 mod raspberrypi;
diff --git a/02_runtime_init/src/cpu.rs b/02_runtime_init/src/cpu.rs
index 27aea2041..d8f780823 100644
--- a/02_runtime_init/src/cpu.rs
+++ b/02_runtime_init/src/cpu.rs
@@ -7,4 +7,10 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "_arch/aarch64/cpu.rs"]
 mod arch_cpu;
-pub use arch_cpu::*;
+
+mod boot;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_cpu::wait_forever;
diff --git a/02_runtime_init/src/cpu/boot.rs b/02_runtime_init/src/cpu/boot.rs
new file mode 100644
index 000000000..1dc5c1808
--- /dev/null
+++ b/02_runtime_init/src/cpu/boot.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Boot code.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/cpu/boot.rs"]
+mod arch_boot;
diff --git a/02_runtime_init/src/main.rs b/02_runtime_init/src/main.rs
index 76e7a772f..ba5a877c7 100644
--- a/02_runtime_init/src/main.rs
+++ b/02_runtime_init/src/main.rs
@@ -20,15 +20,22 @@
 //! `src/_arch`, for example, `src/_arch/aarch64`.
 //!
 //! The architecture folders mirror the subsystem modules laid out in `src`. For example,
-//! architectural code that belongs to the `kernel`'s memory subsystem (`src/memory.rs`) would go
-//! into `src/_arch/aarch64/memory.rs`. The latter file is directly included and re-exported in
-//! `src/memory.rs`, so that the architectural code parts are transparent with respect to the code's
-//! module organization. That means a public function `foo()` defined in
-//! `src/_arch/aarch64/memory.rs` would be reachable as `crate::memory::foo()` only.
+//! architectural code that belongs to the `kernel`'s MMU subsystem (`src/memory/mmu.rs`) would go
+//! into `src/_arch/aarch64/memory/mmu.rs`. The latter file is loaded as a module in
+//! `src/memory/mmu.rs` using the `path attribute`. Usually, the chosen module name is the generic
+//! module's name prefixed with `arch_`.
 //!
-//! The `_` in `_arch` denotes that this folder is not part of the standard module hierarchy.
-//! Rather, it's contents are conditionally pulled into respective files using the `#[path =
-//! "_arch/xxx/yyy.rs"]` attribute.
+//! For example, this is the top of `src/memory/mmu.rs`:
+//!
+//! ```
+//! #[cfg(target_arch = "aarch64")]
+//! #[path = "../_arch/aarch64/memory/mmu.rs"]
+//! mod arch_mmu;
+//! ```
+//!
+//! Often times, items from the `arch_ module` will be publicly reexported by the parent module.
+//! This way, each architecture specific module can provide its implementation of an item, while the
+//! caller must not be concerned which architecture has been conditionally compiled.
 //!
 //! ## BSP code
 //!
@@ -37,9 +44,8 @@
 //! or instances of drivers for devices that are featured on the respective board.
 //!
 //! Just like processor architecture code, the `BSP` code's module structure tries to mirror the
-//! `kernel`'s subsystem modules, but there is no transparent re-exporting this time. That means
-//! whatever is provided must be called starting from the `bsp` namespace, e.g.
-//! `bsp::driver::driver_manager()`.
+//! `kernel`'s subsystem modules, but there is no reexporting this time. That means whatever is
+//! provided must be called starting from the `bsp` namespace, e.g. `bsp::driver::driver_manager()`.
 //!
 //! ## Kernel interfaces
 //!
@@ -91,15 +97,18 @@
 //!
 //! - `crate::memory::*`
 //! - `crate::bsp::memory::*`
+//!
+//! # Boot flow
+//!
+//! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.S`.
+//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
 
 #![feature(asm)]
 #![feature(global_asm)]
 #![no_main]
 #![no_std]
 
-// `mod cpu` provides the `_start()` function, the first function to run. `_start()` then calls
-// `runtime_init()`, which jumps to `kernel_init()`.
-
 mod bsp;
 mod cpu;
 mod memory;
diff --git a/03_hacky_hello_world/Makefile b/03_hacky_hello_world/Makefile
index 90238d091..9d5a8f78b 100644
--- a/03_hacky_hello_world/Makefile
+++ b/03_hacky_hello_world/Makefile
@@ -34,8 +34,9 @@ export LINKER_FILE
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
+FEATURES      = bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
-    --features bsp_$(BSP)          \
+    --features $(FEATURES)         \
     --release
 
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
diff --git a/03_hacky_hello_world/README.md b/03_hacky_hello_world/README.md
index 95760f02d..11c804bff 100644
--- a/03_hacky_hello_world/README.md
+++ b/03_hacky_hello_world/README.md
@@ -139,8 +139,17 @@ diff -uNr 02_runtime_init/src/console.rs 03_hacky_hello_world/src/console.rs
 diff -uNr 02_runtime_init/src/main.rs 03_hacky_hello_world/src/main.rs
 --- 02_runtime_init/src/main.rs
 +++ 03_hacky_hello_world/src/main.rs
-@@ -93,7 +93,9 @@
- //! - `crate::bsp::memory::*`
+@@ -100,19 +100,25 @@
+ //!
+ //! # Boot flow
+ //!
+-//! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
+-//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.S`.
++//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
++//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
+ //! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
++//!
++//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 
  #![feature(asm)]
 +#![feature(format_args_nl)]
@@ -149,9 +158,6 @@ diff -uNr 02_runtime_init/src/main.rs 03_hacky_hello_world/src/main.rs
  #![no_main]
  #![no_std]
 
-@@ -101,9 +103,11 @@
- // `runtime_init()`, which jumps to `kernel_init()`.
-
  mod bsp;
 +mod console;
  mod cpu;
@@ -161,7 +167,7 @@ diff -uNr 02_runtime_init/src/main.rs 03_hacky_hello_world/src/main.rs
  mod runtime_init;
 
  /// Early init code.
-@@ -112,5 +116,7 @@
+@@ -121,5 +127,7 @@
  ///
  /// - Only a single core must be active and running this function.
  unsafe fn kernel_init() -> ! {
@@ -202,7 +208,7 @@ diff -uNr 02_runtime_init/src/print.rs 03_hacky_hello_world/src/print.rs
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 +
-+//! Printing facilities.
++//! Printing.
 +
 +use crate::{bsp, console};
 +use core::fmt;
diff --git a/03_hacky_hello_world/src/_arch/aarch64/cpu.rs b/03_hacky_hello_world/src/_arch/aarch64/cpu.rs
index 6ca5986aa..4fd7e3132 100644
--- a/03_hacky_hello_world/src/_arch/aarch64/cpu.rs
+++ b/03_hacky_hello_world/src/_arch/aarch64/cpu.rs
@@ -3,9 +3,13 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
-
-// Assembly counterpart to this file.
-global_asm!(include_str!("cpu.S"));
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::arch_cpu
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/03_hacky_hello_world/src/_arch/aarch64/cpu.S b/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.S
similarity index 100%
rename from 03_hacky_hello_world/src/_arch/aarch64/cpu.S
rename to 03_hacky_hello_world/src/_arch/aarch64/cpu/boot.S
diff --git a/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.rs b/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.rs
new file mode 100644
index 000000000..c3c325d3a
--- /dev/null
+++ b/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.rs
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural boot code.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::boot::arch_boot
+
+// Assembly counterpart to this file. Includes function _start().
+global_asm!(include_str!("boot.S"));
diff --git a/03_hacky_hello_world/src/bsp.rs b/03_hacky_hello_world/src/bsp.rs
index 8f0d27c87..2b92251f5 100644
--- a/03_hacky_hello_world/src/bsp.rs
+++ b/03_hacky_hello_world/src/bsp.rs
@@ -2,7 +2,7 @@
 //
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-//! Conditional re-exporting of Board Support Packages.
+//! Conditional reexporting of Board Support Packages.
 
 #[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
 mod raspberrypi;
diff --git a/03_hacky_hello_world/src/cpu.rs b/03_hacky_hello_world/src/cpu.rs
index 27aea2041..d8f780823 100644
--- a/03_hacky_hello_world/src/cpu.rs
+++ b/03_hacky_hello_world/src/cpu.rs
@@ -7,4 +7,10 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "_arch/aarch64/cpu.rs"]
 mod arch_cpu;
-pub use arch_cpu::*;
+
+mod boot;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_cpu::wait_forever;
diff --git a/03_hacky_hello_world/src/cpu/boot.rs b/03_hacky_hello_world/src/cpu/boot.rs
new file mode 100644
index 000000000..1dc5c1808
--- /dev/null
+++ b/03_hacky_hello_world/src/cpu/boot.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Boot code.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/cpu/boot.rs"]
+mod arch_boot;
diff --git a/03_hacky_hello_world/src/main.rs b/03_hacky_hello_world/src/main.rs
index 3a4cf64c4..378e0bafb 100644
--- a/03_hacky_hello_world/src/main.rs
+++ b/03_hacky_hello_world/src/main.rs
@@ -20,15 +20,22 @@
 //! `src/_arch`, for example, `src/_arch/aarch64`.
 //!
 //! The architecture folders mirror the subsystem modules laid out in `src`. For example,
-//! architectural code that belongs to the `kernel`'s memory subsystem (`src/memory.rs`) would go
-//! into `src/_arch/aarch64/memory.rs`. The latter file is directly included and re-exported in
-//! `src/memory.rs`, so that the architectural code parts are transparent with respect to the code's
-//! module organization. That means a public function `foo()` defined in
-//! `src/_arch/aarch64/memory.rs` would be reachable as `crate::memory::foo()` only.
+//! architectural code that belongs to the `kernel`'s MMU subsystem (`src/memory/mmu.rs`) would go
+//! into `src/_arch/aarch64/memory/mmu.rs`. The latter file is loaded as a module in
+//! `src/memory/mmu.rs` using the `path attribute`. Usually, the chosen module name is the generic
+//! module's name prefixed with `arch_`.
 //!
-//! The `_` in `_arch` denotes that this folder is not part of the standard module hierarchy.
-//! Rather, it's contents are conditionally pulled into respective files using the `#[path =
-//! "_arch/xxx/yyy.rs"]` attribute.
+//! For example, this is the top of `src/memory/mmu.rs`:
+//!
+//! ```
+//! #[cfg(target_arch = "aarch64")]
+//! #[path = "../_arch/aarch64/memory/mmu.rs"]
+//! mod arch_mmu;
+//! ```
+//!
+//! Often times, items from the `arch_ module` will be publicly reexported by the parent module.
+//! This way, each architecture specific module can provide its implementation of an item, while the
+//! caller must not be concerned which architecture has been conditionally compiled.
 //!
 //! ## BSP code
 //!
@@ -37,9 +44,8 @@
 //! or instances of drivers for devices that are featured on the respective board.
 //!
 //! Just like processor architecture code, the `BSP` code's module structure tries to mirror the
-//! `kernel`'s subsystem modules, but there is no transparent re-exporting this time. That means
-//! whatever is provided must be called starting from the `bsp` namespace, e.g.
-//! `bsp::driver::driver_manager()`.
+//! `kernel`'s subsystem modules, but there is no reexporting this time. That means whatever is
+//! provided must be called starting from the `bsp` namespace, e.g. `bsp::driver::driver_manager()`.
 //!
 //! ## Kernel interfaces
 //!
@@ -91,6 +97,14 @@
 //!
 //! - `crate::memory::*`
 //! - `crate::bsp::memory::*`
+//!
+//! # Boot flow
+//!
+//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
+//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
+//!
+//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 
 #![feature(asm)]
 #![feature(format_args_nl)]
@@ -99,9 +113,6 @@
 #![no_main]
 #![no_std]
 
-// `mod cpu` provides the `_start()` function, the first function to run. `_start()` then calls
-// `runtime_init()`, which jumps to `kernel_init()`.
-
 mod bsp;
 mod console;
 mod cpu;
diff --git a/03_hacky_hello_world/src/print.rs b/03_hacky_hello_world/src/print.rs
index 59ec9e8ee..fa6451c75 100644
--- a/03_hacky_hello_world/src/print.rs
+++ b/03_hacky_hello_world/src/print.rs
@@ -2,7 +2,7 @@
 //
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-//! Printing facilities.
+//! Printing.
 
 use crate::{bsp, console};
 use core::fmt;
diff --git a/04_zero_overhead_abstraction/Makefile b/04_zero_overhead_abstraction/Makefile
index 90238d091..9d5a8f78b 100644
--- a/04_zero_overhead_abstraction/Makefile
+++ b/04_zero_overhead_abstraction/Makefile
@@ -34,8 +34,9 @@ export LINKER_FILE
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
+FEATURES      = bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
-    --features bsp_$(BSP)          \
+    --features $(FEATURES)         \
     --release
 
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
diff --git a/04_zero_overhead_abstraction/README.md b/04_zero_overhead_abstraction/README.md
index ce452fb79..6c9ad70c4 100644
--- a/04_zero_overhead_abstraction/README.md
+++ b/04_zero_overhead_abstraction/README.md
@@ -23,47 +23,20 @@ diff -uNr 03_hacky_hello_world/Cargo.toml 04_zero_overhead_abstraction/Cargo.tom
 +cortex-a = { version = "5.x.x" }
 +
 
-diff -uNr 03_hacky_hello_world/src/_arch/aarch64/cpu/smp.rs 04_zero_overhead_abstraction/src/_arch/aarch64/cpu/smp.rs
---- 03_hacky_hello_world/src/_arch/aarch64/cpu/smp.rs
-+++ 04_zero_overhead_abstraction/src/_arch/aarch64/cpu/smp.rs
-@@ -0,0 +1,22 @@
-+// SPDX-License-Identifier: MIT OR Apache-2.0
-+//
-+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-+
-+//! Architectural symmetric multiprocessing.
-+
-+use cortex_a::regs::*;
-+
-+//--------------------------------------------------------------------------------------------------
-+// Public Code
-+//--------------------------------------------------------------------------------------------------
-+
-+/// Return the executing core's id.
-+#[inline(always)]
-+pub fn core_id<T>() -> T
-+where
-+    T: From<u8>,
-+{
-+    const CORE_MASK: u64 = 0b11;
-+
-+    T::from((MPIDR_EL1.get() & CORE_MASK) as u8)
-+}
+diff -uNr 03_hacky_hello_world/src/_arch/aarch64/cpu/boot.rs 04_zero_overhead_abstraction/src/_arch/aarch64/cpu/boot.rs
+--- 03_hacky_hello_world/src/_arch/aarch64/cpu/boot.rs
++++ 04_zero_overhead_abstraction/src/_arch/aarch64/cpu/boot.rs
+@@ -11,5 +11,31 @@
+ //!
+ //! crate::cpu::boot::arch_boot
 
-diff -uNr 03_hacky_hello_world/src/_arch/aarch64/cpu.rs 04_zero_overhead_abstraction/src/_arch/aarch64/cpu.rs
---- 03_hacky_hello_world/src/_arch/aarch64/cpu.rs
-+++ 04_zero_overhead_abstraction/src/_arch/aarch64/cpu.rs
-@@ -4,8 +4,34 @@
-
- //! Architectural processor code.
-
--// Assembly counterpart to this file.
--global_asm!(include_str!("cpu.S"));
+-// Assembly counterpart to this file. Includes function _start().
+-global_asm!(include_str!("boot.S"));
 +use crate::{bsp, cpu};
-+use cortex_a::{asm, regs::*};
++use cortex_a::regs::*;
 +
 +//--------------------------------------------------------------------------------------------------
-+// Boot Code
++// Public Code
 +//--------------------------------------------------------------------------------------------------
 +
 +/// The entry of the `kernel` binary.
@@ -84,32 +57,13 @@ diff -uNr 03_hacky_hello_world/src/_arch/aarch64/cpu.rs 04_zero_overhead_abstrac
 +        runtime_init::runtime_init()
 +    } else {
 +        // If not core0, infinitely wait for events.
-+        wait_forever()
++        cpu::wait_forever()
 +    }
 +}
 
- //--------------------------------------------------------------------------------------------------
- // Public Code
-@@ -14,13 +40,7 @@
- /// Pause execution on the core.
- #[inline(always)]
- pub fn wait_forever() -> ! {
--    unsafe {
--        loop {
--            #[rustfmt::skip]
--            asm!(
--                "wfe",
--                options(nomem, nostack, preserves_flags)
--            );
--        }
-+    loop {
-+        asm::wfe()
-     }
- }
-
-diff -uNr 03_hacky_hello_world/src/_arch/aarch64/cpu.S 04_zero_overhead_abstraction/src/_arch/aarch64/cpu.S
---- 03_hacky_hello_world/src/_arch/aarch64/cpu.S
-+++ 04_zero_overhead_abstraction/src/_arch/aarch64/cpu.S
+diff -uNr 03_hacky_hello_world/src/_arch/aarch64/cpu/boot.S 04_zero_overhead_abstraction/src/_arch/aarch64/cpu/boot.S
+--- 03_hacky_hello_world/src/_arch/aarch64/cpu/boot.S
++++ 04_zero_overhead_abstraction/src/_arch/aarch64/cpu/boot.S
 @@ -1,21 +0,0 @@
 -// SPDX-License-Identifier: MIT OR Apache-2.0
 -//
@@ -133,6 +87,69 @@ diff -uNr 03_hacky_hello_world/src/_arch/aarch64/cpu.S 04_zero_overhead_abstract
 -    b       1b              // We should never reach here. But just in case,
 -                            // park this core aswell
 
+diff -uNr 03_hacky_hello_world/src/_arch/aarch64/cpu/smp.rs 04_zero_overhead_abstraction/src/_arch/aarch64/cpu/smp.rs
+--- 03_hacky_hello_world/src/_arch/aarch64/cpu/smp.rs
++++ 04_zero_overhead_abstraction/src/_arch/aarch64/cpu/smp.rs
+@@ -0,0 +1,29 @@
++// SPDX-License-Identifier: MIT OR Apache-2.0
++//
++// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
++
++//! Architectural symmetric multiprocessing.
++//!
++//! # Orientation
++//!
++//! Since arch modules are imported into generic modules using the path attribute, the path of this
++//! file is:
++//!
++//! crate::cpu::smp::arch_smp
++
++use cortex_a::regs::*;
++
++//--------------------------------------------------------------------------------------------------
++// Public Code
++//--------------------------------------------------------------------------------------------------
++
++/// Return the executing core's id.
++#[inline(always)]
++pub fn core_id<T>() -> T
++where
++    T: From<u8>,
++{
++    const CORE_MASK: u64 = 0b11;
++
++    T::from((MPIDR_EL1.get() & CORE_MASK) as u8)
++}
+
+diff -uNr 03_hacky_hello_world/src/_arch/aarch64/cpu.rs 04_zero_overhead_abstraction/src/_arch/aarch64/cpu.rs
+--- 03_hacky_hello_world/src/_arch/aarch64/cpu.rs
++++ 04_zero_overhead_abstraction/src/_arch/aarch64/cpu.rs
+@@ -11,6 +11,8 @@
+ //!
+ //! crate::cpu::arch_cpu
+
++use cortex_a::asm;
++
+ //--------------------------------------------------------------------------------------------------
+ // Public Code
+ //--------------------------------------------------------------------------------------------------
+@@ -18,13 +20,7 @@
+ /// Pause execution on the core.
+ #[inline(always)]
+ pub fn wait_forever() -> ! {
+-    unsafe {
+-        loop {
+-            #[rustfmt::skip]
+-            asm!(
+-                "wfe",
+-                options(nomem, nostack, preserves_flags)
+-            );
+-        }
++    loop {
++        asm::wfe()
+     }
+ }
+
 diff -uNr 03_hacky_hello_world/src/bsp/raspberrypi/cpu.rs 04_zero_overhead_abstraction/src/bsp/raspberrypi/cpu.rs
 --- 03_hacky_hello_world/src/bsp/raspberrypi/cpu.rs
 +++ 04_zero_overhead_abstraction/src/bsp/raspberrypi/cpu.rs
@@ -193,7 +210,7 @@ diff -uNr 03_hacky_hello_world/src/bsp/raspberrypi.rs 04_zero_overhead_abstracti
 diff -uNr 03_hacky_hello_world/src/cpu/smp.rs 04_zero_overhead_abstraction/src/cpu/smp.rs
 --- 03_hacky_hello_world/src/cpu/smp.rs
 +++ 04_zero_overhead_abstraction/src/cpu/smp.rs
-@@ -0,0 +1,10 @@
+@@ -0,0 +1,14 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -202,25 +219,32 @@ diff -uNr 03_hacky_hello_world/src/cpu/smp.rs 04_zero_overhead_abstraction/src/c
 +
 +#[cfg(target_arch = "aarch64")]
 +#[path = "../_arch/aarch64/cpu/smp.rs"]
-+mod arch_cpu_smp;
-+pub use arch_cpu_smp::*;
++mod arch_smp;
++
++//--------------------------------------------------------------------------------------------------
++// Architectural Public Reexports
++//--------------------------------------------------------------------------------------------------
++pub use arch_smp::core_id;
 
 diff -uNr 03_hacky_hello_world/src/cpu.rs 04_zero_overhead_abstraction/src/cpu.rs
 --- 03_hacky_hello_world/src/cpu.rs
 +++ 04_zero_overhead_abstraction/src/cpu.rs
-@@ -8,3 +8,5 @@
- #[path = "_arch/aarch64/cpu.rs"]
- mod arch_cpu;
- pub use arch_cpu::*;
-+
+@@ -10,6 +10,8 @@
+
+ mod boot;
+
 +pub mod smp;
++
+ //--------------------------------------------------------------------------------------------------
+ // Architectural Public Reexports
+ //--------------------------------------------------------------------------------------------------
 
 diff -uNr 03_hacky_hello_world/src/main.rs 04_zero_overhead_abstraction/src/main.rs
 --- 03_hacky_hello_world/src/main.rs
 +++ 04_zero_overhead_abstraction/src/main.rs
-@@ -92,9 +92,7 @@
- //! - `crate::memory::*`
- //! - `crate::bsp::memory::*`
+@@ -106,9 +106,7 @@
+ //!
+ //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 
 -#![feature(asm)]
  #![feature(format_args_nl)]
@@ -228,7 +252,7 @@ diff -uNr 03_hacky_hello_world/src/main.rs 04_zero_overhead_abstraction/src/main
  #![feature(panic_info_message)]
  #![no_main]
  #![no_std]
-@@ -116,7 +114,8 @@
+@@ -127,7 +125,8 @@
  ///
  /// - Only a single core must be active and running this function.
  unsafe fn kernel_init() -> ! {
diff --git a/04_zero_overhead_abstraction/src/_arch/aarch64/cpu.rs b/04_zero_overhead_abstraction/src/_arch/aarch64/cpu.rs
index b02903c90..5f97ea410 100644
--- a/04_zero_overhead_abstraction/src/_arch/aarch64/cpu.rs
+++ b/04_zero_overhead_abstraction/src/_arch/aarch64/cpu.rs
@@ -3,35 +3,15 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::arch_cpu
 
-use crate::{bsp, cpu};
-use cortex_a::{asm, regs::*};
-
-//--------------------------------------------------------------------------------------------------
-// Boot Code
-//--------------------------------------------------------------------------------------------------
-
-/// The entry of the `kernel` binary.
-///
-/// The function must be named `_start`, because the linker is looking for this exact name.
-///
-/// # Safety
-///
-/// - Linker script must ensure to place this function where it is expected by the target machine.
-/// - We have to hope that the compiler omits any stack pointer usage before the stack pointer is
-///   actually set (`SP.set()`).
-#[no_mangle]
-pub unsafe fn _start() -> ! {
-    use crate::runtime_init;
-
-    if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
-        SP.set(bsp::memory::boot_core_stack_end() as u64);
-        runtime_init::runtime_init()
-    } else {
-        // If not core0, infinitely wait for events.
-        wait_forever()
-    }
-}
+use cortex_a::asm;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/04_zero_overhead_abstraction/src/_arch/aarch64/cpu/boot.rs b/04_zero_overhead_abstraction/src/_arch/aarch64/cpu/boot.rs
new file mode 100644
index 000000000..549b5927a
--- /dev/null
+++ b/04_zero_overhead_abstraction/src/_arch/aarch64/cpu/boot.rs
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural boot code.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::boot::arch_boot
+
+use crate::{bsp, cpu};
+use cortex_a::regs::*;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The entry of the `kernel` binary.
+///
+/// The function must be named `_start`, because the linker is looking for this exact name.
+///
+/// # Safety
+///
+/// - Linker script must ensure to place this function where it is expected by the target machine.
+/// - We have to hope that the compiler omits any stack pointer usage before the stack pointer is
+///   actually set (`SP.set()`).
+#[no_mangle]
+pub unsafe fn _start() -> ! {
+    use crate::runtime_init;
+
+    if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
+        SP.set(bsp::memory::boot_core_stack_end() as u64);
+        runtime_init::runtime_init()
+    } else {
+        // If not core0, infinitely wait for events.
+        cpu::wait_forever()
+    }
+}
diff --git a/04_zero_overhead_abstraction/src/_arch/aarch64/cpu/smp.rs b/04_zero_overhead_abstraction/src/_arch/aarch64/cpu/smp.rs
index c80f7e780..b9fdd0f73 100644
--- a/04_zero_overhead_abstraction/src/_arch/aarch64/cpu/smp.rs
+++ b/04_zero_overhead_abstraction/src/_arch/aarch64/cpu/smp.rs
@@ -3,6 +3,13 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::smp::arch_smp
 
 use cortex_a::regs::*;
 
diff --git a/04_zero_overhead_abstraction/src/bsp.rs b/04_zero_overhead_abstraction/src/bsp.rs
index 8f0d27c87..2b92251f5 100644
--- a/04_zero_overhead_abstraction/src/bsp.rs
+++ b/04_zero_overhead_abstraction/src/bsp.rs
@@ -2,7 +2,7 @@
 //
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-//! Conditional re-exporting of Board Support Packages.
+//! Conditional reexporting of Board Support Packages.
 
 #[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
 mod raspberrypi;
diff --git a/04_zero_overhead_abstraction/src/cpu.rs b/04_zero_overhead_abstraction/src/cpu.rs
index c9e5af72c..6f326b325 100644
--- a/04_zero_overhead_abstraction/src/cpu.rs
+++ b/04_zero_overhead_abstraction/src/cpu.rs
@@ -7,6 +7,12 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "_arch/aarch64/cpu.rs"]
 mod arch_cpu;
-pub use arch_cpu::*;
+
+mod boot;
 
 pub mod smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_cpu::wait_forever;
diff --git a/04_zero_overhead_abstraction/src/cpu/boot.rs b/04_zero_overhead_abstraction/src/cpu/boot.rs
new file mode 100644
index 000000000..1dc5c1808
--- /dev/null
+++ b/04_zero_overhead_abstraction/src/cpu/boot.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Boot code.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/cpu/boot.rs"]
+mod arch_boot;
diff --git a/04_zero_overhead_abstraction/src/cpu/smp.rs b/04_zero_overhead_abstraction/src/cpu/smp.rs
index 90ecbdf30..38230ce1e 100644
--- a/04_zero_overhead_abstraction/src/cpu/smp.rs
+++ b/04_zero_overhead_abstraction/src/cpu/smp.rs
@@ -6,5 +6,9 @@
 
 #[cfg(target_arch = "aarch64")]
 #[path = "../_arch/aarch64/cpu/smp.rs"]
-mod arch_cpu_smp;
-pub use arch_cpu_smp::*;
+mod arch_smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_smp::core_id;
diff --git a/04_zero_overhead_abstraction/src/main.rs b/04_zero_overhead_abstraction/src/main.rs
index cd4c99e58..7de836fe5 100644
--- a/04_zero_overhead_abstraction/src/main.rs
+++ b/04_zero_overhead_abstraction/src/main.rs
@@ -20,15 +20,22 @@
 //! `src/_arch`, for example, `src/_arch/aarch64`.
 //!
 //! The architecture folders mirror the subsystem modules laid out in `src`. For example,
-//! architectural code that belongs to the `kernel`'s memory subsystem (`src/memory.rs`) would go
-//! into `src/_arch/aarch64/memory.rs`. The latter file is directly included and re-exported in
-//! `src/memory.rs`, so that the architectural code parts are transparent with respect to the code's
-//! module organization. That means a public function `foo()` defined in
-//! `src/_arch/aarch64/memory.rs` would be reachable as `crate::memory::foo()` only.
+//! architectural code that belongs to the `kernel`'s MMU subsystem (`src/memory/mmu.rs`) would go
+//! into `src/_arch/aarch64/memory/mmu.rs`. The latter file is loaded as a module in
+//! `src/memory/mmu.rs` using the `path attribute`. Usually, the chosen module name is the generic
+//! module's name prefixed with `arch_`.
 //!
-//! The `_` in `_arch` denotes that this folder is not part of the standard module hierarchy.
-//! Rather, it's contents are conditionally pulled into respective files using the `#[path =
-//! "_arch/xxx/yyy.rs"]` attribute.
+//! For example, this is the top of `src/memory/mmu.rs`:
+//!
+//! ```
+//! #[cfg(target_arch = "aarch64")]
+//! #[path = "../_arch/aarch64/memory/mmu.rs"]
+//! mod arch_mmu;
+//! ```
+//!
+//! Often times, items from the `arch_ module` will be publicly reexported by the parent module.
+//! This way, each architecture specific module can provide its implementation of an item, while the
+//! caller must not be concerned which architecture has been conditionally compiled.
 //!
 //! ## BSP code
 //!
@@ -37,9 +44,8 @@
 //! or instances of drivers for devices that are featured on the respective board.
 //!
 //! Just like processor architecture code, the `BSP` code's module structure tries to mirror the
-//! `kernel`'s subsystem modules, but there is no transparent re-exporting this time. That means
-//! whatever is provided must be called starting from the `bsp` namespace, e.g.
-//! `bsp::driver::driver_manager()`.
+//! `kernel`'s subsystem modules, but there is no reexporting this time. That means whatever is
+//! provided must be called starting from the `bsp` namespace, e.g. `bsp::driver::driver_manager()`.
 //!
 //! ## Kernel interfaces
 //!
@@ -91,15 +97,20 @@
 //!
 //! - `crate::memory::*`
 //! - `crate::bsp::memory::*`
+//!
+//! # Boot flow
+//!
+//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
+//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
+//!
+//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 
 #![feature(format_args_nl)]
 #![feature(panic_info_message)]
 #![no_main]
 #![no_std]
 
-// `mod cpu` provides the `_start()` function, the first function to run. `_start()` then calls
-// `runtime_init()`, which jumps to `kernel_init()`.
-
 mod bsp;
 mod console;
 mod cpu;
diff --git a/04_zero_overhead_abstraction/src/print.rs b/04_zero_overhead_abstraction/src/print.rs
index 59ec9e8ee..fa6451c75 100644
--- a/04_zero_overhead_abstraction/src/print.rs
+++ b/04_zero_overhead_abstraction/src/print.rs
@@ -2,7 +2,7 @@
 //
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-//! Printing facilities.
+//! Printing.
 
 use crate::{bsp, console};
 use core::fmt;
diff --git a/05_safe_globals/Makefile b/05_safe_globals/Makefile
index 90238d091..9d5a8f78b 100644
--- a/05_safe_globals/Makefile
+++ b/05_safe_globals/Makefile
@@ -34,8 +34,9 @@ export LINKER_FILE
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
+FEATURES      = bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
-    --features bsp_$(BSP)          \
+    --features $(FEATURES)         \
     --release
 
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
diff --git a/05_safe_globals/README.md b/05_safe_globals/README.md
index 537b0ba3b..3db54d6be 100644
--- a/05_safe_globals/README.md
+++ b/05_safe_globals/README.md
@@ -3,8 +3,8 @@
 ## tl;dr
 
 - A pseudo-lock is introduced.
--  It is a first showcase of OS synchronization primitives and enables safe access to a global data
-   structure.
+- It is a first showcase of OS synchronization primitives and enables safe access to a global data
+  structure.
 
 ## Mutable globals in Rust
 
@@ -26,9 +26,7 @@ variant of a *MUTual EXclusion* primitive. `Mutex` is introduced as a trait in `
 and implemented by the `NullLock` in the same file. In order to make the code lean for teaching
 purposes, it leaves out the actual architecture-specific logic for protection against concurrent
 access, since we don't need it as long as the kernel only executes on a single core with interrupts
-disabled. That is also why it is implemented in the same file as the interface itself. In later
-tutorials, an implementation might move to the `_arch` once it pulls in arch-specific code that can
-not be further abstracted.
+disabled.
 
 The `NullLock` focuses on showcasing the Rust core concept of [interior mutability]. Make sure to
 read up on it. I also recommend to read this article about an [accurate mental model for Rust's
@@ -213,7 +211,7 @@ diff -uNr 04_zero_overhead_abstraction/src/console.rs 05_safe_globals/src/consol
 diff -uNr 04_zero_overhead_abstraction/src/main.rs 05_safe_globals/src/main.rs
 --- 04_zero_overhead_abstraction/src/main.rs
 +++ 05_safe_globals/src/main.rs
-@@ -94,6 +94,7 @@
+@@ -108,6 +108,7 @@
 
  #![feature(format_args_nl)]
  #![feature(panic_info_message)]
@@ -221,7 +219,7 @@ diff -uNr 04_zero_overhead_abstraction/src/main.rs 05_safe_globals/src/main.rs
  #![no_main]
  #![no_std]
 
-@@ -107,6 +108,7 @@
+@@ -118,6 +119,7 @@
  mod panic_wait;
  mod print;
  mod runtime_init;
@@ -229,7 +227,7 @@ diff -uNr 04_zero_overhead_abstraction/src/main.rs 05_safe_globals/src/main.rs
 
  /// Early init code.
  ///
-@@ -114,8 +116,15 @@
+@@ -125,8 +127,15 @@
  ///
  /// - Only a single core must be active and running this function.
  unsafe fn kernel_init() -> ! {
diff --git a/05_safe_globals/src/_arch/aarch64/cpu.rs b/05_safe_globals/src/_arch/aarch64/cpu.rs
index b02903c90..5f97ea410 100644
--- a/05_safe_globals/src/_arch/aarch64/cpu.rs
+++ b/05_safe_globals/src/_arch/aarch64/cpu.rs
@@ -3,35 +3,15 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::arch_cpu
 
-use crate::{bsp, cpu};
-use cortex_a::{asm, regs::*};
-
-//--------------------------------------------------------------------------------------------------
-// Boot Code
-//--------------------------------------------------------------------------------------------------
-
-/// The entry of the `kernel` binary.
-///
-/// The function must be named `_start`, because the linker is looking for this exact name.
-///
-/// # Safety
-///
-/// - Linker script must ensure to place this function where it is expected by the target machine.
-/// - We have to hope that the compiler omits any stack pointer usage before the stack pointer is
-///   actually set (`SP.set()`).
-#[no_mangle]
-pub unsafe fn _start() -> ! {
-    use crate::runtime_init;
-
-    if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
-        SP.set(bsp::memory::boot_core_stack_end() as u64);
-        runtime_init::runtime_init()
-    } else {
-        // If not core0, infinitely wait for events.
-        wait_forever()
-    }
-}
+use cortex_a::asm;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/05_safe_globals/src/_arch/aarch64/cpu/boot.rs b/05_safe_globals/src/_arch/aarch64/cpu/boot.rs
new file mode 100644
index 000000000..549b5927a
--- /dev/null
+++ b/05_safe_globals/src/_arch/aarch64/cpu/boot.rs
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural boot code.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::boot::arch_boot
+
+use crate::{bsp, cpu};
+use cortex_a::regs::*;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The entry of the `kernel` binary.
+///
+/// The function must be named `_start`, because the linker is looking for this exact name.
+///
+/// # Safety
+///
+/// - Linker script must ensure to place this function where it is expected by the target machine.
+/// - We have to hope that the compiler omits any stack pointer usage before the stack pointer is
+///   actually set (`SP.set()`).
+#[no_mangle]
+pub unsafe fn _start() -> ! {
+    use crate::runtime_init;
+
+    if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
+        SP.set(bsp::memory::boot_core_stack_end() as u64);
+        runtime_init::runtime_init()
+    } else {
+        // If not core0, infinitely wait for events.
+        cpu::wait_forever()
+    }
+}
diff --git a/05_safe_globals/src/_arch/aarch64/cpu/smp.rs b/05_safe_globals/src/_arch/aarch64/cpu/smp.rs
index c80f7e780..b9fdd0f73 100644
--- a/05_safe_globals/src/_arch/aarch64/cpu/smp.rs
+++ b/05_safe_globals/src/_arch/aarch64/cpu/smp.rs
@@ -3,6 +3,13 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::smp::arch_smp
 
 use cortex_a::regs::*;
 
diff --git a/05_safe_globals/src/bsp.rs b/05_safe_globals/src/bsp.rs
index 8f0d27c87..2b92251f5 100644
--- a/05_safe_globals/src/bsp.rs
+++ b/05_safe_globals/src/bsp.rs
@@ -2,7 +2,7 @@
 //
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-//! Conditional re-exporting of Board Support Packages.
+//! Conditional reexporting of Board Support Packages.
 
 #[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
 mod raspberrypi;
diff --git a/05_safe_globals/src/cpu.rs b/05_safe_globals/src/cpu.rs
index c9e5af72c..6f326b325 100644
--- a/05_safe_globals/src/cpu.rs
+++ b/05_safe_globals/src/cpu.rs
@@ -7,6 +7,12 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "_arch/aarch64/cpu.rs"]
 mod arch_cpu;
-pub use arch_cpu::*;
+
+mod boot;
 
 pub mod smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_cpu::wait_forever;
diff --git a/05_safe_globals/src/cpu/boot.rs b/05_safe_globals/src/cpu/boot.rs
new file mode 100644
index 000000000..1dc5c1808
--- /dev/null
+++ b/05_safe_globals/src/cpu/boot.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Boot code.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/cpu/boot.rs"]
+mod arch_boot;
diff --git a/05_safe_globals/src/cpu/smp.rs b/05_safe_globals/src/cpu/smp.rs
index 90ecbdf30..38230ce1e 100644
--- a/05_safe_globals/src/cpu/smp.rs
+++ b/05_safe_globals/src/cpu/smp.rs
@@ -6,5 +6,9 @@
 
 #[cfg(target_arch = "aarch64")]
 #[path = "../_arch/aarch64/cpu/smp.rs"]
-mod arch_cpu_smp;
-pub use arch_cpu_smp::*;
+mod arch_smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_smp::core_id;
diff --git a/05_safe_globals/src/main.rs b/05_safe_globals/src/main.rs
index 64d4c5fd6..bb6abcb82 100644
--- a/05_safe_globals/src/main.rs
+++ b/05_safe_globals/src/main.rs
@@ -20,15 +20,22 @@
 //! `src/_arch`, for example, `src/_arch/aarch64`.
 //!
 //! The architecture folders mirror the subsystem modules laid out in `src`. For example,
-//! architectural code that belongs to the `kernel`'s memory subsystem (`src/memory.rs`) would go
-//! into `src/_arch/aarch64/memory.rs`. The latter file is directly included and re-exported in
-//! `src/memory.rs`, so that the architectural code parts are transparent with respect to the code's
-//! module organization. That means a public function `foo()` defined in
-//! `src/_arch/aarch64/memory.rs` would be reachable as `crate::memory::foo()` only.
+//! architectural code that belongs to the `kernel`'s MMU subsystem (`src/memory/mmu.rs`) would go
+//! into `src/_arch/aarch64/memory/mmu.rs`. The latter file is loaded as a module in
+//! `src/memory/mmu.rs` using the `path attribute`. Usually, the chosen module name is the generic
+//! module's name prefixed with `arch_`.
 //!
-//! The `_` in `_arch` denotes that this folder is not part of the standard module hierarchy.
-//! Rather, it's contents are conditionally pulled into respective files using the `#[path =
-//! "_arch/xxx/yyy.rs"]` attribute.
+//! For example, this is the top of `src/memory/mmu.rs`:
+//!
+//! ```
+//! #[cfg(target_arch = "aarch64")]
+//! #[path = "../_arch/aarch64/memory/mmu.rs"]
+//! mod arch_mmu;
+//! ```
+//!
+//! Often times, items from the `arch_ module` will be publicly reexported by the parent module.
+//! This way, each architecture specific module can provide its implementation of an item, while the
+//! caller must not be concerned which architecture has been conditionally compiled.
 //!
 //! ## BSP code
 //!
@@ -37,9 +44,8 @@
 //! or instances of drivers for devices that are featured on the respective board.
 //!
 //! Just like processor architecture code, the `BSP` code's module structure tries to mirror the
-//! `kernel`'s subsystem modules, but there is no transparent re-exporting this time. That means
-//! whatever is provided must be called starting from the `bsp` namespace, e.g.
-//! `bsp::driver::driver_manager()`.
+//! `kernel`'s subsystem modules, but there is no reexporting this time. That means whatever is
+//! provided must be called starting from the `bsp` namespace, e.g. `bsp::driver::driver_manager()`.
 //!
 //! ## Kernel interfaces
 //!
@@ -91,6 +97,14 @@
 //!
 //! - `crate::memory::*`
 //! - `crate::bsp::memory::*`
+//!
+//! # Boot flow
+//!
+//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
+//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
+//!
+//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 
 #![feature(format_args_nl)]
 #![feature(panic_info_message)]
@@ -98,9 +112,6 @@
 #![no_main]
 #![no_std]
 
-// `mod cpu` provides the `_start()` function, the first function to run. `_start()` then calls
-// `runtime_init()`, which jumps to `kernel_init()`.
-
 mod bsp;
 mod console;
 mod cpu;
diff --git a/05_safe_globals/src/print.rs b/05_safe_globals/src/print.rs
index 59ec9e8ee..fa6451c75 100644
--- a/05_safe_globals/src/print.rs
+++ b/05_safe_globals/src/print.rs
@@ -2,7 +2,7 @@
 //
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-//! Printing facilities.
+//! Printing.
 
 use crate::{bsp, console};
 use core::fmt;
diff --git a/06_drivers_gpio_uart/Makefile b/06_drivers_gpio_uart/Makefile
index 0fde2eb8d..ee7ebe389 100644
--- a/06_drivers_gpio_uart/Makefile
+++ b/06_drivers_gpio_uart/Makefile
@@ -40,8 +40,9 @@ export LINKER_FILE
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
+FEATURES      = bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
-    --features bsp_$(BSP)          \
+    --features $(FEATURES)         \
     --release
 
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
diff --git a/06_drivers_gpio_uart/README.md b/06_drivers_gpio_uart/README.md
index 6ca14cfe0..2f23d1b5b 100644
--- a/06_drivers_gpio_uart/README.md
+++ b/06_drivers_gpio_uart/README.md
@@ -19,13 +19,16 @@
   from kernel code.
 - Drivers are stored in `src/bsp/device_driver`, and can be reused between `BSP`s.
     - We introduce the `GPIO` driver, which pinmuxes the RPi's PL011 UART.
+      - Note how this driver differentiates between **RPi 3** and **RPi4**. Their HW is different,
+        so we have to account for it in SW.
     - Most importantly, the `PL011Uart` driver: It implements the `console::interface::*` traits and
       is from now on used as the main system console output.
-- `BSP`s now contain a memory map in `src/bsp/raspberrypi/memory.rs`. In the specific case, they contain the
-  Raspberry's `MMIO` addresses which are used to instantiate the respectivedevice drivers.
+- `BSP`s now contain a memory map in `src/bsp/raspberrypi/memory.rs`. In the specific case, they
+  contain the Raspberry's `MMIO` addresses which are used to instantiate the respective device
+  drivers.
 - We also modify the `panic!` handler, so that it does not anymore rely on `println!`, which uses
   the globally-shared instance of the `UART` that might be locked when an error is encountered (for
-  now this can't happen due to the `NullLock`, but with a real lock it becomes an issue).
+  now, this can't happen due to the `NullLock`, but with a real lock it becomes an issue).
     - Instead, it creates a new UART driver instance, re-initializes the device and uses that one to
       print. This increases the chances that the system is able to print a final important message
       before it suspends itself.
@@ -145,7 +148,7 @@ diff -uNr 05_safe_globals/Makefile 06_drivers_gpio_uart/Makefile
  # BSP-specific arguments
  ifeq ($(BSP),rpi3)
      TARGET            = aarch64-unknown-none-softfloat
-@@ -51,13 +57,23 @@
+@@ -52,13 +58,23 @@
  DOCKER_IMAGE         = rustembedded/osdev-utils
  DOCKER_CMD           = docker run --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
  DOCKER_CMD_INTERACT  = $(DOCKER_CMD) -i -t
@@ -171,7 +174,7 @@ diff -uNr 05_safe_globals/Makefile 06_drivers_gpio_uart/Makefile
 
  all: $(KERNEL_BIN)
 
-@@ -78,6 +94,9 @@
+@@ -79,6 +95,9 @@
  	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
  endif
 
@@ -185,7 +188,7 @@ diff -uNr 05_safe_globals/Makefile 06_drivers_gpio_uart/Makefile
 diff -uNr 05_safe_globals/src/_arch/aarch64/cpu.rs 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
 --- 05_safe_globals/src/_arch/aarch64/cpu.rs
 +++ 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
-@@ -37,6 +37,16 @@
+@@ -17,6 +17,16 @@
  // Public Code
  //--------------------------------------------------------------------------------------------------
 
@@ -1158,7 +1161,7 @@ diff -uNr 05_safe_globals/src/bsp.rs 06_drivers_gpio_uart/src/bsp.rs
 +++ 06_drivers_gpio_uart/src/bsp.rs
 @@ -4,6 +4,8 @@
 
- //! Conditional re-exporting of Board Support Packages.
+ //! Conditional reexporting of Board Support Packages.
 
 +mod device_driver;
 +
@@ -1169,7 +1172,7 @@ diff -uNr 05_safe_globals/src/bsp.rs 06_drivers_gpio_uart/src/bsp.rs
 diff -uNr 05_safe_globals/src/console.rs 06_drivers_gpio_uart/src/console.rs
 --- 05_safe_globals/src/console.rs
 +++ 06_drivers_gpio_uart/src/console.rs
-@@ -14,8 +14,26 @@
+@@ -14,8 +14,25 @@
 
      /// Console write functions.
      pub trait Write {
@@ -1179,8 +1182,7 @@ diff -uNr 05_safe_globals/src/console.rs 06_drivers_gpio_uart/src/console.rs
          /// Write a Rust format string.
          fn write_fmt(&self, args: fmt::Arguments) -> fmt::Result;
 +
-+        /// Block execution until the last buffered character has been physically put on the TX
-+        /// wire.
++        /// Block until the last buffered character has been physically put on the TX wire.
 +        fn flush(&self);
 +    }
 +
@@ -1196,7 +1198,7 @@ diff -uNr 05_safe_globals/src/console.rs 06_drivers_gpio_uart/src/console.rs
      }
 
      /// Console statistics.
-@@ -24,8 +42,13 @@
+@@ -24,8 +41,13 @@
          fn chars_written(&self) -> usize {
              0
          }
@@ -1212,6 +1214,16 @@ diff -uNr 05_safe_globals/src/console.rs 06_drivers_gpio_uart/src/console.rs
 +    pub trait All = Write + Read + Statistics;
  }
 
+diff -uNr 05_safe_globals/src/cpu.rs 06_drivers_gpio_uart/src/cpu.rs
+--- 05_safe_globals/src/cpu.rs
++++ 06_drivers_gpio_uart/src/cpu.rs
+@@ -15,4 +15,4 @@
+ //--------------------------------------------------------------------------------------------------
+ // Architectural Public Reexports
+ //--------------------------------------------------------------------------------------------------
+-pub use arch_cpu::wait_forever;
++pub use arch_cpu::{nop, spin_for_cycles, wait_forever};
+
 diff -uNr 05_safe_globals/src/driver.rs 06_drivers_gpio_uart/src/driver.rs
 --- 05_safe_globals/src/driver.rs
 +++ 06_drivers_gpio_uart/src/driver.rs
@@ -1264,30 +1276,15 @@ diff -uNr 05_safe_globals/src/driver.rs 06_drivers_gpio_uart/src/driver.rs
 diff -uNr 05_safe_globals/src/main.rs 06_drivers_gpio_uart/src/main.rs
 --- 05_safe_globals/src/main.rs
 +++ 06_drivers_gpio_uart/src/main.rs
-@@ -7,6 +7,14 @@
-
- //! The `kernel` binary.
- //!
-+//! # TL;DR - Overview of important Kernel entities
-+//!
-+//! - [`bsp::console::console()`] - Returns a reference to the kernel's [console interface].
-+//! - [`bsp::driver::driver_manager()`] - Returns a reference to the kernel's [driver interface].
-+//!
-+//! [console interface]: ../libkernel/console/interface/index.html
-+//! [driver interface]: ../libkernel/driver/interface/trait.DriverManager.html
-+//!
- //! # Code organization and architecture
+@@ -106,6 +106,7 @@
  //!
- //! The code is divided into different *modules*, each representing a typical **subsystem** of the
-@@ -92,6 +100,7 @@
- //! - `crate::memory::*`
- //! - `crate::bsp::memory::*`
+ //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 
 +#![feature(const_fn_fn_ptr_basics)]
  #![feature(format_args_nl)]
  #![feature(panic_info_message)]
  #![feature(trait_alias)]
-@@ -104,6 +113,7 @@
+@@ -115,6 +116,7 @@
  mod bsp;
  mod console;
  mod cpu;
@@ -1295,7 +1292,7 @@ diff -uNr 05_safe_globals/src/main.rs 06_drivers_gpio_uart/src/main.rs
  mod memory;
  mod panic_wait;
  mod print;
-@@ -115,16 +125,49 @@
+@@ -126,16 +128,49 @@
  /// # Safety
  ///
  /// - Only a single core must be active and running this function.
@@ -1303,7 +1300,8 @@ diff -uNr 05_safe_globals/src/main.rs 06_drivers_gpio_uart/src/main.rs
  unsafe fn kernel_init() -> ! {
 -    use console::interface::Statistics;
 +    use driver::interface::DriverManager;
-+
+
+-    println!("[0] Hello from pure Rust!");
 +    for i in bsp::driver::driver_manager().all_device_drivers().iter() {
 +        if let Err(x) = i.init() {
 +            panic!("Error loading driver: {}: {}", i.compatible(), x);
@@ -1315,8 +1313,7 @@ diff -uNr 05_safe_globals/src/main.rs 06_drivers_gpio_uart/src/main.rs
 +    // Transition from unsafe to safe.
 +    kernel_main()
 +}
-
--    println!("[0] Hello from pure Rust!");
++
 +/// The main function running after the early init.
 +fn kernel_main() -> ! {
 +    use bsp::console::console;
diff --git a/06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs b/06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
index 2d5d0b04a..e16fdecc8 100644
--- a/06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
+++ b/06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
@@ -3,35 +3,15 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
-
-use crate::{bsp, cpu};
-use cortex_a::{asm, regs::*};
-
-//--------------------------------------------------------------------------------------------------
-// Boot Code
-//--------------------------------------------------------------------------------------------------
-
-/// The entry of the `kernel` binary.
-///
-/// The function must be named `_start`, because the linker is looking for this exact name.
-///
-/// # Safety
-///
-/// - Linker script must ensure to place this function where it is expected by the target machine.
-/// - We have to hope that the compiler omits any stack pointer usage before the stack pointer is
-///   actually set (`SP.set()`).
-#[no_mangle]
-pub unsafe fn _start() -> ! {
-    use crate::runtime_init;
-
-    if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
-        SP.set(bsp::memory::boot_core_stack_end() as u64);
-        runtime_init::runtime_init()
-    } else {
-        // If not core0, infinitely wait for events.
-        wait_forever()
-    }
-}
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::arch_cpu
+
+use cortex_a::asm;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/06_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs b/06_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs
new file mode 100644
index 000000000..549b5927a
--- /dev/null
+++ b/06_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural boot code.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::boot::arch_boot
+
+use crate::{bsp, cpu};
+use cortex_a::regs::*;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The entry of the `kernel` binary.
+///
+/// The function must be named `_start`, because the linker is looking for this exact name.
+///
+/// # Safety
+///
+/// - Linker script must ensure to place this function where it is expected by the target machine.
+/// - We have to hope that the compiler omits any stack pointer usage before the stack pointer is
+///   actually set (`SP.set()`).
+#[no_mangle]
+pub unsafe fn _start() -> ! {
+    use crate::runtime_init;
+
+    if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
+        SP.set(bsp::memory::boot_core_stack_end() as u64);
+        runtime_init::runtime_init()
+    } else {
+        // If not core0, infinitely wait for events.
+        cpu::wait_forever()
+    }
+}
diff --git a/06_drivers_gpio_uart/src/_arch/aarch64/cpu/smp.rs b/06_drivers_gpio_uart/src/_arch/aarch64/cpu/smp.rs
index c80f7e780..b9fdd0f73 100644
--- a/06_drivers_gpio_uart/src/_arch/aarch64/cpu/smp.rs
+++ b/06_drivers_gpio_uart/src/_arch/aarch64/cpu/smp.rs
@@ -3,6 +3,13 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::smp::arch_smp
 
 use cortex_a::regs::*;
 
diff --git a/06_drivers_gpio_uart/src/bsp.rs b/06_drivers_gpio_uart/src/bsp.rs
index 257502491..c558922f7 100644
--- a/06_drivers_gpio_uart/src/bsp.rs
+++ b/06_drivers_gpio_uart/src/bsp.rs
@@ -2,7 +2,7 @@
 //
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-//! Conditional re-exporting of Board Support Packages.
+//! Conditional reexporting of Board Support Packages.
 
 mod device_driver;
 
diff --git a/06_drivers_gpio_uart/src/console.rs b/06_drivers_gpio_uart/src/console.rs
index 3552823cc..c3154ba23 100644
--- a/06_drivers_gpio_uart/src/console.rs
+++ b/06_drivers_gpio_uart/src/console.rs
@@ -20,8 +20,7 @@ pub mod interface {
         /// Write a Rust format string.
         fn write_fmt(&self, args: fmt::Arguments) -> fmt::Result;
 
-        /// Block execution until the last buffered character has been physically put on the TX
-        /// wire.
+        /// Block until the last buffered character has been physically put on the TX wire.
         fn flush(&self);
     }
 
diff --git a/06_drivers_gpio_uart/src/cpu.rs b/06_drivers_gpio_uart/src/cpu.rs
index c9e5af72c..103f00dba 100644
--- a/06_drivers_gpio_uart/src/cpu.rs
+++ b/06_drivers_gpio_uart/src/cpu.rs
@@ -7,6 +7,12 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "_arch/aarch64/cpu.rs"]
 mod arch_cpu;
-pub use arch_cpu::*;
+
+mod boot;
 
 pub mod smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_cpu::{nop, spin_for_cycles, wait_forever};
diff --git a/06_drivers_gpio_uart/src/cpu/boot.rs b/06_drivers_gpio_uart/src/cpu/boot.rs
new file mode 100644
index 000000000..1dc5c1808
--- /dev/null
+++ b/06_drivers_gpio_uart/src/cpu/boot.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Boot code.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/cpu/boot.rs"]
+mod arch_boot;
diff --git a/06_drivers_gpio_uart/src/cpu/smp.rs b/06_drivers_gpio_uart/src/cpu/smp.rs
index 90ecbdf30..38230ce1e 100644
--- a/06_drivers_gpio_uart/src/cpu/smp.rs
+++ b/06_drivers_gpio_uart/src/cpu/smp.rs
@@ -6,5 +6,9 @@
 
 #[cfg(target_arch = "aarch64")]
 #[path = "../_arch/aarch64/cpu/smp.rs"]
-mod arch_cpu_smp;
-pub use arch_cpu_smp::*;
+mod arch_smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_smp::core_id;
diff --git a/06_drivers_gpio_uart/src/main.rs b/06_drivers_gpio_uart/src/main.rs
index 1674b9e42..a16c0de7b 100644
--- a/06_drivers_gpio_uart/src/main.rs
+++ b/06_drivers_gpio_uart/src/main.rs
@@ -7,14 +7,6 @@
 
 //! The `kernel` binary.
 //!
-//! # TL;DR - Overview of important Kernel entities
-//!
-//! - [`bsp::console::console()`] - Returns a reference to the kernel's [console interface].
-//! - [`bsp::driver::driver_manager()`] - Returns a reference to the kernel's [driver interface].
-//!
-//! [console interface]: ../libkernel/console/interface/index.html
-//! [driver interface]: ../libkernel/driver/interface/trait.DriverManager.html
-//!
 //! # Code organization and architecture
 //!
 //! The code is divided into different *modules*, each representing a typical **subsystem** of the
@@ -28,15 +20,22 @@
 //! `src/_arch`, for example, `src/_arch/aarch64`.
 //!
 //! The architecture folders mirror the subsystem modules laid out in `src`. For example,
-//! architectural code that belongs to the `kernel`'s memory subsystem (`src/memory.rs`) would go
-//! into `src/_arch/aarch64/memory.rs`. The latter file is directly included and re-exported in
-//! `src/memory.rs`, so that the architectural code parts are transparent with respect to the code's
-//! module organization. That means a public function `foo()` defined in
-//! `src/_arch/aarch64/memory.rs` would be reachable as `crate::memory::foo()` only.
+//! architectural code that belongs to the `kernel`'s MMU subsystem (`src/memory/mmu.rs`) would go
+//! into `src/_arch/aarch64/memory/mmu.rs`. The latter file is loaded as a module in
+//! `src/memory/mmu.rs` using the `path attribute`. Usually, the chosen module name is the generic
+//! module's name prefixed with `arch_`.
 //!
-//! The `_` in `_arch` denotes that this folder is not part of the standard module hierarchy.
-//! Rather, it's contents are conditionally pulled into respective files using the `#[path =
-//! "_arch/xxx/yyy.rs"]` attribute.
+//! For example, this is the top of `src/memory/mmu.rs`:
+//!
+//! ```
+//! #[cfg(target_arch = "aarch64")]
+//! #[path = "../_arch/aarch64/memory/mmu.rs"]
+//! mod arch_mmu;
+//! ```
+//!
+//! Often times, items from the `arch_ module` will be publicly reexported by the parent module.
+//! This way, each architecture specific module can provide its implementation of an item, while the
+//! caller must not be concerned which architecture has been conditionally compiled.
 //!
 //! ## BSP code
 //!
@@ -45,9 +44,8 @@
 //! or instances of drivers for devices that are featured on the respective board.
 //!
 //! Just like processor architecture code, the `BSP` code's module structure tries to mirror the
-//! `kernel`'s subsystem modules, but there is no transparent re-exporting this time. That means
-//! whatever is provided must be called starting from the `bsp` namespace, e.g.
-//! `bsp::driver::driver_manager()`.
+//! `kernel`'s subsystem modules, but there is no reexporting this time. That means whatever is
+//! provided must be called starting from the `bsp` namespace, e.g. `bsp::driver::driver_manager()`.
 //!
 //! ## Kernel interfaces
 //!
@@ -99,6 +97,14 @@
 //!
 //! - `crate::memory::*`
 //! - `crate::bsp::memory::*`
+//!
+//! # Boot flow
+//!
+//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
+//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
+//!
+//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
@@ -107,9 +113,6 @@
 #![no_main]
 #![no_std]
 
-// `mod cpu` provides the `_start()` function, the first function to run. `_start()` then calls
-// `runtime_init()`, which jumps to `kernel_init()`.
-
 mod bsp;
 mod console;
 mod cpu;
diff --git a/06_drivers_gpio_uart/src/print.rs b/06_drivers_gpio_uart/src/print.rs
index 59ec9e8ee..fa6451c75 100644
--- a/06_drivers_gpio_uart/src/print.rs
+++ b/06_drivers_gpio_uart/src/print.rs
@@ -2,7 +2,7 @@
 //
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-//! Printing facilities.
+//! Printing.
 
 use crate::{bsp, console};
 use core::fmt;
diff --git a/07_uart_chainloader/Makefile b/07_uart_chainloader/Makefile
index 1fc61b6b2..d32147d65 100644
--- a/07_uart_chainloader/Makefile
+++ b/07_uart_chainloader/Makefile
@@ -42,8 +42,9 @@ export LINKER_FILE
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
+FEATURES      = bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
-    --features bsp_$(BSP)          \
+    --features $(FEATURES)         \
     --release
 
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
diff --git a/07_uart_chainloader/README.md b/07_uart_chainloader/README.md
index fe6251109..0bd4bce20 100644
--- a/07_uart_chainloader/README.md
+++ b/07_uart_chainloader/README.md
@@ -24,20 +24,23 @@ tutorials in a quick manner.
 Our chainloader is called `MiniLoad` and is inspired by [raspbootin].
 
 You can try it with this tutorial already:
-1. Depending on your target hardware:`make` or `BSP=rpi4 make`.
+1. Depending on your target hardware, run:`make` or `BSP=rpi4 make`.
 1. Copy `kernel8.img` to the SD card.
-1. Execute `make chainboot` or `BSP=rpi4 make chainboot`.
+1. Run `make chainboot` or `BSP=rpi4 make chainboot`.
 1. Connect the USB serial to your host PC.
     - Wiring diagram at [top-level README](../README.md#-usb-serial-output).
     - Make sure that you **DID NOT** connect the power pin of the USB serial. Only RX/TX and GND.
 1. Connect the RPi to the (USB) power cable.
 1. Observe the loader fetching a kernel over `UART`:
 
-> ❗ **NOTE**: By default, `make chainboot` tries to connect to `/dev/ttyUSB0`.
-> Should the USB serial on your system have a different name, you have to provide it explicitly. For
-> example:
->
-> `DEV_SERIAL=/dev/tty.usbserial-0001 make chainboot`
+> ❗ **NOTE**: `make chainboot` assumes a default serial device name of `/dev/ttyUSB0`. Depending on
+> your host operating system, the device name might differ. For example, on `macOS`, it might be
+> something like `/dev/tty.usbserial-0001`. In this case, please give the name explicitly:
+
+
+```console
+$ DEV_SERIAL=/dev/tty.usbserial-0001 make chainboot
+```
 
 [raspbootin]: https://github.com/mrvn/raspbootin
 
@@ -127,7 +130,7 @@ diff -uNr 06_drivers_gpio_uart/Makefile 07_uart_chainloader/Makefile
  endif
 
  # Export for build.rs
-@@ -67,13 +69,14 @@
+@@ -68,13 +70,14 @@
  ifeq ($(UNAME_S),Linux)
      DOCKER_CMD_DEV = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DEV)
 
@@ -145,7 +148,7 @@ diff -uNr 06_drivers_gpio_uart/Makefile 07_uart_chainloader/Makefile
 
  all: $(KERNEL_BIN)
 
-@@ -87,15 +90,18 @@
+@@ -88,15 +91,18 @@
  	$(DOC_CMD) --document-private-items --open
 
  ifeq ($(QEMU_MACHINE_TYPE),)
@@ -167,7 +170,7 @@ diff -uNr 06_drivers_gpio_uart/Makefile 07_uart_chainloader/Makefile
 
  clippy:
  	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
-@@ -107,7 +113,10 @@
+@@ -108,7 +114,10 @@
  	readelf --headers $(KERNEL_ELF)
 
  objdump: $(KERNEL_ELF)
@@ -180,10 +183,10 @@ diff -uNr 06_drivers_gpio_uart/Makefile 07_uart_chainloader/Makefile
  nm: $(KERNEL_ELF)
  	@$(DOCKER_ELFTOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
-diff -uNr 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs 07_uart_chainloader/src/_arch/aarch64/cpu.rs
---- 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
-+++ 07_uart_chainloader/src/_arch/aarch64/cpu.rs
-@@ -22,11 +22,11 @@
+diff -uNr 06_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs 07_uart_chainloader/src/_arch/aarch64/cpu/boot.rs
+--- 06_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs
++++ 07_uart_chainloader/src/_arch/aarch64/cpu/boot.rs
+@@ -29,11 +29,11 @@
  ///   actually set (`SP.set()`).
  #[no_mangle]
  pub unsafe fn _start() -> ! {
@@ -196,8 +199,12 @@ diff -uNr 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs 07_uart_chainloader/src/
 +        relocate::relocate_self()
      } else {
          // If not core0, infinitely wait for events.
-         wait_forever()
-@@ -54,3 +54,19 @@
+         cpu::wait_forever()
+
+diff -uNr 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs 07_uart_chainloader/src/_arch/aarch64/cpu.rs
+--- 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
++++ 07_uart_chainloader/src/_arch/aarch64/cpu.rs
+@@ -34,3 +34,19 @@
          asm::wfe()
      }
  }
@@ -383,12 +390,28 @@ diff -uNr 06_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs 07_uart_chainloader
      unsafe {
          range = RangeInclusive::new(__bss_start.get(), __bss_end_inclusive.get());
 
+diff -uNr 06_drivers_gpio_uart/src/cpu.rs 07_uart_chainloader/src/cpu.rs
+--- 06_drivers_gpio_uart/src/cpu.rs
++++ 07_uart_chainloader/src/cpu.rs
+@@ -15,4 +15,4 @@
+ //--------------------------------------------------------------------------------------------------
+ // Architectural Public Reexports
+ //--------------------------------------------------------------------------------------------------
+-pub use arch_cpu::{nop, spin_for_cycles, wait_forever};
++pub use arch_cpu::{branch_to_raw_addr, nop, spin_for_cycles, wait_forever};
+
 diff -uNr 06_drivers_gpio_uart/src/main.rs 07_uart_chainloader/src/main.rs
 --- 06_drivers_gpio_uart/src/main.rs
 +++ 07_uart_chainloader/src/main.rs
-@@ -100,7 +100,9 @@
- //! - `crate::memory::*`
- //! - `crate::bsp::memory::*`
+@@ -102,11 +102,14 @@
+ //!
+ //! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
+ //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
+-//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
++//! 2. Once finished with architectural setup, the arch code calls [`relocate::relocate_self()`].
++//! 3. Finally, [`runtime_init::runtime_init()`] is called.
+ //!
+ //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 
 +#![feature(asm)]
  #![feature(const_fn_fn_ptr_basics)]
@@ -396,17 +419,7 @@ diff -uNr 06_drivers_gpio_uart/src/main.rs 07_uart_chainloader/src/main.rs
  #![feature(format_args_nl)]
  #![feature(panic_info_message)]
  #![feature(trait_alias)]
-@@ -108,7 +110,8 @@
- #![no_std]
-
- // `mod cpu` provides the `_start()` function, the first function to run. `_start()` then calls
--// `runtime_init()`, which jumps to `kernel_init()`.
-+// `relocate::relocate_self()`. `relocate::relocate_self()` calls `runtime_init()`, which jumps to
-+// `kernel_init()`.
-
- mod bsp;
- mod console;
-@@ -117,6 +120,7 @@
+@@ -120,6 +123,7 @@
  mod memory;
  mod panic_wait;
  mod print;
@@ -414,7 +427,7 @@ diff -uNr 06_drivers_gpio_uart/src/main.rs 07_uart_chainloader/src/main.rs
  mod runtime_init;
  mod synchronization;
 
-@@ -145,29 +149,49 @@
+@@ -148,29 +152,49 @@
  fn kernel_main() -> ! {
      use bsp::console::console;
      use console::interface::All;
@@ -478,7 +491,7 @@ diff -uNr 06_drivers_gpio_uart/src/main.rs 07_uart_chainloader/src/main.rs
 +    println!("[ML] Loaded! Executing the payload now\n");
 +    console().flush();
 +
-+    // Use black magic to get a function pointer.
++    // Use black magic to create a function pointer.
 +    let kernel: fn() -> ! = unsafe { core::mem::transmute(kernel_addr) };
 +
 +    // Jump to loaded kernel!
diff --git a/07_uart_chainloader/demo_payload_rpi3.img b/07_uart_chainloader/demo_payload_rpi3.img
index 47a0ae1037b18fa72ffdd9262c664c64bfc89289..0719de414d1e2a8495d6c68862e25eec89998ba2 100755
GIT binary patch
delta 14
VcmX?Mdct(W3~|QJ%`?UInE@~i1$h7f

delta 14
VcmX?Mdct(W3~|P`%`?UInE@~Q1$F=c

diff --git a/07_uart_chainloader/demo_payload_rpi4.img b/07_uart_chainloader/demo_payload_rpi4.img
index 14e578c1784483707bb257c94ea90a0cb9d7cb97..c8d8f9685adcdfcaeeb113672567c4f264e52f06 100755
GIT binary patch
delta 14
VcmX?Ma>8VTgg9g8W=U~<W&kO41a|-c

delta 14
VcmX?Ma>8VTgg9f{W=U~<W&kN-1atrZ

diff --git a/07_uart_chainloader/src/_arch/aarch64/cpu.rs b/07_uart_chainloader/src/_arch/aarch64/cpu.rs
index 184347d78..b53dc2697 100644
--- a/07_uart_chainloader/src/_arch/aarch64/cpu.rs
+++ b/07_uart_chainloader/src/_arch/aarch64/cpu.rs
@@ -3,35 +3,15 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
-
-use crate::{bsp, cpu};
-use cortex_a::{asm, regs::*};
-
-//--------------------------------------------------------------------------------------------------
-// Boot Code
-//--------------------------------------------------------------------------------------------------
-
-/// The entry of the `kernel` binary.
-///
-/// The function must be named `_start`, because the linker is looking for this exact name.
-///
-/// # Safety
-///
-/// - Linker script must ensure to place this function where it is expected by the target machine.
-/// - We have to hope that the compiler omits any stack pointer usage before the stack pointer is
-///   actually set (`SP.set()`).
-#[no_mangle]
-pub unsafe fn _start() -> ! {
-    use crate::relocate;
-
-    if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
-        SP.set(bsp::memory::boot_core_stack_end() as u64);
-        relocate::relocate_self()
-    } else {
-        // If not core0, infinitely wait for events.
-        wait_forever()
-    }
-}
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::arch_cpu
+
+use cortex_a::asm;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/07_uart_chainloader/src/_arch/aarch64/cpu/boot.rs b/07_uart_chainloader/src/_arch/aarch64/cpu/boot.rs
new file mode 100644
index 000000000..b343792f3
--- /dev/null
+++ b/07_uart_chainloader/src/_arch/aarch64/cpu/boot.rs
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural boot code.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::boot::arch_boot
+
+use crate::{bsp, cpu};
+use cortex_a::regs::*;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The entry of the `kernel` binary.
+///
+/// The function must be named `_start`, because the linker is looking for this exact name.
+///
+/// # Safety
+///
+/// - Linker script must ensure to place this function where it is expected by the target machine.
+/// - We have to hope that the compiler omits any stack pointer usage before the stack pointer is
+///   actually set (`SP.set()`).
+#[no_mangle]
+pub unsafe fn _start() -> ! {
+    use crate::relocate;
+
+    if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
+        SP.set(bsp::memory::boot_core_stack_end() as u64);
+        relocate::relocate_self()
+    } else {
+        // If not core0, infinitely wait for events.
+        cpu::wait_forever()
+    }
+}
diff --git a/07_uart_chainloader/src/_arch/aarch64/cpu/smp.rs b/07_uart_chainloader/src/_arch/aarch64/cpu/smp.rs
index c80f7e780..b9fdd0f73 100644
--- a/07_uart_chainloader/src/_arch/aarch64/cpu/smp.rs
+++ b/07_uart_chainloader/src/_arch/aarch64/cpu/smp.rs
@@ -3,6 +3,13 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::smp::arch_smp
 
 use cortex_a::regs::*;
 
diff --git a/07_uart_chainloader/src/bsp.rs b/07_uart_chainloader/src/bsp.rs
index 257502491..c558922f7 100644
--- a/07_uart_chainloader/src/bsp.rs
+++ b/07_uart_chainloader/src/bsp.rs
@@ -2,7 +2,7 @@
 //
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-//! Conditional re-exporting of Board Support Packages.
+//! Conditional reexporting of Board Support Packages.
 
 mod device_driver;
 
diff --git a/07_uart_chainloader/src/console.rs b/07_uart_chainloader/src/console.rs
index 3552823cc..c3154ba23 100644
--- a/07_uart_chainloader/src/console.rs
+++ b/07_uart_chainloader/src/console.rs
@@ -20,8 +20,7 @@ pub mod interface {
         /// Write a Rust format string.
         fn write_fmt(&self, args: fmt::Arguments) -> fmt::Result;
 
-        /// Block execution until the last buffered character has been physically put on the TX
-        /// wire.
+        /// Block until the last buffered character has been physically put on the TX wire.
         fn flush(&self);
     }
 
diff --git a/07_uart_chainloader/src/cpu.rs b/07_uart_chainloader/src/cpu.rs
index c9e5af72c..c543bd988 100644
--- a/07_uart_chainloader/src/cpu.rs
+++ b/07_uart_chainloader/src/cpu.rs
@@ -7,6 +7,12 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "_arch/aarch64/cpu.rs"]
 mod arch_cpu;
-pub use arch_cpu::*;
+
+mod boot;
 
 pub mod smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_cpu::{branch_to_raw_addr, nop, spin_for_cycles, wait_forever};
diff --git a/07_uart_chainloader/src/cpu/boot.rs b/07_uart_chainloader/src/cpu/boot.rs
new file mode 100644
index 000000000..1dc5c1808
--- /dev/null
+++ b/07_uart_chainloader/src/cpu/boot.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Boot code.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/cpu/boot.rs"]
+mod arch_boot;
diff --git a/07_uart_chainloader/src/cpu/smp.rs b/07_uart_chainloader/src/cpu/smp.rs
index 90ecbdf30..38230ce1e 100644
--- a/07_uart_chainloader/src/cpu/smp.rs
+++ b/07_uart_chainloader/src/cpu/smp.rs
@@ -6,5 +6,9 @@
 
 #[cfg(target_arch = "aarch64")]
 #[path = "../_arch/aarch64/cpu/smp.rs"]
-mod arch_cpu_smp;
-pub use arch_cpu_smp::*;
+mod arch_smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_smp::core_id;
diff --git a/07_uart_chainloader/src/main.rs b/07_uart_chainloader/src/main.rs
index c8f2a91f6..fdb787b56 100644
--- a/07_uart_chainloader/src/main.rs
+++ b/07_uart_chainloader/src/main.rs
@@ -7,14 +7,6 @@
 
 //! The `kernel` binary.
 //!
-//! # TL;DR - Overview of important Kernel entities
-//!
-//! - [`bsp::console::console()`] - Returns a reference to the kernel's [console interface].
-//! - [`bsp::driver::driver_manager()`] - Returns a reference to the kernel's [driver interface].
-//!
-//! [console interface]: ../libkernel/console/interface/index.html
-//! [driver interface]: ../libkernel/driver/interface/trait.DriverManager.html
-//!
 //! # Code organization and architecture
 //!
 //! The code is divided into different *modules*, each representing a typical **subsystem** of the
@@ -28,15 +20,22 @@
 //! `src/_arch`, for example, `src/_arch/aarch64`.
 //!
 //! The architecture folders mirror the subsystem modules laid out in `src`. For example,
-//! architectural code that belongs to the `kernel`'s memory subsystem (`src/memory.rs`) would go
-//! into `src/_arch/aarch64/memory.rs`. The latter file is directly included and re-exported in
-//! `src/memory.rs`, so that the architectural code parts are transparent with respect to the code's
-//! module organization. That means a public function `foo()` defined in
-//! `src/_arch/aarch64/memory.rs` would be reachable as `crate::memory::foo()` only.
+//! architectural code that belongs to the `kernel`'s MMU subsystem (`src/memory/mmu.rs`) would go
+//! into `src/_arch/aarch64/memory/mmu.rs`. The latter file is loaded as a module in
+//! `src/memory/mmu.rs` using the `path attribute`. Usually, the chosen module name is the generic
+//! module's name prefixed with `arch_`.
 //!
-//! The `_` in `_arch` denotes that this folder is not part of the standard module hierarchy.
-//! Rather, it's contents are conditionally pulled into respective files using the `#[path =
-//! "_arch/xxx/yyy.rs"]` attribute.
+//! For example, this is the top of `src/memory/mmu.rs`:
+//!
+//! ```
+//! #[cfg(target_arch = "aarch64")]
+//! #[path = "../_arch/aarch64/memory/mmu.rs"]
+//! mod arch_mmu;
+//! ```
+//!
+//! Often times, items from the `arch_ module` will be publicly reexported by the parent module.
+//! This way, each architecture specific module can provide its implementation of an item, while the
+//! caller must not be concerned which architecture has been conditionally compiled.
 //!
 //! ## BSP code
 //!
@@ -45,9 +44,8 @@
 //! or instances of drivers for devices that are featured on the respective board.
 //!
 //! Just like processor architecture code, the `BSP` code's module structure tries to mirror the
-//! `kernel`'s subsystem modules, but there is no transparent re-exporting this time. That means
-//! whatever is provided must be called starting from the `bsp` namespace, e.g.
-//! `bsp::driver::driver_manager()`.
+//! `kernel`'s subsystem modules, but there is no reexporting this time. That means whatever is
+//! provided must be called starting from the `bsp` namespace, e.g. `bsp::driver::driver_manager()`.
 //!
 //! ## Kernel interfaces
 //!
@@ -99,6 +97,15 @@
 //!
 //! - `crate::memory::*`
 //! - `crate::bsp::memory::*`
+//!
+//! # Boot flow
+//!
+//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
+//! 2. Once finished with architectural setup, the arch code calls [`relocate::relocate_self()`].
+//! 3. Finally, [`runtime_init::runtime_init()`] is called.
+//!
+//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 
 #![feature(asm)]
 #![feature(const_fn_fn_ptr_basics)]
@@ -109,10 +116,6 @@
 #![no_main]
 #![no_std]
 
-// `mod cpu` provides the `_start()` function, the first function to run. `_start()` then calls
-// `relocate::relocate_self()`. `relocate::relocate_self()` calls `runtime_init()`, which jumps to
-// `kernel_init()`.
-
 mod bsp;
 mod console;
 mod cpu;
@@ -189,7 +192,7 @@ fn kernel_main() -> ! {
     println!("[ML] Loaded! Executing the payload now\n");
     console().flush();
 
-    // Use black magic to get a function pointer.
+    // Use black magic to create a function pointer.
     let kernel: fn() -> ! = unsafe { core::mem::transmute(kernel_addr) };
 
     // Jump to loaded kernel!
diff --git a/07_uart_chainloader/src/print.rs b/07_uart_chainloader/src/print.rs
index 59ec9e8ee..fa6451c75 100644
--- a/07_uart_chainloader/src/print.rs
+++ b/07_uart_chainloader/src/print.rs
@@ -2,7 +2,7 @@
 //
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-//! Printing facilities.
+//! Printing.
 
 use crate::{bsp, console};
 use core::fmt;
diff --git a/08_timestamps/Makefile b/08_timestamps/Makefile
index 071167b9e..27944c93d 100644
--- a/08_timestamps/Makefile
+++ b/08_timestamps/Makefile
@@ -40,8 +40,9 @@ export LINKER_FILE
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
+FEATURES      = bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
-    --features bsp_$(BSP)          \
+    --features $(FEATURES)         \
     --release
 
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
diff --git a/08_timestamps/README.md b/08_timestamps/README.md
index b79121c0f..432ac091a 100644
--- a/08_timestamps/README.md
+++ b/08_timestamps/README.md
@@ -2,7 +2,8 @@
 
 ## tl;dr
 
-- We add abstractions for the architectural timer and implement them for `_arch/aarch64`.
+- We add abstractions for timer hardware, and implement them for the ARM architectural timer in
+  `_arch/aarch64`.
 - The new timer functions are used to annotate UART prints with timestamps, and to get rid of the
   cycle-based delays in the `GPIO` and `UART` device drivers, which boosts accuracy.
 - A `warn!()` macro is added.
@@ -68,7 +69,7 @@ diff -uNr 07_uart_chainloader/Makefile 08_timestamps/Makefile
  endif
 
  # Export for build.rs
-@@ -75,8 +73,7 @@
+@@ -76,8 +74,7 @@
  EXEC_QEMU     = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
  EXEC_MINIPUSH = ruby ../utils/minipush.rb
 
@@ -78,7 +79,7 @@ diff -uNr 07_uart_chainloader/Makefile 08_timestamps/Makefile
 
  all: $(KERNEL_BIN)
 
-@@ -90,18 +87,15 @@
+@@ -91,18 +88,15 @@
  	$(DOC_CMD) --document-private-items --open
 
  ifeq ($(QEMU_MACHINE_TYPE),)
@@ -100,7 +101,7 @@ diff -uNr 07_uart_chainloader/Makefile 08_timestamps/Makefile
 
  clippy:
  	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
-@@ -113,10 +107,7 @@
+@@ -114,10 +108,7 @@
  	readelf --headers $(KERNEL_ELF)
 
  objdump: $(KERNEL_ELF)
@@ -113,10 +114,10 @@ diff -uNr 07_uart_chainloader/Makefile 08_timestamps/Makefile
  nm: $(KERNEL_ELF)
  	@$(DOCKER_ELFTOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
-diff -uNr 07_uart_chainloader/src/_arch/aarch64/cpu.rs 08_timestamps/src/_arch/aarch64/cpu.rs
---- 07_uart_chainloader/src/_arch/aarch64/cpu.rs
-+++ 08_timestamps/src/_arch/aarch64/cpu.rs
-@@ -22,11 +22,11 @@
+diff -uNr 07_uart_chainloader/src/_arch/aarch64/cpu/boot.rs 08_timestamps/src/_arch/aarch64/cpu/boot.rs
+--- 07_uart_chainloader/src/_arch/aarch64/cpu/boot.rs
++++ 08_timestamps/src/_arch/aarch64/cpu/boot.rs
+@@ -29,11 +29,11 @@
  ///   actually set (`SP.set()`).
  #[no_mangle]
  pub unsafe fn _start() -> ! {
@@ -129,8 +130,12 @@ diff -uNr 07_uart_chainloader/src/_arch/aarch64/cpu.rs 08_timestamps/src/_arch/a
 +        runtime_init::runtime_init()
      } else {
          // If not core0, infinitely wait for events.
-         wait_forever()
-@@ -39,14 +39,6 @@
+         cpu::wait_forever()
+
+diff -uNr 07_uart_chainloader/src/_arch/aarch64/cpu.rs 08_timestamps/src/_arch/aarch64/cpu.rs
+--- 07_uart_chainloader/src/_arch/aarch64/cpu.rs
++++ 08_timestamps/src/_arch/aarch64/cpu.rs
+@@ -19,14 +19,6 @@
 
  pub use asm::nop;
 
@@ -145,7 +150,7 @@ diff -uNr 07_uart_chainloader/src/_arch/aarch64/cpu.rs 08_timestamps/src/_arch/a
  /// Pause execution on the core.
  #[inline(always)]
  pub fn wait_forever() -> ! {
-@@ -54,19 +46,3 @@
+@@ -34,19 +26,3 @@
          asm::wfe()
      }
  }
@@ -169,12 +174,19 @@ diff -uNr 07_uart_chainloader/src/_arch/aarch64/cpu.rs 08_timestamps/src/_arch/a
 diff -uNr 07_uart_chainloader/src/_arch/aarch64/time.rs 08_timestamps/src/_arch/aarch64/time.rs
 --- 07_uart_chainloader/src/_arch/aarch64/time.rs
 +++ 08_timestamps/src/_arch/aarch64/time.rs
-@@ -0,0 +1,98 @@
+@@ -0,0 +1,105 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Architectural timer primitives.
++//!
++//! # Orientation
++//!
++//! Since arch modules are imported into generic modules using the path attribute, the path of this
++//! file is:
++//!
++//! crate::time::arch_time
 +
 +use crate::{time, warn};
 +use core::time::Duration;
@@ -227,7 +239,7 @@ diff -uNr 07_uart_chainloader/src/_arch/aarch64/time.rs 08_timestamps/src/_arch/
 +        }
 +
 +        // Calculate the register compare value.
-+        let frq = CNTFRQ_EL0.get() as u64;
++        let frq = CNTFRQ_EL0.get();
 +        let x = match frq.checked_mul(duration.as_nanos() as u64) {
 +            None => {
 +                warn!("Spin duration too long, skipping");
@@ -483,24 +495,28 @@ diff -uNr 07_uart_chainloader/src/bsp/raspberrypi/memory.rs 08_timestamps/src/bs
      unsafe {
          range = RangeInclusive::new(__bss_start.get(), __bss_end_inclusive.get());
 
+diff -uNr 07_uart_chainloader/src/cpu.rs 08_timestamps/src/cpu.rs
+--- 07_uart_chainloader/src/cpu.rs
++++ 08_timestamps/src/cpu.rs
+@@ -15,4 +15,4 @@
+ //--------------------------------------------------------------------------------------------------
+ // Architectural Public Reexports
+ //--------------------------------------------------------------------------------------------------
+-pub use arch_cpu::{branch_to_raw_addr, nop, spin_for_cycles, wait_forever};
++pub use arch_cpu::{nop, wait_forever};
+
 diff -uNr 07_uart_chainloader/src/main.rs 08_timestamps/src/main.rs
 --- 07_uart_chainloader/src/main.rs
 +++ 08_timestamps/src/main.rs
-@@ -11,9 +11,11 @@
- //!
- //! - [`bsp::console::console()`] - Returns a reference to the kernel's [console interface].
- //! - [`bsp::driver::driver_manager()`] - Returns a reference to the kernel's [driver interface].
-+//! - [`time::time_manager()`] - Returns a reference to the kernel's [timer interface].
+@@ -102,14 +102,11 @@
  //!
- //! [console interface]: ../libkernel/console/interface/index.html
- //! [driver interface]: ../libkernel/driver/interface/trait.DriverManager.html
-+//! [timer interface]: ../libkernel/time/interface/trait.TimeManager.html
+ //! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
+ //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
+-//! 2. Once finished with architectural setup, the arch code calls [`relocate::relocate_self()`].
+-//! 3. Finally, [`runtime_init::runtime_init()`] is called.
++//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
  //!
- //! # Code organization and architecture
- //!
-@@ -100,9 +102,7 @@
- //! - `crate::memory::*`
- //! - `crate::bsp::memory::*`
+ //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 
 -#![feature(asm)]
  #![feature(const_fn_fn_ptr_basics)]
@@ -508,17 +524,7 @@ diff -uNr 07_uart_chainloader/src/main.rs 08_timestamps/src/main.rs
  #![feature(format_args_nl)]
  #![feature(panic_info_message)]
  #![feature(trait_alias)]
-@@ -110,8 +110,7 @@
- #![no_std]
-
- // `mod cpu` provides the `_start()` function, the first function to run. `_start()` then calls
--// `relocate::relocate_self()`. `relocate::relocate_self()` calls `runtime_init()`, which jumps to
--// `kernel_init()`.
-+// `runtime_init()`, which jumps to `kernel_init()`.
-
- mod bsp;
- mod console;
-@@ -120,9 +119,9 @@
+@@ -123,9 +120,9 @@
  mod memory;
  mod panic_wait;
  mod print;
@@ -529,7 +535,7 @@ diff -uNr 07_uart_chainloader/src/main.rs 08_timestamps/src/main.rs
 
  /// Early init code.
  ///
-@@ -147,51 +146,31 @@
+@@ -150,51 +147,31 @@
 
  /// The main function running after the early init.
  fn kernel_main() -> ! {
@@ -593,7 +599,7 @@ diff -uNr 07_uart_chainloader/src/main.rs 08_timestamps/src/main.rs
 +    // Test a failing timer case.
 +    time::time_manager().spin_for(Duration::from_nanos(1));
 
--    // Use black magic to get a function pointer.
+-    // Use black magic to create a function pointer.
 -    let kernel: fn() -> ! = unsafe { core::mem::transmute(kernel_addr) };
 -
 -    // Jump to loaded kernel!
@@ -760,7 +766,7 @@ diff -uNr 07_uart_chainloader/src/runtime_init.rs 08_timestamps/src/runtime_init
 diff -uNr 07_uart_chainloader/src/time.rs 08_timestamps/src/time.rs
 --- 07_uart_chainloader/src/time.rs
 +++ 08_timestamps/src/time.rs
-@@ -0,0 +1,35 @@
+@@ -0,0 +1,37 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -770,7 +776,11 @@ diff -uNr 07_uart_chainloader/src/time.rs 08_timestamps/src/time.rs
 +#[cfg(target_arch = "aarch64")]
 +#[path = "_arch/aarch64/time.rs"]
 +mod arch_time;
-+pub use arch_time::*;
++
++//--------------------------------------------------------------------------------------------------
++// Architectural Public Reexports
++//--------------------------------------------------------------------------------------------------
++pub use arch_time::time_manager;
 +
 +//--------------------------------------------------------------------------------------------------
 +// Public Definitions
@@ -781,8 +791,6 @@ diff -uNr 07_uart_chainloader/src/time.rs 08_timestamps/src/time.rs
 +    use core::time::Duration;
 +
 +    /// Time management functions.
-+    ///
-+    /// The `BSP` is supposed to supply one global instance.
 +    pub trait TimeManager {
 +        /// The timer's resolution.
 +        fn resolution(&self) -> Duration;
diff --git a/08_timestamps/src/_arch/aarch64/cpu.rs b/08_timestamps/src/_arch/aarch64/cpu.rs
index a65a06827..d3b07461a 100644
--- a/08_timestamps/src/_arch/aarch64/cpu.rs
+++ b/08_timestamps/src/_arch/aarch64/cpu.rs
@@ -3,35 +3,15 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
-
-use crate::{bsp, cpu};
-use cortex_a::{asm, regs::*};
-
-//--------------------------------------------------------------------------------------------------
-// Boot Code
-//--------------------------------------------------------------------------------------------------
-
-/// The entry of the `kernel` binary.
-///
-/// The function must be named `_start`, because the linker is looking for this exact name.
-///
-/// # Safety
-///
-/// - Linker script must ensure to place this function where it is expected by the target machine.
-/// - We have to hope that the compiler omits any stack pointer usage before the stack pointer is
-///   actually set (`SP.set()`).
-#[no_mangle]
-pub unsafe fn _start() -> ! {
-    use crate::runtime_init;
-
-    if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
-        SP.set(bsp::memory::boot_core_stack_end() as u64);
-        runtime_init::runtime_init()
-    } else {
-        // If not core0, infinitely wait for events.
-        wait_forever()
-    }
-}
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::arch_cpu
+
+use cortex_a::asm;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/08_timestamps/src/_arch/aarch64/cpu/boot.rs b/08_timestamps/src/_arch/aarch64/cpu/boot.rs
new file mode 100644
index 000000000..549b5927a
--- /dev/null
+++ b/08_timestamps/src/_arch/aarch64/cpu/boot.rs
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural boot code.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::boot::arch_boot
+
+use crate::{bsp, cpu};
+use cortex_a::regs::*;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The entry of the `kernel` binary.
+///
+/// The function must be named `_start`, because the linker is looking for this exact name.
+///
+/// # Safety
+///
+/// - Linker script must ensure to place this function where it is expected by the target machine.
+/// - We have to hope that the compiler omits any stack pointer usage before the stack pointer is
+///   actually set (`SP.set()`).
+#[no_mangle]
+pub unsafe fn _start() -> ! {
+    use crate::runtime_init;
+
+    if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
+        SP.set(bsp::memory::boot_core_stack_end() as u64);
+        runtime_init::runtime_init()
+    } else {
+        // If not core0, infinitely wait for events.
+        cpu::wait_forever()
+    }
+}
diff --git a/08_timestamps/src/_arch/aarch64/cpu/smp.rs b/08_timestamps/src/_arch/aarch64/cpu/smp.rs
index c80f7e780..b9fdd0f73 100644
--- a/08_timestamps/src/_arch/aarch64/cpu/smp.rs
+++ b/08_timestamps/src/_arch/aarch64/cpu/smp.rs
@@ -3,6 +3,13 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::smp::arch_smp
 
 use cortex_a::regs::*;
 
diff --git a/08_timestamps/src/_arch/aarch64/time.rs b/08_timestamps/src/_arch/aarch64/time.rs
index 7f1bc6963..3a766009d 100644
--- a/08_timestamps/src/_arch/aarch64/time.rs
+++ b/08_timestamps/src/_arch/aarch64/time.rs
@@ -3,6 +3,13 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::time::arch_time
 
 use crate::{time, warn};
 use core::time::Duration;
@@ -55,7 +62,7 @@ impl time::interface::TimeManager for GenericTimer {
         }
 
         // Calculate the register compare value.
-        let frq = CNTFRQ_EL0.get() as u64;
+        let frq = CNTFRQ_EL0.get();
         let x = match frq.checked_mul(duration.as_nanos() as u64) {
             None => {
                 warn!("Spin duration too long, skipping");
diff --git a/08_timestamps/src/bsp.rs b/08_timestamps/src/bsp.rs
index 257502491..c558922f7 100644
--- a/08_timestamps/src/bsp.rs
+++ b/08_timestamps/src/bsp.rs
@@ -2,7 +2,7 @@
 //
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-//! Conditional re-exporting of Board Support Packages.
+//! Conditional reexporting of Board Support Packages.
 
 mod device_driver;
 
diff --git a/08_timestamps/src/console.rs b/08_timestamps/src/console.rs
index 3552823cc..c3154ba23 100644
--- a/08_timestamps/src/console.rs
+++ b/08_timestamps/src/console.rs
@@ -20,8 +20,7 @@ pub mod interface {
         /// Write a Rust format string.
         fn write_fmt(&self, args: fmt::Arguments) -> fmt::Result;
 
-        /// Block execution until the last buffered character has been physically put on the TX
-        /// wire.
+        /// Block until the last buffered character has been physically put on the TX wire.
         fn flush(&self);
     }
 
diff --git a/08_timestamps/src/cpu.rs b/08_timestamps/src/cpu.rs
index c9e5af72c..3834f183c 100644
--- a/08_timestamps/src/cpu.rs
+++ b/08_timestamps/src/cpu.rs
@@ -7,6 +7,12 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "_arch/aarch64/cpu.rs"]
 mod arch_cpu;
-pub use arch_cpu::*;
+
+mod boot;
 
 pub mod smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_cpu::{nop, wait_forever};
diff --git a/08_timestamps/src/cpu/boot.rs b/08_timestamps/src/cpu/boot.rs
new file mode 100644
index 000000000..1dc5c1808
--- /dev/null
+++ b/08_timestamps/src/cpu/boot.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Boot code.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/cpu/boot.rs"]
+mod arch_boot;
diff --git a/08_timestamps/src/cpu/smp.rs b/08_timestamps/src/cpu/smp.rs
index 90ecbdf30..38230ce1e 100644
--- a/08_timestamps/src/cpu/smp.rs
+++ b/08_timestamps/src/cpu/smp.rs
@@ -6,5 +6,9 @@
 
 #[cfg(target_arch = "aarch64")]
 #[path = "../_arch/aarch64/cpu/smp.rs"]
-mod arch_cpu_smp;
-pub use arch_cpu_smp::*;
+mod arch_smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_smp::core_id;
diff --git a/08_timestamps/src/main.rs b/08_timestamps/src/main.rs
index b9db5fef4..5a7b9f550 100644
--- a/08_timestamps/src/main.rs
+++ b/08_timestamps/src/main.rs
@@ -7,16 +7,6 @@
 
 //! The `kernel` binary.
 //!
-//! # TL;DR - Overview of important Kernel entities
-//!
-//! - [`bsp::console::console()`] - Returns a reference to the kernel's [console interface].
-//! - [`bsp::driver::driver_manager()`] - Returns a reference to the kernel's [driver interface].
-//! - [`time::time_manager()`] - Returns a reference to the kernel's [timer interface].
-//!
-//! [console interface]: ../libkernel/console/interface/index.html
-//! [driver interface]: ../libkernel/driver/interface/trait.DriverManager.html
-//! [timer interface]: ../libkernel/time/interface/trait.TimeManager.html
-//!
 //! # Code organization and architecture
 //!
 //! The code is divided into different *modules*, each representing a typical **subsystem** of the
@@ -30,15 +20,22 @@
 //! `src/_arch`, for example, `src/_arch/aarch64`.
 //!
 //! The architecture folders mirror the subsystem modules laid out in `src`. For example,
-//! architectural code that belongs to the `kernel`'s memory subsystem (`src/memory.rs`) would go
-//! into `src/_arch/aarch64/memory.rs`. The latter file is directly included and re-exported in
-//! `src/memory.rs`, so that the architectural code parts are transparent with respect to the code's
-//! module organization. That means a public function `foo()` defined in
-//! `src/_arch/aarch64/memory.rs` would be reachable as `crate::memory::foo()` only.
+//! architectural code that belongs to the `kernel`'s MMU subsystem (`src/memory/mmu.rs`) would go
+//! into `src/_arch/aarch64/memory/mmu.rs`. The latter file is loaded as a module in
+//! `src/memory/mmu.rs` using the `path attribute`. Usually, the chosen module name is the generic
+//! module's name prefixed with `arch_`.
 //!
-//! The `_` in `_arch` denotes that this folder is not part of the standard module hierarchy.
-//! Rather, it's contents are conditionally pulled into respective files using the `#[path =
-//! "_arch/xxx/yyy.rs"]` attribute.
+//! For example, this is the top of `src/memory/mmu.rs`:
+//!
+//! ```
+//! #[cfg(target_arch = "aarch64")]
+//! #[path = "../_arch/aarch64/memory/mmu.rs"]
+//! mod arch_mmu;
+//! ```
+//!
+//! Often times, items from the `arch_ module` will be publicly reexported by the parent module.
+//! This way, each architecture specific module can provide its implementation of an item, while the
+//! caller must not be concerned which architecture has been conditionally compiled.
 //!
 //! ## BSP code
 //!
@@ -47,9 +44,8 @@
 //! or instances of drivers for devices that are featured on the respective board.
 //!
 //! Just like processor architecture code, the `BSP` code's module structure tries to mirror the
-//! `kernel`'s subsystem modules, but there is no transparent re-exporting this time. That means
-//! whatever is provided must be called starting from the `bsp` namespace, e.g.
-//! `bsp::driver::driver_manager()`.
+//! `kernel`'s subsystem modules, but there is no reexporting this time. That means whatever is
+//! provided must be called starting from the `bsp` namespace, e.g. `bsp::driver::driver_manager()`.
 //!
 //! ## Kernel interfaces
 //!
@@ -101,6 +97,14 @@
 //!
 //! - `crate::memory::*`
 //! - `crate::bsp::memory::*`
+//!
+//! # Boot flow
+//!
+//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
+//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
+//!
+//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
@@ -109,9 +113,6 @@
 #![no_main]
 #![no_std]
 
-// `mod cpu` provides the `_start()` function, the first function to run. `_start()` then calls
-// `runtime_init()`, which jumps to `kernel_init()`.
-
 mod bsp;
 mod console;
 mod cpu;
diff --git a/08_timestamps/src/print.rs b/08_timestamps/src/print.rs
index 1ea96b6ad..5a5638113 100644
--- a/08_timestamps/src/print.rs
+++ b/08_timestamps/src/print.rs
@@ -2,7 +2,7 @@
 //
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-//! Printing facilities.
+//! Printing.
 
 use crate::{bsp, console};
 use core::fmt;
diff --git a/08_timestamps/src/time.rs b/08_timestamps/src/time.rs
index 4f2f4e38f..953b6f0df 100644
--- a/08_timestamps/src/time.rs
+++ b/08_timestamps/src/time.rs
@@ -7,7 +7,11 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "_arch/aarch64/time.rs"]
 mod arch_time;
-pub use arch_time::*;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_time::time_manager;
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -18,8 +22,6 @@ pub mod interface {
     use core::time::Duration;
 
     /// Time management functions.
-    ///
-    /// The `BSP` is supposed to supply one global instance.
     pub trait TimeManager {
         /// The timer's resolution.
         fn resolution(&self) -> Duration;
diff --git a/09_hw_debug_JTAG/Makefile b/09_hw_debug_JTAG/Makefile
index 9254018cf..9105d297f 100644
--- a/09_hw_debug_JTAG/Makefile
+++ b/09_hw_debug_JTAG/Makefile
@@ -44,8 +44,9 @@ export LINKER_FILE
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
+FEATURES      = bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
-    --features bsp_$(BSP)          \
+    --features $(FEATURES)         \
     --release
 
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
diff --git a/09_hw_debug_JTAG/README.md b/09_hw_debug_JTAG/README.md
index 12cf0cc1e..918f72582 100644
--- a/09_hw_debug_JTAG/README.md
+++ b/09_hw_debug_JTAG/README.md
@@ -287,8 +287,8 @@ Hence, please ensure the following order of connecting the devices to your box:
   1. Connect the USB serial.
   2. Afterwards, the Olimex debugger.
 
-This way, Linux enumerates the devices accordingly. This has to be done only once. It is fine to
-disconnect and connect the serial multiple times, e.g. for kicking off different `make jtagboot`
+This way, the host OS enumerates the devices accordingly. This has to be done only once. It is fine
+to disconnect and connect the serial multiple times, e.g. for kicking off different `make jtagboot`
 runs, while keeping the debugger connected.
 
 ## Additional resources
@@ -324,7 +324,7 @@ diff -uNr 08_timestamps/Makefile 09_hw_debug_JTAG/Makefile
      LINKER_FILE       = src/bsp/raspberrypi/link.ld
      RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
  endif
-@@ -58,9 +62,12 @@
+@@ -59,9 +63,12 @@
  DOCKER_CMD           = docker run --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
  DOCKER_CMD_INTERACT  = $(DOCKER_CMD) -i -t
  DOCKER_ARG_DIR_UTILS = -v $(shell pwd)/../utils:/work/utils
@@ -337,7 +337,7 @@ diff -uNr 08_timestamps/Makefile 09_hw_debug_JTAG/Makefile
  DOCKER_ELFTOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 
  # Dockerize commands that require USB device passthrough only on Linux
-@@ -68,12 +75,17 @@
+@@ -69,12 +76,17 @@
      DOCKER_CMD_DEV = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DEV)
 
      DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_IMAGE)
@@ -356,7 +356,7 @@ diff -uNr 08_timestamps/Makefile 09_hw_debug_JTAG/Makefile
 
  all: $(KERNEL_BIN)
 
-@@ -97,6 +109,23 @@
+@@ -98,6 +110,23 @@
  chainboot: $(KERNEL_BIN)
  	@$(DOCKER_CHAINBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(KERNEL_BIN)
 
diff --git a/09_hw_debug_JTAG/src/_arch/aarch64/cpu.rs b/09_hw_debug_JTAG/src/_arch/aarch64/cpu.rs
index a65a06827..d3b07461a 100644
--- a/09_hw_debug_JTAG/src/_arch/aarch64/cpu.rs
+++ b/09_hw_debug_JTAG/src/_arch/aarch64/cpu.rs
@@ -3,35 +3,15 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
-
-use crate::{bsp, cpu};
-use cortex_a::{asm, regs::*};
-
-//--------------------------------------------------------------------------------------------------
-// Boot Code
-//--------------------------------------------------------------------------------------------------
-
-/// The entry of the `kernel` binary.
-///
-/// The function must be named `_start`, because the linker is looking for this exact name.
-///
-/// # Safety
-///
-/// - Linker script must ensure to place this function where it is expected by the target machine.
-/// - We have to hope that the compiler omits any stack pointer usage before the stack pointer is
-///   actually set (`SP.set()`).
-#[no_mangle]
-pub unsafe fn _start() -> ! {
-    use crate::runtime_init;
-
-    if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
-        SP.set(bsp::memory::boot_core_stack_end() as u64);
-        runtime_init::runtime_init()
-    } else {
-        // If not core0, infinitely wait for events.
-        wait_forever()
-    }
-}
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::arch_cpu
+
+use cortex_a::asm;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/09_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs b/09_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs
new file mode 100644
index 000000000..549b5927a
--- /dev/null
+++ b/09_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural boot code.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::boot::arch_boot
+
+use crate::{bsp, cpu};
+use cortex_a::regs::*;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The entry of the `kernel` binary.
+///
+/// The function must be named `_start`, because the linker is looking for this exact name.
+///
+/// # Safety
+///
+/// - Linker script must ensure to place this function where it is expected by the target machine.
+/// - We have to hope that the compiler omits any stack pointer usage before the stack pointer is
+///   actually set (`SP.set()`).
+#[no_mangle]
+pub unsafe fn _start() -> ! {
+    use crate::runtime_init;
+
+    if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
+        SP.set(bsp::memory::boot_core_stack_end() as u64);
+        runtime_init::runtime_init()
+    } else {
+        // If not core0, infinitely wait for events.
+        cpu::wait_forever()
+    }
+}
diff --git a/09_hw_debug_JTAG/src/_arch/aarch64/cpu/smp.rs b/09_hw_debug_JTAG/src/_arch/aarch64/cpu/smp.rs
index c80f7e780..b9fdd0f73 100644
--- a/09_hw_debug_JTAG/src/_arch/aarch64/cpu/smp.rs
+++ b/09_hw_debug_JTAG/src/_arch/aarch64/cpu/smp.rs
@@ -3,6 +3,13 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::smp::arch_smp
 
 use cortex_a::regs::*;
 
diff --git a/09_hw_debug_JTAG/src/_arch/aarch64/time.rs b/09_hw_debug_JTAG/src/_arch/aarch64/time.rs
index 7f1bc6963..3a766009d 100644
--- a/09_hw_debug_JTAG/src/_arch/aarch64/time.rs
+++ b/09_hw_debug_JTAG/src/_arch/aarch64/time.rs
@@ -3,6 +3,13 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::time::arch_time
 
 use crate::{time, warn};
 use core::time::Duration;
@@ -55,7 +62,7 @@ impl time::interface::TimeManager for GenericTimer {
         }
 
         // Calculate the register compare value.
-        let frq = CNTFRQ_EL0.get() as u64;
+        let frq = CNTFRQ_EL0.get();
         let x = match frq.checked_mul(duration.as_nanos() as u64) {
             None => {
                 warn!("Spin duration too long, skipping");
diff --git a/09_hw_debug_JTAG/src/bsp.rs b/09_hw_debug_JTAG/src/bsp.rs
index 257502491..c558922f7 100644
--- a/09_hw_debug_JTAG/src/bsp.rs
+++ b/09_hw_debug_JTAG/src/bsp.rs
@@ -2,7 +2,7 @@
 //
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-//! Conditional re-exporting of Board Support Packages.
+//! Conditional reexporting of Board Support Packages.
 
 mod device_driver;
 
diff --git a/09_hw_debug_JTAG/src/console.rs b/09_hw_debug_JTAG/src/console.rs
index 3552823cc..c3154ba23 100644
--- a/09_hw_debug_JTAG/src/console.rs
+++ b/09_hw_debug_JTAG/src/console.rs
@@ -20,8 +20,7 @@ pub mod interface {
         /// Write a Rust format string.
         fn write_fmt(&self, args: fmt::Arguments) -> fmt::Result;
 
-        /// Block execution until the last buffered character has been physically put on the TX
-        /// wire.
+        /// Block until the last buffered character has been physically put on the TX wire.
         fn flush(&self);
     }
 
diff --git a/09_hw_debug_JTAG/src/cpu.rs b/09_hw_debug_JTAG/src/cpu.rs
index c9e5af72c..3834f183c 100644
--- a/09_hw_debug_JTAG/src/cpu.rs
+++ b/09_hw_debug_JTAG/src/cpu.rs
@@ -7,6 +7,12 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "_arch/aarch64/cpu.rs"]
 mod arch_cpu;
-pub use arch_cpu::*;
+
+mod boot;
 
 pub mod smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_cpu::{nop, wait_forever};
diff --git a/09_hw_debug_JTAG/src/cpu/boot.rs b/09_hw_debug_JTAG/src/cpu/boot.rs
new file mode 100644
index 000000000..1dc5c1808
--- /dev/null
+++ b/09_hw_debug_JTAG/src/cpu/boot.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Boot code.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/cpu/boot.rs"]
+mod arch_boot;
diff --git a/09_hw_debug_JTAG/src/cpu/smp.rs b/09_hw_debug_JTAG/src/cpu/smp.rs
index 90ecbdf30..38230ce1e 100644
--- a/09_hw_debug_JTAG/src/cpu/smp.rs
+++ b/09_hw_debug_JTAG/src/cpu/smp.rs
@@ -6,5 +6,9 @@
 
 #[cfg(target_arch = "aarch64")]
 #[path = "../_arch/aarch64/cpu/smp.rs"]
-mod arch_cpu_smp;
-pub use arch_cpu_smp::*;
+mod arch_smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_smp::core_id;
diff --git a/09_hw_debug_JTAG/src/main.rs b/09_hw_debug_JTAG/src/main.rs
index b9db5fef4..5a7b9f550 100644
--- a/09_hw_debug_JTAG/src/main.rs
+++ b/09_hw_debug_JTAG/src/main.rs
@@ -7,16 +7,6 @@
 
 //! The `kernel` binary.
 //!
-//! # TL;DR - Overview of important Kernel entities
-//!
-//! - [`bsp::console::console()`] - Returns a reference to the kernel's [console interface].
-//! - [`bsp::driver::driver_manager()`] - Returns a reference to the kernel's [driver interface].
-//! - [`time::time_manager()`] - Returns a reference to the kernel's [timer interface].
-//!
-//! [console interface]: ../libkernel/console/interface/index.html
-//! [driver interface]: ../libkernel/driver/interface/trait.DriverManager.html
-//! [timer interface]: ../libkernel/time/interface/trait.TimeManager.html
-//!
 //! # Code organization and architecture
 //!
 //! The code is divided into different *modules*, each representing a typical **subsystem** of the
@@ -30,15 +20,22 @@
 //! `src/_arch`, for example, `src/_arch/aarch64`.
 //!
 //! The architecture folders mirror the subsystem modules laid out in `src`. For example,
-//! architectural code that belongs to the `kernel`'s memory subsystem (`src/memory.rs`) would go
-//! into `src/_arch/aarch64/memory.rs`. The latter file is directly included and re-exported in
-//! `src/memory.rs`, so that the architectural code parts are transparent with respect to the code's
-//! module organization. That means a public function `foo()` defined in
-//! `src/_arch/aarch64/memory.rs` would be reachable as `crate::memory::foo()` only.
+//! architectural code that belongs to the `kernel`'s MMU subsystem (`src/memory/mmu.rs`) would go
+//! into `src/_arch/aarch64/memory/mmu.rs`. The latter file is loaded as a module in
+//! `src/memory/mmu.rs` using the `path attribute`. Usually, the chosen module name is the generic
+//! module's name prefixed with `arch_`.
 //!
-//! The `_` in `_arch` denotes that this folder is not part of the standard module hierarchy.
-//! Rather, it's contents are conditionally pulled into respective files using the `#[path =
-//! "_arch/xxx/yyy.rs"]` attribute.
+//! For example, this is the top of `src/memory/mmu.rs`:
+//!
+//! ```
+//! #[cfg(target_arch = "aarch64")]
+//! #[path = "../_arch/aarch64/memory/mmu.rs"]
+//! mod arch_mmu;
+//! ```
+//!
+//! Often times, items from the `arch_ module` will be publicly reexported by the parent module.
+//! This way, each architecture specific module can provide its implementation of an item, while the
+//! caller must not be concerned which architecture has been conditionally compiled.
 //!
 //! ## BSP code
 //!
@@ -47,9 +44,8 @@
 //! or instances of drivers for devices that are featured on the respective board.
 //!
 //! Just like processor architecture code, the `BSP` code's module structure tries to mirror the
-//! `kernel`'s subsystem modules, but there is no transparent re-exporting this time. That means
-//! whatever is provided must be called starting from the `bsp` namespace, e.g.
-//! `bsp::driver::driver_manager()`.
+//! `kernel`'s subsystem modules, but there is no reexporting this time. That means whatever is
+//! provided must be called starting from the `bsp` namespace, e.g. `bsp::driver::driver_manager()`.
 //!
 //! ## Kernel interfaces
 //!
@@ -101,6 +97,14 @@
 //!
 //! - `crate::memory::*`
 //! - `crate::bsp::memory::*`
+//!
+//! # Boot flow
+//!
+//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
+//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
+//!
+//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
@@ -109,9 +113,6 @@
 #![no_main]
 #![no_std]
 
-// `mod cpu` provides the `_start()` function, the first function to run. `_start()` then calls
-// `runtime_init()`, which jumps to `kernel_init()`.
-
 mod bsp;
 mod console;
 mod cpu;
diff --git a/09_hw_debug_JTAG/src/print.rs b/09_hw_debug_JTAG/src/print.rs
index 1ea96b6ad..5a5638113 100644
--- a/09_hw_debug_JTAG/src/print.rs
+++ b/09_hw_debug_JTAG/src/print.rs
@@ -2,7 +2,7 @@
 //
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-//! Printing facilities.
+//! Printing.
 
 use crate::{bsp, console};
 use core::fmt;
diff --git a/09_hw_debug_JTAG/src/time.rs b/09_hw_debug_JTAG/src/time.rs
index 4f2f4e38f..953b6f0df 100644
--- a/09_hw_debug_JTAG/src/time.rs
+++ b/09_hw_debug_JTAG/src/time.rs
@@ -7,7 +7,11 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "_arch/aarch64/time.rs"]
 mod arch_time;
-pub use arch_time::*;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_time::time_manager;
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -18,8 +22,6 @@ pub mod interface {
     use core::time::Duration;
 
     /// Time management functions.
-    ///
-    /// The `BSP` is supposed to supply one global instance.
     pub trait TimeManager {
         /// The timer's resolution.
         fn resolution(&self) -> Duration;
diff --git a/10_privilege_level/Makefile b/10_privilege_level/Makefile
index 9254018cf..9105d297f 100644
--- a/10_privilege_level/Makefile
+++ b/10_privilege_level/Makefile
@@ -44,8 +44,9 @@ export LINKER_FILE
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
+FEATURES      = bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
-    --features bsp_$(BSP)          \
+    --features $(FEATURES)         \
     --release
 
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
diff --git a/10_privilege_level/README.md b/10_privilege_level/README.md
index 8cd313810..2556ec993 100644
--- a/10_privilege_level/README.md
+++ b/10_privilege_level/README.md
@@ -33,16 +33,14 @@ architectures, please have a look at the following links:
 - [RISC-V privilege modes](https://content.riscv.org/wp-content/uploads/2017/12/Tue0942-riscv-hypervisor-waterman.pdf).
 
 At this point, I strongly recommend that you glimpse over `Chapter 3` of the [Programmer’s Guide for
-ARMv8-A](http://infocenter.arm.com/help/topic/com.arm.doc.den0024a/DEN0024A_v8_architecture_PG.pdf)
-before you continue. It gives a concise overview about the topic.
+ARMv8-A] before you continue. It gives a concise overview about the topic.
 
-## Scope of this tutorial
+[Programmer’s Guide forARMv8-A]: http://infocenter.arm.com/help/topic/com.arm.doc.den0024a/DEN0024A_v8_architecture_PG.pdf
 
-If you set up your SD Card exactly like mentioned in [tutorial 06], the Rpi will always start
-executing in `EL2`. Since we are writing a traditional `Kernel`, we have to transition into the more
-appropriate `EL1`.
+## Scope of this tutorial
 
-[tutorial 06]: https://github.com/rust-embedded/rust-raspberrypi-OS-tutorials/tree/master/06_drivers_gpio_uart#boot-it-from-sd-card
+By default, the Rpi will always start executing in `EL2`. Since we are writing a traditional
+`Kernel`, we have to transition into the more appropriate `EL1`.
 
 ## Checking for EL2 in the entrypoint
 
@@ -50,7 +48,8 @@ First of all, we need to ensure that we actually execute in `EL2` before we can
 to transition to `EL1`:
 
 ```rust
-pub unsafe extern "C" fn _start() -> ! {
+#[no_mangle]
+pub unsafe fn _start() -> ! {
     // Expect the boot core to start in EL2.
     if (bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id())
         && (CurrentEL.get() == CurrentEL::EL::EL2.value)
@@ -58,7 +57,7 @@ pub unsafe extern "C" fn _start() -> ! {
         el2_to_el1_transition()
     } else {
         // If not core0, infinitely wait for events.
-        wait_forever()
+        cpu::wait_forever()
     }
 }
 ```
@@ -74,7 +73,7 @@ We are already using them since [tutorial 08](../08_timestamps/), so of course w
 Therefore we set the respective flags in the [Counter-timer Hypervisor Control register] and
 additionally set the virtual offset to zero so that we get the real physical value everytime:
 
-[Counter-timer Hypervisor Control register]: https://docs.rs/cortex-a/2.4.0/src/cortex_a/regs/cnthctl_el2.rs.html
+[Counter-timer Hypervisor Control register]:  https://docs.rs/cortex-a/5.1.2/src/cortex_a/regs/cnthctl_el2.rs.html
 
 ```rust
 // Enable timer counter registers for EL1.
@@ -84,10 +83,10 @@ CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
 CNTVOFF_EL2.set(0);
 ```
 
-Next, we configure the [Hypervisor Configuration Register] such that `EL1` should actually run in
-`AArch64` mode, and not in `AArch32`, which would also be possible.
+Next, we configure the [Hypervisor Configuration Register] such that `EL1` runs in `AArch64` mode,
+and not in `AArch32`, which would also be possible.
 
-[Hypervisor Configuration Register]: https://docs.rs/cortex-a/2.4.0/src/cortex_a/regs/hcr_el2.rs.html
+[Hypervisor Configuration Register]: https://docs.rs/cortex-a/5.1.2/src/cortex_a/regs/hcr_el2.rs.html
 
 ```rust
 // Set EL1 execution state to AArch64.
@@ -99,7 +98,7 @@ HCR_EL2.write(HCR_EL2::RW::EL1IsAarch64);
 There is actually only one way to transition from a higher EL to a lower EL, which is by way of
 executing the [ERET] instruction.
 
-[ERET]: https://docs.rs/cortex-a/2.4.0/src/cortex_a/asm.rs.html#49-62
+[ERET]: https://docs.rs/cortex-a/5.1.2/src/cortex_a/asm.rs.html#87-96
 
 This instruction will copy the contents of the [Saved Program Status Register - EL2] to `Current
 Program Status Register - EL1` and jump to the instruction address that is stored in the [Exception
@@ -108,8 +107,8 @@ Link Register - EL2].
 This is basically the reverse of what is happening when an exception is taken. You'll learn about it
 in an upcoming tutorial.
 
-[Saved Program Status Register - EL2]: https://docs.rs/cortex-a/2.4.0/src/cortex_a/regs/spsr_el2.rs.html
-[Exception Link Register - EL2]: https://docs.rs/cortex-a/2.4.0/src/cortex_a/regs/elr_el2.rs.html
+[Saved Program Status Register - EL2]: https://docs.rs/cortex-a/5.1.2/src/cortex_a/regs/spsr_el2.rs.html
+[Exception Link Register - EL2]: https://docs.rs/cortex-a/5.1.2/src/cortex_a/regs/elr_el2.rs.html
 
 ```rust
 // Set up a simulated exception return.
@@ -156,23 +155,23 @@ Disassembly of section .text:
 0000000000080000 <_start>:
    80000:       d53800a8        mrs     x8, mpidr_el1
    80004:       f240051f        tst     x8, #0x3
-   80008:       54000081        b.ne    80018 <_start+0x18>
+   80008:       54000081        b.ne    80018 <_start+0x18>  // b.any
    8000c:       d5384248        mrs     x8, currentel
    80010:       f100211f        cmp     x8, #0x8
-   80014:       54000060        b.eq    80020 <_start+0x20>
+   80014:       54000060        b.eq    80020 <_start+0x20>  // b.none
    80018:       d503205f        wfe
    8001c:       17ffffff        b       80018 <_start+0x18>
    80020:       aa1f03e8        mov     x8, xzr
-   80024:       52800069        mov     w9, #0x3
+   80024:       52800069        mov     w9, #0x3                        // #3
    80028:       d51ce109        msr     cnthctl_el2, x9
    8002c:       d51ce068        msr     cntvoff_el2, x8
-   80030:       90000008        adrp    x8, 80000 <_start>
-   80034:       52b0000a        mov     w10, #0x80000000
-   80038:       528078ab        mov     w11, #0x3c5
-   8003c:       52a0010c        mov     w12, #0x80000
+   80030:       d0000008        adrp    x8, 82000 <kernel::kernel_main+0x6b4>
+   80034:       52b0000a        mov     w10, #0x80000000                // #-2147483648
+   80038:       528078ab        mov     w11, #0x3c5                     // #965
+   8003c:       52a0010c        mov     w12, #0x80000                   // #524288
    80040:       d51c110a        msr     hcr_el2, x10
    80044:       d51c400b        msr     spsr_el2, x11
-   80048:       91374108        add     x8, x8, #0xdd0
+   80048:       9114c108        add     x8, x8, #0x530
    8004c:       d51c4028        msr     elr_el2, x8
    80050:       d51c410c        msr     sp_el1, x12
    80054:       d69f03e0        eret
@@ -223,35 +222,20 @@ Minipush 1.0
 ## Diff to previous
 ```diff
 
-diff -uNr 09_hw_debug_JTAG/src/_arch/aarch64/cpu.rs 10_privilege_level/src/_arch/aarch64/cpu.rs
---- 09_hw_debug_JTAG/src/_arch/aarch64/cpu.rs
-+++ 10_privilege_level/src/_arch/aarch64/cpu.rs
-@@ -18,21 +18,65 @@
- /// # Safety
- ///
- /// - Linker script must ensure to place this function where it is expected by the target machine.
--/// - We have to hope that the compiler omits any stack pointer usage before the stack pointer is
--///   actually set (`SP.set()`).
-+/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
-+///   a stack for EL2.
- #[no_mangle]
- pub unsafe fn _start() -> ! {
--    use crate::runtime_init;
--
--    if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
--        SP.set(bsp::memory::boot_core_stack_end() as u64);
--        runtime_init::runtime_init()
-+    // Expect the boot core to start in EL2.
-+    if (bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id())
-+        && (CurrentEL.get() == CurrentEL::EL::EL2.value)
-+    {
-+        el2_to_el1_transition()
-     } else {
-         // If not core0, infinitely wait for events.
-         wait_forever()
-     }
- }
+diff -uNr 09_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs 10_privilege_level/src/_arch/aarch64/cpu/boot.rs
+--- 09_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs
++++ 10_privilege_level/src/_arch/aarch64/cpu/boot.rs
+@@ -12,7 +12,55 @@
+ //! crate::cpu::boot::arch_boot
 
+ use crate::{bsp, cpu};
+-use cortex_a::regs::*;
++use cortex_a::{asm, regs::*};
++
++//--------------------------------------------------------------------------------------------------
++// Private Code
++//--------------------------------------------------------------------------------------------------
++
 +/// Transition from EL2 to EL1.
 +///
 +/// # Safety
@@ -295,20 +279,49 @@ diff -uNr 09_hw_debug_JTAG/src/_arch/aarch64/cpu.rs 10_privilege_level/src/_arch
 +    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
 +    asm::eret()
 +}
-+
+
  //--------------------------------------------------------------------------------------------------
  // Public Code
- //--------------------------------------------------------------------------------------------------
+@@ -25,15 +73,15 @@
+ /// # Safety
+ ///
+ /// - Linker script must ensure to place this function where it is expected by the target machine.
+-/// - We have to hope that the compiler omits any stack pointer usage before the stack pointer is
+-///   actually set (`SP.set()`).
++/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
++///   a stack for EL2.
+ #[no_mangle]
+ pub unsafe fn _start() -> ! {
+-    use crate::runtime_init;
+-
+-    if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
+-        SP.set(bsp::memory::boot_core_stack_end() as u64);
+-        runtime_init::runtime_init()
++    // Expect the boot core to start in EL2.
++    if (bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id())
++        && (CurrentEL.get() == CurrentEL::EL::EL2.value)
++    {
++        el2_to_el1_transition()
+     } else {
+         // If not core0, infinitely wait for events.
+         cpu::wait_forever()
 
 diff -uNr 09_hw_debug_JTAG/src/_arch/aarch64/exception/asynchronous.rs 10_privilege_level/src/_arch/aarch64/exception/asynchronous.rs
 --- 09_hw_debug_JTAG/src/_arch/aarch64/exception/asynchronous.rs
 +++ 10_privilege_level/src/_arch/aarch64/exception/asynchronous.rs
-@@ -0,0 +1,74 @@
+@@ -0,0 +1,81 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Architectural asynchronous exception handling.
++//!
++//! # Orientation
++//!
++//! Since arch modules are imported into generic modules using the path attribute, the path of this
++//! file is:
++//!
++//! crate::exception::asynchronous::arch_asynchronous
 +
 +use cortex_a::regs::*;
 +
@@ -382,12 +395,19 @@ diff -uNr 09_hw_debug_JTAG/src/_arch/aarch64/exception/asynchronous.rs 10_privil
 diff -uNr 09_hw_debug_JTAG/src/_arch/aarch64/exception.rs 10_privilege_level/src/_arch/aarch64/exception.rs
 --- 09_hw_debug_JTAG/src/_arch/aarch64/exception.rs
 +++ 10_privilege_level/src/_arch/aarch64/exception.rs
-@@ -0,0 +1,23 @@
+@@ -0,0 +1,30 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Architectural synchronous and asynchronous exception handling.
++//!
++//! # Orientation
++//!
++//! Since arch modules are imported into generic modules using the path attribute, the path of this
++//! file is:
++//!
++//! crate::exception::arch_exception
 +
 +use cortex_a::regs::*;
 +
@@ -410,7 +430,7 @@ diff -uNr 09_hw_debug_JTAG/src/_arch/aarch64/exception.rs 10_privilege_level/src
 diff -uNr 09_hw_debug_JTAG/src/exception/asynchronous.rs 10_privilege_level/src/exception/asynchronous.rs
 --- 09_hw_debug_JTAG/src/exception/asynchronous.rs
 +++ 10_privilege_level/src/exception/asynchronous.rs
-@@ -0,0 +1,10 @@
+@@ -0,0 +1,14 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -419,13 +439,17 @@ diff -uNr 09_hw_debug_JTAG/src/exception/asynchronous.rs 10_privilege_level/src/
 +
 +#[cfg(target_arch = "aarch64")]
 +#[path = "../_arch/aarch64/exception/asynchronous.rs"]
-+mod arch_exception_async;
-+pub use arch_exception_async::*;
++mod arch_asynchronous;
++
++//--------------------------------------------------------------------------------------------------
++// Architectural Public Reexports
++//--------------------------------------------------------------------------------------------------
++pub use arch_asynchronous::print_state;
 
 diff -uNr 09_hw_debug_JTAG/src/exception.rs 10_privilege_level/src/exception.rs
 --- 09_hw_debug_JTAG/src/exception.rs
 +++ 10_privilege_level/src/exception.rs
-@@ -0,0 +1,26 @@
+@@ -0,0 +1,30 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -435,11 +459,15 @@ diff -uNr 09_hw_debug_JTAG/src/exception.rs 10_privilege_level/src/exception.rs
 +#[cfg(target_arch = "aarch64")]
 +#[path = "_arch/aarch64/exception.rs"]
 +mod arch_exception;
-+pub use arch_exception::*;
 +
 +pub mod asynchronous;
 +
 +//--------------------------------------------------------------------------------------------------
++// Architectural Public Reexports
++//--------------------------------------------------------------------------------------------------
++pub use arch_exception::current_privilege_level;
++
++//--------------------------------------------------------------------------------------------------
 +// Public Definitions
 +//--------------------------------------------------------------------------------------------------
 +
@@ -456,7 +484,7 @@ diff -uNr 09_hw_debug_JTAG/src/exception.rs 10_privilege_level/src/exception.rs
 diff -uNr 09_hw_debug_JTAG/src/main.rs 10_privilege_level/src/main.rs
 --- 09_hw_debug_JTAG/src/main.rs
 +++ 10_privilege_level/src/main.rs
-@@ -116,6 +116,7 @@
+@@ -117,6 +117,7 @@
  mod console;
  mod cpu;
  mod driver;
@@ -464,7 +492,7 @@ diff -uNr 09_hw_debug_JTAG/src/main.rs 10_privilege_level/src/main.rs
  mod memory;
  mod panic_wait;
  mod print;
-@@ -146,12 +147,20 @@
+@@ -147,12 +148,20 @@
 
  /// The main function running after the early init.
  fn kernel_main() -> ! {
@@ -485,7 +513,7 @@ diff -uNr 09_hw_debug_JTAG/src/main.rs 10_privilege_level/src/main.rs
      info!(
          "Architectural timer resolution: {} ns",
          time::time_manager().resolution().as_nanos()
-@@ -166,11 +175,15 @@
+@@ -167,11 +176,15 @@
          info!("      {}. {}", i + 1, driver.compatible());
      }
 
diff --git a/10_privilege_level/src/_arch/aarch64/cpu.rs b/10_privilege_level/src/_arch/aarch64/cpu.rs
index 3846968b3..d3b07461a 100644
--- a/10_privilege_level/src/_arch/aarch64/cpu.rs
+++ b/10_privilege_level/src/_arch/aarch64/cpu.rs
@@ -3,79 +3,15 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
-
-use crate::{bsp, cpu};
-use cortex_a::{asm, regs::*};
-
-//--------------------------------------------------------------------------------------------------
-// Boot Code
-//--------------------------------------------------------------------------------------------------
-
-/// The entry of the `kernel` binary.
-///
-/// The function must be named `_start`, because the linker is looking for this exact name.
-///
-/// # Safety
-///
-/// - Linker script must ensure to place this function where it is expected by the target machine.
-/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
-///   a stack for EL2.
-#[no_mangle]
-pub unsafe fn _start() -> ! {
-    // Expect the boot core to start in EL2.
-    if (bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id())
-        && (CurrentEL.get() == CurrentEL::EL::EL2.value)
-    {
-        el2_to_el1_transition()
-    } else {
-        // If not core0, infinitely wait for events.
-        wait_forever()
-    }
-}
-
-/// Transition from EL2 to EL1.
-///
-/// # Safety
-///
-/// - The HW state of EL1 must be prepared in a sound way.
-/// - Exception return from EL2 must must continue execution in EL1 with
-///   `runtime_init::runtime_init()`.
-/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
-///   a stack for EL2.
-#[inline(always)]
-unsafe fn el2_to_el1_transition() -> ! {
-    use crate::runtime_init;
-
-    // Enable timer counter registers for EL1.
-    CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
-
-    // No offset for reading the counters.
-    CNTVOFF_EL2.set(0);
-
-    // Set EL1 execution state to AArch64.
-    HCR_EL2.write(HCR_EL2::RW::EL1IsAarch64);
-
-    // Set up a simulated exception return.
-    //
-    // First, fake a saved program status where all interrupts were masked and SP_EL1 was used as a
-    // stack pointer.
-    SPSR_EL2.write(
-        SPSR_EL2::D::Masked
-            + SPSR_EL2::A::Masked
-            + SPSR_EL2::I::Masked
-            + SPSR_EL2::F::Masked
-            + SPSR_EL2::M::EL1h,
-    );
-
-    // Second, let the link register point to runtime_init().
-    ELR_EL2.set(runtime_init::runtime_init as *const () as u64);
-
-    // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it.
-    SP_EL1.set(bsp::memory::boot_core_stack_end() as u64);
-
-    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
-    asm::eret()
-}
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::arch_cpu
+
+use cortex_a::asm;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/10_privilege_level/src/_arch/aarch64/cpu/boot.rs b/10_privilege_level/src/_arch/aarch64/cpu/boot.rs
new file mode 100644
index 000000000..c2f5fe0b7
--- /dev/null
+++ b/10_privilege_level/src/_arch/aarch64/cpu/boot.rs
@@ -0,0 +1,89 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural boot code.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::boot::arch_boot
+
+use crate::{bsp, cpu};
+use cortex_a::{asm, regs::*};
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// Transition from EL2 to EL1.
+///
+/// # Safety
+///
+/// - The HW state of EL1 must be prepared in a sound way.
+/// - Exception return from EL2 must must continue execution in EL1 with
+///   `runtime_init::runtime_init()`.
+/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
+///   a stack for EL2.
+#[inline(always)]
+unsafe fn el2_to_el1_transition() -> ! {
+    use crate::runtime_init;
+
+    // Enable timer counter registers for EL1.
+    CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
+
+    // No offset for reading the counters.
+    CNTVOFF_EL2.set(0);
+
+    // Set EL1 execution state to AArch64.
+    HCR_EL2.write(HCR_EL2::RW::EL1IsAarch64);
+
+    // Set up a simulated exception return.
+    //
+    // First, fake a saved program status where all interrupts were masked and SP_EL1 was used as a
+    // stack pointer.
+    SPSR_EL2.write(
+        SPSR_EL2::D::Masked
+            + SPSR_EL2::A::Masked
+            + SPSR_EL2::I::Masked
+            + SPSR_EL2::F::Masked
+            + SPSR_EL2::M::EL1h,
+    );
+
+    // Second, let the link register point to runtime_init().
+    ELR_EL2.set(runtime_init::runtime_init as *const () as u64);
+
+    // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it.
+    SP_EL1.set(bsp::memory::boot_core_stack_end() as u64);
+
+    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
+    asm::eret()
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The entry of the `kernel` binary.
+///
+/// The function must be named `_start`, because the linker is looking for this exact name.
+///
+/// # Safety
+///
+/// - Linker script must ensure to place this function where it is expected by the target machine.
+/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
+///   a stack for EL2.
+#[no_mangle]
+pub unsafe fn _start() -> ! {
+    // Expect the boot core to start in EL2.
+    if (bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id())
+        && (CurrentEL.get() == CurrentEL::EL::EL2.value)
+    {
+        el2_to_el1_transition()
+    } else {
+        // If not core0, infinitely wait for events.
+        cpu::wait_forever()
+    }
+}
diff --git a/10_privilege_level/src/_arch/aarch64/cpu/smp.rs b/10_privilege_level/src/_arch/aarch64/cpu/smp.rs
index c80f7e780..b9fdd0f73 100644
--- a/10_privilege_level/src/_arch/aarch64/cpu/smp.rs
+++ b/10_privilege_level/src/_arch/aarch64/cpu/smp.rs
@@ -3,6 +3,13 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::smp::arch_smp
 
 use cortex_a::regs::*;
 
diff --git a/10_privilege_level/src/_arch/aarch64/exception.rs b/10_privilege_level/src/_arch/aarch64/exception.rs
index b6ee28b8c..d8c617b2a 100644
--- a/10_privilege_level/src/_arch/aarch64/exception.rs
+++ b/10_privilege_level/src/_arch/aarch64/exception.rs
@@ -3,6 +3,13 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural synchronous and asynchronous exception handling.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::exception::arch_exception
 
 use cortex_a::regs::*;
 
diff --git a/10_privilege_level/src/_arch/aarch64/exception/asynchronous.rs b/10_privilege_level/src/_arch/aarch64/exception/asynchronous.rs
index 445f490eb..b63b00fe7 100644
--- a/10_privilege_level/src/_arch/aarch64/exception/asynchronous.rs
+++ b/10_privilege_level/src/_arch/aarch64/exception/asynchronous.rs
@@ -3,6 +3,13 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural asynchronous exception handling.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::exception::asynchronous::arch_asynchronous
 
 use cortex_a::regs::*;
 
diff --git a/10_privilege_level/src/_arch/aarch64/time.rs b/10_privilege_level/src/_arch/aarch64/time.rs
index 7f1bc6963..3a766009d 100644
--- a/10_privilege_level/src/_arch/aarch64/time.rs
+++ b/10_privilege_level/src/_arch/aarch64/time.rs
@@ -3,6 +3,13 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::time::arch_time
 
 use crate::{time, warn};
 use core::time::Duration;
@@ -55,7 +62,7 @@ impl time::interface::TimeManager for GenericTimer {
         }
 
         // Calculate the register compare value.
-        let frq = CNTFRQ_EL0.get() as u64;
+        let frq = CNTFRQ_EL0.get();
         let x = match frq.checked_mul(duration.as_nanos() as u64) {
             None => {
                 warn!("Spin duration too long, skipping");
diff --git a/10_privilege_level/src/bsp.rs b/10_privilege_level/src/bsp.rs
index 257502491..c558922f7 100644
--- a/10_privilege_level/src/bsp.rs
+++ b/10_privilege_level/src/bsp.rs
@@ -2,7 +2,7 @@
 //
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-//! Conditional re-exporting of Board Support Packages.
+//! Conditional reexporting of Board Support Packages.
 
 mod device_driver;
 
diff --git a/10_privilege_level/src/console.rs b/10_privilege_level/src/console.rs
index 3552823cc..c3154ba23 100644
--- a/10_privilege_level/src/console.rs
+++ b/10_privilege_level/src/console.rs
@@ -20,8 +20,7 @@ pub mod interface {
         /// Write a Rust format string.
         fn write_fmt(&self, args: fmt::Arguments) -> fmt::Result;
 
-        /// Block execution until the last buffered character has been physically put on the TX
-        /// wire.
+        /// Block until the last buffered character has been physically put on the TX wire.
         fn flush(&self);
     }
 
diff --git a/10_privilege_level/src/cpu.rs b/10_privilege_level/src/cpu.rs
index c9e5af72c..3834f183c 100644
--- a/10_privilege_level/src/cpu.rs
+++ b/10_privilege_level/src/cpu.rs
@@ -7,6 +7,12 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "_arch/aarch64/cpu.rs"]
 mod arch_cpu;
-pub use arch_cpu::*;
+
+mod boot;
 
 pub mod smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_cpu::{nop, wait_forever};
diff --git a/10_privilege_level/src/cpu/boot.rs b/10_privilege_level/src/cpu/boot.rs
new file mode 100644
index 000000000..1dc5c1808
--- /dev/null
+++ b/10_privilege_level/src/cpu/boot.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Boot code.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/cpu/boot.rs"]
+mod arch_boot;
diff --git a/10_privilege_level/src/cpu/smp.rs b/10_privilege_level/src/cpu/smp.rs
index 90ecbdf30..38230ce1e 100644
--- a/10_privilege_level/src/cpu/smp.rs
+++ b/10_privilege_level/src/cpu/smp.rs
@@ -6,5 +6,9 @@
 
 #[cfg(target_arch = "aarch64")]
 #[path = "../_arch/aarch64/cpu/smp.rs"]
-mod arch_cpu_smp;
-pub use arch_cpu_smp::*;
+mod arch_smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_smp::core_id;
diff --git a/10_privilege_level/src/exception.rs b/10_privilege_level/src/exception.rs
index 432c606b9..87d4db63a 100644
--- a/10_privilege_level/src/exception.rs
+++ b/10_privilege_level/src/exception.rs
@@ -7,10 +7,14 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "_arch/aarch64/exception.rs"]
 mod arch_exception;
-pub use arch_exception::*;
 
 pub mod asynchronous;
 
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_exception::current_privilege_level;
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
diff --git a/10_privilege_level/src/exception/asynchronous.rs b/10_privilege_level/src/exception/asynchronous.rs
index fbdba9579..566efe329 100644
--- a/10_privilege_level/src/exception/asynchronous.rs
+++ b/10_privilege_level/src/exception/asynchronous.rs
@@ -6,5 +6,9 @@
 
 #[cfg(target_arch = "aarch64")]
 #[path = "../_arch/aarch64/exception/asynchronous.rs"]
-mod arch_exception_async;
-pub use arch_exception_async::*;
+mod arch_asynchronous;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_asynchronous::print_state;
diff --git a/10_privilege_level/src/main.rs b/10_privilege_level/src/main.rs
index fc2bd6912..741883437 100644
--- a/10_privilege_level/src/main.rs
+++ b/10_privilege_level/src/main.rs
@@ -7,16 +7,6 @@
 
 //! The `kernel` binary.
 //!
-//! # TL;DR - Overview of important Kernel entities
-//!
-//! - [`bsp::console::console()`] - Returns a reference to the kernel's [console interface].
-//! - [`bsp::driver::driver_manager()`] - Returns a reference to the kernel's [driver interface].
-//! - [`time::time_manager()`] - Returns a reference to the kernel's [timer interface].
-//!
-//! [console interface]: ../libkernel/console/interface/index.html
-//! [driver interface]: ../libkernel/driver/interface/trait.DriverManager.html
-//! [timer interface]: ../libkernel/time/interface/trait.TimeManager.html
-//!
 //! # Code organization and architecture
 //!
 //! The code is divided into different *modules*, each representing a typical **subsystem** of the
@@ -30,15 +20,22 @@
 //! `src/_arch`, for example, `src/_arch/aarch64`.
 //!
 //! The architecture folders mirror the subsystem modules laid out in `src`. For example,
-//! architectural code that belongs to the `kernel`'s memory subsystem (`src/memory.rs`) would go
-//! into `src/_arch/aarch64/memory.rs`. The latter file is directly included and re-exported in
-//! `src/memory.rs`, so that the architectural code parts are transparent with respect to the code's
-//! module organization. That means a public function `foo()` defined in
-//! `src/_arch/aarch64/memory.rs` would be reachable as `crate::memory::foo()` only.
+//! architectural code that belongs to the `kernel`'s MMU subsystem (`src/memory/mmu.rs`) would go
+//! into `src/_arch/aarch64/memory/mmu.rs`. The latter file is loaded as a module in
+//! `src/memory/mmu.rs` using the `path attribute`. Usually, the chosen module name is the generic
+//! module's name prefixed with `arch_`.
 //!
-//! The `_` in `_arch` denotes that this folder is not part of the standard module hierarchy.
-//! Rather, it's contents are conditionally pulled into respective files using the `#[path =
-//! "_arch/xxx/yyy.rs"]` attribute.
+//! For example, this is the top of `src/memory/mmu.rs`:
+//!
+//! ```
+//! #[cfg(target_arch = "aarch64")]
+//! #[path = "../_arch/aarch64/memory/mmu.rs"]
+//! mod arch_mmu;
+//! ```
+//!
+//! Often times, items from the `arch_ module` will be publicly reexported by the parent module.
+//! This way, each architecture specific module can provide its implementation of an item, while the
+//! caller must not be concerned which architecture has been conditionally compiled.
 //!
 //! ## BSP code
 //!
@@ -47,9 +44,8 @@
 //! or instances of drivers for devices that are featured on the respective board.
 //!
 //! Just like processor architecture code, the `BSP` code's module structure tries to mirror the
-//! `kernel`'s subsystem modules, but there is no transparent re-exporting this time. That means
-//! whatever is provided must be called starting from the `bsp` namespace, e.g.
-//! `bsp::driver::driver_manager()`.
+//! `kernel`'s subsystem modules, but there is no reexporting this time. That means whatever is
+//! provided must be called starting from the `bsp` namespace, e.g. `bsp::driver::driver_manager()`.
 //!
 //! ## Kernel interfaces
 //!
@@ -101,6 +97,14 @@
 //!
 //! - `crate::memory::*`
 //! - `crate::bsp::memory::*`
+//!
+//! # Boot flow
+//!
+//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
+//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
+//!
+//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
@@ -109,9 +113,6 @@
 #![no_main]
 #![no_std]
 
-// `mod cpu` provides the `_start()` function, the first function to run. `_start()` then calls
-// `runtime_init()`, which jumps to `kernel_init()`.
-
 mod bsp;
 mod console;
 mod cpu;
diff --git a/10_privilege_level/src/print.rs b/10_privilege_level/src/print.rs
index 1ea96b6ad..5a5638113 100644
--- a/10_privilege_level/src/print.rs
+++ b/10_privilege_level/src/print.rs
@@ -2,7 +2,7 @@
 //
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-//! Printing facilities.
+//! Printing.
 
 use crate::{bsp, console};
 use core::fmt;
diff --git a/10_privilege_level/src/time.rs b/10_privilege_level/src/time.rs
index 4f2f4e38f..953b6f0df 100644
--- a/10_privilege_level/src/time.rs
+++ b/10_privilege_level/src/time.rs
@@ -7,7 +7,11 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "_arch/aarch64/time.rs"]
 mod arch_time;
-pub use arch_time::*;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_time::time_manager;
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -18,8 +22,6 @@ pub mod interface {
     use core::time::Duration;
 
     /// Time management functions.
-    ///
-    /// The `BSP` is supposed to supply one global instance.
     pub trait TimeManager {
         /// The timer's resolution.
         fn resolution(&self) -> Duration;
diff --git a/11_virtual_mem_part1_identity_mapping/Makefile b/11_virtual_mem_part1_identity_mapping/Makefile
index 9254018cf..9105d297f 100644
--- a/11_virtual_mem_part1_identity_mapping/Makefile
+++ b/11_virtual_mem_part1_identity_mapping/Makefile
@@ -44,8 +44,9 @@ export LINKER_FILE
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
+FEATURES      = bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
-    --features bsp_$(BSP)          \
+    --features $(FEATURES)         \
     --release
 
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
diff --git a/11_virtual_mem_part1_identity_mapping/README.md b/11_virtual_mem_part1_identity_mapping/README.md
index c64442967..0d24f17fb 100644
--- a/11_virtual_mem_part1_identity_mapping/README.md
+++ b/11_virtual_mem_part1_identity_mapping/README.md
@@ -3,7 +3,7 @@
 ## tl;dr
 
 - The `MMU` is turned on.
-- A simple scheme is used: static `64 KiB` translation tables.
+- A simple scheme is used: Static `64 KiB` translation tables.
 - For educational purposes, we write to a remapped `UART`, and `identity map` everything else.
 
 ## Table of Contents
@@ -13,7 +13,7 @@
 - [Approach](#approach)
   * [Generic Kernel code: `memory/mmu.rs`](#generic-kernel-code-memorymmurs)
   * [BSP: `bsp/raspberrypi/memory/mmu.rs`](#bsp-bspraspberrypimemorymmurs)
-  * [AArch64: `_arch/aarch64/memory/mmu.rs`](#aarch64-_archaarch64memorymmurs)
+  * [AArch64: `_arch/aarch64/memory/*`](#aarch64-_archaarch64memory)
   * [`link.ld`](#linkld)
 - [Address translation examples](#address-translation-examples)
   * [Address translation using a 64 KiB page descriptor](#address-translation-using-a-64-kib-page-descriptor)
@@ -25,8 +25,8 @@
 
 Virtual memory is an immensely complex, but important and powerful topic. In this tutorial, we start
 slow and easy by switching on the `MMU`, using static translation tables and `identity-map`
-everything at once (except for the `UART`, which we remap for educational purposes; This will be
-gone again in the next tutorial).
+everything at once (except for the `UART`, which we also remap a second time for educational
+purposes; This will be gone again in the next tutorial).
 
 ## MMU and paging theory
 
@@ -44,14 +44,15 @@ Back from reading `Chapter 12` already? Good job :+1:!
 
 ## Approach
 
-1. The generic `kernel` part: `src/memory/mmu.rs` provides architecture-agnostic descriptor types
-   for composing a high-level data structure that describes the kernel's virtual memory layout:
-   `memory::mmu::KernelVirtualLayout`.
+1. The generic `kernel` part: `src/memory/mmu.rs` and its submodules provide architecture-agnostic
+   descriptor types for composing a high-level data structure that describes the kernel's virtual
+   memory layout: `memory::mmu::KernelVirtualLayout`.
 2. The `BSP` part: `src/bsp/raspberrypi/memory/mmu.rs` contains a static instance of
    `KernelVirtualLayout` and makes it accessible through the function
    `bsp::memory::mmu::virt_mem_layout()`.
-3. The `aarch64` part: `src/_arch/aarch64/memory/mmu.rs` contains the actual `MMU` driver. It picks
-   up the `BSP`'s high-level `KernelVirtualLayout` and maps it using a `64 KiB` granule.
+3. The `aarch64` part: `src/_arch/aarch64/memory/mmu.rs` and its submodules contain the actual `MMU`
+   driver. It picks up the `BSP`'s high-level `KernelVirtualLayout` and maps it using a `64 KiB`
+   granule.
 
 ### Generic Kernel code: `memory/mmu.rs`
 
@@ -97,42 +98,63 @@ pub fn virt_addr_properties(
 ) -> Result<(usize, AttributeFields), &'static str>
 ```
 
-It will be used by the `_arch/aarch64`'s `MMU` code to request attributes for a virtual address and
-the translation, which delivers the physical output address (the `usize` in the return-tuple). The
+It will be used by `_arch/aarch64`'s `MMU` code to request attributes for a virtual address and the
+translation, which delivers the physical output address (the `usize` in the return-tuple). The
 function scans for a descriptor that contains the queried address, and returns the respective
 findings for the first entry that is a hit. If no entry is found, it returns default attributes for
 normal chacheable DRAM and the input address, hence telling the `MMU` code that the requested
 address should be `identity mapped`.
 
-Due to this default return, it is technicall not needed to define normal cacheable DRAM regions.
+Due to this default behavior, it is not needed to define normal cacheable DRAM regions.
 
-### AArch64: `_arch/aarch64/memory/mmu.rs`
+### AArch64: `_arch/aarch64/memory/*`
 
-This file contains the `AArch64` `MMU` driver. The granule is hardcoded here (`64 KiB` page
+These modules contain the `AArch64` `MMU` driver. The granule is hardcoded here (`64 KiB` page
 descriptors).
 
-The actual translation tables are stored in a global instance of the `ArchTranslationTable` struct:
+In `translation_table.rs`, there is a definition of the actual translation table struct which is
+generic over the number of `LVL2` tables. The latter depends on the size of the target board's
+memory. Naturally, the `BSP` knows these details about the target board, and provides the size
+through the constant `bsp::memory::mmu::KernelAddrSpaceSize::SIZE`.
+
+This information is used by `translation_table.rs` to calculate the number of needed `LVL2` tables.
+Since one `LVL2` table in a `64 KiB` configuration covers `512 MiB`, all that needs to be done is to
+divide `KernelAddrSpaceSize::SIZE` by `512 MiB` (there are several compile-time checks in place that
+ensure that `KernelAddrSpaceSize` is a multiple of `512 MiB`).
+
+The final table type is exported as `KernelTranslationTable`. Below is the respective excerpt from
+`translation_table.rs`:
 
 ```rust
 /// A table descriptor for 64 KiB aperture.
 ///
 /// The output points to the next table.
 #[derive(Copy, Clone)]
-#[repr(transparent)]
-struct TableDescriptor(InMemoryRegister<u64, STAGE1_TABLE_DESCRIPTOR::Register>);
+#[repr(C)]
+struct TableDescriptor {
+    value: u64,
+}
 
 /// A page descriptor with 64 KiB aperture.
 ///
 /// The output points to physical memory.
 #[derive(Copy, Clone)]
-#[repr(transparent)]
-struct PageDescriptor(InMemoryRegister<u64, STAGE1_PAGE_DESCRIPTOR::Register>);
+#[repr(C)]
+struct PageDescriptor {
+    value: u64,
+}
+
+const NUM_LVL2_TABLES: usize = bsp::memory::mmu::KernelAddrSpaceSize::SIZE >> Granule512MiB::SHIFT;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
 
 /// Big monolithic struct for storing the translation tables. Individual levels must be 64 KiB
 /// aligned, hence the "reverse" order of appearance.
 #[repr(C)]
 #[repr(align(65536))]
-struct FixedSizeTranslationTable<const NUM_TABLES: usize> {
+pub struct FixedSizeTranslationTable<const NUM_TABLES: usize> {
     /// Page descriptors, covering 64 KiB windows per entry.
     lvl3: [[PageDescriptor; 8192]; NUM_TABLES],
 
@@ -140,55 +162,69 @@ struct FixedSizeTranslationTable<const NUM_TABLES: usize> {
     lvl2: [TableDescriptor; NUM_TABLES],
 }
 
-const NUM_LVL2_TABLES: usize = bsp::memory::mmu::addr_space_size() >> FIVETWELVE_MIB_SHIFT;
-type ArchTranslationTable = FixedSizeTranslationTable<NUM_LVL2_TABLES>;
+/// A translation table type for the kernel space.
+pub type KernelTranslationTable = FixedSizeTranslationTable<NUM_LVL2_TABLES>;
+```
+
+In `mmu.rs`, `KernelTranslationTable` is then used to create the final instance of the kernel's
+tables:
 
+```rust
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
-/// The translation tables.
+/// The kernel translation tables.
 ///
 /// # Safety
 ///
 /// - Supposed to land in `.bss`. Therefore, ensure that all initial member values boil down to "0".
-static mut KERNEL_TABLES: ArchTranslationTable = ArchTranslationTable::new();
+static mut KERNEL_TABLES: KernelTranslationTable = KernelTranslationTable::new();
 ```
 
-They are populated using `bsp::memory::mmu::virt_mem_layout().virt_addr_properties()` and a bunch of
-utility functions that convert our own descriptors to the actual `64 bit` integer entries needed by
-the `MMU` hardware for the translation table arrays.
+They are populated during `MMU::init()` by calling `KERNEL_TABLES.populate_tt_entries()`, which
+utilizes `bsp::memory::mmu::virt_mem_layout().virt_addr_properties()` and a bunch of utility
+functions that convert the kernel generic descriptors to the actual `64 bit` integer entries needed
+by the `AArch64 MMU` hardware for the translation table arrays.
 
-Each page descriptor has an entry (`AttrIndex`) that indexes into the [MAIR_EL1] register, which
-holds information about the cacheability of the respective page. We currently define normal
-cacheable memory and device memory (which is not cached).
+One notable thing is that each page descriptor has an entry (`AttrIndex`) that indexes into the
+[MAIR_EL1] register, which holds information about the cacheability of the respective page. We
+currently define normal cacheable memory and device memory (which is not cached).
 
 [MAIR_EL1]: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0500d/CIHDHJBB.html
 
 ```rust
-/// Setup function for the MAIR_EL1 register.
-fn set_up_mair() {
-    // Define the memory types being mapped.
-    MAIR_EL1.write(
-        // Attribute 1 - Cacheable normal DRAM.
-        MAIR_EL1::Attr1_Normal_Outer::WriteBack_NonTransient_ReadWriteAlloc +
+impl MemoryManagementUnit {
+    /// Setup function for the MAIR_EL1 register.
+    fn set_up_mair(&self) {
+        // Define the memory types being mapped.
+        MAIR_EL1.write(
+            // Attribute 1 - Cacheable normal DRAM.
+            MAIR_EL1::Attr1_Normal_Outer::WriteBack_NonTransient_ReadWriteAlloc +
         MAIR_EL1::Attr1_Normal_Inner::WriteBack_NonTransient_ReadWriteAlloc +
 
         // Attribute 0 - Device.
         MAIR_EL1::Attr0_Device::nonGathering_nonReordering_EarlyWriteAck,
-    );
-}
+        );
+    }
 ```
 
 Afterwards, the [Translation Table Base Register 0 - EL1] is set up with the base address of the
-`lvl2` tables and the [Translation Control Register - EL1] is configured.
+`lvl2` tables and the [Translation Control Register - EL1] is configured:
+
+```rust
+    // Set the "Translation Table Base Register".
+    TTBR0_EL1.set_baddr(KERNEL_TABLES.base_address());
+
+    self.configure_translation_control();
+```
 
 Finally, the `MMU` is turned on through the [System Control Register - EL1]. The last step also
 enables caching for data and instructions.
 
-[Translation Table Base Register 0 - EL1]: https://docs.rs/crate/cortex-a/2.4.0/source/src/regs/ttbr0_el1.rs
-[Translation Control Register - EL1]: https://docs.rs/crate/cortex-a/2.4.0/source/src/regs/tcr_el1.rs
-[System Control Register - EL1]: https://docs.rs/crate/cortex-a/2.4.0/source/src/regs/sctlr_el1.rs
+[Translation Table Base Register 0 - EL1]: https://docs.rs/crate/cortex-a/5.1.2/source/src/regs/ttbr0_el1.rs
+[Translation Control Register - EL1]: https://docs.rs/crate/cortex-a/5.1.2/source/src/regs/tcr_el1.rs
+[System Control Register - EL1]: https://docs.rs/crate/cortex-a/5.1.2/source/src/regs/sctlr_el1.rs
 
 ### `link.ld`
 
@@ -227,15 +263,15 @@ Let's take a look again at the piece of code for setting up the `MAIR_EL1` regis
 
 ```rust
 /// Setup function for the MAIR_EL1 register.
-fn set_up_mair() {
+fn set_up_mair(&self) {
     // Define the memory types being mapped.
     MAIR_EL1.write(
         // Attribute 1 - Cacheable normal DRAM.
         MAIR_EL1::Attr1_Normal_Outer::WriteBack_NonTransient_ReadWriteAlloc +
-        MAIR_EL1::Attr1_Normal_Inner::WriteBack_NonTransient_ReadWriteAlloc +
+    MAIR_EL1::Attr1_Normal_Inner::WriteBack_NonTransient_ReadWriteAlloc +
 
-        // Attribute 0 - Device.
-        MAIR_EL1::Attr0_Device::nonGathering_nonReordering_EarlyWriteAck,
+    // Attribute 0 - Device.
+    MAIR_EL1::Attr0_Device::nonGathering_nonReordering_EarlyWriteAck,
     );
 }
 ```
@@ -248,15 +284,26 @@ data sheet. Looking at the generated code, we can see that despite all the type-
 abstractions, it boils down to two assembly instructions:
 
 ```text
-0000000000081660 <<kernel::memory::mmu::arch_mmu::MemoryManagementUnit as kernel::memory::mmu::interface::MMU>::init>:
-   ...
-   816bc:       529fe088        mov     w8, #0xff04
-   ...
-   816c4:       d518a208        msr     mair_el1, x8
+   800a8:       529fe089        mov     w9, #0xff04                     // #65284
+   800ac:       d518a209        msr     mair_el1, x9
 ```
 
 ## Test it
 
+Turning on virtual memory is now the first thing we do during kernel init:
+
+```rust
+unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+    use memory::mmu::interface::MMU;
+
+    if let Err(string) = memory::mmu::mmu().init() {
+        panic!("MMU: {}", string);
+    }
+```
+
+Later in the boot process, prints about the mappings can be observed:
+
 ```console
 $ make chainboot
 [...]
@@ -299,22 +346,33 @@ Minipush 1.0
 ## Diff to previous
 ```diff
 
-diff -uNr 10_privilege_level/src/_arch/aarch64/memory/mmu.rs 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
---- 10_privilege_level/src/_arch/aarch64/memory/mmu.rs
-+++ 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
-@@ -0,0 +1,343 @@
+diff -uNr 10_privilege_level/src/_arch/aarch64/memory/mmu/translation_table.rs 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs
+--- 10_privilege_level/src/_arch/aarch64/memory/mmu/translation_table.rs
++++ 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs
+@@ -0,0 +1,288 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
 +
-+//! Memory Management Unit Driver.
++//! Architectural translation table.
 +//!
-+//! Static translation tables, compiled on boot; Everything 64 KiB granule.
-+
-+use super::{AccessPermissions, AttributeFields, MemAttributes};
-+use crate::{bsp, memory};
++//! Only 64 KiB granule is supported.
++//!
++//! # Orientation
++//!
++//! Since arch modules are imported into generic modules using the path attribute, the path of this
++//! file is:
++//!
++//! crate::memory::mmu::translation_table::arch_translation_table
++
++use crate::{
++    bsp, memory,
++    memory::mmu::{
++        arch_mmu::{Granule512MiB, Granule64KiB},
++        AccessPermissions, AttributeFields, MemAttributes,
++    },
++};
 +use core::convert;
-+use cortex_a::{barrier, regs::*};
 +use register::{register_bitfields, InMemoryRegister};
 +
 +//--------------------------------------------------------------------------------------------------
@@ -392,65 +450,49 @@ diff -uNr 10_privilege_level/src/_arch/aarch64/memory/mmu.rs 11_virtual_mem_part
 +    ]
 +}
 +
-+const SIXTYFOUR_KIB_SHIFT: usize = 16; //  log2(64 * 1024)
-+const FIVETWELVE_MIB_SHIFT: usize = 29; // log2(512 * 1024 * 1024)
-+
 +/// A table descriptor for 64 KiB aperture.
 +///
 +/// The output points to the next table.
 +#[derive(Copy, Clone)]
-+#[repr(transparent)]
-+struct TableDescriptor(u64);
++#[repr(C)]
++struct TableDescriptor {
++    value: u64,
++}
 +
 +/// A page descriptor with 64 KiB aperture.
 +///
 +/// The output points to physical memory.
 +#[derive(Copy, Clone)]
-+#[repr(transparent)]
-+struct PageDescriptor(u64);
-+
-+/// Big monolithic struct for storing the translation tables. Individual levels must be 64 KiB
-+/// aligned, hence the "reverse" order of appearance.
 +#[repr(C)]
-+#[repr(align(65536))]
-+struct FixedSizeTranslationTable<const NUM_TABLES: usize> {
-+    /// Page descriptors, covering 64 KiB windows per entry.
-+    lvl3: [[PageDescriptor; 8192]; NUM_TABLES],
-+
-+    /// Table descriptors, covering 512 MiB windows.
-+    lvl2: [TableDescriptor; NUM_TABLES],
++struct PageDescriptor {
++    value: u64,
 +}
 +
-+const NUM_LVL2_TABLES: usize = bsp::memory::mmu::addr_space_size() >> FIVETWELVE_MIB_SHIFT;
-+type ArchTranslationTable = FixedSizeTranslationTable<NUM_LVL2_TABLES>;
-+
 +trait BaseAddr {
 +    fn base_addr_u64(&self) -> u64;
 +    fn base_addr_usize(&self) -> usize;
 +}
 +
-+/// Constants for indexing the MAIR_EL1.
-+#[allow(dead_code)]
-+mod mair {
-+    pub const DEVICE: u64 = 0;
-+    pub const NORMAL: u64 = 1;
-+}
-+
-+/// Memory Management Unit type.
-+struct MemoryManagementUnit;
++const NUM_LVL2_TABLES: usize = bsp::memory::mmu::KernelAddrSpaceSize::SIZE >> Granule512MiB::SHIFT;
 +
 +//--------------------------------------------------------------------------------------------------
-+// Global instances
++// Public Definitions
 +//--------------------------------------------------------------------------------------------------
 +
-+/// The translation tables.
-+///
-+/// # Safety
-+///
-+/// - Supposed to land in `.bss`. Therefore, ensure that all initial member values boil down to "0".
-+static mut KERNEL_TABLES: ArchTranslationTable = ArchTranslationTable::new();
++/// Big monolithic struct for storing the translation tables. Individual levels must be 64 KiB
++/// aligned, hence the "reverse" order of appearance.
++#[repr(C)]
++#[repr(align(65536))]
++pub struct FixedSizeTranslationTable<const NUM_TABLES: usize> {
++    /// Page descriptors, covering 64 KiB windows per entry.
++    lvl3: [[PageDescriptor; 8192]; NUM_TABLES],
 +
-+static MMU: MemoryManagementUnit = MemoryManagementUnit;
++    /// Table descriptors, covering 512 MiB windows.
++    lvl2: [TableDescriptor; NUM_TABLES],
++}
++
++/// A translation table type for the kernel space.
++pub type KernelTranslationTable = FixedSizeTranslationTable<NUM_LVL2_TABLES>;
 +
 +//--------------------------------------------------------------------------------------------------
 +// Private Code
@@ -466,18 +508,26 @@ diff -uNr 10_privilege_level/src/_arch/aarch64/memory/mmu.rs 11_virtual_mem_part
 +    }
 +}
 +
-+impl convert::From<usize> for TableDescriptor {
-+    fn from(next_lvl_table_addr: usize) -> Self {
++impl TableDescriptor {
++    /// Create an instance.
++    ///
++    /// Descriptor is invalid by default.
++    pub const fn new_zeroed() -> Self {
++        Self { value: 0 }
++    }
++
++    /// Create an instance pointing to the supplied address.
++    pub fn from_next_lvl_table_addr(next_lvl_table_addr: usize) -> Self {
 +        let val = InMemoryRegister::<u64, STAGE1_TABLE_DESCRIPTOR::Register>::new(0);
 +
-+        let shifted = next_lvl_table_addr >> SIXTYFOUR_KIB_SHIFT;
++        let shifted = next_lvl_table_addr >> Granule64KiB::SHIFT;
 +        val.write(
 +            STAGE1_TABLE_DESCRIPTOR::VALID::True
 +                + STAGE1_TABLE_DESCRIPTOR::TYPE::Table
 +                + STAGE1_TABLE_DESCRIPTOR::NEXT_LEVEL_TABLE_ADDR_64KiB.val(shifted as u64),
 +        );
 +
-+        TableDescriptor(val.get())
++        TableDescriptor { value: val.get() }
 +    }
 +}
 +
@@ -490,11 +540,11 @@ diff -uNr 10_privilege_level/src/_arch/aarch64/memory/mmu.rs 11_virtual_mem_part
 +        let mut desc = match attribute_fields.mem_attributes {
 +            MemAttributes::CacheableDRAM => {
 +                STAGE1_PAGE_DESCRIPTOR::SH::InnerShareable
-+                    + STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(mair::NORMAL)
++                    + STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(memory::mmu::arch_mmu::mair::NORMAL)
 +            }
 +            MemAttributes::Device => {
 +                STAGE1_PAGE_DESCRIPTOR::SH::OuterShareable
-+                    + STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(mair::DEVICE)
++                    + STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(memory::mmu::arch_mmu::mair::DEVICE)
 +            }
 +        };
 +
@@ -520,10 +570,17 @@ diff -uNr 10_privilege_level/src/_arch/aarch64/memory/mmu.rs 11_virtual_mem_part
 +
 +impl PageDescriptor {
 +    /// Create an instance.
-+    fn new(output_addr: usize, attribute_fields: AttributeFields) -> Self {
++    ///
++    /// Descriptor is invalid by default.
++    pub const fn new_zeroed() -> Self {
++        Self { value: 0 }
++    }
++
++    /// Create an instance.
++    pub fn from_output_addr(output_addr: usize, attribute_fields: AttributeFields) -> Self {
 +        let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
 +
-+        let shifted = output_addr as u64 >> SIXTYFOUR_KIB_SHIFT;
++        let shifted = output_addr as u64 >> Granule64KiB::SHIFT;
 +        val.write(
 +            STAGE1_PAGE_DESCRIPTOR::VALID::True
 +                + STAGE1_PAGE_DESCRIPTOR::AF::True
@@ -532,73 +589,159 @@ diff -uNr 10_privilege_level/src/_arch/aarch64/memory/mmu.rs 11_virtual_mem_part
 +                + STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted),
 +        );
 +
-+        Self(val.get())
++        Self { value: val.get() }
 +    }
 +}
 +
-+impl<const NUM_TABLES: usize> FixedSizeTranslationTable<{ NUM_TABLES }> {
++//--------------------------------------------------------------------------------------------------
++// Public Code
++//--------------------------------------------------------------------------------------------------
++
++impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
 +    /// Create an instance.
++    #[allow(clippy::assertions_on_constants)]
 +    pub const fn new() -> Self {
 +        assert!(NUM_TABLES > 0);
++        assert!((bsp::memory::mmu::KernelAddrSpaceSize::SIZE modulo Granule512MiB::SIZE) == 0);
 +
 +        Self {
-+            lvl3: [[PageDescriptor(0); 8192]; NUM_TABLES],
-+            lvl2: [TableDescriptor(0); NUM_TABLES],
++            lvl3: [[PageDescriptor::new_zeroed(); 8192]; NUM_TABLES],
++            lvl2: [TableDescriptor::new_zeroed(); NUM_TABLES],
 +        }
 +    }
++
++    /// Iterates over all static translation table entries and fills them at once.
++    ///
++    /// # Safety
++    ///
++    /// - Modifies a `static mut`. Ensure it only happens from here.
++    pub unsafe fn populate_tt_entries(&mut self) -> Result<(), &'static str> {
++        for (l2_nr, l2_entry) in self.lvl2.iter_mut().enumerate() {
++            *l2_entry =
++                TableDescriptor::from_next_lvl_table_addr(self.lvl3[l2_nr].base_addr_usize());
++
++            for (l3_nr, l3_entry) in self.lvl3[l2_nr].iter_mut().enumerate() {
++                let virt_addr = (l2_nr << Granule512MiB::SHIFT) + (l3_nr << Granule64KiB::SHIFT);
++
++                let (output_addr, attribute_fields) =
++                    bsp::memory::mmu::virt_mem_layout().virt_addr_properties(virt_addr)?;
++
++                *l3_entry = PageDescriptor::from_output_addr(output_addr, attribute_fields);
++            }
++        }
++
++        Ok(())
++    }
++
++    /// The translation table's base address to be used for programming the MMU.
++    pub fn base_address(&self) -> u64 {
++        self.lvl2.base_addr_u64()
++    }
 +}
+
+diff -uNr 10_privilege_level/src/_arch/aarch64/memory/mmu.rs 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
+--- 10_privilege_level/src/_arch/aarch64/memory/mmu.rs
++++ 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
+@@ -0,0 +1,146 @@
++// SPDX-License-Identifier: MIT OR Apache-2.0
++//
++// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 +
-+/// Setup function for the MAIR_EL1 register.
-+fn set_up_mair() {
-+    // Define the memory types being mapped.
-+    MAIR_EL1.write(
-+        // Attribute 1 - Cacheable normal DRAM.
-+        MAIR_EL1::Attr1_Normal_Outer::WriteBack_NonTransient_ReadWriteAlloc +
-+        MAIR_EL1::Attr1_Normal_Inner::WriteBack_NonTransient_ReadWriteAlloc +
++//! Memory Management Unit Driver.
++//!
++//! Only 64 KiB granule is supported.
++//!
++//! # Orientation
++//!
++//! Since arch modules are imported into generic modules using the path attribute, the path of this
++//! file is:
++//!
++//! crate::memory::mmu::arch_mmu
 +
-+        // Attribute 0 - Device.
-+        MAIR_EL1::Attr0_Device::nonGathering_nonReordering_EarlyWriteAck,
-+    );
++use crate::{
++    bsp, memory,
++    memory::mmu::{translation_table::KernelTranslationTable, TranslationGranule},
++};
++use cortex_a::{barrier, regs::*};
++
++//--------------------------------------------------------------------------------------------------
++// Private Definitions
++//--------------------------------------------------------------------------------------------------
++
++/// Memory Management Unit type.
++struct MemoryManagementUnit;
++
++//--------------------------------------------------------------------------------------------------
++// Public Definitions
++//--------------------------------------------------------------------------------------------------
++
++pub type Granule512MiB = TranslationGranule<{ 512 * 1024 * 1024 }>;
++pub type Granule64KiB = TranslationGranule<{ 64 * 1024 }>;
++
++/// The min supported address space size.
++pub const MIN_ADDR_SPACE_SIZE: usize = 1024 * 1024 * 1024; // 1 GiB
++
++/// The max supported address space size.
++pub const MAX_ADDR_SPACE_SIZE: usize = 32 * 1024 * 1024 * 1024; // 32 GiB
++
++/// The supported address space size granule.
++pub type AddrSpaceSizeGranule = Granule512MiB;
++
++/// Constants for indexing the MAIR_EL1.
++#[allow(dead_code)]
++pub mod mair {
++    pub const DEVICE: u64 = 0;
++    pub const NORMAL: u64 = 1;
 +}
 +
-+/// Iterates over all static translation table entries and fills them at once.
++//--------------------------------------------------------------------------------------------------
++// Global instances
++//--------------------------------------------------------------------------------------------------
++
++/// The kernel translation tables.
 +///
 +/// # Safety
 +///
-+/// - Modifies a `static mut`. Ensure it only happens from here.
-+unsafe fn populate_tt_entries() -> Result<(), &'static str> {
-+    for (l2_nr, l2_entry) in KERNEL_TABLES.lvl2.iter_mut().enumerate() {
-+        *l2_entry = KERNEL_TABLES.lvl3[l2_nr].base_addr_usize().into();
++/// - Supposed to land in `.bss`. Therefore, ensure that all initial member values boil down to "0".
++static mut KERNEL_TABLES: KernelTranslationTable = KernelTranslationTable::new();
++
++static MMU: MemoryManagementUnit = MemoryManagementUnit;
 +
-+        for (l3_nr, l3_entry) in KERNEL_TABLES.lvl3[l2_nr].iter_mut().enumerate() {
-+            let virt_addr = (l2_nr << FIVETWELVE_MIB_SHIFT) + (l3_nr << SIXTYFOUR_KIB_SHIFT);
++//--------------------------------------------------------------------------------------------------
++// Private Code
++//--------------------------------------------------------------------------------------------------
 +
-+            let (output_addr, attribute_fields) =
-+                bsp::memory::mmu::virt_mem_layout().virt_addr_properties(virt_addr)?;
++impl MemoryManagementUnit {
++    /// Setup function for the MAIR_EL1 register.
++    fn set_up_mair(&self) {
++        // Define the memory types being mapped.
++        MAIR_EL1.write(
++            // Attribute 1 - Cacheable normal DRAM.
++            MAIR_EL1::Attr1_Normal_Outer::WriteBack_NonTransient_ReadWriteAlloc +
++        MAIR_EL1::Attr1_Normal_Inner::WriteBack_NonTransient_ReadWriteAlloc +
 +
-+            *l3_entry = PageDescriptor::new(output_addr, attribute_fields);
-+        }
++        // Attribute 0 - Device.
++        MAIR_EL1::Attr0_Device::nonGathering_nonReordering_EarlyWriteAck,
++        );
 +    }
 +
-+    Ok(())
-+}
-+
-+/// Configure various settings of stage 1 of the EL1 translation regime.
-+fn configure_translation_control() {
-+    let ips = ID_AA64MMFR0_EL1.read(ID_AA64MMFR0_EL1::PARange);
-+    let t0sz: u64 = bsp::memory::mmu::addr_space_size().trailing_zeros().into();
-+
-+    TCR_EL1.write(
-+        TCR_EL1::TBI0::Ignored
-+            + TCR_EL1::IPS.val(ips)
-+            + TCR_EL1::EPD1::DisableTTBR1Walks
-+            + TCR_EL1::TG0::KiB_64
-+            + TCR_EL1::SH0::Inner
-+            + TCR_EL1::ORGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
-+            + TCR_EL1::IRGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
-+            + TCR_EL1::EPD0::EnableTTBR0Walks
-+            + TCR_EL1::T0SZ.val(t0sz),
-+    );
++    /// Configure various settings of stage 1 of the EL1 translation regime.
++    fn configure_translation_control(&self) {
++        let ips = ID_AA64MMFR0_EL1.read(ID_AA64MMFR0_EL1::PARange);
++        let t0sz = (64 - bsp::memory::mmu::KernelAddrSpaceSize::SHIFT) as u64;
++
++        TCR_EL1.write(
++            TCR_EL1::TBI0::Ignored
++                + TCR_EL1::IPS.val(ips)
++                + TCR_EL1::EPD1::DisableTTBR1Walks
++                + TCR_EL1::TG0::KiB_64
++                + TCR_EL1::SH0::Inner
++                + TCR_EL1::ORGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
++                + TCR_EL1::IRGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
++                + TCR_EL1::EPD0::EnableTTBR0Walks
++                + TCR_EL1::T0SZ.val(t0sz),
++        );
++    }
 +}
 +
 +//--------------------------------------------------------------------------------------------------
@@ -622,15 +765,15 @@ diff -uNr 10_privilege_level/src/_arch/aarch64/memory/mmu.rs 11_virtual_mem_part
 +        }
 +
 +        // Prepare the memory attribute indirection register.
-+        set_up_mair();
++        self.set_up_mair();
 +
 +        // Populate translation tables.
-+        populate_tt_entries()?;
++        KERNEL_TABLES.populate_tt_entries()?;
 +
 +        // Set the "Translation Table Base Register".
-+        TTBR0_EL1.set_baddr(KERNEL_TABLES.lvl2.base_addr_u64());
++        TTBR0_EL1.set_baddr(KERNEL_TABLES.base_address());
 +
-+        configure_translation_control();
++        self.configure_translation_control();
 +
 +        // Switch the MMU on.
 +        //
@@ -671,7 +814,7 @@ diff -uNr 10_privilege_level/src/bsp/raspberrypi/link.ld 11_virtual_mem_part1_id
 diff -uNr 10_privilege_level/src/bsp/raspberrypi/memory/mmu.rs 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
 --- 10_privilege_level/src/bsp/raspberrypi/memory/mmu.rs
 +++ 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
-@@ -0,0 +1,93 @@
+@@ -0,0 +1,86 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -686,13 +829,16 @@ diff -uNr 10_privilege_level/src/bsp/raspberrypi/memory/mmu.rs 11_virtual_mem_pa
 +// Public Definitions
 +//--------------------------------------------------------------------------------------------------
 +
++/// The address space size chosen by this BSP.
++pub type KernelAddrSpaceSize = AddressSpaceSize<{ memory_map::END_INCLUSIVE + 1 }>;
++
 +const NUM_MEM_RANGES: usize = 3;
 +
 +/// The virtual memory layout.
 +///
 +/// The layout must contain only special ranges, aka anything that is _not_ normal cacheable DRAM.
 +/// It is agnostic of the paging granularity that the architecture's MMU will use.
-+pub static LAYOUT: KernelVirtualLayout<{ NUM_MEM_RANGES }> = KernelVirtualLayout::new(
++pub static LAYOUT: KernelVirtualLayout<NUM_MEM_RANGES> = KernelVirtualLayout::new(
 +    memory_map::END_INCLUSIVE,
 +    [
 +        TranslationDescriptor {
@@ -751,18 +897,8 @@ diff -uNr 10_privilege_level/src/bsp/raspberrypi/memory/mmu.rs 11_virtual_mem_pa
 +// Public Code
 +//--------------------------------------------------------------------------------------------------
 +
-+/// Return the address space size in bytes.
-+///
-+/// Guarantees size to be a power of two.
-+pub const fn addr_space_size() -> usize {
-+    let size = memory_map::END_INCLUSIVE + 1;
-+    assert!(size.is_power_of_two());
-+
-+    size
-+}
-+
 +/// Return a reference to the virtual memory layout.
-+pub fn virt_mem_layout() -> &'static KernelVirtualLayout<{ NUM_MEM_RANGES }> {
++pub fn virt_mem_layout() -> &'static KernelVirtualLayout<NUM_MEM_RANGES> {
 +    &LAYOUT
 +}
 
@@ -859,7 +995,7 @@ diff -uNr 10_privilege_level/src/bsp.rs 11_virtual_mem_part1_identity_mapping/sr
 +++ 11_virtual_mem_part1_identity_mapping/src/bsp.rs
 @@ -4,7 +4,7 @@
 
- //! Conditional re-exporting of Board Support Packages.
+ //! Conditional reexporting of Board Support Packages.
 
 -mod device_driver;
 +pub mod device_driver;
@@ -870,22 +1006,9 @@ diff -uNr 10_privilege_level/src/bsp.rs 11_virtual_mem_part1_identity_mapping/sr
 diff -uNr 10_privilege_level/src/main.rs 11_virtual_mem_part1_identity_mapping/src/main.rs
 --- 10_privilege_level/src/main.rs
 +++ 11_virtual_mem_part1_identity_mapping/src/main.rs
-@@ -11,10 +11,12 @@
- //!
- //! - [`bsp::console::console()`] - Returns a reference to the kernel's [console interface].
- //! - [`bsp::driver::driver_manager()`] - Returns a reference to the kernel's [driver interface].
-+//! - [`memory::mmu::mmu()`] - Returns a reference to the kernel's [MMU interface].
- //! - [`time::time_manager()`] - Returns a reference to the kernel's [timer interface].
+@@ -106,7 +106,10 @@
  //!
- //! [console interface]: ../libkernel/console/interface/index.html
- //! [driver interface]: ../libkernel/driver/interface/trait.DriverManager.html
-+//! [MMU interface]: ../libkernel/memory/mmu/interface/trait.MMU.html
- //! [timer interface]: ../libkernel/time/interface/trait.TimeManager.html
- //!
- //! # Code organization and architecture
-@@ -102,7 +104,10 @@
- //! - `crate::memory::*`
- //! - `crate::bsp::memory::*`
+ //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 
 +#![allow(incomplete_features)]
  #![feature(const_fn_fn_ptr_basics)]
@@ -894,7 +1017,7 @@ diff -uNr 10_privilege_level/src/main.rs 11_virtual_mem_part1_identity_mapping/s
  #![feature(format_args_nl)]
  #![feature(panic_info_message)]
  #![feature(trait_alias)]
-@@ -129,9 +134,18 @@
+@@ -130,9 +133,18 @@
  /// # Safety
  ///
  /// - Only a single core must be active and running this function.
@@ -914,7 +1037,7 @@ diff -uNr 10_privilege_level/src/main.rs 11_virtual_mem_part1_identity_mapping/s
 
      for i in bsp::driver::driver_manager().all_device_drivers().iter() {
          if let Err(x) = i.init() {
-@@ -155,6 +169,9 @@
+@@ -156,6 +168,9 @@
 
      info!("Booting on: {}", bsp::board_name());
 
@@ -924,7 +1047,7 @@ diff -uNr 10_privilege_level/src/main.rs 11_virtual_mem_part1_identity_mapping/s
      let (_, privilege_level) = exception::current_privilege_level();
      info!("Current privilege level: {}", privilege_level);
 
-@@ -178,6 +195,13 @@
+@@ -179,6 +194,13 @@
      info!("Timer test, spinning for 1 second");
      time::time_manager().spin_for(Duration::from_secs(1));
 
@@ -939,10 +1062,29 @@ diff -uNr 10_privilege_level/src/main.rs 11_virtual_mem_part1_identity_mapping/s
 
      // Discard any spurious received characters before going into echo mode.
 
+diff -uNr 10_privilege_level/src/memory/mmu/translation_table.rs 11_virtual_mem_part1_identity_mapping/src/memory/mmu/translation_table.rs
+--- 10_privilege_level/src/memory/mmu/translation_table.rs
++++ 11_virtual_mem_part1_identity_mapping/src/memory/mmu/translation_table.rs
+@@ -0,0 +1,14 @@
++// SPDX-License-Identifier: MIT OR Apache-2.0
++//
++// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
++
++//! Translation table.
++
++#[cfg(target_arch = "aarch64")]
++#[path = "../../_arch/aarch64/memory/mmu/translation_table.rs"]
++mod arch_translation_table;
++
++//--------------------------------------------------------------------------------------------------
++// Architectural Public Reexports
++//--------------------------------------------------------------------------------------------------
++pub use arch_translation_table::KernelTranslationTable;
+
 diff -uNr 10_privilege_level/src/memory/mmu.rs 11_virtual_mem_part1_identity_mapping/src/memory/mmu.rs
 --- 10_privilege_level/src/memory/mmu.rs
 +++ 11_virtual_mem_part1_identity_mapping/src/memory/mmu.rs
-@@ -0,0 +1,199 @@
+@@ -0,0 +1,247 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -950,8 +1092,8 @@ diff -uNr 10_privilege_level/src/memory/mmu.rs 11_virtual_mem_part1_identity_map
 +//! Memory Management Unit.
 +//!
 +//! In order to decouple `BSP` and `arch` parts of the MMU code (to keep them pluggable), this file
-+//! provides types for composing an architecture-agnostic description of the kernel 's virtual
-+//! memory layout.
++//! provides types for composing an architecture-agnostic description of the kernel's virtual memory
++//! layout.
 +//!
 +//! The `BSP` provides such a description through the `bsp::memory::mmu::virt_mem_layout()`
 +//! function.
@@ -962,11 +1104,17 @@ diff -uNr 10_privilege_level/src/memory/mmu.rs 11_virtual_mem_part1_identity_map
 +#[cfg(target_arch = "aarch64")]
 +#[path = "../_arch/aarch64/memory/mmu.rs"]
 +mod arch_mmu;
-+pub use arch_mmu::*;
++
++mod translation_table;
 +
 +use core::{fmt, ops::RangeInclusive};
 +
 +//--------------------------------------------------------------------------------------------------
++// Architectural Public Reexports
++//--------------------------------------------------------------------------------------------------
++pub use arch_mmu::mmu;
++
++//--------------------------------------------------------------------------------------------------
 +// Public Definitions
 +//--------------------------------------------------------------------------------------------------
 +
@@ -985,8 +1133,15 @@ diff -uNr 10_privilege_level/src/memory/mmu.rs 11_virtual_mem_part1_identity_map
 +    }
 +}
 +
++/// Describes the characteristics of a translation granule.
++pub struct TranslationGranule<const GRANULE_SIZE: usize>;
++
++/// Describes the size of an address space.
++pub struct AddressSpaceSize<const AS_SIZE: usize>;
++
 +/// Architecture agnostic translation types.
 +#[allow(missing_docs)]
++#[allow(dead_code)]
 +#[derive(Copy, Clone)]
 +pub enum Translation {
 +    Identity,
@@ -1040,6 +1195,41 @@ diff -uNr 10_privilege_level/src/memory/mmu.rs 11_virtual_mem_part1_identity_map
 +// Public Code
 +//--------------------------------------------------------------------------------------------------
 +
++impl<const GRANULE_SIZE: usize> TranslationGranule<GRANULE_SIZE> {
++    /// The granule's size.
++    pub const SIZE: usize = Self::size_checked();
++
++    /// The granule's shift, aka log2(size).
++    pub const SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
++
++    const fn size_checked() -> usize {
++        assert!(GRANULE_SIZE.is_power_of_two());
++
++        GRANULE_SIZE
++    }
++}
++
++impl<const AS_SIZE: usize> AddressSpaceSize<AS_SIZE> {
++    /// The address space size.
++    pub const SIZE: usize = Self::size_checked();
++
++    /// The address space shift, aka log2(size).
++    pub const SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
++
++    const fn size_checked() -> usize {
++        assert!(AS_SIZE.is_power_of_two());
++        assert!(arch_mmu::MIN_ADDR_SPACE_SIZE.is_power_of_two());
++        assert!(arch_mmu::MAX_ADDR_SPACE_SIZE.is_power_of_two());
++
++        // Must adhere to architectural restrictions.
++        assert!(AS_SIZE >= arch_mmu::MIN_ADDR_SPACE_SIZE);
++        assert!(AS_SIZE <= arch_mmu::MAX_ADDR_SPACE_SIZE);
++        assert!((AS_SIZE modulo arch_mmu::AddrSpaceSizeGranule::SIZE) == 0);
++
++        AS_SIZE
++    }
++}
++
 +impl Default for AttributeFields {
 +    fn default() -> AttributeFields {
 +        AttributeFields {
diff --git a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu.rs b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu.rs
index 3846968b3..d3b07461a 100644
--- a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu.rs
@@ -3,79 +3,15 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
-
-use crate::{bsp, cpu};
-use cortex_a::{asm, regs::*};
-
-//--------------------------------------------------------------------------------------------------
-// Boot Code
-//--------------------------------------------------------------------------------------------------
-
-/// The entry of the `kernel` binary.
-///
-/// The function must be named `_start`, because the linker is looking for this exact name.
-///
-/// # Safety
-///
-/// - Linker script must ensure to place this function where it is expected by the target machine.
-/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
-///   a stack for EL2.
-#[no_mangle]
-pub unsafe fn _start() -> ! {
-    // Expect the boot core to start in EL2.
-    if (bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id())
-        && (CurrentEL.get() == CurrentEL::EL::EL2.value)
-    {
-        el2_to_el1_transition()
-    } else {
-        // If not core0, infinitely wait for events.
-        wait_forever()
-    }
-}
-
-/// Transition from EL2 to EL1.
-///
-/// # Safety
-///
-/// - The HW state of EL1 must be prepared in a sound way.
-/// - Exception return from EL2 must must continue execution in EL1 with
-///   `runtime_init::runtime_init()`.
-/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
-///   a stack for EL2.
-#[inline(always)]
-unsafe fn el2_to_el1_transition() -> ! {
-    use crate::runtime_init;
-
-    // Enable timer counter registers for EL1.
-    CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
-
-    // No offset for reading the counters.
-    CNTVOFF_EL2.set(0);
-
-    // Set EL1 execution state to AArch64.
-    HCR_EL2.write(HCR_EL2::RW::EL1IsAarch64);
-
-    // Set up a simulated exception return.
-    //
-    // First, fake a saved program status where all interrupts were masked and SP_EL1 was used as a
-    // stack pointer.
-    SPSR_EL2.write(
-        SPSR_EL2::D::Masked
-            + SPSR_EL2::A::Masked
-            + SPSR_EL2::I::Masked
-            + SPSR_EL2::F::Masked
-            + SPSR_EL2::M::EL1h,
-    );
-
-    // Second, let the link register point to runtime_init().
-    ELR_EL2.set(runtime_init::runtime_init as *const () as u64);
-
-    // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it.
-    SP_EL1.set(bsp::memory::boot_core_stack_end() as u64);
-
-    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
-    asm::eret()
-}
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::arch_cpu
+
+use cortex_a::asm;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs
new file mode 100644
index 000000000..c2f5fe0b7
--- /dev/null
+++ b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs
@@ -0,0 +1,89 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural boot code.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::boot::arch_boot
+
+use crate::{bsp, cpu};
+use cortex_a::{asm, regs::*};
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// Transition from EL2 to EL1.
+///
+/// # Safety
+///
+/// - The HW state of EL1 must be prepared in a sound way.
+/// - Exception return from EL2 must must continue execution in EL1 with
+///   `runtime_init::runtime_init()`.
+/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
+///   a stack for EL2.
+#[inline(always)]
+unsafe fn el2_to_el1_transition() -> ! {
+    use crate::runtime_init;
+
+    // Enable timer counter registers for EL1.
+    CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
+
+    // No offset for reading the counters.
+    CNTVOFF_EL2.set(0);
+
+    // Set EL1 execution state to AArch64.
+    HCR_EL2.write(HCR_EL2::RW::EL1IsAarch64);
+
+    // Set up a simulated exception return.
+    //
+    // First, fake a saved program status where all interrupts were masked and SP_EL1 was used as a
+    // stack pointer.
+    SPSR_EL2.write(
+        SPSR_EL2::D::Masked
+            + SPSR_EL2::A::Masked
+            + SPSR_EL2::I::Masked
+            + SPSR_EL2::F::Masked
+            + SPSR_EL2::M::EL1h,
+    );
+
+    // Second, let the link register point to runtime_init().
+    ELR_EL2.set(runtime_init::runtime_init as *const () as u64);
+
+    // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it.
+    SP_EL1.set(bsp::memory::boot_core_stack_end() as u64);
+
+    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
+    asm::eret()
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The entry of the `kernel` binary.
+///
+/// The function must be named `_start`, because the linker is looking for this exact name.
+///
+/// # Safety
+///
+/// - Linker script must ensure to place this function where it is expected by the target machine.
+/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
+///   a stack for EL2.
+#[no_mangle]
+pub unsafe fn _start() -> ! {
+    // Expect the boot core to start in EL2.
+    if (bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id())
+        && (CurrentEL.get() == CurrentEL::EL::EL2.value)
+    {
+        el2_to_el1_transition()
+    } else {
+        // If not core0, infinitely wait for events.
+        cpu::wait_forever()
+    }
+}
diff --git a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/smp.rs b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/smp.rs
index c80f7e780..b9fdd0f73 100644
--- a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/smp.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/smp.rs
@@ -3,6 +3,13 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::smp::arch_smp
 
 use cortex_a::regs::*;
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs
index b6ee28b8c..d8c617b2a 100644
--- a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs
@@ -3,6 +3,13 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural synchronous and asynchronous exception handling.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::exception::arch_exception
 
 use cortex_a::regs::*;
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception/asynchronous.rs b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception/asynchronous.rs
index 445f490eb..b63b00fe7 100644
--- a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception/asynchronous.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception/asynchronous.rs
@@ -3,6 +3,13 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural asynchronous exception handling.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::exception::asynchronous::arch_asynchronous
 
 use cortex_a::regs::*;
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
index 69023cef1..3504d2571 100644
--- a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
@@ -4,146 +4,61 @@
 
 //! Memory Management Unit Driver.
 //!
-//! Static translation tables, compiled on boot; Everything 64 KiB granule.
+//! Only 64 KiB granule is supported.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::memory::mmu::arch_mmu
 
-use super::{AccessPermissions, AttributeFields, MemAttributes};
-use crate::{bsp, memory};
-use core::convert;
+use crate::{
+    bsp, memory,
+    memory::mmu::{translation_table::KernelTranslationTable, TranslationGranule},
+};
 use cortex_a::{barrier, regs::*};
-use register::{register_bitfields, InMemoryRegister};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
-// A table descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-15.
-register_bitfields! {u64,
-    STAGE1_TABLE_DESCRIPTOR [
-        /// Physical address of the next descriptor.
-        NEXT_LEVEL_TABLE_ADDR_64KiB OFFSET(16) NUMBITS(32) [], // [47:16]
-
-        TYPE  OFFSET(1) NUMBITS(1) [
-            Block = 0,
-            Table = 1
-        ],
-
-        VALID OFFSET(0) NUMBITS(1) [
-            False = 0,
-            True = 1
-        ]
-    ]
-}
-
-// A level 3 page descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-17.
-register_bitfields! {u64,
-    STAGE1_PAGE_DESCRIPTOR [
-        /// Unprivileged execute-never.
-        UXN      OFFSET(54) NUMBITS(1) [
-            False = 0,
-            True = 1
-        ],
-
-        /// Privileged execute-never.
-        PXN      OFFSET(53) NUMBITS(1) [
-            False = 0,
-            True = 1
-        ],
-
-        /// Physical address of the next table descriptor (lvl2) or the page descriptor (lvl3).
-        OUTPUT_ADDR_64KiB OFFSET(16) NUMBITS(32) [], // [47:16]
-
-        /// Access flag.
-        AF       OFFSET(10) NUMBITS(1) [
-            False = 0,
-            True = 1
-        ],
-
-        /// Shareability field.
-        SH       OFFSET(8) NUMBITS(2) [
-            OuterShareable = 0b10,
-            InnerShareable = 0b11
-        ],
-
-        /// Access Permissions.
-        AP       OFFSET(6) NUMBITS(2) [
-            RW_EL1 = 0b00,
-            RW_EL1_EL0 = 0b01,
-            RO_EL1 = 0b10,
-            RO_EL1_EL0 = 0b11
-        ],
-
-        /// Memory attributes index into the MAIR_EL1 register.
-        AttrIndx OFFSET(2) NUMBITS(3) [],
-
-        TYPE     OFFSET(1) NUMBITS(1) [
-            Block = 0,
-            Table = 1
-        ],
-
-        VALID    OFFSET(0) NUMBITS(1) [
-            False = 0,
-            True = 1
-        ]
-    ]
-}
-
-const SIXTYFOUR_KIB_SHIFT: usize = 16; //  log2(64 * 1024)
-const FIVETWELVE_MIB_SHIFT: usize = 29; // log2(512 * 1024 * 1024)
-
-/// A table descriptor for 64 KiB aperture.
-///
-/// The output points to the next table.
-#[derive(Copy, Clone)]
-#[repr(transparent)]
-struct TableDescriptor(u64);
+/// Memory Management Unit type.
+struct MemoryManagementUnit;
 
-/// A page descriptor with 64 KiB aperture.
-///
-/// The output points to physical memory.
-#[derive(Copy, Clone)]
-#[repr(transparent)]
-struct PageDescriptor(u64);
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
 
-/// Big monolithic struct for storing the translation tables. Individual levels must be 64 KiB
-/// aligned, hence the "reverse" order of appearance.
-#[repr(C)]
-#[repr(align(65536))]
-struct FixedSizeTranslationTable<const NUM_TABLES: usize> {
-    /// Page descriptors, covering 64 KiB windows per entry.
-    lvl3: [[PageDescriptor; 8192]; NUM_TABLES],
+pub type Granule512MiB = TranslationGranule<{ 512 * 1024 * 1024 }>;
+pub type Granule64KiB = TranslationGranule<{ 64 * 1024 }>;
 
-    /// Table descriptors, covering 512 MiB windows.
-    lvl2: [TableDescriptor; NUM_TABLES],
-}
+/// The min supported address space size.
+pub const MIN_ADDR_SPACE_SIZE: usize = 1024 * 1024 * 1024; // 1 GiB
 
-const NUM_LVL2_TABLES: usize = bsp::memory::mmu::addr_space_size() >> FIVETWELVE_MIB_SHIFT;
-type ArchTranslationTable = FixedSizeTranslationTable<NUM_LVL2_TABLES>;
+/// The max supported address space size.
+pub const MAX_ADDR_SPACE_SIZE: usize = 32 * 1024 * 1024 * 1024; // 32 GiB
 
-trait BaseAddr {
-    fn base_addr_u64(&self) -> u64;
-    fn base_addr_usize(&self) -> usize;
-}
+/// The supported address space size granule.
+pub type AddrSpaceSizeGranule = Granule512MiB;
 
 /// Constants for indexing the MAIR_EL1.
 #[allow(dead_code)]
-mod mair {
+pub mod mair {
     pub const DEVICE: u64 = 0;
     pub const NORMAL: u64 = 1;
 }
 
-/// Memory Management Unit type.
-struct MemoryManagementUnit;
-
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
-/// The translation tables.
+/// The kernel translation tables.
 ///
 /// # Safety
 ///
 /// - Supposed to land in `.bss`. Therefore, ensure that all initial member values boil down to "0".
-static mut KERNEL_TABLES: ArchTranslationTable = ArchTranslationTable::new();
+static mut KERNEL_TABLES: KernelTranslationTable = KernelTranslationTable::new();
 
 static MMU: MemoryManagementUnit = MemoryManagementUnit;
 
@@ -151,149 +66,37 @@ static MMU: MemoryManagementUnit = MemoryManagementUnit;
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-impl<T, const N: usize> BaseAddr for [T; N] {
-    fn base_addr_u64(&self) -> u64 {
-        self as *const T as u64
-    }
-
-    fn base_addr_usize(&self) -> usize {
-        self as *const _ as usize
-    }
-}
-
-impl convert::From<usize> for TableDescriptor {
-    fn from(next_lvl_table_addr: usize) -> Self {
-        let val = InMemoryRegister::<u64, STAGE1_TABLE_DESCRIPTOR::Register>::new(0);
-
-        let shifted = next_lvl_table_addr >> SIXTYFOUR_KIB_SHIFT;
-        val.write(
-            STAGE1_TABLE_DESCRIPTOR::VALID::True
-                + STAGE1_TABLE_DESCRIPTOR::TYPE::Table
-                + STAGE1_TABLE_DESCRIPTOR::NEXT_LEVEL_TABLE_ADDR_64KiB.val(shifted as u64),
-        );
-
-        TableDescriptor(val.get())
-    }
-}
-
-/// Convert the kernel's generic memory attributes to HW-specific attributes of the MMU.
-impl convert::From<AttributeFields>
-    for register::FieldValue<u64, STAGE1_PAGE_DESCRIPTOR::Register>
-{
-    fn from(attribute_fields: AttributeFields) -> Self {
-        // Memory attributes.
-        let mut desc = match attribute_fields.mem_attributes {
-            MemAttributes::CacheableDRAM => {
-                STAGE1_PAGE_DESCRIPTOR::SH::InnerShareable
-                    + STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(mair::NORMAL)
-            }
-            MemAttributes::Device => {
-                STAGE1_PAGE_DESCRIPTOR::SH::OuterShareable
-                    + STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(mair::DEVICE)
-            }
-        };
-
-        // Access Permissions.
-        desc += match attribute_fields.acc_perms {
-            AccessPermissions::ReadOnly => STAGE1_PAGE_DESCRIPTOR::AP::RO_EL1,
-            AccessPermissions::ReadWrite => STAGE1_PAGE_DESCRIPTOR::AP::RW_EL1,
-        };
-
-        // The execute-never attribute is mapped to PXN in AArch64.
-        desc += if attribute_fields.execute_never {
-            STAGE1_PAGE_DESCRIPTOR::PXN::True
-        } else {
-            STAGE1_PAGE_DESCRIPTOR::PXN::False
-        };
-
-        // Always set unprivileged exectue-never as long as userspace is not implemented yet.
-        desc += STAGE1_PAGE_DESCRIPTOR::UXN::True;
-
-        desc
-    }
-}
-
-impl PageDescriptor {
-    /// Create an instance.
-    fn new(output_addr: usize, attribute_fields: AttributeFields) -> Self {
-        let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
-
-        let shifted = output_addr as u64 >> SIXTYFOUR_KIB_SHIFT;
-        val.write(
-            STAGE1_PAGE_DESCRIPTOR::VALID::True
-                + STAGE1_PAGE_DESCRIPTOR::AF::True
-                + attribute_fields.into()
-                + STAGE1_PAGE_DESCRIPTOR::TYPE::Table
-                + STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted),
-        );
-
-        Self(val.get())
-    }
-}
-
-impl<const NUM_TABLES: usize> FixedSizeTranslationTable<{ NUM_TABLES }> {
-    /// Create an instance.
-    pub const fn new() -> Self {
-        assert!(NUM_TABLES > 0);
-
-        Self {
-            lvl3: [[PageDescriptor(0); 8192]; NUM_TABLES],
-            lvl2: [TableDescriptor(0); NUM_TABLES],
-        }
-    }
-}
-
-/// Setup function for the MAIR_EL1 register.
-fn set_up_mair() {
-    // Define the memory types being mapped.
-    MAIR_EL1.write(
-        // Attribute 1 - Cacheable normal DRAM.
-        MAIR_EL1::Attr1_Normal_Outer::WriteBack_NonTransient_ReadWriteAlloc +
+impl MemoryManagementUnit {
+    /// Setup function for the MAIR_EL1 register.
+    fn set_up_mair(&self) {
+        // Define the memory types being mapped.
+        MAIR_EL1.write(
+            // Attribute 1 - Cacheable normal DRAM.
+            MAIR_EL1::Attr1_Normal_Outer::WriteBack_NonTransient_ReadWriteAlloc +
         MAIR_EL1::Attr1_Normal_Inner::WriteBack_NonTransient_ReadWriteAlloc +
 
         // Attribute 0 - Device.
         MAIR_EL1::Attr0_Device::nonGathering_nonReordering_EarlyWriteAck,
-    );
-}
-
-/// Iterates over all static translation table entries and fills them at once.
-///
-/// # Safety
-///
-/// - Modifies a `static mut`. Ensure it only happens from here.
-unsafe fn populate_tt_entries() -> Result<(), &'static str> {
-    for (l2_nr, l2_entry) in KERNEL_TABLES.lvl2.iter_mut().enumerate() {
-        *l2_entry = KERNEL_TABLES.lvl3[l2_nr].base_addr_usize().into();
-
-        for (l3_nr, l3_entry) in KERNEL_TABLES.lvl3[l2_nr].iter_mut().enumerate() {
-            let virt_addr = (l2_nr << FIVETWELVE_MIB_SHIFT) + (l3_nr << SIXTYFOUR_KIB_SHIFT);
-
-            let (output_addr, attribute_fields) =
-                bsp::memory::mmu::virt_mem_layout().virt_addr_properties(virt_addr)?;
-
-            *l3_entry = PageDescriptor::new(output_addr, attribute_fields);
-        }
+        );
     }
 
-    Ok(())
-}
-
-/// Configure various settings of stage 1 of the EL1 translation regime.
-fn configure_translation_control() {
-    let ips = ID_AA64MMFR0_EL1.read(ID_AA64MMFR0_EL1::PARange);
-    let t0sz: u64 = bsp::memory::mmu::addr_space_size().trailing_zeros().into();
-
-    TCR_EL1.write(
-        TCR_EL1::TBI0::Ignored
-            + TCR_EL1::IPS.val(ips)
-            + TCR_EL1::EPD1::DisableTTBR1Walks
-            + TCR_EL1::TG0::KiB_64
-            + TCR_EL1::SH0::Inner
-            + TCR_EL1::ORGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
-            + TCR_EL1::IRGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
-            + TCR_EL1::EPD0::EnableTTBR0Walks
-            + TCR_EL1::T0SZ.val(t0sz),
-    );
+    /// Configure various settings of stage 1 of the EL1 translation regime.
+    fn configure_translation_control(&self) {
+        let ips = ID_AA64MMFR0_EL1.read(ID_AA64MMFR0_EL1::PARange);
+        let t0sz = (64 - bsp::memory::mmu::KernelAddrSpaceSize::SHIFT) as u64;
+
+        TCR_EL1.write(
+            TCR_EL1::TBI0::Ignored
+                + TCR_EL1::IPS.val(ips)
+                + TCR_EL1::EPD1::DisableTTBR1Walks
+                + TCR_EL1::TG0::KiB_64
+                + TCR_EL1::SH0::Inner
+                + TCR_EL1::ORGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
+                + TCR_EL1::IRGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
+                + TCR_EL1::EPD0::EnableTTBR0Walks
+                + TCR_EL1::T0SZ.val(t0sz),
+        );
+    }
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -317,15 +120,15 @@ impl memory::mmu::interface::MMU for MemoryManagementUnit {
         }
 
         // Prepare the memory attribute indirection register.
-        set_up_mair();
+        self.set_up_mair();
 
         // Populate translation tables.
-        populate_tt_entries()?;
+        KERNEL_TABLES.populate_tt_entries()?;
 
         // Set the "Translation Table Base Register".
-        TTBR0_EL1.set_baddr(KERNEL_TABLES.lvl2.base_addr_u64());
+        TTBR0_EL1.set_baddr(KERNEL_TABLES.base_address());
 
-        configure_translation_control();
+        self.configure_translation_control();
 
         // Switch the MMU on.
         //
diff --git a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs
new file mode 100644
index 000000000..cbe1d7832
--- /dev/null
+++ b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -0,0 +1,288 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural translation table.
+//!
+//! Only 64 KiB granule is supported.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::memory::mmu::translation_table::arch_translation_table
+
+use crate::{
+    bsp, memory,
+    memory::mmu::{
+        arch_mmu::{Granule512MiB, Granule64KiB},
+        AccessPermissions, AttributeFields, MemAttributes,
+    },
+};
+use core::convert;
+use register::{register_bitfields, InMemoryRegister};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+// A table descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-15.
+register_bitfields! {u64,
+    STAGE1_TABLE_DESCRIPTOR [
+        /// Physical address of the next descriptor.
+        NEXT_LEVEL_TABLE_ADDR_64KiB OFFSET(16) NUMBITS(32) [], // [47:16]
+
+        TYPE  OFFSET(1) NUMBITS(1) [
+            Block = 0,
+            Table = 1
+        ],
+
+        VALID OFFSET(0) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ]
+    ]
+}
+
+// A level 3 page descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-17.
+register_bitfields! {u64,
+    STAGE1_PAGE_DESCRIPTOR [
+        /// Unprivileged execute-never.
+        UXN      OFFSET(54) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
+        /// Privileged execute-never.
+        PXN      OFFSET(53) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
+        /// Physical address of the next table descriptor (lvl2) or the page descriptor (lvl3).
+        OUTPUT_ADDR_64KiB OFFSET(16) NUMBITS(32) [], // [47:16]
+
+        /// Access flag.
+        AF       OFFSET(10) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
+        /// Shareability field.
+        SH       OFFSET(8) NUMBITS(2) [
+            OuterShareable = 0b10,
+            InnerShareable = 0b11
+        ],
+
+        /// Access Permissions.
+        AP       OFFSET(6) NUMBITS(2) [
+            RW_EL1 = 0b00,
+            RW_EL1_EL0 = 0b01,
+            RO_EL1 = 0b10,
+            RO_EL1_EL0 = 0b11
+        ],
+
+        /// Memory attributes index into the MAIR_EL1 register.
+        AttrIndx OFFSET(2) NUMBITS(3) [],
+
+        TYPE     OFFSET(1) NUMBITS(1) [
+            Block = 0,
+            Table = 1
+        ],
+
+        VALID    OFFSET(0) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ]
+    ]
+}
+
+/// A table descriptor for 64 KiB aperture.
+///
+/// The output points to the next table.
+#[derive(Copy, Clone)]
+#[repr(C)]
+struct TableDescriptor {
+    value: u64,
+}
+
+/// A page descriptor with 64 KiB aperture.
+///
+/// The output points to physical memory.
+#[derive(Copy, Clone)]
+#[repr(C)]
+struct PageDescriptor {
+    value: u64,
+}
+
+trait BaseAddr {
+    fn base_addr_u64(&self) -> u64;
+    fn base_addr_usize(&self) -> usize;
+}
+
+const NUM_LVL2_TABLES: usize = bsp::memory::mmu::KernelAddrSpaceSize::SIZE >> Granule512MiB::SHIFT;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Big monolithic struct for storing the translation tables. Individual levels must be 64 KiB
+/// aligned, hence the "reverse" order of appearance.
+#[repr(C)]
+#[repr(align(65536))]
+pub struct FixedSizeTranslationTable<const NUM_TABLES: usize> {
+    /// Page descriptors, covering 64 KiB windows per entry.
+    lvl3: [[PageDescriptor; 8192]; NUM_TABLES],
+
+    /// Table descriptors, covering 512 MiB windows.
+    lvl2: [TableDescriptor; NUM_TABLES],
+}
+
+/// A translation table type for the kernel space.
+pub type KernelTranslationTable = FixedSizeTranslationTable<NUM_LVL2_TABLES>;
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl<T, const N: usize> BaseAddr for [T; N] {
+    fn base_addr_u64(&self) -> u64 {
+        self as *const T as u64
+    }
+
+    fn base_addr_usize(&self) -> usize {
+        self as *const _ as usize
+    }
+}
+
+impl TableDescriptor {
+    /// Create an instance.
+    ///
+    /// Descriptor is invalid by default.
+    pub const fn new_zeroed() -> Self {
+        Self { value: 0 }
+    }
+
+    /// Create an instance pointing to the supplied address.
+    pub fn from_next_lvl_table_addr(next_lvl_table_addr: usize) -> Self {
+        let val = InMemoryRegister::<u64, STAGE1_TABLE_DESCRIPTOR::Register>::new(0);
+
+        let shifted = next_lvl_table_addr >> Granule64KiB::SHIFT;
+        val.write(
+            STAGE1_TABLE_DESCRIPTOR::VALID::True
+                + STAGE1_TABLE_DESCRIPTOR::TYPE::Table
+                + STAGE1_TABLE_DESCRIPTOR::NEXT_LEVEL_TABLE_ADDR_64KiB.val(shifted as u64),
+        );
+
+        TableDescriptor { value: val.get() }
+    }
+}
+
+/// Convert the kernel's generic memory attributes to HW-specific attributes of the MMU.
+impl convert::From<AttributeFields>
+    for register::FieldValue<u64, STAGE1_PAGE_DESCRIPTOR::Register>
+{
+    fn from(attribute_fields: AttributeFields) -> Self {
+        // Memory attributes.
+        let mut desc = match attribute_fields.mem_attributes {
+            MemAttributes::CacheableDRAM => {
+                STAGE1_PAGE_DESCRIPTOR::SH::InnerShareable
+                    + STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(memory::mmu::arch_mmu::mair::NORMAL)
+            }
+            MemAttributes::Device => {
+                STAGE1_PAGE_DESCRIPTOR::SH::OuterShareable
+                    + STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(memory::mmu::arch_mmu::mair::DEVICE)
+            }
+        };
+
+        // Access Permissions.
+        desc += match attribute_fields.acc_perms {
+            AccessPermissions::ReadOnly => STAGE1_PAGE_DESCRIPTOR::AP::RO_EL1,
+            AccessPermissions::ReadWrite => STAGE1_PAGE_DESCRIPTOR::AP::RW_EL1,
+        };
+
+        // The execute-never attribute is mapped to PXN in AArch64.
+        desc += if attribute_fields.execute_never {
+            STAGE1_PAGE_DESCRIPTOR::PXN::True
+        } else {
+            STAGE1_PAGE_DESCRIPTOR::PXN::False
+        };
+
+        // Always set unprivileged exectue-never as long as userspace is not implemented yet.
+        desc += STAGE1_PAGE_DESCRIPTOR::UXN::True;
+
+        desc
+    }
+}
+
+impl PageDescriptor {
+    /// Create an instance.
+    ///
+    /// Descriptor is invalid by default.
+    pub const fn new_zeroed() -> Self {
+        Self { value: 0 }
+    }
+
+    /// Create an instance.
+    pub fn from_output_addr(output_addr: usize, attribute_fields: AttributeFields) -> Self {
+        let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
+
+        let shifted = output_addr as u64 >> Granule64KiB::SHIFT;
+        val.write(
+            STAGE1_PAGE_DESCRIPTOR::VALID::True
+                + STAGE1_PAGE_DESCRIPTOR::AF::True
+                + attribute_fields.into()
+                + STAGE1_PAGE_DESCRIPTOR::TYPE::Table
+                + STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted),
+        );
+
+        Self { value: val.get() }
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
+    /// Create an instance.
+    #[allow(clippy::assertions_on_constants)]
+    pub const fn new() -> Self {
+        assert!(NUM_TABLES > 0);
+        assert!((bsp::memory::mmu::KernelAddrSpaceSize::SIZE % Granule512MiB::SIZE) == 0);
+
+        Self {
+            lvl3: [[PageDescriptor::new_zeroed(); 8192]; NUM_TABLES],
+            lvl2: [TableDescriptor::new_zeroed(); NUM_TABLES],
+        }
+    }
+
+    /// Iterates over all static translation table entries and fills them at once.
+    ///
+    /// # Safety
+    ///
+    /// - Modifies a `static mut`. Ensure it only happens from here.
+    pub unsafe fn populate_tt_entries(&mut self) -> Result<(), &'static str> {
+        for (l2_nr, l2_entry) in self.lvl2.iter_mut().enumerate() {
+            *l2_entry =
+                TableDescriptor::from_next_lvl_table_addr(self.lvl3[l2_nr].base_addr_usize());
+
+            for (l3_nr, l3_entry) in self.lvl3[l2_nr].iter_mut().enumerate() {
+                let virt_addr = (l2_nr << Granule512MiB::SHIFT) + (l3_nr << Granule64KiB::SHIFT);
+
+                let (output_addr, attribute_fields) =
+                    bsp::memory::mmu::virt_mem_layout().virt_addr_properties(virt_addr)?;
+
+                *l3_entry = PageDescriptor::from_output_addr(output_addr, attribute_fields);
+            }
+        }
+
+        Ok(())
+    }
+
+    /// The translation table's base address to be used for programming the MMU.
+    pub fn base_address(&self) -> u64 {
+        self.lvl2.base_addr_u64()
+    }
+}
diff --git a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs
index 7f1bc6963..3a766009d 100644
--- a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs
@@ -3,6 +3,13 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::time::arch_time
 
 use crate::{time, warn};
 use core::time::Duration;
@@ -55,7 +62,7 @@ impl time::interface::TimeManager for GenericTimer {
         }
 
         // Calculate the register compare value.
-        let frq = CNTFRQ_EL0.get() as u64;
+        let frq = CNTFRQ_EL0.get();
         let x = match frq.checked_mul(duration.as_nanos() as u64) {
             None => {
                 warn!("Spin duration too long, skipping");
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp.rs b/11_virtual_mem_part1_identity_mapping/src/bsp.rs
index 3d7587673..91ce3c495 100644
--- a/11_virtual_mem_part1_identity_mapping/src/bsp.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/bsp.rs
@@ -2,7 +2,7 @@
 //
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-//! Conditional re-exporting of Board Support Packages.
+//! Conditional reexporting of Board Support Packages.
 
 pub mod device_driver;
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs b/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
index 982fc0655..911d10544 100644
--- a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
@@ -12,13 +12,16 @@ use core::ops::RangeInclusive;
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
+/// The address space size chosen by this BSP.
+pub type KernelAddrSpaceSize = AddressSpaceSize<{ memory_map::END_INCLUSIVE + 1 }>;
+
 const NUM_MEM_RANGES: usize = 3;
 
 /// The virtual memory layout.
 ///
 /// The layout must contain only special ranges, aka anything that is _not_ normal cacheable DRAM.
 /// It is agnostic of the paging granularity that the architecture's MMU will use.
-pub static LAYOUT: KernelVirtualLayout<{ NUM_MEM_RANGES }> = KernelVirtualLayout::new(
+pub static LAYOUT: KernelVirtualLayout<NUM_MEM_RANGES> = KernelVirtualLayout::new(
     memory_map::END_INCLUSIVE,
     [
         TranslationDescriptor {
@@ -77,17 +80,7 @@ fn mmio_range_inclusive() -> RangeInclusive<usize> {
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// Return the address space size in bytes.
-///
-/// Guarantees size to be a power of two.
-pub const fn addr_space_size() -> usize {
-    let size = memory_map::END_INCLUSIVE + 1;
-    assert!(size.is_power_of_two());
-
-    size
-}
-
 /// Return a reference to the virtual memory layout.
-pub fn virt_mem_layout() -> &'static KernelVirtualLayout<{ NUM_MEM_RANGES }> {
+pub fn virt_mem_layout() -> &'static KernelVirtualLayout<NUM_MEM_RANGES> {
     &LAYOUT
 }
diff --git a/11_virtual_mem_part1_identity_mapping/src/console.rs b/11_virtual_mem_part1_identity_mapping/src/console.rs
index 3552823cc..c3154ba23 100644
--- a/11_virtual_mem_part1_identity_mapping/src/console.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/console.rs
@@ -20,8 +20,7 @@ pub mod interface {
         /// Write a Rust format string.
         fn write_fmt(&self, args: fmt::Arguments) -> fmt::Result;
 
-        /// Block execution until the last buffered character has been physically put on the TX
-        /// wire.
+        /// Block until the last buffered character has been physically put on the TX wire.
         fn flush(&self);
     }
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/cpu.rs b/11_virtual_mem_part1_identity_mapping/src/cpu.rs
index c9e5af72c..3834f183c 100644
--- a/11_virtual_mem_part1_identity_mapping/src/cpu.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/cpu.rs
@@ -7,6 +7,12 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "_arch/aarch64/cpu.rs"]
 mod arch_cpu;
-pub use arch_cpu::*;
+
+mod boot;
 
 pub mod smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_cpu::{nop, wait_forever};
diff --git a/11_virtual_mem_part1_identity_mapping/src/cpu/boot.rs b/11_virtual_mem_part1_identity_mapping/src/cpu/boot.rs
new file mode 100644
index 000000000..1dc5c1808
--- /dev/null
+++ b/11_virtual_mem_part1_identity_mapping/src/cpu/boot.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Boot code.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/cpu/boot.rs"]
+mod arch_boot;
diff --git a/11_virtual_mem_part1_identity_mapping/src/cpu/smp.rs b/11_virtual_mem_part1_identity_mapping/src/cpu/smp.rs
index 90ecbdf30..38230ce1e 100644
--- a/11_virtual_mem_part1_identity_mapping/src/cpu/smp.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/cpu/smp.rs
@@ -6,5 +6,9 @@
 
 #[cfg(target_arch = "aarch64")]
 #[path = "../_arch/aarch64/cpu/smp.rs"]
-mod arch_cpu_smp;
-pub use arch_cpu_smp::*;
+mod arch_smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_smp::core_id;
diff --git a/11_virtual_mem_part1_identity_mapping/src/exception.rs b/11_virtual_mem_part1_identity_mapping/src/exception.rs
index 432c606b9..87d4db63a 100644
--- a/11_virtual_mem_part1_identity_mapping/src/exception.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/exception.rs
@@ -7,10 +7,14 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "_arch/aarch64/exception.rs"]
 mod arch_exception;
-pub use arch_exception::*;
 
 pub mod asynchronous;
 
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_exception::current_privilege_level;
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
diff --git a/11_virtual_mem_part1_identity_mapping/src/exception/asynchronous.rs b/11_virtual_mem_part1_identity_mapping/src/exception/asynchronous.rs
index fbdba9579..566efe329 100644
--- a/11_virtual_mem_part1_identity_mapping/src/exception/asynchronous.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/exception/asynchronous.rs
@@ -6,5 +6,9 @@
 
 #[cfg(target_arch = "aarch64")]
 #[path = "../_arch/aarch64/exception/asynchronous.rs"]
-mod arch_exception_async;
-pub use arch_exception_async::*;
+mod arch_asynchronous;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_asynchronous::print_state;
diff --git a/11_virtual_mem_part1_identity_mapping/src/main.rs b/11_virtual_mem_part1_identity_mapping/src/main.rs
index 259715354..83ee1de57 100644
--- a/11_virtual_mem_part1_identity_mapping/src/main.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/main.rs
@@ -7,18 +7,6 @@
 
 //! The `kernel` binary.
 //!
-//! # TL;DR - Overview of important Kernel entities
-//!
-//! - [`bsp::console::console()`] - Returns a reference to the kernel's [console interface].
-//! - [`bsp::driver::driver_manager()`] - Returns a reference to the kernel's [driver interface].
-//! - [`memory::mmu::mmu()`] - Returns a reference to the kernel's [MMU interface].
-//! - [`time::time_manager()`] - Returns a reference to the kernel's [timer interface].
-//!
-//! [console interface]: ../libkernel/console/interface/index.html
-//! [driver interface]: ../libkernel/driver/interface/trait.DriverManager.html
-//! [MMU interface]: ../libkernel/memory/mmu/interface/trait.MMU.html
-//! [timer interface]: ../libkernel/time/interface/trait.TimeManager.html
-//!
 //! # Code organization and architecture
 //!
 //! The code is divided into different *modules*, each representing a typical **subsystem** of the
@@ -32,15 +20,22 @@
 //! `src/_arch`, for example, `src/_arch/aarch64`.
 //!
 //! The architecture folders mirror the subsystem modules laid out in `src`. For example,
-//! architectural code that belongs to the `kernel`'s memory subsystem (`src/memory.rs`) would go
-//! into `src/_arch/aarch64/memory.rs`. The latter file is directly included and re-exported in
-//! `src/memory.rs`, so that the architectural code parts are transparent with respect to the code's
-//! module organization. That means a public function `foo()` defined in
-//! `src/_arch/aarch64/memory.rs` would be reachable as `crate::memory::foo()` only.
+//! architectural code that belongs to the `kernel`'s MMU subsystem (`src/memory/mmu.rs`) would go
+//! into `src/_arch/aarch64/memory/mmu.rs`. The latter file is loaded as a module in
+//! `src/memory/mmu.rs` using the `path attribute`. Usually, the chosen module name is the generic
+//! module's name prefixed with `arch_`.
 //!
-//! The `_` in `_arch` denotes that this folder is not part of the standard module hierarchy.
-//! Rather, it's contents are conditionally pulled into respective files using the `#[path =
-//! "_arch/xxx/yyy.rs"]` attribute.
+//! For example, this is the top of `src/memory/mmu.rs`:
+//!
+//! ```
+//! #[cfg(target_arch = "aarch64")]
+//! #[path = "../_arch/aarch64/memory/mmu.rs"]
+//! mod arch_mmu;
+//! ```
+//!
+//! Often times, items from the `arch_ module` will be publicly reexported by the parent module.
+//! This way, each architecture specific module can provide its implementation of an item, while the
+//! caller must not be concerned which architecture has been conditionally compiled.
 //!
 //! ## BSP code
 //!
@@ -49,9 +44,8 @@
 //! or instances of drivers for devices that are featured on the respective board.
 //!
 //! Just like processor architecture code, the `BSP` code's module structure tries to mirror the
-//! `kernel`'s subsystem modules, but there is no transparent re-exporting this time. That means
-//! whatever is provided must be called starting from the `bsp` namespace, e.g.
-//! `bsp::driver::driver_manager()`.
+//! `kernel`'s subsystem modules, but there is no reexporting this time. That means whatever is
+//! provided must be called starting from the `bsp` namespace, e.g. `bsp::driver::driver_manager()`.
 //!
 //! ## Kernel interfaces
 //!
@@ -103,6 +97,14 @@
 //!
 //! - `crate::memory::*`
 //! - `crate::bsp::memory::*`
+//!
+//! # Boot flow
+//!
+//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
+//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
+//!
+//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 
 #![allow(incomplete_features)]
 #![feature(const_fn_fn_ptr_basics)]
@@ -114,9 +116,6 @@
 #![no_main]
 #![no_std]
 
-// `mod cpu` provides the `_start()` function, the first function to run. `_start()` then calls
-// `runtime_init()`, which jumps to `kernel_init()`.
-
 mod bsp;
 mod console;
 mod cpu;
diff --git a/11_virtual_mem_part1_identity_mapping/src/memory/mmu.rs b/11_virtual_mem_part1_identity_mapping/src/memory/mmu.rs
index 4880ce913..efc9c447b 100644
--- a/11_virtual_mem_part1_identity_mapping/src/memory/mmu.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/memory/mmu.rs
@@ -5,8 +5,8 @@
 //! Memory Management Unit.
 //!
 //! In order to decouple `BSP` and `arch` parts of the MMU code (to keep them pluggable), this file
-//! provides types for composing an architecture-agnostic description of the kernel 's virtual
-//! memory layout.
+//! provides types for composing an architecture-agnostic description of the kernel's virtual memory
+//! layout.
 //!
 //! The `BSP` provides such a description through the `bsp::memory::mmu::virt_mem_layout()`
 //! function.
@@ -17,10 +17,16 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "../_arch/aarch64/memory/mmu.rs"]
 mod arch_mmu;
-pub use arch_mmu::*;
+
+mod translation_table;
 
 use core::{fmt, ops::RangeInclusive};
 
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_mmu::mmu;
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -40,8 +46,15 @@ pub mod interface {
     }
 }
 
+/// Describes the characteristics of a translation granule.
+pub struct TranslationGranule<const GRANULE_SIZE: usize>;
+
+/// Describes the size of an address space.
+pub struct AddressSpaceSize<const AS_SIZE: usize>;
+
 /// Architecture agnostic translation types.
 #[allow(missing_docs)]
+#[allow(dead_code)]
 #[derive(Copy, Clone)]
 pub enum Translation {
     Identity,
@@ -95,6 +108,41 @@ pub struct KernelVirtualLayout<const NUM_SPECIAL_RANGES: usize> {
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
+impl<const GRANULE_SIZE: usize> TranslationGranule<GRANULE_SIZE> {
+    /// The granule's size.
+    pub const SIZE: usize = Self::size_checked();
+
+    /// The granule's shift, aka log2(size).
+    pub const SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
+
+    const fn size_checked() -> usize {
+        assert!(GRANULE_SIZE.is_power_of_two());
+
+        GRANULE_SIZE
+    }
+}
+
+impl<const AS_SIZE: usize> AddressSpaceSize<AS_SIZE> {
+    /// The address space size.
+    pub const SIZE: usize = Self::size_checked();
+
+    /// The address space shift, aka log2(size).
+    pub const SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
+
+    const fn size_checked() -> usize {
+        assert!(AS_SIZE.is_power_of_two());
+        assert!(arch_mmu::MIN_ADDR_SPACE_SIZE.is_power_of_two());
+        assert!(arch_mmu::MAX_ADDR_SPACE_SIZE.is_power_of_two());
+
+        // Must adhere to architectural restrictions.
+        assert!(AS_SIZE >= arch_mmu::MIN_ADDR_SPACE_SIZE);
+        assert!(AS_SIZE <= arch_mmu::MAX_ADDR_SPACE_SIZE);
+        assert!((AS_SIZE % arch_mmu::AddrSpaceSizeGranule::SIZE) == 0);
+
+        AS_SIZE
+    }
+}
+
 impl Default for AttributeFields {
     fn default() -> AttributeFields {
         AttributeFields {
diff --git a/11_virtual_mem_part1_identity_mapping/src/memory/mmu/translation_table.rs b/11_virtual_mem_part1_identity_mapping/src/memory/mmu/translation_table.rs
new file mode 100644
index 000000000..bbb6f9394
--- /dev/null
+++ b/11_virtual_mem_part1_identity_mapping/src/memory/mmu/translation_table.rs
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Translation table.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../../_arch/aarch64/memory/mmu/translation_table.rs"]
+mod arch_translation_table;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_translation_table::KernelTranslationTable;
diff --git a/11_virtual_mem_part1_identity_mapping/src/print.rs b/11_virtual_mem_part1_identity_mapping/src/print.rs
index 1ea96b6ad..5a5638113 100644
--- a/11_virtual_mem_part1_identity_mapping/src/print.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/print.rs
@@ -2,7 +2,7 @@
 //
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-//! Printing facilities.
+//! Printing.
 
 use crate::{bsp, console};
 use core::fmt;
diff --git a/11_virtual_mem_part1_identity_mapping/src/time.rs b/11_virtual_mem_part1_identity_mapping/src/time.rs
index 4f2f4e38f..953b6f0df 100644
--- a/11_virtual_mem_part1_identity_mapping/src/time.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/time.rs
@@ -7,7 +7,11 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "_arch/aarch64/time.rs"]
 mod arch_time;
-pub use arch_time::*;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_time::time_manager;
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -18,8 +22,6 @@ pub mod interface {
     use core::time::Duration;
 
     /// Time management functions.
-    ///
-    /// The `BSP` is supposed to supply one global instance.
     pub trait TimeManager {
         /// The timer's resolution.
         fn resolution(&self) -> Duration;
diff --git a/12_exceptions_part1_groundwork/Makefile b/12_exceptions_part1_groundwork/Makefile
index 9254018cf..9105d297f 100644
--- a/12_exceptions_part1_groundwork/Makefile
+++ b/12_exceptions_part1_groundwork/Makefile
@@ -44,8 +44,9 @@ export LINKER_FILE
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
+FEATURES      = bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
-    --features bsp_$(BSP)          \
+    --features $(FEATURES)         \
     --release
 
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
diff --git a/12_exceptions_part1_groundwork/README.md b/12_exceptions_part1_groundwork/README.md
index be16673f5..829ed0920 100644
--- a/12_exceptions_part1_groundwork/README.md
+++ b/12_exceptions_part1_groundwork/README.md
@@ -2,8 +2,8 @@
 
 ## tl;dr
 
-- We lay the groundwork for all the architectural `CPU exceptions`. For now, only print an elaborate
-  system state through a `panic!` call, and halt execution
+- We lay the groundwork for all the architectural `CPU exceptions`.
+- For now, only print an elaborate system state through a `panic!` call, and halt execution
 - This will help finding bugs during development and runtime.
 - For demo purposes, MMU `page faults` are used to demonstrate (i) returning from an exception and
   (ii) the default `panic!` behavior.
@@ -27,8 +27,8 @@
 
 Now that we are executing in `EL1`, and have activated the `MMU`, time is due for implementing `CPU
 exceptions`. For now, we only set up a scaffold with very basic functionality that will help us to
-find bugs along the way. A follow-up `Interrupt` tutorial in the future will continue the work we
-start here.
+find bugs along the way. A follow-up `Interrupt` tutorial later will continue the work we start
+here.
 
 Please note that this tutorial is specific to the `AArch64` architecture. It does not contain any
 generic exception handling code yet.
@@ -38,7 +38,7 @@ generic exception handling code yet.
 In `AArch64`, it is differentiated between four types of exceptions. These are:
 - Synchronous
   - For example, a `data abort` (e.g. `page fault`) or a `system call`. They happen in direct
-    consequence of executing a certain instruction, hence _synchronously_.
+    consequence of executing a certain CPU instruction, hence _synchronously_.
 - Interrupt Request (`IRQ`)
   - For example, an external device, like a timer, is asserting a physical interrupt line. IRQs
     happen _asynchronously_.
@@ -176,8 +176,8 @@ resources in its own code without bothering, and as a last action before returni
 handling code, restore the context, so that the processor can continue where it left off before
 taking the exception.
 
-Context save and restore is one of the few places in system software where it is strongly advised to
-to use some hand-crafted assembly. Introducing `exception.S`:
+Context save and restore is one of the few places in system software where there is no way around
+some hand-crafted assembly. Introducing `exception.S`:
 
 ```asm
 /// Call the function provided by parameter `\handler` after saving the exception context. Provide
@@ -356,7 +356,7 @@ unsafe { core::ptr::read_volatile(big_addr as *mut u64) };
 ```
 
 This triggers our exception code, because we try to read from a virtual address for which no mapping
-has been installed. Remember, we only installed up to `4 GiB` of address space in the previous
+has been installed. Remember, we only mapped up to `4 GiB` of address space in the previous
 tutorial.
 
 To survive this exception, the respective handler has a special demo case:
@@ -391,8 +391,6 @@ catch, eventually triggering the `panic!` call from the default handler.
 
 ## Test it
 
-Emphasis on the events at timestamps > `4.xxxxxx`.
-
 ```console
 $ make chainboot
 [...]
@@ -482,9 +480,9 @@ General purpose register:
 diff -uNr 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs 12_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
 --- 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs
 +++ 12_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
-@@ -4,7 +4,230 @@
-
- //! Architectural synchronous and asynchronous exception handling.
+@@ -11,7 +11,230 @@
+ //!
+ //! crate::exception::arch_exception
 
 -use cortex_a::regs::*;
 +use core::{cell::UnsafeCell, fmt};
@@ -714,7 +712,7 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs 1
 
  //--------------------------------------------------------------------------------------------------
  // Public Code
-@@ -21,3 +244,23 @@
+@@ -28,3 +251,23 @@
          _ => (PrivilegeLevel::Unknown, "Unknown"),
      }
  }
@@ -901,16 +899,16 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld 12_e
 diff -uNr 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs 12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
 --- 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
 +++ 12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
-@@ -12,7 +12,7 @@
- // Public Definitions
- //--------------------------------------------------------------------------------------------------
+@@ -15,7 +15,7 @@
+ /// The address space size chosen by this BSP.
+ pub type KernelAddrSpaceSize = AddressSpaceSize<{ memory_map::END_INCLUSIVE + 1 }>;
 
 -const NUM_MEM_RANGES: usize = 3;
 +const NUM_MEM_RANGES: usize = 2;
 
  /// The virtual memory layout.
  ///
-@@ -32,16 +32,6 @@
+@@ -35,16 +35,6 @@
              },
          },
          TranslationDescriptor {
@@ -927,7 +925,7 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.r
              name: "Device MMIO",
              virtual_range: mmio_range_inclusive,
              physical_range_translation: Translation::Identity,
-@@ -64,11 +54,6 @@
+@@ -67,11 +57,6 @@
      RangeInclusive::new(super::ro_start(), super::ro_end() - 1)
  }
 
@@ -945,7 +943,7 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/bsp.rs 12_exceptions_part1_g
 +++ 12_exceptions_part1_groundwork/src/bsp.rs
 @@ -4,7 +4,7 @@
 
- //! Conditional re-exporting of Board Support Packages.
+ //! Conditional reexporting of Board Support Packages.
 
 -pub mod device_driver;
 +mod device_driver;
@@ -953,10 +951,23 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/bsp.rs 12_exceptions_part1_g
  #[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
  mod raspberrypi;
 
+diff -uNr 11_virtual_mem_part1_identity_mapping/src/exception.rs 12_exceptions_part1_groundwork/src/exception.rs
+--- 11_virtual_mem_part1_identity_mapping/src/exception.rs
++++ 12_exceptions_part1_groundwork/src/exception.rs
+@@ -13,7 +13,7 @@
+ //--------------------------------------------------------------------------------------------------
+ // Architectural Public Reexports
+ //--------------------------------------------------------------------------------------------------
+-pub use arch_exception::current_privilege_level;
++pub use arch_exception::{current_privilege_level, handling_init};
+
+ //--------------------------------------------------------------------------------------------------
+ // Public Definitions
+
 diff -uNr 11_virtual_mem_part1_identity_mapping/src/main.rs 12_exceptions_part1_groundwork/src/main.rs
 --- 11_virtual_mem_part1_identity_mapping/src/main.rs
 +++ 12_exceptions_part1_groundwork/src/main.rs
-@@ -109,6 +109,7 @@
+@@ -111,6 +111,7 @@
  #![feature(const_generics)]
  #![feature(const_panic)]
  #![feature(format_args_nl)]
@@ -964,7 +975,7 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/main.rs 12_exceptions_part1_
  #![feature(panic_info_message)]
  #![feature(trait_alias)]
  #![no_main]
-@@ -143,6 +144,8 @@
+@@ -142,6 +143,8 @@
      use driver::interface::DriverManager;
      use memory::mmu::interface::MMU;
 
@@ -973,7 +984,7 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/main.rs 12_exceptions_part1_
      if let Err(string) = memory::mmu::mmu().init() {
          panic!("MMU: {}", string);
      }
-@@ -195,13 +198,28 @@
+@@ -194,13 +197,28 @@
      info!("Timer test, spinning for 1 second");
      time::time_manager().spin_for(Duration::from_secs(1));
 
@@ -1009,16 +1020,4 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/main.rs 12_exceptions_part1_
 
      // Discard any spurious received characters before going into echo mode.
 
-diff -uNr 11_virtual_mem_part1_identity_mapping/src/memory/mmu.rs 12_exceptions_part1_groundwork/src/memory/mmu.rs
---- 11_virtual_mem_part1_identity_mapping/src/memory/mmu.rs
-+++ 12_exceptions_part1_groundwork/src/memory/mmu.rs
-@@ -42,6 +42,7 @@
-
- /// Architecture agnostic translation types.
- #[allow(missing_docs)]
-+#[allow(dead_code)]
- #[derive(Copy, Clone)]
- pub enum Translation {
-     Identity,
-
 ```
diff --git a/12_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs b/12_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs
index 3846968b3..d3b07461a 100644
--- a/12_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs
+++ b/12_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs
@@ -3,79 +3,15 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
-
-use crate::{bsp, cpu};
-use cortex_a::{asm, regs::*};
-
-//--------------------------------------------------------------------------------------------------
-// Boot Code
-//--------------------------------------------------------------------------------------------------
-
-/// The entry of the `kernel` binary.
-///
-/// The function must be named `_start`, because the linker is looking for this exact name.
-///
-/// # Safety
-///
-/// - Linker script must ensure to place this function where it is expected by the target machine.
-/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
-///   a stack for EL2.
-#[no_mangle]
-pub unsafe fn _start() -> ! {
-    // Expect the boot core to start in EL2.
-    if (bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id())
-        && (CurrentEL.get() == CurrentEL::EL::EL2.value)
-    {
-        el2_to_el1_transition()
-    } else {
-        // If not core0, infinitely wait for events.
-        wait_forever()
-    }
-}
-
-/// Transition from EL2 to EL1.
-///
-/// # Safety
-///
-/// - The HW state of EL1 must be prepared in a sound way.
-/// - Exception return from EL2 must must continue execution in EL1 with
-///   `runtime_init::runtime_init()`.
-/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
-///   a stack for EL2.
-#[inline(always)]
-unsafe fn el2_to_el1_transition() -> ! {
-    use crate::runtime_init;
-
-    // Enable timer counter registers for EL1.
-    CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
-
-    // No offset for reading the counters.
-    CNTVOFF_EL2.set(0);
-
-    // Set EL1 execution state to AArch64.
-    HCR_EL2.write(HCR_EL2::RW::EL1IsAarch64);
-
-    // Set up a simulated exception return.
-    //
-    // First, fake a saved program status where all interrupts were masked and SP_EL1 was used as a
-    // stack pointer.
-    SPSR_EL2.write(
-        SPSR_EL2::D::Masked
-            + SPSR_EL2::A::Masked
-            + SPSR_EL2::I::Masked
-            + SPSR_EL2::F::Masked
-            + SPSR_EL2::M::EL1h,
-    );
-
-    // Second, let the link register point to runtime_init().
-    ELR_EL2.set(runtime_init::runtime_init as *const () as u64);
-
-    // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it.
-    SP_EL1.set(bsp::memory::boot_core_stack_end() as u64);
-
-    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
-    asm::eret()
-}
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::arch_cpu
+
+use cortex_a::asm;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/12_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs b/12_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs
new file mode 100644
index 000000000..c2f5fe0b7
--- /dev/null
+++ b/12_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs
@@ -0,0 +1,89 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural boot code.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::boot::arch_boot
+
+use crate::{bsp, cpu};
+use cortex_a::{asm, regs::*};
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// Transition from EL2 to EL1.
+///
+/// # Safety
+///
+/// - The HW state of EL1 must be prepared in a sound way.
+/// - Exception return from EL2 must must continue execution in EL1 with
+///   `runtime_init::runtime_init()`.
+/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
+///   a stack for EL2.
+#[inline(always)]
+unsafe fn el2_to_el1_transition() -> ! {
+    use crate::runtime_init;
+
+    // Enable timer counter registers for EL1.
+    CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
+
+    // No offset for reading the counters.
+    CNTVOFF_EL2.set(0);
+
+    // Set EL1 execution state to AArch64.
+    HCR_EL2.write(HCR_EL2::RW::EL1IsAarch64);
+
+    // Set up a simulated exception return.
+    //
+    // First, fake a saved program status where all interrupts were masked and SP_EL1 was used as a
+    // stack pointer.
+    SPSR_EL2.write(
+        SPSR_EL2::D::Masked
+            + SPSR_EL2::A::Masked
+            + SPSR_EL2::I::Masked
+            + SPSR_EL2::F::Masked
+            + SPSR_EL2::M::EL1h,
+    );
+
+    // Second, let the link register point to runtime_init().
+    ELR_EL2.set(runtime_init::runtime_init as *const () as u64);
+
+    // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it.
+    SP_EL1.set(bsp::memory::boot_core_stack_end() as u64);
+
+    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
+    asm::eret()
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The entry of the `kernel` binary.
+///
+/// The function must be named `_start`, because the linker is looking for this exact name.
+///
+/// # Safety
+///
+/// - Linker script must ensure to place this function where it is expected by the target machine.
+/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
+///   a stack for EL2.
+#[no_mangle]
+pub unsafe fn _start() -> ! {
+    // Expect the boot core to start in EL2.
+    if (bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id())
+        && (CurrentEL.get() == CurrentEL::EL::EL2.value)
+    {
+        el2_to_el1_transition()
+    } else {
+        // If not core0, infinitely wait for events.
+        cpu::wait_forever()
+    }
+}
diff --git a/12_exceptions_part1_groundwork/src/_arch/aarch64/cpu/smp.rs b/12_exceptions_part1_groundwork/src/_arch/aarch64/cpu/smp.rs
index c80f7e780..b9fdd0f73 100644
--- a/12_exceptions_part1_groundwork/src/_arch/aarch64/cpu/smp.rs
+++ b/12_exceptions_part1_groundwork/src/_arch/aarch64/cpu/smp.rs
@@ -3,6 +3,13 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::smp::arch_smp
 
 use cortex_a::regs::*;
 
diff --git a/12_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs b/12_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
index 10d003542..64f1fd23e 100644
--- a/12_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
+++ b/12_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
@@ -3,6 +3,13 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural synchronous and asynchronous exception handling.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::exception::arch_exception
 
 use core::{cell::UnsafeCell, fmt};
 use cortex_a::{asm, barrier, regs::*};
diff --git a/12_exceptions_part1_groundwork/src/_arch/aarch64/exception/asynchronous.rs b/12_exceptions_part1_groundwork/src/_arch/aarch64/exception/asynchronous.rs
index 445f490eb..b63b00fe7 100644
--- a/12_exceptions_part1_groundwork/src/_arch/aarch64/exception/asynchronous.rs
+++ b/12_exceptions_part1_groundwork/src/_arch/aarch64/exception/asynchronous.rs
@@ -3,6 +3,13 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural asynchronous exception handling.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::exception::asynchronous::arch_asynchronous
 
 use cortex_a::regs::*;
 
diff --git a/12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs b/12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
index 69023cef1..3504d2571 100644
--- a/12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
+++ b/12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
@@ -4,146 +4,61 @@
 
 //! Memory Management Unit Driver.
 //!
-//! Static translation tables, compiled on boot; Everything 64 KiB granule.
+//! Only 64 KiB granule is supported.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::memory::mmu::arch_mmu
 
-use super::{AccessPermissions, AttributeFields, MemAttributes};
-use crate::{bsp, memory};
-use core::convert;
+use crate::{
+    bsp, memory,
+    memory::mmu::{translation_table::KernelTranslationTable, TranslationGranule},
+};
 use cortex_a::{barrier, regs::*};
-use register::{register_bitfields, InMemoryRegister};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
-// A table descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-15.
-register_bitfields! {u64,
-    STAGE1_TABLE_DESCRIPTOR [
-        /// Physical address of the next descriptor.
-        NEXT_LEVEL_TABLE_ADDR_64KiB OFFSET(16) NUMBITS(32) [], // [47:16]
-
-        TYPE  OFFSET(1) NUMBITS(1) [
-            Block = 0,
-            Table = 1
-        ],
-
-        VALID OFFSET(0) NUMBITS(1) [
-            False = 0,
-            True = 1
-        ]
-    ]
-}
-
-// A level 3 page descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-17.
-register_bitfields! {u64,
-    STAGE1_PAGE_DESCRIPTOR [
-        /// Unprivileged execute-never.
-        UXN      OFFSET(54) NUMBITS(1) [
-            False = 0,
-            True = 1
-        ],
-
-        /// Privileged execute-never.
-        PXN      OFFSET(53) NUMBITS(1) [
-            False = 0,
-            True = 1
-        ],
-
-        /// Physical address of the next table descriptor (lvl2) or the page descriptor (lvl3).
-        OUTPUT_ADDR_64KiB OFFSET(16) NUMBITS(32) [], // [47:16]
-
-        /// Access flag.
-        AF       OFFSET(10) NUMBITS(1) [
-            False = 0,
-            True = 1
-        ],
-
-        /// Shareability field.
-        SH       OFFSET(8) NUMBITS(2) [
-            OuterShareable = 0b10,
-            InnerShareable = 0b11
-        ],
-
-        /// Access Permissions.
-        AP       OFFSET(6) NUMBITS(2) [
-            RW_EL1 = 0b00,
-            RW_EL1_EL0 = 0b01,
-            RO_EL1 = 0b10,
-            RO_EL1_EL0 = 0b11
-        ],
-
-        /// Memory attributes index into the MAIR_EL1 register.
-        AttrIndx OFFSET(2) NUMBITS(3) [],
-
-        TYPE     OFFSET(1) NUMBITS(1) [
-            Block = 0,
-            Table = 1
-        ],
-
-        VALID    OFFSET(0) NUMBITS(1) [
-            False = 0,
-            True = 1
-        ]
-    ]
-}
-
-const SIXTYFOUR_KIB_SHIFT: usize = 16; //  log2(64 * 1024)
-const FIVETWELVE_MIB_SHIFT: usize = 29; // log2(512 * 1024 * 1024)
-
-/// A table descriptor for 64 KiB aperture.
-///
-/// The output points to the next table.
-#[derive(Copy, Clone)]
-#[repr(transparent)]
-struct TableDescriptor(u64);
+/// Memory Management Unit type.
+struct MemoryManagementUnit;
 
-/// A page descriptor with 64 KiB aperture.
-///
-/// The output points to physical memory.
-#[derive(Copy, Clone)]
-#[repr(transparent)]
-struct PageDescriptor(u64);
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
 
-/// Big monolithic struct for storing the translation tables. Individual levels must be 64 KiB
-/// aligned, hence the "reverse" order of appearance.
-#[repr(C)]
-#[repr(align(65536))]
-struct FixedSizeTranslationTable<const NUM_TABLES: usize> {
-    /// Page descriptors, covering 64 KiB windows per entry.
-    lvl3: [[PageDescriptor; 8192]; NUM_TABLES],
+pub type Granule512MiB = TranslationGranule<{ 512 * 1024 * 1024 }>;
+pub type Granule64KiB = TranslationGranule<{ 64 * 1024 }>;
 
-    /// Table descriptors, covering 512 MiB windows.
-    lvl2: [TableDescriptor; NUM_TABLES],
-}
+/// The min supported address space size.
+pub const MIN_ADDR_SPACE_SIZE: usize = 1024 * 1024 * 1024; // 1 GiB
 
-const NUM_LVL2_TABLES: usize = bsp::memory::mmu::addr_space_size() >> FIVETWELVE_MIB_SHIFT;
-type ArchTranslationTable = FixedSizeTranslationTable<NUM_LVL2_TABLES>;
+/// The max supported address space size.
+pub const MAX_ADDR_SPACE_SIZE: usize = 32 * 1024 * 1024 * 1024; // 32 GiB
 
-trait BaseAddr {
-    fn base_addr_u64(&self) -> u64;
-    fn base_addr_usize(&self) -> usize;
-}
+/// The supported address space size granule.
+pub type AddrSpaceSizeGranule = Granule512MiB;
 
 /// Constants for indexing the MAIR_EL1.
 #[allow(dead_code)]
-mod mair {
+pub mod mair {
     pub const DEVICE: u64 = 0;
     pub const NORMAL: u64 = 1;
 }
 
-/// Memory Management Unit type.
-struct MemoryManagementUnit;
-
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
-/// The translation tables.
+/// The kernel translation tables.
 ///
 /// # Safety
 ///
 /// - Supposed to land in `.bss`. Therefore, ensure that all initial member values boil down to "0".
-static mut KERNEL_TABLES: ArchTranslationTable = ArchTranslationTable::new();
+static mut KERNEL_TABLES: KernelTranslationTable = KernelTranslationTable::new();
 
 static MMU: MemoryManagementUnit = MemoryManagementUnit;
 
@@ -151,149 +66,37 @@ static MMU: MemoryManagementUnit = MemoryManagementUnit;
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-impl<T, const N: usize> BaseAddr for [T; N] {
-    fn base_addr_u64(&self) -> u64 {
-        self as *const T as u64
-    }
-
-    fn base_addr_usize(&self) -> usize {
-        self as *const _ as usize
-    }
-}
-
-impl convert::From<usize> for TableDescriptor {
-    fn from(next_lvl_table_addr: usize) -> Self {
-        let val = InMemoryRegister::<u64, STAGE1_TABLE_DESCRIPTOR::Register>::new(0);
-
-        let shifted = next_lvl_table_addr >> SIXTYFOUR_KIB_SHIFT;
-        val.write(
-            STAGE1_TABLE_DESCRIPTOR::VALID::True
-                + STAGE1_TABLE_DESCRIPTOR::TYPE::Table
-                + STAGE1_TABLE_DESCRIPTOR::NEXT_LEVEL_TABLE_ADDR_64KiB.val(shifted as u64),
-        );
-
-        TableDescriptor(val.get())
-    }
-}
-
-/// Convert the kernel's generic memory attributes to HW-specific attributes of the MMU.
-impl convert::From<AttributeFields>
-    for register::FieldValue<u64, STAGE1_PAGE_DESCRIPTOR::Register>
-{
-    fn from(attribute_fields: AttributeFields) -> Self {
-        // Memory attributes.
-        let mut desc = match attribute_fields.mem_attributes {
-            MemAttributes::CacheableDRAM => {
-                STAGE1_PAGE_DESCRIPTOR::SH::InnerShareable
-                    + STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(mair::NORMAL)
-            }
-            MemAttributes::Device => {
-                STAGE1_PAGE_DESCRIPTOR::SH::OuterShareable
-                    + STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(mair::DEVICE)
-            }
-        };
-
-        // Access Permissions.
-        desc += match attribute_fields.acc_perms {
-            AccessPermissions::ReadOnly => STAGE1_PAGE_DESCRIPTOR::AP::RO_EL1,
-            AccessPermissions::ReadWrite => STAGE1_PAGE_DESCRIPTOR::AP::RW_EL1,
-        };
-
-        // The execute-never attribute is mapped to PXN in AArch64.
-        desc += if attribute_fields.execute_never {
-            STAGE1_PAGE_DESCRIPTOR::PXN::True
-        } else {
-            STAGE1_PAGE_DESCRIPTOR::PXN::False
-        };
-
-        // Always set unprivileged exectue-never as long as userspace is not implemented yet.
-        desc += STAGE1_PAGE_DESCRIPTOR::UXN::True;
-
-        desc
-    }
-}
-
-impl PageDescriptor {
-    /// Create an instance.
-    fn new(output_addr: usize, attribute_fields: AttributeFields) -> Self {
-        let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
-
-        let shifted = output_addr as u64 >> SIXTYFOUR_KIB_SHIFT;
-        val.write(
-            STAGE1_PAGE_DESCRIPTOR::VALID::True
-                + STAGE1_PAGE_DESCRIPTOR::AF::True
-                + attribute_fields.into()
-                + STAGE1_PAGE_DESCRIPTOR::TYPE::Table
-                + STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted),
-        );
-
-        Self(val.get())
-    }
-}
-
-impl<const NUM_TABLES: usize> FixedSizeTranslationTable<{ NUM_TABLES }> {
-    /// Create an instance.
-    pub const fn new() -> Self {
-        assert!(NUM_TABLES > 0);
-
-        Self {
-            lvl3: [[PageDescriptor(0); 8192]; NUM_TABLES],
-            lvl2: [TableDescriptor(0); NUM_TABLES],
-        }
-    }
-}
-
-/// Setup function for the MAIR_EL1 register.
-fn set_up_mair() {
-    // Define the memory types being mapped.
-    MAIR_EL1.write(
-        // Attribute 1 - Cacheable normal DRAM.
-        MAIR_EL1::Attr1_Normal_Outer::WriteBack_NonTransient_ReadWriteAlloc +
+impl MemoryManagementUnit {
+    /// Setup function for the MAIR_EL1 register.
+    fn set_up_mair(&self) {
+        // Define the memory types being mapped.
+        MAIR_EL1.write(
+            // Attribute 1 - Cacheable normal DRAM.
+            MAIR_EL1::Attr1_Normal_Outer::WriteBack_NonTransient_ReadWriteAlloc +
         MAIR_EL1::Attr1_Normal_Inner::WriteBack_NonTransient_ReadWriteAlloc +
 
         // Attribute 0 - Device.
         MAIR_EL1::Attr0_Device::nonGathering_nonReordering_EarlyWriteAck,
-    );
-}
-
-/// Iterates over all static translation table entries and fills them at once.
-///
-/// # Safety
-///
-/// - Modifies a `static mut`. Ensure it only happens from here.
-unsafe fn populate_tt_entries() -> Result<(), &'static str> {
-    for (l2_nr, l2_entry) in KERNEL_TABLES.lvl2.iter_mut().enumerate() {
-        *l2_entry = KERNEL_TABLES.lvl3[l2_nr].base_addr_usize().into();
-
-        for (l3_nr, l3_entry) in KERNEL_TABLES.lvl3[l2_nr].iter_mut().enumerate() {
-            let virt_addr = (l2_nr << FIVETWELVE_MIB_SHIFT) + (l3_nr << SIXTYFOUR_KIB_SHIFT);
-
-            let (output_addr, attribute_fields) =
-                bsp::memory::mmu::virt_mem_layout().virt_addr_properties(virt_addr)?;
-
-            *l3_entry = PageDescriptor::new(output_addr, attribute_fields);
-        }
+        );
     }
 
-    Ok(())
-}
-
-/// Configure various settings of stage 1 of the EL1 translation regime.
-fn configure_translation_control() {
-    let ips = ID_AA64MMFR0_EL1.read(ID_AA64MMFR0_EL1::PARange);
-    let t0sz: u64 = bsp::memory::mmu::addr_space_size().trailing_zeros().into();
-
-    TCR_EL1.write(
-        TCR_EL1::TBI0::Ignored
-            + TCR_EL1::IPS.val(ips)
-            + TCR_EL1::EPD1::DisableTTBR1Walks
-            + TCR_EL1::TG0::KiB_64
-            + TCR_EL1::SH0::Inner
-            + TCR_EL1::ORGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
-            + TCR_EL1::IRGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
-            + TCR_EL1::EPD0::EnableTTBR0Walks
-            + TCR_EL1::T0SZ.val(t0sz),
-    );
+    /// Configure various settings of stage 1 of the EL1 translation regime.
+    fn configure_translation_control(&self) {
+        let ips = ID_AA64MMFR0_EL1.read(ID_AA64MMFR0_EL1::PARange);
+        let t0sz = (64 - bsp::memory::mmu::KernelAddrSpaceSize::SHIFT) as u64;
+
+        TCR_EL1.write(
+            TCR_EL1::TBI0::Ignored
+                + TCR_EL1::IPS.val(ips)
+                + TCR_EL1::EPD1::DisableTTBR1Walks
+                + TCR_EL1::TG0::KiB_64
+                + TCR_EL1::SH0::Inner
+                + TCR_EL1::ORGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
+                + TCR_EL1::IRGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
+                + TCR_EL1::EPD0::EnableTTBR0Walks
+                + TCR_EL1::T0SZ.val(t0sz),
+        );
+    }
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -317,15 +120,15 @@ impl memory::mmu::interface::MMU for MemoryManagementUnit {
         }
 
         // Prepare the memory attribute indirection register.
-        set_up_mair();
+        self.set_up_mair();
 
         // Populate translation tables.
-        populate_tt_entries()?;
+        KERNEL_TABLES.populate_tt_entries()?;
 
         // Set the "Translation Table Base Register".
-        TTBR0_EL1.set_baddr(KERNEL_TABLES.lvl2.base_addr_u64());
+        TTBR0_EL1.set_baddr(KERNEL_TABLES.base_address());
 
-        configure_translation_control();
+        self.configure_translation_control();
 
         // Switch the MMU on.
         //
diff --git a/12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs b/12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs
new file mode 100644
index 000000000..cbe1d7832
--- /dev/null
+++ b/12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -0,0 +1,288 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural translation table.
+//!
+//! Only 64 KiB granule is supported.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::memory::mmu::translation_table::arch_translation_table
+
+use crate::{
+    bsp, memory,
+    memory::mmu::{
+        arch_mmu::{Granule512MiB, Granule64KiB},
+        AccessPermissions, AttributeFields, MemAttributes,
+    },
+};
+use core::convert;
+use register::{register_bitfields, InMemoryRegister};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+// A table descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-15.
+register_bitfields! {u64,
+    STAGE1_TABLE_DESCRIPTOR [
+        /// Physical address of the next descriptor.
+        NEXT_LEVEL_TABLE_ADDR_64KiB OFFSET(16) NUMBITS(32) [], // [47:16]
+
+        TYPE  OFFSET(1) NUMBITS(1) [
+            Block = 0,
+            Table = 1
+        ],
+
+        VALID OFFSET(0) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ]
+    ]
+}
+
+// A level 3 page descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-17.
+register_bitfields! {u64,
+    STAGE1_PAGE_DESCRIPTOR [
+        /// Unprivileged execute-never.
+        UXN      OFFSET(54) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
+        /// Privileged execute-never.
+        PXN      OFFSET(53) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
+        /// Physical address of the next table descriptor (lvl2) or the page descriptor (lvl3).
+        OUTPUT_ADDR_64KiB OFFSET(16) NUMBITS(32) [], // [47:16]
+
+        /// Access flag.
+        AF       OFFSET(10) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
+        /// Shareability field.
+        SH       OFFSET(8) NUMBITS(2) [
+            OuterShareable = 0b10,
+            InnerShareable = 0b11
+        ],
+
+        /// Access Permissions.
+        AP       OFFSET(6) NUMBITS(2) [
+            RW_EL1 = 0b00,
+            RW_EL1_EL0 = 0b01,
+            RO_EL1 = 0b10,
+            RO_EL1_EL0 = 0b11
+        ],
+
+        /// Memory attributes index into the MAIR_EL1 register.
+        AttrIndx OFFSET(2) NUMBITS(3) [],
+
+        TYPE     OFFSET(1) NUMBITS(1) [
+            Block = 0,
+            Table = 1
+        ],
+
+        VALID    OFFSET(0) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ]
+    ]
+}
+
+/// A table descriptor for 64 KiB aperture.
+///
+/// The output points to the next table.
+#[derive(Copy, Clone)]
+#[repr(C)]
+struct TableDescriptor {
+    value: u64,
+}
+
+/// A page descriptor with 64 KiB aperture.
+///
+/// The output points to physical memory.
+#[derive(Copy, Clone)]
+#[repr(C)]
+struct PageDescriptor {
+    value: u64,
+}
+
+trait BaseAddr {
+    fn base_addr_u64(&self) -> u64;
+    fn base_addr_usize(&self) -> usize;
+}
+
+const NUM_LVL2_TABLES: usize = bsp::memory::mmu::KernelAddrSpaceSize::SIZE >> Granule512MiB::SHIFT;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Big monolithic struct for storing the translation tables. Individual levels must be 64 KiB
+/// aligned, hence the "reverse" order of appearance.
+#[repr(C)]
+#[repr(align(65536))]
+pub struct FixedSizeTranslationTable<const NUM_TABLES: usize> {
+    /// Page descriptors, covering 64 KiB windows per entry.
+    lvl3: [[PageDescriptor; 8192]; NUM_TABLES],
+
+    /// Table descriptors, covering 512 MiB windows.
+    lvl2: [TableDescriptor; NUM_TABLES],
+}
+
+/// A translation table type for the kernel space.
+pub type KernelTranslationTable = FixedSizeTranslationTable<NUM_LVL2_TABLES>;
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl<T, const N: usize> BaseAddr for [T; N] {
+    fn base_addr_u64(&self) -> u64 {
+        self as *const T as u64
+    }
+
+    fn base_addr_usize(&self) -> usize {
+        self as *const _ as usize
+    }
+}
+
+impl TableDescriptor {
+    /// Create an instance.
+    ///
+    /// Descriptor is invalid by default.
+    pub const fn new_zeroed() -> Self {
+        Self { value: 0 }
+    }
+
+    /// Create an instance pointing to the supplied address.
+    pub fn from_next_lvl_table_addr(next_lvl_table_addr: usize) -> Self {
+        let val = InMemoryRegister::<u64, STAGE1_TABLE_DESCRIPTOR::Register>::new(0);
+
+        let shifted = next_lvl_table_addr >> Granule64KiB::SHIFT;
+        val.write(
+            STAGE1_TABLE_DESCRIPTOR::VALID::True
+                + STAGE1_TABLE_DESCRIPTOR::TYPE::Table
+                + STAGE1_TABLE_DESCRIPTOR::NEXT_LEVEL_TABLE_ADDR_64KiB.val(shifted as u64),
+        );
+
+        TableDescriptor { value: val.get() }
+    }
+}
+
+/// Convert the kernel's generic memory attributes to HW-specific attributes of the MMU.
+impl convert::From<AttributeFields>
+    for register::FieldValue<u64, STAGE1_PAGE_DESCRIPTOR::Register>
+{
+    fn from(attribute_fields: AttributeFields) -> Self {
+        // Memory attributes.
+        let mut desc = match attribute_fields.mem_attributes {
+            MemAttributes::CacheableDRAM => {
+                STAGE1_PAGE_DESCRIPTOR::SH::InnerShareable
+                    + STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(memory::mmu::arch_mmu::mair::NORMAL)
+            }
+            MemAttributes::Device => {
+                STAGE1_PAGE_DESCRIPTOR::SH::OuterShareable
+                    + STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(memory::mmu::arch_mmu::mair::DEVICE)
+            }
+        };
+
+        // Access Permissions.
+        desc += match attribute_fields.acc_perms {
+            AccessPermissions::ReadOnly => STAGE1_PAGE_DESCRIPTOR::AP::RO_EL1,
+            AccessPermissions::ReadWrite => STAGE1_PAGE_DESCRIPTOR::AP::RW_EL1,
+        };
+
+        // The execute-never attribute is mapped to PXN in AArch64.
+        desc += if attribute_fields.execute_never {
+            STAGE1_PAGE_DESCRIPTOR::PXN::True
+        } else {
+            STAGE1_PAGE_DESCRIPTOR::PXN::False
+        };
+
+        // Always set unprivileged exectue-never as long as userspace is not implemented yet.
+        desc += STAGE1_PAGE_DESCRIPTOR::UXN::True;
+
+        desc
+    }
+}
+
+impl PageDescriptor {
+    /// Create an instance.
+    ///
+    /// Descriptor is invalid by default.
+    pub const fn new_zeroed() -> Self {
+        Self { value: 0 }
+    }
+
+    /// Create an instance.
+    pub fn from_output_addr(output_addr: usize, attribute_fields: AttributeFields) -> Self {
+        let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
+
+        let shifted = output_addr as u64 >> Granule64KiB::SHIFT;
+        val.write(
+            STAGE1_PAGE_DESCRIPTOR::VALID::True
+                + STAGE1_PAGE_DESCRIPTOR::AF::True
+                + attribute_fields.into()
+                + STAGE1_PAGE_DESCRIPTOR::TYPE::Table
+                + STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted),
+        );
+
+        Self { value: val.get() }
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
+    /// Create an instance.
+    #[allow(clippy::assertions_on_constants)]
+    pub const fn new() -> Self {
+        assert!(NUM_TABLES > 0);
+        assert!((bsp::memory::mmu::KernelAddrSpaceSize::SIZE % Granule512MiB::SIZE) == 0);
+
+        Self {
+            lvl3: [[PageDescriptor::new_zeroed(); 8192]; NUM_TABLES],
+            lvl2: [TableDescriptor::new_zeroed(); NUM_TABLES],
+        }
+    }
+
+    /// Iterates over all static translation table entries and fills them at once.
+    ///
+    /// # Safety
+    ///
+    /// - Modifies a `static mut`. Ensure it only happens from here.
+    pub unsafe fn populate_tt_entries(&mut self) -> Result<(), &'static str> {
+        for (l2_nr, l2_entry) in self.lvl2.iter_mut().enumerate() {
+            *l2_entry =
+                TableDescriptor::from_next_lvl_table_addr(self.lvl3[l2_nr].base_addr_usize());
+
+            for (l3_nr, l3_entry) in self.lvl3[l2_nr].iter_mut().enumerate() {
+                let virt_addr = (l2_nr << Granule512MiB::SHIFT) + (l3_nr << Granule64KiB::SHIFT);
+
+                let (output_addr, attribute_fields) =
+                    bsp::memory::mmu::virt_mem_layout().virt_addr_properties(virt_addr)?;
+
+                *l3_entry = PageDescriptor::from_output_addr(output_addr, attribute_fields);
+            }
+        }
+
+        Ok(())
+    }
+
+    /// The translation table's base address to be used for programming the MMU.
+    pub fn base_address(&self) -> u64 {
+        self.lvl2.base_addr_u64()
+    }
+}
diff --git a/12_exceptions_part1_groundwork/src/_arch/aarch64/time.rs b/12_exceptions_part1_groundwork/src/_arch/aarch64/time.rs
index 7f1bc6963..3a766009d 100644
--- a/12_exceptions_part1_groundwork/src/_arch/aarch64/time.rs
+++ b/12_exceptions_part1_groundwork/src/_arch/aarch64/time.rs
@@ -3,6 +3,13 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::time::arch_time
 
 use crate::{time, warn};
 use core::time::Duration;
@@ -55,7 +62,7 @@ impl time::interface::TimeManager for GenericTimer {
         }
 
         // Calculate the register compare value.
-        let frq = CNTFRQ_EL0.get() as u64;
+        let frq = CNTFRQ_EL0.get();
         let x = match frq.checked_mul(duration.as_nanos() as u64) {
             None => {
                 warn!("Spin duration too long, skipping");
diff --git a/12_exceptions_part1_groundwork/src/bsp.rs b/12_exceptions_part1_groundwork/src/bsp.rs
index 257502491..c558922f7 100644
--- a/12_exceptions_part1_groundwork/src/bsp.rs
+++ b/12_exceptions_part1_groundwork/src/bsp.rs
@@ -2,7 +2,7 @@
 //
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-//! Conditional re-exporting of Board Support Packages.
+//! Conditional reexporting of Board Support Packages.
 
 mod device_driver;
 
diff --git a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs b/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
index 59d736a7c..fe98604d9 100644
--- a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
+++ b/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
@@ -12,13 +12,16 @@ use core::ops::RangeInclusive;
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
+/// The address space size chosen by this BSP.
+pub type KernelAddrSpaceSize = AddressSpaceSize<{ memory_map::END_INCLUSIVE + 1 }>;
+
 const NUM_MEM_RANGES: usize = 2;
 
 /// The virtual memory layout.
 ///
 /// The layout must contain only special ranges, aka anything that is _not_ normal cacheable DRAM.
 /// It is agnostic of the paging granularity that the architecture's MMU will use.
-pub static LAYOUT: KernelVirtualLayout<{ NUM_MEM_RANGES }> = KernelVirtualLayout::new(
+pub static LAYOUT: KernelVirtualLayout<NUM_MEM_RANGES> = KernelVirtualLayout::new(
     memory_map::END_INCLUSIVE,
     [
         TranslationDescriptor {
@@ -62,17 +65,7 @@ fn mmio_range_inclusive() -> RangeInclusive<usize> {
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// Return the address space size in bytes.
-///
-/// Guarantees size to be a power of two.
-pub const fn addr_space_size() -> usize {
-    let size = memory_map::END_INCLUSIVE + 1;
-    assert!(size.is_power_of_two());
-
-    size
-}
-
 /// Return a reference to the virtual memory layout.
-pub fn virt_mem_layout() -> &'static KernelVirtualLayout<{ NUM_MEM_RANGES }> {
+pub fn virt_mem_layout() -> &'static KernelVirtualLayout<NUM_MEM_RANGES> {
     &LAYOUT
 }
diff --git a/12_exceptions_part1_groundwork/src/console.rs b/12_exceptions_part1_groundwork/src/console.rs
index 3552823cc..c3154ba23 100644
--- a/12_exceptions_part1_groundwork/src/console.rs
+++ b/12_exceptions_part1_groundwork/src/console.rs
@@ -20,8 +20,7 @@ pub mod interface {
         /// Write a Rust format string.
         fn write_fmt(&self, args: fmt::Arguments) -> fmt::Result;
 
-        /// Block execution until the last buffered character has been physically put on the TX
-        /// wire.
+        /// Block until the last buffered character has been physically put on the TX wire.
         fn flush(&self);
     }
 
diff --git a/12_exceptions_part1_groundwork/src/cpu.rs b/12_exceptions_part1_groundwork/src/cpu.rs
index c9e5af72c..3834f183c 100644
--- a/12_exceptions_part1_groundwork/src/cpu.rs
+++ b/12_exceptions_part1_groundwork/src/cpu.rs
@@ -7,6 +7,12 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "_arch/aarch64/cpu.rs"]
 mod arch_cpu;
-pub use arch_cpu::*;
+
+mod boot;
 
 pub mod smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_cpu::{nop, wait_forever};
diff --git a/12_exceptions_part1_groundwork/src/cpu/boot.rs b/12_exceptions_part1_groundwork/src/cpu/boot.rs
new file mode 100644
index 000000000..1dc5c1808
--- /dev/null
+++ b/12_exceptions_part1_groundwork/src/cpu/boot.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Boot code.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/cpu/boot.rs"]
+mod arch_boot;
diff --git a/12_exceptions_part1_groundwork/src/cpu/smp.rs b/12_exceptions_part1_groundwork/src/cpu/smp.rs
index 90ecbdf30..38230ce1e 100644
--- a/12_exceptions_part1_groundwork/src/cpu/smp.rs
+++ b/12_exceptions_part1_groundwork/src/cpu/smp.rs
@@ -6,5 +6,9 @@
 
 #[cfg(target_arch = "aarch64")]
 #[path = "../_arch/aarch64/cpu/smp.rs"]
-mod arch_cpu_smp;
-pub use arch_cpu_smp::*;
+mod arch_smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_smp::core_id;
diff --git a/12_exceptions_part1_groundwork/src/exception.rs b/12_exceptions_part1_groundwork/src/exception.rs
index 432c606b9..8e91d8bb9 100644
--- a/12_exceptions_part1_groundwork/src/exception.rs
+++ b/12_exceptions_part1_groundwork/src/exception.rs
@@ -7,10 +7,14 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "_arch/aarch64/exception.rs"]
 mod arch_exception;
-pub use arch_exception::*;
 
 pub mod asynchronous;
 
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_exception::{current_privilege_level, handling_init};
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
diff --git a/12_exceptions_part1_groundwork/src/exception/asynchronous.rs b/12_exceptions_part1_groundwork/src/exception/asynchronous.rs
index fbdba9579..566efe329 100644
--- a/12_exceptions_part1_groundwork/src/exception/asynchronous.rs
+++ b/12_exceptions_part1_groundwork/src/exception/asynchronous.rs
@@ -6,5 +6,9 @@
 
 #[cfg(target_arch = "aarch64")]
 #[path = "../_arch/aarch64/exception/asynchronous.rs"]
-mod arch_exception_async;
-pub use arch_exception_async::*;
+mod arch_asynchronous;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_asynchronous::print_state;
diff --git a/12_exceptions_part1_groundwork/src/main.rs b/12_exceptions_part1_groundwork/src/main.rs
index a2cf77527..80706a248 100644
--- a/12_exceptions_part1_groundwork/src/main.rs
+++ b/12_exceptions_part1_groundwork/src/main.rs
@@ -7,18 +7,6 @@
 
 //! The `kernel` binary.
 //!
-//! # TL;DR - Overview of important Kernel entities
-//!
-//! - [`bsp::console::console()`] - Returns a reference to the kernel's [console interface].
-//! - [`bsp::driver::driver_manager()`] - Returns a reference to the kernel's [driver interface].
-//! - [`memory::mmu::mmu()`] - Returns a reference to the kernel's [MMU interface].
-//! - [`time::time_manager()`] - Returns a reference to the kernel's [timer interface].
-//!
-//! [console interface]: ../libkernel/console/interface/index.html
-//! [driver interface]: ../libkernel/driver/interface/trait.DriverManager.html
-//! [MMU interface]: ../libkernel/memory/mmu/interface/trait.MMU.html
-//! [timer interface]: ../libkernel/time/interface/trait.TimeManager.html
-//!
 //! # Code organization and architecture
 //!
 //! The code is divided into different *modules*, each representing a typical **subsystem** of the
@@ -32,15 +20,22 @@
 //! `src/_arch`, for example, `src/_arch/aarch64`.
 //!
 //! The architecture folders mirror the subsystem modules laid out in `src`. For example,
-//! architectural code that belongs to the `kernel`'s memory subsystem (`src/memory.rs`) would go
-//! into `src/_arch/aarch64/memory.rs`. The latter file is directly included and re-exported in
-//! `src/memory.rs`, so that the architectural code parts are transparent with respect to the code's
-//! module organization. That means a public function `foo()` defined in
-//! `src/_arch/aarch64/memory.rs` would be reachable as `crate::memory::foo()` only.
+//! architectural code that belongs to the `kernel`'s MMU subsystem (`src/memory/mmu.rs`) would go
+//! into `src/_arch/aarch64/memory/mmu.rs`. The latter file is loaded as a module in
+//! `src/memory/mmu.rs` using the `path attribute`. Usually, the chosen module name is the generic
+//! module's name prefixed with `arch_`.
 //!
-//! The `_` in `_arch` denotes that this folder is not part of the standard module hierarchy.
-//! Rather, it's contents are conditionally pulled into respective files using the `#[path =
-//! "_arch/xxx/yyy.rs"]` attribute.
+//! For example, this is the top of `src/memory/mmu.rs`:
+//!
+//! ```
+//! #[cfg(target_arch = "aarch64")]
+//! #[path = "../_arch/aarch64/memory/mmu.rs"]
+//! mod arch_mmu;
+//! ```
+//!
+//! Often times, items from the `arch_ module` will be publicly reexported by the parent module.
+//! This way, each architecture specific module can provide its implementation of an item, while the
+//! caller must not be concerned which architecture has been conditionally compiled.
 //!
 //! ## BSP code
 //!
@@ -49,9 +44,8 @@
 //! or instances of drivers for devices that are featured on the respective board.
 //!
 //! Just like processor architecture code, the `BSP` code's module structure tries to mirror the
-//! `kernel`'s subsystem modules, but there is no transparent re-exporting this time. That means
-//! whatever is provided must be called starting from the `bsp` namespace, e.g.
-//! `bsp::driver::driver_manager()`.
+//! `kernel`'s subsystem modules, but there is no reexporting this time. That means whatever is
+//! provided must be called starting from the `bsp` namespace, e.g. `bsp::driver::driver_manager()`.
 //!
 //! ## Kernel interfaces
 //!
@@ -103,6 +97,14 @@
 //!
 //! - `crate::memory::*`
 //! - `crate::bsp::memory::*`
+//!
+//! # Boot flow
+//!
+//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
+//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
+//!
+//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 
 #![allow(incomplete_features)]
 #![feature(const_fn_fn_ptr_basics)]
@@ -115,9 +117,6 @@
 #![no_main]
 #![no_std]
 
-// `mod cpu` provides the `_start()` function, the first function to run. `_start()` then calls
-// `runtime_init()`, which jumps to `kernel_init()`.
-
 mod bsp;
 mod console;
 mod cpu;
diff --git a/12_exceptions_part1_groundwork/src/memory/mmu.rs b/12_exceptions_part1_groundwork/src/memory/mmu.rs
index 826cda6c9..efc9c447b 100644
--- a/12_exceptions_part1_groundwork/src/memory/mmu.rs
+++ b/12_exceptions_part1_groundwork/src/memory/mmu.rs
@@ -5,8 +5,8 @@
 //! Memory Management Unit.
 //!
 //! In order to decouple `BSP` and `arch` parts of the MMU code (to keep them pluggable), this file
-//! provides types for composing an architecture-agnostic description of the kernel 's virtual
-//! memory layout.
+//! provides types for composing an architecture-agnostic description of the kernel's virtual memory
+//! layout.
 //!
 //! The `BSP` provides such a description through the `bsp::memory::mmu::virt_mem_layout()`
 //! function.
@@ -17,10 +17,16 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "../_arch/aarch64/memory/mmu.rs"]
 mod arch_mmu;
-pub use arch_mmu::*;
+
+mod translation_table;
 
 use core::{fmt, ops::RangeInclusive};
 
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_mmu::mmu;
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -40,6 +46,12 @@ pub mod interface {
     }
 }
 
+/// Describes the characteristics of a translation granule.
+pub struct TranslationGranule<const GRANULE_SIZE: usize>;
+
+/// Describes the size of an address space.
+pub struct AddressSpaceSize<const AS_SIZE: usize>;
+
 /// Architecture agnostic translation types.
 #[allow(missing_docs)]
 #[allow(dead_code)]
@@ -96,6 +108,41 @@ pub struct KernelVirtualLayout<const NUM_SPECIAL_RANGES: usize> {
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
+impl<const GRANULE_SIZE: usize> TranslationGranule<GRANULE_SIZE> {
+    /// The granule's size.
+    pub const SIZE: usize = Self::size_checked();
+
+    /// The granule's shift, aka log2(size).
+    pub const SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
+
+    const fn size_checked() -> usize {
+        assert!(GRANULE_SIZE.is_power_of_two());
+
+        GRANULE_SIZE
+    }
+}
+
+impl<const AS_SIZE: usize> AddressSpaceSize<AS_SIZE> {
+    /// The address space size.
+    pub const SIZE: usize = Self::size_checked();
+
+    /// The address space shift, aka log2(size).
+    pub const SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
+
+    const fn size_checked() -> usize {
+        assert!(AS_SIZE.is_power_of_two());
+        assert!(arch_mmu::MIN_ADDR_SPACE_SIZE.is_power_of_two());
+        assert!(arch_mmu::MAX_ADDR_SPACE_SIZE.is_power_of_two());
+
+        // Must adhere to architectural restrictions.
+        assert!(AS_SIZE >= arch_mmu::MIN_ADDR_SPACE_SIZE);
+        assert!(AS_SIZE <= arch_mmu::MAX_ADDR_SPACE_SIZE);
+        assert!((AS_SIZE % arch_mmu::AddrSpaceSizeGranule::SIZE) == 0);
+
+        AS_SIZE
+    }
+}
+
 impl Default for AttributeFields {
     fn default() -> AttributeFields {
         AttributeFields {
diff --git a/12_exceptions_part1_groundwork/src/memory/mmu/translation_table.rs b/12_exceptions_part1_groundwork/src/memory/mmu/translation_table.rs
new file mode 100644
index 000000000..bbb6f9394
--- /dev/null
+++ b/12_exceptions_part1_groundwork/src/memory/mmu/translation_table.rs
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Translation table.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../../_arch/aarch64/memory/mmu/translation_table.rs"]
+mod arch_translation_table;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_translation_table::KernelTranslationTable;
diff --git a/12_exceptions_part1_groundwork/src/print.rs b/12_exceptions_part1_groundwork/src/print.rs
index 1ea96b6ad..5a5638113 100644
--- a/12_exceptions_part1_groundwork/src/print.rs
+++ b/12_exceptions_part1_groundwork/src/print.rs
@@ -2,7 +2,7 @@
 //
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-//! Printing facilities.
+//! Printing.
 
 use crate::{bsp, console};
 use core::fmt;
diff --git a/12_exceptions_part1_groundwork/src/time.rs b/12_exceptions_part1_groundwork/src/time.rs
index 4f2f4e38f..953b6f0df 100644
--- a/12_exceptions_part1_groundwork/src/time.rs
+++ b/12_exceptions_part1_groundwork/src/time.rs
@@ -7,7 +7,11 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "_arch/aarch64/time.rs"]
 mod arch_time;
-pub use arch_time::*;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_time::time_manager;
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -18,8 +22,6 @@ pub mod interface {
     use core::time::Duration;
 
     /// Time management functions.
-    ///
-    /// The `BSP` is supposed to supply one global instance.
     pub trait TimeManager {
         /// The timer's resolution.
         fn resolution(&self) -> Duration;
diff --git a/13_integrated_testing/Makefile b/13_integrated_testing/Makefile
index 9f7ea9a39..4f7561dbd 100644
--- a/13_integrated_testing/Makefile
+++ b/13_integrated_testing/Makefile
@@ -57,8 +57,9 @@ QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
+FEATURES      = bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
-    --features bsp_$(BSP)          \
+    --features $(FEATURES)         \
     --release
 
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
diff --git a/13_integrated_testing/README.md b/13_integrated_testing/README.md
index 849cbbfb2..9a99cbdf5 100644
--- a/13_integrated_testing/README.md
+++ b/13_integrated_testing/README.md
@@ -138,7 +138,6 @@ In `lib.rs`, we add the following headers to get started with `custom_test_frame
 ```rust
 // Testing
 #![cfg_attr(test, no_main)]
-#![cfg_attr(test, feature(slice_ptr_range))]
 #![feature(custom_test_frameworks)]
 #![reexport_test_harness_main = "test_main"]
 #![test_runner(crate::test_runner)]
@@ -255,9 +254,9 @@ this is an opportunity to cut down on setup code.
 
 [tutorial 03]: ../03_hacky_hello_world
 
-As a matter of fact, for the `Raspberrys`, nothing needs to be done and the function is empy. But
+As a matter of fact, for the `Raspberrys`, nothing needs to be done, so the function is empy. But
 this might be different for other hardware emulated by QEMU, so it makes sense to introduce the
-function now to make it easier in case new `BSPs` are  added to the kernel in the future.
+function now to make it easier in case new `BSPs` are added to the kernel in the future.
 
 Next, the reexported `test_main()` is called, which will call our `test_runner()` which finally
 prints the unit test names and executes them.
@@ -875,7 +874,7 @@ diff -uNr 12_exceptions_part1_groundwork/Makefile 13_integrated_testing/Makefile
  RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
  RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
-@@ -52,6 +65,7 @@
+@@ -53,6 +66,7 @@
  DOC_CMD     = cargo doc $(COMPILER_ARGS)
  CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
  CHECK_CMD   = cargo check $(COMPILER_ARGS)
@@ -883,7 +882,7 @@ diff -uNr 12_exceptions_part1_groundwork/Makefile 13_integrated_testing/Makefile
  OBJCOPY_CMD = rust-objcopy \
      --strip-all            \
      -O binary
-@@ -68,6 +82,7 @@
+@@ -69,6 +83,7 @@
 
  DOCKER_QEMU     = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
  DOCKER_GDB      = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
@@ -891,7 +890,7 @@ diff -uNr 12_exceptions_part1_groundwork/Makefile 13_integrated_testing/Makefile
  DOCKER_ELFTOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 
  # Dockerize commands that require USB device passthrough only on Linux
-@@ -84,8 +99,8 @@
+@@ -85,8 +100,8 @@
  EXEC_QEMU     = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
  EXEC_MINIPUSH = ruby ../utils/minipush.rb
 
@@ -902,7 +901,7 @@ diff -uNr 12_exceptions_part1_groundwork/Makefile 13_integrated_testing/Makefile
 
  all: $(KERNEL_BIN)
 
-@@ -99,11 +114,26 @@
+@@ -100,11 +115,26 @@
  	$(DOC_CMD) --document-private-items --open
 
  ifeq ($(QEMU_MACHINE_TYPE),)
@@ -935,7 +934,7 @@ diff -uNr 12_exceptions_part1_groundwork/Makefile 13_integrated_testing/Makefile
 diff -uNr 12_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs 13_integrated_testing/src/_arch/aarch64/cpu.rs
 --- 12_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs
 +++ 13_integrated_testing/src/_arch/aarch64/cpu.rs
-@@ -90,3 +90,20 @@
+@@ -26,3 +26,20 @@
          asm::wfe()
      }
  }
@@ -960,8 +959,8 @@ diff -uNr 12_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs 13_integrated_
 diff -uNr 12_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs 13_integrated_testing/src/_arch/aarch64/exception.rs
 --- 12_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
 +++ 13_integrated_testing/src/_arch/aarch64/exception.rs
-@@ -5,7 +5,7 @@
- //! Architectural synchronous and asynchronous exception handling.
+@@ -12,7 +12,7 @@
+ //! crate::exception::arch_exception
 
  use core::{cell::UnsafeCell, fmt};
 -use cortex_a::{asm, barrier, regs::*};
@@ -969,7 +968,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs 13_integ
  use register::InMemoryRegister;
 
  // Assembly counterpart to this file.
-@@ -80,16 +80,6 @@
+@@ -87,16 +87,6 @@
 
  #[no_mangle]
  unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
@@ -987,11 +986,11 @@ diff -uNr 12_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs 13_integ
  }
 
 
-diff -uNr 12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs 13_integrated_testing/src/_arch/aarch64/memory/mmu.rs
---- 12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
-+++ 13_integrated_testing/src/_arch/aarch64/memory/mmu.rs
-@@ -341,3 +341,40 @@
-         Ok(())
+diff -uNr 12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs 13_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs
+--- 12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs
++++ 13_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs
+@@ -286,3 +286,31 @@
+         self.lvl2.base_addr_u64()
      }
  }
 +
@@ -1021,6 +1020,24 @@ diff -uNr 12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs 13_inte
 +            core::mem::size_of::<u64>()
 +        );
 +    }
++}
+
+diff -uNr 12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs 13_integrated_testing/src/_arch/aarch64/memory/mmu.rs
+--- 12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
++++ 13_integrated_testing/src/_arch/aarch64/memory/mmu.rs
+@@ -144,3 +144,22 @@
+         Ok(())
+     }
+ }
++
++//--------------------------------------------------------------------------------------------------
++// Testing
++//--------------------------------------------------------------------------------------------------
++
++#[cfg(test)]
++mod tests {
++    use super::*;
++    use test_macros::kernel_test;
 +
 +    /// Check if KERNEL_TABLES is in .bss.
 +    #[kernel_test]
@@ -1053,8 +1070,8 @@ diff -uNr 12_exceptions_part1_groundwork/src/bsp/raspberrypi/console.rs 13_integ
 diff -uNr 12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs 13_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs
 --- 12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
 +++ 13_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs
-@@ -76,3 +76,46 @@
- pub fn virt_mem_layout() -> &'static KernelVirtualLayout<{ NUM_MEM_RANGES }> {
+@@ -69,3 +69,46 @@
+ pub fn virt_mem_layout() -> &'static KernelVirtualLayout<NUM_MEM_RANGES> {
      &LAYOUT
  }
 +
@@ -1101,10 +1118,20 @@ diff -uNr 12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs 13_in
 +    }
 +}
 
+diff -uNr 12_exceptions_part1_groundwork/src/cpu.rs 13_integrated_testing/src/cpu.rs
+--- 12_exceptions_part1_groundwork/src/cpu.rs
++++ 13_integrated_testing/src/cpu.rs
+@@ -15,4 +15,4 @@
+ //--------------------------------------------------------------------------------------------------
+ // Architectural Public Reexports
+ //--------------------------------------------------------------------------------------------------
+-pub use arch_cpu::{nop, wait_forever};
++pub use arch_cpu::{nop, qemu_exit_failure, qemu_exit_success, wait_forever};
+
 diff -uNr 12_exceptions_part1_groundwork/src/exception.rs 13_integrated_testing/src/exception.rs
 --- 12_exceptions_part1_groundwork/src/exception.rs
 +++ 13_integrated_testing/src/exception.rs
-@@ -24,3 +24,21 @@
+@@ -28,3 +28,21 @@
      Hypervisor,
      Unknown,
  }
@@ -1130,7 +1157,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/exception.rs 13_integrated_testing/
 diff -uNr 12_exceptions_part1_groundwork/src/lib.rs 13_integrated_testing/src/lib.rs
 --- 12_exceptions_part1_groundwork/src/lib.rs
 +++ 13_integrated_testing/src/lib.rs
-@@ -0,0 +1,169 @@
+@@ -0,0 +1,168 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -1140,19 +1167,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/lib.rs 13_integrated_testing/src/li
 +
 +//! The `kernel` library.
 +//!
-+//! Used by `main.rs` to compose the final kernel binary.
-+//!
-+//! # TL;DR - Overview of important Kernel entities
-+//!
-+//! - [`bsp::console::console()`] - Returns a reference to the kernel's [console interface].
-+//! - [`bsp::driver::driver_manager()`] - Returns a reference to the kernel's [driver interface].
-+//! - [`memory::mmu::mmu()`] - Returns a reference to the kernel's [MMU interface].
-+//! - [`time::time_manager()`] - Returns a reference to the kernel's [timer interface].
-+//!
-+//! [console interface]: ../libkernel/console/interface/index.html
-+//! [driver interface]: ../libkernel/driver/interface/trait.DriverManager.html
-+//! [MMU interface]: ../libkernel/memory/mmu/interface/trait.MMU.html
-+//! [timer interface]: ../libkernel/time/interface/trait.TimeManager.html
++//! Used to compose the final kernel binary.
 +//!
 +//! # Code organization and architecture
 +//!
@@ -1167,15 +1182,22 @@ diff -uNr 12_exceptions_part1_groundwork/src/lib.rs 13_integrated_testing/src/li
 +//! `src/_arch`, for example, `src/_arch/aarch64`.
 +//!
 +//! The architecture folders mirror the subsystem modules laid out in `src`. For example,
-+//! architectural code that belongs to the `kernel`'s memory subsystem (`src/memory.rs`) would go
-+//! into `src/_arch/aarch64/memory.rs`. The latter file is directly included and re-exported in
-+//! `src/memory.rs`, so that the architectural code parts are transparent with respect to the code's
-+//! module organization. That means a public function `foo()` defined in
-+//! `src/_arch/aarch64/memory.rs` would be reachable as `crate::memory::foo()` only.
++//! architectural code that belongs to the `kernel`'s MMU subsystem (`src/memory/mmu.rs`) would go
++//! into `src/_arch/aarch64/memory/mmu.rs`. The latter file is loaded as a module in
++//! `src/memory/mmu.rs` using the `path attribute`. Usually, the chosen module name is the generic
++//! module's name prefixed with `arch_`.
 +//!
-+//! The `_` in `_arch` denotes that this folder is not part of the standard module hierarchy.
-+//! Rather, it's contents are conditionally pulled into respective files using the `#[path =
-+//! "_arch/xxx/yyy.rs"]` attribute.
++//! For example, this is the top of `src/memory/mmu.rs`:
++//!
++//! ```
++//! #[cfg(target_arch = "aarch64")]
++//! #[path = "../_arch/aarch64/memory/mmu.rs"]
++//! mod arch_mmu;
++//! ```
++//!
++//! Often times, items from the `arch_ module` will be publicly reexported by the parent module.
++//! This way, each architecture specific module can provide its implementation of an item, while the
++//! caller must not be concerned which architecture has been conditionally compiled.
 +//!
 +//! ## BSP code
 +//!
@@ -1184,9 +1206,8 @@ diff -uNr 12_exceptions_part1_groundwork/src/lib.rs 13_integrated_testing/src/li
 +//! or instances of drivers for devices that are featured on the respective board.
 +//!
 +//! Just like processor architecture code, the `BSP` code's module structure tries to mirror the
-+//! `kernel`'s subsystem modules, but there is no transparent re-exporting this time. That means
-+//! whatever is provided must be called starting from the `bsp` namespace, e.g.
-+//! `bsp::driver::driver_manager()`.
++//! `kernel`'s subsystem modules, but there is no reexporting this time. That means whatever is
++//! provided must be called starting from the `bsp` namespace, e.g. `bsp::driver::driver_manager()`.
 +//!
 +//! ## Kernel interfaces
 +//!
@@ -1238,6 +1259,14 @@ diff -uNr 12_exceptions_part1_groundwork/src/lib.rs 13_integrated_testing/src/li
 +//!
 +//! - `crate::memory::*`
 +//! - `crate::bsp::memory::*`
++//!
++//! # Boot flow
++//!
++//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
++//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
++//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
++//!
++//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 +
 +#![allow(incomplete_features)]
 +#![feature(const_fn_fn_ptr_basics)]
@@ -1255,9 +1284,6 @@ diff -uNr 12_exceptions_part1_groundwork/src/lib.rs 13_integrated_testing/src/li
 +#![reexport_test_harness_main = "test_main"]
 +#![test_runner(crate::test_runner)]
 +
-+// `mod cpu` provides the `_start()` function, the first function to run. `_start()` then calls
-+// `runtime_init()`, which jumps to `kernel_init()` (defined in `main.rs`).
-+
 +mod panic_wait;
 +mod runtime_init;
 +mod synchronization;
@@ -1304,23 +1330,11 @@ diff -uNr 12_exceptions_part1_groundwork/src/lib.rs 13_integrated_testing/src/li
 diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/main.rs
 --- 12_exceptions_part1_groundwork/src/main.rs
 +++ 13_integrated_testing/src/main.rs
-@@ -6,129 +6,12 @@
+@@ -6,128 +6,12 @@
  #![doc(html_logo_url = "https://git.io/JeGIp")]
 
  //! The `kernel` binary.
 -//!
--//! # TL;DR - Overview of important Kernel entities
--//!
--//! - [`bsp::console::console()`] - Returns a reference to the kernel's [console interface].
--//! - [`bsp::driver::driver_manager()`] - Returns a reference to the kernel's [driver interface].
--//! - [`memory::mmu::mmu()`] - Returns a reference to the kernel's [MMU interface].
--//! - [`time::time_manager()`] - Returns a reference to the kernel's [timer interface].
--//!
--//! [console interface]: ../libkernel/console/interface/index.html
--//! [driver interface]: ../libkernel/driver/interface/trait.DriverManager.html
--//! [MMU interface]: ../libkernel/memory/mmu/interface/trait.MMU.html
--//! [timer interface]: ../libkernel/time/interface/trait.TimeManager.html
--//!
 -//! # Code organization and architecture
 -//!
 -//! The code is divided into different *modules*, each representing a typical **subsystem** of the
@@ -1334,15 +1348,22 @@ diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/m
 -//! `src/_arch`, for example, `src/_arch/aarch64`.
 -//!
 -//! The architecture folders mirror the subsystem modules laid out in `src`. For example,
--//! architectural code that belongs to the `kernel`'s memory subsystem (`src/memory.rs`) would go
--//! into `src/_arch/aarch64/memory.rs`. The latter file is directly included and re-exported in
--//! `src/memory.rs`, so that the architectural code parts are transparent with respect to the code's
--//! module organization. That means a public function `foo()` defined in
--//! `src/_arch/aarch64/memory.rs` would be reachable as `crate::memory::foo()` only.
+-//! architectural code that belongs to the `kernel`'s MMU subsystem (`src/memory/mmu.rs`) would go
+-//! into `src/_arch/aarch64/memory/mmu.rs`. The latter file is loaded as a module in
+-//! `src/memory/mmu.rs` using the `path attribute`. Usually, the chosen module name is the generic
+-//! module's name prefixed with `arch_`.
 -//!
--//! The `_` in `_arch` denotes that this folder is not part of the standard module hierarchy.
--//! Rather, it's contents are conditionally pulled into respective files using the `#[path =
--//! "_arch/xxx/yyy.rs"]` attribute.
+-//! For example, this is the top of `src/memory/mmu.rs`:
+-//!
+-//! ```
+-//! #[cfg(target_arch = "aarch64")]
+-//! #[path = "../_arch/aarch64/memory/mmu.rs"]
+-//! mod arch_mmu;
+-//! ```
+-//!
+-//! Often times, items from the `arch_ module` will be publicly reexported by the parent module.
+-//! This way, each architecture specific module can provide its implementation of an item, while the
+-//! caller must not be concerned which architecture has been conditionally compiled.
 -//!
 -//! ## BSP code
 -//!
@@ -1351,9 +1372,8 @@ diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/m
 -//! or instances of drivers for devices that are featured on the respective board.
 -//!
 -//! Just like processor architecture code, the `BSP` code's module structure tries to mirror the
--//! `kernel`'s subsystem modules, but there is no transparent re-exporting this time. That means
--//! whatever is provided must be called starting from the `bsp` namespace, e.g.
--//! `bsp::driver::driver_manager()`.
+-//! `kernel`'s subsystem modules, but there is no reexporting this time. That means whatever is
+-//! provided must be called starting from the `bsp` namespace, e.g. `bsp::driver::driver_manager()`.
 -//!
 -//! ## Kernel interfaces
 -//!
@@ -1405,6 +1425,14 @@ diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/m
 -//!
 -//! - `crate::memory::*`
 -//! - `crate::bsp::memory::*`
+-//!
+-//! # Boot flow
+-//!
+-//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
+-//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
+-//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
+-//!
+-//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 -
 -#![allow(incomplete_features)]
 -#![feature(const_fn_fn_ptr_basics)]
@@ -1418,9 +1446,6 @@ diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/m
  #![no_main]
  #![no_std]
 
--// `mod cpu` provides the `_start()` function, the first function to run. `_start()` then calls
--// `runtime_init()`, which jumps to `kernel_init()`.
--
 -mod bsp;
 -mod console;
 -mod cpu;
@@ -1436,7 +1461,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/m
 
  /// Early init code.
  ///
-@@ -140,6 +23,7 @@
+@@ -139,6 +23,7 @@
  ///       - Without it, any atomic operations, e.g. the yet-to-be-introduced spinlocks in the device
  ///         drivers (which currently employ NullLocks instead of spinlocks), will fail to work on
  ///         the RPi SoCs.
@@ -1444,7 +1469,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/m
  unsafe fn kernel_init() -> ! {
      use driver::interface::DriverManager;
      use memory::mmu::interface::MMU;
-@@ -166,9 +50,7 @@
+@@ -165,9 +50,7 @@
  fn kernel_main() -> ! {
      use bsp::console::console;
      use console::interface::All;
@@ -1454,7 +1479,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/m
 
      info!("Booting on: {}", bsp::board_name());
 
-@@ -195,31 +77,6 @@
+@@ -194,31 +77,6 @@
          info!("      {}. {}", i + 1, driver.compatible());
      }
 
@@ -1490,7 +1515,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/m
 diff -uNr 12_exceptions_part1_groundwork/src/memory/mmu.rs 13_integrated_testing/src/memory/mmu.rs
 --- 12_exceptions_part1_groundwork/src/memory/mmu.rs
 +++ 13_integrated_testing/src/memory/mmu.rs
-@@ -42,7 +42,6 @@
+@@ -54,7 +54,6 @@
 
  /// Architecture agnostic translation types.
  #[allow(missing_docs)]
@@ -1498,7 +1523,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/memory/mmu.rs 13_integrated_testing
  #[derive(Copy, Clone)]
  pub enum Translation {
      Identity,
-@@ -197,4 +196,9 @@
+@@ -244,4 +243,9 @@
              info!("{}", i);
          }
      }
diff --git a/13_integrated_testing/src/_arch/aarch64/cpu.rs b/13_integrated_testing/src/_arch/aarch64/cpu.rs
index 491f17ca8..948bad747 100644
--- a/13_integrated_testing/src/_arch/aarch64/cpu.rs
+++ b/13_integrated_testing/src/_arch/aarch64/cpu.rs
@@ -3,79 +3,15 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
-
-use crate::{bsp, cpu};
-use cortex_a::{asm, regs::*};
-
-//--------------------------------------------------------------------------------------------------
-// Boot Code
-//--------------------------------------------------------------------------------------------------
-
-/// The entry of the `kernel` binary.
-///
-/// The function must be named `_start`, because the linker is looking for this exact name.
-///
-/// # Safety
-///
-/// - Linker script must ensure to place this function where it is expected by the target machine.
-/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
-///   a stack for EL2.
-#[no_mangle]
-pub unsafe fn _start() -> ! {
-    // Expect the boot core to start in EL2.
-    if (bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id())
-        && (CurrentEL.get() == CurrentEL::EL::EL2.value)
-    {
-        el2_to_el1_transition()
-    } else {
-        // If not core0, infinitely wait for events.
-        wait_forever()
-    }
-}
-
-/// Transition from EL2 to EL1.
-///
-/// # Safety
-///
-/// - The HW state of EL1 must be prepared in a sound way.
-/// - Exception return from EL2 must must continue execution in EL1 with
-///   `runtime_init::runtime_init()`.
-/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
-///   a stack for EL2.
-#[inline(always)]
-unsafe fn el2_to_el1_transition() -> ! {
-    use crate::runtime_init;
-
-    // Enable timer counter registers for EL1.
-    CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
-
-    // No offset for reading the counters.
-    CNTVOFF_EL2.set(0);
-
-    // Set EL1 execution state to AArch64.
-    HCR_EL2.write(HCR_EL2::RW::EL1IsAarch64);
-
-    // Set up a simulated exception return.
-    //
-    // First, fake a saved program status where all interrupts were masked and SP_EL1 was used as a
-    // stack pointer.
-    SPSR_EL2.write(
-        SPSR_EL2::D::Masked
-            + SPSR_EL2::A::Masked
-            + SPSR_EL2::I::Masked
-            + SPSR_EL2::F::Masked
-            + SPSR_EL2::M::EL1h,
-    );
-
-    // Second, let the link register point to runtime_init().
-    ELR_EL2.set(runtime_init::runtime_init as *const () as u64);
-
-    // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it.
-    SP_EL1.set(bsp::memory::boot_core_stack_end() as u64);
-
-    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
-    asm::eret()
-}
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::arch_cpu
+
+use cortex_a::asm;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/13_integrated_testing/src/_arch/aarch64/cpu/boot.rs b/13_integrated_testing/src/_arch/aarch64/cpu/boot.rs
new file mode 100644
index 000000000..c2f5fe0b7
--- /dev/null
+++ b/13_integrated_testing/src/_arch/aarch64/cpu/boot.rs
@@ -0,0 +1,89 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural boot code.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::boot::arch_boot
+
+use crate::{bsp, cpu};
+use cortex_a::{asm, regs::*};
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// Transition from EL2 to EL1.
+///
+/// # Safety
+///
+/// - The HW state of EL1 must be prepared in a sound way.
+/// - Exception return from EL2 must must continue execution in EL1 with
+///   `runtime_init::runtime_init()`.
+/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
+///   a stack for EL2.
+#[inline(always)]
+unsafe fn el2_to_el1_transition() -> ! {
+    use crate::runtime_init;
+
+    // Enable timer counter registers for EL1.
+    CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
+
+    // No offset for reading the counters.
+    CNTVOFF_EL2.set(0);
+
+    // Set EL1 execution state to AArch64.
+    HCR_EL2.write(HCR_EL2::RW::EL1IsAarch64);
+
+    // Set up a simulated exception return.
+    //
+    // First, fake a saved program status where all interrupts were masked and SP_EL1 was used as a
+    // stack pointer.
+    SPSR_EL2.write(
+        SPSR_EL2::D::Masked
+            + SPSR_EL2::A::Masked
+            + SPSR_EL2::I::Masked
+            + SPSR_EL2::F::Masked
+            + SPSR_EL2::M::EL1h,
+    );
+
+    // Second, let the link register point to runtime_init().
+    ELR_EL2.set(runtime_init::runtime_init as *const () as u64);
+
+    // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it.
+    SP_EL1.set(bsp::memory::boot_core_stack_end() as u64);
+
+    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
+    asm::eret()
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The entry of the `kernel` binary.
+///
+/// The function must be named `_start`, because the linker is looking for this exact name.
+///
+/// # Safety
+///
+/// - Linker script must ensure to place this function where it is expected by the target machine.
+/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
+///   a stack for EL2.
+#[no_mangle]
+pub unsafe fn _start() -> ! {
+    // Expect the boot core to start in EL2.
+    if (bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id())
+        && (CurrentEL.get() == CurrentEL::EL::EL2.value)
+    {
+        el2_to_el1_transition()
+    } else {
+        // If not core0, infinitely wait for events.
+        cpu::wait_forever()
+    }
+}
diff --git a/13_integrated_testing/src/_arch/aarch64/cpu/smp.rs b/13_integrated_testing/src/_arch/aarch64/cpu/smp.rs
index c80f7e780..b9fdd0f73 100644
--- a/13_integrated_testing/src/_arch/aarch64/cpu/smp.rs
+++ b/13_integrated_testing/src/_arch/aarch64/cpu/smp.rs
@@ -3,6 +3,13 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::smp::arch_smp
 
 use cortex_a::regs::*;
 
diff --git a/13_integrated_testing/src/_arch/aarch64/exception.rs b/13_integrated_testing/src/_arch/aarch64/exception.rs
index 7070d8140..0e640ec69 100644
--- a/13_integrated_testing/src/_arch/aarch64/exception.rs
+++ b/13_integrated_testing/src/_arch/aarch64/exception.rs
@@ -3,6 +3,13 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural synchronous and asynchronous exception handling.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::exception::arch_exception
 
 use core::{cell::UnsafeCell, fmt};
 use cortex_a::{barrier, regs::*};
diff --git a/13_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs b/13_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs
index 445f490eb..b63b00fe7 100644
--- a/13_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs
+++ b/13_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs
@@ -3,6 +3,13 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural asynchronous exception handling.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::exception::asynchronous::arch_asynchronous
 
 use cortex_a::regs::*;
 
diff --git a/13_integrated_testing/src/_arch/aarch64/memory/mmu.rs b/13_integrated_testing/src/_arch/aarch64/memory/mmu.rs
index 9b658e864..42ba0519b 100644
--- a/13_integrated_testing/src/_arch/aarch64/memory/mmu.rs
+++ b/13_integrated_testing/src/_arch/aarch64/memory/mmu.rs
@@ -4,146 +4,61 @@
 
 //! Memory Management Unit Driver.
 //!
-//! Static translation tables, compiled on boot; Everything 64 KiB granule.
+//! Only 64 KiB granule is supported.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::memory::mmu::arch_mmu
 
-use super::{AccessPermissions, AttributeFields, MemAttributes};
-use crate::{bsp, memory};
-use core::convert;
+use crate::{
+    bsp, memory,
+    memory::mmu::{translation_table::KernelTranslationTable, TranslationGranule},
+};
 use cortex_a::{barrier, regs::*};
-use register::{register_bitfields, InMemoryRegister};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
-// A table descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-15.
-register_bitfields! {u64,
-    STAGE1_TABLE_DESCRIPTOR [
-        /// Physical address of the next descriptor.
-        NEXT_LEVEL_TABLE_ADDR_64KiB OFFSET(16) NUMBITS(32) [], // [47:16]
-
-        TYPE  OFFSET(1) NUMBITS(1) [
-            Block = 0,
-            Table = 1
-        ],
-
-        VALID OFFSET(0) NUMBITS(1) [
-            False = 0,
-            True = 1
-        ]
-    ]
-}
-
-// A level 3 page descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-17.
-register_bitfields! {u64,
-    STAGE1_PAGE_DESCRIPTOR [
-        /// Unprivileged execute-never.
-        UXN      OFFSET(54) NUMBITS(1) [
-            False = 0,
-            True = 1
-        ],
-
-        /// Privileged execute-never.
-        PXN      OFFSET(53) NUMBITS(1) [
-            False = 0,
-            True = 1
-        ],
-
-        /// Physical address of the next table descriptor (lvl2) or the page descriptor (lvl3).
-        OUTPUT_ADDR_64KiB OFFSET(16) NUMBITS(32) [], // [47:16]
-
-        /// Access flag.
-        AF       OFFSET(10) NUMBITS(1) [
-            False = 0,
-            True = 1
-        ],
-
-        /// Shareability field.
-        SH       OFFSET(8) NUMBITS(2) [
-            OuterShareable = 0b10,
-            InnerShareable = 0b11
-        ],
-
-        /// Access Permissions.
-        AP       OFFSET(6) NUMBITS(2) [
-            RW_EL1 = 0b00,
-            RW_EL1_EL0 = 0b01,
-            RO_EL1 = 0b10,
-            RO_EL1_EL0 = 0b11
-        ],
-
-        /// Memory attributes index into the MAIR_EL1 register.
-        AttrIndx OFFSET(2) NUMBITS(3) [],
-
-        TYPE     OFFSET(1) NUMBITS(1) [
-            Block = 0,
-            Table = 1
-        ],
-
-        VALID    OFFSET(0) NUMBITS(1) [
-            False = 0,
-            True = 1
-        ]
-    ]
-}
+/// Memory Management Unit type.
+struct MemoryManagementUnit;
 
-const SIXTYFOUR_KIB_SHIFT: usize = 16; //  log2(64 * 1024)
-const FIVETWELVE_MIB_SHIFT: usize = 29; // log2(512 * 1024 * 1024)
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
 
-/// A table descriptor for 64 KiB aperture.
-///
-/// The output points to the next table.
-#[derive(Copy, Clone)]
-#[repr(transparent)]
-struct TableDescriptor(u64);
+pub type Granule512MiB = TranslationGranule<{ 512 * 1024 * 1024 }>;
+pub type Granule64KiB = TranslationGranule<{ 64 * 1024 }>;
 
-/// A page descriptor with 64 KiB aperture.
-///
-/// The output points to physical memory.
-#[derive(Copy, Clone)]
-#[repr(transparent)]
-struct PageDescriptor(u64);
-
-/// Big monolithic struct for storing the translation tables. Individual levels must be 64 KiB
-/// aligned, hence the "reverse" order of appearance.
-#[repr(C)]
-#[repr(align(65536))]
-struct FixedSizeTranslationTable<const NUM_TABLES: usize> {
-    /// Page descriptors, covering 64 KiB windows per entry.
-    lvl3: [[PageDescriptor; 8192]; NUM_TABLES],
-
-    /// Table descriptors, covering 512 MiB windows.
-    lvl2: [TableDescriptor; NUM_TABLES],
-}
+/// The min supported address space size.
+pub const MIN_ADDR_SPACE_SIZE: usize = 1024 * 1024 * 1024; // 1 GiB
 
-const NUM_LVL2_TABLES: usize = bsp::memory::mmu::addr_space_size() >> FIVETWELVE_MIB_SHIFT;
-type ArchTranslationTable = FixedSizeTranslationTable<NUM_LVL2_TABLES>;
+/// The max supported address space size.
+pub const MAX_ADDR_SPACE_SIZE: usize = 32 * 1024 * 1024 * 1024; // 32 GiB
 
-trait BaseAddr {
-    fn base_addr_u64(&self) -> u64;
-    fn base_addr_usize(&self) -> usize;
-}
+/// The supported address space size granule.
+pub type AddrSpaceSizeGranule = Granule512MiB;
 
 /// Constants for indexing the MAIR_EL1.
 #[allow(dead_code)]
-mod mair {
+pub mod mair {
     pub const DEVICE: u64 = 0;
     pub const NORMAL: u64 = 1;
 }
 
-/// Memory Management Unit type.
-struct MemoryManagementUnit;
-
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
-/// The translation tables.
+/// The kernel translation tables.
 ///
 /// # Safety
 ///
 /// - Supposed to land in `.bss`. Therefore, ensure that all initial member values boil down to "0".
-static mut KERNEL_TABLES: ArchTranslationTable = ArchTranslationTable::new();
+static mut KERNEL_TABLES: KernelTranslationTable = KernelTranslationTable::new();
 
 static MMU: MemoryManagementUnit = MemoryManagementUnit;
 
@@ -151,149 +66,37 @@ static MMU: MemoryManagementUnit = MemoryManagementUnit;
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-impl<T, const N: usize> BaseAddr for [T; N] {
-    fn base_addr_u64(&self) -> u64 {
-        self as *const T as u64
-    }
-
-    fn base_addr_usize(&self) -> usize {
-        self as *const _ as usize
-    }
-}
-
-impl convert::From<usize> for TableDescriptor {
-    fn from(next_lvl_table_addr: usize) -> Self {
-        let val = InMemoryRegister::<u64, STAGE1_TABLE_DESCRIPTOR::Register>::new(0);
-
-        let shifted = next_lvl_table_addr >> SIXTYFOUR_KIB_SHIFT;
-        val.write(
-            STAGE1_TABLE_DESCRIPTOR::VALID::True
-                + STAGE1_TABLE_DESCRIPTOR::TYPE::Table
-                + STAGE1_TABLE_DESCRIPTOR::NEXT_LEVEL_TABLE_ADDR_64KiB.val(shifted as u64),
-        );
-
-        TableDescriptor(val.get())
-    }
-}
-
-/// Convert the kernel's generic memory attributes to HW-specific attributes of the MMU.
-impl convert::From<AttributeFields>
-    for register::FieldValue<u64, STAGE1_PAGE_DESCRIPTOR::Register>
-{
-    fn from(attribute_fields: AttributeFields) -> Self {
-        // Memory attributes.
-        let mut desc = match attribute_fields.mem_attributes {
-            MemAttributes::CacheableDRAM => {
-                STAGE1_PAGE_DESCRIPTOR::SH::InnerShareable
-                    + STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(mair::NORMAL)
-            }
-            MemAttributes::Device => {
-                STAGE1_PAGE_DESCRIPTOR::SH::OuterShareable
-                    + STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(mair::DEVICE)
-            }
-        };
-
-        // Access Permissions.
-        desc += match attribute_fields.acc_perms {
-            AccessPermissions::ReadOnly => STAGE1_PAGE_DESCRIPTOR::AP::RO_EL1,
-            AccessPermissions::ReadWrite => STAGE1_PAGE_DESCRIPTOR::AP::RW_EL1,
-        };
-
-        // The execute-never attribute is mapped to PXN in AArch64.
-        desc += if attribute_fields.execute_never {
-            STAGE1_PAGE_DESCRIPTOR::PXN::True
-        } else {
-            STAGE1_PAGE_DESCRIPTOR::PXN::False
-        };
-
-        // Always set unprivileged exectue-never as long as userspace is not implemented yet.
-        desc += STAGE1_PAGE_DESCRIPTOR::UXN::True;
-
-        desc
-    }
-}
-
-impl PageDescriptor {
-    /// Create an instance.
-    fn new(output_addr: usize, attribute_fields: AttributeFields) -> Self {
-        let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
-
-        let shifted = output_addr as u64 >> SIXTYFOUR_KIB_SHIFT;
-        val.write(
-            STAGE1_PAGE_DESCRIPTOR::VALID::True
-                + STAGE1_PAGE_DESCRIPTOR::AF::True
-                + attribute_fields.into()
-                + STAGE1_PAGE_DESCRIPTOR::TYPE::Table
-                + STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted),
-        );
-
-        Self(val.get())
-    }
-}
-
-impl<const NUM_TABLES: usize> FixedSizeTranslationTable<{ NUM_TABLES }> {
-    /// Create an instance.
-    pub const fn new() -> Self {
-        assert!(NUM_TABLES > 0);
-
-        Self {
-            lvl3: [[PageDescriptor(0); 8192]; NUM_TABLES],
-            lvl2: [TableDescriptor(0); NUM_TABLES],
-        }
-    }
-}
-
-/// Setup function for the MAIR_EL1 register.
-fn set_up_mair() {
-    // Define the memory types being mapped.
-    MAIR_EL1.write(
-        // Attribute 1 - Cacheable normal DRAM.
-        MAIR_EL1::Attr1_Normal_Outer::WriteBack_NonTransient_ReadWriteAlloc +
+impl MemoryManagementUnit {
+    /// Setup function for the MAIR_EL1 register.
+    fn set_up_mair(&self) {
+        // Define the memory types being mapped.
+        MAIR_EL1.write(
+            // Attribute 1 - Cacheable normal DRAM.
+            MAIR_EL1::Attr1_Normal_Outer::WriteBack_NonTransient_ReadWriteAlloc +
         MAIR_EL1::Attr1_Normal_Inner::WriteBack_NonTransient_ReadWriteAlloc +
 
         // Attribute 0 - Device.
         MAIR_EL1::Attr0_Device::nonGathering_nonReordering_EarlyWriteAck,
-    );
-}
-
-/// Iterates over all static translation table entries and fills them at once.
-///
-/// # Safety
-///
-/// - Modifies a `static mut`. Ensure it only happens from here.
-unsafe fn populate_tt_entries() -> Result<(), &'static str> {
-    for (l2_nr, l2_entry) in KERNEL_TABLES.lvl2.iter_mut().enumerate() {
-        *l2_entry = KERNEL_TABLES.lvl3[l2_nr].base_addr_usize().into();
-
-        for (l3_nr, l3_entry) in KERNEL_TABLES.lvl3[l2_nr].iter_mut().enumerate() {
-            let virt_addr = (l2_nr << FIVETWELVE_MIB_SHIFT) + (l3_nr << SIXTYFOUR_KIB_SHIFT);
-
-            let (output_addr, attribute_fields) =
-                bsp::memory::mmu::virt_mem_layout().virt_addr_properties(virt_addr)?;
-
-            *l3_entry = PageDescriptor::new(output_addr, attribute_fields);
-        }
+        );
     }
 
-    Ok(())
-}
-
-/// Configure various settings of stage 1 of the EL1 translation regime.
-fn configure_translation_control() {
-    let ips = ID_AA64MMFR0_EL1.read(ID_AA64MMFR0_EL1::PARange);
-    let t0sz: u64 = bsp::memory::mmu::addr_space_size().trailing_zeros().into();
-
-    TCR_EL1.write(
-        TCR_EL1::TBI0::Ignored
-            + TCR_EL1::IPS.val(ips)
-            + TCR_EL1::EPD1::DisableTTBR1Walks
-            + TCR_EL1::TG0::KiB_64
-            + TCR_EL1::SH0::Inner
-            + TCR_EL1::ORGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
-            + TCR_EL1::IRGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
-            + TCR_EL1::EPD0::EnableTTBR0Walks
-            + TCR_EL1::T0SZ.val(t0sz),
-    );
+    /// Configure various settings of stage 1 of the EL1 translation regime.
+    fn configure_translation_control(&self) {
+        let ips = ID_AA64MMFR0_EL1.read(ID_AA64MMFR0_EL1::PARange);
+        let t0sz = (64 - bsp::memory::mmu::KernelAddrSpaceSize::SHIFT) as u64;
+
+        TCR_EL1.write(
+            TCR_EL1::TBI0::Ignored
+                + TCR_EL1::IPS.val(ips)
+                + TCR_EL1::EPD1::DisableTTBR1Walks
+                + TCR_EL1::TG0::KiB_64
+                + TCR_EL1::SH0::Inner
+                + TCR_EL1::ORGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
+                + TCR_EL1::IRGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
+                + TCR_EL1::EPD0::EnableTTBR0Walks
+                + TCR_EL1::T0SZ.val(t0sz),
+        );
+    }
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -317,15 +120,15 @@ impl memory::mmu::interface::MMU for MemoryManagementUnit {
         }
 
         // Prepare the memory attribute indirection register.
-        set_up_mair();
+        self.set_up_mair();
 
         // Populate translation tables.
-        populate_tt_entries()?;
+        KERNEL_TABLES.populate_tt_entries()?;
 
         // Set the "Translation Table Base Register".
-        TTBR0_EL1.set_baddr(KERNEL_TABLES.lvl2.base_addr_u64());
+        TTBR0_EL1.set_baddr(KERNEL_TABLES.base_address());
 
-        configure_translation_control();
+        self.configure_translation_control();
 
         // Switch the MMU on.
         //
@@ -351,24 +154,6 @@ mod tests {
     use super::*;
     use test_macros::kernel_test;
 
-    /// Check if the size of `struct TableDescriptor` is as expected.
-    #[kernel_test]
-    fn size_of_tabledescriptor_equals_64_bit() {
-        assert_eq!(
-            core::mem::size_of::<TableDescriptor>(),
-            core::mem::size_of::<u64>()
-        );
-    }
-
-    /// Check if the size of `struct PageDescriptor` is as expected.
-    #[kernel_test]
-    fn size_of_pagedescriptor_equals_64_bit() {
-        assert_eq!(
-            core::mem::size_of::<PageDescriptor>(),
-            core::mem::size_of::<u64>()
-        );
-    }
-
     /// Check if KERNEL_TABLES is in .bss.
     #[kernel_test]
     fn kernel_tables_in_bss() {
diff --git a/13_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs b/13_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs
new file mode 100644
index 000000000..337f9aedf
--- /dev/null
+++ b/13_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -0,0 +1,316 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural translation table.
+//!
+//! Only 64 KiB granule is supported.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::memory::mmu::translation_table::arch_translation_table
+
+use crate::{
+    bsp, memory,
+    memory::mmu::{
+        arch_mmu::{Granule512MiB, Granule64KiB},
+        AccessPermissions, AttributeFields, MemAttributes,
+    },
+};
+use core::convert;
+use register::{register_bitfields, InMemoryRegister};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+// A table descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-15.
+register_bitfields! {u64,
+    STAGE1_TABLE_DESCRIPTOR [
+        /// Physical address of the next descriptor.
+        NEXT_LEVEL_TABLE_ADDR_64KiB OFFSET(16) NUMBITS(32) [], // [47:16]
+
+        TYPE  OFFSET(1) NUMBITS(1) [
+            Block = 0,
+            Table = 1
+        ],
+
+        VALID OFFSET(0) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ]
+    ]
+}
+
+// A level 3 page descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-17.
+register_bitfields! {u64,
+    STAGE1_PAGE_DESCRIPTOR [
+        /// Unprivileged execute-never.
+        UXN      OFFSET(54) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
+        /// Privileged execute-never.
+        PXN      OFFSET(53) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
+        /// Physical address of the next table descriptor (lvl2) or the page descriptor (lvl3).
+        OUTPUT_ADDR_64KiB OFFSET(16) NUMBITS(32) [], // [47:16]
+
+        /// Access flag.
+        AF       OFFSET(10) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
+        /// Shareability field.
+        SH       OFFSET(8) NUMBITS(2) [
+            OuterShareable = 0b10,
+            InnerShareable = 0b11
+        ],
+
+        /// Access Permissions.
+        AP       OFFSET(6) NUMBITS(2) [
+            RW_EL1 = 0b00,
+            RW_EL1_EL0 = 0b01,
+            RO_EL1 = 0b10,
+            RO_EL1_EL0 = 0b11
+        ],
+
+        /// Memory attributes index into the MAIR_EL1 register.
+        AttrIndx OFFSET(2) NUMBITS(3) [],
+
+        TYPE     OFFSET(1) NUMBITS(1) [
+            Block = 0,
+            Table = 1
+        ],
+
+        VALID    OFFSET(0) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ]
+    ]
+}
+
+/// A table descriptor for 64 KiB aperture.
+///
+/// The output points to the next table.
+#[derive(Copy, Clone)]
+#[repr(C)]
+struct TableDescriptor {
+    value: u64,
+}
+
+/// A page descriptor with 64 KiB aperture.
+///
+/// The output points to physical memory.
+#[derive(Copy, Clone)]
+#[repr(C)]
+struct PageDescriptor {
+    value: u64,
+}
+
+trait BaseAddr {
+    fn base_addr_u64(&self) -> u64;
+    fn base_addr_usize(&self) -> usize;
+}
+
+const NUM_LVL2_TABLES: usize = bsp::memory::mmu::KernelAddrSpaceSize::SIZE >> Granule512MiB::SHIFT;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Big monolithic struct for storing the translation tables. Individual levels must be 64 KiB
+/// aligned, hence the "reverse" order of appearance.
+#[repr(C)]
+#[repr(align(65536))]
+pub struct FixedSizeTranslationTable<const NUM_TABLES: usize> {
+    /// Page descriptors, covering 64 KiB windows per entry.
+    lvl3: [[PageDescriptor; 8192]; NUM_TABLES],
+
+    /// Table descriptors, covering 512 MiB windows.
+    lvl2: [TableDescriptor; NUM_TABLES],
+}
+
+/// A translation table type for the kernel space.
+pub type KernelTranslationTable = FixedSizeTranslationTable<NUM_LVL2_TABLES>;
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl<T, const N: usize> BaseAddr for [T; N] {
+    fn base_addr_u64(&self) -> u64 {
+        self as *const T as u64
+    }
+
+    fn base_addr_usize(&self) -> usize {
+        self as *const _ as usize
+    }
+}
+
+impl TableDescriptor {
+    /// Create an instance.
+    ///
+    /// Descriptor is invalid by default.
+    pub const fn new_zeroed() -> Self {
+        Self { value: 0 }
+    }
+
+    /// Create an instance pointing to the supplied address.
+    pub fn from_next_lvl_table_addr(next_lvl_table_addr: usize) -> Self {
+        let val = InMemoryRegister::<u64, STAGE1_TABLE_DESCRIPTOR::Register>::new(0);
+
+        let shifted = next_lvl_table_addr >> Granule64KiB::SHIFT;
+        val.write(
+            STAGE1_TABLE_DESCRIPTOR::VALID::True
+                + STAGE1_TABLE_DESCRIPTOR::TYPE::Table
+                + STAGE1_TABLE_DESCRIPTOR::NEXT_LEVEL_TABLE_ADDR_64KiB.val(shifted as u64),
+        );
+
+        TableDescriptor { value: val.get() }
+    }
+}
+
+/// Convert the kernel's generic memory attributes to HW-specific attributes of the MMU.
+impl convert::From<AttributeFields>
+    for register::FieldValue<u64, STAGE1_PAGE_DESCRIPTOR::Register>
+{
+    fn from(attribute_fields: AttributeFields) -> Self {
+        // Memory attributes.
+        let mut desc = match attribute_fields.mem_attributes {
+            MemAttributes::CacheableDRAM => {
+                STAGE1_PAGE_DESCRIPTOR::SH::InnerShareable
+                    + STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(memory::mmu::arch_mmu::mair::NORMAL)
+            }
+            MemAttributes::Device => {
+                STAGE1_PAGE_DESCRIPTOR::SH::OuterShareable
+                    + STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(memory::mmu::arch_mmu::mair::DEVICE)
+            }
+        };
+
+        // Access Permissions.
+        desc += match attribute_fields.acc_perms {
+            AccessPermissions::ReadOnly => STAGE1_PAGE_DESCRIPTOR::AP::RO_EL1,
+            AccessPermissions::ReadWrite => STAGE1_PAGE_DESCRIPTOR::AP::RW_EL1,
+        };
+
+        // The execute-never attribute is mapped to PXN in AArch64.
+        desc += if attribute_fields.execute_never {
+            STAGE1_PAGE_DESCRIPTOR::PXN::True
+        } else {
+            STAGE1_PAGE_DESCRIPTOR::PXN::False
+        };
+
+        // Always set unprivileged exectue-never as long as userspace is not implemented yet.
+        desc += STAGE1_PAGE_DESCRIPTOR::UXN::True;
+
+        desc
+    }
+}
+
+impl PageDescriptor {
+    /// Create an instance.
+    ///
+    /// Descriptor is invalid by default.
+    pub const fn new_zeroed() -> Self {
+        Self { value: 0 }
+    }
+
+    /// Create an instance.
+    pub fn from_output_addr(output_addr: usize, attribute_fields: AttributeFields) -> Self {
+        let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
+
+        let shifted = output_addr as u64 >> Granule64KiB::SHIFT;
+        val.write(
+            STAGE1_PAGE_DESCRIPTOR::VALID::True
+                + STAGE1_PAGE_DESCRIPTOR::AF::True
+                + attribute_fields.into()
+                + STAGE1_PAGE_DESCRIPTOR::TYPE::Table
+                + STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted),
+        );
+
+        Self { value: val.get() }
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
+    /// Create an instance.
+    #[allow(clippy::assertions_on_constants)]
+    pub const fn new() -> Self {
+        assert!(NUM_TABLES > 0);
+        assert!((bsp::memory::mmu::KernelAddrSpaceSize::SIZE % Granule512MiB::SIZE) == 0);
+
+        Self {
+            lvl3: [[PageDescriptor::new_zeroed(); 8192]; NUM_TABLES],
+            lvl2: [TableDescriptor::new_zeroed(); NUM_TABLES],
+        }
+    }
+
+    /// Iterates over all static translation table entries and fills them at once.
+    ///
+    /// # Safety
+    ///
+    /// - Modifies a `static mut`. Ensure it only happens from here.
+    pub unsafe fn populate_tt_entries(&mut self) -> Result<(), &'static str> {
+        for (l2_nr, l2_entry) in self.lvl2.iter_mut().enumerate() {
+            *l2_entry =
+                TableDescriptor::from_next_lvl_table_addr(self.lvl3[l2_nr].base_addr_usize());
+
+            for (l3_nr, l3_entry) in self.lvl3[l2_nr].iter_mut().enumerate() {
+                let virt_addr = (l2_nr << Granule512MiB::SHIFT) + (l3_nr << Granule64KiB::SHIFT);
+
+                let (output_addr, attribute_fields) =
+                    bsp::memory::mmu::virt_mem_layout().virt_addr_properties(virt_addr)?;
+
+                *l3_entry = PageDescriptor::from_output_addr(output_addr, attribute_fields);
+            }
+        }
+
+        Ok(())
+    }
+
+    /// The translation table's base address to be used for programming the MMU.
+    pub fn base_address(&self) -> u64 {
+        self.lvl2.base_addr_u64()
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// Check if the size of `struct TableDescriptor` is as expected.
+    #[kernel_test]
+    fn size_of_tabledescriptor_equals_64_bit() {
+        assert_eq!(
+            core::mem::size_of::<TableDescriptor>(),
+            core::mem::size_of::<u64>()
+        );
+    }
+
+    /// Check if the size of `struct PageDescriptor` is as expected.
+    #[kernel_test]
+    fn size_of_pagedescriptor_equals_64_bit() {
+        assert_eq!(
+            core::mem::size_of::<PageDescriptor>(),
+            core::mem::size_of::<u64>()
+        );
+    }
+}
diff --git a/13_integrated_testing/src/_arch/aarch64/time.rs b/13_integrated_testing/src/_arch/aarch64/time.rs
index 7f1bc6963..3a766009d 100644
--- a/13_integrated_testing/src/_arch/aarch64/time.rs
+++ b/13_integrated_testing/src/_arch/aarch64/time.rs
@@ -3,6 +3,13 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::time::arch_time
 
 use crate::{time, warn};
 use core::time::Duration;
@@ -55,7 +62,7 @@ impl time::interface::TimeManager for GenericTimer {
         }
 
         // Calculate the register compare value.
-        let frq = CNTFRQ_EL0.get() as u64;
+        let frq = CNTFRQ_EL0.get();
         let x = match frq.checked_mul(duration.as_nanos() as u64) {
             None => {
                 warn!("Spin duration too long, skipping");
diff --git a/13_integrated_testing/src/bsp.rs b/13_integrated_testing/src/bsp.rs
index 257502491..c558922f7 100644
--- a/13_integrated_testing/src/bsp.rs
+++ b/13_integrated_testing/src/bsp.rs
@@ -2,7 +2,7 @@
 //
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-//! Conditional re-exporting of Board Support Packages.
+//! Conditional reexporting of Board Support Packages.
 
 mod device_driver;
 
diff --git a/13_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs b/13_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs
index 485b8a46a..451d927b6 100644
--- a/13_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs
+++ b/13_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs
@@ -12,13 +12,16 @@ use core::ops::RangeInclusive;
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
+/// The address space size chosen by this BSP.
+pub type KernelAddrSpaceSize = AddressSpaceSize<{ memory_map::END_INCLUSIVE + 1 }>;
+
 const NUM_MEM_RANGES: usize = 2;
 
 /// The virtual memory layout.
 ///
 /// The layout must contain only special ranges, aka anything that is _not_ normal cacheable DRAM.
 /// It is agnostic of the paging granularity that the architecture's MMU will use.
-pub static LAYOUT: KernelVirtualLayout<{ NUM_MEM_RANGES }> = KernelVirtualLayout::new(
+pub static LAYOUT: KernelVirtualLayout<NUM_MEM_RANGES> = KernelVirtualLayout::new(
     memory_map::END_INCLUSIVE,
     [
         TranslationDescriptor {
@@ -62,18 +65,8 @@ fn mmio_range_inclusive() -> RangeInclusive<usize> {
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// Return the address space size in bytes.
-///
-/// Guarantees size to be a power of two.
-pub const fn addr_space_size() -> usize {
-    let size = memory_map::END_INCLUSIVE + 1;
-    assert!(size.is_power_of_two());
-
-    size
-}
-
 /// Return a reference to the virtual memory layout.
-pub fn virt_mem_layout() -> &'static KernelVirtualLayout<{ NUM_MEM_RANGES }> {
+pub fn virt_mem_layout() -> &'static KernelVirtualLayout<NUM_MEM_RANGES> {
     &LAYOUT
 }
 
diff --git a/13_integrated_testing/src/console.rs b/13_integrated_testing/src/console.rs
index 3552823cc..c3154ba23 100644
--- a/13_integrated_testing/src/console.rs
+++ b/13_integrated_testing/src/console.rs
@@ -20,8 +20,7 @@ pub mod interface {
         /// Write a Rust format string.
         fn write_fmt(&self, args: fmt::Arguments) -> fmt::Result;
 
-        /// Block execution until the last buffered character has been physically put on the TX
-        /// wire.
+        /// Block until the last buffered character has been physically put on the TX wire.
         fn flush(&self);
     }
 
diff --git a/13_integrated_testing/src/cpu.rs b/13_integrated_testing/src/cpu.rs
index c9e5af72c..9c8eb6f6e 100644
--- a/13_integrated_testing/src/cpu.rs
+++ b/13_integrated_testing/src/cpu.rs
@@ -7,6 +7,12 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "_arch/aarch64/cpu.rs"]
 mod arch_cpu;
-pub use arch_cpu::*;
+
+mod boot;
 
 pub mod smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_cpu::{nop, qemu_exit_failure, qemu_exit_success, wait_forever};
diff --git a/13_integrated_testing/src/cpu/boot.rs b/13_integrated_testing/src/cpu/boot.rs
new file mode 100644
index 000000000..1dc5c1808
--- /dev/null
+++ b/13_integrated_testing/src/cpu/boot.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Boot code.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/cpu/boot.rs"]
+mod arch_boot;
diff --git a/13_integrated_testing/src/cpu/smp.rs b/13_integrated_testing/src/cpu/smp.rs
index 90ecbdf30..38230ce1e 100644
--- a/13_integrated_testing/src/cpu/smp.rs
+++ b/13_integrated_testing/src/cpu/smp.rs
@@ -6,5 +6,9 @@
 
 #[cfg(target_arch = "aarch64")]
 #[path = "../_arch/aarch64/cpu/smp.rs"]
-mod arch_cpu_smp;
-pub use arch_cpu_smp::*;
+mod arch_smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_smp::core_id;
diff --git a/13_integrated_testing/src/exception.rs b/13_integrated_testing/src/exception.rs
index dfa852a87..3c5e7bc83 100644
--- a/13_integrated_testing/src/exception.rs
+++ b/13_integrated_testing/src/exception.rs
@@ -7,10 +7,14 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "_arch/aarch64/exception.rs"]
 mod arch_exception;
-pub use arch_exception::*;
 
 pub mod asynchronous;
 
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_exception::{current_privilege_level, handling_init};
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
diff --git a/13_integrated_testing/src/exception/asynchronous.rs b/13_integrated_testing/src/exception/asynchronous.rs
index fbdba9579..566efe329 100644
--- a/13_integrated_testing/src/exception/asynchronous.rs
+++ b/13_integrated_testing/src/exception/asynchronous.rs
@@ -6,5 +6,9 @@
 
 #[cfg(target_arch = "aarch64")]
 #[path = "../_arch/aarch64/exception/asynchronous.rs"]
-mod arch_exception_async;
-pub use arch_exception_async::*;
+mod arch_asynchronous;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_asynchronous::print_state;
diff --git a/13_integrated_testing/src/lib.rs b/13_integrated_testing/src/lib.rs
index f958ae5d5..0bc8d3292 100644
--- a/13_integrated_testing/src/lib.rs
+++ b/13_integrated_testing/src/lib.rs
@@ -7,19 +7,7 @@
 
 //! The `kernel` library.
 //!
-//! Used by `main.rs` to compose the final kernel binary.
-//!
-//! # TL;DR - Overview of important Kernel entities
-//!
-//! - [`bsp::console::console()`] - Returns a reference to the kernel's [console interface].
-//! - [`bsp::driver::driver_manager()`] - Returns a reference to the kernel's [driver interface].
-//! - [`memory::mmu::mmu()`] - Returns a reference to the kernel's [MMU interface].
-//! - [`time::time_manager()`] - Returns a reference to the kernel's [timer interface].
-//!
-//! [console interface]: ../libkernel/console/interface/index.html
-//! [driver interface]: ../libkernel/driver/interface/trait.DriverManager.html
-//! [MMU interface]: ../libkernel/memory/mmu/interface/trait.MMU.html
-//! [timer interface]: ../libkernel/time/interface/trait.TimeManager.html
+//! Used to compose the final kernel binary.
 //!
 //! # Code organization and architecture
 //!
@@ -34,15 +22,22 @@
 //! `src/_arch`, for example, `src/_arch/aarch64`.
 //!
 //! The architecture folders mirror the subsystem modules laid out in `src`. For example,
-//! architectural code that belongs to the `kernel`'s memory subsystem (`src/memory.rs`) would go
-//! into `src/_arch/aarch64/memory.rs`. The latter file is directly included and re-exported in
-//! `src/memory.rs`, so that the architectural code parts are transparent with respect to the code's
-//! module organization. That means a public function `foo()` defined in
-//! `src/_arch/aarch64/memory.rs` would be reachable as `crate::memory::foo()` only.
+//! architectural code that belongs to the `kernel`'s MMU subsystem (`src/memory/mmu.rs`) would go
+//! into `src/_arch/aarch64/memory/mmu.rs`. The latter file is loaded as a module in
+//! `src/memory/mmu.rs` using the `path attribute`. Usually, the chosen module name is the generic
+//! module's name prefixed with `arch_`.
 //!
-//! The `_` in `_arch` denotes that this folder is not part of the standard module hierarchy.
-//! Rather, it's contents are conditionally pulled into respective files using the `#[path =
-//! "_arch/xxx/yyy.rs"]` attribute.
+//! For example, this is the top of `src/memory/mmu.rs`:
+//!
+//! ```
+//! #[cfg(target_arch = "aarch64")]
+//! #[path = "../_arch/aarch64/memory/mmu.rs"]
+//! mod arch_mmu;
+//! ```
+//!
+//! Often times, items from the `arch_ module` will be publicly reexported by the parent module.
+//! This way, each architecture specific module can provide its implementation of an item, while the
+//! caller must not be concerned which architecture has been conditionally compiled.
 //!
 //! ## BSP code
 //!
@@ -51,9 +46,8 @@
 //! or instances of drivers for devices that are featured on the respective board.
 //!
 //! Just like processor architecture code, the `BSP` code's module structure tries to mirror the
-//! `kernel`'s subsystem modules, but there is no transparent re-exporting this time. That means
-//! whatever is provided must be called starting from the `bsp` namespace, e.g.
-//! `bsp::driver::driver_manager()`.
+//! `kernel`'s subsystem modules, but there is no reexporting this time. That means whatever is
+//! provided must be called starting from the `bsp` namespace, e.g. `bsp::driver::driver_manager()`.
 //!
 //! ## Kernel interfaces
 //!
@@ -105,6 +99,14 @@
 //!
 //! - `crate::memory::*`
 //! - `crate::bsp::memory::*`
+//!
+//! # Boot flow
+//!
+//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
+//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
+//!
+//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 
 #![allow(incomplete_features)]
 #![feature(const_fn_fn_ptr_basics)]
@@ -122,9 +124,6 @@
 #![reexport_test_harness_main = "test_main"]
 #![test_runner(crate::test_runner)]
 
-// `mod cpu` provides the `_start()` function, the first function to run. `_start()` then calls
-// `runtime_init()`, which jumps to `kernel_init()` (defined in `main.rs`).
-
 mod panic_wait;
 mod runtime_init;
 mod synchronization;
diff --git a/13_integrated_testing/src/memory/mmu.rs b/13_integrated_testing/src/memory/mmu.rs
index 163419ec0..cca2951aa 100644
--- a/13_integrated_testing/src/memory/mmu.rs
+++ b/13_integrated_testing/src/memory/mmu.rs
@@ -5,8 +5,8 @@
 //! Memory Management Unit.
 //!
 //! In order to decouple `BSP` and `arch` parts of the MMU code (to keep them pluggable), this file
-//! provides types for composing an architecture-agnostic description of the kernel 's virtual
-//! memory layout.
+//! provides types for composing an architecture-agnostic description of the kernel's virtual memory
+//! layout.
 //!
 //! The `BSP` provides such a description through the `bsp::memory::mmu::virt_mem_layout()`
 //! function.
@@ -17,10 +17,16 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "../_arch/aarch64/memory/mmu.rs"]
 mod arch_mmu;
-pub use arch_mmu::*;
+
+mod translation_table;
 
 use core::{fmt, ops::RangeInclusive};
 
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_mmu::mmu;
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -40,6 +46,12 @@ pub mod interface {
     }
 }
 
+/// Describes the characteristics of a translation granule.
+pub struct TranslationGranule<const GRANULE_SIZE: usize>;
+
+/// Describes the size of an address space.
+pub struct AddressSpaceSize<const AS_SIZE: usize>;
+
 /// Architecture agnostic translation types.
 #[allow(missing_docs)]
 #[derive(Copy, Clone)]
@@ -95,6 +107,41 @@ pub struct KernelVirtualLayout<const NUM_SPECIAL_RANGES: usize> {
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
+impl<const GRANULE_SIZE: usize> TranslationGranule<GRANULE_SIZE> {
+    /// The granule's size.
+    pub const SIZE: usize = Self::size_checked();
+
+    /// The granule's shift, aka log2(size).
+    pub const SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
+
+    const fn size_checked() -> usize {
+        assert!(GRANULE_SIZE.is_power_of_two());
+
+        GRANULE_SIZE
+    }
+}
+
+impl<const AS_SIZE: usize> AddressSpaceSize<AS_SIZE> {
+    /// The address space size.
+    pub const SIZE: usize = Self::size_checked();
+
+    /// The address space shift, aka log2(size).
+    pub const SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
+
+    const fn size_checked() -> usize {
+        assert!(AS_SIZE.is_power_of_two());
+        assert!(arch_mmu::MIN_ADDR_SPACE_SIZE.is_power_of_two());
+        assert!(arch_mmu::MAX_ADDR_SPACE_SIZE.is_power_of_two());
+
+        // Must adhere to architectural restrictions.
+        assert!(AS_SIZE >= arch_mmu::MIN_ADDR_SPACE_SIZE);
+        assert!(AS_SIZE <= arch_mmu::MAX_ADDR_SPACE_SIZE);
+        assert!((AS_SIZE % arch_mmu::AddrSpaceSizeGranule::SIZE) == 0);
+
+        AS_SIZE
+    }
+}
+
 impl Default for AttributeFields {
     fn default() -> AttributeFields {
         AttributeFields {
diff --git a/13_integrated_testing/src/memory/mmu/translation_table.rs b/13_integrated_testing/src/memory/mmu/translation_table.rs
new file mode 100644
index 000000000..bbb6f9394
--- /dev/null
+++ b/13_integrated_testing/src/memory/mmu/translation_table.rs
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Translation table.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../../_arch/aarch64/memory/mmu/translation_table.rs"]
+mod arch_translation_table;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_translation_table::KernelTranslationTable;
diff --git a/13_integrated_testing/src/print.rs b/13_integrated_testing/src/print.rs
index 1ea96b6ad..5a5638113 100644
--- a/13_integrated_testing/src/print.rs
+++ b/13_integrated_testing/src/print.rs
@@ -2,7 +2,7 @@
 //
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-//! Printing facilities.
+//! Printing.
 
 use crate::{bsp, console};
 use core::fmt;
diff --git a/13_integrated_testing/src/time.rs b/13_integrated_testing/src/time.rs
index 4f2f4e38f..953b6f0df 100644
--- a/13_integrated_testing/src/time.rs
+++ b/13_integrated_testing/src/time.rs
@@ -7,7 +7,11 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "_arch/aarch64/time.rs"]
 mod arch_time;
-pub use arch_time::*;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_time::time_manager;
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -18,8 +22,6 @@ pub mod interface {
     use core::time::Duration;
 
     /// Time management functions.
-    ///
-    /// The `BSP` is supposed to supply one global instance.
     pub trait TimeManager {
         /// The timer's resolution.
         fn resolution(&self) -> Duration;
diff --git a/14_exceptions_part2_peripheral_IRQs/README.md b/14_exceptions_part2_peripheral_IRQs/README.md
index 8e68edcb8..2c74961d9 100644
--- a/14_exceptions_part2_peripheral_IRQs/README.md
+++ b/14_exceptions_part2_peripheral_IRQs/README.md
@@ -744,25 +744,10 @@ Minipush 1.0
 ## Diff to previous
 ```diff
 
-diff -uNr 13_integrated_testing/Makefile 14_exceptions_part2_peripheral_IRQs/Makefile
---- 13_integrated_testing/Makefile
-+++ 14_exceptions_part2_peripheral_IRQs/Makefile
-@@ -57,8 +57,9 @@
- RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
- RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
-
-+FEATURES      = bsp_$(BSP)
- COMPILER_ARGS = --target=$(TARGET) \
--    --features bsp_$(BSP)          \
-+    --features $(FEATURES)         \
-     --release
-
- RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
-
 diff -uNr 13_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs
 --- 13_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs
 +++ 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs
-@@ -10,6 +10,10 @@
+@@ -17,6 +17,10 @@
  // Private Definitions
  //--------------------------------------------------------------------------------------------------
 
@@ -773,7 +758,7 @@ diff -uNr 13_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs 14_e
  trait DaifField {
      fn daif_field() -> register::Field<u64, DAIF::Register>;
  }
-@@ -58,6 +62,71 @@
+@@ -65,6 +69,71 @@
  // Public Code
  //--------------------------------------------------------------------------------------------------
 
@@ -849,15 +834,15 @@ diff -uNr 13_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs 14_e
 diff -uNr 13_integrated_testing/src/_arch/aarch64/exception.rs 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
 --- 13_integrated_testing/src/_arch/aarch64/exception.rs
 +++ 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
-@@ -4,6 +4,7 @@
-
- //! Architectural synchronous and asynchronous exception handling.
+@@ -11,6 +11,7 @@
+ //!
+ //! crate::exception::arch_exception
 
 +use crate::{bsp, exception};
  use core::{cell::UnsafeCell, fmt};
  use cortex_a::{barrier, regs::*};
  use register::InMemoryRegister;
-@@ -84,8 +85,11 @@
+@@ -91,8 +92,11 @@
  }
 
  #[no_mangle]
@@ -2156,12 +2141,20 @@ diff -uNr 13_integrated_testing/src/driver.rs 14_exceptions_part2_peripheral_IRQ
 diff -uNr 13_integrated_testing/src/exception/asynchronous.rs 14_exceptions_part2_peripheral_IRQs/src/exception/asynchronous.rs
 --- 13_integrated_testing/src/exception/asynchronous.rs
 +++ 14_exceptions_part2_peripheral_IRQs/src/exception/asynchronous.rs
-@@ -8,3 +8,138 @@
+@@ -8,7 +8,145 @@
  #[path = "../_arch/aarch64/exception/asynchronous.rs"]
- mod arch_exception_async;
- pub use arch_exception_async::*;
-+
+ mod arch_asynchronous;
+
 +use core::{fmt, marker::PhantomData};
++
+ //--------------------------------------------------------------------------------------------------
+ // Architectural Public Reexports
+ //--------------------------------------------------------------------------------------------------
+-pub use arch_asynchronous::print_state;
++pub use arch_asynchronous::{
++    is_local_irq_masked, local_irq_mask, local_irq_mask_save, local_irq_restore, local_irq_unmask,
++    print_state,
++};
 +
 +//--------------------------------------------------------------------------------------------------
 +// Public Definitions
@@ -2268,7 +2261,7 @@ diff -uNr 13_integrated_testing/src/exception/asynchronous.rs 14_exceptions_part
 +    }
 +
 +    /// Return the wrapped number.
-+    pub fn get(self) -> usize {
++    pub const fn get(self) -> usize {
 +        self.0
 +    }
 +}
@@ -2299,26 +2292,8 @@ diff -uNr 13_integrated_testing/src/exception/asynchronous.rs 14_exceptions_part
 diff -uNr 13_integrated_testing/src/lib.rs 14_exceptions_part2_peripheral_IRQs/src/lib.rs
 --- 13_integrated_testing/src/lib.rs
 +++ 14_exceptions_part2_peripheral_IRQs/src/lib.rs
-@@ -13,12 +13,17 @@
- //!
- //! - [`bsp::console::console()`] - Returns a reference to the kernel's [console interface].
- //! - [`bsp::driver::driver_manager()`] - Returns a reference to the kernel's [driver interface].
-+//! - [`bsp::exception::asynchronous::irq_manager()`] - Returns a reference to the kernel's [IRQ
-+//!   Handling interface].
- //! - [`memory::mmu::mmu()`] - Returns a reference to the kernel's [MMU interface].
-+//! - [`state::state_manager()`] - Returns a reference to the kernel's [state management] instance.
- //! - [`time::time_manager()`] - Returns a reference to the kernel's [timer interface].
- //!
- //! [console interface]: ../libkernel/console/interface/index.html
- //! [driver interface]: ../libkernel/driver/interface/trait.DriverManager.html
-+//! [IRQ Handling interface]: ../libkernel/exception/asynchronous/interface/trait.IRQManager.html
- //! [MMU interface]: ../libkernel/memory/mmu/interface/trait.MMU.html
-+//! [state management]: ../libkernel/state/struct.StateManager.html
- //! [timer interface]: ../libkernel/time/interface/trait.TimeManager.html
- //!
- //! # Code organization and architecture
-@@ -107,9 +112,11 @@
- //! - `crate::bsp::memory::*`
+@@ -109,9 +109,11 @@
+ //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 
  #![allow(incomplete_features)]
 +#![feature(asm)]
@@ -2329,7 +2304,7 @@ diff -uNr 13_integrated_testing/src/lib.rs 14_exceptions_part2_peripheral_IRQs/s
  #![feature(format_args_nl)]
  #![feature(global_asm)]
  #![feature(linkage)]
-@@ -136,6 +143,7 @@
+@@ -135,6 +137,7 @@
  pub mod exception;
  pub mod memory;
  pub mod print;
@@ -2506,7 +2481,7 @@ diff -uNr 13_integrated_testing/src/state.rs 14_exceptions_part2_peripheral_IRQs
 +        }
 +    }
 +
-+    /// Return if the kernel is still in an init state.
++    /// Return if the kernel is init state.
 +    pub fn is_init(&self) -> bool {
 +        self.state() == State::Init
 +    }
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu.rs b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu.rs
index 491f17ca8..948bad747 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu.rs
@@ -3,79 +3,15 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
-
-use crate::{bsp, cpu};
-use cortex_a::{asm, regs::*};
-
-//--------------------------------------------------------------------------------------------------
-// Boot Code
-//--------------------------------------------------------------------------------------------------
-
-/// The entry of the `kernel` binary.
-///
-/// The function must be named `_start`, because the linker is looking for this exact name.
-///
-/// # Safety
-///
-/// - Linker script must ensure to place this function where it is expected by the target machine.
-/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
-///   a stack for EL2.
-#[no_mangle]
-pub unsafe fn _start() -> ! {
-    // Expect the boot core to start in EL2.
-    if (bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id())
-        && (CurrentEL.get() == CurrentEL::EL::EL2.value)
-    {
-        el2_to_el1_transition()
-    } else {
-        // If not core0, infinitely wait for events.
-        wait_forever()
-    }
-}
-
-/// Transition from EL2 to EL1.
-///
-/// # Safety
-///
-/// - The HW state of EL1 must be prepared in a sound way.
-/// - Exception return from EL2 must must continue execution in EL1 with
-///   `runtime_init::runtime_init()`.
-/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
-///   a stack for EL2.
-#[inline(always)]
-unsafe fn el2_to_el1_transition() -> ! {
-    use crate::runtime_init;
-
-    // Enable timer counter registers for EL1.
-    CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
-
-    // No offset for reading the counters.
-    CNTVOFF_EL2.set(0);
-
-    // Set EL1 execution state to AArch64.
-    HCR_EL2.write(HCR_EL2::RW::EL1IsAarch64);
-
-    // Set up a simulated exception return.
-    //
-    // First, fake a saved program status where all interrupts were masked and SP_EL1 was used as a
-    // stack pointer.
-    SPSR_EL2.write(
-        SPSR_EL2::D::Masked
-            + SPSR_EL2::A::Masked
-            + SPSR_EL2::I::Masked
-            + SPSR_EL2::F::Masked
-            + SPSR_EL2::M::EL1h,
-    );
-
-    // Second, let the link register point to runtime_init().
-    ELR_EL2.set(runtime_init::runtime_init as *const () as u64);
-
-    // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it.
-    SP_EL1.set(bsp::memory::boot_core_stack_end() as u64);
-
-    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
-    asm::eret()
-}
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::arch_cpu
+
+use cortex_a::asm;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.rs b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.rs
new file mode 100644
index 000000000..c2f5fe0b7
--- /dev/null
+++ b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.rs
@@ -0,0 +1,89 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural boot code.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::boot::arch_boot
+
+use crate::{bsp, cpu};
+use cortex_a::{asm, regs::*};
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// Transition from EL2 to EL1.
+///
+/// # Safety
+///
+/// - The HW state of EL1 must be prepared in a sound way.
+/// - Exception return from EL2 must must continue execution in EL1 with
+///   `runtime_init::runtime_init()`.
+/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
+///   a stack for EL2.
+#[inline(always)]
+unsafe fn el2_to_el1_transition() -> ! {
+    use crate::runtime_init;
+
+    // Enable timer counter registers for EL1.
+    CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
+
+    // No offset for reading the counters.
+    CNTVOFF_EL2.set(0);
+
+    // Set EL1 execution state to AArch64.
+    HCR_EL2.write(HCR_EL2::RW::EL1IsAarch64);
+
+    // Set up a simulated exception return.
+    //
+    // First, fake a saved program status where all interrupts were masked and SP_EL1 was used as a
+    // stack pointer.
+    SPSR_EL2.write(
+        SPSR_EL2::D::Masked
+            + SPSR_EL2::A::Masked
+            + SPSR_EL2::I::Masked
+            + SPSR_EL2::F::Masked
+            + SPSR_EL2::M::EL1h,
+    );
+
+    // Second, let the link register point to runtime_init().
+    ELR_EL2.set(runtime_init::runtime_init as *const () as u64);
+
+    // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it.
+    SP_EL1.set(bsp::memory::boot_core_stack_end() as u64);
+
+    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
+    asm::eret()
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The entry of the `kernel` binary.
+///
+/// The function must be named `_start`, because the linker is looking for this exact name.
+///
+/// # Safety
+///
+/// - Linker script must ensure to place this function where it is expected by the target machine.
+/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
+///   a stack for EL2.
+#[no_mangle]
+pub unsafe fn _start() -> ! {
+    // Expect the boot core to start in EL2.
+    if (bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id())
+        && (CurrentEL.get() == CurrentEL::EL::EL2.value)
+    {
+        el2_to_el1_transition()
+    } else {
+        // If not core0, infinitely wait for events.
+        cpu::wait_forever()
+    }
+}
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs
index c80f7e780..b9fdd0f73 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs
@@ -3,6 +3,13 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::smp::arch_smp
 
 use cortex_a::regs::*;
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
index 99fbd85bd..5cf9eb5ca 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
@@ -3,6 +3,13 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural synchronous and asynchronous exception handling.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::exception::arch_exception
 
 use crate::{bsp, exception};
 use core::{cell::UnsafeCell, fmt};
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs
index 968eedf34..a4b1a548e 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs
@@ -3,6 +3,13 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural asynchronous exception handling.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::exception::asynchronous::arch_asynchronous
 
 use cortex_a::regs::*;
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
index 9b658e864..42ba0519b 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
@@ -4,146 +4,61 @@
 
 //! Memory Management Unit Driver.
 //!
-//! Static translation tables, compiled on boot; Everything 64 KiB granule.
+//! Only 64 KiB granule is supported.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::memory::mmu::arch_mmu
 
-use super::{AccessPermissions, AttributeFields, MemAttributes};
-use crate::{bsp, memory};
-use core::convert;
+use crate::{
+    bsp, memory,
+    memory::mmu::{translation_table::KernelTranslationTable, TranslationGranule},
+};
 use cortex_a::{barrier, regs::*};
-use register::{register_bitfields, InMemoryRegister};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
-// A table descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-15.
-register_bitfields! {u64,
-    STAGE1_TABLE_DESCRIPTOR [
-        /// Physical address of the next descriptor.
-        NEXT_LEVEL_TABLE_ADDR_64KiB OFFSET(16) NUMBITS(32) [], // [47:16]
-
-        TYPE  OFFSET(1) NUMBITS(1) [
-            Block = 0,
-            Table = 1
-        ],
-
-        VALID OFFSET(0) NUMBITS(1) [
-            False = 0,
-            True = 1
-        ]
-    ]
-}
-
-// A level 3 page descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-17.
-register_bitfields! {u64,
-    STAGE1_PAGE_DESCRIPTOR [
-        /// Unprivileged execute-never.
-        UXN      OFFSET(54) NUMBITS(1) [
-            False = 0,
-            True = 1
-        ],
-
-        /// Privileged execute-never.
-        PXN      OFFSET(53) NUMBITS(1) [
-            False = 0,
-            True = 1
-        ],
-
-        /// Physical address of the next table descriptor (lvl2) or the page descriptor (lvl3).
-        OUTPUT_ADDR_64KiB OFFSET(16) NUMBITS(32) [], // [47:16]
-
-        /// Access flag.
-        AF       OFFSET(10) NUMBITS(1) [
-            False = 0,
-            True = 1
-        ],
-
-        /// Shareability field.
-        SH       OFFSET(8) NUMBITS(2) [
-            OuterShareable = 0b10,
-            InnerShareable = 0b11
-        ],
-
-        /// Access Permissions.
-        AP       OFFSET(6) NUMBITS(2) [
-            RW_EL1 = 0b00,
-            RW_EL1_EL0 = 0b01,
-            RO_EL1 = 0b10,
-            RO_EL1_EL0 = 0b11
-        ],
-
-        /// Memory attributes index into the MAIR_EL1 register.
-        AttrIndx OFFSET(2) NUMBITS(3) [],
-
-        TYPE     OFFSET(1) NUMBITS(1) [
-            Block = 0,
-            Table = 1
-        ],
-
-        VALID    OFFSET(0) NUMBITS(1) [
-            False = 0,
-            True = 1
-        ]
-    ]
-}
+/// Memory Management Unit type.
+struct MemoryManagementUnit;
 
-const SIXTYFOUR_KIB_SHIFT: usize = 16; //  log2(64 * 1024)
-const FIVETWELVE_MIB_SHIFT: usize = 29; // log2(512 * 1024 * 1024)
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
 
-/// A table descriptor for 64 KiB aperture.
-///
-/// The output points to the next table.
-#[derive(Copy, Clone)]
-#[repr(transparent)]
-struct TableDescriptor(u64);
+pub type Granule512MiB = TranslationGranule<{ 512 * 1024 * 1024 }>;
+pub type Granule64KiB = TranslationGranule<{ 64 * 1024 }>;
 
-/// A page descriptor with 64 KiB aperture.
-///
-/// The output points to physical memory.
-#[derive(Copy, Clone)]
-#[repr(transparent)]
-struct PageDescriptor(u64);
-
-/// Big monolithic struct for storing the translation tables. Individual levels must be 64 KiB
-/// aligned, hence the "reverse" order of appearance.
-#[repr(C)]
-#[repr(align(65536))]
-struct FixedSizeTranslationTable<const NUM_TABLES: usize> {
-    /// Page descriptors, covering 64 KiB windows per entry.
-    lvl3: [[PageDescriptor; 8192]; NUM_TABLES],
-
-    /// Table descriptors, covering 512 MiB windows.
-    lvl2: [TableDescriptor; NUM_TABLES],
-}
+/// The min supported address space size.
+pub const MIN_ADDR_SPACE_SIZE: usize = 1024 * 1024 * 1024; // 1 GiB
 
-const NUM_LVL2_TABLES: usize = bsp::memory::mmu::addr_space_size() >> FIVETWELVE_MIB_SHIFT;
-type ArchTranslationTable = FixedSizeTranslationTable<NUM_LVL2_TABLES>;
+/// The max supported address space size.
+pub const MAX_ADDR_SPACE_SIZE: usize = 32 * 1024 * 1024 * 1024; // 32 GiB
 
-trait BaseAddr {
-    fn base_addr_u64(&self) -> u64;
-    fn base_addr_usize(&self) -> usize;
-}
+/// The supported address space size granule.
+pub type AddrSpaceSizeGranule = Granule512MiB;
 
 /// Constants for indexing the MAIR_EL1.
 #[allow(dead_code)]
-mod mair {
+pub mod mair {
     pub const DEVICE: u64 = 0;
     pub const NORMAL: u64 = 1;
 }
 
-/// Memory Management Unit type.
-struct MemoryManagementUnit;
-
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
-/// The translation tables.
+/// The kernel translation tables.
 ///
 /// # Safety
 ///
 /// - Supposed to land in `.bss`. Therefore, ensure that all initial member values boil down to "0".
-static mut KERNEL_TABLES: ArchTranslationTable = ArchTranslationTable::new();
+static mut KERNEL_TABLES: KernelTranslationTable = KernelTranslationTable::new();
 
 static MMU: MemoryManagementUnit = MemoryManagementUnit;
 
@@ -151,149 +66,37 @@ static MMU: MemoryManagementUnit = MemoryManagementUnit;
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-impl<T, const N: usize> BaseAddr for [T; N] {
-    fn base_addr_u64(&self) -> u64 {
-        self as *const T as u64
-    }
-
-    fn base_addr_usize(&self) -> usize {
-        self as *const _ as usize
-    }
-}
-
-impl convert::From<usize> for TableDescriptor {
-    fn from(next_lvl_table_addr: usize) -> Self {
-        let val = InMemoryRegister::<u64, STAGE1_TABLE_DESCRIPTOR::Register>::new(0);
-
-        let shifted = next_lvl_table_addr >> SIXTYFOUR_KIB_SHIFT;
-        val.write(
-            STAGE1_TABLE_DESCRIPTOR::VALID::True
-                + STAGE1_TABLE_DESCRIPTOR::TYPE::Table
-                + STAGE1_TABLE_DESCRIPTOR::NEXT_LEVEL_TABLE_ADDR_64KiB.val(shifted as u64),
-        );
-
-        TableDescriptor(val.get())
-    }
-}
-
-/// Convert the kernel's generic memory attributes to HW-specific attributes of the MMU.
-impl convert::From<AttributeFields>
-    for register::FieldValue<u64, STAGE1_PAGE_DESCRIPTOR::Register>
-{
-    fn from(attribute_fields: AttributeFields) -> Self {
-        // Memory attributes.
-        let mut desc = match attribute_fields.mem_attributes {
-            MemAttributes::CacheableDRAM => {
-                STAGE1_PAGE_DESCRIPTOR::SH::InnerShareable
-                    + STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(mair::NORMAL)
-            }
-            MemAttributes::Device => {
-                STAGE1_PAGE_DESCRIPTOR::SH::OuterShareable
-                    + STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(mair::DEVICE)
-            }
-        };
-
-        // Access Permissions.
-        desc += match attribute_fields.acc_perms {
-            AccessPermissions::ReadOnly => STAGE1_PAGE_DESCRIPTOR::AP::RO_EL1,
-            AccessPermissions::ReadWrite => STAGE1_PAGE_DESCRIPTOR::AP::RW_EL1,
-        };
-
-        // The execute-never attribute is mapped to PXN in AArch64.
-        desc += if attribute_fields.execute_never {
-            STAGE1_PAGE_DESCRIPTOR::PXN::True
-        } else {
-            STAGE1_PAGE_DESCRIPTOR::PXN::False
-        };
-
-        // Always set unprivileged exectue-never as long as userspace is not implemented yet.
-        desc += STAGE1_PAGE_DESCRIPTOR::UXN::True;
-
-        desc
-    }
-}
-
-impl PageDescriptor {
-    /// Create an instance.
-    fn new(output_addr: usize, attribute_fields: AttributeFields) -> Self {
-        let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
-
-        let shifted = output_addr as u64 >> SIXTYFOUR_KIB_SHIFT;
-        val.write(
-            STAGE1_PAGE_DESCRIPTOR::VALID::True
-                + STAGE1_PAGE_DESCRIPTOR::AF::True
-                + attribute_fields.into()
-                + STAGE1_PAGE_DESCRIPTOR::TYPE::Table
-                + STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted),
-        );
-
-        Self(val.get())
-    }
-}
-
-impl<const NUM_TABLES: usize> FixedSizeTranslationTable<{ NUM_TABLES }> {
-    /// Create an instance.
-    pub const fn new() -> Self {
-        assert!(NUM_TABLES > 0);
-
-        Self {
-            lvl3: [[PageDescriptor(0); 8192]; NUM_TABLES],
-            lvl2: [TableDescriptor(0); NUM_TABLES],
-        }
-    }
-}
-
-/// Setup function for the MAIR_EL1 register.
-fn set_up_mair() {
-    // Define the memory types being mapped.
-    MAIR_EL1.write(
-        // Attribute 1 - Cacheable normal DRAM.
-        MAIR_EL1::Attr1_Normal_Outer::WriteBack_NonTransient_ReadWriteAlloc +
+impl MemoryManagementUnit {
+    /// Setup function for the MAIR_EL1 register.
+    fn set_up_mair(&self) {
+        // Define the memory types being mapped.
+        MAIR_EL1.write(
+            // Attribute 1 - Cacheable normal DRAM.
+            MAIR_EL1::Attr1_Normal_Outer::WriteBack_NonTransient_ReadWriteAlloc +
         MAIR_EL1::Attr1_Normal_Inner::WriteBack_NonTransient_ReadWriteAlloc +
 
         // Attribute 0 - Device.
         MAIR_EL1::Attr0_Device::nonGathering_nonReordering_EarlyWriteAck,
-    );
-}
-
-/// Iterates over all static translation table entries and fills them at once.
-///
-/// # Safety
-///
-/// - Modifies a `static mut`. Ensure it only happens from here.
-unsafe fn populate_tt_entries() -> Result<(), &'static str> {
-    for (l2_nr, l2_entry) in KERNEL_TABLES.lvl2.iter_mut().enumerate() {
-        *l2_entry = KERNEL_TABLES.lvl3[l2_nr].base_addr_usize().into();
-
-        for (l3_nr, l3_entry) in KERNEL_TABLES.lvl3[l2_nr].iter_mut().enumerate() {
-            let virt_addr = (l2_nr << FIVETWELVE_MIB_SHIFT) + (l3_nr << SIXTYFOUR_KIB_SHIFT);
-
-            let (output_addr, attribute_fields) =
-                bsp::memory::mmu::virt_mem_layout().virt_addr_properties(virt_addr)?;
-
-            *l3_entry = PageDescriptor::new(output_addr, attribute_fields);
-        }
+        );
     }
 
-    Ok(())
-}
-
-/// Configure various settings of stage 1 of the EL1 translation regime.
-fn configure_translation_control() {
-    let ips = ID_AA64MMFR0_EL1.read(ID_AA64MMFR0_EL1::PARange);
-    let t0sz: u64 = bsp::memory::mmu::addr_space_size().trailing_zeros().into();
-
-    TCR_EL1.write(
-        TCR_EL1::TBI0::Ignored
-            + TCR_EL1::IPS.val(ips)
-            + TCR_EL1::EPD1::DisableTTBR1Walks
-            + TCR_EL1::TG0::KiB_64
-            + TCR_EL1::SH0::Inner
-            + TCR_EL1::ORGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
-            + TCR_EL1::IRGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
-            + TCR_EL1::EPD0::EnableTTBR0Walks
-            + TCR_EL1::T0SZ.val(t0sz),
-    );
+    /// Configure various settings of stage 1 of the EL1 translation regime.
+    fn configure_translation_control(&self) {
+        let ips = ID_AA64MMFR0_EL1.read(ID_AA64MMFR0_EL1::PARange);
+        let t0sz = (64 - bsp::memory::mmu::KernelAddrSpaceSize::SHIFT) as u64;
+
+        TCR_EL1.write(
+            TCR_EL1::TBI0::Ignored
+                + TCR_EL1::IPS.val(ips)
+                + TCR_EL1::EPD1::DisableTTBR1Walks
+                + TCR_EL1::TG0::KiB_64
+                + TCR_EL1::SH0::Inner
+                + TCR_EL1::ORGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
+                + TCR_EL1::IRGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
+                + TCR_EL1::EPD0::EnableTTBR0Walks
+                + TCR_EL1::T0SZ.val(t0sz),
+        );
+    }
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -317,15 +120,15 @@ impl memory::mmu::interface::MMU for MemoryManagementUnit {
         }
 
         // Prepare the memory attribute indirection register.
-        set_up_mair();
+        self.set_up_mair();
 
         // Populate translation tables.
-        populate_tt_entries()?;
+        KERNEL_TABLES.populate_tt_entries()?;
 
         // Set the "Translation Table Base Register".
-        TTBR0_EL1.set_baddr(KERNEL_TABLES.lvl2.base_addr_u64());
+        TTBR0_EL1.set_baddr(KERNEL_TABLES.base_address());
 
-        configure_translation_control();
+        self.configure_translation_control();
 
         // Switch the MMU on.
         //
@@ -351,24 +154,6 @@ mod tests {
     use super::*;
     use test_macros::kernel_test;
 
-    /// Check if the size of `struct TableDescriptor` is as expected.
-    #[kernel_test]
-    fn size_of_tabledescriptor_equals_64_bit() {
-        assert_eq!(
-            core::mem::size_of::<TableDescriptor>(),
-            core::mem::size_of::<u64>()
-        );
-    }
-
-    /// Check if the size of `struct PageDescriptor` is as expected.
-    #[kernel_test]
-    fn size_of_pagedescriptor_equals_64_bit() {
-        assert_eq!(
-            core::mem::size_of::<PageDescriptor>(),
-            core::mem::size_of::<u64>()
-        );
-    }
-
     /// Check if KERNEL_TABLES is in .bss.
     #[kernel_test]
     fn kernel_tables_in_bss() {
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs
new file mode 100644
index 000000000..337f9aedf
--- /dev/null
+++ b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -0,0 +1,316 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural translation table.
+//!
+//! Only 64 KiB granule is supported.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::memory::mmu::translation_table::arch_translation_table
+
+use crate::{
+    bsp, memory,
+    memory::mmu::{
+        arch_mmu::{Granule512MiB, Granule64KiB},
+        AccessPermissions, AttributeFields, MemAttributes,
+    },
+};
+use core::convert;
+use register::{register_bitfields, InMemoryRegister};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+// A table descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-15.
+register_bitfields! {u64,
+    STAGE1_TABLE_DESCRIPTOR [
+        /// Physical address of the next descriptor.
+        NEXT_LEVEL_TABLE_ADDR_64KiB OFFSET(16) NUMBITS(32) [], // [47:16]
+
+        TYPE  OFFSET(1) NUMBITS(1) [
+            Block = 0,
+            Table = 1
+        ],
+
+        VALID OFFSET(0) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ]
+    ]
+}
+
+// A level 3 page descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-17.
+register_bitfields! {u64,
+    STAGE1_PAGE_DESCRIPTOR [
+        /// Unprivileged execute-never.
+        UXN      OFFSET(54) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
+        /// Privileged execute-never.
+        PXN      OFFSET(53) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
+        /// Physical address of the next table descriptor (lvl2) or the page descriptor (lvl3).
+        OUTPUT_ADDR_64KiB OFFSET(16) NUMBITS(32) [], // [47:16]
+
+        /// Access flag.
+        AF       OFFSET(10) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
+        /// Shareability field.
+        SH       OFFSET(8) NUMBITS(2) [
+            OuterShareable = 0b10,
+            InnerShareable = 0b11
+        ],
+
+        /// Access Permissions.
+        AP       OFFSET(6) NUMBITS(2) [
+            RW_EL1 = 0b00,
+            RW_EL1_EL0 = 0b01,
+            RO_EL1 = 0b10,
+            RO_EL1_EL0 = 0b11
+        ],
+
+        /// Memory attributes index into the MAIR_EL1 register.
+        AttrIndx OFFSET(2) NUMBITS(3) [],
+
+        TYPE     OFFSET(1) NUMBITS(1) [
+            Block = 0,
+            Table = 1
+        ],
+
+        VALID    OFFSET(0) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ]
+    ]
+}
+
+/// A table descriptor for 64 KiB aperture.
+///
+/// The output points to the next table.
+#[derive(Copy, Clone)]
+#[repr(C)]
+struct TableDescriptor {
+    value: u64,
+}
+
+/// A page descriptor with 64 KiB aperture.
+///
+/// The output points to physical memory.
+#[derive(Copy, Clone)]
+#[repr(C)]
+struct PageDescriptor {
+    value: u64,
+}
+
+trait BaseAddr {
+    fn base_addr_u64(&self) -> u64;
+    fn base_addr_usize(&self) -> usize;
+}
+
+const NUM_LVL2_TABLES: usize = bsp::memory::mmu::KernelAddrSpaceSize::SIZE >> Granule512MiB::SHIFT;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Big monolithic struct for storing the translation tables. Individual levels must be 64 KiB
+/// aligned, hence the "reverse" order of appearance.
+#[repr(C)]
+#[repr(align(65536))]
+pub struct FixedSizeTranslationTable<const NUM_TABLES: usize> {
+    /// Page descriptors, covering 64 KiB windows per entry.
+    lvl3: [[PageDescriptor; 8192]; NUM_TABLES],
+
+    /// Table descriptors, covering 512 MiB windows.
+    lvl2: [TableDescriptor; NUM_TABLES],
+}
+
+/// A translation table type for the kernel space.
+pub type KernelTranslationTable = FixedSizeTranslationTable<NUM_LVL2_TABLES>;
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl<T, const N: usize> BaseAddr for [T; N] {
+    fn base_addr_u64(&self) -> u64 {
+        self as *const T as u64
+    }
+
+    fn base_addr_usize(&self) -> usize {
+        self as *const _ as usize
+    }
+}
+
+impl TableDescriptor {
+    /// Create an instance.
+    ///
+    /// Descriptor is invalid by default.
+    pub const fn new_zeroed() -> Self {
+        Self { value: 0 }
+    }
+
+    /// Create an instance pointing to the supplied address.
+    pub fn from_next_lvl_table_addr(next_lvl_table_addr: usize) -> Self {
+        let val = InMemoryRegister::<u64, STAGE1_TABLE_DESCRIPTOR::Register>::new(0);
+
+        let shifted = next_lvl_table_addr >> Granule64KiB::SHIFT;
+        val.write(
+            STAGE1_TABLE_DESCRIPTOR::VALID::True
+                + STAGE1_TABLE_DESCRIPTOR::TYPE::Table
+                + STAGE1_TABLE_DESCRIPTOR::NEXT_LEVEL_TABLE_ADDR_64KiB.val(shifted as u64),
+        );
+
+        TableDescriptor { value: val.get() }
+    }
+}
+
+/// Convert the kernel's generic memory attributes to HW-specific attributes of the MMU.
+impl convert::From<AttributeFields>
+    for register::FieldValue<u64, STAGE1_PAGE_DESCRIPTOR::Register>
+{
+    fn from(attribute_fields: AttributeFields) -> Self {
+        // Memory attributes.
+        let mut desc = match attribute_fields.mem_attributes {
+            MemAttributes::CacheableDRAM => {
+                STAGE1_PAGE_DESCRIPTOR::SH::InnerShareable
+                    + STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(memory::mmu::arch_mmu::mair::NORMAL)
+            }
+            MemAttributes::Device => {
+                STAGE1_PAGE_DESCRIPTOR::SH::OuterShareable
+                    + STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(memory::mmu::arch_mmu::mair::DEVICE)
+            }
+        };
+
+        // Access Permissions.
+        desc += match attribute_fields.acc_perms {
+            AccessPermissions::ReadOnly => STAGE1_PAGE_DESCRIPTOR::AP::RO_EL1,
+            AccessPermissions::ReadWrite => STAGE1_PAGE_DESCRIPTOR::AP::RW_EL1,
+        };
+
+        // The execute-never attribute is mapped to PXN in AArch64.
+        desc += if attribute_fields.execute_never {
+            STAGE1_PAGE_DESCRIPTOR::PXN::True
+        } else {
+            STAGE1_PAGE_DESCRIPTOR::PXN::False
+        };
+
+        // Always set unprivileged exectue-never as long as userspace is not implemented yet.
+        desc += STAGE1_PAGE_DESCRIPTOR::UXN::True;
+
+        desc
+    }
+}
+
+impl PageDescriptor {
+    /// Create an instance.
+    ///
+    /// Descriptor is invalid by default.
+    pub const fn new_zeroed() -> Self {
+        Self { value: 0 }
+    }
+
+    /// Create an instance.
+    pub fn from_output_addr(output_addr: usize, attribute_fields: AttributeFields) -> Self {
+        let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
+
+        let shifted = output_addr as u64 >> Granule64KiB::SHIFT;
+        val.write(
+            STAGE1_PAGE_DESCRIPTOR::VALID::True
+                + STAGE1_PAGE_DESCRIPTOR::AF::True
+                + attribute_fields.into()
+                + STAGE1_PAGE_DESCRIPTOR::TYPE::Table
+                + STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted),
+        );
+
+        Self { value: val.get() }
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
+    /// Create an instance.
+    #[allow(clippy::assertions_on_constants)]
+    pub const fn new() -> Self {
+        assert!(NUM_TABLES > 0);
+        assert!((bsp::memory::mmu::KernelAddrSpaceSize::SIZE % Granule512MiB::SIZE) == 0);
+
+        Self {
+            lvl3: [[PageDescriptor::new_zeroed(); 8192]; NUM_TABLES],
+            lvl2: [TableDescriptor::new_zeroed(); NUM_TABLES],
+        }
+    }
+
+    /// Iterates over all static translation table entries and fills them at once.
+    ///
+    /// # Safety
+    ///
+    /// - Modifies a `static mut`. Ensure it only happens from here.
+    pub unsafe fn populate_tt_entries(&mut self) -> Result<(), &'static str> {
+        for (l2_nr, l2_entry) in self.lvl2.iter_mut().enumerate() {
+            *l2_entry =
+                TableDescriptor::from_next_lvl_table_addr(self.lvl3[l2_nr].base_addr_usize());
+
+            for (l3_nr, l3_entry) in self.lvl3[l2_nr].iter_mut().enumerate() {
+                let virt_addr = (l2_nr << Granule512MiB::SHIFT) + (l3_nr << Granule64KiB::SHIFT);
+
+                let (output_addr, attribute_fields) =
+                    bsp::memory::mmu::virt_mem_layout().virt_addr_properties(virt_addr)?;
+
+                *l3_entry = PageDescriptor::from_output_addr(output_addr, attribute_fields);
+            }
+        }
+
+        Ok(())
+    }
+
+    /// The translation table's base address to be used for programming the MMU.
+    pub fn base_address(&self) -> u64 {
+        self.lvl2.base_addr_u64()
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// Check if the size of `struct TableDescriptor` is as expected.
+    #[kernel_test]
+    fn size_of_tabledescriptor_equals_64_bit() {
+        assert_eq!(
+            core::mem::size_of::<TableDescriptor>(),
+            core::mem::size_of::<u64>()
+        );
+    }
+
+    /// Check if the size of `struct PageDescriptor` is as expected.
+    #[kernel_test]
+    fn size_of_pagedescriptor_equals_64_bit() {
+        assert_eq!(
+            core::mem::size_of::<PageDescriptor>(),
+            core::mem::size_of::<u64>()
+        );
+    }
+}
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/time.rs b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/time.rs
index 7f1bc6963..3a766009d 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/time.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/time.rs
@@ -3,6 +3,13 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::time::arch_time
 
 use crate::{time, warn};
 use core::time::Duration;
@@ -55,7 +62,7 @@ impl time::interface::TimeManager for GenericTimer {
         }
 
         // Calculate the register compare value.
-        let frq = CNTFRQ_EL0.get() as u64;
+        let frq = CNTFRQ_EL0.get();
         let x = match frq.checked_mul(duration.as_nanos() as u64) {
             None => {
                 warn!("Spin duration too long, skipping");
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp.rs b/14_exceptions_part2_peripheral_IRQs/src/bsp.rs
index 257502491..c558922f7 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp.rs
@@ -2,7 +2,7 @@
 //
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-//! Conditional re-exporting of Board Support Packages.
+//! Conditional reexporting of Board Support Packages.
 
 mod device_driver;
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
index 485b8a46a..451d927b6 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
@@ -12,13 +12,16 @@ use core::ops::RangeInclusive;
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
+/// The address space size chosen by this BSP.
+pub type KernelAddrSpaceSize = AddressSpaceSize<{ memory_map::END_INCLUSIVE + 1 }>;
+
 const NUM_MEM_RANGES: usize = 2;
 
 /// The virtual memory layout.
 ///
 /// The layout must contain only special ranges, aka anything that is _not_ normal cacheable DRAM.
 /// It is agnostic of the paging granularity that the architecture's MMU will use.
-pub static LAYOUT: KernelVirtualLayout<{ NUM_MEM_RANGES }> = KernelVirtualLayout::new(
+pub static LAYOUT: KernelVirtualLayout<NUM_MEM_RANGES> = KernelVirtualLayout::new(
     memory_map::END_INCLUSIVE,
     [
         TranslationDescriptor {
@@ -62,18 +65,8 @@ fn mmio_range_inclusive() -> RangeInclusive<usize> {
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// Return the address space size in bytes.
-///
-/// Guarantees size to be a power of two.
-pub const fn addr_space_size() -> usize {
-    let size = memory_map::END_INCLUSIVE + 1;
-    assert!(size.is_power_of_two());
-
-    size
-}
-
 /// Return a reference to the virtual memory layout.
-pub fn virt_mem_layout() -> &'static KernelVirtualLayout<{ NUM_MEM_RANGES }> {
+pub fn virt_mem_layout() -> &'static KernelVirtualLayout<NUM_MEM_RANGES> {
     &LAYOUT
 }
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/console.rs b/14_exceptions_part2_peripheral_IRQs/src/console.rs
index 3552823cc..c3154ba23 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/console.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/console.rs
@@ -20,8 +20,7 @@ pub mod interface {
         /// Write a Rust format string.
         fn write_fmt(&self, args: fmt::Arguments) -> fmt::Result;
 
-        /// Block execution until the last buffered character has been physically put on the TX
-        /// wire.
+        /// Block until the last buffered character has been physically put on the TX wire.
         fn flush(&self);
     }
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/cpu.rs b/14_exceptions_part2_peripheral_IRQs/src/cpu.rs
index c9e5af72c..9c8eb6f6e 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/cpu.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/cpu.rs
@@ -7,6 +7,12 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "_arch/aarch64/cpu.rs"]
 mod arch_cpu;
-pub use arch_cpu::*;
+
+mod boot;
 
 pub mod smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_cpu::{nop, qemu_exit_failure, qemu_exit_success, wait_forever};
diff --git a/14_exceptions_part2_peripheral_IRQs/src/cpu/boot.rs b/14_exceptions_part2_peripheral_IRQs/src/cpu/boot.rs
new file mode 100644
index 000000000..1dc5c1808
--- /dev/null
+++ b/14_exceptions_part2_peripheral_IRQs/src/cpu/boot.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Boot code.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/cpu/boot.rs"]
+mod arch_boot;
diff --git a/14_exceptions_part2_peripheral_IRQs/src/cpu/smp.rs b/14_exceptions_part2_peripheral_IRQs/src/cpu/smp.rs
index 90ecbdf30..38230ce1e 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/cpu/smp.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/cpu/smp.rs
@@ -6,5 +6,9 @@
 
 #[cfg(target_arch = "aarch64")]
 #[path = "../_arch/aarch64/cpu/smp.rs"]
-mod arch_cpu_smp;
-pub use arch_cpu_smp::*;
+mod arch_smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_smp::core_id;
diff --git a/14_exceptions_part2_peripheral_IRQs/src/exception.rs b/14_exceptions_part2_peripheral_IRQs/src/exception.rs
index dfa852a87..3c5e7bc83 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/exception.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/exception.rs
@@ -7,10 +7,14 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "_arch/aarch64/exception.rs"]
 mod arch_exception;
-pub use arch_exception::*;
 
 pub mod asynchronous;
 
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_exception::{current_privilege_level, handling_init};
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
diff --git a/14_exceptions_part2_peripheral_IRQs/src/exception/asynchronous.rs b/14_exceptions_part2_peripheral_IRQs/src/exception/asynchronous.rs
index c16ce0077..2b9ef05f3 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/exception/asynchronous.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/exception/asynchronous.rs
@@ -6,11 +6,18 @@
 
 #[cfg(target_arch = "aarch64")]
 #[path = "../_arch/aarch64/exception/asynchronous.rs"]
-mod arch_exception_async;
-pub use arch_exception_async::*;
+mod arch_asynchronous;
 
 use core::{fmt, marker::PhantomData};
 
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_asynchronous::{
+    is_local_irq_masked, local_irq_mask, local_irq_mask_save, local_irq_restore, local_irq_unmask,
+    print_state,
+};
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -116,7 +123,7 @@ impl<const MAX_INCLUSIVE: usize> IRQNumber<{ MAX_INCLUSIVE }> {
     }
 
     /// Return the wrapped number.
-    pub fn get(self) -> usize {
+    pub const fn get(self) -> usize {
         self.0
     }
 }
diff --git a/14_exceptions_part2_peripheral_IRQs/src/lib.rs b/14_exceptions_part2_peripheral_IRQs/src/lib.rs
index 635732bd8..bc50cabd8 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/lib.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/lib.rs
@@ -7,24 +7,7 @@
 
 //! The `kernel` library.
 //!
-//! Used by `main.rs` to compose the final kernel binary.
-//!
-//! # TL;DR - Overview of important Kernel entities
-//!
-//! - [`bsp::console::console()`] - Returns a reference to the kernel's [console interface].
-//! - [`bsp::driver::driver_manager()`] - Returns a reference to the kernel's [driver interface].
-//! - [`bsp::exception::asynchronous::irq_manager()`] - Returns a reference to the kernel's [IRQ
-//!   Handling interface].
-//! - [`memory::mmu::mmu()`] - Returns a reference to the kernel's [MMU interface].
-//! - [`state::state_manager()`] - Returns a reference to the kernel's [state management] instance.
-//! - [`time::time_manager()`] - Returns a reference to the kernel's [timer interface].
-//!
-//! [console interface]: ../libkernel/console/interface/index.html
-//! [driver interface]: ../libkernel/driver/interface/trait.DriverManager.html
-//! [IRQ Handling interface]: ../libkernel/exception/asynchronous/interface/trait.IRQManager.html
-//! [MMU interface]: ../libkernel/memory/mmu/interface/trait.MMU.html
-//! [state management]: ../libkernel/state/struct.StateManager.html
-//! [timer interface]: ../libkernel/time/interface/trait.TimeManager.html
+//! Used to compose the final kernel binary.
 //!
 //! # Code organization and architecture
 //!
@@ -39,15 +22,22 @@
 //! `src/_arch`, for example, `src/_arch/aarch64`.
 //!
 //! The architecture folders mirror the subsystem modules laid out in `src`. For example,
-//! architectural code that belongs to the `kernel`'s memory subsystem (`src/memory.rs`) would go
-//! into `src/_arch/aarch64/memory.rs`. The latter file is directly included and re-exported in
-//! `src/memory.rs`, so that the architectural code parts are transparent with respect to the code's
-//! module organization. That means a public function `foo()` defined in
-//! `src/_arch/aarch64/memory.rs` would be reachable as `crate::memory::foo()` only.
+//! architectural code that belongs to the `kernel`'s MMU subsystem (`src/memory/mmu.rs`) would go
+//! into `src/_arch/aarch64/memory/mmu.rs`. The latter file is loaded as a module in
+//! `src/memory/mmu.rs` using the `path attribute`. Usually, the chosen module name is the generic
+//! module's name prefixed with `arch_`.
 //!
-//! The `_` in `_arch` denotes that this folder is not part of the standard module hierarchy.
-//! Rather, it's contents are conditionally pulled into respective files using the `#[path =
-//! "_arch/xxx/yyy.rs"]` attribute.
+//! For example, this is the top of `src/memory/mmu.rs`:
+//!
+//! ```
+//! #[cfg(target_arch = "aarch64")]
+//! #[path = "../_arch/aarch64/memory/mmu.rs"]
+//! mod arch_mmu;
+//! ```
+//!
+//! Often times, items from the `arch_ module` will be publicly reexported by the parent module.
+//! This way, each architecture specific module can provide its implementation of an item, while the
+//! caller must not be concerned which architecture has been conditionally compiled.
 //!
 //! ## BSP code
 //!
@@ -56,9 +46,8 @@
 //! or instances of drivers for devices that are featured on the respective board.
 //!
 //! Just like processor architecture code, the `BSP` code's module structure tries to mirror the
-//! `kernel`'s subsystem modules, but there is no transparent re-exporting this time. That means
-//! whatever is provided must be called starting from the `bsp` namespace, e.g.
-//! `bsp::driver::driver_manager()`.
+//! `kernel`'s subsystem modules, but there is no reexporting this time. That means whatever is
+//! provided must be called starting from the `bsp` namespace, e.g. `bsp::driver::driver_manager()`.
 //!
 //! ## Kernel interfaces
 //!
@@ -110,6 +99,14 @@
 //!
 //! - `crate::memory::*`
 //! - `crate::bsp::memory::*`
+//!
+//! # Boot flow
+//!
+//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
+//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
+//!
+//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 
 #![allow(incomplete_features)]
 #![feature(asm)]
@@ -129,9 +126,6 @@
 #![reexport_test_harness_main = "test_main"]
 #![test_runner(crate::test_runner)]
 
-// `mod cpu` provides the `_start()` function, the first function to run. `_start()` then calls
-// `runtime_init()`, which jumps to `kernel_init()` (defined in `main.rs`).
-
 mod panic_wait;
 mod runtime_init;
 mod synchronization;
diff --git a/14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs b/14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs
index 163419ec0..cca2951aa 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs
@@ -5,8 +5,8 @@
 //! Memory Management Unit.
 //!
 //! In order to decouple `BSP` and `arch` parts of the MMU code (to keep them pluggable), this file
-//! provides types for composing an architecture-agnostic description of the kernel 's virtual
-//! memory layout.
+//! provides types for composing an architecture-agnostic description of the kernel's virtual memory
+//! layout.
 //!
 //! The `BSP` provides such a description through the `bsp::memory::mmu::virt_mem_layout()`
 //! function.
@@ -17,10 +17,16 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "../_arch/aarch64/memory/mmu.rs"]
 mod arch_mmu;
-pub use arch_mmu::*;
+
+mod translation_table;
 
 use core::{fmt, ops::RangeInclusive};
 
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_mmu::mmu;
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -40,6 +46,12 @@ pub mod interface {
     }
 }
 
+/// Describes the characteristics of a translation granule.
+pub struct TranslationGranule<const GRANULE_SIZE: usize>;
+
+/// Describes the size of an address space.
+pub struct AddressSpaceSize<const AS_SIZE: usize>;
+
 /// Architecture agnostic translation types.
 #[allow(missing_docs)]
 #[derive(Copy, Clone)]
@@ -95,6 +107,41 @@ pub struct KernelVirtualLayout<const NUM_SPECIAL_RANGES: usize> {
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
+impl<const GRANULE_SIZE: usize> TranslationGranule<GRANULE_SIZE> {
+    /// The granule's size.
+    pub const SIZE: usize = Self::size_checked();
+
+    /// The granule's shift, aka log2(size).
+    pub const SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
+
+    const fn size_checked() -> usize {
+        assert!(GRANULE_SIZE.is_power_of_two());
+
+        GRANULE_SIZE
+    }
+}
+
+impl<const AS_SIZE: usize> AddressSpaceSize<AS_SIZE> {
+    /// The address space size.
+    pub const SIZE: usize = Self::size_checked();
+
+    /// The address space shift, aka log2(size).
+    pub const SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
+
+    const fn size_checked() -> usize {
+        assert!(AS_SIZE.is_power_of_two());
+        assert!(arch_mmu::MIN_ADDR_SPACE_SIZE.is_power_of_two());
+        assert!(arch_mmu::MAX_ADDR_SPACE_SIZE.is_power_of_two());
+
+        // Must adhere to architectural restrictions.
+        assert!(AS_SIZE >= arch_mmu::MIN_ADDR_SPACE_SIZE);
+        assert!(AS_SIZE <= arch_mmu::MAX_ADDR_SPACE_SIZE);
+        assert!((AS_SIZE % arch_mmu::AddrSpaceSizeGranule::SIZE) == 0);
+
+        AS_SIZE
+    }
+}
+
 impl Default for AttributeFields {
     fn default() -> AttributeFields {
         AttributeFields {
diff --git a/14_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.rs b/14_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.rs
new file mode 100644
index 000000000..bbb6f9394
--- /dev/null
+++ b/14_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.rs
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Translation table.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../../_arch/aarch64/memory/mmu/translation_table.rs"]
+mod arch_translation_table;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_translation_table::KernelTranslationTable;
diff --git a/14_exceptions_part2_peripheral_IRQs/src/print.rs b/14_exceptions_part2_peripheral_IRQs/src/print.rs
index 1ea96b6ad..5a5638113 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/print.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/print.rs
@@ -2,7 +2,7 @@
 //
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-//! Printing facilities.
+//! Printing.
 
 use crate::{bsp, console};
 use core::fmt;
diff --git a/14_exceptions_part2_peripheral_IRQs/src/state.rs b/14_exceptions_part2_peripheral_IRQs/src/state.rs
index d08e67d6e..c94d04c84 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/state.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/state.rs
@@ -69,7 +69,7 @@ impl StateManager {
         }
     }
 
-    /// Return if the kernel is still in an init state.
+    /// Return if the kernel is init state.
     pub fn is_init(&self) -> bool {
         self.state() == State::Init
     }
diff --git a/14_exceptions_part2_peripheral_IRQs/src/time.rs b/14_exceptions_part2_peripheral_IRQs/src/time.rs
index 4f2f4e38f..953b6f0df 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/time.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/time.rs
@@ -7,7 +7,11 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "_arch/aarch64/time.rs"]
 mod arch_time;
-pub use arch_time::*;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_time::time_manager;
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -18,8 +22,6 @@ pub mod interface {
     use core::time::Duration;
 
     /// Time management functions.
-    ///
-    /// The `BSP` is supposed to supply one global instance.
     pub trait TimeManager {
         /// The timer's resolution.
         fn resolution(&self) -> Duration;
diff --git a/15_virtual_mem_part2_mmio_remap/README.md b/15_virtual_mem_part2_mmio_remap/README.md
index acb48ded6..beb2cffc6 100644
--- a/15_virtual_mem_part2_mmio_remap/README.md
+++ b/15_virtual_mem_part2_mmio_remap/README.md
@@ -15,7 +15,7 @@
 
 - [Introduction](#introduction)
 - [Implementation](#implementation)
-  - [A New Mapping API in `src/memory/mmu.rs`](#a-new-mapping-api-in-srcmemorymmurs)
+  - [A New Mapping API in `src/memory/mmu.rs`](#a-new-mapping-api-in-srcmemorymmutranslationtablers)
   - [Using the new API in `bsp` code and drivers](#using-the-new-api-in-bsp-code-and-drivers)
   - [Additional Changes](#additional-changes)
 - [Test it](#test-it)
@@ -77,7 +77,7 @@ Until now, the whole address space of the board was identity mapped at once. The
 together directly while setting up the translation tables, without any indirection through **generic
 kernel code** (`src/memory/**`).
 
-The way it worked was that the `architectural MMU driver` would query the `bsp code` about the start
+The way it worked was that the `architectural MMU code` would query the `bsp code` about the start
 and end of the physical address space, and any special regions in this space that need a mapping
 that _is not_ normal chacheable DRAM. It would then go ahead and map the whole address space at once
 and never touch the page tables again during runtime.
@@ -85,7 +85,7 @@ and never touch the page tables again during runtime.
 Changing in this tutorial, **architecture** and **bsp** code will no longer talk to each other
 directly. Instead, this is decoupled now through the kernel's **generic MMU subsystem code**.
 
-### A New Mapping API in `src/memory/mmu.rs`
+### A New Mapping API in `src/memory/mmu/translation_table.rs`
 
 First, we define an interface for operating on `translation tables`:
 
@@ -98,11 +98,11 @@ pub trait TranslationTable {
     /// The translation table's base address to be used for programming the MMU.
     fn phys_base_address(&self) -> Address<Physical>;
 
-    /// Map the given physical pages to the given virtual pages.
+    /// Map the given virtual pages to the given physical pages.
     unsafe fn map_pages_at(
         &mut self,
-        phys_pages: &PageSliceDescriptor<Physical>,
         virt_pages: &PageSliceDescriptor<Virtual>,
+        phys_pages: &PageSliceDescriptor<Physical>,
         attr: &AttributeFields,
     ) -> Result<(), &'static str>;
 
@@ -126,7 +126,7 @@ pub trait TranslationTable {
 The MMU driver (`src/_arch/_/memory/mmu.rs`) has one global instance for the kernel tables which
 implements this interface, and which can be accessed by calling
 `arch_mmu::kernel_translation_tables()` in the generic kernel code (`src/memory/mmu.rs`). From
-there, we provice a couple of memory mapping functions that wrap around this interface , and which
+there, we provide a couple of memory mapping functions that wrap around this interface , and which
 are exported for the rest of the kernel to use:
 
 ```rust
@@ -163,8 +163,8 @@ provides a dedicated call to **map the kernel binary** (because it is the `BSP`
 pub unsafe fn kernel_map_binary() -> Result<(), &'static str> {
     kernel_mmu::kernel_map_pages_at(
         "Kernel boot-core stack",
-        &phys_stack_page_desc(),
         &virt_stack_page_desc(),
+        &phys_stack_page_desc(),
         &AttributeFields {
             mem_attributes: MemAttributes::CacheableDRAM,
             acc_perms: AccessPermissions::ReadWrite,
@@ -225,7 +225,7 @@ There's a couple of changes not covered in this tutorial text, but the reader sh
 through them:
 
 - [`src/memory/mmu/types.rs`](src/memory/mmu/types.rs) introduces a couple of supporting types, like
-  `Address<ATYPE>`, which is used to differentiate between `Physical` and `Virtual` addresses.
+  `Page<ATYPE>`.
 - [`src/memory/mmu/mapping_record.rs`](src/memory/mmu/mapping_record.rs) provides the generic kernel
   code's way of tracking previous memory mappings for use cases such as reusing existing mappings
   (in case of drivers that have their MMIO ranges in the same `64 KiB` page) or printing mappings
@@ -310,10 +310,10 @@ Minipush 1.0
 ## Diff to previous
 ```diff
 
-diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu.rs 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu.rs
---- 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu.rs
-+++ 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu.rs
-@@ -71,7 +71,7 @@
+diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.rs 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs
+--- 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.rs
++++ 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs
+@@ -56,7 +56,7 @@
      ELR_EL2.set(runtime_init::runtime_init as *const () as u64);
 
      // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it.
@@ -323,182 +323,81 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu.rs 15_virtua
      // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
      asm::eret()
 
-diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
---- 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
-+++ 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
-@@ -4,10 +4,19 @@
-
- //! Memory Management Unit Driver.
- //!
--//! Static translation tables, compiled on boot; Everything 64 KiB granule.
-+//! Only 64 KiB granule is supported.
+diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
+--- 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs
++++ 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
+@@ -15,9 +15,12 @@
 
--use super::{AccessPermissions, AttributeFields, MemAttributes};
--use crate::{bsp, memory};
-+use crate::{
-+    bsp,
+ use crate::{
+     bsp, memory,
+-    memory::mmu::{
+-        arch_mmu::{Granule512MiB, Granule64KiB},
+-        AccessPermissions, AttributeFields, MemAttributes,
 +    memory::{
-+        mmu,
 +        mmu::{
-+            AccessPermissions, Address, AddressType, AttributeFields, MemAttributes, Page,
-+            PageSliceDescriptor, Physical, Virtual,
++            arch_mmu::{Granule512MiB, Granule64KiB},
++            AccessPermissions, AttributeFields, MemAttributes, Page, PageSliceDescriptor,
 +        },
-+    },
-+    synchronization::InitStateLock,
-+};
++        Address, AddressType, Physical, Virtual,
+     },
+ };
  use core::convert;
- use cortex_a::{barrier, regs::*};
- use register::{register_bitfields, InMemoryRegister};
-@@ -15,6 +24,7 @@
- //--------------------------------------------------------------------------------------------------
- // Private Definitions
- //--------------------------------------------------------------------------------------------------
-+use mmu::interface::TranslationGranule;
+@@ -117,11 +120,11 @@
+ }
 
- // A table descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-15.
- register_bitfields! {u64,
-@@ -87,9 +97,6 @@
-     ]
+ trait BaseAddr {
+-    fn base_addr_u64(&self) -> u64;
+-    fn base_addr_usize(&self) -> usize;
++    fn phys_base_addr(&self) -> Address<Physical>;
  }
 
--const SIXTYFOUR_KIB_SHIFT: usize = 16; //  log2(64 * 1024)
--const FIVETWELVE_MIB_SHIFT: usize = 29; // log2(512 * 1024 * 1024)
--
- /// A table descriptor for 64 KiB aperture.
- ///
- /// The output points to the next table.
-@@ -104,35 +111,65 @@
- #[repr(transparent)]
- struct PageDescriptor(u64);
+-const NUM_LVL2_TABLES: usize = bsp::memory::mmu::KernelAddrSpaceSize::SIZE >> Granule512MiB::SHIFT;
++const NUM_LVL2_TABLES: usize =
++    bsp::memory::mmu::KernelVirtAddrSpaceSize::SIZE >> Granule512MiB::SHIFT;
 
-+#[derive(Copy, Clone)]
-+enum Granule512MiB {}
-+
-+trait BaseAddr {
-+    fn phys_base_addr(&self) -> Address<Physical>;
-+}
-+
-+/// Constants for indexing the MAIR_EL1.
-+#[allow(dead_code)]
-+mod mair {
-+    pub const DEVICE: u64 = 0;
-+    pub const NORMAL: u64 = 1;
-+}
-+
-+/// Memory Management Unit type.
-+struct MemoryManagementUnit;
-+
-+/// This constant is the power-of-two exponent that defines the virtual address space size.
-+///
-+/// Values tested and known to be working:
-+///   - 30 (1 GiB)
-+///   - 31 (2 GiB)
-+///   - 32 (4 GiB)
-+///   - 33 (8 GiB)
-+const ADDR_SPACE_SIZE_EXPONENT: usize = 33;
-+
-+const NUM_LVL2_TABLES: usize = (1 << ADDR_SPACE_SIZE_EXPONENT) >> Granule512MiB::SHIFT;
-+const T0SZ: u64 = (64 - ADDR_SPACE_SIZE_EXPONENT) as u64;
-+
-+//--------------------------------------------------------------------------------------------------
-+// Public Definitions
-+//--------------------------------------------------------------------------------------------------
-+
- /// Big monolithic struct for storing the translation tables. Individual levels must be 64 KiB
- /// aligned, hence the "reverse" order of appearance.
- #[repr(C)]
- #[repr(align(65536))]
--struct FixedSizeTranslationTable<const NUM_TABLES: usize> {
-+pub(in crate::memory::mmu) struct FixedSizeTranslationTable<const NUM_TABLES: usize> {
-     /// Page descriptors, covering 64 KiB windows per entry.
-     lvl3: [[PageDescriptor; 8192]; NUM_TABLES],
+ //--------------------------------------------------------------------------------------------------
+ // Public Definitions
+@@ -137,6 +140,12 @@
 
      /// Table descriptors, covering 512 MiB windows.
      lvl2: [TableDescriptor; NUM_TABLES],
--}
-
--const NUM_LVL2_TABLES: usize = bsp::memory::mmu::addr_space_size() >> FIVETWELVE_MIB_SHIFT;
--type ArchTranslationTable = FixedSizeTranslationTable<NUM_LVL2_TABLES>;
++
 +    /// Index of the next free MMIO page.
 +    cur_l3_mmio_index: usize,
-
--trait BaseAddr {
--    fn base_addr_u64(&self) -> u64;
--    fn base_addr_usize(&self) -> usize;
++
 +    /// Have the tables been initialized?
 +    initialized: bool,
  }
 
--/// Constants for indexing the MAIR_EL1.
--#[allow(dead_code)]
--mod mair {
--    pub const DEVICE: u64 = 0;
--    pub const NORMAL: u64 = 1;
--}
-+pub(in crate::memory::mmu) type ArchTranslationTable = FixedSizeTranslationTable<NUM_LVL2_TABLES>;
-
--/// Memory Management Unit type.
--struct MemoryManagementUnit;
-+// Supported translation granules are exported below, so that BSP code can pick between the options.
-+// This driver only supports 64 KiB at the moment.
-+
-+#[derive(Copy, Clone)]
-+/// 64 KiB translation granule.
-+pub enum Granule64KiB {}
-
- //--------------------------------------------------------------------------------------------------
- // Global instances
-@@ -143,7 +180,8 @@
- /// # Safety
- ///
- /// - Supposed to land in `.bss`. Therefore, ensure that all initial member values boil down to "0".
--static mut KERNEL_TABLES: ArchTranslationTable = ArchTranslationTable::new();
-+static KERNEL_TABLES: InitStateLock<ArchTranslationTable> =
-+    InitStateLock::new(ArchTranslationTable::new());
-
- static MMU: MemoryManagementUnit = MemoryManagementUnit;
-
-@@ -151,13 +189,15 @@
- // Private Code
+ /// A translation table type for the kernel space.
+@@ -147,12 +156,9 @@
  //--------------------------------------------------------------------------------------------------
 
--impl<T, const N: usize> BaseAddr for [T; N] {
+ impl<T, const N: usize> BaseAddr for [T; N] {
 -    fn base_addr_u64(&self) -> u64 {
 -        self as *const T as u64
 -    }
-+impl mmu::interface::TranslationGranule for Granule512MiB {
-+    const SIZE: usize = 512 * 1024 * 1024;
-+    const SHIFT: usize = 29; // log2(SIZE)
-+}
-
+-
 -    fn base_addr_usize(&self) -> usize {
 -        self as *const _ as usize
-+impl<T, const N: usize> BaseAddr for [T; N] {
 +    fn phys_base_addr(&self) -> Address<Physical> {
 +        // The binary is still identity mapped, so we don't need to convert here.
 +        Address::new(self as *const _ as usize)
      }
  }
 
-@@ -165,7 +205,7 @@
-     fn from(next_lvl_table_addr: usize) -> Self {
-         let val = InMemoryRegister::<u64, STAGE1_TABLE_DESCRIPTOR::Register>::new(0);
-
--        let shifted = next_lvl_table_addr >> SIXTYFOUR_KIB_SHIFT;
-+        let shifted = next_lvl_table_addr >> Granule64KiB::SHIFT;
-         val.write(
-             STAGE1_TABLE_DESCRIPTOR::VALID::True
-                 + STAGE1_TABLE_DESCRIPTOR::TYPE::Table
-@@ -215,23 +255,33 @@
+@@ -225,20 +231,29 @@
+     }
 
- impl PageDescriptor {
      /// Create an instance.
--    fn new(output_addr: usize, attribute_fields: AttributeFields) -> Self {
-+    fn new(output_addr: *const Page<Physical>, attribute_fields: &AttributeFields) -> Self {
+-    pub fn from_output_addr(output_addr: usize, attribute_fields: AttributeFields) -> Self {
++    pub fn from_output_addr(
++        output_addr: *const Page<Physical>,
++        attribute_fields: &AttributeFields,
++    ) -> Self {
          let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
 
--        let shifted = output_addr as u64 >> SIXTYFOUR_KIB_SHIFT;
-+        let shifted = output_addr as u64 >> Granule64KiB::SHIFT;
+         let shifted = output_addr as u64 >> Granule64KiB::SHIFT;
          val.write(
              STAGE1_PAGE_DESCRIPTOR::VALID::True
                  + STAGE1_PAGE_DESCRIPTOR::AF::True
@@ -508,36 +407,53 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 15
                  + STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted),
          );
 
-         Self(val.get())
+         Self { value: val.get() }
      }
 +
 +    /// Returns the valid bit.
 +    fn is_valid(&self) -> bool {
-+        InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(self.0)
++        InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(self.value)
 +            .is_set(STAGE1_PAGE_DESCRIPTOR::VALID)
 +    }
  }
 
- impl<const NUM_TABLES: usize> FixedSizeTranslationTable<{ NUM_TABLES }> {
+ //--------------------------------------------------------------------------------------------------
+@@ -246,44 +261,172 @@
+ //--------------------------------------------------------------------------------------------------
+
+ impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
 +    // Reserve the last 256 MiB of the address space for MMIO mappings.
 +    const L2_MMIO_START_INDEX: usize = NUM_TABLES - 1;
 +    const L3_MMIO_START_INDEX: usize = 8192 / 2;
 +
      /// Create an instance.
+     #[allow(clippy::assertions_on_constants)]
      pub const fn new() -> Self {
++        assert!(bsp::memory::mmu::KernelGranule::SIZE == Granule64KiB::SIZE);
          assert!(NUM_TABLES > 0);
-@@ -239,7 +289,55 @@
+-        assert!((bsp::memory::mmu::KernelAddrSpaceSize::SIZE modulo Granule512MiB::SIZE) == 0);
++        assert!((bsp::memory::mmu::KernelVirtAddrSpaceSize::SIZE modulo Granule512MiB::SIZE) == 0);
+
          Self {
-             lvl3: [[PageDescriptor(0); 8192]; NUM_TABLES],
-             lvl2: [TableDescriptor(0); NUM_TABLES],
+             lvl3: [[PageDescriptor::new_zeroed(); 8192]; NUM_TABLES],
+             lvl2: [TableDescriptor::new_zeroed(); NUM_TABLES],
 +            cur_l3_mmio_index: 0,
 +            initialized: false,
-+        }
-+    }
-+
+         }
+     }
+
+-    /// Iterates over all static translation table entries and fills them at once.
+-    ///
+-    /// # Safety
+-    ///
+-    /// - Modifies a `static mut`. Ensure it only happens from here.
+-    pub unsafe fn populate_tt_entries(&mut self) -> Result<(), &'static str> {
+-        for (l2_nr, l2_entry) in self.lvl2.iter_mut().enumerate() {
+-            *l2_entry =
+-                TableDescriptor::from_next_lvl_table_addr(self.lvl3[l2_nr].base_addr_usize());
 +    /// The start address of the table's MMIO range.
 +    #[inline(always)]
-+    fn mmio_start_addr(&self) -> Address<Virtual> {
++    const fn mmio_start_addr(&self) -> Address<Virtual> {
 +        Address::new(
 +            (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
 +                | (Self::L3_MMIO_START_INDEX << Granule64KiB::SHIFT),
@@ -546,7 +462,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 15
 +
 +    /// The inclusive end address of the table's MMIO range.
 +    #[inline(always)]
-+    fn mmio_end_addr_inclusive(&self) -> Address<Virtual> {
++    const fn mmio_end_addr_inclusive(&self) -> Address<Virtual> {
 +        Address::new(
 +            (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
 +                | (8191 << Granule64KiB::SHIFT)
@@ -565,7 +481,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 15
 +
 +        if lvl2_index > (NUM_TABLES - 1) {
 +            return Err("Virtual page is out of bounds of translation table");
-         }
++        }
 +
 +        Ok((lvl2_index, lvl3_index))
 +    }
@@ -579,100 +495,46 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 15
 +        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from(addr)?;
 +
 +        Ok(&mut self.lvl3[lvl2_index][lvl3_index])
-     }
- }
-
-@@ -256,32 +354,9 @@
-     );
- }
-
--/// Iterates over all static translation table entries and fills them at once.
--///
--/// # Safety
--///
--/// - Modifies a `static mut`. Ensure it only happens from here.
--unsafe fn populate_tt_entries() -> Result<(), &'static str> {
--    for (l2_nr, l2_entry) in KERNEL_TABLES.lvl2.iter_mut().enumerate() {
--        *l2_entry = KERNEL_TABLES.lvl3[l2_nr].base_addr_usize().into();
--
--        for (l3_nr, l3_entry) in KERNEL_TABLES.lvl3[l2_nr].iter_mut().enumerate() {
--            let virt_addr = (l2_nr << FIVETWELVE_MIB_SHIFT) + (l3_nr << SIXTYFOUR_KIB_SHIFT);
--
--            let (output_addr, attribute_fields) =
--                bsp::memory::mmu::virt_mem_layout().virt_addr_properties(virt_addr)?;
--
--            *l3_entry = PageDescriptor::new(output_addr, attribute_fields);
--        }
--    }
--
--    Ok(())
--}
--
- /// Configure various settings of stage 1 of the EL1 translation regime.
- fn configure_translation_control() {
-     let ips = ID_AA64MMFR0_EL1.read(ID_AA64MMFR0_EL1::PARange);
--    let t0sz: u64 = bsp::memory::mmu::addr_space_size().trailing_zeros().into();
-
-     TCR_EL1.write(
-         TCR_EL1::TBI0::Ignored
-@@ -292,7 +367,7 @@
-             + TCR_EL1::ORGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
-             + TCR_EL1::IRGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
-             + TCR_EL1::EPD0::EnableTTBR0Walks
--            + TCR_EL1::T0SZ.val(t0sz),
-+            + TCR_EL1::T0SZ.val(T0SZ),
-     );
- }
-
-@@ -300,17 +375,126 @@
- // Public Code
- //--------------------------------------------------------------------------------------------------
-
-+/// Return a guarded reference to the kernel's translation tables.
-+pub(in crate::memory::mmu) fn kernel_translation_tables(
-+) -> &'static InitStateLock<ArchTranslationTable> {
-+    &KERNEL_TABLES
++    }
 +}
 +
- /// Return a reference to the MMU instance.
--pub fn mmu() -> &'static impl memory::mmu::interface::MMU {
-+pub(in crate::memory::mmu) fn mmu() -> &'static impl mmu::interface::MMU {
-     &MMU
- }
-
- //------------------------------------------------------------------------------
- // OS Interface Code
- //------------------------------------------------------------------------------
-+impl mmu::interface::TranslationGranule for Granule64KiB {
-+    const SIZE: usize = 64 * 1024;
-+    const SHIFT: usize = 16; // log2(SIZE)
-+}
++//------------------------------------------------------------------------------
++// OS Interface Code
++//------------------------------------------------------------------------------
 +
-+impl<const NUM_TABLES: usize> mmu::interface::TranslationTable
-+    for FixedSizeTranslationTable<{ NUM_TABLES }>
++impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::TranslationTable
++    for FixedSizeTranslationTable<NUM_TABLES>
 +{
 +    unsafe fn init(&mut self) {
 +        if self.initialized {
 +            return;
 +        }
-+
+
+-            for (l3_nr, l3_entry) in self.lvl3[l2_nr].iter_mut().enumerate() {
+-                let virt_addr = (l2_nr << Granule512MiB::SHIFT) + (l3_nr << Granule64KiB::SHIFT);
 +        // Populate the l2 entries.
 +        for (lvl2_nr, lvl2_entry) in self.lvl2.iter_mut().enumerate() {
-+            *lvl2_entry = self.lvl3[lvl2_nr].phys_base_addr().into_usize().into();
++            let desc = TableDescriptor::from_next_lvl_table_addr(
++                self.lvl3[lvl2_nr].phys_base_addr().into_usize(),
++            );
++            *lvl2_entry = desc;
 +        }
 +
 +        self.cur_l3_mmio_index = Self::L3_MMIO_START_INDEX;
 +        self.initialized = true;
 +    }
-+
+
+-                let (output_addr, attribute_fields) =
+-                    bsp::memory::mmu::virt_mem_layout().virt_addr_properties(virt_addr)?;
 +    fn phys_base_address(&self) -> Address<Physical> {
 +        self.lvl2.phys_base_addr()
 +    }
-+
+
+-                *l3_entry = PageDescriptor::from_output_addr(output_addr, attribute_fields);
 +    unsafe fn map_pages_at(
 +        &mut self,
-+        phys_pages: &PageSliceDescriptor<Physical>,
 +        virt_pages: &PageSliceDescriptor<Virtual>,
++        phys_pages: &PageSliceDescriptor<Physical>,
 +        attr: &AttributeFields,
 +    ) -> Result<(), &'static str> {
 +        assert_eq!(self.initialized, true, "Translation tables not initialized");
@@ -683,9 +545,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 15
 +        if p.len() != v.len() {
 +            return Err("Tried to map page slices with unequal sizes");
 +        }
-
--impl memory::mmu::interface::MMU for MemoryManagementUnit {
--    unsafe fn init(&self) -> Result<(), &'static str> {
++
 +        // No work to do for empty slices.
 +        if p.is_empty() {
 +            return Ok(());
@@ -700,14 +560,17 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 15
 +            let page_descriptor = self.page_descriptor_from(virt_page.as_ptr())?;
 +            if page_descriptor.is_valid() {
 +                return Err("Virtual page is already mapped");
-+            }
-+
-+            *page_descriptor = PageDescriptor::new(phys_page.as_ptr(), &attr);
-+        }
-+
-+        Ok(())
-+    }
+             }
 +
++            *page_descriptor = PageDescriptor::from_output_addr(phys_page.as_ptr(), &attr);
+         }
+
+         Ok(())
+     }
+
+-    /// The translation table's base address to be used for programming the MMU.
+-    pub fn base_address(&self) -> u64 {
+-        self.lvl2.base_addr_u64()
 +    fn next_mmio_virt_page_slice(
 +        &mut self,
 +        num_pages: usize,
@@ -743,41 +606,102 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 15
 +        }
 +
 +        false
-+    }
+     }
+ }
+
+@@ -292,6 +435,9 @@
+ //--------------------------------------------------------------------------------------------------
+
+ #[cfg(test)]
++pub type MinSizeKernelTranslationTable = FixedSizeTranslationTable<1>;
++
++#[cfg(test)]
+ mod tests {
+     use super::*;
+     use test_macros::kernel_test;
+
+diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
+--- 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
++++ 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
+@@ -15,7 +15,11 @@
+
+ use crate::{
+     bsp, memory,
+-    memory::mmu::{translation_table::KernelTranslationTable, TranslationGranule},
++    memory::{
++        mmu::{translation_table::KernelTranslationTable, TranslationGranule},
++        Address, Physical,
++    },
++    synchronization::InitStateLock,
+ };
+ use cortex_a::{barrier, regs::*};
+
+@@ -37,7 +41,7 @@
+ pub const MIN_ADDR_SPACE_SIZE: usize = 1024 * 1024 * 1024; // 1 GiB
+
+ /// The max supported address space size.
+-pub const MAX_ADDR_SPACE_SIZE: usize = 32 * 1024 * 1024 * 1024; // 32 GiB
++pub const MAX_ADDR_SPACE_SIZE: usize = 8 * 1024 * 1024 * 1024; // 8 GiB
+
+ /// The supported address space size granule.
+ pub type AddrSpaceSizeGranule = Granule512MiB;
+@@ -58,7 +62,8 @@
+ /// # Safety
+ ///
+ /// - Supposed to land in `.bss`. Therefore, ensure that all initial member values boil down to "0".
+-static mut KERNEL_TABLES: KernelTranslationTable = KernelTranslationTable::new();
++static KERNEL_TABLES: InitStateLock<KernelTranslationTable> =
++    InitStateLock::new(KernelTranslationTable::new());
+
+ static MMU: MemoryManagementUnit = MemoryManagementUnit;
+
+@@ -83,7 +88,7 @@
+     /// Configure various settings of stage 1 of the EL1 translation regime.
+     fn configure_translation_control(&self) {
+         let ips = ID_AA64MMFR0_EL1.read(ID_AA64MMFR0_EL1::PARange);
+-        let t0sz = (64 - bsp::memory::mmu::KernelAddrSpaceSize::SHIFT) as u64;
++        let t0sz = (64 - bsp::memory::mmu::KernelVirtAddrSpaceSize::SHIFT) as u64;
+
+         TCR_EL1.write(
+             TCR_EL1::TBI0::Ignored
+@@ -103,6 +108,11 @@
+ // Public Code
+ //--------------------------------------------------------------------------------------------------
+
++/// Return a guarded reference to the kernel's translation tables.
++pub fn kernel_translation_tables() -> &'static InitStateLock<KernelTranslationTable> {
++    &KERNEL_TABLES
 +}
 +
-+impl mmu::interface::MMU for MemoryManagementUnit {
+ /// Return a reference to the MMU instance.
+ pub fn mmu() -> &'static impl memory::mmu::interface::MMU {
+     &MMU
+@@ -113,7 +123,10 @@
+ //------------------------------------------------------------------------------
+
+ impl memory::mmu::interface::MMU for MemoryManagementUnit {
+-    unsafe fn init(&self) -> Result<(), &'static str> {
 +    unsafe fn enable(
 +        &self,
-+        phys_kernel_table_base_addr: Address<Physical>,
++        kernel_table_phys_base_addr: Address<Physical>,
 +    ) -> Result<(), &'static str> {
          // Fail early if translation granule is not supported. Both RPis support it, though.
          if !ID_AA64MMFR0_EL1.matches_all(ID_AA64MMFR0_EL1::TGran64::Supported) {
              return Err("Translation granule not supported in HW");
-@@ -319,11 +503,8 @@
+@@ -122,11 +135,8 @@
          // Prepare the memory attribute indirection register.
-         set_up_mair();
+         self.set_up_mair();
 
 -        // Populate translation tables.
--        populate_tt_entries()?;
+-        KERNEL_TABLES.populate_tt_entries()?;
 -
          // Set the "Translation Table Base Register".
--        TTBR0_EL1.set_baddr(KERNEL_TABLES.lvl2.base_addr_u64());
-+        TTBR0_EL1.set_baddr(phys_kernel_table_base_addr.into_usize() as u64);
-
-         configure_translation_control();
+-        TTBR0_EL1.set_baddr(KERNEL_TABLES.base_address());
++        TTBR0_EL1.set_baddr(kernel_table_phys_base_addr.into_usize() as u64);
 
-@@ -347,6 +528,9 @@
- //--------------------------------------------------------------------------------------------------
+         self.configure_translation_control();
 
- #[cfg(test)]
-+pub(in crate::memory::mmu) type MinSizeArchTranslationTable = FixedSizeTranslationTable<1>;
-+
-+#[cfg(test)]
- mod tests {
-     use super::*;
-     use test_macros::kernel_test;
-@@ -373,7 +557,7 @@
+@@ -158,7 +168,7 @@
      #[kernel_test]
      fn kernel_tables_in_bss() {
          let bss_range = bsp::memory::bss_range_inclusive();
@@ -787,19 +711,6 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 15
          assert!(bss_range.contains(&kernel_tables_addr));
      }
 
-diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/time.rs 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/time.rs
---- 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/time.rs
-+++ 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/time.rs
-@@ -55,7 +55,7 @@
-         }
-
-         // Calculate the register compare value.
--        let frq = CNTFRQ_EL0.get() as u64;
-+        let frq = CNTFRQ_EL0.get();
-         let x = match frq.checked_mul(duration.as_nanos() as u64) {
-             None => {
-                 warn!("Spin duration too long, skipping");
-
 diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs 15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicc.rs
 --- 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs
 +++ 15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicc.rs
@@ -974,7 +885,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs
 
 -use crate::{bsp, cpu, driver, exception, synchronization, synchronization::InitStateLock};
 +use crate::{
-+    bsp, cpu, driver, exception, memory, memory::mmu::Physical, synchronization,
++    bsp, cpu, driver, exception, memory, memory::Physical, synchronization,
 +    synchronization::InitStateLock,
 +};
 +use core::sync::atomic::{AtomicBool, Ordering};
@@ -1055,7 +966,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
  use crate::{
 -    bsp::device_driver::common::MMIODerefWrapper, driver, synchronization,
 -    synchronization::IRQSafeNullLock,
-+    bsp::device_driver::common::MMIODerefWrapper, driver, memory, memory::mmu::Physical,
++    bsp::device_driver::common::MMIODerefWrapper, driver, memory, memory::Physical,
 +    synchronization, synchronization::IRQSafeNullLock,
  };
 +use core::sync::atomic::{AtomicUsize, Ordering};
@@ -1153,7 +1064,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
      bsp::device_driver::common::MMIODerefWrapper,
 -    exception, synchronization,
 +    driver, exception, memory,
-+    memory::mmu::Physical,
++    memory::Physical,
 +    synchronization,
      synchronization::{IRQSafeNullLock, InitStateLock},
  };
@@ -1242,7 +1153,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
  mod peripheral_ic;
 
 -use crate::{driver, exception};
-+use crate::{driver, exception, memory, memory::mmu::Physical};
++use crate::{driver, exception, memory, memory::Physical};
 
  //--------------------------------------------------------------------------------------------------
  // Private Definitions
@@ -1285,7 +1196,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
 -    bsp, bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, exception,
 -    synchronization, synchronization::IRQSafeNullLock,
 +    bsp, bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, exception, memory,
-+    memory::mmu::Physical, synchronization, synchronization::IRQSafeNullLock,
++    memory::Physical, synchronization, synchronization::IRQSafeNullLock,
 +};
 +use core::{
 +    fmt,
@@ -1468,7 +1379,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld 15_vir
 diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
 --- 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +++ 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
-@@ -4,77 +4,128 @@
+@@ -4,70 +4,131 @@
 
  //! BSP Memory Management Unit.
 
@@ -1480,9 +1391,10 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +    memory::{
 +        mmu as kernel_mmu,
 +        mmu::{
-+            interface, AccessPermissions, AttributeFields, Granule64KiB, MemAttributes, Page,
-+            PageSliceDescriptor, Physical, Virtual,
++            AccessPermissions, AddressSpaceSize, AttributeFields, MemAttributes, Page,
++            PageSliceDescriptor, TranslationGranule,
 +        },
++        Physical, Virtual,
 +    },
 +};
 
@@ -1490,13 +1402,19 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
  // Public Definitions
  //--------------------------------------------------------------------------------------------------
 
--const NUM_MEM_RANGES: usize = 2;
+-/// The address space size chosen by this BSP.
+-pub type KernelAddrSpaceSize = AddressSpaceSize<{ memory_map::END_INCLUSIVE + 1 }>;
 -
+-const NUM_MEM_RANGES: usize = 2;
++/// The translation granule chosen by this BSP. This will be used everywhere else in the kernel to
++/// derive respective data structures and their sizes. For example, the `crate::memory::mmu::Page`.
++pub type KernelGranule = TranslationGranule<{ 64 * 1024 }>;
+
 -/// The virtual memory layout.
 -///
 -/// The layout must contain only special ranges, aka anything that is _not_ normal cacheable DRAM.
 -/// It is agnostic of the paging granularity that the architecture's MMU will use.
--pub static LAYOUT: KernelVirtualLayout<{ NUM_MEM_RANGES }> = KernelVirtualLayout::new(
+-pub static LAYOUT: KernelVirtualLayout<NUM_MEM_RANGES> = KernelVirtualLayout::new(
 -    memory_map::END_INCLUSIVE,
 -    [
 -        TranslationDescriptor {
@@ -1521,15 +1439,17 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 -        },
 -    ],
 -);
-+/// The translation granule chosen by this BSP. This will be used everywhere else in the kernel to
-+/// derive respective data structures and their sizes. For example, the `crate::memory::mmu::Page`.
-+pub type KernelGranule = Granule64KiB;
++/// The address space size chosen by this BSP.
++pub type KernelVirtAddrSpaceSize = AddressSpaceSize<{ 8 * 1024 * 1024 * 1024 }>;
 
  //--------------------------------------------------------------------------------------------------
  // Private Code
  //--------------------------------------------------------------------------------------------------
-+use interface::TranslationGranule;
-+
+
+-fn ro_range_inclusive() -> RangeInclusive<usize> {
+-    // Notice the subtraction to turn the exclusive end into an inclusive end.
+-    #[allow(clippy::range_minus_one)]
+-    RangeInclusive::new(super::ro_start(), super::ro_end() - 1)
 +/// Helper function for calculating the number of pages the given parameter spans.
 +const fn size_to_num_pages(size: usize) -> usize {
 +    assert!(size > 0);
@@ -1555,11 +1475,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +/// The data pages of the kernel binary.
 +fn virt_data_page_desc() -> PageSliceDescriptor<Virtual> {
 +    let num_pages = size_to_num_pages(super::data_size());
-
--fn ro_range_inclusive() -> RangeInclusive<usize> {
--    // Notice the subtraction to turn the exclusive end into an inclusive end.
--    #[allow(clippy::range_minus_one)]
--    RangeInclusive::new(super::ro_start(), super::ro_end() - 1)
++
 +    PageSliceDescriptor::from_addr(super::virt_data_start(), num_pages)
  }
 
@@ -1586,7 +1502,9 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
  // Public Code
  //--------------------------------------------------------------------------------------------------
 
--/// Return the address space size in bytes.
+-/// Return a reference to the virtual memory layout.
+-pub fn virt_mem_layout() -> &'static KernelVirtualLayout<NUM_MEM_RANGES> {
+-    &LAYOUT
 +/// Pointer to the last page of the physical address space.
 +pub fn phys_addr_space_end_page() -> *const Page<Physical> {
 +    common::align_down(
@@ -1598,44 +1516,35 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +/// Map the kernel binary.
 +///
 +/// # Safety
- ///
--/// Guarantees size to be a power of two.
--pub const fn addr_space_size() -> usize {
--    let size = memory_map::END_INCLUSIVE + 1;
--    assert!(size.is_power_of_two());
++///
 +/// - Any miscalculation or attribute error will likely be fatal. Needs careful manual checking.
 +pub unsafe fn kernel_map_binary() -> Result<(), &'static str> {
 +    kernel_mmu::kernel_map_pages_at(
 +        "Kernel boot-core stack",
-+        &phys_stack_page_desc(),
 +        &virt_stack_page_desc(),
++        &phys_stack_page_desc(),
 +        &AttributeFields {
 +            mem_attributes: MemAttributes::CacheableDRAM,
 +            acc_perms: AccessPermissions::ReadWrite,
 +            execute_never: true,
 +        },
 +    )?;
-
--    size
--}
++
 +    kernel_mmu::kernel_map_pages_at(
 +        "Kernel code and RO data",
-+        &phys_ro_page_desc(),
 +        &virt_ro_page_desc(),
++        &phys_ro_page_desc(),
 +        &AttributeFields {
 +            mem_attributes: MemAttributes::CacheableDRAM,
 +            acc_perms: AccessPermissions::ReadOnly,
 +            execute_never: false,
 +        },
 +    )?;
-
--/// Return a reference to the virtual memory layout.
--pub fn virt_mem_layout() -> &'static KernelVirtualLayout<{ NUM_MEM_RANGES }> {
--    &LAYOUT
++
 +    kernel_mmu::kernel_map_pages_at(
 +        "Kernel data and bss",
-+        &phys_data_page_desc(),
 +        &virt_data_page_desc(),
++        &phys_data_page_desc(),
 +        &AttributeFields {
 +            mem_attributes: MemAttributes::CacheableDRAM,
 +            acc_perms: AccessPermissions::ReadWrite,
@@ -1647,19 +1556,19 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -89,14 +140,12 @@
+@@ -82,14 +143,12 @@
      /// Check alignment of the kernel's virtual memory layout sections.
      #[kernel_test]
      fn virt_mem_layout_sections_are_64KiB_aligned() {
 -        const SIXTYFOUR_KIB: usize = 65536;
--
--        for i in LAYOUT.inner().iter() {
--            let start: usize = *(i.virtual_range)().start();
--            let end: usize = *(i.virtual_range)().end() + 1;
 +        for i in [virt_stack_page_desc, virt_ro_page_desc, virt_data_page_desc].iter() {
 +            let start: usize = i().start_addr().into_usize();
 +            let end: usize = i().end_addr().into_usize();
 
+-        for i in LAYOUT.inner().iter() {
+-            let start: usize = *(i.virtual_range)().start();
+-            let end: usize = *(i.virtual_range)().end() + 1;
+-
 -            assert_eq!(start modulo SIXTYFOUR_KIB, 0);
 -            assert_eq!(end modulo SIXTYFOUR_KIB, 0);
 +            assert_eq!(start modulo KernelGranule::SIZE, 0);
@@ -1667,7 +1576,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
              assert!(end >= start);
          }
      }
-@@ -104,17 +153,18 @@
+@@ -97,17 +156,18 @@
      /// Ensure the kernel's virtual memory layout is free of overlaps.
      #[kernel_test]
      fn virt_mem_layout_has_no_overlaps() {
@@ -1739,7 +1648,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 15_v
 
  pub mod mmu;
 
-+use crate::memory::mmu::{Address, Physical, Virtual};
++use crate::memory::{Address, Physical, Virtual};
  use core::{cell::UnsafeCell, ops::RangeInclusive};
 
  //--------------------------------------------------------------------------------------------------
@@ -2030,7 +1939,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/driver.rs 15_virtual_mem_part2
 diff -uNr 14_exceptions_part2_peripheral_IRQs/src/lib.rs 15_virtual_mem_part2_mmio_remap/src/lib.rs
 --- 14_exceptions_part2_peripheral_IRQs/src/lib.rs
 +++ 15_virtual_mem_part2_mmio_remap/src/lib.rs
-@@ -113,6 +113,7 @@
+@@ -110,6 +110,7 @@
 
  #![allow(incomplete_features)]
  #![feature(asm)]
@@ -2038,7 +1947,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/lib.rs 15_virtual_mem_part2_mm
  #![feature(const_fn_fn_ptr_basics)]
  #![feature(const_generics)]
  #![feature(const_panic)]
-@@ -137,6 +138,7 @@
+@@ -131,6 +132,7 @@
  mod synchronization;
 
  pub mod bsp;
@@ -2151,8 +2060,8 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/mapping_record.rs 1
 +impl MappingRecordEntry {
 +    pub fn new(
 +        name: &'static str,
-+        phys_pages: &PageSliceDescriptor<Physical>,
 +        virt_pages: &PageSliceDescriptor<Virtual>,
++        phys_pages: &PageSliceDescriptor<Physical>,
 +        attr: &AttributeFields,
 +    ) -> Self {
 +        Self {
@@ -2206,13 +2115,13 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/mapping_record.rs 1
 +    pub fn add(
 +        &mut self,
 +        name: &'static str,
-+        phys_pages: &PageSliceDescriptor<Physical>,
 +        virt_pages: &PageSliceDescriptor<Virtual>,
++        phys_pages: &PageSliceDescriptor<Physical>,
 +        attr: &AttributeFields,
 +    ) -> Result<(), &'static str> {
 +        let x = self.find_next_free()?;
 +
-+        *x = Some(MappingRecordEntry::new(name, phys_pages, virt_pages, attr));
++        *x = Some(MappingRecordEntry::new(name, virt_pages, phys_pages, attr));
 +        Ok(())
 +    }
 +
@@ -2300,11 +2209,11 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/mapping_record.rs 1
 +/// Add an entry to the mapping info record.
 +pub fn kernel_add(
 +    name: &'static str,
-+    phys_pages: &PageSliceDescriptor<Physical>,
 +    virt_pages: &PageSliceDescriptor<Virtual>,
++    phys_pages: &PageSliceDescriptor<Physical>,
 +    attr: &AttributeFields,
 +) -> Result<(), &'static str> {
-+    KERNEL_MAPPING_RECORD.write(|mr| mr.add(name, phys_pages, virt_pages, attr))
++    KERNEL_MAPPING_RECORD.write(|mr| mr.add(name, virt_pages, phys_pages, attr))
 +}
 +
 +pub fn kernel_find_and_insert_mmio_duplicate(
@@ -2329,41 +2238,134 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/mapping_record.rs 1
 +    KERNEL_MAPPING_RECORD.read(|mr| mr.print());
 +}
 
-diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 15_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
---- 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs
-+++ 15_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
-@@ -0,0 +1,283 @@
-+// SPDX-License-Identifier: MIT OR Apache-2.0
-+//
-+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
-+
-+//! Memory Management Unit Types.
+diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.rs 15_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs
+--- 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.rs
++++ 15_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs
+@@ -8,7 +8,104 @@
+ #[path = "../../_arch/aarch64/memory/mmu/translation_table.rs"]
+ mod arch_translation_table;
+
++use crate::memory::{
++    mmu::{AttributeFields, PageSliceDescriptor},
++    Address, Physical, Virtual,
++};
 +
-+use crate::{bsp, common};
-+use core::{convert::From, marker::PhantomData, ops::RangeInclusive};
+ //--------------------------------------------------------------------------------------------------
+ // Architectural Public Reexports
+ //--------------------------------------------------------------------------------------------------
+ pub use arch_translation_table::KernelTranslationTable;
 +
 +//--------------------------------------------------------------------------------------------------
 +// Public Definitions
 +//--------------------------------------------------------------------------------------------------
-+use super::interface::TranslationGranule;
 +
-+/// Metadata trait for marking the type of an address.
-+pub trait AddressType: Copy + Clone + PartialOrd + PartialEq {}
++/// Translation table interfaces.
++pub mod interface {
++    use super::*;
 +
-+/// Zero-sized type to mark a physical address.
-+#[derive(Copy, Clone, PartialOrd, PartialEq)]
-+pub enum Physical {}
++    /// Translation table operations.
++    pub trait TranslationTable {
++        /// Anything that needs to run before any of the other provided functions can be used.
++        ///
++        /// # Safety
++        ///
++        /// - Implementor must ensure that this function can run only once or is harmless if invoked
++        ///   multiple times.
++        unsafe fn init(&mut self);
 +
-+/// Zero-sized type to mark a virtual address.
-+#[derive(Copy, Clone, PartialOrd, PartialEq)]
-+pub enum Virtual {}
++        /// The translation table's base address to be used for programming the MMU.
++        fn phys_base_address(&self) -> Address<Physical>;
 +
-+/// Generic address type.
-+#[derive(Copy, Clone, PartialOrd, PartialEq)]
-+pub struct Address<ATYPE: AddressType> {
-+    value: usize,
-+    _address_type: PhantomData<ATYPE>,
++        /// Map the given virtual pages to the given physical pages.
++        ///
++        /// # Safety
++        ///
++        /// - Using wrong attributes can cause multiple issues of different nature in the system.
++        /// - It is not required that the architectural implementation prevents aliasing. That is,
++        ///   mapping to the same physical memory using multiple virtual addresses, which would
++        ///   break Rust's ownership assumptions. This should be protected against in the kernel's
++        ///   generic MMU code.
++        unsafe fn map_pages_at(
++            &mut self,
++            virt_pages: &PageSliceDescriptor<Virtual>,
++            phys_pages: &PageSliceDescriptor<Physical>,
++            attr: &AttributeFields,
++        ) -> Result<(), &'static str>;
++
++        /// Obtain a free virtual page slice in the MMIO region.
++        ///
++        /// The "MMIO region" is a distinct region of the implementor's choice, which allows
++        /// differentiating MMIO addresses from others. This can speed up debugging efforts.
++        /// Ideally, those MMIO addresses are also standing out visually so that a human eye can
++        /// identify them. For example, by allocating them from near the end of the virtual address
++        /// space.
++        fn next_mmio_virt_page_slice(
++            &mut self,
++            num_pages: usize,
++        ) -> Result<PageSliceDescriptor<Virtual>, &'static str>;
++
++        /// Check if a virtual page splice is in the "MMIO region".
++        fn is_virt_page_slice_mmio(&self, virt_pages: &PageSliceDescriptor<Virtual>) -> bool;
++    }
++}
++
++//--------------------------------------------------------------------------------------------------
++// Testing
++//--------------------------------------------------------------------------------------------------
++
++#[cfg(test)]
++mod tests {
++    use super::*;
++    use crate::bsp;
++    use arch_translation_table::MinSizeKernelTranslationTable;
++    use interface::TranslationTable;
++    use test_macros::kernel_test;
++
++    /// Sanity checks for the kernel TranslationTable implementation.
++    #[kernel_test]
++    fn translationtable_implementation_sanity() {
++        // Need to take care that `tables` fits into the stack.
++        let mut tables = MinSizeKernelTranslationTable::new();
++
++        unsafe { tables.init() };
++
++        let x = tables.next_mmio_virt_page_slice(0);
++        assert!(x.is_err());
++
++        let x = tables.next_mmio_virt_page_slice(1_0000_0000);
++        assert!(x.is_err());
++
++        let x = tables.next_mmio_virt_page_slice(2).unwrap();
++        assert_eq!(x.size(), bsp::memory::mmu::KernelGranule::SIZE * 2);
++
++        assert_eq!(tables.is_virt_page_slice_mmio(&x), true);
++
++        assert_eq!(
++            tables.is_virt_page_slice_mmio(&PageSliceDescriptor::from_addr(Address::new(0), 1)),
++            false
++        );
++    }
 +}
+
+diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 15_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
+--- 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs
++++ 15_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
+@@ -0,0 +1,213 @@
++// SPDX-License-Identifier: MIT OR Apache-2.0
++//
++// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
++
++//! Memory Management Unit types.
++
++use crate::{
++    bsp, common,
++    memory::{Address, AddressType, Physical, Virtual},
++};
++use core::{convert::From, marker::PhantomData, ops::RangeInclusive};
++
++//--------------------------------------------------------------------------------------------------
++// Public Definitions
++//--------------------------------------------------------------------------------------------------
 +
 +/// Generic page type.
 +#[repr(C)]
@@ -2415,60 +2417,6 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 15_virtual
 +// Public Code
 +//--------------------------------------------------------------------------------------------------
 +
-+impl AddressType for Physical {}
-+impl AddressType for Virtual {}
-+
-+//------------------------------------------------------------------------------
-+// Address
-+//------------------------------------------------------------------------------
-+
-+impl<ATYPE: AddressType> Address<ATYPE> {
-+    /// Create an instance.
-+    pub const fn new(value: usize) -> Self {
-+        Self {
-+            value,
-+            _address_type: PhantomData,
-+        }
-+    }
-+
-+    /// Align down.
-+    pub const fn align_down(self, alignment: usize) -> Self {
-+        let aligned = common::align_down(self.value, alignment);
-+
-+        Self {
-+            value: aligned,
-+            _address_type: PhantomData,
-+        }
-+    }
-+
-+    /// Converts `Address` into an usize.
-+    pub const fn into_usize(self) -> usize {
-+        self.value
-+    }
-+}
-+
-+impl<ATYPE: AddressType> core::ops::Add<usize> for Address<ATYPE> {
-+    type Output = Self;
-+
-+    fn add(self, other: usize) -> Self {
-+        Self {
-+            value: self.value + other,
-+            _address_type: PhantomData,
-+        }
-+    }
-+}
-+
-+impl<ATYPE: AddressType> core::ops::Sub<usize> for Address<ATYPE> {
-+    type Output = Self;
-+
-+    fn sub(self, other: usize) -> Self {
-+        Self {
-+            value: self.value - other,
-+            _address_type: PhantomData,
-+        }
-+    }
-+}
-+
 +//------------------------------------------------------------------------------
 +// Page
 +//------------------------------------------------------------------------------
@@ -2620,14 +2568,14 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 15_virtual
 diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 15_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
 --- 14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs
 +++ 15_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
-@@ -3,23 +3,18 @@
+@@ -3,29 +3,22 @@
  // Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
  //! Memory Management Unit.
 -//!
 -//! In order to decouple `BSP` and `arch` parts of the MMU code (to keep them pluggable), this file
--//! provides types for composing an architecture-agnostic description of the kernel 's virtual
--//! memory layout.
+-//! provides types for composing an architecture-agnostic description of the kernel's virtual memory
+-//! layout.
 -//!
 -//! The `BSP` provides such a description through the `bsp::memory::mmu::virt_mem_layout()`
 -//! function.
@@ -2638,76 +2586,31 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 15_virtual_mem_p
  #[cfg(target_arch = "aarch64")]
  #[path = "../_arch/aarch64/memory/mmu.rs"]
  mod arch_mmu;
- pub use arch_mmu::*;
 
--use core::{fmt, ops::RangeInclusive};
 +mod mapping_record;
+ mod translation_table;
 +mod types;
-+
-+use crate::{bsp, synchronization, warn};
-+
+
+-use core::{fmt, ops::RangeInclusive};
++use crate::{
++    bsp,
++    memory::{Address, Physical, Virtual},
++    synchronization, warn,
++};
+
+-//--------------------------------------------------------------------------------------------------
+-// Architectural Public Reexports
+-//--------------------------------------------------------------------------------------------------
+-pub use arch_mmu::mmu;
 +pub use types::*;
 
  //--------------------------------------------------------------------------------------------------
  // Public Definitions
-@@ -27,178 +22,229 @@
+@@ -33,16 +26,20 @@
 
  /// Memory Management interfaces.
  pub mod interface {
 +    use super::*;
-+
-+    /// Describes the characteristics of a translation granule.
-+    #[allow(missing_docs)]
-+    pub trait TranslationGranule {
-+        const SIZE: usize;
-+        const MASK: usize = Self::SIZE - 1;
-+        const SHIFT: usize;
-+    }
-+
-+    /// Translation table operations.
-+    pub trait TranslationTable {
-+        /// Anything that needs to run before any of the other provided functions can be used.
-+        ///
-+        /// # Safety
-+        ///
-+        /// - Implementor must ensure that this function can run only once or is harmless if invoked
-+        ///   multiple times.
-+        unsafe fn init(&mut self);
-+
-+        /// The translation table's base address to be used for programming the MMU.
-+        fn phys_base_address(&self) -> Address<Physical>;
-+
-+        /// Map the given physical pages to the given virtual pages.
-+        ///
-+        /// # Safety
-+        ///
-+        /// - Using wrong attributes can cause multiple issues of different nature in the system.
-+        /// - It is not required that the architectural implementation prevents aliasing. That is,
-+        ///   mapping to the same physical memory using multiple virtual addresses, which would
-+        ///   break Rust's ownership assumptions. This should be protected against in this module
-+        ///   (the kernel's generic MMU code).
-+        unsafe fn map_pages_at(
-+            &mut self,
-+            phys_pages: &PageSliceDescriptor<Physical>,
-+            virt_pages: &PageSliceDescriptor<Virtual>,
-+            attr: &AttributeFields,
-+        ) -> Result<(), &'static str>;
-+
-+        /// Obtain a free virtual page slice in the MMIO region.
-+        ///
-+        /// The "MMIO region" is a distinct region of the implementor's choice, which allows
-+        /// differentiating MMIO addresses from others. This can speed up debugging efforts.
-+        /// Ideally, those MMIO addresses are also standing out visually so that a human eye can
-+        /// identify them. For example, by allocating them from near the end of the virtual address
-+        /// space.
-+        fn next_mmio_virt_page_slice(
-+            &mut self,
-+            num_pages: usize,
-+        ) -> Result<PageSliceDescriptor<Virtual>, &'static str>;
-+
-+        /// Check if a virtual page splice is in the "MMIO region".
-+        fn is_virt_page_slice_mmio(&self, virt_pages: &PageSliceDescriptor<Virtual>) -> bool;
-+    }
 
      /// MMU functions.
      pub trait MMU {
@@ -2722,11 +2625,15 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 15_virtual_mem_p
 -        unsafe fn init(&self) -> Result<(), &'static str>;
 +        unsafe fn enable(
 +            &self,
-+            phys_kernel_table_base_addr: Address<Physical>,
++            kernel_table_phys_base_addr: Address<Physical>,
 +        ) -> Result<(), &'static str>;
      }
  }
 
+@@ -52,55 +49,35 @@
+ /// Describes the size of an address space.
+ pub struct AddressSpaceSize<const AS_SIZE: usize>;
+
 -/// Architecture agnostic translation types.
 -#[allow(missing_docs)]
 -#[derive(Copy, Clone)]
@@ -2742,12 +2649,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 15_virtual_mem_p
 -    CacheableDRAM,
 -    Device,
 -}
-+//--------------------------------------------------------------------------------------------------
-+// Private Code
-+//--------------------------------------------------------------------------------------------------
-+use interface::{TranslationTable, MMU};
-+use synchronization::interface::ReadWriteEx;
-
+-
 -/// Architecture agnostic access permissions.
 -#[allow(missing_docs)]
 -#[derive(Copy, Clone)]
@@ -2755,23 +2657,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 15_virtual_mem_p
 -    ReadOnly,
 -    ReadWrite,
 -}
-+/// Map pages in the kernel's translation tables.
-+///
-+/// No input checks done, input is passed through to the architectural implementation.
-+///
-+/// # Safety
-+///
-+/// - See `map_pages_at()`.
-+/// - Does not prevent aliasing.
-+unsafe fn kernel_map_pages_at_unchecked(
-+    name: &'static str,
-+    phys_pages: &PageSliceDescriptor<Physical>,
-+    virt_pages: &PageSliceDescriptor<Virtual>,
-+    attr: &AttributeFields,
-+) -> Result<(), &'static str> {
-+    arch_mmu::kernel_translation_tables()
-+        .write(|tables| tables.map_pages_at(phys_pages, virt_pages, attr))?;
-
+-
 -/// Collection of memory attributes.
 -#[allow(missing_docs)]
 -#[derive(Copy, Clone)]
@@ -2780,10 +2666,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 15_virtual_mem_p
 -    pub acc_perms: AccessPermissions,
 -    pub execute_never: bool,
 -}
-+    if let Err(x) = mapping_record::kernel_add(name, phys_pages, virt_pages, attr) {
-+        warn!("{}", x);
-+    }
-
+-
 -/// Architecture agnostic descriptor for a memory range.
 -#[allow(missing_docs)]
 -pub struct TranslationDescriptor {
@@ -2791,111 +2674,59 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 15_virtual_mem_p
 -    pub virtual_range: fn() -> RangeInclusive<usize>,
 -    pub physical_range_translation: Translation,
 -    pub attribute_fields: AttributeFields,
-+    Ok(())
- }
-
+-}
+-
 -/// Type for expressing the kernel's virtual memory layout.
 -pub struct KernelVirtualLayout<const NUM_SPECIAL_RANGES: usize> {
 -    /// The last (inclusive) address of the address space.
 -    max_virt_addr_inclusive: usize,
 +//--------------------------------------------------------------------------------------------------
-+// Public Code
++// Private Code
 +//--------------------------------------------------------------------------------------------------
-+use interface::TranslationGranule;
-
--    /// Array of descriptors for non-standard (normal cacheable DRAM) memory regions.
--    inner: [TranslationDescriptor; NUM_SPECIAL_RANGES],
-+/// Raw mapping of virtual to physical pages in the kernel translation tables.
++use interface::MMU;
++use synchronization::interface::ReadWriteEx;
++use translation_table::interface::TranslationTable;
++
++/// Map pages in the kernel's translation tables.
 +///
-+/// Prevents mapping into the MMIO range of the tables.
++/// No input checks done, input is passed through to the architectural implementation.
 +///
 +/// # Safety
 +///
-+/// - See `kernel_map_pages_at_unchecked()`.
-+/// - Does not prevent aliasing. Currently, we have to trust the callers.
-+pub unsafe fn kernel_map_pages_at(
-+    name: &'static str,
-+    phys_pages: &PageSliceDescriptor<Physical>,
++/// - See `map_pages_at()`.
++/// - Does not prevent aliasing.
++unsafe fn kernel_map_pages_at_unchecked(
++    name: &'static str,
 +    virt_pages: &PageSliceDescriptor<Virtual>,
++    phys_pages: &PageSliceDescriptor<Physical>,
 +    attr: &AttributeFields,
 +) -> Result<(), &'static str> {
-+    let is_mmio = arch_mmu::kernel_translation_tables()
-+        .read(|tables| tables.is_virt_page_slice_mmio(virt_pages));
-+    if is_mmio {
-+        return Err("Attempt to manually map into MMIO region");
-+    }
-+
-+    kernel_map_pages_at_unchecked(name, phys_pages, virt_pages, attr)?;
++    arch_mmu::kernel_translation_tables()
++        .write(|tables| tables.map_pages_at(virt_pages, phys_pages, attr))?;
 +
++    if let Err(x) = mapping_record::kernel_add(name, virt_pages, phys_pages, attr) {
++        warn!("{}", x);
++    }
+
+-    /// Array of descriptors for non-standard (normal cacheable DRAM) memory regions.
+-    inner: [TranslationDescriptor; NUM_SPECIAL_RANGES],
 +    Ok(())
-+}
-+
-+/// MMIO remapping in the kernel translation tables.
-+///
-+/// Typically used by device drivers.
-+///
-+/// # Safety
-+///
-+/// - Same as `kernel_map_pages_at_unchecked()`, minus the aliasing part.
-+pub unsafe fn kernel_map_mmio(
-+    name: &'static str,
-+    phys_mmio_descriptor: &MMIODescriptor<Physical>,
-+) -> Result<Address<Virtual>, &'static str> {
-+    let phys_pages: PageSliceDescriptor<Physical> = phys_mmio_descriptor.clone().into();
-+    let offset_into_start_page =
-+        phys_mmio_descriptor.start_addr().into_usize() & bsp::memory::mmu::KernelGranule::MASK;
-+
-+    // Check if an identical page slice has been mapped for another driver. If so, reuse it.
-+    let virt_addr = if let Some(addr) =
-+        mapping_record::kernel_find_and_insert_mmio_duplicate(phys_mmio_descriptor, name)
-+    {
-+        addr
-+    // Otherwise, allocate a new virtual page slice and map it.
-+    } else {
-+        let virt_pages: PageSliceDescriptor<Virtual> = arch_mmu::kernel_translation_tables()
-+            .write(|tables| tables.next_mmio_virt_page_slice(phys_pages.num_pages()))?;
-+
-+        kernel_map_pages_at_unchecked(
-+            name,
-+            &phys_pages,
-+            &virt_pages,
-+            &AttributeFields {
-+                mem_attributes: MemAttributes::Device,
-+                acc_perms: AccessPermissions::ReadWrite,
-+                execute_never: true,
-+            },
-+        )?;
-+
-+        virt_pages.start_addr()
-+    };
-+
-+    Ok(virt_addr + offset_into_start_page)
-+}
-+
-+/// Map the kernel's binary and enable the MMU.
-+///
-+/// # Safety
-+///
-+/// - Crucial function during kernel init. Changes the the complete memory view of the processor.
-+pub unsafe fn kernel_map_binary_and_enable_mmu() -> Result<(), &'static str> {
-+    let phys_base_addr = arch_mmu::kernel_translation_tables().write(|tables| {
-+        tables.init();
-+        tables.phys_base_address()
-+    });
-+
-+    bsp::memory::mmu::kernel_map_binary()?;
-+    arch_mmu::mmu().enable(phys_base_addr)
-+}
-+
-+/// Human-readable print of all recorded kernel mappings.
-+pub fn kernel_print_mappings() {
-+    mapping_record::kernel_print()
  }
 
  //--------------------------------------------------------------------------------------------------
--// Public Code
-+// Testing
- //--------------------------------------------------------------------------------------------------
+@@ -111,6 +88,9 @@
+     /// The granule's size.
+     pub const SIZE: usize = Self::size_checked();
+
++    /// The granule's mask.
++    pub const MASK: usize = Self::SIZE - 1;
++
+     /// The granule's shift, aka log2(size).
+     pub const SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
+
+@@ -142,110 +122,89 @@
+     }
+ }
 
 -impl Default for AttributeFields {
 -    fn default() -> AttributeFields {
@@ -3002,37 +2833,185 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 15_virtual_mem_p
 -    #[cfg(test)]
 -    pub fn inner(&self) -> &[TranslationDescriptor; NUM_SPECIAL_RANGES] {
 -        &self.inner
-+#[cfg(test)]
-+mod tests {
-+    use super::*;
-+    use test_macros::kernel_test;
+-    }
++/// Raw mapping of virtual to physical pages in the kernel translation tables.
++///
++/// Prevents mapping into the MMIO range of the tables.
++///
++/// # Safety
++///
++/// - See `kernel_map_pages_at_unchecked()`.
++/// - Does not prevent aliasing. Currently, the callers must be trusted.
++pub unsafe fn kernel_map_pages_at(
++    name: &'static str,
++    virt_pages: &PageSliceDescriptor<Virtual>,
++    phys_pages: &PageSliceDescriptor<Physical>,
++    attr: &AttributeFields,
++) -> Result<(), &'static str> {
++    let is_mmio = arch_mmu::kernel_translation_tables()
++        .read(|tables| tables.is_virt_page_slice_mmio(virt_pages));
++    if is_mmio {
++        return Err("Attempt to manually map into MMIO region");
++    }
 +
-+    /// Sanity checks for the kernel TranslationTable implementation.
-+    #[kernel_test]
-+    fn translationtable_implementation_sanity() {
-+        // Need to take care that `tables` fits into the stack.
-+        let mut tables = MinSizeArchTranslationTable::new();
++    kernel_map_pages_at_unchecked(name, virt_pages, phys_pages, attr)?;
 +
-+        unsafe { tables.init() };
++    Ok(())
++}
 +
-+        let x = tables.next_mmio_virt_page_slice(0);
-+        assert!(x.is_err());
++/// MMIO remapping in the kernel translation tables.
++///
++/// Typically used by device drivers.
++///
++/// # Safety
++///
++/// - Same as `kernel_map_pages_at_unchecked()`, minus the aliasing part.
++pub unsafe fn kernel_map_mmio(
++    name: &'static str,
++    phys_mmio_descriptor: &MMIODescriptor<Physical>,
++) -> Result<Address<Virtual>, &'static str> {
++    let phys_pages: PageSliceDescriptor<Physical> = phys_mmio_descriptor.clone().into();
++    let offset_into_start_page =
++        phys_mmio_descriptor.start_addr().into_usize() & bsp::memory::mmu::KernelGranule::MASK;
 +
-+        let x = tables.next_mmio_virt_page_slice(1_0000_0000);
-+        assert!(x.is_err());
++    // Check if an identical page slice has been mapped for another driver. If so, reuse it.
++    let virt_addr = if let Some(addr) =
++        mapping_record::kernel_find_and_insert_mmio_duplicate(phys_mmio_descriptor, name)
++    {
++        addr
++    // Otherwise, allocate a new virtual page slice and map it.
++    } else {
++        let virt_pages: PageSliceDescriptor<Virtual> = arch_mmu::kernel_translation_tables()
++            .write(|tables| tables.next_mmio_virt_page_slice(phys_pages.num_pages()))?;
 +
-+        let x = tables.next_mmio_virt_page_slice(2).unwrap();
-+        assert_eq!(x.size(), bsp::memory::mmu::KernelGranule::SIZE * 2);
++        kernel_map_pages_at_unchecked(
++            name,
++            &virt_pages,
++            &phys_pages,
++            &AttributeFields {
++                mem_attributes: MemAttributes::Device,
++                acc_perms: AccessPermissions::ReadWrite,
++                execute_never: true,
++            },
++        )?;
 +
-+        assert_eq!(tables.is_virt_page_slice_mmio(&x), true);
++        virt_pages.start_addr()
++    };
 +
-+        assert_eq!(
-+            tables.is_virt_page_slice_mmio(&PageSliceDescriptor::from_addr(Address::new(0), 1)),
-+            false
-+        );
-     }
++    Ok(virt_addr + offset_into_start_page)
++}
++
++/// Map the kernel's binary and enable the MMU.
++///
++/// # Safety
++///
++/// - Crucial function during kernel init. Changes the the complete memory view of the processor.
++pub unsafe fn kernel_map_binary_and_enable_mmu() -> Result<(), &'static str> {
++    let phys_base_addr = arch_mmu::kernel_translation_tables().write(|tables| {
++        tables.init();
++        tables.phys_base_address()
++    });
++
++    bsp::memory::mmu::kernel_map_binary()?;
++    arch_mmu::mmu().enable(phys_base_addr)
++}
++
++/// Human-readable print of all recorded kernel mappings.
++pub fn kernel_print_mappings() {
++    mapping_record::kernel_print()
  }
 
+diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory.rs 15_virtual_mem_part2_mmio_remap/src/memory.rs
+--- 14_exceptions_part2_peripheral_IRQs/src/memory.rs
++++ 15_virtual_mem_part2_mmio_remap/src/memory.rs
+@@ -6,12 +6,85 @@
+
+ pub mod mmu;
+
+-use core::ops::RangeInclusive;
++use crate::common;
++use core::{marker::PhantomData, ops::RangeInclusive};
++
++//--------------------------------------------------------------------------------------------------
++// Public Definitions
++//--------------------------------------------------------------------------------------------------
++
++/// Metadata trait for marking the type of an address.
++pub trait AddressType: Copy + Clone + PartialOrd + PartialEq {}
++
++/// Zero-sized type to mark a physical address.
++#[derive(Copy, Clone, PartialOrd, PartialEq)]
++pub enum Physical {}
++
++/// Zero-sized type to mark a virtual address.
++#[derive(Copy, Clone, PartialOrd, PartialEq)]
++pub enum Virtual {}
++
++/// Generic address type.
++#[derive(Copy, Clone, PartialOrd, PartialEq)]
++pub struct Address<ATYPE: AddressType> {
++    value: usize,
++    _address_type: PhantomData<fn() -> ATYPE>,
++}
+
+ //--------------------------------------------------------------------------------------------------
+ // Public Code
+ //--------------------------------------------------------------------------------------------------
+
++impl AddressType for Physical {}
++impl AddressType for Virtual {}
++
++impl<ATYPE: AddressType> Address<ATYPE> {
++    /// Create an instance.
++    pub const fn new(value: usize) -> Self {
++        Self {
++            value,
++            _address_type: PhantomData,
++        }
++    }
++
++    /// Align down.
++    pub const fn align_down(self, alignment: usize) -> Self {
++        let aligned = common::align_down(self.value, alignment);
++
++        Self {
++            value: aligned,
++            _address_type: PhantomData,
++        }
++    }
++
++    /// Converts `Address` into an usize.
++    pub const fn into_usize(self) -> usize {
++        self.value
++    }
++}
++
++impl<ATYPE: AddressType> core::ops::Add<usize> for Address<ATYPE> {
++    type Output = Self;
++
++    fn add(self, other: usize) -> Self {
++        Self {
++            value: self.value + other,
++            _address_type: PhantomData,
++        }
++    }
++}
++
++impl<ATYPE: AddressType> core::ops::Sub<usize> for Address<ATYPE> {
++    type Output = Self;
++
++    fn sub(self, other: usize) -> Self {
++        Self {
++            value: self.value - other,
++            _address_type: PhantomData,
++        }
++    }
++}
++
+ /// Zero out an inclusive memory range.
+ ///
+ /// # Safety
+
 diff -uNr 14_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs 15_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
 --- 14_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs
 +++ 15_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu.rs b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu.rs
index 6ecea1825..948bad747 100644
--- a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu.rs
@@ -3,79 +3,15 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
-
-use crate::{bsp, cpu};
-use cortex_a::{asm, regs::*};
-
-//--------------------------------------------------------------------------------------------------
-// Boot Code
-//--------------------------------------------------------------------------------------------------
-
-/// The entry of the `kernel` binary.
-///
-/// The function must be named `_start`, because the linker is looking for this exact name.
-///
-/// # Safety
-///
-/// - Linker script must ensure to place this function where it is expected by the target machine.
-/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
-///   a stack for EL2.
-#[no_mangle]
-pub unsafe fn _start() -> ! {
-    // Expect the boot core to start in EL2.
-    if (bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id())
-        && (CurrentEL.get() == CurrentEL::EL::EL2.value)
-    {
-        el2_to_el1_transition()
-    } else {
-        // If not core0, infinitely wait for events.
-        wait_forever()
-    }
-}
-
-/// Transition from EL2 to EL1.
-///
-/// # Safety
-///
-/// - The HW state of EL1 must be prepared in a sound way.
-/// - Exception return from EL2 must must continue execution in EL1 with
-///   `runtime_init::runtime_init()`.
-/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
-///   a stack for EL2.
-#[inline(always)]
-unsafe fn el2_to_el1_transition() -> ! {
-    use crate::runtime_init;
-
-    // Enable timer counter registers for EL1.
-    CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
-
-    // No offset for reading the counters.
-    CNTVOFF_EL2.set(0);
-
-    // Set EL1 execution state to AArch64.
-    HCR_EL2.write(HCR_EL2::RW::EL1IsAarch64);
-
-    // Set up a simulated exception return.
-    //
-    // First, fake a saved program status where all interrupts were masked and SP_EL1 was used as a
-    // stack pointer.
-    SPSR_EL2.write(
-        SPSR_EL2::D::Masked
-            + SPSR_EL2::A::Masked
-            + SPSR_EL2::I::Masked
-            + SPSR_EL2::F::Masked
-            + SPSR_EL2::M::EL1h,
-    );
-
-    // Second, let the link register point to runtime_init().
-    ELR_EL2.set(runtime_init::runtime_init as *const () as u64);
-
-    // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it.
-    SP_EL1.set(bsp::memory::phys_boot_core_stack_end().into_usize() as u64);
-
-    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
-    asm::eret()
-}
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::arch_cpu
+
+use cortex_a::asm;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs
new file mode 100644
index 000000000..276965146
--- /dev/null
+++ b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs
@@ -0,0 +1,89 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural boot code.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::boot::arch_boot
+
+use crate::{bsp, cpu};
+use cortex_a::{asm, regs::*};
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// Transition from EL2 to EL1.
+///
+/// # Safety
+///
+/// - The HW state of EL1 must be prepared in a sound way.
+/// - Exception return from EL2 must must continue execution in EL1 with
+///   `runtime_init::runtime_init()`.
+/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
+///   a stack for EL2.
+#[inline(always)]
+unsafe fn el2_to_el1_transition() -> ! {
+    use crate::runtime_init;
+
+    // Enable timer counter registers for EL1.
+    CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
+
+    // No offset for reading the counters.
+    CNTVOFF_EL2.set(0);
+
+    // Set EL1 execution state to AArch64.
+    HCR_EL2.write(HCR_EL2::RW::EL1IsAarch64);
+
+    // Set up a simulated exception return.
+    //
+    // First, fake a saved program status where all interrupts were masked and SP_EL1 was used as a
+    // stack pointer.
+    SPSR_EL2.write(
+        SPSR_EL2::D::Masked
+            + SPSR_EL2::A::Masked
+            + SPSR_EL2::I::Masked
+            + SPSR_EL2::F::Masked
+            + SPSR_EL2::M::EL1h,
+    );
+
+    // Second, let the link register point to runtime_init().
+    ELR_EL2.set(runtime_init::runtime_init as *const () as u64);
+
+    // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it.
+    SP_EL1.set(bsp::memory::phys_boot_core_stack_end().into_usize() as u64);
+
+    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
+    asm::eret()
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The entry of the `kernel` binary.
+///
+/// The function must be named `_start`, because the linker is looking for this exact name.
+///
+/// # Safety
+///
+/// - Linker script must ensure to place this function where it is expected by the target machine.
+/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
+///   a stack for EL2.
+#[no_mangle]
+pub unsafe fn _start() -> ! {
+    // Expect the boot core to start in EL2.
+    if (bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id())
+        && (CurrentEL.get() == CurrentEL::EL::EL2.value)
+    {
+        el2_to_el1_transition()
+    } else {
+        // If not core0, infinitely wait for events.
+        cpu::wait_forever()
+    }
+}
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/smp.rs b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/smp.rs
index c80f7e780..b9fdd0f73 100644
--- a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/smp.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/smp.rs
@@ -3,6 +3,13 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::smp::arch_smp
 
 use cortex_a::regs::*;
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
index 99fbd85bd..5cf9eb5ca 100644
--- a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
@@ -3,6 +3,13 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural synchronous and asynchronous exception handling.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::exception::arch_exception
 
 use crate::{bsp, exception};
 use core::{cell::UnsafeCell, fmt};
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception/asynchronous.rs b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception/asynchronous.rs
index 968eedf34..a4b1a548e 100644
--- a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception/asynchronous.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception/asynchronous.rs
@@ -3,6 +3,13 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural asynchronous exception handling.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::exception::asynchronous::arch_asynchronous
 
 use cortex_a::regs::*;
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
index 8abb997e2..ebf454ce9 100644
--- a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
@@ -5,183 +5,65 @@
 //! Memory Management Unit Driver.
 //!
 //! Only 64 KiB granule is supported.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::memory::mmu::arch_mmu
 
 use crate::{
-    bsp,
+    bsp, memory,
     memory::{
-        mmu,
-        mmu::{
-            AccessPermissions, Address, AddressType, AttributeFields, MemAttributes, Page,
-            PageSliceDescriptor, Physical, Virtual,
-        },
+        mmu::{translation_table::KernelTranslationTable, TranslationGranule},
+        Address, Physical,
     },
     synchronization::InitStateLock,
 };
-use core::convert;
 use cortex_a::{barrier, regs::*};
-use register::{register_bitfields, InMemoryRegister};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
-use mmu::interface::TranslationGranule;
-
-// A table descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-15.
-register_bitfields! {u64,
-    STAGE1_TABLE_DESCRIPTOR [
-        /// Physical address of the next descriptor.
-        NEXT_LEVEL_TABLE_ADDR_64KiB OFFSET(16) NUMBITS(32) [], // [47:16]
-
-        TYPE  OFFSET(1) NUMBITS(1) [
-            Block = 0,
-            Table = 1
-        ],
-
-        VALID OFFSET(0) NUMBITS(1) [
-            False = 0,
-            True = 1
-        ]
-    ]
-}
-
-// A level 3 page descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-17.
-register_bitfields! {u64,
-    STAGE1_PAGE_DESCRIPTOR [
-        /// Unprivileged execute-never.
-        UXN      OFFSET(54) NUMBITS(1) [
-            False = 0,
-            True = 1
-        ],
-
-        /// Privileged execute-never.
-        PXN      OFFSET(53) NUMBITS(1) [
-            False = 0,
-            True = 1
-        ],
-
-        /// Physical address of the next table descriptor (lvl2) or the page descriptor (lvl3).
-        OUTPUT_ADDR_64KiB OFFSET(16) NUMBITS(32) [], // [47:16]
-
-        /// Access flag.
-        AF       OFFSET(10) NUMBITS(1) [
-            False = 0,
-            True = 1
-        ],
-
-        /// Shareability field.
-        SH       OFFSET(8) NUMBITS(2) [
-            OuterShareable = 0b10,
-            InnerShareable = 0b11
-        ],
-
-        /// Access Permissions.
-        AP       OFFSET(6) NUMBITS(2) [
-            RW_EL1 = 0b00,
-            RW_EL1_EL0 = 0b01,
-            RO_EL1 = 0b10,
-            RO_EL1_EL0 = 0b11
-        ],
-
-        /// Memory attributes index into the MAIR_EL1 register.
-        AttrIndx OFFSET(2) NUMBITS(3) [],
-
-        TYPE     OFFSET(1) NUMBITS(1) [
-            Block = 0,
-            Table = 1
-        ],
-
-        VALID    OFFSET(0) NUMBITS(1) [
-            False = 0,
-            True = 1
-        ]
-    ]
-}
-
-/// A table descriptor for 64 KiB aperture.
-///
-/// The output points to the next table.
-#[derive(Copy, Clone)]
-#[repr(transparent)]
-struct TableDescriptor(u64);
-
-/// A page descriptor with 64 KiB aperture.
-///
-/// The output points to physical memory.
-#[derive(Copy, Clone)]
-#[repr(transparent)]
-struct PageDescriptor(u64);
-
-#[derive(Copy, Clone)]
-enum Granule512MiB {}
-
-trait BaseAddr {
-    fn phys_base_addr(&self) -> Address<Physical>;
-}
-
-/// Constants for indexing the MAIR_EL1.
-#[allow(dead_code)]
-mod mair {
-    pub const DEVICE: u64 = 0;
-    pub const NORMAL: u64 = 1;
-}
 
 /// Memory Management Unit type.
 struct MemoryManagementUnit;
 
-/// This constant is the power-of-two exponent that defines the virtual address space size.
-///
-/// Values tested and known to be working:
-///   - 30 (1 GiB)
-///   - 31 (2 GiB)
-///   - 32 (4 GiB)
-///   - 33 (8 GiB)
-const ADDR_SPACE_SIZE_EXPONENT: usize = 33;
-
-const NUM_LVL2_TABLES: usize = (1 << ADDR_SPACE_SIZE_EXPONENT) >> Granule512MiB::SHIFT;
-const T0SZ: u64 = (64 - ADDR_SPACE_SIZE_EXPONENT) as u64;
-
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
-/// Big monolithic struct for storing the translation tables. Individual levels must be 64 KiB
-/// aligned, hence the "reverse" order of appearance.
-#[repr(C)]
-#[repr(align(65536))]
-pub(in crate::memory::mmu) struct FixedSizeTranslationTable<const NUM_TABLES: usize> {
-    /// Page descriptors, covering 64 KiB windows per entry.
-    lvl3: [[PageDescriptor; 8192]; NUM_TABLES],
+pub type Granule512MiB = TranslationGranule<{ 512 * 1024 * 1024 }>;
+pub type Granule64KiB = TranslationGranule<{ 64 * 1024 }>;
 
-    /// Table descriptors, covering 512 MiB windows.
-    lvl2: [TableDescriptor; NUM_TABLES],
+/// The min supported address space size.
+pub const MIN_ADDR_SPACE_SIZE: usize = 1024 * 1024 * 1024; // 1 GiB
 
-    /// Index of the next free MMIO page.
-    cur_l3_mmio_index: usize,
-
-    /// Have the tables been initialized?
-    initialized: bool,
-}
+/// The max supported address space size.
+pub const MAX_ADDR_SPACE_SIZE: usize = 8 * 1024 * 1024 * 1024; // 8 GiB
 
-pub(in crate::memory::mmu) type ArchTranslationTable = FixedSizeTranslationTable<NUM_LVL2_TABLES>;
+/// The supported address space size granule.
+pub type AddrSpaceSizeGranule = Granule512MiB;
 
-// Supported translation granules are exported below, so that BSP code can pick between the options.
-// This driver only supports 64 KiB at the moment.
-
-#[derive(Copy, Clone)]
-/// 64 KiB translation granule.
-pub enum Granule64KiB {}
+/// Constants for indexing the MAIR_EL1.
+#[allow(dead_code)]
+pub mod mair {
+    pub const DEVICE: u64 = 0;
+    pub const NORMAL: u64 = 1;
+}
 
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
-/// The translation tables.
+/// The kernel translation tables.
 ///
 /// # Safety
 ///
 /// - Supposed to land in `.bss`. Therefore, ensure that all initial member values boil down to "0".
-static KERNEL_TABLES: InitStateLock<ArchTranslationTable> =
-    InitStateLock::new(ArchTranslationTable::new());
+static KERNEL_TABLES: InitStateLock<KernelTranslationTable> =
+    InitStateLock::new(KernelTranslationTable::new());
 
 static MMU: MemoryManagementUnit = MemoryManagementUnit;
 
@@ -189,311 +71,61 @@ static MMU: MemoryManagementUnit = MemoryManagementUnit;
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-impl mmu::interface::TranslationGranule for Granule512MiB {
-    const SIZE: usize = 512 * 1024 * 1024;
-    const SHIFT: usize = 29; // log2(SIZE)
-}
-
-impl<T, const N: usize> BaseAddr for [T; N] {
-    fn phys_base_addr(&self) -> Address<Physical> {
-        // The binary is still identity mapped, so we don't need to convert here.
-        Address::new(self as *const _ as usize)
-    }
-}
-
-impl convert::From<usize> for TableDescriptor {
-    fn from(next_lvl_table_addr: usize) -> Self {
-        let val = InMemoryRegister::<u64, STAGE1_TABLE_DESCRIPTOR::Register>::new(0);
+impl MemoryManagementUnit {
+    /// Setup function for the MAIR_EL1 register.
+    fn set_up_mair(&self) {
+        // Define the memory types being mapped.
+        MAIR_EL1.write(
+            // Attribute 1 - Cacheable normal DRAM.
+            MAIR_EL1::Attr1_Normal_Outer::WriteBack_NonTransient_ReadWriteAlloc +
+        MAIR_EL1::Attr1_Normal_Inner::WriteBack_NonTransient_ReadWriteAlloc +
 
-        let shifted = next_lvl_table_addr >> Granule64KiB::SHIFT;
-        val.write(
-            STAGE1_TABLE_DESCRIPTOR::VALID::True
-                + STAGE1_TABLE_DESCRIPTOR::TYPE::Table
-                + STAGE1_TABLE_DESCRIPTOR::NEXT_LEVEL_TABLE_ADDR_64KiB.val(shifted as u64),
+        // Attribute 0 - Device.
+        MAIR_EL1::Attr0_Device::nonGathering_nonReordering_EarlyWriteAck,
         );
-
-        TableDescriptor(val.get())
     }
-}
-
-/// Convert the kernel's generic memory attributes to HW-specific attributes of the MMU.
-impl convert::From<AttributeFields>
-    for register::FieldValue<u64, STAGE1_PAGE_DESCRIPTOR::Register>
-{
-    fn from(attribute_fields: AttributeFields) -> Self {
-        // Memory attributes.
-        let mut desc = match attribute_fields.mem_attributes {
-            MemAttributes::CacheableDRAM => {
-                STAGE1_PAGE_DESCRIPTOR::SH::InnerShareable
-                    + STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(mair::NORMAL)
-            }
-            MemAttributes::Device => {
-                STAGE1_PAGE_DESCRIPTOR::SH::OuterShareable
-                    + STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(mair::DEVICE)
-            }
-        };
-
-        // Access Permissions.
-        desc += match attribute_fields.acc_perms {
-            AccessPermissions::ReadOnly => STAGE1_PAGE_DESCRIPTOR::AP::RO_EL1,
-            AccessPermissions::ReadWrite => STAGE1_PAGE_DESCRIPTOR::AP::RW_EL1,
-        };
-
-        // The execute-never attribute is mapped to PXN in AArch64.
-        desc += if attribute_fields.execute_never {
-            STAGE1_PAGE_DESCRIPTOR::PXN::True
-        } else {
-            STAGE1_PAGE_DESCRIPTOR::PXN::False
-        };
-
-        // Always set unprivileged exectue-never as long as userspace is not implemented yet.
-        desc += STAGE1_PAGE_DESCRIPTOR::UXN::True;
-
-        desc
-    }
-}
 
-impl PageDescriptor {
-    /// Create an instance.
-    fn new(output_addr: *const Page<Physical>, attribute_fields: &AttributeFields) -> Self {
-        let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
-
-        let shifted = output_addr as u64 >> Granule64KiB::SHIFT;
-        val.write(
-            STAGE1_PAGE_DESCRIPTOR::VALID::True
-                + STAGE1_PAGE_DESCRIPTOR::AF::True
-                + attribute_fields.clone().into()
-                + STAGE1_PAGE_DESCRIPTOR::TYPE::Table
-                + STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted),
+    /// Configure various settings of stage 1 of the EL1 translation regime.
+    fn configure_translation_control(&self) {
+        let ips = ID_AA64MMFR0_EL1.read(ID_AA64MMFR0_EL1::PARange);
+        let t0sz = (64 - bsp::memory::mmu::KernelVirtAddrSpaceSize::SHIFT) as u64;
+
+        TCR_EL1.write(
+            TCR_EL1::TBI0::Ignored
+                + TCR_EL1::IPS.val(ips)
+                + TCR_EL1::EPD1::DisableTTBR1Walks
+                + TCR_EL1::TG0::KiB_64
+                + TCR_EL1::SH0::Inner
+                + TCR_EL1::ORGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
+                + TCR_EL1::IRGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
+                + TCR_EL1::EPD0::EnableTTBR0Walks
+                + TCR_EL1::T0SZ.val(t0sz),
         );
-
-        Self(val.get())
-    }
-
-    /// Returns the valid bit.
-    fn is_valid(&self) -> bool {
-        InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(self.0)
-            .is_set(STAGE1_PAGE_DESCRIPTOR::VALID)
     }
 }
 
-impl<const NUM_TABLES: usize> FixedSizeTranslationTable<{ NUM_TABLES }> {
-    // Reserve the last 256 MiB of the address space for MMIO mappings.
-    const L2_MMIO_START_INDEX: usize = NUM_TABLES - 1;
-    const L3_MMIO_START_INDEX: usize = 8192 / 2;
-
-    /// Create an instance.
-    pub const fn new() -> Self {
-        assert!(NUM_TABLES > 0);
-
-        Self {
-            lvl3: [[PageDescriptor(0); 8192]; NUM_TABLES],
-            lvl2: [TableDescriptor(0); NUM_TABLES],
-            cur_l3_mmio_index: 0,
-            initialized: false,
-        }
-    }
-
-    /// The start address of the table's MMIO range.
-    #[inline(always)]
-    fn mmio_start_addr(&self) -> Address<Virtual> {
-        Address::new(
-            (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
-                | (Self::L3_MMIO_START_INDEX << Granule64KiB::SHIFT),
-        )
-    }
-
-    /// The inclusive end address of the table's MMIO range.
-    #[inline(always)]
-    fn mmio_end_addr_inclusive(&self) -> Address<Virtual> {
-        Address::new(
-            (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
-                | (8191 << Granule64KiB::SHIFT)
-                | (Granule64KiB::SIZE - 1),
-        )
-    }
-
-    /// Helper to calculate the lvl2 and lvl3 indices from an address.
-    #[inline(always)]
-    fn lvl2_lvl3_index_from<ATYPE: AddressType>(
-        &self,
-        addr: *const Page<ATYPE>,
-    ) -> Result<(usize, usize), &'static str> {
-        let lvl2_index = addr as usize >> Granule512MiB::SHIFT;
-        let lvl3_index = (addr as usize & Granule512MiB::MASK) >> Granule64KiB::SHIFT;
-
-        if lvl2_index > (NUM_TABLES - 1) {
-            return Err("Virtual page is out of bounds of translation table");
-        }
-
-        Ok((lvl2_index, lvl3_index))
-    }
-
-    /// Returns the PageDescriptor corresponding to the supplied Page.
-    #[inline(always)]
-    fn page_descriptor_from(
-        &mut self,
-        addr: *const Page<Virtual>,
-    ) -> Result<&mut PageDescriptor, &'static str> {
-        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from(addr)?;
-
-        Ok(&mut self.lvl3[lvl2_index][lvl3_index])
-    }
-}
-
-/// Setup function for the MAIR_EL1 register.
-fn set_up_mair() {
-    // Define the memory types being mapped.
-    MAIR_EL1.write(
-        // Attribute 1 - Cacheable normal DRAM.
-        MAIR_EL1::Attr1_Normal_Outer::WriteBack_NonTransient_ReadWriteAlloc +
-        MAIR_EL1::Attr1_Normal_Inner::WriteBack_NonTransient_ReadWriteAlloc +
-
-        // Attribute 0 - Device.
-        MAIR_EL1::Attr0_Device::nonGathering_nonReordering_EarlyWriteAck,
-    );
-}
-
-/// Configure various settings of stage 1 of the EL1 translation regime.
-fn configure_translation_control() {
-    let ips = ID_AA64MMFR0_EL1.read(ID_AA64MMFR0_EL1::PARange);
-
-    TCR_EL1.write(
-        TCR_EL1::TBI0::Ignored
-            + TCR_EL1::IPS.val(ips)
-            + TCR_EL1::EPD1::DisableTTBR1Walks
-            + TCR_EL1::TG0::KiB_64
-            + TCR_EL1::SH0::Inner
-            + TCR_EL1::ORGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
-            + TCR_EL1::IRGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
-            + TCR_EL1::EPD0::EnableTTBR0Walks
-            + TCR_EL1::T0SZ.val(T0SZ),
-    );
-}
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
 /// Return a guarded reference to the kernel's translation tables.
-pub(in crate::memory::mmu) fn kernel_translation_tables(
-) -> &'static InitStateLock<ArchTranslationTable> {
+pub fn kernel_translation_tables() -> &'static InitStateLock<KernelTranslationTable> {
     &KERNEL_TABLES
 }
 
 /// Return a reference to the MMU instance.
-pub(in crate::memory::mmu) fn mmu() -> &'static impl mmu::interface::MMU {
+pub fn mmu() -> &'static impl memory::mmu::interface::MMU {
     &MMU
 }
 
 //------------------------------------------------------------------------------
 // OS Interface Code
 //------------------------------------------------------------------------------
-impl mmu::interface::TranslationGranule for Granule64KiB {
-    const SIZE: usize = 64 * 1024;
-    const SHIFT: usize = 16; // log2(SIZE)
-}
-
-impl<const NUM_TABLES: usize> mmu::interface::TranslationTable
-    for FixedSizeTranslationTable<{ NUM_TABLES }>
-{
-    unsafe fn init(&mut self) {
-        if self.initialized {
-            return;
-        }
-
-        // Populate the l2 entries.
-        for (lvl2_nr, lvl2_entry) in self.lvl2.iter_mut().enumerate() {
-            *lvl2_entry = self.lvl3[lvl2_nr].phys_base_addr().into_usize().into();
-        }
-
-        self.cur_l3_mmio_index = Self::L3_MMIO_START_INDEX;
-        self.initialized = true;
-    }
-
-    fn phys_base_address(&self) -> Address<Physical> {
-        self.lvl2.phys_base_addr()
-    }
-
-    unsafe fn map_pages_at(
-        &mut self,
-        phys_pages: &PageSliceDescriptor<Physical>,
-        virt_pages: &PageSliceDescriptor<Virtual>,
-        attr: &AttributeFields,
-    ) -> Result<(), &'static str> {
-        assert_eq!(self.initialized, true, "Translation tables not initialized");
-
-        let p = phys_pages.as_slice();
-        let v = virt_pages.as_slice();
-
-        if p.len() != v.len() {
-            return Err("Tried to map page slices with unequal sizes");
-        }
-
-        // No work to do for empty slices.
-        if p.is_empty() {
-            return Ok(());
-        }
-
-        if p.last().unwrap().as_ptr() >= bsp::memory::mmu::phys_addr_space_end_page() {
-            return Err("Tried to map outside of physical address space");
-        }
 
-        let iter = p.iter().zip(v.iter());
-        for (phys_page, virt_page) in iter {
-            let page_descriptor = self.page_descriptor_from(virt_page.as_ptr())?;
-            if page_descriptor.is_valid() {
-                return Err("Virtual page is already mapped");
-            }
-
-            *page_descriptor = PageDescriptor::new(phys_page.as_ptr(), &attr);
-        }
-
-        Ok(())
-    }
-
-    fn next_mmio_virt_page_slice(
-        &mut self,
-        num_pages: usize,
-    ) -> Result<PageSliceDescriptor<Virtual>, &'static str> {
-        assert_eq!(self.initialized, true, "Translation tables not initialized");
-
-        if num_pages == 0 {
-            return Err("num_pages == 0");
-        }
-
-        if (self.cur_l3_mmio_index + num_pages) > 8191 {
-            return Err("Not enough MMIO space left");
-        }
-
-        let addr = (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
-            | (self.cur_l3_mmio_index << Granule64KiB::SHIFT);
-        self.cur_l3_mmio_index += num_pages;
-
-        Ok(PageSliceDescriptor::from_addr(
-            Address::new(addr),
-            num_pages,
-        ))
-    }
-
-    fn is_virt_page_slice_mmio(&self, virt_pages: &PageSliceDescriptor<Virtual>) -> bool {
-        let start_addr = virt_pages.start_addr();
-        let end_addr_inclusive = virt_pages.end_addr_inclusive();
-
-        for i in [start_addr, end_addr_inclusive].iter() {
-            if (*i >= self.mmio_start_addr()) && (*i <= self.mmio_end_addr_inclusive()) {
-                return true;
-            }
-        }
-
-        false
-    }
-}
-
-impl mmu::interface::MMU for MemoryManagementUnit {
+impl memory::mmu::interface::MMU for MemoryManagementUnit {
     unsafe fn enable(
         &self,
-        phys_kernel_table_base_addr: Address<Physical>,
+        kernel_table_phys_base_addr: Address<Physical>,
     ) -> Result<(), &'static str> {
         // Fail early if translation granule is not supported. Both RPis support it, though.
         if !ID_AA64MMFR0_EL1.matches_all(ID_AA64MMFR0_EL1::TGran64::Supported) {
@@ -501,12 +133,12 @@ impl mmu::interface::MMU for MemoryManagementUnit {
         }
 
         // Prepare the memory attribute indirection register.
-        set_up_mair();
+        self.set_up_mair();
 
         // Set the "Translation Table Base Register".
-        TTBR0_EL1.set_baddr(phys_kernel_table_base_addr.into_usize() as u64);
+        TTBR0_EL1.set_baddr(kernel_table_phys_base_addr.into_usize() as u64);
 
-        configure_translation_control();
+        self.configure_translation_control();
 
         // Switch the MMU on.
         //
@@ -527,32 +159,11 @@ impl mmu::interface::MMU for MemoryManagementUnit {
 // Testing
 //--------------------------------------------------------------------------------------------------
 
-#[cfg(test)]
-pub(in crate::memory::mmu) type MinSizeArchTranslationTable = FixedSizeTranslationTable<1>;
-
 #[cfg(test)]
 mod tests {
     use super::*;
     use test_macros::kernel_test;
 
-    /// Check if the size of `struct TableDescriptor` is as expected.
-    #[kernel_test]
-    fn size_of_tabledescriptor_equals_64_bit() {
-        assert_eq!(
-            core::mem::size_of::<TableDescriptor>(),
-            core::mem::size_of::<u64>()
-        );
-    }
-
-    /// Check if the size of `struct PageDescriptor` is as expected.
-    #[kernel_test]
-    fn size_of_pagedescriptor_equals_64_bit() {
-        assert_eq!(
-            core::mem::size_of::<PageDescriptor>(),
-            core::mem::size_of::<u64>()
-        );
-    }
-
     /// Check if KERNEL_TABLES is in .bss.
     #[kernel_test]
     fn kernel_tables_in_bss() {
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
new file mode 100644
index 000000000..f682d6a49
--- /dev/null
+++ b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -0,0 +1,462 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural translation table.
+//!
+//! Only 64 KiB granule is supported.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::memory::mmu::translation_table::arch_translation_table
+
+use crate::{
+    bsp, memory,
+    memory::{
+        mmu::{
+            arch_mmu::{Granule512MiB, Granule64KiB},
+            AccessPermissions, AttributeFields, MemAttributes, Page, PageSliceDescriptor,
+        },
+        Address, AddressType, Physical, Virtual,
+    },
+};
+use core::convert;
+use register::{register_bitfields, InMemoryRegister};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+// A table descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-15.
+register_bitfields! {u64,
+    STAGE1_TABLE_DESCRIPTOR [
+        /// Physical address of the next descriptor.
+        NEXT_LEVEL_TABLE_ADDR_64KiB OFFSET(16) NUMBITS(32) [], // [47:16]
+
+        TYPE  OFFSET(1) NUMBITS(1) [
+            Block = 0,
+            Table = 1
+        ],
+
+        VALID OFFSET(0) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ]
+    ]
+}
+
+// A level 3 page descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-17.
+register_bitfields! {u64,
+    STAGE1_PAGE_DESCRIPTOR [
+        /// Unprivileged execute-never.
+        UXN      OFFSET(54) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
+        /// Privileged execute-never.
+        PXN      OFFSET(53) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
+        /// Physical address of the next table descriptor (lvl2) or the page descriptor (lvl3).
+        OUTPUT_ADDR_64KiB OFFSET(16) NUMBITS(32) [], // [47:16]
+
+        /// Access flag.
+        AF       OFFSET(10) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
+        /// Shareability field.
+        SH       OFFSET(8) NUMBITS(2) [
+            OuterShareable = 0b10,
+            InnerShareable = 0b11
+        ],
+
+        /// Access Permissions.
+        AP       OFFSET(6) NUMBITS(2) [
+            RW_EL1 = 0b00,
+            RW_EL1_EL0 = 0b01,
+            RO_EL1 = 0b10,
+            RO_EL1_EL0 = 0b11
+        ],
+
+        /// Memory attributes index into the MAIR_EL1 register.
+        AttrIndx OFFSET(2) NUMBITS(3) [],
+
+        TYPE     OFFSET(1) NUMBITS(1) [
+            Block = 0,
+            Table = 1
+        ],
+
+        VALID    OFFSET(0) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ]
+    ]
+}
+
+/// A table descriptor for 64 KiB aperture.
+///
+/// The output points to the next table.
+#[derive(Copy, Clone)]
+#[repr(C)]
+struct TableDescriptor {
+    value: u64,
+}
+
+/// A page descriptor with 64 KiB aperture.
+///
+/// The output points to physical memory.
+#[derive(Copy, Clone)]
+#[repr(C)]
+struct PageDescriptor {
+    value: u64,
+}
+
+trait BaseAddr {
+    fn phys_base_addr(&self) -> Address<Physical>;
+}
+
+const NUM_LVL2_TABLES: usize =
+    bsp::memory::mmu::KernelVirtAddrSpaceSize::SIZE >> Granule512MiB::SHIFT;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Big monolithic struct for storing the translation tables. Individual levels must be 64 KiB
+/// aligned, hence the "reverse" order of appearance.
+#[repr(C)]
+#[repr(align(65536))]
+pub struct FixedSizeTranslationTable<const NUM_TABLES: usize> {
+    /// Page descriptors, covering 64 KiB windows per entry.
+    lvl3: [[PageDescriptor; 8192]; NUM_TABLES],
+
+    /// Table descriptors, covering 512 MiB windows.
+    lvl2: [TableDescriptor; NUM_TABLES],
+
+    /// Index of the next free MMIO page.
+    cur_l3_mmio_index: usize,
+
+    /// Have the tables been initialized?
+    initialized: bool,
+}
+
+/// A translation table type for the kernel space.
+pub type KernelTranslationTable = FixedSizeTranslationTable<NUM_LVL2_TABLES>;
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl<T, const N: usize> BaseAddr for [T; N] {
+    fn phys_base_addr(&self) -> Address<Physical> {
+        // The binary is still identity mapped, so we don't need to convert here.
+        Address::new(self as *const _ as usize)
+    }
+}
+
+impl TableDescriptor {
+    /// Create an instance.
+    ///
+    /// Descriptor is invalid by default.
+    pub const fn new_zeroed() -> Self {
+        Self { value: 0 }
+    }
+
+    /// Create an instance pointing to the supplied address.
+    pub fn from_next_lvl_table_addr(next_lvl_table_addr: usize) -> Self {
+        let val = InMemoryRegister::<u64, STAGE1_TABLE_DESCRIPTOR::Register>::new(0);
+
+        let shifted = next_lvl_table_addr >> Granule64KiB::SHIFT;
+        val.write(
+            STAGE1_TABLE_DESCRIPTOR::VALID::True
+                + STAGE1_TABLE_DESCRIPTOR::TYPE::Table
+                + STAGE1_TABLE_DESCRIPTOR::NEXT_LEVEL_TABLE_ADDR_64KiB.val(shifted as u64),
+        );
+
+        TableDescriptor { value: val.get() }
+    }
+}
+
+/// Convert the kernel's generic memory attributes to HW-specific attributes of the MMU.
+impl convert::From<AttributeFields>
+    for register::FieldValue<u64, STAGE1_PAGE_DESCRIPTOR::Register>
+{
+    fn from(attribute_fields: AttributeFields) -> Self {
+        // Memory attributes.
+        let mut desc = match attribute_fields.mem_attributes {
+            MemAttributes::CacheableDRAM => {
+                STAGE1_PAGE_DESCRIPTOR::SH::InnerShareable
+                    + STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(memory::mmu::arch_mmu::mair::NORMAL)
+            }
+            MemAttributes::Device => {
+                STAGE1_PAGE_DESCRIPTOR::SH::OuterShareable
+                    + STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(memory::mmu::arch_mmu::mair::DEVICE)
+            }
+        };
+
+        // Access Permissions.
+        desc += match attribute_fields.acc_perms {
+            AccessPermissions::ReadOnly => STAGE1_PAGE_DESCRIPTOR::AP::RO_EL1,
+            AccessPermissions::ReadWrite => STAGE1_PAGE_DESCRIPTOR::AP::RW_EL1,
+        };
+
+        // The execute-never attribute is mapped to PXN in AArch64.
+        desc += if attribute_fields.execute_never {
+            STAGE1_PAGE_DESCRIPTOR::PXN::True
+        } else {
+            STAGE1_PAGE_DESCRIPTOR::PXN::False
+        };
+
+        // Always set unprivileged exectue-never as long as userspace is not implemented yet.
+        desc += STAGE1_PAGE_DESCRIPTOR::UXN::True;
+
+        desc
+    }
+}
+
+impl PageDescriptor {
+    /// Create an instance.
+    ///
+    /// Descriptor is invalid by default.
+    pub const fn new_zeroed() -> Self {
+        Self { value: 0 }
+    }
+
+    /// Create an instance.
+    pub fn from_output_addr(
+        output_addr: *const Page<Physical>,
+        attribute_fields: &AttributeFields,
+    ) -> Self {
+        let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
+
+        let shifted = output_addr as u64 >> Granule64KiB::SHIFT;
+        val.write(
+            STAGE1_PAGE_DESCRIPTOR::VALID::True
+                + STAGE1_PAGE_DESCRIPTOR::AF::True
+                + attribute_fields.clone().into()
+                + STAGE1_PAGE_DESCRIPTOR::TYPE::Table
+                + STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted),
+        );
+
+        Self { value: val.get() }
+    }
+
+    /// Returns the valid bit.
+    fn is_valid(&self) -> bool {
+        InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(self.value)
+            .is_set(STAGE1_PAGE_DESCRIPTOR::VALID)
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
+    // Reserve the last 256 MiB of the address space for MMIO mappings.
+    const L2_MMIO_START_INDEX: usize = NUM_TABLES - 1;
+    const L3_MMIO_START_INDEX: usize = 8192 / 2;
+
+    /// Create an instance.
+    #[allow(clippy::assertions_on_constants)]
+    pub const fn new() -> Self {
+        assert!(bsp::memory::mmu::KernelGranule::SIZE == Granule64KiB::SIZE);
+        assert!(NUM_TABLES > 0);
+        assert!((bsp::memory::mmu::KernelVirtAddrSpaceSize::SIZE % Granule512MiB::SIZE) == 0);
+
+        Self {
+            lvl3: [[PageDescriptor::new_zeroed(); 8192]; NUM_TABLES],
+            lvl2: [TableDescriptor::new_zeroed(); NUM_TABLES],
+            cur_l3_mmio_index: 0,
+            initialized: false,
+        }
+    }
+
+    /// The start address of the table's MMIO range.
+    #[inline(always)]
+    const fn mmio_start_addr(&self) -> Address<Virtual> {
+        Address::new(
+            (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
+                | (Self::L3_MMIO_START_INDEX << Granule64KiB::SHIFT),
+        )
+    }
+
+    /// The inclusive end address of the table's MMIO range.
+    #[inline(always)]
+    const fn mmio_end_addr_inclusive(&self) -> Address<Virtual> {
+        Address::new(
+            (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
+                | (8191 << Granule64KiB::SHIFT)
+                | (Granule64KiB::SIZE - 1),
+        )
+    }
+
+    /// Helper to calculate the lvl2 and lvl3 indices from an address.
+    #[inline(always)]
+    fn lvl2_lvl3_index_from<ATYPE: AddressType>(
+        &self,
+        addr: *const Page<ATYPE>,
+    ) -> Result<(usize, usize), &'static str> {
+        let lvl2_index = addr as usize >> Granule512MiB::SHIFT;
+        let lvl3_index = (addr as usize & Granule512MiB::MASK) >> Granule64KiB::SHIFT;
+
+        if lvl2_index > (NUM_TABLES - 1) {
+            return Err("Virtual page is out of bounds of translation table");
+        }
+
+        Ok((lvl2_index, lvl3_index))
+    }
+
+    /// Returns the PageDescriptor corresponding to the supplied Page.
+    #[inline(always)]
+    fn page_descriptor_from(
+        &mut self,
+        addr: *const Page<Virtual>,
+    ) -> Result<&mut PageDescriptor, &'static str> {
+        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from(addr)?;
+
+        Ok(&mut self.lvl3[lvl2_index][lvl3_index])
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+
+impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::TranslationTable
+    for FixedSizeTranslationTable<NUM_TABLES>
+{
+    unsafe fn init(&mut self) {
+        if self.initialized {
+            return;
+        }
+
+        // Populate the l2 entries.
+        for (lvl2_nr, lvl2_entry) in self.lvl2.iter_mut().enumerate() {
+            let desc = TableDescriptor::from_next_lvl_table_addr(
+                self.lvl3[lvl2_nr].phys_base_addr().into_usize(),
+            );
+            *lvl2_entry = desc;
+        }
+
+        self.cur_l3_mmio_index = Self::L3_MMIO_START_INDEX;
+        self.initialized = true;
+    }
+
+    fn phys_base_address(&self) -> Address<Physical> {
+        self.lvl2.phys_base_addr()
+    }
+
+    unsafe fn map_pages_at(
+        &mut self,
+        virt_pages: &PageSliceDescriptor<Virtual>,
+        phys_pages: &PageSliceDescriptor<Physical>,
+        attr: &AttributeFields,
+    ) -> Result<(), &'static str> {
+        assert_eq!(self.initialized, true, "Translation tables not initialized");
+
+        let p = phys_pages.as_slice();
+        let v = virt_pages.as_slice();
+
+        if p.len() != v.len() {
+            return Err("Tried to map page slices with unequal sizes");
+        }
+
+        // No work to do for empty slices.
+        if p.is_empty() {
+            return Ok(());
+        }
+
+        if p.last().unwrap().as_ptr() >= bsp::memory::mmu::phys_addr_space_end_page() {
+            return Err("Tried to map outside of physical address space");
+        }
+
+        let iter = p.iter().zip(v.iter());
+        for (phys_page, virt_page) in iter {
+            let page_descriptor = self.page_descriptor_from(virt_page.as_ptr())?;
+            if page_descriptor.is_valid() {
+                return Err("Virtual page is already mapped");
+            }
+
+            *page_descriptor = PageDescriptor::from_output_addr(phys_page.as_ptr(), &attr);
+        }
+
+        Ok(())
+    }
+
+    fn next_mmio_virt_page_slice(
+        &mut self,
+        num_pages: usize,
+    ) -> Result<PageSliceDescriptor<Virtual>, &'static str> {
+        assert_eq!(self.initialized, true, "Translation tables not initialized");
+
+        if num_pages == 0 {
+            return Err("num_pages == 0");
+        }
+
+        if (self.cur_l3_mmio_index + num_pages) > 8191 {
+            return Err("Not enough MMIO space left");
+        }
+
+        let addr = (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
+            | (self.cur_l3_mmio_index << Granule64KiB::SHIFT);
+        self.cur_l3_mmio_index += num_pages;
+
+        Ok(PageSliceDescriptor::from_addr(
+            Address::new(addr),
+            num_pages,
+        ))
+    }
+
+    fn is_virt_page_slice_mmio(&self, virt_pages: &PageSliceDescriptor<Virtual>) -> bool {
+        let start_addr = virt_pages.start_addr();
+        let end_addr_inclusive = virt_pages.end_addr_inclusive();
+
+        for i in [start_addr, end_addr_inclusive].iter() {
+            if (*i >= self.mmio_start_addr()) && (*i <= self.mmio_end_addr_inclusive()) {
+                return true;
+            }
+        }
+
+        false
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+pub type MinSizeKernelTranslationTable = FixedSizeTranslationTable<1>;
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// Check if the size of `struct TableDescriptor` is as expected.
+    #[kernel_test]
+    fn size_of_tabledescriptor_equals_64_bit() {
+        assert_eq!(
+            core::mem::size_of::<TableDescriptor>(),
+            core::mem::size_of::<u64>()
+        );
+    }
+
+    /// Check if the size of `struct PageDescriptor` is as expected.
+    #[kernel_test]
+    fn size_of_pagedescriptor_equals_64_bit() {
+        assert_eq!(
+            core::mem::size_of::<PageDescriptor>(),
+            core::mem::size_of::<u64>()
+        );
+    }
+}
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/time.rs b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/time.rs
index a2c57eb09..3a766009d 100644
--- a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/time.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/time.rs
@@ -3,6 +3,13 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::time::arch_time
 
 use crate::{time, warn};
 use core::time::Duration;
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp.rs b/15_virtual_mem_part2_mmio_remap/src/bsp.rs
index 257502491..c558922f7 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp.rs
@@ -2,7 +2,7 @@
 //
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-//! Conditional re-exporting of Board Support Packages.
+//! Conditional reexporting of Board Support Packages.
 
 mod device_driver;
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs
index e7a37697e..4c0e11249 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs
@@ -80,7 +80,7 @@ mod gicc;
 mod gicd;
 
 use crate::{
-    bsp, cpu, driver, exception, memory, memory::mmu::Physical, synchronization,
+    bsp, cpu, driver, exception, memory, memory::Physical, synchronization,
     synchronization::InitStateLock,
 };
 use core::sync::atomic::{AtomicBool, Ordering};
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index c1fa1d14c..45dbe75c6 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -5,7 +5,7 @@
 //! GPIO Driver.
 
 use crate::{
-    bsp::device_driver::common::MMIODerefWrapper, driver, memory, memory::mmu::Physical,
+    bsp::device_driver::common::MMIODerefWrapper, driver, memory, memory::Physical,
     synchronization, synchronization::IRQSafeNullLock,
 };
 use core::sync::atomic::{AtomicUsize, Ordering};
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
index dfc5b66ed..69c001adf 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -6,7 +6,7 @@
 
 mod peripheral_ic;
 
-use crate::{driver, exception, memory, memory::mmu::Physical};
+use crate::{driver, exception, memory, memory::Physical};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index 8fe915b34..654ac3c70 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -8,7 +8,7 @@ use super::{InterruptController, PendingIRQs, PeripheralIRQ};
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper,
     driver, exception, memory,
-    memory::mmu::Physical,
+    memory::Physical,
     synchronization,
     synchronization::{IRQSafeNullLock, InitStateLock},
 };
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index e404f11bf..d7d83840e 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -6,7 +6,7 @@
 
 use crate::{
     bsp, bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, exception, memory,
-    memory::mmu::Physical, synchronization, synchronization::IRQSafeNullLock,
+    memory::Physical, synchronization, synchronization::IRQSafeNullLock,
 };
 use core::{
     fmt,
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
index 9d359cb7c..7b48d7b51 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
@@ -37,7 +37,7 @@
 
 pub mod mmu;
 
-use crate::memory::mmu::{Address, Physical, Virtual};
+use crate::memory::{Address, Physical, Virtual};
 use core::{cell::UnsafeCell, ops::RangeInclusive};
 
 //--------------------------------------------------------------------------------------------------
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
index fc16c87c2..76b93e47a 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
@@ -9,9 +9,10 @@ use crate::{
     memory::{
         mmu as kernel_mmu,
         mmu::{
-            interface, AccessPermissions, AttributeFields, Granule64KiB, MemAttributes, Page,
-            PageSliceDescriptor, Physical, Virtual,
+            AccessPermissions, AddressSpaceSize, AttributeFields, MemAttributes, Page,
+            PageSliceDescriptor, TranslationGranule,
         },
+        Physical, Virtual,
     },
 };
 
@@ -21,12 +22,14 @@ use crate::{
 
 /// The translation granule chosen by this BSP. This will be used everywhere else in the kernel to
 /// derive respective data structures and their sizes. For example, the `crate::memory::mmu::Page`.
-pub type KernelGranule = Granule64KiB;
+pub type KernelGranule = TranslationGranule<{ 64 * 1024 }>;
+
+/// The address space size chosen by this BSP.
+pub type KernelVirtAddrSpaceSize = AddressSpaceSize<{ 8 * 1024 * 1024 * 1024 }>;
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
-use interface::TranslationGranule;
 
 /// Helper function for calculating the number of pages the given parameter spans.
 const fn size_to_num_pages(size: usize) -> usize {
@@ -94,8 +97,8 @@ pub fn phys_addr_space_end_page() -> *const Page<Physical> {
 pub unsafe fn kernel_map_binary() -> Result<(), &'static str> {
     kernel_mmu::kernel_map_pages_at(
         "Kernel boot-core stack",
-        &phys_stack_page_desc(),
         &virt_stack_page_desc(),
+        &phys_stack_page_desc(),
         &AttributeFields {
             mem_attributes: MemAttributes::CacheableDRAM,
             acc_perms: AccessPermissions::ReadWrite,
@@ -105,8 +108,8 @@ pub unsafe fn kernel_map_binary() -> Result<(), &'static str> {
 
     kernel_mmu::kernel_map_pages_at(
         "Kernel code and RO data",
-        &phys_ro_page_desc(),
         &virt_ro_page_desc(),
+        &phys_ro_page_desc(),
         &AttributeFields {
             mem_attributes: MemAttributes::CacheableDRAM,
             acc_perms: AccessPermissions::ReadOnly,
@@ -116,8 +119,8 @@ pub unsafe fn kernel_map_binary() -> Result<(), &'static str> {
 
     kernel_mmu::kernel_map_pages_at(
         "Kernel data and bss",
-        &phys_data_page_desc(),
         &virt_data_page_desc(),
+        &phys_data_page_desc(),
         &AttributeFields {
             mem_attributes: MemAttributes::CacheableDRAM,
             acc_perms: AccessPermissions::ReadWrite,
diff --git a/15_virtual_mem_part2_mmio_remap/src/console.rs b/15_virtual_mem_part2_mmio_remap/src/console.rs
index 3552823cc..c3154ba23 100644
--- a/15_virtual_mem_part2_mmio_remap/src/console.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/console.rs
@@ -20,8 +20,7 @@ pub mod interface {
         /// Write a Rust format string.
         fn write_fmt(&self, args: fmt::Arguments) -> fmt::Result;
 
-        /// Block execution until the last buffered character has been physically put on the TX
-        /// wire.
+        /// Block until the last buffered character has been physically put on the TX wire.
         fn flush(&self);
     }
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/cpu.rs b/15_virtual_mem_part2_mmio_remap/src/cpu.rs
index c9e5af72c..9c8eb6f6e 100644
--- a/15_virtual_mem_part2_mmio_remap/src/cpu.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/cpu.rs
@@ -7,6 +7,12 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "_arch/aarch64/cpu.rs"]
 mod arch_cpu;
-pub use arch_cpu::*;
+
+mod boot;
 
 pub mod smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_cpu::{nop, qemu_exit_failure, qemu_exit_success, wait_forever};
diff --git a/15_virtual_mem_part2_mmio_remap/src/cpu/boot.rs b/15_virtual_mem_part2_mmio_remap/src/cpu/boot.rs
new file mode 100644
index 000000000..1dc5c1808
--- /dev/null
+++ b/15_virtual_mem_part2_mmio_remap/src/cpu/boot.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Boot code.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/cpu/boot.rs"]
+mod arch_boot;
diff --git a/15_virtual_mem_part2_mmio_remap/src/cpu/smp.rs b/15_virtual_mem_part2_mmio_remap/src/cpu/smp.rs
index 90ecbdf30..38230ce1e 100644
--- a/15_virtual_mem_part2_mmio_remap/src/cpu/smp.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/cpu/smp.rs
@@ -6,5 +6,9 @@
 
 #[cfg(target_arch = "aarch64")]
 #[path = "../_arch/aarch64/cpu/smp.rs"]
-mod arch_cpu_smp;
-pub use arch_cpu_smp::*;
+mod arch_smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_smp::core_id;
diff --git a/15_virtual_mem_part2_mmio_remap/src/exception.rs b/15_virtual_mem_part2_mmio_remap/src/exception.rs
index dfa852a87..3c5e7bc83 100644
--- a/15_virtual_mem_part2_mmio_remap/src/exception.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/exception.rs
@@ -7,10 +7,14 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "_arch/aarch64/exception.rs"]
 mod arch_exception;
-pub use arch_exception::*;
 
 pub mod asynchronous;
 
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_exception::{current_privilege_level, handling_init};
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
diff --git a/15_virtual_mem_part2_mmio_remap/src/exception/asynchronous.rs b/15_virtual_mem_part2_mmio_remap/src/exception/asynchronous.rs
index c16ce0077..2b9ef05f3 100644
--- a/15_virtual_mem_part2_mmio_remap/src/exception/asynchronous.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/exception/asynchronous.rs
@@ -6,11 +6,18 @@
 
 #[cfg(target_arch = "aarch64")]
 #[path = "../_arch/aarch64/exception/asynchronous.rs"]
-mod arch_exception_async;
-pub use arch_exception_async::*;
+mod arch_asynchronous;
 
 use core::{fmt, marker::PhantomData};
 
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_asynchronous::{
+    is_local_irq_masked, local_irq_mask, local_irq_mask_save, local_irq_restore, local_irq_unmask,
+    print_state,
+};
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -116,7 +123,7 @@ impl<const MAX_INCLUSIVE: usize> IRQNumber<{ MAX_INCLUSIVE }> {
     }
 
     /// Return the wrapped number.
-    pub fn get(self) -> usize {
+    pub const fn get(self) -> usize {
         self.0
     }
 }
diff --git a/15_virtual_mem_part2_mmio_remap/src/lib.rs b/15_virtual_mem_part2_mmio_remap/src/lib.rs
index e66dd3e86..89df0dd5c 100644
--- a/15_virtual_mem_part2_mmio_remap/src/lib.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/lib.rs
@@ -7,24 +7,7 @@
 
 //! The `kernel` library.
 //!
-//! Used by `main.rs` to compose the final kernel binary.
-//!
-//! # TL;DR - Overview of important Kernel entities
-//!
-//! - [`bsp::console::console()`] - Returns a reference to the kernel's [console interface].
-//! - [`bsp::driver::driver_manager()`] - Returns a reference to the kernel's [driver interface].
-//! - [`bsp::exception::asynchronous::irq_manager()`] - Returns a reference to the kernel's [IRQ
-//!   Handling interface].
-//! - [`memory::mmu::mmu()`] - Returns a reference to the kernel's [MMU interface].
-//! - [`state::state_manager()`] - Returns a reference to the kernel's [state management] instance.
-//! - [`time::time_manager()`] - Returns a reference to the kernel's [timer interface].
-//!
-//! [console interface]: ../libkernel/console/interface/index.html
-//! [driver interface]: ../libkernel/driver/interface/trait.DriverManager.html
-//! [IRQ Handling interface]: ../libkernel/exception/asynchronous/interface/trait.IRQManager.html
-//! [MMU interface]: ../libkernel/memory/mmu/interface/trait.MMU.html
-//! [state management]: ../libkernel/state/struct.StateManager.html
-//! [timer interface]: ../libkernel/time/interface/trait.TimeManager.html
+//! Used to compose the final kernel binary.
 //!
 //! # Code organization and architecture
 //!
@@ -39,15 +22,22 @@
 //! `src/_arch`, for example, `src/_arch/aarch64`.
 //!
 //! The architecture folders mirror the subsystem modules laid out in `src`. For example,
-//! architectural code that belongs to the `kernel`'s memory subsystem (`src/memory.rs`) would go
-//! into `src/_arch/aarch64/memory.rs`. The latter file is directly included and re-exported in
-//! `src/memory.rs`, so that the architectural code parts are transparent with respect to the code's
-//! module organization. That means a public function `foo()` defined in
-//! `src/_arch/aarch64/memory.rs` would be reachable as `crate::memory::foo()` only.
+//! architectural code that belongs to the `kernel`'s MMU subsystem (`src/memory/mmu.rs`) would go
+//! into `src/_arch/aarch64/memory/mmu.rs`. The latter file is loaded as a module in
+//! `src/memory/mmu.rs` using the `path attribute`. Usually, the chosen module name is the generic
+//! module's name prefixed with `arch_`.
 //!
-//! The `_` in `_arch` denotes that this folder is not part of the standard module hierarchy.
-//! Rather, it's contents are conditionally pulled into respective files using the `#[path =
-//! "_arch/xxx/yyy.rs"]` attribute.
+//! For example, this is the top of `src/memory/mmu.rs`:
+//!
+//! ```
+//! #[cfg(target_arch = "aarch64")]
+//! #[path = "../_arch/aarch64/memory/mmu.rs"]
+//! mod arch_mmu;
+//! ```
+//!
+//! Often times, items from the `arch_ module` will be publicly reexported by the parent module.
+//! This way, each architecture specific module can provide its implementation of an item, while the
+//! caller must not be concerned which architecture has been conditionally compiled.
 //!
 //! ## BSP code
 //!
@@ -56,9 +46,8 @@
 //! or instances of drivers for devices that are featured on the respective board.
 //!
 //! Just like processor architecture code, the `BSP` code's module structure tries to mirror the
-//! `kernel`'s subsystem modules, but there is no transparent re-exporting this time. That means
-//! whatever is provided must be called starting from the `bsp` namespace, e.g.
-//! `bsp::driver::driver_manager()`.
+//! `kernel`'s subsystem modules, but there is no reexporting this time. That means whatever is
+//! provided must be called starting from the `bsp` namespace, e.g. `bsp::driver::driver_manager()`.
 //!
 //! ## Kernel interfaces
 //!
@@ -110,6 +99,14 @@
 //!
 //! - `crate::memory::*`
 //! - `crate::bsp::memory::*`
+//!
+//! # Boot flow
+//!
+//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
+//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
+//!
+//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 
 #![allow(incomplete_features)]
 #![feature(asm)]
@@ -130,9 +127,6 @@
 #![reexport_test_harness_main = "test_main"]
 #![test_runner(crate::test_runner)]
 
-// `mod cpu` provides the `_start()` function, the first function to run. `_start()` then calls
-// `runtime_init()`, which jumps to `kernel_init()` (defined in `main.rs`).
-
 mod panic_wait;
 mod runtime_init;
 mod synchronization;
diff --git a/15_virtual_mem_part2_mmio_remap/src/memory.rs b/15_virtual_mem_part2_mmio_remap/src/memory.rs
index 1ef0285a6..1493b1a94 100644
--- a/15_virtual_mem_part2_mmio_remap/src/memory.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/memory.rs
@@ -6,12 +6,85 @@
 
 pub mod mmu;
 
-use core::ops::RangeInclusive;
+use crate::common;
+use core::{marker::PhantomData, ops::RangeInclusive};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Metadata trait for marking the type of an address.
+pub trait AddressType: Copy + Clone + PartialOrd + PartialEq {}
+
+/// Zero-sized type to mark a physical address.
+#[derive(Copy, Clone, PartialOrd, PartialEq)]
+pub enum Physical {}
+
+/// Zero-sized type to mark a virtual address.
+#[derive(Copy, Clone, PartialOrd, PartialEq)]
+pub enum Virtual {}
+
+/// Generic address type.
+#[derive(Copy, Clone, PartialOrd, PartialEq)]
+pub struct Address<ATYPE: AddressType> {
+    value: usize,
+    _address_type: PhantomData<fn() -> ATYPE>,
+}
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
+impl AddressType for Physical {}
+impl AddressType for Virtual {}
+
+impl<ATYPE: AddressType> Address<ATYPE> {
+    /// Create an instance.
+    pub const fn new(value: usize) -> Self {
+        Self {
+            value,
+            _address_type: PhantomData,
+        }
+    }
+
+    /// Align down.
+    pub const fn align_down(self, alignment: usize) -> Self {
+        let aligned = common::align_down(self.value, alignment);
+
+        Self {
+            value: aligned,
+            _address_type: PhantomData,
+        }
+    }
+
+    /// Converts `Address` into an usize.
+    pub const fn into_usize(self) -> usize {
+        self.value
+    }
+}
+
+impl<ATYPE: AddressType> core::ops::Add<usize> for Address<ATYPE> {
+    type Output = Self;
+
+    fn add(self, other: usize) -> Self {
+        Self {
+            value: self.value + other,
+            _address_type: PhantomData,
+        }
+    }
+}
+
+impl<ATYPE: AddressType> core::ops::Sub<usize> for Address<ATYPE> {
+    type Output = Self;
+
+    fn sub(self, other: usize) -> Self {
+        Self {
+            value: self.value - other,
+            _address_type: PhantomData,
+        }
+    }
+}
+
 /// Zero out an inclusive memory range.
 ///
 /// # Safety
diff --git a/15_virtual_mem_part2_mmio_remap/src/memory/mmu.rs b/15_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
index 9204874a9..b02055937 100644
--- a/15_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
@@ -7,12 +7,16 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "../_arch/aarch64/memory/mmu.rs"]
 mod arch_mmu;
-pub use arch_mmu::*;
 
 mod mapping_record;
+mod translation_table;
 mod types;
 
-use crate::{bsp, synchronization, warn};
+use crate::{
+    bsp,
+    memory::{Address, Physical, Virtual},
+    synchronization, warn,
+};
 
 pub use types::*;
 
@@ -24,59 +28,6 @@ pub use types::*;
 pub mod interface {
     use super::*;
 
-    /// Describes the characteristics of a translation granule.
-    #[allow(missing_docs)]
-    pub trait TranslationGranule {
-        const SIZE: usize;
-        const MASK: usize = Self::SIZE - 1;
-        const SHIFT: usize;
-    }
-
-    /// Translation table operations.
-    pub trait TranslationTable {
-        /// Anything that needs to run before any of the other provided functions can be used.
-        ///
-        /// # Safety
-        ///
-        /// - Implementor must ensure that this function can run only once or is harmless if invoked
-        ///   multiple times.
-        unsafe fn init(&mut self);
-
-        /// The translation table's base address to be used for programming the MMU.
-        fn phys_base_address(&self) -> Address<Physical>;
-
-        /// Map the given physical pages to the given virtual pages.
-        ///
-        /// # Safety
-        ///
-        /// - Using wrong attributes can cause multiple issues of different nature in the system.
-        /// - It is not required that the architectural implementation prevents aliasing. That is,
-        ///   mapping to the same physical memory using multiple virtual addresses, which would
-        ///   break Rust's ownership assumptions. This should be protected against in this module
-        ///   (the kernel's generic MMU code).
-        unsafe fn map_pages_at(
-            &mut self,
-            phys_pages: &PageSliceDescriptor<Physical>,
-            virt_pages: &PageSliceDescriptor<Virtual>,
-            attr: &AttributeFields,
-        ) -> Result<(), &'static str>;
-
-        /// Obtain a free virtual page slice in the MMIO region.
-        ///
-        /// The "MMIO region" is a distinct region of the implementor's choice, which allows
-        /// differentiating MMIO addresses from others. This can speed up debugging efforts.
-        /// Ideally, those MMIO addresses are also standing out visually so that a human eye can
-        /// identify them. For example, by allocating them from near the end of the virtual address
-        /// space.
-        fn next_mmio_virt_page_slice(
-            &mut self,
-            num_pages: usize,
-        ) -> Result<PageSliceDescriptor<Virtual>, &'static str>;
-
-        /// Check if a virtual page splice is in the "MMIO region".
-        fn is_virt_page_slice_mmio(&self, virt_pages: &PageSliceDescriptor<Virtual>) -> bool;
-    }
-
     /// MMU functions.
     pub trait MMU {
         /// Turns on the MMU.
@@ -87,16 +38,23 @@ pub mod interface {
         /// - Changes the HW's global state.
         unsafe fn enable(
             &self,
-            phys_kernel_table_base_addr: Address<Physical>,
+            kernel_table_phys_base_addr: Address<Physical>,
         ) -> Result<(), &'static str>;
     }
 }
 
+/// Describes the characteristics of a translation granule.
+pub struct TranslationGranule<const GRANULE_SIZE: usize>;
+
+/// Describes the size of an address space.
+pub struct AddressSpaceSize<const AS_SIZE: usize>;
+
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
-use interface::{TranslationTable, MMU};
+use interface::MMU;
 use synchronization::interface::ReadWriteEx;
+use translation_table::interface::TranslationTable;
 
 /// Map pages in the kernel's translation tables.
 ///
@@ -108,14 +66,14 @@ use synchronization::interface::ReadWriteEx;
 /// - Does not prevent aliasing.
 unsafe fn kernel_map_pages_at_unchecked(
     name: &'static str,
-    phys_pages: &PageSliceDescriptor<Physical>,
     virt_pages: &PageSliceDescriptor<Virtual>,
+    phys_pages: &PageSliceDescriptor<Physical>,
     attr: &AttributeFields,
 ) -> Result<(), &'static str> {
     arch_mmu::kernel_translation_tables()
-        .write(|tables| tables.map_pages_at(phys_pages, virt_pages, attr))?;
+        .write(|tables| tables.map_pages_at(virt_pages, phys_pages, attr))?;
 
-    if let Err(x) = mapping_record::kernel_add(name, phys_pages, virt_pages, attr) {
+    if let Err(x) = mapping_record::kernel_add(name, virt_pages, phys_pages, attr) {
         warn!("{}", x);
     }
 
@@ -125,7 +83,44 @@ unsafe fn kernel_map_pages_at_unchecked(
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
-use interface::TranslationGranule;
+
+impl<const GRANULE_SIZE: usize> TranslationGranule<GRANULE_SIZE> {
+    /// The granule's size.
+    pub const SIZE: usize = Self::size_checked();
+
+    /// The granule's mask.
+    pub const MASK: usize = Self::SIZE - 1;
+
+    /// The granule's shift, aka log2(size).
+    pub const SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
+
+    const fn size_checked() -> usize {
+        assert!(GRANULE_SIZE.is_power_of_two());
+
+        GRANULE_SIZE
+    }
+}
+
+impl<const AS_SIZE: usize> AddressSpaceSize<AS_SIZE> {
+    /// The address space size.
+    pub const SIZE: usize = Self::size_checked();
+
+    /// The address space shift, aka log2(size).
+    pub const SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
+
+    const fn size_checked() -> usize {
+        assert!(AS_SIZE.is_power_of_two());
+        assert!(arch_mmu::MIN_ADDR_SPACE_SIZE.is_power_of_two());
+        assert!(arch_mmu::MAX_ADDR_SPACE_SIZE.is_power_of_two());
+
+        // Must adhere to architectural restrictions.
+        assert!(AS_SIZE >= arch_mmu::MIN_ADDR_SPACE_SIZE);
+        assert!(AS_SIZE <= arch_mmu::MAX_ADDR_SPACE_SIZE);
+        assert!((AS_SIZE % arch_mmu::AddrSpaceSizeGranule::SIZE) == 0);
+
+        AS_SIZE
+    }
+}
 
 /// Raw mapping of virtual to physical pages in the kernel translation tables.
 ///
@@ -134,11 +129,11 @@ use interface::TranslationGranule;
 /// # Safety
 ///
 /// - See `kernel_map_pages_at_unchecked()`.
-/// - Does not prevent aliasing. Currently, we have to trust the callers.
+/// - Does not prevent aliasing. Currently, the callers must be trusted.
 pub unsafe fn kernel_map_pages_at(
     name: &'static str,
-    phys_pages: &PageSliceDescriptor<Physical>,
     virt_pages: &PageSliceDescriptor<Virtual>,
+    phys_pages: &PageSliceDescriptor<Physical>,
     attr: &AttributeFields,
 ) -> Result<(), &'static str> {
     let is_mmio = arch_mmu::kernel_translation_tables()
@@ -147,7 +142,7 @@ pub unsafe fn kernel_map_pages_at(
         return Err("Attempt to manually map into MMIO region");
     }
 
-    kernel_map_pages_at_unchecked(name, phys_pages, virt_pages, attr)?;
+    kernel_map_pages_at_unchecked(name, virt_pages, phys_pages, attr)?;
 
     Ok(())
 }
@@ -179,8 +174,8 @@ pub unsafe fn kernel_map_mmio(
 
         kernel_map_pages_at_unchecked(
             name,
-            &phys_pages,
             &virt_pages,
+            &phys_pages,
             &AttributeFields {
                 mem_attributes: MemAttributes::Device,
                 acc_perms: AccessPermissions::ReadWrite,
@@ -213,38 +208,3 @@ pub unsafe fn kernel_map_binary_and_enable_mmu() -> Result<(), &'static str> {
 pub fn kernel_print_mappings() {
     mapping_record::kernel_print()
 }
-
-//--------------------------------------------------------------------------------------------------
-// Testing
-//--------------------------------------------------------------------------------------------------
-
-#[cfg(test)]
-mod tests {
-    use super::*;
-    use test_macros::kernel_test;
-
-    /// Sanity checks for the kernel TranslationTable implementation.
-    #[kernel_test]
-    fn translationtable_implementation_sanity() {
-        // Need to take care that `tables` fits into the stack.
-        let mut tables = MinSizeArchTranslationTable::new();
-
-        unsafe { tables.init() };
-
-        let x = tables.next_mmio_virt_page_slice(0);
-        assert!(x.is_err());
-
-        let x = tables.next_mmio_virt_page_slice(1_0000_0000);
-        assert!(x.is_err());
-
-        let x = tables.next_mmio_virt_page_slice(2).unwrap();
-        assert_eq!(x.size(), bsp::memory::mmu::KernelGranule::SIZE * 2);
-
-        assert_eq!(tables.is_virt_page_slice_mmio(&x), true);
-
-        assert_eq!(
-            tables.is_virt_page_slice_mmio(&PageSliceDescriptor::from_addr(Address::new(0), 1)),
-            false
-        );
-    }
-}
diff --git a/15_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs b/15_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs
index cd3378089..cd46403fd 100644
--- a/15_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs
@@ -42,8 +42,8 @@ static KERNEL_MAPPING_RECORD: InitStateLock<MappingRecord> =
 impl MappingRecordEntry {
     pub fn new(
         name: &'static str,
-        phys_pages: &PageSliceDescriptor<Physical>,
         virt_pages: &PageSliceDescriptor<Virtual>,
+        phys_pages: &PageSliceDescriptor<Physical>,
         attr: &AttributeFields,
     ) -> Self {
         Self {
@@ -97,13 +97,13 @@ impl MappingRecord {
     pub fn add(
         &mut self,
         name: &'static str,
-        phys_pages: &PageSliceDescriptor<Physical>,
         virt_pages: &PageSliceDescriptor<Virtual>,
+        phys_pages: &PageSliceDescriptor<Physical>,
         attr: &AttributeFields,
     ) -> Result<(), &'static str> {
         let x = self.find_next_free()?;
 
-        *x = Some(MappingRecordEntry::new(name, phys_pages, virt_pages, attr));
+        *x = Some(MappingRecordEntry::new(name, virt_pages, phys_pages, attr));
         Ok(())
     }
 
@@ -191,11 +191,11 @@ use synchronization::interface::ReadWriteEx;
 /// Add an entry to the mapping info record.
 pub fn kernel_add(
     name: &'static str,
-    phys_pages: &PageSliceDescriptor<Physical>,
     virt_pages: &PageSliceDescriptor<Virtual>,
+    phys_pages: &PageSliceDescriptor<Physical>,
     attr: &AttributeFields,
 ) -> Result<(), &'static str> {
-    KERNEL_MAPPING_RECORD.write(|mr| mr.add(name, phys_pages, virt_pages, attr))
+    KERNEL_MAPPING_RECORD.write(|mr| mr.add(name, virt_pages, phys_pages, attr))
 }
 
 pub fn kernel_find_and_insert_mmio_duplicate(
diff --git a/15_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs b/15_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs
new file mode 100644
index 000000000..7e16e6060
--- /dev/null
+++ b/15_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs
@@ -0,0 +1,111 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Translation table.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../../_arch/aarch64/memory/mmu/translation_table.rs"]
+mod arch_translation_table;
+
+use crate::memory::{
+    mmu::{AttributeFields, PageSliceDescriptor},
+    Address, Physical, Virtual,
+};
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_translation_table::KernelTranslationTable;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Translation table interfaces.
+pub mod interface {
+    use super::*;
+
+    /// Translation table operations.
+    pub trait TranslationTable {
+        /// Anything that needs to run before any of the other provided functions can be used.
+        ///
+        /// # Safety
+        ///
+        /// - Implementor must ensure that this function can run only once or is harmless if invoked
+        ///   multiple times.
+        unsafe fn init(&mut self);
+
+        /// The translation table's base address to be used for programming the MMU.
+        fn phys_base_address(&self) -> Address<Physical>;
+
+        /// Map the given virtual pages to the given physical pages.
+        ///
+        /// # Safety
+        ///
+        /// - Using wrong attributes can cause multiple issues of different nature in the system.
+        /// - It is not required that the architectural implementation prevents aliasing. That is,
+        ///   mapping to the same physical memory using multiple virtual addresses, which would
+        ///   break Rust's ownership assumptions. This should be protected against in the kernel's
+        ///   generic MMU code.
+        unsafe fn map_pages_at(
+            &mut self,
+            virt_pages: &PageSliceDescriptor<Virtual>,
+            phys_pages: &PageSliceDescriptor<Physical>,
+            attr: &AttributeFields,
+        ) -> Result<(), &'static str>;
+
+        /// Obtain a free virtual page slice in the MMIO region.
+        ///
+        /// The "MMIO region" is a distinct region of the implementor's choice, which allows
+        /// differentiating MMIO addresses from others. This can speed up debugging efforts.
+        /// Ideally, those MMIO addresses are also standing out visually so that a human eye can
+        /// identify them. For example, by allocating them from near the end of the virtual address
+        /// space.
+        fn next_mmio_virt_page_slice(
+            &mut self,
+            num_pages: usize,
+        ) -> Result<PageSliceDescriptor<Virtual>, &'static str>;
+
+        /// Check if a virtual page splice is in the "MMIO region".
+        fn is_virt_page_slice_mmio(&self, virt_pages: &PageSliceDescriptor<Virtual>) -> bool;
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use crate::bsp;
+    use arch_translation_table::MinSizeKernelTranslationTable;
+    use interface::TranslationTable;
+    use test_macros::kernel_test;
+
+    /// Sanity checks for the kernel TranslationTable implementation.
+    #[kernel_test]
+    fn translationtable_implementation_sanity() {
+        // Need to take care that `tables` fits into the stack.
+        let mut tables = MinSizeKernelTranslationTable::new();
+
+        unsafe { tables.init() };
+
+        let x = tables.next_mmio_virt_page_slice(0);
+        assert!(x.is_err());
+
+        let x = tables.next_mmio_virt_page_slice(1_0000_0000);
+        assert!(x.is_err());
+
+        let x = tables.next_mmio_virt_page_slice(2).unwrap();
+        assert_eq!(x.size(), bsp::memory::mmu::KernelGranule::SIZE * 2);
+
+        assert_eq!(tables.is_virt_page_slice_mmio(&x), true);
+
+        assert_eq!(
+            tables.is_virt_page_slice_mmio(&PageSliceDescriptor::from_addr(Address::new(0), 1)),
+            false
+        );
+    }
+}
diff --git a/15_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs b/15_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
index cea7bb39c..594315882 100644
--- a/15_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
@@ -2,33 +2,17 @@
 //
 // Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
-//! Memory Management Unit Types.
+//! Memory Management Unit types.
 
-use crate::{bsp, common};
+use crate::{
+    bsp, common,
+    memory::{Address, AddressType, Physical, Virtual},
+};
 use core::{convert::From, marker::PhantomData, ops::RangeInclusive};
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
-use super::interface::TranslationGranule;
-
-/// Metadata trait for marking the type of an address.
-pub trait AddressType: Copy + Clone + PartialOrd + PartialEq {}
-
-/// Zero-sized type to mark a physical address.
-#[derive(Copy, Clone, PartialOrd, PartialEq)]
-pub enum Physical {}
-
-/// Zero-sized type to mark a virtual address.
-#[derive(Copy, Clone, PartialOrd, PartialEq)]
-pub enum Virtual {}
-
-/// Generic address type.
-#[derive(Copy, Clone, PartialOrd, PartialEq)]
-pub struct Address<ATYPE: AddressType> {
-    value: usize,
-    _address_type: PhantomData<ATYPE>,
-}
 
 /// Generic page type.
 #[repr(C)]
@@ -80,60 +64,6 @@ pub struct MMIODescriptor<ATYPE: AddressType> {
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-impl AddressType for Physical {}
-impl AddressType for Virtual {}
-
-//------------------------------------------------------------------------------
-// Address
-//------------------------------------------------------------------------------
-
-impl<ATYPE: AddressType> Address<ATYPE> {
-    /// Create an instance.
-    pub const fn new(value: usize) -> Self {
-        Self {
-            value,
-            _address_type: PhantomData,
-        }
-    }
-
-    /// Align down.
-    pub const fn align_down(self, alignment: usize) -> Self {
-        let aligned = common::align_down(self.value, alignment);
-
-        Self {
-            value: aligned,
-            _address_type: PhantomData,
-        }
-    }
-
-    /// Converts `Address` into an usize.
-    pub const fn into_usize(self) -> usize {
-        self.value
-    }
-}
-
-impl<ATYPE: AddressType> core::ops::Add<usize> for Address<ATYPE> {
-    type Output = Self;
-
-    fn add(self, other: usize) -> Self {
-        Self {
-            value: self.value + other,
-            _address_type: PhantomData,
-        }
-    }
-}
-
-impl<ATYPE: AddressType> core::ops::Sub<usize> for Address<ATYPE> {
-    type Output = Self;
-
-    fn sub(self, other: usize) -> Self {
-        Self {
-            value: self.value - other,
-            _address_type: PhantomData,
-        }
-    }
-}
-
 //------------------------------------------------------------------------------
 // Page
 //------------------------------------------------------------------------------
diff --git a/15_virtual_mem_part2_mmio_remap/src/print.rs b/15_virtual_mem_part2_mmio_remap/src/print.rs
index 1ea96b6ad..5a5638113 100644
--- a/15_virtual_mem_part2_mmio_remap/src/print.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/print.rs
@@ -2,7 +2,7 @@
 //
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-//! Printing facilities.
+//! Printing.
 
 use crate::{bsp, console};
 use core::fmt;
diff --git a/15_virtual_mem_part2_mmio_remap/src/state.rs b/15_virtual_mem_part2_mmio_remap/src/state.rs
index d08e67d6e..c94d04c84 100644
--- a/15_virtual_mem_part2_mmio_remap/src/state.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/state.rs
@@ -69,7 +69,7 @@ impl StateManager {
         }
     }
 
-    /// Return if the kernel is still in an init state.
+    /// Return if the kernel is init state.
     pub fn is_init(&self) -> bool {
         self.state() == State::Init
     }
diff --git a/15_virtual_mem_part2_mmio_remap/src/time.rs b/15_virtual_mem_part2_mmio_remap/src/time.rs
index 4f2f4e38f..953b6f0df 100644
--- a/15_virtual_mem_part2_mmio_remap/src/time.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/time.rs
@@ -7,7 +7,11 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "_arch/aarch64/time.rs"]
 mod arch_time;
-pub use arch_time::*;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_time::time_manager;
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -18,8 +22,6 @@ pub mod interface {
     use core::time::Duration;
 
     /// Time management functions.
-    ///
-    /// The `BSP` is supposed to supply one global instance.
     pub trait TimeManager {
         /// The timer's resolution.
         fn resolution(&self) -> Duration;
diff --git a/X1_JTAG_boot/Cargo.lock b/X1_JTAG_boot/Cargo.lock
index 102e57301..e87b55afe 100644
--- a/X1_JTAG_boot/Cargo.lock
+++ b/X1_JTAG_boot/Cargo.lock
@@ -2,9 +2,9 @@
 # It is not intended for manual editing.
 [[package]]
 name = "cortex-a"
-version = "4.1.0"
+version = "5.1.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "a389514c1229e12a03c0e8de8b357671b71e1d1bdab3a4f5b591abc94169cba8"
+checksum = "d33a61602f83c3fff3e092967ad4d5d820a9fea7bc418e119616872085fe731d"
 dependencies = [
  "register",
 ]
@@ -19,15 +19,15 @@ dependencies = [
 
 [[package]]
 name = "register"
-version = "0.5.1"
+version = "1.0.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "deaba5b0e477d21f61a57504bb5cef4a1e86de30300b457d38971c1cfc98b815"
+checksum = "f4a247de29ab7cc8f5006cfe775c4a81c704f9914c5e2a79696862e643135433"
 dependencies = [
  "tock-registers",
 ]
 
 [[package]]
 name = "tock-registers"
-version = "0.5.0"
+version = "0.6.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "70323afdb8082186c0986da0e10f6e4ed103d681c921c00597e98d9806dac20f"
+checksum = "f521a79accce68c417c9c77ce22108056b626126da1932f7e2e9b5bbffee0cea"
diff --git a/X1_JTAG_boot/Cargo.toml b/X1_JTAG_boot/Cargo.toml
index 8a1a364ef..b8906da1f 100644
--- a/X1_JTAG_boot/Cargo.toml
+++ b/X1_JTAG_boot/Cargo.toml
@@ -20,9 +20,9 @@ bsp_rpi4 = ["register"]
 [dependencies]
 
 # Optional dependencies
-register = { version = "0.5.x", optional = true }
+register = { version = "1.x.x", optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "4.x.x" }
+cortex-a = { version = "5.x.x" }
 
diff --git a/X1_JTAG_boot/Makefile b/X1_JTAG_boot/Makefile
index 071167b9e..27944c93d 100644
--- a/X1_JTAG_boot/Makefile
+++ b/X1_JTAG_boot/Makefile
@@ -40,8 +40,9 @@ export LINKER_FILE
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
+FEATURES      = bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
-    --features bsp_$(BSP)          \
+    --features $(FEATURES)         \
     --release
 
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
diff --git a/X1_JTAG_boot/jtag_boot_rpi3.img b/X1_JTAG_boot/jtag_boot_rpi3.img
index 4248095748295740449cb7c013902e8a4ea778fb..6fe154299791b169e5b4fbfa9e85d0b734d27d9b 100755
GIT binary patch
delta 74
zcmV-Q0JZ<HK(Iit1rq^Lvj!6r0s&F88Wqz40Wq`g7Ty6G002Pw{QdtI2qZwM;sXJy
g-~$M%;R6Y(2mZ6>7`g!gH?yG{?*ajevymO20?RQQbN~PV

delta 74
zcmV-Q0JZ<HK(Iit1rq@=vj!6r0s%3z8Wqz40fDpb7Ty6G2qZwM;sXJy-~$M%;R6Y(
g3I6{V002Pw_x-cx7`g!gFtec=?*ajdvymO20<{4fc>n+a

diff --git a/X1_JTAG_boot/jtag_boot_rpi4.img b/X1_JTAG_boot/jtag_boot_rpi4.img
index 0813b2badedf8feb242081bdb478505ffd4044ee..d5573467fe56c7dfe6f5289a4c6d98bee8e3ed6c 100755
GIT binary patch
delta 21
dcmZ2rx4>@01W88o%@ZZxGck5;Zj_nN1OQ#L2p9kW

delta 21
dcmZ2rx4>@01W87N%@ZZxGck5<Zj_nN1OQ!92oL}O

diff --git a/X1_JTAG_boot/src/_arch/aarch64/cpu.rs b/X1_JTAG_boot/src/_arch/aarch64/cpu.rs
index 6072751db..d3b07461a 100644
--- a/X1_JTAG_boot/src/_arch/aarch64/cpu.rs
+++ b/X1_JTAG_boot/src/_arch/aarch64/cpu.rs
@@ -3,36 +3,15 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
-
-use crate::{bsp, cpu};
-use cortex_a::{asm, regs::*};
-
-//--------------------------------------------------------------------------------------------------
-// Boot Code
-//--------------------------------------------------------------------------------------------------
-
-/// The entry of the `kernel` binary.
-///
-/// The function must be named `_start`, because the linker is looking for this exact name.
-///
-/// # Safety
-///
-/// - Linker script must ensure to place this function where it is expected by the target machine.
-/// - We have to hope that the compiler omits any stack pointer usage before the stack pointer is
-///   actually set (`SP.set()`).
-#[no_mangle]
-pub unsafe fn _start() -> ! {
-    use crate::runtime_init;
-
-    // Expect the boot core to start in EL2.
-    if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
-        SP.set(bsp::memory::boot_core_stack_end() as u64);
-        runtime_init::runtime_init()
-    } else {
-        // If not core0, infinitely wait for events.
-        wait_forever()
-    }
-}
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::arch_cpu
+
+use cortex_a::asm;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.rs b/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.rs
new file mode 100644
index 000000000..549b5927a
--- /dev/null
+++ b/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.rs
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural boot code.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::boot::arch_boot
+
+use crate::{bsp, cpu};
+use cortex_a::regs::*;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The entry of the `kernel` binary.
+///
+/// The function must be named `_start`, because the linker is looking for this exact name.
+///
+/// # Safety
+///
+/// - Linker script must ensure to place this function where it is expected by the target machine.
+/// - We have to hope that the compiler omits any stack pointer usage before the stack pointer is
+///   actually set (`SP.set()`).
+#[no_mangle]
+pub unsafe fn _start() -> ! {
+    use crate::runtime_init;
+
+    if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
+        SP.set(bsp::memory::boot_core_stack_end() as u64);
+        runtime_init::runtime_init()
+    } else {
+        // If not core0, infinitely wait for events.
+        cpu::wait_forever()
+    }
+}
diff --git a/X1_JTAG_boot/src/_arch/aarch64/cpu/smp.rs b/X1_JTAG_boot/src/_arch/aarch64/cpu/smp.rs
index c80f7e780..b9fdd0f73 100644
--- a/X1_JTAG_boot/src/_arch/aarch64/cpu/smp.rs
+++ b/X1_JTAG_boot/src/_arch/aarch64/cpu/smp.rs
@@ -3,6 +3,13 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::smp::arch_smp
 
 use cortex_a::regs::*;
 
diff --git a/X1_JTAG_boot/src/_arch/aarch64/time.rs b/X1_JTAG_boot/src/_arch/aarch64/time.rs
index 7f1bc6963..3a766009d 100644
--- a/X1_JTAG_boot/src/_arch/aarch64/time.rs
+++ b/X1_JTAG_boot/src/_arch/aarch64/time.rs
@@ -3,6 +3,13 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::time::arch_time
 
 use crate::{time, warn};
 use core::time::Duration;
@@ -55,7 +62,7 @@ impl time::interface::TimeManager for GenericTimer {
         }
 
         // Calculate the register compare value.
-        let frq = CNTFRQ_EL0.get() as u64;
+        let frq = CNTFRQ_EL0.get();
         let x = match frq.checked_mul(duration.as_nanos() as u64) {
             None => {
                 warn!("Spin duration too long, skipping");
diff --git a/X1_JTAG_boot/src/bsp.rs b/X1_JTAG_boot/src/bsp.rs
index 257502491..c558922f7 100644
--- a/X1_JTAG_boot/src/bsp.rs
+++ b/X1_JTAG_boot/src/bsp.rs
@@ -2,7 +2,7 @@
 //
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-//! Conditional re-exporting of Board Support Packages.
+//! Conditional reexporting of Board Support Packages.
 
 mod device_driver;
 
diff --git a/X1_JTAG_boot/src/console.rs b/X1_JTAG_boot/src/console.rs
index 3552823cc..c3154ba23 100644
--- a/X1_JTAG_boot/src/console.rs
+++ b/X1_JTAG_boot/src/console.rs
@@ -20,8 +20,7 @@ pub mod interface {
         /// Write a Rust format string.
         fn write_fmt(&self, args: fmt::Arguments) -> fmt::Result;
 
-        /// Block execution until the last buffered character has been physically put on the TX
-        /// wire.
+        /// Block until the last buffered character has been physically put on the TX wire.
         fn flush(&self);
     }
 
diff --git a/X1_JTAG_boot/src/cpu.rs b/X1_JTAG_boot/src/cpu.rs
index c9e5af72c..3834f183c 100644
--- a/X1_JTAG_boot/src/cpu.rs
+++ b/X1_JTAG_boot/src/cpu.rs
@@ -7,6 +7,12 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "_arch/aarch64/cpu.rs"]
 mod arch_cpu;
-pub use arch_cpu::*;
+
+mod boot;
 
 pub mod smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_cpu::{nop, wait_forever};
diff --git a/X1_JTAG_boot/src/cpu/boot.rs b/X1_JTAG_boot/src/cpu/boot.rs
new file mode 100644
index 000000000..1dc5c1808
--- /dev/null
+++ b/X1_JTAG_boot/src/cpu/boot.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Boot code.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/cpu/boot.rs"]
+mod arch_boot;
diff --git a/X1_JTAG_boot/src/cpu/smp.rs b/X1_JTAG_boot/src/cpu/smp.rs
index 90ecbdf30..38230ce1e 100644
--- a/X1_JTAG_boot/src/cpu/smp.rs
+++ b/X1_JTAG_boot/src/cpu/smp.rs
@@ -6,5 +6,9 @@
 
 #[cfg(target_arch = "aarch64")]
 #[path = "../_arch/aarch64/cpu/smp.rs"]
-mod arch_cpu_smp;
-pub use arch_cpu_smp::*;
+mod arch_smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_smp::core_id;
diff --git a/X1_JTAG_boot/src/main.rs b/X1_JTAG_boot/src/main.rs
index 340acd4eb..fa5ba64ad 100644
--- a/X1_JTAG_boot/src/main.rs
+++ b/X1_JTAG_boot/src/main.rs
@@ -7,16 +7,6 @@
 
 //! The `kernel` binary.
 //!
-//! # TL;DR - Overview of important Kernel entities
-//!
-//! - [`bsp::console::console()`] - Returns a reference to the kernel's [console interface].
-//! - [`bsp::driver::driver_manager()`] - Returns a reference to the kernel's [driver interface].
-//! - [`time::time_manager()`] - Returns a reference to the kernel's [timer interface].
-//!
-//! [console interface]: ../libkernel/console/interface/index.html
-//! [driver interface]: ../libkernel/driver/interface/trait.DriverManager.html
-//! [timer interface]: ../libkernel/time/interface/trait.TimeManager.html
-//!
 //! # Code organization and architecture
 //!
 //! The code is divided into different *modules*, each representing a typical **subsystem** of the
@@ -30,15 +20,22 @@
 //! `src/_arch`, for example, `src/_arch/aarch64`.
 //!
 //! The architecture folders mirror the subsystem modules laid out in `src`. For example,
-//! architectural code that belongs to the `kernel`'s memory subsystem (`src/memory.rs`) would go
-//! into `src/_arch/aarch64/memory.rs`. The latter file is directly included and re-exported in
-//! `src/memory.rs`, so that the architectural code parts are transparent with respect to the code's
-//! module organization. That means a public function `foo()` defined in
-//! `src/_arch/aarch64/memory.rs` would be reachable as `crate::memory::foo()` only.
+//! architectural code that belongs to the `kernel`'s MMU subsystem (`src/memory/mmu.rs`) would go
+//! into `src/_arch/aarch64/memory/mmu.rs`. The latter file is loaded as a module in
+//! `src/memory/mmu.rs` using the `path attribute`. Usually, the chosen module name is the generic
+//! module's name prefixed with `arch_`.
 //!
-//! The `_` in `_arch` denotes that this folder is not part of the standard module hierarchy.
-//! Rather, it's contents are conditionally pulled into respective files using the `#[path =
-//! "_arch/xxx/yyy.rs"]` attribute.
+//! For example, this is the top of `src/memory/mmu.rs`:
+//!
+//! ```
+//! #[cfg(target_arch = "aarch64")]
+//! #[path = "../_arch/aarch64/memory/mmu.rs"]
+//! mod arch_mmu;
+//! ```
+//!
+//! Often times, items from the `arch_ module` will be publicly reexported by the parent module.
+//! This way, each architecture specific module can provide its implementation of an item, while the
+//! caller must not be concerned which architecture has been conditionally compiled.
 //!
 //! ## BSP code
 //!
@@ -47,9 +44,8 @@
 //! or instances of drivers for devices that are featured on the respective board.
 //!
 //! Just like processor architecture code, the `BSP` code's module structure tries to mirror the
-//! `kernel`'s subsystem modules, but there is no transparent re-exporting this time. That means
-//! whatever is provided must be called starting from the `bsp` namespace, e.g.
-//! `bsp::driver::driver_manager()`.
+//! `kernel`'s subsystem modules, but there is no reexporting this time. That means whatever is
+//! provided must be called starting from the `bsp` namespace, e.g. `bsp::driver::driver_manager()`.
 //!
 //! ## Kernel interfaces
 //!
@@ -101,6 +97,14 @@
 //!
 //! - `crate::memory::*`
 //! - `crate::bsp::memory::*`
+//!
+//! # Boot flow
+//!
+//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
+//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
+//!
+//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
@@ -109,9 +113,6 @@
 #![no_main]
 #![no_std]
 
-// `mod cpu` provides the `_start()` function, the first function to run. `_start()` then calls
-// `runtime_init()`, which jumps to `kernel_init()`.
-
 mod bsp;
 mod console;
 mod cpu;
diff --git a/X1_JTAG_boot/src/print.rs b/X1_JTAG_boot/src/print.rs
index 1ea96b6ad..5a5638113 100644
--- a/X1_JTAG_boot/src/print.rs
+++ b/X1_JTAG_boot/src/print.rs
@@ -2,7 +2,7 @@
 //
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-//! Printing facilities.
+//! Printing.
 
 use crate::{bsp, console};
 use core::fmt;
diff --git a/X1_JTAG_boot/src/time.rs b/X1_JTAG_boot/src/time.rs
index 4f2f4e38f..953b6f0df 100644
--- a/X1_JTAG_boot/src/time.rs
+++ b/X1_JTAG_boot/src/time.rs
@@ -7,7 +7,11 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "_arch/aarch64/time.rs"]
 mod arch_time;
-pub use arch_time::*;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_time::time_manager;
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -18,8 +22,6 @@ pub mod interface {
     use core::time::Duration;
 
     /// Time management functions.
-    ///
-    /// The `BSP` is supposed to supply one global instance.
     pub trait TimeManager {
         /// The timer's resolution.
         fn resolution(&self) -> Duration;
diff --git a/rust-toolchain b/rust-toolchain
index b50e4d140..26668a71b 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1,4 +1,4 @@
 [toolchain]
-channel = "nightly-2021-01-01"
+channel = "nightly-2021-01-08"
 components = ["llvm-tools-preview"]
 targets = ["aarch64-unknown-none-softfloat"]

From c8e9b9713fe016409aba671b908e9d8f5b7a1646 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sat, 23 Jan 2021 22:53:26 +0100
Subject: [PATCH 024/214] update deps

---
 04_zero_overhead_abstraction/Cargo.lock       |   4 ++--
 05_safe_globals/Cargo.lock                    |   4 ++--
 06_drivers_gpio_uart/Cargo.lock               |   4 ++--
 07_uart_chainloader/Cargo.lock                |   4 ++--
 07_uart_chainloader/demo_payload_rpi3.img     | Bin 6856 -> 6856 bytes
 07_uart_chainloader/demo_payload_rpi4.img     | Bin 6728 -> 6728 bytes
 08_timestamps/Cargo.lock                      |   4 ++--
 09_hw_debug_JTAG/Cargo.lock                   |   4 ++--
 10_privilege_level/Cargo.lock                 |   4 ++--
 .../Cargo.lock                                |   4 ++--
 12_exceptions_part1_groundwork/Cargo.lock     |   4 ++--
 13_integrated_testing/Cargo.lock              |   8 ++++----
 .../Cargo.lock                                |   8 ++++----
 15_virtual_mem_part2_mmio_remap/Cargo.lock    |   8 ++++----
 14 files changed, 30 insertions(+), 30 deletions(-)

diff --git a/04_zero_overhead_abstraction/Cargo.lock b/04_zero_overhead_abstraction/Cargo.lock
index dd0cd5773..70708c19a 100644
--- a/04_zero_overhead_abstraction/Cargo.lock
+++ b/04_zero_overhead_abstraction/Cargo.lock
@@ -2,9 +2,9 @@
 # It is not intended for manual editing.
 [[package]]
 name = "cortex-a"
-version = "5.1.1"
+version = "5.1.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "7c9b7504606c9e83a6b35e6f99db890084baf13fbbed67603fcc2a62b2cfe62b"
+checksum = "d33a61602f83c3fff3e092967ad4d5d820a9fea7bc418e119616872085fe731d"
 dependencies = [
  "register",
 ]
diff --git a/05_safe_globals/Cargo.lock b/05_safe_globals/Cargo.lock
index dd0cd5773..70708c19a 100644
--- a/05_safe_globals/Cargo.lock
+++ b/05_safe_globals/Cargo.lock
@@ -2,9 +2,9 @@
 # It is not intended for manual editing.
 [[package]]
 name = "cortex-a"
-version = "5.1.1"
+version = "5.1.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "7c9b7504606c9e83a6b35e6f99db890084baf13fbbed67603fcc2a62b2cfe62b"
+checksum = "d33a61602f83c3fff3e092967ad4d5d820a9fea7bc418e119616872085fe731d"
 dependencies = [
  "register",
 ]
diff --git a/06_drivers_gpio_uart/Cargo.lock b/06_drivers_gpio_uart/Cargo.lock
index e2d680a76..e87b55afe 100644
--- a/06_drivers_gpio_uart/Cargo.lock
+++ b/06_drivers_gpio_uart/Cargo.lock
@@ -2,9 +2,9 @@
 # It is not intended for manual editing.
 [[package]]
 name = "cortex-a"
-version = "5.1.1"
+version = "5.1.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "7c9b7504606c9e83a6b35e6f99db890084baf13fbbed67603fcc2a62b2cfe62b"
+checksum = "d33a61602f83c3fff3e092967ad4d5d820a9fea7bc418e119616872085fe731d"
 dependencies = [
  "register",
 ]
diff --git a/07_uart_chainloader/Cargo.lock b/07_uart_chainloader/Cargo.lock
index e2d680a76..e87b55afe 100644
--- a/07_uart_chainloader/Cargo.lock
+++ b/07_uart_chainloader/Cargo.lock
@@ -2,9 +2,9 @@
 # It is not intended for manual editing.
 [[package]]
 name = "cortex-a"
-version = "5.1.1"
+version = "5.1.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "7c9b7504606c9e83a6b35e6f99db890084baf13fbbed67603fcc2a62b2cfe62b"
+checksum = "d33a61602f83c3fff3e092967ad4d5d820a9fea7bc418e119616872085fe731d"
 dependencies = [
  "register",
 ]
diff --git a/07_uart_chainloader/demo_payload_rpi3.img b/07_uart_chainloader/demo_payload_rpi3.img
index 0719de414d1e2a8495d6c68862e25eec89998ba2..80df7c197febdb8b7a7739c51af927e30915b3c9 100755
GIT binary patch
delta 335
zcmX?Mdct&q3d;fJ_-hkY4lqvL_*9*d@!MoxCUZvH&8|$#Ss7n!e#>sa%9y-aj(0hu
zV4~4PZU%-4JPZsQUO6*N%yyi7jW3OH)n;4%(~OLolQ{(y7=t!z2?{Yyb`aKKl%1R_
zEG@|N|NnFa28ApC4>Ml;XUy>P;pCaZzZqF4PZfF1cxrN^s5+zT<dr}&bn-<}Va9~X
zPeqM2RTwxJKmbA_XcH!ghz3;V&tyk2amgR-Fm+%}42%$p;m_tmv3MpX6^6-|B-9*X
iW=cS1VR|B%A*>824O0hI1~;u@vZZ9bByQP@lHURC6hl`4

delta 330
zcmX?Mdct&q%0!I=jMFy0RA*%TK3R~-oY8KxC)09P#+REvvKz2625(m4UCt;NXf%<V
zfnfp<1H*<_&I}W?4JY5?OJiKU*^&P=Bcs-2UO@#$r_FkTLQIowgbf&FCg%!E3o`!y
zKV5-A;mZHRj2HhIGyHrod8Y7hMwZD_MP4(WoZKj?&ge3EC6El6d{I=GF@Ew>QDaRD
zVGafmfRG5<fC(a^0+snO*-=bf@(Vjm9as|sBZOl3vAIwzo{7mqc=9C)HAk445>Q!~
do)BgTD+Nl!)IpWOO)HsfDOoRxTlS*lcK~{oLEr!Y

diff --git a/07_uart_chainloader/demo_payload_rpi4.img b/07_uart_chainloader/demo_payload_rpi4.img
index c8d8f9685adcdfcaeeb113672567c4f264e52f06..54fe2b818bced6213d5f094a90562842b864b22b 100755
GIT binary patch
delta 395
zcmX?Ma>8VS%0>+qCdP}Kb(xN{GCtV+mEC}qF?q8Z?{Y@LM5Bq^3=9)^7#KFZa%PyA
z?Kt@!Um9cgWLN%l#=Dc(^7}9`icbE`Z_Bu0vZa6x6O-uVa)E_>{EQ4!9<(#9{Qm#{
zhwnj~)dbHmvK(NJzc%@cPz0muWM5%vb*}&arz<chT={>P@!~&YhMzD0{h!Xk+!Vxd
zWPi~DHij*nKwGsRicIbo-pMF2*;8ac<BQ3hqUy5AKy@H}3=9rGtN#5Lf5gnVii5>r
z<pXApRc(`fMZGmY2yrlg0E9%)K1>i16{w8J<b$H(Qa{*X>cE;97$FqHANI|kMB|v4
rJ_t<?l2CJm87cvlhG~jmhOjcAG)x^-8Qi#v$vY+LC2`9JN`40bd9q@R

delta 395
zcmX?Ma>8VS3d;fJ_-h+gSeO_uY}RBt&dPXy^G9|AR>tDZO1#S%1q+QPax*YY;9+3c
z@XDECVs_x<TYPDZU6UR8(;4qfUdivn^iX8-cYa&O^^;8nY?vO2OfD8!$j8UXFy%oz
z)5`Dv|9|+Nv{^~;9OL9KLJ^E=lYNDy)w%!wpRT~5aOMAD#*6=q8GgR{_kTJEb5jt<
zk^Myr*ci5O0xi^56rJ2JypvIKvZu&?#+Q>hMb%|ffa*Z{9x*en;$U%D`GA>YRp-C|
z;tUK9Kg%ckih66RFmNz{0E9%)0Zb4P4XBL7<b$H(Qh(TC>cE;97$Fo;+vZQAaZF4q
q43mQ-)Er@kN<gJynqrtCtQ;r}QwK8zW?aqWof7quxMc$+zXJdou3l~c

diff --git a/08_timestamps/Cargo.lock b/08_timestamps/Cargo.lock
index e2d680a76..e87b55afe 100644
--- a/08_timestamps/Cargo.lock
+++ b/08_timestamps/Cargo.lock
@@ -2,9 +2,9 @@
 # It is not intended for manual editing.
 [[package]]
 name = "cortex-a"
-version = "5.1.1"
+version = "5.1.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "7c9b7504606c9e83a6b35e6f99db890084baf13fbbed67603fcc2a62b2cfe62b"
+checksum = "d33a61602f83c3fff3e092967ad4d5d820a9fea7bc418e119616872085fe731d"
 dependencies = [
  "register",
 ]
diff --git a/09_hw_debug_JTAG/Cargo.lock b/09_hw_debug_JTAG/Cargo.lock
index e2d680a76..e87b55afe 100644
--- a/09_hw_debug_JTAG/Cargo.lock
+++ b/09_hw_debug_JTAG/Cargo.lock
@@ -2,9 +2,9 @@
 # It is not intended for manual editing.
 [[package]]
 name = "cortex-a"
-version = "5.1.1"
+version = "5.1.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "7c9b7504606c9e83a6b35e6f99db890084baf13fbbed67603fcc2a62b2cfe62b"
+checksum = "d33a61602f83c3fff3e092967ad4d5d820a9fea7bc418e119616872085fe731d"
 dependencies = [
  "register",
 ]
diff --git a/10_privilege_level/Cargo.lock b/10_privilege_level/Cargo.lock
index e2d680a76..e87b55afe 100644
--- a/10_privilege_level/Cargo.lock
+++ b/10_privilege_level/Cargo.lock
@@ -2,9 +2,9 @@
 # It is not intended for manual editing.
 [[package]]
 name = "cortex-a"
-version = "5.1.1"
+version = "5.1.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "7c9b7504606c9e83a6b35e6f99db890084baf13fbbed67603fcc2a62b2cfe62b"
+checksum = "d33a61602f83c3fff3e092967ad4d5d820a9fea7bc418e119616872085fe731d"
 dependencies = [
  "register",
 ]
diff --git a/11_virtual_mem_part1_identity_mapping/Cargo.lock b/11_virtual_mem_part1_identity_mapping/Cargo.lock
index e2d680a76..e87b55afe 100644
--- a/11_virtual_mem_part1_identity_mapping/Cargo.lock
+++ b/11_virtual_mem_part1_identity_mapping/Cargo.lock
@@ -2,9 +2,9 @@
 # It is not intended for manual editing.
 [[package]]
 name = "cortex-a"
-version = "5.1.1"
+version = "5.1.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "7c9b7504606c9e83a6b35e6f99db890084baf13fbbed67603fcc2a62b2cfe62b"
+checksum = "d33a61602f83c3fff3e092967ad4d5d820a9fea7bc418e119616872085fe731d"
 dependencies = [
  "register",
 ]
diff --git a/12_exceptions_part1_groundwork/Cargo.lock b/12_exceptions_part1_groundwork/Cargo.lock
index e2d680a76..e87b55afe 100644
--- a/12_exceptions_part1_groundwork/Cargo.lock
+++ b/12_exceptions_part1_groundwork/Cargo.lock
@@ -2,9 +2,9 @@
 # It is not intended for manual editing.
 [[package]]
 name = "cortex-a"
-version = "5.1.1"
+version = "5.1.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "7c9b7504606c9e83a6b35e6f99db890084baf13fbbed67603fcc2a62b2cfe62b"
+checksum = "d33a61602f83c3fff3e092967ad4d5d820a9fea7bc418e119616872085fe731d"
 dependencies = [
  "register",
 ]
diff --git a/13_integrated_testing/Cargo.lock b/13_integrated_testing/Cargo.lock
index d4776fc26..b5c774991 100644
--- a/13_integrated_testing/Cargo.lock
+++ b/13_integrated_testing/Cargo.lock
@@ -2,9 +2,9 @@
 # It is not intended for manual editing.
 [[package]]
 name = "cortex-a"
-version = "5.1.1"
+version = "5.1.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "7c9b7504606c9e83a6b35e6f99db890084baf13fbbed67603fcc2a62b2cfe62b"
+checksum = "d33a61602f83c3fff3e092967ad4d5d820a9fea7bc418e119616872085fe731d"
 dependencies = [
  "register",
 ]
@@ -55,9 +55,9 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.56"
+version = "1.0.59"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "a9802ddde94170d186eeee5005b798d9c159fa970403f1be19976d0cfb939b72"
+checksum = "07cb8b1b4ebf86a89ee88cbd201b022b94138c623644d035185c84d3f41b7e66"
 dependencies = [
  "proc-macro2",
  "quote",
diff --git a/14_exceptions_part2_peripheral_IRQs/Cargo.lock b/14_exceptions_part2_peripheral_IRQs/Cargo.lock
index d4776fc26..b5c774991 100644
--- a/14_exceptions_part2_peripheral_IRQs/Cargo.lock
+++ b/14_exceptions_part2_peripheral_IRQs/Cargo.lock
@@ -2,9 +2,9 @@
 # It is not intended for manual editing.
 [[package]]
 name = "cortex-a"
-version = "5.1.1"
+version = "5.1.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "7c9b7504606c9e83a6b35e6f99db890084baf13fbbed67603fcc2a62b2cfe62b"
+checksum = "d33a61602f83c3fff3e092967ad4d5d820a9fea7bc418e119616872085fe731d"
 dependencies = [
  "register",
 ]
@@ -55,9 +55,9 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.56"
+version = "1.0.59"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "a9802ddde94170d186eeee5005b798d9c159fa970403f1be19976d0cfb939b72"
+checksum = "07cb8b1b4ebf86a89ee88cbd201b022b94138c623644d035185c84d3f41b7e66"
 dependencies = [
  "proc-macro2",
  "quote",
diff --git a/15_virtual_mem_part2_mmio_remap/Cargo.lock b/15_virtual_mem_part2_mmio_remap/Cargo.lock
index d4776fc26..b5c774991 100644
--- a/15_virtual_mem_part2_mmio_remap/Cargo.lock
+++ b/15_virtual_mem_part2_mmio_remap/Cargo.lock
@@ -2,9 +2,9 @@
 # It is not intended for manual editing.
 [[package]]
 name = "cortex-a"
-version = "5.1.1"
+version = "5.1.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "7c9b7504606c9e83a6b35e6f99db890084baf13fbbed67603fcc2a62b2cfe62b"
+checksum = "d33a61602f83c3fff3e092967ad4d5d820a9fea7bc418e119616872085fe731d"
 dependencies = [
  "register",
 ]
@@ -55,9 +55,9 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.56"
+version = "1.0.59"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "a9802ddde94170d186eeee5005b798d9c159fa970403f1be19976d0cfb939b72"
+checksum = "07cb8b1b4ebf86a89ee88cbd201b022b94138c623644d035185c84d3f41b7e66"
 dependencies = [
  "proc-macro2",
  "quote",

From 8324b1fdac393c4fdb4f3575e6c84bc7982464fe Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Thu, 28 Jan 2021 23:25:57 +0100
Subject: [PATCH 025/214] PL011: Use BUSY bit

Fixes #100
---
 06_drivers_gpio_uart/README.md                | 156 ++++++++++-------
 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs |   1 +
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   | 144 +++++++++-------
 06_drivers_gpio_uart/src/cpu.rs               |   5 +-
 07_uart_chainloader/README.md                 |  17 +-
 07_uart_chainloader/demo_payload_rpi3.img     | Bin 6856 -> 6808 bytes
 07_uart_chainloader/demo_payload_rpi4.img     | Bin 6728 -> 6680 bytes
 07_uart_chainloader/src/_arch/aarch64/cpu.rs  |   1 +
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   | 144 +++++++++-------
 07_uart_chainloader/src/cpu.rs                |   5 +-
 08_timestamps/README.md                       |  46 ++---
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   | 141 +++++++++-------
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   | 141 +++++++++-------
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   | 141 +++++++++-------
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   | 141 +++++++++-------
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   | 141 +++++++++-------
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   | 141 +++++++++-------
 14_exceptions_part2_peripheral_IRQs/README.md |  46 ++---
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   | 159 +++++++++++-------
 15_virtual_mem_part2_mmio_remap/README.md     |  22 +--
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   | 159 +++++++++++-------
 X1_JTAG_boot/jtag_boot_rpi3.img               | Bin 8240 -> 8144 bytes
 X1_JTAG_boot/jtag_boot_rpi4.img               | Bin 7968 -> 6848 bytes
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   | 141 +++++++++-------
 24 files changed, 1094 insertions(+), 798 deletions(-)

diff --git a/06_drivers_gpio_uart/README.md b/06_drivers_gpio_uart/README.md
index 2f23d1b5b..9b526c331 100644
--- a/06_drivers_gpio_uart/README.md
+++ b/06_drivers_gpio_uart/README.md
@@ -188,13 +188,14 @@ diff -uNr 05_safe_globals/Makefile 06_drivers_gpio_uart/Makefile
 diff -uNr 05_safe_globals/src/_arch/aarch64/cpu.rs 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
 --- 05_safe_globals/src/_arch/aarch64/cpu.rs
 +++ 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
-@@ -17,6 +17,16 @@
+@@ -17,6 +17,17 @@
  // Public Code
  //--------------------------------------------------------------------------------------------------
 
 +pub use asm::nop;
 +
 +/// Spin for `n` cycles.
++#[cfg(feature = "bsp_rpi3")]
 +#[inline(always)]
 +pub fn spin_for_cycles(n: usize) {
 +    for _ in 0..n {
@@ -435,12 +436,17 @@ diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 06_drivers_g
 diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 --- 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 +++ 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
-@@ -0,0 +1,381 @@
+@@ -0,0 +1,403 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! PL011 UART driver.
++//!
++//! # Resources
++//!
++//! - https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
++//! - https://developer.arm.com/documentation/ddi0183/latest
 +
 +use crate::{
 +    bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, synchronization,
@@ -455,50 +461,63 @@ diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 06_dri
 +
 +// PL011 UART registers.
 +//
-+// Descriptions taken from
-+// https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
++// Descriptions taken from "PrimeCell UART (PL011) Technical Reference Manual" r1p5.
 +register_bitfields! {
 +    u32,
 +
-+    /// Flag Register
++    /// Flag Register.
 +    FR [
 +        /// Transmit FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-+        /// Line Control Register, UARTLCR_ LCRH.
++        /// Line Control Register, LCR_H.
 +        ///
-+        /// If the FIFO is disabled, this bit is set when the transmit holding register is empty. If
-+        /// the FIFO is enabled, the TXFE bit is set when the transmit FIFO is empty. This bit does
-+        /// not indicate if there is data in the transmit shift register.
++        /// - If the FIFO is disabled, this bit is set when the transmit holding register is empty.
++        /// - If the FIFO is enabled, the TXFE bit is set when the transmit FIFO is empty.
++        /// - This bit does not indicate if there is data in the transmit shift register.
 +        TXFE OFFSET(7) NUMBITS(1) [],
 +
 +        /// Transmit FIFO full. The meaning of this bit depends on the state of the FEN bit in the
-+        /// UARTLCR_ LCRH Register.
++        /// LCR_H Register.
 +        ///
-+        /// If the FIFO is disabled, this bit is set when the transmit holding register is full. If
-+        /// the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
++        /// - If the FIFO is disabled, this bit is set when the transmit holding register is full.
++        /// - If the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
 +        TXFF OFFSET(5) NUMBITS(1) [],
 +
 +        /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-+        /// UARTLCR_H Register.
++        /// LCR_H Register.
 +        ///
 +        /// If the FIFO is disabled, this bit is set when the receive holding register is empty. If
 +        /// the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
-+        RXFE OFFSET(4) NUMBITS(1) []
++
++        /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
++        /// LCR_H Register.
++        ///
++        /// - If the FIFO is disabled, this bit is set when the receive holding register is empty.
++        /// - If the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
++        RXFE OFFSET(4) NUMBITS(1) [],
++
++        /// UART busy. If this bit is set to 1, the UART is busy transmitting data. This bit remains
++        /// set until the complete byte, including all the stop bits, has been sent from the shift
++        /// register.
++        ///
++        /// This bit is set as soon as the transmit FIFO becomes non-empty, regardless of whether
++        /// the UART is enabled or not.
++        BUSY OFFSET(3) NUMBITS(1) []
 +    ],
 +
-+    /// Integer Baud rate divisor
++    /// Integer Baud Rate Divisor.
 +    IBRD [
-+        /// Integer Baud rate divisor
-+        IBRD OFFSET(0) NUMBITS(16) []
++        /// The integer baud rate divisor.
++        BAUD_DIVINT OFFSET(0) NUMBITS(16) []
 +    ],
 +
-+    /// Fractional Baud rate divisor
++    /// Fractional Baud Rate Divisor.
 +    FBRD [
-+        /// Fractional Baud rate divisor
-+        FBRD OFFSET(0) NUMBITS(6) []
++        ///  The fractional baud rate divisor.
++        BAUD_DIVFRAC OFFSET(0) NUMBITS(6) []
 +    ],
 +
-+    /// Line Control register
-+    LCRH [
++    /// Line Control Register.
++    LCR_H [
 +        /// Word length. These bits indicate the number of data bits transmitted or received in a
 +        /// frame.
 +        WLEN OFFSET(5) NUMBITS(2) [
@@ -511,34 +530,42 @@ diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 06_dri
 +        /// Enable FIFOs:
 +        ///
 +        /// 0 = FIFOs are disabled (character mode) that is, the FIFOs become 1-byte-deep holding
-+        /// registers
++        /// registers.
 +        ///
-+        /// 1 = transmit and receive FIFO buffers are enabled (FIFO mode).
++        /// 1 = Transmit and receive FIFO buffers are enabled (FIFO mode).
 +        FEN  OFFSET(4) NUMBITS(1) [
 +            FifosDisabled = 0,
 +            FifosEnabled = 1
 +        ]
 +    ],
 +
-+    /// Control Register
++    /// Control Register.
 +    CR [
 +        /// Receive enable. If this bit is set to 1, the receive section of the UART is enabled.
-+        /// Data reception occurs for UART signals. When the UART is disabled in the middle of
-+        /// reception, it completes the current character before stopping.
-+        RXE    OFFSET(9) NUMBITS(1) [
++        /// Data reception occurs for either UART signals or SIR signals depending on the setting of
++        /// the SIREN bit. When the UART is disabled in the middle of reception, it completes the
++        /// current character before stopping.
++        RXE OFFSET(9) NUMBITS(1) [
 +            Disabled = 0,
 +            Enabled = 1
 +        ],
 +
 +        /// Transmit enable. If this bit is set to 1, the transmit section of the UART is enabled.
-+        /// Data transmission occurs for UART signals. When the UART is disabled in the middle of
-+        /// transmission, it completes the current character before stopping.
-+        TXE    OFFSET(8) NUMBITS(1) [
++        /// Data transmission occurs for either UART signals, or SIR signals depending on the
++        /// setting of the SIREN bit. When the UART is disabled in the middle of transmission, it
++        /// completes the current character before stopping.
++        TXE OFFSET(8) NUMBITS(1) [
 +            Disabled = 0,
 +            Enabled = 1
 +        ],
 +
-+        /// UART enable
++        /// UART enable:
++        ///
++        /// 0 = UART is disabled. If the UART is disabled in the middle of transmission or
++        /// reception, it completes the current character before stopping.
++        ///
++        /// 1 = The UART is enabled. Data transmission and reception occurs for either UART signals
++        /// or SIR signals depending on the setting of the SIREN bit
 +        UARTEN OFFSET(0) NUMBITS(1) [
 +            /// If the UART is disabled in the middle of transmission or reception, it completes the
 +            /// current character before stopping.
@@ -547,9 +574,9 @@ diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 06_dri
 +        ]
 +    ],
 +
-+    /// Interrupt Clear Register
++    /// Interrupt Clear Register.
 +    ICR [
-+        /// Meta field for all pending interrupts
++        /// Meta field for all pending interrupts.
 +        ALL OFFSET(0) NUMBITS(11) []
 +    ]
 +}
@@ -563,7 +590,7 @@ diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 06_dri
 +        (0x1c => _reserved2),
 +        (0x24 => IBRD: WriteOnly<u32, IBRD::Register>),
 +        (0x28 => FBRD: WriteOnly<u32, FBRD::Register>),
-+        (0x2c => LCRH: WriteOnly<u32, LCRH::Register>),
++        (0x2c => LCR_H: WriteOnly<u32, LCR_H::Register>),
 +        (0x30 => CR: WriteOnly<u32, CR::Register>),
 +        (0x34 => _reserved3),
 +        (0x44 => ICR: WriteOnly<u32, ICR::Register>),
@@ -621,11 +648,18 @@ diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 06_dri
 +    /// This results in 8N1 and 921_600 baud.
 +    ///
 +    /// The calculation for the BRD is (we set the clock to 48 MHz in config.txt):
-+    /// `(48_000_000 / 16) / 921_600 = 3.2552083`. `3` goes to the `IBRD` (integer field).
++    /// `(48_000_000 / 16) / 921_600 = 3.2552083`.
++    ///
++    /// This means the integer part is `3` and goes into the `IBRD`.
++    /// The fractional part is `0.2552083`.
 +    ///
-+    /// The `FBRD` (fractional field) is only 6 bits so `0.2552083 * 64 = 16.3 rounded to 16` will
-+    /// give the best approximation we can get. A 5modulo error margin is acceptable for UART and we're
-+    /// now at 0.02modulo.
++    /// `FBRD` calculation according to the PL011 Technical Reference Manual:
++    /// `INTEGER((0.2552083 * 64) + 0.5) = 16`.
++    ///
++    /// Therefore, the generated baud rate divider is: `3 + 16/64 = 3.25`. Which results in a
++    /// genrated baud rate of `48_000_000 / (16 * 3.25) = 923_077`.
++    ///
++    /// Error = `((923_077 - 921_600) / 921_600) * 100 = 0.16modulo`.
 +    pub fn init(&mut self) {
 +        // Execution can arrive here while there are still characters queued in the TX FIFO and
 +        // actively being sent out by the UART hardware. If the UART is turned off in this case,
@@ -643,14 +677,18 @@ diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 06_dri
 +        // Clear all pending interrupts.
 +        self.registers.ICR.write(ICR::ALL::CLEAR);
 +
-+        // Set the baud rate.
-+        self.registers.IBRD.write(IBRD::IBRD.val(3));
-+        self.registers.FBRD.write(FBRD::FBRD.val(16));
-+
-+        // Set 8N1 + FIFO on.
++        // From the PL011 Technical Reference Manual:
++        //
++        // The LCR_H, IBRD, and FBRD registers form the single 30-bit wide LCR Register that is
++        // updated on a single write strobe generated by a LCR_H write. So, to internally update the
++        // contents of IBRD or FBRD, a LCR_H write must always be performed at the end.
++        //
++        // Set the baud rate, 8N1 and FIFO enabled.
++        self.registers.IBRD.write(IBRD::BAUD_DIVINT.val(3));
++        self.registers.FBRD.write(FBRD::BAUD_DIVFRAC.val(16));
 +        self.registers
-+            .LCRH
-+            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled);
++            .LCR_H
++            .write(LCR_H::WLEN::EightBit + LCR_H::FEN::FifosEnabled);
 +
 +        // Turn the UART on.
 +        self.registers
@@ -673,25 +711,10 @@ diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 06_dri
 +
 +    /// Block execution until the last buffered character has been physically put on the TX wire.
 +    fn flush(&self) {
-+        // The bit time for 921_600 baud is 1 / 921_600 = 1.09 µs. 8N1 has a total of 10 bits per
-+        // symbol (start bit, 8 data bits, stop bit), so one symbol takes round about 10 * 1.09 =
-+        // 10.9 µs, or 10_900 ns. Round it up to 12_000 ns to be on the safe side.
-+        //
-+        // Now make an educated guess for a good delay value. According to Wikipedia, the fastest
-+        // RPi4 clocks around 1.5 GHz.
-+        //
-+        // So lets try to be on the safe side and default to 24_000 cycles, which would equal 12_000
-+        // ns would the CPU be clocked at 2 GHz.
-+        const CHAR_TIME_SAFE: usize = 24_000;
-+
-+        // Spin until TX FIFO empty is set.
-+        while !self.registers.FR.matches_all(FR::TXFE::SET) {
++        // Spin until the busy bit is cleared.
++        while self.registers.FR.matches_all(FR::BUSY::SET) {
 +            cpu::nop();
 +        }
-+
-+        // After the last character has been queued for transmission, wait for the time of one
-+        // character + some extra time for safety.
-+        cpu::spin_for_cycles(CHAR_TIME_SAFE);
 +    }
 +
 +    /// Retrieve a character.
@@ -1217,12 +1240,15 @@ diff -uNr 05_safe_globals/src/console.rs 06_drivers_gpio_uart/src/console.rs
 diff -uNr 05_safe_globals/src/cpu.rs 06_drivers_gpio_uart/src/cpu.rs
 --- 05_safe_globals/src/cpu.rs
 +++ 06_drivers_gpio_uart/src/cpu.rs
-@@ -15,4 +15,4 @@
+@@ -15,4 +15,7 @@
  //--------------------------------------------------------------------------------------------------
  // Architectural Public Reexports
  //--------------------------------------------------------------------------------------------------
 -pub use arch_cpu::wait_forever;
-+pub use arch_cpu::{nop, spin_for_cycles, wait_forever};
++pub use arch_cpu::{nop, wait_forever};
++
++#[cfg(feature = "bsp_rpi3")]
++pub use arch_cpu::spin_for_cycles;
 
 diff -uNr 05_safe_globals/src/driver.rs 06_drivers_gpio_uart/src/driver.rs
 --- 05_safe_globals/src/driver.rs
diff --git a/06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs b/06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
index e16fdecc8..ade53a3ca 100644
--- a/06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
+++ b/06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
@@ -20,6 +20,7 @@ use cortex_a::asm;
 pub use asm::nop;
 
 /// Spin for `n` cycles.
+#[cfg(feature = "bsp_rpi3")]
 #[inline(always)]
 pub fn spin_for_cycles(n: usize) {
     for _ in 0..n {
diff --git a/06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 39834723b..ce39752d1 100644
--- a/06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -3,6 +3,11 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
+//!
+//! # Resources
+//!
+//! - https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
+//! - https://developer.arm.com/documentation/ddi0183/latest
 
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, synchronization,
@@ -17,50 +22,63 @@ use register::{mmio::*, register_bitfields, register_structs};
 
 // PL011 UART registers.
 //
-// Descriptions taken from
-// https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
+// Descriptions taken from "PrimeCell UART (PL011) Technical Reference Manual" r1p5.
 register_bitfields! {
     u32,
 
-    /// Flag Register
+    /// Flag Register.
     FR [
         /// Transmit FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-        /// Line Control Register, UARTLCR_ LCRH.
+        /// Line Control Register, LCR_H.
         ///
-        /// If the FIFO is disabled, this bit is set when the transmit holding register is empty. If
-        /// the FIFO is enabled, the TXFE bit is set when the transmit FIFO is empty. This bit does
-        /// not indicate if there is data in the transmit shift register.
+        /// - If the FIFO is disabled, this bit is set when the transmit holding register is empty.
+        /// - If the FIFO is enabled, the TXFE bit is set when the transmit FIFO is empty.
+        /// - This bit does not indicate if there is data in the transmit shift register.
         TXFE OFFSET(7) NUMBITS(1) [],
 
         /// Transmit FIFO full. The meaning of this bit depends on the state of the FEN bit in the
-        /// UARTLCR_ LCRH Register.
+        /// LCR_H Register.
         ///
-        /// If the FIFO is disabled, this bit is set when the transmit holding register is full. If
-        /// the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
+        /// - If the FIFO is disabled, this bit is set when the transmit holding register is full.
+        /// - If the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
         TXFF OFFSET(5) NUMBITS(1) [],
 
         /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-        /// UARTLCR_H Register.
+        /// LCR_H Register.
         ///
         /// If the FIFO is disabled, this bit is set when the receive holding register is empty. If
         /// the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
-        RXFE OFFSET(4) NUMBITS(1) []
+
+        /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
+        /// LCR_H Register.
+        ///
+        /// - If the FIFO is disabled, this bit is set when the receive holding register is empty.
+        /// - If the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
+        RXFE OFFSET(4) NUMBITS(1) [],
+
+        /// UART busy. If this bit is set to 1, the UART is busy transmitting data. This bit remains
+        /// set until the complete byte, including all the stop bits, has been sent from the shift
+        /// register.
+        ///
+        /// This bit is set as soon as the transmit FIFO becomes non-empty, regardless of whether
+        /// the UART is enabled or not.
+        BUSY OFFSET(3) NUMBITS(1) []
     ],
 
-    /// Integer Baud rate divisor
+    /// Integer Baud Rate Divisor.
     IBRD [
-        /// Integer Baud rate divisor
-        IBRD OFFSET(0) NUMBITS(16) []
+        /// The integer baud rate divisor.
+        BAUD_DIVINT OFFSET(0) NUMBITS(16) []
     ],
 
-    /// Fractional Baud rate divisor
+    /// Fractional Baud Rate Divisor.
     FBRD [
-        /// Fractional Baud rate divisor
-        FBRD OFFSET(0) NUMBITS(6) []
+        ///  The fractional baud rate divisor.
+        BAUD_DIVFRAC OFFSET(0) NUMBITS(6) []
     ],
 
-    /// Line Control register
-    LCRH [
+    /// Line Control Register.
+    LCR_H [
         /// Word length. These bits indicate the number of data bits transmitted or received in a
         /// frame.
         WLEN OFFSET(5) NUMBITS(2) [
@@ -73,34 +91,42 @@ register_bitfields! {
         /// Enable FIFOs:
         ///
         /// 0 = FIFOs are disabled (character mode) that is, the FIFOs become 1-byte-deep holding
-        /// registers
+        /// registers.
         ///
-        /// 1 = transmit and receive FIFO buffers are enabled (FIFO mode).
+        /// 1 = Transmit and receive FIFO buffers are enabled (FIFO mode).
         FEN  OFFSET(4) NUMBITS(1) [
             FifosDisabled = 0,
             FifosEnabled = 1
         ]
     ],
 
-    /// Control Register
+    /// Control Register.
     CR [
         /// Receive enable. If this bit is set to 1, the receive section of the UART is enabled.
-        /// Data reception occurs for UART signals. When the UART is disabled in the middle of
-        /// reception, it completes the current character before stopping.
-        RXE    OFFSET(9) NUMBITS(1) [
+        /// Data reception occurs for either UART signals or SIR signals depending on the setting of
+        /// the SIREN bit. When the UART is disabled in the middle of reception, it completes the
+        /// current character before stopping.
+        RXE OFFSET(9) NUMBITS(1) [
             Disabled = 0,
             Enabled = 1
         ],
 
         /// Transmit enable. If this bit is set to 1, the transmit section of the UART is enabled.
-        /// Data transmission occurs for UART signals. When the UART is disabled in the middle of
-        /// transmission, it completes the current character before stopping.
-        TXE    OFFSET(8) NUMBITS(1) [
+        /// Data transmission occurs for either UART signals, or SIR signals depending on the
+        /// setting of the SIREN bit. When the UART is disabled in the middle of transmission, it
+        /// completes the current character before stopping.
+        TXE OFFSET(8) NUMBITS(1) [
             Disabled = 0,
             Enabled = 1
         ],
 
-        /// UART enable
+        /// UART enable:
+        ///
+        /// 0 = UART is disabled. If the UART is disabled in the middle of transmission or
+        /// reception, it completes the current character before stopping.
+        ///
+        /// 1 = The UART is enabled. Data transmission and reception occurs for either UART signals
+        /// or SIR signals depending on the setting of the SIREN bit
         UARTEN OFFSET(0) NUMBITS(1) [
             /// If the UART is disabled in the middle of transmission or reception, it completes the
             /// current character before stopping.
@@ -109,9 +135,9 @@ register_bitfields! {
         ]
     ],
 
-    /// Interrupt Clear Register
+    /// Interrupt Clear Register.
     ICR [
-        /// Meta field for all pending interrupts
+        /// Meta field for all pending interrupts.
         ALL OFFSET(0) NUMBITS(11) []
     ]
 }
@@ -125,7 +151,7 @@ register_structs! {
         (0x1c => _reserved2),
         (0x24 => IBRD: WriteOnly<u32, IBRD::Register>),
         (0x28 => FBRD: WriteOnly<u32, FBRD::Register>),
-        (0x2c => LCRH: WriteOnly<u32, LCRH::Register>),
+        (0x2c => LCR_H: WriteOnly<u32, LCR_H::Register>),
         (0x30 => CR: WriteOnly<u32, CR::Register>),
         (0x34 => _reserved3),
         (0x44 => ICR: WriteOnly<u32, ICR::Register>),
@@ -183,11 +209,18 @@ impl PL011UartInner {
     /// This results in 8N1 and 921_600 baud.
     ///
     /// The calculation for the BRD is (we set the clock to 48 MHz in config.txt):
-    /// `(48_000_000 / 16) / 921_600 = 3.2552083`. `3` goes to the `IBRD` (integer field).
+    /// `(48_000_000 / 16) / 921_600 = 3.2552083`.
+    ///
+    /// This means the integer part is `3` and goes into the `IBRD`.
+    /// The fractional part is `0.2552083`.
     ///
-    /// The `FBRD` (fractional field) is only 6 bits so `0.2552083 * 64 = 16.3 rounded to 16` will
-    /// give the best approximation we can get. A 5% error margin is acceptable for UART and we're
-    /// now at 0.02%.
+    /// `FBRD` calculation according to the PL011 Technical Reference Manual:
+    /// `INTEGER((0.2552083 * 64) + 0.5) = 16`.
+    ///
+    /// Therefore, the generated baud rate divider is: `3 + 16/64 = 3.25`. Which results in a
+    /// genrated baud rate of `48_000_000 / (16 * 3.25) = 923_077`.
+    ///
+    /// Error = `((923_077 - 921_600) / 921_600) * 100 = 0.16%`.
     pub fn init(&mut self) {
         // Execution can arrive here while there are still characters queued in the TX FIFO and
         // actively being sent out by the UART hardware. If the UART is turned off in this case,
@@ -205,14 +238,18 @@ impl PL011UartInner {
         // Clear all pending interrupts.
         self.registers.ICR.write(ICR::ALL::CLEAR);
 
-        // Set the baud rate.
-        self.registers.IBRD.write(IBRD::IBRD.val(3));
-        self.registers.FBRD.write(FBRD::FBRD.val(16));
-
-        // Set 8N1 + FIFO on.
+        // From the PL011 Technical Reference Manual:
+        //
+        // The LCR_H, IBRD, and FBRD registers form the single 30-bit wide LCR Register that is
+        // updated on a single write strobe generated by a LCR_H write. So, to internally update the
+        // contents of IBRD or FBRD, a LCR_H write must always be performed at the end.
+        //
+        // Set the baud rate, 8N1 and FIFO enabled.
+        self.registers.IBRD.write(IBRD::BAUD_DIVINT.val(3));
+        self.registers.FBRD.write(FBRD::BAUD_DIVFRAC.val(16));
         self.registers
-            .LCRH
-            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled);
+            .LCR_H
+            .write(LCR_H::WLEN::EightBit + LCR_H::FEN::FifosEnabled);
 
         // Turn the UART on.
         self.registers
@@ -235,25 +272,10 @@ impl PL011UartInner {
 
     /// Block execution until the last buffered character has been physically put on the TX wire.
     fn flush(&self) {
-        // The bit time for 921_600 baud is 1 / 921_600 = 1.09 µs. 8N1 has a total of 10 bits per
-        // symbol (start bit, 8 data bits, stop bit), so one symbol takes round about 10 * 1.09 =
-        // 10.9 µs, or 10_900 ns. Round it up to 12_000 ns to be on the safe side.
-        //
-        // Now make an educated guess for a good delay value. According to Wikipedia, the fastest
-        // RPi4 clocks around 1.5 GHz.
-        //
-        // So lets try to be on the safe side and default to 24_000 cycles, which would equal 12_000
-        // ns would the CPU be clocked at 2 GHz.
-        const CHAR_TIME_SAFE: usize = 24_000;
-
-        // Spin until TX FIFO empty is set.
-        while !self.registers.FR.matches_all(FR::TXFE::SET) {
+        // Spin until the busy bit is cleared.
+        while self.registers.FR.matches_all(FR::BUSY::SET) {
             cpu::nop();
         }
-
-        // After the last character has been queued for transmission, wait for the time of one
-        // character + some extra time for safety.
-        cpu::spin_for_cycles(CHAR_TIME_SAFE);
     }
 
     /// Retrieve a character.
diff --git a/06_drivers_gpio_uart/src/cpu.rs b/06_drivers_gpio_uart/src/cpu.rs
index 103f00dba..f0df4791f 100644
--- a/06_drivers_gpio_uart/src/cpu.rs
+++ b/06_drivers_gpio_uart/src/cpu.rs
@@ -15,4 +15,7 @@ pub mod smp;
 //--------------------------------------------------------------------------------------------------
 // Architectural Public Reexports
 //--------------------------------------------------------------------------------------------------
-pub use arch_cpu::{nop, spin_for_cycles, wait_forever};
+pub use arch_cpu::{nop, wait_forever};
+
+#[cfg(feature = "bsp_rpi3")]
+pub use arch_cpu::spin_for_cycles;
diff --git a/07_uart_chainloader/README.md b/07_uart_chainloader/README.md
index 0bd4bce20..1cca2b122 100644
--- a/07_uart_chainloader/README.md
+++ b/07_uart_chainloader/README.md
@@ -204,7 +204,7 @@ diff -uNr 06_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs 07_uart_chainloader
 diff -uNr 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs 07_uart_chainloader/src/_arch/aarch64/cpu.rs
 --- 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
 +++ 07_uart_chainloader/src/_arch/aarch64/cpu.rs
-@@ -34,3 +34,19 @@
+@@ -35,3 +35,19 @@
          asm::wfe()
      }
  }
@@ -241,7 +241,7 @@ diff -uNr 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 07_uart
 diff -uNr 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 --- 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 +++ 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
-@@ -257,7 +257,7 @@
+@@ -279,7 +279,7 @@
      }
 
      /// Retrieve a character.
@@ -250,7 +250,7 @@ diff -uNr 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 0
          // If RX FIFO is empty,
          if self.registers.FR.matches_all(FR::RXFE::SET) {
              // immediately return in non-blocking mode.
-@@ -272,12 +272,7 @@
+@@ -294,12 +294,7 @@
          }
 
          // Read one character.
@@ -264,7 +264,7 @@ diff -uNr 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 0
 
          // Update statistics.
          self.chars_read += 1;
-@@ -357,14 +352,14 @@
+@@ -379,14 +374,14 @@
  impl console::interface::Read for PL011Uart {
      fn read_char(&self) -> char {
          self.inner
@@ -393,12 +393,15 @@ diff -uNr 06_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs 07_uart_chainloader
 diff -uNr 06_drivers_gpio_uart/src/cpu.rs 07_uart_chainloader/src/cpu.rs
 --- 06_drivers_gpio_uart/src/cpu.rs
 +++ 07_uart_chainloader/src/cpu.rs
-@@ -15,4 +15,4 @@
+@@ -15,7 +15,7 @@
  //--------------------------------------------------------------------------------------------------
  // Architectural Public Reexports
  //--------------------------------------------------------------------------------------------------
--pub use arch_cpu::{nop, spin_for_cycles, wait_forever};
-+pub use arch_cpu::{branch_to_raw_addr, nop, spin_for_cycles, wait_forever};
+-pub use arch_cpu::{nop, wait_forever};
++pub use arch_cpu::{branch_to_raw_addr, nop, wait_forever};
+
+ #[cfg(feature = "bsp_rpi3")]
+ pub use arch_cpu::spin_for_cycles;
 
 diff -uNr 06_drivers_gpio_uart/src/main.rs 07_uart_chainloader/src/main.rs
 --- 06_drivers_gpio_uart/src/main.rs
diff --git a/07_uart_chainloader/demo_payload_rpi3.img b/07_uart_chainloader/demo_payload_rpi3.img
index 80df7c197febdb8b7a7739c51af927e30915b3c9..83fe7bffab6b25be79d8cd89f4803003add22f0b 100755
GIT binary patch
delta 1161
zcmah{T}YEr7(VCw_D$#C{{PImO`UFotX3*U=BJ|NBBBv!(2q+BONy2^g@lU&5ruX-
zl64ViMKQ06)rDON5hz}W{dntCg1G{V0-03nJ=+ngn-093?|Gm1=lS0A&eYtiiIm_s
z#5RY?^R+5$Oe)YQM(A056%psSnXHJ2JfJS29M{L%1q-%!S;(|_dNCKtDV0^88bX#@
zyF>iIzGu_+IvNqr3PBg$5dGL0YgQb=3{k082$|`e^hyY_%NBdAtjEfri+Cn1vDKVS
zQMh4_E#)_3TplYce2Ps@AIV23QUFqtEr|5uePpDmgf0~Y@k83AmWAmOdQ)A71^PtY
z;w2`M1flU9Wt53`cG*ZAvJzE_=s^??B&(#T3jChs5~|m<RWDQ!JrwT~AQ5gziLmrU
z6=Go#mf{JPlEphFHUm1S*`K#uN?x9EW#GKVSFqwCanUfD(4&--7HS<PorY{aLS%Hs
zP7>*CSC-nM-L>udkMvl4P+-a;Jy81FJ2Cnl+A;pN)>q`T6Gr)gVy=1ZUgd;6!>V<a
zwx-rpF0fvhZxT7`8nHZ;*WQ})ONivP(|~S=5m2uU=|;daP=i8;@NjWKJH4x`tM77=
z?&)$8l)`~qas|94CL6!fV-Dna&uR`U!U0u7YsxFhQx}Ye-ChYzsW!ub+y<)DxA=ly
z;sI;Kxt~-R9Yc^IfT1oo2|{Kw@(>&R8mq>p2C=kX?@@<y(2G34Yw(Nykcr0h-9_0Q
zaf9|5wj&PXb}j6d+Y0?4GBa;XuNcZC705&MzTy0TQrzr`ob;5@d;*pzF(5@(UL*4M
zXL?LdrS~wYBA5aUu^~7rvqKoKBrNVQ9|DWRI2=H-JG0br(LT8h#ugmGf}f-dMm_GK
zAB}z1L=KGXj{{GZIiG3BG_UQn{>>74)NFS4o3mb6vdkeI!x%H?G95BE4qUWkqcq&R
z&TDOTIL>(k=i4}j70#T0<9Bj?tE-!1C6BM>n5z)cx|RAZ=d4$YvpU8(ALe+5&RXoM
zurbR<=vT`DRgXH0+_cGBhcUfo?eJ~+zHt3o-jCffSe*OS+z)Mq;!C)bhKf6W1HAGp
AJOBUy

delta 1209
zcmb7DO>7fK6n?Yob?gxEf9y3F?*?LLjS8}9NU7S!Nt9B;0kKL1NC>iusM<!VR7Gmb
zDJ!*VLE(_mqzye(YT(d1y`(Zoq#TIpg`YzZ0nQE_FyTT~1aSmx->fH6+gqRXwEMm9
z{mq*<=Q^)<PHrJLXzCXE?zhKT5_|4}DFQH8eF#(^PS6K3&>7Y)Z6oiN_e%+~OH=8B
zeB!<jigmwQoIe9^b)_}=9{<1Lbno$Bo-jE!6!^2^ID^cVPfB`*J(35=a=G9+NI3dR
z*(2o>?27Wcr1MXzJmuX>yn2QjmReqFT9c)oM0s&TFCio4@W!7>t5u*I047_owUs`g
zqdo7?vn0h9H(6ws<pV{@PO-5-8@a~55A@{@#pwz*UTyN0_+fNyE3INwE$b<L0Jgc3
zRZ4!$X3V6R9DIK#ZKn~0W7l%D6~7oV$-`?|aNT%_p{MD6GtOtiz6ie8Jd>uE+A=P@
z8Z5M&&(W$JovlTnZm?HDt<?<DwF^L}&TF*hG^+B@-J$&EQ!kzA>bDZ_Z1N*a{nwIQ
zdWPjVKOQP<T250=4Isr$S3_@mEzM<}P$qS>zwSdehx1+mt*e_9=bNqm`hWto*<!un
zT`@$XDF~lM%XlYzc7RMITP*fXxNEPLp(FNoYALq)HMHa168hq`Gp&Jkm*<@D*rtD|
zzn)Wy^Pj|`yK@T6``2vKH^iQY`wIFFYM^!#-xEK9LBI$J6*Pld7}>jE&=ekxXLE<E
z?_i@5BLF_Q*o=OU@rVQYIJ*!T+1l8d4($Cp?u<|DjBkBso<`pY;qG;)SRW(Z`B#`3
zZBrC%*Jh`pAOFu39sCNH+0Iz}7%o|DTq!;H1L)0H&h)~n^CmxvjOsxJKBQ`<F{I%v
z<$nEQNZgMQ+XOJ&M^Kg1v&*RbK>$98AvP0>kYRQyHm0sN;Yj}>c%`nqWIe5mq0{QW
z*$UI+asAhL!-`AjN=0BCvnxNbqw((X9}^9)ps=Qs4ZL3AjNqe!|6E{PaaaE9KP>q5
zsz(I&3jgB*i!NkHCs{J_q56xcdt2~x0<W?k5^4WjtkKm1t0eaMzYH|c5f)OrNS^Ii
g4;R*LnurUDdi+~N4GMce*s<&#^;2@1^&}7f4XCg_vj6}9

diff --git a/07_uart_chainloader/demo_payload_rpi4.img b/07_uart_chainloader/demo_payload_rpi4.img
index 54fe2b818bced6213d5f094a90562842b864b22b..f2dec5cba4e85d94d9b3a61918b90cca5c7be02b 100755
GIT binary patch
delta 1265
zcmZWoTWB0*6h8mV?q(-xyF0r(vlp|;>~75_QBZ4=MH-t)+JfZ4ViX^&kX=O-`w+z^
z5!u8FRV-zHP9Q#&q!pS;K_aUU5rh;`3_eIuL&b+|w+}8+A>N1+O~x}bf5gjy<;-_3
z|95Wt*}&TawNCcYd)W?2`y>Ff3}87oukprh;7u9$T>U}GV1=^IZ?Nf!Re5qF45qE5
z&6PJHHPmg$U%TIHPIn1w@-tGUfIIRy%hksMXPApHI3&HO;pf2*rHZSv^>;!Kuu!GI
z`xf;2?Y3Q6n$hZ;9b=3Y>iNUhn4UYvI{<2jsF1Cbz|XN^esMH|n@1|_JdQ@p+-inj
zf$0hPuxXc}d&4;?t?wTP``0sJ3n&QyuS6b=jV5@j7_eH@Lpxc=Z)LD8+9j3mz+!Z$
ze?8CFsGn95ya=5LH^wOATgi&k_e)YQ50eg8I`Kj@FU@OsJ(|hi>g0XItdZw~rwZQt
zPBm!#Rt;G+w;Ih2zl-)9YZiG!PAs)Cm~C8;tR2VM-ibx|?s?$5lVI6bf!k-9^+q0e
zg3@N2SsYQjT#`vO%U;1()w?}LwdX`G%g2eabxpRmoPgzg8MJy`TmoA#@&-NElo`Li
z@64GYDE%UX?bW`J#YjvabeBm(a6>Lr$b0|>UAMwcdtv>wzAZ3HBg|ZBS5DjGK^mBX
zPsENZgf0>~q~PV)J+X3u%ar%@YK{j;zi#GnGnUc!PTBoIbLFkT^u+U8;{N_1tc3SY
zVI-~(ReHHXk$t2`SonK|!DF<b8kBpuM0yO0yh3Sr{^`saV0<NF@oc=W-3Y<^F1{;=
zm*T@m#HCS*-letTgN$KUqFZ&FyUKX;W8j@`b3uGK@xSoJ#9%c?2j>p1C|mww3*4#F
zdC>a)9%O;0L=SE6(L=k=fM2WV+BoWWJ%7}TsRXAd&Jm$oH_#vAwS6Z^6J81jOsgS>
zmo5?Z^35L3=+N*<ZJ0IikyH|wwcd2Ajf(h(Pzj#=fIn$ps5evp_Nut9C-Z;kzLjp(
z6E*2$8l@-OI<_ZIRDTras4!2Z{jdXyZ-k#N&y!CDrnC3tzwyh$e?Yq^a7e_zE3ha-
zf+<`}KAZbp&>9E5Wc)H764;xCYG}UoUZETKa;ivkT1X|8=OVsu5pSeQYzFPri0`@Y
f!1IFOP(>-OHtAOu_K2`g;Y@l;x|znG(~tiJ1h!Y{

delta 1313
zcmah|O>7%g5T3VdyX&OIUfa8CC$+QdxV4>Dl%z=vYG|BRIp7{r+=>f_+KLbo2qDCw
z5eICkh##dwe!NHpRU$t<R2wc-E)s!DTrSNis#-!trOHVUSm6@HPuQqrnO(mkS|Kr#
zHJ&%${CzX~>EO-5+J4fw7Vi|4TOODp0ACs<l{Oy$-4KCZu0Jp6<fyLE2B{X8#dB*C
z<Sl<Jzw{A2o9ofV@16fE_UN$x>*=CnXT9)C!?w?|s`!dvq}WelfvndDJQKvRE_jE9
zewBUe{YEex6|c|uo+CaZMYCnCetXZ3D2%D~)y@-yOx8pDt`fC8Ksy0yd$F<2lR#e|
z8=)6TH(PzGOr}|XAa7K==>k-X;=a69f}S<|q;PBZ7+AkeNG4zqEVEAnXF^1wt+dB%
z;Y=Nvt}x%twgU-4-_Nw*a3AfZD>z>(4K6}O#F~H+_XIPH|KGlmp%QAzh_my-q)<}X
z<zQEGK2Eb(SwYWN$&{Plu6WJgD?Sr>tRau=hv311g$!+qk;MRkndS$Axoz89+r=Q=
zxd3$M9GKP>pw`R8{4fbLf?+cY33fzII7KGpI62SWkPo{R<%7r9<FtSkTUSMM)ApG5
zZLgVe>>OCUB5h*24Uy0<cI``fALM=&!E$>qCzvg(L(X!M1PAgtLgqX$<hcE@aTnHy
z>)ZrAH%jtL9mcp-@FHObD};{u(YlD%UW0ucIug=TRK&Q+YLa?TzX!c+HPodl<5r(H
zzclTs7GF~$NBg|6Bq`&}4ynUNmiiHyMLkNSpZx^R;(}_Rr>TJY#B!RJG3>xY`;rd&
z9gbzE!r6{FA6$3rL+k9_@JNDR9=7<Omv=KfL>g>2+#@@~ULkbjJD^b<R`;=|BmWyd
z6&b3m_qwZXrA4#7_!PA(cs{t^e~9iy7BO+_FHF2+54LCFtTa<?R!Rq4Oxas4PC5<X
zT!0_YJG-`q8(5S)d9x`>i|?cD#zUGCJVbU_86jKDh-$2=WMY5r!6yDC*n%q$SwmTs
zrP$-%F*dJi$wONE6>r&<F>WK(uIL*3Q9WLXN87L<f1c&Z9+mKOKVGIQfABQ;S-A2f
zzWGGiyWIA1{Qbw<5MY*lroC!py4r1==H;H@_7t~WF67fn8&%?Zi@gv{BTsKdHUCtg
u?YqlpG)JznmFQ^O)Bngb$48TSD~`_Nug2d4{C$?a7<*HYy4a1_OMe5GerJFH

diff --git a/07_uart_chainloader/src/_arch/aarch64/cpu.rs b/07_uart_chainloader/src/_arch/aarch64/cpu.rs
index b53dc2697..893c7580b 100644
--- a/07_uart_chainloader/src/_arch/aarch64/cpu.rs
+++ b/07_uart_chainloader/src/_arch/aarch64/cpu.rs
@@ -20,6 +20,7 @@ use cortex_a::asm;
 pub use asm::nop;
 
 /// Spin for `n` cycles.
+#[cfg(feature = "bsp_rpi3")]
 #[inline(always)]
 pub fn spin_for_cycles(n: usize) {
     for _ in 0..n {
diff --git a/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 9a92c9d21..f21395d36 100644
--- a/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -3,6 +3,11 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
+//!
+//! # Resources
+//!
+//! - https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
+//! - https://developer.arm.com/documentation/ddi0183/latest
 
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, synchronization,
@@ -17,50 +22,63 @@ use register::{mmio::*, register_bitfields, register_structs};
 
 // PL011 UART registers.
 //
-// Descriptions taken from
-// https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
+// Descriptions taken from "PrimeCell UART (PL011) Technical Reference Manual" r1p5.
 register_bitfields! {
     u32,
 
-    /// Flag Register
+    /// Flag Register.
     FR [
         /// Transmit FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-        /// Line Control Register, UARTLCR_ LCRH.
+        /// Line Control Register, LCR_H.
         ///
-        /// If the FIFO is disabled, this bit is set when the transmit holding register is empty. If
-        /// the FIFO is enabled, the TXFE bit is set when the transmit FIFO is empty. This bit does
-        /// not indicate if there is data in the transmit shift register.
+        /// - If the FIFO is disabled, this bit is set when the transmit holding register is empty.
+        /// - If the FIFO is enabled, the TXFE bit is set when the transmit FIFO is empty.
+        /// - This bit does not indicate if there is data in the transmit shift register.
         TXFE OFFSET(7) NUMBITS(1) [],
 
         /// Transmit FIFO full. The meaning of this bit depends on the state of the FEN bit in the
-        /// UARTLCR_ LCRH Register.
+        /// LCR_H Register.
         ///
-        /// If the FIFO is disabled, this bit is set when the transmit holding register is full. If
-        /// the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
+        /// - If the FIFO is disabled, this bit is set when the transmit holding register is full.
+        /// - If the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
         TXFF OFFSET(5) NUMBITS(1) [],
 
         /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-        /// UARTLCR_H Register.
+        /// LCR_H Register.
         ///
         /// If the FIFO is disabled, this bit is set when the receive holding register is empty. If
         /// the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
-        RXFE OFFSET(4) NUMBITS(1) []
+
+        /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
+        /// LCR_H Register.
+        ///
+        /// - If the FIFO is disabled, this bit is set when the receive holding register is empty.
+        /// - If the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
+        RXFE OFFSET(4) NUMBITS(1) [],
+
+        /// UART busy. If this bit is set to 1, the UART is busy transmitting data. This bit remains
+        /// set until the complete byte, including all the stop bits, has been sent from the shift
+        /// register.
+        ///
+        /// This bit is set as soon as the transmit FIFO becomes non-empty, regardless of whether
+        /// the UART is enabled or not.
+        BUSY OFFSET(3) NUMBITS(1) []
     ],
 
-    /// Integer Baud rate divisor
+    /// Integer Baud Rate Divisor.
     IBRD [
-        /// Integer Baud rate divisor
-        IBRD OFFSET(0) NUMBITS(16) []
+        /// The integer baud rate divisor.
+        BAUD_DIVINT OFFSET(0) NUMBITS(16) []
     ],
 
-    /// Fractional Baud rate divisor
+    /// Fractional Baud Rate Divisor.
     FBRD [
-        /// Fractional Baud rate divisor
-        FBRD OFFSET(0) NUMBITS(6) []
+        ///  The fractional baud rate divisor.
+        BAUD_DIVFRAC OFFSET(0) NUMBITS(6) []
     ],
 
-    /// Line Control register
-    LCRH [
+    /// Line Control Register.
+    LCR_H [
         /// Word length. These bits indicate the number of data bits transmitted or received in a
         /// frame.
         WLEN OFFSET(5) NUMBITS(2) [
@@ -73,34 +91,42 @@ register_bitfields! {
         /// Enable FIFOs:
         ///
         /// 0 = FIFOs are disabled (character mode) that is, the FIFOs become 1-byte-deep holding
-        /// registers
+        /// registers.
         ///
-        /// 1 = transmit and receive FIFO buffers are enabled (FIFO mode).
+        /// 1 = Transmit and receive FIFO buffers are enabled (FIFO mode).
         FEN  OFFSET(4) NUMBITS(1) [
             FifosDisabled = 0,
             FifosEnabled = 1
         ]
     ],
 
-    /// Control Register
+    /// Control Register.
     CR [
         /// Receive enable. If this bit is set to 1, the receive section of the UART is enabled.
-        /// Data reception occurs for UART signals. When the UART is disabled in the middle of
-        /// reception, it completes the current character before stopping.
-        RXE    OFFSET(9) NUMBITS(1) [
+        /// Data reception occurs for either UART signals or SIR signals depending on the setting of
+        /// the SIREN bit. When the UART is disabled in the middle of reception, it completes the
+        /// current character before stopping.
+        RXE OFFSET(9) NUMBITS(1) [
             Disabled = 0,
             Enabled = 1
         ],
 
         /// Transmit enable. If this bit is set to 1, the transmit section of the UART is enabled.
-        /// Data transmission occurs for UART signals. When the UART is disabled in the middle of
-        /// transmission, it completes the current character before stopping.
-        TXE    OFFSET(8) NUMBITS(1) [
+        /// Data transmission occurs for either UART signals, or SIR signals depending on the
+        /// setting of the SIREN bit. When the UART is disabled in the middle of transmission, it
+        /// completes the current character before stopping.
+        TXE OFFSET(8) NUMBITS(1) [
             Disabled = 0,
             Enabled = 1
         ],
 
-        /// UART enable
+        /// UART enable:
+        ///
+        /// 0 = UART is disabled. If the UART is disabled in the middle of transmission or
+        /// reception, it completes the current character before stopping.
+        ///
+        /// 1 = The UART is enabled. Data transmission and reception occurs for either UART signals
+        /// or SIR signals depending on the setting of the SIREN bit
         UARTEN OFFSET(0) NUMBITS(1) [
             /// If the UART is disabled in the middle of transmission or reception, it completes the
             /// current character before stopping.
@@ -109,9 +135,9 @@ register_bitfields! {
         ]
     ],
 
-    /// Interrupt Clear Register
+    /// Interrupt Clear Register.
     ICR [
-        /// Meta field for all pending interrupts
+        /// Meta field for all pending interrupts.
         ALL OFFSET(0) NUMBITS(11) []
     ]
 }
@@ -125,7 +151,7 @@ register_structs! {
         (0x1c => _reserved2),
         (0x24 => IBRD: WriteOnly<u32, IBRD::Register>),
         (0x28 => FBRD: WriteOnly<u32, FBRD::Register>),
-        (0x2c => LCRH: WriteOnly<u32, LCRH::Register>),
+        (0x2c => LCR_H: WriteOnly<u32, LCR_H::Register>),
         (0x30 => CR: WriteOnly<u32, CR::Register>),
         (0x34 => _reserved3),
         (0x44 => ICR: WriteOnly<u32, ICR::Register>),
@@ -183,11 +209,18 @@ impl PL011UartInner {
     /// This results in 8N1 and 921_600 baud.
     ///
     /// The calculation for the BRD is (we set the clock to 48 MHz in config.txt):
-    /// `(48_000_000 / 16) / 921_600 = 3.2552083`. `3` goes to the `IBRD` (integer field).
+    /// `(48_000_000 / 16) / 921_600 = 3.2552083`.
+    ///
+    /// This means the integer part is `3` and goes into the `IBRD`.
+    /// The fractional part is `0.2552083`.
     ///
-    /// The `FBRD` (fractional field) is only 6 bits so `0.2552083 * 64 = 16.3 rounded to 16` will
-    /// give the best approximation we can get. A 5% error margin is acceptable for UART and we're
-    /// now at 0.02%.
+    /// `FBRD` calculation according to the PL011 Technical Reference Manual:
+    /// `INTEGER((0.2552083 * 64) + 0.5) = 16`.
+    ///
+    /// Therefore, the generated baud rate divider is: `3 + 16/64 = 3.25`. Which results in a
+    /// genrated baud rate of `48_000_000 / (16 * 3.25) = 923_077`.
+    ///
+    /// Error = `((923_077 - 921_600) / 921_600) * 100 = 0.16%`.
     pub fn init(&mut self) {
         // Execution can arrive here while there are still characters queued in the TX FIFO and
         // actively being sent out by the UART hardware. If the UART is turned off in this case,
@@ -205,14 +238,18 @@ impl PL011UartInner {
         // Clear all pending interrupts.
         self.registers.ICR.write(ICR::ALL::CLEAR);
 
-        // Set the baud rate.
-        self.registers.IBRD.write(IBRD::IBRD.val(3));
-        self.registers.FBRD.write(FBRD::FBRD.val(16));
-
-        // Set 8N1 + FIFO on.
+        // From the PL011 Technical Reference Manual:
+        //
+        // The LCR_H, IBRD, and FBRD registers form the single 30-bit wide LCR Register that is
+        // updated on a single write strobe generated by a LCR_H write. So, to internally update the
+        // contents of IBRD or FBRD, a LCR_H write must always be performed at the end.
+        //
+        // Set the baud rate, 8N1 and FIFO enabled.
+        self.registers.IBRD.write(IBRD::BAUD_DIVINT.val(3));
+        self.registers.FBRD.write(FBRD::BAUD_DIVFRAC.val(16));
         self.registers
-            .LCRH
-            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled);
+            .LCR_H
+            .write(LCR_H::WLEN::EightBit + LCR_H::FEN::FifosEnabled);
 
         // Turn the UART on.
         self.registers
@@ -235,25 +272,10 @@ impl PL011UartInner {
 
     /// Block execution until the last buffered character has been physically put on the TX wire.
     fn flush(&self) {
-        // The bit time for 921_600 baud is 1 / 921_600 = 1.09 µs. 8N1 has a total of 10 bits per
-        // symbol (start bit, 8 data bits, stop bit), so one symbol takes round about 10 * 1.09 =
-        // 10.9 µs, or 10_900 ns. Round it up to 12_000 ns to be on the safe side.
-        //
-        // Now make an educated guess for a good delay value. According to Wikipedia, the fastest
-        // RPi4 clocks around 1.5 GHz.
-        //
-        // So lets try to be on the safe side and default to 24_000 cycles, which would equal 12_000
-        // ns would the CPU be clocked at 2 GHz.
-        const CHAR_TIME_SAFE: usize = 24_000;
-
-        // Spin until TX FIFO empty is set.
-        while !self.registers.FR.matches_all(FR::TXFE::SET) {
+        // Spin until the busy bit is cleared.
+        while self.registers.FR.matches_all(FR::BUSY::SET) {
             cpu::nop();
         }
-
-        // After the last character has been queued for transmission, wait for the time of one
-        // character + some extra time for safety.
-        cpu::spin_for_cycles(CHAR_TIME_SAFE);
     }
 
     /// Retrieve a character.
diff --git a/07_uart_chainloader/src/cpu.rs b/07_uart_chainloader/src/cpu.rs
index c543bd988..7de5c29c1 100644
--- a/07_uart_chainloader/src/cpu.rs
+++ b/07_uart_chainloader/src/cpu.rs
@@ -15,4 +15,7 @@ pub mod smp;
 //--------------------------------------------------------------------------------------------------
 // Architectural Public Reexports
 //--------------------------------------------------------------------------------------------------
-pub use arch_cpu::{branch_to_raw_addr, nop, spin_for_cycles, wait_forever};
+pub use arch_cpu::{branch_to_raw_addr, nop, wait_forever};
+
+#[cfg(feature = "bsp_rpi3")]
+pub use arch_cpu::spin_for_cycles;
diff --git a/08_timestamps/README.md b/08_timestamps/README.md
index 432ac091a..83e38ca53 100644
--- a/08_timestamps/README.md
+++ b/08_timestamps/README.md
@@ -5,7 +5,7 @@
 - We add abstractions for timer hardware, and implement them for the ARM architectural timer in
   `_arch/aarch64`.
 - The new timer functions are used to annotate UART prints with timestamps, and to get rid of the
-  cycle-based delays in the `GPIO` and `UART` device drivers, which boosts accuracy.
+  cycle-based delays in the `GPIO` device driver, which boosts accuracy.
 - A `warn!()` macro is added.
 
 ## Test it
@@ -135,11 +135,12 @@ diff -uNr 07_uart_chainloader/src/_arch/aarch64/cpu/boot.rs 08_timestamps/src/_a
 diff -uNr 07_uart_chainloader/src/_arch/aarch64/cpu.rs 08_timestamps/src/_arch/aarch64/cpu.rs
 --- 07_uart_chainloader/src/_arch/aarch64/cpu.rs
 +++ 08_timestamps/src/_arch/aarch64/cpu.rs
-@@ -19,14 +19,6 @@
+@@ -19,15 +19,6 @@
 
  pub use asm::nop;
 
 -/// Spin for `n` cycles.
+-#[cfg(feature = "bsp_rpi3")]
 -#[inline(always)]
 -pub fn spin_for_cycles(n: usize) {
 -    for _ in 0..n {
@@ -150,7 +151,7 @@ diff -uNr 07_uart_chainloader/src/_arch/aarch64/cpu.rs 08_timestamps/src/_arch/a
  /// Pause execution on the core.
  #[inline(always)]
  pub fn wait_forever() -> ! {
-@@ -34,19 +26,3 @@
+@@ -35,19 +26,3 @@
          asm::wfe()
      }
  }
@@ -320,33 +321,7 @@ diff -uNr 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 08_times
 diff -uNr 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 --- 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 +++ 08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
-@@ -235,16 +235,13 @@
-
-     /// Block execution until the last buffered character has been physically put on the TX wire.
-     fn flush(&self) {
-+        use crate::{time, time::interface::TimeManager};
-+        use core::time::Duration;
-+
-         // The bit time for 921_600 baud is 1 / 921_600 = 1.09 µs. 8N1 has a total of 10 bits per
-         // symbol (start bit, 8 data bits, stop bit), so one symbol takes round about 10 * 1.09 =
-         // 10.9 µs, or 10_900 ns. Round it up to 12_000 ns to be on the safe side.
--        //
--        // Now make an educated guess for a good delay value. According to Wikipedia, the fastest
--        // RPi4 clocks around 1.5 GHz.
--        //
--        // So lets try to be on the safe side and default to 24_000 cycles, which would equal 12_000
--        // ns would the CPU be clocked at 2 GHz.
--        const CHAR_TIME_SAFE: usize = 24_000;
-+        const CHAR_TIME_SAFE: Duration = Duration::from_nanos(12_000);
-
-         // Spin until TX FIFO empty is set.
-         while !self.registers.FR.matches_all(FR::TXFE::SET) {
-@@ -253,11 +250,11 @@
-
-         // After the last character has been queued for transmission, wait for the time of one
-         // character + some extra time for safety.
--        cpu::spin_for_cycles(CHAR_TIME_SAFE);
-+        time::time_manager().spin_for(CHAR_TIME_SAFE);
+@@ -279,7 +279,7 @@
      }
 
      /// Retrieve a character.
@@ -355,7 +330,7 @@ diff -uNr 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 08
          // If RX FIFO is empty,
          if self.registers.FR.matches_all(FR::RXFE::SET) {
              // immediately return in non-blocking mode.
-@@ -272,7 +269,12 @@
+@@ -294,7 +294,12 @@
          }
 
          // Read one character.
@@ -369,7 +344,7 @@ diff -uNr 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 08
 
          // Update statistics.
          self.chars_read += 1;
-@@ -352,14 +354,14 @@
+@@ -374,14 +379,14 @@
  impl console::interface::Read for PL011Uart {
      fn read_char(&self) -> char {
          self.inner
@@ -498,11 +473,14 @@ diff -uNr 07_uart_chainloader/src/bsp/raspberrypi/memory.rs 08_timestamps/src/bs
 diff -uNr 07_uart_chainloader/src/cpu.rs 08_timestamps/src/cpu.rs
 --- 07_uart_chainloader/src/cpu.rs
 +++ 08_timestamps/src/cpu.rs
-@@ -15,4 +15,4 @@
+@@ -15,7 +15,4 @@
  //--------------------------------------------------------------------------------------------------
  // Architectural Public Reexports
  //--------------------------------------------------------------------------------------------------
--pub use arch_cpu::{branch_to_raw_addr, nop, spin_for_cycles, wait_forever};
+-pub use arch_cpu::{branch_to_raw_addr, nop, wait_forever};
+-
+-#[cfg(feature = "bsp_rpi3")]
+-pub use arch_cpu::spin_for_cycles;
 +pub use arch_cpu::{nop, wait_forever};
 
 diff -uNr 07_uart_chainloader/src/main.rs 08_timestamps/src/main.rs
diff --git a/08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 876aa461d..ce39752d1 100644
--- a/08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -3,6 +3,11 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
+//!
+//! # Resources
+//!
+//! - https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
+//! - https://developer.arm.com/documentation/ddi0183/latest
 
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, synchronization,
@@ -17,50 +22,63 @@ use register::{mmio::*, register_bitfields, register_structs};
 
 // PL011 UART registers.
 //
-// Descriptions taken from
-// https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
+// Descriptions taken from "PrimeCell UART (PL011) Technical Reference Manual" r1p5.
 register_bitfields! {
     u32,
 
-    /// Flag Register
+    /// Flag Register.
     FR [
         /// Transmit FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-        /// Line Control Register, UARTLCR_ LCRH.
+        /// Line Control Register, LCR_H.
         ///
-        /// If the FIFO is disabled, this bit is set when the transmit holding register is empty. If
-        /// the FIFO is enabled, the TXFE bit is set when the transmit FIFO is empty. This bit does
-        /// not indicate if there is data in the transmit shift register.
+        /// - If the FIFO is disabled, this bit is set when the transmit holding register is empty.
+        /// - If the FIFO is enabled, the TXFE bit is set when the transmit FIFO is empty.
+        /// - This bit does not indicate if there is data in the transmit shift register.
         TXFE OFFSET(7) NUMBITS(1) [],
 
         /// Transmit FIFO full. The meaning of this bit depends on the state of the FEN bit in the
-        /// UARTLCR_ LCRH Register.
+        /// LCR_H Register.
         ///
-        /// If the FIFO is disabled, this bit is set when the transmit holding register is full. If
-        /// the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
+        /// - If the FIFO is disabled, this bit is set when the transmit holding register is full.
+        /// - If the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
         TXFF OFFSET(5) NUMBITS(1) [],
 
         /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-        /// UARTLCR_H Register.
+        /// LCR_H Register.
         ///
         /// If the FIFO is disabled, this bit is set when the receive holding register is empty. If
         /// the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
-        RXFE OFFSET(4) NUMBITS(1) []
+
+        /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
+        /// LCR_H Register.
+        ///
+        /// - If the FIFO is disabled, this bit is set when the receive holding register is empty.
+        /// - If the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
+        RXFE OFFSET(4) NUMBITS(1) [],
+
+        /// UART busy. If this bit is set to 1, the UART is busy transmitting data. This bit remains
+        /// set until the complete byte, including all the stop bits, has been sent from the shift
+        /// register.
+        ///
+        /// This bit is set as soon as the transmit FIFO becomes non-empty, regardless of whether
+        /// the UART is enabled or not.
+        BUSY OFFSET(3) NUMBITS(1) []
     ],
 
-    /// Integer Baud rate divisor
+    /// Integer Baud Rate Divisor.
     IBRD [
-        /// Integer Baud rate divisor
-        IBRD OFFSET(0) NUMBITS(16) []
+        /// The integer baud rate divisor.
+        BAUD_DIVINT OFFSET(0) NUMBITS(16) []
     ],
 
-    /// Fractional Baud rate divisor
+    /// Fractional Baud Rate Divisor.
     FBRD [
-        /// Fractional Baud rate divisor
-        FBRD OFFSET(0) NUMBITS(6) []
+        ///  The fractional baud rate divisor.
+        BAUD_DIVFRAC OFFSET(0) NUMBITS(6) []
     ],
 
-    /// Line Control register
-    LCRH [
+    /// Line Control Register.
+    LCR_H [
         /// Word length. These bits indicate the number of data bits transmitted or received in a
         /// frame.
         WLEN OFFSET(5) NUMBITS(2) [
@@ -73,34 +91,42 @@ register_bitfields! {
         /// Enable FIFOs:
         ///
         /// 0 = FIFOs are disabled (character mode) that is, the FIFOs become 1-byte-deep holding
-        /// registers
+        /// registers.
         ///
-        /// 1 = transmit and receive FIFO buffers are enabled (FIFO mode).
+        /// 1 = Transmit and receive FIFO buffers are enabled (FIFO mode).
         FEN  OFFSET(4) NUMBITS(1) [
             FifosDisabled = 0,
             FifosEnabled = 1
         ]
     ],
 
-    /// Control Register
+    /// Control Register.
     CR [
         /// Receive enable. If this bit is set to 1, the receive section of the UART is enabled.
-        /// Data reception occurs for UART signals. When the UART is disabled in the middle of
-        /// reception, it completes the current character before stopping.
-        RXE    OFFSET(9) NUMBITS(1) [
+        /// Data reception occurs for either UART signals or SIR signals depending on the setting of
+        /// the SIREN bit. When the UART is disabled in the middle of reception, it completes the
+        /// current character before stopping.
+        RXE OFFSET(9) NUMBITS(1) [
             Disabled = 0,
             Enabled = 1
         ],
 
         /// Transmit enable. If this bit is set to 1, the transmit section of the UART is enabled.
-        /// Data transmission occurs for UART signals. When the UART is disabled in the middle of
-        /// transmission, it completes the current character before stopping.
-        TXE    OFFSET(8) NUMBITS(1) [
+        /// Data transmission occurs for either UART signals, or SIR signals depending on the
+        /// setting of the SIREN bit. When the UART is disabled in the middle of transmission, it
+        /// completes the current character before stopping.
+        TXE OFFSET(8) NUMBITS(1) [
             Disabled = 0,
             Enabled = 1
         ],
 
-        /// UART enable
+        /// UART enable:
+        ///
+        /// 0 = UART is disabled. If the UART is disabled in the middle of transmission or
+        /// reception, it completes the current character before stopping.
+        ///
+        /// 1 = The UART is enabled. Data transmission and reception occurs for either UART signals
+        /// or SIR signals depending on the setting of the SIREN bit
         UARTEN OFFSET(0) NUMBITS(1) [
             /// If the UART is disabled in the middle of transmission or reception, it completes the
             /// current character before stopping.
@@ -109,9 +135,9 @@ register_bitfields! {
         ]
     ],
 
-    /// Interrupt Clear Register
+    /// Interrupt Clear Register.
     ICR [
-        /// Meta field for all pending interrupts
+        /// Meta field for all pending interrupts.
         ALL OFFSET(0) NUMBITS(11) []
     ]
 }
@@ -125,7 +151,7 @@ register_structs! {
         (0x1c => _reserved2),
         (0x24 => IBRD: WriteOnly<u32, IBRD::Register>),
         (0x28 => FBRD: WriteOnly<u32, FBRD::Register>),
-        (0x2c => LCRH: WriteOnly<u32, LCRH::Register>),
+        (0x2c => LCR_H: WriteOnly<u32, LCR_H::Register>),
         (0x30 => CR: WriteOnly<u32, CR::Register>),
         (0x34 => _reserved3),
         (0x44 => ICR: WriteOnly<u32, ICR::Register>),
@@ -183,11 +209,18 @@ impl PL011UartInner {
     /// This results in 8N1 and 921_600 baud.
     ///
     /// The calculation for the BRD is (we set the clock to 48 MHz in config.txt):
-    /// `(48_000_000 / 16) / 921_600 = 3.2552083`. `3` goes to the `IBRD` (integer field).
+    /// `(48_000_000 / 16) / 921_600 = 3.2552083`.
+    ///
+    /// This means the integer part is `3` and goes into the `IBRD`.
+    /// The fractional part is `0.2552083`.
     ///
-    /// The `FBRD` (fractional field) is only 6 bits so `0.2552083 * 64 = 16.3 rounded to 16` will
-    /// give the best approximation we can get. A 5% error margin is acceptable for UART and we're
-    /// now at 0.02%.
+    /// `FBRD` calculation according to the PL011 Technical Reference Manual:
+    /// `INTEGER((0.2552083 * 64) + 0.5) = 16`.
+    ///
+    /// Therefore, the generated baud rate divider is: `3 + 16/64 = 3.25`. Which results in a
+    /// genrated baud rate of `48_000_000 / (16 * 3.25) = 923_077`.
+    ///
+    /// Error = `((923_077 - 921_600) / 921_600) * 100 = 0.16%`.
     pub fn init(&mut self) {
         // Execution can arrive here while there are still characters queued in the TX FIFO and
         // actively being sent out by the UART hardware. If the UART is turned off in this case,
@@ -205,14 +238,18 @@ impl PL011UartInner {
         // Clear all pending interrupts.
         self.registers.ICR.write(ICR::ALL::CLEAR);
 
-        // Set the baud rate.
-        self.registers.IBRD.write(IBRD::IBRD.val(3));
-        self.registers.FBRD.write(FBRD::FBRD.val(16));
-
-        // Set 8N1 + FIFO on.
+        // From the PL011 Technical Reference Manual:
+        //
+        // The LCR_H, IBRD, and FBRD registers form the single 30-bit wide LCR Register that is
+        // updated on a single write strobe generated by a LCR_H write. So, to internally update the
+        // contents of IBRD or FBRD, a LCR_H write must always be performed at the end.
+        //
+        // Set the baud rate, 8N1 and FIFO enabled.
+        self.registers.IBRD.write(IBRD::BAUD_DIVINT.val(3));
+        self.registers.FBRD.write(FBRD::BAUD_DIVFRAC.val(16));
         self.registers
-            .LCRH
-            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled);
+            .LCR_H
+            .write(LCR_H::WLEN::EightBit + LCR_H::FEN::FifosEnabled);
 
         // Turn the UART on.
         self.registers
@@ -235,22 +272,10 @@ impl PL011UartInner {
 
     /// Block execution until the last buffered character has been physically put on the TX wire.
     fn flush(&self) {
-        use crate::{time, time::interface::TimeManager};
-        use core::time::Duration;
-
-        // The bit time for 921_600 baud is 1 / 921_600 = 1.09 µs. 8N1 has a total of 10 bits per
-        // symbol (start bit, 8 data bits, stop bit), so one symbol takes round about 10 * 1.09 =
-        // 10.9 µs, or 10_900 ns. Round it up to 12_000 ns to be on the safe side.
-        const CHAR_TIME_SAFE: Duration = Duration::from_nanos(12_000);
-
-        // Spin until TX FIFO empty is set.
-        while !self.registers.FR.matches_all(FR::TXFE::SET) {
+        // Spin until the busy bit is cleared.
+        while self.registers.FR.matches_all(FR::BUSY::SET) {
             cpu::nop();
         }
-
-        // After the last character has been queued for transmission, wait for the time of one
-        // character + some extra time for safety.
-        time::time_manager().spin_for(CHAR_TIME_SAFE);
     }
 
     /// Retrieve a character.
diff --git a/09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 876aa461d..ce39752d1 100644
--- a/09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -3,6 +3,11 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
+//!
+//! # Resources
+//!
+//! - https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
+//! - https://developer.arm.com/documentation/ddi0183/latest
 
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, synchronization,
@@ -17,50 +22,63 @@ use register::{mmio::*, register_bitfields, register_structs};
 
 // PL011 UART registers.
 //
-// Descriptions taken from
-// https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
+// Descriptions taken from "PrimeCell UART (PL011) Technical Reference Manual" r1p5.
 register_bitfields! {
     u32,
 
-    /// Flag Register
+    /// Flag Register.
     FR [
         /// Transmit FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-        /// Line Control Register, UARTLCR_ LCRH.
+        /// Line Control Register, LCR_H.
         ///
-        /// If the FIFO is disabled, this bit is set when the transmit holding register is empty. If
-        /// the FIFO is enabled, the TXFE bit is set when the transmit FIFO is empty. This bit does
-        /// not indicate if there is data in the transmit shift register.
+        /// - If the FIFO is disabled, this bit is set when the transmit holding register is empty.
+        /// - If the FIFO is enabled, the TXFE bit is set when the transmit FIFO is empty.
+        /// - This bit does not indicate if there is data in the transmit shift register.
         TXFE OFFSET(7) NUMBITS(1) [],
 
         /// Transmit FIFO full. The meaning of this bit depends on the state of the FEN bit in the
-        /// UARTLCR_ LCRH Register.
+        /// LCR_H Register.
         ///
-        /// If the FIFO is disabled, this bit is set when the transmit holding register is full. If
-        /// the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
+        /// - If the FIFO is disabled, this bit is set when the transmit holding register is full.
+        /// - If the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
         TXFF OFFSET(5) NUMBITS(1) [],
 
         /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-        /// UARTLCR_H Register.
+        /// LCR_H Register.
         ///
         /// If the FIFO is disabled, this bit is set when the receive holding register is empty. If
         /// the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
-        RXFE OFFSET(4) NUMBITS(1) []
+
+        /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
+        /// LCR_H Register.
+        ///
+        /// - If the FIFO is disabled, this bit is set when the receive holding register is empty.
+        /// - If the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
+        RXFE OFFSET(4) NUMBITS(1) [],
+
+        /// UART busy. If this bit is set to 1, the UART is busy transmitting data. This bit remains
+        /// set until the complete byte, including all the stop bits, has been sent from the shift
+        /// register.
+        ///
+        /// This bit is set as soon as the transmit FIFO becomes non-empty, regardless of whether
+        /// the UART is enabled or not.
+        BUSY OFFSET(3) NUMBITS(1) []
     ],
 
-    /// Integer Baud rate divisor
+    /// Integer Baud Rate Divisor.
     IBRD [
-        /// Integer Baud rate divisor
-        IBRD OFFSET(0) NUMBITS(16) []
+        /// The integer baud rate divisor.
+        BAUD_DIVINT OFFSET(0) NUMBITS(16) []
     ],
 
-    /// Fractional Baud rate divisor
+    /// Fractional Baud Rate Divisor.
     FBRD [
-        /// Fractional Baud rate divisor
-        FBRD OFFSET(0) NUMBITS(6) []
+        ///  The fractional baud rate divisor.
+        BAUD_DIVFRAC OFFSET(0) NUMBITS(6) []
     ],
 
-    /// Line Control register
-    LCRH [
+    /// Line Control Register.
+    LCR_H [
         /// Word length. These bits indicate the number of data bits transmitted or received in a
         /// frame.
         WLEN OFFSET(5) NUMBITS(2) [
@@ -73,34 +91,42 @@ register_bitfields! {
         /// Enable FIFOs:
         ///
         /// 0 = FIFOs are disabled (character mode) that is, the FIFOs become 1-byte-deep holding
-        /// registers
+        /// registers.
         ///
-        /// 1 = transmit and receive FIFO buffers are enabled (FIFO mode).
+        /// 1 = Transmit and receive FIFO buffers are enabled (FIFO mode).
         FEN  OFFSET(4) NUMBITS(1) [
             FifosDisabled = 0,
             FifosEnabled = 1
         ]
     ],
 
-    /// Control Register
+    /// Control Register.
     CR [
         /// Receive enable. If this bit is set to 1, the receive section of the UART is enabled.
-        /// Data reception occurs for UART signals. When the UART is disabled in the middle of
-        /// reception, it completes the current character before stopping.
-        RXE    OFFSET(9) NUMBITS(1) [
+        /// Data reception occurs for either UART signals or SIR signals depending on the setting of
+        /// the SIREN bit. When the UART is disabled in the middle of reception, it completes the
+        /// current character before stopping.
+        RXE OFFSET(9) NUMBITS(1) [
             Disabled = 0,
             Enabled = 1
         ],
 
         /// Transmit enable. If this bit is set to 1, the transmit section of the UART is enabled.
-        /// Data transmission occurs for UART signals. When the UART is disabled in the middle of
-        /// transmission, it completes the current character before stopping.
-        TXE    OFFSET(8) NUMBITS(1) [
+        /// Data transmission occurs for either UART signals, or SIR signals depending on the
+        /// setting of the SIREN bit. When the UART is disabled in the middle of transmission, it
+        /// completes the current character before stopping.
+        TXE OFFSET(8) NUMBITS(1) [
             Disabled = 0,
             Enabled = 1
         ],
 
-        /// UART enable
+        /// UART enable:
+        ///
+        /// 0 = UART is disabled. If the UART is disabled in the middle of transmission or
+        /// reception, it completes the current character before stopping.
+        ///
+        /// 1 = The UART is enabled. Data transmission and reception occurs for either UART signals
+        /// or SIR signals depending on the setting of the SIREN bit
         UARTEN OFFSET(0) NUMBITS(1) [
             /// If the UART is disabled in the middle of transmission or reception, it completes the
             /// current character before stopping.
@@ -109,9 +135,9 @@ register_bitfields! {
         ]
     ],
 
-    /// Interrupt Clear Register
+    /// Interrupt Clear Register.
     ICR [
-        /// Meta field for all pending interrupts
+        /// Meta field for all pending interrupts.
         ALL OFFSET(0) NUMBITS(11) []
     ]
 }
@@ -125,7 +151,7 @@ register_structs! {
         (0x1c => _reserved2),
         (0x24 => IBRD: WriteOnly<u32, IBRD::Register>),
         (0x28 => FBRD: WriteOnly<u32, FBRD::Register>),
-        (0x2c => LCRH: WriteOnly<u32, LCRH::Register>),
+        (0x2c => LCR_H: WriteOnly<u32, LCR_H::Register>),
         (0x30 => CR: WriteOnly<u32, CR::Register>),
         (0x34 => _reserved3),
         (0x44 => ICR: WriteOnly<u32, ICR::Register>),
@@ -183,11 +209,18 @@ impl PL011UartInner {
     /// This results in 8N1 and 921_600 baud.
     ///
     /// The calculation for the BRD is (we set the clock to 48 MHz in config.txt):
-    /// `(48_000_000 / 16) / 921_600 = 3.2552083`. `3` goes to the `IBRD` (integer field).
+    /// `(48_000_000 / 16) / 921_600 = 3.2552083`.
+    ///
+    /// This means the integer part is `3` and goes into the `IBRD`.
+    /// The fractional part is `0.2552083`.
     ///
-    /// The `FBRD` (fractional field) is only 6 bits so `0.2552083 * 64 = 16.3 rounded to 16` will
-    /// give the best approximation we can get. A 5% error margin is acceptable for UART and we're
-    /// now at 0.02%.
+    /// `FBRD` calculation according to the PL011 Technical Reference Manual:
+    /// `INTEGER((0.2552083 * 64) + 0.5) = 16`.
+    ///
+    /// Therefore, the generated baud rate divider is: `3 + 16/64 = 3.25`. Which results in a
+    /// genrated baud rate of `48_000_000 / (16 * 3.25) = 923_077`.
+    ///
+    /// Error = `((923_077 - 921_600) / 921_600) * 100 = 0.16%`.
     pub fn init(&mut self) {
         // Execution can arrive here while there are still characters queued in the TX FIFO and
         // actively being sent out by the UART hardware. If the UART is turned off in this case,
@@ -205,14 +238,18 @@ impl PL011UartInner {
         // Clear all pending interrupts.
         self.registers.ICR.write(ICR::ALL::CLEAR);
 
-        // Set the baud rate.
-        self.registers.IBRD.write(IBRD::IBRD.val(3));
-        self.registers.FBRD.write(FBRD::FBRD.val(16));
-
-        // Set 8N1 + FIFO on.
+        // From the PL011 Technical Reference Manual:
+        //
+        // The LCR_H, IBRD, and FBRD registers form the single 30-bit wide LCR Register that is
+        // updated on a single write strobe generated by a LCR_H write. So, to internally update the
+        // contents of IBRD or FBRD, a LCR_H write must always be performed at the end.
+        //
+        // Set the baud rate, 8N1 and FIFO enabled.
+        self.registers.IBRD.write(IBRD::BAUD_DIVINT.val(3));
+        self.registers.FBRD.write(FBRD::BAUD_DIVFRAC.val(16));
         self.registers
-            .LCRH
-            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled);
+            .LCR_H
+            .write(LCR_H::WLEN::EightBit + LCR_H::FEN::FifosEnabled);
 
         // Turn the UART on.
         self.registers
@@ -235,22 +272,10 @@ impl PL011UartInner {
 
     /// Block execution until the last buffered character has been physically put on the TX wire.
     fn flush(&self) {
-        use crate::{time, time::interface::TimeManager};
-        use core::time::Duration;
-
-        // The bit time for 921_600 baud is 1 / 921_600 = 1.09 µs. 8N1 has a total of 10 bits per
-        // symbol (start bit, 8 data bits, stop bit), so one symbol takes round about 10 * 1.09 =
-        // 10.9 µs, or 10_900 ns. Round it up to 12_000 ns to be on the safe side.
-        const CHAR_TIME_SAFE: Duration = Duration::from_nanos(12_000);
-
-        // Spin until TX FIFO empty is set.
-        while !self.registers.FR.matches_all(FR::TXFE::SET) {
+        // Spin until the busy bit is cleared.
+        while self.registers.FR.matches_all(FR::BUSY::SET) {
             cpu::nop();
         }
-
-        // After the last character has been queued for transmission, wait for the time of one
-        // character + some extra time for safety.
-        time::time_manager().spin_for(CHAR_TIME_SAFE);
     }
 
     /// Retrieve a character.
diff --git a/10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 876aa461d..ce39752d1 100644
--- a/10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -3,6 +3,11 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
+//!
+//! # Resources
+//!
+//! - https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
+//! - https://developer.arm.com/documentation/ddi0183/latest
 
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, synchronization,
@@ -17,50 +22,63 @@ use register::{mmio::*, register_bitfields, register_structs};
 
 // PL011 UART registers.
 //
-// Descriptions taken from
-// https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
+// Descriptions taken from "PrimeCell UART (PL011) Technical Reference Manual" r1p5.
 register_bitfields! {
     u32,
 
-    /// Flag Register
+    /// Flag Register.
     FR [
         /// Transmit FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-        /// Line Control Register, UARTLCR_ LCRH.
+        /// Line Control Register, LCR_H.
         ///
-        /// If the FIFO is disabled, this bit is set when the transmit holding register is empty. If
-        /// the FIFO is enabled, the TXFE bit is set when the transmit FIFO is empty. This bit does
-        /// not indicate if there is data in the transmit shift register.
+        /// - If the FIFO is disabled, this bit is set when the transmit holding register is empty.
+        /// - If the FIFO is enabled, the TXFE bit is set when the transmit FIFO is empty.
+        /// - This bit does not indicate if there is data in the transmit shift register.
         TXFE OFFSET(7) NUMBITS(1) [],
 
         /// Transmit FIFO full. The meaning of this bit depends on the state of the FEN bit in the
-        /// UARTLCR_ LCRH Register.
+        /// LCR_H Register.
         ///
-        /// If the FIFO is disabled, this bit is set when the transmit holding register is full. If
-        /// the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
+        /// - If the FIFO is disabled, this bit is set when the transmit holding register is full.
+        /// - If the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
         TXFF OFFSET(5) NUMBITS(1) [],
 
         /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-        /// UARTLCR_H Register.
+        /// LCR_H Register.
         ///
         /// If the FIFO is disabled, this bit is set when the receive holding register is empty. If
         /// the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
-        RXFE OFFSET(4) NUMBITS(1) []
+
+        /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
+        /// LCR_H Register.
+        ///
+        /// - If the FIFO is disabled, this bit is set when the receive holding register is empty.
+        /// - If the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
+        RXFE OFFSET(4) NUMBITS(1) [],
+
+        /// UART busy. If this bit is set to 1, the UART is busy transmitting data. This bit remains
+        /// set until the complete byte, including all the stop bits, has been sent from the shift
+        /// register.
+        ///
+        /// This bit is set as soon as the transmit FIFO becomes non-empty, regardless of whether
+        /// the UART is enabled or not.
+        BUSY OFFSET(3) NUMBITS(1) []
     ],
 
-    /// Integer Baud rate divisor
+    /// Integer Baud Rate Divisor.
     IBRD [
-        /// Integer Baud rate divisor
-        IBRD OFFSET(0) NUMBITS(16) []
+        /// The integer baud rate divisor.
+        BAUD_DIVINT OFFSET(0) NUMBITS(16) []
     ],
 
-    /// Fractional Baud rate divisor
+    /// Fractional Baud Rate Divisor.
     FBRD [
-        /// Fractional Baud rate divisor
-        FBRD OFFSET(0) NUMBITS(6) []
+        ///  The fractional baud rate divisor.
+        BAUD_DIVFRAC OFFSET(0) NUMBITS(6) []
     ],
 
-    /// Line Control register
-    LCRH [
+    /// Line Control Register.
+    LCR_H [
         /// Word length. These bits indicate the number of data bits transmitted or received in a
         /// frame.
         WLEN OFFSET(5) NUMBITS(2) [
@@ -73,34 +91,42 @@ register_bitfields! {
         /// Enable FIFOs:
         ///
         /// 0 = FIFOs are disabled (character mode) that is, the FIFOs become 1-byte-deep holding
-        /// registers
+        /// registers.
         ///
-        /// 1 = transmit and receive FIFO buffers are enabled (FIFO mode).
+        /// 1 = Transmit and receive FIFO buffers are enabled (FIFO mode).
         FEN  OFFSET(4) NUMBITS(1) [
             FifosDisabled = 0,
             FifosEnabled = 1
         ]
     ],
 
-    /// Control Register
+    /// Control Register.
     CR [
         /// Receive enable. If this bit is set to 1, the receive section of the UART is enabled.
-        /// Data reception occurs for UART signals. When the UART is disabled in the middle of
-        /// reception, it completes the current character before stopping.
-        RXE    OFFSET(9) NUMBITS(1) [
+        /// Data reception occurs for either UART signals or SIR signals depending on the setting of
+        /// the SIREN bit. When the UART is disabled in the middle of reception, it completes the
+        /// current character before stopping.
+        RXE OFFSET(9) NUMBITS(1) [
             Disabled = 0,
             Enabled = 1
         ],
 
         /// Transmit enable. If this bit is set to 1, the transmit section of the UART is enabled.
-        /// Data transmission occurs for UART signals. When the UART is disabled in the middle of
-        /// transmission, it completes the current character before stopping.
-        TXE    OFFSET(8) NUMBITS(1) [
+        /// Data transmission occurs for either UART signals, or SIR signals depending on the
+        /// setting of the SIREN bit. When the UART is disabled in the middle of transmission, it
+        /// completes the current character before stopping.
+        TXE OFFSET(8) NUMBITS(1) [
             Disabled = 0,
             Enabled = 1
         ],
 
-        /// UART enable
+        /// UART enable:
+        ///
+        /// 0 = UART is disabled. If the UART is disabled in the middle of transmission or
+        /// reception, it completes the current character before stopping.
+        ///
+        /// 1 = The UART is enabled. Data transmission and reception occurs for either UART signals
+        /// or SIR signals depending on the setting of the SIREN bit
         UARTEN OFFSET(0) NUMBITS(1) [
             /// If the UART is disabled in the middle of transmission or reception, it completes the
             /// current character before stopping.
@@ -109,9 +135,9 @@ register_bitfields! {
         ]
     ],
 
-    /// Interrupt Clear Register
+    /// Interrupt Clear Register.
     ICR [
-        /// Meta field for all pending interrupts
+        /// Meta field for all pending interrupts.
         ALL OFFSET(0) NUMBITS(11) []
     ]
 }
@@ -125,7 +151,7 @@ register_structs! {
         (0x1c => _reserved2),
         (0x24 => IBRD: WriteOnly<u32, IBRD::Register>),
         (0x28 => FBRD: WriteOnly<u32, FBRD::Register>),
-        (0x2c => LCRH: WriteOnly<u32, LCRH::Register>),
+        (0x2c => LCR_H: WriteOnly<u32, LCR_H::Register>),
         (0x30 => CR: WriteOnly<u32, CR::Register>),
         (0x34 => _reserved3),
         (0x44 => ICR: WriteOnly<u32, ICR::Register>),
@@ -183,11 +209,18 @@ impl PL011UartInner {
     /// This results in 8N1 and 921_600 baud.
     ///
     /// The calculation for the BRD is (we set the clock to 48 MHz in config.txt):
-    /// `(48_000_000 / 16) / 921_600 = 3.2552083`. `3` goes to the `IBRD` (integer field).
+    /// `(48_000_000 / 16) / 921_600 = 3.2552083`.
+    ///
+    /// This means the integer part is `3` and goes into the `IBRD`.
+    /// The fractional part is `0.2552083`.
     ///
-    /// The `FBRD` (fractional field) is only 6 bits so `0.2552083 * 64 = 16.3 rounded to 16` will
-    /// give the best approximation we can get. A 5% error margin is acceptable for UART and we're
-    /// now at 0.02%.
+    /// `FBRD` calculation according to the PL011 Technical Reference Manual:
+    /// `INTEGER((0.2552083 * 64) + 0.5) = 16`.
+    ///
+    /// Therefore, the generated baud rate divider is: `3 + 16/64 = 3.25`. Which results in a
+    /// genrated baud rate of `48_000_000 / (16 * 3.25) = 923_077`.
+    ///
+    /// Error = `((923_077 - 921_600) / 921_600) * 100 = 0.16%`.
     pub fn init(&mut self) {
         // Execution can arrive here while there are still characters queued in the TX FIFO and
         // actively being sent out by the UART hardware. If the UART is turned off in this case,
@@ -205,14 +238,18 @@ impl PL011UartInner {
         // Clear all pending interrupts.
         self.registers.ICR.write(ICR::ALL::CLEAR);
 
-        // Set the baud rate.
-        self.registers.IBRD.write(IBRD::IBRD.val(3));
-        self.registers.FBRD.write(FBRD::FBRD.val(16));
-
-        // Set 8N1 + FIFO on.
+        // From the PL011 Technical Reference Manual:
+        //
+        // The LCR_H, IBRD, and FBRD registers form the single 30-bit wide LCR Register that is
+        // updated on a single write strobe generated by a LCR_H write. So, to internally update the
+        // contents of IBRD or FBRD, a LCR_H write must always be performed at the end.
+        //
+        // Set the baud rate, 8N1 and FIFO enabled.
+        self.registers.IBRD.write(IBRD::BAUD_DIVINT.val(3));
+        self.registers.FBRD.write(FBRD::BAUD_DIVFRAC.val(16));
         self.registers
-            .LCRH
-            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled);
+            .LCR_H
+            .write(LCR_H::WLEN::EightBit + LCR_H::FEN::FifosEnabled);
 
         // Turn the UART on.
         self.registers
@@ -235,22 +272,10 @@ impl PL011UartInner {
 
     /// Block execution until the last buffered character has been physically put on the TX wire.
     fn flush(&self) {
-        use crate::{time, time::interface::TimeManager};
-        use core::time::Duration;
-
-        // The bit time for 921_600 baud is 1 / 921_600 = 1.09 µs. 8N1 has a total of 10 bits per
-        // symbol (start bit, 8 data bits, stop bit), so one symbol takes round about 10 * 1.09 =
-        // 10.9 µs, or 10_900 ns. Round it up to 12_000 ns to be on the safe side.
-        const CHAR_TIME_SAFE: Duration = Duration::from_nanos(12_000);
-
-        // Spin until TX FIFO empty is set.
-        while !self.registers.FR.matches_all(FR::TXFE::SET) {
+        // Spin until the busy bit is cleared.
+        while self.registers.FR.matches_all(FR::BUSY::SET) {
             cpu::nop();
         }
-
-        // After the last character has been queued for transmission, wait for the time of one
-        // character + some extra time for safety.
-        time::time_manager().spin_for(CHAR_TIME_SAFE);
     }
 
     /// Retrieve a character.
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 876aa461d..ce39752d1 100644
--- a/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -3,6 +3,11 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
+//!
+//! # Resources
+//!
+//! - https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
+//! - https://developer.arm.com/documentation/ddi0183/latest
 
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, synchronization,
@@ -17,50 +22,63 @@ use register::{mmio::*, register_bitfields, register_structs};
 
 // PL011 UART registers.
 //
-// Descriptions taken from
-// https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
+// Descriptions taken from "PrimeCell UART (PL011) Technical Reference Manual" r1p5.
 register_bitfields! {
     u32,
 
-    /// Flag Register
+    /// Flag Register.
     FR [
         /// Transmit FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-        /// Line Control Register, UARTLCR_ LCRH.
+        /// Line Control Register, LCR_H.
         ///
-        /// If the FIFO is disabled, this bit is set when the transmit holding register is empty. If
-        /// the FIFO is enabled, the TXFE bit is set when the transmit FIFO is empty. This bit does
-        /// not indicate if there is data in the transmit shift register.
+        /// - If the FIFO is disabled, this bit is set when the transmit holding register is empty.
+        /// - If the FIFO is enabled, the TXFE bit is set when the transmit FIFO is empty.
+        /// - This bit does not indicate if there is data in the transmit shift register.
         TXFE OFFSET(7) NUMBITS(1) [],
 
         /// Transmit FIFO full. The meaning of this bit depends on the state of the FEN bit in the
-        /// UARTLCR_ LCRH Register.
+        /// LCR_H Register.
         ///
-        /// If the FIFO is disabled, this bit is set when the transmit holding register is full. If
-        /// the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
+        /// - If the FIFO is disabled, this bit is set when the transmit holding register is full.
+        /// - If the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
         TXFF OFFSET(5) NUMBITS(1) [],
 
         /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-        /// UARTLCR_H Register.
+        /// LCR_H Register.
         ///
         /// If the FIFO is disabled, this bit is set when the receive holding register is empty. If
         /// the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
-        RXFE OFFSET(4) NUMBITS(1) []
+
+        /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
+        /// LCR_H Register.
+        ///
+        /// - If the FIFO is disabled, this bit is set when the receive holding register is empty.
+        /// - If the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
+        RXFE OFFSET(4) NUMBITS(1) [],
+
+        /// UART busy. If this bit is set to 1, the UART is busy transmitting data. This bit remains
+        /// set until the complete byte, including all the stop bits, has been sent from the shift
+        /// register.
+        ///
+        /// This bit is set as soon as the transmit FIFO becomes non-empty, regardless of whether
+        /// the UART is enabled or not.
+        BUSY OFFSET(3) NUMBITS(1) []
     ],
 
-    /// Integer Baud rate divisor
+    /// Integer Baud Rate Divisor.
     IBRD [
-        /// Integer Baud rate divisor
-        IBRD OFFSET(0) NUMBITS(16) []
+        /// The integer baud rate divisor.
+        BAUD_DIVINT OFFSET(0) NUMBITS(16) []
     ],
 
-    /// Fractional Baud rate divisor
+    /// Fractional Baud Rate Divisor.
     FBRD [
-        /// Fractional Baud rate divisor
-        FBRD OFFSET(0) NUMBITS(6) []
+        ///  The fractional baud rate divisor.
+        BAUD_DIVFRAC OFFSET(0) NUMBITS(6) []
     ],
 
-    /// Line Control register
-    LCRH [
+    /// Line Control Register.
+    LCR_H [
         /// Word length. These bits indicate the number of data bits transmitted or received in a
         /// frame.
         WLEN OFFSET(5) NUMBITS(2) [
@@ -73,34 +91,42 @@ register_bitfields! {
         /// Enable FIFOs:
         ///
         /// 0 = FIFOs are disabled (character mode) that is, the FIFOs become 1-byte-deep holding
-        /// registers
+        /// registers.
         ///
-        /// 1 = transmit and receive FIFO buffers are enabled (FIFO mode).
+        /// 1 = Transmit and receive FIFO buffers are enabled (FIFO mode).
         FEN  OFFSET(4) NUMBITS(1) [
             FifosDisabled = 0,
             FifosEnabled = 1
         ]
     ],
 
-    /// Control Register
+    /// Control Register.
     CR [
         /// Receive enable. If this bit is set to 1, the receive section of the UART is enabled.
-        /// Data reception occurs for UART signals. When the UART is disabled in the middle of
-        /// reception, it completes the current character before stopping.
-        RXE    OFFSET(9) NUMBITS(1) [
+        /// Data reception occurs for either UART signals or SIR signals depending on the setting of
+        /// the SIREN bit. When the UART is disabled in the middle of reception, it completes the
+        /// current character before stopping.
+        RXE OFFSET(9) NUMBITS(1) [
             Disabled = 0,
             Enabled = 1
         ],
 
         /// Transmit enable. If this bit is set to 1, the transmit section of the UART is enabled.
-        /// Data transmission occurs for UART signals. When the UART is disabled in the middle of
-        /// transmission, it completes the current character before stopping.
-        TXE    OFFSET(8) NUMBITS(1) [
+        /// Data transmission occurs for either UART signals, or SIR signals depending on the
+        /// setting of the SIREN bit. When the UART is disabled in the middle of transmission, it
+        /// completes the current character before stopping.
+        TXE OFFSET(8) NUMBITS(1) [
             Disabled = 0,
             Enabled = 1
         ],
 
-        /// UART enable
+        /// UART enable:
+        ///
+        /// 0 = UART is disabled. If the UART is disabled in the middle of transmission or
+        /// reception, it completes the current character before stopping.
+        ///
+        /// 1 = The UART is enabled. Data transmission and reception occurs for either UART signals
+        /// or SIR signals depending on the setting of the SIREN bit
         UARTEN OFFSET(0) NUMBITS(1) [
             /// If the UART is disabled in the middle of transmission or reception, it completes the
             /// current character before stopping.
@@ -109,9 +135,9 @@ register_bitfields! {
         ]
     ],
 
-    /// Interrupt Clear Register
+    /// Interrupt Clear Register.
     ICR [
-        /// Meta field for all pending interrupts
+        /// Meta field for all pending interrupts.
         ALL OFFSET(0) NUMBITS(11) []
     ]
 }
@@ -125,7 +151,7 @@ register_structs! {
         (0x1c => _reserved2),
         (0x24 => IBRD: WriteOnly<u32, IBRD::Register>),
         (0x28 => FBRD: WriteOnly<u32, FBRD::Register>),
-        (0x2c => LCRH: WriteOnly<u32, LCRH::Register>),
+        (0x2c => LCR_H: WriteOnly<u32, LCR_H::Register>),
         (0x30 => CR: WriteOnly<u32, CR::Register>),
         (0x34 => _reserved3),
         (0x44 => ICR: WriteOnly<u32, ICR::Register>),
@@ -183,11 +209,18 @@ impl PL011UartInner {
     /// This results in 8N1 and 921_600 baud.
     ///
     /// The calculation for the BRD is (we set the clock to 48 MHz in config.txt):
-    /// `(48_000_000 / 16) / 921_600 = 3.2552083`. `3` goes to the `IBRD` (integer field).
+    /// `(48_000_000 / 16) / 921_600 = 3.2552083`.
+    ///
+    /// This means the integer part is `3` and goes into the `IBRD`.
+    /// The fractional part is `0.2552083`.
     ///
-    /// The `FBRD` (fractional field) is only 6 bits so `0.2552083 * 64 = 16.3 rounded to 16` will
-    /// give the best approximation we can get. A 5% error margin is acceptable for UART and we're
-    /// now at 0.02%.
+    /// `FBRD` calculation according to the PL011 Technical Reference Manual:
+    /// `INTEGER((0.2552083 * 64) + 0.5) = 16`.
+    ///
+    /// Therefore, the generated baud rate divider is: `3 + 16/64 = 3.25`. Which results in a
+    /// genrated baud rate of `48_000_000 / (16 * 3.25) = 923_077`.
+    ///
+    /// Error = `((923_077 - 921_600) / 921_600) * 100 = 0.16%`.
     pub fn init(&mut self) {
         // Execution can arrive here while there are still characters queued in the TX FIFO and
         // actively being sent out by the UART hardware. If the UART is turned off in this case,
@@ -205,14 +238,18 @@ impl PL011UartInner {
         // Clear all pending interrupts.
         self.registers.ICR.write(ICR::ALL::CLEAR);
 
-        // Set the baud rate.
-        self.registers.IBRD.write(IBRD::IBRD.val(3));
-        self.registers.FBRD.write(FBRD::FBRD.val(16));
-
-        // Set 8N1 + FIFO on.
+        // From the PL011 Technical Reference Manual:
+        //
+        // The LCR_H, IBRD, and FBRD registers form the single 30-bit wide LCR Register that is
+        // updated on a single write strobe generated by a LCR_H write. So, to internally update the
+        // contents of IBRD or FBRD, a LCR_H write must always be performed at the end.
+        //
+        // Set the baud rate, 8N1 and FIFO enabled.
+        self.registers.IBRD.write(IBRD::BAUD_DIVINT.val(3));
+        self.registers.FBRD.write(FBRD::BAUD_DIVFRAC.val(16));
         self.registers
-            .LCRH
-            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled);
+            .LCR_H
+            .write(LCR_H::WLEN::EightBit + LCR_H::FEN::FifosEnabled);
 
         // Turn the UART on.
         self.registers
@@ -235,22 +272,10 @@ impl PL011UartInner {
 
     /// Block execution until the last buffered character has been physically put on the TX wire.
     fn flush(&self) {
-        use crate::{time, time::interface::TimeManager};
-        use core::time::Duration;
-
-        // The bit time for 921_600 baud is 1 / 921_600 = 1.09 µs. 8N1 has a total of 10 bits per
-        // symbol (start bit, 8 data bits, stop bit), so one symbol takes round about 10 * 1.09 =
-        // 10.9 µs, or 10_900 ns. Round it up to 12_000 ns to be on the safe side.
-        const CHAR_TIME_SAFE: Duration = Duration::from_nanos(12_000);
-
-        // Spin until TX FIFO empty is set.
-        while !self.registers.FR.matches_all(FR::TXFE::SET) {
+        // Spin until the busy bit is cleared.
+        while self.registers.FR.matches_all(FR::BUSY::SET) {
             cpu::nop();
         }
-
-        // After the last character has been queued for transmission, wait for the time of one
-        // character + some extra time for safety.
-        time::time_manager().spin_for(CHAR_TIME_SAFE);
     }
 
     /// Retrieve a character.
diff --git a/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 876aa461d..ce39752d1 100644
--- a/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -3,6 +3,11 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
+//!
+//! # Resources
+//!
+//! - https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
+//! - https://developer.arm.com/documentation/ddi0183/latest
 
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, synchronization,
@@ -17,50 +22,63 @@ use register::{mmio::*, register_bitfields, register_structs};
 
 // PL011 UART registers.
 //
-// Descriptions taken from
-// https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
+// Descriptions taken from "PrimeCell UART (PL011) Technical Reference Manual" r1p5.
 register_bitfields! {
     u32,
 
-    /// Flag Register
+    /// Flag Register.
     FR [
         /// Transmit FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-        /// Line Control Register, UARTLCR_ LCRH.
+        /// Line Control Register, LCR_H.
         ///
-        /// If the FIFO is disabled, this bit is set when the transmit holding register is empty. If
-        /// the FIFO is enabled, the TXFE bit is set when the transmit FIFO is empty. This bit does
-        /// not indicate if there is data in the transmit shift register.
+        /// - If the FIFO is disabled, this bit is set when the transmit holding register is empty.
+        /// - If the FIFO is enabled, the TXFE bit is set when the transmit FIFO is empty.
+        /// - This bit does not indicate if there is data in the transmit shift register.
         TXFE OFFSET(7) NUMBITS(1) [],
 
         /// Transmit FIFO full. The meaning of this bit depends on the state of the FEN bit in the
-        /// UARTLCR_ LCRH Register.
+        /// LCR_H Register.
         ///
-        /// If the FIFO is disabled, this bit is set when the transmit holding register is full. If
-        /// the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
+        /// - If the FIFO is disabled, this bit is set when the transmit holding register is full.
+        /// - If the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
         TXFF OFFSET(5) NUMBITS(1) [],
 
         /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-        /// UARTLCR_H Register.
+        /// LCR_H Register.
         ///
         /// If the FIFO is disabled, this bit is set when the receive holding register is empty. If
         /// the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
-        RXFE OFFSET(4) NUMBITS(1) []
+
+        /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
+        /// LCR_H Register.
+        ///
+        /// - If the FIFO is disabled, this bit is set when the receive holding register is empty.
+        /// - If the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
+        RXFE OFFSET(4) NUMBITS(1) [],
+
+        /// UART busy. If this bit is set to 1, the UART is busy transmitting data. This bit remains
+        /// set until the complete byte, including all the stop bits, has been sent from the shift
+        /// register.
+        ///
+        /// This bit is set as soon as the transmit FIFO becomes non-empty, regardless of whether
+        /// the UART is enabled or not.
+        BUSY OFFSET(3) NUMBITS(1) []
     ],
 
-    /// Integer Baud rate divisor
+    /// Integer Baud Rate Divisor.
     IBRD [
-        /// Integer Baud rate divisor
-        IBRD OFFSET(0) NUMBITS(16) []
+        /// The integer baud rate divisor.
+        BAUD_DIVINT OFFSET(0) NUMBITS(16) []
     ],
 
-    /// Fractional Baud rate divisor
+    /// Fractional Baud Rate Divisor.
     FBRD [
-        /// Fractional Baud rate divisor
-        FBRD OFFSET(0) NUMBITS(6) []
+        ///  The fractional baud rate divisor.
+        BAUD_DIVFRAC OFFSET(0) NUMBITS(6) []
     ],
 
-    /// Line Control register
-    LCRH [
+    /// Line Control Register.
+    LCR_H [
         /// Word length. These bits indicate the number of data bits transmitted or received in a
         /// frame.
         WLEN OFFSET(5) NUMBITS(2) [
@@ -73,34 +91,42 @@ register_bitfields! {
         /// Enable FIFOs:
         ///
         /// 0 = FIFOs are disabled (character mode) that is, the FIFOs become 1-byte-deep holding
-        /// registers
+        /// registers.
         ///
-        /// 1 = transmit and receive FIFO buffers are enabled (FIFO mode).
+        /// 1 = Transmit and receive FIFO buffers are enabled (FIFO mode).
         FEN  OFFSET(4) NUMBITS(1) [
             FifosDisabled = 0,
             FifosEnabled = 1
         ]
     ],
 
-    /// Control Register
+    /// Control Register.
     CR [
         /// Receive enable. If this bit is set to 1, the receive section of the UART is enabled.
-        /// Data reception occurs for UART signals. When the UART is disabled in the middle of
-        /// reception, it completes the current character before stopping.
-        RXE    OFFSET(9) NUMBITS(1) [
+        /// Data reception occurs for either UART signals or SIR signals depending on the setting of
+        /// the SIREN bit. When the UART is disabled in the middle of reception, it completes the
+        /// current character before stopping.
+        RXE OFFSET(9) NUMBITS(1) [
             Disabled = 0,
             Enabled = 1
         ],
 
         /// Transmit enable. If this bit is set to 1, the transmit section of the UART is enabled.
-        /// Data transmission occurs for UART signals. When the UART is disabled in the middle of
-        /// transmission, it completes the current character before stopping.
-        TXE    OFFSET(8) NUMBITS(1) [
+        /// Data transmission occurs for either UART signals, or SIR signals depending on the
+        /// setting of the SIREN bit. When the UART is disabled in the middle of transmission, it
+        /// completes the current character before stopping.
+        TXE OFFSET(8) NUMBITS(1) [
             Disabled = 0,
             Enabled = 1
         ],
 
-        /// UART enable
+        /// UART enable:
+        ///
+        /// 0 = UART is disabled. If the UART is disabled in the middle of transmission or
+        /// reception, it completes the current character before stopping.
+        ///
+        /// 1 = The UART is enabled. Data transmission and reception occurs for either UART signals
+        /// or SIR signals depending on the setting of the SIREN bit
         UARTEN OFFSET(0) NUMBITS(1) [
             /// If the UART is disabled in the middle of transmission or reception, it completes the
             /// current character before stopping.
@@ -109,9 +135,9 @@ register_bitfields! {
         ]
     ],
 
-    /// Interrupt Clear Register
+    /// Interrupt Clear Register.
     ICR [
-        /// Meta field for all pending interrupts
+        /// Meta field for all pending interrupts.
         ALL OFFSET(0) NUMBITS(11) []
     ]
 }
@@ -125,7 +151,7 @@ register_structs! {
         (0x1c => _reserved2),
         (0x24 => IBRD: WriteOnly<u32, IBRD::Register>),
         (0x28 => FBRD: WriteOnly<u32, FBRD::Register>),
-        (0x2c => LCRH: WriteOnly<u32, LCRH::Register>),
+        (0x2c => LCR_H: WriteOnly<u32, LCR_H::Register>),
         (0x30 => CR: WriteOnly<u32, CR::Register>),
         (0x34 => _reserved3),
         (0x44 => ICR: WriteOnly<u32, ICR::Register>),
@@ -183,11 +209,18 @@ impl PL011UartInner {
     /// This results in 8N1 and 921_600 baud.
     ///
     /// The calculation for the BRD is (we set the clock to 48 MHz in config.txt):
-    /// `(48_000_000 / 16) / 921_600 = 3.2552083`. `3` goes to the `IBRD` (integer field).
+    /// `(48_000_000 / 16) / 921_600 = 3.2552083`.
+    ///
+    /// This means the integer part is `3` and goes into the `IBRD`.
+    /// The fractional part is `0.2552083`.
     ///
-    /// The `FBRD` (fractional field) is only 6 bits so `0.2552083 * 64 = 16.3 rounded to 16` will
-    /// give the best approximation we can get. A 5% error margin is acceptable for UART and we're
-    /// now at 0.02%.
+    /// `FBRD` calculation according to the PL011 Technical Reference Manual:
+    /// `INTEGER((0.2552083 * 64) + 0.5) = 16`.
+    ///
+    /// Therefore, the generated baud rate divider is: `3 + 16/64 = 3.25`. Which results in a
+    /// genrated baud rate of `48_000_000 / (16 * 3.25) = 923_077`.
+    ///
+    /// Error = `((923_077 - 921_600) / 921_600) * 100 = 0.16%`.
     pub fn init(&mut self) {
         // Execution can arrive here while there are still characters queued in the TX FIFO and
         // actively being sent out by the UART hardware. If the UART is turned off in this case,
@@ -205,14 +238,18 @@ impl PL011UartInner {
         // Clear all pending interrupts.
         self.registers.ICR.write(ICR::ALL::CLEAR);
 
-        // Set the baud rate.
-        self.registers.IBRD.write(IBRD::IBRD.val(3));
-        self.registers.FBRD.write(FBRD::FBRD.val(16));
-
-        // Set 8N1 + FIFO on.
+        // From the PL011 Technical Reference Manual:
+        //
+        // The LCR_H, IBRD, and FBRD registers form the single 30-bit wide LCR Register that is
+        // updated on a single write strobe generated by a LCR_H write. So, to internally update the
+        // contents of IBRD or FBRD, a LCR_H write must always be performed at the end.
+        //
+        // Set the baud rate, 8N1 and FIFO enabled.
+        self.registers.IBRD.write(IBRD::BAUD_DIVINT.val(3));
+        self.registers.FBRD.write(FBRD::BAUD_DIVFRAC.val(16));
         self.registers
-            .LCRH
-            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled);
+            .LCR_H
+            .write(LCR_H::WLEN::EightBit + LCR_H::FEN::FifosEnabled);
 
         // Turn the UART on.
         self.registers
@@ -235,22 +272,10 @@ impl PL011UartInner {
 
     /// Block execution until the last buffered character has been physically put on the TX wire.
     fn flush(&self) {
-        use crate::{time, time::interface::TimeManager};
-        use core::time::Duration;
-
-        // The bit time for 921_600 baud is 1 / 921_600 = 1.09 µs. 8N1 has a total of 10 bits per
-        // symbol (start bit, 8 data bits, stop bit), so one symbol takes round about 10 * 1.09 =
-        // 10.9 µs, or 10_900 ns. Round it up to 12_000 ns to be on the safe side.
-        const CHAR_TIME_SAFE: Duration = Duration::from_nanos(12_000);
-
-        // Spin until TX FIFO empty is set.
-        while !self.registers.FR.matches_all(FR::TXFE::SET) {
+        // Spin until the busy bit is cleared.
+        while self.registers.FR.matches_all(FR::BUSY::SET) {
             cpu::nop();
         }
-
-        // After the last character has been queued for transmission, wait for the time of one
-        // character + some extra time for safety.
-        time::time_manager().spin_for(CHAR_TIME_SAFE);
     }
 
     /// Retrieve a character.
diff --git a/13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 876aa461d..ce39752d1 100644
--- a/13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -3,6 +3,11 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
+//!
+//! # Resources
+//!
+//! - https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
+//! - https://developer.arm.com/documentation/ddi0183/latest
 
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, synchronization,
@@ -17,50 +22,63 @@ use register::{mmio::*, register_bitfields, register_structs};
 
 // PL011 UART registers.
 //
-// Descriptions taken from
-// https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
+// Descriptions taken from "PrimeCell UART (PL011) Technical Reference Manual" r1p5.
 register_bitfields! {
     u32,
 
-    /// Flag Register
+    /// Flag Register.
     FR [
         /// Transmit FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-        /// Line Control Register, UARTLCR_ LCRH.
+        /// Line Control Register, LCR_H.
         ///
-        /// If the FIFO is disabled, this bit is set when the transmit holding register is empty. If
-        /// the FIFO is enabled, the TXFE bit is set when the transmit FIFO is empty. This bit does
-        /// not indicate if there is data in the transmit shift register.
+        /// - If the FIFO is disabled, this bit is set when the transmit holding register is empty.
+        /// - If the FIFO is enabled, the TXFE bit is set when the transmit FIFO is empty.
+        /// - This bit does not indicate if there is data in the transmit shift register.
         TXFE OFFSET(7) NUMBITS(1) [],
 
         /// Transmit FIFO full. The meaning of this bit depends on the state of the FEN bit in the
-        /// UARTLCR_ LCRH Register.
+        /// LCR_H Register.
         ///
-        /// If the FIFO is disabled, this bit is set when the transmit holding register is full. If
-        /// the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
+        /// - If the FIFO is disabled, this bit is set when the transmit holding register is full.
+        /// - If the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
         TXFF OFFSET(5) NUMBITS(1) [],
 
         /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-        /// UARTLCR_H Register.
+        /// LCR_H Register.
         ///
         /// If the FIFO is disabled, this bit is set when the receive holding register is empty. If
         /// the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
-        RXFE OFFSET(4) NUMBITS(1) []
+
+        /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
+        /// LCR_H Register.
+        ///
+        /// - If the FIFO is disabled, this bit is set when the receive holding register is empty.
+        /// - If the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
+        RXFE OFFSET(4) NUMBITS(1) [],
+
+        /// UART busy. If this bit is set to 1, the UART is busy transmitting data. This bit remains
+        /// set until the complete byte, including all the stop bits, has been sent from the shift
+        /// register.
+        ///
+        /// This bit is set as soon as the transmit FIFO becomes non-empty, regardless of whether
+        /// the UART is enabled or not.
+        BUSY OFFSET(3) NUMBITS(1) []
     ],
 
-    /// Integer Baud rate divisor
+    /// Integer Baud Rate Divisor.
     IBRD [
-        /// Integer Baud rate divisor
-        IBRD OFFSET(0) NUMBITS(16) []
+        /// The integer baud rate divisor.
+        BAUD_DIVINT OFFSET(0) NUMBITS(16) []
     ],
 
-    /// Fractional Baud rate divisor
+    /// Fractional Baud Rate Divisor.
     FBRD [
-        /// Fractional Baud rate divisor
-        FBRD OFFSET(0) NUMBITS(6) []
+        ///  The fractional baud rate divisor.
+        BAUD_DIVFRAC OFFSET(0) NUMBITS(6) []
     ],
 
-    /// Line Control register
-    LCRH [
+    /// Line Control Register.
+    LCR_H [
         /// Word length. These bits indicate the number of data bits transmitted or received in a
         /// frame.
         WLEN OFFSET(5) NUMBITS(2) [
@@ -73,34 +91,42 @@ register_bitfields! {
         /// Enable FIFOs:
         ///
         /// 0 = FIFOs are disabled (character mode) that is, the FIFOs become 1-byte-deep holding
-        /// registers
+        /// registers.
         ///
-        /// 1 = transmit and receive FIFO buffers are enabled (FIFO mode).
+        /// 1 = Transmit and receive FIFO buffers are enabled (FIFO mode).
         FEN  OFFSET(4) NUMBITS(1) [
             FifosDisabled = 0,
             FifosEnabled = 1
         ]
     ],
 
-    /// Control Register
+    /// Control Register.
     CR [
         /// Receive enable. If this bit is set to 1, the receive section of the UART is enabled.
-        /// Data reception occurs for UART signals. When the UART is disabled in the middle of
-        /// reception, it completes the current character before stopping.
-        RXE    OFFSET(9) NUMBITS(1) [
+        /// Data reception occurs for either UART signals or SIR signals depending on the setting of
+        /// the SIREN bit. When the UART is disabled in the middle of reception, it completes the
+        /// current character before stopping.
+        RXE OFFSET(9) NUMBITS(1) [
             Disabled = 0,
             Enabled = 1
         ],
 
         /// Transmit enable. If this bit is set to 1, the transmit section of the UART is enabled.
-        /// Data transmission occurs for UART signals. When the UART is disabled in the middle of
-        /// transmission, it completes the current character before stopping.
-        TXE    OFFSET(8) NUMBITS(1) [
+        /// Data transmission occurs for either UART signals, or SIR signals depending on the
+        /// setting of the SIREN bit. When the UART is disabled in the middle of transmission, it
+        /// completes the current character before stopping.
+        TXE OFFSET(8) NUMBITS(1) [
             Disabled = 0,
             Enabled = 1
         ],
 
-        /// UART enable
+        /// UART enable:
+        ///
+        /// 0 = UART is disabled. If the UART is disabled in the middle of transmission or
+        /// reception, it completes the current character before stopping.
+        ///
+        /// 1 = The UART is enabled. Data transmission and reception occurs for either UART signals
+        /// or SIR signals depending on the setting of the SIREN bit
         UARTEN OFFSET(0) NUMBITS(1) [
             /// If the UART is disabled in the middle of transmission or reception, it completes the
             /// current character before stopping.
@@ -109,9 +135,9 @@ register_bitfields! {
         ]
     ],
 
-    /// Interrupt Clear Register
+    /// Interrupt Clear Register.
     ICR [
-        /// Meta field for all pending interrupts
+        /// Meta field for all pending interrupts.
         ALL OFFSET(0) NUMBITS(11) []
     ]
 }
@@ -125,7 +151,7 @@ register_structs! {
         (0x1c => _reserved2),
         (0x24 => IBRD: WriteOnly<u32, IBRD::Register>),
         (0x28 => FBRD: WriteOnly<u32, FBRD::Register>),
-        (0x2c => LCRH: WriteOnly<u32, LCRH::Register>),
+        (0x2c => LCR_H: WriteOnly<u32, LCR_H::Register>),
         (0x30 => CR: WriteOnly<u32, CR::Register>),
         (0x34 => _reserved3),
         (0x44 => ICR: WriteOnly<u32, ICR::Register>),
@@ -183,11 +209,18 @@ impl PL011UartInner {
     /// This results in 8N1 and 921_600 baud.
     ///
     /// The calculation for the BRD is (we set the clock to 48 MHz in config.txt):
-    /// `(48_000_000 / 16) / 921_600 = 3.2552083`. `3` goes to the `IBRD` (integer field).
+    /// `(48_000_000 / 16) / 921_600 = 3.2552083`.
+    ///
+    /// This means the integer part is `3` and goes into the `IBRD`.
+    /// The fractional part is `0.2552083`.
     ///
-    /// The `FBRD` (fractional field) is only 6 bits so `0.2552083 * 64 = 16.3 rounded to 16` will
-    /// give the best approximation we can get. A 5% error margin is acceptable for UART and we're
-    /// now at 0.02%.
+    /// `FBRD` calculation according to the PL011 Technical Reference Manual:
+    /// `INTEGER((0.2552083 * 64) + 0.5) = 16`.
+    ///
+    /// Therefore, the generated baud rate divider is: `3 + 16/64 = 3.25`. Which results in a
+    /// genrated baud rate of `48_000_000 / (16 * 3.25) = 923_077`.
+    ///
+    /// Error = `((923_077 - 921_600) / 921_600) * 100 = 0.16%`.
     pub fn init(&mut self) {
         // Execution can arrive here while there are still characters queued in the TX FIFO and
         // actively being sent out by the UART hardware. If the UART is turned off in this case,
@@ -205,14 +238,18 @@ impl PL011UartInner {
         // Clear all pending interrupts.
         self.registers.ICR.write(ICR::ALL::CLEAR);
 
-        // Set the baud rate.
-        self.registers.IBRD.write(IBRD::IBRD.val(3));
-        self.registers.FBRD.write(FBRD::FBRD.val(16));
-
-        // Set 8N1 + FIFO on.
+        // From the PL011 Technical Reference Manual:
+        //
+        // The LCR_H, IBRD, and FBRD registers form the single 30-bit wide LCR Register that is
+        // updated on a single write strobe generated by a LCR_H write. So, to internally update the
+        // contents of IBRD or FBRD, a LCR_H write must always be performed at the end.
+        //
+        // Set the baud rate, 8N1 and FIFO enabled.
+        self.registers.IBRD.write(IBRD::BAUD_DIVINT.val(3));
+        self.registers.FBRD.write(FBRD::BAUD_DIVFRAC.val(16));
         self.registers
-            .LCRH
-            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled);
+            .LCR_H
+            .write(LCR_H::WLEN::EightBit + LCR_H::FEN::FifosEnabled);
 
         // Turn the UART on.
         self.registers
@@ -235,22 +272,10 @@ impl PL011UartInner {
 
     /// Block execution until the last buffered character has been physically put on the TX wire.
     fn flush(&self) {
-        use crate::{time, time::interface::TimeManager};
-        use core::time::Duration;
-
-        // The bit time for 921_600 baud is 1 / 921_600 = 1.09 µs. 8N1 has a total of 10 bits per
-        // symbol (start bit, 8 data bits, stop bit), so one symbol takes round about 10 * 1.09 =
-        // 10.9 µs, or 10_900 ns. Round it up to 12_000 ns to be on the safe side.
-        const CHAR_TIME_SAFE: Duration = Duration::from_nanos(12_000);
-
-        // Spin until TX FIFO empty is set.
-        while !self.registers.FR.matches_all(FR::TXFE::SET) {
+        // Spin until the busy bit is cleared.
+        while self.registers.FR.matches_all(FR::BUSY::SET) {
             cpu::nop();
         }
-
-        // After the last character has been queued for transmission, wait for the time of one
-        // character + some extra time for safety.
-        time::time_manager().spin_for(CHAR_TIME_SAFE);
     }
 
     /// Retrieve a character.
diff --git a/14_exceptions_part2_peripheral_IRQs/README.md b/14_exceptions_part2_peripheral_IRQs/README.md
index 2c74961d9..e6dd762ec 100644
--- a/14_exceptions_part2_peripheral_IRQs/README.md
+++ b/14_exceptions_part2_peripheral_IRQs/README.md
@@ -1775,8 +1775,8 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_interrupt_cont
 diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 --- 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 +++ 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
-@@ -5,8 +5,8 @@
- //! PL011 UART driver.
+@@ -10,8 +10,8 @@
+ //! - https://developer.arm.com/documentation/ddi0183/latest
 
  use crate::{
 -    bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, synchronization,
@@ -1786,11 +1786,11 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
  };
  use core::fmt;
  use register::{mmio::*, register_bitfields, register_structs};
-@@ -109,6 +109,48 @@
+@@ -135,6 +135,52 @@
          ]
      ],
 
-+    /// Interrupt FIFO Level Select Register
++    /// Interrupt FIFO Level Select Register.
 +    IFLS [
 +        /// Receive interrupt FIFO level select. The trigger points for the receive interrupt are as
 +        /// follows.
@@ -1803,25 +1803,29 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 +        ]
 +    ],
 +
-+    /// Interrupt Mask Set Clear Register
++    /// Interrupt Mask Set/Clear Register.
 +    IMSC [
 +        /// Receive timeout interrupt mask. A read returns the current mask for the UARTRTINTR
-+        /// interrupt. On a write of 1, the mask of the interrupt is set. A write of 0 clears the
-+        /// mask.
++        /// interrupt.
++        ///
++        /// - On a write of 1, the mask of the UARTRTINTR interrupt is set.
++        /// - A write of 0 clears the mask.
 +        RTIM OFFSET(6) NUMBITS(1) [
 +            Disabled = 0,
 +            Enabled = 1
 +        ],
 +
-+        /// Receive interrupt mask. A read returns the current mask for the UARTRXINTR interrupt. On
-+        /// a write of 1, the mask of the interrupt is set. A write of 0 clears the mask.
++        /// Receive interrupt mask. A read returns the current mask for the UARTRXINTR interrupt.
++        ///
++        /// - On a write of 1, the mask of the UARTRXINTR interrupt is set.
++        /// - A write of 0 clears the mask.
 +        RXIM OFFSET(4) NUMBITS(1) [
 +            Disabled = 0,
 +            Enabled = 1
 +        ]
 +    ],
 +
-+    /// Masked Interrupt Status Register
++    /// Masked Interrupt Status Register.
 +    MIS [
 +        /// Receive timeout masked interrupt status. Returns the masked interrupt state of the
 +        /// UARTRTINTR interrupt.
@@ -1832,12 +1836,12 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 +        RXMIS OFFSET(4) NUMBITS(1) []
 +    ],
 +
-     /// Interrupt Clear Register
+     /// Interrupt Clear Register.
      ICR [
-         /// Meta field for all pending interrupts
-@@ -127,7 +169,10 @@
+         /// Meta field for all pending interrupts.
+@@ -153,7 +199,10 @@
          (0x28 => FBRD: WriteOnly<u32, FBRD::Register>),
-         (0x2c => LCRH: WriteOnly<u32, LCRH::Register>),
+         (0x2c => LCR_H: WriteOnly<u32, LCR_H::Register>),
          (0x30 => CR: WriteOnly<u32, CR::Register>),
 -        (0x34 => _reserved3),
 +        (0x34 => IFLS: ReadWrite<u32, IFLS::Register>),
@@ -1847,7 +1851,7 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
          (0x44 => ICR: WriteOnly<u32, ICR::Register>),
          (0x48 => @END),
      }
-@@ -157,7 +202,8 @@
+@@ -183,7 +232,8 @@
 
  /// Representation of the UART.
  pub struct PL011Uart {
@@ -1857,9 +1861,9 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -214,6 +260,14 @@
-             .LCRH
-             .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled);
+@@ -251,6 +301,14 @@
+             .LCR_H
+             .write(LCR_H::WLEN::EightBit + LCR_H::FEN::FifosEnabled);
 
 +        // Set RX FIFO fill level at 1/8.
 +        self.registers.IFLS.write(IFLS::RXIFLSEL::OneEigth);
@@ -1872,7 +1876,7 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
          // Turn the UART on.
          self.registers
              .CR
-@@ -308,9 +362,13 @@
+@@ -333,9 +391,13 @@
      /// # Safety
      ///
      /// - The user must ensure to provide a correct MMIO start address.
@@ -1888,7 +1892,7 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
          }
      }
  }
-@@ -330,6 +388,21 @@
+@@ -355,6 +417,21 @@
 
          Ok(())
      }
@@ -1910,7 +1914,7 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
  }
 
  impl console::interface::Write for PL011Uart {
-@@ -376,3 +449,24 @@
+@@ -401,3 +478,24 @@
          self.inner.lock(|inner| inner.chars_read)
      }
  }
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 7b3a85cf0..1dd0a14c2 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -3,6 +3,11 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
+//!
+//! # Resources
+//!
+//! - https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
+//! - https://developer.arm.com/documentation/ddi0183/latest
 
 use crate::{
     bsp, bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, exception,
@@ -17,50 +22,63 @@ use register::{mmio::*, register_bitfields, register_structs};
 
 // PL011 UART registers.
 //
-// Descriptions taken from
-// https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
+// Descriptions taken from "PrimeCell UART (PL011) Technical Reference Manual" r1p5.
 register_bitfields! {
     u32,
 
-    /// Flag Register
+    /// Flag Register.
     FR [
         /// Transmit FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-        /// Line Control Register, UARTLCR_ LCRH.
+        /// Line Control Register, LCR_H.
         ///
-        /// If the FIFO is disabled, this bit is set when the transmit holding register is empty. If
-        /// the FIFO is enabled, the TXFE bit is set when the transmit FIFO is empty. This bit does
-        /// not indicate if there is data in the transmit shift register.
+        /// - If the FIFO is disabled, this bit is set when the transmit holding register is empty.
+        /// - If the FIFO is enabled, the TXFE bit is set when the transmit FIFO is empty.
+        /// - This bit does not indicate if there is data in the transmit shift register.
         TXFE OFFSET(7) NUMBITS(1) [],
 
         /// Transmit FIFO full. The meaning of this bit depends on the state of the FEN bit in the
-        /// UARTLCR_ LCRH Register.
+        /// LCR_H Register.
         ///
-        /// If the FIFO is disabled, this bit is set when the transmit holding register is full. If
-        /// the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
+        /// - If the FIFO is disabled, this bit is set when the transmit holding register is full.
+        /// - If the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
         TXFF OFFSET(5) NUMBITS(1) [],
 
         /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-        /// UARTLCR_H Register.
+        /// LCR_H Register.
         ///
         /// If the FIFO is disabled, this bit is set when the receive holding register is empty. If
         /// the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
-        RXFE OFFSET(4) NUMBITS(1) []
+
+        /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
+        /// LCR_H Register.
+        ///
+        /// - If the FIFO is disabled, this bit is set when the receive holding register is empty.
+        /// - If the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
+        RXFE OFFSET(4) NUMBITS(1) [],
+
+        /// UART busy. If this bit is set to 1, the UART is busy transmitting data. This bit remains
+        /// set until the complete byte, including all the stop bits, has been sent from the shift
+        /// register.
+        ///
+        /// This bit is set as soon as the transmit FIFO becomes non-empty, regardless of whether
+        /// the UART is enabled or not.
+        BUSY OFFSET(3) NUMBITS(1) []
     ],
 
-    /// Integer Baud rate divisor
+    /// Integer Baud Rate Divisor.
     IBRD [
-        /// Integer Baud rate divisor
-        IBRD OFFSET(0) NUMBITS(16) []
+        /// The integer baud rate divisor.
+        BAUD_DIVINT OFFSET(0) NUMBITS(16) []
     ],
 
-    /// Fractional Baud rate divisor
+    /// Fractional Baud Rate Divisor.
     FBRD [
-        /// Fractional Baud rate divisor
-        FBRD OFFSET(0) NUMBITS(6) []
+        ///  The fractional baud rate divisor.
+        BAUD_DIVFRAC OFFSET(0) NUMBITS(6) []
     ],
 
-    /// Line Control register
-    LCRH [
+    /// Line Control Register.
+    LCR_H [
         /// Word length. These bits indicate the number of data bits transmitted or received in a
         /// frame.
         WLEN OFFSET(5) NUMBITS(2) [
@@ -73,34 +91,42 @@ register_bitfields! {
         /// Enable FIFOs:
         ///
         /// 0 = FIFOs are disabled (character mode) that is, the FIFOs become 1-byte-deep holding
-        /// registers
+        /// registers.
         ///
-        /// 1 = transmit and receive FIFO buffers are enabled (FIFO mode).
+        /// 1 = Transmit and receive FIFO buffers are enabled (FIFO mode).
         FEN  OFFSET(4) NUMBITS(1) [
             FifosDisabled = 0,
             FifosEnabled = 1
         ]
     ],
 
-    /// Control Register
+    /// Control Register.
     CR [
         /// Receive enable. If this bit is set to 1, the receive section of the UART is enabled.
-        /// Data reception occurs for UART signals. When the UART is disabled in the middle of
-        /// reception, it completes the current character before stopping.
-        RXE    OFFSET(9) NUMBITS(1) [
+        /// Data reception occurs for either UART signals or SIR signals depending on the setting of
+        /// the SIREN bit. When the UART is disabled in the middle of reception, it completes the
+        /// current character before stopping.
+        RXE OFFSET(9) NUMBITS(1) [
             Disabled = 0,
             Enabled = 1
         ],
 
         /// Transmit enable. If this bit is set to 1, the transmit section of the UART is enabled.
-        /// Data transmission occurs for UART signals. When the UART is disabled in the middle of
-        /// transmission, it completes the current character before stopping.
-        TXE    OFFSET(8) NUMBITS(1) [
+        /// Data transmission occurs for either UART signals, or SIR signals depending on the
+        /// setting of the SIREN bit. When the UART is disabled in the middle of transmission, it
+        /// completes the current character before stopping.
+        TXE OFFSET(8) NUMBITS(1) [
             Disabled = 0,
             Enabled = 1
         ],
 
-        /// UART enable
+        /// UART enable:
+        ///
+        /// 0 = UART is disabled. If the UART is disabled in the middle of transmission or
+        /// reception, it completes the current character before stopping.
+        ///
+        /// 1 = The UART is enabled. Data transmission and reception occurs for either UART signals
+        /// or SIR signals depending on the setting of the SIREN bit
         UARTEN OFFSET(0) NUMBITS(1) [
             /// If the UART is disabled in the middle of transmission or reception, it completes the
             /// current character before stopping.
@@ -109,7 +135,7 @@ register_bitfields! {
         ]
     ],
 
-    /// Interrupt FIFO Level Select Register
+    /// Interrupt FIFO Level Select Register.
     IFLS [
         /// Receive interrupt FIFO level select. The trigger points for the receive interrupt are as
         /// follows.
@@ -122,25 +148,29 @@ register_bitfields! {
         ]
     ],
 
-    /// Interrupt Mask Set Clear Register
+    /// Interrupt Mask Set/Clear Register.
     IMSC [
         /// Receive timeout interrupt mask. A read returns the current mask for the UARTRTINTR
-        /// interrupt. On a write of 1, the mask of the interrupt is set. A write of 0 clears the
-        /// mask.
+        /// interrupt.
+        ///
+        /// - On a write of 1, the mask of the UARTRTINTR interrupt is set.
+        /// - A write of 0 clears the mask.
         RTIM OFFSET(6) NUMBITS(1) [
             Disabled = 0,
             Enabled = 1
         ],
 
-        /// Receive interrupt mask. A read returns the current mask for the UARTRXINTR interrupt. On
-        /// a write of 1, the mask of the interrupt is set. A write of 0 clears the mask.
+        /// Receive interrupt mask. A read returns the current mask for the UARTRXINTR interrupt.
+        ///
+        /// - On a write of 1, the mask of the UARTRXINTR interrupt is set.
+        /// - A write of 0 clears the mask.
         RXIM OFFSET(4) NUMBITS(1) [
             Disabled = 0,
             Enabled = 1
         ]
     ],
 
-    /// Masked Interrupt Status Register
+    /// Masked Interrupt Status Register.
     MIS [
         /// Receive timeout masked interrupt status. Returns the masked interrupt state of the
         /// UARTRTINTR interrupt.
@@ -151,9 +181,9 @@ register_bitfields! {
         RXMIS OFFSET(4) NUMBITS(1) []
     ],
 
-    /// Interrupt Clear Register
+    /// Interrupt Clear Register.
     ICR [
-        /// Meta field for all pending interrupts
+        /// Meta field for all pending interrupts.
         ALL OFFSET(0) NUMBITS(11) []
     ]
 }
@@ -167,7 +197,7 @@ register_structs! {
         (0x1c => _reserved2),
         (0x24 => IBRD: WriteOnly<u32, IBRD::Register>),
         (0x28 => FBRD: WriteOnly<u32, FBRD::Register>),
-        (0x2c => LCRH: WriteOnly<u32, LCRH::Register>),
+        (0x2c => LCR_H: WriteOnly<u32, LCR_H::Register>),
         (0x30 => CR: WriteOnly<u32, CR::Register>),
         (0x34 => IFLS: ReadWrite<u32, IFLS::Register>),
         (0x38 => IMSC: ReadWrite<u32, IMSC::Register>),
@@ -229,11 +259,18 @@ impl PL011UartInner {
     /// This results in 8N1 and 921_600 baud.
     ///
     /// The calculation for the BRD is (we set the clock to 48 MHz in config.txt):
-    /// `(48_000_000 / 16) / 921_600 = 3.2552083`. `3` goes to the `IBRD` (integer field).
+    /// `(48_000_000 / 16) / 921_600 = 3.2552083`.
+    ///
+    /// This means the integer part is `3` and goes into the `IBRD`.
+    /// The fractional part is `0.2552083`.
+    ///
+    /// `FBRD` calculation according to the PL011 Technical Reference Manual:
+    /// `INTEGER((0.2552083 * 64) + 0.5) = 16`.
     ///
-    /// The `FBRD` (fractional field) is only 6 bits so `0.2552083 * 64 = 16.3 rounded to 16` will
-    /// give the best approximation we can get. A 5% error margin is acceptable for UART and we're
-    /// now at 0.02%.
+    /// Therefore, the generated baud rate divider is: `3 + 16/64 = 3.25`. Which results in a
+    /// genrated baud rate of `48_000_000 / (16 * 3.25) = 923_077`.
+    ///
+    /// Error = `((923_077 - 921_600) / 921_600) * 100 = 0.16%`.
     pub fn init(&mut self) {
         // Execution can arrive here while there are still characters queued in the TX FIFO and
         // actively being sent out by the UART hardware. If the UART is turned off in this case,
@@ -251,14 +288,18 @@ impl PL011UartInner {
         // Clear all pending interrupts.
         self.registers.ICR.write(ICR::ALL::CLEAR);
 
-        // Set the baud rate.
-        self.registers.IBRD.write(IBRD::IBRD.val(3));
-        self.registers.FBRD.write(FBRD::FBRD.val(16));
-
-        // Set 8N1 + FIFO on.
+        // From the PL011 Technical Reference Manual:
+        //
+        // The LCR_H, IBRD, and FBRD registers form the single 30-bit wide LCR Register that is
+        // updated on a single write strobe generated by a LCR_H write. So, to internally update the
+        // contents of IBRD or FBRD, a LCR_H write must always be performed at the end.
+        //
+        // Set the baud rate, 8N1 and FIFO enabled.
+        self.registers.IBRD.write(IBRD::BAUD_DIVINT.val(3));
+        self.registers.FBRD.write(FBRD::BAUD_DIVFRAC.val(16));
         self.registers
-            .LCRH
-            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled);
+            .LCR_H
+            .write(LCR_H::WLEN::EightBit + LCR_H::FEN::FifosEnabled);
 
         // Set RX FIFO fill level at 1/8.
         self.registers.IFLS.write(IFLS::RXIFLSEL::OneEigth);
@@ -289,22 +330,10 @@ impl PL011UartInner {
 
     /// Block execution until the last buffered character has been physically put on the TX wire.
     fn flush(&self) {
-        use crate::{time, time::interface::TimeManager};
-        use core::time::Duration;
-
-        // The bit time for 921_600 baud is 1 / 921_600 = 1.09 µs. 8N1 has a total of 10 bits per
-        // symbol (start bit, 8 data bits, stop bit), so one symbol takes round about 10 * 1.09 =
-        // 10.9 µs, or 10_900 ns. Round it up to 12_000 ns to be on the safe side.
-        const CHAR_TIME_SAFE: Duration = Duration::from_nanos(12_000);
-
-        // Spin until TX FIFO empty is set.
-        while !self.registers.FR.matches_all(FR::TXFE::SET) {
+        // Spin until the busy bit is cleared.
+        while self.registers.FR.matches_all(FR::BUSY::SET) {
             cpu::nop();
         }
-
-        // After the last character has been queued for transmission, wait for the time of one
-        // character + some extra time for safety.
-        time::time_manager().spin_for(CHAR_TIME_SAFE);
     }
 
     /// Retrieve a character.
diff --git a/15_virtual_mem_part2_mmio_remap/README.md b/15_virtual_mem_part2_mmio_remap/README.md
index beb2cffc6..b326d589c 100644
--- a/15_virtual_mem_part2_mmio_remap/README.md
+++ b/15_virtual_mem_part2_mmio_remap/README.md
@@ -1189,8 +1189,8 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
 diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 --- 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 +++ 15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
-@@ -5,10 +5,13 @@
- //! PL011 UART driver.
+@@ -10,10 +10,13 @@
+ //! - https://developer.arm.com/documentation/ddi0183/latest
 
  use crate::{
 -    bsp, bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, exception,
@@ -1206,7 +1206,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
  use register::{mmio::*, register_bitfields, register_structs};
 
  //--------------------------------------------------------------------------------------------------
-@@ -202,6 +205,8 @@
+@@ -232,6 +235,8 @@
 
  /// Representation of the UART.
  pub struct PL011Uart {
@@ -1215,10 +1215,10 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
      inner: IRQSafeNullLock<PL011UartInner>,
      irq_number: bsp::device_driver::IRQNumber,
  }
-@@ -234,7 +239,15 @@
-     /// The `FBRD` (fractional field) is only 6 bits so `0.2552083 * 64 = 16.3 rounded to 16` will
-     /// give the best approximation we can get. A 5modulo error margin is acceptable for UART and we're
-     /// now at 0.02modulo.
+@@ -271,7 +276,15 @@
+     /// genrated baud rate of `48_000_000 / (16 * 3.25) = 923_077`.
+     ///
+     /// Error = `((923_077 - 921_600) / 921_600) * 100 = 0.16modulo`.
 -    pub fn init(&mut self) {
 +    ///
 +    /// # Safety
@@ -1232,7 +1232,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
          // Execution can arrive here while there are still characters queued in the TX FIFO and
          // actively being sent out by the UART hardware. If the UART is turned off in this case,
          // those queued characters would be lost.
-@@ -272,6 +285,8 @@
+@@ -313,6 +326,8 @@
          self.registers
              .CR
              .write(CR::UARTEN::Enabled + CR::TXE::Enabled + CR::RXE::Enabled);
@@ -1241,7 +1241,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
      }
 
      /// Send a character.
-@@ -361,13 +376,18 @@
+@@ -390,13 +405,18 @@
      ///
      /// # Safety
      ///
@@ -1263,7 +1263,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
              irq_number,
          }
      }
-@@ -384,7 +404,14 @@
+@@ -413,7 +433,14 @@
      }
 
      unsafe fn init(&self) -> Result<(), &'static str> {
@@ -1279,7 +1279,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
 
          Ok(())
      }
-@@ -403,6 +430,16 @@
+@@ -432,6 +459,16 @@
 
          Ok(())
      }
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index d7d83840e..e279c2062 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -3,6 +3,11 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
+//!
+//! # Resources
+//!
+//! - https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
+//! - https://developer.arm.com/documentation/ddi0183/latest
 
 use crate::{
     bsp, bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, exception, memory,
@@ -20,50 +25,63 @@ use register::{mmio::*, register_bitfields, register_structs};
 
 // PL011 UART registers.
 //
-// Descriptions taken from
-// https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
+// Descriptions taken from "PrimeCell UART (PL011) Technical Reference Manual" r1p5.
 register_bitfields! {
     u32,
 
-    /// Flag Register
+    /// Flag Register.
     FR [
         /// Transmit FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-        /// Line Control Register, UARTLCR_ LCRH.
+        /// Line Control Register, LCR_H.
         ///
-        /// If the FIFO is disabled, this bit is set when the transmit holding register is empty. If
-        /// the FIFO is enabled, the TXFE bit is set when the transmit FIFO is empty. This bit does
-        /// not indicate if there is data in the transmit shift register.
+        /// - If the FIFO is disabled, this bit is set when the transmit holding register is empty.
+        /// - If the FIFO is enabled, the TXFE bit is set when the transmit FIFO is empty.
+        /// - This bit does not indicate if there is data in the transmit shift register.
         TXFE OFFSET(7) NUMBITS(1) [],
 
         /// Transmit FIFO full. The meaning of this bit depends on the state of the FEN bit in the
-        /// UARTLCR_ LCRH Register.
+        /// LCR_H Register.
         ///
-        /// If the FIFO is disabled, this bit is set when the transmit holding register is full. If
-        /// the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
+        /// - If the FIFO is disabled, this bit is set when the transmit holding register is full.
+        /// - If the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
         TXFF OFFSET(5) NUMBITS(1) [],
 
         /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-        /// UARTLCR_H Register.
+        /// LCR_H Register.
         ///
         /// If the FIFO is disabled, this bit is set when the receive holding register is empty. If
         /// the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
-        RXFE OFFSET(4) NUMBITS(1) []
+
+        /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
+        /// LCR_H Register.
+        ///
+        /// - If the FIFO is disabled, this bit is set when the receive holding register is empty.
+        /// - If the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
+        RXFE OFFSET(4) NUMBITS(1) [],
+
+        /// UART busy. If this bit is set to 1, the UART is busy transmitting data. This bit remains
+        /// set until the complete byte, including all the stop bits, has been sent from the shift
+        /// register.
+        ///
+        /// This bit is set as soon as the transmit FIFO becomes non-empty, regardless of whether
+        /// the UART is enabled or not.
+        BUSY OFFSET(3) NUMBITS(1) []
     ],
 
-    /// Integer Baud rate divisor
+    /// Integer Baud Rate Divisor.
     IBRD [
-        /// Integer Baud rate divisor
-        IBRD OFFSET(0) NUMBITS(16) []
+        /// The integer baud rate divisor.
+        BAUD_DIVINT OFFSET(0) NUMBITS(16) []
     ],
 
-    /// Fractional Baud rate divisor
+    /// Fractional Baud Rate Divisor.
     FBRD [
-        /// Fractional Baud rate divisor
-        FBRD OFFSET(0) NUMBITS(6) []
+        ///  The fractional baud rate divisor.
+        BAUD_DIVFRAC OFFSET(0) NUMBITS(6) []
     ],
 
-    /// Line Control register
-    LCRH [
+    /// Line Control Register.
+    LCR_H [
         /// Word length. These bits indicate the number of data bits transmitted or received in a
         /// frame.
         WLEN OFFSET(5) NUMBITS(2) [
@@ -76,34 +94,42 @@ register_bitfields! {
         /// Enable FIFOs:
         ///
         /// 0 = FIFOs are disabled (character mode) that is, the FIFOs become 1-byte-deep holding
-        /// registers
+        /// registers.
         ///
-        /// 1 = transmit and receive FIFO buffers are enabled (FIFO mode).
+        /// 1 = Transmit and receive FIFO buffers are enabled (FIFO mode).
         FEN  OFFSET(4) NUMBITS(1) [
             FifosDisabled = 0,
             FifosEnabled = 1
         ]
     ],
 
-    /// Control Register
+    /// Control Register.
     CR [
         /// Receive enable. If this bit is set to 1, the receive section of the UART is enabled.
-        /// Data reception occurs for UART signals. When the UART is disabled in the middle of
-        /// reception, it completes the current character before stopping.
-        RXE    OFFSET(9) NUMBITS(1) [
+        /// Data reception occurs for either UART signals or SIR signals depending on the setting of
+        /// the SIREN bit. When the UART is disabled in the middle of reception, it completes the
+        /// current character before stopping.
+        RXE OFFSET(9) NUMBITS(1) [
             Disabled = 0,
             Enabled = 1
         ],
 
         /// Transmit enable. If this bit is set to 1, the transmit section of the UART is enabled.
-        /// Data transmission occurs for UART signals. When the UART is disabled in the middle of
-        /// transmission, it completes the current character before stopping.
-        TXE    OFFSET(8) NUMBITS(1) [
+        /// Data transmission occurs for either UART signals, or SIR signals depending on the
+        /// setting of the SIREN bit. When the UART is disabled in the middle of transmission, it
+        /// completes the current character before stopping.
+        TXE OFFSET(8) NUMBITS(1) [
             Disabled = 0,
             Enabled = 1
         ],
 
-        /// UART enable
+        /// UART enable:
+        ///
+        /// 0 = UART is disabled. If the UART is disabled in the middle of transmission or
+        /// reception, it completes the current character before stopping.
+        ///
+        /// 1 = The UART is enabled. Data transmission and reception occurs for either UART signals
+        /// or SIR signals depending on the setting of the SIREN bit
         UARTEN OFFSET(0) NUMBITS(1) [
             /// If the UART is disabled in the middle of transmission or reception, it completes the
             /// current character before stopping.
@@ -112,7 +138,7 @@ register_bitfields! {
         ]
     ],
 
-    /// Interrupt FIFO Level Select Register
+    /// Interrupt FIFO Level Select Register.
     IFLS [
         /// Receive interrupt FIFO level select. The trigger points for the receive interrupt are as
         /// follows.
@@ -125,25 +151,29 @@ register_bitfields! {
         ]
     ],
 
-    /// Interrupt Mask Set Clear Register
+    /// Interrupt Mask Set/Clear Register.
     IMSC [
         /// Receive timeout interrupt mask. A read returns the current mask for the UARTRTINTR
-        /// interrupt. On a write of 1, the mask of the interrupt is set. A write of 0 clears the
-        /// mask.
+        /// interrupt.
+        ///
+        /// - On a write of 1, the mask of the UARTRTINTR interrupt is set.
+        /// - A write of 0 clears the mask.
         RTIM OFFSET(6) NUMBITS(1) [
             Disabled = 0,
             Enabled = 1
         ],
 
-        /// Receive interrupt mask. A read returns the current mask for the UARTRXINTR interrupt. On
-        /// a write of 1, the mask of the interrupt is set. A write of 0 clears the mask.
+        /// Receive interrupt mask. A read returns the current mask for the UARTRXINTR interrupt.
+        ///
+        /// - On a write of 1, the mask of the UARTRXINTR interrupt is set.
+        /// - A write of 0 clears the mask.
         RXIM OFFSET(4) NUMBITS(1) [
             Disabled = 0,
             Enabled = 1
         ]
     ],
 
-    /// Masked Interrupt Status Register
+    /// Masked Interrupt Status Register.
     MIS [
         /// Receive timeout masked interrupt status. Returns the masked interrupt state of the
         /// UARTRTINTR interrupt.
@@ -154,9 +184,9 @@ register_bitfields! {
         RXMIS OFFSET(4) NUMBITS(1) []
     ],
 
-    /// Interrupt Clear Register
+    /// Interrupt Clear Register.
     ICR [
-        /// Meta field for all pending interrupts
+        /// Meta field for all pending interrupts.
         ALL OFFSET(0) NUMBITS(11) []
     ]
 }
@@ -170,7 +200,7 @@ register_structs! {
         (0x1c => _reserved2),
         (0x24 => IBRD: WriteOnly<u32, IBRD::Register>),
         (0x28 => FBRD: WriteOnly<u32, FBRD::Register>),
-        (0x2c => LCRH: WriteOnly<u32, LCRH::Register>),
+        (0x2c => LCR_H: WriteOnly<u32, LCR_H::Register>),
         (0x30 => CR: WriteOnly<u32, CR::Register>),
         (0x34 => IFLS: ReadWrite<u32, IFLS::Register>),
         (0x38 => IMSC: ReadWrite<u32, IMSC::Register>),
@@ -234,11 +264,18 @@ impl PL011UartInner {
     /// This results in 8N1 and 921_600 baud.
     ///
     /// The calculation for the BRD is (we set the clock to 48 MHz in config.txt):
-    /// `(48_000_000 / 16) / 921_600 = 3.2552083`. `3` goes to the `IBRD` (integer field).
+    /// `(48_000_000 / 16) / 921_600 = 3.2552083`.
+    ///
+    /// This means the integer part is `3` and goes into the `IBRD`.
+    /// The fractional part is `0.2552083`.
+    ///
+    /// `FBRD` calculation according to the PL011 Technical Reference Manual:
+    /// `INTEGER((0.2552083 * 64) + 0.5) = 16`.
     ///
-    /// The `FBRD` (fractional field) is only 6 bits so `0.2552083 * 64 = 16.3 rounded to 16` will
-    /// give the best approximation we can get. A 5% error margin is acceptable for UART and we're
-    /// now at 0.02%.
+    /// Therefore, the generated baud rate divider is: `3 + 16/64 = 3.25`. Which results in a
+    /// genrated baud rate of `48_000_000 / (16 * 3.25) = 923_077`.
+    ///
+    /// Error = `((923_077 - 921_600) / 921_600) * 100 = 0.16%`.
     ///
     /// # Safety
     ///
@@ -264,14 +301,18 @@ impl PL011UartInner {
         // Clear all pending interrupts.
         self.registers.ICR.write(ICR::ALL::CLEAR);
 
-        // Set the baud rate.
-        self.registers.IBRD.write(IBRD::IBRD.val(3));
-        self.registers.FBRD.write(FBRD::FBRD.val(16));
-
-        // Set 8N1 + FIFO on.
+        // From the PL011 Technical Reference Manual:
+        //
+        // The LCR_H, IBRD, and FBRD registers form the single 30-bit wide LCR Register that is
+        // updated on a single write strobe generated by a LCR_H write. So, to internally update the
+        // contents of IBRD or FBRD, a LCR_H write must always be performed at the end.
+        //
+        // Set the baud rate, 8N1 and FIFO enabled.
+        self.registers.IBRD.write(IBRD::BAUD_DIVINT.val(3));
+        self.registers.FBRD.write(FBRD::BAUD_DIVFRAC.val(16));
         self.registers
-            .LCRH
-            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled);
+            .LCR_H
+            .write(LCR_H::WLEN::EightBit + LCR_H::FEN::FifosEnabled);
 
         // Set RX FIFO fill level at 1/8.
         self.registers.IFLS.write(IFLS::RXIFLSEL::OneEigth);
@@ -304,22 +345,10 @@ impl PL011UartInner {
 
     /// Block execution until the last buffered character has been physically put on the TX wire.
     fn flush(&self) {
-        use crate::{time, time::interface::TimeManager};
-        use core::time::Duration;
-
-        // The bit time for 921_600 baud is 1 / 921_600 = 1.09 µs. 8N1 has a total of 10 bits per
-        // symbol (start bit, 8 data bits, stop bit), so one symbol takes round about 10 * 1.09 =
-        // 10.9 µs, or 10_900 ns. Round it up to 12_000 ns to be on the safe side.
-        const CHAR_TIME_SAFE: Duration = Duration::from_nanos(12_000);
-
-        // Spin until TX FIFO empty is set.
-        while !self.registers.FR.matches_all(FR::TXFE::SET) {
+        // Spin until the busy bit is cleared.
+        while self.registers.FR.matches_all(FR::BUSY::SET) {
             cpu::nop();
         }
-
-        // After the last character has been queued for transmission, wait for the time of one
-        // character + some extra time for safety.
-        time::time_manager().spin_for(CHAR_TIME_SAFE);
     }
 
     /// Retrieve a character.
diff --git a/X1_JTAG_boot/jtag_boot_rpi3.img b/X1_JTAG_boot/jtag_boot_rpi3.img
index 6fe154299791b169e5b4fbfa9e85d0b734d27d9b..9f8ada21812d7d7772028c6bfed45c182479b457 100755
GIT binary patch
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diff --git a/X1_JTAG_boot/jtag_boot_rpi4.img b/X1_JTAG_boot/jtag_boot_rpi4.img
index d5573467fe56c7dfe6f5289a4c6d98bee8e3ed6c..e9d7e7ddde04a9b940c72fac1745384b4231845f 100755
GIT binary patch
delta 1548
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MGlCgmU&UYf2j-f!{{R30

delta 2418
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zliq6+bFwQa)$_uH=N&dJt_<C!a=LIg>3sZgtLrtJcr^Q2u_|XC17Vxkob&vDwAcAX

diff --git a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 876aa461d..ce39752d1 100644
--- a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -3,6 +3,11 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
+//!
+//! # Resources
+//!
+//! - https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
+//! - https://developer.arm.com/documentation/ddi0183/latest
 
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, synchronization,
@@ -17,50 +22,63 @@ use register::{mmio::*, register_bitfields, register_structs};
 
 // PL011 UART registers.
 //
-// Descriptions taken from
-// https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
+// Descriptions taken from "PrimeCell UART (PL011) Technical Reference Manual" r1p5.
 register_bitfields! {
     u32,
 
-    /// Flag Register
+    /// Flag Register.
     FR [
         /// Transmit FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-        /// Line Control Register, UARTLCR_ LCRH.
+        /// Line Control Register, LCR_H.
         ///
-        /// If the FIFO is disabled, this bit is set when the transmit holding register is empty. If
-        /// the FIFO is enabled, the TXFE bit is set when the transmit FIFO is empty. This bit does
-        /// not indicate if there is data in the transmit shift register.
+        /// - If the FIFO is disabled, this bit is set when the transmit holding register is empty.
+        /// - If the FIFO is enabled, the TXFE bit is set when the transmit FIFO is empty.
+        /// - This bit does not indicate if there is data in the transmit shift register.
         TXFE OFFSET(7) NUMBITS(1) [],
 
         /// Transmit FIFO full. The meaning of this bit depends on the state of the FEN bit in the
-        /// UARTLCR_ LCRH Register.
+        /// LCR_H Register.
         ///
-        /// If the FIFO is disabled, this bit is set when the transmit holding register is full. If
-        /// the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
+        /// - If the FIFO is disabled, this bit is set when the transmit holding register is full.
+        /// - If the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
         TXFF OFFSET(5) NUMBITS(1) [],
 
         /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-        /// UARTLCR_H Register.
+        /// LCR_H Register.
         ///
         /// If the FIFO is disabled, this bit is set when the receive holding register is empty. If
         /// the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
-        RXFE OFFSET(4) NUMBITS(1) []
+
+        /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
+        /// LCR_H Register.
+        ///
+        /// - If the FIFO is disabled, this bit is set when the receive holding register is empty.
+        /// - If the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
+        RXFE OFFSET(4) NUMBITS(1) [],
+
+        /// UART busy. If this bit is set to 1, the UART is busy transmitting data. This bit remains
+        /// set until the complete byte, including all the stop bits, has been sent from the shift
+        /// register.
+        ///
+        /// This bit is set as soon as the transmit FIFO becomes non-empty, regardless of whether
+        /// the UART is enabled or not.
+        BUSY OFFSET(3) NUMBITS(1) []
     ],
 
-    /// Integer Baud rate divisor
+    /// Integer Baud Rate Divisor.
     IBRD [
-        /// Integer Baud rate divisor
-        IBRD OFFSET(0) NUMBITS(16) []
+        /// The integer baud rate divisor.
+        BAUD_DIVINT OFFSET(0) NUMBITS(16) []
     ],
 
-    /// Fractional Baud rate divisor
+    /// Fractional Baud Rate Divisor.
     FBRD [
-        /// Fractional Baud rate divisor
-        FBRD OFFSET(0) NUMBITS(6) []
+        ///  The fractional baud rate divisor.
+        BAUD_DIVFRAC OFFSET(0) NUMBITS(6) []
     ],
 
-    /// Line Control register
-    LCRH [
+    /// Line Control Register.
+    LCR_H [
         /// Word length. These bits indicate the number of data bits transmitted or received in a
         /// frame.
         WLEN OFFSET(5) NUMBITS(2) [
@@ -73,34 +91,42 @@ register_bitfields! {
         /// Enable FIFOs:
         ///
         /// 0 = FIFOs are disabled (character mode) that is, the FIFOs become 1-byte-deep holding
-        /// registers
+        /// registers.
         ///
-        /// 1 = transmit and receive FIFO buffers are enabled (FIFO mode).
+        /// 1 = Transmit and receive FIFO buffers are enabled (FIFO mode).
         FEN  OFFSET(4) NUMBITS(1) [
             FifosDisabled = 0,
             FifosEnabled = 1
         ]
     ],
 
-    /// Control Register
+    /// Control Register.
     CR [
         /// Receive enable. If this bit is set to 1, the receive section of the UART is enabled.
-        /// Data reception occurs for UART signals. When the UART is disabled in the middle of
-        /// reception, it completes the current character before stopping.
-        RXE    OFFSET(9) NUMBITS(1) [
+        /// Data reception occurs for either UART signals or SIR signals depending on the setting of
+        /// the SIREN bit. When the UART is disabled in the middle of reception, it completes the
+        /// current character before stopping.
+        RXE OFFSET(9) NUMBITS(1) [
             Disabled = 0,
             Enabled = 1
         ],
 
         /// Transmit enable. If this bit is set to 1, the transmit section of the UART is enabled.
-        /// Data transmission occurs for UART signals. When the UART is disabled in the middle of
-        /// transmission, it completes the current character before stopping.
-        TXE    OFFSET(8) NUMBITS(1) [
+        /// Data transmission occurs for either UART signals, or SIR signals depending on the
+        /// setting of the SIREN bit. When the UART is disabled in the middle of transmission, it
+        /// completes the current character before stopping.
+        TXE OFFSET(8) NUMBITS(1) [
             Disabled = 0,
             Enabled = 1
         ],
 
-        /// UART enable
+        /// UART enable:
+        ///
+        /// 0 = UART is disabled. If the UART is disabled in the middle of transmission or
+        /// reception, it completes the current character before stopping.
+        ///
+        /// 1 = The UART is enabled. Data transmission and reception occurs for either UART signals
+        /// or SIR signals depending on the setting of the SIREN bit
         UARTEN OFFSET(0) NUMBITS(1) [
             /// If the UART is disabled in the middle of transmission or reception, it completes the
             /// current character before stopping.
@@ -109,9 +135,9 @@ register_bitfields! {
         ]
     ],
 
-    /// Interrupt Clear Register
+    /// Interrupt Clear Register.
     ICR [
-        /// Meta field for all pending interrupts
+        /// Meta field for all pending interrupts.
         ALL OFFSET(0) NUMBITS(11) []
     ]
 }
@@ -125,7 +151,7 @@ register_structs! {
         (0x1c => _reserved2),
         (0x24 => IBRD: WriteOnly<u32, IBRD::Register>),
         (0x28 => FBRD: WriteOnly<u32, FBRD::Register>),
-        (0x2c => LCRH: WriteOnly<u32, LCRH::Register>),
+        (0x2c => LCR_H: WriteOnly<u32, LCR_H::Register>),
         (0x30 => CR: WriteOnly<u32, CR::Register>),
         (0x34 => _reserved3),
         (0x44 => ICR: WriteOnly<u32, ICR::Register>),
@@ -183,11 +209,18 @@ impl PL011UartInner {
     /// This results in 8N1 and 921_600 baud.
     ///
     /// The calculation for the BRD is (we set the clock to 48 MHz in config.txt):
-    /// `(48_000_000 / 16) / 921_600 = 3.2552083`. `3` goes to the `IBRD` (integer field).
+    /// `(48_000_000 / 16) / 921_600 = 3.2552083`.
+    ///
+    /// This means the integer part is `3` and goes into the `IBRD`.
+    /// The fractional part is `0.2552083`.
     ///
-    /// The `FBRD` (fractional field) is only 6 bits so `0.2552083 * 64 = 16.3 rounded to 16` will
-    /// give the best approximation we can get. A 5% error margin is acceptable for UART and we're
-    /// now at 0.02%.
+    /// `FBRD` calculation according to the PL011 Technical Reference Manual:
+    /// `INTEGER((0.2552083 * 64) + 0.5) = 16`.
+    ///
+    /// Therefore, the generated baud rate divider is: `3 + 16/64 = 3.25`. Which results in a
+    /// genrated baud rate of `48_000_000 / (16 * 3.25) = 923_077`.
+    ///
+    /// Error = `((923_077 - 921_600) / 921_600) * 100 = 0.16%`.
     pub fn init(&mut self) {
         // Execution can arrive here while there are still characters queued in the TX FIFO and
         // actively being sent out by the UART hardware. If the UART is turned off in this case,
@@ -205,14 +238,18 @@ impl PL011UartInner {
         // Clear all pending interrupts.
         self.registers.ICR.write(ICR::ALL::CLEAR);
 
-        // Set the baud rate.
-        self.registers.IBRD.write(IBRD::IBRD.val(3));
-        self.registers.FBRD.write(FBRD::FBRD.val(16));
-
-        // Set 8N1 + FIFO on.
+        // From the PL011 Technical Reference Manual:
+        //
+        // The LCR_H, IBRD, and FBRD registers form the single 30-bit wide LCR Register that is
+        // updated on a single write strobe generated by a LCR_H write. So, to internally update the
+        // contents of IBRD or FBRD, a LCR_H write must always be performed at the end.
+        //
+        // Set the baud rate, 8N1 and FIFO enabled.
+        self.registers.IBRD.write(IBRD::BAUD_DIVINT.val(3));
+        self.registers.FBRD.write(FBRD::BAUD_DIVFRAC.val(16));
         self.registers
-            .LCRH
-            .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled);
+            .LCR_H
+            .write(LCR_H::WLEN::EightBit + LCR_H::FEN::FifosEnabled);
 
         // Turn the UART on.
         self.registers
@@ -235,22 +272,10 @@ impl PL011UartInner {
 
     /// Block execution until the last buffered character has been physically put on the TX wire.
     fn flush(&self) {
-        use crate::{time, time::interface::TimeManager};
-        use core::time::Duration;
-
-        // The bit time for 921_600 baud is 1 / 921_600 = 1.09 µs. 8N1 has a total of 10 bits per
-        // symbol (start bit, 8 data bits, stop bit), so one symbol takes round about 10 * 1.09 =
-        // 10.9 µs, or 10_900 ns. Round it up to 12_000 ns to be on the safe side.
-        const CHAR_TIME_SAFE: Duration = Duration::from_nanos(12_000);
-
-        // Spin until TX FIFO empty is set.
-        while !self.registers.FR.matches_all(FR::TXFE::SET) {
+        // Spin until the busy bit is cleared.
+        while self.registers.FR.matches_all(FR::BUSY::SET) {
             cpu::nop();
         }
-
-        // After the last character has been queued for transmission, wait for the time of one
-        // character + some extra time for safety.
-        time::time_manager().spin_for(CHAR_TIME_SAFE);
     }
 
     /// Retrieve a character.

From dc9b3c0f381f1747eb8020e069649033606342b9 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Fri, 29 Jan 2021 22:26:45 +0100
Subject: [PATCH 026/214] Add isb before timer read

---
 08_timestamps/README.md                       |  19 +++++++++++++++---
 08_timestamps/src/_arch/aarch64/time.rs       |  17 ++++++++++++++--
 09_hw_debug_JTAG/src/_arch/aarch64/time.rs    |  17 ++++++++++++++--
 10_privilege_level/src/_arch/aarch64/time.rs  |  17 ++++++++++++++--
 .../src/_arch/aarch64/time.rs                 |  17 ++++++++++++++--
 .../src/_arch/aarch64/time.rs                 |  17 ++++++++++++++--
 .../src/_arch/aarch64/time.rs                 |  17 ++++++++++++++--
 .../src/_arch/aarch64/time.rs                 |  17 ++++++++++++++--
 .../src/_arch/aarch64/time.rs                 |  17 ++++++++++++++--
 X1_JTAG_boot/jtag_boot_rpi3.img               | Bin 8144 -> 8144 bytes
 X1_JTAG_boot/jtag_boot_rpi4.img               | Bin 6848 -> 6864 bytes
 X1_JTAG_boot/src/_arch/aarch64/time.rs        |  17 ++++++++++++++--
 12 files changed, 151 insertions(+), 21 deletions(-)

diff --git a/08_timestamps/README.md b/08_timestamps/README.md
index 83e38ca53..0f8ec5d2a 100644
--- a/08_timestamps/README.md
+++ b/08_timestamps/README.md
@@ -175,7 +175,7 @@ diff -uNr 07_uart_chainloader/src/_arch/aarch64/cpu.rs 08_timestamps/src/_arch/a
 diff -uNr 07_uart_chainloader/src/_arch/aarch64/time.rs 08_timestamps/src/_arch/aarch64/time.rs
 --- 07_uart_chainloader/src/_arch/aarch64/time.rs
 +++ 08_timestamps/src/_arch/aarch64/time.rs
-@@ -0,0 +1,105 @@
+@@ -0,0 +1,118 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -191,7 +191,7 @@ diff -uNr 07_uart_chainloader/src/_arch/aarch64/time.rs 08_timestamps/src/_arch/
 +
 +use crate::{time, warn};
 +use core::time::Duration;
-+use cortex_a::regs::*;
++use cortex_a::{barrier, regs::*};
 +
 +//--------------------------------------------------------------------------------------------------
 +// Private Definitions
@@ -209,6 +209,19 @@ diff -uNr 07_uart_chainloader/src/_arch/aarch64/time.rs 08_timestamps/src/_arch/
 +static TIME_MANAGER: GenericTimer = GenericTimer;
 +
 +//--------------------------------------------------------------------------------------------------
++// Private Code
++//--------------------------------------------------------------------------------------------------
++
++impl GenericTimer {
++    #[inline(always)]
++    fn read_cntpct(&self) -> u64 {
++        // Prevent that the counter is read ahead of time due to out-of-order execution.
++        unsafe { barrier::isb(barrier::SY) };
++        CNTPCT_EL0.get()
++    }
++}
++
++//--------------------------------------------------------------------------------------------------
 +// Public Code
 +//--------------------------------------------------------------------------------------------------
 +
@@ -227,8 +240,8 @@ diff -uNr 07_uart_chainloader/src/_arch/aarch64/time.rs 08_timestamps/src/_arch/
 +    }
 +
 +    fn uptime(&self) -> Duration {
++        let current_count: u64 = self.read_cntpct() * NS_PER_S;
 +        let frq: u64 = CNTFRQ_EL0.get() as u64;
-+        let current_count: u64 = CNTPCT_EL0.get() * NS_PER_S;
 +
 +        Duration::from_nanos(current_count / frq)
 +    }
diff --git a/08_timestamps/src/_arch/aarch64/time.rs b/08_timestamps/src/_arch/aarch64/time.rs
index 3a766009d..63017305b 100644
--- a/08_timestamps/src/_arch/aarch64/time.rs
+++ b/08_timestamps/src/_arch/aarch64/time.rs
@@ -13,7 +13,7 @@
 
 use crate::{time, warn};
 use core::time::Duration;
-use cortex_a::regs::*;
+use cortex_a::{barrier, regs::*};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -30,6 +30,19 @@ struct GenericTimer;
 
 static TIME_MANAGER: GenericTimer = GenericTimer;
 
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl GenericTimer {
+    #[inline(always)]
+    fn read_cntpct(&self) -> u64 {
+        // Prevent that the counter is read ahead of time due to out-of-order execution.
+        unsafe { barrier::isb(barrier::SY) };
+        CNTPCT_EL0.get()
+    }
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -49,8 +62,8 @@ impl time::interface::TimeManager for GenericTimer {
     }
 
     fn uptime(&self) -> Duration {
+        let current_count: u64 = self.read_cntpct() * NS_PER_S;
         let frq: u64 = CNTFRQ_EL0.get() as u64;
-        let current_count: u64 = CNTPCT_EL0.get() * NS_PER_S;
 
         Duration::from_nanos(current_count / frq)
     }
diff --git a/09_hw_debug_JTAG/src/_arch/aarch64/time.rs b/09_hw_debug_JTAG/src/_arch/aarch64/time.rs
index 3a766009d..63017305b 100644
--- a/09_hw_debug_JTAG/src/_arch/aarch64/time.rs
+++ b/09_hw_debug_JTAG/src/_arch/aarch64/time.rs
@@ -13,7 +13,7 @@
 
 use crate::{time, warn};
 use core::time::Duration;
-use cortex_a::regs::*;
+use cortex_a::{barrier, regs::*};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -30,6 +30,19 @@ struct GenericTimer;
 
 static TIME_MANAGER: GenericTimer = GenericTimer;
 
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl GenericTimer {
+    #[inline(always)]
+    fn read_cntpct(&self) -> u64 {
+        // Prevent that the counter is read ahead of time due to out-of-order execution.
+        unsafe { barrier::isb(barrier::SY) };
+        CNTPCT_EL0.get()
+    }
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -49,8 +62,8 @@ impl time::interface::TimeManager for GenericTimer {
     }
 
     fn uptime(&self) -> Duration {
+        let current_count: u64 = self.read_cntpct() * NS_PER_S;
         let frq: u64 = CNTFRQ_EL0.get() as u64;
-        let current_count: u64 = CNTPCT_EL0.get() * NS_PER_S;
 
         Duration::from_nanos(current_count / frq)
     }
diff --git a/10_privilege_level/src/_arch/aarch64/time.rs b/10_privilege_level/src/_arch/aarch64/time.rs
index 3a766009d..63017305b 100644
--- a/10_privilege_level/src/_arch/aarch64/time.rs
+++ b/10_privilege_level/src/_arch/aarch64/time.rs
@@ -13,7 +13,7 @@
 
 use crate::{time, warn};
 use core::time::Duration;
-use cortex_a::regs::*;
+use cortex_a::{barrier, regs::*};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -30,6 +30,19 @@ struct GenericTimer;
 
 static TIME_MANAGER: GenericTimer = GenericTimer;
 
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl GenericTimer {
+    #[inline(always)]
+    fn read_cntpct(&self) -> u64 {
+        // Prevent that the counter is read ahead of time due to out-of-order execution.
+        unsafe { barrier::isb(barrier::SY) };
+        CNTPCT_EL0.get()
+    }
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -49,8 +62,8 @@ impl time::interface::TimeManager for GenericTimer {
     }
 
     fn uptime(&self) -> Duration {
+        let current_count: u64 = self.read_cntpct() * NS_PER_S;
         let frq: u64 = CNTFRQ_EL0.get() as u64;
-        let current_count: u64 = CNTPCT_EL0.get() * NS_PER_S;
 
         Duration::from_nanos(current_count / frq)
     }
diff --git a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs
index 3a766009d..63017305b 100644
--- a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs
@@ -13,7 +13,7 @@
 
 use crate::{time, warn};
 use core::time::Duration;
-use cortex_a::regs::*;
+use cortex_a::{barrier, regs::*};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -30,6 +30,19 @@ struct GenericTimer;
 
 static TIME_MANAGER: GenericTimer = GenericTimer;
 
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl GenericTimer {
+    #[inline(always)]
+    fn read_cntpct(&self) -> u64 {
+        // Prevent that the counter is read ahead of time due to out-of-order execution.
+        unsafe { barrier::isb(barrier::SY) };
+        CNTPCT_EL0.get()
+    }
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -49,8 +62,8 @@ impl time::interface::TimeManager for GenericTimer {
     }
 
     fn uptime(&self) -> Duration {
+        let current_count: u64 = self.read_cntpct() * NS_PER_S;
         let frq: u64 = CNTFRQ_EL0.get() as u64;
-        let current_count: u64 = CNTPCT_EL0.get() * NS_PER_S;
 
         Duration::from_nanos(current_count / frq)
     }
diff --git a/12_exceptions_part1_groundwork/src/_arch/aarch64/time.rs b/12_exceptions_part1_groundwork/src/_arch/aarch64/time.rs
index 3a766009d..63017305b 100644
--- a/12_exceptions_part1_groundwork/src/_arch/aarch64/time.rs
+++ b/12_exceptions_part1_groundwork/src/_arch/aarch64/time.rs
@@ -13,7 +13,7 @@
 
 use crate::{time, warn};
 use core::time::Duration;
-use cortex_a::regs::*;
+use cortex_a::{barrier, regs::*};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -30,6 +30,19 @@ struct GenericTimer;
 
 static TIME_MANAGER: GenericTimer = GenericTimer;
 
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl GenericTimer {
+    #[inline(always)]
+    fn read_cntpct(&self) -> u64 {
+        // Prevent that the counter is read ahead of time due to out-of-order execution.
+        unsafe { barrier::isb(barrier::SY) };
+        CNTPCT_EL0.get()
+    }
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -49,8 +62,8 @@ impl time::interface::TimeManager for GenericTimer {
     }
 
     fn uptime(&self) -> Duration {
+        let current_count: u64 = self.read_cntpct() * NS_PER_S;
         let frq: u64 = CNTFRQ_EL0.get() as u64;
-        let current_count: u64 = CNTPCT_EL0.get() * NS_PER_S;
 
         Duration::from_nanos(current_count / frq)
     }
diff --git a/13_integrated_testing/src/_arch/aarch64/time.rs b/13_integrated_testing/src/_arch/aarch64/time.rs
index 3a766009d..63017305b 100644
--- a/13_integrated_testing/src/_arch/aarch64/time.rs
+++ b/13_integrated_testing/src/_arch/aarch64/time.rs
@@ -13,7 +13,7 @@
 
 use crate::{time, warn};
 use core::time::Duration;
-use cortex_a::regs::*;
+use cortex_a::{barrier, regs::*};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -30,6 +30,19 @@ struct GenericTimer;
 
 static TIME_MANAGER: GenericTimer = GenericTimer;
 
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl GenericTimer {
+    #[inline(always)]
+    fn read_cntpct(&self) -> u64 {
+        // Prevent that the counter is read ahead of time due to out-of-order execution.
+        unsafe { barrier::isb(barrier::SY) };
+        CNTPCT_EL0.get()
+    }
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -49,8 +62,8 @@ impl time::interface::TimeManager for GenericTimer {
     }
 
     fn uptime(&self) -> Duration {
+        let current_count: u64 = self.read_cntpct() * NS_PER_S;
         let frq: u64 = CNTFRQ_EL0.get() as u64;
-        let current_count: u64 = CNTPCT_EL0.get() * NS_PER_S;
 
         Duration::from_nanos(current_count / frq)
     }
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/time.rs b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/time.rs
index 3a766009d..63017305b 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/time.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/time.rs
@@ -13,7 +13,7 @@
 
 use crate::{time, warn};
 use core::time::Duration;
-use cortex_a::regs::*;
+use cortex_a::{barrier, regs::*};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -30,6 +30,19 @@ struct GenericTimer;
 
 static TIME_MANAGER: GenericTimer = GenericTimer;
 
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl GenericTimer {
+    #[inline(always)]
+    fn read_cntpct(&self) -> u64 {
+        // Prevent that the counter is read ahead of time due to out-of-order execution.
+        unsafe { barrier::isb(barrier::SY) };
+        CNTPCT_EL0.get()
+    }
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -49,8 +62,8 @@ impl time::interface::TimeManager for GenericTimer {
     }
 
     fn uptime(&self) -> Duration {
+        let current_count: u64 = self.read_cntpct() * NS_PER_S;
         let frq: u64 = CNTFRQ_EL0.get() as u64;
-        let current_count: u64 = CNTPCT_EL0.get() * NS_PER_S;
 
         Duration::from_nanos(current_count / frq)
     }
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/time.rs b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/time.rs
index 3a766009d..63017305b 100644
--- a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/time.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/time.rs
@@ -13,7 +13,7 @@
 
 use crate::{time, warn};
 use core::time::Duration;
-use cortex_a::regs::*;
+use cortex_a::{barrier, regs::*};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -30,6 +30,19 @@ struct GenericTimer;
 
 static TIME_MANAGER: GenericTimer = GenericTimer;
 
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl GenericTimer {
+    #[inline(always)]
+    fn read_cntpct(&self) -> u64 {
+        // Prevent that the counter is read ahead of time due to out-of-order execution.
+        unsafe { barrier::isb(barrier::SY) };
+        CNTPCT_EL0.get()
+    }
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -49,8 +62,8 @@ impl time::interface::TimeManager for GenericTimer {
     }
 
     fn uptime(&self) -> Duration {
+        let current_count: u64 = self.read_cntpct() * NS_PER_S;
         let frq: u64 = CNTFRQ_EL0.get() as u64;
-        let current_count: u64 = CNTPCT_EL0.get() * NS_PER_S;
 
         Duration::from_nanos(current_count / frq)
     }
diff --git a/X1_JTAG_boot/jtag_boot_rpi3.img b/X1_JTAG_boot/jtag_boot_rpi3.img
index 9f8ada21812d7d7772028c6bfed45c182479b457..4cd4401535b2b3cb1f5cbf807c72b1f69637cedd 100755
GIT binary patch
delta 236
zcmca$f5Co&3?utQ+0%@dH@=K#WUSuo$@G{{NP&YP<i0)gRjmisS2=;WQ)IH0;61ig
z|Nc)uz&Tk?NX}^y149Tm1H*(@3=KiqJGCZqFffR4A2>G2yZHI1ct-BmoSYE(Qy}?;
zS`%NdW>^U_Q5$F)7Z7K0O^y;e#}*4TvEkcfJz*uL8~-NH5)P7K02;~!#0(A^6BU^o
zf}9R$O#Jiv|8xZgg)5Wa2&)J>{r^8b<CgnRPKFsloHH4A+D%pzac8_eIa6diqsU}M
aQE5()J(@r}I5s<q{%2uy+3YCQ&k6uTj#{h$

delta 265
zcmca$f5Co&3?s)x+0%?yHolB!WUSfj$@G|ykAZ_Bg!6&*RV^US6q;-&c+Y9|zyH%0
za4?wu3wHSV|1i_U1I+Q)v}!qKb2`in@+@9n6wk={`VmkYHv_|jR}2k7**mo+zFy6+
zk_%{rHV|iVPHqx9$B_;)=KFt>$pK=rzKfYAJ_7O;7!<B>A2>G2yZHI1ct-BmFBu`m
zoB|oM5Y?Dh-~Ml909wHW#0(A^6BU^of}9R$Oyv7Bxk@-_@(W=VLC639r)S)9|H;WP
tBZzY*!%o}DvLfz`w<f2GY-bdnEGsI_$^mqb=4MCH|16B=n;oV4SphXEZ3h4V

diff --git a/X1_JTAG_boot/jtag_boot_rpi4.img b/X1_JTAG_boot/jtag_boot_rpi4.img
index e9d7e7ddde04a9b940c72fac1745384b4231845f..c753511524cbbc8a737fb914a5a7469ed49ea7e4 100755
GIT binary patch
delta 960
zcmZ8g-%C?b9RHr(ZQbcmr<?nswhhgB)gDU4!HQi=3!{e|QUuYk9}oQiY5%~kXhik0
z!!dkSqF_E5d(nqtAwj*AgX|%~wxU?{U_J!RYNzkL_ax;P4&U?roX_{?IVV4`Hjrs0
z&mXnbT58s;FiQZI!dmX2rH2reotJKr68kL0EX2o>_4nAa^|8CuL6s>lEk~YYi+f16
zC;^>fw{548`PLREV{F5|mqqOl$WU&>-eMyYx$RnRv4mUL&$<g3D3`3iOo+msHK=5s
z*<C?7AErbDI?eXGPP(?-7}}aGW7ryi%!#M$jw{%!w$kEJpqsz=TnIw1PXo+aaOrz4
zSqjw{RNlv>b)^_vms!De-BIeMb?E+bh#hO}Aww+HIGEO&Y4IbWA0$Gjt9(u+FpvyM
z>zs2hAQzyEV$jSHt&4^wEpb>RGtP<~RKl~1T06C(o`DV{&V)@%e8*UNA$ckJM#eM8
z*^x@OO<lQb)e=`d?!ImttjLI6alm52@d;LR;$N~n)I%NUq@a!y`KyD#xRG#JF^efG
zbOHkfL@_(uoA5*Dzu<iQ5;qIrtE5ovgUT01o7|+p9yX=P6zg;coqFf@vGY}+t!&Ia
zlU~3}1T9gHNLjsP884Nmaq4MX7N0;StUI)W;qdJ@pPS$2{r`<&exEspP^ZDs$8b%I
z0YI(1t8y=nc~Q2i_(0^vGTMfJK0*o65^UVl+lIi7D9{Om&<}RNDWf=Z)Dt12Q9oAq
zkBoXv8?VWbkyL6jg}Xk1Hw%0>uZt0H{6N%adYdT#V#3Cb4cVRT5WC^s3@-&tuZ&<X
z3wv4EPDVYx29HTPC$y7geG%eh1z!-q&KB-V%<qqzh_WWya*4#cR&nJ8UN7)hY{5V2
Uii(7Ofey29;5f;!D}ghA0D_wcQUCw|

delta 961
zcmZ8fO-vI(6n@if>lO^S*s^T_+ooW<EgldE8WLGFL?s@yfyl{%hKnH~>A}Q{T?odg
zmre%5wT&^Mc!AV|Jt!q=j2D$eJeWv|MuU1FUW`TU`gV6T%1d_Nyf@$Xe&=O(sXNn5
zo-Vc2+G<|dVU_?ahSb7ATbvMJ=Y(q{$36<ZwiTHr>u<69_6P1<D^>bsx*2(xFYhAx
zvH(<L*Bz%3`Nq*lB)0C{#|}B~5K>roHaSSBuwAR$Y#V;|qwYKgDkSU235l{NdsH&Y
zoKis4LX>Dgr`ZANl(gZ-(DwW$hOGg}3{J5dQXmS=w0sQc)=zyd2*Fpw0JApyjI%D-
zR;#^G5zD=63R{yVT)7ynL+W$F1{<&scB!E!tv1r~dqUp{gw9m;Ih8<nGAOL+x-J7^
zp%kGQFmqIm(vYAfj_^e0UAC19cy~b!Q#<OJQrL_$=Fk$~FqTn7Nl3mH@y>N-pb~Sa
z#hZ35ana-Mj5(kvqA%@&g@o$^6b;}Xut?(6g(L-a9}&N}2n?AC?TS@QR-t1UsEHTz
z7kd@H8~A6sJ~Xad1?Z2+YPAz8pRpiOm`;d~ms3F}+%q`w6*s%P_X_D}F?V3MF^Sta
ziAO+N*syyhJ%$SfEwLF9@<t0HE?7_F2GWi^K8H-mAcVmreEp@*Ww-UN|Hd-fW{suX
zW@3!7Oz^P)sFk->UB<C5h;|hpi@5L!ZIiD>C?Q&cjd<E61@=P^bb%9a(kNmf=ZTP$
zQ6E<Hj~tdQ8&_q@Kq@tv!c&<08@Ycc&dVgZuOsTU*j5UFIJdD&Q+8%+XH)W4DC@Ua
z8b{A_d!E}O%Xwt!gvUaSa4oW;H$p_V;SJ!Q_#$MLDL&kq;ZaJwFNtS1w2I#%_t$g(
YGF$RZN>QHC$GttQ!+)G;?6UvtZ#~ur2LJ#7

diff --git a/X1_JTAG_boot/src/_arch/aarch64/time.rs b/X1_JTAG_boot/src/_arch/aarch64/time.rs
index 3a766009d..63017305b 100644
--- a/X1_JTAG_boot/src/_arch/aarch64/time.rs
+++ b/X1_JTAG_boot/src/_arch/aarch64/time.rs
@@ -13,7 +13,7 @@
 
 use crate::{time, warn};
 use core::time::Duration;
-use cortex_a::regs::*;
+use cortex_a::{barrier, regs::*};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -30,6 +30,19 @@ struct GenericTimer;
 
 static TIME_MANAGER: GenericTimer = GenericTimer;
 
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl GenericTimer {
+    #[inline(always)]
+    fn read_cntpct(&self) -> u64 {
+        // Prevent that the counter is read ahead of time due to out-of-order execution.
+        unsafe { barrier::isb(barrier::SY) };
+        CNTPCT_EL0.get()
+    }
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -49,8 +62,8 @@ impl time::interface::TimeManager for GenericTimer {
     }
 
     fn uptime(&self) -> Duration {
+        let current_count: u64 = self.read_cntpct() * NS_PER_S;
         let frq: u64 = CNTFRQ_EL0.get() as u64;
-        let current_count: u64 = CNTPCT_EL0.get() * NS_PER_S;
 
         Duration::from_nanos(current_count / frq)
     }

From a5884321a717f0f4f9252cbcc0f7df84b92bc119 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Fri, 29 Jan 2021 22:30:02 +0100
Subject: [PATCH 027/214] Fix rustdoc warnings

---
 01_wait_forever/src/main.rs                   |  4 +++-
 02_runtime_init/README.md                     |  9 ++++++---
 02_runtime_init/src/main.rs                   |  5 ++++-
 03_hacky_hello_world/README.md                | 16 +++++++--------
 03_hacky_hello_world/src/main.rs              |  1 +
 03_hacky_hello_world/src/print.rs             |  4 ++--
 04_zero_overhead_abstraction/README.md        |  6 +++---
 04_zero_overhead_abstraction/src/main.rs      |  1 +
 04_zero_overhead_abstraction/src/print.rs     |  4 ++--
 05_safe_globals/README.md                     | 17 ++++++++--------
 05_safe_globals/src/main.rs                   |  1 +
 05_safe_globals/src/print.rs                  |  4 ++--
 05_safe_globals/src/synchronization.rs        |  9 +++++----
 06_drivers_gpio_uart/README.md                | 14 ++++++-------
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  4 ++--
 06_drivers_gpio_uart/src/main.rs              |  1 +
 06_drivers_gpio_uart/src/panic_wait.rs        |  2 +-
 06_drivers_gpio_uart/src/print.rs             |  4 ++--
 06_drivers_gpio_uart/src/synchronization.rs   |  9 +++++----
 07_uart_chainloader/README.md                 |  8 +++++---
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  4 ++--
 07_uart_chainloader/src/main.rs               |  2 ++
 07_uart_chainloader/src/panic_wait.rs         |  2 +-
 07_uart_chainloader/src/print.rs              |  4 ++--
 07_uart_chainloader/src/synchronization.rs    |  9 +++++----
 08_timestamps/README.md                       |  8 +++++---
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  4 ++--
 08_timestamps/src/main.rs                     |  1 +
 08_timestamps/src/panic_wait.rs               |  2 +-
 08_timestamps/src/print.rs                    |  4 ++--
 08_timestamps/src/synchronization.rs          |  9 +++++----
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  4 ++--
 09_hw_debug_JTAG/src/main.rs                  |  1 +
 09_hw_debug_JTAG/src/panic_wait.rs            |  2 +-
 09_hw_debug_JTAG/src/print.rs                 |  4 ++--
 09_hw_debug_JTAG/src/synchronization.rs       |  9 +++++----
 10_privilege_level/README.md                  |  6 +++---
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  4 ++--
 10_privilege_level/src/main.rs                |  1 +
 10_privilege_level/src/panic_wait.rs          |  2 +-
 10_privilege_level/src/print.rs               |  4 ++--
 10_privilege_level/src/synchronization.rs     |  9 +++++----
 .../README.md                                 | 10 +++++-----
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  4 ++--
 .../src/main.rs                               |  1 +
 .../src/panic_wait.rs                         |  2 +-
 .../src/print.rs                              |  4 ++--
 .../src/synchronization.rs                    |  9 +++++----
 12_exceptions_part1_groundwork/README.md      |  6 +++---
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  4 ++--
 12_exceptions_part1_groundwork/src/main.rs    |  1 +
 .../src/panic_wait.rs                         |  2 +-
 12_exceptions_part1_groundwork/src/print.rs   |  4 ++--
 .../src/synchronization.rs                    |  9 +++++----
 13_integrated_testing/README.md               | 14 +++++++------
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  4 ++--
 13_integrated_testing/src/lib.rs              |  1 +
 13_integrated_testing/src/panic_wait.rs       |  2 +-
 13_integrated_testing/src/print.rs            |  4 ++--
 13_integrated_testing/src/synchronization.rs  |  9 +++++----
 14_exceptions_part2_peripheral_IRQs/README.md | 20 +++++++++----------
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  4 ++--
 .../src/exception/asynchronous.rs             |  2 +-
 .../src/lib.rs                                |  1 +
 .../src/panic_wait.rs                         |  2 +-
 .../src/print.rs                              |  4 ++--
 .../src/synchronization.rs                    |  9 +++++----
 15_virtual_mem_part2_mmio_remap/README.md     |  6 +++---
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  4 ++--
 .../src/exception/asynchronous.rs             |  2 +-
 15_virtual_mem_part2_mmio_remap/src/lib.rs    |  1 +
 .../src/panic_wait.rs                         |  2 +-
 15_virtual_mem_part2_mmio_remap/src/print.rs  |  4 ++--
 .../src/synchronization.rs                    |  9 +++++----
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  4 ++--
 X1_JTAG_boot/src/main.rs                      |  1 +
 X1_JTAG_boot/src/panic_wait.rs                |  2 +-
 X1_JTAG_boot/src/print.rs                     |  4 ++--
 X1_JTAG_boot/src/synchronization.rs           |  9 +++++----
 79 files changed, 220 insertions(+), 178 deletions(-)

diff --git a/01_wait_forever/src/main.rs b/01_wait_forever/src/main.rs
index 10cf6bb42..8cd4b1441 100644
--- a/01_wait_forever/src/main.rs
+++ b/01_wait_forever/src/main.rs
@@ -100,8 +100,10 @@
 //!
 //! # Boot flow
 //!
-//! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
+//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
 //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.S`.
+//!
+//! [`cpu::boot::arch_boot::_start()`]: ../src/kernel/cpu/up/_arch/aarch64/cpu/boot.rs.html
 
 #![feature(asm)]
 #![feature(global_asm)]
diff --git a/02_runtime_init/README.md b/02_runtime_init/README.md
index 7948aae4a..50cce8798 100644
--- a/02_runtime_init/README.md
+++ b/02_runtime_init/README.md
@@ -199,15 +199,18 @@ diff -uNr 01_wait_forever/src/cpu.rs 02_runtime_init/src/cpu.rs
 diff -uNr 01_wait_forever/src/main.rs 02_runtime_init/src/main.rs
 --- 01_wait_forever/src/main.rs
 +++ 02_runtime_init/src/main.rs
-@@ -102,6 +102,7 @@
+@@ -102,8 +102,10 @@
  //!
- //! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
+ //! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
  //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.S`.
 +//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
+ //!
+ //! [`cpu::boot::arch_boot::_start()`]: ../src/kernel/cpu/up/_arch/aarch64/cpu/boot.rs.html
++//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
  #![feature(asm)]
  #![feature(global_asm)]
-@@ -110,6 +111,15 @@
+@@ -112,6 +114,15 @@
 
  mod bsp;
  mod cpu;
diff --git a/02_runtime_init/src/main.rs b/02_runtime_init/src/main.rs
index ba5a877c7..fd9c36bc3 100644
--- a/02_runtime_init/src/main.rs
+++ b/02_runtime_init/src/main.rs
@@ -100,9 +100,12 @@
 //!
 //! # Boot flow
 //!
-//! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
+//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
 //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.S`.
 //! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
+//!
+//! [`cpu::boot::arch_boot::_start()`]: ../src/kernel/cpu/up/_arch/aarch64/cpu/boot.rs.html
+//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
 #![feature(asm)]
 #![feature(global_asm)]
diff --git a/03_hacky_hello_world/README.md b/03_hacky_hello_world/README.md
index 11c804bff..c8dc66cc7 100644
--- a/03_hacky_hello_world/README.md
+++ b/03_hacky_hello_world/README.md
@@ -139,17 +139,17 @@ diff -uNr 02_runtime_init/src/console.rs 03_hacky_hello_world/src/console.rs
 diff -uNr 02_runtime_init/src/main.rs 03_hacky_hello_world/src/main.rs
 --- 02_runtime_init/src/main.rs
 +++ 03_hacky_hello_world/src/main.rs
-@@ -100,19 +100,25 @@
- //!
+@@ -101,21 +101,25 @@
  //! # Boot flow
  //!
--//! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
+ //! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
 -//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.S`.
-+//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
 +//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
  //! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
-+//!
+ //!
+-//! [`cpu::boot::arch_boot::_start()`]: ../src/kernel/cpu/up/_arch/aarch64/cpu/boot.rs.html
 +//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
+ //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
  #![feature(asm)]
 +#![feature(format_args_nl)]
@@ -167,7 +167,7 @@ diff -uNr 02_runtime_init/src/main.rs 03_hacky_hello_world/src/main.rs
  mod runtime_init;
 
  /// Early init code.
-@@ -121,5 +127,7 @@
+@@ -124,5 +128,7 @@
  ///
  /// - Only a single core must be active and running this function.
  unsafe fn kernel_init() -> ! {
@@ -226,7 +226,7 @@ diff -uNr 02_runtime_init/src/print.rs 03_hacky_hello_world/src/print.rs
 +
 +/// Prints without a newline.
 +///
-+/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
++/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 +#[macro_export]
 +macro_rules! print {
 +    ($($arg:tt)*) => ($crate::print::_print(format_args!($($arg)*)));
@@ -234,7 +234,7 @@ diff -uNr 02_runtime_init/src/print.rs 03_hacky_hello_world/src/print.rs
 +
 +/// Prints with a newline.
 +///
-+/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
++/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 +#[macro_export]
 +macro_rules! println {
 +    () => ($crate::print!("\n"));
diff --git a/03_hacky_hello_world/src/main.rs b/03_hacky_hello_world/src/main.rs
index 378e0bafb..0815d5e21 100644
--- a/03_hacky_hello_world/src/main.rs
+++ b/03_hacky_hello_world/src/main.rs
@@ -105,6 +105,7 @@
 //! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
 //!
 //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
+//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
 #![feature(asm)]
 #![feature(format_args_nl)]
diff --git a/03_hacky_hello_world/src/print.rs b/03_hacky_hello_world/src/print.rs
index fa6451c75..8ea5db240 100644
--- a/03_hacky_hello_world/src/print.rs
+++ b/03_hacky_hello_world/src/print.rs
@@ -20,7 +20,7 @@ pub fn _print(args: fmt::Arguments) {
 
 /// Prints without a newline.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! print {
     ($($arg:tt)*) => ($crate::print::_print(format_args!($($arg)*)));
@@ -28,7 +28,7 @@ macro_rules! print {
 
 /// Prints with a newline.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! println {
     () => ($crate::print!("\n"));
diff --git a/04_zero_overhead_abstraction/README.md b/04_zero_overhead_abstraction/README.md
index 6c9ad70c4..d20758d1c 100644
--- a/04_zero_overhead_abstraction/README.md
+++ b/04_zero_overhead_abstraction/README.md
@@ -242,9 +242,9 @@ diff -uNr 03_hacky_hello_world/src/cpu.rs 04_zero_overhead_abstraction/src/cpu.r
 diff -uNr 03_hacky_hello_world/src/main.rs 04_zero_overhead_abstraction/src/main.rs
 --- 03_hacky_hello_world/src/main.rs
 +++ 04_zero_overhead_abstraction/src/main.rs
-@@ -106,9 +106,7 @@
- //!
+@@ -107,9 +107,7 @@
  //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
+ //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
 -#![feature(asm)]
  #![feature(format_args_nl)]
@@ -252,7 +252,7 @@ diff -uNr 03_hacky_hello_world/src/main.rs 04_zero_overhead_abstraction/src/main
  #![feature(panic_info_message)]
  #![no_main]
  #![no_std]
-@@ -127,7 +125,8 @@
+@@ -128,7 +126,8 @@
  ///
  /// - Only a single core must be active and running this function.
  unsafe fn kernel_init() -> ! {
diff --git a/04_zero_overhead_abstraction/src/main.rs b/04_zero_overhead_abstraction/src/main.rs
index 7de836fe5..9dfc7d007 100644
--- a/04_zero_overhead_abstraction/src/main.rs
+++ b/04_zero_overhead_abstraction/src/main.rs
@@ -105,6 +105,7 @@
 //! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
 //!
 //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
+//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
 #![feature(format_args_nl)]
 #![feature(panic_info_message)]
diff --git a/04_zero_overhead_abstraction/src/print.rs b/04_zero_overhead_abstraction/src/print.rs
index fa6451c75..8ea5db240 100644
--- a/04_zero_overhead_abstraction/src/print.rs
+++ b/04_zero_overhead_abstraction/src/print.rs
@@ -20,7 +20,7 @@ pub fn _print(args: fmt::Arguments) {
 
 /// Prints without a newline.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! print {
     ($($arg:tt)*) => ($crate::print::_print(format_args!($($arg)*)));
@@ -28,7 +28,7 @@ macro_rules! print {
 
 /// Prints with a newline.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! println {
     () => ($crate::print!("\n"));
diff --git a/05_safe_globals/README.md b/05_safe_globals/README.md
index 3db54d6be..ea61489e2 100644
--- a/05_safe_globals/README.md
+++ b/05_safe_globals/README.md
@@ -211,7 +211,7 @@ diff -uNr 04_zero_overhead_abstraction/src/console.rs 05_safe_globals/src/consol
 diff -uNr 04_zero_overhead_abstraction/src/main.rs 05_safe_globals/src/main.rs
 --- 04_zero_overhead_abstraction/src/main.rs
 +++ 05_safe_globals/src/main.rs
-@@ -108,6 +108,7 @@
+@@ -109,6 +109,7 @@
 
  #![feature(format_args_nl)]
  #![feature(panic_info_message)]
@@ -219,7 +219,7 @@ diff -uNr 04_zero_overhead_abstraction/src/main.rs 05_safe_globals/src/main.rs
  #![no_main]
  #![no_std]
 
-@@ -118,6 +119,7 @@
+@@ -119,6 +120,7 @@
  mod panic_wait;
  mod print;
  mod runtime_init;
@@ -227,7 +227,7 @@ diff -uNr 04_zero_overhead_abstraction/src/main.rs 05_safe_globals/src/main.rs
 
  /// Early init code.
  ///
-@@ -125,8 +127,15 @@
+@@ -126,8 +128,15 @@
  ///
  /// - Only a single core must be active and running this function.
  unsafe fn kernel_init() -> ! {
@@ -248,17 +248,18 @@ diff -uNr 04_zero_overhead_abstraction/src/main.rs 05_safe_globals/src/main.rs
 diff -uNr 04_zero_overhead_abstraction/src/synchronization.rs 05_safe_globals/src/synchronization.rs
 --- 04_zero_overhead_abstraction/src/synchronization.rs
 +++ 05_safe_globals/src/synchronization.rs
-@@ -0,0 +1,76 @@
+@@ -0,0 +1,77 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Synchronization primitives.
 +//!
-+//! Suggested literature:
-+//!   - https://doc.rust-lang.org/book/ch16-04-extensible-concurrency-sync-and-send.html
-+//!   - https://stackoverflow.com/questions/59428096/understanding-the-send-trait
-+//!   - https://doc.rust-lang.org/std/cell/index.html
++//! # Resources
++//!
++//!   - <https://doc.rust-lang.org/book/ch16-04-extensible-concurrency-sync-and-send.html>
++//!   - <https://stackoverflow.com/questions/59428096/understanding-the-send-trait>
++//!   - <https://doc.rust-lang.org/std/cell/index.html>
 +
 +use core::cell::UnsafeCell;
 +
diff --git a/05_safe_globals/src/main.rs b/05_safe_globals/src/main.rs
index bb6abcb82..839558158 100644
--- a/05_safe_globals/src/main.rs
+++ b/05_safe_globals/src/main.rs
@@ -105,6 +105,7 @@
 //! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
 //!
 //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
+//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
 #![feature(format_args_nl)]
 #![feature(panic_info_message)]
diff --git a/05_safe_globals/src/print.rs b/05_safe_globals/src/print.rs
index fa6451c75..8ea5db240 100644
--- a/05_safe_globals/src/print.rs
+++ b/05_safe_globals/src/print.rs
@@ -20,7 +20,7 @@ pub fn _print(args: fmt::Arguments) {
 
 /// Prints without a newline.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! print {
     ($($arg:tt)*) => ($crate::print::_print(format_args!($($arg)*)));
@@ -28,7 +28,7 @@ macro_rules! print {
 
 /// Prints with a newline.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! println {
     () => ($crate::print!("\n"));
diff --git a/05_safe_globals/src/synchronization.rs b/05_safe_globals/src/synchronization.rs
index f956b5cdd..7bb2938be 100644
--- a/05_safe_globals/src/synchronization.rs
+++ b/05_safe_globals/src/synchronization.rs
@@ -4,10 +4,11 @@
 
 //! Synchronization primitives.
 //!
-//! Suggested literature:
-//!   - https://doc.rust-lang.org/book/ch16-04-extensible-concurrency-sync-and-send.html
-//!   - https://stackoverflow.com/questions/59428096/understanding-the-send-trait
-//!   - https://doc.rust-lang.org/std/cell/index.html
+//! # Resources
+//!
+//!   - <https://doc.rust-lang.org/book/ch16-04-extensible-concurrency-sync-and-send.html>
+//!   - <https://stackoverflow.com/questions/59428096/understanding-the-send-trait>
+//!   - <https://doc.rust-lang.org/std/cell/index.html>
 
 use core::cell::UnsafeCell;
 
diff --git a/06_drivers_gpio_uart/README.md b/06_drivers_gpio_uart/README.md
index 9b526c331..9bb29be51 100644
--- a/06_drivers_gpio_uart/README.md
+++ b/06_drivers_gpio_uart/README.md
@@ -445,8 +445,8 @@ diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 06_dri
 +//!
 +//! # Resources
 +//!
-+//! - https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
-+//! - https://developer.arm.com/documentation/ddi0183/latest
++//! - <https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf>
++//! - <https://developer.arm.com/documentation/ddi0183/latest>
 +
 +use crate::{
 +    bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, synchronization,
@@ -1302,15 +1302,15 @@ diff -uNr 05_safe_globals/src/driver.rs 06_drivers_gpio_uart/src/driver.rs
 diff -uNr 05_safe_globals/src/main.rs 06_drivers_gpio_uart/src/main.rs
 --- 05_safe_globals/src/main.rs
 +++ 06_drivers_gpio_uart/src/main.rs
-@@ -106,6 +106,7 @@
- //!
+@@ -107,6 +107,7 @@
  //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
+ //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
 +#![feature(const_fn_fn_ptr_basics)]
  #![feature(format_args_nl)]
  #![feature(panic_info_message)]
  #![feature(trait_alias)]
-@@ -115,6 +116,7 @@
+@@ -116,6 +117,7 @@
  mod bsp;
  mod console;
  mod cpu;
@@ -1318,7 +1318,7 @@ diff -uNr 05_safe_globals/src/main.rs 06_drivers_gpio_uart/src/main.rs
  mod memory;
  mod panic_wait;
  mod print;
-@@ -126,16 +128,49 @@
+@@ -127,16 +129,49 @@
  /// # Safety
  ///
  /// - Only a single core must be active and running this function.
@@ -1398,7 +1398,7 @@ diff -uNr 05_safe_globals/src/panic_wait.rs 06_drivers_gpio_uart/src/panic_wait.
 +
 +/// Prints with a newline - only use from the panic handler.
 +///
-+/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
++/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 +#[macro_export]
 +macro_rules! panic_println {
 +    ($($arg:tt)*) => ({
diff --git a/06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index ce39752d1..d2aae4d24 100644
--- a/06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -6,8 +6,8 @@
 //!
 //! # Resources
 //!
-//! - https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
-//! - https://developer.arm.com/documentation/ddi0183/latest
+//! - <https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf>
+//! - <https://developer.arm.com/documentation/ddi0183/latest>
 
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, synchronization,
diff --git a/06_drivers_gpio_uart/src/main.rs b/06_drivers_gpio_uart/src/main.rs
index a16c0de7b..46a890312 100644
--- a/06_drivers_gpio_uart/src/main.rs
+++ b/06_drivers_gpio_uart/src/main.rs
@@ -105,6 +105,7 @@
 //! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
 //!
 //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
+//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
diff --git a/06_drivers_gpio_uart/src/panic_wait.rs b/06_drivers_gpio_uart/src/panic_wait.rs
index 7980f5de5..66fbe6b40 100644
--- a/06_drivers_gpio_uart/src/panic_wait.rs
+++ b/06_drivers_gpio_uart/src/panic_wait.rs
@@ -19,7 +19,7 @@ fn _panic_print(args: fmt::Arguments) {
 
 /// Prints with a newline - only use from the panic handler.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! panic_println {
     ($($arg:tt)*) => ({
diff --git a/06_drivers_gpio_uart/src/print.rs b/06_drivers_gpio_uart/src/print.rs
index fa6451c75..8ea5db240 100644
--- a/06_drivers_gpio_uart/src/print.rs
+++ b/06_drivers_gpio_uart/src/print.rs
@@ -20,7 +20,7 @@ pub fn _print(args: fmt::Arguments) {
 
 /// Prints without a newline.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! print {
     ($($arg:tt)*) => ($crate::print::_print(format_args!($($arg)*)));
@@ -28,7 +28,7 @@ macro_rules! print {
 
 /// Prints with a newline.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! println {
     () => ($crate::print!("\n"));
diff --git a/06_drivers_gpio_uart/src/synchronization.rs b/06_drivers_gpio_uart/src/synchronization.rs
index f956b5cdd..7bb2938be 100644
--- a/06_drivers_gpio_uart/src/synchronization.rs
+++ b/06_drivers_gpio_uart/src/synchronization.rs
@@ -4,10 +4,11 @@
 
 //! Synchronization primitives.
 //!
-//! Suggested literature:
-//!   - https://doc.rust-lang.org/book/ch16-04-extensible-concurrency-sync-and-send.html
-//!   - https://stackoverflow.com/questions/59428096/understanding-the-send-trait
-//!   - https://doc.rust-lang.org/std/cell/index.html
+//! # Resources
+//!
+//!   - <https://doc.rust-lang.org/book/ch16-04-extensible-concurrency-sync-and-send.html>
+//!   - <https://stackoverflow.com/questions/59428096/understanding-the-send-trait>
+//!   - <https://doc.rust-lang.org/std/cell/index.html>
 
 use core::cell::UnsafeCell;
 
diff --git a/07_uart_chainloader/README.md b/07_uart_chainloader/README.md
index 1cca2b122..4cf6d918d 100644
--- a/07_uart_chainloader/README.md
+++ b/07_uart_chainloader/README.md
@@ -406,7 +406,7 @@ diff -uNr 06_drivers_gpio_uart/src/cpu.rs 07_uart_chainloader/src/cpu.rs
 diff -uNr 06_drivers_gpio_uart/src/main.rs 07_uart_chainloader/src/main.rs
 --- 06_drivers_gpio_uart/src/main.rs
 +++ 07_uart_chainloader/src/main.rs
-@@ -102,11 +102,14 @@
+@@ -102,12 +102,16 @@
  //!
  //! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
  //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
@@ -415,6 +415,8 @@ diff -uNr 06_drivers_gpio_uart/src/main.rs 07_uart_chainloader/src/main.rs
 +//! 3. Finally, [`runtime_init::runtime_init()`] is called.
  //!
  //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
++//! [`relocate::relocate_self()`]: relocate/fn.relocate_self.html
+ //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
 +#![feature(asm)]
  #![feature(const_fn_fn_ptr_basics)]
@@ -422,7 +424,7 @@ diff -uNr 06_drivers_gpio_uart/src/main.rs 07_uart_chainloader/src/main.rs
  #![feature(format_args_nl)]
  #![feature(panic_info_message)]
  #![feature(trait_alias)]
-@@ -120,6 +123,7 @@
+@@ -121,6 +125,7 @@
  mod memory;
  mod panic_wait;
  mod print;
@@ -430,7 +432,7 @@ diff -uNr 06_drivers_gpio_uart/src/main.rs 07_uart_chainloader/src/main.rs
  mod runtime_init;
  mod synchronization;
 
-@@ -148,29 +152,49 @@
+@@ -149,29 +154,49 @@
  fn kernel_main() -> ! {
      use bsp::console::console;
      use console::interface::All;
diff --git a/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index f21395d36..17ca3543b 100644
--- a/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -6,8 +6,8 @@
 //!
 //! # Resources
 //!
-//! - https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
-//! - https://developer.arm.com/documentation/ddi0183/latest
+//! - <https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf>
+//! - <https://developer.arm.com/documentation/ddi0183/latest>
 
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, synchronization,
diff --git a/07_uart_chainloader/src/main.rs b/07_uart_chainloader/src/main.rs
index fdb787b56..82a6ec589 100644
--- a/07_uart_chainloader/src/main.rs
+++ b/07_uart_chainloader/src/main.rs
@@ -106,6 +106,8 @@
 //! 3. Finally, [`runtime_init::runtime_init()`] is called.
 //!
 //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
+//! [`relocate::relocate_self()`]: relocate/fn.relocate_self.html
+//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
 #![feature(asm)]
 #![feature(const_fn_fn_ptr_basics)]
diff --git a/07_uart_chainloader/src/panic_wait.rs b/07_uart_chainloader/src/panic_wait.rs
index 7980f5de5..66fbe6b40 100644
--- a/07_uart_chainloader/src/panic_wait.rs
+++ b/07_uart_chainloader/src/panic_wait.rs
@@ -19,7 +19,7 @@ fn _panic_print(args: fmt::Arguments) {
 
 /// Prints with a newline - only use from the panic handler.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! panic_println {
     ($($arg:tt)*) => ({
diff --git a/07_uart_chainloader/src/print.rs b/07_uart_chainloader/src/print.rs
index fa6451c75..8ea5db240 100644
--- a/07_uart_chainloader/src/print.rs
+++ b/07_uart_chainloader/src/print.rs
@@ -20,7 +20,7 @@ pub fn _print(args: fmt::Arguments) {
 
 /// Prints without a newline.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! print {
     ($($arg:tt)*) => ($crate::print::_print(format_args!($($arg)*)));
@@ -28,7 +28,7 @@ macro_rules! print {
 
 /// Prints with a newline.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! println {
     () => ($crate::print!("\n"));
diff --git a/07_uart_chainloader/src/synchronization.rs b/07_uart_chainloader/src/synchronization.rs
index f956b5cdd..7bb2938be 100644
--- a/07_uart_chainloader/src/synchronization.rs
+++ b/07_uart_chainloader/src/synchronization.rs
@@ -4,10 +4,11 @@
 
 //! Synchronization primitives.
 //!
-//! Suggested literature:
-//!   - https://doc.rust-lang.org/book/ch16-04-extensible-concurrency-sync-and-send.html
-//!   - https://stackoverflow.com/questions/59428096/understanding-the-send-trait
-//!   - https://doc.rust-lang.org/std/cell/index.html
+//! # Resources
+//!
+//!   - <https://doc.rust-lang.org/book/ch16-04-extensible-concurrency-sync-and-send.html>
+//!   - <https://stackoverflow.com/questions/59428096/understanding-the-send-trait>
+//!   - <https://doc.rust-lang.org/std/cell/index.html>
 
 use core::cell::UnsafeCell;
 
diff --git a/08_timestamps/README.md b/08_timestamps/README.md
index 0f8ec5d2a..af4b80559 100644
--- a/08_timestamps/README.md
+++ b/08_timestamps/README.md
@@ -499,7 +499,7 @@ diff -uNr 07_uart_chainloader/src/cpu.rs 08_timestamps/src/cpu.rs
 diff -uNr 07_uart_chainloader/src/main.rs 08_timestamps/src/main.rs
 --- 07_uart_chainloader/src/main.rs
 +++ 08_timestamps/src/main.rs
-@@ -102,14 +102,11 @@
+@@ -102,16 +102,12 @@
  //!
  //! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
  //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
@@ -508,6 +508,8 @@ diff -uNr 07_uart_chainloader/src/main.rs 08_timestamps/src/main.rs
 +//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
  //!
  //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
+-//! [`relocate::relocate_self()`]: relocate/fn.relocate_self.html
+ //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
 -#![feature(asm)]
  #![feature(const_fn_fn_ptr_basics)]
@@ -515,7 +517,7 @@ diff -uNr 07_uart_chainloader/src/main.rs 08_timestamps/src/main.rs
  #![feature(format_args_nl)]
  #![feature(panic_info_message)]
  #![feature(trait_alias)]
-@@ -123,9 +120,9 @@
+@@ -125,9 +121,9 @@
  mod memory;
  mod panic_wait;
  mod print;
@@ -526,7 +528,7 @@ diff -uNr 07_uart_chainloader/src/main.rs 08_timestamps/src/main.rs
 
  /// Early init code.
  ///
-@@ -150,51 +147,31 @@
+@@ -152,51 +148,31 @@
 
  /// The main function running after the early init.
  fn kernel_main() -> ! {
diff --git a/08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index ce39752d1..d2aae4d24 100644
--- a/08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -6,8 +6,8 @@
 //!
 //! # Resources
 //!
-//! - https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
-//! - https://developer.arm.com/documentation/ddi0183/latest
+//! - <https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf>
+//! - <https://developer.arm.com/documentation/ddi0183/latest>
 
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, synchronization,
diff --git a/08_timestamps/src/main.rs b/08_timestamps/src/main.rs
index 5a7b9f550..efcd98807 100644
--- a/08_timestamps/src/main.rs
+++ b/08_timestamps/src/main.rs
@@ -105,6 +105,7 @@
 //! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
 //!
 //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
+//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
diff --git a/08_timestamps/src/panic_wait.rs b/08_timestamps/src/panic_wait.rs
index 7980f5de5..66fbe6b40 100644
--- a/08_timestamps/src/panic_wait.rs
+++ b/08_timestamps/src/panic_wait.rs
@@ -19,7 +19,7 @@ fn _panic_print(args: fmt::Arguments) {
 
 /// Prints with a newline - only use from the panic handler.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! panic_println {
     ($($arg:tt)*) => ({
diff --git a/08_timestamps/src/print.rs b/08_timestamps/src/print.rs
index 5a5638113..89fa66943 100644
--- a/08_timestamps/src/print.rs
+++ b/08_timestamps/src/print.rs
@@ -20,7 +20,7 @@ pub fn _print(args: fmt::Arguments) {
 
 /// Prints without a newline.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! print {
     ($($arg:tt)*) => ($crate::print::_print(format_args!($($arg)*)));
@@ -28,7 +28,7 @@ macro_rules! print {
 
 /// Prints with a newline.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! println {
     () => ($crate::print!("\n"));
diff --git a/08_timestamps/src/synchronization.rs b/08_timestamps/src/synchronization.rs
index f956b5cdd..7bb2938be 100644
--- a/08_timestamps/src/synchronization.rs
+++ b/08_timestamps/src/synchronization.rs
@@ -4,10 +4,11 @@
 
 //! Synchronization primitives.
 //!
-//! Suggested literature:
-//!   - https://doc.rust-lang.org/book/ch16-04-extensible-concurrency-sync-and-send.html
-//!   - https://stackoverflow.com/questions/59428096/understanding-the-send-trait
-//!   - https://doc.rust-lang.org/std/cell/index.html
+//! # Resources
+//!
+//!   - <https://doc.rust-lang.org/book/ch16-04-extensible-concurrency-sync-and-send.html>
+//!   - <https://stackoverflow.com/questions/59428096/understanding-the-send-trait>
+//!   - <https://doc.rust-lang.org/std/cell/index.html>
 
 use core::cell::UnsafeCell;
 
diff --git a/09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index ce39752d1..d2aae4d24 100644
--- a/09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -6,8 +6,8 @@
 //!
 //! # Resources
 //!
-//! - https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
-//! - https://developer.arm.com/documentation/ddi0183/latest
+//! - <https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf>
+//! - <https://developer.arm.com/documentation/ddi0183/latest>
 
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, synchronization,
diff --git a/09_hw_debug_JTAG/src/main.rs b/09_hw_debug_JTAG/src/main.rs
index 5a7b9f550..efcd98807 100644
--- a/09_hw_debug_JTAG/src/main.rs
+++ b/09_hw_debug_JTAG/src/main.rs
@@ -105,6 +105,7 @@
 //! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
 //!
 //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
+//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
diff --git a/09_hw_debug_JTAG/src/panic_wait.rs b/09_hw_debug_JTAG/src/panic_wait.rs
index 7980f5de5..66fbe6b40 100644
--- a/09_hw_debug_JTAG/src/panic_wait.rs
+++ b/09_hw_debug_JTAG/src/panic_wait.rs
@@ -19,7 +19,7 @@ fn _panic_print(args: fmt::Arguments) {
 
 /// Prints with a newline - only use from the panic handler.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! panic_println {
     ($($arg:tt)*) => ({
diff --git a/09_hw_debug_JTAG/src/print.rs b/09_hw_debug_JTAG/src/print.rs
index 5a5638113..89fa66943 100644
--- a/09_hw_debug_JTAG/src/print.rs
+++ b/09_hw_debug_JTAG/src/print.rs
@@ -20,7 +20,7 @@ pub fn _print(args: fmt::Arguments) {
 
 /// Prints without a newline.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! print {
     ($($arg:tt)*) => ($crate::print::_print(format_args!($($arg)*)));
@@ -28,7 +28,7 @@ macro_rules! print {
 
 /// Prints with a newline.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! println {
     () => ($crate::print!("\n"));
diff --git a/09_hw_debug_JTAG/src/synchronization.rs b/09_hw_debug_JTAG/src/synchronization.rs
index f956b5cdd..7bb2938be 100644
--- a/09_hw_debug_JTAG/src/synchronization.rs
+++ b/09_hw_debug_JTAG/src/synchronization.rs
@@ -4,10 +4,11 @@
 
 //! Synchronization primitives.
 //!
-//! Suggested literature:
-//!   - https://doc.rust-lang.org/book/ch16-04-extensible-concurrency-sync-and-send.html
-//!   - https://stackoverflow.com/questions/59428096/understanding-the-send-trait
-//!   - https://doc.rust-lang.org/std/cell/index.html
+//! # Resources
+//!
+//!   - <https://doc.rust-lang.org/book/ch16-04-extensible-concurrency-sync-and-send.html>
+//!   - <https://stackoverflow.com/questions/59428096/understanding-the-send-trait>
+//!   - <https://doc.rust-lang.org/std/cell/index.html>
 
 use core::cell::UnsafeCell;
 
diff --git a/10_privilege_level/README.md b/10_privilege_level/README.md
index 2556ec993..2e88c083b 100644
--- a/10_privilege_level/README.md
+++ b/10_privilege_level/README.md
@@ -484,7 +484,7 @@ diff -uNr 09_hw_debug_JTAG/src/exception.rs 10_privilege_level/src/exception.rs
 diff -uNr 09_hw_debug_JTAG/src/main.rs 10_privilege_level/src/main.rs
 --- 09_hw_debug_JTAG/src/main.rs
 +++ 10_privilege_level/src/main.rs
-@@ -117,6 +117,7 @@
+@@ -118,6 +118,7 @@
  mod console;
  mod cpu;
  mod driver;
@@ -492,7 +492,7 @@ diff -uNr 09_hw_debug_JTAG/src/main.rs 10_privilege_level/src/main.rs
  mod memory;
  mod panic_wait;
  mod print;
-@@ -147,12 +148,20 @@
+@@ -148,12 +149,20 @@
 
  /// The main function running after the early init.
  fn kernel_main() -> ! {
@@ -513,7 +513,7 @@ diff -uNr 09_hw_debug_JTAG/src/main.rs 10_privilege_level/src/main.rs
      info!(
          "Architectural timer resolution: {} ns",
          time::time_manager().resolution().as_nanos()
-@@ -167,11 +176,15 @@
+@@ -168,11 +177,15 @@
          info!("      {}. {}", i + 1, driver.compatible());
      }
 
diff --git a/10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index ce39752d1..d2aae4d24 100644
--- a/10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -6,8 +6,8 @@
 //!
 //! # Resources
 //!
-//! - https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
-//! - https://developer.arm.com/documentation/ddi0183/latest
+//! - <https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf>
+//! - <https://developer.arm.com/documentation/ddi0183/latest>
 
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, synchronization,
diff --git a/10_privilege_level/src/main.rs b/10_privilege_level/src/main.rs
index 741883437..193ff7a63 100644
--- a/10_privilege_level/src/main.rs
+++ b/10_privilege_level/src/main.rs
@@ -105,6 +105,7 @@
 //! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
 //!
 //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
+//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
diff --git a/10_privilege_level/src/panic_wait.rs b/10_privilege_level/src/panic_wait.rs
index 7980f5de5..66fbe6b40 100644
--- a/10_privilege_level/src/panic_wait.rs
+++ b/10_privilege_level/src/panic_wait.rs
@@ -19,7 +19,7 @@ fn _panic_print(args: fmt::Arguments) {
 
 /// Prints with a newline - only use from the panic handler.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! panic_println {
     ($($arg:tt)*) => ({
diff --git a/10_privilege_level/src/print.rs b/10_privilege_level/src/print.rs
index 5a5638113..89fa66943 100644
--- a/10_privilege_level/src/print.rs
+++ b/10_privilege_level/src/print.rs
@@ -20,7 +20,7 @@ pub fn _print(args: fmt::Arguments) {
 
 /// Prints without a newline.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! print {
     ($($arg:tt)*) => ($crate::print::_print(format_args!($($arg)*)));
@@ -28,7 +28,7 @@ macro_rules! print {
 
 /// Prints with a newline.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! println {
     () => ($crate::print!("\n"));
diff --git a/10_privilege_level/src/synchronization.rs b/10_privilege_level/src/synchronization.rs
index f956b5cdd..7bb2938be 100644
--- a/10_privilege_level/src/synchronization.rs
+++ b/10_privilege_level/src/synchronization.rs
@@ -4,10 +4,11 @@
 
 //! Synchronization primitives.
 //!
-//! Suggested literature:
-//!   - https://doc.rust-lang.org/book/ch16-04-extensible-concurrency-sync-and-send.html
-//!   - https://stackoverflow.com/questions/59428096/understanding-the-send-trait
-//!   - https://doc.rust-lang.org/std/cell/index.html
+//! # Resources
+//!
+//!   - <https://doc.rust-lang.org/book/ch16-04-extensible-concurrency-sync-and-send.html>
+//!   - <https://stackoverflow.com/questions/59428096/understanding-the-send-trait>
+//!   - <https://doc.rust-lang.org/std/cell/index.html>
 
 use core::cell::UnsafeCell;
 
diff --git a/11_virtual_mem_part1_identity_mapping/README.md b/11_virtual_mem_part1_identity_mapping/README.md
index 0d24f17fb..726012e13 100644
--- a/11_virtual_mem_part1_identity_mapping/README.md
+++ b/11_virtual_mem_part1_identity_mapping/README.md
@@ -1006,9 +1006,9 @@ diff -uNr 10_privilege_level/src/bsp.rs 11_virtual_mem_part1_identity_mapping/sr
 diff -uNr 10_privilege_level/src/main.rs 11_virtual_mem_part1_identity_mapping/src/main.rs
 --- 10_privilege_level/src/main.rs
 +++ 11_virtual_mem_part1_identity_mapping/src/main.rs
-@@ -106,7 +106,10 @@
- //!
+@@ -107,7 +107,10 @@
  //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
+ //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
 +#![allow(incomplete_features)]
  #![feature(const_fn_fn_ptr_basics)]
@@ -1017,7 +1017,7 @@ diff -uNr 10_privilege_level/src/main.rs 11_virtual_mem_part1_identity_mapping/s
  #![feature(format_args_nl)]
  #![feature(panic_info_message)]
  #![feature(trait_alias)]
-@@ -130,9 +133,18 @@
+@@ -131,9 +134,18 @@
  /// # Safety
  ///
  /// - Only a single core must be active and running this function.
@@ -1037,7 +1037,7 @@ diff -uNr 10_privilege_level/src/main.rs 11_virtual_mem_part1_identity_mapping/s
 
      for i in bsp::driver::driver_manager().all_device_drivers().iter() {
          if let Err(x) = i.init() {
-@@ -156,6 +168,9 @@
+@@ -157,6 +169,9 @@
 
      info!("Booting on: {}", bsp::board_name());
 
@@ -1047,7 +1047,7 @@ diff -uNr 10_privilege_level/src/main.rs 11_virtual_mem_part1_identity_mapping/s
      let (_, privilege_level) = exception::current_privilege_level();
      info!("Current privilege level: {}", privilege_level);
 
-@@ -179,6 +194,13 @@
+@@ -180,6 +195,13 @@
      info!("Timer test, spinning for 1 second");
      time::time_manager().spin_for(Duration::from_secs(1));
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index ce39752d1..d2aae4d24 100644
--- a/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -6,8 +6,8 @@
 //!
 //! # Resources
 //!
-//! - https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
-//! - https://developer.arm.com/documentation/ddi0183/latest
+//! - <https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf>
+//! - <https://developer.arm.com/documentation/ddi0183/latest>
 
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, synchronization,
diff --git a/11_virtual_mem_part1_identity_mapping/src/main.rs b/11_virtual_mem_part1_identity_mapping/src/main.rs
index 83ee1de57..bfc7d5e42 100644
--- a/11_virtual_mem_part1_identity_mapping/src/main.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/main.rs
@@ -105,6 +105,7 @@
 //! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
 //!
 //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
+//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
 #![allow(incomplete_features)]
 #![feature(const_fn_fn_ptr_basics)]
diff --git a/11_virtual_mem_part1_identity_mapping/src/panic_wait.rs b/11_virtual_mem_part1_identity_mapping/src/panic_wait.rs
index 7980f5de5..66fbe6b40 100644
--- a/11_virtual_mem_part1_identity_mapping/src/panic_wait.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/panic_wait.rs
@@ -19,7 +19,7 @@ fn _panic_print(args: fmt::Arguments) {
 
 /// Prints with a newline - only use from the panic handler.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! panic_println {
     ($($arg:tt)*) => ({
diff --git a/11_virtual_mem_part1_identity_mapping/src/print.rs b/11_virtual_mem_part1_identity_mapping/src/print.rs
index 5a5638113..89fa66943 100644
--- a/11_virtual_mem_part1_identity_mapping/src/print.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/print.rs
@@ -20,7 +20,7 @@ pub fn _print(args: fmt::Arguments) {
 
 /// Prints without a newline.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! print {
     ($($arg:tt)*) => ($crate::print::_print(format_args!($($arg)*)));
@@ -28,7 +28,7 @@ macro_rules! print {
 
 /// Prints with a newline.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! println {
     () => ($crate::print!("\n"));
diff --git a/11_virtual_mem_part1_identity_mapping/src/synchronization.rs b/11_virtual_mem_part1_identity_mapping/src/synchronization.rs
index f956b5cdd..7bb2938be 100644
--- a/11_virtual_mem_part1_identity_mapping/src/synchronization.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/synchronization.rs
@@ -4,10 +4,11 @@
 
 //! Synchronization primitives.
 //!
-//! Suggested literature:
-//!   - https://doc.rust-lang.org/book/ch16-04-extensible-concurrency-sync-and-send.html
-//!   - https://stackoverflow.com/questions/59428096/understanding-the-send-trait
-//!   - https://doc.rust-lang.org/std/cell/index.html
+//! # Resources
+//!
+//!   - <https://doc.rust-lang.org/book/ch16-04-extensible-concurrency-sync-and-send.html>
+//!   - <https://stackoverflow.com/questions/59428096/understanding-the-send-trait>
+//!   - <https://doc.rust-lang.org/std/cell/index.html>
 
 use core::cell::UnsafeCell;
 
diff --git a/12_exceptions_part1_groundwork/README.md b/12_exceptions_part1_groundwork/README.md
index 829ed0920..c5d0f9f1c 100644
--- a/12_exceptions_part1_groundwork/README.md
+++ b/12_exceptions_part1_groundwork/README.md
@@ -967,7 +967,7 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/exception.rs 12_exceptions_p
 diff -uNr 11_virtual_mem_part1_identity_mapping/src/main.rs 12_exceptions_part1_groundwork/src/main.rs
 --- 11_virtual_mem_part1_identity_mapping/src/main.rs
 +++ 12_exceptions_part1_groundwork/src/main.rs
-@@ -111,6 +111,7 @@
+@@ -112,6 +112,7 @@
  #![feature(const_generics)]
  #![feature(const_panic)]
  #![feature(format_args_nl)]
@@ -975,7 +975,7 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/main.rs 12_exceptions_part1_
  #![feature(panic_info_message)]
  #![feature(trait_alias)]
  #![no_main]
-@@ -142,6 +143,8 @@
+@@ -143,6 +144,8 @@
      use driver::interface::DriverManager;
      use memory::mmu::interface::MMU;
 
@@ -984,7 +984,7 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/main.rs 12_exceptions_part1_
      if let Err(string) = memory::mmu::mmu().init() {
          panic!("MMU: {}", string);
      }
-@@ -194,13 +197,28 @@
+@@ -195,13 +198,28 @@
      info!("Timer test, spinning for 1 second");
      time::time_manager().spin_for(Duration::from_secs(1));
 
diff --git a/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index ce39752d1..d2aae4d24 100644
--- a/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -6,8 +6,8 @@
 //!
 //! # Resources
 //!
-//! - https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
-//! - https://developer.arm.com/documentation/ddi0183/latest
+//! - <https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf>
+//! - <https://developer.arm.com/documentation/ddi0183/latest>
 
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, synchronization,
diff --git a/12_exceptions_part1_groundwork/src/main.rs b/12_exceptions_part1_groundwork/src/main.rs
index 80706a248..4aa47c6e7 100644
--- a/12_exceptions_part1_groundwork/src/main.rs
+++ b/12_exceptions_part1_groundwork/src/main.rs
@@ -105,6 +105,7 @@
 //! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
 //!
 //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
+//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
 #![allow(incomplete_features)]
 #![feature(const_fn_fn_ptr_basics)]
diff --git a/12_exceptions_part1_groundwork/src/panic_wait.rs b/12_exceptions_part1_groundwork/src/panic_wait.rs
index 7980f5de5..66fbe6b40 100644
--- a/12_exceptions_part1_groundwork/src/panic_wait.rs
+++ b/12_exceptions_part1_groundwork/src/panic_wait.rs
@@ -19,7 +19,7 @@ fn _panic_print(args: fmt::Arguments) {
 
 /// Prints with a newline - only use from the panic handler.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! panic_println {
     ($($arg:tt)*) => ({
diff --git a/12_exceptions_part1_groundwork/src/print.rs b/12_exceptions_part1_groundwork/src/print.rs
index 5a5638113..89fa66943 100644
--- a/12_exceptions_part1_groundwork/src/print.rs
+++ b/12_exceptions_part1_groundwork/src/print.rs
@@ -20,7 +20,7 @@ pub fn _print(args: fmt::Arguments) {
 
 /// Prints without a newline.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! print {
     ($($arg:tt)*) => ($crate::print::_print(format_args!($($arg)*)));
@@ -28,7 +28,7 @@ macro_rules! print {
 
 /// Prints with a newline.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! println {
     () => ($crate::print!("\n"));
diff --git a/12_exceptions_part1_groundwork/src/synchronization.rs b/12_exceptions_part1_groundwork/src/synchronization.rs
index f956b5cdd..7bb2938be 100644
--- a/12_exceptions_part1_groundwork/src/synchronization.rs
+++ b/12_exceptions_part1_groundwork/src/synchronization.rs
@@ -4,10 +4,11 @@
 
 //! Synchronization primitives.
 //!
-//! Suggested literature:
-//!   - https://doc.rust-lang.org/book/ch16-04-extensible-concurrency-sync-and-send.html
-//!   - https://stackoverflow.com/questions/59428096/understanding-the-send-trait
-//!   - https://doc.rust-lang.org/std/cell/index.html
+//! # Resources
+//!
+//!   - <https://doc.rust-lang.org/book/ch16-04-extensible-concurrency-sync-and-send.html>
+//!   - <https://stackoverflow.com/questions/59428096/understanding-the-send-trait>
+//!   - <https://doc.rust-lang.org/std/cell/index.html>
 
 use core::cell::UnsafeCell;
 
diff --git a/13_integrated_testing/README.md b/13_integrated_testing/README.md
index 9a99cbdf5..cd03c27e9 100644
--- a/13_integrated_testing/README.md
+++ b/13_integrated_testing/README.md
@@ -1157,7 +1157,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/exception.rs 13_integrated_testing/
 diff -uNr 12_exceptions_part1_groundwork/src/lib.rs 13_integrated_testing/src/lib.rs
 --- 12_exceptions_part1_groundwork/src/lib.rs
 +++ 13_integrated_testing/src/lib.rs
-@@ -0,0 +1,168 @@
+@@ -0,0 +1,169 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -1267,6 +1267,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/lib.rs 13_integrated_testing/src/li
 +//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
 +//!
 +//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
++//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 +
 +#![allow(incomplete_features)]
 +#![feature(const_fn_fn_ptr_basics)]
@@ -1330,7 +1331,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/lib.rs 13_integrated_testing/src/li
 diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/main.rs
 --- 12_exceptions_part1_groundwork/src/main.rs
 +++ 13_integrated_testing/src/main.rs
-@@ -6,128 +6,12 @@
+@@ -6,129 +6,12 @@
  #![doc(html_logo_url = "https://git.io/JeGIp")]
 
  //! The `kernel` binary.
@@ -1433,6 +1434,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/m
 -//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
 -//!
 -//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
+-//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 -
 -#![allow(incomplete_features)]
 -#![feature(const_fn_fn_ptr_basics)]
@@ -1461,7 +1463,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/m
 
  /// Early init code.
  ///
-@@ -139,6 +23,7 @@
+@@ -140,6 +23,7 @@
  ///       - Without it, any atomic operations, e.g. the yet-to-be-introduced spinlocks in the device
  ///         drivers (which currently employ NullLocks instead of spinlocks), will fail to work on
  ///         the RPi SoCs.
@@ -1469,7 +1471,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/m
  unsafe fn kernel_init() -> ! {
      use driver::interface::DriverManager;
      use memory::mmu::interface::MMU;
-@@ -165,9 +50,7 @@
+@@ -166,9 +50,7 @@
  fn kernel_main() -> ! {
      use bsp::console::console;
      use console::interface::All;
@@ -1479,7 +1481,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/m
 
      info!("Booting on: {}", bsp::board_name());
 
-@@ -194,31 +77,6 @@
+@@ -195,31 +77,6 @@
          info!("      {}. {}", i + 1, driver.compatible());
      }
 
@@ -1605,7 +1607,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/panic_wait.rs 13_integrated_testing
 +
  /// Prints with a newline - only use from the panic handler.
  ///
- /// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+ /// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 @@ -35,5 +52,16 @@
          panic_println!("\nKernel panic!");
      }
diff --git a/13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index ce39752d1..d2aae4d24 100644
--- a/13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -6,8 +6,8 @@
 //!
 //! # Resources
 //!
-//! - https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
-//! - https://developer.arm.com/documentation/ddi0183/latest
+//! - <https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf>
+//! - <https://developer.arm.com/documentation/ddi0183/latest>
 
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, synchronization,
diff --git a/13_integrated_testing/src/lib.rs b/13_integrated_testing/src/lib.rs
index 0bc8d3292..d427375c3 100644
--- a/13_integrated_testing/src/lib.rs
+++ b/13_integrated_testing/src/lib.rs
@@ -107,6 +107,7 @@
 //! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
 //!
 //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
+//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
 #![allow(incomplete_features)]
 #![feature(const_fn_fn_ptr_basics)]
diff --git a/13_integrated_testing/src/panic_wait.rs b/13_integrated_testing/src/panic_wait.rs
index 76438a9bf..61536ba80 100644
--- a/13_integrated_testing/src/panic_wait.rs
+++ b/13_integrated_testing/src/panic_wait.rs
@@ -36,7 +36,7 @@ fn _panic_exit() -> ! {
 
 /// Prints with a newline - only use from the panic handler.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! panic_println {
     ($($arg:tt)*) => ({
diff --git a/13_integrated_testing/src/print.rs b/13_integrated_testing/src/print.rs
index 5a5638113..89fa66943 100644
--- a/13_integrated_testing/src/print.rs
+++ b/13_integrated_testing/src/print.rs
@@ -20,7 +20,7 @@ pub fn _print(args: fmt::Arguments) {
 
 /// Prints without a newline.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! print {
     ($($arg:tt)*) => ($crate::print::_print(format_args!($($arg)*)));
@@ -28,7 +28,7 @@ macro_rules! print {
 
 /// Prints with a newline.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! println {
     () => ($crate::print!("\n"));
diff --git a/13_integrated_testing/src/synchronization.rs b/13_integrated_testing/src/synchronization.rs
index f956b5cdd..7bb2938be 100644
--- a/13_integrated_testing/src/synchronization.rs
+++ b/13_integrated_testing/src/synchronization.rs
@@ -4,10 +4,11 @@
 
 //! Synchronization primitives.
 //!
-//! Suggested literature:
-//!   - https://doc.rust-lang.org/book/ch16-04-extensible-concurrency-sync-and-send.html
-//!   - https://stackoverflow.com/questions/59428096/understanding-the-send-trait
-//!   - https://doc.rust-lang.org/std/cell/index.html
+//! # Resources
+//!
+//!   - <https://doc.rust-lang.org/book/ch16-04-extensible-concurrency-sync-and-send.html>
+//!   - <https://stackoverflow.com/questions/59428096/understanding-the-send-trait>
+//!   - <https://doc.rust-lang.org/std/cell/index.html>
 
 use core::cell::UnsafeCell;
 
diff --git a/14_exceptions_part2_peripheral_IRQs/README.md b/14_exceptions_part2_peripheral_IRQs/README.md
index e6dd762ec..060a58e2b 100644
--- a/14_exceptions_part2_peripheral_IRQs/README.md
+++ b/14_exceptions_part2_peripheral_IRQs/README.md
@@ -1776,7 +1776,7 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 --- 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 +++ 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 @@ -10,8 +10,8 @@
- //! - https://developer.arm.com/documentation/ddi0183/latest
+ //! - <https://developer.arm.com/documentation/ddi0183/latest>
 
  use crate::{
 -    bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, synchronization,
@@ -2180,7 +2180,7 @@ diff -uNr 13_integrated_testing/src/exception/asynchronous.rs 14_exceptions_part
 +/// context, aka executing an interrupt vector or subcalls of it.
 +///
 +/// Concept and implementation derived from the `CriticalSection` introduced in
-+/// https://github.com/rust-embedded/bare-metal
++/// <https://github.com/rust-embedded/bare-metal>
 +#[derive(Clone, Copy)]
 +pub struct IRQContext<'irq_context> {
 +    _0: PhantomData<&'irq_context ()>,
@@ -2296,8 +2296,8 @@ diff -uNr 13_integrated_testing/src/exception/asynchronous.rs 14_exceptions_part
 diff -uNr 13_integrated_testing/src/lib.rs 14_exceptions_part2_peripheral_IRQs/src/lib.rs
 --- 13_integrated_testing/src/lib.rs
 +++ 14_exceptions_part2_peripheral_IRQs/src/lib.rs
-@@ -109,9 +109,11 @@
- //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
+@@ -110,9 +110,11 @@
+ //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
  #![allow(incomplete_features)]
 +#![feature(asm)]
@@ -2308,7 +2308,7 @@ diff -uNr 13_integrated_testing/src/lib.rs 14_exceptions_part2_peripheral_IRQs/s
  #![feature(format_args_nl)]
  #![feature(global_asm)]
  #![feature(linkage)]
-@@ -135,6 +137,7 @@
+@@ -136,6 +138,7 @@
  pub mod exception;
  pub mod memory;
  pub mod print;
@@ -2510,7 +2510,7 @@ diff -uNr 13_integrated_testing/src/state.rs 14_exceptions_part2_peripheral_IRQs
 diff -uNr 13_integrated_testing/src/synchronization.rs 14_exceptions_part2_peripheral_IRQs/src/synchronization.rs
 --- 13_integrated_testing/src/synchronization.rs
 +++ 14_exceptions_part2_peripheral_IRQs/src/synchronization.rs
-@@ -27,6 +27,21 @@
+@@ -28,6 +28,21 @@
          /// Locks the mutex and grants the closure temporary mutable access to the wrapped data.
          fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R;
      }
@@ -2532,7 +2532,7 @@ diff -uNr 13_integrated_testing/src/synchronization.rs 14_exceptions_part2_perip
  }
 
  /// A pseudo-lock for teaching purposes.
-@@ -35,8 +50,18 @@
+@@ -36,8 +51,18 @@
  /// other cores to the contained data. This part is preserved for later lessons.
  ///
  /// The lock will only be used as long as it is safe to do so, i.e. as long as the kernel is
@@ -2553,7 +2553,7 @@ diff -uNr 13_integrated_testing/src/synchronization.rs 14_exceptions_part2_perip
  where
      T: ?Sized,
  {
-@@ -47,10 +72,22 @@
+@@ -48,10 +73,22 @@
  // Public Code
  //--------------------------------------------------------------------------------------------------
 
@@ -2579,7 +2579,7 @@ diff -uNr 13_integrated_testing/src/synchronization.rs 14_exceptions_part2_perip
      /// Create an instance.
      pub const fn new(data: T) -> Self {
          Self {
-@@ -62,8 +99,9 @@
+@@ -63,8 +100,9 @@
  //------------------------------------------------------------------------------
  // OS Interface Code
  //------------------------------------------------------------------------------
@@ -2590,7 +2590,7 @@ diff -uNr 13_integrated_testing/src/synchronization.rs 14_exceptions_part2_perip
      type Data = T;
 
      fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
-@@ -71,6 +109,32 @@
+@@ -72,6 +110,32 @@
          // mutable reference will ever only be given out once at a time.
          let data = unsafe { &mut *self.data.get() };
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 1dd0a14c2..c8026dcf5 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -6,8 +6,8 @@
 //!
 //! # Resources
 //!
-//! - https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
-//! - https://developer.arm.com/documentation/ddi0183/latest
+//! - <https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf>
+//! - <https://developer.arm.com/documentation/ddi0183/latest>
 
 use crate::{
     bsp, bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, exception,
diff --git a/14_exceptions_part2_peripheral_IRQs/src/exception/asynchronous.rs b/14_exceptions_part2_peripheral_IRQs/src/exception/asynchronous.rs
index 2b9ef05f3..e9aace357 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/exception/asynchronous.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/exception/asynchronous.rs
@@ -38,7 +38,7 @@ pub struct IRQDescriptor {
 /// context, aka executing an interrupt vector or subcalls of it.
 ///
 /// Concept and implementation derived from the `CriticalSection` introduced in
-/// https://github.com/rust-embedded/bare-metal
+/// <https://github.com/rust-embedded/bare-metal>
 #[derive(Clone, Copy)]
 pub struct IRQContext<'irq_context> {
     _0: PhantomData<&'irq_context ()>,
diff --git a/14_exceptions_part2_peripheral_IRQs/src/lib.rs b/14_exceptions_part2_peripheral_IRQs/src/lib.rs
index bc50cabd8..2d12290f6 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/lib.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/lib.rs
@@ -107,6 +107,7 @@
 //! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
 //!
 //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
+//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
 #![allow(incomplete_features)]
 #![feature(asm)]
diff --git a/14_exceptions_part2_peripheral_IRQs/src/panic_wait.rs b/14_exceptions_part2_peripheral_IRQs/src/panic_wait.rs
index 0b724abd7..8c7770b6e 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/panic_wait.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/panic_wait.rs
@@ -36,7 +36,7 @@ fn _panic_exit() -> ! {
 
 /// Prints with a newline - only use from the panic handler.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! panic_println {
     ($($arg:tt)*) => ({
diff --git a/14_exceptions_part2_peripheral_IRQs/src/print.rs b/14_exceptions_part2_peripheral_IRQs/src/print.rs
index 5a5638113..89fa66943 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/print.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/print.rs
@@ -20,7 +20,7 @@ pub fn _print(args: fmt::Arguments) {
 
 /// Prints without a newline.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! print {
     ($($arg:tt)*) => ($crate::print::_print(format_args!($($arg)*)));
@@ -28,7 +28,7 @@ macro_rules! print {
 
 /// Prints with a newline.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! println {
     () => ($crate::print!("\n"));
diff --git a/14_exceptions_part2_peripheral_IRQs/src/synchronization.rs b/14_exceptions_part2_peripheral_IRQs/src/synchronization.rs
index 6133826eb..fe9d454a8 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/synchronization.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/synchronization.rs
@@ -4,10 +4,11 @@
 
 //! Synchronization primitives.
 //!
-//! Suggested literature:
-//!   - https://doc.rust-lang.org/book/ch16-04-extensible-concurrency-sync-and-send.html
-//!   - https://stackoverflow.com/questions/59428096/understanding-the-send-trait
-//!   - https://doc.rust-lang.org/std/cell/index.html
+//! # Resources
+//!
+//!   - <https://doc.rust-lang.org/book/ch16-04-extensible-concurrency-sync-and-send.html>
+//!   - <https://stackoverflow.com/questions/59428096/understanding-the-send-trait>
+//!   - <https://doc.rust-lang.org/std/cell/index.html>
 
 use core::cell::UnsafeCell;
 
diff --git a/15_virtual_mem_part2_mmio_remap/README.md b/15_virtual_mem_part2_mmio_remap/README.md
index b326d589c..9adbe9c2e 100644
--- a/15_virtual_mem_part2_mmio_remap/README.md
+++ b/15_virtual_mem_part2_mmio_remap/README.md
@@ -1190,7 +1190,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
 --- 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 +++ 15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 @@ -10,10 +10,13 @@
- //! - https://developer.arm.com/documentation/ddi0183/latest
+ //! - <https://developer.arm.com/documentation/ddi0183/latest>
 
  use crate::{
 -    bsp, bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, exception,
@@ -1939,7 +1939,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/driver.rs 15_virtual_mem_part2
 diff -uNr 14_exceptions_part2_peripheral_IRQs/src/lib.rs 15_virtual_mem_part2_mmio_remap/src/lib.rs
 --- 14_exceptions_part2_peripheral_IRQs/src/lib.rs
 +++ 15_virtual_mem_part2_mmio_remap/src/lib.rs
-@@ -110,6 +110,7 @@
+@@ -111,6 +111,7 @@
 
  #![allow(incomplete_features)]
  #![feature(asm)]
@@ -1947,7 +1947,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/lib.rs 15_virtual_mem_part2_mm
  #![feature(const_fn_fn_ptr_basics)]
  #![feature(const_generics)]
  #![feature(const_panic)]
-@@ -131,6 +132,7 @@
+@@ -132,6 +133,7 @@
  mod synchronization;
 
  pub mod bsp;
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index e279c2062..4b1e9c937 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -6,8 +6,8 @@
 //!
 //! # Resources
 //!
-//! - https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
-//! - https://developer.arm.com/documentation/ddi0183/latest
+//! - <https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf>
+//! - <https://developer.arm.com/documentation/ddi0183/latest>
 
 use crate::{
     bsp, bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, exception, memory,
diff --git a/15_virtual_mem_part2_mmio_remap/src/exception/asynchronous.rs b/15_virtual_mem_part2_mmio_remap/src/exception/asynchronous.rs
index 2b9ef05f3..e9aace357 100644
--- a/15_virtual_mem_part2_mmio_remap/src/exception/asynchronous.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/exception/asynchronous.rs
@@ -38,7 +38,7 @@ pub struct IRQDescriptor {
 /// context, aka executing an interrupt vector or subcalls of it.
 ///
 /// Concept and implementation derived from the `CriticalSection` introduced in
-/// https://github.com/rust-embedded/bare-metal
+/// <https://github.com/rust-embedded/bare-metal>
 #[derive(Clone, Copy)]
 pub struct IRQContext<'irq_context> {
     _0: PhantomData<&'irq_context ()>,
diff --git a/15_virtual_mem_part2_mmio_remap/src/lib.rs b/15_virtual_mem_part2_mmio_remap/src/lib.rs
index 89df0dd5c..a509d86f4 100644
--- a/15_virtual_mem_part2_mmio_remap/src/lib.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/lib.rs
@@ -107,6 +107,7 @@
 //! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
 //!
 //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
+//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
 #![allow(incomplete_features)]
 #![feature(asm)]
diff --git a/15_virtual_mem_part2_mmio_remap/src/panic_wait.rs b/15_virtual_mem_part2_mmio_remap/src/panic_wait.rs
index 0b724abd7..8c7770b6e 100644
--- a/15_virtual_mem_part2_mmio_remap/src/panic_wait.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/panic_wait.rs
@@ -36,7 +36,7 @@ fn _panic_exit() -> ! {
 
 /// Prints with a newline - only use from the panic handler.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! panic_println {
     ($($arg:tt)*) => ({
diff --git a/15_virtual_mem_part2_mmio_remap/src/print.rs b/15_virtual_mem_part2_mmio_remap/src/print.rs
index 5a5638113..89fa66943 100644
--- a/15_virtual_mem_part2_mmio_remap/src/print.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/print.rs
@@ -20,7 +20,7 @@ pub fn _print(args: fmt::Arguments) {
 
 /// Prints without a newline.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! print {
     ($($arg:tt)*) => ($crate::print::_print(format_args!($($arg)*)));
@@ -28,7 +28,7 @@ macro_rules! print {
 
 /// Prints with a newline.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! println {
     () => ($crate::print!("\n"));
diff --git a/15_virtual_mem_part2_mmio_remap/src/synchronization.rs b/15_virtual_mem_part2_mmio_remap/src/synchronization.rs
index 6133826eb..fe9d454a8 100644
--- a/15_virtual_mem_part2_mmio_remap/src/synchronization.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/synchronization.rs
@@ -4,10 +4,11 @@
 
 //! Synchronization primitives.
 //!
-//! Suggested literature:
-//!   - https://doc.rust-lang.org/book/ch16-04-extensible-concurrency-sync-and-send.html
-//!   - https://stackoverflow.com/questions/59428096/understanding-the-send-trait
-//!   - https://doc.rust-lang.org/std/cell/index.html
+//! # Resources
+//!
+//!   - <https://doc.rust-lang.org/book/ch16-04-extensible-concurrency-sync-and-send.html>
+//!   - <https://stackoverflow.com/questions/59428096/understanding-the-send-trait>
+//!   - <https://doc.rust-lang.org/std/cell/index.html>
 
 use core::cell::UnsafeCell;
 
diff --git a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index ce39752d1..d2aae4d24 100644
--- a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -6,8 +6,8 @@
 //!
 //! # Resources
 //!
-//! - https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
-//! - https://developer.arm.com/documentation/ddi0183/latest
+//! - <https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf>
+//! - <https://developer.arm.com/documentation/ddi0183/latest>
 
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, synchronization,
diff --git a/X1_JTAG_boot/src/main.rs b/X1_JTAG_boot/src/main.rs
index fa5ba64ad..4f45d955e 100644
--- a/X1_JTAG_boot/src/main.rs
+++ b/X1_JTAG_boot/src/main.rs
@@ -105,6 +105,7 @@
 //! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
 //!
 //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
+//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
diff --git a/X1_JTAG_boot/src/panic_wait.rs b/X1_JTAG_boot/src/panic_wait.rs
index 7980f5de5..66fbe6b40 100644
--- a/X1_JTAG_boot/src/panic_wait.rs
+++ b/X1_JTAG_boot/src/panic_wait.rs
@@ -19,7 +19,7 @@ fn _panic_print(args: fmt::Arguments) {
 
 /// Prints with a newline - only use from the panic handler.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! panic_println {
     ($($arg:tt)*) => ({
diff --git a/X1_JTAG_boot/src/print.rs b/X1_JTAG_boot/src/print.rs
index 5a5638113..89fa66943 100644
--- a/X1_JTAG_boot/src/print.rs
+++ b/X1_JTAG_boot/src/print.rs
@@ -20,7 +20,7 @@ pub fn _print(args: fmt::Arguments) {
 
 /// Prints without a newline.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! print {
     ($($arg:tt)*) => ($crate::print::_print(format_args!($($arg)*)));
@@ -28,7 +28,7 @@ macro_rules! print {
 
 /// Prints with a newline.
 ///
-/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
 #[macro_export]
 macro_rules! println {
     () => ($crate::print!("\n"));
diff --git a/X1_JTAG_boot/src/synchronization.rs b/X1_JTAG_boot/src/synchronization.rs
index f956b5cdd..7bb2938be 100644
--- a/X1_JTAG_boot/src/synchronization.rs
+++ b/X1_JTAG_boot/src/synchronization.rs
@@ -4,10 +4,11 @@
 
 //! Synchronization primitives.
 //!
-//! Suggested literature:
-//!   - https://doc.rust-lang.org/book/ch16-04-extensible-concurrency-sync-and-send.html
-//!   - https://stackoverflow.com/questions/59428096/understanding-the-send-trait
-//!   - https://doc.rust-lang.org/std/cell/index.html
+//! # Resources
+//!
+//!   - <https://doc.rust-lang.org/book/ch16-04-extensible-concurrency-sync-and-send.html>
+//!   - <https://stackoverflow.com/questions/59428096/understanding-the-send-trait>
+//!   - <https://doc.rust-lang.org/std/cell/index.html>
 
 use core::cell::UnsafeCell;
 

From 8ee50a2f8b483d1103f228f2372d0e6f7446ad56 Mon Sep 17 00:00:00 2001
From: Kaifoon <luciferdotc@163.com>
Date: Fri, 29 Jan 2021 07:48:04 +0800
Subject: [PATCH 028/214] Update README.CN.md

update filename `memory.ts` to `memory.rs`
---
 00_before_we_start/README.CN.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/00_before_we_start/README.CN.md b/00_before_we_start/README.CN.md
index 58f0af400..3d7e19576 100644
--- a/00_before_we_start/README.CN.md
+++ b/00_before_we_start/README.CN.md
@@ -14,7 +14,7 @@
 
 有的内核的子系统是基于特定目标架构的处理器的低级代码。对于每种支持的处理器架构，都有一个子文件夹在`src/_arch`中。例如，`src/_arch/aarch64`
 
-子模块系统在每个处理器架构的`src`文件夹中。例如，属于内核内存子系统(`src/memory.rs`)的代码将会被放在`src/_arch/aarch64/memory.rs`.后一个文件将被直接包含和重新导出到`src/memory.ts`中，以便架构代码部分是明显的遵循代码模块话。这意味着在`src/_arch/aarch64/memory.rs`中定义的公共函数foo（）。仅可通过`crate :: memory :: foo（）`访问。
+子模块系统在每个处理器架构的`src`文件夹中。例如，属于内核内存子系统(`src/memory.rs`)的代码将会被放在`src/_arch/aarch64/memory.rs`.后一个文件将被直接包含和重新导出到`src/memory.rs`中，以便架构代码部分是明显的遵循代码模块话。这意味着在`src/_arch/aarch64/memory.rs`中定义的公共函数foo（）。仅可通过`crate :: memory :: foo（）`访问。
 
 `_arch`中的`_`表示此文件夹不属于标准模块层次结构。而是使用`＃[path =“ _ arch/xxx/yyy.rs”]`属性将其内容有条件地引入各自的文件中。
 

From 9d74e021efb2473a6c472b9c167af1df461fb817 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sun, 7 Mar 2021 21:01:02 +0100
Subject: [PATCH 029/214] Docker utils: Bump various versions

---
 docker/rustembedded-osdev-utils/Dockerfile | 71 ++++++++++++----------
 1 file changed, 38 insertions(+), 33 deletions(-)

diff --git a/docker/rustembedded-osdev-utils/Dockerfile b/docker/rustembedded-osdev-utils/Dockerfile
index 7127bd14b..47f69e438 100644
--- a/docker/rustembedded-osdev-utils/Dockerfile
+++ b/docker/rustembedded-osdev-utils/Dockerfile
@@ -14,38 +14,39 @@ LABEL maintainer="The resources team <resources@teams.rust-embedded.org>, Andre
 # Ruby gems
 COPY Gemfile .
 
-RUN set -ex;                                        \
-    tempPkgs='                                      \
-        automake                                    \
-        bison                                       \
-        build-essential                             \
-        flex                                        \
-        git                                         \
-        libtool                                     \
-        pkg-config                                  \
-        wget                                        \
-    ';                                              \
-    apt-get update;                                 \
-    apt-get install -q -y --no-install-recommends   \
-        $tempPkgs                                   \
+RUN set -ex;                                      \
+    tempPkgs='                                    \
+        automake                                  \
+        bison                                     \
+        build-essential                           \
+        flex                                      \
+        git                                       \
+        libtool                                   \
+        ninja-build                               \
+        pkg-config                                \
+        wget                                      \
+    ';                                            \
+    apt-get update;                               \
+    apt-get install -q -y --no-install-recommends \
+        $tempPkgs                                 \
         # persistent packages
-        ca-certificates                             \
-        gdb-multiarch                               \
-        libpixman-1-dev                             \
-        libglib2.0-dev                              \
-        libusb-1.0.0-dev                            \
-        locales                                     \
-        python3                                     \
-        ruby                                        \
-        ruby-dev                                    \
-    ;                                               \
+        ca-certificates                           \
+        gdb-multiarch                             \
+        libpixman-1-dev                           \
+        libglib2.0-dev                            \
+        libusb-1.0.0-dev                          \
+        locales                                   \
+        python3                                   \
+        ruby                                      \
+        ruby-dev                                  \
+    ;                                             \
     # Ruby dependencies
     gem install bundler;                            \
     bundle install --retry 3 --without development; \
     # QEMU
     git clone git://git.qemu.org/qemu.git;                     \
     cd qemu;                                                   \
-    git checkout tags/v5.1.0;                                  \
+    git checkout tags/v5.2.0;                                  \
     ./configure --target-list=aarch64-softmmu --enable-modules \
         --enable-tcg-interpreter --enable-debug-tcg            \
         --python=/usr/bin/python3;                             \
@@ -61,16 +62,20 @@ RUN set -ex;                                        \
     make -j8;                                                           \
     make install;                                                       \
     # GDB
-    wget -P ~ git.io/.gdbinit;                      \
+    wget -P ~ git.io/.gdbinit; \
     # GCC AArch64 tools
-    wget https://developer.arm.com/-/media/Files/downloads/gnu-a/9.2-2019.12/binrel/gcc-arm-9.2-2019.12-x86_64-aarch64-none-elf.tar.xz; \
-    tar -xf gcc-arm-9*;                                                                                                                 \
-    cp gcc-arm-9*/bin/aarch64-none-elf-objdump gcc-arm-9*/bin/aarch64-none-elf-nm /usr/local/bin/;                                      \
-    rm -rf gcc-arm-9*;                                                                                                                  \
+    wget https://developer.arm.com/-/media/Files/downloads/gnu-a/10.2-2020.11/binrel/gcc-arm-10.2-2020.11-x86_64-aarch64-none-elf.tar.xz; \
+    tar -xf gcc-arm-10*;                                                                                                                  \
+    cp                                                                                                                                    \
+        gcc-arm-10*/bin/aarch64-none-elf-objdump                                                                                          \
+        gcc-arm-10*/bin/aarch64-none-elf-readelf                                                                                          \
+        gcc-arm-10*/bin/aarch64-none-elf-nm                                                                                               \
+        /usr/local/bin/;                                                                                                                  \
+    rm -rf gcc-arm-10*;                                                                                                                   \
     # Cleanup
-    apt-get purge -y --auto-remove $tempPkgs;       \
-    apt-get autoremove -q -y;                       \
-    apt-get clean -q -y;                            \
+    apt-get purge -y --auto-remove $tempPkgs; \
+    apt-get autoremove -q -y;                 \
+    apt-get clean -q -y;                      \
     rm -rf /var/lib/apt/lists/*
 
 # Locales

From 6db8b2bc728aa9552e56116c0f01824e4205a6d6 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sun, 7 Mar 2021 21:01:44 +0100
Subject: [PATCH 030/214] Update toolchain

---
 .rustfmt.toml                                 |   2 +-
 06_drivers_gpio_uart/README.md                |   7 ++++---
 06_drivers_gpio_uart/src/main.rs              |   1 +
 07_uart_chainloader/README.md                 |   7 ++++---
 07_uart_chainloader/demo_payload_rpi3.img     | Bin 6808 -> 6800 bytes
 07_uart_chainloader/demo_payload_rpi4.img     | Bin 6680 -> 6656 bytes
 07_uart_chainloader/src/main.rs               |   1 +
 08_timestamps/README.md                       |   7 ++++---
 08_timestamps/src/main.rs                     |   1 +
 09_hw_debug_JTAG/src/main.rs                  |   1 +
 10_privilege_level/README.md                  |   6 +++---
 10_privilege_level/src/main.rs                |   1 +
 .../README.md                                 |  10 +++++-----
 .../src/main.rs                               |   1 +
 12_exceptions_part1_groundwork/README.md      |   6 +++---
 12_exceptions_part1_groundwork/src/main.rs    |   1 +
 13_integrated_testing/README.md               |  12 +++++++-----
 13_integrated_testing/src/lib.rs              |   1 +
 14_exceptions_part2_peripheral_IRQs/README.md |   6 +++---
 .../src/lib.rs                                |   1 +
 15_virtual_mem_part2_mmio_remap/Makefile      |   2 +-
 15_virtual_mem_part2_mmio_remap/README.md     |   6 +++---
 15_virtual_mem_part2_mmio_remap/src/lib.rs    |   1 +
 X1_JTAG_boot/jtag_boot_rpi3.img               | Bin 8144 -> 8128 bytes
 X1_JTAG_boot/jtag_boot_rpi4.img               | Bin 6864 -> 6832 bytes
 X1_JTAG_boot/src/main.rs                      |   1 +
 rust-toolchain                                |   2 +-
 27 files changed, 50 insertions(+), 34 deletions(-)

diff --git a/.rustfmt.toml b/.rustfmt.toml
index 25a745377..5e98361e6 100644
--- a/.rustfmt.toml
+++ b/.rustfmt.toml
@@ -1,6 +1,6 @@
 newline_style = "Unix"
 edition = "2018"
-merge_imports = true
+imports_granularity = "Crate"
 format_code_in_doc_comments = true
 normalize_comments = true
 wrap_comments = true
diff --git a/06_drivers_gpio_uart/README.md b/06_drivers_gpio_uart/README.md
index 9bb29be51..a4176ca51 100644
--- a/06_drivers_gpio_uart/README.md
+++ b/06_drivers_gpio_uart/README.md
@@ -1302,15 +1302,16 @@ diff -uNr 05_safe_globals/src/driver.rs 06_drivers_gpio_uart/src/driver.rs
 diff -uNr 05_safe_globals/src/main.rs 06_drivers_gpio_uart/src/main.rs
 --- 05_safe_globals/src/main.rs
 +++ 06_drivers_gpio_uart/src/main.rs
-@@ -107,6 +107,7 @@
+@@ -107,6 +107,8 @@
  //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
  //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
++#![allow(clippy::clippy::upper_case_acronyms)]
 +#![feature(const_fn_fn_ptr_basics)]
  #![feature(format_args_nl)]
  #![feature(panic_info_message)]
  #![feature(trait_alias)]
-@@ -116,6 +117,7 @@
+@@ -116,6 +118,7 @@
  mod bsp;
  mod console;
  mod cpu;
@@ -1318,7 +1319,7 @@ diff -uNr 05_safe_globals/src/main.rs 06_drivers_gpio_uart/src/main.rs
  mod memory;
  mod panic_wait;
  mod print;
-@@ -127,16 +129,49 @@
+@@ -127,16 +130,49 @@
  /// # Safety
  ///
  /// - Only a single core must be active and running this function.
diff --git a/06_drivers_gpio_uart/src/main.rs b/06_drivers_gpio_uart/src/main.rs
index 46a890312..627b5b59b 100644
--- a/06_drivers_gpio_uart/src/main.rs
+++ b/06_drivers_gpio_uart/src/main.rs
@@ -107,6 +107,7 @@
 //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
+#![allow(clippy::clippy::upper_case_acronyms)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
 #![feature(panic_info_message)]
diff --git a/07_uart_chainloader/README.md b/07_uart_chainloader/README.md
index 4cf6d918d..91242143d 100644
--- a/07_uart_chainloader/README.md
+++ b/07_uart_chainloader/README.md
@@ -406,7 +406,7 @@ diff -uNr 06_drivers_gpio_uart/src/cpu.rs 07_uart_chainloader/src/cpu.rs
 diff -uNr 06_drivers_gpio_uart/src/main.rs 07_uart_chainloader/src/main.rs
 --- 06_drivers_gpio_uart/src/main.rs
 +++ 07_uart_chainloader/src/main.rs
-@@ -102,12 +102,16 @@
+@@ -102,13 +102,17 @@
  //!
  //! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
  //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
@@ -418,13 +418,14 @@ diff -uNr 06_drivers_gpio_uart/src/main.rs 07_uart_chainloader/src/main.rs
 +//! [`relocate::relocate_self()`]: relocate/fn.relocate_self.html
  //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
+ #![allow(clippy::clippy::upper_case_acronyms)]
 +#![feature(asm)]
  #![feature(const_fn_fn_ptr_basics)]
 +#![feature(core_intrinsics)]
  #![feature(format_args_nl)]
  #![feature(panic_info_message)]
  #![feature(trait_alias)]
-@@ -121,6 +125,7 @@
+@@ -122,6 +126,7 @@
  mod memory;
  mod panic_wait;
  mod print;
@@ -432,7 +433,7 @@ diff -uNr 06_drivers_gpio_uart/src/main.rs 07_uart_chainloader/src/main.rs
  mod runtime_init;
  mod synchronization;
 
-@@ -149,29 +154,49 @@
+@@ -150,29 +155,49 @@
  fn kernel_main() -> ! {
      use bsp::console::console;
      use console::interface::All;
diff --git a/07_uart_chainloader/demo_payload_rpi3.img b/07_uart_chainloader/demo_payload_rpi3.img
index 83fe7bffab6b25be79d8cd89f4803003add22f0b..13cf8aa1ed21d4896c05b5c25caf8d17c69289fa 100755
GIT binary patch
delta 2749
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zx+YYO!8F<FaYbUa#UNE-HdVxfX}f($?9hj*L_yS*=~J^dk-F=}P*WGP5Ip_PdfcX^
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delta 2883
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diff --git a/07_uart_chainloader/demo_payload_rpi4.img b/07_uart_chainloader/demo_payload_rpi4.img
index f2dec5cba4e85d94d9b3a61918b90cca5c7be02b..a0b618f8d63c28f5a04c2702fecaa5f14a043cac 100755
GIT binary patch
delta 3803
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AnE(I)

diff --git a/07_uart_chainloader/src/main.rs b/07_uart_chainloader/src/main.rs
index 82a6ec589..4fc6449af 100644
--- a/07_uart_chainloader/src/main.rs
+++ b/07_uart_chainloader/src/main.rs
@@ -109,6 +109,7 @@
 //! [`relocate::relocate_self()`]: relocate/fn.relocate_self.html
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
+#![allow(clippy::clippy::upper_case_acronyms)]
 #![feature(asm)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(core_intrinsics)]
diff --git a/08_timestamps/README.md b/08_timestamps/README.md
index af4b80559..43c165386 100644
--- a/08_timestamps/README.md
+++ b/08_timestamps/README.md
@@ -499,7 +499,7 @@ diff -uNr 07_uart_chainloader/src/cpu.rs 08_timestamps/src/cpu.rs
 diff -uNr 07_uart_chainloader/src/main.rs 08_timestamps/src/main.rs
 --- 07_uart_chainloader/src/main.rs
 +++ 08_timestamps/src/main.rs
-@@ -102,16 +102,12 @@
+@@ -102,17 +102,13 @@
  //!
  //! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
  //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
@@ -511,13 +511,14 @@ diff -uNr 07_uart_chainloader/src/main.rs 08_timestamps/src/main.rs
 -//! [`relocate::relocate_self()`]: relocate/fn.relocate_self.html
  //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
+ #![allow(clippy::clippy::upper_case_acronyms)]
 -#![feature(asm)]
  #![feature(const_fn_fn_ptr_basics)]
 -#![feature(core_intrinsics)]
  #![feature(format_args_nl)]
  #![feature(panic_info_message)]
  #![feature(trait_alias)]
-@@ -125,9 +121,9 @@
+@@ -126,9 +122,9 @@
  mod memory;
  mod panic_wait;
  mod print;
@@ -528,7 +529,7 @@ diff -uNr 07_uart_chainloader/src/main.rs 08_timestamps/src/main.rs
 
  /// Early init code.
  ///
-@@ -152,51 +148,31 @@
+@@ -153,51 +149,31 @@
 
  /// The main function running after the early init.
  fn kernel_main() -> ! {
diff --git a/08_timestamps/src/main.rs b/08_timestamps/src/main.rs
index efcd98807..14e1d0ab3 100644
--- a/08_timestamps/src/main.rs
+++ b/08_timestamps/src/main.rs
@@ -107,6 +107,7 @@
 //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
+#![allow(clippy::clippy::upper_case_acronyms)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
 #![feature(panic_info_message)]
diff --git a/09_hw_debug_JTAG/src/main.rs b/09_hw_debug_JTAG/src/main.rs
index efcd98807..14e1d0ab3 100644
--- a/09_hw_debug_JTAG/src/main.rs
+++ b/09_hw_debug_JTAG/src/main.rs
@@ -107,6 +107,7 @@
 //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
+#![allow(clippy::clippy::upper_case_acronyms)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
 #![feature(panic_info_message)]
diff --git a/10_privilege_level/README.md b/10_privilege_level/README.md
index 2e88c083b..0d58e281a 100644
--- a/10_privilege_level/README.md
+++ b/10_privilege_level/README.md
@@ -484,7 +484,7 @@ diff -uNr 09_hw_debug_JTAG/src/exception.rs 10_privilege_level/src/exception.rs
 diff -uNr 09_hw_debug_JTAG/src/main.rs 10_privilege_level/src/main.rs
 --- 09_hw_debug_JTAG/src/main.rs
 +++ 10_privilege_level/src/main.rs
-@@ -118,6 +118,7 @@
+@@ -119,6 +119,7 @@
  mod console;
  mod cpu;
  mod driver;
@@ -492,7 +492,7 @@ diff -uNr 09_hw_debug_JTAG/src/main.rs 10_privilege_level/src/main.rs
  mod memory;
  mod panic_wait;
  mod print;
-@@ -148,12 +149,20 @@
+@@ -149,12 +150,20 @@
 
  /// The main function running after the early init.
  fn kernel_main() -> ! {
@@ -513,7 +513,7 @@ diff -uNr 09_hw_debug_JTAG/src/main.rs 10_privilege_level/src/main.rs
      info!(
          "Architectural timer resolution: {} ns",
          time::time_manager().resolution().as_nanos()
-@@ -168,11 +177,15 @@
+@@ -169,11 +178,15 @@
          info!("      {}. {}", i + 1, driver.compatible());
      }
 
diff --git a/10_privilege_level/src/main.rs b/10_privilege_level/src/main.rs
index 193ff7a63..181a9aa5b 100644
--- a/10_privilege_level/src/main.rs
+++ b/10_privilege_level/src/main.rs
@@ -107,6 +107,7 @@
 //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
+#![allow(clippy::clippy::upper_case_acronyms)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
 #![feature(panic_info_message)]
diff --git a/11_virtual_mem_part1_identity_mapping/README.md b/11_virtual_mem_part1_identity_mapping/README.md
index 726012e13..7b822f68c 100644
--- a/11_virtual_mem_part1_identity_mapping/README.md
+++ b/11_virtual_mem_part1_identity_mapping/README.md
@@ -1006,10 +1006,10 @@ diff -uNr 10_privilege_level/src/bsp.rs 11_virtual_mem_part1_identity_mapping/sr
 diff -uNr 10_privilege_level/src/main.rs 11_virtual_mem_part1_identity_mapping/src/main.rs
 --- 10_privilege_level/src/main.rs
 +++ 11_virtual_mem_part1_identity_mapping/src/main.rs
-@@ -107,7 +107,10 @@
- //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
+@@ -108,7 +108,10 @@
  //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
+ #![allow(clippy::clippy::upper_case_acronyms)]
 +#![allow(incomplete_features)]
  #![feature(const_fn_fn_ptr_basics)]
 +#![feature(const_generics)]
@@ -1017,7 +1017,7 @@ diff -uNr 10_privilege_level/src/main.rs 11_virtual_mem_part1_identity_mapping/s
  #![feature(format_args_nl)]
  #![feature(panic_info_message)]
  #![feature(trait_alias)]
-@@ -131,9 +134,18 @@
+@@ -132,9 +135,18 @@
  /// # Safety
  ///
  /// - Only a single core must be active and running this function.
@@ -1037,7 +1037,7 @@ diff -uNr 10_privilege_level/src/main.rs 11_virtual_mem_part1_identity_mapping/s
 
      for i in bsp::driver::driver_manager().all_device_drivers().iter() {
          if let Err(x) = i.init() {
-@@ -157,6 +169,9 @@
+@@ -158,6 +170,9 @@
 
      info!("Booting on: {}", bsp::board_name());
 
@@ -1047,7 +1047,7 @@ diff -uNr 10_privilege_level/src/main.rs 11_virtual_mem_part1_identity_mapping/s
      let (_, privilege_level) = exception::current_privilege_level();
      info!("Current privilege level: {}", privilege_level);
 
-@@ -180,6 +195,13 @@
+@@ -181,6 +196,13 @@
      info!("Timer test, spinning for 1 second");
      time::time_manager().spin_for(Duration::from_secs(1));
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/main.rs b/11_virtual_mem_part1_identity_mapping/src/main.rs
index bfc7d5e42..9f755c9ba 100644
--- a/11_virtual_mem_part1_identity_mapping/src/main.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/main.rs
@@ -107,6 +107,7 @@
 //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
+#![allow(clippy::clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(const_generics)]
diff --git a/12_exceptions_part1_groundwork/README.md b/12_exceptions_part1_groundwork/README.md
index c5d0f9f1c..53c953df0 100644
--- a/12_exceptions_part1_groundwork/README.md
+++ b/12_exceptions_part1_groundwork/README.md
@@ -967,7 +967,7 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/exception.rs 12_exceptions_p
 diff -uNr 11_virtual_mem_part1_identity_mapping/src/main.rs 12_exceptions_part1_groundwork/src/main.rs
 --- 11_virtual_mem_part1_identity_mapping/src/main.rs
 +++ 12_exceptions_part1_groundwork/src/main.rs
-@@ -112,6 +112,7 @@
+@@ -113,6 +113,7 @@
  #![feature(const_generics)]
  #![feature(const_panic)]
  #![feature(format_args_nl)]
@@ -975,7 +975,7 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/main.rs 12_exceptions_part1_
  #![feature(panic_info_message)]
  #![feature(trait_alias)]
  #![no_main]
-@@ -143,6 +144,8 @@
+@@ -144,6 +145,8 @@
      use driver::interface::DriverManager;
      use memory::mmu::interface::MMU;
 
@@ -984,7 +984,7 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/main.rs 12_exceptions_part1_
      if let Err(string) = memory::mmu::mmu().init() {
          panic!("MMU: {}", string);
      }
-@@ -195,13 +198,28 @@
+@@ -196,13 +199,28 @@
      info!("Timer test, spinning for 1 second");
      time::time_manager().spin_for(Duration::from_secs(1));
 
diff --git a/12_exceptions_part1_groundwork/src/main.rs b/12_exceptions_part1_groundwork/src/main.rs
index 4aa47c6e7..9dee3a44c 100644
--- a/12_exceptions_part1_groundwork/src/main.rs
+++ b/12_exceptions_part1_groundwork/src/main.rs
@@ -107,6 +107,7 @@
 //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
+#![allow(clippy::clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(const_generics)]
diff --git a/13_integrated_testing/README.md b/13_integrated_testing/README.md
index cd03c27e9..383b0a0dd 100644
--- a/13_integrated_testing/README.md
+++ b/13_integrated_testing/README.md
@@ -1157,7 +1157,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/exception.rs 13_integrated_testing/
 diff -uNr 12_exceptions_part1_groundwork/src/lib.rs 13_integrated_testing/src/lib.rs
 --- 12_exceptions_part1_groundwork/src/lib.rs
 +++ 13_integrated_testing/src/lib.rs
-@@ -0,0 +1,169 @@
+@@ -0,0 +1,170 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -1269,6 +1269,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/lib.rs 13_integrated_testing/src/li
 +//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 +//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 +
++#![allow(clippy::clippy::upper_case_acronyms)]
 +#![allow(incomplete_features)]
 +#![feature(const_fn_fn_ptr_basics)]
 +#![feature(const_generics)]
@@ -1331,7 +1332,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/lib.rs 13_integrated_testing/src/li
 diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/main.rs
 --- 12_exceptions_part1_groundwork/src/main.rs
 +++ 13_integrated_testing/src/main.rs
-@@ -6,129 +6,12 @@
+@@ -6,130 +6,12 @@
  #![doc(html_logo_url = "https://git.io/JeGIp")]
 
  //! The `kernel` binary.
@@ -1436,6 +1437,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/m
 -//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 -//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 -
+-#![allow(clippy::clippy::upper_case_acronyms)]
 -#![allow(incomplete_features)]
 -#![feature(const_fn_fn_ptr_basics)]
 -#![feature(const_generics)]
@@ -1463,7 +1465,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/m
 
  /// Early init code.
  ///
-@@ -140,6 +23,7 @@
+@@ -141,6 +23,7 @@
  ///       - Without it, any atomic operations, e.g. the yet-to-be-introduced spinlocks in the device
  ///         drivers (which currently employ NullLocks instead of spinlocks), will fail to work on
  ///         the RPi SoCs.
@@ -1471,7 +1473,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/m
  unsafe fn kernel_init() -> ! {
      use driver::interface::DriverManager;
      use memory::mmu::interface::MMU;
-@@ -166,9 +50,7 @@
+@@ -167,9 +50,7 @@
  fn kernel_main() -> ! {
      use bsp::console::console;
      use console::interface::All;
@@ -1481,7 +1483,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/m
 
      info!("Booting on: {}", bsp::board_name());
 
-@@ -195,31 +77,6 @@
+@@ -196,31 +77,6 @@
          info!("      {}. {}", i + 1, driver.compatible());
      }
 
diff --git a/13_integrated_testing/src/lib.rs b/13_integrated_testing/src/lib.rs
index d427375c3..3e0a9eea5 100644
--- a/13_integrated_testing/src/lib.rs
+++ b/13_integrated_testing/src/lib.rs
@@ -109,6 +109,7 @@
 //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
+#![allow(clippy::clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(const_generics)]
diff --git a/14_exceptions_part2_peripheral_IRQs/README.md b/14_exceptions_part2_peripheral_IRQs/README.md
index 060a58e2b..c04cc9ae7 100644
--- a/14_exceptions_part2_peripheral_IRQs/README.md
+++ b/14_exceptions_part2_peripheral_IRQs/README.md
@@ -2296,9 +2296,9 @@ diff -uNr 13_integrated_testing/src/exception/asynchronous.rs 14_exceptions_part
 diff -uNr 13_integrated_testing/src/lib.rs 14_exceptions_part2_peripheral_IRQs/src/lib.rs
 --- 13_integrated_testing/src/lib.rs
 +++ 14_exceptions_part2_peripheral_IRQs/src/lib.rs
-@@ -110,9 +110,11 @@
- //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
+@@ -111,9 +111,11 @@
 
+ #![allow(clippy::clippy::upper_case_acronyms)]
  #![allow(incomplete_features)]
 +#![feature(asm)]
  #![feature(const_fn_fn_ptr_basics)]
@@ -2308,7 +2308,7 @@ diff -uNr 13_integrated_testing/src/lib.rs 14_exceptions_part2_peripheral_IRQs/s
  #![feature(format_args_nl)]
  #![feature(global_asm)]
  #![feature(linkage)]
-@@ -136,6 +138,7 @@
+@@ -137,6 +139,7 @@
  pub mod exception;
  pub mod memory;
  pub mod print;
diff --git a/14_exceptions_part2_peripheral_IRQs/src/lib.rs b/14_exceptions_part2_peripheral_IRQs/src/lib.rs
index 2d12290f6..fd4bdde51 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/lib.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/lib.rs
@@ -109,6 +109,7 @@
 //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
+#![allow(clippy::clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
 #![feature(asm)]
 #![feature(const_fn_fn_ptr_basics)]
diff --git a/15_virtual_mem_part2_mmio_remap/Makefile b/15_virtual_mem_part2_mmio_remap/Makefile
index 4f7561dbd..206b3d970 100644
--- a/15_virtual_mem_part2_mmio_remap/Makefile
+++ b/15_virtual_mem_part2_mmio_remap/Makefile
@@ -170,7 +170,7 @@ objdump: $(KERNEL_ELF)
 	@$(DOCKER_ELFTOOLS) $(OBJDUMP_BINARY) --disassemble --demangle $(KERNEL_ELF) | rustfilt
 
 nm: $(KERNEL_ELF)
-	@$(DOCKER_ELFTOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
+	$(DOCKER_ELFTOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
 # For rust-analyzer
 check:
diff --git a/15_virtual_mem_part2_mmio_remap/README.md b/15_virtual_mem_part2_mmio_remap/README.md
index 9adbe9c2e..65127bd6a 100644
--- a/15_virtual_mem_part2_mmio_remap/README.md
+++ b/15_virtual_mem_part2_mmio_remap/README.md
@@ -1939,15 +1939,15 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/driver.rs 15_virtual_mem_part2
 diff -uNr 14_exceptions_part2_peripheral_IRQs/src/lib.rs 15_virtual_mem_part2_mmio_remap/src/lib.rs
 --- 14_exceptions_part2_peripheral_IRQs/src/lib.rs
 +++ 15_virtual_mem_part2_mmio_remap/src/lib.rs
-@@ -111,6 +111,7 @@
-
+@@ -112,6 +112,7 @@
+ #![allow(clippy::clippy::upper_case_acronyms)]
  #![allow(incomplete_features)]
  #![feature(asm)]
 +#![feature(const_fn)]
  #![feature(const_fn_fn_ptr_basics)]
  #![feature(const_generics)]
  #![feature(const_panic)]
-@@ -132,6 +133,7 @@
+@@ -133,6 +134,7 @@
  mod synchronization;
 
  pub mod bsp;
diff --git a/15_virtual_mem_part2_mmio_remap/src/lib.rs b/15_virtual_mem_part2_mmio_remap/src/lib.rs
index a509d86f4..608d4b07b 100644
--- a/15_virtual_mem_part2_mmio_remap/src/lib.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/lib.rs
@@ -109,6 +109,7 @@
 //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
+#![allow(clippy::clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
 #![feature(asm)]
 #![feature(const_fn)]
diff --git a/X1_JTAG_boot/jtag_boot_rpi3.img b/X1_JTAG_boot/jtag_boot_rpi3.img
index 4cd4401535b2b3cb1f5cbf807c72b1f69637cedd..d4148b720f230a78479ea44cdc8791b9c28bc753 100755
GIT binary patch
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diff --git a/X1_JTAG_boot/jtag_boot_rpi4.img b/X1_JTAG_boot/jtag_boot_rpi4.img
index c753511524cbbc8a737fb914a5a7469ed49ea7e4..7c70a2c0de1116b6d22e5346d17b43d09ab93d91 100755
GIT binary patch
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diff --git a/X1_JTAG_boot/src/main.rs b/X1_JTAG_boot/src/main.rs
index 4f45d955e..aeff7a4da 100644
--- a/X1_JTAG_boot/src/main.rs
+++ b/X1_JTAG_boot/src/main.rs
@@ -107,6 +107,7 @@
 //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
+#![allow(clippy::clippy::upper_case_acronyms)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
 #![feature(panic_info_message)]
diff --git a/rust-toolchain b/rust-toolchain
index 26668a71b..1b5ba1c03 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1,4 +1,4 @@
 [toolchain]
-channel = "nightly-2021-01-08"
+channel = "nightly-2021-03-06"
 components = ["llvm-tools-preview"]
 targets = ["aarch64-unknown-none-softfloat"]

From aeadda4b7eed627d1eee646058cc52a217ad7ea8 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sun, 7 Mar 2021 21:06:48 +0100
Subject: [PATCH 031/214] Bump dependencies

---
 04_zero_overhead_abstraction/Cargo.lock          |  6 ++++--
 05_safe_globals/Cargo.lock                       |  6 ++++--
 06_drivers_gpio_uart/Cargo.lock                  |  6 ++++--
 07_uart_chainloader/Cargo.lock                   |  6 ++++--
 08_timestamps/Cargo.lock                         |  6 ++++--
 09_hw_debug_JTAG/Cargo.lock                      |  6 ++++--
 10_privilege_level/Cargo.lock                    |  6 ++++--
 11_virtual_mem_part1_identity_mapping/Cargo.lock |  6 ++++--
 12_exceptions_part1_groundwork/Cargo.lock        |  6 ++++--
 13_integrated_testing/Cargo.lock                 | 14 ++++++++------
 14_exceptions_part2_peripheral_IRQs/Cargo.lock   | 14 ++++++++------
 15_virtual_mem_part2_mmio_remap/Cargo.lock       | 14 ++++++++------
 X1_JTAG_boot/Cargo.lock                          |  6 ++++--
 13 files changed, 64 insertions(+), 38 deletions(-)

diff --git a/04_zero_overhead_abstraction/Cargo.lock b/04_zero_overhead_abstraction/Cargo.lock
index 70708c19a..3b926a347 100644
--- a/04_zero_overhead_abstraction/Cargo.lock
+++ b/04_zero_overhead_abstraction/Cargo.lock
@@ -1,10 +1,12 @@
 # This file is automatically @generated by Cargo.
 # It is not intended for manual editing.
+version = 3
+
 [[package]]
 name = "cortex-a"
-version = "5.1.2"
+version = "5.1.6"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d33a61602f83c3fff3e092967ad4d5d820a9fea7bc418e119616872085fe731d"
+checksum = "ecefc30975eb87afc5a810d4b2305c0ec29e607ea97e51b2ecd80766e9268d28"
 dependencies = [
  "register",
 ]
diff --git a/05_safe_globals/Cargo.lock b/05_safe_globals/Cargo.lock
index 70708c19a..3b926a347 100644
--- a/05_safe_globals/Cargo.lock
+++ b/05_safe_globals/Cargo.lock
@@ -1,10 +1,12 @@
 # This file is automatically @generated by Cargo.
 # It is not intended for manual editing.
+version = 3
+
 [[package]]
 name = "cortex-a"
-version = "5.1.2"
+version = "5.1.6"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d33a61602f83c3fff3e092967ad4d5d820a9fea7bc418e119616872085fe731d"
+checksum = "ecefc30975eb87afc5a810d4b2305c0ec29e607ea97e51b2ecd80766e9268d28"
 dependencies = [
  "register",
 ]
diff --git a/06_drivers_gpio_uart/Cargo.lock b/06_drivers_gpio_uart/Cargo.lock
index e87b55afe..a3d8bb9ae 100644
--- a/06_drivers_gpio_uart/Cargo.lock
+++ b/06_drivers_gpio_uart/Cargo.lock
@@ -1,10 +1,12 @@
 # This file is automatically @generated by Cargo.
 # It is not intended for manual editing.
+version = 3
+
 [[package]]
 name = "cortex-a"
-version = "5.1.2"
+version = "5.1.6"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d33a61602f83c3fff3e092967ad4d5d820a9fea7bc418e119616872085fe731d"
+checksum = "ecefc30975eb87afc5a810d4b2305c0ec29e607ea97e51b2ecd80766e9268d28"
 dependencies = [
  "register",
 ]
diff --git a/07_uart_chainloader/Cargo.lock b/07_uart_chainloader/Cargo.lock
index e87b55afe..a3d8bb9ae 100644
--- a/07_uart_chainloader/Cargo.lock
+++ b/07_uart_chainloader/Cargo.lock
@@ -1,10 +1,12 @@
 # This file is automatically @generated by Cargo.
 # It is not intended for manual editing.
+version = 3
+
 [[package]]
 name = "cortex-a"
-version = "5.1.2"
+version = "5.1.6"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d33a61602f83c3fff3e092967ad4d5d820a9fea7bc418e119616872085fe731d"
+checksum = "ecefc30975eb87afc5a810d4b2305c0ec29e607ea97e51b2ecd80766e9268d28"
 dependencies = [
  "register",
 ]
diff --git a/08_timestamps/Cargo.lock b/08_timestamps/Cargo.lock
index e87b55afe..a3d8bb9ae 100644
--- a/08_timestamps/Cargo.lock
+++ b/08_timestamps/Cargo.lock
@@ -1,10 +1,12 @@
 # This file is automatically @generated by Cargo.
 # It is not intended for manual editing.
+version = 3
+
 [[package]]
 name = "cortex-a"
-version = "5.1.2"
+version = "5.1.6"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d33a61602f83c3fff3e092967ad4d5d820a9fea7bc418e119616872085fe731d"
+checksum = "ecefc30975eb87afc5a810d4b2305c0ec29e607ea97e51b2ecd80766e9268d28"
 dependencies = [
  "register",
 ]
diff --git a/09_hw_debug_JTAG/Cargo.lock b/09_hw_debug_JTAG/Cargo.lock
index e87b55afe..a3d8bb9ae 100644
--- a/09_hw_debug_JTAG/Cargo.lock
+++ b/09_hw_debug_JTAG/Cargo.lock
@@ -1,10 +1,12 @@
 # This file is automatically @generated by Cargo.
 # It is not intended for manual editing.
+version = 3
+
 [[package]]
 name = "cortex-a"
-version = "5.1.2"
+version = "5.1.6"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d33a61602f83c3fff3e092967ad4d5d820a9fea7bc418e119616872085fe731d"
+checksum = "ecefc30975eb87afc5a810d4b2305c0ec29e607ea97e51b2ecd80766e9268d28"
 dependencies = [
  "register",
 ]
diff --git a/10_privilege_level/Cargo.lock b/10_privilege_level/Cargo.lock
index e87b55afe..a3d8bb9ae 100644
--- a/10_privilege_level/Cargo.lock
+++ b/10_privilege_level/Cargo.lock
@@ -1,10 +1,12 @@
 # This file is automatically @generated by Cargo.
 # It is not intended for manual editing.
+version = 3
+
 [[package]]
 name = "cortex-a"
-version = "5.1.2"
+version = "5.1.6"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d33a61602f83c3fff3e092967ad4d5d820a9fea7bc418e119616872085fe731d"
+checksum = "ecefc30975eb87afc5a810d4b2305c0ec29e607ea97e51b2ecd80766e9268d28"
 dependencies = [
  "register",
 ]
diff --git a/11_virtual_mem_part1_identity_mapping/Cargo.lock b/11_virtual_mem_part1_identity_mapping/Cargo.lock
index e87b55afe..a3d8bb9ae 100644
--- a/11_virtual_mem_part1_identity_mapping/Cargo.lock
+++ b/11_virtual_mem_part1_identity_mapping/Cargo.lock
@@ -1,10 +1,12 @@
 # This file is automatically @generated by Cargo.
 # It is not intended for manual editing.
+version = 3
+
 [[package]]
 name = "cortex-a"
-version = "5.1.2"
+version = "5.1.6"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d33a61602f83c3fff3e092967ad4d5d820a9fea7bc418e119616872085fe731d"
+checksum = "ecefc30975eb87afc5a810d4b2305c0ec29e607ea97e51b2ecd80766e9268d28"
 dependencies = [
  "register",
 ]
diff --git a/12_exceptions_part1_groundwork/Cargo.lock b/12_exceptions_part1_groundwork/Cargo.lock
index e87b55afe..a3d8bb9ae 100644
--- a/12_exceptions_part1_groundwork/Cargo.lock
+++ b/12_exceptions_part1_groundwork/Cargo.lock
@@ -1,10 +1,12 @@
 # This file is automatically @generated by Cargo.
 # It is not intended for manual editing.
+version = 3
+
 [[package]]
 name = "cortex-a"
-version = "5.1.2"
+version = "5.1.6"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d33a61602f83c3fff3e092967ad4d5d820a9fea7bc418e119616872085fe731d"
+checksum = "ecefc30975eb87afc5a810d4b2305c0ec29e607ea97e51b2ecd80766e9268d28"
 dependencies = [
  "register",
 ]
diff --git a/13_integrated_testing/Cargo.lock b/13_integrated_testing/Cargo.lock
index b5c774991..069559203 100644
--- a/13_integrated_testing/Cargo.lock
+++ b/13_integrated_testing/Cargo.lock
@@ -1,10 +1,12 @@
 # This file is automatically @generated by Cargo.
 # It is not intended for manual editing.
+version = 3
+
 [[package]]
 name = "cortex-a"
-version = "5.1.2"
+version = "5.1.6"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d33a61602f83c3fff3e092967ad4d5d820a9fea7bc418e119616872085fe731d"
+checksum = "ecefc30975eb87afc5a810d4b2305c0ec29e607ea97e51b2ecd80766e9268d28"
 dependencies = [
  "register",
 ]
@@ -37,9 +39,9 @@ checksum = "702abe3c3255be20a4d67bda326c4117081a49a57afaf752de4845091bc6b476"
 
 [[package]]
 name = "quote"
-version = "1.0.8"
+version = "1.0.9"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "991431c3519a3f36861882da93630ce66b52918dcf1b8e2fd66b397fc96f28df"
+checksum = "c3d0b9745dc2debf507c8422de05d7226cc1f0644216dfdfead988f9b1ab32a7"
 dependencies = [
  "proc-macro2",
 ]
@@ -55,9 +57,9 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.59"
+version = "1.0.62"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "07cb8b1b4ebf86a89ee88cbd201b022b94138c623644d035185c84d3f41b7e66"
+checksum = "123a78a3596b24fee53a6464ce52d8ecbf62241e6294c7e7fe12086cd161f512"
 dependencies = [
  "proc-macro2",
  "quote",
diff --git a/14_exceptions_part2_peripheral_IRQs/Cargo.lock b/14_exceptions_part2_peripheral_IRQs/Cargo.lock
index b5c774991..069559203 100644
--- a/14_exceptions_part2_peripheral_IRQs/Cargo.lock
+++ b/14_exceptions_part2_peripheral_IRQs/Cargo.lock
@@ -1,10 +1,12 @@
 # This file is automatically @generated by Cargo.
 # It is not intended for manual editing.
+version = 3
+
 [[package]]
 name = "cortex-a"
-version = "5.1.2"
+version = "5.1.6"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d33a61602f83c3fff3e092967ad4d5d820a9fea7bc418e119616872085fe731d"
+checksum = "ecefc30975eb87afc5a810d4b2305c0ec29e607ea97e51b2ecd80766e9268d28"
 dependencies = [
  "register",
 ]
@@ -37,9 +39,9 @@ checksum = "702abe3c3255be20a4d67bda326c4117081a49a57afaf752de4845091bc6b476"
 
 [[package]]
 name = "quote"
-version = "1.0.8"
+version = "1.0.9"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "991431c3519a3f36861882da93630ce66b52918dcf1b8e2fd66b397fc96f28df"
+checksum = "c3d0b9745dc2debf507c8422de05d7226cc1f0644216dfdfead988f9b1ab32a7"
 dependencies = [
  "proc-macro2",
 ]
@@ -55,9 +57,9 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.59"
+version = "1.0.62"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "07cb8b1b4ebf86a89ee88cbd201b022b94138c623644d035185c84d3f41b7e66"
+checksum = "123a78a3596b24fee53a6464ce52d8ecbf62241e6294c7e7fe12086cd161f512"
 dependencies = [
  "proc-macro2",
  "quote",
diff --git a/15_virtual_mem_part2_mmio_remap/Cargo.lock b/15_virtual_mem_part2_mmio_remap/Cargo.lock
index b5c774991..069559203 100644
--- a/15_virtual_mem_part2_mmio_remap/Cargo.lock
+++ b/15_virtual_mem_part2_mmio_remap/Cargo.lock
@@ -1,10 +1,12 @@
 # This file is automatically @generated by Cargo.
 # It is not intended for manual editing.
+version = 3
+
 [[package]]
 name = "cortex-a"
-version = "5.1.2"
+version = "5.1.6"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d33a61602f83c3fff3e092967ad4d5d820a9fea7bc418e119616872085fe731d"
+checksum = "ecefc30975eb87afc5a810d4b2305c0ec29e607ea97e51b2ecd80766e9268d28"
 dependencies = [
  "register",
 ]
@@ -37,9 +39,9 @@ checksum = "702abe3c3255be20a4d67bda326c4117081a49a57afaf752de4845091bc6b476"
 
 [[package]]
 name = "quote"
-version = "1.0.8"
+version = "1.0.9"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "991431c3519a3f36861882da93630ce66b52918dcf1b8e2fd66b397fc96f28df"
+checksum = "c3d0b9745dc2debf507c8422de05d7226cc1f0644216dfdfead988f9b1ab32a7"
 dependencies = [
  "proc-macro2",
 ]
@@ -55,9 +57,9 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.59"
+version = "1.0.62"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "07cb8b1b4ebf86a89ee88cbd201b022b94138c623644d035185c84d3f41b7e66"
+checksum = "123a78a3596b24fee53a6464ce52d8ecbf62241e6294c7e7fe12086cd161f512"
 dependencies = [
  "proc-macro2",
  "quote",
diff --git a/X1_JTAG_boot/Cargo.lock b/X1_JTAG_boot/Cargo.lock
index e87b55afe..a3d8bb9ae 100644
--- a/X1_JTAG_boot/Cargo.lock
+++ b/X1_JTAG_boot/Cargo.lock
@@ -1,10 +1,12 @@
 # This file is automatically @generated by Cargo.
 # It is not intended for manual editing.
+version = 3
+
 [[package]]
 name = "cortex-a"
-version = "5.1.2"
+version = "5.1.6"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d33a61602f83c3fff3e092967ad4d5d820a9fea7bc418e119616872085fe731d"
+checksum = "ecefc30975eb87afc5a810d4b2305c0ec29e607ea97e51b2ecd80766e9268d28"
 dependencies = [
  "register",
 ]

From e451d9d62c5a076d718a259770db6df1af6676c7 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sun, 7 Mar 2021 21:14:15 +0100
Subject: [PATCH 032/214] Fix accidentally commited temp change

---
 15_virtual_mem_part2_mmio_remap/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/15_virtual_mem_part2_mmio_remap/Makefile b/15_virtual_mem_part2_mmio_remap/Makefile
index 206b3d970..4f7561dbd 100644
--- a/15_virtual_mem_part2_mmio_remap/Makefile
+++ b/15_virtual_mem_part2_mmio_remap/Makefile
@@ -170,7 +170,7 @@ objdump: $(KERNEL_ELF)
 	@$(DOCKER_ELFTOOLS) $(OBJDUMP_BINARY) --disassemble --demangle $(KERNEL_ELF) | rustfilt
 
 nm: $(KERNEL_ELF)
-	$(DOCKER_ELFTOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
+	@$(DOCKER_ELFTOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
 # For rust-analyzer
 check:

From 5e65a801457dfbd7aece97f5d4723abdfce85274 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Thu, 11 Mar 2021 23:14:08 +0100
Subject: [PATCH 033/214] Rework conditional compilation for lib.rs for tests

---
 13_integrated_testing/Cargo.toml              |   4 +-
 13_integrated_testing/Makefile                |   9 +-
 13_integrated_testing/README.md               | 237 ++++++++++--------
 .../src/_arch/aarch64/cpu.rs                  |   4 +
 13_integrated_testing/src/cpu.rs              |   5 +-
 13_integrated_testing/src/lib.rs              |   1 +
 13_integrated_testing/src/panic_wait.rs       |  33 +--
 .../tests/00_console_sanity.rs                |   9 +-
 .../tests/01_timer_sanity.rs                  |   5 +-
 .../tests/02_exception_sync_page_fault.rs     |   9 +-
 .../tests/panic_exit_failure/mod.rs           |   9 -
 .../Cargo.toml                                |   4 +-
 14_exceptions_part2_peripheral_IRQs/Makefile  |   9 +-
 14_exceptions_part2_peripheral_IRQs/README.md |   4 +-
 .../src/_arch/aarch64/cpu.rs                  |   4 +
 .../src/cpu.rs                                |   5 +-
 .../src/lib.rs                                |   1 +
 .../src/panic_wait.rs                         |  33 +--
 .../tests/00_console_sanity.rs                |   9 +-
 .../tests/01_timer_sanity.rs                  |   5 +-
 .../tests/02_exception_sync_page_fault.rs     |   9 +-
 .../tests/03_exception_irq_sanity.rs          |   2 -
 .../tests/panic_exit_failure/mod.rs           |   9 -
 15_virtual_mem_part2_mmio_remap/Cargo.toml    |   4 +-
 15_virtual_mem_part2_mmio_remap/Makefile      |   9 +-
 15_virtual_mem_part2_mmio_remap/README.md     |   8 +-
 .../src/_arch/aarch64/cpu.rs                  |   4 +
 15_virtual_mem_part2_mmio_remap/src/cpu.rs    |   5 +-
 15_virtual_mem_part2_mmio_remap/src/lib.rs    |   1 +
 .../src/panic_wait.rs                         |  33 +--
 .../tests/00_console_sanity.rs                |   9 +-
 .../tests/01_timer_sanity.rs                  |   5 +-
 .../tests/02_exception_sync_page_fault.rs     |   9 +-
 .../tests/03_exception_irq_sanity.rs          |   2 -
 .../tests/panic_exit_failure/mod.rs           |   9 -
 X1_JTAG_boot/jtag_boot_rpi3.img               | Bin 8128 -> 8144 bytes
 36 files changed, 249 insertions(+), 268 deletions(-)
 delete mode 100644 13_integrated_testing/tests/panic_exit_failure/mod.rs
 delete mode 100644 14_exceptions_part2_peripheral_IRQs/tests/panic_exit_failure/mod.rs
 delete mode 100644 15_virtual_mem_part2_mmio_remap/tests/panic_exit_failure/mod.rs

diff --git a/13_integrated_testing/Cargo.toml b/13_integrated_testing/Cargo.toml
index 5d57cf357..206dfc878 100644
--- a/13_integrated_testing/Cargo.toml
+++ b/13_integrated_testing/Cargo.toml
@@ -7,22 +7,22 @@ edition = "2018"
 [profile.release]
 lto = true
 
-# The features section is used to select the target board.
 [features]
 default = []
 bsp_rpi3 = ["register"]
 bsp_rpi4 = ["register"]
+test_build = ["qemu-exit"]
 
 ##--------------------------------------------------------------------------------------------------
 ## Dependencies
 ##--------------------------------------------------------------------------------------------------
 
 [dependencies]
-qemu-exit = "1.x.x"
 test-types = { path = "test-types" }
 
 # Optional dependencies
 register = { version = "1.x.x", features = ["no_std_unit_tests"], optional = true }
+qemu-exit = { version = "1.x.x", optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
diff --git a/13_integrated_testing/Makefile b/13_integrated_testing/Makefile
index 4f7561dbd..74e67da50 100644
--- a/13_integrated_testing/Makefile
+++ b/13_integrated_testing/Makefile
@@ -57,9 +57,9 @@ QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
-FEATURES      = bsp_$(BSP)
+FEATURES      = --features bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
-    --features $(FEATURES)         \
+    $(FEATURES)                    \
     --release
 
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
@@ -124,12 +124,15 @@ qemu: $(KERNEL_BIN)
 define KERNEL_TEST_RUNNER
     #!/usr/bin/env bash
 
-    $(OBJCOPY_CMD) $$1 $$1.img
+    TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
     TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
+
+    $(OBJCOPY_CMD) $$TEST_ELF $$TEST_BINARY
     $(DOCKER_TEST) ruby tests/runner.rb $(EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
 endef
 
 export KERNEL_TEST_RUNNER
+test: FEATURES += --features test_build
 test:
 	@mkdir -p target
 	@echo "$$KERNEL_TEST_RUNNER" > target/kernel_test_runner.sh
diff --git a/13_integrated_testing/README.md b/13_integrated_testing/README.md
index 383b0a0dd..3f62ef6c7 100644
--- a/13_integrated_testing/README.md
+++ b/13_integrated_testing/README.md
@@ -210,13 +210,13 @@ The convetion is that as long as the test function does not `panic!`, the test w
 
 The last of the attributes we added is `#![reexport_test_harness_main = "test_main"]`. Remember that
 our kernel uses the `no_main` attribute, and that we also set it for the test compilation. We did
-that because we wrote our own `_start()` function (in `aarch64.rs`), which kicks off the following
-call chain during kernel boot:
+that because we wrote our own `_start()` function, which kicks off the following call chain during
+kernel boot:
 
 | | Function  | File |
 | - | - | - |
 | 1. | `_start()` | `lib.rs` |
-| 2. | (some more arch64 code) | `lib.rs` |
+| 2. | (some more aarch64 code) | `lib.rs` |
 | 3. | `runtime_init()` | `lib.rs` |
 | 4. | `kernel_init()` | `main.rs` |
 | 5. | `kernel_main()` | `main.rs` |
@@ -237,6 +237,7 @@ implementation in `lib.rs`:
 #[cfg(test)]
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    exception::handling_init();
     bsp::console::qemu_bring_up_console();
 
     test_main();
@@ -245,12 +246,12 @@ unsafe fn kernel_init() -> ! {
 }
 ```
 
-Note that we first call `bsp::console::qemu_bring_up_console()`. Since we are running all our tests
-inside `QEMU`, we need to ensure that whatever peripheral implements the kernel's `console`
-interface is initialized, so that we can print from our tests. If you recall [tutorial 03], bringing
-up peripherals in `QEMU` might not need the full initialization as is needed on real hardware
-(setting clocks, config registers, etc...) due to the abstractions in `QEMU`'s emulation code. So
-this is an opportunity to cut down on setup code.
+Note the call to `bsp::console::qemu_bring_up_console()`. Since we are running all our tests inside
+`QEMU`, we need to ensure that whatever peripheral implements the kernel's `console` interface is
+initialized, so that we can print from our tests. If you recall [tutorial 03], bringing up
+peripherals in `QEMU` might not need the full initialization as is needed on real hardware (setting
+clocks, config registers, etc...) due to the abstractions in `QEMU`'s emulation code. So this is an
+opportunity to cut down on setup code.
 
 [tutorial 03]: ../03_hacky_hello_world
 
@@ -290,16 +291,20 @@ following exit calls for the kernel:
 //--------------------------------------------------------------------------------------------------
 // Testing
 //--------------------------------------------------------------------------------------------------
+#[cfg(feature = "test_build")]
 use qemu_exit::QEMUExit;
 
+#[cfg(feature = "test_build")]
 const QEMU_EXIT_HANDLE: qemu_exit::AArch64 = qemu_exit::AArch64::new();
 
 /// Make the host QEMU binary execute `exit(1)`.
+#[cfg(feature = "test_build")]
 pub fn qemu_exit_failure() -> ! {
     QEMU_EXIT_HANDLE.exit_failure()
 }
 
 /// Make the host QEMU binary execute `exit(0)`.
+#[cfg(feature = "test_build")]
 pub fn qemu_exit_success() -> ! {
     QEMU_EXIT_HANDLE.exit_success()
 }
@@ -308,6 +313,10 @@ pub fn qemu_exit_success() -> ! {
 [Click here] in case you are interested in the implementation. Note that for the functions to work,
 the `-semihosting` flag must be added to the `QEMU` invocation.
 
+You might have also noted the `#[cfg(feature = "test_build")]`. In the `Makefile`, we ensure that
+this feature is only enabled when `cargo test` runs. This way, it is ensured that testing-specific
+code is conditionally compiled only for testing.
+
 [exit status]: https://en.wikipedia.org/wiki/Exit_status
 [@phil-opp]: https://github.com/phil-opp
 [learned how to do this]: https://os.phil-opp.com/testing/#exiting-qemu
@@ -322,19 +331,29 @@ Unit test failure shall be triggered by the `panic!` macro, either directly or b
 safely park the panicked CPU core in a busy loop. This can't be used for the unit tests, because
 `cargo` would wait forever for `QEMU` to exit and stall the whole test run. Again, conditional
 compilation is used to differentiate between a release and testing version of how a `panic!`
-concludes. Here is the new testing version:
+concludes:
 
 ```rust
-/// The point of exit when the library is compiled for testing.
-#[cfg(test)]
+/// The point of exit for `libkernel`.
+///
+/// It is linked weakly, so that the integration tests can overload its standard behavior.
+#[linkage = "weak"]
 #[no_mangle]
 fn _panic_exit() -> ! {
-    cpu::qemu_exit_failure()
+    #[cfg(not(test_build))]
+    {
+        cpu::wait_forever()
+    }
+
+    #[cfg(test_build)]
+    {
+        cpu::qemu_exit_failure()
+    }
 }
 ```
 
-In case none of the unit tests panicked, `lib.rs`'s  `kernel_init()` calls
-`cpu::qemu_exit_success()` to successfully conclude the unit test run.
+In case none of the unit tests panicked, `lib.rs`'s `kernel_init()` calls `cpu::qemu_exit_success()`
+to successfully conclude the unit test run.
 
 ### Controlling Test Kernel Execution
 
@@ -363,12 +382,15 @@ The file `kernel_test_runner.sh` does not exist by default. We generate it on de
 define KERNEL_TEST_RUNNER
     #!/usr/bin/env bash
 
-    $(OBJCOPY_CMD) $$1 $$1.img
+    TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
     TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
+
+    $(OBJCOPY_CMD) $$TEST_ELF $$TEST_BINARY
     $(DOCKER_TEST) ruby tests/runner.rb $(EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
 endef
 
 export KERNEL_TEST_RUNNER
+test: FEATURES += --features test_build
 test:
 	@mkdir -p target
 	@echo "$$KERNEL_TEST_RUNNER" > target/kernel_test_runner.sh
@@ -525,14 +547,13 @@ your test code into individual chunks. For example, take a look at `tests/01_tim
 #![reexport_test_harness_main = "test_main"]
 #![test_runner(libkernel::test_runner)]
 
-mod panic_exit_failure;
-
 use core::time::Duration;
-use libkernel::{bsp, cpu, time, time::interface::TimeManager};
+use libkernel::{bsp, cpu, exception, time, time::interface::TimeManager};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    exception::handling_init();
     bsp::console::qemu_bring_up_console();
 
     // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
@@ -579,30 +600,34 @@ harness = false
 
 #### Overriding Panic Behavior
 
-It is also important to understand that the `libkernel` made available to the integration tests is
-the _release_ version. Therefore, it won't contain any code attributed with `#[cfg(test)]`!
-
-One of the implications of this is that the `panic handler` provided by `libkernel` will be the
-version from the release kernel that spins forever, and not the test version that exits `QEMU`.
-
-One way to navigate around this is to declare the _release version of the panic exit function_ in
-`lib.rs` as a [weak symbol]:
+Did you notice the `#[linkage = "weak"]` attribute some chapters earlier at the `_panic_exit()`
+function? This marks the function in `lib.rs` as a [weak symbol]. Let's look at it again:
 
 ```rust
-#[cfg(not(test))]
+/// The point of exit for `libkernel`.
+///
+/// It is linked weakly, so that the integration tests can overload its standard behavior.
 #[linkage = "weak"]
 #[no_mangle]
 fn _panic_exit() -> ! {
-    cpu::wait_forever()
+    #[cfg(not(test_build))]
+    {
+        cpu::wait_forever()
+    }
+
+    #[cfg(test_build)]
+    {
+        cpu::qemu_exit_failure()
+    }
 }
 ```
 
 [weak symbol]: https://en.wikipedia.org/wiki/Weak_symbol
 
-Integration tests in `$CRATE/tests/` can now override it according to their needs, because depending
-on the kind of test, a `panic!` could mean success or failure. For example,
-`tests/02_exception_sync_page_fault.rs` is intentionally causing a page fault, so the wanted outcome
-is a `panic!`. Here is the whole test (minus some inline comments):
+This enables integration tests in `$CRATE/tests/` to override this function according to their
+needs. This is useful because depending on the kind of test, a `panic!` could mean success or
+failure. For example, `tests/02_exception_sync_page_fault.rs` is intentionally causing a page fault,
+so the wanted outcome is a `panic!`. Here is the whole test (minus some inline comments):
 
 ```rust
 //! Page faults must result in synchronous exceptions.
@@ -619,13 +644,12 @@ use libkernel::{bsp, cpu, exception, memory, println};
 unsafe fn kernel_init() -> ! {
     use memory::mmu::interface::MMU;
 
+    exception::handling_init();
     bsp::console::qemu_bring_up_console();
 
     println!("Testing synchronous exception handling by causing a page fault");
     println!("-------------------------------------------------------------------\n");
 
-    exception::handling_init();
-
     if let Err(string) = memory::mmu::mmu().init() {
         println!("MMU: {}", string);
         cpu::qemu_exit_failure()
@@ -638,11 +662,11 @@ unsafe fn kernel_init() -> ! {
     // If execution reaches here, the memory access above did not cause a page fault exception.
     cpu::qemu_exit_failure()
 }
+
 ```
 
 The `_panic_exit()` version that makes `QEMU` return `0` (indicating test success) is pulled in by
-`mod panic_exit_success;`. The counterpart would be `mod panic_exit_failure;`. We provide both in
-the `tests` folder, so each integration test can import the one that it needs.
+`mod panic_exit_success;`, and it will take precedence over the `weak` version from `lib.rs`.
 
 ### Console Tests
 
@@ -685,16 +709,15 @@ The subtest first sends `"ABC"` over the console to the kernel, and then expects
 #![no_main]
 #![no_std]
 
-mod panic_exit_failure;
-
-use libkernel::{bsp, console, print};
+use libkernel::{bsp, console, exception, print};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use bsp::console::{console, qemu_bring_up_console};
+    use bsp::console::console;
     use console::interface::*;
 
-    qemu_bring_up_console();
+    exception::handling_init();
+    bsp::console::qemu_bring_up_console();
 
     // Handshake
     assert_eq!(console().read_char(), 'A');
@@ -796,16 +819,28 @@ diff -uNr 12_exceptions_part1_groundwork/.cargo/config.toml 13_integrated_testin
 diff -uNr 12_exceptions_part1_groundwork/Cargo.toml 13_integrated_testing/Cargo.toml
 --- 12_exceptions_part1_groundwork/Cargo.toml
 +++ 13_integrated_testing/Cargo.toml
-@@ -18,11 +18,38 @@
+@@ -7,22 +7,49 @@
+ [profile.release]
+ lto = true
+
+-# The features section is used to select the target board.
+ [features]
+ default = []
+ bsp_rpi3 = ["register"]
+ bsp_rpi4 = ["register"]
++test_build = ["qemu-exit"]
+
+ ##--------------------------------------------------------------------------------------------------
+ ## Dependencies
  ##--------------------------------------------------------------------------------------------------
 
  [dependencies]
-+qemu-exit = "1.x.x"
 +test-types = { path = "test-types" }
 
  # Optional dependencies
 -register = { version = "1.x.x", optional = true }
 +register = { version = "1.x.x", features = ["no_std_unit_tests"], optional = true }
++qemu-exit = { version = "1.x.x", optional = true }
 
  # Platform specific dependencies
  [target.'cfg(target_arch = "aarch64")'.dependencies]
@@ -856,7 +891,7 @@ diff -uNr 12_exceptions_part1_groundwork/Makefile 13_integrated_testing/Makefile
      OBJDUMP_BINARY    = aarch64-none-elf-objdump
      NM_BINARY         = aarch64-none-elf-nm
      OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
-@@ -41,6 +43,17 @@
+@@ -41,18 +43,30 @@
  # Export for build.rs
  export LINKER_FILE
 
@@ -874,7 +909,14 @@ diff -uNr 12_exceptions_part1_groundwork/Makefile 13_integrated_testing/Makefile
  RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
  RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
-@@ -53,6 +66,7 @@
+-FEATURES      = bsp_$(BSP)
++FEATURES      = --features bsp_$(BSP)
+ COMPILER_ARGS = --target=$(TARGET) \
+-    --features $(FEATURES)         \
++    $(FEATURES)                    \
+     --release
+
+ RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
  DOC_CMD     = cargo doc $(COMPILER_ARGS)
  CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
  CHECK_CMD   = cargo check $(COMPILER_ARGS)
@@ -901,7 +943,7 @@ diff -uNr 12_exceptions_part1_groundwork/Makefile 13_integrated_testing/Makefile
 
  all: $(KERNEL_BIN)
 
-@@ -100,11 +115,26 @@
+@@ -100,11 +115,29 @@
  	$(DOC_CMD) --document-private-items --open
 
  ifeq ($(QEMU_MACHINE_TYPE),)
@@ -916,12 +958,15 @@ diff -uNr 12_exceptions_part1_groundwork/Makefile 13_integrated_testing/Makefile
 +define KERNEL_TEST_RUNNER
 +    #!/usr/bin/env bash
 +
-+    $(OBJCOPY_CMD) $$1 $$1.img
++    TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
 +    TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
++
++    $(OBJCOPY_CMD) $$TEST_ELF $$TEST_BINARY
 +    $(DOCKER_TEST) ruby tests/runner.rb $(EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
 +endef
 +
 +export KERNEL_TEST_RUNNER
++test: FEATURES += --features test_build
 +test:
 +	@mkdir -p target
 +	@echo "$$KERNEL_TEST_RUNNER" > target/kernel_test_runner.sh
@@ -934,7 +979,7 @@ diff -uNr 12_exceptions_part1_groundwork/Makefile 13_integrated_testing/Makefile
 diff -uNr 12_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs 13_integrated_testing/src/_arch/aarch64/cpu.rs
 --- 12_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs
 +++ 13_integrated_testing/src/_arch/aarch64/cpu.rs
-@@ -26,3 +26,20 @@
+@@ -26,3 +26,24 @@
          asm::wfe()
      }
  }
@@ -942,16 +987,20 @@ diff -uNr 12_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs 13_integrated_
 +//--------------------------------------------------------------------------------------------------
 +// Testing
 +//--------------------------------------------------------------------------------------------------
++#[cfg(feature = "test_build")]
 +use qemu_exit::QEMUExit;
 +
++#[cfg(feature = "test_build")]
 +const QEMU_EXIT_HANDLE: qemu_exit::AArch64 = qemu_exit::AArch64::new();
 +
 +/// Make the host QEMU binary execute `exit(1)`.
++#[cfg(feature = "test_build")]
 +pub fn qemu_exit_failure() -> ! {
 +    QEMU_EXIT_HANDLE.exit_failure()
 +}
 +
 +/// Make the host QEMU binary execute `exit(0)`.
++#[cfg(feature = "test_build")]
 +pub fn qemu_exit_success() -> ! {
 +    QEMU_EXIT_HANDLE.exit_success()
 +}
@@ -1121,12 +1170,13 @@ diff -uNr 12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs 13_in
 diff -uNr 12_exceptions_part1_groundwork/src/cpu.rs 13_integrated_testing/src/cpu.rs
 --- 12_exceptions_part1_groundwork/src/cpu.rs
 +++ 13_integrated_testing/src/cpu.rs
-@@ -15,4 +15,4 @@
- //--------------------------------------------------------------------------------------------------
+@@ -16,3 +16,6 @@
  // Architectural Public Reexports
  //--------------------------------------------------------------------------------------------------
--pub use arch_cpu::{nop, wait_forever};
-+pub use arch_cpu::{nop, qemu_exit_failure, qemu_exit_success, wait_forever};
+ pub use arch_cpu::{nop, wait_forever};
++
++#[cfg(feature = "test_build")]
++pub use arch_cpu::{qemu_exit_failure, qemu_exit_success};
 
 diff -uNr 12_exceptions_part1_groundwork/src/exception.rs 13_integrated_testing/src/exception.rs
 --- 12_exceptions_part1_groundwork/src/exception.rs
@@ -1157,7 +1207,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/exception.rs 13_integrated_testing/
 diff -uNr 12_exceptions_part1_groundwork/src/lib.rs 13_integrated_testing/src/lib.rs
 --- 12_exceptions_part1_groundwork/src/lib.rs
 +++ 13_integrated_testing/src/lib.rs
-@@ -0,0 +1,170 @@
+@@ -0,0 +1,171 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -1322,6 +1372,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/lib.rs 13_integrated_testing/src/li
 +#[cfg(test)]
 +#[no_mangle]
 +unsafe fn kernel_init() -> ! {
++    exception::handling_init();
 +    bsp::console::qemu_bring_up_console();
 +
 +    test_main();
@@ -1590,43 +1641,32 @@ diff -uNr 12_exceptions_part1_groundwork/src/panic_wait.rs 13_integrated_testing
      unsafe { bsp::console::panic_console_out().write_fmt(args).unwrap() };
  }
 
-+/// The point of exit for the "standard" (non-testing) `libkernel`.
-+///
-+/// This code will be used by the release kernel binary and the `integration tests`. It is linked
-+/// weakly, so that the integration tests can overload it to exit `QEMU` instead of spinning
-+/// forever.
++/// The point of exit for `libkernel`.
 +///
-+/// This is one possible approach to solve the problem that `cargo` can not know who the consumer of
-+/// the library will be:
-+///   - The release kernel binary that should safely park the paniced core,
-+///   - or an `integration test` that is executed in QEMU, which should just exit QEMU.
-+#[cfg(not(test))]
++/// It is linked weakly, so that the integration tests can overload its standard behavior.
 +#[linkage = "weak"]
 +#[no_mangle]
 +fn _panic_exit() -> ! {
-+    cpu::wait_forever()
++    #[cfg(not(test_build))]
++    {
++        cpu::wait_forever()
++    }
++
++    #[cfg(test_build)]
++    {
++        cpu::qemu_exit_failure()
++    }
 +}
 +
  /// Prints with a newline - only use from the panic handler.
  ///
  /// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
-@@ -35,5 +52,16 @@
+@@ -35,5 +52,5 @@
          panic_println!("\nKernel panic!");
      }
 
 -    cpu::wait_forever()
 +    _panic_exit()
-+}
-+
-+//--------------------------------------------------------------------------------------------------
-+// Testing
-+//--------------------------------------------------------------------------------------------------
-+
-+/// The point of exit when the library is compiled for testing.
-+#[cfg(test)]
-+#[no_mangle]
-+fn _panic_exit() -> ! {
-+    cpu::qemu_exit_failure()
  }
 
 diff -uNr 12_exceptions_part1_groundwork/src/runtime_init.rs 13_integrated_testing/src/runtime_init.rs
@@ -1757,7 +1797,7 @@ diff -uNr 12_exceptions_part1_groundwork/tests/00_console_sanity.rb 13_integrate
 diff -uNr 12_exceptions_part1_groundwork/tests/00_console_sanity.rs 13_integrated_testing/tests/00_console_sanity.rs
 --- 12_exceptions_part1_groundwork/tests/00_console_sanity.rs
 +++ 13_integrated_testing/tests/00_console_sanity.rs
-@@ -0,0 +1,36 @@
+@@ -0,0 +1,35 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -1768,16 +1808,15 @@ diff -uNr 12_exceptions_part1_groundwork/tests/00_console_sanity.rs 13_integrate
 +#![no_main]
 +#![no_std]
 +
-+mod panic_exit_failure;
-+
-+use libkernel::{bsp, console, print};
++use libkernel::{bsp, console, exception, print};
 +
 +#[no_mangle]
 +unsafe fn kernel_init() -> ! {
-+    use bsp::console::{console, qemu_bring_up_console};
++    use bsp::console::console;
 +    use console::interface::*;
 +
-+    qemu_bring_up_console();
++    exception::handling_init();
++    bsp::console::qemu_bring_up_console();
 +
 +    // Handshake
 +    assert_eq!(console().read_char(), 'A');
@@ -1798,7 +1837,7 @@ diff -uNr 12_exceptions_part1_groundwork/tests/00_console_sanity.rs 13_integrate
 diff -uNr 12_exceptions_part1_groundwork/tests/01_timer_sanity.rs 13_integrated_testing/tests/01_timer_sanity.rs
 --- 12_exceptions_part1_groundwork/tests/01_timer_sanity.rs
 +++ 13_integrated_testing/tests/01_timer_sanity.rs
-@@ -0,0 +1,50 @@
+@@ -0,0 +1,49 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -1811,14 +1850,13 @@ diff -uNr 12_exceptions_part1_groundwork/tests/01_timer_sanity.rs 13_integrated_
 +#![reexport_test_harness_main = "test_main"]
 +#![test_runner(libkernel::test_runner)]
 +
-+mod panic_exit_failure;
-+
 +use core::time::Duration;
-+use libkernel::{bsp, cpu, time, time::interface::TimeManager};
++use libkernel::{bsp, cpu, exception, time, time::interface::TimeManager};
 +use test_macros::kernel_test;
 +
 +#[no_mangle]
 +unsafe fn kernel_init() -> ! {
++    exception::handling_init();
 +    bsp::console::qemu_bring_up_console();
 +
 +    // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
@@ -1853,7 +1891,7 @@ diff -uNr 12_exceptions_part1_groundwork/tests/01_timer_sanity.rs 13_integrated_
 diff -uNr 12_exceptions_part1_groundwork/tests/02_exception_sync_page_fault.rs 13_integrated_testing/tests/02_exception_sync_page_fault.rs
 --- 12_exceptions_part1_groundwork/tests/02_exception_sync_page_fault.rs
 +++ 13_integrated_testing/tests/02_exception_sync_page_fault.rs
-@@ -0,0 +1,44 @@
+@@ -0,0 +1,43 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -1864,10 +1902,10 @@ diff -uNr 12_exceptions_part1_groundwork/tests/02_exception_sync_page_fault.rs 1
 +#![no_main]
 +#![no_std]
 +
-+/// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
++/// Overwrites libkernel's `panic_wait::_panic_exit()` so that it returns a "success" code.
 +///
-+/// Reaching this code is a success, because it is called from the synchronous exception handler,
-+/// which is what this test wants to achieve.
++/// In this test, teaching the panic is a success, because it is called from the synchronous
++/// exception handler, which is what this test wants to achieve.
 +///
 +/// It also means that this integration test can not use any other code that calls panic!() directly
 +/// or indirectly.
@@ -1879,13 +1917,12 @@ diff -uNr 12_exceptions_part1_groundwork/tests/02_exception_sync_page_fault.rs 1
 +unsafe fn kernel_init() -> ! {
 +    use memory::mmu::interface::MMU;
 +
++    exception::handling_init();
 +    bsp::console::qemu_bring_up_console();
 +
 +    println!("Testing synchronous exception handling by causing a page fault");
 +    println!("-------------------------------------------------------------------\n");
 +
-+    exception::handling_init();
-+
 +    if let Err(string) = memory::mmu::mmu().init() {
 +        println!("MMU: {}", string);
 +        cpu::qemu_exit_failure()
@@ -1899,20 +1936,6 @@ diff -uNr 12_exceptions_part1_groundwork/tests/02_exception_sync_page_fault.rs 1
 +    cpu::qemu_exit_failure()
 +}
 
-diff -uNr 12_exceptions_part1_groundwork/tests/panic_exit_failure/mod.rs 13_integrated_testing/tests/panic_exit_failure/mod.rs
---- 12_exceptions_part1_groundwork/tests/panic_exit_failure/mod.rs
-+++ 13_integrated_testing/tests/panic_exit_failure/mod.rs
-@@ -0,0 +1,9 @@
-+// SPDX-License-Identifier: MIT OR Apache-2.0
-+//
-+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
-+
-+/// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
-+#[no_mangle]
-+fn _panic_exit() -> ! {
-+    libkernel::cpu::qemu_exit_failure()
-+}
-
 diff -uNr 12_exceptions_part1_groundwork/tests/panic_exit_success/mod.rs 13_integrated_testing/tests/panic_exit_success/mod.rs
 --- 12_exceptions_part1_groundwork/tests/panic_exit_success/mod.rs
 +++ 13_integrated_testing/tests/panic_exit_success/mod.rs
diff --git a/13_integrated_testing/src/_arch/aarch64/cpu.rs b/13_integrated_testing/src/_arch/aarch64/cpu.rs
index 948bad747..56443865a 100644
--- a/13_integrated_testing/src/_arch/aarch64/cpu.rs
+++ b/13_integrated_testing/src/_arch/aarch64/cpu.rs
@@ -30,16 +30,20 @@ pub fn wait_forever() -> ! {
 //--------------------------------------------------------------------------------------------------
 // Testing
 //--------------------------------------------------------------------------------------------------
+#[cfg(feature = "test_build")]
 use qemu_exit::QEMUExit;
 
+#[cfg(feature = "test_build")]
 const QEMU_EXIT_HANDLE: qemu_exit::AArch64 = qemu_exit::AArch64::new();
 
 /// Make the host QEMU binary execute `exit(1)`.
+#[cfg(feature = "test_build")]
 pub fn qemu_exit_failure() -> ! {
     QEMU_EXIT_HANDLE.exit_failure()
 }
 
 /// Make the host QEMU binary execute `exit(0)`.
+#[cfg(feature = "test_build")]
 pub fn qemu_exit_success() -> ! {
     QEMU_EXIT_HANDLE.exit_success()
 }
diff --git a/13_integrated_testing/src/cpu.rs b/13_integrated_testing/src/cpu.rs
index 9c8eb6f6e..36b6a9d4c 100644
--- a/13_integrated_testing/src/cpu.rs
+++ b/13_integrated_testing/src/cpu.rs
@@ -15,4 +15,7 @@ pub mod smp;
 //--------------------------------------------------------------------------------------------------
 // Architectural Public Reexports
 //--------------------------------------------------------------------------------------------------
-pub use arch_cpu::{nop, qemu_exit_failure, qemu_exit_success, wait_forever};
+pub use arch_cpu::{nop, wait_forever};
+
+#[cfg(feature = "test_build")]
+pub use arch_cpu::{qemu_exit_failure, qemu_exit_success};
diff --git a/13_integrated_testing/src/lib.rs b/13_integrated_testing/src/lib.rs
index 3e0a9eea5..0fa216a98 100644
--- a/13_integrated_testing/src/lib.rs
+++ b/13_integrated_testing/src/lib.rs
@@ -162,6 +162,7 @@ pub fn test_runner(tests: &[&test_types::UnitTest]) {
 #[cfg(test)]
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    exception::handling_init();
     bsp::console::qemu_bring_up_console();
 
     test_main();
diff --git a/13_integrated_testing/src/panic_wait.rs b/13_integrated_testing/src/panic_wait.rs
index 61536ba80..20493a912 100644
--- a/13_integrated_testing/src/panic_wait.rs
+++ b/13_integrated_testing/src/panic_wait.rs
@@ -17,21 +17,21 @@ fn _panic_print(args: fmt::Arguments) {
     unsafe { bsp::console::panic_console_out().write_fmt(args).unwrap() };
 }
 
-/// The point of exit for the "standard" (non-testing) `libkernel`.
+/// The point of exit for `libkernel`.
 ///
-/// This code will be used by the release kernel binary and the `integration tests`. It is linked
-/// weakly, so that the integration tests can overload it to exit `QEMU` instead of spinning
-/// forever.
-///
-/// This is one possible approach to solve the problem that `cargo` can not know who the consumer of
-/// the library will be:
-///   - The release kernel binary that should safely park the paniced core,
-///   - or an `integration test` that is executed in QEMU, which should just exit QEMU.
-#[cfg(not(test))]
+/// It is linked weakly, so that the integration tests can overload its standard behavior.
 #[linkage = "weak"]
 #[no_mangle]
 fn _panic_exit() -> ! {
-    cpu::wait_forever()
+    #[cfg(not(test_build))]
+    {
+        cpu::wait_forever()
+    }
+
+    #[cfg(test_build)]
+    {
+        cpu::qemu_exit_failure()
+    }
 }
 
 /// Prints with a newline - only use from the panic handler.
@@ -54,14 +54,3 @@ fn panic(info: &PanicInfo) -> ! {
 
     _panic_exit()
 }
-
-//--------------------------------------------------------------------------------------------------
-// Testing
-//--------------------------------------------------------------------------------------------------
-
-/// The point of exit when the library is compiled for testing.
-#[cfg(test)]
-#[no_mangle]
-fn _panic_exit() -> ! {
-    cpu::qemu_exit_failure()
-}
diff --git a/13_integrated_testing/tests/00_console_sanity.rs b/13_integrated_testing/tests/00_console_sanity.rs
index 08b654aef..c3754aa9f 100644
--- a/13_integrated_testing/tests/00_console_sanity.rs
+++ b/13_integrated_testing/tests/00_console_sanity.rs
@@ -8,16 +8,15 @@
 #![no_main]
 #![no_std]
 
-mod panic_exit_failure;
-
-use libkernel::{bsp, console, print};
+use libkernel::{bsp, console, exception, print};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use bsp::console::{console, qemu_bring_up_console};
+    use bsp::console::console;
     use console::interface::*;
 
-    qemu_bring_up_console();
+    exception::handling_init();
+    bsp::console::qemu_bring_up_console();
 
     // Handshake
     assert_eq!(console().read_char(), 'A');
diff --git a/13_integrated_testing/tests/01_timer_sanity.rs b/13_integrated_testing/tests/01_timer_sanity.rs
index 52dca0fca..f39d83845 100644
--- a/13_integrated_testing/tests/01_timer_sanity.rs
+++ b/13_integrated_testing/tests/01_timer_sanity.rs
@@ -10,14 +10,13 @@
 #![reexport_test_harness_main = "test_main"]
 #![test_runner(libkernel::test_runner)]
 
-mod panic_exit_failure;
-
 use core::time::Duration;
-use libkernel::{bsp, cpu, time, time::interface::TimeManager};
+use libkernel::{bsp, cpu, exception, time, time::interface::TimeManager};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    exception::handling_init();
     bsp::console::qemu_bring_up_console();
 
     // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
diff --git a/13_integrated_testing/tests/02_exception_sync_page_fault.rs b/13_integrated_testing/tests/02_exception_sync_page_fault.rs
index bf2ba29f1..185089a3d 100644
--- a/13_integrated_testing/tests/02_exception_sync_page_fault.rs
+++ b/13_integrated_testing/tests/02_exception_sync_page_fault.rs
@@ -8,10 +8,10 @@
 #![no_main]
 #![no_std]
 
-/// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
+/// Overwrites libkernel's `panic_wait::_panic_exit()` so that it returns a "success" code.
 ///
-/// Reaching this code is a success, because it is called from the synchronous exception handler,
-/// which is what this test wants to achieve.
+/// In this test, teaching the panic is a success, because it is called from the synchronous
+/// exception handler, which is what this test wants to achieve.
 ///
 /// It also means that this integration test can not use any other code that calls panic!() directly
 /// or indirectly.
@@ -23,13 +23,12 @@ use libkernel::{bsp, cpu, exception, memory, println};
 unsafe fn kernel_init() -> ! {
     use memory::mmu::interface::MMU;
 
+    exception::handling_init();
     bsp::console::qemu_bring_up_console();
 
     println!("Testing synchronous exception handling by causing a page fault");
     println!("-------------------------------------------------------------------\n");
 
-    exception::handling_init();
-
     if let Err(string) = memory::mmu::mmu().init() {
         println!("MMU: {}", string);
         cpu::qemu_exit_failure()
diff --git a/13_integrated_testing/tests/panic_exit_failure/mod.rs b/13_integrated_testing/tests/panic_exit_failure/mod.rs
deleted file mode 100644
index af2ba3781..000000000
--- a/13_integrated_testing/tests/panic_exit_failure/mod.rs
+++ /dev/null
@@ -1,9 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
-
-/// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
-#[no_mangle]
-fn _panic_exit() -> ! {
-    libkernel::cpu::qemu_exit_failure()
-}
diff --git a/14_exceptions_part2_peripheral_IRQs/Cargo.toml b/14_exceptions_part2_peripheral_IRQs/Cargo.toml
index 5d57cf357..206dfc878 100644
--- a/14_exceptions_part2_peripheral_IRQs/Cargo.toml
+++ b/14_exceptions_part2_peripheral_IRQs/Cargo.toml
@@ -7,22 +7,22 @@ edition = "2018"
 [profile.release]
 lto = true
 
-# The features section is used to select the target board.
 [features]
 default = []
 bsp_rpi3 = ["register"]
 bsp_rpi4 = ["register"]
+test_build = ["qemu-exit"]
 
 ##--------------------------------------------------------------------------------------------------
 ## Dependencies
 ##--------------------------------------------------------------------------------------------------
 
 [dependencies]
-qemu-exit = "1.x.x"
 test-types = { path = "test-types" }
 
 # Optional dependencies
 register = { version = "1.x.x", features = ["no_std_unit_tests"], optional = true }
+qemu-exit = { version = "1.x.x", optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
diff --git a/14_exceptions_part2_peripheral_IRQs/Makefile b/14_exceptions_part2_peripheral_IRQs/Makefile
index 4f7561dbd..74e67da50 100644
--- a/14_exceptions_part2_peripheral_IRQs/Makefile
+++ b/14_exceptions_part2_peripheral_IRQs/Makefile
@@ -57,9 +57,9 @@ QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
-FEATURES      = bsp_$(BSP)
+FEATURES      = --features bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
-    --features $(FEATURES)         \
+    $(FEATURES)                    \
     --release
 
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
@@ -124,12 +124,15 @@ qemu: $(KERNEL_BIN)
 define KERNEL_TEST_RUNNER
     #!/usr/bin/env bash
 
-    $(OBJCOPY_CMD) $$1 $$1.img
+    TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
     TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
+
+    $(OBJCOPY_CMD) $$TEST_ELF $$TEST_BINARY
     $(DOCKER_TEST) ruby tests/runner.rb $(EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
 endef
 
 export KERNEL_TEST_RUNNER
+test: FEATURES += --features test_build
 test:
 	@mkdir -p target
 	@echo "$$KERNEL_TEST_RUNNER" > target/kernel_test_runner.sh
diff --git a/14_exceptions_part2_peripheral_IRQs/README.md b/14_exceptions_part2_peripheral_IRQs/README.md
index c04cc9ae7..1c3cb7f0c 100644
--- a/14_exceptions_part2_peripheral_IRQs/README.md
+++ b/14_exceptions_part2_peripheral_IRQs/README.md
@@ -2627,7 +2627,7 @@ diff -uNr 13_integrated_testing/src/synchronization.rs 14_exceptions_part2_perip
 diff -uNr 13_integrated_testing/tests/03_exception_irq_sanity.rs 14_exceptions_part2_peripheral_IRQs/tests/03_exception_irq_sanity.rs
 --- 13_integrated_testing/tests/03_exception_irq_sanity.rs
 +++ 14_exceptions_part2_peripheral_IRQs/tests/03_exception_irq_sanity.rs
-@@ -0,0 +1,68 @@
+@@ -0,0 +1,66 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -2640,8 +2640,6 @@ diff -uNr 13_integrated_testing/tests/03_exception_irq_sanity.rs 14_exceptions_p
 +#![reexport_test_harness_main = "test_main"]
 +#![test_runner(libkernel::test_runner)]
 +
-+mod panic_exit_failure;
-+
 +use libkernel::{bsp, cpu, exception};
 +use test_macros::kernel_test;
 +
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu.rs b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu.rs
index 948bad747..56443865a 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu.rs
@@ -30,16 +30,20 @@ pub fn wait_forever() -> ! {
 //--------------------------------------------------------------------------------------------------
 // Testing
 //--------------------------------------------------------------------------------------------------
+#[cfg(feature = "test_build")]
 use qemu_exit::QEMUExit;
 
+#[cfg(feature = "test_build")]
 const QEMU_EXIT_HANDLE: qemu_exit::AArch64 = qemu_exit::AArch64::new();
 
 /// Make the host QEMU binary execute `exit(1)`.
+#[cfg(feature = "test_build")]
 pub fn qemu_exit_failure() -> ! {
     QEMU_EXIT_HANDLE.exit_failure()
 }
 
 /// Make the host QEMU binary execute `exit(0)`.
+#[cfg(feature = "test_build")]
 pub fn qemu_exit_success() -> ! {
     QEMU_EXIT_HANDLE.exit_success()
 }
diff --git a/14_exceptions_part2_peripheral_IRQs/src/cpu.rs b/14_exceptions_part2_peripheral_IRQs/src/cpu.rs
index 9c8eb6f6e..36b6a9d4c 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/cpu.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/cpu.rs
@@ -15,4 +15,7 @@ pub mod smp;
 //--------------------------------------------------------------------------------------------------
 // Architectural Public Reexports
 //--------------------------------------------------------------------------------------------------
-pub use arch_cpu::{nop, qemu_exit_failure, qemu_exit_success, wait_forever};
+pub use arch_cpu::{nop, wait_forever};
+
+#[cfg(feature = "test_build")]
+pub use arch_cpu::{qemu_exit_failure, qemu_exit_success};
diff --git a/14_exceptions_part2_peripheral_IRQs/src/lib.rs b/14_exceptions_part2_peripheral_IRQs/src/lib.rs
index fd4bdde51..4ea416fd5 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/lib.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/lib.rs
@@ -165,6 +165,7 @@ pub fn test_runner(tests: &[&test_types::UnitTest]) {
 #[cfg(test)]
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    exception::handling_init();
     bsp::console::qemu_bring_up_console();
 
     test_main();
diff --git a/14_exceptions_part2_peripheral_IRQs/src/panic_wait.rs b/14_exceptions_part2_peripheral_IRQs/src/panic_wait.rs
index 8c7770b6e..e3a9ed8ab 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/panic_wait.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/panic_wait.rs
@@ -17,21 +17,21 @@ fn _panic_print(args: fmt::Arguments) {
     unsafe { bsp::console::panic_console_out().write_fmt(args).unwrap() };
 }
 
-/// The point of exit for the "standard" (non-testing) `libkernel`.
+/// The point of exit for `libkernel`.
 ///
-/// This code will be used by the release kernel binary and the `integration tests`. It is linked
-/// weakly, so that the integration tests can overload it to exit `QEMU` instead of spinning
-/// forever.
-///
-/// This is one possible approach to solve the problem that `cargo` can not know who the consumer of
-/// the library will be:
-///   - The release kernel binary that should safely park the paniced core,
-///   - or an `integration test` that is executed in QEMU, which should just exit QEMU.
-#[cfg(not(test))]
+/// It is linked weakly, so that the integration tests can overload its standard behavior.
 #[linkage = "weak"]
 #[no_mangle]
 fn _panic_exit() -> ! {
-    cpu::wait_forever()
+    #[cfg(not(test_build))]
+    {
+        cpu::wait_forever()
+    }
+
+    #[cfg(test_build)]
+    {
+        cpu::qemu_exit_failure()
+    }
 }
 
 /// Prints with a newline - only use from the panic handler.
@@ -56,14 +56,3 @@ fn panic(info: &PanicInfo) -> ! {
 
     _panic_exit()
 }
-
-//--------------------------------------------------------------------------------------------------
-// Testing
-//--------------------------------------------------------------------------------------------------
-
-/// The point of exit when the library is compiled for testing.
-#[cfg(test)]
-#[no_mangle]
-fn _panic_exit() -> ! {
-    cpu::qemu_exit_failure()
-}
diff --git a/14_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs b/14_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs
index 08b654aef..c3754aa9f 100644
--- a/14_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs
+++ b/14_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs
@@ -8,16 +8,15 @@
 #![no_main]
 #![no_std]
 
-mod panic_exit_failure;
-
-use libkernel::{bsp, console, print};
+use libkernel::{bsp, console, exception, print};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use bsp::console::{console, qemu_bring_up_console};
+    use bsp::console::console;
     use console::interface::*;
 
-    qemu_bring_up_console();
+    exception::handling_init();
+    bsp::console::qemu_bring_up_console();
 
     // Handshake
     assert_eq!(console().read_char(), 'A');
diff --git a/14_exceptions_part2_peripheral_IRQs/tests/01_timer_sanity.rs b/14_exceptions_part2_peripheral_IRQs/tests/01_timer_sanity.rs
index 52dca0fca..f39d83845 100644
--- a/14_exceptions_part2_peripheral_IRQs/tests/01_timer_sanity.rs
+++ b/14_exceptions_part2_peripheral_IRQs/tests/01_timer_sanity.rs
@@ -10,14 +10,13 @@
 #![reexport_test_harness_main = "test_main"]
 #![test_runner(libkernel::test_runner)]
 
-mod panic_exit_failure;
-
 use core::time::Duration;
-use libkernel::{bsp, cpu, time, time::interface::TimeManager};
+use libkernel::{bsp, cpu, exception, time, time::interface::TimeManager};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    exception::handling_init();
     bsp::console::qemu_bring_up_console();
 
     // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
diff --git a/14_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs b/14_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs
index bf2ba29f1..185089a3d 100644
--- a/14_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs
+++ b/14_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs
@@ -8,10 +8,10 @@
 #![no_main]
 #![no_std]
 
-/// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
+/// Overwrites libkernel's `panic_wait::_panic_exit()` so that it returns a "success" code.
 ///
-/// Reaching this code is a success, because it is called from the synchronous exception handler,
-/// which is what this test wants to achieve.
+/// In this test, teaching the panic is a success, because it is called from the synchronous
+/// exception handler, which is what this test wants to achieve.
 ///
 /// It also means that this integration test can not use any other code that calls panic!() directly
 /// or indirectly.
@@ -23,13 +23,12 @@ use libkernel::{bsp, cpu, exception, memory, println};
 unsafe fn kernel_init() -> ! {
     use memory::mmu::interface::MMU;
 
+    exception::handling_init();
     bsp::console::qemu_bring_up_console();
 
     println!("Testing synchronous exception handling by causing a page fault");
     println!("-------------------------------------------------------------------\n");
 
-    exception::handling_init();
-
     if let Err(string) = memory::mmu::mmu().init() {
         println!("MMU: {}", string);
         cpu::qemu_exit_failure()
diff --git a/14_exceptions_part2_peripheral_IRQs/tests/03_exception_irq_sanity.rs b/14_exceptions_part2_peripheral_IRQs/tests/03_exception_irq_sanity.rs
index 1f3bb7702..ac25d01a8 100644
--- a/14_exceptions_part2_peripheral_IRQs/tests/03_exception_irq_sanity.rs
+++ b/14_exceptions_part2_peripheral_IRQs/tests/03_exception_irq_sanity.rs
@@ -10,8 +10,6 @@
 #![reexport_test_harness_main = "test_main"]
 #![test_runner(libkernel::test_runner)]
 
-mod panic_exit_failure;
-
 use libkernel::{bsp, cpu, exception};
 use test_macros::kernel_test;
 
diff --git a/14_exceptions_part2_peripheral_IRQs/tests/panic_exit_failure/mod.rs b/14_exceptions_part2_peripheral_IRQs/tests/panic_exit_failure/mod.rs
deleted file mode 100644
index af2ba3781..000000000
--- a/14_exceptions_part2_peripheral_IRQs/tests/panic_exit_failure/mod.rs
+++ /dev/null
@@ -1,9 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
-
-/// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
-#[no_mangle]
-fn _panic_exit() -> ! {
-    libkernel::cpu::qemu_exit_failure()
-}
diff --git a/15_virtual_mem_part2_mmio_remap/Cargo.toml b/15_virtual_mem_part2_mmio_remap/Cargo.toml
index 5d57cf357..206dfc878 100644
--- a/15_virtual_mem_part2_mmio_remap/Cargo.toml
+++ b/15_virtual_mem_part2_mmio_remap/Cargo.toml
@@ -7,22 +7,22 @@ edition = "2018"
 [profile.release]
 lto = true
 
-# The features section is used to select the target board.
 [features]
 default = []
 bsp_rpi3 = ["register"]
 bsp_rpi4 = ["register"]
+test_build = ["qemu-exit"]
 
 ##--------------------------------------------------------------------------------------------------
 ## Dependencies
 ##--------------------------------------------------------------------------------------------------
 
 [dependencies]
-qemu-exit = "1.x.x"
 test-types = { path = "test-types" }
 
 # Optional dependencies
 register = { version = "1.x.x", features = ["no_std_unit_tests"], optional = true }
+qemu-exit = { version = "1.x.x", optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
diff --git a/15_virtual_mem_part2_mmio_remap/Makefile b/15_virtual_mem_part2_mmio_remap/Makefile
index 4f7561dbd..74e67da50 100644
--- a/15_virtual_mem_part2_mmio_remap/Makefile
+++ b/15_virtual_mem_part2_mmio_remap/Makefile
@@ -57,9 +57,9 @@ QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
-FEATURES      = bsp_$(BSP)
+FEATURES      = --features bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
-    --features $(FEATURES)         \
+    $(FEATURES)                    \
     --release
 
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
@@ -124,12 +124,15 @@ qemu: $(KERNEL_BIN)
 define KERNEL_TEST_RUNNER
     #!/usr/bin/env bash
 
-    $(OBJCOPY_CMD) $$1 $$1.img
+    TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
     TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
+
+    $(OBJCOPY_CMD) $$TEST_ELF $$TEST_BINARY
     $(DOCKER_TEST) ruby tests/runner.rb $(EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
 endef
 
 export KERNEL_TEST_RUNNER
+test: FEATURES += --features test_build
 test:
 	@mkdir -p target
 	@echo "$$KERNEL_TEST_RUNNER" > target/kernel_test_runner.sh
diff --git a/15_virtual_mem_part2_mmio_remap/README.md b/15_virtual_mem_part2_mmio_remap/README.md
index 65127bd6a..53eb8047f 100644
--- a/15_virtual_mem_part2_mmio_remap/README.md
+++ b/15_virtual_mem_part2_mmio_remap/README.md
@@ -3022,11 +3022,11 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault
 -    use memory::mmu::interface::MMU;
 +    use libkernel::driver::interface::DriverManager;
 
-     bsp::console::qemu_bring_up_console();
-
-@@ -30,10 +30,22 @@
-
      exception::handling_init();
+     bsp::console::qemu_bring_up_console();
+@@ -29,10 +29,22 @@
+     println!("Testing synchronous exception handling by causing a page fault");
+     println!("-------------------------------------------------------------------\n");
 
 -    if let Err(string) = memory::mmu::mmu().init() {
 -        println!("MMU: {}", string);
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu.rs b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu.rs
index 948bad747..56443865a 100644
--- a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu.rs
@@ -30,16 +30,20 @@ pub fn wait_forever() -> ! {
 //--------------------------------------------------------------------------------------------------
 // Testing
 //--------------------------------------------------------------------------------------------------
+#[cfg(feature = "test_build")]
 use qemu_exit::QEMUExit;
 
+#[cfg(feature = "test_build")]
 const QEMU_EXIT_HANDLE: qemu_exit::AArch64 = qemu_exit::AArch64::new();
 
 /// Make the host QEMU binary execute `exit(1)`.
+#[cfg(feature = "test_build")]
 pub fn qemu_exit_failure() -> ! {
     QEMU_EXIT_HANDLE.exit_failure()
 }
 
 /// Make the host QEMU binary execute `exit(0)`.
+#[cfg(feature = "test_build")]
 pub fn qemu_exit_success() -> ! {
     QEMU_EXIT_HANDLE.exit_success()
 }
diff --git a/15_virtual_mem_part2_mmio_remap/src/cpu.rs b/15_virtual_mem_part2_mmio_remap/src/cpu.rs
index 9c8eb6f6e..36b6a9d4c 100644
--- a/15_virtual_mem_part2_mmio_remap/src/cpu.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/cpu.rs
@@ -15,4 +15,7 @@ pub mod smp;
 //--------------------------------------------------------------------------------------------------
 // Architectural Public Reexports
 //--------------------------------------------------------------------------------------------------
-pub use arch_cpu::{nop, qemu_exit_failure, qemu_exit_success, wait_forever};
+pub use arch_cpu::{nop, wait_forever};
+
+#[cfg(feature = "test_build")]
+pub use arch_cpu::{qemu_exit_failure, qemu_exit_success};
diff --git a/15_virtual_mem_part2_mmio_remap/src/lib.rs b/15_virtual_mem_part2_mmio_remap/src/lib.rs
index 608d4b07b..dad5e903c 100644
--- a/15_virtual_mem_part2_mmio_remap/src/lib.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/lib.rs
@@ -167,6 +167,7 @@ pub fn test_runner(tests: &[&test_types::UnitTest]) {
 #[cfg(test)]
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    exception::handling_init();
     bsp::console::qemu_bring_up_console();
 
     test_main();
diff --git a/15_virtual_mem_part2_mmio_remap/src/panic_wait.rs b/15_virtual_mem_part2_mmio_remap/src/panic_wait.rs
index 8c7770b6e..e3a9ed8ab 100644
--- a/15_virtual_mem_part2_mmio_remap/src/panic_wait.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/panic_wait.rs
@@ -17,21 +17,21 @@ fn _panic_print(args: fmt::Arguments) {
     unsafe { bsp::console::panic_console_out().write_fmt(args).unwrap() };
 }
 
-/// The point of exit for the "standard" (non-testing) `libkernel`.
+/// The point of exit for `libkernel`.
 ///
-/// This code will be used by the release kernel binary and the `integration tests`. It is linked
-/// weakly, so that the integration tests can overload it to exit `QEMU` instead of spinning
-/// forever.
-///
-/// This is one possible approach to solve the problem that `cargo` can not know who the consumer of
-/// the library will be:
-///   - The release kernel binary that should safely park the paniced core,
-///   - or an `integration test` that is executed in QEMU, which should just exit QEMU.
-#[cfg(not(test))]
+/// It is linked weakly, so that the integration tests can overload its standard behavior.
 #[linkage = "weak"]
 #[no_mangle]
 fn _panic_exit() -> ! {
-    cpu::wait_forever()
+    #[cfg(not(test_build))]
+    {
+        cpu::wait_forever()
+    }
+
+    #[cfg(test_build)]
+    {
+        cpu::qemu_exit_failure()
+    }
 }
 
 /// Prints with a newline - only use from the panic handler.
@@ -56,14 +56,3 @@ fn panic(info: &PanicInfo) -> ! {
 
     _panic_exit()
 }
-
-//--------------------------------------------------------------------------------------------------
-// Testing
-//--------------------------------------------------------------------------------------------------
-
-/// The point of exit when the library is compiled for testing.
-#[cfg(test)]
-#[no_mangle]
-fn _panic_exit() -> ! {
-    cpu::qemu_exit_failure()
-}
diff --git a/15_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs b/15_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs
index 08b654aef..c3754aa9f 100644
--- a/15_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs
+++ b/15_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs
@@ -8,16 +8,15 @@
 #![no_main]
 #![no_std]
 
-mod panic_exit_failure;
-
-use libkernel::{bsp, console, print};
+use libkernel::{bsp, console, exception, print};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use bsp::console::{console, qemu_bring_up_console};
+    use bsp::console::console;
     use console::interface::*;
 
-    qemu_bring_up_console();
+    exception::handling_init();
+    bsp::console::qemu_bring_up_console();
 
     // Handshake
     assert_eq!(console().read_char(), 'A');
diff --git a/15_virtual_mem_part2_mmio_remap/tests/01_timer_sanity.rs b/15_virtual_mem_part2_mmio_remap/tests/01_timer_sanity.rs
index 52dca0fca..f39d83845 100644
--- a/15_virtual_mem_part2_mmio_remap/tests/01_timer_sanity.rs
+++ b/15_virtual_mem_part2_mmio_remap/tests/01_timer_sanity.rs
@@ -10,14 +10,13 @@
 #![reexport_test_harness_main = "test_main"]
 #![test_runner(libkernel::test_runner)]
 
-mod panic_exit_failure;
-
 use core::time::Duration;
-use libkernel::{bsp, cpu, time, time::interface::TimeManager};
+use libkernel::{bsp, cpu, exception, time, time::interface::TimeManager};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    exception::handling_init();
     bsp::console::qemu_bring_up_console();
 
     // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
diff --git a/15_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs b/15_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
index 858357a4d..45f12a1f7 100644
--- a/15_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
+++ b/15_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
@@ -8,10 +8,10 @@
 #![no_main]
 #![no_std]
 
-/// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
+/// Overwrites libkernel's `panic_wait::_panic_exit()` so that it returns a "success" code.
 ///
-/// Reaching this code is a success, because it is called from the synchronous exception handler,
-/// which is what this test wants to achieve.
+/// In this test, teaching the panic is a success, because it is called from the synchronous
+/// exception handler, which is what this test wants to achieve.
 ///
 /// It also means that this integration test can not use any other code that calls panic!() directly
 /// or indirectly.
@@ -23,13 +23,12 @@ use libkernel::{bsp, cpu, exception, memory, println};
 unsafe fn kernel_init() -> ! {
     use libkernel::driver::interface::DriverManager;
 
+    exception::handling_init();
     bsp::console::qemu_bring_up_console();
 
     println!("Testing synchronous exception handling by causing a page fault");
     println!("-------------------------------------------------------------------\n");
 
-    exception::handling_init();
-
     if let Err(string) = memory::mmu::kernel_map_binary_and_enable_mmu() {
         println!("Enabling MMU failed: {}", string);
         cpu::qemu_exit_failure()
diff --git a/15_virtual_mem_part2_mmio_remap/tests/03_exception_irq_sanity.rs b/15_virtual_mem_part2_mmio_remap/tests/03_exception_irq_sanity.rs
index 1f3bb7702..ac25d01a8 100644
--- a/15_virtual_mem_part2_mmio_remap/tests/03_exception_irq_sanity.rs
+++ b/15_virtual_mem_part2_mmio_remap/tests/03_exception_irq_sanity.rs
@@ -10,8 +10,6 @@
 #![reexport_test_harness_main = "test_main"]
 #![test_runner(libkernel::test_runner)]
 
-mod panic_exit_failure;
-
 use libkernel::{bsp, cpu, exception};
 use test_macros::kernel_test;
 
diff --git a/15_virtual_mem_part2_mmio_remap/tests/panic_exit_failure/mod.rs b/15_virtual_mem_part2_mmio_remap/tests/panic_exit_failure/mod.rs
deleted file mode 100644
index af2ba3781..000000000
--- a/15_virtual_mem_part2_mmio_remap/tests/panic_exit_failure/mod.rs
+++ /dev/null
@@ -1,9 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
-
-/// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
-#[no_mangle]
-fn _panic_exit() -> ! {
-    libkernel::cpu::qemu_exit_failure()
-}
diff --git a/X1_JTAG_boot/jtag_boot_rpi3.img b/X1_JTAG_boot/jtag_boot_rpi3.img
index d4148b720f230a78479ea44cdc8791b9c28bc753..de6648804151541fd045c79f2f5dcf824f6094db 100755
GIT binary patch
delta 2333
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delta 2318
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k-Fu0?Zem0Zh&(T?YuY-QBD=^AwpDJFV!DGEQ{}qf0UGO}SpWb4


From 2f903041495c942e4b32bf32656c4ddef1daca0c Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Fri, 12 Mar 2021 23:44:10 +0100
Subject: [PATCH 034/214] Add color and verbosity to Makefile

---
 01_wait_forever/Cargo.toml                    |   1 -
 01_wait_forever/Makefile                      |  37 ++++++++----
 01_wait_forever/build.rs                      |   1 +
 02_runtime_init/Cargo.toml                    |   1 -
 02_runtime_init/Makefile                      |  37 ++++++++----
 02_runtime_init/README.md                     |   2 +-
 02_runtime_init/build.rs                      |   1 +
 03_hacky_hello_world/Cargo.toml               |   1 -
 03_hacky_hello_world/Makefile                 |  37 ++++++++----
 03_hacky_hello_world/README.md                |   8 +--
 03_hacky_hello_world/build.rs                 |   1 +
 04_zero_overhead_abstraction/Cargo.toml       |   1 -
 04_zero_overhead_abstraction/Makefile         |  37 ++++++++----
 04_zero_overhead_abstraction/README.md        |   2 +-
 04_zero_overhead_abstraction/build.rs         |   1 +
 05_safe_globals/Cargo.toml                    |   1 -
 05_safe_globals/Makefile                      |  37 ++++++++----
 05_safe_globals/build.rs                      |   1 +
 06_drivers_gpio_uart/Cargo.toml               |   1 -
 06_drivers_gpio_uart/Makefile                 |  37 ++++++++----
 06_drivers_gpio_uart/README.md                |  18 +++---
 06_drivers_gpio_uart/build.rs                 |   1 +
 07_uart_chainloader/Cargo.toml                |   1 -
 07_uart_chainloader/Makefile                  |  42 ++++++++-----
 07_uart_chainloader/README.md                 |  39 +++++--------
 07_uart_chainloader/build.rs                  |   1 +
 07_uart_chainloader/demo_payload_rpi3.img     | Bin 6800 -> 6808 bytes
 08_timestamps/Cargo.toml                      |   1 -
 08_timestamps/Makefile                        |  37 ++++++++----
 08_timestamps/README.md                       |  39 +++++--------
 08_timestamps/build.rs                        |   1 +
 09_hw_debug_JTAG/Cargo.toml                   |   1 -
 09_hw_debug_JTAG/Makefile                     |  55 +++++++++++-------
 09_hw_debug_JTAG/README.md                    |  38 ++++++------
 09_hw_debug_JTAG/build.rs                     |   1 +
 10_privilege_level/Cargo.toml                 |   1 -
 10_privilege_level/Makefile                   |  55 +++++++++++-------
 10_privilege_level/build.rs                   |   1 +
 .../Cargo.toml                                |   1 -
 .../Makefile                                  |  55 +++++++++++-------
 .../build.rs                                  |   1 +
 12_exceptions_part1_groundwork/Cargo.toml     |   1 -
 12_exceptions_part1_groundwork/Makefile       |  55 +++++++++++-------
 12_exceptions_part1_groundwork/build.rs       |   1 +
 13_integrated_testing/Makefile                |  54 ++++++++++-------
 13_integrated_testing/README.md               |  55 +++++++-----------
 13_integrated_testing/build.rs                |   1 +
 14_exceptions_part2_peripheral_IRQs/Makefile  |  54 ++++++++++-------
 14_exceptions_part2_peripheral_IRQs/build.rs  |   1 +
 15_virtual_mem_part2_mmio_remap/Makefile      |  54 ++++++++++-------
 15_virtual_mem_part2_mmio_remap/build.rs      |   1 +
 X1_JTAG_boot/Cargo.toml                       |   1 -
 X1_JTAG_boot/Makefile                         |  37 ++++++++----
 X1_JTAG_boot/build.rs                         |   1 +
 utils/color.mk.in                             |   5 ++
 utils/minipush.rb                             |   1 +
 utils/miniterm.rb                             |   1 +
 57 files changed, 570 insertions(+), 387 deletions(-)
 create mode 100644 utils/color.mk.in

diff --git a/01_wait_forever/Cargo.toml b/01_wait_forever/Cargo.toml
index 0595aa573..8a0187c43 100644
--- a/01_wait_forever/Cargo.toml
+++ b/01_wait_forever/Cargo.toml
@@ -4,7 +4,6 @@ version = "0.1.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
 edition = "2018"
 
-# The features section is used to select the target board.
 [features]
 default = []
 bsp_rpi3 = []
diff --git a/01_wait_forever/Makefile b/01_wait_forever/Makefile
index abecc406b..eb2cc7323 100644
--- a/01_wait_forever/Makefile
+++ b/01_wait_forever/Makefile
@@ -2,6 +2,8 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
+include ../utils/color.mk.in
+
 # Default to the RPi3
 BSP ?= rpi3
 
@@ -14,6 +16,7 @@ ifeq ($(BSP),rpi3)
     QEMU_RELEASE_ARGS = -d in_asm -display none
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
     LINKER_FILE       = src/bsp/raspberrypi/link.ld
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
@@ -24,6 +27,7 @@ else ifeq ($(BSP),rpi4)
     QEMU_RELEASE_ARGS = -d in_asm -display none
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
     LINKER_FILE       = src/bsp/raspberrypi/link.ld
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
@@ -31,12 +35,14 @@ endif
 # Export for build.rs
 export LINKER_FILE
 
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
-FEATURES      = bsp_$(BSP)
+FEATURES      = --features bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
-    --features $(FEATURES)         \
+    $(FEATURES)                    \
     --release
 
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
@@ -53,8 +59,8 @@ DOCKER_IMAGE         = rustembedded/osdev-utils
 DOCKER_CMD           = docker run --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
 DOCKER_CMD_INTERACT  = $(DOCKER_CMD) -i -t
 
-DOCKER_QEMU     = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
-DOCKER_ELFTOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
+DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 
 EXEC_QEMU = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
 
@@ -63,36 +69,45 @@ EXEC_QEMU = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
 all: $(KERNEL_BIN)
 
 $(KERNEL_ELF):
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
+	$(call colorecho, "\nCompiling kernel - $(BSP)")
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
 $(KERNEL_BIN): $(KERNEL_ELF)
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
 
 doc:
-	$(DOC_CMD) --document-private-items --open
+	$(call colorecho, "\nGenerating docs")
+	@$(DOC_CMD) --document-private-items --open
 
 ifeq ($(QEMU_MACHINE_TYPE),)
 qemu:
-	@echo "This board is not yet supported for QEMU."
+	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
 else
 qemu: $(KERNEL_BIN)
+	$(call colorecho, "\nLaunching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 endif
 
 clippy:
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
 clean:
 	rm -rf target $(KERNEL_BIN)
 
 readelf: $(KERNEL_ELF)
-	readelf --headers $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching readelf")
+	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
 objdump: $(KERNEL_ELF)
-	@$(DOCKER_ELFTOOLS) $(OBJDUMP_BINARY) --disassemble --demangle $(KERNEL_ELF) | rustfilt
+	$(call colorecho, "\nLaunching objdump")
+	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
+                --section .text   \
+                --section .rodata \
+                $(KERNEL_ELF) | rustfilt
 
 nm: $(KERNEL_ELF)
-	@$(DOCKER_ELFTOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
+	$(call colorecho, "\nLaunching nm")
+	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
 # For rust-analyzer
 check:
diff --git a/01_wait_forever/build.rs b/01_wait_forever/build.rs
index 40ee0284d..3f0a29110 100644
--- a/01_wait_forever/build.rs
+++ b/01_wait_forever/build.rs
@@ -4,4 +4,5 @@ fn main() {
     let linker_file = env::var("LINKER_FILE").unwrap();
 
     println!("cargo:rerun-if-changed={}", linker_file);
+    println!("cargo:rerun-if-changed=build.rs");
 }
diff --git a/02_runtime_init/Cargo.toml b/02_runtime_init/Cargo.toml
index 0f798fcbe..a75809963 100644
--- a/02_runtime_init/Cargo.toml
+++ b/02_runtime_init/Cargo.toml
@@ -7,7 +7,6 @@ edition = "2018"
 [profile.release]
 lto = true
 
-# The features section is used to select the target board.
 [features]
 default = []
 bsp_rpi3 = []
diff --git a/02_runtime_init/Makefile b/02_runtime_init/Makefile
index abecc406b..eb2cc7323 100644
--- a/02_runtime_init/Makefile
+++ b/02_runtime_init/Makefile
@@ -2,6 +2,8 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
+include ../utils/color.mk.in
+
 # Default to the RPi3
 BSP ?= rpi3
 
@@ -14,6 +16,7 @@ ifeq ($(BSP),rpi3)
     QEMU_RELEASE_ARGS = -d in_asm -display none
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
     LINKER_FILE       = src/bsp/raspberrypi/link.ld
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
@@ -24,6 +27,7 @@ else ifeq ($(BSP),rpi4)
     QEMU_RELEASE_ARGS = -d in_asm -display none
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
     LINKER_FILE       = src/bsp/raspberrypi/link.ld
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
@@ -31,12 +35,14 @@ endif
 # Export for build.rs
 export LINKER_FILE
 
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
-FEATURES      = bsp_$(BSP)
+FEATURES      = --features bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
-    --features $(FEATURES)         \
+    $(FEATURES)                    \
     --release
 
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
@@ -53,8 +59,8 @@ DOCKER_IMAGE         = rustembedded/osdev-utils
 DOCKER_CMD           = docker run --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
 DOCKER_CMD_INTERACT  = $(DOCKER_CMD) -i -t
 
-DOCKER_QEMU     = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
-DOCKER_ELFTOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
+DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 
 EXEC_QEMU = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
 
@@ -63,36 +69,45 @@ EXEC_QEMU = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
 all: $(KERNEL_BIN)
 
 $(KERNEL_ELF):
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
+	$(call colorecho, "\nCompiling kernel - $(BSP)")
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
 $(KERNEL_BIN): $(KERNEL_ELF)
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
 
 doc:
-	$(DOC_CMD) --document-private-items --open
+	$(call colorecho, "\nGenerating docs")
+	@$(DOC_CMD) --document-private-items --open
 
 ifeq ($(QEMU_MACHINE_TYPE),)
 qemu:
-	@echo "This board is not yet supported for QEMU."
+	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
 else
 qemu: $(KERNEL_BIN)
+	$(call colorecho, "\nLaunching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 endif
 
 clippy:
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
 clean:
 	rm -rf target $(KERNEL_BIN)
 
 readelf: $(KERNEL_ELF)
-	readelf --headers $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching readelf")
+	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
 objdump: $(KERNEL_ELF)
-	@$(DOCKER_ELFTOOLS) $(OBJDUMP_BINARY) --disassemble --demangle $(KERNEL_ELF) | rustfilt
+	$(call colorecho, "\nLaunching objdump")
+	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
+                --section .text   \
+                --section .rodata \
+                $(KERNEL_ELF) | rustfilt
 
 nm: $(KERNEL_ELF)
-	@$(DOCKER_ELFTOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
+	$(call colorecho, "\nLaunching nm")
+	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
 # For rust-analyzer
 check:
diff --git a/02_runtime_init/README.md b/02_runtime_init/README.md
index 50cce8798..9241a1950 100644
--- a/02_runtime_init/README.md
+++ b/02_runtime_init/README.md
@@ -33,9 +33,9 @@ diff -uNr 01_wait_forever/Cargo.toml 02_runtime_init/Cargo.toml
 +[profile.release]
 +lto = true
 +
- # The features section is used to select the target board.
  [features]
  default = []
+ bsp_rpi3 = []
 
 diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.S 02_runtime_init/src/_arch/aarch64/cpu/boot.S
 --- 01_wait_forever/src/_arch/aarch64/cpu/boot.S
diff --git a/02_runtime_init/build.rs b/02_runtime_init/build.rs
index 40ee0284d..3f0a29110 100644
--- a/02_runtime_init/build.rs
+++ b/02_runtime_init/build.rs
@@ -4,4 +4,5 @@ fn main() {
     let linker_file = env::var("LINKER_FILE").unwrap();
 
     println!("cargo:rerun-if-changed={}", linker_file);
+    println!("cargo:rerun-if-changed=build.rs");
 }
diff --git a/03_hacky_hello_world/Cargo.toml b/03_hacky_hello_world/Cargo.toml
index 0f798fcbe..a75809963 100644
--- a/03_hacky_hello_world/Cargo.toml
+++ b/03_hacky_hello_world/Cargo.toml
@@ -7,7 +7,6 @@ edition = "2018"
 [profile.release]
 lto = true
 
-# The features section is used to select the target board.
 [features]
 default = []
 bsp_rpi3 = []
diff --git a/03_hacky_hello_world/Makefile b/03_hacky_hello_world/Makefile
index 9d5a8f78b..75158b5b0 100644
--- a/03_hacky_hello_world/Makefile
+++ b/03_hacky_hello_world/Makefile
@@ -2,6 +2,8 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
+include ../utils/color.mk.in
+
 # Default to the RPi3
 BSP ?= rpi3
 
@@ -14,6 +16,7 @@ ifeq ($(BSP),rpi3)
     QEMU_RELEASE_ARGS = -serial stdio -display none
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
     LINKER_FILE       = src/bsp/raspberrypi/link.ld
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
@@ -24,6 +27,7 @@ else ifeq ($(BSP),rpi4)
     QEMU_RELEASE_ARGS = -serial stdio -display none
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
     LINKER_FILE       = src/bsp/raspberrypi/link.ld
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
@@ -31,12 +35,14 @@ endif
 # Export for build.rs
 export LINKER_FILE
 
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
-FEATURES      = bsp_$(BSP)
+FEATURES      = --features bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
-    --features $(FEATURES)         \
+    $(FEATURES)                    \
     --release
 
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
@@ -53,8 +59,8 @@ DOCKER_IMAGE         = rustembedded/osdev-utils
 DOCKER_CMD           = docker run --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
 DOCKER_CMD_INTERACT  = $(DOCKER_CMD) -i -t
 
-DOCKER_QEMU     = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
-DOCKER_ELFTOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
+DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 
 EXEC_QEMU = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
 
@@ -63,36 +69,45 @@ EXEC_QEMU = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
 all: $(KERNEL_BIN)
 
 $(KERNEL_ELF):
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
+	$(call colorecho, "\nCompiling kernel - $(BSP)")
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
 $(KERNEL_BIN): $(KERNEL_ELF)
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
 
 doc:
-	$(DOC_CMD) --document-private-items --open
+	$(call colorecho, "\nGenerating docs")
+	@$(DOC_CMD) --document-private-items --open
 
 ifeq ($(QEMU_MACHINE_TYPE),)
 qemu:
-	@echo "This board is not yet supported for QEMU."
+	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
 else
 qemu: $(KERNEL_BIN)
+	$(call colorecho, "\nLaunching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 endif
 
 clippy:
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
 clean:
 	rm -rf target $(KERNEL_BIN)
 
 readelf: $(KERNEL_ELF)
-	readelf --headers $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching readelf")
+	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
 objdump: $(KERNEL_ELF)
-	@$(DOCKER_ELFTOOLS) $(OBJDUMP_BINARY) --disassemble --demangle $(KERNEL_ELF) | rustfilt
+	$(call colorecho, "\nLaunching objdump")
+	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
+                --section .text   \
+                --section .rodata \
+                $(KERNEL_ELF) | rustfilt
 
 nm: $(KERNEL_ELF)
-	@$(DOCKER_ELFTOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
+	$(call colorecho, "\nLaunching nm")
+	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
 # For rust-analyzer
 check:
diff --git a/03_hacky_hello_world/README.md b/03_hacky_hello_world/README.md
index c8dc66cc7..753aa0487 100644
--- a/03_hacky_hello_world/README.md
+++ b/03_hacky_hello_world/README.md
@@ -31,7 +31,7 @@ Kernel panic: Stopping here.
 diff -uNr 02_runtime_init/Makefile 03_hacky_hello_world/Makefile
 --- 02_runtime_init/Makefile
 +++ 03_hacky_hello_world/Makefile
-@@ -11,7 +11,7 @@
+@@ -13,7 +13,7 @@
      KERNEL_BIN        = kernel8.img
      QEMU_BINARY       = qemu-system-aarch64
      QEMU_MACHINE_TYPE = raspi3
@@ -39,8 +39,8 @@ diff -uNr 02_runtime_init/Makefile 03_hacky_hello_world/Makefile
 +    QEMU_RELEASE_ARGS = -serial stdio -display none
      OBJDUMP_BINARY    = aarch64-none-elf-objdump
      NM_BINARY         = aarch64-none-elf-nm
-     LINKER_FILE       = src/bsp/raspberrypi/link.ld
-@@ -21,7 +21,7 @@
+     READELF_BINARY    = aarch64-none-elf-readelf
+@@ -24,7 +24,7 @@
      KERNEL_BIN        = kernel8.img
      QEMU_BINARY       = qemu-system-aarch64
      QEMU_MACHINE_TYPE =
@@ -48,7 +48,7 @@ diff -uNr 02_runtime_init/Makefile 03_hacky_hello_world/Makefile
 +    QEMU_RELEASE_ARGS = -serial stdio -display none
      OBJDUMP_BINARY    = aarch64-none-elf-objdump
      NM_BINARY         = aarch64-none-elf-nm
-     LINKER_FILE       = src/bsp/raspberrypi/link.ld
+     READELF_BINARY    = aarch64-none-elf-readelf
 
 diff -uNr 02_runtime_init/src/bsp/raspberrypi/console.rs 03_hacky_hello_world/src/bsp/raspberrypi/console.rs
 --- 02_runtime_init/src/bsp/raspberrypi/console.rs
diff --git a/03_hacky_hello_world/build.rs b/03_hacky_hello_world/build.rs
index 40ee0284d..3f0a29110 100644
--- a/03_hacky_hello_world/build.rs
+++ b/03_hacky_hello_world/build.rs
@@ -4,4 +4,5 @@ fn main() {
     let linker_file = env::var("LINKER_FILE").unwrap();
 
     println!("cargo:rerun-if-changed={}", linker_file);
+    println!("cargo:rerun-if-changed=build.rs");
 }
diff --git a/04_zero_overhead_abstraction/Cargo.toml b/04_zero_overhead_abstraction/Cargo.toml
index 517455433..5deb70108 100644
--- a/04_zero_overhead_abstraction/Cargo.toml
+++ b/04_zero_overhead_abstraction/Cargo.toml
@@ -7,7 +7,6 @@ edition = "2018"
 [profile.release]
 lto = true
 
-# The features section is used to select the target board.
 [features]
 default = []
 bsp_rpi3 = []
diff --git a/04_zero_overhead_abstraction/Makefile b/04_zero_overhead_abstraction/Makefile
index 9d5a8f78b..75158b5b0 100644
--- a/04_zero_overhead_abstraction/Makefile
+++ b/04_zero_overhead_abstraction/Makefile
@@ -2,6 +2,8 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
+include ../utils/color.mk.in
+
 # Default to the RPi3
 BSP ?= rpi3
 
@@ -14,6 +16,7 @@ ifeq ($(BSP),rpi3)
     QEMU_RELEASE_ARGS = -serial stdio -display none
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
     LINKER_FILE       = src/bsp/raspberrypi/link.ld
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
@@ -24,6 +27,7 @@ else ifeq ($(BSP),rpi4)
     QEMU_RELEASE_ARGS = -serial stdio -display none
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
     LINKER_FILE       = src/bsp/raspberrypi/link.ld
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
@@ -31,12 +35,14 @@ endif
 # Export for build.rs
 export LINKER_FILE
 
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
-FEATURES      = bsp_$(BSP)
+FEATURES      = --features bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
-    --features $(FEATURES)         \
+    $(FEATURES)                    \
     --release
 
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
@@ -53,8 +59,8 @@ DOCKER_IMAGE         = rustembedded/osdev-utils
 DOCKER_CMD           = docker run --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
 DOCKER_CMD_INTERACT  = $(DOCKER_CMD) -i -t
 
-DOCKER_QEMU     = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
-DOCKER_ELFTOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
+DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 
 EXEC_QEMU = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
 
@@ -63,36 +69,45 @@ EXEC_QEMU = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
 all: $(KERNEL_BIN)
 
 $(KERNEL_ELF):
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
+	$(call colorecho, "\nCompiling kernel - $(BSP)")
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
 $(KERNEL_BIN): $(KERNEL_ELF)
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
 
 doc:
-	$(DOC_CMD) --document-private-items --open
+	$(call colorecho, "\nGenerating docs")
+	@$(DOC_CMD) --document-private-items --open
 
 ifeq ($(QEMU_MACHINE_TYPE),)
 qemu:
-	@echo "This board is not yet supported for QEMU."
+	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
 else
 qemu: $(KERNEL_BIN)
+	$(call colorecho, "\nLaunching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 endif
 
 clippy:
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
 clean:
 	rm -rf target $(KERNEL_BIN)
 
 readelf: $(KERNEL_ELF)
-	readelf --headers $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching readelf")
+	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
 objdump: $(KERNEL_ELF)
-	@$(DOCKER_ELFTOOLS) $(OBJDUMP_BINARY) --disassemble --demangle $(KERNEL_ELF) | rustfilt
+	$(call colorecho, "\nLaunching objdump")
+	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
+                --section .text   \
+                --section .rodata \
+                $(KERNEL_ELF) | rustfilt
 
 nm: $(KERNEL_ELF)
-	@$(DOCKER_ELFTOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
+	$(call colorecho, "\nLaunching nm")
+	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
 # For rust-analyzer
 check:
diff --git a/04_zero_overhead_abstraction/README.md b/04_zero_overhead_abstraction/README.md
index d20758d1c..aeb3bfb85 100644
--- a/04_zero_overhead_abstraction/README.md
+++ b/04_zero_overhead_abstraction/README.md
@@ -13,7 +13,7 @@
 diff -uNr 03_hacky_hello_world/Cargo.toml 04_zero_overhead_abstraction/Cargo.toml
 --- 03_hacky_hello_world/Cargo.toml
 +++ 04_zero_overhead_abstraction/Cargo.toml
-@@ -18,3 +18,8 @@
+@@ -17,3 +17,8 @@
  ##--------------------------------------------------------------------------------------------------
 
  [dependencies]
diff --git a/04_zero_overhead_abstraction/build.rs b/04_zero_overhead_abstraction/build.rs
index 40ee0284d..3f0a29110 100644
--- a/04_zero_overhead_abstraction/build.rs
+++ b/04_zero_overhead_abstraction/build.rs
@@ -4,4 +4,5 @@ fn main() {
     let linker_file = env::var("LINKER_FILE").unwrap();
 
     println!("cargo:rerun-if-changed={}", linker_file);
+    println!("cargo:rerun-if-changed=build.rs");
 }
diff --git a/05_safe_globals/Cargo.toml b/05_safe_globals/Cargo.toml
index 517455433..5deb70108 100644
--- a/05_safe_globals/Cargo.toml
+++ b/05_safe_globals/Cargo.toml
@@ -7,7 +7,6 @@ edition = "2018"
 [profile.release]
 lto = true
 
-# The features section is used to select the target board.
 [features]
 default = []
 bsp_rpi3 = []
diff --git a/05_safe_globals/Makefile b/05_safe_globals/Makefile
index 9d5a8f78b..75158b5b0 100644
--- a/05_safe_globals/Makefile
+++ b/05_safe_globals/Makefile
@@ -2,6 +2,8 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
+include ../utils/color.mk.in
+
 # Default to the RPi3
 BSP ?= rpi3
 
@@ -14,6 +16,7 @@ ifeq ($(BSP),rpi3)
     QEMU_RELEASE_ARGS = -serial stdio -display none
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
     LINKER_FILE       = src/bsp/raspberrypi/link.ld
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
@@ -24,6 +27,7 @@ else ifeq ($(BSP),rpi4)
     QEMU_RELEASE_ARGS = -serial stdio -display none
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
     LINKER_FILE       = src/bsp/raspberrypi/link.ld
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
@@ -31,12 +35,14 @@ endif
 # Export for build.rs
 export LINKER_FILE
 
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
-FEATURES      = bsp_$(BSP)
+FEATURES      = --features bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
-    --features $(FEATURES)         \
+    $(FEATURES)                    \
     --release
 
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
@@ -53,8 +59,8 @@ DOCKER_IMAGE         = rustembedded/osdev-utils
 DOCKER_CMD           = docker run --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
 DOCKER_CMD_INTERACT  = $(DOCKER_CMD) -i -t
 
-DOCKER_QEMU     = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
-DOCKER_ELFTOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
+DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 
 EXEC_QEMU = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
 
@@ -63,36 +69,45 @@ EXEC_QEMU = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
 all: $(KERNEL_BIN)
 
 $(KERNEL_ELF):
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
+	$(call colorecho, "\nCompiling kernel - $(BSP)")
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
 $(KERNEL_BIN): $(KERNEL_ELF)
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
 
 doc:
-	$(DOC_CMD) --document-private-items --open
+	$(call colorecho, "\nGenerating docs")
+	@$(DOC_CMD) --document-private-items --open
 
 ifeq ($(QEMU_MACHINE_TYPE),)
 qemu:
-	@echo "This board is not yet supported for QEMU."
+	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
 else
 qemu: $(KERNEL_BIN)
+	$(call colorecho, "\nLaunching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 endif
 
 clippy:
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
 clean:
 	rm -rf target $(KERNEL_BIN)
 
 readelf: $(KERNEL_ELF)
-	readelf --headers $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching readelf")
+	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
 objdump: $(KERNEL_ELF)
-	@$(DOCKER_ELFTOOLS) $(OBJDUMP_BINARY) --disassemble --demangle $(KERNEL_ELF) | rustfilt
+	$(call colorecho, "\nLaunching objdump")
+	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
+                --section .text   \
+                --section .rodata \
+                $(KERNEL_ELF) | rustfilt
 
 nm: $(KERNEL_ELF)
-	@$(DOCKER_ELFTOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
+	$(call colorecho, "\nLaunching nm")
+	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
 # For rust-analyzer
 check:
diff --git a/05_safe_globals/build.rs b/05_safe_globals/build.rs
index 40ee0284d..3f0a29110 100644
--- a/05_safe_globals/build.rs
+++ b/05_safe_globals/build.rs
@@ -4,4 +4,5 @@ fn main() {
     let linker_file = env::var("LINKER_FILE").unwrap();
 
     println!("cargo:rerun-if-changed={}", linker_file);
+    println!("cargo:rerun-if-changed=build.rs");
 }
diff --git a/06_drivers_gpio_uart/Cargo.toml b/06_drivers_gpio_uart/Cargo.toml
index b8906da1f..df5f7f974 100644
--- a/06_drivers_gpio_uart/Cargo.toml
+++ b/06_drivers_gpio_uart/Cargo.toml
@@ -7,7 +7,6 @@ edition = "2018"
 [profile.release]
 lto = true
 
-# The features section is used to select the target board.
 [features]
 default = []
 bsp_rpi3 = ["register"]
diff --git a/06_drivers_gpio_uart/Makefile b/06_drivers_gpio_uart/Makefile
index ee7ebe389..07eb97b2e 100644
--- a/06_drivers_gpio_uart/Makefile
+++ b/06_drivers_gpio_uart/Makefile
@@ -2,6 +2,8 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
+include ../utils/color.mk.in
+
 # Default to the RPi3
 BSP ?= rpi3
 
@@ -20,6 +22,7 @@ ifeq ($(BSP),rpi3)
     QEMU_RELEASE_ARGS = -serial stdio -display none
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
     LINKER_FILE       = src/bsp/raspberrypi/link.ld
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
@@ -30,6 +33,7 @@ else ifeq ($(BSP),rpi4)
     QEMU_RELEASE_ARGS = -serial stdio -display none
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
     LINKER_FILE       = src/bsp/raspberrypi/link.ld
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
@@ -37,12 +41,14 @@ endif
 # Export for build.rs
 export LINKER_FILE
 
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
-FEATURES      = bsp_$(BSP)
+FEATURES      = --features bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
-    --features $(FEATURES)         \
+    $(FEATURES)                    \
     --release
 
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
@@ -61,8 +67,8 @@ DOCKER_CMD_INTERACT  = $(DOCKER_CMD) -i -t
 DOCKER_ARG_DIR_UTILS = -v $(shell pwd)/../utils:/work/utils
 DOCKER_ARG_DEV       = --privileged -v /dev:/dev
 
-DOCKER_QEMU     = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
-DOCKER_ELFTOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
+DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 
 # Dockerize commands that require USB device passthrough only on Linux
 ifeq ($(UNAME_S),Linux)
@@ -79,19 +85,22 @@ EXEC_MINITERM = ruby ../utils/miniterm.rb
 all: $(KERNEL_BIN)
 
 $(KERNEL_ELF):
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
+	$(call colorecho, "\nCompiling kernel - $(BSP)")
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
 $(KERNEL_BIN): $(KERNEL_ELF)
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
 
 doc:
-	$(DOC_CMD) --document-private-items --open
+	$(call colorecho, "\nGenerating docs")
+	@$(DOC_CMD) --document-private-items --open
 
 ifeq ($(QEMU_MACHINE_TYPE),)
 qemu:
-	@echo "This board is not yet supported for QEMU."
+	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
 else
 qemu: $(KERNEL_BIN)
+	$(call colorecho, "\nLaunching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 endif
 
@@ -99,19 +108,25 @@ miniterm:
 	@$(DOCKER_MINITERM) $(EXEC_MINITERM) $(DEV_SERIAL)
 
 clippy:
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
 clean:
 	rm -rf target $(KERNEL_BIN)
 
 readelf: $(KERNEL_ELF)
-	readelf --headers $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching readelf")
+	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
 objdump: $(KERNEL_ELF)
-	@$(DOCKER_ELFTOOLS) $(OBJDUMP_BINARY) --disassemble --demangle $(KERNEL_ELF) | rustfilt
+	$(call colorecho, "\nLaunching objdump")
+	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
+                --section .text   \
+                --section .rodata \
+                $(KERNEL_ELF) | rustfilt
 
 nm: $(KERNEL_ELF)
-	@$(DOCKER_ELFTOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
+	$(call colorecho, "\nLaunching nm")
+	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
 # For rust-analyzer
 check:
diff --git a/06_drivers_gpio_uart/README.md b/06_drivers_gpio_uart/README.md
index a4176ca51..8b8e076d7 100644
--- a/06_drivers_gpio_uart/README.md
+++ b/06_drivers_gpio_uart/README.md
@@ -110,8 +110,8 @@ Miniterm 1.0
 diff -uNr 05_safe_globals/Cargo.toml 06_drivers_gpio_uart/Cargo.toml
 --- 05_safe_globals/Cargo.toml
 +++ 06_drivers_gpio_uart/Cargo.toml
-@@ -10,8 +10,8 @@
- # The features section is used to select the target board.
+@@ -9,8 +9,8 @@
+
  [features]
  default = []
 -bsp_rpi3 = []
@@ -121,7 +121,7 @@ diff -uNr 05_safe_globals/Cargo.toml 06_drivers_gpio_uart/Cargo.toml
 
  ##--------------------------------------------------------------------------------------------------
  ## Dependencies
-@@ -19,6 +19,9 @@
+@@ -18,6 +18,9 @@
 
  [dependencies]
 
@@ -135,7 +135,7 @@ diff -uNr 05_safe_globals/Cargo.toml 06_drivers_gpio_uart/Cargo.toml
 diff -uNr 05_safe_globals/Makefile 06_drivers_gpio_uart/Makefile
 --- 05_safe_globals/Makefile
 +++ 06_drivers_gpio_uart/Makefile
-@@ -5,6 +5,12 @@
+@@ -7,6 +7,12 @@
  # Default to the RPi3
  BSP ?= rpi3
 
@@ -148,15 +148,15 @@ diff -uNr 05_safe_globals/Makefile 06_drivers_gpio_uart/Makefile
  # BSP-specific arguments
  ifeq ($(BSP),rpi3)
      TARGET            = aarch64-unknown-none-softfloat
-@@ -52,13 +58,23 @@
+@@ -58,13 +64,23 @@
  DOCKER_IMAGE         = rustembedded/osdev-utils
  DOCKER_CMD           = docker run --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
  DOCKER_CMD_INTERACT  = $(DOCKER_CMD) -i -t
 +DOCKER_ARG_DIR_UTILS = -v $(shell pwd)/../utils:/work/utils
 +DOCKER_ARG_DEV       = --privileged -v /dev:/dev
 
- DOCKER_QEMU     = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
- DOCKER_ELFTOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+ DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
+ DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 
 -EXEC_QEMU = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
 +# Dockerize commands that require USB device passthrough only on Linux
@@ -174,7 +174,7 @@ diff -uNr 05_safe_globals/Makefile 06_drivers_gpio_uart/Makefile
 
  all: $(KERNEL_BIN)
 
-@@ -79,6 +95,9 @@
+@@ -88,6 +104,9 @@
  	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
  endif
 
@@ -182,7 +182,7 @@ diff -uNr 05_safe_globals/Makefile 06_drivers_gpio_uart/Makefile
 +	@$(DOCKER_MINITERM) $(EXEC_MINITERM) $(DEV_SERIAL)
 +
  clippy:
- 	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
+ 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
 
 diff -uNr 05_safe_globals/src/_arch/aarch64/cpu.rs 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
diff --git a/06_drivers_gpio_uart/build.rs b/06_drivers_gpio_uart/build.rs
index 40ee0284d..3f0a29110 100644
--- a/06_drivers_gpio_uart/build.rs
+++ b/06_drivers_gpio_uart/build.rs
@@ -4,4 +4,5 @@ fn main() {
     let linker_file = env::var("LINKER_FILE").unwrap();
 
     println!("cargo:rerun-if-changed={}", linker_file);
+    println!("cargo:rerun-if-changed=build.rs");
 }
diff --git a/07_uart_chainloader/Cargo.toml b/07_uart_chainloader/Cargo.toml
index b8906da1f..df5f7f974 100644
--- a/07_uart_chainloader/Cargo.toml
+++ b/07_uart_chainloader/Cargo.toml
@@ -7,7 +7,6 @@ edition = "2018"
 [profile.release]
 lto = true
 
-# The features section is used to select the target board.
 [features]
 default = []
 bsp_rpi3 = ["register"]
diff --git a/07_uart_chainloader/Makefile b/07_uart_chainloader/Makefile
index d32147d65..4fc73f554 100644
--- a/07_uart_chainloader/Makefile
+++ b/07_uart_chainloader/Makefile
@@ -2,6 +2,8 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
+include ../utils/color.mk.in
+
 # Default to the RPi3
 BSP ?= rpi3
 
@@ -20,6 +22,7 @@ ifeq ($(BSP),rpi3)
     QEMU_RELEASE_ARGS = -serial stdio -display none
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
     LINKER_FILE       = src/bsp/raspberrypi/link.ld
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53 -C relocation-model=pic
     CHAINBOOT_DEMO_PAYLOAD = demo_payload_rpi3.img
@@ -31,6 +34,7 @@ else ifeq ($(BSP),rpi4)
     QEMU_RELEASE_ARGS = -serial stdio -display none
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
     LINKER_FILE       = src/bsp/raspberrypi/link.ld
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72 -C relocation-model=pic
     CHAINBOOT_DEMO_PAYLOAD = demo_payload_rpi4.img
@@ -39,12 +43,14 @@ endif
 # Export for build.rs
 export LINKER_FILE
 
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
-FEATURES      = bsp_$(BSP)
+FEATURES      = --features bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
-    --features $(FEATURES)         \
+    $(FEATURES)                    \
     --release
 
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
@@ -63,8 +69,8 @@ DOCKER_CMD_INTERACT  = $(DOCKER_CMD) -i -t
 DOCKER_ARG_DIR_UTILS = -v $(shell pwd)/../utils:/work/utils
 DOCKER_ARG_DEV       = --privileged -v /dev:/dev
 
-DOCKER_QEMU     = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
-DOCKER_ELFTOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
+DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 
 # Dockerize commands that require USB device passthrough only on Linux
 ifeq ($(UNAME_S),Linux)
@@ -82,22 +88,26 @@ EXEC_MINIPUSH = ruby ../utils/minipush.rb
 all: $(KERNEL_BIN)
 
 $(KERNEL_ELF):
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
+	$(call colorecho, "\nCompiling kernel - $(BSP)")
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
 $(KERNEL_BIN): $(KERNEL_ELF)
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
 
 doc:
-	$(DOC_CMD) --document-private-items --open
+	$(call colorecho, "\nGenerating docs")
+	@$(DOC_CMD) --document-private-items --open
 
 ifeq ($(QEMU_MACHINE_TYPE),)
-qemu qemuasm:
-	@echo "This board is not yet supported for QEMU."
+qemu:
+	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
 else
 qemu: $(KERNEL_BIN)
+	$(call colorecho, "\nLaunching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
 qemuasm: $(KERNEL_BIN)
+	$(call colorecho, "\nLaunching QEMU with ASM output")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN) -d in_asm
 endif
 
@@ -105,22 +115,26 @@ chainboot:
 	@$(DOCKER_CHAINBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(CHAINBOOT_DEMO_PAYLOAD)
 
 clippy:
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
 clean:
 	rm -rf target $(KERNEL_BIN)
 
 readelf: $(KERNEL_ELF)
-	readelf --headers $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching readelf")
+	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
 objdump: $(KERNEL_ELF)
-	@$(DOCKER_ELFTOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
-                --section .text \
-                --section .got  \
+	$(call colorecho, "\nLaunching objdump")
+	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
+                --section .text   \
+                --section .rodata \
+                --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
 nm: $(KERNEL_ELF)
-	@$(DOCKER_ELFTOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
+	$(call colorecho, "\nLaunching nm")
+	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
 # For rust-analyzer
 check:
diff --git a/07_uart_chainloader/README.md b/07_uart_chainloader/README.md
index 91242143d..e67c78109 100644
--- a/07_uart_chainloader/README.md
+++ b/07_uart_chainloader/README.md
@@ -110,9 +110,9 @@ Binary files 06_drivers_gpio_uart/demo_payload_rpi4.img and 07_uart_chainloader/
 diff -uNr 06_drivers_gpio_uart/Makefile 07_uart_chainloader/Makefile
 --- 06_drivers_gpio_uart/Makefile
 +++ 07_uart_chainloader/Makefile
-@@ -21,7 +21,8 @@
-     OBJDUMP_BINARY    = aarch64-none-elf-objdump
+@@ -24,7 +24,8 @@
      NM_BINARY         = aarch64-none-elf-nm
+     READELF_BINARY    = aarch64-none-elf-readelf
      LINKER_FILE       = src/bsp/raspberrypi/link.ld
 -    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 +    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53 -C relocation-model=pic
@@ -120,9 +120,9 @@ diff -uNr 06_drivers_gpio_uart/Makefile 07_uart_chainloader/Makefile
  else ifeq ($(BSP),rpi4)
      TARGET            = aarch64-unknown-none-softfloat
      KERNEL_BIN        = kernel8.img
-@@ -31,7 +32,8 @@
-     OBJDUMP_BINARY    = aarch64-none-elf-objdump
+@@ -35,7 +36,8 @@
      NM_BINARY         = aarch64-none-elf-nm
+     READELF_BINARY    = aarch64-none-elf-readelf
      LINKER_FILE       = src/bsp/raspberrypi/link.ld
 -    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 +    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72 -C relocation-model=pic
@@ -130,7 +130,7 @@ diff -uNr 06_drivers_gpio_uart/Makefile 07_uart_chainloader/Makefile
  endif
 
  # Export for build.rs
-@@ -68,13 +70,14 @@
+@@ -74,13 +76,14 @@
  ifeq ($(UNAME_S),Linux)
      DOCKER_CMD_DEV = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DEV)
 
@@ -148,18 +148,13 @@ diff -uNr 06_drivers_gpio_uart/Makefile 07_uart_chainloader/Makefile
 
  all: $(KERNEL_BIN)
 
-@@ -88,15 +91,18 @@
- 	$(DOC_CMD) --document-private-items --open
-
- ifeq ($(QEMU_MACHINE_TYPE),)
--qemu:
-+qemu qemuasm:
- 	@echo "This board is not yet supported for QEMU."
- else
+@@ -102,10 +105,14 @@
  qemu: $(KERNEL_BIN)
+ 	$(call colorecho, "\nLaunching QEMU")
  	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 +
 +qemuasm: $(KERNEL_BIN)
++	$(call colorecho, "\nLaunching QEMU with ASM output")
 +	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN) -d in_asm
  endif
 
@@ -169,19 +164,15 @@ diff -uNr 06_drivers_gpio_uart/Makefile 07_uart_chainloader/Makefile
 +	@$(DOCKER_CHAINBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(CHAINBOOT_DEMO_PAYLOAD)
 
  clippy:
- 	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
-@@ -108,7 +114,10 @@
- 	readelf --headers $(KERNEL_ELF)
-
- objdump: $(KERNEL_ELF)
--	@$(DOCKER_ELFTOOLS) $(OBJDUMP_BINARY) --disassemble --demangle $(KERNEL_ELF) | rustfilt
-+	@$(DOCKER_ELFTOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
-+                --section .text \
-+                --section .got  \
-+                $(KERNEL_ELF) | rustfilt
+ 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
+@@ -122,6 +129,7 @@
+ 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
+                 --section .text   \
+                 --section .rodata \
++                --section .got    \
+                 $(KERNEL_ELF) | rustfilt
 
  nm: $(KERNEL_ELF)
- 	@$(DOCKER_ELFTOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
 diff -uNr 06_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs 07_uart_chainloader/src/_arch/aarch64/cpu/boot.rs
 --- 06_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs
diff --git a/07_uart_chainloader/build.rs b/07_uart_chainloader/build.rs
index 40ee0284d..3f0a29110 100644
--- a/07_uart_chainloader/build.rs
+++ b/07_uart_chainloader/build.rs
@@ -4,4 +4,5 @@ fn main() {
     let linker_file = env::var("LINKER_FILE").unwrap();
 
     println!("cargo:rerun-if-changed={}", linker_file);
+    println!("cargo:rerun-if-changed=build.rs");
 }
diff --git a/07_uart_chainloader/demo_payload_rpi3.img b/07_uart_chainloader/demo_payload_rpi3.img
index 13cf8aa1ed21d4896c05b5c25caf8d17c69289fa..a46c0d4149a22954048d876138fda7825a398700 100755
GIT binary patch
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zYoblaDO;S?So06eOjLDyEs`_pL{bS!5xHS>&!#{uOr&TqxjUOf8F?T9@nA^&ChAv;
zUz%IuVFE>7=(s~MBs<V?2N*~0nwiQ-QqwUG9w)6Ht4J0kJW^c*DmZfKO1G$$P$>d%
zRn@;o>68|_gy6dZOjp_z!xTx?u`+T^E8(vAedq*XN*AR<{9jA_P=(e1U*d-<y#K#R
z%;l|&%w6H~0?If?a%lkeyf{e+D~tQc+{_N!2q9$V4f_*<m-Ns`vXz#4KhyL&f`<e2
z$C<^tjds#K)3A1)kRn@X*xKygM%Mu3>oH(?2<UP82tB{p##$N=kummCV?f2LcJ+=J
zEKI-ON!1Cs4K~P}6`H1?N72G=#Q-vR^TaNoA=CVX+p!NcsYlf!Yx(I*g%IL0#wbk^
z8hNUjma!1M&Y|&}&<X3Pj#*2+Hf<PttlVqYI5%>potmnkEq4>Awv0Dp8L!Vz%<tO1
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diff --git a/08_timestamps/Cargo.toml b/08_timestamps/Cargo.toml
index b8906da1f..df5f7f974 100644
--- a/08_timestamps/Cargo.toml
+++ b/08_timestamps/Cargo.toml
@@ -7,7 +7,6 @@ edition = "2018"
 [profile.release]
 lto = true
 
-# The features section is used to select the target board.
 [features]
 default = []
 bsp_rpi3 = ["register"]
diff --git a/08_timestamps/Makefile b/08_timestamps/Makefile
index 27944c93d..4206c5282 100644
--- a/08_timestamps/Makefile
+++ b/08_timestamps/Makefile
@@ -2,6 +2,8 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
+include ../utils/color.mk.in
+
 # Default to the RPi3
 BSP ?= rpi3
 
@@ -20,6 +22,7 @@ ifeq ($(BSP),rpi3)
     QEMU_RELEASE_ARGS = -serial stdio -display none
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
     LINKER_FILE       = src/bsp/raspberrypi/link.ld
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
@@ -30,6 +33,7 @@ else ifeq ($(BSP),rpi4)
     QEMU_RELEASE_ARGS = -serial stdio -display none
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
     LINKER_FILE       = src/bsp/raspberrypi/link.ld
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
@@ -37,12 +41,14 @@ endif
 # Export for build.rs
 export LINKER_FILE
 
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
-FEATURES      = bsp_$(BSP)
+FEATURES      = --features bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
-    --features $(FEATURES)         \
+    $(FEATURES)                    \
     --release
 
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
@@ -61,8 +67,8 @@ DOCKER_CMD_INTERACT  = $(DOCKER_CMD) -i -t
 DOCKER_ARG_DIR_UTILS = -v $(shell pwd)/../utils:/work/utils
 DOCKER_ARG_DEV       = --privileged -v /dev:/dev
 
-DOCKER_QEMU     = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
-DOCKER_ELFTOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
+DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 
 # Dockerize commands that require USB device passthrough only on Linux
 ifeq ($(UNAME_S),Linux)
@@ -79,19 +85,22 @@ EXEC_MINIPUSH = ruby ../utils/minipush.rb
 all: $(KERNEL_BIN)
 
 $(KERNEL_ELF):
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
+	$(call colorecho, "\nCompiling kernel - $(BSP)")
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
 $(KERNEL_BIN): $(KERNEL_ELF)
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
 
 doc:
-	$(DOC_CMD) --document-private-items --open
+	$(call colorecho, "\nGenerating docs")
+	@$(DOC_CMD) --document-private-items --open
 
 ifeq ($(QEMU_MACHINE_TYPE),)
 qemu:
-	@echo "This board is not yet supported for QEMU."
+	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
 else
 qemu: $(KERNEL_BIN)
+	$(call colorecho, "\nLaunching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 endif
 
@@ -99,19 +108,25 @@ chainboot: $(KERNEL_BIN)
 	@$(DOCKER_CHAINBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(KERNEL_BIN)
 
 clippy:
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
 clean:
 	rm -rf target $(KERNEL_BIN)
 
 readelf: $(KERNEL_ELF)
-	readelf --headers $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching readelf")
+	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
 objdump: $(KERNEL_ELF)
-	@$(DOCKER_ELFTOOLS) $(OBJDUMP_BINARY) --disassemble --demangle $(KERNEL_ELF) | rustfilt
+	$(call colorecho, "\nLaunching objdump")
+	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
+                --section .text   \
+                --section .rodata \
+                $(KERNEL_ELF) | rustfilt
 
 nm: $(KERNEL_ELF)
-	@$(DOCKER_ELFTOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
+	$(call colorecho, "\nLaunching nm")
+	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
 # For rust-analyzer
 check:
diff --git a/08_timestamps/README.md b/08_timestamps/README.md
index 43c165386..55c12a7f8 100644
--- a/08_timestamps/README.md
+++ b/08_timestamps/README.md
@@ -49,9 +49,9 @@ Binary files 07_uart_chainloader/demo_payload_rpi4.img and 08_timestamps/demo_pa
 diff -uNr 07_uart_chainloader/Makefile 08_timestamps/Makefile
 --- 07_uart_chainloader/Makefile
 +++ 08_timestamps/Makefile
-@@ -21,8 +21,7 @@
-     OBJDUMP_BINARY    = aarch64-none-elf-objdump
+@@ -24,8 +24,7 @@
      NM_BINARY         = aarch64-none-elf-nm
+     READELF_BINARY    = aarch64-none-elf-readelf
      LINKER_FILE       = src/bsp/raspberrypi/link.ld
 -    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53 -C relocation-model=pic
 -    CHAINBOOT_DEMO_PAYLOAD = demo_payload_rpi3.img
@@ -59,9 +59,9 @@ diff -uNr 07_uart_chainloader/Makefile 08_timestamps/Makefile
  else ifeq ($(BSP),rpi4)
      TARGET            = aarch64-unknown-none-softfloat
      KERNEL_BIN        = kernel8.img
-@@ -32,8 +31,7 @@
-     OBJDUMP_BINARY    = aarch64-none-elf-objdump
+@@ -36,8 +35,7 @@
      NM_BINARY         = aarch64-none-elf-nm
+     READELF_BINARY    = aarch64-none-elf-readelf
      LINKER_FILE       = src/bsp/raspberrypi/link.ld
 -    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72 -C relocation-model=pic
 -    CHAINBOOT_DEMO_PAYLOAD = demo_payload_rpi4.img
@@ -69,7 +69,7 @@ diff -uNr 07_uart_chainloader/Makefile 08_timestamps/Makefile
  endif
 
  # Export for build.rs
-@@ -76,8 +74,7 @@
+@@ -82,8 +80,7 @@
  EXEC_QEMU     = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
  EXEC_MINIPUSH = ruby ../utils/minipush.rb
 
@@ -79,18 +79,13 @@ diff -uNr 07_uart_chainloader/Makefile 08_timestamps/Makefile
 
  all: $(KERNEL_BIN)
 
-@@ -91,18 +88,15 @@
- 	$(DOC_CMD) --document-private-items --open
-
- ifeq ($(QEMU_MACHINE_TYPE),)
--qemu qemuasm:
-+qemu:
- 	@echo "This board is not yet supported for QEMU."
- else
+@@ -105,14 +102,10 @@
  qemu: $(KERNEL_BIN)
+ 	$(call colorecho, "\nLaunching QEMU")
  	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 -
 -qemuasm: $(KERNEL_BIN)
+-	$(call colorecho, "\nLaunching QEMU with ASM output")
 -	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN) -d in_asm
  endif
 
@@ -100,19 +95,15 @@ diff -uNr 07_uart_chainloader/Makefile 08_timestamps/Makefile
 +	@$(DOCKER_CHAINBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(KERNEL_BIN)
 
  clippy:
- 	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
-@@ -114,10 +108,7 @@
- 	readelf --headers $(KERNEL_ELF)
-
- objdump: $(KERNEL_ELF)
--	@$(DOCKER_ELFTOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
--                --section .text \
--                --section .got  \
--                $(KERNEL_ELF) | rustfilt
-+	@$(DOCKER_ELFTOOLS) $(OBJDUMP_BINARY) --disassemble --demangle $(KERNEL_ELF) | rustfilt
+ 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
+@@ -129,7 +122,6 @@
+ 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
+                 --section .text   \
+                 --section .rodata \
+-                --section .got    \
+                 $(KERNEL_ELF) | rustfilt
 
  nm: $(KERNEL_ELF)
- 	@$(DOCKER_ELFTOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
 diff -uNr 07_uart_chainloader/src/_arch/aarch64/cpu/boot.rs 08_timestamps/src/_arch/aarch64/cpu/boot.rs
 --- 07_uart_chainloader/src/_arch/aarch64/cpu/boot.rs
diff --git a/08_timestamps/build.rs b/08_timestamps/build.rs
index 40ee0284d..3f0a29110 100644
--- a/08_timestamps/build.rs
+++ b/08_timestamps/build.rs
@@ -4,4 +4,5 @@ fn main() {
     let linker_file = env::var("LINKER_FILE").unwrap();
 
     println!("cargo:rerun-if-changed={}", linker_file);
+    println!("cargo:rerun-if-changed=build.rs");
 }
diff --git a/09_hw_debug_JTAG/Cargo.toml b/09_hw_debug_JTAG/Cargo.toml
index b8906da1f..df5f7f974 100644
--- a/09_hw_debug_JTAG/Cargo.toml
+++ b/09_hw_debug_JTAG/Cargo.toml
@@ -7,7 +7,6 @@ edition = "2018"
 [profile.release]
 lto = true
 
-# The features section is used to select the target board.
 [features]
 default = []
 bsp_rpi3 = ["register"]
diff --git a/09_hw_debug_JTAG/Makefile b/09_hw_debug_JTAG/Makefile
index 9105d297f..038244e7e 100644
--- a/09_hw_debug_JTAG/Makefile
+++ b/09_hw_debug_JTAG/Makefile
@@ -2,6 +2,8 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
+include ../utils/color.mk.in
+
 # Default to the RPi3
 BSP ?= rpi3
 
@@ -20,6 +22,7 @@ ifeq ($(BSP),rpi3)
     QEMU_RELEASE_ARGS = -serial stdio -display none
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
     LINKER_FILE       = src/bsp/raspberrypi/link.ld
@@ -32,6 +35,7 @@ else ifeq ($(BSP),rpi4)
     QEMU_RELEASE_ARGS = -serial stdio -display none
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
     LINKER_FILE       = src/bsp/raspberrypi/link.ld
@@ -41,12 +45,14 @@ endif
 # Export for build.rs
 export LINKER_FILE
 
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
-FEATURES      = bsp_$(BSP)
+FEATURES      = --features bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
-    --features $(FEATURES)         \
+    $(FEATURES)                    \
     --release
 
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
@@ -67,9 +73,9 @@ DOCKER_ARG_DIR_JTAG  = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
 DOCKER_ARG_DEV       = --privileged -v /dev:/dev
 DOCKER_ARG_NET       = --network host
 
-DOCKER_QEMU     = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
-DOCKER_GDB      = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
-DOCKER_ELFTOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
+DOCKER_GDB   = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
+DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 
 # Dockerize commands that require USB device passthrough only on Linux
 ifeq ($(UNAME_S),Linux)
@@ -91,19 +97,22 @@ EXEC_MINIPUSH = ruby ../utils/minipush.rb
 all: $(KERNEL_BIN)
 
 $(KERNEL_ELF):
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
+	$(call colorecho, "\nCompiling kernel - $(BSP)")
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
 $(KERNEL_BIN): $(KERNEL_ELF)
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
 
 doc:
-	$(DOC_CMD) --document-private-items --open
+	$(call colorecho, "\nGenerating docs")
+	@$(DOC_CMD) --document-private-items --open
 
 ifeq ($(QEMU_MACHINE_TYPE),)
 qemu:
-	@echo "This board is not yet supported for QEMU."
+	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
 else
 qemu: $(KERNEL_BIN)
+	$(call colorecho, "\nLaunching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 endif
 
@@ -114,33 +123,35 @@ jtagboot:
 	@$(DOCKER_JTAGBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(JTAG_BOOT_IMAGE)
 
 openocd:
+	$(call colorecho, "\nLaunching OpenOCD")
 	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
 
-define gen_gdb
-    RUSTFLAGS="$(RUSTFLAGS_PEDANTIC) $1" $(RUSTC_CMD)
-    @$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
-endef
-
-gdb:
-	$(call gen_gdb,-C debuginfo=2)
-
-gdb-opt0:
-	$(call gen_gdb,-C debuginfo=2 -C opt-level=0)
+gdb: RUSTC_MISC_ARGS += -C debuginfo=2
+gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
+gdb gdb-opt0: $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching GDB")
+	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
 
 clippy:
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
 clean:
 	rm -rf target $(KERNEL_BIN)
 
 readelf: $(KERNEL_ELF)
-	readelf --headers $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching readelf")
+	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
 objdump: $(KERNEL_ELF)
-	@$(DOCKER_ELFTOOLS) $(OBJDUMP_BINARY) --disassemble --demangle $(KERNEL_ELF) | rustfilt
+	$(call colorecho, "\nLaunching objdump")
+	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
+                --section .text   \
+                --section .rodata \
+                $(KERNEL_ELF) | rustfilt
 
 nm: $(KERNEL_ELF)
-	@$(DOCKER_ELFTOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
+	$(call colorecho, "\nLaunching nm")
+	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
 # For rust-analyzer
 check:
diff --git a/09_hw_debug_JTAG/README.md b/09_hw_debug_JTAG/README.md
index 918f72582..b13e1fa7f 100644
--- a/09_hw_debug_JTAG/README.md
+++ b/09_hw_debug_JTAG/README.md
@@ -306,25 +306,25 @@ Thanks to [@naotaco](https://github.com/naotaco) for laying the groundwork for t
 diff -uNr 08_timestamps/Makefile 09_hw_debug_JTAG/Makefile
 --- 08_timestamps/Makefile
 +++ 09_hw_debug_JTAG/Makefile
-@@ -20,6 +20,8 @@
-     QEMU_RELEASE_ARGS = -serial stdio -display none
+@@ -23,6 +23,8 @@
      OBJDUMP_BINARY    = aarch64-none-elf-objdump
      NM_BINARY         = aarch64-none-elf-nm
+     READELF_BINARY    = aarch64-none-elf-readelf
 +    OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
 +    JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
      LINKER_FILE       = src/bsp/raspberrypi/link.ld
      RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
  else ifeq ($(BSP),rpi4)
-@@ -30,6 +32,8 @@
-     QEMU_RELEASE_ARGS = -serial stdio -display none
+@@ -34,6 +36,8 @@
      OBJDUMP_BINARY    = aarch64-none-elf-objdump
      NM_BINARY         = aarch64-none-elf-nm
+     READELF_BINARY    = aarch64-none-elf-readelf
 +    OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
 +    JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
      LINKER_FILE       = src/bsp/raspberrypi/link.ld
      RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
  endif
-@@ -59,9 +63,12 @@
+@@ -65,9 +69,12 @@
  DOCKER_CMD           = docker run --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
  DOCKER_CMD_INTERACT  = $(DOCKER_CMD) -i -t
  DOCKER_ARG_DIR_UTILS = -v $(shell pwd)/../utils:/work/utils
@@ -332,12 +332,12 @@ diff -uNr 08_timestamps/Makefile 09_hw_debug_JTAG/Makefile
  DOCKER_ARG_DEV       = --privileged -v /dev:/dev
 +DOCKER_ARG_NET       = --network host
 
- DOCKER_QEMU     = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
-+DOCKER_GDB      = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
- DOCKER_ELFTOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+ DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
++DOCKER_GDB   = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
+ DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 
  # Dockerize commands that require USB device passthrough only on Linux
-@@ -69,12 +76,17 @@
+@@ -75,12 +82,17 @@
      DOCKER_CMD_DEV = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DEV)
 
      DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_IMAGE)
@@ -356,7 +356,7 @@ diff -uNr 08_timestamps/Makefile 09_hw_debug_JTAG/Makefile
 
  all: $(KERNEL_BIN)
 
-@@ -98,6 +110,23 @@
+@@ -107,6 +119,19 @@
  chainboot: $(KERNEL_BIN)
  	@$(DOCKER_CHAINBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(KERNEL_BIN)
 
@@ -364,20 +364,16 @@ diff -uNr 08_timestamps/Makefile 09_hw_debug_JTAG/Makefile
 +	@$(DOCKER_JTAGBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(JTAG_BOOT_IMAGE)
 +
 +openocd:
++	$(call colorecho, "\nLaunching OpenOCD")
 +	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
 +
-+define gen_gdb
-+    RUSTFLAGS="$(RUSTFLAGS_PEDANTIC) $1" $(RUSTC_CMD)
-+    @$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
-+endef
-+
-+gdb:
-+	$(call gen_gdb,-C debuginfo=2)
-+
-+gdb-opt0:
-+	$(call gen_gdb,-C debuginfo=2 -C opt-level=0)
++gdb: RUSTC_MISC_ARGS += -C debuginfo=2
++gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
++gdb gdb-opt0: $(KERNEL_ELF)
++	$(call colorecho, "\nLaunching GDB")
++	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
 +
  clippy:
- 	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
+ 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
 ```
diff --git a/09_hw_debug_JTAG/build.rs b/09_hw_debug_JTAG/build.rs
index 40ee0284d..3f0a29110 100644
--- a/09_hw_debug_JTAG/build.rs
+++ b/09_hw_debug_JTAG/build.rs
@@ -4,4 +4,5 @@ fn main() {
     let linker_file = env::var("LINKER_FILE").unwrap();
 
     println!("cargo:rerun-if-changed={}", linker_file);
+    println!("cargo:rerun-if-changed=build.rs");
 }
diff --git a/10_privilege_level/Cargo.toml b/10_privilege_level/Cargo.toml
index b8906da1f..df5f7f974 100644
--- a/10_privilege_level/Cargo.toml
+++ b/10_privilege_level/Cargo.toml
@@ -7,7 +7,6 @@ edition = "2018"
 [profile.release]
 lto = true
 
-# The features section is used to select the target board.
 [features]
 default = []
 bsp_rpi3 = ["register"]
diff --git a/10_privilege_level/Makefile b/10_privilege_level/Makefile
index 9105d297f..038244e7e 100644
--- a/10_privilege_level/Makefile
+++ b/10_privilege_level/Makefile
@@ -2,6 +2,8 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
+include ../utils/color.mk.in
+
 # Default to the RPi3
 BSP ?= rpi3
 
@@ -20,6 +22,7 @@ ifeq ($(BSP),rpi3)
     QEMU_RELEASE_ARGS = -serial stdio -display none
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
     LINKER_FILE       = src/bsp/raspberrypi/link.ld
@@ -32,6 +35,7 @@ else ifeq ($(BSP),rpi4)
     QEMU_RELEASE_ARGS = -serial stdio -display none
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
     LINKER_FILE       = src/bsp/raspberrypi/link.ld
@@ -41,12 +45,14 @@ endif
 # Export for build.rs
 export LINKER_FILE
 
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
-FEATURES      = bsp_$(BSP)
+FEATURES      = --features bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
-    --features $(FEATURES)         \
+    $(FEATURES)                    \
     --release
 
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
@@ -67,9 +73,9 @@ DOCKER_ARG_DIR_JTAG  = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
 DOCKER_ARG_DEV       = --privileged -v /dev:/dev
 DOCKER_ARG_NET       = --network host
 
-DOCKER_QEMU     = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
-DOCKER_GDB      = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
-DOCKER_ELFTOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
+DOCKER_GDB   = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
+DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 
 # Dockerize commands that require USB device passthrough only on Linux
 ifeq ($(UNAME_S),Linux)
@@ -91,19 +97,22 @@ EXEC_MINIPUSH = ruby ../utils/minipush.rb
 all: $(KERNEL_BIN)
 
 $(KERNEL_ELF):
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
+	$(call colorecho, "\nCompiling kernel - $(BSP)")
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
 $(KERNEL_BIN): $(KERNEL_ELF)
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
 
 doc:
-	$(DOC_CMD) --document-private-items --open
+	$(call colorecho, "\nGenerating docs")
+	@$(DOC_CMD) --document-private-items --open
 
 ifeq ($(QEMU_MACHINE_TYPE),)
 qemu:
-	@echo "This board is not yet supported for QEMU."
+	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
 else
 qemu: $(KERNEL_BIN)
+	$(call colorecho, "\nLaunching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 endif
 
@@ -114,33 +123,35 @@ jtagboot:
 	@$(DOCKER_JTAGBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(JTAG_BOOT_IMAGE)
 
 openocd:
+	$(call colorecho, "\nLaunching OpenOCD")
 	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
 
-define gen_gdb
-    RUSTFLAGS="$(RUSTFLAGS_PEDANTIC) $1" $(RUSTC_CMD)
-    @$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
-endef
-
-gdb:
-	$(call gen_gdb,-C debuginfo=2)
-
-gdb-opt0:
-	$(call gen_gdb,-C debuginfo=2 -C opt-level=0)
+gdb: RUSTC_MISC_ARGS += -C debuginfo=2
+gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
+gdb gdb-opt0: $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching GDB")
+	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
 
 clippy:
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
 clean:
 	rm -rf target $(KERNEL_BIN)
 
 readelf: $(KERNEL_ELF)
-	readelf --headers $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching readelf")
+	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
 objdump: $(KERNEL_ELF)
-	@$(DOCKER_ELFTOOLS) $(OBJDUMP_BINARY) --disassemble --demangle $(KERNEL_ELF) | rustfilt
+	$(call colorecho, "\nLaunching objdump")
+	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
+                --section .text   \
+                --section .rodata \
+                $(KERNEL_ELF) | rustfilt
 
 nm: $(KERNEL_ELF)
-	@$(DOCKER_ELFTOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
+	$(call colorecho, "\nLaunching nm")
+	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
 # For rust-analyzer
 check:
diff --git a/10_privilege_level/build.rs b/10_privilege_level/build.rs
index 40ee0284d..3f0a29110 100644
--- a/10_privilege_level/build.rs
+++ b/10_privilege_level/build.rs
@@ -4,4 +4,5 @@ fn main() {
     let linker_file = env::var("LINKER_FILE").unwrap();
 
     println!("cargo:rerun-if-changed={}", linker_file);
+    println!("cargo:rerun-if-changed=build.rs");
 }
diff --git a/11_virtual_mem_part1_identity_mapping/Cargo.toml b/11_virtual_mem_part1_identity_mapping/Cargo.toml
index b8906da1f..df5f7f974 100644
--- a/11_virtual_mem_part1_identity_mapping/Cargo.toml
+++ b/11_virtual_mem_part1_identity_mapping/Cargo.toml
@@ -7,7 +7,6 @@ edition = "2018"
 [profile.release]
 lto = true
 
-# The features section is used to select the target board.
 [features]
 default = []
 bsp_rpi3 = ["register"]
diff --git a/11_virtual_mem_part1_identity_mapping/Makefile b/11_virtual_mem_part1_identity_mapping/Makefile
index 9105d297f..038244e7e 100644
--- a/11_virtual_mem_part1_identity_mapping/Makefile
+++ b/11_virtual_mem_part1_identity_mapping/Makefile
@@ -2,6 +2,8 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
+include ../utils/color.mk.in
+
 # Default to the RPi3
 BSP ?= rpi3
 
@@ -20,6 +22,7 @@ ifeq ($(BSP),rpi3)
     QEMU_RELEASE_ARGS = -serial stdio -display none
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
     LINKER_FILE       = src/bsp/raspberrypi/link.ld
@@ -32,6 +35,7 @@ else ifeq ($(BSP),rpi4)
     QEMU_RELEASE_ARGS = -serial stdio -display none
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
     LINKER_FILE       = src/bsp/raspberrypi/link.ld
@@ -41,12 +45,14 @@ endif
 # Export for build.rs
 export LINKER_FILE
 
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
-FEATURES      = bsp_$(BSP)
+FEATURES      = --features bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
-    --features $(FEATURES)         \
+    $(FEATURES)                    \
     --release
 
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
@@ -67,9 +73,9 @@ DOCKER_ARG_DIR_JTAG  = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
 DOCKER_ARG_DEV       = --privileged -v /dev:/dev
 DOCKER_ARG_NET       = --network host
 
-DOCKER_QEMU     = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
-DOCKER_GDB      = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
-DOCKER_ELFTOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
+DOCKER_GDB   = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
+DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 
 # Dockerize commands that require USB device passthrough only on Linux
 ifeq ($(UNAME_S),Linux)
@@ -91,19 +97,22 @@ EXEC_MINIPUSH = ruby ../utils/minipush.rb
 all: $(KERNEL_BIN)
 
 $(KERNEL_ELF):
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
+	$(call colorecho, "\nCompiling kernel - $(BSP)")
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
 $(KERNEL_BIN): $(KERNEL_ELF)
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
 
 doc:
-	$(DOC_CMD) --document-private-items --open
+	$(call colorecho, "\nGenerating docs")
+	@$(DOC_CMD) --document-private-items --open
 
 ifeq ($(QEMU_MACHINE_TYPE),)
 qemu:
-	@echo "This board is not yet supported for QEMU."
+	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
 else
 qemu: $(KERNEL_BIN)
+	$(call colorecho, "\nLaunching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 endif
 
@@ -114,33 +123,35 @@ jtagboot:
 	@$(DOCKER_JTAGBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(JTAG_BOOT_IMAGE)
 
 openocd:
+	$(call colorecho, "\nLaunching OpenOCD")
 	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
 
-define gen_gdb
-    RUSTFLAGS="$(RUSTFLAGS_PEDANTIC) $1" $(RUSTC_CMD)
-    @$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
-endef
-
-gdb:
-	$(call gen_gdb,-C debuginfo=2)
-
-gdb-opt0:
-	$(call gen_gdb,-C debuginfo=2 -C opt-level=0)
+gdb: RUSTC_MISC_ARGS += -C debuginfo=2
+gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
+gdb gdb-opt0: $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching GDB")
+	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
 
 clippy:
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
 clean:
 	rm -rf target $(KERNEL_BIN)
 
 readelf: $(KERNEL_ELF)
-	readelf --headers $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching readelf")
+	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
 objdump: $(KERNEL_ELF)
-	@$(DOCKER_ELFTOOLS) $(OBJDUMP_BINARY) --disassemble --demangle $(KERNEL_ELF) | rustfilt
+	$(call colorecho, "\nLaunching objdump")
+	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
+                --section .text   \
+                --section .rodata \
+                $(KERNEL_ELF) | rustfilt
 
 nm: $(KERNEL_ELF)
-	@$(DOCKER_ELFTOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
+	$(call colorecho, "\nLaunching nm")
+	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
 # For rust-analyzer
 check:
diff --git a/11_virtual_mem_part1_identity_mapping/build.rs b/11_virtual_mem_part1_identity_mapping/build.rs
index 40ee0284d..3f0a29110 100644
--- a/11_virtual_mem_part1_identity_mapping/build.rs
+++ b/11_virtual_mem_part1_identity_mapping/build.rs
@@ -4,4 +4,5 @@ fn main() {
     let linker_file = env::var("LINKER_FILE").unwrap();
 
     println!("cargo:rerun-if-changed={}", linker_file);
+    println!("cargo:rerun-if-changed=build.rs");
 }
diff --git a/12_exceptions_part1_groundwork/Cargo.toml b/12_exceptions_part1_groundwork/Cargo.toml
index b8906da1f..df5f7f974 100644
--- a/12_exceptions_part1_groundwork/Cargo.toml
+++ b/12_exceptions_part1_groundwork/Cargo.toml
@@ -7,7 +7,6 @@ edition = "2018"
 [profile.release]
 lto = true
 
-# The features section is used to select the target board.
 [features]
 default = []
 bsp_rpi3 = ["register"]
diff --git a/12_exceptions_part1_groundwork/Makefile b/12_exceptions_part1_groundwork/Makefile
index 9105d297f..038244e7e 100644
--- a/12_exceptions_part1_groundwork/Makefile
+++ b/12_exceptions_part1_groundwork/Makefile
@@ -2,6 +2,8 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
+include ../utils/color.mk.in
+
 # Default to the RPi3
 BSP ?= rpi3
 
@@ -20,6 +22,7 @@ ifeq ($(BSP),rpi3)
     QEMU_RELEASE_ARGS = -serial stdio -display none
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
     LINKER_FILE       = src/bsp/raspberrypi/link.ld
@@ -32,6 +35,7 @@ else ifeq ($(BSP),rpi4)
     QEMU_RELEASE_ARGS = -serial stdio -display none
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
     LINKER_FILE       = src/bsp/raspberrypi/link.ld
@@ -41,12 +45,14 @@ endif
 # Export for build.rs
 export LINKER_FILE
 
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
-FEATURES      = bsp_$(BSP)
+FEATURES      = --features bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
-    --features $(FEATURES)         \
+    $(FEATURES)                    \
     --release
 
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
@@ -67,9 +73,9 @@ DOCKER_ARG_DIR_JTAG  = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
 DOCKER_ARG_DEV       = --privileged -v /dev:/dev
 DOCKER_ARG_NET       = --network host
 
-DOCKER_QEMU     = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
-DOCKER_GDB      = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
-DOCKER_ELFTOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
+DOCKER_GDB   = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
+DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 
 # Dockerize commands that require USB device passthrough only on Linux
 ifeq ($(UNAME_S),Linux)
@@ -91,19 +97,22 @@ EXEC_MINIPUSH = ruby ../utils/minipush.rb
 all: $(KERNEL_BIN)
 
 $(KERNEL_ELF):
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
+	$(call colorecho, "\nCompiling kernel - $(BSP)")
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
 $(KERNEL_BIN): $(KERNEL_ELF)
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
 
 doc:
-	$(DOC_CMD) --document-private-items --open
+	$(call colorecho, "\nGenerating docs")
+	@$(DOC_CMD) --document-private-items --open
 
 ifeq ($(QEMU_MACHINE_TYPE),)
 qemu:
-	@echo "This board is not yet supported for QEMU."
+	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
 else
 qemu: $(KERNEL_BIN)
+	$(call colorecho, "\nLaunching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 endif
 
@@ -114,33 +123,35 @@ jtagboot:
 	@$(DOCKER_JTAGBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(JTAG_BOOT_IMAGE)
 
 openocd:
+	$(call colorecho, "\nLaunching OpenOCD")
 	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
 
-define gen_gdb
-    RUSTFLAGS="$(RUSTFLAGS_PEDANTIC) $1" $(RUSTC_CMD)
-    @$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
-endef
-
-gdb:
-	$(call gen_gdb,-C debuginfo=2)
-
-gdb-opt0:
-	$(call gen_gdb,-C debuginfo=2 -C opt-level=0)
+gdb: RUSTC_MISC_ARGS += -C debuginfo=2
+gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
+gdb gdb-opt0: $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching GDB")
+	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
 
 clippy:
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
 clean:
 	rm -rf target $(KERNEL_BIN)
 
 readelf: $(KERNEL_ELF)
-	readelf --headers $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching readelf")
+	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
 objdump: $(KERNEL_ELF)
-	@$(DOCKER_ELFTOOLS) $(OBJDUMP_BINARY) --disassemble --demangle $(KERNEL_ELF) | rustfilt
+	$(call colorecho, "\nLaunching objdump")
+	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
+                --section .text   \
+                --section .rodata \
+                $(KERNEL_ELF) | rustfilt
 
 nm: $(KERNEL_ELF)
-	@$(DOCKER_ELFTOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
+	$(call colorecho, "\nLaunching nm")
+	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
 # For rust-analyzer
 check:
diff --git a/12_exceptions_part1_groundwork/build.rs b/12_exceptions_part1_groundwork/build.rs
index 40ee0284d..3f0a29110 100644
--- a/12_exceptions_part1_groundwork/build.rs
+++ b/12_exceptions_part1_groundwork/build.rs
@@ -4,4 +4,5 @@ fn main() {
     let linker_file = env::var("LINKER_FILE").unwrap();
 
     println!("cargo:rerun-if-changed={}", linker_file);
+    println!("cargo:rerun-if-changed=build.rs");
 }
diff --git a/13_integrated_testing/Makefile b/13_integrated_testing/Makefile
index 74e67da50..32d139243 100644
--- a/13_integrated_testing/Makefile
+++ b/13_integrated_testing/Makefile
@@ -2,6 +2,8 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
+include ../utils/color.mk.in
+
 # Default to the RPi3
 BSP ?= rpi3
 
@@ -21,6 +23,7 @@ ifeq ($(BSP),rpi3)
     QEMU_TEST_ARGS    = $(QEMU_RELEASE_ARGS) -semihosting
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
     LINKER_FILE       = src/bsp/raspberrypi/link.ld
@@ -34,6 +37,7 @@ else ifeq ($(BSP),rpi4)
     QEMU_TEST_ARGS    = $(QEMU_RELEASE_ARGS) -semihosting
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
     LINKER_FILE       = src/bsp/raspberrypi/link.ld
@@ -81,10 +85,10 @@ DOCKER_ARG_DIR_JTAG  = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
 DOCKER_ARG_DEV       = --privileged -v /dev:/dev
 DOCKER_ARG_NET       = --network host
 
-DOCKER_QEMU     = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
-DOCKER_GDB      = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
-DOCKER_TEST     = $(DOCKER_CMD) $(DOCKER_IMAGE)
-DOCKER_ELFTOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
+DOCKER_GDB   = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
+DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 
 # Dockerize commands that require USB device passthrough only on Linux
 ifeq ($(UNAME_S),Linux)
@@ -106,19 +110,22 @@ EXEC_MINIPUSH = ruby ../utils/minipush.rb
 all: $(KERNEL_BIN)
 
 $(KERNEL_ELF):
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
+	$(call colorecho, "\nCompiling kernel - $(BSP)")
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
 $(KERNEL_BIN): $(KERNEL_ELF)
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
 
 doc:
-	$(DOC_CMD) --document-private-items --open
+	$(call colorecho, "\nGenerating docs")
+	@$(DOC_CMD) --document-private-items --open
 
 ifeq ($(QEMU_MACHINE_TYPE),)
 qemu test:
-	@echo $(QEMU_MISSING_STRING)
+	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
 else
 qemu: $(KERNEL_BIN)
+	$(call colorecho, "\nLaunching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
 define KERNEL_TEST_RUNNER
@@ -134,10 +141,11 @@ endef
 export KERNEL_TEST_RUNNER
 test: FEATURES += --features test_build
 test:
+	$(call colorecho, "\nCompiling test(s) - $(BSP)")
 	@mkdir -p target
 	@echo "$$KERNEL_TEST_RUNNER" > target/kernel_test_runner.sh
 	@chmod +x target/kernel_test_runner.sh
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) $(TEST_ARG)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) $(TEST_ARG)
 endif
 
 chainboot: $(KERNEL_BIN)
@@ -147,33 +155,35 @@ jtagboot:
 	@$(DOCKER_JTAGBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(JTAG_BOOT_IMAGE)
 
 openocd:
+	$(call colorecho, "\nLaunching OpenOCD")
 	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
 
-define gen_gdb
-    RUSTFLAGS="$(RUSTFLAGS_PEDANTIC) $1" $(RUSTC_CMD)
-    @$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
-endef
-
-gdb:
-	$(call gen_gdb,-C debuginfo=2)
-
-gdb-opt0:
-	$(call gen_gdb,-C debuginfo=2 -C opt-level=0)
+gdb: RUSTC_MISC_ARGS += -C debuginfo=2
+gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
+gdb gdb-opt0: $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching GDB")
+	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
 
 clippy:
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
 clean:
 	rm -rf target $(KERNEL_BIN)
 
 readelf: $(KERNEL_ELF)
-	readelf --headers $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching readelf")
+	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
 objdump: $(KERNEL_ELF)
-	@$(DOCKER_ELFTOOLS) $(OBJDUMP_BINARY) --disassemble --demangle $(KERNEL_ELF) | rustfilt
+	$(call colorecho, "\nLaunching objdump")
+	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
+                --section .text   \
+                --section .rodata \
+                $(KERNEL_ELF) | rustfilt
 
 nm: $(KERNEL_ELF)
-	@$(DOCKER_ELFTOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
+	$(call colorecho, "\nLaunching nm")
+	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
 # For rust-analyzer
 check:
diff --git a/13_integrated_testing/README.md b/13_integrated_testing/README.md
index 3f62ef6c7..c0fc217b9 100644
--- a/13_integrated_testing/README.md
+++ b/13_integrated_testing/README.md
@@ -819,12 +819,7 @@ diff -uNr 12_exceptions_part1_groundwork/.cargo/config.toml 13_integrated_testin
 diff -uNr 12_exceptions_part1_groundwork/Cargo.toml 13_integrated_testing/Cargo.toml
 --- 12_exceptions_part1_groundwork/Cargo.toml
 +++ 13_integrated_testing/Cargo.toml
-@@ -7,22 +7,49 @@
- [profile.release]
- lto = true
-
--# The features section is used to select the target board.
- [features]
+@@ -11,17 +11,45 @@
  default = []
  bsp_rpi3 = ["register"]
  bsp_rpi4 = ["register"]
@@ -875,23 +870,23 @@ diff -uNr 12_exceptions_part1_groundwork/Cargo.toml 13_integrated_testing/Cargo.
 diff -uNr 12_exceptions_part1_groundwork/Makefile 13_integrated_testing/Makefile
 --- 12_exceptions_part1_groundwork/Makefile
 +++ 13_integrated_testing/Makefile
-@@ -18,6 +18,7 @@
+@@ -20,6 +20,7 @@
      QEMU_BINARY       = qemu-system-aarch64
      QEMU_MACHINE_TYPE = raspi3
      QEMU_RELEASE_ARGS = -serial stdio -display none
 +    QEMU_TEST_ARGS    = $(QEMU_RELEASE_ARGS) -semihosting
      OBJDUMP_BINARY    = aarch64-none-elf-objdump
      NM_BINARY         = aarch64-none-elf-nm
-     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
-@@ -30,6 +31,7 @@
+     READELF_BINARY    = aarch64-none-elf-readelf
+@@ -33,6 +34,7 @@
      QEMU_BINARY       = qemu-system-aarch64
      QEMU_MACHINE_TYPE =
      QEMU_RELEASE_ARGS = -serial stdio -display none
 +    QEMU_TEST_ARGS    = $(QEMU_RELEASE_ARGS) -semihosting
      OBJDUMP_BINARY    = aarch64-none-elf-objdump
      NM_BINARY         = aarch64-none-elf-nm
-     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
-@@ -41,18 +43,30 @@
+     READELF_BINARY    = aarch64-none-elf-readelf
+@@ -45,6 +47,15 @@
  # Export for build.rs
  export LINKER_FILE
 
@@ -904,19 +899,10 @@ diff -uNr 12_exceptions_part1_groundwork/Makefile 13_integrated_testing/Makefile
 +    endif
 +endif
 +
-+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
-+
- RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
- RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
+ QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
 
--FEATURES      = bsp_$(BSP)
-+FEATURES      = --features bsp_$(BSP)
- COMPILER_ARGS = --target=$(TARGET) \
--    --features $(FEATURES)         \
-+    $(FEATURES)                    \
-     --release
-
- RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
+ RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
+@@ -59,6 +70,7 @@
  DOC_CMD     = cargo doc $(COMPILER_ARGS)
  CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
  CHECK_CMD   = cargo check $(COMPILER_ARGS)
@@ -924,15 +910,15 @@ diff -uNr 12_exceptions_part1_groundwork/Makefile 13_integrated_testing/Makefile
  OBJCOPY_CMD = rust-objcopy \
      --strip-all            \
      -O binary
-@@ -69,6 +83,7 @@
+@@ -75,6 +87,7 @@
 
- DOCKER_QEMU     = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
- DOCKER_GDB      = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
-+DOCKER_TEST     = $(DOCKER_CMD) $(DOCKER_IMAGE)
- DOCKER_ELFTOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+ DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
+ DOCKER_GDB   = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
++DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_IMAGE)
+ DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 
  # Dockerize commands that require USB device passthrough only on Linux
-@@ -85,8 +100,8 @@
+@@ -91,8 +104,8 @@
  EXEC_QEMU     = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
  EXEC_MINIPUSH = ruby ../utils/minipush.rb
 
@@ -943,16 +929,16 @@ diff -uNr 12_exceptions_part1_groundwork/Makefile 13_integrated_testing/Makefile
 
  all: $(KERNEL_BIN)
 
-@@ -100,11 +115,29 @@
- 	$(DOC_CMD) --document-private-items --open
+@@ -108,12 +121,31 @@
+ 	@$(DOC_CMD) --document-private-items --open
 
  ifeq ($(QEMU_MACHINE_TYPE),)
 -qemu:
--	@echo "This board is not yet supported for QEMU."
 +qemu test:
-+	@echo $(QEMU_MISSING_STRING)
+ 	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
  else
  qemu: $(KERNEL_BIN)
+ 	$(call colorecho, "\nLaunching QEMU")
  	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 +
 +define KERNEL_TEST_RUNNER
@@ -968,10 +954,11 @@ diff -uNr 12_exceptions_part1_groundwork/Makefile 13_integrated_testing/Makefile
 +export KERNEL_TEST_RUNNER
 +test: FEATURES += --features test_build
 +test:
++	$(call colorecho, "\nCompiling test(s) - $(BSP)")
 +	@mkdir -p target
 +	@echo "$$KERNEL_TEST_RUNNER" > target/kernel_test_runner.sh
 +	@chmod +x target/kernel_test_runner.sh
-+	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) $(TEST_ARG)
++	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) $(TEST_ARG)
  endif
 
  chainboot: $(KERNEL_BIN)
diff --git a/13_integrated_testing/build.rs b/13_integrated_testing/build.rs
index 40ee0284d..3f0a29110 100644
--- a/13_integrated_testing/build.rs
+++ b/13_integrated_testing/build.rs
@@ -4,4 +4,5 @@ fn main() {
     let linker_file = env::var("LINKER_FILE").unwrap();
 
     println!("cargo:rerun-if-changed={}", linker_file);
+    println!("cargo:rerun-if-changed=build.rs");
 }
diff --git a/14_exceptions_part2_peripheral_IRQs/Makefile b/14_exceptions_part2_peripheral_IRQs/Makefile
index 74e67da50..32d139243 100644
--- a/14_exceptions_part2_peripheral_IRQs/Makefile
+++ b/14_exceptions_part2_peripheral_IRQs/Makefile
@@ -2,6 +2,8 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
+include ../utils/color.mk.in
+
 # Default to the RPi3
 BSP ?= rpi3
 
@@ -21,6 +23,7 @@ ifeq ($(BSP),rpi3)
     QEMU_TEST_ARGS    = $(QEMU_RELEASE_ARGS) -semihosting
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
     LINKER_FILE       = src/bsp/raspberrypi/link.ld
@@ -34,6 +37,7 @@ else ifeq ($(BSP),rpi4)
     QEMU_TEST_ARGS    = $(QEMU_RELEASE_ARGS) -semihosting
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
     LINKER_FILE       = src/bsp/raspberrypi/link.ld
@@ -81,10 +85,10 @@ DOCKER_ARG_DIR_JTAG  = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
 DOCKER_ARG_DEV       = --privileged -v /dev:/dev
 DOCKER_ARG_NET       = --network host
 
-DOCKER_QEMU     = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
-DOCKER_GDB      = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
-DOCKER_TEST     = $(DOCKER_CMD) $(DOCKER_IMAGE)
-DOCKER_ELFTOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
+DOCKER_GDB   = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
+DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 
 # Dockerize commands that require USB device passthrough only on Linux
 ifeq ($(UNAME_S),Linux)
@@ -106,19 +110,22 @@ EXEC_MINIPUSH = ruby ../utils/minipush.rb
 all: $(KERNEL_BIN)
 
 $(KERNEL_ELF):
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
+	$(call colorecho, "\nCompiling kernel - $(BSP)")
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
 $(KERNEL_BIN): $(KERNEL_ELF)
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
 
 doc:
-	$(DOC_CMD) --document-private-items --open
+	$(call colorecho, "\nGenerating docs")
+	@$(DOC_CMD) --document-private-items --open
 
 ifeq ($(QEMU_MACHINE_TYPE),)
 qemu test:
-	@echo $(QEMU_MISSING_STRING)
+	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
 else
 qemu: $(KERNEL_BIN)
+	$(call colorecho, "\nLaunching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
 define KERNEL_TEST_RUNNER
@@ -134,10 +141,11 @@ endef
 export KERNEL_TEST_RUNNER
 test: FEATURES += --features test_build
 test:
+	$(call colorecho, "\nCompiling test(s) - $(BSP)")
 	@mkdir -p target
 	@echo "$$KERNEL_TEST_RUNNER" > target/kernel_test_runner.sh
 	@chmod +x target/kernel_test_runner.sh
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) $(TEST_ARG)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) $(TEST_ARG)
 endif
 
 chainboot: $(KERNEL_BIN)
@@ -147,33 +155,35 @@ jtagboot:
 	@$(DOCKER_JTAGBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(JTAG_BOOT_IMAGE)
 
 openocd:
+	$(call colorecho, "\nLaunching OpenOCD")
 	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
 
-define gen_gdb
-    RUSTFLAGS="$(RUSTFLAGS_PEDANTIC) $1" $(RUSTC_CMD)
-    @$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
-endef
-
-gdb:
-	$(call gen_gdb,-C debuginfo=2)
-
-gdb-opt0:
-	$(call gen_gdb,-C debuginfo=2 -C opt-level=0)
+gdb: RUSTC_MISC_ARGS += -C debuginfo=2
+gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
+gdb gdb-opt0: $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching GDB")
+	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
 
 clippy:
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
 clean:
 	rm -rf target $(KERNEL_BIN)
 
 readelf: $(KERNEL_ELF)
-	readelf --headers $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching readelf")
+	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
 objdump: $(KERNEL_ELF)
-	@$(DOCKER_ELFTOOLS) $(OBJDUMP_BINARY) --disassemble --demangle $(KERNEL_ELF) | rustfilt
+	$(call colorecho, "\nLaunching objdump")
+	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
+                --section .text   \
+                --section .rodata \
+                $(KERNEL_ELF) | rustfilt
 
 nm: $(KERNEL_ELF)
-	@$(DOCKER_ELFTOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
+	$(call colorecho, "\nLaunching nm")
+	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
 # For rust-analyzer
 check:
diff --git a/14_exceptions_part2_peripheral_IRQs/build.rs b/14_exceptions_part2_peripheral_IRQs/build.rs
index 40ee0284d..3f0a29110 100644
--- a/14_exceptions_part2_peripheral_IRQs/build.rs
+++ b/14_exceptions_part2_peripheral_IRQs/build.rs
@@ -4,4 +4,5 @@ fn main() {
     let linker_file = env::var("LINKER_FILE").unwrap();
 
     println!("cargo:rerun-if-changed={}", linker_file);
+    println!("cargo:rerun-if-changed=build.rs");
 }
diff --git a/15_virtual_mem_part2_mmio_remap/Makefile b/15_virtual_mem_part2_mmio_remap/Makefile
index 74e67da50..32d139243 100644
--- a/15_virtual_mem_part2_mmio_remap/Makefile
+++ b/15_virtual_mem_part2_mmio_remap/Makefile
@@ -2,6 +2,8 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
+include ../utils/color.mk.in
+
 # Default to the RPi3
 BSP ?= rpi3
 
@@ -21,6 +23,7 @@ ifeq ($(BSP),rpi3)
     QEMU_TEST_ARGS    = $(QEMU_RELEASE_ARGS) -semihosting
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
     LINKER_FILE       = src/bsp/raspberrypi/link.ld
@@ -34,6 +37,7 @@ else ifeq ($(BSP),rpi4)
     QEMU_TEST_ARGS    = $(QEMU_RELEASE_ARGS) -semihosting
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
     LINKER_FILE       = src/bsp/raspberrypi/link.ld
@@ -81,10 +85,10 @@ DOCKER_ARG_DIR_JTAG  = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
 DOCKER_ARG_DEV       = --privileged -v /dev:/dev
 DOCKER_ARG_NET       = --network host
 
-DOCKER_QEMU     = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
-DOCKER_GDB      = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
-DOCKER_TEST     = $(DOCKER_CMD) $(DOCKER_IMAGE)
-DOCKER_ELFTOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
+DOCKER_GDB   = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
+DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 
 # Dockerize commands that require USB device passthrough only on Linux
 ifeq ($(UNAME_S),Linux)
@@ -106,19 +110,22 @@ EXEC_MINIPUSH = ruby ../utils/minipush.rb
 all: $(KERNEL_BIN)
 
 $(KERNEL_ELF):
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
+	$(call colorecho, "\nCompiling kernel - $(BSP)")
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
 $(KERNEL_BIN): $(KERNEL_ELF)
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
 
 doc:
-	$(DOC_CMD) --document-private-items --open
+	$(call colorecho, "\nGenerating docs")
+	@$(DOC_CMD) --document-private-items --open
 
 ifeq ($(QEMU_MACHINE_TYPE),)
 qemu test:
-	@echo $(QEMU_MISSING_STRING)
+	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
 else
 qemu: $(KERNEL_BIN)
+	$(call colorecho, "\nLaunching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
 define KERNEL_TEST_RUNNER
@@ -134,10 +141,11 @@ endef
 export KERNEL_TEST_RUNNER
 test: FEATURES += --features test_build
 test:
+	$(call colorecho, "\nCompiling test(s) - $(BSP)")
 	@mkdir -p target
 	@echo "$$KERNEL_TEST_RUNNER" > target/kernel_test_runner.sh
 	@chmod +x target/kernel_test_runner.sh
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) $(TEST_ARG)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) $(TEST_ARG)
 endif
 
 chainboot: $(KERNEL_BIN)
@@ -147,33 +155,35 @@ jtagboot:
 	@$(DOCKER_JTAGBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(JTAG_BOOT_IMAGE)
 
 openocd:
+	$(call colorecho, "\nLaunching OpenOCD")
 	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
 
-define gen_gdb
-    RUSTFLAGS="$(RUSTFLAGS_PEDANTIC) $1" $(RUSTC_CMD)
-    @$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
-endef
-
-gdb:
-	$(call gen_gdb,-C debuginfo=2)
-
-gdb-opt0:
-	$(call gen_gdb,-C debuginfo=2 -C opt-level=0)
+gdb: RUSTC_MISC_ARGS += -C debuginfo=2
+gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
+gdb gdb-opt0: $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching GDB")
+	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
 
 clippy:
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
 clean:
 	rm -rf target $(KERNEL_BIN)
 
 readelf: $(KERNEL_ELF)
-	readelf --headers $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching readelf")
+	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
 objdump: $(KERNEL_ELF)
-	@$(DOCKER_ELFTOOLS) $(OBJDUMP_BINARY) --disassemble --demangle $(KERNEL_ELF) | rustfilt
+	$(call colorecho, "\nLaunching objdump")
+	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
+                --section .text   \
+                --section .rodata \
+                $(KERNEL_ELF) | rustfilt
 
 nm: $(KERNEL_ELF)
-	@$(DOCKER_ELFTOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
+	$(call colorecho, "\nLaunching nm")
+	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
 # For rust-analyzer
 check:
diff --git a/15_virtual_mem_part2_mmio_remap/build.rs b/15_virtual_mem_part2_mmio_remap/build.rs
index 40ee0284d..3f0a29110 100644
--- a/15_virtual_mem_part2_mmio_remap/build.rs
+++ b/15_virtual_mem_part2_mmio_remap/build.rs
@@ -4,4 +4,5 @@ fn main() {
     let linker_file = env::var("LINKER_FILE").unwrap();
 
     println!("cargo:rerun-if-changed={}", linker_file);
+    println!("cargo:rerun-if-changed=build.rs");
 }
diff --git a/X1_JTAG_boot/Cargo.toml b/X1_JTAG_boot/Cargo.toml
index b8906da1f..df5f7f974 100644
--- a/X1_JTAG_boot/Cargo.toml
+++ b/X1_JTAG_boot/Cargo.toml
@@ -7,7 +7,6 @@ edition = "2018"
 [profile.release]
 lto = true
 
-# The features section is used to select the target board.
 [features]
 default = []
 bsp_rpi3 = ["register"]
diff --git a/X1_JTAG_boot/Makefile b/X1_JTAG_boot/Makefile
index 27944c93d..4206c5282 100644
--- a/X1_JTAG_boot/Makefile
+++ b/X1_JTAG_boot/Makefile
@@ -2,6 +2,8 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
+include ../utils/color.mk.in
+
 # Default to the RPi3
 BSP ?= rpi3
 
@@ -20,6 +22,7 @@ ifeq ($(BSP),rpi3)
     QEMU_RELEASE_ARGS = -serial stdio -display none
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
     LINKER_FILE       = src/bsp/raspberrypi/link.ld
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
@@ -30,6 +33,7 @@ else ifeq ($(BSP),rpi4)
     QEMU_RELEASE_ARGS = -serial stdio -display none
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
     LINKER_FILE       = src/bsp/raspberrypi/link.ld
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
@@ -37,12 +41,14 @@ endif
 # Export for build.rs
 export LINKER_FILE
 
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
-FEATURES      = bsp_$(BSP)
+FEATURES      = --features bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
-    --features $(FEATURES)         \
+    $(FEATURES)                    \
     --release
 
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
@@ -61,8 +67,8 @@ DOCKER_CMD_INTERACT  = $(DOCKER_CMD) -i -t
 DOCKER_ARG_DIR_UTILS = -v $(shell pwd)/../utils:/work/utils
 DOCKER_ARG_DEV       = --privileged -v /dev:/dev
 
-DOCKER_QEMU     = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
-DOCKER_ELFTOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
+DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 
 # Dockerize commands that require USB device passthrough only on Linux
 ifeq ($(UNAME_S),Linux)
@@ -79,19 +85,22 @@ EXEC_MINIPUSH = ruby ../utils/minipush.rb
 all: $(KERNEL_BIN)
 
 $(KERNEL_ELF):
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
+	$(call colorecho, "\nCompiling kernel - $(BSP)")
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
 $(KERNEL_BIN): $(KERNEL_ELF)
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
 
 doc:
-	$(DOC_CMD) --document-private-items --open
+	$(call colorecho, "\nGenerating docs")
+	@$(DOC_CMD) --document-private-items --open
 
 ifeq ($(QEMU_MACHINE_TYPE),)
 qemu:
-	@echo "This board is not yet supported for QEMU."
+	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
 else
 qemu: $(KERNEL_BIN)
+	$(call colorecho, "\nLaunching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 endif
 
@@ -99,19 +108,25 @@ chainboot: $(KERNEL_BIN)
 	@$(DOCKER_CHAINBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(KERNEL_BIN)
 
 clippy:
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
 clean:
 	rm -rf target $(KERNEL_BIN)
 
 readelf: $(KERNEL_ELF)
-	readelf --headers $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching readelf")
+	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
 objdump: $(KERNEL_ELF)
-	@$(DOCKER_ELFTOOLS) $(OBJDUMP_BINARY) --disassemble --demangle $(KERNEL_ELF) | rustfilt
+	$(call colorecho, "\nLaunching objdump")
+	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
+                --section .text   \
+                --section .rodata \
+                $(KERNEL_ELF) | rustfilt
 
 nm: $(KERNEL_ELF)
-	@$(DOCKER_ELFTOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
+	$(call colorecho, "\nLaunching nm")
+	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
 # For rust-analyzer
 check:
diff --git a/X1_JTAG_boot/build.rs b/X1_JTAG_boot/build.rs
index 40ee0284d..3f0a29110 100644
--- a/X1_JTAG_boot/build.rs
+++ b/X1_JTAG_boot/build.rs
@@ -4,4 +4,5 @@ fn main() {
     let linker_file = env::var("LINKER_FILE").unwrap();
 
     println!("cargo:rerun-if-changed={}", linker_file);
+    println!("cargo:rerun-if-changed=build.rs");
 }
diff --git a/utils/color.mk.in b/utils/color.mk.in
new file mode 100644
index 000000000..1945a10c0
--- /dev/null
+++ b/utils/color.mk.in
@@ -0,0 +1,5 @@
+define colorecho
+      @tput setaf 6
+      @echo $1
+      @tput sgr0
+endef
diff --git a/utils/minipush.rb b/utils/minipush.rb
index bda97bb1f..14c1e6a5f 100755
--- a/utils/minipush.rb
+++ b/utils/minipush.rb
@@ -112,6 +112,7 @@ def run
     end
 end
 
+puts
 puts 'Minipush 1.0'.cyan
 puts
 
diff --git a/utils/miniterm.rb b/utils/miniterm.rb
index 091566697..ff0c64fb6 100755
--- a/utils/miniterm.rb
+++ b/utils/miniterm.rb
@@ -126,6 +126,7 @@ def run
 end
 
 if __FILE__ == $PROGRAM_NAME
+    puts
     puts 'Miniterm 1.0'.cyan
     puts
 

From e7b890c08481e508fa9a086f638f246458653b2f Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sat, 13 Mar 2021 00:18:18 +0100
Subject: [PATCH 035/214] test fix for CI tput errors

---
 utils/color.mk.in | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/utils/color.mk.in b/utils/color.mk.in
index 1945a10c0..851bac875 100644
--- a/utils/color.mk.in
+++ b/utils/color.mk.in
@@ -1,5 +1,5 @@
 define colorecho
-      @tput setaf 6
+      @tput setaf 6 2> /dev/null || true
       @echo $1
-      @tput sgr0
+      @tput sgr0 2> /dev/null || true
 endef

From eb2bee6bb1489cfff247d41f3bf4cbe80fbe6ca8 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sat, 13 Mar 2021 00:25:14 +0100
Subject: [PATCH 036/214] newline

---
 01_wait_forever/README.md | 1 +
 1 file changed, 1 insertion(+)

diff --git a/01_wait_forever/README.md b/01_wait_forever/README.md
index 785e9817e..66dc29d29 100644
--- a/01_wait_forever/README.md
+++ b/01_wait_forever/README.md
@@ -33,6 +33,7 @@
 ### Test it
 
 In the project folder, invoke QEMU and observe the CPU core spinning on `wfe`:
+
 ```console
 $ make qemu
 [...]

From d09374710dda2221320ca5fc599db1cc412720f1 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 15 Mar 2021 22:07:01 +0100
Subject: [PATCH 037/214] Some rework on virtual memory code

- Mostly more spearation of concerns in 15.
- Cleanups in other parts.
---
 .../README.md                                 | 194 +++--
 .../src/_arch/aarch64/memory/mmu.rs           |  60 +-
 .../aarch64/memory/mmu/translation_table.rs   |  54 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |   4 +-
 .../src/main.rs                               |   5 +-
 .../src/memory/mmu.rs                         |  39 +-
 12_exceptions_part1_groundwork/README.md      |  14 +-
 .../src/_arch/aarch64/memory/mmu.rs           |  60 +-
 .../aarch64/memory/mmu/translation_table.rs   |  54 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |   4 +-
 12_exceptions_part1_groundwork/src/main.rs    |   5 +-
 .../src/memory/mmu.rs                         |  39 +-
 13_integrated_testing/README.md               |  24 +-
 .../src/_arch/aarch64/memory/mmu.rs           |  60 +-
 .../aarch64/memory/mmu/translation_table.rs   |  54 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |   4 +-
 13_integrated_testing/src/lib.rs              |   1 +
 13_integrated_testing/src/main.rs             |   4 +-
 13_integrated_testing/src/memory/mmu.rs       |  39 +-
 .../tests/02_exception_sync_page_fault.rs     |   2 +-
 14_exceptions_part2_peripheral_IRQs/README.md |  38 +-
 .../src/_arch/aarch64/memory/mmu.rs           |  60 +-
 .../aarch64/memory/mmu/translation_table.rs   |  54 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |   4 +-
 .../src/main.rs                               |   4 +-
 .../src/memory/mmu.rs                         |  39 +-
 .../src/synchronization.rs                    |  18 +
 .../tests/02_exception_sync_page_fault.rs     |   2 +-
 15_virtual_mem_part2_mmio_remap/README.md     | 805 +++++++++++-------
 .../src/_arch/aarch64/memory/mmu.rs           |  94 +-
 .../aarch64/memory/mmu/translation_table.rs   | 100 +--
 .../src/bsp/raspberrypi/console.rs            |   4 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |  65 +-
 15_virtual_mem_part2_mmio_remap/src/lib.rs    |   1 +
 15_virtual_mem_part2_mmio_remap/src/main.rs   |  13 +-
 15_virtual_mem_part2_mmio_remap/src/memory.rs |  53 +-
 .../src/memory/mmu.rs                         |  92 +-
 .../src/memory/mmu/mapping_record.rs          |  18 +-
 .../src/memory/mmu/translation_table.rs       |  15 +-
 .../src/memory/mmu/types.rs                   |  15 +-
 .../src/synchronization.rs                    |  18 +
 .../tests/02_exception_sync_page_fault.rs     |  14 +-
 42 files changed, 1383 insertions(+), 863 deletions(-)

diff --git a/11_virtual_mem_part1_identity_mapping/README.md b/11_virtual_mem_part1_identity_mapping/README.md
index 7b822f68c..270c8422a 100644
--- a/11_virtual_mem_part1_identity_mapping/README.md
+++ b/11_virtual_mem_part1_identity_mapping/README.md
@@ -115,12 +115,12 @@ descriptors).
 In `translation_table.rs`, there is a definition of the actual translation table struct which is
 generic over the number of `LVL2` tables. The latter depends on the size of the target board's
 memory. Naturally, the `BSP` knows these details about the target board, and provides the size
-through the constant `bsp::memory::mmu::KernelAddrSpaceSize::SIZE`.
+through the constant `bsp::memory::mmu::KernelAddrSpace::SIZE`.
 
 This information is used by `translation_table.rs` to calculate the number of needed `LVL2` tables.
 Since one `LVL2` table in a `64 KiB` configuration covers `512 MiB`, all that needs to be done is to
-divide `KernelAddrSpaceSize::SIZE` by `512 MiB` (there are several compile-time checks in place that
-ensure that `KernelAddrSpaceSize` is a multiple of `512 MiB`).
+divide `KernelAddrSpace::SIZE` by `512 MiB` (there are several compile-time checks in place that
+ensure that `KernelAddrSpace::SIZE` is a multiple of `512 MiB`).
 
 The final table type is exported as `KernelTranslationTable`. Below is the respective excerpt from
 `translation_table.rs`:
@@ -144,7 +144,7 @@ struct PageDescriptor {
     value: u64,
 }
 
-const NUM_LVL2_TABLES: usize = bsp::memory::mmu::KernelAddrSpaceSize::SIZE >> Granule512MiB::SHIFT;
+const NUM_LVL2_TABLES: usize = bsp::memory::mmu::KernelAddrSpace::SIZE >> Granule512MiB::SHIFT;
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -175,10 +175,6 @@ tables:
 //--------------------------------------------------------------------------------------------------
 
 /// The kernel translation tables.
-///
-/// # Safety
-///
-/// - Supposed to land in `.bss`. Therefore, ensure that all initial member values boil down to "0".
 static mut KERNEL_TABLES: KernelTranslationTable = KernelTranslationTable::new();
 ```
 
@@ -213,10 +209,10 @@ Afterwards, the [Translation Table Base Register 0 - EL1] is set up with the bas
 `lvl2` tables and the [Translation Control Register - EL1] is configured:
 
 ```rust
-    // Set the "Translation Table Base Register".
-    TTBR0_EL1.set_baddr(KERNEL_TABLES.base_address());
+// Set the "Translation Table Base Register".
+TTBR0_EL1.set_baddr(KERNEL_TABLES.phys_base_address());
 
-    self.configure_translation_control();
+self.configure_translation_control();
 ```
 
 Finally, the `MMU` is turned on through the [System Control Register - EL1]. The last step also
@@ -297,7 +293,7 @@ unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
     use memory::mmu::interface::MMU;
 
-    if let Err(string) = memory::mmu::mmu().init() {
+    if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
         panic!("MMU: {}", string);
     }
 ```
@@ -439,8 +435,8 @@ diff -uNr 10_privilege_level/src/_arch/aarch64/memory/mmu/translation_table.rs 1
 +        AttrIndx OFFSET(2) NUMBITS(3) [],
 +
 +        TYPE     OFFSET(1) NUMBITS(1) [
-+            Block = 0,
-+            Table = 1
++            Reserved_Invalid = 0,
++            Page = 1
 +        ],
 +
 +        VALID    OFFSET(0) NUMBITS(1) [
@@ -468,19 +464,19 @@ diff -uNr 10_privilege_level/src/_arch/aarch64/memory/mmu/translation_table.rs 1
 +    value: u64,
 +}
 +
-+trait BaseAddr {
-+    fn base_addr_u64(&self) -> u64;
-+    fn base_addr_usize(&self) -> usize;
++trait StartAddr {
++    fn phys_start_addr_u64(&self) -> u64;
++    fn phys_start_addr_usize(&self) -> usize;
 +}
 +
-+const NUM_LVL2_TABLES: usize = bsp::memory::mmu::KernelAddrSpaceSize::SIZE >> Granule512MiB::SHIFT;
++const NUM_LVL2_TABLES: usize = bsp::memory::mmu::KernelAddrSpace::SIZE >> Granule512MiB::SHIFT;
 +
 +//--------------------------------------------------------------------------------------------------
 +// Public Definitions
 +//--------------------------------------------------------------------------------------------------
 +
 +/// Big monolithic struct for storing the translation tables. Individual levels must be 64 KiB
-+/// aligned, hence the "reverse" order of appearance.
++/// aligned, so the lvl3 is put first.
 +#[repr(C)]
 +#[repr(align(65536))]
 +pub struct FixedSizeTranslationTable<const NUM_TABLES: usize> {
@@ -498,12 +494,13 @@ diff -uNr 10_privilege_level/src/_arch/aarch64/memory/mmu/translation_table.rs 1
 +// Private Code
 +//--------------------------------------------------------------------------------------------------
 +
-+impl<T, const N: usize> BaseAddr for [T; N] {
-+    fn base_addr_u64(&self) -> u64 {
++// The binary is still identity mapped, so we don't need to convert here.
++impl<T, const N: usize> StartAddr for [T; N] {
++    fn phys_start_addr_u64(&self) -> u64 {
 +        self as *const T as u64
 +    }
 +
-+    fn base_addr_usize(&self) -> usize {
++    fn phys_start_addr_usize(&self) -> usize {
 +        self as *const _ as usize
 +    }
 +}
@@ -517,14 +514,14 @@ diff -uNr 10_privilege_level/src/_arch/aarch64/memory/mmu/translation_table.rs 1
 +    }
 +
 +    /// Create an instance pointing to the supplied address.
-+    pub fn from_next_lvl_table_addr(next_lvl_table_addr: usize) -> Self {
++    pub fn from_next_lvl_table_addr(phys_next_lvl_table_addr: usize) -> Self {
 +        let val = InMemoryRegister::<u64, STAGE1_TABLE_DESCRIPTOR::Register>::new(0);
 +
-+        let shifted = next_lvl_table_addr >> Granule64KiB::SHIFT;
++        let shifted = phys_next_lvl_table_addr >> Granule64KiB::SHIFT;
 +        val.write(
-+            STAGE1_TABLE_DESCRIPTOR::VALID::True
++            STAGE1_TABLE_DESCRIPTOR::NEXT_LEVEL_TABLE_ADDR_64KiB.val(shifted as u64)
 +                + STAGE1_TABLE_DESCRIPTOR::TYPE::Table
-+                + STAGE1_TABLE_DESCRIPTOR::NEXT_LEVEL_TABLE_ADDR_64KiB.val(shifted as u64),
++                + STAGE1_TABLE_DESCRIPTOR::VALID::True,
 +        );
 +
 +        TableDescriptor { value: val.get() }
@@ -577,16 +574,16 @@ diff -uNr 10_privilege_level/src/_arch/aarch64/memory/mmu/translation_table.rs 1
 +    }
 +
 +    /// Create an instance.
-+    pub fn from_output_addr(output_addr: usize, attribute_fields: AttributeFields) -> Self {
++    pub fn from_output_addr(phys_output_addr: usize, attribute_fields: &AttributeFields) -> Self {
 +        let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
 +
-+        let shifted = output_addr as u64 >> Granule64KiB::SHIFT;
++        let shifted = phys_output_addr as u64 >> Granule64KiB::SHIFT;
 +        val.write(
-+            STAGE1_PAGE_DESCRIPTOR::VALID::True
++            STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted)
 +                + STAGE1_PAGE_DESCRIPTOR::AF::True
-+                + attribute_fields.into()
-+                + STAGE1_PAGE_DESCRIPTOR::TYPE::Table
-+                + STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted),
++                + STAGE1_PAGE_DESCRIPTOR::TYPE::Page
++                + STAGE1_PAGE_DESCRIPTOR::VALID::True
++                + attribute_fields.clone().into(),
 +        );
 +
 +        Self { value: val.get() }
@@ -599,10 +596,9 @@ diff -uNr 10_privilege_level/src/_arch/aarch64/memory/mmu/translation_table.rs 1
 +
 +impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
 +    /// Create an instance.
-+    #[allow(clippy::assertions_on_constants)]
 +    pub const fn new() -> Self {
++        // Can't have a zero-sized address space.
 +        assert!(NUM_TABLES > 0);
-+        assert!((bsp::memory::mmu::KernelAddrSpaceSize::SIZE modulo Granule512MiB::SIZE) == 0);
 +
 +        Self {
 +            lvl3: [[PageDescriptor::new_zeroed(); 8192]; NUM_TABLES],
@@ -618,15 +614,15 @@ diff -uNr 10_privilege_level/src/_arch/aarch64/memory/mmu/translation_table.rs 1
 +    pub unsafe fn populate_tt_entries(&mut self) -> Result<(), &'static str> {
 +        for (l2_nr, l2_entry) in self.lvl2.iter_mut().enumerate() {
 +            *l2_entry =
-+                TableDescriptor::from_next_lvl_table_addr(self.lvl3[l2_nr].base_addr_usize());
++                TableDescriptor::from_next_lvl_table_addr(self.lvl3[l2_nr].phys_start_addr_usize());
 +
 +            for (l3_nr, l3_entry) in self.lvl3[l2_nr].iter_mut().enumerate() {
 +                let virt_addr = (l2_nr << Granule512MiB::SHIFT) + (l3_nr << Granule64KiB::SHIFT);
 +
-+                let (output_addr, attribute_fields) =
++                let (phys_output_addr, attribute_fields) =
 +                    bsp::memory::mmu::virt_mem_layout().virt_addr_properties(virt_addr)?;
 +
-+                *l3_entry = PageDescriptor::from_output_addr(output_addr, attribute_fields);
++                *l3_entry = PageDescriptor::from_output_addr(phys_output_addr, &attribute_fields);
 +            }
 +        }
 +
@@ -634,15 +630,15 @@ diff -uNr 10_privilege_level/src/_arch/aarch64/memory/mmu/translation_table.rs 1
 +    }
 +
 +    /// The translation table's base address to be used for programming the MMU.
-+    pub fn base_address(&self) -> u64 {
-+        self.lvl2.base_addr_u64()
++    pub fn phys_base_address(&self) -> u64 {
++        self.lvl2.phys_start_addr_u64()
 +    }
 +}
 
 diff -uNr 10_privilege_level/src/_arch/aarch64/memory/mmu.rs 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
 --- 10_privilege_level/src/_arch/aarch64/memory/mmu.rs
 +++ 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
-@@ -0,0 +1,146 @@
+@@ -0,0 +1,164 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -662,6 +658,7 @@ diff -uNr 10_privilege_level/src/_arch/aarch64/memory/mmu.rs 11_virtual_mem_part
 +    bsp, memory,
 +    memory::mmu::{translation_table::KernelTranslationTable, TranslationGranule},
 +};
++use core::intrinsics::unlikely;
 +use cortex_a::{barrier, regs::*};
 +
 +//--------------------------------------------------------------------------------------------------
@@ -678,15 +675,6 @@ diff -uNr 10_privilege_level/src/_arch/aarch64/memory/mmu.rs 11_virtual_mem_part
 +pub type Granule512MiB = TranslationGranule<{ 512 * 1024 * 1024 }>;
 +pub type Granule64KiB = TranslationGranule<{ 64 * 1024 }>;
 +
-+/// The min supported address space size.
-+pub const MIN_ADDR_SPACE_SIZE: usize = 1024 * 1024 * 1024; // 1 GiB
-+
-+/// The max supported address space size.
-+pub const MAX_ADDR_SPACE_SIZE: usize = 32 * 1024 * 1024 * 1024; // 32 GiB
-+
-+/// The supported address space size granule.
-+pub type AddrSpaceSizeGranule = Granule512MiB;
-+
 +/// Constants for indexing the MAIR_EL1.
 +#[allow(dead_code)]
 +pub mod mair {
@@ -711,6 +699,18 @@ diff -uNr 10_privilege_level/src/_arch/aarch64/memory/mmu.rs 11_virtual_mem_part
 +// Private Code
 +//--------------------------------------------------------------------------------------------------
 +
++impl<const AS_SIZE: usize> memory::mmu::AddressSpace<AS_SIZE> {
++    /// Checks for architectural restrictions.
++    pub const fn arch_address_space_size_sanity_checks() {
++        // Size must be at least one full 512 MiB table.
++        assert!((AS_SIZE modulo Granule512MiB::SIZE) == 0);
++
++        // Check for 48 bit virtual address size as maximum, which is supported by any ARMv8
++        // version.
++        assert!(AS_SIZE <= (1 << 48));
++    }
++}
++
 +impl MemoryManagementUnit {
 +    /// Setup function for the MAIR_EL1 register.
 +    fn set_up_mair(&self) {
@@ -727,19 +727,19 @@ diff -uNr 10_privilege_level/src/_arch/aarch64/memory/mmu.rs 11_virtual_mem_part
 +
 +    /// Configure various settings of stage 1 of the EL1 translation regime.
 +    fn configure_translation_control(&self) {
-+        let ips = ID_AA64MMFR0_EL1.read(ID_AA64MMFR0_EL1::PARange);
-+        let t0sz = (64 - bsp::memory::mmu::KernelAddrSpaceSize::SHIFT) as u64;
++        let t0sz = (64 - bsp::memory::mmu::KernelAddrSpace::SIZE_SHIFT) as u64;
 +
 +        TCR_EL1.write(
-+            TCR_EL1::TBI0::Ignored
-+                + TCR_EL1::IPS.val(ips)
-+                + TCR_EL1::EPD1::DisableTTBR1Walks
++            TCR_EL1::TBI0::Used
++                + TCR_EL1::IPS::Bits_40
 +                + TCR_EL1::TG0::KiB_64
 +                + TCR_EL1::SH0::Inner
 +                + TCR_EL1::ORGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
 +                + TCR_EL1::IRGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
 +                + TCR_EL1::EPD0::EnableTTBR0Walks
-+                + TCR_EL1::T0SZ.val(t0sz),
++                + TCR_EL1::A1::TTBR0
++                + TCR_EL1::T0SZ.val(t0sz)
++                + TCR_EL1::EPD1::DisableTTBR1Walks,
 +        );
 +    }
 +}
@@ -756,22 +756,31 @@ diff -uNr 10_privilege_level/src/_arch/aarch64/memory/mmu.rs 11_virtual_mem_part
 +//------------------------------------------------------------------------------
 +// OS Interface Code
 +//------------------------------------------------------------------------------
++use memory::mmu::MMUEnableError;
 +
 +impl memory::mmu::interface::MMU for MemoryManagementUnit {
-+    unsafe fn init(&self) -> Result<(), &'static str> {
-+        // Fail early if translation granule is not supported. Both RPis support it, though.
-+        if !ID_AA64MMFR0_EL1.matches_all(ID_AA64MMFR0_EL1::TGran64::Supported) {
-+            return Err("Translation granule not supported in HW");
++    unsafe fn enable_mmu_and_caching(&self) -> Result<(), MMUEnableError> {
++        if unlikely(self.is_enabled()) {
++            return Err(MMUEnableError::AlreadyEnabled);
++        }
++
++        // Fail early if translation granule is not supported.
++        if unlikely(!ID_AA64MMFR0_EL1.matches_all(ID_AA64MMFR0_EL1::TGran64::Supported)) {
++            return Err(MMUEnableError::Other(
++                "Translation granule not supported in HW",
++            ));
 +        }
 +
 +        // Prepare the memory attribute indirection register.
 +        self.set_up_mair();
 +
 +        // Populate translation tables.
-+        KERNEL_TABLES.populate_tt_entries()?;
++        KERNEL_TABLES
++            .populate_tt_entries()
++            .map_err(|e| MMUEnableError::Other(e))?;
 +
 +        // Set the "Translation Table Base Register".
-+        TTBR0_EL1.set_baddr(KERNEL_TABLES.base_address());
++        TTBR0_EL1.set_baddr(KERNEL_TABLES.phys_base_address());
 +
 +        self.configure_translation_control();
 +
@@ -788,6 +797,11 @@ diff -uNr 10_privilege_level/src/_arch/aarch64/memory/mmu.rs 11_virtual_mem_part
 +
 +        Ok(())
 +    }
++
++    #[inline(always)]
++    fn is_enabled(&self) -> bool {
++        SCTLR_EL1.matches_all(SCTLR_EL1::M::Enable)
++    }
 +}
 
 diff -uNr 10_privilege_level/src/bsp/raspberrypi/link.ld 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
@@ -829,8 +843,8 @@ diff -uNr 10_privilege_level/src/bsp/raspberrypi/memory/mmu.rs 11_virtual_mem_pa
 +// Public Definitions
 +//--------------------------------------------------------------------------------------------------
 +
-+/// The address space size chosen by this BSP.
-+pub type KernelAddrSpaceSize = AddressSpaceSize<{ memory_map::END_INCLUSIVE + 1 }>;
++/// The kernel's address space defined by this BSP.
++pub type KernelAddrSpace = AddressSpace<{ memory_map::END_INCLUSIVE + 1 }>;
 +
 +const NUM_MEM_RANGES: usize = 3;
 +
@@ -1006,7 +1020,7 @@ diff -uNr 10_privilege_level/src/bsp.rs 11_virtual_mem_part1_identity_mapping/sr
 diff -uNr 10_privilege_level/src/main.rs 11_virtual_mem_part1_identity_mapping/src/main.rs
 --- 10_privilege_level/src/main.rs
 +++ 11_virtual_mem_part1_identity_mapping/src/main.rs
-@@ -108,7 +108,10 @@
+@@ -108,7 +108,11 @@
  //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
  #![allow(clippy::clippy::upper_case_acronyms)]
@@ -1014,16 +1028,17 @@ diff -uNr 10_privilege_level/src/main.rs 11_virtual_mem_part1_identity_mapping/s
  #![feature(const_fn_fn_ptr_basics)]
 +#![feature(const_generics)]
 +#![feature(const_panic)]
++#![feature(core_intrinsics)]
  #![feature(format_args_nl)]
  #![feature(panic_info_message)]
  #![feature(trait_alias)]
-@@ -132,9 +135,18 @@
+@@ -132,9 +136,18 @@
  /// # Safety
  ///
  /// - Only a single core must be active and running this function.
 -/// - The init calls in this function must appear in the correct order.
 +/// - The init calls in this function must appear in the correct order:
-+///     - Virtual memory must be activated before the device drivers.
++///     - Caching must be activated before the device drivers.
 +///       - Without it, any atomic operations, e.g. the yet-to-be-introduced spinlocks in the device
 +///         drivers (which currently employ NullLocks instead of spinlocks), will fail to work on
 +///         the RPi SoCs.
@@ -1031,13 +1046,13 @@ diff -uNr 10_privilege_level/src/main.rs 11_virtual_mem_part1_identity_mapping/s
      use driver::interface::DriverManager;
 +    use memory::mmu::interface::MMU;
 +
-+    if let Err(string) = memory::mmu::mmu().init() {
++    if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
 +        panic!("MMU: {}", string);
 +    }
 
      for i in bsp::driver::driver_manager().all_device_drivers().iter() {
          if let Err(x) = i.init() {
-@@ -158,6 +170,9 @@
+@@ -158,6 +171,9 @@
 
      info!("Booting on: {}", bsp::board_name());
 
@@ -1047,7 +1062,7 @@ diff -uNr 10_privilege_level/src/main.rs 11_virtual_mem_part1_identity_mapping/s
      let (_, privilege_level) = exception::current_privilege_level();
      info!("Current privilege level: {}", privilege_level);
 
-@@ -181,6 +196,13 @@
+@@ -181,6 +197,13 @@
      info!("Timer test, spinning for 1 second");
      time::time_manager().spin_for(Duration::from_secs(1));
 
@@ -1084,7 +1099,7 @@ diff -uNr 10_privilege_level/src/memory/mmu/translation_table.rs 11_virtual_mem_
 diff -uNr 10_privilege_level/src/memory/mmu.rs 11_virtual_mem_part1_identity_mapping/src/memory/mmu.rs
 --- 10_privilege_level/src/memory/mmu.rs
 +++ 11_virtual_mem_part1_identity_mapping/src/memory/mmu.rs
-@@ -0,0 +1,247 @@
+@@ -0,0 +1,264 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -1118,8 +1133,17 @@ diff -uNr 10_privilege_level/src/memory/mmu.rs 11_virtual_mem_part1_identity_map
 +// Public Definitions
 +//--------------------------------------------------------------------------------------------------
 +
++/// MMU enable errors variants.
++#[allow(missing_docs)]
++#[derive(Debug)]
++pub enum MMUEnableError {
++    AlreadyEnabled,
++    Other(&'static str),
++}
++
 +/// Memory Management interfaces.
 +pub mod interface {
++    use super::*;
 +
 +    /// MMU functions.
 +    pub trait MMU {
@@ -1129,15 +1153,18 @@ diff -uNr 10_privilege_level/src/memory/mmu.rs 11_virtual_mem_part1_identity_map
 +        /// # Safety
 +        ///
 +        /// - Changes the HW's global state.
-+        unsafe fn init(&self) -> Result<(), &'static str>;
++        unsafe fn enable_mmu_and_caching(&self) -> Result<(), MMUEnableError>;
++
++        /// Returns true if the MMU is enabled, false otherwise.
++        fn is_enabled(&self) -> bool;
 +    }
 +}
 +
 +/// Describes the characteristics of a translation granule.
 +pub struct TranslationGranule<const GRANULE_SIZE: usize>;
 +
-+/// Describes the size of an address space.
-+pub struct AddressSpaceSize<const AS_SIZE: usize>;
++/// Describes properties of an address space.
++pub struct AddressSpace<const AS_SIZE: usize>;
 +
 +/// Architecture agnostic translation types.
 +#[allow(missing_docs)]
@@ -1195,6 +1222,15 @@ diff -uNr 10_privilege_level/src/memory/mmu.rs 11_virtual_mem_part1_identity_map
 +// Public Code
 +//--------------------------------------------------------------------------------------------------
 +
++impl fmt::Display for MMUEnableError {
++    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
++        match self {
++            MMUEnableError::AlreadyEnabled => write!(f, "MMU is already enabled"),
++            MMUEnableError::Other(x) => write!(f, "{}", x),
++        }
++    }
++}
++
 +impl<const GRANULE_SIZE: usize> TranslationGranule<GRANULE_SIZE> {
 +    /// The granule's size.
 +    pub const SIZE: usize = Self::size_checked();
@@ -1209,22 +1245,18 @@ diff -uNr 10_privilege_level/src/memory/mmu.rs 11_virtual_mem_part1_identity_map
 +    }
 +}
 +
-+impl<const AS_SIZE: usize> AddressSpaceSize<AS_SIZE> {
++impl<const AS_SIZE: usize> AddressSpace<AS_SIZE> {
 +    /// The address space size.
 +    pub const SIZE: usize = Self::size_checked();
 +
 +    /// The address space shift, aka log2(size).
-+    pub const SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
++    pub const SIZE_SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
 +
 +    const fn size_checked() -> usize {
 +        assert!(AS_SIZE.is_power_of_two());
-+        assert!(arch_mmu::MIN_ADDR_SPACE_SIZE.is_power_of_two());
-+        assert!(arch_mmu::MAX_ADDR_SPACE_SIZE.is_power_of_two());
 +
-+        // Must adhere to architectural restrictions.
-+        assert!(AS_SIZE >= arch_mmu::MIN_ADDR_SPACE_SIZE);
-+        assert!(AS_SIZE <= arch_mmu::MAX_ADDR_SPACE_SIZE);
-+        assert!((AS_SIZE modulo arch_mmu::AddrSpaceSizeGranule::SIZE) == 0);
++        // Check for architectural restrictions as well.
++        Self::arch_address_space_size_sanity_checks();
 +
 +        AS_SIZE
 +    }
diff --git a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
index 3504d2571..2f7bf615a 100644
--- a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
@@ -17,6 +17,7 @@ use crate::{
     bsp, memory,
     memory::mmu::{translation_table::KernelTranslationTable, TranslationGranule},
 };
+use core::intrinsics::unlikely;
 use cortex_a::{barrier, regs::*};
 
 //--------------------------------------------------------------------------------------------------
@@ -33,15 +34,6 @@ struct MemoryManagementUnit;
 pub type Granule512MiB = TranslationGranule<{ 512 * 1024 * 1024 }>;
 pub type Granule64KiB = TranslationGranule<{ 64 * 1024 }>;
 
-/// The min supported address space size.
-pub const MIN_ADDR_SPACE_SIZE: usize = 1024 * 1024 * 1024; // 1 GiB
-
-/// The max supported address space size.
-pub const MAX_ADDR_SPACE_SIZE: usize = 32 * 1024 * 1024 * 1024; // 32 GiB
-
-/// The supported address space size granule.
-pub type AddrSpaceSizeGranule = Granule512MiB;
-
 /// Constants for indexing the MAIR_EL1.
 #[allow(dead_code)]
 pub mod mair {
@@ -66,6 +58,18 @@ static MMU: MemoryManagementUnit = MemoryManagementUnit;
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
+impl<const AS_SIZE: usize> memory::mmu::AddressSpace<AS_SIZE> {
+    /// Checks for architectural restrictions.
+    pub const fn arch_address_space_size_sanity_checks() {
+        // Size must be at least one full 512 MiB table.
+        assert!((AS_SIZE % Granule512MiB::SIZE) == 0);
+
+        // Check for 48 bit virtual address size as maximum, which is supported by any ARMv8
+        // version.
+        assert!(AS_SIZE <= (1 << 48));
+    }
+}
+
 impl MemoryManagementUnit {
     /// Setup function for the MAIR_EL1 register.
     fn set_up_mair(&self) {
@@ -82,19 +86,19 @@ impl MemoryManagementUnit {
 
     /// Configure various settings of stage 1 of the EL1 translation regime.
     fn configure_translation_control(&self) {
-        let ips = ID_AA64MMFR0_EL1.read(ID_AA64MMFR0_EL1::PARange);
-        let t0sz = (64 - bsp::memory::mmu::KernelAddrSpaceSize::SHIFT) as u64;
+        let t0sz = (64 - bsp::memory::mmu::KernelAddrSpace::SIZE_SHIFT) as u64;
 
         TCR_EL1.write(
-            TCR_EL1::TBI0::Ignored
-                + TCR_EL1::IPS.val(ips)
-                + TCR_EL1::EPD1::DisableTTBR1Walks
+            TCR_EL1::TBI0::Used
+                + TCR_EL1::IPS::Bits_40
                 + TCR_EL1::TG0::KiB_64
                 + TCR_EL1::SH0::Inner
                 + TCR_EL1::ORGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
                 + TCR_EL1::IRGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
                 + TCR_EL1::EPD0::EnableTTBR0Walks
-                + TCR_EL1::T0SZ.val(t0sz),
+                + TCR_EL1::A1::TTBR0
+                + TCR_EL1::T0SZ.val(t0sz)
+                + TCR_EL1::EPD1::DisableTTBR1Walks,
         );
     }
 }
@@ -111,22 +115,31 @@ pub fn mmu() -> &'static impl memory::mmu::interface::MMU {
 //------------------------------------------------------------------------------
 // OS Interface Code
 //------------------------------------------------------------------------------
+use memory::mmu::MMUEnableError;
 
 impl memory::mmu::interface::MMU for MemoryManagementUnit {
-    unsafe fn init(&self) -> Result<(), &'static str> {
-        // Fail early if translation granule is not supported. Both RPis support it, though.
-        if !ID_AA64MMFR0_EL1.matches_all(ID_AA64MMFR0_EL1::TGran64::Supported) {
-            return Err("Translation granule not supported in HW");
+    unsafe fn enable_mmu_and_caching(&self) -> Result<(), MMUEnableError> {
+        if unlikely(self.is_enabled()) {
+            return Err(MMUEnableError::AlreadyEnabled);
+        }
+
+        // Fail early if translation granule is not supported.
+        if unlikely(!ID_AA64MMFR0_EL1.matches_all(ID_AA64MMFR0_EL1::TGran64::Supported)) {
+            return Err(MMUEnableError::Other(
+                "Translation granule not supported in HW",
+            ));
         }
 
         // Prepare the memory attribute indirection register.
         self.set_up_mair();
 
         // Populate translation tables.
-        KERNEL_TABLES.populate_tt_entries()?;
+        KERNEL_TABLES
+            .populate_tt_entries()
+            .map_err(|e| MMUEnableError::Other(e))?;
 
         // Set the "Translation Table Base Register".
-        TTBR0_EL1.set_baddr(KERNEL_TABLES.base_address());
+        TTBR0_EL1.set_baddr(KERNEL_TABLES.phys_base_address());
 
         self.configure_translation_control();
 
@@ -143,4 +156,9 @@ impl memory::mmu::interface::MMU for MemoryManagementUnit {
 
         Ok(())
     }
+
+    #[inline(always)]
+    fn is_enabled(&self) -> bool {
+        SCTLR_EL1.matches_all(SCTLR_EL1::M::Enable)
+    }
 }
diff --git a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs
index cbe1d7832..f38d0895c 100644
--- a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -87,8 +87,8 @@ register_bitfields! {u64,
         AttrIndx OFFSET(2) NUMBITS(3) [],
 
         TYPE     OFFSET(1) NUMBITS(1) [
-            Block = 0,
-            Table = 1
+            Reserved_Invalid = 0,
+            Page = 1
         ],
 
         VALID    OFFSET(0) NUMBITS(1) [
@@ -116,19 +116,19 @@ struct PageDescriptor {
     value: u64,
 }
 
-trait BaseAddr {
-    fn base_addr_u64(&self) -> u64;
-    fn base_addr_usize(&self) -> usize;
+trait StartAddr {
+    fn phys_start_addr_u64(&self) -> u64;
+    fn phys_start_addr_usize(&self) -> usize;
 }
 
-const NUM_LVL2_TABLES: usize = bsp::memory::mmu::KernelAddrSpaceSize::SIZE >> Granule512MiB::SHIFT;
+const NUM_LVL2_TABLES: usize = bsp::memory::mmu::KernelAddrSpace::SIZE >> Granule512MiB::SHIFT;
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
 /// Big monolithic struct for storing the translation tables. Individual levels must be 64 KiB
-/// aligned, hence the "reverse" order of appearance.
+/// aligned, so the lvl3 is put first.
 #[repr(C)]
 #[repr(align(65536))]
 pub struct FixedSizeTranslationTable<const NUM_TABLES: usize> {
@@ -146,12 +146,13 @@ pub type KernelTranslationTable = FixedSizeTranslationTable<NUM_LVL2_TABLES>;
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-impl<T, const N: usize> BaseAddr for [T; N] {
-    fn base_addr_u64(&self) -> u64 {
+// The binary is still identity mapped, so we don't need to convert here.
+impl<T, const N: usize> StartAddr for [T; N] {
+    fn phys_start_addr_u64(&self) -> u64 {
         self as *const T as u64
     }
 
-    fn base_addr_usize(&self) -> usize {
+    fn phys_start_addr_usize(&self) -> usize {
         self as *const _ as usize
     }
 }
@@ -165,14 +166,14 @@ impl TableDescriptor {
     }
 
     /// Create an instance pointing to the supplied address.
-    pub fn from_next_lvl_table_addr(next_lvl_table_addr: usize) -> Self {
+    pub fn from_next_lvl_table_addr(phys_next_lvl_table_addr: usize) -> Self {
         let val = InMemoryRegister::<u64, STAGE1_TABLE_DESCRIPTOR::Register>::new(0);
 
-        let shifted = next_lvl_table_addr >> Granule64KiB::SHIFT;
+        let shifted = phys_next_lvl_table_addr >> Granule64KiB::SHIFT;
         val.write(
-            STAGE1_TABLE_DESCRIPTOR::VALID::True
+            STAGE1_TABLE_DESCRIPTOR::NEXT_LEVEL_TABLE_ADDR_64KiB.val(shifted as u64)
                 + STAGE1_TABLE_DESCRIPTOR::TYPE::Table
-                + STAGE1_TABLE_DESCRIPTOR::NEXT_LEVEL_TABLE_ADDR_64KiB.val(shifted as u64),
+                + STAGE1_TABLE_DESCRIPTOR::VALID::True,
         );
 
         TableDescriptor { value: val.get() }
@@ -225,16 +226,16 @@ impl PageDescriptor {
     }
 
     /// Create an instance.
-    pub fn from_output_addr(output_addr: usize, attribute_fields: AttributeFields) -> Self {
+    pub fn from_output_addr(phys_output_addr: usize, attribute_fields: &AttributeFields) -> Self {
         let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
 
-        let shifted = output_addr as u64 >> Granule64KiB::SHIFT;
+        let shifted = phys_output_addr as u64 >> Granule64KiB::SHIFT;
         val.write(
-            STAGE1_PAGE_DESCRIPTOR::VALID::True
+            STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted)
                 + STAGE1_PAGE_DESCRIPTOR::AF::True
-                + attribute_fields.into()
-                + STAGE1_PAGE_DESCRIPTOR::TYPE::Table
-                + STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted),
+                + STAGE1_PAGE_DESCRIPTOR::TYPE::Page
+                + STAGE1_PAGE_DESCRIPTOR::VALID::True
+                + attribute_fields.clone().into(),
         );
 
         Self { value: val.get() }
@@ -247,10 +248,9 @@ impl PageDescriptor {
 
 impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
     /// Create an instance.
-    #[allow(clippy::assertions_on_constants)]
     pub const fn new() -> Self {
+        // Can't have a zero-sized address space.
         assert!(NUM_TABLES > 0);
-        assert!((bsp::memory::mmu::KernelAddrSpaceSize::SIZE % Granule512MiB::SIZE) == 0);
 
         Self {
             lvl3: [[PageDescriptor::new_zeroed(); 8192]; NUM_TABLES],
@@ -266,15 +266,15 @@ impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
     pub unsafe fn populate_tt_entries(&mut self) -> Result<(), &'static str> {
         for (l2_nr, l2_entry) in self.lvl2.iter_mut().enumerate() {
             *l2_entry =
-                TableDescriptor::from_next_lvl_table_addr(self.lvl3[l2_nr].base_addr_usize());
+                TableDescriptor::from_next_lvl_table_addr(self.lvl3[l2_nr].phys_start_addr_usize());
 
             for (l3_nr, l3_entry) in self.lvl3[l2_nr].iter_mut().enumerate() {
                 let virt_addr = (l2_nr << Granule512MiB::SHIFT) + (l3_nr << Granule64KiB::SHIFT);
 
-                let (output_addr, attribute_fields) =
+                let (phys_output_addr, attribute_fields) =
                     bsp::memory::mmu::virt_mem_layout().virt_addr_properties(virt_addr)?;
 
-                *l3_entry = PageDescriptor::from_output_addr(output_addr, attribute_fields);
+                *l3_entry = PageDescriptor::from_output_addr(phys_output_addr, &attribute_fields);
             }
         }
 
@@ -282,7 +282,7 @@ impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
     }
 
     /// The translation table's base address to be used for programming the MMU.
-    pub fn base_address(&self) -> u64 {
-        self.lvl2.base_addr_u64()
+    pub fn phys_base_address(&self) -> u64 {
+        self.lvl2.phys_start_addr_u64()
     }
 }
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs b/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
index 911d10544..703bb3ba2 100644
--- a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
@@ -12,8 +12,8 @@ use core::ops::RangeInclusive;
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
-/// The address space size chosen by this BSP.
-pub type KernelAddrSpaceSize = AddressSpaceSize<{ memory_map::END_INCLUSIVE + 1 }>;
+/// The kernel's address space defined by this BSP.
+pub type KernelAddrSpace = AddressSpace<{ memory_map::END_INCLUSIVE + 1 }>;
 
 const NUM_MEM_RANGES: usize = 3;
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/main.rs b/11_virtual_mem_part1_identity_mapping/src/main.rs
index 9f755c9ba..ccc842de4 100644
--- a/11_virtual_mem_part1_identity_mapping/src/main.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/main.rs
@@ -112,6 +112,7 @@
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(const_generics)]
 #![feature(const_panic)]
+#![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
@@ -136,7 +137,7 @@ mod time;
 ///
 /// - Only a single core must be active and running this function.
 /// - The init calls in this function must appear in the correct order:
-///     - Virtual memory must be activated before the device drivers.
+///     - Caching must be activated before the device drivers.
 ///       - Without it, any atomic operations, e.g. the yet-to-be-introduced spinlocks in the device
 ///         drivers (which currently employ NullLocks instead of spinlocks), will fail to work on
 ///         the RPi SoCs.
@@ -144,7 +145,7 @@ unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
     use memory::mmu::interface::MMU;
 
-    if let Err(string) = memory::mmu::mmu().init() {
+    if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
         panic!("MMU: {}", string);
     }
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/memory/mmu.rs b/11_virtual_mem_part1_identity_mapping/src/memory/mmu.rs
index efc9c447b..77cdcc061 100644
--- a/11_virtual_mem_part1_identity_mapping/src/memory/mmu.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/memory/mmu.rs
@@ -31,8 +31,17 @@ pub use arch_mmu::mmu;
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
+/// MMU enable errors variants.
+#[allow(missing_docs)]
+#[derive(Debug)]
+pub enum MMUEnableError {
+    AlreadyEnabled,
+    Other(&'static str),
+}
+
 /// Memory Management interfaces.
 pub mod interface {
+    use super::*;
 
     /// MMU functions.
     pub trait MMU {
@@ -42,15 +51,18 @@ pub mod interface {
         /// # Safety
         ///
         /// - Changes the HW's global state.
-        unsafe fn init(&self) -> Result<(), &'static str>;
+        unsafe fn enable_mmu_and_caching(&self) -> Result<(), MMUEnableError>;
+
+        /// Returns true if the MMU is enabled, false otherwise.
+        fn is_enabled(&self) -> bool;
     }
 }
 
 /// Describes the characteristics of a translation granule.
 pub struct TranslationGranule<const GRANULE_SIZE: usize>;
 
-/// Describes the size of an address space.
-pub struct AddressSpaceSize<const AS_SIZE: usize>;
+/// Describes properties of an address space.
+pub struct AddressSpace<const AS_SIZE: usize>;
 
 /// Architecture agnostic translation types.
 #[allow(missing_docs)]
@@ -108,6 +120,15 @@ pub struct KernelVirtualLayout<const NUM_SPECIAL_RANGES: usize> {
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
+impl fmt::Display for MMUEnableError {
+    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+        match self {
+            MMUEnableError::AlreadyEnabled => write!(f, "MMU is already enabled"),
+            MMUEnableError::Other(x) => write!(f, "{}", x),
+        }
+    }
+}
+
 impl<const GRANULE_SIZE: usize> TranslationGranule<GRANULE_SIZE> {
     /// The granule's size.
     pub const SIZE: usize = Self::size_checked();
@@ -122,22 +143,18 @@ impl<const GRANULE_SIZE: usize> TranslationGranule<GRANULE_SIZE> {
     }
 }
 
-impl<const AS_SIZE: usize> AddressSpaceSize<AS_SIZE> {
+impl<const AS_SIZE: usize> AddressSpace<AS_SIZE> {
     /// The address space size.
     pub const SIZE: usize = Self::size_checked();
 
     /// The address space shift, aka log2(size).
-    pub const SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
+    pub const SIZE_SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
 
     const fn size_checked() -> usize {
         assert!(AS_SIZE.is_power_of_two());
-        assert!(arch_mmu::MIN_ADDR_SPACE_SIZE.is_power_of_two());
-        assert!(arch_mmu::MAX_ADDR_SPACE_SIZE.is_power_of_two());
 
-        // Must adhere to architectural restrictions.
-        assert!(AS_SIZE >= arch_mmu::MIN_ADDR_SPACE_SIZE);
-        assert!(AS_SIZE <= arch_mmu::MAX_ADDR_SPACE_SIZE);
-        assert!((AS_SIZE % arch_mmu::AddrSpaceSizeGranule::SIZE) == 0);
+        // Check for architectural restrictions as well.
+        Self::arch_address_space_size_sanity_checks();
 
         AS_SIZE
     }
diff --git a/12_exceptions_part1_groundwork/README.md b/12_exceptions_part1_groundwork/README.md
index 53c953df0..0ce07116d 100644
--- a/12_exceptions_part1_groundwork/README.md
+++ b/12_exceptions_part1_groundwork/README.md
@@ -900,8 +900,8 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.r
 --- 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
 +++ 12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
 @@ -15,7 +15,7 @@
- /// The address space size chosen by this BSP.
- pub type KernelAddrSpaceSize = AddressSpaceSize<{ memory_map::END_INCLUSIVE + 1 }>;
+ /// The kernel's address space defined by this BSP.
+ pub type KernelAddrSpace = AddressSpace<{ memory_map::END_INCLUSIVE + 1 }>;
 
 -const NUM_MEM_RANGES: usize = 3;
 +const NUM_MEM_RANGES: usize = 2;
@@ -967,24 +967,24 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/exception.rs 12_exceptions_p
 diff -uNr 11_virtual_mem_part1_identity_mapping/src/main.rs 12_exceptions_part1_groundwork/src/main.rs
 --- 11_virtual_mem_part1_identity_mapping/src/main.rs
 +++ 12_exceptions_part1_groundwork/src/main.rs
-@@ -113,6 +113,7 @@
- #![feature(const_generics)]
+@@ -114,6 +114,7 @@
  #![feature(const_panic)]
+ #![feature(core_intrinsics)]
  #![feature(format_args_nl)]
 +#![feature(global_asm)]
  #![feature(panic_info_message)]
  #![feature(trait_alias)]
  #![no_main]
-@@ -144,6 +145,8 @@
+@@ -145,6 +146,8 @@
      use driver::interface::DriverManager;
      use memory::mmu::interface::MMU;
 
 +    exception::handling_init();
 +
-     if let Err(string) = memory::mmu::mmu().init() {
+     if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
          panic!("MMU: {}", string);
      }
-@@ -196,13 +199,28 @@
+@@ -197,13 +200,28 @@
      info!("Timer test, spinning for 1 second");
      time::time_manager().spin_for(Duration::from_secs(1));
 
diff --git a/12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs b/12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
index 3504d2571..2f7bf615a 100644
--- a/12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
+++ b/12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
@@ -17,6 +17,7 @@ use crate::{
     bsp, memory,
     memory::mmu::{translation_table::KernelTranslationTable, TranslationGranule},
 };
+use core::intrinsics::unlikely;
 use cortex_a::{barrier, regs::*};
 
 //--------------------------------------------------------------------------------------------------
@@ -33,15 +34,6 @@ struct MemoryManagementUnit;
 pub type Granule512MiB = TranslationGranule<{ 512 * 1024 * 1024 }>;
 pub type Granule64KiB = TranslationGranule<{ 64 * 1024 }>;
 
-/// The min supported address space size.
-pub const MIN_ADDR_SPACE_SIZE: usize = 1024 * 1024 * 1024; // 1 GiB
-
-/// The max supported address space size.
-pub const MAX_ADDR_SPACE_SIZE: usize = 32 * 1024 * 1024 * 1024; // 32 GiB
-
-/// The supported address space size granule.
-pub type AddrSpaceSizeGranule = Granule512MiB;
-
 /// Constants for indexing the MAIR_EL1.
 #[allow(dead_code)]
 pub mod mair {
@@ -66,6 +58,18 @@ static MMU: MemoryManagementUnit = MemoryManagementUnit;
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
+impl<const AS_SIZE: usize> memory::mmu::AddressSpace<AS_SIZE> {
+    /// Checks for architectural restrictions.
+    pub const fn arch_address_space_size_sanity_checks() {
+        // Size must be at least one full 512 MiB table.
+        assert!((AS_SIZE % Granule512MiB::SIZE) == 0);
+
+        // Check for 48 bit virtual address size as maximum, which is supported by any ARMv8
+        // version.
+        assert!(AS_SIZE <= (1 << 48));
+    }
+}
+
 impl MemoryManagementUnit {
     /// Setup function for the MAIR_EL1 register.
     fn set_up_mair(&self) {
@@ -82,19 +86,19 @@ impl MemoryManagementUnit {
 
     /// Configure various settings of stage 1 of the EL1 translation regime.
     fn configure_translation_control(&self) {
-        let ips = ID_AA64MMFR0_EL1.read(ID_AA64MMFR0_EL1::PARange);
-        let t0sz = (64 - bsp::memory::mmu::KernelAddrSpaceSize::SHIFT) as u64;
+        let t0sz = (64 - bsp::memory::mmu::KernelAddrSpace::SIZE_SHIFT) as u64;
 
         TCR_EL1.write(
-            TCR_EL1::TBI0::Ignored
-                + TCR_EL1::IPS.val(ips)
-                + TCR_EL1::EPD1::DisableTTBR1Walks
+            TCR_EL1::TBI0::Used
+                + TCR_EL1::IPS::Bits_40
                 + TCR_EL1::TG0::KiB_64
                 + TCR_EL1::SH0::Inner
                 + TCR_EL1::ORGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
                 + TCR_EL1::IRGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
                 + TCR_EL1::EPD0::EnableTTBR0Walks
-                + TCR_EL1::T0SZ.val(t0sz),
+                + TCR_EL1::A1::TTBR0
+                + TCR_EL1::T0SZ.val(t0sz)
+                + TCR_EL1::EPD1::DisableTTBR1Walks,
         );
     }
 }
@@ -111,22 +115,31 @@ pub fn mmu() -> &'static impl memory::mmu::interface::MMU {
 //------------------------------------------------------------------------------
 // OS Interface Code
 //------------------------------------------------------------------------------
+use memory::mmu::MMUEnableError;
 
 impl memory::mmu::interface::MMU for MemoryManagementUnit {
-    unsafe fn init(&self) -> Result<(), &'static str> {
-        // Fail early if translation granule is not supported. Both RPis support it, though.
-        if !ID_AA64MMFR0_EL1.matches_all(ID_AA64MMFR0_EL1::TGran64::Supported) {
-            return Err("Translation granule not supported in HW");
+    unsafe fn enable_mmu_and_caching(&self) -> Result<(), MMUEnableError> {
+        if unlikely(self.is_enabled()) {
+            return Err(MMUEnableError::AlreadyEnabled);
+        }
+
+        // Fail early if translation granule is not supported.
+        if unlikely(!ID_AA64MMFR0_EL1.matches_all(ID_AA64MMFR0_EL1::TGran64::Supported)) {
+            return Err(MMUEnableError::Other(
+                "Translation granule not supported in HW",
+            ));
         }
 
         // Prepare the memory attribute indirection register.
         self.set_up_mair();
 
         // Populate translation tables.
-        KERNEL_TABLES.populate_tt_entries()?;
+        KERNEL_TABLES
+            .populate_tt_entries()
+            .map_err(|e| MMUEnableError::Other(e))?;
 
         // Set the "Translation Table Base Register".
-        TTBR0_EL1.set_baddr(KERNEL_TABLES.base_address());
+        TTBR0_EL1.set_baddr(KERNEL_TABLES.phys_base_address());
 
         self.configure_translation_control();
 
@@ -143,4 +156,9 @@ impl memory::mmu::interface::MMU for MemoryManagementUnit {
 
         Ok(())
     }
+
+    #[inline(always)]
+    fn is_enabled(&self) -> bool {
+        SCTLR_EL1.matches_all(SCTLR_EL1::M::Enable)
+    }
 }
diff --git a/12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs b/12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs
index cbe1d7832..f38d0895c 100644
--- a/12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -87,8 +87,8 @@ register_bitfields! {u64,
         AttrIndx OFFSET(2) NUMBITS(3) [],
 
         TYPE     OFFSET(1) NUMBITS(1) [
-            Block = 0,
-            Table = 1
+            Reserved_Invalid = 0,
+            Page = 1
         ],
 
         VALID    OFFSET(0) NUMBITS(1) [
@@ -116,19 +116,19 @@ struct PageDescriptor {
     value: u64,
 }
 
-trait BaseAddr {
-    fn base_addr_u64(&self) -> u64;
-    fn base_addr_usize(&self) -> usize;
+trait StartAddr {
+    fn phys_start_addr_u64(&self) -> u64;
+    fn phys_start_addr_usize(&self) -> usize;
 }
 
-const NUM_LVL2_TABLES: usize = bsp::memory::mmu::KernelAddrSpaceSize::SIZE >> Granule512MiB::SHIFT;
+const NUM_LVL2_TABLES: usize = bsp::memory::mmu::KernelAddrSpace::SIZE >> Granule512MiB::SHIFT;
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
 /// Big monolithic struct for storing the translation tables. Individual levels must be 64 KiB
-/// aligned, hence the "reverse" order of appearance.
+/// aligned, so the lvl3 is put first.
 #[repr(C)]
 #[repr(align(65536))]
 pub struct FixedSizeTranslationTable<const NUM_TABLES: usize> {
@@ -146,12 +146,13 @@ pub type KernelTranslationTable = FixedSizeTranslationTable<NUM_LVL2_TABLES>;
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-impl<T, const N: usize> BaseAddr for [T; N] {
-    fn base_addr_u64(&self) -> u64 {
+// The binary is still identity mapped, so we don't need to convert here.
+impl<T, const N: usize> StartAddr for [T; N] {
+    fn phys_start_addr_u64(&self) -> u64 {
         self as *const T as u64
     }
 
-    fn base_addr_usize(&self) -> usize {
+    fn phys_start_addr_usize(&self) -> usize {
         self as *const _ as usize
     }
 }
@@ -165,14 +166,14 @@ impl TableDescriptor {
     }
 
     /// Create an instance pointing to the supplied address.
-    pub fn from_next_lvl_table_addr(next_lvl_table_addr: usize) -> Self {
+    pub fn from_next_lvl_table_addr(phys_next_lvl_table_addr: usize) -> Self {
         let val = InMemoryRegister::<u64, STAGE1_TABLE_DESCRIPTOR::Register>::new(0);
 
-        let shifted = next_lvl_table_addr >> Granule64KiB::SHIFT;
+        let shifted = phys_next_lvl_table_addr >> Granule64KiB::SHIFT;
         val.write(
-            STAGE1_TABLE_DESCRIPTOR::VALID::True
+            STAGE1_TABLE_DESCRIPTOR::NEXT_LEVEL_TABLE_ADDR_64KiB.val(shifted as u64)
                 + STAGE1_TABLE_DESCRIPTOR::TYPE::Table
-                + STAGE1_TABLE_DESCRIPTOR::NEXT_LEVEL_TABLE_ADDR_64KiB.val(shifted as u64),
+                + STAGE1_TABLE_DESCRIPTOR::VALID::True,
         );
 
         TableDescriptor { value: val.get() }
@@ -225,16 +226,16 @@ impl PageDescriptor {
     }
 
     /// Create an instance.
-    pub fn from_output_addr(output_addr: usize, attribute_fields: AttributeFields) -> Self {
+    pub fn from_output_addr(phys_output_addr: usize, attribute_fields: &AttributeFields) -> Self {
         let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
 
-        let shifted = output_addr as u64 >> Granule64KiB::SHIFT;
+        let shifted = phys_output_addr as u64 >> Granule64KiB::SHIFT;
         val.write(
-            STAGE1_PAGE_DESCRIPTOR::VALID::True
+            STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted)
                 + STAGE1_PAGE_DESCRIPTOR::AF::True
-                + attribute_fields.into()
-                + STAGE1_PAGE_DESCRIPTOR::TYPE::Table
-                + STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted),
+                + STAGE1_PAGE_DESCRIPTOR::TYPE::Page
+                + STAGE1_PAGE_DESCRIPTOR::VALID::True
+                + attribute_fields.clone().into(),
         );
 
         Self { value: val.get() }
@@ -247,10 +248,9 @@ impl PageDescriptor {
 
 impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
     /// Create an instance.
-    #[allow(clippy::assertions_on_constants)]
     pub const fn new() -> Self {
+        // Can't have a zero-sized address space.
         assert!(NUM_TABLES > 0);
-        assert!((bsp::memory::mmu::KernelAddrSpaceSize::SIZE % Granule512MiB::SIZE) == 0);
 
         Self {
             lvl3: [[PageDescriptor::new_zeroed(); 8192]; NUM_TABLES],
@@ -266,15 +266,15 @@ impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
     pub unsafe fn populate_tt_entries(&mut self) -> Result<(), &'static str> {
         for (l2_nr, l2_entry) in self.lvl2.iter_mut().enumerate() {
             *l2_entry =
-                TableDescriptor::from_next_lvl_table_addr(self.lvl3[l2_nr].base_addr_usize());
+                TableDescriptor::from_next_lvl_table_addr(self.lvl3[l2_nr].phys_start_addr_usize());
 
             for (l3_nr, l3_entry) in self.lvl3[l2_nr].iter_mut().enumerate() {
                 let virt_addr = (l2_nr << Granule512MiB::SHIFT) + (l3_nr << Granule64KiB::SHIFT);
 
-                let (output_addr, attribute_fields) =
+                let (phys_output_addr, attribute_fields) =
                     bsp::memory::mmu::virt_mem_layout().virt_addr_properties(virt_addr)?;
 
-                *l3_entry = PageDescriptor::from_output_addr(output_addr, attribute_fields);
+                *l3_entry = PageDescriptor::from_output_addr(phys_output_addr, &attribute_fields);
             }
         }
 
@@ -282,7 +282,7 @@ impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
     }
 
     /// The translation table's base address to be used for programming the MMU.
-    pub fn base_address(&self) -> u64 {
-        self.lvl2.base_addr_u64()
+    pub fn phys_base_address(&self) -> u64 {
+        self.lvl2.phys_start_addr_u64()
     }
 }
diff --git a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs b/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
index fe98604d9..1775c07cd 100644
--- a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
+++ b/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
@@ -12,8 +12,8 @@ use core::ops::RangeInclusive;
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
-/// The address space size chosen by this BSP.
-pub type KernelAddrSpaceSize = AddressSpaceSize<{ memory_map::END_INCLUSIVE + 1 }>;
+/// The kernel's address space defined by this BSP.
+pub type KernelAddrSpace = AddressSpace<{ memory_map::END_INCLUSIVE + 1 }>;
 
 const NUM_MEM_RANGES: usize = 2;
 
diff --git a/12_exceptions_part1_groundwork/src/main.rs b/12_exceptions_part1_groundwork/src/main.rs
index 9dee3a44c..8e8c089f1 100644
--- a/12_exceptions_part1_groundwork/src/main.rs
+++ b/12_exceptions_part1_groundwork/src/main.rs
@@ -112,6 +112,7 @@
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(const_generics)]
 #![feature(const_panic)]
+#![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(global_asm)]
 #![feature(panic_info_message)]
@@ -137,7 +138,7 @@ mod time;
 ///
 /// - Only a single core must be active and running this function.
 /// - The init calls in this function must appear in the correct order:
-///     - Virtual memory must be activated before the device drivers.
+///     - Caching must be activated before the device drivers.
 ///       - Without it, any atomic operations, e.g. the yet-to-be-introduced spinlocks in the device
 ///         drivers (which currently employ NullLocks instead of spinlocks), will fail to work on
 ///         the RPi SoCs.
@@ -147,7 +148,7 @@ unsafe fn kernel_init() -> ! {
 
     exception::handling_init();
 
-    if let Err(string) = memory::mmu::mmu().init() {
+    if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
         panic!("MMU: {}", string);
     }
 
diff --git a/12_exceptions_part1_groundwork/src/memory/mmu.rs b/12_exceptions_part1_groundwork/src/memory/mmu.rs
index efc9c447b..77cdcc061 100644
--- a/12_exceptions_part1_groundwork/src/memory/mmu.rs
+++ b/12_exceptions_part1_groundwork/src/memory/mmu.rs
@@ -31,8 +31,17 @@ pub use arch_mmu::mmu;
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
+/// MMU enable errors variants.
+#[allow(missing_docs)]
+#[derive(Debug)]
+pub enum MMUEnableError {
+    AlreadyEnabled,
+    Other(&'static str),
+}
+
 /// Memory Management interfaces.
 pub mod interface {
+    use super::*;
 
     /// MMU functions.
     pub trait MMU {
@@ -42,15 +51,18 @@ pub mod interface {
         /// # Safety
         ///
         /// - Changes the HW's global state.
-        unsafe fn init(&self) -> Result<(), &'static str>;
+        unsafe fn enable_mmu_and_caching(&self) -> Result<(), MMUEnableError>;
+
+        /// Returns true if the MMU is enabled, false otherwise.
+        fn is_enabled(&self) -> bool;
     }
 }
 
 /// Describes the characteristics of a translation granule.
 pub struct TranslationGranule<const GRANULE_SIZE: usize>;
 
-/// Describes the size of an address space.
-pub struct AddressSpaceSize<const AS_SIZE: usize>;
+/// Describes properties of an address space.
+pub struct AddressSpace<const AS_SIZE: usize>;
 
 /// Architecture agnostic translation types.
 #[allow(missing_docs)]
@@ -108,6 +120,15 @@ pub struct KernelVirtualLayout<const NUM_SPECIAL_RANGES: usize> {
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
+impl fmt::Display for MMUEnableError {
+    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+        match self {
+            MMUEnableError::AlreadyEnabled => write!(f, "MMU is already enabled"),
+            MMUEnableError::Other(x) => write!(f, "{}", x),
+        }
+    }
+}
+
 impl<const GRANULE_SIZE: usize> TranslationGranule<GRANULE_SIZE> {
     /// The granule's size.
     pub const SIZE: usize = Self::size_checked();
@@ -122,22 +143,18 @@ impl<const GRANULE_SIZE: usize> TranslationGranule<GRANULE_SIZE> {
     }
 }
 
-impl<const AS_SIZE: usize> AddressSpaceSize<AS_SIZE> {
+impl<const AS_SIZE: usize> AddressSpace<AS_SIZE> {
     /// The address space size.
     pub const SIZE: usize = Self::size_checked();
 
     /// The address space shift, aka log2(size).
-    pub const SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
+    pub const SIZE_SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
 
     const fn size_checked() -> usize {
         assert!(AS_SIZE.is_power_of_two());
-        assert!(arch_mmu::MIN_ADDR_SPACE_SIZE.is_power_of_two());
-        assert!(arch_mmu::MAX_ADDR_SPACE_SIZE.is_power_of_two());
 
-        // Must adhere to architectural restrictions.
-        assert!(AS_SIZE >= arch_mmu::MIN_ADDR_SPACE_SIZE);
-        assert!(AS_SIZE <= arch_mmu::MAX_ADDR_SPACE_SIZE);
-        assert!((AS_SIZE % arch_mmu::AddrSpaceSizeGranule::SIZE) == 0);
+        // Check for architectural restrictions as well.
+        Self::arch_address_space_size_sanity_checks();
 
         AS_SIZE
     }
diff --git a/13_integrated_testing/README.md b/13_integrated_testing/README.md
index c0fc217b9..452c864e5 100644
--- a/13_integrated_testing/README.md
+++ b/13_integrated_testing/README.md
@@ -1026,7 +1026,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translatio
 --- 12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs
 +++ 13_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs
 @@ -286,3 +286,31 @@
-         self.lvl2.base_addr_u64()
+         self.lvl2.phys_start_addr_u64()
      }
  }
 +
@@ -1061,8 +1061,8 @@ diff -uNr 12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translatio
 diff -uNr 12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs 13_integrated_testing/src/_arch/aarch64/memory/mmu.rs
 --- 12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
 +++ 13_integrated_testing/src/_arch/aarch64/memory/mmu.rs
-@@ -144,3 +144,22 @@
-         Ok(())
+@@ -162,3 +162,22 @@
+         SCTLR_EL1.matches_all(SCTLR_EL1::M::Enable)
      }
  }
 +
@@ -1194,7 +1194,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/exception.rs 13_integrated_testing/
 diff -uNr 12_exceptions_part1_groundwork/src/lib.rs 13_integrated_testing/src/lib.rs
 --- 12_exceptions_part1_groundwork/src/lib.rs
 +++ 13_integrated_testing/src/lib.rs
-@@ -0,0 +1,171 @@
+@@ -0,0 +1,172 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -1311,6 +1311,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/lib.rs 13_integrated_testing/src/li
 +#![feature(const_fn_fn_ptr_basics)]
 +#![feature(const_generics)]
 +#![feature(const_panic)]
++#![feature(core_intrinsics)]
 +#![feature(format_args_nl)]
 +#![feature(global_asm)]
 +#![feature(linkage)]
@@ -1370,7 +1371,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/lib.rs 13_integrated_testing/src/li
 diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/main.rs
 --- 12_exceptions_part1_groundwork/src/main.rs
 +++ 13_integrated_testing/src/main.rs
-@@ -6,130 +6,12 @@
+@@ -6,131 +6,12 @@
  #![doc(html_logo_url = "https://git.io/JeGIp")]
 
  //! The `kernel` binary.
@@ -1480,6 +1481,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/m
 -#![feature(const_fn_fn_ptr_basics)]
 -#![feature(const_generics)]
 -#![feature(const_panic)]
+-#![feature(core_intrinsics)]
 +
  #![feature(format_args_nl)]
 -#![feature(global_asm)]
@@ -1503,7 +1505,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/m
 
  /// Early init code.
  ///
-@@ -141,6 +23,7 @@
+@@ -142,6 +23,7 @@
  ///       - Without it, any atomic operations, e.g. the yet-to-be-introduced spinlocks in the device
  ///         drivers (which currently employ NullLocks instead of spinlocks), will fail to work on
  ///         the RPi SoCs.
@@ -1511,7 +1513,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/m
  unsafe fn kernel_init() -> ! {
      use driver::interface::DriverManager;
      use memory::mmu::interface::MMU;
-@@ -167,9 +50,7 @@
+@@ -168,9 +50,7 @@
  fn kernel_main() -> ! {
      use bsp::console::console;
      use console::interface::All;
@@ -1521,7 +1523,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/m
 
      info!("Booting on: {}", bsp::board_name());
 
-@@ -196,31 +77,6 @@
+@@ -197,31 +77,6 @@
          info!("      {}. {}", i + 1, driver.compatible());
      }
 
@@ -1557,7 +1559,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/m
 diff -uNr 12_exceptions_part1_groundwork/src/memory/mmu.rs 13_integrated_testing/src/memory/mmu.rs
 --- 12_exceptions_part1_groundwork/src/memory/mmu.rs
 +++ 13_integrated_testing/src/memory/mmu.rs
-@@ -54,7 +54,6 @@
+@@ -66,7 +66,6 @@
 
  /// Architecture agnostic translation types.
  #[allow(missing_docs)]
@@ -1565,7 +1567,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/memory/mmu.rs 13_integrated_testing
  #[derive(Copy, Clone)]
  pub enum Translation {
      Identity,
-@@ -244,4 +243,9 @@
+@@ -261,4 +260,9 @@
              info!("{}", i);
          }
      }
@@ -1910,7 +1912,7 @@ diff -uNr 12_exceptions_part1_groundwork/tests/02_exception_sync_page_fault.rs 1
 +    println!("Testing synchronous exception handling by causing a page fault");
 +    println!("-------------------------------------------------------------------\n");
 +
-+    if let Err(string) = memory::mmu::mmu().init() {
++    if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
 +        println!("MMU: {}", string);
 +        cpu::qemu_exit_failure()
 +    }
diff --git a/13_integrated_testing/src/_arch/aarch64/memory/mmu.rs b/13_integrated_testing/src/_arch/aarch64/memory/mmu.rs
index 42ba0519b..29e8125d7 100644
--- a/13_integrated_testing/src/_arch/aarch64/memory/mmu.rs
+++ b/13_integrated_testing/src/_arch/aarch64/memory/mmu.rs
@@ -17,6 +17,7 @@ use crate::{
     bsp, memory,
     memory::mmu::{translation_table::KernelTranslationTable, TranslationGranule},
 };
+use core::intrinsics::unlikely;
 use cortex_a::{barrier, regs::*};
 
 //--------------------------------------------------------------------------------------------------
@@ -33,15 +34,6 @@ struct MemoryManagementUnit;
 pub type Granule512MiB = TranslationGranule<{ 512 * 1024 * 1024 }>;
 pub type Granule64KiB = TranslationGranule<{ 64 * 1024 }>;
 
-/// The min supported address space size.
-pub const MIN_ADDR_SPACE_SIZE: usize = 1024 * 1024 * 1024; // 1 GiB
-
-/// The max supported address space size.
-pub const MAX_ADDR_SPACE_SIZE: usize = 32 * 1024 * 1024 * 1024; // 32 GiB
-
-/// The supported address space size granule.
-pub type AddrSpaceSizeGranule = Granule512MiB;
-
 /// Constants for indexing the MAIR_EL1.
 #[allow(dead_code)]
 pub mod mair {
@@ -66,6 +58,18 @@ static MMU: MemoryManagementUnit = MemoryManagementUnit;
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
+impl<const AS_SIZE: usize> memory::mmu::AddressSpace<AS_SIZE> {
+    /// Checks for architectural restrictions.
+    pub const fn arch_address_space_size_sanity_checks() {
+        // Size must be at least one full 512 MiB table.
+        assert!((AS_SIZE % Granule512MiB::SIZE) == 0);
+
+        // Check for 48 bit virtual address size as maximum, which is supported by any ARMv8
+        // version.
+        assert!(AS_SIZE <= (1 << 48));
+    }
+}
+
 impl MemoryManagementUnit {
     /// Setup function for the MAIR_EL1 register.
     fn set_up_mair(&self) {
@@ -82,19 +86,19 @@ impl MemoryManagementUnit {
 
     /// Configure various settings of stage 1 of the EL1 translation regime.
     fn configure_translation_control(&self) {
-        let ips = ID_AA64MMFR0_EL1.read(ID_AA64MMFR0_EL1::PARange);
-        let t0sz = (64 - bsp::memory::mmu::KernelAddrSpaceSize::SHIFT) as u64;
+        let t0sz = (64 - bsp::memory::mmu::KernelAddrSpace::SIZE_SHIFT) as u64;
 
         TCR_EL1.write(
-            TCR_EL1::TBI0::Ignored
-                + TCR_EL1::IPS.val(ips)
-                + TCR_EL1::EPD1::DisableTTBR1Walks
+            TCR_EL1::TBI0::Used
+                + TCR_EL1::IPS::Bits_40
                 + TCR_EL1::TG0::KiB_64
                 + TCR_EL1::SH0::Inner
                 + TCR_EL1::ORGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
                 + TCR_EL1::IRGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
                 + TCR_EL1::EPD0::EnableTTBR0Walks
-                + TCR_EL1::T0SZ.val(t0sz),
+                + TCR_EL1::A1::TTBR0
+                + TCR_EL1::T0SZ.val(t0sz)
+                + TCR_EL1::EPD1::DisableTTBR1Walks,
         );
     }
 }
@@ -111,22 +115,31 @@ pub fn mmu() -> &'static impl memory::mmu::interface::MMU {
 //------------------------------------------------------------------------------
 // OS Interface Code
 //------------------------------------------------------------------------------
+use memory::mmu::MMUEnableError;
 
 impl memory::mmu::interface::MMU for MemoryManagementUnit {
-    unsafe fn init(&self) -> Result<(), &'static str> {
-        // Fail early if translation granule is not supported. Both RPis support it, though.
-        if !ID_AA64MMFR0_EL1.matches_all(ID_AA64MMFR0_EL1::TGran64::Supported) {
-            return Err("Translation granule not supported in HW");
+    unsafe fn enable_mmu_and_caching(&self) -> Result<(), MMUEnableError> {
+        if unlikely(self.is_enabled()) {
+            return Err(MMUEnableError::AlreadyEnabled);
+        }
+
+        // Fail early if translation granule is not supported.
+        if unlikely(!ID_AA64MMFR0_EL1.matches_all(ID_AA64MMFR0_EL1::TGran64::Supported)) {
+            return Err(MMUEnableError::Other(
+                "Translation granule not supported in HW",
+            ));
         }
 
         // Prepare the memory attribute indirection register.
         self.set_up_mair();
 
         // Populate translation tables.
-        KERNEL_TABLES.populate_tt_entries()?;
+        KERNEL_TABLES
+            .populate_tt_entries()
+            .map_err(|e| MMUEnableError::Other(e))?;
 
         // Set the "Translation Table Base Register".
-        TTBR0_EL1.set_baddr(KERNEL_TABLES.base_address());
+        TTBR0_EL1.set_baddr(KERNEL_TABLES.phys_base_address());
 
         self.configure_translation_control();
 
@@ -143,6 +156,11 @@ impl memory::mmu::interface::MMU for MemoryManagementUnit {
 
         Ok(())
     }
+
+    #[inline(always)]
+    fn is_enabled(&self) -> bool {
+        SCTLR_EL1.matches_all(SCTLR_EL1::M::Enable)
+    }
 }
 
 //--------------------------------------------------------------------------------------------------
diff --git a/13_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs b/13_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs
index 337f9aedf..73a93ff73 100644
--- a/13_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/13_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -87,8 +87,8 @@ register_bitfields! {u64,
         AttrIndx OFFSET(2) NUMBITS(3) [],
 
         TYPE     OFFSET(1) NUMBITS(1) [
-            Block = 0,
-            Table = 1
+            Reserved_Invalid = 0,
+            Page = 1
         ],
 
         VALID    OFFSET(0) NUMBITS(1) [
@@ -116,19 +116,19 @@ struct PageDescriptor {
     value: u64,
 }
 
-trait BaseAddr {
-    fn base_addr_u64(&self) -> u64;
-    fn base_addr_usize(&self) -> usize;
+trait StartAddr {
+    fn phys_start_addr_u64(&self) -> u64;
+    fn phys_start_addr_usize(&self) -> usize;
 }
 
-const NUM_LVL2_TABLES: usize = bsp::memory::mmu::KernelAddrSpaceSize::SIZE >> Granule512MiB::SHIFT;
+const NUM_LVL2_TABLES: usize = bsp::memory::mmu::KernelAddrSpace::SIZE >> Granule512MiB::SHIFT;
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
 /// Big monolithic struct for storing the translation tables. Individual levels must be 64 KiB
-/// aligned, hence the "reverse" order of appearance.
+/// aligned, so the lvl3 is put first.
 #[repr(C)]
 #[repr(align(65536))]
 pub struct FixedSizeTranslationTable<const NUM_TABLES: usize> {
@@ -146,12 +146,13 @@ pub type KernelTranslationTable = FixedSizeTranslationTable<NUM_LVL2_TABLES>;
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-impl<T, const N: usize> BaseAddr for [T; N] {
-    fn base_addr_u64(&self) -> u64 {
+// The binary is still identity mapped, so we don't need to convert here.
+impl<T, const N: usize> StartAddr for [T; N] {
+    fn phys_start_addr_u64(&self) -> u64 {
         self as *const T as u64
     }
 
-    fn base_addr_usize(&self) -> usize {
+    fn phys_start_addr_usize(&self) -> usize {
         self as *const _ as usize
     }
 }
@@ -165,14 +166,14 @@ impl TableDescriptor {
     }
 
     /// Create an instance pointing to the supplied address.
-    pub fn from_next_lvl_table_addr(next_lvl_table_addr: usize) -> Self {
+    pub fn from_next_lvl_table_addr(phys_next_lvl_table_addr: usize) -> Self {
         let val = InMemoryRegister::<u64, STAGE1_TABLE_DESCRIPTOR::Register>::new(0);
 
-        let shifted = next_lvl_table_addr >> Granule64KiB::SHIFT;
+        let shifted = phys_next_lvl_table_addr >> Granule64KiB::SHIFT;
         val.write(
-            STAGE1_TABLE_DESCRIPTOR::VALID::True
+            STAGE1_TABLE_DESCRIPTOR::NEXT_LEVEL_TABLE_ADDR_64KiB.val(shifted as u64)
                 + STAGE1_TABLE_DESCRIPTOR::TYPE::Table
-                + STAGE1_TABLE_DESCRIPTOR::NEXT_LEVEL_TABLE_ADDR_64KiB.val(shifted as u64),
+                + STAGE1_TABLE_DESCRIPTOR::VALID::True,
         );
 
         TableDescriptor { value: val.get() }
@@ -225,16 +226,16 @@ impl PageDescriptor {
     }
 
     /// Create an instance.
-    pub fn from_output_addr(output_addr: usize, attribute_fields: AttributeFields) -> Self {
+    pub fn from_output_addr(phys_output_addr: usize, attribute_fields: &AttributeFields) -> Self {
         let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
 
-        let shifted = output_addr as u64 >> Granule64KiB::SHIFT;
+        let shifted = phys_output_addr as u64 >> Granule64KiB::SHIFT;
         val.write(
-            STAGE1_PAGE_DESCRIPTOR::VALID::True
+            STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted)
                 + STAGE1_PAGE_DESCRIPTOR::AF::True
-                + attribute_fields.into()
-                + STAGE1_PAGE_DESCRIPTOR::TYPE::Table
-                + STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted),
+                + STAGE1_PAGE_DESCRIPTOR::TYPE::Page
+                + STAGE1_PAGE_DESCRIPTOR::VALID::True
+                + attribute_fields.clone().into(),
         );
 
         Self { value: val.get() }
@@ -247,10 +248,9 @@ impl PageDescriptor {
 
 impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
     /// Create an instance.
-    #[allow(clippy::assertions_on_constants)]
     pub const fn new() -> Self {
+        // Can't have a zero-sized address space.
         assert!(NUM_TABLES > 0);
-        assert!((bsp::memory::mmu::KernelAddrSpaceSize::SIZE % Granule512MiB::SIZE) == 0);
 
         Self {
             lvl3: [[PageDescriptor::new_zeroed(); 8192]; NUM_TABLES],
@@ -266,15 +266,15 @@ impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
     pub unsafe fn populate_tt_entries(&mut self) -> Result<(), &'static str> {
         for (l2_nr, l2_entry) in self.lvl2.iter_mut().enumerate() {
             *l2_entry =
-                TableDescriptor::from_next_lvl_table_addr(self.lvl3[l2_nr].base_addr_usize());
+                TableDescriptor::from_next_lvl_table_addr(self.lvl3[l2_nr].phys_start_addr_usize());
 
             for (l3_nr, l3_entry) in self.lvl3[l2_nr].iter_mut().enumerate() {
                 let virt_addr = (l2_nr << Granule512MiB::SHIFT) + (l3_nr << Granule64KiB::SHIFT);
 
-                let (output_addr, attribute_fields) =
+                let (phys_output_addr, attribute_fields) =
                     bsp::memory::mmu::virt_mem_layout().virt_addr_properties(virt_addr)?;
 
-                *l3_entry = PageDescriptor::from_output_addr(output_addr, attribute_fields);
+                *l3_entry = PageDescriptor::from_output_addr(phys_output_addr, &attribute_fields);
             }
         }
 
@@ -282,8 +282,8 @@ impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
     }
 
     /// The translation table's base address to be used for programming the MMU.
-    pub fn base_address(&self) -> u64 {
-        self.lvl2.base_addr_u64()
+    pub fn phys_base_address(&self) -> u64 {
+        self.lvl2.phys_start_addr_u64()
     }
 }
 
diff --git a/13_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs b/13_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs
index 451d927b6..0ccfae002 100644
--- a/13_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs
+++ b/13_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs
@@ -12,8 +12,8 @@ use core::ops::RangeInclusive;
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
-/// The address space size chosen by this BSP.
-pub type KernelAddrSpaceSize = AddressSpaceSize<{ memory_map::END_INCLUSIVE + 1 }>;
+/// The kernel's address space defined by this BSP.
+pub type KernelAddrSpace = AddressSpace<{ memory_map::END_INCLUSIVE + 1 }>;
 
 const NUM_MEM_RANGES: usize = 2;
 
diff --git a/13_integrated_testing/src/lib.rs b/13_integrated_testing/src/lib.rs
index 0fa216a98..b094daf3d 100644
--- a/13_integrated_testing/src/lib.rs
+++ b/13_integrated_testing/src/lib.rs
@@ -114,6 +114,7 @@
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(const_generics)]
 #![feature(const_panic)]
+#![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(global_asm)]
 #![feature(linkage)]
diff --git a/13_integrated_testing/src/main.rs b/13_integrated_testing/src/main.rs
index 769f9e8f0..101124df8 100644
--- a/13_integrated_testing/src/main.rs
+++ b/13_integrated_testing/src/main.rs
@@ -19,7 +19,7 @@ use libkernel::{bsp, console, driver, exception, info, memory, time};
 ///
 /// - Only a single core must be active and running this function.
 /// - The init calls in this function must appear in the correct order:
-///     - Virtual memory must be activated before the device drivers.
+///     - Caching must be activated before the device drivers.
 ///       - Without it, any atomic operations, e.g. the yet-to-be-introduced spinlocks in the device
 ///         drivers (which currently employ NullLocks instead of spinlocks), will fail to work on
 ///         the RPi SoCs.
@@ -30,7 +30,7 @@ unsafe fn kernel_init() -> ! {
 
     exception::handling_init();
 
-    if let Err(string) = memory::mmu::mmu().init() {
+    if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
         panic!("MMU: {}", string);
     }
 
diff --git a/13_integrated_testing/src/memory/mmu.rs b/13_integrated_testing/src/memory/mmu.rs
index cca2951aa..ec4ca0748 100644
--- a/13_integrated_testing/src/memory/mmu.rs
+++ b/13_integrated_testing/src/memory/mmu.rs
@@ -31,8 +31,17 @@ pub use arch_mmu::mmu;
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
+/// MMU enable errors variants.
+#[allow(missing_docs)]
+#[derive(Debug)]
+pub enum MMUEnableError {
+    AlreadyEnabled,
+    Other(&'static str),
+}
+
 /// Memory Management interfaces.
 pub mod interface {
+    use super::*;
 
     /// MMU functions.
     pub trait MMU {
@@ -42,15 +51,18 @@ pub mod interface {
         /// # Safety
         ///
         /// - Changes the HW's global state.
-        unsafe fn init(&self) -> Result<(), &'static str>;
+        unsafe fn enable_mmu_and_caching(&self) -> Result<(), MMUEnableError>;
+
+        /// Returns true if the MMU is enabled, false otherwise.
+        fn is_enabled(&self) -> bool;
     }
 }
 
 /// Describes the characteristics of a translation granule.
 pub struct TranslationGranule<const GRANULE_SIZE: usize>;
 
-/// Describes the size of an address space.
-pub struct AddressSpaceSize<const AS_SIZE: usize>;
+/// Describes properties of an address space.
+pub struct AddressSpace<const AS_SIZE: usize>;
 
 /// Architecture agnostic translation types.
 #[allow(missing_docs)]
@@ -107,6 +119,15 @@ pub struct KernelVirtualLayout<const NUM_SPECIAL_RANGES: usize> {
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
+impl fmt::Display for MMUEnableError {
+    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+        match self {
+            MMUEnableError::AlreadyEnabled => write!(f, "MMU is already enabled"),
+            MMUEnableError::Other(x) => write!(f, "{}", x),
+        }
+    }
+}
+
 impl<const GRANULE_SIZE: usize> TranslationGranule<GRANULE_SIZE> {
     /// The granule's size.
     pub const SIZE: usize = Self::size_checked();
@@ -121,22 +142,18 @@ impl<const GRANULE_SIZE: usize> TranslationGranule<GRANULE_SIZE> {
     }
 }
 
-impl<const AS_SIZE: usize> AddressSpaceSize<AS_SIZE> {
+impl<const AS_SIZE: usize> AddressSpace<AS_SIZE> {
     /// The address space size.
     pub const SIZE: usize = Self::size_checked();
 
     /// The address space shift, aka log2(size).
-    pub const SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
+    pub const SIZE_SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
 
     const fn size_checked() -> usize {
         assert!(AS_SIZE.is_power_of_two());
-        assert!(arch_mmu::MIN_ADDR_SPACE_SIZE.is_power_of_two());
-        assert!(arch_mmu::MAX_ADDR_SPACE_SIZE.is_power_of_two());
 
-        // Must adhere to architectural restrictions.
-        assert!(AS_SIZE >= arch_mmu::MIN_ADDR_SPACE_SIZE);
-        assert!(AS_SIZE <= arch_mmu::MAX_ADDR_SPACE_SIZE);
-        assert!((AS_SIZE % arch_mmu::AddrSpaceSizeGranule::SIZE) == 0);
+        // Check for architectural restrictions as well.
+        Self::arch_address_space_size_sanity_checks();
 
         AS_SIZE
     }
diff --git a/13_integrated_testing/tests/02_exception_sync_page_fault.rs b/13_integrated_testing/tests/02_exception_sync_page_fault.rs
index 185089a3d..f1535d34c 100644
--- a/13_integrated_testing/tests/02_exception_sync_page_fault.rs
+++ b/13_integrated_testing/tests/02_exception_sync_page_fault.rs
@@ -29,7 +29,7 @@ unsafe fn kernel_init() -> ! {
     println!("Testing synchronous exception handling by causing a page fault");
     println!("-------------------------------------------------------------------\n");
 
-    if let Err(string) = memory::mmu::mmu().init() {
+    if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
         println!("MMU: {}", string);
         cpu::qemu_exit_failure()
     }
diff --git a/14_exceptions_part2_peripheral_IRQs/README.md b/14_exceptions_part2_peripheral_IRQs/README.md
index 1c3cb7f0c..5e1f45e32 100644
--- a/14_exceptions_part2_peripheral_IRQs/README.md
+++ b/14_exceptions_part2_peripheral_IRQs/README.md
@@ -2296,7 +2296,7 @@ diff -uNr 13_integrated_testing/src/exception/asynchronous.rs 14_exceptions_part
 diff -uNr 13_integrated_testing/src/lib.rs 14_exceptions_part2_peripheral_IRQs/src/lib.rs
 --- 13_integrated_testing/src/lib.rs
 +++ 14_exceptions_part2_peripheral_IRQs/src/lib.rs
-@@ -111,9 +111,11 @@
+@@ -111,6 +111,7 @@
 
  #![allow(clippy::clippy::upper_case_acronyms)]
  #![allow(incomplete_features)]
@@ -2304,11 +2304,7 @@ diff -uNr 13_integrated_testing/src/lib.rs 14_exceptions_part2_peripheral_IRQs/s
  #![feature(const_fn_fn_ptr_basics)]
  #![feature(const_generics)]
  #![feature(const_panic)]
-+#![feature(core_intrinsics)]
- #![feature(format_args_nl)]
- #![feature(global_asm)]
- #![feature(linkage)]
-@@ -137,6 +139,7 @@
+@@ -138,6 +139,7 @@
  pub mod exception;
  pub mod memory;
  pub mod print;
@@ -2331,7 +2327,7 @@ diff -uNr 13_integrated_testing/src/main.rs 14_exceptions_part2_peripheral_IRQs/
  ///
 @@ -21,8 +21,8 @@
  /// - The init calls in this function must appear in the correct order:
- ///     - Virtual memory must be activated before the device drivers.
+ ///     - Caching must be activated before the device drivers.
  ///       - Without it, any atomic operations, e.g. the yet-to-be-introduced spinlocks in the device
 -///         drivers (which currently employ NullLocks instead of spinlocks), will fail to work on
 -///         the RPi SoCs.
@@ -2590,7 +2586,7 @@ diff -uNr 13_integrated_testing/src/synchronization.rs 14_exceptions_part2_perip
      type Data = T;
 
      fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
-@@ -72,6 +110,32 @@
+@@ -72,6 +110,50 @@
          // mutable reference will ever only be given out once at a time.
          let data = unsafe { &mut *self.data.get() };
 
@@ -2614,14 +2610,32 @@ diff -uNr 13_integrated_testing/src/synchronization.rs 14_exceptions_part2_perip
 +
 +        let data = unsafe { &mut *self.data.get() };
 +
-+        f(data)
-+    }
+         f(data)
+     }
 +
 +    fn read<R>(&self, f: impl FnOnce(&Self::Data) -> R) -> R {
 +        let data = unsafe { &*self.data.get() };
 +
-         f(data)
-     }
++        f(data)
++    }
++}
++
++//--------------------------------------------------------------------------------------------------
++// Testing
++//--------------------------------------------------------------------------------------------------
++
++#[cfg(test)]
++mod tests {
++    use super::*;
++    use test_macros::kernel_test;
++
++    /// InitStateLock must be transparent.
++    #[kernel_test]
++    fn init_state_lock_is_transparent() {
++        use core::mem::size_of;
++
++        assert_eq!(size_of::<InitStateLock<u64>>(), size_of::<u64>());
++    }
  }
 
 diff -uNr 13_integrated_testing/tests/03_exception_irq_sanity.rs 14_exceptions_part2_peripheral_IRQs/tests/03_exception_irq_sanity.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
index 42ba0519b..29e8125d7 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
@@ -17,6 +17,7 @@ use crate::{
     bsp, memory,
     memory::mmu::{translation_table::KernelTranslationTable, TranslationGranule},
 };
+use core::intrinsics::unlikely;
 use cortex_a::{barrier, regs::*};
 
 //--------------------------------------------------------------------------------------------------
@@ -33,15 +34,6 @@ struct MemoryManagementUnit;
 pub type Granule512MiB = TranslationGranule<{ 512 * 1024 * 1024 }>;
 pub type Granule64KiB = TranslationGranule<{ 64 * 1024 }>;
 
-/// The min supported address space size.
-pub const MIN_ADDR_SPACE_SIZE: usize = 1024 * 1024 * 1024; // 1 GiB
-
-/// The max supported address space size.
-pub const MAX_ADDR_SPACE_SIZE: usize = 32 * 1024 * 1024 * 1024; // 32 GiB
-
-/// The supported address space size granule.
-pub type AddrSpaceSizeGranule = Granule512MiB;
-
 /// Constants for indexing the MAIR_EL1.
 #[allow(dead_code)]
 pub mod mair {
@@ -66,6 +58,18 @@ static MMU: MemoryManagementUnit = MemoryManagementUnit;
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
+impl<const AS_SIZE: usize> memory::mmu::AddressSpace<AS_SIZE> {
+    /// Checks for architectural restrictions.
+    pub const fn arch_address_space_size_sanity_checks() {
+        // Size must be at least one full 512 MiB table.
+        assert!((AS_SIZE % Granule512MiB::SIZE) == 0);
+
+        // Check for 48 bit virtual address size as maximum, which is supported by any ARMv8
+        // version.
+        assert!(AS_SIZE <= (1 << 48));
+    }
+}
+
 impl MemoryManagementUnit {
     /// Setup function for the MAIR_EL1 register.
     fn set_up_mair(&self) {
@@ -82,19 +86,19 @@ impl MemoryManagementUnit {
 
     /// Configure various settings of stage 1 of the EL1 translation regime.
     fn configure_translation_control(&self) {
-        let ips = ID_AA64MMFR0_EL1.read(ID_AA64MMFR0_EL1::PARange);
-        let t0sz = (64 - bsp::memory::mmu::KernelAddrSpaceSize::SHIFT) as u64;
+        let t0sz = (64 - bsp::memory::mmu::KernelAddrSpace::SIZE_SHIFT) as u64;
 
         TCR_EL1.write(
-            TCR_EL1::TBI0::Ignored
-                + TCR_EL1::IPS.val(ips)
-                + TCR_EL1::EPD1::DisableTTBR1Walks
+            TCR_EL1::TBI0::Used
+                + TCR_EL1::IPS::Bits_40
                 + TCR_EL1::TG0::KiB_64
                 + TCR_EL1::SH0::Inner
                 + TCR_EL1::ORGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
                 + TCR_EL1::IRGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
                 + TCR_EL1::EPD0::EnableTTBR0Walks
-                + TCR_EL1::T0SZ.val(t0sz),
+                + TCR_EL1::A1::TTBR0
+                + TCR_EL1::T0SZ.val(t0sz)
+                + TCR_EL1::EPD1::DisableTTBR1Walks,
         );
     }
 }
@@ -111,22 +115,31 @@ pub fn mmu() -> &'static impl memory::mmu::interface::MMU {
 //------------------------------------------------------------------------------
 // OS Interface Code
 //------------------------------------------------------------------------------
+use memory::mmu::MMUEnableError;
 
 impl memory::mmu::interface::MMU for MemoryManagementUnit {
-    unsafe fn init(&self) -> Result<(), &'static str> {
-        // Fail early if translation granule is not supported. Both RPis support it, though.
-        if !ID_AA64MMFR0_EL1.matches_all(ID_AA64MMFR0_EL1::TGran64::Supported) {
-            return Err("Translation granule not supported in HW");
+    unsafe fn enable_mmu_and_caching(&self) -> Result<(), MMUEnableError> {
+        if unlikely(self.is_enabled()) {
+            return Err(MMUEnableError::AlreadyEnabled);
+        }
+
+        // Fail early if translation granule is not supported.
+        if unlikely(!ID_AA64MMFR0_EL1.matches_all(ID_AA64MMFR0_EL1::TGran64::Supported)) {
+            return Err(MMUEnableError::Other(
+                "Translation granule not supported in HW",
+            ));
         }
 
         // Prepare the memory attribute indirection register.
         self.set_up_mair();
 
         // Populate translation tables.
-        KERNEL_TABLES.populate_tt_entries()?;
+        KERNEL_TABLES
+            .populate_tt_entries()
+            .map_err(|e| MMUEnableError::Other(e))?;
 
         // Set the "Translation Table Base Register".
-        TTBR0_EL1.set_baddr(KERNEL_TABLES.base_address());
+        TTBR0_EL1.set_baddr(KERNEL_TABLES.phys_base_address());
 
         self.configure_translation_control();
 
@@ -143,6 +156,11 @@ impl memory::mmu::interface::MMU for MemoryManagementUnit {
 
         Ok(())
     }
+
+    #[inline(always)]
+    fn is_enabled(&self) -> bool {
+        SCTLR_EL1.matches_all(SCTLR_EL1::M::Enable)
+    }
 }
 
 //--------------------------------------------------------------------------------------------------
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs
index 337f9aedf..73a93ff73 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -87,8 +87,8 @@ register_bitfields! {u64,
         AttrIndx OFFSET(2) NUMBITS(3) [],
 
         TYPE     OFFSET(1) NUMBITS(1) [
-            Block = 0,
-            Table = 1
+            Reserved_Invalid = 0,
+            Page = 1
         ],
 
         VALID    OFFSET(0) NUMBITS(1) [
@@ -116,19 +116,19 @@ struct PageDescriptor {
     value: u64,
 }
 
-trait BaseAddr {
-    fn base_addr_u64(&self) -> u64;
-    fn base_addr_usize(&self) -> usize;
+trait StartAddr {
+    fn phys_start_addr_u64(&self) -> u64;
+    fn phys_start_addr_usize(&self) -> usize;
 }
 
-const NUM_LVL2_TABLES: usize = bsp::memory::mmu::KernelAddrSpaceSize::SIZE >> Granule512MiB::SHIFT;
+const NUM_LVL2_TABLES: usize = bsp::memory::mmu::KernelAddrSpace::SIZE >> Granule512MiB::SHIFT;
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
 /// Big monolithic struct for storing the translation tables. Individual levels must be 64 KiB
-/// aligned, hence the "reverse" order of appearance.
+/// aligned, so the lvl3 is put first.
 #[repr(C)]
 #[repr(align(65536))]
 pub struct FixedSizeTranslationTable<const NUM_TABLES: usize> {
@@ -146,12 +146,13 @@ pub type KernelTranslationTable = FixedSizeTranslationTable<NUM_LVL2_TABLES>;
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-impl<T, const N: usize> BaseAddr for [T; N] {
-    fn base_addr_u64(&self) -> u64 {
+// The binary is still identity mapped, so we don't need to convert here.
+impl<T, const N: usize> StartAddr for [T; N] {
+    fn phys_start_addr_u64(&self) -> u64 {
         self as *const T as u64
     }
 
-    fn base_addr_usize(&self) -> usize {
+    fn phys_start_addr_usize(&self) -> usize {
         self as *const _ as usize
     }
 }
@@ -165,14 +166,14 @@ impl TableDescriptor {
     }
 
     /// Create an instance pointing to the supplied address.
-    pub fn from_next_lvl_table_addr(next_lvl_table_addr: usize) -> Self {
+    pub fn from_next_lvl_table_addr(phys_next_lvl_table_addr: usize) -> Self {
         let val = InMemoryRegister::<u64, STAGE1_TABLE_DESCRIPTOR::Register>::new(0);
 
-        let shifted = next_lvl_table_addr >> Granule64KiB::SHIFT;
+        let shifted = phys_next_lvl_table_addr >> Granule64KiB::SHIFT;
         val.write(
-            STAGE1_TABLE_DESCRIPTOR::VALID::True
+            STAGE1_TABLE_DESCRIPTOR::NEXT_LEVEL_TABLE_ADDR_64KiB.val(shifted as u64)
                 + STAGE1_TABLE_DESCRIPTOR::TYPE::Table
-                + STAGE1_TABLE_DESCRIPTOR::NEXT_LEVEL_TABLE_ADDR_64KiB.val(shifted as u64),
+                + STAGE1_TABLE_DESCRIPTOR::VALID::True,
         );
 
         TableDescriptor { value: val.get() }
@@ -225,16 +226,16 @@ impl PageDescriptor {
     }
 
     /// Create an instance.
-    pub fn from_output_addr(output_addr: usize, attribute_fields: AttributeFields) -> Self {
+    pub fn from_output_addr(phys_output_addr: usize, attribute_fields: &AttributeFields) -> Self {
         let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
 
-        let shifted = output_addr as u64 >> Granule64KiB::SHIFT;
+        let shifted = phys_output_addr as u64 >> Granule64KiB::SHIFT;
         val.write(
-            STAGE1_PAGE_DESCRIPTOR::VALID::True
+            STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted)
                 + STAGE1_PAGE_DESCRIPTOR::AF::True
-                + attribute_fields.into()
-                + STAGE1_PAGE_DESCRIPTOR::TYPE::Table
-                + STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted),
+                + STAGE1_PAGE_DESCRIPTOR::TYPE::Page
+                + STAGE1_PAGE_DESCRIPTOR::VALID::True
+                + attribute_fields.clone().into(),
         );
 
         Self { value: val.get() }
@@ -247,10 +248,9 @@ impl PageDescriptor {
 
 impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
     /// Create an instance.
-    #[allow(clippy::assertions_on_constants)]
     pub const fn new() -> Self {
+        // Can't have a zero-sized address space.
         assert!(NUM_TABLES > 0);
-        assert!((bsp::memory::mmu::KernelAddrSpaceSize::SIZE % Granule512MiB::SIZE) == 0);
 
         Self {
             lvl3: [[PageDescriptor::new_zeroed(); 8192]; NUM_TABLES],
@@ -266,15 +266,15 @@ impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
     pub unsafe fn populate_tt_entries(&mut self) -> Result<(), &'static str> {
         for (l2_nr, l2_entry) in self.lvl2.iter_mut().enumerate() {
             *l2_entry =
-                TableDescriptor::from_next_lvl_table_addr(self.lvl3[l2_nr].base_addr_usize());
+                TableDescriptor::from_next_lvl_table_addr(self.lvl3[l2_nr].phys_start_addr_usize());
 
             for (l3_nr, l3_entry) in self.lvl3[l2_nr].iter_mut().enumerate() {
                 let virt_addr = (l2_nr << Granule512MiB::SHIFT) + (l3_nr << Granule64KiB::SHIFT);
 
-                let (output_addr, attribute_fields) =
+                let (phys_output_addr, attribute_fields) =
                     bsp::memory::mmu::virt_mem_layout().virt_addr_properties(virt_addr)?;
 
-                *l3_entry = PageDescriptor::from_output_addr(output_addr, attribute_fields);
+                *l3_entry = PageDescriptor::from_output_addr(phys_output_addr, &attribute_fields);
             }
         }
 
@@ -282,8 +282,8 @@ impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
     }
 
     /// The translation table's base address to be used for programming the MMU.
-    pub fn base_address(&self) -> u64 {
-        self.lvl2.base_addr_u64()
+    pub fn phys_base_address(&self) -> u64 {
+        self.lvl2.phys_start_addr_u64()
     }
 }
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
index 451d927b6..0ccfae002 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
@@ -12,8 +12,8 @@ use core::ops::RangeInclusive;
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
-/// The address space size chosen by this BSP.
-pub type KernelAddrSpaceSize = AddressSpaceSize<{ memory_map::END_INCLUSIVE + 1 }>;
+/// The kernel's address space defined by this BSP.
+pub type KernelAddrSpace = AddressSpace<{ memory_map::END_INCLUSIVE + 1 }>;
 
 const NUM_MEM_RANGES: usize = 2;
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/main.rs b/14_exceptions_part2_peripheral_IRQs/src/main.rs
index 6a21c8d41..0bd9f71dd 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/main.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/main.rs
@@ -19,7 +19,7 @@ use libkernel::{bsp, cpu, driver, exception, info, memory, state, time, warn};
 ///
 /// - Only a single core must be active and running this function.
 /// - The init calls in this function must appear in the correct order:
-///     - Virtual memory must be activated before the device drivers.
+///     - Caching must be activated before the device drivers.
 ///       - Without it, any atomic operations, e.g. the yet-to-be-introduced spinlocks in the device
 ///         drivers (which currently employ IRQSafeNullLocks instead of spinlocks), will fail to
 ///         work on the RPi SoCs.
@@ -30,7 +30,7 @@ unsafe fn kernel_init() -> ! {
 
     exception::handling_init();
 
-    if let Err(string) = memory::mmu::mmu().init() {
+    if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
         panic!("MMU: {}", string);
     }
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs b/14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs
index cca2951aa..ec4ca0748 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs
@@ -31,8 +31,17 @@ pub use arch_mmu::mmu;
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
+/// MMU enable errors variants.
+#[allow(missing_docs)]
+#[derive(Debug)]
+pub enum MMUEnableError {
+    AlreadyEnabled,
+    Other(&'static str),
+}
+
 /// Memory Management interfaces.
 pub mod interface {
+    use super::*;
 
     /// MMU functions.
     pub trait MMU {
@@ -42,15 +51,18 @@ pub mod interface {
         /// # Safety
         ///
         /// - Changes the HW's global state.
-        unsafe fn init(&self) -> Result<(), &'static str>;
+        unsafe fn enable_mmu_and_caching(&self) -> Result<(), MMUEnableError>;
+
+        /// Returns true if the MMU is enabled, false otherwise.
+        fn is_enabled(&self) -> bool;
     }
 }
 
 /// Describes the characteristics of a translation granule.
 pub struct TranslationGranule<const GRANULE_SIZE: usize>;
 
-/// Describes the size of an address space.
-pub struct AddressSpaceSize<const AS_SIZE: usize>;
+/// Describes properties of an address space.
+pub struct AddressSpace<const AS_SIZE: usize>;
 
 /// Architecture agnostic translation types.
 #[allow(missing_docs)]
@@ -107,6 +119,15 @@ pub struct KernelVirtualLayout<const NUM_SPECIAL_RANGES: usize> {
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
+impl fmt::Display for MMUEnableError {
+    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+        match self {
+            MMUEnableError::AlreadyEnabled => write!(f, "MMU is already enabled"),
+            MMUEnableError::Other(x) => write!(f, "{}", x),
+        }
+    }
+}
+
 impl<const GRANULE_SIZE: usize> TranslationGranule<GRANULE_SIZE> {
     /// The granule's size.
     pub const SIZE: usize = Self::size_checked();
@@ -121,22 +142,18 @@ impl<const GRANULE_SIZE: usize> TranslationGranule<GRANULE_SIZE> {
     }
 }
 
-impl<const AS_SIZE: usize> AddressSpaceSize<AS_SIZE> {
+impl<const AS_SIZE: usize> AddressSpace<AS_SIZE> {
     /// The address space size.
     pub const SIZE: usize = Self::size_checked();
 
     /// The address space shift, aka log2(size).
-    pub const SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
+    pub const SIZE_SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
 
     const fn size_checked() -> usize {
         assert!(AS_SIZE.is_power_of_two());
-        assert!(arch_mmu::MIN_ADDR_SPACE_SIZE.is_power_of_two());
-        assert!(arch_mmu::MAX_ADDR_SPACE_SIZE.is_power_of_two());
 
-        // Must adhere to architectural restrictions.
-        assert!(AS_SIZE >= arch_mmu::MIN_ADDR_SPACE_SIZE);
-        assert!(AS_SIZE <= arch_mmu::MAX_ADDR_SPACE_SIZE);
-        assert!((AS_SIZE % arch_mmu::AddrSpaceSizeGranule::SIZE) == 0);
+        // Check for architectural restrictions as well.
+        Self::arch_address_space_size_sanity_checks();
 
         AS_SIZE
     }
diff --git a/14_exceptions_part2_peripheral_IRQs/src/synchronization.rs b/14_exceptions_part2_peripheral_IRQs/src/synchronization.rs
index fe9d454a8..94582732c 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/synchronization.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/synchronization.rs
@@ -139,3 +139,21 @@ impl<T> interface::ReadWriteEx for InitStateLock<T> {
         f(data)
     }
 }
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// InitStateLock must be transparent.
+    #[kernel_test]
+    fn init_state_lock_is_transparent() {
+        use core::mem::size_of;
+
+        assert_eq!(size_of::<InitStateLock<u64>>(), size_of::<u64>());
+    }
+}
diff --git a/14_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs b/14_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs
index 185089a3d..f1535d34c 100644
--- a/14_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs
+++ b/14_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs
@@ -29,7 +29,7 @@ unsafe fn kernel_init() -> ! {
     println!("Testing synchronous exception handling by causing a page fault");
     println!("-------------------------------------------------------------------\n");
 
-    if let Err(string) = memory::mmu::mmu().init() {
+    if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
         println!("MMU: {}", string);
         cpu::qemu_exit_failure()
     }
diff --git a/15_virtual_mem_part2_mmio_remap/README.md b/15_virtual_mem_part2_mmio_remap/README.md
index 53eb8047f..ec117146f 100644
--- a/15_virtual_mem_part2_mmio_remap/README.md
+++ b/15_virtual_mem_part2_mmio_remap/README.md
@@ -16,7 +16,7 @@
 - [Introduction](#introduction)
 - [Implementation](#implementation)
   - [A New Mapping API in `src/memory/mmu.rs`](#a-new-mapping-api-in-srcmemorymmutranslationtablers)
-  - [Using the new API in `bsp` code and drivers](#using-the-new-api-in-bsp-code-and-drivers)
+  - [The new APIs in action](#the-new-apis-in-action)
   - [Additional Changes](#additional-changes)
 - [Test it](#test-it)
 - [Diff to previous](#diff-to-previous)
@@ -56,16 +56,16 @@ separation, this tutorial makes a start by changing the following things:
 
 1. Instead of bulk-`identity mapping` the whole of the board's address space, only the particular
    parts that are needed will be mapped.
-1. For now, the `kernel binary` stays identity mapped. This will be changed in the next tutorial as
-   it is a quite difficult and peculiar exercise to remap the kernel.
+1. For now, the `kernel binary` stays identity mapped. This will be changed in the in the coming
+   tutorials as it is a quite difficult and peculiar exercise to remap the kernel.
 1. Device `MMIO regions` are lazily remapped during the device driver's `init()`.
    1. The remappings will populate the top of the virtual address space. In the `AArch64 MMU
       Driver`, we provide the top `256 MiB` for it.
    1. It is possible to define the size of the virtual address space at compile time. We chose `8
       GiB` for now, which means remapped MMIO virtual addresses will start at `7936 MiB`
-      (`0x1F0000000`).
-1. We keep using `TTBR0` for the kernel page tables for now. This will be changed when we remap the
-   `kernel binary` in the next tutorial.
+      (`0x1_f000_0000`).
+1. We keep using `TTBR0` for the kernel translation tables for now. This will be changed when we
+   remap the `kernel binary` in the coming tutorials.
 
 [ARM Cortex-A Series Programmer’s Guide for ARMv8-A]: https://developer.arm.com/documentation/den0024/latest/
 [higher half kernel]: https://wiki.osdev.org/Higher_Half_Kernel
@@ -80,10 +80,11 @@ kernel code** (`src/memory/**`).
 The way it worked was that the `architectural MMU code` would query the `bsp code` about the start
 and end of the physical address space, and any special regions in this space that need a mapping
 that _is not_ normal chacheable DRAM. It would then go ahead and map the whole address space at once
-and never touch the page tables again during runtime.
+and never touch the translation tables again during runtime.
 
-Changing in this tutorial, **architecture** and **bsp** code will no longer talk to each other
-directly. Instead, this is decoupled now through the kernel's **generic MMU subsystem code**.
+Changing in this tutorial, **architecture** and **bsp** code will no longer autonomously create the
+virtual memory mappings. Instead, this is now orchestrated by the kernel's **generic MMU subsystem
+code**.
 
 ### A New Mapping API in `src/memory/mmu/translation_table.rs`
 
@@ -93,7 +94,7 @@ First, we define an interface for operating on `translation tables`:
 /// Translation table operations.
 pub trait TranslationTable {
     /// Anything that needs to run before any of the other provided functions can be used.
-    unsafe fn init(&mut self);
+    fn init(&mut self);
 
     /// The translation table's base address to be used for programming the MMU.
     fn phys_base_address(&self) -> Address<Physical>;
@@ -107,12 +108,6 @@ pub trait TranslationTable {
     ) -> Result<(), &'static str>;
 
     /// Obtain a free virtual page slice in the MMIO region.
-    ///
-    /// The "MMIO region" is a distinct region of the implementor's choice, which allows
-    /// differentiating MMIO addresses from others. This can speed up debugging efforts.
-    /// Ideally, those MMIO addresses are also standing out visually so that a human eye can
-    /// identify them. For example, by allocating them from near the end of the virtual address
-    /// space.
     fn next_mmio_virt_page_slice(
         &mut self,
         num_pages: usize,
@@ -123,11 +118,49 @@ pub trait TranslationTable {
 }
 ```
 
-The MMU driver (`src/_arch/_/memory/mmu.rs`) has one global instance for the kernel tables which
-implements this interface, and which can be accessed by calling
-`arch_mmu::kernel_translation_tables()` in the generic kernel code (`src/memory/mmu.rs`). From
-there, we provide a couple of memory mapping functions that wrap around this interface , and which
-are exported for the rest of the kernel to use:
+In order to enable the generic kernel code to manipulate the kernel's translation tables, they must
+first be made accessible. Until now, they were just a "hidden" struct in the `architectural` MMU
+driver (`src/arch/.../memory/mmu.rs`). This made sense because the MMU driver code was the only code
+that needed to be concerned with the table data structure, so having it accessible locally
+simplified things.
+
+Since the tables need to be exposed to the rest of the kernel code now, it makes sense to move them
+to `BSP` code. Because ultimately, it is the `BSP` that is defining the translation table's
+properties, such as the size of the virtual address space that the tables need to cover.
+
+They are now defined in the global instances region of `src/bsp/.../memory/mmu.rs`. To control
+access, they are  guarded by an `InitStateLock`.
+
+```rust
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+/// The kernel translation tables.
+static KERNEL_TABLES: InitStateLock<KernelTranslationTable> =
+    InitStateLock::new(KernelTranslationTable::new());
+```
+
+The struct `KernelTranslationTable` is a type alias defined in the same file, which in turn gets its
+definition from an associated type of type `KernelVirtAddrSpace`, which itself is a type alias of
+`memory::mmu::AddressSpace`. I know this sounds horribly complicated, but in the end this is just
+some layers of `const generics` whose implementation is scattered between `generic` and `arch` code.
+This is done to (1) ensure a sane compile-time definition of the translation table struct (by doing
+various bounds checks), and (2) to separate concerns between generic `MMU` code and specializations
+that come from the `architectural` part.
+
+In the end, these tables can be accessed by calling `bsp::memory::mmu::kernel_translation_tables()`:
+
+```rust
+/// Return a reference to the kernel's translation tables.
+pub fn kernel_translation_tables() -> &'static InitStateLock<KernelTranslationTable> {
+    &KERNEL_TABLES
+}
+```
+
+Finally, the generic kernel code (`src/memory/mmu.rs`) now provides a couple of memory mapping
+functions that access and manipulate this instance. They  are exported for the rest of the kernel to
+use:
 
 ```rust
 /// Raw mapping of virtual to physical pages in the kernel translation tables.
@@ -135,8 +168,8 @@ are exported for the rest of the kernel to use:
 /// Prevents mapping into the MMIO range of the tables.
 pub unsafe fn kernel_map_pages_at(
     name: &'static str,
-    phys_pages: &PageSliceDescriptor<Physical>,
     virt_pages: &PageSliceDescriptor<Virtual>,
+    phys_pages: &PageSliceDescriptor<Physical>,
     attr: &AttributeFields,
 ) -> Result<(), &'static str>;
 
@@ -148,20 +181,39 @@ pub unsafe fn kernel_map_mmio(
     phys_mmio_descriptor: &MMIODescriptor<Physical>,
 ) -> Result<Address<Virtual>, &'static str>;
 
-/// Map the kernel's binary and enable the MMU.
-pub unsafe fn kernel_map_binary_and_enable_mmu() -> Result<(), &'static str> ;
+/// Map the kernel's binary. Returns the translation table's base address.
+pub unsafe fn kernel_map_binary() -> Result<Address<Physical>, &'static str>;
+
+/// Enable the MMU and data + instruction caching.
+pub unsafe fn enable_mmu_and_caching(
+    phys_tables_base_addr: Address<Physical>,
+) -> Result<(), MMUEnableError>;
 ```
 
-### Using the new API in `bsp` code and drivers
+### The new APIs in action
+
+`kernel_map_binary()` and `enable_mmu_and_caching()` are used early in `kernel_init()` to set up
+virtual memory:
+
+```rust
+let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
+    Err(string) => panic!("Error mapping kernel binary: {}", string),
+    Ok(addr) => addr,
+};
+
+if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
+    panic!("Enabling MMU failed: {}", e);
+}
+```
 
-For now, there are two places where the new API is used. First, in `src/bsp/_/memory/mmu.rs`, which
-provides a dedicated call to **map the kernel binary** (because it is the `BSP` that provides the
-`linker script`, which in turn defines the final layout of the kernel in memory):
+Both functions internally use `bsp` and `arch` specific code to achieve their goals. For example,
+`memory::mmu::kernel_map_binary()` itself wraps around a `bsp` function of the same name
+(`bsp::memory::mmu::kernel_map_binary()`):
 
 ```rust
 /// Map the kernel binary.
 pub unsafe fn kernel_map_binary() -> Result<(), &'static str> {
-    kernel_mmu::kernel_map_pages_at(
+    generic_mmu::kernel_map_pages_at(
         "Kernel boot-core stack",
         &virt_stack_page_desc(),
         &phys_stack_page_desc(),
@@ -172,12 +224,12 @@ pub unsafe fn kernel_map_binary() -> Result<(), &'static str> {
         },
     )?;
 
-    kernel_mmu::kernel_map_pages_at(
+    generic_mmu::kernel_map_pages_at(
         "Kernel code and RO data",
         // omitted for brevity.
     )?;
 
-    kernel_mmu::kernel_map_pages_at(
+    generic_mmu::kernel_map_pages_at(
         "Kernel data and bss",
         // omitted for brevity.
     )?;
@@ -186,8 +238,8 @@ pub unsafe fn kernel_map_binary() -> Result<(), &'static str> {
 }
 ```
 
-Second, in device drivers, which now expect an `MMIODescriptor` type instead of a raw address. The
-following is an example for the `UART`:
+Another user of the new APIs are device drivers, which now expect an `MMIODescriptor` type instead
+of a raw address. The following is an example for the `UART`:
 
 ```rust
 impl PL011Uart {
@@ -234,7 +286,7 @@ through them:
 ## Test it
 
 When you load the kernel, you can now see that the driver's MMIO virtual addresses start at
-`0x1F0000000`:
+`0x1_f000_0000`:
 
 Raspberry Pi 3:
 
@@ -254,21 +306,21 @@ Minipush 1.0
            Raspberry Pi 3
 
 [ML] Requesting binary
-[MP] ⏩ Pushing 67 KiB ========================================🦀 100% 33 KiB/s Time: 00:00:02
+[MP] ⏩ Pushing 67 KiB =========================================🦀 100% 0 KiB/s Time: 00:00:00
 [ML] Loaded! Executing the payload now
 
-[    3.064756] Booting on: Raspberry Pi 3
-[    3.065839] MMU online:
-[    3.067010]       -----------------------------------------------------------------------------------------------------------------
-[    3.072868]               Virtual                      Physical            Size       Attr                    Entity
-[    3.078725]       -----------------------------------------------------------------------------------------------------------------
-[    3.084585]       0x000070000..0x00007FFFF --> 0x000070000..0x00007FFFF |  64 KiB | C   RW XN | Kernel boot-core stack
-[    3.089877]       0x000080000..0x00008FFFF --> 0x000080000..0x00008FFFF |  64 KiB | C   RO X  | Kernel code and RO data
-[    3.095213]       0x000090000..0x0001BFFFF --> 0x000090000..0x0001BFFFF |   1 MiB | C   RW XN | Kernel data and bss
-[    3.100376]       0x1F0000000..0x1F000FFFF --> 0x03F200000..0x03F20FFFF |  64 KiB | Dev RW XN | BCM GPIO
-[    3.105060]                                                                                   | BCM PL011 UART
-[    3.110008]       0x1F0010000..0x1F001FFFF --> 0x03F000000..0x03F00FFFF |  64 KiB | Dev RW XN | BCM Peripheral Interrupt Controller
-[    3.115863]       -----------------------------------------------------------------------------------------------------------------
+[    0.786819] Booting on: Raspberry Pi 3
+[    0.787092] MMU online:
+[    0.787384]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    0.789128]                         Virtual                                   Physical               Size       Attr                    Entity
+[    0.790873]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    0.792618]       0x0000_0000_0007_0000..0x0000_0000_0007_ffff --> 0x00_0007_0000..0x00_0007_ffff |  64 KiB | C   RW XN | Kernel boot-core stack
+[    0.794221]       0x0000_0000_0008_0000..0x0000_0000_0008_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
+[    0.795835]       0x0000_0000_0009_0000..0x0000_0000_001b_ffff --> 0x00_0009_0000..0x00_001b_ffff |   1 MiB | C   RW XN | Kernel data and bss
+[    0.797406]       0x0000_0001_f000_0000..0x0000_0001_f000_ffff --> 0x00_3f20_0000..0x00_3f20_ffff |  64 KiB | Dev RW XN | BCM GPIO
+[    0.798857]                                                                                                             | BCM PL011 UART
+[    0.800374]       0x0000_0001_f001_0000..0x0000_0001_f001_ffff --> 0x00_3f00_0000..0x00_3f00_ffff |  64 KiB | Dev RW XN | BCM Peripheral Interrupt Controller
+[    0.802117]       -------------------------------------------------------------------------------------------------------------------------------------------
 ```
 
 Raspberry Pi 4:
@@ -289,22 +341,22 @@ Minipush 1.0
            Raspberry Pi 4
 
 [ML] Requesting binary
-[MP] ⏩ Pushing 74 KiB ========================================🦀 100% 24 KiB/s Time: 00:00:03
+[MP] ⏩ Pushing 74 KiB =========================================🦀 100% 0 KiB/s Time: 00:00:00
 [ML] Loaded! Executing the payload now
 
-[    3.379342] Booting on: Raspberry Pi 4
-[    3.379731] MMU online:
-[    3.380902]       -----------------------------------------------------------------------------------------------------------------
-[    3.386759]               Virtual                      Physical            Size       Attr                    Entity
-[    3.392616]       -----------------------------------------------------------------------------------------------------------------
-[    3.398475]       0x000070000..0x00007FFFF --> 0x000070000..0x00007FFFF |  64 KiB | C   RW XN | Kernel boot-core stack
-[    3.403768]       0x000080000..0x00008FFFF --> 0x000080000..0x00008FFFF |  64 KiB | C   RO X  | Kernel code and RO data
-[    3.409104]       0x000090000..0x0001BFFFF --> 0x000090000..0x0001BFFFF |   1 MiB | C   RW XN | Kernel data and bss
-[    3.414267]       0x1F0000000..0x1F000FFFF --> 0x0FE200000..0x0FE20FFFF |  64 KiB | Dev RW XN | BCM GPIO
-[    3.418951]                                                                                   | BCM PL011 UART
-[    3.423898]       0x1F0010000..0x1F001FFFF --> 0x0FF840000..0x0FF84FFFF |  64 KiB | Dev RW XN | GICD
-[    3.428409]                                                                                   | GICC
-[    3.432921]       -----------------------------------------------------------------------------------------------------------------
+[    0.853908] Booting on: Raspberry Pi 4
+[    0.854007] MMU online:
+[    0.854299]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    0.856043]                         Virtual                                   Physical               Size       Attr                    Entity
+[    0.857788]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    0.859533]       0x0000_0000_0007_0000..0x0000_0000_0007_ffff --> 0x00_0007_0000..0x00_0007_ffff |  64 KiB | C   RW XN | Kernel boot-core stack
+[    0.861137]       0x0000_0000_0008_0000..0x0000_0000_0008_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
+[    0.862750]       0x0000_0000_0009_0000..0x0000_0000_001b_ffff --> 0x00_0009_0000..0x00_001b_ffff |   1 MiB | C   RW XN | Kernel data and bss
+[    0.864321]       0x0000_0001_f000_0000..0x0000_0001_f000_ffff --> 0x00_fe20_0000..0x00_fe20_ffff |  64 KiB | Dev RW XN | BCM GPIO
+[    0.865772]                                                                                                             | BCM PL011 UART
+[    0.867289]       0x0000_0001_f001_0000..0x0000_0001_f001_ffff --> 0x00_ff84_0000..0x00_ff84_ffff |  64 KiB | Dev RW XN | GICD
+[    0.868697]                                                                                                             | GICC
+[    0.870105]       -------------------------------------------------------------------------------------------------------------------------------------------
 ```
 
 ## Diff to previous
@@ -338,74 +390,82 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
 +            arch_mmu::{Granule512MiB, Granule64KiB},
 +            AccessPermissions, AttributeFields, MemAttributes, Page, PageSliceDescriptor,
 +        },
-+        Address, AddressType, Physical, Virtual,
++        Address, Physical, Virtual,
      },
  };
  use core::convert;
-@@ -117,11 +120,11 @@
+@@ -117,12 +120,9 @@
  }
 
- trait BaseAddr {
--    fn base_addr_u64(&self) -> u64;
--    fn base_addr_usize(&self) -> usize;
-+    fn phys_base_addr(&self) -> Address<Physical>;
+ trait StartAddr {
+-    fn phys_start_addr_u64(&self) -> u64;
+-    fn phys_start_addr_usize(&self) -> usize;
++    fn phys_start_addr(&self) -> Address<Physical>;
  }
 
--const NUM_LVL2_TABLES: usize = bsp::memory::mmu::KernelAddrSpaceSize::SIZE >> Granule512MiB::SHIFT;
-+const NUM_LVL2_TABLES: usize =
-+    bsp::memory::mmu::KernelVirtAddrSpaceSize::SIZE >> Granule512MiB::SHIFT;
-
+-const NUM_LVL2_TABLES: usize = bsp::memory::mmu::KernelAddrSpace::SIZE >> Granule512MiB::SHIFT;
+-
  //--------------------------------------------------------------------------------------------------
  // Public Definitions
-@@ -137,6 +140,12 @@
+ //--------------------------------------------------------------------------------------------------
+@@ -137,10 +137,13 @@
 
      /// Table descriptors, covering 512 MiB windows.
      lvl2: [TableDescriptor; NUM_TABLES],
-+
+-}
+
+-/// A translation table type for the kernel space.
+-pub type KernelTranslationTable = FixedSizeTranslationTable<NUM_LVL2_TABLES>;
 +    /// Index of the next free MMIO page.
 +    cur_l3_mmio_index: usize,
 +
 +    /// Have the tables been initialized?
 +    initialized: bool,
- }
++}
 
- /// A translation table type for the kernel space.
-@@ -147,12 +156,9 @@
  //--------------------------------------------------------------------------------------------------
+ // Private Code
+@@ -148,12 +151,8 @@
 
- impl<T, const N: usize> BaseAddr for [T; N] {
--    fn base_addr_u64(&self) -> u64 {
+ // The binary is still identity mapped, so we don't need to convert here.
+ impl<T, const N: usize> StartAddr for [T; N] {
+-    fn phys_start_addr_u64(&self) -> u64 {
 -        self as *const T as u64
 -    }
 -
--    fn base_addr_usize(&self) -> usize {
+-    fn phys_start_addr_usize(&self) -> usize {
 -        self as *const _ as usize
-+    fn phys_base_addr(&self) -> Address<Physical> {
-+        // The binary is still identity mapped, so we don't need to convert here.
++    fn phys_start_addr(&self) -> Address<Physical> {
 +        Address::new(self as *const _ as usize)
      }
  }
 
-@@ -225,20 +231,29 @@
+@@ -166,10 +165,10 @@
+     }
+
+     /// Create an instance pointing to the supplied address.
+-    pub fn from_next_lvl_table_addr(phys_next_lvl_table_addr: usize) -> Self {
++    pub fn from_next_lvl_table_addr(phys_next_lvl_table_addr: Address<Physical>) -> Self {
+         let val = InMemoryRegister::<u64, STAGE1_TABLE_DESCRIPTOR::Register>::new(0);
+
+-        let shifted = phys_next_lvl_table_addr >> Granule64KiB::SHIFT;
++        let shifted = phys_next_lvl_table_addr.into_usize() >> Granule64KiB::SHIFT;
+         val.write(
+             STAGE1_TABLE_DESCRIPTOR::NEXT_LEVEL_TABLE_ADDR_64KiB.val(shifted as u64)
+                 + STAGE1_TABLE_DESCRIPTOR::TYPE::Table
+@@ -226,7 +225,10 @@
      }
 
      /// Create an instance.
--    pub fn from_output_addr(output_addr: usize, attribute_fields: AttributeFields) -> Self {
+-    pub fn from_output_addr(phys_output_addr: usize, attribute_fields: &AttributeFields) -> Self {
 +    pub fn from_output_addr(
-+        output_addr: *const Page<Physical>,
++        phys_output_addr: *const Page<Physical>,
 +        attribute_fields: &AttributeFields,
 +    ) -> Self {
          let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
 
-         let shifted = output_addr as u64 >> Granule64KiB::SHIFT;
-         val.write(
-             STAGE1_PAGE_DESCRIPTOR::VALID::True
-                 + STAGE1_PAGE_DESCRIPTOR::AF::True
--                + attribute_fields.into()
-+                + attribute_fields.clone().into()
-                 + STAGE1_PAGE_DESCRIPTOR::TYPE::Table
-                 + STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted),
-         );
+         let shifted = phys_output_addr as u64 >> Granule64KiB::SHIFT;
+@@ -240,50 +242,193 @@
 
          Self { value: val.get() }
      }
@@ -418,21 +478,29 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -246,44 +261,172 @@
+ // Public Code
  //--------------------------------------------------------------------------------------------------
 
++impl<const AS_SIZE: usize> memory::mmu::AssociatedTranslationTable
++    for memory::mmu::AddressSpace<AS_SIZE>
++where
++    [u8; Self::SIZE >> Granule512MiB::SHIFT]: Sized,
++{
++    type TableStartFromBottom = FixedSizeTranslationTable<{ Self::SIZE >> Granule512MiB::SHIFT }>;
++}
++
  impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
 +    // Reserve the last 256 MiB of the address space for MMIO mappings.
 +    const L2_MMIO_START_INDEX: usize = NUM_TABLES - 1;
 +    const L3_MMIO_START_INDEX: usize = 8192 / 2;
 +
      /// Create an instance.
-     #[allow(clippy::assertions_on_constants)]
++    #[allow(clippy::assertions_on_constants)]
      pub const fn new() -> Self {
 +        assert!(bsp::memory::mmu::KernelGranule::SIZE == Granule64KiB::SIZE);
++
+         // Can't have a zero-sized address space.
          assert!(NUM_TABLES > 0);
--        assert!((bsp::memory::mmu::KernelAddrSpaceSize::SIZE modulo Granule512MiB::SIZE) == 0);
-+        assert!((bsp::memory::mmu::KernelVirtAddrSpaceSize::SIZE modulo Granule512MiB::SIZE) == 0);
 
          Self {
              lvl3: [[PageDescriptor::new_zeroed(); 8192]; NUM_TABLES],
@@ -450,10 +518,10 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
 -    pub unsafe fn populate_tt_entries(&mut self) -> Result<(), &'static str> {
 -        for (l2_nr, l2_entry) in self.lvl2.iter_mut().enumerate() {
 -            *l2_entry =
--                TableDescriptor::from_next_lvl_table_addr(self.lvl3[l2_nr].base_addr_usize());
+-                TableDescriptor::from_next_lvl_table_addr(self.lvl3[l2_nr].phys_start_addr_usize());
 +    /// The start address of the table's MMIO range.
 +    #[inline(always)]
-+    const fn mmio_start_addr(&self) -> Address<Virtual> {
++    fn mmio_start_addr(&self) -> Address<Virtual> {
 +        Address::new(
 +            (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
 +                | (Self::L3_MMIO_START_INDEX << Granule64KiB::SHIFT),
@@ -462,7 +530,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
 +
 +    /// The inclusive end address of the table's MMIO range.
 +    #[inline(always)]
-+    const fn mmio_end_addr_inclusive(&self) -> Address<Virtual> {
++    fn mmio_end_addr_inclusive(&self) -> Address<Virtual> {
 +        Address::new(
 +            (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
 +                | (8191 << Granule64KiB::SHIFT)
@@ -472,12 +540,13 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
 +
 +    /// Helper to calculate the lvl2 and lvl3 indices from an address.
 +    #[inline(always)]
-+    fn lvl2_lvl3_index_from<ATYPE: AddressType>(
++    fn lvl2_lvl3_index_from(
 +        &self,
-+        addr: *const Page<ATYPE>,
++        addr: *const Page<Virtual>,
 +    ) -> Result<(usize, usize), &'static str> {
-+        let lvl2_index = addr as usize >> Granule512MiB::SHIFT;
-+        let lvl3_index = (addr as usize & Granule512MiB::MASK) >> Granule64KiB::SHIFT;
++        let addr = addr as usize;
++        let lvl2_index = addr >> Granule512MiB::SHIFT;
++        let lvl3_index = (addr & Granule512MiB::MASK) >> Granule64KiB::SHIFT;
 +
 +        if lvl2_index > (NUM_TABLES - 1) {
 +            return Err("Virtual page is out of bounds of translation table");
@@ -501,36 +570,32 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
 +//------------------------------------------------------------------------------
 +// OS Interface Code
 +//------------------------------------------------------------------------------
-+
+
+-            for (l3_nr, l3_entry) in self.lvl3[l2_nr].iter_mut().enumerate() {
+-                let virt_addr = (l2_nr << Granule512MiB::SHIFT) + (l3_nr << Granule64KiB::SHIFT);
 +impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::TranslationTable
 +    for FixedSizeTranslationTable<NUM_TABLES>
 +{
-+    unsafe fn init(&mut self) {
++    fn init(&mut self) {
 +        if self.initialized {
 +            return;
 +        }
-
--            for (l3_nr, l3_entry) in self.lvl3[l2_nr].iter_mut().enumerate() {
--                let virt_addr = (l2_nr << Granule512MiB::SHIFT) + (l3_nr << Granule64KiB::SHIFT);
++
 +        // Populate the l2 entries.
 +        for (lvl2_nr, lvl2_entry) in self.lvl2.iter_mut().enumerate() {
-+            let desc = TableDescriptor::from_next_lvl_table_addr(
-+                self.lvl3[lvl2_nr].phys_base_addr().into_usize(),
-+            );
++            let desc =
++                TableDescriptor::from_next_lvl_table_addr(self.lvl3[lvl2_nr].phys_start_addr());
 +            *lvl2_entry = desc;
 +        }
 +
 +        self.cur_l3_mmio_index = Self::L3_MMIO_START_INDEX;
 +        self.initialized = true;
 +    }
-
--                let (output_addr, attribute_fields) =
--                    bsp::memory::mmu::virt_mem_layout().virt_addr_properties(virt_addr)?;
++
 +    fn phys_base_address(&self) -> Address<Physical> {
-+        self.lvl2.phys_base_addr()
++        self.lvl2.phys_start_addr()
 +    }
-
--                *l3_entry = PageDescriptor::from_output_addr(output_addr, attribute_fields);
++
 +    unsafe fn map_pages_at(
 +        &mut self,
 +        virt_pages: &PageSliceDescriptor<Virtual>,
@@ -542,15 +607,18 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
 +        let p = phys_pages.as_slice();
 +        let v = virt_pages.as_slice();
 +
-+        if p.len() != v.len() {
-+            return Err("Tried to map page slices with unequal sizes");
-+        }
-+
 +        // No work to do for empty slices.
-+        if p.is_empty() {
++        if v.is_empty() {
 +            return Ok(());
 +        }
-+
+
+-                let (phys_output_addr, attribute_fields) =
+-                    bsp::memory::mmu::virt_mem_layout().virt_addr_properties(virt_addr)?;
++        if v.len() != p.len() {
++            return Err("Tried to map page slices with unequal sizes");
++        }
+
+-                *l3_entry = PageDescriptor::from_output_addr(phys_output_addr, &attribute_fields);
 +        if p.last().unwrap().as_ptr() >= bsp::memory::mmu::phys_addr_space_end_page() {
 +            return Err("Tried to map outside of physical address space");
 +        }
@@ -569,8 +637,8 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
      }
 
 -    /// The translation table's base address to be used for programming the MMU.
--    pub fn base_address(&self) -> u64 {
--        self.lvl2.base_addr_u64()
+-    pub fn phys_base_address(&self) -> u64 {
+-        self.lvl2.phys_start_addr_u64()
 +    fn next_mmio_virt_page_slice(
 +        &mut self,
 +        num_pages: usize,
@@ -585,14 +653,13 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
 +            return Err("Not enough MMIO space left");
 +        }
 +
-+        let addr = (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
-+            | (self.cur_l3_mmio_index << Granule64KiB::SHIFT);
++        let addr = Address::new(
++            (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
++                | (self.cur_l3_mmio_index << Granule64KiB::SHIFT),
++        );
 +        self.cur_l3_mmio_index += num_pages;
 +
-+        Ok(PageSliceDescriptor::from_addr(
-+            Address::new(addr),
-+            num_pages,
-+        ))
++        Ok(PageSliceDescriptor::from_addr(addr, num_pages))
 +    }
 +
 +    fn is_virt_page_slice_mmio(&self, virt_pages: &PageSliceDescriptor<Virtual>) -> bool {
@@ -609,11 +676,11 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
      }
  }
 
-@@ -292,6 +435,9 @@
+@@ -292,6 +437,9 @@
  //--------------------------------------------------------------------------------------------------
 
  #[cfg(test)]
-+pub type MinSizeKernelTranslationTable = FixedSizeTranslationTable<1>;
++pub type MinSizeTranslationTable = FixedSizeTranslationTable<1>;
 +
 +#[cfg(test)]
  mod tests {
@@ -623,93 +690,88 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
 diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
 --- 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
 +++ 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
-@@ -15,7 +15,11 @@
+@@ -15,7 +15,7 @@
 
  use crate::{
      bsp, memory,
 -    memory::mmu::{translation_table::KernelTranslationTable, TranslationGranule},
-+    memory::{
-+        mmu::{translation_table::KernelTranslationTable, TranslationGranule},
-+        Address, Physical,
-+    },
-+    synchronization::InitStateLock,
++    memory::{mmu::TranslationGranule, Address, Physical},
  };
+ use core::intrinsics::unlikely;
  use cortex_a::{barrier, regs::*};
+@@ -45,13 +45,6 @@
+ // Global instances
+ //--------------------------------------------------------------------------------------------------
 
-@@ -37,7 +41,7 @@
- pub const MIN_ADDR_SPACE_SIZE: usize = 1024 * 1024 * 1024; // 1 GiB
-
- /// The max supported address space size.
--pub const MAX_ADDR_SPACE_SIZE: usize = 32 * 1024 * 1024 * 1024; // 32 GiB
-+pub const MAX_ADDR_SPACE_SIZE: usize = 8 * 1024 * 1024 * 1024; // 8 GiB
-
- /// The supported address space size granule.
- pub type AddrSpaceSizeGranule = Granule512MiB;
-@@ -58,7 +62,8 @@
- /// # Safety
- ///
- /// - Supposed to land in `.bss`. Therefore, ensure that all initial member values boil down to "0".
+-/// The kernel translation tables.
+-///
+-/// # Safety
+-///
+-/// - Supposed to land in `.bss`. Therefore, ensure that all initial member values boil down to "0".
 -static mut KERNEL_TABLES: KernelTranslationTable = KernelTranslationTable::new();
-+static KERNEL_TABLES: InitStateLock<KernelTranslationTable> =
-+    InitStateLock::new(KernelTranslationTable::new());
-
+-
  static MMU: MemoryManagementUnit = MemoryManagementUnit;
 
-@@ -83,7 +88,7 @@
+ //--------------------------------------------------------------------------------------------------
+@@ -86,7 +79,7 @@
+
      /// Configure various settings of stage 1 of the EL1 translation regime.
      fn configure_translation_control(&self) {
-         let ips = ID_AA64MMFR0_EL1.read(ID_AA64MMFR0_EL1::PARange);
--        let t0sz = (64 - bsp::memory::mmu::KernelAddrSpaceSize::SHIFT) as u64;
-+        let t0sz = (64 - bsp::memory::mmu::KernelVirtAddrSpaceSize::SHIFT) as u64;
+-        let t0sz = (64 - bsp::memory::mmu::KernelAddrSpace::SIZE_SHIFT) as u64;
++        let t0sz = (64 - bsp::memory::mmu::KernelVirtAddrSpace::SIZE_SHIFT) as u64;
 
          TCR_EL1.write(
-             TCR_EL1::TBI0::Ignored
-@@ -103,6 +108,11 @@
- // Public Code
- //--------------------------------------------------------------------------------------------------
-
-+/// Return a guarded reference to the kernel's translation tables.
-+pub fn kernel_translation_tables() -> &'static InitStateLock<KernelTranslationTable> {
-+    &KERNEL_TABLES
-+}
-+
- /// Return a reference to the MMU instance.
- pub fn mmu() -> &'static impl memory::mmu::interface::MMU {
-     &MMU
-@@ -113,7 +123,10 @@
- //------------------------------------------------------------------------------
+             TCR_EL1::TBI0::Used
+@@ -118,7 +111,10 @@
+ use memory::mmu::MMUEnableError;
 
  impl memory::mmu::interface::MMU for MemoryManagementUnit {
--    unsafe fn init(&self) -> Result<(), &'static str> {
-+    unsafe fn enable(
+-    unsafe fn enable_mmu_and_caching(&self) -> Result<(), MMUEnableError> {
++    unsafe fn enable_mmu_and_caching(
 +        &self,
-+        kernel_table_phys_base_addr: Address<Physical>,
-+    ) -> Result<(), &'static str> {
-         // Fail early if translation granule is not supported. Both RPis support it, though.
-         if !ID_AA64MMFR0_EL1.matches_all(ID_AA64MMFR0_EL1::TGran64::Supported) {
-             return Err("Translation granule not supported in HW");
-@@ -122,11 +135,8 @@
++        phys_tables_base_addr: Address<Physical>,
++    ) -> Result<(), MMUEnableError> {
+         if unlikely(self.is_enabled()) {
+             return Err(MMUEnableError::AlreadyEnabled);
+         }
+@@ -133,13 +129,8 @@
          // Prepare the memory attribute indirection register.
          self.set_up_mair();
 
 -        // Populate translation tables.
--        KERNEL_TABLES.populate_tt_entries()?;
+-        KERNEL_TABLES
+-            .populate_tt_entries()
+-            .map_err(|e| MMUEnableError::Other(e))?;
 -
          // Set the "Translation Table Base Register".
--        TTBR0_EL1.set_baddr(KERNEL_TABLES.base_address());
-+        TTBR0_EL1.set_baddr(kernel_table_phys_base_addr.into_usize() as u64);
+-        TTBR0_EL1.set_baddr(KERNEL_TABLES.phys_base_address());
++        TTBR0_EL1.set_baddr(phys_tables_base_addr.into_usize() as u64);
 
          self.configure_translation_control();
 
-@@ -158,7 +168,7 @@
-     #[kernel_test]
-     fn kernel_tables_in_bss() {
-         let bss_range = bsp::memory::bss_range_inclusive();
--        let kernel_tables_addr = unsafe { &KERNEL_TABLES as *const _ as usize as *mut u64 };
-+        let kernel_tables_addr = &KERNEL_TABLES as *const _ as usize as *mut u64;
-
-         assert!(bss_range.contains(&kernel_tables_addr));
+@@ -162,22 +153,3 @@
+         SCTLR_EL1.matches_all(SCTLR_EL1::M::Enable)
      }
+ }
+-
+-//--------------------------------------------------------------------------------------------------
+-// Testing
+-//--------------------------------------------------------------------------------------------------
+-
+-#[cfg(test)]
+-mod tests {
+-    use super::*;
+-    use test_macros::kernel_test;
+-
+-    /// Check if KERNEL_TABLES is in .bss.
+-    #[kernel_test]
+-    fn kernel_tables_in_bss() {
+-        let bss_range = bsp::memory::bss_range_inclusive();
+-        let kernel_tables_addr = unsafe { &KERNEL_TABLES as *const _ as usize as *mut u64 };
+-
+-        assert!(bss_range.contains(&kernel_tables_addr));
+-    }
+-}
 
 diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs 15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicc.rs
 --- 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs
@@ -1305,7 +1367,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/console.rs 15_
 
  use super::memory;
 -use crate::{bsp::device_driver, console};
-+use crate::{bsp::device_driver, console, cpu};
++use crate::{bsp::device_driver, console, cpu, driver};
  use core::fmt;
 
  //--------------------------------------------------------------------------------------------------
@@ -1315,7 +1377,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/console.rs 15_
  pub unsafe fn panic_console_out() -> impl fmt::Write {
 -    let mut panic_gpio = device_driver::PanicGPIO::new(memory::map::mmio::GPIO_START);
 -    let mut panic_uart = device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START);
-+    use crate::driver::interface::DeviceDriver;
++    use driver::interface::DeviceDriver;
 
 +    let mut panic_gpio = device_driver::PanicGPIO::new(memory::map::mmio::GPIO_START.into_usize());
 +    let mut panic_uart =
@@ -1379,7 +1441,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld 15_vir
 diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
 --- 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +++ 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
-@@ -4,70 +4,131 @@
+@@ -4,70 +4,157 @@
 
  //! BSP Memory Management Unit.
 
@@ -1389,29 +1451,44 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +use crate::{
 +    common,
 +    memory::{
-+        mmu as kernel_mmu,
++        mmu as generic_mmu,
 +        mmu::{
-+            AccessPermissions, AddressSpaceSize, AttributeFields, MemAttributes, Page,
-+            PageSliceDescriptor, TranslationGranule,
++            AccessPermissions, AddressSpace, AssociatedTranslationTable, AttributeFields,
++            MemAttributes, Page, PageSliceDescriptor, TranslationGranule,
 +        },
 +        Physical, Virtual,
 +    },
++    synchronization::InitStateLock,
 +};
++
++//--------------------------------------------------------------------------------------------------
++// Private Definitions
++//--------------------------------------------------------------------------------------------------
++
++type KernelTranslationTable =
++    <KernelVirtAddrSpace as AssociatedTranslationTable>::TableStartFromBottom;
 
  //--------------------------------------------------------------------------------------------------
  // Public Definitions
  //--------------------------------------------------------------------------------------------------
 
--/// The address space size chosen by this BSP.
--pub type KernelAddrSpaceSize = AddressSpaceSize<{ memory_map::END_INCLUSIVE + 1 }>;
--
--const NUM_MEM_RANGES: usize = 2;
+-/// The kernel's address space defined by this BSP.
+-pub type KernelAddrSpace = AddressSpace<{ memory_map::END_INCLUSIVE + 1 }>;
 +/// The translation granule chosen by this BSP. This will be used everywhere else in the kernel to
 +/// derive respective data structures and their sizes. For example, the `crate::memory::mmu::Page`.
 +pub type KernelGranule = TranslationGranule<{ 64 * 1024 }>;
 
+-const NUM_MEM_RANGES: usize = 2;
++/// The kernel's virtual address space defined by this BSP.
++pub type KernelVirtAddrSpace = AddressSpace<{ 8 * 1024 * 1024 * 1024 }>;
+
 -/// The virtual memory layout.
--///
++//--------------------------------------------------------------------------------------------------
++// Global instances
++//--------------------------------------------------------------------------------------------------
++
++/// The kernel translation tables.
+ ///
 -/// The layout must contain only special ranges, aka anything that is _not_ normal cacheable DRAM.
 -/// It is agnostic of the paging granularity that the architecture's MMU will use.
 -pub static LAYOUT: KernelVirtualLayout<NUM_MEM_RANGES> = KernelVirtualLayout::new(
@@ -1439,8 +1516,12 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 -        },
 -    ],
 -);
-+/// The address space size chosen by this BSP.
-+pub type KernelVirtAddrSpaceSize = AddressSpaceSize<{ 8 * 1024 * 1024 * 1024 }>;
++/// It is mandatory that InitStateLock is transparent.
++///
++/// That is, `size_of(InitStateLock<KernelTranslationTable>) == size_of(KernelTranslationTable)`.
++/// There is a unit tests that checks this porperty.
++static KERNEL_TABLES: InitStateLock<KernelTranslationTable> =
++    InitStateLock::new(KernelTranslationTable::new());
 
  //--------------------------------------------------------------------------------------------------
  // Private Code
@@ -1477,10 +1558,8 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +    let num_pages = size_to_num_pages(super::data_size());
 +
 +    PageSliceDescriptor::from_addr(super::virt_data_start(), num_pages)
- }
-
--fn mmio_range_inclusive() -> RangeInclusive<usize> {
--    RangeInclusive::new(memory_map::mmio::START, memory_map::mmio::END_INCLUSIVE)
++}
++
 +// The binary is still identity mapped, so we don't need to convert in the following.
 +
 +/// The boot core's stack.
@@ -1491,8 +1570,10 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +/// The Read-Only (RO) pages of the kernel binary.
 +fn phys_ro_page_desc() -> PageSliceDescriptor<Physical> {
 +    virt_ro_page_desc().into()
-+}
-+
+ }
+
+-fn mmio_range_inclusive() -> RangeInclusive<usize> {
+-    RangeInclusive::new(memory_map::mmio::START, memory_map::mmio::END_INCLUSIVE)
 +/// The data pages of the kernel binary.
 +fn phys_data_page_desc() -> PageSliceDescriptor<Physical> {
 +    virt_data_page_desc().into()
@@ -1505,6 +1586,11 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 -/// Return a reference to the virtual memory layout.
 -pub fn virt_mem_layout() -> &'static KernelVirtualLayout<NUM_MEM_RANGES> {
 -    &LAYOUT
++/// Return a reference to the kernel's translation tables.
++pub fn kernel_translation_tables() -> &'static InitStateLock<KernelTranslationTable> {
++    &KERNEL_TABLES
++}
++
 +/// Pointer to the last page of the physical address space.
 +pub fn phys_addr_space_end_page() -> *const Page<Physical> {
 +    common::align_down(
@@ -1519,7 +1605,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +///
 +/// - Any miscalculation or attribute error will likely be fatal. Needs careful manual checking.
 +pub unsafe fn kernel_map_binary() -> Result<(), &'static str> {
-+    kernel_mmu::kernel_map_pages_at(
++    generic_mmu::kernel_map_pages_at(
 +        "Kernel boot-core stack",
 +        &virt_stack_page_desc(),
 +        &phys_stack_page_desc(),
@@ -1530,7 +1616,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +        },
 +    )?;
 +
-+    kernel_mmu::kernel_map_pages_at(
++    generic_mmu::kernel_map_pages_at(
 +        "Kernel code and RO data",
 +        &virt_ro_page_desc(),
 +        &phys_ro_page_desc(),
@@ -1541,7 +1627,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +        },
 +    )?;
 +
-+    kernel_mmu::kernel_map_pages_at(
++    generic_mmu::kernel_map_pages_at(
 +        "Kernel data and bss",
 +        &virt_data_page_desc(),
 +        &phys_data_page_desc(),
@@ -1556,19 +1642,19 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -82,14 +143,12 @@
+@@ -82,14 +169,12 @@
      /// Check alignment of the kernel's virtual memory layout sections.
      #[kernel_test]
      fn virt_mem_layout_sections_are_64KiB_aligned() {
 -        const SIXTYFOUR_KIB: usize = 65536;
+-
+-        for i in LAYOUT.inner().iter() {
+-            let start: usize = *(i.virtual_range)().start();
+-            let end: usize = *(i.virtual_range)().end() + 1;
 +        for i in [virt_stack_page_desc, virt_ro_page_desc, virt_data_page_desc].iter() {
 +            let start: usize = i().start_addr().into_usize();
 +            let end: usize = i().end_addr().into_usize();
 
--        for i in LAYOUT.inner().iter() {
--            let start: usize = *(i.virtual_range)().start();
--            let end: usize = *(i.virtual_range)().end() + 1;
--
 -            assert_eq!(start modulo SIXTYFOUR_KIB, 0);
 -            assert_eq!(end modulo SIXTYFOUR_KIB, 0);
 +            assert_eq!(start modulo KernelGranule::SIZE, 0);
@@ -1576,7 +1662,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
              assert!(end >= start);
          }
      }
-@@ -97,17 +156,18 @@
+@@ -97,18 +182,28 @@
      /// Ensure the kernel's virtual memory layout is free of overlaps.
      #[kernel_test]
      fn virt_mem_layout_has_no_overlaps() {
@@ -1592,20 +1678,30 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 -                assert!(!second_range().contains(first_range().start()));
 -                assert!(!second_range().contains(first_range().end()));
 +        let layout = [
-+            virt_stack_page_desc().into_usize_range_inclusive(),
-+            virt_ro_page_desc().into_usize_range_inclusive(),
-+            virt_data_page_desc().into_usize_range_inclusive(),
++            virt_stack_page_desc(),
++            virt_ro_page_desc(),
++            virt_data_page_desc(),
 +        ];
 +
 +        for (i, first_range) in layout.iter().enumerate() {
 +            for second_range in layout.iter().skip(i + 1) {
-+                assert!(!first_range.contains(second_range.start()));
-+                assert!(!first_range.contains(second_range.end()));
-+                assert!(!second_range.contains(first_range.start()));
-+                assert!(!second_range.contains(first_range.end()));
++                assert!(!first_range.contains(second_range.start_addr()));
++                assert!(!first_range.contains(second_range.end_addr_inclusive()));
++                assert!(!second_range.contains(first_range.start_addr()));
++                assert!(!second_range.contains(first_range.end_addr_inclusive()));
              }
          }
      }
++
++    /// Check if KERNEL_TABLES is in .bss.
++    #[kernel_test]
++    fn kernel_tables_in_bss() {
++        let bss_range = super::super::bss_range_inclusive();
++        let kernel_tables_addr = &KERNEL_TABLES as *const _ as usize as *mut u64;
++
++        assert!(bss_range.contains(&kernel_tables_addr));
++    }
+ }
 
 diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
 --- 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
@@ -1939,15 +2035,16 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/driver.rs 15_virtual_mem_part2
 diff -uNr 14_exceptions_part2_peripheral_IRQs/src/lib.rs 15_virtual_mem_part2_mmio_remap/src/lib.rs
 --- 14_exceptions_part2_peripheral_IRQs/src/lib.rs
 +++ 15_virtual_mem_part2_mmio_remap/src/lib.rs
-@@ -112,6 +112,7 @@
+@@ -112,6 +112,8 @@
  #![allow(clippy::clippy::upper_case_acronyms)]
  #![allow(incomplete_features)]
  #![feature(asm)]
++#![feature(const_evaluatable_checked)]
 +#![feature(const_fn)]
  #![feature(const_fn_fn_ptr_basics)]
  #![feature(const_generics)]
  #![feature(const_panic)]
-@@ -133,6 +134,7 @@
+@@ -133,6 +135,7 @@
  mod synchronization;
 
  pub mod bsp;
@@ -1959,7 +2056,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/lib.rs 15_virtual_mem_part2_mm
 diff -uNr 14_exceptions_part2_peripheral_IRQs/src/main.rs 15_virtual_mem_part2_mmio_remap/src/main.rs
 --- 14_exceptions_part2_peripheral_IRQs/src/main.rs
 +++ 15_virtual_mem_part2_mmio_remap/src/main.rs
-@@ -26,21 +26,34 @@
+@@ -26,21 +26,39 @@
  #[no_mangle]
  unsafe fn kernel_init() -> ! {
      use driver::interface::DriverManager;
@@ -1967,14 +2064,18 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/main.rs 15_virtual_mem_part2_m
 
      exception::handling_init();
 
--    if let Err(string) = memory::mmu::mmu().init() {
+-    if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
 -        panic!("MMU: {}", string);
-+    if let Err(string) = memory::mmu::kernel_map_binary_and_enable_mmu() {
-+        panic!("Enabling MMU failed: {}", string);
-     }
-+    // Printing will silently fail fail from here on, because the driver's MMIO is not remapped yet.
-
--    for i in bsp::driver::driver_manager().all_device_drivers().iter() {
++    let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
++        Err(string) => panic!("Error mapping kernel binary: {}", string),
++        Ok(addr) => addr,
++    };
++
++    if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
++        panic!("Enabling MMU failed: {}", e);
++    }
++    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
++
 +    // Bring up the drivers needed for printing first.
 +    for i in bsp::driver::driver_manager()
 +        .early_print_device_drivers()
@@ -1982,10 +2083,11 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/main.rs 15_virtual_mem_part2_m
 +    {
 +        // Any encountered errors cannot be printed yet, obviously, so just safely park the CPU.
 +        i.init().unwrap_or_else(|_| cpu::wait_forever());
-+    }
+     }
 +    bsp::driver::driver_manager().post_early_print_device_driver_init();
 +    // Printing available again from here on.
-+
+
+-    for i in bsp::driver::driver_manager().all_device_drivers().iter() {
 +    // Now bring up the remaining drivers.
 +    for i in bsp::driver::driver_manager()
 +        .non_early_print_device_drivers()
@@ -2000,7 +2102,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/main.rs 15_virtual_mem_part2_m
 
      // Let device drivers register and enable their handlers with the interrupt controller.
      for i in bsp::driver::driver_manager().all_device_drivers() {
-@@ -66,8 +79,8 @@
+@@ -66,8 +84,8 @@
 
      info!("Booting on: {}", bsp::board_name());
 
@@ -2129,12 +2231,12 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/mapping_record.rs 1
 +        const KIB_RSHIFT: u32 = 10; // log2(1024).
 +        const MIB_RSHIFT: u32 = 20; // log2(1024 * 1024).
 +
-+        info!("      -----------------------------------------------------------------------------------------------------------------");
++        info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
 +        info!(
-+            "      {:^24}     {:^24}   {:^7}   {:^9}   {:^35}",
++            "      {:^44}     {:^30}   {:^7}   {:^9}   {:^35}",
 +            "Virtual", "Physical", "Size", "Attr", "Entity"
 +        );
-+        info!("      -----------------------------------------------------------------------------------------------------------------");
++        info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
 +
 +        for i in self
 +            .inner
@@ -2142,10 +2244,10 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/mapping_record.rs 1
 +            .filter(|x| x.is_some())
 +            .map(|x| x.unwrap())
 +        {
-+            let virt_start = i.virt_start_addr.into_usize();
++            let virt_start = i.virt_start_addr;
 +            let virt_end_inclusive = virt_start + i.phys_pages.size() - 1;
-+            let phys_start = i.phys_pages.start_addr().into_usize();
-+            let phys_end_inclusive = i.phys_pages.end_addr_inclusive().into_usize();
++            let phys_start = i.phys_pages.start_addr();
++            let phys_end_inclusive = i.phys_pages.end_addr_inclusive();
 +            let size = i.phys_pages.size();
 +
 +            let (size, unit) = if (size >> MIB_RSHIFT) > 0 {
@@ -2173,7 +2275,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/mapping_record.rs 1
 +            };
 +
 +            info!(
-+                "      {:#011X}..{:#011X} --> {:#011X}..{:#011X} | \
++                "      {}..{} --> {}..{} | \
 +                        {: >3} {} | {: <3} {} {: <2} | {}",
 +                virt_start,
 +                virt_end_inclusive,
@@ -2190,14 +2292,14 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/mapping_record.rs 1
 +            for k in i.users[1..].iter() {
 +                if let Some(additional_user) = *k {
 +                    info!(
-+                        "                                                                                  | {}",
++                        "                                                                                                            | {}",
 +                        additional_user
 +                    );
 +                }
 +            }
 +        }
 +
-+        info!("      -----------------------------------------------------------------------------------------------------------------");
++        info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
 +    }
 +}
 +
@@ -2241,7 +2343,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/mapping_record.rs 1
 diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.rs 15_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs
 --- 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.rs
 +++ 15_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs
-@@ -8,7 +8,104 @@
+@@ -8,7 +8,105 @@
  #[path = "../../_arch/aarch64/memory/mmu/translation_table.rs"]
  mod arch_translation_table;
 
@@ -2253,7 +2355,9 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.r
  //--------------------------------------------------------------------------------------------------
  // Architectural Public Reexports
  //--------------------------------------------------------------------------------------------------
- pub use arch_translation_table::KernelTranslationTable;
+-pub use arch_translation_table::KernelTranslationTable;
++#[cfg(target_arch = "aarch64")]
++pub use arch_translation_table::FixedSizeTranslationTable;
 +
 +//--------------------------------------------------------------------------------------------------
 +// Public Definitions
@@ -2271,7 +2375,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.r
 +        ///
 +        /// - Implementor must ensure that this function can run only once or is harmless if invoked
 +        ///   multiple times.
-+        unsafe fn init(&mut self);
++        fn init(&mut self);
 +
 +        /// The translation table's base address to be used for programming the MMU.
 +        fn phys_base_address(&self) -> Address<Physical>;
@@ -2317,17 +2421,17 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.r
 +mod tests {
 +    use super::*;
 +    use crate::bsp;
-+    use arch_translation_table::MinSizeKernelTranslationTable;
++    use arch_translation_table::MinSizeTranslationTable;
 +    use interface::TranslationTable;
 +    use test_macros::kernel_test;
 +
-+    /// Sanity checks for the kernel TranslationTable implementation.
++    /// Sanity checks for the TranslationTable implementation.
 +    #[kernel_test]
 +    fn translationtable_implementation_sanity() {
-+        // Need to take care that `tables` fits into the stack.
-+        let mut tables = MinSizeKernelTranslationTable::new();
++        // This will occupy a lot of space on the stack.
++        let mut tables = MinSizeTranslationTable::new();
 +
-+        unsafe { tables.init() };
++        tables.init();
 +
 +        let x = tables.next_mmio_virt_page_slice(0);
 +        assert!(x.is_err());
@@ -2350,7 +2454,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.r
 diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 15_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
 --- 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs
 +++ 15_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
-@@ -0,0 +1,213 @@
+@@ -0,0 +1,210 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -2361,7 +2465,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 15_virtual
 +    bsp, common,
 +    memory::{Address, AddressType, Physical, Virtual},
 +};
-+use core::{convert::From, marker::PhantomData, ops::RangeInclusive};
++use core::{convert::From, marker::PhantomData};
 +
 +//--------------------------------------------------------------------------------------------------
 +// Public Definitions
@@ -2474,6 +2578,11 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 15_virtual
 +        self.start + (self.size() - 1)
 +    }
 +
++    /// Check if an address is contained within this descriptor.
++    pub fn contains(&self, addr: Address<ATYPE>) -> bool {
++        (addr >= self.start_addr()) && (addr <= self.end_addr_inclusive())
++    }
++
 +    /// Return a non-mutable slice of Pages.
 +    ///
 +    /// # Safety
@@ -2482,14 +2591,6 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 15_virtual
 +    pub unsafe fn as_slice(&self) -> &[Page<ATYPE>] {
 +        core::slice::from_raw_parts(self.first_page_ptr(), self.num_pages)
 +    }
-+
-+    /// Return the inclusive address range of the slice.
-+    pub fn into_usize_range_inclusive(self) -> RangeInclusive<usize> {
-+        RangeInclusive::new(
-+            self.start_addr().into_usize(),
-+            self.end_addr_inclusive().into_usize(),
-+        )
-+    }
 +}
 +
 +impl From<PageSliceDescriptor<Virtual>> for PageSliceDescriptor<Physical> {
@@ -2568,7 +2669,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 15_virtual
 diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 15_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
 --- 14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs
 +++ 15_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
-@@ -3,29 +3,22 @@
+@@ -3,29 +3,23 @@
  // Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
  //! Memory Management Unit.
@@ -2597,6 +2698,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 15_virtual_mem_p
 +    memory::{Address, Physical, Virtual},
 +    synchronization, warn,
 +};
++use core::fmt;
 
 -//--------------------------------------------------------------------------------------------------
 -// Architectural Public Reexports
@@ -2606,33 +2708,28 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 15_virtual_mem_p
 
  //--------------------------------------------------------------------------------------------------
  // Public Definitions
-@@ -33,16 +26,20 @@
-
- /// Memory Management interfaces.
- pub mod interface {
-+    use super::*;
+@@ -45,13 +39,15 @@
 
      /// MMU functions.
      pub trait MMU {
 -        /// Called by the kernel during early init. Supposed to take the translation tables from the
 -        /// `BSP`-supplied `virt_mem_layout()` and install/activate them for the respective MMU.
-+        /// Turns on the MMU.
++        /// Turns on the MMU for the first time and enables data and instruction caching.
          ///
          /// # Safety
          ///
-+        /// - Must only be called after the kernel translation tables have been init()'ed.
          /// - Changes the HW's global state.
--        unsafe fn init(&self) -> Result<(), &'static str>;
-+        unsafe fn enable(
+-        unsafe fn enable_mmu_and_caching(&self) -> Result<(), MMUEnableError>;
++        unsafe fn enable_mmu_and_caching(
 +            &self,
-+            kernel_table_phys_base_addr: Address<Physical>,
-+        ) -> Result<(), &'static str>;
-     }
- }
++            phys_tables_base_addr: Address<Physical>,
++        ) -> Result<(), MMUEnableError>;
 
-@@ -52,55 +49,35 @@
- /// Describes the size of an address space.
- pub struct AddressSpaceSize<const AS_SIZE: usize>;
+         /// Returns true if the MMU is enabled, false otherwise.
+         fn is_enabled(&self) -> bool;
+@@ -64,55 +60,43 @@
+ /// Describes properties of an address space.
+ pub struct AddressSpace<const AS_SIZE: usize>;
 
 -/// Architecture agnostic translation types.
 -#[allow(missing_docs)]
@@ -2665,8 +2762,14 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 15_virtual_mem_p
 -    pub mem_attributes: MemAttributes,
 -    pub acc_perms: AccessPermissions,
 -    pub execute_never: bool,
--}
--
++/// Intended to be implemented for [`AddressSpace`].
++pub trait AssociatedTranslationTable {
++    /// A translation table whose address range is:
++    ///
++    /// [0, AS_SIZE - 1]
++    type TableStartFromBottom;
+ }
+
 -/// Architecture agnostic descriptor for a memory range.
 -#[allow(missing_docs)]
 -pub struct TranslationDescriptor {
@@ -2675,11 +2778,6 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 15_virtual_mem_p
 -    pub physical_range_translation: Translation,
 -    pub attribute_fields: AttributeFields,
 -}
--
--/// Type for expressing the kernel's virtual memory layout.
--pub struct KernelVirtualLayout<const NUM_SPECIAL_RANGES: usize> {
--    /// The last (inclusive) address of the address space.
--    max_virt_addr_inclusive: usize,
 +//--------------------------------------------------------------------------------------------------
 +// Private Code
 +//--------------------------------------------------------------------------------------------------
@@ -2701,9 +2799,13 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 15_virtual_mem_p
 +    phys_pages: &PageSliceDescriptor<Physical>,
 +    attr: &AttributeFields,
 +) -> Result<(), &'static str> {
-+    arch_mmu::kernel_translation_tables()
++    bsp::memory::mmu::kernel_translation_tables()
 +        .write(|tables| tables.map_pages_at(virt_pages, phys_pages, attr))?;
-+
+
+-/// Type for expressing the kernel's virtual memory layout.
+-pub struct KernelVirtualLayout<const NUM_SPECIAL_RANGES: usize> {
+-    /// The last (inclusive) address of the address space.
+-    max_virt_addr_inclusive: usize,
 +    if let Err(x) = mapping_record::kernel_add(name, virt_pages, phys_pages, attr) {
 +        warn!("{}", x);
 +    }
@@ -2714,7 +2816,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 15_virtual_mem_p
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -111,6 +88,9 @@
+@@ -132,6 +116,9 @@
      /// The granule's size.
      pub const SIZE: usize = Self::size_checked();
 
@@ -2724,7 +2826,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 15_virtual_mem_p
      /// The granule's shift, aka log2(size).
      pub const SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
 
-@@ -142,110 +122,89 @@
+@@ -159,110 +146,103 @@
      }
  }
 
@@ -2848,7 +2950,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 15_virtual_mem_p
 +    phys_pages: &PageSliceDescriptor<Physical>,
 +    attr: &AttributeFields,
 +) -> Result<(), &'static str> {
-+    let is_mmio = arch_mmu::kernel_translation_tables()
++    let is_mmio = bsp::memory::mmu::kernel_translation_tables()
 +        .read(|tables| tables.is_virt_page_slice_mmio(virt_pages));
 +    if is_mmio {
 +        return Err("Attempt to manually map into MMIO region");
@@ -2881,8 +2983,9 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 15_virtual_mem_p
 +        addr
 +    // Otherwise, allocate a new virtual page slice and map it.
 +    } else {
-+        let virt_pages: PageSliceDescriptor<Virtual> = arch_mmu::kernel_translation_tables()
-+            .write(|tables| tables.next_mmio_virt_page_slice(phys_pages.num_pages()))?;
++        let virt_pages: PageSliceDescriptor<Virtual> =
++            bsp::memory::mmu::kernel_translation_tables()
++                .write(|tables| tables.next_mmio_virt_page_slice(phys_pages.num_pages()))?;
 +
 +        kernel_map_pages_at_unchecked(
 +            name,
@@ -2901,19 +3004,32 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 15_virtual_mem_p
 +    Ok(virt_addr + offset_into_start_page)
 +}
 +
-+/// Map the kernel's binary and enable the MMU.
++/// Map the kernel's binary. Returns the translation table's base address.
 +///
 +/// # Safety
 +///
-+/// - Crucial function during kernel init. Changes the the complete memory view of the processor.
-+pub unsafe fn kernel_map_binary_and_enable_mmu() -> Result<(), &'static str> {
-+    let phys_base_addr = arch_mmu::kernel_translation_tables().write(|tables| {
-+        tables.init();
-+        tables.phys_base_address()
-+    });
++/// - See [`bsp::memory::mmu::kernel_map_binary()`].
++pub unsafe fn kernel_map_binary() -> Result<Address<Physical>, &'static str> {
++    let phys_kernel_tables_base_addr =
++        bsp::memory::mmu::kernel_translation_tables().write(|tables| {
++            tables.init();
++            tables.phys_base_address()
++        });
 +
 +    bsp::memory::mmu::kernel_map_binary()?;
-+    arch_mmu::mmu().enable(phys_base_addr)
++
++    Ok(phys_kernel_tables_base_addr)
++}
++
++/// Enable the MMU and data + instruction caching.
++///
++/// # Safety
++///
++/// - Crucial function during kernel init. Changes the the complete memory view of the processor.
++pub unsafe fn enable_mmu_and_caching(
++    phys_tables_base_addr: Address<Physical>,
++) -> Result<(), MMUEnableError> {
++    arch_mmu::mmu().enable_mmu_and_caching(phys_tables_base_addr)
 +}
 +
 +/// Human-readable print of all recorded kernel mappings.
@@ -2924,13 +3040,17 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 15_virtual_mem_p
 diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory.rs 15_virtual_mem_part2_mmio_remap/src/memory.rs
 --- 14_exceptions_part2_peripheral_IRQs/src/memory.rs
 +++ 15_virtual_mem_part2_mmio_remap/src/memory.rs
-@@ -6,12 +6,85 @@
+@@ -6,12 +6,136 @@
 
  pub mod mmu;
 
 -use core::ops::RangeInclusive;
 +use crate::common;
-+use core::{marker::PhantomData, ops::RangeInclusive};
++use core::{
++    fmt,
++    marker::PhantomData,
++    ops::{AddAssign, RangeInclusive, SubAssign},
++};
 +
 +//--------------------------------------------------------------------------------------------------
 +// Public Definitions
@@ -2997,6 +3117,15 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory.rs 15_virtual_mem_part2
 +    }
 +}
 +
++impl<ATYPE: AddressType> AddAssign for Address<ATYPE> {
++    fn add_assign(&mut self, other: Self) {
++        *self = Self {
++            value: self.value + other.into_usize(),
++            _address_type: PhantomData,
++        };
++    }
++}
++
 +impl<ATYPE: AddressType> core::ops::Sub<usize> for Address<ATYPE> {
 +    type Output = Self;
 +
@@ -3007,6 +3136,44 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory.rs 15_virtual_mem_part2
 +        }
 +    }
 +}
++
++impl<ATYPE: AddressType> SubAssign for Address<ATYPE> {
++    fn sub_assign(&mut self, other: Self) {
++        *self = Self {
++            value: self.value - other.into_usize(),
++            _address_type: PhantomData,
++        };
++    }
++}
++
++impl fmt::Display for Address<Physical> {
++    // Don't expect to see physical addresses greater than 40 bit.
++    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
++        let q3: u8 = ((self.value >> 32) & 0xff) as u8;
++        let q2: u16 = ((self.value >> 16) & 0xffff) as u16;
++        let q1: u16 = (self.value & 0xffff) as u16;
++
++        write!(f, "0x")?;
++        write!(f, "{:02x}_", q3)?;
++        write!(f, "{:04x}_", q2)?;
++        write!(f, "{:04x}", q1)
++    }
++}
++
++impl fmt::Display for Address<Virtual> {
++    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
++        let q4: u16 = ((self.value >> 48) & 0xffff) as u16;
++        let q3: u16 = ((self.value >> 32) & 0xffff) as u16;
++        let q2: u16 = ((self.value >> 16) & 0xffff) as u16;
++        let q1: u16 = (self.value & 0xffff) as u16;
++
++        write!(f, "0x")?;
++        write!(f, "{:04x}_", q4)?;
++        write!(f, "{:04x}_", q3)?;
++        write!(f, "{:04x}_", q2)?;
++        write!(f, "{:04x}", q1)
++    }
++}
 +
  /// Zero out an inclusive memory range.
  ///
@@ -3024,17 +3191,25 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault
 
      exception::handling_init();
      bsp::console::qemu_bring_up_console();
-@@ -29,10 +29,22 @@
+@@ -29,10 +29,30 @@
      println!("Testing synchronous exception handling by causing a page fault");
      println!("-------------------------------------------------------------------\n");
 
--    if let Err(string) = memory::mmu::mmu().init() {
+-    if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
 -        println!("MMU: {}", string);
-+    if let Err(string) = memory::mmu::kernel_map_binary_and_enable_mmu() {
-+        println!("Enabling MMU failed: {}", string);
++    let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
++        Err(string) => {
++            println!("Error mapping kernel binary: {}", string);
++            cpu::qemu_exit_failure()
++        }
++        Ok(addr) => addr,
++    };
++
++    if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
++        println!("Enabling MMU failed: {}", e);
          cpu::qemu_exit_failure()
      }
-+    // Printing will silently fail fail from here on, because the driver's MMIO is not remapped yet.
++    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
 +
 +    // Bring up the drivers needed for printing first.
 +    for i in bsp::driver::driver_manager()
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
index ebf454ce9..223115168 100644
--- a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
@@ -15,12 +15,9 @@
 
 use crate::{
     bsp, memory,
-    memory::{
-        mmu::{translation_table::KernelTranslationTable, TranslationGranule},
-        Address, Physical,
-    },
-    synchronization::InitStateLock,
+    memory::{mmu::TranslationGranule, Address, Physical},
 };
+use core::intrinsics::unlikely;
 use cortex_a::{barrier, regs::*};
 
 //--------------------------------------------------------------------------------------------------
@@ -37,15 +34,6 @@ struct MemoryManagementUnit;
 pub type Granule512MiB = TranslationGranule<{ 512 * 1024 * 1024 }>;
 pub type Granule64KiB = TranslationGranule<{ 64 * 1024 }>;
 
-/// The min supported address space size.
-pub const MIN_ADDR_SPACE_SIZE: usize = 1024 * 1024 * 1024; // 1 GiB
-
-/// The max supported address space size.
-pub const MAX_ADDR_SPACE_SIZE: usize = 8 * 1024 * 1024 * 1024; // 8 GiB
-
-/// The supported address space size granule.
-pub type AddrSpaceSizeGranule = Granule512MiB;
-
 /// Constants for indexing the MAIR_EL1.
 #[allow(dead_code)]
 pub mod mair {
@@ -57,20 +45,24 @@ pub mod mair {
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
-/// The kernel translation tables.
-///
-/// # Safety
-///
-/// - Supposed to land in `.bss`. Therefore, ensure that all initial member values boil down to "0".
-static KERNEL_TABLES: InitStateLock<KernelTranslationTable> =
-    InitStateLock::new(KernelTranslationTable::new());
-
 static MMU: MemoryManagementUnit = MemoryManagementUnit;
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
+impl<const AS_SIZE: usize> memory::mmu::AddressSpace<AS_SIZE> {
+    /// Checks for architectural restrictions.
+    pub const fn arch_address_space_size_sanity_checks() {
+        // Size must be at least one full 512 MiB table.
+        assert!((AS_SIZE % Granule512MiB::SIZE) == 0);
+
+        // Check for 48 bit virtual address size as maximum, which is supported by any ARMv8
+        // version.
+        assert!(AS_SIZE <= (1 << 48));
+    }
+}
+
 impl MemoryManagementUnit {
     /// Setup function for the MAIR_EL1 register.
     fn set_up_mair(&self) {
@@ -87,19 +79,19 @@ impl MemoryManagementUnit {
 
     /// Configure various settings of stage 1 of the EL1 translation regime.
     fn configure_translation_control(&self) {
-        let ips = ID_AA64MMFR0_EL1.read(ID_AA64MMFR0_EL1::PARange);
-        let t0sz = (64 - bsp::memory::mmu::KernelVirtAddrSpaceSize::SHIFT) as u64;
+        let t0sz = (64 - bsp::memory::mmu::KernelVirtAddrSpace::SIZE_SHIFT) as u64;
 
         TCR_EL1.write(
-            TCR_EL1::TBI0::Ignored
-                + TCR_EL1::IPS.val(ips)
-                + TCR_EL1::EPD1::DisableTTBR1Walks
+            TCR_EL1::TBI0::Used
+                + TCR_EL1::IPS::Bits_40
                 + TCR_EL1::TG0::KiB_64
                 + TCR_EL1::SH0::Inner
                 + TCR_EL1::ORGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
                 + TCR_EL1::IRGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
                 + TCR_EL1::EPD0::EnableTTBR0Walks
-                + TCR_EL1::T0SZ.val(t0sz),
+                + TCR_EL1::A1::TTBR0
+                + TCR_EL1::T0SZ.val(t0sz)
+                + TCR_EL1::EPD1::DisableTTBR1Walks,
         );
     }
 }
@@ -108,11 +100,6 @@ impl MemoryManagementUnit {
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// Return a guarded reference to the kernel's translation tables.
-pub fn kernel_translation_tables() -> &'static InitStateLock<KernelTranslationTable> {
-    &KERNEL_TABLES
-}
-
 /// Return a reference to the MMU instance.
 pub fn mmu() -> &'static impl memory::mmu::interface::MMU {
     &MMU
@@ -121,22 +108,29 @@ pub fn mmu() -> &'static impl memory::mmu::interface::MMU {
 //------------------------------------------------------------------------------
 // OS Interface Code
 //------------------------------------------------------------------------------
+use memory::mmu::MMUEnableError;
 
 impl memory::mmu::interface::MMU for MemoryManagementUnit {
-    unsafe fn enable(
+    unsafe fn enable_mmu_and_caching(
         &self,
-        kernel_table_phys_base_addr: Address<Physical>,
-    ) -> Result<(), &'static str> {
-        // Fail early if translation granule is not supported. Both RPis support it, though.
-        if !ID_AA64MMFR0_EL1.matches_all(ID_AA64MMFR0_EL1::TGran64::Supported) {
-            return Err("Translation granule not supported in HW");
+        phys_tables_base_addr: Address<Physical>,
+    ) -> Result<(), MMUEnableError> {
+        if unlikely(self.is_enabled()) {
+            return Err(MMUEnableError::AlreadyEnabled);
+        }
+
+        // Fail early if translation granule is not supported.
+        if unlikely(!ID_AA64MMFR0_EL1.matches_all(ID_AA64MMFR0_EL1::TGran64::Supported)) {
+            return Err(MMUEnableError::Other(
+                "Translation granule not supported in HW",
+            ));
         }
 
         // Prepare the memory attribute indirection register.
         self.set_up_mair();
 
         // Set the "Translation Table Base Register".
-        TTBR0_EL1.set_baddr(kernel_table_phys_base_addr.into_usize() as u64);
+        TTBR0_EL1.set_baddr(phys_tables_base_addr.into_usize() as u64);
 
         self.configure_translation_control();
 
@@ -153,23 +147,9 @@ impl memory::mmu::interface::MMU for MemoryManagementUnit {
 
         Ok(())
     }
-}
-
-//--------------------------------------------------------------------------------------------------
-// Testing
-//--------------------------------------------------------------------------------------------------
-
-#[cfg(test)]
-mod tests {
-    use super::*;
-    use test_macros::kernel_test;
-
-    /// Check if KERNEL_TABLES is in .bss.
-    #[kernel_test]
-    fn kernel_tables_in_bss() {
-        let bss_range = bsp::memory::bss_range_inclusive();
-        let kernel_tables_addr = &KERNEL_TABLES as *const _ as usize as *mut u64;
 
-        assert!(bss_range.contains(&kernel_tables_addr));
+    #[inline(always)]
+    fn is_enabled(&self) -> bool {
+        SCTLR_EL1.matches_all(SCTLR_EL1::M::Enable)
     }
 }
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
index f682d6a49..15784a1b6 100644
--- a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -20,7 +20,7 @@ use crate::{
             arch_mmu::{Granule512MiB, Granule64KiB},
             AccessPermissions, AttributeFields, MemAttributes, Page, PageSliceDescriptor,
         },
-        Address, AddressType, Physical, Virtual,
+        Address, Physical, Virtual,
     },
 };
 use core::convert;
@@ -90,8 +90,8 @@ register_bitfields! {u64,
         AttrIndx OFFSET(2) NUMBITS(3) [],
 
         TYPE     OFFSET(1) NUMBITS(1) [
-            Block = 0,
-            Table = 1
+            Reserved_Invalid = 0,
+            Page = 1
         ],
 
         VALID    OFFSET(0) NUMBITS(1) [
@@ -119,19 +119,16 @@ struct PageDescriptor {
     value: u64,
 }
 
-trait BaseAddr {
-    fn phys_base_addr(&self) -> Address<Physical>;
+trait StartAddr {
+    fn phys_start_addr(&self) -> Address<Physical>;
 }
 
-const NUM_LVL2_TABLES: usize =
-    bsp::memory::mmu::KernelVirtAddrSpaceSize::SIZE >> Granule512MiB::SHIFT;
-
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
 /// Big monolithic struct for storing the translation tables. Individual levels must be 64 KiB
-/// aligned, hence the "reverse" order of appearance.
+/// aligned, so the lvl3 is put first.
 #[repr(C)]
 #[repr(align(65536))]
 pub struct FixedSizeTranslationTable<const NUM_TABLES: usize> {
@@ -148,16 +145,13 @@ pub struct FixedSizeTranslationTable<const NUM_TABLES: usize> {
     initialized: bool,
 }
 
-/// A translation table type for the kernel space.
-pub type KernelTranslationTable = FixedSizeTranslationTable<NUM_LVL2_TABLES>;
-
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-impl<T, const N: usize> BaseAddr for [T; N] {
-    fn phys_base_addr(&self) -> Address<Physical> {
-        // The binary is still identity mapped, so we don't need to convert here.
+// The binary is still identity mapped, so we don't need to convert here.
+impl<T, const N: usize> StartAddr for [T; N] {
+    fn phys_start_addr(&self) -> Address<Physical> {
         Address::new(self as *const _ as usize)
     }
 }
@@ -171,14 +165,14 @@ impl TableDescriptor {
     }
 
     /// Create an instance pointing to the supplied address.
-    pub fn from_next_lvl_table_addr(next_lvl_table_addr: usize) -> Self {
+    pub fn from_next_lvl_table_addr(phys_next_lvl_table_addr: Address<Physical>) -> Self {
         let val = InMemoryRegister::<u64, STAGE1_TABLE_DESCRIPTOR::Register>::new(0);
 
-        let shifted = next_lvl_table_addr >> Granule64KiB::SHIFT;
+        let shifted = phys_next_lvl_table_addr.into_usize() >> Granule64KiB::SHIFT;
         val.write(
-            STAGE1_TABLE_DESCRIPTOR::VALID::True
+            STAGE1_TABLE_DESCRIPTOR::NEXT_LEVEL_TABLE_ADDR_64KiB.val(shifted as u64)
                 + STAGE1_TABLE_DESCRIPTOR::TYPE::Table
-                + STAGE1_TABLE_DESCRIPTOR::NEXT_LEVEL_TABLE_ADDR_64KiB.val(shifted as u64),
+                + STAGE1_TABLE_DESCRIPTOR::VALID::True,
         );
 
         TableDescriptor { value: val.get() }
@@ -232,18 +226,18 @@ impl PageDescriptor {
 
     /// Create an instance.
     pub fn from_output_addr(
-        output_addr: *const Page<Physical>,
+        phys_output_addr: *const Page<Physical>,
         attribute_fields: &AttributeFields,
     ) -> Self {
         let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
 
-        let shifted = output_addr as u64 >> Granule64KiB::SHIFT;
+        let shifted = phys_output_addr as u64 >> Granule64KiB::SHIFT;
         val.write(
-            STAGE1_PAGE_DESCRIPTOR::VALID::True
+            STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted)
                 + STAGE1_PAGE_DESCRIPTOR::AF::True
-                + attribute_fields.clone().into()
-                + STAGE1_PAGE_DESCRIPTOR::TYPE::Table
-                + STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted),
+                + STAGE1_PAGE_DESCRIPTOR::TYPE::Page
+                + STAGE1_PAGE_DESCRIPTOR::VALID::True
+                + attribute_fields.clone().into(),
         );
 
         Self { value: val.get() }
@@ -260,6 +254,14 @@ impl PageDescriptor {
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
+impl<const AS_SIZE: usize> memory::mmu::AssociatedTranslationTable
+    for memory::mmu::AddressSpace<AS_SIZE>
+where
+    [u8; Self::SIZE >> Granule512MiB::SHIFT]: Sized,
+{
+    type TableStartFromBottom = FixedSizeTranslationTable<{ Self::SIZE >> Granule512MiB::SHIFT }>;
+}
+
 impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
     // Reserve the last 256 MiB of the address space for MMIO mappings.
     const L2_MMIO_START_INDEX: usize = NUM_TABLES - 1;
@@ -269,8 +271,9 @@ impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
     #[allow(clippy::assertions_on_constants)]
     pub const fn new() -> Self {
         assert!(bsp::memory::mmu::KernelGranule::SIZE == Granule64KiB::SIZE);
+
+        // Can't have a zero-sized address space.
         assert!(NUM_TABLES > 0);
-        assert!((bsp::memory::mmu::KernelVirtAddrSpaceSize::SIZE % Granule512MiB::SIZE) == 0);
 
         Self {
             lvl3: [[PageDescriptor::new_zeroed(); 8192]; NUM_TABLES],
@@ -282,7 +285,7 @@ impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
 
     /// The start address of the table's MMIO range.
     #[inline(always)]
-    const fn mmio_start_addr(&self) -> Address<Virtual> {
+    fn mmio_start_addr(&self) -> Address<Virtual> {
         Address::new(
             (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
                 | (Self::L3_MMIO_START_INDEX << Granule64KiB::SHIFT),
@@ -291,7 +294,7 @@ impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
 
     /// The inclusive end address of the table's MMIO range.
     #[inline(always)]
-    const fn mmio_end_addr_inclusive(&self) -> Address<Virtual> {
+    fn mmio_end_addr_inclusive(&self) -> Address<Virtual> {
         Address::new(
             (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
                 | (8191 << Granule64KiB::SHIFT)
@@ -301,12 +304,13 @@ impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
 
     /// Helper to calculate the lvl2 and lvl3 indices from an address.
     #[inline(always)]
-    fn lvl2_lvl3_index_from<ATYPE: AddressType>(
+    fn lvl2_lvl3_index_from(
         &self,
-        addr: *const Page<ATYPE>,
+        addr: *const Page<Virtual>,
     ) -> Result<(usize, usize), &'static str> {
-        let lvl2_index = addr as usize >> Granule512MiB::SHIFT;
-        let lvl3_index = (addr as usize & Granule512MiB::MASK) >> Granule64KiB::SHIFT;
+        let addr = addr as usize;
+        let lvl2_index = addr >> Granule512MiB::SHIFT;
+        let lvl3_index = (addr & Granule512MiB::MASK) >> Granule64KiB::SHIFT;
 
         if lvl2_index > (NUM_TABLES - 1) {
             return Err("Virtual page is out of bounds of translation table");
@@ -334,16 +338,15 @@ impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
 impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::TranslationTable
     for FixedSizeTranslationTable<NUM_TABLES>
 {
-    unsafe fn init(&mut self) {
+    fn init(&mut self) {
         if self.initialized {
             return;
         }
 
         // Populate the l2 entries.
         for (lvl2_nr, lvl2_entry) in self.lvl2.iter_mut().enumerate() {
-            let desc = TableDescriptor::from_next_lvl_table_addr(
-                self.lvl3[lvl2_nr].phys_base_addr().into_usize(),
-            );
+            let desc =
+                TableDescriptor::from_next_lvl_table_addr(self.lvl3[lvl2_nr].phys_start_addr());
             *lvl2_entry = desc;
         }
 
@@ -352,7 +355,7 @@ impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::Transla
     }
 
     fn phys_base_address(&self) -> Address<Physical> {
-        self.lvl2.phys_base_addr()
+        self.lvl2.phys_start_addr()
     }
 
     unsafe fn map_pages_at(
@@ -366,15 +369,15 @@ impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::Transla
         let p = phys_pages.as_slice();
         let v = virt_pages.as_slice();
 
-        if p.len() != v.len() {
-            return Err("Tried to map page slices with unequal sizes");
-        }
-
         // No work to do for empty slices.
-        if p.is_empty() {
+        if v.is_empty() {
             return Ok(());
         }
 
+        if v.len() != p.len() {
+            return Err("Tried to map page slices with unequal sizes");
+        }
+
         if p.last().unwrap().as_ptr() >= bsp::memory::mmu::phys_addr_space_end_page() {
             return Err("Tried to map outside of physical address space");
         }
@@ -406,14 +409,13 @@ impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::Transla
             return Err("Not enough MMIO space left");
         }
 
-        let addr = (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
-            | (self.cur_l3_mmio_index << Granule64KiB::SHIFT);
+        let addr = Address::new(
+            (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
+                | (self.cur_l3_mmio_index << Granule64KiB::SHIFT),
+        );
         self.cur_l3_mmio_index += num_pages;
 
-        Ok(PageSliceDescriptor::from_addr(
-            Address::new(addr),
-            num_pages,
-        ))
+        Ok(PageSliceDescriptor::from_addr(addr, num_pages))
     }
 
     fn is_virt_page_slice_mmio(&self, virt_pages: &PageSliceDescriptor<Virtual>) -> bool {
@@ -435,7 +437,7 @@ impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::Transla
 //--------------------------------------------------------------------------------------------------
 
 #[cfg(test)]
-pub type MinSizeKernelTranslationTable = FixedSizeTranslationTable<1>;
+pub type MinSizeTranslationTable = FixedSizeTranslationTable<1>;
 
 #[cfg(test)]
 mod tests {
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs
index f63a9e9bb..abf8f89cc 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs
@@ -5,7 +5,7 @@
 //! BSP console facilities.
 
 use super::memory;
-use crate::{bsp::device_driver, console, cpu};
+use crate::{bsp::device_driver, console, cpu, driver};
 use core::fmt;
 
 //--------------------------------------------------------------------------------------------------
@@ -23,7 +23,7 @@ use core::fmt;
 ///
 /// - Use only for printing during a panic.
 pub unsafe fn panic_console_out() -> impl fmt::Write {
-    use crate::driver::interface::DeviceDriver;
+    use driver::interface::DeviceDriver;
 
     let mut panic_gpio = device_driver::PanicGPIO::new(memory::map::mmio::GPIO_START.into_usize());
     let mut panic_uart =
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
index 76b93e47a..842384dea 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
@@ -7,15 +7,23 @@
 use crate::{
     common,
     memory::{
-        mmu as kernel_mmu,
+        mmu as generic_mmu,
         mmu::{
-            AccessPermissions, AddressSpaceSize, AttributeFields, MemAttributes, Page,
-            PageSliceDescriptor, TranslationGranule,
+            AccessPermissions, AddressSpace, AssociatedTranslationTable, AttributeFields,
+            MemAttributes, Page, PageSliceDescriptor, TranslationGranule,
         },
         Physical, Virtual,
     },
+    synchronization::InitStateLock,
 };
 
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+type KernelTranslationTable =
+    <KernelVirtAddrSpace as AssociatedTranslationTable>::TableStartFromBottom;
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -24,8 +32,21 @@ use crate::{
 /// derive respective data structures and their sizes. For example, the `crate::memory::mmu::Page`.
 pub type KernelGranule = TranslationGranule<{ 64 * 1024 }>;
 
-/// The address space size chosen by this BSP.
-pub type KernelVirtAddrSpaceSize = AddressSpaceSize<{ 8 * 1024 * 1024 * 1024 }>;
+/// The kernel's virtual address space defined by this BSP.
+pub type KernelVirtAddrSpace = AddressSpace<{ 8 * 1024 * 1024 * 1024 }>;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+/// The kernel translation tables.
+///
+/// It is mandatory that InitStateLock is transparent.
+///
+/// That is, `size_of(InitStateLock<KernelTranslationTable>) == size_of(KernelTranslationTable)`.
+/// There is a unit tests that checks this porperty.
+static KERNEL_TABLES: InitStateLock<KernelTranslationTable> =
+    InitStateLock::new(KernelTranslationTable::new());
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
@@ -81,6 +102,11 @@ fn phys_data_page_desc() -> PageSliceDescriptor<Physical> {
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
+/// Return a reference to the kernel's translation tables.
+pub fn kernel_translation_tables() -> &'static InitStateLock<KernelTranslationTable> {
+    &KERNEL_TABLES
+}
+
 /// Pointer to the last page of the physical address space.
 pub fn phys_addr_space_end_page() -> *const Page<Physical> {
     common::align_down(
@@ -95,7 +121,7 @@ pub fn phys_addr_space_end_page() -> *const Page<Physical> {
 ///
 /// - Any miscalculation or attribute error will likely be fatal. Needs careful manual checking.
 pub unsafe fn kernel_map_binary() -> Result<(), &'static str> {
-    kernel_mmu::kernel_map_pages_at(
+    generic_mmu::kernel_map_pages_at(
         "Kernel boot-core stack",
         &virt_stack_page_desc(),
         &phys_stack_page_desc(),
@@ -106,7 +132,7 @@ pub unsafe fn kernel_map_binary() -> Result<(), &'static str> {
         },
     )?;
 
-    kernel_mmu::kernel_map_pages_at(
+    generic_mmu::kernel_map_pages_at(
         "Kernel code and RO data",
         &virt_ro_page_desc(),
         &phys_ro_page_desc(),
@@ -117,7 +143,7 @@ pub unsafe fn kernel_map_binary() -> Result<(), &'static str> {
         },
     )?;
 
-    kernel_mmu::kernel_map_pages_at(
+    generic_mmu::kernel_map_pages_at(
         "Kernel data and bss",
         &virt_data_page_desc(),
         &phys_data_page_desc(),
@@ -157,18 +183,27 @@ mod tests {
     #[kernel_test]
     fn virt_mem_layout_has_no_overlaps() {
         let layout = [
-            virt_stack_page_desc().into_usize_range_inclusive(),
-            virt_ro_page_desc().into_usize_range_inclusive(),
-            virt_data_page_desc().into_usize_range_inclusive(),
+            virt_stack_page_desc(),
+            virt_ro_page_desc(),
+            virt_data_page_desc(),
         ];
 
         for (i, first_range) in layout.iter().enumerate() {
             for second_range in layout.iter().skip(i + 1) {
-                assert!(!first_range.contains(second_range.start()));
-                assert!(!first_range.contains(second_range.end()));
-                assert!(!second_range.contains(first_range.start()));
-                assert!(!second_range.contains(first_range.end()));
+                assert!(!first_range.contains(second_range.start_addr()));
+                assert!(!first_range.contains(second_range.end_addr_inclusive()));
+                assert!(!second_range.contains(first_range.start_addr()));
+                assert!(!second_range.contains(first_range.end_addr_inclusive()));
             }
         }
     }
+
+    /// Check if KERNEL_TABLES is in .bss.
+    #[kernel_test]
+    fn kernel_tables_in_bss() {
+        let bss_range = super::super::bss_range_inclusive();
+        let kernel_tables_addr = &KERNEL_TABLES as *const _ as usize as *mut u64;
+
+        assert!(bss_range.contains(&kernel_tables_addr));
+    }
 }
diff --git a/15_virtual_mem_part2_mmio_remap/src/lib.rs b/15_virtual_mem_part2_mmio_remap/src/lib.rs
index dad5e903c..30f684af4 100644
--- a/15_virtual_mem_part2_mmio_remap/src/lib.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/lib.rs
@@ -112,6 +112,7 @@
 #![allow(clippy::clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
 #![feature(asm)]
+#![feature(const_evaluatable_checked)]
 #![feature(const_fn)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(const_generics)]
diff --git a/15_virtual_mem_part2_mmio_remap/src/main.rs b/15_virtual_mem_part2_mmio_remap/src/main.rs
index 11bb6902d..40d3ed410 100644
--- a/15_virtual_mem_part2_mmio_remap/src/main.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/main.rs
@@ -19,7 +19,7 @@ use libkernel::{bsp, cpu, driver, exception, info, memory, state, time, warn};
 ///
 /// - Only a single core must be active and running this function.
 /// - The init calls in this function must appear in the correct order:
-///     - Virtual memory must be activated before the device drivers.
+///     - Caching must be activated before the device drivers.
 ///       - Without it, any atomic operations, e.g. the yet-to-be-introduced spinlocks in the device
 ///         drivers (which currently employ IRQSafeNullLocks instead of spinlocks), will fail to
 ///         work on the RPi SoCs.
@@ -29,10 +29,15 @@ unsafe fn kernel_init() -> ! {
 
     exception::handling_init();
 
-    if let Err(string) = memory::mmu::kernel_map_binary_and_enable_mmu() {
-        panic!("Enabling MMU failed: {}", string);
+    let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
+        Err(string) => panic!("Error mapping kernel binary: {}", string),
+        Ok(addr) => addr,
+    };
+
+    if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
+        panic!("Enabling MMU failed: {}", e);
     }
-    // Printing will silently fail fail from here on, because the driver's MMIO is not remapped yet.
+    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
 
     // Bring up the drivers needed for printing first.
     for i in bsp::driver::driver_manager()
diff --git a/15_virtual_mem_part2_mmio_remap/src/memory.rs b/15_virtual_mem_part2_mmio_remap/src/memory.rs
index 1493b1a94..515731eb7 100644
--- a/15_virtual_mem_part2_mmio_remap/src/memory.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/memory.rs
@@ -7,7 +7,11 @@
 pub mod mmu;
 
 use crate::common;
-use core::{marker::PhantomData, ops::RangeInclusive};
+use core::{
+    fmt,
+    marker::PhantomData,
+    ops::{AddAssign, RangeInclusive, SubAssign},
+};
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -74,6 +78,15 @@ impl<ATYPE: AddressType> core::ops::Add<usize> for Address<ATYPE> {
     }
 }
 
+impl<ATYPE: AddressType> AddAssign for Address<ATYPE> {
+    fn add_assign(&mut self, other: Self) {
+        *self = Self {
+            value: self.value + other.into_usize(),
+            _address_type: PhantomData,
+        };
+    }
+}
+
 impl<ATYPE: AddressType> core::ops::Sub<usize> for Address<ATYPE> {
     type Output = Self;
 
@@ -85,6 +98,44 @@ impl<ATYPE: AddressType> core::ops::Sub<usize> for Address<ATYPE> {
     }
 }
 
+impl<ATYPE: AddressType> SubAssign for Address<ATYPE> {
+    fn sub_assign(&mut self, other: Self) {
+        *self = Self {
+            value: self.value - other.into_usize(),
+            _address_type: PhantomData,
+        };
+    }
+}
+
+impl fmt::Display for Address<Physical> {
+    // Don't expect to see physical addresses greater than 40 bit.
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        let q3: u8 = ((self.value >> 32) & 0xff) as u8;
+        let q2: u16 = ((self.value >> 16) & 0xffff) as u16;
+        let q1: u16 = (self.value & 0xffff) as u16;
+
+        write!(f, "0x")?;
+        write!(f, "{:02x}_", q3)?;
+        write!(f, "{:04x}_", q2)?;
+        write!(f, "{:04x}", q1)
+    }
+}
+
+impl fmt::Display for Address<Virtual> {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        let q4: u16 = ((self.value >> 48) & 0xffff) as u16;
+        let q3: u16 = ((self.value >> 32) & 0xffff) as u16;
+        let q2: u16 = ((self.value >> 16) & 0xffff) as u16;
+        let q1: u16 = (self.value & 0xffff) as u16;
+
+        write!(f, "0x")?;
+        write!(f, "{:04x}_", q4)?;
+        write!(f, "{:04x}_", q3)?;
+        write!(f, "{:04x}_", q2)?;
+        write!(f, "{:04x}", q1)
+    }
+}
+
 /// Zero out an inclusive memory range.
 ///
 /// # Safety
diff --git a/15_virtual_mem_part2_mmio_remap/src/memory/mmu.rs b/15_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
index b02055937..7a0115af0 100644
--- a/15_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
@@ -17,6 +17,7 @@ use crate::{
     memory::{Address, Physical, Virtual},
     synchronization, warn,
 };
+use core::fmt;
 
 pub use types::*;
 
@@ -24,30 +25,48 @@ pub use types::*;
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
+/// MMU enable errors variants.
+#[allow(missing_docs)]
+#[derive(Debug)]
+pub enum MMUEnableError {
+    AlreadyEnabled,
+    Other(&'static str),
+}
+
 /// Memory Management interfaces.
 pub mod interface {
     use super::*;
 
     /// MMU functions.
     pub trait MMU {
-        /// Turns on the MMU.
+        /// Turns on the MMU for the first time and enables data and instruction caching.
         ///
         /// # Safety
         ///
-        /// - Must only be called after the kernel translation tables have been init()'ed.
         /// - Changes the HW's global state.
-        unsafe fn enable(
+        unsafe fn enable_mmu_and_caching(
             &self,
-            kernel_table_phys_base_addr: Address<Physical>,
-        ) -> Result<(), &'static str>;
+            phys_tables_base_addr: Address<Physical>,
+        ) -> Result<(), MMUEnableError>;
+
+        /// Returns true if the MMU is enabled, false otherwise.
+        fn is_enabled(&self) -> bool;
     }
 }
 
 /// Describes the characteristics of a translation granule.
 pub struct TranslationGranule<const GRANULE_SIZE: usize>;
 
-/// Describes the size of an address space.
-pub struct AddressSpaceSize<const AS_SIZE: usize>;
+/// Describes properties of an address space.
+pub struct AddressSpace<const AS_SIZE: usize>;
+
+/// Intended to be implemented for [`AddressSpace`].
+pub trait AssociatedTranslationTable {
+    /// A translation table whose address range is:
+    ///
+    /// [0, AS_SIZE - 1]
+    type TableStartFromBottom;
+}
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
@@ -70,7 +89,7 @@ unsafe fn kernel_map_pages_at_unchecked(
     phys_pages: &PageSliceDescriptor<Physical>,
     attr: &AttributeFields,
 ) -> Result<(), &'static str> {
-    arch_mmu::kernel_translation_tables()
+    bsp::memory::mmu::kernel_translation_tables()
         .write(|tables| tables.map_pages_at(virt_pages, phys_pages, attr))?;
 
     if let Err(x) = mapping_record::kernel_add(name, virt_pages, phys_pages, attr) {
@@ -84,6 +103,15 @@ unsafe fn kernel_map_pages_at_unchecked(
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
+impl fmt::Display for MMUEnableError {
+    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+        match self {
+            MMUEnableError::AlreadyEnabled => write!(f, "MMU is already enabled"),
+            MMUEnableError::Other(x) => write!(f, "{}", x),
+        }
+    }
+}
+
 impl<const GRANULE_SIZE: usize> TranslationGranule<GRANULE_SIZE> {
     /// The granule's size.
     pub const SIZE: usize = Self::size_checked();
@@ -101,22 +129,18 @@ impl<const GRANULE_SIZE: usize> TranslationGranule<GRANULE_SIZE> {
     }
 }
 
-impl<const AS_SIZE: usize> AddressSpaceSize<AS_SIZE> {
+impl<const AS_SIZE: usize> AddressSpace<AS_SIZE> {
     /// The address space size.
     pub const SIZE: usize = Self::size_checked();
 
     /// The address space shift, aka log2(size).
-    pub const SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
+    pub const SIZE_SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
 
     const fn size_checked() -> usize {
         assert!(AS_SIZE.is_power_of_two());
-        assert!(arch_mmu::MIN_ADDR_SPACE_SIZE.is_power_of_two());
-        assert!(arch_mmu::MAX_ADDR_SPACE_SIZE.is_power_of_two());
 
-        // Must adhere to architectural restrictions.
-        assert!(AS_SIZE >= arch_mmu::MIN_ADDR_SPACE_SIZE);
-        assert!(AS_SIZE <= arch_mmu::MAX_ADDR_SPACE_SIZE);
-        assert!((AS_SIZE % arch_mmu::AddrSpaceSizeGranule::SIZE) == 0);
+        // Check for architectural restrictions as well.
+        Self::arch_address_space_size_sanity_checks();
 
         AS_SIZE
     }
@@ -136,7 +160,7 @@ pub unsafe fn kernel_map_pages_at(
     phys_pages: &PageSliceDescriptor<Physical>,
     attr: &AttributeFields,
 ) -> Result<(), &'static str> {
-    let is_mmio = arch_mmu::kernel_translation_tables()
+    let is_mmio = bsp::memory::mmu::kernel_translation_tables()
         .read(|tables| tables.is_virt_page_slice_mmio(virt_pages));
     if is_mmio {
         return Err("Attempt to manually map into MMIO region");
@@ -169,8 +193,9 @@ pub unsafe fn kernel_map_mmio(
         addr
     // Otherwise, allocate a new virtual page slice and map it.
     } else {
-        let virt_pages: PageSliceDescriptor<Virtual> = arch_mmu::kernel_translation_tables()
-            .write(|tables| tables.next_mmio_virt_page_slice(phys_pages.num_pages()))?;
+        let virt_pages: PageSliceDescriptor<Virtual> =
+            bsp::memory::mmu::kernel_translation_tables()
+                .write(|tables| tables.next_mmio_virt_page_slice(phys_pages.num_pages()))?;
 
         kernel_map_pages_at_unchecked(
             name,
@@ -189,19 +214,32 @@ pub unsafe fn kernel_map_mmio(
     Ok(virt_addr + offset_into_start_page)
 }
 
-/// Map the kernel's binary and enable the MMU.
+/// Map the kernel's binary. Returns the translation table's base address.
 ///
 /// # Safety
 ///
-/// - Crucial function during kernel init. Changes the the complete memory view of the processor.
-pub unsafe fn kernel_map_binary_and_enable_mmu() -> Result<(), &'static str> {
-    let phys_base_addr = arch_mmu::kernel_translation_tables().write(|tables| {
-        tables.init();
-        tables.phys_base_address()
-    });
+/// - See [`bsp::memory::mmu::kernel_map_binary()`].
+pub unsafe fn kernel_map_binary() -> Result<Address<Physical>, &'static str> {
+    let phys_kernel_tables_base_addr =
+        bsp::memory::mmu::kernel_translation_tables().write(|tables| {
+            tables.init();
+            tables.phys_base_address()
+        });
 
     bsp::memory::mmu::kernel_map_binary()?;
-    arch_mmu::mmu().enable(phys_base_addr)
+
+    Ok(phys_kernel_tables_base_addr)
+}
+
+/// Enable the MMU and data + instruction caching.
+///
+/// # Safety
+///
+/// - Crucial function during kernel init. Changes the the complete memory view of the processor.
+pub unsafe fn enable_mmu_and_caching(
+    phys_tables_base_addr: Address<Physical>,
+) -> Result<(), MMUEnableError> {
+    arch_mmu::mmu().enable_mmu_and_caching(phys_tables_base_addr)
 }
 
 /// Human-readable print of all recorded kernel mappings.
diff --git a/15_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs b/15_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs
index cd46403fd..791ec4910 100644
--- a/15_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs
@@ -111,12 +111,12 @@ impl MappingRecord {
         const KIB_RSHIFT: u32 = 10; // log2(1024).
         const MIB_RSHIFT: u32 = 20; // log2(1024 * 1024).
 
-        info!("      -----------------------------------------------------------------------------------------------------------------");
+        info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
         info!(
-            "      {:^24}     {:^24}   {:^7}   {:^9}   {:^35}",
+            "      {:^44}     {:^30}   {:^7}   {:^9}   {:^35}",
             "Virtual", "Physical", "Size", "Attr", "Entity"
         );
-        info!("      -----------------------------------------------------------------------------------------------------------------");
+        info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
 
         for i in self
             .inner
@@ -124,10 +124,10 @@ impl MappingRecord {
             .filter(|x| x.is_some())
             .map(|x| x.unwrap())
         {
-            let virt_start = i.virt_start_addr.into_usize();
+            let virt_start = i.virt_start_addr;
             let virt_end_inclusive = virt_start + i.phys_pages.size() - 1;
-            let phys_start = i.phys_pages.start_addr().into_usize();
-            let phys_end_inclusive = i.phys_pages.end_addr_inclusive().into_usize();
+            let phys_start = i.phys_pages.start_addr();
+            let phys_end_inclusive = i.phys_pages.end_addr_inclusive();
             let size = i.phys_pages.size();
 
             let (size, unit) = if (size >> MIB_RSHIFT) > 0 {
@@ -155,7 +155,7 @@ impl MappingRecord {
             };
 
             info!(
-                "      {:#011X}..{:#011X} --> {:#011X}..{:#011X} | \
+                "      {}..{} --> {}..{} | \
                         {: >3} {} | {: <3} {} {: <2} | {}",
                 virt_start,
                 virt_end_inclusive,
@@ -172,14 +172,14 @@ impl MappingRecord {
             for k in i.users[1..].iter() {
                 if let Some(additional_user) = *k {
                     info!(
-                        "                                                                                  | {}",
+                        "                                                                                                            | {}",
                         additional_user
                     );
                 }
             }
         }
 
-        info!("      -----------------------------------------------------------------------------------------------------------------");
+        info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
     }
 }
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs b/15_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs
index 7e16e6060..65af83cb1 100644
--- a/15_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs
@@ -16,7 +16,8 @@ use crate::memory::{
 //--------------------------------------------------------------------------------------------------
 // Architectural Public Reexports
 //--------------------------------------------------------------------------------------------------
-pub use arch_translation_table::KernelTranslationTable;
+#[cfg(target_arch = "aarch64")]
+pub use arch_translation_table::FixedSizeTranslationTable;
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -34,7 +35,7 @@ pub mod interface {
         ///
         /// - Implementor must ensure that this function can run only once or is harmless if invoked
         ///   multiple times.
-        unsafe fn init(&mut self);
+        fn init(&mut self);
 
         /// The translation table's base address to be used for programming the MMU.
         fn phys_base_address(&self) -> Address<Physical>;
@@ -80,17 +81,17 @@ pub mod interface {
 mod tests {
     use super::*;
     use crate::bsp;
-    use arch_translation_table::MinSizeKernelTranslationTable;
+    use arch_translation_table::MinSizeTranslationTable;
     use interface::TranslationTable;
     use test_macros::kernel_test;
 
-    /// Sanity checks for the kernel TranslationTable implementation.
+    /// Sanity checks for the TranslationTable implementation.
     #[kernel_test]
     fn translationtable_implementation_sanity() {
-        // Need to take care that `tables` fits into the stack.
-        let mut tables = MinSizeKernelTranslationTable::new();
+        // This will occupy a lot of space on the stack.
+        let mut tables = MinSizeTranslationTable::new();
 
-        unsafe { tables.init() };
+        tables.init();
 
         let x = tables.next_mmio_virt_page_slice(0);
         assert!(x.is_err());
diff --git a/15_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs b/15_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
index 594315882..f83ebb890 100644
--- a/15_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
@@ -8,7 +8,7 @@ use crate::{
     bsp, common,
     memory::{Address, AddressType, Physical, Virtual},
 };
-use core::{convert::From, marker::PhantomData, ops::RangeInclusive};
+use core::{convert::From, marker::PhantomData};
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -121,6 +121,11 @@ impl<ATYPE: AddressType> PageSliceDescriptor<ATYPE> {
         self.start + (self.size() - 1)
     }
 
+    /// Check if an address is contained within this descriptor.
+    pub fn contains(&self, addr: Address<ATYPE>) -> bool {
+        (addr >= self.start_addr()) && (addr <= self.end_addr_inclusive())
+    }
+
     /// Return a non-mutable slice of Pages.
     ///
     /// # Safety
@@ -129,14 +134,6 @@ impl<ATYPE: AddressType> PageSliceDescriptor<ATYPE> {
     pub unsafe fn as_slice(&self) -> &[Page<ATYPE>] {
         core::slice::from_raw_parts(self.first_page_ptr(), self.num_pages)
     }
-
-    /// Return the inclusive address range of the slice.
-    pub fn into_usize_range_inclusive(self) -> RangeInclusive<usize> {
-        RangeInclusive::new(
-            self.start_addr().into_usize(),
-            self.end_addr_inclusive().into_usize(),
-        )
-    }
 }
 
 impl From<PageSliceDescriptor<Virtual>> for PageSliceDescriptor<Physical> {
diff --git a/15_virtual_mem_part2_mmio_remap/src/synchronization.rs b/15_virtual_mem_part2_mmio_remap/src/synchronization.rs
index fe9d454a8..94582732c 100644
--- a/15_virtual_mem_part2_mmio_remap/src/synchronization.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/synchronization.rs
@@ -139,3 +139,21 @@ impl<T> interface::ReadWriteEx for InitStateLock<T> {
         f(data)
     }
 }
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// InitStateLock must be transparent.
+    #[kernel_test]
+    fn init_state_lock_is_transparent() {
+        use core::mem::size_of;
+
+        assert_eq!(size_of::<InitStateLock<u64>>(), size_of::<u64>());
+    }
+}
diff --git a/15_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs b/15_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
index 45f12a1f7..940866a03 100644
--- a/15_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
+++ b/15_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
@@ -29,11 +29,19 @@ unsafe fn kernel_init() -> ! {
     println!("Testing synchronous exception handling by causing a page fault");
     println!("-------------------------------------------------------------------\n");
 
-    if let Err(string) = memory::mmu::kernel_map_binary_and_enable_mmu() {
-        println!("Enabling MMU failed: {}", string);
+    let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
+        Err(string) => {
+            println!("Error mapping kernel binary: {}", string);
+            cpu::qemu_exit_failure()
+        }
+        Ok(addr) => addr,
+    };
+
+    if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
+        println!("Enabling MMU failed: {}", e);
         cpu::qemu_exit_failure()
     }
-    // Printing will silently fail fail from here on, because the driver's MMIO is not remapped yet.
+    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
 
     // Bring up the drivers needed for printing first.
     for i in bsp::driver::driver_manager()

From fa4a2de3317959124be724b229ad3e28ccdc9f87 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 15 Mar 2021 22:20:26 +0100
Subject: [PATCH 038/214] MMIODescriptors are always physical

---
 15_virtual_mem_part2_mmio_remap/README.md     | 138 ++++++++----------
 .../src/bsp/device_driver/arm/gicv2.rs        |  25 ++--
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  17 +--
 .../bcm/bcm2xxx_interrupt_controller.rs       |   8 +-
 .../peripheral_ic.rs                          |  15 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  13 +-
 .../src/memory/mmu.rs                         |   8 +-
 .../src/memory/mmu/mapping_record.rs          |   4 +-
 .../src/memory/mmu/types.rs                   |  16 +-
 9 files changed, 111 insertions(+), 133 deletions(-)

diff --git a/15_virtual_mem_part2_mmio_remap/README.md b/15_virtual_mem_part2_mmio_remap/README.md
index ec117146f..9a6c6df64 100644
--- a/15_virtual_mem_part2_mmio_remap/README.md
+++ b/15_virtual_mem_part2_mmio_remap/README.md
@@ -941,25 +941,22 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gi
 diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs 15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs
 --- 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs
 +++ 15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs
-@@ -79,7 +79,11 @@
+@@ -79,7 +79,8 @@
  mod gicc;
  mod gicd;
 
 -use crate::{bsp, cpu, driver, exception, synchronization, synchronization::InitStateLock};
-+use crate::{
-+    bsp, cpu, driver, exception, memory, memory::Physical, synchronization,
-+    synchronization::InitStateLock,
-+};
++use crate::{bsp, cpu, driver, exception, memory, synchronization, synchronization::InitStateLock};
 +use core::sync::atomic::{AtomicBool, Ordering};
 
  //--------------------------------------------------------------------------------------------------
  // Private Definitions
-@@ -96,12 +100,18 @@
+@@ -96,12 +97,18 @@
 
  /// Representation of the GIC.
  pub struct GICv2 {
-+    gicd_phys_mmio_descriptor: memory::mmu::MMIODescriptor<Physical>,
-+    gicc_phys_mmio_descriptor: memory::mmu::MMIODescriptor<Physical>,
++    gicd_mmio_descriptor: memory::mmu::MMIODescriptor,
++    gicc_mmio_descriptor: memory::mmu::MMIODescriptor,
 +
      /// The Distributor.
      gicd: gicd::GICD,
@@ -973,7 +970,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs
      /// Stores registered IRQ handlers. Writable only during kernel init. RO afterwards.
      handler_table: InitStateLock<HandlerTable>,
  }
-@@ -118,11 +128,17 @@
+@@ -118,11 +125,17 @@
      ///
      /// # Safety
      ///
@@ -981,21 +978,21 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs
 -    pub const unsafe fn new(gicd_mmio_start_addr: usize, gicc_mmio_start_addr: usize) -> Self {
 +    /// - The user must ensure to provide correct MMIO descriptors.
 +    pub const unsafe fn new(
-+        gicd_phys_mmio_descriptor: memory::mmu::MMIODescriptor<Physical>,
-+        gicc_phys_mmio_descriptor: memory::mmu::MMIODescriptor<Physical>,
++        gicd_mmio_descriptor: memory::mmu::MMIODescriptor,
++        gicc_mmio_descriptor: memory::mmu::MMIODescriptor,
 +    ) -> Self {
          Self {
 -            gicd: gicd::GICD::new(gicd_mmio_start_addr),
 -            gicc: gicc::GICC::new(gicc_mmio_start_addr),
-+            gicd_phys_mmio_descriptor,
-+            gicc_phys_mmio_descriptor,
-+            gicd: gicd::GICD::new(gicd_phys_mmio_descriptor.start_addr().into_usize()),
-+            gicc: gicc::GICC::new(gicc_phys_mmio_descriptor.start_addr().into_usize()),
++            gicd_mmio_descriptor,
++            gicc_mmio_descriptor,
++            gicd: gicd::GICD::new(gicd_mmio_descriptor.start_addr().into_usize()),
++            gicc: gicc::GICC::new(gicc_mmio_descriptor.start_addr().into_usize()),
 +            is_mmio_remapped: AtomicBool::new(false),
              handler_table: InitStateLock::new([None; Self::NUM_IRQS]),
          }
      }
-@@ -139,6 +155,22 @@
+@@ -139,6 +152,22 @@
      }
 
      unsafe fn init(&self) -> Result<(), &'static str> {
@@ -1004,11 +1001,11 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs
 +            let mut virt_addr;
 +
 +            // GICD
-+            virt_addr = memory::mmu::kernel_map_mmio("GICD", &self.gicd_phys_mmio_descriptor)?;
++            virt_addr = memory::mmu::kernel_map_mmio("GICD", &self.gicd_mmio_descriptor)?;
 +            self.gicd.set_mmio(virt_addr.into_usize());
 +
 +            // GICC
-+            virt_addr = memory::mmu::kernel_map_mmio("GICC", &self.gicc_phys_mmio_descriptor)?;
++            virt_addr = memory::mmu::kernel_map_mmio("GICC", &self.gicc_mmio_descriptor)?;
 +            self.gicc.set_mmio(virt_addr.into_usize());
 +
 +            // Conclude remapping.
@@ -1027,9 +1024,8 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
 
  use crate::{
 -    bsp::device_driver::common::MMIODerefWrapper, driver, synchronization,
--    synchronization::IRQSafeNullLock,
-+    bsp::device_driver::common::MMIODerefWrapper, driver, memory, memory::Physical,
-+    synchronization, synchronization::IRQSafeNullLock,
++    bsp::device_driver::common::MMIODerefWrapper, driver, memory, synchronization,
+     synchronization::IRQSafeNullLock,
  };
 +use core::sync::atomic::{AtomicUsize, Ordering};
  use register::{mmio::*, register_bitfields, register_structs};
@@ -1039,7 +1035,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
 
  /// Representation of the GPIO HW.
  pub struct GPIO {
-+    phys_mmio_descriptor: memory::mmu::MMIODescriptor<Physical>,
++    mmio_descriptor: memory::mmu::MMIODescriptor,
 +    virt_mmio_start_addr: AtomicUsize,
      inner: IRQSafeNullLock<GPIOInner>,
  }
@@ -1064,32 +1060,29 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
      /// Disable pull-up/down on pins 14 and 15.
      #[cfg(feature = "bsp_rpi3")]
      fn disable_pud_14_15_bcm2837(&mut self) {
-@@ -190,10 +206,14 @@
+@@ -190,10 +206,12 @@
      ///
      /// # Safety
      ///
 -    /// - The user must ensure to provide a correct MMIO start address.
 -    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
 +    /// - The user must ensure to provide correct MMIO descriptors.
-+    pub const unsafe fn new(phys_mmio_descriptor: memory::mmu::MMIODescriptor<Physical>) -> Self {
++    pub const unsafe fn new(mmio_descriptor: memory::mmu::MMIODescriptor) -> Self {
          Self {
 -            inner: IRQSafeNullLock::new(GPIOInner::new(mmio_start_addr)),
-+            phys_mmio_descriptor,
++            mmio_descriptor,
 +            virt_mmio_start_addr: AtomicUsize::new(0),
-+            inner: IRQSafeNullLock::new(GPIOInner::new(
-+                phys_mmio_descriptor.start_addr().into_usize(),
-+            )),
++            inner: IRQSafeNullLock::new(GPIOInner::new(mmio_descriptor.start_addr().into_usize())),
          }
      }
 
-@@ -212,4 +232,27 @@
+@@ -212,4 +230,26 @@
      fn compatible(&self) -> &'static str {
          "BCM GPIO"
      }
 +
 +    unsafe fn init(&self) -> Result<(), &'static str> {
-+        let virt_addr =
-+            memory::mmu::kernel_map_mmio(self.compatible(), &self.phys_mmio_descriptor)?;
++        let virt_addr = memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?;
 +
 +        self.inner
 +            .lock(|inner| inner.init(Some(virt_addr.into_usize())))?;
@@ -1114,7 +1107,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
 diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs 15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
 --- 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
 +++ 15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
-@@ -2,12 +2,14 @@
+@@ -2,12 +2,12 @@
  //
  // Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
@@ -1125,17 +1118,15 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
  use crate::{
      bsp::device_driver::common::MMIODerefWrapper,
 -    exception, synchronization,
-+    driver, exception, memory,
-+    memory::Physical,
-+    synchronization,
++    driver, exception, memory, synchronization,
      synchronization::{IRQSafeNullLock, InitStateLock},
  };
  use register::{mmio::*, register_structs};
-@@ -51,11 +53,13 @@
+@@ -51,11 +51,13 @@
 
  /// Representation of the peripheral interrupt controller.
  pub struct PeripheralIC {
-+    phys_mmio_descriptor: memory::mmu::MMIODescriptor<Physical>,
++    mmio_descriptor: memory::mmu::MMIODescriptor,
 +
      /// Access to write registers is guarded with a lock.
      wo_registers: IRQSafeNullLock<WriteOnlyRegisters>,
@@ -1146,20 +1137,20 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
 
      /// Stores registered IRQ handlers. Writable only during kernel init. RO afterwards.
      handler_table: InitStateLock<HandlerTable>,
-@@ -70,21 +74,26 @@
+@@ -70,21 +72,26 @@
      ///
      /// # Safety
      ///
 -    /// - The user must ensure to provide a correct MMIO start address.
 -    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
 +    /// - The user must ensure to provide correct MMIO descriptors.
-+    pub const unsafe fn new(phys_mmio_descriptor: memory::mmu::MMIODescriptor<Physical>) -> Self {
-+        let addr = phys_mmio_descriptor.start_addr().into_usize();
++    pub const unsafe fn new(mmio_descriptor: memory::mmu::MMIODescriptor) -> Self {
++        let addr = mmio_descriptor.start_addr().into_usize();
 +
          Self {
 -            wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(mmio_start_addr)),
 -            ro_registers: ReadOnlyRegisters::new(mmio_start_addr),
-+            phys_mmio_descriptor,
++            mmio_descriptor,
 +            wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(addr)),
 +            ro_registers: InitStateLock::new(ReadOnlyRegisters::new(addr)),
              handler_table: InitStateLock::new([None; InterruptController::NUM_PERIPHERAL_IRQS]),
@@ -1180,7 +1171,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
      }
  }
 
-@@ -93,6 +102,25 @@
+@@ -93,6 +100,24 @@
  //------------------------------------------------------------------------------
  use synchronization::interface::{Mutex, ReadWriteEx};
 
@@ -1191,8 +1182,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
 +
 +    unsafe fn init(&self) -> Result<(), &'static str> {
 +        let virt_addr =
-+            memory::mmu::kernel_map_mmio(self.compatible(), &self.phys_mmio_descriptor)?
-+                .into_usize();
++            memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?.into_usize();
 +
 +        self.wo_registers
 +            .lock(|regs| *regs = WriteOnlyRegisters::new(virt_addr));
@@ -1215,7 +1205,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
  mod peripheral_ic;
 
 -use crate::{driver, exception};
-+use crate::{driver, exception, memory, memory::Physical};
++use crate::{driver, exception, memory};
 
  //--------------------------------------------------------------------------------------------------
  // Private Definitions
@@ -1227,12 +1217,12 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
 -    pub const unsafe fn new(_local_mmio_start_addr: usize, periph_mmio_start_addr: usize) -> Self {
 +    /// - The user must ensure to provide correct MMIO descriptors.
 +    pub const unsafe fn new(
-+        _phys_local_mmio_descriptor: memory::mmu::MMIODescriptor<Physical>,
-+        phys_periph_mmio_descriptor: memory::mmu::MMIODescriptor<Physical>,
++        _local_mmio_descriptor: memory::mmu::MMIODescriptor,
++        periph_mmio_descriptor: memory::mmu::MMIODescriptor,
 +    ) -> Self {
          Self {
 -            periph: peripheral_ic::PeripheralIC::new(periph_mmio_start_addr),
-+            periph: peripheral_ic::PeripheralIC::new(phys_periph_mmio_descriptor),
++            periph: peripheral_ic::PeripheralIC::new(periph_mmio_descriptor),
          }
      }
  }
@@ -1256,15 +1246,14 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
 
  use crate::{
 -    bsp, bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, exception,
--    synchronization, synchronization::IRQSafeNullLock,
 +    bsp, bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, exception, memory,
-+    memory::Physical, synchronization, synchronization::IRQSafeNullLock,
-+};
+     synchronization, synchronization::IRQSafeNullLock,
+ };
+-use core::fmt;
 +use core::{
 +    fmt,
 +    sync::atomic::{AtomicUsize, Ordering},
- };
--use core::fmt;
++};
  use register::{mmio::*, register_bitfields, register_structs};
 
  //--------------------------------------------------------------------------------------------------
@@ -1272,7 +1261,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
 
  /// Representation of the UART.
  pub struct PL011Uart {
-+    phys_mmio_descriptor: memory::mmu::MMIODescriptor<Physical>,
++    mmio_descriptor: memory::mmu::MMIODescriptor,
 +    virt_mmio_start_addr: AtomicUsize,
      inner: IRQSafeNullLock<PL011UartInner>,
      irq_number: bsp::device_driver::IRQNumber,
@@ -1312,26 +1301,25 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
 +    /// - The user must ensure to provide correct IRQ numbers.
      pub const unsafe fn new(
 -        mmio_start_addr: usize,
-+        phys_mmio_descriptor: memory::mmu::MMIODescriptor<Physical>,
++        mmio_descriptor: memory::mmu::MMIODescriptor,
          irq_number: bsp::device_driver::IRQNumber,
      ) -> Self {
          Self {
 -            inner: IRQSafeNullLock::new(PL011UartInner::new(mmio_start_addr)),
-+            phys_mmio_descriptor,
++            mmio_descriptor,
 +            virt_mmio_start_addr: AtomicUsize::new(0),
 +            inner: IRQSafeNullLock::new(PL011UartInner::new(
-+                phys_mmio_descriptor.start_addr().into_usize(),
++                mmio_descriptor.start_addr().into_usize(),
 +            )),
              irq_number,
          }
      }
-@@ -413,7 +433,14 @@
+@@ -413,7 +433,13 @@
      }
 
      unsafe fn init(&self) -> Result<(), &'static str> {
 -        self.inner.lock(|inner| inner.init());
-+        let virt_addr =
-+            memory::mmu::kernel_map_mmio(self.compatible(), &self.phys_mmio_descriptor)?;
++        let virt_addr = memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?;
 +
 +        self.inner
 +            .lock(|inner| inner.init(Some(virt_addr.into_usize())))?;
@@ -1341,7 +1329,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
 
          Ok(())
      }
-@@ -432,6 +459,16 @@
+@@ -432,6 +458,16 @@
 
          Ok(())
      }
@@ -2319,10 +2307,10 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/mapping_record.rs 1
 +}
 +
 +pub fn kernel_find_and_insert_mmio_duplicate(
-+    phys_mmio_descriptor: &MMIODescriptor<Physical>,
++    mmio_descriptor: &MMIODescriptor,
 +    new_user: &'static str,
 +) -> Option<Address<Virtual>> {
-+    let phys_pages: PageSliceDescriptor<Physical> = phys_mmio_descriptor.clone().into();
++    let phys_pages: PageSliceDescriptor<Physical> = mmio_descriptor.clone().into();
 +
 +    KERNEL_MAPPING_RECORD.write(|mr| {
 +        let dup = mr.find_duplicate(&phys_pages)?;
@@ -2512,8 +2500,8 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 15_virtual
 +
 +/// An MMIO descriptor for use in device drivers.
 +#[derive(Copy, Clone)]
-+pub struct MMIODescriptor<ATYPE: AddressType> {
-+    start_addr: Address<ATYPE>,
++pub struct MMIODescriptor {
++    start_addr: Address<Physical>,
 +    size: usize,
 +}
 +
@@ -2602,8 +2590,8 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 15_virtual
 +    }
 +}
 +
-+impl<ATYPE: AddressType> From<MMIODescriptor<ATYPE>> for PageSliceDescriptor<ATYPE> {
-+    fn from(desc: MMIODescriptor<ATYPE>) -> Self {
++impl From<MMIODescriptor> for PageSliceDescriptor<Physical> {
++    fn from(desc: MMIODescriptor) -> Self {
 +        let start_page_addr = desc
 +            .start_addr
 +            .align_down(bsp::memory::mmu::KernelGranule::SIZE);
@@ -2623,21 +2611,21 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 15_virtual
 +// MMIODescriptor
 +//------------------------------------------------------------------------------
 +
-+impl<ATYPE: AddressType> MMIODescriptor<ATYPE> {
++impl MMIODescriptor {
 +    /// Create an instance.
-+    pub const fn new(start_addr: Address<ATYPE>, size: usize) -> Self {
++    pub const fn new(start_addr: Address<Physical>, size: usize) -> Self {
 +        assert!(size > 0);
 +
 +        Self { start_addr, size }
 +    }
 +
 +    /// Return the start address.
-+    pub const fn start_addr(&self) -> Address<ATYPE> {
++    pub const fn start_addr(&self) -> Address<Physical> {
 +        self.start_addr
 +    }
 +
 +    /// Return the inclusive end address.
-+    pub fn end_addr_inclusive(&self) -> Address<ATYPE> {
++    pub fn end_addr_inclusive(&self) -> Address<Physical> {
 +        self.start_addr + (self.size - 1)
 +    }
 +
@@ -2970,15 +2958,15 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 15_virtual_mem_p
 +/// - Same as `kernel_map_pages_at_unchecked()`, minus the aliasing part.
 +pub unsafe fn kernel_map_mmio(
 +    name: &'static str,
-+    phys_mmio_descriptor: &MMIODescriptor<Physical>,
++    mmio_descriptor: &MMIODescriptor,
 +) -> Result<Address<Virtual>, &'static str> {
-+    let phys_pages: PageSliceDescriptor<Physical> = phys_mmio_descriptor.clone().into();
++    let phys_pages: PageSliceDescriptor<Physical> = mmio_descriptor.clone().into();
 +    let offset_into_start_page =
-+        phys_mmio_descriptor.start_addr().into_usize() & bsp::memory::mmu::KernelGranule::MASK;
++        mmio_descriptor.start_addr().into_usize() & bsp::memory::mmu::KernelGranule::MASK;
 +
 +    // Check if an identical page slice has been mapped for another driver. If so, reuse it.
 +    let virt_addr = if let Some(addr) =
-+        mapping_record::kernel_find_and_insert_mmio_duplicate(phys_mmio_descriptor, name)
++        mapping_record::kernel_find_and_insert_mmio_duplicate(mmio_descriptor, name)
 +    {
 +        addr
 +    // Otherwise, allocate a new virtual page slice and map it.
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs
index 4c0e11249..c317abaea 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs
@@ -79,10 +79,7 @@
 mod gicc;
 mod gicd;
 
-use crate::{
-    bsp, cpu, driver, exception, memory, memory::Physical, synchronization,
-    synchronization::InitStateLock,
-};
+use crate::{bsp, cpu, driver, exception, memory, synchronization, synchronization::InitStateLock};
 use core::sync::atomic::{AtomicBool, Ordering};
 
 //--------------------------------------------------------------------------------------------------
@@ -100,8 +97,8 @@ pub type IRQNumber = exception::asynchronous::IRQNumber<{ GICv2::MAX_IRQ_NUMBER
 
 /// Representation of the GIC.
 pub struct GICv2 {
-    gicd_phys_mmio_descriptor: memory::mmu::MMIODescriptor<Physical>,
-    gicc_phys_mmio_descriptor: memory::mmu::MMIODescriptor<Physical>,
+    gicd_mmio_descriptor: memory::mmu::MMIODescriptor,
+    gicc_mmio_descriptor: memory::mmu::MMIODescriptor,
 
     /// The Distributor.
     gicd: gicd::GICD,
@@ -130,14 +127,14 @@ impl GICv2 {
     ///
     /// - The user must ensure to provide correct MMIO descriptors.
     pub const unsafe fn new(
-        gicd_phys_mmio_descriptor: memory::mmu::MMIODescriptor<Physical>,
-        gicc_phys_mmio_descriptor: memory::mmu::MMIODescriptor<Physical>,
+        gicd_mmio_descriptor: memory::mmu::MMIODescriptor,
+        gicc_mmio_descriptor: memory::mmu::MMIODescriptor,
     ) -> Self {
         Self {
-            gicd_phys_mmio_descriptor,
-            gicc_phys_mmio_descriptor,
-            gicd: gicd::GICD::new(gicd_phys_mmio_descriptor.start_addr().into_usize()),
-            gicc: gicc::GICC::new(gicc_phys_mmio_descriptor.start_addr().into_usize()),
+            gicd_mmio_descriptor,
+            gicc_mmio_descriptor,
+            gicd: gicd::GICD::new(gicd_mmio_descriptor.start_addr().into_usize()),
+            gicc: gicc::GICC::new(gicc_mmio_descriptor.start_addr().into_usize()),
             is_mmio_remapped: AtomicBool::new(false),
             handler_table: InitStateLock::new([None; Self::NUM_IRQS]),
         }
@@ -160,11 +157,11 @@ impl driver::interface::DeviceDriver for GICv2 {
             let mut virt_addr;
 
             // GICD
-            virt_addr = memory::mmu::kernel_map_mmio("GICD", &self.gicd_phys_mmio_descriptor)?;
+            virt_addr = memory::mmu::kernel_map_mmio("GICD", &self.gicd_mmio_descriptor)?;
             self.gicd.set_mmio(virt_addr.into_usize());
 
             // GICC
-            virt_addr = memory::mmu::kernel_map_mmio("GICC", &self.gicc_phys_mmio_descriptor)?;
+            virt_addr = memory::mmu::kernel_map_mmio("GICC", &self.gicc_mmio_descriptor)?;
             self.gicc.set_mmio(virt_addr.into_usize());
 
             // Conclude remapping.
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 45dbe75c6..e444812ba 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -5,8 +5,8 @@
 //! GPIO Driver.
 
 use crate::{
-    bsp::device_driver::common::MMIODerefWrapper, driver, memory, memory::Physical,
-    synchronization, synchronization::IRQSafeNullLock,
+    bsp::device_driver::common::MMIODerefWrapper, driver, memory, synchronization,
+    synchronization::IRQSafeNullLock,
 };
 use core::sync::atomic::{AtomicUsize, Ordering};
 use register::{mmio::*, register_bitfields, register_structs};
@@ -118,7 +118,7 @@ pub use GPIOInner as PanicGPIO;
 
 /// Representation of the GPIO HW.
 pub struct GPIO {
-    phys_mmio_descriptor: memory::mmu::MMIODescriptor<Physical>,
+    mmio_descriptor: memory::mmu::MMIODescriptor,
     virt_mmio_start_addr: AtomicUsize,
     inner: IRQSafeNullLock<GPIOInner>,
 }
@@ -207,13 +207,11 @@ impl GPIO {
     /// # Safety
     ///
     /// - The user must ensure to provide correct MMIO descriptors.
-    pub const unsafe fn new(phys_mmio_descriptor: memory::mmu::MMIODescriptor<Physical>) -> Self {
+    pub const unsafe fn new(mmio_descriptor: memory::mmu::MMIODescriptor) -> Self {
         Self {
-            phys_mmio_descriptor,
+            mmio_descriptor,
             virt_mmio_start_addr: AtomicUsize::new(0),
-            inner: IRQSafeNullLock::new(GPIOInner::new(
-                phys_mmio_descriptor.start_addr().into_usize(),
-            )),
+            inner: IRQSafeNullLock::new(GPIOInner::new(mmio_descriptor.start_addr().into_usize())),
         }
     }
 
@@ -234,8 +232,7 @@ impl driver::interface::DeviceDriver for GPIO {
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
-        let virt_addr =
-            memory::mmu::kernel_map_mmio(self.compatible(), &self.phys_mmio_descriptor)?;
+        let virt_addr = memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?;
 
         self.inner
             .lock(|inner| inner.init(Some(virt_addr.into_usize())))?;
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
index 69c001adf..0bd84e3cf 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -6,7 +6,7 @@
 
 mod peripheral_ic;
 
-use crate::{driver, exception, memory, memory::Physical};
+use crate::{driver, exception, memory};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -80,11 +80,11 @@ impl InterruptController {
     ///
     /// - The user must ensure to provide correct MMIO descriptors.
     pub const unsafe fn new(
-        _phys_local_mmio_descriptor: memory::mmu::MMIODescriptor<Physical>,
-        phys_periph_mmio_descriptor: memory::mmu::MMIODescriptor<Physical>,
+        _local_mmio_descriptor: memory::mmu::MMIODescriptor,
+        periph_mmio_descriptor: memory::mmu::MMIODescriptor,
     ) -> Self {
         Self {
-            periph: peripheral_ic::PeripheralIC::new(phys_periph_mmio_descriptor),
+            periph: peripheral_ic::PeripheralIC::new(periph_mmio_descriptor),
         }
     }
 }
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index 654ac3c70..abc3af711 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -7,9 +7,7 @@
 use super::{InterruptController, PendingIRQs, PeripheralIRQ};
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper,
-    driver, exception, memory,
-    memory::Physical,
-    synchronization,
+    driver, exception, memory, synchronization,
     synchronization::{IRQSafeNullLock, InitStateLock},
 };
 use register::{mmio::*, register_structs};
@@ -53,7 +51,7 @@ type HandlerTable =
 
 /// Representation of the peripheral interrupt controller.
 pub struct PeripheralIC {
-    phys_mmio_descriptor: memory::mmu::MMIODescriptor<Physical>,
+    mmio_descriptor: memory::mmu::MMIODescriptor,
 
     /// Access to write registers is guarded with a lock.
     wo_registers: IRQSafeNullLock<WriteOnlyRegisters>,
@@ -75,11 +73,11 @@ impl PeripheralIC {
     /// # Safety
     ///
     /// - The user must ensure to provide correct MMIO descriptors.
-    pub const unsafe fn new(phys_mmio_descriptor: memory::mmu::MMIODescriptor<Physical>) -> Self {
-        let addr = phys_mmio_descriptor.start_addr().into_usize();
+    pub const unsafe fn new(mmio_descriptor: memory::mmu::MMIODescriptor) -> Self {
+        let addr = mmio_descriptor.start_addr().into_usize();
 
         Self {
-            phys_mmio_descriptor,
+            mmio_descriptor,
             wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(addr)),
             ro_registers: InitStateLock::new(ReadOnlyRegisters::new(addr)),
             handler_table: InitStateLock::new([None; InterruptController::NUM_PERIPHERAL_IRQS]),
@@ -109,8 +107,7 @@ impl driver::interface::DeviceDriver for PeripheralIC {
 
     unsafe fn init(&self) -> Result<(), &'static str> {
         let virt_addr =
-            memory::mmu::kernel_map_mmio(self.compatible(), &self.phys_mmio_descriptor)?
-                .into_usize();
+            memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?.into_usize();
 
         self.wo_registers
             .lock(|regs| *regs = WriteOnlyRegisters::new(virt_addr));
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 4b1e9c937..3adb9137d 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -11,7 +11,7 @@
 
 use crate::{
     bsp, bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, exception, memory,
-    memory::Physical, synchronization, synchronization::IRQSafeNullLock,
+    synchronization, synchronization::IRQSafeNullLock,
 };
 use core::{
     fmt,
@@ -235,7 +235,7 @@ pub use PL011UartInner as PanicUart;
 
 /// Representation of the UART.
 pub struct PL011Uart {
-    phys_mmio_descriptor: memory::mmu::MMIODescriptor<Physical>,
+    mmio_descriptor: memory::mmu::MMIODescriptor,
     virt_mmio_start_addr: AtomicUsize,
     inner: IRQSafeNullLock<PL011UartInner>,
     irq_number: bsp::device_driver::IRQNumber,
@@ -408,14 +408,14 @@ impl PL011Uart {
     /// - The user must ensure to provide correct MMIO descriptors.
     /// - The user must ensure to provide correct IRQ numbers.
     pub const unsafe fn new(
-        phys_mmio_descriptor: memory::mmu::MMIODescriptor<Physical>,
+        mmio_descriptor: memory::mmu::MMIODescriptor,
         irq_number: bsp::device_driver::IRQNumber,
     ) -> Self {
         Self {
-            phys_mmio_descriptor,
+            mmio_descriptor,
             virt_mmio_start_addr: AtomicUsize::new(0),
             inner: IRQSafeNullLock::new(PL011UartInner::new(
-                phys_mmio_descriptor.start_addr().into_usize(),
+                mmio_descriptor.start_addr().into_usize(),
             )),
             irq_number,
         }
@@ -433,8 +433,7 @@ impl driver::interface::DeviceDriver for PL011Uart {
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
-        let virt_addr =
-            memory::mmu::kernel_map_mmio(self.compatible(), &self.phys_mmio_descriptor)?;
+        let virt_addr = memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?;
 
         self.inner
             .lock(|inner| inner.init(Some(virt_addr.into_usize())))?;
diff --git a/15_virtual_mem_part2_mmio_remap/src/memory/mmu.rs b/15_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
index 7a0115af0..e942f7f3e 100644
--- a/15_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
@@ -180,15 +180,15 @@ pub unsafe fn kernel_map_pages_at(
 /// - Same as `kernel_map_pages_at_unchecked()`, minus the aliasing part.
 pub unsafe fn kernel_map_mmio(
     name: &'static str,
-    phys_mmio_descriptor: &MMIODescriptor<Physical>,
+    mmio_descriptor: &MMIODescriptor,
 ) -> Result<Address<Virtual>, &'static str> {
-    let phys_pages: PageSliceDescriptor<Physical> = phys_mmio_descriptor.clone().into();
+    let phys_pages: PageSliceDescriptor<Physical> = mmio_descriptor.clone().into();
     let offset_into_start_page =
-        phys_mmio_descriptor.start_addr().into_usize() & bsp::memory::mmu::KernelGranule::MASK;
+        mmio_descriptor.start_addr().into_usize() & bsp::memory::mmu::KernelGranule::MASK;
 
     // Check if an identical page slice has been mapped for another driver. If so, reuse it.
     let virt_addr = if let Some(addr) =
-        mapping_record::kernel_find_and_insert_mmio_duplicate(phys_mmio_descriptor, name)
+        mapping_record::kernel_find_and_insert_mmio_duplicate(mmio_descriptor, name)
     {
         addr
     // Otherwise, allocate a new virtual page slice and map it.
diff --git a/15_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs b/15_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs
index 791ec4910..eab62fb39 100644
--- a/15_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs
@@ -199,10 +199,10 @@ pub fn kernel_add(
 }
 
 pub fn kernel_find_and_insert_mmio_duplicate(
-    phys_mmio_descriptor: &MMIODescriptor<Physical>,
+    mmio_descriptor: &MMIODescriptor,
     new_user: &'static str,
 ) -> Option<Address<Virtual>> {
-    let phys_pages: PageSliceDescriptor<Physical> = phys_mmio_descriptor.clone().into();
+    let phys_pages: PageSliceDescriptor<Physical> = mmio_descriptor.clone().into();
 
     KERNEL_MAPPING_RECORD.write(|mr| {
         let dup = mr.find_duplicate(&phys_pages)?;
diff --git a/15_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs b/15_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
index f83ebb890..2e52e8f3d 100644
--- a/15_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
@@ -55,8 +55,8 @@ pub struct AttributeFields {
 
 /// An MMIO descriptor for use in device drivers.
 #[derive(Copy, Clone)]
-pub struct MMIODescriptor<ATYPE: AddressType> {
-    start_addr: Address<ATYPE>,
+pub struct MMIODescriptor {
+    start_addr: Address<Physical>,
     size: usize,
 }
 
@@ -145,8 +145,8 @@ impl From<PageSliceDescriptor<Virtual>> for PageSliceDescriptor<Physical> {
     }
 }
 
-impl<ATYPE: AddressType> From<MMIODescriptor<ATYPE>> for PageSliceDescriptor<ATYPE> {
-    fn from(desc: MMIODescriptor<ATYPE>) -> Self {
+impl From<MMIODescriptor> for PageSliceDescriptor<Physical> {
+    fn from(desc: MMIODescriptor) -> Self {
         let start_page_addr = desc
             .start_addr
             .align_down(bsp::memory::mmu::KernelGranule::SIZE);
@@ -166,21 +166,21 @@ impl<ATYPE: AddressType> From<MMIODescriptor<ATYPE>> for PageSliceDescriptor<ATY
 // MMIODescriptor
 //------------------------------------------------------------------------------
 
-impl<ATYPE: AddressType> MMIODescriptor<ATYPE> {
+impl MMIODescriptor {
     /// Create an instance.
-    pub const fn new(start_addr: Address<ATYPE>, size: usize) -> Self {
+    pub const fn new(start_addr: Address<Physical>, size: usize) -> Self {
         assert!(size > 0);
 
         Self { start_addr, size }
     }
 
     /// Return the start address.
-    pub const fn start_addr(&self) -> Address<ATYPE> {
+    pub const fn start_addr(&self) -> Address<Physical> {
         self.start_addr
     }
 
     /// Return the inclusive end address.
-    pub fn end_addr_inclusive(&self) -> Address<ATYPE> {
+    pub fn end_addr_inclusive(&self) -> Address<Physical> {
         self.start_addr + (self.size - 1)
     }
 

From 223989adb9cce379d650b9cd67581c0a26df2f6f Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Tue, 16 Mar 2021 22:36:06 +0100
Subject: [PATCH 039/214] Overhaul linker script

---
 01_wait_forever/Makefile                      |   1 -
 01_wait_forever/src/bsp/raspberrypi/link.ld   |  23 +-
 02_runtime_init/Makefile                      |   1 +
 02_runtime_init/README.md                     |  62 ++-
 02_runtime_init/src/bsp/raspberrypi/link.ld   |  45 +-
 03_hacky_hello_world/Makefile                 |   1 +
 .../src/bsp/raspberrypi/link.ld               |  45 +-
 04_zero_overhead_abstraction/Makefile         |   1 +
 04_zero_overhead_abstraction/README.md        |  37 +-
 .../src/bsp/raspberrypi/link.ld               |  46 ++-
 .../src/bsp/raspberrypi/memory.rs             |  18 +-
 05_safe_globals/Makefile                      |   1 +
 05_safe_globals/src/bsp/raspberrypi/link.ld   |  46 ++-
 05_safe_globals/src/bsp/raspberrypi/memory.rs |  18 +-
 06_drivers_gpio_uart/Makefile                 |   1 +
 06_drivers_gpio_uart/README.md                |  21 +-
 .../src/bsp/raspberrypi/link.ld               |  46 ++-
 .../src/bsp/raspberrypi/memory.rs             |  21 +-
 07_uart_chainloader/README.md                 | 119 +++---
 07_uart_chainloader/demo_payload_rpi3.img     | Bin 6808 -> 6824 bytes
 07_uart_chainloader/demo_payload_rpi4.img     | Bin 6656 -> 6672 bytes
 .../src/bsp/raspberrypi/link.ld               |  49 +--
 .../src/bsp/raspberrypi/memory.rs             |   7 +-
 07_uart_chainloader/src/relocate.rs           |  16 +-
 08_timestamps/Makefile                        |   1 +
 08_timestamps/README.md                       | 117 +++---
 08_timestamps/src/bsp/raspberrypi/link.ld     |  46 ++-
 08_timestamps/src/bsp/raspberrypi/memory.rs   |  21 +-
 09_hw_debug_JTAG/Makefile                     |   1 +
 09_hw_debug_JTAG/src/bsp/raspberrypi/link.ld  |  46 ++-
 .../src/bsp/raspberrypi/memory.rs             |  21 +-
 10_privilege_level/Makefile                   |   1 +
 10_privilege_level/README.md                  |   2 +-
 .../src/bsp/raspberrypi/link.ld               |  46 ++-
 .../src/bsp/raspberrypi/memory.rs             |  21 +-
 .../Makefile                                  |   1 +
 .../README.md                                 |  94 ++---
 .../src/bsp/raspberrypi/link.ld               |  52 ++-
 .../src/bsp/raspberrypi/memory.rs             |  23 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |   6 +-
 12_exceptions_part1_groundwork/Makefile       |   1 +
 12_exceptions_part1_groundwork/README.md      |  52 +--
 .../src/_arch/aarch64/exception.S             |   2 +-
 .../src/_arch/aarch64/exception.rs            |  24 +-
 .../src/bsp/raspberrypi/link.ld               |  55 +--
 .../src/bsp/raspberrypi/memory.rs             |  23 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |   6 +-
 13_integrated_testing/Makefile                |   1 +
 .../src/_arch/aarch64/exception.S             |   2 +-
 .../src/_arch/aarch64/exception.rs            |  24 +-
 .../src/bsp/raspberrypi/link.ld               |  55 +--
 .../src/bsp/raspberrypi/memory.rs             |  23 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |   6 +-
 14_exceptions_part2_peripheral_IRQs/Makefile  |   1 +
 14_exceptions_part2_peripheral_IRQs/README.md |   4 +-
 .../src/_arch/aarch64/exception.S             |   2 +-
 .../src/_arch/aarch64/exception.rs            |  24 +-
 .../src/bsp/raspberrypi/link.ld               |  55 +--
 .../src/bsp/raspberrypi/memory.rs             |  23 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |   6 +-
 15_virtual_mem_part2_mmio_remap/Makefile      |   1 +
 15_virtual_mem_part2_mmio_remap/README.md     | 384 +++++++++++-------
 .../src/_arch/aarch64/exception.S             |   2 +-
 .../src/_arch/aarch64/exception.rs            |  42 +-
 .../src/bsp/raspberrypi/link.ld               |  74 ++--
 .../src/bsp/raspberrypi/memory.rs             |  94 +++--
 .../src/bsp/raspberrypi/memory/mmu.rs         |  89 ++--
 X1_JTAG_boot/Makefile                         |   1 +
 X1_JTAG_boot/jtag_boot_rpi3.img               | Bin 8144 -> 8152 bytes
 X1_JTAG_boot/jtag_boot_rpi4.img               | Bin 6832 -> 6840 bytes
 X1_JTAG_boot/src/bsp/raspberrypi/link.ld      |  46 ++-
 X1_JTAG_boot/src/bsp/raspberrypi/memory.rs    |  21 +-
 72 files changed, 1339 insertions(+), 928 deletions(-)

diff --git a/01_wait_forever/Makefile b/01_wait_forever/Makefile
index eb2cc7323..2e44e7ac5 100644
--- a/01_wait_forever/Makefile
+++ b/01_wait_forever/Makefile
@@ -102,7 +102,6 @@ objdump: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching objdump")
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
-                --section .rodata \
                 $(KERNEL_ELF) | rustfilt
 
 nm: $(KERNEL_ELF)
diff --git a/01_wait_forever/src/bsp/raspberrypi/link.ld b/01_wait_forever/src/bsp/raspberrypi/link.ld
index 81f01c11d..7d649f884 100644
--- a/01_wait_forever/src/bsp/raspberrypi/link.ld
+++ b/01_wait_forever/src/bsp/raspberrypi/link.ld
@@ -3,15 +3,26 @@
  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
+/* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_load_addr = 0x80000;
+
+ENTRY(__rpi_load_addr)
+
+PHDRS
+{
+    segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
+}
+
 SECTIONS
 {
-    /* Set current address to the value from which the RPi starts execution */
-    . = 0x80000;
+    . =  __rpi_load_addr;
 
+    /***********************************************************************************************
+    * Code
+    ***********************************************************************************************/
     .text :
     {
-        *(.text._start) *(.text*)
-    }
-
-    /DISCARD/ : { *(.comment*) }
+        KEEP(*(.text._start))
+        *(.text*)
+    } :segment_rx
 }
diff --git a/02_runtime_init/Makefile b/02_runtime_init/Makefile
index eb2cc7323..a20b283b4 100644
--- a/02_runtime_init/Makefile
+++ b/02_runtime_init/Makefile
@@ -103,6 +103,7 @@ objdump: $(KERNEL_ELF)
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
+                --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
 nm: $(KERNEL_ELF)
diff --git a/02_runtime_init/README.md b/02_runtime_init/README.md
index 9241a1950..5f5245d57 100644
--- a/02_runtime_init/README.md
+++ b/02_runtime_init/README.md
@@ -9,8 +9,7 @@
 ## Notable additions
 
 - More sections in linker script:
-     - `.rodata`, `.data`
-     - `.bss`
+     - `.rodata`, `.got`, `.data`, `.bss`
 - `_start()`:
      - Halt core if core != `core0`.
      - `core0` jumps to the `runtime_init()` Rust function.
@@ -37,6 +36,19 @@ diff -uNr 01_wait_forever/Cargo.toml 02_runtime_init/Cargo.toml
  default = []
  bsp_rpi3 = []
 
+diff -uNr 01_wait_forever/Makefile 02_runtime_init/Makefile
+--- 01_wait_forever/Makefile
++++ 02_runtime_init/Makefile
+@@ -102,6 +102,8 @@
+ 	$(call colorecho, "\nLaunching objdump")
+ 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
+                 --section .text   \
++                --section .rodata \
++                --section .got    \
+                 $(KERNEL_ELF) | rustfilt
+
+ nm: $(KERNEL_ELF)
+
 diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.S 02_runtime_init/src/_arch/aarch64/cpu/boot.S
 --- 01_wait_forever/src/_arch/aarch64/cpu/boot.S
 +++ 02_runtime_init/src/_arch/aarch64/cpu/boot.S
@@ -97,33 +109,45 @@ diff -uNr 01_wait_forever/src/_arch/aarch64/cpu.rs 02_runtime_init/src/_arch/aar
 diff -uNr 01_wait_forever/src/bsp/raspberrypi/link.ld 02_runtime_init/src/bsp/raspberrypi/link.ld
 --- 01_wait_forever/src/bsp/raspberrypi/link.ld
 +++ 02_runtime_init/src/bsp/raspberrypi/link.ld
-@@ -13,5 +13,27 @@
-         *(.text._start) *(.text*)
-     }
+@@ -11,6 +11,7 @@
+ PHDRS
+ {
+     segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
++    segment_rw PT_LOAD FLAGS(6); /* 6 == RW */
+ }
 
-+    .rodata :
-+    {
-+        *(.rodata*)
-+    }
+ SECTIONS
+@@ -18,11 +19,30 @@
+     . =  __rpi_load_addr;
+
+     /***********************************************************************************************
+-    * Code
++    * Code + RO Data + Global Offset Table
+     ***********************************************************************************************/
+     .text :
+     {
+         KEEP(*(.text._start))
+         *(.text*)
+     } :segment_rx
 +
-+    .data :
-+    {
-+        *(.data*)
-+    }
++    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
++    .got    : ALIGN(8) { *(.got)     } :segment_rx
++
++    /***********************************************************************************************
++    * Data + BSS
++    ***********************************************************************************************/
++    .data : { *(.data*) } :segment_rw
 +
 +    /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-+    .bss ALIGN(8):
++    .bss : ALIGN(8)
 +    {
 +        __bss_start = .;
 +        *(.bss*);
 +        . = ALIGN(8);
 +
-+        /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-+        . += 8;
++        . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
 +        __bss_end_inclusive = . - 8;
-+    }
-+
-     /DISCARD/ : { *(.comment*) }
++    } :NONE
  }
 
 diff -uNr 01_wait_forever/src/bsp/raspberrypi/memory.rs 02_runtime_init/src/bsp/raspberrypi/memory.rs
diff --git a/02_runtime_init/src/bsp/raspberrypi/link.ld b/02_runtime_init/src/bsp/raspberrypi/link.ld
index 573abc5f0..acb7fe28b 100644
--- a/02_runtime_init/src/bsp/raspberrypi/link.ld
+++ b/02_runtime_init/src/bsp/raspberrypi/link.ld
@@ -3,37 +3,46 @@
  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
+/* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_load_addr = 0x80000;
+
+ENTRY(__rpi_load_addr)
+
+PHDRS
+{
+    segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
+    segment_rw PT_LOAD FLAGS(6); /* 6 == RW */
+}
+
 SECTIONS
 {
-    /* Set current address to the value from which the RPi starts execution */
-    . = 0x80000;
+    . =  __rpi_load_addr;
 
+    /***********************************************************************************************
+    * Code + RO Data + Global Offset Table
+    ***********************************************************************************************/
     .text :
     {
-        *(.text._start) *(.text*)
-    }
+        KEEP(*(.text._start))
+        *(.text*)
+    } :segment_rx
 
-    .rodata :
-    {
-        *(.rodata*)
-    }
+    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
+    .got    : ALIGN(8) { *(.got)     } :segment_rx
 
-    .data :
-    {
-        *(.data*)
-    }
+    /***********************************************************************************************
+    * Data + BSS
+    ***********************************************************************************************/
+    .data : { *(.data*) } :segment_rw
 
     /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-    .bss ALIGN(8):
+    .bss : ALIGN(8)
     {
         __bss_start = .;
         *(.bss*);
         . = ALIGN(8);
 
-        /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-        . += 8;
+        . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
         __bss_end_inclusive = . - 8;
-    }
-
-    /DISCARD/ : { *(.comment*) }
+    } :NONE
 }
diff --git a/03_hacky_hello_world/Makefile b/03_hacky_hello_world/Makefile
index 75158b5b0..2ed82a5f1 100644
--- a/03_hacky_hello_world/Makefile
+++ b/03_hacky_hello_world/Makefile
@@ -103,6 +103,7 @@ objdump: $(KERNEL_ELF)
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
+                --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
 nm: $(KERNEL_ELF)
diff --git a/03_hacky_hello_world/src/bsp/raspberrypi/link.ld b/03_hacky_hello_world/src/bsp/raspberrypi/link.ld
index 573abc5f0..acb7fe28b 100644
--- a/03_hacky_hello_world/src/bsp/raspberrypi/link.ld
+++ b/03_hacky_hello_world/src/bsp/raspberrypi/link.ld
@@ -3,37 +3,46 @@
  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
+/* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_load_addr = 0x80000;
+
+ENTRY(__rpi_load_addr)
+
+PHDRS
+{
+    segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
+    segment_rw PT_LOAD FLAGS(6); /* 6 == RW */
+}
+
 SECTIONS
 {
-    /* Set current address to the value from which the RPi starts execution */
-    . = 0x80000;
+    . =  __rpi_load_addr;
 
+    /***********************************************************************************************
+    * Code + RO Data + Global Offset Table
+    ***********************************************************************************************/
     .text :
     {
-        *(.text._start) *(.text*)
-    }
+        KEEP(*(.text._start))
+        *(.text*)
+    } :segment_rx
 
-    .rodata :
-    {
-        *(.rodata*)
-    }
+    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
+    .got    : ALIGN(8) { *(.got)     } :segment_rx
 
-    .data :
-    {
-        *(.data*)
-    }
+    /***********************************************************************************************
+    * Data + BSS
+    ***********************************************************************************************/
+    .data : { *(.data*) } :segment_rw
 
     /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-    .bss ALIGN(8):
+    .bss : ALIGN(8)
     {
         __bss_start = .;
         *(.bss*);
         . = ALIGN(8);
 
-        /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-        . += 8;
+        . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
         __bss_end_inclusive = . - 8;
-    }
-
-    /DISCARD/ : { *(.comment*) }
+    } :NONE
 }
diff --git a/04_zero_overhead_abstraction/Makefile b/04_zero_overhead_abstraction/Makefile
index 75158b5b0..2ed82a5f1 100644
--- a/04_zero_overhead_abstraction/Makefile
+++ b/04_zero_overhead_abstraction/Makefile
@@ -103,6 +103,7 @@ objdump: $(KERNEL_ELF)
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
+                --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
 nm: $(KERNEL_ELF)
diff --git a/04_zero_overhead_abstraction/README.md b/04_zero_overhead_abstraction/README.md
index aeb3bfb85..358d01e71 100644
--- a/04_zero_overhead_abstraction/README.md
+++ b/04_zero_overhead_abstraction/README.md
@@ -167,20 +167,43 @@ diff -uNr 03_hacky_hello_world/src/bsp/raspberrypi/cpu.rs 04_zero_overhead_abstr
 +/// Used by `arch` code to find the early boot core.
 +pub const BOOT_CORE_ID: usize = 0;
 
+diff -uNr 03_hacky_hello_world/src/bsp/raspberrypi/link.ld 04_zero_overhead_abstraction/src/bsp/raspberrypi/link.ld
+--- 03_hacky_hello_world/src/bsp/raspberrypi/link.ld
++++ 04_zero_overhead_abstraction/src/bsp/raspberrypi/link.ld
+@@ -21,6 +21,7 @@
+     /***********************************************************************************************
+     * Code + RO Data + Global Offset Table
+     ***********************************************************************************************/
++    __rx_start = .;
+     .text :
+     {
+         KEEP(*(.text._start))
+
 diff -uNr 03_hacky_hello_world/src/bsp/raspberrypi/memory.rs 04_zero_overhead_abstraction/src/bsp/raspberrypi/memory.rs
 --- 03_hacky_hello_world/src/bsp/raspberrypi/memory.rs
 +++ 04_zero_overhead_abstraction/src/bsp/raspberrypi/memory.rs
-@@ -17,9 +17,25 @@
+@@ -12,14 +12,36 @@
+
+ // Symbols from the linker script.
+ extern "Rust" {
++    static __rx_start: UnsafeCell<()>;
++
+     static __bss_start: UnsafeCell<u64>;
+     static __bss_end_inclusive: UnsafeCell<u64>;
  }
 
  //--------------------------------------------------------------------------------------------------
-+// Public Definitions
++// Private Code
 +//--------------------------------------------------------------------------------------------------
 +
-+/// The board's memory map.
-+#[rustfmt::skip]
-+pub(super) mod map {
-+    pub const BOOT_CORE_STACK_END: usize = 0x8_0000;
++/// Start address of the Read+Execute (RX) range.
++///
++/// # Safety
++///
++/// - Value is provided by the linker script and must be trusted as-is.
++#[inline(always)]
++fn rx_start() -> usize {
++    unsafe { __rx_start.get() as usize }
 +}
 +
 +//--------------------------------------------------------------------------------------------------
@@ -190,7 +213,7 @@ diff -uNr 03_hacky_hello_world/src/bsp/raspberrypi/memory.rs 04_zero_overhead_ab
 +/// Exclusive end address of the boot core's stack.
 +#[inline(always)]
 +pub fn boot_core_stack_end() -> usize {
-+    map::BOOT_CORE_STACK_END
++    rx_start()
 +}
 +
  /// Return the inclusive range spanning the .bss section.
diff --git a/04_zero_overhead_abstraction/src/bsp/raspberrypi/link.ld b/04_zero_overhead_abstraction/src/bsp/raspberrypi/link.ld
index 573abc5f0..87e6a976f 100644
--- a/04_zero_overhead_abstraction/src/bsp/raspberrypi/link.ld
+++ b/04_zero_overhead_abstraction/src/bsp/raspberrypi/link.ld
@@ -3,37 +3,47 @@
  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
+/* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_load_addr = 0x80000;
+
+ENTRY(__rpi_load_addr)
+
+PHDRS
+{
+    segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
+    segment_rw PT_LOAD FLAGS(6); /* 6 == RW */
+}
+
 SECTIONS
 {
-    /* Set current address to the value from which the RPi starts execution */
-    . = 0x80000;
+    . =  __rpi_load_addr;
 
+    /***********************************************************************************************
+    * Code + RO Data + Global Offset Table
+    ***********************************************************************************************/
+    __rx_start = .;
     .text :
     {
-        *(.text._start) *(.text*)
-    }
+        KEEP(*(.text._start))
+        *(.text*)
+    } :segment_rx
 
-    .rodata :
-    {
-        *(.rodata*)
-    }
+    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
+    .got    : ALIGN(8) { *(.got)     } :segment_rx
 
-    .data :
-    {
-        *(.data*)
-    }
+    /***********************************************************************************************
+    * Data + BSS
+    ***********************************************************************************************/
+    .data : { *(.data*) } :segment_rw
 
     /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-    .bss ALIGN(8):
+    .bss : ALIGN(8)
     {
         __bss_start = .;
         *(.bss*);
         . = ALIGN(8);
 
-        /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-        . += 8;
+        . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
         __bss_end_inclusive = . - 8;
-    }
-
-    /DISCARD/ : { *(.comment*) }
+    } :NONE
 }
diff --git a/04_zero_overhead_abstraction/src/bsp/raspberrypi/memory.rs b/04_zero_overhead_abstraction/src/bsp/raspberrypi/memory.rs
index 77fdafd7a..bffe8eab0 100644
--- a/04_zero_overhead_abstraction/src/bsp/raspberrypi/memory.rs
+++ b/04_zero_overhead_abstraction/src/bsp/raspberrypi/memory.rs
@@ -12,18 +12,24 @@ use core::{cell::UnsafeCell, ops::RangeInclusive};
 
 // Symbols from the linker script.
 extern "Rust" {
+    static __rx_start: UnsafeCell<()>;
+
     static __bss_start: UnsafeCell<u64>;
     static __bss_end_inclusive: UnsafeCell<u64>;
 }
 
 //--------------------------------------------------------------------------------------------------
-// Public Definitions
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
-/// The board's memory map.
-#[rustfmt::skip]
-pub(super) mod map {
-    pub const BOOT_CORE_STACK_END: usize = 0x8_0000;
+/// Start address of the Read+Execute (RX) range.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn rx_start() -> usize {
+    unsafe { __rx_start.get() as usize }
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -33,7 +39,7 @@ pub(super) mod map {
 /// Exclusive end address of the boot core's stack.
 #[inline(always)]
 pub fn boot_core_stack_end() -> usize {
-    map::BOOT_CORE_STACK_END
+    rx_start()
 }
 
 /// Return the inclusive range spanning the .bss section.
diff --git a/05_safe_globals/Makefile b/05_safe_globals/Makefile
index 75158b5b0..2ed82a5f1 100644
--- a/05_safe_globals/Makefile
+++ b/05_safe_globals/Makefile
@@ -103,6 +103,7 @@ objdump: $(KERNEL_ELF)
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
+                --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
 nm: $(KERNEL_ELF)
diff --git a/05_safe_globals/src/bsp/raspberrypi/link.ld b/05_safe_globals/src/bsp/raspberrypi/link.ld
index 573abc5f0..87e6a976f 100644
--- a/05_safe_globals/src/bsp/raspberrypi/link.ld
+++ b/05_safe_globals/src/bsp/raspberrypi/link.ld
@@ -3,37 +3,47 @@
  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
+/* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_load_addr = 0x80000;
+
+ENTRY(__rpi_load_addr)
+
+PHDRS
+{
+    segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
+    segment_rw PT_LOAD FLAGS(6); /* 6 == RW */
+}
+
 SECTIONS
 {
-    /* Set current address to the value from which the RPi starts execution */
-    . = 0x80000;
+    . =  __rpi_load_addr;
 
+    /***********************************************************************************************
+    * Code + RO Data + Global Offset Table
+    ***********************************************************************************************/
+    __rx_start = .;
     .text :
     {
-        *(.text._start) *(.text*)
-    }
+        KEEP(*(.text._start))
+        *(.text*)
+    } :segment_rx
 
-    .rodata :
-    {
-        *(.rodata*)
-    }
+    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
+    .got    : ALIGN(8) { *(.got)     } :segment_rx
 
-    .data :
-    {
-        *(.data*)
-    }
+    /***********************************************************************************************
+    * Data + BSS
+    ***********************************************************************************************/
+    .data : { *(.data*) } :segment_rw
 
     /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-    .bss ALIGN(8):
+    .bss : ALIGN(8)
     {
         __bss_start = .;
         *(.bss*);
         . = ALIGN(8);
 
-        /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-        . += 8;
+        . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
         __bss_end_inclusive = . - 8;
-    }
-
-    /DISCARD/ : { *(.comment*) }
+    } :NONE
 }
diff --git a/05_safe_globals/src/bsp/raspberrypi/memory.rs b/05_safe_globals/src/bsp/raspberrypi/memory.rs
index 77fdafd7a..bffe8eab0 100644
--- a/05_safe_globals/src/bsp/raspberrypi/memory.rs
+++ b/05_safe_globals/src/bsp/raspberrypi/memory.rs
@@ -12,18 +12,24 @@ use core::{cell::UnsafeCell, ops::RangeInclusive};
 
 // Symbols from the linker script.
 extern "Rust" {
+    static __rx_start: UnsafeCell<()>;
+
     static __bss_start: UnsafeCell<u64>;
     static __bss_end_inclusive: UnsafeCell<u64>;
 }
 
 //--------------------------------------------------------------------------------------------------
-// Public Definitions
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
-/// The board's memory map.
-#[rustfmt::skip]
-pub(super) mod map {
-    pub const BOOT_CORE_STACK_END: usize = 0x8_0000;
+/// Start address of the Read+Execute (RX) range.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn rx_start() -> usize {
+    unsafe { __rx_start.get() as usize }
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -33,7 +39,7 @@ pub(super) mod map {
 /// Exclusive end address of the boot core's stack.
 #[inline(always)]
 pub fn boot_core_stack_end() -> usize {
-    map::BOOT_CORE_STACK_END
+    rx_start()
 }
 
 /// Return the inclusive range spanning the .bss section.
diff --git a/06_drivers_gpio_uart/Makefile b/06_drivers_gpio_uart/Makefile
index 07eb97b2e..1dd6cc2b9 100644
--- a/06_drivers_gpio_uart/Makefile
+++ b/06_drivers_gpio_uart/Makefile
@@ -122,6 +122,7 @@ objdump: $(KERNEL_ELF)
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
+                --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
 nm: $(KERNEL_ELF)
diff --git a/06_drivers_gpio_uart/README.md b/06_drivers_gpio_uart/README.md
index 8b8e076d7..7dea308f3 100644
--- a/06_drivers_gpio_uart/README.md
+++ b/06_drivers_gpio_uart/README.md
@@ -1110,10 +1110,16 @@ diff -uNr 05_safe_globals/src/bsp/raspberrypi/driver.rs 06_drivers_gpio_uart/src
 diff -uNr 05_safe_globals/src/bsp/raspberrypi/memory.rs 06_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
 --- 05_safe_globals/src/bsp/raspberrypi/memory.rs
 +++ 06_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
-@@ -24,6 +24,29 @@
- #[rustfmt::skip]
- pub(super) mod map {
-     pub const BOOT_CORE_STACK_END: usize = 0x8_0000;
+@@ -19,6 +19,38 @@
+ }
+
+ //--------------------------------------------------------------------------------------------------
++// Public Definitions
++//--------------------------------------------------------------------------------------------------
++
++/// The board's physical memory map.
++#[rustfmt::skip]
++pub(super) mod map {
 +
 +    pub const GPIO_OFFSET:         usize = 0x0020_0000;
 +    pub const UART_OFFSET:         usize = 0x0020_1000;
@@ -1137,10 +1143,13 @@ diff -uNr 05_safe_globals/src/bsp/raspberrypi/memory.rs 06_drivers_gpio_uart/src
 +        pub const GPIO_START:       usize = START + GPIO_OFFSET;
 +        pub const PL011_UART_START: usize = START + UART_OFFSET;
 +    }
- }
-
++}
++
++//--------------------------------------------------------------------------------------------------
+ // Private Code
  //--------------------------------------------------------------------------------------------------
 
+
 diff -uNr 05_safe_globals/src/bsp/raspberrypi.rs 06_drivers_gpio_uart/src/bsp/raspberrypi.rs
 --- 05_safe_globals/src/bsp/raspberrypi.rs
 +++ 06_drivers_gpio_uart/src/bsp/raspberrypi.rs
diff --git a/06_drivers_gpio_uart/src/bsp/raspberrypi/link.ld b/06_drivers_gpio_uart/src/bsp/raspberrypi/link.ld
index 573abc5f0..87e6a976f 100644
--- a/06_drivers_gpio_uart/src/bsp/raspberrypi/link.ld
+++ b/06_drivers_gpio_uart/src/bsp/raspberrypi/link.ld
@@ -3,37 +3,47 @@
  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
+/* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_load_addr = 0x80000;
+
+ENTRY(__rpi_load_addr)
+
+PHDRS
+{
+    segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
+    segment_rw PT_LOAD FLAGS(6); /* 6 == RW */
+}
+
 SECTIONS
 {
-    /* Set current address to the value from which the RPi starts execution */
-    . = 0x80000;
+    . =  __rpi_load_addr;
 
+    /***********************************************************************************************
+    * Code + RO Data + Global Offset Table
+    ***********************************************************************************************/
+    __rx_start = .;
     .text :
     {
-        *(.text._start) *(.text*)
-    }
+        KEEP(*(.text._start))
+        *(.text*)
+    } :segment_rx
 
-    .rodata :
-    {
-        *(.rodata*)
-    }
+    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
+    .got    : ALIGN(8) { *(.got)     } :segment_rx
 
-    .data :
-    {
-        *(.data*)
-    }
+    /***********************************************************************************************
+    * Data + BSS
+    ***********************************************************************************************/
+    .data : { *(.data*) } :segment_rw
 
     /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-    .bss ALIGN(8):
+    .bss : ALIGN(8)
     {
         __bss_start = .;
         *(.bss*);
         . = ALIGN(8);
 
-        /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-        . += 8;
+        . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
         __bss_end_inclusive = . - 8;
-    }
-
-    /DISCARD/ : { *(.comment*) }
+    } :NONE
 }
diff --git a/06_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs b/06_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
index fb47b1418..56a3306e5 100644
--- a/06_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
+++ b/06_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
@@ -12,6 +12,8 @@ use core::{cell::UnsafeCell, ops::RangeInclusive};
 
 // Symbols from the linker script.
 extern "Rust" {
+    static __rx_start: UnsafeCell<()>;
+
     static __bss_start: UnsafeCell<u64>;
     static __bss_end_inclusive: UnsafeCell<u64>;
 }
@@ -20,10 +22,9 @@ extern "Rust" {
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
-/// The board's memory map.
+/// The board's physical memory map.
 #[rustfmt::skip]
 pub(super) mod map {
-    pub const BOOT_CORE_STACK_END: usize = 0x8_0000;
 
     pub const GPIO_OFFSET:         usize = 0x0020_0000;
     pub const UART_OFFSET:         usize = 0x0020_1000;
@@ -49,6 +50,20 @@ pub(super) mod map {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// Start address of the Read+Execute (RX) range.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn rx_start() -> usize {
+    unsafe { __rx_start.get() as usize }
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -56,7 +71,7 @@ pub(super) mod map {
 /// Exclusive end address of the boot core's stack.
 #[inline(always)]
 pub fn boot_core_stack_end() -> usize {
-    map::BOOT_CORE_STACK_END
+    rx_start()
 }
 
 /// Return the inclusive range spanning the .bss section.
diff --git a/07_uart_chainloader/README.md b/07_uart_chainloader/README.md
index e67c78109..923615b56 100644
--- a/07_uart_chainloader/README.md
+++ b/07_uart_chainloader/README.md
@@ -165,14 +165,6 @@ diff -uNr 06_drivers_gpio_uart/Makefile 07_uart_chainloader/Makefile
 
  clippy:
  	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
-@@ -122,6 +129,7 @@
- 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
-                 --section .text   \
-                 --section .rodata \
-+                --section .got    \
-                 $(KERNEL_ELF) | rustfilt
-
- nm: $(KERNEL_ELF)
 
 diff -uNr 06_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs 07_uart_chainloader/src/_arch/aarch64/cpu/boot.rs
 --- 06_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs
@@ -276,77 +268,82 @@ diff -uNr 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 0
 diff -uNr 06_drivers_gpio_uart/src/bsp/raspberrypi/link.ld 07_uart_chainloader/src/bsp/raspberrypi/link.ld
 --- 06_drivers_gpio_uart/src/bsp/raspberrypi/link.ld
 +++ 07_uart_chainloader/src/bsp/raspberrypi/link.ld
-@@ -5,12 +5,15 @@
+@@ -16,12 +16,13 @@
 
  SECTIONS
  {
--    /* Set current address to the value from which the RPi starts execution */
--    . = 0x80000;
+-    . =  __rpi_load_addr;
 +    /* Set the link address to 32 MiB */
 +    . = 0x2000000;
 
+     /***********************************************************************************************
+     * Code + RO Data + Global Offset Table
+     ***********************************************************************************************/
+-    __rx_start = .;
 +    __binary_start = .;
      .text :
      {
--        *(.text._start) *(.text*)
-+        *(.text._start)
-+        KEEP(*(.text.runtime_init))
-+        *(.text*);
-     }
-
-     .rodata :
-@@ -35,5 +38,16 @@
+         KEEP(*(.text._start))
+@@ -46,4 +47,10 @@
+         . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
          __bss_end_inclusive = . - 8;
-     }
-
-+    .got :
-+    {
-+        *(.got*)
-+    }
+     } :NONE
 +
 +    /* Fill up to 8 byte, b/c relocating the binary is done in u64 chunks */
 +    . = ALIGN(8);
 +    __binary_end_inclusive = . - 8;
 +
 +    __runtime_init_reloc = runtime_init;
-+
-     /DISCARD/ : { *(.comment*) }
  }
 
 diff -uNr 06_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs 07_uart_chainloader/src/bsp/raspberrypi/memory.rs
 --- 06_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
 +++ 07_uart_chainloader/src/bsp/raspberrypi/memory.rs
-@@ -12,6 +12,9 @@
+@@ -12,10 +12,12 @@
 
  // Symbols from the linker script.
  extern "Rust" {
+-    static __rx_start: UnsafeCell<()>;
+-
 +    static __binary_start: UnsafeCell<u64>;
-+    static __binary_end_inclusive: UnsafeCell<u64>;
-+    static __runtime_init_reloc: UnsafeCell<u64>;
      static __bss_start: UnsafeCell<u64>;
      static __bss_end_inclusive: UnsafeCell<u64>;
++    static __binary_end_inclusive: UnsafeCell<u64>;
++
++    static __runtime_init_reloc: UnsafeCell<u64>;
  }
-@@ -23,10 +26,12 @@
- /// The board's memory map.
+
+ //--------------------------------------------------------------------------------------------------
+@@ -25,9 +27,12 @@
+ /// The board's physical memory map.
  #[rustfmt::skip]
  pub(super) mod map {
--    pub const BOOT_CORE_STACK_END: usize = 0x8_0000;
 +    pub const BOOT_CORE_STACK_END:        usize =        0x8_0000;
++
++    pub const BOARD_DEFAULT_LOAD_ADDRESS: usize =        0x8_0000;
 
 -    pub const GPIO_OFFSET:         usize = 0x0020_0000;
 -    pub const UART_OFFSET:         usize = 0x0020_1000;
-+    pub const BOARD_DEFAULT_LOAD_ADDRESS: usize =        0x8_0000;
-+
 +    pub const GPIO_OFFSET:                usize =        0x0020_0000;
 +    pub const UART_OFFSET:                usize =        0x0020_1000;
 
      /// Physical devices.
      #[cfg(feature = "bsp_rpi3")]
-@@ -59,13 +64,35 @@
-     map::BOOT_CORE_STACK_END
+@@ -51,36 +56,44 @@
  }
 
--/// Return the inclusive range spanning the .bss section.
+ //--------------------------------------------------------------------------------------------------
+-// Private Code
++// Public Code
+ //--------------------------------------------------------------------------------------------------
+
+-/// Start address of the Read+Execute (RX) range.
++/// Exclusive end address of the boot core's stack.
++#[inline(always)]
++pub fn boot_core_stack_end() -> usize {
++    map::BOOT_CORE_STACK_END
++}
++
 +/// The address on which the Raspberry firmware loads every binary by default.
 +#[inline(always)]
 +pub fn board_default_load_addr() -> *const u64 {
@@ -354,21 +351,33 @@ diff -uNr 06_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs 07_uart_chainloader
 +}
 +
 +/// Return the inclusive range spanning the relocated kernel binary.
-+///
-+/// # Safety
-+///
+ ///
+ /// # Safety
+ ///
+-/// - Value is provided by the linker script and must be trusted as-is.
+-#[inline(always)]
+-fn rx_start() -> usize {
+-    unsafe { __rx_start.get() as usize }
 +/// - Values are provided by the linker script and must be trusted as-is.
 +/// - The linker-provided addresses must be u64 aligned.
 +pub fn relocated_binary_range_inclusive() -> RangeInclusive<*mut u64> {
 +    unsafe { RangeInclusive::new(__binary_start.get(), __binary_end_inclusive.get()) }
-+}
-+
+ }
+
+-//--------------------------------------------------------------------------------------------------
+-// Public Code
+-//--------------------------------------------------------------------------------------------------
+-
+-/// Exclusive end address of the boot core's stack.
 +/// The relocated address of function `runtime_init()`.
-+#[inline(always)]
+ #[inline(always)]
+-pub fn boot_core_stack_end() -> usize {
+-    rx_start()
 +pub fn relocated_runtime_init_addr() -> *const u64 {
 +    unsafe { __runtime_init_reloc.get() as _ }
-+}
-+
+ }
+
+-/// Return the inclusive range spanning the .bss section.
 +/// Return the inclusive range spanning the relocated .bss section.
  ///
  /// # Safety
@@ -498,7 +507,7 @@ diff -uNr 06_drivers_gpio_uart/src/main.rs 07_uart_chainloader/src/main.rs
 diff -uNr 06_drivers_gpio_uart/src/relocate.rs 07_uart_chainloader/src/relocate.rs
 --- 06_drivers_gpio_uart/src/relocate.rs
 +++ 07_uart_chainloader/src/relocate.rs
-@@ -0,0 +1,51 @@
+@@ -0,0 +1,49 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -537,16 +546,14 @@ diff -uNr 06_drivers_gpio_uart/src/relocate.rs 07_uart_chainloader/src/relocate.
 +        current_binary_start_addr = current_binary_start_addr.offset(1);
 +    }
 +
-+    // The following function calls form a hack to achieve an "absolute jump" to
-+    // `runtime_init::runtime_init()` by forcing an indirection through the global offset table
-+    // (GOT), so that execution continues from the relocated binary.
-+    //
-+    // Without this, the address of `runtime_init()` would be calculated as a relative offset from
-+    // the current program counter, since we are compiling as `position independent code`. This
-+    // would cause us to keep executing from the address to which the firmware loaded us, instead of
-+    // the relocated position.
++    // The following function calls realize an "absolute jump" to `runtime_init::runtime_init()` by
++    // forcing an indirection through the global offset table (GOT), so that execution continues
++    // from the relocated binary.
 +    //
-+    // There likely is a more elegant way to do this.
++    // Without the indirection through the assembly, the address of `runtime_init()` would be
++    // calculated as a relative offset from the current program counter, since we are compiling as
++    // `position independent code`. This would cause us to keep executing from the address to which
++    // the firmware loaded us, instead of the relocated position.
 +    let relocated_runtime_init_addr = bsp::memory::relocated_runtime_init_addr() as usize;
 +    cpu::branch_to_raw_addr(relocated_runtime_init_addr)
 +}
diff --git a/07_uart_chainloader/demo_payload_rpi3.img b/07_uart_chainloader/demo_payload_rpi3.img
index a46c0d4149a22954048d876138fda7825a398700..79eef6b4ca54773cbe15dd88f8b48e0ea9a8541a 100755
GIT binary patch
delta 1022
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zvMQDpwxlpKcT|Kfxtyn)EGw`XmV6U_hm8Z4bJ&C)Igf26yQgfk!wbyM$|}7+GTzVl
dEm)Ut2%~JqC}S^x7D>@poGz<OU4`jL>JKDk)Dr*z

delta 1028
zcmZ8fUuaTM96smj-Mni<uiI6xO}%&1{L@1%F>$hV6WMgNEh&Ogp%esLFtV4Pn%3x{
zjqvOY+FQ9^vZq3VeA@_u=%EI&*Xf>?MG*DkirKl|GZ;H?@A3P7-|zeVxxNgn1`2`(
zK2N>rl^K{WpJPr!DB&5+Lnz~)nsKIPDTlQa5X$Ap>?p&^F67OWx7x!j^p}lYzo8(X
zLB{|nbOP|Y9s_8$IEa=Yw(76Qxn8seaw$z$w2=mmt!9kb+z*4spGjQ_5H(oG%lb)g
z-h}EJfU50nB}iCVvY{&R*>!76V<fxoW=kCL_ZD%7VU$Bo)J@P`22UG~bFv+6Juo3T
zjqe*GT+xo+_PG@F!Qf|hy!fxdC-fQ6-V1<M)*NWJsag`jAU_V%_z~~#s@V}KTS$^p
zN+KU-GY-X~&FHob#~V5l^NG<)9Z10lj8-}l@kWvbs3U=s#!~`8vo>H{BFuaM+!=?9
z*3JZeVhn~P7rK$_M;SJkS^!S8qk%}*Y(ABM^i}a()aFv$P`u$|qm>z<$M0i7h1<)e
zbVGRG7#j%08{Sa75rMkz90Zrhx(W<=faF0Lk~y;OLAHOYTWdKXob3+6P5i3+8J{*I
zk4W5zURj`b15fvS@*ZM63R`ocYCk~rcF<_fYfInyH6^7los1_0hfC?c>QcK;pFlhB
z0lL1g)>C?cFqZ-VFAGWN#5KX}onlBbIUb<i7K%q=7o@54rw0b4%fl%$#x9mkX7~e#
zOrH~DqN;5rl2_iWVlrs!#IxDCEcrD{c@yQ2>eBe4IWm9EqGlVYYMZ)~kJ~y48t<X_
zEXCyC)H+A?5{(~JwNTtf^>&JBw+z_EyycdB&#Jajpy3?F?<j7qi(e2_)e60xc*A1m
zuWD5GHocuVFPgcVdX=?cP7K0dcvy^(r5}z|aZxn$U+BR4gMsizagHCO^=*_*;Dpu9
Ltx|Rs=dJGlFG1-e

diff --git a/07_uart_chainloader/demo_payload_rpi4.img b/07_uart_chainloader/demo_payload_rpi4.img
index a0b618f8d63c28f5a04c2702fecaa5f14a043cac..4ec2899812281f5c492516fa530527f937f5446b 100755
GIT binary patch
delta 1134
zcmZ8fO=uHA6rS15wn?mJx5+k1e{hqaNvfz#E0Kyc+7`7{TZ5tpQBp<m2gG{xkSL;p
zrDhnRcxyZe>p?6*Ft@5F57r-~AO%S(mb5Cglu{$w_3i9<un%_Md~d$_-p@>?E!&n=
zs}Xu?|It+$^I-vN`Ff!f<03sN-o_<5BlhB4K4$B~xRk#k?G>a_kVFIdiRzsaZp}N_
zE@CwhBWn=K)_}}hCn6Vf?PTZ$t#uv433|a5!Z+x!tFz_3o0P*gy(}W)1ZGdF9<ZeE
zLz(1U2<t{#&}T(VW<#QmK`l_Ef*g+?4wBb6lPrf3J6Q)ilOI57O3>Y~zB(NycJTHR
z9gsu2G?f&;ATkX)*f2&iGTOc<q6%ZA8c7s#sla|V9b~l_X-Qv7S6TTq`ce+7FT<oL
zdLCC{bia68(3cHkemO{2<OV!I>y`CbqwPvB{BJ2?oTE=zWI|~;6lh}VW{3Z)LPgNA
zS<%B4V`S8Zwwu*B{&cabn*E8w9Ma+)I8ks)-IX2*rXxu-UfXWMA%Haiuhniz7lTBE
zlcy5_VgrA3Jit^_QYN_udexBjkttWYD$P=&aMzYeUQj))%@QiuA?84jla8;bFfN{&
zG(R?z1v8Ga(WS0R2eyB6U~~ilM#T+80KX@*k)%Lp({E$MX(q79H0Ex_3O(yi<Lh+B
zZ4RZ%b8mkR9tI4!92RvZ4iCjh!-d0;*@c>y6M|8^LS*R=jN+HkW+mf|jfSkoH2T@I
z6_3+(YD@wGiqPGvH@ZUrQLxR(@`&R-od>o41KV0!w4=L|P<@$RSH1W<eW1SG|J=v9
z>?A@9bry!+m~{^hULJ(i6pzE}Vz!$1j*iuJq~Cb0(=uoE`7I31F)Q$W566!<hIh(r
zH9yPu|7E?yaTVtebIhw1P#?YGJr|hgX%TPkC&v+v*|?M%)he!$`v?vAyvhmDieBPA
zLQ6ic<BZFS-l6Axah#$#UkCnwr=McKS4r?pu73^DsQ<F^oJX5@^f=Z15t-kTTyIIs
I^pijQ7bj5{p8x;=

delta 1165
zcmZ8fOK1~e5T4o1#-u)y%{y8(k80WqYP2>!(54Tlwu%}Q6%Sek6$M2+c}l8ciwfrV
z7raTW2iab12_ABhL{ao4Sn=Yeh(Z!k6e*fwU1xXy3OcYm`+YMz-^~1fzAe|5_sckv
znP@}_p|DKqMlA7T@(`AJP436RLc47@V!3ct>6MgnjJ06l^}H<##tVxUen-E$j?D+i
zF8~;?bpt!YHnSV|c))c4BmAr@j>q^dS9h}PWtD_YtH{6_D6_9~F=0j94!KM%j+&m8
zw5p7(8kaSsc(lar?o>-M#$IABQ%QjNXMl9xKA}qQB+X0T7e*7zLEcg3C){xae$Blk
z+S$ljsH&g%M^9p=s-9J}>8#zToR0#3?oK2xCD@eg8?z(ao*I(0AG-eahsVukE(4o6
z0$Tk(u=-)thGW2d^w;e!zD!+C3ft6vLq|<)9c*NMq*HkyYc<`b>641qY~U2sEge6b
zqAKrcs)xVzJ83(lzROTI`$hgm4YmVi&_0ZeQOX#x!3HDhobEBRTEppL4I-%yOcxtw
zd+L1(?QYh_w|F)i@CLyJ1hbyiYAMEK`tx`s%53DXjPS>v;J~+@daIHyUbp2kr~SV5
ztqK$!#5rLs<NOH4l6>T?@t7S|4Ic6>pL^;Z==kJB*aw86w1P?GyN<4815{_#Fa1sg
zB5$l*-tJwG$WME-IKXROV?PbPn>z;Sju@Lr$eMLJF{Wqf?CBK#ZYEB1KLs{DOLNcY
zZI+gpA{V!&0RG;$21mHZzYd!?hJu}K5)~wC2Fw3K%Xf9}itO3BHkpj<@61r+ALd!S
znM^N|HLb$$`CqByp?{-QJ{Sl_Cj%Bsm&~-Pz%;&TFL*J~k$o1lvfP604O@6lVM4^|
z(wKHvV7jiR{hvQ9;&ZAwf$bvys=%TP33~a(;K}Heko_sb6@epSG;>{>9Db|0knl}n
zZ6Q(IiUJ&zt*=wUH}Sopp!2B9Vsrd_D20c(7V4m5ph$8qvR$aEqMqT?^lTKoOYprs
Y89t|u3wEhsckqdDvtzMnf>*<dKeRy@aR2}S

diff --git a/07_uart_chainloader/src/bsp/raspberrypi/link.ld b/07_uart_chainloader/src/bsp/raspberrypi/link.ld
index 721856cbc..5642ed4e9 100644
--- a/07_uart_chainloader/src/bsp/raspberrypi/link.ld
+++ b/07_uart_chainloader/src/bsp/raspberrypi/link.ld
@@ -3,51 +3,54 @@
  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
+/* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_load_addr = 0x80000;
+
+ENTRY(__rpi_load_addr)
+
+PHDRS
+{
+    segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
+    segment_rw PT_LOAD FLAGS(6); /* 6 == RW */
+}
+
 SECTIONS
 {
     /* Set the link address to 32 MiB */
     . = 0x2000000;
 
+    /***********************************************************************************************
+    * Code + RO Data + Global Offset Table
+    ***********************************************************************************************/
     __binary_start = .;
     .text :
     {
-        *(.text._start)
-        KEEP(*(.text.runtime_init))
-        *(.text*);
-    }
+        KEEP(*(.text._start))
+        *(.text*)
+    } :segment_rx
 
-    .rodata :
-    {
-        *(.rodata*)
-    }
+    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
+    .got    : ALIGN(8) { *(.got)     } :segment_rx
 
-    .data :
-    {
-        *(.data*)
-    }
+    /***********************************************************************************************
+    * Data + BSS
+    ***********************************************************************************************/
+    .data : { *(.data*) } :segment_rw
 
     /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-    .bss ALIGN(8):
+    .bss : ALIGN(8)
     {
         __bss_start = .;
         *(.bss*);
         . = ALIGN(8);
 
-        /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-        . += 8;
+        . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
         __bss_end_inclusive = . - 8;
-    }
-
-    .got :
-    {
-        *(.got*)
-    }
+    } :NONE
 
     /* Fill up to 8 byte, b/c relocating the binary is done in u64 chunks */
     . = ALIGN(8);
     __binary_end_inclusive = . - 8;
 
     __runtime_init_reloc = runtime_init;
-
-    /DISCARD/ : { *(.comment*) }
 }
diff --git a/07_uart_chainloader/src/bsp/raspberrypi/memory.rs b/07_uart_chainloader/src/bsp/raspberrypi/memory.rs
index 4b2642e36..5abfb9ef0 100644
--- a/07_uart_chainloader/src/bsp/raspberrypi/memory.rs
+++ b/07_uart_chainloader/src/bsp/raspberrypi/memory.rs
@@ -13,17 +13,18 @@ use core::{cell::UnsafeCell, ops::RangeInclusive};
 // Symbols from the linker script.
 extern "Rust" {
     static __binary_start: UnsafeCell<u64>;
-    static __binary_end_inclusive: UnsafeCell<u64>;
-    static __runtime_init_reloc: UnsafeCell<u64>;
     static __bss_start: UnsafeCell<u64>;
     static __bss_end_inclusive: UnsafeCell<u64>;
+    static __binary_end_inclusive: UnsafeCell<u64>;
+
+    static __runtime_init_reloc: UnsafeCell<u64>;
 }
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
-/// The board's memory map.
+/// The board's physical memory map.
 #[rustfmt::skip]
 pub(super) mod map {
     pub const BOOT_CORE_STACK_END:        usize =        0x8_0000;
diff --git a/07_uart_chainloader/src/relocate.rs b/07_uart_chainloader/src/relocate.rs
index 85ddab672..6ac6bccea 100644
--- a/07_uart_chainloader/src/relocate.rs
+++ b/07_uart_chainloader/src/relocate.rs
@@ -36,16 +36,14 @@ pub unsafe fn relocate_self() -> ! {
         current_binary_start_addr = current_binary_start_addr.offset(1);
     }
 
-    // The following function calls form a hack to achieve an "absolute jump" to
-    // `runtime_init::runtime_init()` by forcing an indirection through the global offset table
-    // (GOT), so that execution continues from the relocated binary.
+    // The following function calls realize an "absolute jump" to `runtime_init::runtime_init()` by
+    // forcing an indirection through the global offset table (GOT), so that execution continues
+    // from the relocated binary.
     //
-    // Without this, the address of `runtime_init()` would be calculated as a relative offset from
-    // the current program counter, since we are compiling as `position independent code`. This
-    // would cause us to keep executing from the address to which the firmware loaded us, instead of
-    // the relocated position.
-    //
-    // There likely is a more elegant way to do this.
+    // Without the indirection through the assembly, the address of `runtime_init()` would be
+    // calculated as a relative offset from the current program counter, since we are compiling as
+    // `position independent code`. This would cause us to keep executing from the address to which
+    // the firmware loaded us, instead of the relocated position.
     let relocated_runtime_init_addr = bsp::memory::relocated_runtime_init_addr() as usize;
     cpu::branch_to_raw_addr(relocated_runtime_init_addr)
 }
diff --git a/08_timestamps/Makefile b/08_timestamps/Makefile
index 4206c5282..b5a56d075 100644
--- a/08_timestamps/Makefile
+++ b/08_timestamps/Makefile
@@ -122,6 +122,7 @@ objdump: $(KERNEL_ELF)
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
+                --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
 nm: $(KERNEL_ELF)
diff --git a/08_timestamps/README.md b/08_timestamps/README.md
index 55c12a7f8..eebdd20cd 100644
--- a/08_timestamps/README.md
+++ b/08_timestamps/README.md
@@ -96,14 +96,6 @@ diff -uNr 07_uart_chainloader/Makefile 08_timestamps/Makefile
 
  clippy:
  	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
-@@ -129,7 +122,6 @@
- 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
-                 --section .text   \
-                 --section .rodata \
--                --section .got    \
-                 $(KERNEL_ELF) | rustfilt
-
- nm: $(KERNEL_ELF)
 
 diff -uNr 07_uart_chainloader/src/_arch/aarch64/cpu/boot.rs 08_timestamps/src/_arch/aarch64/cpu/boot.rs
 --- 07_uart_chainloader/src/_arch/aarch64/cpu/boot.rs
@@ -369,65 +361,60 @@ diff -uNr 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 08
 diff -uNr 07_uart_chainloader/src/bsp/raspberrypi/link.ld 08_timestamps/src/bsp/raspberrypi/link.ld
 --- 07_uart_chainloader/src/bsp/raspberrypi/link.ld
 +++ 08_timestamps/src/bsp/raspberrypi/link.ld
-@@ -5,15 +5,12 @@
+@@ -16,13 +16,12 @@
 
  SECTIONS
  {
 -    /* Set the link address to 32 MiB */
 -    . = 0x2000000;
-+    /* Set current address to the value from which the RPi starts execution */
-+    . = 0x80000;
++    . =  __rpi_load_addr;
 
+     /***********************************************************************************************
+     * Code + RO Data + Global Offset Table
+     ***********************************************************************************************/
 -    __binary_start = .;
++    __rx_start = .;
      .text :
      {
--        *(.text._start)
--        KEEP(*(.text.runtime_init))
--        *(.text*);
-+        *(.text._start) *(.text*)
-     }
-
-     .rodata :
-@@ -38,16 +35,5 @@
+         KEEP(*(.text._start))
+@@ -47,10 +46,4 @@
+         . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
          __bss_end_inclusive = . - 8;
-     }
-
--    .got :
--    {
--        *(.got*)
--    }
+     } :NONE
 -
 -    /* Fill up to 8 byte, b/c relocating the binary is done in u64 chunks */
 -    . = ALIGN(8);
 -    __binary_end_inclusive = . - 8;
 -
 -    __runtime_init_reloc = runtime_init;
--
-     /DISCARD/ : { *(.comment*) }
  }
 
 diff -uNr 07_uart_chainloader/src/bsp/raspberrypi/memory.rs 08_timestamps/src/bsp/raspberrypi/memory.rs
 --- 07_uart_chainloader/src/bsp/raspberrypi/memory.rs
 +++ 08_timestamps/src/bsp/raspberrypi/memory.rs
-@@ -12,9 +12,6 @@
+@@ -12,12 +12,10 @@
 
  // Symbols from the linker script.
  extern "Rust" {
 -    static __binary_start: UnsafeCell<u64>;
--    static __binary_end_inclusive: UnsafeCell<u64>;
--    static __runtime_init_reloc: UnsafeCell<u64>;
++    static __rx_start: UnsafeCell<()>;
++
      static __bss_start: UnsafeCell<u64>;
      static __bss_end_inclusive: UnsafeCell<u64>;
+-    static __binary_end_inclusive: UnsafeCell<u64>;
+-
+-    static __runtime_init_reloc: UnsafeCell<u64>;
  }
-@@ -26,12 +23,10 @@
- /// The board's memory map.
+
+ //--------------------------------------------------------------------------------------------------
+@@ -27,12 +25,9 @@
+ /// The board's physical memory map.
  #[rustfmt::skip]
  pub(super) mod map {
 -    pub const BOOT_CORE_STACK_END:        usize =        0x8_0000;
-+    pub const BOOT_CORE_STACK_END: usize = 0x8_0000;
-
--    pub const BOARD_DEFAULT_LOAD_ADDRESS: usize =        0x8_0000;
 -
+-    pub const BOARD_DEFAULT_LOAD_ADDRESS: usize =        0x8_0000;
+
 -    pub const GPIO_OFFSET:                usize =        0x0020_0000;
 -    pub const UART_OFFSET:                usize =        0x0020_1000;
 +    pub const GPIO_OFFSET:         usize = 0x0020_0000;
@@ -435,10 +422,20 @@ diff -uNr 07_uart_chainloader/src/bsp/raspberrypi/memory.rs 08_timestamps/src/bs
 
      /// Physical devices.
      #[cfg(feature = "bsp_rpi3")]
-@@ -64,35 +59,13 @@
-     map::BOOT_CORE_STACK_END
+@@ -56,44 +51,36 @@
  }
 
+ //--------------------------------------------------------------------------------------------------
+-// Public Code
++// Private Code
+ //--------------------------------------------------------------------------------------------------
+
+-/// Exclusive end address of the boot core's stack.
+-#[inline(always)]
+-pub fn boot_core_stack_end() -> usize {
+-    map::BOOT_CORE_STACK_END
+-}
+-
 -/// The address on which the Raspberry firmware loads every binary by default.
 -#[inline(always)]
 -pub fn board_default_load_addr() -> *const u64 {
@@ -446,21 +443,33 @@ diff -uNr 07_uart_chainloader/src/bsp/raspberrypi/memory.rs 08_timestamps/src/bs
 -}
 -
 -/// Return the inclusive range spanning the relocated kernel binary.
--///
--/// # Safety
--///
++/// Start address of the Read+Execute (RX) range.
+ ///
+ /// # Safety
+ ///
 -/// - Values are provided by the linker script and must be trusted as-is.
 -/// - The linker-provided addresses must be u64 aligned.
 -pub fn relocated_binary_range_inclusive() -> RangeInclusive<*mut u64> {
 -    unsafe { RangeInclusive::new(__binary_start.get(), __binary_end_inclusive.get()) }
--}
--
++/// - Value is provided by the linker script and must be trusted as-is.
++#[inline(always)]
++fn rx_start() -> usize {
++    unsafe { __rx_start.get() as usize }
+ }
+
 -/// The relocated address of function `runtime_init()`.
--#[inline(always)]
++//--------------------------------------------------------------------------------------------------
++// Public Code
++//--------------------------------------------------------------------------------------------------
++
++/// Exclusive end address of the boot core's stack.
+ #[inline(always)]
 -pub fn relocated_runtime_init_addr() -> *const u64 {
 -    unsafe { __runtime_init_reloc.get() as _ }
--}
--
++pub fn boot_core_stack_end() -> usize {
++    rx_start()
+ }
+
 -/// Return the inclusive range spanning the relocated .bss section.
 +/// Return the inclusive range spanning the .bss section.
  ///
@@ -674,7 +683,7 @@ diff -uNr 07_uart_chainloader/src/print.rs 08_timestamps/src/print.rs
 diff -uNr 07_uart_chainloader/src/relocate.rs 08_timestamps/src/relocate.rs
 --- 07_uart_chainloader/src/relocate.rs
 +++ 08_timestamps/src/relocate.rs
-@@ -1,51 +0,0 @@
+@@ -1,49 +0,0 @@
 -// SPDX-License-Identifier: MIT OR Apache-2.0
 -//
 -// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -713,16 +722,14 @@ diff -uNr 07_uart_chainloader/src/relocate.rs 08_timestamps/src/relocate.rs
 -        current_binary_start_addr = current_binary_start_addr.offset(1);
 -    }
 -
--    // The following function calls form a hack to achieve an "absolute jump" to
--    // `runtime_init::runtime_init()` by forcing an indirection through the global offset table
--    // (GOT), so that execution continues from the relocated binary.
--    //
--    // Without this, the address of `runtime_init()` would be calculated as a relative offset from
--    // the current program counter, since we are compiling as `position independent code`. This
--    // would cause us to keep executing from the address to which the firmware loaded us, instead of
--    // the relocated position.
+-    // The following function calls realize an "absolute jump" to `runtime_init::runtime_init()` by
+-    // forcing an indirection through the global offset table (GOT), so that execution continues
+-    // from the relocated binary.
 -    //
--    // There likely is a more elegant way to do this.
+-    // Without the indirection through the assembly, the address of `runtime_init()` would be
+-    // calculated as a relative offset from the current program counter, since we are compiling as
+-    // `position independent code`. This would cause us to keep executing from the address to which
+-    // the firmware loaded us, instead of the relocated position.
 -    let relocated_runtime_init_addr = bsp::memory::relocated_runtime_init_addr() as usize;
 -    cpu::branch_to_raw_addr(relocated_runtime_init_addr)
 -}
diff --git a/08_timestamps/src/bsp/raspberrypi/link.ld b/08_timestamps/src/bsp/raspberrypi/link.ld
index 573abc5f0..87e6a976f 100644
--- a/08_timestamps/src/bsp/raspberrypi/link.ld
+++ b/08_timestamps/src/bsp/raspberrypi/link.ld
@@ -3,37 +3,47 @@
  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
+/* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_load_addr = 0x80000;
+
+ENTRY(__rpi_load_addr)
+
+PHDRS
+{
+    segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
+    segment_rw PT_LOAD FLAGS(6); /* 6 == RW */
+}
+
 SECTIONS
 {
-    /* Set current address to the value from which the RPi starts execution */
-    . = 0x80000;
+    . =  __rpi_load_addr;
 
+    /***********************************************************************************************
+    * Code + RO Data + Global Offset Table
+    ***********************************************************************************************/
+    __rx_start = .;
     .text :
     {
-        *(.text._start) *(.text*)
-    }
+        KEEP(*(.text._start))
+        *(.text*)
+    } :segment_rx
 
-    .rodata :
-    {
-        *(.rodata*)
-    }
+    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
+    .got    : ALIGN(8) { *(.got)     } :segment_rx
 
-    .data :
-    {
-        *(.data*)
-    }
+    /***********************************************************************************************
+    * Data + BSS
+    ***********************************************************************************************/
+    .data : { *(.data*) } :segment_rw
 
     /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-    .bss ALIGN(8):
+    .bss : ALIGN(8)
     {
         __bss_start = .;
         *(.bss*);
         . = ALIGN(8);
 
-        /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-        . += 8;
+        . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
         __bss_end_inclusive = . - 8;
-    }
-
-    /DISCARD/ : { *(.comment*) }
+    } :NONE
 }
diff --git a/08_timestamps/src/bsp/raspberrypi/memory.rs b/08_timestamps/src/bsp/raspberrypi/memory.rs
index fb47b1418..56a3306e5 100644
--- a/08_timestamps/src/bsp/raspberrypi/memory.rs
+++ b/08_timestamps/src/bsp/raspberrypi/memory.rs
@@ -12,6 +12,8 @@ use core::{cell::UnsafeCell, ops::RangeInclusive};
 
 // Symbols from the linker script.
 extern "Rust" {
+    static __rx_start: UnsafeCell<()>;
+
     static __bss_start: UnsafeCell<u64>;
     static __bss_end_inclusive: UnsafeCell<u64>;
 }
@@ -20,10 +22,9 @@ extern "Rust" {
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
-/// The board's memory map.
+/// The board's physical memory map.
 #[rustfmt::skip]
 pub(super) mod map {
-    pub const BOOT_CORE_STACK_END: usize = 0x8_0000;
 
     pub const GPIO_OFFSET:         usize = 0x0020_0000;
     pub const UART_OFFSET:         usize = 0x0020_1000;
@@ -49,6 +50,20 @@ pub(super) mod map {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// Start address of the Read+Execute (RX) range.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn rx_start() -> usize {
+    unsafe { __rx_start.get() as usize }
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -56,7 +71,7 @@ pub(super) mod map {
 /// Exclusive end address of the boot core's stack.
 #[inline(always)]
 pub fn boot_core_stack_end() -> usize {
-    map::BOOT_CORE_STACK_END
+    rx_start()
 }
 
 /// Return the inclusive range spanning the .bss section.
diff --git a/09_hw_debug_JTAG/Makefile b/09_hw_debug_JTAG/Makefile
index 038244e7e..e3dcaae86 100644
--- a/09_hw_debug_JTAG/Makefile
+++ b/09_hw_debug_JTAG/Makefile
@@ -147,6 +147,7 @@ objdump: $(KERNEL_ELF)
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
+                --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
 nm: $(KERNEL_ELF)
diff --git a/09_hw_debug_JTAG/src/bsp/raspberrypi/link.ld b/09_hw_debug_JTAG/src/bsp/raspberrypi/link.ld
index 573abc5f0..87e6a976f 100644
--- a/09_hw_debug_JTAG/src/bsp/raspberrypi/link.ld
+++ b/09_hw_debug_JTAG/src/bsp/raspberrypi/link.ld
@@ -3,37 +3,47 @@
  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
+/* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_load_addr = 0x80000;
+
+ENTRY(__rpi_load_addr)
+
+PHDRS
+{
+    segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
+    segment_rw PT_LOAD FLAGS(6); /* 6 == RW */
+}
+
 SECTIONS
 {
-    /* Set current address to the value from which the RPi starts execution */
-    . = 0x80000;
+    . =  __rpi_load_addr;
 
+    /***********************************************************************************************
+    * Code + RO Data + Global Offset Table
+    ***********************************************************************************************/
+    __rx_start = .;
     .text :
     {
-        *(.text._start) *(.text*)
-    }
+        KEEP(*(.text._start))
+        *(.text*)
+    } :segment_rx
 
-    .rodata :
-    {
-        *(.rodata*)
-    }
+    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
+    .got    : ALIGN(8) { *(.got)     } :segment_rx
 
-    .data :
-    {
-        *(.data*)
-    }
+    /***********************************************************************************************
+    * Data + BSS
+    ***********************************************************************************************/
+    .data : { *(.data*) } :segment_rw
 
     /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-    .bss ALIGN(8):
+    .bss : ALIGN(8)
     {
         __bss_start = .;
         *(.bss*);
         . = ALIGN(8);
 
-        /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-        . += 8;
+        . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
         __bss_end_inclusive = . - 8;
-    }
-
-    /DISCARD/ : { *(.comment*) }
+    } :NONE
 }
diff --git a/09_hw_debug_JTAG/src/bsp/raspberrypi/memory.rs b/09_hw_debug_JTAG/src/bsp/raspberrypi/memory.rs
index fb47b1418..56a3306e5 100644
--- a/09_hw_debug_JTAG/src/bsp/raspberrypi/memory.rs
+++ b/09_hw_debug_JTAG/src/bsp/raspberrypi/memory.rs
@@ -12,6 +12,8 @@ use core::{cell::UnsafeCell, ops::RangeInclusive};
 
 // Symbols from the linker script.
 extern "Rust" {
+    static __rx_start: UnsafeCell<()>;
+
     static __bss_start: UnsafeCell<u64>;
     static __bss_end_inclusive: UnsafeCell<u64>;
 }
@@ -20,10 +22,9 @@ extern "Rust" {
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
-/// The board's memory map.
+/// The board's physical memory map.
 #[rustfmt::skip]
 pub(super) mod map {
-    pub const BOOT_CORE_STACK_END: usize = 0x8_0000;
 
     pub const GPIO_OFFSET:         usize = 0x0020_0000;
     pub const UART_OFFSET:         usize = 0x0020_1000;
@@ -49,6 +50,20 @@ pub(super) mod map {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// Start address of the Read+Execute (RX) range.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn rx_start() -> usize {
+    unsafe { __rx_start.get() as usize }
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -56,7 +71,7 @@ pub(super) mod map {
 /// Exclusive end address of the boot core's stack.
 #[inline(always)]
 pub fn boot_core_stack_end() -> usize {
-    map::BOOT_CORE_STACK_END
+    rx_start()
 }
 
 /// Return the inclusive range spanning the .bss section.
diff --git a/10_privilege_level/Makefile b/10_privilege_level/Makefile
index 038244e7e..e3dcaae86 100644
--- a/10_privilege_level/Makefile
+++ b/10_privilege_level/Makefile
@@ -147,6 +147,7 @@ objdump: $(KERNEL_ELF)
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
+                --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
 nm: $(KERNEL_ELF)
diff --git a/10_privilege_level/README.md b/10_privilege_level/README.md
index 0d58e281a..2c4355487 100644
--- a/10_privilege_level/README.md
+++ b/10_privilege_level/README.md
@@ -136,7 +136,7 @@ Finally, we set the stack pointer for `SP_EL1` and call `ERET`:
 
 ```rust
 // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it.
-SP_EL1.set(bsp::cpu::BOOT_CORE_STACK_START);
+SP_EL1.set(bsp::memory::boot_core_stack_end() as u64);
 
 // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
 asm::eret()
diff --git a/10_privilege_level/src/bsp/raspberrypi/link.ld b/10_privilege_level/src/bsp/raspberrypi/link.ld
index 573abc5f0..87e6a976f 100644
--- a/10_privilege_level/src/bsp/raspberrypi/link.ld
+++ b/10_privilege_level/src/bsp/raspberrypi/link.ld
@@ -3,37 +3,47 @@
  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
+/* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_load_addr = 0x80000;
+
+ENTRY(__rpi_load_addr)
+
+PHDRS
+{
+    segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
+    segment_rw PT_LOAD FLAGS(6); /* 6 == RW */
+}
+
 SECTIONS
 {
-    /* Set current address to the value from which the RPi starts execution */
-    . = 0x80000;
+    . =  __rpi_load_addr;
 
+    /***********************************************************************************************
+    * Code + RO Data + Global Offset Table
+    ***********************************************************************************************/
+    __rx_start = .;
     .text :
     {
-        *(.text._start) *(.text*)
-    }
+        KEEP(*(.text._start))
+        *(.text*)
+    } :segment_rx
 
-    .rodata :
-    {
-        *(.rodata*)
-    }
+    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
+    .got    : ALIGN(8) { *(.got)     } :segment_rx
 
-    .data :
-    {
-        *(.data*)
-    }
+    /***********************************************************************************************
+    * Data + BSS
+    ***********************************************************************************************/
+    .data : { *(.data*) } :segment_rw
 
     /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-    .bss ALIGN(8):
+    .bss : ALIGN(8)
     {
         __bss_start = .;
         *(.bss*);
         . = ALIGN(8);
 
-        /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-        . += 8;
+        . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
         __bss_end_inclusive = . - 8;
-    }
-
-    /DISCARD/ : { *(.comment*) }
+    } :NONE
 }
diff --git a/10_privilege_level/src/bsp/raspberrypi/memory.rs b/10_privilege_level/src/bsp/raspberrypi/memory.rs
index fb47b1418..56a3306e5 100644
--- a/10_privilege_level/src/bsp/raspberrypi/memory.rs
+++ b/10_privilege_level/src/bsp/raspberrypi/memory.rs
@@ -12,6 +12,8 @@ use core::{cell::UnsafeCell, ops::RangeInclusive};
 
 // Symbols from the linker script.
 extern "Rust" {
+    static __rx_start: UnsafeCell<()>;
+
     static __bss_start: UnsafeCell<u64>;
     static __bss_end_inclusive: UnsafeCell<u64>;
 }
@@ -20,10 +22,9 @@ extern "Rust" {
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
-/// The board's memory map.
+/// The board's physical memory map.
 #[rustfmt::skip]
 pub(super) mod map {
-    pub const BOOT_CORE_STACK_END: usize = 0x8_0000;
 
     pub const GPIO_OFFSET:         usize = 0x0020_0000;
     pub const UART_OFFSET:         usize = 0x0020_1000;
@@ -49,6 +50,20 @@ pub(super) mod map {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// Start address of the Read+Execute (RX) range.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn rx_start() -> usize {
+    unsafe { __rx_start.get() as usize }
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -56,7 +71,7 @@ pub(super) mod map {
 /// Exclusive end address of the boot core's stack.
 #[inline(always)]
 pub fn boot_core_stack_end() -> usize {
-    map::BOOT_CORE_STACK_END
+    rx_start()
 }
 
 /// Return the inclusive range spanning the .bss section.
diff --git a/11_virtual_mem_part1_identity_mapping/Makefile b/11_virtual_mem_part1_identity_mapping/Makefile
index 038244e7e..e3dcaae86 100644
--- a/11_virtual_mem_part1_identity_mapping/Makefile
+++ b/11_virtual_mem_part1_identity_mapping/Makefile
@@ -147,6 +147,7 @@ objdump: $(KERNEL_ELF)
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
+                --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
 nm: $(KERNEL_ELF)
diff --git a/11_virtual_mem_part1_identity_mapping/README.md b/11_virtual_mem_part1_identity_mapping/README.md
index 270c8422a..bebf518e9 100644
--- a/11_virtual_mem_part1_identity_mapping/README.md
+++ b/11_virtual_mem_part1_identity_mapping/README.md
@@ -224,10 +224,16 @@ enables caching for data and instructions.
 
 ### `link.ld`
 
-We need to align the `ro` section to `64 KiB` so that it doesn't overlap with the next section that
-needs read/write attributes. This blows up the binary in size, but is a small price to pay
-considering that it reduces the amount of static paging entries significantly, when compared to the
-classical `4 KiB` granule.
+We need to align the `rx` segment to `64 KiB` so that it doesn't overlap with the next section that
+needs read/write attributes instead of read/execute attributes:
+
+```ld.s
+. = ALIGN(64K); /* Align to page boundary */
+__rx_end_exclusive = .;
+```
+
+This blows up the binary in size, but is a small price to pay considering that it reduces the amount
+of static paging entries significantly, when compared to the classical `4 KiB` granule.
 
 ## Address translation examples
 
@@ -807,23 +813,16 @@ diff -uNr 10_privilege_level/src/_arch/aarch64/memory/mmu.rs 11_virtual_mem_part
 diff -uNr 10_privilege_level/src/bsp/raspberrypi/link.ld 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
 --- 10_privilege_level/src/bsp/raspberrypi/link.ld
 +++ 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
-@@ -8,6 +8,7 @@
-     /* Set current address to the value from which the RPi starts execution */
-     . = 0x80000;
-
-+    __ro_start = .;
-     .text :
-     {
-         *(.text._start) *(.text*)
-@@ -17,6 +18,8 @@
-     {
-         *(.rodata*)
-     }
-+    . = ALIGN(65536); /* Fill up to 64 KiB */
-+    __ro_end = .;
+@@ -31,6 +31,9 @@
+     .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
+     .got    : ALIGN(8) { *(.got)     } :segment_rx
 
-     .data :
-     {
++    . = ALIGN(64K); /* Align to page boundary */
++    __rx_end_exclusive = .;
++
+     /***********************************************************************************************
+     * Data + BSS
+     ***********************************************************************************************/
 
 diff -uNr 10_privilege_level/src/bsp/raspberrypi/memory/mmu.rs 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
 --- 10_privilege_level/src/bsp/raspberrypi/memory/mmu.rs
@@ -857,7 +856,7 @@ diff -uNr 10_privilege_level/src/bsp/raspberrypi/memory/mmu.rs 11_virtual_mem_pa
 +    [
 +        TranslationDescriptor {
 +            name: "Kernel code and RO data",
-+            virtual_range: ro_range_inclusive,
++            virtual_range: rx_range_inclusive,
 +            physical_range_translation: Translation::Identity,
 +            attribute_fields: AttributeFields {
 +                mem_attributes: MemAttributes::CacheableDRAM,
@@ -892,10 +891,10 @@ diff -uNr 10_privilege_level/src/bsp/raspberrypi/memory/mmu.rs 11_virtual_mem_pa
 +// Private Code
 +//--------------------------------------------------------------------------------------------------
 +
-+fn ro_range_inclusive() -> RangeInclusive<usize> {
++fn rx_range_inclusive() -> RangeInclusive<usize> {
 +    // Notice the subtraction to turn the exclusive end into an inclusive end.
 +    #[allow(clippy::range_minus_one)]
-+    RangeInclusive::new(super::ro_start(), super::ro_end() - 1)
++    RangeInclusive::new(super::rx_start(), super::rx_end_exclusive() - 1)
 +}
 +
 +fn remapped_mmio_range_inclusive() -> RangeInclusive<usize> {
@@ -928,17 +927,16 @@ diff -uNr 10_privilege_level/src/bsp/raspberrypi/memory.rs 11_virtual_mem_part1_
  use core::{cell::UnsafeCell, ops::RangeInclusive};
 
  //--------------------------------------------------------------------------------------------------
-@@ -14,6 +16,8 @@
+@@ -13,6 +15,7 @@
+ // Symbols from the linker script.
  extern "Rust" {
+     static __rx_start: UnsafeCell<()>;
++    static __rx_end_exclusive: UnsafeCell<()>;
+
      static __bss_start: UnsafeCell<u64>;
      static __bss_end_inclusive: UnsafeCell<u64>;
-+    static __ro_start: UnsafeCell<()>;
-+    static __ro_end: UnsafeCell<()>;
- }
-
- //--------------------------------------------------------------------------------------------------
-@@ -23,6 +27,21 @@
- /// The board's memory map.
+@@ -25,6 +28,20 @@
+ /// The board's physical memory map.
  #[rustfmt::skip]
  pub(super) mod map {
 +    /// The inclusive end address of the memory map.
@@ -955,11 +953,10 @@ diff -uNr 10_privilege_level/src/bsp/raspberrypi/memory.rs 11_virtual_mem_part1_
 +    /// physical address that is not backed by any DRAM (e.g. accessing an address close to 4 GiB on
 +    /// an RPi3 that comes with 1 GiB of RAM). This would result in a crash or other kind of error.
 +    pub const END_INCLUSIVE:       usize = 0xFFFF_FFFF;
-+
-     pub const BOOT_CORE_STACK_END: usize = 0x8_0000;
 
      pub const GPIO_OFFSET:         usize = 0x0020_0000;
-@@ -36,6 +55,7 @@
+     pub const UART_OFFSET:         usize = 0x0020_1000;
+@@ -37,6 +54,7 @@
          pub const START:            usize =         0x3F00_0000;
          pub const GPIO_START:       usize = START + GPIO_OFFSET;
          pub const PL011_UART_START: usize = START + UART_OFFSET;
@@ -967,7 +964,7 @@ diff -uNr 10_privilege_level/src/bsp/raspberrypi/memory.rs 11_virtual_mem_part1_
      }
 
      /// Physical devices.
-@@ -46,10 +66,35 @@
+@@ -47,6 +65,7 @@
          pub const START:            usize =         0xFE00_0000;
          pub const GPIO_START:       usize = START + GPIO_OFFSET;
          pub const PL011_UART_START: usize = START + UART_OFFSET;
@@ -975,35 +972,24 @@ diff -uNr 10_privilege_level/src/bsp/raspberrypi/memory.rs 11_virtual_mem_part1_
      }
  }
 
- //--------------------------------------------------------------------------------------------------
-+// Private Code
-+//--------------------------------------------------------------------------------------------------
-+
-+/// Start address of the Read-Only (RO) range.
-+///
-+/// # Safety
-+///
-+/// - Value is provided by the linker script and must be trusted as-is.
-+#[inline(always)]
-+fn ro_start() -> usize {
-+    unsafe { __ro_start.get() as usize }
-+}
-+
-+/// Size of the Read-Only (RO) range of the kernel binary.
+@@ -64,6 +83,16 @@
+     unsafe { __rx_start.get() as usize }
+ }
+
++/// Exclusive end address of the Read+Execute (RX) range.
 +///
 +/// # Safety
 +///
 +/// - Value is provided by the linker script and must be trusted as-is.
 +#[inline(always)]
-+fn ro_end() -> usize {
-+    unsafe { __ro_end.get() as usize }
++fn rx_end_exclusive() -> usize {
++    unsafe { __rx_end_exclusive.get() as usize }
 +}
 +
-+//--------------------------------------------------------------------------------------------------
+ //--------------------------------------------------------------------------------------------------
  // Public Code
  //--------------------------------------------------------------------------------------------------
 
-
 diff -uNr 10_privilege_level/src/bsp.rs 11_virtual_mem_part1_identity_mapping/src/bsp.rs
 --- 10_privilege_level/src/bsp.rs
 +++ 11_virtual_mem_part1_identity_mapping/src/bsp.rs
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld b/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
index aec8e79b7..6c63ba10f 100644
--- a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
+++ b/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
@@ -3,40 +3,50 @@
  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
+/* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_load_addr = 0x80000;
+
+ENTRY(__rpi_load_addr)
+
+PHDRS
+{
+    segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
+    segment_rw PT_LOAD FLAGS(6); /* 6 == RW */
+}
+
 SECTIONS
 {
-    /* Set current address to the value from which the RPi starts execution */
-    . = 0x80000;
+    . =  __rpi_load_addr;
 
-    __ro_start = .;
+    /***********************************************************************************************
+    * Code + RO Data + Global Offset Table
+    ***********************************************************************************************/
+    __rx_start = .;
     .text :
     {
-        *(.text._start) *(.text*)
-    }
+        KEEP(*(.text._start))
+        *(.text*)
+    } :segment_rx
 
-    .rodata :
-    {
-        *(.rodata*)
-    }
-    . = ALIGN(65536); /* Fill up to 64 KiB */
-    __ro_end = .;
+    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
+    .got    : ALIGN(8) { *(.got)     } :segment_rx
 
-    .data :
-    {
-        *(.data*)
-    }
+    . = ALIGN(64K); /* Align to page boundary */
+    __rx_end_exclusive = .;
+
+    /***********************************************************************************************
+    * Data + BSS
+    ***********************************************************************************************/
+    .data : { *(.data*) } :segment_rw
 
     /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-    .bss ALIGN(8):
+    .bss : ALIGN(8)
     {
         __bss_start = .;
         *(.bss*);
         . = ALIGN(8);
 
-        /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-        . += 8;
+        . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
         __bss_end_inclusive = . - 8;
-    }
-
-    /DISCARD/ : { *(.comment*) }
+    } :NONE
 }
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs b/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs
index d4bcf0a3b..bb18dd201 100644
--- a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs
@@ -14,17 +14,18 @@ use core::{cell::UnsafeCell, ops::RangeInclusive};
 
 // Symbols from the linker script.
 extern "Rust" {
+    static __rx_start: UnsafeCell<()>;
+    static __rx_end_exclusive: UnsafeCell<()>;
+
     static __bss_start: UnsafeCell<u64>;
     static __bss_end_inclusive: UnsafeCell<u64>;
-    static __ro_start: UnsafeCell<()>;
-    static __ro_end: UnsafeCell<()>;
 }
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
-/// The board's memory map.
+/// The board's physical memory map.
 #[rustfmt::skip]
 pub(super) mod map {
     /// The inclusive end address of the memory map.
@@ -42,8 +43,6 @@ pub(super) mod map {
     /// an RPi3 that comes with 1 GiB of RAM). This would result in a crash or other kind of error.
     pub const END_INCLUSIVE:       usize = 0xFFFF_FFFF;
 
-    pub const BOOT_CORE_STACK_END: usize = 0x8_0000;
-
     pub const GPIO_OFFSET:         usize = 0x0020_0000;
     pub const UART_OFFSET:         usize = 0x0020_1000;
 
@@ -74,24 +73,24 @@ pub(super) mod map {
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-/// Start address of the Read-Only (RO) range.
+/// Start address of the Read+Execute (RX) range.
 ///
 /// # Safety
 ///
 /// - Value is provided by the linker script and must be trusted as-is.
 #[inline(always)]
-fn ro_start() -> usize {
-    unsafe { __ro_start.get() as usize }
+fn rx_start() -> usize {
+    unsafe { __rx_start.get() as usize }
 }
 
-/// Size of the Read-Only (RO) range of the kernel binary.
+/// Exclusive end address of the Read+Execute (RX) range.
 ///
 /// # Safety
 ///
 /// - Value is provided by the linker script and must be trusted as-is.
 #[inline(always)]
-fn ro_end() -> usize {
-    unsafe { __ro_end.get() as usize }
+fn rx_end_exclusive() -> usize {
+    unsafe { __rx_end_exclusive.get() as usize }
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -101,7 +100,7 @@ fn ro_end() -> usize {
 /// Exclusive end address of the boot core's stack.
 #[inline(always)]
 pub fn boot_core_stack_end() -> usize {
-    map::BOOT_CORE_STACK_END
+    rx_start()
 }
 
 /// Return the inclusive range spanning the .bss section.
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs b/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
index 703bb3ba2..cf9cfcae2 100644
--- a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
@@ -26,7 +26,7 @@ pub static LAYOUT: KernelVirtualLayout<NUM_MEM_RANGES> = KernelVirtualLayout::ne
     [
         TranslationDescriptor {
             name: "Kernel code and RO data",
-            virtual_range: ro_range_inclusive,
+            virtual_range: rx_range_inclusive,
             physical_range_translation: Translation::Identity,
             attribute_fields: AttributeFields {
                 mem_attributes: MemAttributes::CacheableDRAM,
@@ -61,10 +61,10 @@ pub static LAYOUT: KernelVirtualLayout<NUM_MEM_RANGES> = KernelVirtualLayout::ne
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-fn ro_range_inclusive() -> RangeInclusive<usize> {
+fn rx_range_inclusive() -> RangeInclusive<usize> {
     // Notice the subtraction to turn the exclusive end into an inclusive end.
     #[allow(clippy::range_minus_one)]
-    RangeInclusive::new(super::ro_start(), super::ro_end() - 1)
+    RangeInclusive::new(super::rx_start(), super::rx_end_exclusive() - 1)
 }
 
 fn remapped_mmio_range_inclusive() -> RangeInclusive<usize> {
diff --git a/12_exceptions_part1_groundwork/Makefile b/12_exceptions_part1_groundwork/Makefile
index 038244e7e..e3dcaae86 100644
--- a/12_exceptions_part1_groundwork/Makefile
+++ b/12_exceptions_part1_groundwork/Makefile
@@ -147,6 +147,7 @@ objdump: $(KERNEL_ELF)
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
+                --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
 nm: $(KERNEL_ELF)
diff --git a/12_exceptions_part1_groundwork/README.md b/12_exceptions_part1_groundwork/README.md
index 0ce07116d..b495742d6 100644
--- a/12_exceptions_part1_groundwork/README.md
+++ b/12_exceptions_part1_groundwork/README.md
@@ -238,7 +238,7 @@ because `Rust` has no stable convention ([yet](https://github.com/rust-lang/rfcs
 Next, we craft the exception vector table:
 
 ```asm
-.section .exception_vectors, "ax", @progbits
+.section .text
 
 // Align by 2^11 bytes, as demanded by ARMv8-A. Same as ALIGN(2048) in an ld script.
 .align 11
@@ -324,7 +324,7 @@ The actual handlers referenced from the assembly can now branch to it for the ti
 
 ```rust
 #[no_mangle]
-unsafe extern "C" fn current_el0_synchronous(e: &mut ExceptionContext) {
+unsafe extern "C" fn current_elx_irq(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 ```
@@ -480,7 +480,7 @@ General purpose register:
 diff -uNr 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs 12_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
 --- 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs
 +++ 12_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
-@@ -11,7 +11,230 @@
+@@ -11,7 +11,224 @@
  //!
  //! crate::exception::arch_exception
 
@@ -541,18 +541,18 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs 1
 +//------------------------------------------------------------------------------
 +
 +#[no_mangle]
-+unsafe extern "C" fn current_el0_synchronous(e: &mut ExceptionContext) {
-+    default_exception_handler(e);
++unsafe extern "C" fn current_el0_synchronous(_e: &mut ExceptionContext) {
++    panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 +}
 +
 +#[no_mangle]
-+unsafe extern "C" fn current_el0_irq(e: &mut ExceptionContext) {
-+    default_exception_handler(e);
++unsafe extern "C" fn current_el0_irq(_e: &mut ExceptionContext) {
++    panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 +}
 +
 +#[no_mangle]
-+unsafe extern "C" fn current_el0_serror(e: &mut ExceptionContext) {
-+    default_exception_handler(e);
++unsafe extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
++    panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 +}
 +
 +//------------------------------------------------------------------------------
@@ -646,9 +646,7 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs 1
 +        writeln!(f, " - {}", ec_translation)?;
 +
 +        // Raw print of instruction specific syndrome.
-+        write!(f, "      Instr Specific Syndrome (ISS): {:#x}", esr_el1.read(ESR_EL1::ISS))?;
-+
-+        Ok(())
++        write!(f, "      Instr Specific Syndrome (ISS): {:#x}", esr_el1.read(ESR_EL1::ISS))
 +    }
 +}
 +
@@ -681,9 +679,7 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs 1
 +
 +        write!(f, "      Illegal Execution State (IL): {}",
 +            to_flag_str(self.0.is_set(SPSR_EL1::IL))
-+        )?;
-+
-+        Ok(())
++        )
 +    }
 +}
 +
@@ -704,15 +700,13 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs 1
 +        for (i, reg) in self.gpr.iter().enumerate() {
 +            write!(f, "      x{: <2}: {: >#018x}{}", i, reg, alternating(i))?;
 +        }
-+        write!(f, "      lr : {:#018x}", self.lr)?;
-+
-+        Ok(())
++        write!(f, "      lr : {:#018x}", self.lr)
 +    }
 +}
 
  //--------------------------------------------------------------------------------------------------
  // Public Code
-@@ -28,3 +251,23 @@
+@@ -28,3 +245,23 @@
          _ => (PrivilegeLevel::Unknown, "Unknown"),
      }
  }
@@ -793,7 +787,7 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.S 12
 +//--------------------------------------------------------------------------------------------------
 +// The exception vector table.
 +//--------------------------------------------------------------------------------------------------
-+.section .exception_vectors, "ax", @progbits
++.section .text
 +
 +// Align by 2^11 bytes, as demanded by ARMv8-A. Same as ALIGN(2048) in an ld script.
 +.align 11
@@ -880,22 +874,6 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.S 12
 +
 +    eret
 
-diff -uNr 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld 12_exceptions_part1_groundwork/src/bsp/raspberrypi/link.ld
---- 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
-+++ 12_exceptions_part1_groundwork/src/bsp/raspberrypi/link.ld
-@@ -14,6 +14,11 @@
-         *(.text._start) *(.text*)
-     }
-
-+    .exception_vectors :
-+    {
-+        *(.exception_vectors*)
-+    }
-+
-     .rodata :
-     {
-         *(.rodata*)
-
 diff -uNr 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs 12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
 --- 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
 +++ 12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
@@ -926,7 +904,7 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.r
              virtual_range: mmio_range_inclusive,
              physical_range_translation: Translation::Identity,
 @@ -67,11 +57,6 @@
-     RangeInclusive::new(super::ro_start(), super::ro_end() - 1)
+     RangeInclusive::new(super::rx_start(), super::rx_end_exclusive() - 1)
  }
 
 -fn remapped_mmio_range_inclusive() -> RangeInclusive<usize> {
diff --git a/12_exceptions_part1_groundwork/src/_arch/aarch64/exception.S b/12_exceptions_part1_groundwork/src/_arch/aarch64/exception.S
index 4d125334c..fd7b1f930 100644
--- a/12_exceptions_part1_groundwork/src/_arch/aarch64/exception.S
+++ b/12_exceptions_part1_groundwork/src/_arch/aarch64/exception.S
@@ -50,7 +50,7 @@
 //--------------------------------------------------------------------------------------------------
 // The exception vector table.
 //--------------------------------------------------------------------------------------------------
-.section .exception_vectors, "ax", @progbits
+.section .text
 
 // Align by 2^11 bytes, as demanded by ARMv8-A. Same as ALIGN(2048) in an ld script.
 .align 11
diff --git a/12_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs b/12_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
index 64f1fd23e..f08d0ce4a 100644
--- a/12_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
+++ b/12_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
@@ -67,18 +67,18 @@ fn default_exception_handler(e: &ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_synchronous(e: &mut ExceptionContext) {
-    default_exception_handler(e);
+unsafe extern "C" fn current_el0_synchronous(_e: &mut ExceptionContext) {
+    panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_irq(e: &mut ExceptionContext) {
-    default_exception_handler(e);
+unsafe extern "C" fn current_el0_irq(_e: &mut ExceptionContext) {
+    panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_serror(e: &mut ExceptionContext) {
-    default_exception_handler(e);
+unsafe extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
+    panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
 //------------------------------------------------------------------------------
@@ -172,9 +172,7 @@ impl fmt::Display for EsrEL1 {
         writeln!(f, " - {}", ec_translation)?;
 
         // Raw print of instruction specific syndrome.
-        write!(f, "      Instr Specific Syndrome (ISS): {:#x}", esr_el1.read(ESR_EL1::ISS))?;
-
-        Ok(())
+        write!(f, "      Instr Specific Syndrome (ISS): {:#x}", esr_el1.read(ESR_EL1::ISS))
     }
 }
 
@@ -207,9 +205,7 @@ impl fmt::Display for SpsrEL1 {
 
         write!(f, "      Illegal Execution State (IL): {}",
             to_flag_str(self.0.is_set(SPSR_EL1::IL))
-        )?;
-
-        Ok(())
+        )
     }
 }
 
@@ -230,9 +226,7 @@ impl fmt::Display for ExceptionContext {
         for (i, reg) in self.gpr.iter().enumerate() {
             write!(f, "      x{: <2}: {: >#018x}{}", i, reg, alternating(i))?;
         }
-        write!(f, "      lr : {:#018x}", self.lr)?;
-
-        Ok(())
+        write!(f, "      lr : {:#018x}", self.lr)
     }
 }
 
diff --git a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/link.ld b/12_exceptions_part1_groundwork/src/bsp/raspberrypi/link.ld
index 4dfe60c7f..6c63ba10f 100644
--- a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/link.ld
+++ b/12_exceptions_part1_groundwork/src/bsp/raspberrypi/link.ld
@@ -3,45 +3,50 @@
  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
+/* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_load_addr = 0x80000;
+
+ENTRY(__rpi_load_addr)
+
+PHDRS
+{
+    segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
+    segment_rw PT_LOAD FLAGS(6); /* 6 == RW */
+}
+
 SECTIONS
 {
-    /* Set current address to the value from which the RPi starts execution */
-    . = 0x80000;
+    . =  __rpi_load_addr;
 
-    __ro_start = .;
+    /***********************************************************************************************
+    * Code + RO Data + Global Offset Table
+    ***********************************************************************************************/
+    __rx_start = .;
     .text :
     {
-        *(.text._start) *(.text*)
-    }
+        KEEP(*(.text._start))
+        *(.text*)
+    } :segment_rx
 
-    .exception_vectors :
-    {
-        *(.exception_vectors*)
-    }
+    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
+    .got    : ALIGN(8) { *(.got)     } :segment_rx
 
-    .rodata :
-    {
-        *(.rodata*)
-    }
-    . = ALIGN(65536); /* Fill up to 64 KiB */
-    __ro_end = .;
+    . = ALIGN(64K); /* Align to page boundary */
+    __rx_end_exclusive = .;
 
-    .data :
-    {
-        *(.data*)
-    }
+    /***********************************************************************************************
+    * Data + BSS
+    ***********************************************************************************************/
+    .data : { *(.data*) } :segment_rw
 
     /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-    .bss ALIGN(8):
+    .bss : ALIGN(8)
     {
         __bss_start = .;
         *(.bss*);
         . = ALIGN(8);
 
-        /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-        . += 8;
+        . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
         __bss_end_inclusive = . - 8;
-    }
-
-    /DISCARD/ : { *(.comment*) }
+    } :NONE
 }
diff --git a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory.rs b/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory.rs
index d4bcf0a3b..bb18dd201 100644
--- a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory.rs
+++ b/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory.rs
@@ -14,17 +14,18 @@ use core::{cell::UnsafeCell, ops::RangeInclusive};
 
 // Symbols from the linker script.
 extern "Rust" {
+    static __rx_start: UnsafeCell<()>;
+    static __rx_end_exclusive: UnsafeCell<()>;
+
     static __bss_start: UnsafeCell<u64>;
     static __bss_end_inclusive: UnsafeCell<u64>;
-    static __ro_start: UnsafeCell<()>;
-    static __ro_end: UnsafeCell<()>;
 }
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
-/// The board's memory map.
+/// The board's physical memory map.
 #[rustfmt::skip]
 pub(super) mod map {
     /// The inclusive end address of the memory map.
@@ -42,8 +43,6 @@ pub(super) mod map {
     /// an RPi3 that comes with 1 GiB of RAM). This would result in a crash or other kind of error.
     pub const END_INCLUSIVE:       usize = 0xFFFF_FFFF;
 
-    pub const BOOT_CORE_STACK_END: usize = 0x8_0000;
-
     pub const GPIO_OFFSET:         usize = 0x0020_0000;
     pub const UART_OFFSET:         usize = 0x0020_1000;
 
@@ -74,24 +73,24 @@ pub(super) mod map {
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-/// Start address of the Read-Only (RO) range.
+/// Start address of the Read+Execute (RX) range.
 ///
 /// # Safety
 ///
 /// - Value is provided by the linker script and must be trusted as-is.
 #[inline(always)]
-fn ro_start() -> usize {
-    unsafe { __ro_start.get() as usize }
+fn rx_start() -> usize {
+    unsafe { __rx_start.get() as usize }
 }
 
-/// Size of the Read-Only (RO) range of the kernel binary.
+/// Exclusive end address of the Read+Execute (RX) range.
 ///
 /// # Safety
 ///
 /// - Value is provided by the linker script and must be trusted as-is.
 #[inline(always)]
-fn ro_end() -> usize {
-    unsafe { __ro_end.get() as usize }
+fn rx_end_exclusive() -> usize {
+    unsafe { __rx_end_exclusive.get() as usize }
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -101,7 +100,7 @@ fn ro_end() -> usize {
 /// Exclusive end address of the boot core's stack.
 #[inline(always)]
 pub fn boot_core_stack_end() -> usize {
-    map::BOOT_CORE_STACK_END
+    rx_start()
 }
 
 /// Return the inclusive range spanning the .bss section.
diff --git a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs b/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
index 1775c07cd..ef4bf32cc 100644
--- a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
+++ b/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
@@ -26,7 +26,7 @@ pub static LAYOUT: KernelVirtualLayout<NUM_MEM_RANGES> = KernelVirtualLayout::ne
     [
         TranslationDescriptor {
             name: "Kernel code and RO data",
-            virtual_range: ro_range_inclusive,
+            virtual_range: rx_range_inclusive,
             physical_range_translation: Translation::Identity,
             attribute_fields: AttributeFields {
                 mem_attributes: MemAttributes::CacheableDRAM,
@@ -51,10 +51,10 @@ pub static LAYOUT: KernelVirtualLayout<NUM_MEM_RANGES> = KernelVirtualLayout::ne
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-fn ro_range_inclusive() -> RangeInclusive<usize> {
+fn rx_range_inclusive() -> RangeInclusive<usize> {
     // Notice the subtraction to turn the exclusive end into an inclusive end.
     #[allow(clippy::range_minus_one)]
-    RangeInclusive::new(super::ro_start(), super::ro_end() - 1)
+    RangeInclusive::new(super::rx_start(), super::rx_end_exclusive() - 1)
 }
 
 fn mmio_range_inclusive() -> RangeInclusive<usize> {
diff --git a/13_integrated_testing/Makefile b/13_integrated_testing/Makefile
index 32d139243..4c2fb069a 100644
--- a/13_integrated_testing/Makefile
+++ b/13_integrated_testing/Makefile
@@ -179,6 +179,7 @@ objdump: $(KERNEL_ELF)
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
+                --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
 nm: $(KERNEL_ELF)
diff --git a/13_integrated_testing/src/_arch/aarch64/exception.S b/13_integrated_testing/src/_arch/aarch64/exception.S
index 4d125334c..fd7b1f930 100644
--- a/13_integrated_testing/src/_arch/aarch64/exception.S
+++ b/13_integrated_testing/src/_arch/aarch64/exception.S
@@ -50,7 +50,7 @@
 //--------------------------------------------------------------------------------------------------
 // The exception vector table.
 //--------------------------------------------------------------------------------------------------
-.section .exception_vectors, "ax", @progbits
+.section .text
 
 // Align by 2^11 bytes, as demanded by ARMv8-A. Same as ALIGN(2048) in an ld script.
 .align 11
diff --git a/13_integrated_testing/src/_arch/aarch64/exception.rs b/13_integrated_testing/src/_arch/aarch64/exception.rs
index 0e640ec69..e67841f9f 100644
--- a/13_integrated_testing/src/_arch/aarch64/exception.rs
+++ b/13_integrated_testing/src/_arch/aarch64/exception.rs
@@ -67,18 +67,18 @@ fn default_exception_handler(e: &ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_synchronous(e: &mut ExceptionContext) {
-    default_exception_handler(e);
+unsafe extern "C" fn current_el0_synchronous(_e: &mut ExceptionContext) {
+    panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_irq(e: &mut ExceptionContext) {
-    default_exception_handler(e);
+unsafe extern "C" fn current_el0_irq(_e: &mut ExceptionContext) {
+    panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_serror(e: &mut ExceptionContext) {
-    default_exception_handler(e);
+unsafe extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
+    panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
 //------------------------------------------------------------------------------
@@ -162,9 +162,7 @@ impl fmt::Display for EsrEL1 {
         writeln!(f, " - {}", ec_translation)?;
 
         // Raw print of instruction specific syndrome.
-        write!(f, "      Instr Specific Syndrome (ISS): {:#x}", esr_el1.read(ESR_EL1::ISS))?;
-
-        Ok(())
+        write!(f, "      Instr Specific Syndrome (ISS): {:#x}", esr_el1.read(ESR_EL1::ISS))
     }
 }
 
@@ -197,9 +195,7 @@ impl fmt::Display for SpsrEL1 {
 
         write!(f, "      Illegal Execution State (IL): {}",
             to_flag_str(self.0.is_set(SPSR_EL1::IL))
-        )?;
-
-        Ok(())
+        )
     }
 }
 
@@ -220,9 +216,7 @@ impl fmt::Display for ExceptionContext {
         for (i, reg) in self.gpr.iter().enumerate() {
             write!(f, "      x{: <2}: {: >#018x}{}", i, reg, alternating(i))?;
         }
-        write!(f, "      lr : {:#018x}", self.lr)?;
-
-        Ok(())
+        write!(f, "      lr : {:#018x}", self.lr)
     }
 }
 
diff --git a/13_integrated_testing/src/bsp/raspberrypi/link.ld b/13_integrated_testing/src/bsp/raspberrypi/link.ld
index 4dfe60c7f..6c63ba10f 100644
--- a/13_integrated_testing/src/bsp/raspberrypi/link.ld
+++ b/13_integrated_testing/src/bsp/raspberrypi/link.ld
@@ -3,45 +3,50 @@
  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
+/* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_load_addr = 0x80000;
+
+ENTRY(__rpi_load_addr)
+
+PHDRS
+{
+    segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
+    segment_rw PT_LOAD FLAGS(6); /* 6 == RW */
+}
+
 SECTIONS
 {
-    /* Set current address to the value from which the RPi starts execution */
-    . = 0x80000;
+    . =  __rpi_load_addr;
 
-    __ro_start = .;
+    /***********************************************************************************************
+    * Code + RO Data + Global Offset Table
+    ***********************************************************************************************/
+    __rx_start = .;
     .text :
     {
-        *(.text._start) *(.text*)
-    }
+        KEEP(*(.text._start))
+        *(.text*)
+    } :segment_rx
 
-    .exception_vectors :
-    {
-        *(.exception_vectors*)
-    }
+    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
+    .got    : ALIGN(8) { *(.got)     } :segment_rx
 
-    .rodata :
-    {
-        *(.rodata*)
-    }
-    . = ALIGN(65536); /* Fill up to 64 KiB */
-    __ro_end = .;
+    . = ALIGN(64K); /* Align to page boundary */
+    __rx_end_exclusive = .;
 
-    .data :
-    {
-        *(.data*)
-    }
+    /***********************************************************************************************
+    * Data + BSS
+    ***********************************************************************************************/
+    .data : { *(.data*) } :segment_rw
 
     /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-    .bss ALIGN(8):
+    .bss : ALIGN(8)
     {
         __bss_start = .;
         *(.bss*);
         . = ALIGN(8);
 
-        /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-        . += 8;
+        . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
         __bss_end_inclusive = . - 8;
-    }
-
-    /DISCARD/ : { *(.comment*) }
+    } :NONE
 }
diff --git a/13_integrated_testing/src/bsp/raspberrypi/memory.rs b/13_integrated_testing/src/bsp/raspberrypi/memory.rs
index d4bcf0a3b..bb18dd201 100644
--- a/13_integrated_testing/src/bsp/raspberrypi/memory.rs
+++ b/13_integrated_testing/src/bsp/raspberrypi/memory.rs
@@ -14,17 +14,18 @@ use core::{cell::UnsafeCell, ops::RangeInclusive};
 
 // Symbols from the linker script.
 extern "Rust" {
+    static __rx_start: UnsafeCell<()>;
+    static __rx_end_exclusive: UnsafeCell<()>;
+
     static __bss_start: UnsafeCell<u64>;
     static __bss_end_inclusive: UnsafeCell<u64>;
-    static __ro_start: UnsafeCell<()>;
-    static __ro_end: UnsafeCell<()>;
 }
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
-/// The board's memory map.
+/// The board's physical memory map.
 #[rustfmt::skip]
 pub(super) mod map {
     /// The inclusive end address of the memory map.
@@ -42,8 +43,6 @@ pub(super) mod map {
     /// an RPi3 that comes with 1 GiB of RAM). This would result in a crash or other kind of error.
     pub const END_INCLUSIVE:       usize = 0xFFFF_FFFF;
 
-    pub const BOOT_CORE_STACK_END: usize = 0x8_0000;
-
     pub const GPIO_OFFSET:         usize = 0x0020_0000;
     pub const UART_OFFSET:         usize = 0x0020_1000;
 
@@ -74,24 +73,24 @@ pub(super) mod map {
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-/// Start address of the Read-Only (RO) range.
+/// Start address of the Read+Execute (RX) range.
 ///
 /// # Safety
 ///
 /// - Value is provided by the linker script and must be trusted as-is.
 #[inline(always)]
-fn ro_start() -> usize {
-    unsafe { __ro_start.get() as usize }
+fn rx_start() -> usize {
+    unsafe { __rx_start.get() as usize }
 }
 
-/// Size of the Read-Only (RO) range of the kernel binary.
+/// Exclusive end address of the Read+Execute (RX) range.
 ///
 /// # Safety
 ///
 /// - Value is provided by the linker script and must be trusted as-is.
 #[inline(always)]
-fn ro_end() -> usize {
-    unsafe { __ro_end.get() as usize }
+fn rx_end_exclusive() -> usize {
+    unsafe { __rx_end_exclusive.get() as usize }
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -101,7 +100,7 @@ fn ro_end() -> usize {
 /// Exclusive end address of the boot core's stack.
 #[inline(always)]
 pub fn boot_core_stack_end() -> usize {
-    map::BOOT_CORE_STACK_END
+    rx_start()
 }
 
 /// Return the inclusive range spanning the .bss section.
diff --git a/13_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs b/13_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs
index 0ccfae002..f4769ad39 100644
--- a/13_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs
+++ b/13_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs
@@ -26,7 +26,7 @@ pub static LAYOUT: KernelVirtualLayout<NUM_MEM_RANGES> = KernelVirtualLayout::ne
     [
         TranslationDescriptor {
             name: "Kernel code and RO data",
-            virtual_range: ro_range_inclusive,
+            virtual_range: rx_range_inclusive,
             physical_range_translation: Translation::Identity,
             attribute_fields: AttributeFields {
                 mem_attributes: MemAttributes::CacheableDRAM,
@@ -51,10 +51,10 @@ pub static LAYOUT: KernelVirtualLayout<NUM_MEM_RANGES> = KernelVirtualLayout::ne
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-fn ro_range_inclusive() -> RangeInclusive<usize> {
+fn rx_range_inclusive() -> RangeInclusive<usize> {
     // Notice the subtraction to turn the exclusive end into an inclusive end.
     #[allow(clippy::range_minus_one)]
-    RangeInclusive::new(super::ro_start(), super::ro_end() - 1)
+    RangeInclusive::new(super::rx_start(), super::rx_end_exclusive() - 1)
 }
 
 fn mmio_range_inclusive() -> RangeInclusive<usize> {
diff --git a/14_exceptions_part2_peripheral_IRQs/Makefile b/14_exceptions_part2_peripheral_IRQs/Makefile
index 32d139243..4c2fb069a 100644
--- a/14_exceptions_part2_peripheral_IRQs/Makefile
+++ b/14_exceptions_part2_peripheral_IRQs/Makefile
@@ -179,6 +179,7 @@ objdump: $(KERNEL_ELF)
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
+                --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
 nm: $(KERNEL_ELF)
diff --git a/14_exceptions_part2_peripheral_IRQs/README.md b/14_exceptions_part2_peripheral_IRQs/README.md
index 5e1f45e32..9ae718d77 100644
--- a/14_exceptions_part2_peripheral_IRQs/README.md
+++ b/14_exceptions_part2_peripheral_IRQs/README.md
@@ -2056,7 +2056,7 @@ diff -uNr 13_integrated_testing/src/bsp/raspberrypi/exception.rs 14_exceptions_p
 diff -uNr 13_integrated_testing/src/bsp/raspberrypi/memory.rs 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
 --- 13_integrated_testing/src/bsp/raspberrypi/memory.rs
 +++ 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
-@@ -52,10 +52,12 @@
+@@ -51,10 +51,12 @@
      pub mod mmio {
          use super::*;
 
@@ -2073,7 +2073,7 @@ diff -uNr 13_integrated_testing/src/bsp/raspberrypi/memory.rs 14_exceptions_part
      }
 
      /// Physical devices.
-@@ -66,6 +68,8 @@
+@@ -65,6 +67,8 @@
          pub const START:            usize =         0xFE00_0000;
          pub const GPIO_START:       usize = START + GPIO_OFFSET;
          pub const PL011_UART_START: usize = START + UART_OFFSET;
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.S b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.S
index 4d125334c..fd7b1f930 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.S
+++ b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.S
@@ -50,7 +50,7 @@
 //--------------------------------------------------------------------------------------------------
 // The exception vector table.
 //--------------------------------------------------------------------------------------------------
-.section .exception_vectors, "ax", @progbits
+.section .text
 
 // Align by 2^11 bytes, as demanded by ARMv8-A. Same as ALIGN(2048) in an ld script.
 .align 11
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
index 5cf9eb5ca..de4f1f185 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
@@ -68,18 +68,18 @@ fn default_exception_handler(e: &ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_synchronous(e: &mut ExceptionContext) {
-    default_exception_handler(e);
+unsafe extern "C" fn current_el0_synchronous(_e: &mut ExceptionContext) {
+    panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_irq(e: &mut ExceptionContext) {
-    default_exception_handler(e);
+unsafe extern "C" fn current_el0_irq(_e: &mut ExceptionContext) {
+    panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_serror(e: &mut ExceptionContext) {
-    default_exception_handler(e);
+unsafe extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
+    panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
 //------------------------------------------------------------------------------
@@ -166,9 +166,7 @@ impl fmt::Display for EsrEL1 {
         writeln!(f, " - {}", ec_translation)?;
 
         // Raw print of instruction specific syndrome.
-        write!(f, "      Instr Specific Syndrome (ISS): {:#x}", esr_el1.read(ESR_EL1::ISS))?;
-
-        Ok(())
+        write!(f, "      Instr Specific Syndrome (ISS): {:#x}", esr_el1.read(ESR_EL1::ISS))
     }
 }
 
@@ -201,9 +199,7 @@ impl fmt::Display for SpsrEL1 {
 
         write!(f, "      Illegal Execution State (IL): {}",
             to_flag_str(self.0.is_set(SPSR_EL1::IL))
-        )?;
-
-        Ok(())
+        )
     }
 }
 
@@ -224,9 +220,7 @@ impl fmt::Display for ExceptionContext {
         for (i, reg) in self.gpr.iter().enumerate() {
             write!(f, "      x{: <2}: {: >#018x}{}", i, reg, alternating(i))?;
         }
-        write!(f, "      lr : {:#018x}", self.lr)?;
-
-        Ok(())
+        write!(f, "      lr : {:#018x}", self.lr)
     }
 }
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld
index 4dfe60c7f..6c63ba10f 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld
@@ -3,45 +3,50 @@
  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
+/* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_load_addr = 0x80000;
+
+ENTRY(__rpi_load_addr)
+
+PHDRS
+{
+    segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
+    segment_rw PT_LOAD FLAGS(6); /* 6 == RW */
+}
+
 SECTIONS
 {
-    /* Set current address to the value from which the RPi starts execution */
-    . = 0x80000;
+    . =  __rpi_load_addr;
 
-    __ro_start = .;
+    /***********************************************************************************************
+    * Code + RO Data + Global Offset Table
+    ***********************************************************************************************/
+    __rx_start = .;
     .text :
     {
-        *(.text._start) *(.text*)
-    }
+        KEEP(*(.text._start))
+        *(.text*)
+    } :segment_rx
 
-    .exception_vectors :
-    {
-        *(.exception_vectors*)
-    }
+    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
+    .got    : ALIGN(8) { *(.got)     } :segment_rx
 
-    .rodata :
-    {
-        *(.rodata*)
-    }
-    . = ALIGN(65536); /* Fill up to 64 KiB */
-    __ro_end = .;
+    . = ALIGN(64K); /* Align to page boundary */
+    __rx_end_exclusive = .;
 
-    .data :
-    {
-        *(.data*)
-    }
+    /***********************************************************************************************
+    * Data + BSS
+    ***********************************************************************************************/
+    .data : { *(.data*) } :segment_rw
 
     /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-    .bss ALIGN(8):
+    .bss : ALIGN(8)
     {
         __bss_start = .;
         *(.bss*);
         . = ALIGN(8);
 
-        /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-        . += 8;
+        . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
         __bss_end_inclusive = . - 8;
-    }
-
-    /DISCARD/ : { *(.comment*) }
+    } :NONE
 }
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
index 4ac3b57b9..d07f2dc34 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
@@ -14,17 +14,18 @@ use core::{cell::UnsafeCell, ops::RangeInclusive};
 
 // Symbols from the linker script.
 extern "Rust" {
+    static __rx_start: UnsafeCell<()>;
+    static __rx_end_exclusive: UnsafeCell<()>;
+
     static __bss_start: UnsafeCell<u64>;
     static __bss_end_inclusive: UnsafeCell<u64>;
-    static __ro_start: UnsafeCell<()>;
-    static __ro_end: UnsafeCell<()>;
 }
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
-/// The board's memory map.
+/// The board's physical memory map.
 #[rustfmt::skip]
 pub(super) mod map {
     /// The inclusive end address of the memory map.
@@ -42,8 +43,6 @@ pub(super) mod map {
     /// an RPi3 that comes with 1 GiB of RAM). This would result in a crash or other kind of error.
     pub const END_INCLUSIVE:       usize = 0xFFFF_FFFF;
 
-    pub const BOOT_CORE_STACK_END: usize = 0x8_0000;
-
     pub const GPIO_OFFSET:         usize = 0x0020_0000;
     pub const UART_OFFSET:         usize = 0x0020_1000;
 
@@ -78,24 +77,24 @@ pub(super) mod map {
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-/// Start address of the Read-Only (RO) range.
+/// Start address of the Read+Execute (RX) range.
 ///
 /// # Safety
 ///
 /// - Value is provided by the linker script and must be trusted as-is.
 #[inline(always)]
-fn ro_start() -> usize {
-    unsafe { __ro_start.get() as usize }
+fn rx_start() -> usize {
+    unsafe { __rx_start.get() as usize }
 }
 
-/// Size of the Read-Only (RO) range of the kernel binary.
+/// Exclusive end address of the Read+Execute (RX) range.
 ///
 /// # Safety
 ///
 /// - Value is provided by the linker script and must be trusted as-is.
 #[inline(always)]
-fn ro_end() -> usize {
-    unsafe { __ro_end.get() as usize }
+fn rx_end_exclusive() -> usize {
+    unsafe { __rx_end_exclusive.get() as usize }
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -105,7 +104,7 @@ fn ro_end() -> usize {
 /// Exclusive end address of the boot core's stack.
 #[inline(always)]
 pub fn boot_core_stack_end() -> usize {
-    map::BOOT_CORE_STACK_END
+    rx_start()
 }
 
 /// Return the inclusive range spanning the .bss section.
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
index 0ccfae002..f4769ad39 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
@@ -26,7 +26,7 @@ pub static LAYOUT: KernelVirtualLayout<NUM_MEM_RANGES> = KernelVirtualLayout::ne
     [
         TranslationDescriptor {
             name: "Kernel code and RO data",
-            virtual_range: ro_range_inclusive,
+            virtual_range: rx_range_inclusive,
             physical_range_translation: Translation::Identity,
             attribute_fields: AttributeFields {
                 mem_attributes: MemAttributes::CacheableDRAM,
@@ -51,10 +51,10 @@ pub static LAYOUT: KernelVirtualLayout<NUM_MEM_RANGES> = KernelVirtualLayout::ne
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-fn ro_range_inclusive() -> RangeInclusive<usize> {
+fn rx_range_inclusive() -> RangeInclusive<usize> {
     // Notice the subtraction to turn the exclusive end into an inclusive end.
     #[allow(clippy::range_minus_one)]
-    RangeInclusive::new(super::ro_start(), super::ro_end() - 1)
+    RangeInclusive::new(super::rx_start(), super::rx_end_exclusive() - 1)
 }
 
 fn mmio_range_inclusive() -> RangeInclusive<usize> {
diff --git a/15_virtual_mem_part2_mmio_remap/Makefile b/15_virtual_mem_part2_mmio_remap/Makefile
index 32d139243..4c2fb069a 100644
--- a/15_virtual_mem_part2_mmio_remap/Makefile
+++ b/15_virtual_mem_part2_mmio_remap/Makefile
@@ -179,6 +179,7 @@ objdump: $(KERNEL_ELF)
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
+                --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
 nm: $(KERNEL_ELF)
diff --git a/15_virtual_mem_part2_mmio_remap/README.md b/15_virtual_mem_part2_mmio_remap/README.md
index 9a6c6df64..18c72b74c 100644
--- a/15_virtual_mem_part2_mmio_remap/README.md
+++ b/15_virtual_mem_part2_mmio_remap/README.md
@@ -276,6 +276,13 @@ unsafe fn init(&self) -> Result<(), &'static str> {
 There's a couple of changes not covered in this tutorial text, but the reader should ideally skim
 through them:
 
+- [`src/bsp/raspberrypi/memory.rs`](src/bsp/raspberrypi/memory.rs) and
+  [`src/bsp/raspberrypi/link.ld`](src/bsp/raspberrypi/link.ld) changed the location of the boot
+  core's stack. It is now located after the data segment, and separated by an unmapped `guard page`.
+  There is also supporting code in
+  [`src/_arch/aarch64/exception.rs`](src/_arch/aarch64/exception.rs) that runs on data aborts and
+  checks if the fault address lies within the `stack guard page`. This can be an indication that a
+  kernel stack overflow happened.
 - [`src/memory/mmu/types.rs`](src/memory/mmu/types.rs) introduces a couple of supporting types, like
   `Page<ATYPE>`.
 - [`src/memory/mmu/mapping_record.rs`](src/memory/mmu/mapping_record.rs) provides the generic kernel
@@ -309,18 +316,18 @@ Minipush 1.0
 [MP] ⏩ Pushing 67 KiB =========================================🦀 100% 0 KiB/s Time: 00:00:00
 [ML] Loaded! Executing the payload now
 
-[    0.786819] Booting on: Raspberry Pi 3
-[    0.787092] MMU online:
-[    0.787384]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    0.789128]                         Virtual                                   Physical               Size       Attr                    Entity
-[    0.790873]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    0.792618]       0x0000_0000_0007_0000..0x0000_0000_0007_ffff --> 0x00_0007_0000..0x00_0007_ffff |  64 KiB | C   RW XN | Kernel boot-core stack
-[    0.794221]       0x0000_0000_0008_0000..0x0000_0000_0008_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
-[    0.795835]       0x0000_0000_0009_0000..0x0000_0000_001b_ffff --> 0x00_0009_0000..0x00_001b_ffff |   1 MiB | C   RW XN | Kernel data and bss
-[    0.797406]       0x0000_0001_f000_0000..0x0000_0001_f000_ffff --> 0x00_3f20_0000..0x00_3f20_ffff |  64 KiB | Dev RW XN | BCM GPIO
-[    0.798857]                                                                                                             | BCM PL011 UART
-[    0.800374]       0x0000_0001_f001_0000..0x0000_0001_f001_ffff --> 0x00_3f00_0000..0x00_3f00_ffff |  64 KiB | Dev RW XN | BCM Peripheral Interrupt Controller
-[    0.802117]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    0.789721] Booting on: Raspberry Pi 3
+[    0.789994] MMU online:
+[    0.790286]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    0.792030]                         Virtual                                   Physical               Size       Attr                    Entity
+[    0.793774]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    0.795520]       0x0000_0000_0008_0000..0x0000_0000_0008_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
+[    0.797134]       0x0000_0000_0009_0000..0x0000_0000_001b_ffff --> 0x00_0009_0000..0x00_001b_ffff |   1 MiB | C   RW XN | Kernel data and bss
+[    0.798704]       0x0000_0000_001d_0000..0x0000_0000_0024_ffff --> 0x00_001d_0000..0x00_0024_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
+[    0.800307]       0x0000_0001_f000_0000..0x0000_0001_f000_ffff --> 0x00_3f20_0000..0x00_3f20_ffff |  64 KiB | Dev RW XN | BCM GPIO
+[    0.801759]                                                                                                             | BCM PL011 UART
+[    0.803276]       0x0000_0001_f001_0000..0x0000_0001_f001_ffff --> 0x00_3f00_0000..0x00_3f00_ffff |  64 KiB | Dev RW XN | BCM Peripheral Interrupt Controller
+[    0.805020]       -------------------------------------------------------------------------------------------------------------------------------------------
 ```
 
 Raspberry Pi 4:
@@ -344,19 +351,19 @@ Minipush 1.0
 [MP] ⏩ Pushing 74 KiB =========================================🦀 100% 0 KiB/s Time: 00:00:00
 [ML] Loaded! Executing the payload now
 
-[    0.853908] Booting on: Raspberry Pi 4
-[    0.854007] MMU online:
-[    0.854299]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    0.856043]                         Virtual                                   Physical               Size       Attr                    Entity
-[    0.857788]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    0.859533]       0x0000_0000_0007_0000..0x0000_0000_0007_ffff --> 0x00_0007_0000..0x00_0007_ffff |  64 KiB | C   RW XN | Kernel boot-core stack
-[    0.861137]       0x0000_0000_0008_0000..0x0000_0000_0008_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
-[    0.862750]       0x0000_0000_0009_0000..0x0000_0000_001b_ffff --> 0x00_0009_0000..0x00_001b_ffff |   1 MiB | C   RW XN | Kernel data and bss
-[    0.864321]       0x0000_0001_f000_0000..0x0000_0001_f000_ffff --> 0x00_fe20_0000..0x00_fe20_ffff |  64 KiB | Dev RW XN | BCM GPIO
-[    0.865772]                                                                                                             | BCM PL011 UART
-[    0.867289]       0x0000_0001_f001_0000..0x0000_0001_f001_ffff --> 0x00_ff84_0000..0x00_ff84_ffff |  64 KiB | Dev RW XN | GICD
-[    0.868697]                                                                                                             | GICC
-[    0.870105]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    0.870371] Booting on: Raspberry Pi 4
+[    0.870470] MMU online:
+[    0.870763]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    0.872507]                         Virtual                                   Physical               Size       Attr                    Entity
+[    0.874251]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    0.875996]       0x0000_0000_0008_0000..0x0000_0000_0008_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
+[    0.877611]       0x0000_0000_0009_0000..0x0000_0000_001b_ffff --> 0x00_0009_0000..0x00_001b_ffff |   1 MiB | C   RW XN | Kernel data and bss
+[    0.879181]       0x0000_0000_001d_0000..0x0000_0000_0024_ffff --> 0x00_001d_0000..0x00_0024_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
+[    0.880784]       0x0000_0001_f000_0000..0x0000_0001_f000_ffff --> 0x00_fe20_0000..0x00_fe20_ffff |  64 KiB | Dev RW XN | BCM GPIO
+[    0.882235]                                                                                                             | BCM PL011 UART
+[    0.883752]       0x0000_0001_f001_0000..0x0000_0001_f001_ffff --> 0x00_ff84_0000..0x00_ff84_ffff |  64 KiB | Dev RW XN | GICD
+[    0.885160]                                                                                                             | GICC
+[    0.886569]       -------------------------------------------------------------------------------------------------------------------------------------------
 ```
 
 ## Diff to previous
@@ -375,6 +382,55 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.rs 15_v
      // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
      asm::eret()
 
+diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
+--- 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
++++ 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
+@@ -11,7 +11,11 @@
+ //!
+ //! crate::exception::arch_exception
+
+-use crate::{bsp, exception};
++use crate::{
++    bsp::{self},
++    exception,
++    memory::Address,
++};
+ use core::{cell::UnsafeCell, fmt};
+ use cortex_a::{barrier, regs::*};
+ use register::InMemoryRegister;
+@@ -50,6 +54,20 @@
+ // Private Code
+ //--------------------------------------------------------------------------------------------------
+
++/// Check if additional context can be derived from a data abort.
++fn inspect_data_abort(f: &mut fmt::Formatter) -> fmt::Result {
++    let fault_addr = Address::new(FAR_EL1.get() as usize);
++
++    if bsp::memory::mmu::virt_boot_core_stack_guard_page_desc().contains(fault_addr) {
++        writeln!(
++            f,
++            "\n\n      >> Attempted to access the guard page of the kernel's boot core stack <<"
++        )?;
++    }
++
++    Ok(())
++}
++
+ /// Prints verbose information about the exception and then panics.
+ fn default_exception_handler(e: &ExceptionContext) {
+     panic!(
+@@ -166,7 +184,9 @@
+         writeln!(f, " - {}", ec_translation)?;
+
+         // Raw print of instruction specific syndrome.
+-        write!(f, "      Instr Specific Syndrome (ISS): {:#x}", esr_el1.read(ESR_EL1::ISS))
++        write!(f, "      Instr Specific Syndrome (ISS): {:#x}", esr_el1.read(ESR_EL1::ISS))?;
++
++        inspect_data_abort(f)
+     }
+ }
+
+
 diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
 --- 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs
 +++ 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -1413,23 +1469,41 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/driver.rs 15_v
 diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
 --- 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld
 +++ 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
-@@ -42,6 +42,11 @@
-         . += 8;
+@@ -37,6 +37,7 @@
+     /***********************************************************************************************
+     * Data + BSS
+     ***********************************************************************************************/
++    __rw_start = .;
+     .data : { *(.data*) } :segment_rw
+
+     /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
+@@ -49,4 +50,21 @@
+         . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
          __bss_end_inclusive = . - 8;
-     }
-+    . = ALIGN(65536);
-+    __data_end = .;
-+
-+    __ro_size = __ro_end - __ro_start;
-+    __data_size = __data_end - __ro_end;
-
-     /DISCARD/ : { *(.comment*) }
+     } :NONE
++
++    . = ALIGN(64K); /* Align to page boundary */
++    __rw_end_exclusive = .;
++
++    /***********************************************************************************************
++    * Guard Page between boot core stack and data
++    ***********************************************************************************************/
++    __boot_core_stack_guard_page_start = .;
++    . += 64K;
++    __boot_core_stack_guard_page_end_exclusive = .;
++
++    /***********************************************************************************************
++    * Boot Core Stack
++    ***********************************************************************************************/
++     __boot_core_stack_start = .;
++     . += 512K;
++     __boot_core_stack_end_exclusive = .;
  }
 
 diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
 --- 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +++ 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
-@@ -4,70 +4,157 @@
+@@ -4,70 +4,164 @@
 
  //! BSP Memory Management Unit.
 
@@ -1465,16 +1539,16 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +/// The translation granule chosen by this BSP. This will be used everywhere else in the kernel to
 +/// derive respective data structures and their sizes. For example, the `crate::memory::mmu::Page`.
 +pub type KernelGranule = TranslationGranule<{ 64 * 1024 }>;
-
--const NUM_MEM_RANGES: usize = 2;
++
 +/// The kernel's virtual address space defined by this BSP.
 +pub type KernelVirtAddrSpace = AddressSpace<{ 8 * 1024 * 1024 * 1024 }>;
 
--/// The virtual memory layout.
+-const NUM_MEM_RANGES: usize = 2;
 +//--------------------------------------------------------------------------------------------------
 +// Global instances
 +//--------------------------------------------------------------------------------------------------
-+
+
+-/// The virtual memory layout.
 +/// The kernel translation tables.
  ///
 -/// The layout must contain only special ranges, aka anything that is _not_ normal cacheable DRAM.
@@ -1484,7 +1558,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 -    [
 -        TranslationDescriptor {
 -            name: "Kernel code and RO data",
--            virtual_range: ro_range_inclusive,
+-            virtual_range: rx_range_inclusive,
 -            physical_range_translation: Translation::Identity,
 -            attribute_fields: AttributeFields {
 -                mem_attributes: MemAttributes::CacheableDRAM,
@@ -1515,10 +1589,10 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
  // Private Code
  //--------------------------------------------------------------------------------------------------
 
--fn ro_range_inclusive() -> RangeInclusive<usize> {
+-fn rx_range_inclusive() -> RangeInclusive<usize> {
 -    // Notice the subtraction to turn the exclusive end into an inclusive end.
 -    #[allow(clippy::range_minus_one)]
--    RangeInclusive::new(super::ro_start(), super::ro_end() - 1)
+-    RangeInclusive::new(super::rx_start(), super::rx_end_exclusive() - 1)
 +/// Helper function for calculating the number of pages the given parameter spans.
 +const fn size_to_num_pages(size: usize) -> usize {
 +    assert!(size > 0);
@@ -1527,44 +1601,44 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +    size >> KernelGranule::SHIFT
 +}
 +
-+/// The boot core's stack.
-+fn virt_stack_page_desc() -> PageSliceDescriptor<Virtual> {
-+    let num_pages = size_to_num_pages(super::boot_core_stack_size());
++/// The Read+Execute (RX) pages of the kernel binary.
++fn virt_rx_page_desc() -> PageSliceDescriptor<Virtual> {
++    let num_pages = size_to_num_pages(super::rx_size());
 +
-+    PageSliceDescriptor::from_addr(super::virt_boot_core_stack_start(), num_pages)
++    PageSliceDescriptor::from_addr(super::virt_rx_start(), num_pages)
 +}
 +
-+/// The Read-Only (RO) pages of the kernel binary.
-+fn virt_ro_page_desc() -> PageSliceDescriptor<Virtual> {
-+    let num_pages = size_to_num_pages(super::ro_size());
++/// The Read+Write (RW) pages of the kernel binary.
++fn virt_rw_page_desc() -> PageSliceDescriptor<Virtual> {
++    let num_pages = size_to_num_pages(super::rw_size());
 +
-+    PageSliceDescriptor::from_addr(super::virt_ro_start(), num_pages)
++    PageSliceDescriptor::from_addr(super::virt_rw_start(), num_pages)
 +}
 +
-+/// The data pages of the kernel binary.
-+fn virt_data_page_desc() -> PageSliceDescriptor<Virtual> {
-+    let num_pages = size_to_num_pages(super::data_size());
++/// The boot core's stack.
++fn virt_boot_core_stack_page_desc() -> PageSliceDescriptor<Virtual> {
++    let num_pages = size_to_num_pages(super::boot_core_stack_size());
 +
-+    PageSliceDescriptor::from_addr(super::virt_data_start(), num_pages)
++    PageSliceDescriptor::from_addr(super::virt_boot_core_stack_start(), num_pages)
 +}
 +
 +// The binary is still identity mapped, so we don't need to convert in the following.
 +
-+/// The boot core's stack.
-+fn phys_stack_page_desc() -> PageSliceDescriptor<Physical> {
-+    virt_stack_page_desc().into()
-+}
-+
-+/// The Read-Only (RO) pages of the kernel binary.
-+fn phys_ro_page_desc() -> PageSliceDescriptor<Physical> {
-+    virt_ro_page_desc().into()
++/// The Read+Execute (RX) pages of the kernel binary.
++fn phys_rx_page_desc() -> PageSliceDescriptor<Physical> {
++    virt_rx_page_desc().into()
  }
 
 -fn mmio_range_inclusive() -> RangeInclusive<usize> {
 -    RangeInclusive::new(memory_map::mmio::START, memory_map::mmio::END_INCLUSIVE)
-+/// The data pages of the kernel binary.
-+fn phys_data_page_desc() -> PageSliceDescriptor<Physical> {
-+    virt_data_page_desc().into()
++/// The Read+Write (RW) pages of the kernel binary.
++fn phys_rw_page_desc() -> PageSliceDescriptor<Physical> {
++    virt_rw_page_desc().into()
++}
++
++/// The boot core's stack.
++fn phys_boot_core_stack_page_desc() -> PageSliceDescriptor<Physical> {
++    virt_boot_core_stack_page_desc().into()
  }
 
  //--------------------------------------------------------------------------------------------------
@@ -1579,6 +1653,13 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +    &KERNEL_TABLES
 +}
 +
++/// The boot core's stack guard page.
++pub fn virt_boot_core_stack_guard_page_desc() -> PageSliceDescriptor<Virtual> {
++    let num_pages = size_to_num_pages(super::boot_core_stack_guard_page_size());
++
++    PageSliceDescriptor::from_addr(super::virt_boot_core_stack_guard_page_start(), num_pages)
++}
++
 +/// Pointer to the last page of the physical address space.
 +pub fn phys_addr_space_end_page() -> *const Page<Physical> {
 +    common::align_down(
@@ -1594,31 +1675,31 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +/// - Any miscalculation or attribute error will likely be fatal. Needs careful manual checking.
 +pub unsafe fn kernel_map_binary() -> Result<(), &'static str> {
 +    generic_mmu::kernel_map_pages_at(
-+        "Kernel boot-core stack",
-+        &virt_stack_page_desc(),
-+        &phys_stack_page_desc(),
++        "Kernel code and RO data",
++        &virt_rx_page_desc(),
++        &phys_rx_page_desc(),
 +        &AttributeFields {
 +            mem_attributes: MemAttributes::CacheableDRAM,
-+            acc_perms: AccessPermissions::ReadWrite,
-+            execute_never: true,
++            acc_perms: AccessPermissions::ReadOnly,
++            execute_never: false,
 +        },
 +    )?;
 +
 +    generic_mmu::kernel_map_pages_at(
-+        "Kernel code and RO data",
-+        &virt_ro_page_desc(),
-+        &phys_ro_page_desc(),
++        "Kernel data and bss",
++        &virt_rw_page_desc(),
++        &phys_rw_page_desc(),
 +        &AttributeFields {
 +            mem_attributes: MemAttributes::CacheableDRAM,
-+            acc_perms: AccessPermissions::ReadOnly,
-+            execute_never: false,
++            acc_perms: AccessPermissions::ReadWrite,
++            execute_never: true,
 +        },
 +    )?;
 +
 +    generic_mmu::kernel_map_pages_at(
-+        "Kernel data and bss",
-+        &virt_data_page_desc(),
-+        &phys_data_page_desc(),
++        "Kernel boot-core stack",
++        &virt_boot_core_stack_page_desc(),
++        &phys_boot_core_stack_page_desc(),
 +        &AttributeFields {
 +            mem_attributes: MemAttributes::CacheableDRAM,
 +            acc_perms: AccessPermissions::ReadWrite,
@@ -1630,7 +1711,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -82,14 +169,12 @@
+@@ -82,14 +176,18 @@
      /// Check alignment of the kernel's virtual memory layout sections.
      #[kernel_test]
      fn virt_mem_layout_sections_are_64KiB_aligned() {
@@ -1639,7 +1720,13 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 -        for i in LAYOUT.inner().iter() {
 -            let start: usize = *(i.virtual_range)().start();
 -            let end: usize = *(i.virtual_range)().end() + 1;
-+        for i in [virt_stack_page_desc, virt_ro_page_desc, virt_data_page_desc].iter() {
++        for i in [
++            virt_rx_page_desc,
++            virt_rw_page_desc,
++            virt_boot_core_stack_page_desc,
++        ]
++        .iter()
++        {
 +            let start: usize = i().start_addr().into_usize();
 +            let end: usize = i().end_addr().into_usize();
 
@@ -1650,7 +1737,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
              assert!(end >= start);
          }
      }
-@@ -97,18 +182,28 @@
+@@ -97,18 +195,28 @@
      /// Ensure the kernel's virtual memory layout is free of overlaps.
      #[kernel_test]
      fn virt_mem_layout_has_no_overlaps() {
@@ -1666,9 +1753,9 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 -                assert!(!second_range().contains(first_range().start()));
 -                assert!(!second_range().contains(first_range().end()));
 +        let layout = [
-+            virt_stack_page_desc(),
-+            virt_ro_page_desc(),
-+            virt_data_page_desc(),
++            virt_rx_page_desc(),
++            virt_rw_page_desc(),
++            virt_boot_core_stack_page_desc(),
 +        ];
 +
 +        for (i, first_range) in layout.iter().enumerate() {
@@ -1694,7 +1781,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
 --- 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
 +++ 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
-@@ -3,9 +3,41 @@
+@@ -3,9 +3,40 @@
  // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
  //! BSP Memory Management.
@@ -1703,31 +1790,30 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 15_v
 +//! copies the binary to 0x8_0000:
 +//!
 +//! +---------------------------------------------+
-+//! |                                             | 0x0
-+//! | Unmapped                                    |
-+//! |                                             | 0x6_FFFF
-+//! +---------------------------------------------+
-+//! | BOOT_CORE_STACK_START                       | 0x7_0000
-+//! |                                             |            ^
-+//! | ...                                         |            | Stack growth direction
-+//! |                                             |            |
-+//! | BOOT_CORE_STACK_END_INCLUSIVE               | 0x7_FFFF
-+//! +---------------------------------------------+
-+//! | RO_START == BOOT_CORE_STACK_END             | 0x8_0000
 +//! |                                             |
++//! | Unmapped                                    |
 +//! |                                             |
++//! +---------------------------------------------+
++//! |                                             | rx_start @ 0x8_0000
 +//! | .text                                       |
-+//! | .exception_vectors                          |
 +//! | .rodata                                     |
-+//! |                                             |
-+//! | RO_END_INCLUSIVE                            | 0x8_0000 + __ro_size - 1
++//! | .got                                        |
++//! |                                             | rx_end_inclusive
 +//! +---------------------------------------------+
-+//! | RO_END == DATA_START                        | 0x8_0000 + __ro_size
-+//! |                                             |
++//! |                                             | rw_start == ro_end
 +//! | .data                                       |
 +//! | .bss                                        |
++//! |                                             | rw_end_inclusive
++//! +---------------------------------------------+
++//! |                                             | rw_end
++//! | Unmapped Boot-core Stack Guard Page         |
 +//! |                                             |
-+//! | DATA_END_INCLUSIVE                          | 0x8_0000 + __ro_size + __data_size - 1
++//! +---------------------------------------------+
++//! |                                             | boot_core_stack_start          ^
++//! |                                             |                                | stack
++//! | Boot-core Stack                             |                                | growth
++//! |                                             |                                | direction
++//! |                                             | boot_core_stack_end_inclusive  |
 +//! +---------------------------------------------+
 
  pub mod mmu;
@@ -1736,21 +1822,25 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 15_v
  use core::{cell::UnsafeCell, ops::RangeInclusive};
 
  //--------------------------------------------------------------------------------------------------
-@@ -17,47 +49,39 @@
+@@ -17,8 +48,16 @@
+     static __rx_start: UnsafeCell<()>;
+     static __rx_end_exclusive: UnsafeCell<()>;
+
++    static __rw_start: UnsafeCell<()>;
      static __bss_start: UnsafeCell<u64>;
      static __bss_end_inclusive: UnsafeCell<u64>;
-     static __ro_start: UnsafeCell<()>;
--    static __ro_end: UnsafeCell<()>;
-+    static __ro_size: UnsafeCell<()>;
-+    static __data_size: UnsafeCell<()>;
++    static __rw_end_exclusive: UnsafeCell<()>;
++
++    static __boot_core_stack_start: UnsafeCell<()>;
++    static __boot_core_stack_end_exclusive: UnsafeCell<()>;
++
++    static __boot_core_stack_guard_page_start: UnsafeCell<()>;
++    static __boot_core_stack_guard_page_end_exclusive: UnsafeCell<()>;
  }
 
  //--------------------------------------------------------------------------------------------------
- // Public Definitions
- //--------------------------------------------------------------------------------------------------
-
--/// The board's memory map.
-+/// The board's physical memory map.
+@@ -28,35 +67,26 @@
+ /// The board's physical memory map.
  #[rustfmt::skip]
  pub(super) mod map {
 -    /// The inclusive end address of the memory map.
@@ -1767,13 +1857,10 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 15_v
 -    /// physical address that is not backed by any DRAM (e.g. accessing an address close to 4 GiB on
 -    /// an RPi3 that comes with 1 GiB of RAM). This would result in a crash or other kind of error.
 -    pub const END_INCLUSIVE:       usize = 0xFFFF_FFFF;
-+    use super::*;
-
--    pub const BOOT_CORE_STACK_END: usize = 0x8_0000;
 -
 -    pub const GPIO_OFFSET:         usize = 0x0020_0000;
 -    pub const UART_OFFSET:         usize = 0x0020_1000;
-+    pub const BOOT_CORE_STACK_SIZE:                  usize = 0x1_0000;
++    use super::*;
 
      /// Physical devices.
      #[cfg(feature = "bsp_rpi3")]
@@ -1802,7 +1889,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 15_v
      }
 
      /// Physical devices.
-@@ -65,13 +89,22 @@
+@@ -64,13 +94,22 @@
      pub mod mmio {
          use super::*;
 
@@ -1831,53 +1918,72 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 15_v
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -84,8 +117,8 @@
+@@ -83,18 +122,69 @@
  ///
  /// - Value is provided by the linker script and must be trusted as-is.
  #[inline(always)]
--fn ro_start() -> usize {
--    unsafe { __ro_start.get() as usize }
-+fn virt_ro_start() -> Address<Virtual> {
-+    Address::new(unsafe { __ro_start.get() as usize })
+-fn rx_start() -> usize {
+-    unsafe { __rx_start.get() as usize }
++fn virt_rx_start() -> Address<Virtual> {
++    Address::new(unsafe { __rx_start.get() as usize })
  }
 
- /// Size of the Read-Only (RO) range of the kernel binary.
-@@ -94,8 +127,42 @@
+-/// Exclusive end address of the Read+Execute (RX) range.
++/// Size of the Read+Execute (RX) range.
+ ///
+ /// # Safety
  ///
  /// - Value is provided by the linker script and must be trusted as-is.
  #[inline(always)]
--fn ro_end() -> usize {
--    unsafe { __ro_end.get() as usize }
-+fn ro_size() -> usize {
-+    unsafe { __ro_size.get() as usize }
+-fn rx_end_exclusive() -> usize {
+-    unsafe { __rx_end_exclusive.get() as usize }
++fn rx_size() -> usize {
++    unsafe { (__rx_end_exclusive.get() as usize) - (__rx_start.get() as usize) }
 +}
 +
-+/// Start address of the data range.
++/// Start address of the Read+Write (RW) range.
 +#[inline(always)]
-+fn virt_data_start() -> Address<Virtual> {
-+    virt_ro_start() + ro_size()
++fn virt_rw_start() -> Address<Virtual> {
++    Address::new(unsafe { __rw_start.get() as usize })
 +}
 +
-+/// Size of the data range.
++/// Size of the Read+Write (RW) range.
 +///
 +/// # Safety
 +///
 +/// - Value is provided by the linker script and must be trusted as-is.
 +#[inline(always)]
-+fn data_size() -> usize {
-+    unsafe { __data_size.get() as usize }
++fn rw_size() -> usize {
++    unsafe { (__rw_end_exclusive.get() as usize) - (__rw_start.get() as usize) }
 +}
 +
 +/// Start address of the boot core's stack.
 +#[inline(always)]
 +fn virt_boot_core_stack_start() -> Address<Virtual> {
-+    virt_ro_start() - map::BOOT_CORE_STACK_SIZE
++    Address::new(unsafe { __boot_core_stack_start.get() as usize })
 +}
 +
 +/// Size of the boot core's stack.
 +#[inline(always)]
 +fn boot_core_stack_size() -> usize {
-+    map::BOOT_CORE_STACK_SIZE
++    unsafe {
++        (__boot_core_stack_end_exclusive.get() as usize) - (__boot_core_stack_start.get() as usize)
++    }
++}
++
++/// Start address of the boot core's stack guard page.
++#[inline(always)]
++fn virt_boot_core_stack_guard_page_start() -> Address<Virtual> {
++    Address::new(unsafe { __boot_core_stack_guard_page_start.get() as usize })
++}
++
++/// Size of the boot core's stack guard page.
++#[inline(always)]
++fn boot_core_stack_guard_page_size() -> usize {
++    unsafe {
++        (__boot_core_stack_guard_page_end_exclusive.get() as usize)
++            - (__boot_core_stack_guard_page_start.get() as usize)
++    }
 +}
 +
 +/// Exclusive end address of the physical address space.
@@ -1887,12 +1993,12 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 15_v
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -104,8 +171,10 @@
+@@ -103,8 +193,10 @@
 
  /// Exclusive end address of the boot core's stack.
  #[inline(always)]
 -pub fn boot_core_stack_end() -> usize {
--    map::BOOT_CORE_STACK_END
+-    rx_start()
 +pub fn phys_boot_core_stack_end() -> Address<Physical> {
 +    // The binary is still identity mapped, so we don't need to convert here.
 +    let end = virt_boot_core_stack_start().into_usize() + boot_core_stack_size();
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.S b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.S
index 4d125334c..fd7b1f930 100644
--- a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.S
+++ b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.S
@@ -50,7 +50,7 @@
 //--------------------------------------------------------------------------------------------------
 // The exception vector table.
 //--------------------------------------------------------------------------------------------------
-.section .exception_vectors, "ax", @progbits
+.section .text
 
 // Align by 2^11 bytes, as demanded by ARMv8-A. Same as ALIGN(2048) in an ld script.
 .align 11
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
index 5cf9eb5ca..b93387344 100644
--- a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
@@ -11,7 +11,11 @@
 //!
 //! crate::exception::arch_exception
 
-use crate::{bsp, exception};
+use crate::{
+    bsp::{self},
+    exception,
+    memory::Address,
+};
 use core::{cell::UnsafeCell, fmt};
 use cortex_a::{barrier, regs::*};
 use register::InMemoryRegister;
@@ -50,6 +54,20 @@ struct EsrEL1;
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
+/// Check if additional context can be derived from a data abort.
+fn inspect_data_abort(f: &mut fmt::Formatter) -> fmt::Result {
+    let fault_addr = Address::new(FAR_EL1.get() as usize);
+
+    if bsp::memory::mmu::virt_boot_core_stack_guard_page_desc().contains(fault_addr) {
+        writeln!(
+            f,
+            "\n\n      >> Attempted to access the guard page of the kernel's boot core stack <<"
+        )?;
+    }
+
+    Ok(())
+}
+
 /// Prints verbose information about the exception and then panics.
 fn default_exception_handler(e: &ExceptionContext) {
     panic!(
@@ -68,18 +86,18 @@ fn default_exception_handler(e: &ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_synchronous(e: &mut ExceptionContext) {
-    default_exception_handler(e);
+unsafe extern "C" fn current_el0_synchronous(_e: &mut ExceptionContext) {
+    panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_irq(e: &mut ExceptionContext) {
-    default_exception_handler(e);
+unsafe extern "C" fn current_el0_irq(_e: &mut ExceptionContext) {
+    panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_serror(e: &mut ExceptionContext) {
-    default_exception_handler(e);
+unsafe extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
+    panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
 //------------------------------------------------------------------------------
@@ -168,7 +186,7 @@ impl fmt::Display for EsrEL1 {
         // Raw print of instruction specific syndrome.
         write!(f, "      Instr Specific Syndrome (ISS): {:#x}", esr_el1.read(ESR_EL1::ISS))?;
 
-        Ok(())
+        inspect_data_abort(f)
     }
 }
 
@@ -201,9 +219,7 @@ impl fmt::Display for SpsrEL1 {
 
         write!(f, "      Illegal Execution State (IL): {}",
             to_flag_str(self.0.is_set(SPSR_EL1::IL))
-        )?;
-
-        Ok(())
+        )
     }
 }
 
@@ -224,9 +240,7 @@ impl fmt::Display for ExceptionContext {
         for (i, reg) in self.gpr.iter().enumerate() {
             write!(f, "      x{: <2}: {: >#018x}{}", i, reg, alternating(i))?;
         }
-        write!(f, "      lr : {:#018x}", self.lr)?;
-
-        Ok(())
+        write!(f, "      lr : {:#018x}", self.lr)
     }
 }
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
index e5975256f..f2b5d05d7 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
@@ -3,50 +3,68 @@
  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
+/* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_load_addr = 0x80000;
+
+ENTRY(__rpi_load_addr)
+
+PHDRS
+{
+    segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
+    segment_rw PT_LOAD FLAGS(6); /* 6 == RW */
+}
+
 SECTIONS
 {
-    /* Set current address to the value from which the RPi starts execution */
-    . = 0x80000;
+    . =  __rpi_load_addr;
 
-    __ro_start = .;
+    /***********************************************************************************************
+    * Code + RO Data + Global Offset Table
+    ***********************************************************************************************/
+    __rx_start = .;
     .text :
     {
-        *(.text._start) *(.text*)
-    }
+        KEEP(*(.text._start))
+        *(.text*)
+    } :segment_rx
 
-    .exception_vectors :
-    {
-        *(.exception_vectors*)
-    }
+    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
+    .got    : ALIGN(8) { *(.got)     } :segment_rx
 
-    .rodata :
-    {
-        *(.rodata*)
-    }
-    . = ALIGN(65536); /* Fill up to 64 KiB */
-    __ro_end = .;
+    . = ALIGN(64K); /* Align to page boundary */
+    __rx_end_exclusive = .;
 
-    .data :
-    {
-        *(.data*)
-    }
+    /***********************************************************************************************
+    * Data + BSS
+    ***********************************************************************************************/
+    __rw_start = .;
+    .data : { *(.data*) } :segment_rw
 
     /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-    .bss ALIGN(8):
+    .bss : ALIGN(8)
     {
         __bss_start = .;
         *(.bss*);
         . = ALIGN(8);
 
-        /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-        . += 8;
+        . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
         __bss_end_inclusive = . - 8;
-    }
-    . = ALIGN(65536);
-    __data_end = .;
+    } :NONE
+
+    . = ALIGN(64K); /* Align to page boundary */
+    __rw_end_exclusive = .;
 
-    __ro_size = __ro_end - __ro_start;
-    __data_size = __data_end - __ro_end;
+    /***********************************************************************************************
+    * Guard Page between boot core stack and data
+    ***********************************************************************************************/
+    __boot_core_stack_guard_page_start = .;
+    . += 64K;
+    __boot_core_stack_guard_page_end_exclusive = .;
 
-    /DISCARD/ : { *(.comment*) }
+    /***********************************************************************************************
+    * Boot Core Stack
+    ***********************************************************************************************/
+     __boot_core_stack_start = .;
+     . += 512K;
+     __boot_core_stack_end_exclusive = .;
 }
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
index 7b48d7b51..19545c003 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
@@ -8,31 +8,30 @@
 //! copies the binary to 0x8_0000:
 //!
 //! +---------------------------------------------+
-//! |                                             | 0x0
-//! | Unmapped                                    |
-//! |                                             | 0x6_FFFF
-//! +---------------------------------------------+
-//! | BOOT_CORE_STACK_START                       | 0x7_0000
-//! |                                             |            ^
-//! | ...                                         |            | Stack growth direction
-//! |                                             |            |
-//! | BOOT_CORE_STACK_END_INCLUSIVE               | 0x7_FFFF
-//! +---------------------------------------------+
-//! | RO_START == BOOT_CORE_STACK_END             | 0x8_0000
 //! |                                             |
+//! | Unmapped                                    |
 //! |                                             |
+//! +---------------------------------------------+
+//! |                                             | rx_start @ 0x8_0000
 //! | .text                                       |
-//! | .exception_vectors                          |
 //! | .rodata                                     |
-//! |                                             |
-//! | RO_END_INCLUSIVE                            | 0x8_0000 + __ro_size - 1
+//! | .got                                        |
+//! |                                             | rx_end_inclusive
 //! +---------------------------------------------+
-//! | RO_END == DATA_START                        | 0x8_0000 + __ro_size
-//! |                                             |
+//! |                                             | rw_start == rx_end
 //! | .data                                       |
 //! | .bss                                        |
+//! |                                             | rw_end_inclusive
+//! +---------------------------------------------+
+//! |                                             | rw_end
+//! | Unmapped Boot-core Stack Guard Page         |
 //! |                                             |
-//! | DATA_END_INCLUSIVE                          | 0x8_0000 + __ro_size + __data_size - 1
+//! +---------------------------------------------+
+//! |                                             | boot_core_stack_start          ^
+//! |                                             |                                | stack
+//! | Boot-core Stack                             |                                | growth
+//! |                                             |                                | direction
+//! |                                             | boot_core_stack_end_inclusive  |
 //! +---------------------------------------------+
 
 pub mod mmu;
@@ -46,11 +45,19 @@ use core::{cell::UnsafeCell, ops::RangeInclusive};
 
 // Symbols from the linker script.
 extern "Rust" {
+    static __rx_start: UnsafeCell<()>;
+    static __rx_end_exclusive: UnsafeCell<()>;
+
+    static __rw_start: UnsafeCell<()>;
     static __bss_start: UnsafeCell<u64>;
     static __bss_end_inclusive: UnsafeCell<u64>;
-    static __ro_start: UnsafeCell<()>;
-    static __ro_size: UnsafeCell<()>;
-    static __data_size: UnsafeCell<()>;
+    static __rw_end_exclusive: UnsafeCell<()>;
+
+    static __boot_core_stack_start: UnsafeCell<()>;
+    static __boot_core_stack_end_exclusive: UnsafeCell<()>;
+
+    static __boot_core_stack_guard_page_start: UnsafeCell<()>;
+    static __boot_core_stack_guard_page_end_exclusive: UnsafeCell<()>;
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -62,8 +69,6 @@ extern "Rust" {
 pub(super) mod map {
     use super::*;
 
-    pub const BOOT_CORE_STACK_SIZE:                  usize = 0x1_0000;
-
     /// Physical devices.
     #[cfg(feature = "bsp_rpi3")]
     pub mod mmio {
@@ -111,52 +116,69 @@ pub(super) mod map {
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-/// Start address of the Read-Only (RO) range.
+/// Start address of the Read+Execute (RX) range.
 ///
 /// # Safety
 ///
 /// - Value is provided by the linker script and must be trusted as-is.
 #[inline(always)]
-fn virt_ro_start() -> Address<Virtual> {
-    Address::new(unsafe { __ro_start.get() as usize })
+fn virt_rx_start() -> Address<Virtual> {
+    Address::new(unsafe { __rx_start.get() as usize })
 }
 
-/// Size of the Read-Only (RO) range of the kernel binary.
+/// Size of the Read+Execute (RX) range.
 ///
 /// # Safety
 ///
 /// - Value is provided by the linker script and must be trusted as-is.
 #[inline(always)]
-fn ro_size() -> usize {
-    unsafe { __ro_size.get() as usize }
+fn rx_size() -> usize {
+    unsafe { (__rx_end_exclusive.get() as usize) - (__rx_start.get() as usize) }
 }
 
-/// Start address of the data range.
+/// Start address of the Read+Write (RW) range.
 #[inline(always)]
-fn virt_data_start() -> Address<Virtual> {
-    virt_ro_start() + ro_size()
+fn virt_rw_start() -> Address<Virtual> {
+    Address::new(unsafe { __rw_start.get() as usize })
 }
 
-/// Size of the data range.
+/// Size of the Read+Write (RW) range.
 ///
 /// # Safety
 ///
 /// - Value is provided by the linker script and must be trusted as-is.
 #[inline(always)]
-fn data_size() -> usize {
-    unsafe { __data_size.get() as usize }
+fn rw_size() -> usize {
+    unsafe { (__rw_end_exclusive.get() as usize) - (__rw_start.get() as usize) }
 }
 
 /// Start address of the boot core's stack.
 #[inline(always)]
 fn virt_boot_core_stack_start() -> Address<Virtual> {
-    virt_ro_start() - map::BOOT_CORE_STACK_SIZE
+    Address::new(unsafe { __boot_core_stack_start.get() as usize })
 }
 
 /// Size of the boot core's stack.
 #[inline(always)]
 fn boot_core_stack_size() -> usize {
-    map::BOOT_CORE_STACK_SIZE
+    unsafe {
+        (__boot_core_stack_end_exclusive.get() as usize) - (__boot_core_stack_start.get() as usize)
+    }
+}
+
+/// Start address of the boot core's stack guard page.
+#[inline(always)]
+fn virt_boot_core_stack_guard_page_start() -> Address<Virtual> {
+    Address::new(unsafe { __boot_core_stack_guard_page_start.get() as usize })
+}
+
+/// Size of the boot core's stack guard page.
+#[inline(always)]
+fn boot_core_stack_guard_page_size() -> usize {
+    unsafe {
+        (__boot_core_stack_guard_page_end_exclusive.get() as usize)
+            - (__boot_core_stack_guard_page_start.get() as usize)
+    }
 }
 
 /// Exclusive end address of the physical address space.
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
index 842384dea..88fc80bd5 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
@@ -60,42 +60,42 @@ const fn size_to_num_pages(size: usize) -> usize {
     size >> KernelGranule::SHIFT
 }
 
-/// The boot core's stack.
-fn virt_stack_page_desc() -> PageSliceDescriptor<Virtual> {
-    let num_pages = size_to_num_pages(super::boot_core_stack_size());
+/// The Read+Execute (RX) pages of the kernel binary.
+fn virt_rx_page_desc() -> PageSliceDescriptor<Virtual> {
+    let num_pages = size_to_num_pages(super::rx_size());
 
-    PageSliceDescriptor::from_addr(super::virt_boot_core_stack_start(), num_pages)
+    PageSliceDescriptor::from_addr(super::virt_rx_start(), num_pages)
 }
 
-/// The Read-Only (RO) pages of the kernel binary.
-fn virt_ro_page_desc() -> PageSliceDescriptor<Virtual> {
-    let num_pages = size_to_num_pages(super::ro_size());
+/// The Read+Write (RW) pages of the kernel binary.
+fn virt_rw_page_desc() -> PageSliceDescriptor<Virtual> {
+    let num_pages = size_to_num_pages(super::rw_size());
 
-    PageSliceDescriptor::from_addr(super::virt_ro_start(), num_pages)
+    PageSliceDescriptor::from_addr(super::virt_rw_start(), num_pages)
 }
 
-/// The data pages of the kernel binary.
-fn virt_data_page_desc() -> PageSliceDescriptor<Virtual> {
-    let num_pages = size_to_num_pages(super::data_size());
+/// The boot core's stack.
+fn virt_boot_core_stack_page_desc() -> PageSliceDescriptor<Virtual> {
+    let num_pages = size_to_num_pages(super::boot_core_stack_size());
 
-    PageSliceDescriptor::from_addr(super::virt_data_start(), num_pages)
+    PageSliceDescriptor::from_addr(super::virt_boot_core_stack_start(), num_pages)
 }
 
 // The binary is still identity mapped, so we don't need to convert in the following.
 
-/// The boot core's stack.
-fn phys_stack_page_desc() -> PageSliceDescriptor<Physical> {
-    virt_stack_page_desc().into()
+/// The Read+Execute (RX) pages of the kernel binary.
+fn phys_rx_page_desc() -> PageSliceDescriptor<Physical> {
+    virt_rx_page_desc().into()
 }
 
-/// The Read-Only (RO) pages of the kernel binary.
-fn phys_ro_page_desc() -> PageSliceDescriptor<Physical> {
-    virt_ro_page_desc().into()
+/// The Read+Write (RW) pages of the kernel binary.
+fn phys_rw_page_desc() -> PageSliceDescriptor<Physical> {
+    virt_rw_page_desc().into()
 }
 
-/// The data pages of the kernel binary.
-fn phys_data_page_desc() -> PageSliceDescriptor<Physical> {
-    virt_data_page_desc().into()
+/// The boot core's stack.
+fn phys_boot_core_stack_page_desc() -> PageSliceDescriptor<Physical> {
+    virt_boot_core_stack_page_desc().into()
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -107,6 +107,13 @@ pub fn kernel_translation_tables() -> &'static InitStateLock<KernelTranslationTa
     &KERNEL_TABLES
 }
 
+/// The boot core's stack guard page.
+pub fn virt_boot_core_stack_guard_page_desc() -> PageSliceDescriptor<Virtual> {
+    let num_pages = size_to_num_pages(super::boot_core_stack_guard_page_size());
+
+    PageSliceDescriptor::from_addr(super::virt_boot_core_stack_guard_page_start(), num_pages)
+}
+
 /// Pointer to the last page of the physical address space.
 pub fn phys_addr_space_end_page() -> *const Page<Physical> {
     common::align_down(
@@ -122,31 +129,31 @@ pub fn phys_addr_space_end_page() -> *const Page<Physical> {
 /// - Any miscalculation or attribute error will likely be fatal. Needs careful manual checking.
 pub unsafe fn kernel_map_binary() -> Result<(), &'static str> {
     generic_mmu::kernel_map_pages_at(
-        "Kernel boot-core stack",
-        &virt_stack_page_desc(),
-        &phys_stack_page_desc(),
+        "Kernel code and RO data",
+        &virt_rx_page_desc(),
+        &phys_rx_page_desc(),
         &AttributeFields {
             mem_attributes: MemAttributes::CacheableDRAM,
-            acc_perms: AccessPermissions::ReadWrite,
-            execute_never: true,
+            acc_perms: AccessPermissions::ReadOnly,
+            execute_never: false,
         },
     )?;
 
     generic_mmu::kernel_map_pages_at(
-        "Kernel code and RO data",
-        &virt_ro_page_desc(),
-        &phys_ro_page_desc(),
+        "Kernel data and bss",
+        &virt_rw_page_desc(),
+        &phys_rw_page_desc(),
         &AttributeFields {
             mem_attributes: MemAttributes::CacheableDRAM,
-            acc_perms: AccessPermissions::ReadOnly,
-            execute_never: false,
+            acc_perms: AccessPermissions::ReadWrite,
+            execute_never: true,
         },
     )?;
 
     generic_mmu::kernel_map_pages_at(
-        "Kernel data and bss",
-        &virt_data_page_desc(),
-        &phys_data_page_desc(),
+        "Kernel boot-core stack",
+        &virt_boot_core_stack_page_desc(),
+        &phys_boot_core_stack_page_desc(),
         &AttributeFields {
             mem_attributes: MemAttributes::CacheableDRAM,
             acc_perms: AccessPermissions::ReadWrite,
@@ -169,7 +176,13 @@ mod tests {
     /// Check alignment of the kernel's virtual memory layout sections.
     #[kernel_test]
     fn virt_mem_layout_sections_are_64KiB_aligned() {
-        for i in [virt_stack_page_desc, virt_ro_page_desc, virt_data_page_desc].iter() {
+        for i in [
+            virt_rx_page_desc,
+            virt_rw_page_desc,
+            virt_boot_core_stack_page_desc,
+        ]
+        .iter()
+        {
             let start: usize = i().start_addr().into_usize();
             let end: usize = i().end_addr().into_usize();
 
@@ -183,9 +196,9 @@ mod tests {
     #[kernel_test]
     fn virt_mem_layout_has_no_overlaps() {
         let layout = [
-            virt_stack_page_desc(),
-            virt_ro_page_desc(),
-            virt_data_page_desc(),
+            virt_rx_page_desc(),
+            virt_rw_page_desc(),
+            virt_boot_core_stack_page_desc(),
         ];
 
         for (i, first_range) in layout.iter().enumerate() {
diff --git a/X1_JTAG_boot/Makefile b/X1_JTAG_boot/Makefile
index 4206c5282..b5a56d075 100644
--- a/X1_JTAG_boot/Makefile
+++ b/X1_JTAG_boot/Makefile
@@ -122,6 +122,7 @@ objdump: $(KERNEL_ELF)
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
+                --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
 nm: $(KERNEL_ELF)
diff --git a/X1_JTAG_boot/jtag_boot_rpi3.img b/X1_JTAG_boot/jtag_boot_rpi3.img
index de6648804151541fd045c79f2f5dcf824f6094db..d45cc1ff0028c6d32ecd176a828fc440da668d97 100755
GIT binary patch
delta 478
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z3<V~7a-N*U1(fn)w4eC?|Njr~8SOUL3korU<ks};D9YkIHS0A<d@|$2Y(~4u%Z0SW
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Lj2n|z%BuqaNydb6

delta 496
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Xi*m~uJttSnt8-p}T7O~kMtOAr!Do_2

diff --git a/X1_JTAG_boot/jtag_boot_rpi4.img b/X1_JTAG_boot/jtag_boot_rpi4.img
index 7c70a2c0de1116b6d22e5346d17b43d09ab93d91..080ff5e6dc2f097df2754fccfcc5f3acd0ef3fbb 100755
GIT binary patch
delta 389
zcmdmBy2EsWC_4kg1`bEppBp7)c^Qp2oAG{T6uf9Ok(+^G0uNB?l{3S{?7+=d{Mt;6
zjg!*^7n>>yOnjx!urg~`XOI`qqN3N28798@|NleJN85?7jTu*R*RGoV_A|r8x5i8>
zv;U@D1{yM<r*X2K(0)^2*PmLf4m-P98iKM!MU1sr8Fq32#W)#O1#v!Q*m;0C{u&5#
z0CjM<g2WjnXnIaI64qw)oE#@?%y@9~B;i|(j2e>*Ma4BOn1JelK!*WBGeG%H&b|r(
zJ_d${3ZafcAq)&tCT|oKXPmM5q-Z&l;tVN>;sgl@y#UJZfbzjcTUv-hWIdp?2Gj}(
zu!RgT3mIaVA?k9Vw8rF(65@<MCZCkZ2RahW-W({&&d3-sIZ{ep5T<bl)Y2W3JEhbC
D3&>#S

delta 363
zcmdmCy1{gUC^O@Npp7!Jyo}15t$05(3LZ3?$j!hofro)%!z*WoiP?^u?fA8s7z-z7
z2`*+7oXjUAF8k1S;%j5ZmE5(fX21Q+F!8N1)5`3>X_tXoCiEmub`sie>goDZi`8Lg
zH%miMmZ*ra7AwO}4xkt(!>S<8rwls}Fvnj5VGf`U4o8qU!vsy&$!5aZjINWDgpC<D
zZk{H5i;<N92vjB)ii&HRFagy9fd&JF{=*2Not%9Y0(=Y%4HZHigF=ADOx`Fe&NyZB
zNzrm9#R*anMF|oRdIpr=0p){@wlooi$htsj6{r;wU<(<bJO+jcW{A2BD6KMiql7r)
hm&qq3@)@D*&4H5ajEtU>Bc;?iH$W}hFnOYsIsk1kQ^^1T

diff --git a/X1_JTAG_boot/src/bsp/raspberrypi/link.ld b/X1_JTAG_boot/src/bsp/raspberrypi/link.ld
index 573abc5f0..87e6a976f 100644
--- a/X1_JTAG_boot/src/bsp/raspberrypi/link.ld
+++ b/X1_JTAG_boot/src/bsp/raspberrypi/link.ld
@@ -3,37 +3,47 @@
  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
+/* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_load_addr = 0x80000;
+
+ENTRY(__rpi_load_addr)
+
+PHDRS
+{
+    segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
+    segment_rw PT_LOAD FLAGS(6); /* 6 == RW */
+}
+
 SECTIONS
 {
-    /* Set current address to the value from which the RPi starts execution */
-    . = 0x80000;
+    . =  __rpi_load_addr;
 
+    /***********************************************************************************************
+    * Code + RO Data + Global Offset Table
+    ***********************************************************************************************/
+    __rx_start = .;
     .text :
     {
-        *(.text._start) *(.text*)
-    }
+        KEEP(*(.text._start))
+        *(.text*)
+    } :segment_rx
 
-    .rodata :
-    {
-        *(.rodata*)
-    }
+    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
+    .got    : ALIGN(8) { *(.got)     } :segment_rx
 
-    .data :
-    {
-        *(.data*)
-    }
+    /***********************************************************************************************
+    * Data + BSS
+    ***********************************************************************************************/
+    .data : { *(.data*) } :segment_rw
 
     /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-    .bss ALIGN(8):
+    .bss : ALIGN(8)
     {
         __bss_start = .;
         *(.bss*);
         . = ALIGN(8);
 
-        /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-        . += 8;
+        . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
         __bss_end_inclusive = . - 8;
-    }
-
-    /DISCARD/ : { *(.comment*) }
+    } :NONE
 }
diff --git a/X1_JTAG_boot/src/bsp/raspberrypi/memory.rs b/X1_JTAG_boot/src/bsp/raspberrypi/memory.rs
index fb47b1418..56a3306e5 100644
--- a/X1_JTAG_boot/src/bsp/raspberrypi/memory.rs
+++ b/X1_JTAG_boot/src/bsp/raspberrypi/memory.rs
@@ -12,6 +12,8 @@ use core::{cell::UnsafeCell, ops::RangeInclusive};
 
 // Symbols from the linker script.
 extern "Rust" {
+    static __rx_start: UnsafeCell<()>;
+
     static __bss_start: UnsafeCell<u64>;
     static __bss_end_inclusive: UnsafeCell<u64>;
 }
@@ -20,10 +22,9 @@ extern "Rust" {
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
-/// The board's memory map.
+/// The board's physical memory map.
 #[rustfmt::skip]
 pub(super) mod map {
-    pub const BOOT_CORE_STACK_END: usize = 0x8_0000;
 
     pub const GPIO_OFFSET:         usize = 0x0020_0000;
     pub const UART_OFFSET:         usize = 0x0020_1000;
@@ -49,6 +50,20 @@ pub(super) mod map {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// Start address of the Read+Execute (RX) range.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn rx_start() -> usize {
+    unsafe { __rx_start.get() as usize }
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -56,7 +71,7 @@ pub(super) mod map {
 /// Exclusive end address of the boot core's stack.
 #[inline(always)]
 pub fn boot_core_stack_end() -> usize {
-    map::BOOT_CORE_STACK_END
+    rx_start()
 }
 
 /// Return the inclusive range spanning the .bss section.

From 5887503f8a00dfcd76b3c1ce76c396e6b2d98f4d Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Tue, 16 Mar 2021 23:05:50 +0100
Subject: [PATCH 040/214] Fix explanation

---
 .../README.md                                 | 13 ++++-----
 .../src/main.rs                               |  7 ++---
 12_exceptions_part1_groundwork/README.md      |  4 +--
 12_exceptions_part1_groundwork/src/main.rs    |  7 ++---
 13_integrated_testing/README.md               | 12 ++++----
 13_integrated_testing/src/main.rs             |  7 ++---
 14_exceptions_part2_peripheral_IRQs/README.md | 29 +++++++++++++------
 .../src/_arch/aarch64/memory/mmu.rs           |  2 +-
 .../src/main.rs                               |  7 ++---
 15_virtual_mem_part2_mmio_remap/README.md     | 15 ++++++++--
 15_virtual_mem_part2_mmio_remap/src/main.rs   |  7 ++---
 11 files changed, 62 insertions(+), 48 deletions(-)

diff --git a/11_virtual_mem_part1_identity_mapping/README.md b/11_virtual_mem_part1_identity_mapping/README.md
index bebf518e9..8534ad881 100644
--- a/11_virtual_mem_part1_identity_mapping/README.md
+++ b/11_virtual_mem_part1_identity_mapping/README.md
@@ -1018,16 +1018,15 @@ diff -uNr 10_privilege_level/src/main.rs 11_virtual_mem_part1_identity_mapping/s
  #![feature(format_args_nl)]
  #![feature(panic_info_message)]
  #![feature(trait_alias)]
-@@ -132,9 +136,18 @@
+@@ -132,9 +136,17 @@
  /// # Safety
  ///
  /// - Only a single core must be active and running this function.
 -/// - The init calls in this function must appear in the correct order.
 +/// - The init calls in this function must appear in the correct order:
-+///     - Caching must be activated before the device drivers.
-+///       - Without it, any atomic operations, e.g. the yet-to-be-introduced spinlocks in the device
-+///         drivers (which currently employ NullLocks instead of spinlocks), will fail to work on
-+///         the RPi SoCs.
++///     - MMU + Data caching must be activated at the earliest. Without it, any atomic operations,
++///       e.g. the yet-to-be-introduced spinlocks in the device drivers (which currently employ
++///       NullLocks instead of spinlocks), will fail to work (properly) on the RPi SoCs.
  unsafe fn kernel_init() -> ! {
      use driver::interface::DriverManager;
 +    use memory::mmu::interface::MMU;
@@ -1038,7 +1037,7 @@ diff -uNr 10_privilege_level/src/main.rs 11_virtual_mem_part1_identity_mapping/s
 
      for i in bsp::driver::driver_manager().all_device_drivers().iter() {
          if let Err(x) = i.init() {
-@@ -158,6 +171,9 @@
+@@ -158,6 +170,9 @@
 
      info!("Booting on: {}", bsp::board_name());
 
@@ -1048,7 +1047,7 @@ diff -uNr 10_privilege_level/src/main.rs 11_virtual_mem_part1_identity_mapping/s
      let (_, privilege_level) = exception::current_privilege_level();
      info!("Current privilege level: {}", privilege_level);
 
-@@ -181,6 +197,13 @@
+@@ -181,6 +196,13 @@
      info!("Timer test, spinning for 1 second");
      time::time_manager().spin_for(Duration::from_secs(1));
 
diff --git a/11_virtual_mem_part1_identity_mapping/src/main.rs b/11_virtual_mem_part1_identity_mapping/src/main.rs
index ccc842de4..9037541d1 100644
--- a/11_virtual_mem_part1_identity_mapping/src/main.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/main.rs
@@ -137,10 +137,9 @@ mod time;
 ///
 /// - Only a single core must be active and running this function.
 /// - The init calls in this function must appear in the correct order:
-///     - Caching must be activated before the device drivers.
-///       - Without it, any atomic operations, e.g. the yet-to-be-introduced spinlocks in the device
-///         drivers (which currently employ NullLocks instead of spinlocks), will fail to work on
-///         the RPi SoCs.
+///     - MMU + Data caching must be activated at the earliest. Without it, any atomic operations,
+///       e.g. the yet-to-be-introduced spinlocks in the device drivers (which currently employ
+///       NullLocks instead of spinlocks), will fail to work (properly) on the RPi SoCs.
 unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
     use memory::mmu::interface::MMU;
diff --git a/12_exceptions_part1_groundwork/README.md b/12_exceptions_part1_groundwork/README.md
index b495742d6..99838f3eb 100644
--- a/12_exceptions_part1_groundwork/README.md
+++ b/12_exceptions_part1_groundwork/README.md
@@ -953,7 +953,7 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/main.rs 12_exceptions_part1_
  #![feature(panic_info_message)]
  #![feature(trait_alias)]
  #![no_main]
-@@ -145,6 +146,8 @@
+@@ -144,6 +145,8 @@
      use driver::interface::DriverManager;
      use memory::mmu::interface::MMU;
 
@@ -962,7 +962,7 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/main.rs 12_exceptions_part1_
      if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
          panic!("MMU: {}", string);
      }
-@@ -197,13 +200,28 @@
+@@ -196,13 +199,28 @@
      info!("Timer test, spinning for 1 second");
      time::time_manager().spin_for(Duration::from_secs(1));
 
diff --git a/12_exceptions_part1_groundwork/src/main.rs b/12_exceptions_part1_groundwork/src/main.rs
index 8e8c089f1..aed3404a0 100644
--- a/12_exceptions_part1_groundwork/src/main.rs
+++ b/12_exceptions_part1_groundwork/src/main.rs
@@ -138,10 +138,9 @@ mod time;
 ///
 /// - Only a single core must be active and running this function.
 /// - The init calls in this function must appear in the correct order:
-///     - Caching must be activated before the device drivers.
-///       - Without it, any atomic operations, e.g. the yet-to-be-introduced spinlocks in the device
-///         drivers (which currently employ NullLocks instead of spinlocks), will fail to work on
-///         the RPi SoCs.
+///     - MMU + Data caching must be activated at the earliest. Without it, any atomic operations,
+///       e.g. the yet-to-be-introduced spinlocks in the device drivers (which currently employ
+///       NullLocks instead of spinlocks), will fail to work (properly) on the RPi SoCs.
 unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
     use memory::mmu::interface::MMU;
diff --git a/13_integrated_testing/README.md b/13_integrated_testing/README.md
index 452c864e5..65423fc4c 100644
--- a/13_integrated_testing/README.md
+++ b/13_integrated_testing/README.md
@@ -1505,15 +1505,15 @@ diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/m
 
  /// Early init code.
  ///
-@@ -142,6 +23,7 @@
- ///       - Without it, any atomic operations, e.g. the yet-to-be-introduced spinlocks in the device
- ///         drivers (which currently employ NullLocks instead of spinlocks), will fail to work on
- ///         the RPi SoCs.
+@@ -141,6 +22,7 @@
+ ///     - MMU + Data caching must be activated at the earliest. Without it, any atomic operations,
+ ///       e.g. the yet-to-be-introduced spinlocks in the device drivers (which currently employ
+ ///       NullLocks instead of spinlocks), will fail to work (properly) on the RPi SoCs.
 +#[no_mangle]
  unsafe fn kernel_init() -> ! {
      use driver::interface::DriverManager;
      use memory::mmu::interface::MMU;
-@@ -168,9 +50,7 @@
+@@ -167,9 +49,7 @@
  fn kernel_main() -> ! {
      use bsp::console::console;
      use console::interface::All;
@@ -1523,7 +1523,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/m
 
      info!("Booting on: {}", bsp::board_name());
 
-@@ -197,31 +77,6 @@
+@@ -196,31 +76,6 @@
          info!("      {}. {}", i + 1, driver.compatible());
      }
 
diff --git a/13_integrated_testing/src/main.rs b/13_integrated_testing/src/main.rs
index 101124df8..77c9d494b 100644
--- a/13_integrated_testing/src/main.rs
+++ b/13_integrated_testing/src/main.rs
@@ -19,10 +19,9 @@ use libkernel::{bsp, console, driver, exception, info, memory, time};
 ///
 /// - Only a single core must be active and running this function.
 /// - The init calls in this function must appear in the correct order:
-///     - Caching must be activated before the device drivers.
-///       - Without it, any atomic operations, e.g. the yet-to-be-introduced spinlocks in the device
-///         drivers (which currently employ NullLocks instead of spinlocks), will fail to work on
-///         the RPi SoCs.
+///     - MMU + Data caching must be activated at the earliest. Without it, any atomic operations,
+///       e.g. the yet-to-be-introduced spinlocks in the device drivers (which currently employ
+///       NullLocks instead of spinlocks), will fail to work (properly) on the RPi SoCs.
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
diff --git a/14_exceptions_part2_peripheral_IRQs/README.md b/14_exceptions_part2_peripheral_IRQs/README.md
index 9ae718d77..9b4436b8c 100644
--- a/14_exceptions_part2_peripheral_IRQs/README.md
+++ b/14_exceptions_part2_peripheral_IRQs/README.md
@@ -857,6 +857,19 @@ diff -uNr 13_integrated_testing/src/_arch/aarch64/exception.rs 14_exceptions_par
 
  #[no_mangle]
 
+diff -uNr 13_integrated_testing/src/_arch/aarch64/memory/mmu.rs 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
+--- 13_integrated_testing/src/_arch/aarch64/memory/mmu.rs
++++ 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
+@@ -149,7 +149,7 @@
+         barrier::isb(barrier::SY);
+
+         // Enable the MMU and turn on data and instruction caching.
+-        SCTLR_EL1.modify(SCTLR_EL1::M::Enable + SCTLR_EL1::C::Cacheable + SCTLR_EL1::I::Cacheable);
++        SCTLR_EL1.modify(SCTLR_EL1::M::Enable);
+
+         // Force MMU init to complete before next instruction.
+         barrier::isb(barrier::SY);
+
 diff -uNr 13_integrated_testing/src/bsp/device_driver/arm/gicv2/gicc.rs 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs
 --- 13_integrated_testing/src/bsp/device_driver/arm/gicv2/gicc.rs
 +++ 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs
@@ -2325,18 +2338,16 @@ diff -uNr 13_integrated_testing/src/main.rs 14_exceptions_part2_peripheral_IRQs/
 
  /// Early init code.
  ///
-@@ -21,8 +21,8 @@
+@@ -21,7 +21,7 @@
  /// - The init calls in this function must appear in the correct order:
- ///     - Caching must be activated before the device drivers.
- ///       - Without it, any atomic operations, e.g. the yet-to-be-introduced spinlocks in the device
--///         drivers (which currently employ NullLocks instead of spinlocks), will fail to work on
--///         the RPi SoCs.
-+///         drivers (which currently employ IRQSafeNullLocks instead of spinlocks), will fail to
-+///         work on the RPi SoCs.
+ ///     - MMU + Data caching must be activated at the earliest. Without it, any atomic operations,
+ ///       e.g. the yet-to-be-introduced spinlocks in the device drivers (which currently employ
+-///       NullLocks instead of spinlocks), will fail to work (properly) on the RPi SoCs.
++///       IRQSafeNullLocks instead of spinlocks), will fail to work (properly) on the RPi SoCs.
  #[no_mangle]
  unsafe fn kernel_init() -> ! {
      use driver::interface::DriverManager;
-@@ -42,15 +42,27 @@
+@@ -41,15 +41,27 @@
      bsp::driver::driver_manager().post_device_driver_init();
      // println! is usable from here on.
 
@@ -2366,7 +2377,7 @@ diff -uNr 13_integrated_testing/src/main.rs 14_exceptions_part2_peripheral_IRQs/
 
      info!("Booting on: {}", bsp::board_name());
 
-@@ -77,12 +89,9 @@
+@@ -76,12 +88,9 @@
          info!("      {}. {}", i + 1, driver.compatible());
      }
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
index 29e8125d7..cbf04a98e 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
@@ -149,7 +149,7 @@ impl memory::mmu::interface::MMU for MemoryManagementUnit {
         barrier::isb(barrier::SY);
 
         // Enable the MMU and turn on data and instruction caching.
-        SCTLR_EL1.modify(SCTLR_EL1::M::Enable + SCTLR_EL1::C::Cacheable + SCTLR_EL1::I::Cacheable);
+        SCTLR_EL1.modify(SCTLR_EL1::M::Enable);
 
         // Force MMU init to complete before next instruction.
         barrier::isb(barrier::SY);
diff --git a/14_exceptions_part2_peripheral_IRQs/src/main.rs b/14_exceptions_part2_peripheral_IRQs/src/main.rs
index 0bd9f71dd..6ec5a670c 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/main.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/main.rs
@@ -19,10 +19,9 @@ use libkernel::{bsp, cpu, driver, exception, info, memory, state, time, warn};
 ///
 /// - Only a single core must be active and running this function.
 /// - The init calls in this function must appear in the correct order:
-///     - Caching must be activated before the device drivers.
-///       - Without it, any atomic operations, e.g. the yet-to-be-introduced spinlocks in the device
-///         drivers (which currently employ IRQSafeNullLocks instead of spinlocks), will fail to
-///         work on the RPi SoCs.
+///     - MMU + Data caching must be activated at the earliest. Without it, any atomic operations,
+///       e.g. the yet-to-be-introduced spinlocks in the device drivers (which currently employ
+///       IRQSafeNullLocks instead of spinlocks), will fail to work (properly) on the RPi SoCs.
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
diff --git a/15_virtual_mem_part2_mmio_remap/README.md b/15_virtual_mem_part2_mmio_remap/README.md
index 18c72b74c..5576de8fd 100644
--- a/15_virtual_mem_part2_mmio_remap/README.md
+++ b/15_virtual_mem_part2_mmio_remap/README.md
@@ -805,6 +805,15 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 15
 
          self.configure_translation_control();
 
+@@ -149,7 +140,7 @@
+         barrier::isb(barrier::SY);
+
+         // Enable the MMU and turn on data and instruction caching.
+-        SCTLR_EL1.modify(SCTLR_EL1::M::Enable);
++        SCTLR_EL1.modify(SCTLR_EL1::M::Enable + SCTLR_EL1::C::Cacheable + SCTLR_EL1::I::Cacheable);
+
+         // Force MMU init to complete before next instruction.
+         barrier::isb(barrier::SY);
 @@ -162,22 +153,3 @@
          SCTLR_EL1.matches_all(SCTLR_EL1::M::Enable)
      }
@@ -1800,7 +1809,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 15_v
 +//! | .got                                        |
 +//! |                                             | rx_end_inclusive
 +//! +---------------------------------------------+
-+//! |                                             | rw_start == ro_end
++//! |                                             | rw_start == rx_end
 +//! | .data                                       |
 +//! | .bss                                        |
 +//! |                                             | rw_end_inclusive
@@ -2150,7 +2159,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/lib.rs 15_virtual_mem_part2_mm
 diff -uNr 14_exceptions_part2_peripheral_IRQs/src/main.rs 15_virtual_mem_part2_mmio_remap/src/main.rs
 --- 14_exceptions_part2_peripheral_IRQs/src/main.rs
 +++ 15_virtual_mem_part2_mmio_remap/src/main.rs
-@@ -26,21 +26,39 @@
+@@ -25,21 +25,39 @@
  #[no_mangle]
  unsafe fn kernel_init() -> ! {
      use driver::interface::DriverManager;
@@ -2196,7 +2205,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/main.rs 15_virtual_mem_part2_m
 
      // Let device drivers register and enable their handlers with the interrupt controller.
      for i in bsp::driver::driver_manager().all_device_drivers() {
-@@ -66,8 +84,8 @@
+@@ -65,8 +83,8 @@
 
      info!("Booting on: {}", bsp::board_name());
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/main.rs b/15_virtual_mem_part2_mmio_remap/src/main.rs
index 40d3ed410..0dd1c28d2 100644
--- a/15_virtual_mem_part2_mmio_remap/src/main.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/main.rs
@@ -19,10 +19,9 @@ use libkernel::{bsp, cpu, driver, exception, info, memory, state, time, warn};
 ///
 /// - Only a single core must be active and running this function.
 /// - The init calls in this function must appear in the correct order:
-///     - Caching must be activated before the device drivers.
-///       - Without it, any atomic operations, e.g. the yet-to-be-introduced spinlocks in the device
-///         drivers (which currently employ IRQSafeNullLocks instead of spinlocks), will fail to
-///         work on the RPi SoCs.
+///     - MMU + Data caching must be activated at the earliest. Without it, any atomic operations,
+///       e.g. the yet-to-be-introduced spinlocks in the device drivers (which currently employ
+///       IRQSafeNullLocks instead of spinlocks), will fail to work (properly) on the RPi SoCs.
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;

From 6a9af3c2020d3092802ae35b51b22cc93e2aa1a9 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Tue, 16 Mar 2021 23:24:59 +0100
Subject: [PATCH 041/214] change static type

---
 04_zero_overhead_abstraction/README.md                          | 2 +-
 04_zero_overhead_abstraction/src/bsp/raspberrypi/cpu.rs         | 2 +-
 05_safe_globals/src/bsp/raspberrypi/cpu.rs                      | 2 +-
 06_drivers_gpio_uart/src/bsp/raspberrypi/cpu.rs                 | 2 +-
 07_uart_chainloader/src/bsp/raspberrypi/cpu.rs                  | 2 +-
 08_timestamps/src/bsp/raspberrypi/cpu.rs                        | 2 +-
 09_hw_debug_JTAG/src/bsp/raspberrypi/cpu.rs                     | 2 +-
 10_privilege_level/src/bsp/raspberrypi/cpu.rs                   | 2 +-
 .../src/bsp/raspberrypi/cpu.rs                                  | 2 +-
 12_exceptions_part1_groundwork/src/bsp/raspberrypi/cpu.rs       | 2 +-
 13_integrated_testing/src/bsp/raspberrypi/cpu.rs                | 2 +-
 14_exceptions_part2_peripheral_IRQs/README.md                   | 2 +-
 .../src/bsp/device_driver/arm/gicv2.rs                          | 2 +-
 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/cpu.rs  | 2 +-
 15_virtual_mem_part2_mmio_remap/README.md                       | 2 +-
 .../src/bsp/device_driver/arm/gicv2.rs                          | 2 +-
 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/cpu.rs      | 2 +-
 X1_JTAG_boot/src/bsp/raspberrypi/cpu.rs                         | 2 +-
 18 files changed, 18 insertions(+), 18 deletions(-)

diff --git a/04_zero_overhead_abstraction/README.md b/04_zero_overhead_abstraction/README.md
index 358d01e71..69db5c72b 100644
--- a/04_zero_overhead_abstraction/README.md
+++ b/04_zero_overhead_abstraction/README.md
@@ -165,7 +165,7 @@ diff -uNr 03_hacky_hello_world/src/bsp/raspberrypi/cpu.rs 04_zero_overhead_abstr
 +//--------------------------------------------------------------------------------------------------
 +
 +/// Used by `arch` code to find the early boot core.
-+pub const BOOT_CORE_ID: usize = 0;
++pub const BOOT_CORE_ID: u64 = 0;
 
 diff -uNr 03_hacky_hello_world/src/bsp/raspberrypi/link.ld 04_zero_overhead_abstraction/src/bsp/raspberrypi/link.ld
 --- 03_hacky_hello_world/src/bsp/raspberrypi/link.ld
diff --git a/04_zero_overhead_abstraction/src/bsp/raspberrypi/cpu.rs b/04_zero_overhead_abstraction/src/bsp/raspberrypi/cpu.rs
index 3951618d7..16ab927d7 100644
--- a/04_zero_overhead_abstraction/src/bsp/raspberrypi/cpu.rs
+++ b/04_zero_overhead_abstraction/src/bsp/raspberrypi/cpu.rs
@@ -9,4 +9,4 @@
 //--------------------------------------------------------------------------------------------------
 
 /// Used by `arch` code to find the early boot core.
-pub const BOOT_CORE_ID: usize = 0;
+pub const BOOT_CORE_ID: u64 = 0;
diff --git a/05_safe_globals/src/bsp/raspberrypi/cpu.rs b/05_safe_globals/src/bsp/raspberrypi/cpu.rs
index 3951618d7..16ab927d7 100644
--- a/05_safe_globals/src/bsp/raspberrypi/cpu.rs
+++ b/05_safe_globals/src/bsp/raspberrypi/cpu.rs
@@ -9,4 +9,4 @@
 //--------------------------------------------------------------------------------------------------
 
 /// Used by `arch` code to find the early boot core.
-pub const BOOT_CORE_ID: usize = 0;
+pub const BOOT_CORE_ID: u64 = 0;
diff --git a/06_drivers_gpio_uart/src/bsp/raspberrypi/cpu.rs b/06_drivers_gpio_uart/src/bsp/raspberrypi/cpu.rs
index 3951618d7..16ab927d7 100644
--- a/06_drivers_gpio_uart/src/bsp/raspberrypi/cpu.rs
+++ b/06_drivers_gpio_uart/src/bsp/raspberrypi/cpu.rs
@@ -9,4 +9,4 @@
 //--------------------------------------------------------------------------------------------------
 
 /// Used by `arch` code to find the early boot core.
-pub const BOOT_CORE_ID: usize = 0;
+pub const BOOT_CORE_ID: u64 = 0;
diff --git a/07_uart_chainloader/src/bsp/raspberrypi/cpu.rs b/07_uart_chainloader/src/bsp/raspberrypi/cpu.rs
index 3951618d7..16ab927d7 100644
--- a/07_uart_chainloader/src/bsp/raspberrypi/cpu.rs
+++ b/07_uart_chainloader/src/bsp/raspberrypi/cpu.rs
@@ -9,4 +9,4 @@
 //--------------------------------------------------------------------------------------------------
 
 /// Used by `arch` code to find the early boot core.
-pub const BOOT_CORE_ID: usize = 0;
+pub const BOOT_CORE_ID: u64 = 0;
diff --git a/08_timestamps/src/bsp/raspberrypi/cpu.rs b/08_timestamps/src/bsp/raspberrypi/cpu.rs
index 3951618d7..16ab927d7 100644
--- a/08_timestamps/src/bsp/raspberrypi/cpu.rs
+++ b/08_timestamps/src/bsp/raspberrypi/cpu.rs
@@ -9,4 +9,4 @@
 //--------------------------------------------------------------------------------------------------
 
 /// Used by `arch` code to find the early boot core.
-pub const BOOT_CORE_ID: usize = 0;
+pub const BOOT_CORE_ID: u64 = 0;
diff --git a/09_hw_debug_JTAG/src/bsp/raspberrypi/cpu.rs b/09_hw_debug_JTAG/src/bsp/raspberrypi/cpu.rs
index 3951618d7..16ab927d7 100644
--- a/09_hw_debug_JTAG/src/bsp/raspberrypi/cpu.rs
+++ b/09_hw_debug_JTAG/src/bsp/raspberrypi/cpu.rs
@@ -9,4 +9,4 @@
 //--------------------------------------------------------------------------------------------------
 
 /// Used by `arch` code to find the early boot core.
-pub const BOOT_CORE_ID: usize = 0;
+pub const BOOT_CORE_ID: u64 = 0;
diff --git a/10_privilege_level/src/bsp/raspberrypi/cpu.rs b/10_privilege_level/src/bsp/raspberrypi/cpu.rs
index 3951618d7..16ab927d7 100644
--- a/10_privilege_level/src/bsp/raspberrypi/cpu.rs
+++ b/10_privilege_level/src/bsp/raspberrypi/cpu.rs
@@ -9,4 +9,4 @@
 //--------------------------------------------------------------------------------------------------
 
 /// Used by `arch` code to find the early boot core.
-pub const BOOT_CORE_ID: usize = 0;
+pub const BOOT_CORE_ID: u64 = 0;
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/cpu.rs b/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/cpu.rs
index 3951618d7..16ab927d7 100644
--- a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/cpu.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/cpu.rs
@@ -9,4 +9,4 @@
 //--------------------------------------------------------------------------------------------------
 
 /// Used by `arch` code to find the early boot core.
-pub const BOOT_CORE_ID: usize = 0;
+pub const BOOT_CORE_ID: u64 = 0;
diff --git a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/cpu.rs b/12_exceptions_part1_groundwork/src/bsp/raspberrypi/cpu.rs
index 3951618d7..16ab927d7 100644
--- a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/cpu.rs
+++ b/12_exceptions_part1_groundwork/src/bsp/raspberrypi/cpu.rs
@@ -9,4 +9,4 @@
 //--------------------------------------------------------------------------------------------------
 
 /// Used by `arch` code to find the early boot core.
-pub const BOOT_CORE_ID: usize = 0;
+pub const BOOT_CORE_ID: u64 = 0;
diff --git a/13_integrated_testing/src/bsp/raspberrypi/cpu.rs b/13_integrated_testing/src/bsp/raspberrypi/cpu.rs
index 3951618d7..16ab927d7 100644
--- a/13_integrated_testing/src/bsp/raspberrypi/cpu.rs
+++ b/13_integrated_testing/src/bsp/raspberrypi/cpu.rs
@@ -9,4 +9,4 @@
 //--------------------------------------------------------------------------------------------------
 
 /// Used by `arch` code to find the early boot core.
-pub const BOOT_CORE_ID: usize = 0;
+pub const BOOT_CORE_ID: u64 = 0;
diff --git a/14_exceptions_part2_peripheral_IRQs/README.md b/14_exceptions_part2_peripheral_IRQs/README.md
index 9b4436b8c..54e33071c 100644
--- a/14_exceptions_part2_peripheral_IRQs/README.md
+++ b/14_exceptions_part2_peripheral_IRQs/README.md
@@ -1357,7 +1357,7 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/arm/gicv2.rs 14_exceptions
 +    }
 +
 +    unsafe fn init(&self) -> Result<(), &'static str> {
-+        if cpu::smp::core_id::<usize>() == bsp::cpu::BOOT_CORE_ID {
++        if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
 +            self.gicd.boot_core_init();
 +        }
 +
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs b/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs
index edbc41660..33713459c 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs
@@ -139,7 +139,7 @@ impl driver::interface::DeviceDriver for GICv2 {
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
-        if cpu::smp::core_id::<usize>() == bsp::cpu::BOOT_CORE_ID {
+        if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
             self.gicd.boot_core_init();
         }
 
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/cpu.rs b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/cpu.rs
index 3951618d7..16ab927d7 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/cpu.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/cpu.rs
@@ -9,4 +9,4 @@
 //--------------------------------------------------------------------------------------------------
 
 /// Used by `arch` code to find the early boot core.
-pub const BOOT_CORE_ID: usize = 0;
+pub const BOOT_CORE_ID: u64 = 0;
diff --git a/15_virtual_mem_part2_mmio_remap/README.md b/15_virtual_mem_part2_mmio_remap/README.md
index 5576de8fd..c512c51c6 100644
--- a/15_virtual_mem_part2_mmio_remap/README.md
+++ b/15_virtual_mem_part2_mmio_remap/README.md
@@ -1077,7 +1077,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs
 +            self.is_mmio_remapped.store(true, Ordering::Relaxed);
 +        }
 +
-         if cpu::smp::core_id::<usize>() == bsp::cpu::BOOT_CORE_ID {
+         if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
              self.gicd.boot_core_init();
          }
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs
index c317abaea..51c321868 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs
@@ -168,7 +168,7 @@ impl driver::interface::DeviceDriver for GICv2 {
             self.is_mmio_remapped.store(true, Ordering::Relaxed);
         }
 
-        if cpu::smp::core_id::<usize>() == bsp::cpu::BOOT_CORE_ID {
+        if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
             self.gicd.boot_core_init();
         }
 
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/cpu.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/cpu.rs
index 3951618d7..16ab927d7 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/cpu.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/cpu.rs
@@ -9,4 +9,4 @@
 //--------------------------------------------------------------------------------------------------
 
 /// Used by `arch` code to find the early boot core.
-pub const BOOT_CORE_ID: usize = 0;
+pub const BOOT_CORE_ID: u64 = 0;
diff --git a/X1_JTAG_boot/src/bsp/raspberrypi/cpu.rs b/X1_JTAG_boot/src/bsp/raspberrypi/cpu.rs
index 3951618d7..16ab927d7 100644
--- a/X1_JTAG_boot/src/bsp/raspberrypi/cpu.rs
+++ b/X1_JTAG_boot/src/bsp/raspberrypi/cpu.rs
@@ -9,4 +9,4 @@
 //--------------------------------------------------------------------------------------------------
 
 /// Used by `arch` code to find the early boot core.
-pub const BOOT_CORE_ID: usize = 0;
+pub const BOOT_CORE_ID: u64 = 0;

From 2432c0d283883ea87b5f2e70eed36971d74d44df Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sat, 20 Mar 2021 09:41:43 +0100
Subject: [PATCH 042/214] Revert to assembly boot code

It is too risky to rely on the compiler to not insert any operations using the
stack.

Having a stack-setting call in Rust using the cortex-a crate as the first action
in a Rust-only _start() function does not work if you're subsequently using the
stack, because the compiler often inserts the operations to make room on the
stack to prepare a function call BEFORE the call to set the stack, which crashes
the boot process.

Hence, keep on using a small piece of assembly boot code throughout.
---
 .editorconfig                                 |   5 +-
 01_wait_forever/Cargo.toml                    |   3 +
 01_wait_forever/README.md                     |   2 +-
 01_wait_forever/src/_arch/aarch64/cpu/boot.S  |  11 -
 01_wait_forever/src/_arch/aarch64/cpu/boot.rs |   4 +-
 01_wait_forever/src/_arch/aarch64/cpu/boot.s  |  20 +
 01_wait_forever/src/bsp/raspberrypi/link.ld   |   1 -
 01_wait_forever/src/main.rs                   |   6 +-
 02_runtime_init/Cargo.lock                    |  28 ++
 02_runtime_init/Cargo.toml                    |   4 +
 02_runtime_init/README.md                     | 193 +++++++---
 02_runtime_init/src/_arch/aarch64/cpu.rs      |  12 +-
 02_runtime_init/src/_arch/aarch64/cpu/boot.S  |  21 -
 02_runtime_init/src/_arch/aarch64/cpu/boot.rs |  22 +-
 02_runtime_init/src/_arch/aarch64/cpu/boot.s  |  42 ++
 02_runtime_init/src/bsp/raspberrypi.rs        |   1 +
 .../src/bsp/raspberrypi/cpu.rs                |   4 +-
 02_runtime_init/src/bsp/raspberrypi/link.ld   |  16 +-
 02_runtime_init/src/main.rs                   |   6 +-
 02_runtime_init/src/runtime_init.rs           |   1 -
 03_hacky_hello_world/Cargo.lock               |  28 ++
 03_hacky_hello_world/Cargo.toml               |   5 +
 03_hacky_hello_world/README.md                |  29 +-
 03_hacky_hello_world/src/_arch/aarch64/cpu.rs |  12 +-
 .../src/_arch/aarch64/cpu/boot.S              |  21 -
 .../src/_arch/aarch64/cpu/boot.rs             |  22 +-
 .../src/_arch/aarch64/cpu/boot.s              |  42 ++
 03_hacky_hello_world/src/bsp/raspberrypi.rs   |   1 +
 .../src/bsp/raspberrypi/cpu.rs                |  14 +-
 .../src/bsp/raspberrypi/link.ld               |  16 +-
 03_hacky_hello_world/src/main.rs              |   6 +-
 03_hacky_hello_world/src/runtime_init.rs      |   1 -
 .../.vscode/settings.json                     |   7 -
 04_zero_overhead_abstraction/Cargo.lock       |  34 --
 04_zero_overhead_abstraction/Cargo.toml       |  24 --
 04_zero_overhead_abstraction/Makefile         | 115 ------
 04_zero_overhead_abstraction/README.md        | 301 ---------------
 04_zero_overhead_abstraction/build.rs         |   8 -
 .../src/_arch/aarch64/cpu.rs                  |  26 --
 .../src/_arch/aarch64/cpu/boot.rs             |  41 --
 .../src/_arch/aarch64/cpu/smp.rs              |  29 --
 04_zero_overhead_abstraction/src/bsp.rs       |  11 -
 .../src/bsp/raspberrypi.rs                    |   9 -
 .../src/bsp/raspberrypi/console.rs            |  47 ---
 .../src/bsp/raspberrypi/link.ld               |  49 ---
 .../src/bsp/raspberrypi/memory.rs             |  59 ---
 04_zero_overhead_abstraction/src/console.rs   |  19 -
 04_zero_overhead_abstraction/src/cpu.rs       |  18 -
 04_zero_overhead_abstraction/src/cpu/boot.rs  |   9 -
 04_zero_overhead_abstraction/src/main.rs      | 133 -------
 04_zero_overhead_abstraction/src/memory.rs    |  30 --
 .../src/panic_wait.rs                         |  19 -
 04_zero_overhead_abstraction/src/print.rs     |  38 --
 .../src/runtime_init.rs                       |  37 --
 05_safe_globals/src/_arch/aarch64/cpu/boot.rs |  26 +-
 05_safe_globals/src/_arch/aarch64/cpu/boot.s  |  42 ++
 05_safe_globals/src/_arch/aarch64/cpu/smp.rs  |  29 --
 05_safe_globals/src/bsp/raspberrypi/cpu.rs    |   4 +-
 05_safe_globals/src/bsp/raspberrypi/link.ld   |  17 +-
 05_safe_globals/src/bsp/raspberrypi/memory.rs |  22 --
 05_safe_globals/src/cpu.rs                    |   2 -
 05_safe_globals/src/cpu/smp.rs                |  14 -
 05_safe_globals/src/main.rs                   |   6 +-
 06_drivers_gpio_uart/README.md                |  15 +-
 .../src/_arch/aarch64/cpu/boot.rs             |  26 +-
 .../src/_arch/aarch64/cpu/boot.s              |  42 ++
 .../src/_arch/aarch64/cpu/smp.rs              |  29 --
 .../src/bsp/raspberrypi/cpu.rs                |   4 +-
 .../src/bsp/raspberrypi/link.ld               |  17 +-
 .../src/bsp/raspberrypi/memory.rs             |  22 --
 06_drivers_gpio_uart/src/cpu.rs               |   2 -
 06_drivers_gpio_uart/src/cpu/smp.rs           |  14 -
 06_drivers_gpio_uart/src/main.rs              |   6 +-
 07_uart_chainloader/Makefile                  |   4 +-
 07_uart_chainloader/README.md                 | 358 +++++-------------
 07_uart_chainloader/demo_payload_rpi3.img     | Bin 6824 -> 6840 bytes
 07_uart_chainloader/demo_payload_rpi4.img     | Bin 6672 -> 6680 bytes
 07_uart_chainloader/src/_arch/aarch64/cpu.rs  |  16 -
 .../src/_arch/aarch64/cpu/boot.rs             |  26 +-
 .../src/_arch/aarch64/cpu/boot.s              |  53 +++
 .../src/_arch/aarch64/cpu/smp.rs              |  29 --
 .../src/bsp/raspberrypi/cpu.rs                |   4 +-
 .../src/bsp/raspberrypi/link.ld               |  30 +-
 .../src/bsp/raspberrypi/memory.rs             |  30 +-
 07_uart_chainloader/src/cpu.rs                |   4 +-
 07_uart_chainloader/src/cpu/smp.rs            |  14 -
 07_uart_chainloader/src/main.rs               |  12 +-
 07_uart_chainloader/src/relocate.rs           |  49 ---
 07_uart_chainloader/src/runtime_init.rs       |   3 +-
 08_timestamps/README.md                       | 290 ++++----------
 08_timestamps/src/_arch/aarch64/cpu/boot.rs   |  26 +-
 08_timestamps/src/_arch/aarch64/cpu/boot.s    |  42 ++
 08_timestamps/src/_arch/aarch64/cpu/smp.rs    |  29 --
 08_timestamps/src/bsp/raspberrypi/cpu.rs      |   4 +-
 08_timestamps/src/bsp/raspberrypi/link.ld     |  17 +-
 08_timestamps/src/bsp/raspberrypi/memory.rs   |  22 --
 08_timestamps/src/cpu.rs                      |   2 -
 08_timestamps/src/cpu/smp.rs                  |  14 -
 08_timestamps/src/main.rs                     |   6 +-
 09_hw_debug_JTAG/README.md                    |  16 +-
 .../src/_arch/aarch64/cpu/boot.rs             |  26 +-
 09_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s |  42 ++
 09_hw_debug_JTAG/src/_arch/aarch64/cpu/smp.rs |  29 --
 09_hw_debug_JTAG/src/bsp/raspberrypi/cpu.rs   |   4 +-
 09_hw_debug_JTAG/src/bsp/raspberrypi/link.ld  |  17 +-
 .../src/bsp/raspberrypi/memory.rs             |  22 --
 09_hw_debug_JTAG/src/cpu.rs                   |   2 -
 09_hw_debug_JTAG/src/cpu/smp.rs               |  14 -
 09_hw_debug_JTAG/src/main.rs                  |   6 +-
 10_privilege_level/README.md                  | 210 +++++-----
 .../src/_arch/aarch64/cpu/boot.rs             |  48 +--
 .../src/_arch/aarch64/cpu/boot.s              |  48 +++
 .../src/_arch/aarch64/cpu/smp.rs              |  29 --
 10_privilege_level/src/bsp/raspberrypi/cpu.rs |   4 +-
 .../src/bsp/raspberrypi/link.ld               |  17 +-
 .../src/bsp/raspberrypi/memory.rs             |  22 --
 10_privilege_level/src/cpu.rs                 |   2 -
 10_privilege_level/src/cpu/smp.rs             |  14 -
 10_privilege_level/src/main.rs                |   6 +-
 .../README.md                                 |  49 ++-
 .../src/_arch/aarch64/cpu/boot.rs             |  48 +--
 .../src/_arch/aarch64/cpu/boot.s              |  48 +++
 .../src/_arch/aarch64/cpu/smp.rs              |  29 --
 .../src/bsp/raspberrypi/cpu.rs                |   4 +-
 .../src/bsp/raspberrypi/link.ld               |  16 +-
 .../src/bsp/raspberrypi/memory.rs             |   6 -
 .../src/cpu.rs                                |   2 -
 .../src/cpu/smp.rs                            |  14 -
 .../src/main.rs                               |   6 +-
 12_exceptions_part1_groundwork/README.md      | 291 +++++++-------
 .../src/_arch/aarch64/cpu/boot.rs             |  48 +--
 .../src/_arch/aarch64/cpu/boot.s              |  48 +++
 .../src/_arch/aarch64/cpu/smp.rs              |  29 --
 .../src/_arch/aarch64/exception.S             | 138 -------
 .../src/_arch/aarch64/exception.rs            |   2 +-
 .../src/_arch/aarch64/exception.s             | 148 ++++++++
 .../src/bsp/raspberrypi/cpu.rs                |   4 +-
 .../src/bsp/raspberrypi/link.ld               |  16 +-
 .../src/bsp/raspberrypi/memory.rs             |   6 -
 12_exceptions_part1_groundwork/src/cpu.rs     |   2 -
 12_exceptions_part1_groundwork/src/cpu/smp.rs |  14 -
 12_exceptions_part1_groundwork/src/main.rs    |   5 +-
 13_integrated_testing/README.md               |  26 +-
 .../src/_arch/aarch64/cpu/boot.rs             |  48 +--
 .../src/_arch/aarch64/cpu/boot.s              |  48 +++
 .../src/_arch/aarch64/cpu/smp.rs              |  29 --
 .../src/_arch/aarch64/exception.S             | 138 -------
 .../src/_arch/aarch64/exception.rs            |   2 +-
 .../src/_arch/aarch64/exception.s             | 148 ++++++++
 .../src/bsp/raspberrypi/cpu.rs                |   4 +-
 .../src/bsp/raspberrypi/link.ld               |  16 +-
 .../src/bsp/raspberrypi/memory.rs             |   6 -
 13_integrated_testing/src/cpu.rs              |   2 -
 13_integrated_testing/src/cpu/smp.rs          |  14 -
 13_integrated_testing/src/lib.rs              |   5 +-
 .../tests/00_console_sanity.rs                |   4 +-
 14_exceptions_part2_peripheral_IRQs/README.md |  83 +++-
 .../src/_arch/aarch64/cpu/boot.rs             |  48 +--
 .../src/_arch/aarch64/cpu/boot.s              |  48 +++
 .../src/_arch/aarch64/exception.S             | 138 -------
 .../src/_arch/aarch64/exception.rs            |   2 +-
 .../src/_arch/aarch64/exception.s             | 148 ++++++++
 .../src/_arch/aarch64/memory/mmu.rs           |   2 +-
 .../src/bsp/raspberrypi/cpu.rs                |   4 +-
 .../src/bsp/raspberrypi/link.ld               |  16 +-
 .../src/bsp/raspberrypi/memory.rs             |   6 -
 .../src/lib.rs                                |   5 +-
 .../tests/00_console_sanity.rs                |   4 +-
 15_virtual_mem_part2_mmio_remap/README.md     |  63 +--
 .../src/_arch/aarch64/cpu/boot.rs             |  48 +--
 .../src/_arch/aarch64/cpu/boot.s              |  48 +++
 .../src/_arch/aarch64/exception.S             | 138 -------
 .../src/_arch/aarch64/exception.rs            |   2 +-
 .../src/_arch/aarch64/exception.s             | 148 ++++++++
 .../src/bsp/raspberrypi/cpu.rs                |   4 +-
 .../src/bsp/raspberrypi/link.ld               |  19 +-
 .../src/bsp/raspberrypi/memory.rs             |   8 -
 15_virtual_mem_part2_mmio_remap/src/lib.rs    |   5 +-
 .../tests/00_console_sanity.rs                |   4 +-
 X1_JTAG_boot/jtag_boot_rpi3.img               | Bin 8152 -> 8176 bytes
 X1_JTAG_boot/jtag_boot_rpi4.img               | Bin 6840 -> 6848 bytes
 X1_JTAG_boot/src/_arch/aarch64/cpu/boot.rs    |  26 +-
 X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s     |  42 ++
 X1_JTAG_boot/src/_arch/aarch64/cpu/smp.rs     |  29 --
 X1_JTAG_boot/src/bsp/raspberrypi/cpu.rs       |   4 +-
 X1_JTAG_boot/src/bsp/raspberrypi/link.ld      |  17 +-
 X1_JTAG_boot/src/bsp/raspberrypi/memory.rs    |  22 --
 X1_JTAG_boot/src/cpu.rs                       |   2 -
 X1_JTAG_boot/src/cpu/smp.rs                   |  14 -
 X1_JTAG_boot/src/main.rs                      |   6 +-
 rust-toolchain                                |   2 +-
 191 files changed, 2586 insertions(+), 3695 deletions(-)
 delete mode 100644 01_wait_forever/src/_arch/aarch64/cpu/boot.S
 create mode 100644 01_wait_forever/src/_arch/aarch64/cpu/boot.s
 delete mode 100644 02_runtime_init/src/_arch/aarch64/cpu/boot.S
 create mode 100644 02_runtime_init/src/_arch/aarch64/cpu/boot.s
 rename {04_zero_overhead_abstraction => 02_runtime_init}/src/bsp/raspberrypi/cpu.rs (82%)
 delete mode 100644 03_hacky_hello_world/src/_arch/aarch64/cpu/boot.S
 create mode 100644 03_hacky_hello_world/src/_arch/aarch64/cpu/boot.s
 rename 04_zero_overhead_abstraction/src/cpu/smp.rs => 03_hacky_hello_world/src/bsp/raspberrypi/cpu.rs (63%)
 delete mode 100644 04_zero_overhead_abstraction/.vscode/settings.json
 delete mode 100644 04_zero_overhead_abstraction/Cargo.lock
 delete mode 100644 04_zero_overhead_abstraction/Cargo.toml
 delete mode 100644 04_zero_overhead_abstraction/Makefile
 delete mode 100644 04_zero_overhead_abstraction/README.md
 delete mode 100644 04_zero_overhead_abstraction/build.rs
 delete mode 100644 04_zero_overhead_abstraction/src/_arch/aarch64/cpu.rs
 delete mode 100644 04_zero_overhead_abstraction/src/_arch/aarch64/cpu/boot.rs
 delete mode 100644 04_zero_overhead_abstraction/src/_arch/aarch64/cpu/smp.rs
 delete mode 100644 04_zero_overhead_abstraction/src/bsp.rs
 delete mode 100644 04_zero_overhead_abstraction/src/bsp/raspberrypi.rs
 delete mode 100644 04_zero_overhead_abstraction/src/bsp/raspberrypi/console.rs
 delete mode 100644 04_zero_overhead_abstraction/src/bsp/raspberrypi/link.ld
 delete mode 100644 04_zero_overhead_abstraction/src/bsp/raspberrypi/memory.rs
 delete mode 100644 04_zero_overhead_abstraction/src/console.rs
 delete mode 100644 04_zero_overhead_abstraction/src/cpu.rs
 delete mode 100644 04_zero_overhead_abstraction/src/cpu/boot.rs
 delete mode 100644 04_zero_overhead_abstraction/src/main.rs
 delete mode 100644 04_zero_overhead_abstraction/src/memory.rs
 delete mode 100644 04_zero_overhead_abstraction/src/panic_wait.rs
 delete mode 100644 04_zero_overhead_abstraction/src/print.rs
 delete mode 100644 04_zero_overhead_abstraction/src/runtime_init.rs
 create mode 100644 05_safe_globals/src/_arch/aarch64/cpu/boot.s
 delete mode 100644 05_safe_globals/src/_arch/aarch64/cpu/smp.rs
 delete mode 100644 05_safe_globals/src/cpu/smp.rs
 create mode 100644 06_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s
 delete mode 100644 06_drivers_gpio_uart/src/_arch/aarch64/cpu/smp.rs
 delete mode 100644 06_drivers_gpio_uart/src/cpu/smp.rs
 create mode 100644 07_uart_chainloader/src/_arch/aarch64/cpu/boot.s
 delete mode 100644 07_uart_chainloader/src/_arch/aarch64/cpu/smp.rs
 delete mode 100644 07_uart_chainloader/src/cpu/smp.rs
 delete mode 100644 07_uart_chainloader/src/relocate.rs
 create mode 100644 08_timestamps/src/_arch/aarch64/cpu/boot.s
 delete mode 100644 08_timestamps/src/_arch/aarch64/cpu/smp.rs
 delete mode 100644 08_timestamps/src/cpu/smp.rs
 create mode 100644 09_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s
 delete mode 100644 09_hw_debug_JTAG/src/_arch/aarch64/cpu/smp.rs
 delete mode 100644 09_hw_debug_JTAG/src/cpu/smp.rs
 create mode 100644 10_privilege_level/src/_arch/aarch64/cpu/boot.s
 delete mode 100644 10_privilege_level/src/_arch/aarch64/cpu/smp.rs
 delete mode 100644 10_privilege_level/src/cpu/smp.rs
 create mode 100644 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.s
 delete mode 100644 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/smp.rs
 delete mode 100644 11_virtual_mem_part1_identity_mapping/src/cpu/smp.rs
 create mode 100644 12_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.s
 delete mode 100644 12_exceptions_part1_groundwork/src/_arch/aarch64/cpu/smp.rs
 delete mode 100644 12_exceptions_part1_groundwork/src/_arch/aarch64/exception.S
 create mode 100644 12_exceptions_part1_groundwork/src/_arch/aarch64/exception.s
 delete mode 100644 12_exceptions_part1_groundwork/src/cpu/smp.rs
 create mode 100644 13_integrated_testing/src/_arch/aarch64/cpu/boot.s
 delete mode 100644 13_integrated_testing/src/_arch/aarch64/cpu/smp.rs
 delete mode 100644 13_integrated_testing/src/_arch/aarch64/exception.S
 create mode 100644 13_integrated_testing/src/_arch/aarch64/exception.s
 delete mode 100644 13_integrated_testing/src/cpu/smp.rs
 create mode 100644 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.s
 delete mode 100644 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.S
 create mode 100644 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.s
 create mode 100644 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.s
 delete mode 100644 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.S
 create mode 100644 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.s
 create mode 100644 X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s
 delete mode 100644 X1_JTAG_boot/src/_arch/aarch64/cpu/smp.rs
 delete mode 100644 X1_JTAG_boot/src/cpu/smp.rs

diff --git a/.editorconfig b/.editorconfig
index 38ed8df1c..dd8892ca7 100644
--- a/.editorconfig
+++ b/.editorconfig
@@ -23,8 +23,9 @@ indent_size = 4
 [*.rs]
 indent_size = 4
 
-[*.S]
-indent_size = 4
+[*.s]
+indent_style = tab
+indent_size = 8
 
 [*.sh]
 indent_size = 4
diff --git a/01_wait_forever/Cargo.toml b/01_wait_forever/Cargo.toml
index 8a0187c43..a75809963 100644
--- a/01_wait_forever/Cargo.toml
+++ b/01_wait_forever/Cargo.toml
@@ -4,6 +4,9 @@ version = "0.1.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
 edition = "2018"
 
+[profile.release]
+lto = true
+
 [features]
 default = []
 bsp_rpi3 = []
diff --git a/01_wait_forever/README.md b/01_wait_forever/README.md
index 66dc29d29..bf214b68f 100644
--- a/01_wait_forever/README.md
+++ b/01_wait_forever/README.md
@@ -23,7 +23,7 @@
     - Only `.text` section.
 - `main.rs`: Important [inner attributes]:
     - `#![no_std]`, `#![no_main]`
-- `boot.S`: Assembly `_start()` function that executes `wfe` (Wait For Event), halting all cores
+- `boot.s`: Assembly `_start()` function that executes `wfe` (Wait For Event), halting all cores
   that are executing `_start()`.
 - We (have to) define a `#[panic_handler]` function to make the compiler happy.
     - Make it `unimplemented!()` because it will be stripped out since it is not used.
diff --git a/01_wait_forever/src/_arch/aarch64/cpu/boot.S b/01_wait_forever/src/_arch/aarch64/cpu/boot.S
deleted file mode 100644
index 2de0c61c5..000000000
--- a/01_wait_forever/src/_arch/aarch64/cpu/boot.S
+++ /dev/null
@@ -1,11 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-.section ".text._start"
-
-.global _start
-
-_start:
-1:  wfe         // Wait for event
-    b       1b  // In case an event happened, jump back to 1
diff --git a/01_wait_forever/src/_arch/aarch64/cpu/boot.rs b/01_wait_forever/src/_arch/aarch64/cpu/boot.rs
index c3c325d3a..4bc6ed6da 100644
--- a/01_wait_forever/src/_arch/aarch64/cpu/boot.rs
+++ b/01_wait_forever/src/_arch/aarch64/cpu/boot.rs
@@ -11,5 +11,5 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-// Assembly counterpart to this file. Includes function _start().
-global_asm!(include_str!("boot.S"));
+// Assembly counterpart to this file.
+global_asm!(include_str!("boot.s"));
diff --git a/01_wait_forever/src/_arch/aarch64/cpu/boot.s b/01_wait_forever/src/_arch/aarch64/cpu/boot.s
new file mode 100644
index 000000000..fb05382cd
--- /dev/null
+++ b/01_wait_forever/src/_arch/aarch64/cpu/boot.s
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+.section .text._start
+
+//------------------------------------------------------------------------------
+// fn _start()
+//------------------------------------------------------------------------------
+_start:
+	// Infinitely wait for events (aka "park the core").
+1:	wfe
+	b	1b
+
+.size	_start, . - _start
+.type	_start, function
+.global	_start
diff --git a/01_wait_forever/src/bsp/raspberrypi/link.ld b/01_wait_forever/src/bsp/raspberrypi/link.ld
index 7d649f884..60c393d6b 100644
--- a/01_wait_forever/src/bsp/raspberrypi/link.ld
+++ b/01_wait_forever/src/bsp/raspberrypi/link.ld
@@ -23,6 +23,5 @@ SECTIONS
     .text :
     {
         KEEP(*(.text._start))
-        *(.text*)
     } :segment_rx
 }
diff --git a/01_wait_forever/src/main.rs b/01_wait_forever/src/main.rs
index 8cd4b1441..b01a84cb0 100644
--- a/01_wait_forever/src/main.rs
+++ b/01_wait_forever/src/main.rs
@@ -100,10 +100,8 @@
 //!
 //! # Boot flow
 //!
-//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
-//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.S`.
-//!
-//! [`cpu::boot::arch_boot::_start()`]: ../src/kernel/cpu/up/_arch/aarch64/cpu/boot.rs.html
+//! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
 
 #![feature(asm)]
 #![feature(global_asm)]
diff --git a/02_runtime_init/Cargo.lock b/02_runtime_init/Cargo.lock
index 3e9c31110..3b926a347 100644
--- a/02_runtime_init/Cargo.lock
+++ b/02_runtime_init/Cargo.lock
@@ -1,6 +1,34 @@
 # This file is automatically @generated by Cargo.
 # It is not intended for manual editing.
+version = 3
+
+[[package]]
+name = "cortex-a"
+version = "5.1.6"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "ecefc30975eb87afc5a810d4b2305c0ec29e607ea97e51b2ecd80766e9268d28"
+dependencies = [
+ "register",
+]
+
 [[package]]
 name = "kernel"
 version = "0.1.0"
+dependencies = [
+ "cortex-a",
+]
 
+[[package]]
+name = "register"
+version = "1.0.2"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "f4a247de29ab7cc8f5006cfe775c4a81c704f9914c5e2a79696862e643135433"
+dependencies = [
+ "tock-registers",
+]
+
+[[package]]
+name = "tock-registers"
+version = "0.6.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "f521a79accce68c417c9c77ce22108056b626126da1932f7e2e9b5bbffee0cea"
diff --git a/02_runtime_init/Cargo.toml b/02_runtime_init/Cargo.toml
index a75809963..4a03b9623 100644
--- a/02_runtime_init/Cargo.toml
+++ b/02_runtime_init/Cargo.toml
@@ -17,3 +17,7 @@ bsp_rpi4 = []
 ##--------------------------------------------------------------------------------------------------
 
 [dependencies]
+
+# Platform specific dependencies
+[target.'cfg(target_arch = "aarch64")'.dependencies]
+cortex-a = { version = "5.x.x" }
diff --git a/02_runtime_init/README.md b/02_runtime_init/README.md
index 5f5245d57..64e36440e 100644
--- a/02_runtime_init/README.md
+++ b/02_runtime_init/README.md
@@ -2,22 +2,28 @@
 
 ## tl;dr
 
-- We extend `boot.S` to call into Rust code for the first time. There, we zero the [bss] section
+- We extend `boot.s` to call into Rust code for the first time. There, we zero the [bss] section
   before execution is halted with a call to `panic()`.
 - Check out `make qemu` again to see the additional code run.
 
 ## Notable additions
 
-- More sections in linker script:
-     - `.rodata`, `.got`, `.data`, `.bss`
-- `_start()`:
-     - Halt core if core != `core0`.
-     - `core0` jumps to the `runtime_init()` Rust function.
-- `runtime_init()` in `runtime_init.rs`
+- More additions to the linker script:
+     - New sections: `.rodata`, `.got`, `.data`, `.bss`.
+     - A dedicated place for linking boot-time arguments that need to be read by `_start()`.
+- `_start()` in `_arch/__arch_name__/cpu/boot.s`:
+     1. Halt core if core != core0.
+     1. Set up the `stack pointer`.
+     1. Jump to the `_start_rust()` function, defined in `arch/__arch_name__/cpu/boot.rs`.
+- `runtime_init()` in `runtime_init.rs`:
      - Zeros the `.bss` section.
-     - Calls `kernel_init()`, which calls `panic!()`, which eventually halts `core0` as well.
+     - Calls `kernel_init()`, which calls `panic!()`, which eventually halts core0 as well.
+- The library now uses the [cortex-a] crate, which provides zero-overhead abstractions and wraps
+  `unsafe` parts when dealing with the CPU's resources.
+    - See it in action in `_arch/__arch_name__/cpu.rs`.
 
 [bss]: https://en.wikipedia.org/wiki/.bss
+[cortex-a]: https://github.com/rust-embedded/cortex-a
 
 ## Diff to previous
 ```diff
@@ -25,16 +31,14 @@
 diff -uNr 01_wait_forever/Cargo.toml 02_runtime_init/Cargo.toml
 --- 01_wait_forever/Cargo.toml
 +++ 02_runtime_init/Cargo.toml
-@@ -4,6 +4,9 @@
- authors = ["Andre Richter <andre.o.richter@gmail.com>"]
- edition = "2018"
+@@ -17,3 +17,7 @@
+ ##--------------------------------------------------------------------------------------------------
 
-+[profile.release]
-+lto = true
+ [dependencies]
 +
- [features]
- default = []
- bsp_rpi3 = []
++# Platform specific dependencies
++[target.'cfg(target_arch = "aarch64")'.dependencies]
++cortex-a = { version = "5.x.x" }
 
 diff -uNr 01_wait_forever/Makefile 02_runtime_init/Makefile
 --- 01_wait_forever/Makefile
@@ -49,32 +53,78 @@ diff -uNr 01_wait_forever/Makefile 02_runtime_init/Makefile
 
  nm: $(KERNEL_ELF)
 
-diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.S 02_runtime_init/src/_arch/aarch64/cpu/boot.S
---- 01_wait_forever/src/_arch/aarch64/cpu/boot.S
-+++ 02_runtime_init/src/_arch/aarch64/cpu/boot.S
-@@ -7,5 +7,15 @@
- .global _start
+diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.rs 02_runtime_init/src/_arch/aarch64/cpu/boot.rs
+--- 01_wait_forever/src/_arch/aarch64/cpu/boot.rs
++++ 02_runtime_init/src/_arch/aarch64/cpu/boot.rs
+@@ -11,5 +11,23 @@
+ //!
+ //! crate::cpu::boot::arch_boot
+
++use crate::runtime_init;
++
+ // Assembly counterpart to this file.
+ global_asm!(include_str!("boot.s"));
++
++//--------------------------------------------------------------------------------------------------
++// Public Code
++//--------------------------------------------------------------------------------------------------
++
++/// The Rust entry of the `kernel` binary.
++///
++/// The function is called from the assembly `_start` function.
++///
++/// # Safety
++///
++/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
++#[no_mangle]
++pub unsafe fn _start_rust() -> ! {
++    runtime_init::runtime_init()
++}
 
+diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.s 02_runtime_init/src/_arch/aarch64/cpu/boot.s
+--- 01_wait_forever/src/_arch/aarch64/cpu/boot.s
++++ 02_runtime_init/src/_arch/aarch64/cpu/boot.s
+@@ -3,6 +3,12 @@
+ // Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+ //--------------------------------------------------------------------------------------------------
++// Definitions
++//--------------------------------------------------------------------------------------------------
++
++.equ _core_id_mask, 0b11
++
++//--------------------------------------------------------------------------------------------------
+ // Public Code
+ //--------------------------------------------------------------------------------------------------
+ .section .text._start
+@@ -11,6 +17,22 @@
+ // fn _start()
+ //------------------------------------------------------------------------------
  _start:
--1:  wfe         // Wait for event
--    b       1b  // In case an event happened, jump back to 1
-+    mrs     x1, mpidr_el1   // Read Multiprocessor Affinity Register
-+    and     x1, x1, #3      // Clear all bits except [1:0], which hold core id
-+    cbz     x1, 2f          // Jump to label 2 if we are core 0
-+1:  wfe                     // Wait for event
-+    b       1b              // In case an event happened, jump back to 1
-+2:                          // If we are here, we are core0
-+    ldr     x1, =_start     // Load address of function "_start()"
-+    mov     sp, x1          // Set start of stack to before our code, aka first
-+                            // address before "_start()"
-+    bl      runtime_init    // Jump to the "runtime_init()" kernel function
-+    b       1b              // We should never reach here. But just in case,
-+                            // park this core aswell
++	// Only proceed on the boot core. Park it otherwise.
++	mrs	x1, MPIDR_EL1
++	and	x1, x1, _core_id_mask
++	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
++	cmp	x1, x2
++	b.ne	1f
++
++	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
++
++	// Set the stack pointer.
++	ldr	x0, =__boot_core_stack_end_exclusive
++	mov	sp, x0
++
++	// Jump to Rust code.
++	b	_start_rust
++
+ 	// Infinitely wait for events (aka "park the core").
+ 1:	wfe
+ 	b	1b
 
 diff -uNr 01_wait_forever/src/_arch/aarch64/cpu.rs 02_runtime_init/src/_arch/aarch64/cpu.rs
 --- 01_wait_forever/src/_arch/aarch64/cpu.rs
 +++ 02_runtime_init/src/_arch/aarch64/cpu.rs
-@@ -0,0 +1,30 @@
+@@ -0,0 +1,26 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -88,6 +138,8 @@ diff -uNr 01_wait_forever/src/_arch/aarch64/cpu.rs 02_runtime_init/src/_arch/aar
 +//!
 +//! crate::cpu::arch_cpu
 +
++use cortex_a::asm;
++
 +//--------------------------------------------------------------------------------------------------
 +// Public Code
 +//--------------------------------------------------------------------------------------------------
@@ -95,21 +147,34 @@ diff -uNr 01_wait_forever/src/_arch/aarch64/cpu.rs 02_runtime_init/src/_arch/aar
 +/// Pause execution on the core.
 +#[inline(always)]
 +pub fn wait_forever() -> ! {
-+    unsafe {
-+        loop {
-+            #[rustfmt::skip]
-+            asm!(
-+                "wfe",
-+                options(nomem, nostack, preserves_flags)
-+            );
-+        }
++    loop {
++        asm::wfe()
 +    }
 +}
 
+diff -uNr 01_wait_forever/src/bsp/raspberrypi/cpu.rs 02_runtime_init/src/bsp/raspberrypi/cpu.rs
+--- 01_wait_forever/src/bsp/raspberrypi/cpu.rs
++++ 02_runtime_init/src/bsp/raspberrypi/cpu.rs
+@@ -0,0 +1,14 @@
++// SPDX-License-Identifier: MIT OR Apache-2.0
++//
++// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
++
++//! BSP Processor code.
++
++//--------------------------------------------------------------------------------------------------
++// Public Definitions
++//--------------------------------------------------------------------------------------------------
++
++/// Used by `arch` code to find the early boot core.
++#[no_mangle]
++#[link_section = ".text._start_arguments"]
++pub static BOOT_CORE_ID: u64 = 0;
+
 diff -uNr 01_wait_forever/src/bsp/raspberrypi/link.ld 02_runtime_init/src/bsp/raspberrypi/link.ld
 --- 01_wait_forever/src/bsp/raspberrypi/link.ld
 +++ 02_runtime_init/src/bsp/raspberrypi/link.ld
-@@ -11,6 +11,7 @@
+@@ -11,17 +11,52 @@
  PHDRS
  {
      segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
@@ -117,8 +182,13 @@ diff -uNr 01_wait_forever/src/bsp/raspberrypi/link.ld 02_runtime_init/src/bsp/ra
  }
 
  SECTIONS
-@@ -18,11 +19,30 @@
+ {
      . =  __rpi_load_addr;
++                                        /*   ^             */
++                                        /*   | stack       */
++                                        /*   | growth      */
++                                        /*   | direction   */
++   __boot_core_stack_end_exclusive = .; /*   |             */
 
      /***********************************************************************************************
 -    * Code
@@ -127,7 +197,16 @@ diff -uNr 01_wait_forever/src/bsp/raspberrypi/link.ld 02_runtime_init/src/bsp/ra
      .text :
      {
          KEEP(*(.text._start))
-         *(.text*)
++
++        /* Special constants (or statics in Rust speak) needed by _start().
++         *
++         * They are placed in close proximity to _start() from where they will be read. This ensures
++         * that position-independent, PC-relative loads can be emitted.
++         */
++        *(.text._start_arguments)
++
++        *(.text._start_rust) /* The Rust entry point */
++        *(.text*)            /* Everything else */
      } :segment_rx
 +
 +    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
@@ -195,11 +274,12 @@ diff -uNr 01_wait_forever/src/bsp/raspberrypi/memory.rs 02_runtime_init/src/bsp/
 diff -uNr 01_wait_forever/src/bsp/raspberrypi.rs 02_runtime_init/src/bsp/raspberrypi.rs
 --- 01_wait_forever/src/bsp/raspberrypi.rs
 +++ 02_runtime_init/src/bsp/raspberrypi.rs
-@@ -4,4 +4,4 @@
+@@ -4,4 +4,5 @@
 
  //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
 -// Coming soon.
++pub mod cpu;
 +pub mod memory;
 
 diff -uNr 01_wait_forever/src/cpu.rs 02_runtime_init/src/cpu.rs
@@ -223,18 +303,18 @@ diff -uNr 01_wait_forever/src/cpu.rs 02_runtime_init/src/cpu.rs
 diff -uNr 01_wait_forever/src/main.rs 02_runtime_init/src/main.rs
 --- 01_wait_forever/src/main.rs
 +++ 02_runtime_init/src/main.rs
-@@ -102,8 +102,10 @@
+@@ -102,14 +102,25 @@
  //!
- //! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
- //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.S`.
+ //! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
+ //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
 +//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
- //!
- //! [`cpu::boot::arch_boot::_start()`]: ../src/kernel/cpu/up/_arch/aarch64/cpu/boot.rs.html
++//!
 +//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
- #![feature(asm)]
+-#![feature(asm)]
  #![feature(global_asm)]
-@@ -112,6 +114,15 @@
+ #![no_main]
+ #![no_std]
 
  mod bsp;
  mod cpu;
@@ -306,7 +386,7 @@ diff -uNr 01_wait_forever/src/panic_wait.rs 02_runtime_init/src/panic_wait.rs
 diff -uNr 01_wait_forever/src/runtime_init.rs 02_runtime_init/src/runtime_init.rs
 --- 01_wait_forever/src/runtime_init.rs
 +++ 02_runtime_init/src/runtime_init.rs
-@@ -0,0 +1,38 @@
+@@ -0,0 +1,37 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -339,7 +419,6 @@ diff -uNr 01_wait_forever/src/runtime_init.rs 02_runtime_init/src/runtime_init.r
 +/// # Safety
 +///
 +/// - Only a single core must be active and running this function.
-+#[no_mangle]
 +pub unsafe fn runtime_init() -> ! {
 +    zero_bss();
 +
diff --git a/02_runtime_init/src/_arch/aarch64/cpu.rs b/02_runtime_init/src/_arch/aarch64/cpu.rs
index 4fd7e3132..5f97ea410 100644
--- a/02_runtime_init/src/_arch/aarch64/cpu.rs
+++ b/02_runtime_init/src/_arch/aarch64/cpu.rs
@@ -11,6 +11,8 @@
 //!
 //! crate::cpu::arch_cpu
 
+use cortex_a::asm;
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -18,13 +20,7 @@
 /// Pause execution on the core.
 #[inline(always)]
 pub fn wait_forever() -> ! {
-    unsafe {
-        loop {
-            #[rustfmt::skip]
-            asm!(
-                "wfe",
-                options(nomem, nostack, preserves_flags)
-            );
-        }
+    loop {
+        asm::wfe()
     }
 }
diff --git a/02_runtime_init/src/_arch/aarch64/cpu/boot.S b/02_runtime_init/src/_arch/aarch64/cpu/boot.S
deleted file mode 100644
index 449cf5027..000000000
--- a/02_runtime_init/src/_arch/aarch64/cpu/boot.S
+++ /dev/null
@@ -1,21 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-.section ".text._start"
-
-.global _start
-
-_start:
-    mrs     x1, mpidr_el1   // Read Multiprocessor Affinity Register
-    and     x1, x1, #3      // Clear all bits except [1:0], which hold core id
-    cbz     x1, 2f          // Jump to label 2 if we are core 0
-1:  wfe                     // Wait for event
-    b       1b              // In case an event happened, jump back to 1
-2:                          // If we are here, we are core0
-    ldr     x1, =_start     // Load address of function "_start()"
-    mov     sp, x1          // Set start of stack to before our code, aka first
-                            // address before "_start()"
-    bl      runtime_init    // Jump to the "runtime_init()" kernel function
-    b       1b              // We should never reach here. But just in case,
-                            // park this core aswell
diff --git a/02_runtime_init/src/_arch/aarch64/cpu/boot.rs b/02_runtime_init/src/_arch/aarch64/cpu/boot.rs
index c3c325d3a..c85bb94b8 100644
--- a/02_runtime_init/src/_arch/aarch64/cpu/boot.rs
+++ b/02_runtime_init/src/_arch/aarch64/cpu/boot.rs
@@ -11,5 +11,23 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-// Assembly counterpart to this file. Includes function _start().
-global_asm!(include_str!("boot.S"));
+use crate::runtime_init;
+
+// Assembly counterpart to this file.
+global_asm!(include_str!("boot.s"));
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The Rust entry of the `kernel` binary.
+///
+/// The function is called from the assembly `_start` function.
+///
+/// # Safety
+///
+/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
+#[no_mangle]
+pub unsafe fn _start_rust() -> ! {
+    runtime_init::runtime_init()
+}
diff --git a/02_runtime_init/src/_arch/aarch64/cpu/boot.s b/02_runtime_init/src/_arch/aarch64/cpu/boot.s
new file mode 100644
index 000000000..ad4a26892
--- /dev/null
+++ b/02_runtime_init/src/_arch/aarch64/cpu/boot.s
@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//--------------------------------------------------------------------------------------------------
+// Definitions
+//--------------------------------------------------------------------------------------------------
+
+.equ _core_id_mask, 0b11
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+.section .text._start
+
+//------------------------------------------------------------------------------
+// fn _start()
+//------------------------------------------------------------------------------
+_start:
+	// Only proceed on the boot core. Park it otherwise.
+	mrs	x1, MPIDR_EL1
+	and	x1, x1, _core_id_mask
+	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
+	cmp	x1, x2
+	b.ne	1f
+
+	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
+
+	// Set the stack pointer.
+	ldr	x0, =__boot_core_stack_end_exclusive
+	mov	sp, x0
+
+	// Jump to Rust code.
+	b	_start_rust
+
+	// Infinitely wait for events (aka "park the core").
+1:	wfe
+	b	1b
+
+.size	_start, . - _start
+.type	_start, function
+.global	_start
diff --git a/02_runtime_init/src/bsp/raspberrypi.rs b/02_runtime_init/src/bsp/raspberrypi.rs
index f9bd5b888..10535d7b8 100644
--- a/02_runtime_init/src/bsp/raspberrypi.rs
+++ b/02_runtime_init/src/bsp/raspberrypi.rs
@@ -4,4 +4,5 @@
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
+pub mod cpu;
 pub mod memory;
diff --git a/04_zero_overhead_abstraction/src/bsp/raspberrypi/cpu.rs b/02_runtime_init/src/bsp/raspberrypi/cpu.rs
similarity index 82%
rename from 04_zero_overhead_abstraction/src/bsp/raspberrypi/cpu.rs
rename to 02_runtime_init/src/bsp/raspberrypi/cpu.rs
index 16ab927d7..d09ff9568 100644
--- a/04_zero_overhead_abstraction/src/bsp/raspberrypi/cpu.rs
+++ b/02_runtime_init/src/bsp/raspberrypi/cpu.rs
@@ -9,4 +9,6 @@
 //--------------------------------------------------------------------------------------------------
 
 /// Used by `arch` code to find the early boot core.
-pub const BOOT_CORE_ID: u64 = 0;
+#[no_mangle]
+#[link_section = ".text._start_arguments"]
+pub static BOOT_CORE_ID: u64 = 0;
diff --git a/02_runtime_init/src/bsp/raspberrypi/link.ld b/02_runtime_init/src/bsp/raspberrypi/link.ld
index acb7fe28b..3b73b3c7e 100644
--- a/02_runtime_init/src/bsp/raspberrypi/link.ld
+++ b/02_runtime_init/src/bsp/raspberrypi/link.ld
@@ -17,6 +17,11 @@ PHDRS
 SECTIONS
 {
     . =  __rpi_load_addr;
+                                        /*   ^             */
+                                        /*   | stack       */
+                                        /*   | growth      */
+                                        /*   | direction   */
+   __boot_core_stack_end_exclusive = .; /*   |             */
 
     /***********************************************************************************************
     * Code + RO Data + Global Offset Table
@@ -24,7 +29,16 @@ SECTIONS
     .text :
     {
         KEEP(*(.text._start))
-        *(.text*)
+
+        /* Special constants (or statics in Rust speak) needed by _start().
+         *
+         * They are placed in close proximity to _start() from where they will be read. This ensures
+         * that position-independent, PC-relative loads can be emitted.
+         */
+        *(.text._start_arguments)
+
+        *(.text._start_rust) /* The Rust entry point */
+        *(.text*)            /* Everything else */
     } :segment_rx
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
diff --git a/02_runtime_init/src/main.rs b/02_runtime_init/src/main.rs
index fd9c36bc3..faad6b091 100644
--- a/02_runtime_init/src/main.rs
+++ b/02_runtime_init/src/main.rs
@@ -100,14 +100,12 @@
 //!
 //! # Boot flow
 //!
-//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
-//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.S`.
+//! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
 //! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
 //!
-//! [`cpu::boot::arch_boot::_start()`]: ../src/kernel/cpu/up/_arch/aarch64/cpu/boot.rs.html
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
-#![feature(asm)]
 #![feature(global_asm)]
 #![no_main]
 #![no_std]
diff --git a/02_runtime_init/src/runtime_init.rs b/02_runtime_init/src/runtime_init.rs
index 068dde843..ee0946863 100644
--- a/02_runtime_init/src/runtime_init.rs
+++ b/02_runtime_init/src/runtime_init.rs
@@ -30,7 +30,6 @@ unsafe fn zero_bss() {
 /// # Safety
 ///
 /// - Only a single core must be active and running this function.
-#[no_mangle]
 pub unsafe fn runtime_init() -> ! {
     zero_bss();
 
diff --git a/03_hacky_hello_world/Cargo.lock b/03_hacky_hello_world/Cargo.lock
index 3e9c31110..3b926a347 100644
--- a/03_hacky_hello_world/Cargo.lock
+++ b/03_hacky_hello_world/Cargo.lock
@@ -1,6 +1,34 @@
 # This file is automatically @generated by Cargo.
 # It is not intended for manual editing.
+version = 3
+
+[[package]]
+name = "cortex-a"
+version = "5.1.6"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "ecefc30975eb87afc5a810d4b2305c0ec29e607ea97e51b2ecd80766e9268d28"
+dependencies = [
+ "register",
+]
+
 [[package]]
 name = "kernel"
 version = "0.1.0"
+dependencies = [
+ "cortex-a",
+]
 
+[[package]]
+name = "register"
+version = "1.0.2"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "f4a247de29ab7cc8f5006cfe775c4a81c704f9914c5e2a79696862e643135433"
+dependencies = [
+ "tock-registers",
+]
+
+[[package]]
+name = "tock-registers"
+version = "0.6.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "f521a79accce68c417c9c77ce22108056b626126da1932f7e2e9b5bbffee0cea"
diff --git a/03_hacky_hello_world/Cargo.toml b/03_hacky_hello_world/Cargo.toml
index a75809963..5deb70108 100644
--- a/03_hacky_hello_world/Cargo.toml
+++ b/03_hacky_hello_world/Cargo.toml
@@ -17,3 +17,8 @@ bsp_rpi4 = []
 ##--------------------------------------------------------------------------------------------------
 
 [dependencies]
+
+# Platform specific dependencies
+[target.'cfg(target_arch = "aarch64")'.dependencies]
+cortex-a = { version = "5.x.x" }
+
diff --git a/03_hacky_hello_world/README.md b/03_hacky_hello_world/README.md
index 753aa0487..a002a6198 100644
--- a/03_hacky_hello_world/README.md
+++ b/03_hacky_hello_world/README.md
@@ -4,8 +4,8 @@
 
 - Introducing global `print!()` macros to enable "printf debugging" at the earliest.
 - To keep tutorial length reasonable, printing functions for now "abuse" a QEMU property that lets
-  us use the RPi's `UART` without setting it up properly.
-- Using  the real hardware `UART` is enabled step-by-step in following tutorials.
+  us use the Raspberry's `UART` without setting it up properly.
+- Using the real hardware `UART` is enabled step-by-step in following tutorials.
 
 ## Notable additions
 
@@ -28,6 +28,15 @@ Kernel panic: Stopping here.
 ## Diff to previous
 ```diff
 
+diff -uNr 02_runtime_init/Cargo.toml 03_hacky_hello_world/Cargo.toml
+--- 02_runtime_init/Cargo.toml
++++ 03_hacky_hello_world/Cargo.toml
+@@ -21,3 +21,4 @@
+ # Platform specific dependencies
+ [target.'cfg(target_arch = "aarch64")'.dependencies]
+ cortex-a = { version = "5.x.x" }
++
+
 diff -uNr 02_runtime_init/Makefile 03_hacky_hello_world/Makefile
 --- 02_runtime_init/Makefile
 +++ 03_hacky_hello_world/Makefile
@@ -105,11 +114,12 @@ diff -uNr 02_runtime_init/src/bsp/raspberrypi/console.rs 03_hacky_hello_world/sr
 diff -uNr 02_runtime_init/src/bsp/raspberrypi.rs 03_hacky_hello_world/src/bsp/raspberrypi.rs
 --- 02_runtime_init/src/bsp/raspberrypi.rs
 +++ 03_hacky_hello_world/src/bsp/raspberrypi.rs
-@@ -4,4 +4,5 @@
+@@ -4,5 +4,6 @@
 
  //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
 +pub mod console;
+ pub mod cpu;
  pub mod memory;
 
 diff -uNr 02_runtime_init/src/console.rs 03_hacky_hello_world/src/console.rs
@@ -139,19 +149,10 @@ diff -uNr 02_runtime_init/src/console.rs 03_hacky_hello_world/src/console.rs
 diff -uNr 02_runtime_init/src/main.rs 03_hacky_hello_world/src/main.rs
 --- 02_runtime_init/src/main.rs
 +++ 03_hacky_hello_world/src/main.rs
-@@ -101,21 +101,25 @@
- //! # Boot flow
- //!
- //! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
--//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.S`.
-+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
- //! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
+@@ -106,14 +106,18 @@
  //!
--//! [`cpu::boot::arch_boot::_start()`]: ../src/kernel/cpu/up/_arch/aarch64/cpu/boot.rs.html
-+//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
  //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
- #![feature(asm)]
 +#![feature(format_args_nl)]
  #![feature(global_asm)]
 +#![feature(panic_info_message)]
@@ -167,7 +168,7 @@ diff -uNr 02_runtime_init/src/main.rs 03_hacky_hello_world/src/main.rs
  mod runtime_init;
 
  /// Early init code.
-@@ -124,5 +128,7 @@
+@@ -122,5 +126,7 @@
  ///
  /// - Only a single core must be active and running this function.
  unsafe fn kernel_init() -> ! {
diff --git a/03_hacky_hello_world/src/_arch/aarch64/cpu.rs b/03_hacky_hello_world/src/_arch/aarch64/cpu.rs
index 4fd7e3132..5f97ea410 100644
--- a/03_hacky_hello_world/src/_arch/aarch64/cpu.rs
+++ b/03_hacky_hello_world/src/_arch/aarch64/cpu.rs
@@ -11,6 +11,8 @@
 //!
 //! crate::cpu::arch_cpu
 
+use cortex_a::asm;
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -18,13 +20,7 @@
 /// Pause execution on the core.
 #[inline(always)]
 pub fn wait_forever() -> ! {
-    unsafe {
-        loop {
-            #[rustfmt::skip]
-            asm!(
-                "wfe",
-                options(nomem, nostack, preserves_flags)
-            );
-        }
+    loop {
+        asm::wfe()
     }
 }
diff --git a/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.S b/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.S
deleted file mode 100644
index 449cf5027..000000000
--- a/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.S
+++ /dev/null
@@ -1,21 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-.section ".text._start"
-
-.global _start
-
-_start:
-    mrs     x1, mpidr_el1   // Read Multiprocessor Affinity Register
-    and     x1, x1, #3      // Clear all bits except [1:0], which hold core id
-    cbz     x1, 2f          // Jump to label 2 if we are core 0
-1:  wfe                     // Wait for event
-    b       1b              // In case an event happened, jump back to 1
-2:                          // If we are here, we are core0
-    ldr     x1, =_start     // Load address of function "_start()"
-    mov     sp, x1          // Set start of stack to before our code, aka first
-                            // address before "_start()"
-    bl      runtime_init    // Jump to the "runtime_init()" kernel function
-    b       1b              // We should never reach here. But just in case,
-                            // park this core aswell
diff --git a/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.rs b/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.rs
index c3c325d3a..c85bb94b8 100644
--- a/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.rs
+++ b/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.rs
@@ -11,5 +11,23 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-// Assembly counterpart to this file. Includes function _start().
-global_asm!(include_str!("boot.S"));
+use crate::runtime_init;
+
+// Assembly counterpart to this file.
+global_asm!(include_str!("boot.s"));
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The Rust entry of the `kernel` binary.
+///
+/// The function is called from the assembly `_start` function.
+///
+/// # Safety
+///
+/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
+#[no_mangle]
+pub unsafe fn _start_rust() -> ! {
+    runtime_init::runtime_init()
+}
diff --git a/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.s b/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.s
new file mode 100644
index 000000000..ad4a26892
--- /dev/null
+++ b/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.s
@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//--------------------------------------------------------------------------------------------------
+// Definitions
+//--------------------------------------------------------------------------------------------------
+
+.equ _core_id_mask, 0b11
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+.section .text._start
+
+//------------------------------------------------------------------------------
+// fn _start()
+//------------------------------------------------------------------------------
+_start:
+	// Only proceed on the boot core. Park it otherwise.
+	mrs	x1, MPIDR_EL1
+	and	x1, x1, _core_id_mask
+	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
+	cmp	x1, x2
+	b.ne	1f
+
+	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
+
+	// Set the stack pointer.
+	ldr	x0, =__boot_core_stack_end_exclusive
+	mov	sp, x0
+
+	// Jump to Rust code.
+	b	_start_rust
+
+	// Infinitely wait for events (aka "park the core").
+1:	wfe
+	b	1b
+
+.size	_start, . - _start
+.type	_start, function
+.global	_start
diff --git a/03_hacky_hello_world/src/bsp/raspberrypi.rs b/03_hacky_hello_world/src/bsp/raspberrypi.rs
index ac9d53e95..fdb7551a1 100644
--- a/03_hacky_hello_world/src/bsp/raspberrypi.rs
+++ b/03_hacky_hello_world/src/bsp/raspberrypi.rs
@@ -5,4 +5,5 @@
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
 pub mod console;
+pub mod cpu;
 pub mod memory;
diff --git a/04_zero_overhead_abstraction/src/cpu/smp.rs b/03_hacky_hello_world/src/bsp/raspberrypi/cpu.rs
similarity index 63%
rename from 04_zero_overhead_abstraction/src/cpu/smp.rs
rename to 03_hacky_hello_world/src/bsp/raspberrypi/cpu.rs
index 38230ce1e..d09ff9568 100644
--- a/04_zero_overhead_abstraction/src/cpu/smp.rs
+++ b/03_hacky_hello_world/src/bsp/raspberrypi/cpu.rs
@@ -2,13 +2,13 @@
 //
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-//! Symmetric multiprocessing.
-
-#[cfg(target_arch = "aarch64")]
-#[path = "../_arch/aarch64/cpu/smp.rs"]
-mod arch_smp;
+//! BSP Processor code.
 
 //--------------------------------------------------------------------------------------------------
-// Architectural Public Reexports
+// Public Definitions
 //--------------------------------------------------------------------------------------------------
-pub use arch_smp::core_id;
+
+/// Used by `arch` code to find the early boot core.
+#[no_mangle]
+#[link_section = ".text._start_arguments"]
+pub static BOOT_CORE_ID: u64 = 0;
diff --git a/03_hacky_hello_world/src/bsp/raspberrypi/link.ld b/03_hacky_hello_world/src/bsp/raspberrypi/link.ld
index acb7fe28b..3b73b3c7e 100644
--- a/03_hacky_hello_world/src/bsp/raspberrypi/link.ld
+++ b/03_hacky_hello_world/src/bsp/raspberrypi/link.ld
@@ -17,6 +17,11 @@ PHDRS
 SECTIONS
 {
     . =  __rpi_load_addr;
+                                        /*   ^             */
+                                        /*   | stack       */
+                                        /*   | growth      */
+                                        /*   | direction   */
+   __boot_core_stack_end_exclusive = .; /*   |             */
 
     /***********************************************************************************************
     * Code + RO Data + Global Offset Table
@@ -24,7 +29,16 @@ SECTIONS
     .text :
     {
         KEEP(*(.text._start))
-        *(.text*)
+
+        /* Special constants (or statics in Rust speak) needed by _start().
+         *
+         * They are placed in close proximity to _start() from where they will be read. This ensures
+         * that position-independent, PC-relative loads can be emitted.
+         */
+        *(.text._start_arguments)
+
+        *(.text._start_rust) /* The Rust entry point */
+        *(.text*)            /* Everything else */
     } :segment_rx
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
diff --git a/03_hacky_hello_world/src/main.rs b/03_hacky_hello_world/src/main.rs
index 0815d5e21..bc290ddde 100644
--- a/03_hacky_hello_world/src/main.rs
+++ b/03_hacky_hello_world/src/main.rs
@@ -100,14 +100,12 @@
 //!
 //! # Boot flow
 //!
-//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
-//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
+//! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
 //! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
 //!
-//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
-#![feature(asm)]
 #![feature(format_args_nl)]
 #![feature(global_asm)]
 #![feature(panic_info_message)]
diff --git a/03_hacky_hello_world/src/runtime_init.rs b/03_hacky_hello_world/src/runtime_init.rs
index 068dde843..ee0946863 100644
--- a/03_hacky_hello_world/src/runtime_init.rs
+++ b/03_hacky_hello_world/src/runtime_init.rs
@@ -30,7 +30,6 @@ unsafe fn zero_bss() {
 /// # Safety
 ///
 /// - Only a single core must be active and running this function.
-#[no_mangle]
 pub unsafe fn runtime_init() -> ! {
     zero_bss();
 
diff --git a/04_zero_overhead_abstraction/.vscode/settings.json b/04_zero_overhead_abstraction/.vscode/settings.json
deleted file mode 100644
index a0d6a9202..000000000
--- a/04_zero_overhead_abstraction/.vscode/settings.json
+++ /dev/null
@@ -1,7 +0,0 @@
-{
-  "editor.formatOnSave": true,
-  "editor.rulers": [100],
-  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
-  "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"]
-}
diff --git a/04_zero_overhead_abstraction/Cargo.lock b/04_zero_overhead_abstraction/Cargo.lock
deleted file mode 100644
index 3b926a347..000000000
--- a/04_zero_overhead_abstraction/Cargo.lock
+++ /dev/null
@@ -1,34 +0,0 @@
-# This file is automatically @generated by Cargo.
-# It is not intended for manual editing.
-version = 3
-
-[[package]]
-name = "cortex-a"
-version = "5.1.6"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "ecefc30975eb87afc5a810d4b2305c0ec29e607ea97e51b2ecd80766e9268d28"
-dependencies = [
- "register",
-]
-
-[[package]]
-name = "kernel"
-version = "0.1.0"
-dependencies = [
- "cortex-a",
-]
-
-[[package]]
-name = "register"
-version = "1.0.2"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f4a247de29ab7cc8f5006cfe775c4a81c704f9914c5e2a79696862e643135433"
-dependencies = [
- "tock-registers",
-]
-
-[[package]]
-name = "tock-registers"
-version = "0.6.0"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f521a79accce68c417c9c77ce22108056b626126da1932f7e2e9b5bbffee0cea"
diff --git a/04_zero_overhead_abstraction/Cargo.toml b/04_zero_overhead_abstraction/Cargo.toml
deleted file mode 100644
index 5deb70108..000000000
--- a/04_zero_overhead_abstraction/Cargo.toml
+++ /dev/null
@@ -1,24 +0,0 @@
-[package]
-name = "kernel"
-version = "0.1.0"
-authors = ["Andre Richter <andre.o.richter@gmail.com>"]
-edition = "2018"
-
-[profile.release]
-lto = true
-
-[features]
-default = []
-bsp_rpi3 = []
-bsp_rpi4 = []
-
-##--------------------------------------------------------------------------------------------------
-## Dependencies
-##--------------------------------------------------------------------------------------------------
-
-[dependencies]
-
-# Platform specific dependencies
-[target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "5.x.x" }
-
diff --git a/04_zero_overhead_abstraction/Makefile b/04_zero_overhead_abstraction/Makefile
deleted file mode 100644
index 2ed82a5f1..000000000
--- a/04_zero_overhead_abstraction/Makefile
+++ /dev/null
@@ -1,115 +0,0 @@
-## SPDX-License-Identifier: MIT OR Apache-2.0
-##
-## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-include ../utils/color.mk.in
-
-# Default to the RPi3
-BSP ?= rpi3
-
-# BSP-specific arguments
-ifeq ($(BSP),rpi3)
-    TARGET            = aarch64-unknown-none-softfloat
-    KERNEL_BIN        = kernel8.img
-    QEMU_BINARY       = qemu-system-aarch64
-    QEMU_MACHINE_TYPE = raspi3
-    QEMU_RELEASE_ARGS = -serial stdio -display none
-    OBJDUMP_BINARY    = aarch64-none-elf-objdump
-    NM_BINARY         = aarch64-none-elf-nm
-    READELF_BINARY    = aarch64-none-elf-readelf
-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
-    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
-else ifeq ($(BSP),rpi4)
-    TARGET            = aarch64-unknown-none-softfloat
-    KERNEL_BIN        = kernel8.img
-    QEMU_BINARY       = qemu-system-aarch64
-    QEMU_MACHINE_TYPE =
-    QEMU_RELEASE_ARGS = -serial stdio -display none
-    OBJDUMP_BINARY    = aarch64-none-elf-objdump
-    NM_BINARY         = aarch64-none-elf-nm
-    READELF_BINARY    = aarch64-none-elf-readelf
-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
-    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
-endif
-
-# Export for build.rs
-export LINKER_FILE
-
-QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
-
-RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
-RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
-
-FEATURES      = --features bsp_$(BSP)
-COMPILER_ARGS = --target=$(TARGET) \
-    $(FEATURES)                    \
-    --release
-
-RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
-DOC_CMD     = cargo doc $(COMPILER_ARGS)
-CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
-CHECK_CMD   = cargo check $(COMPILER_ARGS)
-OBJCOPY_CMD = rust-objcopy \
-    --strip-all            \
-    -O binary
-
-KERNEL_ELF = target/$(TARGET)/release/kernel
-
-DOCKER_IMAGE         = rustembedded/osdev-utils
-DOCKER_CMD           = docker run --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
-DOCKER_CMD_INTERACT  = $(DOCKER_CMD) -i -t
-
-DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
-DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
-
-EXEC_QEMU = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
-
-.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu clippy clean readelf objdump nm check
-
-all: $(KERNEL_BIN)
-
-$(KERNEL_ELF):
-	$(call colorecho, "\nCompiling kernel - $(BSP)")
-	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
-
-$(KERNEL_BIN): $(KERNEL_ELF)
-	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
-
-doc:
-	$(call colorecho, "\nGenerating docs")
-	@$(DOC_CMD) --document-private-items --open
-
-ifeq ($(QEMU_MACHINE_TYPE),)
-qemu:
-	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
-else
-qemu: $(KERNEL_BIN)
-	$(call colorecho, "\nLaunching QEMU")
-	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
-endif
-
-clippy:
-	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
-
-clean:
-	rm -rf target $(KERNEL_BIN)
-
-readelf: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching readelf")
-	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
-
-objdump: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching objdump")
-	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
-                --section .text   \
-                --section .rodata \
-                --section .got    \
-                $(KERNEL_ELF) | rustfilt
-
-nm: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching nm")
-	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
-
-# For rust-analyzer
-check:
-	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
diff --git a/04_zero_overhead_abstraction/README.md b/04_zero_overhead_abstraction/README.md
deleted file mode 100644
index 69db5c72b..000000000
--- a/04_zero_overhead_abstraction/README.md
+++ /dev/null
@@ -1,301 +0,0 @@
-# Tutorial 04 - Zero Overhead Abstraction
-
-## tl;dr
-
-- All hand-written assembly is replaced by Rust code from the [cortex-a] crate, which provides
-  zero-overhead abstractions and wraps the `unsafe` parts.
-
-[cortex-a]: https://github.com/rust-embedded/cortex-a
-
-## Diff to previous
-```diff
-
-diff -uNr 03_hacky_hello_world/Cargo.toml 04_zero_overhead_abstraction/Cargo.toml
---- 03_hacky_hello_world/Cargo.toml
-+++ 04_zero_overhead_abstraction/Cargo.toml
-@@ -17,3 +17,8 @@
- ##--------------------------------------------------------------------------------------------------
-
- [dependencies]
-+
-+# Platform specific dependencies
-+[target.'cfg(target_arch = "aarch64")'.dependencies]
-+cortex-a = { version = "5.x.x" }
-+
-
-diff -uNr 03_hacky_hello_world/src/_arch/aarch64/cpu/boot.rs 04_zero_overhead_abstraction/src/_arch/aarch64/cpu/boot.rs
---- 03_hacky_hello_world/src/_arch/aarch64/cpu/boot.rs
-+++ 04_zero_overhead_abstraction/src/_arch/aarch64/cpu/boot.rs
-@@ -11,5 +11,31 @@
- //!
- //! crate::cpu::boot::arch_boot
-
--// Assembly counterpart to this file. Includes function _start().
--global_asm!(include_str!("boot.S"));
-+use crate::{bsp, cpu};
-+use cortex_a::regs::*;
-+
-+//--------------------------------------------------------------------------------------------------
-+// Public Code
-+//--------------------------------------------------------------------------------------------------
-+
-+/// The entry of the `kernel` binary.
-+///
-+/// The function must be named `_start`, because the linker is looking for this exact name.
-+///
-+/// # Safety
-+///
-+/// - Linker script must ensure to place this function where it is expected by the target machine.
-+/// - We have to hope that the compiler omits any stack pointer usage before the stack pointer is
-+///   actually set (`SP.set()`).
-+#[no_mangle]
-+pub unsafe fn _start() -> ! {
-+    use crate::runtime_init;
-+
-+    if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
-+        SP.set(bsp::memory::boot_core_stack_end() as u64);
-+        runtime_init::runtime_init()
-+    } else {
-+        // If not core0, infinitely wait for events.
-+        cpu::wait_forever()
-+    }
-+}
-
-diff -uNr 03_hacky_hello_world/src/_arch/aarch64/cpu/boot.S 04_zero_overhead_abstraction/src/_arch/aarch64/cpu/boot.S
---- 03_hacky_hello_world/src/_arch/aarch64/cpu/boot.S
-+++ 04_zero_overhead_abstraction/src/_arch/aarch64/cpu/boot.S
-@@ -1,21 +0,0 @@
--// SPDX-License-Identifier: MIT OR Apache-2.0
--//
--// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
--
--.section ".text._start"
--
--.global _start
--
--_start:
--    mrs     x1, mpidr_el1   // Read Multiprocessor Affinity Register
--    and     x1, x1, #3      // Clear all bits except [1:0], which hold core id
--    cbz     x1, 2f          // Jump to label 2 if we are core 0
--1:  wfe                     // Wait for event
--    b       1b              // In case an event happened, jump back to 1
--2:                          // If we are here, we are core0
--    ldr     x1, =_start     // Load address of function "_start()"
--    mov     sp, x1          // Set start of stack to before our code, aka first
--                            // address before "_start()"
--    bl      runtime_init    // Jump to the "runtime_init()" kernel function
--    b       1b              // We should never reach here. But just in case,
--                            // park this core aswell
-
-diff -uNr 03_hacky_hello_world/src/_arch/aarch64/cpu/smp.rs 04_zero_overhead_abstraction/src/_arch/aarch64/cpu/smp.rs
---- 03_hacky_hello_world/src/_arch/aarch64/cpu/smp.rs
-+++ 04_zero_overhead_abstraction/src/_arch/aarch64/cpu/smp.rs
-@@ -0,0 +1,29 @@
-+// SPDX-License-Identifier: MIT OR Apache-2.0
-+//
-+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-+
-+//! Architectural symmetric multiprocessing.
-+//!
-+//! # Orientation
-+//!
-+//! Since arch modules are imported into generic modules using the path attribute, the path of this
-+//! file is:
-+//!
-+//! crate::cpu::smp::arch_smp
-+
-+use cortex_a::regs::*;
-+
-+//--------------------------------------------------------------------------------------------------
-+// Public Code
-+//--------------------------------------------------------------------------------------------------
-+
-+/// Return the executing core's id.
-+#[inline(always)]
-+pub fn core_id<T>() -> T
-+where
-+    T: From<u8>,
-+{
-+    const CORE_MASK: u64 = 0b11;
-+
-+    T::from((MPIDR_EL1.get() & CORE_MASK) as u8)
-+}
-
-diff -uNr 03_hacky_hello_world/src/_arch/aarch64/cpu.rs 04_zero_overhead_abstraction/src/_arch/aarch64/cpu.rs
---- 03_hacky_hello_world/src/_arch/aarch64/cpu.rs
-+++ 04_zero_overhead_abstraction/src/_arch/aarch64/cpu.rs
-@@ -11,6 +11,8 @@
- //!
- //! crate::cpu::arch_cpu
-
-+use cortex_a::asm;
-+
- //--------------------------------------------------------------------------------------------------
- // Public Code
- //--------------------------------------------------------------------------------------------------
-@@ -18,13 +20,7 @@
- /// Pause execution on the core.
- #[inline(always)]
- pub fn wait_forever() -> ! {
--    unsafe {
--        loop {
--            #[rustfmt::skip]
--            asm!(
--                "wfe",
--                options(nomem, nostack, preserves_flags)
--            );
--        }
-+    loop {
-+        asm::wfe()
-     }
- }
-
-diff -uNr 03_hacky_hello_world/src/bsp/raspberrypi/cpu.rs 04_zero_overhead_abstraction/src/bsp/raspberrypi/cpu.rs
---- 03_hacky_hello_world/src/bsp/raspberrypi/cpu.rs
-+++ 04_zero_overhead_abstraction/src/bsp/raspberrypi/cpu.rs
-@@ -0,0 +1,12 @@
-+// SPDX-License-Identifier: MIT OR Apache-2.0
-+//
-+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-+
-+//! BSP Processor code.
-+
-+//--------------------------------------------------------------------------------------------------
-+// Public Definitions
-+//--------------------------------------------------------------------------------------------------
-+
-+/// Used by `arch` code to find the early boot core.
-+pub const BOOT_CORE_ID: u64 = 0;
-
-diff -uNr 03_hacky_hello_world/src/bsp/raspberrypi/link.ld 04_zero_overhead_abstraction/src/bsp/raspberrypi/link.ld
---- 03_hacky_hello_world/src/bsp/raspberrypi/link.ld
-+++ 04_zero_overhead_abstraction/src/bsp/raspberrypi/link.ld
-@@ -21,6 +21,7 @@
-     /***********************************************************************************************
-     * Code + RO Data + Global Offset Table
-     ***********************************************************************************************/
-+    __rx_start = .;
-     .text :
-     {
-         KEEP(*(.text._start))
-
-diff -uNr 03_hacky_hello_world/src/bsp/raspberrypi/memory.rs 04_zero_overhead_abstraction/src/bsp/raspberrypi/memory.rs
---- 03_hacky_hello_world/src/bsp/raspberrypi/memory.rs
-+++ 04_zero_overhead_abstraction/src/bsp/raspberrypi/memory.rs
-@@ -12,14 +12,36 @@
-
- // Symbols from the linker script.
- extern "Rust" {
-+    static __rx_start: UnsafeCell<()>;
-+
-     static __bss_start: UnsafeCell<u64>;
-     static __bss_end_inclusive: UnsafeCell<u64>;
- }
-
- //--------------------------------------------------------------------------------------------------
-+// Private Code
-+//--------------------------------------------------------------------------------------------------
-+
-+/// Start address of the Read+Execute (RX) range.
-+///
-+/// # Safety
-+///
-+/// - Value is provided by the linker script and must be trusted as-is.
-+#[inline(always)]
-+fn rx_start() -> usize {
-+    unsafe { __rx_start.get() as usize }
-+}
-+
-+//--------------------------------------------------------------------------------------------------
- // Public Code
- //--------------------------------------------------------------------------------------------------
-
-+/// Exclusive end address of the boot core's stack.
-+#[inline(always)]
-+pub fn boot_core_stack_end() -> usize {
-+    rx_start()
-+}
-+
- /// Return the inclusive range spanning the .bss section.
- ///
- /// # Safety
-
-diff -uNr 03_hacky_hello_world/src/bsp/raspberrypi.rs 04_zero_overhead_abstraction/src/bsp/raspberrypi.rs
---- 03_hacky_hello_world/src/bsp/raspberrypi.rs
-+++ 04_zero_overhead_abstraction/src/bsp/raspberrypi.rs
-@@ -5,4 +5,5 @@
- //! Top-level BSP file for the Raspberry Pi 3 and 4.
-
- pub mod console;
-+pub mod cpu;
- pub mod memory;
-
-diff -uNr 03_hacky_hello_world/src/cpu/smp.rs 04_zero_overhead_abstraction/src/cpu/smp.rs
---- 03_hacky_hello_world/src/cpu/smp.rs
-+++ 04_zero_overhead_abstraction/src/cpu/smp.rs
-@@ -0,0 +1,14 @@
-+// SPDX-License-Identifier: MIT OR Apache-2.0
-+//
-+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-+
-+//! Symmetric multiprocessing.
-+
-+#[cfg(target_arch = "aarch64")]
-+#[path = "../_arch/aarch64/cpu/smp.rs"]
-+mod arch_smp;
-+
-+//--------------------------------------------------------------------------------------------------
-+// Architectural Public Reexports
-+//--------------------------------------------------------------------------------------------------
-+pub use arch_smp::core_id;
-
-diff -uNr 03_hacky_hello_world/src/cpu.rs 04_zero_overhead_abstraction/src/cpu.rs
---- 03_hacky_hello_world/src/cpu.rs
-+++ 04_zero_overhead_abstraction/src/cpu.rs
-@@ -10,6 +10,8 @@
-
- mod boot;
-
-+pub mod smp;
-+
- //--------------------------------------------------------------------------------------------------
- // Architectural Public Reexports
- //--------------------------------------------------------------------------------------------------
-
-diff -uNr 03_hacky_hello_world/src/main.rs 04_zero_overhead_abstraction/src/main.rs
---- 03_hacky_hello_world/src/main.rs
-+++ 04_zero_overhead_abstraction/src/main.rs
-@@ -107,9 +107,7 @@
- //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
- //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
-
--#![feature(asm)]
- #![feature(format_args_nl)]
--#![feature(global_asm)]
- #![feature(panic_info_message)]
- #![no_main]
- #![no_std]
-@@ -128,7 +126,8 @@
- ///
- /// - Only a single core must be active and running this function.
- unsafe fn kernel_init() -> ! {
--    println!("[0] Hello from Rust!");
-+    println!("[0] Hello from pure Rust!");
-
--    panic!("Stopping here.")
-+    println!("[1] Stopping here.");
-+    cpu::wait_forever()
- }
-
-diff -uNr 03_hacky_hello_world/src/runtime_init.rs 04_zero_overhead_abstraction/src/runtime_init.rs
---- 03_hacky_hello_world/src/runtime_init.rs
-+++ 04_zero_overhead_abstraction/src/runtime_init.rs
-@@ -30,7 +30,6 @@
- /// # Safety
- ///
- /// - Only a single core must be active and running this function.
--#[no_mangle]
- pub unsafe fn runtime_init() -> ! {
-     zero_bss();
-
-```
diff --git a/04_zero_overhead_abstraction/build.rs b/04_zero_overhead_abstraction/build.rs
deleted file mode 100644
index 3f0a29110..000000000
--- a/04_zero_overhead_abstraction/build.rs
+++ /dev/null
@@ -1,8 +0,0 @@
-use std::env;
-
-fn main() {
-    let linker_file = env::var("LINKER_FILE").unwrap();
-
-    println!("cargo:rerun-if-changed={}", linker_file);
-    println!("cargo:rerun-if-changed=build.rs");
-}
diff --git a/04_zero_overhead_abstraction/src/_arch/aarch64/cpu.rs b/04_zero_overhead_abstraction/src/_arch/aarch64/cpu.rs
deleted file mode 100644
index 5f97ea410..000000000
--- a/04_zero_overhead_abstraction/src/_arch/aarch64/cpu.rs
+++ /dev/null
@@ -1,26 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Architectural processor code.
-//!
-//! # Orientation
-//!
-//! Since arch modules are imported into generic modules using the path attribute, the path of this
-//! file is:
-//!
-//! crate::cpu::arch_cpu
-
-use cortex_a::asm;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Pause execution on the core.
-#[inline(always)]
-pub fn wait_forever() -> ! {
-    loop {
-        asm::wfe()
-    }
-}
diff --git a/04_zero_overhead_abstraction/src/_arch/aarch64/cpu/boot.rs b/04_zero_overhead_abstraction/src/_arch/aarch64/cpu/boot.rs
deleted file mode 100644
index 549b5927a..000000000
--- a/04_zero_overhead_abstraction/src/_arch/aarch64/cpu/boot.rs
+++ /dev/null
@@ -1,41 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Architectural boot code.
-//!
-//! # Orientation
-//!
-//! Since arch modules are imported into generic modules using the path attribute, the path of this
-//! file is:
-//!
-//! crate::cpu::boot::arch_boot
-
-use crate::{bsp, cpu};
-use cortex_a::regs::*;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// The entry of the `kernel` binary.
-///
-/// The function must be named `_start`, because the linker is looking for this exact name.
-///
-/// # Safety
-///
-/// - Linker script must ensure to place this function where it is expected by the target machine.
-/// - We have to hope that the compiler omits any stack pointer usage before the stack pointer is
-///   actually set (`SP.set()`).
-#[no_mangle]
-pub unsafe fn _start() -> ! {
-    use crate::runtime_init;
-
-    if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
-        SP.set(bsp::memory::boot_core_stack_end() as u64);
-        runtime_init::runtime_init()
-    } else {
-        // If not core0, infinitely wait for events.
-        cpu::wait_forever()
-    }
-}
diff --git a/04_zero_overhead_abstraction/src/_arch/aarch64/cpu/smp.rs b/04_zero_overhead_abstraction/src/_arch/aarch64/cpu/smp.rs
deleted file mode 100644
index b9fdd0f73..000000000
--- a/04_zero_overhead_abstraction/src/_arch/aarch64/cpu/smp.rs
+++ /dev/null
@@ -1,29 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Architectural symmetric multiprocessing.
-//!
-//! # Orientation
-//!
-//! Since arch modules are imported into generic modules using the path attribute, the path of this
-//! file is:
-//!
-//! crate::cpu::smp::arch_smp
-
-use cortex_a::regs::*;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return the executing core's id.
-#[inline(always)]
-pub fn core_id<T>() -> T
-where
-    T: From<u8>,
-{
-    const CORE_MASK: u64 = 0b11;
-
-    T::from((MPIDR_EL1.get() & CORE_MASK) as u8)
-}
diff --git a/04_zero_overhead_abstraction/src/bsp.rs b/04_zero_overhead_abstraction/src/bsp.rs
deleted file mode 100644
index 2b92251f5..000000000
--- a/04_zero_overhead_abstraction/src/bsp.rs
+++ /dev/null
@@ -1,11 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Conditional reexporting of Board Support Packages.
-
-#[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
-mod raspberrypi;
-
-#[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
-pub use raspberrypi::*;
diff --git a/04_zero_overhead_abstraction/src/bsp/raspberrypi.rs b/04_zero_overhead_abstraction/src/bsp/raspberrypi.rs
deleted file mode 100644
index fdb7551a1..000000000
--- a/04_zero_overhead_abstraction/src/bsp/raspberrypi.rs
+++ /dev/null
@@ -1,9 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Top-level BSP file for the Raspberry Pi 3 and 4.
-
-pub mod console;
-pub mod cpu;
-pub mod memory;
diff --git a/04_zero_overhead_abstraction/src/bsp/raspberrypi/console.rs b/04_zero_overhead_abstraction/src/bsp/raspberrypi/console.rs
deleted file mode 100644
index fca7042e6..000000000
--- a/04_zero_overhead_abstraction/src/bsp/raspberrypi/console.rs
+++ /dev/null
@@ -1,47 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! BSP console facilities.
-
-use crate::console;
-use core::fmt;
-
-//--------------------------------------------------------------------------------------------------
-// Private Definitions
-//--------------------------------------------------------------------------------------------------
-
-/// A mystical, magical device for generating QEMU output out of the void.
-struct QEMUOutput;
-
-//--------------------------------------------------------------------------------------------------
-// Private Code
-//--------------------------------------------------------------------------------------------------
-
-/// Implementing `core::fmt::Write` enables usage of the `format_args!` macros, which in turn are
-/// used to implement the `kernel`'s `print!` and `println!` macros. By implementing `write_str()`,
-/// we get `write_fmt()` automatically.
-///
-/// See [`src/print.rs`].
-///
-/// [`src/print.rs`]: ../../print/index.html
-impl fmt::Write for QEMUOutput {
-    fn write_str(&mut self, s: &str) -> fmt::Result {
-        for c in s.chars() {
-            unsafe {
-                core::ptr::write_volatile(0x3F20_1000 as *mut u8, c as u8);
-            }
-        }
-
-        Ok(())
-    }
-}
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return a reference to the console.
-pub fn console() -> impl console::interface::Write {
-    QEMUOutput {}
-}
diff --git a/04_zero_overhead_abstraction/src/bsp/raspberrypi/link.ld b/04_zero_overhead_abstraction/src/bsp/raspberrypi/link.ld
deleted file mode 100644
index 87e6a976f..000000000
--- a/04_zero_overhead_abstraction/src/bsp/raspberrypi/link.ld
+++ /dev/null
@@ -1,49 +0,0 @@
-/* SPDX-License-Identifier: MIT OR Apache-2.0
- *
- * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
- */
-
-/* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
-__rpi_load_addr = 0x80000;
-
-ENTRY(__rpi_load_addr)
-
-PHDRS
-{
-    segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
-    segment_rw PT_LOAD FLAGS(6); /* 6 == RW */
-}
-
-SECTIONS
-{
-    . =  __rpi_load_addr;
-
-    /***********************************************************************************************
-    * Code + RO Data + Global Offset Table
-    ***********************************************************************************************/
-    __rx_start = .;
-    .text :
-    {
-        KEEP(*(.text._start))
-        *(.text*)
-    } :segment_rx
-
-    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
-    .got    : ALIGN(8) { *(.got)     } :segment_rx
-
-    /***********************************************************************************************
-    * Data + BSS
-    ***********************************************************************************************/
-    .data : { *(.data*) } :segment_rw
-
-    /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-    .bss : ALIGN(8)
-    {
-        __bss_start = .;
-        *(.bss*);
-        . = ALIGN(8);
-
-        . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-        __bss_end_inclusive = . - 8;
-    } :NONE
-}
diff --git a/04_zero_overhead_abstraction/src/bsp/raspberrypi/memory.rs b/04_zero_overhead_abstraction/src/bsp/raspberrypi/memory.rs
deleted file mode 100644
index bffe8eab0..000000000
--- a/04_zero_overhead_abstraction/src/bsp/raspberrypi/memory.rs
+++ /dev/null
@@ -1,59 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! BSP Memory Management.
-
-use core::{cell::UnsafeCell, ops::RangeInclusive};
-
-//--------------------------------------------------------------------------------------------------
-// Private Definitions
-//--------------------------------------------------------------------------------------------------
-
-// Symbols from the linker script.
-extern "Rust" {
-    static __rx_start: UnsafeCell<()>;
-
-    static __bss_start: UnsafeCell<u64>;
-    static __bss_end_inclusive: UnsafeCell<u64>;
-}
-
-//--------------------------------------------------------------------------------------------------
-// Private Code
-//--------------------------------------------------------------------------------------------------
-
-/// Start address of the Read+Execute (RX) range.
-///
-/// # Safety
-///
-/// - Value is provided by the linker script and must be trusted as-is.
-#[inline(always)]
-fn rx_start() -> usize {
-    unsafe { __rx_start.get() as usize }
-}
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Exclusive end address of the boot core's stack.
-#[inline(always)]
-pub fn boot_core_stack_end() -> usize {
-    rx_start()
-}
-
-/// Return the inclusive range spanning the .bss section.
-///
-/// # Safety
-///
-/// - Values are provided by the linker script and must be trusted as-is.
-/// - The linker-provided addresses must be u64 aligned.
-pub fn bss_range_inclusive() -> RangeInclusive<*mut u64> {
-    let range;
-    unsafe {
-        range = RangeInclusive::new(__bss_start.get(), __bss_end_inclusive.get());
-    }
-    assert!(!range.is_empty());
-
-    range
-}
diff --git a/04_zero_overhead_abstraction/src/console.rs b/04_zero_overhead_abstraction/src/console.rs
deleted file mode 100644
index 27b79f7dd..000000000
--- a/04_zero_overhead_abstraction/src/console.rs
+++ /dev/null
@@ -1,19 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! System console.
-
-//--------------------------------------------------------------------------------------------------
-// Public Definitions
-//--------------------------------------------------------------------------------------------------
-
-/// Console interfaces.
-pub mod interface {
-    /// Console write functions.
-    ///
-    /// `core::fmt::Write` is exactly what we need for now. Re-export it here because
-    /// implementing `console::Write` gives a better hint to the reader about the
-    /// intention.
-    pub use core::fmt::Write;
-}
diff --git a/04_zero_overhead_abstraction/src/cpu.rs b/04_zero_overhead_abstraction/src/cpu.rs
deleted file mode 100644
index 6f326b325..000000000
--- a/04_zero_overhead_abstraction/src/cpu.rs
+++ /dev/null
@@ -1,18 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Processor code.
-
-#[cfg(target_arch = "aarch64")]
-#[path = "_arch/aarch64/cpu.rs"]
-mod arch_cpu;
-
-mod boot;
-
-pub mod smp;
-
-//--------------------------------------------------------------------------------------------------
-// Architectural Public Reexports
-//--------------------------------------------------------------------------------------------------
-pub use arch_cpu::wait_forever;
diff --git a/04_zero_overhead_abstraction/src/cpu/boot.rs b/04_zero_overhead_abstraction/src/cpu/boot.rs
deleted file mode 100644
index 1dc5c1808..000000000
--- a/04_zero_overhead_abstraction/src/cpu/boot.rs
+++ /dev/null
@@ -1,9 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Boot code.
-
-#[cfg(target_arch = "aarch64")]
-#[path = "../_arch/aarch64/cpu/boot.rs"]
-mod arch_boot;
diff --git a/04_zero_overhead_abstraction/src/main.rs b/04_zero_overhead_abstraction/src/main.rs
deleted file mode 100644
index 9dfc7d007..000000000
--- a/04_zero_overhead_abstraction/src/main.rs
+++ /dev/null
@@ -1,133 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-// Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://git.io/JeGIp")]
-
-//! The `kernel` binary.
-//!
-//! # Code organization and architecture
-//!
-//! The code is divided into different *modules*, each representing a typical **subsystem** of the
-//! `kernel`. Top-level module files of subsystems reside directly in the `src` folder. For example,
-//! `src/memory.rs` contains code that is concerned with all things memory management.
-//!
-//! ## Visibility of processor architecture code
-//!
-//! Some of the `kernel`'s subsystems depend on low-level code that is specific to the target
-//! processor architecture. For each supported processor architecture, there exists a subfolder in
-//! `src/_arch`, for example, `src/_arch/aarch64`.
-//!
-//! The architecture folders mirror the subsystem modules laid out in `src`. For example,
-//! architectural code that belongs to the `kernel`'s MMU subsystem (`src/memory/mmu.rs`) would go
-//! into `src/_arch/aarch64/memory/mmu.rs`. The latter file is loaded as a module in
-//! `src/memory/mmu.rs` using the `path attribute`. Usually, the chosen module name is the generic
-//! module's name prefixed with `arch_`.
-//!
-//! For example, this is the top of `src/memory/mmu.rs`:
-//!
-//! ```
-//! #[cfg(target_arch = "aarch64")]
-//! #[path = "../_arch/aarch64/memory/mmu.rs"]
-//! mod arch_mmu;
-//! ```
-//!
-//! Often times, items from the `arch_ module` will be publicly reexported by the parent module.
-//! This way, each architecture specific module can provide its implementation of an item, while the
-//! caller must not be concerned which architecture has been conditionally compiled.
-//!
-//! ## BSP code
-//!
-//! `BSP` stands for Board Support Package. `BSP` code is organized under `src/bsp.rs` and contains
-//! target board specific definitions and functions. These are things such as the board's memory map
-//! or instances of drivers for devices that are featured on the respective board.
-//!
-//! Just like processor architecture code, the `BSP` code's module structure tries to mirror the
-//! `kernel`'s subsystem modules, but there is no reexporting this time. That means whatever is
-//! provided must be called starting from the `bsp` namespace, e.g. `bsp::driver::driver_manager()`.
-//!
-//! ## Kernel interfaces
-//!
-//! Both `arch` and `bsp` contain code that is conditionally compiled depending on the actual target
-//! and board for which the kernel is compiled. For example, the `interrupt controller` hardware of
-//! the `Raspberry Pi 3` and the `Raspberry Pi 4` is different, but we want the rest of the `kernel`
-//! code to play nicely with any of the two without much hassle.
-//!
-//! In order to provide a clean abstraction between `arch`, `bsp` and `generic kernel code`,
-//! `interface` traits are provided *whenever possible* and *where it makes sense*. They are defined
-//! in the respective subsystem module and help to enforce the idiom of *program to an interface,
-//! not an implementation*. For example, there will be a common IRQ handling interface which the two
-//! different interrupt controller `drivers` of both Raspberrys will implement, and only export the
-//! interface to the rest of the `kernel`.
-//!
-//! ```
-//!         +-------------------+
-//!         | Interface (Trait) |
-//!         |                   |
-//!         +--+-------------+--+
-//!            ^             ^
-//!            |             |
-//!            |             |
-//! +----------+--+       +--+----------+
-//! | kernel code |       |  bsp code   |
-//! |             |       |  arch code  |
-//! +-------------+       +-------------+
-//! ```
-//!
-//! # Summary
-//!
-//! For a logical `kernel` subsystem, corresponding code can be distributed over several physical
-//! locations. Here is an example for the **memory** subsystem:
-//!
-//! - `src/memory.rs` and `src/memory/**/*`
-//!   - Common code that is agnostic of target processor architecture and `BSP` characteristics.
-//!     - Example: A function to zero a chunk of memory.
-//!   - Interfaces for the memory subsystem that are implemented by `arch` or `BSP` code.
-//!     - Example: An `MMU` interface that defines `MMU` function prototypes.
-//! - `src/bsp/__board_name__/memory.rs` and `src/bsp/__board_name__/memory/**/*`
-//!   - `BSP` specific code.
-//!   - Example: The board's memory map (physical addresses of DRAM and MMIO devices).
-//! - `src/_arch/__arch_name__/memory.rs` and `src/_arch/__arch_name__/memory/**/*`
-//!   - Processor architecture specific code.
-//!   - Example: Implementation of the `MMU` interface for the `__arch_name__` processor
-//!     architecture.
-//!
-//! From a namespace perspective, **memory** subsystem code lives in:
-//!
-//! - `crate::memory::*`
-//! - `crate::bsp::memory::*`
-//!
-//! # Boot flow
-//!
-//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
-//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
-//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
-//!
-//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
-//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
-
-#![feature(format_args_nl)]
-#![feature(panic_info_message)]
-#![no_main]
-#![no_std]
-
-mod bsp;
-mod console;
-mod cpu;
-mod memory;
-mod panic_wait;
-mod print;
-mod runtime_init;
-
-/// Early init code.
-///
-/// # Safety
-///
-/// - Only a single core must be active and running this function.
-unsafe fn kernel_init() -> ! {
-    println!("[0] Hello from pure Rust!");
-
-    println!("[1] Stopping here.");
-    cpu::wait_forever()
-}
diff --git a/04_zero_overhead_abstraction/src/memory.rs b/04_zero_overhead_abstraction/src/memory.rs
deleted file mode 100644
index 1f79e0c95..000000000
--- a/04_zero_overhead_abstraction/src/memory.rs
+++ /dev/null
@@ -1,30 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Memory Management.
-
-use core::ops::RangeInclusive;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Zero out an inclusive memory range.
-///
-/// # Safety
-///
-/// - `range.start` and `range.end` must be valid.
-/// - `range.start` and `range.end` must be `T` aligned.
-pub unsafe fn zero_volatile<T>(range: RangeInclusive<*mut T>)
-where
-    T: From<u8>,
-{
-    let mut ptr = *range.start();
-    let end_inclusive = *range.end();
-
-    while ptr <= end_inclusive {
-        core::ptr::write_volatile(ptr, T::from(0));
-        ptr = ptr.offset(1);
-    }
-}
diff --git a/04_zero_overhead_abstraction/src/panic_wait.rs b/04_zero_overhead_abstraction/src/panic_wait.rs
deleted file mode 100644
index 255eedeeb..000000000
--- a/04_zero_overhead_abstraction/src/panic_wait.rs
+++ /dev/null
@@ -1,19 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! A panic handler that infinitely waits.
-
-use crate::{cpu, println};
-use core::panic::PanicInfo;
-
-#[panic_handler]
-fn panic(info: &PanicInfo) -> ! {
-    if let Some(args) = info.message() {
-        println!("\nKernel panic: {}", args);
-    } else {
-        println!("\nKernel panic!");
-    }
-
-    cpu::wait_forever()
-}
diff --git a/04_zero_overhead_abstraction/src/print.rs b/04_zero_overhead_abstraction/src/print.rs
deleted file mode 100644
index 8ea5db240..000000000
--- a/04_zero_overhead_abstraction/src/print.rs
+++ /dev/null
@@ -1,38 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Printing.
-
-use crate::{bsp, console};
-use core::fmt;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-#[doc(hidden)]
-pub fn _print(args: fmt::Arguments) {
-    use console::interface::Write;
-
-    bsp::console::console().write_fmt(args).unwrap();
-}
-
-/// Prints without a newline.
-///
-/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
-#[macro_export]
-macro_rules! print {
-    ($($arg:tt)*) => ($crate::print::_print(format_args!($($arg)*)));
-}
-
-/// Prints with a newline.
-///
-/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
-#[macro_export]
-macro_rules! println {
-    () => ($crate::print!("\n"));
-    ($($arg:tt)*) => ({
-        $crate::print::_print(format_args_nl!($($arg)*));
-    })
-}
diff --git a/04_zero_overhead_abstraction/src/runtime_init.rs b/04_zero_overhead_abstraction/src/runtime_init.rs
deleted file mode 100644
index ee0946863..000000000
--- a/04_zero_overhead_abstraction/src/runtime_init.rs
+++ /dev/null
@@ -1,37 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Rust runtime initialization code.
-
-use crate::{bsp, memory};
-
-//--------------------------------------------------------------------------------------------------
-// Private Code
-//--------------------------------------------------------------------------------------------------
-
-/// Zero out the .bss section.
-///
-/// # Safety
-///
-/// - Must only be called pre `kernel_init()`.
-#[inline(always)]
-unsafe fn zero_bss() {
-    memory::zero_volatile(bsp::memory::bss_range_inclusive());
-}
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Equivalent to `crt0` or `c0` code in C/C++ world. Clears the `bss` section, then jumps to kernel
-/// init code.
-///
-/// # Safety
-///
-/// - Only a single core must be active and running this function.
-pub unsafe fn runtime_init() -> ! {
-    zero_bss();
-
-    crate::kernel_init()
-}
diff --git a/05_safe_globals/src/_arch/aarch64/cpu/boot.rs b/05_safe_globals/src/_arch/aarch64/cpu/boot.rs
index 549b5927a..c85bb94b8 100644
--- a/05_safe_globals/src/_arch/aarch64/cpu/boot.rs
+++ b/05_safe_globals/src/_arch/aarch64/cpu/boot.rs
@@ -11,31 +11,23 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-use crate::{bsp, cpu};
-use cortex_a::regs::*;
+use crate::runtime_init;
+
+// Assembly counterpart to this file.
+global_asm!(include_str!("boot.s"));
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// The entry of the `kernel` binary.
+/// The Rust entry of the `kernel` binary.
 ///
-/// The function must be named `_start`, because the linker is looking for this exact name.
+/// The function is called from the assembly `_start` function.
 ///
 /// # Safety
 ///
-/// - Linker script must ensure to place this function where it is expected by the target machine.
-/// - We have to hope that the compiler omits any stack pointer usage before the stack pointer is
-///   actually set (`SP.set()`).
+/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
 #[no_mangle]
-pub unsafe fn _start() -> ! {
-    use crate::runtime_init;
-
-    if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
-        SP.set(bsp::memory::boot_core_stack_end() as u64);
-        runtime_init::runtime_init()
-    } else {
-        // If not core0, infinitely wait for events.
-        cpu::wait_forever()
-    }
+pub unsafe fn _start_rust() -> ! {
+    runtime_init::runtime_init()
 }
diff --git a/05_safe_globals/src/_arch/aarch64/cpu/boot.s b/05_safe_globals/src/_arch/aarch64/cpu/boot.s
new file mode 100644
index 000000000..ad4a26892
--- /dev/null
+++ b/05_safe_globals/src/_arch/aarch64/cpu/boot.s
@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//--------------------------------------------------------------------------------------------------
+// Definitions
+//--------------------------------------------------------------------------------------------------
+
+.equ _core_id_mask, 0b11
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+.section .text._start
+
+//------------------------------------------------------------------------------
+// fn _start()
+//------------------------------------------------------------------------------
+_start:
+	// Only proceed on the boot core. Park it otherwise.
+	mrs	x1, MPIDR_EL1
+	and	x1, x1, _core_id_mask
+	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
+	cmp	x1, x2
+	b.ne	1f
+
+	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
+
+	// Set the stack pointer.
+	ldr	x0, =__boot_core_stack_end_exclusive
+	mov	sp, x0
+
+	// Jump to Rust code.
+	b	_start_rust
+
+	// Infinitely wait for events (aka "park the core").
+1:	wfe
+	b	1b
+
+.size	_start, . - _start
+.type	_start, function
+.global	_start
diff --git a/05_safe_globals/src/_arch/aarch64/cpu/smp.rs b/05_safe_globals/src/_arch/aarch64/cpu/smp.rs
deleted file mode 100644
index b9fdd0f73..000000000
--- a/05_safe_globals/src/_arch/aarch64/cpu/smp.rs
+++ /dev/null
@@ -1,29 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Architectural symmetric multiprocessing.
-//!
-//! # Orientation
-//!
-//! Since arch modules are imported into generic modules using the path attribute, the path of this
-//! file is:
-//!
-//! crate::cpu::smp::arch_smp
-
-use cortex_a::regs::*;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return the executing core's id.
-#[inline(always)]
-pub fn core_id<T>() -> T
-where
-    T: From<u8>,
-{
-    const CORE_MASK: u64 = 0b11;
-
-    T::from((MPIDR_EL1.get() & CORE_MASK) as u8)
-}
diff --git a/05_safe_globals/src/bsp/raspberrypi/cpu.rs b/05_safe_globals/src/bsp/raspberrypi/cpu.rs
index 16ab927d7..d09ff9568 100644
--- a/05_safe_globals/src/bsp/raspberrypi/cpu.rs
+++ b/05_safe_globals/src/bsp/raspberrypi/cpu.rs
@@ -9,4 +9,6 @@
 //--------------------------------------------------------------------------------------------------
 
 /// Used by `arch` code to find the early boot core.
-pub const BOOT_CORE_ID: u64 = 0;
+#[no_mangle]
+#[link_section = ".text._start_arguments"]
+pub static BOOT_CORE_ID: u64 = 0;
diff --git a/05_safe_globals/src/bsp/raspberrypi/link.ld b/05_safe_globals/src/bsp/raspberrypi/link.ld
index 87e6a976f..3b73b3c7e 100644
--- a/05_safe_globals/src/bsp/raspberrypi/link.ld
+++ b/05_safe_globals/src/bsp/raspberrypi/link.ld
@@ -17,15 +17,28 @@ PHDRS
 SECTIONS
 {
     . =  __rpi_load_addr;
+                                        /*   ^             */
+                                        /*   | stack       */
+                                        /*   | growth      */
+                                        /*   | direction   */
+   __boot_core_stack_end_exclusive = .; /*   |             */
 
     /***********************************************************************************************
     * Code + RO Data + Global Offset Table
     ***********************************************************************************************/
-    __rx_start = .;
     .text :
     {
         KEEP(*(.text._start))
-        *(.text*)
+
+        /* Special constants (or statics in Rust speak) needed by _start().
+         *
+         * They are placed in close proximity to _start() from where they will be read. This ensures
+         * that position-independent, PC-relative loads can be emitted.
+         */
+        *(.text._start_arguments)
+
+        *(.text._start_rust) /* The Rust entry point */
+        *(.text*)            /* Everything else */
     } :segment_rx
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
diff --git a/05_safe_globals/src/bsp/raspberrypi/memory.rs b/05_safe_globals/src/bsp/raspberrypi/memory.rs
index bffe8eab0..5c6b1ea5b 100644
--- a/05_safe_globals/src/bsp/raspberrypi/memory.rs
+++ b/05_safe_globals/src/bsp/raspberrypi/memory.rs
@@ -12,36 +12,14 @@ use core::{cell::UnsafeCell, ops::RangeInclusive};
 
 // Symbols from the linker script.
 extern "Rust" {
-    static __rx_start: UnsafeCell<()>;
-
     static __bss_start: UnsafeCell<u64>;
     static __bss_end_inclusive: UnsafeCell<u64>;
 }
 
-//--------------------------------------------------------------------------------------------------
-// Private Code
-//--------------------------------------------------------------------------------------------------
-
-/// Start address of the Read+Execute (RX) range.
-///
-/// # Safety
-///
-/// - Value is provided by the linker script and must be trusted as-is.
-#[inline(always)]
-fn rx_start() -> usize {
-    unsafe { __rx_start.get() as usize }
-}
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// Exclusive end address of the boot core's stack.
-#[inline(always)]
-pub fn boot_core_stack_end() -> usize {
-    rx_start()
-}
-
 /// Return the inclusive range spanning the .bss section.
 ///
 /// # Safety
diff --git a/05_safe_globals/src/cpu.rs b/05_safe_globals/src/cpu.rs
index 6f326b325..d8f780823 100644
--- a/05_safe_globals/src/cpu.rs
+++ b/05_safe_globals/src/cpu.rs
@@ -10,8 +10,6 @@ mod arch_cpu;
 
 mod boot;
 
-pub mod smp;
-
 //--------------------------------------------------------------------------------------------------
 // Architectural Public Reexports
 //--------------------------------------------------------------------------------------------------
diff --git a/05_safe_globals/src/cpu/smp.rs b/05_safe_globals/src/cpu/smp.rs
deleted file mode 100644
index 38230ce1e..000000000
--- a/05_safe_globals/src/cpu/smp.rs
+++ /dev/null
@@ -1,14 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Symmetric multiprocessing.
-
-#[cfg(target_arch = "aarch64")]
-#[path = "../_arch/aarch64/cpu/smp.rs"]
-mod arch_smp;
-
-//--------------------------------------------------------------------------------------------------
-// Architectural Public Reexports
-//--------------------------------------------------------------------------------------------------
-pub use arch_smp::core_id;
diff --git a/05_safe_globals/src/main.rs b/05_safe_globals/src/main.rs
index 839558158..579f90ddc 100644
--- a/05_safe_globals/src/main.rs
+++ b/05_safe_globals/src/main.rs
@@ -100,14 +100,14 @@
 //!
 //! # Boot flow
 //!
-//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
-//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
+//! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
 //! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
 //!
-//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
 #![feature(format_args_nl)]
+#![feature(global_asm)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
 #![no_main]
diff --git a/06_drivers_gpio_uart/README.md b/06_drivers_gpio_uart/README.md
index 7dea308f3..bd7c02089 100644
--- a/06_drivers_gpio_uart/README.md
+++ b/06_drivers_gpio_uart/README.md
@@ -18,7 +18,8 @@
 - A `driver::interface::DeviceDriver` trait is added for abstracting `BSP` driver implementations
   from kernel code.
 - Drivers are stored in `src/bsp/device_driver`, and can be reused between `BSP`s.
-    - We introduce the `GPIO` driver, which pinmuxes the RPi's PL011 UART.
+    - We introduce the `GPIO` driver, which pinmuxes (that is, routing signals from inside the `SoC`
+      to actual HW pins) the RPi's PL011 UART.
       - Note how this driver differentiates between **RPi 3** and **RPi4**. Their HW is different,
         so we have to account for it in SW.
     - Most importantly, the `PL011Uart` driver: It implements the `console::interface::*` traits and
@@ -1110,7 +1111,7 @@ diff -uNr 05_safe_globals/src/bsp/raspberrypi/driver.rs 06_drivers_gpio_uart/src
 diff -uNr 05_safe_globals/src/bsp/raspberrypi/memory.rs 06_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
 --- 05_safe_globals/src/bsp/raspberrypi/memory.rs
 +++ 06_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
-@@ -19,6 +19,38 @@
+@@ -17,6 +17,38 @@
  }
 
  //--------------------------------------------------------------------------------------------------
@@ -1146,7 +1147,7 @@ diff -uNr 05_safe_globals/src/bsp/raspberrypi/memory.rs 06_drivers_gpio_uart/src
 +}
 +
 +//--------------------------------------------------------------------------------------------------
- // Private Code
+ // Public Code
  //--------------------------------------------------------------------------------------------------
 
 
@@ -1249,7 +1250,7 @@ diff -uNr 05_safe_globals/src/console.rs 06_drivers_gpio_uart/src/console.rs
 diff -uNr 05_safe_globals/src/cpu.rs 06_drivers_gpio_uart/src/cpu.rs
 --- 05_safe_globals/src/cpu.rs
 +++ 06_drivers_gpio_uart/src/cpu.rs
-@@ -15,4 +15,7 @@
+@@ -13,4 +13,7 @@
  //--------------------------------------------------------------------------------------------------
  // Architectural Public Reexports
  //--------------------------------------------------------------------------------------------------
@@ -1311,15 +1312,15 @@ diff -uNr 05_safe_globals/src/driver.rs 06_drivers_gpio_uart/src/driver.rs
 diff -uNr 05_safe_globals/src/main.rs 06_drivers_gpio_uart/src/main.rs
 --- 05_safe_globals/src/main.rs
 +++ 06_drivers_gpio_uart/src/main.rs
-@@ -107,6 +107,8 @@
- //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
+@@ -106,6 +106,8 @@
+ //!
  //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
 +#![allow(clippy::clippy::upper_case_acronyms)]
 +#![feature(const_fn_fn_ptr_basics)]
  #![feature(format_args_nl)]
+ #![feature(global_asm)]
  #![feature(panic_info_message)]
- #![feature(trait_alias)]
 @@ -116,6 +118,7 @@
  mod bsp;
  mod console;
diff --git a/06_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs b/06_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs
index 549b5927a..c85bb94b8 100644
--- a/06_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs
+++ b/06_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs
@@ -11,31 +11,23 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-use crate::{bsp, cpu};
-use cortex_a::regs::*;
+use crate::runtime_init;
+
+// Assembly counterpart to this file.
+global_asm!(include_str!("boot.s"));
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// The entry of the `kernel` binary.
+/// The Rust entry of the `kernel` binary.
 ///
-/// The function must be named `_start`, because the linker is looking for this exact name.
+/// The function is called from the assembly `_start` function.
 ///
 /// # Safety
 ///
-/// - Linker script must ensure to place this function where it is expected by the target machine.
-/// - We have to hope that the compiler omits any stack pointer usage before the stack pointer is
-///   actually set (`SP.set()`).
+/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
 #[no_mangle]
-pub unsafe fn _start() -> ! {
-    use crate::runtime_init;
-
-    if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
-        SP.set(bsp::memory::boot_core_stack_end() as u64);
-        runtime_init::runtime_init()
-    } else {
-        // If not core0, infinitely wait for events.
-        cpu::wait_forever()
-    }
+pub unsafe fn _start_rust() -> ! {
+    runtime_init::runtime_init()
 }
diff --git a/06_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s b/06_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s
new file mode 100644
index 000000000..ad4a26892
--- /dev/null
+++ b/06_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s
@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//--------------------------------------------------------------------------------------------------
+// Definitions
+//--------------------------------------------------------------------------------------------------
+
+.equ _core_id_mask, 0b11
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+.section .text._start
+
+//------------------------------------------------------------------------------
+// fn _start()
+//------------------------------------------------------------------------------
+_start:
+	// Only proceed on the boot core. Park it otherwise.
+	mrs	x1, MPIDR_EL1
+	and	x1, x1, _core_id_mask
+	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
+	cmp	x1, x2
+	b.ne	1f
+
+	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
+
+	// Set the stack pointer.
+	ldr	x0, =__boot_core_stack_end_exclusive
+	mov	sp, x0
+
+	// Jump to Rust code.
+	b	_start_rust
+
+	// Infinitely wait for events (aka "park the core").
+1:	wfe
+	b	1b
+
+.size	_start, . - _start
+.type	_start, function
+.global	_start
diff --git a/06_drivers_gpio_uart/src/_arch/aarch64/cpu/smp.rs b/06_drivers_gpio_uart/src/_arch/aarch64/cpu/smp.rs
deleted file mode 100644
index b9fdd0f73..000000000
--- a/06_drivers_gpio_uart/src/_arch/aarch64/cpu/smp.rs
+++ /dev/null
@@ -1,29 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Architectural symmetric multiprocessing.
-//!
-//! # Orientation
-//!
-//! Since arch modules are imported into generic modules using the path attribute, the path of this
-//! file is:
-//!
-//! crate::cpu::smp::arch_smp
-
-use cortex_a::regs::*;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return the executing core's id.
-#[inline(always)]
-pub fn core_id<T>() -> T
-where
-    T: From<u8>,
-{
-    const CORE_MASK: u64 = 0b11;
-
-    T::from((MPIDR_EL1.get() & CORE_MASK) as u8)
-}
diff --git a/06_drivers_gpio_uart/src/bsp/raspberrypi/cpu.rs b/06_drivers_gpio_uart/src/bsp/raspberrypi/cpu.rs
index 16ab927d7..d09ff9568 100644
--- a/06_drivers_gpio_uart/src/bsp/raspberrypi/cpu.rs
+++ b/06_drivers_gpio_uart/src/bsp/raspberrypi/cpu.rs
@@ -9,4 +9,6 @@
 //--------------------------------------------------------------------------------------------------
 
 /// Used by `arch` code to find the early boot core.
-pub const BOOT_CORE_ID: u64 = 0;
+#[no_mangle]
+#[link_section = ".text._start_arguments"]
+pub static BOOT_CORE_ID: u64 = 0;
diff --git a/06_drivers_gpio_uart/src/bsp/raspberrypi/link.ld b/06_drivers_gpio_uart/src/bsp/raspberrypi/link.ld
index 87e6a976f..3b73b3c7e 100644
--- a/06_drivers_gpio_uart/src/bsp/raspberrypi/link.ld
+++ b/06_drivers_gpio_uart/src/bsp/raspberrypi/link.ld
@@ -17,15 +17,28 @@ PHDRS
 SECTIONS
 {
     . =  __rpi_load_addr;
+                                        /*   ^             */
+                                        /*   | stack       */
+                                        /*   | growth      */
+                                        /*   | direction   */
+   __boot_core_stack_end_exclusive = .; /*   |             */
 
     /***********************************************************************************************
     * Code + RO Data + Global Offset Table
     ***********************************************************************************************/
-    __rx_start = .;
     .text :
     {
         KEEP(*(.text._start))
-        *(.text*)
+
+        /* Special constants (or statics in Rust speak) needed by _start().
+         *
+         * They are placed in close proximity to _start() from where they will be read. This ensures
+         * that position-independent, PC-relative loads can be emitted.
+         */
+        *(.text._start_arguments)
+
+        *(.text._start_rust) /* The Rust entry point */
+        *(.text*)            /* Everything else */
     } :segment_rx
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
diff --git a/06_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs b/06_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
index 56a3306e5..c6d65e36b 100644
--- a/06_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
+++ b/06_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
@@ -12,8 +12,6 @@ use core::{cell::UnsafeCell, ops::RangeInclusive};
 
 // Symbols from the linker script.
 extern "Rust" {
-    static __rx_start: UnsafeCell<()>;
-
     static __bss_start: UnsafeCell<u64>;
     static __bss_end_inclusive: UnsafeCell<u64>;
 }
@@ -50,30 +48,10 @@ pub(super) mod map {
     }
 }
 
-//--------------------------------------------------------------------------------------------------
-// Private Code
-//--------------------------------------------------------------------------------------------------
-
-/// Start address of the Read+Execute (RX) range.
-///
-/// # Safety
-///
-/// - Value is provided by the linker script and must be trusted as-is.
-#[inline(always)]
-fn rx_start() -> usize {
-    unsafe { __rx_start.get() as usize }
-}
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// Exclusive end address of the boot core's stack.
-#[inline(always)]
-pub fn boot_core_stack_end() -> usize {
-    rx_start()
-}
-
 /// Return the inclusive range spanning the .bss section.
 ///
 /// # Safety
diff --git a/06_drivers_gpio_uart/src/cpu.rs b/06_drivers_gpio_uart/src/cpu.rs
index f0df4791f..c5e956ea6 100644
--- a/06_drivers_gpio_uart/src/cpu.rs
+++ b/06_drivers_gpio_uart/src/cpu.rs
@@ -10,8 +10,6 @@ mod arch_cpu;
 
 mod boot;
 
-pub mod smp;
-
 //--------------------------------------------------------------------------------------------------
 // Architectural Public Reexports
 //--------------------------------------------------------------------------------------------------
diff --git a/06_drivers_gpio_uart/src/cpu/smp.rs b/06_drivers_gpio_uart/src/cpu/smp.rs
deleted file mode 100644
index 38230ce1e..000000000
--- a/06_drivers_gpio_uart/src/cpu/smp.rs
+++ /dev/null
@@ -1,14 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Symmetric multiprocessing.
-
-#[cfg(target_arch = "aarch64")]
-#[path = "../_arch/aarch64/cpu/smp.rs"]
-mod arch_smp;
-
-//--------------------------------------------------------------------------------------------------
-// Architectural Public Reexports
-//--------------------------------------------------------------------------------------------------
-pub use arch_smp::core_id;
diff --git a/06_drivers_gpio_uart/src/main.rs b/06_drivers_gpio_uart/src/main.rs
index 627b5b59b..0f3c493df 100644
--- a/06_drivers_gpio_uart/src/main.rs
+++ b/06_drivers_gpio_uart/src/main.rs
@@ -100,16 +100,16 @@
 //!
 //! # Boot flow
 //!
-//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
-//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
+//! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
 //! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
 //!
-//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
 #![allow(clippy::clippy::upper_case_acronyms)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
+#![feature(global_asm)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
 #![no_main]
diff --git a/07_uart_chainloader/Makefile b/07_uart_chainloader/Makefile
index 4fc73f554..ce9d5a640 100644
--- a/07_uart_chainloader/Makefile
+++ b/07_uart_chainloader/Makefile
@@ -24,7 +24,7 @@ ifeq ($(BSP),rpi3)
     NM_BINARY         = aarch64-none-elf-nm
     READELF_BINARY    = aarch64-none-elf-readelf
     LINKER_FILE       = src/bsp/raspberrypi/link.ld
-    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53 -C relocation-model=pic
+    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
     CHAINBOOT_DEMO_PAYLOAD = demo_payload_rpi3.img
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -36,7 +36,7 @@ else ifeq ($(BSP),rpi4)
     NM_BINARY         = aarch64-none-elf-nm
     READELF_BINARY    = aarch64-none-elf-readelf
     LINKER_FILE       = src/bsp/raspberrypi/link.ld
-    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72 -C relocation-model=pic
+    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
     CHAINBOOT_DEMO_PAYLOAD = demo_payload_rpi4.img
 endif
 
diff --git a/07_uart_chainloader/README.md b/07_uart_chainloader/README.md
index 923615b56..a60fe9051 100644
--- a/07_uart_chainloader/README.md
+++ b/07_uart_chainloader/README.md
@@ -3,22 +3,34 @@
 ## tl;dr
 
 - Running from an SD card was a nice experience, but it would be extremely tedious to do it for
-  every new binary. Let's write a [chainloader] using [position independent code].
+  every new binary. So let's write a [chainloader].
 - This will be the last binary you need to put on the SD card. Each following tutorial will provide
   a `chainboot` target in the `Makefile` that lets you conveniently load the kernel over `UART`.
 
 [chainloader]: https://en.wikipedia.org/wiki/Chain_loading
-[position independent code]: https://en.wikipedia.org/wiki/Position-independent_code
+
 
 ## Note
 
-Please note that there is a lot of stuff going on in this tutorial that is very hard to grasp by
-only looking at the source code changes.
+Please note that there is stuff going on in this tutorial that is very hard to grasp by only looking
+at the source code changes.
+
+The gist of it is that in `boot.s`, we are writing a piece of [position independent code] which
+automatically determines where the firmware has loaded the binary (`0x8_0000`), and where it was
+linked to (`0x200_0000`, see `link.ld`). The binary then copies itself from loaded to linked address
+(aka  "relocating" itself), and then jumps to the relocated version of `_start_rust()`.
+
+Since the chainloader has put itself "out of the way" now, it can now receive another kernel binary
+from the `UART` and copy it to the standard load address of the RPi firmware at `0x8_0000`. Finally,
+it jumps to `0x8_0000` and the newly loaded binary transparently executes as if it had been loaded
+from SD card all along.
 
 Please bear with me until I find the time to write it all down here elaborately. For the time being,
 please see this tutorial as an enabler for a convenience feature that allows booting the following
 tutorials in a quick manner.
 
+[position independent code]: https://en.wikipedia.org/wiki/Position-independent_code
+
 ## Install and test it
 
 Our chainloader is called `MiniLoad` and is inspired by [raspbootin].
@@ -71,34 +83,36 @@ Minipush 1.0
 [3] Echoing input now
 ```
 
-In this tutorial, a version of the kernel from the previous tutorial is loaded
-for demo purposes. In subsequent tuts, it will be the working directory's
-kernel.
+In this tutorial, a version of the kernel from the previous tutorial is loaded for demo purposes. In
+subsequent tutorials, it will be the working directory's kernel.
 
 ## Test it
 
-The `Makefile` in this tutorial has an additional target, `qemuasm`, that lets
-you nicely observe the jump from the loaded address (`0x80_XXX`) to the
-relocated code at (`0x0200_0XXX`):
+The `Makefile` in this tutorial has an additional target, `qemuasm`, that lets you nicely observe
+how the kernel, after relocating itself, jumps the load address region (`0x80_XXX`) to the relocated
+code at (`0x0200_0XXX`):
 
 ```console
 $ make qemuasm
 [...]
+N:
+0x00080030:  58000140  ldr      x0, #0x80058
+0x00080034:  9100001f  mov      sp, x0
+0x00080038:  58000141  ldr      x1, #0x80060
+0x0008003c:  d61f0020  br       x1
+
+----------------
 IN:
-0x0008098c:  b0000008  adrp     x8, #0x81000
-0x00080990:  b0000000  adrp     x0, #0x81000
-0x00080994:  912a8000  add      x0, x0, #0xaa0
-0x00080998:  f9471908  ldr      x8, [x8, #0xe30]
-0x0008099c:  d63f0100  blr      x8
+0x02000070:  9400044c  bl       #0x20011a0
 
 ----------------
 IN:
-0x02000b1c:  b0000008  adrp     x8, #0x2001000
-0x02000b20:  b0000009  adrp     x9, #0x2001000
-0x02000b24:  f9475d08  ldr      x8, [x8, #0xeb8]
-0x02000b28:  f9476129  ldr      x9, [x9, #0xec0]
-0x02000b2c:  eb08013f  cmp      x9, x8
-0x02000b30:  540000c2  b.hs     #0x2000b48
+0x020011a0:  90000008  adrp     x8, #0x2001000
+0x020011a4:  90000009  adrp     x9, #0x2001000
+0x020011a8:  f9446508  ldr      x8, [x8, #0x8c8]
+0x020011ac:  f9446929  ldr      x9, [x9, #0x8d0]
+0x020011b0:  eb08013f  cmp      x9, x8
+0x020011b4:  54000109  b.ls     #0x20011d4
 [...]
 ```
 
@@ -110,22 +124,18 @@ Binary files 06_drivers_gpio_uart/demo_payload_rpi4.img and 07_uart_chainloader/
 diff -uNr 06_drivers_gpio_uart/Makefile 07_uart_chainloader/Makefile
 --- 06_drivers_gpio_uart/Makefile
 +++ 07_uart_chainloader/Makefile
-@@ -24,7 +24,8 @@
-     NM_BINARY         = aarch64-none-elf-nm
+@@ -25,6 +25,7 @@
      READELF_BINARY    = aarch64-none-elf-readelf
      LINKER_FILE       = src/bsp/raspberrypi/link.ld
--    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
-+    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53 -C relocation-model=pic
+     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 +    CHAINBOOT_DEMO_PAYLOAD = demo_payload_rpi3.img
  else ifeq ($(BSP),rpi4)
      TARGET            = aarch64-unknown-none-softfloat
      KERNEL_BIN        = kernel8.img
-@@ -35,7 +36,8 @@
-     NM_BINARY         = aarch64-none-elf-nm
+@@ -36,6 +37,7 @@
      READELF_BINARY    = aarch64-none-elf-readelf
      LINKER_FILE       = src/bsp/raspberrypi/link.ld
--    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
-+    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72 -C relocation-model=pic
+     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 +    CHAINBOOT_DEMO_PAYLOAD = demo_payload_rpi4.img
  endif
 
@@ -166,47 +176,47 @@ diff -uNr 06_drivers_gpio_uart/Makefile 07_uart_chainloader/Makefile
  clippy:
  	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
-diff -uNr 06_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs 07_uart_chainloader/src/_arch/aarch64/cpu/boot.rs
---- 06_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs
-+++ 07_uart_chainloader/src/_arch/aarch64/cpu/boot.rs
-@@ -29,11 +29,11 @@
- ///   actually set (`SP.set()`).
- #[no_mangle]
- pub unsafe fn _start() -> ! {
--    use crate::runtime_init;
-+    use crate::relocate;
-
-     if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
-         SP.set(bsp::memory::boot_core_stack_end() as u64);
--        runtime_init::runtime_init()
-+        relocate::relocate_self()
-     } else {
-         // If not core0, infinitely wait for events.
-         cpu::wait_forever()
-
-diff -uNr 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs 07_uart_chainloader/src/_arch/aarch64/cpu.rs
---- 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
-+++ 07_uart_chainloader/src/_arch/aarch64/cpu.rs
-@@ -35,3 +35,19 @@
-         asm::wfe()
-     }
- }
+diff -uNr 06_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s 07_uart_chainloader/src/_arch/aarch64/cpu/boot.s
+--- 06_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s
++++ 07_uart_chainloader/src/_arch/aarch64/cpu/boot.s
+@@ -22,20 +22,31 @@
+ 	and	x1, x1, _core_id_mask
+ 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
+ 	cmp	x1, x2
+-	b.ne	1f
++	b.ne	2f
+
+-	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
++	// If execution reaches here, it is the boot core.
 +
-+/// Branch to a raw integer value.
-+///
-+/// # Safety
-+///
-+/// - This is highly unsafe. Use with care.
-+#[inline(always)]
-+pub unsafe fn branch_to_raw_addr(addr: usize) -> ! {
-+    asm!(
-+        "blr {destination:x}",
-+        destination = in(reg) addr,
-+        options(nomem, nostack)
-+    );
++	// Next, relocate the binary.
++	adr	x0, __binary_nonzero_start          // The address the binary got loaded to.
++	ldr	x1, =__binary_nonzero_start         // The address the binary was linked to.
++	ldr	x2, =__binary_nonzero_end_exclusive
 +
-+    core::intrinsics::unreachable()
-+}
++1:	ldr	x3, [x0], #8
++	str	x3, [x1], #8
++	cmp	x1, x2
++	b.lo	1b
+
+ 	// Set the stack pointer.
+ 	ldr	x0, =__boot_core_stack_end_exclusive
+ 	mov	sp, x0
+
+-	// Jump to Rust code.
+-	b	_start_rust
++	// Jump to the relocated Rust code.
++	ldr	x1, =_start_rust
++	br	x1
+
+ 	// Infinitely wait for events (aka "park the core").
+-1:	wfe
+-	b	1b
++2:	wfe
++	b	2b
+
+ .size	_start, . - _start
+ .type	_start, function
 
 diff -uNr 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 --- 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -268,58 +278,46 @@ diff -uNr 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 0
 diff -uNr 06_drivers_gpio_uart/src/bsp/raspberrypi/link.ld 07_uart_chainloader/src/bsp/raspberrypi/link.ld
 --- 06_drivers_gpio_uart/src/bsp/raspberrypi/link.ld
 +++ 07_uart_chainloader/src/bsp/raspberrypi/link.ld
-@@ -16,12 +16,13 @@
+@@ -16,7 +16,8 @@
 
  SECTIONS
  {
 -    . =  __rpi_load_addr;
 +    /* Set the link address to 32 MiB */
 +    . = 0x2000000;
-
+                                         /*   ^             */
+                                         /*   | stack       */
+                                         /*   | growth      */
+@@ -26,6 +27,7 @@
      /***********************************************************************************************
      * Code + RO Data + Global Offset Table
      ***********************************************************************************************/
--    __rx_start = .;
-+    __binary_start = .;
++    __binary_nonzero_start = .;
      .text :
      {
          KEEP(*(.text._start))
-@@ -46,4 +47,10 @@
-         . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-         __bss_end_inclusive = . - 8;
-     } :NONE
-+
+@@ -49,8 +51,12 @@
+     ***********************************************************************************************/
+     .data : { *(.data*) } :segment_rw
+
 +    /* Fill up to 8 byte, b/c relocating the binary is done in u64 chunks */
 +    . = ALIGN(8);
-+    __binary_end_inclusive = . - 8;
++    __binary_nonzero_end_exclusive = .;
 +
-+    __runtime_init_reloc = runtime_init;
- }
+     /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
+-    .bss : ALIGN(8)
++    .bss :
+     {
+         __bss_start = .;
+         *(.bss*);
 
 diff -uNr 06_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs 07_uart_chainloader/src/bsp/raspberrypi/memory.rs
 --- 06_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
 +++ 07_uart_chainloader/src/bsp/raspberrypi/memory.rs
-@@ -12,10 +12,12 @@
-
- // Symbols from the linker script.
- extern "Rust" {
--    static __rx_start: UnsafeCell<()>;
--
-+    static __binary_start: UnsafeCell<u64>;
-     static __bss_start: UnsafeCell<u64>;
-     static __bss_end_inclusive: UnsafeCell<u64>;
-+    static __binary_end_inclusive: UnsafeCell<u64>;
-+
-+    static __runtime_init_reloc: UnsafeCell<u64>;
- }
-
- //--------------------------------------------------------------------------------------------------
-@@ -25,9 +27,12 @@
+@@ -23,9 +23,10 @@
  /// The board's physical memory map.
  #[rustfmt::skip]
  pub(super) mod map {
-+    pub const BOOT_CORE_STACK_END:        usize =        0x8_0000;
-+
 +    pub const BOARD_DEFAULT_LOAD_ADDRESS: usize =        0x8_0000;
 
 -    pub const GPIO_OFFSET:         usize = 0x0020_0000;
@@ -329,111 +327,34 @@ diff -uNr 06_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs 07_uart_chainloader
 
      /// Physical devices.
      #[cfg(feature = "bsp_rpi3")]
-@@ -51,36 +56,44 @@
- }
-
- //--------------------------------------------------------------------------------------------------
--// Private Code
-+// Public Code
+@@ -52,7 +53,13 @@
+ // Public Code
  //--------------------------------------------------------------------------------------------------
 
--/// Start address of the Read+Execute (RX) range.
-+/// Exclusive end address of the boot core's stack.
-+#[inline(always)]
-+pub fn boot_core_stack_end() -> usize {
-+    map::BOOT_CORE_STACK_END
-+}
-+
+-/// Return the inclusive range spanning the .bss section.
 +/// The address on which the Raspberry firmware loads every binary by default.
 +#[inline(always)]
 +pub fn board_default_load_addr() -> *const u64 {
 +    map::BOARD_DEFAULT_LOAD_ADDRESS as _
 +}
 +
-+/// Return the inclusive range spanning the relocated kernel binary.
- ///
- /// # Safety
- ///
--/// - Value is provided by the linker script and must be trusted as-is.
--#[inline(always)]
--fn rx_start() -> usize {
--    unsafe { __rx_start.get() as usize }
-+/// - Values are provided by the linker script and must be trusted as-is.
-+/// - The linker-provided addresses must be u64 aligned.
-+pub fn relocated_binary_range_inclusive() -> RangeInclusive<*mut u64> {
-+    unsafe { RangeInclusive::new(__binary_start.get(), __binary_end_inclusive.get()) }
- }
-
--//--------------------------------------------------------------------------------------------------
--// Public Code
--//--------------------------------------------------------------------------------------------------
--
--/// Exclusive end address of the boot core's stack.
-+/// The relocated address of function `runtime_init()`.
- #[inline(always)]
--pub fn boot_core_stack_end() -> usize {
--    rx_start()
-+pub fn relocated_runtime_init_addr() -> *const u64 {
-+    unsafe { __runtime_init_reloc.get() as _ }
- }
-
--/// Return the inclusive range spanning the .bss section.
 +/// Return the inclusive range spanning the relocated .bss section.
  ///
  /// # Safety
  ///
- /// - Values are provided by the linker script and must be trusted as-is.
- /// - The linker-provided addresses must be u64 aligned.
--pub fn bss_range_inclusive() -> RangeInclusive<*mut u64> {
-+pub fn relocated_bss_range_inclusive() -> RangeInclusive<*mut u64> {
-     let range;
-     unsafe {
-         range = RangeInclusive::new(__bss_start.get(), __bss_end_inclusive.get());
-
-diff -uNr 06_drivers_gpio_uart/src/cpu.rs 07_uart_chainloader/src/cpu.rs
---- 06_drivers_gpio_uart/src/cpu.rs
-+++ 07_uart_chainloader/src/cpu.rs
-@@ -15,7 +15,7 @@
- //--------------------------------------------------------------------------------------------------
- // Architectural Public Reexports
- //--------------------------------------------------------------------------------------------------
--pub use arch_cpu::{nop, wait_forever};
-+pub use arch_cpu::{branch_to_raw_addr, nop, wait_forever};
-
- #[cfg(feature = "bsp_rpi3")]
- pub use arch_cpu::spin_for_cycles;
 
 diff -uNr 06_drivers_gpio_uart/src/main.rs 07_uart_chainloader/src/main.rs
 --- 06_drivers_gpio_uart/src/main.rs
 +++ 07_uart_chainloader/src/main.rs
-@@ -102,13 +102,17 @@
- //!
- //! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
- //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
--//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
-+//! 2. Once finished with architectural setup, the arch code calls [`relocate::relocate_self()`].
-+//! 3. Finally, [`runtime_init::runtime_init()`] is called.
- //!
- //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
-+//! [`relocate::relocate_self()`]: relocate/fn.relocate_self.html
+@@ -107,6 +107,7 @@
  //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
  #![allow(clippy::clippy::upper_case_acronyms)]
 +#![feature(asm)]
  #![feature(const_fn_fn_ptr_basics)]
-+#![feature(core_intrinsics)]
  #![feature(format_args_nl)]
- #![feature(panic_info_message)]
- #![feature(trait_alias)]
-@@ -122,6 +126,7 @@
- mod memory;
- mod panic_wait;
- mod print;
-+mod relocate;
- mod runtime_init;
- mod synchronization;
-
-@@ -150,29 +155,49 @@
+ #![feature(global_asm)]
+@@ -150,29 +151,49 @@
  fn kernel_main() -> ! {
      use bsp::console::console;
      use console::interface::All;
@@ -504,81 +425,6 @@ diff -uNr 06_drivers_gpio_uart/src/main.rs 07_uart_chainloader/src/main.rs
 +    kernel()
  }
 
-diff -uNr 06_drivers_gpio_uart/src/relocate.rs 07_uart_chainloader/src/relocate.rs
---- 06_drivers_gpio_uart/src/relocate.rs
-+++ 07_uart_chainloader/src/relocate.rs
-@@ -0,0 +1,49 @@
-+// SPDX-License-Identifier: MIT OR Apache-2.0
-+//
-+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-+
-+//! Relocation code.
-+
-+use crate::{bsp, cpu};
-+
-+//--------------------------------------------------------------------------------------------------
-+// Public Code
-+//--------------------------------------------------------------------------------------------------
-+
-+/// Relocates the own binary from `bsp::memory::board_default_load_addr()` to the `__binary_start`
-+/// address from the linker script.
-+///
-+/// # Safety
-+///
-+/// - Only a single core must be active and running this function.
-+/// - Function must not use the `bss` section.
-+#[inline(never)]
-+pub unsafe fn relocate_self() -> ! {
-+    let range = bsp::memory::relocated_binary_range_inclusive();
-+    let mut relocated_binary_start_addr = *range.start();
-+    let relocated_binary_end_addr_inclusive = *range.end();
-+
-+    // The address of where the previous firmware loaded us.
-+    let mut current_binary_start_addr = bsp::memory::board_default_load_addr();
-+
-+    // Copy the whole binary.
-+    while relocated_binary_start_addr <= relocated_binary_end_addr_inclusive {
-+        core::ptr::write_volatile(
-+            relocated_binary_start_addr,
-+            core::ptr::read_volatile(current_binary_start_addr),
-+        );
-+        relocated_binary_start_addr = relocated_binary_start_addr.offset(1);
-+        current_binary_start_addr = current_binary_start_addr.offset(1);
-+    }
-+
-+    // The following function calls realize an "absolute jump" to `runtime_init::runtime_init()` by
-+    // forcing an indirection through the global offset table (GOT), so that execution continues
-+    // from the relocated binary.
-+    //
-+    // Without the indirection through the assembly, the address of `runtime_init()` would be
-+    // calculated as a relative offset from the current program counter, since we are compiling as
-+    // `position independent code`. This would cause us to keep executing from the address to which
-+    // the firmware loaded us, instead of the relocated position.
-+    let relocated_runtime_init_addr = bsp::memory::relocated_runtime_init_addr() as usize;
-+    cpu::branch_to_raw_addr(relocated_runtime_init_addr)
-+}
-
-diff -uNr 06_drivers_gpio_uart/src/runtime_init.rs 07_uart_chainloader/src/runtime_init.rs
---- 06_drivers_gpio_uart/src/runtime_init.rs
-+++ 07_uart_chainloader/src/runtime_init.rs
-@@ -17,7 +17,7 @@
- /// - Must only be called pre `kernel_init()`.
- #[inline(always)]
- unsafe fn zero_bss() {
--    memory::zero_volatile(bsp::memory::bss_range_inclusive());
-+    memory::zero_volatile(bsp::memory::relocated_bss_range_inclusive());
- }
-
- //--------------------------------------------------------------------------------------------------
-@@ -30,6 +30,7 @@
- /// # Safety
- ///
- /// - Only a single core must be active and running this function.
-+#[no_mangle]
- pub unsafe fn runtime_init() -> ! {
-     zero_bss();
-
-
 diff -uNr 06_drivers_gpio_uart/update.sh 07_uart_chainloader/update.sh
 --- 06_drivers_gpio_uart/update.sh
 +++ 07_uart_chainloader/update.sh
diff --git a/07_uart_chainloader/demo_payload_rpi3.img b/07_uart_chainloader/demo_payload_rpi3.img
index 79eef6b4ca54773cbe15dd88f8b48e0ea9a8541a..91602b45b02de681e2e3f0706864f16396592fa9 100755
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diff --git a/07_uart_chainloader/demo_payload_rpi4.img b/07_uart_chainloader/demo_payload_rpi4.img
index 4ec2899812281f5c492516fa530527f937f5446b..b1060665b4af3eadced31cec72de42265985d110 100755
GIT binary patch
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diff --git a/07_uart_chainloader/src/_arch/aarch64/cpu.rs b/07_uart_chainloader/src/_arch/aarch64/cpu.rs
index 893c7580b..ade53a3ca 100644
--- a/07_uart_chainloader/src/_arch/aarch64/cpu.rs
+++ b/07_uart_chainloader/src/_arch/aarch64/cpu.rs
@@ -35,19 +35,3 @@ pub fn wait_forever() -> ! {
         asm::wfe()
     }
 }
-
-/// Branch to a raw integer value.
-///
-/// # Safety
-///
-/// - This is highly unsafe. Use with care.
-#[inline(always)]
-pub unsafe fn branch_to_raw_addr(addr: usize) -> ! {
-    asm!(
-        "blr {destination:x}",
-        destination = in(reg) addr,
-        options(nomem, nostack)
-    );
-
-    core::intrinsics::unreachable()
-}
diff --git a/07_uart_chainloader/src/_arch/aarch64/cpu/boot.rs b/07_uart_chainloader/src/_arch/aarch64/cpu/boot.rs
index b343792f3..c85bb94b8 100644
--- a/07_uart_chainloader/src/_arch/aarch64/cpu/boot.rs
+++ b/07_uart_chainloader/src/_arch/aarch64/cpu/boot.rs
@@ -11,31 +11,23 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-use crate::{bsp, cpu};
-use cortex_a::regs::*;
+use crate::runtime_init;
+
+// Assembly counterpart to this file.
+global_asm!(include_str!("boot.s"));
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// The entry of the `kernel` binary.
+/// The Rust entry of the `kernel` binary.
 ///
-/// The function must be named `_start`, because the linker is looking for this exact name.
+/// The function is called from the assembly `_start` function.
 ///
 /// # Safety
 ///
-/// - Linker script must ensure to place this function where it is expected by the target machine.
-/// - We have to hope that the compiler omits any stack pointer usage before the stack pointer is
-///   actually set (`SP.set()`).
+/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
 #[no_mangle]
-pub unsafe fn _start() -> ! {
-    use crate::relocate;
-
-    if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
-        SP.set(bsp::memory::boot_core_stack_end() as u64);
-        relocate::relocate_self()
-    } else {
-        // If not core0, infinitely wait for events.
-        cpu::wait_forever()
-    }
+pub unsafe fn _start_rust() -> ! {
+    runtime_init::runtime_init()
 }
diff --git a/07_uart_chainloader/src/_arch/aarch64/cpu/boot.s b/07_uart_chainloader/src/_arch/aarch64/cpu/boot.s
new file mode 100644
index 000000000..4f45ebd12
--- /dev/null
+++ b/07_uart_chainloader/src/_arch/aarch64/cpu/boot.s
@@ -0,0 +1,53 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//--------------------------------------------------------------------------------------------------
+// Definitions
+//--------------------------------------------------------------------------------------------------
+
+.equ _core_id_mask, 0b11
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+.section .text._start
+
+//------------------------------------------------------------------------------
+// fn _start()
+//------------------------------------------------------------------------------
+_start:
+	// Only proceed on the boot core. Park it otherwise.
+	mrs	x1, MPIDR_EL1
+	and	x1, x1, _core_id_mask
+	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
+	cmp	x1, x2
+	b.ne	2f
+
+	// If execution reaches here, it is the boot core.
+
+	// Next, relocate the binary.
+	adr	x0, __binary_nonzero_start          // The address the binary got loaded to.
+	ldr	x1, =__binary_nonzero_start         // The address the binary was linked to.
+	ldr	x2, =__binary_nonzero_end_exclusive
+
+1:	ldr	x3, [x0], #8
+	str	x3, [x1], #8
+	cmp	x1, x2
+	b.lo	1b
+
+	// Set the stack pointer.
+	ldr	x0, =__boot_core_stack_end_exclusive
+	mov	sp, x0
+
+	// Jump to the relocated Rust code.
+	ldr	x1, =_start_rust
+	br	x1
+
+	// Infinitely wait for events (aka "park the core").
+2:	wfe
+	b	2b
+
+.size	_start, . - _start
+.type	_start, function
+.global	_start
diff --git a/07_uart_chainloader/src/_arch/aarch64/cpu/smp.rs b/07_uart_chainloader/src/_arch/aarch64/cpu/smp.rs
deleted file mode 100644
index b9fdd0f73..000000000
--- a/07_uart_chainloader/src/_arch/aarch64/cpu/smp.rs
+++ /dev/null
@@ -1,29 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Architectural symmetric multiprocessing.
-//!
-//! # Orientation
-//!
-//! Since arch modules are imported into generic modules using the path attribute, the path of this
-//! file is:
-//!
-//! crate::cpu::smp::arch_smp
-
-use cortex_a::regs::*;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return the executing core's id.
-#[inline(always)]
-pub fn core_id<T>() -> T
-where
-    T: From<u8>,
-{
-    const CORE_MASK: u64 = 0b11;
-
-    T::from((MPIDR_EL1.get() & CORE_MASK) as u8)
-}
diff --git a/07_uart_chainloader/src/bsp/raspberrypi/cpu.rs b/07_uart_chainloader/src/bsp/raspberrypi/cpu.rs
index 16ab927d7..d09ff9568 100644
--- a/07_uart_chainloader/src/bsp/raspberrypi/cpu.rs
+++ b/07_uart_chainloader/src/bsp/raspberrypi/cpu.rs
@@ -9,4 +9,6 @@
 //--------------------------------------------------------------------------------------------------
 
 /// Used by `arch` code to find the early boot core.
-pub const BOOT_CORE_ID: u64 = 0;
+#[no_mangle]
+#[link_section = ".text._start_arguments"]
+pub static BOOT_CORE_ID: u64 = 0;
diff --git a/07_uart_chainloader/src/bsp/raspberrypi/link.ld b/07_uart_chainloader/src/bsp/raspberrypi/link.ld
index 5642ed4e9..f75239061 100644
--- a/07_uart_chainloader/src/bsp/raspberrypi/link.ld
+++ b/07_uart_chainloader/src/bsp/raspberrypi/link.ld
@@ -18,15 +18,29 @@ SECTIONS
 {
     /* Set the link address to 32 MiB */
     . = 0x2000000;
+                                        /*   ^             */
+                                        /*   | stack       */
+                                        /*   | growth      */
+                                        /*   | direction   */
+   __boot_core_stack_end_exclusive = .; /*   |             */
 
     /***********************************************************************************************
     * Code + RO Data + Global Offset Table
     ***********************************************************************************************/
-    __binary_start = .;
+    __binary_nonzero_start = .;
     .text :
     {
         KEEP(*(.text._start))
-        *(.text*)
+
+        /* Special constants (or statics in Rust speak) needed by _start().
+         *
+         * They are placed in close proximity to _start() from where they will be read. This ensures
+         * that position-independent, PC-relative loads can be emitted.
+         */
+        *(.text._start_arguments)
+
+        *(.text._start_rust) /* The Rust entry point */
+        *(.text*)            /* Everything else */
     } :segment_rx
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
@@ -37,8 +51,12 @@ SECTIONS
     ***********************************************************************************************/
     .data : { *(.data*) } :segment_rw
 
+    /* Fill up to 8 byte, b/c relocating the binary is done in u64 chunks */
+    . = ALIGN(8);
+    __binary_nonzero_end_exclusive = .;
+
     /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-    .bss : ALIGN(8)
+    .bss :
     {
         __bss_start = .;
         *(.bss*);
@@ -47,10 +65,4 @@ SECTIONS
         . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
         __bss_end_inclusive = . - 8;
     } :NONE
-
-    /* Fill up to 8 byte, b/c relocating the binary is done in u64 chunks */
-    . = ALIGN(8);
-    __binary_end_inclusive = . - 8;
-
-    __runtime_init_reloc = runtime_init;
 }
diff --git a/07_uart_chainloader/src/bsp/raspberrypi/memory.rs b/07_uart_chainloader/src/bsp/raspberrypi/memory.rs
index 5abfb9ef0..9a66cc8ac 100644
--- a/07_uart_chainloader/src/bsp/raspberrypi/memory.rs
+++ b/07_uart_chainloader/src/bsp/raspberrypi/memory.rs
@@ -12,12 +12,8 @@ use core::{cell::UnsafeCell, ops::RangeInclusive};
 
 // Symbols from the linker script.
 extern "Rust" {
-    static __binary_start: UnsafeCell<u64>;
     static __bss_start: UnsafeCell<u64>;
     static __bss_end_inclusive: UnsafeCell<u64>;
-    static __binary_end_inclusive: UnsafeCell<u64>;
-
-    static __runtime_init_reloc: UnsafeCell<u64>;
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -27,8 +23,6 @@ extern "Rust" {
 /// The board's physical memory map.
 #[rustfmt::skip]
 pub(super) mod map {
-    pub const BOOT_CORE_STACK_END:        usize =        0x8_0000;
-
     pub const BOARD_DEFAULT_LOAD_ADDRESS: usize =        0x8_0000;
 
     pub const GPIO_OFFSET:                usize =        0x0020_0000;
@@ -59,41 +53,19 @@ pub(super) mod map {
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// Exclusive end address of the boot core's stack.
-#[inline(always)]
-pub fn boot_core_stack_end() -> usize {
-    map::BOOT_CORE_STACK_END
-}
-
 /// The address on which the Raspberry firmware loads every binary by default.
 #[inline(always)]
 pub fn board_default_load_addr() -> *const u64 {
     map::BOARD_DEFAULT_LOAD_ADDRESS as _
 }
 
-/// Return the inclusive range spanning the relocated kernel binary.
-///
-/// # Safety
-///
-/// - Values are provided by the linker script and must be trusted as-is.
-/// - The linker-provided addresses must be u64 aligned.
-pub fn relocated_binary_range_inclusive() -> RangeInclusive<*mut u64> {
-    unsafe { RangeInclusive::new(__binary_start.get(), __binary_end_inclusive.get()) }
-}
-
-/// The relocated address of function `runtime_init()`.
-#[inline(always)]
-pub fn relocated_runtime_init_addr() -> *const u64 {
-    unsafe { __runtime_init_reloc.get() as _ }
-}
-
 /// Return the inclusive range spanning the relocated .bss section.
 ///
 /// # Safety
 ///
 /// - Values are provided by the linker script and must be trusted as-is.
 /// - The linker-provided addresses must be u64 aligned.
-pub fn relocated_bss_range_inclusive() -> RangeInclusive<*mut u64> {
+pub fn bss_range_inclusive() -> RangeInclusive<*mut u64> {
     let range;
     unsafe {
         range = RangeInclusive::new(__bss_start.get(), __bss_end_inclusive.get());
diff --git a/07_uart_chainloader/src/cpu.rs b/07_uart_chainloader/src/cpu.rs
index 7de5c29c1..c5e956ea6 100644
--- a/07_uart_chainloader/src/cpu.rs
+++ b/07_uart_chainloader/src/cpu.rs
@@ -10,12 +10,10 @@ mod arch_cpu;
 
 mod boot;
 
-pub mod smp;
-
 //--------------------------------------------------------------------------------------------------
 // Architectural Public Reexports
 //--------------------------------------------------------------------------------------------------
-pub use arch_cpu::{branch_to_raw_addr, nop, wait_forever};
+pub use arch_cpu::{nop, wait_forever};
 
 #[cfg(feature = "bsp_rpi3")]
 pub use arch_cpu::spin_for_cycles;
diff --git a/07_uart_chainloader/src/cpu/smp.rs b/07_uart_chainloader/src/cpu/smp.rs
deleted file mode 100644
index 38230ce1e..000000000
--- a/07_uart_chainloader/src/cpu/smp.rs
+++ /dev/null
@@ -1,14 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Symmetric multiprocessing.
-
-#[cfg(target_arch = "aarch64")]
-#[path = "../_arch/aarch64/cpu/smp.rs"]
-mod arch_smp;
-
-//--------------------------------------------------------------------------------------------------
-// Architectural Public Reexports
-//--------------------------------------------------------------------------------------------------
-pub use arch_smp::core_id;
diff --git a/07_uart_chainloader/src/main.rs b/07_uart_chainloader/src/main.rs
index 4fc6449af..1ac8140cc 100644
--- a/07_uart_chainloader/src/main.rs
+++ b/07_uart_chainloader/src/main.rs
@@ -100,20 +100,17 @@
 //!
 //! # Boot flow
 //!
-//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
-//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
-//! 2. Once finished with architectural setup, the arch code calls [`relocate::relocate_self()`].
-//! 3. Finally, [`runtime_init::runtime_init()`] is called.
+//! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
+//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
 //!
-//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
-//! [`relocate::relocate_self()`]: relocate/fn.relocate_self.html
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
 #![allow(clippy::clippy::upper_case_acronyms)]
 #![feature(asm)]
 #![feature(const_fn_fn_ptr_basics)]
-#![feature(core_intrinsics)]
 #![feature(format_args_nl)]
+#![feature(global_asm)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
 #![no_main]
@@ -126,7 +123,6 @@ mod driver;
 mod memory;
 mod panic_wait;
 mod print;
-mod relocate;
 mod runtime_init;
 mod synchronization;
 
diff --git a/07_uart_chainloader/src/relocate.rs b/07_uart_chainloader/src/relocate.rs
deleted file mode 100644
index 6ac6bccea..000000000
--- a/07_uart_chainloader/src/relocate.rs
+++ /dev/null
@@ -1,49 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Relocation code.
-
-use crate::{bsp, cpu};
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Relocates the own binary from `bsp::memory::board_default_load_addr()` to the `__binary_start`
-/// address from the linker script.
-///
-/// # Safety
-///
-/// - Only a single core must be active and running this function.
-/// - Function must not use the `bss` section.
-#[inline(never)]
-pub unsafe fn relocate_self() -> ! {
-    let range = bsp::memory::relocated_binary_range_inclusive();
-    let mut relocated_binary_start_addr = *range.start();
-    let relocated_binary_end_addr_inclusive = *range.end();
-
-    // The address of where the previous firmware loaded us.
-    let mut current_binary_start_addr = bsp::memory::board_default_load_addr();
-
-    // Copy the whole binary.
-    while relocated_binary_start_addr <= relocated_binary_end_addr_inclusive {
-        core::ptr::write_volatile(
-            relocated_binary_start_addr,
-            core::ptr::read_volatile(current_binary_start_addr),
-        );
-        relocated_binary_start_addr = relocated_binary_start_addr.offset(1);
-        current_binary_start_addr = current_binary_start_addr.offset(1);
-    }
-
-    // The following function calls realize an "absolute jump" to `runtime_init::runtime_init()` by
-    // forcing an indirection through the global offset table (GOT), so that execution continues
-    // from the relocated binary.
-    //
-    // Without the indirection through the assembly, the address of `runtime_init()` would be
-    // calculated as a relative offset from the current program counter, since we are compiling as
-    // `position independent code`. This would cause us to keep executing from the address to which
-    // the firmware loaded us, instead of the relocated position.
-    let relocated_runtime_init_addr = bsp::memory::relocated_runtime_init_addr() as usize;
-    cpu::branch_to_raw_addr(relocated_runtime_init_addr)
-}
diff --git a/07_uart_chainloader/src/runtime_init.rs b/07_uart_chainloader/src/runtime_init.rs
index 5e9b74974..ee0946863 100644
--- a/07_uart_chainloader/src/runtime_init.rs
+++ b/07_uart_chainloader/src/runtime_init.rs
@@ -17,7 +17,7 @@ use crate::{bsp, memory};
 /// - Must only be called pre `kernel_init()`.
 #[inline(always)]
 unsafe fn zero_bss() {
-    memory::zero_volatile(bsp::memory::relocated_bss_range_inclusive());
+    memory::zero_volatile(bsp::memory::bss_range_inclusive());
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -30,7 +30,6 @@ unsafe fn zero_bss() {
 /// # Safety
 ///
 /// - Only a single core must be active and running this function.
-#[no_mangle]
 pub unsafe fn runtime_init() -> ! {
     zero_bss();
 
diff --git a/08_timestamps/README.md b/08_timestamps/README.md
index eebdd20cd..122308a6c 100644
--- a/08_timestamps/README.md
+++ b/08_timestamps/README.md
@@ -49,23 +49,19 @@ Binary files 07_uart_chainloader/demo_payload_rpi4.img and 08_timestamps/demo_pa
 diff -uNr 07_uart_chainloader/Makefile 08_timestamps/Makefile
 --- 07_uart_chainloader/Makefile
 +++ 08_timestamps/Makefile
-@@ -24,8 +24,7 @@
-     NM_BINARY         = aarch64-none-elf-nm
+@@ -25,7 +25,6 @@
      READELF_BINARY    = aarch64-none-elf-readelf
      LINKER_FILE       = src/bsp/raspberrypi/link.ld
--    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53 -C relocation-model=pic
+     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 -    CHAINBOOT_DEMO_PAYLOAD = demo_payload_rpi3.img
-+    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
  else ifeq ($(BSP),rpi4)
      TARGET            = aarch64-unknown-none-softfloat
      KERNEL_BIN        = kernel8.img
-@@ -36,8 +35,7 @@
-     NM_BINARY         = aarch64-none-elf-nm
+@@ -37,7 +36,6 @@
      READELF_BINARY    = aarch64-none-elf-readelf
      LINKER_FILE       = src/bsp/raspberrypi/link.ld
--    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72 -C relocation-model=pic
+     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 -    CHAINBOOT_DEMO_PAYLOAD = demo_payload_rpi4.img
-+    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
  endif
 
  # Export for build.rs
@@ -97,23 +93,47 @@ diff -uNr 07_uart_chainloader/Makefile 08_timestamps/Makefile
  clippy:
  	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
-diff -uNr 07_uart_chainloader/src/_arch/aarch64/cpu/boot.rs 08_timestamps/src/_arch/aarch64/cpu/boot.rs
---- 07_uart_chainloader/src/_arch/aarch64/cpu/boot.rs
-+++ 08_timestamps/src/_arch/aarch64/cpu/boot.rs
-@@ -29,11 +29,11 @@
- ///   actually set (`SP.set()`).
- #[no_mangle]
- pub unsafe fn _start() -> ! {
--    use crate::relocate;
-+    use crate::runtime_init;
-
-     if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
-         SP.set(bsp::memory::boot_core_stack_end() as u64);
--        relocate::relocate_self()
-+        runtime_init::runtime_init()
-     } else {
-         // If not core0, infinitely wait for events.
-         cpu::wait_forever()
+diff -uNr 07_uart_chainloader/src/_arch/aarch64/cpu/boot.s 08_timestamps/src/_arch/aarch64/cpu/boot.s
+--- 07_uart_chainloader/src/_arch/aarch64/cpu/boot.s
++++ 08_timestamps/src/_arch/aarch64/cpu/boot.s
+@@ -22,31 +22,20 @@
+ 	and	x1, x1, _core_id_mask
+ 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
+ 	cmp	x1, x2
+-	b.ne	2f
++	b.ne	1f
+
+-	// If execution reaches here, it is the boot core.
+-
+-	// Next, relocate the binary.
+-	adr	x0, __binary_nonzero_start          // The address the binary got loaded to.
+-	ldr	x1, =__binary_nonzero_start         // The address the binary was linked to.
+-	ldr	x2, =__binary_nonzero_end_exclusive
+-
+-1:	ldr	x3, [x0], #8
+-	str	x3, [x1], #8
+-	cmp	x1, x2
+-	b.lo	1b
++	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
+
+ 	// Set the stack pointer.
+ 	ldr	x0, =__boot_core_stack_end_exclusive
+ 	mov	sp, x0
+
+-	// Jump to the relocated Rust code.
+-	ldr	x1, =_start_rust
+-	br	x1
++	// Jump to Rust code.
++	b	_start_rust
+
+ 	// Infinitely wait for events (aka "park the core").
+-2:	wfe
+-	b	2b
++1:	wfe
++	b	1b
+
+ .size	_start, . - _start
+ .type	_start, function
 
 diff -uNr 07_uart_chainloader/src/_arch/aarch64/cpu.rs 08_timestamps/src/_arch/aarch64/cpu.rs
 --- 07_uart_chainloader/src/_arch/aarch64/cpu.rs
@@ -134,26 +154,6 @@ diff -uNr 07_uart_chainloader/src/_arch/aarch64/cpu.rs 08_timestamps/src/_arch/a
  /// Pause execution on the core.
  #[inline(always)]
  pub fn wait_forever() -> ! {
-@@ -35,19 +26,3 @@
-         asm::wfe()
-     }
- }
--
--/// Branch to a raw integer value.
--///
--/// # Safety
--///
--/// - This is highly unsafe. Use with care.
--#[inline(always)]
--pub unsafe fn branch_to_raw_addr(addr: usize) -> ! {
--    asm!(
--        "blr {destination:x}",
--        destination = in(reg) addr,
--        options(nomem, nostack)
--    );
--
--    core::intrinsics::unreachable()
--}
 
 diff -uNr 07_uart_chainloader/src/_arch/aarch64/time.rs 08_timestamps/src/_arch/aarch64/time.rs
 --- 07_uart_chainloader/src/_arch/aarch64/time.rs
@@ -361,58 +361,46 @@ diff -uNr 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 08
 diff -uNr 07_uart_chainloader/src/bsp/raspberrypi/link.ld 08_timestamps/src/bsp/raspberrypi/link.ld
 --- 07_uart_chainloader/src/bsp/raspberrypi/link.ld
 +++ 08_timestamps/src/bsp/raspberrypi/link.ld
-@@ -16,13 +16,12 @@
+@@ -16,8 +16,7 @@
 
  SECTIONS
  {
 -    /* Set the link address to 32 MiB */
 -    . = 0x2000000;
 +    . =  __rpi_load_addr;
-
+                                         /*   ^             */
+                                         /*   | stack       */
+                                         /*   | growth      */
+@@ -27,7 +26,6 @@
      /***********************************************************************************************
      * Code + RO Data + Global Offset Table
      ***********************************************************************************************/
--    __binary_start = .;
-+    __rx_start = .;
+-    __binary_nonzero_start = .;
      .text :
      {
          KEEP(*(.text._start))
-@@ -47,10 +46,4 @@
-         . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-         __bss_end_inclusive = . - 8;
-     } :NONE
--
+@@ -51,12 +49,8 @@
+     ***********************************************************************************************/
+     .data : { *(.data*) } :segment_rw
+
 -    /* Fill up to 8 byte, b/c relocating the binary is done in u64 chunks */
 -    . = ALIGN(8);
--    __binary_end_inclusive = . - 8;
+-    __binary_nonzero_end_exclusive = .;
 -
--    __runtime_init_reloc = runtime_init;
- }
+     /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
+-    .bss :
++    .bss : ALIGN(8)
+     {
+         __bss_start = .;
+         *(.bss*);
 
 diff -uNr 07_uart_chainloader/src/bsp/raspberrypi/memory.rs 08_timestamps/src/bsp/raspberrypi/memory.rs
 --- 07_uart_chainloader/src/bsp/raspberrypi/memory.rs
 +++ 08_timestamps/src/bsp/raspberrypi/memory.rs
-@@ -12,12 +12,10 @@
-
- // Symbols from the linker script.
- extern "Rust" {
--    static __binary_start: UnsafeCell<u64>;
-+    static __rx_start: UnsafeCell<()>;
-+
-     static __bss_start: UnsafeCell<u64>;
-     static __bss_end_inclusive: UnsafeCell<u64>;
--    static __binary_end_inclusive: UnsafeCell<u64>;
--
--    static __runtime_init_reloc: UnsafeCell<u64>;
- }
-
- //--------------------------------------------------------------------------------------------------
-@@ -27,12 +25,9 @@
+@@ -23,10 +23,9 @@
  /// The board's physical memory map.
  #[rustfmt::skip]
  pub(super) mod map {
--    pub const BOOT_CORE_STACK_END:        usize =        0x8_0000;
--
 -    pub const BOARD_DEFAULT_LOAD_ADDRESS: usize =        0x8_0000;
 
 -    pub const GPIO_OFFSET:                usize =        0x0020_0000;
@@ -422,114 +410,53 @@ diff -uNr 07_uart_chainloader/src/bsp/raspberrypi/memory.rs 08_timestamps/src/bs
 
      /// Physical devices.
      #[cfg(feature = "bsp_rpi3")]
-@@ -56,44 +51,36 @@
- }
-
- //--------------------------------------------------------------------------------------------------
--// Public Code
-+// Private Code
+@@ -53,13 +52,7 @@
+ // Public Code
  //--------------------------------------------------------------------------------------------------
 
--/// Exclusive end address of the boot core's stack.
--#[inline(always)]
--pub fn boot_core_stack_end() -> usize {
--    map::BOOT_CORE_STACK_END
--}
--
 -/// The address on which the Raspberry firmware loads every binary by default.
 -#[inline(always)]
 -pub fn board_default_load_addr() -> *const u64 {
 -    map::BOARD_DEFAULT_LOAD_ADDRESS as _
 -}
 -
--/// Return the inclusive range spanning the relocated kernel binary.
-+/// Start address of the Read+Execute (RX) range.
- ///
- /// # Safety
- ///
--/// - Values are provided by the linker script and must be trusted as-is.
--/// - The linker-provided addresses must be u64 aligned.
--pub fn relocated_binary_range_inclusive() -> RangeInclusive<*mut u64> {
--    unsafe { RangeInclusive::new(__binary_start.get(), __binary_end_inclusive.get()) }
-+/// - Value is provided by the linker script and must be trusted as-is.
-+#[inline(always)]
-+fn rx_start() -> usize {
-+    unsafe { __rx_start.get() as usize }
- }
-
--/// The relocated address of function `runtime_init()`.
-+//--------------------------------------------------------------------------------------------------
-+// Public Code
-+//--------------------------------------------------------------------------------------------------
-+
-+/// Exclusive end address of the boot core's stack.
- #[inline(always)]
--pub fn relocated_runtime_init_addr() -> *const u64 {
--    unsafe { __runtime_init_reloc.get() as _ }
-+pub fn boot_core_stack_end() -> usize {
-+    rx_start()
- }
-
 -/// Return the inclusive range spanning the relocated .bss section.
 +/// Return the inclusive range spanning the .bss section.
  ///
  /// # Safety
  ///
- /// - Values are provided by the linker script and must be trusted as-is.
- /// - The linker-provided addresses must be u64 aligned.
--pub fn relocated_bss_range_inclusive() -> RangeInclusive<*mut u64> {
-+pub fn bss_range_inclusive() -> RangeInclusive<*mut u64> {
-     let range;
-     unsafe {
-         range = RangeInclusive::new(__bss_start.get(), __bss_end_inclusive.get());
 
 diff -uNr 07_uart_chainloader/src/cpu.rs 08_timestamps/src/cpu.rs
 --- 07_uart_chainloader/src/cpu.rs
 +++ 08_timestamps/src/cpu.rs
-@@ -15,7 +15,4 @@
- //--------------------------------------------------------------------------------------------------
+@@ -14,6 +14,3 @@
  // Architectural Public Reexports
  //--------------------------------------------------------------------------------------------------
--pub use arch_cpu::{branch_to_raw_addr, nop, wait_forever};
+ pub use arch_cpu::{nop, wait_forever};
 -
 -#[cfg(feature = "bsp_rpi3")]
 -pub use arch_cpu::spin_for_cycles;
-+pub use arch_cpu::{nop, wait_forever};
 
 diff -uNr 07_uart_chainloader/src/main.rs 08_timestamps/src/main.rs
 --- 07_uart_chainloader/src/main.rs
 +++ 08_timestamps/src/main.rs
-@@ -102,17 +102,13 @@
- //!
- //! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
- //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
--//! 2. Once finished with architectural setup, the arch code calls [`relocate::relocate_self()`].
--//! 3. Finally, [`runtime_init::runtime_init()`] is called.
-+//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
- //!
- //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
--//! [`relocate::relocate_self()`]: relocate/fn.relocate_self.html
+@@ -107,7 +107,6 @@
  //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
  #![allow(clippy::clippy::upper_case_acronyms)]
 -#![feature(asm)]
  #![feature(const_fn_fn_ptr_basics)]
--#![feature(core_intrinsics)]
  #![feature(format_args_nl)]
- #![feature(panic_info_message)]
- #![feature(trait_alias)]
-@@ -126,9 +122,9 @@
- mod memory;
- mod panic_wait;
+ #![feature(global_asm)]
+@@ -125,6 +124,7 @@
  mod print;
--mod relocate;
  mod runtime_init;
  mod synchronization;
 +mod time;
 
  /// Early init code.
  ///
-@@ -153,51 +149,31 @@
+@@ -149,51 +149,31 @@
 
  /// The main function running after the early init.
  fn kernel_main() -> ! {
@@ -680,81 +607,6 @@ diff -uNr 07_uart_chainloader/src/print.rs 08_timestamps/src/print.rs
 +    })
 +}
 
-diff -uNr 07_uart_chainloader/src/relocate.rs 08_timestamps/src/relocate.rs
---- 07_uart_chainloader/src/relocate.rs
-+++ 08_timestamps/src/relocate.rs
-@@ -1,49 +0,0 @@
--// SPDX-License-Identifier: MIT OR Apache-2.0
--//
--// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
--
--//! Relocation code.
--
--use crate::{bsp, cpu};
--
--//--------------------------------------------------------------------------------------------------
--// Public Code
--//--------------------------------------------------------------------------------------------------
--
--/// Relocates the own binary from `bsp::memory::board_default_load_addr()` to the `__binary_start`
--/// address from the linker script.
--///
--/// # Safety
--///
--/// - Only a single core must be active and running this function.
--/// - Function must not use the `bss` section.
--#[inline(never)]
--pub unsafe fn relocate_self() -> ! {
--    let range = bsp::memory::relocated_binary_range_inclusive();
--    let mut relocated_binary_start_addr = *range.start();
--    let relocated_binary_end_addr_inclusive = *range.end();
--
--    // The address of where the previous firmware loaded us.
--    let mut current_binary_start_addr = bsp::memory::board_default_load_addr();
--
--    // Copy the whole binary.
--    while relocated_binary_start_addr <= relocated_binary_end_addr_inclusive {
--        core::ptr::write_volatile(
--            relocated_binary_start_addr,
--            core::ptr::read_volatile(current_binary_start_addr),
--        );
--        relocated_binary_start_addr = relocated_binary_start_addr.offset(1);
--        current_binary_start_addr = current_binary_start_addr.offset(1);
--    }
--
--    // The following function calls realize an "absolute jump" to `runtime_init::runtime_init()` by
--    // forcing an indirection through the global offset table (GOT), so that execution continues
--    // from the relocated binary.
--    //
--    // Without the indirection through the assembly, the address of `runtime_init()` would be
--    // calculated as a relative offset from the current program counter, since we are compiling as
--    // `position independent code`. This would cause us to keep executing from the address to which
--    // the firmware loaded us, instead of the relocated position.
--    let relocated_runtime_init_addr = bsp::memory::relocated_runtime_init_addr() as usize;
--    cpu::branch_to_raw_addr(relocated_runtime_init_addr)
--}
-
-diff -uNr 07_uart_chainloader/src/runtime_init.rs 08_timestamps/src/runtime_init.rs
---- 07_uart_chainloader/src/runtime_init.rs
-+++ 08_timestamps/src/runtime_init.rs
-@@ -17,7 +17,7 @@
- /// - Must only be called pre `kernel_init()`.
- #[inline(always)]
- unsafe fn zero_bss() {
--    memory::zero_volatile(bsp::memory::relocated_bss_range_inclusive());
-+    memory::zero_volatile(bsp::memory::bss_range_inclusive());
- }
-
- //--------------------------------------------------------------------------------------------------
-@@ -30,7 +30,6 @@
- /// # Safety
- ///
- /// - Only a single core must be active and running this function.
--#[no_mangle]
- pub unsafe fn runtime_init() -> ! {
-     zero_bss();
-
-
 diff -uNr 07_uart_chainloader/src/time.rs 08_timestamps/src/time.rs
 --- 07_uart_chainloader/src/time.rs
 +++ 08_timestamps/src/time.rs
diff --git a/08_timestamps/src/_arch/aarch64/cpu/boot.rs b/08_timestamps/src/_arch/aarch64/cpu/boot.rs
index 549b5927a..c85bb94b8 100644
--- a/08_timestamps/src/_arch/aarch64/cpu/boot.rs
+++ b/08_timestamps/src/_arch/aarch64/cpu/boot.rs
@@ -11,31 +11,23 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-use crate::{bsp, cpu};
-use cortex_a::regs::*;
+use crate::runtime_init;
+
+// Assembly counterpart to this file.
+global_asm!(include_str!("boot.s"));
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// The entry of the `kernel` binary.
+/// The Rust entry of the `kernel` binary.
 ///
-/// The function must be named `_start`, because the linker is looking for this exact name.
+/// The function is called from the assembly `_start` function.
 ///
 /// # Safety
 ///
-/// - Linker script must ensure to place this function where it is expected by the target machine.
-/// - We have to hope that the compiler omits any stack pointer usage before the stack pointer is
-///   actually set (`SP.set()`).
+/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
 #[no_mangle]
-pub unsafe fn _start() -> ! {
-    use crate::runtime_init;
-
-    if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
-        SP.set(bsp::memory::boot_core_stack_end() as u64);
-        runtime_init::runtime_init()
-    } else {
-        // If not core0, infinitely wait for events.
-        cpu::wait_forever()
-    }
+pub unsafe fn _start_rust() -> ! {
+    runtime_init::runtime_init()
 }
diff --git a/08_timestamps/src/_arch/aarch64/cpu/boot.s b/08_timestamps/src/_arch/aarch64/cpu/boot.s
new file mode 100644
index 000000000..ad4a26892
--- /dev/null
+++ b/08_timestamps/src/_arch/aarch64/cpu/boot.s
@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//--------------------------------------------------------------------------------------------------
+// Definitions
+//--------------------------------------------------------------------------------------------------
+
+.equ _core_id_mask, 0b11
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+.section .text._start
+
+//------------------------------------------------------------------------------
+// fn _start()
+//------------------------------------------------------------------------------
+_start:
+	// Only proceed on the boot core. Park it otherwise.
+	mrs	x1, MPIDR_EL1
+	and	x1, x1, _core_id_mask
+	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
+	cmp	x1, x2
+	b.ne	1f
+
+	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
+
+	// Set the stack pointer.
+	ldr	x0, =__boot_core_stack_end_exclusive
+	mov	sp, x0
+
+	// Jump to Rust code.
+	b	_start_rust
+
+	// Infinitely wait for events (aka "park the core").
+1:	wfe
+	b	1b
+
+.size	_start, . - _start
+.type	_start, function
+.global	_start
diff --git a/08_timestamps/src/_arch/aarch64/cpu/smp.rs b/08_timestamps/src/_arch/aarch64/cpu/smp.rs
deleted file mode 100644
index b9fdd0f73..000000000
--- a/08_timestamps/src/_arch/aarch64/cpu/smp.rs
+++ /dev/null
@@ -1,29 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Architectural symmetric multiprocessing.
-//!
-//! # Orientation
-//!
-//! Since arch modules are imported into generic modules using the path attribute, the path of this
-//! file is:
-//!
-//! crate::cpu::smp::arch_smp
-
-use cortex_a::regs::*;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return the executing core's id.
-#[inline(always)]
-pub fn core_id<T>() -> T
-where
-    T: From<u8>,
-{
-    const CORE_MASK: u64 = 0b11;
-
-    T::from((MPIDR_EL1.get() & CORE_MASK) as u8)
-}
diff --git a/08_timestamps/src/bsp/raspberrypi/cpu.rs b/08_timestamps/src/bsp/raspberrypi/cpu.rs
index 16ab927d7..d09ff9568 100644
--- a/08_timestamps/src/bsp/raspberrypi/cpu.rs
+++ b/08_timestamps/src/bsp/raspberrypi/cpu.rs
@@ -9,4 +9,6 @@
 //--------------------------------------------------------------------------------------------------
 
 /// Used by `arch` code to find the early boot core.
-pub const BOOT_CORE_ID: u64 = 0;
+#[no_mangle]
+#[link_section = ".text._start_arguments"]
+pub static BOOT_CORE_ID: u64 = 0;
diff --git a/08_timestamps/src/bsp/raspberrypi/link.ld b/08_timestamps/src/bsp/raspberrypi/link.ld
index 87e6a976f..3b73b3c7e 100644
--- a/08_timestamps/src/bsp/raspberrypi/link.ld
+++ b/08_timestamps/src/bsp/raspberrypi/link.ld
@@ -17,15 +17,28 @@ PHDRS
 SECTIONS
 {
     . =  __rpi_load_addr;
+                                        /*   ^             */
+                                        /*   | stack       */
+                                        /*   | growth      */
+                                        /*   | direction   */
+   __boot_core_stack_end_exclusive = .; /*   |             */
 
     /***********************************************************************************************
     * Code + RO Data + Global Offset Table
     ***********************************************************************************************/
-    __rx_start = .;
     .text :
     {
         KEEP(*(.text._start))
-        *(.text*)
+
+        /* Special constants (or statics in Rust speak) needed by _start().
+         *
+         * They are placed in close proximity to _start() from where they will be read. This ensures
+         * that position-independent, PC-relative loads can be emitted.
+         */
+        *(.text._start_arguments)
+
+        *(.text._start_rust) /* The Rust entry point */
+        *(.text*)            /* Everything else */
     } :segment_rx
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
diff --git a/08_timestamps/src/bsp/raspberrypi/memory.rs b/08_timestamps/src/bsp/raspberrypi/memory.rs
index 56a3306e5..c6d65e36b 100644
--- a/08_timestamps/src/bsp/raspberrypi/memory.rs
+++ b/08_timestamps/src/bsp/raspberrypi/memory.rs
@@ -12,8 +12,6 @@ use core::{cell::UnsafeCell, ops::RangeInclusive};
 
 // Symbols from the linker script.
 extern "Rust" {
-    static __rx_start: UnsafeCell<()>;
-
     static __bss_start: UnsafeCell<u64>;
     static __bss_end_inclusive: UnsafeCell<u64>;
 }
@@ -50,30 +48,10 @@ pub(super) mod map {
     }
 }
 
-//--------------------------------------------------------------------------------------------------
-// Private Code
-//--------------------------------------------------------------------------------------------------
-
-/// Start address of the Read+Execute (RX) range.
-///
-/// # Safety
-///
-/// - Value is provided by the linker script and must be trusted as-is.
-#[inline(always)]
-fn rx_start() -> usize {
-    unsafe { __rx_start.get() as usize }
-}
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// Exclusive end address of the boot core's stack.
-#[inline(always)]
-pub fn boot_core_stack_end() -> usize {
-    rx_start()
-}
-
 /// Return the inclusive range spanning the .bss section.
 ///
 /// # Safety
diff --git a/08_timestamps/src/cpu.rs b/08_timestamps/src/cpu.rs
index 3834f183c..7a095cb12 100644
--- a/08_timestamps/src/cpu.rs
+++ b/08_timestamps/src/cpu.rs
@@ -10,8 +10,6 @@ mod arch_cpu;
 
 mod boot;
 
-pub mod smp;
-
 //--------------------------------------------------------------------------------------------------
 // Architectural Public Reexports
 //--------------------------------------------------------------------------------------------------
diff --git a/08_timestamps/src/cpu/smp.rs b/08_timestamps/src/cpu/smp.rs
deleted file mode 100644
index 38230ce1e..000000000
--- a/08_timestamps/src/cpu/smp.rs
+++ /dev/null
@@ -1,14 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Symmetric multiprocessing.
-
-#[cfg(target_arch = "aarch64")]
-#[path = "../_arch/aarch64/cpu/smp.rs"]
-mod arch_smp;
-
-//--------------------------------------------------------------------------------------------------
-// Architectural Public Reexports
-//--------------------------------------------------------------------------------------------------
-pub use arch_smp::core_id;
diff --git a/08_timestamps/src/main.rs b/08_timestamps/src/main.rs
index 14e1d0ab3..b7a74ea6b 100644
--- a/08_timestamps/src/main.rs
+++ b/08_timestamps/src/main.rs
@@ -100,16 +100,16 @@
 //!
 //! # Boot flow
 //!
-//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
-//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
+//! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
 //! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
 //!
-//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
 #![allow(clippy::clippy::upper_case_acronyms)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
+#![feature(global_asm)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
 #![no_main]
diff --git a/09_hw_debug_JTAG/README.md b/09_hw_debug_JTAG/README.md
index b13e1fa7f..0c9fb497d 100644
--- a/09_hw_debug_JTAG/README.md
+++ b/09_hw_debug_JTAG/README.md
@@ -54,6 +54,7 @@ infrastructure for JTAG debugging around it.
 We need to add another line to the `config.txt` file from the SD Card:
 
 ```toml
+arm_64bit=1
 init_uart_clock=48000000
 enable_jtag_gpio=1
 ```
@@ -234,15 +235,16 @@ $ make gdb
 [...]
 >>> target remote :3333                          # Connect to OpenOCD, core0
 >>> load                                         # Load the kernel into the RPi's DRAM over JTAG.
-Loading section .text, size 0x2340 lma 0x80000
-Loading section .rodata, size 0xc2d lma 0x82340
-Loading section .data, size 0x20 lma 0x82f70
-Start address 0x80000, load size 12173
-Transfer rate: 65 KB/sec, 4057 bytes/write.
+Loading section .text, size 0x2454 lma 0x80000
+Loading section .rodata, size 0xa1d lma 0x82460
+Loading section .got, size 0x10 lma 0x82e80
+Loading section .data, size 0x20 lma 0x82e90
+Start address 0x0000000000080000, load size 11937
+Transfer rate: 63 KB/sec, 2984 bytes/write.
 >>> set $pc = 0x80000                            # Set RPI's program counter to the start of the
                                                  # kernel binary.
->>> break main.rs:70
-Breakpoint 1 at 0x80108: file src/main.rs, line 153.
+>>> break main.rs:158
+Breakpoint 1 at 0x8025c: file src/main.rs, line 158.
 >>> cont
 >>> step                                         # Single-step through the kernel
 >>> step
diff --git a/09_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs b/09_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs
index 549b5927a..c85bb94b8 100644
--- a/09_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs
+++ b/09_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs
@@ -11,31 +11,23 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-use crate::{bsp, cpu};
-use cortex_a::regs::*;
+use crate::runtime_init;
+
+// Assembly counterpart to this file.
+global_asm!(include_str!("boot.s"));
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// The entry of the `kernel` binary.
+/// The Rust entry of the `kernel` binary.
 ///
-/// The function must be named `_start`, because the linker is looking for this exact name.
+/// The function is called from the assembly `_start` function.
 ///
 /// # Safety
 ///
-/// - Linker script must ensure to place this function where it is expected by the target machine.
-/// - We have to hope that the compiler omits any stack pointer usage before the stack pointer is
-///   actually set (`SP.set()`).
+/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
 #[no_mangle]
-pub unsafe fn _start() -> ! {
-    use crate::runtime_init;
-
-    if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
-        SP.set(bsp::memory::boot_core_stack_end() as u64);
-        runtime_init::runtime_init()
-    } else {
-        // If not core0, infinitely wait for events.
-        cpu::wait_forever()
-    }
+pub unsafe fn _start_rust() -> ! {
+    runtime_init::runtime_init()
 }
diff --git a/09_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s b/09_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s
new file mode 100644
index 000000000..ad4a26892
--- /dev/null
+++ b/09_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s
@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//--------------------------------------------------------------------------------------------------
+// Definitions
+//--------------------------------------------------------------------------------------------------
+
+.equ _core_id_mask, 0b11
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+.section .text._start
+
+//------------------------------------------------------------------------------
+// fn _start()
+//------------------------------------------------------------------------------
+_start:
+	// Only proceed on the boot core. Park it otherwise.
+	mrs	x1, MPIDR_EL1
+	and	x1, x1, _core_id_mask
+	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
+	cmp	x1, x2
+	b.ne	1f
+
+	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
+
+	// Set the stack pointer.
+	ldr	x0, =__boot_core_stack_end_exclusive
+	mov	sp, x0
+
+	// Jump to Rust code.
+	b	_start_rust
+
+	// Infinitely wait for events (aka "park the core").
+1:	wfe
+	b	1b
+
+.size	_start, . - _start
+.type	_start, function
+.global	_start
diff --git a/09_hw_debug_JTAG/src/_arch/aarch64/cpu/smp.rs b/09_hw_debug_JTAG/src/_arch/aarch64/cpu/smp.rs
deleted file mode 100644
index b9fdd0f73..000000000
--- a/09_hw_debug_JTAG/src/_arch/aarch64/cpu/smp.rs
+++ /dev/null
@@ -1,29 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Architectural symmetric multiprocessing.
-//!
-//! # Orientation
-//!
-//! Since arch modules are imported into generic modules using the path attribute, the path of this
-//! file is:
-//!
-//! crate::cpu::smp::arch_smp
-
-use cortex_a::regs::*;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return the executing core's id.
-#[inline(always)]
-pub fn core_id<T>() -> T
-where
-    T: From<u8>,
-{
-    const CORE_MASK: u64 = 0b11;
-
-    T::from((MPIDR_EL1.get() & CORE_MASK) as u8)
-}
diff --git a/09_hw_debug_JTAG/src/bsp/raspberrypi/cpu.rs b/09_hw_debug_JTAG/src/bsp/raspberrypi/cpu.rs
index 16ab927d7..d09ff9568 100644
--- a/09_hw_debug_JTAG/src/bsp/raspberrypi/cpu.rs
+++ b/09_hw_debug_JTAG/src/bsp/raspberrypi/cpu.rs
@@ -9,4 +9,6 @@
 //--------------------------------------------------------------------------------------------------
 
 /// Used by `arch` code to find the early boot core.
-pub const BOOT_CORE_ID: u64 = 0;
+#[no_mangle]
+#[link_section = ".text._start_arguments"]
+pub static BOOT_CORE_ID: u64 = 0;
diff --git a/09_hw_debug_JTAG/src/bsp/raspberrypi/link.ld b/09_hw_debug_JTAG/src/bsp/raspberrypi/link.ld
index 87e6a976f..3b73b3c7e 100644
--- a/09_hw_debug_JTAG/src/bsp/raspberrypi/link.ld
+++ b/09_hw_debug_JTAG/src/bsp/raspberrypi/link.ld
@@ -17,15 +17,28 @@ PHDRS
 SECTIONS
 {
     . =  __rpi_load_addr;
+                                        /*   ^             */
+                                        /*   | stack       */
+                                        /*   | growth      */
+                                        /*   | direction   */
+   __boot_core_stack_end_exclusive = .; /*   |             */
 
     /***********************************************************************************************
     * Code + RO Data + Global Offset Table
     ***********************************************************************************************/
-    __rx_start = .;
     .text :
     {
         KEEP(*(.text._start))
-        *(.text*)
+
+        /* Special constants (or statics in Rust speak) needed by _start().
+         *
+         * They are placed in close proximity to _start() from where they will be read. This ensures
+         * that position-independent, PC-relative loads can be emitted.
+         */
+        *(.text._start_arguments)
+
+        *(.text._start_rust) /* The Rust entry point */
+        *(.text*)            /* Everything else */
     } :segment_rx
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
diff --git a/09_hw_debug_JTAG/src/bsp/raspberrypi/memory.rs b/09_hw_debug_JTAG/src/bsp/raspberrypi/memory.rs
index 56a3306e5..c6d65e36b 100644
--- a/09_hw_debug_JTAG/src/bsp/raspberrypi/memory.rs
+++ b/09_hw_debug_JTAG/src/bsp/raspberrypi/memory.rs
@@ -12,8 +12,6 @@ use core::{cell::UnsafeCell, ops::RangeInclusive};
 
 // Symbols from the linker script.
 extern "Rust" {
-    static __rx_start: UnsafeCell<()>;
-
     static __bss_start: UnsafeCell<u64>;
     static __bss_end_inclusive: UnsafeCell<u64>;
 }
@@ -50,30 +48,10 @@ pub(super) mod map {
     }
 }
 
-//--------------------------------------------------------------------------------------------------
-// Private Code
-//--------------------------------------------------------------------------------------------------
-
-/// Start address of the Read+Execute (RX) range.
-///
-/// # Safety
-///
-/// - Value is provided by the linker script and must be trusted as-is.
-#[inline(always)]
-fn rx_start() -> usize {
-    unsafe { __rx_start.get() as usize }
-}
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// Exclusive end address of the boot core's stack.
-#[inline(always)]
-pub fn boot_core_stack_end() -> usize {
-    rx_start()
-}
-
 /// Return the inclusive range spanning the .bss section.
 ///
 /// # Safety
diff --git a/09_hw_debug_JTAG/src/cpu.rs b/09_hw_debug_JTAG/src/cpu.rs
index 3834f183c..7a095cb12 100644
--- a/09_hw_debug_JTAG/src/cpu.rs
+++ b/09_hw_debug_JTAG/src/cpu.rs
@@ -10,8 +10,6 @@ mod arch_cpu;
 
 mod boot;
 
-pub mod smp;
-
 //--------------------------------------------------------------------------------------------------
 // Architectural Public Reexports
 //--------------------------------------------------------------------------------------------------
diff --git a/09_hw_debug_JTAG/src/cpu/smp.rs b/09_hw_debug_JTAG/src/cpu/smp.rs
deleted file mode 100644
index 38230ce1e..000000000
--- a/09_hw_debug_JTAG/src/cpu/smp.rs
+++ /dev/null
@@ -1,14 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Symmetric multiprocessing.
-
-#[cfg(target_arch = "aarch64")]
-#[path = "../_arch/aarch64/cpu/smp.rs"]
-mod arch_smp;
-
-//--------------------------------------------------------------------------------------------------
-// Architectural Public Reexports
-//--------------------------------------------------------------------------------------------------
-pub use arch_smp::core_id;
diff --git a/09_hw_debug_JTAG/src/main.rs b/09_hw_debug_JTAG/src/main.rs
index 14e1d0ab3..b7a74ea6b 100644
--- a/09_hw_debug_JTAG/src/main.rs
+++ b/09_hw_debug_JTAG/src/main.rs
@@ -100,16 +100,16 @@
 //!
 //! # Boot flow
 //!
-//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
-//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
+//! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
 //! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
 //!
-//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
 #![allow(clippy::clippy::upper_case_acronyms)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
+#![feature(global_asm)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
 #![no_main]
diff --git a/10_privilege_level/README.md b/10_privilege_level/README.md
index 2c4355487..3e160e22d 100644
--- a/10_privilege_level/README.md
+++ b/10_privilege_level/README.md
@@ -12,7 +12,6 @@
 - [Checking for EL2 in the entrypoint](#checking-for-el2-in-the-entrypoint)
 - [Transition preparation](#transition-preparation)
 - [Returning from an exception that never happened](#returning-from-an-exception-that-never-happened)
-- [Are we stackless?](#are-we-stackless)
 - [Test it](#test-it)
 - [Diff to previous](#diff-to-previous)
 
@@ -39,32 +38,35 @@ ARMv8-A] before you continue. It gives a concise overview about the topic.
 
 ## Scope of this tutorial
 
-By default, the Rpi will always start executing in `EL2`. Since we are writing a traditional
+By default, the Raspberry will always start executing in `EL2`. Since we are writing a traditional
 `Kernel`, we have to transition into the more appropriate `EL1`.
 
 ## Checking for EL2 in the entrypoint
 
 First of all, we need to ensure that we actually execute in `EL2` before we can call respective code
-to transition to `EL1`:
+to transition to `EL1`. Therefore, we add a new checkt to the top of `boot.s`, which parks the CPU
+core should it not be in `EL2`.
+
+```
+// Only proceed if the core executes in EL2. Park it otherwise.
+mrs	x0, CurrentEL
+cmp	x0, _EL2
+b.ne	1f
+```
+
+Afterwards, we continue with preparing the `EL2` -> `EL1` transition by calling
+`prepare_el2_to_el1_transition()` in `boot.rs`:
 
 ```rust
 #[no_mangle]
-pub unsafe fn _start() -> ! {
-    // Expect the boot core to start in EL2.
-    if (bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id())
-        && (CurrentEL.get() == CurrentEL::EL::EL2.value)
-    {
-        el2_to_el1_transition()
-    } else {
-        // If not core0, infinitely wait for events.
-        cpu::wait_forever()
-    }
+pub unsafe extern "C" fn _start_rust(phys_boot_core_stack_end_exclusive_addr: u64) -> ! {
+    prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr);
+
+    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
+    asm::eret()
 }
 ```
 
-If this is the case, we continue with preparing the `EL2` -> `EL1` transition in
-`el2_to_el1_transition()`.
-
 ## Transition preparation
 
 Since `EL2` is more privileged than `EL1`, it has control over various processor features and can
@@ -104,8 +106,8 @@ This instruction will copy the contents of the [Saved Program Status Register -
 Program Status Register - EL1` and jump to the instruction address that is stored in the [Exception
 Link Register - EL2].
 
-This is basically the reverse of what is happening when an exception is taken. You'll learn about it
-in an upcoming tutorial.
+This is basically the reverse of what is happening when an exception is taken. You'll learn about
+that in an upcoming tutorial.
 
 [Saved Program Status Register - EL2]: https://docs.rs/cortex-a/5.1.2/src/cortex_a/regs/spsr_el2.rs.html
 [Exception Link Register - EL2]: https://docs.rs/cortex-a/5.1.2/src/cortex_a/regs/elr_el2.rs.html
@@ -125,65 +127,39 @@ SPSR_EL2.write(
 
 // Second, let the link register point to runtime_init().
 ELR_EL2.set(runtime_init::runtime_init as *const () as u64);
+
+// Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it. Since there
+// are no plans to ever return to EL2, just re-use the same stack.
+SP_EL1.set(phys_boot_core_stack_end_exclusive_addr);
 ```
 
 As you can see, we are populating `ELR_EL2` with the address of the [runtime_init()] function that
-we earlier used to call directly from the entrypoint.
-
-Finally, we set the stack pointer for `SP_EL1` and call `ERET`:
+we earlier used to call directly from the entrypoint. Finally, we set the stack pointer for
+`SP_EL1`.
 
 [runtime_init()]: src/runtime_init.rs
 
-```rust
-// Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it.
-SP_EL1.set(bsp::memory::boot_core_stack_end() as u64);
-
-// Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
-asm::eret()
-```
+You might have noticed that the stack's address was supplied as a function argument. As you might
+remember, in  `_start()` in `boot.s`, we are already setting up the stack for `EL2`. Since there
+are no plans to ever return to `EL2`, we can just re-use the same stack for `EL1`, so its address is
+forwarded using function arguments.
 
-## Are we stackless?
+Lastly, back in `_start_rust()` a call to `ERET` is made:
 
-We just wrote a big inline rust function, `el2_to_el1_transition()`, that is executed in a context
-where we do not have a stack yet. We should double-check the generated machine code:
+```rust
+#[no_mangle]
+pub unsafe extern "C" fn _start_rust(phys_boot_core_stack_end_exclusive_addr: u64) -> ! {
+    prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr);
 
-```console
-$ make objdump
-[...]
-Disassembly of section .text:
-
-0000000000080000 <_start>:
-   80000:       d53800a8        mrs     x8, mpidr_el1
-   80004:       f240051f        tst     x8, #0x3
-   80008:       54000081        b.ne    80018 <_start+0x18>  // b.any
-   8000c:       d5384248        mrs     x8, currentel
-   80010:       f100211f        cmp     x8, #0x8
-   80014:       54000060        b.eq    80020 <_start+0x20>  // b.none
-   80018:       d503205f        wfe
-   8001c:       17ffffff        b       80018 <_start+0x18>
-   80020:       aa1f03e8        mov     x8, xzr
-   80024:       52800069        mov     w9, #0x3                        // #3
-   80028:       d51ce109        msr     cnthctl_el2, x9
-   8002c:       d51ce068        msr     cntvoff_el2, x8
-   80030:       d0000008        adrp    x8, 82000 <kernel::kernel_main+0x6b4>
-   80034:       52b0000a        mov     w10, #0x80000000                // #-2147483648
-   80038:       528078ab        mov     w11, #0x3c5                     // #965
-   8003c:       52a0010c        mov     w12, #0x80000                   // #524288
-   80040:       d51c110a        msr     hcr_el2, x10
-   80044:       d51c400b        msr     spsr_el2, x11
-   80048:       9114c108        add     x8, x8, #0x530
-   8004c:       d51c4028        msr     elr_el2, x8
-   80050:       d51c410c        msr     sp_el1, x12
-   80054:       d69f03e0        eret
+    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
+    asm::eret()
+}
 ```
 
-Looks good! Thanks zero-overhead abstractions in the [cortex-a] crate! :heart_eyes:
-
-[cortex-a]: https://github.com/rust-embedded/cortex-a
-
 ## Test it
 
-In `main.rs`, we additionally inspect if the mask bits in `SPSR_EL2` made it to `EL1` as well:
+In `main.rs`, we print the `current privilege level` and additionally inspect if the mask bits in
+`SPSR_EL2` made it to `EL1` as well:
 
 ```console
 $ make chainboot
@@ -225,30 +201,27 @@ Minipush 1.0
 diff -uNr 09_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs 10_privilege_level/src/_arch/aarch64/cpu/boot.rs
 --- 09_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs
 +++ 10_privilege_level/src/_arch/aarch64/cpu/boot.rs
-@@ -12,7 +12,55 @@
+@@ -12,11 +12,53 @@
  //! crate::cpu::boot::arch_boot
 
- use crate::{bsp, cpu};
--use cortex_a::regs::*;
+ use crate::runtime_init;
 +use cortex_a::{asm, regs::*};
-+
-+//--------------------------------------------------------------------------------------------------
+
+ // Assembly counterpart to this file.
+ global_asm!(include_str!("boot.s"));
+
+ //--------------------------------------------------------------------------------------------------
 +// Private Code
 +//--------------------------------------------------------------------------------------------------
 +
-+/// Transition from EL2 to EL1.
++/// Prepares the transition from EL2 to EL1.
 +///
 +/// # Safety
 +///
++/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
 +/// - The HW state of EL1 must be prepared in a sound way.
-+/// - Exception return from EL2 must must continue execution in EL1 with
-+///   `runtime_init::runtime_init()`.
-+/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
-+///   a stack for EL2.
 +#[inline(always)]
-+unsafe fn el2_to_el1_transition() -> ! {
-+    use crate::runtime_init;
-+
++unsafe fn prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr: u64) {
 +    // Enable timer counter registers for EL1.
 +    CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
 +
@@ -273,38 +246,67 @@ diff -uNr 09_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs 10_privilege_level/src/
 +    // Second, let the link register point to runtime_init().
 +    ELR_EL2.set(runtime_init::runtime_init as *const () as u64);
 +
-+    // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it.
-+    SP_EL1.set(bsp::memory::boot_core_stack_end() as u64);
-+
-+    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
-+    asm::eret()
++    // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it. Since there
++    // are no plans to ever return to EL2, just re-use the same stack.
++    SP_EL1.set(phys_boot_core_stack_end_exclusive_addr);
 +}
-
- //--------------------------------------------------------------------------------------------------
++
++//--------------------------------------------------------------------------------------------------
  // Public Code
-@@ -25,15 +73,15 @@
+ //--------------------------------------------------------------------------------------------------
+
+@@ -27,7 +69,11 @@
  /// # Safety
  ///
- /// - Linker script must ensure to place this function where it is expected by the target machine.
--/// - We have to hope that the compiler omits any stack pointer usage before the stack pointer is
--///   actually set (`SP.set()`).
-+/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
-+///   a stack for EL2.
+ /// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
++/// - Exception return from EL2 must must continue execution in EL1 with `runtime_init()`.
  #[no_mangle]
- pub unsafe fn _start() -> ! {
--    use crate::runtime_init;
--
--    if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
--        SP.set(bsp::memory::boot_core_stack_end() as u64);
--        runtime_init::runtime_init()
-+    // Expect the boot core to start in EL2.
-+    if (bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id())
-+        && (CurrentEL.get() == CurrentEL::EL::EL2.value)
-+    {
-+        el2_to_el1_transition()
-     } else {
-         // If not core0, infinitely wait for events.
-         cpu::wait_forever()
+-pub unsafe fn _start_rust() -> ! {
+-    runtime_init::runtime_init()
++pub unsafe extern "C" fn _start_rust(phys_boot_core_stack_end_exclusive_addr: u64) -> ! {
++    prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr);
++
++    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
++    asm::eret()
+ }
+
+diff -uNr 09_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s 10_privilege_level/src/_arch/aarch64/cpu/boot.s
+--- 09_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s
++++ 10_privilege_level/src/_arch/aarch64/cpu/boot.s
+@@ -6,6 +6,7 @@
+ // Definitions
+ //--------------------------------------------------------------------------------------------------
+
++.equ _EL2, 0x8
+ .equ _core_id_mask, 0b11
+
+ //--------------------------------------------------------------------------------------------------
+@@ -17,6 +18,11 @@
+ // fn _start()
+ //------------------------------------------------------------------------------
+ _start:
++	// Only proceed if the core executes in EL2. Park it otherwise.
++	mrs	x0, CurrentEL
++	cmp	x0, _EL2
++	b.ne	1f
++
+ 	// Only proceed on the boot core. Park it otherwise.
+ 	mrs	x1, MPIDR_EL1
+ 	and	x1, x1, _core_id_mask
+@@ -26,11 +32,11 @@
+
+ 	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
+
+-	// Set the stack pointer.
++	// Set the stack pointer. This ensures that any code in EL2 that needs the stack will work.
+ 	ldr	x0, =__boot_core_stack_end_exclusive
+ 	mov	sp, x0
+
+-	// Jump to Rust code.
++	// Jump to Rust code. x0 holds the function argument provided to _start_rust().
+ 	b	_start_rust
+
+ 	// Infinitely wait for events (aka "park the core").
 
 diff -uNr 09_hw_debug_JTAG/src/_arch/aarch64/exception/asynchronous.rs 10_privilege_level/src/_arch/aarch64/exception/asynchronous.rs
 --- 09_hw_debug_JTAG/src/_arch/aarch64/exception/asynchronous.rs
diff --git a/10_privilege_level/src/_arch/aarch64/cpu/boot.rs b/10_privilege_level/src/_arch/aarch64/cpu/boot.rs
index c2f5fe0b7..02798fdc0 100644
--- a/10_privilege_level/src/_arch/aarch64/cpu/boot.rs
+++ b/10_privilege_level/src/_arch/aarch64/cpu/boot.rs
@@ -11,26 +11,24 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-use crate::{bsp, cpu};
+use crate::runtime_init;
 use cortex_a::{asm, regs::*};
 
+// Assembly counterpart to this file.
+global_asm!(include_str!("boot.s"));
+
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-/// Transition from EL2 to EL1.
+/// Prepares the transition from EL2 to EL1.
 ///
 /// # Safety
 ///
+/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
 /// - The HW state of EL1 must be prepared in a sound way.
-/// - Exception return from EL2 must must continue execution in EL1 with
-///   `runtime_init::runtime_init()`.
-/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
-///   a stack for EL2.
 #[inline(always)]
-unsafe fn el2_to_el1_transition() -> ! {
-    use crate::runtime_init;
-
+unsafe fn prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr: u64) {
     // Enable timer counter registers for EL1.
     CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
 
@@ -55,35 +53,27 @@ unsafe fn el2_to_el1_transition() -> ! {
     // Second, let the link register point to runtime_init().
     ELR_EL2.set(runtime_init::runtime_init as *const () as u64);
 
-    // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it.
-    SP_EL1.set(bsp::memory::boot_core_stack_end() as u64);
-
-    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
-    asm::eret()
+    // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it. Since there
+    // are no plans to ever return to EL2, just re-use the same stack.
+    SP_EL1.set(phys_boot_core_stack_end_exclusive_addr);
 }
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// The entry of the `kernel` binary.
+/// The Rust entry of the `kernel` binary.
 ///
-/// The function must be named `_start`, because the linker is looking for this exact name.
+/// The function is called from the assembly `_start` function.
 ///
 /// # Safety
 ///
-/// - Linker script must ensure to place this function where it is expected by the target machine.
-/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
-///   a stack for EL2.
+/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
+/// - Exception return from EL2 must must continue execution in EL1 with `runtime_init()`.
 #[no_mangle]
-pub unsafe fn _start() -> ! {
-    // Expect the boot core to start in EL2.
-    if (bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id())
-        && (CurrentEL.get() == CurrentEL::EL::EL2.value)
-    {
-        el2_to_el1_transition()
-    } else {
-        // If not core0, infinitely wait for events.
-        cpu::wait_forever()
-    }
+pub unsafe extern "C" fn _start_rust(phys_boot_core_stack_end_exclusive_addr: u64) -> ! {
+    prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr);
+
+    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
+    asm::eret()
 }
diff --git a/10_privilege_level/src/_arch/aarch64/cpu/boot.s b/10_privilege_level/src/_arch/aarch64/cpu/boot.s
new file mode 100644
index 000000000..be81b20a2
--- /dev/null
+++ b/10_privilege_level/src/_arch/aarch64/cpu/boot.s
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//--------------------------------------------------------------------------------------------------
+// Definitions
+//--------------------------------------------------------------------------------------------------
+
+.equ _EL2, 0x8
+.equ _core_id_mask, 0b11
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+.section .text._start
+
+//------------------------------------------------------------------------------
+// fn _start()
+//------------------------------------------------------------------------------
+_start:
+	// Only proceed if the core executes in EL2. Park it otherwise.
+	mrs	x0, CurrentEL
+	cmp	x0, _EL2
+	b.ne	1f
+
+	// Only proceed on the boot core. Park it otherwise.
+	mrs	x1, MPIDR_EL1
+	and	x1, x1, _core_id_mask
+	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
+	cmp	x1, x2
+	b.ne	1f
+
+	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
+
+	// Set the stack pointer. This ensures that any code in EL2 that needs the stack will work.
+	ldr	x0, =__boot_core_stack_end_exclusive
+	mov	sp, x0
+
+	// Jump to Rust code. x0 holds the function argument provided to _start_rust().
+	b	_start_rust
+
+	// Infinitely wait for events (aka "park the core").
+1:	wfe
+	b	1b
+
+.size	_start, . - _start
+.type	_start, function
+.global	_start
diff --git a/10_privilege_level/src/_arch/aarch64/cpu/smp.rs b/10_privilege_level/src/_arch/aarch64/cpu/smp.rs
deleted file mode 100644
index b9fdd0f73..000000000
--- a/10_privilege_level/src/_arch/aarch64/cpu/smp.rs
+++ /dev/null
@@ -1,29 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Architectural symmetric multiprocessing.
-//!
-//! # Orientation
-//!
-//! Since arch modules are imported into generic modules using the path attribute, the path of this
-//! file is:
-//!
-//! crate::cpu::smp::arch_smp
-
-use cortex_a::regs::*;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return the executing core's id.
-#[inline(always)]
-pub fn core_id<T>() -> T
-where
-    T: From<u8>,
-{
-    const CORE_MASK: u64 = 0b11;
-
-    T::from((MPIDR_EL1.get() & CORE_MASK) as u8)
-}
diff --git a/10_privilege_level/src/bsp/raspberrypi/cpu.rs b/10_privilege_level/src/bsp/raspberrypi/cpu.rs
index 16ab927d7..d09ff9568 100644
--- a/10_privilege_level/src/bsp/raspberrypi/cpu.rs
+++ b/10_privilege_level/src/bsp/raspberrypi/cpu.rs
@@ -9,4 +9,6 @@
 //--------------------------------------------------------------------------------------------------
 
 /// Used by `arch` code to find the early boot core.
-pub const BOOT_CORE_ID: u64 = 0;
+#[no_mangle]
+#[link_section = ".text._start_arguments"]
+pub static BOOT_CORE_ID: u64 = 0;
diff --git a/10_privilege_level/src/bsp/raspberrypi/link.ld b/10_privilege_level/src/bsp/raspberrypi/link.ld
index 87e6a976f..3b73b3c7e 100644
--- a/10_privilege_level/src/bsp/raspberrypi/link.ld
+++ b/10_privilege_level/src/bsp/raspberrypi/link.ld
@@ -17,15 +17,28 @@ PHDRS
 SECTIONS
 {
     . =  __rpi_load_addr;
+                                        /*   ^             */
+                                        /*   | stack       */
+                                        /*   | growth      */
+                                        /*   | direction   */
+   __boot_core_stack_end_exclusive = .; /*   |             */
 
     /***********************************************************************************************
     * Code + RO Data + Global Offset Table
     ***********************************************************************************************/
-    __rx_start = .;
     .text :
     {
         KEEP(*(.text._start))
-        *(.text*)
+
+        /* Special constants (or statics in Rust speak) needed by _start().
+         *
+         * They are placed in close proximity to _start() from where they will be read. This ensures
+         * that position-independent, PC-relative loads can be emitted.
+         */
+        *(.text._start_arguments)
+
+        *(.text._start_rust) /* The Rust entry point */
+        *(.text*)            /* Everything else */
     } :segment_rx
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
diff --git a/10_privilege_level/src/bsp/raspberrypi/memory.rs b/10_privilege_level/src/bsp/raspberrypi/memory.rs
index 56a3306e5..c6d65e36b 100644
--- a/10_privilege_level/src/bsp/raspberrypi/memory.rs
+++ b/10_privilege_level/src/bsp/raspberrypi/memory.rs
@@ -12,8 +12,6 @@ use core::{cell::UnsafeCell, ops::RangeInclusive};
 
 // Symbols from the linker script.
 extern "Rust" {
-    static __rx_start: UnsafeCell<()>;
-
     static __bss_start: UnsafeCell<u64>;
     static __bss_end_inclusive: UnsafeCell<u64>;
 }
@@ -50,30 +48,10 @@ pub(super) mod map {
     }
 }
 
-//--------------------------------------------------------------------------------------------------
-// Private Code
-//--------------------------------------------------------------------------------------------------
-
-/// Start address of the Read+Execute (RX) range.
-///
-/// # Safety
-///
-/// - Value is provided by the linker script and must be trusted as-is.
-#[inline(always)]
-fn rx_start() -> usize {
-    unsafe { __rx_start.get() as usize }
-}
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// Exclusive end address of the boot core's stack.
-#[inline(always)]
-pub fn boot_core_stack_end() -> usize {
-    rx_start()
-}
-
 /// Return the inclusive range spanning the .bss section.
 ///
 /// # Safety
diff --git a/10_privilege_level/src/cpu.rs b/10_privilege_level/src/cpu.rs
index 3834f183c..7a095cb12 100644
--- a/10_privilege_level/src/cpu.rs
+++ b/10_privilege_level/src/cpu.rs
@@ -10,8 +10,6 @@ mod arch_cpu;
 
 mod boot;
 
-pub mod smp;
-
 //--------------------------------------------------------------------------------------------------
 // Architectural Public Reexports
 //--------------------------------------------------------------------------------------------------
diff --git a/10_privilege_level/src/cpu/smp.rs b/10_privilege_level/src/cpu/smp.rs
deleted file mode 100644
index 38230ce1e..000000000
--- a/10_privilege_level/src/cpu/smp.rs
+++ /dev/null
@@ -1,14 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Symmetric multiprocessing.
-
-#[cfg(target_arch = "aarch64")]
-#[path = "../_arch/aarch64/cpu/smp.rs"]
-mod arch_smp;
-
-//--------------------------------------------------------------------------------------------------
-// Architectural Public Reexports
-//--------------------------------------------------------------------------------------------------
-pub use arch_smp::core_id;
diff --git a/10_privilege_level/src/main.rs b/10_privilege_level/src/main.rs
index 181a9aa5b..0c3a06489 100644
--- a/10_privilege_level/src/main.rs
+++ b/10_privilege_level/src/main.rs
@@ -100,16 +100,16 @@
 //!
 //! # Boot flow
 //!
-//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
-//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
+//! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
 //! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
 //!
-//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
 #![allow(clippy::clippy::upper_case_acronyms)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
+#![feature(global_asm)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
 #![no_main]
diff --git a/11_virtual_mem_part1_identity_mapping/README.md b/11_virtual_mem_part1_identity_mapping/README.md
index 8534ad881..b2313e1c2 100644
--- a/11_virtual_mem_part1_identity_mapping/README.md
+++ b/11_virtual_mem_part1_identity_mapping/README.md
@@ -813,7 +813,15 @@ diff -uNr 10_privilege_level/src/_arch/aarch64/memory/mmu.rs 11_virtual_mem_part
 diff -uNr 10_privilege_level/src/bsp/raspberrypi/link.ld 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
 --- 10_privilege_level/src/bsp/raspberrypi/link.ld
 +++ 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
-@@ -31,6 +31,9 @@
+@@ -26,6 +26,7 @@
+     /***********************************************************************************************
+     * Code + RO Data + Global Offset Table
+     ***********************************************************************************************/
++    __rx_start = .;
+     .text :
+     {
+         KEEP(*(.text._start))
+@@ -44,6 +45,9 @@
      .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
      .got    : ALIGN(8) { *(.got)     } :segment_rx
 
@@ -927,15 +935,17 @@ diff -uNr 10_privilege_level/src/bsp/raspberrypi/memory.rs 11_virtual_mem_part1_
  use core::{cell::UnsafeCell, ops::RangeInclusive};
 
  //--------------------------------------------------------------------------------------------------
-@@ -13,6 +15,7 @@
+@@ -12,6 +14,9 @@
+
  // Symbols from the linker script.
  extern "Rust" {
-     static __rx_start: UnsafeCell<()>;
++    static __rx_start: UnsafeCell<()>;
 +    static __rx_end_exclusive: UnsafeCell<()>;
-
++
      static __bss_start: UnsafeCell<u64>;
      static __bss_end_inclusive: UnsafeCell<u64>;
-@@ -25,6 +28,20 @@
+ }
+@@ -23,6 +28,20 @@
  /// The board's physical memory map.
  #[rustfmt::skip]
  pub(super) mod map {
@@ -956,7 +966,7 @@ diff -uNr 10_privilege_level/src/bsp/raspberrypi/memory.rs 11_virtual_mem_part1_
 
      pub const GPIO_OFFSET:         usize = 0x0020_0000;
      pub const UART_OFFSET:         usize = 0x0020_1000;
-@@ -37,6 +54,7 @@
+@@ -35,6 +54,7 @@
          pub const START:            usize =         0x3F00_0000;
          pub const GPIO_START:       usize = START + GPIO_OFFSET;
          pub const PL011_UART_START: usize = START + UART_OFFSET;
@@ -964,7 +974,7 @@ diff -uNr 10_privilege_level/src/bsp/raspberrypi/memory.rs 11_virtual_mem_part1_
      }
 
      /// Physical devices.
-@@ -47,6 +65,7 @@
+@@ -45,10 +65,35 @@
          pub const START:            usize =         0xFE00_0000;
          pub const GPIO_START:       usize = START + GPIO_OFFSET;
          pub const PL011_UART_START: usize = START + UART_OFFSET;
@@ -972,10 +982,20 @@ diff -uNr 10_privilege_level/src/bsp/raspberrypi/memory.rs 11_virtual_mem_part1_
      }
  }
 
-@@ -64,6 +83,16 @@
-     unsafe { __rx_start.get() as usize }
- }
-
+ //--------------------------------------------------------------------------------------------------
++// Private Code
++//--------------------------------------------------------------------------------------------------
++
++/// Start address of the Read+Execute (RX) range.
++///
++/// # Safety
++///
++/// - Value is provided by the linker script and must be trusted as-is.
++#[inline(always)]
++fn rx_start() -> usize {
++    unsafe { __rx_start.get() as usize }
++}
++
 +/// Exclusive end address of the Read+Execute (RX) range.
 +///
 +/// # Safety
@@ -986,10 +1006,11 @@ diff -uNr 10_privilege_level/src/bsp/raspberrypi/memory.rs 11_virtual_mem_part1_
 +    unsafe { __rx_end_exclusive.get() as usize }
 +}
 +
- //--------------------------------------------------------------------------------------------------
++//--------------------------------------------------------------------------------------------------
  // Public Code
  //--------------------------------------------------------------------------------------------------
 
+
 diff -uNr 10_privilege_level/src/bsp.rs 11_virtual_mem_part1_identity_mapping/src/bsp.rs
 --- 10_privilege_level/src/bsp.rs
 +++ 11_virtual_mem_part1_identity_mapping/src/bsp.rs
@@ -1006,7 +1027,7 @@ diff -uNr 10_privilege_level/src/bsp.rs 11_virtual_mem_part1_identity_mapping/sr
 diff -uNr 10_privilege_level/src/main.rs 11_virtual_mem_part1_identity_mapping/src/main.rs
 --- 10_privilege_level/src/main.rs
 +++ 11_virtual_mem_part1_identity_mapping/src/main.rs
-@@ -108,7 +108,11 @@
+@@ -107,7 +107,11 @@
  //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
  #![allow(clippy::clippy::upper_case_acronyms)]
@@ -1016,8 +1037,8 @@ diff -uNr 10_privilege_level/src/main.rs 11_virtual_mem_part1_identity_mapping/s
 +#![feature(const_panic)]
 +#![feature(core_intrinsics)]
  #![feature(format_args_nl)]
+ #![feature(global_asm)]
  #![feature(panic_info_message)]
- #![feature(trait_alias)]
 @@ -132,9 +136,17 @@
  /// # Safety
  ///
diff --git a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs
index c2f5fe0b7..02798fdc0 100644
--- a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs
@@ -11,26 +11,24 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-use crate::{bsp, cpu};
+use crate::runtime_init;
 use cortex_a::{asm, regs::*};
 
+// Assembly counterpart to this file.
+global_asm!(include_str!("boot.s"));
+
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-/// Transition from EL2 to EL1.
+/// Prepares the transition from EL2 to EL1.
 ///
 /// # Safety
 ///
+/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
 /// - The HW state of EL1 must be prepared in a sound way.
-/// - Exception return from EL2 must must continue execution in EL1 with
-///   `runtime_init::runtime_init()`.
-/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
-///   a stack for EL2.
 #[inline(always)]
-unsafe fn el2_to_el1_transition() -> ! {
-    use crate::runtime_init;
-
+unsafe fn prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr: u64) {
     // Enable timer counter registers for EL1.
     CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
 
@@ -55,35 +53,27 @@ unsafe fn el2_to_el1_transition() -> ! {
     // Second, let the link register point to runtime_init().
     ELR_EL2.set(runtime_init::runtime_init as *const () as u64);
 
-    // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it.
-    SP_EL1.set(bsp::memory::boot_core_stack_end() as u64);
-
-    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
-    asm::eret()
+    // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it. Since there
+    // are no plans to ever return to EL2, just re-use the same stack.
+    SP_EL1.set(phys_boot_core_stack_end_exclusive_addr);
 }
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// The entry of the `kernel` binary.
+/// The Rust entry of the `kernel` binary.
 ///
-/// The function must be named `_start`, because the linker is looking for this exact name.
+/// The function is called from the assembly `_start` function.
 ///
 /// # Safety
 ///
-/// - Linker script must ensure to place this function where it is expected by the target machine.
-/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
-///   a stack for EL2.
+/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
+/// - Exception return from EL2 must must continue execution in EL1 with `runtime_init()`.
 #[no_mangle]
-pub unsafe fn _start() -> ! {
-    // Expect the boot core to start in EL2.
-    if (bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id())
-        && (CurrentEL.get() == CurrentEL::EL::EL2.value)
-    {
-        el2_to_el1_transition()
-    } else {
-        // If not core0, infinitely wait for events.
-        cpu::wait_forever()
-    }
+pub unsafe extern "C" fn _start_rust(phys_boot_core_stack_end_exclusive_addr: u64) -> ! {
+    prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr);
+
+    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
+    asm::eret()
 }
diff --git a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.s b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.s
new file mode 100644
index 000000000..be81b20a2
--- /dev/null
+++ b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.s
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//--------------------------------------------------------------------------------------------------
+// Definitions
+//--------------------------------------------------------------------------------------------------
+
+.equ _EL2, 0x8
+.equ _core_id_mask, 0b11
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+.section .text._start
+
+//------------------------------------------------------------------------------
+// fn _start()
+//------------------------------------------------------------------------------
+_start:
+	// Only proceed if the core executes in EL2. Park it otherwise.
+	mrs	x0, CurrentEL
+	cmp	x0, _EL2
+	b.ne	1f
+
+	// Only proceed on the boot core. Park it otherwise.
+	mrs	x1, MPIDR_EL1
+	and	x1, x1, _core_id_mask
+	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
+	cmp	x1, x2
+	b.ne	1f
+
+	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
+
+	// Set the stack pointer. This ensures that any code in EL2 that needs the stack will work.
+	ldr	x0, =__boot_core_stack_end_exclusive
+	mov	sp, x0
+
+	// Jump to Rust code. x0 holds the function argument provided to _start_rust().
+	b	_start_rust
+
+	// Infinitely wait for events (aka "park the core").
+1:	wfe
+	b	1b
+
+.size	_start, . - _start
+.type	_start, function
+.global	_start
diff --git a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/smp.rs b/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/smp.rs
deleted file mode 100644
index b9fdd0f73..000000000
--- a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/smp.rs
+++ /dev/null
@@ -1,29 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Architectural symmetric multiprocessing.
-//!
-//! # Orientation
-//!
-//! Since arch modules are imported into generic modules using the path attribute, the path of this
-//! file is:
-//!
-//! crate::cpu::smp::arch_smp
-
-use cortex_a::regs::*;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return the executing core's id.
-#[inline(always)]
-pub fn core_id<T>() -> T
-where
-    T: From<u8>,
-{
-    const CORE_MASK: u64 = 0b11;
-
-    T::from((MPIDR_EL1.get() & CORE_MASK) as u8)
-}
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/cpu.rs b/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/cpu.rs
index 16ab927d7..d09ff9568 100644
--- a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/cpu.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/cpu.rs
@@ -9,4 +9,6 @@
 //--------------------------------------------------------------------------------------------------
 
 /// Used by `arch` code to find the early boot core.
-pub const BOOT_CORE_ID: u64 = 0;
+#[no_mangle]
+#[link_section = ".text._start_arguments"]
+pub static BOOT_CORE_ID: u64 = 0;
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld b/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
index 6c63ba10f..854f5b388 100644
--- a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
+++ b/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
@@ -17,6 +17,11 @@ PHDRS
 SECTIONS
 {
     . =  __rpi_load_addr;
+                                        /*   ^             */
+                                        /*   | stack       */
+                                        /*   | growth      */
+                                        /*   | direction   */
+   __boot_core_stack_end_exclusive = .; /*   |             */
 
     /***********************************************************************************************
     * Code + RO Data + Global Offset Table
@@ -25,7 +30,16 @@ SECTIONS
     .text :
     {
         KEEP(*(.text._start))
-        *(.text*)
+
+        /* Special constants (or statics in Rust speak) needed by _start().
+         *
+         * They are placed in close proximity to _start() from where they will be read. This ensures
+         * that position-independent, PC-relative loads can be emitted.
+         */
+        *(.text._start_arguments)
+
+        *(.text._start_rust) /* The Rust entry point */
+        *(.text*)            /* Everything else */
     } :segment_rx
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs b/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs
index bb18dd201..81233775d 100644
--- a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs
@@ -97,12 +97,6 @@ fn rx_end_exclusive() -> usize {
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// Exclusive end address of the boot core's stack.
-#[inline(always)]
-pub fn boot_core_stack_end() -> usize {
-    rx_start()
-}
-
 /// Return the inclusive range spanning the .bss section.
 ///
 /// # Safety
diff --git a/11_virtual_mem_part1_identity_mapping/src/cpu.rs b/11_virtual_mem_part1_identity_mapping/src/cpu.rs
index 3834f183c..7a095cb12 100644
--- a/11_virtual_mem_part1_identity_mapping/src/cpu.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/cpu.rs
@@ -10,8 +10,6 @@ mod arch_cpu;
 
 mod boot;
 
-pub mod smp;
-
 //--------------------------------------------------------------------------------------------------
 // Architectural Public Reexports
 //--------------------------------------------------------------------------------------------------
diff --git a/11_virtual_mem_part1_identity_mapping/src/cpu/smp.rs b/11_virtual_mem_part1_identity_mapping/src/cpu/smp.rs
deleted file mode 100644
index 38230ce1e..000000000
--- a/11_virtual_mem_part1_identity_mapping/src/cpu/smp.rs
+++ /dev/null
@@ -1,14 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Symmetric multiprocessing.
-
-#[cfg(target_arch = "aarch64")]
-#[path = "../_arch/aarch64/cpu/smp.rs"]
-mod arch_smp;
-
-//--------------------------------------------------------------------------------------------------
-// Architectural Public Reexports
-//--------------------------------------------------------------------------------------------------
-pub use arch_smp::core_id;
diff --git a/11_virtual_mem_part1_identity_mapping/src/main.rs b/11_virtual_mem_part1_identity_mapping/src/main.rs
index 9037541d1..8ce5d3d92 100644
--- a/11_virtual_mem_part1_identity_mapping/src/main.rs
+++ b/11_virtual_mem_part1_identity_mapping/src/main.rs
@@ -100,11 +100,10 @@
 //!
 //! # Boot flow
 //!
-//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
-//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
+//! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
 //! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
 //!
-//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
 #![allow(clippy::clippy::upper_case_acronyms)]
@@ -114,6 +113,7 @@
 #![feature(const_panic)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
+#![feature(global_asm)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
 #![no_main]
diff --git a/12_exceptions_part1_groundwork/README.md b/12_exceptions_part1_groundwork/README.md
index 99838f3eb..cc4b043ff 100644
--- a/12_exceptions_part1_groundwork/README.md
+++ b/12_exceptions_part1_groundwork/README.md
@@ -177,47 +177,48 @@ handling code, restore the context, so that the processor can continue where it
 taking the exception.
 
 Context save and restore is one of the few places in system software where there is no way around
-some hand-crafted assembly. Introducing `exception.S`:
+some hand-crafted assembly. Introducing `exception.s`:
 
 ```asm
 /// Call the function provided by parameter `\handler` after saving the exception context. Provide
 /// the context as the first parameter to '\handler'.
 .macro CALL_WITH_CONTEXT handler
-    // Make room on the stack for the exception context.
-    sub    sp,  sp,  #16 * 17
-
-    // Store all general purpose registers on the stack.
-    stp    x0,  x1,  [sp, #16 * 0]
-    stp    x2,  x3,  [sp, #16 * 1]
-    stp    x4,  x5,  [sp, #16 * 2]
-    stp    x6,  x7,  [sp, #16 * 3]
-    stp    x8,  x9,  [sp, #16 * 4]
-    stp    x10, x11, [sp, #16 * 5]
-    stp    x12, x13, [sp, #16 * 6]
-    stp    x14, x15, [sp, #16 * 7]
-    stp    x16, x17, [sp, #16 * 8]
-    stp    x18, x19, [sp, #16 * 9]
-    stp    x20, x21, [sp, #16 * 10]
-    stp    x22, x23, [sp, #16 * 11]
-    stp    x24, x25, [sp, #16 * 12]
-    stp    x26, x27, [sp, #16 * 13]
-    stp    x28, x29, [sp, #16 * 14]
-
-    // Add the exception link register (ELR_EL1) and the saved program status (SPSR_EL1).
-    mrs    x1,  ELR_EL1
-    mrs    x2,  SPSR_EL1
-
-    stp    lr,  x1,  [sp, #16 * 15]
-    str    w2,       [sp, #16 * 16]
-
-    // x0 is the first argument for the function called through `\handler`.
-    mov    x0,  sp
-
-    // Call `\handler`.
-    bl     \handler
-
-    // After returning from exception handling code, replay the saved context and return via `eret`.
-    b      __exception_restore_context
+	// Make room on the stack for the exception context.
+	sub	sp,  sp,  #16 * 17
+
+	// Store all general purpose registers on the stack.
+	stp	x0,  x1,  [sp, #16 * 0]
+	stp	x2,  x3,  [sp, #16 * 1]
+	stp	x4,  x5,  [sp, #16 * 2]
+	stp	x6,  x7,  [sp, #16 * 3]
+	stp	x8,  x9,  [sp, #16 * 4]
+	stp	x10, x11, [sp, #16 * 5]
+	stp	x12, x13, [sp, #16 * 6]
+	stp	x14, x15, [sp, #16 * 7]
+	stp	x16, x17, [sp, #16 * 8]
+	stp	x18, x19, [sp, #16 * 9]
+	stp	x20, x21, [sp, #16 * 10]
+	stp	x22, x23, [sp, #16 * 11]
+	stp	x24, x25, [sp, #16 * 12]
+	stp	x26, x27, [sp, #16 * 13]
+	stp	x28, x29, [sp, #16 * 14]
+
+	// Add the exception link register (ELR_EL1) and the saved program status (SPSR_EL1).
+	mrs	x1,  ELR_EL1
+	mrs	x2,  SPSR_EL1
+
+	stp	lr,  x1,  [sp, #16 * 15]
+	str	x2,       [sp, #16 * 16]
+
+	// x0 is the first argument for the function called through `\handler`.
+	mov	x0,  sp
+
+	// Call `\handler`.
+	bl	\handler
+
+	// After returning from exception handling code, replay the saved context and return via
+	// `eret`.
+	b	__exception_restore_context
 .endm
 ```
 
@@ -238,8 +239,6 @@ because `Rust` has no stable convention ([yet](https://github.com/rust-lang/rfcs
 Next, we craft the exception vector table:
 
 ```asm
-.section .text
-
 // Align by 2^11 bytes, as demanded by ARMv8-A. Same as ALIGN(2048) in an ld script.
 .align 11
 
@@ -254,23 +253,23 @@ __exception_vector_start:
 //
 // - It must be ensured that `CALL_WITH_CONTEXT` <= 0x80 bytes.
 .org 0x000
-    CALL_WITH_CONTEXT current_el0_synchronous
+	CALL_WITH_CONTEXT current_el0_synchronous
 .org 0x080
-    CALL_WITH_CONTEXT current_el0_irq
+	CALL_WITH_CONTEXT current_el0_irq
 .org 0x100
-    FIQ_SUSPEND
+	FIQ_SUSPEND
 .org 0x180
-    CALL_WITH_CONTEXT current_el0_serror
+	CALL_WITH_CONTEXT current_el0_serror
 
 // Current exception level with SP_ELx, x > 0.
 .org 0x200
-    CALL_WITH_CONTEXT current_elx_synchronous
+	CALL_WITH_CONTEXT current_elx_synchronous
 .org 0x280
-    CALL_WITH_CONTEXT current_elx_irq
+	CALL_WITH_CONTEXT current_elx_irq
 .org 0x300
-    FIQ_SUSPEND
+	FIQ_SUSPEND
 .org 0x380
-    CALL_WITH_CONTEXT current_elx_serror
+	CALL_WITH_CONTEXT current_elx_serror
 
 [...]
 ```
@@ -490,7 +489,7 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs 1
 +use register::InMemoryRegister;
 +
 +// Assembly counterpart to this file.
-+global_asm!(include_str!("exception.S"));
++global_asm!(include_str!("exception.s"));
 +
 +//--------------------------------------------------------------------------------------------------
 +// Private Definitions
@@ -731,64 +730,73 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs 1
 +    barrier::isb(barrier::SY);
 +}
 
-diff -uNr 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.S 12_exceptions_part1_groundwork/src/_arch/aarch64/exception.S
---- 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.S
-+++ 12_exceptions_part1_groundwork/src/_arch/aarch64/exception.S
-@@ -0,0 +1,138 @@
+diff -uNr 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.s 12_exceptions_part1_groundwork/src/_arch/aarch64/exception.s
+--- 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.s
++++ 12_exceptions_part1_groundwork/src/_arch/aarch64/exception.s
+@@ -0,0 +1,148 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 +
++//--------------------------------------------------------------------------------------------------
++// Definitions
++//--------------------------------------------------------------------------------------------------
++
 +/// Call the function provided by parameter `\handler` after saving the exception context. Provide
 +/// the context as the first parameter to '\handler'.
 +.macro CALL_WITH_CONTEXT handler
-+    // Make room on the stack for the exception context.
-+    sub    sp,  sp,  #16 * 17
-+
-+    // Store all general purpose registers on the stack.
-+    stp    x0,  x1,  [sp, #16 * 0]
-+    stp    x2,  x3,  [sp, #16 * 1]
-+    stp    x4,  x5,  [sp, #16 * 2]
-+    stp    x6,  x7,  [sp, #16 * 3]
-+    stp    x8,  x9,  [sp, #16 * 4]
-+    stp    x10, x11, [sp, #16 * 5]
-+    stp    x12, x13, [sp, #16 * 6]
-+    stp    x14, x15, [sp, #16 * 7]
-+    stp    x16, x17, [sp, #16 * 8]
-+    stp    x18, x19, [sp, #16 * 9]
-+    stp    x20, x21, [sp, #16 * 10]
-+    stp    x22, x23, [sp, #16 * 11]
-+    stp    x24, x25, [sp, #16 * 12]
-+    stp    x26, x27, [sp, #16 * 13]
-+    stp    x28, x29, [sp, #16 * 14]
-+
-+    // Add the exception link register (ELR_EL1) and the saved program status (SPSR_EL1).
-+    mrs    x1,  ELR_EL1
-+    mrs    x2,  SPSR_EL1
-+
-+    stp    lr,  x1,  [sp, #16 * 15]
-+    str    x2,       [sp, #16 * 16]
-+
-+    // x0 is the first argument for the function called through `\handler`.
-+    mov    x0,  sp
-+
-+    // Call `\handler`.
-+    bl     \handler
-+
-+    // After returning from exception handling code, replay the saved context and return via `eret`.
-+    b      __exception_restore_context
++	// Make room on the stack for the exception context.
++	sub	sp,  sp,  #16 * 17
++
++	// Store all general purpose registers on the stack.
++	stp	x0,  x1,  [sp, #16 * 0]
++	stp	x2,  x3,  [sp, #16 * 1]
++	stp	x4,  x5,  [sp, #16 * 2]
++	stp	x6,  x7,  [sp, #16 * 3]
++	stp	x8,  x9,  [sp, #16 * 4]
++	stp	x10, x11, [sp, #16 * 5]
++	stp	x12, x13, [sp, #16 * 6]
++	stp	x14, x15, [sp, #16 * 7]
++	stp	x16, x17, [sp, #16 * 8]
++	stp	x18, x19, [sp, #16 * 9]
++	stp	x20, x21, [sp, #16 * 10]
++	stp	x22, x23, [sp, #16 * 11]
++	stp	x24, x25, [sp, #16 * 12]
++	stp	x26, x27, [sp, #16 * 13]
++	stp	x28, x29, [sp, #16 * 14]
++
++	// Add the exception link register (ELR_EL1) and the saved program status (SPSR_EL1).
++	mrs	x1,  ELR_EL1
++	mrs	x2,  SPSR_EL1
++
++	stp	lr,  x1,  [sp, #16 * 15]
++	str	x2,       [sp, #16 * 16]
++
++	// x0 is the first argument for the function called through `\handler`.
++	mov	x0,  sp
++
++	// Call `\handler`.
++	bl	\handler
++
++	// After returning from exception handling code, replay the saved context and return via
++	// `eret`.
++	b	__exception_restore_context
 +.endm
 +
 +.macro FIQ_SUSPEND
-+1:  wfe
-+    b      1b
++1:	wfe
++	b	1b
 +.endm
 +
 +//--------------------------------------------------------------------------------------------------
-+// The exception vector table.
++// Private Code
 +//--------------------------------------------------------------------------------------------------
 +.section .text
 +
++//------------------------------------------------------------------------------
++// The exception vector table.
++//------------------------------------------------------------------------------
++
 +// Align by 2^11 bytes, as demanded by ARMv8-A. Same as ALIGN(2048) in an ld script.
 +.align 11
 +
@@ -803,76 +811,77 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.S 12
 +//
 +// - It must be ensured that `CALL_WITH_CONTEXT` <= 0x80 bytes.
 +.org 0x000
-+    CALL_WITH_CONTEXT current_el0_synchronous
++	CALL_WITH_CONTEXT current_el0_synchronous
 +.org 0x080
-+    CALL_WITH_CONTEXT current_el0_irq
++	CALL_WITH_CONTEXT current_el0_irq
 +.org 0x100
-+    FIQ_SUSPEND
++	FIQ_SUSPEND
 +.org 0x180
-+    CALL_WITH_CONTEXT current_el0_serror
++	CALL_WITH_CONTEXT current_el0_serror
 +
 +// Current exception level with SP_ELx, x > 0.
 +.org 0x200
-+    CALL_WITH_CONTEXT current_elx_synchronous
++	CALL_WITH_CONTEXT current_elx_synchronous
 +.org 0x280
-+    CALL_WITH_CONTEXT current_elx_irq
++	CALL_WITH_CONTEXT current_elx_irq
 +.org 0x300
-+    FIQ_SUSPEND
++	FIQ_SUSPEND
 +.org 0x380
-+    CALL_WITH_CONTEXT current_elx_serror
++	CALL_WITH_CONTEXT current_elx_serror
 +
 +// Lower exception level, AArch64
 +.org 0x400
-+    CALL_WITH_CONTEXT lower_aarch64_synchronous
++	CALL_WITH_CONTEXT lower_aarch64_synchronous
 +.org 0x480
-+    CALL_WITH_CONTEXT lower_aarch64_irq
++	CALL_WITH_CONTEXT lower_aarch64_irq
 +.org 0x500
-+    FIQ_SUSPEND
++	FIQ_SUSPEND
 +.org 0x580
-+    CALL_WITH_CONTEXT lower_aarch64_serror
++	CALL_WITH_CONTEXT lower_aarch64_serror
 +
 +// Lower exception level, AArch32
 +.org 0x600
-+    CALL_WITH_CONTEXT lower_aarch32_synchronous
++	CALL_WITH_CONTEXT lower_aarch32_synchronous
 +.org 0x680
-+    CALL_WITH_CONTEXT lower_aarch32_irq
++	CALL_WITH_CONTEXT lower_aarch32_irq
 +.org 0x700
-+    FIQ_SUSPEND
++	FIQ_SUSPEND
 +.org 0x780
-+    CALL_WITH_CONTEXT lower_aarch32_serror
++	CALL_WITH_CONTEXT lower_aarch32_serror
 +.org 0x800
 +
-+//--------------------------------------------------------------------------------------------------
-+// Helper functions
-+//--------------------------------------------------------------------------------------------------
-+.section .text
-+
++//------------------------------------------------------------------------------
++// fn __exception_restore_context()
++//------------------------------------------------------------------------------
 +__exception_restore_context:
-+    ldr    w19,      [sp, #16 * 16]
-+    ldp    lr,  x20, [sp, #16 * 15]
-+
-+    msr    SPSR_EL1, x19
-+    msr    ELR_EL1,  x20
-+
-+    ldp    x0,  x1,  [sp, #16 * 0]
-+    ldp    x2,  x3,  [sp, #16 * 1]
-+    ldp    x4,  x5,  [sp, #16 * 2]
-+    ldp    x6,  x7,  [sp, #16 * 3]
-+    ldp    x8,  x9,  [sp, #16 * 4]
-+    ldp    x10, x11, [sp, #16 * 5]
-+    ldp    x12, x13, [sp, #16 * 6]
-+    ldp    x14, x15, [sp, #16 * 7]
-+    ldp    x16, x17, [sp, #16 * 8]
-+    ldp    x18, x19, [sp, #16 * 9]
-+    ldp    x20, x21, [sp, #16 * 10]
-+    ldp    x22, x23, [sp, #16 * 11]
-+    ldp    x24, x25, [sp, #16 * 12]
-+    ldp    x26, x27, [sp, #16 * 13]
-+    ldp    x28, x29, [sp, #16 * 14]
-+
-+    add    sp,  sp,  #16 * 17
-+
-+    eret
++	ldr	w19,      [sp, #16 * 16]
++	ldp	lr,  x20, [sp, #16 * 15]
++
++	msr	SPSR_EL1, x19
++	msr	ELR_EL1,  x20
++
++	ldp	x0,  x1,  [sp, #16 * 0]
++	ldp	x2,  x3,  [sp, #16 * 1]
++	ldp	x4,  x5,  [sp, #16 * 2]
++	ldp	x6,  x7,  [sp, #16 * 3]
++	ldp	x8,  x9,  [sp, #16 * 4]
++	ldp	x10, x11, [sp, #16 * 5]
++	ldp	x12, x13, [sp, #16 * 6]
++	ldp	x14, x15, [sp, #16 * 7]
++	ldp	x16, x17, [sp, #16 * 8]
++	ldp	x18, x19, [sp, #16 * 9]
++	ldp	x20, x21, [sp, #16 * 10]
++	ldp	x22, x23, [sp, #16 * 11]
++	ldp	x24, x25, [sp, #16 * 12]
++	ldp	x26, x27, [sp, #16 * 13]
++	ldp	x28, x29, [sp, #16 * 14]
++
++	add	sp,  sp,  #16 * 17
++
++	eret
++
++.size	__exception_restore_context, . - __exception_restore_context
++.type	__exception_restore_context, function
 
 diff -uNr 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs 12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
 --- 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
@@ -945,15 +954,7 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/exception.rs 12_exceptions_p
 diff -uNr 11_virtual_mem_part1_identity_mapping/src/main.rs 12_exceptions_part1_groundwork/src/main.rs
 --- 11_virtual_mem_part1_identity_mapping/src/main.rs
 +++ 12_exceptions_part1_groundwork/src/main.rs
-@@ -114,6 +114,7 @@
- #![feature(const_panic)]
- #![feature(core_intrinsics)]
- #![feature(format_args_nl)]
-+#![feature(global_asm)]
- #![feature(panic_info_message)]
- #![feature(trait_alias)]
- #![no_main]
-@@ -144,6 +145,8 @@
+@@ -144,6 +144,8 @@
      use driver::interface::DriverManager;
      use memory::mmu::interface::MMU;
 
@@ -962,7 +963,7 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/main.rs 12_exceptions_part1_
      if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
          panic!("MMU: {}", string);
      }
-@@ -196,13 +199,28 @@
+@@ -196,13 +198,28 @@
      info!("Timer test, spinning for 1 second");
      time::time_manager().spin_for(Duration::from_secs(1));
 
diff --git a/12_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs b/12_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs
index c2f5fe0b7..02798fdc0 100644
--- a/12_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs
+++ b/12_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs
@@ -11,26 +11,24 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-use crate::{bsp, cpu};
+use crate::runtime_init;
 use cortex_a::{asm, regs::*};
 
+// Assembly counterpart to this file.
+global_asm!(include_str!("boot.s"));
+
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-/// Transition from EL2 to EL1.
+/// Prepares the transition from EL2 to EL1.
 ///
 /// # Safety
 ///
+/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
 /// - The HW state of EL1 must be prepared in a sound way.
-/// - Exception return from EL2 must must continue execution in EL1 with
-///   `runtime_init::runtime_init()`.
-/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
-///   a stack for EL2.
 #[inline(always)]
-unsafe fn el2_to_el1_transition() -> ! {
-    use crate::runtime_init;
-
+unsafe fn prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr: u64) {
     // Enable timer counter registers for EL1.
     CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
 
@@ -55,35 +53,27 @@ unsafe fn el2_to_el1_transition() -> ! {
     // Second, let the link register point to runtime_init().
     ELR_EL2.set(runtime_init::runtime_init as *const () as u64);
 
-    // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it.
-    SP_EL1.set(bsp::memory::boot_core_stack_end() as u64);
-
-    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
-    asm::eret()
+    // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it. Since there
+    // are no plans to ever return to EL2, just re-use the same stack.
+    SP_EL1.set(phys_boot_core_stack_end_exclusive_addr);
 }
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// The entry of the `kernel` binary.
+/// The Rust entry of the `kernel` binary.
 ///
-/// The function must be named `_start`, because the linker is looking for this exact name.
+/// The function is called from the assembly `_start` function.
 ///
 /// # Safety
 ///
-/// - Linker script must ensure to place this function where it is expected by the target machine.
-/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
-///   a stack for EL2.
+/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
+/// - Exception return from EL2 must must continue execution in EL1 with `runtime_init()`.
 #[no_mangle]
-pub unsafe fn _start() -> ! {
-    // Expect the boot core to start in EL2.
-    if (bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id())
-        && (CurrentEL.get() == CurrentEL::EL::EL2.value)
-    {
-        el2_to_el1_transition()
-    } else {
-        // If not core0, infinitely wait for events.
-        cpu::wait_forever()
-    }
+pub unsafe extern "C" fn _start_rust(phys_boot_core_stack_end_exclusive_addr: u64) -> ! {
+    prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr);
+
+    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
+    asm::eret()
 }
diff --git a/12_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.s b/12_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.s
new file mode 100644
index 000000000..be81b20a2
--- /dev/null
+++ b/12_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.s
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//--------------------------------------------------------------------------------------------------
+// Definitions
+//--------------------------------------------------------------------------------------------------
+
+.equ _EL2, 0x8
+.equ _core_id_mask, 0b11
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+.section .text._start
+
+//------------------------------------------------------------------------------
+// fn _start()
+//------------------------------------------------------------------------------
+_start:
+	// Only proceed if the core executes in EL2. Park it otherwise.
+	mrs	x0, CurrentEL
+	cmp	x0, _EL2
+	b.ne	1f
+
+	// Only proceed on the boot core. Park it otherwise.
+	mrs	x1, MPIDR_EL1
+	and	x1, x1, _core_id_mask
+	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
+	cmp	x1, x2
+	b.ne	1f
+
+	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
+
+	// Set the stack pointer. This ensures that any code in EL2 that needs the stack will work.
+	ldr	x0, =__boot_core_stack_end_exclusive
+	mov	sp, x0
+
+	// Jump to Rust code. x0 holds the function argument provided to _start_rust().
+	b	_start_rust
+
+	// Infinitely wait for events (aka "park the core").
+1:	wfe
+	b	1b
+
+.size	_start, . - _start
+.type	_start, function
+.global	_start
diff --git a/12_exceptions_part1_groundwork/src/_arch/aarch64/cpu/smp.rs b/12_exceptions_part1_groundwork/src/_arch/aarch64/cpu/smp.rs
deleted file mode 100644
index b9fdd0f73..000000000
--- a/12_exceptions_part1_groundwork/src/_arch/aarch64/cpu/smp.rs
+++ /dev/null
@@ -1,29 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Architectural symmetric multiprocessing.
-//!
-//! # Orientation
-//!
-//! Since arch modules are imported into generic modules using the path attribute, the path of this
-//! file is:
-//!
-//! crate::cpu::smp::arch_smp
-
-use cortex_a::regs::*;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return the executing core's id.
-#[inline(always)]
-pub fn core_id<T>() -> T
-where
-    T: From<u8>,
-{
-    const CORE_MASK: u64 = 0b11;
-
-    T::from((MPIDR_EL1.get() & CORE_MASK) as u8)
-}
diff --git a/12_exceptions_part1_groundwork/src/_arch/aarch64/exception.S b/12_exceptions_part1_groundwork/src/_arch/aarch64/exception.S
deleted file mode 100644
index fd7b1f930..000000000
--- a/12_exceptions_part1_groundwork/src/_arch/aarch64/exception.S
+++ /dev/null
@@ -1,138 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-/// Call the function provided by parameter `\handler` after saving the exception context. Provide
-/// the context as the first parameter to '\handler'.
-.macro CALL_WITH_CONTEXT handler
-    // Make room on the stack for the exception context.
-    sub    sp,  sp,  #16 * 17
-
-    // Store all general purpose registers on the stack.
-    stp    x0,  x1,  [sp, #16 * 0]
-    stp    x2,  x3,  [sp, #16 * 1]
-    stp    x4,  x5,  [sp, #16 * 2]
-    stp    x6,  x7,  [sp, #16 * 3]
-    stp    x8,  x9,  [sp, #16 * 4]
-    stp    x10, x11, [sp, #16 * 5]
-    stp    x12, x13, [sp, #16 * 6]
-    stp    x14, x15, [sp, #16 * 7]
-    stp    x16, x17, [sp, #16 * 8]
-    stp    x18, x19, [sp, #16 * 9]
-    stp    x20, x21, [sp, #16 * 10]
-    stp    x22, x23, [sp, #16 * 11]
-    stp    x24, x25, [sp, #16 * 12]
-    stp    x26, x27, [sp, #16 * 13]
-    stp    x28, x29, [sp, #16 * 14]
-
-    // Add the exception link register (ELR_EL1) and the saved program status (SPSR_EL1).
-    mrs    x1,  ELR_EL1
-    mrs    x2,  SPSR_EL1
-
-    stp    lr,  x1,  [sp, #16 * 15]
-    str    x2,       [sp, #16 * 16]
-
-    // x0 is the first argument for the function called through `\handler`.
-    mov    x0,  sp
-
-    // Call `\handler`.
-    bl     \handler
-
-    // After returning from exception handling code, replay the saved context and return via `eret`.
-    b      __exception_restore_context
-.endm
-
-.macro FIQ_SUSPEND
-1:  wfe
-    b      1b
-.endm
-
-//--------------------------------------------------------------------------------------------------
-// The exception vector table.
-//--------------------------------------------------------------------------------------------------
-.section .text
-
-// Align by 2^11 bytes, as demanded by ARMv8-A. Same as ALIGN(2048) in an ld script.
-.align 11
-
-// Export a symbol for the Rust code to use.
-__exception_vector_start:
-
-// Current exception level with SP_EL0.
-//
-// .org sets the offset relative to section start.
-//
-// # Safety
-//
-// - It must be ensured that `CALL_WITH_CONTEXT` <= 0x80 bytes.
-.org 0x000
-    CALL_WITH_CONTEXT current_el0_synchronous
-.org 0x080
-    CALL_WITH_CONTEXT current_el0_irq
-.org 0x100
-    FIQ_SUSPEND
-.org 0x180
-    CALL_WITH_CONTEXT current_el0_serror
-
-// Current exception level with SP_ELx, x > 0.
-.org 0x200
-    CALL_WITH_CONTEXT current_elx_synchronous
-.org 0x280
-    CALL_WITH_CONTEXT current_elx_irq
-.org 0x300
-    FIQ_SUSPEND
-.org 0x380
-    CALL_WITH_CONTEXT current_elx_serror
-
-// Lower exception level, AArch64
-.org 0x400
-    CALL_WITH_CONTEXT lower_aarch64_synchronous
-.org 0x480
-    CALL_WITH_CONTEXT lower_aarch64_irq
-.org 0x500
-    FIQ_SUSPEND
-.org 0x580
-    CALL_WITH_CONTEXT lower_aarch64_serror
-
-// Lower exception level, AArch32
-.org 0x600
-    CALL_WITH_CONTEXT lower_aarch32_synchronous
-.org 0x680
-    CALL_WITH_CONTEXT lower_aarch32_irq
-.org 0x700
-    FIQ_SUSPEND
-.org 0x780
-    CALL_WITH_CONTEXT lower_aarch32_serror
-.org 0x800
-
-//--------------------------------------------------------------------------------------------------
-// Helper functions
-//--------------------------------------------------------------------------------------------------
-.section .text
-
-__exception_restore_context:
-    ldr    w19,      [sp, #16 * 16]
-    ldp    lr,  x20, [sp, #16 * 15]
-
-    msr    SPSR_EL1, x19
-    msr    ELR_EL1,  x20
-
-    ldp    x0,  x1,  [sp, #16 * 0]
-    ldp    x2,  x3,  [sp, #16 * 1]
-    ldp    x4,  x5,  [sp, #16 * 2]
-    ldp    x6,  x7,  [sp, #16 * 3]
-    ldp    x8,  x9,  [sp, #16 * 4]
-    ldp    x10, x11, [sp, #16 * 5]
-    ldp    x12, x13, [sp, #16 * 6]
-    ldp    x14, x15, [sp, #16 * 7]
-    ldp    x16, x17, [sp, #16 * 8]
-    ldp    x18, x19, [sp, #16 * 9]
-    ldp    x20, x21, [sp, #16 * 10]
-    ldp    x22, x23, [sp, #16 * 11]
-    ldp    x24, x25, [sp, #16 * 12]
-    ldp    x26, x27, [sp, #16 * 13]
-    ldp    x28, x29, [sp, #16 * 14]
-
-    add    sp,  sp,  #16 * 17
-
-    eret
diff --git a/12_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs b/12_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
index f08d0ce4a..21f0c68cf 100644
--- a/12_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
+++ b/12_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
@@ -16,7 +16,7 @@ use cortex_a::{asm, barrier, regs::*};
 use register::InMemoryRegister;
 
 // Assembly counterpart to this file.
-global_asm!(include_str!("exception.S"));
+global_asm!(include_str!("exception.s"));
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/12_exceptions_part1_groundwork/src/_arch/aarch64/exception.s b/12_exceptions_part1_groundwork/src/_arch/aarch64/exception.s
new file mode 100644
index 000000000..ffb1875ce
--- /dev/null
+++ b/12_exceptions_part1_groundwork/src/_arch/aarch64/exception.s
@@ -0,0 +1,148 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//--------------------------------------------------------------------------------------------------
+// Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Call the function provided by parameter `\handler` after saving the exception context. Provide
+/// the context as the first parameter to '\handler'.
+.macro CALL_WITH_CONTEXT handler
+	// Make room on the stack for the exception context.
+	sub	sp,  sp,  #16 * 17
+
+	// Store all general purpose registers on the stack.
+	stp	x0,  x1,  [sp, #16 * 0]
+	stp	x2,  x3,  [sp, #16 * 1]
+	stp	x4,  x5,  [sp, #16 * 2]
+	stp	x6,  x7,  [sp, #16 * 3]
+	stp	x8,  x9,  [sp, #16 * 4]
+	stp	x10, x11, [sp, #16 * 5]
+	stp	x12, x13, [sp, #16 * 6]
+	stp	x14, x15, [sp, #16 * 7]
+	stp	x16, x17, [sp, #16 * 8]
+	stp	x18, x19, [sp, #16 * 9]
+	stp	x20, x21, [sp, #16 * 10]
+	stp	x22, x23, [sp, #16 * 11]
+	stp	x24, x25, [sp, #16 * 12]
+	stp	x26, x27, [sp, #16 * 13]
+	stp	x28, x29, [sp, #16 * 14]
+
+	// Add the exception link register (ELR_EL1) and the saved program status (SPSR_EL1).
+	mrs	x1,  ELR_EL1
+	mrs	x2,  SPSR_EL1
+
+	stp	lr,  x1,  [sp, #16 * 15]
+	str	x2,       [sp, #16 * 16]
+
+	// x0 is the first argument for the function called through `\handler`.
+	mov	x0,  sp
+
+	// Call `\handler`.
+	bl	\handler
+
+	// After returning from exception handling code, replay the saved context and return via
+	// `eret`.
+	b	__exception_restore_context
+.endm
+
+.macro FIQ_SUSPEND
+1:	wfe
+	b	1b
+.endm
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+.section .text
+
+//------------------------------------------------------------------------------
+// The exception vector table.
+//------------------------------------------------------------------------------
+
+// Align by 2^11 bytes, as demanded by ARMv8-A. Same as ALIGN(2048) in an ld script.
+.align 11
+
+// Export a symbol for the Rust code to use.
+__exception_vector_start:
+
+// Current exception level with SP_EL0.
+//
+// .org sets the offset relative to section start.
+//
+// # Safety
+//
+// - It must be ensured that `CALL_WITH_CONTEXT` <= 0x80 bytes.
+.org 0x000
+	CALL_WITH_CONTEXT current_el0_synchronous
+.org 0x080
+	CALL_WITH_CONTEXT current_el0_irq
+.org 0x100
+	FIQ_SUSPEND
+.org 0x180
+	CALL_WITH_CONTEXT current_el0_serror
+
+// Current exception level with SP_ELx, x > 0.
+.org 0x200
+	CALL_WITH_CONTEXT current_elx_synchronous
+.org 0x280
+	CALL_WITH_CONTEXT current_elx_irq
+.org 0x300
+	FIQ_SUSPEND
+.org 0x380
+	CALL_WITH_CONTEXT current_elx_serror
+
+// Lower exception level, AArch64
+.org 0x400
+	CALL_WITH_CONTEXT lower_aarch64_synchronous
+.org 0x480
+	CALL_WITH_CONTEXT lower_aarch64_irq
+.org 0x500
+	FIQ_SUSPEND
+.org 0x580
+	CALL_WITH_CONTEXT lower_aarch64_serror
+
+// Lower exception level, AArch32
+.org 0x600
+	CALL_WITH_CONTEXT lower_aarch32_synchronous
+.org 0x680
+	CALL_WITH_CONTEXT lower_aarch32_irq
+.org 0x700
+	FIQ_SUSPEND
+.org 0x780
+	CALL_WITH_CONTEXT lower_aarch32_serror
+.org 0x800
+
+//------------------------------------------------------------------------------
+// fn __exception_restore_context()
+//------------------------------------------------------------------------------
+__exception_restore_context:
+	ldr	w19,      [sp, #16 * 16]
+	ldp	lr,  x20, [sp, #16 * 15]
+
+	msr	SPSR_EL1, x19
+	msr	ELR_EL1,  x20
+
+	ldp	x0,  x1,  [sp, #16 * 0]
+	ldp	x2,  x3,  [sp, #16 * 1]
+	ldp	x4,  x5,  [sp, #16 * 2]
+	ldp	x6,  x7,  [sp, #16 * 3]
+	ldp	x8,  x9,  [sp, #16 * 4]
+	ldp	x10, x11, [sp, #16 * 5]
+	ldp	x12, x13, [sp, #16 * 6]
+	ldp	x14, x15, [sp, #16 * 7]
+	ldp	x16, x17, [sp, #16 * 8]
+	ldp	x18, x19, [sp, #16 * 9]
+	ldp	x20, x21, [sp, #16 * 10]
+	ldp	x22, x23, [sp, #16 * 11]
+	ldp	x24, x25, [sp, #16 * 12]
+	ldp	x26, x27, [sp, #16 * 13]
+	ldp	x28, x29, [sp, #16 * 14]
+
+	add	sp,  sp,  #16 * 17
+
+	eret
+
+.size	__exception_restore_context, . - __exception_restore_context
+.type	__exception_restore_context, function
diff --git a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/cpu.rs b/12_exceptions_part1_groundwork/src/bsp/raspberrypi/cpu.rs
index 16ab927d7..d09ff9568 100644
--- a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/cpu.rs
+++ b/12_exceptions_part1_groundwork/src/bsp/raspberrypi/cpu.rs
@@ -9,4 +9,6 @@
 //--------------------------------------------------------------------------------------------------
 
 /// Used by `arch` code to find the early boot core.
-pub const BOOT_CORE_ID: u64 = 0;
+#[no_mangle]
+#[link_section = ".text._start_arguments"]
+pub static BOOT_CORE_ID: u64 = 0;
diff --git a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/link.ld b/12_exceptions_part1_groundwork/src/bsp/raspberrypi/link.ld
index 6c63ba10f..854f5b388 100644
--- a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/link.ld
+++ b/12_exceptions_part1_groundwork/src/bsp/raspberrypi/link.ld
@@ -17,6 +17,11 @@ PHDRS
 SECTIONS
 {
     . =  __rpi_load_addr;
+                                        /*   ^             */
+                                        /*   | stack       */
+                                        /*   | growth      */
+                                        /*   | direction   */
+   __boot_core_stack_end_exclusive = .; /*   |             */
 
     /***********************************************************************************************
     * Code + RO Data + Global Offset Table
@@ -25,7 +30,16 @@ SECTIONS
     .text :
     {
         KEEP(*(.text._start))
-        *(.text*)
+
+        /* Special constants (or statics in Rust speak) needed by _start().
+         *
+         * They are placed in close proximity to _start() from where they will be read. This ensures
+         * that position-independent, PC-relative loads can be emitted.
+         */
+        *(.text._start_arguments)
+
+        *(.text._start_rust) /* The Rust entry point */
+        *(.text*)            /* Everything else */
     } :segment_rx
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
diff --git a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory.rs b/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory.rs
index bb18dd201..81233775d 100644
--- a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory.rs
+++ b/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory.rs
@@ -97,12 +97,6 @@ fn rx_end_exclusive() -> usize {
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// Exclusive end address of the boot core's stack.
-#[inline(always)]
-pub fn boot_core_stack_end() -> usize {
-    rx_start()
-}
-
 /// Return the inclusive range spanning the .bss section.
 ///
 /// # Safety
diff --git a/12_exceptions_part1_groundwork/src/cpu.rs b/12_exceptions_part1_groundwork/src/cpu.rs
index 3834f183c..7a095cb12 100644
--- a/12_exceptions_part1_groundwork/src/cpu.rs
+++ b/12_exceptions_part1_groundwork/src/cpu.rs
@@ -10,8 +10,6 @@ mod arch_cpu;
 
 mod boot;
 
-pub mod smp;
-
 //--------------------------------------------------------------------------------------------------
 // Architectural Public Reexports
 //--------------------------------------------------------------------------------------------------
diff --git a/12_exceptions_part1_groundwork/src/cpu/smp.rs b/12_exceptions_part1_groundwork/src/cpu/smp.rs
deleted file mode 100644
index 38230ce1e..000000000
--- a/12_exceptions_part1_groundwork/src/cpu/smp.rs
+++ /dev/null
@@ -1,14 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Symmetric multiprocessing.
-
-#[cfg(target_arch = "aarch64")]
-#[path = "../_arch/aarch64/cpu/smp.rs"]
-mod arch_smp;
-
-//--------------------------------------------------------------------------------------------------
-// Architectural Public Reexports
-//--------------------------------------------------------------------------------------------------
-pub use arch_smp::core_id;
diff --git a/12_exceptions_part1_groundwork/src/main.rs b/12_exceptions_part1_groundwork/src/main.rs
index aed3404a0..2af372ab9 100644
--- a/12_exceptions_part1_groundwork/src/main.rs
+++ b/12_exceptions_part1_groundwork/src/main.rs
@@ -100,11 +100,10 @@
 //!
 //! # Boot flow
 //!
-//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
-//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
+//! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
 //! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
 //!
-//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
 #![allow(clippy::clippy::upper_case_acronyms)]
diff --git a/13_integrated_testing/README.md b/13_integrated_testing/README.md
index 65423fc4c..046607ba7 100644
--- a/13_integrated_testing/README.md
+++ b/13_integrated_testing/README.md
@@ -1157,7 +1157,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs 13_in
 diff -uNr 12_exceptions_part1_groundwork/src/cpu.rs 13_integrated_testing/src/cpu.rs
 --- 12_exceptions_part1_groundwork/src/cpu.rs
 +++ 13_integrated_testing/src/cpu.rs
-@@ -16,3 +16,6 @@
+@@ -14,3 +14,6 @@
  // Architectural Public Reexports
  //--------------------------------------------------------------------------------------------------
  pub use arch_cpu::{nop, wait_forever};
@@ -1194,7 +1194,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/exception.rs 13_integrated_testing/
 diff -uNr 12_exceptions_part1_groundwork/src/lib.rs 13_integrated_testing/src/lib.rs
 --- 12_exceptions_part1_groundwork/src/lib.rs
 +++ 13_integrated_testing/src/lib.rs
-@@ -0,0 +1,172 @@
+@@ -0,0 +1,171 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -1299,11 +1299,10 @@ diff -uNr 12_exceptions_part1_groundwork/src/lib.rs 13_integrated_testing/src/li
 +//!
 +//! # Boot flow
 +//!
-+//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
-+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
++//! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
++//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
 +//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
 +//!
-+//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 +//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 +
 +#![allow(clippy::clippy::upper_case_acronyms)]
@@ -1371,7 +1370,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/lib.rs 13_integrated_testing/src/li
 diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/main.rs
 --- 12_exceptions_part1_groundwork/src/main.rs
 +++ 13_integrated_testing/src/main.rs
-@@ -6,131 +6,12 @@
+@@ -6,130 +6,12 @@
  #![doc(html_logo_url = "https://git.io/JeGIp")]
 
  //! The `kernel` binary.
@@ -1469,11 +1468,10 @@ diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/m
 -//!
 -//! # Boot flow
 -//!
--//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
--//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
+-//! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
+-//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
 -//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
 -//!
--//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 -//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 -
 -#![allow(clippy::clippy::upper_case_acronyms)]
@@ -1505,7 +1503,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/m
 
  /// Early init code.
  ///
-@@ -141,6 +22,7 @@
+@@ -140,6 +22,7 @@
  ///     - MMU + Data caching must be activated at the earliest. Without it, any atomic operations,
  ///       e.g. the yet-to-be-introduced spinlocks in the device drivers (which currently employ
  ///       NullLocks instead of spinlocks), will fail to work (properly) on the RPi SoCs.
@@ -1513,7 +1511,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/m
  unsafe fn kernel_init() -> ! {
      use driver::interface::DriverManager;
      use memory::mmu::interface::MMU;
-@@ -167,9 +49,7 @@
+@@ -166,9 +49,7 @@
  fn kernel_main() -> ! {
      use bsp::console::console;
      use console::interface::All;
@@ -1523,7 +1521,7 @@ diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/m
 
      info!("Booting on: {}", bsp::board_name());
 
-@@ -196,31 +76,6 @@
+@@ -195,31 +76,6 @@
          info!("      {}. {}", i + 1, driver.compatible());
      }
 
@@ -1797,7 +1795,7 @@ diff -uNr 12_exceptions_part1_groundwork/tests/00_console_sanity.rs 13_integrate
 +#![no_main]
 +#![no_std]
 +
-+use libkernel::{bsp, console, exception, print};
++use libkernel::{bsp, console, cpu, exception, print};
 +
 +#[no_mangle]
 +unsafe fn kernel_init() -> ! {
@@ -1820,7 +1818,7 @@ diff -uNr 12_exceptions_part1_groundwork/tests/00_console_sanity.rs 13_integrate
 +    print!("{}", console().chars_read());
 +
 +    // The QEMU process running this test will be closed by the I/O test harness.
-+    loop {}
++    cpu::wait_forever()
 +}
 
 diff -uNr 12_exceptions_part1_groundwork/tests/01_timer_sanity.rs 13_integrated_testing/tests/01_timer_sanity.rs
diff --git a/13_integrated_testing/src/_arch/aarch64/cpu/boot.rs b/13_integrated_testing/src/_arch/aarch64/cpu/boot.rs
index c2f5fe0b7..02798fdc0 100644
--- a/13_integrated_testing/src/_arch/aarch64/cpu/boot.rs
+++ b/13_integrated_testing/src/_arch/aarch64/cpu/boot.rs
@@ -11,26 +11,24 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-use crate::{bsp, cpu};
+use crate::runtime_init;
 use cortex_a::{asm, regs::*};
 
+// Assembly counterpart to this file.
+global_asm!(include_str!("boot.s"));
+
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-/// Transition from EL2 to EL1.
+/// Prepares the transition from EL2 to EL1.
 ///
 /// # Safety
 ///
+/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
 /// - The HW state of EL1 must be prepared in a sound way.
-/// - Exception return from EL2 must must continue execution in EL1 with
-///   `runtime_init::runtime_init()`.
-/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
-///   a stack for EL2.
 #[inline(always)]
-unsafe fn el2_to_el1_transition() -> ! {
-    use crate::runtime_init;
-
+unsafe fn prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr: u64) {
     // Enable timer counter registers for EL1.
     CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
 
@@ -55,35 +53,27 @@ unsafe fn el2_to_el1_transition() -> ! {
     // Second, let the link register point to runtime_init().
     ELR_EL2.set(runtime_init::runtime_init as *const () as u64);
 
-    // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it.
-    SP_EL1.set(bsp::memory::boot_core_stack_end() as u64);
-
-    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
-    asm::eret()
+    // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it. Since there
+    // are no plans to ever return to EL2, just re-use the same stack.
+    SP_EL1.set(phys_boot_core_stack_end_exclusive_addr);
 }
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// The entry of the `kernel` binary.
+/// The Rust entry of the `kernel` binary.
 ///
-/// The function must be named `_start`, because the linker is looking for this exact name.
+/// The function is called from the assembly `_start` function.
 ///
 /// # Safety
 ///
-/// - Linker script must ensure to place this function where it is expected by the target machine.
-/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
-///   a stack for EL2.
+/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
+/// - Exception return from EL2 must must continue execution in EL1 with `runtime_init()`.
 #[no_mangle]
-pub unsafe fn _start() -> ! {
-    // Expect the boot core to start in EL2.
-    if (bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id())
-        && (CurrentEL.get() == CurrentEL::EL::EL2.value)
-    {
-        el2_to_el1_transition()
-    } else {
-        // If not core0, infinitely wait for events.
-        cpu::wait_forever()
-    }
+pub unsafe extern "C" fn _start_rust(phys_boot_core_stack_end_exclusive_addr: u64) -> ! {
+    prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr);
+
+    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
+    asm::eret()
 }
diff --git a/13_integrated_testing/src/_arch/aarch64/cpu/boot.s b/13_integrated_testing/src/_arch/aarch64/cpu/boot.s
new file mode 100644
index 000000000..be81b20a2
--- /dev/null
+++ b/13_integrated_testing/src/_arch/aarch64/cpu/boot.s
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//--------------------------------------------------------------------------------------------------
+// Definitions
+//--------------------------------------------------------------------------------------------------
+
+.equ _EL2, 0x8
+.equ _core_id_mask, 0b11
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+.section .text._start
+
+//------------------------------------------------------------------------------
+// fn _start()
+//------------------------------------------------------------------------------
+_start:
+	// Only proceed if the core executes in EL2. Park it otherwise.
+	mrs	x0, CurrentEL
+	cmp	x0, _EL2
+	b.ne	1f
+
+	// Only proceed on the boot core. Park it otherwise.
+	mrs	x1, MPIDR_EL1
+	and	x1, x1, _core_id_mask
+	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
+	cmp	x1, x2
+	b.ne	1f
+
+	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
+
+	// Set the stack pointer. This ensures that any code in EL2 that needs the stack will work.
+	ldr	x0, =__boot_core_stack_end_exclusive
+	mov	sp, x0
+
+	// Jump to Rust code. x0 holds the function argument provided to _start_rust().
+	b	_start_rust
+
+	// Infinitely wait for events (aka "park the core").
+1:	wfe
+	b	1b
+
+.size	_start, . - _start
+.type	_start, function
+.global	_start
diff --git a/13_integrated_testing/src/_arch/aarch64/cpu/smp.rs b/13_integrated_testing/src/_arch/aarch64/cpu/smp.rs
deleted file mode 100644
index b9fdd0f73..000000000
--- a/13_integrated_testing/src/_arch/aarch64/cpu/smp.rs
+++ /dev/null
@@ -1,29 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Architectural symmetric multiprocessing.
-//!
-//! # Orientation
-//!
-//! Since arch modules are imported into generic modules using the path attribute, the path of this
-//! file is:
-//!
-//! crate::cpu::smp::arch_smp
-
-use cortex_a::regs::*;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return the executing core's id.
-#[inline(always)]
-pub fn core_id<T>() -> T
-where
-    T: From<u8>,
-{
-    const CORE_MASK: u64 = 0b11;
-
-    T::from((MPIDR_EL1.get() & CORE_MASK) as u8)
-}
diff --git a/13_integrated_testing/src/_arch/aarch64/exception.S b/13_integrated_testing/src/_arch/aarch64/exception.S
deleted file mode 100644
index fd7b1f930..000000000
--- a/13_integrated_testing/src/_arch/aarch64/exception.S
+++ /dev/null
@@ -1,138 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-/// Call the function provided by parameter `\handler` after saving the exception context. Provide
-/// the context as the first parameter to '\handler'.
-.macro CALL_WITH_CONTEXT handler
-    // Make room on the stack for the exception context.
-    sub    sp,  sp,  #16 * 17
-
-    // Store all general purpose registers on the stack.
-    stp    x0,  x1,  [sp, #16 * 0]
-    stp    x2,  x3,  [sp, #16 * 1]
-    stp    x4,  x5,  [sp, #16 * 2]
-    stp    x6,  x7,  [sp, #16 * 3]
-    stp    x8,  x9,  [sp, #16 * 4]
-    stp    x10, x11, [sp, #16 * 5]
-    stp    x12, x13, [sp, #16 * 6]
-    stp    x14, x15, [sp, #16 * 7]
-    stp    x16, x17, [sp, #16 * 8]
-    stp    x18, x19, [sp, #16 * 9]
-    stp    x20, x21, [sp, #16 * 10]
-    stp    x22, x23, [sp, #16 * 11]
-    stp    x24, x25, [sp, #16 * 12]
-    stp    x26, x27, [sp, #16 * 13]
-    stp    x28, x29, [sp, #16 * 14]
-
-    // Add the exception link register (ELR_EL1) and the saved program status (SPSR_EL1).
-    mrs    x1,  ELR_EL1
-    mrs    x2,  SPSR_EL1
-
-    stp    lr,  x1,  [sp, #16 * 15]
-    str    x2,       [sp, #16 * 16]
-
-    // x0 is the first argument for the function called through `\handler`.
-    mov    x0,  sp
-
-    // Call `\handler`.
-    bl     \handler
-
-    // After returning from exception handling code, replay the saved context and return via `eret`.
-    b      __exception_restore_context
-.endm
-
-.macro FIQ_SUSPEND
-1:  wfe
-    b      1b
-.endm
-
-//--------------------------------------------------------------------------------------------------
-// The exception vector table.
-//--------------------------------------------------------------------------------------------------
-.section .text
-
-// Align by 2^11 bytes, as demanded by ARMv8-A. Same as ALIGN(2048) in an ld script.
-.align 11
-
-// Export a symbol for the Rust code to use.
-__exception_vector_start:
-
-// Current exception level with SP_EL0.
-//
-// .org sets the offset relative to section start.
-//
-// # Safety
-//
-// - It must be ensured that `CALL_WITH_CONTEXT` <= 0x80 bytes.
-.org 0x000
-    CALL_WITH_CONTEXT current_el0_synchronous
-.org 0x080
-    CALL_WITH_CONTEXT current_el0_irq
-.org 0x100
-    FIQ_SUSPEND
-.org 0x180
-    CALL_WITH_CONTEXT current_el0_serror
-
-// Current exception level with SP_ELx, x > 0.
-.org 0x200
-    CALL_WITH_CONTEXT current_elx_synchronous
-.org 0x280
-    CALL_WITH_CONTEXT current_elx_irq
-.org 0x300
-    FIQ_SUSPEND
-.org 0x380
-    CALL_WITH_CONTEXT current_elx_serror
-
-// Lower exception level, AArch64
-.org 0x400
-    CALL_WITH_CONTEXT lower_aarch64_synchronous
-.org 0x480
-    CALL_WITH_CONTEXT lower_aarch64_irq
-.org 0x500
-    FIQ_SUSPEND
-.org 0x580
-    CALL_WITH_CONTEXT lower_aarch64_serror
-
-// Lower exception level, AArch32
-.org 0x600
-    CALL_WITH_CONTEXT lower_aarch32_synchronous
-.org 0x680
-    CALL_WITH_CONTEXT lower_aarch32_irq
-.org 0x700
-    FIQ_SUSPEND
-.org 0x780
-    CALL_WITH_CONTEXT lower_aarch32_serror
-.org 0x800
-
-//--------------------------------------------------------------------------------------------------
-// Helper functions
-//--------------------------------------------------------------------------------------------------
-.section .text
-
-__exception_restore_context:
-    ldr    w19,      [sp, #16 * 16]
-    ldp    lr,  x20, [sp, #16 * 15]
-
-    msr    SPSR_EL1, x19
-    msr    ELR_EL1,  x20
-
-    ldp    x0,  x1,  [sp, #16 * 0]
-    ldp    x2,  x3,  [sp, #16 * 1]
-    ldp    x4,  x5,  [sp, #16 * 2]
-    ldp    x6,  x7,  [sp, #16 * 3]
-    ldp    x8,  x9,  [sp, #16 * 4]
-    ldp    x10, x11, [sp, #16 * 5]
-    ldp    x12, x13, [sp, #16 * 6]
-    ldp    x14, x15, [sp, #16 * 7]
-    ldp    x16, x17, [sp, #16 * 8]
-    ldp    x18, x19, [sp, #16 * 9]
-    ldp    x20, x21, [sp, #16 * 10]
-    ldp    x22, x23, [sp, #16 * 11]
-    ldp    x24, x25, [sp, #16 * 12]
-    ldp    x26, x27, [sp, #16 * 13]
-    ldp    x28, x29, [sp, #16 * 14]
-
-    add    sp,  sp,  #16 * 17
-
-    eret
diff --git a/13_integrated_testing/src/_arch/aarch64/exception.rs b/13_integrated_testing/src/_arch/aarch64/exception.rs
index e67841f9f..1ee0a1982 100644
--- a/13_integrated_testing/src/_arch/aarch64/exception.rs
+++ b/13_integrated_testing/src/_arch/aarch64/exception.rs
@@ -16,7 +16,7 @@ use cortex_a::{barrier, regs::*};
 use register::InMemoryRegister;
 
 // Assembly counterpart to this file.
-global_asm!(include_str!("exception.S"));
+global_asm!(include_str!("exception.s"));
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/13_integrated_testing/src/_arch/aarch64/exception.s b/13_integrated_testing/src/_arch/aarch64/exception.s
new file mode 100644
index 000000000..ffb1875ce
--- /dev/null
+++ b/13_integrated_testing/src/_arch/aarch64/exception.s
@@ -0,0 +1,148 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//--------------------------------------------------------------------------------------------------
+// Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Call the function provided by parameter `\handler` after saving the exception context. Provide
+/// the context as the first parameter to '\handler'.
+.macro CALL_WITH_CONTEXT handler
+	// Make room on the stack for the exception context.
+	sub	sp,  sp,  #16 * 17
+
+	// Store all general purpose registers on the stack.
+	stp	x0,  x1,  [sp, #16 * 0]
+	stp	x2,  x3,  [sp, #16 * 1]
+	stp	x4,  x5,  [sp, #16 * 2]
+	stp	x6,  x7,  [sp, #16 * 3]
+	stp	x8,  x9,  [sp, #16 * 4]
+	stp	x10, x11, [sp, #16 * 5]
+	stp	x12, x13, [sp, #16 * 6]
+	stp	x14, x15, [sp, #16 * 7]
+	stp	x16, x17, [sp, #16 * 8]
+	stp	x18, x19, [sp, #16 * 9]
+	stp	x20, x21, [sp, #16 * 10]
+	stp	x22, x23, [sp, #16 * 11]
+	stp	x24, x25, [sp, #16 * 12]
+	stp	x26, x27, [sp, #16 * 13]
+	stp	x28, x29, [sp, #16 * 14]
+
+	// Add the exception link register (ELR_EL1) and the saved program status (SPSR_EL1).
+	mrs	x1,  ELR_EL1
+	mrs	x2,  SPSR_EL1
+
+	stp	lr,  x1,  [sp, #16 * 15]
+	str	x2,       [sp, #16 * 16]
+
+	// x0 is the first argument for the function called through `\handler`.
+	mov	x0,  sp
+
+	// Call `\handler`.
+	bl	\handler
+
+	// After returning from exception handling code, replay the saved context and return via
+	// `eret`.
+	b	__exception_restore_context
+.endm
+
+.macro FIQ_SUSPEND
+1:	wfe
+	b	1b
+.endm
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+.section .text
+
+//------------------------------------------------------------------------------
+// The exception vector table.
+//------------------------------------------------------------------------------
+
+// Align by 2^11 bytes, as demanded by ARMv8-A. Same as ALIGN(2048) in an ld script.
+.align 11
+
+// Export a symbol for the Rust code to use.
+__exception_vector_start:
+
+// Current exception level with SP_EL0.
+//
+// .org sets the offset relative to section start.
+//
+// # Safety
+//
+// - It must be ensured that `CALL_WITH_CONTEXT` <= 0x80 bytes.
+.org 0x000
+	CALL_WITH_CONTEXT current_el0_synchronous
+.org 0x080
+	CALL_WITH_CONTEXT current_el0_irq
+.org 0x100
+	FIQ_SUSPEND
+.org 0x180
+	CALL_WITH_CONTEXT current_el0_serror
+
+// Current exception level with SP_ELx, x > 0.
+.org 0x200
+	CALL_WITH_CONTEXT current_elx_synchronous
+.org 0x280
+	CALL_WITH_CONTEXT current_elx_irq
+.org 0x300
+	FIQ_SUSPEND
+.org 0x380
+	CALL_WITH_CONTEXT current_elx_serror
+
+// Lower exception level, AArch64
+.org 0x400
+	CALL_WITH_CONTEXT lower_aarch64_synchronous
+.org 0x480
+	CALL_WITH_CONTEXT lower_aarch64_irq
+.org 0x500
+	FIQ_SUSPEND
+.org 0x580
+	CALL_WITH_CONTEXT lower_aarch64_serror
+
+// Lower exception level, AArch32
+.org 0x600
+	CALL_WITH_CONTEXT lower_aarch32_synchronous
+.org 0x680
+	CALL_WITH_CONTEXT lower_aarch32_irq
+.org 0x700
+	FIQ_SUSPEND
+.org 0x780
+	CALL_WITH_CONTEXT lower_aarch32_serror
+.org 0x800
+
+//------------------------------------------------------------------------------
+// fn __exception_restore_context()
+//------------------------------------------------------------------------------
+__exception_restore_context:
+	ldr	w19,      [sp, #16 * 16]
+	ldp	lr,  x20, [sp, #16 * 15]
+
+	msr	SPSR_EL1, x19
+	msr	ELR_EL1,  x20
+
+	ldp	x0,  x1,  [sp, #16 * 0]
+	ldp	x2,  x3,  [sp, #16 * 1]
+	ldp	x4,  x5,  [sp, #16 * 2]
+	ldp	x6,  x7,  [sp, #16 * 3]
+	ldp	x8,  x9,  [sp, #16 * 4]
+	ldp	x10, x11, [sp, #16 * 5]
+	ldp	x12, x13, [sp, #16 * 6]
+	ldp	x14, x15, [sp, #16 * 7]
+	ldp	x16, x17, [sp, #16 * 8]
+	ldp	x18, x19, [sp, #16 * 9]
+	ldp	x20, x21, [sp, #16 * 10]
+	ldp	x22, x23, [sp, #16 * 11]
+	ldp	x24, x25, [sp, #16 * 12]
+	ldp	x26, x27, [sp, #16 * 13]
+	ldp	x28, x29, [sp, #16 * 14]
+
+	add	sp,  sp,  #16 * 17
+
+	eret
+
+.size	__exception_restore_context, . - __exception_restore_context
+.type	__exception_restore_context, function
diff --git a/13_integrated_testing/src/bsp/raspberrypi/cpu.rs b/13_integrated_testing/src/bsp/raspberrypi/cpu.rs
index 16ab927d7..d09ff9568 100644
--- a/13_integrated_testing/src/bsp/raspberrypi/cpu.rs
+++ b/13_integrated_testing/src/bsp/raspberrypi/cpu.rs
@@ -9,4 +9,6 @@
 //--------------------------------------------------------------------------------------------------
 
 /// Used by `arch` code to find the early boot core.
-pub const BOOT_CORE_ID: u64 = 0;
+#[no_mangle]
+#[link_section = ".text._start_arguments"]
+pub static BOOT_CORE_ID: u64 = 0;
diff --git a/13_integrated_testing/src/bsp/raspberrypi/link.ld b/13_integrated_testing/src/bsp/raspberrypi/link.ld
index 6c63ba10f..854f5b388 100644
--- a/13_integrated_testing/src/bsp/raspberrypi/link.ld
+++ b/13_integrated_testing/src/bsp/raspberrypi/link.ld
@@ -17,6 +17,11 @@ PHDRS
 SECTIONS
 {
     . =  __rpi_load_addr;
+                                        /*   ^             */
+                                        /*   | stack       */
+                                        /*   | growth      */
+                                        /*   | direction   */
+   __boot_core_stack_end_exclusive = .; /*   |             */
 
     /***********************************************************************************************
     * Code + RO Data + Global Offset Table
@@ -25,7 +30,16 @@ SECTIONS
     .text :
     {
         KEEP(*(.text._start))
-        *(.text*)
+
+        /* Special constants (or statics in Rust speak) needed by _start().
+         *
+         * They are placed in close proximity to _start() from where they will be read. This ensures
+         * that position-independent, PC-relative loads can be emitted.
+         */
+        *(.text._start_arguments)
+
+        *(.text._start_rust) /* The Rust entry point */
+        *(.text*)            /* Everything else */
     } :segment_rx
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
diff --git a/13_integrated_testing/src/bsp/raspberrypi/memory.rs b/13_integrated_testing/src/bsp/raspberrypi/memory.rs
index bb18dd201..81233775d 100644
--- a/13_integrated_testing/src/bsp/raspberrypi/memory.rs
+++ b/13_integrated_testing/src/bsp/raspberrypi/memory.rs
@@ -97,12 +97,6 @@ fn rx_end_exclusive() -> usize {
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// Exclusive end address of the boot core's stack.
-#[inline(always)]
-pub fn boot_core_stack_end() -> usize {
-    rx_start()
-}
-
 /// Return the inclusive range spanning the .bss section.
 ///
 /// # Safety
diff --git a/13_integrated_testing/src/cpu.rs b/13_integrated_testing/src/cpu.rs
index 36b6a9d4c..61c411fcd 100644
--- a/13_integrated_testing/src/cpu.rs
+++ b/13_integrated_testing/src/cpu.rs
@@ -10,8 +10,6 @@ mod arch_cpu;
 
 mod boot;
 
-pub mod smp;
-
 //--------------------------------------------------------------------------------------------------
 // Architectural Public Reexports
 //--------------------------------------------------------------------------------------------------
diff --git a/13_integrated_testing/src/cpu/smp.rs b/13_integrated_testing/src/cpu/smp.rs
deleted file mode 100644
index 38230ce1e..000000000
--- a/13_integrated_testing/src/cpu/smp.rs
+++ /dev/null
@@ -1,14 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Symmetric multiprocessing.
-
-#[cfg(target_arch = "aarch64")]
-#[path = "../_arch/aarch64/cpu/smp.rs"]
-mod arch_smp;
-
-//--------------------------------------------------------------------------------------------------
-// Architectural Public Reexports
-//--------------------------------------------------------------------------------------------------
-pub use arch_smp::core_id;
diff --git a/13_integrated_testing/src/lib.rs b/13_integrated_testing/src/lib.rs
index b094daf3d..745122f85 100644
--- a/13_integrated_testing/src/lib.rs
+++ b/13_integrated_testing/src/lib.rs
@@ -102,11 +102,10 @@
 //!
 //! # Boot flow
 //!
-//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
-//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
+//! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
 //! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
 //!
-//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
 #![allow(clippy::clippy::upper_case_acronyms)]
diff --git a/13_integrated_testing/tests/00_console_sanity.rs b/13_integrated_testing/tests/00_console_sanity.rs
index c3754aa9f..ad7fd2bf5 100644
--- a/13_integrated_testing/tests/00_console_sanity.rs
+++ b/13_integrated_testing/tests/00_console_sanity.rs
@@ -8,7 +8,7 @@
 #![no_main]
 #![no_std]
 
-use libkernel::{bsp, console, exception, print};
+use libkernel::{bsp, console, cpu, exception, print};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
@@ -31,5 +31,5 @@ unsafe fn kernel_init() -> ! {
     print!("{}", console().chars_read());
 
     // The QEMU process running this test will be closed by the I/O test harness.
-    loop {}
+    cpu::wait_forever()
 }
diff --git a/14_exceptions_part2_peripheral_IRQs/README.md b/14_exceptions_part2_peripheral_IRQs/README.md
index 54e33071c..b78da7162 100644
--- a/14_exceptions_part2_peripheral_IRQs/README.md
+++ b/14_exceptions_part2_peripheral_IRQs/README.md
@@ -744,6 +744,40 @@ Minipush 1.0
 ## Diff to previous
 ```diff
 
+diff -uNr 13_integrated_testing/src/_arch/aarch64/cpu/smp.rs 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs
+--- 13_integrated_testing/src/_arch/aarch64/cpu/smp.rs
++++ 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs
+@@ -0,0 +1,29 @@
++// SPDX-License-Identifier: MIT OR Apache-2.0
++//
++// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
++
++//! Architectural symmetric multiprocessing.
++//!
++//! # Orientation
++//!
++//! Since arch modules are imported into generic modules using the path attribute, the path of this
++//! file is:
++//!
++//! crate::cpu::smp::arch_smp
++
++use cortex_a::regs::*;
++
++//--------------------------------------------------------------------------------------------------
++// Public Code
++//--------------------------------------------------------------------------------------------------
++
++/// Return the executing core's id.
++#[inline(always)]
++pub fn core_id<T>() -> T
++where
++    T: From<u8>,
++{
++    const CORE_MASK: u64 = 0b11;
++
++    T::from((MPIDR_EL1.get() & CORE_MASK) as u8)
++}
+
 diff -uNr 13_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs
 --- 13_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs
 +++ 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs
@@ -857,19 +891,6 @@ diff -uNr 13_integrated_testing/src/_arch/aarch64/exception.rs 14_exceptions_par
 
  #[no_mangle]
 
-diff -uNr 13_integrated_testing/src/_arch/aarch64/memory/mmu.rs 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
---- 13_integrated_testing/src/_arch/aarch64/memory/mmu.rs
-+++ 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
-@@ -149,7 +149,7 @@
-         barrier::isb(barrier::SY);
-
-         // Enable the MMU and turn on data and instruction caching.
--        SCTLR_EL1.modify(SCTLR_EL1::M::Enable + SCTLR_EL1::C::Cacheable + SCTLR_EL1::I::Cacheable);
-+        SCTLR_EL1.modify(SCTLR_EL1::M::Enable);
-
-         // Force MMU init to complete before next instruction.
-         barrier::isb(barrier::SY);
-
 diff -uNr 13_integrated_testing/src/bsp/device_driver/arm/gicv2/gicc.rs 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs
 --- 13_integrated_testing/src/bsp/device_driver/arm/gicv2/gicc.rs
 +++ 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs
@@ -2136,6 +2157,38 @@ diff -uNr 13_integrated_testing/src/bsp/raspberrypi.rs 14_exceptions_part2_perip
  //--------------------------------------------------------------------------------------------------
  // Public Code
 
+diff -uNr 13_integrated_testing/src/cpu/smp.rs 14_exceptions_part2_peripheral_IRQs/src/cpu/smp.rs
+--- 13_integrated_testing/src/cpu/smp.rs
++++ 14_exceptions_part2_peripheral_IRQs/src/cpu/smp.rs
+@@ -0,0 +1,14 @@
++// SPDX-License-Identifier: MIT OR Apache-2.0
++//
++// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
++
++//! Symmetric multiprocessing.
++
++#[cfg(target_arch = "aarch64")]
++#[path = "../_arch/aarch64/cpu/smp.rs"]
++mod arch_smp;
++
++//--------------------------------------------------------------------------------------------------
++// Architectural Public Reexports
++//--------------------------------------------------------------------------------------------------
++pub use arch_smp::core_id;
+
+diff -uNr 13_integrated_testing/src/cpu.rs 14_exceptions_part2_peripheral_IRQs/src/cpu.rs
+--- 13_integrated_testing/src/cpu.rs
++++ 14_exceptions_part2_peripheral_IRQs/src/cpu.rs
+@@ -10,6 +10,8 @@
+
+ mod boot;
+
++pub mod smp;
++
+ //--------------------------------------------------------------------------------------------------
+ // Architectural Public Reexports
+ //--------------------------------------------------------------------------------------------------
+
 diff -uNr 13_integrated_testing/src/driver.rs 14_exceptions_part2_peripheral_IRQs/src/driver.rs
 --- 13_integrated_testing/src/driver.rs
 +++ 14_exceptions_part2_peripheral_IRQs/src/driver.rs
@@ -2309,7 +2362,7 @@ diff -uNr 13_integrated_testing/src/exception/asynchronous.rs 14_exceptions_part
 diff -uNr 13_integrated_testing/src/lib.rs 14_exceptions_part2_peripheral_IRQs/src/lib.rs
 --- 13_integrated_testing/src/lib.rs
 +++ 14_exceptions_part2_peripheral_IRQs/src/lib.rs
-@@ -111,6 +111,7 @@
+@@ -110,6 +110,7 @@
 
  #![allow(clippy::clippy::upper_case_acronyms)]
  #![allow(incomplete_features)]
@@ -2317,7 +2370,7 @@ diff -uNr 13_integrated_testing/src/lib.rs 14_exceptions_part2_peripheral_IRQs/s
  #![feature(const_fn_fn_ptr_basics)]
  #![feature(const_generics)]
  #![feature(const_panic)]
-@@ -138,6 +139,7 @@
+@@ -137,6 +138,7 @@
  pub mod exception;
  pub mod memory;
  pub mod print;
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.rs b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.rs
index c2f5fe0b7..02798fdc0 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.rs
@@ -11,26 +11,24 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-use crate::{bsp, cpu};
+use crate::runtime_init;
 use cortex_a::{asm, regs::*};
 
+// Assembly counterpart to this file.
+global_asm!(include_str!("boot.s"));
+
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-/// Transition from EL2 to EL1.
+/// Prepares the transition from EL2 to EL1.
 ///
 /// # Safety
 ///
+/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
 /// - The HW state of EL1 must be prepared in a sound way.
-/// - Exception return from EL2 must must continue execution in EL1 with
-///   `runtime_init::runtime_init()`.
-/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
-///   a stack for EL2.
 #[inline(always)]
-unsafe fn el2_to_el1_transition() -> ! {
-    use crate::runtime_init;
-
+unsafe fn prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr: u64) {
     // Enable timer counter registers for EL1.
     CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
 
@@ -55,35 +53,27 @@ unsafe fn el2_to_el1_transition() -> ! {
     // Second, let the link register point to runtime_init().
     ELR_EL2.set(runtime_init::runtime_init as *const () as u64);
 
-    // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it.
-    SP_EL1.set(bsp::memory::boot_core_stack_end() as u64);
-
-    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
-    asm::eret()
+    // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it. Since there
+    // are no plans to ever return to EL2, just re-use the same stack.
+    SP_EL1.set(phys_boot_core_stack_end_exclusive_addr);
 }
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// The entry of the `kernel` binary.
+/// The Rust entry of the `kernel` binary.
 ///
-/// The function must be named `_start`, because the linker is looking for this exact name.
+/// The function is called from the assembly `_start` function.
 ///
 /// # Safety
 ///
-/// - Linker script must ensure to place this function where it is expected by the target machine.
-/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
-///   a stack for EL2.
+/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
+/// - Exception return from EL2 must must continue execution in EL1 with `runtime_init()`.
 #[no_mangle]
-pub unsafe fn _start() -> ! {
-    // Expect the boot core to start in EL2.
-    if (bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id())
-        && (CurrentEL.get() == CurrentEL::EL::EL2.value)
-    {
-        el2_to_el1_transition()
-    } else {
-        // If not core0, infinitely wait for events.
-        cpu::wait_forever()
-    }
+pub unsafe extern "C" fn _start_rust(phys_boot_core_stack_end_exclusive_addr: u64) -> ! {
+    prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr);
+
+    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
+    asm::eret()
 }
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.s b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.s
new file mode 100644
index 000000000..be81b20a2
--- /dev/null
+++ b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.s
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//--------------------------------------------------------------------------------------------------
+// Definitions
+//--------------------------------------------------------------------------------------------------
+
+.equ _EL2, 0x8
+.equ _core_id_mask, 0b11
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+.section .text._start
+
+//------------------------------------------------------------------------------
+// fn _start()
+//------------------------------------------------------------------------------
+_start:
+	// Only proceed if the core executes in EL2. Park it otherwise.
+	mrs	x0, CurrentEL
+	cmp	x0, _EL2
+	b.ne	1f
+
+	// Only proceed on the boot core. Park it otherwise.
+	mrs	x1, MPIDR_EL1
+	and	x1, x1, _core_id_mask
+	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
+	cmp	x1, x2
+	b.ne	1f
+
+	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
+
+	// Set the stack pointer. This ensures that any code in EL2 that needs the stack will work.
+	ldr	x0, =__boot_core_stack_end_exclusive
+	mov	sp, x0
+
+	// Jump to Rust code. x0 holds the function argument provided to _start_rust().
+	b	_start_rust
+
+	// Infinitely wait for events (aka "park the core").
+1:	wfe
+	b	1b
+
+.size	_start, . - _start
+.type	_start, function
+.global	_start
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.S b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.S
deleted file mode 100644
index fd7b1f930..000000000
--- a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.S
+++ /dev/null
@@ -1,138 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-/// Call the function provided by parameter `\handler` after saving the exception context. Provide
-/// the context as the first parameter to '\handler'.
-.macro CALL_WITH_CONTEXT handler
-    // Make room on the stack for the exception context.
-    sub    sp,  sp,  #16 * 17
-
-    // Store all general purpose registers on the stack.
-    stp    x0,  x1,  [sp, #16 * 0]
-    stp    x2,  x3,  [sp, #16 * 1]
-    stp    x4,  x5,  [sp, #16 * 2]
-    stp    x6,  x7,  [sp, #16 * 3]
-    stp    x8,  x9,  [sp, #16 * 4]
-    stp    x10, x11, [sp, #16 * 5]
-    stp    x12, x13, [sp, #16 * 6]
-    stp    x14, x15, [sp, #16 * 7]
-    stp    x16, x17, [sp, #16 * 8]
-    stp    x18, x19, [sp, #16 * 9]
-    stp    x20, x21, [sp, #16 * 10]
-    stp    x22, x23, [sp, #16 * 11]
-    stp    x24, x25, [sp, #16 * 12]
-    stp    x26, x27, [sp, #16 * 13]
-    stp    x28, x29, [sp, #16 * 14]
-
-    // Add the exception link register (ELR_EL1) and the saved program status (SPSR_EL1).
-    mrs    x1,  ELR_EL1
-    mrs    x2,  SPSR_EL1
-
-    stp    lr,  x1,  [sp, #16 * 15]
-    str    x2,       [sp, #16 * 16]
-
-    // x0 is the first argument for the function called through `\handler`.
-    mov    x0,  sp
-
-    // Call `\handler`.
-    bl     \handler
-
-    // After returning from exception handling code, replay the saved context and return via `eret`.
-    b      __exception_restore_context
-.endm
-
-.macro FIQ_SUSPEND
-1:  wfe
-    b      1b
-.endm
-
-//--------------------------------------------------------------------------------------------------
-// The exception vector table.
-//--------------------------------------------------------------------------------------------------
-.section .text
-
-// Align by 2^11 bytes, as demanded by ARMv8-A. Same as ALIGN(2048) in an ld script.
-.align 11
-
-// Export a symbol for the Rust code to use.
-__exception_vector_start:
-
-// Current exception level with SP_EL0.
-//
-// .org sets the offset relative to section start.
-//
-// # Safety
-//
-// - It must be ensured that `CALL_WITH_CONTEXT` <= 0x80 bytes.
-.org 0x000
-    CALL_WITH_CONTEXT current_el0_synchronous
-.org 0x080
-    CALL_WITH_CONTEXT current_el0_irq
-.org 0x100
-    FIQ_SUSPEND
-.org 0x180
-    CALL_WITH_CONTEXT current_el0_serror
-
-// Current exception level with SP_ELx, x > 0.
-.org 0x200
-    CALL_WITH_CONTEXT current_elx_synchronous
-.org 0x280
-    CALL_WITH_CONTEXT current_elx_irq
-.org 0x300
-    FIQ_SUSPEND
-.org 0x380
-    CALL_WITH_CONTEXT current_elx_serror
-
-// Lower exception level, AArch64
-.org 0x400
-    CALL_WITH_CONTEXT lower_aarch64_synchronous
-.org 0x480
-    CALL_WITH_CONTEXT lower_aarch64_irq
-.org 0x500
-    FIQ_SUSPEND
-.org 0x580
-    CALL_WITH_CONTEXT lower_aarch64_serror
-
-// Lower exception level, AArch32
-.org 0x600
-    CALL_WITH_CONTEXT lower_aarch32_synchronous
-.org 0x680
-    CALL_WITH_CONTEXT lower_aarch32_irq
-.org 0x700
-    FIQ_SUSPEND
-.org 0x780
-    CALL_WITH_CONTEXT lower_aarch32_serror
-.org 0x800
-
-//--------------------------------------------------------------------------------------------------
-// Helper functions
-//--------------------------------------------------------------------------------------------------
-.section .text
-
-__exception_restore_context:
-    ldr    w19,      [sp, #16 * 16]
-    ldp    lr,  x20, [sp, #16 * 15]
-
-    msr    SPSR_EL1, x19
-    msr    ELR_EL1,  x20
-
-    ldp    x0,  x1,  [sp, #16 * 0]
-    ldp    x2,  x3,  [sp, #16 * 1]
-    ldp    x4,  x5,  [sp, #16 * 2]
-    ldp    x6,  x7,  [sp, #16 * 3]
-    ldp    x8,  x9,  [sp, #16 * 4]
-    ldp    x10, x11, [sp, #16 * 5]
-    ldp    x12, x13, [sp, #16 * 6]
-    ldp    x14, x15, [sp, #16 * 7]
-    ldp    x16, x17, [sp, #16 * 8]
-    ldp    x18, x19, [sp, #16 * 9]
-    ldp    x20, x21, [sp, #16 * 10]
-    ldp    x22, x23, [sp, #16 * 11]
-    ldp    x24, x25, [sp, #16 * 12]
-    ldp    x26, x27, [sp, #16 * 13]
-    ldp    x28, x29, [sp, #16 * 14]
-
-    add    sp,  sp,  #16 * 17
-
-    eret
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
index de4f1f185..5c44abb70 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
@@ -17,7 +17,7 @@ use cortex_a::{barrier, regs::*};
 use register::InMemoryRegister;
 
 // Assembly counterpart to this file.
-global_asm!(include_str!("exception.S"));
+global_asm!(include_str!("exception.s"));
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.s b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.s
new file mode 100644
index 000000000..ffb1875ce
--- /dev/null
+++ b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.s
@@ -0,0 +1,148 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//--------------------------------------------------------------------------------------------------
+// Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Call the function provided by parameter `\handler` after saving the exception context. Provide
+/// the context as the first parameter to '\handler'.
+.macro CALL_WITH_CONTEXT handler
+	// Make room on the stack for the exception context.
+	sub	sp,  sp,  #16 * 17
+
+	// Store all general purpose registers on the stack.
+	stp	x0,  x1,  [sp, #16 * 0]
+	stp	x2,  x3,  [sp, #16 * 1]
+	stp	x4,  x5,  [sp, #16 * 2]
+	stp	x6,  x7,  [sp, #16 * 3]
+	stp	x8,  x9,  [sp, #16 * 4]
+	stp	x10, x11, [sp, #16 * 5]
+	stp	x12, x13, [sp, #16 * 6]
+	stp	x14, x15, [sp, #16 * 7]
+	stp	x16, x17, [sp, #16 * 8]
+	stp	x18, x19, [sp, #16 * 9]
+	stp	x20, x21, [sp, #16 * 10]
+	stp	x22, x23, [sp, #16 * 11]
+	stp	x24, x25, [sp, #16 * 12]
+	stp	x26, x27, [sp, #16 * 13]
+	stp	x28, x29, [sp, #16 * 14]
+
+	// Add the exception link register (ELR_EL1) and the saved program status (SPSR_EL1).
+	mrs	x1,  ELR_EL1
+	mrs	x2,  SPSR_EL1
+
+	stp	lr,  x1,  [sp, #16 * 15]
+	str	x2,       [sp, #16 * 16]
+
+	// x0 is the first argument for the function called through `\handler`.
+	mov	x0,  sp
+
+	// Call `\handler`.
+	bl	\handler
+
+	// After returning from exception handling code, replay the saved context and return via
+	// `eret`.
+	b	__exception_restore_context
+.endm
+
+.macro FIQ_SUSPEND
+1:	wfe
+	b	1b
+.endm
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+.section .text
+
+//------------------------------------------------------------------------------
+// The exception vector table.
+//------------------------------------------------------------------------------
+
+// Align by 2^11 bytes, as demanded by ARMv8-A. Same as ALIGN(2048) in an ld script.
+.align 11
+
+// Export a symbol for the Rust code to use.
+__exception_vector_start:
+
+// Current exception level with SP_EL0.
+//
+// .org sets the offset relative to section start.
+//
+// # Safety
+//
+// - It must be ensured that `CALL_WITH_CONTEXT` <= 0x80 bytes.
+.org 0x000
+	CALL_WITH_CONTEXT current_el0_synchronous
+.org 0x080
+	CALL_WITH_CONTEXT current_el0_irq
+.org 0x100
+	FIQ_SUSPEND
+.org 0x180
+	CALL_WITH_CONTEXT current_el0_serror
+
+// Current exception level with SP_ELx, x > 0.
+.org 0x200
+	CALL_WITH_CONTEXT current_elx_synchronous
+.org 0x280
+	CALL_WITH_CONTEXT current_elx_irq
+.org 0x300
+	FIQ_SUSPEND
+.org 0x380
+	CALL_WITH_CONTEXT current_elx_serror
+
+// Lower exception level, AArch64
+.org 0x400
+	CALL_WITH_CONTEXT lower_aarch64_synchronous
+.org 0x480
+	CALL_WITH_CONTEXT lower_aarch64_irq
+.org 0x500
+	FIQ_SUSPEND
+.org 0x580
+	CALL_WITH_CONTEXT lower_aarch64_serror
+
+// Lower exception level, AArch32
+.org 0x600
+	CALL_WITH_CONTEXT lower_aarch32_synchronous
+.org 0x680
+	CALL_WITH_CONTEXT lower_aarch32_irq
+.org 0x700
+	FIQ_SUSPEND
+.org 0x780
+	CALL_WITH_CONTEXT lower_aarch32_serror
+.org 0x800
+
+//------------------------------------------------------------------------------
+// fn __exception_restore_context()
+//------------------------------------------------------------------------------
+__exception_restore_context:
+	ldr	w19,      [sp, #16 * 16]
+	ldp	lr,  x20, [sp, #16 * 15]
+
+	msr	SPSR_EL1, x19
+	msr	ELR_EL1,  x20
+
+	ldp	x0,  x1,  [sp, #16 * 0]
+	ldp	x2,  x3,  [sp, #16 * 1]
+	ldp	x4,  x5,  [sp, #16 * 2]
+	ldp	x6,  x7,  [sp, #16 * 3]
+	ldp	x8,  x9,  [sp, #16 * 4]
+	ldp	x10, x11, [sp, #16 * 5]
+	ldp	x12, x13, [sp, #16 * 6]
+	ldp	x14, x15, [sp, #16 * 7]
+	ldp	x16, x17, [sp, #16 * 8]
+	ldp	x18, x19, [sp, #16 * 9]
+	ldp	x20, x21, [sp, #16 * 10]
+	ldp	x22, x23, [sp, #16 * 11]
+	ldp	x24, x25, [sp, #16 * 12]
+	ldp	x26, x27, [sp, #16 * 13]
+	ldp	x28, x29, [sp, #16 * 14]
+
+	add	sp,  sp,  #16 * 17
+
+	eret
+
+.size	__exception_restore_context, . - __exception_restore_context
+.type	__exception_restore_context, function
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
index cbf04a98e..29e8125d7 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
@@ -149,7 +149,7 @@ impl memory::mmu::interface::MMU for MemoryManagementUnit {
         barrier::isb(barrier::SY);
 
         // Enable the MMU and turn on data and instruction caching.
-        SCTLR_EL1.modify(SCTLR_EL1::M::Enable);
+        SCTLR_EL1.modify(SCTLR_EL1::M::Enable + SCTLR_EL1::C::Cacheable + SCTLR_EL1::I::Cacheable);
 
         // Force MMU init to complete before next instruction.
         barrier::isb(barrier::SY);
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/cpu.rs b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/cpu.rs
index 16ab927d7..d09ff9568 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/cpu.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/cpu.rs
@@ -9,4 +9,6 @@
 //--------------------------------------------------------------------------------------------------
 
 /// Used by `arch` code to find the early boot core.
-pub const BOOT_CORE_ID: u64 = 0;
+#[no_mangle]
+#[link_section = ".text._start_arguments"]
+pub static BOOT_CORE_ID: u64 = 0;
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld
index 6c63ba10f..854f5b388 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld
@@ -17,6 +17,11 @@ PHDRS
 SECTIONS
 {
     . =  __rpi_load_addr;
+                                        /*   ^             */
+                                        /*   | stack       */
+                                        /*   | growth      */
+                                        /*   | direction   */
+   __boot_core_stack_end_exclusive = .; /*   |             */
 
     /***********************************************************************************************
     * Code + RO Data + Global Offset Table
@@ -25,7 +30,16 @@ SECTIONS
     .text :
     {
         KEEP(*(.text._start))
-        *(.text*)
+
+        /* Special constants (or statics in Rust speak) needed by _start().
+         *
+         * They are placed in close proximity to _start() from where they will be read. This ensures
+         * that position-independent, PC-relative loads can be emitted.
+         */
+        *(.text._start_arguments)
+
+        *(.text._start_rust) /* The Rust entry point */
+        *(.text*)            /* Everything else */
     } :segment_rx
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
index d07f2dc34..8a58a17eb 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
@@ -101,12 +101,6 @@ fn rx_end_exclusive() -> usize {
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// Exclusive end address of the boot core's stack.
-#[inline(always)]
-pub fn boot_core_stack_end() -> usize {
-    rx_start()
-}
-
 /// Return the inclusive range spanning the .bss section.
 ///
 /// # Safety
diff --git a/14_exceptions_part2_peripheral_IRQs/src/lib.rs b/14_exceptions_part2_peripheral_IRQs/src/lib.rs
index 4ea416fd5..c4e744608 100644
--- a/14_exceptions_part2_peripheral_IRQs/src/lib.rs
+++ b/14_exceptions_part2_peripheral_IRQs/src/lib.rs
@@ -102,11 +102,10 @@
 //!
 //! # Boot flow
 //!
-//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
-//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
+//! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
 //! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
 //!
-//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
 #![allow(clippy::clippy::upper_case_acronyms)]
diff --git a/14_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs b/14_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs
index c3754aa9f..ad7fd2bf5 100644
--- a/14_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs
+++ b/14_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs
@@ -8,7 +8,7 @@
 #![no_main]
 #![no_std]
 
-use libkernel::{bsp, console, exception, print};
+use libkernel::{bsp, console, cpu, exception, print};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
@@ -31,5 +31,5 @@ unsafe fn kernel_init() -> ! {
     print!("{}", console().chars_read());
 
     // The QEMU process running this test will be closed by the I/O test harness.
-    loop {}
+    cpu::wait_forever()
 }
diff --git a/15_virtual_mem_part2_mmio_remap/README.md b/15_virtual_mem_part2_mmio_remap/README.md
index c512c51c6..1745d4b14 100644
--- a/15_virtual_mem_part2_mmio_remap/README.md
+++ b/15_virtual_mem_part2_mmio_remap/README.md
@@ -369,19 +369,6 @@ Minipush 1.0
 ## Diff to previous
 ```diff
 
-diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.rs 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs
---- 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.rs
-+++ 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs
-@@ -56,7 +56,7 @@
-     ELR_EL2.set(runtime_init::runtime_init as *const () as u64);
-
-     // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it.
--    SP_EL1.set(bsp::memory::boot_core_stack_end() as u64);
-+    SP_EL1.set(bsp::memory::phys_boot_core_stack_end().into_usize() as u64);
-
-     // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
-     asm::eret()
-
 diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
 --- 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
 +++ 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
@@ -805,15 +792,6 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 15
 
          self.configure_translation_control();
 
-@@ -149,7 +140,7 @@
-         barrier::isb(barrier::SY);
-
-         // Enable the MMU and turn on data and instruction caching.
--        SCTLR_EL1.modify(SCTLR_EL1::M::Enable);
-+        SCTLR_EL1.modify(SCTLR_EL1::M::Enable + SCTLR_EL1::C::Cacheable + SCTLR_EL1::I::Cacheable);
-
-         // Force MMU init to complete before next instruction.
-         barrier::isb(barrier::SY);
 @@ -162,22 +153,3 @@
          SCTLR_EL1.matches_all(SCTLR_EL1::M::Enable)
      }
@@ -1478,7 +1456,19 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/driver.rs 15_v
 diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
 --- 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld
 +++ 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
-@@ -37,6 +37,7 @@
+@@ -17,11 +17,6 @@
+ SECTIONS
+ {
+     . =  __rpi_load_addr;
+-                                        /*   ^             */
+-                                        /*   | stack       */
+-                                        /*   | growth      */
+-                                        /*   | direction   */
+-   __boot_core_stack_end_exclusive = .; /*   |             */
+
+     /***********************************************************************************************
+     * Code + RO Data + Global Offset Table
+@@ -51,6 +46,7 @@
      /***********************************************************************************************
      * Data + BSS
      ***********************************************************************************************/
@@ -1486,7 +1476,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld 15_vir
      .data : { *(.data*) } :segment_rw
 
      /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-@@ -49,4 +50,21 @@
+@@ -63,4 +59,23 @@
          . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
          __bss_end_inclusive = . - 8;
      } :NONE
@@ -1504,9 +1494,11 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld 15_vir
 +    /***********************************************************************************************
 +    * Boot Core Stack
 +    ***********************************************************************************************/
-+     __boot_core_stack_start = .;
-+     . += 512K;
-+     __boot_core_stack_end_exclusive = .;
++    __boot_core_stack_start = .;         /*   ^             */
++                                         /*   | stack       */
++    . += 512K;                           /*   | growth      */
++                                         /*   | direction   */
++    __boot_core_stack_end_exclusive = .; /*   |             */
  }
 
 diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
@@ -2002,19 +1994,6 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 15_v
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -103,8 +193,10 @@
-
- /// Exclusive end address of the boot core's stack.
- #[inline(always)]
--pub fn boot_core_stack_end() -> usize {
--    rx_start()
-+pub fn phys_boot_core_stack_end() -> Address<Physical> {
-+    // The binary is still identity mapped, so we don't need to convert here.
-+    let end = virt_boot_core_stack_start().into_usize() + boot_core_stack_size();
-+    Address::new(end)
- }
-
- /// Return the inclusive range spanning the .bss section.
 
 diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi.rs 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi.rs
 --- 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi.rs
@@ -2138,7 +2117,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/driver.rs 15_virtual_mem_part2
 diff -uNr 14_exceptions_part2_peripheral_IRQs/src/lib.rs 15_virtual_mem_part2_mmio_remap/src/lib.rs
 --- 14_exceptions_part2_peripheral_IRQs/src/lib.rs
 +++ 15_virtual_mem_part2_mmio_remap/src/lib.rs
-@@ -112,6 +112,8 @@
+@@ -111,6 +111,8 @@
  #![allow(clippy::clippy::upper_case_acronyms)]
  #![allow(incomplete_features)]
  #![feature(asm)]
@@ -2147,7 +2126,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/lib.rs 15_virtual_mem_part2_mm
  #![feature(const_fn_fn_ptr_basics)]
  #![feature(const_generics)]
  #![feature(const_panic)]
-@@ -133,6 +135,7 @@
+@@ -132,6 +134,7 @@
  mod synchronization;
 
  pub mod bsp;
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs
index 276965146..02798fdc0 100644
--- a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs
@@ -11,26 +11,24 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-use crate::{bsp, cpu};
+use crate::runtime_init;
 use cortex_a::{asm, regs::*};
 
+// Assembly counterpart to this file.
+global_asm!(include_str!("boot.s"));
+
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-/// Transition from EL2 to EL1.
+/// Prepares the transition from EL2 to EL1.
 ///
 /// # Safety
 ///
+/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
 /// - The HW state of EL1 must be prepared in a sound way.
-/// - Exception return from EL2 must must continue execution in EL1 with
-///   `runtime_init::runtime_init()`.
-/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
-///   a stack for EL2.
 #[inline(always)]
-unsafe fn el2_to_el1_transition() -> ! {
-    use crate::runtime_init;
-
+unsafe fn prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr: u64) {
     // Enable timer counter registers for EL1.
     CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
 
@@ -55,35 +53,27 @@ unsafe fn el2_to_el1_transition() -> ! {
     // Second, let the link register point to runtime_init().
     ELR_EL2.set(runtime_init::runtime_init as *const () as u64);
 
-    // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it.
-    SP_EL1.set(bsp::memory::phys_boot_core_stack_end().into_usize() as u64);
-
-    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
-    asm::eret()
+    // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it. Since there
+    // are no plans to ever return to EL2, just re-use the same stack.
+    SP_EL1.set(phys_boot_core_stack_end_exclusive_addr);
 }
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// The entry of the `kernel` binary.
+/// The Rust entry of the `kernel` binary.
 ///
-/// The function must be named `_start`, because the linker is looking for this exact name.
+/// The function is called from the assembly `_start` function.
 ///
 /// # Safety
 ///
-/// - Linker script must ensure to place this function where it is expected by the target machine.
-/// - We have to hope that the compiler omits any stack pointer usage, because we are not setting up
-///   a stack for EL2.
+/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
+/// - Exception return from EL2 must must continue execution in EL1 with `runtime_init()`.
 #[no_mangle]
-pub unsafe fn _start() -> ! {
-    // Expect the boot core to start in EL2.
-    if (bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id())
-        && (CurrentEL.get() == CurrentEL::EL::EL2.value)
-    {
-        el2_to_el1_transition()
-    } else {
-        // If not core0, infinitely wait for events.
-        cpu::wait_forever()
-    }
+pub unsafe extern "C" fn _start_rust(phys_boot_core_stack_end_exclusive_addr: u64) -> ! {
+    prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr);
+
+    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
+    asm::eret()
 }
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.s b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.s
new file mode 100644
index 000000000..be81b20a2
--- /dev/null
+++ b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.s
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//--------------------------------------------------------------------------------------------------
+// Definitions
+//--------------------------------------------------------------------------------------------------
+
+.equ _EL2, 0x8
+.equ _core_id_mask, 0b11
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+.section .text._start
+
+//------------------------------------------------------------------------------
+// fn _start()
+//------------------------------------------------------------------------------
+_start:
+	// Only proceed if the core executes in EL2. Park it otherwise.
+	mrs	x0, CurrentEL
+	cmp	x0, _EL2
+	b.ne	1f
+
+	// Only proceed on the boot core. Park it otherwise.
+	mrs	x1, MPIDR_EL1
+	and	x1, x1, _core_id_mask
+	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
+	cmp	x1, x2
+	b.ne	1f
+
+	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
+
+	// Set the stack pointer. This ensures that any code in EL2 that needs the stack will work.
+	ldr	x0, =__boot_core_stack_end_exclusive
+	mov	sp, x0
+
+	// Jump to Rust code. x0 holds the function argument provided to _start_rust().
+	b	_start_rust
+
+	// Infinitely wait for events (aka "park the core").
+1:	wfe
+	b	1b
+
+.size	_start, . - _start
+.type	_start, function
+.global	_start
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.S b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.S
deleted file mode 100644
index fd7b1f930..000000000
--- a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.S
+++ /dev/null
@@ -1,138 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-/// Call the function provided by parameter `\handler` after saving the exception context. Provide
-/// the context as the first parameter to '\handler'.
-.macro CALL_WITH_CONTEXT handler
-    // Make room on the stack for the exception context.
-    sub    sp,  sp,  #16 * 17
-
-    // Store all general purpose registers on the stack.
-    stp    x0,  x1,  [sp, #16 * 0]
-    stp    x2,  x3,  [sp, #16 * 1]
-    stp    x4,  x5,  [sp, #16 * 2]
-    stp    x6,  x7,  [sp, #16 * 3]
-    stp    x8,  x9,  [sp, #16 * 4]
-    stp    x10, x11, [sp, #16 * 5]
-    stp    x12, x13, [sp, #16 * 6]
-    stp    x14, x15, [sp, #16 * 7]
-    stp    x16, x17, [sp, #16 * 8]
-    stp    x18, x19, [sp, #16 * 9]
-    stp    x20, x21, [sp, #16 * 10]
-    stp    x22, x23, [sp, #16 * 11]
-    stp    x24, x25, [sp, #16 * 12]
-    stp    x26, x27, [sp, #16 * 13]
-    stp    x28, x29, [sp, #16 * 14]
-
-    // Add the exception link register (ELR_EL1) and the saved program status (SPSR_EL1).
-    mrs    x1,  ELR_EL1
-    mrs    x2,  SPSR_EL1
-
-    stp    lr,  x1,  [sp, #16 * 15]
-    str    x2,       [sp, #16 * 16]
-
-    // x0 is the first argument for the function called through `\handler`.
-    mov    x0,  sp
-
-    // Call `\handler`.
-    bl     \handler
-
-    // After returning from exception handling code, replay the saved context and return via `eret`.
-    b      __exception_restore_context
-.endm
-
-.macro FIQ_SUSPEND
-1:  wfe
-    b      1b
-.endm
-
-//--------------------------------------------------------------------------------------------------
-// The exception vector table.
-//--------------------------------------------------------------------------------------------------
-.section .text
-
-// Align by 2^11 bytes, as demanded by ARMv8-A. Same as ALIGN(2048) in an ld script.
-.align 11
-
-// Export a symbol for the Rust code to use.
-__exception_vector_start:
-
-// Current exception level with SP_EL0.
-//
-// .org sets the offset relative to section start.
-//
-// # Safety
-//
-// - It must be ensured that `CALL_WITH_CONTEXT` <= 0x80 bytes.
-.org 0x000
-    CALL_WITH_CONTEXT current_el0_synchronous
-.org 0x080
-    CALL_WITH_CONTEXT current_el0_irq
-.org 0x100
-    FIQ_SUSPEND
-.org 0x180
-    CALL_WITH_CONTEXT current_el0_serror
-
-// Current exception level with SP_ELx, x > 0.
-.org 0x200
-    CALL_WITH_CONTEXT current_elx_synchronous
-.org 0x280
-    CALL_WITH_CONTEXT current_elx_irq
-.org 0x300
-    FIQ_SUSPEND
-.org 0x380
-    CALL_WITH_CONTEXT current_elx_serror
-
-// Lower exception level, AArch64
-.org 0x400
-    CALL_WITH_CONTEXT lower_aarch64_synchronous
-.org 0x480
-    CALL_WITH_CONTEXT lower_aarch64_irq
-.org 0x500
-    FIQ_SUSPEND
-.org 0x580
-    CALL_WITH_CONTEXT lower_aarch64_serror
-
-// Lower exception level, AArch32
-.org 0x600
-    CALL_WITH_CONTEXT lower_aarch32_synchronous
-.org 0x680
-    CALL_WITH_CONTEXT lower_aarch32_irq
-.org 0x700
-    FIQ_SUSPEND
-.org 0x780
-    CALL_WITH_CONTEXT lower_aarch32_serror
-.org 0x800
-
-//--------------------------------------------------------------------------------------------------
-// Helper functions
-//--------------------------------------------------------------------------------------------------
-.section .text
-
-__exception_restore_context:
-    ldr    w19,      [sp, #16 * 16]
-    ldp    lr,  x20, [sp, #16 * 15]
-
-    msr    SPSR_EL1, x19
-    msr    ELR_EL1,  x20
-
-    ldp    x0,  x1,  [sp, #16 * 0]
-    ldp    x2,  x3,  [sp, #16 * 1]
-    ldp    x4,  x5,  [sp, #16 * 2]
-    ldp    x6,  x7,  [sp, #16 * 3]
-    ldp    x8,  x9,  [sp, #16 * 4]
-    ldp    x10, x11, [sp, #16 * 5]
-    ldp    x12, x13, [sp, #16 * 6]
-    ldp    x14, x15, [sp, #16 * 7]
-    ldp    x16, x17, [sp, #16 * 8]
-    ldp    x18, x19, [sp, #16 * 9]
-    ldp    x20, x21, [sp, #16 * 10]
-    ldp    x22, x23, [sp, #16 * 11]
-    ldp    x24, x25, [sp, #16 * 12]
-    ldp    x26, x27, [sp, #16 * 13]
-    ldp    x28, x29, [sp, #16 * 14]
-
-    add    sp,  sp,  #16 * 17
-
-    eret
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
index b93387344..4a2c8de96 100644
--- a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
@@ -21,7 +21,7 @@ use cortex_a::{barrier, regs::*};
 use register::InMemoryRegister;
 
 // Assembly counterpart to this file.
-global_asm!(include_str!("exception.S"));
+global_asm!(include_str!("exception.s"));
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.s b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.s
new file mode 100644
index 000000000..ffb1875ce
--- /dev/null
+++ b/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.s
@@ -0,0 +1,148 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//--------------------------------------------------------------------------------------------------
+// Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Call the function provided by parameter `\handler` after saving the exception context. Provide
+/// the context as the first parameter to '\handler'.
+.macro CALL_WITH_CONTEXT handler
+	// Make room on the stack for the exception context.
+	sub	sp,  sp,  #16 * 17
+
+	// Store all general purpose registers on the stack.
+	stp	x0,  x1,  [sp, #16 * 0]
+	stp	x2,  x3,  [sp, #16 * 1]
+	stp	x4,  x5,  [sp, #16 * 2]
+	stp	x6,  x7,  [sp, #16 * 3]
+	stp	x8,  x9,  [sp, #16 * 4]
+	stp	x10, x11, [sp, #16 * 5]
+	stp	x12, x13, [sp, #16 * 6]
+	stp	x14, x15, [sp, #16 * 7]
+	stp	x16, x17, [sp, #16 * 8]
+	stp	x18, x19, [sp, #16 * 9]
+	stp	x20, x21, [sp, #16 * 10]
+	stp	x22, x23, [sp, #16 * 11]
+	stp	x24, x25, [sp, #16 * 12]
+	stp	x26, x27, [sp, #16 * 13]
+	stp	x28, x29, [sp, #16 * 14]
+
+	// Add the exception link register (ELR_EL1) and the saved program status (SPSR_EL1).
+	mrs	x1,  ELR_EL1
+	mrs	x2,  SPSR_EL1
+
+	stp	lr,  x1,  [sp, #16 * 15]
+	str	x2,       [sp, #16 * 16]
+
+	// x0 is the first argument for the function called through `\handler`.
+	mov	x0,  sp
+
+	// Call `\handler`.
+	bl	\handler
+
+	// After returning from exception handling code, replay the saved context and return via
+	// `eret`.
+	b	__exception_restore_context
+.endm
+
+.macro FIQ_SUSPEND
+1:	wfe
+	b	1b
+.endm
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+.section .text
+
+//------------------------------------------------------------------------------
+// The exception vector table.
+//------------------------------------------------------------------------------
+
+// Align by 2^11 bytes, as demanded by ARMv8-A. Same as ALIGN(2048) in an ld script.
+.align 11
+
+// Export a symbol for the Rust code to use.
+__exception_vector_start:
+
+// Current exception level with SP_EL0.
+//
+// .org sets the offset relative to section start.
+//
+// # Safety
+//
+// - It must be ensured that `CALL_WITH_CONTEXT` <= 0x80 bytes.
+.org 0x000
+	CALL_WITH_CONTEXT current_el0_synchronous
+.org 0x080
+	CALL_WITH_CONTEXT current_el0_irq
+.org 0x100
+	FIQ_SUSPEND
+.org 0x180
+	CALL_WITH_CONTEXT current_el0_serror
+
+// Current exception level with SP_ELx, x > 0.
+.org 0x200
+	CALL_WITH_CONTEXT current_elx_synchronous
+.org 0x280
+	CALL_WITH_CONTEXT current_elx_irq
+.org 0x300
+	FIQ_SUSPEND
+.org 0x380
+	CALL_WITH_CONTEXT current_elx_serror
+
+// Lower exception level, AArch64
+.org 0x400
+	CALL_WITH_CONTEXT lower_aarch64_synchronous
+.org 0x480
+	CALL_WITH_CONTEXT lower_aarch64_irq
+.org 0x500
+	FIQ_SUSPEND
+.org 0x580
+	CALL_WITH_CONTEXT lower_aarch64_serror
+
+// Lower exception level, AArch32
+.org 0x600
+	CALL_WITH_CONTEXT lower_aarch32_synchronous
+.org 0x680
+	CALL_WITH_CONTEXT lower_aarch32_irq
+.org 0x700
+	FIQ_SUSPEND
+.org 0x780
+	CALL_WITH_CONTEXT lower_aarch32_serror
+.org 0x800
+
+//------------------------------------------------------------------------------
+// fn __exception_restore_context()
+//------------------------------------------------------------------------------
+__exception_restore_context:
+	ldr	w19,      [sp, #16 * 16]
+	ldp	lr,  x20, [sp, #16 * 15]
+
+	msr	SPSR_EL1, x19
+	msr	ELR_EL1,  x20
+
+	ldp	x0,  x1,  [sp, #16 * 0]
+	ldp	x2,  x3,  [sp, #16 * 1]
+	ldp	x4,  x5,  [sp, #16 * 2]
+	ldp	x6,  x7,  [sp, #16 * 3]
+	ldp	x8,  x9,  [sp, #16 * 4]
+	ldp	x10, x11, [sp, #16 * 5]
+	ldp	x12, x13, [sp, #16 * 6]
+	ldp	x14, x15, [sp, #16 * 7]
+	ldp	x16, x17, [sp, #16 * 8]
+	ldp	x18, x19, [sp, #16 * 9]
+	ldp	x20, x21, [sp, #16 * 10]
+	ldp	x22, x23, [sp, #16 * 11]
+	ldp	x24, x25, [sp, #16 * 12]
+	ldp	x26, x27, [sp, #16 * 13]
+	ldp	x28, x29, [sp, #16 * 14]
+
+	add	sp,  sp,  #16 * 17
+
+	eret
+
+.size	__exception_restore_context, . - __exception_restore_context
+.type	__exception_restore_context, function
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/cpu.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/cpu.rs
index 16ab927d7..d09ff9568 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/cpu.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/cpu.rs
@@ -9,4 +9,6 @@
 //--------------------------------------------------------------------------------------------------
 
 /// Used by `arch` code to find the early boot core.
-pub const BOOT_CORE_ID: u64 = 0;
+#[no_mangle]
+#[link_section = ".text._start_arguments"]
+pub static BOOT_CORE_ID: u64 = 0;
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
index f2b5d05d7..7fddf3ec5 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
@@ -25,7 +25,16 @@ SECTIONS
     .text :
     {
         KEEP(*(.text._start))
-        *(.text*)
+
+        /* Special constants (or statics in Rust speak) needed by _start().
+         *
+         * They are placed in close proximity to _start() from where they will be read. This ensures
+         * that position-independent, PC-relative loads can be emitted.
+         */
+        *(.text._start_arguments)
+
+        *(.text._start_rust) /* The Rust entry point */
+        *(.text*)            /* Everything else */
     } :segment_rx
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
@@ -64,7 +73,9 @@ SECTIONS
     /***********************************************************************************************
     * Boot Core Stack
     ***********************************************************************************************/
-     __boot_core_stack_start = .;
-     . += 512K;
-     __boot_core_stack_end_exclusive = .;
+    __boot_core_stack_start = .;         /*   ^             */
+                                         /*   | stack       */
+    . += 512K;                           /*   | growth      */
+                                         /*   | direction   */
+    __boot_core_stack_end_exclusive = .; /*   |             */
 }
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
index 19545c003..7f571e080 100644
--- a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
@@ -191,14 +191,6 @@ fn phys_addr_space_end() -> Address<Physical> {
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// Exclusive end address of the boot core's stack.
-#[inline(always)]
-pub fn phys_boot_core_stack_end() -> Address<Physical> {
-    // The binary is still identity mapped, so we don't need to convert here.
-    let end = virt_boot_core_stack_start().into_usize() + boot_core_stack_size();
-    Address::new(end)
-}
-
 /// Return the inclusive range spanning the .bss section.
 ///
 /// # Safety
diff --git a/15_virtual_mem_part2_mmio_remap/src/lib.rs b/15_virtual_mem_part2_mmio_remap/src/lib.rs
index 30f684af4..3346134ad 100644
--- a/15_virtual_mem_part2_mmio_remap/src/lib.rs
+++ b/15_virtual_mem_part2_mmio_remap/src/lib.rs
@@ -102,11 +102,10 @@
 //!
 //! # Boot flow
 //!
-//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
-//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
+//! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
 //! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
 //!
-//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
 #![allow(clippy::clippy::upper_case_acronyms)]
diff --git a/15_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs b/15_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs
index c3754aa9f..ad7fd2bf5 100644
--- a/15_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs
+++ b/15_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs
@@ -8,7 +8,7 @@
 #![no_main]
 #![no_std]
 
-use libkernel::{bsp, console, exception, print};
+use libkernel::{bsp, console, cpu, exception, print};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
@@ -31,5 +31,5 @@ unsafe fn kernel_init() -> ! {
     print!("{}", console().chars_read());
 
     // The QEMU process running this test will be closed by the I/O test harness.
-    loop {}
+    cpu::wait_forever()
 }
diff --git a/X1_JTAG_boot/jtag_boot_rpi3.img b/X1_JTAG_boot/jtag_boot_rpi3.img
index d45cc1ff0028c6d32ecd176a828fc440da668d97..8eed7dba0e7d56b27a14d14f981f77b599d9b6c3 100755
GIT binary patch
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zkqY~+2M|-EY1wKh6(!2URGc%=Lw?G#C0lO*%+h|R+$OQcr-cpP3^fz7+{zr;yB5hz
zfz|!GMtS8&)Yo34>b}Fz*^eK4x}w7VLSvBLm07Y;U`5vmzw3KrWcR~=hO;EGs~WWt
zM`3lvUq#9pZ7s7-saSetGV4*_{p4by;QPN`57aEVYSf*@(PUvWa{M4D+0Pd%`(0I!
zsCuSn<M{&RbWq(z5-zq@zR4-pA$1oY`TzaXL4i@hfsNcOe$w&0O;IgsDQ8ukKCR3;
zN{lvdMVm^)f2HLm61Lr=U_ZIA+w1?gQfkyTjcQJ|i&R{yJx8@y6C`*IY_v_s{VhZk
XT*inBv8fOrxga?Cb=A5~W(4Qo&#}S1

delta 1469
zcmb7DZ%kWN6u-BxrF}4j2ec1p;kBT)g+*2%<DXj#d_Zs;ONY9+L|{wU!eV0h=7)u5
zG0MoYaC5dX(3r8r%tuDt!i<!}S>mG34;q{p=D$1^KhTo>5%;B0`aG}inoRwoH@WY=
zbI<wRbAG>j?!)kE*!MnZUQuk3%>hFC`n|%6uIsXckgJa6uCzi4%V8~U$4PVsNi2G8
zAWbcas`*2f8fuAE!&|~h>VsTs8*PWhg7fgB_2XxJtt_}y&DQ-lRLxFRO(3k(O3r$T
z_uGWf|6N3y`X-WmZ!_`g&CNvXBlz65lltZ}wnKK>IsbD0Z`8R~&+-VF*oH-<Ite>I
z*v3u|!r_9KX#4zP!BJ|_{7@|oIYWi4Tf8-$i?Ka4%pU0a!v_@Jl@vM%H>6rDDJ3ab
zE#wuwLSKjBBEvCW<Trp<PA`lMi(gJ}7$BhRIEBxOYMpC7cK-uGP1cdLh{ryEV(#ri
z3*;0lHEXr(%GS{BeB2$IbGUo9MsCl|)G&&6>L`hiqd1$F?Wzyc^%mFXdt2F&i}h^K
z7K^^&g)_xR_L2be39)ELEWk3q>yw5Ynch#-Vmx5n8jBwLxhpN&BJpl#NrPx3al=;5
zk$8u$PiB4OLR6e0@!eS)c9$rjm9BK~PFFfi9UCGgeFRUk;3Q-h8^jYkF79GK@k|Dp
z;2k(q;<so!;G>d#HOMrDH>25eRD**r(#SLvd);qUpF=JwzfH}8mKvbWIrJ2lEFgX{
zo!v&g@1u10YKc0$cq-bn?b66s6c(Kds{Xw*>}uc1dQh&Uo1}X_e8Qc?RE9KluKLl(
zggDI0GfEe5T5*!UN!P&c3Y67mOu>veN@G#7(87#f(gbC84X5$13zp?f14%#XwX2O7
zPweFSS!80ATk^~0k##H~7^-4$)3rVS6b3j@(XsO+{w8d>_P7#N>{vO88{Csk=IsZU
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zwCXl}cqiG>#$&Nlvg4mvC#dC0$NxqBz_S$cQ#ai6x$b?`x1gBW4|>cs!R;8gvz(=v
z%k)n0H2^anSsD<`-Pibvv6XV}ABE<w=7E&wX<tKyX}WmgZf@i2$&LVoD#D>=PWr!!
z@GQ(!+{-g0@7mwpOGpS<W!Si&N?H7?05AMnDNBW%Pyx@UK$#MT0VN>CxTk`94#Je;
Pmk7VsRqkDdTZ;cr4O^>0

diff --git a/X1_JTAG_boot/jtag_boot_rpi4.img b/X1_JTAG_boot/jtag_boot_rpi4.img
index 080ff5e6dc2f097df2754fccfcc5f3acd0ef3fbb..cbdd1b808832df622e2be50a4bb24e5437756355 100755
GIT binary patch
delta 1876
zcmZ9MUu;uV9LIm>-WGb-!f4mKb{(*G14_#f<`uR|LT|f~xB-cjDi|NODr#U`p!i16
z+Xal#j-=Ov&fo(bJV=`nS;i6<|ImRiOEd-*eKTXm1X~CZ60;Jw>+jrq`6DN3PVf1B
ze}B&Bch328OKFQT3LQ5B7Wtz%f&Ee7DnkItJiz`Y0Cg#VyVuX(&@{~hV1p+|$pWYS
z;Qyt>_x`GN!gU+SRjn4LFh=?u#<(d#Bm|j6$O@B(F-{cxY0Qxf9bdAyW<@3uc7qgn
z!>2sUgynXKbfb8Nhsgs>EX(P0C>Bu2#2bz~_J&)RNFj7e9c+B$^Vc?r97I2XgUOfC
zFLd0c2e+e-gZXtiq*nCPlMSxa{VJI2Hu{yL5cvQUbQa)pSpv122w67ovVw|K+Bd8O
zSDAMd9Yn5582l^|DtQi)JFRl0M*y{71Xt?{aBW20l_5TT0&TsfX16GJTtxez=#y9+
zWtvZ)H|?`52HKgws9@j<-xMzMLh;F9R~NKo*6EX2ayM%3n3^X8o<q$kr(3G<%fd`o
zW5ya5mhT<g=##R<9#&#qX~2Zc&Y`^t+j*)%p87%C)Se|U6}DUDYCrDSZiT8|J@zg}
z<Oric=A&D$Vee-#xz<S^5T7!GZ6^Si0#L8c{sHP7kFYp6z1WED=ZVUWL$eJov*Qo~
zE?ePAaX>6}e7Fi+!!X}|leZV`Sj%RtML}47Slb4R90}M!9Yi2Io#5(4n4P#D1)-9`
zxz#Oq45MvK^eIv=l4PWrv4nFNjXh|52<aw*d>DjV)RKb;v5bIN(mG6f8~4IA7)+1F
zKo1~9?6j_75X-3PM~GR3c!<=5dl6y=kE5M*Jf=8+6u(D`hmc|oLhM0cH3*RvmYUa+
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zQ{UY9y;<?Md-*H(>F3t1BsKB7_0^^1#KiN<t`hPwU0A+Z3`nXSAm_kD<xV`8qubQs
zQ5vt^M}{WO)V@VHe<S6c%_L6OIXj)xZcJz?+`?qI*IZAG9&<L45<TO5o22P-muGEk
zyIPS*!TwJ1vpe@ey(4jj{)IPx#`wA6(XhG<=Zn*{$F+$}(_^j{4(jPy*J>pbRPlu6
z;;>!~@R>yXUu}dv5V-#w^sP~OoL`3))q?ZMObebIqNc2wgk3Xq_`KwVJv*vlt2~vp
zWD<u&w-mO*lnvJeC?<qIVT$o&I$JkegIs9$j%t+HDgrhqrYHJty-`G8NKIjofLX*N
z@p~}O9A-2vdC*L(T_e{QC8#dap*lB5L^@LUE=Sf;k9)O)o$~WUox28VGmW`VDgkU6
zJ~+36d_gY+Tc{~WQ?VBCTIBR=(Sp|k9sXI+M)D7|=l%!4zt#YdU#n{vfD?-b00dIB
zS!6s0w&LAI_TtLb0ewb*a!@5Clb~H<E0Jkh^n?y@#)I5tKFqD=cf51A|HWOK+uHmu
z#S%$?3v^uckTE(V{@CMfFnq8ieS|#5H}*{*JB}Vbd=&rHnd|lD`qMg_htAb+Z}WN$
zcWkXb8qIGcp^vB2t)zQAcLRB!;dR7RUogKvHNW-kMP3jM)qZo9&24(k*oGD02ygt$
zn6pgBy&l2gG*;*7b#D-lY1JD=Y-nkFXt`vfaGLShEaNY4uGgCDU(lh3!^BJfZrJBM
WVph7!w8iNwzMxPtS4&j&1^)wS$?tUl

delta 1916
zcmcIlZ%kWN6hHU97T$xh($Z2W&bItX{|x0%<xfYHR~QK+BCb?tqHz#E$e3mpKT2%N
zFm5tQZ!Q_zCyB;vZ6eX|g=*B6`9;4tj5G0D(U=r4{vn!BBYmFt`j~Mh`?j0BoZfSO
z=bU?f=iJ*&*Lqj<2K3%`=%u|0fbbb7e_NJin*i{k5F9Ev2+$23EIGmXZH7PdoqPc{
zi(@2N15!aYLb@Ng$Q=4@`61weSf~ZS(htr^BZ07IwrpI`+dK1U6RKk&j|Kes9taF0
zu0g>`Qe=)mG^`j!{Cu;9@e#41)7x6+-$AEs1glPc5ST)zBk1IrHIFOU3jBns2kr#-
zoiO-4iXZyq5%0xh+x-x@h<@9Cpe`aT<WMeRF%BTRxpD|^^N{jcqnX~}qhNju_Iq-?
zm^#Zzg?8n1gzQdm5EgY(00f}NtY8*RV0Og$$RO&KATg8`7O8gxZPQk}-;w1b7c^T2
zrGPd8Z5E8T%R78Io}><Aa78(M%w+fHqkN@LNm_%T9Sw9CY~w%<`%D&pp07|b6^O|r
z#w#8fKlzZ|?;(QE5j+uzA>B$04($$Xp|4&_e<io|cnGAY%A|sz2Rc;-1?A9_`*Jvk
zF^XfsB({@A)xPp%Q^1}UoA_jo2g;SjLbs4Af^*=?SZVG@pg*AgItNR|2JAggsNz=~
z`#hP)s+4(f0k@Fjg;e+dD847d(fd#FJsFPPPl~fQ6qW#4gjg-jl2}ODD@=>nqDxTM
z?O<>7uMih2@_i)8R*hHKE#0RNyPBytTTAoq&yu-vqPFBU{@-gTnXY{!ZNI;ldHIXI
z%<(_iC;D#UTHDh<TTc9IPgHFXa)p_U?bgjsS_zOaVE&y!pyy8Y(aV$UY2#@UTw681
zNVuGx*-VXuW5-Q{rnm(Y>ad?canKSYge{sJB*s=vui9PJbf*oH(;r_7jTqjY*~NMI
zS(bmh{QIM<&ukatK3at?AH>=7<~9;%i{_?Lb!-TZ4WVxq<z<OL*WvSmgd{+6Q=Het
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zNc;)X3biGAAt4MYdPsOr4i)-|uq)yXQ6tZLN?Dy=I*D<dTGl(*H(+1Ee<{o1DY<ka
z`6k&c`k_D$7_G5zSqr;f^E#JpVQ$NV2BpgPu*#eG#;{YC`RG;?_2Q$Gck@YnMH2$H
zQjQ|4QGF6`Q$oE>O?aEo;m-qkdF3zpk^hvOYc7>M(V}7|^|8<#(x*^^RHg)-gySHj
zeksZ}z&SdnN~9Cql;C`^u(g$VSlnv!_HuXtT&?(isY}}r430XVe7wD*!}(M&gsd#F
ztkp)YvhS^5j|lY|w&Vfz%3lF4?3B8OW@gUM;4fa&*J}E^ar?DwulBJHp|0eP%~V&V
zwnrw^b$2=go3#Dvx@s?ZO=##9ZGTbQtK|iHttHg3COul2b%(Jv`5a%uy`)JG%huV%
z{pyl7&$jB^<Rd25_akj+={U5kXjGWAIEs|;OK5tdrhkXg`tw9!#D3Z|p`G-oW_yO6
RwY$-=lxtnHuCr@)_dlJP2HyYx

diff --git a/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.rs b/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.rs
index 549b5927a..c85bb94b8 100644
--- a/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.rs
+++ b/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.rs
@@ -11,31 +11,23 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-use crate::{bsp, cpu};
-use cortex_a::regs::*;
+use crate::runtime_init;
+
+// Assembly counterpart to this file.
+global_asm!(include_str!("boot.s"));
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// The entry of the `kernel` binary.
+/// The Rust entry of the `kernel` binary.
 ///
-/// The function must be named `_start`, because the linker is looking for this exact name.
+/// The function is called from the assembly `_start` function.
 ///
 /// # Safety
 ///
-/// - Linker script must ensure to place this function where it is expected by the target machine.
-/// - We have to hope that the compiler omits any stack pointer usage before the stack pointer is
-///   actually set (`SP.set()`).
+/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
 #[no_mangle]
-pub unsafe fn _start() -> ! {
-    use crate::runtime_init;
-
-    if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
-        SP.set(bsp::memory::boot_core_stack_end() as u64);
-        runtime_init::runtime_init()
-    } else {
-        // If not core0, infinitely wait for events.
-        cpu::wait_forever()
-    }
+pub unsafe fn _start_rust() -> ! {
+    runtime_init::runtime_init()
 }
diff --git a/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s b/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s
new file mode 100644
index 000000000..ad4a26892
--- /dev/null
+++ b/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s
@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//--------------------------------------------------------------------------------------------------
+// Definitions
+//--------------------------------------------------------------------------------------------------
+
+.equ _core_id_mask, 0b11
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+.section .text._start
+
+//------------------------------------------------------------------------------
+// fn _start()
+//------------------------------------------------------------------------------
+_start:
+	// Only proceed on the boot core. Park it otherwise.
+	mrs	x1, MPIDR_EL1
+	and	x1, x1, _core_id_mask
+	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
+	cmp	x1, x2
+	b.ne	1f
+
+	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
+
+	// Set the stack pointer.
+	ldr	x0, =__boot_core_stack_end_exclusive
+	mov	sp, x0
+
+	// Jump to Rust code.
+	b	_start_rust
+
+	// Infinitely wait for events (aka "park the core").
+1:	wfe
+	b	1b
+
+.size	_start, . - _start
+.type	_start, function
+.global	_start
diff --git a/X1_JTAG_boot/src/_arch/aarch64/cpu/smp.rs b/X1_JTAG_boot/src/_arch/aarch64/cpu/smp.rs
deleted file mode 100644
index b9fdd0f73..000000000
--- a/X1_JTAG_boot/src/_arch/aarch64/cpu/smp.rs
+++ /dev/null
@@ -1,29 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Architectural symmetric multiprocessing.
-//!
-//! # Orientation
-//!
-//! Since arch modules are imported into generic modules using the path attribute, the path of this
-//! file is:
-//!
-//! crate::cpu::smp::arch_smp
-
-use cortex_a::regs::*;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return the executing core's id.
-#[inline(always)]
-pub fn core_id<T>() -> T
-where
-    T: From<u8>,
-{
-    const CORE_MASK: u64 = 0b11;
-
-    T::from((MPIDR_EL1.get() & CORE_MASK) as u8)
-}
diff --git a/X1_JTAG_boot/src/bsp/raspberrypi/cpu.rs b/X1_JTAG_boot/src/bsp/raspberrypi/cpu.rs
index 16ab927d7..d09ff9568 100644
--- a/X1_JTAG_boot/src/bsp/raspberrypi/cpu.rs
+++ b/X1_JTAG_boot/src/bsp/raspberrypi/cpu.rs
@@ -9,4 +9,6 @@
 //--------------------------------------------------------------------------------------------------
 
 /// Used by `arch` code to find the early boot core.
-pub const BOOT_CORE_ID: u64 = 0;
+#[no_mangle]
+#[link_section = ".text._start_arguments"]
+pub static BOOT_CORE_ID: u64 = 0;
diff --git a/X1_JTAG_boot/src/bsp/raspberrypi/link.ld b/X1_JTAG_boot/src/bsp/raspberrypi/link.ld
index 87e6a976f..3b73b3c7e 100644
--- a/X1_JTAG_boot/src/bsp/raspberrypi/link.ld
+++ b/X1_JTAG_boot/src/bsp/raspberrypi/link.ld
@@ -17,15 +17,28 @@ PHDRS
 SECTIONS
 {
     . =  __rpi_load_addr;
+                                        /*   ^             */
+                                        /*   | stack       */
+                                        /*   | growth      */
+                                        /*   | direction   */
+   __boot_core_stack_end_exclusive = .; /*   |             */
 
     /***********************************************************************************************
     * Code + RO Data + Global Offset Table
     ***********************************************************************************************/
-    __rx_start = .;
     .text :
     {
         KEEP(*(.text._start))
-        *(.text*)
+
+        /* Special constants (or statics in Rust speak) needed by _start().
+         *
+         * They are placed in close proximity to _start() from where they will be read. This ensures
+         * that position-independent, PC-relative loads can be emitted.
+         */
+        *(.text._start_arguments)
+
+        *(.text._start_rust) /* The Rust entry point */
+        *(.text*)            /* Everything else */
     } :segment_rx
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
diff --git a/X1_JTAG_boot/src/bsp/raspberrypi/memory.rs b/X1_JTAG_boot/src/bsp/raspberrypi/memory.rs
index 56a3306e5..c6d65e36b 100644
--- a/X1_JTAG_boot/src/bsp/raspberrypi/memory.rs
+++ b/X1_JTAG_boot/src/bsp/raspberrypi/memory.rs
@@ -12,8 +12,6 @@ use core::{cell::UnsafeCell, ops::RangeInclusive};
 
 // Symbols from the linker script.
 extern "Rust" {
-    static __rx_start: UnsafeCell<()>;
-
     static __bss_start: UnsafeCell<u64>;
     static __bss_end_inclusive: UnsafeCell<u64>;
 }
@@ -50,30 +48,10 @@ pub(super) mod map {
     }
 }
 
-//--------------------------------------------------------------------------------------------------
-// Private Code
-//--------------------------------------------------------------------------------------------------
-
-/// Start address of the Read+Execute (RX) range.
-///
-/// # Safety
-///
-/// - Value is provided by the linker script and must be trusted as-is.
-#[inline(always)]
-fn rx_start() -> usize {
-    unsafe { __rx_start.get() as usize }
-}
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// Exclusive end address of the boot core's stack.
-#[inline(always)]
-pub fn boot_core_stack_end() -> usize {
-    rx_start()
-}
-
 /// Return the inclusive range spanning the .bss section.
 ///
 /// # Safety
diff --git a/X1_JTAG_boot/src/cpu.rs b/X1_JTAG_boot/src/cpu.rs
index 3834f183c..7a095cb12 100644
--- a/X1_JTAG_boot/src/cpu.rs
+++ b/X1_JTAG_boot/src/cpu.rs
@@ -10,8 +10,6 @@ mod arch_cpu;
 
 mod boot;
 
-pub mod smp;
-
 //--------------------------------------------------------------------------------------------------
 // Architectural Public Reexports
 //--------------------------------------------------------------------------------------------------
diff --git a/X1_JTAG_boot/src/cpu/smp.rs b/X1_JTAG_boot/src/cpu/smp.rs
deleted file mode 100644
index 38230ce1e..000000000
--- a/X1_JTAG_boot/src/cpu/smp.rs
+++ /dev/null
@@ -1,14 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Symmetric multiprocessing.
-
-#[cfg(target_arch = "aarch64")]
-#[path = "../_arch/aarch64/cpu/smp.rs"]
-mod arch_smp;
-
-//--------------------------------------------------------------------------------------------------
-// Architectural Public Reexports
-//--------------------------------------------------------------------------------------------------
-pub use arch_smp::core_id;
diff --git a/X1_JTAG_boot/src/main.rs b/X1_JTAG_boot/src/main.rs
index aeff7a4da..19c864c4d 100644
--- a/X1_JTAG_boot/src/main.rs
+++ b/X1_JTAG_boot/src/main.rs
@@ -100,16 +100,16 @@
 //!
 //! # Boot flow
 //!
-//! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
-//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
+//! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
 //! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
 //!
-//! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
 #![allow(clippy::clippy::upper_case_acronyms)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
+#![feature(global_asm)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
 #![no_main]
diff --git a/rust-toolchain b/rust-toolchain
index 1b5ba1c03..e0e7993d0 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1,4 +1,4 @@
 [toolchain]
-channel = "nightly-2021-03-06"
+channel = "nightly-2021-03-18"
 components = ["llvm-tools-preview"]
 targets = ["aarch64-unknown-none-softfloat"]

From f81eb7428d06fa11b6788231ed0e84eea6fad59b Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sat, 20 Mar 2021 10:47:39 +0100
Subject: [PATCH 043/214] Adapt tutorial numbers

---
 .../.vscode/settings.json                     |   0
 .../Cargo.lock                                |   0
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 .../test-types/Cargo.toml                     |   0
 .../test-types/src/lib.rs                     |   0
 .../tests/00_console_sanity.rb                |   0
 .../tests/00_console_sanity.rs                |   0
 .../tests/01_timer_sanity.rs                  |   0
 .../tests/02_exception_sync_page_fault.rs     |   0
 .../tests/03_exception_irq_sanity.rs          |   0
 .../tests/panic_exit_success/mod.rs           |   0
 .../tests/runner.rb                           |   0
 README.md                                     |  11 +-
 utils/devtool.rb                              |   2 +-
 472 files changed, 493 insertions(+), 491 deletions(-)
 rename {05_safe_globals => 04_safe_globals}/.vscode/settings.json (100%)
 rename {05_safe_globals => 04_safe_globals}/Cargo.lock (100%)
 rename {05_safe_globals => 04_safe_globals}/Cargo.toml (100%)
 rename {05_safe_globals => 04_safe_globals}/Makefile (100%)
 rename {05_safe_globals => 04_safe_globals}/README.md (92%)
 rename {05_safe_globals => 04_safe_globals}/build.rs (100%)
 rename {05_safe_globals => 04_safe_globals}/src/_arch/aarch64/cpu.rs (100%)
 rename {05_safe_globals => 04_safe_globals}/src/_arch/aarch64/cpu/boot.rs (100%)
 rename {05_safe_globals => 04_safe_globals}/src/_arch/aarch64/cpu/boot.s (100%)
 rename {05_safe_globals => 04_safe_globals}/src/bsp.rs (100%)
 rename {05_safe_globals => 04_safe_globals}/src/bsp/raspberrypi.rs (100%)
 rename {05_safe_globals => 04_safe_globals}/src/bsp/raspberrypi/console.rs (100%)
 rename {05_safe_globals => 04_safe_globals}/src/bsp/raspberrypi/cpu.rs (100%)
 rename {05_safe_globals => 04_safe_globals}/src/bsp/raspberrypi/link.ld (100%)
 rename {05_safe_globals => 04_safe_globals}/src/bsp/raspberrypi/memory.rs (100%)
 rename {05_safe_globals => 04_safe_globals}/src/console.rs (100%)
 rename {05_safe_globals => 04_safe_globals}/src/cpu.rs (100%)
 rename {05_safe_globals => 04_safe_globals}/src/cpu/boot.rs (100%)
 rename {05_safe_globals => 04_safe_globals}/src/main.rs (100%)
 rename {05_safe_globals => 04_safe_globals}/src/memory.rs (100%)
 rename {05_safe_globals => 04_safe_globals}/src/panic_wait.rs (100%)
 rename {05_safe_globals => 04_safe_globals}/src/print.rs (100%)
 rename {05_safe_globals => 04_safe_globals}/src/runtime_init.rs (100%)
 rename {05_safe_globals => 04_safe_globals}/src/synchronization.rs (100%)
 rename {06_drivers_gpio_uart => 05_drivers_gpio_uart}/.vscode/settings.json (100%)
 rename {06_drivers_gpio_uart => 05_drivers_gpio_uart}/Cargo.lock (100%)
 rename {06_drivers_gpio_uart => 05_drivers_gpio_uart}/Cargo.toml (100%)
 rename {06_drivers_gpio_uart => 05_drivers_gpio_uart}/Makefile (100%)
 rename {06_drivers_gpio_uart => 05_drivers_gpio_uart}/README.md (93%)
 rename {06_drivers_gpio_uart => 05_drivers_gpio_uart}/build.rs (100%)
 rename {06_drivers_gpio_uart => 05_drivers_gpio_uart}/src/_arch/aarch64/cpu.rs (100%)
 rename {06_drivers_gpio_uart => 05_drivers_gpio_uart}/src/_arch/aarch64/cpu/boot.rs (100%)
 rename {06_drivers_gpio_uart => 05_drivers_gpio_uart}/src/_arch/aarch64/cpu/boot.s (100%)
 rename {06_drivers_gpio_uart => 05_drivers_gpio_uart}/src/bsp.rs (100%)
 rename {06_drivers_gpio_uart => 05_drivers_gpio_uart}/src/bsp/device_driver.rs (100%)
 rename {06_drivers_gpio_uart => 05_drivers_gpio_uart}/src/bsp/device_driver/bcm.rs (100%)
 rename {06_drivers_gpio_uart => 05_drivers_gpio_uart}/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs (100%)
 rename {06_drivers_gpio_uart => 05_drivers_gpio_uart}/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs (100%)
 rename {06_drivers_gpio_uart => 05_drivers_gpio_uart}/src/bsp/device_driver/common.rs (100%)
 rename {06_drivers_gpio_uart => 05_drivers_gpio_uart}/src/bsp/raspberrypi.rs (100%)
 rename {06_drivers_gpio_uart => 05_drivers_gpio_uart}/src/bsp/raspberrypi/console.rs (100%)
 rename {06_drivers_gpio_uart => 05_drivers_gpio_uart}/src/bsp/raspberrypi/cpu.rs (100%)
 rename {06_drivers_gpio_uart => 05_drivers_gpio_uart}/src/bsp/raspberrypi/driver.rs (100%)
 rename {06_drivers_gpio_uart => 05_drivers_gpio_uart}/src/bsp/raspberrypi/link.ld (100%)
 rename {06_drivers_gpio_uart => 05_drivers_gpio_uart}/src/bsp/raspberrypi/memory.rs (100%)
 rename {06_drivers_gpio_uart => 05_drivers_gpio_uart}/src/console.rs (100%)
 rename {06_drivers_gpio_uart => 05_drivers_gpio_uart}/src/cpu.rs (100%)
 rename {06_drivers_gpio_uart => 05_drivers_gpio_uart}/src/cpu/boot.rs (100%)
 rename {06_drivers_gpio_uart => 05_drivers_gpio_uart}/src/driver.rs (100%)
 rename {06_drivers_gpio_uart => 05_drivers_gpio_uart}/src/main.rs (100%)
 rename {06_drivers_gpio_uart => 05_drivers_gpio_uart}/src/memory.rs (100%)
 rename {06_drivers_gpio_uart => 05_drivers_gpio_uart}/src/panic_wait.rs (100%)
 rename {06_drivers_gpio_uart => 05_drivers_gpio_uart}/src/print.rs (100%)
 rename {06_drivers_gpio_uart => 05_drivers_gpio_uart}/src/runtime_init.rs (100%)
 rename {06_drivers_gpio_uart => 05_drivers_gpio_uart}/src/synchronization.rs (100%)
 rename {07_uart_chainloader => 06_uart_chainloader}/.vscode/settings.json (100%)
 rename {07_uart_chainloader => 06_uart_chainloader}/Cargo.lock (100%)
 rename {07_uart_chainloader => 06_uart_chainloader}/Cargo.toml (100%)
 rename {07_uart_chainloader => 06_uart_chainloader}/Makefile (100%)
 rename {07_uart_chainloader => 06_uart_chainloader}/README.md (88%)
 rename {07_uart_chainloader => 06_uart_chainloader}/build.rs (100%)
 rename {07_uart_chainloader => 06_uart_chainloader}/demo_payload_rpi3.img (100%)
 rename {07_uart_chainloader => 06_uart_chainloader}/demo_payload_rpi4.img (100%)
 rename {07_uart_chainloader => 06_uart_chainloader}/src/_arch/aarch64/cpu.rs (100%)
 rename {07_uart_chainloader => 06_uart_chainloader}/src/_arch/aarch64/cpu/boot.rs (100%)
 rename {07_uart_chainloader => 06_uart_chainloader}/src/_arch/aarch64/cpu/boot.s (100%)
 rename {07_uart_chainloader => 06_uart_chainloader}/src/bsp.rs (100%)
 rename {07_uart_chainloader => 06_uart_chainloader}/src/bsp/device_driver.rs (100%)
 rename {07_uart_chainloader => 06_uart_chainloader}/src/bsp/device_driver/bcm.rs (100%)
 rename {07_uart_chainloader => 06_uart_chainloader}/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs (100%)
 rename {07_uart_chainloader => 06_uart_chainloader}/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs (100%)
 rename {07_uart_chainloader => 06_uart_chainloader}/src/bsp/device_driver/common.rs (100%)
 rename {07_uart_chainloader => 06_uart_chainloader}/src/bsp/raspberrypi.rs (100%)
 rename {07_uart_chainloader => 06_uart_chainloader}/src/bsp/raspberrypi/console.rs (100%)
 rename {07_uart_chainloader => 06_uart_chainloader}/src/bsp/raspberrypi/cpu.rs (100%)
 rename {07_uart_chainloader => 06_uart_chainloader}/src/bsp/raspberrypi/driver.rs (100%)
 rename {07_uart_chainloader => 06_uart_chainloader}/src/bsp/raspberrypi/link.ld (100%)
 rename {07_uart_chainloader => 06_uart_chainloader}/src/bsp/raspberrypi/memory.rs (100%)
 rename {07_uart_chainloader => 06_uart_chainloader}/src/console.rs (100%)
 rename {07_uart_chainloader => 06_uart_chainloader}/src/cpu.rs (100%)
 rename {07_uart_chainloader => 06_uart_chainloader}/src/cpu/boot.rs (100%)
 rename {07_uart_chainloader => 06_uart_chainloader}/src/driver.rs (100%)
 rename {07_uart_chainloader => 06_uart_chainloader}/src/main.rs (100%)
 rename {07_uart_chainloader => 06_uart_chainloader}/src/memory.rs (100%)
 rename {07_uart_chainloader => 06_uart_chainloader}/src/panic_wait.rs (100%)
 rename {07_uart_chainloader => 06_uart_chainloader}/src/print.rs (100%)
 rename {07_uart_chainloader => 06_uart_chainloader}/src/runtime_init.rs (100%)
 rename {07_uart_chainloader => 06_uart_chainloader}/src/synchronization.rs (100%)
 create mode 100755 06_uart_chainloader/update.sh
 rename {08_timestamps => 07_timestamps}/.vscode/settings.json (100%)
 rename {08_timestamps => 07_timestamps}/Cargo.lock (100%)
 rename {08_timestamps => 07_timestamps}/Cargo.toml (100%)
 rename {08_timestamps => 07_timestamps}/Makefile (100%)
 rename {08_timestamps => 07_timestamps}/README.md (89%)
 rename {08_timestamps => 07_timestamps}/build.rs (100%)
 rename {08_timestamps => 07_timestamps}/src/_arch/aarch64/cpu.rs (100%)
 rename {08_timestamps => 07_timestamps}/src/_arch/aarch64/cpu/boot.rs (100%)
 rename {08_timestamps => 07_timestamps}/src/_arch/aarch64/cpu/boot.s (100%)
 rename {08_timestamps => 07_timestamps}/src/_arch/aarch64/time.rs (100%)
 rename {08_timestamps => 07_timestamps}/src/bsp.rs (100%)
 rename {08_timestamps => 07_timestamps}/src/bsp/device_driver.rs (100%)
 rename {08_timestamps => 07_timestamps}/src/bsp/device_driver/bcm.rs (100%)
 rename {08_timestamps => 07_timestamps}/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs (100%)
 rename {08_timestamps => 07_timestamps}/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs (100%)
 rename {08_timestamps => 07_timestamps}/src/bsp/device_driver/common.rs (100%)
 rename {08_timestamps => 07_timestamps}/src/bsp/raspberrypi.rs (100%)
 rename {08_timestamps => 07_timestamps}/src/bsp/raspberrypi/console.rs (100%)
 rename {08_timestamps => 07_timestamps}/src/bsp/raspberrypi/cpu.rs (100%)
 rename {08_timestamps => 07_timestamps}/src/bsp/raspberrypi/driver.rs (100%)
 rename {08_timestamps => 07_timestamps}/src/bsp/raspberrypi/link.ld (100%)
 rename {08_timestamps => 07_timestamps}/src/bsp/raspberrypi/memory.rs (100%)
 rename {08_timestamps => 07_timestamps}/src/console.rs (100%)
 rename {08_timestamps => 07_timestamps}/src/cpu.rs (100%)
 rename {08_timestamps => 07_timestamps}/src/cpu/boot.rs (100%)
 rename {08_timestamps => 07_timestamps}/src/driver.rs (100%)
 rename {08_timestamps => 07_timestamps}/src/main.rs (100%)
 rename {08_timestamps => 07_timestamps}/src/memory.rs (100%)
 rename {08_timestamps => 07_timestamps}/src/panic_wait.rs (100%)
 rename {08_timestamps => 07_timestamps}/src/print.rs (100%)
 rename {08_timestamps => 07_timestamps}/src/runtime_init.rs (100%)
 rename {08_timestamps => 07_timestamps}/src/synchronization.rs (100%)
 rename {08_timestamps => 07_timestamps}/src/time.rs (100%)
 delete mode 100755 07_uart_chainloader/update.sh
 rename {09_hw_debug_JTAG => 08_hw_debug_JTAG}/.vscode/settings.json (100%)
 rename {09_hw_debug_JTAG => 08_hw_debug_JTAG}/Cargo.lock (100%)
 rename {09_hw_debug_JTAG => 08_hw_debug_JTAG}/Cargo.toml (100%)
 rename {09_hw_debug_JTAG => 08_hw_debug_JTAG}/Makefile (100%)
 rename {09_hw_debug_JTAG => 08_hw_debug_JTAG}/README.md (98%)
 rename {09_hw_debug_JTAG => 08_hw_debug_JTAG}/build.rs (100%)
 rename {09_hw_debug_JTAG => 08_hw_debug_JTAG}/src/_arch/aarch64/cpu.rs (100%)
 rename {09_hw_debug_JTAG => 08_hw_debug_JTAG}/src/_arch/aarch64/cpu/boot.rs (100%)
 rename {09_hw_debug_JTAG => 08_hw_debug_JTAG}/src/_arch/aarch64/cpu/boot.s (100%)
 rename {09_hw_debug_JTAG => 08_hw_debug_JTAG}/src/_arch/aarch64/time.rs (100%)
 rename {09_hw_debug_JTAG => 08_hw_debug_JTAG}/src/bsp.rs (100%)
 rename {09_hw_debug_JTAG => 08_hw_debug_JTAG}/src/bsp/device_driver.rs (100%)
 rename {09_hw_debug_JTAG => 08_hw_debug_JTAG}/src/bsp/device_driver/bcm.rs (100%)
 rename {09_hw_debug_JTAG => 08_hw_debug_JTAG}/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs (100%)
 rename {09_hw_debug_JTAG => 08_hw_debug_JTAG}/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs (100%)
 rename {09_hw_debug_JTAG => 08_hw_debug_JTAG}/src/bsp/device_driver/common.rs (100%)
 rename {09_hw_debug_JTAG => 08_hw_debug_JTAG}/src/bsp/raspberrypi.rs (100%)
 rename {09_hw_debug_JTAG => 08_hw_debug_JTAG}/src/bsp/raspberrypi/console.rs (100%)
 rename {09_hw_debug_JTAG => 08_hw_debug_JTAG}/src/bsp/raspberrypi/cpu.rs (100%)
 rename {09_hw_debug_JTAG => 08_hw_debug_JTAG}/src/bsp/raspberrypi/driver.rs (100%)
 rename {09_hw_debug_JTAG => 08_hw_debug_JTAG}/src/bsp/raspberrypi/link.ld (100%)
 rename {09_hw_debug_JTAG => 08_hw_debug_JTAG}/src/bsp/raspberrypi/memory.rs (100%)
 rename {09_hw_debug_JTAG => 08_hw_debug_JTAG}/src/console.rs (100%)
 rename {09_hw_debug_JTAG => 08_hw_debug_JTAG}/src/cpu.rs (100%)
 rename {09_hw_debug_JTAG => 08_hw_debug_JTAG}/src/cpu/boot.rs (100%)
 rename {09_hw_debug_JTAG => 08_hw_debug_JTAG}/src/driver.rs (100%)
 rename {09_hw_debug_JTAG => 08_hw_debug_JTAG}/src/main.rs (100%)
 rename {09_hw_debug_JTAG => 08_hw_debug_JTAG}/src/memory.rs (100%)
 rename {09_hw_debug_JTAG => 08_hw_debug_JTAG}/src/panic_wait.rs (100%)
 rename {09_hw_debug_JTAG => 08_hw_debug_JTAG}/src/print.rs (100%)
 rename {09_hw_debug_JTAG => 08_hw_debug_JTAG}/src/runtime_init.rs (100%)
 rename {09_hw_debug_JTAG => 08_hw_debug_JTAG}/src/synchronization.rs (100%)
 rename {09_hw_debug_JTAG => 08_hw_debug_JTAG}/src/time.rs (100%)
 rename {10_privilege_level => 09_privilege_level}/.vscode/settings.json (100%)
 rename {10_privilege_level => 09_privilege_level}/Cargo.lock (100%)
 rename {10_privilege_level => 09_privilege_level}/Cargo.toml (100%)
 rename {10_privilege_level => 09_privilege_level}/Makefile (100%)
 rename {10_privilege_level => 09_privilege_level}/README.md (93%)
 rename {10_privilege_level => 09_privilege_level}/build.rs (100%)
 rename {10_privilege_level => 09_privilege_level}/src/_arch/aarch64/cpu.rs (100%)
 rename {10_privilege_level => 09_privilege_level}/src/_arch/aarch64/cpu/boot.rs (100%)
 rename {10_privilege_level => 09_privilege_level}/src/_arch/aarch64/cpu/boot.s (100%)
 rename {10_privilege_level => 09_privilege_level}/src/_arch/aarch64/exception.rs (100%)
 rename {10_privilege_level => 09_privilege_level}/src/_arch/aarch64/exception/asynchronous.rs (100%)
 rename {10_privilege_level => 09_privilege_level}/src/_arch/aarch64/time.rs (100%)
 rename {10_privilege_level => 09_privilege_level}/src/bsp.rs (100%)
 rename {10_privilege_level => 09_privilege_level}/src/bsp/device_driver.rs (100%)
 rename {10_privilege_level => 09_privilege_level}/src/bsp/device_driver/bcm.rs (100%)
 rename {10_privilege_level => 09_privilege_level}/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs (100%)
 rename {10_privilege_level => 09_privilege_level}/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs (100%)
 rename {10_privilege_level => 09_privilege_level}/src/bsp/device_driver/common.rs (100%)
 rename {10_privilege_level => 09_privilege_level}/src/bsp/raspberrypi.rs (100%)
 rename {10_privilege_level => 09_privilege_level}/src/bsp/raspberrypi/console.rs (100%)
 rename {10_privilege_level => 09_privilege_level}/src/bsp/raspberrypi/cpu.rs (100%)
 rename {10_privilege_level => 09_privilege_level}/src/bsp/raspberrypi/driver.rs (100%)
 rename {10_privilege_level => 09_privilege_level}/src/bsp/raspberrypi/link.ld (100%)
 rename {10_privilege_level => 09_privilege_level}/src/bsp/raspberrypi/memory.rs (100%)
 rename {10_privilege_level => 09_privilege_level}/src/console.rs (100%)
 rename {10_privilege_level => 09_privilege_level}/src/cpu.rs (100%)
 rename {10_privilege_level => 09_privilege_level}/src/cpu/boot.rs (100%)
 rename {10_privilege_level => 09_privilege_level}/src/driver.rs (100%)
 rename {10_privilege_level => 09_privilege_level}/src/exception.rs (100%)
 rename {10_privilege_level => 09_privilege_level}/src/exception/asynchronous.rs (100%)
 rename {10_privilege_level => 09_privilege_level}/src/main.rs (100%)
 rename {10_privilege_level => 09_privilege_level}/src/memory.rs (100%)
 rename {10_privilege_level => 09_privilege_level}/src/panic_wait.rs (100%)
 rename {10_privilege_level => 09_privilege_level}/src/print.rs (100%)
 rename {10_privilege_level => 09_privilege_level}/src/runtime_init.rs (100%)
 rename {10_privilege_level => 09_privilege_level}/src/synchronization.rs (100%)
 rename {10_privilege_level => 09_privilege_level}/src/time.rs (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/.vscode/settings.json (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/Cargo.lock (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/Cargo.toml (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/Makefile (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/README.md (96%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/build.rs (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/src/_arch/aarch64/cpu.rs (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/src/_arch/aarch64/cpu/boot.rs (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/src/_arch/aarch64/cpu/boot.s (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/src/_arch/aarch64/exception.rs (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/src/_arch/aarch64/exception/asynchronous.rs (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/src/_arch/aarch64/memory/mmu.rs (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/src/_arch/aarch64/memory/mmu/translation_table.rs (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/src/_arch/aarch64/time.rs (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/src/bsp.rs (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/src/bsp/device_driver.rs (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/src/bsp/device_driver/bcm.rs (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/src/bsp/device_driver/common.rs (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/src/bsp/raspberrypi.rs (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/src/bsp/raspberrypi/console.rs (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/src/bsp/raspberrypi/cpu.rs (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/src/bsp/raspberrypi/driver.rs (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/src/bsp/raspberrypi/link.ld (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/src/bsp/raspberrypi/memory.rs (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/src/bsp/raspberrypi/memory/mmu.rs (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/src/console.rs (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/src/cpu.rs (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/src/cpu/boot.rs (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/src/driver.rs (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/src/exception.rs (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/src/exception/asynchronous.rs (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/src/main.rs (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/src/memory.rs (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/src/memory/mmu.rs (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/src/memory/mmu/translation_table.rs (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/src/panic_wait.rs (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/src/print.rs (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/src/runtime_init.rs (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/src/synchronization.rs (100%)
 rename {11_virtual_mem_part1_identity_mapping => 10_virtual_mem_part1_identity_mapping}/src/time.rs (100%)
 rename {12_exceptions_part1_groundwork => 11_exceptions_part1_groundwork}/.vscode/settings.json (100%)
 rename {12_exceptions_part1_groundwork => 11_exceptions_part1_groundwork}/Cargo.lock (100%)
 rename {12_exceptions_part1_groundwork => 11_exceptions_part1_groundwork}/Cargo.toml (100%)
 rename {12_exceptions_part1_groundwork => 11_exceptions_part1_groundwork}/Makefile (100%)
 rename {12_exceptions_part1_groundwork => 11_exceptions_part1_groundwork}/README.md (96%)
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 rename {15_virtual_mem_part2_mmio_remap => 14_virtual_mem_part2_mmio_remap}/src/console.rs (100%)
 rename {15_virtual_mem_part2_mmio_remap => 14_virtual_mem_part2_mmio_remap}/src/cpu.rs (100%)
 rename {15_virtual_mem_part2_mmio_remap => 14_virtual_mem_part2_mmio_remap}/src/cpu/boot.rs (100%)
 rename {15_virtual_mem_part2_mmio_remap => 14_virtual_mem_part2_mmio_remap}/src/cpu/smp.rs (100%)
 rename {15_virtual_mem_part2_mmio_remap => 14_virtual_mem_part2_mmio_remap}/src/driver.rs (100%)
 rename {15_virtual_mem_part2_mmio_remap => 14_virtual_mem_part2_mmio_remap}/src/exception.rs (100%)
 rename {15_virtual_mem_part2_mmio_remap => 14_virtual_mem_part2_mmio_remap}/src/exception/asynchronous.rs (100%)
 rename {15_virtual_mem_part2_mmio_remap => 14_virtual_mem_part2_mmio_remap}/src/lib.rs (100%)
 rename {15_virtual_mem_part2_mmio_remap => 14_virtual_mem_part2_mmio_remap}/src/main.rs (100%)
 rename {15_virtual_mem_part2_mmio_remap => 14_virtual_mem_part2_mmio_remap}/src/memory.rs (100%)
 rename {15_virtual_mem_part2_mmio_remap => 14_virtual_mem_part2_mmio_remap}/src/memory/mmu.rs (100%)
 rename {15_virtual_mem_part2_mmio_remap => 14_virtual_mem_part2_mmio_remap}/src/memory/mmu/mapping_record.rs (100%)
 rename {15_virtual_mem_part2_mmio_remap => 14_virtual_mem_part2_mmio_remap}/src/memory/mmu/translation_table.rs (100%)
 rename {15_virtual_mem_part2_mmio_remap => 14_virtual_mem_part2_mmio_remap}/src/memory/mmu/types.rs (100%)
 rename {15_virtual_mem_part2_mmio_remap => 14_virtual_mem_part2_mmio_remap}/src/panic_wait.rs (100%)
 rename {15_virtual_mem_part2_mmio_remap => 14_virtual_mem_part2_mmio_remap}/src/print.rs (100%)
 rename {15_virtual_mem_part2_mmio_remap => 14_virtual_mem_part2_mmio_remap}/src/runtime_init.rs (100%)
 rename {15_virtual_mem_part2_mmio_remap => 14_virtual_mem_part2_mmio_remap}/src/state.rs (100%)
 rename {15_virtual_mem_part2_mmio_remap => 14_virtual_mem_part2_mmio_remap}/src/synchronization.rs (100%)
 rename {15_virtual_mem_part2_mmio_remap => 14_virtual_mem_part2_mmio_remap}/src/time.rs (100%)
 rename {15_virtual_mem_part2_mmio_remap => 14_virtual_mem_part2_mmio_remap}/test-macros/Cargo.toml (100%)
 rename {15_virtual_mem_part2_mmio_remap => 14_virtual_mem_part2_mmio_remap}/test-macros/src/lib.rs (100%)
 rename {15_virtual_mem_part2_mmio_remap => 14_virtual_mem_part2_mmio_remap}/test-types/Cargo.toml (100%)
 rename {15_virtual_mem_part2_mmio_remap => 14_virtual_mem_part2_mmio_remap}/test-types/src/lib.rs (100%)
 rename {15_virtual_mem_part2_mmio_remap => 14_virtual_mem_part2_mmio_remap}/tests/00_console_sanity.rb (100%)
 rename {15_virtual_mem_part2_mmio_remap => 14_virtual_mem_part2_mmio_remap}/tests/00_console_sanity.rs (100%)
 rename {15_virtual_mem_part2_mmio_remap => 14_virtual_mem_part2_mmio_remap}/tests/01_timer_sanity.rs (100%)
 rename {15_virtual_mem_part2_mmio_remap => 14_virtual_mem_part2_mmio_remap}/tests/02_exception_sync_page_fault.rs (100%)
 rename {15_virtual_mem_part2_mmio_remap => 14_virtual_mem_part2_mmio_remap}/tests/03_exception_irq_sanity.rs (100%)
 rename {15_virtual_mem_part2_mmio_remap => 14_virtual_mem_part2_mmio_remap}/tests/panic_exit_success/mod.rs (100%)
 rename {15_virtual_mem_part2_mmio_remap => 14_virtual_mem_part2_mmio_remap}/tests/runner.rb (100%)

diff --git a/05_safe_globals/.vscode/settings.json b/04_safe_globals/.vscode/settings.json
similarity index 100%
rename from 05_safe_globals/.vscode/settings.json
rename to 04_safe_globals/.vscode/settings.json
diff --git a/05_safe_globals/Cargo.lock b/04_safe_globals/Cargo.lock
similarity index 100%
rename from 05_safe_globals/Cargo.lock
rename to 04_safe_globals/Cargo.lock
diff --git a/05_safe_globals/Cargo.toml b/04_safe_globals/Cargo.toml
similarity index 100%
rename from 05_safe_globals/Cargo.toml
rename to 04_safe_globals/Cargo.toml
diff --git a/05_safe_globals/Makefile b/04_safe_globals/Makefile
similarity index 100%
rename from 05_safe_globals/Makefile
rename to 04_safe_globals/Makefile
diff --git a/05_safe_globals/README.md b/04_safe_globals/README.md
similarity index 92%
rename from 05_safe_globals/README.md
rename to 04_safe_globals/README.md
index ea61489e2..13b9e298a 100644
--- a/05_safe_globals/README.md
+++ b/04_safe_globals/README.md
@@ -1,4 +1,4 @@
-# Tutorial 05 - Safe Globals
+# Tutorial 04 - Safe Globals
 
 ## tl;dr
 
@@ -54,9 +54,9 @@ $ make qemu
 ## Diff to previous
 ```diff
 
-diff -uNr 04_zero_overhead_abstraction/src/bsp/raspberrypi/console.rs 05_safe_globals/src/bsp/raspberrypi/console.rs
---- 04_zero_overhead_abstraction/src/bsp/raspberrypi/console.rs
-+++ 05_safe_globals/src/bsp/raspberrypi/console.rs
+diff -uNr 03_hacky_hello_world/src/bsp/raspberrypi/console.rs 04_safe_globals/src/bsp/raspberrypi/console.rs
+--- 03_hacky_hello_world/src/bsp/raspberrypi/console.rs
++++ 04_safe_globals/src/bsp/raspberrypi/console.rs
 @@ -4,7 +4,7 @@
 
  //! BSP console facilities.
@@ -176,9 +176,9 @@ diff -uNr 04_zero_overhead_abstraction/src/bsp/raspberrypi/console.rs 05_safe_gl
 +    }
  }
 
-diff -uNr 04_zero_overhead_abstraction/src/console.rs 05_safe_globals/src/console.rs
---- 04_zero_overhead_abstraction/src/console.rs
-+++ 05_safe_globals/src/console.rs
+diff -uNr 03_hacky_hello_world/src/console.rs 04_safe_globals/src/console.rs
+--- 03_hacky_hello_world/src/console.rs
++++ 04_safe_globals/src/console.rs
 @@ -10,10 +10,22 @@
 
  /// Console interfaces.
@@ -208,12 +208,12 @@ diff -uNr 04_zero_overhead_abstraction/src/console.rs 05_safe_globals/src/consol
 +    pub trait All = Write + Statistics;
  }
 
-diff -uNr 04_zero_overhead_abstraction/src/main.rs 05_safe_globals/src/main.rs
---- 04_zero_overhead_abstraction/src/main.rs
-+++ 05_safe_globals/src/main.rs
+diff -uNr 03_hacky_hello_world/src/main.rs 04_safe_globals/src/main.rs
+--- 03_hacky_hello_world/src/main.rs
++++ 04_safe_globals/src/main.rs
 @@ -109,6 +109,7 @@
-
  #![feature(format_args_nl)]
+ #![feature(global_asm)]
  #![feature(panic_info_message)]
 +#![feature(trait_alias)]
  #![no_main]
@@ -227,27 +227,28 @@ diff -uNr 04_zero_overhead_abstraction/src/main.rs 05_safe_globals/src/main.rs
 
  /// Early init code.
  ///
-@@ -126,8 +128,15 @@
+@@ -126,7 +128,15 @@
  ///
  /// - Only a single core must be active and running this function.
  unsafe fn kernel_init() -> ! {
+-    println!("[0] Hello from Rust!");
 +    use console::interface::Statistics;
-+
-     println!("[0] Hello from pure Rust!");
 
--    println!("[1] Stopping here.");
+-    panic!("Stopping here.")
++    println!("[0] Hello from pure Rust!");
++
 +    println!(
 +        "[1] Chars written: {}",
 +        bsp::console::console().chars_written()
 +    );
 +
 +    println!("[2] Stopping here.");
-     cpu::wait_forever()
++    cpu::wait_forever()
  }
 
-diff -uNr 04_zero_overhead_abstraction/src/synchronization.rs 05_safe_globals/src/synchronization.rs
---- 04_zero_overhead_abstraction/src/synchronization.rs
-+++ 05_safe_globals/src/synchronization.rs
+diff -uNr 03_hacky_hello_world/src/synchronization.rs 04_safe_globals/src/synchronization.rs
+--- 03_hacky_hello_world/src/synchronization.rs
++++ 04_safe_globals/src/synchronization.rs
 @@ -0,0 +1,77 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
diff --git a/05_safe_globals/build.rs b/04_safe_globals/build.rs
similarity index 100%
rename from 05_safe_globals/build.rs
rename to 04_safe_globals/build.rs
diff --git a/05_safe_globals/src/_arch/aarch64/cpu.rs b/04_safe_globals/src/_arch/aarch64/cpu.rs
similarity index 100%
rename from 05_safe_globals/src/_arch/aarch64/cpu.rs
rename to 04_safe_globals/src/_arch/aarch64/cpu.rs
diff --git a/05_safe_globals/src/_arch/aarch64/cpu/boot.rs b/04_safe_globals/src/_arch/aarch64/cpu/boot.rs
similarity index 100%
rename from 05_safe_globals/src/_arch/aarch64/cpu/boot.rs
rename to 04_safe_globals/src/_arch/aarch64/cpu/boot.rs
diff --git a/05_safe_globals/src/_arch/aarch64/cpu/boot.s b/04_safe_globals/src/_arch/aarch64/cpu/boot.s
similarity index 100%
rename from 05_safe_globals/src/_arch/aarch64/cpu/boot.s
rename to 04_safe_globals/src/_arch/aarch64/cpu/boot.s
diff --git a/05_safe_globals/src/bsp.rs b/04_safe_globals/src/bsp.rs
similarity index 100%
rename from 05_safe_globals/src/bsp.rs
rename to 04_safe_globals/src/bsp.rs
diff --git a/05_safe_globals/src/bsp/raspberrypi.rs b/04_safe_globals/src/bsp/raspberrypi.rs
similarity index 100%
rename from 05_safe_globals/src/bsp/raspberrypi.rs
rename to 04_safe_globals/src/bsp/raspberrypi.rs
diff --git a/05_safe_globals/src/bsp/raspberrypi/console.rs b/04_safe_globals/src/bsp/raspberrypi/console.rs
similarity index 100%
rename from 05_safe_globals/src/bsp/raspberrypi/console.rs
rename to 04_safe_globals/src/bsp/raspberrypi/console.rs
diff --git a/05_safe_globals/src/bsp/raspberrypi/cpu.rs b/04_safe_globals/src/bsp/raspberrypi/cpu.rs
similarity index 100%
rename from 05_safe_globals/src/bsp/raspberrypi/cpu.rs
rename to 04_safe_globals/src/bsp/raspberrypi/cpu.rs
diff --git a/05_safe_globals/src/bsp/raspberrypi/link.ld b/04_safe_globals/src/bsp/raspberrypi/link.ld
similarity index 100%
rename from 05_safe_globals/src/bsp/raspberrypi/link.ld
rename to 04_safe_globals/src/bsp/raspberrypi/link.ld
diff --git a/05_safe_globals/src/bsp/raspberrypi/memory.rs b/04_safe_globals/src/bsp/raspberrypi/memory.rs
similarity index 100%
rename from 05_safe_globals/src/bsp/raspberrypi/memory.rs
rename to 04_safe_globals/src/bsp/raspberrypi/memory.rs
diff --git a/05_safe_globals/src/console.rs b/04_safe_globals/src/console.rs
similarity index 100%
rename from 05_safe_globals/src/console.rs
rename to 04_safe_globals/src/console.rs
diff --git a/05_safe_globals/src/cpu.rs b/04_safe_globals/src/cpu.rs
similarity index 100%
rename from 05_safe_globals/src/cpu.rs
rename to 04_safe_globals/src/cpu.rs
diff --git a/05_safe_globals/src/cpu/boot.rs b/04_safe_globals/src/cpu/boot.rs
similarity index 100%
rename from 05_safe_globals/src/cpu/boot.rs
rename to 04_safe_globals/src/cpu/boot.rs
diff --git a/05_safe_globals/src/main.rs b/04_safe_globals/src/main.rs
similarity index 100%
rename from 05_safe_globals/src/main.rs
rename to 04_safe_globals/src/main.rs
diff --git a/05_safe_globals/src/memory.rs b/04_safe_globals/src/memory.rs
similarity index 100%
rename from 05_safe_globals/src/memory.rs
rename to 04_safe_globals/src/memory.rs
diff --git a/05_safe_globals/src/panic_wait.rs b/04_safe_globals/src/panic_wait.rs
similarity index 100%
rename from 05_safe_globals/src/panic_wait.rs
rename to 04_safe_globals/src/panic_wait.rs
diff --git a/05_safe_globals/src/print.rs b/04_safe_globals/src/print.rs
similarity index 100%
rename from 05_safe_globals/src/print.rs
rename to 04_safe_globals/src/print.rs
diff --git a/05_safe_globals/src/runtime_init.rs b/04_safe_globals/src/runtime_init.rs
similarity index 100%
rename from 05_safe_globals/src/runtime_init.rs
rename to 04_safe_globals/src/runtime_init.rs
diff --git a/05_safe_globals/src/synchronization.rs b/04_safe_globals/src/synchronization.rs
similarity index 100%
rename from 05_safe_globals/src/synchronization.rs
rename to 04_safe_globals/src/synchronization.rs
diff --git a/06_drivers_gpio_uart/.vscode/settings.json b/05_drivers_gpio_uart/.vscode/settings.json
similarity index 100%
rename from 06_drivers_gpio_uart/.vscode/settings.json
rename to 05_drivers_gpio_uart/.vscode/settings.json
diff --git a/06_drivers_gpio_uart/Cargo.lock b/05_drivers_gpio_uart/Cargo.lock
similarity index 100%
rename from 06_drivers_gpio_uart/Cargo.lock
rename to 05_drivers_gpio_uart/Cargo.lock
diff --git a/06_drivers_gpio_uart/Cargo.toml b/05_drivers_gpio_uart/Cargo.toml
similarity index 100%
rename from 06_drivers_gpio_uart/Cargo.toml
rename to 05_drivers_gpio_uart/Cargo.toml
diff --git a/06_drivers_gpio_uart/Makefile b/05_drivers_gpio_uart/Makefile
similarity index 100%
rename from 06_drivers_gpio_uart/Makefile
rename to 05_drivers_gpio_uart/Makefile
diff --git a/06_drivers_gpio_uart/README.md b/05_drivers_gpio_uart/README.md
similarity index 93%
rename from 06_drivers_gpio_uart/README.md
rename to 05_drivers_gpio_uart/README.md
index bd7c02089..4ecdd41ad 100644
--- a/06_drivers_gpio_uart/README.md
+++ b/05_drivers_gpio_uart/README.md
@@ -1,4 +1,4 @@
-# Tutorial 06 - Drivers: GPIO and UART
+# Tutorial 05 - Drivers: GPIO and UART
 
 ## tl;dr
 
@@ -108,9 +108,9 @@ Miniterm 1.0
 ## Diff to previous
 ```diff
 
-diff -uNr 05_safe_globals/Cargo.toml 06_drivers_gpio_uart/Cargo.toml
---- 05_safe_globals/Cargo.toml
-+++ 06_drivers_gpio_uart/Cargo.toml
+diff -uNr 04_safe_globals/Cargo.toml 05_drivers_gpio_uart/Cargo.toml
+--- 04_safe_globals/Cargo.toml
++++ 05_drivers_gpio_uart/Cargo.toml
 @@ -9,8 +9,8 @@
 
  [features]
@@ -133,9 +133,9 @@ diff -uNr 05_safe_globals/Cargo.toml 06_drivers_gpio_uart/Cargo.toml
  [target.'cfg(target_arch = "aarch64")'.dependencies]
  cortex-a = { version = "5.x.x" }
 
-diff -uNr 05_safe_globals/Makefile 06_drivers_gpio_uart/Makefile
---- 05_safe_globals/Makefile
-+++ 06_drivers_gpio_uart/Makefile
+diff -uNr 04_safe_globals/Makefile 05_drivers_gpio_uart/Makefile
+--- 04_safe_globals/Makefile
++++ 05_drivers_gpio_uart/Makefile
 @@ -7,6 +7,12 @@
  # Default to the RPi3
  BSP ?= rpi3
@@ -186,9 +186,9 @@ diff -uNr 05_safe_globals/Makefile 06_drivers_gpio_uart/Makefile
  	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
 
-diff -uNr 05_safe_globals/src/_arch/aarch64/cpu.rs 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
---- 05_safe_globals/src/_arch/aarch64/cpu.rs
-+++ 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
+diff -uNr 04_safe_globals/src/_arch/aarch64/cpu.rs 05_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
+--- 04_safe_globals/src/_arch/aarch64/cpu.rs
++++ 05_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
 @@ -17,6 +17,17 @@
  // Public Code
  //--------------------------------------------------------------------------------------------------
@@ -208,9 +208,9 @@ diff -uNr 05_safe_globals/src/_arch/aarch64/cpu.rs 06_drivers_gpio_uart/src/_arc
  #[inline(always)]
  pub fn wait_forever() -> ! {
 
-diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
---- 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
-+++ 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+diff -uNr 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+--- 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
++++ 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 @@ -0,0 +1,221 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -434,9 +434,9 @@ diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 06_drivers_g
 +    }
 +}
 
-diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
---- 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
-+++ 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+diff -uNr 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+--- 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
++++ 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 @@ -0,0 +1,403 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -842,9 +842,9 @@ diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 06_dri
 +    }
 +}
 
-diff -uNr 05_safe_globals/src/bsp/device_driver/bcm.rs 06_drivers_gpio_uart/src/bsp/device_driver/bcm.rs
---- 05_safe_globals/src/bsp/device_driver/bcm.rs
-+++ 06_drivers_gpio_uart/src/bsp/device_driver/bcm.rs
+diff -uNr 04_safe_globals/src/bsp/device_driver/bcm.rs 05_drivers_gpio_uart/src/bsp/device_driver/bcm.rs
+--- 04_safe_globals/src/bsp/device_driver/bcm.rs
++++ 05_drivers_gpio_uart/src/bsp/device_driver/bcm.rs
 @@ -0,0 +1,11 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -858,9 +858,9 @@ diff -uNr 05_safe_globals/src/bsp/device_driver/bcm.rs 06_drivers_gpio_uart/src/
 +pub use bcm2xxx_gpio::*;
 +pub use bcm2xxx_pl011_uart::*;
 
-diff -uNr 05_safe_globals/src/bsp/device_driver/common.rs 06_drivers_gpio_uart/src/bsp/device_driver/common.rs
---- 05_safe_globals/src/bsp/device_driver/common.rs
-+++ 06_drivers_gpio_uart/src/bsp/device_driver/common.rs
+diff -uNr 04_safe_globals/src/bsp/device_driver/common.rs 05_drivers_gpio_uart/src/bsp/device_driver/common.rs
+--- 04_safe_globals/src/bsp/device_driver/common.rs
++++ 05_drivers_gpio_uart/src/bsp/device_driver/common.rs
 @@ -0,0 +1,38 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -901,9 +901,9 @@ diff -uNr 05_safe_globals/src/bsp/device_driver/common.rs 06_drivers_gpio_uart/s
 +    }
 +}
 
-diff -uNr 05_safe_globals/src/bsp/device_driver.rs 06_drivers_gpio_uart/src/bsp/device_driver.rs
---- 05_safe_globals/src/bsp/device_driver.rs
-+++ 06_drivers_gpio_uart/src/bsp/device_driver.rs
+diff -uNr 04_safe_globals/src/bsp/device_driver.rs 05_drivers_gpio_uart/src/bsp/device_driver.rs
+--- 04_safe_globals/src/bsp/device_driver.rs
++++ 05_drivers_gpio_uart/src/bsp/device_driver.rs
 @@ -0,0 +1,12 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -918,9 +918,9 @@ diff -uNr 05_safe_globals/src/bsp/device_driver.rs 06_drivers_gpio_uart/src/bsp/
 +#[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
 +pub use bcm::*;
 
-diff -uNr 05_safe_globals/src/bsp/raspberrypi/console.rs 06_drivers_gpio_uart/src/bsp/raspberrypi/console.rs
---- 05_safe_globals/src/bsp/raspberrypi/console.rs
-+++ 06_drivers_gpio_uart/src/bsp/raspberrypi/console.rs
+diff -uNr 04_safe_globals/src/bsp/raspberrypi/console.rs 05_drivers_gpio_uart/src/bsp/raspberrypi/console.rs
+--- 04_safe_globals/src/bsp/raspberrypi/console.rs
++++ 05_drivers_gpio_uart/src/bsp/raspberrypi/console.rs
 @@ -4,113 +4,34 @@
 
  //! BSP console facilities.
@@ -1054,9 +1054,9 @@ diff -uNr 05_safe_globals/src/bsp/raspberrypi/console.rs 06_drivers_gpio_uart/sr
 +    &super::PL011_UART
  }
 
-diff -uNr 05_safe_globals/src/bsp/raspberrypi/driver.rs 06_drivers_gpio_uart/src/bsp/raspberrypi/driver.rs
---- 05_safe_globals/src/bsp/raspberrypi/driver.rs
-+++ 06_drivers_gpio_uart/src/bsp/raspberrypi/driver.rs
+diff -uNr 04_safe_globals/src/bsp/raspberrypi/driver.rs 05_drivers_gpio_uart/src/bsp/raspberrypi/driver.rs
+--- 04_safe_globals/src/bsp/raspberrypi/driver.rs
++++ 05_drivers_gpio_uart/src/bsp/raspberrypi/driver.rs
 @@ -0,0 +1,49 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -1108,9 +1108,9 @@ diff -uNr 05_safe_globals/src/bsp/raspberrypi/driver.rs 06_drivers_gpio_uart/src
 +    }
 +}
 
-diff -uNr 05_safe_globals/src/bsp/raspberrypi/memory.rs 06_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
---- 05_safe_globals/src/bsp/raspberrypi/memory.rs
-+++ 06_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
+diff -uNr 04_safe_globals/src/bsp/raspberrypi/memory.rs 05_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
+--- 04_safe_globals/src/bsp/raspberrypi/memory.rs
++++ 05_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
 @@ -17,6 +17,38 @@
  }
 
@@ -1151,9 +1151,9 @@ diff -uNr 05_safe_globals/src/bsp/raspberrypi/memory.rs 06_drivers_gpio_uart/src
  //--------------------------------------------------------------------------------------------------
 
 
-diff -uNr 05_safe_globals/src/bsp/raspberrypi.rs 06_drivers_gpio_uart/src/bsp/raspberrypi.rs
---- 05_safe_globals/src/bsp/raspberrypi.rs
-+++ 06_drivers_gpio_uart/src/bsp/raspberrypi.rs
+diff -uNr 04_safe_globals/src/bsp/raspberrypi.rs 05_drivers_gpio_uart/src/bsp/raspberrypi.rs
+--- 04_safe_globals/src/bsp/raspberrypi.rs
++++ 05_drivers_gpio_uart/src/bsp/raspberrypi.rs
 @@ -6,4 +6,33 @@
 
  pub mod console;
@@ -1189,9 +1189,9 @@ diff -uNr 05_safe_globals/src/bsp/raspberrypi.rs 06_drivers_gpio_uart/src/bsp/ra
 +    }
 +}
 
-diff -uNr 05_safe_globals/src/bsp.rs 06_drivers_gpio_uart/src/bsp.rs
---- 05_safe_globals/src/bsp.rs
-+++ 06_drivers_gpio_uart/src/bsp.rs
+diff -uNr 04_safe_globals/src/bsp.rs 05_drivers_gpio_uart/src/bsp.rs
+--- 04_safe_globals/src/bsp.rs
++++ 05_drivers_gpio_uart/src/bsp.rs
 @@ -4,6 +4,8 @@
 
  //! Conditional reexporting of Board Support Packages.
@@ -1202,9 +1202,9 @@ diff -uNr 05_safe_globals/src/bsp.rs 06_drivers_gpio_uart/src/bsp.rs
  mod raspberrypi;
 
 
-diff -uNr 05_safe_globals/src/console.rs 06_drivers_gpio_uart/src/console.rs
---- 05_safe_globals/src/console.rs
-+++ 06_drivers_gpio_uart/src/console.rs
+diff -uNr 04_safe_globals/src/console.rs 05_drivers_gpio_uart/src/console.rs
+--- 04_safe_globals/src/console.rs
++++ 05_drivers_gpio_uart/src/console.rs
 @@ -14,8 +14,25 @@
 
      /// Console write functions.
@@ -1247,9 +1247,9 @@ diff -uNr 05_safe_globals/src/console.rs 06_drivers_gpio_uart/src/console.rs
 +    pub trait All = Write + Read + Statistics;
  }
 
-diff -uNr 05_safe_globals/src/cpu.rs 06_drivers_gpio_uart/src/cpu.rs
---- 05_safe_globals/src/cpu.rs
-+++ 06_drivers_gpio_uart/src/cpu.rs
+diff -uNr 04_safe_globals/src/cpu.rs 05_drivers_gpio_uart/src/cpu.rs
+--- 04_safe_globals/src/cpu.rs
++++ 05_drivers_gpio_uart/src/cpu.rs
 @@ -13,4 +13,7 @@
  //--------------------------------------------------------------------------------------------------
  // Architectural Public Reexports
@@ -1260,9 +1260,9 @@ diff -uNr 05_safe_globals/src/cpu.rs 06_drivers_gpio_uart/src/cpu.rs
 +#[cfg(feature = "bsp_rpi3")]
 +pub use arch_cpu::spin_for_cycles;
 
-diff -uNr 05_safe_globals/src/driver.rs 06_drivers_gpio_uart/src/driver.rs
---- 05_safe_globals/src/driver.rs
-+++ 06_drivers_gpio_uart/src/driver.rs
+diff -uNr 04_safe_globals/src/driver.rs 05_drivers_gpio_uart/src/driver.rs
+--- 04_safe_globals/src/driver.rs
++++ 05_drivers_gpio_uart/src/driver.rs
 @@ -0,0 +1,44 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -1309,9 +1309,9 @@ diff -uNr 05_safe_globals/src/driver.rs 06_drivers_gpio_uart/src/driver.rs
 +    }
 +}
 
-diff -uNr 05_safe_globals/src/main.rs 06_drivers_gpio_uart/src/main.rs
---- 05_safe_globals/src/main.rs
-+++ 06_drivers_gpio_uart/src/main.rs
+diff -uNr 04_safe_globals/src/main.rs 05_drivers_gpio_uart/src/main.rs
+--- 04_safe_globals/src/main.rs
++++ 05_drivers_gpio_uart/src/main.rs
 @@ -106,6 +106,8 @@
  //!
  //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
@@ -1385,9 +1385,9 @@ diff -uNr 05_safe_globals/src/main.rs 06_drivers_gpio_uart/src/main.rs
 +    }
  }
 
-diff -uNr 05_safe_globals/src/panic_wait.rs 06_drivers_gpio_uart/src/panic_wait.rs
---- 05_safe_globals/src/panic_wait.rs
-+++ 06_drivers_gpio_uart/src/panic_wait.rs
+diff -uNr 04_safe_globals/src/panic_wait.rs 05_drivers_gpio_uart/src/panic_wait.rs
+--- 04_safe_globals/src/panic_wait.rs
++++ 05_drivers_gpio_uart/src/panic_wait.rs
 @@ -4,15 +4,35 @@
 
  //! A panic handler that infinitely waits.
diff --git a/06_drivers_gpio_uart/build.rs b/05_drivers_gpio_uart/build.rs
similarity index 100%
rename from 06_drivers_gpio_uart/build.rs
rename to 05_drivers_gpio_uart/build.rs
diff --git a/06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs b/05_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
similarity index 100%
rename from 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
rename to 05_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
diff --git a/06_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs b/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs
similarity index 100%
rename from 06_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs
rename to 05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs
diff --git a/06_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s b/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s
similarity index 100%
rename from 06_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s
rename to 05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s
diff --git a/06_drivers_gpio_uart/src/bsp.rs b/05_drivers_gpio_uart/src/bsp.rs
similarity index 100%
rename from 06_drivers_gpio_uart/src/bsp.rs
rename to 05_drivers_gpio_uart/src/bsp.rs
diff --git a/06_drivers_gpio_uart/src/bsp/device_driver.rs b/05_drivers_gpio_uart/src/bsp/device_driver.rs
similarity index 100%
rename from 06_drivers_gpio_uart/src/bsp/device_driver.rs
rename to 05_drivers_gpio_uart/src/bsp/device_driver.rs
diff --git a/06_drivers_gpio_uart/src/bsp/device_driver/bcm.rs b/05_drivers_gpio_uart/src/bsp/device_driver/bcm.rs
similarity index 100%
rename from 06_drivers_gpio_uart/src/bsp/device_driver/bcm.rs
rename to 05_drivers_gpio_uart/src/bsp/device_driver/bcm.rs
diff --git a/06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
similarity index 100%
rename from 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
rename to 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
diff --git a/06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
similarity index 100%
rename from 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
rename to 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
diff --git a/06_drivers_gpio_uart/src/bsp/device_driver/common.rs b/05_drivers_gpio_uart/src/bsp/device_driver/common.rs
similarity index 100%
rename from 06_drivers_gpio_uart/src/bsp/device_driver/common.rs
rename to 05_drivers_gpio_uart/src/bsp/device_driver/common.rs
diff --git a/06_drivers_gpio_uart/src/bsp/raspberrypi.rs b/05_drivers_gpio_uart/src/bsp/raspberrypi.rs
similarity index 100%
rename from 06_drivers_gpio_uart/src/bsp/raspberrypi.rs
rename to 05_drivers_gpio_uart/src/bsp/raspberrypi.rs
diff --git a/06_drivers_gpio_uart/src/bsp/raspberrypi/console.rs b/05_drivers_gpio_uart/src/bsp/raspberrypi/console.rs
similarity index 100%
rename from 06_drivers_gpio_uart/src/bsp/raspberrypi/console.rs
rename to 05_drivers_gpio_uart/src/bsp/raspberrypi/console.rs
diff --git a/06_drivers_gpio_uart/src/bsp/raspberrypi/cpu.rs b/05_drivers_gpio_uart/src/bsp/raspberrypi/cpu.rs
similarity index 100%
rename from 06_drivers_gpio_uart/src/bsp/raspberrypi/cpu.rs
rename to 05_drivers_gpio_uart/src/bsp/raspberrypi/cpu.rs
diff --git a/06_drivers_gpio_uart/src/bsp/raspberrypi/driver.rs b/05_drivers_gpio_uart/src/bsp/raspberrypi/driver.rs
similarity index 100%
rename from 06_drivers_gpio_uart/src/bsp/raspberrypi/driver.rs
rename to 05_drivers_gpio_uart/src/bsp/raspberrypi/driver.rs
diff --git a/06_drivers_gpio_uart/src/bsp/raspberrypi/link.ld b/05_drivers_gpio_uart/src/bsp/raspberrypi/link.ld
similarity index 100%
rename from 06_drivers_gpio_uart/src/bsp/raspberrypi/link.ld
rename to 05_drivers_gpio_uart/src/bsp/raspberrypi/link.ld
diff --git a/06_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs b/05_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
similarity index 100%
rename from 06_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
rename to 05_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
diff --git a/06_drivers_gpio_uart/src/console.rs b/05_drivers_gpio_uart/src/console.rs
similarity index 100%
rename from 06_drivers_gpio_uart/src/console.rs
rename to 05_drivers_gpio_uart/src/console.rs
diff --git a/06_drivers_gpio_uart/src/cpu.rs b/05_drivers_gpio_uart/src/cpu.rs
similarity index 100%
rename from 06_drivers_gpio_uart/src/cpu.rs
rename to 05_drivers_gpio_uart/src/cpu.rs
diff --git a/06_drivers_gpio_uart/src/cpu/boot.rs b/05_drivers_gpio_uart/src/cpu/boot.rs
similarity index 100%
rename from 06_drivers_gpio_uart/src/cpu/boot.rs
rename to 05_drivers_gpio_uart/src/cpu/boot.rs
diff --git a/06_drivers_gpio_uart/src/driver.rs b/05_drivers_gpio_uart/src/driver.rs
similarity index 100%
rename from 06_drivers_gpio_uart/src/driver.rs
rename to 05_drivers_gpio_uart/src/driver.rs
diff --git a/06_drivers_gpio_uart/src/main.rs b/05_drivers_gpio_uart/src/main.rs
similarity index 100%
rename from 06_drivers_gpio_uart/src/main.rs
rename to 05_drivers_gpio_uart/src/main.rs
diff --git a/06_drivers_gpio_uart/src/memory.rs b/05_drivers_gpio_uart/src/memory.rs
similarity index 100%
rename from 06_drivers_gpio_uart/src/memory.rs
rename to 05_drivers_gpio_uart/src/memory.rs
diff --git a/06_drivers_gpio_uart/src/panic_wait.rs b/05_drivers_gpio_uart/src/panic_wait.rs
similarity index 100%
rename from 06_drivers_gpio_uart/src/panic_wait.rs
rename to 05_drivers_gpio_uart/src/panic_wait.rs
diff --git a/06_drivers_gpio_uart/src/print.rs b/05_drivers_gpio_uart/src/print.rs
similarity index 100%
rename from 06_drivers_gpio_uart/src/print.rs
rename to 05_drivers_gpio_uart/src/print.rs
diff --git a/06_drivers_gpio_uart/src/runtime_init.rs b/05_drivers_gpio_uart/src/runtime_init.rs
similarity index 100%
rename from 06_drivers_gpio_uart/src/runtime_init.rs
rename to 05_drivers_gpio_uart/src/runtime_init.rs
diff --git a/06_drivers_gpio_uart/src/synchronization.rs b/05_drivers_gpio_uart/src/synchronization.rs
similarity index 100%
rename from 06_drivers_gpio_uart/src/synchronization.rs
rename to 05_drivers_gpio_uart/src/synchronization.rs
diff --git a/07_uart_chainloader/.vscode/settings.json b/06_uart_chainloader/.vscode/settings.json
similarity index 100%
rename from 07_uart_chainloader/.vscode/settings.json
rename to 06_uart_chainloader/.vscode/settings.json
diff --git a/07_uart_chainloader/Cargo.lock b/06_uart_chainloader/Cargo.lock
similarity index 100%
rename from 07_uart_chainloader/Cargo.lock
rename to 06_uart_chainloader/Cargo.lock
diff --git a/07_uart_chainloader/Cargo.toml b/06_uart_chainloader/Cargo.toml
similarity index 100%
rename from 07_uart_chainloader/Cargo.toml
rename to 06_uart_chainloader/Cargo.toml
diff --git a/07_uart_chainloader/Makefile b/06_uart_chainloader/Makefile
similarity index 100%
rename from 07_uart_chainloader/Makefile
rename to 06_uart_chainloader/Makefile
diff --git a/07_uart_chainloader/README.md b/06_uart_chainloader/README.md
similarity index 88%
rename from 07_uart_chainloader/README.md
rename to 06_uart_chainloader/README.md
index a60fe9051..457a96cd4 100644
--- a/07_uart_chainloader/README.md
+++ b/06_uart_chainloader/README.md
@@ -1,4 +1,4 @@
-# Tutorial 07 - UART Chainloader
+# Tutorial 06 - UART Chainloader
 
 ## tl;dr
 
@@ -118,12 +118,12 @@ IN:
 
 ## Diff to previous
 ```diff
-Binary files 06_drivers_gpio_uart/demo_payload_rpi3.img and 07_uart_chainloader/demo_payload_rpi3.img differ
-Binary files 06_drivers_gpio_uart/demo_payload_rpi4.img and 07_uart_chainloader/demo_payload_rpi4.img differ
+Binary files 05_drivers_gpio_uart/demo_payload_rpi3.img and 06_uart_chainloader/demo_payload_rpi3.img differ
+Binary files 05_drivers_gpio_uart/demo_payload_rpi4.img and 06_uart_chainloader/demo_payload_rpi4.img differ
 
-diff -uNr 06_drivers_gpio_uart/Makefile 07_uart_chainloader/Makefile
---- 06_drivers_gpio_uart/Makefile
-+++ 07_uart_chainloader/Makefile
+diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
+--- 05_drivers_gpio_uart/Makefile
++++ 06_uart_chainloader/Makefile
 @@ -25,6 +25,7 @@
      READELF_BINARY    = aarch64-none-elf-readelf
      LINKER_FILE       = src/bsp/raspberrypi/link.ld
@@ -176,9 +176,9 @@ diff -uNr 06_drivers_gpio_uart/Makefile 07_uart_chainloader/Makefile
  clippy:
  	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
-diff -uNr 06_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s 07_uart_chainloader/src/_arch/aarch64/cpu/boot.s
---- 06_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s
-+++ 07_uart_chainloader/src/_arch/aarch64/cpu/boot.s
+diff -uNr 05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s 06_uart_chainloader/src/_arch/aarch64/cpu/boot.s
+--- 05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s
++++ 06_uart_chainloader/src/_arch/aarch64/cpu/boot.s
 @@ -22,20 +22,31 @@
  	and	x1, x1, _core_id_mask
  	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
@@ -218,9 +218,9 @@ diff -uNr 06_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s 07_uart_chainloader/
  .size	_start, . - _start
  .type	_start, function
 
-diff -uNr 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
---- 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
-+++ 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+diff -uNr 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+--- 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
++++ 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 @@ -144,7 +144,7 @@
          // Make an educated guess for a good delay value (Sequence described in the BCM2837
          // peripherals PDF).
@@ -231,9 +231,9 @@ diff -uNr 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 07_uart
          //
          // So lets try to be on the safe side and default to 2000 cycles, which would equal 1 µs
 
-diff -uNr 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
---- 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
-+++ 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+diff -uNr 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+--- 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
++++ 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 @@ -279,7 +279,7 @@
      }
 
@@ -275,9 +275,9 @@ diff -uNr 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 0
          {}
      }
 
-diff -uNr 06_drivers_gpio_uart/src/bsp/raspberrypi/link.ld 07_uart_chainloader/src/bsp/raspberrypi/link.ld
---- 06_drivers_gpio_uart/src/bsp/raspberrypi/link.ld
-+++ 07_uart_chainloader/src/bsp/raspberrypi/link.ld
+diff -uNr 05_drivers_gpio_uart/src/bsp/raspberrypi/link.ld 06_uart_chainloader/src/bsp/raspberrypi/link.ld
+--- 05_drivers_gpio_uart/src/bsp/raspberrypi/link.ld
++++ 06_uart_chainloader/src/bsp/raspberrypi/link.ld
 @@ -16,7 +16,8 @@
 
  SECTIONS
@@ -311,9 +311,9 @@ diff -uNr 06_drivers_gpio_uart/src/bsp/raspberrypi/link.ld 07_uart_chainloader/s
          __bss_start = .;
          *(.bss*);
 
-diff -uNr 06_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs 07_uart_chainloader/src/bsp/raspberrypi/memory.rs
---- 06_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
-+++ 07_uart_chainloader/src/bsp/raspberrypi/memory.rs
+diff -uNr 05_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs 06_uart_chainloader/src/bsp/raspberrypi/memory.rs
+--- 05_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
++++ 06_uart_chainloader/src/bsp/raspberrypi/memory.rs
 @@ -23,9 +23,10 @@
  /// The board's physical memory map.
  #[rustfmt::skip]
@@ -343,9 +343,9 @@ diff -uNr 06_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs 07_uart_chainloader
  /// # Safety
  ///
 
-diff -uNr 06_drivers_gpio_uart/src/main.rs 07_uart_chainloader/src/main.rs
---- 06_drivers_gpio_uart/src/main.rs
-+++ 07_uart_chainloader/src/main.rs
+diff -uNr 05_drivers_gpio_uart/src/main.rs 06_uart_chainloader/src/main.rs
+--- 05_drivers_gpio_uart/src/main.rs
++++ 06_uart_chainloader/src/main.rs
 @@ -107,6 +107,7 @@
  //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
@@ -425,17 +425,17 @@ diff -uNr 06_drivers_gpio_uart/src/main.rs 07_uart_chainloader/src/main.rs
 +    kernel()
  }
 
-diff -uNr 06_drivers_gpio_uart/update.sh 07_uart_chainloader/update.sh
---- 06_drivers_gpio_uart/update.sh
-+++ 07_uart_chainloader/update.sh
+diff -uNr 05_drivers_gpio_uart/update.sh 06_uart_chainloader/update.sh
+--- 05_drivers_gpio_uart/update.sh
++++ 06_uart_chainloader/update.sh
 @@ -0,0 +1,8 @@
 +#!/usr/bin/env bash
 +
-+cd ../06_drivers_gpio_uart
++cd ../05_drivers_gpio_uart
 +BSP=rpi4 make
-+cp kernel8.img ../07_uart_chainloader/demo_payload_rpi4.img
++cp kernel8.img ../06_uart_chainloader/demo_payload_rpi4.img
 +make
-+cp kernel8.img ../07_uart_chainloader/demo_payload_rpi3.img
++cp kernel8.img ../06_uart_chainloader/demo_payload_rpi3.img
 +rm kernel8.img
 
 ```
diff --git a/07_uart_chainloader/build.rs b/06_uart_chainloader/build.rs
similarity index 100%
rename from 07_uart_chainloader/build.rs
rename to 06_uart_chainloader/build.rs
diff --git a/07_uart_chainloader/demo_payload_rpi3.img b/06_uart_chainloader/demo_payload_rpi3.img
similarity index 100%
rename from 07_uart_chainloader/demo_payload_rpi3.img
rename to 06_uart_chainloader/demo_payload_rpi3.img
diff --git a/07_uart_chainloader/demo_payload_rpi4.img b/06_uart_chainloader/demo_payload_rpi4.img
similarity index 100%
rename from 07_uart_chainloader/demo_payload_rpi4.img
rename to 06_uart_chainloader/demo_payload_rpi4.img
diff --git a/07_uart_chainloader/src/_arch/aarch64/cpu.rs b/06_uart_chainloader/src/_arch/aarch64/cpu.rs
similarity index 100%
rename from 07_uart_chainloader/src/_arch/aarch64/cpu.rs
rename to 06_uart_chainloader/src/_arch/aarch64/cpu.rs
diff --git a/07_uart_chainloader/src/_arch/aarch64/cpu/boot.rs b/06_uart_chainloader/src/_arch/aarch64/cpu/boot.rs
similarity index 100%
rename from 07_uart_chainloader/src/_arch/aarch64/cpu/boot.rs
rename to 06_uart_chainloader/src/_arch/aarch64/cpu/boot.rs
diff --git a/07_uart_chainloader/src/_arch/aarch64/cpu/boot.s b/06_uart_chainloader/src/_arch/aarch64/cpu/boot.s
similarity index 100%
rename from 07_uart_chainloader/src/_arch/aarch64/cpu/boot.s
rename to 06_uart_chainloader/src/_arch/aarch64/cpu/boot.s
diff --git a/07_uart_chainloader/src/bsp.rs b/06_uart_chainloader/src/bsp.rs
similarity index 100%
rename from 07_uart_chainloader/src/bsp.rs
rename to 06_uart_chainloader/src/bsp.rs
diff --git a/07_uart_chainloader/src/bsp/device_driver.rs b/06_uart_chainloader/src/bsp/device_driver.rs
similarity index 100%
rename from 07_uart_chainloader/src/bsp/device_driver.rs
rename to 06_uart_chainloader/src/bsp/device_driver.rs
diff --git a/07_uart_chainloader/src/bsp/device_driver/bcm.rs b/06_uart_chainloader/src/bsp/device_driver/bcm.rs
similarity index 100%
rename from 07_uart_chainloader/src/bsp/device_driver/bcm.rs
rename to 06_uart_chainloader/src/bsp/device_driver/bcm.rs
diff --git a/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
similarity index 100%
rename from 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
rename to 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
diff --git a/07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
similarity index 100%
rename from 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
rename to 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
diff --git a/07_uart_chainloader/src/bsp/device_driver/common.rs b/06_uart_chainloader/src/bsp/device_driver/common.rs
similarity index 100%
rename from 07_uart_chainloader/src/bsp/device_driver/common.rs
rename to 06_uart_chainloader/src/bsp/device_driver/common.rs
diff --git a/07_uart_chainloader/src/bsp/raspberrypi.rs b/06_uart_chainloader/src/bsp/raspberrypi.rs
similarity index 100%
rename from 07_uart_chainloader/src/bsp/raspberrypi.rs
rename to 06_uart_chainloader/src/bsp/raspberrypi.rs
diff --git a/07_uart_chainloader/src/bsp/raspberrypi/console.rs b/06_uart_chainloader/src/bsp/raspberrypi/console.rs
similarity index 100%
rename from 07_uart_chainloader/src/bsp/raspberrypi/console.rs
rename to 06_uart_chainloader/src/bsp/raspberrypi/console.rs
diff --git a/07_uart_chainloader/src/bsp/raspberrypi/cpu.rs b/06_uart_chainloader/src/bsp/raspberrypi/cpu.rs
similarity index 100%
rename from 07_uart_chainloader/src/bsp/raspberrypi/cpu.rs
rename to 06_uart_chainloader/src/bsp/raspberrypi/cpu.rs
diff --git a/07_uart_chainloader/src/bsp/raspberrypi/driver.rs b/06_uart_chainloader/src/bsp/raspberrypi/driver.rs
similarity index 100%
rename from 07_uart_chainloader/src/bsp/raspberrypi/driver.rs
rename to 06_uart_chainloader/src/bsp/raspberrypi/driver.rs
diff --git a/07_uart_chainloader/src/bsp/raspberrypi/link.ld b/06_uart_chainloader/src/bsp/raspberrypi/link.ld
similarity index 100%
rename from 07_uart_chainloader/src/bsp/raspberrypi/link.ld
rename to 06_uart_chainloader/src/bsp/raspberrypi/link.ld
diff --git a/07_uart_chainloader/src/bsp/raspberrypi/memory.rs b/06_uart_chainloader/src/bsp/raspberrypi/memory.rs
similarity index 100%
rename from 07_uart_chainloader/src/bsp/raspberrypi/memory.rs
rename to 06_uart_chainloader/src/bsp/raspberrypi/memory.rs
diff --git a/07_uart_chainloader/src/console.rs b/06_uart_chainloader/src/console.rs
similarity index 100%
rename from 07_uart_chainloader/src/console.rs
rename to 06_uart_chainloader/src/console.rs
diff --git a/07_uart_chainloader/src/cpu.rs b/06_uart_chainloader/src/cpu.rs
similarity index 100%
rename from 07_uart_chainloader/src/cpu.rs
rename to 06_uart_chainloader/src/cpu.rs
diff --git a/07_uart_chainloader/src/cpu/boot.rs b/06_uart_chainloader/src/cpu/boot.rs
similarity index 100%
rename from 07_uart_chainloader/src/cpu/boot.rs
rename to 06_uart_chainloader/src/cpu/boot.rs
diff --git a/07_uart_chainloader/src/driver.rs b/06_uart_chainloader/src/driver.rs
similarity index 100%
rename from 07_uart_chainloader/src/driver.rs
rename to 06_uart_chainloader/src/driver.rs
diff --git a/07_uart_chainloader/src/main.rs b/06_uart_chainloader/src/main.rs
similarity index 100%
rename from 07_uart_chainloader/src/main.rs
rename to 06_uart_chainloader/src/main.rs
diff --git a/07_uart_chainloader/src/memory.rs b/06_uart_chainloader/src/memory.rs
similarity index 100%
rename from 07_uart_chainloader/src/memory.rs
rename to 06_uart_chainloader/src/memory.rs
diff --git a/07_uart_chainloader/src/panic_wait.rs b/06_uart_chainloader/src/panic_wait.rs
similarity index 100%
rename from 07_uart_chainloader/src/panic_wait.rs
rename to 06_uart_chainloader/src/panic_wait.rs
diff --git a/07_uart_chainloader/src/print.rs b/06_uart_chainloader/src/print.rs
similarity index 100%
rename from 07_uart_chainloader/src/print.rs
rename to 06_uart_chainloader/src/print.rs
diff --git a/07_uart_chainloader/src/runtime_init.rs b/06_uart_chainloader/src/runtime_init.rs
similarity index 100%
rename from 07_uart_chainloader/src/runtime_init.rs
rename to 06_uart_chainloader/src/runtime_init.rs
diff --git a/07_uart_chainloader/src/synchronization.rs b/06_uart_chainloader/src/synchronization.rs
similarity index 100%
rename from 07_uart_chainloader/src/synchronization.rs
rename to 06_uart_chainloader/src/synchronization.rs
diff --git a/06_uart_chainloader/update.sh b/06_uart_chainloader/update.sh
new file mode 100755
index 000000000..5fac48ba0
--- /dev/null
+++ b/06_uart_chainloader/update.sh
@@ -0,0 +1,8 @@
+#!/usr/bin/env bash
+
+cd ../05_drivers_gpio_uart
+BSP=rpi4 make
+cp kernel8.img ../06_uart_chainloader/demo_payload_rpi4.img
+make
+cp kernel8.img ../06_uart_chainloader/demo_payload_rpi3.img
+rm kernel8.img
diff --git a/08_timestamps/.vscode/settings.json b/07_timestamps/.vscode/settings.json
similarity index 100%
rename from 08_timestamps/.vscode/settings.json
rename to 07_timestamps/.vscode/settings.json
diff --git a/08_timestamps/Cargo.lock b/07_timestamps/Cargo.lock
similarity index 100%
rename from 08_timestamps/Cargo.lock
rename to 07_timestamps/Cargo.lock
diff --git a/08_timestamps/Cargo.toml b/07_timestamps/Cargo.toml
similarity index 100%
rename from 08_timestamps/Cargo.toml
rename to 07_timestamps/Cargo.toml
diff --git a/08_timestamps/Makefile b/07_timestamps/Makefile
similarity index 100%
rename from 08_timestamps/Makefile
rename to 07_timestamps/Makefile
diff --git a/08_timestamps/README.md b/07_timestamps/README.md
similarity index 89%
rename from 08_timestamps/README.md
rename to 07_timestamps/README.md
index 122308a6c..b115dc09d 100644
--- a/08_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -1,4 +1,4 @@
-# Tutorial 08 - Timestamps
+# Tutorial 07 - Timestamps
 
 ## tl;dr
 
@@ -43,12 +43,12 @@ Minipush 1.0
 
 ## Diff to previous
 ```diff
-Binary files 07_uart_chainloader/demo_payload_rpi3.img and 08_timestamps/demo_payload_rpi3.img differ
-Binary files 07_uart_chainloader/demo_payload_rpi4.img and 08_timestamps/demo_payload_rpi4.img differ
+Binary files 06_uart_chainloader/demo_payload_rpi3.img and 07_timestamps/demo_payload_rpi3.img differ
+Binary files 06_uart_chainloader/demo_payload_rpi4.img and 07_timestamps/demo_payload_rpi4.img differ
 
-diff -uNr 07_uart_chainloader/Makefile 08_timestamps/Makefile
---- 07_uart_chainloader/Makefile
-+++ 08_timestamps/Makefile
+diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
+--- 06_uart_chainloader/Makefile
++++ 07_timestamps/Makefile
 @@ -25,7 +25,6 @@
      READELF_BINARY    = aarch64-none-elf-readelf
      LINKER_FILE       = src/bsp/raspberrypi/link.ld
@@ -93,9 +93,9 @@ diff -uNr 07_uart_chainloader/Makefile 08_timestamps/Makefile
  clippy:
  	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
-diff -uNr 07_uart_chainloader/src/_arch/aarch64/cpu/boot.s 08_timestamps/src/_arch/aarch64/cpu/boot.s
---- 07_uart_chainloader/src/_arch/aarch64/cpu/boot.s
-+++ 08_timestamps/src/_arch/aarch64/cpu/boot.s
+diff -uNr 06_uart_chainloader/src/_arch/aarch64/cpu/boot.s 07_timestamps/src/_arch/aarch64/cpu/boot.s
+--- 06_uart_chainloader/src/_arch/aarch64/cpu/boot.s
++++ 07_timestamps/src/_arch/aarch64/cpu/boot.s
 @@ -22,31 +22,20 @@
  	and	x1, x1, _core_id_mask
  	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
@@ -135,9 +135,9 @@ diff -uNr 07_uart_chainloader/src/_arch/aarch64/cpu/boot.s 08_timestamps/src/_ar
  .size	_start, . - _start
  .type	_start, function
 
-diff -uNr 07_uart_chainloader/src/_arch/aarch64/cpu.rs 08_timestamps/src/_arch/aarch64/cpu.rs
---- 07_uart_chainloader/src/_arch/aarch64/cpu.rs
-+++ 08_timestamps/src/_arch/aarch64/cpu.rs
+diff -uNr 06_uart_chainloader/src/_arch/aarch64/cpu.rs 07_timestamps/src/_arch/aarch64/cpu.rs
+--- 06_uart_chainloader/src/_arch/aarch64/cpu.rs
++++ 07_timestamps/src/_arch/aarch64/cpu.rs
 @@ -19,15 +19,6 @@
 
  pub use asm::nop;
@@ -155,9 +155,9 @@ diff -uNr 07_uart_chainloader/src/_arch/aarch64/cpu.rs 08_timestamps/src/_arch/a
  #[inline(always)]
  pub fn wait_forever() -> ! {
 
-diff -uNr 07_uart_chainloader/src/_arch/aarch64/time.rs 08_timestamps/src/_arch/aarch64/time.rs
---- 07_uart_chainloader/src/_arch/aarch64/time.rs
-+++ 08_timestamps/src/_arch/aarch64/time.rs
+diff -uNr 06_uart_chainloader/src/_arch/aarch64/time.rs 07_timestamps/src/_arch/aarch64/time.rs
+--- 06_uart_chainloader/src/_arch/aarch64/time.rs
++++ 07_timestamps/src/_arch/aarch64/time.rs
 @@ -0,0 +1,118 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -278,9 +278,9 @@ diff -uNr 07_uart_chainloader/src/_arch/aarch64/time.rs 08_timestamps/src/_arch/
 +    }
 +}
 
-diff -uNr 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
---- 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
-+++ 08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+diff -uNr 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+--- 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
++++ 07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 @@ -139,25 +139,19 @@
      /// Disable pull-up/down on pins 14 and 15.
      #[cfg(feature = "bsp_rpi3")]
@@ -314,9 +314,9 @@ diff -uNr 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 08_times
          self.registers.GPPUD.write(GPPUD::PUD::Off);
          self.registers.GPPUDCLK0.set(0);
 
-diff -uNr 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
---- 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
-+++ 08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+diff -uNr 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+--- 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
++++ 07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 @@ -279,7 +279,7 @@
      }
 
@@ -358,9 +358,9 @@ diff -uNr 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 08
          {}
      }
 
-diff -uNr 07_uart_chainloader/src/bsp/raspberrypi/link.ld 08_timestamps/src/bsp/raspberrypi/link.ld
---- 07_uart_chainloader/src/bsp/raspberrypi/link.ld
-+++ 08_timestamps/src/bsp/raspberrypi/link.ld
+diff -uNr 06_uart_chainloader/src/bsp/raspberrypi/link.ld 07_timestamps/src/bsp/raspberrypi/link.ld
+--- 06_uart_chainloader/src/bsp/raspberrypi/link.ld
++++ 07_timestamps/src/bsp/raspberrypi/link.ld
 @@ -16,8 +16,7 @@
 
  SECTIONS
@@ -394,9 +394,9 @@ diff -uNr 07_uart_chainloader/src/bsp/raspberrypi/link.ld 08_timestamps/src/bsp/
          __bss_start = .;
          *(.bss*);
 
-diff -uNr 07_uart_chainloader/src/bsp/raspberrypi/memory.rs 08_timestamps/src/bsp/raspberrypi/memory.rs
---- 07_uart_chainloader/src/bsp/raspberrypi/memory.rs
-+++ 08_timestamps/src/bsp/raspberrypi/memory.rs
+diff -uNr 06_uart_chainloader/src/bsp/raspberrypi/memory.rs 07_timestamps/src/bsp/raspberrypi/memory.rs
+--- 06_uart_chainloader/src/bsp/raspberrypi/memory.rs
++++ 07_timestamps/src/bsp/raspberrypi/memory.rs
 @@ -23,10 +23,9 @@
  /// The board's physical memory map.
  #[rustfmt::skip]
@@ -426,9 +426,9 @@ diff -uNr 07_uart_chainloader/src/bsp/raspberrypi/memory.rs 08_timestamps/src/bs
  /// # Safety
  ///
 
-diff -uNr 07_uart_chainloader/src/cpu.rs 08_timestamps/src/cpu.rs
---- 07_uart_chainloader/src/cpu.rs
-+++ 08_timestamps/src/cpu.rs
+diff -uNr 06_uart_chainloader/src/cpu.rs 07_timestamps/src/cpu.rs
+--- 06_uart_chainloader/src/cpu.rs
++++ 07_timestamps/src/cpu.rs
 @@ -14,6 +14,3 @@
  // Architectural Public Reexports
  //--------------------------------------------------------------------------------------------------
@@ -437,9 +437,9 @@ diff -uNr 07_uart_chainloader/src/cpu.rs 08_timestamps/src/cpu.rs
 -#[cfg(feature = "bsp_rpi3")]
 -pub use arch_cpu::spin_for_cycles;
 
-diff -uNr 07_uart_chainloader/src/main.rs 08_timestamps/src/main.rs
---- 07_uart_chainloader/src/main.rs
-+++ 08_timestamps/src/main.rs
+diff -uNr 06_uart_chainloader/src/main.rs 07_timestamps/src/main.rs
+--- 06_uart_chainloader/src/main.rs
++++ 07_timestamps/src/main.rs
 @@ -107,7 +107,6 @@
  //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
@@ -531,9 +531,9 @@ diff -uNr 07_uart_chainloader/src/main.rs 08_timestamps/src/main.rs
 +    }
  }
 
-diff -uNr 07_uart_chainloader/src/print.rs 08_timestamps/src/print.rs
---- 07_uart_chainloader/src/print.rs
-+++ 08_timestamps/src/print.rs
+diff -uNr 06_uart_chainloader/src/print.rs 07_timestamps/src/print.rs
+--- 06_uart_chainloader/src/print.rs
++++ 07_timestamps/src/print.rs
 @@ -36,3 +36,71 @@
          $crate::print::_print(format_args_nl!($($arg)*));
      })
@@ -607,9 +607,9 @@ diff -uNr 07_uart_chainloader/src/print.rs 08_timestamps/src/print.rs
 +    })
 +}
 
-diff -uNr 07_uart_chainloader/src/time.rs 08_timestamps/src/time.rs
---- 07_uart_chainloader/src/time.rs
-+++ 08_timestamps/src/time.rs
+diff -uNr 06_uart_chainloader/src/time.rs 07_timestamps/src/time.rs
+--- 06_uart_chainloader/src/time.rs
++++ 07_timestamps/src/time.rs
 @@ -0,0 +1,37 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -649,17 +649,17 @@ diff -uNr 07_uart_chainloader/src/time.rs 08_timestamps/src/time.rs
 +    }
 +}
 
-diff -uNr 07_uart_chainloader/update.sh 08_timestamps/update.sh
---- 07_uart_chainloader/update.sh
-+++ 08_timestamps/update.sh
+diff -uNr 06_uart_chainloader/update.sh 07_timestamps/update.sh
+--- 06_uart_chainloader/update.sh
++++ 07_timestamps/update.sh
 @@ -1,8 +0,0 @@
 -#!/usr/bin/env bash
 -
--cd ../06_drivers_gpio_uart
+-cd ../05_drivers_gpio_uart
 -BSP=rpi4 make
--cp kernel8.img ../07_uart_chainloader/demo_payload_rpi4.img
+-cp kernel8.img ../06_uart_chainloader/demo_payload_rpi4.img
 -make
--cp kernel8.img ../07_uart_chainloader/demo_payload_rpi3.img
+-cp kernel8.img ../06_uart_chainloader/demo_payload_rpi3.img
 -rm kernel8.img
 
 ```
diff --git a/08_timestamps/build.rs b/07_timestamps/build.rs
similarity index 100%
rename from 08_timestamps/build.rs
rename to 07_timestamps/build.rs
diff --git a/08_timestamps/src/_arch/aarch64/cpu.rs b/07_timestamps/src/_arch/aarch64/cpu.rs
similarity index 100%
rename from 08_timestamps/src/_arch/aarch64/cpu.rs
rename to 07_timestamps/src/_arch/aarch64/cpu.rs
diff --git a/08_timestamps/src/_arch/aarch64/cpu/boot.rs b/07_timestamps/src/_arch/aarch64/cpu/boot.rs
similarity index 100%
rename from 08_timestamps/src/_arch/aarch64/cpu/boot.rs
rename to 07_timestamps/src/_arch/aarch64/cpu/boot.rs
diff --git a/08_timestamps/src/_arch/aarch64/cpu/boot.s b/07_timestamps/src/_arch/aarch64/cpu/boot.s
similarity index 100%
rename from 08_timestamps/src/_arch/aarch64/cpu/boot.s
rename to 07_timestamps/src/_arch/aarch64/cpu/boot.s
diff --git a/08_timestamps/src/_arch/aarch64/time.rs b/07_timestamps/src/_arch/aarch64/time.rs
similarity index 100%
rename from 08_timestamps/src/_arch/aarch64/time.rs
rename to 07_timestamps/src/_arch/aarch64/time.rs
diff --git a/08_timestamps/src/bsp.rs b/07_timestamps/src/bsp.rs
similarity index 100%
rename from 08_timestamps/src/bsp.rs
rename to 07_timestamps/src/bsp.rs
diff --git a/08_timestamps/src/bsp/device_driver.rs b/07_timestamps/src/bsp/device_driver.rs
similarity index 100%
rename from 08_timestamps/src/bsp/device_driver.rs
rename to 07_timestamps/src/bsp/device_driver.rs
diff --git a/08_timestamps/src/bsp/device_driver/bcm.rs b/07_timestamps/src/bsp/device_driver/bcm.rs
similarity index 100%
rename from 08_timestamps/src/bsp/device_driver/bcm.rs
rename to 07_timestamps/src/bsp/device_driver/bcm.rs
diff --git a/08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
similarity index 100%
rename from 08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
rename to 07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
diff --git a/08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
similarity index 100%
rename from 08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
rename to 07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
diff --git a/08_timestamps/src/bsp/device_driver/common.rs b/07_timestamps/src/bsp/device_driver/common.rs
similarity index 100%
rename from 08_timestamps/src/bsp/device_driver/common.rs
rename to 07_timestamps/src/bsp/device_driver/common.rs
diff --git a/08_timestamps/src/bsp/raspberrypi.rs b/07_timestamps/src/bsp/raspberrypi.rs
similarity index 100%
rename from 08_timestamps/src/bsp/raspberrypi.rs
rename to 07_timestamps/src/bsp/raspberrypi.rs
diff --git a/08_timestamps/src/bsp/raspberrypi/console.rs b/07_timestamps/src/bsp/raspberrypi/console.rs
similarity index 100%
rename from 08_timestamps/src/bsp/raspberrypi/console.rs
rename to 07_timestamps/src/bsp/raspberrypi/console.rs
diff --git a/08_timestamps/src/bsp/raspberrypi/cpu.rs b/07_timestamps/src/bsp/raspberrypi/cpu.rs
similarity index 100%
rename from 08_timestamps/src/bsp/raspberrypi/cpu.rs
rename to 07_timestamps/src/bsp/raspberrypi/cpu.rs
diff --git a/08_timestamps/src/bsp/raspberrypi/driver.rs b/07_timestamps/src/bsp/raspberrypi/driver.rs
similarity index 100%
rename from 08_timestamps/src/bsp/raspberrypi/driver.rs
rename to 07_timestamps/src/bsp/raspberrypi/driver.rs
diff --git a/08_timestamps/src/bsp/raspberrypi/link.ld b/07_timestamps/src/bsp/raspberrypi/link.ld
similarity index 100%
rename from 08_timestamps/src/bsp/raspberrypi/link.ld
rename to 07_timestamps/src/bsp/raspberrypi/link.ld
diff --git a/08_timestamps/src/bsp/raspberrypi/memory.rs b/07_timestamps/src/bsp/raspberrypi/memory.rs
similarity index 100%
rename from 08_timestamps/src/bsp/raspberrypi/memory.rs
rename to 07_timestamps/src/bsp/raspberrypi/memory.rs
diff --git a/08_timestamps/src/console.rs b/07_timestamps/src/console.rs
similarity index 100%
rename from 08_timestamps/src/console.rs
rename to 07_timestamps/src/console.rs
diff --git a/08_timestamps/src/cpu.rs b/07_timestamps/src/cpu.rs
similarity index 100%
rename from 08_timestamps/src/cpu.rs
rename to 07_timestamps/src/cpu.rs
diff --git a/08_timestamps/src/cpu/boot.rs b/07_timestamps/src/cpu/boot.rs
similarity index 100%
rename from 08_timestamps/src/cpu/boot.rs
rename to 07_timestamps/src/cpu/boot.rs
diff --git a/08_timestamps/src/driver.rs b/07_timestamps/src/driver.rs
similarity index 100%
rename from 08_timestamps/src/driver.rs
rename to 07_timestamps/src/driver.rs
diff --git a/08_timestamps/src/main.rs b/07_timestamps/src/main.rs
similarity index 100%
rename from 08_timestamps/src/main.rs
rename to 07_timestamps/src/main.rs
diff --git a/08_timestamps/src/memory.rs b/07_timestamps/src/memory.rs
similarity index 100%
rename from 08_timestamps/src/memory.rs
rename to 07_timestamps/src/memory.rs
diff --git a/08_timestamps/src/panic_wait.rs b/07_timestamps/src/panic_wait.rs
similarity index 100%
rename from 08_timestamps/src/panic_wait.rs
rename to 07_timestamps/src/panic_wait.rs
diff --git a/08_timestamps/src/print.rs b/07_timestamps/src/print.rs
similarity index 100%
rename from 08_timestamps/src/print.rs
rename to 07_timestamps/src/print.rs
diff --git a/08_timestamps/src/runtime_init.rs b/07_timestamps/src/runtime_init.rs
similarity index 100%
rename from 08_timestamps/src/runtime_init.rs
rename to 07_timestamps/src/runtime_init.rs
diff --git a/08_timestamps/src/synchronization.rs b/07_timestamps/src/synchronization.rs
similarity index 100%
rename from 08_timestamps/src/synchronization.rs
rename to 07_timestamps/src/synchronization.rs
diff --git a/08_timestamps/src/time.rs b/07_timestamps/src/time.rs
similarity index 100%
rename from 08_timestamps/src/time.rs
rename to 07_timestamps/src/time.rs
diff --git a/07_uart_chainloader/update.sh b/07_uart_chainloader/update.sh
deleted file mode 100755
index 7d57d0a62..000000000
--- a/07_uart_chainloader/update.sh
+++ /dev/null
@@ -1,8 +0,0 @@
-#!/usr/bin/env bash
-
-cd ../06_drivers_gpio_uart
-BSP=rpi4 make
-cp kernel8.img ../07_uart_chainloader/demo_payload_rpi4.img
-make
-cp kernel8.img ../07_uart_chainloader/demo_payload_rpi3.img
-rm kernel8.img
diff --git a/09_hw_debug_JTAG/.vscode/settings.json b/08_hw_debug_JTAG/.vscode/settings.json
similarity index 100%
rename from 09_hw_debug_JTAG/.vscode/settings.json
rename to 08_hw_debug_JTAG/.vscode/settings.json
diff --git a/09_hw_debug_JTAG/Cargo.lock b/08_hw_debug_JTAG/Cargo.lock
similarity index 100%
rename from 09_hw_debug_JTAG/Cargo.lock
rename to 08_hw_debug_JTAG/Cargo.lock
diff --git a/09_hw_debug_JTAG/Cargo.toml b/08_hw_debug_JTAG/Cargo.toml
similarity index 100%
rename from 09_hw_debug_JTAG/Cargo.toml
rename to 08_hw_debug_JTAG/Cargo.toml
diff --git a/09_hw_debug_JTAG/Makefile b/08_hw_debug_JTAG/Makefile
similarity index 100%
rename from 09_hw_debug_JTAG/Makefile
rename to 08_hw_debug_JTAG/Makefile
diff --git a/09_hw_debug_JTAG/README.md b/08_hw_debug_JTAG/README.md
similarity index 98%
rename from 09_hw_debug_JTAG/README.md
rename to 08_hw_debug_JTAG/README.md
index 0c9fb497d..03d16a4f0 100644
--- a/09_hw_debug_JTAG/README.md
+++ b/08_hw_debug_JTAG/README.md
@@ -1,4 +1,4 @@
-# Tutorial 09 - Hardware Debugging using JTAG
+# Tutorial 08 - Hardware Debugging using JTAG
 
 ## tl;dr
 
@@ -305,9 +305,9 @@ Thanks to [@naotaco](https://github.com/naotaco) for laying the groundwork for t
 ## Diff to previous
 ```diff
 
-diff -uNr 08_timestamps/Makefile 09_hw_debug_JTAG/Makefile
---- 08_timestamps/Makefile
-+++ 09_hw_debug_JTAG/Makefile
+diff -uNr 07_timestamps/Makefile 08_hw_debug_JTAG/Makefile
+--- 07_timestamps/Makefile
++++ 08_hw_debug_JTAG/Makefile
 @@ -23,6 +23,8 @@
      OBJDUMP_BINARY    = aarch64-none-elf-objdump
      NM_BINARY         = aarch64-none-elf-nm
diff --git a/09_hw_debug_JTAG/build.rs b/08_hw_debug_JTAG/build.rs
similarity index 100%
rename from 09_hw_debug_JTAG/build.rs
rename to 08_hw_debug_JTAG/build.rs
diff --git a/09_hw_debug_JTAG/src/_arch/aarch64/cpu.rs b/08_hw_debug_JTAG/src/_arch/aarch64/cpu.rs
similarity index 100%
rename from 09_hw_debug_JTAG/src/_arch/aarch64/cpu.rs
rename to 08_hw_debug_JTAG/src/_arch/aarch64/cpu.rs
diff --git a/09_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs b/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs
similarity index 100%
rename from 09_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs
rename to 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs
diff --git a/09_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s b/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s
similarity index 100%
rename from 09_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s
rename to 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s
diff --git a/09_hw_debug_JTAG/src/_arch/aarch64/time.rs b/08_hw_debug_JTAG/src/_arch/aarch64/time.rs
similarity index 100%
rename from 09_hw_debug_JTAG/src/_arch/aarch64/time.rs
rename to 08_hw_debug_JTAG/src/_arch/aarch64/time.rs
diff --git a/09_hw_debug_JTAG/src/bsp.rs b/08_hw_debug_JTAG/src/bsp.rs
similarity index 100%
rename from 09_hw_debug_JTAG/src/bsp.rs
rename to 08_hw_debug_JTAG/src/bsp.rs
diff --git a/09_hw_debug_JTAG/src/bsp/device_driver.rs b/08_hw_debug_JTAG/src/bsp/device_driver.rs
similarity index 100%
rename from 09_hw_debug_JTAG/src/bsp/device_driver.rs
rename to 08_hw_debug_JTAG/src/bsp/device_driver.rs
diff --git a/09_hw_debug_JTAG/src/bsp/device_driver/bcm.rs b/08_hw_debug_JTAG/src/bsp/device_driver/bcm.rs
similarity index 100%
rename from 09_hw_debug_JTAG/src/bsp/device_driver/bcm.rs
rename to 08_hw_debug_JTAG/src/bsp/device_driver/bcm.rs
diff --git a/09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
similarity index 100%
rename from 09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
rename to 08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
diff --git a/09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
similarity index 100%
rename from 09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
rename to 08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
diff --git a/09_hw_debug_JTAG/src/bsp/device_driver/common.rs b/08_hw_debug_JTAG/src/bsp/device_driver/common.rs
similarity index 100%
rename from 09_hw_debug_JTAG/src/bsp/device_driver/common.rs
rename to 08_hw_debug_JTAG/src/bsp/device_driver/common.rs
diff --git a/09_hw_debug_JTAG/src/bsp/raspberrypi.rs b/08_hw_debug_JTAG/src/bsp/raspberrypi.rs
similarity index 100%
rename from 09_hw_debug_JTAG/src/bsp/raspberrypi.rs
rename to 08_hw_debug_JTAG/src/bsp/raspberrypi.rs
diff --git a/09_hw_debug_JTAG/src/bsp/raspberrypi/console.rs b/08_hw_debug_JTAG/src/bsp/raspberrypi/console.rs
similarity index 100%
rename from 09_hw_debug_JTAG/src/bsp/raspberrypi/console.rs
rename to 08_hw_debug_JTAG/src/bsp/raspberrypi/console.rs
diff --git a/09_hw_debug_JTAG/src/bsp/raspberrypi/cpu.rs b/08_hw_debug_JTAG/src/bsp/raspberrypi/cpu.rs
similarity index 100%
rename from 09_hw_debug_JTAG/src/bsp/raspberrypi/cpu.rs
rename to 08_hw_debug_JTAG/src/bsp/raspberrypi/cpu.rs
diff --git a/09_hw_debug_JTAG/src/bsp/raspberrypi/driver.rs b/08_hw_debug_JTAG/src/bsp/raspberrypi/driver.rs
similarity index 100%
rename from 09_hw_debug_JTAG/src/bsp/raspberrypi/driver.rs
rename to 08_hw_debug_JTAG/src/bsp/raspberrypi/driver.rs
diff --git a/09_hw_debug_JTAG/src/bsp/raspberrypi/link.ld b/08_hw_debug_JTAG/src/bsp/raspberrypi/link.ld
similarity index 100%
rename from 09_hw_debug_JTAG/src/bsp/raspberrypi/link.ld
rename to 08_hw_debug_JTAG/src/bsp/raspberrypi/link.ld
diff --git a/09_hw_debug_JTAG/src/bsp/raspberrypi/memory.rs b/08_hw_debug_JTAG/src/bsp/raspberrypi/memory.rs
similarity index 100%
rename from 09_hw_debug_JTAG/src/bsp/raspberrypi/memory.rs
rename to 08_hw_debug_JTAG/src/bsp/raspberrypi/memory.rs
diff --git a/09_hw_debug_JTAG/src/console.rs b/08_hw_debug_JTAG/src/console.rs
similarity index 100%
rename from 09_hw_debug_JTAG/src/console.rs
rename to 08_hw_debug_JTAG/src/console.rs
diff --git a/09_hw_debug_JTAG/src/cpu.rs b/08_hw_debug_JTAG/src/cpu.rs
similarity index 100%
rename from 09_hw_debug_JTAG/src/cpu.rs
rename to 08_hw_debug_JTAG/src/cpu.rs
diff --git a/09_hw_debug_JTAG/src/cpu/boot.rs b/08_hw_debug_JTAG/src/cpu/boot.rs
similarity index 100%
rename from 09_hw_debug_JTAG/src/cpu/boot.rs
rename to 08_hw_debug_JTAG/src/cpu/boot.rs
diff --git a/09_hw_debug_JTAG/src/driver.rs b/08_hw_debug_JTAG/src/driver.rs
similarity index 100%
rename from 09_hw_debug_JTAG/src/driver.rs
rename to 08_hw_debug_JTAG/src/driver.rs
diff --git a/09_hw_debug_JTAG/src/main.rs b/08_hw_debug_JTAG/src/main.rs
similarity index 100%
rename from 09_hw_debug_JTAG/src/main.rs
rename to 08_hw_debug_JTAG/src/main.rs
diff --git a/09_hw_debug_JTAG/src/memory.rs b/08_hw_debug_JTAG/src/memory.rs
similarity index 100%
rename from 09_hw_debug_JTAG/src/memory.rs
rename to 08_hw_debug_JTAG/src/memory.rs
diff --git a/09_hw_debug_JTAG/src/panic_wait.rs b/08_hw_debug_JTAG/src/panic_wait.rs
similarity index 100%
rename from 09_hw_debug_JTAG/src/panic_wait.rs
rename to 08_hw_debug_JTAG/src/panic_wait.rs
diff --git a/09_hw_debug_JTAG/src/print.rs b/08_hw_debug_JTAG/src/print.rs
similarity index 100%
rename from 09_hw_debug_JTAG/src/print.rs
rename to 08_hw_debug_JTAG/src/print.rs
diff --git a/09_hw_debug_JTAG/src/runtime_init.rs b/08_hw_debug_JTAG/src/runtime_init.rs
similarity index 100%
rename from 09_hw_debug_JTAG/src/runtime_init.rs
rename to 08_hw_debug_JTAG/src/runtime_init.rs
diff --git a/09_hw_debug_JTAG/src/synchronization.rs b/08_hw_debug_JTAG/src/synchronization.rs
similarity index 100%
rename from 09_hw_debug_JTAG/src/synchronization.rs
rename to 08_hw_debug_JTAG/src/synchronization.rs
diff --git a/09_hw_debug_JTAG/src/time.rs b/08_hw_debug_JTAG/src/time.rs
similarity index 100%
rename from 09_hw_debug_JTAG/src/time.rs
rename to 08_hw_debug_JTAG/src/time.rs
diff --git a/10_privilege_level/.vscode/settings.json b/09_privilege_level/.vscode/settings.json
similarity index 100%
rename from 10_privilege_level/.vscode/settings.json
rename to 09_privilege_level/.vscode/settings.json
diff --git a/10_privilege_level/Cargo.lock b/09_privilege_level/Cargo.lock
similarity index 100%
rename from 10_privilege_level/Cargo.lock
rename to 09_privilege_level/Cargo.lock
diff --git a/10_privilege_level/Cargo.toml b/09_privilege_level/Cargo.toml
similarity index 100%
rename from 10_privilege_level/Cargo.toml
rename to 09_privilege_level/Cargo.toml
diff --git a/10_privilege_level/Makefile b/09_privilege_level/Makefile
similarity index 100%
rename from 10_privilege_level/Makefile
rename to 09_privilege_level/Makefile
diff --git a/10_privilege_level/README.md b/09_privilege_level/README.md
similarity index 93%
rename from 10_privilege_level/README.md
rename to 09_privilege_level/README.md
index 3e160e22d..b8af30216 100644
--- a/10_privilege_level/README.md
+++ b/09_privilege_level/README.md
@@ -1,4 +1,4 @@
-# Tutorial 10 - Privilege Level
+# Tutorial 09 - Privilege Level
 
 ## tl;dr
 
@@ -71,7 +71,7 @@ pub unsafe extern "C" fn _start_rust(phys_boot_core_stack_end_exclusive_addr: u6
 
 Since `EL2` is more privileged than `EL1`, it has control over various processor features and can
 allow or disallow `EL1` code to use them. One such example is access to timer and counter registers.
-We are already using them since [tutorial 08](../08_timestamps/), so of course we want to keep them.
+We are already using them since [tutorial 07](../07_timestamps/), so of course we want to keep them.
 Therefore we set the respective flags in the [Counter-timer Hypervisor Control register] and
 additionally set the virtual offset to zero so that we get the real physical value everytime:
 
@@ -198,9 +198,9 @@ Minipush 1.0
 ## Diff to previous
 ```diff
 
-diff -uNr 09_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs 10_privilege_level/src/_arch/aarch64/cpu/boot.rs
---- 09_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs
-+++ 10_privilege_level/src/_arch/aarch64/cpu/boot.rs
+diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs 09_privilege_level/src/_arch/aarch64/cpu/boot.rs
+--- 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs
++++ 09_privilege_level/src/_arch/aarch64/cpu/boot.rs
 @@ -12,11 +12,53 @@
  //! crate::cpu::boot::arch_boot
 
@@ -270,9 +270,9 @@ diff -uNr 09_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs 10_privilege_level/src/
 +    asm::eret()
  }
 
-diff -uNr 09_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s 10_privilege_level/src/_arch/aarch64/cpu/boot.s
---- 09_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s
-+++ 10_privilege_level/src/_arch/aarch64/cpu/boot.s
+diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s 09_privilege_level/src/_arch/aarch64/cpu/boot.s
+--- 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s
++++ 09_privilege_level/src/_arch/aarch64/cpu/boot.s
 @@ -6,6 +6,7 @@
  // Definitions
  //--------------------------------------------------------------------------------------------------
@@ -308,9 +308,9 @@ diff -uNr 09_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s 10_privilege_level/src/_
 
  	// Infinitely wait for events (aka "park the core").
 
-diff -uNr 09_hw_debug_JTAG/src/_arch/aarch64/exception/asynchronous.rs 10_privilege_level/src/_arch/aarch64/exception/asynchronous.rs
---- 09_hw_debug_JTAG/src/_arch/aarch64/exception/asynchronous.rs
-+++ 10_privilege_level/src/_arch/aarch64/exception/asynchronous.rs
+diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/exception/asynchronous.rs 09_privilege_level/src/_arch/aarch64/exception/asynchronous.rs
+--- 08_hw_debug_JTAG/src/_arch/aarch64/exception/asynchronous.rs
++++ 09_privilege_level/src/_arch/aarch64/exception/asynchronous.rs
 @@ -0,0 +1,81 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -394,9 +394,9 @@ diff -uNr 09_hw_debug_JTAG/src/_arch/aarch64/exception/asynchronous.rs 10_privil
 +    info!("      FIQ:    {}", to_mask_str(is_masked::<FIQ>()));
 +}
 
-diff -uNr 09_hw_debug_JTAG/src/_arch/aarch64/exception.rs 10_privilege_level/src/_arch/aarch64/exception.rs
---- 09_hw_debug_JTAG/src/_arch/aarch64/exception.rs
-+++ 10_privilege_level/src/_arch/aarch64/exception.rs
+diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/exception.rs 09_privilege_level/src/_arch/aarch64/exception.rs
+--- 08_hw_debug_JTAG/src/_arch/aarch64/exception.rs
++++ 09_privilege_level/src/_arch/aarch64/exception.rs
 @@ -0,0 +1,30 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -429,9 +429,9 @@ diff -uNr 09_hw_debug_JTAG/src/_arch/aarch64/exception.rs 10_privilege_level/src
 +    }
 +}
 
-diff -uNr 09_hw_debug_JTAG/src/exception/asynchronous.rs 10_privilege_level/src/exception/asynchronous.rs
---- 09_hw_debug_JTAG/src/exception/asynchronous.rs
-+++ 10_privilege_level/src/exception/asynchronous.rs
+diff -uNr 08_hw_debug_JTAG/src/exception/asynchronous.rs 09_privilege_level/src/exception/asynchronous.rs
+--- 08_hw_debug_JTAG/src/exception/asynchronous.rs
++++ 09_privilege_level/src/exception/asynchronous.rs
 @@ -0,0 +1,14 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -448,9 +448,9 @@ diff -uNr 09_hw_debug_JTAG/src/exception/asynchronous.rs 10_privilege_level/src/
 +//--------------------------------------------------------------------------------------------------
 +pub use arch_asynchronous::print_state;
 
-diff -uNr 09_hw_debug_JTAG/src/exception.rs 10_privilege_level/src/exception.rs
---- 09_hw_debug_JTAG/src/exception.rs
-+++ 10_privilege_level/src/exception.rs
+diff -uNr 08_hw_debug_JTAG/src/exception.rs 09_privilege_level/src/exception.rs
+--- 08_hw_debug_JTAG/src/exception.rs
++++ 09_privilege_level/src/exception.rs
 @@ -0,0 +1,30 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -483,9 +483,9 @@ diff -uNr 09_hw_debug_JTAG/src/exception.rs 10_privilege_level/src/exception.rs
 +    Unknown,
 +}
 
-diff -uNr 09_hw_debug_JTAG/src/main.rs 10_privilege_level/src/main.rs
---- 09_hw_debug_JTAG/src/main.rs
-+++ 10_privilege_level/src/main.rs
+diff -uNr 08_hw_debug_JTAG/src/main.rs 09_privilege_level/src/main.rs
+--- 08_hw_debug_JTAG/src/main.rs
++++ 09_privilege_level/src/main.rs
 @@ -119,6 +119,7 @@
  mod console;
  mod cpu;
diff --git a/10_privilege_level/build.rs b/09_privilege_level/build.rs
similarity index 100%
rename from 10_privilege_level/build.rs
rename to 09_privilege_level/build.rs
diff --git a/10_privilege_level/src/_arch/aarch64/cpu.rs b/09_privilege_level/src/_arch/aarch64/cpu.rs
similarity index 100%
rename from 10_privilege_level/src/_arch/aarch64/cpu.rs
rename to 09_privilege_level/src/_arch/aarch64/cpu.rs
diff --git a/10_privilege_level/src/_arch/aarch64/cpu/boot.rs b/09_privilege_level/src/_arch/aarch64/cpu/boot.rs
similarity index 100%
rename from 10_privilege_level/src/_arch/aarch64/cpu/boot.rs
rename to 09_privilege_level/src/_arch/aarch64/cpu/boot.rs
diff --git a/10_privilege_level/src/_arch/aarch64/cpu/boot.s b/09_privilege_level/src/_arch/aarch64/cpu/boot.s
similarity index 100%
rename from 10_privilege_level/src/_arch/aarch64/cpu/boot.s
rename to 09_privilege_level/src/_arch/aarch64/cpu/boot.s
diff --git a/10_privilege_level/src/_arch/aarch64/exception.rs b/09_privilege_level/src/_arch/aarch64/exception.rs
similarity index 100%
rename from 10_privilege_level/src/_arch/aarch64/exception.rs
rename to 09_privilege_level/src/_arch/aarch64/exception.rs
diff --git a/10_privilege_level/src/_arch/aarch64/exception/asynchronous.rs b/09_privilege_level/src/_arch/aarch64/exception/asynchronous.rs
similarity index 100%
rename from 10_privilege_level/src/_arch/aarch64/exception/asynchronous.rs
rename to 09_privilege_level/src/_arch/aarch64/exception/asynchronous.rs
diff --git a/10_privilege_level/src/_arch/aarch64/time.rs b/09_privilege_level/src/_arch/aarch64/time.rs
similarity index 100%
rename from 10_privilege_level/src/_arch/aarch64/time.rs
rename to 09_privilege_level/src/_arch/aarch64/time.rs
diff --git a/10_privilege_level/src/bsp.rs b/09_privilege_level/src/bsp.rs
similarity index 100%
rename from 10_privilege_level/src/bsp.rs
rename to 09_privilege_level/src/bsp.rs
diff --git a/10_privilege_level/src/bsp/device_driver.rs b/09_privilege_level/src/bsp/device_driver.rs
similarity index 100%
rename from 10_privilege_level/src/bsp/device_driver.rs
rename to 09_privilege_level/src/bsp/device_driver.rs
diff --git a/10_privilege_level/src/bsp/device_driver/bcm.rs b/09_privilege_level/src/bsp/device_driver/bcm.rs
similarity index 100%
rename from 10_privilege_level/src/bsp/device_driver/bcm.rs
rename to 09_privilege_level/src/bsp/device_driver/bcm.rs
diff --git a/10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
similarity index 100%
rename from 10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
rename to 09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
diff --git a/10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
similarity index 100%
rename from 10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
rename to 09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
diff --git a/10_privilege_level/src/bsp/device_driver/common.rs b/09_privilege_level/src/bsp/device_driver/common.rs
similarity index 100%
rename from 10_privilege_level/src/bsp/device_driver/common.rs
rename to 09_privilege_level/src/bsp/device_driver/common.rs
diff --git a/10_privilege_level/src/bsp/raspberrypi.rs b/09_privilege_level/src/bsp/raspberrypi.rs
similarity index 100%
rename from 10_privilege_level/src/bsp/raspberrypi.rs
rename to 09_privilege_level/src/bsp/raspberrypi.rs
diff --git a/10_privilege_level/src/bsp/raspberrypi/console.rs b/09_privilege_level/src/bsp/raspberrypi/console.rs
similarity index 100%
rename from 10_privilege_level/src/bsp/raspberrypi/console.rs
rename to 09_privilege_level/src/bsp/raspberrypi/console.rs
diff --git a/10_privilege_level/src/bsp/raspberrypi/cpu.rs b/09_privilege_level/src/bsp/raspberrypi/cpu.rs
similarity index 100%
rename from 10_privilege_level/src/bsp/raspberrypi/cpu.rs
rename to 09_privilege_level/src/bsp/raspberrypi/cpu.rs
diff --git a/10_privilege_level/src/bsp/raspberrypi/driver.rs b/09_privilege_level/src/bsp/raspberrypi/driver.rs
similarity index 100%
rename from 10_privilege_level/src/bsp/raspberrypi/driver.rs
rename to 09_privilege_level/src/bsp/raspberrypi/driver.rs
diff --git a/10_privilege_level/src/bsp/raspberrypi/link.ld b/09_privilege_level/src/bsp/raspberrypi/link.ld
similarity index 100%
rename from 10_privilege_level/src/bsp/raspberrypi/link.ld
rename to 09_privilege_level/src/bsp/raspberrypi/link.ld
diff --git a/10_privilege_level/src/bsp/raspberrypi/memory.rs b/09_privilege_level/src/bsp/raspberrypi/memory.rs
similarity index 100%
rename from 10_privilege_level/src/bsp/raspberrypi/memory.rs
rename to 09_privilege_level/src/bsp/raspberrypi/memory.rs
diff --git a/10_privilege_level/src/console.rs b/09_privilege_level/src/console.rs
similarity index 100%
rename from 10_privilege_level/src/console.rs
rename to 09_privilege_level/src/console.rs
diff --git a/10_privilege_level/src/cpu.rs b/09_privilege_level/src/cpu.rs
similarity index 100%
rename from 10_privilege_level/src/cpu.rs
rename to 09_privilege_level/src/cpu.rs
diff --git a/10_privilege_level/src/cpu/boot.rs b/09_privilege_level/src/cpu/boot.rs
similarity index 100%
rename from 10_privilege_level/src/cpu/boot.rs
rename to 09_privilege_level/src/cpu/boot.rs
diff --git a/10_privilege_level/src/driver.rs b/09_privilege_level/src/driver.rs
similarity index 100%
rename from 10_privilege_level/src/driver.rs
rename to 09_privilege_level/src/driver.rs
diff --git a/10_privilege_level/src/exception.rs b/09_privilege_level/src/exception.rs
similarity index 100%
rename from 10_privilege_level/src/exception.rs
rename to 09_privilege_level/src/exception.rs
diff --git a/10_privilege_level/src/exception/asynchronous.rs b/09_privilege_level/src/exception/asynchronous.rs
similarity index 100%
rename from 10_privilege_level/src/exception/asynchronous.rs
rename to 09_privilege_level/src/exception/asynchronous.rs
diff --git a/10_privilege_level/src/main.rs b/09_privilege_level/src/main.rs
similarity index 100%
rename from 10_privilege_level/src/main.rs
rename to 09_privilege_level/src/main.rs
diff --git a/10_privilege_level/src/memory.rs b/09_privilege_level/src/memory.rs
similarity index 100%
rename from 10_privilege_level/src/memory.rs
rename to 09_privilege_level/src/memory.rs
diff --git a/10_privilege_level/src/panic_wait.rs b/09_privilege_level/src/panic_wait.rs
similarity index 100%
rename from 10_privilege_level/src/panic_wait.rs
rename to 09_privilege_level/src/panic_wait.rs
diff --git a/10_privilege_level/src/print.rs b/09_privilege_level/src/print.rs
similarity index 100%
rename from 10_privilege_level/src/print.rs
rename to 09_privilege_level/src/print.rs
diff --git a/10_privilege_level/src/runtime_init.rs b/09_privilege_level/src/runtime_init.rs
similarity index 100%
rename from 10_privilege_level/src/runtime_init.rs
rename to 09_privilege_level/src/runtime_init.rs
diff --git a/10_privilege_level/src/synchronization.rs b/09_privilege_level/src/synchronization.rs
similarity index 100%
rename from 10_privilege_level/src/synchronization.rs
rename to 09_privilege_level/src/synchronization.rs
diff --git a/10_privilege_level/src/time.rs b/09_privilege_level/src/time.rs
similarity index 100%
rename from 10_privilege_level/src/time.rs
rename to 09_privilege_level/src/time.rs
diff --git a/11_virtual_mem_part1_identity_mapping/.vscode/settings.json b/10_virtual_mem_part1_identity_mapping/.vscode/settings.json
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/.vscode/settings.json
rename to 10_virtual_mem_part1_identity_mapping/.vscode/settings.json
diff --git a/11_virtual_mem_part1_identity_mapping/Cargo.lock b/10_virtual_mem_part1_identity_mapping/Cargo.lock
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/Cargo.lock
rename to 10_virtual_mem_part1_identity_mapping/Cargo.lock
diff --git a/11_virtual_mem_part1_identity_mapping/Cargo.toml b/10_virtual_mem_part1_identity_mapping/Cargo.toml
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/Cargo.toml
rename to 10_virtual_mem_part1_identity_mapping/Cargo.toml
diff --git a/11_virtual_mem_part1_identity_mapping/Makefile b/10_virtual_mem_part1_identity_mapping/Makefile
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/Makefile
rename to 10_virtual_mem_part1_identity_mapping/Makefile
diff --git a/11_virtual_mem_part1_identity_mapping/README.md b/10_virtual_mem_part1_identity_mapping/README.md
similarity index 96%
rename from 11_virtual_mem_part1_identity_mapping/README.md
rename to 10_virtual_mem_part1_identity_mapping/README.md
index b2313e1c2..d2d72ea55 100644
--- a/11_virtual_mem_part1_identity_mapping/README.md
+++ b/10_virtual_mem_part1_identity_mapping/README.md
@@ -1,4 +1,4 @@
-# Tutorial 11 - Virtual Memory Part 1: Identity Map All The Things!
+# Tutorial 10 - Virtual Memory Part 1: Identity Map All The Things!
 
 ## tl;dr
 
@@ -348,9 +348,9 @@ Minipush 1.0
 ## Diff to previous
 ```diff
 
-diff -uNr 10_privilege_level/src/_arch/aarch64/memory/mmu/translation_table.rs 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs
---- 10_privilege_level/src/_arch/aarch64/memory/mmu/translation_table.rs
-+++ 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs
+diff -uNr 09_privilege_level/src/_arch/aarch64/memory/mmu/translation_table.rs 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs
+--- 09_privilege_level/src/_arch/aarch64/memory/mmu/translation_table.rs
++++ 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs
 @@ -0,0 +1,288 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -641,9 +641,9 @@ diff -uNr 10_privilege_level/src/_arch/aarch64/memory/mmu/translation_table.rs 1
 +    }
 +}
 
-diff -uNr 10_privilege_level/src/_arch/aarch64/memory/mmu.rs 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
---- 10_privilege_level/src/_arch/aarch64/memory/mmu.rs
-+++ 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
+diff -uNr 09_privilege_level/src/_arch/aarch64/memory/mmu.rs 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
+--- 09_privilege_level/src/_arch/aarch64/memory/mmu.rs
++++ 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
 @@ -0,0 +1,164 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -810,9 +810,9 @@ diff -uNr 10_privilege_level/src/_arch/aarch64/memory/mmu.rs 11_virtual_mem_part
 +    }
 +}
 
-diff -uNr 10_privilege_level/src/bsp/raspberrypi/link.ld 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
---- 10_privilege_level/src/bsp/raspberrypi/link.ld
-+++ 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
+diff -uNr 09_privilege_level/src/bsp/raspberrypi/link.ld 10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
+--- 09_privilege_level/src/bsp/raspberrypi/link.ld
++++ 10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
 @@ -26,6 +26,7 @@
      /***********************************************************************************************
      * Code + RO Data + Global Offset Table
@@ -832,9 +832,9 @@ diff -uNr 10_privilege_level/src/bsp/raspberrypi/link.ld 11_virtual_mem_part1_id
      * Data + BSS
      ***********************************************************************************************/
 
-diff -uNr 10_privilege_level/src/bsp/raspberrypi/memory/mmu.rs 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
---- 10_privilege_level/src/bsp/raspberrypi/memory/mmu.rs
-+++ 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
+diff -uNr 09_privilege_level/src/bsp/raspberrypi/memory/mmu.rs 10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
+--- 09_privilege_level/src/bsp/raspberrypi/memory/mmu.rs
++++ 10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
 @@ -0,0 +1,86 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -923,9 +923,9 @@ diff -uNr 10_privilege_level/src/bsp/raspberrypi/memory/mmu.rs 11_virtual_mem_pa
 +    &LAYOUT
 +}
 
-diff -uNr 10_privilege_level/src/bsp/raspberrypi/memory.rs 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs
---- 10_privilege_level/src/bsp/raspberrypi/memory.rs
-+++ 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs
+diff -uNr 09_privilege_level/src/bsp/raspberrypi/memory.rs 10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs
+--- 09_privilege_level/src/bsp/raspberrypi/memory.rs
++++ 10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs
 @@ -4,6 +4,8 @@
 
  //! BSP Memory Management.
@@ -1011,9 +1011,9 @@ diff -uNr 10_privilege_level/src/bsp/raspberrypi/memory.rs 11_virtual_mem_part1_
  //--------------------------------------------------------------------------------------------------
 
 
-diff -uNr 10_privilege_level/src/bsp.rs 11_virtual_mem_part1_identity_mapping/src/bsp.rs
---- 10_privilege_level/src/bsp.rs
-+++ 11_virtual_mem_part1_identity_mapping/src/bsp.rs
+diff -uNr 09_privilege_level/src/bsp.rs 10_virtual_mem_part1_identity_mapping/src/bsp.rs
+--- 09_privilege_level/src/bsp.rs
++++ 10_virtual_mem_part1_identity_mapping/src/bsp.rs
 @@ -4,7 +4,7 @@
 
  //! Conditional reexporting of Board Support Packages.
@@ -1024,9 +1024,9 @@ diff -uNr 10_privilege_level/src/bsp.rs 11_virtual_mem_part1_identity_mapping/sr
  #[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
  mod raspberrypi;
 
-diff -uNr 10_privilege_level/src/main.rs 11_virtual_mem_part1_identity_mapping/src/main.rs
---- 10_privilege_level/src/main.rs
-+++ 11_virtual_mem_part1_identity_mapping/src/main.rs
+diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/src/main.rs
+--- 09_privilege_level/src/main.rs
++++ 10_virtual_mem_part1_identity_mapping/src/main.rs
 @@ -107,7 +107,11 @@
  //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
@@ -1083,9 +1083,9 @@ diff -uNr 10_privilege_level/src/main.rs 11_virtual_mem_part1_identity_mapping/s
 
      // Discard any spurious received characters before going into echo mode.
 
-diff -uNr 10_privilege_level/src/memory/mmu/translation_table.rs 11_virtual_mem_part1_identity_mapping/src/memory/mmu/translation_table.rs
---- 10_privilege_level/src/memory/mmu/translation_table.rs
-+++ 11_virtual_mem_part1_identity_mapping/src/memory/mmu/translation_table.rs
+diff -uNr 09_privilege_level/src/memory/mmu/translation_table.rs 10_virtual_mem_part1_identity_mapping/src/memory/mmu/translation_table.rs
+--- 09_privilege_level/src/memory/mmu/translation_table.rs
++++ 10_virtual_mem_part1_identity_mapping/src/memory/mmu/translation_table.rs
 @@ -0,0 +1,14 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -1102,9 +1102,9 @@ diff -uNr 10_privilege_level/src/memory/mmu/translation_table.rs 11_virtual_mem_
 +//--------------------------------------------------------------------------------------------------
 +pub use arch_translation_table::KernelTranslationTable;
 
-diff -uNr 10_privilege_level/src/memory/mmu.rs 11_virtual_mem_part1_identity_mapping/src/memory/mmu.rs
---- 10_privilege_level/src/memory/mmu.rs
-+++ 11_virtual_mem_part1_identity_mapping/src/memory/mmu.rs
+diff -uNr 09_privilege_level/src/memory/mmu.rs 10_virtual_mem_part1_identity_mapping/src/memory/mmu.rs
+--- 09_privilege_level/src/memory/mmu.rs
++++ 10_virtual_mem_part1_identity_mapping/src/memory/mmu.rs
 @@ -0,0 +1,264 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -1371,9 +1371,9 @@ diff -uNr 10_privilege_level/src/memory/mmu.rs 11_virtual_mem_part1_identity_map
 +    }
 +}
 
-diff -uNr 10_privilege_level/src/memory.rs 11_virtual_mem_part1_identity_mapping/src/memory.rs
---- 10_privilege_level/src/memory.rs
-+++ 11_virtual_mem_part1_identity_mapping/src/memory.rs
+diff -uNr 09_privilege_level/src/memory.rs 10_virtual_mem_part1_identity_mapping/src/memory.rs
+--- 09_privilege_level/src/memory.rs
++++ 10_virtual_mem_part1_identity_mapping/src/memory.rs
 @@ -4,6 +4,8 @@
 
  //! Memory Management.
diff --git a/11_virtual_mem_part1_identity_mapping/build.rs b/10_virtual_mem_part1_identity_mapping/build.rs
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/build.rs
rename to 10_virtual_mem_part1_identity_mapping/build.rs
diff --git a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu.rs
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu.rs
rename to 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu.rs
diff --git a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs
rename to 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs
diff --git a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.s b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.s
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.s
rename to 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.s
diff --git a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs
rename to 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs
diff --git a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception/asynchronous.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception/asynchronous.rs
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception/asynchronous.rs
rename to 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception/asynchronous.rs
diff --git a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
rename to 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
diff --git a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs
rename to 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs
diff --git a/11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs
rename to 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp.rs b/10_virtual_mem_part1_identity_mapping/src/bsp.rs
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/src/bsp.rs
rename to 10_virtual_mem_part1_identity_mapping/src/bsp.rs
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver.rs
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/src/bsp/device_driver.rs
rename to 10_virtual_mem_part1_identity_mapping/src/bsp/device_driver.rs
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm.rs
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm.rs
rename to 10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm.rs
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
rename to 10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
rename to 10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/common.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/common.rs
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/common.rs
rename to 10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/common.rs
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi.rs
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi.rs
rename to 10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi.rs
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/console.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/console.rs
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/console.rs
rename to 10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/console.rs
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/cpu.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/cpu.rs
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/cpu.rs
rename to 10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/cpu.rs
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/driver.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/driver.rs
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/driver.rs
rename to 10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/driver.rs
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
rename to 10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs
rename to 10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs
diff --git a/11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
rename to 10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
diff --git a/11_virtual_mem_part1_identity_mapping/src/console.rs b/10_virtual_mem_part1_identity_mapping/src/console.rs
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/src/console.rs
rename to 10_virtual_mem_part1_identity_mapping/src/console.rs
diff --git a/11_virtual_mem_part1_identity_mapping/src/cpu.rs b/10_virtual_mem_part1_identity_mapping/src/cpu.rs
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/src/cpu.rs
rename to 10_virtual_mem_part1_identity_mapping/src/cpu.rs
diff --git a/11_virtual_mem_part1_identity_mapping/src/cpu/boot.rs b/10_virtual_mem_part1_identity_mapping/src/cpu/boot.rs
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/src/cpu/boot.rs
rename to 10_virtual_mem_part1_identity_mapping/src/cpu/boot.rs
diff --git a/11_virtual_mem_part1_identity_mapping/src/driver.rs b/10_virtual_mem_part1_identity_mapping/src/driver.rs
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/src/driver.rs
rename to 10_virtual_mem_part1_identity_mapping/src/driver.rs
diff --git a/11_virtual_mem_part1_identity_mapping/src/exception.rs b/10_virtual_mem_part1_identity_mapping/src/exception.rs
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/src/exception.rs
rename to 10_virtual_mem_part1_identity_mapping/src/exception.rs
diff --git a/11_virtual_mem_part1_identity_mapping/src/exception/asynchronous.rs b/10_virtual_mem_part1_identity_mapping/src/exception/asynchronous.rs
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/src/exception/asynchronous.rs
rename to 10_virtual_mem_part1_identity_mapping/src/exception/asynchronous.rs
diff --git a/11_virtual_mem_part1_identity_mapping/src/main.rs b/10_virtual_mem_part1_identity_mapping/src/main.rs
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/src/main.rs
rename to 10_virtual_mem_part1_identity_mapping/src/main.rs
diff --git a/11_virtual_mem_part1_identity_mapping/src/memory.rs b/10_virtual_mem_part1_identity_mapping/src/memory.rs
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/src/memory.rs
rename to 10_virtual_mem_part1_identity_mapping/src/memory.rs
diff --git a/11_virtual_mem_part1_identity_mapping/src/memory/mmu.rs b/10_virtual_mem_part1_identity_mapping/src/memory/mmu.rs
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/src/memory/mmu.rs
rename to 10_virtual_mem_part1_identity_mapping/src/memory/mmu.rs
diff --git a/11_virtual_mem_part1_identity_mapping/src/memory/mmu/translation_table.rs b/10_virtual_mem_part1_identity_mapping/src/memory/mmu/translation_table.rs
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/src/memory/mmu/translation_table.rs
rename to 10_virtual_mem_part1_identity_mapping/src/memory/mmu/translation_table.rs
diff --git a/11_virtual_mem_part1_identity_mapping/src/panic_wait.rs b/10_virtual_mem_part1_identity_mapping/src/panic_wait.rs
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/src/panic_wait.rs
rename to 10_virtual_mem_part1_identity_mapping/src/panic_wait.rs
diff --git a/11_virtual_mem_part1_identity_mapping/src/print.rs b/10_virtual_mem_part1_identity_mapping/src/print.rs
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/src/print.rs
rename to 10_virtual_mem_part1_identity_mapping/src/print.rs
diff --git a/11_virtual_mem_part1_identity_mapping/src/runtime_init.rs b/10_virtual_mem_part1_identity_mapping/src/runtime_init.rs
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/src/runtime_init.rs
rename to 10_virtual_mem_part1_identity_mapping/src/runtime_init.rs
diff --git a/11_virtual_mem_part1_identity_mapping/src/synchronization.rs b/10_virtual_mem_part1_identity_mapping/src/synchronization.rs
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/src/synchronization.rs
rename to 10_virtual_mem_part1_identity_mapping/src/synchronization.rs
diff --git a/11_virtual_mem_part1_identity_mapping/src/time.rs b/10_virtual_mem_part1_identity_mapping/src/time.rs
similarity index 100%
rename from 11_virtual_mem_part1_identity_mapping/src/time.rs
rename to 10_virtual_mem_part1_identity_mapping/src/time.rs
diff --git a/12_exceptions_part1_groundwork/.vscode/settings.json b/11_exceptions_part1_groundwork/.vscode/settings.json
similarity index 100%
rename from 12_exceptions_part1_groundwork/.vscode/settings.json
rename to 11_exceptions_part1_groundwork/.vscode/settings.json
diff --git a/12_exceptions_part1_groundwork/Cargo.lock b/11_exceptions_part1_groundwork/Cargo.lock
similarity index 100%
rename from 12_exceptions_part1_groundwork/Cargo.lock
rename to 11_exceptions_part1_groundwork/Cargo.lock
diff --git a/12_exceptions_part1_groundwork/Cargo.toml b/11_exceptions_part1_groundwork/Cargo.toml
similarity index 100%
rename from 12_exceptions_part1_groundwork/Cargo.toml
rename to 11_exceptions_part1_groundwork/Cargo.toml
diff --git a/12_exceptions_part1_groundwork/Makefile b/11_exceptions_part1_groundwork/Makefile
similarity index 100%
rename from 12_exceptions_part1_groundwork/Makefile
rename to 11_exceptions_part1_groundwork/Makefile
diff --git a/12_exceptions_part1_groundwork/README.md b/11_exceptions_part1_groundwork/README.md
similarity index 96%
rename from 12_exceptions_part1_groundwork/README.md
rename to 11_exceptions_part1_groundwork/README.md
index cc4b043ff..878ea4362 100644
--- a/12_exceptions_part1_groundwork/README.md
+++ b/11_exceptions_part1_groundwork/README.md
@@ -1,4 +1,4 @@
-# Tutorial 12 - Exceptions Part 1: Groundwork
+# Tutorial 11 - Exceptions Part 1: Groundwork
 
 ## tl;dr
 
@@ -476,9 +476,9 @@ General purpose register:
 ## Diff to previous
 ```diff
 
-diff -uNr 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs 12_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
---- 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs
-+++ 12_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
+diff -uNr 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs 11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
+--- 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs
++++ 11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
 @@ -11,7 +11,224 @@
  //!
  //! crate::exception::arch_exception
@@ -730,9 +730,9 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs 1
 +    barrier::isb(barrier::SY);
 +}
 
-diff -uNr 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.s 12_exceptions_part1_groundwork/src/_arch/aarch64/exception.s
---- 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.s
-+++ 12_exceptions_part1_groundwork/src/_arch/aarch64/exception.s
+diff -uNr 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.s 11_exceptions_part1_groundwork/src/_arch/aarch64/exception.s
+--- 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.s
++++ 11_exceptions_part1_groundwork/src/_arch/aarch64/exception.s
 @@ -0,0 +1,148 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -883,9 +883,9 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.s 12
 +.size	__exception_restore_context, . - __exception_restore_context
 +.type	__exception_restore_context, function
 
-diff -uNr 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs 12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
---- 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
-+++ 12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
+diff -uNr 10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs 11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
+--- 10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
++++ 11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
 @@ -15,7 +15,7 @@
  /// The kernel's address space defined by this BSP.
  pub type KernelAddrSpace = AddressSpace<{ memory_map::END_INCLUSIVE + 1 }>;
@@ -925,9 +925,9 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.r
      RangeInclusive::new(memory_map::mmio::START, memory_map::mmio::END_INCLUSIVE)
  }
 
-diff -uNr 11_virtual_mem_part1_identity_mapping/src/bsp.rs 12_exceptions_part1_groundwork/src/bsp.rs
---- 11_virtual_mem_part1_identity_mapping/src/bsp.rs
-+++ 12_exceptions_part1_groundwork/src/bsp.rs
+diff -uNr 10_virtual_mem_part1_identity_mapping/src/bsp.rs 11_exceptions_part1_groundwork/src/bsp.rs
+--- 10_virtual_mem_part1_identity_mapping/src/bsp.rs
++++ 11_exceptions_part1_groundwork/src/bsp.rs
 @@ -4,7 +4,7 @@
 
  //! Conditional reexporting of Board Support Packages.
@@ -938,9 +938,9 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/bsp.rs 12_exceptions_part1_g
  #[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
  mod raspberrypi;
 
-diff -uNr 11_virtual_mem_part1_identity_mapping/src/exception.rs 12_exceptions_part1_groundwork/src/exception.rs
---- 11_virtual_mem_part1_identity_mapping/src/exception.rs
-+++ 12_exceptions_part1_groundwork/src/exception.rs
+diff -uNr 10_virtual_mem_part1_identity_mapping/src/exception.rs 11_exceptions_part1_groundwork/src/exception.rs
+--- 10_virtual_mem_part1_identity_mapping/src/exception.rs
++++ 11_exceptions_part1_groundwork/src/exception.rs
 @@ -13,7 +13,7 @@
  //--------------------------------------------------------------------------------------------------
  // Architectural Public Reexports
@@ -951,9 +951,9 @@ diff -uNr 11_virtual_mem_part1_identity_mapping/src/exception.rs 12_exceptions_p
  //--------------------------------------------------------------------------------------------------
  // Public Definitions
 
-diff -uNr 11_virtual_mem_part1_identity_mapping/src/main.rs 12_exceptions_part1_groundwork/src/main.rs
---- 11_virtual_mem_part1_identity_mapping/src/main.rs
-+++ 12_exceptions_part1_groundwork/src/main.rs
+diff -uNr 10_virtual_mem_part1_identity_mapping/src/main.rs 11_exceptions_part1_groundwork/src/main.rs
+--- 10_virtual_mem_part1_identity_mapping/src/main.rs
++++ 11_exceptions_part1_groundwork/src/main.rs
 @@ -144,6 +144,8 @@
      use driver::interface::DriverManager;
      use memory::mmu::interface::MMU;
diff --git a/12_exceptions_part1_groundwork/build.rs b/11_exceptions_part1_groundwork/build.rs
similarity index 100%
rename from 12_exceptions_part1_groundwork/build.rs
rename to 11_exceptions_part1_groundwork/build.rs
diff --git a/12_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs
similarity index 100%
rename from 12_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs
rename to 11_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs
diff --git a/12_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs
similarity index 100%
rename from 12_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs
rename to 11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs
diff --git a/12_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.s b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.s
similarity index 100%
rename from 12_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.s
rename to 11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.s
diff --git a/12_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
similarity index 100%
rename from 12_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
rename to 11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
diff --git a/12_exceptions_part1_groundwork/src/_arch/aarch64/exception.s b/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.s
similarity index 100%
rename from 12_exceptions_part1_groundwork/src/_arch/aarch64/exception.s
rename to 11_exceptions_part1_groundwork/src/_arch/aarch64/exception.s
diff --git a/12_exceptions_part1_groundwork/src/_arch/aarch64/exception/asynchronous.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/exception/asynchronous.rs
similarity index 100%
rename from 12_exceptions_part1_groundwork/src/_arch/aarch64/exception/asynchronous.rs
rename to 11_exceptions_part1_groundwork/src/_arch/aarch64/exception/asynchronous.rs
diff --git a/12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
similarity index 100%
rename from 12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
rename to 11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
diff --git a/12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs
similarity index 100%
rename from 12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs
rename to 11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs
diff --git a/12_exceptions_part1_groundwork/src/_arch/aarch64/time.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/time.rs
similarity index 100%
rename from 12_exceptions_part1_groundwork/src/_arch/aarch64/time.rs
rename to 11_exceptions_part1_groundwork/src/_arch/aarch64/time.rs
diff --git a/12_exceptions_part1_groundwork/src/bsp.rs b/11_exceptions_part1_groundwork/src/bsp.rs
similarity index 100%
rename from 12_exceptions_part1_groundwork/src/bsp.rs
rename to 11_exceptions_part1_groundwork/src/bsp.rs
diff --git a/12_exceptions_part1_groundwork/src/bsp/device_driver.rs b/11_exceptions_part1_groundwork/src/bsp/device_driver.rs
similarity index 100%
rename from 12_exceptions_part1_groundwork/src/bsp/device_driver.rs
rename to 11_exceptions_part1_groundwork/src/bsp/device_driver.rs
diff --git a/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm.rs b/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm.rs
similarity index 100%
rename from 12_exceptions_part1_groundwork/src/bsp/device_driver/bcm.rs
rename to 11_exceptions_part1_groundwork/src/bsp/device_driver/bcm.rs
diff --git a/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
similarity index 100%
rename from 12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
rename to 11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
diff --git a/12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
similarity index 100%
rename from 12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
rename to 11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
diff --git a/12_exceptions_part1_groundwork/src/bsp/device_driver/common.rs b/11_exceptions_part1_groundwork/src/bsp/device_driver/common.rs
similarity index 100%
rename from 12_exceptions_part1_groundwork/src/bsp/device_driver/common.rs
rename to 11_exceptions_part1_groundwork/src/bsp/device_driver/common.rs
diff --git a/12_exceptions_part1_groundwork/src/bsp/raspberrypi.rs b/11_exceptions_part1_groundwork/src/bsp/raspberrypi.rs
similarity index 100%
rename from 12_exceptions_part1_groundwork/src/bsp/raspberrypi.rs
rename to 11_exceptions_part1_groundwork/src/bsp/raspberrypi.rs
diff --git a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/console.rs b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/console.rs
similarity index 100%
rename from 12_exceptions_part1_groundwork/src/bsp/raspberrypi/console.rs
rename to 11_exceptions_part1_groundwork/src/bsp/raspberrypi/console.rs
diff --git a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/cpu.rs b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/cpu.rs
similarity index 100%
rename from 12_exceptions_part1_groundwork/src/bsp/raspberrypi/cpu.rs
rename to 11_exceptions_part1_groundwork/src/bsp/raspberrypi/cpu.rs
diff --git a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/driver.rs b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/driver.rs
similarity index 100%
rename from 12_exceptions_part1_groundwork/src/bsp/raspberrypi/driver.rs
rename to 11_exceptions_part1_groundwork/src/bsp/raspberrypi/driver.rs
diff --git a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/link.ld b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/link.ld
similarity index 100%
rename from 12_exceptions_part1_groundwork/src/bsp/raspberrypi/link.ld
rename to 11_exceptions_part1_groundwork/src/bsp/raspberrypi/link.ld
diff --git a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory.rs b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory.rs
similarity index 100%
rename from 12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory.rs
rename to 11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory.rs
diff --git a/12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
similarity index 100%
rename from 12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
rename to 11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
diff --git a/12_exceptions_part1_groundwork/src/console.rs b/11_exceptions_part1_groundwork/src/console.rs
similarity index 100%
rename from 12_exceptions_part1_groundwork/src/console.rs
rename to 11_exceptions_part1_groundwork/src/console.rs
diff --git a/12_exceptions_part1_groundwork/src/cpu.rs b/11_exceptions_part1_groundwork/src/cpu.rs
similarity index 100%
rename from 12_exceptions_part1_groundwork/src/cpu.rs
rename to 11_exceptions_part1_groundwork/src/cpu.rs
diff --git a/12_exceptions_part1_groundwork/src/cpu/boot.rs b/11_exceptions_part1_groundwork/src/cpu/boot.rs
similarity index 100%
rename from 12_exceptions_part1_groundwork/src/cpu/boot.rs
rename to 11_exceptions_part1_groundwork/src/cpu/boot.rs
diff --git a/12_exceptions_part1_groundwork/src/driver.rs b/11_exceptions_part1_groundwork/src/driver.rs
similarity index 100%
rename from 12_exceptions_part1_groundwork/src/driver.rs
rename to 11_exceptions_part1_groundwork/src/driver.rs
diff --git a/12_exceptions_part1_groundwork/src/exception.rs b/11_exceptions_part1_groundwork/src/exception.rs
similarity index 100%
rename from 12_exceptions_part1_groundwork/src/exception.rs
rename to 11_exceptions_part1_groundwork/src/exception.rs
diff --git a/12_exceptions_part1_groundwork/src/exception/asynchronous.rs b/11_exceptions_part1_groundwork/src/exception/asynchronous.rs
similarity index 100%
rename from 12_exceptions_part1_groundwork/src/exception/asynchronous.rs
rename to 11_exceptions_part1_groundwork/src/exception/asynchronous.rs
diff --git a/12_exceptions_part1_groundwork/src/main.rs b/11_exceptions_part1_groundwork/src/main.rs
similarity index 100%
rename from 12_exceptions_part1_groundwork/src/main.rs
rename to 11_exceptions_part1_groundwork/src/main.rs
diff --git a/12_exceptions_part1_groundwork/src/memory.rs b/11_exceptions_part1_groundwork/src/memory.rs
similarity index 100%
rename from 12_exceptions_part1_groundwork/src/memory.rs
rename to 11_exceptions_part1_groundwork/src/memory.rs
diff --git a/12_exceptions_part1_groundwork/src/memory/mmu.rs b/11_exceptions_part1_groundwork/src/memory/mmu.rs
similarity index 100%
rename from 12_exceptions_part1_groundwork/src/memory/mmu.rs
rename to 11_exceptions_part1_groundwork/src/memory/mmu.rs
diff --git a/12_exceptions_part1_groundwork/src/memory/mmu/translation_table.rs b/11_exceptions_part1_groundwork/src/memory/mmu/translation_table.rs
similarity index 100%
rename from 12_exceptions_part1_groundwork/src/memory/mmu/translation_table.rs
rename to 11_exceptions_part1_groundwork/src/memory/mmu/translation_table.rs
diff --git a/12_exceptions_part1_groundwork/src/panic_wait.rs b/11_exceptions_part1_groundwork/src/panic_wait.rs
similarity index 100%
rename from 12_exceptions_part1_groundwork/src/panic_wait.rs
rename to 11_exceptions_part1_groundwork/src/panic_wait.rs
diff --git a/12_exceptions_part1_groundwork/src/print.rs b/11_exceptions_part1_groundwork/src/print.rs
similarity index 100%
rename from 12_exceptions_part1_groundwork/src/print.rs
rename to 11_exceptions_part1_groundwork/src/print.rs
diff --git a/12_exceptions_part1_groundwork/src/runtime_init.rs b/11_exceptions_part1_groundwork/src/runtime_init.rs
similarity index 100%
rename from 12_exceptions_part1_groundwork/src/runtime_init.rs
rename to 11_exceptions_part1_groundwork/src/runtime_init.rs
diff --git a/12_exceptions_part1_groundwork/src/synchronization.rs b/11_exceptions_part1_groundwork/src/synchronization.rs
similarity index 100%
rename from 12_exceptions_part1_groundwork/src/synchronization.rs
rename to 11_exceptions_part1_groundwork/src/synchronization.rs
diff --git a/12_exceptions_part1_groundwork/src/time.rs b/11_exceptions_part1_groundwork/src/time.rs
similarity index 100%
rename from 12_exceptions_part1_groundwork/src/time.rs
rename to 11_exceptions_part1_groundwork/src/time.rs
diff --git a/13_integrated_testing/.cargo/config.toml b/12_integrated_testing/.cargo/config.toml
similarity index 100%
rename from 13_integrated_testing/.cargo/config.toml
rename to 12_integrated_testing/.cargo/config.toml
diff --git a/13_integrated_testing/.vscode/settings.json b/12_integrated_testing/.vscode/settings.json
similarity index 100%
rename from 13_integrated_testing/.vscode/settings.json
rename to 12_integrated_testing/.vscode/settings.json
diff --git a/13_integrated_testing/Cargo.lock b/12_integrated_testing/Cargo.lock
similarity index 100%
rename from 13_integrated_testing/Cargo.lock
rename to 12_integrated_testing/Cargo.lock
diff --git a/13_integrated_testing/Cargo.toml b/12_integrated_testing/Cargo.toml
similarity index 100%
rename from 13_integrated_testing/Cargo.toml
rename to 12_integrated_testing/Cargo.toml
diff --git a/13_integrated_testing/Makefile b/12_integrated_testing/Makefile
similarity index 100%
rename from 13_integrated_testing/Makefile
rename to 12_integrated_testing/Makefile
diff --git a/13_integrated_testing/README.md b/12_integrated_testing/README.md
similarity index 92%
rename from 13_integrated_testing/README.md
rename to 12_integrated_testing/README.md
index 046607ba7..6b76c1902 100644
--- a/13_integrated_testing/README.md
+++ b/12_integrated_testing/README.md
@@ -1,4 +1,4 @@
-# Tutorial 13 - Integrated Testing
+# Tutorial 12 - Integrated Testing
 
 ## tl;dr
 
@@ -404,7 +404,7 @@ provided to it by `cargo`, and finally compiles a `docker` command to execute th
 reference, here it is fully resolved for an `RPi3 BSP`:
 
 ```bash
-docker run -i --rm -v /opt/rust-raspberrypi-OS-tutorials/13_integrated_testing:/work/tutorial -w /work/tutorial rustembedded/osdev-utils ruby tests/runner.rb qemu-system-aarch64 -M raspi3 -serial stdio -display none -semihosting -kernel $TEST_BINARY
+docker run -i --rm -v /opt/rust-raspberrypi-OS-tutorials/12_integrated_testing:/work/tutorial -w /work/tutorial rustembedded/osdev-utils ruby tests/runner.rb qemu-system-aarch64 -M raspi3 -serial stdio -display none -semihosting -kernel $TEST_BINARY
 ```
 
 We're still not done with all the redirections. Spotted the `ruby tests/runner.rb` part that gets
@@ -809,16 +809,16 @@ RUSTFLAGS="-C link-arg=-Tsrc/bsp/raspberrypi/link.ld -C target-cpu=cortex-a53 -D
 ## Diff to previous
 ```diff
 
-diff -uNr 12_exceptions_part1_groundwork/.cargo/config.toml 13_integrated_testing/.cargo/config.toml
---- 12_exceptions_part1_groundwork/.cargo/config.toml
-+++ 13_integrated_testing/.cargo/config.toml
+diff -uNr 11_exceptions_part1_groundwork/.cargo/config.toml 12_integrated_testing/.cargo/config.toml
+--- 11_exceptions_part1_groundwork/.cargo/config.toml
++++ 12_integrated_testing/.cargo/config.toml
 @@ -0,0 +1,2 @@
 +[target.'cfg(target_os = "none")']
 +runner = "target/kernel_test_runner.sh"
 
-diff -uNr 12_exceptions_part1_groundwork/Cargo.toml 13_integrated_testing/Cargo.toml
---- 12_exceptions_part1_groundwork/Cargo.toml
-+++ 13_integrated_testing/Cargo.toml
+diff -uNr 11_exceptions_part1_groundwork/Cargo.toml 12_integrated_testing/Cargo.toml
+--- 11_exceptions_part1_groundwork/Cargo.toml
++++ 12_integrated_testing/Cargo.toml
 @@ -11,17 +11,45 @@
  default = []
  bsp_rpi3 = ["register"]
@@ -867,9 +867,9 @@ diff -uNr 12_exceptions_part1_groundwork/Cargo.toml 13_integrated_testing/Cargo.
 +name = "02_exception_sync_page_fault"
 +harness = false
 
-diff -uNr 12_exceptions_part1_groundwork/Makefile 13_integrated_testing/Makefile
---- 12_exceptions_part1_groundwork/Makefile
-+++ 13_integrated_testing/Makefile
+diff -uNr 11_exceptions_part1_groundwork/Makefile 12_integrated_testing/Makefile
+--- 11_exceptions_part1_groundwork/Makefile
++++ 12_integrated_testing/Makefile
 @@ -20,6 +20,7 @@
      QEMU_BINARY       = qemu-system-aarch64
      QEMU_MACHINE_TYPE = raspi3
@@ -963,9 +963,9 @@ diff -uNr 12_exceptions_part1_groundwork/Makefile 13_integrated_testing/Makefile
 
  chainboot: $(KERNEL_BIN)
 
-diff -uNr 12_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs 13_integrated_testing/src/_arch/aarch64/cpu.rs
---- 12_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs
-+++ 13_integrated_testing/src/_arch/aarch64/cpu.rs
+diff -uNr 11_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs 12_integrated_testing/src/_arch/aarch64/cpu.rs
+--- 11_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs
++++ 12_integrated_testing/src/_arch/aarch64/cpu.rs
 @@ -26,3 +26,24 @@
          asm::wfe()
      }
@@ -992,9 +992,9 @@ diff -uNr 12_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs 13_integrated_
 +    QEMU_EXIT_HANDLE.exit_success()
 +}
 
-diff -uNr 12_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs 13_integrated_testing/src/_arch/aarch64/exception.rs
---- 12_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
-+++ 13_integrated_testing/src/_arch/aarch64/exception.rs
+diff -uNr 11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs 12_integrated_testing/src/_arch/aarch64/exception.rs
+--- 11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
++++ 12_integrated_testing/src/_arch/aarch64/exception.rs
 @@ -12,7 +12,7 @@
  //! crate::exception::arch_exception
 
@@ -1022,9 +1022,9 @@ diff -uNr 12_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs 13_integ
  }
 
 
-diff -uNr 12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs 13_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs
---- 12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs
-+++ 13_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs
+diff -uNr 11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs 12_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs
+--- 11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs
++++ 12_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs
 @@ -286,3 +286,31 @@
          self.lvl2.phys_start_addr_u64()
      }
@@ -1058,9 +1058,9 @@ diff -uNr 12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translatio
 +    }
 +}
 
-diff -uNr 12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs 13_integrated_testing/src/_arch/aarch64/memory/mmu.rs
---- 12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
-+++ 13_integrated_testing/src/_arch/aarch64/memory/mmu.rs
+diff -uNr 11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs 12_integrated_testing/src/_arch/aarch64/memory/mmu.rs
+--- 11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
++++ 12_integrated_testing/src/_arch/aarch64/memory/mmu.rs
 @@ -162,3 +162,22 @@
          SCTLR_EL1.matches_all(SCTLR_EL1::M::Enable)
      }
@@ -1085,9 +1085,9 @@ diff -uNr 12_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs 13_inte
 +    }
 +}
 
-diff -uNr 12_exceptions_part1_groundwork/src/bsp/raspberrypi/console.rs 13_integrated_testing/src/bsp/raspberrypi/console.rs
---- 12_exceptions_part1_groundwork/src/bsp/raspberrypi/console.rs
-+++ 13_integrated_testing/src/bsp/raspberrypi/console.rs
+diff -uNr 11_exceptions_part1_groundwork/src/bsp/raspberrypi/console.rs 12_integrated_testing/src/bsp/raspberrypi/console.rs
+--- 11_exceptions_part1_groundwork/src/bsp/raspberrypi/console.rs
++++ 12_integrated_testing/src/bsp/raspberrypi/console.rs
 @@ -35,3 +35,13 @@
  pub fn console() -> &'static impl console::interface::All {
      &super::PL011_UART
@@ -1103,9 +1103,9 @@ diff -uNr 12_exceptions_part1_groundwork/src/bsp/raspberrypi/console.rs 13_integ
 +/// For the RPi, nothing needs to be done.
 +pub fn qemu_bring_up_console() {}
 
-diff -uNr 12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs 13_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs
---- 12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
-+++ 13_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs
+diff -uNr 11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs 12_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs
+--- 11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
++++ 12_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs
 @@ -69,3 +69,46 @@
  pub fn virt_mem_layout() -> &'static KernelVirtualLayout<NUM_MEM_RANGES> {
      &LAYOUT
@@ -1154,9 +1154,9 @@ diff -uNr 12_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs 13_in
 +    }
 +}
 
-diff -uNr 12_exceptions_part1_groundwork/src/cpu.rs 13_integrated_testing/src/cpu.rs
---- 12_exceptions_part1_groundwork/src/cpu.rs
-+++ 13_integrated_testing/src/cpu.rs
+diff -uNr 11_exceptions_part1_groundwork/src/cpu.rs 12_integrated_testing/src/cpu.rs
+--- 11_exceptions_part1_groundwork/src/cpu.rs
++++ 12_integrated_testing/src/cpu.rs
 @@ -14,3 +14,6 @@
  // Architectural Public Reexports
  //--------------------------------------------------------------------------------------------------
@@ -1165,9 +1165,9 @@ diff -uNr 12_exceptions_part1_groundwork/src/cpu.rs 13_integrated_testing/src/cp
 +#[cfg(feature = "test_build")]
 +pub use arch_cpu::{qemu_exit_failure, qemu_exit_success};
 
-diff -uNr 12_exceptions_part1_groundwork/src/exception.rs 13_integrated_testing/src/exception.rs
---- 12_exceptions_part1_groundwork/src/exception.rs
-+++ 13_integrated_testing/src/exception.rs
+diff -uNr 11_exceptions_part1_groundwork/src/exception.rs 12_integrated_testing/src/exception.rs
+--- 11_exceptions_part1_groundwork/src/exception.rs
++++ 12_integrated_testing/src/exception.rs
 @@ -28,3 +28,21 @@
      Hypervisor,
      Unknown,
@@ -1191,9 +1191,9 @@ diff -uNr 12_exceptions_part1_groundwork/src/exception.rs 13_integrated_testing/
 +    }
 +}
 
-diff -uNr 12_exceptions_part1_groundwork/src/lib.rs 13_integrated_testing/src/lib.rs
---- 12_exceptions_part1_groundwork/src/lib.rs
-+++ 13_integrated_testing/src/lib.rs
+diff -uNr 11_exceptions_part1_groundwork/src/lib.rs 12_integrated_testing/src/lib.rs
+--- 11_exceptions_part1_groundwork/src/lib.rs
++++ 12_integrated_testing/src/lib.rs
 @@ -0,0 +1,171 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -1367,9 +1367,9 @@ diff -uNr 12_exceptions_part1_groundwork/src/lib.rs 13_integrated_testing/src/li
 +    cpu::qemu_exit_success()
 +}
 
-diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/main.rs
---- 12_exceptions_part1_groundwork/src/main.rs
-+++ 13_integrated_testing/src/main.rs
+diff -uNr 11_exceptions_part1_groundwork/src/main.rs 12_integrated_testing/src/main.rs
+--- 11_exceptions_part1_groundwork/src/main.rs
++++ 12_integrated_testing/src/main.rs
 @@ -6,130 +6,12 @@
  #![doc(html_logo_url = "https://git.io/JeGIp")]
 
@@ -1554,9 +1554,9 @@ diff -uNr 12_exceptions_part1_groundwork/src/main.rs 13_integrated_testing/src/m
 
      // Discard any spurious received characters before going into echo mode.
 
-diff -uNr 12_exceptions_part1_groundwork/src/memory/mmu.rs 13_integrated_testing/src/memory/mmu.rs
---- 12_exceptions_part1_groundwork/src/memory/mmu.rs
-+++ 13_integrated_testing/src/memory/mmu.rs
+diff -uNr 11_exceptions_part1_groundwork/src/memory/mmu.rs 12_integrated_testing/src/memory/mmu.rs
+--- 11_exceptions_part1_groundwork/src/memory/mmu.rs
++++ 12_integrated_testing/src/memory/mmu.rs
 @@ -66,7 +66,6 @@
 
  /// Architecture agnostic translation types.
@@ -1576,9 +1576,9 @@ diff -uNr 12_exceptions_part1_groundwork/src/memory/mmu.rs 13_integrated_testing
 +    }
  }
 
-diff -uNr 12_exceptions_part1_groundwork/src/memory.rs 13_integrated_testing/src/memory.rs
---- 12_exceptions_part1_groundwork/src/memory.rs
-+++ 13_integrated_testing/src/memory.rs
+diff -uNr 11_exceptions_part1_groundwork/src/memory.rs 12_integrated_testing/src/memory.rs
+--- 11_exceptions_part1_groundwork/src/memory.rs
++++ 12_integrated_testing/src/memory.rs
 @@ -30,3 +30,40 @@
          ptr = ptr.offset(1);
      }
@@ -1621,9 +1621,9 @@ diff -uNr 12_exceptions_part1_groundwork/src/memory.rs 13_integrated_testing/src
 +    }
 +}
 
-diff -uNr 12_exceptions_part1_groundwork/src/panic_wait.rs 13_integrated_testing/src/panic_wait.rs
---- 12_exceptions_part1_groundwork/src/panic_wait.rs
-+++ 13_integrated_testing/src/panic_wait.rs
+diff -uNr 11_exceptions_part1_groundwork/src/panic_wait.rs 12_integrated_testing/src/panic_wait.rs
+--- 11_exceptions_part1_groundwork/src/panic_wait.rs
++++ 12_integrated_testing/src/panic_wait.rs
 @@ -17,6 +17,23 @@
      unsafe { bsp::console::panic_console_out().write_fmt(args).unwrap() };
  }
@@ -1656,9 +1656,9 @@ diff -uNr 12_exceptions_part1_groundwork/src/panic_wait.rs 13_integrated_testing
 +    _panic_exit()
  }
 
-diff -uNr 12_exceptions_part1_groundwork/src/runtime_init.rs 13_integrated_testing/src/runtime_init.rs
---- 12_exceptions_part1_groundwork/src/runtime_init.rs
-+++ 13_integrated_testing/src/runtime_init.rs
+diff -uNr 11_exceptions_part1_groundwork/src/runtime_init.rs 12_integrated_testing/src/runtime_init.rs
+--- 11_exceptions_part1_groundwork/src/runtime_init.rs
++++ 12_integrated_testing/src/runtime_init.rs
 @@ -31,7 +31,10 @@
  ///
  /// - Only a single core must be active and running this function.
@@ -1673,9 +1673,9 @@ diff -uNr 12_exceptions_part1_groundwork/src/runtime_init.rs 13_integrated_testi
 +    kernel_init()
  }
 
-diff -uNr 12_exceptions_part1_groundwork/test-macros/Cargo.toml 13_integrated_testing/test-macros/Cargo.toml
---- 12_exceptions_part1_groundwork/test-macros/Cargo.toml
-+++ 13_integrated_testing/test-macros/Cargo.toml
+diff -uNr 11_exceptions_part1_groundwork/test-macros/Cargo.toml 12_integrated_testing/test-macros/Cargo.toml
+--- 11_exceptions_part1_groundwork/test-macros/Cargo.toml
++++ 12_integrated_testing/test-macros/Cargo.toml
 @@ -0,0 +1,14 @@
 +[package]
 +name = "test-macros"
@@ -1692,9 +1692,9 @@ diff -uNr 12_exceptions_part1_groundwork/test-macros/Cargo.toml 13_integrated_te
 +syn = { version = "1.x", features = ["full"] }
 +test-types = { path = "../test-types" }
 
-diff -uNr 12_exceptions_part1_groundwork/test-macros/src/lib.rs 13_integrated_testing/test-macros/src/lib.rs
---- 12_exceptions_part1_groundwork/test-macros/src/lib.rs
-+++ 13_integrated_testing/test-macros/src/lib.rs
+diff -uNr 11_exceptions_part1_groundwork/test-macros/src/lib.rs 12_integrated_testing/test-macros/src/lib.rs
+--- 11_exceptions_part1_groundwork/test-macros/src/lib.rs
++++ 12_integrated_testing/test-macros/src/lib.rs
 @@ -0,0 +1,29 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -1726,9 +1726,9 @@ diff -uNr 12_exceptions_part1_groundwork/test-macros/src/lib.rs 13_integrated_te
 +    .into()
 +}
 
-diff -uNr 12_exceptions_part1_groundwork/tests/00_console_sanity.rb 13_integrated_testing/tests/00_console_sanity.rb
---- 12_exceptions_part1_groundwork/tests/00_console_sanity.rb
-+++ 13_integrated_testing/tests/00_console_sanity.rb
+diff -uNr 11_exceptions_part1_groundwork/tests/00_console_sanity.rb 12_integrated_testing/tests/00_console_sanity.rb
+--- 11_exceptions_part1_groundwork/tests/00_console_sanity.rb
++++ 12_integrated_testing/tests/00_console_sanity.rb
 @@ -0,0 +1,50 @@
 +# frozen_string_literal: true
 +
@@ -1781,9 +1781,9 @@ diff -uNr 12_exceptions_part1_groundwork/tests/00_console_sanity.rb 13_integrate
 +    [TxRxHandshake.new, TxStatistics.new, RxStatistics.new]
 +end
 
-diff -uNr 12_exceptions_part1_groundwork/tests/00_console_sanity.rs 13_integrated_testing/tests/00_console_sanity.rs
---- 12_exceptions_part1_groundwork/tests/00_console_sanity.rs
-+++ 13_integrated_testing/tests/00_console_sanity.rs
+diff -uNr 11_exceptions_part1_groundwork/tests/00_console_sanity.rs 12_integrated_testing/tests/00_console_sanity.rs
+--- 11_exceptions_part1_groundwork/tests/00_console_sanity.rs
++++ 12_integrated_testing/tests/00_console_sanity.rs
 @@ -0,0 +1,35 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -1821,9 +1821,9 @@ diff -uNr 12_exceptions_part1_groundwork/tests/00_console_sanity.rs 13_integrate
 +    cpu::wait_forever()
 +}
 
-diff -uNr 12_exceptions_part1_groundwork/tests/01_timer_sanity.rs 13_integrated_testing/tests/01_timer_sanity.rs
---- 12_exceptions_part1_groundwork/tests/01_timer_sanity.rs
-+++ 13_integrated_testing/tests/01_timer_sanity.rs
+diff -uNr 11_exceptions_part1_groundwork/tests/01_timer_sanity.rs 12_integrated_testing/tests/01_timer_sanity.rs
+--- 11_exceptions_part1_groundwork/tests/01_timer_sanity.rs
++++ 12_integrated_testing/tests/01_timer_sanity.rs
 @@ -0,0 +1,49 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -1875,9 +1875,9 @@ diff -uNr 12_exceptions_part1_groundwork/tests/01_timer_sanity.rs 13_integrated_
 +    assert_eq!((t2 - t1).as_secs(), 1)
 +}
 
-diff -uNr 12_exceptions_part1_groundwork/tests/02_exception_sync_page_fault.rs 13_integrated_testing/tests/02_exception_sync_page_fault.rs
---- 12_exceptions_part1_groundwork/tests/02_exception_sync_page_fault.rs
-+++ 13_integrated_testing/tests/02_exception_sync_page_fault.rs
+diff -uNr 11_exceptions_part1_groundwork/tests/02_exception_sync_page_fault.rs 12_integrated_testing/tests/02_exception_sync_page_fault.rs
+--- 11_exceptions_part1_groundwork/tests/02_exception_sync_page_fault.rs
++++ 12_integrated_testing/tests/02_exception_sync_page_fault.rs
 @@ -0,0 +1,43 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -1923,9 +1923,9 @@ diff -uNr 12_exceptions_part1_groundwork/tests/02_exception_sync_page_fault.rs 1
 +    cpu::qemu_exit_failure()
 +}
 
-diff -uNr 12_exceptions_part1_groundwork/tests/panic_exit_success/mod.rs 13_integrated_testing/tests/panic_exit_success/mod.rs
---- 12_exceptions_part1_groundwork/tests/panic_exit_success/mod.rs
-+++ 13_integrated_testing/tests/panic_exit_success/mod.rs
+diff -uNr 11_exceptions_part1_groundwork/tests/panic_exit_success/mod.rs 12_integrated_testing/tests/panic_exit_success/mod.rs
+--- 11_exceptions_part1_groundwork/tests/panic_exit_success/mod.rs
++++ 12_integrated_testing/tests/panic_exit_success/mod.rs
 @@ -0,0 +1,9 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -1937,9 +1937,9 @@ diff -uNr 12_exceptions_part1_groundwork/tests/panic_exit_success/mod.rs 13_inte
 +    libkernel::cpu::qemu_exit_success()
 +}
 
-diff -uNr 12_exceptions_part1_groundwork/tests/runner.rb 13_integrated_testing/tests/runner.rb
---- 12_exceptions_part1_groundwork/tests/runner.rb
-+++ 13_integrated_testing/tests/runner.rb
+diff -uNr 11_exceptions_part1_groundwork/tests/runner.rb 12_integrated_testing/tests/runner.rb
+--- 11_exceptions_part1_groundwork/tests/runner.rb
++++ 12_integrated_testing/tests/runner.rb
 @@ -0,0 +1,143 @@
 +#!/usr/bin/env ruby
 +# frozen_string_literal: true
@@ -2085,9 +2085,9 @@ diff -uNr 12_exceptions_part1_groundwork/tests/runner.rb 13_integrated_testing/t
 +
 +test_runner.exec
 
-diff -uNr 12_exceptions_part1_groundwork/test-types/Cargo.toml 13_integrated_testing/test-types/Cargo.toml
---- 12_exceptions_part1_groundwork/test-types/Cargo.toml
-+++ 13_integrated_testing/test-types/Cargo.toml
+diff -uNr 11_exceptions_part1_groundwork/test-types/Cargo.toml 12_integrated_testing/test-types/Cargo.toml
+--- 11_exceptions_part1_groundwork/test-types/Cargo.toml
++++ 12_integrated_testing/test-types/Cargo.toml
 @@ -0,0 +1,5 @@
 +[package]
 +name = "test-types"
@@ -2095,9 +2095,9 @@ diff -uNr 12_exceptions_part1_groundwork/test-types/Cargo.toml 13_integrated_tes
 +authors = ["Andre Richter <andre.o.richter@gmail.com>"]
 +edition = "2018"
 
-diff -uNr 12_exceptions_part1_groundwork/test-types/src/lib.rs 13_integrated_testing/test-types/src/lib.rs
---- 12_exceptions_part1_groundwork/test-types/src/lib.rs
-+++ 13_integrated_testing/test-types/src/lib.rs
+diff -uNr 11_exceptions_part1_groundwork/test-types/src/lib.rs 12_integrated_testing/test-types/src/lib.rs
+--- 11_exceptions_part1_groundwork/test-types/src/lib.rs
++++ 12_integrated_testing/test-types/src/lib.rs
 @@ -0,0 +1,16 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
diff --git a/13_integrated_testing/build.rs b/12_integrated_testing/build.rs
similarity index 100%
rename from 13_integrated_testing/build.rs
rename to 12_integrated_testing/build.rs
diff --git a/13_integrated_testing/src/_arch/aarch64/cpu.rs b/12_integrated_testing/src/_arch/aarch64/cpu.rs
similarity index 100%
rename from 13_integrated_testing/src/_arch/aarch64/cpu.rs
rename to 12_integrated_testing/src/_arch/aarch64/cpu.rs
diff --git a/13_integrated_testing/src/_arch/aarch64/cpu/boot.rs b/12_integrated_testing/src/_arch/aarch64/cpu/boot.rs
similarity index 100%
rename from 13_integrated_testing/src/_arch/aarch64/cpu/boot.rs
rename to 12_integrated_testing/src/_arch/aarch64/cpu/boot.rs
diff --git a/13_integrated_testing/src/_arch/aarch64/cpu/boot.s b/12_integrated_testing/src/_arch/aarch64/cpu/boot.s
similarity index 100%
rename from 13_integrated_testing/src/_arch/aarch64/cpu/boot.s
rename to 12_integrated_testing/src/_arch/aarch64/cpu/boot.s
diff --git a/13_integrated_testing/src/_arch/aarch64/exception.rs b/12_integrated_testing/src/_arch/aarch64/exception.rs
similarity index 100%
rename from 13_integrated_testing/src/_arch/aarch64/exception.rs
rename to 12_integrated_testing/src/_arch/aarch64/exception.rs
diff --git a/13_integrated_testing/src/_arch/aarch64/exception.s b/12_integrated_testing/src/_arch/aarch64/exception.s
similarity index 100%
rename from 13_integrated_testing/src/_arch/aarch64/exception.s
rename to 12_integrated_testing/src/_arch/aarch64/exception.s
diff --git a/13_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs b/12_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs
similarity index 100%
rename from 13_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs
rename to 12_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs
diff --git a/13_integrated_testing/src/_arch/aarch64/memory/mmu.rs b/12_integrated_testing/src/_arch/aarch64/memory/mmu.rs
similarity index 100%
rename from 13_integrated_testing/src/_arch/aarch64/memory/mmu.rs
rename to 12_integrated_testing/src/_arch/aarch64/memory/mmu.rs
diff --git a/13_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs b/12_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs
similarity index 100%
rename from 13_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs
rename to 12_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs
diff --git a/13_integrated_testing/src/_arch/aarch64/time.rs b/12_integrated_testing/src/_arch/aarch64/time.rs
similarity index 100%
rename from 13_integrated_testing/src/_arch/aarch64/time.rs
rename to 12_integrated_testing/src/_arch/aarch64/time.rs
diff --git a/13_integrated_testing/src/bsp.rs b/12_integrated_testing/src/bsp.rs
similarity index 100%
rename from 13_integrated_testing/src/bsp.rs
rename to 12_integrated_testing/src/bsp.rs
diff --git a/13_integrated_testing/src/bsp/device_driver.rs b/12_integrated_testing/src/bsp/device_driver.rs
similarity index 100%
rename from 13_integrated_testing/src/bsp/device_driver.rs
rename to 12_integrated_testing/src/bsp/device_driver.rs
diff --git a/13_integrated_testing/src/bsp/device_driver/bcm.rs b/12_integrated_testing/src/bsp/device_driver/bcm.rs
similarity index 100%
rename from 13_integrated_testing/src/bsp/device_driver/bcm.rs
rename to 12_integrated_testing/src/bsp/device_driver/bcm.rs
diff --git a/13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
similarity index 100%
rename from 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
rename to 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
diff --git a/13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
similarity index 100%
rename from 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
rename to 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
diff --git a/13_integrated_testing/src/bsp/device_driver/common.rs b/12_integrated_testing/src/bsp/device_driver/common.rs
similarity index 100%
rename from 13_integrated_testing/src/bsp/device_driver/common.rs
rename to 12_integrated_testing/src/bsp/device_driver/common.rs
diff --git a/13_integrated_testing/src/bsp/raspberrypi.rs b/12_integrated_testing/src/bsp/raspberrypi.rs
similarity index 100%
rename from 13_integrated_testing/src/bsp/raspberrypi.rs
rename to 12_integrated_testing/src/bsp/raspberrypi.rs
diff --git a/13_integrated_testing/src/bsp/raspberrypi/console.rs b/12_integrated_testing/src/bsp/raspberrypi/console.rs
similarity index 100%
rename from 13_integrated_testing/src/bsp/raspberrypi/console.rs
rename to 12_integrated_testing/src/bsp/raspberrypi/console.rs
diff --git a/13_integrated_testing/src/bsp/raspberrypi/cpu.rs b/12_integrated_testing/src/bsp/raspberrypi/cpu.rs
similarity index 100%
rename from 13_integrated_testing/src/bsp/raspberrypi/cpu.rs
rename to 12_integrated_testing/src/bsp/raspberrypi/cpu.rs
diff --git a/13_integrated_testing/src/bsp/raspberrypi/driver.rs b/12_integrated_testing/src/bsp/raspberrypi/driver.rs
similarity index 100%
rename from 13_integrated_testing/src/bsp/raspberrypi/driver.rs
rename to 12_integrated_testing/src/bsp/raspberrypi/driver.rs
diff --git a/13_integrated_testing/src/bsp/raspberrypi/link.ld b/12_integrated_testing/src/bsp/raspberrypi/link.ld
similarity index 100%
rename from 13_integrated_testing/src/bsp/raspberrypi/link.ld
rename to 12_integrated_testing/src/bsp/raspberrypi/link.ld
diff --git a/13_integrated_testing/src/bsp/raspberrypi/memory.rs b/12_integrated_testing/src/bsp/raspberrypi/memory.rs
similarity index 100%
rename from 13_integrated_testing/src/bsp/raspberrypi/memory.rs
rename to 12_integrated_testing/src/bsp/raspberrypi/memory.rs
diff --git a/13_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs b/12_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs
similarity index 100%
rename from 13_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs
rename to 12_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs
diff --git a/13_integrated_testing/src/console.rs b/12_integrated_testing/src/console.rs
similarity index 100%
rename from 13_integrated_testing/src/console.rs
rename to 12_integrated_testing/src/console.rs
diff --git a/13_integrated_testing/src/cpu.rs b/12_integrated_testing/src/cpu.rs
similarity index 100%
rename from 13_integrated_testing/src/cpu.rs
rename to 12_integrated_testing/src/cpu.rs
diff --git a/13_integrated_testing/src/cpu/boot.rs b/12_integrated_testing/src/cpu/boot.rs
similarity index 100%
rename from 13_integrated_testing/src/cpu/boot.rs
rename to 12_integrated_testing/src/cpu/boot.rs
diff --git a/13_integrated_testing/src/driver.rs b/12_integrated_testing/src/driver.rs
similarity index 100%
rename from 13_integrated_testing/src/driver.rs
rename to 12_integrated_testing/src/driver.rs
diff --git a/13_integrated_testing/src/exception.rs b/12_integrated_testing/src/exception.rs
similarity index 100%
rename from 13_integrated_testing/src/exception.rs
rename to 12_integrated_testing/src/exception.rs
diff --git a/13_integrated_testing/src/exception/asynchronous.rs b/12_integrated_testing/src/exception/asynchronous.rs
similarity index 100%
rename from 13_integrated_testing/src/exception/asynchronous.rs
rename to 12_integrated_testing/src/exception/asynchronous.rs
diff --git a/13_integrated_testing/src/lib.rs b/12_integrated_testing/src/lib.rs
similarity index 100%
rename from 13_integrated_testing/src/lib.rs
rename to 12_integrated_testing/src/lib.rs
diff --git a/13_integrated_testing/src/main.rs b/12_integrated_testing/src/main.rs
similarity index 100%
rename from 13_integrated_testing/src/main.rs
rename to 12_integrated_testing/src/main.rs
diff --git a/13_integrated_testing/src/memory.rs b/12_integrated_testing/src/memory.rs
similarity index 100%
rename from 13_integrated_testing/src/memory.rs
rename to 12_integrated_testing/src/memory.rs
diff --git a/13_integrated_testing/src/memory/mmu.rs b/12_integrated_testing/src/memory/mmu.rs
similarity index 100%
rename from 13_integrated_testing/src/memory/mmu.rs
rename to 12_integrated_testing/src/memory/mmu.rs
diff --git a/13_integrated_testing/src/memory/mmu/translation_table.rs b/12_integrated_testing/src/memory/mmu/translation_table.rs
similarity index 100%
rename from 13_integrated_testing/src/memory/mmu/translation_table.rs
rename to 12_integrated_testing/src/memory/mmu/translation_table.rs
diff --git a/13_integrated_testing/src/panic_wait.rs b/12_integrated_testing/src/panic_wait.rs
similarity index 100%
rename from 13_integrated_testing/src/panic_wait.rs
rename to 12_integrated_testing/src/panic_wait.rs
diff --git a/13_integrated_testing/src/print.rs b/12_integrated_testing/src/print.rs
similarity index 100%
rename from 13_integrated_testing/src/print.rs
rename to 12_integrated_testing/src/print.rs
diff --git a/13_integrated_testing/src/runtime_init.rs b/12_integrated_testing/src/runtime_init.rs
similarity index 100%
rename from 13_integrated_testing/src/runtime_init.rs
rename to 12_integrated_testing/src/runtime_init.rs
diff --git a/13_integrated_testing/src/synchronization.rs b/12_integrated_testing/src/synchronization.rs
similarity index 100%
rename from 13_integrated_testing/src/synchronization.rs
rename to 12_integrated_testing/src/synchronization.rs
diff --git a/13_integrated_testing/src/time.rs b/12_integrated_testing/src/time.rs
similarity index 100%
rename from 13_integrated_testing/src/time.rs
rename to 12_integrated_testing/src/time.rs
diff --git a/13_integrated_testing/test-macros/Cargo.toml b/12_integrated_testing/test-macros/Cargo.toml
similarity index 100%
rename from 13_integrated_testing/test-macros/Cargo.toml
rename to 12_integrated_testing/test-macros/Cargo.toml
diff --git a/13_integrated_testing/test-macros/src/lib.rs b/12_integrated_testing/test-macros/src/lib.rs
similarity index 100%
rename from 13_integrated_testing/test-macros/src/lib.rs
rename to 12_integrated_testing/test-macros/src/lib.rs
diff --git a/13_integrated_testing/test-types/Cargo.toml b/12_integrated_testing/test-types/Cargo.toml
similarity index 100%
rename from 13_integrated_testing/test-types/Cargo.toml
rename to 12_integrated_testing/test-types/Cargo.toml
diff --git a/13_integrated_testing/test-types/src/lib.rs b/12_integrated_testing/test-types/src/lib.rs
similarity index 100%
rename from 13_integrated_testing/test-types/src/lib.rs
rename to 12_integrated_testing/test-types/src/lib.rs
diff --git a/13_integrated_testing/tests/00_console_sanity.rb b/12_integrated_testing/tests/00_console_sanity.rb
similarity index 100%
rename from 13_integrated_testing/tests/00_console_sanity.rb
rename to 12_integrated_testing/tests/00_console_sanity.rb
diff --git a/13_integrated_testing/tests/00_console_sanity.rs b/12_integrated_testing/tests/00_console_sanity.rs
similarity index 100%
rename from 13_integrated_testing/tests/00_console_sanity.rs
rename to 12_integrated_testing/tests/00_console_sanity.rs
diff --git a/13_integrated_testing/tests/01_timer_sanity.rs b/12_integrated_testing/tests/01_timer_sanity.rs
similarity index 100%
rename from 13_integrated_testing/tests/01_timer_sanity.rs
rename to 12_integrated_testing/tests/01_timer_sanity.rs
diff --git a/13_integrated_testing/tests/02_exception_sync_page_fault.rs b/12_integrated_testing/tests/02_exception_sync_page_fault.rs
similarity index 100%
rename from 13_integrated_testing/tests/02_exception_sync_page_fault.rs
rename to 12_integrated_testing/tests/02_exception_sync_page_fault.rs
diff --git a/13_integrated_testing/tests/panic_exit_success/mod.rs b/12_integrated_testing/tests/panic_exit_success/mod.rs
similarity index 100%
rename from 13_integrated_testing/tests/panic_exit_success/mod.rs
rename to 12_integrated_testing/tests/panic_exit_success/mod.rs
diff --git a/13_integrated_testing/tests/runner.rb b/12_integrated_testing/tests/runner.rb
similarity index 100%
rename from 13_integrated_testing/tests/runner.rb
rename to 12_integrated_testing/tests/runner.rb
diff --git a/14_exceptions_part2_peripheral_IRQs/.cargo/config.toml b/13_exceptions_part2_peripheral_IRQs/.cargo/config.toml
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/.cargo/config.toml
rename to 13_exceptions_part2_peripheral_IRQs/.cargo/config.toml
diff --git a/14_exceptions_part2_peripheral_IRQs/.vscode/settings.json b/13_exceptions_part2_peripheral_IRQs/.vscode/settings.json
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/.vscode/settings.json
rename to 13_exceptions_part2_peripheral_IRQs/.vscode/settings.json
diff --git a/14_exceptions_part2_peripheral_IRQs/Cargo.lock b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/Cargo.lock
rename to 13_exceptions_part2_peripheral_IRQs/Cargo.lock
diff --git a/14_exceptions_part2_peripheral_IRQs/Cargo.toml b/13_exceptions_part2_peripheral_IRQs/Cargo.toml
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/Cargo.toml
rename to 13_exceptions_part2_peripheral_IRQs/Cargo.toml
diff --git a/14_exceptions_part2_peripheral_IRQs/Makefile b/13_exceptions_part2_peripheral_IRQs/Makefile
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/Makefile
rename to 13_exceptions_part2_peripheral_IRQs/Makefile
diff --git a/14_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
similarity index 94%
rename from 14_exceptions_part2_peripheral_IRQs/README.md
rename to 13_exceptions_part2_peripheral_IRQs/README.md
index b78da7162..ea327b77e 100644
--- a/14_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -1,4 +1,4 @@
-# Tutorial 14 - Exceptions Part 2: Peripheral IRQs
+# Tutorial 13 - Exceptions Part 2: Peripheral IRQs
 
 ## tl;dr
 
@@ -35,11 +35,11 @@
 
 ## Introduction
 
-In [tutorial 12], we laid the groundwork for exception handling from the processor architecture
+In [tutorial 11], we laid the groundwork for exception handling from the processor architecture
 side. Handler stubs for the different exception types were set up, and a first glimpse at exception
 handling was presented by causing a `synchronous` exception by means of a `page fault`.
 
-[tutorial 12]: ../12_exceptions_part1_groundwork
+[tutorial 11]: ../11_exceptions_part1_groundwork
 
 In this tutorial, we will add a first level of support for one of the three types of `asynchronous`
 exceptions that are defined for `AArch64`: `IRQs`. The overall goal for this tutorial is to get rid
@@ -350,13 +350,13 @@ fn handle_pending_irqs<'irq_context>(
 An important aspect of this function signature is that we want to ensure that IRQ handling is only
 possible from IRQ context. Part of the reason is that this invariant allows us to make some implicit
 assumptions (which might depend on the target architecture, though). For example, as we have learned
-in [tutorial 12], in `AArch64`, _"all kinds of exceptions are turned off upon taking an exception,
+in [tutorial 11], in `AArch64`, _"all kinds of exceptions are turned off upon taking an exception,
 so that by default, exception handlers can not get interrupted themselves"_ (note that an IRQ is an
 exception). This is a useful property that relieves us from explicitly protecting IRQ handling from
 being interrupted itself. Another reason would be that calling IRQ handling functions from arbitrary
 execution contexts just doesn't make a lot of sense.
 
-[tutorial 12]: ../12_exceptions_part1_groundwork/
+[tutorial 11]: ../11_exceptions_part1_groundwork/
 
 So in order to ensure that this function is only being called from IRQ context, we borrow a
 technique that I first saw in the [Rust embedded WG]'s [bare-metal crate]. It uses Rust's type
@@ -744,9 +744,9 @@ Minipush 1.0
 ## Diff to previous
 ```diff
 
-diff -uNr 13_integrated_testing/src/_arch/aarch64/cpu/smp.rs 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs
---- 13_integrated_testing/src/_arch/aarch64/cpu/smp.rs
-+++ 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs
+diff -uNr 12_integrated_testing/src/_arch/aarch64/cpu/smp.rs 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs
+--- 12_integrated_testing/src/_arch/aarch64/cpu/smp.rs
++++ 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs
 @@ -0,0 +1,29 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -778,9 +778,9 @@ diff -uNr 13_integrated_testing/src/_arch/aarch64/cpu/smp.rs 14_exceptions_part2
 +    T::from((MPIDR_EL1.get() & CORE_MASK) as u8)
 +}
 
-diff -uNr 13_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs
---- 13_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs
-+++ 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs
+diff -uNr 12_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs
+--- 12_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs
++++ 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs
 @@ -17,6 +17,10 @@
  // Private Definitions
  //--------------------------------------------------------------------------------------------------
@@ -865,9 +865,9 @@ diff -uNr 13_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs 14_e
  #[rustfmt::skip]
  pub fn print_state() {
 
-diff -uNr 13_integrated_testing/src/_arch/aarch64/exception.rs 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
---- 13_integrated_testing/src/_arch/aarch64/exception.rs
-+++ 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
+diff -uNr 12_integrated_testing/src/_arch/aarch64/exception.rs 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
+--- 12_integrated_testing/src/_arch/aarch64/exception.rs
++++ 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
 @@ -11,6 +11,7 @@
  //!
  //! crate::exception::arch_exception
@@ -891,9 +891,9 @@ diff -uNr 13_integrated_testing/src/_arch/aarch64/exception.rs 14_exceptions_par
 
  #[no_mangle]
 
-diff -uNr 13_integrated_testing/src/bsp/device_driver/arm/gicv2/gicc.rs 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs
---- 13_integrated_testing/src/bsp/device_driver/arm/gicv2/gicc.rs
-+++ 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs
+diff -uNr 12_integrated_testing/src/bsp/device_driver/arm/gicv2/gicc.rs 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs
+--- 12_integrated_testing/src/bsp/device_driver/arm/gicv2/gicc.rs
++++ 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs
 @@ -0,0 +1,137 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -1033,9 +1033,9 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/arm/gicv2/gicc.rs 14_excep
 +    }
 +}
 
-diff -uNr 13_integrated_testing/src/bsp/device_driver/arm/gicv2/gicd.rs 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicd.rs
---- 13_integrated_testing/src/bsp/device_driver/arm/gicv2/gicd.rs
-+++ 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicd.rs
+diff -uNr 12_integrated_testing/src/bsp/device_driver/arm/gicv2/gicd.rs 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicd.rs
+--- 12_integrated_testing/src/bsp/device_driver/arm/gicv2/gicd.rs
++++ 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicd.rs
 @@ -0,0 +1,195 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -1233,9 +1233,9 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/arm/gicv2/gicd.rs 14_excep
 +    }
 +}
 
-diff -uNr 13_integrated_testing/src/bsp/device_driver/arm/gicv2.rs 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs
---- 13_integrated_testing/src/bsp/device_driver/arm/gicv2.rs
-+++ 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs
+diff -uNr 12_integrated_testing/src/bsp/device_driver/arm/gicv2.rs 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs
+--- 12_integrated_testing/src/bsp/device_driver/arm/gicv2.rs
++++ 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs
 @@ -0,0 +1,219 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -1457,9 +1457,9 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/arm/gicv2.rs 14_exceptions
 +    }
 +}
 
-diff -uNr 13_integrated_testing/src/bsp/device_driver/arm.rs 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm.rs
---- 13_integrated_testing/src/bsp/device_driver/arm.rs
-+++ 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm.rs
+diff -uNr 12_integrated_testing/src/bsp/device_driver/arm.rs 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm.rs
+--- 12_integrated_testing/src/bsp/device_driver/arm.rs
++++ 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm.rs
 @@ -0,0 +1,9 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -1471,9 +1471,9 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/arm.rs 14_exceptions_part2
 +
 +pub use gicv2::*;
 
-diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
---- 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
-+++ 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+diff -uNr 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+--- 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
++++ 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 @@ -6,7 +6,7 @@
 
  use crate::{
@@ -1502,9 +1502,9 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 14_exc
      }
 
 
-diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
---- 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
-+++ 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+diff -uNr 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+--- 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
++++ 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
 @@ -0,0 +1,163 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -1670,9 +1670,9 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_interrupt_cont
 +    }
 +}
 
-diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
---- 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
-+++ 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+diff -uNr 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+--- 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
++++ 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
 @@ -0,0 +1,131 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -1806,9 +1806,9 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_interrupt_cont
 +    }
 +}
 
-diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
---- 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
-+++ 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+diff -uNr 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+--- 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
++++ 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 @@ -10,8 +10,8 @@
  //! - <https://developer.arm.com/documentation/ddi0183/latest>
 
@@ -1974,9 +1974,9 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 +    }
 +}
 
-diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm.rs 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm.rs
---- 13_integrated_testing/src/bsp/device_driver/bcm.rs
-+++ 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm.rs
+diff -uNr 12_integrated_testing/src/bsp/device_driver/bcm.rs 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm.rs
+--- 12_integrated_testing/src/bsp/device_driver/bcm.rs
++++ 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm.rs
 @@ -5,7 +5,11 @@
  //! BCM driver top level.
 
@@ -1990,9 +1990,9 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm.rs 14_exceptions_part2
 +pub use bcm2xxx_interrupt_controller::*;
  pub use bcm2xxx_pl011_uart::*;
 
-diff -uNr 13_integrated_testing/src/bsp/device_driver.rs 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver.rs
---- 13_integrated_testing/src/bsp/device_driver.rs
-+++ 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver.rs
+diff -uNr 12_integrated_testing/src/bsp/device_driver.rs 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver.rs
+--- 12_integrated_testing/src/bsp/device_driver.rs
++++ 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver.rs
 @@ -4,9 +4,13 @@
 
  //! Device driver.
@@ -2008,9 +2008,9 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver.rs 14_exceptions_part2_per
  #[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
  pub use bcm::*;
 
-diff -uNr 13_integrated_testing/src/bsp/raspberrypi/driver.rs 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/driver.rs
---- 13_integrated_testing/src/bsp/raspberrypi/driver.rs
-+++ 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/driver.rs
+diff -uNr 12_integrated_testing/src/bsp/raspberrypi/driver.rs 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/driver.rs
+--- 12_integrated_testing/src/bsp/raspberrypi/driver.rs
++++ 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/driver.rs
 @@ -12,7 +12,7 @@
 
  /// Device Driver Manager type.
@@ -2034,9 +2034,9 @@ diff -uNr 13_integrated_testing/src/bsp/raspberrypi/driver.rs 14_exceptions_part
 
  //--------------------------------------------------------------------------------------------------
 
-diff -uNr 13_integrated_testing/src/bsp/raspberrypi/exception/asynchronous.rs 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception/asynchronous.rs
---- 13_integrated_testing/src/bsp/raspberrypi/exception/asynchronous.rs
-+++ 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception/asynchronous.rs
+diff -uNr 12_integrated_testing/src/bsp/raspberrypi/exception/asynchronous.rs 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception/asynchronous.rs
+--- 12_integrated_testing/src/bsp/raspberrypi/exception/asynchronous.rs
++++ 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception/asynchronous.rs
 @@ -0,0 +1,36 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -2075,9 +2075,9 @@ diff -uNr 13_integrated_testing/src/bsp/raspberrypi/exception/asynchronous.rs 14
 +    &super::super::INTERRUPT_CONTROLLER
 +}
 
-diff -uNr 13_integrated_testing/src/bsp/raspberrypi/exception.rs 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception.rs
---- 13_integrated_testing/src/bsp/raspberrypi/exception.rs
-+++ 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception.rs
+diff -uNr 12_integrated_testing/src/bsp/raspberrypi/exception.rs 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception.rs
+--- 12_integrated_testing/src/bsp/raspberrypi/exception.rs
++++ 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception.rs
 @@ -0,0 +1,7 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -2087,9 +2087,9 @@ diff -uNr 13_integrated_testing/src/bsp/raspberrypi/exception.rs 14_exceptions_p
 +
 +pub mod asynchronous;
 
-diff -uNr 13_integrated_testing/src/bsp/raspberrypi/memory.rs 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
---- 13_integrated_testing/src/bsp/raspberrypi/memory.rs
-+++ 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
+diff -uNr 12_integrated_testing/src/bsp/raspberrypi/memory.rs 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
+--- 12_integrated_testing/src/bsp/raspberrypi/memory.rs
++++ 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
 @@ -51,10 +51,12 @@
      pub mod mmio {
          use super::*;
@@ -2117,9 +2117,9 @@ diff -uNr 13_integrated_testing/src/bsp/raspberrypi/memory.rs 14_exceptions_part
      }
  }
 
-diff -uNr 13_integrated_testing/src/bsp/raspberrypi.rs 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi.rs
---- 13_integrated_testing/src/bsp/raspberrypi.rs
-+++ 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi.rs
+diff -uNr 12_integrated_testing/src/bsp/raspberrypi.rs 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi.rs
+--- 12_integrated_testing/src/bsp/raspberrypi.rs
++++ 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi.rs
 @@ -7,6 +7,7 @@
  pub mod console;
  pub mod cpu;
@@ -2157,9 +2157,9 @@ diff -uNr 13_integrated_testing/src/bsp/raspberrypi.rs 14_exceptions_part2_perip
  //--------------------------------------------------------------------------------------------------
  // Public Code
 
-diff -uNr 13_integrated_testing/src/cpu/smp.rs 14_exceptions_part2_peripheral_IRQs/src/cpu/smp.rs
---- 13_integrated_testing/src/cpu/smp.rs
-+++ 14_exceptions_part2_peripheral_IRQs/src/cpu/smp.rs
+diff -uNr 12_integrated_testing/src/cpu/smp.rs 13_exceptions_part2_peripheral_IRQs/src/cpu/smp.rs
+--- 12_integrated_testing/src/cpu/smp.rs
++++ 13_exceptions_part2_peripheral_IRQs/src/cpu/smp.rs
 @@ -0,0 +1,14 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -2176,9 +2176,9 @@ diff -uNr 13_integrated_testing/src/cpu/smp.rs 14_exceptions_part2_peripheral_IR
 +//--------------------------------------------------------------------------------------------------
 +pub use arch_smp::core_id;
 
-diff -uNr 13_integrated_testing/src/cpu.rs 14_exceptions_part2_peripheral_IRQs/src/cpu.rs
---- 13_integrated_testing/src/cpu.rs
-+++ 14_exceptions_part2_peripheral_IRQs/src/cpu.rs
+diff -uNr 12_integrated_testing/src/cpu.rs 13_exceptions_part2_peripheral_IRQs/src/cpu.rs
+--- 12_integrated_testing/src/cpu.rs
++++ 13_exceptions_part2_peripheral_IRQs/src/cpu.rs
 @@ -10,6 +10,8 @@
 
  mod boot;
@@ -2189,9 +2189,9 @@ diff -uNr 13_integrated_testing/src/cpu.rs 14_exceptions_part2_peripheral_IRQs/s
  // Architectural Public Reexports
  //--------------------------------------------------------------------------------------------------
 
-diff -uNr 13_integrated_testing/src/driver.rs 14_exceptions_part2_peripheral_IRQs/src/driver.rs
---- 13_integrated_testing/src/driver.rs
-+++ 14_exceptions_part2_peripheral_IRQs/src/driver.rs
+diff -uNr 12_integrated_testing/src/driver.rs 13_exceptions_part2_peripheral_IRQs/src/driver.rs
+--- 12_integrated_testing/src/driver.rs
++++ 13_exceptions_part2_peripheral_IRQs/src/driver.rs
 @@ -23,6 +23,14 @@
          unsafe fn init(&self) -> Result<(), &'static str> {
              Ok(())
@@ -2208,9 +2208,9 @@ diff -uNr 13_integrated_testing/src/driver.rs 14_exceptions_part2_peripheral_IRQ
 
      /// Device driver management functions.
 
-diff -uNr 13_integrated_testing/src/exception/asynchronous.rs 14_exceptions_part2_peripheral_IRQs/src/exception/asynchronous.rs
---- 13_integrated_testing/src/exception/asynchronous.rs
-+++ 14_exceptions_part2_peripheral_IRQs/src/exception/asynchronous.rs
+diff -uNr 12_integrated_testing/src/exception/asynchronous.rs 13_exceptions_part2_peripheral_IRQs/src/exception/asynchronous.rs
+--- 12_integrated_testing/src/exception/asynchronous.rs
++++ 13_exceptions_part2_peripheral_IRQs/src/exception/asynchronous.rs
 @@ -8,7 +8,145 @@
  #[path = "../_arch/aarch64/exception/asynchronous.rs"]
  mod arch_asynchronous;
@@ -2359,9 +2359,9 @@ diff -uNr 13_integrated_testing/src/exception/asynchronous.rs 14_exceptions_part
 +    ret
 +}
 
-diff -uNr 13_integrated_testing/src/lib.rs 14_exceptions_part2_peripheral_IRQs/src/lib.rs
---- 13_integrated_testing/src/lib.rs
-+++ 14_exceptions_part2_peripheral_IRQs/src/lib.rs
+diff -uNr 12_integrated_testing/src/lib.rs 13_exceptions_part2_peripheral_IRQs/src/lib.rs
+--- 12_integrated_testing/src/lib.rs
++++ 13_exceptions_part2_peripheral_IRQs/src/lib.rs
 @@ -110,6 +110,7 @@
 
  #![allow(clippy::clippy::upper_case_acronyms)]
@@ -2379,9 +2379,9 @@ diff -uNr 13_integrated_testing/src/lib.rs 14_exceptions_part2_peripheral_IRQs/s
 
  //--------------------------------------------------------------------------------------------------
 
-diff -uNr 13_integrated_testing/src/main.rs 14_exceptions_part2_peripheral_IRQs/src/main.rs
---- 13_integrated_testing/src/main.rs
-+++ 14_exceptions_part2_peripheral_IRQs/src/main.rs
+diff -uNr 12_integrated_testing/src/main.rs 13_exceptions_part2_peripheral_IRQs/src/main.rs
+--- 12_integrated_testing/src/main.rs
++++ 13_exceptions_part2_peripheral_IRQs/src/main.rs
 @@ -11,7 +11,7 @@
  #![no_main]
  #![no_std]
@@ -2448,9 +2448,9 @@ diff -uNr 13_integrated_testing/src/main.rs 14_exceptions_part2_peripheral_IRQs/
 +    cpu::wait_forever();
  }
 
-diff -uNr 13_integrated_testing/src/panic_wait.rs 14_exceptions_part2_peripheral_IRQs/src/panic_wait.rs
---- 13_integrated_testing/src/panic_wait.rs
-+++ 14_exceptions_part2_peripheral_IRQs/src/panic_wait.rs
+diff -uNr 12_integrated_testing/src/panic_wait.rs 13_exceptions_part2_peripheral_IRQs/src/panic_wait.rs
+--- 12_integrated_testing/src/panic_wait.rs
++++ 13_exceptions_part2_peripheral_IRQs/src/panic_wait.rs
 @@ -4,7 +4,7 @@
 
  //! A panic handler that infinitely waits.
@@ -2470,9 +2470,9 @@ diff -uNr 13_integrated_testing/src/panic_wait.rs 14_exceptions_part2_peripheral
          panic_println!("\nKernel panic: {}", args);
      } else {
 
-diff -uNr 13_integrated_testing/src/state.rs 14_exceptions_part2_peripheral_IRQs/src/state.rs
---- 13_integrated_testing/src/state.rs
-+++ 14_exceptions_part2_peripheral_IRQs/src/state.rs
+diff -uNr 12_integrated_testing/src/state.rs 13_exceptions_part2_peripheral_IRQs/src/state.rs
+--- 12_integrated_testing/src/state.rs
++++ 13_exceptions_part2_peripheral_IRQs/src/state.rs
 @@ -0,0 +1,92 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -2567,9 +2567,9 @@ diff -uNr 13_integrated_testing/src/state.rs 14_exceptions_part2_peripheral_IRQs
 +    }
 +}
 
-diff -uNr 13_integrated_testing/src/synchronization.rs 14_exceptions_part2_peripheral_IRQs/src/synchronization.rs
---- 13_integrated_testing/src/synchronization.rs
-+++ 14_exceptions_part2_peripheral_IRQs/src/synchronization.rs
+diff -uNr 12_integrated_testing/src/synchronization.rs 13_exceptions_part2_peripheral_IRQs/src/synchronization.rs
+--- 12_integrated_testing/src/synchronization.rs
++++ 13_exceptions_part2_peripheral_IRQs/src/synchronization.rs
 @@ -28,6 +28,21 @@
          /// Locks the mutex and grants the closure temporary mutable access to the wrapped data.
          fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R;
@@ -2702,9 +2702,9 @@ diff -uNr 13_integrated_testing/src/synchronization.rs 14_exceptions_part2_perip
 +    }
  }
 
-diff -uNr 13_integrated_testing/tests/03_exception_irq_sanity.rs 14_exceptions_part2_peripheral_IRQs/tests/03_exception_irq_sanity.rs
---- 13_integrated_testing/tests/03_exception_irq_sanity.rs
-+++ 14_exceptions_part2_peripheral_IRQs/tests/03_exception_irq_sanity.rs
+diff -uNr 12_integrated_testing/tests/03_exception_irq_sanity.rs 13_exceptions_part2_peripheral_IRQs/tests/03_exception_irq_sanity.rs
+--- 12_integrated_testing/tests/03_exception_irq_sanity.rs
++++ 13_exceptions_part2_peripheral_IRQs/tests/03_exception_irq_sanity.rs
 @@ -0,0 +1,66 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
diff --git a/14_exceptions_part2_peripheral_IRQs/build.rs b/13_exceptions_part2_peripheral_IRQs/build.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/build.rs
rename to 13_exceptions_part2_peripheral_IRQs/build.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu.rs b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.rs b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.s b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.s
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.s
rename to 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.s
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.s b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.s
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.s
rename to 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.s
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/time.rs b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/time.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/time.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/time.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/bsp.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/bsp.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicd.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicd.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicd.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicd.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/common.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/common.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/common.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/common.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/console.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/console.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/console.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/console.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/cpu.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/cpu.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/cpu.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/cpu.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/driver.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/driver.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/driver.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/driver.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception/asynchronous.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception/asynchronous.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception/asynchronous.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception/asynchronous.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld
rename to 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/console.rs b/13_exceptions_part2_peripheral_IRQs/src/console.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/console.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/console.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/cpu.rs b/13_exceptions_part2_peripheral_IRQs/src/cpu.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/cpu.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/cpu.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/cpu/boot.rs b/13_exceptions_part2_peripheral_IRQs/src/cpu/boot.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/cpu/boot.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/cpu/boot.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/cpu/smp.rs b/13_exceptions_part2_peripheral_IRQs/src/cpu/smp.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/cpu/smp.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/cpu/smp.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/driver.rs b/13_exceptions_part2_peripheral_IRQs/src/driver.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/driver.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/driver.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/exception.rs b/13_exceptions_part2_peripheral_IRQs/src/exception.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/exception.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/exception.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/exception/asynchronous.rs b/13_exceptions_part2_peripheral_IRQs/src/exception/asynchronous.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/exception/asynchronous.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/exception/asynchronous.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/lib.rs b/13_exceptions_part2_peripheral_IRQs/src/lib.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/lib.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/lib.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/main.rs b/13_exceptions_part2_peripheral_IRQs/src/main.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/main.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/main.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/memory.rs b/13_exceptions_part2_peripheral_IRQs/src/memory.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/memory.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/memory.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs b/13_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.rs b/13_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/panic_wait.rs b/13_exceptions_part2_peripheral_IRQs/src/panic_wait.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/panic_wait.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/panic_wait.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/print.rs b/13_exceptions_part2_peripheral_IRQs/src/print.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/print.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/print.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/runtime_init.rs b/13_exceptions_part2_peripheral_IRQs/src/runtime_init.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/runtime_init.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/runtime_init.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/state.rs b/13_exceptions_part2_peripheral_IRQs/src/state.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/state.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/state.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/synchronization.rs b/13_exceptions_part2_peripheral_IRQs/src/synchronization.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/synchronization.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/synchronization.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/src/time.rs b/13_exceptions_part2_peripheral_IRQs/src/time.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/src/time.rs
rename to 13_exceptions_part2_peripheral_IRQs/src/time.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/test-macros/Cargo.toml b/13_exceptions_part2_peripheral_IRQs/test-macros/Cargo.toml
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/test-macros/Cargo.toml
rename to 13_exceptions_part2_peripheral_IRQs/test-macros/Cargo.toml
diff --git a/14_exceptions_part2_peripheral_IRQs/test-macros/src/lib.rs b/13_exceptions_part2_peripheral_IRQs/test-macros/src/lib.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/test-macros/src/lib.rs
rename to 13_exceptions_part2_peripheral_IRQs/test-macros/src/lib.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/test-types/Cargo.toml b/13_exceptions_part2_peripheral_IRQs/test-types/Cargo.toml
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/test-types/Cargo.toml
rename to 13_exceptions_part2_peripheral_IRQs/test-types/Cargo.toml
diff --git a/14_exceptions_part2_peripheral_IRQs/test-types/src/lib.rs b/13_exceptions_part2_peripheral_IRQs/test-types/src/lib.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/test-types/src/lib.rs
rename to 13_exceptions_part2_peripheral_IRQs/test-types/src/lib.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rb b/13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rb
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rb
rename to 13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rb
diff --git a/14_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs b/13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs
rename to 13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/tests/01_timer_sanity.rs b/13_exceptions_part2_peripheral_IRQs/tests/01_timer_sanity.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/tests/01_timer_sanity.rs
rename to 13_exceptions_part2_peripheral_IRQs/tests/01_timer_sanity.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs b/13_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs
rename to 13_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/tests/03_exception_irq_sanity.rs b/13_exceptions_part2_peripheral_IRQs/tests/03_exception_irq_sanity.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/tests/03_exception_irq_sanity.rs
rename to 13_exceptions_part2_peripheral_IRQs/tests/03_exception_irq_sanity.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/tests/panic_exit_success/mod.rs b/13_exceptions_part2_peripheral_IRQs/tests/panic_exit_success/mod.rs
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/tests/panic_exit_success/mod.rs
rename to 13_exceptions_part2_peripheral_IRQs/tests/panic_exit_success/mod.rs
diff --git a/14_exceptions_part2_peripheral_IRQs/tests/runner.rb b/13_exceptions_part2_peripheral_IRQs/tests/runner.rb
similarity index 100%
rename from 14_exceptions_part2_peripheral_IRQs/tests/runner.rb
rename to 13_exceptions_part2_peripheral_IRQs/tests/runner.rb
diff --git a/15_virtual_mem_part2_mmio_remap/.cargo/config.toml b/14_virtual_mem_part2_mmio_remap/.cargo/config.toml
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/.cargo/config.toml
rename to 14_virtual_mem_part2_mmio_remap/.cargo/config.toml
diff --git a/15_virtual_mem_part2_mmio_remap/.vscode/settings.json b/14_virtual_mem_part2_mmio_remap/.vscode/settings.json
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/.vscode/settings.json
rename to 14_virtual_mem_part2_mmio_remap/.vscode/settings.json
diff --git a/15_virtual_mem_part2_mmio_remap/Cargo.lock b/14_virtual_mem_part2_mmio_remap/Cargo.lock
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/Cargo.lock
rename to 14_virtual_mem_part2_mmio_remap/Cargo.lock
diff --git a/15_virtual_mem_part2_mmio_remap/Cargo.toml b/14_virtual_mem_part2_mmio_remap/Cargo.toml
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/Cargo.toml
rename to 14_virtual_mem_part2_mmio_remap/Cargo.toml
diff --git a/15_virtual_mem_part2_mmio_remap/Makefile b/14_virtual_mem_part2_mmio_remap/Makefile
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/Makefile
rename to 14_virtual_mem_part2_mmio_remap/Makefile
diff --git a/15_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
similarity index 95%
rename from 15_virtual_mem_part2_mmio_remap/README.md
rename to 14_virtual_mem_part2_mmio_remap/README.md
index 1745d4b14..cf387da92 100644
--- a/15_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -1,4 +1,4 @@
-# Tutorial 15 - Virtual Memory Part 2: MMIO Remap
+# Tutorial 14 - Virtual Memory Part 2: MMIO Remap
 
 ## tl;dr
 
@@ -369,9 +369,9 @@ Minipush 1.0
 ## Diff to previous
 ```diff
 
-diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
---- 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
-+++ 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
+--- 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
++++ 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
 @@ -11,7 +11,11 @@
  //!
  //! crate::exception::arch_exception
@@ -418,9 +418,9 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs 15_
  }
 
 
-diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
---- 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs
-+++ 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
+--- 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs
++++ 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
 @@ -15,9 +15,12 @@
 
  use crate::{
@@ -730,9 +730,9 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
      use super::*;
      use test_macros::kernel_test;
 
-diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
---- 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
-+++ 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
+--- 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
++++ 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
 @@ -15,7 +15,7 @@
 
  use crate::{
@@ -816,9 +816,9 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 15
 -    }
 -}
 
-diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs 15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicc.rs
---- 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs
-+++ 15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicc.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicc.rs
+--- 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs
++++ 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicc.rs
 @@ -4,7 +4,9 @@
 
  //! GICC Driver - GIC CPU interface.
@@ -905,9 +905,9 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gi
      }
  }
 
-diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicd.rs 15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicd.rs
---- 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicd.rs
-+++ 15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicd.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicd.rs 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicd.rs
+--- 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicd.rs
++++ 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicd.rs
 @@ -8,8 +8,9 @@
  //!   - SPI - Shared Peripheral Interrupt.
 
@@ -981,9 +981,9 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gi
              _ => {
                  let enable_reg_index_shared = enable_reg_index - 1;
 
-diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs 15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs
---- 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs
-+++ 15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs
+--- 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs
++++ 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs
 @@ -79,7 +79,8 @@
  mod gicc;
  mod gicd;
@@ -1059,9 +1059,9 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs
              self.gicd.boot_core_init();
          }
 
-diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
---- 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
-+++ 15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+--- 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
++++ 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 @@ -5,9 +5,10 @@
  //! GPIO Driver.
 
@@ -1147,9 +1147,9 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
 +    }
  }
 
-diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs 15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
---- 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
-+++ 15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+--- 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
++++ 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
 @@ -2,12 +2,12 @@
  //
  // Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -1240,9 +1240,9 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
      type IRQNumberType = PeripheralIRQ;
 
 
-diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs 15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
---- 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
-+++ 15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+--- 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
++++ 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
 @@ -6,7 +6,7 @@
 
  mod peripheral_ic;
@@ -1281,9 +1281,9 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
 
  impl exception::asynchronous::interface::IRQManager for InterruptController {
 
-diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
---- 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
-+++ 15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+--- 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
++++ 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 @@ -10,10 +10,13 @@
  //! - <https://developer.arm.com/documentation/ddi0183/latest>
 
@@ -1390,9 +1390,9 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
 
  impl console::interface::Write for PL011Uart {
 
-diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/console.rs 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs
---- 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/console.rs
-+++ 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/console.rs 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs
+--- 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/console.rs
++++ 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs
 @@ -5,7 +5,7 @@
  //! BSP console facilities.
 
@@ -1432,9 +1432,9 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/console.rs 15_
  }
 
 
-diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/driver.rs 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/driver.rs
---- 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/driver.rs
-+++ 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/driver.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/driver.rs 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/driver.rs
+--- 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/driver.rs
++++ 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/driver.rs
 @@ -46,7 +46,15 @@
          &self.device_drivers[..]
      }
@@ -1453,9 +1453,9 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/driver.rs 15_v
          super::GPIO.map_pl011_uart();
      }
 
-diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
---- 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld
-+++ 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
+diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
+--- 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld
++++ 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
 @@ -17,11 +17,6 @@
  SECTIONS
  {
@@ -1501,9 +1501,9 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld 15_vir
 +    __boot_core_stack_end_exclusive = .; /*   |             */
  }
 
-diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
---- 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
-+++ 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
+--- 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
++++ 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
 @@ -4,70 +4,164 @@
 
  //! BSP Memory Management Unit.
@@ -1779,9 +1779,9 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +    }
  }
 
-diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
---- 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
-+++ 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
+--- 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
++++ 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
 @@ -3,9 +3,40 @@
  // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
@@ -1995,9 +1995,9 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 15_v
 
  //--------------------------------------------------------------------------------------------------
 
-diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi.rs 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi.rs
---- 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi.rs
-+++ 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi.rs 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi.rs
+--- 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi.rs
++++ 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi.rs
 @@ -10,17 +10,20 @@
  pub mod exception;
  pub mod memory;
@@ -2044,9 +2044,9 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi.rs 15_virtual_
 
  //--------------------------------------------------------------------------------------------------
 
-diff -uNr 14_exceptions_part2_peripheral_IRQs/src/common.rs 15_virtual_mem_part2_mmio_remap/src/common.rs
---- 14_exceptions_part2_peripheral_IRQs/src/common.rs
-+++ 15_virtual_mem_part2_mmio_remap/src/common.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/src/common.rs 14_virtual_mem_part2_mmio_remap/src/common.rs
+--- 13_exceptions_part2_peripheral_IRQs/src/common.rs
++++ 14_virtual_mem_part2_mmio_remap/src/common.rs
 @@ -0,0 +1,21 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -2070,9 +2070,9 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/common.rs 15_virtual_mem_part2
 +    value & !(alignment - 1)
 +}
 
-diff -uNr 14_exceptions_part2_peripheral_IRQs/src/driver.rs 15_virtual_mem_part2_mmio_remap/src/driver.rs
---- 14_exceptions_part2_peripheral_IRQs/src/driver.rs
-+++ 15_virtual_mem_part2_mmio_remap/src/driver.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/src/driver.rs 14_virtual_mem_part2_mmio_remap/src/driver.rs
+--- 13_exceptions_part2_peripheral_IRQs/src/driver.rs
++++ 14_virtual_mem_part2_mmio_remap/src/driver.rs
 @@ -31,6 +31,14 @@
          fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
              Ok(())
@@ -2114,9 +2114,9 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/driver.rs 15_virtual_mem_part2
      }
  }
 
-diff -uNr 14_exceptions_part2_peripheral_IRQs/src/lib.rs 15_virtual_mem_part2_mmio_remap/src/lib.rs
---- 14_exceptions_part2_peripheral_IRQs/src/lib.rs
-+++ 15_virtual_mem_part2_mmio_remap/src/lib.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/src/lib.rs 14_virtual_mem_part2_mmio_remap/src/lib.rs
+--- 13_exceptions_part2_peripheral_IRQs/src/lib.rs
++++ 14_virtual_mem_part2_mmio_remap/src/lib.rs
 @@ -111,6 +111,8 @@
  #![allow(clippy::clippy::upper_case_acronyms)]
  #![allow(incomplete_features)]
@@ -2135,9 +2135,9 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/lib.rs 15_virtual_mem_part2_mm
  pub mod cpu;
  pub mod driver;
 
-diff -uNr 14_exceptions_part2_peripheral_IRQs/src/main.rs 15_virtual_mem_part2_mmio_remap/src/main.rs
---- 14_exceptions_part2_peripheral_IRQs/src/main.rs
-+++ 15_virtual_mem_part2_mmio_remap/src/main.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/src/main.rs 14_virtual_mem_part2_mmio_remap/src/main.rs
+--- 13_exceptions_part2_peripheral_IRQs/src/main.rs
++++ 14_virtual_mem_part2_mmio_remap/src/main.rs
 @@ -25,21 +25,39 @@
  #[no_mangle]
  unsafe fn kernel_init() -> ! {
@@ -2196,9 +2196,9 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/main.rs 15_virtual_mem_part2_m
      let (_, privilege_level) = exception::current_privilege_level();
      info!("Current privilege level: {}", privilege_level);
 
-diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/mapping_record.rs 15_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs
---- 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/mapping_record.rs
-+++ 15_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/mapping_record.rs 14_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs
+--- 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/mapping_record.rs
++++ 14_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs
 @@ -0,0 +1,221 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -2422,9 +2422,9 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/mapping_record.rs 1
 +    KERNEL_MAPPING_RECORD.read(|mr| mr.print());
 +}
 
-diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.rs 15_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs
---- 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.rs
-+++ 15_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.rs 14_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs
+--- 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.rs
++++ 14_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs
 @@ -8,7 +8,105 @@
  #[path = "../../_arch/aarch64/memory/mmu/translation_table.rs"]
  mod arch_translation_table;
@@ -2533,9 +2533,9 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.r
 +    }
 +}
 
-diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 15_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
---- 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs
-+++ 15_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
+--- 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs
++++ 14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
 @@ -0,0 +1,210 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -2748,9 +2748,9 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 15_virtual
 +    }
 +}
 
-diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 15_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
---- 14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs
-+++ 15_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
+--- 13_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs
++++ 14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
 @@ -3,29 +3,23 @@
  // Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
@@ -3119,9 +3119,9 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 15_virtual_mem_p
 +    mapping_record::kernel_print()
  }
 
-diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory.rs 15_virtual_mem_part2_mmio_remap/src/memory.rs
---- 14_exceptions_part2_peripheral_IRQs/src/memory.rs
-+++ 15_virtual_mem_part2_mmio_remap/src/memory.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory.rs 14_virtual_mem_part2_mmio_remap/src/memory.rs
+--- 13_exceptions_part2_peripheral_IRQs/src/memory.rs
++++ 14_virtual_mem_part2_mmio_remap/src/memory.rs
 @@ -6,12 +6,136 @@
 
  pub mod mmu;
@@ -3261,9 +3261,9 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/memory.rs 15_virtual_mem_part2
  ///
  /// # Safety
 
-diff -uNr 14_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs 15_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
---- 14_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs
-+++ 15_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs 14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
+--- 13_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs
++++ 14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
 @@ -21,7 +21,7 @@
 
  #[no_mangle]
diff --git a/15_virtual_mem_part2_mmio_remap/build.rs b/14_virtual_mem_part2_mmio_remap/build.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/build.rs
rename to 14_virtual_mem_part2_mmio_remap/build.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu.rs b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu.rs
rename to 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs
rename to 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.s b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.s
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.s
rename to 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.s
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/smp.rs b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/smp.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/smp.rs
rename to 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/smp.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
rename to 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.s b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.s
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.s
rename to 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.s
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception/asynchronous.rs b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception/asynchronous.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception/asynchronous.rs
rename to 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception/asynchronous.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
rename to 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
rename to 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/time.rs b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/time.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/_arch/aarch64/time.rs
rename to 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/time.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp.rs b/14_virtual_mem_part2_mmio_remap/src/bsp.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/bsp.rs
rename to 14_virtual_mem_part2_mmio_remap/src/bsp.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/bsp/device_driver.rs
rename to 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm.rs
rename to 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs
rename to 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicc.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicc.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicc.rs
rename to 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicc.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicd.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicd.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicd.rs
rename to 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicd.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm.rs
rename to 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
rename to 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
rename to 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
rename to 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
rename to 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/common.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/common.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/common.rs
rename to 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/common.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi.rs
rename to 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs
rename to 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/cpu.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/cpu.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/cpu.rs
rename to 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/cpu.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/driver.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/driver.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/driver.rs
rename to 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/driver.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/exception.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/exception.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/exception.rs
rename to 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/exception.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/exception/asynchronous.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/exception/asynchronous.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/exception/asynchronous.rs
rename to 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/exception/asynchronous.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
rename to 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
rename to 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
rename to 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/common.rs b/14_virtual_mem_part2_mmio_remap/src/common.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/common.rs
rename to 14_virtual_mem_part2_mmio_remap/src/common.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/console.rs b/14_virtual_mem_part2_mmio_remap/src/console.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/console.rs
rename to 14_virtual_mem_part2_mmio_remap/src/console.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/cpu.rs b/14_virtual_mem_part2_mmio_remap/src/cpu.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/cpu.rs
rename to 14_virtual_mem_part2_mmio_remap/src/cpu.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/cpu/boot.rs b/14_virtual_mem_part2_mmio_remap/src/cpu/boot.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/cpu/boot.rs
rename to 14_virtual_mem_part2_mmio_remap/src/cpu/boot.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/cpu/smp.rs b/14_virtual_mem_part2_mmio_remap/src/cpu/smp.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/cpu/smp.rs
rename to 14_virtual_mem_part2_mmio_remap/src/cpu/smp.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/driver.rs b/14_virtual_mem_part2_mmio_remap/src/driver.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/driver.rs
rename to 14_virtual_mem_part2_mmio_remap/src/driver.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/exception.rs b/14_virtual_mem_part2_mmio_remap/src/exception.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/exception.rs
rename to 14_virtual_mem_part2_mmio_remap/src/exception.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/exception/asynchronous.rs b/14_virtual_mem_part2_mmio_remap/src/exception/asynchronous.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/exception/asynchronous.rs
rename to 14_virtual_mem_part2_mmio_remap/src/exception/asynchronous.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/lib.rs b/14_virtual_mem_part2_mmio_remap/src/lib.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/lib.rs
rename to 14_virtual_mem_part2_mmio_remap/src/lib.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/main.rs b/14_virtual_mem_part2_mmio_remap/src/main.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/main.rs
rename to 14_virtual_mem_part2_mmio_remap/src/main.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/memory.rs b/14_virtual_mem_part2_mmio_remap/src/memory.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/memory.rs
rename to 14_virtual_mem_part2_mmio_remap/src/memory.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/memory/mmu.rs b/14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
rename to 14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs b/14_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs
rename to 14_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs b/14_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs
rename to 14_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs b/14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
rename to 14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/panic_wait.rs b/14_virtual_mem_part2_mmio_remap/src/panic_wait.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/panic_wait.rs
rename to 14_virtual_mem_part2_mmio_remap/src/panic_wait.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/print.rs b/14_virtual_mem_part2_mmio_remap/src/print.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/print.rs
rename to 14_virtual_mem_part2_mmio_remap/src/print.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/runtime_init.rs b/14_virtual_mem_part2_mmio_remap/src/runtime_init.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/runtime_init.rs
rename to 14_virtual_mem_part2_mmio_remap/src/runtime_init.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/state.rs b/14_virtual_mem_part2_mmio_remap/src/state.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/state.rs
rename to 14_virtual_mem_part2_mmio_remap/src/state.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/synchronization.rs b/14_virtual_mem_part2_mmio_remap/src/synchronization.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/synchronization.rs
rename to 14_virtual_mem_part2_mmio_remap/src/synchronization.rs
diff --git a/15_virtual_mem_part2_mmio_remap/src/time.rs b/14_virtual_mem_part2_mmio_remap/src/time.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/src/time.rs
rename to 14_virtual_mem_part2_mmio_remap/src/time.rs
diff --git a/15_virtual_mem_part2_mmio_remap/test-macros/Cargo.toml b/14_virtual_mem_part2_mmio_remap/test-macros/Cargo.toml
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/test-macros/Cargo.toml
rename to 14_virtual_mem_part2_mmio_remap/test-macros/Cargo.toml
diff --git a/15_virtual_mem_part2_mmio_remap/test-macros/src/lib.rs b/14_virtual_mem_part2_mmio_remap/test-macros/src/lib.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/test-macros/src/lib.rs
rename to 14_virtual_mem_part2_mmio_remap/test-macros/src/lib.rs
diff --git a/15_virtual_mem_part2_mmio_remap/test-types/Cargo.toml b/14_virtual_mem_part2_mmio_remap/test-types/Cargo.toml
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/test-types/Cargo.toml
rename to 14_virtual_mem_part2_mmio_remap/test-types/Cargo.toml
diff --git a/15_virtual_mem_part2_mmio_remap/test-types/src/lib.rs b/14_virtual_mem_part2_mmio_remap/test-types/src/lib.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/test-types/src/lib.rs
rename to 14_virtual_mem_part2_mmio_remap/test-types/src/lib.rs
diff --git a/15_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rb b/14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rb
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rb
rename to 14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rb
diff --git a/15_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs b/14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs
rename to 14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs
diff --git a/15_virtual_mem_part2_mmio_remap/tests/01_timer_sanity.rs b/14_virtual_mem_part2_mmio_remap/tests/01_timer_sanity.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/tests/01_timer_sanity.rs
rename to 14_virtual_mem_part2_mmio_remap/tests/01_timer_sanity.rs
diff --git a/15_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs b/14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
rename to 14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
diff --git a/15_virtual_mem_part2_mmio_remap/tests/03_exception_irq_sanity.rs b/14_virtual_mem_part2_mmio_remap/tests/03_exception_irq_sanity.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/tests/03_exception_irq_sanity.rs
rename to 14_virtual_mem_part2_mmio_remap/tests/03_exception_irq_sanity.rs
diff --git a/15_virtual_mem_part2_mmio_remap/tests/panic_exit_success/mod.rs b/14_virtual_mem_part2_mmio_remap/tests/panic_exit_success/mod.rs
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/tests/panic_exit_success/mod.rs
rename to 14_virtual_mem_part2_mmio_remap/tests/panic_exit_success/mod.rs
diff --git a/15_virtual_mem_part2_mmio_remap/tests/runner.rb b/14_virtual_mem_part2_mmio_remap/tests/runner.rb
similarity index 100%
rename from 15_virtual_mem_part2_mmio_remap/tests/runner.rb
rename to 14_virtual_mem_part2_mmio_remap/tests/runner.rb
diff --git a/README.md b/README.md
index daf3b7d74..183b33d4e 100644
--- a/README.md
+++ b/README.md
@@ -18,8 +18,9 @@ Have fun!
 
 _Best regards,<br>Andre ([@andre-richter])_
 
-P.S.: In the future, Chinese :cn: versions of the tutorials will be maintained as
-[`README.CN.md`](README.CN.md) by [@colachg] and [@readlnh].
+P.S.: Chinese :cn: versions of the tutorials were started by [@colachg] and [@readlnh]. You can find
+them as [`README.CN.md`](README.CN.md) in the respective folders. They are a bit out-of-date at the
+moment though.
 
 [ARMv8-A architecture]: https://developer.arm.com/products/architecture/cpu-architecture/a-profile/docs
 [monolithic]: https://en.wikipedia.org/wiki/Monolithic_kernel
@@ -40,7 +41,7 @@ P.S.: In the future, Chinese :cn: versions of the tutorials will be maintained a
 - The code written in these tutorials supports and runs on the **Raspberry Pi 3** and the
   **Raspberry Pi 4**.
   - Tutorials 1 till 5 are groundwork code which only makes sense to run in `QEMU`.
-  - Starting with [tutorial 6](06_drivers_gpio_uart), you can load and run the kernel on the real
+  - Starting with [tutorial 5](05_drivers_gpio_uart), you can load and run the kernel on the real
     Raspberrys and observe output over `UART`.
 - Although the Raspberry Pi 3 and 4 are the main target boards, the code is written in a modular
   fashion which allows for easy porting to other CPU architectures and/or boards.
@@ -125,9 +126,9 @@ get a USB serial cable to get the full experience.
 - You can find USB-to-serial cables that should work right away at [\[1\]] [\[2\]], but many others
   will work too. Ideally, your cable is based on the `CP2102` chip.
 - You connect it to `GND` and GPIO pins `14/15` as shown below.
-- [Tutorial 6](06_drivers_gpio_uart) is the first where you can use it. Check it out for
+- [Tutorial 5](05_drivers_gpio_uart) is the first where you can use it. Check it out for
   instructions on how to prepare the SD card to boot your self-made kernel from it.
-- Starting with [tutorial 7](07_uart_chainloader), booting kernels on your Raspberry is getting
+- Starting with [tutorial 6](06_uart_chainloader), booting kernels on your Raspberry is getting
   _really_ comfortable. In this tutorial, a so-called `chainloader` is developed, which will be the
   last file you need to manually copy on the SD card for a while. It will enable you to load the
   tutorial kernels during boot on demand over `UART`.
diff --git a/utils/devtool.rb b/utils/devtool.rb
index 66271202f..4f8700694 100755
--- a/utils/devtool.rb
+++ b/utils/devtool.rb
@@ -147,7 +147,7 @@ def make_xtra
         return if @user_has_supplied_crates
 
         puts 'Make Xtra stuff'.light_blue
-        system('cd 07_uart_chainloader && bash update.sh')
+        system('cd *_uart_chainloader && bash update.sh')
         system('cd X1_JTAG_boot && bash update.sh')
     end
 

From b4ed84dd77196a7eb9f599dc6cd55d87888ea4e4 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 22 Mar 2021 22:54:08 +0100
Subject: [PATCH 044/214] Replace ldr pseudo-instruction with adrp/add

---
 02_runtime_init/README.md                     |  18 +++++++--
 02_runtime_init/src/_arch/aarch64/cpu/boot.s  |  14 ++++++-
 .../src/_arch/aarch64/cpu/boot.s              |  14 ++++++-
 04_safe_globals/src/_arch/aarch64/cpu/boot.s  |  14 ++++++-
 .../src/_arch/aarch64/cpu/boot.s              |  14 ++++++-
 06_uart_chainloader/README.md                 |  35 ++++++++++++++----
 06_uart_chainloader/demo_payload_rpi3.img     | Bin 6840 -> 6840 bytes
 06_uart_chainloader/demo_payload_rpi4.img     | Bin 6680 -> 6680 bytes
 .../src/_arch/aarch64/cpu/boot.s              |  33 ++++++++++++++---
 07_timestamps/README.md                       |  35 ++++++++++++++----
 07_timestamps/src/_arch/aarch64/cpu/boot.s    |  14 ++++++-
 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s |  14 ++++++-
 09_privilege_level/README.md                  |  12 +++---
 .../src/_arch/aarch64/cpu/boot.s              |  14 ++++++-
 .../src/_arch/aarch64/cpu/boot.s              |  14 ++++++-
 .../src/_arch/aarch64/cpu/boot.s              |  14 ++++++-
 .../src/_arch/aarch64/cpu/boot.s              |  14 ++++++-
 .../src/_arch/aarch64/cpu/boot.s              |  14 ++++++-
 .../src/_arch/aarch64/cpu/boot.s              |  14 ++++++-
 X1_JTAG_boot/jtag_boot_rpi3.img               | Bin 8176 -> 8176 bytes
 X1_JTAG_boot/jtag_boot_rpi4.img               | Bin 6848 -> 6848 bytes
 X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s     |  14 ++++++-
 22 files changed, 272 insertions(+), 43 deletions(-)

diff --git a/02_runtime_init/README.md b/02_runtime_init/README.md
index 64e36440e..811433040 100644
--- a/02_runtime_init/README.md
+++ b/02_runtime_init/README.md
@@ -84,20 +84,32 @@ diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.rs 02_runtime_init/src/_arc
 diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.s 02_runtime_init/src/_arch/aarch64/cpu/boot.s
 --- 01_wait_forever/src/_arch/aarch64/cpu/boot.s
 +++ 02_runtime_init/src/_arch/aarch64/cpu/boot.s
-@@ -3,6 +3,12 @@
+@@ -3,6 +3,24 @@
  // Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
 
  //--------------------------------------------------------------------------------------------------
 +// Definitions
 +//--------------------------------------------------------------------------------------------------
 +
++// Load the address of a symbol into a register, PC-relative.
++//
++// The symbol must lie within +/- 4 GiB of the Program Counter.
++//
++// # Resources
++//
++// - https://sourceware.org/binutils/docs-2.36/as/AArch64_002dRelocations.html
++.macro ADR_REL register, symbol
++	adrp	\register, \symbol
++	add	\register, \register, #:lo12:\symbol
++.endm
++
 +.equ _core_id_mask, 0b11
 +
 +//--------------------------------------------------------------------------------------------------
  // Public Code
  //--------------------------------------------------------------------------------------------------
  .section .text._start
-@@ -11,6 +17,22 @@
+@@ -11,6 +29,22 @@
  // fn _start()
  //------------------------------------------------------------------------------
  _start:
@@ -111,7 +123,7 @@ diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.s 02_runtime_init/src/_arch
 +	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
 +
 +	// Set the stack pointer.
-+	ldr	x0, =__boot_core_stack_end_exclusive
++	ADR_REL	x0, __boot_core_stack_end_exclusive
 +	mov	sp, x0
 +
 +	// Jump to Rust code.
diff --git a/02_runtime_init/src/_arch/aarch64/cpu/boot.s b/02_runtime_init/src/_arch/aarch64/cpu/boot.s
index ad4a26892..bfa94abf3 100644
--- a/02_runtime_init/src/_arch/aarch64/cpu/boot.s
+++ b/02_runtime_init/src/_arch/aarch64/cpu/boot.s
@@ -6,6 +6,18 @@
 // Definitions
 //--------------------------------------------------------------------------------------------------
 
+// Load the address of a symbol into a register, PC-relative.
+//
+// The symbol must lie within +/- 4 GiB of the Program Counter.
+//
+// # Resources
+//
+// - https://sourceware.org/binutils/docs-2.36/as/AArch64_002dRelocations.html
+.macro ADR_REL register, symbol
+	adrp	\register, \symbol
+	add	\register, \register, #:lo12:\symbol
+.endm
+
 .equ _core_id_mask, 0b11
 
 //--------------------------------------------------------------------------------------------------
@@ -27,7 +39,7 @@ _start:
 	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
 
 	// Set the stack pointer.
-	ldr	x0, =__boot_core_stack_end_exclusive
+	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
 
 	// Jump to Rust code.
diff --git a/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.s b/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.s
index ad4a26892..bfa94abf3 100644
--- a/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.s
+++ b/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.s
@@ -6,6 +6,18 @@
 // Definitions
 //--------------------------------------------------------------------------------------------------
 
+// Load the address of a symbol into a register, PC-relative.
+//
+// The symbol must lie within +/- 4 GiB of the Program Counter.
+//
+// # Resources
+//
+// - https://sourceware.org/binutils/docs-2.36/as/AArch64_002dRelocations.html
+.macro ADR_REL register, symbol
+	adrp	\register, \symbol
+	add	\register, \register, #:lo12:\symbol
+.endm
+
 .equ _core_id_mask, 0b11
 
 //--------------------------------------------------------------------------------------------------
@@ -27,7 +39,7 @@ _start:
 	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
 
 	// Set the stack pointer.
-	ldr	x0, =__boot_core_stack_end_exclusive
+	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
 
 	// Jump to Rust code.
diff --git a/04_safe_globals/src/_arch/aarch64/cpu/boot.s b/04_safe_globals/src/_arch/aarch64/cpu/boot.s
index ad4a26892..bfa94abf3 100644
--- a/04_safe_globals/src/_arch/aarch64/cpu/boot.s
+++ b/04_safe_globals/src/_arch/aarch64/cpu/boot.s
@@ -6,6 +6,18 @@
 // Definitions
 //--------------------------------------------------------------------------------------------------
 
+// Load the address of a symbol into a register, PC-relative.
+//
+// The symbol must lie within +/- 4 GiB of the Program Counter.
+//
+// # Resources
+//
+// - https://sourceware.org/binutils/docs-2.36/as/AArch64_002dRelocations.html
+.macro ADR_REL register, symbol
+	adrp	\register, \symbol
+	add	\register, \register, #:lo12:\symbol
+.endm
+
 .equ _core_id_mask, 0b11
 
 //--------------------------------------------------------------------------------------------------
@@ -27,7 +39,7 @@ _start:
 	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
 
 	// Set the stack pointer.
-	ldr	x0, =__boot_core_stack_end_exclusive
+	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
 
 	// Jump to Rust code.
diff --git a/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s b/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s
index ad4a26892..bfa94abf3 100644
--- a/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s
+++ b/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s
@@ -6,6 +6,18 @@
 // Definitions
 //--------------------------------------------------------------------------------------------------
 
+// Load the address of a symbol into a register, PC-relative.
+//
+// The symbol must lie within +/- 4 GiB of the Program Counter.
+//
+// # Resources
+//
+// - https://sourceware.org/binutils/docs-2.36/as/AArch64_002dRelocations.html
+.macro ADR_REL register, symbol
+	adrp	\register, \symbol
+	add	\register, \register, #:lo12:\symbol
+.endm
+
 .equ _core_id_mask, 0b11
 
 //--------------------------------------------------------------------------------------------------
@@ -27,7 +39,7 @@ _start:
 	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
 
 	// Set the stack pointer.
-	ldr	x0, =__boot_core_stack_end_exclusive
+	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
 
 	// Jump to Rust code.
diff --git a/06_uart_chainloader/README.md b/06_uart_chainloader/README.md
index 457a96cd4..89a4c796e 100644
--- a/06_uart_chainloader/README.md
+++ b/06_uart_chainloader/README.md
@@ -179,20 +179,38 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
 diff -uNr 05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s 06_uart_chainloader/src/_arch/aarch64/cpu/boot.s
 --- 05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s
 +++ 06_uart_chainloader/src/_arch/aarch64/cpu/boot.s
-@@ -22,20 +22,31 @@
+@@ -18,6 +18,17 @@
+ 	add	\register, \register, #:lo12:\symbol
+ .endm
+
++// Load the address of a symbol into a register, absolute.
++//
++// # Resources
++//
++// - https://sourceware.org/binutils/docs-2.36/as/AArch64_002dRelocations.html
++.macro ADR_ABS register, symbol
++	movz	\register, #:abs_g2:\symbol
++	movk	\register, #:abs_g1_nc:\symbol
++	movk	\register, #:abs_g0_nc:\symbol
++.endm
++
+ .equ _core_id_mask, 0b11
+
+ //--------------------------------------------------------------------------------------------------
+@@ -34,20 +45,31 @@
  	and	x1, x1, _core_id_mask
  	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
  	cmp	x1, x2
 -	b.ne	1f
 +	b.ne	2f
++
++	// If execution reaches here, it is the boot core.
 
 -	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
-+	// If execution reaches here, it is the boot core.
-+
 +	// Next, relocate the binary.
-+	adr	x0, __binary_nonzero_start          // The address the binary got loaded to.
-+	ldr	x1, =__binary_nonzero_start         // The address the binary was linked to.
-+	ldr	x2, =__binary_nonzero_end_exclusive
++	ADR_REL	x0, __binary_nonzero_start         // The address the binary got loaded to.
++	ADR_ABS	x1, __binary_nonzero_start         // The address the binary was linked to.
++	ADR_ABS	x2, __binary_nonzero_end_exclusive
 +
 +1:	ldr	x3, [x0], #8
 +	str	x3, [x1], #8
@@ -200,13 +218,14 @@ diff -uNr 05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s 06_uart_chainloader/
 +	b.lo	1b
 
  	// Set the stack pointer.
- 	ldr	x0, =__boot_core_stack_end_exclusive
+-	ADR_REL	x0, __boot_core_stack_end_exclusive
++	ADR_ABS	x0, __boot_core_stack_end_exclusive
  	mov	sp, x0
 
 -	// Jump to Rust code.
 -	b	_start_rust
 +	// Jump to the relocated Rust code.
-+	ldr	x1, =_start_rust
++	ADR_ABS	x1, _start_rust
 +	br	x1
 
  	// Infinitely wait for events (aka "park the core").
diff --git a/06_uart_chainloader/demo_payload_rpi3.img b/06_uart_chainloader/demo_payload_rpi3.img
index 91602b45b02de681e2e3f0706864f16396592fa9..203ebb7652369e33837c1da09e9b7b7998e4bcf4 100755
GIT binary patch
delta 53
zcmdmCy2DgwA%n$LMHYuiPK*o@_6$s~7cww}FfcGo0OE=AK+ML#AQG>@eD(kT|Kb~U
GdZYk}WDh|A

delta 53
zcmdmCy2DgwA%n$LMHYuiPK*o@_6$s~8yOfv7BDbG$TKiZWM^OyiC190`v3obaRvqs
JhK)KsQUIEt4*>uG

diff --git a/06_uart_chainloader/demo_payload_rpi4.img b/06_uart_chainloader/demo_payload_rpi4.img
index b1060665b4af3eadced31cec72de42265985d110..b06166dcbae527c6f1cc42c11d9200ed60f9dabf 100755
GIT binary patch
delta 53
zcmbPXGQ&h?A%n$LMHYuiPK*o@_6$s~7cww}FfcGo0OE=AK+ML#AQG>@eD(kT|Kb~U
H-bexfe7z4|

delta 53
zcmbPXGQ&h?A%n$LMHYuiPK*o@_6$s~8yOfv7BDbG$TKiZWM^OyiC190`v3obaRvqs
JhK)LJBms^14;}yj

diff --git a/06_uart_chainloader/src/_arch/aarch64/cpu/boot.s b/06_uart_chainloader/src/_arch/aarch64/cpu/boot.s
index 4f45ebd12..10aebb343 100644
--- a/06_uart_chainloader/src/_arch/aarch64/cpu/boot.s
+++ b/06_uart_chainloader/src/_arch/aarch64/cpu/boot.s
@@ -6,6 +6,29 @@
 // Definitions
 //--------------------------------------------------------------------------------------------------
 
+// Load the address of a symbol into a register, PC-relative.
+//
+// The symbol must lie within +/- 4 GiB of the Program Counter.
+//
+// # Resources
+//
+// - https://sourceware.org/binutils/docs-2.36/as/AArch64_002dRelocations.html
+.macro ADR_REL register, symbol
+	adrp	\register, \symbol
+	add	\register, \register, #:lo12:\symbol
+.endm
+
+// Load the address of a symbol into a register, absolute.
+//
+// # Resources
+//
+// - https://sourceware.org/binutils/docs-2.36/as/AArch64_002dRelocations.html
+.macro ADR_ABS register, symbol
+	movz	\register, #:abs_g2:\symbol
+	movk	\register, #:abs_g1_nc:\symbol
+	movk	\register, #:abs_g0_nc:\symbol
+.endm
+
 .equ _core_id_mask, 0b11
 
 //--------------------------------------------------------------------------------------------------
@@ -27,9 +50,9 @@ _start:
 	// If execution reaches here, it is the boot core.
 
 	// Next, relocate the binary.
-	adr	x0, __binary_nonzero_start          // The address the binary got loaded to.
-	ldr	x1, =__binary_nonzero_start         // The address the binary was linked to.
-	ldr	x2, =__binary_nonzero_end_exclusive
+	ADR_REL	x0, __binary_nonzero_start         // The address the binary got loaded to.
+	ADR_ABS	x1, __binary_nonzero_start         // The address the binary was linked to.
+	ADR_ABS	x2, __binary_nonzero_end_exclusive
 
 1:	ldr	x3, [x0], #8
 	str	x3, [x1], #8
@@ -37,11 +60,11 @@ _start:
 	b.lo	1b
 
 	// Set the stack pointer.
-	ldr	x0, =__boot_core_stack_end_exclusive
+	ADR_ABS	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
 
 	// Jump to the relocated Rust code.
-	ldr	x1, =_start_rust
+	ADR_ABS	x1, _start_rust
 	br	x1
 
 	// Infinitely wait for events (aka "park the core").
diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index b115dc09d..b898aa409 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -96,19 +96,37 @@ diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
 diff -uNr 06_uart_chainloader/src/_arch/aarch64/cpu/boot.s 07_timestamps/src/_arch/aarch64/cpu/boot.s
 --- 06_uart_chainloader/src/_arch/aarch64/cpu/boot.s
 +++ 07_timestamps/src/_arch/aarch64/cpu/boot.s
-@@ -22,31 +22,20 @@
+@@ -18,17 +18,6 @@
+ 	add	\register, \register, #:lo12:\symbol
+ .endm
+
+-// Load the address of a symbol into a register, absolute.
+-//
+-// # Resources
+-//
+-// - https://sourceware.org/binutils/docs-2.36/as/AArch64_002dRelocations.html
+-.macro ADR_ABS register, symbol
+-	movz	\register, #:abs_g2:\symbol
+-	movk	\register, #:abs_g1_nc:\symbol
+-	movk	\register, #:abs_g0_nc:\symbol
+-.endm
+-
+ .equ _core_id_mask, 0b11
+
+ //--------------------------------------------------------------------------------------------------
+@@ -45,31 +34,20 @@
  	and	x1, x1, _core_id_mask
  	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
  	cmp	x1, x2
 -	b.ne	2f
+-
+-	// If execution reaches here, it is the boot core.
 +	b.ne	1f
 
--	// If execution reaches here, it is the boot core.
--
 -	// Next, relocate the binary.
--	adr	x0, __binary_nonzero_start          // The address the binary got loaded to.
--	ldr	x1, =__binary_nonzero_start         // The address the binary was linked to.
--	ldr	x2, =__binary_nonzero_end_exclusive
+-	ADR_REL	x0, __binary_nonzero_start         // The address the binary got loaded to.
+-	ADR_ABS	x1, __binary_nonzero_start         // The address the binary was linked to.
+-	ADR_ABS	x2, __binary_nonzero_end_exclusive
 -
 -1:	ldr	x3, [x0], #8
 -	str	x3, [x1], #8
@@ -117,11 +135,12 @@ diff -uNr 06_uart_chainloader/src/_arch/aarch64/cpu/boot.s 07_timestamps/src/_ar
 +	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
 
  	// Set the stack pointer.
- 	ldr	x0, =__boot_core_stack_end_exclusive
+-	ADR_ABS	x0, __boot_core_stack_end_exclusive
++	ADR_REL	x0, __boot_core_stack_end_exclusive
  	mov	sp, x0
 
 -	// Jump to the relocated Rust code.
--	ldr	x1, =_start_rust
+-	ADR_ABS	x1, _start_rust
 -	br	x1
 +	// Jump to Rust code.
 +	b	_start_rust
diff --git a/07_timestamps/src/_arch/aarch64/cpu/boot.s b/07_timestamps/src/_arch/aarch64/cpu/boot.s
index ad4a26892..bfa94abf3 100644
--- a/07_timestamps/src/_arch/aarch64/cpu/boot.s
+++ b/07_timestamps/src/_arch/aarch64/cpu/boot.s
@@ -6,6 +6,18 @@
 // Definitions
 //--------------------------------------------------------------------------------------------------
 
+// Load the address of a symbol into a register, PC-relative.
+//
+// The symbol must lie within +/- 4 GiB of the Program Counter.
+//
+// # Resources
+//
+// - https://sourceware.org/binutils/docs-2.36/as/AArch64_002dRelocations.html
+.macro ADR_REL register, symbol
+	adrp	\register, \symbol
+	add	\register, \register, #:lo12:\symbol
+.endm
+
 .equ _core_id_mask, 0b11
 
 //--------------------------------------------------------------------------------------------------
@@ -27,7 +39,7 @@ _start:
 	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
 
 	// Set the stack pointer.
-	ldr	x0, =__boot_core_stack_end_exclusive
+	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
 
 	// Jump to Rust code.
diff --git a/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s b/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s
index ad4a26892..bfa94abf3 100644
--- a/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s
+++ b/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s
@@ -6,6 +6,18 @@
 // Definitions
 //--------------------------------------------------------------------------------------------------
 
+// Load the address of a symbol into a register, PC-relative.
+//
+// The symbol must lie within +/- 4 GiB of the Program Counter.
+//
+// # Resources
+//
+// - https://sourceware.org/binutils/docs-2.36/as/AArch64_002dRelocations.html
+.macro ADR_REL register, symbol
+	adrp	\register, \symbol
+	add	\register, \register, #:lo12:\symbol
+.endm
+
 .equ _core_id_mask, 0b11
 
 //--------------------------------------------------------------------------------------------------
@@ -27,7 +39,7 @@ _start:
 	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
 
 	// Set the stack pointer.
-	ldr	x0, =__boot_core_stack_end_exclusive
+	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
 
 	// Jump to Rust code.
diff --git a/09_privilege_level/README.md b/09_privilege_level/README.md
index b8af30216..b786bf33c 100644
--- a/09_privilege_level/README.md
+++ b/09_privilege_level/README.md
@@ -273,15 +273,15 @@ diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs 09_privilege_level/src/
 diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s 09_privilege_level/src/_arch/aarch64/cpu/boot.s
 --- 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s
 +++ 09_privilege_level/src/_arch/aarch64/cpu/boot.s
-@@ -6,6 +6,7 @@
- // Definitions
- //--------------------------------------------------------------------------------------------------
+@@ -18,6 +18,7 @@
+ 	add	\register, \register, #:lo12:\symbol
+ .endm
 
 +.equ _EL2, 0x8
  .equ _core_id_mask, 0b11
 
  //--------------------------------------------------------------------------------------------------
-@@ -17,6 +18,11 @@
+@@ -29,6 +30,11 @@
  // fn _start()
  //------------------------------------------------------------------------------
  _start:
@@ -293,13 +293,13 @@ diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s 09_privilege_level/src/_
  	// Only proceed on the boot core. Park it otherwise.
  	mrs	x1, MPIDR_EL1
  	and	x1, x1, _core_id_mask
-@@ -26,11 +32,11 @@
+@@ -38,11 +44,11 @@
 
  	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
 
 -	// Set the stack pointer.
 +	// Set the stack pointer. This ensures that any code in EL2 that needs the stack will work.
- 	ldr	x0, =__boot_core_stack_end_exclusive
+ 	ADR_REL	x0, __boot_core_stack_end_exclusive
  	mov	sp, x0
 
 -	// Jump to Rust code.
diff --git a/09_privilege_level/src/_arch/aarch64/cpu/boot.s b/09_privilege_level/src/_arch/aarch64/cpu/boot.s
index be81b20a2..5696220d0 100644
--- a/09_privilege_level/src/_arch/aarch64/cpu/boot.s
+++ b/09_privilege_level/src/_arch/aarch64/cpu/boot.s
@@ -6,6 +6,18 @@
 // Definitions
 //--------------------------------------------------------------------------------------------------
 
+// Load the address of a symbol into a register, PC-relative.
+//
+// The symbol must lie within +/- 4 GiB of the Program Counter.
+//
+// # Resources
+//
+// - https://sourceware.org/binutils/docs-2.36/as/AArch64_002dRelocations.html
+.macro ADR_REL register, symbol
+	adrp	\register, \symbol
+	add	\register, \register, #:lo12:\symbol
+.endm
+
 .equ _EL2, 0x8
 .equ _core_id_mask, 0b11
 
@@ -33,7 +45,7 @@ _start:
 	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
 
 	// Set the stack pointer. This ensures that any code in EL2 that needs the stack will work.
-	ldr	x0, =__boot_core_stack_end_exclusive
+	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
 
 	// Jump to Rust code. x0 holds the function argument provided to _start_rust().
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.s b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.s
index be81b20a2..5696220d0 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.s
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.s
@@ -6,6 +6,18 @@
 // Definitions
 //--------------------------------------------------------------------------------------------------
 
+// Load the address of a symbol into a register, PC-relative.
+//
+// The symbol must lie within +/- 4 GiB of the Program Counter.
+//
+// # Resources
+//
+// - https://sourceware.org/binutils/docs-2.36/as/AArch64_002dRelocations.html
+.macro ADR_REL register, symbol
+	adrp	\register, \symbol
+	add	\register, \register, #:lo12:\symbol
+.endm
+
 .equ _EL2, 0x8
 .equ _core_id_mask, 0b11
 
@@ -33,7 +45,7 @@ _start:
 	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
 
 	// Set the stack pointer. This ensures that any code in EL2 that needs the stack will work.
-	ldr	x0, =__boot_core_stack_end_exclusive
+	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
 
 	// Jump to Rust code. x0 holds the function argument provided to _start_rust().
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.s b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.s
index be81b20a2..5696220d0 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.s
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.s
@@ -6,6 +6,18 @@
 // Definitions
 //--------------------------------------------------------------------------------------------------
 
+// Load the address of a symbol into a register, PC-relative.
+//
+// The symbol must lie within +/- 4 GiB of the Program Counter.
+//
+// # Resources
+//
+// - https://sourceware.org/binutils/docs-2.36/as/AArch64_002dRelocations.html
+.macro ADR_REL register, symbol
+	adrp	\register, \symbol
+	add	\register, \register, #:lo12:\symbol
+.endm
+
 .equ _EL2, 0x8
 .equ _core_id_mask, 0b11
 
@@ -33,7 +45,7 @@ _start:
 	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
 
 	// Set the stack pointer. This ensures that any code in EL2 that needs the stack will work.
-	ldr	x0, =__boot_core_stack_end_exclusive
+	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
 
 	// Jump to Rust code. x0 holds the function argument provided to _start_rust().
diff --git a/12_integrated_testing/src/_arch/aarch64/cpu/boot.s b/12_integrated_testing/src/_arch/aarch64/cpu/boot.s
index be81b20a2..5696220d0 100644
--- a/12_integrated_testing/src/_arch/aarch64/cpu/boot.s
+++ b/12_integrated_testing/src/_arch/aarch64/cpu/boot.s
@@ -6,6 +6,18 @@
 // Definitions
 //--------------------------------------------------------------------------------------------------
 
+// Load the address of a symbol into a register, PC-relative.
+//
+// The symbol must lie within +/- 4 GiB of the Program Counter.
+//
+// # Resources
+//
+// - https://sourceware.org/binutils/docs-2.36/as/AArch64_002dRelocations.html
+.macro ADR_REL register, symbol
+	adrp	\register, \symbol
+	add	\register, \register, #:lo12:\symbol
+.endm
+
 .equ _EL2, 0x8
 .equ _core_id_mask, 0b11
 
@@ -33,7 +45,7 @@ _start:
 	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
 
 	// Set the stack pointer. This ensures that any code in EL2 that needs the stack will work.
-	ldr	x0, =__boot_core_stack_end_exclusive
+	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
 
 	// Jump to Rust code. x0 holds the function argument provided to _start_rust().
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.s b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.s
index be81b20a2..5696220d0 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.s
+++ b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.s
@@ -6,6 +6,18 @@
 // Definitions
 //--------------------------------------------------------------------------------------------------
 
+// Load the address of a symbol into a register, PC-relative.
+//
+// The symbol must lie within +/- 4 GiB of the Program Counter.
+//
+// # Resources
+//
+// - https://sourceware.org/binutils/docs-2.36/as/AArch64_002dRelocations.html
+.macro ADR_REL register, symbol
+	adrp	\register, \symbol
+	add	\register, \register, #:lo12:\symbol
+.endm
+
 .equ _EL2, 0x8
 .equ _core_id_mask, 0b11
 
@@ -33,7 +45,7 @@ _start:
 	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
 
 	// Set the stack pointer. This ensures that any code in EL2 that needs the stack will work.
-	ldr	x0, =__boot_core_stack_end_exclusive
+	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
 
 	// Jump to Rust code. x0 holds the function argument provided to _start_rust().
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.s b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.s
index be81b20a2..5696220d0 100644
--- a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.s
+++ b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.s
@@ -6,6 +6,18 @@
 // Definitions
 //--------------------------------------------------------------------------------------------------
 
+// Load the address of a symbol into a register, PC-relative.
+//
+// The symbol must lie within +/- 4 GiB of the Program Counter.
+//
+// # Resources
+//
+// - https://sourceware.org/binutils/docs-2.36/as/AArch64_002dRelocations.html
+.macro ADR_REL register, symbol
+	adrp	\register, \symbol
+	add	\register, \register, #:lo12:\symbol
+.endm
+
 .equ _EL2, 0x8
 .equ _core_id_mask, 0b11
 
@@ -33,7 +45,7 @@ _start:
 	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
 
 	// Set the stack pointer. This ensures that any code in EL2 that needs the stack will work.
-	ldr	x0, =__boot_core_stack_end_exclusive
+	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
 
 	// Jump to Rust code. x0 holds the function argument provided to _start_rust().
diff --git a/X1_JTAG_boot/jtag_boot_rpi3.img b/X1_JTAG_boot/jtag_boot_rpi3.img
index 8eed7dba0e7d56b27a14d14f981f77b599d9b6c3..53be6bb3a5207dad2a75a526053ad11b367272c0 100755
GIT binary patch
delta 53
zcmexh|G{2oA%n$LMHYuiPK*o@_6$s~7cww}FfcGo0OE=AK+ML#AQG>@eD(kT|Kb~U
Hj>rQ5q?Hf?

delta 53
zcmexh|G{2oA%n$LMHYuiPK*o@_6$s~8yOfv7BDbG$TKiZWM^OyiC190`v3obaRvqs
JhK)K$<N>wN55fQd

diff --git a/X1_JTAG_boot/jtag_boot_rpi4.img b/X1_JTAG_boot/jtag_boot_rpi4.img
index cbdd1b808832df622e2be50a4bb24e5437756355..5e1e1bf7d6716daa5b88a735299e89c268faf47d 100755
GIT binary patch
delta 53
zcmX?Ldcag?A%n$LMHYuiPK*o@_6$s~7cww}FfcGo0OE=AK+ML#AQG>@eD(kT|Kb~U
Hrbqz*jI<9~

delta 53
zcmX?Ldcag?A%n$LMHYuiPK*o@_6$s~8yOfv7BDbG$TKiZWM^OyiC190`v3obaRvqs
JhK)K?qyU}o4;cUe

diff --git a/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s b/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s
index ad4a26892..bfa94abf3 100644
--- a/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s
+++ b/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s
@@ -6,6 +6,18 @@
 // Definitions
 //--------------------------------------------------------------------------------------------------
 
+// Load the address of a symbol into a register, PC-relative.
+//
+// The symbol must lie within +/- 4 GiB of the Program Counter.
+//
+// # Resources
+//
+// - https://sourceware.org/binutils/docs-2.36/as/AArch64_002dRelocations.html
+.macro ADR_REL register, symbol
+	adrp	\register, \symbol
+	add	\register, \register, #:lo12:\symbol
+.endm
+
 .equ _core_id_mask, 0b11
 
 //--------------------------------------------------------------------------------------------------
@@ -27,7 +39,7 @@ _start:
 	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
 
 	// Set the stack pointer.
-	ldr	x0, =__boot_core_stack_end_exclusive
+	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
 
 	// Jump to Rust code.

From c0da8ab1b70cb5fc34652cbd547337046716d83e Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Wed, 24 Mar 2021 00:00:21 +0100
Subject: [PATCH 045/214] Remove confusing statement

---
 02_runtime_init/README.md                         | 15 ++++-----------
 02_runtime_init/src/bsp/raspberrypi/link.ld       | 13 +++----------
 03_hacky_hello_world/src/bsp/raspberrypi/link.ld  | 13 +++----------
 04_safe_globals/src/bsp/raspberrypi/link.ld       | 13 +++----------
 05_drivers_gpio_uart/src/bsp/raspberrypi/link.ld  | 13 +++----------
 06_uart_chainloader/README.md                     |  2 +-
 06_uart_chainloader/src/bsp/raspberrypi/link.ld   | 13 +++----------
 07_timestamps/README.md                           |  2 +-
 07_timestamps/src/bsp/raspberrypi/link.ld         | 13 +++----------
 08_hw_debug_JTAG/src/bsp/raspberrypi/link.ld      | 13 +++----------
 09_privilege_level/src/bsp/raspberrypi/link.ld    | 13 +++----------
 10_virtual_mem_part1_identity_mapping/README.md   |  2 +-
 .../src/bsp/raspberrypi/link.ld                   | 13 +++----------
 .../src/bsp/raspberrypi/link.ld                   | 13 +++----------
 12_integrated_testing/src/bsp/raspberrypi/link.ld | 13 +++----------
 .../src/bsp/raspberrypi/link.ld                   | 13 +++----------
 14_virtual_mem_part2_mmio_remap/README.md         |  4 ++--
 .../src/bsp/raspberrypi/link.ld                   | 13 +++----------
 X1_JTAG_boot/src/bsp/raspberrypi/link.ld          | 13 +++----------
 19 files changed, 51 insertions(+), 156 deletions(-)

diff --git a/02_runtime_init/README.md b/02_runtime_init/README.md
index 811433040..b294e2e1f 100644
--- a/02_runtime_init/README.md
+++ b/02_runtime_init/README.md
@@ -186,7 +186,7 @@ diff -uNr 01_wait_forever/src/bsp/raspberrypi/cpu.rs 02_runtime_init/src/bsp/ras
 diff -uNr 01_wait_forever/src/bsp/raspberrypi/link.ld 02_runtime_init/src/bsp/raspberrypi/link.ld
 --- 01_wait_forever/src/bsp/raspberrypi/link.ld
 +++ 02_runtime_init/src/bsp/raspberrypi/link.ld
-@@ -11,17 +11,52 @@
+@@ -11,17 +11,45 @@
  PHDRS
  {
      segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
@@ -209,16 +209,9 @@ diff -uNr 01_wait_forever/src/bsp/raspberrypi/link.ld 02_runtime_init/src/bsp/ra
      .text :
      {
          KEEP(*(.text._start))
-+
-+        /* Special constants (or statics in Rust speak) needed by _start().
-+         *
-+         * They are placed in close proximity to _start() from where they will be read. This ensures
-+         * that position-independent, PC-relative loads can be emitted.
-+         */
-+        *(.text._start_arguments)
-+
-+        *(.text._start_rust) /* The Rust entry point */
-+        *(.text*)            /* Everything else */
++        *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
++        *(.text._start_rust)      /* The Rust entry point */
++        *(.text*)                 /* Everything else */
      } :segment_rx
 +
 +    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
diff --git a/02_runtime_init/src/bsp/raspberrypi/link.ld b/02_runtime_init/src/bsp/raspberrypi/link.ld
index 3b73b3c7e..97ea6d69c 100644
--- a/02_runtime_init/src/bsp/raspberrypi/link.ld
+++ b/02_runtime_init/src/bsp/raspberrypi/link.ld
@@ -29,16 +29,9 @@ SECTIONS
     .text :
     {
         KEEP(*(.text._start))
-
-        /* Special constants (or statics in Rust speak) needed by _start().
-         *
-         * They are placed in close proximity to _start() from where they will be read. This ensures
-         * that position-independent, PC-relative loads can be emitted.
-         */
-        *(.text._start_arguments)
-
-        *(.text._start_rust) /* The Rust entry point */
-        *(.text*)            /* Everything else */
+        *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
+        *(.text._start_rust)      /* The Rust entry point */
+        *(.text*)                 /* Everything else */
     } :segment_rx
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
diff --git a/03_hacky_hello_world/src/bsp/raspberrypi/link.ld b/03_hacky_hello_world/src/bsp/raspberrypi/link.ld
index 3b73b3c7e..97ea6d69c 100644
--- a/03_hacky_hello_world/src/bsp/raspberrypi/link.ld
+++ b/03_hacky_hello_world/src/bsp/raspberrypi/link.ld
@@ -29,16 +29,9 @@ SECTIONS
     .text :
     {
         KEEP(*(.text._start))
-
-        /* Special constants (or statics in Rust speak) needed by _start().
-         *
-         * They are placed in close proximity to _start() from where they will be read. This ensures
-         * that position-independent, PC-relative loads can be emitted.
-         */
-        *(.text._start_arguments)
-
-        *(.text._start_rust) /* The Rust entry point */
-        *(.text*)            /* Everything else */
+        *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
+        *(.text._start_rust)      /* The Rust entry point */
+        *(.text*)                 /* Everything else */
     } :segment_rx
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
diff --git a/04_safe_globals/src/bsp/raspberrypi/link.ld b/04_safe_globals/src/bsp/raspberrypi/link.ld
index 3b73b3c7e..97ea6d69c 100644
--- a/04_safe_globals/src/bsp/raspberrypi/link.ld
+++ b/04_safe_globals/src/bsp/raspberrypi/link.ld
@@ -29,16 +29,9 @@ SECTIONS
     .text :
     {
         KEEP(*(.text._start))
-
-        /* Special constants (or statics in Rust speak) needed by _start().
-         *
-         * They are placed in close proximity to _start() from where they will be read. This ensures
-         * that position-independent, PC-relative loads can be emitted.
-         */
-        *(.text._start_arguments)
-
-        *(.text._start_rust) /* The Rust entry point */
-        *(.text*)            /* Everything else */
+        *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
+        *(.text._start_rust)      /* The Rust entry point */
+        *(.text*)                 /* Everything else */
     } :segment_rx
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
diff --git a/05_drivers_gpio_uart/src/bsp/raspberrypi/link.ld b/05_drivers_gpio_uart/src/bsp/raspberrypi/link.ld
index 3b73b3c7e..97ea6d69c 100644
--- a/05_drivers_gpio_uart/src/bsp/raspberrypi/link.ld
+++ b/05_drivers_gpio_uart/src/bsp/raspberrypi/link.ld
@@ -29,16 +29,9 @@ SECTIONS
     .text :
     {
         KEEP(*(.text._start))
-
-        /* Special constants (or statics in Rust speak) needed by _start().
-         *
-         * They are placed in close proximity to _start() from where they will be read. This ensures
-         * that position-independent, PC-relative loads can be emitted.
-         */
-        *(.text._start_arguments)
-
-        *(.text._start_rust) /* The Rust entry point */
-        *(.text*)            /* Everything else */
+        *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
+        *(.text._start_rust)      /* The Rust entry point */
+        *(.text*)                 /* Everything else */
     } :segment_rx
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
diff --git a/06_uart_chainloader/README.md b/06_uart_chainloader/README.md
index 89a4c796e..c05390460 100644
--- a/06_uart_chainloader/README.md
+++ b/06_uart_chainloader/README.md
@@ -315,7 +315,7 @@ diff -uNr 05_drivers_gpio_uart/src/bsp/raspberrypi/link.ld 06_uart_chainloader/s
      .text :
      {
          KEEP(*(.text._start))
-@@ -49,8 +51,12 @@
+@@ -42,8 +44,12 @@
      ***********************************************************************************************/
      .data : { *(.data*) } :segment_rw
 
diff --git a/06_uart_chainloader/src/bsp/raspberrypi/link.ld b/06_uart_chainloader/src/bsp/raspberrypi/link.ld
index f75239061..324172b19 100644
--- a/06_uart_chainloader/src/bsp/raspberrypi/link.ld
+++ b/06_uart_chainloader/src/bsp/raspberrypi/link.ld
@@ -31,16 +31,9 @@ SECTIONS
     .text :
     {
         KEEP(*(.text._start))
-
-        /* Special constants (or statics in Rust speak) needed by _start().
-         *
-         * They are placed in close proximity to _start() from where they will be read. This ensures
-         * that position-independent, PC-relative loads can be emitted.
-         */
-        *(.text._start_arguments)
-
-        *(.text._start_rust) /* The Rust entry point */
-        *(.text*)            /* Everything else */
+        *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
+        *(.text._start_rust)      /* The Rust entry point */
+        *(.text*)                 /* Everything else */
     } :segment_rx
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index b898aa409..dc40f8048 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -398,7 +398,7 @@ diff -uNr 06_uart_chainloader/src/bsp/raspberrypi/link.ld 07_timestamps/src/bsp/
      .text :
      {
          KEEP(*(.text._start))
-@@ -51,12 +49,8 @@
+@@ -44,12 +42,8 @@
      ***********************************************************************************************/
      .data : { *(.data*) } :segment_rw
 
diff --git a/07_timestamps/src/bsp/raspberrypi/link.ld b/07_timestamps/src/bsp/raspberrypi/link.ld
index 3b73b3c7e..97ea6d69c 100644
--- a/07_timestamps/src/bsp/raspberrypi/link.ld
+++ b/07_timestamps/src/bsp/raspberrypi/link.ld
@@ -29,16 +29,9 @@ SECTIONS
     .text :
     {
         KEEP(*(.text._start))
-
-        /* Special constants (or statics in Rust speak) needed by _start().
-         *
-         * They are placed in close proximity to _start() from where they will be read. This ensures
-         * that position-independent, PC-relative loads can be emitted.
-         */
-        *(.text._start_arguments)
-
-        *(.text._start_rust) /* The Rust entry point */
-        *(.text*)            /* Everything else */
+        *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
+        *(.text._start_rust)      /* The Rust entry point */
+        *(.text*)                 /* Everything else */
     } :segment_rx
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
diff --git a/08_hw_debug_JTAG/src/bsp/raspberrypi/link.ld b/08_hw_debug_JTAG/src/bsp/raspberrypi/link.ld
index 3b73b3c7e..97ea6d69c 100644
--- a/08_hw_debug_JTAG/src/bsp/raspberrypi/link.ld
+++ b/08_hw_debug_JTAG/src/bsp/raspberrypi/link.ld
@@ -29,16 +29,9 @@ SECTIONS
     .text :
     {
         KEEP(*(.text._start))
-
-        /* Special constants (or statics in Rust speak) needed by _start().
-         *
-         * They are placed in close proximity to _start() from where they will be read. This ensures
-         * that position-independent, PC-relative loads can be emitted.
-         */
-        *(.text._start_arguments)
-
-        *(.text._start_rust) /* The Rust entry point */
-        *(.text*)            /* Everything else */
+        *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
+        *(.text._start_rust)      /* The Rust entry point */
+        *(.text*)                 /* Everything else */
     } :segment_rx
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
diff --git a/09_privilege_level/src/bsp/raspberrypi/link.ld b/09_privilege_level/src/bsp/raspberrypi/link.ld
index 3b73b3c7e..97ea6d69c 100644
--- a/09_privilege_level/src/bsp/raspberrypi/link.ld
+++ b/09_privilege_level/src/bsp/raspberrypi/link.ld
@@ -29,16 +29,9 @@ SECTIONS
     .text :
     {
         KEEP(*(.text._start))
-
-        /* Special constants (or statics in Rust speak) needed by _start().
-         *
-         * They are placed in close proximity to _start() from where they will be read. This ensures
-         * that position-independent, PC-relative loads can be emitted.
-         */
-        *(.text._start_arguments)
-
-        *(.text._start_rust) /* The Rust entry point */
-        *(.text*)            /* Everything else */
+        *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
+        *(.text._start_rust)      /* The Rust entry point */
+        *(.text*)                 /* Everything else */
     } :segment_rx
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
diff --git a/10_virtual_mem_part1_identity_mapping/README.md b/10_virtual_mem_part1_identity_mapping/README.md
index d2d72ea55..3161e6b01 100644
--- a/10_virtual_mem_part1_identity_mapping/README.md
+++ b/10_virtual_mem_part1_identity_mapping/README.md
@@ -821,7 +821,7 @@ diff -uNr 09_privilege_level/src/bsp/raspberrypi/link.ld 10_virtual_mem_part1_id
      .text :
      {
          KEEP(*(.text._start))
-@@ -44,6 +45,9 @@
+@@ -37,6 +38,9 @@
      .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
      .got    : ALIGN(8) { *(.got)     } :segment_rx
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
index 854f5b388..bda0da5e9 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
@@ -30,16 +30,9 @@ SECTIONS
     .text :
     {
         KEEP(*(.text._start))
-
-        /* Special constants (or statics in Rust speak) needed by _start().
-         *
-         * They are placed in close proximity to _start() from where they will be read. This ensures
-         * that position-independent, PC-relative loads can be emitted.
-         */
-        *(.text._start_arguments)
-
-        *(.text._start_rust) /* The Rust entry point */
-        *(.text*)            /* Everything else */
+        *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
+        *(.text._start_rust)      /* The Rust entry point */
+        *(.text*)                 /* Everything else */
     } :segment_rx
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
diff --git a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/link.ld b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/link.ld
index 854f5b388..bda0da5e9 100644
--- a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/link.ld
+++ b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/link.ld
@@ -30,16 +30,9 @@ SECTIONS
     .text :
     {
         KEEP(*(.text._start))
-
-        /* Special constants (or statics in Rust speak) needed by _start().
-         *
-         * They are placed in close proximity to _start() from where they will be read. This ensures
-         * that position-independent, PC-relative loads can be emitted.
-         */
-        *(.text._start_arguments)
-
-        *(.text._start_rust) /* The Rust entry point */
-        *(.text*)            /* Everything else */
+        *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
+        *(.text._start_rust)      /* The Rust entry point */
+        *(.text*)                 /* Everything else */
     } :segment_rx
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
diff --git a/12_integrated_testing/src/bsp/raspberrypi/link.ld b/12_integrated_testing/src/bsp/raspberrypi/link.ld
index 854f5b388..bda0da5e9 100644
--- a/12_integrated_testing/src/bsp/raspberrypi/link.ld
+++ b/12_integrated_testing/src/bsp/raspberrypi/link.ld
@@ -30,16 +30,9 @@ SECTIONS
     .text :
     {
         KEEP(*(.text._start))
-
-        /* Special constants (or statics in Rust speak) needed by _start().
-         *
-         * They are placed in close proximity to _start() from where they will be read. This ensures
-         * that position-independent, PC-relative loads can be emitted.
-         */
-        *(.text._start_arguments)
-
-        *(.text._start_rust) /* The Rust entry point */
-        *(.text*)            /* Everything else */
+        *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
+        *(.text._start_rust)      /* The Rust entry point */
+        *(.text*)                 /* Everything else */
     } :segment_rx
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld
index 854f5b388..bda0da5e9 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld
+++ b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld
@@ -30,16 +30,9 @@ SECTIONS
     .text :
     {
         KEEP(*(.text._start))
-
-        /* Special constants (or statics in Rust speak) needed by _start().
-         *
-         * They are placed in close proximity to _start() from where they will be read. This ensures
-         * that position-independent, PC-relative loads can be emitted.
-         */
-        *(.text._start_arguments)
-
-        *(.text._start_rust) /* The Rust entry point */
-        *(.text*)            /* Everything else */
+        *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
+        *(.text._start_rust)      /* The Rust entry point */
+        *(.text*)                 /* Everything else */
     } :segment_rx
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index cf387da92..ca7905f10 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -1468,7 +1468,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld 14_vir
 
      /***********************************************************************************************
      * Code + RO Data + Global Offset Table
-@@ -51,6 +46,7 @@
+@@ -44,6 +39,7 @@
      /***********************************************************************************************
      * Data + BSS
      ***********************************************************************************************/
@@ -1476,7 +1476,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld 14_vir
      .data : { *(.data*) } :segment_rw
 
      /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-@@ -63,4 +59,23 @@
+@@ -56,4 +52,23 @@
          . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
          __bss_end_inclusive = . - 8;
      } :NONE
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
index 7fddf3ec5..64545edf2 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
@@ -25,16 +25,9 @@ SECTIONS
     .text :
     {
         KEEP(*(.text._start))
-
-        /* Special constants (or statics in Rust speak) needed by _start().
-         *
-         * They are placed in close proximity to _start() from where they will be read. This ensures
-         * that position-independent, PC-relative loads can be emitted.
-         */
-        *(.text._start_arguments)
-
-        *(.text._start_rust) /* The Rust entry point */
-        *(.text*)            /* Everything else */
+        *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
+        *(.text._start_rust)      /* The Rust entry point */
+        *(.text*)                 /* Everything else */
     } :segment_rx
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
diff --git a/X1_JTAG_boot/src/bsp/raspberrypi/link.ld b/X1_JTAG_boot/src/bsp/raspberrypi/link.ld
index 3b73b3c7e..97ea6d69c 100644
--- a/X1_JTAG_boot/src/bsp/raspberrypi/link.ld
+++ b/X1_JTAG_boot/src/bsp/raspberrypi/link.ld
@@ -29,16 +29,9 @@ SECTIONS
     .text :
     {
         KEEP(*(.text._start))
-
-        /* Special constants (or statics in Rust speak) needed by _start().
-         *
-         * They are placed in close proximity to _start() from where they will be read. This ensures
-         * that position-independent, PC-relative loads can be emitted.
-         */
-        *(.text._start_arguments)
-
-        *(.text._start_rust) /* The Rust entry point */
-        *(.text*)            /* Everything else */
+        *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
+        *(.text._start_rust)      /* The Rust entry point */
+        *(.text*)                 /* Everything else */
     } :segment_rx
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_rx

From fd30d911d813ff3d58e91b3b760c5f7873c8b6cc Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Wed, 24 Mar 2021 00:00:40 +0100
Subject: [PATCH 046/214] Run cargo fmt in parallel

---
 utils/devtool.rb | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/utils/devtool.rb b/utils/devtool.rb
index 4f8700694..c29987bba 100755
--- a/utils/devtool.rb
+++ b/utils/devtool.rb
@@ -42,10 +42,6 @@ def clippy(bsp)
     end
 
     def fmt_cargo_rust(args)
-        print 'Rust cargo fmt '.light_blue
-        print "#{args} ".light_blue unless args.nil?
-        puts @folder
-
         Dir.chdir(@folder) { exit(1) unless system("cargo fmt #{args}") }
     end
 
@@ -216,7 +212,14 @@ def bsp_from_env
     def fmt_cargo_rust(check: false)
         args = '-- --check' if check
 
-        @crates.each { |c| c.fmt_cargo_rust(args) }
+        @crates.each do |c|
+            print 'Rust cargo fmt '.light_blue
+            print "#{args} ".light_blue unless args.nil?
+            puts c.folder
+
+            Process.fork { c.fmt_cargo_rust(args) }
+        end
+        Process.waitall
     end
 
     def fmt_prettier(check: false)

From f51c1afeeb0fee9a440ae56c727d42aa9941e93b Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Wed, 24 Mar 2021 09:11:07 +0100
Subject: [PATCH 047/214] Workaround for failing test

---
 12_integrated_testing/Cargo.toml | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/12_integrated_testing/Cargo.toml b/12_integrated_testing/Cargo.toml
index 206dfc878..06c10cf07 100644
--- a/12_integrated_testing/Cargo.toml
+++ b/12_integrated_testing/Cargo.toml
@@ -4,8 +4,10 @@ version = "0.1.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
 edition = "2018"
 
+# TODO: Fixme
+# LTO seems to kill the console integration test (empty text section). Disable until a fix is found.
 [profile.release]
-lto = true
+lto = false
 
 [features]
 default = []

From b70b08d92ed94b6bfbc222996d9a37ac1aca9388 Mon Sep 17 00:00:00 2001
From: Pius Friesch <p.friesch@posteo.de>
Date: Sat, 27 Mar 2021 20:44:50 +0100
Subject: [PATCH 048/214] Update README.md

---
 06_uart_chainloader/README.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/06_uart_chainloader/README.md b/06_uart_chainloader/README.md
index c05390460..040c498d3 100644
--- a/06_uart_chainloader/README.md
+++ b/06_uart_chainloader/README.md
@@ -37,7 +37,7 @@ Our chainloader is called `MiniLoad` and is inspired by [raspbootin].
 
 You can try it with this tutorial already:
 1. Depending on your target hardware, run:`make` or `BSP=rpi4 make`.
-1. Copy `kernel8.img` to the SD card.
+1. Copy `kernel8.img` to the SD card and put the SD card back into your RPi.
 1. Run `make chainboot` or `BSP=rpi4 make chainboot`.
 1. Connect the USB serial to your host PC.
     - Wiring diagram at [top-level README](../README.md#-usb-serial-output).

From 02602a00df2639b72555598e37568f0469b76b6d Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Tue, 30 Mar 2021 22:12:14 +0200
Subject: [PATCH 049/214] Update readmes

---
 12_integrated_testing/README.md               | 12 +++++++++++-
 13_exceptions_part2_peripheral_IRQs/README.md | 16 ++++++++++++++++
 2 files changed, 27 insertions(+), 1 deletion(-)

diff --git a/12_integrated_testing/README.md b/12_integrated_testing/README.md
index 6b76c1902..eefbfa4da 100644
--- a/12_integrated_testing/README.md
+++ b/12_integrated_testing/README.md
@@ -819,7 +819,17 @@ diff -uNr 11_exceptions_part1_groundwork/.cargo/config.toml 12_integrated_testin
 diff -uNr 11_exceptions_part1_groundwork/Cargo.toml 12_integrated_testing/Cargo.toml
 --- 11_exceptions_part1_groundwork/Cargo.toml
 +++ 12_integrated_testing/Cargo.toml
-@@ -11,17 +11,45 @@
+@@ -4,24 +4,54 @@
+ authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+ edition = "2018"
+
++# TODO: Fixme
++# LTO seems to kill the console integration test (empty text section). Disable until a fix is found.
+ [profile.release]
+-lto = true
++lto = false
+
+ [features]
  default = []
  bsp_rpi3 = ["register"]
  bsp_rpi4 = ["register"]
diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index ea327b77e..18b3cf812 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -744,6 +744,22 @@ Minipush 1.0
 ## Diff to previous
 ```diff
 
+diff -uNr 12_integrated_testing/Cargo.toml 13_exceptions_part2_peripheral_IRQs/Cargo.toml
+--- 12_integrated_testing/Cargo.toml
++++ 13_exceptions_part2_peripheral_IRQs/Cargo.toml
+@@ -4,10 +4,8 @@
+ authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+ edition = "2018"
+
+-# TODO: Fixme
+-# LTO seems to kill the console integration test (empty text section). Disable until a fix is found.
+ [profile.release]
+-lto = false
++lto = true
+
+ [features]
+ default = []
+
 diff -uNr 12_integrated_testing/src/_arch/aarch64/cpu/smp.rs 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs
 --- 12_integrated_testing/src/_arch/aarch64/cpu/smp.rs
 +++ 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs

From 7c9b472e1e1746b47a6cb1cd45e14a5b6da9ed7a Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Tue, 30 Mar 2021 22:13:18 +0200
Subject: [PATCH 050/214] Update readme

---
 14_virtual_mem_part2_mmio_remap/README.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index ca7905f10..4c1c940c3 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -17,7 +17,7 @@
 - [Implementation](#implementation)
   - [A New Mapping API in `src/memory/mmu.rs`](#a-new-mapping-api-in-srcmemorymmutranslationtablers)
   - [The new APIs in action](#the-new-apis-in-action)
-  - [Additional Changes](#additional-changes)
+  - [Supporting Changes](#supporting-changes)
 - [Test it](#test-it)
 - [Diff to previous](#diff-to-previous)
 

From 035dd5421c8190b8088c27434d19642521ff04b1 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Tue, 30 Mar 2021 22:46:06 +0200
Subject: [PATCH 051/214] Add tutorial 15

---
 .rubocop.yml                                  |    1 +
 .../.cargo/config.toml                        |    2 +
 .../.vscode/settings.json                     |    7 +
 .../Cargo.lock                                |   93 +
 .../Cargo.toml                                |   55 +
 .../Makefile                                  |  193 ++
 .../README.md                                 | 2254 +++++++++++++++++
 .../build.rs                                  |    8 +
 .../src/_arch/aarch64/cpu.rs                  |   49 +
 .../src/_arch/aarch64/cpu/boot.rs             |   89 +
 .../src/_arch/aarch64/cpu/boot.s              |   63 +
 .../src/_arch/aarch64/cpu/smp.rs              |   29 +
 .../src/_arch/aarch64/exception.rs            |  281 ++
 .../src/_arch/aarch64/exception.s             |  148 ++
 .../_arch/aarch64/exception/asynchronous.rs   |  150 ++
 .../src/_arch/aarch64/memory/mmu.rs           |  182 ++
 .../aarch64/memory/mmu/translation_table.rs   |  474 ++++
 .../src/_arch/aarch64/time.rs                 |  118 +
 .../src/bsp.rs                                |   13 +
 .../src/bsp/device_driver.rs                  |   16 +
 .../src/bsp/device_driver/arm.rs              |    9 +
 .../src/bsp/device_driver/arm/gicv2.rs        |  248 ++
 .../src/bsp/device_driver/arm/gicv2/gicc.rs   |  152 ++
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |  205 ++
 .../src/bsp/device_driver/bcm.rs              |   15 +
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  255 ++
 .../bcm/bcm2xxx_interrupt_controller.rs       |  138 +
 .../peripheral_ic.rs                          |  188 ++
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  537 ++++
 .../src/bsp/device_driver/common.rs           |   38 +
 .../src/bsp/raspberrypi.rs                    |   62 +
 .../src/bsp/raspberrypi/console.rs            |   88 +
 .../src/bsp/raspberrypi/cpu.rs                |   14 +
 .../src/bsp/raspberrypi/driver.rs             |   61 +
 .../src/bsp/raspberrypi/exception.rs          |    7 +
 .../bsp/raspberrypi/exception/asynchronous.rs |   36 +
 .../kernel_virt_addr_space_size.ld            |    1 +
 .../src/bsp/raspberrypi/link.ld               |   77 +
 .../src/bsp/raspberrypi/memory.rs             |  208 ++
 .../src/bsp/raspberrypi/memory/mmu.rs         |  187 ++
 .../src/common.rs                             |   21 +
 .../src/console.rs                            |   53 +
 .../src/cpu.rs                                |   21 +
 .../src/cpu/boot.rs                           |    9 +
 .../src/cpu/smp.rs                            |   14 +
 .../src/driver.rs                             |   62 +
 .../src/exception.rs                          |   48 +
 .../src/exception/asynchronous.rs             |  152 ++
 .../src/lib.rs                                |  176 ++
 .../src/main.rs                               |  105 +
 .../src/memory.rs                             |  202 ++
 .../src/memory/mmu.rs                         |  265 ++
 .../src/memory/mmu/mapping_record.rs          |  221 ++
 .../src/memory/mmu/translation_table.rs       |  109 +
 .../src/memory/mmu/types.rs                   |  217 ++
 .../src/panic_wait.rs                         |   58 +
 .../src/print.rs                              |  106 +
 .../src/runtime_init.rs                       |   40 +
 .../src/state.rs                              |   92 +
 .../src/synchronization.rs                    |  159 ++
 .../src/time.rs                               |   37 +
 .../test-macros/Cargo.toml                    |   14 +
 .../test-macros/src/lib.rs                    |   29 +
 .../test-types/Cargo.toml                     |    5 +
 .../test-types/src/lib.rs                     |   16 +
 .../tests/00_console_sanity.rb                |   50 +
 .../tests/00_console_sanity.rs                |   35 +
 .../tests/01_timer_sanity.rs                  |   49 +
 .../tests/02_exception_sync_page_fault.rs     |   36 +
 .../tests/03_exception_irq_sanity.rs          |   66 +
 .../tests/panic_exit_success/mod.rs           |    9 +
 .../tests/runner.rb                           |  143 ++
 .../translation_table_tool/arch.rb            |  323 +++
 .../translation_table_tool/bsp.rb             |  177 ++
 .../translation_table_tool/generic.rb         |  125 +
 .../translation_table_tool/main.rb            |   47 +
 76 files changed, 10042 insertions(+)
 create mode 100644 15_virtual_mem_part3_precomputed_tables/.cargo/config.toml
 create mode 100644 15_virtual_mem_part3_precomputed_tables/.vscode/settings.json
 create mode 100644 15_virtual_mem_part3_precomputed_tables/Cargo.lock
 create mode 100644 15_virtual_mem_part3_precomputed_tables/Cargo.toml
 create mode 100644 15_virtual_mem_part3_precomputed_tables/Makefile
 create mode 100644 15_virtual_mem_part3_precomputed_tables/README.md
 create mode 100644 15_virtual_mem_part3_precomputed_tables/build.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.s
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/smp.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.s
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception/asynchronous.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/time.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/bsp.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2/gicc.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2/gicd.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/common.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/console.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/cpu.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/driver.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/exception.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/exception/asynchronous.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/common.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/console.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/cpu.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/cpu/boot.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/cpu/smp.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/driver.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/exception.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/exception/asynchronous.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/lib.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/main.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/memory.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/memory/mmu/mapping_record.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/memory/mmu/translation_table.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/panic_wait.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/print.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/runtime_init.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/state.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/synchronization.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/time.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/test-macros/Cargo.toml
 create mode 100644 15_virtual_mem_part3_precomputed_tables/test-macros/src/lib.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/test-types/Cargo.toml
 create mode 100644 15_virtual_mem_part3_precomputed_tables/test-types/src/lib.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rb
 create mode 100644 15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/tests/01_timer_sanity.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/tests/03_exception_irq_sanity.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/tests/panic_exit_success/mod.rs
 create mode 100755 15_virtual_mem_part3_precomputed_tables/tests/runner.rb
 create mode 100644 15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb
 create mode 100644 15_virtual_mem_part3_precomputed_tables/translation_table_tool/bsp.rb
 create mode 100644 15_virtual_mem_part3_precomputed_tables/translation_table_tool/generic.rb
 create mode 100755 15_virtual_mem_part3_precomputed_tables/translation_table_tool/main.rb

diff --git a/.rubocop.yml b/.rubocop.yml
index 78ba1c1d6..a1687fd16 100644
--- a/.rubocop.yml
+++ b/.rubocop.yml
@@ -11,6 +11,7 @@
 
 Layout/IndentationWidth:
   Width: 4
+  IgnoredPatterns: ['^\s*module']
 
 Layout/LineLength:
   Max: 100
diff --git a/15_virtual_mem_part3_precomputed_tables/.cargo/config.toml b/15_virtual_mem_part3_precomputed_tables/.cargo/config.toml
new file mode 100644
index 000000000..e34764853
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/.cargo/config.toml
@@ -0,0 +1,2 @@
+[target.'cfg(target_os = "none")']
+runner = "target/kernel_test_runner.sh"
diff --git a/15_virtual_mem_part3_precomputed_tables/.vscode/settings.json b/15_virtual_mem_part3_precomputed_tables/.vscode/settings.json
new file mode 100644
index 000000000..a0d6a9202
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/.vscode/settings.json
@@ -0,0 +1,7 @@
+{
+  "editor.formatOnSave": true,
+  "editor.rulers": [100],
+  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
+  "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
+  "rust-analyzer.cargo.features": ["bsp_rpi3"]
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/Cargo.lock b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
new file mode 100644
index 000000000..069559203
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
@@ -0,0 +1,93 @@
+# This file is automatically @generated by Cargo.
+# It is not intended for manual editing.
+version = 3
+
+[[package]]
+name = "cortex-a"
+version = "5.1.6"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "ecefc30975eb87afc5a810d4b2305c0ec29e607ea97e51b2ecd80766e9268d28"
+dependencies = [
+ "register",
+]
+
+[[package]]
+name = "kernel"
+version = "0.1.0"
+dependencies = [
+ "cortex-a",
+ "qemu-exit",
+ "register",
+ "test-macros",
+ "test-types",
+]
+
+[[package]]
+name = "proc-macro2"
+version = "1.0.24"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "1e0704ee1a7e00d7bb417d0770ea303c1bccbabf0ef1667dae92b5967f5f8a71"
+dependencies = [
+ "unicode-xid",
+]
+
+[[package]]
+name = "qemu-exit"
+version = "1.0.2"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "702abe3c3255be20a4d67bda326c4117081a49a57afaf752de4845091bc6b476"
+
+[[package]]
+name = "quote"
+version = "1.0.9"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "c3d0b9745dc2debf507c8422de05d7226cc1f0644216dfdfead988f9b1ab32a7"
+dependencies = [
+ "proc-macro2",
+]
+
+[[package]]
+name = "register"
+version = "1.0.2"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "f4a247de29ab7cc8f5006cfe775c4a81c704f9914c5e2a79696862e643135433"
+dependencies = [
+ "tock-registers",
+]
+
+[[package]]
+name = "syn"
+version = "1.0.62"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "123a78a3596b24fee53a6464ce52d8ecbf62241e6294c7e7fe12086cd161f512"
+dependencies = [
+ "proc-macro2",
+ "quote",
+ "unicode-xid",
+]
+
+[[package]]
+name = "test-macros"
+version = "0.1.0"
+dependencies = [
+ "proc-macro2",
+ "quote",
+ "syn",
+ "test-types",
+]
+
+[[package]]
+name = "test-types"
+version = "0.1.0"
+
+[[package]]
+name = "tock-registers"
+version = "0.6.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "f521a79accce68c417c9c77ce22108056b626126da1932f7e2e9b5bbffee0cea"
+
+[[package]]
+name = "unicode-xid"
+version = "0.2.1"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "f7fe0bb3479651439c9112f72b6c505038574c9fbb575ed1bf3b797fa39dd564"
diff --git a/15_virtual_mem_part3_precomputed_tables/Cargo.toml b/15_virtual_mem_part3_precomputed_tables/Cargo.toml
new file mode 100644
index 000000000..206dfc878
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/Cargo.toml
@@ -0,0 +1,55 @@
+[package]
+name = "kernel"
+version = "0.1.0"
+authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+edition = "2018"
+
+[profile.release]
+lto = true
+
+[features]
+default = []
+bsp_rpi3 = ["register"]
+bsp_rpi4 = ["register"]
+test_build = ["qemu-exit"]
+
+##--------------------------------------------------------------------------------------------------
+## Dependencies
+##--------------------------------------------------------------------------------------------------
+
+[dependencies]
+test-types = { path = "test-types" }
+
+# Optional dependencies
+register = { version = "1.x.x", features = ["no_std_unit_tests"], optional = true }
+qemu-exit = { version = "1.x.x", optional = true }
+
+# Platform specific dependencies
+[target.'cfg(target_arch = "aarch64")'.dependencies]
+cortex-a = { version = "5.x.x" }
+
+##--------------------------------------------------------------------------------------------------
+## Testing
+##--------------------------------------------------------------------------------------------------
+
+[dev-dependencies]
+test-macros = { path = "test-macros" }
+
+# Unit tests are done in the library part of the kernel.
+[lib]
+name = "libkernel"
+test = true
+
+# Disable unit tests for the kernel binary.
+[[bin]]
+name = "kernel"
+test = false
+
+# List of tests without harness.
+[[test]]
+name = "00_console_sanity"
+harness = false
+
+[[test]]
+name = "02_exception_sync_page_fault"
+harness = false
diff --git a/15_virtual_mem_part3_precomputed_tables/Makefile b/15_virtual_mem_part3_precomputed_tables/Makefile
new file mode 100644
index 000000000..feb65cef7
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/Makefile
@@ -0,0 +1,193 @@
+## SPDX-License-Identifier: MIT OR Apache-2.0
+##
+## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+include ../utils/color.mk.in
+
+# Default to the RPi3
+BSP ?= rpi3
+
+# Default to a serial device name that is common in Linux.
+DEV_SERIAL ?= /dev/ttyUSB0
+
+# Query the host system's kernel name
+UNAME_S = $(shell uname -s)
+
+# BSP-specific arguments
+ifeq ($(BSP),rpi3)
+    TARGET            = aarch64-unknown-none-softfloat
+    KERNEL_BIN        = kernel8.img
+    QEMU_BINARY       = qemu-system-aarch64
+    QEMU_MACHINE_TYPE = raspi3
+    QEMU_RELEASE_ARGS = -serial stdio -display none
+    QEMU_TEST_ARGS    = $(QEMU_RELEASE_ARGS) -semihosting
+    OBJDUMP_BINARY    = aarch64-none-elf-objdump
+    NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
+    OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
+    JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
+    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
+else ifeq ($(BSP),rpi4)
+    TARGET            = aarch64-unknown-none-softfloat
+    KERNEL_BIN        = kernel8.img
+    QEMU_BINARY       = qemu-system-aarch64
+    QEMU_MACHINE_TYPE =
+    QEMU_RELEASE_ARGS = -serial stdio -display none
+    QEMU_TEST_ARGS    = $(QEMU_RELEASE_ARGS) -semihosting
+    OBJDUMP_BINARY    = aarch64-none-elf-objdump
+    NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
+    OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
+    JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
+    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
+endif
+
+# Export for build.rs
+export LINKER_FILE
+
+# Testing-specific arguments
+ifdef TEST
+    ifeq ($(TEST),unit)
+        TEST_ARG = --lib
+    else
+        TEST_ARG = --test $(TEST)
+    endif
+endif
+
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+
+RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
+RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
+
+FEATURES      = --features bsp_$(BSP)
+COMPILER_ARGS = --target=$(TARGET) \
+    $(FEATURES)                    \
+    --release
+
+RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
+DOC_CMD     = cargo doc $(COMPILER_ARGS)
+CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
+CHECK_CMD   = cargo check $(COMPILER_ARGS)
+TEST_CMD    = cargo test $(COMPILER_ARGS)
+OBJCOPY_CMD = rust-objcopy \
+    --strip-all            \
+    -O binary
+
+KERNEL_ELF = target/$(TARGET)/release/kernel
+
+DOCKER_IMAGE         = rustembedded/osdev-utils
+DOCKER_CMD           = docker run --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
+DOCKER_CMD_INTERACT  = $(DOCKER_CMD) -i -t
+DOCKER_ARG_DIR_UTILS = -v $(shell pwd)/../utils:/work/utils
+DOCKER_ARG_DIR_JTAG  = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
+DOCKER_ARG_DEV       = --privileged -v /dev:/dev
+DOCKER_ARG_NET       = --network host
+
+DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
+DOCKER_GDB   = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
+DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+
+# Dockerize commands that require USB device passthrough only on Linux
+ifeq ($(UNAME_S),Linux)
+    DOCKER_CMD_DEV = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DEV)
+
+    DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_IMAGE)
+    DOCKER_JTAGBOOT  = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_ARG_DIR_JTAG) $(DOCKER_IMAGE)
+    DOCKER_OPENOCD   = $(DOCKER_CMD_DEV) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
+else
+    DOCKER_OPENOCD   = echo "Not yet supported on non-Linux systems."; \#
+endif
+
+EXEC_QEMU     = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
+EXEC_MINIPUSH = ruby ../utils/minipush.rb
+
+.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu test chainboot jtagboot openocd gdb gdb-opt0 \
+    clippy clean readelf objdump nm check
+
+all: $(KERNEL_BIN)
+
+$(KERNEL_ELF):
+	$(call colorecho, "\nCompiling kernel - $(BSP)")
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
+	@$(DOCKER_TOOLS) ruby translation_table_tool/main.rb $(TARGET) $(BSP) $(KERNEL_ELF)
+
+$(KERNEL_BIN): $(KERNEL_ELF)
+	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
+
+doc:
+	$(call colorecho, "\nGenerating docs")
+	@$(DOC_CMD) --document-private-items --open
+
+ifeq ($(QEMU_MACHINE_TYPE),)
+qemu test:
+	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+else
+qemu: $(KERNEL_BIN)
+	$(call colorecho, "\nLaunching QEMU")
+	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
+
+define KERNEL_TEST_RUNNER
+    #!/usr/bin/env bash
+
+    TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
+    TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
+
+    $(DOCKER_TOOLS) ruby translation_table_tool/main.rb $(TARGET) $(BSP) $$TEST_ELF > /dev/null
+    $(OBJCOPY_CMD) $$TEST_ELF $$TEST_BINARY
+    $(DOCKER_TEST) ruby tests/runner.rb $(EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
+endef
+
+export KERNEL_TEST_RUNNER
+test: FEATURES += --features test_build
+test:
+	$(call colorecho, "\nCompiling test(s) - $(BSP)")
+	@mkdir -p target
+	@echo "$$KERNEL_TEST_RUNNER" > target/kernel_test_runner.sh
+	@chmod +x target/kernel_test_runner.sh
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) $(TEST_ARG)
+endif
+
+chainboot: $(KERNEL_BIN)
+	@$(DOCKER_CHAINBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(KERNEL_BIN)
+
+jtagboot:
+	@$(DOCKER_JTAGBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(JTAG_BOOT_IMAGE)
+
+openocd:
+	$(call colorecho, "\nLaunching OpenOCD")
+	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
+
+gdb: RUSTC_MISC_ARGS += -C debuginfo=2
+gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
+gdb gdb-opt0: $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching GDB")
+	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
+
+clippy:
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
+
+clean:
+	rm -rf target $(KERNEL_BIN)
+
+readelf: $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching readelf")
+	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
+
+objdump: $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching objdump")
+	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
+                --section .text   \
+                --section .rodata \
+                --section .got    \
+                $(KERNEL_ELF) | rustfilt
+
+nm: $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching nm")
+	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
+
+# For rust-analyzer
+check:
+	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
new file mode 100644
index 000000000..8de51b1bb
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -0,0 +1,2254 @@
+# Tutorial 15 - Virtual Memory Part 3: Precomputed Translation Tables
+
+## tl;dr
+
+- We are making the next baby-steps towards mapping the kernel to the most significant area of the
+  virtual memory space.
+- Instead of dynamically computing the kernel's translation tables during runtime while booting, we
+  are precomputing them in advance just after kernel compilation, and patch them into the kernel's
+  binary ahead of time.
+- For now, we are still `identity-mapping` the kernel binary.
+  - However, after this tutorial, we have all the infrastructure in place to easily map it
+    elsewhere.
+
+## Table of Contents
+
+- [Introduction](#introduction)
+- [When Load Address != Link Address, Funny Things Can Happen](#when-load-address--link-address-funny-things-can-happen)
+  * [Interim Conclusion](#interim-conclusion)
+  * [Doing the Same Thing - Expecting Different Results](#doing-the-same-thing---expecting-different-results)
+- [Position-Independent Code (PIC)](#position-independent-code-pic)
+  * [Using PIC during kernel startup](#using-pic-during-kernel-startup)
+- [Precomputed Translation Tables](#precomputed-translation-tables)
+- [Implementation](#implementation)
+  * [Preparing the Kernel Tables](#preparing-the-kernel-tables)
+  * [Turning on the MMU Before Switching to EL1](#turning-on-the-mmu-before-switching-to-el1)
+  * [The Translation Table Tool](#the-translation-table-tool)
+  * [Other changes](#other-changes)
+- [Discussion](#discussion)
+- [Test it](#test-it)
+- [Diff to previous](#diff-to-previous)
+
+## Introduction
+
+This tutorial is another preparatory step for our overall goal of mapping the kernel to the most
+significant area of the virtual memory space.
+
+The reasoning of why we want to do this was given in the previous tutorial's introduction. But lets
+for a quick moment think about what it actually means in practice: Currently, the kernel's binary is
+loaded by the Raspberry's firmware at address `0x8_0000`.
+
+In decimal, this address is at `512 KiB`, and therefore well within the _least significant part_ of
+the address space. Let's have a look at the picture from the [ARM Cortex-A Series Programmer’s Guide
+for ARMv8-A] again to understand in which virtual address space region the kernel would ideally be
+mapped to:
+
+<p align="center">
+    <img src="../doc/15_kernel_user_address_space_partitioning.png" height="500" align="center">
+</p>
+
+As we can see, the architecture proposes somewhere between addresses `0xffff_0000_0000_0000` and
+`0xffff_ffff_ffff_ffff`. Once we succeed in mapping the kernel there, the whole lower range between
+`0x0` and `0xffff_ffff_ffff` would be free for future applications to use.
+
+[ARM Cortex-A Series Programmer’s Guide for ARMv8-A]: https://developer.arm.com/documentation/den0024/latest/
+
+Now, how can we get there?
+
+## When Load Address != Link Address, Funny Things Can Happen
+
+Imagine that, using the linker script, we link the kernel so that its `_start()` function is located
+at address `0xffff_0000_0000_0000`. What hasn't changed is that the Raspberry's firmware will still
+load the kernel binary at address `0x8_0000`, and the kernel will still start executing from there
+with the `MMU` disabled.
+
+So one of the very first things the kernel must achieve during its boot to function correctly, is to
+somehow enable the `MMU` together with `translation tables` that account for the address offset
+(`0xffff_0000_0000_0000 -> 0x8_0000`). In previous tutorials, we already generated translation
+tables during the kernel's boot, so lets quickly remember how we did that:
+
+In `src/bsp/__board_name__/memory/mmu.rs` we have a static (or "global" in non-Rust speak) instance
+of `struct KernelTranslationTable`:
+
+```rust
+static KERNEL_TABLES: InitStateLock<KernelTranslationTable> =
+    InitStateLock::new(KernelTranslationTable::new());
+```
+
+In other parts of the kernel code, this instance would be referenced one way or the other, and its
+member functions would be called, for example, when mapping a range of pages. At the end of the day,
+after multiple layers of indirection, what happens at the most basic level is that a `piece of code`
+manipulates some `global data`. So part of the job of the code is to retrieve the data's constant
+address before it can manipulate it.
+
+Let's simplify the address-retrieval to the most basic code example possible. The example will be
+presented as `C` code. Don't ask yet why `C` is chosen. It will get clear as the tutorial develops.
+
+```c
+#include <stdint.h>
+
+uint64_t global_data_word = 0x11223344;
+
+uint64_t* get_address_of_global(void) {
+     return &global_data_word;
+}
+```
+
+Let's compile and link this using the following linker script:
+
+```lds
+SECTIONS
+{
+    . =  0x80000;
+
+    .text : {
+        QUAD(0); /* Intentional fill word */
+        QUAD(0); /* Intentional fill word */
+        KEEP(*(.text*))
+    }
+    .got    : ALIGN(8)   { *(.got) }
+    .data   : ALIGN(64K) {
+        QUAD(0); /* Intentional fill word */
+        *(.data*)
+    }
+}
+```
+
+Here are the compilation steps and the corresponding `objdump` for `AArch64`:
+
+```console
+$ clang --target=aarch64-none-elf -Iinclude -Wall -c start.c -o start.o
+$ ld.lld start.o -T link.ld -o example.elf
+```
+
+```c-objdump
+Disassembly of section .text:
+
+0000000000080010 get_address_of_global:
+   80010: 80 00 00 90                  	adrp	x0, #0x10000
+   80014: 00 20 00 91                  	add	x0, x0, #0x8
+   80018: c0 03 5f d6                  	ret
+
+Disassembly of section .data:
+
+0000000000090008 global_data_word:
+   90008: 44 33 22 11
+   9000c: 00 00 00 00
+```
+
+As you can see, the address of function `get_address_of_global()` is `0x8_0010` and
+`global_data_word` got address `0x9_0008`. In the function body, the compiler emitted an [`ADRP`]
+and `ADD` instruction pair, which means that the global's address is calculated as a `PC-relative
+offset`. `PC` means program counter, aka the current position of where the CPU core is currently
+executing from.
+
+Without going in too much detail, what the instruction basically does is: It retrieves the `4 KiB`
+page address that belongs to the program counter's (PC) current position (PC is at `0x8_0010`, so
+the page address is `0x8_0000`), and adds adds `0x1_0000`. So after the `ADRP` instruction, register
+`x0` holds the value `0x9_0000`. To this value, `8` is added in the next instruction, resulting in
+the overall address of `0x9_0008`, which is exactly where `global_data_word` is located. This works,
+because after linking a `static executable binary` like we do since `tutorial 01`, relative
+positions of code and data are fixed, and not supposed to change during runtime.
+
+[`ADRP`]: https://developer.arm.com/documentation/dui0802/b/A64-General-Instructions/ADRP
+
+If the Raspberry's firmware now loads this binary at address `0x8_0000`, as always, we can be sure
+that our function returns the correct address of our global data word.
+
+> So far, all looks good, doesn't it? However, this was a lot to digest already, and we're far from
+> finished. So take a minute or two and clear your mind before we continue. 🧘
+
+Now lets link this to the most significant area of memory:
+
+```lds
+SECTIONS
+{
+    . =  0xffff000000000000; <--- Only line changed in the linker script!
+
+    .text : {
+
+    /* omitted for brevity */
+}
+```
+
+And compile again:
+
+```c-objdump
+Disassembly of section .text:
+
+ffff000000000010 get_address_of_global:
+ffff000000000010: 80 00 00 90          	adrp	x0, #0x10000
+ffff000000000014: 00 20 00 91          	add	x0, x0, #0x8
+ffff000000000018: c0 03 5f d6          	ret
+
+Disassembly of section .data:
+
+ffff000000010008 global_data_word:
+ffff000000010008: 44 33 22 11
+ffff00000001000c: 00 00 00 00
+```
+
+And let the Raspberry's firmware load the binary at address `0x8_0000` again (we couldn't load it to
+`0xffff_0000_0000_0000` even if we wanted to. That address is `15 Exbibyte`. A Raspberry Pi with
+that much RAM won't exist for some time to come 😉).
+
+Let's try to answer the same question again: Would `get_address_of_global()` return the value for
+`global_data_word` that we expect to see (`0xffff_0000_0001_0008` as shown in the objdump)? This
+time, the answer is **no**. It would again return `0x9_0008`.
+
+Why is that? Don't let yourself be distracted by the addresses the `objdump` above is showing. When
+the Raspberry's firmware loads this binary at `0x8_0000`, then the Program Counter value when
+`get_address_of_global()` executes is again `0x8_0010`. So **the PC-relative calculation** will not
+result in the expected value, which would be the **absolute** (alternatively: **link-time**) address
+of `global_data_word`.
+
+### Interim Conclusion
+
+What have we learned so far? We wrote a little piece of code in a high-level language that retrieves
+an address, and we naively expected to retrieve an **absolute** address.
+
+But compiler and linker conspired against us, and machine code was emitted that uses a PC-relative
+addressing scheme, so our expectation is not matched when **load address != link address**. If you
+compile for `AArch64`, you'll see relative addressing schemes a lot, because it is natural to the
+architecture.
+
+If you now say: Wait a second, how is this a problem? It actually helps! After all, since the code
+is loaded at address `0x8_0000`, this relative addressing scheme will ensure that the processor
+accesses the global data word at the correct address!
+
+Yes, in this particular, constrained demo case, it worked out for us. But have a look at the
+following.
+
+### Doing the Same Thing - Expecting Different Results
+
+Let's take a quick detour and see what happens if we compile **the exactly same code** for the
+`x86_64` processor architecture. First when linked to `0x8_0000`:
+
+```c-objdump
+Disassembly of section .text:
+
+0000000000080070 get_address_of_global:
+   80070: 55                            push    rbp
+   80071: 48 89 e5                      mov     rbp, rsp
+   80074: 48 b8 08 00 09 00 00 00 00 00 movabs  rax, 0x90008
+   8007e: 5d                            pop     rbp
+   8007f: c3                            ret
+
+Disassembly of section .data:
+
+ffff000000010008 global_data_word:
+ffff000000010008: 44 33 22 11
+ffff00000001000c: 00 00 00 00
+```
+
+And now linked to `0xffff_0000_0000_0000`:
+
+```c-objdump
+Disassembly of section .text:
+
+ffff000000000070 get_address_of_global:
+ffff000000000070: 55                            push    rbp
+ffff000000000071: 48 89 e5                      mov     rbp, rsp
+ffff000000000074: 48 b8 08 00 01 00 00 00 ff ff movabs  rax, 0xffff000000010008
+ffff00000000007e: 5d                            pop     rbp
+ffff00000000007f: c3                            ret
+
+Disassembly of section .data:
+
+ffff000000010008 global_data_word:
+ffff000000010008: 44 33 22 11
+ffff00000001000c: 00 00 00 00
+```
+
+Both times, the `movabsq` instruction gets emitted. It means that the address is put into the target
+register using hardcoded `immediate values`. PC-relative address calculation is not used here.
+Hence, this code would return the `absolute` address in both cases. Which means in the second case,
+even when the binary would be loaded at `0x8_0000`, the return value would be
+`0xffff_0000_0001_0008`.
+
+**In summary, we get a different result for the same piece of `C` code, depending on the target
+processor architecture**. What do we learn from this little detour?
+
+First, you cannot naively compile and run `Rust` or `C` statically linked binaries when there will
+be a **load address != link address** situation. You'll run into undefined behavior very fast. It is
+kinda expected and obvious, but hopefully it helped to see it fail in action.
+
+Furthermore, it is important to understand that there are of course ways to load a symbol's absolute
+address into `AArch64` registers using `immediate values` as well. Likewise, you can also do
+PC-relative addressing in `x86`. We just looked at a tiny example. Maybe the next line of code would
+be compiled into the opposite behavior on the two architectures, so that the `x86` code would do a
+PC-relative calculation while the `AArch64` code goes for absolute.
+
+At the end of the day, what is needed to solve our task at hand (bringup of virtual memory, while
+being linked to one address and executing from another), is tight control over the machine
+instructions that get emitted for **those pieces of code** that generate the `translation tables`
+and enable the `MMU`.
+
+What we need is called [position-independent code].
+
+[position-independent code]: https://en.wikipedia.org/wiki/Position-independent_code
+
+## Position-Independent Code (PIC)
+
+As describend by Wikipedia, position-independent code
+
+> is a body of machine code that, being placed somewhere in the primary memory, **executes
+> properly** regardless of its absolute address.
+
+Your safest bet is to write the pieces that need to be position-independent in `assembly`, because
+this gives you full control over when relative or absolute addresses are being generated or used.
+You will see this approach often in big projects like the Linux kernel, for example. The downside of
+that approach is that the programmer needs good domain knowledge.
+
+If you feel more adventurous and don't want to go completely without high-level code, you can try to
+make use of suitable compiler flags such as `-fpic`, and only use `assembly` where absolutely
+needed. Here is the [`-fpic` description for GCC]:
+
+> -fpic
+>
+> Generate position-independent code (PIC) suitable for use in a shared library, if supported for
+> the target machine. Such code accesses all constant addresses through a global offset table (GOT).
+> The dynamic loader resolves the GOT entries when the program starts (the dynamic loader is not
+> part of GCC; it is part of the operating system).
+
+[`-fpic` description for GCC]: https://gcc.gnu.org/onlinedocs/gcc/Code-Gen-Options.html#Code-Gen-Options
+
+However, it is very important to understand that this flag **is not** a ready-made solution for our
+particular problem (and wasn't invented for that case either). There is a hint in the quoted text
+above that gives it away: "_The dynamic loader resolves the GOT entries when the program starts (the
+dynamic loader is not part of GCC; it is part of the operating system)_".
+
+Well, we are a booting kernel, and not some (userspace) program running on top of an operating
+system. Hence, there is no dynamic loader available. However, it is still possible to benefit from
+`-fpic` even in our case. Lets have a look at what happens if we compile the earlier piece of `C`
+code for `AArch64` using `-fpic`, still linking the output to the most signifcant part of the memory
+space:
+
+```console
+$ clang --target=aarch64-none-elf -Iinclude -Wall -fpic -c start.c -o start.o
+$ ld.lld start.o -T link.ld -o example.elf
+```
+
+```c-objdump
+Disassembly of section .text:
+
+ffff000000000010 get_address_of_global:
+ffff000000000010: 00 00 00 90          	adrp	x0, #0x0
+ffff000000000014: 00 28 40 f9          	ldr	x0, [x0, #0x50]
+ffff000000000018: c0 03 5f d6          	ret
+
+Disassembly of section .got:
+
+ffff000000000050 .got:
+ffff000000000050: 08 00 01 00
+ffff000000000054: 00 00 ff ff
+
+Disassembly of section .data:
+
+ffff000000010008 global_data_word:
+ffff000000010008: 44 33 22 11
+ffff00000001000c: 00 00 00 00
+```
+
+What changed compared to earlier is that `rx_start_address()` now indirects through the `Global
+Offset Table`, as has been promised by the compiler's documentation. Specifically,
+`rx_start_address()` addresses the `GOT` using PC-relative addressing (distance from code to `GOT`
+must always be fixed), and loads the first 64 bit word from the start of the `GOT`, which happens to
+be `0xffff_0000_0001_0008`.
+
+Okay okay okay... So when we use `-fpic`, we get the **absolute** address of `global_data_word` even
+on `AArch64` now. How does this help when the code executes from `0x8_0000`?
+
+Well, this is the part where the `dynamic loader` quoted above would come into picture if this was a
+userspace program: "_The dynamic loader resolves the GOT entries when the program starts_". The
+`-fpic` flag is normally used to compile _shared libraries_. Suppose we have a program that uses one
+or more shared library. For various reasons, it happens that the shared library is loaded at a
+different address than where the userspace program would initially expect it. In our example,
+`global_data_word` could be supplied by such a shared library, and the userspace program is only
+referencing it. The dynamic loader would know where the shared library was loaded into memory, and
+therefore know the real address of `global_data_word`. So before the userspace program starts, the
+loader would overwrite the `GOT` entry with the correct location. Et voilà, the compiled high-level
+code would execute properly.
+
+### Using PIC during kernel startup
+
+If you think about it, our problem is a special case of what we just learned. We have a single
+statically linked binary, where everything is dislocated by a fixed offset. In our case, it is
+`0xffff_0000_0000_0000 - 0x8_0000 = 0x0fff_efff_ffff8_0000`. If we write some PIC-`assembly` code
+which loops over the `GOT` and subtracts `0x0fff_efff_ffff8_0000` from every entry as the very first
+thing when our kernel boots, any high-level code compiled with `-fpic` would work correctly
+afterwards.
+
+Moreover, this approach would be portable! Here's the output of our code compiled with `-fpic` for
+`x86_64`:
+
+```c-objdump
+Disassembly of section .text:
+
+ffff000000000070 get_address_of_global:
+ffff000000000070: 55                    push    rbp
+ffff000000000071: 48 89 e5              mov     rbp, rsp
+ffff000000000074: 48 8b 05 2d 00 00 00  mov     rax, qword ptr [rip + 0x2d]
+ffff00000000007b: 5d                    pop     rbp
+ffff00000000007c: c3                    ret
+ffff00000000007d: 0f 1f 00              nop     dword ptr [rax]
+
+Disassembly of section .got:
+
+ffff0000000000a8 .got:
+ffff0000000000a8: 08 00 01 00
+ffff0000000000ac: 00 00 ff ff
+
+Disassembly of section .data:
+
+ffff000000010008 global_data_word:
+ffff000000010008: 44 33 22 11
+ffff00000001000c: 00 00 00 00
+```
+
+As you can see, the `x86_64` code indirects through the `GOT` now same as the `AArch64` code.
+
+Of course, indirecting through the `GOT` would be detrimental to performance, so you would restrict
+`-fpic` compilation only to the code that is needed to enable the `MMU`. Everything else can be
+compiled `non-relocatable` as always, because the translation tables naturally resolve the **load
+address != link address** situation once they are live.
+
+With `C/C++` compilers, this can be done rather easily. The compilers support compilation of
+PIC-code on a per-[translation-unit] basis. Think of it as telling the compiler to compile this `.c`
+file as `PIC`, but this other `.c` file not.
+
+[translation-unit]: https://en.wikipedia.org/wiki/Translation_unit_(programming)
+
+With `Rust`, unfortunately, the [relocation model] can only be set on a per-`crate` basis at the
+moment (IINM), so that makes it difficult for us to put this approach to use.
+
+[relocation model]: https://doc.rust-lang.org/rustc/codegen-options/index.html#relocation-model
+
+## Precomputed Translation Tables
+
+As we have just seen, going the `-fpic` way isn't a feasible solution at the time of writing this
+text. On the other hand, writing the code to set up the initial page tables in `assembly` isn't that
+attractive either, because writing larger pieces of assembly is an error-prone and delicate task.
+
+Fortunately, there is a third way. We are writing an embedded kernel, and therefore the execution
+environment is way more static and deterministic as compared to a general-purpose kernel that can be
+deployed on a wide variety of targets. Specifically, for the Raspberrypi, we exactly know the **load
+address** of the kernel in advance, and we know about the capabilites of the `MMU`. So there is
+nothing stopping us from precomputing the kernel's translation tables ahead of time.
+
+A disadvantage of this approach is an increased binary size, but this is not a deal breaker in our
+case.
+
+## Implementation
+
+As stated in the initial `tl;dr`, we're not yet mapping the kernel to the most significant area of
+virtual memory. This tutorial will keep the binary `identity-mapped`, and focuses only on the
+infrastructure changes which enable the kernel to use `precomputed translation tables`. The actual
+switch to high memory will happen in the next tutorial.
+
+The changes needed are as follows:
+
+1. Make preparations so that precomputed tables are supported by the kernel's memory subsystem code.
+2. Change the boot code of the kernel so that the `MMU` is enabled with the precomputed tables as
+   soon as possible.
+3. Write a `translation table tool` that precomputes the translation tables from the generated
+   `kernel.elf` file, and patches the tables back into the same.
+
+### Preparing the Kernel Tables
+
+The tables must be linked into the `.data` section now so that they become part of the final binary.
+This is ensured using an attribute on the table's instance definition in
+`bsp/__board_name__/memory/mmu.rs`:
+
+```rust
+#[link_section = ".data"]
+static KERNEL_TABLES: InitStateLock<KernelTranslationTable> =
+    InitStateLock::new(KernelTranslationTable::new_for_precompute());
+```
+
+The `new_for_precompute()` is a new constructor in the the respective `_arch` code that ensures some
+struct members that are not the translation table entries themselves are initialized properly for
+the precompute use-case.
+
+In the `BSP` code, there is also a new file called `kernel_virt_addr_space_size.ld`, which contains
+the kernel's virtual address space size. This file gets included in both, the `link.ld` linker
+script and `mmu.rs`. We need this value both as a symbol in the kernel's ELF (for the `translation
+table tool` to parse it later) and as a constant in the `Rust` code. This inclusion approach is just
+a convenience hack that turned out working well.
+
+One critical parameter that the kernel's boot code needs in order to enable the precomputed tables
+is the `translation table base address` which must be programmed into the MMU's `TTBR` register. To
+make it accessible easily, it is added to the `.text._start_arguments` section. The definition is
+just below the definition of the kernel table instance in the `BSP` code:
+
+```rust
+/// This value is needed during early boot for MMU setup.
+///
+/// This will be patched to the correct value by the "translation table tool" after linking. This
+/// given value here is just a dummy.
+#[link_section = ".text._start_arguments"]
+#[no_mangle]
+static PHYS_KERNEL_TABLES_BASE_ADDR: u64 = 0xCCCCAAAAFFFFEEEE;
+```
+
+### Turning on the MMU Before Switching to EL1
+
+Since the Raspberry Pi starts execution in the `EL2` privilege level, one of the first things we do
+during boot since `tutorial 09` is to context-switch to the appropriate `EL1`. The `EL2` boot code
+is a great place to set up virtual memory for `EL1`. It will allow execution in `EL1` to start with
+virtual memory enabled since the very first instruction. The tweaks to `boot.s` are minimal:
+
+```asm
+// Load the base address of the kernel's translation tables.
+ldr	x0, PHYS_KERNEL_TABLES_BASE_ADDR // provided by bsp/__board_name__/memory/mmu.rs
+
+// Set the stack pointer. This ensures that any code in EL2 that needs the stack will work.
+ADR_REL	x1, __boot_core_stack_end_exclusive
+mov	sp, x1
+
+// Jump to Rust code. x0 and x1 hold the function arguments provided to _start_rust().
+b	_start_rust
+```
+
+In addition to the stack's address, we are now reading _the value_ of
+`PHYS_KERNEL_TABLES_BASE_ADDR`. The `ldr` instruction addresses the value-to-be-read using a
+PC-relative offset, so this is a `position-independent` operation and will therefore be future
+proof. The retrieved value is supplied as an argument to function `_start_rust()`, which is defined
+in `_arch/__arch_name__/cpu/boot.rs`:
+
+```rust
+#[no_mangle]
+pub unsafe extern "C" fn _start_rust(
+    phys_kernel_tables_base_addr: u64,
+    phys_boot_core_stack_end_exclusive_addr: u64,
+) -> ! {
+    prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr);
+
+    // Turn on the MMU for EL1.
+    let addr = Address::new(phys_kernel_tables_base_addr as usize);
+    if unlikely(memory::mmu::enable_mmu_and_caching(addr).is_err()) {
+        cpu::wait_forever();
+    }
+
+    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
+    asm::eret()
+}
+```
+
+You can also see that we now turn on the `MMU` just before returning to `EL1`. That's basically it
+already, the only missing piece that's left is the offline computation of the translation tables.
+
+### The Translation Table Tool
+
+The tool for translation table computation is located in the folder `translation_table_tool` in the
+root directory. For ease of use, it is written in `Ruby` 💎. The code is organized into `BSP` and
+`arch` parts just like the kernel's `Rust` code:
+
+```console
+$ tree translation_table_tool
+
+translation_table_tool
+├── arch.rb
+├── bsp.rb
+├── generic.rb
+└── main.rb
+
+0 directories, 4 files
+```
+
+Especially the `arch` part, which deals with compiling the translation table entries, will contain
+some overlap with the `Rust` code present in `_arch/aarch64/memory/mmu/translation_table.rs`. It
+might have been possible to write this tool in Rust as well, and borrow/share these pieces of code
+with the kernel. But in the end, I found it not worth the effort for the few lines of code.
+
+In the `Makefile`, the tool is invoked after compiling and linking the kernel, and before the
+`objcopy`. It's command line arguments are the target `BSP` type and the path to the kernel's `ELF`
+file:
+
+```Makefile
+all: $(KERNEL_BIN)
+
+$(KERNEL_ELF):
+	$(call colorecho, "\nCompiling kernel - $(BSP)")
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
+	@$(DOCKER_TOOLS) ruby translation_table_tool/main.rb $(TARGET) $(BSP) $(KERNEL_ELF)
+
+$(KERNEL_BIN): $(KERNEL_ELF)
+	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
+```
+
+In `main.rb`, the `BSP`-part of the tool is executed first. This part is mostly concerned with
+parsing symbols from the ELF file that are needed for the computation of the tables. Here is an
+excerpt of the symbols in question:
+
+```ruby
+class RaspberryPi
+
+    # omitted
+
+    def initialize(kernel_elf)
+        # omitted
+
+        @virt_addresses = {
+            boot_core_stack_start: /__boot_core_stack_start/,
+            boot_core_stack_end_exclusive: /__boot_core_stack_end_exclusive/,
+
+            rx_start: /__rx_start/,
+            rx_end_exclusive: /__rx_end_exclusive/,
+
+            rw_start: /__rw_start/,
+            rw_end_exclusive: /__rw_end_exclusive/,
+
+            table_struct_start_addr: /bsp::.*::memory::mmu::KERNEL_TABLES/,
+            phys_tables_base_addr: /PHYS_KERNEL_TABLES_BASE_ADDR/
+        }
+```
+
+Using those values, the `BSP` code goes on to create descriptors for each of the three sections that
+whose mappings need to be computed:
+
+- The RX section.
+- The RW section.
+- The boot-core's stack.
+
+After the `BSP` setup, `main.rb` creates an instance of the translation tables and the kernel binary
+is mapped using the same:
+
+```ruby
+TRANSLATION_TABLES = case TARGET
+                     when :aarch64
+                         Arch::ARMv8::TranslationTable.new
+                     else
+                         raise
+                     end
+
+BSP.kernel_map_binary
+```
+
+As initially said, the `arch` code works rather similar to the mapping code in the actual kernel's
+driver. `BSP.kernel_map_binary` internally calls `map_pages_at` of the `TRANSLATION_TABLE` instance:
+
+```ruby
+def kernel_map_binary
+    MappingDescriptor.print_header
+
+    @descriptors.each do |i|
+        print 'Generating'.rjust(12).green.bold
+        print ' '
+        puts i.to_s
+
+        TRANSLATION_TABLES.map_pages_at(i.virt_pages, i.phys_pages, i.attributes)
+    end
+
+    MappingDescriptor.print_divider
+end
+```
+
+For `map_pages_at()` to work, the `arch` code needs knowledge about **location** and **layout** of
+the kernels table structure. Location will be queried from the `BSP` code, which itself retrieves it
+during the symbol parsing. The layout, on the other hand, is hardcoded and as such must be kept in
+sync with the structure definition in `translation_tables.rs`.
+
+Finally, after the mappings have been created, it is time to _patch_ them back into the kernel ELF
+file. This is initiated from `main.rb` again:
+
+```ruby
+kernel_patch_tables(kernel_elf)
+kernel_patch_base_addr(kernel_elf)
+```
+
+The tool prints some information on the fly. Here's the console output of a successful run:
+
+```console
+$ make
+
+Compiling kernel - rpi3
+    Finished release [optimized] target(s) in 0.01s
+
+Precomputing kernel translation tables and patching kernel ELF
+             --------------------------------------------------
+                 Section           Start Virt Addr       Size
+             --------------------------------------------------
+  Generating Code and RO data | 0x0000_0000_0008_0000 |  64 KiB
+  Generating Data and bss     | 0x0000_0000_0009_0000 | 384 KiB
+  Generating Boot-core stack  | 0x0000_0000_0010_0000 | 512 KiB
+             --------------------------------------------------
+    Patching Kernel table struct at physical 0x9_0000
+    Patching Value of kernel table physical base address (0xd_0000) at physical 0x8_0040
+    Finished in 0.03s
+```
+
+Please note how only the kernel's binary is precomputed! Thanks to the changes made in the last
+tutorial, anything else, like `MMIO-remapping`, can and will happen lazily during runtime.
+
+### Other changes
+
+Two more things that changed in this tutorial, but won't be explained in detail:
+
+- Since virtual memory in `EL1` is now active from the start, any attempt to convert from
+  `Address<Virtual>` to `Address<Physical>` is now done through the `TryFrom` trait, which
+  internally uses HW-supported address translation of the CPU. So either the translation succeeds
+  because there is a valid virtual-to-physical mapping in the currently used translation tables, or
+  an `Err()` is returned.
+- The precomputed translation table mappings won't automatically have entries in the kernel's
+  `mapping info record`, which is used to print mapping info during boot. Mapping record entries are
+  not computed offline in order to reduce complexity. For this reason, the `BSP` code, which in
+  earlier tutorials would have called `kernel_map_pages_at()` (which implicitly would have generated
+  mapping record entries), now only calls `kernel_add_mapping_record()`, since the mappings are
+  already in place.
+
+## Discussion
+
+It is understood that there is room for optimizations in the presented approach. For example, the
+generated kernel binary contains the _complete_ array of translation tables for the whole kernel
+virtual address space (`2 GiB`). However, most of the entries are empty initially, because the
+kernel binary only occupies a small area in the tables. It would make sense to add some smarts so
+that only the non-zero entries are packed into binary.
+
+On the other hand, this would add complexity to the code. The increased size doesn't hurt too much
+yet, so the reduced complexity in the code is a tradeoff made willingly to keep everything concise
+and focused on the high-level concepts.
+
+## Test it
+
+```console
+$ make chainboot
+[...]
+
+Precomputing kernel translation tables and patching kernel ELF
+             --------------------------------------------------
+                 Section           Start Virt Addr       Size
+             --------------------------------------------------
+  Generating Code and RO data | 0x0000_0000_0008_0000 |  64 KiB
+  Generating Data and bss     | 0x0000_0000_0009_0000 | 384 KiB
+  Generating Boot-core stack  | 0x0000_0000_0010_0000 | 512 KiB
+             --------------------------------------------------
+    Patching Kernel table struct at physical 0x9_0000
+    Patching Value of kernel table physical base address (0xd_0000) at physical 0x8_0040
+    Finished in 0.03s
+
+Minipush 1.0
+
+[MP] ⏳ Waiting for /dev/ttyUSB0
+[MP] ✅ Serial connected
+[MP] 🔌 Please power the target now
+ __  __ _      _ _                 _
+|  \/  (_)_ _ (_) |   ___  __ _ __| |
+| |\/| | | ' \| | |__/ _ \/ _` / _` |
+|_|  |_|_|_||_|_|____\___/\__,_\__,_|
+
+           Raspberry Pi 3
+
+[ML] Requesting binary
+[MP] ⏩ Pushing 387 KiB =======================================🦀 100% 96 KiB/s Time: 00:00:04
+[ML] Loaded! Executing the payload now
+
+[    4.319874] Booting on: Raspberry Pi 3
+[    4.320147] MMU online:
+[    4.320439]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    4.322183]                         Virtual                                   Physical               Size       Attr                    Entity
+[    4.323927]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    4.325674]       0x0000_0000_0008_0000..0x0000_0000_0008_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
+[    4.327288]       0x0000_0000_0009_0000..0x0000_0000_000e_ffff --> 0x00_0009_0000..0x00_000e_ffff | 384 KiB | C   RW XN | Kernel data and bss
+[    4.328858]       0x0000_0000_0010_0000..0x0000_0000_0017_ffff --> 0x00_0010_0000..0x00_0017_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
+[    4.330461]       0x0000_0000_7000_0000..0x0000_0000_7000_ffff --> 0x00_3f20_0000..0x00_3f20_ffff |  64 KiB | Dev RW XN | BCM GPIO
+[    4.331912]                                                                                                             | BCM PL011 UART
+[    4.333430]       0x0000_0000_7001_0000..0x0000_0000_7001_ffff --> 0x00_3f00_0000..0x00_3f00_ffff |  64 KiB | Dev RW XN | BCM Peripheral Interrupt Controller
+[    4.335173]       -------------------------------------------------------------------------------------------------------------------------------------------
+```
+
+## Diff to previous
+```diff
+
+diff -uNr 14_virtual_mem_part2_mmio_remap/Makefile 15_virtual_mem_part3_precomputed_tables/Makefile
+--- 14_virtual_mem_part2_mmio_remap/Makefile
++++ 15_virtual_mem_part3_precomputed_tables/Makefile
+@@ -112,6 +112,7 @@
+ $(KERNEL_ELF):
+ 	$(call colorecho, "\nCompiling kernel - $(BSP)")
+ 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
++	@$(DOCKER_TOOLS) ruby translation_table_tool/main.rb $(TARGET) $(BSP) $(KERNEL_ELF)
+
+ $(KERNEL_BIN): $(KERNEL_ELF)
+ 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
+@@ -134,6 +135,7 @@
+     TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
+     TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
+
++    $(DOCKER_TOOLS) ruby translation_table_tool/main.rb $(TARGET) $(BSP) $$TEST_ELF > /dev/null
+     $(OBJCOPY_CMD) $$TEST_ELF $$TEST_BINARY
+     $(DOCKER_TEST) ruby tests/runner.rb $(EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
+ endef
+
+diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
+--- 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs
++++ 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
+@@ -11,7 +11,8 @@
+ //!
+ //! crate::cpu::boot::arch_boot
+
+-use crate::runtime_init;
++use crate::{cpu, memory, memory::Address, runtime_init};
++use core::intrinsics::unlikely;
+ use cortex_a::{asm, regs::*};
+
+ // Assembly counterpart to this file.
+@@ -71,9 +72,18 @@
+ /// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
+ /// - Exception return from EL2 must must continue execution in EL1 with `runtime_init()`.
+ #[no_mangle]
+-pub unsafe extern "C" fn _start_rust(phys_boot_core_stack_end_exclusive_addr: u64) -> ! {
++pub unsafe extern "C" fn _start_rust(
++    phys_kernel_tables_base_addr: u64,
++    phys_boot_core_stack_end_exclusive_addr: u64,
++) -> ! {
+     prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr);
+
++    // Turn on the MMU for EL1.
++    let addr = Address::new(phys_kernel_tables_base_addr as usize);
++    if unlikely(memory::mmu::enable_mmu_and_caching(addr).is_err()) {
++        cpu::wait_forever();
++    }
++
+     // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
+     asm::eret()
+ }
+
+diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.s 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.s
+--- 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.s
++++ 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.s
+@@ -44,11 +44,14 @@
+
+ 	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
+
++	// Load the base address of the kernel's translation tables.
++	ldr	x0, PHYS_KERNEL_TABLES_BASE_ADDR // provided by bsp/__board_name__/memory/mmu.rs
++
+ 	// Set the stack pointer. This ensures that any code in EL2 that needs the stack will work.
+-	ADR_REL	x0, __boot_core_stack_end_exclusive
+-	mov	sp, x0
++	ADR_REL	x1, __boot_core_stack_end_exclusive
++	mov	sp, x1
+
+-	// Jump to Rust code. x0 holds the function argument provided to _start_rust().
++	// Jump to Rust code. x0 and x1 hold the function arguments provided to _start_rust().
+ 	b	_start_rust
+
+ 	// Infinitely wait for events (aka "park the core").
+
+diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs
+--- 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
++++ 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs
+@@ -23,7 +23,7 @@
+         Address, Physical, Virtual,
+     },
+ };
+-use core::convert;
++use core::convert::{self, TryInto};
+ use register::{register_bitfields, InMemoryRegister};
+
+ //--------------------------------------------------------------------------------------------------
+@@ -120,7 +120,7 @@
+ }
+
+ trait StartAddr {
+-    fn phys_start_addr(&self) -> Address<Physical>;
++    fn virt_start_addr(&self) -> Address<Virtual>;
+ }
+
+ //--------------------------------------------------------------------------------------------------
+@@ -149,9 +149,8 @@
+ // Private Code
+ //--------------------------------------------------------------------------------------------------
+
+-// The binary is still identity mapped, so we don't need to convert here.
+ impl<T, const N: usize> StartAddr for [T; N] {
+-    fn phys_start_addr(&self) -> Address<Physical> {
++    fn virt_start_addr(&self) -> Address<Virtual> {
+         Address::new(self as *const _ as usize)
+     }
+ }
+@@ -269,7 +268,7 @@
+
+     /// Create an instance.
+     #[allow(clippy::assertions_on_constants)]
+-    pub const fn new() -> Self {
++    const fn _new(for_precompute: bool) -> Self {
+         assert!(bsp::memory::mmu::KernelGranule::SIZE == Granule64KiB::SIZE);
+
+         // Can't have a zero-sized address space.
+@@ -278,11 +277,20 @@
+         Self {
+             lvl3: [[PageDescriptor::new_zeroed(); 8192]; NUM_TABLES],
+             lvl2: [TableDescriptor::new_zeroed(); NUM_TABLES],
+-            cur_l3_mmio_index: 0,
+-            initialized: false,
++            cur_l3_mmio_index: Self::L3_MMIO_START_INDEX,
++            initialized: for_precompute,
+         }
+     }
+
++    pub const fn new_for_precompute() -> Self {
++        Self::_new(true)
++    }
++
++    #[cfg(test)]
++    pub fn new_for_runtime() -> Self {
++        Self::_new(false)
++    }
++
+     /// The start address of the table's MMIO range.
+     #[inline(always)]
+     fn mmio_start_addr(&self) -> Address<Virtual> {
+@@ -338,24 +346,26 @@
+ impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::TranslationTable
+     for FixedSizeTranslationTable<NUM_TABLES>
+ {
+-    fn init(&mut self) {
++    fn init(&mut self) -> Result<(), &'static str> {
+         if self.initialized {
+-            return;
++            return Ok(());
+         }
+
+         // Populate the l2 entries.
+         for (lvl2_nr, lvl2_entry) in self.lvl2.iter_mut().enumerate() {
+-            let desc =
+-                TableDescriptor::from_next_lvl_table_addr(self.lvl3[lvl2_nr].phys_start_addr());
++            let addr = self.lvl3[lvl2_nr]
++                .virt_start_addr()
++                .try_into()
++                .map_err(|_| "Translation error")?;
++
++            let desc = TableDescriptor::from_next_lvl_table_addr(addr);
+             *lvl2_entry = desc;
+         }
+
+         self.cur_l3_mmio_index = Self::L3_MMIO_START_INDEX;
+         self.initialized = true;
+-    }
+
+-    fn phys_base_address(&self) -> Address<Physical> {
+-        self.lvl2.phys_start_addr()
++        Ok(())
+     }
+
+     unsafe fn map_pages_at(
+
+diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu.rs
+--- 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
++++ 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu.rs
+@@ -15,7 +15,7 @@
+
+ use crate::{
+     bsp, memory,
+-    memory::{mmu::TranslationGranule, Address, Physical},
++    memory::{mmu::TranslationGranule, Address, Physical, Virtual},
+ };
+ use core::intrinsics::unlikely;
+ use cortex_a::{barrier, regs::*};
+@@ -108,7 +108,7 @@
+ //------------------------------------------------------------------------------
+ // OS Interface Code
+ //------------------------------------------------------------------------------
+-use memory::mmu::MMUEnableError;
++use memory::mmu::{MMUEnableError, TranslationError};
+
+ impl memory::mmu::interface::MMU for MemoryManagementUnit {
+     unsafe fn enable_mmu_and_caching(
+@@ -152,4 +152,31 @@
+     fn is_enabled(&self) -> bool {
+         SCTLR_EL1.matches_all(SCTLR_EL1::M::Enable)
+     }
++
++    fn try_virt_to_phys(
++        &self,
++        virt: Address<Virtual>,
++    ) -> Result<Address<Physical>, TranslationError> {
++        if !self.is_enabled() {
++            return Err(TranslationError::MMUDisabled);
++        }
++
++        let addr = virt.into_usize() as u64;
++        unsafe {
++            asm!(
++            "AT S1E1R, {0}",
++            in(reg) addr,
++            options(readonly, nostack, preserves_flags)
++            );
++        }
++
++        let par_el1 = PAR_EL1.extract();
++        if par_el1.matches_all(PAR_EL1::F::TranslationAborted) {
++            return Err(TranslationError::Aborted);
++        }
++
++        let phys_addr = (par_el1.read(PAR_EL1::PA) << 12) | (addr & 0xFFF);
++
++        Ok(Address::new(phys_addr as usize))
++    }
+ }
+
+diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/console.rs
+--- 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs
++++ 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/console.rs
+@@ -22,6 +22,7 @@
+ /// # Safety
+ ///
+ /// - Use only for printing during a panic.
++#[cfg(not(feature = "test_build"))]
+ pub unsafe fn panic_console_out() -> impl fmt::Write {
+     use driver::interface::DeviceDriver;
+
+@@ -45,6 +46,23 @@
+     panic_uart
+ }
+
++/// Reduced version for test builds.
++#[cfg(feature = "test_build")]
++pub unsafe fn panic_console_out() -> impl fmt::Write {
++    use driver::interface::DeviceDriver;
++
++    let mut panic_uart =
++        device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START.into_usize());
++
++    let maybe_uart_mmio_start_addr = super::PL011_UART.virt_mmio_start_addr();
++
++    panic_uart
++        .init(maybe_uart_mmio_start_addr)
++        .unwrap_or_else(|_| cpu::qemu_exit_failure());
++
++    panic_uart
++}
++
+ /// Return a reference to the console.
+ pub fn console() -> &'static impl console::interface::All {
+     &super::PL011_UART
+@@ -56,6 +74,15 @@
+
+ /// Minimal code needed to bring up the console in QEMU (for testing only). This is often less steps
+ /// than on real hardware due to QEMU's abstractions.
+-///
+-/// For the RPi, nothing needs to be done.
+-pub fn qemu_bring_up_console() {}
++#[cfg(feature = "test_build")]
++pub fn qemu_bring_up_console() {
++    use driver::interface::DeviceDriver;
++
++    // Calling the UART's init ensures that the BSP's instance of the UART does remap the MMIO
++    // addresses.
++    unsafe {
++        super::PL011_UART
++            .init()
++            .unwrap_or_else(|_| cpu::qemu_exit_failure());
++    }
++}
+
+diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
+--- 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
++++ 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
+@@ -0,0 +1 @@
++__kernel_virt_addr_space_size = 2 * 1024 * 1024 * 1024
+
+diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld
+--- 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
++++ 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld
+@@ -3,6 +3,9 @@
+  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+  */
+
++/* This file provides __kernel_virt_addr_space_size */
++INCLUDE src/bsp/raspberrypi/kernel_virt_addr_space_size.ld;
++
+ /* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
+ __rpi_load_addr = 0x80000;
+
+
+diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs
+--- 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
++++ 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs
+@@ -16,6 +16,7 @@
+     },
+     synchronization::InitStateLock,
+ };
++use core::convert::TryInto;
+
+ //--------------------------------------------------------------------------------------------------
+ // Private Definitions
+@@ -33,7 +34,7 @@
+ pub type KernelGranule = TranslationGranule<{ 64 * 1024 }>;
+
+ /// The kernel's virtual address space defined by this BSP.
+-pub type KernelVirtAddrSpace = AddressSpace<{ 8 * 1024 * 1024 * 1024 }>;
++pub type KernelVirtAddrSpace = AddressSpace<{ get_virt_addr_space_size() }>;
+
+ //--------------------------------------------------------------------------------------------------
+ // Global instances
+@@ -45,13 +46,33 @@
+ ///
+ /// That is, `size_of(InitStateLock<KernelTranslationTable>) == size_of(KernelTranslationTable)`.
+ /// There is a unit tests that checks this porperty.
++#[link_section = ".data"]
+ static KERNEL_TABLES: InitStateLock<KernelTranslationTable> =
+-    InitStateLock::new(KernelTranslationTable::new());
++    InitStateLock::new(KernelTranslationTable::new_for_precompute());
++
++/// This value is needed during early boot for MMU setup.
++///
++/// This will be patched to the correct value by the "translation table tool" after linking. This
++/// given value here is just a dummy.
++#[link_section = ".text._start_arguments"]
++#[no_mangle]
++static PHYS_KERNEL_TABLES_BASE_ADDR: u64 = 0xCCCCAAAAFFFFEEEE;
+
+ //--------------------------------------------------------------------------------------------------
+ // Private Code
+ //--------------------------------------------------------------------------------------------------
+
++/// This is a hack for retrieving the value for the kernel's virtual address space size as a
++/// constant from a common place, since it is needed as a compile-time/link-time constant in both,
++/// the linker script and the Rust sources.
++const fn get_virt_addr_space_size() -> usize {
++    let __kernel_virt_addr_space_size;
++
++    include!("../kernel_virt_addr_space_size.ld");
++
++    __kernel_virt_addr_space_size
++}
++
+ /// Helper function for calculating the number of pages the given parameter spans.
+ const fn size_to_num_pages(size: usize) -> usize {
+     assert!(size > 0);
+@@ -81,21 +102,22 @@
+     PageSliceDescriptor::from_addr(super::virt_boot_core_stack_start(), num_pages)
+ }
+
+-// The binary is still identity mapped, so we don't need to convert in the following.
++// There is no reason to expect the following conversions to fail, since they were generated offline
++// by the `translation table tool`. If it doesn't work, a panic due to the unwrap is justified.
+
+ /// The Read+Execute (RX) pages of the kernel binary.
+ fn phys_rx_page_desc() -> PageSliceDescriptor<Physical> {
+-    virt_rx_page_desc().into()
++    virt_rx_page_desc().try_into().unwrap()
+ }
+
+ /// The Read+Write (RW) pages of the kernel binary.
+ fn phys_rw_page_desc() -> PageSliceDescriptor<Physical> {
+-    virt_rw_page_desc().into()
++    virt_rw_page_desc().try_into().unwrap()
+ }
+
+ /// The boot core's stack.
+ fn phys_boot_core_stack_page_desc() -> PageSliceDescriptor<Physical> {
+-    virt_boot_core_stack_page_desc().into()
++    virt_boot_core_stack_page_desc().try_into().unwrap()
+ }
+
+ //--------------------------------------------------------------------------------------------------
+@@ -122,13 +144,15 @@
+     ) as *const Page<_>
+ }
+
+-/// Map the kernel binary.
++/// Add mapping records for the kernel binary.
+ ///
+-/// # Safety
++/// The actual translation table entries for the kernel binary are generated using the offline
++/// `translation table tool` and patched into the kernel binary. This function just adds the mapping
++/// record entries.
+ ///
+-/// - Any miscalculation or attribute error will likely be fatal. Needs careful manual checking.
+-pub unsafe fn kernel_map_binary() -> Result<(), &'static str> {
+-    generic_mmu::kernel_map_pages_at(
++/// It must be ensured that these entries are in sync with the offline tool.
++pub fn kernel_add_mapping_records_for_precomputed() {
++    generic_mmu::kernel_add_mapping_record(
+         "Kernel code and RO data",
+         &virt_rx_page_desc(),
+         &phys_rx_page_desc(),
+@@ -137,9 +161,9 @@
+             acc_perms: AccessPermissions::ReadOnly,
+             execute_never: false,
+         },
+-    )?;
++    );
+
+-    generic_mmu::kernel_map_pages_at(
++    generic_mmu::kernel_add_mapping_record(
+         "Kernel data and bss",
+         &virt_rw_page_desc(),
+         &phys_rw_page_desc(),
+@@ -148,9 +172,9 @@
+             acc_perms: AccessPermissions::ReadWrite,
+             execute_never: true,
+         },
+-    )?;
++    );
+
+-    generic_mmu::kernel_map_pages_at(
++    generic_mmu::kernel_add_mapping_record(
+         "Kernel boot-core stack",
+         &virt_boot_core_stack_page_desc(),
+         &phys_boot_core_stack_page_desc(),
+@@ -159,64 +183,5 @@
+             acc_perms: AccessPermissions::ReadWrite,
+             execute_never: true,
+         },
+-    )?;
+-
+-    Ok(())
+-}
+-
+-//--------------------------------------------------------------------------------------------------
+-// Testing
+-//--------------------------------------------------------------------------------------------------
+-
+-#[cfg(test)]
+-mod tests {
+-    use super::*;
+-    use test_macros::kernel_test;
+-
+-    /// Check alignment of the kernel's virtual memory layout sections.
+-    #[kernel_test]
+-    fn virt_mem_layout_sections_are_64KiB_aligned() {
+-        for i in [
+-            virt_rx_page_desc,
+-            virt_rw_page_desc,
+-            virt_boot_core_stack_page_desc,
+-        ]
+-        .iter()
+-        {
+-            let start: usize = i().start_addr().into_usize();
+-            let end: usize = i().end_addr().into_usize();
+-
+-            assert_eq!(start modulo KernelGranule::SIZE, 0);
+-            assert_eq!(end modulo KernelGranule::SIZE, 0);
+-            assert!(end >= start);
+-        }
+-    }
+-
+-    /// Ensure the kernel's virtual memory layout is free of overlaps.
+-    #[kernel_test]
+-    fn virt_mem_layout_has_no_overlaps() {
+-        let layout = [
+-            virt_rx_page_desc(),
+-            virt_rw_page_desc(),
+-            virt_boot_core_stack_page_desc(),
+-        ];
+-
+-        for (i, first_range) in layout.iter().enumerate() {
+-            for second_range in layout.iter().skip(i + 1) {
+-                assert!(!first_range.contains(second_range.start_addr()));
+-                assert!(!first_range.contains(second_range.end_addr_inclusive()));
+-                assert!(!second_range.contains(first_range.start_addr()));
+-                assert!(!second_range.contains(first_range.end_addr_inclusive()));
+-            }
+-        }
+-    }
+-
+-    /// Check if KERNEL_TABLES is in .bss.
+-    #[kernel_test]
+-    fn kernel_tables_in_bss() {
+-        let bss_range = super::super::bss_range_inclusive();
+-        let kernel_tables_addr = &KERNEL_TABLES as *const _ as usize as *mut u64;
+-
+-        assert!(bss_range.contains(&kernel_tables_addr));
+-    }
++    );
+ }
+
+diff -uNr 14_virtual_mem_part2_mmio_remap/src/main.rs 15_virtual_mem_part3_precomputed_tables/src/main.rs
+--- 14_virtual_mem_part2_mmio_remap/src/main.rs
++++ 15_virtual_mem_part3_precomputed_tables/src/main.rs
+@@ -18,25 +18,16 @@
+ /// # Safety
+ ///
+ /// - Only a single core must be active and running this function.
+-/// - The init calls in this function must appear in the correct order:
+-///     - MMU + Data caching must be activated at the earliest. Without it, any atomic operations,
+-///       e.g. the yet-to-be-introduced spinlocks in the device drivers (which currently employ
+-///       IRQSafeNullLocks instead of spinlocks), will fail to work (properly) on the RPi SoCs.
++/// - Printing will not work until the respective driver's MMIO is remapped.
+ #[no_mangle]
+ unsafe fn kernel_init() -> ! {
+     use driver::interface::DriverManager;
+
+     exception::handling_init();
+
+-    let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
+-        Err(string) => panic!("Error mapping kernel binary: {}", string),
+-        Ok(addr) => addr,
+-    };
+-
+-    if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
+-        panic!("Enabling MMU failed: {}", e);
+-    }
+-    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
++    // Add the mapping records for the precomputed entries first, so that they appear on the top of
++    // the list.
++    bsp::memory::mmu::kernel_add_mapping_records_for_precomputed();
+
+     // Bring up the drivers needed for printing first.
+     for i in bsp::driver::driver_manager()
+@@ -47,7 +38,7 @@
+         i.init().unwrap_or_else(|_| cpu::wait_forever());
+     }
+     bsp::driver::driver_manager().post_early_print_device_driver_init();
+-    // Printing available again from here on.
++    // Printing available from here on.
+
+     // Now bring up the remaining drivers.
+     for i in bsp::driver::driver_manager()
+
+diff -uNr 14_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs 15_virtual_mem_part3_precomputed_tables/src/memory/mmu/translation_table.rs
+--- 14_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs
++++ 15_virtual_mem_part3_precomputed_tables/src/memory/mmu/translation_table.rs
+@@ -10,7 +10,7 @@
+
+ use crate::memory::{
+     mmu::{AttributeFields, PageSliceDescriptor},
+-    Address, Physical, Virtual,
++    Physical, Virtual,
+ };
+
+ //--------------------------------------------------------------------------------------------------
+@@ -35,10 +35,7 @@
+         ///
+         /// - Implementor must ensure that this function can run only once or is harmless if invoked
+         ///   multiple times.
+-        fn init(&mut self);
+-
+-        /// The translation table's base address to be used for programming the MMU.
+-        fn phys_base_address(&self) -> Address<Physical>;
++        fn init(&mut self) -> Result<(), &'static str>;
+
+         /// Map the given virtual pages to the given physical pages.
+         ///
+@@ -80,7 +77,7 @@
+ #[cfg(test)]
+ mod tests {
+     use super::*;
+-    use crate::bsp;
++    use crate::{bsp, memory::Address};
+     use arch_translation_table::MinSizeTranslationTable;
+     use interface::TranslationTable;
+     use test_macros::kernel_test;
+@@ -89,9 +86,9 @@
+     #[kernel_test]
+     fn translationtable_implementation_sanity() {
+         // This will occupy a lot of space on the stack.
+-        let mut tables = MinSizeTranslationTable::new();
++        let mut tables = MinSizeTranslationTable::new_for_runtime();
+
+-        tables.init();
++        assert!(tables.init().is_ok());
+
+         let x = tables.next_mmio_virt_page_slice(0);
+         assert!(x.is_err());
+
+diff -uNr 14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs 15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs
+--- 14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
++++ 15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs
+@@ -8,7 +8,10 @@
+     bsp, common,
+     memory::{Address, AddressType, Physical, Virtual},
+ };
+-use core::{convert::From, marker::PhantomData};
++use core::{
++    convert::{From, TryFrom},
++    marker::PhantomData,
++};
+
+ //--------------------------------------------------------------------------------------------------
+ // Public Definitions
+@@ -136,12 +139,16 @@
+     }
+ }
+
+-impl From<PageSliceDescriptor<Virtual>> for PageSliceDescriptor<Physical> {
+-    fn from(desc: PageSliceDescriptor<Virtual>) -> Self {
+-        Self {
+-            start: Address::new(desc.start.into_usize()),
++impl TryFrom<PageSliceDescriptor<Virtual>> for PageSliceDescriptor<Physical> {
++    type Error = super::TranslationError;
++
++    fn try_from(desc: PageSliceDescriptor<Virtual>) -> Result<Self, Self::Error> {
++        let phys_start = super::try_virt_to_phys(desc.start)?;
++
++        Ok(Self {
++            start: phys_start,
+             num_pages: desc.num_pages,
+-        }
++        })
+     }
+ }
+
+
+diff -uNr 14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs 15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs
+--- 14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
++++ 15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs
+@@ -33,6 +33,14 @@
+     Other(&'static str),
+ }
+
++/// Translation error variants.
++#[allow(missing_docs)]
++#[derive(Debug)]
++pub enum TranslationError {
++    MMUDisabled,
++    Aborted,
++}
++
+ /// Memory Management interfaces.
+ pub mod interface {
+     use super::*;
+@@ -51,6 +59,14 @@
+
+         /// Returns true if the MMU is enabled, false otherwise.
+         fn is_enabled(&self) -> bool;
++
++        /// Try to translate a virtual address to a physical address.
++        ///
++        /// Will only succeed if there exists a valid mapping for the input VA.
++        fn try_virt_to_phys(
++            &self,
++            virt: Address<Virtual>,
++        ) -> Result<Address<Physical>, TranslationError>;
+     }
+ }
+
+@@ -92,9 +108,7 @@
+     bsp::memory::mmu::kernel_translation_tables()
+         .write(|tables| tables.map_pages_at(virt_pages, phys_pages, attr))?;
+
+-    if let Err(x) = mapping_record::kernel_add(name, virt_pages, phys_pages, attr) {
+-        warn!("{}", x);
+-    }
++    kernel_add_mapping_record(name, virt_pages, phys_pages, attr);
+
+     Ok(())
+ }
+@@ -146,6 +160,18 @@
+     }
+ }
+
++/// Add an entry to the mapping info record.
++pub fn kernel_add_mapping_record(
++    name: &'static str,
++    virt_pages: &PageSliceDescriptor<Virtual>,
++    phys_pages: &PageSliceDescriptor<Physical>,
++    attr: &AttributeFields,
++) {
++    if let Err(x) = mapping_record::kernel_add(name, virt_pages, phys_pages, attr) {
++        warn!("{}", x);
++    }
++}
++
+ /// Raw mapping of virtual to physical pages in the kernel translation tables.
+ ///
+ /// Prevents mapping into the MMIO range of the tables.
+@@ -214,21 +240,11 @@
+     Ok(virt_addr + offset_into_start_page)
+ }
+
+-/// Map the kernel's binary. Returns the translation table's base address.
+-///
+-/// # Safety
++/// Try to translate a virtual address to a physical address.
+ ///
+-/// - See [`bsp::memory::mmu::kernel_map_binary()`].
+-pub unsafe fn kernel_map_binary() -> Result<Address<Physical>, &'static str> {
+-    let phys_kernel_tables_base_addr =
+-        bsp::memory::mmu::kernel_translation_tables().write(|tables| {
+-            tables.init();
+-            tables.phys_base_address()
+-        });
+-
+-    bsp::memory::mmu::kernel_map_binary()?;
+-
+-    Ok(phys_kernel_tables_base_addr)
++/// Will only succeed if there exists a valid mapping for the input VA.
++pub fn try_virt_to_phys(virt: Address<Virtual>) -> Result<Address<Physical>, TranslationError> {
++    arch_mmu::mmu().try_virt_to_phys(virt)
+ }
+
+ /// Enable the MMU and data + instruction caching.
+@@ -236,6 +252,7 @@
+ /// # Safety
+ ///
+ /// - Crucial function during kernel init. Changes the the complete memory view of the processor.
++#[inline(always)]
+ pub unsafe fn enable_mmu_and_caching(
+     phys_tables_base_addr: Address<Physical>,
+ ) -> Result<(), MMUEnableError> {
+
+diff -uNr 14_virtual_mem_part2_mmio_remap/src/memory.rs 15_virtual_mem_part3_precomputed_tables/src/memory.rs
+--- 14_virtual_mem_part2_mmio_remap/src/memory.rs
++++ 15_virtual_mem_part3_precomputed_tables/src/memory.rs
+@@ -8,6 +8,7 @@
+
+ use crate::common;
+ use core::{
++    convert::TryFrom,
+     fmt,
+     marker::PhantomData,
+     ops::{AddAssign, RangeInclusive, SubAssign},
+@@ -67,6 +68,14 @@
+     }
+ }
+
++impl TryFrom<Address<Virtual>> for Address<Physical> {
++    type Error = mmu::TranslationError;
++
++    fn try_from(virt: Address<Virtual>) -> Result<Self, Self::Error> {
++        mmu::try_virt_to_phys(virt)
++    }
++}
++
+ impl<ATYPE: AddressType> core::ops::Add<usize> for Address<ATYPE> {
+     type Output = Self;
+
+
+diff -uNr 14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs 15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs
+--- 14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
++++ 15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs
+@@ -17,43 +17,16 @@
+ /// or indirectly.
+ mod panic_exit_success;
+
+-use libkernel::{bsp, cpu, exception, memory, println};
++use libkernel::{bsp, cpu, exception, println};
+
+ #[no_mangle]
+ unsafe fn kernel_init() -> ! {
+-    use libkernel::driver::interface::DriverManager;
+-
+     exception::handling_init();
+     bsp::console::qemu_bring_up_console();
+
+     println!("Testing synchronous exception handling by causing a page fault");
+     println!("-------------------------------------------------------------------\n");
+
+-    let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
+-        Err(string) => {
+-            println!("Error mapping kernel binary: {}", string);
+-            cpu::qemu_exit_failure()
+-        }
+-        Ok(addr) => addr,
+-    };
+-
+-    if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
+-        println!("Enabling MMU failed: {}", e);
+-        cpu::qemu_exit_failure()
+-    }
+-    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
+-
+-    // Bring up the drivers needed for printing first.
+-    for i in bsp::driver::driver_manager()
+-        .early_print_device_drivers()
+-        .iter()
+-    {
+-        // Any encountered errors cannot be printed yet, obviously, so just safely park the CPU.
+-        i.init().unwrap_or_else(|_| cpu::qemu_exit_failure());
+-    }
+-    bsp::driver::driver_manager().post_early_print_device_driver_init();
+-    // Printing available again from here on.
+-
+     println!("Writing beyond mapped area to address 9 GiB...");
+     let big_addr: u64 = 9 * 1024 * 1024 * 1024;
+     core::ptr::read_volatile(big_addr as *mut u64);
+
+diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/arch.rb 15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb
+--- 14_virtual_mem_part2_mmio_remap/translation_table_tool/arch.rb
++++ 15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb
+@@ -0,0 +1,323 @@
++# frozen_string_literal: true
++
++# SPDX-License-Identifier: MIT OR Apache-2.0
++#
++# Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
++
++# Bitfield manipulation.
++class BitField
++    def initialize
++        @value = 0
++    end
++
++    def self.attr_bitfield(name, offset, num_bits)
++        define_method("#{name}=") do |bits|
++            mask = 2**num_bits - 1
++
++            raise "Input out of range: #{name} = 0x#{bits.to_s(16)}" if (bits & ~mask).positive?
++
++            # Clear bitfield
++            @value &= ~(mask << offset)
++
++            # Set it
++            @value |= (bits << offset)
++        end
++    end
++
++    def to_i
++        @value
++    end
++
++    def size_in_byte
++        8
++    end
++end
++
++# An array class that knows its memory location.
++class CArray < Array
++    attr_reader :phys_start_addr
++
++    def initialize(phys_start_addr, size, &block)
++        @phys_start_addr = phys_start_addr
++
++        super(size, &block)
++    end
++
++    def size_in_byte
++        inject(0) { |sum, n| sum + n.size_in_byte }
++    end
++end
++
++#---------------------------------------------------------------------------------------------------
++# Arch::
++#---------------------------------------------------------------------------------------------------
++module Arch
++FALSE = 0b0
++TRUE = 0b1
++
++#---------------------------------------------------------------------------------------------------
++# Arch::ARMv8
++#---------------------------------------------------------------------------------------------------
++module ARMv8
++# ARMv8 Table Descriptor.
++class Stage1TableDescriptor < BitField
++    module NextLevelTableAddr
++        OFFSET = 16
++        NUMBITS = 32
++    end
++
++    module Type
++        OFFSET = 1
++        NUMBITS = 1
++
++        BLOCK = 0
++        TABLE = 1
++    end
++
++    module Valid
++        OFFSET = 0
++        NUMBITS = 1
++    end
++
++    attr_bitfield(:__next_level_table_addr, NextLevelTableAddr::OFFSET, NextLevelTableAddr::NUMBITS)
++    attr_bitfield(:type, Type::OFFSET, Type::NUMBITS)
++    attr_bitfield(:valid, Valid::OFFSET, Valid::NUMBITS)
++
++    def next_level_table_addr=(addr)
++        addr = addr >> Granule64KiB::SHIFT
++
++        self.__next_level_table_addr = addr
++    end
++
++    private :__next_level_table_addr=
++end
++
++# ARMv8 level 3 page descriptor.
++class Stage1PageDescriptor < BitField
++    module UXN
++        OFFSET = 54
++        NUMBITS = 1
++    end
++
++    module PXN
++        OFFSET = 53
++        NUMBITS = 1
++    end
++
++    module OutputAddr
++        OFFSET = 16
++        NUMBITS = 32
++    end
++
++    module AF
++        OFFSET = 10
++        NUMBITS = 1
++    end
++
++    module SH
++        OFFSET = 8
++        NUMBITS = 2
++
++        INNER_SHAREABLE = 0b11
++    end
++
++    module AP
++        OFFSET = 6
++        NUMBITS = 2
++
++        RW_EL1 = 0b00
++        RO_EL1 = 0b10
++    end
++
++    module AttrIndx
++        OFFSET = 2
++        NUMBITS = 3
++    end
++
++    module Type
++        OFFSET = 1
++        NUMBITS = 1
++
++        RESERVED_INVALID = 0
++        PAGE = 1
++    end
++
++    module Valid
++        OFFSET = 0
++        NUMBITS = 1
++    end
++
++    attr_bitfield(:uxn, UXN::OFFSET, UXN::NUMBITS)
++    attr_bitfield(:pxn, PXN::OFFSET, PXN::NUMBITS)
++    attr_bitfield(:__output_addr, OutputAddr::OFFSET, OutputAddr::NUMBITS)
++    attr_bitfield(:af, AF::OFFSET, AF::NUMBITS)
++    attr_bitfield(:sh, SH::OFFSET, SH::NUMBITS)
++    attr_bitfield(:ap, AP::OFFSET, AP::NUMBITS)
++    attr_bitfield(:attr_indx, AttrIndx::OFFSET, AttrIndx::NUMBITS)
++    attr_bitfield(:type, Type::OFFSET, Type::NUMBITS)
++    attr_bitfield(:valid, Valid::OFFSET, Valid::NUMBITS)
++
++    def output_addr=(addr)
++        addr = addr >> Granule64KiB::SHIFT
++
++        self.__output_addr = addr
++    end
++
++    private :__output_addr=
++end
++
++# Translation table representing the structure defined in translation_table.rs.
++class TranslationTable
++    MMIO_APERTURE_MiB = 256 * 1024 * 1024
++
++    module MAIR
++        NORMAL = 1
++    end
++
++    def initialize
++        @virt_mmio_start_addr = (BSP.kernel_virt_addr_space_size - MMIO_APERTURE_MiB) +
++                                BSP.kernel_virt_start_addr
++
++        do_sanity_checks
++
++        num_lvl2_tables = BSP.kernel_virt_addr_space_size >> Granule512MiB::SHIFT
++
++        @lvl3 = new_lvl3(num_lvl2_tables, BSP.phys_table_struct_start_addr)
++
++        @lvl2_phys_start_addr = @lvl3.phys_start_addr + @lvl3.size_in_byte
++        @lvl2 = new_lvl2(num_lvl2_tables, @lvl2_phys_start_addr)
++
++        populate_lvl2_entries
++    end
++
++    def map_pages_at(virt_pages, phys_pages, attributes)
++        return if virt_pages.empty?
++
++        raise if virt_pages.size != phys_pages.size
++        raise if phys_pages.last > BSP.phys_addr_space_end_page
++
++        virt_pages.zip(phys_pages).each do |virt_page, phys_page|
++            desc = page_descriptor_from(virt_page)
++            set_lvl3_entry(desc, phys_page, attributes)
++        end
++    end
++
++    def to_binary
++        data = @lvl3.flatten.map(&:to_i) + @lvl2.map(&:to_i)
++        data.pack('Q<*') # "Q" == uint64_t, "<" == little endian
++    end
++
++    def phys_tables_base_addr_binary
++        [@lvl2_phys_start_addr].pack('Q<*') # "Q" == uint64_t, "<" == little endian
++    end
++
++    def phys_tables_base_addr
++        @lvl2_phys_start_addr
++    end
++
++    private
++
++    def binary_with_mmio_clash?
++        BSP.rw_end_exclusive >= @virt_mmio_start_addr
++    end
++
++    def do_sanity_checks
++        raise unless BSP.kernel_granule::SIZE == Granule64KiB::SIZE
++        raise unless (BSP.kernel_virt_addr_space_size modulo Granule512MiB::SIZE).zero?
++
++        # Need to ensure that that the kernel binary does not clash with the upmost 256 MiB of the
++        # virtual address space, which is reserved for runtime-remapping of MMIO.
++        return unless binary_with_mmio_clash?
++
++        puts format('__data_end_exclusive: 0xmodulo16x', BSP.data_end_exclusive)
++        puts format('MMIO start:           0xmodulo16x', @virt_mmio_start_addr)
++
++        raise 'Kernel virtual addresses clash with 256 MiB MMIO window'
++    end
++
++    def new_lvl3(num_lvl2_tables, start_addr)
++        CArray.new(start_addr, num_lvl2_tables) do
++            temp = CArray.new(start_addr, 8192) do
++                Stage1PageDescriptor.new
++            end
++            start_addr += temp.size_in_byte
++
++            temp
++        end
++    end
++
++    def new_lvl2(num_lvl2_tables, start_addr)
++        CArray.new(start_addr, num_lvl2_tables) do
++            Stage1TableDescriptor.new
++        end
++    end
++
++    def populate_lvl2_entries
++        @lvl2.each_with_index do |descriptor, i|
++            descriptor.next_level_table_addr = @lvl3[i].phys_start_addr
++            descriptor.type = Stage1TableDescriptor::Type::TABLE
++            descriptor.valid = TRUE
++        end
++    end
++
++    def lvl2_lvl3_index_from(addr)
++        addr -= BSP.kernel_virt_start_addr
++
++        lvl2_index = addr >> Granule512MiB::SHIFT
++        lvl3_index = (addr & Granule512MiB::MASK) >> Granule64KiB::SHIFT
++
++        raise unless lvl2_index < @lvl2.size
++
++        [lvl2_index, lvl3_index]
++    end
++
++    def page_descriptor_from(virt_addr)
++        lvl2_index, lvl3_index = lvl2_lvl3_index_from(virt_addr)
++
++        @lvl3[lvl2_index][lvl3_index]
++    end
++
++    # rubocop:disable Metrics/MethodLength
++    def set_attributes(desc, attributes)
++        case attributes.mem_attributes
++        when :CacheableDRAM
++            desc.sh = Stage1PageDescriptor::SH::INNER_SHAREABLE
++            desc.attr_indx = MAIR::NORMAL
++        else
++            raise 'Invalid input'
++        end
++
++        desc.ap = case attributes.acc_perms
++                  when :ReadOnly
++                      Stage1PageDescriptor::AP::RO_EL1
++                  when :ReadWrite
++                      Stage1PageDescriptor::AP::RW_EL1
++                  else
++                      raise 'Invalid input'
++
++                  end
++
++        desc.pxn = case attributes.execute_never
++                   when :XN
++                       TRUE
++                   when :X
++                       FALSE
++                   else
++                       raise 'Invalid input'
++                   end
++
++        desc.uxn = TRUE
++    end
++    # rubocop:enable Metrics/MethodLength
++
++    def set_lvl3_entry(desc, output_addr, attributes)
++        desc.output_addr = output_addr
++        desc.af = TRUE
++        desc.type = Stage1PageDescriptor::Type::PAGE
++        desc.valid = TRUE
++
++        set_attributes(desc, attributes)
++    end
++end
++end
++end
+
+diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/bsp.rb 15_virtual_mem_part3_precomputed_tables/translation_table_tool/bsp.rb
+--- 14_virtual_mem_part2_mmio_remap/translation_table_tool/bsp.rb
++++ 15_virtual_mem_part3_precomputed_tables/translation_table_tool/bsp.rb
+@@ -0,0 +1,177 @@
++# frozen_string_literal: true
++
++# SPDX-License-Identifier: MIT OR Apache-2.0
++#
++# Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
++
++# Raspberry Pi 3 + 4
++class RaspberryPi
++    attr_reader :kernel_granule, :kernel_virt_addr_space_size, :kernel_virt_start_addr
++
++    NM_BINARY = 'aarch64-none-elf-nm'
++    READELF_BINARY = 'aarch64-none-elf-readelf'
++    MEMORY_SRC = File.read('src/bsp/raspberrypi/memory.rs').split("\n")
++
++    def initialize(kernel_elf)
++        @kernel_granule = Granule64KiB
++
++        @virt_addresses = {
++            boot_core_stack_start: /__boot_core_stack_start/,
++            boot_core_stack_end_exclusive: /__boot_core_stack_end_exclusive/,
++
++            rx_start: /__rx_start/,
++            rx_end_exclusive: /__rx_end_exclusive/,
++
++            rw_start: /__rw_start/,
++            rw_end_exclusive: /__rw_end_exclusive/,
++
++            table_struct_start_addr: /bsp::.*::memory::mmu::KERNEL_TABLES/,
++            phys_tables_base_addr: /PHYS_KERNEL_TABLES_BASE_ADDR/
++        }
++
++        symbols = `#{NM_BINARY} --demangle #{kernel_elf}`.split("\n")
++        @kernel_virt_addr_space_size = parse_from_symbols(symbols, /__kernel_virt_addr_space_size/)
++        @kernel_virt_start_addr = 0
++        @virt_addresses = parse_from_symbols(symbols, @virt_addresses)
++        @phys_addresses = virt_to_phys(@virt_addresses)
++
++        @descriptors = parse_descriptors
++        update_max_descriptor_name_length
++
++        @text_section_offset_in_elf = parse_text_section_offset_in_elf(kernel_elf)
++    end
++
++    def rw_end_exclusive
++        @virt_addresses[:rw_end_exclusive]
++    end
++
++    def phys_table_struct_start_addr
++        @phys_addresses[:table_struct_start_addr]
++    end
++
++    def table_struct_offset_in_kernel_elf
++        (@virt_addresses[:table_struct_start_addr] - @virt_addresses[:rx_start]) +
++            @text_section_offset_in_elf
++    end
++
++    def phys_tables_base_addr
++        @phys_addresses[:phys_tables_base_addr]
++    end
++
++    def phys_tables_base_addr_offset_in_kernel_elf
++        (@virt_addresses[:phys_tables_base_addr] - @virt_addresses[:rx_start]) +
++            @text_section_offset_in_elf
++    end
++
++    def phys_addr_space_end_page
++        x = MEMORY_SRC.grep(/pub const END/)
++        x = case BSP_TYPE
++            when :rpi3
++                x[0]
++            when :rpi4
++                x[1]
++            else
++                raise
++            end
++
++        x.scan(/\d+/).join.to_i(16)
++    end
++
++    def kernel_map_binary
++        MappingDescriptor.print_header
++
++        @descriptors.each do |i|
++            print 'Generating'.rjust(12).green.bold
++            print ' '
++            puts i.to_s
++
++            TRANSLATION_TABLES.map_pages_at(i.virt_pages, i.phys_pages, i.attributes)
++        end
++
++        MappingDescriptor.print_divider
++    end
++
++    private
++
++    def parse_from_symbols(symbols, input)
++        case input.class.to_s
++        when 'Regexp'
++            symbols.grep(input).first.split.first.to_i(16)
++        when 'Hash'
++            input.transform_values do |val|
++                symbols.grep(val).first.split.first.to_i(16)
++            end
++        else
++            raise
++        end
++    end
++
++    def parse_text_section_offset_in_elf(kernel_elf)
++        `#{READELF_BINARY} --sections #{kernel_elf}`.scan(/.text.*/).first.split.last.to_i(16)
++    end
++
++    def virt_to_phys(input)
++        case input.class.to_s
++        when 'Integer'
++            input - @kernel_virt_start_addr
++        when 'Hash'
++            input.transform_values do |val|
++                val - @kernel_virt_start_addr
++            end
++        else
++            raise
++        end
++    end
++
++    def descriptor_ro
++        name = 'Code and RO data'
++
++        ro_size = @virt_addresses[:rx_end_exclusive] -
++                  @virt_addresses[:rx_start]
++
++        virt_ro_pages = PageArray.new(@virt_addresses[:rx_start], ro_size, @kernel_granule::SIZE)
++        phys_ro_pages = PageArray.new(@phys_addresses[:rx_start], ro_size, @kernel_granule::SIZE)
++        ro_attribues = AttributeFields.new(:CacheableDRAM, :ReadOnly, :X)
++
++        MappingDescriptor.new(name, virt_ro_pages, phys_ro_pages, ro_attribues)
++    end
++
++    def descriptor_data
++        name = 'Data and bss'
++
++        data_size = @virt_addresses[:rw_end_exclusive] -
++                    @virt_addresses[:rw_start]
++
++        virt_data_pages = PageArray.new(@virt_addresses[:rw_start], data_size,
++                                        @kernel_granule::SIZE)
++        phys_data_pages = PageArray.new(@phys_addresses[:rw_start], data_size,
++                                        @kernel_granule::SIZE)
++        data_attribues = AttributeFields.new(:CacheableDRAM, :ReadWrite, :XN)
++
++        MappingDescriptor.new(name, virt_data_pages, phys_data_pages, data_attribues)
++    end
++
++    def descriptor_boot_core_stack
++        name = 'Boot-core stack'
++
++        boot_core_stack_size = @virt_addresses[:boot_core_stack_end_exclusive] -
++                               @virt_addresses[:boot_core_stack_start]
++
++        virt_boot_core_stack_pages = PageArray.new(@virt_addresses[:boot_core_stack_start],
++                                                   boot_core_stack_size, @kernel_granule::SIZE)
++        phys_boot_core_stack_pages = PageArray.new(@phys_addresses[:boot_core_stack_start],
++                                                   boot_core_stack_size, @kernel_granule::SIZE)
++        boot_core_stack_attribues = AttributeFields.new(:CacheableDRAM, :ReadWrite, :XN)
++
++        MappingDescriptor.new(name, virt_boot_core_stack_pages, phys_boot_core_stack_pages,
++                              boot_core_stack_attribues)
++    end
++
++    def parse_descriptors
++        [descriptor_ro, descriptor_data, descriptor_boot_core_stack]
++    end
++
++    def update_max_descriptor_name_length
++        MappingDescriptor.max_descriptor_name_length = @descriptors.map { |i| i.name.size }.max
++    end
++end
+
+diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/generic.rb 15_virtual_mem_part3_precomputed_tables/translation_table_tool/generic.rb
+--- 14_virtual_mem_part2_mmio_remap/translation_table_tool/generic.rb
++++ 15_virtual_mem_part3_precomputed_tables/translation_table_tool/generic.rb
+@@ -0,0 +1,125 @@
++# frozen_string_literal: true
++
++# SPDX-License-Identifier: MIT OR Apache-2.0
++#
++# Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
++
++module Granule64KiB
++    SIZE = 64 * 1024
++    SHIFT = Math.log2(SIZE).to_i
++end
++
++module Granule512MiB
++    SIZE = 512 * 1024 * 1024
++    SHIFT = Math.log2(SIZE).to_i
++    MASK = SIZE - 1
++end
++
++# Monkey-patch Integer with some helper functions.
++class Integer
++    def power_of_two?
++        self[0].zero?
++    end
++
++    def aligned?(alignment)
++        raise unless alignment.power_of_two?
++
++        (self & (alignment - 1)).zero?
++    end
++
++    def to_hex_underscore(with_leading_zeros: false)
++        fmt = with_leading_zeros ? 'modulo016x' : 'modulox'
++        value = format(fmt, self).to_s.reverse.scan(/.{4}|.+/).join('_').reverse
++
++        format('0xmodulos', value)
++    end
++end
++
++# An array where each value is the start address of a Page.
++class PageArray < Array
++    def initialize(start_addr, size, granule_size)
++        raise unless start_addr.aligned?(granule_size)
++        raise unless size.positive?
++        raise unless (size modulo granule_size).zero?
++
++        num_pages = size / granule_size
++        super(num_pages) do |i|
++            i * granule_size + start_addr
++        end
++    end
++end
++
++# Collection of memory attributes.
++class AttributeFields
++    attr_reader :mem_attributes, :acc_perms, :execute_never
++
++    def initialize(mem_attributes, acc_perms, execute_never)
++        @mem_attributes = mem_attributes
++        @acc_perms = acc_perms
++        @execute_never = execute_never
++    end
++end
++
++# A container that describes a one- or many-page virt-to-phys mapping.
++class MappingDescriptor
++    @max_descriptor_name_length = 0
++
++    class << self
++        attr_accessor :max_descriptor_name_length
++    end
++
++    attr_reader :name, :virt_pages, :phys_pages, :attributes
++
++    def initialize(name, virt_pages, phys_pages, attributes)
++        @name = name
++        @virt_pages = virt_pages
++        @phys_pages = phys_pages
++        @attributes = attributes
++    end
++
++    def to_s
++        name = @name.ljust(self.class.max_descriptor_name_length)
++        virt_start = @virt_pages.first.to_hex_underscore(with_leading_zeros: true)
++        size = ((@virt_pages.size * 65_536) / 1024).to_s.rjust(3)
++
++        "#{name} | #{virt_start} | #{size} KiB"
++    end
++
++    def self.print_divider
++        print '             '
++        print '-' * max_descriptor_name_length
++        puts '----------------------------------'
++    end
++
++    def self.print_header
++        print_divider
++        print '             '
++        print 'Section'.center(max_descriptor_name_length)
++        print '   '
++        print 'Start Virt Addr'.center(21)
++        print '   '
++        print 'Size'.center(7)
++        puts
++        print_divider
++    end
++end
++
++def kernel_patch_tables(kernel_binary)
++    print 'Patching'.rjust(12).green.bold
++    print ' Kernel table struct at physical '
++    puts BSP.phys_table_struct_start_addr.to_hex_underscore
++
++    IO.binwrite(kernel_binary, TRANSLATION_TABLES.to_binary,
++                BSP.table_struct_offset_in_kernel_elf)
++end
++
++def kernel_patch_base_addr(kernel_binary)
++    print 'Patching'.rjust(12).green.bold
++    print ' Value of kernel table physical base address ('
++    print TRANSLATION_TABLES.phys_tables_base_addr.to_hex_underscore
++    print ') at physical '
++    puts BSP.phys_tables_base_addr.to_hex_underscore
++
++    IO.binwrite(kernel_binary, TRANSLATION_TABLES.phys_tables_base_addr_binary,
++                BSP.phys_tables_base_addr_offset_in_kernel_elf)
++end
+
+diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/main.rb 15_virtual_mem_part3_precomputed_tables/translation_table_tool/main.rb
+--- 14_virtual_mem_part2_mmio_remap/translation_table_tool/main.rb
++++ 15_virtual_mem_part3_precomputed_tables/translation_table_tool/main.rb
+@@ -0,0 +1,47 @@
++#!/usr/bin/env ruby
++# frozen_string_literal: true
++
++# SPDX-License-Identifier: MIT OR Apache-2.0
++#
++# Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
++
++TARGET = ARGV[0].split('-').first.to_sym
++BSP_TYPE = ARGV[1].to_sym
++kernel_elf = ARGV[2]
++
++require 'rubygems'
++require 'bundler/setup'
++require 'colorize'
++
++require_relative 'generic'
++require_relative 'bsp'
++require_relative 'arch'
++
++puts
++puts 'Precomputing kernel translation tables and patching kernel ELF'.cyan
++
++start = Time.now
++
++BSP = case BSP_TYPE
++      when :rpi3, :rpi4
++          RaspberryPi.new(kernel_elf)
++      else
++          raise
++      end
++
++TRANSLATION_TABLES = case TARGET
++                     when :aarch64
++                         Arch::ARMv8::TranslationTable.new
++                     else
++                         raise
++                     end
++
++BSP.kernel_map_binary
++
++kernel_patch_tables(kernel_elf)
++kernel_patch_base_addr(kernel_elf)
++
++elapsed = Time.now - start
++
++print 'Finished'.rjust(12).green.bold
++puts " in #{elapsed.round(2)}s"
+
+```
diff --git a/15_virtual_mem_part3_precomputed_tables/build.rs b/15_virtual_mem_part3_precomputed_tables/build.rs
new file mode 100644
index 000000000..3f0a29110
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/build.rs
@@ -0,0 +1,8 @@
+use std::env;
+
+fn main() {
+    let linker_file = env::var("LINKER_FILE").unwrap();
+
+    println!("cargo:rerun-if-changed={}", linker_file);
+    println!("cargo:rerun-if-changed=build.rs");
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu.rs
new file mode 100644
index 000000000..56443865a
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu.rs
@@ -0,0 +1,49 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural processor code.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::arch_cpu
+
+use cortex_a::asm;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+pub use asm::nop;
+
+/// Pause execution on the core.
+#[inline(always)]
+pub fn wait_forever() -> ! {
+    loop {
+        asm::wfe()
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+#[cfg(feature = "test_build")]
+use qemu_exit::QEMUExit;
+
+#[cfg(feature = "test_build")]
+const QEMU_EXIT_HANDLE: qemu_exit::AArch64 = qemu_exit::AArch64::new();
+
+/// Make the host QEMU binary execute `exit(1)`.
+#[cfg(feature = "test_build")]
+pub fn qemu_exit_failure() -> ! {
+    QEMU_EXIT_HANDLE.exit_failure()
+}
+
+/// Make the host QEMU binary execute `exit(0)`.
+#[cfg(feature = "test_build")]
+pub fn qemu_exit_success() -> ! {
+    QEMU_EXIT_HANDLE.exit_success()
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
new file mode 100644
index 000000000..5e0ecfc6c
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
@@ -0,0 +1,89 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural boot code.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::boot::arch_boot
+
+use crate::{cpu, memory, memory::Address, runtime_init};
+use core::intrinsics::unlikely;
+use cortex_a::{asm, regs::*};
+
+// Assembly counterpart to this file.
+global_asm!(include_str!("boot.s"));
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// Prepares the transition from EL2 to EL1.
+///
+/// # Safety
+///
+/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
+/// - The HW state of EL1 must be prepared in a sound way.
+#[inline(always)]
+unsafe fn prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr: u64) {
+    // Enable timer counter registers for EL1.
+    CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
+
+    // No offset for reading the counters.
+    CNTVOFF_EL2.set(0);
+
+    // Set EL1 execution state to AArch64.
+    HCR_EL2.write(HCR_EL2::RW::EL1IsAarch64);
+
+    // Set up a simulated exception return.
+    //
+    // First, fake a saved program status where all interrupts were masked and SP_EL1 was used as a
+    // stack pointer.
+    SPSR_EL2.write(
+        SPSR_EL2::D::Masked
+            + SPSR_EL2::A::Masked
+            + SPSR_EL2::I::Masked
+            + SPSR_EL2::F::Masked
+            + SPSR_EL2::M::EL1h,
+    );
+
+    // Second, let the link register point to runtime_init().
+    ELR_EL2.set(runtime_init::runtime_init as *const () as u64);
+
+    // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it. Since there
+    // are no plans to ever return to EL2, just re-use the same stack.
+    SP_EL1.set(phys_boot_core_stack_end_exclusive_addr);
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The Rust entry of the `kernel` binary.
+///
+/// The function is called from the assembly `_start` function.
+///
+/// # Safety
+///
+/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
+/// - Exception return from EL2 must must continue execution in EL1 with `runtime_init()`.
+#[no_mangle]
+pub unsafe extern "C" fn _start_rust(
+    phys_kernel_tables_base_addr: u64,
+    phys_boot_core_stack_end_exclusive_addr: u64,
+) -> ! {
+    prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr);
+
+    // Turn on the MMU for EL1.
+    let addr = Address::new(phys_kernel_tables_base_addr as usize);
+    if unlikely(memory::mmu::enable_mmu_and_caching(addr).is_err()) {
+        cpu::wait_forever();
+    }
+
+    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
+    asm::eret()
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.s b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.s
new file mode 100644
index 000000000..286462616
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.s
@@ -0,0 +1,63 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//--------------------------------------------------------------------------------------------------
+// Definitions
+//--------------------------------------------------------------------------------------------------
+
+// Load the address of a symbol into a register, PC-relative.
+//
+// The symbol must lie within +/- 4 GiB of the Program Counter.
+//
+// # Resources
+//
+// - https://sourceware.org/binutils/docs-2.36/as/AArch64_002dRelocations.html
+.macro ADR_REL register, symbol
+	adrp	\register, \symbol
+	add	\register, \register, #:lo12:\symbol
+.endm
+
+.equ _EL2, 0x8
+.equ _core_id_mask, 0b11
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+.section .text._start
+
+//------------------------------------------------------------------------------
+// fn _start()
+//------------------------------------------------------------------------------
+_start:
+	// Only proceed if the core executes in EL2. Park it otherwise.
+	mrs	x0, CurrentEL
+	cmp	x0, _EL2
+	b.ne	1f
+
+	// Only proceed on the boot core. Park it otherwise.
+	mrs	x1, MPIDR_EL1
+	and	x1, x1, _core_id_mask
+	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
+	cmp	x1, x2
+	b.ne	1f
+
+	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
+
+	// Load the base address of the kernel's translation tables.
+	ldr	x0, PHYS_KERNEL_TABLES_BASE_ADDR // provided by bsp/__board_name__/memory/mmu.rs
+
+	// Set the stack pointer. This ensures that any code in EL2 that needs the stack will work.
+	ADR_REL	x1, __boot_core_stack_end_exclusive
+	mov	sp, x1
+
+	// Jump to Rust code. x0 and x1 hold the function arguments provided to _start_rust().
+	b	_start_rust
+
+	// Infinitely wait for events (aka "park the core").
+1:	wfe
+	b	1b
+
+.size	_start, . - _start
+.type	_start, function
+.global	_start
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/smp.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/smp.rs
new file mode 100644
index 000000000..b9fdd0f73
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/smp.rs
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural symmetric multiprocessing.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::smp::arch_smp
+
+use cortex_a::regs::*;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return the executing core's id.
+#[inline(always)]
+pub fn core_id<T>() -> T
+where
+    T: From<u8>,
+{
+    const CORE_MASK: u64 = 0b11;
+
+    T::from((MPIDR_EL1.get() & CORE_MASK) as u8)
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.rs
new file mode 100644
index 000000000..4a2c8de96
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.rs
@@ -0,0 +1,281 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural synchronous and asynchronous exception handling.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::exception::arch_exception
+
+use crate::{
+    bsp::{self},
+    exception,
+    memory::Address,
+};
+use core::{cell::UnsafeCell, fmt};
+use cortex_a::{barrier, regs::*};
+use register::InMemoryRegister;
+
+// Assembly counterpart to this file.
+global_asm!(include_str!("exception.s"));
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Wrapper struct for memory copy of SPSR_EL1.
+#[repr(transparent)]
+struct SpsrEL1(InMemoryRegister<u64, SPSR_EL1::Register>);
+
+/// The exception context as it is stored on the stack on exception entry.
+#[repr(C)]
+struct ExceptionContext {
+    /// General Purpose Registers.
+    gpr: [u64; 30],
+
+    /// The link register, aka x30.
+    lr: u64,
+
+    /// Exception link register. The program counter at the time the exception happened.
+    elr_el1: u64,
+
+    /// Saved program status.
+    spsr_el1: SpsrEL1,
+}
+
+/// Wrapper struct for pretty printing ESR_EL1.
+struct EsrEL1;
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// Check if additional context can be derived from a data abort.
+fn inspect_data_abort(f: &mut fmt::Formatter) -> fmt::Result {
+    let fault_addr = Address::new(FAR_EL1.get() as usize);
+
+    if bsp::memory::mmu::virt_boot_core_stack_guard_page_desc().contains(fault_addr) {
+        writeln!(
+            f,
+            "\n\n      >> Attempted to access the guard page of the kernel's boot core stack <<"
+        )?;
+    }
+
+    Ok(())
+}
+
+/// Prints verbose information about the exception and then panics.
+fn default_exception_handler(e: &ExceptionContext) {
+    panic!(
+        "\n\nCPU Exception!\n\
+         FAR_EL1: {:#018x}\n\
+         {}\n\
+         {}",
+        FAR_EL1.get(),
+        EsrEL1 {},
+        e
+    );
+}
+
+//------------------------------------------------------------------------------
+// Current, EL0
+//------------------------------------------------------------------------------
+
+#[no_mangle]
+unsafe extern "C" fn current_el0_synchronous(_e: &mut ExceptionContext) {
+    panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
+}
+
+#[no_mangle]
+unsafe extern "C" fn current_el0_irq(_e: &mut ExceptionContext) {
+    panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
+}
+
+#[no_mangle]
+unsafe extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
+    panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
+}
+
+//------------------------------------------------------------------------------
+// Current, ELx
+//------------------------------------------------------------------------------
+
+#[no_mangle]
+unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+#[no_mangle]
+unsafe extern "C" fn current_elx_irq(_e: &mut ExceptionContext) {
+    use exception::asynchronous::interface::IRQManager;
+
+    let token = &exception::asynchronous::IRQContext::new();
+    bsp::exception::asynchronous::irq_manager().handle_pending_irqs(token);
+}
+
+#[no_mangle]
+unsafe extern "C" fn current_elx_serror(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+//------------------------------------------------------------------------------
+// Lower, AArch64
+//------------------------------------------------------------------------------
+
+#[no_mangle]
+unsafe extern "C" fn lower_aarch64_synchronous(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+#[no_mangle]
+unsafe extern "C" fn lower_aarch64_irq(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+#[no_mangle]
+unsafe extern "C" fn lower_aarch64_serror(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+//------------------------------------------------------------------------------
+// Lower, AArch32
+//------------------------------------------------------------------------------
+
+#[no_mangle]
+unsafe extern "C" fn lower_aarch32_synchronous(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+#[no_mangle]
+unsafe extern "C" fn lower_aarch32_irq(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+#[no_mangle]
+unsafe extern "C" fn lower_aarch32_serror(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+//------------------------------------------------------------------------------
+// Pretty printing
+//------------------------------------------------------------------------------
+
+/// Human readable ESR_EL1.
+#[rustfmt::skip]
+impl fmt::Display for EsrEL1 {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        let esr_el1 = ESR_EL1.extract();
+
+        // Raw print of whole register.
+        writeln!(f, "ESR_EL1: {:#010x}", esr_el1.get())?;
+
+        // Raw print of exception class.
+        write!(f, "      Exception Class         (EC) : {:#x}", esr_el1.read(ESR_EL1::EC))?;
+
+        // Exception class, translation.
+        let ec_translation = match esr_el1.read_as_enum(ESR_EL1::EC) {
+            Some(ESR_EL1::EC::Value::DataAbortCurrentEL) => "Data Abort, current EL",
+            _ => "N/A",
+        };
+        writeln!(f, " - {}", ec_translation)?;
+
+        // Raw print of instruction specific syndrome.
+        write!(f, "      Instr Specific Syndrome (ISS): {:#x}", esr_el1.read(ESR_EL1::ISS))?;
+
+        inspect_data_abort(f)
+    }
+}
+
+/// Human readable SPSR_EL1.
+#[rustfmt::skip]
+impl fmt::Display for SpsrEL1 {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        // Raw value.
+        writeln!(f, "SPSR_EL1: {:#010x}", self.0.get())?;
+
+        let to_flag_str = |x| -> _ {
+            if x { "Set" } else { "Not set" }
+         };
+
+        writeln!(f, "      Flags:")?;
+        writeln!(f, "            Negative (N): {}", to_flag_str(self.0.is_set(SPSR_EL1::N)))?;
+        writeln!(f, "            Zero     (Z): {}", to_flag_str(self.0.is_set(SPSR_EL1::Z)))?;
+        writeln!(f, "            Carry    (C): {}", to_flag_str(self.0.is_set(SPSR_EL1::C)))?;
+        writeln!(f, "            Overflow (V): {}", to_flag_str(self.0.is_set(SPSR_EL1::V)))?;
+
+        let to_mask_str = |x| -> _ {
+            if x { "Masked" } else { "Unmasked" }
+        };
+
+        writeln!(f, "      Exception handling state:")?;
+        writeln!(f, "            Debug  (D): {}", to_mask_str(self.0.is_set(SPSR_EL1::D)))?;
+        writeln!(f, "            SError (A): {}", to_mask_str(self.0.is_set(SPSR_EL1::A)))?;
+        writeln!(f, "            IRQ    (I): {}", to_mask_str(self.0.is_set(SPSR_EL1::I)))?;
+        writeln!(f, "            FIQ    (F): {}", to_mask_str(self.0.is_set(SPSR_EL1::F)))?;
+
+        write!(f, "      Illegal Execution State (IL): {}",
+            to_flag_str(self.0.is_set(SPSR_EL1::IL))
+        )
+    }
+}
+
+/// Human readable print of the exception context.
+impl fmt::Display for ExceptionContext {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        writeln!(f, "ELR_EL1: {:#018x}", self.elr_el1)?;
+        writeln!(f, "{}", self.spsr_el1)?;
+        writeln!(f)?;
+        writeln!(f, "General purpose register:")?;
+
+        #[rustfmt::skip]
+        let alternating = |x| -> _ {
+            if x % 2 == 0 { "   " } else { "\n" }
+        };
+
+        // Print two registers per line.
+        for (i, reg) in self.gpr.iter().enumerate() {
+            write!(f, "      x{: <2}: {: >#018x}{}", i, reg, alternating(i))?;
+        }
+        write!(f, "      lr : {:#018x}", self.lr)
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+use crate::exception::PrivilegeLevel;
+
+/// The processing element's current privilege level.
+pub fn current_privilege_level() -> (PrivilegeLevel, &'static str) {
+    let el = CurrentEL.read_as_enum(CurrentEL::EL);
+    match el {
+        Some(CurrentEL::EL::Value::EL2) => (PrivilegeLevel::Hypervisor, "EL2"),
+        Some(CurrentEL::EL::Value::EL1) => (PrivilegeLevel::Kernel, "EL1"),
+        Some(CurrentEL::EL::Value::EL0) => (PrivilegeLevel::User, "EL0"),
+        _ => (PrivilegeLevel::Unknown, "Unknown"),
+    }
+}
+
+/// Init exception handling by setting the exception vector base address register.
+///
+/// # Safety
+///
+/// - Changes the HW state of the executing core.
+/// - The vector table and the symbol `__exception_vector_table_start` from the linker script must
+///   adhere to the alignment and size constraints demanded by the ARMv8-A Architecture Reference
+///   Manual.
+pub unsafe fn handling_init() {
+    // Provided by exception.S.
+    extern "Rust" {
+        static __exception_vector_start: UnsafeCell<()>;
+    }
+
+    VBAR_EL1.set(__exception_vector_start.get() as u64);
+
+    // Force VBAR update to complete before next instruction.
+    barrier::isb(barrier::SY);
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.s b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.s
new file mode 100644
index 000000000..ffb1875ce
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.s
@@ -0,0 +1,148 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//--------------------------------------------------------------------------------------------------
+// Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Call the function provided by parameter `\handler` after saving the exception context. Provide
+/// the context as the first parameter to '\handler'.
+.macro CALL_WITH_CONTEXT handler
+	// Make room on the stack for the exception context.
+	sub	sp,  sp,  #16 * 17
+
+	// Store all general purpose registers on the stack.
+	stp	x0,  x1,  [sp, #16 * 0]
+	stp	x2,  x3,  [sp, #16 * 1]
+	stp	x4,  x5,  [sp, #16 * 2]
+	stp	x6,  x7,  [sp, #16 * 3]
+	stp	x8,  x9,  [sp, #16 * 4]
+	stp	x10, x11, [sp, #16 * 5]
+	stp	x12, x13, [sp, #16 * 6]
+	stp	x14, x15, [sp, #16 * 7]
+	stp	x16, x17, [sp, #16 * 8]
+	stp	x18, x19, [sp, #16 * 9]
+	stp	x20, x21, [sp, #16 * 10]
+	stp	x22, x23, [sp, #16 * 11]
+	stp	x24, x25, [sp, #16 * 12]
+	stp	x26, x27, [sp, #16 * 13]
+	stp	x28, x29, [sp, #16 * 14]
+
+	// Add the exception link register (ELR_EL1) and the saved program status (SPSR_EL1).
+	mrs	x1,  ELR_EL1
+	mrs	x2,  SPSR_EL1
+
+	stp	lr,  x1,  [sp, #16 * 15]
+	str	x2,       [sp, #16 * 16]
+
+	// x0 is the first argument for the function called through `\handler`.
+	mov	x0,  sp
+
+	// Call `\handler`.
+	bl	\handler
+
+	// After returning from exception handling code, replay the saved context and return via
+	// `eret`.
+	b	__exception_restore_context
+.endm
+
+.macro FIQ_SUSPEND
+1:	wfe
+	b	1b
+.endm
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+.section .text
+
+//------------------------------------------------------------------------------
+// The exception vector table.
+//------------------------------------------------------------------------------
+
+// Align by 2^11 bytes, as demanded by ARMv8-A. Same as ALIGN(2048) in an ld script.
+.align 11
+
+// Export a symbol for the Rust code to use.
+__exception_vector_start:
+
+// Current exception level with SP_EL0.
+//
+// .org sets the offset relative to section start.
+//
+// # Safety
+//
+// - It must be ensured that `CALL_WITH_CONTEXT` <= 0x80 bytes.
+.org 0x000
+	CALL_WITH_CONTEXT current_el0_synchronous
+.org 0x080
+	CALL_WITH_CONTEXT current_el0_irq
+.org 0x100
+	FIQ_SUSPEND
+.org 0x180
+	CALL_WITH_CONTEXT current_el0_serror
+
+// Current exception level with SP_ELx, x > 0.
+.org 0x200
+	CALL_WITH_CONTEXT current_elx_synchronous
+.org 0x280
+	CALL_WITH_CONTEXT current_elx_irq
+.org 0x300
+	FIQ_SUSPEND
+.org 0x380
+	CALL_WITH_CONTEXT current_elx_serror
+
+// Lower exception level, AArch64
+.org 0x400
+	CALL_WITH_CONTEXT lower_aarch64_synchronous
+.org 0x480
+	CALL_WITH_CONTEXT lower_aarch64_irq
+.org 0x500
+	FIQ_SUSPEND
+.org 0x580
+	CALL_WITH_CONTEXT lower_aarch64_serror
+
+// Lower exception level, AArch32
+.org 0x600
+	CALL_WITH_CONTEXT lower_aarch32_synchronous
+.org 0x680
+	CALL_WITH_CONTEXT lower_aarch32_irq
+.org 0x700
+	FIQ_SUSPEND
+.org 0x780
+	CALL_WITH_CONTEXT lower_aarch32_serror
+.org 0x800
+
+//------------------------------------------------------------------------------
+// fn __exception_restore_context()
+//------------------------------------------------------------------------------
+__exception_restore_context:
+	ldr	w19,      [sp, #16 * 16]
+	ldp	lr,  x20, [sp, #16 * 15]
+
+	msr	SPSR_EL1, x19
+	msr	ELR_EL1,  x20
+
+	ldp	x0,  x1,  [sp, #16 * 0]
+	ldp	x2,  x3,  [sp, #16 * 1]
+	ldp	x4,  x5,  [sp, #16 * 2]
+	ldp	x6,  x7,  [sp, #16 * 3]
+	ldp	x8,  x9,  [sp, #16 * 4]
+	ldp	x10, x11, [sp, #16 * 5]
+	ldp	x12, x13, [sp, #16 * 6]
+	ldp	x14, x15, [sp, #16 * 7]
+	ldp	x16, x17, [sp, #16 * 8]
+	ldp	x18, x19, [sp, #16 * 9]
+	ldp	x20, x21, [sp, #16 * 10]
+	ldp	x22, x23, [sp, #16 * 11]
+	ldp	x24, x25, [sp, #16 * 12]
+	ldp	x26, x27, [sp, #16 * 13]
+	ldp	x28, x29, [sp, #16 * 14]
+
+	add	sp,  sp,  #16 * 17
+
+	eret
+
+.size	__exception_restore_context, . - __exception_restore_context
+.type	__exception_restore_context, function
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception/asynchronous.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception/asynchronous.rs
new file mode 100644
index 000000000..a4b1a548e
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception/asynchronous.rs
@@ -0,0 +1,150 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural asynchronous exception handling.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::exception::asynchronous::arch_asynchronous
+
+use cortex_a::regs::*;
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+mod daif_bits {
+    pub const IRQ: u8 = 0b0010;
+}
+
+trait DaifField {
+    fn daif_field() -> register::Field<u64, DAIF::Register>;
+}
+
+struct Debug;
+struct SError;
+struct IRQ;
+struct FIQ;
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl DaifField for Debug {
+    fn daif_field() -> register::Field<u64, DAIF::Register> {
+        DAIF::D
+    }
+}
+
+impl DaifField for SError {
+    fn daif_field() -> register::Field<u64, DAIF::Register> {
+        DAIF::A
+    }
+}
+
+impl DaifField for IRQ {
+    fn daif_field() -> register::Field<u64, DAIF::Register> {
+        DAIF::I
+    }
+}
+
+impl DaifField for FIQ {
+    fn daif_field() -> register::Field<u64, DAIF::Register> {
+        DAIF::F
+    }
+}
+
+fn is_masked<T>() -> bool
+where
+    T: DaifField,
+{
+    DAIF.is_set(T::daif_field())
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Returns whether IRQs are masked on the executing core.
+pub fn is_local_irq_masked() -> bool {
+    !is_masked::<IRQ>()
+}
+
+/// Unmask IRQs on the executing core.
+///
+/// It is not needed to place an explicit instruction synchronization barrier after the `msr`.
+/// Quoting the Architecture Reference Manual for ARMv8-A, section C5.1.3:
+///
+/// "Writes to PSTATE.{PAN, D, A, I, F} occur in program order without the need for additional
+/// synchronization."
+///
+/// # Safety
+///
+/// - Changes the HW state of the executing core.
+#[inline(always)]
+pub unsafe fn local_irq_unmask() {
+    #[rustfmt::skip]
+    asm!(
+        "msr DAIFClr, {arg}",
+        arg = const daif_bits::IRQ,
+        options(nomem, nostack, preserves_flags)
+    );
+}
+
+/// Mask IRQs on the executing core.
+///
+/// # Safety
+///
+/// - Changes the HW state of the executing core.
+#[inline(always)]
+pub unsafe fn local_irq_mask() {
+    #[rustfmt::skip]
+    asm!(
+        "msr DAIFSet, {arg}",
+        arg = const daif_bits::IRQ,
+        options(nomem, nostack, preserves_flags)
+    );
+}
+
+/// Mask IRQs on the executing core and return the previously saved interrupt mask bits (DAIF).
+///
+/// # Safety
+///
+/// - Changes the HW state of the executing core.
+#[inline(always)]
+pub unsafe fn local_irq_mask_save() -> u64 {
+    let saved = DAIF.get();
+    local_irq_mask();
+
+    saved
+}
+
+/// Restore the interrupt mask bits (DAIF) using the callee's argument.
+///
+/// # Safety
+///
+/// - Changes the HW state of the executing core.
+/// - No sanity checks on the input.
+#[inline(always)]
+pub unsafe fn local_irq_restore(saved: u64) {
+    DAIF.set(saved);
+}
+
+/// Print the AArch64 exceptions status.
+#[rustfmt::skip]
+pub fn print_state() {
+    use crate::info;
+
+    let to_mask_str = |x| -> _ {
+        if x { "Masked" } else { "Unmasked" }
+    };
+
+    info!("      Debug:  {}", to_mask_str(is_masked::<Debug>()));
+    info!("      SError: {}", to_mask_str(is_masked::<SError>()));
+    info!("      IRQ:    {}", to_mask_str(is_masked::<IRQ>()));
+    info!("      FIQ:    {}", to_mask_str(is_masked::<FIQ>()));
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu.rs
new file mode 100644
index 000000000..49e6630ed
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu.rs
@@ -0,0 +1,182 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Memory Management Unit Driver.
+//!
+//! Only 64 KiB granule is supported.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::memory::mmu::arch_mmu
+
+use crate::{
+    bsp, memory,
+    memory::{mmu::TranslationGranule, Address, Physical, Virtual},
+};
+use core::intrinsics::unlikely;
+use cortex_a::{barrier, regs::*};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Memory Management Unit type.
+struct MemoryManagementUnit;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub type Granule512MiB = TranslationGranule<{ 512 * 1024 * 1024 }>;
+pub type Granule64KiB = TranslationGranule<{ 64 * 1024 }>;
+
+/// Constants for indexing the MAIR_EL1.
+#[allow(dead_code)]
+pub mod mair {
+    pub const DEVICE: u64 = 0;
+    pub const NORMAL: u64 = 1;
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static MMU: MemoryManagementUnit = MemoryManagementUnit;
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl<const AS_SIZE: usize> memory::mmu::AddressSpace<AS_SIZE> {
+    /// Checks for architectural restrictions.
+    pub const fn arch_address_space_size_sanity_checks() {
+        // Size must be at least one full 512 MiB table.
+        assert!((AS_SIZE % Granule512MiB::SIZE) == 0);
+
+        // Check for 48 bit virtual address size as maximum, which is supported by any ARMv8
+        // version.
+        assert!(AS_SIZE <= (1 << 48));
+    }
+}
+
+impl MemoryManagementUnit {
+    /// Setup function for the MAIR_EL1 register.
+    fn set_up_mair(&self) {
+        // Define the memory types being mapped.
+        MAIR_EL1.write(
+            // Attribute 1 - Cacheable normal DRAM.
+            MAIR_EL1::Attr1_Normal_Outer::WriteBack_NonTransient_ReadWriteAlloc +
+        MAIR_EL1::Attr1_Normal_Inner::WriteBack_NonTransient_ReadWriteAlloc +
+
+        // Attribute 0 - Device.
+        MAIR_EL1::Attr0_Device::nonGathering_nonReordering_EarlyWriteAck,
+        );
+    }
+
+    /// Configure various settings of stage 1 of the EL1 translation regime.
+    fn configure_translation_control(&self) {
+        let t0sz = (64 - bsp::memory::mmu::KernelVirtAddrSpace::SIZE_SHIFT) as u64;
+
+        TCR_EL1.write(
+            TCR_EL1::TBI0::Used
+                + TCR_EL1::IPS::Bits_40
+                + TCR_EL1::TG0::KiB_64
+                + TCR_EL1::SH0::Inner
+                + TCR_EL1::ORGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
+                + TCR_EL1::IRGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
+                + TCR_EL1::EPD0::EnableTTBR0Walks
+                + TCR_EL1::A1::TTBR0
+                + TCR_EL1::T0SZ.val(t0sz)
+                + TCR_EL1::EPD1::DisableTTBR1Walks,
+        );
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the MMU instance.
+pub fn mmu() -> &'static impl memory::mmu::interface::MMU {
+    &MMU
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use memory::mmu::{MMUEnableError, TranslationError};
+
+impl memory::mmu::interface::MMU for MemoryManagementUnit {
+    unsafe fn enable_mmu_and_caching(
+        &self,
+        phys_tables_base_addr: Address<Physical>,
+    ) -> Result<(), MMUEnableError> {
+        if unlikely(self.is_enabled()) {
+            return Err(MMUEnableError::AlreadyEnabled);
+        }
+
+        // Fail early if translation granule is not supported.
+        if unlikely(!ID_AA64MMFR0_EL1.matches_all(ID_AA64MMFR0_EL1::TGran64::Supported)) {
+            return Err(MMUEnableError::Other(
+                "Translation granule not supported in HW",
+            ));
+        }
+
+        // Prepare the memory attribute indirection register.
+        self.set_up_mair();
+
+        // Set the "Translation Table Base Register".
+        TTBR0_EL1.set_baddr(phys_tables_base_addr.into_usize() as u64);
+
+        self.configure_translation_control();
+
+        // Switch the MMU on.
+        //
+        // First, force all previous changes to be seen before the MMU is enabled.
+        barrier::isb(barrier::SY);
+
+        // Enable the MMU and turn on data and instruction caching.
+        SCTLR_EL1.modify(SCTLR_EL1::M::Enable + SCTLR_EL1::C::Cacheable + SCTLR_EL1::I::Cacheable);
+
+        // Force MMU init to complete before next instruction.
+        barrier::isb(barrier::SY);
+
+        Ok(())
+    }
+
+    #[inline(always)]
+    fn is_enabled(&self) -> bool {
+        SCTLR_EL1.matches_all(SCTLR_EL1::M::Enable)
+    }
+
+    fn try_virt_to_phys(
+        &self,
+        virt: Address<Virtual>,
+    ) -> Result<Address<Physical>, TranslationError> {
+        if !self.is_enabled() {
+            return Err(TranslationError::MMUDisabled);
+        }
+
+        let addr = virt.into_usize() as u64;
+        unsafe {
+            asm!(
+            "AT S1E1R, {0}",
+            in(reg) addr,
+            options(readonly, nostack, preserves_flags)
+            );
+        }
+
+        let par_el1 = PAR_EL1.extract();
+        if par_el1.matches_all(PAR_EL1::F::TranslationAborted) {
+            return Err(TranslationError::Aborted);
+        }
+
+        let phys_addr = (par_el1.read(PAR_EL1::PA) << 12) | (addr & 0xFFF);
+
+        Ok(Address::new(phys_addr as usize))
+    }
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs
new file mode 100644
index 000000000..5f781bdd5
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -0,0 +1,474 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural translation table.
+//!
+//! Only 64 KiB granule is supported.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::memory::mmu::translation_table::arch_translation_table
+
+use crate::{
+    bsp, memory,
+    memory::{
+        mmu::{
+            arch_mmu::{Granule512MiB, Granule64KiB},
+            AccessPermissions, AttributeFields, MemAttributes, Page, PageSliceDescriptor,
+        },
+        Address, Physical, Virtual,
+    },
+};
+use core::convert::{self, TryInto};
+use register::{register_bitfields, InMemoryRegister};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+// A table descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-15.
+register_bitfields! {u64,
+    STAGE1_TABLE_DESCRIPTOR [
+        /// Physical address of the next descriptor.
+        NEXT_LEVEL_TABLE_ADDR_64KiB OFFSET(16) NUMBITS(32) [], // [47:16]
+
+        TYPE  OFFSET(1) NUMBITS(1) [
+            Block = 0,
+            Table = 1
+        ],
+
+        VALID OFFSET(0) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ]
+    ]
+}
+
+// A level 3 page descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-17.
+register_bitfields! {u64,
+    STAGE1_PAGE_DESCRIPTOR [
+        /// Unprivileged execute-never.
+        UXN      OFFSET(54) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
+        /// Privileged execute-never.
+        PXN      OFFSET(53) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
+        /// Physical address of the next table descriptor (lvl2) or the page descriptor (lvl3).
+        OUTPUT_ADDR_64KiB OFFSET(16) NUMBITS(32) [], // [47:16]
+
+        /// Access flag.
+        AF       OFFSET(10) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
+        /// Shareability field.
+        SH       OFFSET(8) NUMBITS(2) [
+            OuterShareable = 0b10,
+            InnerShareable = 0b11
+        ],
+
+        /// Access Permissions.
+        AP       OFFSET(6) NUMBITS(2) [
+            RW_EL1 = 0b00,
+            RW_EL1_EL0 = 0b01,
+            RO_EL1 = 0b10,
+            RO_EL1_EL0 = 0b11
+        ],
+
+        /// Memory attributes index into the MAIR_EL1 register.
+        AttrIndx OFFSET(2) NUMBITS(3) [],
+
+        TYPE     OFFSET(1) NUMBITS(1) [
+            Reserved_Invalid = 0,
+            Page = 1
+        ],
+
+        VALID    OFFSET(0) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ]
+    ]
+}
+
+/// A table descriptor for 64 KiB aperture.
+///
+/// The output points to the next table.
+#[derive(Copy, Clone)]
+#[repr(C)]
+struct TableDescriptor {
+    value: u64,
+}
+
+/// A page descriptor with 64 KiB aperture.
+///
+/// The output points to physical memory.
+#[derive(Copy, Clone)]
+#[repr(C)]
+struct PageDescriptor {
+    value: u64,
+}
+
+trait StartAddr {
+    fn virt_start_addr(&self) -> Address<Virtual>;
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Big monolithic struct for storing the translation tables. Individual levels must be 64 KiB
+/// aligned, so the lvl3 is put first.
+#[repr(C)]
+#[repr(align(65536))]
+pub struct FixedSizeTranslationTable<const NUM_TABLES: usize> {
+    /// Page descriptors, covering 64 KiB windows per entry.
+    lvl3: [[PageDescriptor; 8192]; NUM_TABLES],
+
+    /// Table descriptors, covering 512 MiB windows.
+    lvl2: [TableDescriptor; NUM_TABLES],
+
+    /// Index of the next free MMIO page.
+    cur_l3_mmio_index: usize,
+
+    /// Have the tables been initialized?
+    initialized: bool,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl<T, const N: usize> StartAddr for [T; N] {
+    fn virt_start_addr(&self) -> Address<Virtual> {
+        Address::new(self as *const _ as usize)
+    }
+}
+
+impl TableDescriptor {
+    /// Create an instance.
+    ///
+    /// Descriptor is invalid by default.
+    pub const fn new_zeroed() -> Self {
+        Self { value: 0 }
+    }
+
+    /// Create an instance pointing to the supplied address.
+    pub fn from_next_lvl_table_addr(phys_next_lvl_table_addr: Address<Physical>) -> Self {
+        let val = InMemoryRegister::<u64, STAGE1_TABLE_DESCRIPTOR::Register>::new(0);
+
+        let shifted = phys_next_lvl_table_addr.into_usize() >> Granule64KiB::SHIFT;
+        val.write(
+            STAGE1_TABLE_DESCRIPTOR::NEXT_LEVEL_TABLE_ADDR_64KiB.val(shifted as u64)
+                + STAGE1_TABLE_DESCRIPTOR::TYPE::Table
+                + STAGE1_TABLE_DESCRIPTOR::VALID::True,
+        );
+
+        TableDescriptor { value: val.get() }
+    }
+}
+
+/// Convert the kernel's generic memory attributes to HW-specific attributes of the MMU.
+impl convert::From<AttributeFields>
+    for register::FieldValue<u64, STAGE1_PAGE_DESCRIPTOR::Register>
+{
+    fn from(attribute_fields: AttributeFields) -> Self {
+        // Memory attributes.
+        let mut desc = match attribute_fields.mem_attributes {
+            MemAttributes::CacheableDRAM => {
+                STAGE1_PAGE_DESCRIPTOR::SH::InnerShareable
+                    + STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(memory::mmu::arch_mmu::mair::NORMAL)
+            }
+            MemAttributes::Device => {
+                STAGE1_PAGE_DESCRIPTOR::SH::OuterShareable
+                    + STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(memory::mmu::arch_mmu::mair::DEVICE)
+            }
+        };
+
+        // Access Permissions.
+        desc += match attribute_fields.acc_perms {
+            AccessPermissions::ReadOnly => STAGE1_PAGE_DESCRIPTOR::AP::RO_EL1,
+            AccessPermissions::ReadWrite => STAGE1_PAGE_DESCRIPTOR::AP::RW_EL1,
+        };
+
+        // The execute-never attribute is mapped to PXN in AArch64.
+        desc += if attribute_fields.execute_never {
+            STAGE1_PAGE_DESCRIPTOR::PXN::True
+        } else {
+            STAGE1_PAGE_DESCRIPTOR::PXN::False
+        };
+
+        // Always set unprivileged exectue-never as long as userspace is not implemented yet.
+        desc += STAGE1_PAGE_DESCRIPTOR::UXN::True;
+
+        desc
+    }
+}
+
+impl PageDescriptor {
+    /// Create an instance.
+    ///
+    /// Descriptor is invalid by default.
+    pub const fn new_zeroed() -> Self {
+        Self { value: 0 }
+    }
+
+    /// Create an instance.
+    pub fn from_output_addr(
+        phys_output_addr: *const Page<Physical>,
+        attribute_fields: &AttributeFields,
+    ) -> Self {
+        let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
+
+        let shifted = phys_output_addr as u64 >> Granule64KiB::SHIFT;
+        val.write(
+            STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted)
+                + STAGE1_PAGE_DESCRIPTOR::AF::True
+                + STAGE1_PAGE_DESCRIPTOR::TYPE::Page
+                + STAGE1_PAGE_DESCRIPTOR::VALID::True
+                + attribute_fields.clone().into(),
+        );
+
+        Self { value: val.get() }
+    }
+
+    /// Returns the valid bit.
+    fn is_valid(&self) -> bool {
+        InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(self.value)
+            .is_set(STAGE1_PAGE_DESCRIPTOR::VALID)
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl<const AS_SIZE: usize> memory::mmu::AssociatedTranslationTable
+    for memory::mmu::AddressSpace<AS_SIZE>
+where
+    [u8; Self::SIZE >> Granule512MiB::SHIFT]: Sized,
+{
+    type TableStartFromBottom = FixedSizeTranslationTable<{ Self::SIZE >> Granule512MiB::SHIFT }>;
+}
+
+impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
+    // Reserve the last 256 MiB of the address space for MMIO mappings.
+    const L2_MMIO_START_INDEX: usize = NUM_TABLES - 1;
+    const L3_MMIO_START_INDEX: usize = 8192 / 2;
+
+    /// Create an instance.
+    #[allow(clippy::assertions_on_constants)]
+    const fn _new(for_precompute: bool) -> Self {
+        assert!(bsp::memory::mmu::KernelGranule::SIZE == Granule64KiB::SIZE);
+
+        // Can't have a zero-sized address space.
+        assert!(NUM_TABLES > 0);
+
+        Self {
+            lvl3: [[PageDescriptor::new_zeroed(); 8192]; NUM_TABLES],
+            lvl2: [TableDescriptor::new_zeroed(); NUM_TABLES],
+            cur_l3_mmio_index: Self::L3_MMIO_START_INDEX,
+            initialized: for_precompute,
+        }
+    }
+
+    pub const fn new_for_precompute() -> Self {
+        Self::_new(true)
+    }
+
+    #[cfg(test)]
+    pub fn new_for_runtime() -> Self {
+        Self::_new(false)
+    }
+
+    /// The start address of the table's MMIO range.
+    #[inline(always)]
+    fn mmio_start_addr(&self) -> Address<Virtual> {
+        Address::new(
+            (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
+                | (Self::L3_MMIO_START_INDEX << Granule64KiB::SHIFT),
+        )
+    }
+
+    /// The inclusive end address of the table's MMIO range.
+    #[inline(always)]
+    fn mmio_end_addr_inclusive(&self) -> Address<Virtual> {
+        Address::new(
+            (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
+                | (8191 << Granule64KiB::SHIFT)
+                | (Granule64KiB::SIZE - 1),
+        )
+    }
+
+    /// Helper to calculate the lvl2 and lvl3 indices from an address.
+    #[inline(always)]
+    fn lvl2_lvl3_index_from(
+        &self,
+        addr: *const Page<Virtual>,
+    ) -> Result<(usize, usize), &'static str> {
+        let addr = addr as usize;
+        let lvl2_index = addr >> Granule512MiB::SHIFT;
+        let lvl3_index = (addr & Granule512MiB::MASK) >> Granule64KiB::SHIFT;
+
+        if lvl2_index > (NUM_TABLES - 1) {
+            return Err("Virtual page is out of bounds of translation table");
+        }
+
+        Ok((lvl2_index, lvl3_index))
+    }
+
+    /// Returns the PageDescriptor corresponding to the supplied Page.
+    #[inline(always)]
+    fn page_descriptor_from(
+        &mut self,
+        addr: *const Page<Virtual>,
+    ) -> Result<&mut PageDescriptor, &'static str> {
+        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from(addr)?;
+
+        Ok(&mut self.lvl3[lvl2_index][lvl3_index])
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+
+impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::TranslationTable
+    for FixedSizeTranslationTable<NUM_TABLES>
+{
+    fn init(&mut self) -> Result<(), &'static str> {
+        if self.initialized {
+            return Ok(());
+        }
+
+        // Populate the l2 entries.
+        for (lvl2_nr, lvl2_entry) in self.lvl2.iter_mut().enumerate() {
+            let addr = self.lvl3[lvl2_nr]
+                .virt_start_addr()
+                .try_into()
+                .map_err(|_| "Translation error")?;
+
+            let desc = TableDescriptor::from_next_lvl_table_addr(addr);
+            *lvl2_entry = desc;
+        }
+
+        self.cur_l3_mmio_index = Self::L3_MMIO_START_INDEX;
+        self.initialized = true;
+
+        Ok(())
+    }
+
+    unsafe fn map_pages_at(
+        &mut self,
+        virt_pages: &PageSliceDescriptor<Virtual>,
+        phys_pages: &PageSliceDescriptor<Physical>,
+        attr: &AttributeFields,
+    ) -> Result<(), &'static str> {
+        assert_eq!(self.initialized, true, "Translation tables not initialized");
+
+        let p = phys_pages.as_slice();
+        let v = virt_pages.as_slice();
+
+        // No work to do for empty slices.
+        if v.is_empty() {
+            return Ok(());
+        }
+
+        if v.len() != p.len() {
+            return Err("Tried to map page slices with unequal sizes");
+        }
+
+        if p.last().unwrap().as_ptr() >= bsp::memory::mmu::phys_addr_space_end_page() {
+            return Err("Tried to map outside of physical address space");
+        }
+
+        let iter = p.iter().zip(v.iter());
+        for (phys_page, virt_page) in iter {
+            let page_descriptor = self.page_descriptor_from(virt_page.as_ptr())?;
+            if page_descriptor.is_valid() {
+                return Err("Virtual page is already mapped");
+            }
+
+            *page_descriptor = PageDescriptor::from_output_addr(phys_page.as_ptr(), &attr);
+        }
+
+        Ok(())
+    }
+
+    fn next_mmio_virt_page_slice(
+        &mut self,
+        num_pages: usize,
+    ) -> Result<PageSliceDescriptor<Virtual>, &'static str> {
+        assert_eq!(self.initialized, true, "Translation tables not initialized");
+
+        if num_pages == 0 {
+            return Err("num_pages == 0");
+        }
+
+        if (self.cur_l3_mmio_index + num_pages) > 8191 {
+            return Err("Not enough MMIO space left");
+        }
+
+        let addr = Address::new(
+            (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
+                | (self.cur_l3_mmio_index << Granule64KiB::SHIFT),
+        );
+        self.cur_l3_mmio_index += num_pages;
+
+        Ok(PageSliceDescriptor::from_addr(addr, num_pages))
+    }
+
+    fn is_virt_page_slice_mmio(&self, virt_pages: &PageSliceDescriptor<Virtual>) -> bool {
+        let start_addr = virt_pages.start_addr();
+        let end_addr_inclusive = virt_pages.end_addr_inclusive();
+
+        for i in [start_addr, end_addr_inclusive].iter() {
+            if (*i >= self.mmio_start_addr()) && (*i <= self.mmio_end_addr_inclusive()) {
+                return true;
+            }
+        }
+
+        false
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+pub type MinSizeTranslationTable = FixedSizeTranslationTable<1>;
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// Check if the size of `struct TableDescriptor` is as expected.
+    #[kernel_test]
+    fn size_of_tabledescriptor_equals_64_bit() {
+        assert_eq!(
+            core::mem::size_of::<TableDescriptor>(),
+            core::mem::size_of::<u64>()
+        );
+    }
+
+    /// Check if the size of `struct PageDescriptor` is as expected.
+    #[kernel_test]
+    fn size_of_pagedescriptor_equals_64_bit() {
+        assert_eq!(
+            core::mem::size_of::<PageDescriptor>(),
+            core::mem::size_of::<u64>()
+        );
+    }
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/time.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/time.rs
new file mode 100644
index 000000000..63017305b
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/time.rs
@@ -0,0 +1,118 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural timer primitives.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::time::arch_time
+
+use crate::{time, warn};
+use core::time::Duration;
+use cortex_a::{barrier, regs::*};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+const NS_PER_S: u64 = 1_000_000_000;
+
+/// ARMv8 Generic Timer.
+struct GenericTimer;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static TIME_MANAGER: GenericTimer = GenericTimer;
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl GenericTimer {
+    #[inline(always)]
+    fn read_cntpct(&self) -> u64 {
+        // Prevent that the counter is read ahead of time due to out-of-order execution.
+        unsafe { barrier::isb(barrier::SY) };
+        CNTPCT_EL0.get()
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the time manager.
+pub fn time_manager() -> &'static impl time::interface::TimeManager {
+    &TIME_MANAGER
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+
+impl time::interface::TimeManager for GenericTimer {
+    fn resolution(&self) -> Duration {
+        Duration::from_nanos(NS_PER_S / (CNTFRQ_EL0.get() as u64))
+    }
+
+    fn uptime(&self) -> Duration {
+        let current_count: u64 = self.read_cntpct() * NS_PER_S;
+        let frq: u64 = CNTFRQ_EL0.get() as u64;
+
+        Duration::from_nanos(current_count / frq)
+    }
+
+    fn spin_for(&self, duration: Duration) {
+        // Instantly return on zero.
+        if duration.as_nanos() == 0 {
+            return;
+        }
+
+        // Calculate the register compare value.
+        let frq = CNTFRQ_EL0.get();
+        let x = match frq.checked_mul(duration.as_nanos() as u64) {
+            None => {
+                warn!("Spin duration too long, skipping");
+                return;
+            }
+            Some(val) => val,
+        };
+        let tval = x / NS_PER_S;
+
+        // Check if it is within supported bounds.
+        let warn: Option<&str> = if tval == 0 {
+            Some("smaller")
+        // The upper 32 bits of CNTP_TVAL_EL0 are reserved.
+        } else if tval > u32::max_value().into() {
+            Some("bigger")
+        } else {
+            None
+        };
+
+        if let Some(w) = warn {
+            warn!(
+                "Spin duration {} than architecturally supported, skipping",
+                w
+            );
+            return;
+        }
+
+        // Set the compare value register.
+        CNTP_TVAL_EL0.set(tval);
+
+        // Kick off the counting.                       // Disable timer interrupt.
+        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::SET + CNTP_CTL_EL0::IMASK::SET);
+
+        // ISTATUS will be '1' when cval ticks have passed. Busy-check it.
+        while !CNTP_CTL_EL0.matches_all(CNTP_CTL_EL0::ISTATUS::SET) {}
+
+        // Disable counting again.
+        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::CLEAR);
+    }
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp.rs
new file mode 100644
index 000000000..c558922f7
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp.rs
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Conditional reexporting of Board Support Packages.
+
+mod device_driver;
+
+#[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
+mod raspberrypi;
+
+#[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
+pub use raspberrypi::*;
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver.rs
new file mode 100644
index 000000000..eac6bdd16
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver.rs
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Device driver.
+
+#[cfg(feature = "bsp_rpi4")]
+mod arm;
+#[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
+mod bcm;
+mod common;
+
+#[cfg(feature = "bsp_rpi4")]
+pub use arm::*;
+#[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
+pub use bcm::*;
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm.rs
new file mode 100644
index 000000000..0bb1bd4b6
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! ARM driver top level.
+
+pub mod gicv2;
+
+pub use gicv2::*;
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2.rs
new file mode 100644
index 000000000..51c321868
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2.rs
@@ -0,0 +1,248 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! GICv2 Driver - ARM Generic Interrupt Controller v2.
+//!
+//! The following is a collection of excerpts with useful information from
+//!   - `Programmer's Guide for ARMv8-A`
+//!   - `ARM Generic Interrupt Controller Architecture Specification`
+//!
+//! # Programmer's Guide - 10.6.1 Configuration
+//!
+//! The GIC is accessed as a memory-mapped peripheral.
+//!
+//! All cores can access the common Distributor, but the CPU interface is banked, that is, each core
+//! uses the same address to access its own private CPU interface.
+//!
+//! It is not possible for a core to access the CPU interface of another core.
+//!
+//! # Architecture Specification - 10.6.2 Initialization
+//!
+//! Both the Distributor and the CPU interfaces are disabled at reset. The GIC must be initialized
+//! after reset before it can deliver interrupts to the core.
+//!
+//! In the Distributor, software must configure the priority, target, security and enable individual
+//! interrupts. The Distributor must subsequently be enabled through its control register
+//! (GICD_CTLR). For each CPU interface, software must program the priority mask and preemption
+//! settings.
+//!
+//! Each CPU interface block itself must be enabled through its control register (GICD_CTLR). This
+//! prepares the GIC to deliver interrupts to the core.
+//!
+//! Before interrupts are expected in the core, software prepares the core to take interrupts by
+//! setting a valid interrupt vector in the vector table, and clearing interrupt mask bits in
+//! PSTATE, and setting the routing controls.
+//!
+//! The entire interrupt mechanism in the system can be disabled by disabling the Distributor.
+//! Interrupt delivery to an individual core can be disabled by disabling its CPU interface.
+//! Individual interrupts can also be disabled (or enabled) in the distributor.
+//!
+//! For an interrupt to reach the core, the individual interrupt, Distributor and CPU interface must
+//! all be enabled. The interrupt also needs to be of sufficient priority, that is, higher than the
+//! core's priority mask.
+//!
+//! # Architecture Specification - 1.4.2 Interrupt types
+//!
+//! - Peripheral interrupt
+//!     - Private Peripheral Interrupt (PPI)
+//!         - This is a peripheral interrupt that is specific to a single processor.
+//!     - Shared Peripheral Interrupt (SPI)
+//!         - This is a peripheral interrupt that the Distributor can route to any of a specified
+//!           combination of processors.
+//!
+//! - Software-generated interrupt (SGI)
+//!     - This is an interrupt generated by software writing to a GICD_SGIR register in the GIC. The
+//!       system uses SGIs for interprocessor communication.
+//!     - An SGI has edge-triggered properties. The software triggering of the interrupt is
+//!       equivalent to the edge transition of the interrupt request signal.
+//!     - When an SGI occurs in a multiprocessor implementation, the CPUID field in the Interrupt
+//!       Acknowledge Register, GICC_IAR, or the Aliased Interrupt Acknowledge Register, GICC_AIAR,
+//!       identifies the processor that requested the interrupt.
+//!
+//! # Architecture Specification - 2.2.1 Interrupt IDs
+//!
+//! Interrupts from sources are identified using ID numbers. Each CPU interface can see up to 1020
+//! interrupts. The banking of SPIs and PPIs increases the total number of interrupts supported by
+//! the Distributor.
+//!
+//! The GIC assigns interrupt ID numbers ID0-ID1019 as follows:
+//!   - Interrupt numbers 32..1019 are used for SPIs.
+//!   - Interrupt numbers 0..31 are used for interrupts that are private to a CPU interface. These
+//!     interrupts are banked in the Distributor.
+//!       - A banked interrupt is one where the Distributor can have multiple interrupts with the
+//!         same ID. A banked interrupt is identified uniquely by its ID number and its associated
+//!         CPU interface number. Of the banked interrupt IDs:
+//!           - 00..15 SGIs
+//!           - 16..31 PPIs
+
+mod gicc;
+mod gicd;
+
+use crate::{bsp, cpu, driver, exception, memory, synchronization, synchronization::InitStateLock};
+use core::sync::atomic::{AtomicBool, Ordering};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; GICv2::NUM_IRQS];
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Used for the associated type of trait [`exception::asynchronous::interface::IRQManager`].
+pub type IRQNumber = exception::asynchronous::IRQNumber<{ GICv2::MAX_IRQ_NUMBER }>;
+
+/// Representation of the GIC.
+pub struct GICv2 {
+    gicd_mmio_descriptor: memory::mmu::MMIODescriptor,
+    gicc_mmio_descriptor: memory::mmu::MMIODescriptor,
+
+    /// The Distributor.
+    gicd: gicd::GICD,
+
+    /// The CPU Interface.
+    gicc: gicc::GICC,
+
+    /// Have the MMIO regions been remapped yet?
+    is_mmio_remapped: AtomicBool,
+
+    /// Stores registered IRQ handlers. Writable only during kernel init. RO afterwards.
+    handler_table: InitStateLock<HandlerTable>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl GICv2 {
+    const MAX_IRQ_NUMBER: usize = 300; // Normally 1019, but keep it lower to save some space.
+    const NUM_IRQS: usize = Self::MAX_IRQ_NUMBER + 1;
+
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide correct MMIO descriptors.
+    pub const unsafe fn new(
+        gicd_mmio_descriptor: memory::mmu::MMIODescriptor,
+        gicc_mmio_descriptor: memory::mmu::MMIODescriptor,
+    ) -> Self {
+        Self {
+            gicd_mmio_descriptor,
+            gicc_mmio_descriptor,
+            gicd: gicd::GICD::new(gicd_mmio_descriptor.start_addr().into_usize()),
+            gicc: gicc::GICC::new(gicc_mmio_descriptor.start_addr().into_usize()),
+            is_mmio_remapped: AtomicBool::new(false),
+            handler_table: InitStateLock::new([None; Self::NUM_IRQS]),
+        }
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use synchronization::interface::ReadWriteEx;
+
+impl driver::interface::DeviceDriver for GICv2 {
+    fn compatible(&self) -> &'static str {
+        "GICv2 (ARM Generic Interrupt Controller v2)"
+    }
+
+    unsafe fn init(&self) -> Result<(), &'static str> {
+        let remapped = self.is_mmio_remapped.load(Ordering::Relaxed);
+        if !remapped {
+            let mut virt_addr;
+
+            // GICD
+            virt_addr = memory::mmu::kernel_map_mmio("GICD", &self.gicd_mmio_descriptor)?;
+            self.gicd.set_mmio(virt_addr.into_usize());
+
+            // GICC
+            virt_addr = memory::mmu::kernel_map_mmio("GICC", &self.gicc_mmio_descriptor)?;
+            self.gicc.set_mmio(virt_addr.into_usize());
+
+            // Conclude remapping.
+            self.is_mmio_remapped.store(true, Ordering::Relaxed);
+        }
+
+        if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
+            self.gicd.boot_core_init();
+        }
+
+        self.gicc.priority_accept_all();
+        self.gicc.enable();
+
+        Ok(())
+    }
+}
+
+impl exception::asynchronous::interface::IRQManager for GICv2 {
+    type IRQNumberType = IRQNumber;
+
+    fn register_handler(
+        &self,
+        irq_number: Self::IRQNumberType,
+        descriptor: exception::asynchronous::IRQDescriptor,
+    ) -> Result<(), &'static str> {
+        self.handler_table.write(|table| {
+            let irq_number = irq_number.get();
+
+            if table[irq_number].is_some() {
+                return Err("IRQ handler already registered");
+            }
+
+            table[irq_number] = Some(descriptor);
+
+            Ok(())
+        })
+    }
+
+    fn enable(&self, irq_number: Self::IRQNumberType) {
+        self.gicd.enable(irq_number);
+    }
+
+    fn handle_pending_irqs<'irq_context>(
+        &'irq_context self,
+        ic: &exception::asynchronous::IRQContext<'irq_context>,
+    ) {
+        // Extract the highest priority pending IRQ number from the Interrupt Acknowledge Register
+        // (IAR).
+        let irq_number = self.gicc.pending_irq_number(ic);
+
+        // Guard against spurious interrupts.
+        if irq_number > GICv2::MAX_IRQ_NUMBER {
+            return;
+        }
+
+        // Call the IRQ handler. Panic if there is none.
+        self.handler_table.read(|table| {
+            match table[irq_number] {
+                None => panic!("No handler registered for IRQ {}", irq_number),
+                Some(descriptor) => {
+                    // Call the IRQ handler. Panics on failure.
+                    descriptor.handler.handle().expect("Error handling IRQ");
+                }
+            }
+        });
+
+        // Signal completion of handling.
+        self.gicc.mark_comleted(irq_number as u32, ic);
+    }
+
+    fn print_handler(&self) {
+        use crate::info;
+
+        info!("      Peripheral handler:");
+
+        self.handler_table.read(|table| {
+            for (i, opt) in table.iter().skip(32).enumerate() {
+                if let Some(handler) = opt {
+                    info!("            {: >3}. {}", i + 32, handler.name);
+                }
+            }
+        });
+    }
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2/gicc.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2/gicc.rs
new file mode 100644
index 000000000..a1279f956
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2/gicc.rs
@@ -0,0 +1,152 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! GICC Driver - GIC CPU interface.
+
+use crate::{
+    bsp::device_driver::common::MMIODerefWrapper, exception, synchronization::InitStateLock,
+};
+use register::{mmio::*, register_bitfields, register_structs};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+register_bitfields! {
+    u32,
+
+    /// CPU Interface Control Register
+    CTLR [
+        Enable OFFSET(0) NUMBITS(1) []
+    ],
+
+    /// Interrupt Priority Mask Register
+    PMR [
+        Priority OFFSET(0) NUMBITS(8) []
+    ],
+
+    /// Interrupt Acknowledge Register
+    IAR [
+        InterruptID OFFSET(0) NUMBITS(10) []
+    ],
+
+    /// End of Interrupt Register
+    EOIR [
+        EOIINTID OFFSET(0) NUMBITS(10) []
+    ]
+}
+
+register_structs! {
+    #[allow(non_snake_case)]
+    pub RegisterBlock {
+        (0x000 => CTLR: ReadWrite<u32, CTLR::Register>),
+        (0x004 => PMR: ReadWrite<u32, PMR::Register>),
+        (0x008 => _reserved1),
+        (0x00C => IAR: ReadWrite<u32, IAR::Register>),
+        (0x010 => EOIR: ReadWrite<u32, EOIR::Register>),
+        (0x014  => @END),
+    }
+}
+
+/// Abstraction for the associated MMIO registers.
+type Registers = MMIODerefWrapper<RegisterBlock>;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Representation of the GIC CPU interface.
+pub struct GICC {
+    registers: InitStateLock<Registers>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+use crate::synchronization::interface::ReadWriteEx;
+
+impl GICC {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+        Self {
+            registers: InitStateLock::new(Registers::new(mmio_start_addr)),
+        }
+    }
+
+    pub unsafe fn set_mmio(&self, new_mmio_start_addr: usize) {
+        self.registers
+            .write(|regs| *regs = Registers::new(new_mmio_start_addr));
+    }
+
+    /// Accept interrupts of any priority.
+    ///
+    /// Quoting the GICv2 Architecture Specification:
+    ///
+    ///   "Writing 255 to the GICC_PMR always sets it to the largest supported priority field
+    ///    value."
+    ///
+    /// # Safety
+    ///
+    /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
+    ///   of `&mut self`.
+    pub fn priority_accept_all(&self) {
+        self.registers.read(|regs| {
+            regs.PMR.write(PMR::Priority.val(255)); // Comment in arch spec.
+        });
+    }
+
+    /// Enable the interface - start accepting IRQs.
+    ///
+    /// # Safety
+    ///
+    /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
+    ///   of `&mut self`.
+    pub fn enable(&self) {
+        self.registers.read(|regs| {
+            regs.CTLR.write(CTLR::Enable::SET);
+        });
+    }
+
+    /// Extract the number of the highest-priority pending IRQ.
+    ///
+    /// Can only be called from IRQ context, which is ensured by taking an `IRQContext` token.
+    ///
+    /// # Safety
+    ///
+    /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
+    ///   of `&mut self`.
+    #[allow(clippy::trivially_copy_pass_by_ref)]
+    pub fn pending_irq_number<'irq_context>(
+        &self,
+        _ic: &exception::asynchronous::IRQContext<'irq_context>,
+    ) -> usize {
+        self.registers
+            .read(|regs| regs.IAR.read(IAR::InterruptID) as usize)
+    }
+
+    /// Complete handling of the currently active IRQ.
+    ///
+    /// Can only be called from IRQ context, which is ensured by taking an `IRQContext` token.
+    ///
+    /// To be called after `pending_irq_number()`.
+    ///
+    /// # Safety
+    ///
+    /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
+    ///   of `&mut self`.
+    #[allow(clippy::trivially_copy_pass_by_ref)]
+    pub fn mark_comleted<'irq_context>(
+        &self,
+        irq_number: u32,
+        _ic: &exception::asynchronous::IRQContext<'irq_context>,
+    ) {
+        self.registers.read(|regs| {
+            regs.EOIR.write(EOIR::EOIINTID.val(irq_number));
+        });
+    }
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2/gicd.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2/gicd.rs
new file mode 100644
index 000000000..5f56e54a1
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -0,0 +1,205 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! GICD Driver - GIC Distributor.
+//!
+//! # Glossary
+//!   - SPI - Shared Peripheral Interrupt.
+
+use crate::{
+    bsp::device_driver::common::MMIODerefWrapper,
+    state, synchronization,
+    synchronization::{IRQSafeNullLock, InitStateLock},
+};
+use register::{mmio::*, register_bitfields, register_structs};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+register_bitfields! {
+    u32,
+
+    /// Distributor Control Register
+    CTLR [
+        Enable OFFSET(0) NUMBITS(1) []
+    ],
+
+    /// Interrupt Controller Type Register
+    TYPER [
+        ITLinesNumber OFFSET(0)  NUMBITS(5) []
+    ],
+
+    /// Interrupt Processor Targets Registers
+    ITARGETSR [
+        Offset3 OFFSET(24) NUMBITS(8) [],
+        Offset2 OFFSET(16) NUMBITS(8) [],
+        Offset1 OFFSET(8)  NUMBITS(8) [],
+        Offset0 OFFSET(0)  NUMBITS(8) []
+    ]
+}
+
+register_structs! {
+    #[allow(non_snake_case)]
+    SharedRegisterBlock {
+        (0x000 => CTLR: ReadWrite<u32, CTLR::Register>),
+        (0x004 => TYPER: ReadOnly<u32, TYPER::Register>),
+        (0x008 => _reserved1),
+        (0x104 => ISENABLER: [ReadWrite<u32>; 31]),
+        (0x108 => _reserved2),
+        (0x820 => ITARGETSR: [ReadWrite<u32, ITARGETSR::Register>; 248]),
+        (0x824 => @END),
+    }
+}
+
+register_structs! {
+    #[allow(non_snake_case)]
+    BankedRegisterBlock {
+        (0x000 => _reserved1),
+        (0x100 => ISENABLER: ReadWrite<u32>),
+        (0x104 => _reserved2),
+        (0x800 => ITARGETSR: [ReadOnly<u32, ITARGETSR::Register>; 8]),
+        (0x804 => @END),
+    }
+}
+
+/// Abstraction for the non-banked parts of the associated MMIO registers.
+type SharedRegisters = MMIODerefWrapper<SharedRegisterBlock>;
+
+/// Abstraction for the banked parts of the associated MMIO registers.
+type BankedRegisters = MMIODerefWrapper<BankedRegisterBlock>;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Representation of the GIC Distributor.
+pub struct GICD {
+    /// Access to shared registers is guarded with a lock.
+    shared_registers: IRQSafeNullLock<SharedRegisters>,
+
+    /// Access to banked registers is unguarded.
+    banked_registers: InitStateLock<BankedRegisters>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl SharedRegisters {
+    /// Return the number of IRQs that this HW implements.
+    #[inline(always)]
+    fn num_irqs(&mut self) -> usize {
+        // Query number of implemented IRQs.
+        //
+        // Refer to GICv2 Architecture Specification, Section 4.3.2.
+        ((self.TYPER.read(TYPER::ITLinesNumber) as usize) + 1) * 32
+    }
+
+    /// Return a slice of the implemented ITARGETSR.
+    #[inline(always)]
+    fn implemented_itargets_slice(&mut self) -> &[ReadWrite<u32, ITARGETSR::Register>] {
+        assert!(self.num_irqs() >= 36);
+
+        // Calculate the max index of the shared ITARGETSR array.
+        //
+        // The first 32 IRQs are private, so not included in `shared_registers`. Each ITARGETS
+        // register has four entries, so shift right by two. Subtract one because we start
+        // counting at zero.
+        let spi_itargetsr_max_index = ((self.num_irqs() - 32) >> 2) - 1;
+
+        // Rust automatically inserts slice range sanity check, i.e. max >= min.
+        &self.ITARGETSR[0..spi_itargetsr_max_index]
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+use crate::synchronization::interface::ReadWriteEx;
+use synchronization::interface::Mutex;
+
+impl GICD {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+        Self {
+            shared_registers: IRQSafeNullLock::new(SharedRegisters::new(mmio_start_addr)),
+            banked_registers: InitStateLock::new(BankedRegisters::new(mmio_start_addr)),
+        }
+    }
+
+    pub unsafe fn set_mmio(&self, new_mmio_start_addr: usize) {
+        self.shared_registers
+            .lock(|regs| *regs = SharedRegisters::new(new_mmio_start_addr));
+        self.banked_registers
+            .write(|regs| *regs = BankedRegisters::new(new_mmio_start_addr));
+    }
+
+    /// Use a banked ITARGETSR to retrieve the executing core's GIC target mask.
+    ///
+    /// Quoting the GICv2 Architecture Specification:
+    ///
+    ///   "GICD_ITARGETSR0 to GICD_ITARGETSR7 are read-only, and each field returns a value that
+    ///    corresponds only to the processor reading the register."
+    fn local_gic_target_mask(&self) -> u32 {
+        self.banked_registers
+            .read(|regs| regs.ITARGETSR[0].read(ITARGETSR::Offset0))
+    }
+
+    /// Route all SPIs to the boot core and enable the distributor.
+    pub fn boot_core_init(&self) {
+        assert!(
+            state::state_manager().is_init(),
+            "Only allowed during kernel init phase"
+        );
+
+        // Target all SPIs to the boot core only.
+        let mask = self.local_gic_target_mask();
+
+        self.shared_registers.lock(|regs| {
+            for i in regs.implemented_itargets_slice().iter() {
+                i.write(
+                    ITARGETSR::Offset3.val(mask)
+                        + ITARGETSR::Offset2.val(mask)
+                        + ITARGETSR::Offset1.val(mask)
+                        + ITARGETSR::Offset0.val(mask),
+                );
+            }
+
+            regs.CTLR.write(CTLR::Enable::SET);
+        });
+    }
+
+    /// Enable an interrupt.
+    pub fn enable(&self, irq_num: super::IRQNumber) {
+        let irq_num = irq_num.get();
+
+        // Each bit in the u32 enable register corresponds to one IRQ number. Shift right by 5
+        // (division by 32) and arrive at the index for the respective ISENABLER[i].
+        let enable_reg_index = irq_num >> 5;
+        let enable_bit: u32 = 1u32 << (irq_num % 32);
+
+        // Check if we are handling a private or shared IRQ.
+        match irq_num {
+            // Private.
+            0..=31 => self.banked_registers.read(|regs| {
+                let enable_reg = &regs.ISENABLER;
+                enable_reg.set(enable_reg.get() | enable_bit);
+            }),
+            // Shared.
+            _ => {
+                let enable_reg_index_shared = enable_reg_index - 1;
+
+                self.shared_registers.lock(|regs| {
+                    let enable_reg = &regs.ISENABLER[enable_reg_index_shared];
+                    enable_reg.set(enable_reg.get() | enable_bit);
+                });
+            }
+        }
+    }
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm.rs
new file mode 100644
index 000000000..01bcaa895
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm.rs
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! BCM driver top level.
+
+mod bcm2xxx_gpio;
+#[cfg(feature = "bsp_rpi3")]
+mod bcm2xxx_interrupt_controller;
+mod bcm2xxx_pl011_uart;
+
+pub use bcm2xxx_gpio::*;
+#[cfg(feature = "bsp_rpi3")]
+pub use bcm2xxx_interrupt_controller::*;
+pub use bcm2xxx_pl011_uart::*;
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
new file mode 100644
index 000000000..e444812ba
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -0,0 +1,255 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! GPIO Driver.
+
+use crate::{
+    bsp::device_driver::common::MMIODerefWrapper, driver, memory, synchronization,
+    synchronization::IRQSafeNullLock,
+};
+use core::sync::atomic::{AtomicUsize, Ordering};
+use register::{mmio::*, register_bitfields, register_structs};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+// GPIO registers.
+//
+// Descriptions taken from
+// - https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
+// - https://datasheets.raspberrypi.org/bcm2711/bcm2711-peripherals.pdf
+register_bitfields! {
+    u32,
+
+    /// GPIO Function Select 1
+    GPFSEL1 [
+        /// Pin 15
+        FSEL15 OFFSET(15) NUMBITS(3) [
+            Input = 0b000,
+            Output = 0b001,
+            AltFunc0 = 0b100  // PL011 UART RX
+
+        ],
+
+        /// Pin 14
+        FSEL14 OFFSET(12) NUMBITS(3) [
+            Input = 0b000,
+            Output = 0b001,
+            AltFunc0 = 0b100  // PL011 UART TX
+        ]
+    ],
+
+    /// GPIO Pull-up/down Register
+    ///
+    /// BCM2837 only.
+    GPPUD [
+        /// Controls the actuation of the internal pull-up/down control line to ALL the GPIO pins.
+        PUD OFFSET(0) NUMBITS(2) [
+            Off = 0b00,
+            PullDown = 0b01,
+            PullUp = 0b10
+        ]
+    ],
+
+    /// GPIO Pull-up/down Clock Register 0
+    ///
+    /// BCM2837 only.
+    GPPUDCLK0 [
+        /// Pin 15
+        PUDCLK15 OFFSET(15) NUMBITS(1) [
+            NoEffect = 0,
+            AssertClock = 1
+        ],
+
+        /// Pin 14
+        PUDCLK14 OFFSET(14) NUMBITS(1) [
+            NoEffect = 0,
+            AssertClock = 1
+        ]
+    ],
+
+    /// GPIO Pull-up / Pull-down Register 0
+    ///
+    /// BCM2711 only.
+    GPIO_PUP_PDN_CNTRL_REG0 [
+        /// Pin 15
+        GPIO_PUP_PDN_CNTRL15 OFFSET(30) NUMBITS(2) [
+            NoResistor = 0b00,
+            PullUp = 0b01
+        ],
+
+        /// Pin 14
+        GPIO_PUP_PDN_CNTRL14 OFFSET(28) NUMBITS(2) [
+            NoResistor = 0b00,
+            PullUp = 0b01
+        ]
+    ]
+}
+
+register_structs! {
+    #[allow(non_snake_case)]
+    RegisterBlock {
+        (0x00 => _reserved1),
+        (0x04 => GPFSEL1: ReadWrite<u32, GPFSEL1::Register>),
+        (0x08 => _reserved2),
+        (0x94 => GPPUD: ReadWrite<u32, GPPUD::Register>),
+        (0x98 => GPPUDCLK0: ReadWrite<u32, GPPUDCLK0::Register>),
+        (0x9C => _reserved3),
+        (0xE4 => GPIO_PUP_PDN_CNTRL_REG0: ReadWrite<u32, GPIO_PUP_PDN_CNTRL_REG0::Register>),
+        (0xE8 => @END),
+    }
+}
+
+/// Abstraction for the associated MMIO registers.
+type Registers = MMIODerefWrapper<RegisterBlock>;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct GPIOInner {
+    registers: Registers,
+}
+
+// Export the inner struct so that BSPs can use it for the panic handler.
+pub use GPIOInner as PanicGPIO;
+
+/// Representation of the GPIO HW.
+pub struct GPIO {
+    mmio_descriptor: memory::mmu::MMIODescriptor,
+    virt_mmio_start_addr: AtomicUsize,
+    inner: IRQSafeNullLock<GPIOInner>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl GPIOInner {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+        Self {
+            registers: Registers::new(mmio_start_addr),
+        }
+    }
+
+    /// Init code.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub unsafe fn init(&mut self, new_mmio_start_addr: Option<usize>) -> Result<(), &'static str> {
+        if let Some(addr) = new_mmio_start_addr {
+            self.registers = Registers::new(addr);
+        }
+
+        Ok(())
+    }
+
+    /// Disable pull-up/down on pins 14 and 15.
+    #[cfg(feature = "bsp_rpi3")]
+    fn disable_pud_14_15_bcm2837(&mut self) {
+        use crate::{time, time::interface::TimeManager};
+        use core::time::Duration;
+
+        // The Linux 2837 GPIO driver waits 1 µs between the steps.
+        const DELAY: Duration = Duration::from_micros(1);
+
+        self.registers.GPPUD.write(GPPUD::PUD::Off);
+        time::time_manager().spin_for(DELAY);
+
+        self.registers
+            .GPPUDCLK0
+            .write(GPPUDCLK0::PUDCLK15::AssertClock + GPPUDCLK0::PUDCLK14::AssertClock);
+        time::time_manager().spin_for(DELAY);
+
+        self.registers.GPPUD.write(GPPUD::PUD::Off);
+        self.registers.GPPUDCLK0.set(0);
+    }
+
+    /// Disable pull-up/down on pins 14 and 15.
+    #[cfg(feature = "bsp_rpi4")]
+    fn disable_pud_14_15_bcm2711(&mut self) {
+        self.registers.GPIO_PUP_PDN_CNTRL_REG0.write(
+            GPIO_PUP_PDN_CNTRL_REG0::GPIO_PUP_PDN_CNTRL15::PullUp
+                + GPIO_PUP_PDN_CNTRL_REG0::GPIO_PUP_PDN_CNTRL14::PullUp,
+        );
+    }
+
+    /// Map PL011 UART as standard output.
+    ///
+    /// TX to pin 14
+    /// RX to pin 15
+    pub fn map_pl011_uart(&mut self) {
+        // Select the UART on pins 14 and 15.
+        self.registers
+            .GPFSEL1
+            .modify(GPFSEL1::FSEL15::AltFunc0 + GPFSEL1::FSEL14::AltFunc0);
+
+        // Disable pull-up/down on pins 14 and 15.
+        #[cfg(feature = "bsp_rpi3")]
+        self.disable_pud_14_15_bcm2837();
+
+        #[cfg(feature = "bsp_rpi4")]
+        self.disable_pud_14_15_bcm2711();
+    }
+}
+
+impl GPIO {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide correct MMIO descriptors.
+    pub const unsafe fn new(mmio_descriptor: memory::mmu::MMIODescriptor) -> Self {
+        Self {
+            mmio_descriptor,
+            virt_mmio_start_addr: AtomicUsize::new(0),
+            inner: IRQSafeNullLock::new(GPIOInner::new(mmio_descriptor.start_addr().into_usize())),
+        }
+    }
+
+    /// Concurrency safe version of `GPIOInner.map_pl011_uart()`
+    pub fn map_pl011_uart(&self) {
+        self.inner.lock(|inner| inner.map_pl011_uart())
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use synchronization::interface::Mutex;
+
+impl driver::interface::DeviceDriver for GPIO {
+    fn compatible(&self) -> &'static str {
+        "BCM GPIO"
+    }
+
+    unsafe fn init(&self) -> Result<(), &'static str> {
+        let virt_addr = memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?;
+
+        self.inner
+            .lock(|inner| inner.init(Some(virt_addr.into_usize())))?;
+
+        self.virt_mmio_start_addr
+            .store(virt_addr.into_usize(), Ordering::Relaxed);
+
+        Ok(())
+    }
+
+    fn virt_mmio_start_addr(&self) -> Option<usize> {
+        let addr = self.virt_mmio_start_addr.load(Ordering::Relaxed);
+
+        if addr == 0 {
+            return None;
+        }
+
+        Some(addr)
+    }
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
new file mode 100644
index 000000000..0bd84e3cf
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -0,0 +1,138 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Interrupt Controller Driver.
+
+mod peripheral_ic;
+
+use crate::{driver, exception, memory};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Wrapper struct for a bitmask indicating pending IRQ numbers.
+struct PendingIRQs {
+    bitmask: u64,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub type LocalIRQ =
+    exception::asynchronous::IRQNumber<{ InterruptController::MAX_LOCAL_IRQ_NUMBER }>;
+pub type PeripheralIRQ =
+    exception::asynchronous::IRQNumber<{ InterruptController::MAX_PERIPHERAL_IRQ_NUMBER }>;
+
+/// Used for the associated type of trait [`exception::asynchronous::interface::IRQManager`].
+#[derive(Copy, Clone)]
+pub enum IRQNumber {
+    Local(LocalIRQ),
+    Peripheral(PeripheralIRQ),
+}
+
+/// Representation of the Interrupt Controller.
+pub struct InterruptController {
+    periph: peripheral_ic::PeripheralIC,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl PendingIRQs {
+    pub fn new(bitmask: u64) -> Self {
+        Self { bitmask }
+    }
+}
+
+impl Iterator for PendingIRQs {
+    type Item = usize;
+
+    fn next(&mut self) -> Option<Self::Item> {
+        use core::intrinsics::cttz;
+
+        let next = cttz(self.bitmask);
+        if next == 64 {
+            return None;
+        }
+
+        self.bitmask &= !(1 << next);
+
+        Some(next as usize)
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl InterruptController {
+    const MAX_LOCAL_IRQ_NUMBER: usize = 11;
+    const MAX_PERIPHERAL_IRQ_NUMBER: usize = 63;
+    const NUM_PERIPHERAL_IRQS: usize = Self::MAX_PERIPHERAL_IRQ_NUMBER + 1;
+
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide correct MMIO descriptors.
+    pub const unsafe fn new(
+        _local_mmio_descriptor: memory::mmu::MMIODescriptor,
+        periph_mmio_descriptor: memory::mmu::MMIODescriptor,
+    ) -> Self {
+        Self {
+            periph: peripheral_ic::PeripheralIC::new(periph_mmio_descriptor),
+        }
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+
+impl driver::interface::DeviceDriver for InterruptController {
+    fn compatible(&self) -> &'static str {
+        "BCM Interrupt Controller"
+    }
+
+    unsafe fn init(&self) -> Result<(), &'static str> {
+        self.periph.init()
+    }
+}
+
+impl exception::asynchronous::interface::IRQManager for InterruptController {
+    type IRQNumberType = IRQNumber;
+
+    fn register_handler(
+        &self,
+        irq: Self::IRQNumberType,
+        descriptor: exception::asynchronous::IRQDescriptor,
+    ) -> Result<(), &'static str> {
+        match irq {
+            IRQNumber::Local(_) => unimplemented!("Local IRQ controller not implemented."),
+            IRQNumber::Peripheral(pirq) => self.periph.register_handler(pirq, descriptor),
+        }
+    }
+
+    fn enable(&self, irq: Self::IRQNumberType) {
+        match irq {
+            IRQNumber::Local(_) => unimplemented!("Local IRQ controller not implemented."),
+            IRQNumber::Peripheral(pirq) => self.periph.enable(pirq),
+        }
+    }
+
+    fn handle_pending_irqs<'irq_context>(
+        &'irq_context self,
+        ic: &exception::asynchronous::IRQContext<'irq_context>,
+    ) {
+        // It can only be a peripheral IRQ pending because enable() does not support local IRQs yet.
+        self.periph.handle_pending_irqs(ic)
+    }
+
+    fn print_handler(&self) {
+        self.periph.print_handler();
+    }
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
new file mode 100644
index 000000000..abc3af711
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -0,0 +1,188 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Peripheral Interrupt Controller Driver.
+
+use super::{InterruptController, PendingIRQs, PeripheralIRQ};
+use crate::{
+    bsp::device_driver::common::MMIODerefWrapper,
+    driver, exception, memory, synchronization,
+    synchronization::{IRQSafeNullLock, InitStateLock},
+};
+use register::{mmio::*, register_structs};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+register_structs! {
+    #[allow(non_snake_case)]
+    WORegisterBlock {
+        (0x00 => _reserved1),
+        (0x10 => ENABLE_1: WriteOnly<u32>),
+        (0x14 => ENABLE_2: WriteOnly<u32>),
+        (0x24 => @END),
+    }
+}
+
+register_structs! {
+    #[allow(non_snake_case)]
+    RORegisterBlock {
+        (0x00 => _reserved1),
+        (0x04 => PENDING_1: ReadOnly<u32>),
+        (0x08 => PENDING_2: ReadOnly<u32>),
+        (0x0c => @END),
+    }
+}
+
+/// Abstraction for the WriteOnly parts of the associated MMIO registers.
+type WriteOnlyRegisters = MMIODerefWrapper<WORegisterBlock>;
+
+/// Abstraction for the ReadOnly parts of the associated MMIO registers.
+type ReadOnlyRegisters = MMIODerefWrapper<RORegisterBlock>;
+
+type HandlerTable =
+    [Option<exception::asynchronous::IRQDescriptor>; InterruptController::NUM_PERIPHERAL_IRQS];
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Representation of the peripheral interrupt controller.
+pub struct PeripheralIC {
+    mmio_descriptor: memory::mmu::MMIODescriptor,
+
+    /// Access to write registers is guarded with a lock.
+    wo_registers: IRQSafeNullLock<WriteOnlyRegisters>,
+
+    /// Register read access is unguarded.
+    ro_registers: InitStateLock<ReadOnlyRegisters>,
+
+    /// Stores registered IRQ handlers. Writable only during kernel init. RO afterwards.
+    handler_table: InitStateLock<HandlerTable>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl PeripheralIC {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide correct MMIO descriptors.
+    pub const unsafe fn new(mmio_descriptor: memory::mmu::MMIODescriptor) -> Self {
+        let addr = mmio_descriptor.start_addr().into_usize();
+
+        Self {
+            mmio_descriptor,
+            wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(addr)),
+            ro_registers: InitStateLock::new(ReadOnlyRegisters::new(addr)),
+            handler_table: InitStateLock::new([None; InterruptController::NUM_PERIPHERAL_IRQS]),
+        }
+    }
+
+    /// Query the list of pending IRQs.
+    fn pending_irqs(&self) -> PendingIRQs {
+        self.ro_registers.read(|regs| {
+            let pending_mask: u64 =
+                (u64::from(regs.PENDING_2.get()) << 32) | u64::from(regs.PENDING_1.get());
+
+            PendingIRQs::new(pending_mask)
+        })
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use synchronization::interface::{Mutex, ReadWriteEx};
+
+impl driver::interface::DeviceDriver for PeripheralIC {
+    fn compatible(&self) -> &'static str {
+        "BCM Peripheral Interrupt Controller"
+    }
+
+    unsafe fn init(&self) -> Result<(), &'static str> {
+        let virt_addr =
+            memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?.into_usize();
+
+        self.wo_registers
+            .lock(|regs| *regs = WriteOnlyRegisters::new(virt_addr));
+        self.ro_registers
+            .write(|regs| *regs = ReadOnlyRegisters::new(virt_addr));
+
+        Ok(())
+    }
+}
+
+impl exception::asynchronous::interface::IRQManager for PeripheralIC {
+    type IRQNumberType = PeripheralIRQ;
+
+    fn register_handler(
+        &self,
+        irq: Self::IRQNumberType,
+        descriptor: exception::asynchronous::IRQDescriptor,
+    ) -> Result<(), &'static str> {
+        self.handler_table.write(|table| {
+            let irq_number = irq.get();
+
+            if table[irq_number].is_some() {
+                return Err("IRQ handler already registered");
+            }
+
+            table[irq_number] = Some(descriptor);
+
+            Ok(())
+        })
+    }
+
+    fn enable(&self, irq: Self::IRQNumberType) {
+        self.wo_registers.lock(|regs| {
+            let enable_reg = if irq.get() <= 31 {
+                &regs.ENABLE_1
+            } else {
+                &regs.ENABLE_2
+            };
+
+            let enable_bit: u32 = 1 << (irq.get() % 32);
+
+            // Writing a 1 to a bit will set the corresponding IRQ enable bit. All other IRQ enable
+            // bits are unaffected. So we don't need read and OR'ing here.
+            enable_reg.set(enable_bit);
+        });
+    }
+
+    fn handle_pending_irqs<'irq_context>(
+        &'irq_context self,
+        _ic: &exception::asynchronous::IRQContext<'irq_context>,
+    ) {
+        self.handler_table.read(|table| {
+            for irq_number in self.pending_irqs() {
+                match table[irq_number] {
+                    None => panic!("No handler registered for IRQ {}", irq_number),
+                    Some(descriptor) => {
+                        // Call the IRQ handler. Panics on failure.
+                        descriptor.handler.handle().expect("Error handling IRQ");
+                    }
+                }
+            }
+        })
+    }
+
+    fn print_handler(&self) {
+        use crate::info;
+
+        info!("      Peripheral handler:");
+
+        self.handler_table.read(|table| {
+            for (i, opt) in table.iter().enumerate() {
+                if let Some(handler) = opt {
+                    info!("            {: >3}. {}", i, handler.name);
+                }
+            }
+        });
+    }
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
new file mode 100644
index 000000000..3adb9137d
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -0,0 +1,537 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! PL011 UART driver.
+//!
+//! # Resources
+//!
+//! - <https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf>
+//! - <https://developer.arm.com/documentation/ddi0183/latest>
+
+use crate::{
+    bsp, bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, exception, memory,
+    synchronization, synchronization::IRQSafeNullLock,
+};
+use core::{
+    fmt,
+    sync::atomic::{AtomicUsize, Ordering},
+};
+use register::{mmio::*, register_bitfields, register_structs};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+// PL011 UART registers.
+//
+// Descriptions taken from "PrimeCell UART (PL011) Technical Reference Manual" r1p5.
+register_bitfields! {
+    u32,
+
+    /// Flag Register.
+    FR [
+        /// Transmit FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
+        /// Line Control Register, LCR_H.
+        ///
+        /// - If the FIFO is disabled, this bit is set when the transmit holding register is empty.
+        /// - If the FIFO is enabled, the TXFE bit is set when the transmit FIFO is empty.
+        /// - This bit does not indicate if there is data in the transmit shift register.
+        TXFE OFFSET(7) NUMBITS(1) [],
+
+        /// Transmit FIFO full. The meaning of this bit depends on the state of the FEN bit in the
+        /// LCR_H Register.
+        ///
+        /// - If the FIFO is disabled, this bit is set when the transmit holding register is full.
+        /// - If the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
+        TXFF OFFSET(5) NUMBITS(1) [],
+
+        /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
+        /// LCR_H Register.
+        ///
+        /// If the FIFO is disabled, this bit is set when the receive holding register is empty. If
+        /// the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
+
+        /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
+        /// LCR_H Register.
+        ///
+        /// - If the FIFO is disabled, this bit is set when the receive holding register is empty.
+        /// - If the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
+        RXFE OFFSET(4) NUMBITS(1) [],
+
+        /// UART busy. If this bit is set to 1, the UART is busy transmitting data. This bit remains
+        /// set until the complete byte, including all the stop bits, has been sent from the shift
+        /// register.
+        ///
+        /// This bit is set as soon as the transmit FIFO becomes non-empty, regardless of whether
+        /// the UART is enabled or not.
+        BUSY OFFSET(3) NUMBITS(1) []
+    ],
+
+    /// Integer Baud Rate Divisor.
+    IBRD [
+        /// The integer baud rate divisor.
+        BAUD_DIVINT OFFSET(0) NUMBITS(16) []
+    ],
+
+    /// Fractional Baud Rate Divisor.
+    FBRD [
+        ///  The fractional baud rate divisor.
+        BAUD_DIVFRAC OFFSET(0) NUMBITS(6) []
+    ],
+
+    /// Line Control Register.
+    LCR_H [
+        /// Word length. These bits indicate the number of data bits transmitted or received in a
+        /// frame.
+        WLEN OFFSET(5) NUMBITS(2) [
+            FiveBit = 0b00,
+            SixBit = 0b01,
+            SevenBit = 0b10,
+            EightBit = 0b11
+        ],
+
+        /// Enable FIFOs:
+        ///
+        /// 0 = FIFOs are disabled (character mode) that is, the FIFOs become 1-byte-deep holding
+        /// registers.
+        ///
+        /// 1 = Transmit and receive FIFO buffers are enabled (FIFO mode).
+        FEN  OFFSET(4) NUMBITS(1) [
+            FifosDisabled = 0,
+            FifosEnabled = 1
+        ]
+    ],
+
+    /// Control Register.
+    CR [
+        /// Receive enable. If this bit is set to 1, the receive section of the UART is enabled.
+        /// Data reception occurs for either UART signals or SIR signals depending on the setting of
+        /// the SIREN bit. When the UART is disabled in the middle of reception, it completes the
+        /// current character before stopping.
+        RXE OFFSET(9) NUMBITS(1) [
+            Disabled = 0,
+            Enabled = 1
+        ],
+
+        /// Transmit enable. If this bit is set to 1, the transmit section of the UART is enabled.
+        /// Data transmission occurs for either UART signals, or SIR signals depending on the
+        /// setting of the SIREN bit. When the UART is disabled in the middle of transmission, it
+        /// completes the current character before stopping.
+        TXE OFFSET(8) NUMBITS(1) [
+            Disabled = 0,
+            Enabled = 1
+        ],
+
+        /// UART enable:
+        ///
+        /// 0 = UART is disabled. If the UART is disabled in the middle of transmission or
+        /// reception, it completes the current character before stopping.
+        ///
+        /// 1 = The UART is enabled. Data transmission and reception occurs for either UART signals
+        /// or SIR signals depending on the setting of the SIREN bit
+        UARTEN OFFSET(0) NUMBITS(1) [
+            /// If the UART is disabled in the middle of transmission or reception, it completes the
+            /// current character before stopping.
+            Disabled = 0,
+            Enabled = 1
+        ]
+    ],
+
+    /// Interrupt FIFO Level Select Register.
+    IFLS [
+        /// Receive interrupt FIFO level select. The trigger points for the receive interrupt are as
+        /// follows.
+        RXIFLSEL OFFSET(3) NUMBITS(5) [
+            OneEigth = 0b000,
+            OneQuarter = 0b001,
+            OneHalf = 0b010,
+            ThreeQuarters = 0b011,
+            SevenEights = 0b100
+        ]
+    ],
+
+    /// Interrupt Mask Set/Clear Register.
+    IMSC [
+        /// Receive timeout interrupt mask. A read returns the current mask for the UARTRTINTR
+        /// interrupt.
+        ///
+        /// - On a write of 1, the mask of the UARTRTINTR interrupt is set.
+        /// - A write of 0 clears the mask.
+        RTIM OFFSET(6) NUMBITS(1) [
+            Disabled = 0,
+            Enabled = 1
+        ],
+
+        /// Receive interrupt mask. A read returns the current mask for the UARTRXINTR interrupt.
+        ///
+        /// - On a write of 1, the mask of the UARTRXINTR interrupt is set.
+        /// - A write of 0 clears the mask.
+        RXIM OFFSET(4) NUMBITS(1) [
+            Disabled = 0,
+            Enabled = 1
+        ]
+    ],
+
+    /// Masked Interrupt Status Register.
+    MIS [
+        /// Receive timeout masked interrupt status. Returns the masked interrupt state of the
+        /// UARTRTINTR interrupt.
+        RTMIS OFFSET(6) NUMBITS(1) [],
+
+        /// Receive masked interrupt status. Returns the masked interrupt state of the UARTRXINTR
+        /// interrupt.
+        RXMIS OFFSET(4) NUMBITS(1) []
+    ],
+
+    /// Interrupt Clear Register.
+    ICR [
+        /// Meta field for all pending interrupts.
+        ALL OFFSET(0) NUMBITS(11) []
+    ]
+}
+
+register_structs! {
+    #[allow(non_snake_case)]
+    pub RegisterBlock {
+        (0x00 => DR: ReadWrite<u32>),
+        (0x04 => _reserved1),
+        (0x18 => FR: ReadOnly<u32, FR::Register>),
+        (0x1c => _reserved2),
+        (0x24 => IBRD: WriteOnly<u32, IBRD::Register>),
+        (0x28 => FBRD: WriteOnly<u32, FBRD::Register>),
+        (0x2c => LCR_H: WriteOnly<u32, LCR_H::Register>),
+        (0x30 => CR: WriteOnly<u32, CR::Register>),
+        (0x34 => IFLS: ReadWrite<u32, IFLS::Register>),
+        (0x38 => IMSC: ReadWrite<u32, IMSC::Register>),
+        (0x3C => _reserved3),
+        (0x40 => MIS: ReadOnly<u32, MIS::Register>),
+        (0x44 => ICR: WriteOnly<u32, ICR::Register>),
+        (0x48 => @END),
+    }
+}
+
+/// Abstraction for the associated MMIO registers.
+type Registers = MMIODerefWrapper<RegisterBlock>;
+
+#[derive(PartialEq)]
+enum BlockingMode {
+    Blocking,
+    NonBlocking,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct PL011UartInner {
+    registers: Registers,
+    chars_written: usize,
+    chars_read: usize,
+}
+
+// Export the inner struct so that BSPs can use it for the panic handler.
+pub use PL011UartInner as PanicUart;
+
+/// Representation of the UART.
+pub struct PL011Uart {
+    mmio_descriptor: memory::mmu::MMIODescriptor,
+    virt_mmio_start_addr: AtomicUsize,
+    inner: IRQSafeNullLock<PL011UartInner>,
+    irq_number: bsp::device_driver::IRQNumber,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl PL011UartInner {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+        Self {
+            registers: Registers::new(mmio_start_addr),
+            chars_written: 0,
+            chars_read: 0,
+        }
+    }
+
+    /// Set up baud rate and characteristics.
+    ///
+    /// This results in 8N1 and 921_600 baud.
+    ///
+    /// The calculation for the BRD is (we set the clock to 48 MHz in config.txt):
+    /// `(48_000_000 / 16) / 921_600 = 3.2552083`.
+    ///
+    /// This means the integer part is `3` and goes into the `IBRD`.
+    /// The fractional part is `0.2552083`.
+    ///
+    /// `FBRD` calculation according to the PL011 Technical Reference Manual:
+    /// `INTEGER((0.2552083 * 64) + 0.5) = 16`.
+    ///
+    /// Therefore, the generated baud rate divider is: `3 + 16/64 = 3.25`. Which results in a
+    /// genrated baud rate of `48_000_000 / (16 * 3.25) = 923_077`.
+    ///
+    /// Error = `((923_077 - 921_600) / 921_600) * 100 = 0.16%`.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub unsafe fn init(&mut self, new_mmio_start_addr: Option<usize>) -> Result<(), &'static str> {
+        if let Some(addr) = new_mmio_start_addr {
+            self.registers = Registers::new(addr);
+        }
+
+        // Execution can arrive here while there are still characters queued in the TX FIFO and
+        // actively being sent out by the UART hardware. If the UART is turned off in this case,
+        // those queued characters would be lost.
+        //
+        // For example, this can happen during runtime on a call to panic!(), because panic!()
+        // initializes its own UART instance and calls init().
+        //
+        // Hence, flush first to ensure all pending characters are transmitted.
+        self.flush();
+
+        // Turn the UART off temporarily.
+        self.registers.CR.set(0);
+
+        // Clear all pending interrupts.
+        self.registers.ICR.write(ICR::ALL::CLEAR);
+
+        // From the PL011 Technical Reference Manual:
+        //
+        // The LCR_H, IBRD, and FBRD registers form the single 30-bit wide LCR Register that is
+        // updated on a single write strobe generated by a LCR_H write. So, to internally update the
+        // contents of IBRD or FBRD, a LCR_H write must always be performed at the end.
+        //
+        // Set the baud rate, 8N1 and FIFO enabled.
+        self.registers.IBRD.write(IBRD::BAUD_DIVINT.val(3));
+        self.registers.FBRD.write(FBRD::BAUD_DIVFRAC.val(16));
+        self.registers
+            .LCR_H
+            .write(LCR_H::WLEN::EightBit + LCR_H::FEN::FifosEnabled);
+
+        // Set RX FIFO fill level at 1/8.
+        self.registers.IFLS.write(IFLS::RXIFLSEL::OneEigth);
+
+        // Enable RX IRQ + RX timeout IRQ.
+        self.registers
+            .IMSC
+            .write(IMSC::RXIM::Enabled + IMSC::RTIM::Enabled);
+
+        // Turn the UART on.
+        self.registers
+            .CR
+            .write(CR::UARTEN::Enabled + CR::TXE::Enabled + CR::RXE::Enabled);
+
+        Ok(())
+    }
+
+    /// Send a character.
+    fn write_char(&mut self, c: char) {
+        // Spin while TX FIFO full is set, waiting for an empty slot.
+        while self.registers.FR.matches_all(FR::TXFF::SET) {
+            cpu::nop();
+        }
+
+        // Write the character to the buffer.
+        self.registers.DR.set(c as u32);
+
+        self.chars_written += 1;
+    }
+
+    /// Block execution until the last buffered character has been physically put on the TX wire.
+    fn flush(&self) {
+        // Spin until the busy bit is cleared.
+        while self.registers.FR.matches_all(FR::BUSY::SET) {
+            cpu::nop();
+        }
+    }
+
+    /// Retrieve a character.
+    fn read_char_converting(&mut self, blocking_mode: BlockingMode) -> Option<char> {
+        // If RX FIFO is empty,
+        if self.registers.FR.matches_all(FR::RXFE::SET) {
+            // immediately return in non-blocking mode.
+            if blocking_mode == BlockingMode::NonBlocking {
+                return None;
+            }
+
+            // Otherwise, wait until a char was received.
+            while self.registers.FR.matches_all(FR::RXFE::SET) {
+                cpu::nop();
+            }
+        }
+
+        // Read one character.
+        let mut ret = self.registers.DR.get() as u8 as char;
+
+        // Convert carrige return to newline.
+        if ret == '\r' {
+            ret = '\n'
+        }
+
+        // Update statistics.
+        self.chars_read += 1;
+
+        Some(ret)
+    }
+}
+
+/// Implementing `core::fmt::Write` enables usage of the `format_args!` macros, which in turn are
+/// used to implement the `kernel`'s `print!` and `println!` macros. By implementing `write_str()`,
+/// we get `write_fmt()` automatically.
+///
+/// The function takes an `&mut self`, so it must be implemented for the inner struct.
+///
+/// See [`src/print.rs`].
+///
+/// [`src/print.rs`]: ../../print/index.html
+impl fmt::Write for PL011UartInner {
+    fn write_str(&mut self, s: &str) -> fmt::Result {
+        for c in s.chars() {
+            self.write_char(c);
+        }
+
+        Ok(())
+    }
+}
+
+impl PL011Uart {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide correct MMIO descriptors.
+    /// - The user must ensure to provide correct IRQ numbers.
+    pub const unsafe fn new(
+        mmio_descriptor: memory::mmu::MMIODescriptor,
+        irq_number: bsp::device_driver::IRQNumber,
+    ) -> Self {
+        Self {
+            mmio_descriptor,
+            virt_mmio_start_addr: AtomicUsize::new(0),
+            inner: IRQSafeNullLock::new(PL011UartInner::new(
+                mmio_descriptor.start_addr().into_usize(),
+            )),
+            irq_number,
+        }
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use synchronization::interface::Mutex;
+
+impl driver::interface::DeviceDriver for PL011Uart {
+    fn compatible(&self) -> &'static str {
+        "BCM PL011 UART"
+    }
+
+    unsafe fn init(&self) -> Result<(), &'static str> {
+        let virt_addr = memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?;
+
+        self.inner
+            .lock(|inner| inner.init(Some(virt_addr.into_usize())))?;
+
+        self.virt_mmio_start_addr
+            .store(virt_addr.into_usize(), Ordering::Relaxed);
+
+        Ok(())
+    }
+
+    fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
+        use bsp::exception::asynchronous::irq_manager;
+        use exception::asynchronous::{interface::IRQManager, IRQDescriptor};
+
+        let descriptor = IRQDescriptor {
+            name: "BCM PL011 UART",
+            handler: self,
+        };
+
+        irq_manager().register_handler(self.irq_number, descriptor)?;
+        irq_manager().enable(self.irq_number);
+
+        Ok(())
+    }
+
+    fn virt_mmio_start_addr(&self) -> Option<usize> {
+        let addr = self.virt_mmio_start_addr.load(Ordering::Relaxed);
+
+        if addr == 0 {
+            return None;
+        }
+
+        Some(addr)
+    }
+}
+
+impl console::interface::Write for PL011Uart {
+    /// Passthrough of `args` to the `core::fmt::Write` implementation, but guarded by a Mutex to
+    /// serialize access.
+    fn write_char(&self, c: char) {
+        self.inner.lock(|inner| inner.write_char(c));
+    }
+
+    fn write_fmt(&self, args: core::fmt::Arguments) -> fmt::Result {
+        // Fully qualified syntax for the call to `core::fmt::Write::write:fmt()` to increase
+        // readability.
+        self.inner.lock(|inner| fmt::Write::write_fmt(inner, args))
+    }
+
+    fn flush(&self) {
+        // Spin until TX FIFO empty is set.
+        self.inner.lock(|inner| inner.flush());
+    }
+}
+
+impl console::interface::Read for PL011Uart {
+    fn read_char(&self) -> char {
+        self.inner
+            .lock(|inner| inner.read_char_converting(BlockingMode::Blocking).unwrap())
+    }
+
+    fn clear_rx(&self) {
+        // Read from the RX FIFO until it is indicating empty.
+        while self
+            .inner
+            .lock(|inner| inner.read_char_converting(BlockingMode::NonBlocking))
+            .is_some()
+        {}
+    }
+}
+
+impl console::interface::Statistics for PL011Uart {
+    fn chars_written(&self) -> usize {
+        self.inner.lock(|inner| inner.chars_written)
+    }
+
+    fn chars_read(&self) -> usize {
+        self.inner.lock(|inner| inner.chars_read)
+    }
+}
+
+impl exception::asynchronous::interface::IRQHandler for PL011Uart {
+    fn handle(&self) -> Result<(), &'static str> {
+        self.inner.lock(|inner| {
+            let pending = inner.registers.MIS.extract();
+
+            // Clear all pending IRQs.
+            inner.registers.ICR.write(ICR::ALL::CLEAR);
+
+            // Check for any kind of RX interrupt.
+            if pending.matches_any(MIS::RXMIS::SET + MIS::RTMIS::SET) {
+                // Echo any received characters.
+                while let Some(c) = inner.read_char_converting(BlockingMode::NonBlocking) {
+                    inner.write_char(c)
+                }
+            }
+        });
+
+        Ok(())
+    }
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/common.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/common.rs
new file mode 100644
index 000000000..41553b7a5
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/common.rs
@@ -0,0 +1,38 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Common device driver code.
+
+use core::{marker::PhantomData, ops};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct MMIODerefWrapper<T> {
+    start_addr: usize,
+    phantom: PhantomData<fn() -> T>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl<T> MMIODerefWrapper<T> {
+    /// Create an instance.
+    pub const unsafe fn new(start_addr: usize) -> Self {
+        Self {
+            start_addr,
+            phantom: PhantomData,
+        }
+    }
+}
+
+impl<T> ops::Deref for MMIODerefWrapper<T> {
+    type Target = T;
+
+    fn deref(&self) -> &Self::Target {
+        unsafe { &*(self.start_addr as *const _) }
+    }
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi.rs
new file mode 100644
index 000000000..10d482781
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi.rs
@@ -0,0 +1,62 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Top-level BSP file for the Raspberry Pi 3 and 4.
+
+pub mod console;
+pub mod cpu;
+pub mod driver;
+pub mod exception;
+pub mod memory;
+
+use super::device_driver;
+use crate::memory::mmu::MMIODescriptor;
+use memory::map::mmio;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static GPIO: device_driver::GPIO =
+    unsafe { device_driver::GPIO::new(MMIODescriptor::new(mmio::GPIO_START, mmio::GPIO_SIZE)) };
+
+static PL011_UART: device_driver::PL011Uart = unsafe {
+    device_driver::PL011Uart::new(
+        MMIODescriptor::new(mmio::PL011_UART_START, mmio::PL011_UART_SIZE),
+        exception::asynchronous::irq_map::PL011_UART,
+    )
+};
+
+#[cfg(feature = "bsp_rpi3")]
+static INTERRUPT_CONTROLLER: device_driver::InterruptController = unsafe {
+    device_driver::InterruptController::new(
+        MMIODescriptor::new(mmio::LOCAL_IC_START, mmio::LOCAL_IC_SIZE),
+        MMIODescriptor::new(mmio::PERIPHERAL_IC_START, mmio::PERIPHERAL_IC_SIZE),
+    )
+};
+
+#[cfg(feature = "bsp_rpi4")]
+static INTERRUPT_CONTROLLER: device_driver::GICv2 = unsafe {
+    device_driver::GICv2::new(
+        MMIODescriptor::new(mmio::GICD_START, mmio::GICD_SIZE),
+        MMIODescriptor::new(mmio::GICC_START, mmio::GICC_SIZE),
+    )
+};
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Board identification.
+pub fn board_name() -> &'static str {
+    #[cfg(feature = "bsp_rpi3")]
+    {
+        "Raspberry Pi 3"
+    }
+
+    #[cfg(feature = "bsp_rpi4")]
+    {
+        "Raspberry Pi 4"
+    }
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/console.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/console.rs
new file mode 100644
index 000000000..e16b3a3d6
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/console.rs
@@ -0,0 +1,88 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP console facilities.
+
+use super::memory;
+use crate::{bsp::device_driver, console, cpu, driver};
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// In case of a panic, the panic handler uses this function to take a last shot at printing
+/// something before the system is halted.
+///
+/// We try to init panic-versions of the GPIO and the UART. The panic versions are not protected
+/// with synchronization primitives, which increases chances that we get to print something, even
+/// when the kernel's default GPIO or UART instances happen to be locked at the time of the panic.
+///
+/// # Safety
+///
+/// - Use only for printing during a panic.
+#[cfg(not(feature = "test_build"))]
+pub unsafe fn panic_console_out() -> impl fmt::Write {
+    use driver::interface::DeviceDriver;
+
+    let mut panic_gpio = device_driver::PanicGPIO::new(memory::map::mmio::GPIO_START.into_usize());
+    let mut panic_uart =
+        device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START.into_usize());
+
+    // If remapping of the driver's MMIO already happened, take the remapped start address.
+    // Otherwise, take a chance with the default physical address.
+    let maybe_gpio_mmio_start_addr = super::GPIO.virt_mmio_start_addr();
+    let maybe_uart_mmio_start_addr = super::PL011_UART.virt_mmio_start_addr();
+
+    panic_gpio
+        .init(maybe_gpio_mmio_start_addr)
+        .unwrap_or_else(|_| cpu::wait_forever());
+    panic_gpio.map_pl011_uart();
+    panic_uart
+        .init(maybe_uart_mmio_start_addr)
+        .unwrap_or_else(|_| cpu::wait_forever());
+
+    panic_uart
+}
+
+/// Reduced version for test builds.
+#[cfg(feature = "test_build")]
+pub unsafe fn panic_console_out() -> impl fmt::Write {
+    use driver::interface::DeviceDriver;
+
+    let mut panic_uart =
+        device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START.into_usize());
+
+    let maybe_uart_mmio_start_addr = super::PL011_UART.virt_mmio_start_addr();
+
+    panic_uart
+        .init(maybe_uart_mmio_start_addr)
+        .unwrap_or_else(|_| cpu::qemu_exit_failure());
+
+    panic_uart
+}
+
+/// Return a reference to the console.
+pub fn console() -> &'static impl console::interface::All {
+    &super::PL011_UART
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+/// Minimal code needed to bring up the console in QEMU (for testing only). This is often less steps
+/// than on real hardware due to QEMU's abstractions.
+#[cfg(feature = "test_build")]
+pub fn qemu_bring_up_console() {
+    use driver::interface::DeviceDriver;
+
+    // Calling the UART's init ensures that the BSP's instance of the UART does remap the MMIO
+    // addresses.
+    unsafe {
+        super::PL011_UART
+            .init()
+            .unwrap_or_else(|_| cpu::qemu_exit_failure());
+    }
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/cpu.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/cpu.rs
new file mode 100644
index 000000000..d09ff9568
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/cpu.rs
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP Processor code.
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Used by `arch` code to find the early boot core.
+#[no_mangle]
+#[link_section = ".text._start_arguments"]
+pub static BOOT_CORE_ID: u64 = 0;
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/driver.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/driver.rs
new file mode 100644
index 000000000..4d5007e4e
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/driver.rs
@@ -0,0 +1,61 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP driver support.
+
+use crate::driver;
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Device Driver Manager type.
+struct BSPDriverManager {
+    device_drivers: [&'static (dyn DeviceDriver + Sync); 3],
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
+    device_drivers: [
+        &super::GPIO,
+        &super::PL011_UART,
+        &super::INTERRUPT_CONTROLLER,
+    ],
+};
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the driver manager.
+pub fn driver_manager() -> &'static impl driver::interface::DriverManager {
+    &BSP_DRIVER_MANAGER
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use driver::interface::DeviceDriver;
+
+impl driver::interface::DriverManager for BSPDriverManager {
+    fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
+        &self.device_drivers[..]
+    }
+
+    fn early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
+        &self.device_drivers[0..=1]
+    }
+
+    fn non_early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
+        &self.device_drivers[2..]
+    }
+
+    fn post_early_print_device_driver_init(&self) {
+        // Configure PL011Uart's output pins.
+        super::GPIO.map_pl011_uart();
+    }
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/exception.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/exception.rs
new file mode 100644
index 000000000..94d0728ff
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/exception.rs
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP synchronous and asynchronous exception handling.
+
+pub mod asynchronous;
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/exception/asynchronous.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/exception/asynchronous.rs
new file mode 100644
index 000000000..a253daa94
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/exception/asynchronous.rs
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP asynchronous exception handling.
+
+use crate::{bsp, exception};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(feature = "bsp_rpi3")]
+pub(in crate::bsp) mod irq_map {
+    use super::bsp::device_driver::{IRQNumber, PeripheralIRQ};
+
+    pub const PL011_UART: IRQNumber = IRQNumber::Peripheral(PeripheralIRQ::new(57));
+}
+
+#[cfg(feature = "bsp_rpi4")]
+pub(in crate::bsp) mod irq_map {
+    use super::bsp::device_driver::IRQNumber;
+
+    pub const PL011_UART: IRQNumber = IRQNumber::new(153);
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the IRQ manager.
+pub fn irq_manager() -> &'static impl exception::asynchronous::interface::IRQManager<
+    IRQNumberType = bsp::device_driver::IRQNumber,
+> {
+    &super::super::INTERRUPT_CONTROLLER
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
new file mode 100644
index 000000000..0d46f9d97
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
@@ -0,0 +1 @@
+__kernel_virt_addr_space_size = 2 * 1024 * 1024 * 1024
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld
new file mode 100644
index 000000000..7ad75a40c
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld
@@ -0,0 +1,77 @@
+/* SPDX-License-Identifier: MIT OR Apache-2.0
+ *
+ * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+ */
+
+/* This file provides __kernel_virt_addr_space_size */
+INCLUDE src/bsp/raspberrypi/kernel_virt_addr_space_size.ld;
+
+/* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_load_addr = 0x80000;
+
+ENTRY(__rpi_load_addr)
+
+PHDRS
+{
+    segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
+    segment_rw PT_LOAD FLAGS(6); /* 6 == RW */
+}
+
+SECTIONS
+{
+    . =  __rpi_load_addr;
+
+    /***********************************************************************************************
+    * Code + RO Data + Global Offset Table
+    ***********************************************************************************************/
+    __rx_start = .;
+    .text :
+    {
+        KEEP(*(.text._start))
+        *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
+        *(.text._start_rust)      /* The Rust entry point */
+        *(.text*)                 /* Everything else */
+    } :segment_rx
+
+    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
+    .got    : ALIGN(8) { *(.got)     } :segment_rx
+
+    . = ALIGN(64K); /* Align to page boundary */
+    __rx_end_exclusive = .;
+
+    /***********************************************************************************************
+    * Data + BSS
+    ***********************************************************************************************/
+    __rw_start = .;
+    .data : { *(.data*) } :segment_rw
+
+    /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
+    .bss : ALIGN(8)
+    {
+        __bss_start = .;
+        *(.bss*);
+        . = ALIGN(8);
+
+        . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
+        __bss_end_inclusive = . - 8;
+    } :NONE
+
+    . = ALIGN(64K); /* Align to page boundary */
+    __rw_end_exclusive = .;
+
+    /***********************************************************************************************
+    * Guard Page between boot core stack and data
+    ***********************************************************************************************/
+    __boot_core_stack_guard_page_start = .;
+    . += 64K;
+    __boot_core_stack_guard_page_end_exclusive = .;
+
+    /***********************************************************************************************
+    * Boot Core Stack
+    ***********************************************************************************************/
+    __boot_core_stack_start = .;         /*   ^             */
+                                         /*   | stack       */
+    . += 512K;                           /*   | growth      */
+                                         /*   | direction   */
+    __boot_core_stack_end_exclusive = .; /*   |             */
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory.rs
new file mode 100644
index 000000000..7f571e080
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory.rs
@@ -0,0 +1,208 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP Memory Management.
+//!
+//! The physical memory layout after the kernel has been loaded by the Raspberry's firmware, which
+//! copies the binary to 0x8_0000:
+//!
+//! +---------------------------------------------+
+//! |                                             |
+//! | Unmapped                                    |
+//! |                                             |
+//! +---------------------------------------------+
+//! |                                             | rx_start @ 0x8_0000
+//! | .text                                       |
+//! | .rodata                                     |
+//! | .got                                        |
+//! |                                             | rx_end_inclusive
+//! +---------------------------------------------+
+//! |                                             | rw_start == rx_end
+//! | .data                                       |
+//! | .bss                                        |
+//! |                                             | rw_end_inclusive
+//! +---------------------------------------------+
+//! |                                             | rw_end
+//! | Unmapped Boot-core Stack Guard Page         |
+//! |                                             |
+//! +---------------------------------------------+
+//! |                                             | boot_core_stack_start          ^
+//! |                                             |                                | stack
+//! | Boot-core Stack                             |                                | growth
+//! |                                             |                                | direction
+//! |                                             | boot_core_stack_end_inclusive  |
+//! +---------------------------------------------+
+
+pub mod mmu;
+
+use crate::memory::{Address, Physical, Virtual};
+use core::{cell::UnsafeCell, ops::RangeInclusive};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+// Symbols from the linker script.
+extern "Rust" {
+    static __rx_start: UnsafeCell<()>;
+    static __rx_end_exclusive: UnsafeCell<()>;
+
+    static __rw_start: UnsafeCell<()>;
+    static __bss_start: UnsafeCell<u64>;
+    static __bss_end_inclusive: UnsafeCell<u64>;
+    static __rw_end_exclusive: UnsafeCell<()>;
+
+    static __boot_core_stack_start: UnsafeCell<()>;
+    static __boot_core_stack_end_exclusive: UnsafeCell<()>;
+
+    static __boot_core_stack_guard_page_start: UnsafeCell<()>;
+    static __boot_core_stack_guard_page_end_exclusive: UnsafeCell<()>;
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// The board's physical memory map.
+#[rustfmt::skip]
+pub(super) mod map {
+    use super::*;
+
+    /// Physical devices.
+    #[cfg(feature = "bsp_rpi3")]
+    pub mod mmio {
+        use super::*;
+
+        pub const PERIPHERAL_IC_START: Address<Physical> = Address::new(0x3F00_B200);
+        pub const PERIPHERAL_IC_SIZE:  usize             =              0x24;
+
+        pub const GPIO_START:          Address<Physical> = Address::new(0x3F20_0000);
+        pub const GPIO_SIZE:           usize             =              0xA0;
+
+        pub const PL011_UART_START:    Address<Physical> = Address::new(0x3F20_1000);
+        pub const PL011_UART_SIZE:     usize             =              0x48;
+
+        pub const LOCAL_IC_START:      Address<Physical> = Address::new(0x4000_0000);
+        pub const LOCAL_IC_SIZE:       usize             =              0x100;
+
+        pub const END:                 Address<Physical> = Address::new(0x4001_0000);
+    }
+
+    /// Physical devices.
+    #[cfg(feature = "bsp_rpi4")]
+    pub mod mmio {
+        use super::*;
+
+        pub const GPIO_START:       Address<Physical> = Address::new(0xFE20_0000);
+        pub const GPIO_SIZE:        usize             =              0xA0;
+
+        pub const PL011_UART_START: Address<Physical> = Address::new(0xFE20_1000);
+        pub const PL011_UART_SIZE:  usize             =              0x48;
+
+        pub const GICD_START:       Address<Physical> = Address::new(0xFF84_1000);
+        pub const GICD_SIZE:        usize             =              0x824;
+
+        pub const GICC_START:       Address<Physical> = Address::new(0xFF84_2000);
+        pub const GICC_SIZE:        usize             =              0x14;
+
+        pub const END:              Address<Physical> = Address::new(0xFF85_0000);
+    }
+
+    pub const END: Address<Physical> = mmio::END;
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// Start address of the Read+Execute (RX) range.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn virt_rx_start() -> Address<Virtual> {
+    Address::new(unsafe { __rx_start.get() as usize })
+}
+
+/// Size of the Read+Execute (RX) range.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn rx_size() -> usize {
+    unsafe { (__rx_end_exclusive.get() as usize) - (__rx_start.get() as usize) }
+}
+
+/// Start address of the Read+Write (RW) range.
+#[inline(always)]
+fn virt_rw_start() -> Address<Virtual> {
+    Address::new(unsafe { __rw_start.get() as usize })
+}
+
+/// Size of the Read+Write (RW) range.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn rw_size() -> usize {
+    unsafe { (__rw_end_exclusive.get() as usize) - (__rw_start.get() as usize) }
+}
+
+/// Start address of the boot core's stack.
+#[inline(always)]
+fn virt_boot_core_stack_start() -> Address<Virtual> {
+    Address::new(unsafe { __boot_core_stack_start.get() as usize })
+}
+
+/// Size of the boot core's stack.
+#[inline(always)]
+fn boot_core_stack_size() -> usize {
+    unsafe {
+        (__boot_core_stack_end_exclusive.get() as usize) - (__boot_core_stack_start.get() as usize)
+    }
+}
+
+/// Start address of the boot core's stack guard page.
+#[inline(always)]
+fn virt_boot_core_stack_guard_page_start() -> Address<Virtual> {
+    Address::new(unsafe { __boot_core_stack_guard_page_start.get() as usize })
+}
+
+/// Size of the boot core's stack guard page.
+#[inline(always)]
+fn boot_core_stack_guard_page_size() -> usize {
+    unsafe {
+        (__boot_core_stack_guard_page_end_exclusive.get() as usize)
+            - (__boot_core_stack_guard_page_start.get() as usize)
+    }
+}
+
+/// Exclusive end address of the physical address space.
+#[inline(always)]
+fn phys_addr_space_end() -> Address<Physical> {
+    map::END
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return the inclusive range spanning the .bss section.
+///
+/// # Safety
+///
+/// - Values are provided by the linker script and must be trusted as-is.
+/// - The linker-provided addresses must be u64 aligned.
+pub fn bss_range_inclusive() -> RangeInclusive<*mut u64> {
+    let range;
+    unsafe {
+        range = RangeInclusive::new(__bss_start.get(), __bss_end_inclusive.get());
+    }
+    assert!(!range.is_empty());
+
+    range
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs
new file mode 100644
index 000000000..4ff01e436
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs
@@ -0,0 +1,187 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP Memory Management Unit.
+
+use crate::{
+    common,
+    memory::{
+        mmu as generic_mmu,
+        mmu::{
+            AccessPermissions, AddressSpace, AssociatedTranslationTable, AttributeFields,
+            MemAttributes, Page, PageSliceDescriptor, TranslationGranule,
+        },
+        Physical, Virtual,
+    },
+    synchronization::InitStateLock,
+};
+use core::convert::TryInto;
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+type KernelTranslationTable =
+    <KernelVirtAddrSpace as AssociatedTranslationTable>::TableStartFromBottom;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// The translation granule chosen by this BSP. This will be used everywhere else in the kernel to
+/// derive respective data structures and their sizes. For example, the `crate::memory::mmu::Page`.
+pub type KernelGranule = TranslationGranule<{ 64 * 1024 }>;
+
+/// The kernel's virtual address space defined by this BSP.
+pub type KernelVirtAddrSpace = AddressSpace<{ get_virt_addr_space_size() }>;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+/// The kernel translation tables.
+///
+/// It is mandatory that InitStateLock is transparent.
+///
+/// That is, `size_of(InitStateLock<KernelTranslationTable>) == size_of(KernelTranslationTable)`.
+/// There is a unit tests that checks this porperty.
+#[link_section = ".data"]
+static KERNEL_TABLES: InitStateLock<KernelTranslationTable> =
+    InitStateLock::new(KernelTranslationTable::new_for_precompute());
+
+/// This value is needed during early boot for MMU setup.
+///
+/// This will be patched to the correct value by the "translation table tool" after linking. This
+/// given value here is just a dummy.
+#[link_section = ".text._start_arguments"]
+#[no_mangle]
+static PHYS_KERNEL_TABLES_BASE_ADDR: u64 = 0xCCCCAAAAFFFFEEEE;
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// This is a hack for retrieving the value for the kernel's virtual address space size as a
+/// constant from a common place, since it is needed as a compile-time/link-time constant in both,
+/// the linker script and the Rust sources.
+const fn get_virt_addr_space_size() -> usize {
+    let __kernel_virt_addr_space_size;
+
+    include!("../kernel_virt_addr_space_size.ld");
+
+    __kernel_virt_addr_space_size
+}
+
+/// Helper function for calculating the number of pages the given parameter spans.
+const fn size_to_num_pages(size: usize) -> usize {
+    assert!(size > 0);
+    assert!(size % KernelGranule::SIZE == 0);
+
+    size >> KernelGranule::SHIFT
+}
+
+/// The Read+Execute (RX) pages of the kernel binary.
+fn virt_rx_page_desc() -> PageSliceDescriptor<Virtual> {
+    let num_pages = size_to_num_pages(super::rx_size());
+
+    PageSliceDescriptor::from_addr(super::virt_rx_start(), num_pages)
+}
+
+/// The Read+Write (RW) pages of the kernel binary.
+fn virt_rw_page_desc() -> PageSliceDescriptor<Virtual> {
+    let num_pages = size_to_num_pages(super::rw_size());
+
+    PageSliceDescriptor::from_addr(super::virt_rw_start(), num_pages)
+}
+
+/// The boot core's stack.
+fn virt_boot_core_stack_page_desc() -> PageSliceDescriptor<Virtual> {
+    let num_pages = size_to_num_pages(super::boot_core_stack_size());
+
+    PageSliceDescriptor::from_addr(super::virt_boot_core_stack_start(), num_pages)
+}
+
+// There is no reason to expect the following conversions to fail, since they were generated offline
+// by the `translation table tool`. If it doesn't work, a panic due to the unwrap is justified.
+
+/// The Read+Execute (RX) pages of the kernel binary.
+fn phys_rx_page_desc() -> PageSliceDescriptor<Physical> {
+    virt_rx_page_desc().try_into().unwrap()
+}
+
+/// The Read+Write (RW) pages of the kernel binary.
+fn phys_rw_page_desc() -> PageSliceDescriptor<Physical> {
+    virt_rw_page_desc().try_into().unwrap()
+}
+
+/// The boot core's stack.
+fn phys_boot_core_stack_page_desc() -> PageSliceDescriptor<Physical> {
+    virt_boot_core_stack_page_desc().try_into().unwrap()
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the kernel's translation tables.
+pub fn kernel_translation_tables() -> &'static InitStateLock<KernelTranslationTable> {
+    &KERNEL_TABLES
+}
+
+/// The boot core's stack guard page.
+pub fn virt_boot_core_stack_guard_page_desc() -> PageSliceDescriptor<Virtual> {
+    let num_pages = size_to_num_pages(super::boot_core_stack_guard_page_size());
+
+    PageSliceDescriptor::from_addr(super::virt_boot_core_stack_guard_page_start(), num_pages)
+}
+
+/// Pointer to the last page of the physical address space.
+pub fn phys_addr_space_end_page() -> *const Page<Physical> {
+    common::align_down(
+        super::phys_addr_space_end().into_usize(),
+        KernelGranule::SIZE,
+    ) as *const Page<_>
+}
+
+/// Add mapping records for the kernel binary.
+///
+/// The actual translation table entries for the kernel binary are generated using the offline
+/// `translation table tool` and patched into the kernel binary. This function just adds the mapping
+/// record entries.
+///
+/// It must be ensured that these entries are in sync with the offline tool.
+pub fn kernel_add_mapping_records_for_precomputed() {
+    generic_mmu::kernel_add_mapping_record(
+        "Kernel code and RO data",
+        &virt_rx_page_desc(),
+        &phys_rx_page_desc(),
+        &AttributeFields {
+            mem_attributes: MemAttributes::CacheableDRAM,
+            acc_perms: AccessPermissions::ReadOnly,
+            execute_never: false,
+        },
+    );
+
+    generic_mmu::kernel_add_mapping_record(
+        "Kernel data and bss",
+        &virt_rw_page_desc(),
+        &phys_rw_page_desc(),
+        &AttributeFields {
+            mem_attributes: MemAttributes::CacheableDRAM,
+            acc_perms: AccessPermissions::ReadWrite,
+            execute_never: true,
+        },
+    );
+
+    generic_mmu::kernel_add_mapping_record(
+        "Kernel boot-core stack",
+        &virt_boot_core_stack_page_desc(),
+        &phys_boot_core_stack_page_desc(),
+        &AttributeFields {
+            mem_attributes: MemAttributes::CacheableDRAM,
+            acc_perms: AccessPermissions::ReadWrite,
+            execute_never: true,
+        },
+    );
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/common.rs b/15_virtual_mem_part3_precomputed_tables/src/common.rs
new file mode 100644
index 000000000..71443cfbd
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/common.rs
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! General purpose code.
+
+/// Check if a value is aligned to a given size.
+#[inline(always)]
+pub const fn is_aligned(value: usize, alignment: usize) -> bool {
+    assert!(alignment.is_power_of_two());
+
+    (value & (alignment - 1)) == 0
+}
+
+/// Align down.
+#[inline(always)]
+pub const fn align_down(value: usize, alignment: usize) -> usize {
+    assert!(alignment.is_power_of_two());
+
+    value & !(alignment - 1)
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/console.rs b/15_virtual_mem_part3_precomputed_tables/src/console.rs
new file mode 100644
index 000000000..c3154ba23
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/console.rs
@@ -0,0 +1,53 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! System console.
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Console interfaces.
+pub mod interface {
+    use core::fmt;
+
+    /// Console write functions.
+    pub trait Write {
+        /// Write a single character.
+        fn write_char(&self, c: char);
+
+        /// Write a Rust format string.
+        fn write_fmt(&self, args: fmt::Arguments) -> fmt::Result;
+
+        /// Block until the last buffered character has been physically put on the TX wire.
+        fn flush(&self);
+    }
+
+    /// Console read functions.
+    pub trait Read {
+        /// Read a single character.
+        fn read_char(&self) -> char {
+            ' '
+        }
+
+        /// Clear RX buffers, if any.
+        fn clear_rx(&self);
+    }
+
+    /// Console statistics.
+    pub trait Statistics {
+        /// Return the number of characters written.
+        fn chars_written(&self) -> usize {
+            0
+        }
+
+        /// Return the number of characters read.
+        fn chars_read(&self) -> usize {
+            0
+        }
+    }
+
+    /// Trait alias for a full-fledged console.
+    pub trait All = Write + Read + Statistics;
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/cpu.rs b/15_virtual_mem_part3_precomputed_tables/src/cpu.rs
new file mode 100644
index 000000000..36b6a9d4c
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/cpu.rs
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Processor code.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "_arch/aarch64/cpu.rs"]
+mod arch_cpu;
+
+mod boot;
+
+pub mod smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_cpu::{nop, wait_forever};
+
+#[cfg(feature = "test_build")]
+pub use arch_cpu::{qemu_exit_failure, qemu_exit_success};
diff --git a/15_virtual_mem_part3_precomputed_tables/src/cpu/boot.rs b/15_virtual_mem_part3_precomputed_tables/src/cpu/boot.rs
new file mode 100644
index 000000000..1dc5c1808
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/cpu/boot.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Boot code.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/cpu/boot.rs"]
+mod arch_boot;
diff --git a/15_virtual_mem_part3_precomputed_tables/src/cpu/smp.rs b/15_virtual_mem_part3_precomputed_tables/src/cpu/smp.rs
new file mode 100644
index 000000000..38230ce1e
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/cpu/smp.rs
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Symmetric multiprocessing.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/cpu/smp.rs"]
+mod arch_smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_smp::core_id;
diff --git a/15_virtual_mem_part3_precomputed_tables/src/driver.rs b/15_virtual_mem_part3_precomputed_tables/src/driver.rs
new file mode 100644
index 000000000..83fac4a7c
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/driver.rs
@@ -0,0 +1,62 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Driver support.
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Driver interfaces.
+pub mod interface {
+    /// Device Driver functions.
+    pub trait DeviceDriver {
+        /// Return a compatibility string for identifying the driver.
+        fn compatible(&self) -> &'static str;
+
+        /// Called by the kernel to bring up the device.
+        ///
+        /// # Safety
+        ///
+        /// - During init, drivers might do stuff with system-wide impact.
+        unsafe fn init(&self) -> Result<(), &'static str> {
+            Ok(())
+        }
+
+        /// Called by the kernel to register and enable the device's IRQ handlers, if any.
+        ///
+        /// Rust's type system will prevent a call to this function unless the calling instance
+        /// itself has static lifetime.
+        fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
+            Ok(())
+        }
+
+        /// After MMIO remapping, returns the new virtual start address.
+        ///
+        /// This API assumes a driver has only a single, contiguous MMIO aperture, which will not be
+        /// the case for more complex devices. This API will likely change in future tutorials.
+        fn virt_mmio_start_addr(&self) -> Option<usize> {
+            None
+        }
+    }
+
+    /// Device driver management functions.
+    ///
+    /// The `BSP` is supposed to supply one global instance.
+    pub trait DriverManager {
+        /// Return a slice of references to all `BSP`-instantiated drivers.
+        fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
+
+        /// Return only those drivers needed for the BSP's early printing functionality.
+        ///
+        /// For example, the default UART.
+        fn early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
+
+        /// Return all drivers minus early-print drivers.
+        fn non_early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
+
+        /// Initialization code that runs after the early print driver init.
+        fn post_early_print_device_driver_init(&self);
+    }
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/exception.rs b/15_virtual_mem_part3_precomputed_tables/src/exception.rs
new file mode 100644
index 000000000..3c5e7bc83
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/exception.rs
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Synchronous and asynchronous exception handling.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "_arch/aarch64/exception.rs"]
+mod arch_exception;
+
+pub mod asynchronous;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_exception::{current_privilege_level, handling_init};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Kernel privilege levels.
+#[allow(missing_docs)]
+#[derive(PartialEq)]
+pub enum PrivilegeLevel {
+    User,
+    Kernel,
+    Hypervisor,
+    Unknown,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// Libkernel unit tests must execute in kernel mode.
+    #[kernel_test]
+    fn test_runner_executes_in_kernel_mode() {
+        let (level, _) = current_privilege_level();
+
+        assert!(level == PrivilegeLevel::Kernel)
+    }
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/exception/asynchronous.rs b/15_virtual_mem_part3_precomputed_tables/src/exception/asynchronous.rs
new file mode 100644
index 000000000..e9aace357
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/exception/asynchronous.rs
@@ -0,0 +1,152 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Asynchronous exception handling.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/exception/asynchronous.rs"]
+mod arch_asynchronous;
+
+use core::{fmt, marker::PhantomData};
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_asynchronous::{
+    is_local_irq_masked, local_irq_mask, local_irq_mask_save, local_irq_restore, local_irq_unmask,
+    print_state,
+};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Interrupt descriptor.
+#[derive(Copy, Clone)]
+pub struct IRQDescriptor {
+    /// Descriptive name.
+    pub name: &'static str,
+
+    /// Reference to handler trait object.
+    pub handler: &'static (dyn interface::IRQHandler + Sync),
+}
+
+/// IRQContext token.
+///
+/// An instance of this type indicates that the local core is currently executing in IRQ
+/// context, aka executing an interrupt vector or subcalls of it.
+///
+/// Concept and implementation derived from the `CriticalSection` introduced in
+/// <https://github.com/rust-embedded/bare-metal>
+#[derive(Clone, Copy)]
+pub struct IRQContext<'irq_context> {
+    _0: PhantomData<&'irq_context ()>,
+}
+
+/// Asynchronous exception handling interfaces.
+pub mod interface {
+
+    /// Implemented by types that handle IRQs.
+    pub trait IRQHandler {
+        /// Called when the corresponding interrupt is asserted.
+        fn handle(&self) -> Result<(), &'static str>;
+    }
+
+    /// IRQ management functions.
+    ///
+    /// The `BSP` is supposed to supply one global instance. Typically implemented by the
+    /// platform's interrupt controller.
+    pub trait IRQManager {
+        /// The IRQ number type depends on the implementation.
+        type IRQNumberType;
+
+        /// Register a handler.
+        fn register_handler(
+            &self,
+            irq_number: Self::IRQNumberType,
+            descriptor: super::IRQDescriptor,
+        ) -> Result<(), &'static str>;
+
+        /// Enable an interrupt in the controller.
+        fn enable(&self, irq_number: Self::IRQNumberType);
+
+        /// Handle pending interrupts.
+        ///
+        /// This function is called directly from the CPU's IRQ exception vector. On AArch64,
+        /// this means that the respective CPU core has disabled exception handling.
+        /// This function can therefore not be preempted and runs start to finish.
+        ///
+        /// Takes an IRQContext token to ensure it can only be called from IRQ context.
+        #[allow(clippy::trivially_copy_pass_by_ref)]
+        fn handle_pending_irqs<'irq_context>(
+            &'irq_context self,
+            ic: &super::IRQContext<'irq_context>,
+        );
+
+        /// Print list of registered handlers.
+        fn print_handler(&self);
+    }
+}
+
+/// A wrapper type for IRQ numbers with integrated range sanity check.
+#[derive(Copy, Clone)]
+pub struct IRQNumber<const MAX_INCLUSIVE: usize>(usize);
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl<'irq_context> IRQContext<'irq_context> {
+    /// Creates an IRQContext token.
+    ///
+    /// # Safety
+    ///
+    /// - This must only be called when the current core is in an interrupt context and will not
+    ///   live beyond the end of it. That is, creation is allowed in interrupt vector functions. For
+    ///   example, in the ARMv8-A case, in `extern "C" fn current_elx_irq()`.
+    /// - Note that the lifetime `'irq_context` of the returned instance is unconstrained. User code
+    ///   must not be able to influence the lifetime picked for this type, since that might cause it
+    ///   to be inferred to `'static`.
+    #[inline(always)]
+    pub unsafe fn new() -> Self {
+        IRQContext { _0: PhantomData }
+    }
+}
+
+impl<const MAX_INCLUSIVE: usize> IRQNumber<{ MAX_INCLUSIVE }> {
+    /// Creates a new instance if number <= MAX_INCLUSIVE.
+    pub const fn new(number: usize) -> Self {
+        assert!(number <= MAX_INCLUSIVE);
+
+        Self { 0: number }
+    }
+
+    /// Return the wrapped number.
+    pub const fn get(self) -> usize {
+        self.0
+    }
+}
+
+impl<const MAX_INCLUSIVE: usize> fmt::Display for IRQNumber<{ MAX_INCLUSIVE }> {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        write!(f, "{}", self.0)
+    }
+}
+
+/// Executes the provided closure while IRQs are masked on the executing core.
+///
+/// While the function temporarily changes the HW state of the executing core, it restores it to the
+/// previous state before returning, so this is deemed safe.
+#[inline(always)]
+pub fn exec_with_irq_masked<T>(f: impl FnOnce() -> T) -> T {
+    let ret: T;
+
+    unsafe {
+        let saved = local_irq_mask_save();
+        ret = f();
+        local_irq_restore(saved);
+    }
+
+    ret
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/lib.rs b/15_virtual_mem_part3_precomputed_tables/src/lib.rs
new file mode 100644
index 000000000..3346134ad
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/lib.rs
@@ -0,0 +1,176 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+// Rust embedded logo for `make doc`.
+#![doc(html_logo_url = "https://git.io/JeGIp")]
+
+//! The `kernel` library.
+//!
+//! Used to compose the final kernel binary.
+//!
+//! # Code organization and architecture
+//!
+//! The code is divided into different *modules*, each representing a typical **subsystem** of the
+//! `kernel`. Top-level module files of subsystems reside directly in the `src` folder. For example,
+//! `src/memory.rs` contains code that is concerned with all things memory management.
+//!
+//! ## Visibility of processor architecture code
+//!
+//! Some of the `kernel`'s subsystems depend on low-level code that is specific to the target
+//! processor architecture. For each supported processor architecture, there exists a subfolder in
+//! `src/_arch`, for example, `src/_arch/aarch64`.
+//!
+//! The architecture folders mirror the subsystem modules laid out in `src`. For example,
+//! architectural code that belongs to the `kernel`'s MMU subsystem (`src/memory/mmu.rs`) would go
+//! into `src/_arch/aarch64/memory/mmu.rs`. The latter file is loaded as a module in
+//! `src/memory/mmu.rs` using the `path attribute`. Usually, the chosen module name is the generic
+//! module's name prefixed with `arch_`.
+//!
+//! For example, this is the top of `src/memory/mmu.rs`:
+//!
+//! ```
+//! #[cfg(target_arch = "aarch64")]
+//! #[path = "../_arch/aarch64/memory/mmu.rs"]
+//! mod arch_mmu;
+//! ```
+//!
+//! Often times, items from the `arch_ module` will be publicly reexported by the parent module.
+//! This way, each architecture specific module can provide its implementation of an item, while the
+//! caller must not be concerned which architecture has been conditionally compiled.
+//!
+//! ## BSP code
+//!
+//! `BSP` stands for Board Support Package. `BSP` code is organized under `src/bsp.rs` and contains
+//! target board specific definitions and functions. These are things such as the board's memory map
+//! or instances of drivers for devices that are featured on the respective board.
+//!
+//! Just like processor architecture code, the `BSP` code's module structure tries to mirror the
+//! `kernel`'s subsystem modules, but there is no reexporting this time. That means whatever is
+//! provided must be called starting from the `bsp` namespace, e.g. `bsp::driver::driver_manager()`.
+//!
+//! ## Kernel interfaces
+//!
+//! Both `arch` and `bsp` contain code that is conditionally compiled depending on the actual target
+//! and board for which the kernel is compiled. For example, the `interrupt controller` hardware of
+//! the `Raspberry Pi 3` and the `Raspberry Pi 4` is different, but we want the rest of the `kernel`
+//! code to play nicely with any of the two without much hassle.
+//!
+//! In order to provide a clean abstraction between `arch`, `bsp` and `generic kernel code`,
+//! `interface` traits are provided *whenever possible* and *where it makes sense*. They are defined
+//! in the respective subsystem module and help to enforce the idiom of *program to an interface,
+//! not an implementation*. For example, there will be a common IRQ handling interface which the two
+//! different interrupt controller `drivers` of both Raspberrys will implement, and only export the
+//! interface to the rest of the `kernel`.
+//!
+//! ```
+//!         +-------------------+
+//!         | Interface (Trait) |
+//!         |                   |
+//!         +--+-------------+--+
+//!            ^             ^
+//!            |             |
+//!            |             |
+//! +----------+--+       +--+----------+
+//! | kernel code |       |  bsp code   |
+//! |             |       |  arch code  |
+//! +-------------+       +-------------+
+//! ```
+//!
+//! # Summary
+//!
+//! For a logical `kernel` subsystem, corresponding code can be distributed over several physical
+//! locations. Here is an example for the **memory** subsystem:
+//!
+//! - `src/memory.rs` and `src/memory/**/*`
+//!   - Common code that is agnostic of target processor architecture and `BSP` characteristics.
+//!     - Example: A function to zero a chunk of memory.
+//!   - Interfaces for the memory subsystem that are implemented by `arch` or `BSP` code.
+//!     - Example: An `MMU` interface that defines `MMU` function prototypes.
+//! - `src/bsp/__board_name__/memory.rs` and `src/bsp/__board_name__/memory/**/*`
+//!   - `BSP` specific code.
+//!   - Example: The board's memory map (physical addresses of DRAM and MMIO devices).
+//! - `src/_arch/__arch_name__/memory.rs` and `src/_arch/__arch_name__/memory/**/*`
+//!   - Processor architecture specific code.
+//!   - Example: Implementation of the `MMU` interface for the `__arch_name__` processor
+//!     architecture.
+//!
+//! From a namespace perspective, **memory** subsystem code lives in:
+//!
+//! - `crate::memory::*`
+//! - `crate::bsp::memory::*`
+//!
+//! # Boot flow
+//!
+//! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
+//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
+//!
+//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
+
+#![allow(clippy::clippy::upper_case_acronyms)]
+#![allow(incomplete_features)]
+#![feature(asm)]
+#![feature(const_evaluatable_checked)]
+#![feature(const_fn)]
+#![feature(const_fn_fn_ptr_basics)]
+#![feature(const_generics)]
+#![feature(const_panic)]
+#![feature(core_intrinsics)]
+#![feature(format_args_nl)]
+#![feature(global_asm)]
+#![feature(linkage)]
+#![feature(panic_info_message)]
+#![feature(trait_alias)]
+#![no_std]
+// Testing
+#![cfg_attr(test, no_main)]
+#![feature(custom_test_frameworks)]
+#![reexport_test_harness_main = "test_main"]
+#![test_runner(crate::test_runner)]
+
+mod panic_wait;
+mod runtime_init;
+mod synchronization;
+
+pub mod bsp;
+pub mod common;
+pub mod console;
+pub mod cpu;
+pub mod driver;
+pub mod exception;
+pub mod memory;
+pub mod print;
+pub mod state;
+pub mod time;
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+/// The default runner for unit tests.
+pub fn test_runner(tests: &[&test_types::UnitTest]) {
+    println!("Running {} tests", tests.len());
+    println!("-------------------------------------------------------------------\n");
+    for (i, test) in tests.iter().enumerate() {
+        print!("{:>3}. {:.<58}", i + 1, test.name);
+
+        // Run the actual test.
+        (test.test_func)();
+
+        // Failed tests call panic!(). Execution reaches here only if the test has passed.
+        println!("[ok]")
+    }
+}
+
+/// The `kernel_init()` for unit tests. Called from `runtime_init()`.
+#[cfg(test)]
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    exception::handling_init();
+    bsp::console::qemu_bring_up_console();
+
+    test_main();
+
+    cpu::qemu_exit_success()
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/main.rs b/15_virtual_mem_part3_precomputed_tables/src/main.rs
new file mode 100644
index 000000000..c317bb96f
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/main.rs
@@ -0,0 +1,105 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+// Rust embedded logo for `make doc`.
+#![doc(html_logo_url = "https://git.io/JeGIp")]
+
+//! The `kernel` binary.
+
+#![feature(format_args_nl)]
+#![no_main]
+#![no_std]
+
+use libkernel::{bsp, cpu, driver, exception, info, memory, state, time, warn};
+
+/// Early init code.
+///
+/// # Safety
+///
+/// - Only a single core must be active and running this function.
+/// - Printing will not work until the respective driver's MMIO is remapped.
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
+    exception::handling_init();
+
+    // Add the mapping records for the precomputed entries first, so that they appear on the top of
+    // the list.
+    bsp::memory::mmu::kernel_add_mapping_records_for_precomputed();
+
+    // Bring up the drivers needed for printing first.
+    for i in bsp::driver::driver_manager()
+        .early_print_device_drivers()
+        .iter()
+    {
+        // Any encountered errors cannot be printed yet, obviously, so just safely park the CPU.
+        i.init().unwrap_or_else(|_| cpu::wait_forever());
+    }
+    bsp::driver::driver_manager().post_early_print_device_driver_init();
+    // Printing available from here on.
+
+    // Now bring up the remaining drivers.
+    for i in bsp::driver::driver_manager()
+        .non_early_print_device_drivers()
+        .iter()
+    {
+        if let Err(x) = i.init() {
+            panic!("Error loading driver: {}: {}", i.compatible(), x);
+        }
+    }
+
+    // Let device drivers register and enable their handlers with the interrupt controller.
+    for i in bsp::driver::driver_manager().all_device_drivers() {
+        if let Err(msg) = i.register_and_enable_irq_handler() {
+            warn!("Error registering IRQ handler: {}", msg);
+        }
+    }
+
+    // Unmask interrupts on the boot CPU core.
+    exception::asynchronous::local_irq_unmask();
+
+    // Announce conclusion of the kernel_init() phase.
+    state::state_manager().transition_to_single_core_main();
+
+    // Transition from unsafe to safe.
+    kernel_main()
+}
+
+/// The main function running after the early init.
+fn kernel_main() -> ! {
+    use driver::interface::DriverManager;
+    use exception::asynchronous::interface::IRQManager;
+
+    info!("Booting on: {}", bsp::board_name());
+
+    info!("MMU online:");
+    memory::mmu::kernel_print_mappings();
+
+    let (_, privilege_level) = exception::current_privilege_level();
+    info!("Current privilege level: {}", privilege_level);
+
+    info!("Exception handling state:");
+    exception::asynchronous::print_state();
+
+    info!(
+        "Architectural timer resolution: {} ns",
+        time::time_manager().resolution().as_nanos()
+    );
+
+    info!("Drivers loaded:");
+    for (i, driver) in bsp::driver::driver_manager()
+        .all_device_drivers()
+        .iter()
+        .enumerate()
+    {
+        info!("      {}. {}", i + 1, driver.compatible());
+    }
+
+    info!("Registered IRQ handlers:");
+    bsp::exception::asynchronous::irq_manager().print_handler();
+
+    info!("Echoing input now");
+    cpu::wait_forever();
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory.rs b/15_virtual_mem_part3_precomputed_tables/src/memory.rs
new file mode 100644
index 000000000..87ffa81f5
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/memory.rs
@@ -0,0 +1,202 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Memory Management.
+
+pub mod mmu;
+
+use crate::common;
+use core::{
+    convert::TryFrom,
+    fmt,
+    marker::PhantomData,
+    ops::{AddAssign, RangeInclusive, SubAssign},
+};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Metadata trait for marking the type of an address.
+pub trait AddressType: Copy + Clone + PartialOrd + PartialEq {}
+
+/// Zero-sized type to mark a physical address.
+#[derive(Copy, Clone, PartialOrd, PartialEq)]
+pub enum Physical {}
+
+/// Zero-sized type to mark a virtual address.
+#[derive(Copy, Clone, PartialOrd, PartialEq)]
+pub enum Virtual {}
+
+/// Generic address type.
+#[derive(Copy, Clone, PartialOrd, PartialEq)]
+pub struct Address<ATYPE: AddressType> {
+    value: usize,
+    _address_type: PhantomData<fn() -> ATYPE>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl AddressType for Physical {}
+impl AddressType for Virtual {}
+
+impl<ATYPE: AddressType> Address<ATYPE> {
+    /// Create an instance.
+    pub const fn new(value: usize) -> Self {
+        Self {
+            value,
+            _address_type: PhantomData,
+        }
+    }
+
+    /// Align down.
+    pub const fn align_down(self, alignment: usize) -> Self {
+        let aligned = common::align_down(self.value, alignment);
+
+        Self {
+            value: aligned,
+            _address_type: PhantomData,
+        }
+    }
+
+    /// Converts `Address` into an usize.
+    pub const fn into_usize(self) -> usize {
+        self.value
+    }
+}
+
+impl TryFrom<Address<Virtual>> for Address<Physical> {
+    type Error = mmu::TranslationError;
+
+    fn try_from(virt: Address<Virtual>) -> Result<Self, Self::Error> {
+        mmu::try_virt_to_phys(virt)
+    }
+}
+
+impl<ATYPE: AddressType> core::ops::Add<usize> for Address<ATYPE> {
+    type Output = Self;
+
+    fn add(self, other: usize) -> Self {
+        Self {
+            value: self.value + other,
+            _address_type: PhantomData,
+        }
+    }
+}
+
+impl<ATYPE: AddressType> AddAssign for Address<ATYPE> {
+    fn add_assign(&mut self, other: Self) {
+        *self = Self {
+            value: self.value + other.into_usize(),
+            _address_type: PhantomData,
+        };
+    }
+}
+
+impl<ATYPE: AddressType> core::ops::Sub<usize> for Address<ATYPE> {
+    type Output = Self;
+
+    fn sub(self, other: usize) -> Self {
+        Self {
+            value: self.value - other,
+            _address_type: PhantomData,
+        }
+    }
+}
+
+impl<ATYPE: AddressType> SubAssign for Address<ATYPE> {
+    fn sub_assign(&mut self, other: Self) {
+        *self = Self {
+            value: self.value - other.into_usize(),
+            _address_type: PhantomData,
+        };
+    }
+}
+
+impl fmt::Display for Address<Physical> {
+    // Don't expect to see physical addresses greater than 40 bit.
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        let q3: u8 = ((self.value >> 32) & 0xff) as u8;
+        let q2: u16 = ((self.value >> 16) & 0xffff) as u16;
+        let q1: u16 = (self.value & 0xffff) as u16;
+
+        write!(f, "0x")?;
+        write!(f, "{:02x}_", q3)?;
+        write!(f, "{:04x}_", q2)?;
+        write!(f, "{:04x}", q1)
+    }
+}
+
+impl fmt::Display for Address<Virtual> {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        let q4: u16 = ((self.value >> 48) & 0xffff) as u16;
+        let q3: u16 = ((self.value >> 32) & 0xffff) as u16;
+        let q2: u16 = ((self.value >> 16) & 0xffff) as u16;
+        let q1: u16 = (self.value & 0xffff) as u16;
+
+        write!(f, "0x")?;
+        write!(f, "{:04x}_", q4)?;
+        write!(f, "{:04x}_", q3)?;
+        write!(f, "{:04x}_", q2)?;
+        write!(f, "{:04x}", q1)
+    }
+}
+
+/// Zero out an inclusive memory range.
+///
+/// # Safety
+///
+/// - `range.start` and `range.end` must be valid.
+/// - `range.start` and `range.end` must be `T` aligned.
+pub unsafe fn zero_volatile<T>(range: RangeInclusive<*mut T>)
+where
+    T: From<u8>,
+{
+    let mut ptr = *range.start();
+    let end_inclusive = *range.end();
+
+    while ptr <= end_inclusive {
+        core::ptr::write_volatile(ptr, T::from(0));
+        ptr = ptr.offset(1);
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// Check `zero_volatile()`.
+    #[kernel_test]
+    fn zero_volatile_works() {
+        let mut x: [usize; 3] = [10, 11, 12];
+        let x_range = x.as_mut_ptr_range();
+        let x_range_inclusive =
+            RangeInclusive::new(x_range.start, unsafe { x_range.end.offset(-1) });
+
+        unsafe { zero_volatile(x_range_inclusive) };
+
+        assert_eq!(x, [0, 0, 0]);
+    }
+
+    /// Check `bss` section layout.
+    #[kernel_test]
+    fn bss_section_is_sane() {
+        use crate::bsp::memory::bss_range_inclusive;
+        use core::mem;
+
+        let start = *bss_range_inclusive().start() as usize;
+        let end = *bss_range_inclusive().end() as usize;
+
+        assert_eq!(start % mem::size_of::<usize>(), 0);
+        assert_eq!(end % mem::size_of::<usize>(), 0);
+        assert!(end >= start);
+    }
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs
new file mode 100644
index 000000000..a7109ec29
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs
@@ -0,0 +1,265 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Memory Management Unit.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/memory/mmu.rs"]
+mod arch_mmu;
+
+mod mapping_record;
+mod translation_table;
+mod types;
+
+use crate::{
+    bsp,
+    memory::{Address, Physical, Virtual},
+    synchronization, warn,
+};
+use core::fmt;
+
+pub use types::*;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// MMU enable errors variants.
+#[allow(missing_docs)]
+#[derive(Debug)]
+pub enum MMUEnableError {
+    AlreadyEnabled,
+    Other(&'static str),
+}
+
+/// Translation error variants.
+#[allow(missing_docs)]
+#[derive(Debug)]
+pub enum TranslationError {
+    MMUDisabled,
+    Aborted,
+}
+
+/// Memory Management interfaces.
+pub mod interface {
+    use super::*;
+
+    /// MMU functions.
+    pub trait MMU {
+        /// Turns on the MMU for the first time and enables data and instruction caching.
+        ///
+        /// # Safety
+        ///
+        /// - Changes the HW's global state.
+        unsafe fn enable_mmu_and_caching(
+            &self,
+            phys_tables_base_addr: Address<Physical>,
+        ) -> Result<(), MMUEnableError>;
+
+        /// Returns true if the MMU is enabled, false otherwise.
+        fn is_enabled(&self) -> bool;
+
+        /// Try to translate a virtual address to a physical address.
+        ///
+        /// Will only succeed if there exists a valid mapping for the input VA.
+        fn try_virt_to_phys(
+            &self,
+            virt: Address<Virtual>,
+        ) -> Result<Address<Physical>, TranslationError>;
+    }
+}
+
+/// Describes the characteristics of a translation granule.
+pub struct TranslationGranule<const GRANULE_SIZE: usize>;
+
+/// Describes properties of an address space.
+pub struct AddressSpace<const AS_SIZE: usize>;
+
+/// Intended to be implemented for [`AddressSpace`].
+pub trait AssociatedTranslationTable {
+    /// A translation table whose address range is:
+    ///
+    /// [0, AS_SIZE - 1]
+    type TableStartFromBottom;
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+use interface::MMU;
+use synchronization::interface::ReadWriteEx;
+use translation_table::interface::TranslationTable;
+
+/// Map pages in the kernel's translation tables.
+///
+/// No input checks done, input is passed through to the architectural implementation.
+///
+/// # Safety
+///
+/// - See `map_pages_at()`.
+/// - Does not prevent aliasing.
+unsafe fn kernel_map_pages_at_unchecked(
+    name: &'static str,
+    virt_pages: &PageSliceDescriptor<Virtual>,
+    phys_pages: &PageSliceDescriptor<Physical>,
+    attr: &AttributeFields,
+) -> Result<(), &'static str> {
+    bsp::memory::mmu::kernel_translation_tables()
+        .write(|tables| tables.map_pages_at(virt_pages, phys_pages, attr))?;
+
+    kernel_add_mapping_record(name, virt_pages, phys_pages, attr);
+
+    Ok(())
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl fmt::Display for MMUEnableError {
+    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+        match self {
+            MMUEnableError::AlreadyEnabled => write!(f, "MMU is already enabled"),
+            MMUEnableError::Other(x) => write!(f, "{}", x),
+        }
+    }
+}
+
+impl<const GRANULE_SIZE: usize> TranslationGranule<GRANULE_SIZE> {
+    /// The granule's size.
+    pub const SIZE: usize = Self::size_checked();
+
+    /// The granule's mask.
+    pub const MASK: usize = Self::SIZE - 1;
+
+    /// The granule's shift, aka log2(size).
+    pub const SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
+
+    const fn size_checked() -> usize {
+        assert!(GRANULE_SIZE.is_power_of_two());
+
+        GRANULE_SIZE
+    }
+}
+
+impl<const AS_SIZE: usize> AddressSpace<AS_SIZE> {
+    /// The address space size.
+    pub const SIZE: usize = Self::size_checked();
+
+    /// The address space shift, aka log2(size).
+    pub const SIZE_SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
+
+    const fn size_checked() -> usize {
+        assert!(AS_SIZE.is_power_of_two());
+
+        // Check for architectural restrictions as well.
+        Self::arch_address_space_size_sanity_checks();
+
+        AS_SIZE
+    }
+}
+
+/// Add an entry to the mapping info record.
+pub fn kernel_add_mapping_record(
+    name: &'static str,
+    virt_pages: &PageSliceDescriptor<Virtual>,
+    phys_pages: &PageSliceDescriptor<Physical>,
+    attr: &AttributeFields,
+) {
+    if let Err(x) = mapping_record::kernel_add(name, virt_pages, phys_pages, attr) {
+        warn!("{}", x);
+    }
+}
+
+/// Raw mapping of virtual to physical pages in the kernel translation tables.
+///
+/// Prevents mapping into the MMIO range of the tables.
+///
+/// # Safety
+///
+/// - See `kernel_map_pages_at_unchecked()`.
+/// - Does not prevent aliasing. Currently, the callers must be trusted.
+pub unsafe fn kernel_map_pages_at(
+    name: &'static str,
+    virt_pages: &PageSliceDescriptor<Virtual>,
+    phys_pages: &PageSliceDescriptor<Physical>,
+    attr: &AttributeFields,
+) -> Result<(), &'static str> {
+    let is_mmio = bsp::memory::mmu::kernel_translation_tables()
+        .read(|tables| tables.is_virt_page_slice_mmio(virt_pages));
+    if is_mmio {
+        return Err("Attempt to manually map into MMIO region");
+    }
+
+    kernel_map_pages_at_unchecked(name, virt_pages, phys_pages, attr)?;
+
+    Ok(())
+}
+
+/// MMIO remapping in the kernel translation tables.
+///
+/// Typically used by device drivers.
+///
+/// # Safety
+///
+/// - Same as `kernel_map_pages_at_unchecked()`, minus the aliasing part.
+pub unsafe fn kernel_map_mmio(
+    name: &'static str,
+    mmio_descriptor: &MMIODescriptor,
+) -> Result<Address<Virtual>, &'static str> {
+    let phys_pages: PageSliceDescriptor<Physical> = mmio_descriptor.clone().into();
+    let offset_into_start_page =
+        mmio_descriptor.start_addr().into_usize() & bsp::memory::mmu::KernelGranule::MASK;
+
+    // Check if an identical page slice has been mapped for another driver. If so, reuse it.
+    let virt_addr = if let Some(addr) =
+        mapping_record::kernel_find_and_insert_mmio_duplicate(mmio_descriptor, name)
+    {
+        addr
+    // Otherwise, allocate a new virtual page slice and map it.
+    } else {
+        let virt_pages: PageSliceDescriptor<Virtual> =
+            bsp::memory::mmu::kernel_translation_tables()
+                .write(|tables| tables.next_mmio_virt_page_slice(phys_pages.num_pages()))?;
+
+        kernel_map_pages_at_unchecked(
+            name,
+            &virt_pages,
+            &phys_pages,
+            &AttributeFields {
+                mem_attributes: MemAttributes::Device,
+                acc_perms: AccessPermissions::ReadWrite,
+                execute_never: true,
+            },
+        )?;
+
+        virt_pages.start_addr()
+    };
+
+    Ok(virt_addr + offset_into_start_page)
+}
+
+/// Try to translate a virtual address to a physical address.
+///
+/// Will only succeed if there exists a valid mapping for the input VA.
+pub fn try_virt_to_phys(virt: Address<Virtual>) -> Result<Address<Physical>, TranslationError> {
+    arch_mmu::mmu().try_virt_to_phys(virt)
+}
+
+/// Enable the MMU and data + instruction caching.
+///
+/// # Safety
+///
+/// - Crucial function during kernel init. Changes the the complete memory view of the processor.
+#[inline(always)]
+pub unsafe fn enable_mmu_and_caching(
+    phys_tables_base_addr: Address<Physical>,
+) -> Result<(), MMUEnableError> {
+    arch_mmu::mmu().enable_mmu_and_caching(phys_tables_base_addr)
+}
+
+/// Human-readable print of all recorded kernel mappings.
+pub fn kernel_print_mappings() {
+    mapping_record::kernel_print()
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/mapping_record.rs b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/mapping_record.rs
new file mode 100644
index 000000000..eab62fb39
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/mapping_record.rs
@@ -0,0 +1,221 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! A record of mapped pages.
+
+use super::{
+    AccessPermissions, Address, AttributeFields, MMIODescriptor, MemAttributes,
+    PageSliceDescriptor, Physical, Virtual,
+};
+use crate::{info, synchronization, synchronization::InitStateLock, warn};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Type describing a virtual memory mapping.
+#[allow(missing_docs)]
+#[derive(Copy, Clone)]
+struct MappingRecordEntry {
+    pub users: [Option<&'static str>; 5],
+    pub phys_pages: PageSliceDescriptor<Physical>,
+    pub virt_start_addr: Address<Virtual>,
+    pub attribute_fields: AttributeFields,
+}
+
+struct MappingRecord {
+    inner: [Option<MappingRecordEntry>; 12],
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static KERNEL_MAPPING_RECORD: InitStateLock<MappingRecord> =
+    InitStateLock::new(MappingRecord::new());
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl MappingRecordEntry {
+    pub fn new(
+        name: &'static str,
+        virt_pages: &PageSliceDescriptor<Virtual>,
+        phys_pages: &PageSliceDescriptor<Physical>,
+        attr: &AttributeFields,
+    ) -> Self {
+        Self {
+            users: [Some(name), None, None, None, None],
+            phys_pages: *phys_pages,
+            virt_start_addr: virt_pages.start_addr(),
+            attribute_fields: *attr,
+        }
+    }
+
+    fn find_next_free_user(&mut self) -> Result<&mut Option<&'static str>, &'static str> {
+        if let Some(x) = self.users.iter_mut().find(|x| x.is_none()) {
+            return Ok(x);
+        };
+
+        Err("Storage for user info exhausted")
+    }
+
+    pub fn add_user(&mut self, user: &'static str) -> Result<(), &'static str> {
+        let x = self.find_next_free_user()?;
+        *x = Some(user);
+        Ok(())
+    }
+}
+
+impl MappingRecord {
+    pub const fn new() -> Self {
+        Self { inner: [None; 12] }
+    }
+
+    fn find_next_free(&mut self) -> Result<&mut Option<MappingRecordEntry>, &'static str> {
+        if let Some(x) = self.inner.iter_mut().find(|x| x.is_none()) {
+            return Ok(x);
+        }
+
+        Err("Storage for mapping info exhausted")
+    }
+
+    fn find_duplicate(
+        &mut self,
+        phys_pages: &PageSliceDescriptor<Physical>,
+    ) -> Option<&mut MappingRecordEntry> {
+        self.inner
+            .iter_mut()
+            .filter(|x| x.is_some())
+            .map(|x| x.as_mut().unwrap())
+            .filter(|x| x.attribute_fields.mem_attributes == MemAttributes::Device)
+            .find(|x| x.phys_pages == *phys_pages)
+    }
+
+    pub fn add(
+        &mut self,
+        name: &'static str,
+        virt_pages: &PageSliceDescriptor<Virtual>,
+        phys_pages: &PageSliceDescriptor<Physical>,
+        attr: &AttributeFields,
+    ) -> Result<(), &'static str> {
+        let x = self.find_next_free()?;
+
+        *x = Some(MappingRecordEntry::new(name, virt_pages, phys_pages, attr));
+        Ok(())
+    }
+
+    pub fn print(&self) {
+        const KIB_RSHIFT: u32 = 10; // log2(1024).
+        const MIB_RSHIFT: u32 = 20; // log2(1024 * 1024).
+
+        info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
+        info!(
+            "      {:^44}     {:^30}   {:^7}   {:^9}   {:^35}",
+            "Virtual", "Physical", "Size", "Attr", "Entity"
+        );
+        info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
+
+        for i in self
+            .inner
+            .iter()
+            .filter(|x| x.is_some())
+            .map(|x| x.unwrap())
+        {
+            let virt_start = i.virt_start_addr;
+            let virt_end_inclusive = virt_start + i.phys_pages.size() - 1;
+            let phys_start = i.phys_pages.start_addr();
+            let phys_end_inclusive = i.phys_pages.end_addr_inclusive();
+            let size = i.phys_pages.size();
+
+            let (size, unit) = if (size >> MIB_RSHIFT) > 0 {
+                (size >> MIB_RSHIFT, "MiB")
+            } else if (size >> KIB_RSHIFT) > 0 {
+                (size >> KIB_RSHIFT, "KiB")
+            } else {
+                (size, "Byte")
+            };
+
+            let attr = match i.attribute_fields.mem_attributes {
+                MemAttributes::CacheableDRAM => "C",
+                MemAttributes::Device => "Dev",
+            };
+
+            let acc_p = match i.attribute_fields.acc_perms {
+                AccessPermissions::ReadOnly => "RO",
+                AccessPermissions::ReadWrite => "RW",
+            };
+
+            let xn = if i.attribute_fields.execute_never {
+                "XN"
+            } else {
+                "X"
+            };
+
+            info!(
+                "      {}..{} --> {}..{} | \
+                        {: >3} {} | {: <3} {} {: <2} | {}",
+                virt_start,
+                virt_end_inclusive,
+                phys_start,
+                phys_end_inclusive,
+                size,
+                unit,
+                attr,
+                acc_p,
+                xn,
+                i.users[0].unwrap()
+            );
+
+            for k in i.users[1..].iter() {
+                if let Some(additional_user) = *k {
+                    info!(
+                        "                                                                                                            | {}",
+                        additional_user
+                    );
+                }
+            }
+        }
+
+        info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+use synchronization::interface::ReadWriteEx;
+
+/// Add an entry to the mapping info record.
+pub fn kernel_add(
+    name: &'static str,
+    virt_pages: &PageSliceDescriptor<Virtual>,
+    phys_pages: &PageSliceDescriptor<Physical>,
+    attr: &AttributeFields,
+) -> Result<(), &'static str> {
+    KERNEL_MAPPING_RECORD.write(|mr| mr.add(name, virt_pages, phys_pages, attr))
+}
+
+pub fn kernel_find_and_insert_mmio_duplicate(
+    mmio_descriptor: &MMIODescriptor,
+    new_user: &'static str,
+) -> Option<Address<Virtual>> {
+    let phys_pages: PageSliceDescriptor<Physical> = mmio_descriptor.clone().into();
+
+    KERNEL_MAPPING_RECORD.write(|mr| {
+        let dup = mr.find_duplicate(&phys_pages)?;
+
+        if let Err(x) = dup.add_user(new_user) {
+            warn!("{}", x);
+        }
+
+        Some(dup.virt_start_addr)
+    })
+}
+
+/// Human-readable print of all recorded kernel mappings.
+pub fn kernel_print() {
+    KERNEL_MAPPING_RECORD.read(|mr| mr.print());
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/translation_table.rs b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/translation_table.rs
new file mode 100644
index 000000000..bf9bed8cb
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/translation_table.rs
@@ -0,0 +1,109 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Translation table.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../../_arch/aarch64/memory/mmu/translation_table.rs"]
+mod arch_translation_table;
+
+use crate::memory::{
+    mmu::{AttributeFields, PageSliceDescriptor},
+    Physical, Virtual,
+};
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+#[cfg(target_arch = "aarch64")]
+pub use arch_translation_table::FixedSizeTranslationTable;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Translation table interfaces.
+pub mod interface {
+    use super::*;
+
+    /// Translation table operations.
+    pub trait TranslationTable {
+        /// Anything that needs to run before any of the other provided functions can be used.
+        ///
+        /// # Safety
+        ///
+        /// - Implementor must ensure that this function can run only once or is harmless if invoked
+        ///   multiple times.
+        fn init(&mut self) -> Result<(), &'static str>;
+
+        /// Map the given virtual pages to the given physical pages.
+        ///
+        /// # Safety
+        ///
+        /// - Using wrong attributes can cause multiple issues of different nature in the system.
+        /// - It is not required that the architectural implementation prevents aliasing. That is,
+        ///   mapping to the same physical memory using multiple virtual addresses, which would
+        ///   break Rust's ownership assumptions. This should be protected against in the kernel's
+        ///   generic MMU code.
+        unsafe fn map_pages_at(
+            &mut self,
+            virt_pages: &PageSliceDescriptor<Virtual>,
+            phys_pages: &PageSliceDescriptor<Physical>,
+            attr: &AttributeFields,
+        ) -> Result<(), &'static str>;
+
+        /// Obtain a free virtual page slice in the MMIO region.
+        ///
+        /// The "MMIO region" is a distinct region of the implementor's choice, which allows
+        /// differentiating MMIO addresses from others. This can speed up debugging efforts.
+        /// Ideally, those MMIO addresses are also standing out visually so that a human eye can
+        /// identify them. For example, by allocating them from near the end of the virtual address
+        /// space.
+        fn next_mmio_virt_page_slice(
+            &mut self,
+            num_pages: usize,
+        ) -> Result<PageSliceDescriptor<Virtual>, &'static str>;
+
+        /// Check if a virtual page splice is in the "MMIO region".
+        fn is_virt_page_slice_mmio(&self, virt_pages: &PageSliceDescriptor<Virtual>) -> bool;
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use crate::{bsp, memory::Address};
+    use arch_translation_table::MinSizeTranslationTable;
+    use interface::TranslationTable;
+    use test_macros::kernel_test;
+
+    /// Sanity checks for the TranslationTable implementation.
+    #[kernel_test]
+    fn translationtable_implementation_sanity() {
+        // This will occupy a lot of space on the stack.
+        let mut tables = MinSizeTranslationTable::new_for_runtime();
+
+        assert!(tables.init().is_ok());
+
+        let x = tables.next_mmio_virt_page_slice(0);
+        assert!(x.is_err());
+
+        let x = tables.next_mmio_virt_page_slice(1_0000_0000);
+        assert!(x.is_err());
+
+        let x = tables.next_mmio_virt_page_slice(2).unwrap();
+        assert_eq!(x.size(), bsp::memory::mmu::KernelGranule::SIZE * 2);
+
+        assert_eq!(tables.is_virt_page_slice_mmio(&x), true);
+
+        assert_eq!(
+            tables.is_virt_page_slice_mmio(&PageSliceDescriptor::from_addr(Address::new(0), 1)),
+            false
+        );
+    }
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs
new file mode 100644
index 000000000..dc05fd70c
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs
@@ -0,0 +1,217 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Memory Management Unit types.
+
+use crate::{
+    bsp, common,
+    memory::{Address, AddressType, Physical, Virtual},
+};
+use core::{
+    convert::{From, TryFrom},
+    marker::PhantomData,
+};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Generic page type.
+#[repr(C)]
+pub struct Page<ATYPE: AddressType> {
+    inner: [u8; bsp::memory::mmu::KernelGranule::SIZE],
+    _address_type: PhantomData<ATYPE>,
+}
+
+/// Type describing a slice of pages.
+#[derive(Copy, Clone, PartialOrd, PartialEq)]
+pub struct PageSliceDescriptor<ATYPE: AddressType> {
+    start: Address<ATYPE>,
+    num_pages: usize,
+}
+
+/// Architecture agnostic memory attributes.
+#[allow(missing_docs)]
+#[derive(Copy, Clone, PartialOrd, PartialEq)]
+pub enum MemAttributes {
+    CacheableDRAM,
+    Device,
+}
+
+/// Architecture agnostic access permissions.
+#[allow(missing_docs)]
+#[derive(Copy, Clone)]
+pub enum AccessPermissions {
+    ReadOnly,
+    ReadWrite,
+}
+
+/// Collection of memory attributes.
+#[allow(missing_docs)]
+#[derive(Copy, Clone)]
+pub struct AttributeFields {
+    pub mem_attributes: MemAttributes,
+    pub acc_perms: AccessPermissions,
+    pub execute_never: bool,
+}
+
+/// An MMIO descriptor for use in device drivers.
+#[derive(Copy, Clone)]
+pub struct MMIODescriptor {
+    start_addr: Address<Physical>,
+    size: usize,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+// Page
+//------------------------------------------------------------------------------
+
+impl<ATYPE: AddressType> Page<ATYPE> {
+    /// Get a pointer to the instance.
+    pub const fn as_ptr(&self) -> *const Page<ATYPE> {
+        self as *const _
+    }
+}
+
+//------------------------------------------------------------------------------
+// PageSliceDescriptor
+//------------------------------------------------------------------------------
+
+impl<ATYPE: AddressType> PageSliceDescriptor<ATYPE> {
+    /// Create an instance.
+    pub const fn from_addr(start: Address<ATYPE>, num_pages: usize) -> Self {
+        assert!(common::is_aligned(
+            start.into_usize(),
+            bsp::memory::mmu::KernelGranule::SIZE
+        ));
+        assert!(num_pages > 0);
+
+        Self { start, num_pages }
+    }
+
+    /// Return a pointer to the first page of the described slice.
+    const fn first_page_ptr(&self) -> *const Page<ATYPE> {
+        self.start.into_usize() as *const _
+    }
+
+    /// Return the number of Pages the slice describes.
+    pub const fn num_pages(&self) -> usize {
+        self.num_pages
+    }
+
+    /// Return the memory size this descriptor spans.
+    pub const fn size(&self) -> usize {
+        self.num_pages * bsp::memory::mmu::KernelGranule::SIZE
+    }
+
+    /// Return the start address.
+    pub const fn start_addr(&self) -> Address<ATYPE> {
+        self.start
+    }
+
+    /// Return the exclusive end address.
+    pub fn end_addr(&self) -> Address<ATYPE> {
+        self.start + self.size()
+    }
+
+    /// Return the inclusive end address.
+    pub fn end_addr_inclusive(&self) -> Address<ATYPE> {
+        self.start + (self.size() - 1)
+    }
+
+    /// Check if an address is contained within this descriptor.
+    pub fn contains(&self, addr: Address<ATYPE>) -> bool {
+        (addr >= self.start_addr()) && (addr <= self.end_addr_inclusive())
+    }
+
+    /// Return a non-mutable slice of Pages.
+    ///
+    /// # Safety
+    ///
+    /// - Same as applies for `core::slice::from_raw_parts`.
+    pub unsafe fn as_slice(&self) -> &[Page<ATYPE>] {
+        core::slice::from_raw_parts(self.first_page_ptr(), self.num_pages)
+    }
+}
+
+impl TryFrom<PageSliceDescriptor<Virtual>> for PageSliceDescriptor<Physical> {
+    type Error = super::TranslationError;
+
+    fn try_from(desc: PageSliceDescriptor<Virtual>) -> Result<Self, Self::Error> {
+        let phys_start = super::try_virt_to_phys(desc.start)?;
+
+        Ok(Self {
+            start: phys_start,
+            num_pages: desc.num_pages,
+        })
+    }
+}
+
+impl From<MMIODescriptor> for PageSliceDescriptor<Physical> {
+    fn from(desc: MMIODescriptor) -> Self {
+        let start_page_addr = desc
+            .start_addr
+            .align_down(bsp::memory::mmu::KernelGranule::SIZE);
+
+        let len = ((desc.end_addr_inclusive().into_usize() - start_page_addr.into_usize())
+            >> bsp::memory::mmu::KernelGranule::SHIFT)
+            + 1;
+
+        Self {
+            start: start_page_addr,
+            num_pages: len,
+        }
+    }
+}
+
+//------------------------------------------------------------------------------
+// MMIODescriptor
+//------------------------------------------------------------------------------
+
+impl MMIODescriptor {
+    /// Create an instance.
+    pub const fn new(start_addr: Address<Physical>, size: usize) -> Self {
+        assert!(size > 0);
+
+        Self { start_addr, size }
+    }
+
+    /// Return the start address.
+    pub const fn start_addr(&self) -> Address<Physical> {
+        self.start_addr
+    }
+
+    /// Return the inclusive end address.
+    pub fn end_addr_inclusive(&self) -> Address<Physical> {
+        self.start_addr + (self.size - 1)
+    }
+
+    /// Return the size.
+    pub const fn size(&self) -> usize {
+        self.size
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// Check if the size of `struct Page` is as expected.
+    #[kernel_test]
+    fn size_of_page_equals_granule_size() {
+        assert_eq!(
+            core::mem::size_of::<Page<Physical>>(),
+            bsp::memory::mmu::KernelGranule::SIZE
+        );
+    }
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/panic_wait.rs b/15_virtual_mem_part3_precomputed_tables/src/panic_wait.rs
new file mode 100644
index 000000000..e3a9ed8ab
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/panic_wait.rs
@@ -0,0 +1,58 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! A panic handler that infinitely waits.
+
+use crate::{bsp, cpu, exception};
+use core::{fmt, panic::PanicInfo};
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+fn _panic_print(args: fmt::Arguments) {
+    use fmt::Write;
+
+    unsafe { bsp::console::panic_console_out().write_fmt(args).unwrap() };
+}
+
+/// The point of exit for `libkernel`.
+///
+/// It is linked weakly, so that the integration tests can overload its standard behavior.
+#[linkage = "weak"]
+#[no_mangle]
+fn _panic_exit() -> ! {
+    #[cfg(not(test_build))]
+    {
+        cpu::wait_forever()
+    }
+
+    #[cfg(test_build)]
+    {
+        cpu::qemu_exit_failure()
+    }
+}
+
+/// Prints with a newline - only use from the panic handler.
+///
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
+#[macro_export]
+macro_rules! panic_println {
+    ($($arg:tt)*) => ({
+        _panic_print(format_args_nl!($($arg)*));
+    })
+}
+
+#[panic_handler]
+fn panic(info: &PanicInfo) -> ! {
+    unsafe { exception::asynchronous::local_irq_mask() };
+
+    if let Some(args) = info.message() {
+        panic_println!("\nKernel panic: {}", args);
+    } else {
+        panic_println!("\nKernel panic!");
+    }
+
+    _panic_exit()
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/print.rs b/15_virtual_mem_part3_precomputed_tables/src/print.rs
new file mode 100644
index 000000000..89fa66943
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/print.rs
@@ -0,0 +1,106 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Printing.
+
+use crate::{bsp, console};
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+#[doc(hidden)]
+pub fn _print(args: fmt::Arguments) {
+    use console::interface::Write;
+
+    bsp::console::console().write_fmt(args).unwrap();
+}
+
+/// Prints without a newline.
+///
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
+#[macro_export]
+macro_rules! print {
+    ($($arg:tt)*) => ($crate::print::_print(format_args!($($arg)*)));
+}
+
+/// Prints with a newline.
+///
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
+#[macro_export]
+macro_rules! println {
+    () => ($crate::print!("\n"));
+    ($($arg:tt)*) => ({
+        $crate::print::_print(format_args_nl!($($arg)*));
+    })
+}
+
+/// Prints an info, with a newline.
+#[macro_export]
+macro_rules! info {
+    ($string:expr) => ({
+        #[allow(unused_imports)]
+        use crate::time::interface::TimeManager;
+
+        let timestamp = $crate::time::time_manager().uptime();
+        let timestamp_subsec_us = timestamp.subsec_micros();
+
+        $crate::print::_print(format_args_nl!(
+            concat!("[  {:>3}.{:03}{:03}] ", $string),
+            timestamp.as_secs(),
+            timestamp_subsec_us / 1_000,
+            timestamp_subsec_us % 1_000
+        ));
+    });
+    ($format_string:expr, $($arg:tt)*) => ({
+        #[allow(unused_imports)]
+        use crate::time::interface::TimeManager;
+
+        let timestamp = $crate::time::time_manager().uptime();
+        let timestamp_subsec_us = timestamp.subsec_micros();
+
+        $crate::print::_print(format_args_nl!(
+            concat!("[  {:>3}.{:03}{:03}] ", $format_string),
+            timestamp.as_secs(),
+            timestamp_subsec_us / 1_000,
+            timestamp_subsec_us % 1_000,
+            $($arg)*
+        ));
+    })
+}
+
+/// Prints a warning, with a newline.
+#[macro_export]
+macro_rules! warn {
+    ($string:expr) => ({
+        #[allow(unused_imports)]
+        use crate::time::interface::TimeManager;
+
+        let timestamp = $crate::time::time_manager().uptime();
+        let timestamp_subsec_us = timestamp.subsec_micros();
+
+        $crate::print::_print(format_args_nl!(
+            concat!("[W {:>3}.{:03}{:03}] ", $string),
+            timestamp.as_secs(),
+            timestamp_subsec_us / 1_000,
+            timestamp_subsec_us % 1_000
+        ));
+    });
+    ($format_string:expr, $($arg:tt)*) => ({
+        #[allow(unused_imports)]
+        use crate::time::interface::TimeManager;
+
+        let timestamp = $crate::time::time_manager().uptime();
+        let timestamp_subsec_us = timestamp.subsec_micros();
+
+        $crate::print::_print(format_args_nl!(
+            concat!("[W {:>3}.{:03}{:03}] ", $format_string),
+            timestamp.as_secs(),
+            timestamp_subsec_us / 1_000,
+            timestamp_subsec_us % 1_000,
+            $($arg)*
+        ));
+    })
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/runtime_init.rs b/15_virtual_mem_part3_precomputed_tables/src/runtime_init.rs
new file mode 100644
index 000000000..0a1c685cd
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/runtime_init.rs
@@ -0,0 +1,40 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Rust runtime initialization code.
+
+use crate::{bsp, memory};
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// Zero out the .bss section.
+///
+/// # Safety
+///
+/// - Must only be called pre `kernel_init()`.
+#[inline(always)]
+unsafe fn zero_bss() {
+    memory::zero_volatile(bsp::memory::bss_range_inclusive());
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Equivalent to `crt0` or `c0` code in C/C++ world. Clears the `bss` section, then jumps to kernel
+/// init code.
+///
+/// # Safety
+///
+/// - Only a single core must be active and running this function.
+pub unsafe fn runtime_init() -> ! {
+    extern "Rust" {
+        fn kernel_init() -> !;
+    }
+
+    zero_bss();
+    kernel_init()
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/state.rs b/15_virtual_mem_part3_precomputed_tables/src/state.rs
new file mode 100644
index 000000000..c94d04c84
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/state.rs
@@ -0,0 +1,92 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! State information about the kernel itself.
+
+use core::sync::atomic::{AtomicU8, Ordering};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Different stages in the kernel execution.
+#[derive(Copy, Clone, Eq, PartialEq)]
+enum State {
+    /// The kernel starts booting in this state.
+    Init,
+
+    /// The kernel transitions to this state when jumping to `kernel_main()` (at the end of
+    /// `kernel_init()`, after all init calls are done).
+    SingleCoreMain,
+
+    /// The kernel transitions to this state when it boots the secondary cores, aka switches
+    /// exectution mode to symmetric multiprocessing (SMP).
+    MultiCoreMain,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Maintains the kernel state and state transitions.
+pub struct StateManager(AtomicU8);
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static STATE_MANAGER: StateManager = StateManager::new();
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the global StateManager.
+pub fn state_manager() -> &'static StateManager {
+    &STATE_MANAGER
+}
+
+impl StateManager {
+    const INIT: u8 = 0;
+    const SINGLE_CORE_MAIN: u8 = 1;
+    const MULTI_CORE_MAIN: u8 = 2;
+
+    /// Create a new instance.
+    pub const fn new() -> Self {
+        Self(AtomicU8::new(Self::INIT))
+    }
+
+    /// Return the current state.
+    fn state(&self) -> State {
+        let state = self.0.load(Ordering::Acquire);
+
+        match state {
+            Self::INIT => State::Init,
+            Self::SINGLE_CORE_MAIN => State::SingleCoreMain,
+            Self::MULTI_CORE_MAIN => State::MultiCoreMain,
+            _ => panic!("Invalid KERNEL_STATE"),
+        }
+    }
+
+    /// Return if the kernel is init state.
+    pub fn is_init(&self) -> bool {
+        self.state() == State::Init
+    }
+
+    /// Transition from Init to SingleCoreMain.
+    pub fn transition_to_single_core_main(&self) {
+        if self
+            .0
+            .compare_exchange(
+                Self::INIT,
+                Self::SINGLE_CORE_MAIN,
+                Ordering::Acquire,
+                Ordering::Relaxed,
+            )
+            .is_err()
+        {
+            panic!("transition_to_single_core_main() called while state != Init");
+        }
+    }
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/synchronization.rs b/15_virtual_mem_part3_precomputed_tables/src/synchronization.rs
new file mode 100644
index 000000000..94582732c
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/synchronization.rs
@@ -0,0 +1,159 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Synchronization primitives.
+//!
+//! # Resources
+//!
+//!   - <https://doc.rust-lang.org/book/ch16-04-extensible-concurrency-sync-and-send.html>
+//!   - <https://stackoverflow.com/questions/59428096/understanding-the-send-trait>
+//!   - <https://doc.rust-lang.org/std/cell/index.html>
+
+use core::cell::UnsafeCell;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Synchronization interfaces.
+pub mod interface {
+
+    /// Any object implementing this trait guarantees exclusive access to the data wrapped within
+    /// the Mutex for the duration of the provided closure.
+    pub trait Mutex {
+        /// The type of the data that is wrapped by this mutex.
+        type Data;
+
+        /// Locks the mutex and grants the closure temporary mutable access to the wrapped data.
+        fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R;
+    }
+
+    /// A reader-writer exclusion type.
+    ///
+    /// The implementing object allows either a number of readers or at most one writer at any point
+    /// in time.
+    pub trait ReadWriteEx {
+        /// The type of encapsulated data.
+        type Data;
+
+        /// Grants temporary mutable access to the encapsulated data.
+        fn write<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R;
+
+        /// Grants temporary immutable access to the encapsulated data.
+        fn read<R>(&self, f: impl FnOnce(&Self::Data) -> R) -> R;
+    }
+}
+
+/// A pseudo-lock for teaching purposes.
+///
+/// In contrast to a real Mutex implementation, does not protect against concurrent access from
+/// other cores to the contained data. This part is preserved for later lessons.
+///
+/// The lock will only be used as long as it is safe to do so, i.e. as long as the kernel is
+/// executing on a single core.
+pub struct IRQSafeNullLock<T>
+where
+    T: ?Sized,
+{
+    data: UnsafeCell<T>,
+}
+
+/// A pseudo-lock that is RW during the single-core kernel init phase and RO afterwards.
+///
+/// Intended to encapsulate data that is populated during kernel init when no concurrency exists.
+pub struct InitStateLock<T>
+where
+    T: ?Sized,
+{
+    data: UnsafeCell<T>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+unsafe impl<T> Send for IRQSafeNullLock<T> where T: ?Sized + Send {}
+unsafe impl<T> Sync for IRQSafeNullLock<T> where T: ?Sized + Send {}
+
+impl<T> IRQSafeNullLock<T> {
+    /// Create an instance.
+    pub const fn new(data: T) -> Self {
+        Self {
+            data: UnsafeCell::new(data),
+        }
+    }
+}
+
+unsafe impl<T> Send for InitStateLock<T> where T: ?Sized + Send {}
+unsafe impl<T> Sync for InitStateLock<T> where T: ?Sized + Send {}
+
+impl<T> InitStateLock<T> {
+    /// Create an instance.
+    pub const fn new(data: T) -> Self {
+        Self {
+            data: UnsafeCell::new(data),
+        }
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use crate::{exception, state};
+
+impl<T> interface::Mutex for IRQSafeNullLock<T> {
+    type Data = T;
+
+    fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
+        // In a real lock, there would be code encapsulating this line that ensures that this
+        // mutable reference will ever only be given out once at a time.
+        let data = unsafe { &mut *self.data.get() };
+
+        // Execute the closure while IRQs are masked.
+        exception::asynchronous::exec_with_irq_masked(|| f(data))
+    }
+}
+
+impl<T> interface::ReadWriteEx for InitStateLock<T> {
+    type Data = T;
+
+    fn write<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
+        assert!(
+            state::state_manager().is_init(),
+            "InitStateLock::write called after kernel init phase"
+        );
+        assert!(
+            !exception::asynchronous::is_local_irq_masked(),
+            "InitStateLock::write called with IRQs unmasked"
+        );
+
+        let data = unsafe { &mut *self.data.get() };
+
+        f(data)
+    }
+
+    fn read<R>(&self, f: impl FnOnce(&Self::Data) -> R) -> R {
+        let data = unsafe { &*self.data.get() };
+
+        f(data)
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// InitStateLock must be transparent.
+    #[kernel_test]
+    fn init_state_lock_is_transparent() {
+        use core::mem::size_of;
+
+        assert_eq!(size_of::<InitStateLock<u64>>(), size_of::<u64>());
+    }
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/time.rs b/15_virtual_mem_part3_precomputed_tables/src/time.rs
new file mode 100644
index 000000000..953b6f0df
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/time.rs
@@ -0,0 +1,37 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Timer primitives.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "_arch/aarch64/time.rs"]
+mod arch_time;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_time::time_manager;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Timekeeping interfaces.
+pub mod interface {
+    use core::time::Duration;
+
+    /// Time management functions.
+    pub trait TimeManager {
+        /// The timer's resolution.
+        fn resolution(&self) -> Duration;
+
+        /// The uptime since power-on of the device.
+        ///
+        /// This includes time consumed by firmware and bootloaders.
+        fn uptime(&self) -> Duration;
+
+        /// Spin for a given duration.
+        fn spin_for(&self, duration: Duration);
+    }
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/test-macros/Cargo.toml b/15_virtual_mem_part3_precomputed_tables/test-macros/Cargo.toml
new file mode 100644
index 000000000..a570f72b4
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/test-macros/Cargo.toml
@@ -0,0 +1,14 @@
+[package]
+name = "test-macros"
+version = "0.1.0"
+authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+edition = "2018"
+
+[lib]
+proc-macro = true
+
+[dependencies]
+proc-macro2 = "1.x"
+quote = "1.x"
+syn = { version = "1.x", features = ["full"] }
+test-types = { path = "../test-types" }
diff --git a/15_virtual_mem_part3_precomputed_tables/test-macros/src/lib.rs b/15_virtual_mem_part3_precomputed_tables/test-macros/src/lib.rs
new file mode 100644
index 000000000..36c95e8a6
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/test-macros/src/lib.rs
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+
+use proc_macro::TokenStream;
+use proc_macro2::Span;
+use quote::quote;
+use syn::{parse_macro_input, Ident, ItemFn};
+
+#[proc_macro_attribute]
+pub fn kernel_test(_attr: TokenStream, input: TokenStream) -> TokenStream {
+    let f = parse_macro_input!(input as ItemFn);
+
+    let test_name = &format!("{}", f.sig.ident.to_string());
+    let test_ident = Ident::new(
+        &format!("{}_TEST_CONTAINER", f.sig.ident.to_string().to_uppercase()),
+        Span::call_site(),
+    );
+    let test_code_block = f.block;
+
+    quote!(
+        #[test_case]
+        const #test_ident: test_types::UnitTest = test_types::UnitTest {
+            name: #test_name,
+            test_func: || #test_code_block,
+        };
+    )
+    .into()
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/test-types/Cargo.toml b/15_virtual_mem_part3_precomputed_tables/test-types/Cargo.toml
new file mode 100644
index 000000000..a0be2c57c
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/test-types/Cargo.toml
@@ -0,0 +1,5 @@
+[package]
+name = "test-types"
+version = "0.1.0"
+authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+edition = "2018"
diff --git a/15_virtual_mem_part3_precomputed_tables/test-types/src/lib.rs b/15_virtual_mem_part3_precomputed_tables/test-types/src/lib.rs
new file mode 100644
index 000000000..fe7d918f5
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/test-types/src/lib.rs
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Types for the `custom_test_frameworks` implementation.
+
+#![no_std]
+
+/// Unit test container.
+pub struct UnitTest {
+    /// Name of the test.
+    pub name: &'static str,
+
+    /// Function pointer to the test.
+    pub test_func: fn(),
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rb b/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rb
new file mode 100644
index 000000000..dfd6b16ea
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rb
@@ -0,0 +1,50 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+
+require 'expect'
+
+TIMEOUT_SECS = 3
+
+# Verify sending and receiving works as expected.
+class TxRxHandshake
+    def name
+        'Transmit and Receive handshake'
+    end
+
+    def run(qemu_out, qemu_in)
+        qemu_in.write_nonblock('ABC')
+        raise('TX/RX test failed') if qemu_out.expect('OK1234', TIMEOUT_SECS).nil?
+    end
+end
+
+# Check for correct TX statistics implementation. Depends on test 1 being run first.
+class TxStatistics
+    def name
+        'Transmit statistics'
+    end
+
+    def run(qemu_out, _qemu_in)
+        raise('chars_written reported wrong') if qemu_out.expect('6', TIMEOUT_SECS).nil?
+    end
+end
+
+# Check for correct RX statistics implementation. Depends on test 1 being run first.
+class RxStatistics
+    def name
+        'Receive statistics'
+    end
+
+    def run(qemu_out, _qemu_in)
+        raise('chars_read reported wrong') if qemu_out.expect('3', TIMEOUT_SECS).nil?
+    end
+end
+
+##--------------------------------------------------------------------------------------------------
+## Test registration
+##--------------------------------------------------------------------------------------------------
+def subtest_collection
+    [TxRxHandshake.new, TxStatistics.new, RxStatistics.new]
+end
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rs b/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rs
new file mode 100644
index 000000000..ad7fd2bf5
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rs
@@ -0,0 +1,35 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Console sanity tests - RX, TX and statistics.
+
+#![feature(format_args_nl)]
+#![no_main]
+#![no_std]
+
+use libkernel::{bsp, console, cpu, exception, print};
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    use bsp::console::console;
+    use console::interface::*;
+
+    exception::handling_init();
+    bsp::console::qemu_bring_up_console();
+
+    // Handshake
+    assert_eq!(console().read_char(), 'A');
+    assert_eq!(console().read_char(), 'B');
+    assert_eq!(console().read_char(), 'C');
+    print!("OK1234");
+
+    // 6
+    print!("{}", console().chars_written());
+
+    // 3
+    print!("{}", console().chars_read());
+
+    // The QEMU process running this test will be closed by the I/O test harness.
+    cpu::wait_forever()
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/01_timer_sanity.rs b/15_virtual_mem_part3_precomputed_tables/tests/01_timer_sanity.rs
new file mode 100644
index 000000000..f39d83845
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/tests/01_timer_sanity.rs
@@ -0,0 +1,49 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Timer sanity tests.
+
+#![feature(custom_test_frameworks)]
+#![no_main]
+#![no_std]
+#![reexport_test_harness_main = "test_main"]
+#![test_runner(libkernel::test_runner)]
+
+use core::time::Duration;
+use libkernel::{bsp, cpu, exception, time, time::interface::TimeManager};
+use test_macros::kernel_test;
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    exception::handling_init();
+    bsp::console::qemu_bring_up_console();
+
+    // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
+
+    test_main();
+
+    cpu::qemu_exit_success()
+}
+
+/// Simple check that the timer is running.
+#[kernel_test]
+fn timer_is_counting() {
+    assert!(time::time_manager().uptime().as_nanos() > 0)
+}
+
+/// Timer resolution must be sufficient.
+#[kernel_test]
+fn timer_resolution_is_sufficient() {
+    assert!(time::time_manager().resolution().as_nanos() < 100)
+}
+
+/// Sanity check spin_for() implementation.
+#[kernel_test]
+fn spin_accuracy_check_1_second() {
+    let t1 = time::time_manager().uptime();
+    time::time_manager().spin_for(Duration::from_secs(1));
+    let t2 = time::time_manager().uptime();
+
+    assert_eq!((t2 - t1).as_secs(), 1)
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs b/15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs
new file mode 100644
index 000000000..6a0c11f3c
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Page faults must result in synchronous exceptions.
+
+#![feature(format_args_nl)]
+#![no_main]
+#![no_std]
+
+/// Overwrites libkernel's `panic_wait::_panic_exit()` so that it returns a "success" code.
+///
+/// In this test, teaching the panic is a success, because it is called from the synchronous
+/// exception handler, which is what this test wants to achieve.
+///
+/// It also means that this integration test can not use any other code that calls panic!() directly
+/// or indirectly.
+mod panic_exit_success;
+
+use libkernel::{bsp, cpu, exception, println};
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    exception::handling_init();
+    bsp::console::qemu_bring_up_console();
+
+    println!("Testing synchronous exception handling by causing a page fault");
+    println!("-------------------------------------------------------------------\n");
+
+    println!("Writing beyond mapped area to address 9 GiB...");
+    let big_addr: u64 = 9 * 1024 * 1024 * 1024;
+    core::ptr::read_volatile(big_addr as *mut u64);
+
+    // If execution reaches here, the memory access above did not cause a page fault exception.
+    cpu::qemu_exit_failure()
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/03_exception_irq_sanity.rs b/15_virtual_mem_part3_precomputed_tables/tests/03_exception_irq_sanity.rs
new file mode 100644
index 000000000..ac25d01a8
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/tests/03_exception_irq_sanity.rs
@@ -0,0 +1,66 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! IRQ handling sanity tests.
+
+#![feature(custom_test_frameworks)]
+#![no_main]
+#![no_std]
+#![reexport_test_harness_main = "test_main"]
+#![test_runner(libkernel::test_runner)]
+
+use libkernel::{bsp, cpu, exception};
+use test_macros::kernel_test;
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    bsp::console::qemu_bring_up_console();
+
+    exception::handling_init();
+    exception::asynchronous::local_irq_unmask();
+
+    test_main();
+
+    cpu::qemu_exit_success()
+}
+
+/// Check that IRQ masking works.
+#[kernel_test]
+fn local_irq_mask_works() {
+    // Precondition: IRQs are unmasked.
+    assert!(exception::asynchronous::is_local_irq_masked());
+
+    unsafe { exception::asynchronous::local_irq_mask() };
+    assert!(!exception::asynchronous::is_local_irq_masked());
+
+    // Restore earlier state.
+    unsafe { exception::asynchronous::local_irq_unmask() };
+}
+
+/// Check that IRQ unmasking works.
+#[kernel_test]
+fn local_irq_unmask_works() {
+    // Precondition: IRQs are masked.
+    unsafe { exception::asynchronous::local_irq_mask() };
+    assert!(!exception::asynchronous::is_local_irq_masked());
+
+    unsafe { exception::asynchronous::local_irq_unmask() };
+    assert!(exception::asynchronous::is_local_irq_masked());
+}
+
+/// Check that IRQ mask save is saving "something".
+#[kernel_test]
+fn local_irq_mask_save_works() {
+    // Precondition: IRQs are unmasked.
+    assert!(exception::asynchronous::is_local_irq_masked());
+
+    let first = unsafe { exception::asynchronous::local_irq_mask_save() };
+    assert!(!exception::asynchronous::is_local_irq_masked());
+
+    let second = unsafe { exception::asynchronous::local_irq_mask_save() };
+    assert_ne!(first, second);
+
+    unsafe { exception::asynchronous::local_irq_restore(first) };
+    assert!(exception::asynchronous::is_local_irq_masked());
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/panic_exit_success/mod.rs b/15_virtual_mem_part3_precomputed_tables/tests/panic_exit_success/mod.rs
new file mode 100644
index 000000000..29d1f9750
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/tests/panic_exit_success/mod.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+
+/// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
+#[no_mangle]
+fn _panic_exit() -> ! {
+    libkernel::cpu::qemu_exit_success()
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/runner.rb b/15_virtual_mem_part3_precomputed_tables/tests/runner.rb
new file mode 100755
index 000000000..53116e088
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/tests/runner.rb
@@ -0,0 +1,143 @@
+#!/usr/bin/env ruby
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+
+require 'English'
+require 'pty'
+
+# Test base class.
+class Test
+    INDENT = '         '
+
+    def print_border(status)
+        puts
+        puts "#{INDENT}-------------------------------------------------------------------"
+        puts status
+        puts "#{INDENT}-------------------------------------------------------------------\n\n\n"
+    end
+
+    def print_error(error)
+        puts
+        print_border("#{INDENT}❌ Failure: #{error}: #{@test_name}")
+    end
+
+    def print_success
+        print_border("#{INDENT}✅ Success: #{@test_name}")
+    end
+
+    def print_output
+        puts "#{INDENT}-------------------------------------------------------------------"
+        print INDENT
+        print '🦀 '
+        print @output.join.gsub("\n", "\n#{INDENT}")
+    end
+
+    def finish(error)
+        print_output
+
+        exit_code = if error
+                        print_error(error)
+                        false
+                    else
+                        print_success
+                        true
+                    end
+
+        exit(exit_code)
+    end
+end
+
+# Executes tests with console I/O.
+class ConsoleTest < Test
+    def initialize(binary, qemu_cmd, test_name, console_subtests)
+        super()
+
+        @binary = binary
+        @qemu_cmd = qemu_cmd
+        @test_name = test_name
+        @console_subtests = console_subtests
+        @cur_subtest = 1
+        @output = ["Running #{@console_subtests.length} console-based tests\n",
+                   "-------------------------------------------------------------------\n\n"]
+    end
+
+    def format_test_name(number, name)
+        formatted_name = "#{number.to_s.rjust(3)}. #{name}"
+        formatted_name.ljust(63, '.')
+    end
+
+    def run_subtest(subtest, qemu_out, qemu_in)
+        @output << format_test_name(@cur_subtest, subtest.name)
+
+        subtest.run(qemu_out, qemu_in)
+
+        @output << "[ok]\n"
+        @cur_subtest += 1
+    end
+
+    def exec
+        error = false
+
+        PTY.spawn(@qemu_cmd) do |qemu_out, qemu_in|
+            begin
+                @console_subtests.each { |t| run_subtest(t, qemu_out, qemu_in) }
+            rescue StandardError => e
+                error = e.message
+            end
+
+            finish(error)
+        end
+    end
+end
+
+# A wrapper around the bare QEMU invocation.
+class RawTest < Test
+    MAX_WAIT_SECS = 5
+
+    def initialize(binary, qemu_cmd, test_name)
+        super()
+
+        @binary = binary
+        @qemu_cmd = qemu_cmd
+        @test_name = test_name
+        @output = []
+    end
+
+    def exec
+        error = 'Timed out waiting for test'
+        io = IO.popen(@qemu_cmd)
+
+        while IO.select([io], nil, nil, MAX_WAIT_SECS)
+            begin
+                @output << io.read_nonblock(1024)
+            rescue EOFError
+                io.close
+                error = $CHILD_STATUS.to_i != 0
+                break
+            end
+        end
+
+        finish(error)
+    end
+end
+
+##--------------------------------------------------------------------------------------------------
+## Script entry point
+##--------------------------------------------------------------------------------------------------
+binary = ARGV.last
+test_name = binary.gsub(%r{.*deps/}, '').split('-')[0]
+console_test_file = "tests/#{test_name}.rb"
+qemu_cmd = ARGV.join(' ')
+
+test_runner = if File.exist?(console_test_file)
+                  load console_test_file
+                  # subtest_collection is provided by console_test_file
+                  ConsoleTest.new(binary, qemu_cmd, test_name, subtest_collection)
+              else
+                  RawTest.new(binary, qemu_cmd, test_name)
+              end
+
+test_runner.exec
diff --git a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb
new file mode 100644
index 000000000..72471b113
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb
@@ -0,0 +1,323 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+# Bitfield manipulation.
+class BitField
+    def initialize
+        @value = 0
+    end
+
+    def self.attr_bitfield(name, offset, num_bits)
+        define_method("#{name}=") do |bits|
+            mask = 2**num_bits - 1
+
+            raise "Input out of range: #{name} = 0x#{bits.to_s(16)}" if (bits & ~mask).positive?
+
+            # Clear bitfield
+            @value &= ~(mask << offset)
+
+            # Set it
+            @value |= (bits << offset)
+        end
+    end
+
+    def to_i
+        @value
+    end
+
+    def size_in_byte
+        8
+    end
+end
+
+# An array class that knows its memory location.
+class CArray < Array
+    attr_reader :phys_start_addr
+
+    def initialize(phys_start_addr, size, &block)
+        @phys_start_addr = phys_start_addr
+
+        super(size, &block)
+    end
+
+    def size_in_byte
+        inject(0) { |sum, n| sum + n.size_in_byte }
+    end
+end
+
+#---------------------------------------------------------------------------------------------------
+# Arch::
+#---------------------------------------------------------------------------------------------------
+module Arch
+FALSE = 0b0
+TRUE = 0b1
+
+#---------------------------------------------------------------------------------------------------
+# Arch::ARMv8
+#---------------------------------------------------------------------------------------------------
+module ARMv8
+# ARMv8 Table Descriptor.
+class Stage1TableDescriptor < BitField
+    module NextLevelTableAddr
+        OFFSET = 16
+        NUMBITS = 32
+    end
+
+    module Type
+        OFFSET = 1
+        NUMBITS = 1
+
+        BLOCK = 0
+        TABLE = 1
+    end
+
+    module Valid
+        OFFSET = 0
+        NUMBITS = 1
+    end
+
+    attr_bitfield(:__next_level_table_addr, NextLevelTableAddr::OFFSET, NextLevelTableAddr::NUMBITS)
+    attr_bitfield(:type, Type::OFFSET, Type::NUMBITS)
+    attr_bitfield(:valid, Valid::OFFSET, Valid::NUMBITS)
+
+    def next_level_table_addr=(addr)
+        addr = addr >> Granule64KiB::SHIFT
+
+        self.__next_level_table_addr = addr
+    end
+
+    private :__next_level_table_addr=
+end
+
+# ARMv8 level 3 page descriptor.
+class Stage1PageDescriptor < BitField
+    module UXN
+        OFFSET = 54
+        NUMBITS = 1
+    end
+
+    module PXN
+        OFFSET = 53
+        NUMBITS = 1
+    end
+
+    module OutputAddr
+        OFFSET = 16
+        NUMBITS = 32
+    end
+
+    module AF
+        OFFSET = 10
+        NUMBITS = 1
+    end
+
+    module SH
+        OFFSET = 8
+        NUMBITS = 2
+
+        INNER_SHAREABLE = 0b11
+    end
+
+    module AP
+        OFFSET = 6
+        NUMBITS = 2
+
+        RW_EL1 = 0b00
+        RO_EL1 = 0b10
+    end
+
+    module AttrIndx
+        OFFSET = 2
+        NUMBITS = 3
+    end
+
+    module Type
+        OFFSET = 1
+        NUMBITS = 1
+
+        RESERVED_INVALID = 0
+        PAGE = 1
+    end
+
+    module Valid
+        OFFSET = 0
+        NUMBITS = 1
+    end
+
+    attr_bitfield(:uxn, UXN::OFFSET, UXN::NUMBITS)
+    attr_bitfield(:pxn, PXN::OFFSET, PXN::NUMBITS)
+    attr_bitfield(:__output_addr, OutputAddr::OFFSET, OutputAddr::NUMBITS)
+    attr_bitfield(:af, AF::OFFSET, AF::NUMBITS)
+    attr_bitfield(:sh, SH::OFFSET, SH::NUMBITS)
+    attr_bitfield(:ap, AP::OFFSET, AP::NUMBITS)
+    attr_bitfield(:attr_indx, AttrIndx::OFFSET, AttrIndx::NUMBITS)
+    attr_bitfield(:type, Type::OFFSET, Type::NUMBITS)
+    attr_bitfield(:valid, Valid::OFFSET, Valid::NUMBITS)
+
+    def output_addr=(addr)
+        addr = addr >> Granule64KiB::SHIFT
+
+        self.__output_addr = addr
+    end
+
+    private :__output_addr=
+end
+
+# Translation table representing the structure defined in translation_table.rs.
+class TranslationTable
+    MMIO_APERTURE_MiB = 256 * 1024 * 1024
+
+    module MAIR
+        NORMAL = 1
+    end
+
+    def initialize
+        @virt_mmio_start_addr = (BSP.kernel_virt_addr_space_size - MMIO_APERTURE_MiB) +
+                                BSP.kernel_virt_start_addr
+
+        do_sanity_checks
+
+        num_lvl2_tables = BSP.kernel_virt_addr_space_size >> Granule512MiB::SHIFT
+
+        @lvl3 = new_lvl3(num_lvl2_tables, BSP.phys_table_struct_start_addr)
+
+        @lvl2_phys_start_addr = @lvl3.phys_start_addr + @lvl3.size_in_byte
+        @lvl2 = new_lvl2(num_lvl2_tables, @lvl2_phys_start_addr)
+
+        populate_lvl2_entries
+    end
+
+    def map_pages_at(virt_pages, phys_pages, attributes)
+        return if virt_pages.empty?
+
+        raise if virt_pages.size != phys_pages.size
+        raise if phys_pages.last > BSP.phys_addr_space_end_page
+
+        virt_pages.zip(phys_pages).each do |virt_page, phys_page|
+            desc = page_descriptor_from(virt_page)
+            set_lvl3_entry(desc, phys_page, attributes)
+        end
+    end
+
+    def to_binary
+        data = @lvl3.flatten.map(&:to_i) + @lvl2.map(&:to_i)
+        data.pack('Q<*') # "Q" == uint64_t, "<" == little endian
+    end
+
+    def phys_tables_base_addr_binary
+        [@lvl2_phys_start_addr].pack('Q<*') # "Q" == uint64_t, "<" == little endian
+    end
+
+    def phys_tables_base_addr
+        @lvl2_phys_start_addr
+    end
+
+    private
+
+    def binary_with_mmio_clash?
+        BSP.rw_end_exclusive >= @virt_mmio_start_addr
+    end
+
+    def do_sanity_checks
+        raise unless BSP.kernel_granule::SIZE == Granule64KiB::SIZE
+        raise unless (BSP.kernel_virt_addr_space_size % Granule512MiB::SIZE).zero?
+
+        # Need to ensure that that the kernel binary does not clash with the upmost 256 MiB of the
+        # virtual address space, which is reserved for runtime-remapping of MMIO.
+        return unless binary_with_mmio_clash?
+
+        puts format('__data_end_exclusive: 0x%16x', BSP.data_end_exclusive)
+        puts format('MMIO start:           0x%16x', @virt_mmio_start_addr)
+
+        raise 'Kernel virtual addresses clash with 256 MiB MMIO window'
+    end
+
+    def new_lvl3(num_lvl2_tables, start_addr)
+        CArray.new(start_addr, num_lvl2_tables) do
+            temp = CArray.new(start_addr, 8192) do
+                Stage1PageDescriptor.new
+            end
+            start_addr += temp.size_in_byte
+
+            temp
+        end
+    end
+
+    def new_lvl2(num_lvl2_tables, start_addr)
+        CArray.new(start_addr, num_lvl2_tables) do
+            Stage1TableDescriptor.new
+        end
+    end
+
+    def populate_lvl2_entries
+        @lvl2.each_with_index do |descriptor, i|
+            descriptor.next_level_table_addr = @lvl3[i].phys_start_addr
+            descriptor.type = Stage1TableDescriptor::Type::TABLE
+            descriptor.valid = TRUE
+        end
+    end
+
+    def lvl2_lvl3_index_from(addr)
+        addr -= BSP.kernel_virt_start_addr
+
+        lvl2_index = addr >> Granule512MiB::SHIFT
+        lvl3_index = (addr & Granule512MiB::MASK) >> Granule64KiB::SHIFT
+
+        raise unless lvl2_index < @lvl2.size
+
+        [lvl2_index, lvl3_index]
+    end
+
+    def page_descriptor_from(virt_addr)
+        lvl2_index, lvl3_index = lvl2_lvl3_index_from(virt_addr)
+
+        @lvl3[lvl2_index][lvl3_index]
+    end
+
+    # rubocop:disable Metrics/MethodLength
+    def set_attributes(desc, attributes)
+        case attributes.mem_attributes
+        when :CacheableDRAM
+            desc.sh = Stage1PageDescriptor::SH::INNER_SHAREABLE
+            desc.attr_indx = MAIR::NORMAL
+        else
+            raise 'Invalid input'
+        end
+
+        desc.ap = case attributes.acc_perms
+                  when :ReadOnly
+                      Stage1PageDescriptor::AP::RO_EL1
+                  when :ReadWrite
+                      Stage1PageDescriptor::AP::RW_EL1
+                  else
+                      raise 'Invalid input'
+
+                  end
+
+        desc.pxn = case attributes.execute_never
+                   when :XN
+                       TRUE
+                   when :X
+                       FALSE
+                   else
+                       raise 'Invalid input'
+                   end
+
+        desc.uxn = TRUE
+    end
+    # rubocop:enable Metrics/MethodLength
+
+    def set_lvl3_entry(desc, output_addr, attributes)
+        desc.output_addr = output_addr
+        desc.af = TRUE
+        desc.type = Stage1PageDescriptor::Type::PAGE
+        desc.valid = TRUE
+
+        set_attributes(desc, attributes)
+    end
+end
+end
+end
diff --git a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/bsp.rb b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/bsp.rb
new file mode 100644
index 000000000..6acafe984
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/bsp.rb
@@ -0,0 +1,177 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+# Raspberry Pi 3 + 4
+class RaspberryPi
+    attr_reader :kernel_granule, :kernel_virt_addr_space_size, :kernel_virt_start_addr
+
+    NM_BINARY = 'aarch64-none-elf-nm'
+    READELF_BINARY = 'aarch64-none-elf-readelf'
+    MEMORY_SRC = File.read('src/bsp/raspberrypi/memory.rs').split("\n")
+
+    def initialize(kernel_elf)
+        @kernel_granule = Granule64KiB
+
+        @virt_addresses = {
+            boot_core_stack_start: /__boot_core_stack_start/,
+            boot_core_stack_end_exclusive: /__boot_core_stack_end_exclusive/,
+
+            rx_start: /__rx_start/,
+            rx_end_exclusive: /__rx_end_exclusive/,
+
+            rw_start: /__rw_start/,
+            rw_end_exclusive: /__rw_end_exclusive/,
+
+            table_struct_start_addr: /bsp::.*::memory::mmu::KERNEL_TABLES/,
+            phys_tables_base_addr: /PHYS_KERNEL_TABLES_BASE_ADDR/
+        }
+
+        symbols = `#{NM_BINARY} --demangle #{kernel_elf}`.split("\n")
+        @kernel_virt_addr_space_size = parse_from_symbols(symbols, /__kernel_virt_addr_space_size/)
+        @kernel_virt_start_addr = 0
+        @virt_addresses = parse_from_symbols(symbols, @virt_addresses)
+        @phys_addresses = virt_to_phys(@virt_addresses)
+
+        @descriptors = parse_descriptors
+        update_max_descriptor_name_length
+
+        @text_section_offset_in_elf = parse_text_section_offset_in_elf(kernel_elf)
+    end
+
+    def rw_end_exclusive
+        @virt_addresses[:rw_end_exclusive]
+    end
+
+    def phys_table_struct_start_addr
+        @phys_addresses[:table_struct_start_addr]
+    end
+
+    def table_struct_offset_in_kernel_elf
+        (@virt_addresses[:table_struct_start_addr] - @virt_addresses[:rx_start]) +
+            @text_section_offset_in_elf
+    end
+
+    def phys_tables_base_addr
+        @phys_addresses[:phys_tables_base_addr]
+    end
+
+    def phys_tables_base_addr_offset_in_kernel_elf
+        (@virt_addresses[:phys_tables_base_addr] - @virt_addresses[:rx_start]) +
+            @text_section_offset_in_elf
+    end
+
+    def phys_addr_space_end_page
+        x = MEMORY_SRC.grep(/pub const END/)
+        x = case BSP_TYPE
+            when :rpi3
+                x[0]
+            when :rpi4
+                x[1]
+            else
+                raise
+            end
+
+        x.scan(/\d+/).join.to_i(16)
+    end
+
+    def kernel_map_binary
+        MappingDescriptor.print_header
+
+        @descriptors.each do |i|
+            print 'Generating'.rjust(12).green.bold
+            print ' '
+            puts i.to_s
+
+            TRANSLATION_TABLES.map_pages_at(i.virt_pages, i.phys_pages, i.attributes)
+        end
+
+        MappingDescriptor.print_divider
+    end
+
+    private
+
+    def parse_from_symbols(symbols, input)
+        case input.class.to_s
+        when 'Regexp'
+            symbols.grep(input).first.split.first.to_i(16)
+        when 'Hash'
+            input.transform_values do |val|
+                symbols.grep(val).first.split.first.to_i(16)
+            end
+        else
+            raise
+        end
+    end
+
+    def parse_text_section_offset_in_elf(kernel_elf)
+        `#{READELF_BINARY} --sections #{kernel_elf}`.scan(/.text.*/).first.split.last.to_i(16)
+    end
+
+    def virt_to_phys(input)
+        case input.class.to_s
+        when 'Integer'
+            input - @kernel_virt_start_addr
+        when 'Hash'
+            input.transform_values do |val|
+                val - @kernel_virt_start_addr
+            end
+        else
+            raise
+        end
+    end
+
+    def descriptor_ro
+        name = 'Code and RO data'
+
+        ro_size = @virt_addresses[:rx_end_exclusive] -
+                  @virt_addresses[:rx_start]
+
+        virt_ro_pages = PageArray.new(@virt_addresses[:rx_start], ro_size, @kernel_granule::SIZE)
+        phys_ro_pages = PageArray.new(@phys_addresses[:rx_start], ro_size, @kernel_granule::SIZE)
+        ro_attribues = AttributeFields.new(:CacheableDRAM, :ReadOnly, :X)
+
+        MappingDescriptor.new(name, virt_ro_pages, phys_ro_pages, ro_attribues)
+    end
+
+    def descriptor_data
+        name = 'Data and bss'
+
+        data_size = @virt_addresses[:rw_end_exclusive] -
+                    @virt_addresses[:rw_start]
+
+        virt_data_pages = PageArray.new(@virt_addresses[:rw_start], data_size,
+                                        @kernel_granule::SIZE)
+        phys_data_pages = PageArray.new(@phys_addresses[:rw_start], data_size,
+                                        @kernel_granule::SIZE)
+        data_attribues = AttributeFields.new(:CacheableDRAM, :ReadWrite, :XN)
+
+        MappingDescriptor.new(name, virt_data_pages, phys_data_pages, data_attribues)
+    end
+
+    def descriptor_boot_core_stack
+        name = 'Boot-core stack'
+
+        boot_core_stack_size = @virt_addresses[:boot_core_stack_end_exclusive] -
+                               @virt_addresses[:boot_core_stack_start]
+
+        virt_boot_core_stack_pages = PageArray.new(@virt_addresses[:boot_core_stack_start],
+                                                   boot_core_stack_size, @kernel_granule::SIZE)
+        phys_boot_core_stack_pages = PageArray.new(@phys_addresses[:boot_core_stack_start],
+                                                   boot_core_stack_size, @kernel_granule::SIZE)
+        boot_core_stack_attribues = AttributeFields.new(:CacheableDRAM, :ReadWrite, :XN)
+
+        MappingDescriptor.new(name, virt_boot_core_stack_pages, phys_boot_core_stack_pages,
+                              boot_core_stack_attribues)
+    end
+
+    def parse_descriptors
+        [descriptor_ro, descriptor_data, descriptor_boot_core_stack]
+    end
+
+    def update_max_descriptor_name_length
+        MappingDescriptor.max_descriptor_name_length = @descriptors.map { |i| i.name.size }.max
+    end
+end
diff --git a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/generic.rb b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/generic.rb
new file mode 100644
index 000000000..2ab666afb
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/generic.rb
@@ -0,0 +1,125 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+module Granule64KiB
+    SIZE = 64 * 1024
+    SHIFT = Math.log2(SIZE).to_i
+end
+
+module Granule512MiB
+    SIZE = 512 * 1024 * 1024
+    SHIFT = Math.log2(SIZE).to_i
+    MASK = SIZE - 1
+end
+
+# Monkey-patch Integer with some helper functions.
+class Integer
+    def power_of_two?
+        self[0].zero?
+    end
+
+    def aligned?(alignment)
+        raise unless alignment.power_of_two?
+
+        (self & (alignment - 1)).zero?
+    end
+
+    def to_hex_underscore(with_leading_zeros: false)
+        fmt = with_leading_zeros ? '%016x' : '%x'
+        value = format(fmt, self).to_s.reverse.scan(/.{4}|.+/).join('_').reverse
+
+        format('0x%s', value)
+    end
+end
+
+# An array where each value is the start address of a Page.
+class PageArray < Array
+    def initialize(start_addr, size, granule_size)
+        raise unless start_addr.aligned?(granule_size)
+        raise unless size.positive?
+        raise unless (size % granule_size).zero?
+
+        num_pages = size / granule_size
+        super(num_pages) do |i|
+            i * granule_size + start_addr
+        end
+    end
+end
+
+# Collection of memory attributes.
+class AttributeFields
+    attr_reader :mem_attributes, :acc_perms, :execute_never
+
+    def initialize(mem_attributes, acc_perms, execute_never)
+        @mem_attributes = mem_attributes
+        @acc_perms = acc_perms
+        @execute_never = execute_never
+    end
+end
+
+# A container that describes a one- or many-page virt-to-phys mapping.
+class MappingDescriptor
+    @max_descriptor_name_length = 0
+
+    class << self
+        attr_accessor :max_descriptor_name_length
+    end
+
+    attr_reader :name, :virt_pages, :phys_pages, :attributes
+
+    def initialize(name, virt_pages, phys_pages, attributes)
+        @name = name
+        @virt_pages = virt_pages
+        @phys_pages = phys_pages
+        @attributes = attributes
+    end
+
+    def to_s
+        name = @name.ljust(self.class.max_descriptor_name_length)
+        virt_start = @virt_pages.first.to_hex_underscore(with_leading_zeros: true)
+        size = ((@virt_pages.size * 65_536) / 1024).to_s.rjust(3)
+
+        "#{name} | #{virt_start} | #{size} KiB"
+    end
+
+    def self.print_divider
+        print '             '
+        print '-' * max_descriptor_name_length
+        puts '----------------------------------'
+    end
+
+    def self.print_header
+        print_divider
+        print '             '
+        print 'Section'.center(max_descriptor_name_length)
+        print '   '
+        print 'Start Virt Addr'.center(21)
+        print '   '
+        print 'Size'.center(7)
+        puts
+        print_divider
+    end
+end
+
+def kernel_patch_tables(kernel_binary)
+    print 'Patching'.rjust(12).green.bold
+    print ' Kernel table struct at physical '
+    puts BSP.phys_table_struct_start_addr.to_hex_underscore
+
+    IO.binwrite(kernel_binary, TRANSLATION_TABLES.to_binary,
+                BSP.table_struct_offset_in_kernel_elf)
+end
+
+def kernel_patch_base_addr(kernel_binary)
+    print 'Patching'.rjust(12).green.bold
+    print ' Value of kernel table physical base address ('
+    print TRANSLATION_TABLES.phys_tables_base_addr.to_hex_underscore
+    print ') at physical '
+    puts BSP.phys_tables_base_addr.to_hex_underscore
+
+    IO.binwrite(kernel_binary, TRANSLATION_TABLES.phys_tables_base_addr_binary,
+                BSP.phys_tables_base_addr_offset_in_kernel_elf)
+end
diff --git a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/main.rb b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/main.rb
new file mode 100755
index 000000000..5200a4858
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/main.rb
@@ -0,0 +1,47 @@
+#!/usr/bin/env ruby
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+TARGET = ARGV[0].split('-').first.to_sym
+BSP_TYPE = ARGV[1].to_sym
+kernel_elf = ARGV[2]
+
+require 'rubygems'
+require 'bundler/setup'
+require 'colorize'
+
+require_relative 'generic'
+require_relative 'bsp'
+require_relative 'arch'
+
+puts
+puts 'Precomputing kernel translation tables and patching kernel ELF'.cyan
+
+start = Time.now
+
+BSP = case BSP_TYPE
+      when :rpi3, :rpi4
+          RaspberryPi.new(kernel_elf)
+      else
+          raise
+      end
+
+TRANSLATION_TABLES = case TARGET
+                     when :aarch64
+                         Arch::ARMv8::TranslationTable.new
+                     else
+                         raise
+                     end
+
+BSP.kernel_map_binary
+
+kernel_patch_tables(kernel_elf)
+kernel_patch_base_addr(kernel_elf)
+
+elapsed = Time.now - start
+
+print 'Finished'.rjust(12).green.bold
+puts " in #{elapsed.round(2)}s"

From 7fee5f7114d9450bb7dc15b5bb9d9fa4880f9a25 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Tue, 30 Mar 2021 22:55:06 +0200
Subject: [PATCH 052/214] fix typo

---
 15_virtual_mem_part3_precomputed_tables/README.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index 8de51b1bb..f83ff5b4e 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -433,7 +433,7 @@ attractive either, because writing larger pieces of assembly is an error-prone a
 Fortunately, there is a third way. We are writing an embedded kernel, and therefore the execution
 environment is way more static and deterministic as compared to a general-purpose kernel that can be
 deployed on a wide variety of targets. Specifically, for the Raspberrypi, we exactly know the **load
-address** of the kernel in advance, and we know about the capabilites of the `MMU`. So there is
+address** of the kernel in advance, and we know about the capabilities of the `MMU`. So there is
 nothing stopping us from precomputing the kernel's translation tables ahead of time.
 
 A disadvantage of this approach is an increased binary size, but this is not a deal breaker in our

From b4e3ebc606a211ce1a07d2b51aeeb6245cf7091d Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Tue, 30 Mar 2021 23:04:37 +0200
Subject: [PATCH 053/214] Add tutorial 16

---
 .rubocop.yml                                  |   3 +
 .../.cargo/config.toml                        |   2 +
 .../.vscode/settings.json                     |   7 +
 .../Cargo.lock                                |  93 +++
 .../Cargo.toml                                |  55 ++
 .../Makefile                                  | 193 ++++++
 .../README.md                                 | 634 ++++++++++++++++++
 .../build.rs                                  |   8 +
 .../src/_arch/aarch64/cpu.rs                  |  49 ++
 .../src/_arch/aarch64/cpu/boot.rs             |  97 +++
 .../src/_arch/aarch64/cpu/boot.s              |  87 +++
 .../src/_arch/aarch64/cpu/smp.rs              |  29 +
 .../src/_arch/aarch64/exception.rs            | 281 ++++++++
 .../src/_arch/aarch64/exception.s             | 148 ++++
 .../_arch/aarch64/exception/asynchronous.rs   | 150 +++++
 .../src/_arch/aarch64/memory/mmu.rs           | 184 +++++
 .../aarch64/memory/mmu/translation_table.rs   | 505 ++++++++++++++
 .../src/_arch/aarch64/time.rs                 | 118 ++++
 .../src/bsp.rs                                |  13 +
 .../src/bsp/device_driver.rs                  |  16 +
 .../src/bsp/device_driver/arm.rs              |   9 +
 .../src/bsp/device_driver/arm/gicv2.rs        | 248 +++++++
 .../src/bsp/device_driver/arm/gicv2/gicc.rs   | 152 +++++
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   | 205 ++++++
 .../src/bsp/device_driver/bcm.rs              |  15 +
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs | 255 +++++++
 .../bcm/bcm2xxx_interrupt_controller.rs       | 138 ++++
 .../peripheral_ic.rs                          | 188 ++++++
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   | 537 +++++++++++++++
 .../src/bsp/device_driver/common.rs           |  38 ++
 .../src/bsp/raspberrypi.rs                    |  62 ++
 .../src/bsp/raspberrypi/console.rs            |  88 +++
 .../src/bsp/raspberrypi/cpu.rs                |  14 +
 .../src/bsp/raspberrypi/driver.rs             |  61 ++
 .../src/bsp/raspberrypi/exception.rs          |   7 +
 .../bsp/raspberrypi/exception/asynchronous.rs |  36 +
 .../kernel_virt_addr_space_size.ld            |   1 +
 .../src/bsp/raspberrypi/link.ld               |  87 +++
 .../src/bsp/raspberrypi/memory.rs             | 208 ++++++
 .../src/bsp/raspberrypi/memory/mmu.rs         | 187 ++++++
 .../src/common.rs                             |  21 +
 .../src/console.rs                            |  53 ++
 .../src/cpu.rs                                |  21 +
 .../src/cpu/boot.rs                           |   9 +
 .../src/cpu/smp.rs                            |  14 +
 .../src/driver.rs                             |  62 ++
 .../src/exception.rs                          |  48 ++
 .../src/exception/asynchronous.rs             | 152 +++++
 .../src/lib.rs                                | 176 +++++
 .../src/main.rs                               | 105 +++
 .../src/memory.rs                             | 202 ++++++
 .../src/memory/mmu.rs                         | 270 ++++++++
 .../src/memory/mmu/mapping_record.rs          | 221 ++++++
 .../src/memory/mmu/translation_table.rs       | 109 +++
 .../src/memory/mmu/types.rs                   | 217 ++++++
 .../src/panic_wait.rs                         |  58 ++
 .../src/print.rs                              | 106 +++
 .../src/runtime_init.rs                       |  41 ++
 .../src/state.rs                              |  92 +++
 .../src/synchronization.rs                    | 159 +++++
 .../src/time.rs                               |  37 +
 .../test-macros/Cargo.toml                    |  14 +
 .../test-macros/src/lib.rs                    |  29 +
 .../test-types/Cargo.toml                     |   5 +
 .../test-types/src/lib.rs                     |  16 +
 .../tests/00_console_sanity.rb                |  50 ++
 .../tests/00_console_sanity.rs                |  35 +
 .../tests/01_timer_sanity.rs                  |  49 ++
 .../tests/02_exception_sync_page_fault.rs     |  36 +
 .../tests/03_exception_irq_sanity.rs          |  66 ++
 .../tests/panic_exit_success/mod.rs           |   9 +
 .../tests/runner.rb                           | 143 ++++
 .../translation_table_tool/arch.rb            | 323 +++++++++
 .../translation_table_tool/bsp.rb             | 177 +++++
 .../translation_table_tool/generic.rb         | 125 ++++
 .../translation_table_tool/main.rb            |  47 ++
 76 files changed, 8505 insertions(+)
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/.cargo/config.toml
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/.vscode/settings.json
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/Cargo.lock
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/Cargo.toml
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/Makefile
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/README.md
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/build.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.s
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/smp.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.s
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception/asynchronous.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/time.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/bsp.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/common.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/console.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/cpu.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/driver.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/exception.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/exception/asynchronous.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/link.ld
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/common.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/console.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/cpu.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/cpu/boot.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/cpu/smp.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/driver.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/exception.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/exception/asynchronous.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/lib.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/main.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/memory.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/mapping_record.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/translation_table.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/types.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/panic_wait.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/print.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/runtime_init.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/state.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/synchronization.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/time.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/test-macros/Cargo.toml
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/test-macros/src/lib.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/test-types/Cargo.toml
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/test-types/src/lib.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rb
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/tests/01_timer_sanity.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/tests/03_exception_irq_sanity.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/tests/panic_exit_success/mod.rs
 create mode 100755 16_virtual_mem_part4_higher_half_kernel/tests/runner.rb
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/translation_table_tool/arch.rb
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/translation_table_tool/bsp.rb
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/translation_table_tool/generic.rb
 create mode 100755 16_virtual_mem_part4_higher_half_kernel/translation_table_tool/main.rb

diff --git a/.rubocop.yml b/.rubocop.yml
index a1687fd16..d61571d60 100644
--- a/.rubocop.yml
+++ b/.rubocop.yml
@@ -16,6 +16,9 @@ Layout/IndentationWidth:
 Layout/LineLength:
   Max: 100
 
+Lint/DeprecatedConstants:
+  Enabled: false
+
 Metrics/ClassLength:
   Enabled: false
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/.cargo/config.toml b/16_virtual_mem_part4_higher_half_kernel/.cargo/config.toml
new file mode 100644
index 000000000..e34764853
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/.cargo/config.toml
@@ -0,0 +1,2 @@
+[target.'cfg(target_os = "none")']
+runner = "target/kernel_test_runner.sh"
diff --git a/16_virtual_mem_part4_higher_half_kernel/.vscode/settings.json b/16_virtual_mem_part4_higher_half_kernel/.vscode/settings.json
new file mode 100644
index 000000000..a0d6a9202
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/.vscode/settings.json
@@ -0,0 +1,7 @@
+{
+  "editor.formatOnSave": true,
+  "editor.rulers": [100],
+  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
+  "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
+  "rust-analyzer.cargo.features": ["bsp_rpi3"]
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
new file mode 100644
index 000000000..069559203
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
@@ -0,0 +1,93 @@
+# This file is automatically @generated by Cargo.
+# It is not intended for manual editing.
+version = 3
+
+[[package]]
+name = "cortex-a"
+version = "5.1.6"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "ecefc30975eb87afc5a810d4b2305c0ec29e607ea97e51b2ecd80766e9268d28"
+dependencies = [
+ "register",
+]
+
+[[package]]
+name = "kernel"
+version = "0.1.0"
+dependencies = [
+ "cortex-a",
+ "qemu-exit",
+ "register",
+ "test-macros",
+ "test-types",
+]
+
+[[package]]
+name = "proc-macro2"
+version = "1.0.24"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "1e0704ee1a7e00d7bb417d0770ea303c1bccbabf0ef1667dae92b5967f5f8a71"
+dependencies = [
+ "unicode-xid",
+]
+
+[[package]]
+name = "qemu-exit"
+version = "1.0.2"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "702abe3c3255be20a4d67bda326c4117081a49a57afaf752de4845091bc6b476"
+
+[[package]]
+name = "quote"
+version = "1.0.9"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "c3d0b9745dc2debf507c8422de05d7226cc1f0644216dfdfead988f9b1ab32a7"
+dependencies = [
+ "proc-macro2",
+]
+
+[[package]]
+name = "register"
+version = "1.0.2"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "f4a247de29ab7cc8f5006cfe775c4a81c704f9914c5e2a79696862e643135433"
+dependencies = [
+ "tock-registers",
+]
+
+[[package]]
+name = "syn"
+version = "1.0.62"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "123a78a3596b24fee53a6464ce52d8ecbf62241e6294c7e7fe12086cd161f512"
+dependencies = [
+ "proc-macro2",
+ "quote",
+ "unicode-xid",
+]
+
+[[package]]
+name = "test-macros"
+version = "0.1.0"
+dependencies = [
+ "proc-macro2",
+ "quote",
+ "syn",
+ "test-types",
+]
+
+[[package]]
+name = "test-types"
+version = "0.1.0"
+
+[[package]]
+name = "tock-registers"
+version = "0.6.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "f521a79accce68c417c9c77ce22108056b626126da1932f7e2e9b5bbffee0cea"
+
+[[package]]
+name = "unicode-xid"
+version = "0.2.1"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "f7fe0bb3479651439c9112f72b6c505038574c9fbb575ed1bf3b797fa39dd564"
diff --git a/16_virtual_mem_part4_higher_half_kernel/Cargo.toml b/16_virtual_mem_part4_higher_half_kernel/Cargo.toml
new file mode 100644
index 000000000..206dfc878
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/Cargo.toml
@@ -0,0 +1,55 @@
+[package]
+name = "kernel"
+version = "0.1.0"
+authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+edition = "2018"
+
+[profile.release]
+lto = true
+
+[features]
+default = []
+bsp_rpi3 = ["register"]
+bsp_rpi4 = ["register"]
+test_build = ["qemu-exit"]
+
+##--------------------------------------------------------------------------------------------------
+## Dependencies
+##--------------------------------------------------------------------------------------------------
+
+[dependencies]
+test-types = { path = "test-types" }
+
+# Optional dependencies
+register = { version = "1.x.x", features = ["no_std_unit_tests"], optional = true }
+qemu-exit = { version = "1.x.x", optional = true }
+
+# Platform specific dependencies
+[target.'cfg(target_arch = "aarch64")'.dependencies]
+cortex-a = { version = "5.x.x" }
+
+##--------------------------------------------------------------------------------------------------
+## Testing
+##--------------------------------------------------------------------------------------------------
+
+[dev-dependencies]
+test-macros = { path = "test-macros" }
+
+# Unit tests are done in the library part of the kernel.
+[lib]
+name = "libkernel"
+test = true
+
+# Disable unit tests for the kernel binary.
+[[bin]]
+name = "kernel"
+test = false
+
+# List of tests without harness.
+[[test]]
+name = "00_console_sanity"
+harness = false
+
+[[test]]
+name = "02_exception_sync_page_fault"
+harness = false
diff --git a/16_virtual_mem_part4_higher_half_kernel/Makefile b/16_virtual_mem_part4_higher_half_kernel/Makefile
new file mode 100644
index 000000000..feb65cef7
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/Makefile
@@ -0,0 +1,193 @@
+## SPDX-License-Identifier: MIT OR Apache-2.0
+##
+## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+include ../utils/color.mk.in
+
+# Default to the RPi3
+BSP ?= rpi3
+
+# Default to a serial device name that is common in Linux.
+DEV_SERIAL ?= /dev/ttyUSB0
+
+# Query the host system's kernel name
+UNAME_S = $(shell uname -s)
+
+# BSP-specific arguments
+ifeq ($(BSP),rpi3)
+    TARGET            = aarch64-unknown-none-softfloat
+    KERNEL_BIN        = kernel8.img
+    QEMU_BINARY       = qemu-system-aarch64
+    QEMU_MACHINE_TYPE = raspi3
+    QEMU_RELEASE_ARGS = -serial stdio -display none
+    QEMU_TEST_ARGS    = $(QEMU_RELEASE_ARGS) -semihosting
+    OBJDUMP_BINARY    = aarch64-none-elf-objdump
+    NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
+    OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
+    JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
+    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
+else ifeq ($(BSP),rpi4)
+    TARGET            = aarch64-unknown-none-softfloat
+    KERNEL_BIN        = kernel8.img
+    QEMU_BINARY       = qemu-system-aarch64
+    QEMU_MACHINE_TYPE =
+    QEMU_RELEASE_ARGS = -serial stdio -display none
+    QEMU_TEST_ARGS    = $(QEMU_RELEASE_ARGS) -semihosting
+    OBJDUMP_BINARY    = aarch64-none-elf-objdump
+    NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
+    OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
+    JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
+    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
+endif
+
+# Export for build.rs
+export LINKER_FILE
+
+# Testing-specific arguments
+ifdef TEST
+    ifeq ($(TEST),unit)
+        TEST_ARG = --lib
+    else
+        TEST_ARG = --test $(TEST)
+    endif
+endif
+
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+
+RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
+RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
+
+FEATURES      = --features bsp_$(BSP)
+COMPILER_ARGS = --target=$(TARGET) \
+    $(FEATURES)                    \
+    --release
+
+RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
+DOC_CMD     = cargo doc $(COMPILER_ARGS)
+CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
+CHECK_CMD   = cargo check $(COMPILER_ARGS)
+TEST_CMD    = cargo test $(COMPILER_ARGS)
+OBJCOPY_CMD = rust-objcopy \
+    --strip-all            \
+    -O binary
+
+KERNEL_ELF = target/$(TARGET)/release/kernel
+
+DOCKER_IMAGE         = rustembedded/osdev-utils
+DOCKER_CMD           = docker run --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
+DOCKER_CMD_INTERACT  = $(DOCKER_CMD) -i -t
+DOCKER_ARG_DIR_UTILS = -v $(shell pwd)/../utils:/work/utils
+DOCKER_ARG_DIR_JTAG  = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
+DOCKER_ARG_DEV       = --privileged -v /dev:/dev
+DOCKER_ARG_NET       = --network host
+
+DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
+DOCKER_GDB   = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
+DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+
+# Dockerize commands that require USB device passthrough only on Linux
+ifeq ($(UNAME_S),Linux)
+    DOCKER_CMD_DEV = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DEV)
+
+    DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_IMAGE)
+    DOCKER_JTAGBOOT  = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_ARG_DIR_JTAG) $(DOCKER_IMAGE)
+    DOCKER_OPENOCD   = $(DOCKER_CMD_DEV) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
+else
+    DOCKER_OPENOCD   = echo "Not yet supported on non-Linux systems."; \#
+endif
+
+EXEC_QEMU     = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
+EXEC_MINIPUSH = ruby ../utils/minipush.rb
+
+.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu test chainboot jtagboot openocd gdb gdb-opt0 \
+    clippy clean readelf objdump nm check
+
+all: $(KERNEL_BIN)
+
+$(KERNEL_ELF):
+	$(call colorecho, "\nCompiling kernel - $(BSP)")
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
+	@$(DOCKER_TOOLS) ruby translation_table_tool/main.rb $(TARGET) $(BSP) $(KERNEL_ELF)
+
+$(KERNEL_BIN): $(KERNEL_ELF)
+	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
+
+doc:
+	$(call colorecho, "\nGenerating docs")
+	@$(DOC_CMD) --document-private-items --open
+
+ifeq ($(QEMU_MACHINE_TYPE),)
+qemu test:
+	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+else
+qemu: $(KERNEL_BIN)
+	$(call colorecho, "\nLaunching QEMU")
+	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
+
+define KERNEL_TEST_RUNNER
+    #!/usr/bin/env bash
+
+    TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
+    TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
+
+    $(DOCKER_TOOLS) ruby translation_table_tool/main.rb $(TARGET) $(BSP) $$TEST_ELF > /dev/null
+    $(OBJCOPY_CMD) $$TEST_ELF $$TEST_BINARY
+    $(DOCKER_TEST) ruby tests/runner.rb $(EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
+endef
+
+export KERNEL_TEST_RUNNER
+test: FEATURES += --features test_build
+test:
+	$(call colorecho, "\nCompiling test(s) - $(BSP)")
+	@mkdir -p target
+	@echo "$$KERNEL_TEST_RUNNER" > target/kernel_test_runner.sh
+	@chmod +x target/kernel_test_runner.sh
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) $(TEST_ARG)
+endif
+
+chainboot: $(KERNEL_BIN)
+	@$(DOCKER_CHAINBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(KERNEL_BIN)
+
+jtagboot:
+	@$(DOCKER_JTAGBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(JTAG_BOOT_IMAGE)
+
+openocd:
+	$(call colorecho, "\nLaunching OpenOCD")
+	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
+
+gdb: RUSTC_MISC_ARGS += -C debuginfo=2
+gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
+gdb gdb-opt0: $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching GDB")
+	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
+
+clippy:
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
+
+clean:
+	rm -rf target $(KERNEL_BIN)
+
+readelf: $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching readelf")
+	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
+
+objdump: $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching objdump")
+	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
+                --section .text   \
+                --section .rodata \
+                --section .got    \
+                $(KERNEL_ELF) | rustfilt
+
+nm: $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching nm")
+	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
+
+# For rust-analyzer
+check:
+	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
diff --git a/16_virtual_mem_part4_higher_half_kernel/README.md b/16_virtual_mem_part4_higher_half_kernel/README.md
new file mode 100644
index 000000000..ddce63fc5
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/README.md
@@ -0,0 +1,634 @@
+# Tutorial 16 - Virtual Memory Part 4: Higher-Half Kernel
+
+## tl;dr
+
+- The time has come: We map and run the kernel from the top of the 64 bit virtual address space! 🥳
+
+## Table of Contents
+
+- [Introduction](#introduction)
+- [Implementation](#implementation)
+  - [Position-Independent Boot Code](#position-independent-boot-code)
+- [Test it](#test-it)
+- [Diff to previous](#diff-to-previous)
+
+## Introduction
+
+A long time in the making, in this tutorial we finally map the kernel to the most significant area
+(alternatively: higher-half) of the 64 bit virtual address space. This makes room for future
+applications to use the whole of the least significant area of the virtual memory space.
+
+As has been teased since `tutorial 14`, we will make use of the `AArch64`'s `TTBR1`. Since the
+kernel's virtual address space size is `2 GiB` since the last tutorial, `TTBR1` will cover the range
+from `0xffff_ffff_ffff_ffff` down to `ffff_ffff_8000_0000` (both inclusive).
+
+## Implementation
+
+In `src/memory/mmu.rs`, we extend the `AssociatedTranslationTable` trait with a `TableStartFromTop`
+associated type:
+
+```rust
+/// Intended to be implemented for [`AddressSpace`].
+pub trait AssociatedTranslationTable {
+    /// A translation table whose address range is:
+    ///
+    /// [u64::MAX, (u64::MAX - AS_SIZE) + 1]
+    type TableStartFromTop;
+
+    /// A translation table whose address range is:
+    ///
+    /// [0, AS_SIZE - 1]
+    type TableStartFromBottom;
+}
+```
+
+Architecture specific code in `_arch/aarch64/memory/mmu/translation_table.rs` populates both types
+now by making use of a new generic that is added to `FixedSizeTranslationTable`, which defines
+whether the covered address space starts from the top or the bottom:
+
+```rust
+pub struct FixedSizeTranslationTable<const NUM_TABLES: usize, const START_FROM_TOP: bool> {
+    ...
+```
+
+```rust
+impl<const AS_SIZE: usize> memory::mmu::AssociatedTranslationTable
+    for memory::mmu::AddressSpace<AS_SIZE>
+where
+    [u8; Self::SIZE >> Granule512MiB::SHIFT]: Sized,
+{
+    type TableStartFromTop =
+        FixedSizeTranslationTable<{ Self::SIZE >> Granule512MiB::SHIFT }, true>;
+
+    type TableStartFromBottom =
+        FixedSizeTranslationTable<{ Self::SIZE >> Granule512MiB::SHIFT }, false>;
+}
+```
+
+Thanks to this infrastructure, `BSP` Rust code in `bsp/raspberrypi/memory/mmu.rs` only needs to
+change to this newly introduced type in order to switch from lower half to higher half translation
+tables for the kernel:
+
+```rust
+type KernelTranslationTable =
+    <KernelVirtAddrSpace as AssociatedTranslationTable>::TableStartFromTop;
+```
+
+In the `link.ld` linker script, we define a new symbol `__kernel_virt_start_addr` now, which is the
+start address of the kernel's virtual address space, calculated as `(u64::MAX -
+__kernel_virt_addr_space_size) + 1`. In order to make virtual-to-physical address translation easier
+for the human eye (and mind), we link the kernel itself at `__kernel_virt_start_addr +
+__rpi_load_addr`.
+
+Before these tutorials, the first mapped address of the kernel binary was always located at
+`__rpi_load_addr == 0x8_0000`. Starting with this tutorial, due to the `2 GiB` virtual address space
+size, the new first mapped address is `ffff_ffff_8008_0000`. So by ignoring the upper bits of the
+address, you can easily derive the physical address.
+
+The changes in the `_arch` `MMU` driver are minimal, and mostly concerned with configuring `TCR_EL1`
+for use with `TTBR1_EL1` now. And of course, setting `TTBR1_EL1` in `fn
+enable_mmu_and_caching(...)`.
+
+### Position-Independent Boot Code
+
+Remember all the fuss that we made about `position-independent code` that will be needed until the
+`MMU` is enabled. Let's quickly check what it means for us in reality now:
+
+In `_arch/aarch64/cpu/boot.rs`, we turn on the `MMU` just before returning from `EL2` to `EL1`. So
+by the time the CPU enters `EL1`, virtual memory will be active, and the CPU must therefore use the
+new higher-half `virtual addresses` for everything it does.
+
+Specifically, this means the address from which the CPU should execute upon entering `EL1` (function
+`runtime_init()`) must be a valid _virtual address_, same as the stack pointer's address. Both of
+them are programmed in function `fn prepare_el2_to_el1_transition(...)`, so we must ensure now that
+_link-time_ addresses are used here. For this reason, retrieval of these addresses happens in
+`assembly` in `boot.s`, where we can explicitly enforce generation of **absolute** addresses:
+
+```asm
+// Load the _absolute_ addresses of the following symbols. Since the kernel is linked at
+// the top of the 64 bit address space, these are effectively virtual addresses.
+ADR_ABS	x1, __boot_core_stack_end_exclusive
+ADR_ABS	x2, runtime_init
+```
+
+Both values are forwarded to the Rust entry point function `_start_rust()`, which in turn forwards
+them to `fn prepare_el2_to_el1_transition(...)`.
+
+One more thing to consider is that we keep on programming the boot core's stack address for `EL2`
+using an address that is calculated `PC-relative`, because all the `EL2` code will still run while
+virtual memory _is disabled_. As such, we need the "physical" address of the stack, so to speak.
+
+The previous tutorial also explained that it is not easily possible to compile select files using
+`-fpic` in `Rust`. Still, we are doing some function calls in `Rust` before virtual memory is
+enabled, so _theoretically_, there is room for failure. However, branches to local code in `AArch64`
+are usually generated PC-relative. So it is a small risk worth taking. Should it still fail someday,
+at least our automated CI pipeline would give notice when the tests start to fail.
+
+## Test it
+
+That's it! We are ready for a higher-half kernel now. Power up your Raspberrys and marvel at those
+beautiful (virtual) addresses:
+
+Raspberry Pi 3:
+
+```console
+$ make chainboot
+[...]
+
+Precomputing kernel translation tables and patching kernel ELF
+             --------------------------------------------------
+                 Section           Start Virt Addr       Size
+             --------------------------------------------------
+  Generating Code and RO data | 0xffff_ffff_8008_0000 |  64 KiB
+  Generating Data and bss     | 0xffff_ffff_8009_0000 | 384 KiB
+  Generating Boot-core stack  | 0xffff_ffff_8010_0000 | 512 KiB
+             --------------------------------------------------
+    Patching Kernel table struct at physical 0x9_0000
+    Patching Value of kernel table physical base address (0xd_0000) at physical 0x8_0060
+    Finished in 0.03s
+
+Minipush 1.0
+
+[MP] ⏳ Waiting for /dev/ttyUSB0
+[MP] ✅ Serial connected
+[MP] 🔌 Please power the target now
+ __  __ _      _ _                 _
+|  \/  (_)_ _ (_) |   ___  __ _ __| |
+| |\/| | | ' \| | |__/ _ \/ _` / _` |
+|_|  |_|_|_||_|_|____\___/\__,_\__,_|
+
+           Raspberry Pi 3
+
+[ML] Requesting binary
+[MP] ⏩ Pushing 387 KiB =======================================🦀 100% 96 KiB/s Time: 00:00:04
+[ML] Loaded! Executing the payload now
+
+[    4.320829] Booting on: Raspberry Pi 3
+[    4.321102] MMU online:
+[    4.321394]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    4.323138]                         Virtual                                   Physical               Size       Attr                    Entity
+[    4.324882]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    4.326629]       0xffff_ffff_8008_0000..0xffff_ffff_8008_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
+[    4.328243]       0xffff_ffff_8009_0000..0xffff_ffff_800e_ffff --> 0x00_0009_0000..0x00_000e_ffff | 384 KiB | C   RW XN | Kernel data and bss
+[    4.329813]       0xffff_ffff_8010_0000..0xffff_ffff_8017_ffff --> 0x00_0010_0000..0x00_0017_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
+[    4.331416]       0xffff_ffff_f000_0000..0xffff_ffff_f000_ffff --> 0x00_3f20_0000..0x00_3f20_ffff |  64 KiB | Dev RW XN | BCM GPIO
+[    4.332867]                                                                                                             | BCM PL011 UART
+[    4.334385]       0xffff_ffff_f001_0000..0xffff_ffff_f001_ffff --> 0x00_3f00_0000..0x00_3f00_ffff |  64 KiB | Dev RW XN | BCM Peripheral Interrupt Controller
+[    4.336128]       -------------------------------------------------------------------------------------------------------------------------------------------
+```
+
+Raspberry Pi 4:
+
+```console
+$ BSP=rpi4 make chainboot
+[...]
+
+Precomputing kernel translation tables and patching kernel ELF
+             --------------------------------------------------
+                 Section           Start Virt Addr       Size
+             --------------------------------------------------
+  Generating Code and RO data | 0xffff_ffff_8008_0000 |  64 KiB
+  Generating Data and bss     | 0xffff_ffff_8009_0000 | 448 KiB
+  Generating Boot-core stack  | 0xffff_ffff_8011_0000 | 512 KiB
+             --------------------------------------------------
+    Patching Kernel table struct at physical 0xa_0000
+    Patching Value of kernel table physical base address (0xe_0000) at physical 0x8_0068
+    Finished in 0.03s
+
+Minipush 1.0
+
+[MP] ⏳ Waiting for /dev/ttyUSB0
+[MP] ✅ Serial connected
+[MP] 🔌 Please power the target now
+ __  __ _      _ _                 _
+|  \/  (_)_ _ (_) |   ___  __ _ __| |
+| |\/| | | ' \| | |__/ _ \/ _` / _` |
+|_|  |_|_|_||_|_|____\___/\__,_\__,_|
+
+           Raspberry Pi 4
+
+[ML] Requesting binary
+[MP] ⏩ Pushing 449 KiB ======================================🦀 100% 112 KiB/s Time: 00:00:04
+[ML] Loaded! Executing the payload now
+
+[    5.011490] Booting on: Raspberry Pi 4
+[    5.011588] MMU online:
+[    5.011881]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    5.013625]                         Virtual                                   Physical               Size       Attr                    Entity
+[    5.015369]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    5.017115]       0xffff_ffff_8008_0000..0xffff_ffff_8008_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
+[    5.018730]       0xffff_ffff_8009_0000..0xffff_ffff_800f_ffff --> 0x00_0009_0000..0x00_000f_ffff | 448 KiB | C   RW XN | Kernel data and bss
+[    5.020299]       0xffff_ffff_8011_0000..0xffff_ffff_8018_ffff --> 0x00_0011_0000..0x00_0018_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
+[    5.021903]       0xffff_ffff_f000_0000..0xffff_ffff_f000_ffff --> 0x00_fe20_0000..0x00_fe20_ffff |  64 KiB | Dev RW XN | BCM GPIO
+[    5.023354]                                                                                                             | BCM PL011 UART
+[    5.024871]       0xffff_ffff_f001_0000..0xffff_ffff_f001_ffff --> 0x00_ff84_0000..0x00_ff84_ffff |  64 KiB | Dev RW XN | GICD
+[    5.026279]                                                                                                             | GICC
+[    5.027687]       -------------------------------------------------------------------------------------------------------------------------------------------
+```
+
+## Diff to previous
+```diff
+
+diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs
+--- 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
++++ 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs
+@@ -11,7 +11,7 @@
+ //!
+ //! crate::cpu::boot::arch_boot
+
+-use crate::{cpu, memory, memory::Address, runtime_init};
++use crate::{cpu, memory, memory::Address};
+ use core::intrinsics::unlikely;
+ use cortex_a::{asm, regs::*};
+
+@@ -29,7 +29,10 @@
+ /// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
+ /// - The HW state of EL1 must be prepared in a sound way.
+ #[inline(always)]
+-unsafe fn prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr: u64) {
++unsafe fn prepare_el2_to_el1_transition(
++    virt_boot_core_stack_end_exclusive_addr: u64,
++    virt_runtime_init_addr: u64,
++) {
+     // Enable timer counter registers for EL1.
+     CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
+
+@@ -52,11 +55,11 @@
+     );
+
+     // Second, let the link register point to runtime_init().
+-    ELR_EL2.set(runtime_init::runtime_init as *const () as u64);
++    ELR_EL2.set(virt_runtime_init_addr);
+
+     // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it. Since there
+     // are no plans to ever return to EL2, just re-use the same stack.
+-    SP_EL1.set(phys_boot_core_stack_end_exclusive_addr);
++    SP_EL1.set(virt_boot_core_stack_end_exclusive_addr);
+ }
+
+ //--------------------------------------------------------------------------------------------------
+@@ -74,9 +77,13 @@
+ #[no_mangle]
+ pub unsafe extern "C" fn _start_rust(
+     phys_kernel_tables_base_addr: u64,
+-    phys_boot_core_stack_end_exclusive_addr: u64,
++    virt_boot_core_stack_end_exclusive_addr: u64,
++    virt_runtime_init_addr: u64,
+ ) -> ! {
+-    prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr);
++    prepare_el2_to_el1_transition(
++        virt_boot_core_stack_end_exclusive_addr,
++        virt_runtime_init_addr,
++    );
+
+     // Turn on the MMU for EL1.
+     let addr = Address::new(phys_kernel_tables_base_addr as usize);
+@@ -84,6 +91,7 @@
+         cpu::wait_forever();
+     }
+
+-    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
++    // Use `eret` to "return" to EL1. Since virtual memory will already be enabled, this results in
++    // execution of runtime_init() in EL1 from its _virtual address_.
+     asm::eret()
+ }
+
+diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.s 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.s
+--- 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.s
++++ 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.s
+@@ -18,6 +18,18 @@
+ 	add	\register, \register, #:lo12:\symbol
+ .endm
+
++// Load the address of a symbol into a register, absolute.
++//
++// # Resources
++//
++// - https://sourceware.org/binutils/docs-2.36/as/AArch64_002dRelocations.html
++.macro ADR_ABS register, symbol
++	movz	\register, #:abs_g3:\symbol
++	movk	\register, #:abs_g2_nc:\symbol
++	movk	\register, #:abs_g1_nc:\symbol
++	movk	\register, #:abs_g0_nc:\symbol
++.endm
++
+ .equ _EL2, 0x8
+ .equ _core_id_mask, 0b11
+
+@@ -47,11 +59,23 @@
+ 	// Load the base address of the kernel's translation tables.
+ 	ldr	x0, PHYS_KERNEL_TABLES_BASE_ADDR // provided by bsp/__board_name__/memory/mmu.rs
+
+-	// Set the stack pointer. This ensures that any code in EL2 that needs the stack will work.
+-	ADR_REL	x1, __boot_core_stack_end_exclusive
+-	mov	sp, x1
++	// Load the _absolute_ addresses of the following symbols. Since the kernel is linked at
++	// the top of the 64 bit address space, these are effectively virtual addresses.
++	ADR_ABS	x1, __boot_core_stack_end_exclusive
++	ADR_ABS	x2, runtime_init
++
++	// Load the PC-relative address of the stack and set the stack pointer.
++	//
++	// Since _start() is the first function that runs after the firmware has loaded the kernel
++	// into memory, retrieving this symbol PC-relative returns the "physical" address.
++	//
++	// Setting the stack pointer to this value ensures that anything that still runs in EL2,
++	// until the kernel returns to EL1 with the MMU enabled, works as well. After the return to
++	// EL1, the virtual address of the stack retrieved above will be used.
++	ADR_REL	x4, __boot_core_stack_end_exclusive
++	mov	sp, x4
+
+-	// Jump to Rust code. x0 and x1 hold the function arguments provided to _start_rust().
++	// Jump to Rust code. x0, x1 and x2 hold the function arguments provided to _start_rust().
+ 	b	_start_rust
+
+ 	// Infinitely wait for events (aka "park the core").
+
+diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
+--- 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs
++++ 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
+@@ -131,7 +131,7 @@
+ /// aligned, so the lvl3 is put first.
+ #[repr(C)]
+ #[repr(align(65536))]
+-pub struct FixedSizeTranslationTable<const NUM_TABLES: usize> {
++pub struct FixedSizeTranslationTable<const NUM_TABLES: usize, const START_FROM_TOP: bool> {
+     /// Page descriptors, covering 64 KiB windows per entry.
+     lvl3: [[PageDescriptor; 8192]; NUM_TABLES],
+
+@@ -258,14 +258,23 @@
+ where
+     [u8; Self::SIZE >> Granule512MiB::SHIFT]: Sized,
+ {
+-    type TableStartFromBottom = FixedSizeTranslationTable<{ Self::SIZE >> Granule512MiB::SHIFT }>;
++    type TableStartFromTop =
++        FixedSizeTranslationTable<{ Self::SIZE >> Granule512MiB::SHIFT }, true>;
++
++    type TableStartFromBottom =
++        FixedSizeTranslationTable<{ Self::SIZE >> Granule512MiB::SHIFT }, false>;
+ }
+
+-impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
++impl<const NUM_TABLES: usize, const START_FROM_TOP: bool>
++    FixedSizeTranslationTable<NUM_TABLES, START_FROM_TOP>
++{
+     // Reserve the last 256 MiB of the address space for MMIO mappings.
+     const L2_MMIO_START_INDEX: usize = NUM_TABLES - 1;
+     const L3_MMIO_START_INDEX: usize = 8192 / 2;
+
++    const START_FROM_TOP_OFFSET: Address<Virtual> =
++        Address::new((usize::MAX - (Granule512MiB::SIZE * NUM_TABLES)) + 1);
++
+     /// Create an instance.
+     #[allow(clippy::assertions_on_constants)]
+     const fn _new(for_precompute: bool) -> Self {
+@@ -294,20 +303,32 @@
+     /// The start address of the table's MMIO range.
+     #[inline(always)]
+     fn mmio_start_addr(&self) -> Address<Virtual> {
+-        Address::new(
++        let mut addr = Address::new(
+             (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
+                 | (Self::L3_MMIO_START_INDEX << Granule64KiB::SHIFT),
+-        )
++        );
++
++        if START_FROM_TOP {
++            addr += Self::START_FROM_TOP_OFFSET;
++        }
++
++        addr
+     }
+
+     /// The inclusive end address of the table's MMIO range.
+     #[inline(always)]
+     fn mmio_end_addr_inclusive(&self) -> Address<Virtual> {
+-        Address::new(
++        let mut addr = Address::new(
+             (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
+                 | (8191 << Granule64KiB::SHIFT)
+                 | (Granule64KiB::SIZE - 1),
+-        )
++        );
++
++        if START_FROM_TOP {
++            addr += Self::START_FROM_TOP_OFFSET;
++        }
++
++        addr
+     }
+
+     /// Helper to calculate the lvl2 and lvl3 indices from an address.
+@@ -316,7 +337,12 @@
+         &self,
+         addr: *const Page<Virtual>,
+     ) -> Result<(usize, usize), &'static str> {
+-        let addr = addr as usize;
++        let mut addr = addr as usize;
++
++        if START_FROM_TOP {
++            addr -= Self::START_FROM_TOP_OFFSET.into_usize()
++        }
++
+         let lvl2_index = addr >> Granule512MiB::SHIFT;
+         let lvl3_index = (addr & Granule512MiB::MASK) >> Granule64KiB::SHIFT;
+
+@@ -343,8 +369,9 @@
+ // OS Interface Code
+ //------------------------------------------------------------------------------
+
+-impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::TranslationTable
+-    for FixedSizeTranslationTable<NUM_TABLES>
++impl<const NUM_TABLES: usize, const START_FROM_TOP: bool>
++    memory::mmu::translation_table::interface::TranslationTable
++    for FixedSizeTranslationTable<NUM_TABLES, START_FROM_TOP>
+ {
+     fn init(&mut self) -> Result<(), &'static str> {
+         if self.initialized {
+@@ -419,12 +446,16 @@
+             return Err("Not enough MMIO space left");
+         }
+
+-        let addr = Address::new(
++        let mut addr = Address::new(
+             (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
+                 | (self.cur_l3_mmio_index << Granule64KiB::SHIFT),
+         );
+         self.cur_l3_mmio_index += num_pages;
+
++        if START_FROM_TOP {
++            addr += Self::START_FROM_TOP_OFFSET;
++        }
++
+         Ok(PageSliceDescriptor::from_addr(addr, num_pages))
+     }
+
+@@ -447,7 +478,7 @@
+ //--------------------------------------------------------------------------------------------------
+
+ #[cfg(test)]
+-pub type MinSizeTranslationTable = FixedSizeTranslationTable<1>;
++pub type MinSizeTranslationTable = FixedSizeTranslationTable<1, false>;
+
+ #[cfg(test)]
+ mod tests {
+
+diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu.rs 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu.rs
+--- 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu.rs
++++ 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu.rs
+@@ -65,6 +65,7 @@
+
+ impl MemoryManagementUnit {
+     /// Setup function for the MAIR_EL1 register.
++    #[inline(always)]
+     fn set_up_mair(&self) {
+         // Define the memory types being mapped.
+         MAIR_EL1.write(
+@@ -78,20 +79,21 @@
+     }
+
+     /// Configure various settings of stage 1 of the EL1 translation regime.
++    #[inline(always)]
+     fn configure_translation_control(&self) {
+-        let t0sz = (64 - bsp::memory::mmu::KernelVirtAddrSpace::SIZE_SHIFT) as u64;
++        let t1sz = (64 - bsp::memory::mmu::KernelVirtAddrSpace::SIZE_SHIFT) as u64;
+
+         TCR_EL1.write(
+-            TCR_EL1::TBI0::Used
++            TCR_EL1::TBI1::Used
+                 + TCR_EL1::IPS::Bits_40
+-                + TCR_EL1::TG0::KiB_64
+-                + TCR_EL1::SH0::Inner
+-                + TCR_EL1::ORGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
+-                + TCR_EL1::IRGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
+-                + TCR_EL1::EPD0::EnableTTBR0Walks
+-                + TCR_EL1::A1::TTBR0
+-                + TCR_EL1::T0SZ.val(t0sz)
+-                + TCR_EL1::EPD1::DisableTTBR1Walks,
++                + TCR_EL1::TG1::KiB_64
++                + TCR_EL1::SH1::Inner
++                + TCR_EL1::ORGN1::WriteBack_ReadAlloc_WriteAlloc_Cacheable
++                + TCR_EL1::IRGN1::WriteBack_ReadAlloc_WriteAlloc_Cacheable
++                + TCR_EL1::EPD1::EnableTTBR1Walks
++                + TCR_EL1::A1::TTBR1
++                + TCR_EL1::T1SZ.val(t1sz)
++                + TCR_EL1::EPD0::DisableTTBR0Walks,
+         );
+     }
+ }
+@@ -130,7 +132,7 @@
+         self.set_up_mair();
+
+         // Set the "Translation Table Base Register".
+-        TTBR0_EL1.set_baddr(phys_tables_base_addr.into_usize() as u64);
++        TTBR1_EL1.set_baddr(phys_tables_base_addr.into_usize() as u64);
+
+         self.configure_translation_control();
+
+
+diff -uNr 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/link.ld
+--- 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld
++++ 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/link.ld
+@@ -6,6 +6,15 @@
+ /* This file provides __kernel_virt_addr_space_size */
+ INCLUDE src/bsp/raspberrypi/kernel_virt_addr_space_size.ld;
+
++/* The kernel's virtual address range will be:
++ *
++ * [END_ADDRESS_INCLUSIVE, START_ADDRESS]
++ * [u64::MAX             , (u64::MAX - __kernel_virt_addr_space_size) + 1]
++ *
++ * Since the start address is needed to set the linker address below, calculate it now.
++ */
++__kernel_virt_start_addr = ((0xffffffffffffffff - __kernel_virt_addr_space_size) + 1);
++
+ /* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
+ __rpi_load_addr = 0x80000;
+
+@@ -19,13 +28,14 @@
+
+ SECTIONS
+ {
+-    . =  __rpi_load_addr;
++    /* Add the load address as an offset. Makes virt-to-phys translation easier for the human eye */
++    . =  __kernel_virt_start_addr + __rpi_load_addr;
+
+     /***********************************************************************************************
+     * Code + RO Data + Global Offset Table
+     ***********************************************************************************************/
+     __rx_start = .;
+-    .text :
++    .text : AT(__rpi_load_addr)
+     {
+         KEEP(*(.text._start))
+         *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
+
+diff -uNr 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs
+--- 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs
++++ 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs
+@@ -23,7 +23,7 @@
+ //--------------------------------------------------------------------------------------------------
+
+ type KernelTranslationTable =
+-    <KernelVirtAddrSpace as AssociatedTranslationTable>::TableStartFromBottom;
++    <KernelVirtAddrSpace as AssociatedTranslationTable>::TableStartFromTop;
+
+ //--------------------------------------------------------------------------------------------------
+ // Public Definitions
+
+diff -uNr 15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs 16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs
+--- 15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs
++++ 16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs
+@@ -80,6 +80,11 @@
+ pub trait AssociatedTranslationTable {
+     /// A translation table whose address range is:
+     ///
++    /// [u64::MAX, (u64::MAX - AS_SIZE) + 1]
++    type TableStartFromTop;
++
++    /// A translation table whose address range is:
++    ///
+     /// [0, AS_SIZE - 1]
+     type TableStartFromBottom;
+ }
+
+diff -uNr 15_virtual_mem_part3_precomputed_tables/src/runtime_init.rs 16_virtual_mem_part4_higher_half_kernel/src/runtime_init.rs
+--- 15_virtual_mem_part3_precomputed_tables/src/runtime_init.rs
++++ 16_virtual_mem_part4_higher_half_kernel/src/runtime_init.rs
+@@ -30,6 +30,7 @@
+ /// # Safety
+ ///
+ /// - Only a single core must be active and running this function.
++#[no_mangle]
+ pub unsafe fn runtime_init() -> ! {
+     extern "Rust" {
+         fn kernel_init() -> !;
+
+diff -uNr 15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs 16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs
+--- 15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs
++++ 16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs
+@@ -27,8 +27,8 @@
+     println!("Testing synchronous exception handling by causing a page fault");
+     println!("-------------------------------------------------------------------\n");
+
+-    println!("Writing beyond mapped area to address 9 GiB...");
+-    let big_addr: u64 = 9 * 1024 * 1024 * 1024;
++    println!("Writing to bottom of address space to address 1 GiB...");
++    let big_addr: u64 = 1 * 1024 * 1024 * 1024;
+     core::ptr::read_volatile(big_addr as *mut u64);
+
+     // If execution reaches here, the memory access above did not cause a page fault exception.
+
+diff -uNr 15_virtual_mem_part3_precomputed_tables/translation_table_tool/bsp.rb 16_virtual_mem_part4_higher_half_kernel/translation_table_tool/bsp.rb
+--- 15_virtual_mem_part3_precomputed_tables/translation_table_tool/bsp.rb
++++ 16_virtual_mem_part4_higher_half_kernel/translation_table_tool/bsp.rb
+@@ -31,7 +31,7 @@
+
+         symbols = `#{NM_BINARY} --demangle #{kernel_elf}`.split("\n")
+         @kernel_virt_addr_space_size = parse_from_symbols(symbols, /__kernel_virt_addr_space_size/)
+-        @kernel_virt_start_addr = 0
++        @kernel_virt_start_addr = parse_from_symbols(symbols, /__kernel_virt_start_addr/)
+         @virt_addresses = parse_from_symbols(symbols, @virt_addresses)
+         @phys_addresses = virt_to_phys(@virt_addresses)
+
+```
diff --git a/16_virtual_mem_part4_higher_half_kernel/build.rs b/16_virtual_mem_part4_higher_half_kernel/build.rs
new file mode 100644
index 000000000..3f0a29110
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/build.rs
@@ -0,0 +1,8 @@
+use std::env;
+
+fn main() {
+    let linker_file = env::var("LINKER_FILE").unwrap();
+
+    println!("cargo:rerun-if-changed={}", linker_file);
+    println!("cargo:rerun-if-changed=build.rs");
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu.rs
new file mode 100644
index 000000000..56443865a
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu.rs
@@ -0,0 +1,49 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural processor code.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::arch_cpu
+
+use cortex_a::asm;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+pub use asm::nop;
+
+/// Pause execution on the core.
+#[inline(always)]
+pub fn wait_forever() -> ! {
+    loop {
+        asm::wfe()
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+#[cfg(feature = "test_build")]
+use qemu_exit::QEMUExit;
+
+#[cfg(feature = "test_build")]
+const QEMU_EXIT_HANDLE: qemu_exit::AArch64 = qemu_exit::AArch64::new();
+
+/// Make the host QEMU binary execute `exit(1)`.
+#[cfg(feature = "test_build")]
+pub fn qemu_exit_failure() -> ! {
+    QEMU_EXIT_HANDLE.exit_failure()
+}
+
+/// Make the host QEMU binary execute `exit(0)`.
+#[cfg(feature = "test_build")]
+pub fn qemu_exit_success() -> ! {
+    QEMU_EXIT_HANDLE.exit_success()
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs
new file mode 100644
index 000000000..4f0ef0b4d
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs
@@ -0,0 +1,97 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural boot code.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::boot::arch_boot
+
+use crate::{cpu, memory, memory::Address};
+use core::intrinsics::unlikely;
+use cortex_a::{asm, regs::*};
+
+// Assembly counterpart to this file.
+global_asm!(include_str!("boot.s"));
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// Prepares the transition from EL2 to EL1.
+///
+/// # Safety
+///
+/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
+/// - The HW state of EL1 must be prepared in a sound way.
+#[inline(always)]
+unsafe fn prepare_el2_to_el1_transition(
+    virt_boot_core_stack_end_exclusive_addr: u64,
+    virt_runtime_init_addr: u64,
+) {
+    // Enable timer counter registers for EL1.
+    CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
+
+    // No offset for reading the counters.
+    CNTVOFF_EL2.set(0);
+
+    // Set EL1 execution state to AArch64.
+    HCR_EL2.write(HCR_EL2::RW::EL1IsAarch64);
+
+    // Set up a simulated exception return.
+    //
+    // First, fake a saved program status where all interrupts were masked and SP_EL1 was used as a
+    // stack pointer.
+    SPSR_EL2.write(
+        SPSR_EL2::D::Masked
+            + SPSR_EL2::A::Masked
+            + SPSR_EL2::I::Masked
+            + SPSR_EL2::F::Masked
+            + SPSR_EL2::M::EL1h,
+    );
+
+    // Second, let the link register point to runtime_init().
+    ELR_EL2.set(virt_runtime_init_addr);
+
+    // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it. Since there
+    // are no plans to ever return to EL2, just re-use the same stack.
+    SP_EL1.set(virt_boot_core_stack_end_exclusive_addr);
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The Rust entry of the `kernel` binary.
+///
+/// The function is called from the assembly `_start` function.
+///
+/// # Safety
+///
+/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
+/// - Exception return from EL2 must must continue execution in EL1 with `runtime_init()`.
+#[no_mangle]
+pub unsafe extern "C" fn _start_rust(
+    phys_kernel_tables_base_addr: u64,
+    virt_boot_core_stack_end_exclusive_addr: u64,
+    virt_runtime_init_addr: u64,
+) -> ! {
+    prepare_el2_to_el1_transition(
+        virt_boot_core_stack_end_exclusive_addr,
+        virt_runtime_init_addr,
+    );
+
+    // Turn on the MMU for EL1.
+    let addr = Address::new(phys_kernel_tables_base_addr as usize);
+    if unlikely(memory::mmu::enable_mmu_and_caching(addr).is_err()) {
+        cpu::wait_forever();
+    }
+
+    // Use `eret` to "return" to EL1. Since virtual memory will already be enabled, this results in
+    // execution of runtime_init() in EL1 from its _virtual address_.
+    asm::eret()
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.s b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.s
new file mode 100644
index 000000000..638259d47
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.s
@@ -0,0 +1,87 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//--------------------------------------------------------------------------------------------------
+// Definitions
+//--------------------------------------------------------------------------------------------------
+
+// Load the address of a symbol into a register, PC-relative.
+//
+// The symbol must lie within +/- 4 GiB of the Program Counter.
+//
+// # Resources
+//
+// - https://sourceware.org/binutils/docs-2.36/as/AArch64_002dRelocations.html
+.macro ADR_REL register, symbol
+	adrp	\register, \symbol
+	add	\register, \register, #:lo12:\symbol
+.endm
+
+// Load the address of a symbol into a register, absolute.
+//
+// # Resources
+//
+// - https://sourceware.org/binutils/docs-2.36/as/AArch64_002dRelocations.html
+.macro ADR_ABS register, symbol
+	movz	\register, #:abs_g3:\symbol
+	movk	\register, #:abs_g2_nc:\symbol
+	movk	\register, #:abs_g1_nc:\symbol
+	movk	\register, #:abs_g0_nc:\symbol
+.endm
+
+.equ _EL2, 0x8
+.equ _core_id_mask, 0b11
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+.section .text._start
+
+//------------------------------------------------------------------------------
+// fn _start()
+//------------------------------------------------------------------------------
+_start:
+	// Only proceed if the core executes in EL2. Park it otherwise.
+	mrs	x0, CurrentEL
+	cmp	x0, _EL2
+	b.ne	1f
+
+	// Only proceed on the boot core. Park it otherwise.
+	mrs	x1, MPIDR_EL1
+	and	x1, x1, _core_id_mask
+	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
+	cmp	x1, x2
+	b.ne	1f
+
+	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
+
+	// Load the base address of the kernel's translation tables.
+	ldr	x0, PHYS_KERNEL_TABLES_BASE_ADDR // provided by bsp/__board_name__/memory/mmu.rs
+
+	// Load the _absolute_ addresses of the following symbols. Since the kernel is linked at
+	// the top of the 64 bit address space, these are effectively virtual addresses.
+	ADR_ABS	x1, __boot_core_stack_end_exclusive
+	ADR_ABS	x2, runtime_init
+
+	// Load the PC-relative address of the stack and set the stack pointer.
+	//
+	// Since _start() is the first function that runs after the firmware has loaded the kernel
+	// into memory, retrieving this symbol PC-relative returns the "physical" address.
+	//
+	// Setting the stack pointer to this value ensures that anything that still runs in EL2,
+	// until the kernel returns to EL1 with the MMU enabled, works as well. After the return to
+	// EL1, the virtual address of the stack retrieved above will be used.
+	ADR_REL	x4, __boot_core_stack_end_exclusive
+	mov	sp, x4
+
+	// Jump to Rust code. x0, x1 and x2 hold the function arguments provided to _start_rust().
+	b	_start_rust
+
+	// Infinitely wait for events (aka "park the core").
+1:	wfe
+	b	1b
+
+.size	_start, . - _start
+.type	_start, function
+.global	_start
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/smp.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/smp.rs
new file mode 100644
index 000000000..b9fdd0f73
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/smp.rs
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural symmetric multiprocessing.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::smp::arch_smp
+
+use cortex_a::regs::*;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return the executing core's id.
+#[inline(always)]
+pub fn core_id<T>() -> T
+where
+    T: From<u8>,
+{
+    const CORE_MASK: u64 = 0b11;
+
+    T::from((MPIDR_EL1.get() & CORE_MASK) as u8)
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.rs
new file mode 100644
index 000000000..4a2c8de96
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.rs
@@ -0,0 +1,281 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural synchronous and asynchronous exception handling.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::exception::arch_exception
+
+use crate::{
+    bsp::{self},
+    exception,
+    memory::Address,
+};
+use core::{cell::UnsafeCell, fmt};
+use cortex_a::{barrier, regs::*};
+use register::InMemoryRegister;
+
+// Assembly counterpart to this file.
+global_asm!(include_str!("exception.s"));
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Wrapper struct for memory copy of SPSR_EL1.
+#[repr(transparent)]
+struct SpsrEL1(InMemoryRegister<u64, SPSR_EL1::Register>);
+
+/// The exception context as it is stored on the stack on exception entry.
+#[repr(C)]
+struct ExceptionContext {
+    /// General Purpose Registers.
+    gpr: [u64; 30],
+
+    /// The link register, aka x30.
+    lr: u64,
+
+    /// Exception link register. The program counter at the time the exception happened.
+    elr_el1: u64,
+
+    /// Saved program status.
+    spsr_el1: SpsrEL1,
+}
+
+/// Wrapper struct for pretty printing ESR_EL1.
+struct EsrEL1;
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// Check if additional context can be derived from a data abort.
+fn inspect_data_abort(f: &mut fmt::Formatter) -> fmt::Result {
+    let fault_addr = Address::new(FAR_EL1.get() as usize);
+
+    if bsp::memory::mmu::virt_boot_core_stack_guard_page_desc().contains(fault_addr) {
+        writeln!(
+            f,
+            "\n\n      >> Attempted to access the guard page of the kernel's boot core stack <<"
+        )?;
+    }
+
+    Ok(())
+}
+
+/// Prints verbose information about the exception and then panics.
+fn default_exception_handler(e: &ExceptionContext) {
+    panic!(
+        "\n\nCPU Exception!\n\
+         FAR_EL1: {:#018x}\n\
+         {}\n\
+         {}",
+        FAR_EL1.get(),
+        EsrEL1 {},
+        e
+    );
+}
+
+//------------------------------------------------------------------------------
+// Current, EL0
+//------------------------------------------------------------------------------
+
+#[no_mangle]
+unsafe extern "C" fn current_el0_synchronous(_e: &mut ExceptionContext) {
+    panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
+}
+
+#[no_mangle]
+unsafe extern "C" fn current_el0_irq(_e: &mut ExceptionContext) {
+    panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
+}
+
+#[no_mangle]
+unsafe extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
+    panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
+}
+
+//------------------------------------------------------------------------------
+// Current, ELx
+//------------------------------------------------------------------------------
+
+#[no_mangle]
+unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+#[no_mangle]
+unsafe extern "C" fn current_elx_irq(_e: &mut ExceptionContext) {
+    use exception::asynchronous::interface::IRQManager;
+
+    let token = &exception::asynchronous::IRQContext::new();
+    bsp::exception::asynchronous::irq_manager().handle_pending_irqs(token);
+}
+
+#[no_mangle]
+unsafe extern "C" fn current_elx_serror(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+//------------------------------------------------------------------------------
+// Lower, AArch64
+//------------------------------------------------------------------------------
+
+#[no_mangle]
+unsafe extern "C" fn lower_aarch64_synchronous(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+#[no_mangle]
+unsafe extern "C" fn lower_aarch64_irq(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+#[no_mangle]
+unsafe extern "C" fn lower_aarch64_serror(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+//------------------------------------------------------------------------------
+// Lower, AArch32
+//------------------------------------------------------------------------------
+
+#[no_mangle]
+unsafe extern "C" fn lower_aarch32_synchronous(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+#[no_mangle]
+unsafe extern "C" fn lower_aarch32_irq(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+#[no_mangle]
+unsafe extern "C" fn lower_aarch32_serror(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+//------------------------------------------------------------------------------
+// Pretty printing
+//------------------------------------------------------------------------------
+
+/// Human readable ESR_EL1.
+#[rustfmt::skip]
+impl fmt::Display for EsrEL1 {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        let esr_el1 = ESR_EL1.extract();
+
+        // Raw print of whole register.
+        writeln!(f, "ESR_EL1: {:#010x}", esr_el1.get())?;
+
+        // Raw print of exception class.
+        write!(f, "      Exception Class         (EC) : {:#x}", esr_el1.read(ESR_EL1::EC))?;
+
+        // Exception class, translation.
+        let ec_translation = match esr_el1.read_as_enum(ESR_EL1::EC) {
+            Some(ESR_EL1::EC::Value::DataAbortCurrentEL) => "Data Abort, current EL",
+            _ => "N/A",
+        };
+        writeln!(f, " - {}", ec_translation)?;
+
+        // Raw print of instruction specific syndrome.
+        write!(f, "      Instr Specific Syndrome (ISS): {:#x}", esr_el1.read(ESR_EL1::ISS))?;
+
+        inspect_data_abort(f)
+    }
+}
+
+/// Human readable SPSR_EL1.
+#[rustfmt::skip]
+impl fmt::Display for SpsrEL1 {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        // Raw value.
+        writeln!(f, "SPSR_EL1: {:#010x}", self.0.get())?;
+
+        let to_flag_str = |x| -> _ {
+            if x { "Set" } else { "Not set" }
+         };
+
+        writeln!(f, "      Flags:")?;
+        writeln!(f, "            Negative (N): {}", to_flag_str(self.0.is_set(SPSR_EL1::N)))?;
+        writeln!(f, "            Zero     (Z): {}", to_flag_str(self.0.is_set(SPSR_EL1::Z)))?;
+        writeln!(f, "            Carry    (C): {}", to_flag_str(self.0.is_set(SPSR_EL1::C)))?;
+        writeln!(f, "            Overflow (V): {}", to_flag_str(self.0.is_set(SPSR_EL1::V)))?;
+
+        let to_mask_str = |x| -> _ {
+            if x { "Masked" } else { "Unmasked" }
+        };
+
+        writeln!(f, "      Exception handling state:")?;
+        writeln!(f, "            Debug  (D): {}", to_mask_str(self.0.is_set(SPSR_EL1::D)))?;
+        writeln!(f, "            SError (A): {}", to_mask_str(self.0.is_set(SPSR_EL1::A)))?;
+        writeln!(f, "            IRQ    (I): {}", to_mask_str(self.0.is_set(SPSR_EL1::I)))?;
+        writeln!(f, "            FIQ    (F): {}", to_mask_str(self.0.is_set(SPSR_EL1::F)))?;
+
+        write!(f, "      Illegal Execution State (IL): {}",
+            to_flag_str(self.0.is_set(SPSR_EL1::IL))
+        )
+    }
+}
+
+/// Human readable print of the exception context.
+impl fmt::Display for ExceptionContext {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        writeln!(f, "ELR_EL1: {:#018x}", self.elr_el1)?;
+        writeln!(f, "{}", self.spsr_el1)?;
+        writeln!(f)?;
+        writeln!(f, "General purpose register:")?;
+
+        #[rustfmt::skip]
+        let alternating = |x| -> _ {
+            if x % 2 == 0 { "   " } else { "\n" }
+        };
+
+        // Print two registers per line.
+        for (i, reg) in self.gpr.iter().enumerate() {
+            write!(f, "      x{: <2}: {: >#018x}{}", i, reg, alternating(i))?;
+        }
+        write!(f, "      lr : {:#018x}", self.lr)
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+use crate::exception::PrivilegeLevel;
+
+/// The processing element's current privilege level.
+pub fn current_privilege_level() -> (PrivilegeLevel, &'static str) {
+    let el = CurrentEL.read_as_enum(CurrentEL::EL);
+    match el {
+        Some(CurrentEL::EL::Value::EL2) => (PrivilegeLevel::Hypervisor, "EL2"),
+        Some(CurrentEL::EL::Value::EL1) => (PrivilegeLevel::Kernel, "EL1"),
+        Some(CurrentEL::EL::Value::EL0) => (PrivilegeLevel::User, "EL0"),
+        _ => (PrivilegeLevel::Unknown, "Unknown"),
+    }
+}
+
+/// Init exception handling by setting the exception vector base address register.
+///
+/// # Safety
+///
+/// - Changes the HW state of the executing core.
+/// - The vector table and the symbol `__exception_vector_table_start` from the linker script must
+///   adhere to the alignment and size constraints demanded by the ARMv8-A Architecture Reference
+///   Manual.
+pub unsafe fn handling_init() {
+    // Provided by exception.S.
+    extern "Rust" {
+        static __exception_vector_start: UnsafeCell<()>;
+    }
+
+    VBAR_EL1.set(__exception_vector_start.get() as u64);
+
+    // Force VBAR update to complete before next instruction.
+    barrier::isb(barrier::SY);
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.s b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.s
new file mode 100644
index 000000000..ffb1875ce
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.s
@@ -0,0 +1,148 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//--------------------------------------------------------------------------------------------------
+// Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Call the function provided by parameter `\handler` after saving the exception context. Provide
+/// the context as the first parameter to '\handler'.
+.macro CALL_WITH_CONTEXT handler
+	// Make room on the stack for the exception context.
+	sub	sp,  sp,  #16 * 17
+
+	// Store all general purpose registers on the stack.
+	stp	x0,  x1,  [sp, #16 * 0]
+	stp	x2,  x3,  [sp, #16 * 1]
+	stp	x4,  x5,  [sp, #16 * 2]
+	stp	x6,  x7,  [sp, #16 * 3]
+	stp	x8,  x9,  [sp, #16 * 4]
+	stp	x10, x11, [sp, #16 * 5]
+	stp	x12, x13, [sp, #16 * 6]
+	stp	x14, x15, [sp, #16 * 7]
+	stp	x16, x17, [sp, #16 * 8]
+	stp	x18, x19, [sp, #16 * 9]
+	stp	x20, x21, [sp, #16 * 10]
+	stp	x22, x23, [sp, #16 * 11]
+	stp	x24, x25, [sp, #16 * 12]
+	stp	x26, x27, [sp, #16 * 13]
+	stp	x28, x29, [sp, #16 * 14]
+
+	// Add the exception link register (ELR_EL1) and the saved program status (SPSR_EL1).
+	mrs	x1,  ELR_EL1
+	mrs	x2,  SPSR_EL1
+
+	stp	lr,  x1,  [sp, #16 * 15]
+	str	x2,       [sp, #16 * 16]
+
+	// x0 is the first argument for the function called through `\handler`.
+	mov	x0,  sp
+
+	// Call `\handler`.
+	bl	\handler
+
+	// After returning from exception handling code, replay the saved context and return via
+	// `eret`.
+	b	__exception_restore_context
+.endm
+
+.macro FIQ_SUSPEND
+1:	wfe
+	b	1b
+.endm
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+.section .text
+
+//------------------------------------------------------------------------------
+// The exception vector table.
+//------------------------------------------------------------------------------
+
+// Align by 2^11 bytes, as demanded by ARMv8-A. Same as ALIGN(2048) in an ld script.
+.align 11
+
+// Export a symbol for the Rust code to use.
+__exception_vector_start:
+
+// Current exception level with SP_EL0.
+//
+// .org sets the offset relative to section start.
+//
+// # Safety
+//
+// - It must be ensured that `CALL_WITH_CONTEXT` <= 0x80 bytes.
+.org 0x000
+	CALL_WITH_CONTEXT current_el0_synchronous
+.org 0x080
+	CALL_WITH_CONTEXT current_el0_irq
+.org 0x100
+	FIQ_SUSPEND
+.org 0x180
+	CALL_WITH_CONTEXT current_el0_serror
+
+// Current exception level with SP_ELx, x > 0.
+.org 0x200
+	CALL_WITH_CONTEXT current_elx_synchronous
+.org 0x280
+	CALL_WITH_CONTEXT current_elx_irq
+.org 0x300
+	FIQ_SUSPEND
+.org 0x380
+	CALL_WITH_CONTEXT current_elx_serror
+
+// Lower exception level, AArch64
+.org 0x400
+	CALL_WITH_CONTEXT lower_aarch64_synchronous
+.org 0x480
+	CALL_WITH_CONTEXT lower_aarch64_irq
+.org 0x500
+	FIQ_SUSPEND
+.org 0x580
+	CALL_WITH_CONTEXT lower_aarch64_serror
+
+// Lower exception level, AArch32
+.org 0x600
+	CALL_WITH_CONTEXT lower_aarch32_synchronous
+.org 0x680
+	CALL_WITH_CONTEXT lower_aarch32_irq
+.org 0x700
+	FIQ_SUSPEND
+.org 0x780
+	CALL_WITH_CONTEXT lower_aarch32_serror
+.org 0x800
+
+//------------------------------------------------------------------------------
+// fn __exception_restore_context()
+//------------------------------------------------------------------------------
+__exception_restore_context:
+	ldr	w19,      [sp, #16 * 16]
+	ldp	lr,  x20, [sp, #16 * 15]
+
+	msr	SPSR_EL1, x19
+	msr	ELR_EL1,  x20
+
+	ldp	x0,  x1,  [sp, #16 * 0]
+	ldp	x2,  x3,  [sp, #16 * 1]
+	ldp	x4,  x5,  [sp, #16 * 2]
+	ldp	x6,  x7,  [sp, #16 * 3]
+	ldp	x8,  x9,  [sp, #16 * 4]
+	ldp	x10, x11, [sp, #16 * 5]
+	ldp	x12, x13, [sp, #16 * 6]
+	ldp	x14, x15, [sp, #16 * 7]
+	ldp	x16, x17, [sp, #16 * 8]
+	ldp	x18, x19, [sp, #16 * 9]
+	ldp	x20, x21, [sp, #16 * 10]
+	ldp	x22, x23, [sp, #16 * 11]
+	ldp	x24, x25, [sp, #16 * 12]
+	ldp	x26, x27, [sp, #16 * 13]
+	ldp	x28, x29, [sp, #16 * 14]
+
+	add	sp,  sp,  #16 * 17
+
+	eret
+
+.size	__exception_restore_context, . - __exception_restore_context
+.type	__exception_restore_context, function
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception/asynchronous.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception/asynchronous.rs
new file mode 100644
index 000000000..a4b1a548e
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception/asynchronous.rs
@@ -0,0 +1,150 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural asynchronous exception handling.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::exception::asynchronous::arch_asynchronous
+
+use cortex_a::regs::*;
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+mod daif_bits {
+    pub const IRQ: u8 = 0b0010;
+}
+
+trait DaifField {
+    fn daif_field() -> register::Field<u64, DAIF::Register>;
+}
+
+struct Debug;
+struct SError;
+struct IRQ;
+struct FIQ;
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl DaifField for Debug {
+    fn daif_field() -> register::Field<u64, DAIF::Register> {
+        DAIF::D
+    }
+}
+
+impl DaifField for SError {
+    fn daif_field() -> register::Field<u64, DAIF::Register> {
+        DAIF::A
+    }
+}
+
+impl DaifField for IRQ {
+    fn daif_field() -> register::Field<u64, DAIF::Register> {
+        DAIF::I
+    }
+}
+
+impl DaifField for FIQ {
+    fn daif_field() -> register::Field<u64, DAIF::Register> {
+        DAIF::F
+    }
+}
+
+fn is_masked<T>() -> bool
+where
+    T: DaifField,
+{
+    DAIF.is_set(T::daif_field())
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Returns whether IRQs are masked on the executing core.
+pub fn is_local_irq_masked() -> bool {
+    !is_masked::<IRQ>()
+}
+
+/// Unmask IRQs on the executing core.
+///
+/// It is not needed to place an explicit instruction synchronization barrier after the `msr`.
+/// Quoting the Architecture Reference Manual for ARMv8-A, section C5.1.3:
+///
+/// "Writes to PSTATE.{PAN, D, A, I, F} occur in program order without the need for additional
+/// synchronization."
+///
+/// # Safety
+///
+/// - Changes the HW state of the executing core.
+#[inline(always)]
+pub unsafe fn local_irq_unmask() {
+    #[rustfmt::skip]
+    asm!(
+        "msr DAIFClr, {arg}",
+        arg = const daif_bits::IRQ,
+        options(nomem, nostack, preserves_flags)
+    );
+}
+
+/// Mask IRQs on the executing core.
+///
+/// # Safety
+///
+/// - Changes the HW state of the executing core.
+#[inline(always)]
+pub unsafe fn local_irq_mask() {
+    #[rustfmt::skip]
+    asm!(
+        "msr DAIFSet, {arg}",
+        arg = const daif_bits::IRQ,
+        options(nomem, nostack, preserves_flags)
+    );
+}
+
+/// Mask IRQs on the executing core and return the previously saved interrupt mask bits (DAIF).
+///
+/// # Safety
+///
+/// - Changes the HW state of the executing core.
+#[inline(always)]
+pub unsafe fn local_irq_mask_save() -> u64 {
+    let saved = DAIF.get();
+    local_irq_mask();
+
+    saved
+}
+
+/// Restore the interrupt mask bits (DAIF) using the callee's argument.
+///
+/// # Safety
+///
+/// - Changes the HW state of the executing core.
+/// - No sanity checks on the input.
+#[inline(always)]
+pub unsafe fn local_irq_restore(saved: u64) {
+    DAIF.set(saved);
+}
+
+/// Print the AArch64 exceptions status.
+#[rustfmt::skip]
+pub fn print_state() {
+    use crate::info;
+
+    let to_mask_str = |x| -> _ {
+        if x { "Masked" } else { "Unmasked" }
+    };
+
+    info!("      Debug:  {}", to_mask_str(is_masked::<Debug>()));
+    info!("      SError: {}", to_mask_str(is_masked::<SError>()));
+    info!("      IRQ:    {}", to_mask_str(is_masked::<IRQ>()));
+    info!("      FIQ:    {}", to_mask_str(is_masked::<FIQ>()));
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu.rs
new file mode 100644
index 000000000..f9e3d59bd
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu.rs
@@ -0,0 +1,184 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Memory Management Unit Driver.
+//!
+//! Only 64 KiB granule is supported.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::memory::mmu::arch_mmu
+
+use crate::{
+    bsp, memory,
+    memory::{mmu::TranslationGranule, Address, Physical, Virtual},
+};
+use core::intrinsics::unlikely;
+use cortex_a::{barrier, regs::*};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Memory Management Unit type.
+struct MemoryManagementUnit;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub type Granule512MiB = TranslationGranule<{ 512 * 1024 * 1024 }>;
+pub type Granule64KiB = TranslationGranule<{ 64 * 1024 }>;
+
+/// Constants for indexing the MAIR_EL1.
+#[allow(dead_code)]
+pub mod mair {
+    pub const DEVICE: u64 = 0;
+    pub const NORMAL: u64 = 1;
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static MMU: MemoryManagementUnit = MemoryManagementUnit;
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl<const AS_SIZE: usize> memory::mmu::AddressSpace<AS_SIZE> {
+    /// Checks for architectural restrictions.
+    pub const fn arch_address_space_size_sanity_checks() {
+        // Size must be at least one full 512 MiB table.
+        assert!((AS_SIZE % Granule512MiB::SIZE) == 0);
+
+        // Check for 48 bit virtual address size as maximum, which is supported by any ARMv8
+        // version.
+        assert!(AS_SIZE <= (1 << 48));
+    }
+}
+
+impl MemoryManagementUnit {
+    /// Setup function for the MAIR_EL1 register.
+    #[inline(always)]
+    fn set_up_mair(&self) {
+        // Define the memory types being mapped.
+        MAIR_EL1.write(
+            // Attribute 1 - Cacheable normal DRAM.
+            MAIR_EL1::Attr1_Normal_Outer::WriteBack_NonTransient_ReadWriteAlloc +
+        MAIR_EL1::Attr1_Normal_Inner::WriteBack_NonTransient_ReadWriteAlloc +
+
+        // Attribute 0 - Device.
+        MAIR_EL1::Attr0_Device::nonGathering_nonReordering_EarlyWriteAck,
+        );
+    }
+
+    /// Configure various settings of stage 1 of the EL1 translation regime.
+    #[inline(always)]
+    fn configure_translation_control(&self) {
+        let t1sz = (64 - bsp::memory::mmu::KernelVirtAddrSpace::SIZE_SHIFT) as u64;
+
+        TCR_EL1.write(
+            TCR_EL1::TBI1::Used
+                + TCR_EL1::IPS::Bits_40
+                + TCR_EL1::TG1::KiB_64
+                + TCR_EL1::SH1::Inner
+                + TCR_EL1::ORGN1::WriteBack_ReadAlloc_WriteAlloc_Cacheable
+                + TCR_EL1::IRGN1::WriteBack_ReadAlloc_WriteAlloc_Cacheable
+                + TCR_EL1::EPD1::EnableTTBR1Walks
+                + TCR_EL1::A1::TTBR1
+                + TCR_EL1::T1SZ.val(t1sz)
+                + TCR_EL1::EPD0::DisableTTBR0Walks,
+        );
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the MMU instance.
+pub fn mmu() -> &'static impl memory::mmu::interface::MMU {
+    &MMU
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use memory::mmu::{MMUEnableError, TranslationError};
+
+impl memory::mmu::interface::MMU for MemoryManagementUnit {
+    unsafe fn enable_mmu_and_caching(
+        &self,
+        phys_tables_base_addr: Address<Physical>,
+    ) -> Result<(), MMUEnableError> {
+        if unlikely(self.is_enabled()) {
+            return Err(MMUEnableError::AlreadyEnabled);
+        }
+
+        // Fail early if translation granule is not supported.
+        if unlikely(!ID_AA64MMFR0_EL1.matches_all(ID_AA64MMFR0_EL1::TGran64::Supported)) {
+            return Err(MMUEnableError::Other(
+                "Translation granule not supported in HW",
+            ));
+        }
+
+        // Prepare the memory attribute indirection register.
+        self.set_up_mair();
+
+        // Set the "Translation Table Base Register".
+        TTBR1_EL1.set_baddr(phys_tables_base_addr.into_usize() as u64);
+
+        self.configure_translation_control();
+
+        // Switch the MMU on.
+        //
+        // First, force all previous changes to be seen before the MMU is enabled.
+        barrier::isb(barrier::SY);
+
+        // Enable the MMU and turn on data and instruction caching.
+        SCTLR_EL1.modify(SCTLR_EL1::M::Enable + SCTLR_EL1::C::Cacheable + SCTLR_EL1::I::Cacheable);
+
+        // Force MMU init to complete before next instruction.
+        barrier::isb(barrier::SY);
+
+        Ok(())
+    }
+
+    #[inline(always)]
+    fn is_enabled(&self) -> bool {
+        SCTLR_EL1.matches_all(SCTLR_EL1::M::Enable)
+    }
+
+    fn try_virt_to_phys(
+        &self,
+        virt: Address<Virtual>,
+    ) -> Result<Address<Physical>, TranslationError> {
+        if !self.is_enabled() {
+            return Err(TranslationError::MMUDisabled);
+        }
+
+        let addr = virt.into_usize() as u64;
+        unsafe {
+            asm!(
+            "AT S1E1R, {0}",
+            in(reg) addr,
+            options(readonly, nostack, preserves_flags)
+            );
+        }
+
+        let par_el1 = PAR_EL1.extract();
+        if par_el1.matches_all(PAR_EL1::F::TranslationAborted) {
+            return Err(TranslationError::Aborted);
+        }
+
+        let phys_addr = (par_el1.read(PAR_EL1::PA) << 12) | (addr & 0xFFF);
+
+        Ok(Address::new(phys_addr as usize))
+    }
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
new file mode 100644
index 000000000..a58a3bb9c
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -0,0 +1,505 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural translation table.
+//!
+//! Only 64 KiB granule is supported.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::memory::mmu::translation_table::arch_translation_table
+
+use crate::{
+    bsp, memory,
+    memory::{
+        mmu::{
+            arch_mmu::{Granule512MiB, Granule64KiB},
+            AccessPermissions, AttributeFields, MemAttributes, Page, PageSliceDescriptor,
+        },
+        Address, Physical, Virtual,
+    },
+};
+use core::convert::{self, TryInto};
+use register::{register_bitfields, InMemoryRegister};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+// A table descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-15.
+register_bitfields! {u64,
+    STAGE1_TABLE_DESCRIPTOR [
+        /// Physical address of the next descriptor.
+        NEXT_LEVEL_TABLE_ADDR_64KiB OFFSET(16) NUMBITS(32) [], // [47:16]
+
+        TYPE  OFFSET(1) NUMBITS(1) [
+            Block = 0,
+            Table = 1
+        ],
+
+        VALID OFFSET(0) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ]
+    ]
+}
+
+// A level 3 page descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-17.
+register_bitfields! {u64,
+    STAGE1_PAGE_DESCRIPTOR [
+        /// Unprivileged execute-never.
+        UXN      OFFSET(54) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
+        /// Privileged execute-never.
+        PXN      OFFSET(53) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
+        /// Physical address of the next table descriptor (lvl2) or the page descriptor (lvl3).
+        OUTPUT_ADDR_64KiB OFFSET(16) NUMBITS(32) [], // [47:16]
+
+        /// Access flag.
+        AF       OFFSET(10) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
+        /// Shareability field.
+        SH       OFFSET(8) NUMBITS(2) [
+            OuterShareable = 0b10,
+            InnerShareable = 0b11
+        ],
+
+        /// Access Permissions.
+        AP       OFFSET(6) NUMBITS(2) [
+            RW_EL1 = 0b00,
+            RW_EL1_EL0 = 0b01,
+            RO_EL1 = 0b10,
+            RO_EL1_EL0 = 0b11
+        ],
+
+        /// Memory attributes index into the MAIR_EL1 register.
+        AttrIndx OFFSET(2) NUMBITS(3) [],
+
+        TYPE     OFFSET(1) NUMBITS(1) [
+            Reserved_Invalid = 0,
+            Page = 1
+        ],
+
+        VALID    OFFSET(0) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ]
+    ]
+}
+
+/// A table descriptor for 64 KiB aperture.
+///
+/// The output points to the next table.
+#[derive(Copy, Clone)]
+#[repr(C)]
+struct TableDescriptor {
+    value: u64,
+}
+
+/// A page descriptor with 64 KiB aperture.
+///
+/// The output points to physical memory.
+#[derive(Copy, Clone)]
+#[repr(C)]
+struct PageDescriptor {
+    value: u64,
+}
+
+trait StartAddr {
+    fn virt_start_addr(&self) -> Address<Virtual>;
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Big monolithic struct for storing the translation tables. Individual levels must be 64 KiB
+/// aligned, so the lvl3 is put first.
+#[repr(C)]
+#[repr(align(65536))]
+pub struct FixedSizeTranslationTable<const NUM_TABLES: usize, const START_FROM_TOP: bool> {
+    /// Page descriptors, covering 64 KiB windows per entry.
+    lvl3: [[PageDescriptor; 8192]; NUM_TABLES],
+
+    /// Table descriptors, covering 512 MiB windows.
+    lvl2: [TableDescriptor; NUM_TABLES],
+
+    /// Index of the next free MMIO page.
+    cur_l3_mmio_index: usize,
+
+    /// Have the tables been initialized?
+    initialized: bool,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl<T, const N: usize> StartAddr for [T; N] {
+    fn virt_start_addr(&self) -> Address<Virtual> {
+        Address::new(self as *const _ as usize)
+    }
+}
+
+impl TableDescriptor {
+    /// Create an instance.
+    ///
+    /// Descriptor is invalid by default.
+    pub const fn new_zeroed() -> Self {
+        Self { value: 0 }
+    }
+
+    /// Create an instance pointing to the supplied address.
+    pub fn from_next_lvl_table_addr(phys_next_lvl_table_addr: Address<Physical>) -> Self {
+        let val = InMemoryRegister::<u64, STAGE1_TABLE_DESCRIPTOR::Register>::new(0);
+
+        let shifted = phys_next_lvl_table_addr.into_usize() >> Granule64KiB::SHIFT;
+        val.write(
+            STAGE1_TABLE_DESCRIPTOR::NEXT_LEVEL_TABLE_ADDR_64KiB.val(shifted as u64)
+                + STAGE1_TABLE_DESCRIPTOR::TYPE::Table
+                + STAGE1_TABLE_DESCRIPTOR::VALID::True,
+        );
+
+        TableDescriptor { value: val.get() }
+    }
+}
+
+/// Convert the kernel's generic memory attributes to HW-specific attributes of the MMU.
+impl convert::From<AttributeFields>
+    for register::FieldValue<u64, STAGE1_PAGE_DESCRIPTOR::Register>
+{
+    fn from(attribute_fields: AttributeFields) -> Self {
+        // Memory attributes.
+        let mut desc = match attribute_fields.mem_attributes {
+            MemAttributes::CacheableDRAM => {
+                STAGE1_PAGE_DESCRIPTOR::SH::InnerShareable
+                    + STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(memory::mmu::arch_mmu::mair::NORMAL)
+            }
+            MemAttributes::Device => {
+                STAGE1_PAGE_DESCRIPTOR::SH::OuterShareable
+                    + STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(memory::mmu::arch_mmu::mair::DEVICE)
+            }
+        };
+
+        // Access Permissions.
+        desc += match attribute_fields.acc_perms {
+            AccessPermissions::ReadOnly => STAGE1_PAGE_DESCRIPTOR::AP::RO_EL1,
+            AccessPermissions::ReadWrite => STAGE1_PAGE_DESCRIPTOR::AP::RW_EL1,
+        };
+
+        // The execute-never attribute is mapped to PXN in AArch64.
+        desc += if attribute_fields.execute_never {
+            STAGE1_PAGE_DESCRIPTOR::PXN::True
+        } else {
+            STAGE1_PAGE_DESCRIPTOR::PXN::False
+        };
+
+        // Always set unprivileged exectue-never as long as userspace is not implemented yet.
+        desc += STAGE1_PAGE_DESCRIPTOR::UXN::True;
+
+        desc
+    }
+}
+
+impl PageDescriptor {
+    /// Create an instance.
+    ///
+    /// Descriptor is invalid by default.
+    pub const fn new_zeroed() -> Self {
+        Self { value: 0 }
+    }
+
+    /// Create an instance.
+    pub fn from_output_addr(
+        phys_output_addr: *const Page<Physical>,
+        attribute_fields: &AttributeFields,
+    ) -> Self {
+        let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
+
+        let shifted = phys_output_addr as u64 >> Granule64KiB::SHIFT;
+        val.write(
+            STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted)
+                + STAGE1_PAGE_DESCRIPTOR::AF::True
+                + STAGE1_PAGE_DESCRIPTOR::TYPE::Page
+                + STAGE1_PAGE_DESCRIPTOR::VALID::True
+                + attribute_fields.clone().into(),
+        );
+
+        Self { value: val.get() }
+    }
+
+    /// Returns the valid bit.
+    fn is_valid(&self) -> bool {
+        InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(self.value)
+            .is_set(STAGE1_PAGE_DESCRIPTOR::VALID)
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl<const AS_SIZE: usize> memory::mmu::AssociatedTranslationTable
+    for memory::mmu::AddressSpace<AS_SIZE>
+where
+    [u8; Self::SIZE >> Granule512MiB::SHIFT]: Sized,
+{
+    type TableStartFromTop =
+        FixedSizeTranslationTable<{ Self::SIZE >> Granule512MiB::SHIFT }, true>;
+
+    type TableStartFromBottom =
+        FixedSizeTranslationTable<{ Self::SIZE >> Granule512MiB::SHIFT }, false>;
+}
+
+impl<const NUM_TABLES: usize, const START_FROM_TOP: bool>
+    FixedSizeTranslationTable<NUM_TABLES, START_FROM_TOP>
+{
+    // Reserve the last 256 MiB of the address space for MMIO mappings.
+    const L2_MMIO_START_INDEX: usize = NUM_TABLES - 1;
+    const L3_MMIO_START_INDEX: usize = 8192 / 2;
+
+    const START_FROM_TOP_OFFSET: Address<Virtual> =
+        Address::new((usize::MAX - (Granule512MiB::SIZE * NUM_TABLES)) + 1);
+
+    /// Create an instance.
+    #[allow(clippy::assertions_on_constants)]
+    const fn _new(for_precompute: bool) -> Self {
+        assert!(bsp::memory::mmu::KernelGranule::SIZE == Granule64KiB::SIZE);
+
+        // Can't have a zero-sized address space.
+        assert!(NUM_TABLES > 0);
+
+        Self {
+            lvl3: [[PageDescriptor::new_zeroed(); 8192]; NUM_TABLES],
+            lvl2: [TableDescriptor::new_zeroed(); NUM_TABLES],
+            cur_l3_mmio_index: Self::L3_MMIO_START_INDEX,
+            initialized: for_precompute,
+        }
+    }
+
+    pub const fn new_for_precompute() -> Self {
+        Self::_new(true)
+    }
+
+    #[cfg(test)]
+    pub fn new_for_runtime() -> Self {
+        Self::_new(false)
+    }
+
+    /// The start address of the table's MMIO range.
+    #[inline(always)]
+    fn mmio_start_addr(&self) -> Address<Virtual> {
+        let mut addr = Address::new(
+            (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
+                | (Self::L3_MMIO_START_INDEX << Granule64KiB::SHIFT),
+        );
+
+        if START_FROM_TOP {
+            addr += Self::START_FROM_TOP_OFFSET;
+        }
+
+        addr
+    }
+
+    /// The inclusive end address of the table's MMIO range.
+    #[inline(always)]
+    fn mmio_end_addr_inclusive(&self) -> Address<Virtual> {
+        let mut addr = Address::new(
+            (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
+                | (8191 << Granule64KiB::SHIFT)
+                | (Granule64KiB::SIZE - 1),
+        );
+
+        if START_FROM_TOP {
+            addr += Self::START_FROM_TOP_OFFSET;
+        }
+
+        addr
+    }
+
+    /// Helper to calculate the lvl2 and lvl3 indices from an address.
+    #[inline(always)]
+    fn lvl2_lvl3_index_from(
+        &self,
+        addr: *const Page<Virtual>,
+    ) -> Result<(usize, usize), &'static str> {
+        let mut addr = addr as usize;
+
+        if START_FROM_TOP {
+            addr -= Self::START_FROM_TOP_OFFSET.into_usize()
+        }
+
+        let lvl2_index = addr >> Granule512MiB::SHIFT;
+        let lvl3_index = (addr & Granule512MiB::MASK) >> Granule64KiB::SHIFT;
+
+        if lvl2_index > (NUM_TABLES - 1) {
+            return Err("Virtual page is out of bounds of translation table");
+        }
+
+        Ok((lvl2_index, lvl3_index))
+    }
+
+    /// Returns the PageDescriptor corresponding to the supplied Page.
+    #[inline(always)]
+    fn page_descriptor_from(
+        &mut self,
+        addr: *const Page<Virtual>,
+    ) -> Result<&mut PageDescriptor, &'static str> {
+        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from(addr)?;
+
+        Ok(&mut self.lvl3[lvl2_index][lvl3_index])
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+
+impl<const NUM_TABLES: usize, const START_FROM_TOP: bool>
+    memory::mmu::translation_table::interface::TranslationTable
+    for FixedSizeTranslationTable<NUM_TABLES, START_FROM_TOP>
+{
+    fn init(&mut self) -> Result<(), &'static str> {
+        if self.initialized {
+            return Ok(());
+        }
+
+        // Populate the l2 entries.
+        for (lvl2_nr, lvl2_entry) in self.lvl2.iter_mut().enumerate() {
+            let addr = self.lvl3[lvl2_nr]
+                .virt_start_addr()
+                .try_into()
+                .map_err(|_| "Translation error")?;
+
+            let desc = TableDescriptor::from_next_lvl_table_addr(addr);
+            *lvl2_entry = desc;
+        }
+
+        self.cur_l3_mmio_index = Self::L3_MMIO_START_INDEX;
+        self.initialized = true;
+
+        Ok(())
+    }
+
+    unsafe fn map_pages_at(
+        &mut self,
+        virt_pages: &PageSliceDescriptor<Virtual>,
+        phys_pages: &PageSliceDescriptor<Physical>,
+        attr: &AttributeFields,
+    ) -> Result<(), &'static str> {
+        assert_eq!(self.initialized, true, "Translation tables not initialized");
+
+        let p = phys_pages.as_slice();
+        let v = virt_pages.as_slice();
+
+        // No work to do for empty slices.
+        if v.is_empty() {
+            return Ok(());
+        }
+
+        if v.len() != p.len() {
+            return Err("Tried to map page slices with unequal sizes");
+        }
+
+        if p.last().unwrap().as_ptr() >= bsp::memory::mmu::phys_addr_space_end_page() {
+            return Err("Tried to map outside of physical address space");
+        }
+
+        let iter = p.iter().zip(v.iter());
+        for (phys_page, virt_page) in iter {
+            let page_descriptor = self.page_descriptor_from(virt_page.as_ptr())?;
+            if page_descriptor.is_valid() {
+                return Err("Virtual page is already mapped");
+            }
+
+            *page_descriptor = PageDescriptor::from_output_addr(phys_page.as_ptr(), &attr);
+        }
+
+        Ok(())
+    }
+
+    fn next_mmio_virt_page_slice(
+        &mut self,
+        num_pages: usize,
+    ) -> Result<PageSliceDescriptor<Virtual>, &'static str> {
+        assert_eq!(self.initialized, true, "Translation tables not initialized");
+
+        if num_pages == 0 {
+            return Err("num_pages == 0");
+        }
+
+        if (self.cur_l3_mmio_index + num_pages) > 8191 {
+            return Err("Not enough MMIO space left");
+        }
+
+        let mut addr = Address::new(
+            (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
+                | (self.cur_l3_mmio_index << Granule64KiB::SHIFT),
+        );
+        self.cur_l3_mmio_index += num_pages;
+
+        if START_FROM_TOP {
+            addr += Self::START_FROM_TOP_OFFSET;
+        }
+
+        Ok(PageSliceDescriptor::from_addr(addr, num_pages))
+    }
+
+    fn is_virt_page_slice_mmio(&self, virt_pages: &PageSliceDescriptor<Virtual>) -> bool {
+        let start_addr = virt_pages.start_addr();
+        let end_addr_inclusive = virt_pages.end_addr_inclusive();
+
+        for i in [start_addr, end_addr_inclusive].iter() {
+            if (*i >= self.mmio_start_addr()) && (*i <= self.mmio_end_addr_inclusive()) {
+                return true;
+            }
+        }
+
+        false
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+pub type MinSizeTranslationTable = FixedSizeTranslationTable<1, false>;
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// Check if the size of `struct TableDescriptor` is as expected.
+    #[kernel_test]
+    fn size_of_tabledescriptor_equals_64_bit() {
+        assert_eq!(
+            core::mem::size_of::<TableDescriptor>(),
+            core::mem::size_of::<u64>()
+        );
+    }
+
+    /// Check if the size of `struct PageDescriptor` is as expected.
+    #[kernel_test]
+    fn size_of_pagedescriptor_equals_64_bit() {
+        assert_eq!(
+            core::mem::size_of::<PageDescriptor>(),
+            core::mem::size_of::<u64>()
+        );
+    }
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/time.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/time.rs
new file mode 100644
index 000000000..63017305b
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/time.rs
@@ -0,0 +1,118 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural timer primitives.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::time::arch_time
+
+use crate::{time, warn};
+use core::time::Duration;
+use cortex_a::{barrier, regs::*};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+const NS_PER_S: u64 = 1_000_000_000;
+
+/// ARMv8 Generic Timer.
+struct GenericTimer;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static TIME_MANAGER: GenericTimer = GenericTimer;
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl GenericTimer {
+    #[inline(always)]
+    fn read_cntpct(&self) -> u64 {
+        // Prevent that the counter is read ahead of time due to out-of-order execution.
+        unsafe { barrier::isb(barrier::SY) };
+        CNTPCT_EL0.get()
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the time manager.
+pub fn time_manager() -> &'static impl time::interface::TimeManager {
+    &TIME_MANAGER
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+
+impl time::interface::TimeManager for GenericTimer {
+    fn resolution(&self) -> Duration {
+        Duration::from_nanos(NS_PER_S / (CNTFRQ_EL0.get() as u64))
+    }
+
+    fn uptime(&self) -> Duration {
+        let current_count: u64 = self.read_cntpct() * NS_PER_S;
+        let frq: u64 = CNTFRQ_EL0.get() as u64;
+
+        Duration::from_nanos(current_count / frq)
+    }
+
+    fn spin_for(&self, duration: Duration) {
+        // Instantly return on zero.
+        if duration.as_nanos() == 0 {
+            return;
+        }
+
+        // Calculate the register compare value.
+        let frq = CNTFRQ_EL0.get();
+        let x = match frq.checked_mul(duration.as_nanos() as u64) {
+            None => {
+                warn!("Spin duration too long, skipping");
+                return;
+            }
+            Some(val) => val,
+        };
+        let tval = x / NS_PER_S;
+
+        // Check if it is within supported bounds.
+        let warn: Option<&str> = if tval == 0 {
+            Some("smaller")
+        // The upper 32 bits of CNTP_TVAL_EL0 are reserved.
+        } else if tval > u32::max_value().into() {
+            Some("bigger")
+        } else {
+            None
+        };
+
+        if let Some(w) = warn {
+            warn!(
+                "Spin duration {} than architecturally supported, skipping",
+                w
+            );
+            return;
+        }
+
+        // Set the compare value register.
+        CNTP_TVAL_EL0.set(tval);
+
+        // Kick off the counting.                       // Disable timer interrupt.
+        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::SET + CNTP_CTL_EL0::IMASK::SET);
+
+        // ISTATUS will be '1' when cval ticks have passed. Busy-check it.
+        while !CNTP_CTL_EL0.matches_all(CNTP_CTL_EL0::ISTATUS::SET) {}
+
+        // Disable counting again.
+        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::CLEAR);
+    }
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp.rs
new file mode 100644
index 000000000..c558922f7
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp.rs
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Conditional reexporting of Board Support Packages.
+
+mod device_driver;
+
+#[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
+mod raspberrypi;
+
+#[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
+pub use raspberrypi::*;
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver.rs
new file mode 100644
index 000000000..eac6bdd16
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver.rs
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Device driver.
+
+#[cfg(feature = "bsp_rpi4")]
+mod arm;
+#[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
+mod bcm;
+mod common;
+
+#[cfg(feature = "bsp_rpi4")]
+pub use arm::*;
+#[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
+pub use bcm::*;
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm.rs
new file mode 100644
index 000000000..0bb1bd4b6
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! ARM driver top level.
+
+pub mod gicv2;
+
+pub use gicv2::*;
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2.rs
new file mode 100644
index 000000000..51c321868
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2.rs
@@ -0,0 +1,248 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! GICv2 Driver - ARM Generic Interrupt Controller v2.
+//!
+//! The following is a collection of excerpts with useful information from
+//!   - `Programmer's Guide for ARMv8-A`
+//!   - `ARM Generic Interrupt Controller Architecture Specification`
+//!
+//! # Programmer's Guide - 10.6.1 Configuration
+//!
+//! The GIC is accessed as a memory-mapped peripheral.
+//!
+//! All cores can access the common Distributor, but the CPU interface is banked, that is, each core
+//! uses the same address to access its own private CPU interface.
+//!
+//! It is not possible for a core to access the CPU interface of another core.
+//!
+//! # Architecture Specification - 10.6.2 Initialization
+//!
+//! Both the Distributor and the CPU interfaces are disabled at reset. The GIC must be initialized
+//! after reset before it can deliver interrupts to the core.
+//!
+//! In the Distributor, software must configure the priority, target, security and enable individual
+//! interrupts. The Distributor must subsequently be enabled through its control register
+//! (GICD_CTLR). For each CPU interface, software must program the priority mask and preemption
+//! settings.
+//!
+//! Each CPU interface block itself must be enabled through its control register (GICD_CTLR). This
+//! prepares the GIC to deliver interrupts to the core.
+//!
+//! Before interrupts are expected in the core, software prepares the core to take interrupts by
+//! setting a valid interrupt vector in the vector table, and clearing interrupt mask bits in
+//! PSTATE, and setting the routing controls.
+//!
+//! The entire interrupt mechanism in the system can be disabled by disabling the Distributor.
+//! Interrupt delivery to an individual core can be disabled by disabling its CPU interface.
+//! Individual interrupts can also be disabled (or enabled) in the distributor.
+//!
+//! For an interrupt to reach the core, the individual interrupt, Distributor and CPU interface must
+//! all be enabled. The interrupt also needs to be of sufficient priority, that is, higher than the
+//! core's priority mask.
+//!
+//! # Architecture Specification - 1.4.2 Interrupt types
+//!
+//! - Peripheral interrupt
+//!     - Private Peripheral Interrupt (PPI)
+//!         - This is a peripheral interrupt that is specific to a single processor.
+//!     - Shared Peripheral Interrupt (SPI)
+//!         - This is a peripheral interrupt that the Distributor can route to any of a specified
+//!           combination of processors.
+//!
+//! - Software-generated interrupt (SGI)
+//!     - This is an interrupt generated by software writing to a GICD_SGIR register in the GIC. The
+//!       system uses SGIs for interprocessor communication.
+//!     - An SGI has edge-triggered properties. The software triggering of the interrupt is
+//!       equivalent to the edge transition of the interrupt request signal.
+//!     - When an SGI occurs in a multiprocessor implementation, the CPUID field in the Interrupt
+//!       Acknowledge Register, GICC_IAR, or the Aliased Interrupt Acknowledge Register, GICC_AIAR,
+//!       identifies the processor that requested the interrupt.
+//!
+//! # Architecture Specification - 2.2.1 Interrupt IDs
+//!
+//! Interrupts from sources are identified using ID numbers. Each CPU interface can see up to 1020
+//! interrupts. The banking of SPIs and PPIs increases the total number of interrupts supported by
+//! the Distributor.
+//!
+//! The GIC assigns interrupt ID numbers ID0-ID1019 as follows:
+//!   - Interrupt numbers 32..1019 are used for SPIs.
+//!   - Interrupt numbers 0..31 are used for interrupts that are private to a CPU interface. These
+//!     interrupts are banked in the Distributor.
+//!       - A banked interrupt is one where the Distributor can have multiple interrupts with the
+//!         same ID. A banked interrupt is identified uniquely by its ID number and its associated
+//!         CPU interface number. Of the banked interrupt IDs:
+//!           - 00..15 SGIs
+//!           - 16..31 PPIs
+
+mod gicc;
+mod gicd;
+
+use crate::{bsp, cpu, driver, exception, memory, synchronization, synchronization::InitStateLock};
+use core::sync::atomic::{AtomicBool, Ordering};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; GICv2::NUM_IRQS];
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Used for the associated type of trait [`exception::asynchronous::interface::IRQManager`].
+pub type IRQNumber = exception::asynchronous::IRQNumber<{ GICv2::MAX_IRQ_NUMBER }>;
+
+/// Representation of the GIC.
+pub struct GICv2 {
+    gicd_mmio_descriptor: memory::mmu::MMIODescriptor,
+    gicc_mmio_descriptor: memory::mmu::MMIODescriptor,
+
+    /// The Distributor.
+    gicd: gicd::GICD,
+
+    /// The CPU Interface.
+    gicc: gicc::GICC,
+
+    /// Have the MMIO regions been remapped yet?
+    is_mmio_remapped: AtomicBool,
+
+    /// Stores registered IRQ handlers. Writable only during kernel init. RO afterwards.
+    handler_table: InitStateLock<HandlerTable>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl GICv2 {
+    const MAX_IRQ_NUMBER: usize = 300; // Normally 1019, but keep it lower to save some space.
+    const NUM_IRQS: usize = Self::MAX_IRQ_NUMBER + 1;
+
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide correct MMIO descriptors.
+    pub const unsafe fn new(
+        gicd_mmio_descriptor: memory::mmu::MMIODescriptor,
+        gicc_mmio_descriptor: memory::mmu::MMIODescriptor,
+    ) -> Self {
+        Self {
+            gicd_mmio_descriptor,
+            gicc_mmio_descriptor,
+            gicd: gicd::GICD::new(gicd_mmio_descriptor.start_addr().into_usize()),
+            gicc: gicc::GICC::new(gicc_mmio_descriptor.start_addr().into_usize()),
+            is_mmio_remapped: AtomicBool::new(false),
+            handler_table: InitStateLock::new([None; Self::NUM_IRQS]),
+        }
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use synchronization::interface::ReadWriteEx;
+
+impl driver::interface::DeviceDriver for GICv2 {
+    fn compatible(&self) -> &'static str {
+        "GICv2 (ARM Generic Interrupt Controller v2)"
+    }
+
+    unsafe fn init(&self) -> Result<(), &'static str> {
+        let remapped = self.is_mmio_remapped.load(Ordering::Relaxed);
+        if !remapped {
+            let mut virt_addr;
+
+            // GICD
+            virt_addr = memory::mmu::kernel_map_mmio("GICD", &self.gicd_mmio_descriptor)?;
+            self.gicd.set_mmio(virt_addr.into_usize());
+
+            // GICC
+            virt_addr = memory::mmu::kernel_map_mmio("GICC", &self.gicc_mmio_descriptor)?;
+            self.gicc.set_mmio(virt_addr.into_usize());
+
+            // Conclude remapping.
+            self.is_mmio_remapped.store(true, Ordering::Relaxed);
+        }
+
+        if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
+            self.gicd.boot_core_init();
+        }
+
+        self.gicc.priority_accept_all();
+        self.gicc.enable();
+
+        Ok(())
+    }
+}
+
+impl exception::asynchronous::interface::IRQManager for GICv2 {
+    type IRQNumberType = IRQNumber;
+
+    fn register_handler(
+        &self,
+        irq_number: Self::IRQNumberType,
+        descriptor: exception::asynchronous::IRQDescriptor,
+    ) -> Result<(), &'static str> {
+        self.handler_table.write(|table| {
+            let irq_number = irq_number.get();
+
+            if table[irq_number].is_some() {
+                return Err("IRQ handler already registered");
+            }
+
+            table[irq_number] = Some(descriptor);
+
+            Ok(())
+        })
+    }
+
+    fn enable(&self, irq_number: Self::IRQNumberType) {
+        self.gicd.enable(irq_number);
+    }
+
+    fn handle_pending_irqs<'irq_context>(
+        &'irq_context self,
+        ic: &exception::asynchronous::IRQContext<'irq_context>,
+    ) {
+        // Extract the highest priority pending IRQ number from the Interrupt Acknowledge Register
+        // (IAR).
+        let irq_number = self.gicc.pending_irq_number(ic);
+
+        // Guard against spurious interrupts.
+        if irq_number > GICv2::MAX_IRQ_NUMBER {
+            return;
+        }
+
+        // Call the IRQ handler. Panic if there is none.
+        self.handler_table.read(|table| {
+            match table[irq_number] {
+                None => panic!("No handler registered for IRQ {}", irq_number),
+                Some(descriptor) => {
+                    // Call the IRQ handler. Panics on failure.
+                    descriptor.handler.handle().expect("Error handling IRQ");
+                }
+            }
+        });
+
+        // Signal completion of handling.
+        self.gicc.mark_comleted(irq_number as u32, ic);
+    }
+
+    fn print_handler(&self) {
+        use crate::info;
+
+        info!("      Peripheral handler:");
+
+        self.handler_table.read(|table| {
+            for (i, opt) in table.iter().skip(32).enumerate() {
+                if let Some(handler) = opt {
+                    info!("            {: >3}. {}", i + 32, handler.name);
+                }
+            }
+        });
+    }
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2/gicc.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
new file mode 100644
index 000000000..a1279f956
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
@@ -0,0 +1,152 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! GICC Driver - GIC CPU interface.
+
+use crate::{
+    bsp::device_driver::common::MMIODerefWrapper, exception, synchronization::InitStateLock,
+};
+use register::{mmio::*, register_bitfields, register_structs};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+register_bitfields! {
+    u32,
+
+    /// CPU Interface Control Register
+    CTLR [
+        Enable OFFSET(0) NUMBITS(1) []
+    ],
+
+    /// Interrupt Priority Mask Register
+    PMR [
+        Priority OFFSET(0) NUMBITS(8) []
+    ],
+
+    /// Interrupt Acknowledge Register
+    IAR [
+        InterruptID OFFSET(0) NUMBITS(10) []
+    ],
+
+    /// End of Interrupt Register
+    EOIR [
+        EOIINTID OFFSET(0) NUMBITS(10) []
+    ]
+}
+
+register_structs! {
+    #[allow(non_snake_case)]
+    pub RegisterBlock {
+        (0x000 => CTLR: ReadWrite<u32, CTLR::Register>),
+        (0x004 => PMR: ReadWrite<u32, PMR::Register>),
+        (0x008 => _reserved1),
+        (0x00C => IAR: ReadWrite<u32, IAR::Register>),
+        (0x010 => EOIR: ReadWrite<u32, EOIR::Register>),
+        (0x014  => @END),
+    }
+}
+
+/// Abstraction for the associated MMIO registers.
+type Registers = MMIODerefWrapper<RegisterBlock>;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Representation of the GIC CPU interface.
+pub struct GICC {
+    registers: InitStateLock<Registers>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+use crate::synchronization::interface::ReadWriteEx;
+
+impl GICC {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+        Self {
+            registers: InitStateLock::new(Registers::new(mmio_start_addr)),
+        }
+    }
+
+    pub unsafe fn set_mmio(&self, new_mmio_start_addr: usize) {
+        self.registers
+            .write(|regs| *regs = Registers::new(new_mmio_start_addr));
+    }
+
+    /// Accept interrupts of any priority.
+    ///
+    /// Quoting the GICv2 Architecture Specification:
+    ///
+    ///   "Writing 255 to the GICC_PMR always sets it to the largest supported priority field
+    ///    value."
+    ///
+    /// # Safety
+    ///
+    /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
+    ///   of `&mut self`.
+    pub fn priority_accept_all(&self) {
+        self.registers.read(|regs| {
+            regs.PMR.write(PMR::Priority.val(255)); // Comment in arch spec.
+        });
+    }
+
+    /// Enable the interface - start accepting IRQs.
+    ///
+    /// # Safety
+    ///
+    /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
+    ///   of `&mut self`.
+    pub fn enable(&self) {
+        self.registers.read(|regs| {
+            regs.CTLR.write(CTLR::Enable::SET);
+        });
+    }
+
+    /// Extract the number of the highest-priority pending IRQ.
+    ///
+    /// Can only be called from IRQ context, which is ensured by taking an `IRQContext` token.
+    ///
+    /// # Safety
+    ///
+    /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
+    ///   of `&mut self`.
+    #[allow(clippy::trivially_copy_pass_by_ref)]
+    pub fn pending_irq_number<'irq_context>(
+        &self,
+        _ic: &exception::asynchronous::IRQContext<'irq_context>,
+    ) -> usize {
+        self.registers
+            .read(|regs| regs.IAR.read(IAR::InterruptID) as usize)
+    }
+
+    /// Complete handling of the currently active IRQ.
+    ///
+    /// Can only be called from IRQ context, which is ensured by taking an `IRQContext` token.
+    ///
+    /// To be called after `pending_irq_number()`.
+    ///
+    /// # Safety
+    ///
+    /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
+    ///   of `&mut self`.
+    #[allow(clippy::trivially_copy_pass_by_ref)]
+    pub fn mark_comleted<'irq_context>(
+        &self,
+        irq_number: u32,
+        _ic: &exception::asynchronous::IRQContext<'irq_context>,
+    ) {
+        self.registers.read(|regs| {
+            regs.EOIR.write(EOIR::EOIINTID.val(irq_number));
+        });
+    }
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2/gicd.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
new file mode 100644
index 000000000..5f56e54a1
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -0,0 +1,205 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! GICD Driver - GIC Distributor.
+//!
+//! # Glossary
+//!   - SPI - Shared Peripheral Interrupt.
+
+use crate::{
+    bsp::device_driver::common::MMIODerefWrapper,
+    state, synchronization,
+    synchronization::{IRQSafeNullLock, InitStateLock},
+};
+use register::{mmio::*, register_bitfields, register_structs};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+register_bitfields! {
+    u32,
+
+    /// Distributor Control Register
+    CTLR [
+        Enable OFFSET(0) NUMBITS(1) []
+    ],
+
+    /// Interrupt Controller Type Register
+    TYPER [
+        ITLinesNumber OFFSET(0)  NUMBITS(5) []
+    ],
+
+    /// Interrupt Processor Targets Registers
+    ITARGETSR [
+        Offset3 OFFSET(24) NUMBITS(8) [],
+        Offset2 OFFSET(16) NUMBITS(8) [],
+        Offset1 OFFSET(8)  NUMBITS(8) [],
+        Offset0 OFFSET(0)  NUMBITS(8) []
+    ]
+}
+
+register_structs! {
+    #[allow(non_snake_case)]
+    SharedRegisterBlock {
+        (0x000 => CTLR: ReadWrite<u32, CTLR::Register>),
+        (0x004 => TYPER: ReadOnly<u32, TYPER::Register>),
+        (0x008 => _reserved1),
+        (0x104 => ISENABLER: [ReadWrite<u32>; 31]),
+        (0x108 => _reserved2),
+        (0x820 => ITARGETSR: [ReadWrite<u32, ITARGETSR::Register>; 248]),
+        (0x824 => @END),
+    }
+}
+
+register_structs! {
+    #[allow(non_snake_case)]
+    BankedRegisterBlock {
+        (0x000 => _reserved1),
+        (0x100 => ISENABLER: ReadWrite<u32>),
+        (0x104 => _reserved2),
+        (0x800 => ITARGETSR: [ReadOnly<u32, ITARGETSR::Register>; 8]),
+        (0x804 => @END),
+    }
+}
+
+/// Abstraction for the non-banked parts of the associated MMIO registers.
+type SharedRegisters = MMIODerefWrapper<SharedRegisterBlock>;
+
+/// Abstraction for the banked parts of the associated MMIO registers.
+type BankedRegisters = MMIODerefWrapper<BankedRegisterBlock>;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Representation of the GIC Distributor.
+pub struct GICD {
+    /// Access to shared registers is guarded with a lock.
+    shared_registers: IRQSafeNullLock<SharedRegisters>,
+
+    /// Access to banked registers is unguarded.
+    banked_registers: InitStateLock<BankedRegisters>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl SharedRegisters {
+    /// Return the number of IRQs that this HW implements.
+    #[inline(always)]
+    fn num_irqs(&mut self) -> usize {
+        // Query number of implemented IRQs.
+        //
+        // Refer to GICv2 Architecture Specification, Section 4.3.2.
+        ((self.TYPER.read(TYPER::ITLinesNumber) as usize) + 1) * 32
+    }
+
+    /// Return a slice of the implemented ITARGETSR.
+    #[inline(always)]
+    fn implemented_itargets_slice(&mut self) -> &[ReadWrite<u32, ITARGETSR::Register>] {
+        assert!(self.num_irqs() >= 36);
+
+        // Calculate the max index of the shared ITARGETSR array.
+        //
+        // The first 32 IRQs are private, so not included in `shared_registers`. Each ITARGETS
+        // register has four entries, so shift right by two. Subtract one because we start
+        // counting at zero.
+        let spi_itargetsr_max_index = ((self.num_irqs() - 32) >> 2) - 1;
+
+        // Rust automatically inserts slice range sanity check, i.e. max >= min.
+        &self.ITARGETSR[0..spi_itargetsr_max_index]
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+use crate::synchronization::interface::ReadWriteEx;
+use synchronization::interface::Mutex;
+
+impl GICD {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+        Self {
+            shared_registers: IRQSafeNullLock::new(SharedRegisters::new(mmio_start_addr)),
+            banked_registers: InitStateLock::new(BankedRegisters::new(mmio_start_addr)),
+        }
+    }
+
+    pub unsafe fn set_mmio(&self, new_mmio_start_addr: usize) {
+        self.shared_registers
+            .lock(|regs| *regs = SharedRegisters::new(new_mmio_start_addr));
+        self.banked_registers
+            .write(|regs| *regs = BankedRegisters::new(new_mmio_start_addr));
+    }
+
+    /// Use a banked ITARGETSR to retrieve the executing core's GIC target mask.
+    ///
+    /// Quoting the GICv2 Architecture Specification:
+    ///
+    ///   "GICD_ITARGETSR0 to GICD_ITARGETSR7 are read-only, and each field returns a value that
+    ///    corresponds only to the processor reading the register."
+    fn local_gic_target_mask(&self) -> u32 {
+        self.banked_registers
+            .read(|regs| regs.ITARGETSR[0].read(ITARGETSR::Offset0))
+    }
+
+    /// Route all SPIs to the boot core and enable the distributor.
+    pub fn boot_core_init(&self) {
+        assert!(
+            state::state_manager().is_init(),
+            "Only allowed during kernel init phase"
+        );
+
+        // Target all SPIs to the boot core only.
+        let mask = self.local_gic_target_mask();
+
+        self.shared_registers.lock(|regs| {
+            for i in regs.implemented_itargets_slice().iter() {
+                i.write(
+                    ITARGETSR::Offset3.val(mask)
+                        + ITARGETSR::Offset2.val(mask)
+                        + ITARGETSR::Offset1.val(mask)
+                        + ITARGETSR::Offset0.val(mask),
+                );
+            }
+
+            regs.CTLR.write(CTLR::Enable::SET);
+        });
+    }
+
+    /// Enable an interrupt.
+    pub fn enable(&self, irq_num: super::IRQNumber) {
+        let irq_num = irq_num.get();
+
+        // Each bit in the u32 enable register corresponds to one IRQ number. Shift right by 5
+        // (division by 32) and arrive at the index for the respective ISENABLER[i].
+        let enable_reg_index = irq_num >> 5;
+        let enable_bit: u32 = 1u32 << (irq_num % 32);
+
+        // Check if we are handling a private or shared IRQ.
+        match irq_num {
+            // Private.
+            0..=31 => self.banked_registers.read(|regs| {
+                let enable_reg = &regs.ISENABLER;
+                enable_reg.set(enable_reg.get() | enable_bit);
+            }),
+            // Shared.
+            _ => {
+                let enable_reg_index_shared = enable_reg_index - 1;
+
+                self.shared_registers.lock(|regs| {
+                    let enable_reg = &regs.ISENABLER[enable_reg_index_shared];
+                    enable_reg.set(enable_reg.get() | enable_bit);
+                });
+            }
+        }
+    }
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm.rs
new file mode 100644
index 000000000..01bcaa895
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm.rs
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! BCM driver top level.
+
+mod bcm2xxx_gpio;
+#[cfg(feature = "bsp_rpi3")]
+mod bcm2xxx_interrupt_controller;
+mod bcm2xxx_pl011_uart;
+
+pub use bcm2xxx_gpio::*;
+#[cfg(feature = "bsp_rpi3")]
+pub use bcm2xxx_interrupt_controller::*;
+pub use bcm2xxx_pl011_uart::*;
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
new file mode 100644
index 000000000..e444812ba
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -0,0 +1,255 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! GPIO Driver.
+
+use crate::{
+    bsp::device_driver::common::MMIODerefWrapper, driver, memory, synchronization,
+    synchronization::IRQSafeNullLock,
+};
+use core::sync::atomic::{AtomicUsize, Ordering};
+use register::{mmio::*, register_bitfields, register_structs};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+// GPIO registers.
+//
+// Descriptions taken from
+// - https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
+// - https://datasheets.raspberrypi.org/bcm2711/bcm2711-peripherals.pdf
+register_bitfields! {
+    u32,
+
+    /// GPIO Function Select 1
+    GPFSEL1 [
+        /// Pin 15
+        FSEL15 OFFSET(15) NUMBITS(3) [
+            Input = 0b000,
+            Output = 0b001,
+            AltFunc0 = 0b100  // PL011 UART RX
+
+        ],
+
+        /// Pin 14
+        FSEL14 OFFSET(12) NUMBITS(3) [
+            Input = 0b000,
+            Output = 0b001,
+            AltFunc0 = 0b100  // PL011 UART TX
+        ]
+    ],
+
+    /// GPIO Pull-up/down Register
+    ///
+    /// BCM2837 only.
+    GPPUD [
+        /// Controls the actuation of the internal pull-up/down control line to ALL the GPIO pins.
+        PUD OFFSET(0) NUMBITS(2) [
+            Off = 0b00,
+            PullDown = 0b01,
+            PullUp = 0b10
+        ]
+    ],
+
+    /// GPIO Pull-up/down Clock Register 0
+    ///
+    /// BCM2837 only.
+    GPPUDCLK0 [
+        /// Pin 15
+        PUDCLK15 OFFSET(15) NUMBITS(1) [
+            NoEffect = 0,
+            AssertClock = 1
+        ],
+
+        /// Pin 14
+        PUDCLK14 OFFSET(14) NUMBITS(1) [
+            NoEffect = 0,
+            AssertClock = 1
+        ]
+    ],
+
+    /// GPIO Pull-up / Pull-down Register 0
+    ///
+    /// BCM2711 only.
+    GPIO_PUP_PDN_CNTRL_REG0 [
+        /// Pin 15
+        GPIO_PUP_PDN_CNTRL15 OFFSET(30) NUMBITS(2) [
+            NoResistor = 0b00,
+            PullUp = 0b01
+        ],
+
+        /// Pin 14
+        GPIO_PUP_PDN_CNTRL14 OFFSET(28) NUMBITS(2) [
+            NoResistor = 0b00,
+            PullUp = 0b01
+        ]
+    ]
+}
+
+register_structs! {
+    #[allow(non_snake_case)]
+    RegisterBlock {
+        (0x00 => _reserved1),
+        (0x04 => GPFSEL1: ReadWrite<u32, GPFSEL1::Register>),
+        (0x08 => _reserved2),
+        (0x94 => GPPUD: ReadWrite<u32, GPPUD::Register>),
+        (0x98 => GPPUDCLK0: ReadWrite<u32, GPPUDCLK0::Register>),
+        (0x9C => _reserved3),
+        (0xE4 => GPIO_PUP_PDN_CNTRL_REG0: ReadWrite<u32, GPIO_PUP_PDN_CNTRL_REG0::Register>),
+        (0xE8 => @END),
+    }
+}
+
+/// Abstraction for the associated MMIO registers.
+type Registers = MMIODerefWrapper<RegisterBlock>;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct GPIOInner {
+    registers: Registers,
+}
+
+// Export the inner struct so that BSPs can use it for the panic handler.
+pub use GPIOInner as PanicGPIO;
+
+/// Representation of the GPIO HW.
+pub struct GPIO {
+    mmio_descriptor: memory::mmu::MMIODescriptor,
+    virt_mmio_start_addr: AtomicUsize,
+    inner: IRQSafeNullLock<GPIOInner>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl GPIOInner {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+        Self {
+            registers: Registers::new(mmio_start_addr),
+        }
+    }
+
+    /// Init code.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub unsafe fn init(&mut self, new_mmio_start_addr: Option<usize>) -> Result<(), &'static str> {
+        if let Some(addr) = new_mmio_start_addr {
+            self.registers = Registers::new(addr);
+        }
+
+        Ok(())
+    }
+
+    /// Disable pull-up/down on pins 14 and 15.
+    #[cfg(feature = "bsp_rpi3")]
+    fn disable_pud_14_15_bcm2837(&mut self) {
+        use crate::{time, time::interface::TimeManager};
+        use core::time::Duration;
+
+        // The Linux 2837 GPIO driver waits 1 µs between the steps.
+        const DELAY: Duration = Duration::from_micros(1);
+
+        self.registers.GPPUD.write(GPPUD::PUD::Off);
+        time::time_manager().spin_for(DELAY);
+
+        self.registers
+            .GPPUDCLK0
+            .write(GPPUDCLK0::PUDCLK15::AssertClock + GPPUDCLK0::PUDCLK14::AssertClock);
+        time::time_manager().spin_for(DELAY);
+
+        self.registers.GPPUD.write(GPPUD::PUD::Off);
+        self.registers.GPPUDCLK0.set(0);
+    }
+
+    /// Disable pull-up/down on pins 14 and 15.
+    #[cfg(feature = "bsp_rpi4")]
+    fn disable_pud_14_15_bcm2711(&mut self) {
+        self.registers.GPIO_PUP_PDN_CNTRL_REG0.write(
+            GPIO_PUP_PDN_CNTRL_REG0::GPIO_PUP_PDN_CNTRL15::PullUp
+                + GPIO_PUP_PDN_CNTRL_REG0::GPIO_PUP_PDN_CNTRL14::PullUp,
+        );
+    }
+
+    /// Map PL011 UART as standard output.
+    ///
+    /// TX to pin 14
+    /// RX to pin 15
+    pub fn map_pl011_uart(&mut self) {
+        // Select the UART on pins 14 and 15.
+        self.registers
+            .GPFSEL1
+            .modify(GPFSEL1::FSEL15::AltFunc0 + GPFSEL1::FSEL14::AltFunc0);
+
+        // Disable pull-up/down on pins 14 and 15.
+        #[cfg(feature = "bsp_rpi3")]
+        self.disable_pud_14_15_bcm2837();
+
+        #[cfg(feature = "bsp_rpi4")]
+        self.disable_pud_14_15_bcm2711();
+    }
+}
+
+impl GPIO {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide correct MMIO descriptors.
+    pub const unsafe fn new(mmio_descriptor: memory::mmu::MMIODescriptor) -> Self {
+        Self {
+            mmio_descriptor,
+            virt_mmio_start_addr: AtomicUsize::new(0),
+            inner: IRQSafeNullLock::new(GPIOInner::new(mmio_descriptor.start_addr().into_usize())),
+        }
+    }
+
+    /// Concurrency safe version of `GPIOInner.map_pl011_uart()`
+    pub fn map_pl011_uart(&self) {
+        self.inner.lock(|inner| inner.map_pl011_uart())
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use synchronization::interface::Mutex;
+
+impl driver::interface::DeviceDriver for GPIO {
+    fn compatible(&self) -> &'static str {
+        "BCM GPIO"
+    }
+
+    unsafe fn init(&self) -> Result<(), &'static str> {
+        let virt_addr = memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?;
+
+        self.inner
+            .lock(|inner| inner.init(Some(virt_addr.into_usize())))?;
+
+        self.virt_mmio_start_addr
+            .store(virt_addr.into_usize(), Ordering::Relaxed);
+
+        Ok(())
+    }
+
+    fn virt_mmio_start_addr(&self) -> Option<usize> {
+        let addr = self.virt_mmio_start_addr.load(Ordering::Relaxed);
+
+        if addr == 0 {
+            return None;
+        }
+
+        Some(addr)
+    }
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
new file mode 100644
index 000000000..0bd84e3cf
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -0,0 +1,138 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Interrupt Controller Driver.
+
+mod peripheral_ic;
+
+use crate::{driver, exception, memory};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Wrapper struct for a bitmask indicating pending IRQ numbers.
+struct PendingIRQs {
+    bitmask: u64,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub type LocalIRQ =
+    exception::asynchronous::IRQNumber<{ InterruptController::MAX_LOCAL_IRQ_NUMBER }>;
+pub type PeripheralIRQ =
+    exception::asynchronous::IRQNumber<{ InterruptController::MAX_PERIPHERAL_IRQ_NUMBER }>;
+
+/// Used for the associated type of trait [`exception::asynchronous::interface::IRQManager`].
+#[derive(Copy, Clone)]
+pub enum IRQNumber {
+    Local(LocalIRQ),
+    Peripheral(PeripheralIRQ),
+}
+
+/// Representation of the Interrupt Controller.
+pub struct InterruptController {
+    periph: peripheral_ic::PeripheralIC,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl PendingIRQs {
+    pub fn new(bitmask: u64) -> Self {
+        Self { bitmask }
+    }
+}
+
+impl Iterator for PendingIRQs {
+    type Item = usize;
+
+    fn next(&mut self) -> Option<Self::Item> {
+        use core::intrinsics::cttz;
+
+        let next = cttz(self.bitmask);
+        if next == 64 {
+            return None;
+        }
+
+        self.bitmask &= !(1 << next);
+
+        Some(next as usize)
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl InterruptController {
+    const MAX_LOCAL_IRQ_NUMBER: usize = 11;
+    const MAX_PERIPHERAL_IRQ_NUMBER: usize = 63;
+    const NUM_PERIPHERAL_IRQS: usize = Self::MAX_PERIPHERAL_IRQ_NUMBER + 1;
+
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide correct MMIO descriptors.
+    pub const unsafe fn new(
+        _local_mmio_descriptor: memory::mmu::MMIODescriptor,
+        periph_mmio_descriptor: memory::mmu::MMIODescriptor,
+    ) -> Self {
+        Self {
+            periph: peripheral_ic::PeripheralIC::new(periph_mmio_descriptor),
+        }
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+
+impl driver::interface::DeviceDriver for InterruptController {
+    fn compatible(&self) -> &'static str {
+        "BCM Interrupt Controller"
+    }
+
+    unsafe fn init(&self) -> Result<(), &'static str> {
+        self.periph.init()
+    }
+}
+
+impl exception::asynchronous::interface::IRQManager for InterruptController {
+    type IRQNumberType = IRQNumber;
+
+    fn register_handler(
+        &self,
+        irq: Self::IRQNumberType,
+        descriptor: exception::asynchronous::IRQDescriptor,
+    ) -> Result<(), &'static str> {
+        match irq {
+            IRQNumber::Local(_) => unimplemented!("Local IRQ controller not implemented."),
+            IRQNumber::Peripheral(pirq) => self.periph.register_handler(pirq, descriptor),
+        }
+    }
+
+    fn enable(&self, irq: Self::IRQNumberType) {
+        match irq {
+            IRQNumber::Local(_) => unimplemented!("Local IRQ controller not implemented."),
+            IRQNumber::Peripheral(pirq) => self.periph.enable(pirq),
+        }
+    }
+
+    fn handle_pending_irqs<'irq_context>(
+        &'irq_context self,
+        ic: &exception::asynchronous::IRQContext<'irq_context>,
+    ) {
+        // It can only be a peripheral IRQ pending because enable() does not support local IRQs yet.
+        self.periph.handle_pending_irqs(ic)
+    }
+
+    fn print_handler(&self) {
+        self.periph.print_handler();
+    }
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
new file mode 100644
index 000000000..abc3af711
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -0,0 +1,188 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Peripheral Interrupt Controller Driver.
+
+use super::{InterruptController, PendingIRQs, PeripheralIRQ};
+use crate::{
+    bsp::device_driver::common::MMIODerefWrapper,
+    driver, exception, memory, synchronization,
+    synchronization::{IRQSafeNullLock, InitStateLock},
+};
+use register::{mmio::*, register_structs};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+register_structs! {
+    #[allow(non_snake_case)]
+    WORegisterBlock {
+        (0x00 => _reserved1),
+        (0x10 => ENABLE_1: WriteOnly<u32>),
+        (0x14 => ENABLE_2: WriteOnly<u32>),
+        (0x24 => @END),
+    }
+}
+
+register_structs! {
+    #[allow(non_snake_case)]
+    RORegisterBlock {
+        (0x00 => _reserved1),
+        (0x04 => PENDING_1: ReadOnly<u32>),
+        (0x08 => PENDING_2: ReadOnly<u32>),
+        (0x0c => @END),
+    }
+}
+
+/// Abstraction for the WriteOnly parts of the associated MMIO registers.
+type WriteOnlyRegisters = MMIODerefWrapper<WORegisterBlock>;
+
+/// Abstraction for the ReadOnly parts of the associated MMIO registers.
+type ReadOnlyRegisters = MMIODerefWrapper<RORegisterBlock>;
+
+type HandlerTable =
+    [Option<exception::asynchronous::IRQDescriptor>; InterruptController::NUM_PERIPHERAL_IRQS];
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Representation of the peripheral interrupt controller.
+pub struct PeripheralIC {
+    mmio_descriptor: memory::mmu::MMIODescriptor,
+
+    /// Access to write registers is guarded with a lock.
+    wo_registers: IRQSafeNullLock<WriteOnlyRegisters>,
+
+    /// Register read access is unguarded.
+    ro_registers: InitStateLock<ReadOnlyRegisters>,
+
+    /// Stores registered IRQ handlers. Writable only during kernel init. RO afterwards.
+    handler_table: InitStateLock<HandlerTable>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl PeripheralIC {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide correct MMIO descriptors.
+    pub const unsafe fn new(mmio_descriptor: memory::mmu::MMIODescriptor) -> Self {
+        let addr = mmio_descriptor.start_addr().into_usize();
+
+        Self {
+            mmio_descriptor,
+            wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(addr)),
+            ro_registers: InitStateLock::new(ReadOnlyRegisters::new(addr)),
+            handler_table: InitStateLock::new([None; InterruptController::NUM_PERIPHERAL_IRQS]),
+        }
+    }
+
+    /// Query the list of pending IRQs.
+    fn pending_irqs(&self) -> PendingIRQs {
+        self.ro_registers.read(|regs| {
+            let pending_mask: u64 =
+                (u64::from(regs.PENDING_2.get()) << 32) | u64::from(regs.PENDING_1.get());
+
+            PendingIRQs::new(pending_mask)
+        })
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use synchronization::interface::{Mutex, ReadWriteEx};
+
+impl driver::interface::DeviceDriver for PeripheralIC {
+    fn compatible(&self) -> &'static str {
+        "BCM Peripheral Interrupt Controller"
+    }
+
+    unsafe fn init(&self) -> Result<(), &'static str> {
+        let virt_addr =
+            memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?.into_usize();
+
+        self.wo_registers
+            .lock(|regs| *regs = WriteOnlyRegisters::new(virt_addr));
+        self.ro_registers
+            .write(|regs| *regs = ReadOnlyRegisters::new(virt_addr));
+
+        Ok(())
+    }
+}
+
+impl exception::asynchronous::interface::IRQManager for PeripheralIC {
+    type IRQNumberType = PeripheralIRQ;
+
+    fn register_handler(
+        &self,
+        irq: Self::IRQNumberType,
+        descriptor: exception::asynchronous::IRQDescriptor,
+    ) -> Result<(), &'static str> {
+        self.handler_table.write(|table| {
+            let irq_number = irq.get();
+
+            if table[irq_number].is_some() {
+                return Err("IRQ handler already registered");
+            }
+
+            table[irq_number] = Some(descriptor);
+
+            Ok(())
+        })
+    }
+
+    fn enable(&self, irq: Self::IRQNumberType) {
+        self.wo_registers.lock(|regs| {
+            let enable_reg = if irq.get() <= 31 {
+                &regs.ENABLE_1
+            } else {
+                &regs.ENABLE_2
+            };
+
+            let enable_bit: u32 = 1 << (irq.get() % 32);
+
+            // Writing a 1 to a bit will set the corresponding IRQ enable bit. All other IRQ enable
+            // bits are unaffected. So we don't need read and OR'ing here.
+            enable_reg.set(enable_bit);
+        });
+    }
+
+    fn handle_pending_irqs<'irq_context>(
+        &'irq_context self,
+        _ic: &exception::asynchronous::IRQContext<'irq_context>,
+    ) {
+        self.handler_table.read(|table| {
+            for irq_number in self.pending_irqs() {
+                match table[irq_number] {
+                    None => panic!("No handler registered for IRQ {}", irq_number),
+                    Some(descriptor) => {
+                        // Call the IRQ handler. Panics on failure.
+                        descriptor.handler.handle().expect("Error handling IRQ");
+                    }
+                }
+            }
+        })
+    }
+
+    fn print_handler(&self) {
+        use crate::info;
+
+        info!("      Peripheral handler:");
+
+        self.handler_table.read(|table| {
+            for (i, opt) in table.iter().enumerate() {
+                if let Some(handler) = opt {
+                    info!("            {: >3}. {}", i, handler.name);
+                }
+            }
+        });
+    }
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
new file mode 100644
index 000000000..3adb9137d
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -0,0 +1,537 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! PL011 UART driver.
+//!
+//! # Resources
+//!
+//! - <https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf>
+//! - <https://developer.arm.com/documentation/ddi0183/latest>
+
+use crate::{
+    bsp, bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, exception, memory,
+    synchronization, synchronization::IRQSafeNullLock,
+};
+use core::{
+    fmt,
+    sync::atomic::{AtomicUsize, Ordering},
+};
+use register::{mmio::*, register_bitfields, register_structs};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+// PL011 UART registers.
+//
+// Descriptions taken from "PrimeCell UART (PL011) Technical Reference Manual" r1p5.
+register_bitfields! {
+    u32,
+
+    /// Flag Register.
+    FR [
+        /// Transmit FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
+        /// Line Control Register, LCR_H.
+        ///
+        /// - If the FIFO is disabled, this bit is set when the transmit holding register is empty.
+        /// - If the FIFO is enabled, the TXFE bit is set when the transmit FIFO is empty.
+        /// - This bit does not indicate if there is data in the transmit shift register.
+        TXFE OFFSET(7) NUMBITS(1) [],
+
+        /// Transmit FIFO full. The meaning of this bit depends on the state of the FEN bit in the
+        /// LCR_H Register.
+        ///
+        /// - If the FIFO is disabled, this bit is set when the transmit holding register is full.
+        /// - If the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
+        TXFF OFFSET(5) NUMBITS(1) [],
+
+        /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
+        /// LCR_H Register.
+        ///
+        /// If the FIFO is disabled, this bit is set when the receive holding register is empty. If
+        /// the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
+
+        /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
+        /// LCR_H Register.
+        ///
+        /// - If the FIFO is disabled, this bit is set when the receive holding register is empty.
+        /// - If the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
+        RXFE OFFSET(4) NUMBITS(1) [],
+
+        /// UART busy. If this bit is set to 1, the UART is busy transmitting data. This bit remains
+        /// set until the complete byte, including all the stop bits, has been sent from the shift
+        /// register.
+        ///
+        /// This bit is set as soon as the transmit FIFO becomes non-empty, regardless of whether
+        /// the UART is enabled or not.
+        BUSY OFFSET(3) NUMBITS(1) []
+    ],
+
+    /// Integer Baud Rate Divisor.
+    IBRD [
+        /// The integer baud rate divisor.
+        BAUD_DIVINT OFFSET(0) NUMBITS(16) []
+    ],
+
+    /// Fractional Baud Rate Divisor.
+    FBRD [
+        ///  The fractional baud rate divisor.
+        BAUD_DIVFRAC OFFSET(0) NUMBITS(6) []
+    ],
+
+    /// Line Control Register.
+    LCR_H [
+        /// Word length. These bits indicate the number of data bits transmitted or received in a
+        /// frame.
+        WLEN OFFSET(5) NUMBITS(2) [
+            FiveBit = 0b00,
+            SixBit = 0b01,
+            SevenBit = 0b10,
+            EightBit = 0b11
+        ],
+
+        /// Enable FIFOs:
+        ///
+        /// 0 = FIFOs are disabled (character mode) that is, the FIFOs become 1-byte-deep holding
+        /// registers.
+        ///
+        /// 1 = Transmit and receive FIFO buffers are enabled (FIFO mode).
+        FEN  OFFSET(4) NUMBITS(1) [
+            FifosDisabled = 0,
+            FifosEnabled = 1
+        ]
+    ],
+
+    /// Control Register.
+    CR [
+        /// Receive enable. If this bit is set to 1, the receive section of the UART is enabled.
+        /// Data reception occurs for either UART signals or SIR signals depending on the setting of
+        /// the SIREN bit. When the UART is disabled in the middle of reception, it completes the
+        /// current character before stopping.
+        RXE OFFSET(9) NUMBITS(1) [
+            Disabled = 0,
+            Enabled = 1
+        ],
+
+        /// Transmit enable. If this bit is set to 1, the transmit section of the UART is enabled.
+        /// Data transmission occurs for either UART signals, or SIR signals depending on the
+        /// setting of the SIREN bit. When the UART is disabled in the middle of transmission, it
+        /// completes the current character before stopping.
+        TXE OFFSET(8) NUMBITS(1) [
+            Disabled = 0,
+            Enabled = 1
+        ],
+
+        /// UART enable:
+        ///
+        /// 0 = UART is disabled. If the UART is disabled in the middle of transmission or
+        /// reception, it completes the current character before stopping.
+        ///
+        /// 1 = The UART is enabled. Data transmission and reception occurs for either UART signals
+        /// or SIR signals depending on the setting of the SIREN bit
+        UARTEN OFFSET(0) NUMBITS(1) [
+            /// If the UART is disabled in the middle of transmission or reception, it completes the
+            /// current character before stopping.
+            Disabled = 0,
+            Enabled = 1
+        ]
+    ],
+
+    /// Interrupt FIFO Level Select Register.
+    IFLS [
+        /// Receive interrupt FIFO level select. The trigger points for the receive interrupt are as
+        /// follows.
+        RXIFLSEL OFFSET(3) NUMBITS(5) [
+            OneEigth = 0b000,
+            OneQuarter = 0b001,
+            OneHalf = 0b010,
+            ThreeQuarters = 0b011,
+            SevenEights = 0b100
+        ]
+    ],
+
+    /// Interrupt Mask Set/Clear Register.
+    IMSC [
+        /// Receive timeout interrupt mask. A read returns the current mask for the UARTRTINTR
+        /// interrupt.
+        ///
+        /// - On a write of 1, the mask of the UARTRTINTR interrupt is set.
+        /// - A write of 0 clears the mask.
+        RTIM OFFSET(6) NUMBITS(1) [
+            Disabled = 0,
+            Enabled = 1
+        ],
+
+        /// Receive interrupt mask. A read returns the current mask for the UARTRXINTR interrupt.
+        ///
+        /// - On a write of 1, the mask of the UARTRXINTR interrupt is set.
+        /// - A write of 0 clears the mask.
+        RXIM OFFSET(4) NUMBITS(1) [
+            Disabled = 0,
+            Enabled = 1
+        ]
+    ],
+
+    /// Masked Interrupt Status Register.
+    MIS [
+        /// Receive timeout masked interrupt status. Returns the masked interrupt state of the
+        /// UARTRTINTR interrupt.
+        RTMIS OFFSET(6) NUMBITS(1) [],
+
+        /// Receive masked interrupt status. Returns the masked interrupt state of the UARTRXINTR
+        /// interrupt.
+        RXMIS OFFSET(4) NUMBITS(1) []
+    ],
+
+    /// Interrupt Clear Register.
+    ICR [
+        /// Meta field for all pending interrupts.
+        ALL OFFSET(0) NUMBITS(11) []
+    ]
+}
+
+register_structs! {
+    #[allow(non_snake_case)]
+    pub RegisterBlock {
+        (0x00 => DR: ReadWrite<u32>),
+        (0x04 => _reserved1),
+        (0x18 => FR: ReadOnly<u32, FR::Register>),
+        (0x1c => _reserved2),
+        (0x24 => IBRD: WriteOnly<u32, IBRD::Register>),
+        (0x28 => FBRD: WriteOnly<u32, FBRD::Register>),
+        (0x2c => LCR_H: WriteOnly<u32, LCR_H::Register>),
+        (0x30 => CR: WriteOnly<u32, CR::Register>),
+        (0x34 => IFLS: ReadWrite<u32, IFLS::Register>),
+        (0x38 => IMSC: ReadWrite<u32, IMSC::Register>),
+        (0x3C => _reserved3),
+        (0x40 => MIS: ReadOnly<u32, MIS::Register>),
+        (0x44 => ICR: WriteOnly<u32, ICR::Register>),
+        (0x48 => @END),
+    }
+}
+
+/// Abstraction for the associated MMIO registers.
+type Registers = MMIODerefWrapper<RegisterBlock>;
+
+#[derive(PartialEq)]
+enum BlockingMode {
+    Blocking,
+    NonBlocking,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct PL011UartInner {
+    registers: Registers,
+    chars_written: usize,
+    chars_read: usize,
+}
+
+// Export the inner struct so that BSPs can use it for the panic handler.
+pub use PL011UartInner as PanicUart;
+
+/// Representation of the UART.
+pub struct PL011Uart {
+    mmio_descriptor: memory::mmu::MMIODescriptor,
+    virt_mmio_start_addr: AtomicUsize,
+    inner: IRQSafeNullLock<PL011UartInner>,
+    irq_number: bsp::device_driver::IRQNumber,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl PL011UartInner {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+        Self {
+            registers: Registers::new(mmio_start_addr),
+            chars_written: 0,
+            chars_read: 0,
+        }
+    }
+
+    /// Set up baud rate and characteristics.
+    ///
+    /// This results in 8N1 and 921_600 baud.
+    ///
+    /// The calculation for the BRD is (we set the clock to 48 MHz in config.txt):
+    /// `(48_000_000 / 16) / 921_600 = 3.2552083`.
+    ///
+    /// This means the integer part is `3` and goes into the `IBRD`.
+    /// The fractional part is `0.2552083`.
+    ///
+    /// `FBRD` calculation according to the PL011 Technical Reference Manual:
+    /// `INTEGER((0.2552083 * 64) + 0.5) = 16`.
+    ///
+    /// Therefore, the generated baud rate divider is: `3 + 16/64 = 3.25`. Which results in a
+    /// genrated baud rate of `48_000_000 / (16 * 3.25) = 923_077`.
+    ///
+    /// Error = `((923_077 - 921_600) / 921_600) * 100 = 0.16%`.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub unsafe fn init(&mut self, new_mmio_start_addr: Option<usize>) -> Result<(), &'static str> {
+        if let Some(addr) = new_mmio_start_addr {
+            self.registers = Registers::new(addr);
+        }
+
+        // Execution can arrive here while there are still characters queued in the TX FIFO and
+        // actively being sent out by the UART hardware. If the UART is turned off in this case,
+        // those queued characters would be lost.
+        //
+        // For example, this can happen during runtime on a call to panic!(), because panic!()
+        // initializes its own UART instance and calls init().
+        //
+        // Hence, flush first to ensure all pending characters are transmitted.
+        self.flush();
+
+        // Turn the UART off temporarily.
+        self.registers.CR.set(0);
+
+        // Clear all pending interrupts.
+        self.registers.ICR.write(ICR::ALL::CLEAR);
+
+        // From the PL011 Technical Reference Manual:
+        //
+        // The LCR_H, IBRD, and FBRD registers form the single 30-bit wide LCR Register that is
+        // updated on a single write strobe generated by a LCR_H write. So, to internally update the
+        // contents of IBRD or FBRD, a LCR_H write must always be performed at the end.
+        //
+        // Set the baud rate, 8N1 and FIFO enabled.
+        self.registers.IBRD.write(IBRD::BAUD_DIVINT.val(3));
+        self.registers.FBRD.write(FBRD::BAUD_DIVFRAC.val(16));
+        self.registers
+            .LCR_H
+            .write(LCR_H::WLEN::EightBit + LCR_H::FEN::FifosEnabled);
+
+        // Set RX FIFO fill level at 1/8.
+        self.registers.IFLS.write(IFLS::RXIFLSEL::OneEigth);
+
+        // Enable RX IRQ + RX timeout IRQ.
+        self.registers
+            .IMSC
+            .write(IMSC::RXIM::Enabled + IMSC::RTIM::Enabled);
+
+        // Turn the UART on.
+        self.registers
+            .CR
+            .write(CR::UARTEN::Enabled + CR::TXE::Enabled + CR::RXE::Enabled);
+
+        Ok(())
+    }
+
+    /// Send a character.
+    fn write_char(&mut self, c: char) {
+        // Spin while TX FIFO full is set, waiting for an empty slot.
+        while self.registers.FR.matches_all(FR::TXFF::SET) {
+            cpu::nop();
+        }
+
+        // Write the character to the buffer.
+        self.registers.DR.set(c as u32);
+
+        self.chars_written += 1;
+    }
+
+    /// Block execution until the last buffered character has been physically put on the TX wire.
+    fn flush(&self) {
+        // Spin until the busy bit is cleared.
+        while self.registers.FR.matches_all(FR::BUSY::SET) {
+            cpu::nop();
+        }
+    }
+
+    /// Retrieve a character.
+    fn read_char_converting(&mut self, blocking_mode: BlockingMode) -> Option<char> {
+        // If RX FIFO is empty,
+        if self.registers.FR.matches_all(FR::RXFE::SET) {
+            // immediately return in non-blocking mode.
+            if blocking_mode == BlockingMode::NonBlocking {
+                return None;
+            }
+
+            // Otherwise, wait until a char was received.
+            while self.registers.FR.matches_all(FR::RXFE::SET) {
+                cpu::nop();
+            }
+        }
+
+        // Read one character.
+        let mut ret = self.registers.DR.get() as u8 as char;
+
+        // Convert carrige return to newline.
+        if ret == '\r' {
+            ret = '\n'
+        }
+
+        // Update statistics.
+        self.chars_read += 1;
+
+        Some(ret)
+    }
+}
+
+/// Implementing `core::fmt::Write` enables usage of the `format_args!` macros, which in turn are
+/// used to implement the `kernel`'s `print!` and `println!` macros. By implementing `write_str()`,
+/// we get `write_fmt()` automatically.
+///
+/// The function takes an `&mut self`, so it must be implemented for the inner struct.
+///
+/// See [`src/print.rs`].
+///
+/// [`src/print.rs`]: ../../print/index.html
+impl fmt::Write for PL011UartInner {
+    fn write_str(&mut self, s: &str) -> fmt::Result {
+        for c in s.chars() {
+            self.write_char(c);
+        }
+
+        Ok(())
+    }
+}
+
+impl PL011Uart {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide correct MMIO descriptors.
+    /// - The user must ensure to provide correct IRQ numbers.
+    pub const unsafe fn new(
+        mmio_descriptor: memory::mmu::MMIODescriptor,
+        irq_number: bsp::device_driver::IRQNumber,
+    ) -> Self {
+        Self {
+            mmio_descriptor,
+            virt_mmio_start_addr: AtomicUsize::new(0),
+            inner: IRQSafeNullLock::new(PL011UartInner::new(
+                mmio_descriptor.start_addr().into_usize(),
+            )),
+            irq_number,
+        }
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use synchronization::interface::Mutex;
+
+impl driver::interface::DeviceDriver for PL011Uart {
+    fn compatible(&self) -> &'static str {
+        "BCM PL011 UART"
+    }
+
+    unsafe fn init(&self) -> Result<(), &'static str> {
+        let virt_addr = memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?;
+
+        self.inner
+            .lock(|inner| inner.init(Some(virt_addr.into_usize())))?;
+
+        self.virt_mmio_start_addr
+            .store(virt_addr.into_usize(), Ordering::Relaxed);
+
+        Ok(())
+    }
+
+    fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
+        use bsp::exception::asynchronous::irq_manager;
+        use exception::asynchronous::{interface::IRQManager, IRQDescriptor};
+
+        let descriptor = IRQDescriptor {
+            name: "BCM PL011 UART",
+            handler: self,
+        };
+
+        irq_manager().register_handler(self.irq_number, descriptor)?;
+        irq_manager().enable(self.irq_number);
+
+        Ok(())
+    }
+
+    fn virt_mmio_start_addr(&self) -> Option<usize> {
+        let addr = self.virt_mmio_start_addr.load(Ordering::Relaxed);
+
+        if addr == 0 {
+            return None;
+        }
+
+        Some(addr)
+    }
+}
+
+impl console::interface::Write for PL011Uart {
+    /// Passthrough of `args` to the `core::fmt::Write` implementation, but guarded by a Mutex to
+    /// serialize access.
+    fn write_char(&self, c: char) {
+        self.inner.lock(|inner| inner.write_char(c));
+    }
+
+    fn write_fmt(&self, args: core::fmt::Arguments) -> fmt::Result {
+        // Fully qualified syntax for the call to `core::fmt::Write::write:fmt()` to increase
+        // readability.
+        self.inner.lock(|inner| fmt::Write::write_fmt(inner, args))
+    }
+
+    fn flush(&self) {
+        // Spin until TX FIFO empty is set.
+        self.inner.lock(|inner| inner.flush());
+    }
+}
+
+impl console::interface::Read for PL011Uart {
+    fn read_char(&self) -> char {
+        self.inner
+            .lock(|inner| inner.read_char_converting(BlockingMode::Blocking).unwrap())
+    }
+
+    fn clear_rx(&self) {
+        // Read from the RX FIFO until it is indicating empty.
+        while self
+            .inner
+            .lock(|inner| inner.read_char_converting(BlockingMode::NonBlocking))
+            .is_some()
+        {}
+    }
+}
+
+impl console::interface::Statistics for PL011Uart {
+    fn chars_written(&self) -> usize {
+        self.inner.lock(|inner| inner.chars_written)
+    }
+
+    fn chars_read(&self) -> usize {
+        self.inner.lock(|inner| inner.chars_read)
+    }
+}
+
+impl exception::asynchronous::interface::IRQHandler for PL011Uart {
+    fn handle(&self) -> Result<(), &'static str> {
+        self.inner.lock(|inner| {
+            let pending = inner.registers.MIS.extract();
+
+            // Clear all pending IRQs.
+            inner.registers.ICR.write(ICR::ALL::CLEAR);
+
+            // Check for any kind of RX interrupt.
+            if pending.matches_any(MIS::RXMIS::SET + MIS::RTMIS::SET) {
+                // Echo any received characters.
+                while let Some(c) = inner.read_char_converting(BlockingMode::NonBlocking) {
+                    inner.write_char(c)
+                }
+            }
+        });
+
+        Ok(())
+    }
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/common.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/common.rs
new file mode 100644
index 000000000..41553b7a5
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/common.rs
@@ -0,0 +1,38 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Common device driver code.
+
+use core::{marker::PhantomData, ops};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct MMIODerefWrapper<T> {
+    start_addr: usize,
+    phantom: PhantomData<fn() -> T>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl<T> MMIODerefWrapper<T> {
+    /// Create an instance.
+    pub const unsafe fn new(start_addr: usize) -> Self {
+        Self {
+            start_addr,
+            phantom: PhantomData,
+        }
+    }
+}
+
+impl<T> ops::Deref for MMIODerefWrapper<T> {
+    type Target = T;
+
+    fn deref(&self) -> &Self::Target {
+        unsafe { &*(self.start_addr as *const _) }
+    }
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi.rs
new file mode 100644
index 000000000..10d482781
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi.rs
@@ -0,0 +1,62 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Top-level BSP file for the Raspberry Pi 3 and 4.
+
+pub mod console;
+pub mod cpu;
+pub mod driver;
+pub mod exception;
+pub mod memory;
+
+use super::device_driver;
+use crate::memory::mmu::MMIODescriptor;
+use memory::map::mmio;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static GPIO: device_driver::GPIO =
+    unsafe { device_driver::GPIO::new(MMIODescriptor::new(mmio::GPIO_START, mmio::GPIO_SIZE)) };
+
+static PL011_UART: device_driver::PL011Uart = unsafe {
+    device_driver::PL011Uart::new(
+        MMIODescriptor::new(mmio::PL011_UART_START, mmio::PL011_UART_SIZE),
+        exception::asynchronous::irq_map::PL011_UART,
+    )
+};
+
+#[cfg(feature = "bsp_rpi3")]
+static INTERRUPT_CONTROLLER: device_driver::InterruptController = unsafe {
+    device_driver::InterruptController::new(
+        MMIODescriptor::new(mmio::LOCAL_IC_START, mmio::LOCAL_IC_SIZE),
+        MMIODescriptor::new(mmio::PERIPHERAL_IC_START, mmio::PERIPHERAL_IC_SIZE),
+    )
+};
+
+#[cfg(feature = "bsp_rpi4")]
+static INTERRUPT_CONTROLLER: device_driver::GICv2 = unsafe {
+    device_driver::GICv2::new(
+        MMIODescriptor::new(mmio::GICD_START, mmio::GICD_SIZE),
+        MMIODescriptor::new(mmio::GICC_START, mmio::GICC_SIZE),
+    )
+};
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Board identification.
+pub fn board_name() -> &'static str {
+    #[cfg(feature = "bsp_rpi3")]
+    {
+        "Raspberry Pi 3"
+    }
+
+    #[cfg(feature = "bsp_rpi4")]
+    {
+        "Raspberry Pi 4"
+    }
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/console.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/console.rs
new file mode 100644
index 000000000..e16b3a3d6
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/console.rs
@@ -0,0 +1,88 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP console facilities.
+
+use super::memory;
+use crate::{bsp::device_driver, console, cpu, driver};
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// In case of a panic, the panic handler uses this function to take a last shot at printing
+/// something before the system is halted.
+///
+/// We try to init panic-versions of the GPIO and the UART. The panic versions are not protected
+/// with synchronization primitives, which increases chances that we get to print something, even
+/// when the kernel's default GPIO or UART instances happen to be locked at the time of the panic.
+///
+/// # Safety
+///
+/// - Use only for printing during a panic.
+#[cfg(not(feature = "test_build"))]
+pub unsafe fn panic_console_out() -> impl fmt::Write {
+    use driver::interface::DeviceDriver;
+
+    let mut panic_gpio = device_driver::PanicGPIO::new(memory::map::mmio::GPIO_START.into_usize());
+    let mut panic_uart =
+        device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START.into_usize());
+
+    // If remapping of the driver's MMIO already happened, take the remapped start address.
+    // Otherwise, take a chance with the default physical address.
+    let maybe_gpio_mmio_start_addr = super::GPIO.virt_mmio_start_addr();
+    let maybe_uart_mmio_start_addr = super::PL011_UART.virt_mmio_start_addr();
+
+    panic_gpio
+        .init(maybe_gpio_mmio_start_addr)
+        .unwrap_or_else(|_| cpu::wait_forever());
+    panic_gpio.map_pl011_uart();
+    panic_uart
+        .init(maybe_uart_mmio_start_addr)
+        .unwrap_or_else(|_| cpu::wait_forever());
+
+    panic_uart
+}
+
+/// Reduced version for test builds.
+#[cfg(feature = "test_build")]
+pub unsafe fn panic_console_out() -> impl fmt::Write {
+    use driver::interface::DeviceDriver;
+
+    let mut panic_uart =
+        device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START.into_usize());
+
+    let maybe_uart_mmio_start_addr = super::PL011_UART.virt_mmio_start_addr();
+
+    panic_uart
+        .init(maybe_uart_mmio_start_addr)
+        .unwrap_or_else(|_| cpu::qemu_exit_failure());
+
+    panic_uart
+}
+
+/// Return a reference to the console.
+pub fn console() -> &'static impl console::interface::All {
+    &super::PL011_UART
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+/// Minimal code needed to bring up the console in QEMU (for testing only). This is often less steps
+/// than on real hardware due to QEMU's abstractions.
+#[cfg(feature = "test_build")]
+pub fn qemu_bring_up_console() {
+    use driver::interface::DeviceDriver;
+
+    // Calling the UART's init ensures that the BSP's instance of the UART does remap the MMIO
+    // addresses.
+    unsafe {
+        super::PL011_UART
+            .init()
+            .unwrap_or_else(|_| cpu::qemu_exit_failure());
+    }
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/cpu.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/cpu.rs
new file mode 100644
index 000000000..d09ff9568
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/cpu.rs
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP Processor code.
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Used by `arch` code to find the early boot core.
+#[no_mangle]
+#[link_section = ".text._start_arguments"]
+pub static BOOT_CORE_ID: u64 = 0;
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/driver.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/driver.rs
new file mode 100644
index 000000000..4d5007e4e
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/driver.rs
@@ -0,0 +1,61 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP driver support.
+
+use crate::driver;
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Device Driver Manager type.
+struct BSPDriverManager {
+    device_drivers: [&'static (dyn DeviceDriver + Sync); 3],
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
+    device_drivers: [
+        &super::GPIO,
+        &super::PL011_UART,
+        &super::INTERRUPT_CONTROLLER,
+    ],
+};
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the driver manager.
+pub fn driver_manager() -> &'static impl driver::interface::DriverManager {
+    &BSP_DRIVER_MANAGER
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use driver::interface::DeviceDriver;
+
+impl driver::interface::DriverManager for BSPDriverManager {
+    fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
+        &self.device_drivers[..]
+    }
+
+    fn early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
+        &self.device_drivers[0..=1]
+    }
+
+    fn non_early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
+        &self.device_drivers[2..]
+    }
+
+    fn post_early_print_device_driver_init(&self) {
+        // Configure PL011Uart's output pins.
+        super::GPIO.map_pl011_uart();
+    }
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/exception.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/exception.rs
new file mode 100644
index 000000000..94d0728ff
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/exception.rs
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP synchronous and asynchronous exception handling.
+
+pub mod asynchronous;
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/exception/asynchronous.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/exception/asynchronous.rs
new file mode 100644
index 000000000..a253daa94
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/exception/asynchronous.rs
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP asynchronous exception handling.
+
+use crate::{bsp, exception};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(feature = "bsp_rpi3")]
+pub(in crate::bsp) mod irq_map {
+    use super::bsp::device_driver::{IRQNumber, PeripheralIRQ};
+
+    pub const PL011_UART: IRQNumber = IRQNumber::Peripheral(PeripheralIRQ::new(57));
+}
+
+#[cfg(feature = "bsp_rpi4")]
+pub(in crate::bsp) mod irq_map {
+    use super::bsp::device_driver::IRQNumber;
+
+    pub const PL011_UART: IRQNumber = IRQNumber::new(153);
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the IRQ manager.
+pub fn irq_manager() -> &'static impl exception::asynchronous::interface::IRQManager<
+    IRQNumberType = bsp::device_driver::IRQNumber,
+> {
+    &super::super::INTERRUPT_CONTROLLER
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
new file mode 100644
index 000000000..0d46f9d97
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
@@ -0,0 +1 @@
+__kernel_virt_addr_space_size = 2 * 1024 * 1024 * 1024
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/link.ld b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/link.ld
new file mode 100644
index 000000000..962638d00
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/link.ld
@@ -0,0 +1,87 @@
+/* SPDX-License-Identifier: MIT OR Apache-2.0
+ *
+ * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+ */
+
+/* This file provides __kernel_virt_addr_space_size */
+INCLUDE src/bsp/raspberrypi/kernel_virt_addr_space_size.ld;
+
+/* The kernel's virtual address range will be:
+ *
+ * [END_ADDRESS_INCLUSIVE, START_ADDRESS]
+ * [u64::MAX             , (u64::MAX - __kernel_virt_addr_space_size) + 1]
+ *
+ * Since the start address is needed to set the linker address below, calculate it now.
+ */
+__kernel_virt_start_addr = ((0xffffffffffffffff - __kernel_virt_addr_space_size) + 1);
+
+/* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_load_addr = 0x80000;
+
+ENTRY(__rpi_load_addr)
+
+PHDRS
+{
+    segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
+    segment_rw PT_LOAD FLAGS(6); /* 6 == RW */
+}
+
+SECTIONS
+{
+    /* Add the load address as an offset. Makes virt-to-phys translation easier for the human eye */
+    . =  __kernel_virt_start_addr + __rpi_load_addr;
+
+    /***********************************************************************************************
+    * Code + RO Data + Global Offset Table
+    ***********************************************************************************************/
+    __rx_start = .;
+    .text : AT(__rpi_load_addr)
+    {
+        KEEP(*(.text._start))
+        *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
+        *(.text._start_rust)      /* The Rust entry point */
+        *(.text*)                 /* Everything else */
+    } :segment_rx
+
+    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
+    .got    : ALIGN(8) { *(.got)     } :segment_rx
+
+    . = ALIGN(64K); /* Align to page boundary */
+    __rx_end_exclusive = .;
+
+    /***********************************************************************************************
+    * Data + BSS
+    ***********************************************************************************************/
+    __rw_start = .;
+    .data : { *(.data*) } :segment_rw
+
+    /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
+    .bss : ALIGN(8)
+    {
+        __bss_start = .;
+        *(.bss*);
+        . = ALIGN(8);
+
+        . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
+        __bss_end_inclusive = . - 8;
+    } :NONE
+
+    . = ALIGN(64K); /* Align to page boundary */
+    __rw_end_exclusive = .;
+
+    /***********************************************************************************************
+    * Guard Page between boot core stack and data
+    ***********************************************************************************************/
+    __boot_core_stack_guard_page_start = .;
+    . += 64K;
+    __boot_core_stack_guard_page_end_exclusive = .;
+
+    /***********************************************************************************************
+    * Boot Core Stack
+    ***********************************************************************************************/
+    __boot_core_stack_start = .;         /*   ^             */
+                                         /*   | stack       */
+    . += 512K;                           /*   | growth      */
+                                         /*   | direction   */
+    __boot_core_stack_end_exclusive = .; /*   |             */
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory.rs
new file mode 100644
index 000000000..7f571e080
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory.rs
@@ -0,0 +1,208 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP Memory Management.
+//!
+//! The physical memory layout after the kernel has been loaded by the Raspberry's firmware, which
+//! copies the binary to 0x8_0000:
+//!
+//! +---------------------------------------------+
+//! |                                             |
+//! | Unmapped                                    |
+//! |                                             |
+//! +---------------------------------------------+
+//! |                                             | rx_start @ 0x8_0000
+//! | .text                                       |
+//! | .rodata                                     |
+//! | .got                                        |
+//! |                                             | rx_end_inclusive
+//! +---------------------------------------------+
+//! |                                             | rw_start == rx_end
+//! | .data                                       |
+//! | .bss                                        |
+//! |                                             | rw_end_inclusive
+//! +---------------------------------------------+
+//! |                                             | rw_end
+//! | Unmapped Boot-core Stack Guard Page         |
+//! |                                             |
+//! +---------------------------------------------+
+//! |                                             | boot_core_stack_start          ^
+//! |                                             |                                | stack
+//! | Boot-core Stack                             |                                | growth
+//! |                                             |                                | direction
+//! |                                             | boot_core_stack_end_inclusive  |
+//! +---------------------------------------------+
+
+pub mod mmu;
+
+use crate::memory::{Address, Physical, Virtual};
+use core::{cell::UnsafeCell, ops::RangeInclusive};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+// Symbols from the linker script.
+extern "Rust" {
+    static __rx_start: UnsafeCell<()>;
+    static __rx_end_exclusive: UnsafeCell<()>;
+
+    static __rw_start: UnsafeCell<()>;
+    static __bss_start: UnsafeCell<u64>;
+    static __bss_end_inclusive: UnsafeCell<u64>;
+    static __rw_end_exclusive: UnsafeCell<()>;
+
+    static __boot_core_stack_start: UnsafeCell<()>;
+    static __boot_core_stack_end_exclusive: UnsafeCell<()>;
+
+    static __boot_core_stack_guard_page_start: UnsafeCell<()>;
+    static __boot_core_stack_guard_page_end_exclusive: UnsafeCell<()>;
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// The board's physical memory map.
+#[rustfmt::skip]
+pub(super) mod map {
+    use super::*;
+
+    /// Physical devices.
+    #[cfg(feature = "bsp_rpi3")]
+    pub mod mmio {
+        use super::*;
+
+        pub const PERIPHERAL_IC_START: Address<Physical> = Address::new(0x3F00_B200);
+        pub const PERIPHERAL_IC_SIZE:  usize             =              0x24;
+
+        pub const GPIO_START:          Address<Physical> = Address::new(0x3F20_0000);
+        pub const GPIO_SIZE:           usize             =              0xA0;
+
+        pub const PL011_UART_START:    Address<Physical> = Address::new(0x3F20_1000);
+        pub const PL011_UART_SIZE:     usize             =              0x48;
+
+        pub const LOCAL_IC_START:      Address<Physical> = Address::new(0x4000_0000);
+        pub const LOCAL_IC_SIZE:       usize             =              0x100;
+
+        pub const END:                 Address<Physical> = Address::new(0x4001_0000);
+    }
+
+    /// Physical devices.
+    #[cfg(feature = "bsp_rpi4")]
+    pub mod mmio {
+        use super::*;
+
+        pub const GPIO_START:       Address<Physical> = Address::new(0xFE20_0000);
+        pub const GPIO_SIZE:        usize             =              0xA0;
+
+        pub const PL011_UART_START: Address<Physical> = Address::new(0xFE20_1000);
+        pub const PL011_UART_SIZE:  usize             =              0x48;
+
+        pub const GICD_START:       Address<Physical> = Address::new(0xFF84_1000);
+        pub const GICD_SIZE:        usize             =              0x824;
+
+        pub const GICC_START:       Address<Physical> = Address::new(0xFF84_2000);
+        pub const GICC_SIZE:        usize             =              0x14;
+
+        pub const END:              Address<Physical> = Address::new(0xFF85_0000);
+    }
+
+    pub const END: Address<Physical> = mmio::END;
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// Start address of the Read+Execute (RX) range.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn virt_rx_start() -> Address<Virtual> {
+    Address::new(unsafe { __rx_start.get() as usize })
+}
+
+/// Size of the Read+Execute (RX) range.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn rx_size() -> usize {
+    unsafe { (__rx_end_exclusive.get() as usize) - (__rx_start.get() as usize) }
+}
+
+/// Start address of the Read+Write (RW) range.
+#[inline(always)]
+fn virt_rw_start() -> Address<Virtual> {
+    Address::new(unsafe { __rw_start.get() as usize })
+}
+
+/// Size of the Read+Write (RW) range.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn rw_size() -> usize {
+    unsafe { (__rw_end_exclusive.get() as usize) - (__rw_start.get() as usize) }
+}
+
+/// Start address of the boot core's stack.
+#[inline(always)]
+fn virt_boot_core_stack_start() -> Address<Virtual> {
+    Address::new(unsafe { __boot_core_stack_start.get() as usize })
+}
+
+/// Size of the boot core's stack.
+#[inline(always)]
+fn boot_core_stack_size() -> usize {
+    unsafe {
+        (__boot_core_stack_end_exclusive.get() as usize) - (__boot_core_stack_start.get() as usize)
+    }
+}
+
+/// Start address of the boot core's stack guard page.
+#[inline(always)]
+fn virt_boot_core_stack_guard_page_start() -> Address<Virtual> {
+    Address::new(unsafe { __boot_core_stack_guard_page_start.get() as usize })
+}
+
+/// Size of the boot core's stack guard page.
+#[inline(always)]
+fn boot_core_stack_guard_page_size() -> usize {
+    unsafe {
+        (__boot_core_stack_guard_page_end_exclusive.get() as usize)
+            - (__boot_core_stack_guard_page_start.get() as usize)
+    }
+}
+
+/// Exclusive end address of the physical address space.
+#[inline(always)]
+fn phys_addr_space_end() -> Address<Physical> {
+    map::END
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return the inclusive range spanning the .bss section.
+///
+/// # Safety
+///
+/// - Values are provided by the linker script and must be trusted as-is.
+/// - The linker-provided addresses must be u64 aligned.
+pub fn bss_range_inclusive() -> RangeInclusive<*mut u64> {
+    let range;
+    unsafe {
+        range = RangeInclusive::new(__bss_start.get(), __bss_end_inclusive.get());
+    }
+    assert!(!range.is_empty());
+
+    range
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs
new file mode 100644
index 000000000..dbb970208
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs
@@ -0,0 +1,187 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP Memory Management Unit.
+
+use crate::{
+    common,
+    memory::{
+        mmu as generic_mmu,
+        mmu::{
+            AccessPermissions, AddressSpace, AssociatedTranslationTable, AttributeFields,
+            MemAttributes, Page, PageSliceDescriptor, TranslationGranule,
+        },
+        Physical, Virtual,
+    },
+    synchronization::InitStateLock,
+};
+use core::convert::TryInto;
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+type KernelTranslationTable =
+    <KernelVirtAddrSpace as AssociatedTranslationTable>::TableStartFromTop;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// The translation granule chosen by this BSP. This will be used everywhere else in the kernel to
+/// derive respective data structures and their sizes. For example, the `crate::memory::mmu::Page`.
+pub type KernelGranule = TranslationGranule<{ 64 * 1024 }>;
+
+/// The kernel's virtual address space defined by this BSP.
+pub type KernelVirtAddrSpace = AddressSpace<{ get_virt_addr_space_size() }>;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+/// The kernel translation tables.
+///
+/// It is mandatory that InitStateLock is transparent.
+///
+/// That is, `size_of(InitStateLock<KernelTranslationTable>) == size_of(KernelTranslationTable)`.
+/// There is a unit tests that checks this porperty.
+#[link_section = ".data"]
+static KERNEL_TABLES: InitStateLock<KernelTranslationTable> =
+    InitStateLock::new(KernelTranslationTable::new_for_precompute());
+
+/// This value is needed during early boot for MMU setup.
+///
+/// This will be patched to the correct value by the "translation table tool" after linking. This
+/// given value here is just a dummy.
+#[link_section = ".text._start_arguments"]
+#[no_mangle]
+static PHYS_KERNEL_TABLES_BASE_ADDR: u64 = 0xCCCCAAAAFFFFEEEE;
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// This is a hack for retrieving the value for the kernel's virtual address space size as a
+/// constant from a common place, since it is needed as a compile-time/link-time constant in both,
+/// the linker script and the Rust sources.
+const fn get_virt_addr_space_size() -> usize {
+    let __kernel_virt_addr_space_size;
+
+    include!("../kernel_virt_addr_space_size.ld");
+
+    __kernel_virt_addr_space_size
+}
+
+/// Helper function for calculating the number of pages the given parameter spans.
+const fn size_to_num_pages(size: usize) -> usize {
+    assert!(size > 0);
+    assert!(size % KernelGranule::SIZE == 0);
+
+    size >> KernelGranule::SHIFT
+}
+
+/// The Read+Execute (RX) pages of the kernel binary.
+fn virt_rx_page_desc() -> PageSliceDescriptor<Virtual> {
+    let num_pages = size_to_num_pages(super::rx_size());
+
+    PageSliceDescriptor::from_addr(super::virt_rx_start(), num_pages)
+}
+
+/// The Read+Write (RW) pages of the kernel binary.
+fn virt_rw_page_desc() -> PageSliceDescriptor<Virtual> {
+    let num_pages = size_to_num_pages(super::rw_size());
+
+    PageSliceDescriptor::from_addr(super::virt_rw_start(), num_pages)
+}
+
+/// The boot core's stack.
+fn virt_boot_core_stack_page_desc() -> PageSliceDescriptor<Virtual> {
+    let num_pages = size_to_num_pages(super::boot_core_stack_size());
+
+    PageSliceDescriptor::from_addr(super::virt_boot_core_stack_start(), num_pages)
+}
+
+// There is no reason to expect the following conversions to fail, since they were generated offline
+// by the `translation table tool`. If it doesn't work, a panic due to the unwrap is justified.
+
+/// The Read+Execute (RX) pages of the kernel binary.
+fn phys_rx_page_desc() -> PageSliceDescriptor<Physical> {
+    virt_rx_page_desc().try_into().unwrap()
+}
+
+/// The Read+Write (RW) pages of the kernel binary.
+fn phys_rw_page_desc() -> PageSliceDescriptor<Physical> {
+    virt_rw_page_desc().try_into().unwrap()
+}
+
+/// The boot core's stack.
+fn phys_boot_core_stack_page_desc() -> PageSliceDescriptor<Physical> {
+    virt_boot_core_stack_page_desc().try_into().unwrap()
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the kernel's translation tables.
+pub fn kernel_translation_tables() -> &'static InitStateLock<KernelTranslationTable> {
+    &KERNEL_TABLES
+}
+
+/// The boot core's stack guard page.
+pub fn virt_boot_core_stack_guard_page_desc() -> PageSliceDescriptor<Virtual> {
+    let num_pages = size_to_num_pages(super::boot_core_stack_guard_page_size());
+
+    PageSliceDescriptor::from_addr(super::virt_boot_core_stack_guard_page_start(), num_pages)
+}
+
+/// Pointer to the last page of the physical address space.
+pub fn phys_addr_space_end_page() -> *const Page<Physical> {
+    common::align_down(
+        super::phys_addr_space_end().into_usize(),
+        KernelGranule::SIZE,
+    ) as *const Page<_>
+}
+
+/// Add mapping records for the kernel binary.
+///
+/// The actual translation table entries for the kernel binary are generated using the offline
+/// `translation table tool` and patched into the kernel binary. This function just adds the mapping
+/// record entries.
+///
+/// It must be ensured that these entries are in sync with the offline tool.
+pub fn kernel_add_mapping_records_for_precomputed() {
+    generic_mmu::kernel_add_mapping_record(
+        "Kernel code and RO data",
+        &virt_rx_page_desc(),
+        &phys_rx_page_desc(),
+        &AttributeFields {
+            mem_attributes: MemAttributes::CacheableDRAM,
+            acc_perms: AccessPermissions::ReadOnly,
+            execute_never: false,
+        },
+    );
+
+    generic_mmu::kernel_add_mapping_record(
+        "Kernel data and bss",
+        &virt_rw_page_desc(),
+        &phys_rw_page_desc(),
+        &AttributeFields {
+            mem_attributes: MemAttributes::CacheableDRAM,
+            acc_perms: AccessPermissions::ReadWrite,
+            execute_never: true,
+        },
+    );
+
+    generic_mmu::kernel_add_mapping_record(
+        "Kernel boot-core stack",
+        &virt_boot_core_stack_page_desc(),
+        &phys_boot_core_stack_page_desc(),
+        &AttributeFields {
+            mem_attributes: MemAttributes::CacheableDRAM,
+            acc_perms: AccessPermissions::ReadWrite,
+            execute_never: true,
+        },
+    );
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/common.rs b/16_virtual_mem_part4_higher_half_kernel/src/common.rs
new file mode 100644
index 000000000..71443cfbd
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/common.rs
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! General purpose code.
+
+/// Check if a value is aligned to a given size.
+#[inline(always)]
+pub const fn is_aligned(value: usize, alignment: usize) -> bool {
+    assert!(alignment.is_power_of_two());
+
+    (value & (alignment - 1)) == 0
+}
+
+/// Align down.
+#[inline(always)]
+pub const fn align_down(value: usize, alignment: usize) -> usize {
+    assert!(alignment.is_power_of_two());
+
+    value & !(alignment - 1)
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/console.rs b/16_virtual_mem_part4_higher_half_kernel/src/console.rs
new file mode 100644
index 000000000..c3154ba23
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/console.rs
@@ -0,0 +1,53 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! System console.
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Console interfaces.
+pub mod interface {
+    use core::fmt;
+
+    /// Console write functions.
+    pub trait Write {
+        /// Write a single character.
+        fn write_char(&self, c: char);
+
+        /// Write a Rust format string.
+        fn write_fmt(&self, args: fmt::Arguments) -> fmt::Result;
+
+        /// Block until the last buffered character has been physically put on the TX wire.
+        fn flush(&self);
+    }
+
+    /// Console read functions.
+    pub trait Read {
+        /// Read a single character.
+        fn read_char(&self) -> char {
+            ' '
+        }
+
+        /// Clear RX buffers, if any.
+        fn clear_rx(&self);
+    }
+
+    /// Console statistics.
+    pub trait Statistics {
+        /// Return the number of characters written.
+        fn chars_written(&self) -> usize {
+            0
+        }
+
+        /// Return the number of characters read.
+        fn chars_read(&self) -> usize {
+            0
+        }
+    }
+
+    /// Trait alias for a full-fledged console.
+    pub trait All = Write + Read + Statistics;
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/cpu.rs b/16_virtual_mem_part4_higher_half_kernel/src/cpu.rs
new file mode 100644
index 000000000..36b6a9d4c
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/cpu.rs
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Processor code.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "_arch/aarch64/cpu.rs"]
+mod arch_cpu;
+
+mod boot;
+
+pub mod smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_cpu::{nop, wait_forever};
+
+#[cfg(feature = "test_build")]
+pub use arch_cpu::{qemu_exit_failure, qemu_exit_success};
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/cpu/boot.rs b/16_virtual_mem_part4_higher_half_kernel/src/cpu/boot.rs
new file mode 100644
index 000000000..1dc5c1808
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/cpu/boot.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Boot code.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/cpu/boot.rs"]
+mod arch_boot;
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/cpu/smp.rs b/16_virtual_mem_part4_higher_half_kernel/src/cpu/smp.rs
new file mode 100644
index 000000000..38230ce1e
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/cpu/smp.rs
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Symmetric multiprocessing.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/cpu/smp.rs"]
+mod arch_smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_smp::core_id;
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/driver.rs b/16_virtual_mem_part4_higher_half_kernel/src/driver.rs
new file mode 100644
index 000000000..83fac4a7c
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/driver.rs
@@ -0,0 +1,62 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Driver support.
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Driver interfaces.
+pub mod interface {
+    /// Device Driver functions.
+    pub trait DeviceDriver {
+        /// Return a compatibility string for identifying the driver.
+        fn compatible(&self) -> &'static str;
+
+        /// Called by the kernel to bring up the device.
+        ///
+        /// # Safety
+        ///
+        /// - During init, drivers might do stuff with system-wide impact.
+        unsafe fn init(&self) -> Result<(), &'static str> {
+            Ok(())
+        }
+
+        /// Called by the kernel to register and enable the device's IRQ handlers, if any.
+        ///
+        /// Rust's type system will prevent a call to this function unless the calling instance
+        /// itself has static lifetime.
+        fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
+            Ok(())
+        }
+
+        /// After MMIO remapping, returns the new virtual start address.
+        ///
+        /// This API assumes a driver has only a single, contiguous MMIO aperture, which will not be
+        /// the case for more complex devices. This API will likely change in future tutorials.
+        fn virt_mmio_start_addr(&self) -> Option<usize> {
+            None
+        }
+    }
+
+    /// Device driver management functions.
+    ///
+    /// The `BSP` is supposed to supply one global instance.
+    pub trait DriverManager {
+        /// Return a slice of references to all `BSP`-instantiated drivers.
+        fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
+
+        /// Return only those drivers needed for the BSP's early printing functionality.
+        ///
+        /// For example, the default UART.
+        fn early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
+
+        /// Return all drivers minus early-print drivers.
+        fn non_early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
+
+        /// Initialization code that runs after the early print driver init.
+        fn post_early_print_device_driver_init(&self);
+    }
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/exception.rs b/16_virtual_mem_part4_higher_half_kernel/src/exception.rs
new file mode 100644
index 000000000..3c5e7bc83
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/exception.rs
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Synchronous and asynchronous exception handling.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "_arch/aarch64/exception.rs"]
+mod arch_exception;
+
+pub mod asynchronous;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_exception::{current_privilege_level, handling_init};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Kernel privilege levels.
+#[allow(missing_docs)]
+#[derive(PartialEq)]
+pub enum PrivilegeLevel {
+    User,
+    Kernel,
+    Hypervisor,
+    Unknown,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// Libkernel unit tests must execute in kernel mode.
+    #[kernel_test]
+    fn test_runner_executes_in_kernel_mode() {
+        let (level, _) = current_privilege_level();
+
+        assert!(level == PrivilegeLevel::Kernel)
+    }
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/exception/asynchronous.rs b/16_virtual_mem_part4_higher_half_kernel/src/exception/asynchronous.rs
new file mode 100644
index 000000000..e9aace357
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/exception/asynchronous.rs
@@ -0,0 +1,152 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Asynchronous exception handling.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/exception/asynchronous.rs"]
+mod arch_asynchronous;
+
+use core::{fmt, marker::PhantomData};
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_asynchronous::{
+    is_local_irq_masked, local_irq_mask, local_irq_mask_save, local_irq_restore, local_irq_unmask,
+    print_state,
+};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Interrupt descriptor.
+#[derive(Copy, Clone)]
+pub struct IRQDescriptor {
+    /// Descriptive name.
+    pub name: &'static str,
+
+    /// Reference to handler trait object.
+    pub handler: &'static (dyn interface::IRQHandler + Sync),
+}
+
+/// IRQContext token.
+///
+/// An instance of this type indicates that the local core is currently executing in IRQ
+/// context, aka executing an interrupt vector or subcalls of it.
+///
+/// Concept and implementation derived from the `CriticalSection` introduced in
+/// <https://github.com/rust-embedded/bare-metal>
+#[derive(Clone, Copy)]
+pub struct IRQContext<'irq_context> {
+    _0: PhantomData<&'irq_context ()>,
+}
+
+/// Asynchronous exception handling interfaces.
+pub mod interface {
+
+    /// Implemented by types that handle IRQs.
+    pub trait IRQHandler {
+        /// Called when the corresponding interrupt is asserted.
+        fn handle(&self) -> Result<(), &'static str>;
+    }
+
+    /// IRQ management functions.
+    ///
+    /// The `BSP` is supposed to supply one global instance. Typically implemented by the
+    /// platform's interrupt controller.
+    pub trait IRQManager {
+        /// The IRQ number type depends on the implementation.
+        type IRQNumberType;
+
+        /// Register a handler.
+        fn register_handler(
+            &self,
+            irq_number: Self::IRQNumberType,
+            descriptor: super::IRQDescriptor,
+        ) -> Result<(), &'static str>;
+
+        /// Enable an interrupt in the controller.
+        fn enable(&self, irq_number: Self::IRQNumberType);
+
+        /// Handle pending interrupts.
+        ///
+        /// This function is called directly from the CPU's IRQ exception vector. On AArch64,
+        /// this means that the respective CPU core has disabled exception handling.
+        /// This function can therefore not be preempted and runs start to finish.
+        ///
+        /// Takes an IRQContext token to ensure it can only be called from IRQ context.
+        #[allow(clippy::trivially_copy_pass_by_ref)]
+        fn handle_pending_irqs<'irq_context>(
+            &'irq_context self,
+            ic: &super::IRQContext<'irq_context>,
+        );
+
+        /// Print list of registered handlers.
+        fn print_handler(&self);
+    }
+}
+
+/// A wrapper type for IRQ numbers with integrated range sanity check.
+#[derive(Copy, Clone)]
+pub struct IRQNumber<const MAX_INCLUSIVE: usize>(usize);
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl<'irq_context> IRQContext<'irq_context> {
+    /// Creates an IRQContext token.
+    ///
+    /// # Safety
+    ///
+    /// - This must only be called when the current core is in an interrupt context and will not
+    ///   live beyond the end of it. That is, creation is allowed in interrupt vector functions. For
+    ///   example, in the ARMv8-A case, in `extern "C" fn current_elx_irq()`.
+    /// - Note that the lifetime `'irq_context` of the returned instance is unconstrained. User code
+    ///   must not be able to influence the lifetime picked for this type, since that might cause it
+    ///   to be inferred to `'static`.
+    #[inline(always)]
+    pub unsafe fn new() -> Self {
+        IRQContext { _0: PhantomData }
+    }
+}
+
+impl<const MAX_INCLUSIVE: usize> IRQNumber<{ MAX_INCLUSIVE }> {
+    /// Creates a new instance if number <= MAX_INCLUSIVE.
+    pub const fn new(number: usize) -> Self {
+        assert!(number <= MAX_INCLUSIVE);
+
+        Self { 0: number }
+    }
+
+    /// Return the wrapped number.
+    pub const fn get(self) -> usize {
+        self.0
+    }
+}
+
+impl<const MAX_INCLUSIVE: usize> fmt::Display for IRQNumber<{ MAX_INCLUSIVE }> {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        write!(f, "{}", self.0)
+    }
+}
+
+/// Executes the provided closure while IRQs are masked on the executing core.
+///
+/// While the function temporarily changes the HW state of the executing core, it restores it to the
+/// previous state before returning, so this is deemed safe.
+#[inline(always)]
+pub fn exec_with_irq_masked<T>(f: impl FnOnce() -> T) -> T {
+    let ret: T;
+
+    unsafe {
+        let saved = local_irq_mask_save();
+        ret = f();
+        local_irq_restore(saved);
+    }
+
+    ret
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/lib.rs b/16_virtual_mem_part4_higher_half_kernel/src/lib.rs
new file mode 100644
index 000000000..3346134ad
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/lib.rs
@@ -0,0 +1,176 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+// Rust embedded logo for `make doc`.
+#![doc(html_logo_url = "https://git.io/JeGIp")]
+
+//! The `kernel` library.
+//!
+//! Used to compose the final kernel binary.
+//!
+//! # Code organization and architecture
+//!
+//! The code is divided into different *modules*, each representing a typical **subsystem** of the
+//! `kernel`. Top-level module files of subsystems reside directly in the `src` folder. For example,
+//! `src/memory.rs` contains code that is concerned with all things memory management.
+//!
+//! ## Visibility of processor architecture code
+//!
+//! Some of the `kernel`'s subsystems depend on low-level code that is specific to the target
+//! processor architecture. For each supported processor architecture, there exists a subfolder in
+//! `src/_arch`, for example, `src/_arch/aarch64`.
+//!
+//! The architecture folders mirror the subsystem modules laid out in `src`. For example,
+//! architectural code that belongs to the `kernel`'s MMU subsystem (`src/memory/mmu.rs`) would go
+//! into `src/_arch/aarch64/memory/mmu.rs`. The latter file is loaded as a module in
+//! `src/memory/mmu.rs` using the `path attribute`. Usually, the chosen module name is the generic
+//! module's name prefixed with `arch_`.
+//!
+//! For example, this is the top of `src/memory/mmu.rs`:
+//!
+//! ```
+//! #[cfg(target_arch = "aarch64")]
+//! #[path = "../_arch/aarch64/memory/mmu.rs"]
+//! mod arch_mmu;
+//! ```
+//!
+//! Often times, items from the `arch_ module` will be publicly reexported by the parent module.
+//! This way, each architecture specific module can provide its implementation of an item, while the
+//! caller must not be concerned which architecture has been conditionally compiled.
+//!
+//! ## BSP code
+//!
+//! `BSP` stands for Board Support Package. `BSP` code is organized under `src/bsp.rs` and contains
+//! target board specific definitions and functions. These are things such as the board's memory map
+//! or instances of drivers for devices that are featured on the respective board.
+//!
+//! Just like processor architecture code, the `BSP` code's module structure tries to mirror the
+//! `kernel`'s subsystem modules, but there is no reexporting this time. That means whatever is
+//! provided must be called starting from the `bsp` namespace, e.g. `bsp::driver::driver_manager()`.
+//!
+//! ## Kernel interfaces
+//!
+//! Both `arch` and `bsp` contain code that is conditionally compiled depending on the actual target
+//! and board for which the kernel is compiled. For example, the `interrupt controller` hardware of
+//! the `Raspberry Pi 3` and the `Raspberry Pi 4` is different, but we want the rest of the `kernel`
+//! code to play nicely with any of the two without much hassle.
+//!
+//! In order to provide a clean abstraction between `arch`, `bsp` and `generic kernel code`,
+//! `interface` traits are provided *whenever possible* and *where it makes sense*. They are defined
+//! in the respective subsystem module and help to enforce the idiom of *program to an interface,
+//! not an implementation*. For example, there will be a common IRQ handling interface which the two
+//! different interrupt controller `drivers` of both Raspberrys will implement, and only export the
+//! interface to the rest of the `kernel`.
+//!
+//! ```
+//!         +-------------------+
+//!         | Interface (Trait) |
+//!         |                   |
+//!         +--+-------------+--+
+//!            ^             ^
+//!            |             |
+//!            |             |
+//! +----------+--+       +--+----------+
+//! | kernel code |       |  bsp code   |
+//! |             |       |  arch code  |
+//! +-------------+       +-------------+
+//! ```
+//!
+//! # Summary
+//!
+//! For a logical `kernel` subsystem, corresponding code can be distributed over several physical
+//! locations. Here is an example for the **memory** subsystem:
+//!
+//! - `src/memory.rs` and `src/memory/**/*`
+//!   - Common code that is agnostic of target processor architecture and `BSP` characteristics.
+//!     - Example: A function to zero a chunk of memory.
+//!   - Interfaces for the memory subsystem that are implemented by `arch` or `BSP` code.
+//!     - Example: An `MMU` interface that defines `MMU` function prototypes.
+//! - `src/bsp/__board_name__/memory.rs` and `src/bsp/__board_name__/memory/**/*`
+//!   - `BSP` specific code.
+//!   - Example: The board's memory map (physical addresses of DRAM and MMIO devices).
+//! - `src/_arch/__arch_name__/memory.rs` and `src/_arch/__arch_name__/memory/**/*`
+//!   - Processor architecture specific code.
+//!   - Example: Implementation of the `MMU` interface for the `__arch_name__` processor
+//!     architecture.
+//!
+//! From a namespace perspective, **memory** subsystem code lives in:
+//!
+//! - `crate::memory::*`
+//! - `crate::bsp::memory::*`
+//!
+//! # Boot flow
+//!
+//! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
+//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
+//!
+//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
+
+#![allow(clippy::clippy::upper_case_acronyms)]
+#![allow(incomplete_features)]
+#![feature(asm)]
+#![feature(const_evaluatable_checked)]
+#![feature(const_fn)]
+#![feature(const_fn_fn_ptr_basics)]
+#![feature(const_generics)]
+#![feature(const_panic)]
+#![feature(core_intrinsics)]
+#![feature(format_args_nl)]
+#![feature(global_asm)]
+#![feature(linkage)]
+#![feature(panic_info_message)]
+#![feature(trait_alias)]
+#![no_std]
+// Testing
+#![cfg_attr(test, no_main)]
+#![feature(custom_test_frameworks)]
+#![reexport_test_harness_main = "test_main"]
+#![test_runner(crate::test_runner)]
+
+mod panic_wait;
+mod runtime_init;
+mod synchronization;
+
+pub mod bsp;
+pub mod common;
+pub mod console;
+pub mod cpu;
+pub mod driver;
+pub mod exception;
+pub mod memory;
+pub mod print;
+pub mod state;
+pub mod time;
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+/// The default runner for unit tests.
+pub fn test_runner(tests: &[&test_types::UnitTest]) {
+    println!("Running {} tests", tests.len());
+    println!("-------------------------------------------------------------------\n");
+    for (i, test) in tests.iter().enumerate() {
+        print!("{:>3}. {:.<58}", i + 1, test.name);
+
+        // Run the actual test.
+        (test.test_func)();
+
+        // Failed tests call panic!(). Execution reaches here only if the test has passed.
+        println!("[ok]")
+    }
+}
+
+/// The `kernel_init()` for unit tests. Called from `runtime_init()`.
+#[cfg(test)]
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    exception::handling_init();
+    bsp::console::qemu_bring_up_console();
+
+    test_main();
+
+    cpu::qemu_exit_success()
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/main.rs b/16_virtual_mem_part4_higher_half_kernel/src/main.rs
new file mode 100644
index 000000000..c317bb96f
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/main.rs
@@ -0,0 +1,105 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+// Rust embedded logo for `make doc`.
+#![doc(html_logo_url = "https://git.io/JeGIp")]
+
+//! The `kernel` binary.
+
+#![feature(format_args_nl)]
+#![no_main]
+#![no_std]
+
+use libkernel::{bsp, cpu, driver, exception, info, memory, state, time, warn};
+
+/// Early init code.
+///
+/// # Safety
+///
+/// - Only a single core must be active and running this function.
+/// - Printing will not work until the respective driver's MMIO is remapped.
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
+    exception::handling_init();
+
+    // Add the mapping records for the precomputed entries first, so that they appear on the top of
+    // the list.
+    bsp::memory::mmu::kernel_add_mapping_records_for_precomputed();
+
+    // Bring up the drivers needed for printing first.
+    for i in bsp::driver::driver_manager()
+        .early_print_device_drivers()
+        .iter()
+    {
+        // Any encountered errors cannot be printed yet, obviously, so just safely park the CPU.
+        i.init().unwrap_or_else(|_| cpu::wait_forever());
+    }
+    bsp::driver::driver_manager().post_early_print_device_driver_init();
+    // Printing available from here on.
+
+    // Now bring up the remaining drivers.
+    for i in bsp::driver::driver_manager()
+        .non_early_print_device_drivers()
+        .iter()
+    {
+        if let Err(x) = i.init() {
+            panic!("Error loading driver: {}: {}", i.compatible(), x);
+        }
+    }
+
+    // Let device drivers register and enable their handlers with the interrupt controller.
+    for i in bsp::driver::driver_manager().all_device_drivers() {
+        if let Err(msg) = i.register_and_enable_irq_handler() {
+            warn!("Error registering IRQ handler: {}", msg);
+        }
+    }
+
+    // Unmask interrupts on the boot CPU core.
+    exception::asynchronous::local_irq_unmask();
+
+    // Announce conclusion of the kernel_init() phase.
+    state::state_manager().transition_to_single_core_main();
+
+    // Transition from unsafe to safe.
+    kernel_main()
+}
+
+/// The main function running after the early init.
+fn kernel_main() -> ! {
+    use driver::interface::DriverManager;
+    use exception::asynchronous::interface::IRQManager;
+
+    info!("Booting on: {}", bsp::board_name());
+
+    info!("MMU online:");
+    memory::mmu::kernel_print_mappings();
+
+    let (_, privilege_level) = exception::current_privilege_level();
+    info!("Current privilege level: {}", privilege_level);
+
+    info!("Exception handling state:");
+    exception::asynchronous::print_state();
+
+    info!(
+        "Architectural timer resolution: {} ns",
+        time::time_manager().resolution().as_nanos()
+    );
+
+    info!("Drivers loaded:");
+    for (i, driver) in bsp::driver::driver_manager()
+        .all_device_drivers()
+        .iter()
+        .enumerate()
+    {
+        info!("      {}. {}", i + 1, driver.compatible());
+    }
+
+    info!("Registered IRQ handlers:");
+    bsp::exception::asynchronous::irq_manager().print_handler();
+
+    info!("Echoing input now");
+    cpu::wait_forever();
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory.rs b/16_virtual_mem_part4_higher_half_kernel/src/memory.rs
new file mode 100644
index 000000000..87ffa81f5
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/memory.rs
@@ -0,0 +1,202 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Memory Management.
+
+pub mod mmu;
+
+use crate::common;
+use core::{
+    convert::TryFrom,
+    fmt,
+    marker::PhantomData,
+    ops::{AddAssign, RangeInclusive, SubAssign},
+};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Metadata trait for marking the type of an address.
+pub trait AddressType: Copy + Clone + PartialOrd + PartialEq {}
+
+/// Zero-sized type to mark a physical address.
+#[derive(Copy, Clone, PartialOrd, PartialEq)]
+pub enum Physical {}
+
+/// Zero-sized type to mark a virtual address.
+#[derive(Copy, Clone, PartialOrd, PartialEq)]
+pub enum Virtual {}
+
+/// Generic address type.
+#[derive(Copy, Clone, PartialOrd, PartialEq)]
+pub struct Address<ATYPE: AddressType> {
+    value: usize,
+    _address_type: PhantomData<fn() -> ATYPE>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl AddressType for Physical {}
+impl AddressType for Virtual {}
+
+impl<ATYPE: AddressType> Address<ATYPE> {
+    /// Create an instance.
+    pub const fn new(value: usize) -> Self {
+        Self {
+            value,
+            _address_type: PhantomData,
+        }
+    }
+
+    /// Align down.
+    pub const fn align_down(self, alignment: usize) -> Self {
+        let aligned = common::align_down(self.value, alignment);
+
+        Self {
+            value: aligned,
+            _address_type: PhantomData,
+        }
+    }
+
+    /// Converts `Address` into an usize.
+    pub const fn into_usize(self) -> usize {
+        self.value
+    }
+}
+
+impl TryFrom<Address<Virtual>> for Address<Physical> {
+    type Error = mmu::TranslationError;
+
+    fn try_from(virt: Address<Virtual>) -> Result<Self, Self::Error> {
+        mmu::try_virt_to_phys(virt)
+    }
+}
+
+impl<ATYPE: AddressType> core::ops::Add<usize> for Address<ATYPE> {
+    type Output = Self;
+
+    fn add(self, other: usize) -> Self {
+        Self {
+            value: self.value + other,
+            _address_type: PhantomData,
+        }
+    }
+}
+
+impl<ATYPE: AddressType> AddAssign for Address<ATYPE> {
+    fn add_assign(&mut self, other: Self) {
+        *self = Self {
+            value: self.value + other.into_usize(),
+            _address_type: PhantomData,
+        };
+    }
+}
+
+impl<ATYPE: AddressType> core::ops::Sub<usize> for Address<ATYPE> {
+    type Output = Self;
+
+    fn sub(self, other: usize) -> Self {
+        Self {
+            value: self.value - other,
+            _address_type: PhantomData,
+        }
+    }
+}
+
+impl<ATYPE: AddressType> SubAssign for Address<ATYPE> {
+    fn sub_assign(&mut self, other: Self) {
+        *self = Self {
+            value: self.value - other.into_usize(),
+            _address_type: PhantomData,
+        };
+    }
+}
+
+impl fmt::Display for Address<Physical> {
+    // Don't expect to see physical addresses greater than 40 bit.
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        let q3: u8 = ((self.value >> 32) & 0xff) as u8;
+        let q2: u16 = ((self.value >> 16) & 0xffff) as u16;
+        let q1: u16 = (self.value & 0xffff) as u16;
+
+        write!(f, "0x")?;
+        write!(f, "{:02x}_", q3)?;
+        write!(f, "{:04x}_", q2)?;
+        write!(f, "{:04x}", q1)
+    }
+}
+
+impl fmt::Display for Address<Virtual> {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        let q4: u16 = ((self.value >> 48) & 0xffff) as u16;
+        let q3: u16 = ((self.value >> 32) & 0xffff) as u16;
+        let q2: u16 = ((self.value >> 16) & 0xffff) as u16;
+        let q1: u16 = (self.value & 0xffff) as u16;
+
+        write!(f, "0x")?;
+        write!(f, "{:04x}_", q4)?;
+        write!(f, "{:04x}_", q3)?;
+        write!(f, "{:04x}_", q2)?;
+        write!(f, "{:04x}", q1)
+    }
+}
+
+/// Zero out an inclusive memory range.
+///
+/// # Safety
+///
+/// - `range.start` and `range.end` must be valid.
+/// - `range.start` and `range.end` must be `T` aligned.
+pub unsafe fn zero_volatile<T>(range: RangeInclusive<*mut T>)
+where
+    T: From<u8>,
+{
+    let mut ptr = *range.start();
+    let end_inclusive = *range.end();
+
+    while ptr <= end_inclusive {
+        core::ptr::write_volatile(ptr, T::from(0));
+        ptr = ptr.offset(1);
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// Check `zero_volatile()`.
+    #[kernel_test]
+    fn zero_volatile_works() {
+        let mut x: [usize; 3] = [10, 11, 12];
+        let x_range = x.as_mut_ptr_range();
+        let x_range_inclusive =
+            RangeInclusive::new(x_range.start, unsafe { x_range.end.offset(-1) });
+
+        unsafe { zero_volatile(x_range_inclusive) };
+
+        assert_eq!(x, [0, 0, 0]);
+    }
+
+    /// Check `bss` section layout.
+    #[kernel_test]
+    fn bss_section_is_sane() {
+        use crate::bsp::memory::bss_range_inclusive;
+        use core::mem;
+
+        let start = *bss_range_inclusive().start() as usize;
+        let end = *bss_range_inclusive().end() as usize;
+
+        assert_eq!(start % mem::size_of::<usize>(), 0);
+        assert_eq!(end % mem::size_of::<usize>(), 0);
+        assert!(end >= start);
+    }
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs
new file mode 100644
index 000000000..255093193
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs
@@ -0,0 +1,270 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Memory Management Unit.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/memory/mmu.rs"]
+mod arch_mmu;
+
+mod mapping_record;
+mod translation_table;
+mod types;
+
+use crate::{
+    bsp,
+    memory::{Address, Physical, Virtual},
+    synchronization, warn,
+};
+use core::fmt;
+
+pub use types::*;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// MMU enable errors variants.
+#[allow(missing_docs)]
+#[derive(Debug)]
+pub enum MMUEnableError {
+    AlreadyEnabled,
+    Other(&'static str),
+}
+
+/// Translation error variants.
+#[allow(missing_docs)]
+#[derive(Debug)]
+pub enum TranslationError {
+    MMUDisabled,
+    Aborted,
+}
+
+/// Memory Management interfaces.
+pub mod interface {
+    use super::*;
+
+    /// MMU functions.
+    pub trait MMU {
+        /// Turns on the MMU for the first time and enables data and instruction caching.
+        ///
+        /// # Safety
+        ///
+        /// - Changes the HW's global state.
+        unsafe fn enable_mmu_and_caching(
+            &self,
+            phys_tables_base_addr: Address<Physical>,
+        ) -> Result<(), MMUEnableError>;
+
+        /// Returns true if the MMU is enabled, false otherwise.
+        fn is_enabled(&self) -> bool;
+
+        /// Try to translate a virtual address to a physical address.
+        ///
+        /// Will only succeed if there exists a valid mapping for the input VA.
+        fn try_virt_to_phys(
+            &self,
+            virt: Address<Virtual>,
+        ) -> Result<Address<Physical>, TranslationError>;
+    }
+}
+
+/// Describes the characteristics of a translation granule.
+pub struct TranslationGranule<const GRANULE_SIZE: usize>;
+
+/// Describes properties of an address space.
+pub struct AddressSpace<const AS_SIZE: usize>;
+
+/// Intended to be implemented for [`AddressSpace`].
+pub trait AssociatedTranslationTable {
+    /// A translation table whose address range is:
+    ///
+    /// [u64::MAX, (u64::MAX - AS_SIZE) + 1]
+    type TableStartFromTop;
+
+    /// A translation table whose address range is:
+    ///
+    /// [0, AS_SIZE - 1]
+    type TableStartFromBottom;
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+use interface::MMU;
+use synchronization::interface::ReadWriteEx;
+use translation_table::interface::TranslationTable;
+
+/// Map pages in the kernel's translation tables.
+///
+/// No input checks done, input is passed through to the architectural implementation.
+///
+/// # Safety
+///
+/// - See `map_pages_at()`.
+/// - Does not prevent aliasing.
+unsafe fn kernel_map_pages_at_unchecked(
+    name: &'static str,
+    virt_pages: &PageSliceDescriptor<Virtual>,
+    phys_pages: &PageSliceDescriptor<Physical>,
+    attr: &AttributeFields,
+) -> Result<(), &'static str> {
+    bsp::memory::mmu::kernel_translation_tables()
+        .write(|tables| tables.map_pages_at(virt_pages, phys_pages, attr))?;
+
+    kernel_add_mapping_record(name, virt_pages, phys_pages, attr);
+
+    Ok(())
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl fmt::Display for MMUEnableError {
+    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+        match self {
+            MMUEnableError::AlreadyEnabled => write!(f, "MMU is already enabled"),
+            MMUEnableError::Other(x) => write!(f, "{}", x),
+        }
+    }
+}
+
+impl<const GRANULE_SIZE: usize> TranslationGranule<GRANULE_SIZE> {
+    /// The granule's size.
+    pub const SIZE: usize = Self::size_checked();
+
+    /// The granule's mask.
+    pub const MASK: usize = Self::SIZE - 1;
+
+    /// The granule's shift, aka log2(size).
+    pub const SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
+
+    const fn size_checked() -> usize {
+        assert!(GRANULE_SIZE.is_power_of_two());
+
+        GRANULE_SIZE
+    }
+}
+
+impl<const AS_SIZE: usize> AddressSpace<AS_SIZE> {
+    /// The address space size.
+    pub const SIZE: usize = Self::size_checked();
+
+    /// The address space shift, aka log2(size).
+    pub const SIZE_SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
+
+    const fn size_checked() -> usize {
+        assert!(AS_SIZE.is_power_of_two());
+
+        // Check for architectural restrictions as well.
+        Self::arch_address_space_size_sanity_checks();
+
+        AS_SIZE
+    }
+}
+
+/// Add an entry to the mapping info record.
+pub fn kernel_add_mapping_record(
+    name: &'static str,
+    virt_pages: &PageSliceDescriptor<Virtual>,
+    phys_pages: &PageSliceDescriptor<Physical>,
+    attr: &AttributeFields,
+) {
+    if let Err(x) = mapping_record::kernel_add(name, virt_pages, phys_pages, attr) {
+        warn!("{}", x);
+    }
+}
+
+/// Raw mapping of virtual to physical pages in the kernel translation tables.
+///
+/// Prevents mapping into the MMIO range of the tables.
+///
+/// # Safety
+///
+/// - See `kernel_map_pages_at_unchecked()`.
+/// - Does not prevent aliasing. Currently, the callers must be trusted.
+pub unsafe fn kernel_map_pages_at(
+    name: &'static str,
+    virt_pages: &PageSliceDescriptor<Virtual>,
+    phys_pages: &PageSliceDescriptor<Physical>,
+    attr: &AttributeFields,
+) -> Result<(), &'static str> {
+    let is_mmio = bsp::memory::mmu::kernel_translation_tables()
+        .read(|tables| tables.is_virt_page_slice_mmio(virt_pages));
+    if is_mmio {
+        return Err("Attempt to manually map into MMIO region");
+    }
+
+    kernel_map_pages_at_unchecked(name, virt_pages, phys_pages, attr)?;
+
+    Ok(())
+}
+
+/// MMIO remapping in the kernel translation tables.
+///
+/// Typically used by device drivers.
+///
+/// # Safety
+///
+/// - Same as `kernel_map_pages_at_unchecked()`, minus the aliasing part.
+pub unsafe fn kernel_map_mmio(
+    name: &'static str,
+    mmio_descriptor: &MMIODescriptor,
+) -> Result<Address<Virtual>, &'static str> {
+    let phys_pages: PageSliceDescriptor<Physical> = mmio_descriptor.clone().into();
+    let offset_into_start_page =
+        mmio_descriptor.start_addr().into_usize() & bsp::memory::mmu::KernelGranule::MASK;
+
+    // Check if an identical page slice has been mapped for another driver. If so, reuse it.
+    let virt_addr = if let Some(addr) =
+        mapping_record::kernel_find_and_insert_mmio_duplicate(mmio_descriptor, name)
+    {
+        addr
+    // Otherwise, allocate a new virtual page slice and map it.
+    } else {
+        let virt_pages: PageSliceDescriptor<Virtual> =
+            bsp::memory::mmu::kernel_translation_tables()
+                .write(|tables| tables.next_mmio_virt_page_slice(phys_pages.num_pages()))?;
+
+        kernel_map_pages_at_unchecked(
+            name,
+            &virt_pages,
+            &phys_pages,
+            &AttributeFields {
+                mem_attributes: MemAttributes::Device,
+                acc_perms: AccessPermissions::ReadWrite,
+                execute_never: true,
+            },
+        )?;
+
+        virt_pages.start_addr()
+    };
+
+    Ok(virt_addr + offset_into_start_page)
+}
+
+/// Try to translate a virtual address to a physical address.
+///
+/// Will only succeed if there exists a valid mapping for the input VA.
+pub fn try_virt_to_phys(virt: Address<Virtual>) -> Result<Address<Physical>, TranslationError> {
+    arch_mmu::mmu().try_virt_to_phys(virt)
+}
+
+/// Enable the MMU and data + instruction caching.
+///
+/// # Safety
+///
+/// - Crucial function during kernel init. Changes the the complete memory view of the processor.
+#[inline(always)]
+pub unsafe fn enable_mmu_and_caching(
+    phys_tables_base_addr: Address<Physical>,
+) -> Result<(), MMUEnableError> {
+    arch_mmu::mmu().enable_mmu_and_caching(phys_tables_base_addr)
+}
+
+/// Human-readable print of all recorded kernel mappings.
+pub fn kernel_print_mappings() {
+    mapping_record::kernel_print()
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/mapping_record.rs b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/mapping_record.rs
new file mode 100644
index 000000000..eab62fb39
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/mapping_record.rs
@@ -0,0 +1,221 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! A record of mapped pages.
+
+use super::{
+    AccessPermissions, Address, AttributeFields, MMIODescriptor, MemAttributes,
+    PageSliceDescriptor, Physical, Virtual,
+};
+use crate::{info, synchronization, synchronization::InitStateLock, warn};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Type describing a virtual memory mapping.
+#[allow(missing_docs)]
+#[derive(Copy, Clone)]
+struct MappingRecordEntry {
+    pub users: [Option<&'static str>; 5],
+    pub phys_pages: PageSliceDescriptor<Physical>,
+    pub virt_start_addr: Address<Virtual>,
+    pub attribute_fields: AttributeFields,
+}
+
+struct MappingRecord {
+    inner: [Option<MappingRecordEntry>; 12],
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static KERNEL_MAPPING_RECORD: InitStateLock<MappingRecord> =
+    InitStateLock::new(MappingRecord::new());
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl MappingRecordEntry {
+    pub fn new(
+        name: &'static str,
+        virt_pages: &PageSliceDescriptor<Virtual>,
+        phys_pages: &PageSliceDescriptor<Physical>,
+        attr: &AttributeFields,
+    ) -> Self {
+        Self {
+            users: [Some(name), None, None, None, None],
+            phys_pages: *phys_pages,
+            virt_start_addr: virt_pages.start_addr(),
+            attribute_fields: *attr,
+        }
+    }
+
+    fn find_next_free_user(&mut self) -> Result<&mut Option<&'static str>, &'static str> {
+        if let Some(x) = self.users.iter_mut().find(|x| x.is_none()) {
+            return Ok(x);
+        };
+
+        Err("Storage for user info exhausted")
+    }
+
+    pub fn add_user(&mut self, user: &'static str) -> Result<(), &'static str> {
+        let x = self.find_next_free_user()?;
+        *x = Some(user);
+        Ok(())
+    }
+}
+
+impl MappingRecord {
+    pub const fn new() -> Self {
+        Self { inner: [None; 12] }
+    }
+
+    fn find_next_free(&mut self) -> Result<&mut Option<MappingRecordEntry>, &'static str> {
+        if let Some(x) = self.inner.iter_mut().find(|x| x.is_none()) {
+            return Ok(x);
+        }
+
+        Err("Storage for mapping info exhausted")
+    }
+
+    fn find_duplicate(
+        &mut self,
+        phys_pages: &PageSliceDescriptor<Physical>,
+    ) -> Option<&mut MappingRecordEntry> {
+        self.inner
+            .iter_mut()
+            .filter(|x| x.is_some())
+            .map(|x| x.as_mut().unwrap())
+            .filter(|x| x.attribute_fields.mem_attributes == MemAttributes::Device)
+            .find(|x| x.phys_pages == *phys_pages)
+    }
+
+    pub fn add(
+        &mut self,
+        name: &'static str,
+        virt_pages: &PageSliceDescriptor<Virtual>,
+        phys_pages: &PageSliceDescriptor<Physical>,
+        attr: &AttributeFields,
+    ) -> Result<(), &'static str> {
+        let x = self.find_next_free()?;
+
+        *x = Some(MappingRecordEntry::new(name, virt_pages, phys_pages, attr));
+        Ok(())
+    }
+
+    pub fn print(&self) {
+        const KIB_RSHIFT: u32 = 10; // log2(1024).
+        const MIB_RSHIFT: u32 = 20; // log2(1024 * 1024).
+
+        info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
+        info!(
+            "      {:^44}     {:^30}   {:^7}   {:^9}   {:^35}",
+            "Virtual", "Physical", "Size", "Attr", "Entity"
+        );
+        info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
+
+        for i in self
+            .inner
+            .iter()
+            .filter(|x| x.is_some())
+            .map(|x| x.unwrap())
+        {
+            let virt_start = i.virt_start_addr;
+            let virt_end_inclusive = virt_start + i.phys_pages.size() - 1;
+            let phys_start = i.phys_pages.start_addr();
+            let phys_end_inclusive = i.phys_pages.end_addr_inclusive();
+            let size = i.phys_pages.size();
+
+            let (size, unit) = if (size >> MIB_RSHIFT) > 0 {
+                (size >> MIB_RSHIFT, "MiB")
+            } else if (size >> KIB_RSHIFT) > 0 {
+                (size >> KIB_RSHIFT, "KiB")
+            } else {
+                (size, "Byte")
+            };
+
+            let attr = match i.attribute_fields.mem_attributes {
+                MemAttributes::CacheableDRAM => "C",
+                MemAttributes::Device => "Dev",
+            };
+
+            let acc_p = match i.attribute_fields.acc_perms {
+                AccessPermissions::ReadOnly => "RO",
+                AccessPermissions::ReadWrite => "RW",
+            };
+
+            let xn = if i.attribute_fields.execute_never {
+                "XN"
+            } else {
+                "X"
+            };
+
+            info!(
+                "      {}..{} --> {}..{} | \
+                        {: >3} {} | {: <3} {} {: <2} | {}",
+                virt_start,
+                virt_end_inclusive,
+                phys_start,
+                phys_end_inclusive,
+                size,
+                unit,
+                attr,
+                acc_p,
+                xn,
+                i.users[0].unwrap()
+            );
+
+            for k in i.users[1..].iter() {
+                if let Some(additional_user) = *k {
+                    info!(
+                        "                                                                                                            | {}",
+                        additional_user
+                    );
+                }
+            }
+        }
+
+        info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+use synchronization::interface::ReadWriteEx;
+
+/// Add an entry to the mapping info record.
+pub fn kernel_add(
+    name: &'static str,
+    virt_pages: &PageSliceDescriptor<Virtual>,
+    phys_pages: &PageSliceDescriptor<Physical>,
+    attr: &AttributeFields,
+) -> Result<(), &'static str> {
+    KERNEL_MAPPING_RECORD.write(|mr| mr.add(name, virt_pages, phys_pages, attr))
+}
+
+pub fn kernel_find_and_insert_mmio_duplicate(
+    mmio_descriptor: &MMIODescriptor,
+    new_user: &'static str,
+) -> Option<Address<Virtual>> {
+    let phys_pages: PageSliceDescriptor<Physical> = mmio_descriptor.clone().into();
+
+    KERNEL_MAPPING_RECORD.write(|mr| {
+        let dup = mr.find_duplicate(&phys_pages)?;
+
+        if let Err(x) = dup.add_user(new_user) {
+            warn!("{}", x);
+        }
+
+        Some(dup.virt_start_addr)
+    })
+}
+
+/// Human-readable print of all recorded kernel mappings.
+pub fn kernel_print() {
+    KERNEL_MAPPING_RECORD.read(|mr| mr.print());
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/translation_table.rs b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/translation_table.rs
new file mode 100644
index 000000000..bf9bed8cb
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/translation_table.rs
@@ -0,0 +1,109 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Translation table.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../../_arch/aarch64/memory/mmu/translation_table.rs"]
+mod arch_translation_table;
+
+use crate::memory::{
+    mmu::{AttributeFields, PageSliceDescriptor},
+    Physical, Virtual,
+};
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+#[cfg(target_arch = "aarch64")]
+pub use arch_translation_table::FixedSizeTranslationTable;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Translation table interfaces.
+pub mod interface {
+    use super::*;
+
+    /// Translation table operations.
+    pub trait TranslationTable {
+        /// Anything that needs to run before any of the other provided functions can be used.
+        ///
+        /// # Safety
+        ///
+        /// - Implementor must ensure that this function can run only once or is harmless if invoked
+        ///   multiple times.
+        fn init(&mut self) -> Result<(), &'static str>;
+
+        /// Map the given virtual pages to the given physical pages.
+        ///
+        /// # Safety
+        ///
+        /// - Using wrong attributes can cause multiple issues of different nature in the system.
+        /// - It is not required that the architectural implementation prevents aliasing. That is,
+        ///   mapping to the same physical memory using multiple virtual addresses, which would
+        ///   break Rust's ownership assumptions. This should be protected against in the kernel's
+        ///   generic MMU code.
+        unsafe fn map_pages_at(
+            &mut self,
+            virt_pages: &PageSliceDescriptor<Virtual>,
+            phys_pages: &PageSliceDescriptor<Physical>,
+            attr: &AttributeFields,
+        ) -> Result<(), &'static str>;
+
+        /// Obtain a free virtual page slice in the MMIO region.
+        ///
+        /// The "MMIO region" is a distinct region of the implementor's choice, which allows
+        /// differentiating MMIO addresses from others. This can speed up debugging efforts.
+        /// Ideally, those MMIO addresses are also standing out visually so that a human eye can
+        /// identify them. For example, by allocating them from near the end of the virtual address
+        /// space.
+        fn next_mmio_virt_page_slice(
+            &mut self,
+            num_pages: usize,
+        ) -> Result<PageSliceDescriptor<Virtual>, &'static str>;
+
+        /// Check if a virtual page splice is in the "MMIO region".
+        fn is_virt_page_slice_mmio(&self, virt_pages: &PageSliceDescriptor<Virtual>) -> bool;
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use crate::{bsp, memory::Address};
+    use arch_translation_table::MinSizeTranslationTable;
+    use interface::TranslationTable;
+    use test_macros::kernel_test;
+
+    /// Sanity checks for the TranslationTable implementation.
+    #[kernel_test]
+    fn translationtable_implementation_sanity() {
+        // This will occupy a lot of space on the stack.
+        let mut tables = MinSizeTranslationTable::new_for_runtime();
+
+        assert!(tables.init().is_ok());
+
+        let x = tables.next_mmio_virt_page_slice(0);
+        assert!(x.is_err());
+
+        let x = tables.next_mmio_virt_page_slice(1_0000_0000);
+        assert!(x.is_err());
+
+        let x = tables.next_mmio_virt_page_slice(2).unwrap();
+        assert_eq!(x.size(), bsp::memory::mmu::KernelGranule::SIZE * 2);
+
+        assert_eq!(tables.is_virt_page_slice_mmio(&x), true);
+
+        assert_eq!(
+            tables.is_virt_page_slice_mmio(&PageSliceDescriptor::from_addr(Address::new(0), 1)),
+            false
+        );
+    }
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/types.rs b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/types.rs
new file mode 100644
index 000000000..dc05fd70c
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/types.rs
@@ -0,0 +1,217 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Memory Management Unit types.
+
+use crate::{
+    bsp, common,
+    memory::{Address, AddressType, Physical, Virtual},
+};
+use core::{
+    convert::{From, TryFrom},
+    marker::PhantomData,
+};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Generic page type.
+#[repr(C)]
+pub struct Page<ATYPE: AddressType> {
+    inner: [u8; bsp::memory::mmu::KernelGranule::SIZE],
+    _address_type: PhantomData<ATYPE>,
+}
+
+/// Type describing a slice of pages.
+#[derive(Copy, Clone, PartialOrd, PartialEq)]
+pub struct PageSliceDescriptor<ATYPE: AddressType> {
+    start: Address<ATYPE>,
+    num_pages: usize,
+}
+
+/// Architecture agnostic memory attributes.
+#[allow(missing_docs)]
+#[derive(Copy, Clone, PartialOrd, PartialEq)]
+pub enum MemAttributes {
+    CacheableDRAM,
+    Device,
+}
+
+/// Architecture agnostic access permissions.
+#[allow(missing_docs)]
+#[derive(Copy, Clone)]
+pub enum AccessPermissions {
+    ReadOnly,
+    ReadWrite,
+}
+
+/// Collection of memory attributes.
+#[allow(missing_docs)]
+#[derive(Copy, Clone)]
+pub struct AttributeFields {
+    pub mem_attributes: MemAttributes,
+    pub acc_perms: AccessPermissions,
+    pub execute_never: bool,
+}
+
+/// An MMIO descriptor for use in device drivers.
+#[derive(Copy, Clone)]
+pub struct MMIODescriptor {
+    start_addr: Address<Physical>,
+    size: usize,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+// Page
+//------------------------------------------------------------------------------
+
+impl<ATYPE: AddressType> Page<ATYPE> {
+    /// Get a pointer to the instance.
+    pub const fn as_ptr(&self) -> *const Page<ATYPE> {
+        self as *const _
+    }
+}
+
+//------------------------------------------------------------------------------
+// PageSliceDescriptor
+//------------------------------------------------------------------------------
+
+impl<ATYPE: AddressType> PageSliceDescriptor<ATYPE> {
+    /// Create an instance.
+    pub const fn from_addr(start: Address<ATYPE>, num_pages: usize) -> Self {
+        assert!(common::is_aligned(
+            start.into_usize(),
+            bsp::memory::mmu::KernelGranule::SIZE
+        ));
+        assert!(num_pages > 0);
+
+        Self { start, num_pages }
+    }
+
+    /// Return a pointer to the first page of the described slice.
+    const fn first_page_ptr(&self) -> *const Page<ATYPE> {
+        self.start.into_usize() as *const _
+    }
+
+    /// Return the number of Pages the slice describes.
+    pub const fn num_pages(&self) -> usize {
+        self.num_pages
+    }
+
+    /// Return the memory size this descriptor spans.
+    pub const fn size(&self) -> usize {
+        self.num_pages * bsp::memory::mmu::KernelGranule::SIZE
+    }
+
+    /// Return the start address.
+    pub const fn start_addr(&self) -> Address<ATYPE> {
+        self.start
+    }
+
+    /// Return the exclusive end address.
+    pub fn end_addr(&self) -> Address<ATYPE> {
+        self.start + self.size()
+    }
+
+    /// Return the inclusive end address.
+    pub fn end_addr_inclusive(&self) -> Address<ATYPE> {
+        self.start + (self.size() - 1)
+    }
+
+    /// Check if an address is contained within this descriptor.
+    pub fn contains(&self, addr: Address<ATYPE>) -> bool {
+        (addr >= self.start_addr()) && (addr <= self.end_addr_inclusive())
+    }
+
+    /// Return a non-mutable slice of Pages.
+    ///
+    /// # Safety
+    ///
+    /// - Same as applies for `core::slice::from_raw_parts`.
+    pub unsafe fn as_slice(&self) -> &[Page<ATYPE>] {
+        core::slice::from_raw_parts(self.first_page_ptr(), self.num_pages)
+    }
+}
+
+impl TryFrom<PageSliceDescriptor<Virtual>> for PageSliceDescriptor<Physical> {
+    type Error = super::TranslationError;
+
+    fn try_from(desc: PageSliceDescriptor<Virtual>) -> Result<Self, Self::Error> {
+        let phys_start = super::try_virt_to_phys(desc.start)?;
+
+        Ok(Self {
+            start: phys_start,
+            num_pages: desc.num_pages,
+        })
+    }
+}
+
+impl From<MMIODescriptor> for PageSliceDescriptor<Physical> {
+    fn from(desc: MMIODescriptor) -> Self {
+        let start_page_addr = desc
+            .start_addr
+            .align_down(bsp::memory::mmu::KernelGranule::SIZE);
+
+        let len = ((desc.end_addr_inclusive().into_usize() - start_page_addr.into_usize())
+            >> bsp::memory::mmu::KernelGranule::SHIFT)
+            + 1;
+
+        Self {
+            start: start_page_addr,
+            num_pages: len,
+        }
+    }
+}
+
+//------------------------------------------------------------------------------
+// MMIODescriptor
+//------------------------------------------------------------------------------
+
+impl MMIODescriptor {
+    /// Create an instance.
+    pub const fn new(start_addr: Address<Physical>, size: usize) -> Self {
+        assert!(size > 0);
+
+        Self { start_addr, size }
+    }
+
+    /// Return the start address.
+    pub const fn start_addr(&self) -> Address<Physical> {
+        self.start_addr
+    }
+
+    /// Return the inclusive end address.
+    pub fn end_addr_inclusive(&self) -> Address<Physical> {
+        self.start_addr + (self.size - 1)
+    }
+
+    /// Return the size.
+    pub const fn size(&self) -> usize {
+        self.size
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// Check if the size of `struct Page` is as expected.
+    #[kernel_test]
+    fn size_of_page_equals_granule_size() {
+        assert_eq!(
+            core::mem::size_of::<Page<Physical>>(),
+            bsp::memory::mmu::KernelGranule::SIZE
+        );
+    }
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/panic_wait.rs b/16_virtual_mem_part4_higher_half_kernel/src/panic_wait.rs
new file mode 100644
index 000000000..e3a9ed8ab
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/panic_wait.rs
@@ -0,0 +1,58 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! A panic handler that infinitely waits.
+
+use crate::{bsp, cpu, exception};
+use core::{fmt, panic::PanicInfo};
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+fn _panic_print(args: fmt::Arguments) {
+    use fmt::Write;
+
+    unsafe { bsp::console::panic_console_out().write_fmt(args).unwrap() };
+}
+
+/// The point of exit for `libkernel`.
+///
+/// It is linked weakly, so that the integration tests can overload its standard behavior.
+#[linkage = "weak"]
+#[no_mangle]
+fn _panic_exit() -> ! {
+    #[cfg(not(test_build))]
+    {
+        cpu::wait_forever()
+    }
+
+    #[cfg(test_build)]
+    {
+        cpu::qemu_exit_failure()
+    }
+}
+
+/// Prints with a newline - only use from the panic handler.
+///
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
+#[macro_export]
+macro_rules! panic_println {
+    ($($arg:tt)*) => ({
+        _panic_print(format_args_nl!($($arg)*));
+    })
+}
+
+#[panic_handler]
+fn panic(info: &PanicInfo) -> ! {
+    unsafe { exception::asynchronous::local_irq_mask() };
+
+    if let Some(args) = info.message() {
+        panic_println!("\nKernel panic: {}", args);
+    } else {
+        panic_println!("\nKernel panic!");
+    }
+
+    _panic_exit()
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/print.rs b/16_virtual_mem_part4_higher_half_kernel/src/print.rs
new file mode 100644
index 000000000..89fa66943
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/print.rs
@@ -0,0 +1,106 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Printing.
+
+use crate::{bsp, console};
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+#[doc(hidden)]
+pub fn _print(args: fmt::Arguments) {
+    use console::interface::Write;
+
+    bsp::console::console().write_fmt(args).unwrap();
+}
+
+/// Prints without a newline.
+///
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
+#[macro_export]
+macro_rules! print {
+    ($($arg:tt)*) => ($crate::print::_print(format_args!($($arg)*)));
+}
+
+/// Prints with a newline.
+///
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
+#[macro_export]
+macro_rules! println {
+    () => ($crate::print!("\n"));
+    ($($arg:tt)*) => ({
+        $crate::print::_print(format_args_nl!($($arg)*));
+    })
+}
+
+/// Prints an info, with a newline.
+#[macro_export]
+macro_rules! info {
+    ($string:expr) => ({
+        #[allow(unused_imports)]
+        use crate::time::interface::TimeManager;
+
+        let timestamp = $crate::time::time_manager().uptime();
+        let timestamp_subsec_us = timestamp.subsec_micros();
+
+        $crate::print::_print(format_args_nl!(
+            concat!("[  {:>3}.{:03}{:03}] ", $string),
+            timestamp.as_secs(),
+            timestamp_subsec_us / 1_000,
+            timestamp_subsec_us % 1_000
+        ));
+    });
+    ($format_string:expr, $($arg:tt)*) => ({
+        #[allow(unused_imports)]
+        use crate::time::interface::TimeManager;
+
+        let timestamp = $crate::time::time_manager().uptime();
+        let timestamp_subsec_us = timestamp.subsec_micros();
+
+        $crate::print::_print(format_args_nl!(
+            concat!("[  {:>3}.{:03}{:03}] ", $format_string),
+            timestamp.as_secs(),
+            timestamp_subsec_us / 1_000,
+            timestamp_subsec_us % 1_000,
+            $($arg)*
+        ));
+    })
+}
+
+/// Prints a warning, with a newline.
+#[macro_export]
+macro_rules! warn {
+    ($string:expr) => ({
+        #[allow(unused_imports)]
+        use crate::time::interface::TimeManager;
+
+        let timestamp = $crate::time::time_manager().uptime();
+        let timestamp_subsec_us = timestamp.subsec_micros();
+
+        $crate::print::_print(format_args_nl!(
+            concat!("[W {:>3}.{:03}{:03}] ", $string),
+            timestamp.as_secs(),
+            timestamp_subsec_us / 1_000,
+            timestamp_subsec_us % 1_000
+        ));
+    });
+    ($format_string:expr, $($arg:tt)*) => ({
+        #[allow(unused_imports)]
+        use crate::time::interface::TimeManager;
+
+        let timestamp = $crate::time::time_manager().uptime();
+        let timestamp_subsec_us = timestamp.subsec_micros();
+
+        $crate::print::_print(format_args_nl!(
+            concat!("[W {:>3}.{:03}{:03}] ", $format_string),
+            timestamp.as_secs(),
+            timestamp_subsec_us / 1_000,
+            timestamp_subsec_us % 1_000,
+            $($arg)*
+        ));
+    })
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/runtime_init.rs b/16_virtual_mem_part4_higher_half_kernel/src/runtime_init.rs
new file mode 100644
index 000000000..2c0a62e67
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/runtime_init.rs
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Rust runtime initialization code.
+
+use crate::{bsp, memory};
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// Zero out the .bss section.
+///
+/// # Safety
+///
+/// - Must only be called pre `kernel_init()`.
+#[inline(always)]
+unsafe fn zero_bss() {
+    memory::zero_volatile(bsp::memory::bss_range_inclusive());
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Equivalent to `crt0` or `c0` code in C/C++ world. Clears the `bss` section, then jumps to kernel
+/// init code.
+///
+/// # Safety
+///
+/// - Only a single core must be active and running this function.
+#[no_mangle]
+pub unsafe fn runtime_init() -> ! {
+    extern "Rust" {
+        fn kernel_init() -> !;
+    }
+
+    zero_bss();
+    kernel_init()
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/state.rs b/16_virtual_mem_part4_higher_half_kernel/src/state.rs
new file mode 100644
index 000000000..c94d04c84
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/state.rs
@@ -0,0 +1,92 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! State information about the kernel itself.
+
+use core::sync::atomic::{AtomicU8, Ordering};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Different stages in the kernel execution.
+#[derive(Copy, Clone, Eq, PartialEq)]
+enum State {
+    /// The kernel starts booting in this state.
+    Init,
+
+    /// The kernel transitions to this state when jumping to `kernel_main()` (at the end of
+    /// `kernel_init()`, after all init calls are done).
+    SingleCoreMain,
+
+    /// The kernel transitions to this state when it boots the secondary cores, aka switches
+    /// exectution mode to symmetric multiprocessing (SMP).
+    MultiCoreMain,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Maintains the kernel state and state transitions.
+pub struct StateManager(AtomicU8);
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static STATE_MANAGER: StateManager = StateManager::new();
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the global StateManager.
+pub fn state_manager() -> &'static StateManager {
+    &STATE_MANAGER
+}
+
+impl StateManager {
+    const INIT: u8 = 0;
+    const SINGLE_CORE_MAIN: u8 = 1;
+    const MULTI_CORE_MAIN: u8 = 2;
+
+    /// Create a new instance.
+    pub const fn new() -> Self {
+        Self(AtomicU8::new(Self::INIT))
+    }
+
+    /// Return the current state.
+    fn state(&self) -> State {
+        let state = self.0.load(Ordering::Acquire);
+
+        match state {
+            Self::INIT => State::Init,
+            Self::SINGLE_CORE_MAIN => State::SingleCoreMain,
+            Self::MULTI_CORE_MAIN => State::MultiCoreMain,
+            _ => panic!("Invalid KERNEL_STATE"),
+        }
+    }
+
+    /// Return if the kernel is init state.
+    pub fn is_init(&self) -> bool {
+        self.state() == State::Init
+    }
+
+    /// Transition from Init to SingleCoreMain.
+    pub fn transition_to_single_core_main(&self) {
+        if self
+            .0
+            .compare_exchange(
+                Self::INIT,
+                Self::SINGLE_CORE_MAIN,
+                Ordering::Acquire,
+                Ordering::Relaxed,
+            )
+            .is_err()
+        {
+            panic!("transition_to_single_core_main() called while state != Init");
+        }
+    }
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/synchronization.rs b/16_virtual_mem_part4_higher_half_kernel/src/synchronization.rs
new file mode 100644
index 000000000..94582732c
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/synchronization.rs
@@ -0,0 +1,159 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Synchronization primitives.
+//!
+//! # Resources
+//!
+//!   - <https://doc.rust-lang.org/book/ch16-04-extensible-concurrency-sync-and-send.html>
+//!   - <https://stackoverflow.com/questions/59428096/understanding-the-send-trait>
+//!   - <https://doc.rust-lang.org/std/cell/index.html>
+
+use core::cell::UnsafeCell;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Synchronization interfaces.
+pub mod interface {
+
+    /// Any object implementing this trait guarantees exclusive access to the data wrapped within
+    /// the Mutex for the duration of the provided closure.
+    pub trait Mutex {
+        /// The type of the data that is wrapped by this mutex.
+        type Data;
+
+        /// Locks the mutex and grants the closure temporary mutable access to the wrapped data.
+        fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R;
+    }
+
+    /// A reader-writer exclusion type.
+    ///
+    /// The implementing object allows either a number of readers or at most one writer at any point
+    /// in time.
+    pub trait ReadWriteEx {
+        /// The type of encapsulated data.
+        type Data;
+
+        /// Grants temporary mutable access to the encapsulated data.
+        fn write<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R;
+
+        /// Grants temporary immutable access to the encapsulated data.
+        fn read<R>(&self, f: impl FnOnce(&Self::Data) -> R) -> R;
+    }
+}
+
+/// A pseudo-lock for teaching purposes.
+///
+/// In contrast to a real Mutex implementation, does not protect against concurrent access from
+/// other cores to the contained data. This part is preserved for later lessons.
+///
+/// The lock will only be used as long as it is safe to do so, i.e. as long as the kernel is
+/// executing on a single core.
+pub struct IRQSafeNullLock<T>
+where
+    T: ?Sized,
+{
+    data: UnsafeCell<T>,
+}
+
+/// A pseudo-lock that is RW during the single-core kernel init phase and RO afterwards.
+///
+/// Intended to encapsulate data that is populated during kernel init when no concurrency exists.
+pub struct InitStateLock<T>
+where
+    T: ?Sized,
+{
+    data: UnsafeCell<T>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+unsafe impl<T> Send for IRQSafeNullLock<T> where T: ?Sized + Send {}
+unsafe impl<T> Sync for IRQSafeNullLock<T> where T: ?Sized + Send {}
+
+impl<T> IRQSafeNullLock<T> {
+    /// Create an instance.
+    pub const fn new(data: T) -> Self {
+        Self {
+            data: UnsafeCell::new(data),
+        }
+    }
+}
+
+unsafe impl<T> Send for InitStateLock<T> where T: ?Sized + Send {}
+unsafe impl<T> Sync for InitStateLock<T> where T: ?Sized + Send {}
+
+impl<T> InitStateLock<T> {
+    /// Create an instance.
+    pub const fn new(data: T) -> Self {
+        Self {
+            data: UnsafeCell::new(data),
+        }
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use crate::{exception, state};
+
+impl<T> interface::Mutex for IRQSafeNullLock<T> {
+    type Data = T;
+
+    fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
+        // In a real lock, there would be code encapsulating this line that ensures that this
+        // mutable reference will ever only be given out once at a time.
+        let data = unsafe { &mut *self.data.get() };
+
+        // Execute the closure while IRQs are masked.
+        exception::asynchronous::exec_with_irq_masked(|| f(data))
+    }
+}
+
+impl<T> interface::ReadWriteEx for InitStateLock<T> {
+    type Data = T;
+
+    fn write<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
+        assert!(
+            state::state_manager().is_init(),
+            "InitStateLock::write called after kernel init phase"
+        );
+        assert!(
+            !exception::asynchronous::is_local_irq_masked(),
+            "InitStateLock::write called with IRQs unmasked"
+        );
+
+        let data = unsafe { &mut *self.data.get() };
+
+        f(data)
+    }
+
+    fn read<R>(&self, f: impl FnOnce(&Self::Data) -> R) -> R {
+        let data = unsafe { &*self.data.get() };
+
+        f(data)
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// InitStateLock must be transparent.
+    #[kernel_test]
+    fn init_state_lock_is_transparent() {
+        use core::mem::size_of;
+
+        assert_eq!(size_of::<InitStateLock<u64>>(), size_of::<u64>());
+    }
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/time.rs b/16_virtual_mem_part4_higher_half_kernel/src/time.rs
new file mode 100644
index 000000000..953b6f0df
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/time.rs
@@ -0,0 +1,37 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Timer primitives.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "_arch/aarch64/time.rs"]
+mod arch_time;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_time::time_manager;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Timekeeping interfaces.
+pub mod interface {
+    use core::time::Duration;
+
+    /// Time management functions.
+    pub trait TimeManager {
+        /// The timer's resolution.
+        fn resolution(&self) -> Duration;
+
+        /// The uptime since power-on of the device.
+        ///
+        /// This includes time consumed by firmware and bootloaders.
+        fn uptime(&self) -> Duration;
+
+        /// Spin for a given duration.
+        fn spin_for(&self, duration: Duration);
+    }
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/test-macros/Cargo.toml b/16_virtual_mem_part4_higher_half_kernel/test-macros/Cargo.toml
new file mode 100644
index 000000000..a570f72b4
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/test-macros/Cargo.toml
@@ -0,0 +1,14 @@
+[package]
+name = "test-macros"
+version = "0.1.0"
+authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+edition = "2018"
+
+[lib]
+proc-macro = true
+
+[dependencies]
+proc-macro2 = "1.x"
+quote = "1.x"
+syn = { version = "1.x", features = ["full"] }
+test-types = { path = "../test-types" }
diff --git a/16_virtual_mem_part4_higher_half_kernel/test-macros/src/lib.rs b/16_virtual_mem_part4_higher_half_kernel/test-macros/src/lib.rs
new file mode 100644
index 000000000..36c95e8a6
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/test-macros/src/lib.rs
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+
+use proc_macro::TokenStream;
+use proc_macro2::Span;
+use quote::quote;
+use syn::{parse_macro_input, Ident, ItemFn};
+
+#[proc_macro_attribute]
+pub fn kernel_test(_attr: TokenStream, input: TokenStream) -> TokenStream {
+    let f = parse_macro_input!(input as ItemFn);
+
+    let test_name = &format!("{}", f.sig.ident.to_string());
+    let test_ident = Ident::new(
+        &format!("{}_TEST_CONTAINER", f.sig.ident.to_string().to_uppercase()),
+        Span::call_site(),
+    );
+    let test_code_block = f.block;
+
+    quote!(
+        #[test_case]
+        const #test_ident: test_types::UnitTest = test_types::UnitTest {
+            name: #test_name,
+            test_func: || #test_code_block,
+        };
+    )
+    .into()
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/test-types/Cargo.toml b/16_virtual_mem_part4_higher_half_kernel/test-types/Cargo.toml
new file mode 100644
index 000000000..a0be2c57c
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/test-types/Cargo.toml
@@ -0,0 +1,5 @@
+[package]
+name = "test-types"
+version = "0.1.0"
+authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+edition = "2018"
diff --git a/16_virtual_mem_part4_higher_half_kernel/test-types/src/lib.rs b/16_virtual_mem_part4_higher_half_kernel/test-types/src/lib.rs
new file mode 100644
index 000000000..fe7d918f5
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/test-types/src/lib.rs
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Types for the `custom_test_frameworks` implementation.
+
+#![no_std]
+
+/// Unit test container.
+pub struct UnitTest {
+    /// Name of the test.
+    pub name: &'static str,
+
+    /// Function pointer to the test.
+    pub test_func: fn(),
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rb b/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rb
new file mode 100644
index 000000000..dfd6b16ea
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rb
@@ -0,0 +1,50 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+
+require 'expect'
+
+TIMEOUT_SECS = 3
+
+# Verify sending and receiving works as expected.
+class TxRxHandshake
+    def name
+        'Transmit and Receive handshake'
+    end
+
+    def run(qemu_out, qemu_in)
+        qemu_in.write_nonblock('ABC')
+        raise('TX/RX test failed') if qemu_out.expect('OK1234', TIMEOUT_SECS).nil?
+    end
+end
+
+# Check for correct TX statistics implementation. Depends on test 1 being run first.
+class TxStatistics
+    def name
+        'Transmit statistics'
+    end
+
+    def run(qemu_out, _qemu_in)
+        raise('chars_written reported wrong') if qemu_out.expect('6', TIMEOUT_SECS).nil?
+    end
+end
+
+# Check for correct RX statistics implementation. Depends on test 1 being run first.
+class RxStatistics
+    def name
+        'Receive statistics'
+    end
+
+    def run(qemu_out, _qemu_in)
+        raise('chars_read reported wrong') if qemu_out.expect('3', TIMEOUT_SECS).nil?
+    end
+end
+
+##--------------------------------------------------------------------------------------------------
+## Test registration
+##--------------------------------------------------------------------------------------------------
+def subtest_collection
+    [TxRxHandshake.new, TxStatistics.new, RxStatistics.new]
+end
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rs b/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rs
new file mode 100644
index 000000000..ad7fd2bf5
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rs
@@ -0,0 +1,35 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Console sanity tests - RX, TX and statistics.
+
+#![feature(format_args_nl)]
+#![no_main]
+#![no_std]
+
+use libkernel::{bsp, console, cpu, exception, print};
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    use bsp::console::console;
+    use console::interface::*;
+
+    exception::handling_init();
+    bsp::console::qemu_bring_up_console();
+
+    // Handshake
+    assert_eq!(console().read_char(), 'A');
+    assert_eq!(console().read_char(), 'B');
+    assert_eq!(console().read_char(), 'C');
+    print!("OK1234");
+
+    // 6
+    print!("{}", console().chars_written());
+
+    // 3
+    print!("{}", console().chars_read());
+
+    // The QEMU process running this test will be closed by the I/O test harness.
+    cpu::wait_forever()
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/01_timer_sanity.rs b/16_virtual_mem_part4_higher_half_kernel/tests/01_timer_sanity.rs
new file mode 100644
index 000000000..f39d83845
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/tests/01_timer_sanity.rs
@@ -0,0 +1,49 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Timer sanity tests.
+
+#![feature(custom_test_frameworks)]
+#![no_main]
+#![no_std]
+#![reexport_test_harness_main = "test_main"]
+#![test_runner(libkernel::test_runner)]
+
+use core::time::Duration;
+use libkernel::{bsp, cpu, exception, time, time::interface::TimeManager};
+use test_macros::kernel_test;
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    exception::handling_init();
+    bsp::console::qemu_bring_up_console();
+
+    // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
+
+    test_main();
+
+    cpu::qemu_exit_success()
+}
+
+/// Simple check that the timer is running.
+#[kernel_test]
+fn timer_is_counting() {
+    assert!(time::time_manager().uptime().as_nanos() > 0)
+}
+
+/// Timer resolution must be sufficient.
+#[kernel_test]
+fn timer_resolution_is_sufficient() {
+    assert!(time::time_manager().resolution().as_nanos() < 100)
+}
+
+/// Sanity check spin_for() implementation.
+#[kernel_test]
+fn spin_accuracy_check_1_second() {
+    let t1 = time::time_manager().uptime();
+    time::time_manager().spin_for(Duration::from_secs(1));
+    let t2 = time::time_manager().uptime();
+
+    assert_eq!((t2 - t1).as_secs(), 1)
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs b/16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs
new file mode 100644
index 000000000..30d420a75
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Page faults must result in synchronous exceptions.
+
+#![feature(format_args_nl)]
+#![no_main]
+#![no_std]
+
+/// Overwrites libkernel's `panic_wait::_panic_exit()` so that it returns a "success" code.
+///
+/// In this test, teaching the panic is a success, because it is called from the synchronous
+/// exception handler, which is what this test wants to achieve.
+///
+/// It also means that this integration test can not use any other code that calls panic!() directly
+/// or indirectly.
+mod panic_exit_success;
+
+use libkernel::{bsp, cpu, exception, println};
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    exception::handling_init();
+    bsp::console::qemu_bring_up_console();
+
+    println!("Testing synchronous exception handling by causing a page fault");
+    println!("-------------------------------------------------------------------\n");
+
+    println!("Writing to bottom of address space to address 1 GiB...");
+    let big_addr: u64 = 1 * 1024 * 1024 * 1024;
+    core::ptr::read_volatile(big_addr as *mut u64);
+
+    // If execution reaches here, the memory access above did not cause a page fault exception.
+    cpu::qemu_exit_failure()
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/03_exception_irq_sanity.rs b/16_virtual_mem_part4_higher_half_kernel/tests/03_exception_irq_sanity.rs
new file mode 100644
index 000000000..ac25d01a8
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/tests/03_exception_irq_sanity.rs
@@ -0,0 +1,66 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! IRQ handling sanity tests.
+
+#![feature(custom_test_frameworks)]
+#![no_main]
+#![no_std]
+#![reexport_test_harness_main = "test_main"]
+#![test_runner(libkernel::test_runner)]
+
+use libkernel::{bsp, cpu, exception};
+use test_macros::kernel_test;
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    bsp::console::qemu_bring_up_console();
+
+    exception::handling_init();
+    exception::asynchronous::local_irq_unmask();
+
+    test_main();
+
+    cpu::qemu_exit_success()
+}
+
+/// Check that IRQ masking works.
+#[kernel_test]
+fn local_irq_mask_works() {
+    // Precondition: IRQs are unmasked.
+    assert!(exception::asynchronous::is_local_irq_masked());
+
+    unsafe { exception::asynchronous::local_irq_mask() };
+    assert!(!exception::asynchronous::is_local_irq_masked());
+
+    // Restore earlier state.
+    unsafe { exception::asynchronous::local_irq_unmask() };
+}
+
+/// Check that IRQ unmasking works.
+#[kernel_test]
+fn local_irq_unmask_works() {
+    // Precondition: IRQs are masked.
+    unsafe { exception::asynchronous::local_irq_mask() };
+    assert!(!exception::asynchronous::is_local_irq_masked());
+
+    unsafe { exception::asynchronous::local_irq_unmask() };
+    assert!(exception::asynchronous::is_local_irq_masked());
+}
+
+/// Check that IRQ mask save is saving "something".
+#[kernel_test]
+fn local_irq_mask_save_works() {
+    // Precondition: IRQs are unmasked.
+    assert!(exception::asynchronous::is_local_irq_masked());
+
+    let first = unsafe { exception::asynchronous::local_irq_mask_save() };
+    assert!(!exception::asynchronous::is_local_irq_masked());
+
+    let second = unsafe { exception::asynchronous::local_irq_mask_save() };
+    assert_ne!(first, second);
+
+    unsafe { exception::asynchronous::local_irq_restore(first) };
+    assert!(exception::asynchronous::is_local_irq_masked());
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/panic_exit_success/mod.rs b/16_virtual_mem_part4_higher_half_kernel/tests/panic_exit_success/mod.rs
new file mode 100644
index 000000000..29d1f9750
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/tests/panic_exit_success/mod.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+
+/// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
+#[no_mangle]
+fn _panic_exit() -> ! {
+    libkernel::cpu::qemu_exit_success()
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/runner.rb b/16_virtual_mem_part4_higher_half_kernel/tests/runner.rb
new file mode 100755
index 000000000..53116e088
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/tests/runner.rb
@@ -0,0 +1,143 @@
+#!/usr/bin/env ruby
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+
+require 'English'
+require 'pty'
+
+# Test base class.
+class Test
+    INDENT = '         '
+
+    def print_border(status)
+        puts
+        puts "#{INDENT}-------------------------------------------------------------------"
+        puts status
+        puts "#{INDENT}-------------------------------------------------------------------\n\n\n"
+    end
+
+    def print_error(error)
+        puts
+        print_border("#{INDENT}❌ Failure: #{error}: #{@test_name}")
+    end
+
+    def print_success
+        print_border("#{INDENT}✅ Success: #{@test_name}")
+    end
+
+    def print_output
+        puts "#{INDENT}-------------------------------------------------------------------"
+        print INDENT
+        print '🦀 '
+        print @output.join.gsub("\n", "\n#{INDENT}")
+    end
+
+    def finish(error)
+        print_output
+
+        exit_code = if error
+                        print_error(error)
+                        false
+                    else
+                        print_success
+                        true
+                    end
+
+        exit(exit_code)
+    end
+end
+
+# Executes tests with console I/O.
+class ConsoleTest < Test
+    def initialize(binary, qemu_cmd, test_name, console_subtests)
+        super()
+
+        @binary = binary
+        @qemu_cmd = qemu_cmd
+        @test_name = test_name
+        @console_subtests = console_subtests
+        @cur_subtest = 1
+        @output = ["Running #{@console_subtests.length} console-based tests\n",
+                   "-------------------------------------------------------------------\n\n"]
+    end
+
+    def format_test_name(number, name)
+        formatted_name = "#{number.to_s.rjust(3)}. #{name}"
+        formatted_name.ljust(63, '.')
+    end
+
+    def run_subtest(subtest, qemu_out, qemu_in)
+        @output << format_test_name(@cur_subtest, subtest.name)
+
+        subtest.run(qemu_out, qemu_in)
+
+        @output << "[ok]\n"
+        @cur_subtest += 1
+    end
+
+    def exec
+        error = false
+
+        PTY.spawn(@qemu_cmd) do |qemu_out, qemu_in|
+            begin
+                @console_subtests.each { |t| run_subtest(t, qemu_out, qemu_in) }
+            rescue StandardError => e
+                error = e.message
+            end
+
+            finish(error)
+        end
+    end
+end
+
+# A wrapper around the bare QEMU invocation.
+class RawTest < Test
+    MAX_WAIT_SECS = 5
+
+    def initialize(binary, qemu_cmd, test_name)
+        super()
+
+        @binary = binary
+        @qemu_cmd = qemu_cmd
+        @test_name = test_name
+        @output = []
+    end
+
+    def exec
+        error = 'Timed out waiting for test'
+        io = IO.popen(@qemu_cmd)
+
+        while IO.select([io], nil, nil, MAX_WAIT_SECS)
+            begin
+                @output << io.read_nonblock(1024)
+            rescue EOFError
+                io.close
+                error = $CHILD_STATUS.to_i != 0
+                break
+            end
+        end
+
+        finish(error)
+    end
+end
+
+##--------------------------------------------------------------------------------------------------
+## Script entry point
+##--------------------------------------------------------------------------------------------------
+binary = ARGV.last
+test_name = binary.gsub(%r{.*deps/}, '').split('-')[0]
+console_test_file = "tests/#{test_name}.rb"
+qemu_cmd = ARGV.join(' ')
+
+test_runner = if File.exist?(console_test_file)
+                  load console_test_file
+                  # subtest_collection is provided by console_test_file
+                  ConsoleTest.new(binary, qemu_cmd, test_name, subtest_collection)
+              else
+                  RawTest.new(binary, qemu_cmd, test_name)
+              end
+
+test_runner.exec
diff --git a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/arch.rb b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/arch.rb
new file mode 100644
index 000000000..72471b113
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/arch.rb
@@ -0,0 +1,323 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+# Bitfield manipulation.
+class BitField
+    def initialize
+        @value = 0
+    end
+
+    def self.attr_bitfield(name, offset, num_bits)
+        define_method("#{name}=") do |bits|
+            mask = 2**num_bits - 1
+
+            raise "Input out of range: #{name} = 0x#{bits.to_s(16)}" if (bits & ~mask).positive?
+
+            # Clear bitfield
+            @value &= ~(mask << offset)
+
+            # Set it
+            @value |= (bits << offset)
+        end
+    end
+
+    def to_i
+        @value
+    end
+
+    def size_in_byte
+        8
+    end
+end
+
+# An array class that knows its memory location.
+class CArray < Array
+    attr_reader :phys_start_addr
+
+    def initialize(phys_start_addr, size, &block)
+        @phys_start_addr = phys_start_addr
+
+        super(size, &block)
+    end
+
+    def size_in_byte
+        inject(0) { |sum, n| sum + n.size_in_byte }
+    end
+end
+
+#---------------------------------------------------------------------------------------------------
+# Arch::
+#---------------------------------------------------------------------------------------------------
+module Arch
+FALSE = 0b0
+TRUE = 0b1
+
+#---------------------------------------------------------------------------------------------------
+# Arch::ARMv8
+#---------------------------------------------------------------------------------------------------
+module ARMv8
+# ARMv8 Table Descriptor.
+class Stage1TableDescriptor < BitField
+    module NextLevelTableAddr
+        OFFSET = 16
+        NUMBITS = 32
+    end
+
+    module Type
+        OFFSET = 1
+        NUMBITS = 1
+
+        BLOCK = 0
+        TABLE = 1
+    end
+
+    module Valid
+        OFFSET = 0
+        NUMBITS = 1
+    end
+
+    attr_bitfield(:__next_level_table_addr, NextLevelTableAddr::OFFSET, NextLevelTableAddr::NUMBITS)
+    attr_bitfield(:type, Type::OFFSET, Type::NUMBITS)
+    attr_bitfield(:valid, Valid::OFFSET, Valid::NUMBITS)
+
+    def next_level_table_addr=(addr)
+        addr = addr >> Granule64KiB::SHIFT
+
+        self.__next_level_table_addr = addr
+    end
+
+    private :__next_level_table_addr=
+end
+
+# ARMv8 level 3 page descriptor.
+class Stage1PageDescriptor < BitField
+    module UXN
+        OFFSET = 54
+        NUMBITS = 1
+    end
+
+    module PXN
+        OFFSET = 53
+        NUMBITS = 1
+    end
+
+    module OutputAddr
+        OFFSET = 16
+        NUMBITS = 32
+    end
+
+    module AF
+        OFFSET = 10
+        NUMBITS = 1
+    end
+
+    module SH
+        OFFSET = 8
+        NUMBITS = 2
+
+        INNER_SHAREABLE = 0b11
+    end
+
+    module AP
+        OFFSET = 6
+        NUMBITS = 2
+
+        RW_EL1 = 0b00
+        RO_EL1 = 0b10
+    end
+
+    module AttrIndx
+        OFFSET = 2
+        NUMBITS = 3
+    end
+
+    module Type
+        OFFSET = 1
+        NUMBITS = 1
+
+        RESERVED_INVALID = 0
+        PAGE = 1
+    end
+
+    module Valid
+        OFFSET = 0
+        NUMBITS = 1
+    end
+
+    attr_bitfield(:uxn, UXN::OFFSET, UXN::NUMBITS)
+    attr_bitfield(:pxn, PXN::OFFSET, PXN::NUMBITS)
+    attr_bitfield(:__output_addr, OutputAddr::OFFSET, OutputAddr::NUMBITS)
+    attr_bitfield(:af, AF::OFFSET, AF::NUMBITS)
+    attr_bitfield(:sh, SH::OFFSET, SH::NUMBITS)
+    attr_bitfield(:ap, AP::OFFSET, AP::NUMBITS)
+    attr_bitfield(:attr_indx, AttrIndx::OFFSET, AttrIndx::NUMBITS)
+    attr_bitfield(:type, Type::OFFSET, Type::NUMBITS)
+    attr_bitfield(:valid, Valid::OFFSET, Valid::NUMBITS)
+
+    def output_addr=(addr)
+        addr = addr >> Granule64KiB::SHIFT
+
+        self.__output_addr = addr
+    end
+
+    private :__output_addr=
+end
+
+# Translation table representing the structure defined in translation_table.rs.
+class TranslationTable
+    MMIO_APERTURE_MiB = 256 * 1024 * 1024
+
+    module MAIR
+        NORMAL = 1
+    end
+
+    def initialize
+        @virt_mmio_start_addr = (BSP.kernel_virt_addr_space_size - MMIO_APERTURE_MiB) +
+                                BSP.kernel_virt_start_addr
+
+        do_sanity_checks
+
+        num_lvl2_tables = BSP.kernel_virt_addr_space_size >> Granule512MiB::SHIFT
+
+        @lvl3 = new_lvl3(num_lvl2_tables, BSP.phys_table_struct_start_addr)
+
+        @lvl2_phys_start_addr = @lvl3.phys_start_addr + @lvl3.size_in_byte
+        @lvl2 = new_lvl2(num_lvl2_tables, @lvl2_phys_start_addr)
+
+        populate_lvl2_entries
+    end
+
+    def map_pages_at(virt_pages, phys_pages, attributes)
+        return if virt_pages.empty?
+
+        raise if virt_pages.size != phys_pages.size
+        raise if phys_pages.last > BSP.phys_addr_space_end_page
+
+        virt_pages.zip(phys_pages).each do |virt_page, phys_page|
+            desc = page_descriptor_from(virt_page)
+            set_lvl3_entry(desc, phys_page, attributes)
+        end
+    end
+
+    def to_binary
+        data = @lvl3.flatten.map(&:to_i) + @lvl2.map(&:to_i)
+        data.pack('Q<*') # "Q" == uint64_t, "<" == little endian
+    end
+
+    def phys_tables_base_addr_binary
+        [@lvl2_phys_start_addr].pack('Q<*') # "Q" == uint64_t, "<" == little endian
+    end
+
+    def phys_tables_base_addr
+        @lvl2_phys_start_addr
+    end
+
+    private
+
+    def binary_with_mmio_clash?
+        BSP.rw_end_exclusive >= @virt_mmio_start_addr
+    end
+
+    def do_sanity_checks
+        raise unless BSP.kernel_granule::SIZE == Granule64KiB::SIZE
+        raise unless (BSP.kernel_virt_addr_space_size % Granule512MiB::SIZE).zero?
+
+        # Need to ensure that that the kernel binary does not clash with the upmost 256 MiB of the
+        # virtual address space, which is reserved for runtime-remapping of MMIO.
+        return unless binary_with_mmio_clash?
+
+        puts format('__data_end_exclusive: 0x%16x', BSP.data_end_exclusive)
+        puts format('MMIO start:           0x%16x', @virt_mmio_start_addr)
+
+        raise 'Kernel virtual addresses clash with 256 MiB MMIO window'
+    end
+
+    def new_lvl3(num_lvl2_tables, start_addr)
+        CArray.new(start_addr, num_lvl2_tables) do
+            temp = CArray.new(start_addr, 8192) do
+                Stage1PageDescriptor.new
+            end
+            start_addr += temp.size_in_byte
+
+            temp
+        end
+    end
+
+    def new_lvl2(num_lvl2_tables, start_addr)
+        CArray.new(start_addr, num_lvl2_tables) do
+            Stage1TableDescriptor.new
+        end
+    end
+
+    def populate_lvl2_entries
+        @lvl2.each_with_index do |descriptor, i|
+            descriptor.next_level_table_addr = @lvl3[i].phys_start_addr
+            descriptor.type = Stage1TableDescriptor::Type::TABLE
+            descriptor.valid = TRUE
+        end
+    end
+
+    def lvl2_lvl3_index_from(addr)
+        addr -= BSP.kernel_virt_start_addr
+
+        lvl2_index = addr >> Granule512MiB::SHIFT
+        lvl3_index = (addr & Granule512MiB::MASK) >> Granule64KiB::SHIFT
+
+        raise unless lvl2_index < @lvl2.size
+
+        [lvl2_index, lvl3_index]
+    end
+
+    def page_descriptor_from(virt_addr)
+        lvl2_index, lvl3_index = lvl2_lvl3_index_from(virt_addr)
+
+        @lvl3[lvl2_index][lvl3_index]
+    end
+
+    # rubocop:disable Metrics/MethodLength
+    def set_attributes(desc, attributes)
+        case attributes.mem_attributes
+        when :CacheableDRAM
+            desc.sh = Stage1PageDescriptor::SH::INNER_SHAREABLE
+            desc.attr_indx = MAIR::NORMAL
+        else
+            raise 'Invalid input'
+        end
+
+        desc.ap = case attributes.acc_perms
+                  when :ReadOnly
+                      Stage1PageDescriptor::AP::RO_EL1
+                  when :ReadWrite
+                      Stage1PageDescriptor::AP::RW_EL1
+                  else
+                      raise 'Invalid input'
+
+                  end
+
+        desc.pxn = case attributes.execute_never
+                   when :XN
+                       TRUE
+                   when :X
+                       FALSE
+                   else
+                       raise 'Invalid input'
+                   end
+
+        desc.uxn = TRUE
+    end
+    # rubocop:enable Metrics/MethodLength
+
+    def set_lvl3_entry(desc, output_addr, attributes)
+        desc.output_addr = output_addr
+        desc.af = TRUE
+        desc.type = Stage1PageDescriptor::Type::PAGE
+        desc.valid = TRUE
+
+        set_attributes(desc, attributes)
+    end
+end
+end
+end
diff --git a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/bsp.rb b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/bsp.rb
new file mode 100644
index 000000000..ddc0f3ba6
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/bsp.rb
@@ -0,0 +1,177 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+# Raspberry Pi 3 + 4
+class RaspberryPi
+    attr_reader :kernel_granule, :kernel_virt_addr_space_size, :kernel_virt_start_addr
+
+    NM_BINARY = 'aarch64-none-elf-nm'
+    READELF_BINARY = 'aarch64-none-elf-readelf'
+    MEMORY_SRC = File.read('src/bsp/raspberrypi/memory.rs').split("\n")
+
+    def initialize(kernel_elf)
+        @kernel_granule = Granule64KiB
+
+        @virt_addresses = {
+            boot_core_stack_start: /__boot_core_stack_start/,
+            boot_core_stack_end_exclusive: /__boot_core_stack_end_exclusive/,
+
+            rx_start: /__rx_start/,
+            rx_end_exclusive: /__rx_end_exclusive/,
+
+            rw_start: /__rw_start/,
+            rw_end_exclusive: /__rw_end_exclusive/,
+
+            table_struct_start_addr: /bsp::.*::memory::mmu::KERNEL_TABLES/,
+            phys_tables_base_addr: /PHYS_KERNEL_TABLES_BASE_ADDR/
+        }
+
+        symbols = `#{NM_BINARY} --demangle #{kernel_elf}`.split("\n")
+        @kernel_virt_addr_space_size = parse_from_symbols(symbols, /__kernel_virt_addr_space_size/)
+        @kernel_virt_start_addr = parse_from_symbols(symbols, /__kernel_virt_start_addr/)
+        @virt_addresses = parse_from_symbols(symbols, @virt_addresses)
+        @phys_addresses = virt_to_phys(@virt_addresses)
+
+        @descriptors = parse_descriptors
+        update_max_descriptor_name_length
+
+        @text_section_offset_in_elf = parse_text_section_offset_in_elf(kernel_elf)
+    end
+
+    def rw_end_exclusive
+        @virt_addresses[:rw_end_exclusive]
+    end
+
+    def phys_table_struct_start_addr
+        @phys_addresses[:table_struct_start_addr]
+    end
+
+    def table_struct_offset_in_kernel_elf
+        (@virt_addresses[:table_struct_start_addr] - @virt_addresses[:rx_start]) +
+            @text_section_offset_in_elf
+    end
+
+    def phys_tables_base_addr
+        @phys_addresses[:phys_tables_base_addr]
+    end
+
+    def phys_tables_base_addr_offset_in_kernel_elf
+        (@virt_addresses[:phys_tables_base_addr] - @virt_addresses[:rx_start]) +
+            @text_section_offset_in_elf
+    end
+
+    def phys_addr_space_end_page
+        x = MEMORY_SRC.grep(/pub const END/)
+        x = case BSP_TYPE
+            when :rpi3
+                x[0]
+            when :rpi4
+                x[1]
+            else
+                raise
+            end
+
+        x.scan(/\d+/).join.to_i(16)
+    end
+
+    def kernel_map_binary
+        MappingDescriptor.print_header
+
+        @descriptors.each do |i|
+            print 'Generating'.rjust(12).green.bold
+            print ' '
+            puts i.to_s
+
+            TRANSLATION_TABLES.map_pages_at(i.virt_pages, i.phys_pages, i.attributes)
+        end
+
+        MappingDescriptor.print_divider
+    end
+
+    private
+
+    def parse_from_symbols(symbols, input)
+        case input.class.to_s
+        when 'Regexp'
+            symbols.grep(input).first.split.first.to_i(16)
+        when 'Hash'
+            input.transform_values do |val|
+                symbols.grep(val).first.split.first.to_i(16)
+            end
+        else
+            raise
+        end
+    end
+
+    def parse_text_section_offset_in_elf(kernel_elf)
+        `#{READELF_BINARY} --sections #{kernel_elf}`.scan(/.text.*/).first.split.last.to_i(16)
+    end
+
+    def virt_to_phys(input)
+        case input.class.to_s
+        when 'Integer'
+            input - @kernel_virt_start_addr
+        when 'Hash'
+            input.transform_values do |val|
+                val - @kernel_virt_start_addr
+            end
+        else
+            raise
+        end
+    end
+
+    def descriptor_ro
+        name = 'Code and RO data'
+
+        ro_size = @virt_addresses[:rx_end_exclusive] -
+                  @virt_addresses[:rx_start]
+
+        virt_ro_pages = PageArray.new(@virt_addresses[:rx_start], ro_size, @kernel_granule::SIZE)
+        phys_ro_pages = PageArray.new(@phys_addresses[:rx_start], ro_size, @kernel_granule::SIZE)
+        ro_attribues = AttributeFields.new(:CacheableDRAM, :ReadOnly, :X)
+
+        MappingDescriptor.new(name, virt_ro_pages, phys_ro_pages, ro_attribues)
+    end
+
+    def descriptor_data
+        name = 'Data and bss'
+
+        data_size = @virt_addresses[:rw_end_exclusive] -
+                    @virt_addresses[:rw_start]
+
+        virt_data_pages = PageArray.new(@virt_addresses[:rw_start], data_size,
+                                        @kernel_granule::SIZE)
+        phys_data_pages = PageArray.new(@phys_addresses[:rw_start], data_size,
+                                        @kernel_granule::SIZE)
+        data_attribues = AttributeFields.new(:CacheableDRAM, :ReadWrite, :XN)
+
+        MappingDescriptor.new(name, virt_data_pages, phys_data_pages, data_attribues)
+    end
+
+    def descriptor_boot_core_stack
+        name = 'Boot-core stack'
+
+        boot_core_stack_size = @virt_addresses[:boot_core_stack_end_exclusive] -
+                               @virt_addresses[:boot_core_stack_start]
+
+        virt_boot_core_stack_pages = PageArray.new(@virt_addresses[:boot_core_stack_start],
+                                                   boot_core_stack_size, @kernel_granule::SIZE)
+        phys_boot_core_stack_pages = PageArray.new(@phys_addresses[:boot_core_stack_start],
+                                                   boot_core_stack_size, @kernel_granule::SIZE)
+        boot_core_stack_attribues = AttributeFields.new(:CacheableDRAM, :ReadWrite, :XN)
+
+        MappingDescriptor.new(name, virt_boot_core_stack_pages, phys_boot_core_stack_pages,
+                              boot_core_stack_attribues)
+    end
+
+    def parse_descriptors
+        [descriptor_ro, descriptor_data, descriptor_boot_core_stack]
+    end
+
+    def update_max_descriptor_name_length
+        MappingDescriptor.max_descriptor_name_length = @descriptors.map { |i| i.name.size }.max
+    end
+end
diff --git a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/generic.rb b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/generic.rb
new file mode 100644
index 000000000..2ab666afb
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/generic.rb
@@ -0,0 +1,125 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+module Granule64KiB
+    SIZE = 64 * 1024
+    SHIFT = Math.log2(SIZE).to_i
+end
+
+module Granule512MiB
+    SIZE = 512 * 1024 * 1024
+    SHIFT = Math.log2(SIZE).to_i
+    MASK = SIZE - 1
+end
+
+# Monkey-patch Integer with some helper functions.
+class Integer
+    def power_of_two?
+        self[0].zero?
+    end
+
+    def aligned?(alignment)
+        raise unless alignment.power_of_two?
+
+        (self & (alignment - 1)).zero?
+    end
+
+    def to_hex_underscore(with_leading_zeros: false)
+        fmt = with_leading_zeros ? '%016x' : '%x'
+        value = format(fmt, self).to_s.reverse.scan(/.{4}|.+/).join('_').reverse
+
+        format('0x%s', value)
+    end
+end
+
+# An array where each value is the start address of a Page.
+class PageArray < Array
+    def initialize(start_addr, size, granule_size)
+        raise unless start_addr.aligned?(granule_size)
+        raise unless size.positive?
+        raise unless (size % granule_size).zero?
+
+        num_pages = size / granule_size
+        super(num_pages) do |i|
+            i * granule_size + start_addr
+        end
+    end
+end
+
+# Collection of memory attributes.
+class AttributeFields
+    attr_reader :mem_attributes, :acc_perms, :execute_never
+
+    def initialize(mem_attributes, acc_perms, execute_never)
+        @mem_attributes = mem_attributes
+        @acc_perms = acc_perms
+        @execute_never = execute_never
+    end
+end
+
+# A container that describes a one- or many-page virt-to-phys mapping.
+class MappingDescriptor
+    @max_descriptor_name_length = 0
+
+    class << self
+        attr_accessor :max_descriptor_name_length
+    end
+
+    attr_reader :name, :virt_pages, :phys_pages, :attributes
+
+    def initialize(name, virt_pages, phys_pages, attributes)
+        @name = name
+        @virt_pages = virt_pages
+        @phys_pages = phys_pages
+        @attributes = attributes
+    end
+
+    def to_s
+        name = @name.ljust(self.class.max_descriptor_name_length)
+        virt_start = @virt_pages.first.to_hex_underscore(with_leading_zeros: true)
+        size = ((@virt_pages.size * 65_536) / 1024).to_s.rjust(3)
+
+        "#{name} | #{virt_start} | #{size} KiB"
+    end
+
+    def self.print_divider
+        print '             '
+        print '-' * max_descriptor_name_length
+        puts '----------------------------------'
+    end
+
+    def self.print_header
+        print_divider
+        print '             '
+        print 'Section'.center(max_descriptor_name_length)
+        print '   '
+        print 'Start Virt Addr'.center(21)
+        print '   '
+        print 'Size'.center(7)
+        puts
+        print_divider
+    end
+end
+
+def kernel_patch_tables(kernel_binary)
+    print 'Patching'.rjust(12).green.bold
+    print ' Kernel table struct at physical '
+    puts BSP.phys_table_struct_start_addr.to_hex_underscore
+
+    IO.binwrite(kernel_binary, TRANSLATION_TABLES.to_binary,
+                BSP.table_struct_offset_in_kernel_elf)
+end
+
+def kernel_patch_base_addr(kernel_binary)
+    print 'Patching'.rjust(12).green.bold
+    print ' Value of kernel table physical base address ('
+    print TRANSLATION_TABLES.phys_tables_base_addr.to_hex_underscore
+    print ') at physical '
+    puts BSP.phys_tables_base_addr.to_hex_underscore
+
+    IO.binwrite(kernel_binary, TRANSLATION_TABLES.phys_tables_base_addr_binary,
+                BSP.phys_tables_base_addr_offset_in_kernel_elf)
+end
diff --git a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/main.rb b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/main.rb
new file mode 100755
index 000000000..5200a4858
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/main.rb
@@ -0,0 +1,47 @@
+#!/usr/bin/env ruby
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+TARGET = ARGV[0].split('-').first.to_sym
+BSP_TYPE = ARGV[1].to_sym
+kernel_elf = ARGV[2]
+
+require 'rubygems'
+require 'bundler/setup'
+require 'colorize'
+
+require_relative 'generic'
+require_relative 'bsp'
+require_relative 'arch'
+
+puts
+puts 'Precomputing kernel translation tables and patching kernel ELF'.cyan
+
+start = Time.now
+
+BSP = case BSP_TYPE
+      when :rpi3, :rpi4
+          RaspberryPi.new(kernel_elf)
+      else
+          raise
+      end
+
+TRANSLATION_TABLES = case TARGET
+                     when :aarch64
+                         Arch::ARMv8::TranslationTable.new
+                     else
+                         raise
+                     end
+
+BSP.kernel_map_binary
+
+kernel_patch_tables(kernel_elf)
+kernel_patch_base_addr(kernel_elf)
+
+elapsed = Time.now - start
+
+print 'Finished'.rjust(12).green.bold
+puts " in #{elapsed.round(2)}s"

From d6e4a0318946a961ba71846d5fc3ba28383f5a5b Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Tue, 30 Mar 2021 23:14:09 +0200
Subject: [PATCH 054/214] Add missing cfg for test

---
 12_integrated_testing/README.md                               | 3 ++-
 12_integrated_testing/src/bsp/raspberrypi/console.rs          | 1 +
 .../src/bsp/raspberrypi/console.rs                            | 1 +
 .../src/bsp/raspberrypi/console.rs                            | 1 +
 15_virtual_mem_part3_precomputed_tables/README.md             | 4 ++--
 5 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/12_integrated_testing/README.md b/12_integrated_testing/README.md
index eefbfa4da..600efa2a8 100644
--- a/12_integrated_testing/README.md
+++ b/12_integrated_testing/README.md
@@ -1098,7 +1098,7 @@ diff -uNr 11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs 12_inte
 diff -uNr 11_exceptions_part1_groundwork/src/bsp/raspberrypi/console.rs 12_integrated_testing/src/bsp/raspberrypi/console.rs
 --- 11_exceptions_part1_groundwork/src/bsp/raspberrypi/console.rs
 +++ 12_integrated_testing/src/bsp/raspberrypi/console.rs
-@@ -35,3 +35,13 @@
+@@ -35,3 +35,14 @@
  pub fn console() -> &'static impl console::interface::All {
      &super::PL011_UART
  }
@@ -1111,6 +1111,7 @@ diff -uNr 11_exceptions_part1_groundwork/src/bsp/raspberrypi/console.rs 12_integ
 +/// than on real hardware due to QEMU's abstractions.
 +///
 +/// For the RPi, nothing needs to be done.
++#[cfg(feature = "test_build")]
 +pub fn qemu_bring_up_console() {}
 
 diff -uNr 11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs 12_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs
diff --git a/12_integrated_testing/src/bsp/raspberrypi/console.rs b/12_integrated_testing/src/bsp/raspberrypi/console.rs
index d6f95e4e9..75c0540bd 100644
--- a/12_integrated_testing/src/bsp/raspberrypi/console.rs
+++ b/12_integrated_testing/src/bsp/raspberrypi/console.rs
@@ -44,4 +44,5 @@ pub fn console() -> &'static impl console::interface::All {
 /// than on real hardware due to QEMU's abstractions.
 ///
 /// For the RPi, nothing needs to be done.
+#[cfg(feature = "test_build")]
 pub fn qemu_bring_up_console() {}
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/console.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/console.rs
index d6f95e4e9..75c0540bd 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/console.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/console.rs
@@ -44,4 +44,5 @@ pub fn console() -> &'static impl console::interface::All {
 /// than on real hardware due to QEMU's abstractions.
 ///
 /// For the RPi, nothing needs to be done.
+#[cfg(feature = "test_build")]
 pub fn qemu_bring_up_console() {}
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs
index abf8f89cc..0d0f8e40b 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs
@@ -58,4 +58,5 @@ pub fn console() -> &'static impl console::interface::All {
 /// than on real hardware due to QEMU's abstractions.
 ///
 /// For the RPi, nothing needs to be done.
+#[cfg(feature = "test_build")]
 pub fn qemu_bring_up_console() {}
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index f83ff5b4e..25d9cc360 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -1024,14 +1024,14 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs 15_virt
  /// Return a reference to the console.
  pub fn console() -> &'static impl console::interface::All {
      &super::PL011_UART
-@@ -56,6 +74,15 @@
+@@ -56,7 +74,15 @@
 
  /// Minimal code needed to bring up the console in QEMU (for testing only). This is often less steps
  /// than on real hardware due to QEMU's abstractions.
 -///
 -/// For the RPi, nothing needs to be done.
+ #[cfg(feature = "test_build")]
 -pub fn qemu_bring_up_console() {}
-+#[cfg(feature = "test_build")]
 +pub fn qemu_bring_up_console() {
 +    use driver::interface::DeviceDriver;
 +

From 37cb58a944085d7100f44795fddbb7d67917971f Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Wed, 31 Mar 2021 22:45:17 +0200
Subject: [PATCH 055/214] rubocop: Fix some errors

---
 .rubocop.yml                                  |  3 --
 .../README.md                                 | 32 +++++++++++++------
 .../translation_table_tool/arch.rb            | 30 +++++++++++------
 .../translation_table_tool/arch.rb            | 30 +++++++++++------
 utils/devtool.rb                              |  4 +--
 5 files changed, 66 insertions(+), 33 deletions(-)

diff --git a/.rubocop.yml b/.rubocop.yml
index d61571d60..a1687fd16 100644
--- a/.rubocop.yml
+++ b/.rubocop.yml
@@ -16,9 +16,6 @@ Layout/IndentationWidth:
 Layout/LineLength:
   Max: 100
 
-Lint/DeprecatedConstants:
-  Enabled: false
-
 Metrics/ClassLength:
   Enabled: false
 
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index 25d9cc360..5329426a0 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -1562,7 +1562,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
 diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/arch.rb 15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb
 --- 14_virtual_mem_part2_mmio_remap/translation_table_tool/arch.rb
 +++ 15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb
-@@ -0,0 +1,323 @@
+@@ -0,0 +1,335 @@
 +# frozen_string_literal: true
 +
 +# SPDX-License-Identifier: MIT OR Apache-2.0
@@ -1617,9 +1617,6 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/arch.rb 15_virt
 +# Arch::
 +#---------------------------------------------------------------------------------------------------
 +module Arch
-+FALSE = 0b0
-+TRUE = 0b1
-+
 +#---------------------------------------------------------------------------------------------------
 +# Arch::ARMv8
 +#---------------------------------------------------------------------------------------------------
@@ -1642,6 +1639,9 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/arch.rb 15_virt
 +    module Valid
 +        OFFSET = 0
 +        NUMBITS = 1
++
++        FALSE = 0
++        TRUE = 1
 +    end
 +
 +    attr_bitfield(:__next_level_table_addr, NextLevelTableAddr::OFFSET, NextLevelTableAddr::NUMBITS)
@@ -1662,11 +1662,17 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/arch.rb 15_virt
 +    module UXN
 +        OFFSET = 54
 +        NUMBITS = 1
++
++        FALSE = 0
++        TRUE = 1
 +    end
 +
 +    module PXN
 +        OFFSET = 53
 +        NUMBITS = 1
++
++        FALSE = 0
++        TRUE = 1
 +    end
 +
 +    module OutputAddr
@@ -1677,6 +1683,9 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/arch.rb 15_virt
 +    module AF
 +        OFFSET = 10
 +        NUMBITS = 1
++
++        FALSE = 0
++        TRUE = 1
 +    end
 +
 +    module SH
@@ -1710,6 +1719,9 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/arch.rb 15_virt
 +    module Valid
 +        OFFSET = 0
 +        NUMBITS = 1
++
++        FALSE = 0
++        TRUE = 1
 +    end
 +
 +    attr_bitfield(:uxn, UXN::OFFSET, UXN::NUMBITS)
@@ -1821,7 +1833,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/arch.rb 15_virt
 +        @lvl2.each_with_index do |descriptor, i|
 +            descriptor.next_level_table_addr = @lvl3[i].phys_start_addr
 +            descriptor.type = Stage1TableDescriptor::Type::TABLE
-+            descriptor.valid = TRUE
++            descriptor.valid = Stage1TableDescriptor::Valid::TRUE
 +        end
 +    end
 +
@@ -1864,22 +1876,22 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/arch.rb 15_virt
 +
 +        desc.pxn = case attributes.execute_never
 +                   when :XN
-+                       TRUE
++                       Stage1PageDescriptor::PXN::TRUE
 +                   when :X
-+                       FALSE
++                       Stage1PageDescriptor::PXN::FALSE
 +                   else
 +                       raise 'Invalid input'
 +                   end
 +
-+        desc.uxn = TRUE
++        desc.uxn = Stage1PageDescriptor::UXN::TRUE
 +    end
 +    # rubocop:enable Metrics/MethodLength
 +
 +    def set_lvl3_entry(desc, output_addr, attributes)
 +        desc.output_addr = output_addr
-+        desc.af = TRUE
++        desc.af = Stage1PageDescriptor::AF::TRUE
 +        desc.type = Stage1PageDescriptor::Type::PAGE
-+        desc.valid = TRUE
++        desc.valid = Stage1PageDescriptor::Valid::TRUE
 +
 +        set_attributes(desc, attributes)
 +    end
diff --git a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb
index 72471b113..a6e5cf68c 100644
--- a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb
+++ b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb
@@ -52,9 +52,6 @@ def size_in_byte
 # Arch::
 #---------------------------------------------------------------------------------------------------
 module Arch
-FALSE = 0b0
-TRUE = 0b1
-
 #---------------------------------------------------------------------------------------------------
 # Arch::ARMv8
 #---------------------------------------------------------------------------------------------------
@@ -77,6 +74,9 @@ module Type
     module Valid
         OFFSET = 0
         NUMBITS = 1
+
+        FALSE = 0
+        TRUE = 1
     end
 
     attr_bitfield(:__next_level_table_addr, NextLevelTableAddr::OFFSET, NextLevelTableAddr::NUMBITS)
@@ -97,11 +97,17 @@ class Stage1PageDescriptor < BitField
     module UXN
         OFFSET = 54
         NUMBITS = 1
+
+        FALSE = 0
+        TRUE = 1
     end
 
     module PXN
         OFFSET = 53
         NUMBITS = 1
+
+        FALSE = 0
+        TRUE = 1
     end
 
     module OutputAddr
@@ -112,6 +118,9 @@ module OutputAddr
     module AF
         OFFSET = 10
         NUMBITS = 1
+
+        FALSE = 0
+        TRUE = 1
     end
 
     module SH
@@ -145,6 +154,9 @@ module Type
     module Valid
         OFFSET = 0
         NUMBITS = 1
+
+        FALSE = 0
+        TRUE = 1
     end
 
     attr_bitfield(:uxn, UXN::OFFSET, UXN::NUMBITS)
@@ -256,7 +268,7 @@ def populate_lvl2_entries
         @lvl2.each_with_index do |descriptor, i|
             descriptor.next_level_table_addr = @lvl3[i].phys_start_addr
             descriptor.type = Stage1TableDescriptor::Type::TABLE
-            descriptor.valid = TRUE
+            descriptor.valid = Stage1TableDescriptor::Valid::TRUE
         end
     end
 
@@ -299,22 +311,22 @@ def set_attributes(desc, attributes)
 
         desc.pxn = case attributes.execute_never
                    when :XN
-                       TRUE
+                       Stage1PageDescriptor::PXN::TRUE
                    when :X
-                       FALSE
+                       Stage1PageDescriptor::PXN::FALSE
                    else
                        raise 'Invalid input'
                    end
 
-        desc.uxn = TRUE
+        desc.uxn = Stage1PageDescriptor::UXN::TRUE
     end
     # rubocop:enable Metrics/MethodLength
 
     def set_lvl3_entry(desc, output_addr, attributes)
         desc.output_addr = output_addr
-        desc.af = TRUE
+        desc.af = Stage1PageDescriptor::AF::TRUE
         desc.type = Stage1PageDescriptor::Type::PAGE
-        desc.valid = TRUE
+        desc.valid = Stage1PageDescriptor::Valid::TRUE
 
         set_attributes(desc, attributes)
     end
diff --git a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/arch.rb b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/arch.rb
index 72471b113..a6e5cf68c 100644
--- a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/arch.rb
+++ b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/arch.rb
@@ -52,9 +52,6 @@ def size_in_byte
 # Arch::
 #---------------------------------------------------------------------------------------------------
 module Arch
-FALSE = 0b0
-TRUE = 0b1
-
 #---------------------------------------------------------------------------------------------------
 # Arch::ARMv8
 #---------------------------------------------------------------------------------------------------
@@ -77,6 +74,9 @@ module Type
     module Valid
         OFFSET = 0
         NUMBITS = 1
+
+        FALSE = 0
+        TRUE = 1
     end
 
     attr_bitfield(:__next_level_table_addr, NextLevelTableAddr::OFFSET, NextLevelTableAddr::NUMBITS)
@@ -97,11 +97,17 @@ class Stage1PageDescriptor < BitField
     module UXN
         OFFSET = 54
         NUMBITS = 1
+
+        FALSE = 0
+        TRUE = 1
     end
 
     module PXN
         OFFSET = 53
         NUMBITS = 1
+
+        FALSE = 0
+        TRUE = 1
     end
 
     module OutputAddr
@@ -112,6 +118,9 @@ module OutputAddr
     module AF
         OFFSET = 10
         NUMBITS = 1
+
+        FALSE = 0
+        TRUE = 1
     end
 
     module SH
@@ -145,6 +154,9 @@ module Type
     module Valid
         OFFSET = 0
         NUMBITS = 1
+
+        FALSE = 0
+        TRUE = 1
     end
 
     attr_bitfield(:uxn, UXN::OFFSET, UXN::NUMBITS)
@@ -256,7 +268,7 @@ def populate_lvl2_entries
         @lvl2.each_with_index do |descriptor, i|
             descriptor.next_level_table_addr = @lvl3[i].phys_start_addr
             descriptor.type = Stage1TableDescriptor::Type::TABLE
-            descriptor.valid = TRUE
+            descriptor.valid = Stage1TableDescriptor::Valid::TRUE
         end
     end
 
@@ -299,22 +311,22 @@ def set_attributes(desc, attributes)
 
         desc.pxn = case attributes.execute_never
                    when :XN
-                       TRUE
+                       Stage1PageDescriptor::PXN::TRUE
                    when :X
-                       FALSE
+                       Stage1PageDescriptor::PXN::FALSE
                    else
                        raise 'Invalid input'
                    end
 
-        desc.uxn = TRUE
+        desc.uxn = Stage1PageDescriptor::UXN::TRUE
     end
     # rubocop:enable Metrics/MethodLength
 
     def set_lvl3_entry(desc, output_addr, attributes)
         desc.output_addr = output_addr
-        desc.af = TRUE
+        desc.af = Stage1PageDescriptor::AF::TRUE
         desc.type = Stage1PageDescriptor::Type::PAGE
-        desc.valid = TRUE
+        desc.valid = Stage1PageDescriptor::Valid::TRUE
 
         set_attributes(desc, attributes)
     end
diff --git a/utils/devtool.rb b/utils/devtool.rb
index c29987bba..a3d5e3d7b 100755
--- a/utils/devtool.rb
+++ b/utils/devtool.rb
@@ -166,6 +166,8 @@ def misspell
 
     def rubocop
         puts 'Rubocop'.light_blue
+        system('which bundle')
+        system('bundle --version')
         exit(1) unless system('bundle exec rubocop')
     end
 
@@ -180,8 +182,6 @@ def ready_for_publish
         diff
 
         clean
-        make('rpi4')
-        make('rpi3')
         make_xtra
         test_unit
         test_integration

From b025f5577cb210d08002f5038010bc35a567698c Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Wed, 31 Mar 2021 22:48:02 +0200
Subject: [PATCH 056/214] Use raw string literal for logo

---
 06_uart_chainloader/README.md   | 19 +++++++++++++------
 06_uart_chainloader/src/main.rs | 13 ++++++++-----
 07_timestamps/README.md         | 23 ++++++++++++++---------
 3 files changed, 35 insertions(+), 20 deletions(-)

diff --git a/06_uart_chainloader/README.md b/06_uart_chainloader/README.md
index 040c498d3..131dc19bb 100644
--- a/06_uart_chainloader/README.md
+++ b/06_uart_chainloader/README.md
@@ -373,18 +373,25 @@ diff -uNr 05_drivers_gpio_uart/src/main.rs 06_uart_chainloader/src/main.rs
  #![feature(const_fn_fn_ptr_basics)]
  #![feature(format_args_nl)]
  #![feature(global_asm)]
-@@ -150,29 +151,49 @@
+@@ -146,33 +147,56 @@
+     kernel_main()
+ }
+
++const MINILOAD_LOGO: &str = r#"
++ __  __ _      _ _                 _
++|  \/  (_)_ _ (_) |   ___  __ _ __| |
++| |\/| | | ' \| | |__/ _ \/ _` / _` |
++|_|  |_|_|_||_|_|____\___/\__,_\__,_|
++"#;
++
+ /// The main function running after the early init.
  fn kernel_main() -> ! {
      use bsp::console::console;
      use console::interface::All;
 -    use driver::interface::DriverManager;
 
 -    println!("[0] Booting on: {}", bsp::board_name());
-+    println!(" __  __ _      _ _                 _ ");
-+    println!("|  \\/  (_)_ _ (_) |   ___  __ _ __| |");
-+    println!("| |\\/| | | ' \\| | |__/ _ \\/ _` / _` |");
-+    println!("|_|  |_|_|_||_|_|____\\___/\\__,_\\__,_|");
-+    println!();
++    println!("{}", MINILOAD_LOGO);
 +    println!("{:^37}", bsp::board_name());
 +    println!();
 +    println!("[ML] Requesting binary");
diff --git a/06_uart_chainloader/src/main.rs b/06_uart_chainloader/src/main.rs
index 1ac8140cc..a94b97e42 100644
--- a/06_uart_chainloader/src/main.rs
+++ b/06_uart_chainloader/src/main.rs
@@ -147,16 +147,19 @@ unsafe fn kernel_init() -> ! {
     kernel_main()
 }
 
+const MINILOAD_LOGO: &str = r#"
+ __  __ _      _ _                 _
+|  \/  (_)_ _ (_) |   ___  __ _ __| |
+| |\/| | | ' \| | |__/ _ \/ _` / _` |
+|_|  |_|_|_||_|_|____\___/\__,_\__,_|
+"#;
+
 /// The main function running after the early init.
 fn kernel_main() -> ! {
     use bsp::console::console;
     use console::interface::All;
 
-    println!(" __  __ _      _ _                 _ ");
-    println!("|  \\/  (_)_ _ (_) |   ___  __ _ __| |");
-    println!("| |\\/| | | ' \\| | |__/ _ \\/ _` / _` |");
-    println!("|_|  |_|_|_||_|_|____\\___/\\__,_\\__,_|");
-    println!();
+    println!("{}", MINILOAD_LOGO);
     println!("{:^37}", bsp::board_name());
     println!();
     println!("[ML] Requesting binary");
diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index dc40f8048..e221a12c3 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -475,8 +475,17 @@ diff -uNr 06_uart_chainloader/src/main.rs 07_timestamps/src/main.rs
 
  /// Early init code.
  ///
-@@ -149,51 +149,31 @@
+@@ -147,56 +147,33 @@
+     kernel_main()
+ }
 
+-const MINILOAD_LOGO: &str = r#"
+- __  __ _      _ _                 _
+-|  \/  (_)_ _ (_) |   ___  __ _ __| |
+-| |\/| | | ' \| | |__/ _ \/ _` / _` |
+-|_|  |_|_|_||_|_|____\___/\__,_\__,_|
+-"#;
+-
  /// The main function running after the early init.
  fn kernel_main() -> ! {
 -    use bsp::console::console;
@@ -485,11 +494,7 @@ diff -uNr 06_uart_chainloader/src/main.rs 07_timestamps/src/main.rs
 +    use driver::interface::DriverManager;
 +    use time::interface::TimeManager;
 
--    println!(" __  __ _      _ _                 _ ");
--    println!("|  \\/  (_)_ _ (_) |   ___  __ _ __| |");
--    println!("| |\\/| | | ' \\| | |__/ _ \\/ _` / _` |");
--    println!("|_|  |_|_|_||_|_|____\\___/\\__,_\\__,_|");
--    println!();
+-    println!("{}", MINILOAD_LOGO);
 -    println!("{:^37}", bsp::board_name());
 -    println!();
 -    println!("[ML] Requesting binary");
@@ -536,12 +541,12 @@ diff -uNr 06_uart_chainloader/src/main.rs 07_timestamps/src/main.rs
 
 -    println!("[ML] Loaded! Executing the payload now\n");
 -    console().flush();
+-
+-    // Use black magic to create a function pointer.
+-    let kernel: fn() -> ! = unsafe { core::mem::transmute(kernel_addr) };
 +    // Test a failing timer case.
 +    time::time_manager().spin_for(Duration::from_nanos(1));
 
--    // Use black magic to create a function pointer.
--    let kernel: fn() -> ! = unsafe { core::mem::transmute(kernel_addr) };
--
 -    // Jump to loaded kernel!
 -    kernel()
 +    loop {

From 9f1920c2c6221c324b048c0cb4b899fbf3d33cf1 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sun, 4 Apr 2021 22:30:40 +0200
Subject: [PATCH 057/214] Give the project a name
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

🦩
---
 01_wait_forever/Cargo.lock                    |   5 +-
 01_wait_forever/Cargo.toml                    |   6 +-
 02_runtime_init/Cargo.lock                    |   4 +-
 02_runtime_init/Cargo.toml                    |   9 +-
 02_runtime_init/README.md                     |  11 ++-
 03_hacky_hello_world/Cargo.lock               |   4 +-
 03_hacky_hello_world/Cargo.toml               |   8 +-
 03_hacky_hello_world/README.md                |  13 ++-
 04_safe_globals/Cargo.lock                    |   4 +-
 04_safe_globals/Cargo.toml                    |   8 +-
 04_safe_globals/README.md                     |  22 ++++-
 04_safe_globals/src/main.rs                   |   2 +-
 05_drivers_gpio_uart/Cargo.lock               |   4 +-
 05_drivers_gpio_uart/Cargo.toml               |   8 +-
 05_drivers_gpio_uart/README.md                |  40 +++++---
 05_drivers_gpio_uart/src/main.rs              |  13 ++-
 06_uart_chainloader/Cargo.lock                |   4 +-
 06_uart_chainloader/Cargo.toml                |   8 +-
 06_uart_chainloader/README.md                 |  67 ++++++++-----
 06_uart_chainloader/demo_payload_rpi3.img     | Bin 6840 -> 7024 bytes
 06_uart_chainloader/demo_payload_rpi4.img     | Bin 6680 -> 6872 bytes
 07_timestamps/Cargo.lock                      |   4 +-
 07_timestamps/Cargo.toml                      |   8 +-
 07_timestamps/README.md                       |  75 ++++++++------
 07_timestamps/src/main.rs                     |   5 +
 08_hw_debug_JTAG/Cargo.lock                   |   4 +-
 08_hw_debug_JTAG/Cargo.toml                   |   8 +-
 08_hw_debug_JTAG/README.md                    |  12 +++
 08_hw_debug_JTAG/src/main.rs                  |   5 +
 09_privilege_level/Cargo.lock                 |   4 +-
 09_privilege_level/Cargo.toml                 |   8 +-
 09_privilege_level/README.md                  |  48 +++++----
 09_privilege_level/src/main.rs                |   5 +
 .../Cargo.lock                                |   4 +-
 .../Cargo.toml                                |   8 +-
 .../README.md                                 |  55 +++++++----
 .../src/main.rs                               |   5 +
 11_exceptions_part1_groundwork/Cargo.lock     |   4 +-
 11_exceptions_part1_groundwork/Cargo.toml     |   8 +-
 11_exceptions_part1_groundwork/README.md      |  93 ++++++++++--------
 11_exceptions_part1_groundwork/src/main.rs    |   5 +
 12_integrated_testing/Cargo.lock              |   4 +-
 12_integrated_testing/Cargo.toml              |   5 +-
 12_integrated_testing/README.md               |  54 +++++++---
 12_integrated_testing/src/lib.rs              |  13 +++
 12_integrated_testing/src/main.rs             |   1 +
 .../Cargo.lock                                |   4 +-
 .../Cargo.toml                                |   5 +-
 13_exceptions_part2_peripheral_IRQs/README.md |  92 +++++++++--------
 .../src/lib.rs                                |  13 +++
 .../src/main.rs                               |   1 +
 14_virtual_mem_part2_mmio_remap/Cargo.lock    |   4 +-
 14_virtual_mem_part2_mmio_remap/Cargo.toml    |   5 +-
 14_virtual_mem_part2_mmio_remap/README.md     |  68 ++++++++-----
 14_virtual_mem_part2_mmio_remap/src/lib.rs    |  13 +++
 14_virtual_mem_part2_mmio_remap/src/main.rs   |   1 +
 .../Cargo.lock                                |   4 +-
 .../Cargo.toml                                |   5 +-
 .../README.md                                 |  37 ++++---
 .../src/lib.rs                                |  13 +++
 .../src/main.rs                               |   1 +
 .../Cargo.lock                                |   4 +-
 .../Cargo.toml                                |   5 +-
 .../README.md                                 |  64 +++++++-----
 .../src/lib.rs                                |  13 +++
 .../src/main.rs                               |   1 +
 X1_JTAG_boot/Cargo.lock                       |   4 +-
 X1_JTAG_boot/Cargo.toml                       |   8 +-
 X1_JTAG_boot/jtag_boot_rpi3.img               | Bin 8176 -> 8160 bytes
 69 files changed, 704 insertions(+), 346 deletions(-)

diff --git a/01_wait_forever/Cargo.lock b/01_wait_forever/Cargo.lock
index 3e9c31110..aaed18257 100644
--- a/01_wait_forever/Cargo.lock
+++ b/01_wait_forever/Cargo.lock
@@ -1,6 +1,7 @@
 # This file is automatically @generated by Cargo.
 # It is not intended for manual editing.
+version = 3
+
 [[package]]
-name = "kernel"
+name = "mingo"
 version = "0.1.0"
-
diff --git a/01_wait_forever/Cargo.toml b/01_wait_forever/Cargo.toml
index a75809963..2b46585e9 100644
--- a/01_wait_forever/Cargo.toml
+++ b/01_wait_forever/Cargo.toml
@@ -1,5 +1,5 @@
 [package]
-name = "kernel"
+name = "mingo"
 version = "0.1.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
 edition = "2018"
@@ -12,6 +12,10 @@ default = []
 bsp_rpi3 = []
 bsp_rpi4 = []
 
+[[bin]]
+name = "kernel"
+path = "src/main.rs"
+
 ##--------------------------------------------------------------------------------------------------
 ## Dependencies
 ##--------------------------------------------------------------------------------------------------
diff --git a/02_runtime_init/Cargo.lock b/02_runtime_init/Cargo.lock
index 3b926a347..090fdaee4 100644
--- a/02_runtime_init/Cargo.lock
+++ b/02_runtime_init/Cargo.lock
@@ -12,8 +12,8 @@ dependencies = [
 ]
 
 [[package]]
-name = "kernel"
-version = "0.1.0"
+name = "mingo"
+version = "0.2.0"
 dependencies = [
  "cortex-a",
 ]
diff --git a/02_runtime_init/Cargo.toml b/02_runtime_init/Cargo.toml
index 4a03b9623..be6091a4d 100644
--- a/02_runtime_init/Cargo.toml
+++ b/02_runtime_init/Cargo.toml
@@ -1,6 +1,6 @@
 [package]
-name = "kernel"
-version = "0.1.0"
+name = "mingo"
+version = "0.2.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
 edition = "2018"
 
@@ -12,6 +12,10 @@ default = []
 bsp_rpi3 = []
 bsp_rpi4 = []
 
+[[bin]]
+name = "kernel"
+path = "src/main.rs"
+
 ##--------------------------------------------------------------------------------------------------
 ## Dependencies
 ##--------------------------------------------------------------------------------------------------
@@ -21,3 +25,4 @@ bsp_rpi4 = []
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
 cortex-a = { version = "5.x.x" }
+
diff --git a/02_runtime_init/README.md b/02_runtime_init/README.md
index b294e2e1f..dfa43562a 100644
--- a/02_runtime_init/README.md
+++ b/02_runtime_init/README.md
@@ -31,7 +31,15 @@
 diff -uNr 01_wait_forever/Cargo.toml 02_runtime_init/Cargo.toml
 --- 01_wait_forever/Cargo.toml
 +++ 02_runtime_init/Cargo.toml
-@@ -17,3 +17,7 @@
+@@ -1,6 +1,6 @@
+ [package]
+ name = "mingo"
+-version = "0.1.0"
++version = "0.2.0"
+ authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+ edition = "2018"
+
+@@ -21,3 +21,8 @@
  ##--------------------------------------------------------------------------------------------------
 
  [dependencies]
@@ -39,6 +47,7 @@ diff -uNr 01_wait_forever/Cargo.toml 02_runtime_init/Cargo.toml
 +# Platform specific dependencies
 +[target.'cfg(target_arch = "aarch64")'.dependencies]
 +cortex-a = { version = "5.x.x" }
++
 
 diff -uNr 01_wait_forever/Makefile 02_runtime_init/Makefile
 --- 01_wait_forever/Makefile
diff --git a/03_hacky_hello_world/Cargo.lock b/03_hacky_hello_world/Cargo.lock
index 3b926a347..09dfcc720 100644
--- a/03_hacky_hello_world/Cargo.lock
+++ b/03_hacky_hello_world/Cargo.lock
@@ -12,8 +12,8 @@ dependencies = [
 ]
 
 [[package]]
-name = "kernel"
-version = "0.1.0"
+name = "mingo"
+version = "0.3.0"
 dependencies = [
  "cortex-a",
 ]
diff --git a/03_hacky_hello_world/Cargo.toml b/03_hacky_hello_world/Cargo.toml
index 5deb70108..6ed23060e 100644
--- a/03_hacky_hello_world/Cargo.toml
+++ b/03_hacky_hello_world/Cargo.toml
@@ -1,6 +1,6 @@
 [package]
-name = "kernel"
-version = "0.1.0"
+name = "mingo"
+version = "0.3.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
 edition = "2018"
 
@@ -12,6 +12,10 @@ default = []
 bsp_rpi3 = []
 bsp_rpi4 = []
 
+[[bin]]
+name = "kernel"
+path = "src/main.rs"
+
 ##--------------------------------------------------------------------------------------------------
 ## Dependencies
 ##--------------------------------------------------------------------------------------------------
diff --git a/03_hacky_hello_world/README.md b/03_hacky_hello_world/README.md
index a002a6198..6958b8bc5 100644
--- a/03_hacky_hello_world/README.md
+++ b/03_hacky_hello_world/README.md
@@ -31,11 +31,14 @@ Kernel panic: Stopping here.
 diff -uNr 02_runtime_init/Cargo.toml 03_hacky_hello_world/Cargo.toml
 --- 02_runtime_init/Cargo.toml
 +++ 03_hacky_hello_world/Cargo.toml
-@@ -21,3 +21,4 @@
- # Platform specific dependencies
- [target.'cfg(target_arch = "aarch64")'.dependencies]
- cortex-a = { version = "5.x.x" }
-+
+@@ -1,6 +1,6 @@
+ [package]
+ name = "mingo"
+-version = "0.2.0"
++version = "0.3.0"
+ authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+ edition = "2018"
+
 
 diff -uNr 02_runtime_init/Makefile 03_hacky_hello_world/Makefile
 --- 02_runtime_init/Makefile
diff --git a/04_safe_globals/Cargo.lock b/04_safe_globals/Cargo.lock
index 3b926a347..ccfbefbf3 100644
--- a/04_safe_globals/Cargo.lock
+++ b/04_safe_globals/Cargo.lock
@@ -12,8 +12,8 @@ dependencies = [
 ]
 
 [[package]]
-name = "kernel"
-version = "0.1.0"
+name = "mingo"
+version = "0.4.0"
 dependencies = [
  "cortex-a",
 ]
diff --git a/04_safe_globals/Cargo.toml b/04_safe_globals/Cargo.toml
index 5deb70108..16e4741df 100644
--- a/04_safe_globals/Cargo.toml
+++ b/04_safe_globals/Cargo.toml
@@ -1,6 +1,6 @@
 [package]
-name = "kernel"
-version = "0.1.0"
+name = "mingo"
+version = "0.4.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
 edition = "2018"
 
@@ -12,6 +12,10 @@ default = []
 bsp_rpi3 = []
 bsp_rpi4 = []
 
+[[bin]]
+name = "kernel"
+path = "src/main.rs"
+
 ##--------------------------------------------------------------------------------------------------
 ## Dependencies
 ##--------------------------------------------------------------------------------------------------
diff --git a/04_safe_globals/README.md b/04_safe_globals/README.md
index 13b9e298a..272edfce6 100644
--- a/04_safe_globals/README.md
+++ b/04_safe_globals/README.md
@@ -46,14 +46,27 @@ implemntations in the [spin crate] or the [parking lot crate].
 ```console
 $ make qemu
 [...]
-[0] Hello from pure Rust!
-[1] Chars written: 27
+
+[0] Hello from Rust!
+[1] Chars written: 22
 [2] Stopping here.
 ```
 
 ## Diff to previous
 ```diff
 
+diff -uNr 03_hacky_hello_world/Cargo.toml 04_safe_globals/Cargo.toml
+--- 03_hacky_hello_world/Cargo.toml
++++ 04_safe_globals/Cargo.toml
+@@ -1,6 +1,6 @@
+ [package]
+ name = "mingo"
+-version = "0.3.0"
++version = "0.4.0"
+ authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+ edition = "2018"
+
+
 diff -uNr 03_hacky_hello_world/src/bsp/raspberrypi/console.rs 04_safe_globals/src/bsp/raspberrypi/console.rs
 --- 03_hacky_hello_world/src/bsp/raspberrypi/console.rs
 +++ 04_safe_globals/src/bsp/raspberrypi/console.rs
@@ -231,12 +244,11 @@ diff -uNr 03_hacky_hello_world/src/main.rs 04_safe_globals/src/main.rs
  ///
  /// - Only a single core must be active and running this function.
  unsafe fn kernel_init() -> ! {
--    println!("[0] Hello from Rust!");
 +    use console::interface::Statistics;
++
+     println!("[0] Hello from Rust!");
 
 -    panic!("Stopping here.")
-+    println!("[0] Hello from pure Rust!");
-+
 +    println!(
 +        "[1] Chars written: {}",
 +        bsp::console::console().chars_written()
diff --git a/04_safe_globals/src/main.rs b/04_safe_globals/src/main.rs
index 579f90ddc..48687ace2 100644
--- a/04_safe_globals/src/main.rs
+++ b/04_safe_globals/src/main.rs
@@ -130,7 +130,7 @@ mod synchronization;
 unsafe fn kernel_init() -> ! {
     use console::interface::Statistics;
 
-    println!("[0] Hello from pure Rust!");
+    println!("[0] Hello from Rust!");
 
     println!(
         "[1] Chars written: {}",
diff --git a/05_drivers_gpio_uart/Cargo.lock b/05_drivers_gpio_uart/Cargo.lock
index a3d8bb9ae..87044397a 100644
--- a/05_drivers_gpio_uart/Cargo.lock
+++ b/05_drivers_gpio_uart/Cargo.lock
@@ -12,8 +12,8 @@ dependencies = [
 ]
 
 [[package]]
-name = "kernel"
-version = "0.1.0"
+name = "mingo"
+version = "0.5.0"
 dependencies = [
  "cortex-a",
  "register",
diff --git a/05_drivers_gpio_uart/Cargo.toml b/05_drivers_gpio_uart/Cargo.toml
index df5f7f974..03ec9cdb9 100644
--- a/05_drivers_gpio_uart/Cargo.toml
+++ b/05_drivers_gpio_uart/Cargo.toml
@@ -1,6 +1,6 @@
 [package]
-name = "kernel"
-version = "0.1.0"
+name = "mingo"
+version = "0.5.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
 edition = "2018"
 
@@ -12,6 +12,10 @@ default = []
 bsp_rpi3 = ["register"]
 bsp_rpi4 = ["register"]
 
+[[bin]]
+name = "kernel"
+path = "src/main.rs"
+
 ##--------------------------------------------------------------------------------------------------
 ## Dependencies
 ##--------------------------------------------------------------------------------------------------
diff --git a/05_drivers_gpio_uart/README.md b/05_drivers_gpio_uart/README.md
index 4ecdd41ad..9f4a8749b 100644
--- a/05_drivers_gpio_uart/README.md
+++ b/05_drivers_gpio_uart/README.md
@@ -95,12 +95,13 @@ Miniterm 1.0
 
 [MT] ⏳ Waiting for /dev/ttyUSB0
 [MT] ✅ Serial connected
-[0] Booting on: Raspberry Pi 3
-[1] Drivers loaded:
+[0] mingo version 0.5.0
+[1] Booting on: Raspberry Pi 3
+[2] Drivers loaded:
       1. BCM GPIO
       2. BCM PL011 UART
-[2] Chars written: 93
-[3] Echoing input now
+[3] Chars written: 117
+[4] Echoing input now
 ```
 
 8. Exit by pressing <kbd>ctrl-c</kbd>.
@@ -111,6 +112,14 @@ Miniterm 1.0
 diff -uNr 04_safe_globals/Cargo.toml 05_drivers_gpio_uart/Cargo.toml
 --- 04_safe_globals/Cargo.toml
 +++ 05_drivers_gpio_uart/Cargo.toml
+@@ -1,6 +1,6 @@
+ [package]
+ name = "mingo"
+-version = "0.4.0"
++version = "0.5.0"
+ authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+ edition = "2018"
+
 @@ -9,8 +9,8 @@
 
  [features]
@@ -120,9 +129,9 @@ diff -uNr 04_safe_globals/Cargo.toml 05_drivers_gpio_uart/Cargo.toml
 +bsp_rpi3 = ["register"]
 +bsp_rpi4 = ["register"]
 
- ##--------------------------------------------------------------------------------------------------
- ## Dependencies
-@@ -18,6 +18,9 @@
+ [[bin]]
+ name = "kernel"
+@@ -22,6 +22,9 @@
 
  [dependencies]
 
@@ -1329,7 +1338,7 @@ diff -uNr 04_safe_globals/src/main.rs 05_drivers_gpio_uart/src/main.rs
  mod memory;
  mod panic_wait;
  mod print;
-@@ -127,16 +130,49 @@
+@@ -127,16 +130,54 @@
  /// # Safety
  ///
  /// - Only a single core must be active and running this function.
@@ -1338,7 +1347,7 @@ diff -uNr 04_safe_globals/src/main.rs 05_drivers_gpio_uart/src/main.rs
 -    use console::interface::Statistics;
 +    use driver::interface::DriverManager;
 
--    println!("[0] Hello from pure Rust!");
+-    println!("[0] Hello from Rust!");
 +    for i in bsp::driver::driver_manager().all_device_drivers().iter() {
 +        if let Err(x) = i.init() {
 +            panic!("Error loading driver: {}: {}", i.compatible(), x);
@@ -1357,9 +1366,14 @@ diff -uNr 04_safe_globals/src/main.rs 05_drivers_gpio_uart/src/main.rs
 +    use console::interface::All;
 +    use driver::interface::DriverManager;
 +
-+    println!("[0] Booting on: {}", bsp::board_name());
++    println!(
++        "[0] {} version {}",
++        env!("CARGO_PKG_NAME"),
++        env!("CARGO_PKG_VERSION")
++    );
++    println!("[1] Booting on: {}", bsp::board_name());
 +
-+    println!("[1] Drivers loaded:");
++    println!("[2] Drivers loaded:");
 +    for (i, driver) in bsp::driver::driver_manager()
 +        .all_device_drivers()
 +        .iter()
@@ -1370,10 +1384,10 @@ diff -uNr 04_safe_globals/src/main.rs 05_drivers_gpio_uart/src/main.rs
 
      println!(
 -        "[1] Chars written: {}",
-+        "[2] Chars written: {}",
++        "[3] Chars written: {}",
          bsp::console::console().chars_written()
      );
-+    println!("[3] Echoing input now");
++    println!("[4] Echoing input now");
 
 -    println!("[2] Stopping here.");
 -    cpu::wait_forever()
diff --git a/05_drivers_gpio_uart/src/main.rs b/05_drivers_gpio_uart/src/main.rs
index 0f3c493df..93d6ffef5 100644
--- a/05_drivers_gpio_uart/src/main.rs
+++ b/05_drivers_gpio_uart/src/main.rs
@@ -152,9 +152,14 @@ fn kernel_main() -> ! {
     use console::interface::All;
     use driver::interface::DriverManager;
 
-    println!("[0] Booting on: {}", bsp::board_name());
+    println!(
+        "[0] {} version {}",
+        env!("CARGO_PKG_NAME"),
+        env!("CARGO_PKG_VERSION")
+    );
+    println!("[1] Booting on: {}", bsp::board_name());
 
-    println!("[1] Drivers loaded:");
+    println!("[2] Drivers loaded:");
     for (i, driver) in bsp::driver::driver_manager()
         .all_device_drivers()
         .iter()
@@ -164,10 +169,10 @@ fn kernel_main() -> ! {
     }
 
     println!(
-        "[2] Chars written: {}",
+        "[3] Chars written: {}",
         bsp::console::console().chars_written()
     );
-    println!("[3] Echoing input now");
+    println!("[4] Echoing input now");
 
     // Discard any spurious received characters before going into echo mode.
     console().clear_rx();
diff --git a/06_uart_chainloader/Cargo.lock b/06_uart_chainloader/Cargo.lock
index a3d8bb9ae..5d2602a8e 100644
--- a/06_uart_chainloader/Cargo.lock
+++ b/06_uart_chainloader/Cargo.lock
@@ -12,8 +12,8 @@ dependencies = [
 ]
 
 [[package]]
-name = "kernel"
-version = "0.1.0"
+name = "mingo"
+version = "0.6.0"
 dependencies = [
  "cortex-a",
  "register",
diff --git a/06_uart_chainloader/Cargo.toml b/06_uart_chainloader/Cargo.toml
index df5f7f974..0e1c5c28f 100644
--- a/06_uart_chainloader/Cargo.toml
+++ b/06_uart_chainloader/Cargo.toml
@@ -1,6 +1,6 @@
 [package]
-name = "kernel"
-version = "0.1.0"
+name = "mingo"
+version = "0.6.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
 edition = "2018"
 
@@ -12,6 +12,10 @@ default = []
 bsp_rpi3 = ["register"]
 bsp_rpi4 = ["register"]
 
+[[bin]]
+name = "kernel"
+path = "src/main.rs"
+
 ##--------------------------------------------------------------------------------------------------
 ## Dependencies
 ##--------------------------------------------------------------------------------------------------
diff --git a/06_uart_chainloader/README.md b/06_uart_chainloader/README.md
index 131dc19bb..80aa21332 100644
--- a/06_uart_chainloader/README.md
+++ b/06_uart_chainloader/README.md
@@ -75,12 +75,13 @@ Minipush 1.0
 [MP] ⏩ Pushing 6 KiB ==========================================🦀 100% 0 KiB/s Time: 00:00:00
 [ML] Loaded! Executing the payload now
 
-[0] Booting on: Raspberry Pi 3
-[1] Drivers loaded:
+[0] mingo version 0.5.0
+[1] Booting on: Raspberry Pi 3
+[2] Drivers loaded:
       1. BCM GPIO
       2. BCM PL011 UART
-[2] Chars written: 93
-[3] Echoing input now
+[3] Chars written: 117
+[4] Echoing input now
 ```
 
 In this tutorial, a version of the kernel from the previous tutorial is loaded for demo purposes. In
@@ -118,6 +119,18 @@ IN:
 
 ## Diff to previous
 ```diff
+
+diff -uNr 05_drivers_gpio_uart/Cargo.toml 06_uart_chainloader/Cargo.toml
+--- 05_drivers_gpio_uart/Cargo.toml
++++ 06_uart_chainloader/Cargo.toml
+@@ -1,6 +1,6 @@
+ [package]
+ name = "mingo"
+-version = "0.5.0"
++version = "0.6.0"
+ authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+ edition = "2018"
+
 Binary files 05_drivers_gpio_uart/demo_payload_rpi3.img and 06_uart_chainloader/demo_payload_rpi3.img differ
 Binary files 05_drivers_gpio_uart/demo_payload_rpi4.img and 06_uart_chainloader/demo_payload_rpi4.img differ
 
@@ -373,7 +386,7 @@ diff -uNr 05_drivers_gpio_uart/src/main.rs 06_uart_chainloader/src/main.rs
  #![feature(const_fn_fn_ptr_basics)]
  #![feature(format_args_nl)]
  #![feature(global_asm)]
-@@ -146,33 +147,56 @@
+@@ -146,38 +147,56 @@
      kernel_main()
  }
 
@@ -389,15 +402,15 @@ diff -uNr 05_drivers_gpio_uart/src/main.rs 06_uart_chainloader/src/main.rs
      use bsp::console::console;
      use console::interface::All;
 -    use driver::interface::DriverManager;
-
--    println!("[0] Booting on: {}", bsp::board_name());
-+    println!("{}", MINILOAD_LOGO);
-+    println!("{:^37}", bsp::board_name());
-+    println!();
-+    println!("[ML] Requesting binary");
-+    console().flush();
-
--    println!("[1] Drivers loaded:");
+-
+-    println!(
+-        "[0] {} version {}",
+-        env!("CARGO_PKG_NAME"),
+-        env!("CARGO_PKG_VERSION")
+-    );
+-    println!("[1] Booting on: {}", bsp::board_name());
+-
+-    println!("[2] Drivers loaded:");
 -    for (i, driver) in bsp::driver::driver_manager()
 -        .all_device_drivers()
 -        .iter()
@@ -405,24 +418,30 @@ diff -uNr 05_drivers_gpio_uart/src/main.rs 06_uart_chainloader/src/main.rs
 -    {
 -        println!("      {}. {}", i + 1, driver.compatible());
 -    }
-+    // Discard any spurious received characters before starting with the loader protocol.
-+    console().clear_rx();
 
 -    println!(
--        "[2] Chars written: {}",
+-        "[3] Chars written: {}",
 -        bsp::console::console().chars_written()
 -    );
--    println!("[3] Echoing input now");
-+    // Notify `Minipush` to send the binary.
-+    for _ in 0..3 {
-+        console().write_char(3 as char);
-+    }
+-    println!("[4] Echoing input now");
++    println!("{}", MINILOAD_LOGO);
++    println!("{:^37}", bsp::board_name());
++    println!();
++    println!("[ML] Requesting binary");
++    console().flush();
 
 -    // Discard any spurious received characters before going into echo mode.
--    console().clear_rx();
++    // Discard any spurious received characters before starting with the loader protocol.
+     console().clear_rx();
 -    loop {
 -        let c = bsp::console::console().read_char();
 -        bsp::console::console().write_char(c);
++
++    // Notify `Minipush` to send the binary.
++    for _ in 0..3 {
++        console().write_char(3 as char);
+     }
++
 +    // Read the binary's size.
 +    let mut size: u32 = u32::from(console().read_char() as u8);
 +    size |= u32::from(console().read_char() as u8) << 8;
@@ -439,7 +458,7 @@ diff -uNr 05_drivers_gpio_uart/src/main.rs 06_uart_chainloader/src/main.rs
 +        for i in 0..size {
 +            core::ptr::write_volatile(kernel_addr.offset(i as isize), console().read_char() as u8)
 +        }
-     }
++    }
 +
 +    println!("[ML] Loaded! Executing the payload now\n");
 +    console().flush();
diff --git a/06_uart_chainloader/demo_payload_rpi3.img b/06_uart_chainloader/demo_payload_rpi3.img
index 203ebb7652369e33837c1da09e9b7b7998e4bcf4..9b1cf35bce83d123cb099774e0377f9ac1271a2b 100755
GIT binary patch
delta 1645
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delta 1448
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diff --git a/06_uart_chainloader/demo_payload_rpi4.img b/06_uart_chainloader/demo_payload_rpi4.img
index b06166dcbae527c6f1cc42c11d9200ed60f9dabf..2357ef5e93fd8fe7d0716198726efb7c85810edc 100755
GIT binary patch
delta 2516
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Temx#oCzV(o5S8ek1S<an0n(q;

diff --git a/07_timestamps/Cargo.lock b/07_timestamps/Cargo.lock
index a3d8bb9ae..311b6c211 100644
--- a/07_timestamps/Cargo.lock
+++ b/07_timestamps/Cargo.lock
@@ -12,8 +12,8 @@ dependencies = [
 ]
 
 [[package]]
-name = "kernel"
-version = "0.1.0"
+name = "mingo"
+version = "0.7.0"
 dependencies = [
  "cortex-a",
  "register",
diff --git a/07_timestamps/Cargo.toml b/07_timestamps/Cargo.toml
index df5f7f974..07aa05171 100644
--- a/07_timestamps/Cargo.toml
+++ b/07_timestamps/Cargo.toml
@@ -1,6 +1,6 @@
 [package]
-name = "kernel"
-version = "0.1.0"
+name = "mingo"
+version = "0.7.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
 edition = "2018"
 
@@ -12,6 +12,10 @@ default = []
 bsp_rpi3 = ["register"]
 bsp_rpi4 = ["register"]
 
+[[bin]]
+name = "kernel"
+path = "src/main.rs"
+
 ##--------------------------------------------------------------------------------------------------
 ## Dependencies
 ##--------------------------------------------------------------------------------------------------
diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index e221a12c3..a5063cb64 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -27,22 +27,35 @@ Minipush 1.0
            Raspberry Pi 3
 
 [ML] Requesting binary
-[MP] ⏩ Pushing 11 KiB =========================================🦀 100% 0 KiB/s Time: 00:00:00
+[MP] ⏩ Pushing 12 KiB =========================================🦀 100% 0 KiB/s Time: 00:00:00
 [ML] Loaded! Executing the payload now
 
-[    0.543941] Booting on: Raspberry Pi 3
-[    0.545059] Architectural timer resolution: 52 ns
-[    0.547358] Drivers loaded:
-[    0.548703]       1. BCM GPIO
-[    0.550135]       2. BCM PL011 UART
-[W   0.551828] Spin duration smaller than architecturally supported, skipping
-[    0.555212] Spinning for 1 second
-[    1.556818] Spinning for 1 second
-[    2.557690] Spinning for 1 second
+[    0.140431] mingo version 0.7.0
+[    0.140630] Booting on: Raspberry Pi 3
+[    0.141085] Architectural timer resolution: 52 ns
+[    0.141660] Drivers loaded:
+[    0.141995]       1. BCM GPIO
+[    0.142353]       2. BCM PL011 UART
+[W   0.142777] Spin duration smaller than architecturally supported, skipping
+[    0.143621] Spinning for 1 second
+[    1.144023] Spinning for 1 second
+[    2.144245] Spinning for 1 second
 ```
 
 ## Diff to previous
 ```diff
+
+diff -uNr 06_uart_chainloader/Cargo.toml 07_timestamps/Cargo.toml
+--- 06_uart_chainloader/Cargo.toml
++++ 07_timestamps/Cargo.toml
+@@ -1,6 +1,6 @@
+ [package]
+ name = "mingo"
+-version = "0.6.0"
++version = "0.7.0"
+ authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+ edition = "2018"
+
 Binary files 06_uart_chainloader/demo_payload_rpi3.img and 07_timestamps/demo_payload_rpi3.img differ
 Binary files 06_uart_chainloader/demo_payload_rpi4.img and 07_timestamps/demo_payload_rpi4.img differ
 
@@ -475,7 +488,7 @@ diff -uNr 06_uart_chainloader/src/main.rs 07_timestamps/src/main.rs
 
  /// Early init code.
  ///
-@@ -147,56 +147,33 @@
+@@ -147,56 +147,38 @@
      kernel_main()
  }
 
@@ -506,8 +519,26 @@ diff -uNr 06_uart_chainloader/src/main.rs 07_timestamps/src/main.rs
 -    // Notify `Minipush` to send the binary.
 -    for _ in 0..3 {
 -        console().write_char(3 as char);
--    }
++    info!(
++        "{} version {}",
++        env!("CARGO_PKG_NAME"),
++        env!("CARGO_PKG_VERSION")
++    );
 +    info!("Booting on: {}", bsp::board_name());
++
++    info!(
++        "Architectural timer resolution: {} ns",
++        time::time_manager().resolution().as_nanos()
++    );
++
++    info!("Drivers loaded:");
++    for (i, driver) in bsp::driver::driver_manager()
++        .all_device_drivers()
++        .iter()
++        .enumerate()
++    {
++        info!("      {}. {}", i + 1, driver.compatible());
+     }
 
 -    // Read the binary's size.
 -    let mut size: u32 = u32::from(console().read_char() as u8);
@@ -525,28 +556,16 @@ diff -uNr 06_uart_chainloader/src/main.rs 07_timestamps/src/main.rs
 -        for i in 0..size {
 -            core::ptr::write_volatile(kernel_addr.offset(i as isize), console().read_char() as u8)
 -        }
-+    info!(
-+        "Architectural timer resolution: {} ns",
-+        time::time_manager().resolution().as_nanos()
-+    );
-+
-+    info!("Drivers loaded:");
-+    for (i, driver) in bsp::driver::driver_manager()
-+        .all_device_drivers()
-+        .iter()
-+        .enumerate()
-+    {
-+        info!("      {}. {}", i + 1, driver.compatible());
-     }
+-    }
++    // Test a failing timer case.
++    time::time_manager().spin_for(Duration::from_nanos(1));
 
 -    println!("[ML] Loaded! Executing the payload now\n");
 -    console().flush();
 -
 -    // Use black magic to create a function pointer.
 -    let kernel: fn() -> ! = unsafe { core::mem::transmute(kernel_addr) };
-+    // Test a failing timer case.
-+    time::time_manager().spin_for(Duration::from_nanos(1));
-
+-
 -    // Jump to loaded kernel!
 -    kernel()
 +    loop {
diff --git a/07_timestamps/src/main.rs b/07_timestamps/src/main.rs
index b7a74ea6b..5f465cbfe 100644
--- a/07_timestamps/src/main.rs
+++ b/07_timestamps/src/main.rs
@@ -153,6 +153,11 @@ fn kernel_main() -> ! {
     use driver::interface::DriverManager;
     use time::interface::TimeManager;
 
+    info!(
+        "{} version {}",
+        env!("CARGO_PKG_NAME"),
+        env!("CARGO_PKG_VERSION")
+    );
     info!("Booting on: {}", bsp::board_name());
 
     info!(
diff --git a/08_hw_debug_JTAG/Cargo.lock b/08_hw_debug_JTAG/Cargo.lock
index a3d8bb9ae..011adc0f3 100644
--- a/08_hw_debug_JTAG/Cargo.lock
+++ b/08_hw_debug_JTAG/Cargo.lock
@@ -12,8 +12,8 @@ dependencies = [
 ]
 
 [[package]]
-name = "kernel"
-version = "0.1.0"
+name = "mingo"
+version = "0.8.0"
 dependencies = [
  "cortex-a",
  "register",
diff --git a/08_hw_debug_JTAG/Cargo.toml b/08_hw_debug_JTAG/Cargo.toml
index df5f7f974..e84540cac 100644
--- a/08_hw_debug_JTAG/Cargo.toml
+++ b/08_hw_debug_JTAG/Cargo.toml
@@ -1,6 +1,6 @@
 [package]
-name = "kernel"
-version = "0.1.0"
+name = "mingo"
+version = "0.8.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
 edition = "2018"
 
@@ -12,6 +12,10 @@ default = []
 bsp_rpi3 = ["register"]
 bsp_rpi4 = ["register"]
 
+[[bin]]
+name = "kernel"
+path = "src/main.rs"
+
 ##--------------------------------------------------------------------------------------------------
 ## Dependencies
 ##--------------------------------------------------------------------------------------------------
diff --git a/08_hw_debug_JTAG/README.md b/08_hw_debug_JTAG/README.md
index 03d16a4f0..a30a296ed 100644
--- a/08_hw_debug_JTAG/README.md
+++ b/08_hw_debug_JTAG/README.md
@@ -305,6 +305,18 @@ Thanks to [@naotaco](https://github.com/naotaco) for laying the groundwork for t
 ## Diff to previous
 ```diff
 
+diff -uNr 07_timestamps/Cargo.toml 08_hw_debug_JTAG/Cargo.toml
+--- 07_timestamps/Cargo.toml
++++ 08_hw_debug_JTAG/Cargo.toml
+@@ -1,6 +1,6 @@
+ [package]
+ name = "mingo"
+-version = "0.7.0"
++version = "0.8.0"
+ authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+ edition = "2018"
+
+
 diff -uNr 07_timestamps/Makefile 08_hw_debug_JTAG/Makefile
 --- 07_timestamps/Makefile
 +++ 08_hw_debug_JTAG/Makefile
diff --git a/08_hw_debug_JTAG/src/main.rs b/08_hw_debug_JTAG/src/main.rs
index b7a74ea6b..5f465cbfe 100644
--- a/08_hw_debug_JTAG/src/main.rs
+++ b/08_hw_debug_JTAG/src/main.rs
@@ -153,6 +153,11 @@ fn kernel_main() -> ! {
     use driver::interface::DriverManager;
     use time::interface::TimeManager;
 
+    info!(
+        "{} version {}",
+        env!("CARGO_PKG_NAME"),
+        env!("CARGO_PKG_VERSION")
+    );
     info!("Booting on: {}", bsp::board_name());
 
     info!(
diff --git a/09_privilege_level/Cargo.lock b/09_privilege_level/Cargo.lock
index a3d8bb9ae..753961f7f 100644
--- a/09_privilege_level/Cargo.lock
+++ b/09_privilege_level/Cargo.lock
@@ -12,8 +12,8 @@ dependencies = [
 ]
 
 [[package]]
-name = "kernel"
-version = "0.1.0"
+name = "mingo"
+version = "0.9.0"
 dependencies = [
  "cortex-a",
  "register",
diff --git a/09_privilege_level/Cargo.toml b/09_privilege_level/Cargo.toml
index df5f7f974..f6750ed49 100644
--- a/09_privilege_level/Cargo.toml
+++ b/09_privilege_level/Cargo.toml
@@ -1,6 +1,6 @@
 [package]
-name = "kernel"
-version = "0.1.0"
+name = "mingo"
+version = "0.9.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
 edition = "2018"
 
@@ -12,6 +12,10 @@ default = []
 bsp_rpi3 = ["register"]
 bsp_rpi4 = ["register"]
 
+[[bin]]
+name = "kernel"
+path = "src/main.rs"
+
 ##--------------------------------------------------------------------------------------------------
 ## Dependencies
 ##--------------------------------------------------------------------------------------------------
diff --git a/09_privilege_level/README.md b/09_privilege_level/README.md
index b786bf33c..869c39600 100644
--- a/09_privilege_level/README.md
+++ b/09_privilege_level/README.md
@@ -177,27 +177,40 @@ Minipush 1.0
            Raspberry Pi 3
 
 [ML] Requesting binary
-[MP] ⏩ Pushing 13 KiB =========================================🦀 100% 0 KiB/s Time: 00:00:00
+[MP] ⏩ Pushing 14 KiB =========================================🦀 100% 0 KiB/s Time: 00:00:00
 [ML] Loaded! Executing the payload now
 
-[    0.637617] Booting on: Raspberry Pi 3
-[    0.638737] Current privilege level: EL1
-[    0.640645] Exception handling state:
-[    0.642424]       Debug:  Masked
-[    0.643986]       SError: Masked
-[    0.645548]       IRQ:    Masked
-[    0.647110]       FIQ:    Masked
-[    0.648672] Architectural timer resolution: 52 ns
-[    0.650971] Drivers loaded:
-[    0.652316]       1. BCM GPIO
-[    0.653748]       2. BCM PL011 UART
-[    0.655440] Timer test, spinning for 1 second
-[    1.657567] Echoing input now
+[    0.165757] mingo version 0.9.0
+[    0.165957] Booting on: Raspberry Pi 3
+[    0.166412] Current privilege level: EL1
+[    0.166888] Exception handling state:
+[    0.167333]       Debug:  Masked
+[    0.167723]       SError: Masked
+[    0.168112]       IRQ:    Masked
+[    0.168502]       FIQ:    Masked
+[    0.168893] Architectural timer resolution: 52 ns
+[    0.169467] Drivers loaded:
+[    0.169803]       1. BCM GPIO
+[    0.170160]       2. BCM PL011 UART
+[    0.170583] Timer test, spinning for 1 second
+[    1.171115] Echoing input now
 ```
 
 ## Diff to previous
 ```diff
 
+diff -uNr 08_hw_debug_JTAG/Cargo.toml 09_privilege_level/Cargo.toml
+--- 08_hw_debug_JTAG/Cargo.toml
++++ 09_privilege_level/Cargo.toml
+@@ -1,6 +1,6 @@
+ [package]
+ name = "mingo"
+-version = "0.8.0"
++version = "0.9.0"
+ authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+ edition = "2018"
+
+
 diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs 09_privilege_level/src/_arch/aarch64/cpu/boot.rs
 --- 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs
 +++ 09_privilege_level/src/_arch/aarch64/cpu/boot.rs
@@ -494,7 +507,7 @@ diff -uNr 08_hw_debug_JTAG/src/main.rs 09_privilege_level/src/main.rs
  mod memory;
  mod panic_wait;
  mod print;
-@@ -149,12 +150,20 @@
+@@ -149,6 +150,8 @@
 
  /// The main function running after the early init.
  fn kernel_main() -> ! {
@@ -503,7 +516,8 @@ diff -uNr 08_hw_debug_JTAG/src/main.rs 09_privilege_level/src/main.rs
      use core::time::Duration;
      use driver::interface::DriverManager;
      use time::interface::TimeManager;
-
+@@ -160,6 +163,12 @@
+     );
      info!("Booting on: {}", bsp::board_name());
 
 +    let (_, privilege_level) = exception::current_privilege_level();
@@ -515,7 +529,7 @@ diff -uNr 08_hw_debug_JTAG/src/main.rs 09_privilege_level/src/main.rs
      info!(
          "Architectural timer resolution: {} ns",
          time::time_manager().resolution().as_nanos()
-@@ -169,11 +178,15 @@
+@@ -174,11 +183,15 @@
          info!("      {}. {}", i + 1, driver.compatible());
      }
 
diff --git a/09_privilege_level/src/main.rs b/09_privilege_level/src/main.rs
index 0c3a06489..83d96ca8a 100644
--- a/09_privilege_level/src/main.rs
+++ b/09_privilege_level/src/main.rs
@@ -156,6 +156,11 @@ fn kernel_main() -> ! {
     use driver::interface::DriverManager;
     use time::interface::TimeManager;
 
+    info!(
+        "{} version {}",
+        env!("CARGO_PKG_NAME"),
+        env!("CARGO_PKG_VERSION")
+    );
     info!("Booting on: {}", bsp::board_name());
 
     let (_, privilege_level) = exception::current_privilege_level();
diff --git a/10_virtual_mem_part1_identity_mapping/Cargo.lock b/10_virtual_mem_part1_identity_mapping/Cargo.lock
index a3d8bb9ae..5022ffadb 100644
--- a/10_virtual_mem_part1_identity_mapping/Cargo.lock
+++ b/10_virtual_mem_part1_identity_mapping/Cargo.lock
@@ -12,8 +12,8 @@ dependencies = [
 ]
 
 [[package]]
-name = "kernel"
-version = "0.1.0"
+name = "mingo"
+version = "0.10.0"
 dependencies = [
  "cortex-a",
  "register",
diff --git a/10_virtual_mem_part1_identity_mapping/Cargo.toml b/10_virtual_mem_part1_identity_mapping/Cargo.toml
index df5f7f974..8e54f2cdb 100644
--- a/10_virtual_mem_part1_identity_mapping/Cargo.toml
+++ b/10_virtual_mem_part1_identity_mapping/Cargo.toml
@@ -1,6 +1,6 @@
 [package]
-name = "kernel"
-version = "0.1.0"
+name = "mingo"
+version = "0.10.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
 edition = "2018"
 
@@ -12,6 +12,10 @@ default = []
 bsp_rpi3 = ["register"]
 bsp_rpi4 = ["register"]
 
+[[bin]]
+name = "kernel"
+path = "src/main.rs"
+
 ##--------------------------------------------------------------------------------------------------
 ## Dependencies
 ##--------------------------------------------------------------------------------------------------
diff --git a/10_virtual_mem_part1_identity_mapping/README.md b/10_virtual_mem_part1_identity_mapping/README.md
index 3161e6b01..ba2932a44 100644
--- a/10_virtual_mem_part1_identity_mapping/README.md
+++ b/10_virtual_mem_part1_identity_mapping/README.md
@@ -322,32 +322,45 @@ Minipush 1.0
            Raspberry Pi 3
 
 [ML] Requesting binary
-[MP] ⏩ Pushing 64 KiB ========================================🦀 100% 32 KiB/s Time: 00:00:02
+[MP] ⏩ Pushing 64 KiB =========================================🦀 100% 0 KiB/s Time: 00:00:00
 [ML] Loaded! Executing the payload now
 
-[    3.175017] Booting on: Raspberry Pi 3
-[    3.176100] MMU online. Special regions:
-[    3.178009]       0x00080000 - 0x0008ffff |  64 KiB | C   RO PX  | Kernel code and RO data
-[    3.182088]       0x1fff0000 - 0x1fffffff |  64 KiB | Dev RW PXN | Remapped Device MMIO
-[    3.186036]       0x3f000000 - 0x4000ffff |  16 MiB | Dev RW PXN | Device MMIO
-[    3.189594] Current privilege level: EL1
-[    3.191502] Exception handling state:
-[    3.193281]       Debug:  Masked
-[    3.194843]       SError: Masked
-[    3.196405]       IRQ:    Masked
-[    3.197967]       FIQ:    Masked
-[    3.199529] Architectural timer resolution: 52 ns
-[    3.201828] Drivers loaded:
-[    3.203173]       1. BCM GPIO
-[    3.204605]       2. BCM PL011 UART
-[    3.206297] Timer test, spinning for 1 second
+[    1.034062] mingo version 0.10.0
+[    1.034270] Booting on: Raspberry Pi 3
+[    1.034725] MMU online. Special regions:
+[    1.035201]       0x00080000 - 0x0008ffff |  64 KiB | C   RO PX  | Kernel code and RO data
+[    1.036220]       0x1fff0000 - 0x1fffffff |  64 KiB | Dev RW PXN | Remapped Device MMIO
+[    1.037205]       0x3f000000 - 0x4000ffff |  16 MiB | Dev RW PXN | Device MMIO
+[    1.038094] Current privilege level: EL1
+[    1.038570] Exception handling state:
+[    1.039015]       Debug:  Masked
+[    1.039405]       SError: Masked
+[    1.039794]       IRQ:    Masked
+[    1.040184]       FIQ:    Masked
+[    1.040575] Architectural timer resolution: 52 ns
+[    1.041148] Drivers loaded:
+[    1.041484]       1. BCM GPIO
+[    1.041842]       2. BCM PL011 UART
+[    1.042264] Timer test, spinning for 1 second
 [     !!!    ] Writing through the remapped UART at 0x1FFF_1000
-[    4.210458] Echoing input now
+[    2.043305] Echoing input now
 ```
 
 ## Diff to previous
 ```diff
 
+diff -uNr 09_privilege_level/Cargo.toml 10_virtual_mem_part1_identity_mapping/Cargo.toml
+--- 09_privilege_level/Cargo.toml
++++ 10_virtual_mem_part1_identity_mapping/Cargo.toml
+@@ -1,6 +1,6 @@
+ [package]
+ name = "mingo"
+-version = "0.9.0"
++version = "0.10.0"
+ authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+ edition = "2018"
+
+
 diff -uNr 09_privilege_level/src/_arch/aarch64/memory/mmu/translation_table.rs 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs
 --- 09_privilege_level/src/_arch/aarch64/memory/mmu/translation_table.rs
 +++ 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -1058,8 +1071,8 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
 
      for i in bsp::driver::driver_manager().all_device_drivers().iter() {
          if let Err(x) = i.init() {
-@@ -158,6 +170,9 @@
-
+@@ -163,6 +175,9 @@
+     );
      info!("Booting on: {}", bsp::board_name());
 
 +    info!("MMU online. Special regions:");
@@ -1068,7 +1081,7 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
      let (_, privilege_level) = exception::current_privilege_level();
      info!("Current privilege level: {}", privilege_level);
 
-@@ -181,6 +196,13 @@
+@@ -186,6 +201,13 @@
      info!("Timer test, spinning for 1 second");
      time::time_manager().spin_for(Duration::from_secs(1));
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/main.rs b/10_virtual_mem_part1_identity_mapping/src/main.rs
index 8ce5d3d92..74d49754a 100644
--- a/10_virtual_mem_part1_identity_mapping/src/main.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/main.rs
@@ -168,6 +168,11 @@ fn kernel_main() -> ! {
     use driver::interface::DriverManager;
     use time::interface::TimeManager;
 
+    info!(
+        "{} version {}",
+        env!("CARGO_PKG_NAME"),
+        env!("CARGO_PKG_VERSION")
+    );
     info!("Booting on: {}", bsp::board_name());
 
     info!("MMU online. Special regions:");
diff --git a/11_exceptions_part1_groundwork/Cargo.lock b/11_exceptions_part1_groundwork/Cargo.lock
index a3d8bb9ae..c956c58cd 100644
--- a/11_exceptions_part1_groundwork/Cargo.lock
+++ b/11_exceptions_part1_groundwork/Cargo.lock
@@ -12,8 +12,8 @@ dependencies = [
 ]
 
 [[package]]
-name = "kernel"
-version = "0.1.0"
+name = "mingo"
+version = "0.11.0"
 dependencies = [
  "cortex-a",
  "register",
diff --git a/11_exceptions_part1_groundwork/Cargo.toml b/11_exceptions_part1_groundwork/Cargo.toml
index df5f7f974..764939bf2 100644
--- a/11_exceptions_part1_groundwork/Cargo.toml
+++ b/11_exceptions_part1_groundwork/Cargo.toml
@@ -1,6 +1,6 @@
 [package]
-name = "kernel"
-version = "0.1.0"
+name = "mingo"
+version = "0.11.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
 edition = "2018"
 
@@ -12,6 +12,10 @@ default = []
 bsp_rpi3 = ["register"]
 bsp_rpi4 = ["register"]
 
+[[bin]]
+name = "kernel"
+path = "src/main.rs"
+
 ##--------------------------------------------------------------------------------------------------
 ## Dependencies
 ##--------------------------------------------------------------------------------------------------
diff --git a/11_exceptions_part1_groundwork/README.md b/11_exceptions_part1_groundwork/README.md
index 878ea4362..f9c70824b 100644
--- a/11_exceptions_part1_groundwork/README.md
+++ b/11_exceptions_part1_groundwork/README.md
@@ -406,32 +406,33 @@ Minipush 1.0
            Raspberry Pi 3
 
 [ML] Requesting binary
-[MP] ⏩ Pushing 64 KiB ========================================🦀 100% 32 KiB/s Time: 00:00:02
+[MP] ⏩ Pushing 64 KiB =========================================🦀 100% 0 KiB/s Time: 00:00:00
 [ML] Loaded! Executing the payload now
 
-[    3.091032] Booting on: Raspberry Pi 3
-[    3.092116] MMU online. Special regions:
-[    3.094025]       0x00080000 - 0x0008ffff |  64 KiB | C   RO PX  | Kernel code and RO data
-[    3.098103]       0x3f000000 - 0x4000ffff |  16 MiB | Dev RW PXN | Device MMIO
-[    3.101661] Current privilege level: EL1
-[    3.103570] Exception handling state:
-[    3.105348]       Debug:  Masked
-[    3.106910]       SError: Masked
-[    3.108472]       IRQ:    Masked
-[    3.110034]       FIQ:    Masked
-[    3.111596] Architectural timer resolution: 52 ns
-[    3.113895] Drivers loaded:
-[    3.115240]       1. BCM GPIO
-[    3.116672]       2. BCM PL011 UART
-[    3.118364] Timer test, spinning for 1 second
-[    4.120490]
-[    4.120494] Trying to read from address 8 GiB...
-[    4.122700] ************************************************
-[    4.125476] Whoa! We recovered from a synchronous exception!
-[    4.128253] ************************************************
-[    4.131030]
-[    4.131724] Let's try again
-[    4.133069] Trying to read from address 9 GiB...
+[    0.980247] mingo version 0.11.0
+[    0.980454] Booting on: Raspberry Pi 3
+[    0.980909] MMU online. Special regions:
+[    0.981386]       0x00080000 - 0x0008ffff |  64 KiB | C   RO PX  | Kernel code and RO data
+[    0.982404]       0x3f000000 - 0x4000ffff |  16 MiB | Dev RW PXN | Device MMIO
+[    0.983293] Current privilege level: EL1
+[    0.983769] Exception handling state:
+[    0.984213]       Debug:  Masked
+[    0.984604]       SError: Masked
+[    0.984993]       IRQ:    Masked
+[    0.985383]       FIQ:    Masked
+[    0.985773] Architectural timer resolution: 52 ns
+[    0.986347] Drivers loaded:
+[    0.986684]       1. BCM GPIO
+[    0.987041]       2. BCM PL011 UART
+[    0.987463] Timer test, spinning for 1 second
+[    1.987994]
+[    1.987998] Trying to read from address 8 GiB...
+[    1.988547] ************************************************
+[    1.989240] Whoa! We recovered from a synchronous exception!
+[    1.989933] ************************************************
+[    1.990627]
+[    1.990800] Let's try again
+[    1.991136] Trying to read from address 9 GiB...
 
 Kernel panic:
 
@@ -440,7 +441,7 @@ FAR_EL1: 0x0000000240000000
 ESR_EL1: 0x96000004
       Exception Class         (EC) : 0x25 - Data Abort, current EL
       Instr Specific Syndrome (ISS): 0x4
-ELR_EL1: 0x0000000000081458
+ELR_EL1: 0x0000000000082578
 SPSR_EL1: 0x600003c5
       Flags:
             Negative (N): Not set
@@ -455,27 +456,39 @@ SPSR_EL1: 0x600003c5
       Illegal Execution State (IL): Not set
 
 General purpose register:
-      x0 : 0x0000000000000000         x1 : 0x0000000000085727
-      x2 : 0x0000000000000027         x3 : 0x0000000000000000
-      x4 : 0x0000000000000002         x5 : 0x3f27329c00000000
-      x6 : 0x0000000000000000         x7 : 0xdbd1b90800000000
+      x0 : 0x0000000000000000         x1 : 0x00000000000858c7
+      x2 : 0x0000000000000027         x3 : 0x0000000000084cc4
+      x4 : 0x0000000000000003         x5 : 0x3f27329400000000
+      x6 : 0x0000000000000000         x7 : 0xd3d0b80800000000
       x8 : 0x0000000240000000         x9 : 0x000000003f201000
-      x10: 0x0000000000000019         x11: 0x00000000000819d0
-      x12: 0x0000000000000000         x13: 0x0000000000000033
+      x10: 0x0000000000000019         x11: 0x0000000000000000
+      x12: 0x0000000000000001         x13: 0x0000000000000036
       x14: 0x000000000007fc2d         x15: 0x0000000000000000
-      x16: 0x0000000000000040         x17: 0xfd7f702255f847d0
-      x18: 0x0000000000000003         x19: 0x0000000000090008
-      x20: 0x0000000000085510         x21: 0x000000003b9aca00
-      x22: 0x00000000000003e8         x23: 0x0000000000081610
-      x24: 0x0000000000082268         x25: 0x00000000000f4240
-      x26: 0xffffffffc4653600         x27: 0x00000000000855f0
-      x28: 0x0000000000083f80         x29: 0x0000000000086810
-      lr : 0x000000000008144c
+      x16: 0x0000000000000040         x17: 0xfd39702255e846c0
+      x18: 0x9cd47880832f1200         x19: 0x0000000000090008
+      x20: 0x00000000000856b0         x21: 0x000000003b9aca00
+      x22: 0x000000000008274c         x23: 0x00000000000833d8
+      x24: 0x00000000000003e8         x25: 0xffffffffc4653600
+      x26: 0x00000000000f4240         x27: 0x0000000000085790
+      x28: 0x0000000000086a50         x29: 0x00000000000867ed
+      lr : 0x000000000008256c
 ```
 
 ## Diff to previous
 ```diff
 
+diff -uNr 10_virtual_mem_part1_identity_mapping/Cargo.toml 11_exceptions_part1_groundwork/Cargo.toml
+--- 10_virtual_mem_part1_identity_mapping/Cargo.toml
++++ 11_exceptions_part1_groundwork/Cargo.toml
+@@ -1,6 +1,6 @@
+ [package]
+ name = "mingo"
+-version = "0.10.0"
++version = "0.11.0"
+ authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+ edition = "2018"
+
+
 diff -uNr 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs 11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
 --- 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs
 +++ 11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
@@ -963,7 +976,7 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/main.rs 11_exceptions_part1_
      if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
          panic!("MMU: {}", string);
      }
-@@ -196,13 +198,28 @@
+@@ -201,13 +203,28 @@
      info!("Timer test, spinning for 1 second");
      time::time_manager().spin_for(Duration::from_secs(1));
 
diff --git a/11_exceptions_part1_groundwork/src/main.rs b/11_exceptions_part1_groundwork/src/main.rs
index 2af372ab9..a1c5bc150 100644
--- a/11_exceptions_part1_groundwork/src/main.rs
+++ b/11_exceptions_part1_groundwork/src/main.rs
@@ -170,6 +170,11 @@ fn kernel_main() -> ! {
     use driver::interface::DriverManager;
     use time::interface::TimeManager;
 
+    info!(
+        "{} version {}",
+        env!("CARGO_PKG_NAME"),
+        env!("CARGO_PKG_VERSION")
+    );
     info!("Booting on: {}", bsp::board_name());
 
     info!("MMU online. Special regions:");
diff --git a/12_integrated_testing/Cargo.lock b/12_integrated_testing/Cargo.lock
index 069559203..9dac661b5 100644
--- a/12_integrated_testing/Cargo.lock
+++ b/12_integrated_testing/Cargo.lock
@@ -12,8 +12,8 @@ dependencies = [
 ]
 
 [[package]]
-name = "kernel"
-version = "0.1.0"
+name = "mingo"
+version = "0.12.0"
 dependencies = [
  "cortex-a",
  "qemu-exit",
diff --git a/12_integrated_testing/Cargo.toml b/12_integrated_testing/Cargo.toml
index 06c10cf07..4bb92ff47 100644
--- a/12_integrated_testing/Cargo.toml
+++ b/12_integrated_testing/Cargo.toml
@@ -1,6 +1,6 @@
 [package]
-name = "kernel"
-version = "0.1.0"
+name = "mingo"
+version = "0.12.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
 edition = "2018"
 
@@ -45,6 +45,7 @@ test = true
 # Disable unit tests for the kernel binary.
 [[bin]]
 name = "kernel"
+path = "src/main.rs"
 test = false
 
 # List of tests without harness.
diff --git a/12_integrated_testing/README.md b/12_integrated_testing/README.md
index 600efa2a8..4a5940d1a 100644
--- a/12_integrated_testing/README.md
+++ b/12_integrated_testing/README.md
@@ -738,9 +738,8 @@ Believe it or not, that is all. There are three ways you can run tests:
 ```console
 $ make test
 [...]
-RUSTFLAGS="-C link-arg=-Tsrc/bsp/raspberrypi/link.ld -C target-cpu=cortex-a53 -D warnings -D missing_docs" cargo test --target=aarch64-unknown-none-softfloat --features bsp_rpi3 --release
-    Finished release [optimized] target(s) in 0.01s
-     Running target/aarch64-unknown-none-softfloat/release/deps/libkernel-4cc6412ddf631982
+
+     Running unittests (target/aarch64-unknown-none-softfloat/release/deps/libkernel-836110ac5dd535ba)
          -------------------------------------------------------------------
          🦀 Running 8 tests
          -------------------------------------------------------------------
@@ -748,9 +747,9 @@ RUSTFLAGS="-C link-arg=-Tsrc/bsp/raspberrypi/link.ld -C target-cpu=cortex-a53 -D
            1. virt_mem_layout_sections_are_64KiB_aligned................[ok]
            2. virt_mem_layout_has_no_overlaps...........................[ok]
            3. test_runner_executes_in_kernel_mode.......................[ok]
-           4. size_of_tabledescriptor_equals_64_bit.....................[ok]
-           5. size_of_pagedescriptor_equals_64_bit......................[ok]
-           6. kernel_tables_in_bss......................................[ok]
+           4. kernel_tables_in_bss......................................[ok]
+           5. size_of_tabledescriptor_equals_64_bit.....................[ok]
+           6. size_of_pagedescriptor_equals_64_bit......................[ok]
            7. zero_volatile_works.......................................[ok]
            8. bss_section_is_sane.......................................[ok]
 
@@ -759,7 +758,7 @@ RUSTFLAGS="-C link-arg=-Tsrc/bsp/raspberrypi/link.ld -C target-cpu=cortex-a53 -D
          -------------------------------------------------------------------
 
 
-     Running target/aarch64-unknown-none-softfloat/release/deps/00_console_sanity-557819b436f15a18
+     Running tests/00_console_sanity.rs (target/aarch64-unknown-none-softfloat/release/deps/00_console_sanity-78c12c5472d40df7)
          -------------------------------------------------------------------
          🦀 Running 3 console-based tests
          -------------------------------------------------------------------
@@ -773,7 +772,7 @@ RUSTFLAGS="-C link-arg=-Tsrc/bsp/raspberrypi/link.ld -C target-cpu=cortex-a53 -D
          -------------------------------------------------------------------
 
 
-     Running target/aarch64-unknown-none-softfloat/release/deps/01_timer_sanity-1e25e7d559a9009f
+     Running tests/01_timer_sanity.rs (target/aarch64-unknown-none-softfloat/release/deps/01_timer_sanity-4866734b14c83c9b)
          -------------------------------------------------------------------
          🦀 Running 3 tests
          -------------------------------------------------------------------
@@ -787,7 +786,7 @@ RUSTFLAGS="-C link-arg=-Tsrc/bsp/raspberrypi/link.ld -C target-cpu=cortex-a53 -D
          -------------------------------------------------------------------
 
 
-     Running target/aarch64-unknown-none-softfloat/release/deps/02_exception_sync_page_fault-14172ce39b3fae1c
+     Running tests/02_exception_sync_page_fault.rs (target/aarch64-unknown-none-softfloat/release/deps/02_exception_sync_page_fault-f2d0885cada1105b)
          -------------------------------------------------------------------
          🦀 Testing synchronous exception handling by causing a page fault
          -------------------------------------------------------------------
@@ -819,7 +818,11 @@ diff -uNr 11_exceptions_part1_groundwork/.cargo/config.toml 12_integrated_testin
 diff -uNr 11_exceptions_part1_groundwork/Cargo.toml 12_integrated_testing/Cargo.toml
 --- 11_exceptions_part1_groundwork/Cargo.toml
 +++ 12_integrated_testing/Cargo.toml
-@@ -4,24 +4,54 @@
+@@ -1,31 +1,58 @@
+ [package]
+ name = "mingo"
+-version = "0.11.0"
++version = "0.12.0"
  authors = ["Andre Richter <andre.o.richter@gmail.com>"]
  edition = "2018"
 
@@ -833,6 +836,10 @@ diff -uNr 11_exceptions_part1_groundwork/Cargo.toml 12_integrated_testing/Cargo.
  default = []
  bsp_rpi3 = ["register"]
  bsp_rpi4 = ["register"]
+-
+-[[bin]]
+-name = "kernel"
+-path = "src/main.rs"
 +test_build = ["qemu-exit"]
 
  ##--------------------------------------------------------------------------------------------------
@@ -866,6 +873,7 @@ diff -uNr 11_exceptions_part1_groundwork/Cargo.toml 12_integrated_testing/Cargo.
 +# Disable unit tests for the kernel binary.
 +[[bin]]
 +name = "kernel"
++path = "src/main.rs"
 +test = false
 +
 +# List of tests without harness.
@@ -1205,7 +1213,7 @@ diff -uNr 11_exceptions_part1_groundwork/src/exception.rs 12_integrated_testing/
 diff -uNr 11_exceptions_part1_groundwork/src/lib.rs 12_integrated_testing/src/lib.rs
 --- 11_exceptions_part1_groundwork/src/lib.rs
 +++ 12_integrated_testing/src/lib.rs
-@@ -0,0 +1,171 @@
+@@ -0,0 +1,184 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -1348,6 +1356,19 @@ diff -uNr 11_exceptions_part1_groundwork/src/lib.rs 12_integrated_testing/src/li
 +pub mod time;
 +
 +//--------------------------------------------------------------------------------------------------
++// Public Code
++//--------------------------------------------------------------------------------------------------
++
++/// Version string.
++pub fn version() -> &'static str {
++    concat!(
++        env!("CARGO_PKG_NAME"),
++        " version ",
++        env!("CARGO_PKG_VERSION")
++    )
++}
++
++//--------------------------------------------------------------------------------------------------
 +// Testing
 +//--------------------------------------------------------------------------------------------------
 +
@@ -1522,7 +1543,7 @@ diff -uNr 11_exceptions_part1_groundwork/src/main.rs 12_integrated_testing/src/m
  unsafe fn kernel_init() -> ! {
      use driver::interface::DriverManager;
      use memory::mmu::interface::MMU;
-@@ -166,9 +49,7 @@
+@@ -166,15 +49,9 @@
  fn kernel_main() -> ! {
      use bsp::console::console;
      use console::interface::All;
@@ -1530,9 +1551,16 @@ diff -uNr 11_exceptions_part1_groundwork/src/main.rs 12_integrated_testing/src/m
      use driver::interface::DriverManager;
 -    use time::interface::TimeManager;
 
+-    info!(
+-        "{} version {}",
+-        env!("CARGO_PKG_NAME"),
+-        env!("CARGO_PKG_VERSION")
+-    );
++    info!("{}", libkernel::version());
      info!("Booting on: {}", bsp::board_name());
 
-@@ -195,31 +76,6 @@
+     info!("MMU online. Special regions:");
+@@ -200,31 +77,6 @@
          info!("      {}. {}", i + 1, driver.compatible());
      }
 
diff --git a/12_integrated_testing/src/lib.rs b/12_integrated_testing/src/lib.rs
index 745122f85..dc991fd12 100644
--- a/12_integrated_testing/src/lib.rs
+++ b/12_integrated_testing/src/lib.rs
@@ -139,6 +139,19 @@ pub mod memory;
 pub mod print;
 pub mod time;
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Version string.
+pub fn version() -> &'static str {
+    concat!(
+        env!("CARGO_PKG_NAME"),
+        " version ",
+        env!("CARGO_PKG_VERSION")
+    )
+}
+
 //--------------------------------------------------------------------------------------------------
 // Testing
 //--------------------------------------------------------------------------------------------------
diff --git a/12_integrated_testing/src/main.rs b/12_integrated_testing/src/main.rs
index 77c9d494b..1daeb4038 100644
--- a/12_integrated_testing/src/main.rs
+++ b/12_integrated_testing/src/main.rs
@@ -51,6 +51,7 @@ fn kernel_main() -> ! {
     use console::interface::All;
     use driver::interface::DriverManager;
 
+    info!("{}", libkernel::version());
     info!("Booting on: {}", bsp::board_name());
 
     info!("MMU online. Special regions:");
diff --git a/13_exceptions_part2_peripheral_IRQs/Cargo.lock b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
index 069559203..922341af2 100644
--- a/13_exceptions_part2_peripheral_IRQs/Cargo.lock
+++ b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
@@ -12,8 +12,8 @@ dependencies = [
 ]
 
 [[package]]
-name = "kernel"
-version = "0.1.0"
+name = "mingo"
+version = "0.13.0"
 dependencies = [
  "cortex-a",
  "qemu-exit",
diff --git a/13_exceptions_part2_peripheral_IRQs/Cargo.toml b/13_exceptions_part2_peripheral_IRQs/Cargo.toml
index 206dfc878..343bdfda3 100644
--- a/13_exceptions_part2_peripheral_IRQs/Cargo.toml
+++ b/13_exceptions_part2_peripheral_IRQs/Cargo.toml
@@ -1,6 +1,6 @@
 [package]
-name = "kernel"
-version = "0.1.0"
+name = "mingo"
+version = "0.13.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
 edition = "2018"
 
@@ -43,6 +43,7 @@ test = true
 # Disable unit tests for the kernel binary.
 [[bin]]
 name = "kernel"
+path = "src/main.rs"
 test = false
 
 # List of tests without harness.
diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index 18b3cf812..4cb82c6b4 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -675,28 +675,29 @@ Minipush 1.0
            Raspberry Pi 3
 
 [ML] Requesting binary
-[MP] ⏩ Pushing 66 KiB ========================================🦀 100% 33 KiB/s Time: 00:00:02
+[MP] ⏩ Pushing 66 KiB =========================================🦀 100% 0 KiB/s Time: 00:00:00
 [ML] Loaded! Executing the payload now
 
-[    3.203172] Booting on: Raspberry Pi 3
-[    3.204255] MMU online. Special regions:
-[    3.206164]       0x00080000 - 0x0008ffff |  64 KiB | C   RO PX  | Kernel code and RO data
-[    3.210242]       0x3f000000 - 0x4000ffff |  16 MiB | Dev RW PXN | Device MMIO
-[    3.213800] Current privilege level: EL1
-[    3.215709] Exception handling state:
-[    3.217487]       Debug:  Masked
-[    3.219049]       SError: Masked
-[    3.220611]       IRQ:    Unmasked
-[    3.222260]       FIQ:    Masked
-[    3.223822] Architectural timer resolution: 52 ns
-[    3.226121] Drivers loaded:
-[    3.227466]       1. BCM GPIO
-[    3.228898]       2. BCM PL011 UART
-[    3.230590]       3. BCM Interrupt Controller
-[    3.232716] Registered IRQ handlers:
-[    3.234451]       Peripheral handler:
-[    3.236232]              57. BCM PL011 UART
-[    3.238269] Echoing input now
+[    1.010579] mingo version 0.13.0
+[    1.010787] Booting on: Raspberry Pi 3
+[    1.011242] MMU online. Special regions:
+[    1.011718]       0x00080000 - 0x0008ffff |  64 KiB | C   RO PX  | Kernel code and RO data
+[    1.012737]       0x3f000000 - 0x4000ffff |  16 MiB | Dev RW PXN | Device MMIO
+[    1.013625] Current privilege level: EL1
+[    1.014102] Exception handling state:
+[    1.014546]       Debug:  Masked
+[    1.014936]       SError: Masked
+[    1.015326]       IRQ:    Unmasked
+[    1.015738]       FIQ:    Masked
+[    1.016127] Architectural timer resolution: 52 ns
+[    1.016702] Drivers loaded:
+[    1.017038]       1. BCM GPIO
+[    1.017395]       2. BCM PL011 UART
+[    1.017817]       3. BCM Interrupt Controller
+[    1.018348] Registered IRQ handlers:
+[    1.018782]       Peripheral handler:
+[    1.019228]              57. BCM PL011 UART
+[    1.019735] Echoing input now
 ```
 
 Raspberry Pi 4:
@@ -717,28 +718,29 @@ Minipush 1.0
            Raspberry Pi 4
 
 [ML] Requesting binary
-[MP] ⏩ Pushing 73 KiB ========================================🦀 100% 24 KiB/s Time: 00:00:03
+[MP] ⏩ Pushing 73 KiB =========================================🦀 100% 0 KiB/s Time: 00:00:00
 [ML] Loaded! Executing the payload now
 
-[    3.486234] Booting on: Raspberry Pi 4
-[    3.486623] MMU online. Special regions:
-[    3.488532]       0x00080000 - 0x0008ffff |  64 KiB | C   RO PX  | Kernel code and RO data
-[    3.492610]       0xfe000000 - 0xff84ffff |  24 MiB | Dev RW PXN | Device MMIO
-[    3.496167] Current privilege level: EL1
-[    3.498076] Exception handling state:
-[    3.499855]       Debug:  Masked
-[    3.501417]       SError: Masked
-[    3.502979]       IRQ:    Unmasked
-[    3.504628]       FIQ:    Masked
-[    3.506189] Architectural timer resolution: 18 ns
-[    3.508489] Drivers loaded:
-[    3.509834]       1. BCM GPIO
-[    3.511266]       2. BCM PL011 UART
-[    3.512958]       3. GICv2 (ARM Generic Interrupt Controller v2)
-[    3.515908] Registered IRQ handlers:
-[    3.517643]       Peripheral handler:
-[    3.519425]             153. BCM PL011 UART
-[    3.521463] Echoing input now
+[    1.030536] mingo version 0.13.0
+[    1.030569] Booting on: Raspberry Pi 4
+[    1.031024] MMU online. Special regions:
+[    1.031501]       0x00080000 - 0x0008ffff |  64 KiB | C   RO PX  | Kernel code and RO data
+[    1.032519]       0xfe000000 - 0xff84ffff |  24 MiB | Dev RW PXN | Device MMIO
+[    1.033408] Current privilege level: EL1
+[    1.033884] Exception handling state:
+[    1.034328]       Debug:  Masked
+[    1.034718]       SError: Masked
+[    1.035108]       IRQ:    Unmasked
+[    1.035520]       FIQ:    Masked
+[    1.035910] Architectural timer resolution: 18 ns
+[    1.036484] Drivers loaded:
+[    1.036820]       1. BCM GPIO
+[    1.037178]       2. BCM PL011 UART
+[    1.037600]       3. GICv2 (ARM Generic Interrupt Controller v2)
+[    1.038337] Registered IRQ handlers:
+[    1.038770]       Peripheral handler:
+[    1.039217]             153. BCM PL011 UART
+[    1.039725] Echoing input now
 ```
 
 ## Diff to previous
@@ -747,7 +749,11 @@ Minipush 1.0
 diff -uNr 12_integrated_testing/Cargo.toml 13_exceptions_part2_peripheral_IRQs/Cargo.toml
 --- 12_integrated_testing/Cargo.toml
 +++ 13_exceptions_part2_peripheral_IRQs/Cargo.toml
-@@ -4,10 +4,8 @@
+@@ -1,13 +1,11 @@
+ [package]
+ name = "mingo"
+-version = "0.12.0"
++version = "0.13.0"
  authors = ["Andre Richter <andre.o.richter@gmail.com>"]
  edition = "2018"
 
@@ -2444,9 +2450,9 @@ diff -uNr 12_integrated_testing/src/main.rs 13_exceptions_part2_peripheral_IRQs/
      use driver::interface::DriverManager;
 +    use exception::asynchronous::interface::IRQManager;
 
+     info!("{}", libkernel::version());
      info!("Booting on: {}", bsp::board_name());
-
-@@ -76,12 +88,9 @@
+@@ -77,12 +89,9 @@
          info!("      {}. {}", i + 1, driver.compatible());
      }
 
diff --git a/13_exceptions_part2_peripheral_IRQs/src/lib.rs b/13_exceptions_part2_peripheral_IRQs/src/lib.rs
index c4e744608..3cc973299 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/lib.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/lib.rs
@@ -141,6 +141,19 @@ pub mod print;
 pub mod state;
 pub mod time;
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Version string.
+pub fn version() -> &'static str {
+    concat!(
+        env!("CARGO_PKG_NAME"),
+        " version ",
+        env!("CARGO_PKG_VERSION")
+    )
+}
+
 //--------------------------------------------------------------------------------------------------
 // Testing
 //--------------------------------------------------------------------------------------------------
diff --git a/13_exceptions_part2_peripheral_IRQs/src/main.rs b/13_exceptions_part2_peripheral_IRQs/src/main.rs
index 6ec5a670c..1dde38845 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/main.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/main.rs
@@ -63,6 +63,7 @@ fn kernel_main() -> ! {
     use driver::interface::DriverManager;
     use exception::asynchronous::interface::IRQManager;
 
+    info!("{}", libkernel::version());
     info!("Booting on: {}", bsp::board_name());
 
     info!("MMU online. Special regions:");
diff --git a/14_virtual_mem_part2_mmio_remap/Cargo.lock b/14_virtual_mem_part2_mmio_remap/Cargo.lock
index 069559203..e1591cd42 100644
--- a/14_virtual_mem_part2_mmio_remap/Cargo.lock
+++ b/14_virtual_mem_part2_mmio_remap/Cargo.lock
@@ -12,8 +12,8 @@ dependencies = [
 ]
 
 [[package]]
-name = "kernel"
-version = "0.1.0"
+name = "mingo"
+version = "0.14.0"
 dependencies = [
  "cortex-a",
  "qemu-exit",
diff --git a/14_virtual_mem_part2_mmio_remap/Cargo.toml b/14_virtual_mem_part2_mmio_remap/Cargo.toml
index 206dfc878..ad9a78151 100644
--- a/14_virtual_mem_part2_mmio_remap/Cargo.toml
+++ b/14_virtual_mem_part2_mmio_remap/Cargo.toml
@@ -1,6 +1,6 @@
 [package]
-name = "kernel"
-version = "0.1.0"
+name = "mingo"
+version = "0.14.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
 edition = "2018"
 
@@ -43,6 +43,7 @@ test = true
 # Disable unit tests for the kernel binary.
 [[bin]]
 name = "kernel"
+path = "src/main.rs"
 test = false
 
 # List of tests without harness.
diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index 4c1c940c3..95042ed3a 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -316,18 +316,19 @@ Minipush 1.0
 [MP] ⏩ Pushing 67 KiB =========================================🦀 100% 0 KiB/s Time: 00:00:00
 [ML] Loaded! Executing the payload now
 
-[    0.789721] Booting on: Raspberry Pi 3
-[    0.789994] MMU online:
-[    0.790286]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    0.792030]                         Virtual                                   Physical               Size       Attr                    Entity
-[    0.793774]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    0.795520]       0x0000_0000_0008_0000..0x0000_0000_0008_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
-[    0.797134]       0x0000_0000_0009_0000..0x0000_0000_001b_ffff --> 0x00_0009_0000..0x00_001b_ffff |   1 MiB | C   RW XN | Kernel data and bss
-[    0.798704]       0x0000_0000_001d_0000..0x0000_0000_0024_ffff --> 0x00_001d_0000..0x00_0024_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
-[    0.800307]       0x0000_0001_f000_0000..0x0000_0001_f000_ffff --> 0x00_3f20_0000..0x00_3f20_ffff |  64 KiB | Dev RW XN | BCM GPIO
-[    0.801759]                                                                                                             | BCM PL011 UART
-[    0.803276]       0x0000_0001_f001_0000..0x0000_0001_f001_ffff --> 0x00_3f00_0000..0x00_3f00_ffff |  64 KiB | Dev RW XN | BCM Peripheral Interrupt Controller
-[    0.805020]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    0.785711] mingo version 0.14.0
+[    0.785919] Booting on: Raspberry Pi 3
+[    0.786374] MMU online:
+[    0.786666]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    0.788410]                         Virtual                                   Physical               Size       Attr                    Entity
+[    0.790154]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    0.791902]       0x0000_0000_0008_0000..0x0000_0000_0008_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
+[    0.793515]       0x0000_0000_0009_0000..0x0000_0000_001b_ffff --> 0x00_0009_0000..0x00_001b_ffff |   1 MiB | C   RW XN | Kernel data and bss
+[    0.795085]       0x0000_0000_001d_0000..0x0000_0000_0024_ffff --> 0x00_001d_0000..0x00_0024_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
+[    0.796688]       0x0000_0001_f000_0000..0x0000_0001_f000_ffff --> 0x00_3f20_0000..0x00_3f20_ffff |  64 KiB | Dev RW XN | BCM GPIO
+[    0.798139]                                                                                                             | BCM PL011 UART
+[    0.799657]       0x0000_0001_f001_0000..0x0000_0001_f001_ffff --> 0x00_3f00_0000..0x00_3f00_ffff |  64 KiB | Dev RW XN | BCM Peripheral Interrupt Controller
+[    0.801400]       -------------------------------------------------------------------------------------------------------------------------------------------
 ```
 
 Raspberry Pi 4:
@@ -351,24 +352,37 @@ Minipush 1.0
 [MP] ⏩ Pushing 74 KiB =========================================🦀 100% 0 KiB/s Time: 00:00:00
 [ML] Loaded! Executing the payload now
 
-[    0.870371] Booting on: Raspberry Pi 4
-[    0.870470] MMU online:
-[    0.870763]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    0.872507]                         Virtual                                   Physical               Size       Attr                    Entity
-[    0.874251]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    0.875996]       0x0000_0000_0008_0000..0x0000_0000_0008_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
-[    0.877611]       0x0000_0000_0009_0000..0x0000_0000_001b_ffff --> 0x00_0009_0000..0x00_001b_ffff |   1 MiB | C   RW XN | Kernel data and bss
-[    0.879181]       0x0000_0000_001d_0000..0x0000_0000_0024_ffff --> 0x00_001d_0000..0x00_0024_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
-[    0.880784]       0x0000_0001_f000_0000..0x0000_0001_f000_ffff --> 0x00_fe20_0000..0x00_fe20_ffff |  64 KiB | Dev RW XN | BCM GPIO
-[    0.882235]                                                                                                             | BCM PL011 UART
-[    0.883752]       0x0000_0001_f001_0000..0x0000_0001_f001_ffff --> 0x00_ff84_0000..0x00_ff84_ffff |  64 KiB | Dev RW XN | GICD
-[    0.885160]                                                                                                             | GICC
-[    0.886569]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    0.869392] mingo version 0.14.0
+[    0.869425] Booting on: Raspberry Pi 4
+[    0.869880] MMU online:
+[    0.870173]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    0.871917]                         Virtual                                   Physical               Size       Attr                    Entity
+[    0.873661]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    0.875407]       0x0000_0000_0008_0000..0x0000_0000_0008_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
+[    0.877021]       0x0000_0000_0009_0000..0x0000_0000_001b_ffff --> 0x00_0009_0000..0x00_001b_ffff |   1 MiB | C   RW XN | Kernel data and bss
+[    0.878591]       0x0000_0000_001d_0000..0x0000_0000_0024_ffff --> 0x00_001d_0000..0x00_0024_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
+[    0.880195]       0x0000_0001_f000_0000..0x0000_0001_f000_ffff --> 0x00_fe20_0000..0x00_fe20_ffff |  64 KiB | Dev RW XN | BCM GPIO
+[    0.881645]                                                                                                             | BCM PL011 UART
+[    0.883163]       0x0000_0001_f001_0000..0x0000_0001_f001_ffff --> 0x00_ff84_0000..0x00_ff84_ffff |  64 KiB | Dev RW XN | GICD
+[    0.884570]                                                                                                             | GICC
+[    0.885979]       -------------------------------------------------------------------------------------------------------------------------------------------
 ```
 
 ## Diff to previous
 ```diff
 
+diff -uNr 13_exceptions_part2_peripheral_IRQs/Cargo.toml 14_virtual_mem_part2_mmio_remap/Cargo.toml
+--- 13_exceptions_part2_peripheral_IRQs/Cargo.toml
++++ 14_virtual_mem_part2_mmio_remap/Cargo.toml
+@@ -1,6 +1,6 @@
+ [package]
+ name = "mingo"
+-version = "0.13.0"
++version = "0.14.0"
+ authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+ edition = "2018"
+
+
 diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
 --- 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
 +++ 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
@@ -2184,8 +2198,8 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/main.rs 14_virtual_mem_part2_m
 
      // Let device drivers register and enable their handlers with the interrupt controller.
      for i in bsp::driver::driver_manager().all_device_drivers() {
-@@ -65,8 +83,8 @@
-
+@@ -66,8 +84,8 @@
+     info!("{}", libkernel::version());
      info!("Booting on: {}", bsp::board_name());
 
 -    info!("MMU online. Special regions:");
diff --git a/14_virtual_mem_part2_mmio_remap/src/lib.rs b/14_virtual_mem_part2_mmio_remap/src/lib.rs
index 3346134ad..afa495060 100644
--- a/14_virtual_mem_part2_mmio_remap/src/lib.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/lib.rs
@@ -144,6 +144,19 @@ pub mod print;
 pub mod state;
 pub mod time;
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Version string.
+pub fn version() -> &'static str {
+    concat!(
+        env!("CARGO_PKG_NAME"),
+        " version ",
+        env!("CARGO_PKG_VERSION")
+    )
+}
+
 //--------------------------------------------------------------------------------------------------
 // Testing
 //--------------------------------------------------------------------------------------------------
diff --git a/14_virtual_mem_part2_mmio_remap/src/main.rs b/14_virtual_mem_part2_mmio_remap/src/main.rs
index 0dd1c28d2..3052db666 100644
--- a/14_virtual_mem_part2_mmio_remap/src/main.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/main.rs
@@ -81,6 +81,7 @@ fn kernel_main() -> ! {
     use driver::interface::DriverManager;
     use exception::asynchronous::interface::IRQManager;
 
+    info!("{}", libkernel::version());
     info!("Booting on: {}", bsp::board_name());
 
     info!("MMU online:");
diff --git a/15_virtual_mem_part3_precomputed_tables/Cargo.lock b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
index 069559203..62c78322e 100644
--- a/15_virtual_mem_part3_precomputed_tables/Cargo.lock
+++ b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
@@ -12,8 +12,8 @@ dependencies = [
 ]
 
 [[package]]
-name = "kernel"
-version = "0.1.0"
+name = "mingo"
+version = "0.15.0"
 dependencies = [
  "cortex-a",
  "qemu-exit",
diff --git a/15_virtual_mem_part3_precomputed_tables/Cargo.toml b/15_virtual_mem_part3_precomputed_tables/Cargo.toml
index 206dfc878..4449da657 100644
--- a/15_virtual_mem_part3_precomputed_tables/Cargo.toml
+++ b/15_virtual_mem_part3_precomputed_tables/Cargo.toml
@@ -1,6 +1,6 @@
 [package]
-name = "kernel"
-version = "0.1.0"
+name = "mingo"
+version = "0.15.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
 edition = "2018"
 
@@ -43,6 +43,7 @@ test = true
 # Disable unit tests for the kernel binary.
 [[bin]]
 name = "kernel"
+path = "src/main.rs"
 test = false
 
 # List of tests without harness.
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index 5329426a0..459b65d25 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -743,23 +743,36 @@ Minipush 1.0
 [MP] ⏩ Pushing 387 KiB =======================================🦀 100% 96 KiB/s Time: 00:00:04
 [ML] Loaded! Executing the payload now
 
-[    4.319874] Booting on: Raspberry Pi 3
-[    4.320147] MMU online:
-[    4.320439]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    4.322183]                         Virtual                                   Physical               Size       Attr                    Entity
-[    4.323927]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    4.325674]       0x0000_0000_0008_0000..0x0000_0000_0008_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
-[    4.327288]       0x0000_0000_0009_0000..0x0000_0000_000e_ffff --> 0x00_0009_0000..0x00_000e_ffff | 384 KiB | C   RW XN | Kernel data and bss
-[    4.328858]       0x0000_0000_0010_0000..0x0000_0000_0017_ffff --> 0x00_0010_0000..0x00_0017_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
-[    4.330461]       0x0000_0000_7000_0000..0x0000_0000_7000_ffff --> 0x00_3f20_0000..0x00_3f20_ffff |  64 KiB | Dev RW XN | BCM GPIO
-[    4.331912]                                                                                                             | BCM PL011 UART
-[    4.333430]       0x0000_0000_7001_0000..0x0000_0000_7001_ffff --> 0x00_3f00_0000..0x00_3f00_ffff |  64 KiB | Dev RW XN | BCM Peripheral Interrupt Controller
-[    4.335173]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    4.324361] mingo version 0.15.0
+[    4.324568] Booting on: Raspberry Pi 3
+[    4.325023] MMU online:
+[    4.325316]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    4.327060]                         Virtual                                   Physical               Size       Attr                    Entity
+[    4.328804]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    4.330551]       0x0000_0000_0008_0000..0x0000_0000_0008_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
+[    4.332164]       0x0000_0000_0009_0000..0x0000_0000_000e_ffff --> 0x00_0009_0000..0x00_000e_ffff | 384 KiB | C   RW XN | Kernel data and bss
+[    4.333735]       0x0000_0000_0010_0000..0x0000_0000_0017_ffff --> 0x00_0010_0000..0x00_0017_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
+[    4.335338]       0x0000_0000_7000_0000..0x0000_0000_7000_ffff --> 0x00_3f20_0000..0x00_3f20_ffff |  64 KiB | Dev RW XN | BCM GPIO
+[    4.336788]                                                                                                             | BCM PL011 UART
+[    4.338306]       0x0000_0000_7001_0000..0x0000_0000_7001_ffff --> 0x00_3f00_0000..0x00_3f00_ffff |  64 KiB | Dev RW XN | BCM Peripheral Interrupt Controller
+[    4.340050]       -------------------------------------------------------------------------------------------------------------------------------------------
 ```
 
 ## Diff to previous
 ```diff
 
+diff -uNr 14_virtual_mem_part2_mmio_remap/Cargo.toml 15_virtual_mem_part3_precomputed_tables/Cargo.toml
+--- 14_virtual_mem_part2_mmio_remap/Cargo.toml
++++ 15_virtual_mem_part3_precomputed_tables/Cargo.toml
+@@ -1,6 +1,6 @@
+ [package]
+ name = "mingo"
+-version = "0.14.0"
++version = "0.15.0"
+ authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+ edition = "2018"
+
+
 diff -uNr 14_virtual_mem_part2_mmio_remap/Makefile 15_virtual_mem_part3_precomputed_tables/Makefile
 --- 14_virtual_mem_part2_mmio_remap/Makefile
 +++ 15_virtual_mem_part3_precomputed_tables/Makefile
diff --git a/15_virtual_mem_part3_precomputed_tables/src/lib.rs b/15_virtual_mem_part3_precomputed_tables/src/lib.rs
index 3346134ad..afa495060 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/lib.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/lib.rs
@@ -144,6 +144,19 @@ pub mod print;
 pub mod state;
 pub mod time;
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Version string.
+pub fn version() -> &'static str {
+    concat!(
+        env!("CARGO_PKG_NAME"),
+        " version ",
+        env!("CARGO_PKG_VERSION")
+    )
+}
+
 //--------------------------------------------------------------------------------------------------
 // Testing
 //--------------------------------------------------------------------------------------------------
diff --git a/15_virtual_mem_part3_precomputed_tables/src/main.rs b/15_virtual_mem_part3_precomputed_tables/src/main.rs
index c317bb96f..421dcbec2 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/main.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/main.rs
@@ -72,6 +72,7 @@ fn kernel_main() -> ! {
     use driver::interface::DriverManager;
     use exception::asynchronous::interface::IRQManager;
 
+    info!("{}", libkernel::version());
     info!("Booting on: {}", bsp::board_name());
 
     info!("MMU online:");
diff --git a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
index 069559203..ba2e9eb5b 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
+++ b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
@@ -12,8 +12,8 @@ dependencies = [
 ]
 
 [[package]]
-name = "kernel"
-version = "0.1.0"
+name = "mingo"
+version = "0.16.0"
 dependencies = [
  "cortex-a",
  "qemu-exit",
diff --git a/16_virtual_mem_part4_higher_half_kernel/Cargo.toml b/16_virtual_mem_part4_higher_half_kernel/Cargo.toml
index 206dfc878..f7147ecd3 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Cargo.toml
+++ b/16_virtual_mem_part4_higher_half_kernel/Cargo.toml
@@ -1,6 +1,6 @@
 [package]
-name = "kernel"
-version = "0.1.0"
+name = "mingo"
+version = "0.16.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
 edition = "2018"
 
@@ -43,6 +43,7 @@ test = true
 # Disable unit tests for the kernel binary.
 [[bin]]
 name = "kernel"
+path = "src/main.rs"
 test = false
 
 # List of tests without harness.
diff --git a/16_virtual_mem_part4_higher_half_kernel/README.md b/16_virtual_mem_part4_higher_half_kernel/README.md
index ddce63fc5..4f7014423 100644
--- a/16_virtual_mem_part4_higher_half_kernel/README.md
+++ b/16_virtual_mem_part4_higher_half_kernel/README.md
@@ -163,18 +163,19 @@ Minipush 1.0
 [MP] ⏩ Pushing 387 KiB =======================================🦀 100% 96 KiB/s Time: 00:00:04
 [ML] Loaded! Executing the payload now
 
-[    4.320829] Booting on: Raspberry Pi 3
-[    4.321102] MMU online:
-[    4.321394]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    4.323138]                         Virtual                                   Physical               Size       Attr                    Entity
-[    4.324882]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    4.326629]       0xffff_ffff_8008_0000..0xffff_ffff_8008_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
-[    4.328243]       0xffff_ffff_8009_0000..0xffff_ffff_800e_ffff --> 0x00_0009_0000..0x00_000e_ffff | 384 KiB | C   RW XN | Kernel data and bss
-[    4.329813]       0xffff_ffff_8010_0000..0xffff_ffff_8017_ffff --> 0x00_0010_0000..0x00_0017_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
-[    4.331416]       0xffff_ffff_f000_0000..0xffff_ffff_f000_ffff --> 0x00_3f20_0000..0x00_3f20_ffff |  64 KiB | Dev RW XN | BCM GPIO
-[    4.332867]                                                                                                             | BCM PL011 UART
-[    4.334385]       0xffff_ffff_f001_0000..0xffff_ffff_f001_ffff --> 0x00_3f00_0000..0x00_3f00_ffff |  64 KiB | Dev RW XN | BCM Peripheral Interrupt Controller
-[    4.336128]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    4.316420] mingo version 0.16.0
+[    4.316627] Booting on: Raspberry Pi 3
+[    4.317082] MMU online:
+[    4.317375]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    4.319119]                         Virtual                                   Physical               Size       Attr                    Entity
+[    4.320863]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    4.322610]       0xffff_ffff_8008_0000..0xffff_ffff_8008_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
+[    4.324223]       0xffff_ffff_8009_0000..0xffff_ffff_800e_ffff --> 0x00_0009_0000..0x00_000e_ffff | 384 KiB | C   RW XN | Kernel data and bss
+[    4.325793]       0xffff_ffff_8010_0000..0xffff_ffff_8017_ffff --> 0x00_0010_0000..0x00_0017_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
+[    4.327397]       0xffff_ffff_f000_0000..0xffff_ffff_f000_ffff --> 0x00_3f20_0000..0x00_3f20_ffff |  64 KiB | Dev RW XN | BCM GPIO
+[    4.328847]                                                                                                             | BCM PL011 UART
+[    4.330365]       0xffff_ffff_f001_0000..0xffff_ffff_f001_ffff --> 0x00_3f00_0000..0x00_3f00_ffff |  64 KiB | Dev RW XN | BCM Peripheral Interrupt Controller
+[    4.332108]       -------------------------------------------------------------------------------------------------------------------------------------------
 ```
 
 Raspberry Pi 4:
@@ -211,24 +212,37 @@ Minipush 1.0
 [MP] ⏩ Pushing 449 KiB ======================================🦀 100% 112 KiB/s Time: 00:00:04
 [ML] Loaded! Executing the payload now
 
-[    5.011490] Booting on: Raspberry Pi 4
-[    5.011588] MMU online:
-[    5.011881]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    5.013625]                         Virtual                                   Physical               Size       Attr                    Entity
-[    5.015369]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    5.017115]       0xffff_ffff_8008_0000..0xffff_ffff_8008_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
-[    5.018730]       0xffff_ffff_8009_0000..0xffff_ffff_800f_ffff --> 0x00_0009_0000..0x00_000f_ffff | 448 KiB | C   RW XN | Kernel data and bss
-[    5.020299]       0xffff_ffff_8011_0000..0xffff_ffff_8018_ffff --> 0x00_0011_0000..0x00_0018_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
-[    5.021903]       0xffff_ffff_f000_0000..0xffff_ffff_f000_ffff --> 0x00_fe20_0000..0x00_fe20_ffff |  64 KiB | Dev RW XN | BCM GPIO
-[    5.023354]                                                                                                             | BCM PL011 UART
-[    5.024871]       0xffff_ffff_f001_0000..0xffff_ffff_f001_ffff --> 0x00_ff84_0000..0x00_ff84_ffff |  64 KiB | Dev RW XN | GICD
-[    5.026279]                                                                                                             | GICC
-[    5.027687]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    5.009551] mingo version 0.16.0
+[    5.009585] Booting on: Raspberry Pi 4
+[    5.010040] MMU online:
+[    5.010332]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    5.012077]                         Virtual                                   Physical               Size       Attr                    Entity
+[    5.013821]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    5.015566]       0xffff_ffff_8008_0000..0xffff_ffff_8008_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
+[    5.017181]       0xffff_ffff_8009_0000..0xffff_ffff_800f_ffff --> 0x00_0009_0000..0x00_000f_ffff | 448 KiB | C   RW XN | Kernel data and bss
+[    5.018751]       0xffff_ffff_8011_0000..0xffff_ffff_8018_ffff --> 0x00_0011_0000..0x00_0018_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
+[    5.020354]       0xffff_ffff_f000_0000..0xffff_ffff_f000_ffff --> 0x00_fe20_0000..0x00_fe20_ffff |  64 KiB | Dev RW XN | BCM GPIO
+[    5.021805]                                                                                                             | BCM PL011 UART
+[    5.023322]       0xffff_ffff_f001_0000..0xffff_ffff_f001_ffff --> 0x00_ff84_0000..0x00_ff84_ffff |  64 KiB | Dev RW XN | GICD
+[    5.024730]                                                                                                             | GICC
+[    5.026138]       -------------------------------------------------------------------------------------------------------------------------------------------
 ```
 
 ## Diff to previous
 ```diff
 
+diff -uNr 15_virtual_mem_part3_precomputed_tables/Cargo.toml 16_virtual_mem_part4_higher_half_kernel/Cargo.toml
+--- 15_virtual_mem_part3_precomputed_tables/Cargo.toml
++++ 16_virtual_mem_part4_higher_half_kernel/Cargo.toml
+@@ -1,6 +1,6 @@
+ [package]
+ name = "mingo"
+-version = "0.15.0"
++version = "0.16.0"
+ authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+ edition = "2018"
+
+
 diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs
 --- 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
 +++ 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/lib.rs b/16_virtual_mem_part4_higher_half_kernel/src/lib.rs
index 3346134ad..afa495060 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/lib.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/lib.rs
@@ -144,6 +144,19 @@ pub mod print;
 pub mod state;
 pub mod time;
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Version string.
+pub fn version() -> &'static str {
+    concat!(
+        env!("CARGO_PKG_NAME"),
+        " version ",
+        env!("CARGO_PKG_VERSION")
+    )
+}
+
 //--------------------------------------------------------------------------------------------------
 // Testing
 //--------------------------------------------------------------------------------------------------
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/main.rs b/16_virtual_mem_part4_higher_half_kernel/src/main.rs
index c317bb96f..421dcbec2 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/main.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/main.rs
@@ -72,6 +72,7 @@ fn kernel_main() -> ! {
     use driver::interface::DriverManager;
     use exception::asynchronous::interface::IRQManager;
 
+    info!("{}", libkernel::version());
     info!("Booting on: {}", bsp::board_name());
 
     info!("MMU online:");
diff --git a/X1_JTAG_boot/Cargo.lock b/X1_JTAG_boot/Cargo.lock
index a3d8bb9ae..011adc0f3 100644
--- a/X1_JTAG_boot/Cargo.lock
+++ b/X1_JTAG_boot/Cargo.lock
@@ -12,8 +12,8 @@ dependencies = [
 ]
 
 [[package]]
-name = "kernel"
-version = "0.1.0"
+name = "mingo"
+version = "0.8.0"
 dependencies = [
  "cortex-a",
  "register",
diff --git a/X1_JTAG_boot/Cargo.toml b/X1_JTAG_boot/Cargo.toml
index df5f7f974..e84540cac 100644
--- a/X1_JTAG_boot/Cargo.toml
+++ b/X1_JTAG_boot/Cargo.toml
@@ -1,6 +1,6 @@
 [package]
-name = "kernel"
-version = "0.1.0"
+name = "mingo"
+version = "0.8.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
 edition = "2018"
 
@@ -12,6 +12,10 @@ default = []
 bsp_rpi3 = ["register"]
 bsp_rpi4 = ["register"]
 
+[[bin]]
+name = "kernel"
+path = "src/main.rs"
+
 ##--------------------------------------------------------------------------------------------------
 ## Dependencies
 ##--------------------------------------------------------------------------------------------------
diff --git a/X1_JTAG_boot/jtag_boot_rpi3.img b/X1_JTAG_boot/jtag_boot_rpi3.img
index 53be6bb3a5207dad2a75a526053ad11b367272c0..30ce719cf6080dcd104be8b5465aa8aa91e66e95 100755
GIT binary patch
delta 2281
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From d296ad4aa4eacfe13c68e13bbf28e6d602459db8 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sun, 4 Apr 2021 22:41:55 +0200
Subject: [PATCH 058/214] Minor fixes

---
 01_wait_forever/README.md                           | 2 +-
 02_runtime_init/Cargo.toml                          | 1 -
 02_runtime_init/README.md                           | 3 +--
 03_hacky_hello_world/Cargo.toml                     | 1 -
 04_safe_globals/Cargo.toml                          | 1 -
 05_drivers_gpio_uart/Cargo.toml                     | 1 -
 06_uart_chainloader/Cargo.toml                      | 1 -
 07_timestamps/Cargo.toml                            | 1 -
 08_hw_debug_JTAG/Cargo.toml                         | 1 -
 09_privilege_level/Cargo.toml                       | 1 -
 10_virtual_mem_part1_identity_mapping/Cargo.toml    | 1 -
 11_exceptions_part1_groundwork/Cargo.toml           | 1 -
 12_integrated_testing/Cargo.toml                    | 2 +-
 12_integrated_testing/README.md                     | 6 +++---
 13_exceptions_part2_peripheral_IRQs/README.md       | 6 +++---
 14_virtual_mem_part2_mmio_remap/README.md           | 2 +-
 15_virtual_mem_part3_precomputed_tables/README.md   | 9 +++++++--
 15_virtual_mem_part3_precomputed_tables/src/main.rs | 2 ++
 16_virtual_mem_part4_higher_half_kernel/src/main.rs | 2 ++
 X1_JTAG_boot/Cargo.toml                             | 1 -
 20 files changed, 21 insertions(+), 24 deletions(-)

diff --git a/01_wait_forever/README.md b/01_wait_forever/README.md
index bf214b68f..9c6eaf762 100644
--- a/01_wait_forever/README.md
+++ b/01_wait_forever/README.md
@@ -18,7 +18,7 @@
 
 ## Code to look at
 
-- Custom `link.ld` linker script.
+- `BSP`-specific `link.ld` linker script.
     - Load address at `0x8_0000`
     - Only `.text` section.
 - `main.rs`: Important [inner attributes]:
diff --git a/02_runtime_init/Cargo.toml b/02_runtime_init/Cargo.toml
index be6091a4d..69f9f06d6 100644
--- a/02_runtime_init/Cargo.toml
+++ b/02_runtime_init/Cargo.toml
@@ -25,4 +25,3 @@ path = "src/main.rs"
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
 cortex-a = { version = "5.x.x" }
-
diff --git a/02_runtime_init/README.md b/02_runtime_init/README.md
index dfa43562a..5cba10fb3 100644
--- a/02_runtime_init/README.md
+++ b/02_runtime_init/README.md
@@ -39,7 +39,7 @@ diff -uNr 01_wait_forever/Cargo.toml 02_runtime_init/Cargo.toml
  authors = ["Andre Richter <andre.o.richter@gmail.com>"]
  edition = "2018"
 
-@@ -21,3 +21,8 @@
+@@ -21,3 +21,7 @@
  ##--------------------------------------------------------------------------------------------------
 
  [dependencies]
@@ -47,7 +47,6 @@ diff -uNr 01_wait_forever/Cargo.toml 02_runtime_init/Cargo.toml
 +# Platform specific dependencies
 +[target.'cfg(target_arch = "aarch64")'.dependencies]
 +cortex-a = { version = "5.x.x" }
-+
 
 diff -uNr 01_wait_forever/Makefile 02_runtime_init/Makefile
 --- 01_wait_forever/Makefile
diff --git a/03_hacky_hello_world/Cargo.toml b/03_hacky_hello_world/Cargo.toml
index 6ed23060e..ffe9206f2 100644
--- a/03_hacky_hello_world/Cargo.toml
+++ b/03_hacky_hello_world/Cargo.toml
@@ -25,4 +25,3 @@ path = "src/main.rs"
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
 cortex-a = { version = "5.x.x" }
-
diff --git a/04_safe_globals/Cargo.toml b/04_safe_globals/Cargo.toml
index 16e4741df..fc077af93 100644
--- a/04_safe_globals/Cargo.toml
+++ b/04_safe_globals/Cargo.toml
@@ -25,4 +25,3 @@ path = "src/main.rs"
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
 cortex-a = { version = "5.x.x" }
-
diff --git a/05_drivers_gpio_uart/Cargo.toml b/05_drivers_gpio_uart/Cargo.toml
index 03ec9cdb9..05abef4d4 100644
--- a/05_drivers_gpio_uart/Cargo.toml
+++ b/05_drivers_gpio_uart/Cargo.toml
@@ -28,4 +28,3 @@ register = { version = "1.x.x", optional = true }
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
 cortex-a = { version = "5.x.x" }
-
diff --git a/06_uart_chainloader/Cargo.toml b/06_uart_chainloader/Cargo.toml
index 0e1c5c28f..f3b9ba2f9 100644
--- a/06_uart_chainloader/Cargo.toml
+++ b/06_uart_chainloader/Cargo.toml
@@ -28,4 +28,3 @@ register = { version = "1.x.x", optional = true }
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
 cortex-a = { version = "5.x.x" }
-
diff --git a/07_timestamps/Cargo.toml b/07_timestamps/Cargo.toml
index 07aa05171..8d97be1f1 100644
--- a/07_timestamps/Cargo.toml
+++ b/07_timestamps/Cargo.toml
@@ -28,4 +28,3 @@ register = { version = "1.x.x", optional = true }
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
 cortex-a = { version = "5.x.x" }
-
diff --git a/08_hw_debug_JTAG/Cargo.toml b/08_hw_debug_JTAG/Cargo.toml
index e84540cac..7b1adb5b3 100644
--- a/08_hw_debug_JTAG/Cargo.toml
+++ b/08_hw_debug_JTAG/Cargo.toml
@@ -28,4 +28,3 @@ register = { version = "1.x.x", optional = true }
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
 cortex-a = { version = "5.x.x" }
-
diff --git a/09_privilege_level/Cargo.toml b/09_privilege_level/Cargo.toml
index f6750ed49..7af3572f6 100644
--- a/09_privilege_level/Cargo.toml
+++ b/09_privilege_level/Cargo.toml
@@ -28,4 +28,3 @@ register = { version = "1.x.x", optional = true }
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
 cortex-a = { version = "5.x.x" }
-
diff --git a/10_virtual_mem_part1_identity_mapping/Cargo.toml b/10_virtual_mem_part1_identity_mapping/Cargo.toml
index 8e54f2cdb..9d47f28da 100644
--- a/10_virtual_mem_part1_identity_mapping/Cargo.toml
+++ b/10_virtual_mem_part1_identity_mapping/Cargo.toml
@@ -28,4 +28,3 @@ register = { version = "1.x.x", optional = true }
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
 cortex-a = { version = "5.x.x" }
-
diff --git a/11_exceptions_part1_groundwork/Cargo.toml b/11_exceptions_part1_groundwork/Cargo.toml
index 764939bf2..2f6683e5a 100644
--- a/11_exceptions_part1_groundwork/Cargo.toml
+++ b/11_exceptions_part1_groundwork/Cargo.toml
@@ -28,4 +28,3 @@ register = { version = "1.x.x", optional = true }
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
 cortex-a = { version = "5.x.x" }
-
diff --git a/12_integrated_testing/Cargo.toml b/12_integrated_testing/Cargo.toml
index 4bb92ff47..d59d58176 100644
--- a/12_integrated_testing/Cargo.toml
+++ b/12_integrated_testing/Cargo.toml
@@ -4,7 +4,7 @@ version = "0.12.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
 edition = "2018"
 
-# TODO: Fixme
+# TODO: FIXME
 # LTO seems to kill the console integration test (empty text section). Disable until a fix is found.
 [profile.release]
 lto = false
diff --git a/12_integrated_testing/README.md b/12_integrated_testing/README.md
index 4a5940d1a..c49f83614 100644
--- a/12_integrated_testing/README.md
+++ b/12_integrated_testing/README.md
@@ -818,7 +818,7 @@ diff -uNr 11_exceptions_part1_groundwork/.cargo/config.toml 12_integrated_testin
 diff -uNr 11_exceptions_part1_groundwork/Cargo.toml 12_integrated_testing/Cargo.toml
 --- 11_exceptions_part1_groundwork/Cargo.toml
 +++ 12_integrated_testing/Cargo.toml
-@@ -1,31 +1,58 @@
+@@ -1,30 +1,58 @@
  [package]
  name = "mingo"
 -version = "0.11.0"
@@ -826,7 +826,7 @@ diff -uNr 11_exceptions_part1_groundwork/Cargo.toml 12_integrated_testing/Cargo.
  authors = ["Andre Richter <andre.o.richter@gmail.com>"]
  edition = "2018"
 
-+# TODO: Fixme
++# TODO: FIXME
 +# LTO seems to kill the console integration test (empty text section). Disable until a fix is found.
  [profile.release]
 -lto = true
@@ -857,7 +857,7 @@ diff -uNr 11_exceptions_part1_groundwork/Cargo.toml 12_integrated_testing/Cargo.
  # Platform specific dependencies
  [target.'cfg(target_arch = "aarch64")'.dependencies]
  cortex-a = { version = "5.x.x" }
-
++
 +##--------------------------------------------------------------------------------------------------
 +## Testing
 +##--------------------------------------------------------------------------------------------------
diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index 4cb82c6b4..6da5a0750 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -2,8 +2,8 @@
 
 ## tl;dr
 
-- We write `device drivers` for the two interrupt controllers on the **Raspberry Pi 3** (Broadcom
-  custom controller) and **Pi 4** (ARM Generic Interrupt Controller v2, `GICv2`).
+- We write `device drivers` for the two interrupt controllers on the **Raspberry Pi 3** (`Broadcom`
+  custom controller) and **Pi 4** (`ARM` Generic Interrupt Controller v2, `GICv2`).
 - Modularity is ensured by interfacing everything through a trait named `IRQManager`.
 - Handling for our first peripheral IRQs is implemented: The `UART`'s receive IRQs.
 
@@ -757,7 +757,7 @@ diff -uNr 12_integrated_testing/Cargo.toml 13_exceptions_part2_peripheral_IRQs/C
  authors = ["Andre Richter <andre.o.richter@gmail.com>"]
  edition = "2018"
 
--# TODO: Fixme
+-# TODO: FIXME
 -# LTO seems to kill the console integration test (empty text section). Disable until a fix is found.
  [profile.release]
 -lto = false
diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index 95042ed3a..3f0651022 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -2,7 +2,7 @@
 
 ## tl;dr
 
-- We introduce a first set of changes which we eventually need for separating `kernel` and `user`
+- We introduce a first set of changes which is eventually needed for separating `kernel` and `user`
   address spaces.
 - The memory mapping strategy gets more sophisticated as we do away with `identity mapping` the
   whole of the board's address space.
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index 459b65d25..fab278160 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -1274,7 +1274,12 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs 15_v
 diff -uNr 14_virtual_mem_part2_mmio_remap/src/main.rs 15_virtual_mem_part3_precomputed_tables/src/main.rs
 --- 14_virtual_mem_part2_mmio_remap/src/main.rs
 +++ 15_virtual_mem_part3_precomputed_tables/src/main.rs
-@@ -18,25 +18,16 @@
+@@ -15,28 +15,21 @@
+
+ /// Early init code.
+ ///
++/// When this code runs, virtual memory is already enabled.
++///
  /// # Safety
  ///
  /// - Only a single core must be active and running this function.
@@ -1304,7 +1309,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/main.rs 15_virtual_mem_part3_preco
 
      // Bring up the drivers needed for printing first.
      for i in bsp::driver::driver_manager()
-@@ -47,7 +38,7 @@
+@@ -47,7 +40,7 @@
          i.init().unwrap_or_else(|_| cpu::wait_forever());
      }
      bsp::driver::driver_manager().post_early_print_device_driver_init();
diff --git a/15_virtual_mem_part3_precomputed_tables/src/main.rs b/15_virtual_mem_part3_precomputed_tables/src/main.rs
index 421dcbec2..9ecba1e7e 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/main.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/main.rs
@@ -15,6 +15,8 @@ use libkernel::{bsp, cpu, driver, exception, info, memory, state, time, warn};
 
 /// Early init code.
 ///
+/// When this code runs, virtual memory is already enabled.
+///
 /// # Safety
 ///
 /// - Only a single core must be active and running this function.
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/main.rs b/16_virtual_mem_part4_higher_half_kernel/src/main.rs
index 421dcbec2..9ecba1e7e 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/main.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/main.rs
@@ -15,6 +15,8 @@ use libkernel::{bsp, cpu, driver, exception, info, memory, state, time, warn};
 
 /// Early init code.
 ///
+/// When this code runs, virtual memory is already enabled.
+///
 /// # Safety
 ///
 /// - Only a single core must be active and running this function.
diff --git a/X1_JTAG_boot/Cargo.toml b/X1_JTAG_boot/Cargo.toml
index e84540cac..7b1adb5b3 100644
--- a/X1_JTAG_boot/Cargo.toml
+++ b/X1_JTAG_boot/Cargo.toml
@@ -28,4 +28,3 @@ register = { version = "1.x.x", optional = true }
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
 cortex-a = { version = "5.x.x" }
-

From ee76b2226e733a25567cd0d72e76edba8c2d3f02 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sun, 4 Apr 2021 22:56:03 +0200
Subject: [PATCH 059/214] typo

---
 15_virtual_mem_part3_precomputed_tables/README.md | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index fab278160..bb9a50bb6 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -144,9 +144,9 @@ executing from.
 
 Without going in too much detail, what the instruction basically does is: It retrieves the `4 KiB`
 page address that belongs to the program counter's (PC) current position (PC is at `0x8_0010`, so
-the page address is `0x8_0000`), and adds adds `0x1_0000`. So after the `ADRP` instruction, register
-`x0` holds the value `0x9_0000`. To this value, `8` is added in the next instruction, resulting in
-the overall address of `0x9_0008`, which is exactly where `global_data_word` is located. This works,
+the page address is `0x8_0000`), and adds `0x1_0000`. So after the `ADRP` instruction, register `x0`
+holds the value `0x9_0000`. To this value, `8` is added in the next instruction, resulting in the
+overall address of `0x9_0008`, which is exactly where `global_data_word` is located. This works,
 because after linking a `static executable binary` like we do since `tutorial 01`, relative
 positions of code and data are fixed, and not supposed to change during runtime.
 
@@ -155,9 +155,6 @@ positions of code and data are fixed, and not supposed to change during runtime.
 If the Raspberry's firmware now loads this binary at address `0x8_0000`, as always, we can be sure
 that our function returns the correct address of our global data word.
 
-> So far, all looks good, doesn't it? However, this was a lot to digest already, and we're far from
-> finished. So take a minute or two and clear your mind before we continue. 🧘
-
 Now lets link this to the most significant area of memory:
 
 ```lds
@@ -288,6 +285,9 @@ What we need is called [position-independent code].
 
 [position-independent code]: https://en.wikipedia.org/wiki/Position-independent_code
 
+> Much low-level stuff in this tutorial, isn't it? This was a lot to digest already, but we're far
+> from finished. So take a minute or two and clear your mind before we continue. 🧘
+
 ## Position-Independent Code (PIC)
 
 As describend by Wikipedia, position-independent code

From b41865179868fd7544b1aafec57135bf22b0577c Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sun, 4 Apr 2021 23:02:48 +0200
Subject: [PATCH 060/214] Update dependencies

---
 12_integrated_testing/Cargo.lock                   | 8 ++++----
 13_exceptions_part2_peripheral_IRQs/Cargo.lock     | 8 ++++----
 14_virtual_mem_part2_mmio_remap/Cargo.lock         | 8 ++++----
 15_virtual_mem_part3_precomputed_tables/Cargo.lock | 8 ++++----
 16_virtual_mem_part4_higher_half_kernel/Cargo.lock | 8 ++++----
 5 files changed, 20 insertions(+), 20 deletions(-)

diff --git a/12_integrated_testing/Cargo.lock b/12_integrated_testing/Cargo.lock
index 9dac661b5..009654700 100644
--- a/12_integrated_testing/Cargo.lock
+++ b/12_integrated_testing/Cargo.lock
@@ -24,9 +24,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.24"
+version = "1.0.26"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "1e0704ee1a7e00d7bb417d0770ea303c1bccbabf0ef1667dae92b5967f5f8a71"
+checksum = "a152013215dca273577e18d2bf00fa862b89b24169fb78c4c95aeb07992c9cec"
 dependencies = [
  "unicode-xid",
 ]
@@ -57,9 +57,9 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.62"
+version = "1.0.68"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "123a78a3596b24fee53a6464ce52d8ecbf62241e6294c7e7fe12086cd161f512"
+checksum = "3ce15dd3ed8aa2f8eeac4716d6ef5ab58b6b9256db41d7e1a0224c2788e8fd87"
 dependencies = [
  "proc-macro2",
  "quote",
diff --git a/13_exceptions_part2_peripheral_IRQs/Cargo.lock b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
index 922341af2..ed9501003 100644
--- a/13_exceptions_part2_peripheral_IRQs/Cargo.lock
+++ b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
@@ -24,9 +24,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.24"
+version = "1.0.26"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "1e0704ee1a7e00d7bb417d0770ea303c1bccbabf0ef1667dae92b5967f5f8a71"
+checksum = "a152013215dca273577e18d2bf00fa862b89b24169fb78c4c95aeb07992c9cec"
 dependencies = [
  "unicode-xid",
 ]
@@ -57,9 +57,9 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.62"
+version = "1.0.68"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "123a78a3596b24fee53a6464ce52d8ecbf62241e6294c7e7fe12086cd161f512"
+checksum = "3ce15dd3ed8aa2f8eeac4716d6ef5ab58b6b9256db41d7e1a0224c2788e8fd87"
 dependencies = [
  "proc-macro2",
  "quote",
diff --git a/14_virtual_mem_part2_mmio_remap/Cargo.lock b/14_virtual_mem_part2_mmio_remap/Cargo.lock
index e1591cd42..24a35e1d8 100644
--- a/14_virtual_mem_part2_mmio_remap/Cargo.lock
+++ b/14_virtual_mem_part2_mmio_remap/Cargo.lock
@@ -24,9 +24,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.24"
+version = "1.0.26"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "1e0704ee1a7e00d7bb417d0770ea303c1bccbabf0ef1667dae92b5967f5f8a71"
+checksum = "a152013215dca273577e18d2bf00fa862b89b24169fb78c4c95aeb07992c9cec"
 dependencies = [
  "unicode-xid",
 ]
@@ -57,9 +57,9 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.62"
+version = "1.0.68"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "123a78a3596b24fee53a6464ce52d8ecbf62241e6294c7e7fe12086cd161f512"
+checksum = "3ce15dd3ed8aa2f8eeac4716d6ef5ab58b6b9256db41d7e1a0224c2788e8fd87"
 dependencies = [
  "proc-macro2",
  "quote",
diff --git a/15_virtual_mem_part3_precomputed_tables/Cargo.lock b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
index 62c78322e..cc4041447 100644
--- a/15_virtual_mem_part3_precomputed_tables/Cargo.lock
+++ b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
@@ -24,9 +24,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.24"
+version = "1.0.26"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "1e0704ee1a7e00d7bb417d0770ea303c1bccbabf0ef1667dae92b5967f5f8a71"
+checksum = "a152013215dca273577e18d2bf00fa862b89b24169fb78c4c95aeb07992c9cec"
 dependencies = [
  "unicode-xid",
 ]
@@ -57,9 +57,9 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.62"
+version = "1.0.68"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "123a78a3596b24fee53a6464ce52d8ecbf62241e6294c7e7fe12086cd161f512"
+checksum = "3ce15dd3ed8aa2f8eeac4716d6ef5ab58b6b9256db41d7e1a0224c2788e8fd87"
 dependencies = [
  "proc-macro2",
  "quote",
diff --git a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
index ba2e9eb5b..5703573b5 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
+++ b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
@@ -24,9 +24,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.24"
+version = "1.0.26"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "1e0704ee1a7e00d7bb417d0770ea303c1bccbabf0ef1667dae92b5967f5f8a71"
+checksum = "a152013215dca273577e18d2bf00fa862b89b24169fb78c4c95aeb07992c9cec"
 dependencies = [
  "unicode-xid",
 ]
@@ -57,9 +57,9 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.62"
+version = "1.0.68"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "123a78a3596b24fee53a6464ce52d8ecbf62241e6294c7e7fe12086cd161f512"
+checksum = "3ce15dd3ed8aa2f8eeac4716d6ef5ab58b6b9256db41d7e1a0224c2788e8fd87"
 dependencies = [
  "proc-macro2",
  "quote",

From 86c041a41f7be447aee3e540ebe2c6eeaafd4a09 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sun, 4 Apr 2021 23:24:44 +0200
Subject: [PATCH 061/214] Fix integration test fail

---
 12_integrated_testing/Cargo.toml              |  4 +--
 12_integrated_testing/README.md               | 21 +++++++-------
 .../tests/00_console_sanity.rs                |  9 +++++-
 13_exceptions_part2_peripheral_IRQs/README.md | 28 +++++++++++++------
 utils/devtool.rb                              |  1 +
 5 files changed, 40 insertions(+), 23 deletions(-)

diff --git a/12_integrated_testing/Cargo.toml b/12_integrated_testing/Cargo.toml
index d59d58176..686df7640 100644
--- a/12_integrated_testing/Cargo.toml
+++ b/12_integrated_testing/Cargo.toml
@@ -4,10 +4,8 @@ version = "0.12.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
 edition = "2018"
 
-# TODO: FIXME
-# LTO seems to kill the console integration test (empty text section). Disable until a fix is found.
 [profile.release]
-lto = false
+lto = true
 
 [features]
 default = []
diff --git a/12_integrated_testing/README.md b/12_integrated_testing/README.md
index c49f83614..113e09d2d 100644
--- a/12_integrated_testing/README.md
+++ b/12_integrated_testing/README.md
@@ -818,7 +818,7 @@ diff -uNr 11_exceptions_part1_groundwork/.cargo/config.toml 12_integrated_testin
 diff -uNr 11_exceptions_part1_groundwork/Cargo.toml 12_integrated_testing/Cargo.toml
 --- 11_exceptions_part1_groundwork/Cargo.toml
 +++ 12_integrated_testing/Cargo.toml
-@@ -1,30 +1,58 @@
+@@ -1,6 +1,6 @@
  [package]
  name = "mingo"
 -version = "0.11.0"
@@ -826,13 +826,7 @@ diff -uNr 11_exceptions_part1_groundwork/Cargo.toml 12_integrated_testing/Cargo.
  authors = ["Andre Richter <andre.o.richter@gmail.com>"]
  edition = "2018"
 
-+# TODO: FIXME
-+# LTO seems to kill the console integration test (empty text section). Disable until a fix is found.
- [profile.release]
--lto = true
-+lto = false
-
- [features]
+@@ -11,20 +11,46 @@
  default = []
  bsp_rpi3 = ["register"]
  bsp_rpi4 = ["register"]
@@ -1823,7 +1817,7 @@ diff -uNr 11_exceptions_part1_groundwork/tests/00_console_sanity.rb 12_integrate
 diff -uNr 11_exceptions_part1_groundwork/tests/00_console_sanity.rs 12_integrated_testing/tests/00_console_sanity.rs
 --- 11_exceptions_part1_groundwork/tests/00_console_sanity.rs
 +++ 12_integrated_testing/tests/00_console_sanity.rs
-@@ -0,0 +1,35 @@
+@@ -0,0 +1,42 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -1857,7 +1851,14 @@ diff -uNr 11_exceptions_part1_groundwork/tests/00_console_sanity.rs 12_integrate
 +    print!("{}", console().chars_read());
 +
 +    // The QEMU process running this test will be closed by the I/O test harness.
-+    cpu::wait_forever()
++    // cpu::wait_forever();
++
++    // For some reason, in this test in this tutorial, rustc or the linker produces an empty binary
++    // when wait_forever() is used. Calling qemu_exit_success() fixes this behavior. So for the time
++    // being, the following lines are just a workaround to fix this compiler/linker weirdness.
++    use libkernel::time::interface::TimeManager;
++    libkernel::time::time_manager().spin_for(core::time::Duration::from_secs(3600));
++    cpu::qemu_exit_success()
 +}
 
 diff -uNr 11_exceptions_part1_groundwork/tests/01_timer_sanity.rs 12_integrated_testing/tests/01_timer_sanity.rs
diff --git a/12_integrated_testing/tests/00_console_sanity.rs b/12_integrated_testing/tests/00_console_sanity.rs
index ad7fd2bf5..40dc4b41e 100644
--- a/12_integrated_testing/tests/00_console_sanity.rs
+++ b/12_integrated_testing/tests/00_console_sanity.rs
@@ -31,5 +31,12 @@ unsafe fn kernel_init() -> ! {
     print!("{}", console().chars_read());
 
     // The QEMU process running this test will be closed by the I/O test harness.
-    cpu::wait_forever()
+    // cpu::wait_forever();
+
+    // For some reason, in this test in this tutorial, rustc or the linker produces an empty binary
+    // when wait_forever() is used. Calling qemu_exit_success() fixes this behavior. So for the time
+    // being, the following lines are just a workaround to fix this compiler/linker weirdness.
+    use libkernel::time::interface::TimeManager;
+    libkernel::time::time_manager().spin_for(core::time::Duration::from_secs(3600));
+    cpu::qemu_exit_success()
 }
diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index 6da5a0750..b970cc253 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -749,7 +749,7 @@ Minipush 1.0
 diff -uNr 12_integrated_testing/Cargo.toml 13_exceptions_part2_peripheral_IRQs/Cargo.toml
 --- 12_integrated_testing/Cargo.toml
 +++ 13_exceptions_part2_peripheral_IRQs/Cargo.toml
-@@ -1,13 +1,11 @@
+@@ -1,6 +1,6 @@
  [package]
  name = "mingo"
 -version = "0.12.0"
@@ -757,14 +757,6 @@ diff -uNr 12_integrated_testing/Cargo.toml 13_exceptions_part2_peripheral_IRQs/C
  authors = ["Andre Richter <andre.o.richter@gmail.com>"]
  edition = "2018"
 
--# TODO: FIXME
--# LTO seems to kill the console integration test (empty text section). Disable until a fix is found.
- [profile.release]
--lto = false
-+lto = true
-
- [features]
- default = []
 
 diff -uNr 12_integrated_testing/src/_arch/aarch64/cpu/smp.rs 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs
 --- 12_integrated_testing/src/_arch/aarch64/cpu/smp.rs
@@ -2724,6 +2716,24 @@ diff -uNr 12_integrated_testing/src/synchronization.rs 13_exceptions_part2_perip
 +    }
  }
 
+diff -uNr 12_integrated_testing/tests/00_console_sanity.rs 13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs
+--- 12_integrated_testing/tests/00_console_sanity.rs
++++ 13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs
+@@ -31,12 +31,5 @@
+     print!("{}", console().chars_read());
+
+     // The QEMU process running this test will be closed by the I/O test harness.
+-    // cpu::wait_forever();
+-
+-    // For some reason, in this test in this tutorial, rustc or the linker produces an empty binary
+-    // when wait_forever() is used. Calling qemu_exit_success() fixes this behavior. So for the time
+-    // being, the following lines are just a workaround to fix this compiler/linker weirdness.
+-    use libkernel::time::interface::TimeManager;
+-    libkernel::time::time_manager().spin_for(core::time::Duration::from_secs(3600));
+-    cpu::qemu_exit_success()
++    cpu::wait_forever()
+ }
+
 diff -uNr 12_integrated_testing/tests/03_exception_irq_sanity.rs 13_exceptions_part2_peripheral_IRQs/tests/03_exception_irq_sanity.rs
 --- 12_integrated_testing/tests/03_exception_irq_sanity.rs
 +++ 13_exceptions_part2_peripheral_IRQs/tests/03_exception_irq_sanity.rs
diff --git a/utils/devtool.rb b/utils/devtool.rb
index a3d5e3d7b..a62af3802 100755
--- a/utils/devtool.rb
+++ b/utils/devtool.rb
@@ -190,6 +190,7 @@ def ready_for_publish
 
     def ready_for_publish_no_rust
         clean
+        fmt
         misspell
         rubocop
         copyright

From 5fec597ae0e0adefb498189dd724c7af02dc5f93 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sun, 4 Apr 2021 23:26:53 +0200
Subject: [PATCH 062/214] Fix filename

---
 00_before_we_start/README.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/00_before_we_start/README.md b/00_before_we_start/README.md
index 60e060bcc..9e79caf4b 100644
--- a/00_before_we_start/README.md
+++ b/00_before_we_start/README.md
@@ -106,6 +106,6 @@ From a namespace perspective, **memory** subsystem code lives in:
 # Boot flow
 
 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
-    - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
+    - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
 
 

From 29a58d7d51ac1fa1e95b1993ab0f670f01e9af78 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sun, 4 Apr 2021 23:35:35 +0200
Subject: [PATCH 063/214] Next attempt at integration test fix

---
 12_integrated_testing/README.md                |  4 ++--
 .../tests/00_console_sanity.rs                 |  4 ++--
 13_exceptions_part2_peripheral_IRQs/README.md  | 18 ------------------
 .../tests/00_console_sanity.rs                 |  9 ++++++++-
 .../tests/00_console_sanity.rs                 |  9 ++++++++-
 .../tests/00_console_sanity.rs                 |  9 ++++++++-
 .../tests/00_console_sanity.rs                 |  9 ++++++++-
 7 files changed, 36 insertions(+), 26 deletions(-)

diff --git a/12_integrated_testing/README.md b/12_integrated_testing/README.md
index 113e09d2d..192728cfd 100644
--- a/12_integrated_testing/README.md
+++ b/12_integrated_testing/README.md
@@ -1853,8 +1853,8 @@ diff -uNr 11_exceptions_part1_groundwork/tests/00_console_sanity.rs 12_integrate
 +    // The QEMU process running this test will be closed by the I/O test harness.
 +    // cpu::wait_forever();
 +
-+    // For some reason, in this test in this tutorial, rustc or the linker produces an empty binary
-+    // when wait_forever() is used. Calling qemu_exit_success() fixes this behavior. So for the time
++    // For some reason, in this test, rustc or the linker produces an empty binary when
++    // wait_forever() is used. Calling qemu_exit_success() fixes this behavior. So for the time
 +    // being, the following lines are just a workaround to fix this compiler/linker weirdness.
 +    use libkernel::time::interface::TimeManager;
 +    libkernel::time::time_manager().spin_for(core::time::Duration::from_secs(3600));
diff --git a/12_integrated_testing/tests/00_console_sanity.rs b/12_integrated_testing/tests/00_console_sanity.rs
index 40dc4b41e..84b744798 100644
--- a/12_integrated_testing/tests/00_console_sanity.rs
+++ b/12_integrated_testing/tests/00_console_sanity.rs
@@ -33,8 +33,8 @@ unsafe fn kernel_init() -> ! {
     // The QEMU process running this test will be closed by the I/O test harness.
     // cpu::wait_forever();
 
-    // For some reason, in this test in this tutorial, rustc or the linker produces an empty binary
-    // when wait_forever() is used. Calling qemu_exit_success() fixes this behavior. So for the time
+    // For some reason, in this test, rustc or the linker produces an empty binary when
+    // wait_forever() is used. Calling qemu_exit_success() fixes this behavior. So for the time
     // being, the following lines are just a workaround to fix this compiler/linker weirdness.
     use libkernel::time::interface::TimeManager;
     libkernel::time::time_manager().spin_for(core::time::Duration::from_secs(3600));
diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index b970cc253..0c7188b9a 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -2716,24 +2716,6 @@ diff -uNr 12_integrated_testing/src/synchronization.rs 13_exceptions_part2_perip
 +    }
  }
 
-diff -uNr 12_integrated_testing/tests/00_console_sanity.rs 13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs
---- 12_integrated_testing/tests/00_console_sanity.rs
-+++ 13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs
-@@ -31,12 +31,5 @@
-     print!("{}", console().chars_read());
-
-     // The QEMU process running this test will be closed by the I/O test harness.
--    // cpu::wait_forever();
--
--    // For some reason, in this test in this tutorial, rustc or the linker produces an empty binary
--    // when wait_forever() is used. Calling qemu_exit_success() fixes this behavior. So for the time
--    // being, the following lines are just a workaround to fix this compiler/linker weirdness.
--    use libkernel::time::interface::TimeManager;
--    libkernel::time::time_manager().spin_for(core::time::Duration::from_secs(3600));
--    cpu::qemu_exit_success()
-+    cpu::wait_forever()
- }
-
 diff -uNr 12_integrated_testing/tests/03_exception_irq_sanity.rs 13_exceptions_part2_peripheral_IRQs/tests/03_exception_irq_sanity.rs
 --- 12_integrated_testing/tests/03_exception_irq_sanity.rs
 +++ 13_exceptions_part2_peripheral_IRQs/tests/03_exception_irq_sanity.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs b/13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs
index ad7fd2bf5..84b744798 100644
--- a/13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs
+++ b/13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs
@@ -31,5 +31,12 @@ unsafe fn kernel_init() -> ! {
     print!("{}", console().chars_read());
 
     // The QEMU process running this test will be closed by the I/O test harness.
-    cpu::wait_forever()
+    // cpu::wait_forever();
+
+    // For some reason, in this test, rustc or the linker produces an empty binary when
+    // wait_forever() is used. Calling qemu_exit_success() fixes this behavior. So for the time
+    // being, the following lines are just a workaround to fix this compiler/linker weirdness.
+    use libkernel::time::interface::TimeManager;
+    libkernel::time::time_manager().spin_for(core::time::Duration::from_secs(3600));
+    cpu::qemu_exit_success()
 }
diff --git a/14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs b/14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs
index ad7fd2bf5..84b744798 100644
--- a/14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs
+++ b/14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs
@@ -31,5 +31,12 @@ unsafe fn kernel_init() -> ! {
     print!("{}", console().chars_read());
 
     // The QEMU process running this test will be closed by the I/O test harness.
-    cpu::wait_forever()
+    // cpu::wait_forever();
+
+    // For some reason, in this test, rustc or the linker produces an empty binary when
+    // wait_forever() is used. Calling qemu_exit_success() fixes this behavior. So for the time
+    // being, the following lines are just a workaround to fix this compiler/linker weirdness.
+    use libkernel::time::interface::TimeManager;
+    libkernel::time::time_manager().spin_for(core::time::Duration::from_secs(3600));
+    cpu::qemu_exit_success()
 }
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rs b/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rs
index ad7fd2bf5..84b744798 100644
--- a/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rs
+++ b/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rs
@@ -31,5 +31,12 @@ unsafe fn kernel_init() -> ! {
     print!("{}", console().chars_read());
 
     // The QEMU process running this test will be closed by the I/O test harness.
-    cpu::wait_forever()
+    // cpu::wait_forever();
+
+    // For some reason, in this test, rustc or the linker produces an empty binary when
+    // wait_forever() is used. Calling qemu_exit_success() fixes this behavior. So for the time
+    // being, the following lines are just a workaround to fix this compiler/linker weirdness.
+    use libkernel::time::interface::TimeManager;
+    libkernel::time::time_manager().spin_for(core::time::Duration::from_secs(3600));
+    cpu::qemu_exit_success()
 }
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rs b/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rs
index ad7fd2bf5..84b744798 100644
--- a/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rs
@@ -31,5 +31,12 @@ unsafe fn kernel_init() -> ! {
     print!("{}", console().chars_read());
 
     // The QEMU process running this test will be closed by the I/O test harness.
-    cpu::wait_forever()
+    // cpu::wait_forever();
+
+    // For some reason, in this test, rustc or the linker produces an empty binary when
+    // wait_forever() is used. Calling qemu_exit_success() fixes this behavior. So for the time
+    // being, the following lines are just a workaround to fix this compiler/linker weirdness.
+    use libkernel::time::interface::TimeManager;
+    libkernel::time::time_manager().spin_for(core::time::Duration::from_secs(3600));
+    cpu::qemu_exit_success()
 }

From 07fb63ae5f4a90dc91f7832b26cc215a35ddd7af Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 5 Apr 2021 15:16:06 +0200
Subject: [PATCH 064/214] Fix wrong order of range in comment

---
 14_virtual_mem_part2_mmio_remap/README.md                 | 2 +-
 14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs         | 2 +-
 15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs | 2 +-
 16_virtual_mem_part4_higher_half_kernel/README.md         | 4 ++--
 16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs | 2 +-
 5 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index 3f0651022..4ddb7d1a5 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -2862,7 +2862,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 14_virtual_mem_p
 +pub trait AssociatedTranslationTable {
 +    /// A translation table whose address range is:
 +    ///
-+    /// [0, AS_SIZE - 1]
++    /// [AS_SIZE - 1, 0]
 +    type TableStartFromBottom;
  }
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs b/14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
index e942f7f3e..360e149ae 100644
--- a/14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
@@ -64,7 +64,7 @@ pub struct AddressSpace<const AS_SIZE: usize>;
 pub trait AssociatedTranslationTable {
     /// A translation table whose address range is:
     ///
-    /// [0, AS_SIZE - 1]
+    /// [AS_SIZE - 1, 0]
     type TableStartFromBottom;
 }
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs
index a7109ec29..969ae6dd0 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs
@@ -80,7 +80,7 @@ pub struct AddressSpace<const AS_SIZE: usize>;
 pub trait AssociatedTranslationTable {
     /// A translation table whose address range is:
     ///
-    /// [0, AS_SIZE - 1]
+    /// [AS_SIZE - 1, 0]
     type TableStartFromBottom;
 }
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/README.md b/16_virtual_mem_part4_higher_half_kernel/README.md
index 4f7014423..17d71e2b9 100644
--- a/16_virtual_mem_part4_higher_half_kernel/README.md
+++ b/16_virtual_mem_part4_higher_half_kernel/README.md
@@ -37,7 +37,7 @@ pub trait AssociatedTranslationTable {
 
     /// A translation table whose address range is:
     ///
-    /// [0, AS_SIZE - 1]
+    /// [AS_SIZE - 1, 0]
     type TableStartFromBottom;
 }
 ```
@@ -602,7 +602,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs 16_virtual_m
 +
 +    /// A translation table whose address range is:
 +    ///
-     /// [0, AS_SIZE - 1]
+     /// [AS_SIZE - 1, 0]
      type TableStartFromBottom;
  }
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs
index 255093193..d1a5a3e65 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs
@@ -85,7 +85,7 @@ pub trait AssociatedTranslationTable {
 
     /// A translation table whose address range is:
     ///
-    /// [0, AS_SIZE - 1]
+    /// [AS_SIZE - 1, 0]
     type TableStartFromBottom;
 }
 

From 8982682d47c5ec2bad1edac74b3ad34e220f1809 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Thu, 29 Apr 2021 22:54:57 +0200
Subject: [PATCH 065/214] Add chainloader test

closes #101
---
 06_uart_chainloader/Makefile               |  14 ++-
 06_uart_chainloader/README.md              | 117 +++++++++++++++++++-
 06_uart_chainloader/tests/qemu_minipush.rb |  82 ++++++++++++++
 07_timestamps/README.md                    | 122 ++++++++++++++++++++-
 devtool_completion.bash                    |   2 +-
 utils/devtool.rb                           |  17 ++-
 utils/minipush.rb                          |  29 +++--
 utils/miniterm.rb                          |   9 +-
 8 files changed, 359 insertions(+), 33 deletions(-)
 create mode 100644 06_uart_chainloader/tests/qemu_minipush.rb

diff --git a/06_uart_chainloader/Makefile b/06_uart_chainloader/Makefile
index ce9d5a640..6805ed1cf 100644
--- a/06_uart_chainloader/Makefile
+++ b/06_uart_chainloader/Makefile
@@ -70,6 +70,7 @@ DOCKER_ARG_DIR_UTILS = -v $(shell pwd)/../utils:/work/utils
 DOCKER_ARG_DEV       = --privileged -v /dev:/dev
 
 DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
+DOCKER_TEST  = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_IMAGE)
 DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 
 # Dockerize commands that require USB device passthrough only on Linux
@@ -79,8 +80,9 @@ ifeq ($(UNAME_S),Linux)
     DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_IMAGE)
 endif
 
-EXEC_QEMU     = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
-EXEC_MINIPUSH = ruby ../utils/minipush.rb
+EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
+EXEC_MINIPUSH      = ruby ../utils/minipush.rb
+EXEC_QEMU_MINIPUSH = ruby tests/qemu_minipush.rb
 
 .PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu qemuasm chainboot clippy clean readelf objdump nm \
     check
@@ -99,7 +101,7 @@ doc:
 	@$(DOC_CMD) --document-private-items --open
 
 ifeq ($(QEMU_MACHINE_TYPE),)
-qemu:
+qemu test:
 	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
 else
 qemu: $(KERNEL_BIN)
@@ -109,6 +111,12 @@ qemu: $(KERNEL_BIN)
 qemuasm: $(KERNEL_BIN)
 	$(call colorecho, "\nLaunching QEMU with ASM output")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN) -d in_asm
+
+test: $(KERNEL_BIN)
+	$(call colorecho, "\nTesting chainloading - $(BSP)")
+	@$(DOCKER_TEST) $(EXEC_QEMU_MINIPUSH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) \
+                -kernel $(KERNEL_BIN) $(CHAINBOOT_DEMO_PAYLOAD)
+
 endif
 
 chainboot:
diff --git a/06_uart_chainloader/README.md b/06_uart_chainloader/README.md
index 80aa21332..2674bf63f 100644
--- a/06_uart_chainloader/README.md
+++ b/06_uart_chainloader/README.md
@@ -153,7 +153,14 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
  endif
 
  # Export for build.rs
-@@ -74,13 +76,14 @@
+@@ -68,19 +70,22 @@
+ DOCKER_ARG_DEV       = --privileged -v /dev:/dev
+
+ DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
++DOCKER_TEST  = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_IMAGE)
+ DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+
+ # Dockerize commands that require USB device passthrough only on Linux
  ifeq ($(UNAME_S),Linux)
      DOCKER_CMD_DEV = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DEV)
 
@@ -161,9 +168,11 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
 +    DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_IMAGE)
  endif
 
- EXEC_QEMU     = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
+-EXEC_QEMU     = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
 -EXEC_MINITERM = ruby ../utils/miniterm.rb
-+EXEC_MINIPUSH = ruby ../utils/minipush.rb
++EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
++EXEC_MINIPUSH      = ruby ../utils/minipush.rb
++EXEC_QEMU_MINIPUSH = ruby tests/qemu_minipush.rb
 
 -.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu miniterm clippy clean readelf objdump nm check
 +.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu qemuasm chainboot clippy clean readelf objdump nm \
@@ -171,7 +180,14 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
 
  all: $(KERNEL_BIN)
 
-@@ -102,10 +105,14 @@
+@@ -96,16 +101,26 @@
+ 	@$(DOC_CMD) --document-private-items --open
+
+ ifeq ($(QEMU_MACHINE_TYPE),)
+-qemu:
++qemu test:
+ 	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+ else
  qemu: $(KERNEL_BIN)
  	$(call colorecho, "\nLaunching QEMU")
  	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
@@ -179,6 +195,12 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
 +qemuasm: $(KERNEL_BIN)
 +	$(call colorecho, "\nLaunching QEMU with ASM output")
 +	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN) -d in_asm
++
++test: $(KERNEL_BIN)
++	$(call colorecho, "\nTesting chainloading - $(BSP)")
++	@$(DOCKER_TEST) $(EXEC_QEMU_MINIPUSH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) \
++                -kernel $(KERNEL_BIN) $(CHAINBOOT_DEMO_PAYLOAD)
++
  endif
 
 -miniterm:
@@ -470,6 +492,93 @@ diff -uNr 05_drivers_gpio_uart/src/main.rs 06_uart_chainloader/src/main.rs
 +    kernel()
  }
 
+diff -uNr 05_drivers_gpio_uart/tests/qemu_minipush.rb 06_uart_chainloader/tests/qemu_minipush.rb
+--- 05_drivers_gpio_uart/tests/qemu_minipush.rb
++++ 06_uart_chainloader/tests/qemu_minipush.rb
+@@ -0,0 +1,82 @@
++# frozen_string_literal: true
++
++# SPDX-License-Identifier: MIT OR Apache-2.0
++#
++# Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
++
++require_relative '../../utils/minipush'
++require 'expect'
++require 'timeout'
++
++# Match for the last print that 'demo_payload_rpiX.img' produces.
++EXPECTED_PRINT = 'Echoing input now'
++
++# The main class
++class QEMUMiniPush < MiniPush
++    TIMEOUT_SECS = 3
++
++    # override
++    def initialize(qemu_cmd, binary_image_path)
++        super(nil, binary_image_path)
++
++        @qemu_cmd = qemu_cmd
++    end
++
++    private
++
++    def quit_qemu_graceful
++        Timeout.timeout(5) do
++            pid = @target_serial.pid
++            Process.kill('TERM', pid)
++            Process.wait(pid)
++        end
++    end
++
++    # override
++    def open_serial
++        @target_serial = IO.popen(@qemu_cmd, 'r+', err: '/dev/null')
++
++        # Ensure all output is immediately flushed to the device.
++        @target_serial.sync = true
++
++        puts "[#{@name_short}] ✅ Serial connected"
++    end
++
++    # override
++    def terminal
++        result = @target_serial.expect(EXPECTED_PRINT, TIMEOUT_SECS)
++        exit(1) if result.nil?
++
++        puts result
++
++        quit_qemu_graceful
++    end
++
++    public
++
++    # override
++    def connetion_reset; end
++
++    # override
++    def handle_reconnect(error)
++        handle_unexpected(error)
++    end
++end
++
++##--------------------------------------------------------------------------------------------------
++## Execution starts here
++##--------------------------------------------------------------------------------------------------
++puts
++puts 'QEMUMiniPush 1.0'.cyan
++puts
++
++# CTRL + C handler. Only here to suppress Ruby's default exception print.
++trap('INT') do
++    # The `ensure` block from `QEMUMiniPush::run` will run after exit, restoring console state.
++    exit
++end
++
++binary_image_path = ARGV.pop
++qemu_cmd = ARGV.join(' ')
++
++QEMUMiniPush.new(qemu_cmd, binary_image_path).run
+
 diff -uNr 05_drivers_gpio_uart/update.sh 06_uart_chainloader/update.sh
 --- 05_drivers_gpio_uart/update.sh
 +++ 06_uart_chainloader/update.sh
diff --git a/06_uart_chainloader/tests/qemu_minipush.rb b/06_uart_chainloader/tests/qemu_minipush.rb
new file mode 100644
index 000000000..36a8abda7
--- /dev/null
+++ b/06_uart_chainloader/tests/qemu_minipush.rb
@@ -0,0 +1,82 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+require_relative '../../utils/minipush'
+require 'expect'
+require 'timeout'
+
+# Match for the last print that 'demo_payload_rpiX.img' produces.
+EXPECTED_PRINT = 'Echoing input now'
+
+# The main class
+class QEMUMiniPush < MiniPush
+    TIMEOUT_SECS = 3
+
+    # override
+    def initialize(qemu_cmd, binary_image_path)
+        super(nil, binary_image_path)
+
+        @qemu_cmd = qemu_cmd
+    end
+
+    private
+
+    def quit_qemu_graceful
+        Timeout.timeout(5) do
+            pid = @target_serial.pid
+            Process.kill('TERM', pid)
+            Process.wait(pid)
+        end
+    end
+
+    # override
+    def open_serial
+        @target_serial = IO.popen(@qemu_cmd, 'r+', err: '/dev/null')
+
+        # Ensure all output is immediately flushed to the device.
+        @target_serial.sync = true
+
+        puts "[#{@name_short}] ✅ Serial connected"
+    end
+
+    # override
+    def terminal
+        result = @target_serial.expect(EXPECTED_PRINT, TIMEOUT_SECS)
+        exit(1) if result.nil?
+
+        puts result
+
+        quit_qemu_graceful
+    end
+
+    public
+
+    # override
+    def connetion_reset; end
+
+    # override
+    def handle_reconnect(error)
+        handle_unexpected(error)
+    end
+end
+
+##--------------------------------------------------------------------------------------------------
+## Execution starts here
+##--------------------------------------------------------------------------------------------------
+puts
+puts 'QEMUMiniPush 1.0'.cyan
+puts
+
+# CTRL + C handler. Only here to suppress Ruby's default exception print.
+trap('INT') do
+    # The `ensure` block from `QEMUMiniPush::run` will run after exit, restoring console state.
+    exit
+end
+
+binary_image_path = ARGV.pop
+qemu_cmd = ARGV.join(' ')
+
+QEMUMiniPush.new(qemu_cmd, binary_image_path).run
diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index a5063cb64..1701ebf63 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -78,9 +78,23 @@ diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
  endif
 
  # Export for build.rs
-@@ -82,8 +80,7 @@
- EXEC_QEMU     = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
- EXEC_MINIPUSH = ruby ../utils/minipush.rb
+@@ -70,7 +68,6 @@
+ DOCKER_ARG_DEV       = --privileged -v /dev:/dev
+
+ DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
+-DOCKER_TEST  = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_IMAGE)
+ DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+
+ # Dockerize commands that require USB device passthrough only on Linux
+@@ -80,12 +77,10 @@
+     DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_IMAGE)
+ endif
+
+-EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
+-EXEC_MINIPUSH      = ruby ../utils/minipush.rb
+-EXEC_QEMU_MINIPUSH = ruby tests/qemu_minipush.rb
++EXEC_QEMU     = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
++EXEC_MINIPUSH = ruby ../utils/minipush.rb
 
 -.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu qemuasm chainboot clippy clean readelf objdump nm \
 -    check
@@ -88,7 +102,14 @@ diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
 
  all: $(KERNEL_BIN)
 
-@@ -105,14 +102,10 @@
+@@ -101,26 +96,16 @@
+ 	@$(DOC_CMD) --document-private-items --open
+
+ ifeq ($(QEMU_MACHINE_TYPE),)
+-qemu test:
++qemu:
+ 	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+ else
  qemu: $(KERNEL_BIN)
  	$(call colorecho, "\nLaunching QEMU")
  	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
@@ -96,6 +117,12 @@ diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
 -qemuasm: $(KERNEL_BIN)
 -	$(call colorecho, "\nLaunching QEMU with ASM output")
 -	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN) -d in_asm
+-
+-test: $(KERNEL_BIN)
+-	$(call colorecho, "\nTesting chainloading - $(BSP)")
+-	@$(DOCKER_TEST) $(EXEC_QEMU_MINIPUSH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) \
+-                -kernel $(KERNEL_BIN) $(CHAINBOOT_DEMO_PAYLOAD)
+-
  endif
 
 -chainboot:
@@ -692,6 +719,93 @@ diff -uNr 06_uart_chainloader/src/time.rs 07_timestamps/src/time.rs
 +    }
 +}
 
+diff -uNr 06_uart_chainloader/tests/qemu_minipush.rb 07_timestamps/tests/qemu_minipush.rb
+--- 06_uart_chainloader/tests/qemu_minipush.rb
++++ 07_timestamps/tests/qemu_minipush.rb
+@@ -1,82 +0,0 @@
+-# frozen_string_literal: true
+-
+-# SPDX-License-Identifier: MIT OR Apache-2.0
+-#
+-# Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+-
+-require_relative '../../utils/minipush'
+-require 'expect'
+-require 'timeout'
+-
+-# Match for the last print that 'demo_payload_rpiX.img' produces.
+-EXPECTED_PRINT = 'Echoing input now'
+-
+-# The main class
+-class QEMUMiniPush < MiniPush
+-    TIMEOUT_SECS = 3
+-
+-    # override
+-    def initialize(qemu_cmd, binary_image_path)
+-        super(nil, binary_image_path)
+-
+-        @qemu_cmd = qemu_cmd
+-    end
+-
+-    private
+-
+-    def quit_qemu_graceful
+-        Timeout.timeout(5) do
+-            pid = @target_serial.pid
+-            Process.kill('TERM', pid)
+-            Process.wait(pid)
+-        end
+-    end
+-
+-    # override
+-    def open_serial
+-        @target_serial = IO.popen(@qemu_cmd, 'r+', err: '/dev/null')
+-
+-        # Ensure all output is immediately flushed to the device.
+-        @target_serial.sync = true
+-
+-        puts "[#{@name_short}] ✅ Serial connected"
+-    end
+-
+-    # override
+-    def terminal
+-        result = @target_serial.expect(EXPECTED_PRINT, TIMEOUT_SECS)
+-        exit(1) if result.nil?
+-
+-        puts result
+-
+-        quit_qemu_graceful
+-    end
+-
+-    public
+-
+-    # override
+-    def connetion_reset; end
+-
+-    # override
+-    def handle_reconnect(error)
+-        handle_unexpected(error)
+-    end
+-end
+-
+-##--------------------------------------------------------------------------------------------------
+-## Execution starts here
+-##--------------------------------------------------------------------------------------------------
+-puts
+-puts 'QEMUMiniPush 1.0'.cyan
+-puts
+-
+-# CTRL + C handler. Only here to suppress Ruby's default exception print.
+-trap('INT') do
+-    # The `ensure` block from `QEMUMiniPush::run` will run after exit, restoring console state.
+-    exit
+-end
+-
+-binary_image_path = ARGV.pop
+-qemu_cmd = ARGV.join(' ')
+-
+-QEMUMiniPush.new(qemu_cmd, binary_image_path).run
+
 diff -uNr 06_uart_chainloader/update.sh 07_timestamps/update.sh
 --- 06_uart_chainloader/update.sh
 +++ 07_timestamps/update.sh
diff --git a/devtool_completion.bash b/devtool_completion.bash
index e351aa2ee..3831425cd 100755
--- a/devtool_completion.bash
+++ b/devtool_completion.bash
@@ -1,3 +1,3 @@
 #!/usr/bin/env bash
 
-complete -W "clean clippy copyright diff fmt fmt_check make make_xtra misspell ready_for_publish ready_for_publish_no_rust rubocop test_integration test_unit update" devtool
+complete -W "clean clippy copyright diff fmt fmt_check make make_xtra misspell ready_for_publish ready_for_publish_no_rust rubocop test_integration test_unit test_xtra update" devtool
diff --git a/utils/devtool.rb b/utils/devtool.rb
index a62af3802..494de032b 100755
--- a/utils/devtool.rb
+++ b/utils/devtool.rb
@@ -52,7 +52,7 @@ def make(bsp)
     end
 
     def test_unit
-        return unless testable?
+        return unless kernel_tests?
 
         puts "Unit Tests #{@folder}".light_blue
 
@@ -60,7 +60,7 @@ def test_unit
     end
 
     def test_integration
-        return unless testable?
+        return unless kernel_tests?
 
         puts "Integration Tests #{@folder}".light_blue
 
@@ -74,8 +74,8 @@ def test_integration
 
     private
 
-    def testable?
-        Dir.exist?("#{@folder}/tests")
+    def kernel_tests?
+        File.exist?("#{@folder}/tests/runner.rb")
     end
 end
 
@@ -147,6 +147,13 @@ def make_xtra
         system('cd X1_JTAG_boot && bash update.sh')
     end
 
+    def test_xtra
+        return if @user_has_supplied_crates
+
+        puts 'Test Xtra stuff'.light_blue
+        exit(1) unless system('cd *_uart_chainloader && make test')
+    end
+
     def test_unit
         @crates.each(&:test_unit)
     end
@@ -166,8 +173,6 @@ def misspell
 
     def rubocop
         puts 'Rubocop'.light_blue
-        system('which bundle')
-        system('bundle --version')
         exit(1) unless system('bundle exec rubocop')
     end
 
diff --git a/utils/minipush.rb b/utils/minipush.rb
index 14c1e6a5f..a9ee9bb2a 100755
--- a/utils/minipush.rb
+++ b/utils/minipush.rb
@@ -80,7 +80,7 @@ def send_binary
     end
 
     # override
-    def handle_reconnect
+    def handle_reconnect(_error)
         connetion_reset
 
         puts
@@ -100,8 +100,8 @@ def run
         send_size
         send_binary
         terminal
-    rescue ConnectionError, EOFError, Errno::EIO, ProtocolError, Timeout::Error
-        handle_reconnect
+    rescue ConnectionError, EOFError, Errno::EIO, ProtocolError, Timeout::Error => e
+        handle_reconnect(e)
         retry
     rescue StandardError => e
         handle_unexpected(e)
@@ -112,14 +112,19 @@ def run
     end
 end
 
-puts
-puts 'Minipush 1.0'.cyan
-puts
+##--------------------------------------------------------------------------------------------------
+## Execution starts here
+##--------------------------------------------------------------------------------------------------
+if __FILE__ == $PROGRAM_NAME
+    puts
+    puts 'Minipush 1.0'.cyan
+    puts
+
+    # CTRL + C handler. Only here to suppress Ruby's default exception print.
+    trap('INT') do
+        # The `ensure` block from `MiniPush::run` will run after exit, restoring console state.
+        exit
+    end
 
-# CTRL + C handler. Only here to suppress Ruby's default exception print.
-trap('INT') do
-    # The `ensure` block from `MiniPush::run` will run after exit, restoring console state.
-    exit
+    MiniPush.new(ARGV[0], ARGV[1]).run
 end
-
-MiniPush.new(ARGV[0], ARGV[1]).run
diff --git a/utils/miniterm.rb b/utils/miniterm.rb
index ff0c64fb6..10cc4bc5d 100755
--- a/utils/miniterm.rb
+++ b/utils/miniterm.rb
@@ -94,7 +94,7 @@ def connetion_reset
     end
 
     # When the serial lost power or was removed during R/W operation.
-    def handle_reconnect
+    def handle_reconnect(_error)
         connetion_reset
 
         puts
@@ -113,8 +113,8 @@ def handle_unexpected(error)
     def run
         open_serial
         terminal
-    rescue ConnectionError, EOFError, Errno::EIO
-        handle_reconnect
+    rescue ConnectionError, EOFError, Errno::EIO => e
+        handle_reconnect(e)
         retry
     rescue StandardError => e
         handle_unexpected(e)
@@ -125,6 +125,9 @@ def run
     end
 end
 
+##--------------------------------------------------------------------------------------------------
+## Execution starts here
+##--------------------------------------------------------------------------------------------------
 if __FILE__ == $PROGRAM_NAME
     puts
     puts 'Miniterm 1.0'.cyan

From 389fde2aa59536af0ba355d6aa9064118474ab15 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Thu, 29 Apr 2021 23:01:22 +0200
Subject: [PATCH 066/214] Remove wrong public access control

---
 06_uart_chainloader/README.md              | 4 +---
 06_uart_chainloader/tests/qemu_minipush.rb | 2 --
 07_timestamps/README.md                    | 4 +---
 3 files changed, 2 insertions(+), 8 deletions(-)

diff --git a/06_uart_chainloader/README.md b/06_uart_chainloader/README.md
index 2674bf63f..1d3a6d4e4 100644
--- a/06_uart_chainloader/README.md
+++ b/06_uart_chainloader/README.md
@@ -495,7 +495,7 @@ diff -uNr 05_drivers_gpio_uart/src/main.rs 06_uart_chainloader/src/main.rs
 diff -uNr 05_drivers_gpio_uart/tests/qemu_minipush.rb 06_uart_chainloader/tests/qemu_minipush.rb
 --- 05_drivers_gpio_uart/tests/qemu_minipush.rb
 +++ 06_uart_chainloader/tests/qemu_minipush.rb
-@@ -0,0 +1,82 @@
+@@ -0,0 +1,80 @@
 +# frozen_string_literal: true
 +
 +# SPDX-License-Identifier: MIT OR Apache-2.0
@@ -550,8 +550,6 @@ diff -uNr 05_drivers_gpio_uart/tests/qemu_minipush.rb 06_uart_chainloader/tests/
 +        quit_qemu_graceful
 +    end
 +
-+    public
-+
 +    # override
 +    def connetion_reset; end
 +
diff --git a/06_uart_chainloader/tests/qemu_minipush.rb b/06_uart_chainloader/tests/qemu_minipush.rb
index 36a8abda7..73857cd6b 100644
--- a/06_uart_chainloader/tests/qemu_minipush.rb
+++ b/06_uart_chainloader/tests/qemu_minipush.rb
@@ -52,8 +52,6 @@ def terminal
         quit_qemu_graceful
     end
 
-    public
-
     # override
     def connetion_reset; end
 
diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index 1701ebf63..de94f00d9 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -722,7 +722,7 @@ diff -uNr 06_uart_chainloader/src/time.rs 07_timestamps/src/time.rs
 diff -uNr 06_uart_chainloader/tests/qemu_minipush.rb 07_timestamps/tests/qemu_minipush.rb
 --- 06_uart_chainloader/tests/qemu_minipush.rb
 +++ 07_timestamps/tests/qemu_minipush.rb
-@@ -1,82 +0,0 @@
+@@ -1,80 +0,0 @@
 -# frozen_string_literal: true
 -
 -# SPDX-License-Identifier: MIT OR Apache-2.0
@@ -777,8 +777,6 @@ diff -uNr 06_uart_chainloader/tests/qemu_minipush.rb 07_timestamps/tests/qemu_mi
 -        quit_qemu_graceful
 -    end
 -
--    public
--
 -    # override
 -    def connetion_reset; end
 -

From f6f668c7810d018fb9bf7b501754c07f15120dc1 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Thu, 29 Apr 2021 23:08:49 +0200
Subject: [PATCH 067/214] Fix misspelled clippy lint

---
 05_drivers_gpio_uart/README.md                     | 2 +-
 05_drivers_gpio_uart/src/main.rs                   | 2 +-
 06_uart_chainloader/README.md                      | 2 +-
 06_uart_chainloader/src/main.rs                    | 2 +-
 07_timestamps/README.md                            | 2 +-
 07_timestamps/src/main.rs                          | 2 +-
 08_hw_debug_JTAG/src/main.rs                       | 2 +-
 09_privilege_level/src/main.rs                     | 2 +-
 10_virtual_mem_part1_identity_mapping/README.md    | 2 +-
 10_virtual_mem_part1_identity_mapping/src/main.rs  | 2 +-
 11_exceptions_part1_groundwork/src/main.rs         | 2 +-
 12_integrated_testing/README.md                    | 4 ++--
 12_integrated_testing/src/lib.rs                   | 2 +-
 13_exceptions_part2_peripheral_IRQs/README.md      | 2 +-
 13_exceptions_part2_peripheral_IRQs/src/lib.rs     | 2 +-
 14_virtual_mem_part2_mmio_remap/README.md          | 2 +-
 14_virtual_mem_part2_mmio_remap/src/lib.rs         | 2 +-
 15_virtual_mem_part3_precomputed_tables/src/lib.rs | 2 +-
 16_virtual_mem_part4_higher_half_kernel/src/lib.rs | 2 +-
 X1_JTAG_boot/src/main.rs                           | 2 +-
 20 files changed, 21 insertions(+), 21 deletions(-)

diff --git a/05_drivers_gpio_uart/README.md b/05_drivers_gpio_uart/README.md
index 9f4a8749b..b5895cd77 100644
--- a/05_drivers_gpio_uart/README.md
+++ b/05_drivers_gpio_uart/README.md
@@ -1325,7 +1325,7 @@ diff -uNr 04_safe_globals/src/main.rs 05_drivers_gpio_uart/src/main.rs
  //!
  //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
-+#![allow(clippy::clippy::upper_case_acronyms)]
++#![allow(clippy::upper_case_acronyms)]
 +#![feature(const_fn_fn_ptr_basics)]
  #![feature(format_args_nl)]
  #![feature(global_asm)]
diff --git a/05_drivers_gpio_uart/src/main.rs b/05_drivers_gpio_uart/src/main.rs
index 93d6ffef5..d72919118 100644
--- a/05_drivers_gpio_uart/src/main.rs
+++ b/05_drivers_gpio_uart/src/main.rs
@@ -106,7 +106,7 @@
 //!
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
-#![allow(clippy::clippy::upper_case_acronyms)]
+#![allow(clippy::upper_case_acronyms)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
 #![feature(global_asm)]
diff --git a/06_uart_chainloader/README.md b/06_uart_chainloader/README.md
index 1d3a6d4e4..ba6fc0c13 100644
--- a/06_uart_chainloader/README.md
+++ b/06_uart_chainloader/README.md
@@ -403,7 +403,7 @@ diff -uNr 05_drivers_gpio_uart/src/main.rs 06_uart_chainloader/src/main.rs
 @@ -107,6 +107,7 @@
  //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
- #![allow(clippy::clippy::upper_case_acronyms)]
+ #![allow(clippy::upper_case_acronyms)]
 +#![feature(asm)]
  #![feature(const_fn_fn_ptr_basics)]
  #![feature(format_args_nl)]
diff --git a/06_uart_chainloader/src/main.rs b/06_uart_chainloader/src/main.rs
index a94b97e42..aed10f7a8 100644
--- a/06_uart_chainloader/src/main.rs
+++ b/06_uart_chainloader/src/main.rs
@@ -106,7 +106,7 @@
 //!
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
-#![allow(clippy::clippy::upper_case_acronyms)]
+#![allow(clippy::upper_case_acronyms)]
 #![feature(asm)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index de94f00d9..aa6d237c8 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -502,7 +502,7 @@ diff -uNr 06_uart_chainloader/src/main.rs 07_timestamps/src/main.rs
 @@ -107,7 +107,6 @@
  //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
- #![allow(clippy::clippy::upper_case_acronyms)]
+ #![allow(clippy::upper_case_acronyms)]
 -#![feature(asm)]
  #![feature(const_fn_fn_ptr_basics)]
  #![feature(format_args_nl)]
diff --git a/07_timestamps/src/main.rs b/07_timestamps/src/main.rs
index 5f465cbfe..54b69275c 100644
--- a/07_timestamps/src/main.rs
+++ b/07_timestamps/src/main.rs
@@ -106,7 +106,7 @@
 //!
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
-#![allow(clippy::clippy::upper_case_acronyms)]
+#![allow(clippy::upper_case_acronyms)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
 #![feature(global_asm)]
diff --git a/08_hw_debug_JTAG/src/main.rs b/08_hw_debug_JTAG/src/main.rs
index 5f465cbfe..54b69275c 100644
--- a/08_hw_debug_JTAG/src/main.rs
+++ b/08_hw_debug_JTAG/src/main.rs
@@ -106,7 +106,7 @@
 //!
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
-#![allow(clippy::clippy::upper_case_acronyms)]
+#![allow(clippy::upper_case_acronyms)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
 #![feature(global_asm)]
diff --git a/09_privilege_level/src/main.rs b/09_privilege_level/src/main.rs
index 83d96ca8a..5cede7f98 100644
--- a/09_privilege_level/src/main.rs
+++ b/09_privilege_level/src/main.rs
@@ -106,7 +106,7 @@
 //!
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
-#![allow(clippy::clippy::upper_case_acronyms)]
+#![allow(clippy::upper_case_acronyms)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
 #![feature(global_asm)]
diff --git a/10_virtual_mem_part1_identity_mapping/README.md b/10_virtual_mem_part1_identity_mapping/README.md
index ba2932a44..e33329fd8 100644
--- a/10_virtual_mem_part1_identity_mapping/README.md
+++ b/10_virtual_mem_part1_identity_mapping/README.md
@@ -1043,7 +1043,7 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
 @@ -107,7 +107,11 @@
  //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
- #![allow(clippy::clippy::upper_case_acronyms)]
+ #![allow(clippy::upper_case_acronyms)]
 +#![allow(incomplete_features)]
  #![feature(const_fn_fn_ptr_basics)]
 +#![feature(const_generics)]
diff --git a/10_virtual_mem_part1_identity_mapping/src/main.rs b/10_virtual_mem_part1_identity_mapping/src/main.rs
index 74d49754a..35f41c0e7 100644
--- a/10_virtual_mem_part1_identity_mapping/src/main.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/main.rs
@@ -106,7 +106,7 @@
 //!
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
-#![allow(clippy::clippy::upper_case_acronyms)]
+#![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(const_generics)]
diff --git a/11_exceptions_part1_groundwork/src/main.rs b/11_exceptions_part1_groundwork/src/main.rs
index a1c5bc150..5d00393c4 100644
--- a/11_exceptions_part1_groundwork/src/main.rs
+++ b/11_exceptions_part1_groundwork/src/main.rs
@@ -106,7 +106,7 @@
 //!
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
-#![allow(clippy::clippy::upper_case_acronyms)]
+#![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(const_generics)]
diff --git a/12_integrated_testing/README.md b/12_integrated_testing/README.md
index 192728cfd..cff8587b9 100644
--- a/12_integrated_testing/README.md
+++ b/12_integrated_testing/README.md
@@ -1318,7 +1318,7 @@ diff -uNr 11_exceptions_part1_groundwork/src/lib.rs 12_integrated_testing/src/li
 +//!
 +//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 +
-+#![allow(clippy::clippy::upper_case_acronyms)]
++#![allow(clippy::upper_case_acronyms)]
 +#![allow(incomplete_features)]
 +#![feature(const_fn_fn_ptr_basics)]
 +#![feature(const_generics)]
@@ -1500,7 +1500,7 @@ diff -uNr 11_exceptions_part1_groundwork/src/main.rs 12_integrated_testing/src/m
 -//!
 -//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 -
--#![allow(clippy::clippy::upper_case_acronyms)]
+-#![allow(clippy::upper_case_acronyms)]
 -#![allow(incomplete_features)]
 -#![feature(const_fn_fn_ptr_basics)]
 -#![feature(const_generics)]
diff --git a/12_integrated_testing/src/lib.rs b/12_integrated_testing/src/lib.rs
index dc991fd12..1e315b4da 100644
--- a/12_integrated_testing/src/lib.rs
+++ b/12_integrated_testing/src/lib.rs
@@ -108,7 +108,7 @@
 //!
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
-#![allow(clippy::clippy::upper_case_acronyms)]
+#![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(const_generics)]
diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index 0c7188b9a..2a44ecdac 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -2378,7 +2378,7 @@ diff -uNr 12_integrated_testing/src/lib.rs 13_exceptions_part2_peripheral_IRQs/s
 +++ 13_exceptions_part2_peripheral_IRQs/src/lib.rs
 @@ -110,6 +110,7 @@
 
- #![allow(clippy::clippy::upper_case_acronyms)]
+ #![allow(clippy::upper_case_acronyms)]
  #![allow(incomplete_features)]
 +#![feature(asm)]
  #![feature(const_fn_fn_ptr_basics)]
diff --git a/13_exceptions_part2_peripheral_IRQs/src/lib.rs b/13_exceptions_part2_peripheral_IRQs/src/lib.rs
index 3cc973299..9a787e60e 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/lib.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/lib.rs
@@ -108,7 +108,7 @@
 //!
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
-#![allow(clippy::clippy::upper_case_acronyms)]
+#![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
 #![feature(asm)]
 #![feature(const_fn_fn_ptr_basics)]
diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index 4ddb7d1a5..6d35086fb 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -2132,7 +2132,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/lib.rs 14_virtual_mem_part2_mm
 --- 13_exceptions_part2_peripheral_IRQs/src/lib.rs
 +++ 14_virtual_mem_part2_mmio_remap/src/lib.rs
 @@ -111,6 +111,8 @@
- #![allow(clippy::clippy::upper_case_acronyms)]
+ #![allow(clippy::upper_case_acronyms)]
  #![allow(incomplete_features)]
  #![feature(asm)]
 +#![feature(const_evaluatable_checked)]
diff --git a/14_virtual_mem_part2_mmio_remap/src/lib.rs b/14_virtual_mem_part2_mmio_remap/src/lib.rs
index afa495060..f3ef29513 100644
--- a/14_virtual_mem_part2_mmio_remap/src/lib.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/lib.rs
@@ -108,7 +108,7 @@
 //!
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
-#![allow(clippy::clippy::upper_case_acronyms)]
+#![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
 #![feature(asm)]
 #![feature(const_evaluatable_checked)]
diff --git a/15_virtual_mem_part3_precomputed_tables/src/lib.rs b/15_virtual_mem_part3_precomputed_tables/src/lib.rs
index afa495060..f3ef29513 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/lib.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/lib.rs
@@ -108,7 +108,7 @@
 //!
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
-#![allow(clippy::clippy::upper_case_acronyms)]
+#![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
 #![feature(asm)]
 #![feature(const_evaluatable_checked)]
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/lib.rs b/16_virtual_mem_part4_higher_half_kernel/src/lib.rs
index afa495060..f3ef29513 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/lib.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/lib.rs
@@ -108,7 +108,7 @@
 //!
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
-#![allow(clippy::clippy::upper_case_acronyms)]
+#![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
 #![feature(asm)]
 #![feature(const_evaluatable_checked)]
diff --git a/X1_JTAG_boot/src/main.rs b/X1_JTAG_boot/src/main.rs
index 19c864c4d..0dc87fa16 100644
--- a/X1_JTAG_boot/src/main.rs
+++ b/X1_JTAG_boot/src/main.rs
@@ -106,7 +106,7 @@
 //!
 //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
 
-#![allow(clippy::clippy::upper_case_acronyms)]
+#![allow(clippy::upper_case_acronyms)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
 #![feature(global_asm)]

From 80c88e4d6b4624c68f5da0cee5270d65cd3fd95d Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Thu, 29 Apr 2021 23:35:23 +0200
Subject: [PATCH 068/214] Bump toolchain version; Fix clippy warnings

---
 06_uart_chainloader/demo_payload_rpi3.img     | Bin 7024 -> 6920 bytes
 06_uart_chainloader/demo_payload_rpi4.img     | Bin 6872 -> 6760 bytes
 .../README.md                                 |   2 +-
 .../aarch64/memory/mmu/translation_table.rs   |   2 +-
 .../aarch64/memory/mmu/translation_table.rs   |   2 +-
 .../aarch64/memory/mmu/translation_table.rs   |   2 +-
 .../aarch64/memory/mmu/translation_table.rs   |   2 +-
 14_virtual_mem_part2_mmio_remap/README.md     |  17 ++++++-----------
 .../aarch64/memory/mmu/translation_table.rs   |   6 +++---
 .../src/memory/mmu.rs                         |   2 +-
 .../src/memory/mmu/mapping_record.rs          |   9 ++-------
 .../aarch64/memory/mmu/translation_table.rs   |   6 +++---
 .../src/memory/mmu.rs                         |   2 +-
 .../src/memory/mmu/mapping_record.rs          |   9 ++-------
 .../aarch64/memory/mmu/translation_table.rs   |   6 +++---
 .../src/memory/mmu.rs                         |   2 +-
 .../src/memory/mmu/mapping_record.rs          |   9 ++-------
 X1_JTAG_boot/jtag_boot_rpi3.img               | Bin 8160 -> 8032 bytes
 X1_JTAG_boot/jtag_boot_rpi4.img               | Bin 6848 -> 6736 bytes
 rust-toolchain                                |   2 +-
 20 files changed, 30 insertions(+), 50 deletions(-)

diff --git a/06_uart_chainloader/demo_payload_rpi3.img b/06_uart_chainloader/demo_payload_rpi3.img
index 9b1cf35bce83d123cb099774e0377f9ac1271a2b..a8d7f680ef624efc1753bb890807835d880967e8 100755
GIT binary patch
delta 2758
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diff --git a/06_uart_chainloader/demo_payload_rpi4.img b/06_uart_chainloader/demo_payload_rpi4.img
index 2357ef5e93fd8fe7d0716198726efb7c85810edc..2d181336afb87cade1e96e18297d2750aef5ff8e 100755
GIT binary patch
delta 2839
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zyC~gx1;kiDMZhj^jJncS%7|NK|5QqRf}2Ed1O5W+xsNVN7RQ+4s;coCerU@MHFMcP
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zkqZ4G>6fqaJbFws>PoQA4f|rg?ucHzTa5?6qOi>(*<z6ohgtl9Mf_rZ64~F+SteVA
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z&ncPRsF#Rx>WC2O*v^f1Y((G91P0QMNXOO68tr%FM46vd3@-5}Uo{1oKStaiP7?_C
zIhD*$Ice|kcZrnlMMaADg?f@olYavYi1OJoQGmg?0AarX1Jn4=@P6a#2rj{UjA`Cm
zm*h)~SLmFu-Twe4dOs%IhKcXjSNr$rSO_i7cTPRipv0b~-*o!bBUqyN9oPRvh}aR{
z!2dEvxECX2_;TYm$_|u!T%bK?wp=T{({k-N%03s&Cji1-TUzyQ^ez@E86eG5is@>&
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z*+kFgZz>w8jBL^p2<P)VS@&1yNBK4Ch#1|h$%yviAnrQ|NOu?!CpM!@bPviu;_9^p
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z^a(pwEKYxgws4NuzlBa_Omuop(6_PxA;_#b%)VYko5Qk13SjpFZ-Z&^YeBRvK}S<t
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zMjtP#meA$|+T``ppA_v-12r0tr8yM&nud?b$V*Udq3*`Fa@l4W>w)yWwoIL%#D?+B
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zIcNMbtgt)i1JexOrY#<icLu|Y{0kl8A1@6C@P=fT_3y~^u;+PhqL!vT6<oZ8-cx*1
zovyYk$7lJ1H@T@Iw~>1}dQ@T6ui$AyT94i`cV#izxhHC}xp&oCHZ1p}cJA0gLv*l1
zEgBI#QGnO{LF<n>K~N)DU0N(}!`cB*MOMl{#5&wH5P>xuB7If9+CEhJ-^)+17YGLy
z#~N*egZ+aj?X&gBTWhShYxL6Jmh4r}`?A}y!`66n-TW8!+`@+zzq038Ol$bdvisLi
zzHF}-e8u{Jy<VJMe+0g7EASGq#(IYj+Usk1DE8cG+uv``*Yfw5(aYZF1HZR%{ncKM
z+w&EBj-~cV$K)*dmuS@YfcwY!+1cZz^kZKGcV8KGmp-<0O&hQs6xwmwU%{`y*5})L
XjDM>1C>f%pEF@jG7q8QnvfBRuczlS<

diff --git a/10_virtual_mem_part1_identity_mapping/README.md b/10_virtual_mem_part1_identity_mapping/README.md
index e33329fd8..75ff9c05c 100644
--- a/10_virtual_mem_part1_identity_mapping/README.md
+++ b/10_virtual_mem_part1_identity_mapping/README.md
@@ -602,7 +602,7 @@ diff -uNr 09_privilege_level/src/_arch/aarch64/memory/mmu/translation_table.rs 1
 +                + STAGE1_PAGE_DESCRIPTOR::AF::True
 +                + STAGE1_PAGE_DESCRIPTOR::TYPE::Page
 +                + STAGE1_PAGE_DESCRIPTOR::VALID::True
-+                + attribute_fields.clone().into(),
++                + (*attribute_fields).into(),
 +        );
 +
 +        Self { value: val.get() }
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs
index f38d0895c..eba8e12b5 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -235,7 +235,7 @@ impl PageDescriptor {
                 + STAGE1_PAGE_DESCRIPTOR::AF::True
                 + STAGE1_PAGE_DESCRIPTOR::TYPE::Page
                 + STAGE1_PAGE_DESCRIPTOR::VALID::True
-                + attribute_fields.clone().into(),
+                + (*attribute_fields).into(),
         );
 
         Self { value: val.get() }
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs
index f38d0895c..eba8e12b5 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -235,7 +235,7 @@ impl PageDescriptor {
                 + STAGE1_PAGE_DESCRIPTOR::AF::True
                 + STAGE1_PAGE_DESCRIPTOR::TYPE::Page
                 + STAGE1_PAGE_DESCRIPTOR::VALID::True
-                + attribute_fields.clone().into(),
+                + (*attribute_fields).into(),
         );
 
         Self { value: val.get() }
diff --git a/12_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs b/12_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs
index 73a93ff73..665631f49 100644
--- a/12_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/12_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -235,7 +235,7 @@ impl PageDescriptor {
                 + STAGE1_PAGE_DESCRIPTOR::AF::True
                 + STAGE1_PAGE_DESCRIPTOR::TYPE::Page
                 + STAGE1_PAGE_DESCRIPTOR::VALID::True
-                + attribute_fields.clone().into(),
+                + (*attribute_fields).into(),
         );
 
         Self { value: val.get() }
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs
index 73a93ff73..665631f49 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -235,7 +235,7 @@ impl PageDescriptor {
                 + STAGE1_PAGE_DESCRIPTOR::AF::True
                 + STAGE1_PAGE_DESCRIPTOR::TYPE::Page
                 + STAGE1_PAGE_DESCRIPTOR::VALID::True
-                + attribute_fields.clone().into(),
+                + (*attribute_fields).into(),
         );
 
         Self { value: val.get() }
diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index 6d35086fb..85aa5138a 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -659,7 +659,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
 +        phys_pages: &PageSliceDescriptor<Physical>,
 +        attr: &AttributeFields,
 +    ) -> Result<(), &'static str> {
-+        assert_eq!(self.initialized, true, "Translation tables not initialized");
++        assert!(self.initialized, "Translation tables not initialized");
 +
 +        let p = phys_pages.as_slice();
 +        let v = virt_pages.as_slice();
@@ -700,7 +700,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
 +        &mut self,
 +        num_pages: usize,
 +    ) -> Result<PageSliceDescriptor<Virtual>, &'static str> {
-+        assert_eq!(self.initialized, true, "Translation tables not initialized");
++        assert!(self.initialized, "Translation tables not initialized");
 +
 +        if num_pages == 0 {
 +            return Err("num_pages == 0");
@@ -2213,7 +2213,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/main.rs 14_virtual_mem_part2_m
 diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/mapping_record.rs 14_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs
 --- 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/mapping_record.rs
 +++ 14_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs
-@@ -0,0 +1,221 @@
+@@ -0,0 +1,216 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -2334,12 +2334,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/mapping_record.rs 1
 +        );
 +        info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
 +
-+        for i in self
-+            .inner
-+            .iter()
-+            .filter(|x| x.is_some())
-+            .map(|x| x.unwrap())
-+        {
++        for i in self.inner.iter().flatten() {
 +            let virt_start = i.virt_start_addr;
 +            let virt_end_inclusive = virt_start + i.phys_pages.size() - 1;
 +            let phys_start = i.phys_pages.start_addr();
@@ -2418,7 +2413,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/mapping_record.rs 1
 +    mmio_descriptor: &MMIODescriptor,
 +    new_user: &'static str,
 +) -> Option<Address<Virtual>> {
-+    let phys_pages: PageSliceDescriptor<Physical> = mmio_descriptor.clone().into();
++    let phys_pages: PageSliceDescriptor<Physical> = (*mmio_descriptor).into();
 +
 +    KERNEL_MAPPING_RECORD.write(|mr| {
 +        let dup = mr.find_duplicate(&phys_pages)?;
@@ -3068,7 +3063,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 14_virtual_mem_p
 +    name: &'static str,
 +    mmio_descriptor: &MMIODescriptor,
 +) -> Result<Address<Virtual>, &'static str> {
-+    let phys_pages: PageSliceDescriptor<Physical> = mmio_descriptor.clone().into();
++    let phys_pages: PageSliceDescriptor<Physical> = (*mmio_descriptor).into();
 +    let offset_into_start_page =
 +        mmio_descriptor.start_addr().into_usize() & bsp::memory::mmu::KernelGranule::MASK;
 +
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
index 15784a1b6..df7413614 100644
--- a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -237,7 +237,7 @@ impl PageDescriptor {
                 + STAGE1_PAGE_DESCRIPTOR::AF::True
                 + STAGE1_PAGE_DESCRIPTOR::TYPE::Page
                 + STAGE1_PAGE_DESCRIPTOR::VALID::True
-                + attribute_fields.clone().into(),
+                + (*attribute_fields).into(),
         );
 
         Self { value: val.get() }
@@ -364,7 +364,7 @@ impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::Transla
         phys_pages: &PageSliceDescriptor<Physical>,
         attr: &AttributeFields,
     ) -> Result<(), &'static str> {
-        assert_eq!(self.initialized, true, "Translation tables not initialized");
+        assert!(self.initialized, "Translation tables not initialized");
 
         let p = phys_pages.as_slice();
         let v = virt_pages.as_slice();
@@ -399,7 +399,7 @@ impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::Transla
         &mut self,
         num_pages: usize,
     ) -> Result<PageSliceDescriptor<Virtual>, &'static str> {
-        assert_eq!(self.initialized, true, "Translation tables not initialized");
+        assert!(self.initialized, "Translation tables not initialized");
 
         if num_pages == 0 {
             return Err("num_pages == 0");
diff --git a/14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs b/14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
index 360e149ae..9f10ad72b 100644
--- a/14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
@@ -182,7 +182,7 @@ pub unsafe fn kernel_map_mmio(
     name: &'static str,
     mmio_descriptor: &MMIODescriptor,
 ) -> Result<Address<Virtual>, &'static str> {
-    let phys_pages: PageSliceDescriptor<Physical> = mmio_descriptor.clone().into();
+    let phys_pages: PageSliceDescriptor<Physical> = (*mmio_descriptor).into();
     let offset_into_start_page =
         mmio_descriptor.start_addr().into_usize() & bsp::memory::mmu::KernelGranule::MASK;
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs b/14_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs
index eab62fb39..16c27e38c 100644
--- a/14_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs
@@ -118,12 +118,7 @@ impl MappingRecord {
         );
         info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
 
-        for i in self
-            .inner
-            .iter()
-            .filter(|x| x.is_some())
-            .map(|x| x.unwrap())
-        {
+        for i in self.inner.iter().flatten() {
             let virt_start = i.virt_start_addr;
             let virt_end_inclusive = virt_start + i.phys_pages.size() - 1;
             let phys_start = i.phys_pages.start_addr();
@@ -202,7 +197,7 @@ pub fn kernel_find_and_insert_mmio_duplicate(
     mmio_descriptor: &MMIODescriptor,
     new_user: &'static str,
 ) -> Option<Address<Virtual>> {
-    let phys_pages: PageSliceDescriptor<Physical> = mmio_descriptor.clone().into();
+    let phys_pages: PageSliceDescriptor<Physical> = (*mmio_descriptor).into();
 
     KERNEL_MAPPING_RECORD.write(|mr| {
         let dup = mr.find_duplicate(&phys_pages)?;
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs
index 5f781bdd5..6b7227b3b 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -236,7 +236,7 @@ impl PageDescriptor {
                 + STAGE1_PAGE_DESCRIPTOR::AF::True
                 + STAGE1_PAGE_DESCRIPTOR::TYPE::Page
                 + STAGE1_PAGE_DESCRIPTOR::VALID::True
-                + attribute_fields.clone().into(),
+                + (*attribute_fields).into(),
         );
 
         Self { value: val.get() }
@@ -374,7 +374,7 @@ impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::Transla
         phys_pages: &PageSliceDescriptor<Physical>,
         attr: &AttributeFields,
     ) -> Result<(), &'static str> {
-        assert_eq!(self.initialized, true, "Translation tables not initialized");
+        assert!(self.initialized, "Translation tables not initialized");
 
         let p = phys_pages.as_slice();
         let v = virt_pages.as_slice();
@@ -409,7 +409,7 @@ impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::Transla
         &mut self,
         num_pages: usize,
     ) -> Result<PageSliceDescriptor<Virtual>, &'static str> {
-        assert_eq!(self.initialized, true, "Translation tables not initialized");
+        assert!(self.initialized, "Translation tables not initialized");
 
         if num_pages == 0 {
             return Err("num_pages == 0");
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs
index 969ae6dd0..106d3a902 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs
@@ -208,7 +208,7 @@ pub unsafe fn kernel_map_mmio(
     name: &'static str,
     mmio_descriptor: &MMIODescriptor,
 ) -> Result<Address<Virtual>, &'static str> {
-    let phys_pages: PageSliceDescriptor<Physical> = mmio_descriptor.clone().into();
+    let phys_pages: PageSliceDescriptor<Physical> = (*mmio_descriptor).into();
     let offset_into_start_page =
         mmio_descriptor.start_addr().into_usize() & bsp::memory::mmu::KernelGranule::MASK;
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/mapping_record.rs b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/mapping_record.rs
index eab62fb39..16c27e38c 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/mapping_record.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/mapping_record.rs
@@ -118,12 +118,7 @@ impl MappingRecord {
         );
         info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
 
-        for i in self
-            .inner
-            .iter()
-            .filter(|x| x.is_some())
-            .map(|x| x.unwrap())
-        {
+        for i in self.inner.iter().flatten() {
             let virt_start = i.virt_start_addr;
             let virt_end_inclusive = virt_start + i.phys_pages.size() - 1;
             let phys_start = i.phys_pages.start_addr();
@@ -202,7 +197,7 @@ pub fn kernel_find_and_insert_mmio_duplicate(
     mmio_descriptor: &MMIODescriptor,
     new_user: &'static str,
 ) -> Option<Address<Virtual>> {
-    let phys_pages: PageSliceDescriptor<Physical> = mmio_descriptor.clone().into();
+    let phys_pages: PageSliceDescriptor<Physical> = (*mmio_descriptor).into();
 
     KERNEL_MAPPING_RECORD.write(|mr| {
         let dup = mr.find_duplicate(&phys_pages)?;
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
index a58a3bb9c..a2758b157 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -236,7 +236,7 @@ impl PageDescriptor {
                 + STAGE1_PAGE_DESCRIPTOR::AF::True
                 + STAGE1_PAGE_DESCRIPTOR::TYPE::Page
                 + STAGE1_PAGE_DESCRIPTOR::VALID::True
-                + attribute_fields.clone().into(),
+                + (*attribute_fields).into(),
         );
 
         Self { value: val.get() }
@@ -401,7 +401,7 @@ impl<const NUM_TABLES: usize, const START_FROM_TOP: bool>
         phys_pages: &PageSliceDescriptor<Physical>,
         attr: &AttributeFields,
     ) -> Result<(), &'static str> {
-        assert_eq!(self.initialized, true, "Translation tables not initialized");
+        assert!(self.initialized, "Translation tables not initialized");
 
         let p = phys_pages.as_slice();
         let v = virt_pages.as_slice();
@@ -436,7 +436,7 @@ impl<const NUM_TABLES: usize, const START_FROM_TOP: bool>
         &mut self,
         num_pages: usize,
     ) -> Result<PageSliceDescriptor<Virtual>, &'static str> {
-        assert_eq!(self.initialized, true, "Translation tables not initialized");
+        assert!(self.initialized, "Translation tables not initialized");
 
         if num_pages == 0 {
             return Err("num_pages == 0");
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs
index d1a5a3e65..f9c40d35f 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs
@@ -213,7 +213,7 @@ pub unsafe fn kernel_map_mmio(
     name: &'static str,
     mmio_descriptor: &MMIODescriptor,
 ) -> Result<Address<Virtual>, &'static str> {
-    let phys_pages: PageSliceDescriptor<Physical> = mmio_descriptor.clone().into();
+    let phys_pages: PageSliceDescriptor<Physical> = (*mmio_descriptor).into();
     let offset_into_start_page =
         mmio_descriptor.start_addr().into_usize() & bsp::memory::mmu::KernelGranule::MASK;
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/mapping_record.rs b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/mapping_record.rs
index eab62fb39..16c27e38c 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/mapping_record.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/mapping_record.rs
@@ -118,12 +118,7 @@ impl MappingRecord {
         );
         info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
 
-        for i in self
-            .inner
-            .iter()
-            .filter(|x| x.is_some())
-            .map(|x| x.unwrap())
-        {
+        for i in self.inner.iter().flatten() {
             let virt_start = i.virt_start_addr;
             let virt_end_inclusive = virt_start + i.phys_pages.size() - 1;
             let phys_start = i.phys_pages.start_addr();
@@ -202,7 +197,7 @@ pub fn kernel_find_and_insert_mmio_duplicate(
     mmio_descriptor: &MMIODescriptor,
     new_user: &'static str,
 ) -> Option<Address<Virtual>> {
-    let phys_pages: PageSliceDescriptor<Physical> = mmio_descriptor.clone().into();
+    let phys_pages: PageSliceDescriptor<Physical> = (*mmio_descriptor).into();
 
     KERNEL_MAPPING_RECORD.write(|mr| {
         let dup = mr.find_duplicate(&phys_pages)?;
diff --git a/X1_JTAG_boot/jtag_boot_rpi3.img b/X1_JTAG_boot/jtag_boot_rpi3.img
index 30ce719cf6080dcd104be8b5465aa8aa91e66e95..96d8bfb1817aef0dfb5458871a1ea93582acea84 100755
GIT binary patch
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diff --git a/X1_JTAG_boot/jtag_boot_rpi4.img b/X1_JTAG_boot/jtag_boot_rpi4.img
index 5e1e1bf7d6716daa5b88a735299e89c268faf47d..76531e6ff99de9580fcf1d1b05c8eed4404543ef 100755
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zQO3pgcvjj5XBUQDY}gYbk1(6}iP~#(qPMVCW`xyS5&y-;e5o<t#ANRlZqUm(-{S<>
QI$ynQjS+ec+vf}Y2Lqz<yZ`_I

delta 2357
zcmZ`)YfKbZ6ux)vE<4LhV42-zv9c>tT&P+_L24r7Dor)9#_g(o2Iy1J1|f~FrkPdS
zXoZ>`uh!Q75Pq02qir?l4`P)?ZCVriptks<f7WfAtgL8wsH_jB=k5$>X*<be&OLMP
zIp6)xcklgqet1D>Ar7Ccv~a>D6FPtqI^jWfIr0aRqXfzAoohHZ=E8Qmg%mB|k(el`
zMqTV%kAi+{k#1W#u)T(z3HB`A_SS+;&yuIOx*0T1p5b;l=&j6y^c&Mzscwes#SS@E
zd`^j2uo8h{+X*`0M($t3q^3_i6a1w%dU7ZtTpeob9v))8vBopXy?3xOTEi)K))8f7
zl}X{B7P~S4PJ=n<FXh_&RxIvMhecFj)YJ+!w&1<40z9pGgmCIGLFygSdbrz+2I&Jc
zFEyly2`|oVc?DbJ^%w<anw%Buqhe)225RDkBQD;Ino$Z06qr$y2fhhXpw2@mH$rUc
zHR33V61%z`0cecM7Xlv<;w%|iwG6;51&}@fyF?jl{I-LEubu8wt`R|vl3bO=kPJ~u
zOb)C?1%2Df#jfoDf=>zh^`wuAtuIGiTcfD*H7MHl!16D!L9-6F9lmz~>}&v=Ao=Qj
zuuWjEw;=g_ZON6qhfA((wMa;ITF_twp#Vcy2Zi};F@bPZpQu^NFKe1(EBGE?Z50#_
zk6J1oUk#t3&q3gS?|Gkc8;VsCA<mdvpCcwBu;OdL%;^*)v)pb?o8OUwdc6`Ly89pK
z9Dr^!Ani-}e{e?u90Rc#0FKi-4kSDbK-T({Q2?TG&bSDz?U(>!FM&lTfy`n^cnj(+
zz>av~kQRUmCEI}F?LhH9C=ergY5~rRj}{+s?WI3hHWt>Lh2~;V9;dKPVCBWcFeqyT
zlm#LgyiKr5U*(;)mP|3Ba<-Q10AWK4IyFE9x|{zF3v`v$yIgI!zOV-4xyJxlKWHKY
zh>&n<{MZvHr!5Bs_L;@XPpnA3ETEj$w_GnsJ4n;(;2!`?{g9Dmt-)yUH0`l^3I){(
z^Y?(3J51;l`&Z3ceNWoYY!-ivno}3O+rjZI3{#pQF5F;t<w%%o@|r(BT!Z;|ou&m?
zhAObngB~QHeh;A2GYINb$QYbZuniRKV+sZVgTiYrbTHvI7!~7C@i;x1y2z|@sV&Fo
zU}`?MH%c?p7E5;Xqpq@aJ0?kvH_CiE(N&u|(N%=X-LT16>G85`V^O~@IgJzIun_}$
zlAUII#y(kcFZXg#AVwU}RYyDmU7eil1}I>Fq^gYZU2!eY4P6NXA724yKSDR89@514
zSp%K8IUWnXLRyqQM+n1=W$=gRML5tfK;YHev_5?+-qjgRKacT2dNi{z5V3SAR)j(^
zIP<)oGC2)wc4qZ2Me>IBMRIGqOI`^pjTM`f*itM<b|Lv1F{#lhSkWY+^v_9AZd7ne
ztiq)1c&Hs>XD0nVvj~pY&Rdz4cuqMu$MVI5MzG8%iY2iiH3CwN0;bqQ&Ea<Y6gcfe
z9(O+N%$m;mJoIXoFQ+FLj%1U<pryj!6-)AIY4)_NaK0P?bR!S+YHR3A*>B<|dM?{p
zv{;UpVI}PY^^1XFBoCBv%7%w;UxD?6TH8xxkap<Ho~iVH_H3@_30j&nT}oar7_JvA
z?;g_*!R}m8<0ijpKpcW-6fBmZO(7qeDSJrJ?=xy9|JBZr3H*Bl70Pg)g+2@xCiB$6
z>7S<Q*g!)e>+0%6iCOGwF$Mh%LT*`!87?I7S&{0Otbd^{#tIAMmop~{c~@2^wQmIh
zB@11gse`EX%5{*$V}O{5{RoY+y>bcmO}$ZAyMTMg%1~kq7R8gDe*R*2vm5q4n^TGf
zxgR)<lp?y+wwc3E(lfSc9J15jZTln-+=a=06F5}>6x>^y1Wl04dW#rig>WHXK=K`E
zZQDI<{y*4o7wK%Y6(wUB8@m7m(*>}s@+KxnUcEKO7#0&7lV4z3ES512`sts!8*v9+
zEjaLTS}**x!kGs!9(%kFeGF|$KGn_5jm==$48Ps*Pmbdqbf<msJf~Bi4xLLr`NkOJ
zmwYCdo9d)P_M7fDmp*Ni5#C{pKQqQOOK_$>C+I;h3Us>jS!;T>J{+Y@&SKm{KX<O1
vJMKGStSZ|m%f2GKZH9k};s2U?@)|j(i|)@`i#O5hc@@^MQ94Y$uHwG|_aGKH

diff --git a/rust-toolchain b/rust-toolchain
index e0e7993d0..268f9495a 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1,4 +1,4 @@
 [toolchain]
-channel = "nightly-2021-03-18"
+channel = "nightly-2021-04-25"
 components = ["llvm-tools-preview"]
 targets = ["aarch64-unknown-none-softfloat"]

From ad70dccab0abcf62f9f4d93e698d7a9a464934da Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Thu, 29 Apr 2021 23:41:05 +0200
Subject: [PATCH 069/214] Add chainloader test to devtool

---
 utils/devtool.rb | 1 +
 1 file changed, 1 insertion(+)

diff --git a/utils/devtool.rb b/utils/devtool.rb
index 494de032b..7639a1b41 100755
--- a/utils/devtool.rb
+++ b/utils/devtool.rb
@@ -188,6 +188,7 @@ def ready_for_publish
 
         clean
         make_xtra
+        test_xtra
         test_unit
         test_integration
         clean

From f6c48b54744e8f8b690c5ed45df6e6636e848e63 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Fri, 30 Apr 2021 00:03:55 +0200
Subject: [PATCH 070/214] Remove -i; Add chainloader test to CI

---
 .github/workflows/test_xtra.yml | 47 +++++++++++++++++++++++++++++++++
 06_uart_chainloader/Makefile    |  2 +-
 06_uart_chainloader/README.md   |  2 +-
 07_timestamps/README.md         |  2 +-
 4 files changed, 50 insertions(+), 3 deletions(-)
 create mode 100644 .github/workflows/test_xtra.yml

diff --git a/.github/workflows/test_xtra.yml b/.github/workflows/test_xtra.yml
new file mode 100644
index 000000000..bfa7b0290
--- /dev/null
+++ b/.github/workflows/test_xtra.yml
@@ -0,0 +1,47 @@
+name: Xtra-Tests
+
+on:
+  push:
+    branches:
+      - master
+    paths-ignore:
+      - "utils/**"
+      - "doc/**"
+      - "docker/**"
+  pull_request:
+    branches:
+      - master
+    paths-ignore:
+      - "utils/**"
+      - "doc/**"
+      - "docker/**"
+  schedule:
+    - cron: "0 5 * * *"
+
+jobs:
+  build:
+    name: Run xtra tests
+    runs-on: ubuntu-20.04
+
+    steps:
+      - uses: actions/checkout@v2
+      - name: Set up Ruby 2.x
+        uses: actions/setup-ruby@v1
+        with:
+          ruby-version: "2.7"
+      - name: Set up Rust nightly
+        run: |
+          rm rust-toolchain
+          rustup self update
+          rustup toolchain install nightly --component llvm-tools-preview
+          rustup default nightly
+          rustup target add aarch64-unknown-none-softfloat
+          cargo install cargo-binutils
+      - name: Set up Ruby
+        run: |
+          gem install bundler
+          bundle config set without 'uart'
+          bundle install --retry 3
+      - name: Make all
+        run: |
+          bundle exec ruby utils/devtool.rb test_xtra
diff --git a/06_uart_chainloader/Makefile b/06_uart_chainloader/Makefile
index 6805ed1cf..a8d38ffca 100644
--- a/06_uart_chainloader/Makefile
+++ b/06_uart_chainloader/Makefile
@@ -70,7 +70,7 @@ DOCKER_ARG_DIR_UTILS = -v $(shell pwd)/../utils:/work/utils
 DOCKER_ARG_DEV       = --privileged -v /dev:/dev
 
 DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
-DOCKER_TEST  = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_IMAGE)
+DOCKER_TEST  = $(DOCKER_CMD) -t $(DOCKER_ARG_DIR_UTILS) $(DOCKER_IMAGE)
 DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 
 # Dockerize commands that require USB device passthrough only on Linux
diff --git a/06_uart_chainloader/README.md b/06_uart_chainloader/README.md
index ba6fc0c13..44fc10282 100644
--- a/06_uart_chainloader/README.md
+++ b/06_uart_chainloader/README.md
@@ -157,7 +157,7 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
  DOCKER_ARG_DEV       = --privileged -v /dev:/dev
 
  DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
-+DOCKER_TEST  = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_IMAGE)
++DOCKER_TEST  = $(DOCKER_CMD) -t $(DOCKER_ARG_DIR_UTILS) $(DOCKER_IMAGE)
  DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 
  # Dockerize commands that require USB device passthrough only on Linux
diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index aa6d237c8..88b829086 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -82,7 +82,7 @@ diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
  DOCKER_ARG_DEV       = --privileged -v /dev:/dev
 
  DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
--DOCKER_TEST  = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_IMAGE)
+-DOCKER_TEST  = $(DOCKER_CMD) -t $(DOCKER_ARG_DIR_UTILS) $(DOCKER_IMAGE)
  DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 
  # Dockerize commands that require USB device passthrough only on Linux

From aa0e194c75c902765e68f0887143412260734766 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Fri, 30 Apr 2021 09:07:23 +0200
Subject: [PATCH 071/214] CI: Use rust-toolchain

Latest nightly broke a dependency. Need to wait for it to be fixed. Pin the
toolchain for now.
---
 .github/workflows/build_rpi3.yml       | 5 -----
 .github/workflows/build_rpi4.yml       | 5 -----
 .github/workflows/sanity.yml           | 7 -------
 .github/workflows/test_integration.yml | 5 -----
 .github/workflows/test_unit.yml        | 5 -----
 .github/workflows/test_xtra.yml        | 5 -----
 6 files changed, 32 deletions(-)

diff --git a/.github/workflows/build_rpi3.yml b/.github/workflows/build_rpi3.yml
index c3bc3992e..a9e4db3c2 100644
--- a/.github/workflows/build_rpi3.yml
+++ b/.github/workflows/build_rpi3.yml
@@ -31,11 +31,6 @@ jobs:
           ruby-version: "2.7"
       - name: Set up Rust nightly
         run: |
-          rm rust-toolchain
-          rustup self update
-          rustup toolchain install nightly --component llvm-tools-preview
-          rustup default nightly
-          rustup target add aarch64-unknown-none-softfloat
           cargo install cargo-binutils
       - name: Set up Ruby
         run: |
diff --git a/.github/workflows/build_rpi4.yml b/.github/workflows/build_rpi4.yml
index 8d479e8d9..9f9730dbb 100644
--- a/.github/workflows/build_rpi4.yml
+++ b/.github/workflows/build_rpi4.yml
@@ -31,11 +31,6 @@ jobs:
           ruby-version: "2.7"
       - name: Set up Rust nightly
         run: |
-          rm rust-toolchain
-          rustup self update
-          rustup toolchain install nightly --component llvm-tools-preview
-          rustup default nightly
-          rustup target add aarch64-unknown-none-softfloat
           cargo install cargo-binutils
       - name: Set up Ruby
         run: |
diff --git a/.github/workflows/sanity.yml b/.github/workflows/sanity.yml
index 2c4551f2d..c8d8999b6 100644
--- a/.github/workflows/sanity.yml
+++ b/.github/workflows/sanity.yml
@@ -31,13 +31,6 @@ jobs:
       - name: Set up Prettier
         run: |
           npm install prettier
-      - name: Set up Rust nightly
-        run: |
-          rm rust-toolchain
-          rustup self update
-          rustup toolchain install nightly --component rustfmt clippy
-          rustup default nightly
-          rustup target add aarch64-unknown-none-softfloat
       - name: Setup misspell
         run: |
           curl -L -o ./install-misspell.sh https://git.io/misspell
diff --git a/.github/workflows/test_integration.yml b/.github/workflows/test_integration.yml
index fa2fda987..4105894b9 100644
--- a/.github/workflows/test_integration.yml
+++ b/.github/workflows/test_integration.yml
@@ -31,11 +31,6 @@ jobs:
           ruby-version: "2.7"
       - name: Set up Rust nightly
         run: |
-          rm rust-toolchain
-          rustup self update
-          rustup toolchain install nightly --component llvm-tools-preview
-          rustup default nightly
-          rustup target add aarch64-unknown-none-softfloat
           cargo install cargo-binutils
       - name: Set up Ruby
         run: |
diff --git a/.github/workflows/test_unit.yml b/.github/workflows/test_unit.yml
index 741ff352b..48c1a758f 100644
--- a/.github/workflows/test_unit.yml
+++ b/.github/workflows/test_unit.yml
@@ -31,11 +31,6 @@ jobs:
           ruby-version: "2.7"
       - name: Set up Rust nightly
         run: |
-          rm rust-toolchain
-          rustup self update
-          rustup toolchain install nightly --component llvm-tools-preview
-          rustup default nightly
-          rustup target add aarch64-unknown-none-softfloat
           cargo install cargo-binutils
       - name: Set up Ruby
         run: |
diff --git a/.github/workflows/test_xtra.yml b/.github/workflows/test_xtra.yml
index bfa7b0290..8a7287a81 100644
--- a/.github/workflows/test_xtra.yml
+++ b/.github/workflows/test_xtra.yml
@@ -31,11 +31,6 @@ jobs:
           ruby-version: "2.7"
       - name: Set up Rust nightly
         run: |
-          rm rust-toolchain
-          rustup self update
-          rustup toolchain install nightly --component llvm-tools-preview
-          rustup default nightly
-          rustup target add aarch64-unknown-none-softfloat
           cargo install cargo-binutils
       - name: Set up Ruby
         run: |

From 668e63fea55bf90c091de7f4059e3cae0f452daf Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Fri, 30 Apr 2021 09:14:33 +0200
Subject: [PATCH 072/214] CI: Explicitly add clippy

---
 .github/workflows/sanity.yml | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/.github/workflows/sanity.yml b/.github/workflows/sanity.yml
index c8d8999b6..3bb343092 100644
--- a/.github/workflows/sanity.yml
+++ b/.github/workflows/sanity.yml
@@ -23,6 +23,9 @@ jobs:
         uses: actions/setup-ruby@v1
         with:
           ruby-version: "2.7"
+      - name: Set up Rust nightly
+        run: |
+          rustup component add clippy
       - name: Set up Bundler
         run: |
           gem install bundler

From 39a066c246d729f6d3be0060f705c33200af0b1a Mon Sep 17 00:00:00 2001
From: Alex <blackanger.z@gmail.com>
Date: Sat, 15 May 2021 23:14:32 +0800
Subject: [PATCH 073/214] Update Dockerfile

Use https when git clone qemu to avoid connect timeout errors.
---
 docker/rustembedded-osdev-utils/Dockerfile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/docker/rustembedded-osdev-utils/Dockerfile b/docker/rustembedded-osdev-utils/Dockerfile
index 47f69e438..1366abf2d 100644
--- a/docker/rustembedded-osdev-utils/Dockerfile
+++ b/docker/rustembedded-osdev-utils/Dockerfile
@@ -44,7 +44,7 @@ RUN set -ex;                                      \
     gem install bundler;                            \
     bundle install --retry 3 --without development; \
     # QEMU
-    git clone git://git.qemu.org/qemu.git;                     \
+    git clone https://git.qemu.org/git/qemu.git;               \
     cd qemu;                                                   \
     git checkout tags/v5.2.0;                                  \
     ./configure --target-list=aarch64-softmmu --enable-modules \

From 7f666000ceb65cce8134cd0f0e0b4cf066523daf Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Fri, 2 Jul 2021 23:04:18 +0200
Subject: [PATCH 074/214] Init DRAM in assembly instead of Rust

See https://github.com/rust-embedded/cortex-m-rt/issues/300
---
 02_runtime_init/README.md                     | 200 ++++--------------
 02_runtime_init/src/_arch/aarch64/cpu/boot.rs |   8 +-
 02_runtime_init/src/_arch/aarch64/cpu/boot.s  |  21 +-
 02_runtime_init/src/bsp/raspberrypi.rs        |   1 -
 02_runtime_init/src/bsp/raspberrypi/link.ld   |  10 +-
 02_runtime_init/src/bsp/raspberrypi/memory.rs |  37 ----
 02_runtime_init/src/main.rs                   |   6 +-
 02_runtime_init/src/memory.rs                 |  30 ---
 02_runtime_init/src/runtime_init.rs           |  37 ----
 03_hacky_hello_world/README.md                |  14 +-
 .../src/_arch/aarch64/cpu/boot.rs             |   8 +-
 .../src/_arch/aarch64/cpu/boot.s              |  21 +-
 03_hacky_hello_world/src/bsp/raspberrypi.rs   |   1 -
 .../src/bsp/raspberrypi/link.ld               |  10 +-
 .../src/bsp/raspberrypi/memory.rs             |  37 ----
 03_hacky_hello_world/src/main.rs              |   6 +-
 03_hacky_hello_world/src/memory.rs            |  30 ---
 03_hacky_hello_world/src/runtime_init.rs      |  37 ----
 04_safe_globals/README.md                     |   8 +-
 04_safe_globals/src/_arch/aarch64/cpu/boot.rs |   8 +-
 04_safe_globals/src/_arch/aarch64/cpu/boot.s  |  21 +-
 04_safe_globals/src/bsp/raspberrypi.rs        |   1 -
 04_safe_globals/src/bsp/raspberrypi/link.ld   |  10 +-
 04_safe_globals/src/bsp/raspberrypi/memory.rs |  37 ----
 04_safe_globals/src/main.rs                   |   6 +-
 04_safe_globals/src/memory.rs                 |  30 ---
 04_safe_globals/src/runtime_init.rs           |  37 ----
 05_drivers_gpio_uart/README.md                |  33 ++-
 .../src/_arch/aarch64/cpu/boot.rs             |   8 +-
 .../src/_arch/aarch64/cpu/boot.s              |  21 +-
 .../src/bsp/raspberrypi/link.ld               |  10 +-
 .../src/bsp/raspberrypi/memory.rs             |  32 ---
 05_drivers_gpio_uart/src/main.rs              |   6 +-
 05_drivers_gpio_uart/src/memory.rs            |  30 ---
 05_drivers_gpio_uart/src/runtime_init.rs      |  37 ----
 06_uart_chainloader/README.md                 |  78 +++----
 06_uart_chainloader/demo_payload_rpi3.img     | Bin 6920 -> 6696 bytes
 06_uart_chainloader/demo_payload_rpi4.img     | Bin 6760 -> 6552 bytes
 .../src/_arch/aarch64/cpu/boot.rs             |   8 +-
 .../src/_arch/aarch64/cpu/boot.s              |  24 ++-
 .../src/bsp/raspberrypi/link.ld               |  10 +-
 .../src/bsp/raspberrypi/memory.rs             |  28 ---
 06_uart_chainloader/src/main.rs               |   6 +-
 06_uart_chainloader/src/memory.rs             |  30 ---
 06_uart_chainloader/src/runtime_init.rs       |  37 ----
 07_timestamps/README.md                       |  82 +++----
 07_timestamps/src/_arch/aarch64/cpu/boot.rs   |   8 +-
 07_timestamps/src/_arch/aarch64/cpu/boot.s    |  21 +-
 07_timestamps/src/bsp/raspberrypi/link.ld     |  10 +-
 07_timestamps/src/bsp/raspberrypi/memory.rs   |  32 ---
 07_timestamps/src/main.rs                     |   6 +-
 07_timestamps/src/memory.rs                   |  30 ---
 07_timestamps/src/runtime_init.rs             |  37 ----
 .../src/_arch/aarch64/cpu/boot.rs             |   8 +-
 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s |  21 +-
 08_hw_debug_JTAG/src/bsp/raspberrypi/link.ld  |  10 +-
 .../src/bsp/raspberrypi/memory.rs             |  32 ---
 08_hw_debug_JTAG/src/main.rs                  |   6 +-
 08_hw_debug_JTAG/src/memory.rs                |  30 ---
 08_hw_debug_JTAG/src/runtime_init.rs          |  37 ----
 09_privilege_level/README.md                  |  57 +++--
 .../src/_arch/aarch64/cpu/boot.rs             |  10 +-
 .../src/_arch/aarch64/cpu/boot.s              |  23 +-
 .../src/bsp/raspberrypi/link.ld               |  10 +-
 .../src/bsp/raspberrypi/memory.rs             |  32 ---
 09_privilege_level/src/main.rs                |   6 +-
 09_privilege_level/src/memory.rs              |  30 ---
 09_privilege_level/src/runtime_init.rs        |  37 ----
 .../README.md                                 |  72 ++++---
 .../src/_arch/aarch64/cpu/boot.rs             |  10 +-
 .../src/_arch/aarch64/cpu/boot.s              |  23 +-
 .../src/bsp/raspberrypi/link.ld               |  10 +-
 .../src/bsp/raspberrypi/memory.rs             |  25 +--
 .../src/main.rs                               |   5 +-
 .../src/memory.rs                             |  25 ---
 .../src/runtime_init.rs                       |  37 ----
 11_exceptions_part1_groundwork/README.md      |   4 +-
 .../src/_arch/aarch64/cpu/boot.rs             |  10 +-
 .../src/_arch/aarch64/cpu/boot.s              |  23 +-
 .../src/bsp/raspberrypi/link.ld               |  10 +-
 .../src/bsp/raspberrypi/memory.rs             |  25 +--
 11_exceptions_part1_groundwork/src/main.rs    |   5 +-
 11_exceptions_part1_groundwork/src/memory.rs  |  25 ---
 .../src/runtime_init.rs                       |  37 ----
 12_integrated_testing/README.md               | 125 ++++-------
 .../src/_arch/aarch64/cpu/boot.rs             |  10 +-
 .../src/_arch/aarch64/cpu/boot.s              |  23 +-
 .../src/_arch/aarch64/memory/mmu.rs           |  13 +-
 .../src/bsp/raspberrypi/link.ld               |  10 +-
 .../src/bsp/raspberrypi/memory.rs             |  25 +--
 12_integrated_testing/src/lib.rs              |  12 +-
 12_integrated_testing/src/memory.rs           |  62 ------
 12_integrated_testing/src/runtime_init.rs     |  40 ----
 13_exceptions_part2_peripheral_IRQs/README.md |   8 +-
 .../src/_arch/aarch64/cpu/boot.rs             |  10 +-
 .../src/_arch/aarch64/cpu/boot.s              |  23 +-
 .../src/_arch/aarch64/memory/mmu.rs           |  13 +-
 .../src/bsp/raspberrypi/link.ld               |  10 +-
 .../src/bsp/raspberrypi/memory.rs             |  25 +--
 .../src/lib.rs                                |  12 +-
 .../src/memory.rs                             |  62 ------
 .../src/runtime_init.rs                       |  40 ----
 14_virtual_mem_part2_mmio_remap/README.md     | 148 +++++++------
 .../src/_arch/aarch64/cpu/boot.rs             |  10 +-
 .../src/_arch/aarch64/cpu/boot.s              |  23 +-
 .../src/bsp/raspberrypi/link.ld               |  10 +-
 .../src/bsp/raspberrypi/memory.rs             |  24 +--
 .../src/bsp/raspberrypi/memory/mmu.rs         |  13 +-
 14_virtual_mem_part2_mmio_remap/src/lib.rs    |  12 +-
 14_virtual_mem_part2_mmio_remap/src/memory.rs |  58 +----
 .../src/runtime_init.rs                       |  40 ----
 .../README.md                                 |  38 ++--
 .../src/_arch/aarch64/cpu/boot.rs             |  11 +-
 .../src/_arch/aarch64/cpu/boot.s              |  23 +-
 .../src/bsp/raspberrypi/link.ld               |  10 +-
 .../src/bsp/raspberrypi/memory.rs             |  24 +--
 .../src/lib.rs                                |  12 +-
 .../src/memory.rs                             |  58 +----
 .../src/runtime_init.rs                       |  40 ----
 .../README.md                                 |  65 +++---
 .../src/_arch/aarch64/cpu/boot.rs             |  15 +-
 .../src/_arch/aarch64/cpu/boot.s              |  25 ++-
 .../src/bsp/raspberrypi/link.ld               |  10 +-
 .../src/bsp/raspberrypi/memory.rs             |  24 +--
 .../src/lib.rs                                |   7 +-
 .../src/memory.rs                             |  58 +----
 .../src/runtime_init.rs                       |  41 ----
 X1_JTAG_boot/jtag_boot_rpi3.img               | Bin 8032 -> 7856 bytes
 X1_JTAG_boot/jtag_boot_rpi4.img               | Bin 6736 -> 6584 bytes
 X1_JTAG_boot/src/_arch/aarch64/cpu/boot.rs    |   8 +-
 X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s     |  21 +-
 X1_JTAG_boot/src/bsp/raspberrypi/link.ld      |  10 +-
 X1_JTAG_boot/src/bsp/raspberrypi/memory.rs    |  32 ---
 X1_JTAG_boot/src/main.rs                      |   6 +-
 X1_JTAG_boot/src/memory.rs                    |  30 ---
 X1_JTAG_boot/src/runtime_init.rs              |  37 ----
 136 files changed, 872 insertions(+), 2585 deletions(-)
 delete mode 100644 02_runtime_init/src/bsp/raspberrypi/memory.rs
 delete mode 100644 02_runtime_init/src/memory.rs
 delete mode 100644 02_runtime_init/src/runtime_init.rs
 delete mode 100644 03_hacky_hello_world/src/bsp/raspberrypi/memory.rs
 delete mode 100644 03_hacky_hello_world/src/memory.rs
 delete mode 100644 03_hacky_hello_world/src/runtime_init.rs
 delete mode 100644 04_safe_globals/src/bsp/raspberrypi/memory.rs
 delete mode 100644 04_safe_globals/src/memory.rs
 delete mode 100644 04_safe_globals/src/runtime_init.rs
 delete mode 100644 05_drivers_gpio_uart/src/memory.rs
 delete mode 100644 05_drivers_gpio_uart/src/runtime_init.rs
 delete mode 100644 06_uart_chainloader/src/memory.rs
 delete mode 100644 06_uart_chainloader/src/runtime_init.rs
 delete mode 100644 07_timestamps/src/memory.rs
 delete mode 100644 07_timestamps/src/runtime_init.rs
 delete mode 100644 08_hw_debug_JTAG/src/memory.rs
 delete mode 100644 08_hw_debug_JTAG/src/runtime_init.rs
 delete mode 100644 09_privilege_level/src/memory.rs
 delete mode 100644 09_privilege_level/src/runtime_init.rs
 delete mode 100644 10_virtual_mem_part1_identity_mapping/src/runtime_init.rs
 delete mode 100644 11_exceptions_part1_groundwork/src/runtime_init.rs
 delete mode 100644 12_integrated_testing/src/runtime_init.rs
 delete mode 100644 13_exceptions_part2_peripheral_IRQs/src/runtime_init.rs
 delete mode 100644 14_virtual_mem_part2_mmio_remap/src/runtime_init.rs
 delete mode 100644 15_virtual_mem_part3_precomputed_tables/src/runtime_init.rs
 delete mode 100644 16_virtual_mem_part4_higher_half_kernel/src/runtime_init.rs
 delete mode 100644 X1_JTAG_boot/src/memory.rs
 delete mode 100644 X1_JTAG_boot/src/runtime_init.rs

diff --git a/02_runtime_init/README.md b/02_runtime_init/README.md
index 5cba10fb3..3dc0b3d36 100644
--- a/02_runtime_init/README.md
+++ b/02_runtime_init/README.md
@@ -2,8 +2,9 @@
 
 ## tl;dr
 
-- We extend `boot.s` to call into Rust code for the first time. There, we zero the [bss] section
-  before execution is halted with a call to `panic()`.
+- We extend `boot.s` to call into Rust code for the first time. Before the jump
+  to Rust happens, a bit of runtime init work is done.
+- The Rust code being called just halts execution with a call to `panic!()`.
 - Check out `make qemu` again to see the additional code run.
 
 ## Notable additions
@@ -12,11 +13,11 @@
      - New sections: `.rodata`, `.got`, `.data`, `.bss`.
      - A dedicated place for linking boot-time arguments that need to be read by `_start()`.
 - `_start()` in `_arch/__arch_name__/cpu/boot.s`:
-     1. Halt core if core != core0.
-     1. Set up the `stack pointer`.
-     1. Jump to the `_start_rust()` function, defined in `arch/__arch_name__/cpu/boot.rs`.
-- `runtime_init()` in `runtime_init.rs`:
-     - Zeros the `.bss` section.
+     1. Halts core if core != core0.
+     1. Initializes the `DRAM` by zeroing the [bss] section.
+     1. Sets up the `stack pointer`.
+     1. Jumps to the `_start_rust()` function, defined in `arch/__arch_name__/cpu/boot.rs`.
+- `_start_rust()`:
      - Calls `kernel_init()`, which calls `panic!()`, which eventually halts core0 as well.
 - The library now uses the [cortex-a] crate, which provides zero-overhead abstractions and wraps
   `unsafe` parts when dealing with the CPU's resources.
@@ -64,12 +65,8 @@ diff -uNr 01_wait_forever/Makefile 02_runtime_init/Makefile
 diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.rs 02_runtime_init/src/_arch/aarch64/cpu/boot.rs
 --- 01_wait_forever/src/_arch/aarch64/cpu/boot.rs
 +++ 02_runtime_init/src/_arch/aarch64/cpu/boot.rs
-@@ -11,5 +11,23 @@
- //!
- //! crate::cpu::boot::arch_boot
+@@ -13,3 +13,15 @@
 
-+use crate::runtime_init;
-+
  // Assembly counterpart to this file.
  global_asm!(include_str!("boot.s"));
 +
@@ -80,13 +77,9 @@ diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.rs 02_runtime_init/src/_arc
 +/// The Rust entry of the `kernel` binary.
 +///
 +/// The function is called from the assembly `_start` function.
-+///
-+/// # Safety
-+///
-+/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
 +#[no_mangle]
 +pub unsafe fn _start_rust() -> ! {
-+    runtime_init::runtime_init()
++    crate::kernel_init()
 +}
 
 diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.s 02_runtime_init/src/_arch/aarch64/cpu/boot.s
@@ -117,7 +110,7 @@ diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.s 02_runtime_init/src/_arch
  // Public Code
  //--------------------------------------------------------------------------------------------------
  .section .text._start
-@@ -11,6 +29,22 @@
+@@ -11,9 +29,38 @@
  // fn _start()
  //------------------------------------------------------------------------------
  _start:
@@ -126,10 +119,22 @@ diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.s 02_runtime_init/src/_arch
 +	and	x1, x1, _core_id_mask
 +	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 +	cmp	x1, x2
-+	b.ne	1f
++	b.ne	parking_loop
++
++	// If execution reaches here, it is the boot core.
++
++	// Initialize DRAM.
++	ADR_REL	x0, __bss_start
++	ADR_REL x1, __bss_end_exclusive
 +
-+	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
++bss_init_loop:
++	cmp	x0, x1
++	b.eq	prepare_rust
++	stp	xzr, xzr, [x0], #16
++	b	bss_init_loop
 +
++	// Prepare the jump to Rust code.
++prepare_rust:
 +	// Set the stack pointer.
 +	ADR_REL	x0, __boot_core_stack_end_exclusive
 +	mov	sp, x0
@@ -138,8 +143,14 @@ diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.s 02_runtime_init/src/_arch
 +	b	_start_rust
 +
  	// Infinitely wait for events (aka "park the core").
- 1:	wfe
- 	b	1b
+-1:	wfe
+-	b	1b
++parking_loop:
++	wfe
++	b	parking_loop
+
+ .size	_start, . - _start
+ .type	_start, function
 
 diff -uNr 01_wait_forever/src/_arch/aarch64/cpu.rs 02_runtime_init/src/_arch/aarch64/cpu.rs
 --- 01_wait_forever/src/_arch/aarch64/cpu.rs
@@ -194,7 +205,7 @@ diff -uNr 01_wait_forever/src/bsp/raspberrypi/cpu.rs 02_runtime_init/src/bsp/ras
 diff -uNr 01_wait_forever/src/bsp/raspberrypi/link.ld 02_runtime_init/src/bsp/raspberrypi/link.ld
 --- 01_wait_forever/src/bsp/raspberrypi/link.ld
 +++ 02_runtime_init/src/bsp/raspberrypi/link.ld
-@@ -11,17 +11,45 @@
+@@ -11,17 +11,43 @@
  PHDRS
  {
      segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
@@ -230,70 +241,25 @@ diff -uNr 01_wait_forever/src/bsp/raspberrypi/link.ld 02_runtime_init/src/bsp/ra
 +    ***********************************************************************************************/
 +    .data : { *(.data*) } :segment_rw
 +
-+    /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-+    .bss : ALIGN(8)
++    /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
++    .bss : ALIGN(16)
 +    {
 +        __bss_start = .;
 +        *(.bss*);
-+        . = ALIGN(8);
-+
-+        . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-+        __bss_end_inclusive = . - 8;
++        . = ALIGN(16);
++        __bss_end_exclusive = .;
 +    } :NONE
  }
 
-diff -uNr 01_wait_forever/src/bsp/raspberrypi/memory.rs 02_runtime_init/src/bsp/raspberrypi/memory.rs
---- 01_wait_forever/src/bsp/raspberrypi/memory.rs
-+++ 02_runtime_init/src/bsp/raspberrypi/memory.rs
-@@ -0,0 +1,37 @@
-+// SPDX-License-Identifier: MIT OR Apache-2.0
-+//
-+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-+
-+//! BSP Memory Management.
-+
-+use core::{cell::UnsafeCell, ops::RangeInclusive};
-+
-+//--------------------------------------------------------------------------------------------------
-+// Private Definitions
-+//--------------------------------------------------------------------------------------------------
-+
-+// Symbols from the linker script.
-+extern "Rust" {
-+    static __bss_start: UnsafeCell<u64>;
-+    static __bss_end_inclusive: UnsafeCell<u64>;
-+}
-+
-+//--------------------------------------------------------------------------------------------------
-+// Public Code
-+//--------------------------------------------------------------------------------------------------
-+
-+/// Return the inclusive range spanning the .bss section.
-+///
-+/// # Safety
-+///
-+/// - Values are provided by the linker script and must be trusted as-is.
-+/// - The linker-provided addresses must be u64 aligned.
-+pub fn bss_range_inclusive() -> RangeInclusive<*mut u64> {
-+    let range;
-+    unsafe {
-+        range = RangeInclusive::new(__bss_start.get(), __bss_end_inclusive.get());
-+    }
-+    assert!(!range.is_empty());
-+
-+    range
-+}
-
 diff -uNr 01_wait_forever/src/bsp/raspberrypi.rs 02_runtime_init/src/bsp/raspberrypi.rs
 --- 01_wait_forever/src/bsp/raspberrypi.rs
 +++ 02_runtime_init/src/bsp/raspberrypi.rs
-@@ -4,4 +4,5 @@
+@@ -4,4 +4,4 @@
 
  //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
 -// Coming soon.
 +pub mod cpu;
-+pub mod memory;
 
 diff -uNr 01_wait_forever/src/cpu.rs 02_runtime_init/src/cpu.rs
 --- 01_wait_forever/src/cpu.rs
@@ -316,24 +282,19 @@ diff -uNr 01_wait_forever/src/cpu.rs 02_runtime_init/src/cpu.rs
 diff -uNr 01_wait_forever/src/main.rs 02_runtime_init/src/main.rs
 --- 01_wait_forever/src/main.rs
 +++ 02_runtime_init/src/main.rs
-@@ -102,14 +102,25 @@
+@@ -102,8 +102,8 @@
  //!
  //! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
  //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
-+//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
-+//!
-+//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
++//! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
 -#![feature(asm)]
  #![feature(global_asm)]
  #![no_main]
  #![no_std]
-
- mod bsp;
+@@ -112,4 +112,11 @@
  mod cpu;
-+mod memory;
  mod panic_wait;
-+mod runtime_init;
 
 -// Kernel code coming next tutorial.
 +/// Early init code.
@@ -345,41 +306,6 @@ diff -uNr 01_wait_forever/src/main.rs 02_runtime_init/src/main.rs
 +    panic!()
 +}
 
-diff -uNr 01_wait_forever/src/memory.rs 02_runtime_init/src/memory.rs
---- 01_wait_forever/src/memory.rs
-+++ 02_runtime_init/src/memory.rs
-@@ -0,0 +1,30 @@
-+// SPDX-License-Identifier: MIT OR Apache-2.0
-+//
-+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-+
-+//! Memory Management.
-+
-+use core::ops::RangeInclusive;
-+
-+//--------------------------------------------------------------------------------------------------
-+// Public Code
-+//--------------------------------------------------------------------------------------------------
-+
-+/// Zero out an inclusive memory range.
-+///
-+/// # Safety
-+///
-+/// - `range.start` and `range.end` must be valid.
-+/// - `range.start` and `range.end` must be `T` aligned.
-+pub unsafe fn zero_volatile<T>(range: RangeInclusive<*mut T>)
-+where
-+    T: From<u8>,
-+{
-+    let mut ptr = *range.start();
-+    let end_inclusive = *range.end();
-+
-+    while ptr <= end_inclusive {
-+        core::ptr::write_volatile(ptr, T::from(0));
-+        ptr = ptr.offset(1);
-+    }
-+}
-
 diff -uNr 01_wait_forever/src/panic_wait.rs 02_runtime_init/src/panic_wait.rs
 --- 01_wait_forever/src/panic_wait.rs
 +++ 02_runtime_init/src/panic_wait.rs
@@ -396,46 +322,4 @@ diff -uNr 01_wait_forever/src/panic_wait.rs 02_runtime_init/src/panic_wait.rs
 +    cpu::wait_forever()
  }
 
-diff -uNr 01_wait_forever/src/runtime_init.rs 02_runtime_init/src/runtime_init.rs
---- 01_wait_forever/src/runtime_init.rs
-+++ 02_runtime_init/src/runtime_init.rs
-@@ -0,0 +1,37 @@
-+// SPDX-License-Identifier: MIT OR Apache-2.0
-+//
-+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-+
-+//! Rust runtime initialization code.
-+
-+use crate::{bsp, memory};
-+
-+//--------------------------------------------------------------------------------------------------
-+// Private Code
-+//--------------------------------------------------------------------------------------------------
-+
-+/// Zero out the .bss section.
-+///
-+/// # Safety
-+///
-+/// - Must only be called pre `kernel_init()`.
-+#[inline(always)]
-+unsafe fn zero_bss() {
-+    memory::zero_volatile(bsp::memory::bss_range_inclusive());
-+}
-+
-+//--------------------------------------------------------------------------------------------------
-+// Public Code
-+//--------------------------------------------------------------------------------------------------
-+
-+/// Equivalent to `crt0` or `c0` code in C/C++ world. Clears the `bss` section, then jumps to kernel
-+/// init code.
-+///
-+/// # Safety
-+///
-+/// - Only a single core must be active and running this function.
-+pub unsafe fn runtime_init() -> ! {
-+    zero_bss();
-+
-+    crate::kernel_init()
-+}
-
 ```
diff --git a/02_runtime_init/src/_arch/aarch64/cpu/boot.rs b/02_runtime_init/src/_arch/aarch64/cpu/boot.rs
index c85bb94b8..7513df074 100644
--- a/02_runtime_init/src/_arch/aarch64/cpu/boot.rs
+++ b/02_runtime_init/src/_arch/aarch64/cpu/boot.rs
@@ -11,8 +11,6 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-use crate::runtime_init;
-
 // Assembly counterpart to this file.
 global_asm!(include_str!("boot.s"));
 
@@ -23,11 +21,7 @@ global_asm!(include_str!("boot.s"));
 /// The Rust entry of the `kernel` binary.
 ///
 /// The function is called from the assembly `_start` function.
-///
-/// # Safety
-///
-/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
 #[no_mangle]
 pub unsafe fn _start_rust() -> ! {
-    runtime_init::runtime_init()
+    crate::kernel_init()
 }
diff --git a/02_runtime_init/src/_arch/aarch64/cpu/boot.s b/02_runtime_init/src/_arch/aarch64/cpu/boot.s
index bfa94abf3..f4162c877 100644
--- a/02_runtime_init/src/_arch/aarch64/cpu/boot.s
+++ b/02_runtime_init/src/_arch/aarch64/cpu/boot.s
@@ -34,10 +34,22 @@ _start:
 	and	x1, x1, _core_id_mask
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
-	b.ne	1f
+	b.ne	parking_loop
 
-	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
+	// If execution reaches here, it is the boot core.
 
+	// Initialize DRAM.
+	ADR_REL	x0, __bss_start
+	ADR_REL x1, __bss_end_exclusive
+
+bss_init_loop:
+	cmp	x0, x1
+	b.eq	prepare_rust
+	stp	xzr, xzr, [x0], #16
+	b	bss_init_loop
+
+	// Prepare the jump to Rust code.
+prepare_rust:
 	// Set the stack pointer.
 	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
@@ -46,8 +58,9 @@ _start:
 	b	_start_rust
 
 	// Infinitely wait for events (aka "park the core").
-1:	wfe
-	b	1b
+parking_loop:
+	wfe
+	b	parking_loop
 
 .size	_start, . - _start
 .type	_start, function
diff --git a/02_runtime_init/src/bsp/raspberrypi.rs b/02_runtime_init/src/bsp/raspberrypi.rs
index 10535d7b8..8fed4b83c 100644
--- a/02_runtime_init/src/bsp/raspberrypi.rs
+++ b/02_runtime_init/src/bsp/raspberrypi.rs
@@ -5,4 +5,3 @@
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
 pub mod cpu;
-pub mod memory;
diff --git a/02_runtime_init/src/bsp/raspberrypi/link.ld b/02_runtime_init/src/bsp/raspberrypi/link.ld
index 97ea6d69c..cf63a4a64 100644
--- a/02_runtime_init/src/bsp/raspberrypi/link.ld
+++ b/02_runtime_init/src/bsp/raspberrypi/link.ld
@@ -42,14 +42,12 @@ SECTIONS
     ***********************************************************************************************/
     .data : { *(.data*) } :segment_rw
 
-    /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-    .bss : ALIGN(8)
+    /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
+    .bss : ALIGN(16)
     {
         __bss_start = .;
         *(.bss*);
-        . = ALIGN(8);
-
-        . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-        __bss_end_inclusive = . - 8;
+        . = ALIGN(16);
+        __bss_end_exclusive = .;
     } :NONE
 }
diff --git a/02_runtime_init/src/bsp/raspberrypi/memory.rs b/02_runtime_init/src/bsp/raspberrypi/memory.rs
deleted file mode 100644
index 5c6b1ea5b..000000000
--- a/02_runtime_init/src/bsp/raspberrypi/memory.rs
+++ /dev/null
@@ -1,37 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! BSP Memory Management.
-
-use core::{cell::UnsafeCell, ops::RangeInclusive};
-
-//--------------------------------------------------------------------------------------------------
-// Private Definitions
-//--------------------------------------------------------------------------------------------------
-
-// Symbols from the linker script.
-extern "Rust" {
-    static __bss_start: UnsafeCell<u64>;
-    static __bss_end_inclusive: UnsafeCell<u64>;
-}
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return the inclusive range spanning the .bss section.
-///
-/// # Safety
-///
-/// - Values are provided by the linker script and must be trusted as-is.
-/// - The linker-provided addresses must be u64 aligned.
-pub fn bss_range_inclusive() -> RangeInclusive<*mut u64> {
-    let range;
-    unsafe {
-        range = RangeInclusive::new(__bss_start.get(), __bss_end_inclusive.get());
-    }
-    assert!(!range.is_empty());
-
-    range
-}
diff --git a/02_runtime_init/src/main.rs b/02_runtime_init/src/main.rs
index faad6b091..cf15402fd 100644
--- a/02_runtime_init/src/main.rs
+++ b/02_runtime_init/src/main.rs
@@ -102,9 +102,7 @@
 //!
 //! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
 //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
-//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
-//!
-//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
+//! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
 #![feature(global_asm)]
 #![no_main]
@@ -112,9 +110,7 @@
 
 mod bsp;
 mod cpu;
-mod memory;
 mod panic_wait;
-mod runtime_init;
 
 /// Early init code.
 ///
diff --git a/02_runtime_init/src/memory.rs b/02_runtime_init/src/memory.rs
deleted file mode 100644
index 1f79e0c95..000000000
--- a/02_runtime_init/src/memory.rs
+++ /dev/null
@@ -1,30 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Memory Management.
-
-use core::ops::RangeInclusive;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Zero out an inclusive memory range.
-///
-/// # Safety
-///
-/// - `range.start` and `range.end` must be valid.
-/// - `range.start` and `range.end` must be `T` aligned.
-pub unsafe fn zero_volatile<T>(range: RangeInclusive<*mut T>)
-where
-    T: From<u8>,
-{
-    let mut ptr = *range.start();
-    let end_inclusive = *range.end();
-
-    while ptr <= end_inclusive {
-        core::ptr::write_volatile(ptr, T::from(0));
-        ptr = ptr.offset(1);
-    }
-}
diff --git a/02_runtime_init/src/runtime_init.rs b/02_runtime_init/src/runtime_init.rs
deleted file mode 100644
index ee0946863..000000000
--- a/02_runtime_init/src/runtime_init.rs
+++ /dev/null
@@ -1,37 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Rust runtime initialization code.
-
-use crate::{bsp, memory};
-
-//--------------------------------------------------------------------------------------------------
-// Private Code
-//--------------------------------------------------------------------------------------------------
-
-/// Zero out the .bss section.
-///
-/// # Safety
-///
-/// - Must only be called pre `kernel_init()`.
-#[inline(always)]
-unsafe fn zero_bss() {
-    memory::zero_volatile(bsp::memory::bss_range_inclusive());
-}
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Equivalent to `crt0` or `c0` code in C/C++ world. Clears the `bss` section, then jumps to kernel
-/// init code.
-///
-/// # Safety
-///
-/// - Only a single core must be active and running this function.
-pub unsafe fn runtime_init() -> ! {
-    zero_bss();
-
-    crate::kernel_init()
-}
diff --git a/03_hacky_hello_world/README.md b/03_hacky_hello_world/README.md
index 6958b8bc5..01bbf54cb 100644
--- a/03_hacky_hello_world/README.md
+++ b/03_hacky_hello_world/README.md
@@ -117,13 +117,12 @@ diff -uNr 02_runtime_init/src/bsp/raspberrypi/console.rs 03_hacky_hello_world/sr
 diff -uNr 02_runtime_init/src/bsp/raspberrypi.rs 03_hacky_hello_world/src/bsp/raspberrypi.rs
 --- 02_runtime_init/src/bsp/raspberrypi.rs
 +++ 03_hacky_hello_world/src/bsp/raspberrypi.rs
-@@ -4,5 +4,6 @@
+@@ -4,4 +4,5 @@
 
  //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
 +pub mod console;
  pub mod cpu;
- pub mod memory;
 
 diff -uNr 02_runtime_init/src/console.rs 03_hacky_hello_world/src/console.rs
 --- 02_runtime_init/src/console.rs
@@ -152,9 +151,9 @@ diff -uNr 02_runtime_init/src/console.rs 03_hacky_hello_world/src/console.rs
 diff -uNr 02_runtime_init/src/main.rs 03_hacky_hello_world/src/main.rs
 --- 02_runtime_init/src/main.rs
 +++ 03_hacky_hello_world/src/main.rs
-@@ -106,14 +106,18 @@
- //!
- //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
+@@ -104,13 +104,17 @@
+ //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
+ //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
 +#![feature(format_args_nl)]
  #![feature(global_asm)]
@@ -165,13 +164,12 @@ diff -uNr 02_runtime_init/src/main.rs 03_hacky_hello_world/src/main.rs
  mod bsp;
 +mod console;
  mod cpu;
- mod memory;
  mod panic_wait;
 +mod print;
- mod runtime_init;
 
  /// Early init code.
-@@ -122,5 +126,7 @@
+ ///
+@@ -118,5 +122,7 @@
  ///
  /// - Only a single core must be active and running this function.
  unsafe fn kernel_init() -> ! {
diff --git a/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.rs b/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.rs
index c85bb94b8..7513df074 100644
--- a/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.rs
+++ b/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.rs
@@ -11,8 +11,6 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-use crate::runtime_init;
-
 // Assembly counterpart to this file.
 global_asm!(include_str!("boot.s"));
 
@@ -23,11 +21,7 @@ global_asm!(include_str!("boot.s"));
 /// The Rust entry of the `kernel` binary.
 ///
 /// The function is called from the assembly `_start` function.
-///
-/// # Safety
-///
-/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
 #[no_mangle]
 pub unsafe fn _start_rust() -> ! {
-    runtime_init::runtime_init()
+    crate::kernel_init()
 }
diff --git a/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.s b/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.s
index bfa94abf3..f4162c877 100644
--- a/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.s
+++ b/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.s
@@ -34,10 +34,22 @@ _start:
 	and	x1, x1, _core_id_mask
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
-	b.ne	1f
+	b.ne	parking_loop
 
-	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
+	// If execution reaches here, it is the boot core.
 
+	// Initialize DRAM.
+	ADR_REL	x0, __bss_start
+	ADR_REL x1, __bss_end_exclusive
+
+bss_init_loop:
+	cmp	x0, x1
+	b.eq	prepare_rust
+	stp	xzr, xzr, [x0], #16
+	b	bss_init_loop
+
+	// Prepare the jump to Rust code.
+prepare_rust:
 	// Set the stack pointer.
 	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
@@ -46,8 +58,9 @@ _start:
 	b	_start_rust
 
 	// Infinitely wait for events (aka "park the core").
-1:	wfe
-	b	1b
+parking_loop:
+	wfe
+	b	parking_loop
 
 .size	_start, . - _start
 .type	_start, function
diff --git a/03_hacky_hello_world/src/bsp/raspberrypi.rs b/03_hacky_hello_world/src/bsp/raspberrypi.rs
index fdb7551a1..73863b174 100644
--- a/03_hacky_hello_world/src/bsp/raspberrypi.rs
+++ b/03_hacky_hello_world/src/bsp/raspberrypi.rs
@@ -6,4 +6,3 @@
 
 pub mod console;
 pub mod cpu;
-pub mod memory;
diff --git a/03_hacky_hello_world/src/bsp/raspberrypi/link.ld b/03_hacky_hello_world/src/bsp/raspberrypi/link.ld
index 97ea6d69c..cf63a4a64 100644
--- a/03_hacky_hello_world/src/bsp/raspberrypi/link.ld
+++ b/03_hacky_hello_world/src/bsp/raspberrypi/link.ld
@@ -42,14 +42,12 @@ SECTIONS
     ***********************************************************************************************/
     .data : { *(.data*) } :segment_rw
 
-    /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-    .bss : ALIGN(8)
+    /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
+    .bss : ALIGN(16)
     {
         __bss_start = .;
         *(.bss*);
-        . = ALIGN(8);
-
-        . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-        __bss_end_inclusive = . - 8;
+        . = ALIGN(16);
+        __bss_end_exclusive = .;
     } :NONE
 }
diff --git a/03_hacky_hello_world/src/bsp/raspberrypi/memory.rs b/03_hacky_hello_world/src/bsp/raspberrypi/memory.rs
deleted file mode 100644
index 5c6b1ea5b..000000000
--- a/03_hacky_hello_world/src/bsp/raspberrypi/memory.rs
+++ /dev/null
@@ -1,37 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! BSP Memory Management.
-
-use core::{cell::UnsafeCell, ops::RangeInclusive};
-
-//--------------------------------------------------------------------------------------------------
-// Private Definitions
-//--------------------------------------------------------------------------------------------------
-
-// Symbols from the linker script.
-extern "Rust" {
-    static __bss_start: UnsafeCell<u64>;
-    static __bss_end_inclusive: UnsafeCell<u64>;
-}
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return the inclusive range spanning the .bss section.
-///
-/// # Safety
-///
-/// - Values are provided by the linker script and must be trusted as-is.
-/// - The linker-provided addresses must be u64 aligned.
-pub fn bss_range_inclusive() -> RangeInclusive<*mut u64> {
-    let range;
-    unsafe {
-        range = RangeInclusive::new(__bss_start.get(), __bss_end_inclusive.get());
-    }
-    assert!(!range.is_empty());
-
-    range
-}
diff --git a/03_hacky_hello_world/src/main.rs b/03_hacky_hello_world/src/main.rs
index bc290ddde..de9a05768 100644
--- a/03_hacky_hello_world/src/main.rs
+++ b/03_hacky_hello_world/src/main.rs
@@ -102,9 +102,7 @@
 //!
 //! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
 //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
-//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
-//!
-//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
+//! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
 #![feature(format_args_nl)]
 #![feature(global_asm)]
@@ -115,10 +113,8 @@
 mod bsp;
 mod console;
 mod cpu;
-mod memory;
 mod panic_wait;
 mod print;
-mod runtime_init;
 
 /// Early init code.
 ///
diff --git a/03_hacky_hello_world/src/memory.rs b/03_hacky_hello_world/src/memory.rs
deleted file mode 100644
index 1f79e0c95..000000000
--- a/03_hacky_hello_world/src/memory.rs
+++ /dev/null
@@ -1,30 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Memory Management.
-
-use core::ops::RangeInclusive;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Zero out an inclusive memory range.
-///
-/// # Safety
-///
-/// - `range.start` and `range.end` must be valid.
-/// - `range.start` and `range.end` must be `T` aligned.
-pub unsafe fn zero_volatile<T>(range: RangeInclusive<*mut T>)
-where
-    T: From<u8>,
-{
-    let mut ptr = *range.start();
-    let end_inclusive = *range.end();
-
-    while ptr <= end_inclusive {
-        core::ptr::write_volatile(ptr, T::from(0));
-        ptr = ptr.offset(1);
-    }
-}
diff --git a/03_hacky_hello_world/src/runtime_init.rs b/03_hacky_hello_world/src/runtime_init.rs
deleted file mode 100644
index ee0946863..000000000
--- a/03_hacky_hello_world/src/runtime_init.rs
+++ /dev/null
@@ -1,37 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Rust runtime initialization code.
-
-use crate::{bsp, memory};
-
-//--------------------------------------------------------------------------------------------------
-// Private Code
-//--------------------------------------------------------------------------------------------------
-
-/// Zero out the .bss section.
-///
-/// # Safety
-///
-/// - Must only be called pre `kernel_init()`.
-#[inline(always)]
-unsafe fn zero_bss() {
-    memory::zero_volatile(bsp::memory::bss_range_inclusive());
-}
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Equivalent to `crt0` or `c0` code in C/C++ world. Clears the `bss` section, then jumps to kernel
-/// init code.
-///
-/// # Safety
-///
-/// - Only a single core must be active and running this function.
-pub unsafe fn runtime_init() -> ! {
-    zero_bss();
-
-    crate::kernel_init()
-}
diff --git a/04_safe_globals/README.md b/04_safe_globals/README.md
index 272edfce6..6b7f52c4e 100644
--- a/04_safe_globals/README.md
+++ b/04_safe_globals/README.md
@@ -224,7 +224,7 @@ diff -uNr 03_hacky_hello_world/src/console.rs 04_safe_globals/src/console.rs
 diff -uNr 03_hacky_hello_world/src/main.rs 04_safe_globals/src/main.rs
 --- 03_hacky_hello_world/src/main.rs
 +++ 04_safe_globals/src/main.rs
-@@ -109,6 +109,7 @@
+@@ -107,6 +107,7 @@
  #![feature(format_args_nl)]
  #![feature(global_asm)]
  #![feature(panic_info_message)]
@@ -232,15 +232,15 @@ diff -uNr 03_hacky_hello_world/src/main.rs 04_safe_globals/src/main.rs
  #![no_main]
  #![no_std]
 
-@@ -119,6 +120,7 @@
+@@ -115,6 +116,7 @@
+ mod cpu;
  mod panic_wait;
  mod print;
- mod runtime_init;
 +mod synchronization;
 
  /// Early init code.
  ///
-@@ -126,7 +128,15 @@
+@@ -122,7 +124,15 @@
  ///
  /// - Only a single core must be active and running this function.
  unsafe fn kernel_init() -> ! {
diff --git a/04_safe_globals/src/_arch/aarch64/cpu/boot.rs b/04_safe_globals/src/_arch/aarch64/cpu/boot.rs
index c85bb94b8..7513df074 100644
--- a/04_safe_globals/src/_arch/aarch64/cpu/boot.rs
+++ b/04_safe_globals/src/_arch/aarch64/cpu/boot.rs
@@ -11,8 +11,6 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-use crate::runtime_init;
-
 // Assembly counterpart to this file.
 global_asm!(include_str!("boot.s"));
 
@@ -23,11 +21,7 @@ global_asm!(include_str!("boot.s"));
 /// The Rust entry of the `kernel` binary.
 ///
 /// The function is called from the assembly `_start` function.
-///
-/// # Safety
-///
-/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
 #[no_mangle]
 pub unsafe fn _start_rust() -> ! {
-    runtime_init::runtime_init()
+    crate::kernel_init()
 }
diff --git a/04_safe_globals/src/_arch/aarch64/cpu/boot.s b/04_safe_globals/src/_arch/aarch64/cpu/boot.s
index bfa94abf3..f4162c877 100644
--- a/04_safe_globals/src/_arch/aarch64/cpu/boot.s
+++ b/04_safe_globals/src/_arch/aarch64/cpu/boot.s
@@ -34,10 +34,22 @@ _start:
 	and	x1, x1, _core_id_mask
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
-	b.ne	1f
+	b.ne	parking_loop
 
-	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
+	// If execution reaches here, it is the boot core.
 
+	// Initialize DRAM.
+	ADR_REL	x0, __bss_start
+	ADR_REL x1, __bss_end_exclusive
+
+bss_init_loop:
+	cmp	x0, x1
+	b.eq	prepare_rust
+	stp	xzr, xzr, [x0], #16
+	b	bss_init_loop
+
+	// Prepare the jump to Rust code.
+prepare_rust:
 	// Set the stack pointer.
 	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
@@ -46,8 +58,9 @@ _start:
 	b	_start_rust
 
 	// Infinitely wait for events (aka "park the core").
-1:	wfe
-	b	1b
+parking_loop:
+	wfe
+	b	parking_loop
 
 .size	_start, . - _start
 .type	_start, function
diff --git a/04_safe_globals/src/bsp/raspberrypi.rs b/04_safe_globals/src/bsp/raspberrypi.rs
index fdb7551a1..73863b174 100644
--- a/04_safe_globals/src/bsp/raspberrypi.rs
+++ b/04_safe_globals/src/bsp/raspberrypi.rs
@@ -6,4 +6,3 @@
 
 pub mod console;
 pub mod cpu;
-pub mod memory;
diff --git a/04_safe_globals/src/bsp/raspberrypi/link.ld b/04_safe_globals/src/bsp/raspberrypi/link.ld
index 97ea6d69c..cf63a4a64 100644
--- a/04_safe_globals/src/bsp/raspberrypi/link.ld
+++ b/04_safe_globals/src/bsp/raspberrypi/link.ld
@@ -42,14 +42,12 @@ SECTIONS
     ***********************************************************************************************/
     .data : { *(.data*) } :segment_rw
 
-    /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-    .bss : ALIGN(8)
+    /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
+    .bss : ALIGN(16)
     {
         __bss_start = .;
         *(.bss*);
-        . = ALIGN(8);
-
-        . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-        __bss_end_inclusive = . - 8;
+        . = ALIGN(16);
+        __bss_end_exclusive = .;
     } :NONE
 }
diff --git a/04_safe_globals/src/bsp/raspberrypi/memory.rs b/04_safe_globals/src/bsp/raspberrypi/memory.rs
deleted file mode 100644
index 5c6b1ea5b..000000000
--- a/04_safe_globals/src/bsp/raspberrypi/memory.rs
+++ /dev/null
@@ -1,37 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! BSP Memory Management.
-
-use core::{cell::UnsafeCell, ops::RangeInclusive};
-
-//--------------------------------------------------------------------------------------------------
-// Private Definitions
-//--------------------------------------------------------------------------------------------------
-
-// Symbols from the linker script.
-extern "Rust" {
-    static __bss_start: UnsafeCell<u64>;
-    static __bss_end_inclusive: UnsafeCell<u64>;
-}
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return the inclusive range spanning the .bss section.
-///
-/// # Safety
-///
-/// - Values are provided by the linker script and must be trusted as-is.
-/// - The linker-provided addresses must be u64 aligned.
-pub fn bss_range_inclusive() -> RangeInclusive<*mut u64> {
-    let range;
-    unsafe {
-        range = RangeInclusive::new(__bss_start.get(), __bss_end_inclusive.get());
-    }
-    assert!(!range.is_empty());
-
-    range
-}
diff --git a/04_safe_globals/src/main.rs b/04_safe_globals/src/main.rs
index 48687ace2..82262ea17 100644
--- a/04_safe_globals/src/main.rs
+++ b/04_safe_globals/src/main.rs
@@ -102,9 +102,7 @@
 //!
 //! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
 //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
-//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
-//!
-//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
+//! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
 #![feature(format_args_nl)]
 #![feature(global_asm)]
@@ -116,10 +114,8 @@
 mod bsp;
 mod console;
 mod cpu;
-mod memory;
 mod panic_wait;
 mod print;
-mod runtime_init;
 mod synchronization;
 
 /// Early init code.
diff --git a/04_safe_globals/src/memory.rs b/04_safe_globals/src/memory.rs
deleted file mode 100644
index 1f79e0c95..000000000
--- a/04_safe_globals/src/memory.rs
+++ /dev/null
@@ -1,30 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Memory Management.
-
-use core::ops::RangeInclusive;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Zero out an inclusive memory range.
-///
-/// # Safety
-///
-/// - `range.start` and `range.end` must be valid.
-/// - `range.start` and `range.end` must be `T` aligned.
-pub unsafe fn zero_volatile<T>(range: RangeInclusive<*mut T>)
-where
-    T: From<u8>,
-{
-    let mut ptr = *range.start();
-    let end_inclusive = *range.end();
-
-    while ptr <= end_inclusive {
-        core::ptr::write_volatile(ptr, T::from(0));
-        ptr = ptr.offset(1);
-    }
-}
diff --git a/04_safe_globals/src/runtime_init.rs b/04_safe_globals/src/runtime_init.rs
deleted file mode 100644
index ee0946863..000000000
--- a/04_safe_globals/src/runtime_init.rs
+++ /dev/null
@@ -1,37 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Rust runtime initialization code.
-
-use crate::{bsp, memory};
-
-//--------------------------------------------------------------------------------------------------
-// Private Code
-//--------------------------------------------------------------------------------------------------
-
-/// Zero out the .bss section.
-///
-/// # Safety
-///
-/// - Must only be called pre `kernel_init()`.
-#[inline(always)]
-unsafe fn zero_bss() {
-    memory::zero_volatile(bsp::memory::bss_range_inclusive());
-}
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Equivalent to `crt0` or `c0` code in C/C++ world. Clears the `bss` section, then jumps to kernel
-/// init code.
-///
-/// # Safety
-///
-/// - Only a single core must be active and running this function.
-pub unsafe fn runtime_init() -> ! {
-    zero_bss();
-
-    crate::kernel_init()
-}
diff --git a/05_drivers_gpio_uart/README.md b/05_drivers_gpio_uart/README.md
index b5895cd77..4125583e3 100644
--- a/05_drivers_gpio_uart/README.md
+++ b/05_drivers_gpio_uart/README.md
@@ -1120,10 +1120,14 @@ diff -uNr 04_safe_globals/src/bsp/raspberrypi/driver.rs 05_drivers_gpio_uart/src
 diff -uNr 04_safe_globals/src/bsp/raspberrypi/memory.rs 05_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
 --- 04_safe_globals/src/bsp/raspberrypi/memory.rs
 +++ 05_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
-@@ -17,6 +17,38 @@
- }
-
- //--------------------------------------------------------------------------------------------------
+@@ -0,0 +1,37 @@
++// SPDX-License-Identifier: MIT OR Apache-2.0
++//
++// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
++
++//! BSP Memory Management.
++
++//--------------------------------------------------------------------------------------------------
 +// Public Definitions
 +//--------------------------------------------------------------------------------------------------
 +
@@ -1154,21 +1158,16 @@ diff -uNr 04_safe_globals/src/bsp/raspberrypi/memory.rs 05_drivers_gpio_uart/src
 +        pub const PL011_UART_START: usize = START + UART_OFFSET;
 +    }
 +}
-+
-+//--------------------------------------------------------------------------------------------------
- // Public Code
- //--------------------------------------------------------------------------------------------------
-
 
 diff -uNr 04_safe_globals/src/bsp/raspberrypi.rs 05_drivers_gpio_uart/src/bsp/raspberrypi.rs
 --- 04_safe_globals/src/bsp/raspberrypi.rs
 +++ 05_drivers_gpio_uart/src/bsp/raspberrypi.rs
-@@ -6,4 +6,33 @@
+@@ -6,3 +6,33 @@
 
  pub mod console;
  pub mod cpu;
 +pub mod driver;
- pub mod memory;
++pub mod memory;
 +
 +//--------------------------------------------------------------------------------------------------
 +// Global instances
@@ -1321,24 +1320,24 @@ diff -uNr 04_safe_globals/src/driver.rs 05_drivers_gpio_uart/src/driver.rs
 diff -uNr 04_safe_globals/src/main.rs 05_drivers_gpio_uart/src/main.rs
 --- 04_safe_globals/src/main.rs
 +++ 05_drivers_gpio_uart/src/main.rs
-@@ -106,6 +106,8 @@
- //!
- //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
+@@ -104,6 +104,8 @@
+ //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
+ //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
 +#![allow(clippy::upper_case_acronyms)]
 +#![feature(const_fn_fn_ptr_basics)]
  #![feature(format_args_nl)]
  #![feature(global_asm)]
  #![feature(panic_info_message)]
-@@ -116,6 +118,7 @@
+@@ -114,6 +116,7 @@
  mod bsp;
  mod console;
  mod cpu;
 +mod driver;
- mod memory;
  mod panic_wait;
  mod print;
-@@ -127,16 +130,54 @@
+ mod synchronization;
+@@ -123,16 +126,54 @@
  /// # Safety
  ///
  /// - Only a single core must be active and running this function.
diff --git a/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs b/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs
index c85bb94b8..7513df074 100644
--- a/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs
+++ b/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs
@@ -11,8 +11,6 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-use crate::runtime_init;
-
 // Assembly counterpart to this file.
 global_asm!(include_str!("boot.s"));
 
@@ -23,11 +21,7 @@ global_asm!(include_str!("boot.s"));
 /// The Rust entry of the `kernel` binary.
 ///
 /// The function is called from the assembly `_start` function.
-///
-/// # Safety
-///
-/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
 #[no_mangle]
 pub unsafe fn _start_rust() -> ! {
-    runtime_init::runtime_init()
+    crate::kernel_init()
 }
diff --git a/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s b/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s
index bfa94abf3..f4162c877 100644
--- a/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s
+++ b/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s
@@ -34,10 +34,22 @@ _start:
 	and	x1, x1, _core_id_mask
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
-	b.ne	1f
+	b.ne	parking_loop
 
-	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
+	// If execution reaches here, it is the boot core.
 
+	// Initialize DRAM.
+	ADR_REL	x0, __bss_start
+	ADR_REL x1, __bss_end_exclusive
+
+bss_init_loop:
+	cmp	x0, x1
+	b.eq	prepare_rust
+	stp	xzr, xzr, [x0], #16
+	b	bss_init_loop
+
+	// Prepare the jump to Rust code.
+prepare_rust:
 	// Set the stack pointer.
 	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
@@ -46,8 +58,9 @@ _start:
 	b	_start_rust
 
 	// Infinitely wait for events (aka "park the core").
-1:	wfe
-	b	1b
+parking_loop:
+	wfe
+	b	parking_loop
 
 .size	_start, . - _start
 .type	_start, function
diff --git a/05_drivers_gpio_uart/src/bsp/raspberrypi/link.ld b/05_drivers_gpio_uart/src/bsp/raspberrypi/link.ld
index 97ea6d69c..cf63a4a64 100644
--- a/05_drivers_gpio_uart/src/bsp/raspberrypi/link.ld
+++ b/05_drivers_gpio_uart/src/bsp/raspberrypi/link.ld
@@ -42,14 +42,12 @@ SECTIONS
     ***********************************************************************************************/
     .data : { *(.data*) } :segment_rw
 
-    /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-    .bss : ALIGN(8)
+    /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
+    .bss : ALIGN(16)
     {
         __bss_start = .;
         *(.bss*);
-        . = ALIGN(8);
-
-        . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-        __bss_end_inclusive = . - 8;
+        . = ALIGN(16);
+        __bss_end_exclusive = .;
     } :NONE
 }
diff --git a/05_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs b/05_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
index c6d65e36b..ef397a6f9 100644
--- a/05_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
+++ b/05_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
@@ -4,18 +4,6 @@
 
 //! BSP Memory Management.
 
-use core::{cell::UnsafeCell, ops::RangeInclusive};
-
-//--------------------------------------------------------------------------------------------------
-// Private Definitions
-//--------------------------------------------------------------------------------------------------
-
-// Symbols from the linker script.
-extern "Rust" {
-    static __bss_start: UnsafeCell<u64>;
-    static __bss_end_inclusive: UnsafeCell<u64>;
-}
-
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -47,23 +35,3 @@ pub(super) mod map {
         pub const PL011_UART_START: usize = START + UART_OFFSET;
     }
 }
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return the inclusive range spanning the .bss section.
-///
-/// # Safety
-///
-/// - Values are provided by the linker script and must be trusted as-is.
-/// - The linker-provided addresses must be u64 aligned.
-pub fn bss_range_inclusive() -> RangeInclusive<*mut u64> {
-    let range;
-    unsafe {
-        range = RangeInclusive::new(__bss_start.get(), __bss_end_inclusive.get());
-    }
-    assert!(!range.is_empty());
-
-    range
-}
diff --git a/05_drivers_gpio_uart/src/main.rs b/05_drivers_gpio_uart/src/main.rs
index d72919118..0261a136e 100644
--- a/05_drivers_gpio_uart/src/main.rs
+++ b/05_drivers_gpio_uart/src/main.rs
@@ -102,9 +102,7 @@
 //!
 //! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
 //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
-//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
-//!
-//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
+//! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
 #![allow(clippy::upper_case_acronyms)]
 #![feature(const_fn_fn_ptr_basics)]
@@ -119,10 +117,8 @@ mod bsp;
 mod console;
 mod cpu;
 mod driver;
-mod memory;
 mod panic_wait;
 mod print;
-mod runtime_init;
 mod synchronization;
 
 /// Early init code.
diff --git a/05_drivers_gpio_uart/src/memory.rs b/05_drivers_gpio_uart/src/memory.rs
deleted file mode 100644
index 1f79e0c95..000000000
--- a/05_drivers_gpio_uart/src/memory.rs
+++ /dev/null
@@ -1,30 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Memory Management.
-
-use core::ops::RangeInclusive;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Zero out an inclusive memory range.
-///
-/// # Safety
-///
-/// - `range.start` and `range.end` must be valid.
-/// - `range.start` and `range.end` must be `T` aligned.
-pub unsafe fn zero_volatile<T>(range: RangeInclusive<*mut T>)
-where
-    T: From<u8>,
-{
-    let mut ptr = *range.start();
-    let end_inclusive = *range.end();
-
-    while ptr <= end_inclusive {
-        core::ptr::write_volatile(ptr, T::from(0));
-        ptr = ptr.offset(1);
-    }
-}
diff --git a/05_drivers_gpio_uart/src/runtime_init.rs b/05_drivers_gpio_uart/src/runtime_init.rs
deleted file mode 100644
index ee0946863..000000000
--- a/05_drivers_gpio_uart/src/runtime_init.rs
+++ /dev/null
@@ -1,37 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Rust runtime initialization code.
-
-use crate::{bsp, memory};
-
-//--------------------------------------------------------------------------------------------------
-// Private Code
-//--------------------------------------------------------------------------------------------------
-
-/// Zero out the .bss section.
-///
-/// # Safety
-///
-/// - Must only be called pre `kernel_init()`.
-#[inline(always)]
-unsafe fn zero_bss() {
-    memory::zero_volatile(bsp::memory::bss_range_inclusive());
-}
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Equivalent to `crt0` or `c0` code in C/C++ world. Clears the `bss` section, then jumps to kernel
-/// init code.
-///
-/// # Safety
-///
-/// - Only a single core must be active and running this function.
-pub unsafe fn runtime_init() -> ! {
-    zero_bss();
-
-    crate::kernel_init()
-}
diff --git a/06_uart_chainloader/README.md b/06_uart_chainloader/README.md
index 44fc10282..18741f043 100644
--- a/06_uart_chainloader/README.md
+++ b/06_uart_chainloader/README.md
@@ -232,26 +232,36 @@ diff -uNr 05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s 06_uart_chainloader/
  .equ _core_id_mask, 0b11
 
  //--------------------------------------------------------------------------------------------------
-@@ -34,20 +45,31 @@
- 	and	x1, x1, _core_id_mask
- 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
- 	cmp	x1, x2
--	b.ne	1f
-+	b.ne	2f
-+
-+	// If execution reaches here, it is the boot core.
+@@ -39,23 +50,35 @@
+ 	// If execution reaches here, it is the boot core.
+
+ 	// Initialize DRAM.
+-	ADR_REL	x0, __bss_start
+-	ADR_REL x1, __bss_end_exclusive
++	ADR_ABS	x0, __bss_start
++	ADR_ABS x1, __bss_end_exclusive
+
+ bss_init_loop:
+ 	cmp	x0, x1
+-	b.eq	prepare_rust
++	b.eq	relocate_binary
+ 	stp	xzr, xzr, [x0], #16
+ 	b	bss_init_loop
 
--	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
 +	// Next, relocate the binary.
++relocate_binary:
 +	ADR_REL	x0, __binary_nonzero_start         // The address the binary got loaded to.
 +	ADR_ABS	x1, __binary_nonzero_start         // The address the binary was linked to.
 +	ADR_ABS	x2, __binary_nonzero_end_exclusive
 +
-+1:	ldr	x3, [x0], #8
++copy_loop:
++	ldr	x3, [x0], #8
 +	str	x3, [x1], #8
 +	cmp	x1, x2
-+	b.lo	1b
-
++	b.lo	copy_loop
++
+ 	// Prepare the jump to Rust code.
+-prepare_rust:
  	// Set the stack pointer.
 -	ADR_REL	x0, __boot_core_stack_end_exclusive
 +	ADR_ABS	x0, __boot_core_stack_end_exclusive
@@ -264,13 +274,7 @@ diff -uNr 05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s 06_uart_chainloader/
 +	br	x1
 
  	// Infinitely wait for events (aka "park the core").
--1:	wfe
--	b	1b
-+2:	wfe
-+	b	2b
-
- .size	_start, . - _start
- .type	_start, function
+ parking_loop:
 
 diff -uNr 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 --- 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -350,7 +354,7 @@ diff -uNr 05_drivers_gpio_uart/src/bsp/raspberrypi/link.ld 06_uart_chainloader/s
      .text :
      {
          KEEP(*(.text._start))
-@@ -42,8 +44,12 @@
+@@ -42,6 +44,10 @@
      ***********************************************************************************************/
      .data : { *(.data*) } :segment_rw
 
@@ -358,17 +362,14 @@ diff -uNr 05_drivers_gpio_uart/src/bsp/raspberrypi/link.ld 06_uart_chainloader/s
 +    . = ALIGN(8);
 +    __binary_nonzero_end_exclusive = .;
 +
-     /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
--    .bss : ALIGN(8)
-+    .bss :
+     /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
+     .bss : ALIGN(16)
      {
-         __bss_start = .;
-         *(.bss*);
 
 diff -uNr 05_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs 06_uart_chainloader/src/bsp/raspberrypi/memory.rs
 --- 05_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
 +++ 06_uart_chainloader/src/bsp/raspberrypi/memory.rs
-@@ -23,9 +23,10 @@
+@@ -11,9 +11,10 @@
  /// The board's physical memory map.
  #[rustfmt::skip]
  pub(super) mod map {
@@ -381,34 +382,33 @@ diff -uNr 05_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs 06_uart_chainloader
 
      /// Physical devices.
      #[cfg(feature = "bsp_rpi3")]
-@@ -52,7 +53,13 @@
- // Public Code
- //--------------------------------------------------------------------------------------------------
-
--/// Return the inclusive range spanning the .bss section.
+@@ -35,3 +36,13 @@
+         pub const PL011_UART_START: usize = START + UART_OFFSET;
+     }
+ }
++
++//--------------------------------------------------------------------------------------------------
++// Public Code
++//--------------------------------------------------------------------------------------------------
++
 +/// The address on which the Raspberry firmware loads every binary by default.
 +#[inline(always)]
 +pub fn board_default_load_addr() -> *const u64 {
 +    map::BOARD_DEFAULT_LOAD_ADDRESS as _
 +}
-+
-+/// Return the inclusive range spanning the relocated .bss section.
- ///
- /// # Safety
- ///
 
 diff -uNr 05_drivers_gpio_uart/src/main.rs 06_uart_chainloader/src/main.rs
 --- 05_drivers_gpio_uart/src/main.rs
 +++ 06_uart_chainloader/src/main.rs
-@@ -107,6 +107,7 @@
- //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
+@@ -105,6 +105,7 @@
+ //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
  #![allow(clippy::upper_case_acronyms)]
 +#![feature(asm)]
  #![feature(const_fn_fn_ptr_basics)]
  #![feature(format_args_nl)]
  #![feature(global_asm)]
-@@ -146,38 +147,56 @@
+@@ -142,38 +143,56 @@
      kernel_main()
  }
 
diff --git a/06_uart_chainloader/demo_payload_rpi3.img b/06_uart_chainloader/demo_payload_rpi3.img
index a8d7f680ef624efc1753bb890807835d880967e8..4e640c636357f92152d3c180e30879ff3abcb130 100755
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diff --git a/06_uart_chainloader/demo_payload_rpi4.img b/06_uart_chainloader/demo_payload_rpi4.img
index 2d181336afb87cade1e96e18297d2750aef5ff8e..7e017a42beb30832cd2c7beb0d8e180310445b27 100755
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diff --git a/06_uart_chainloader/src/_arch/aarch64/cpu/boot.rs b/06_uart_chainloader/src/_arch/aarch64/cpu/boot.rs
index c85bb94b8..7513df074 100644
--- a/06_uart_chainloader/src/_arch/aarch64/cpu/boot.rs
+++ b/06_uart_chainloader/src/_arch/aarch64/cpu/boot.rs
@@ -11,8 +11,6 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-use crate::runtime_init;
-
 // Assembly counterpart to this file.
 global_asm!(include_str!("boot.s"));
 
@@ -23,11 +21,7 @@ global_asm!(include_str!("boot.s"));
 /// The Rust entry of the `kernel` binary.
 ///
 /// The function is called from the assembly `_start` function.
-///
-/// # Safety
-///
-/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
 #[no_mangle]
 pub unsafe fn _start_rust() -> ! {
-    runtime_init::runtime_init()
+    crate::kernel_init()
 }
diff --git a/06_uart_chainloader/src/_arch/aarch64/cpu/boot.s b/06_uart_chainloader/src/_arch/aarch64/cpu/boot.s
index 10aebb343..c4ae4219e 100644
--- a/06_uart_chainloader/src/_arch/aarch64/cpu/boot.s
+++ b/06_uart_chainloader/src/_arch/aarch64/cpu/boot.s
@@ -45,20 +45,33 @@ _start:
 	and	x1, x1, _core_id_mask
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
-	b.ne	2f
+	b.ne	parking_loop
 
 	// If execution reaches here, it is the boot core.
 
+	// Initialize DRAM.
+	ADR_ABS	x0, __bss_start
+	ADR_ABS x1, __bss_end_exclusive
+
+bss_init_loop:
+	cmp	x0, x1
+	b.eq	relocate_binary
+	stp	xzr, xzr, [x0], #16
+	b	bss_init_loop
+
 	// Next, relocate the binary.
+relocate_binary:
 	ADR_REL	x0, __binary_nonzero_start         // The address the binary got loaded to.
 	ADR_ABS	x1, __binary_nonzero_start         // The address the binary was linked to.
 	ADR_ABS	x2, __binary_nonzero_end_exclusive
 
-1:	ldr	x3, [x0], #8
+copy_loop:
+	ldr	x3, [x0], #8
 	str	x3, [x1], #8
 	cmp	x1, x2
-	b.lo	1b
+	b.lo	copy_loop
 
+	// Prepare the jump to Rust code.
 	// Set the stack pointer.
 	ADR_ABS	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
@@ -68,8 +81,9 @@ _start:
 	br	x1
 
 	// Infinitely wait for events (aka "park the core").
-2:	wfe
-	b	2b
+parking_loop:
+	wfe
+	b	parking_loop
 
 .size	_start, . - _start
 .type	_start, function
diff --git a/06_uart_chainloader/src/bsp/raspberrypi/link.ld b/06_uart_chainloader/src/bsp/raspberrypi/link.ld
index 324172b19..40added4a 100644
--- a/06_uart_chainloader/src/bsp/raspberrypi/link.ld
+++ b/06_uart_chainloader/src/bsp/raspberrypi/link.ld
@@ -48,14 +48,12 @@ SECTIONS
     . = ALIGN(8);
     __binary_nonzero_end_exclusive = .;
 
-    /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-    .bss :
+    /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
+    .bss : ALIGN(16)
     {
         __bss_start = .;
         *(.bss*);
-        . = ALIGN(8);
-
-        . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-        __bss_end_inclusive = . - 8;
+        . = ALIGN(16);
+        __bss_end_exclusive = .;
     } :NONE
 }
diff --git a/06_uart_chainloader/src/bsp/raspberrypi/memory.rs b/06_uart_chainloader/src/bsp/raspberrypi/memory.rs
index 9a66cc8ac..852b89050 100644
--- a/06_uart_chainloader/src/bsp/raspberrypi/memory.rs
+++ b/06_uart_chainloader/src/bsp/raspberrypi/memory.rs
@@ -4,18 +4,6 @@
 
 //! BSP Memory Management.
 
-use core::{cell::UnsafeCell, ops::RangeInclusive};
-
-//--------------------------------------------------------------------------------------------------
-// Private Definitions
-//--------------------------------------------------------------------------------------------------
-
-// Symbols from the linker script.
-extern "Rust" {
-    static __bss_start: UnsafeCell<u64>;
-    static __bss_end_inclusive: UnsafeCell<u64>;
-}
-
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -58,19 +46,3 @@ pub(super) mod map {
 pub fn board_default_load_addr() -> *const u64 {
     map::BOARD_DEFAULT_LOAD_ADDRESS as _
 }
-
-/// Return the inclusive range spanning the relocated .bss section.
-///
-/// # Safety
-///
-/// - Values are provided by the linker script and must be trusted as-is.
-/// - The linker-provided addresses must be u64 aligned.
-pub fn bss_range_inclusive() -> RangeInclusive<*mut u64> {
-    let range;
-    unsafe {
-        range = RangeInclusive::new(__bss_start.get(), __bss_end_inclusive.get());
-    }
-    assert!(!range.is_empty());
-
-    range
-}
diff --git a/06_uart_chainloader/src/main.rs b/06_uart_chainloader/src/main.rs
index aed10f7a8..5c45cb5f0 100644
--- a/06_uart_chainloader/src/main.rs
+++ b/06_uart_chainloader/src/main.rs
@@ -102,9 +102,7 @@
 //!
 //! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
 //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
-//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
-//!
-//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
+//! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
 #![allow(clippy::upper_case_acronyms)]
 #![feature(asm)]
@@ -120,10 +118,8 @@ mod bsp;
 mod console;
 mod cpu;
 mod driver;
-mod memory;
 mod panic_wait;
 mod print;
-mod runtime_init;
 mod synchronization;
 
 /// Early init code.
diff --git a/06_uart_chainloader/src/memory.rs b/06_uart_chainloader/src/memory.rs
deleted file mode 100644
index 1f79e0c95..000000000
--- a/06_uart_chainloader/src/memory.rs
+++ /dev/null
@@ -1,30 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Memory Management.
-
-use core::ops::RangeInclusive;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Zero out an inclusive memory range.
-///
-/// # Safety
-///
-/// - `range.start` and `range.end` must be valid.
-/// - `range.start` and `range.end` must be `T` aligned.
-pub unsafe fn zero_volatile<T>(range: RangeInclusive<*mut T>)
-where
-    T: From<u8>,
-{
-    let mut ptr = *range.start();
-    let end_inclusive = *range.end();
-
-    while ptr <= end_inclusive {
-        core::ptr::write_volatile(ptr, T::from(0));
-        ptr = ptr.offset(1);
-    }
-}
diff --git a/06_uart_chainloader/src/runtime_init.rs b/06_uart_chainloader/src/runtime_init.rs
deleted file mode 100644
index ee0946863..000000000
--- a/06_uart_chainloader/src/runtime_init.rs
+++ /dev/null
@@ -1,37 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Rust runtime initialization code.
-
-use crate::{bsp, memory};
-
-//--------------------------------------------------------------------------------------------------
-// Private Code
-//--------------------------------------------------------------------------------------------------
-
-/// Zero out the .bss section.
-///
-/// # Safety
-///
-/// - Must only be called pre `kernel_init()`.
-#[inline(always)]
-unsafe fn zero_bss() {
-    memory::zero_volatile(bsp::memory::bss_range_inclusive());
-}
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Equivalent to `crt0` or `c0` code in C/C++ world. Clears the `bss` section, then jumps to kernel
-/// init code.
-///
-/// # Safety
-///
-/// - Only a single core must be active and running this function.
-pub unsafe fn runtime_init() -> ! {
-    zero_bss();
-
-    crate::kernel_init()
-}
diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index 88b829086..25d08f847 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -154,26 +154,36 @@ diff -uNr 06_uart_chainloader/src/_arch/aarch64/cpu/boot.s 07_timestamps/src/_ar
  .equ _core_id_mask, 0b11
 
  //--------------------------------------------------------------------------------------------------
-@@ -45,31 +34,20 @@
- 	and	x1, x1, _core_id_mask
- 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
- 	cmp	x1, x2
--	b.ne	2f
--
--	// If execution reaches here, it is the boot core.
-+	b.ne	1f
+@@ -50,35 +39,23 @@
+ 	// If execution reaches here, it is the boot core.
+
+ 	// Initialize DRAM.
+-	ADR_ABS	x0, __bss_start
+-	ADR_ABS x1, __bss_end_exclusive
++	ADR_REL	x0, __bss_start
++	ADR_REL x1, __bss_end_exclusive
+
+ bss_init_loop:
+ 	cmp	x0, x1
+-	b.eq	relocate_binary
++	b.eq	prepare_rust
+ 	stp	xzr, xzr, [x0], #16
+ 	b	bss_init_loop
 
 -	// Next, relocate the binary.
+-relocate_binary:
 -	ADR_REL	x0, __binary_nonzero_start         // The address the binary got loaded to.
 -	ADR_ABS	x1, __binary_nonzero_start         // The address the binary was linked to.
 -	ADR_ABS	x2, __binary_nonzero_end_exclusive
 -
--1:	ldr	x3, [x0], #8
+-copy_loop:
+-	ldr	x3, [x0], #8
 -	str	x3, [x1], #8
 -	cmp	x1, x2
--	b.lo	1b
-+	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
-
+-	b.lo	copy_loop
+-
+ 	// Prepare the jump to Rust code.
++prepare_rust:
  	// Set the stack pointer.
 -	ADR_ABS	x0, __boot_core_stack_end_exclusive
 +	ADR_REL	x0, __boot_core_stack_end_exclusive
@@ -186,13 +196,7 @@ diff -uNr 06_uart_chainloader/src/_arch/aarch64/cpu/boot.s 07_timestamps/src/_ar
 +	b	_start_rust
 
  	// Infinitely wait for events (aka "park the core").
--2:	wfe
--	b	2b
-+1:	wfe
-+	b	1b
-
- .size	_start, . - _start
- .type	_start, function
+ parking_loop:
 
 diff -uNr 06_uart_chainloader/src/_arch/aarch64/cpu.rs 07_timestamps/src/_arch/aarch64/cpu.rs
 --- 06_uart_chainloader/src/_arch/aarch64/cpu.rs
@@ -438,7 +442,7 @@ diff -uNr 06_uart_chainloader/src/bsp/raspberrypi/link.ld 07_timestamps/src/bsp/
      .text :
      {
          KEEP(*(.text._start))
-@@ -44,12 +42,8 @@
+@@ -44,10 +42,6 @@
      ***********************************************************************************************/
      .data : { *(.data*) } :segment_rw
 
@@ -446,17 +450,14 @@ diff -uNr 06_uart_chainloader/src/bsp/raspberrypi/link.ld 07_timestamps/src/bsp/
 -    . = ALIGN(8);
 -    __binary_nonzero_end_exclusive = .;
 -
-     /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
--    .bss :
-+    .bss : ALIGN(8)
+     /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
+     .bss : ALIGN(16)
      {
-         __bss_start = .;
-         *(.bss*);
 
 diff -uNr 06_uart_chainloader/src/bsp/raspberrypi/memory.rs 07_timestamps/src/bsp/raspberrypi/memory.rs
 --- 06_uart_chainloader/src/bsp/raspberrypi/memory.rs
 +++ 07_timestamps/src/bsp/raspberrypi/memory.rs
-@@ -23,10 +23,9 @@
+@@ -11,10 +11,9 @@
  /// The board's physical memory map.
  #[rustfmt::skip]
  pub(super) mod map {
@@ -469,21 +470,20 @@ diff -uNr 06_uart_chainloader/src/bsp/raspberrypi/memory.rs 07_timestamps/src/bs
 
      /// Physical devices.
      #[cfg(feature = "bsp_rpi3")]
-@@ -53,13 +52,7 @@
- // Public Code
- //--------------------------------------------------------------------------------------------------
-
+@@ -36,13 +35,3 @@
+         pub const PL011_UART_START: usize = START + UART_OFFSET;
+     }
+ }
+-
+-//--------------------------------------------------------------------------------------------------
+-// Public Code
+-//--------------------------------------------------------------------------------------------------
+-
 -/// The address on which the Raspberry firmware loads every binary by default.
 -#[inline(always)]
 -pub fn board_default_load_addr() -> *const u64 {
 -    map::BOARD_DEFAULT_LOAD_ADDRESS as _
 -}
--
--/// Return the inclusive range spanning the relocated .bss section.
-+/// Return the inclusive range spanning the .bss section.
- ///
- /// # Safety
- ///
 
 diff -uNr 06_uart_chainloader/src/cpu.rs 07_timestamps/src/cpu.rs
 --- 06_uart_chainloader/src/cpu.rs
@@ -499,23 +499,23 @@ diff -uNr 06_uart_chainloader/src/cpu.rs 07_timestamps/src/cpu.rs
 diff -uNr 06_uart_chainloader/src/main.rs 07_timestamps/src/main.rs
 --- 06_uart_chainloader/src/main.rs
 +++ 07_timestamps/src/main.rs
-@@ -107,7 +107,6 @@
- //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
+@@ -105,7 +105,6 @@
+ //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
  #![allow(clippy::upper_case_acronyms)]
 -#![feature(asm)]
  #![feature(const_fn_fn_ptr_basics)]
  #![feature(format_args_nl)]
  #![feature(global_asm)]
-@@ -125,6 +124,7 @@
+@@ -121,6 +120,7 @@
+ mod panic_wait;
  mod print;
- mod runtime_init;
  mod synchronization;
 +mod time;
 
  /// Early init code.
  ///
-@@ -147,56 +147,38 @@
+@@ -143,56 +143,38 @@
      kernel_main()
  }
 
diff --git a/07_timestamps/src/_arch/aarch64/cpu/boot.rs b/07_timestamps/src/_arch/aarch64/cpu/boot.rs
index c85bb94b8..7513df074 100644
--- a/07_timestamps/src/_arch/aarch64/cpu/boot.rs
+++ b/07_timestamps/src/_arch/aarch64/cpu/boot.rs
@@ -11,8 +11,6 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-use crate::runtime_init;
-
 // Assembly counterpart to this file.
 global_asm!(include_str!("boot.s"));
 
@@ -23,11 +21,7 @@ global_asm!(include_str!("boot.s"));
 /// The Rust entry of the `kernel` binary.
 ///
 /// The function is called from the assembly `_start` function.
-///
-/// # Safety
-///
-/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
 #[no_mangle]
 pub unsafe fn _start_rust() -> ! {
-    runtime_init::runtime_init()
+    crate::kernel_init()
 }
diff --git a/07_timestamps/src/_arch/aarch64/cpu/boot.s b/07_timestamps/src/_arch/aarch64/cpu/boot.s
index bfa94abf3..f4162c877 100644
--- a/07_timestamps/src/_arch/aarch64/cpu/boot.s
+++ b/07_timestamps/src/_arch/aarch64/cpu/boot.s
@@ -34,10 +34,22 @@ _start:
 	and	x1, x1, _core_id_mask
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
-	b.ne	1f
+	b.ne	parking_loop
 
-	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
+	// If execution reaches here, it is the boot core.
 
+	// Initialize DRAM.
+	ADR_REL	x0, __bss_start
+	ADR_REL x1, __bss_end_exclusive
+
+bss_init_loop:
+	cmp	x0, x1
+	b.eq	prepare_rust
+	stp	xzr, xzr, [x0], #16
+	b	bss_init_loop
+
+	// Prepare the jump to Rust code.
+prepare_rust:
 	// Set the stack pointer.
 	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
@@ -46,8 +58,9 @@ _start:
 	b	_start_rust
 
 	// Infinitely wait for events (aka "park the core").
-1:	wfe
-	b	1b
+parking_loop:
+	wfe
+	b	parking_loop
 
 .size	_start, . - _start
 .type	_start, function
diff --git a/07_timestamps/src/bsp/raspberrypi/link.ld b/07_timestamps/src/bsp/raspberrypi/link.ld
index 97ea6d69c..cf63a4a64 100644
--- a/07_timestamps/src/bsp/raspberrypi/link.ld
+++ b/07_timestamps/src/bsp/raspberrypi/link.ld
@@ -42,14 +42,12 @@ SECTIONS
     ***********************************************************************************************/
     .data : { *(.data*) } :segment_rw
 
-    /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-    .bss : ALIGN(8)
+    /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
+    .bss : ALIGN(16)
     {
         __bss_start = .;
         *(.bss*);
-        . = ALIGN(8);
-
-        . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-        __bss_end_inclusive = . - 8;
+        . = ALIGN(16);
+        __bss_end_exclusive = .;
     } :NONE
 }
diff --git a/07_timestamps/src/bsp/raspberrypi/memory.rs b/07_timestamps/src/bsp/raspberrypi/memory.rs
index c6d65e36b..ef397a6f9 100644
--- a/07_timestamps/src/bsp/raspberrypi/memory.rs
+++ b/07_timestamps/src/bsp/raspberrypi/memory.rs
@@ -4,18 +4,6 @@
 
 //! BSP Memory Management.
 
-use core::{cell::UnsafeCell, ops::RangeInclusive};
-
-//--------------------------------------------------------------------------------------------------
-// Private Definitions
-//--------------------------------------------------------------------------------------------------
-
-// Symbols from the linker script.
-extern "Rust" {
-    static __bss_start: UnsafeCell<u64>;
-    static __bss_end_inclusive: UnsafeCell<u64>;
-}
-
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -47,23 +35,3 @@ pub(super) mod map {
         pub const PL011_UART_START: usize = START + UART_OFFSET;
     }
 }
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return the inclusive range spanning the .bss section.
-///
-/// # Safety
-///
-/// - Values are provided by the linker script and must be trusted as-is.
-/// - The linker-provided addresses must be u64 aligned.
-pub fn bss_range_inclusive() -> RangeInclusive<*mut u64> {
-    let range;
-    unsafe {
-        range = RangeInclusive::new(__bss_start.get(), __bss_end_inclusive.get());
-    }
-    assert!(!range.is_empty());
-
-    range
-}
diff --git a/07_timestamps/src/main.rs b/07_timestamps/src/main.rs
index 54b69275c..1e6bf16a4 100644
--- a/07_timestamps/src/main.rs
+++ b/07_timestamps/src/main.rs
@@ -102,9 +102,7 @@
 //!
 //! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
 //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
-//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
-//!
-//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
+//! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
 #![allow(clippy::upper_case_acronyms)]
 #![feature(const_fn_fn_ptr_basics)]
@@ -119,10 +117,8 @@ mod bsp;
 mod console;
 mod cpu;
 mod driver;
-mod memory;
 mod panic_wait;
 mod print;
-mod runtime_init;
 mod synchronization;
 mod time;
 
diff --git a/07_timestamps/src/memory.rs b/07_timestamps/src/memory.rs
deleted file mode 100644
index 1f79e0c95..000000000
--- a/07_timestamps/src/memory.rs
+++ /dev/null
@@ -1,30 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Memory Management.
-
-use core::ops::RangeInclusive;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Zero out an inclusive memory range.
-///
-/// # Safety
-///
-/// - `range.start` and `range.end` must be valid.
-/// - `range.start` and `range.end` must be `T` aligned.
-pub unsafe fn zero_volatile<T>(range: RangeInclusive<*mut T>)
-where
-    T: From<u8>,
-{
-    let mut ptr = *range.start();
-    let end_inclusive = *range.end();
-
-    while ptr <= end_inclusive {
-        core::ptr::write_volatile(ptr, T::from(0));
-        ptr = ptr.offset(1);
-    }
-}
diff --git a/07_timestamps/src/runtime_init.rs b/07_timestamps/src/runtime_init.rs
deleted file mode 100644
index ee0946863..000000000
--- a/07_timestamps/src/runtime_init.rs
+++ /dev/null
@@ -1,37 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Rust runtime initialization code.
-
-use crate::{bsp, memory};
-
-//--------------------------------------------------------------------------------------------------
-// Private Code
-//--------------------------------------------------------------------------------------------------
-
-/// Zero out the .bss section.
-///
-/// # Safety
-///
-/// - Must only be called pre `kernel_init()`.
-#[inline(always)]
-unsafe fn zero_bss() {
-    memory::zero_volatile(bsp::memory::bss_range_inclusive());
-}
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Equivalent to `crt0` or `c0` code in C/C++ world. Clears the `bss` section, then jumps to kernel
-/// init code.
-///
-/// # Safety
-///
-/// - Only a single core must be active and running this function.
-pub unsafe fn runtime_init() -> ! {
-    zero_bss();
-
-    crate::kernel_init()
-}
diff --git a/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs b/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs
index c85bb94b8..7513df074 100644
--- a/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs
+++ b/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs
@@ -11,8 +11,6 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-use crate::runtime_init;
-
 // Assembly counterpart to this file.
 global_asm!(include_str!("boot.s"));
 
@@ -23,11 +21,7 @@ global_asm!(include_str!("boot.s"));
 /// The Rust entry of the `kernel` binary.
 ///
 /// The function is called from the assembly `_start` function.
-///
-/// # Safety
-///
-/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
 #[no_mangle]
 pub unsafe fn _start_rust() -> ! {
-    runtime_init::runtime_init()
+    crate::kernel_init()
 }
diff --git a/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s b/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s
index bfa94abf3..f4162c877 100644
--- a/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s
+++ b/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s
@@ -34,10 +34,22 @@ _start:
 	and	x1, x1, _core_id_mask
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
-	b.ne	1f
+	b.ne	parking_loop
 
-	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
+	// If execution reaches here, it is the boot core.
 
+	// Initialize DRAM.
+	ADR_REL	x0, __bss_start
+	ADR_REL x1, __bss_end_exclusive
+
+bss_init_loop:
+	cmp	x0, x1
+	b.eq	prepare_rust
+	stp	xzr, xzr, [x0], #16
+	b	bss_init_loop
+
+	// Prepare the jump to Rust code.
+prepare_rust:
 	// Set the stack pointer.
 	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
@@ -46,8 +58,9 @@ _start:
 	b	_start_rust
 
 	// Infinitely wait for events (aka "park the core").
-1:	wfe
-	b	1b
+parking_loop:
+	wfe
+	b	parking_loop
 
 .size	_start, . - _start
 .type	_start, function
diff --git a/08_hw_debug_JTAG/src/bsp/raspberrypi/link.ld b/08_hw_debug_JTAG/src/bsp/raspberrypi/link.ld
index 97ea6d69c..cf63a4a64 100644
--- a/08_hw_debug_JTAG/src/bsp/raspberrypi/link.ld
+++ b/08_hw_debug_JTAG/src/bsp/raspberrypi/link.ld
@@ -42,14 +42,12 @@ SECTIONS
     ***********************************************************************************************/
     .data : { *(.data*) } :segment_rw
 
-    /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-    .bss : ALIGN(8)
+    /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
+    .bss : ALIGN(16)
     {
         __bss_start = .;
         *(.bss*);
-        . = ALIGN(8);
-
-        . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-        __bss_end_inclusive = . - 8;
+        . = ALIGN(16);
+        __bss_end_exclusive = .;
     } :NONE
 }
diff --git a/08_hw_debug_JTAG/src/bsp/raspberrypi/memory.rs b/08_hw_debug_JTAG/src/bsp/raspberrypi/memory.rs
index c6d65e36b..ef397a6f9 100644
--- a/08_hw_debug_JTAG/src/bsp/raspberrypi/memory.rs
+++ b/08_hw_debug_JTAG/src/bsp/raspberrypi/memory.rs
@@ -4,18 +4,6 @@
 
 //! BSP Memory Management.
 
-use core::{cell::UnsafeCell, ops::RangeInclusive};
-
-//--------------------------------------------------------------------------------------------------
-// Private Definitions
-//--------------------------------------------------------------------------------------------------
-
-// Symbols from the linker script.
-extern "Rust" {
-    static __bss_start: UnsafeCell<u64>;
-    static __bss_end_inclusive: UnsafeCell<u64>;
-}
-
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -47,23 +35,3 @@ pub(super) mod map {
         pub const PL011_UART_START: usize = START + UART_OFFSET;
     }
 }
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return the inclusive range spanning the .bss section.
-///
-/// # Safety
-///
-/// - Values are provided by the linker script and must be trusted as-is.
-/// - The linker-provided addresses must be u64 aligned.
-pub fn bss_range_inclusive() -> RangeInclusive<*mut u64> {
-    let range;
-    unsafe {
-        range = RangeInclusive::new(__bss_start.get(), __bss_end_inclusive.get());
-    }
-    assert!(!range.is_empty());
-
-    range
-}
diff --git a/08_hw_debug_JTAG/src/main.rs b/08_hw_debug_JTAG/src/main.rs
index 54b69275c..1e6bf16a4 100644
--- a/08_hw_debug_JTAG/src/main.rs
+++ b/08_hw_debug_JTAG/src/main.rs
@@ -102,9 +102,7 @@
 //!
 //! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
 //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
-//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
-//!
-//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
+//! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
 #![allow(clippy::upper_case_acronyms)]
 #![feature(const_fn_fn_ptr_basics)]
@@ -119,10 +117,8 @@ mod bsp;
 mod console;
 mod cpu;
 mod driver;
-mod memory;
 mod panic_wait;
 mod print;
-mod runtime_init;
 mod synchronization;
 mod time;
 
diff --git a/08_hw_debug_JTAG/src/memory.rs b/08_hw_debug_JTAG/src/memory.rs
deleted file mode 100644
index 1f79e0c95..000000000
--- a/08_hw_debug_JTAG/src/memory.rs
+++ /dev/null
@@ -1,30 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Memory Management.
-
-use core::ops::RangeInclusive;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Zero out an inclusive memory range.
-///
-/// # Safety
-///
-/// - `range.start` and `range.end` must be valid.
-/// - `range.start` and `range.end` must be `T` aligned.
-pub unsafe fn zero_volatile<T>(range: RangeInclusive<*mut T>)
-where
-    T: From<u8>,
-{
-    let mut ptr = *range.start();
-    let end_inclusive = *range.end();
-
-    while ptr <= end_inclusive {
-        core::ptr::write_volatile(ptr, T::from(0));
-        ptr = ptr.offset(1);
-    }
-}
diff --git a/08_hw_debug_JTAG/src/runtime_init.rs b/08_hw_debug_JTAG/src/runtime_init.rs
deleted file mode 100644
index ee0946863..000000000
--- a/08_hw_debug_JTAG/src/runtime_init.rs
+++ /dev/null
@@ -1,37 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Rust runtime initialization code.
-
-use crate::{bsp, memory};
-
-//--------------------------------------------------------------------------------------------------
-// Private Code
-//--------------------------------------------------------------------------------------------------
-
-/// Zero out the .bss section.
-///
-/// # Safety
-///
-/// - Must only be called pre `kernel_init()`.
-#[inline(always)]
-unsafe fn zero_bss() {
-    memory::zero_volatile(bsp::memory::bss_range_inclusive());
-}
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Equivalent to `crt0` or `c0` code in C/C++ world. Clears the `bss` section, then jumps to kernel
-/// init code.
-///
-/// # Safety
-///
-/// - Only a single core must be active and running this function.
-pub unsafe fn runtime_init() -> ! {
-    zero_bss();
-
-    crate::kernel_init()
-}
diff --git a/09_privilege_level/README.md b/09_privilege_level/README.md
index 869c39600..7b4c0d3c0 100644
--- a/09_privilege_level/README.md
+++ b/09_privilege_level/README.md
@@ -62,7 +62,7 @@ Afterwards, we continue with preparing the `EL2` -> `EL1` transition by calling
 pub unsafe extern "C" fn _start_rust(phys_boot_core_stack_end_exclusive_addr: u64) -> ! {
     prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr);
 
-    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
+    // Use `eret` to "return" to EL1. This results in execution of kernel_init() in EL1.
     asm::eret()
 }
 ```
@@ -125,19 +125,16 @@ SPSR_EL2.write(
         + SPSR_EL2::M::EL1h,
 );
 
-// Second, let the link register point to runtime_init().
-ELR_EL2.set(runtime_init::runtime_init as *const () as u64);
+// Second, let the link register point to kernel_init().
+ELR_EL2.set(crate::kernel_init as *const () as u64);
 
 // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it. Since there
 // are no plans to ever return to EL2, just re-use the same stack.
 SP_EL1.set(phys_boot_core_stack_end_exclusive_addr);
 ```
 
-As you can see, we are populating `ELR_EL2` with the address of the [runtime_init()] function that
-we earlier used to call directly from the entrypoint. Finally, we set the stack pointer for
-`SP_EL1`.
-
-[runtime_init()]: src/runtime_init.rs
+As you can see, we are populating `ELR_EL2` with the address of the `kernel_init()` function that we
+earlier used to call directly from the entrypoint. Finally, we set the stack pointer for `SP_EL1`.
 
 You might have noticed that the stack's address was supplied as a function argument. As you might
 remember, in  `_start()` in `boot.s`, we are already setting up the stack for `EL2`. Since there
@@ -151,7 +148,7 @@ Lastly, back in `_start_rust()` a call to `ERET` is made:
 pub unsafe extern "C" fn _start_rust(phys_boot_core_stack_end_exclusive_addr: u64) -> ! {
     prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr);
 
-    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
+    // Use `eret` to "return" to EL1. This results in execution of kernel_init() in EL1.
     asm::eret()
 }
 ```
@@ -214,12 +211,12 @@ diff -uNr 08_hw_debug_JTAG/Cargo.toml 09_privilege_level/Cargo.toml
 diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs 09_privilege_level/src/_arch/aarch64/cpu/boot.rs
 --- 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs
 +++ 09_privilege_level/src/_arch/aarch64/cpu/boot.rs
-@@ -12,11 +12,53 @@
+@@ -11,17 +11,67 @@
+ //!
  //! crate::cpu::boot::arch_boot
 
- use crate::runtime_init;
 +use cortex_a::{asm, regs::*};
-
++
  // Assembly counterpart to this file.
  global_asm!(include_str!("boot.s"));
 
@@ -256,8 +253,8 @@ diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs 09_privilege_level/src/
 +            + SPSR_EL2::M::EL1h,
 +    );
 +
-+    // Second, let the link register point to runtime_init().
-+    ELR_EL2.set(runtime_init::runtime_init as *const () as u64);
++    // Second, let the link register point to kernel_init().
++    ELR_EL2.set(crate::kernel_init as *const () as u64);
 +
 +    // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it. Since there
 +    // are no plans to ever return to EL2, just re-use the same stack.
@@ -268,18 +265,20 @@ diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs 09_privilege_level/src/
  // Public Code
  //--------------------------------------------------------------------------------------------------
 
-@@ -27,7 +69,11 @@
- /// # Safety
+ /// The Rust entry of the `kernel` binary.
  ///
- /// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
-+/// - Exception return from EL2 must must continue execution in EL1 with `runtime_init()`.
+ /// The function is called from the assembly `_start` function.
++///
++/// # Safety
++///
++/// - Exception return from EL2 must must continue execution in EL1 with `kernel_init()`.
  #[no_mangle]
 -pub unsafe fn _start_rust() -> ! {
--    runtime_init::runtime_init()
+-    crate::kernel_init()
 +pub unsafe extern "C" fn _start_rust(phys_boot_core_stack_end_exclusive_addr: u64) -> ! {
 +    prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr);
 +
-+    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
++    // Use `eret` to "return" to EL1. This results in execution of kernel_init() in EL1.
 +    asm::eret()
  }
 
@@ -301,15 +300,15 @@ diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s 09_privilege_level/src/_
 +	// Only proceed if the core executes in EL2. Park it otherwise.
 +	mrs	x0, CurrentEL
 +	cmp	x0, _EL2
-+	b.ne	1f
++	b.ne	parking_loop
 +
  	// Only proceed on the boot core. Park it otherwise.
  	mrs	x1, MPIDR_EL1
  	and	x1, x1, _core_id_mask
-@@ -38,11 +44,11 @@
-
- 	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
+@@ -50,11 +56,11 @@
 
+ 	// Prepare the jump to Rust code.
+ prepare_rust:
 -	// Set the stack pointer.
 +	// Set the stack pointer. This ensures that any code in EL2 that needs the stack will work.
  	ADR_REL	x0, __boot_core_stack_end_exclusive
@@ -499,15 +498,15 @@ diff -uNr 08_hw_debug_JTAG/src/exception.rs 09_privilege_level/src/exception.rs
 diff -uNr 08_hw_debug_JTAG/src/main.rs 09_privilege_level/src/main.rs
 --- 08_hw_debug_JTAG/src/main.rs
 +++ 09_privilege_level/src/main.rs
-@@ -119,6 +119,7 @@
+@@ -117,6 +117,7 @@
  mod console;
  mod cpu;
  mod driver;
 +mod exception;
- mod memory;
  mod panic_wait;
  mod print;
-@@ -149,6 +150,8 @@
+ mod synchronization;
+@@ -145,6 +146,8 @@
 
  /// The main function running after the early init.
  fn kernel_main() -> ! {
@@ -516,7 +515,7 @@ diff -uNr 08_hw_debug_JTAG/src/main.rs 09_privilege_level/src/main.rs
      use core::time::Duration;
      use driver::interface::DriverManager;
      use time::interface::TimeManager;
-@@ -160,6 +163,12 @@
+@@ -156,6 +159,12 @@
      );
      info!("Booting on: {}", bsp::board_name());
 
@@ -529,7 +528,7 @@ diff -uNr 08_hw_debug_JTAG/src/main.rs 09_privilege_level/src/main.rs
      info!(
          "Architectural timer resolution: {} ns",
          time::time_manager().resolution().as_nanos()
-@@ -174,11 +183,15 @@
+@@ -170,11 +179,15 @@
          info!("      {}. {}", i + 1, driver.compatible());
      }
 
diff --git a/09_privilege_level/src/_arch/aarch64/cpu/boot.rs b/09_privilege_level/src/_arch/aarch64/cpu/boot.rs
index 02798fdc0..b743418e6 100644
--- a/09_privilege_level/src/_arch/aarch64/cpu/boot.rs
+++ b/09_privilege_level/src/_arch/aarch64/cpu/boot.rs
@@ -11,7 +11,6 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-use crate::runtime_init;
 use cortex_a::{asm, regs::*};
 
 // Assembly counterpart to this file.
@@ -50,8 +49,8 @@ unsafe fn prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr:
             + SPSR_EL2::M::EL1h,
     );
 
-    // Second, let the link register point to runtime_init().
-    ELR_EL2.set(runtime_init::runtime_init as *const () as u64);
+    // Second, let the link register point to kernel_init().
+    ELR_EL2.set(crate::kernel_init as *const () as u64);
 
     // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it. Since there
     // are no plans to ever return to EL2, just re-use the same stack.
@@ -68,12 +67,11 @@ unsafe fn prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr:
 ///
 /// # Safety
 ///
-/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
-/// - Exception return from EL2 must must continue execution in EL1 with `runtime_init()`.
+/// - Exception return from EL2 must must continue execution in EL1 with `kernel_init()`.
 #[no_mangle]
 pub unsafe extern "C" fn _start_rust(phys_boot_core_stack_end_exclusive_addr: u64) -> ! {
     prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr);
 
-    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
+    // Use `eret` to "return" to EL1. This results in execution of kernel_init() in EL1.
     asm::eret()
 }
diff --git a/09_privilege_level/src/_arch/aarch64/cpu/boot.s b/09_privilege_level/src/_arch/aarch64/cpu/boot.s
index 5696220d0..d1666919a 100644
--- a/09_privilege_level/src/_arch/aarch64/cpu/boot.s
+++ b/09_privilege_level/src/_arch/aarch64/cpu/boot.s
@@ -33,17 +33,29 @@ _start:
 	// Only proceed if the core executes in EL2. Park it otherwise.
 	mrs	x0, CurrentEL
 	cmp	x0, _EL2
-	b.ne	1f
+	b.ne	parking_loop
 
 	// Only proceed on the boot core. Park it otherwise.
 	mrs	x1, MPIDR_EL1
 	and	x1, x1, _core_id_mask
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
-	b.ne	1f
+	b.ne	parking_loop
 
-	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
+	// If execution reaches here, it is the boot core.
 
+	// Initialize DRAM.
+	ADR_REL	x0, __bss_start
+	ADR_REL x1, __bss_end_exclusive
+
+bss_init_loop:
+	cmp	x0, x1
+	b.eq	prepare_rust
+	stp	xzr, xzr, [x0], #16
+	b	bss_init_loop
+
+	// Prepare the jump to Rust code.
+prepare_rust:
 	// Set the stack pointer. This ensures that any code in EL2 that needs the stack will work.
 	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
@@ -52,8 +64,9 @@ _start:
 	b	_start_rust
 
 	// Infinitely wait for events (aka "park the core").
-1:	wfe
-	b	1b
+parking_loop:
+	wfe
+	b	parking_loop
 
 .size	_start, . - _start
 .type	_start, function
diff --git a/09_privilege_level/src/bsp/raspberrypi/link.ld b/09_privilege_level/src/bsp/raspberrypi/link.ld
index 97ea6d69c..cf63a4a64 100644
--- a/09_privilege_level/src/bsp/raspberrypi/link.ld
+++ b/09_privilege_level/src/bsp/raspberrypi/link.ld
@@ -42,14 +42,12 @@ SECTIONS
     ***********************************************************************************************/
     .data : { *(.data*) } :segment_rw
 
-    /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-    .bss : ALIGN(8)
+    /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
+    .bss : ALIGN(16)
     {
         __bss_start = .;
         *(.bss*);
-        . = ALIGN(8);
-
-        . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-        __bss_end_inclusive = . - 8;
+        . = ALIGN(16);
+        __bss_end_exclusive = .;
     } :NONE
 }
diff --git a/09_privilege_level/src/bsp/raspberrypi/memory.rs b/09_privilege_level/src/bsp/raspberrypi/memory.rs
index c6d65e36b..ef397a6f9 100644
--- a/09_privilege_level/src/bsp/raspberrypi/memory.rs
+++ b/09_privilege_level/src/bsp/raspberrypi/memory.rs
@@ -4,18 +4,6 @@
 
 //! BSP Memory Management.
 
-use core::{cell::UnsafeCell, ops::RangeInclusive};
-
-//--------------------------------------------------------------------------------------------------
-// Private Definitions
-//--------------------------------------------------------------------------------------------------
-
-// Symbols from the linker script.
-extern "Rust" {
-    static __bss_start: UnsafeCell<u64>;
-    static __bss_end_inclusive: UnsafeCell<u64>;
-}
-
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -47,23 +35,3 @@ pub(super) mod map {
         pub const PL011_UART_START: usize = START + UART_OFFSET;
     }
 }
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return the inclusive range spanning the .bss section.
-///
-/// # Safety
-///
-/// - Values are provided by the linker script and must be trusted as-is.
-/// - The linker-provided addresses must be u64 aligned.
-pub fn bss_range_inclusive() -> RangeInclusive<*mut u64> {
-    let range;
-    unsafe {
-        range = RangeInclusive::new(__bss_start.get(), __bss_end_inclusive.get());
-    }
-    assert!(!range.is_empty());
-
-    range
-}
diff --git a/09_privilege_level/src/main.rs b/09_privilege_level/src/main.rs
index 5cede7f98..74902def1 100644
--- a/09_privilege_level/src/main.rs
+++ b/09_privilege_level/src/main.rs
@@ -102,9 +102,7 @@
 //!
 //! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
 //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
-//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
-//!
-//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
+//! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
 #![allow(clippy::upper_case_acronyms)]
 #![feature(const_fn_fn_ptr_basics)]
@@ -120,10 +118,8 @@ mod console;
 mod cpu;
 mod driver;
 mod exception;
-mod memory;
 mod panic_wait;
 mod print;
-mod runtime_init;
 mod synchronization;
 mod time;
 
diff --git a/09_privilege_level/src/memory.rs b/09_privilege_level/src/memory.rs
deleted file mode 100644
index 1f79e0c95..000000000
--- a/09_privilege_level/src/memory.rs
+++ /dev/null
@@ -1,30 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Memory Management.
-
-use core::ops::RangeInclusive;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Zero out an inclusive memory range.
-///
-/// # Safety
-///
-/// - `range.start` and `range.end` must be valid.
-/// - `range.start` and `range.end` must be `T` aligned.
-pub unsafe fn zero_volatile<T>(range: RangeInclusive<*mut T>)
-where
-    T: From<u8>,
-{
-    let mut ptr = *range.start();
-    let end_inclusive = *range.end();
-
-    while ptr <= end_inclusive {
-        core::ptr::write_volatile(ptr, T::from(0));
-        ptr = ptr.offset(1);
-    }
-}
diff --git a/09_privilege_level/src/runtime_init.rs b/09_privilege_level/src/runtime_init.rs
deleted file mode 100644
index ee0946863..000000000
--- a/09_privilege_level/src/runtime_init.rs
+++ /dev/null
@@ -1,37 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Rust runtime initialization code.
-
-use crate::{bsp, memory};
-
-//--------------------------------------------------------------------------------------------------
-// Private Code
-//--------------------------------------------------------------------------------------------------
-
-/// Zero out the .bss section.
-///
-/// # Safety
-///
-/// - Must only be called pre `kernel_init()`.
-#[inline(always)]
-unsafe fn zero_bss() {
-    memory::zero_volatile(bsp::memory::bss_range_inclusive());
-}
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Equivalent to `crt0` or `c0` code in C/C++ world. Clears the `bss` section, then jumps to kernel
-/// init code.
-///
-/// # Safety
-///
-/// - Only a single core must be active and running this function.
-pub unsafe fn runtime_init() -> ! {
-    zero_bss();
-
-    crate::kernel_init()
-}
diff --git a/10_virtual_mem_part1_identity_mapping/README.md b/10_virtual_mem_part1_identity_mapping/README.md
index 75ff9c05c..f573de03a 100644
--- a/10_virtual_mem_part1_identity_mapping/README.md
+++ b/10_virtual_mem_part1_identity_mapping/README.md
@@ -939,26 +939,28 @@ diff -uNr 09_privilege_level/src/bsp/raspberrypi/memory/mmu.rs 10_virtual_mem_pa
 diff -uNr 09_privilege_level/src/bsp/raspberrypi/memory.rs 10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs
 --- 09_privilege_level/src/bsp/raspberrypi/memory.rs
 +++ 10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs
-@@ -4,6 +4,8 @@
+@@ -4,6 +4,20 @@
 
  //! BSP Memory Management.
 
 +pub mod mmu;
 +
- use core::{cell::UnsafeCell, ops::RangeInclusive};
-
- //--------------------------------------------------------------------------------------------------
-@@ -12,6 +14,9 @@
-
- // Symbols from the linker script.
- extern "Rust" {
++use core::cell::UnsafeCell;
++
++//--------------------------------------------------------------------------------------------------
++// Private Definitions
++//--------------------------------------------------------------------------------------------------
++
++// Symbols from the linker script.
++extern "Rust" {
 +    static __rx_start: UnsafeCell<()>;
 +    static __rx_end_exclusive: UnsafeCell<()>;
++}
 +
-     static __bss_start: UnsafeCell<u64>;
-     static __bss_end_inclusive: UnsafeCell<u64>;
- }
-@@ -23,6 +28,20 @@
+ //--------------------------------------------------------------------------------------------------
+ // Public Definitions
+ //--------------------------------------------------------------------------------------------------
+@@ -11,6 +25,20 @@
  /// The board's physical memory map.
  #[rustfmt::skip]
  pub(super) mod map {
@@ -979,7 +981,7 @@ diff -uNr 09_privilege_level/src/bsp/raspberrypi/memory.rs 10_virtual_mem_part1_
 
      pub const GPIO_OFFSET:         usize = 0x0020_0000;
      pub const UART_OFFSET:         usize = 0x0020_1000;
-@@ -35,6 +54,7 @@
+@@ -23,6 +51,7 @@
          pub const START:            usize =         0x3F00_0000;
          pub const GPIO_START:       usize = START + GPIO_OFFSET;
          pub const PL011_UART_START: usize = START + UART_OFFSET;
@@ -987,15 +989,15 @@ diff -uNr 09_privilege_level/src/bsp/raspberrypi/memory.rs 10_virtual_mem_part1_
      }
 
      /// Physical devices.
-@@ -45,10 +65,35 @@
+@@ -33,5 +62,30 @@
          pub const START:            usize =         0xFE00_0000;
          pub const GPIO_START:       usize = START + GPIO_OFFSET;
          pub const PL011_UART_START: usize = START + UART_OFFSET;
 +        pub const END_INCLUSIVE:    usize =         0xFF84_FFFF;
      }
  }
-
- //--------------------------------------------------------------------------------------------------
++
++//--------------------------------------------------------------------------------------------------
 +// Private Code
 +//--------------------------------------------------------------------------------------------------
 +
@@ -1018,11 +1020,6 @@ diff -uNr 09_privilege_level/src/bsp/raspberrypi/memory.rs 10_virtual_mem_part1_
 +fn rx_end_exclusive() -> usize {
 +    unsafe { __rx_end_exclusive.get() as usize }
 +}
-+
-+//--------------------------------------------------------------------------------------------------
- // Public Code
- //--------------------------------------------------------------------------------------------------
-
 
 diff -uNr 09_privilege_level/src/bsp.rs 10_virtual_mem_part1_identity_mapping/src/bsp.rs
 --- 09_privilege_level/src/bsp.rs
@@ -1040,8 +1037,8 @@ diff -uNr 09_privilege_level/src/bsp.rs 10_virtual_mem_part1_identity_mapping/sr
 diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/src/main.rs
 --- 09_privilege_level/src/main.rs
 +++ 10_virtual_mem_part1_identity_mapping/src/main.rs
-@@ -107,7 +107,11 @@
- //! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
+@@ -105,7 +105,11 @@
+ //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
  #![allow(clippy::upper_case_acronyms)]
 +#![allow(incomplete_features)]
@@ -1052,7 +1049,15 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
  #![feature(format_args_nl)]
  #![feature(global_asm)]
  #![feature(panic_info_message)]
-@@ -132,9 +136,17 @@
+@@ -118,6 +122,7 @@
+ mod cpu;
+ mod driver;
+ mod exception;
++mod memory;
+ mod panic_wait;
+ mod print;
+ mod synchronization;
+@@ -128,9 +133,17 @@
  /// # Safety
  ///
  /// - Only a single core must be active and running this function.
@@ -1071,7 +1076,7 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
 
      for i in bsp::driver::driver_manager().all_device_drivers().iter() {
          if let Err(x) = i.init() {
-@@ -163,6 +175,9 @@
+@@ -159,6 +172,9 @@
      );
      info!("Booting on: {}", bsp::board_name());
 
@@ -1081,7 +1086,7 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
      let (_, privilege_level) = exception::current_privilege_level();
      info!("Current privilege level: {}", privilege_level);
 
-@@ -186,6 +201,13 @@
+@@ -182,6 +198,13 @@
      info!("Timer test, spinning for 1 second");
      time::time_manager().spin_for(Duration::from_secs(1));
 
@@ -1387,14 +1392,13 @@ diff -uNr 09_privilege_level/src/memory/mmu.rs 10_virtual_mem_part1_identity_map
 diff -uNr 09_privilege_level/src/memory.rs 10_virtual_mem_part1_identity_mapping/src/memory.rs
 --- 09_privilege_level/src/memory.rs
 +++ 10_virtual_mem_part1_identity_mapping/src/memory.rs
-@@ -4,6 +4,8 @@
-
- //! Memory Management.
-
-+pub mod mmu;
+@@ -0,0 +1,7 @@
++// SPDX-License-Identifier: MIT OR Apache-2.0
++//
++// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 +
- use core::ops::RangeInclusive;
-
- //--------------------------------------------------------------------------------------------------
++//! Memory Management.
++
++pub mod mmu;
 
 ```
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs
index 02798fdc0..b743418e6 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs
@@ -11,7 +11,6 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-use crate::runtime_init;
 use cortex_a::{asm, regs::*};
 
 // Assembly counterpart to this file.
@@ -50,8 +49,8 @@ unsafe fn prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr:
             + SPSR_EL2::M::EL1h,
     );
 
-    // Second, let the link register point to runtime_init().
-    ELR_EL2.set(runtime_init::runtime_init as *const () as u64);
+    // Second, let the link register point to kernel_init().
+    ELR_EL2.set(crate::kernel_init as *const () as u64);
 
     // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it. Since there
     // are no plans to ever return to EL2, just re-use the same stack.
@@ -68,12 +67,11 @@ unsafe fn prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr:
 ///
 /// # Safety
 ///
-/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
-/// - Exception return from EL2 must must continue execution in EL1 with `runtime_init()`.
+/// - Exception return from EL2 must must continue execution in EL1 with `kernel_init()`.
 #[no_mangle]
 pub unsafe extern "C" fn _start_rust(phys_boot_core_stack_end_exclusive_addr: u64) -> ! {
     prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr);
 
-    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
+    // Use `eret` to "return" to EL1. This results in execution of kernel_init() in EL1.
     asm::eret()
 }
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.s b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.s
index 5696220d0..d1666919a 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.s
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.s
@@ -33,17 +33,29 @@ _start:
 	// Only proceed if the core executes in EL2. Park it otherwise.
 	mrs	x0, CurrentEL
 	cmp	x0, _EL2
-	b.ne	1f
+	b.ne	parking_loop
 
 	// Only proceed on the boot core. Park it otherwise.
 	mrs	x1, MPIDR_EL1
 	and	x1, x1, _core_id_mask
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
-	b.ne	1f
+	b.ne	parking_loop
 
-	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
+	// If execution reaches here, it is the boot core.
 
+	// Initialize DRAM.
+	ADR_REL	x0, __bss_start
+	ADR_REL x1, __bss_end_exclusive
+
+bss_init_loop:
+	cmp	x0, x1
+	b.eq	prepare_rust
+	stp	xzr, xzr, [x0], #16
+	b	bss_init_loop
+
+	// Prepare the jump to Rust code.
+prepare_rust:
 	// Set the stack pointer. This ensures that any code in EL2 that needs the stack will work.
 	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
@@ -52,8 +64,9 @@ _start:
 	b	_start_rust
 
 	// Infinitely wait for events (aka "park the core").
-1:	wfe
-	b	1b
+parking_loop:
+	wfe
+	b	parking_loop
 
 .size	_start, . - _start
 .type	_start, function
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
index bda0da5e9..485ba49b0 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
@@ -46,14 +46,12 @@ SECTIONS
     ***********************************************************************************************/
     .data : { *(.data*) } :segment_rw
 
-    /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-    .bss : ALIGN(8)
+    /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
+    .bss : ALIGN(16)
     {
         __bss_start = .;
         *(.bss*);
-        . = ALIGN(8);
-
-        . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-        __bss_end_inclusive = . - 8;
+        . = ALIGN(16);
+        __bss_end_exclusive = .;
     } :NONE
 }
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs
index 81233775d..48b1d603a 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs
@@ -6,7 +6,7 @@
 
 pub mod mmu;
 
-use core::{cell::UnsafeCell, ops::RangeInclusive};
+use core::cell::UnsafeCell;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -16,9 +16,6 @@ use core::{cell::UnsafeCell, ops::RangeInclusive};
 extern "Rust" {
     static __rx_start: UnsafeCell<()>;
     static __rx_end_exclusive: UnsafeCell<()>;
-
-    static __bss_start: UnsafeCell<u64>;
-    static __bss_end_inclusive: UnsafeCell<u64>;
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -92,23 +89,3 @@ fn rx_start() -> usize {
 fn rx_end_exclusive() -> usize {
     unsafe { __rx_end_exclusive.get() as usize }
 }
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return the inclusive range spanning the .bss section.
-///
-/// # Safety
-///
-/// - Values are provided by the linker script and must be trusted as-is.
-/// - The linker-provided addresses must be u64 aligned.
-pub fn bss_range_inclusive() -> RangeInclusive<*mut u64> {
-    let range;
-    unsafe {
-        range = RangeInclusive::new(__bss_start.get(), __bss_end_inclusive.get());
-    }
-    assert!(!range.is_empty());
-
-    range
-}
diff --git a/10_virtual_mem_part1_identity_mapping/src/main.rs b/10_virtual_mem_part1_identity_mapping/src/main.rs
index 35f41c0e7..3a1958d6a 100644
--- a/10_virtual_mem_part1_identity_mapping/src/main.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/main.rs
@@ -102,9 +102,7 @@
 //!
 //! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
 //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
-//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
-//!
-//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
+//! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
 #![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
@@ -127,7 +125,6 @@ mod exception;
 mod memory;
 mod panic_wait;
 mod print;
-mod runtime_init;
 mod synchronization;
 mod time;
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/memory.rs b/10_virtual_mem_part1_identity_mapping/src/memory.rs
index e8cc752f5..7959c555e 100644
--- a/10_virtual_mem_part1_identity_mapping/src/memory.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/memory.rs
@@ -5,28 +5,3 @@
 //! Memory Management.
 
 pub mod mmu;
-
-use core::ops::RangeInclusive;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Zero out an inclusive memory range.
-///
-/// # Safety
-///
-/// - `range.start` and `range.end` must be valid.
-/// - `range.start` and `range.end` must be `T` aligned.
-pub unsafe fn zero_volatile<T>(range: RangeInclusive<*mut T>)
-where
-    T: From<u8>,
-{
-    let mut ptr = *range.start();
-    let end_inclusive = *range.end();
-
-    while ptr <= end_inclusive {
-        core::ptr::write_volatile(ptr, T::from(0));
-        ptr = ptr.offset(1);
-    }
-}
diff --git a/10_virtual_mem_part1_identity_mapping/src/runtime_init.rs b/10_virtual_mem_part1_identity_mapping/src/runtime_init.rs
deleted file mode 100644
index ee0946863..000000000
--- a/10_virtual_mem_part1_identity_mapping/src/runtime_init.rs
+++ /dev/null
@@ -1,37 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Rust runtime initialization code.
-
-use crate::{bsp, memory};
-
-//--------------------------------------------------------------------------------------------------
-// Private Code
-//--------------------------------------------------------------------------------------------------
-
-/// Zero out the .bss section.
-///
-/// # Safety
-///
-/// - Must only be called pre `kernel_init()`.
-#[inline(always)]
-unsafe fn zero_bss() {
-    memory::zero_volatile(bsp::memory::bss_range_inclusive());
-}
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Equivalent to `crt0` or `c0` code in C/C++ world. Clears the `bss` section, then jumps to kernel
-/// init code.
-///
-/// # Safety
-///
-/// - Only a single core must be active and running this function.
-pub unsafe fn runtime_init() -> ! {
-    zero_bss();
-
-    crate::kernel_init()
-}
diff --git a/11_exceptions_part1_groundwork/README.md b/11_exceptions_part1_groundwork/README.md
index f9c70824b..77a45ec6d 100644
--- a/11_exceptions_part1_groundwork/README.md
+++ b/11_exceptions_part1_groundwork/README.md
@@ -967,7 +967,7 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/exception.rs 11_exceptions_p
 diff -uNr 10_virtual_mem_part1_identity_mapping/src/main.rs 11_exceptions_part1_groundwork/src/main.rs
 --- 10_virtual_mem_part1_identity_mapping/src/main.rs
 +++ 11_exceptions_part1_groundwork/src/main.rs
-@@ -144,6 +144,8 @@
+@@ -141,6 +141,8 @@
      use driver::interface::DriverManager;
      use memory::mmu::interface::MMU;
 
@@ -976,7 +976,7 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/main.rs 11_exceptions_part1_
      if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
          panic!("MMU: {}", string);
      }
-@@ -201,13 +203,28 @@
+@@ -198,13 +200,28 @@
      info!("Timer test, spinning for 1 second");
      time::time_manager().spin_for(Duration::from_secs(1));
 
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs
index 02798fdc0..b743418e6 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs
@@ -11,7 +11,6 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-use crate::runtime_init;
 use cortex_a::{asm, regs::*};
 
 // Assembly counterpart to this file.
@@ -50,8 +49,8 @@ unsafe fn prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr:
             + SPSR_EL2::M::EL1h,
     );
 
-    // Second, let the link register point to runtime_init().
-    ELR_EL2.set(runtime_init::runtime_init as *const () as u64);
+    // Second, let the link register point to kernel_init().
+    ELR_EL2.set(crate::kernel_init as *const () as u64);
 
     // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it. Since there
     // are no plans to ever return to EL2, just re-use the same stack.
@@ -68,12 +67,11 @@ unsafe fn prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr:
 ///
 /// # Safety
 ///
-/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
-/// - Exception return from EL2 must must continue execution in EL1 with `runtime_init()`.
+/// - Exception return from EL2 must must continue execution in EL1 with `kernel_init()`.
 #[no_mangle]
 pub unsafe extern "C" fn _start_rust(phys_boot_core_stack_end_exclusive_addr: u64) -> ! {
     prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr);
 
-    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
+    // Use `eret` to "return" to EL1. This results in execution of kernel_init() in EL1.
     asm::eret()
 }
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.s b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.s
index 5696220d0..d1666919a 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.s
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.s
@@ -33,17 +33,29 @@ _start:
 	// Only proceed if the core executes in EL2. Park it otherwise.
 	mrs	x0, CurrentEL
 	cmp	x0, _EL2
-	b.ne	1f
+	b.ne	parking_loop
 
 	// Only proceed on the boot core. Park it otherwise.
 	mrs	x1, MPIDR_EL1
 	and	x1, x1, _core_id_mask
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
-	b.ne	1f
+	b.ne	parking_loop
 
-	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
+	// If execution reaches here, it is the boot core.
 
+	// Initialize DRAM.
+	ADR_REL	x0, __bss_start
+	ADR_REL x1, __bss_end_exclusive
+
+bss_init_loop:
+	cmp	x0, x1
+	b.eq	prepare_rust
+	stp	xzr, xzr, [x0], #16
+	b	bss_init_loop
+
+	// Prepare the jump to Rust code.
+prepare_rust:
 	// Set the stack pointer. This ensures that any code in EL2 that needs the stack will work.
 	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
@@ -52,8 +64,9 @@ _start:
 	b	_start_rust
 
 	// Infinitely wait for events (aka "park the core").
-1:	wfe
-	b	1b
+parking_loop:
+	wfe
+	b	parking_loop
 
 .size	_start, . - _start
 .type	_start, function
diff --git a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/link.ld b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/link.ld
index bda0da5e9..485ba49b0 100644
--- a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/link.ld
+++ b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/link.ld
@@ -46,14 +46,12 @@ SECTIONS
     ***********************************************************************************************/
     .data : { *(.data*) } :segment_rw
 
-    /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-    .bss : ALIGN(8)
+    /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
+    .bss : ALIGN(16)
     {
         __bss_start = .;
         *(.bss*);
-        . = ALIGN(8);
-
-        . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-        __bss_end_inclusive = . - 8;
+        . = ALIGN(16);
+        __bss_end_exclusive = .;
     } :NONE
 }
diff --git a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory.rs b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory.rs
index 81233775d..48b1d603a 100644
--- a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory.rs
+++ b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory.rs
@@ -6,7 +6,7 @@
 
 pub mod mmu;
 
-use core::{cell::UnsafeCell, ops::RangeInclusive};
+use core::cell::UnsafeCell;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -16,9 +16,6 @@ use core::{cell::UnsafeCell, ops::RangeInclusive};
 extern "Rust" {
     static __rx_start: UnsafeCell<()>;
     static __rx_end_exclusive: UnsafeCell<()>;
-
-    static __bss_start: UnsafeCell<u64>;
-    static __bss_end_inclusive: UnsafeCell<u64>;
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -92,23 +89,3 @@ fn rx_start() -> usize {
 fn rx_end_exclusive() -> usize {
     unsafe { __rx_end_exclusive.get() as usize }
 }
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return the inclusive range spanning the .bss section.
-///
-/// # Safety
-///
-/// - Values are provided by the linker script and must be trusted as-is.
-/// - The linker-provided addresses must be u64 aligned.
-pub fn bss_range_inclusive() -> RangeInclusive<*mut u64> {
-    let range;
-    unsafe {
-        range = RangeInclusive::new(__bss_start.get(), __bss_end_inclusive.get());
-    }
-    assert!(!range.is_empty());
-
-    range
-}
diff --git a/11_exceptions_part1_groundwork/src/main.rs b/11_exceptions_part1_groundwork/src/main.rs
index 5d00393c4..cd9d0786e 100644
--- a/11_exceptions_part1_groundwork/src/main.rs
+++ b/11_exceptions_part1_groundwork/src/main.rs
@@ -102,9 +102,7 @@
 //!
 //! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
 //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
-//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
-//!
-//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
+//! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
 #![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
@@ -127,7 +125,6 @@ mod exception;
 mod memory;
 mod panic_wait;
 mod print;
-mod runtime_init;
 mod synchronization;
 mod time;
 
diff --git a/11_exceptions_part1_groundwork/src/memory.rs b/11_exceptions_part1_groundwork/src/memory.rs
index e8cc752f5..7959c555e 100644
--- a/11_exceptions_part1_groundwork/src/memory.rs
+++ b/11_exceptions_part1_groundwork/src/memory.rs
@@ -5,28 +5,3 @@
 //! Memory Management.
 
 pub mod mmu;
-
-use core::ops::RangeInclusive;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Zero out an inclusive memory range.
-///
-/// # Safety
-///
-/// - `range.start` and `range.end` must be valid.
-/// - `range.start` and `range.end` must be `T` aligned.
-pub unsafe fn zero_volatile<T>(range: RangeInclusive<*mut T>)
-where
-    T: From<u8>,
-{
-    let mut ptr = *range.start();
-    let end_inclusive = *range.end();
-
-    while ptr <= end_inclusive {
-        core::ptr::write_volatile(ptr, T::from(0));
-        ptr = ptr.offset(1);
-    }
-}
diff --git a/11_exceptions_part1_groundwork/src/runtime_init.rs b/11_exceptions_part1_groundwork/src/runtime_init.rs
deleted file mode 100644
index ee0946863..000000000
--- a/11_exceptions_part1_groundwork/src/runtime_init.rs
+++ /dev/null
@@ -1,37 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Rust runtime initialization code.
-
-use crate::{bsp, memory};
-
-//--------------------------------------------------------------------------------------------------
-// Private Code
-//--------------------------------------------------------------------------------------------------
-
-/// Zero out the .bss section.
-///
-/// # Safety
-///
-/// - Must only be called pre `kernel_init()`.
-#[inline(always)]
-unsafe fn zero_bss() {
-    memory::zero_volatile(bsp::memory::bss_range_inclusive());
-}
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Equivalent to `crt0` or `c0` code in C/C++ world. Clears the `bss` section, then jumps to kernel
-/// init code.
-///
-/// # Safety
-///
-/// - Only a single core must be active and running this function.
-pub unsafe fn runtime_init() -> ! {
-    zero_bss();
-
-    crate::kernel_init()
-}
diff --git a/12_integrated_testing/README.md b/12_integrated_testing/README.md
index cff8587b9..d252d0c23 100644
--- a/12_integrated_testing/README.md
+++ b/12_integrated_testing/README.md
@@ -215,25 +215,24 @@ kernel boot:
 
 | | Function  | File |
 | - | - | - |
-| 1. | `_start()` | `lib.rs` |
-| 2. | (some more aarch64 code) | `lib.rs` |
-| 3. | `runtime_init()` | `lib.rs` |
-| 4. | `kernel_init()` | `main.rs` |
-| 5. | `kernel_main()` | `main.rs` |
+| 1. | `_start()` | The library's `boot.s` |
+| 2. | (some more aarch64 code) | The library's `boot.rs` |
+| 3. | `kernel_init()` | `main.rs` |
+| 4. | `kernel_main()` | `main.rs` |
 
 A function named `main` is never called. Hence, the `main()` function generated by `cargo test`
-would be silently dropped, and therefore the tests would never be executed. As you can see,
-`runtime_init()` is the last function residing in our carved-out `lib.rs`, and it calls into
-`kernel_init()`. So in order to get the tests to execute, we add a test-environment version of
-`kernel_init()` to `lib.rs` as well (conditional compilation ensures it is only present when the
-test flag is set), and call the `cargo test` generated `main()` function from there.
+would be silently dropped, and therefore the tests would never be executed. As you can see, the
+first function getting called in our carved-out `main.rs` is `kernel_init()`. So in order to get the
+tests to execute, we add a test-environment version of `kernel_init()` to `lib.rs` as well
+(conditional compilation ensures it is only present when the test flag is set), and call the `cargo
+test` generated `main()` function from there.
 
 This is where `#![reexport_test_harness_main = "test_main"]` finally comes into picture. It declares
 the name of the generated main function so that we can manually call it. Here is the final
 implementation in `lib.rs`:
 
 ```rust
-/// The `kernel_init()` for unit tests. Called from `runtime_init()`.
+/// The `kernel_init()` for unit tests.
 #[cfg(test)]
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
@@ -1073,7 +1072,7 @@ diff -uNr 11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translatio
 diff -uNr 11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs 12_integrated_testing/src/_arch/aarch64/memory/mmu.rs
 --- 11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
 +++ 12_integrated_testing/src/_arch/aarch64/memory/mmu.rs
-@@ -162,3 +162,22 @@
+@@ -162,3 +162,33 @@
          SCTLR_EL1.matches_all(SCTLR_EL1::M::Enable)
      }
  }
@@ -1085,12 +1084,23 @@ diff -uNr 11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs 12_inte
 +#[cfg(test)]
 +mod tests {
 +    use super::*;
++    use core::{cell::UnsafeCell, ops::Range};
 +    use test_macros::kernel_test;
 +
 +    /// Check if KERNEL_TABLES is in .bss.
 +    #[kernel_test]
 +    fn kernel_tables_in_bss() {
-+        let bss_range = bsp::memory::bss_range_inclusive();
++        extern "Rust" {
++            static __bss_start: UnsafeCell<u64>;
++            static __bss_end_exclusive: UnsafeCell<u64>;
++        }
++
++        let bss_range = unsafe {
++            Range {
++                start: __bss_start.get(),
++                end: __bss_end_exclusive.get(),
++            }
++        };
 +        let kernel_tables_addr = unsafe { &KERNEL_TABLES as *const _ as usize as *mut u64 };
 +
 +        assert!(bss_range.contains(&kernel_tables_addr));
@@ -1207,7 +1217,7 @@ diff -uNr 11_exceptions_part1_groundwork/src/exception.rs 12_integrated_testing/
 diff -uNr 11_exceptions_part1_groundwork/src/lib.rs 12_integrated_testing/src/lib.rs
 --- 11_exceptions_part1_groundwork/src/lib.rs
 +++ 12_integrated_testing/src/lib.rs
-@@ -0,0 +1,184 @@
+@@ -0,0 +1,186 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -1314,9 +1324,7 @@ diff -uNr 11_exceptions_part1_groundwork/src/lib.rs 12_integrated_testing/src/li
 +//!
 +//! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
 +//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
-+//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
-+//!
-+//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
++//! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 +
 +#![allow(clippy::upper_case_acronyms)]
 +#![allow(incomplete_features)]
@@ -1337,7 +1345,6 @@ diff -uNr 11_exceptions_part1_groundwork/src/lib.rs 12_integrated_testing/src/li
 +#![test_runner(crate::test_runner)]
 +
 +mod panic_wait;
-+mod runtime_init;
 +mod synchronization;
 +
 +pub mod bsp;
@@ -1362,6 +1369,11 @@ diff -uNr 11_exceptions_part1_groundwork/src/lib.rs 12_integrated_testing/src/li
 +    )
 +}
 +
++#[cfg(not(test))]
++extern "Rust" {
++    fn kernel_init() -> !;
++}
++
 +//--------------------------------------------------------------------------------------------------
 +// Testing
 +//--------------------------------------------------------------------------------------------------
@@ -1381,7 +1393,7 @@ diff -uNr 11_exceptions_part1_groundwork/src/lib.rs 12_integrated_testing/src/li
 +    }
 +}
 +
-+/// The `kernel_init()` for unit tests. Called from `runtime_init()`.
++/// The `kernel_init()` for unit tests.
 +#[cfg(test)]
 +#[no_mangle]
 +unsafe fn kernel_init() -> ! {
@@ -1396,7 +1408,7 @@ diff -uNr 11_exceptions_part1_groundwork/src/lib.rs 12_integrated_testing/src/li
 diff -uNr 11_exceptions_part1_groundwork/src/main.rs 12_integrated_testing/src/main.rs
 --- 11_exceptions_part1_groundwork/src/main.rs
 +++ 12_integrated_testing/src/main.rs
-@@ -6,130 +6,12 @@
+@@ -6,127 +6,12 @@
  #![doc(html_logo_url = "https://git.io/JeGIp")]
 
  //! The `kernel` binary.
@@ -1496,9 +1508,7 @@ diff -uNr 11_exceptions_part1_groundwork/src/main.rs 12_integrated_testing/src/m
 -//!
 -//! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
 -//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
--//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
--//!
--//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
+-//! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 -
 -#![allow(clippy::upper_case_acronyms)]
 -#![allow(incomplete_features)]
@@ -1522,14 +1532,13 @@ diff -uNr 11_exceptions_part1_groundwork/src/main.rs 12_integrated_testing/src/m
 -mod memory;
 -mod panic_wait;
 -mod print;
--mod runtime_init;
 -mod synchronization;
 -mod time;
 +use libkernel::{bsp, console, driver, exception, info, memory, time};
 
  /// Early init code.
  ///
-@@ -140,6 +22,7 @@
+@@ -137,6 +22,7 @@
  ///     - MMU + Data caching must be activated at the earliest. Without it, any atomic operations,
  ///       e.g. the yet-to-be-introduced spinlocks in the device drivers (which currently employ
  ///       NullLocks instead of spinlocks), will fail to work (properly) on the RPi SoCs.
@@ -1537,7 +1546,7 @@ diff -uNr 11_exceptions_part1_groundwork/src/main.rs 12_integrated_testing/src/m
  unsafe fn kernel_init() -> ! {
      use driver::interface::DriverManager;
      use memory::mmu::interface::MMU;
-@@ -166,15 +49,9 @@
+@@ -163,15 +49,9 @@
  fn kernel_main() -> ! {
      use bsp::console::console;
      use console::interface::All;
@@ -1554,7 +1563,7 @@ diff -uNr 11_exceptions_part1_groundwork/src/main.rs 12_integrated_testing/src/m
      info!("Booting on: {}", bsp::board_name());
 
      info!("MMU online. Special regions:");
-@@ -200,31 +77,6 @@
+@@ -197,31 +77,6 @@
          info!("      {}. {}", i + 1, driver.compatible());
      }
 
@@ -1609,51 +1618,6 @@ diff -uNr 11_exceptions_part1_groundwork/src/memory/mmu.rs 12_integrated_testing
 +    }
  }
 
-diff -uNr 11_exceptions_part1_groundwork/src/memory.rs 12_integrated_testing/src/memory.rs
---- 11_exceptions_part1_groundwork/src/memory.rs
-+++ 12_integrated_testing/src/memory.rs
-@@ -30,3 +30,40 @@
-         ptr = ptr.offset(1);
-     }
- }
-+
-+//--------------------------------------------------------------------------------------------------
-+// Testing
-+//--------------------------------------------------------------------------------------------------
-+
-+#[cfg(test)]
-+mod tests {
-+    use super::*;
-+    use test_macros::kernel_test;
-+
-+    /// Check `zero_volatile()`.
-+    #[kernel_test]
-+    fn zero_volatile_works() {
-+        let mut x: [usize; 3] = [10, 11, 12];
-+        let x_range = x.as_mut_ptr_range();
-+        let x_range_inclusive =
-+            RangeInclusive::new(x_range.start, unsafe { x_range.end.offset(-1) });
-+
-+        unsafe { zero_volatile(x_range_inclusive) };
-+
-+        assert_eq!(x, [0, 0, 0]);
-+    }
-+
-+    /// Check `bss` section layout.
-+    #[kernel_test]
-+    fn bss_section_is_sane() {
-+        use crate::bsp::memory::bss_range_inclusive;
-+        use core::mem;
-+
-+        let start = *bss_range_inclusive().start() as usize;
-+        let end = *bss_range_inclusive().end() as usize;
-+
-+        assert_eq!(start modulo mem::size_of::<usize>(), 0);
-+        assert_eq!(end modulo mem::size_of::<usize>(), 0);
-+        assert!(end >= start);
-+    }
-+}
-
 diff -uNr 11_exceptions_part1_groundwork/src/panic_wait.rs 12_integrated_testing/src/panic_wait.rs
 --- 11_exceptions_part1_groundwork/src/panic_wait.rs
 +++ 12_integrated_testing/src/panic_wait.rs
@@ -1689,23 +1653,6 @@ diff -uNr 11_exceptions_part1_groundwork/src/panic_wait.rs 12_integrated_testing
 +    _panic_exit()
  }
 
-diff -uNr 11_exceptions_part1_groundwork/src/runtime_init.rs 12_integrated_testing/src/runtime_init.rs
---- 11_exceptions_part1_groundwork/src/runtime_init.rs
-+++ 12_integrated_testing/src/runtime_init.rs
-@@ -31,7 +31,10 @@
- ///
- /// - Only a single core must be active and running this function.
- pub unsafe fn runtime_init() -> ! {
--    zero_bss();
-+    extern "Rust" {
-+        fn kernel_init() -> !;
-+    }
-
--    crate::kernel_init()
-+    zero_bss();
-+    kernel_init()
- }
-
 diff -uNr 11_exceptions_part1_groundwork/test-macros/Cargo.toml 12_integrated_testing/test-macros/Cargo.toml
 --- 11_exceptions_part1_groundwork/test-macros/Cargo.toml
 +++ 12_integrated_testing/test-macros/Cargo.toml
diff --git a/12_integrated_testing/src/_arch/aarch64/cpu/boot.rs b/12_integrated_testing/src/_arch/aarch64/cpu/boot.rs
index 02798fdc0..b743418e6 100644
--- a/12_integrated_testing/src/_arch/aarch64/cpu/boot.rs
+++ b/12_integrated_testing/src/_arch/aarch64/cpu/boot.rs
@@ -11,7 +11,6 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-use crate::runtime_init;
 use cortex_a::{asm, regs::*};
 
 // Assembly counterpart to this file.
@@ -50,8 +49,8 @@ unsafe fn prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr:
             + SPSR_EL2::M::EL1h,
     );
 
-    // Second, let the link register point to runtime_init().
-    ELR_EL2.set(runtime_init::runtime_init as *const () as u64);
+    // Second, let the link register point to kernel_init().
+    ELR_EL2.set(crate::kernel_init as *const () as u64);
 
     // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it. Since there
     // are no plans to ever return to EL2, just re-use the same stack.
@@ -68,12 +67,11 @@ unsafe fn prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr:
 ///
 /// # Safety
 ///
-/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
-/// - Exception return from EL2 must must continue execution in EL1 with `runtime_init()`.
+/// - Exception return from EL2 must must continue execution in EL1 with `kernel_init()`.
 #[no_mangle]
 pub unsafe extern "C" fn _start_rust(phys_boot_core_stack_end_exclusive_addr: u64) -> ! {
     prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr);
 
-    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
+    // Use `eret` to "return" to EL1. This results in execution of kernel_init() in EL1.
     asm::eret()
 }
diff --git a/12_integrated_testing/src/_arch/aarch64/cpu/boot.s b/12_integrated_testing/src/_arch/aarch64/cpu/boot.s
index 5696220d0..d1666919a 100644
--- a/12_integrated_testing/src/_arch/aarch64/cpu/boot.s
+++ b/12_integrated_testing/src/_arch/aarch64/cpu/boot.s
@@ -33,17 +33,29 @@ _start:
 	// Only proceed if the core executes in EL2. Park it otherwise.
 	mrs	x0, CurrentEL
 	cmp	x0, _EL2
-	b.ne	1f
+	b.ne	parking_loop
 
 	// Only proceed on the boot core. Park it otherwise.
 	mrs	x1, MPIDR_EL1
 	and	x1, x1, _core_id_mask
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
-	b.ne	1f
+	b.ne	parking_loop
 
-	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
+	// If execution reaches here, it is the boot core.
 
+	// Initialize DRAM.
+	ADR_REL	x0, __bss_start
+	ADR_REL x1, __bss_end_exclusive
+
+bss_init_loop:
+	cmp	x0, x1
+	b.eq	prepare_rust
+	stp	xzr, xzr, [x0], #16
+	b	bss_init_loop
+
+	// Prepare the jump to Rust code.
+prepare_rust:
 	// Set the stack pointer. This ensures that any code in EL2 that needs the stack will work.
 	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
@@ -52,8 +64,9 @@ _start:
 	b	_start_rust
 
 	// Infinitely wait for events (aka "park the core").
-1:	wfe
-	b	1b
+parking_loop:
+	wfe
+	b	parking_loop
 
 .size	_start, . - _start
 .type	_start, function
diff --git a/12_integrated_testing/src/_arch/aarch64/memory/mmu.rs b/12_integrated_testing/src/_arch/aarch64/memory/mmu.rs
index 29e8125d7..a706290bd 100644
--- a/12_integrated_testing/src/_arch/aarch64/memory/mmu.rs
+++ b/12_integrated_testing/src/_arch/aarch64/memory/mmu.rs
@@ -170,12 +170,23 @@ impl memory::mmu::interface::MMU for MemoryManagementUnit {
 #[cfg(test)]
 mod tests {
     use super::*;
+    use core::{cell::UnsafeCell, ops::Range};
     use test_macros::kernel_test;
 
     /// Check if KERNEL_TABLES is in .bss.
     #[kernel_test]
     fn kernel_tables_in_bss() {
-        let bss_range = bsp::memory::bss_range_inclusive();
+        extern "Rust" {
+            static __bss_start: UnsafeCell<u64>;
+            static __bss_end_exclusive: UnsafeCell<u64>;
+        }
+
+        let bss_range = unsafe {
+            Range {
+                start: __bss_start.get(),
+                end: __bss_end_exclusive.get(),
+            }
+        };
         let kernel_tables_addr = unsafe { &KERNEL_TABLES as *const _ as usize as *mut u64 };
 
         assert!(bss_range.contains(&kernel_tables_addr));
diff --git a/12_integrated_testing/src/bsp/raspberrypi/link.ld b/12_integrated_testing/src/bsp/raspberrypi/link.ld
index bda0da5e9..485ba49b0 100644
--- a/12_integrated_testing/src/bsp/raspberrypi/link.ld
+++ b/12_integrated_testing/src/bsp/raspberrypi/link.ld
@@ -46,14 +46,12 @@ SECTIONS
     ***********************************************************************************************/
     .data : { *(.data*) } :segment_rw
 
-    /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-    .bss : ALIGN(8)
+    /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
+    .bss : ALIGN(16)
     {
         __bss_start = .;
         *(.bss*);
-        . = ALIGN(8);
-
-        . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-        __bss_end_inclusive = . - 8;
+        . = ALIGN(16);
+        __bss_end_exclusive = .;
     } :NONE
 }
diff --git a/12_integrated_testing/src/bsp/raspberrypi/memory.rs b/12_integrated_testing/src/bsp/raspberrypi/memory.rs
index 81233775d..48b1d603a 100644
--- a/12_integrated_testing/src/bsp/raspberrypi/memory.rs
+++ b/12_integrated_testing/src/bsp/raspberrypi/memory.rs
@@ -6,7 +6,7 @@
 
 pub mod mmu;
 
-use core::{cell::UnsafeCell, ops::RangeInclusive};
+use core::cell::UnsafeCell;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -16,9 +16,6 @@ use core::{cell::UnsafeCell, ops::RangeInclusive};
 extern "Rust" {
     static __rx_start: UnsafeCell<()>;
     static __rx_end_exclusive: UnsafeCell<()>;
-
-    static __bss_start: UnsafeCell<u64>;
-    static __bss_end_inclusive: UnsafeCell<u64>;
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -92,23 +89,3 @@ fn rx_start() -> usize {
 fn rx_end_exclusive() -> usize {
     unsafe { __rx_end_exclusive.get() as usize }
 }
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return the inclusive range spanning the .bss section.
-///
-/// # Safety
-///
-/// - Values are provided by the linker script and must be trusted as-is.
-/// - The linker-provided addresses must be u64 aligned.
-pub fn bss_range_inclusive() -> RangeInclusive<*mut u64> {
-    let range;
-    unsafe {
-        range = RangeInclusive::new(__bss_start.get(), __bss_end_inclusive.get());
-    }
-    assert!(!range.is_empty());
-
-    range
-}
diff --git a/12_integrated_testing/src/lib.rs b/12_integrated_testing/src/lib.rs
index 1e315b4da..9890351f9 100644
--- a/12_integrated_testing/src/lib.rs
+++ b/12_integrated_testing/src/lib.rs
@@ -104,9 +104,7 @@
 //!
 //! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
 //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
-//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
-//!
-//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
+//! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
 #![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
@@ -127,7 +125,6 @@
 #![test_runner(crate::test_runner)]
 
 mod panic_wait;
-mod runtime_init;
 mod synchronization;
 
 pub mod bsp;
@@ -152,6 +149,11 @@ pub fn version() -> &'static str {
     )
 }
 
+#[cfg(not(test))]
+extern "Rust" {
+    fn kernel_init() -> !;
+}
+
 //--------------------------------------------------------------------------------------------------
 // Testing
 //--------------------------------------------------------------------------------------------------
@@ -171,7 +173,7 @@ pub fn test_runner(tests: &[&test_types::UnitTest]) {
     }
 }
 
-/// The `kernel_init()` for unit tests. Called from `runtime_init()`.
+/// The `kernel_init()` for unit tests.
 #[cfg(test)]
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
diff --git a/12_integrated_testing/src/memory.rs b/12_integrated_testing/src/memory.rs
index 1ef0285a6..7959c555e 100644
--- a/12_integrated_testing/src/memory.rs
+++ b/12_integrated_testing/src/memory.rs
@@ -5,65 +5,3 @@
 //! Memory Management.
 
 pub mod mmu;
-
-use core::ops::RangeInclusive;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Zero out an inclusive memory range.
-///
-/// # Safety
-///
-/// - `range.start` and `range.end` must be valid.
-/// - `range.start` and `range.end` must be `T` aligned.
-pub unsafe fn zero_volatile<T>(range: RangeInclusive<*mut T>)
-where
-    T: From<u8>,
-{
-    let mut ptr = *range.start();
-    let end_inclusive = *range.end();
-
-    while ptr <= end_inclusive {
-        core::ptr::write_volatile(ptr, T::from(0));
-        ptr = ptr.offset(1);
-    }
-}
-
-//--------------------------------------------------------------------------------------------------
-// Testing
-//--------------------------------------------------------------------------------------------------
-
-#[cfg(test)]
-mod tests {
-    use super::*;
-    use test_macros::kernel_test;
-
-    /// Check `zero_volatile()`.
-    #[kernel_test]
-    fn zero_volatile_works() {
-        let mut x: [usize; 3] = [10, 11, 12];
-        let x_range = x.as_mut_ptr_range();
-        let x_range_inclusive =
-            RangeInclusive::new(x_range.start, unsafe { x_range.end.offset(-1) });
-
-        unsafe { zero_volatile(x_range_inclusive) };
-
-        assert_eq!(x, [0, 0, 0]);
-    }
-
-    /// Check `bss` section layout.
-    #[kernel_test]
-    fn bss_section_is_sane() {
-        use crate::bsp::memory::bss_range_inclusive;
-        use core::mem;
-
-        let start = *bss_range_inclusive().start() as usize;
-        let end = *bss_range_inclusive().end() as usize;
-
-        assert_eq!(start % mem::size_of::<usize>(), 0);
-        assert_eq!(end % mem::size_of::<usize>(), 0);
-        assert!(end >= start);
-    }
-}
diff --git a/12_integrated_testing/src/runtime_init.rs b/12_integrated_testing/src/runtime_init.rs
deleted file mode 100644
index 0a1c685cd..000000000
--- a/12_integrated_testing/src/runtime_init.rs
+++ /dev/null
@@ -1,40 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Rust runtime initialization code.
-
-use crate::{bsp, memory};
-
-//--------------------------------------------------------------------------------------------------
-// Private Code
-//--------------------------------------------------------------------------------------------------
-
-/// Zero out the .bss section.
-///
-/// # Safety
-///
-/// - Must only be called pre `kernel_init()`.
-#[inline(always)]
-unsafe fn zero_bss() {
-    memory::zero_volatile(bsp::memory::bss_range_inclusive());
-}
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Equivalent to `crt0` or `c0` code in C/C++ world. Clears the `bss` section, then jumps to kernel
-/// init code.
-///
-/// # Safety
-///
-/// - Only a single core must be active and running this function.
-pub unsafe fn runtime_init() -> ! {
-    extern "Rust" {
-        fn kernel_init() -> !;
-    }
-
-    zero_bss();
-    kernel_init()
-}
diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index 2a44ecdac..1174ca9e4 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -2104,7 +2104,7 @@ diff -uNr 12_integrated_testing/src/bsp/raspberrypi/exception.rs 13_exceptions_p
 diff -uNr 12_integrated_testing/src/bsp/raspberrypi/memory.rs 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
 --- 12_integrated_testing/src/bsp/raspberrypi/memory.rs
 +++ 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
-@@ -51,10 +51,12 @@
+@@ -48,10 +48,12 @@
      pub mod mmio {
          use super::*;
 
@@ -2121,7 +2121,7 @@ diff -uNr 12_integrated_testing/src/bsp/raspberrypi/memory.rs 13_exceptions_part
      }
 
      /// Physical devices.
-@@ -65,6 +67,8 @@
+@@ -62,6 +64,8 @@
          pub const START:            usize =         0xFE00_0000;
          pub const GPIO_START:       usize = START + GPIO_OFFSET;
          pub const PL011_UART_START: usize = START + UART_OFFSET;
@@ -2376,7 +2376,7 @@ diff -uNr 12_integrated_testing/src/exception/asynchronous.rs 13_exceptions_part
 diff -uNr 12_integrated_testing/src/lib.rs 13_exceptions_part2_peripheral_IRQs/src/lib.rs
 --- 12_integrated_testing/src/lib.rs
 +++ 13_exceptions_part2_peripheral_IRQs/src/lib.rs
-@@ -110,6 +110,7 @@
+@@ -108,6 +108,7 @@
 
  #![allow(clippy::upper_case_acronyms)]
  #![allow(incomplete_features)]
@@ -2384,7 +2384,7 @@ diff -uNr 12_integrated_testing/src/lib.rs 13_exceptions_part2_peripheral_IRQs/s
  #![feature(const_fn_fn_ptr_basics)]
  #![feature(const_generics)]
  #![feature(const_panic)]
-@@ -137,6 +138,7 @@
+@@ -134,6 +135,7 @@
  pub mod exception;
  pub mod memory;
  pub mod print;
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.rs b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.rs
index 02798fdc0..b743418e6 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.rs
@@ -11,7 +11,6 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-use crate::runtime_init;
 use cortex_a::{asm, regs::*};
 
 // Assembly counterpart to this file.
@@ -50,8 +49,8 @@ unsafe fn prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr:
             + SPSR_EL2::M::EL1h,
     );
 
-    // Second, let the link register point to runtime_init().
-    ELR_EL2.set(runtime_init::runtime_init as *const () as u64);
+    // Second, let the link register point to kernel_init().
+    ELR_EL2.set(crate::kernel_init as *const () as u64);
 
     // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it. Since there
     // are no plans to ever return to EL2, just re-use the same stack.
@@ -68,12 +67,11 @@ unsafe fn prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr:
 ///
 /// # Safety
 ///
-/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
-/// - Exception return from EL2 must must continue execution in EL1 with `runtime_init()`.
+/// - Exception return from EL2 must must continue execution in EL1 with `kernel_init()`.
 #[no_mangle]
 pub unsafe extern "C" fn _start_rust(phys_boot_core_stack_end_exclusive_addr: u64) -> ! {
     prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr);
 
-    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
+    // Use `eret` to "return" to EL1. This results in execution of kernel_init() in EL1.
     asm::eret()
 }
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.s b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.s
index 5696220d0..d1666919a 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.s
+++ b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.s
@@ -33,17 +33,29 @@ _start:
 	// Only proceed if the core executes in EL2. Park it otherwise.
 	mrs	x0, CurrentEL
 	cmp	x0, _EL2
-	b.ne	1f
+	b.ne	parking_loop
 
 	// Only proceed on the boot core. Park it otherwise.
 	mrs	x1, MPIDR_EL1
 	and	x1, x1, _core_id_mask
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
-	b.ne	1f
+	b.ne	parking_loop
 
-	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
+	// If execution reaches here, it is the boot core.
 
+	// Initialize DRAM.
+	ADR_REL	x0, __bss_start
+	ADR_REL x1, __bss_end_exclusive
+
+bss_init_loop:
+	cmp	x0, x1
+	b.eq	prepare_rust
+	stp	xzr, xzr, [x0], #16
+	b	bss_init_loop
+
+	// Prepare the jump to Rust code.
+prepare_rust:
 	// Set the stack pointer. This ensures that any code in EL2 that needs the stack will work.
 	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
@@ -52,8 +64,9 @@ _start:
 	b	_start_rust
 
 	// Infinitely wait for events (aka "park the core").
-1:	wfe
-	b	1b
+parking_loop:
+	wfe
+	b	parking_loop
 
 .size	_start, . - _start
 .type	_start, function
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
index 29e8125d7..a706290bd 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
@@ -170,12 +170,23 @@ impl memory::mmu::interface::MMU for MemoryManagementUnit {
 #[cfg(test)]
 mod tests {
     use super::*;
+    use core::{cell::UnsafeCell, ops::Range};
     use test_macros::kernel_test;
 
     /// Check if KERNEL_TABLES is in .bss.
     #[kernel_test]
     fn kernel_tables_in_bss() {
-        let bss_range = bsp::memory::bss_range_inclusive();
+        extern "Rust" {
+            static __bss_start: UnsafeCell<u64>;
+            static __bss_end_exclusive: UnsafeCell<u64>;
+        }
+
+        let bss_range = unsafe {
+            Range {
+                start: __bss_start.get(),
+                end: __bss_end_exclusive.get(),
+            }
+        };
         let kernel_tables_addr = unsafe { &KERNEL_TABLES as *const _ as usize as *mut u64 };
 
         assert!(bss_range.contains(&kernel_tables_addr));
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld
index bda0da5e9..485ba49b0 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld
+++ b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld
@@ -46,14 +46,12 @@ SECTIONS
     ***********************************************************************************************/
     .data : { *(.data*) } :segment_rw
 
-    /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-    .bss : ALIGN(8)
+    /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
+    .bss : ALIGN(16)
     {
         __bss_start = .;
         *(.bss*);
-        . = ALIGN(8);
-
-        . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-        __bss_end_inclusive = . - 8;
+        . = ALIGN(16);
+        __bss_end_exclusive = .;
     } :NONE
 }
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
index 8a58a17eb..ede648f67 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
@@ -6,7 +6,7 @@
 
 pub mod mmu;
 
-use core::{cell::UnsafeCell, ops::RangeInclusive};
+use core::cell::UnsafeCell;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -16,9 +16,6 @@ use core::{cell::UnsafeCell, ops::RangeInclusive};
 extern "Rust" {
     static __rx_start: UnsafeCell<()>;
     static __rx_end_exclusive: UnsafeCell<()>;
-
-    static __bss_start: UnsafeCell<u64>;
-    static __bss_end_inclusive: UnsafeCell<u64>;
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -96,23 +93,3 @@ fn rx_start() -> usize {
 fn rx_end_exclusive() -> usize {
     unsafe { __rx_end_exclusive.get() as usize }
 }
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return the inclusive range spanning the .bss section.
-///
-/// # Safety
-///
-/// - Values are provided by the linker script and must be trusted as-is.
-/// - The linker-provided addresses must be u64 aligned.
-pub fn bss_range_inclusive() -> RangeInclusive<*mut u64> {
-    let range;
-    unsafe {
-        range = RangeInclusive::new(__bss_start.get(), __bss_end_inclusive.get());
-    }
-    assert!(!range.is_empty());
-
-    range
-}
diff --git a/13_exceptions_part2_peripheral_IRQs/src/lib.rs b/13_exceptions_part2_peripheral_IRQs/src/lib.rs
index 9a787e60e..ca761361d 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/lib.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/lib.rs
@@ -104,9 +104,7 @@
 //!
 //! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
 //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
-//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
-//!
-//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
+//! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
 #![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
@@ -128,7 +126,6 @@
 #![test_runner(crate::test_runner)]
 
 mod panic_wait;
-mod runtime_init;
 mod synchronization;
 
 pub mod bsp;
@@ -154,6 +151,11 @@ pub fn version() -> &'static str {
     )
 }
 
+#[cfg(not(test))]
+extern "Rust" {
+    fn kernel_init() -> !;
+}
+
 //--------------------------------------------------------------------------------------------------
 // Testing
 //--------------------------------------------------------------------------------------------------
@@ -173,7 +175,7 @@ pub fn test_runner(tests: &[&test_types::UnitTest]) {
     }
 }
 
-/// The `kernel_init()` for unit tests. Called from `runtime_init()`.
+/// The `kernel_init()` for unit tests.
 #[cfg(test)]
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
diff --git a/13_exceptions_part2_peripheral_IRQs/src/memory.rs b/13_exceptions_part2_peripheral_IRQs/src/memory.rs
index 1ef0285a6..7959c555e 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/memory.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/memory.rs
@@ -5,65 +5,3 @@
 //! Memory Management.
 
 pub mod mmu;
-
-use core::ops::RangeInclusive;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Zero out an inclusive memory range.
-///
-/// # Safety
-///
-/// - `range.start` and `range.end` must be valid.
-/// - `range.start` and `range.end` must be `T` aligned.
-pub unsafe fn zero_volatile<T>(range: RangeInclusive<*mut T>)
-where
-    T: From<u8>,
-{
-    let mut ptr = *range.start();
-    let end_inclusive = *range.end();
-
-    while ptr <= end_inclusive {
-        core::ptr::write_volatile(ptr, T::from(0));
-        ptr = ptr.offset(1);
-    }
-}
-
-//--------------------------------------------------------------------------------------------------
-// Testing
-//--------------------------------------------------------------------------------------------------
-
-#[cfg(test)]
-mod tests {
-    use super::*;
-    use test_macros::kernel_test;
-
-    /// Check `zero_volatile()`.
-    #[kernel_test]
-    fn zero_volatile_works() {
-        let mut x: [usize; 3] = [10, 11, 12];
-        let x_range = x.as_mut_ptr_range();
-        let x_range_inclusive =
-            RangeInclusive::new(x_range.start, unsafe { x_range.end.offset(-1) });
-
-        unsafe { zero_volatile(x_range_inclusive) };
-
-        assert_eq!(x, [0, 0, 0]);
-    }
-
-    /// Check `bss` section layout.
-    #[kernel_test]
-    fn bss_section_is_sane() {
-        use crate::bsp::memory::bss_range_inclusive;
-        use core::mem;
-
-        let start = *bss_range_inclusive().start() as usize;
-        let end = *bss_range_inclusive().end() as usize;
-
-        assert_eq!(start % mem::size_of::<usize>(), 0);
-        assert_eq!(end % mem::size_of::<usize>(), 0);
-        assert!(end >= start);
-    }
-}
diff --git a/13_exceptions_part2_peripheral_IRQs/src/runtime_init.rs b/13_exceptions_part2_peripheral_IRQs/src/runtime_init.rs
deleted file mode 100644
index 0a1c685cd..000000000
--- a/13_exceptions_part2_peripheral_IRQs/src/runtime_init.rs
+++ /dev/null
@@ -1,40 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Rust runtime initialization code.
-
-use crate::{bsp, memory};
-
-//--------------------------------------------------------------------------------------------------
-// Private Code
-//--------------------------------------------------------------------------------------------------
-
-/// Zero out the .bss section.
-///
-/// # Safety
-///
-/// - Must only be called pre `kernel_init()`.
-#[inline(always)]
-unsafe fn zero_bss() {
-    memory::zero_volatile(bsp::memory::bss_range_inclusive());
-}
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Equivalent to `crt0` or `c0` code in C/C++ world. Clears the `bss` section, then jumps to kernel
-/// init code.
-///
-/// # Safety
-///
-/// - Only a single core must be active and running this function.
-pub unsafe fn runtime_init() -> ! {
-    extern "Rust" {
-        fn kernel_init() -> !;
-    }
-
-    zero_bss();
-    kernel_init()
-}
diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index 85aa5138a..73ef83a3a 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -806,7 +806,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 14
 
          self.configure_translation_control();
 
-@@ -162,22 +153,3 @@
+@@ -162,33 +153,3 @@
          SCTLR_EL1.matches_all(SCTLR_EL1::M::Enable)
      }
  }
@@ -818,12 +818,23 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 14
 -#[cfg(test)]
 -mod tests {
 -    use super::*;
+-    use core::{cell::UnsafeCell, ops::Range};
 -    use test_macros::kernel_test;
 -
 -    /// Check if KERNEL_TABLES is in .bss.
 -    #[kernel_test]
 -    fn kernel_tables_in_bss() {
--        let bss_range = bsp::memory::bss_range_inclusive();
+-        extern "Rust" {
+-            static __bss_start: UnsafeCell<u64>;
+-            static __bss_end_exclusive: UnsafeCell<u64>;
+-        }
+-
+-        let bss_range = unsafe {
+-            Range {
+-                start: __bss_start.get(),
+-                end: __bss_end_exclusive.get(),
+-            }
+-        };
 -        let kernel_tables_addr = unsafe { &KERNEL_TABLES as *const _ as usize as *mut u64 };
 -
 -        assert!(bss_range.contains(&kernel_tables_addr));
@@ -1489,10 +1500,10 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld 14_vir
 +    __rw_start = .;
      .data : { *(.data*) } :segment_rw
 
-     /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-@@ -56,4 +52,23 @@
-         . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-         __bss_end_inclusive = . - 8;
+     /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
+@@ -54,4 +50,23 @@
+         . = ALIGN(16);
+         __bss_end_exclusive = .;
      } :NONE
 +
 +    . = ALIGN(64K); /* Align to page boundary */
@@ -1554,16 +1565,16 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +/// The translation granule chosen by this BSP. This will be used everywhere else in the kernel to
 +/// derive respective data structures and their sizes. For example, the `crate::memory::mmu::Page`.
 +pub type KernelGranule = TranslationGranule<{ 64 * 1024 }>;
-+
+
+-const NUM_MEM_RANGES: usize = 2;
 +/// The kernel's virtual address space defined by this BSP.
 +pub type KernelVirtAddrSpace = AddressSpace<{ 8 * 1024 * 1024 * 1024 }>;
 
--const NUM_MEM_RANGES: usize = 2;
+-/// The virtual memory layout.
 +//--------------------------------------------------------------------------------------------------
 +// Global instances
 +//--------------------------------------------------------------------------------------------------
-
--/// The virtual memory layout.
++
 +/// The kernel translation tables.
  ///
 -/// The layout must contain only special ranges, aka anything that is _not_ normal cacheable DRAM.
@@ -1642,15 +1653,15 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +/// The Read+Execute (RX) pages of the kernel binary.
 +fn phys_rx_page_desc() -> PageSliceDescriptor<Physical> {
 +    virt_rx_page_desc().into()
++}
++
++/// The Read+Write (RW) pages of the kernel binary.
++fn phys_rw_page_desc() -> PageSliceDescriptor<Physical> {
++    virt_rw_page_desc().into()
  }
 
 -fn mmio_range_inclusive() -> RangeInclusive<usize> {
 -    RangeInclusive::new(memory_map::mmio::START, memory_map::mmio::END_INCLUSIVE)
-+/// The Read+Write (RW) pages of the kernel binary.
-+fn phys_rw_page_desc() -> PageSliceDescriptor<Physical> {
-+    virt_rw_page_desc().into()
-+}
-+
 +/// The boot core's stack.
 +fn phys_boot_core_stack_page_desc() -> PageSliceDescriptor<Physical> {
 +    virt_boot_core_stack_page_desc().into()
@@ -1726,15 +1737,17 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -82,14 +176,18 @@
+@@ -77,19 +171,24 @@
+ #[cfg(test)]
+ mod tests {
+     use super::*;
++    use core::{cell::UnsafeCell, ops::Range};
+     use test_macros::kernel_test;
+
      /// Check alignment of the kernel's virtual memory layout sections.
      #[kernel_test]
      fn virt_mem_layout_sections_are_64KiB_aligned() {
 -        const SIXTYFOUR_KIB: usize = 65536;
--
--        for i in LAYOUT.inner().iter() {
--            let start: usize = *(i.virtual_range)().start();
--            let end: usize = *(i.virtual_range)().end() + 1;
 +        for i in [
 +            virt_rx_page_desc,
 +            virt_rw_page_desc,
@@ -1745,6 +1758,10 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +            let start: usize = i().start_addr().into_usize();
 +            let end: usize = i().end_addr().into_usize();
 
+-        for i in LAYOUT.inner().iter() {
+-            let start: usize = *(i.virtual_range)().start();
+-            let end: usize = *(i.virtual_range)().end() + 1;
+-
 -            assert_eq!(start modulo SIXTYFOUR_KIB, 0);
 -            assert_eq!(end modulo SIXTYFOUR_KIB, 0);
 +            assert_eq!(start modulo KernelGranule::SIZE, 0);
@@ -1752,7 +1769,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
              assert!(end >= start);
          }
      }
-@@ -97,18 +195,28 @@
+@@ -97,18 +196,38 @@
      /// Ensure the kernel's virtual memory layout is free of overlaps.
      #[kernel_test]
      fn virt_mem_layout_has_no_overlaps() {
@@ -1786,7 +1803,17 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +    /// Check if KERNEL_TABLES is in .bss.
 +    #[kernel_test]
 +    fn kernel_tables_in_bss() {
-+        let bss_range = super::super::bss_range_inclusive();
++        extern "Rust" {
++            static __bss_start: UnsafeCell<u64>;
++            static __bss_end_exclusive: UnsafeCell<u64>;
++        }
++
++        let bss_range = unsafe {
++            Range {
++                start: __bss_start.get(),
++                end: __bss_end_exclusive.get(),
++            }
++        };
 +        let kernel_tables_addr = &KERNEL_TABLES as *const _ as usize as *mut u64;
 +
 +        assert!(bss_range.contains(&kernel_tables_addr));
@@ -1834,16 +1861,15 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 14_v
  pub mod mmu;
 
 +use crate::memory::{Address, Physical, Virtual};
- use core::{cell::UnsafeCell, ops::RangeInclusive};
+ use core::cell::UnsafeCell;
 
  //--------------------------------------------------------------------------------------------------
-@@ -17,8 +48,16 @@
+@@ -16,6 +47,15 @@
+ extern "Rust" {
      static __rx_start: UnsafeCell<()>;
      static __rx_end_exclusive: UnsafeCell<()>;
-
++
 +    static __rw_start: UnsafeCell<()>;
-     static __bss_start: UnsafeCell<u64>;
-     static __bss_end_inclusive: UnsafeCell<u64>;
 +    static __rw_end_exclusive: UnsafeCell<()>;
 +
 +    static __boot_core_stack_start: UnsafeCell<()>;
@@ -1854,7 +1880,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 14_v
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -28,35 +67,26 @@
+@@ -25,35 +65,26 @@
  /// The board's physical memory map.
  #[rustfmt::skip]
  pub(super) mod map {
@@ -1904,7 +1930,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 14_v
      }
 
      /// Physical devices.
-@@ -64,13 +94,22 @@
+@@ -61,13 +92,22 @@
      pub mod mmio {
          use super::*;
 
@@ -1933,7 +1959,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 14_v
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -83,18 +122,69 @@
+@@ -80,16 +120,67 @@
  ///
  /// - Value is provided by the linker script and must be trusted as-is.
  #[inline(always)]
@@ -1941,21 +1967,19 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 14_v
 -    unsafe { __rx_start.get() as usize }
 +fn virt_rx_start() -> Address<Virtual> {
 +    Address::new(unsafe { __rx_start.get() as usize })
- }
-
--/// Exclusive end address of the Read+Execute (RX) range.
++}
++
 +/// Size of the Read+Execute (RX) range.
- ///
- /// # Safety
- ///
- /// - Value is provided by the linker script and must be trusted as-is.
- #[inline(always)]
--fn rx_end_exclusive() -> usize {
--    unsafe { __rx_end_exclusive.get() as usize }
++///
++/// # Safety
++///
++/// - Value is provided by the linker script and must be trusted as-is.
++#[inline(always)]
 +fn rx_size() -> usize {
 +    unsafe { (__rx_end_exclusive.get() as usize) - (__rx_start.get() as usize) }
-+}
-+
+ }
+
+-/// Exclusive end address of the Read+Execute (RX) range.
 +/// Start address of the Read+Write (RW) range.
 +#[inline(always)]
 +fn virt_rw_start() -> Address<Virtual> {
@@ -1963,11 +1987,13 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 14_v
 +}
 +
 +/// Size of the Read+Write (RW) range.
-+///
-+/// # Safety
-+///
-+/// - Value is provided by the linker script and must be trusted as-is.
-+#[inline(always)]
+ ///
+ /// # Safety
+ ///
+ /// - Value is provided by the linker script and must be trusted as-is.
+ #[inline(always)]
+-fn rx_end_exclusive() -> usize {
+-    unsafe { __rx_end_exclusive.get() as usize }
 +fn rw_size() -> usize {
 +    unsafe { (__rw_end_exclusive.get() as usize) - (__rw_start.get() as usize) }
 +}
@@ -2007,8 +2033,6 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 14_v
 +    map::END
  }
 
- //--------------------------------------------------------------------------------------------------
-
 diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi.rs 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi.rs
 --- 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi.rs
 +++ 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi.rs
@@ -2131,7 +2155,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/driver.rs 14_virtual_mem_part2
 diff -uNr 13_exceptions_part2_peripheral_IRQs/src/lib.rs 14_virtual_mem_part2_mmio_remap/src/lib.rs
 --- 13_exceptions_part2_peripheral_IRQs/src/lib.rs
 +++ 14_virtual_mem_part2_mmio_remap/src/lib.rs
-@@ -111,6 +111,8 @@
+@@ -109,6 +109,8 @@
  #![allow(clippy::upper_case_acronyms)]
  #![allow(incomplete_features)]
  #![feature(asm)]
@@ -2140,7 +2164,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/lib.rs 14_virtual_mem_part2_mm
  #![feature(const_fn_fn_ptr_basics)]
  #![feature(const_generics)]
  #![feature(const_panic)]
-@@ -132,6 +134,7 @@
+@@ -129,6 +131,7 @@
  mod synchronization;
 
  pub mod bsp;
@@ -3131,16 +3155,16 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 14_virtual_mem_p
 diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory.rs 14_virtual_mem_part2_mmio_remap/src/memory.rs
 --- 13_exceptions_part2_peripheral_IRQs/src/memory.rs
 +++ 14_virtual_mem_part2_mmio_remap/src/memory.rs
-@@ -6,12 +6,136 @@
+@@ -5,3 +5,133 @@
+ //! Memory Management.
 
  pub mod mmu;
-
--use core::ops::RangeInclusive;
++
 +use crate::common;
 +use core::{
 +    fmt,
 +    marker::PhantomData,
-+    ops::{AddAssign, RangeInclusive, SubAssign},
++    ops::{AddAssign, SubAssign},
 +};
 +
 +//--------------------------------------------------------------------------------------------------
@@ -3164,11 +3188,11 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory.rs 14_virtual_mem_part2
 +    value: usize,
 +    _address_type: PhantomData<fn() -> ATYPE>,
 +}
-
- //--------------------------------------------------------------------------------------------------
- // Public Code
- //--------------------------------------------------------------------------------------------------
-
++
++//--------------------------------------------------------------------------------------------------
++// Public Code
++//--------------------------------------------------------------------------------------------------
++
 +impl AddressType for Physical {}
 +impl AddressType for Virtual {}
 +
@@ -3265,10 +3289,6 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory.rs 14_virtual_mem_part2
 +        write!(f, "{:04x}", q1)
 +    }
 +}
-+
- /// Zero out an inclusive memory range.
- ///
- /// # Safety
 
 diff -uNr 13_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs 14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
 --- 13_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs
index 02798fdc0..b743418e6 100644
--- a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs
@@ -11,7 +11,6 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-use crate::runtime_init;
 use cortex_a::{asm, regs::*};
 
 // Assembly counterpart to this file.
@@ -50,8 +49,8 @@ unsafe fn prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr:
             + SPSR_EL2::M::EL1h,
     );
 
-    // Second, let the link register point to runtime_init().
-    ELR_EL2.set(runtime_init::runtime_init as *const () as u64);
+    // Second, let the link register point to kernel_init().
+    ELR_EL2.set(crate::kernel_init as *const () as u64);
 
     // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it. Since there
     // are no plans to ever return to EL2, just re-use the same stack.
@@ -68,12 +67,11 @@ unsafe fn prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr:
 ///
 /// # Safety
 ///
-/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
-/// - Exception return from EL2 must must continue execution in EL1 with `runtime_init()`.
+/// - Exception return from EL2 must must continue execution in EL1 with `kernel_init()`.
 #[no_mangle]
 pub unsafe extern "C" fn _start_rust(phys_boot_core_stack_end_exclusive_addr: u64) -> ! {
     prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr);
 
-    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
+    // Use `eret` to "return" to EL1. This results in execution of kernel_init() in EL1.
     asm::eret()
 }
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.s b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.s
index 5696220d0..d1666919a 100644
--- a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.s
+++ b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.s
@@ -33,17 +33,29 @@ _start:
 	// Only proceed if the core executes in EL2. Park it otherwise.
 	mrs	x0, CurrentEL
 	cmp	x0, _EL2
-	b.ne	1f
+	b.ne	parking_loop
 
 	// Only proceed on the boot core. Park it otherwise.
 	mrs	x1, MPIDR_EL1
 	and	x1, x1, _core_id_mask
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
-	b.ne	1f
+	b.ne	parking_loop
 
-	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
+	// If execution reaches here, it is the boot core.
 
+	// Initialize DRAM.
+	ADR_REL	x0, __bss_start
+	ADR_REL x1, __bss_end_exclusive
+
+bss_init_loop:
+	cmp	x0, x1
+	b.eq	prepare_rust
+	stp	xzr, xzr, [x0], #16
+	b	bss_init_loop
+
+	// Prepare the jump to Rust code.
+prepare_rust:
 	// Set the stack pointer. This ensures that any code in EL2 that needs the stack will work.
 	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
@@ -52,8 +64,9 @@ _start:
 	b	_start_rust
 
 	// Infinitely wait for events (aka "park the core").
-1:	wfe
-	b	1b
+parking_loop:
+	wfe
+	b	parking_loop
 
 .size	_start, . - _start
 .type	_start, function
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
index 64545edf2..698ad85da 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
@@ -42,15 +42,13 @@ SECTIONS
     __rw_start = .;
     .data : { *(.data*) } :segment_rw
 
-    /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-    .bss : ALIGN(8)
+    /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
+    .bss : ALIGN(16)
     {
         __bss_start = .;
         *(.bss*);
-        . = ALIGN(8);
-
-        . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-        __bss_end_inclusive = . - 8;
+        . = ALIGN(16);
+        __bss_end_exclusive = .;
     } :NONE
 
     . = ALIGN(64K); /* Align to page boundary */
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
index 7f571e080..e51b00fa1 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
@@ -37,7 +37,7 @@
 pub mod mmu;
 
 use crate::memory::{Address, Physical, Virtual};
-use core::{cell::UnsafeCell, ops::RangeInclusive};
+use core::cell::UnsafeCell;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -49,8 +49,6 @@ extern "Rust" {
     static __rx_end_exclusive: UnsafeCell<()>;
 
     static __rw_start: UnsafeCell<()>;
-    static __bss_start: UnsafeCell<u64>;
-    static __bss_end_inclusive: UnsafeCell<u64>;
     static __rw_end_exclusive: UnsafeCell<()>;
 
     static __boot_core_stack_start: UnsafeCell<()>;
@@ -186,23 +184,3 @@ fn boot_core_stack_guard_page_size() -> usize {
 fn phys_addr_space_end() -> Address<Physical> {
     map::END
 }
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return the inclusive range spanning the .bss section.
-///
-/// # Safety
-///
-/// - Values are provided by the linker script and must be trusted as-is.
-/// - The linker-provided addresses must be u64 aligned.
-pub fn bss_range_inclusive() -> RangeInclusive<*mut u64> {
-    let range;
-    unsafe {
-        range = RangeInclusive::new(__bss_start.get(), __bss_end_inclusive.get());
-    }
-    assert!(!range.is_empty());
-
-    range
-}
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
index 88fc80bd5..813fa0b4d 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
@@ -171,6 +171,7 @@ pub unsafe fn kernel_map_binary() -> Result<(), &'static str> {
 #[cfg(test)]
 mod tests {
     use super::*;
+    use core::{cell::UnsafeCell, ops::Range};
     use test_macros::kernel_test;
 
     /// Check alignment of the kernel's virtual memory layout sections.
@@ -214,7 +215,17 @@ mod tests {
     /// Check if KERNEL_TABLES is in .bss.
     #[kernel_test]
     fn kernel_tables_in_bss() {
-        let bss_range = super::super::bss_range_inclusive();
+        extern "Rust" {
+            static __bss_start: UnsafeCell<u64>;
+            static __bss_end_exclusive: UnsafeCell<u64>;
+        }
+
+        let bss_range = unsafe {
+            Range {
+                start: __bss_start.get(),
+                end: __bss_end_exclusive.get(),
+            }
+        };
         let kernel_tables_addr = &KERNEL_TABLES as *const _ as usize as *mut u64;
 
         assert!(bss_range.contains(&kernel_tables_addr));
diff --git a/14_virtual_mem_part2_mmio_remap/src/lib.rs b/14_virtual_mem_part2_mmio_remap/src/lib.rs
index f3ef29513..1b2cb367a 100644
--- a/14_virtual_mem_part2_mmio_remap/src/lib.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/lib.rs
@@ -104,9 +104,7 @@
 //!
 //! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
 //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
-//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
-//!
-//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
+//! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
 #![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
@@ -130,7 +128,6 @@
 #![test_runner(crate::test_runner)]
 
 mod panic_wait;
-mod runtime_init;
 mod synchronization;
 
 pub mod bsp;
@@ -157,6 +154,11 @@ pub fn version() -> &'static str {
     )
 }
 
+#[cfg(not(test))]
+extern "Rust" {
+    fn kernel_init() -> !;
+}
+
 //--------------------------------------------------------------------------------------------------
 // Testing
 //--------------------------------------------------------------------------------------------------
@@ -176,7 +178,7 @@ pub fn test_runner(tests: &[&test_types::UnitTest]) {
     }
 }
 
-/// The `kernel_init()` for unit tests. Called from `runtime_init()`.
+/// The `kernel_init()` for unit tests.
 #[cfg(test)]
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
diff --git a/14_virtual_mem_part2_mmio_remap/src/memory.rs b/14_virtual_mem_part2_mmio_remap/src/memory.rs
index 515731eb7..3de1d6077 100644
--- a/14_virtual_mem_part2_mmio_remap/src/memory.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/memory.rs
@@ -10,7 +10,7 @@ use crate::common;
 use core::{
     fmt,
     marker::PhantomData,
-    ops::{AddAssign, RangeInclusive, SubAssign},
+    ops::{AddAssign, SubAssign},
 };
 
 //--------------------------------------------------------------------------------------------------
@@ -135,59 +135,3 @@ impl fmt::Display for Address<Virtual> {
         write!(f, "{:04x}", q1)
     }
 }
-
-/// Zero out an inclusive memory range.
-///
-/// # Safety
-///
-/// - `range.start` and `range.end` must be valid.
-/// - `range.start` and `range.end` must be `T` aligned.
-pub unsafe fn zero_volatile<T>(range: RangeInclusive<*mut T>)
-where
-    T: From<u8>,
-{
-    let mut ptr = *range.start();
-    let end_inclusive = *range.end();
-
-    while ptr <= end_inclusive {
-        core::ptr::write_volatile(ptr, T::from(0));
-        ptr = ptr.offset(1);
-    }
-}
-
-//--------------------------------------------------------------------------------------------------
-// Testing
-//--------------------------------------------------------------------------------------------------
-
-#[cfg(test)]
-mod tests {
-    use super::*;
-    use test_macros::kernel_test;
-
-    /// Check `zero_volatile()`.
-    #[kernel_test]
-    fn zero_volatile_works() {
-        let mut x: [usize; 3] = [10, 11, 12];
-        let x_range = x.as_mut_ptr_range();
-        let x_range_inclusive =
-            RangeInclusive::new(x_range.start, unsafe { x_range.end.offset(-1) });
-
-        unsafe { zero_volatile(x_range_inclusive) };
-
-        assert_eq!(x, [0, 0, 0]);
-    }
-
-    /// Check `bss` section layout.
-    #[kernel_test]
-    fn bss_section_is_sane() {
-        use crate::bsp::memory::bss_range_inclusive;
-        use core::mem;
-
-        let start = *bss_range_inclusive().start() as usize;
-        let end = *bss_range_inclusive().end() as usize;
-
-        assert_eq!(start % mem::size_of::<usize>(), 0);
-        assert_eq!(end % mem::size_of::<usize>(), 0);
-        assert!(end >= start);
-    }
-}
diff --git a/14_virtual_mem_part2_mmio_remap/src/runtime_init.rs b/14_virtual_mem_part2_mmio_remap/src/runtime_init.rs
deleted file mode 100644
index 0a1c685cd..000000000
--- a/14_virtual_mem_part2_mmio_remap/src/runtime_init.rs
+++ /dev/null
@@ -1,40 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Rust runtime initialization code.
-
-use crate::{bsp, memory};
-
-//--------------------------------------------------------------------------------------------------
-// Private Code
-//--------------------------------------------------------------------------------------------------
-
-/// Zero out the .bss section.
-///
-/// # Safety
-///
-/// - Must only be called pre `kernel_init()`.
-#[inline(always)]
-unsafe fn zero_bss() {
-    memory::zero_volatile(bsp::memory::bss_range_inclusive());
-}
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Equivalent to `crt0` or `c0` code in C/C++ world. Clears the `bss` section, then jumps to kernel
-/// init code.
-///
-/// # Safety
-///
-/// - Only a single core must be active and running this function.
-pub unsafe fn runtime_init() -> ! {
-    extern "Rust" {
-        fn kernel_init() -> !;
-    }
-
-    zero_bss();
-    kernel_init()
-}
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index bb9a50bb6..b06b222df 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -530,7 +530,7 @@ pub unsafe extern "C" fn _start_rust(
         cpu::wait_forever();
     }
 
-    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
+    // Use `eret` to "return" to EL1. This results in execution of kernel_init() in EL1.
     asm::eret()
 }
 ```
@@ -796,19 +796,18 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/Makefile 15_virtual_mem_part3_precompu
 diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
 --- 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs
 +++ 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
-@@ -11,7 +11,8 @@
+@@ -11,6 +11,8 @@
  //!
  //! crate::cpu::boot::arch_boot
 
--use crate::runtime_init;
-+use crate::{cpu, memory, memory::Address, runtime_init};
++use crate::{cpu, memory, memory::Address};
 +use core::intrinsics::unlikely;
  use cortex_a::{asm, regs::*};
 
  // Assembly counterpart to this file.
-@@ -71,9 +72,18 @@
- /// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
- /// - Exception return from EL2 must must continue execution in EL1 with `runtime_init()`.
+@@ -69,9 +71,18 @@
+ ///
+ /// - Exception return from EL2 must must continue execution in EL1 with `kernel_init()`.
  #[no_mangle]
 -pub unsafe extern "C" fn _start_rust(phys_boot_core_stack_end_exclusive_addr: u64) -> ! {
 +pub unsafe extern "C" fn _start_rust(
@@ -823,17 +822,17 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs 15_virtu
 +        cpu::wait_forever();
 +    }
 +
-     // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
+     // Use `eret` to "return" to EL1. This results in execution of kernel_init() in EL1.
      asm::eret()
  }
 
 diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.s 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.s
 --- 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.s
 +++ 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.s
-@@ -44,11 +44,14 @@
-
- 	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
+@@ -56,11 +56,14 @@
 
+ 	// Prepare the jump to Rust code.
+ prepare_rust:
 +	// Load the base address of the kernel's translation tables.
 +	ldr	x0, PHYS_KERNEL_TABLES_BASE_ADDR // provided by bsp/__board_name__/memory/mmu.rs
 +
@@ -1204,7 +1203,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs 15_v
          "Kernel boot-core stack",
          &virt_boot_core_stack_page_desc(),
          &phys_boot_core_stack_page_desc(),
-@@ -159,64 +183,5 @@
+@@ -159,75 +183,5 @@
              acc_perms: AccessPermissions::ReadWrite,
              execute_never: true,
          },
@@ -1220,6 +1219,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs 15_v
 -#[cfg(test)]
 -mod tests {
 -    use super::*;
+-    use core::{cell::UnsafeCell, ops::Range};
 -    use test_macros::kernel_test;
 -
 -    /// Check alignment of the kernel's virtual memory layout sections.
@@ -1263,7 +1263,17 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs 15_v
 -    /// Check if KERNEL_TABLES is in .bss.
 -    #[kernel_test]
 -    fn kernel_tables_in_bss() {
--        let bss_range = super::super::bss_range_inclusive();
+-        extern "Rust" {
+-            static __bss_start: UnsafeCell<u64>;
+-            static __bss_end_exclusive: UnsafeCell<u64>;
+-        }
+-
+-        let bss_range = unsafe {
+-            Range {
+-                start: __bss_start.get(),
+-                end: __bss_end_exclusive.get(),
+-            }
+-        };
 -        let kernel_tables_addr = &KERNEL_TABLES as *const _ as usize as *mut u64;
 -
 -        assert!(bss_range.contains(&kernel_tables_addr));
@@ -1511,7 +1521,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/memory.rs 15_virtual_mem_part3_pre
 +    convert::TryFrom,
      fmt,
      marker::PhantomData,
-     ops::{AddAssign, RangeInclusive, SubAssign},
+     ops::{AddAssign, SubAssign},
 @@ -67,6 +68,14 @@
      }
  }
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
index 5e0ecfc6c..f275c792d 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-use crate::{cpu, memory, memory::Address, runtime_init};
+use crate::{cpu, memory, memory::Address};
 use core::intrinsics::unlikely;
 use cortex_a::{asm, regs::*};
 
@@ -51,8 +51,8 @@ unsafe fn prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr:
             + SPSR_EL2::M::EL1h,
     );
 
-    // Second, let the link register point to runtime_init().
-    ELR_EL2.set(runtime_init::runtime_init as *const () as u64);
+    // Second, let the link register point to kernel_init().
+    ELR_EL2.set(crate::kernel_init as *const () as u64);
 
     // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it. Since there
     // are no plans to ever return to EL2, just re-use the same stack.
@@ -69,8 +69,7 @@ unsafe fn prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr:
 ///
 /// # Safety
 ///
-/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
-/// - Exception return from EL2 must must continue execution in EL1 with `runtime_init()`.
+/// - Exception return from EL2 must must continue execution in EL1 with `kernel_init()`.
 #[no_mangle]
 pub unsafe extern "C" fn _start_rust(
     phys_kernel_tables_base_addr: u64,
@@ -84,6 +83,6 @@ pub unsafe extern "C" fn _start_rust(
         cpu::wait_forever();
     }
 
-    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
+    // Use `eret` to "return" to EL1. This results in execution of kernel_init() in EL1.
     asm::eret()
 }
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.s b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.s
index 286462616..9e7fc619a 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.s
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.s
@@ -33,17 +33,29 @@ _start:
 	// Only proceed if the core executes in EL2. Park it otherwise.
 	mrs	x0, CurrentEL
 	cmp	x0, _EL2
-	b.ne	1f
+	b.ne	parking_loop
 
 	// Only proceed on the boot core. Park it otherwise.
 	mrs	x1, MPIDR_EL1
 	and	x1, x1, _core_id_mask
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
-	b.ne	1f
+	b.ne	parking_loop
 
-	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
+	// If execution reaches here, it is the boot core.
 
+	// Initialize DRAM.
+	ADR_REL	x0, __bss_start
+	ADR_REL x1, __bss_end_exclusive
+
+bss_init_loop:
+	cmp	x0, x1
+	b.eq	prepare_rust
+	stp	xzr, xzr, [x0], #16
+	b	bss_init_loop
+
+	// Prepare the jump to Rust code.
+prepare_rust:
 	// Load the base address of the kernel's translation tables.
 	ldr	x0, PHYS_KERNEL_TABLES_BASE_ADDR // provided by bsp/__board_name__/memory/mmu.rs
 
@@ -55,8 +67,9 @@ _start:
 	b	_start_rust
 
 	// Infinitely wait for events (aka "park the core").
-1:	wfe
-	b	1b
+parking_loop:
+	wfe
+	b	parking_loop
 
 .size	_start, . - _start
 .type	_start, function
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld
index 7ad75a40c..aa127cc01 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld
@@ -45,15 +45,13 @@ SECTIONS
     __rw_start = .;
     .data : { *(.data*) } :segment_rw
 
-    /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-    .bss : ALIGN(8)
+    /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
+    .bss : ALIGN(16)
     {
         __bss_start = .;
         *(.bss*);
-        . = ALIGN(8);
-
-        . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-        __bss_end_inclusive = . - 8;
+        . = ALIGN(16);
+        __bss_end_exclusive = .;
     } :NONE
 
     . = ALIGN(64K); /* Align to page boundary */
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory.rs
index 7f571e080..e51b00fa1 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory.rs
@@ -37,7 +37,7 @@
 pub mod mmu;
 
 use crate::memory::{Address, Physical, Virtual};
-use core::{cell::UnsafeCell, ops::RangeInclusive};
+use core::cell::UnsafeCell;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -49,8 +49,6 @@ extern "Rust" {
     static __rx_end_exclusive: UnsafeCell<()>;
 
     static __rw_start: UnsafeCell<()>;
-    static __bss_start: UnsafeCell<u64>;
-    static __bss_end_inclusive: UnsafeCell<u64>;
     static __rw_end_exclusive: UnsafeCell<()>;
 
     static __boot_core_stack_start: UnsafeCell<()>;
@@ -186,23 +184,3 @@ fn boot_core_stack_guard_page_size() -> usize {
 fn phys_addr_space_end() -> Address<Physical> {
     map::END
 }
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return the inclusive range spanning the .bss section.
-///
-/// # Safety
-///
-/// - Values are provided by the linker script and must be trusted as-is.
-/// - The linker-provided addresses must be u64 aligned.
-pub fn bss_range_inclusive() -> RangeInclusive<*mut u64> {
-    let range;
-    unsafe {
-        range = RangeInclusive::new(__bss_start.get(), __bss_end_inclusive.get());
-    }
-    assert!(!range.is_empty());
-
-    range
-}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/lib.rs b/15_virtual_mem_part3_precomputed_tables/src/lib.rs
index f3ef29513..1b2cb367a 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/lib.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/lib.rs
@@ -104,9 +104,7 @@
 //!
 //! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
 //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
-//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
-//!
-//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
+//! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
 #![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
@@ -130,7 +128,6 @@
 #![test_runner(crate::test_runner)]
 
 mod panic_wait;
-mod runtime_init;
 mod synchronization;
 
 pub mod bsp;
@@ -157,6 +154,11 @@ pub fn version() -> &'static str {
     )
 }
 
+#[cfg(not(test))]
+extern "Rust" {
+    fn kernel_init() -> !;
+}
+
 //--------------------------------------------------------------------------------------------------
 // Testing
 //--------------------------------------------------------------------------------------------------
@@ -176,7 +178,7 @@ pub fn test_runner(tests: &[&test_types::UnitTest]) {
     }
 }
 
-/// The `kernel_init()` for unit tests. Called from `runtime_init()`.
+/// The `kernel_init()` for unit tests.
 #[cfg(test)]
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory.rs b/15_virtual_mem_part3_precomputed_tables/src/memory.rs
index 87ffa81f5..4ac969040 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/memory.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/memory.rs
@@ -11,7 +11,7 @@ use core::{
     convert::TryFrom,
     fmt,
     marker::PhantomData,
-    ops::{AddAssign, RangeInclusive, SubAssign},
+    ops::{AddAssign, SubAssign},
 };
 
 //--------------------------------------------------------------------------------------------------
@@ -144,59 +144,3 @@ impl fmt::Display for Address<Virtual> {
         write!(f, "{:04x}", q1)
     }
 }
-
-/// Zero out an inclusive memory range.
-///
-/// # Safety
-///
-/// - `range.start` and `range.end` must be valid.
-/// - `range.start` and `range.end` must be `T` aligned.
-pub unsafe fn zero_volatile<T>(range: RangeInclusive<*mut T>)
-where
-    T: From<u8>,
-{
-    let mut ptr = *range.start();
-    let end_inclusive = *range.end();
-
-    while ptr <= end_inclusive {
-        core::ptr::write_volatile(ptr, T::from(0));
-        ptr = ptr.offset(1);
-    }
-}
-
-//--------------------------------------------------------------------------------------------------
-// Testing
-//--------------------------------------------------------------------------------------------------
-
-#[cfg(test)]
-mod tests {
-    use super::*;
-    use test_macros::kernel_test;
-
-    /// Check `zero_volatile()`.
-    #[kernel_test]
-    fn zero_volatile_works() {
-        let mut x: [usize; 3] = [10, 11, 12];
-        let x_range = x.as_mut_ptr_range();
-        let x_range_inclusive =
-            RangeInclusive::new(x_range.start, unsafe { x_range.end.offset(-1) });
-
-        unsafe { zero_volatile(x_range_inclusive) };
-
-        assert_eq!(x, [0, 0, 0]);
-    }
-
-    /// Check `bss` section layout.
-    #[kernel_test]
-    fn bss_section_is_sane() {
-        use crate::bsp::memory::bss_range_inclusive;
-        use core::mem;
-
-        let start = *bss_range_inclusive().start() as usize;
-        let end = *bss_range_inclusive().end() as usize;
-
-        assert_eq!(start % mem::size_of::<usize>(), 0);
-        assert_eq!(end % mem::size_of::<usize>(), 0);
-        assert!(end >= start);
-    }
-}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/runtime_init.rs b/15_virtual_mem_part3_precomputed_tables/src/runtime_init.rs
deleted file mode 100644
index 0a1c685cd..000000000
--- a/15_virtual_mem_part3_precomputed_tables/src/runtime_init.rs
+++ /dev/null
@@ -1,40 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Rust runtime initialization code.
-
-use crate::{bsp, memory};
-
-//--------------------------------------------------------------------------------------------------
-// Private Code
-//--------------------------------------------------------------------------------------------------
-
-/// Zero out the .bss section.
-///
-/// # Safety
-///
-/// - Must only be called pre `kernel_init()`.
-#[inline(always)]
-unsafe fn zero_bss() {
-    memory::zero_volatile(bsp::memory::bss_range_inclusive());
-}
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Equivalent to `crt0` or `c0` code in C/C++ world. Clears the `bss` section, then jumps to kernel
-/// init code.
-///
-/// # Safety
-///
-/// - Only a single core must be active and running this function.
-pub unsafe fn runtime_init() -> ! {
-    extern "Rust" {
-        fn kernel_init() -> !;
-    }
-
-    zero_bss();
-    kernel_init()
-}
diff --git a/16_virtual_mem_part4_higher_half_kernel/README.md b/16_virtual_mem_part4_higher_half_kernel/README.md
index 17d71e2b9..0a4381841 100644
--- a/16_virtual_mem_part4_higher_half_kernel/README.md
+++ b/16_virtual_mem_part4_higher_half_kernel/README.md
@@ -99,7 +99,7 @@ by the time the CPU enters `EL1`, virtual memory will be active, and the CPU mus
 new higher-half `virtual addresses` for everything it does.
 
 Specifically, this means the address from which the CPU should execute upon entering `EL1` (function
-`runtime_init()`) must be a valid _virtual address_, same as the stack pointer's address. Both of
+`kernel_init()`) must be a valid _virtual address_, same as the stack pointer's address. Both of
 them are programmed in function `fn prepare_el2_to_el1_transition(...)`, so we must ensure now that
 _link-time_ addresses are used here. For this reason, retrieval of these addresses happens in
 `assembly` in `boot.s`, where we can explicitly enforce generation of **absolute** addresses:
@@ -108,7 +108,7 @@ _link-time_ addresses are used here. For this reason, retrieval of these address
 // Load the _absolute_ addresses of the following symbols. Since the kernel is linked at
 // the top of the 64 bit address space, these are effectively virtual addresses.
 ADR_ABS	x1, __boot_core_stack_end_exclusive
-ADR_ABS	x2, runtime_init
+ADR_ABS	x2, kernel_init
 ```
 
 Both values are forwarded to the Rust entry point function `_start_rust()`, which in turn forwards
@@ -246,15 +246,6 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/Cargo.toml 16_virtual_mem_part
 diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs
 --- 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
 +++ 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs
-@@ -11,7 +11,7 @@
- //!
- //! crate::cpu::boot::arch_boot
-
--use crate::{cpu, memory, memory::Address, runtime_init};
-+use crate::{cpu, memory, memory::Address};
- use core::intrinsics::unlikely;
- use cortex_a::{asm, regs::*};
-
 @@ -29,7 +29,10 @@
  /// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
  /// - The HW state of EL1 must be prepared in a sound way.
@@ -262,7 +253,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
 -unsafe fn prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr: u64) {
 +unsafe fn prepare_el2_to_el1_transition(
 +    virt_boot_core_stack_end_exclusive_addr: u64,
-+    virt_runtime_init_addr: u64,
++    virt_kernel_init_addr: u64,
 +) {
      // Enable timer counter registers for EL1.
      CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
@@ -270,9 +261,9 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
 @@ -52,11 +55,11 @@
      );
 
-     // Second, let the link register point to runtime_init().
--    ELR_EL2.set(runtime_init::runtime_init as *const () as u64);
-+    ELR_EL2.set(virt_runtime_init_addr);
+     // Second, let the link register point to kernel_init().
+-    ELR_EL2.set(crate::kernel_init as *const () as u64);
++    ELR_EL2.set(virt_kernel_init_addr);
 
      // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it. Since there
      // are no plans to ever return to EL2, just re-use the same stack.
@@ -281,29 +272,29 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -74,9 +77,13 @@
+@@ -73,9 +76,13 @@
  #[no_mangle]
  pub unsafe extern "C" fn _start_rust(
      phys_kernel_tables_base_addr: u64,
 -    phys_boot_core_stack_end_exclusive_addr: u64,
 +    virt_boot_core_stack_end_exclusive_addr: u64,
-+    virt_runtime_init_addr: u64,
++    virt_kernel_init_addr: u64,
  ) -> ! {
 -    prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr);
 +    prepare_el2_to_el1_transition(
 +        virt_boot_core_stack_end_exclusive_addr,
-+        virt_runtime_init_addr,
++        virt_kernel_init_addr,
 +    );
 
      // Turn on the MMU for EL1.
      let addr = Address::new(phys_kernel_tables_base_addr as usize);
-@@ -84,6 +91,7 @@
+@@ -83,6 +90,7 @@
          cpu::wait_forever();
      }
 
--    // Use `eret` to "return" to EL1. This results in execution of runtime_init() in EL1.
+-    // Use `eret` to "return" to EL1. This results in execution of kernel_init() in EL1.
 +    // Use `eret` to "return" to EL1. Since virtual memory will already be enabled, this results in
-+    // execution of runtime_init() in EL1 from its _virtual address_.
++    // execution of kernel_init() in EL1 from its _virtual address_.
      asm::eret()
  }
 
@@ -329,7 +320,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.s 1
  .equ _EL2, 0x8
  .equ _core_id_mask, 0b11
 
-@@ -47,11 +59,23 @@
+@@ -59,11 +71,23 @@
  	// Load the base address of the kernel's translation tables.
  	ldr	x0, PHYS_KERNEL_TABLES_BASE_ADDR // provided by bsp/__board_name__/memory/mmu.rs
 
@@ -339,7 +330,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.s 1
 +	// Load the _absolute_ addresses of the following symbols. Since the kernel is linked at
 +	// the top of the 64 bit address space, these are effectively virtual addresses.
 +	ADR_ABS	x1, __boot_core_stack_end_exclusive
-+	ADR_ABS	x2, runtime_init
++	ADR_ABS	x2, kernel_init
 +
 +	// Load the PC-relative address of the stack and set the stack pointer.
 +	//
@@ -590,6 +581,22 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu
  //--------------------------------------------------------------------------------------------------
  // Public Definitions
 
+diff -uNr 15_virtual_mem_part3_precomputed_tables/src/lib.rs 16_virtual_mem_part4_higher_half_kernel/src/lib.rs
+--- 15_virtual_mem_part3_precomputed_tables/src/lib.rs
++++ 16_virtual_mem_part4_higher_half_kernel/src/lib.rs
+@@ -154,11 +154,6 @@
+     )
+ }
+
+-#[cfg(not(test))]
+-extern "Rust" {
+-    fn kernel_init() -> !;
+-}
+-
+ //--------------------------------------------------------------------------------------------------
+ // Testing
+ //--------------------------------------------------------------------------------------------------
+
 diff -uNr 15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs 16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs
 --- 15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs
 +++ 16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs
@@ -606,18 +613,6 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs 16_virtual_m
      type TableStartFromBottom;
  }
 
-diff -uNr 15_virtual_mem_part3_precomputed_tables/src/runtime_init.rs 16_virtual_mem_part4_higher_half_kernel/src/runtime_init.rs
---- 15_virtual_mem_part3_precomputed_tables/src/runtime_init.rs
-+++ 16_virtual_mem_part4_higher_half_kernel/src/runtime_init.rs
-@@ -30,6 +30,7 @@
- /// # Safety
- ///
- /// - Only a single core must be active and running this function.
-+#[no_mangle]
- pub unsafe fn runtime_init() -> ! {
-     extern "Rust" {
-         fn kernel_init() -> !;
-
 diff -uNr 15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs 16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs
 --- 15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs
 +++ 16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs
index 4f0ef0b4d..fe8e90600 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs
@@ -31,7 +31,7 @@ global_asm!(include_str!("boot.s"));
 #[inline(always)]
 unsafe fn prepare_el2_to_el1_transition(
     virt_boot_core_stack_end_exclusive_addr: u64,
-    virt_runtime_init_addr: u64,
+    virt_kernel_init_addr: u64,
 ) {
     // Enable timer counter registers for EL1.
     CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
@@ -54,8 +54,8 @@ unsafe fn prepare_el2_to_el1_transition(
             + SPSR_EL2::M::EL1h,
     );
 
-    // Second, let the link register point to runtime_init().
-    ELR_EL2.set(virt_runtime_init_addr);
+    // Second, let the link register point to kernel_init().
+    ELR_EL2.set(virt_kernel_init_addr);
 
     // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it. Since there
     // are no plans to ever return to EL2, just re-use the same stack.
@@ -72,17 +72,16 @@ unsafe fn prepare_el2_to_el1_transition(
 ///
 /// # Safety
 ///
-/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
-/// - Exception return from EL2 must must continue execution in EL1 with `runtime_init()`.
+/// - Exception return from EL2 must must continue execution in EL1 with `kernel_init()`.
 #[no_mangle]
 pub unsafe extern "C" fn _start_rust(
     phys_kernel_tables_base_addr: u64,
     virt_boot_core_stack_end_exclusive_addr: u64,
-    virt_runtime_init_addr: u64,
+    virt_kernel_init_addr: u64,
 ) -> ! {
     prepare_el2_to_el1_transition(
         virt_boot_core_stack_end_exclusive_addr,
-        virt_runtime_init_addr,
+        virt_kernel_init_addr,
     );
 
     // Turn on the MMU for EL1.
@@ -92,6 +91,6 @@ pub unsafe extern "C" fn _start_rust(
     }
 
     // Use `eret` to "return" to EL1. Since virtual memory will already be enabled, this results in
-    // execution of runtime_init() in EL1 from its _virtual address_.
+    // execution of kernel_init() in EL1 from its _virtual address_.
     asm::eret()
 }
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.s b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.s
index 638259d47..32a5c3ff6 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.s
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.s
@@ -45,24 +45,36 @@ _start:
 	// Only proceed if the core executes in EL2. Park it otherwise.
 	mrs	x0, CurrentEL
 	cmp	x0, _EL2
-	b.ne	1f
+	b.ne	parking_loop
 
 	// Only proceed on the boot core. Park it otherwise.
 	mrs	x1, MPIDR_EL1
 	and	x1, x1, _core_id_mask
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
-	b.ne	1f
+	b.ne	parking_loop
 
-	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
+	// If execution reaches here, it is the boot core.
 
+	// Initialize DRAM.
+	ADR_REL	x0, __bss_start
+	ADR_REL x1, __bss_end_exclusive
+
+bss_init_loop:
+	cmp	x0, x1
+	b.eq	prepare_rust
+	stp	xzr, xzr, [x0], #16
+	b	bss_init_loop
+
+	// Prepare the jump to Rust code.
+prepare_rust:
 	// Load the base address of the kernel's translation tables.
 	ldr	x0, PHYS_KERNEL_TABLES_BASE_ADDR // provided by bsp/__board_name__/memory/mmu.rs
 
 	// Load the _absolute_ addresses of the following symbols. Since the kernel is linked at
 	// the top of the 64 bit address space, these are effectively virtual addresses.
 	ADR_ABS	x1, __boot_core_stack_end_exclusive
-	ADR_ABS	x2, runtime_init
+	ADR_ABS	x2, kernel_init
 
 	// Load the PC-relative address of the stack and set the stack pointer.
 	//
@@ -79,8 +91,9 @@ _start:
 	b	_start_rust
 
 	// Infinitely wait for events (aka "park the core").
-1:	wfe
-	b	1b
+parking_loop:
+	wfe
+	b	parking_loop
 
 .size	_start, . - _start
 .type	_start, function
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/link.ld b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/link.ld
index 962638d00..a3179f1a3 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/link.ld
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/link.ld
@@ -55,15 +55,13 @@ SECTIONS
     __rw_start = .;
     .data : { *(.data*) } :segment_rw
 
-    /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-    .bss : ALIGN(8)
+    /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
+    .bss : ALIGN(16)
     {
         __bss_start = .;
         *(.bss*);
-        . = ALIGN(8);
-
-        . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-        __bss_end_inclusive = . - 8;
+        . = ALIGN(16);
+        __bss_end_exclusive = .;
     } :NONE
 
     . = ALIGN(64K); /* Align to page boundary */
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory.rs
index 7f571e080..e51b00fa1 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory.rs
@@ -37,7 +37,7 @@
 pub mod mmu;
 
 use crate::memory::{Address, Physical, Virtual};
-use core::{cell::UnsafeCell, ops::RangeInclusive};
+use core::cell::UnsafeCell;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -49,8 +49,6 @@ extern "Rust" {
     static __rx_end_exclusive: UnsafeCell<()>;
 
     static __rw_start: UnsafeCell<()>;
-    static __bss_start: UnsafeCell<u64>;
-    static __bss_end_inclusive: UnsafeCell<u64>;
     static __rw_end_exclusive: UnsafeCell<()>;
 
     static __boot_core_stack_start: UnsafeCell<()>;
@@ -186,23 +184,3 @@ fn boot_core_stack_guard_page_size() -> usize {
 fn phys_addr_space_end() -> Address<Physical> {
     map::END
 }
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return the inclusive range spanning the .bss section.
-///
-/// # Safety
-///
-/// - Values are provided by the linker script and must be trusted as-is.
-/// - The linker-provided addresses must be u64 aligned.
-pub fn bss_range_inclusive() -> RangeInclusive<*mut u64> {
-    let range;
-    unsafe {
-        range = RangeInclusive::new(__bss_start.get(), __bss_end_inclusive.get());
-    }
-    assert!(!range.is_empty());
-
-    range
-}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/lib.rs b/16_virtual_mem_part4_higher_half_kernel/src/lib.rs
index f3ef29513..3e3e08d8f 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/lib.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/lib.rs
@@ -104,9 +104,7 @@
 //!
 //! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
 //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
-//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
-//!
-//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
+//! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
 #![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
@@ -130,7 +128,6 @@
 #![test_runner(crate::test_runner)]
 
 mod panic_wait;
-mod runtime_init;
 mod synchronization;
 
 pub mod bsp;
@@ -176,7 +173,7 @@ pub fn test_runner(tests: &[&test_types::UnitTest]) {
     }
 }
 
-/// The `kernel_init()` for unit tests. Called from `runtime_init()`.
+/// The `kernel_init()` for unit tests.
 #[cfg(test)]
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory.rs b/16_virtual_mem_part4_higher_half_kernel/src/memory.rs
index 87ffa81f5..4ac969040 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/memory.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/memory.rs
@@ -11,7 +11,7 @@ use core::{
     convert::TryFrom,
     fmt,
     marker::PhantomData,
-    ops::{AddAssign, RangeInclusive, SubAssign},
+    ops::{AddAssign, SubAssign},
 };
 
 //--------------------------------------------------------------------------------------------------
@@ -144,59 +144,3 @@ impl fmt::Display for Address<Virtual> {
         write!(f, "{:04x}", q1)
     }
 }
-
-/// Zero out an inclusive memory range.
-///
-/// # Safety
-///
-/// - `range.start` and `range.end` must be valid.
-/// - `range.start` and `range.end` must be `T` aligned.
-pub unsafe fn zero_volatile<T>(range: RangeInclusive<*mut T>)
-where
-    T: From<u8>,
-{
-    let mut ptr = *range.start();
-    let end_inclusive = *range.end();
-
-    while ptr <= end_inclusive {
-        core::ptr::write_volatile(ptr, T::from(0));
-        ptr = ptr.offset(1);
-    }
-}
-
-//--------------------------------------------------------------------------------------------------
-// Testing
-//--------------------------------------------------------------------------------------------------
-
-#[cfg(test)]
-mod tests {
-    use super::*;
-    use test_macros::kernel_test;
-
-    /// Check `zero_volatile()`.
-    #[kernel_test]
-    fn zero_volatile_works() {
-        let mut x: [usize; 3] = [10, 11, 12];
-        let x_range = x.as_mut_ptr_range();
-        let x_range_inclusive =
-            RangeInclusive::new(x_range.start, unsafe { x_range.end.offset(-1) });
-
-        unsafe { zero_volatile(x_range_inclusive) };
-
-        assert_eq!(x, [0, 0, 0]);
-    }
-
-    /// Check `bss` section layout.
-    #[kernel_test]
-    fn bss_section_is_sane() {
-        use crate::bsp::memory::bss_range_inclusive;
-        use core::mem;
-
-        let start = *bss_range_inclusive().start() as usize;
-        let end = *bss_range_inclusive().end() as usize;
-
-        assert_eq!(start % mem::size_of::<usize>(), 0);
-        assert_eq!(end % mem::size_of::<usize>(), 0);
-        assert!(end >= start);
-    }
-}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/runtime_init.rs b/16_virtual_mem_part4_higher_half_kernel/src/runtime_init.rs
deleted file mode 100644
index 2c0a62e67..000000000
--- a/16_virtual_mem_part4_higher_half_kernel/src/runtime_init.rs
+++ /dev/null
@@ -1,41 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Rust runtime initialization code.
-
-use crate::{bsp, memory};
-
-//--------------------------------------------------------------------------------------------------
-// Private Code
-//--------------------------------------------------------------------------------------------------
-
-/// Zero out the .bss section.
-///
-/// # Safety
-///
-/// - Must only be called pre `kernel_init()`.
-#[inline(always)]
-unsafe fn zero_bss() {
-    memory::zero_volatile(bsp::memory::bss_range_inclusive());
-}
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Equivalent to `crt0` or `c0` code in C/C++ world. Clears the `bss` section, then jumps to kernel
-/// init code.
-///
-/// # Safety
-///
-/// - Only a single core must be active and running this function.
-#[no_mangle]
-pub unsafe fn runtime_init() -> ! {
-    extern "Rust" {
-        fn kernel_init() -> !;
-    }
-
-    zero_bss();
-    kernel_init()
-}
diff --git a/X1_JTAG_boot/jtag_boot_rpi3.img b/X1_JTAG_boot/jtag_boot_rpi3.img
index 96d8bfb1817aef0dfb5458871a1ea93582acea84..9122433173b872ffac01c7ef68ea4d3f32a5243e 100755
GIT binary patch
delta 1571
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zf8p6o(GVB)#J(-c7n9}KH)Yod@iSpZKe4k`)k|z@=f|9X4;$1Pi<dg6I@-XFYX?Xp
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zkaj^<gH!`27td**>R{(8tWGDrlsmdwj;B+LYI7hrvAVeCkRBkCc^cv`V1<5ovqZq+
zvfCAVO6NVa$F_@(&+lT^%17(<zlmpTV7r;%N52$%xi9kjA^X#yTF|5WkGyqZ_Bk)>
z*7x*b{0!DCSyC)W%=UzfCVK(vsS+N*2pLC_Am!!syYLM-Aze>|G*4){o)<=x5UT*Q
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z!<@!UBt35#s{3x{#53~%o>3crOT-3y<5yV_He!Us$>W5(qUjoDbtQinL&#(hydGvX
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zPP|WHIo6kfKF@Tf?(!G^!Zal@g=MB@i3xi|E`o<9(OY7ZiiQmzQDf7l!ZOnk%1mU%
zegBX()<(yZZFCKzb^a;Km%Wh_P3i`pu+Ec(B(Gjr<24Hh^P(v~_>rK-4>EFEH5shz
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Obe5M-U*}newdr@+(Y_M^

delta 1776
zcmb7DeN0<b6u-Bx^ka@updT<k+Va`5NLPmP6`+(wpt!JAOvdH{9l~J9hAsaP#X@w+
zP)xX9lnI)FiJ1=}kQ5W}58WUpOcsg3nebl$6I)O~r*VzK^Sr)?8e^i~<i7iHe!qLp
z`JMBoi~S|)F_eGbD7C#|$LMS+l5CA3R7-NxaDdb;;Tc~#&cvFRBG4d4XxhJlh!Gjd
zI)g|*bxBh3Grnt*c#MtoCUYVE5D$?vY+wNqGwN|VT=~Qg&^1Of&UrB#$VBWWwMxx6
z#dlun#2T=}o&+*KVf}K<@>r9U&PO~Yapn7TvV9pY_h}>NF|MbpN2+iNJuiKe&PIJE
z>9ta?N-M*KL@}05M^x1~gMO=Oe%z`eRm!`=5XgYTSWI>}Zg=NQ5!v-g$PbN}Y+K~)
zrW}Q`_NrDK-S<Wg1FnB8lfE3CCF#wjQ_*_JWI4JXo2Vs558s-Y3@yAl(Ld|Hto(d<
zi+_(|(srhZz7~_EEi;hqDTWPNP)G?+Rd-L0s8WjQQjFf5MJD!|S0dr|`lKSkvFBcy
zTr&|6abWWjntK)0`SF&V1u<!CY|f#Ed}8+>CyfnOS`%C6MF5k)M79iKWO|(T+ZiPG
zH*Uy)3}5Zne99`o)+g<8#*S5lT4c64lSX}_MTX|QZ=t!995<vuH=HfQXs!(Q{GAu}
z`!#nyxXsjm%}<`s2dsFzB4mEIB2<bMTS|;-MZcBcxQMvGf!$w3e*RT(%oD=kYv>_Q
zxXW?15ab{q6jv_!a=!?LeyUNhYQQ~U^y7mm7P=H`j{%W3p|F0rjOEie_T*5#TC2x7
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z(Zf7Cq)AFhgL@=LGlNihJ{R>jx7+~;!fZ6qWzD0J17PRNb{)#~I#p^<X^f=hD4MGT
zd@xVwFEcKrZQ3M!miB2&BQN}gagJwr1%`=dK$8oK!5^54Kxru`&4e3A0e@Y<8^NwG
zAd(Jg-VSlO2k9{o8R9cC6p+Tz0<s2}s6R5Yg+}){og&S~f@I@<Mlrs|D94lcIo&)$
zGXc7$(_tIMaXRy93A7lDlSo+O#IwEpl;QM~$E{Yw(`8O*w;Qx9PKV#2b#cqlamfNU
zOoY!WEr`#<i}d;UJZnpWV1xL=V<|~ELqmnf-?{J8)p&i`|7Ep_UR2_%FZc?M)?lMe
zFE|T`=1TFbN)+zHDW6kog;Sci+740|9}}zybuz;46>&Yli7<4K(u7LDbtKa9gbeF~
z=u9i(R>d>?f#ESLo}ur<qo3kLi*-@d>A&iBkGc|n!FOm~QmNzL0-F}=6)k$?R~yVx
z@jgntpGv0dNhMyF$J6BQY`uEL(Clh`uIbrAgVF7}a;Yi1)l=Wp-qG1*GKUE&QQahw
zZih7jrpMiAx#;PzxLux(i%o8KS4XR*y{Y}GyDQu60egeUJ6I7il!l*Bg;#nrIr?`P
Cl<*G#

diff --git a/X1_JTAG_boot/jtag_boot_rpi4.img b/X1_JTAG_boot/jtag_boot_rpi4.img
index 76531e6ff99de9580fcf1d1b05c8eed4404543ef..25e8aedfdf849d61eb75103719199b31f4b9c2d0 100755
GIT binary patch
delta 1053
zcmZ8fT}TvB6h3!m)k)2Eb#+HecgB@f6Y?MWqt>-R${-h|qz5+=DTIpcp+L(u3@Qxv
zb|a-8T8p3&qGWprD$_LRB`V75aaRcz|0?RmN~g0kw}-rN=ezfu@BG~F%-fpB)ipz~
zc}lf-u6hMHxD$lAAp*?+@DQMw5=0fz31rR>(CqB)y|=9E4r(tV?vX7iLiV5qt{JRg
z7LCpTofd&!j<g605j=KwT0C4UVUBd%36@mnqNQTcH#-5e41&IXRiWybi$*a@?;%>e
zSkz|AL7QjGVhJH^G2=RWYI$ZyT4}GH#*0U_XbRC1bT7M-)GVk<WF~1PnM5Mf=`RTB
zVs|qd2#G9a93uIZRdin0zeQc3VGp5L8qwzJf%cDVrIN}ztb2v9%p%r8;dT-GWc6l_
z+pvH|i(~Rs<nI}mS(&ZC>dB>143n1i0R@x~FIlUtoy6Fv&EY27>0C9@(#{UwT=)TW
zp<2*7mpk6$YeW6LZn_rneqA2>ZQCT&t!HJKg&l@U1XUvR!iqi+2B>XQ#3>y$J@CgY
zfZB&ZQK*3E9V?(B;t`LN#xSN+H#zzQdACvxOKEtQ#PdFB@_9f>hDU3VTQ+24+p^9H
z<0^ZSRgj*jcn2#^0NusDWcBsLoU|0BPe`4RMM7=$9(;CBl7=G+sfhp=4iW?8M2o-l
zn*UmgDrQT5mBx@G@Rk5POKe4V;M0aBiw9>U4QJxBj973{LV~_AvF#&^+tX8w!moF+
z2buZor+q^blEBYw*^bga0e!gI!Nf*>_tx)I_BU2kRw^xZKKwr?SyQ%yykf_)-?U1y
z$u$D;b1BEXqk_iT9SEEV;OP{%=WzRK-cjyP<Nk|`=9E{SahTa~4#w)@cNEK5tE+dj
z?>S$IpEb#j)X!EkHtt{n*)5F7?1sF<^i}=yg?aZjo-ctO+#zmX$L+UdR+xL7NQ~xI
qlyKW%u9?4qW0>Pfj)taHLA%KcarAR-WuC?KVnxwBg+;b8&;1wdoEY2y

delta 1280
zcmZ8fO>7%g5T3VdC+mh1+p)88q3N#E#IaKHgM(;6A{&=Tw18ABgQ#*y-Nr#to5Wd{
zLk`F$qKKj(<?*7X5|>03lGjj)Dm^q3r3vYU6Td+m*Ho3<roXCGH5K(T-hHj0PkK8$
zGvEBYZ{|Ymm)^i4>|R%0+Lv(x@ArYQu?Uc)y*tU*=ML5i!Lu%yBLLs2T7a5Yfc`B4
z{dDO=K_LPJ*}Rx)-GW}TRy4|MK%<aP>|YF16Hz5mC|WsUlp|nVXD_(g$tr8EKgDji
zE(Q=1?GMs&<Ojp7B}NrK%r3f<!eV%-p{7zpVoUz5KN2#>)}MWYtS&Xz50dSZJ@kfU
z-7#ChkN{>&b;Q`%3v}l09x9dCDes%Yp%A;`4GYsdSgkMaR~xW^%P3=V>~VJg$00W8
zYxcr6YGRo5$eLF``6J0r`i6<hZu#W4{#WTnj2Lwv6~DT959rO9U>tok^7}IwJyU9@
zTTz}R&#?}Fr$C-(gZ^;NW`!Utgr2Ba^BRGdh7@t#vMd=84J)lwKpEHCs4C_Y@BQNx
zwS5a=?o+9Vm?JAHaz^Ng<zT9BltKfW9=EpqxhtR87YxKaZdmp}G2yui%PZp0pE(=k
zLlA<a!GX;_B5imGB<%vOh*Mx8LQ|OFWnTOV_5?hr;(xNN<WXMKS|h(!Vz7A)A0vs=
z3F-1BU8#Zd)tC;_K(8a2W(OE2anPR2m)Jf3_^$q)bRVkah-g?j<h#Y$gL1@e;O5NQ
zn{x&^S_2wpUo?D@OX2i+fZacCgB_UrPXH#V2HeLfEj+Y(|3}!N7Kbpig_aOwVz1Rn
z0%)6)6-&lp6eX92TO}3mpl-+JTPY#=M3pqj6n7L$c-i*>g=nl4kfXx_c7o@1aO5to
z$M?Ri9C)j{r$>3WKY^^yF*PWY(`--h=YxeN2Wto7XSvbQap3kD(Dex&|IToGBey?|
zJI(!d+&{xoja@wj*~x~hVV`ffj+ENx>FVFI)yCUu_cq=W?`=2N+qrJP*7sMyL6y1G
z*knldWkkoC=Tc+mWO+-$>sUW)V!z34!aE`MP<{<rL*I*!eOk!D_;_zssp0MB_Ihsb
z3$f{@aZ+G+o4RwUY&NYQADtLiMpC24(!;MPs-7DEAl*5d9ZHX7j!(5m?J)j=?L0>u
yr5kTnKhkwLo9WV1+05azu1{q~yT;OE6Z%xAo<;uw9`{%RC>1+}*O9Cc^8O2m9AoDI

diff --git a/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.rs b/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.rs
index c85bb94b8..7513df074 100644
--- a/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.rs
+++ b/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.rs
@@ -11,8 +11,6 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-use crate::runtime_init;
-
 // Assembly counterpart to this file.
 global_asm!(include_str!("boot.s"));
 
@@ -23,11 +21,7 @@ global_asm!(include_str!("boot.s"));
 /// The Rust entry of the `kernel` binary.
 ///
 /// The function is called from the assembly `_start` function.
-///
-/// # Safety
-///
-/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
 #[no_mangle]
 pub unsafe fn _start_rust() -> ! {
-    runtime_init::runtime_init()
+    crate::kernel_init()
 }
diff --git a/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s b/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s
index bfa94abf3..f4162c877 100644
--- a/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s
+++ b/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s
@@ -34,10 +34,22 @@ _start:
 	and	x1, x1, _core_id_mask
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
-	b.ne	1f
+	b.ne	parking_loop
 
-	// If execution reaches here, it is the boot core. Now, prepare the jump to Rust code.
+	// If execution reaches here, it is the boot core.
 
+	// Initialize DRAM.
+	ADR_REL	x0, __bss_start
+	ADR_REL x1, __bss_end_exclusive
+
+bss_init_loop:
+	cmp	x0, x1
+	b.eq	prepare_rust
+	stp	xzr, xzr, [x0], #16
+	b	bss_init_loop
+
+	// Prepare the jump to Rust code.
+prepare_rust:
 	// Set the stack pointer.
 	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
@@ -46,8 +58,9 @@ _start:
 	b	_start_rust
 
 	// Infinitely wait for events (aka "park the core").
-1:	wfe
-	b	1b
+parking_loop:
+	wfe
+	b	parking_loop
 
 .size	_start, . - _start
 .type	_start, function
diff --git a/X1_JTAG_boot/src/bsp/raspberrypi/link.ld b/X1_JTAG_boot/src/bsp/raspberrypi/link.ld
index 97ea6d69c..cf63a4a64 100644
--- a/X1_JTAG_boot/src/bsp/raspberrypi/link.ld
+++ b/X1_JTAG_boot/src/bsp/raspberrypi/link.ld
@@ -42,14 +42,12 @@ SECTIONS
     ***********************************************************************************************/
     .data : { *(.data*) } :segment_rw
 
-    /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-    .bss : ALIGN(8)
+    /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
+    .bss : ALIGN(16)
     {
         __bss_start = .;
         *(.bss*);
-        . = ALIGN(8);
-
-        . += 8; /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-        __bss_end_inclusive = . - 8;
+        . = ALIGN(16);
+        __bss_end_exclusive = .;
     } :NONE
 }
diff --git a/X1_JTAG_boot/src/bsp/raspberrypi/memory.rs b/X1_JTAG_boot/src/bsp/raspberrypi/memory.rs
index c6d65e36b..ef397a6f9 100644
--- a/X1_JTAG_boot/src/bsp/raspberrypi/memory.rs
+++ b/X1_JTAG_boot/src/bsp/raspberrypi/memory.rs
@@ -4,18 +4,6 @@
 
 //! BSP Memory Management.
 
-use core::{cell::UnsafeCell, ops::RangeInclusive};
-
-//--------------------------------------------------------------------------------------------------
-// Private Definitions
-//--------------------------------------------------------------------------------------------------
-
-// Symbols from the linker script.
-extern "Rust" {
-    static __bss_start: UnsafeCell<u64>;
-    static __bss_end_inclusive: UnsafeCell<u64>;
-}
-
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -47,23 +35,3 @@ pub(super) mod map {
         pub const PL011_UART_START: usize = START + UART_OFFSET;
     }
 }
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return the inclusive range spanning the .bss section.
-///
-/// # Safety
-///
-/// - Values are provided by the linker script and must be trusted as-is.
-/// - The linker-provided addresses must be u64 aligned.
-pub fn bss_range_inclusive() -> RangeInclusive<*mut u64> {
-    let range;
-    unsafe {
-        range = RangeInclusive::new(__bss_start.get(), __bss_end_inclusive.get());
-    }
-    assert!(!range.is_empty());
-
-    range
-}
diff --git a/X1_JTAG_boot/src/main.rs b/X1_JTAG_boot/src/main.rs
index 0dc87fa16..23221621b 100644
--- a/X1_JTAG_boot/src/main.rs
+++ b/X1_JTAG_boot/src/main.rs
@@ -102,9 +102,7 @@
 //!
 //! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
 //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
-//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
-//!
-//! [`runtime_init::runtime_init()`]: runtime_init/fn.runtime_init.html
+//! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
 #![allow(clippy::upper_case_acronyms)]
 #![feature(const_fn_fn_ptr_basics)]
@@ -119,10 +117,8 @@ mod bsp;
 mod console;
 mod cpu;
 mod driver;
-mod memory;
 mod panic_wait;
 mod print;
-mod runtime_init;
 mod synchronization;
 mod time;
 
diff --git a/X1_JTAG_boot/src/memory.rs b/X1_JTAG_boot/src/memory.rs
deleted file mode 100644
index 1f79e0c95..000000000
--- a/X1_JTAG_boot/src/memory.rs
+++ /dev/null
@@ -1,30 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Memory Management.
-
-use core::ops::RangeInclusive;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Zero out an inclusive memory range.
-///
-/// # Safety
-///
-/// - `range.start` and `range.end` must be valid.
-/// - `range.start` and `range.end` must be `T` aligned.
-pub unsafe fn zero_volatile<T>(range: RangeInclusive<*mut T>)
-where
-    T: From<u8>,
-{
-    let mut ptr = *range.start();
-    let end_inclusive = *range.end();
-
-    while ptr <= end_inclusive {
-        core::ptr::write_volatile(ptr, T::from(0));
-        ptr = ptr.offset(1);
-    }
-}
diff --git a/X1_JTAG_boot/src/runtime_init.rs b/X1_JTAG_boot/src/runtime_init.rs
deleted file mode 100644
index ee0946863..000000000
--- a/X1_JTAG_boot/src/runtime_init.rs
+++ /dev/null
@@ -1,37 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
-//! Rust runtime initialization code.
-
-use crate::{bsp, memory};
-
-//--------------------------------------------------------------------------------------------------
-// Private Code
-//--------------------------------------------------------------------------------------------------
-
-/// Zero out the .bss section.
-///
-/// # Safety
-///
-/// - Must only be called pre `kernel_init()`.
-#[inline(always)]
-unsafe fn zero_bss() {
-    memory::zero_volatile(bsp::memory::bss_range_inclusive());
-}
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Equivalent to `crt0` or `c0` code in C/C++ world. Clears the `bss` section, then jumps to kernel
-/// init code.
-///
-/// # Safety
-///
-/// - Only a single core must be active and running this function.
-pub unsafe fn runtime_init() -> ! {
-    zero_bss();
-
-    crate::kernel_init()
-}

From 5d6b68d7107ed921f046fdf45ace252f63dbcc6a Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sun, 4 Jul 2021 15:26:46 +0200
Subject: [PATCH 075/214] rust-analyzer: Fix error with recent version

---
 01_wait_forever/.vscode/settings.json                       | 6 ++++--
 01_wait_forever/build.rs                                    | 2 +-
 02_runtime_init/.vscode/settings.json                       | 6 ++++--
 02_runtime_init/build.rs                                    | 2 +-
 03_hacky_hello_world/.vscode/settings.json                  | 6 ++++--
 03_hacky_hello_world/build.rs                               | 2 +-
 04_safe_globals/.vscode/settings.json                       | 6 ++++--
 04_safe_globals/build.rs                                    | 2 +-
 05_drivers_gpio_uart/.vscode/settings.json                  | 6 ++++--
 05_drivers_gpio_uart/build.rs                               | 2 +-
 06_uart_chainloader/.vscode/settings.json                   | 6 ++++--
 06_uart_chainloader/build.rs                                | 2 +-
 07_timestamps/.vscode/settings.json                         | 6 ++++--
 07_timestamps/build.rs                                      | 2 +-
 08_hw_debug_JTAG/.vscode/settings.json                      | 6 ++++--
 08_hw_debug_JTAG/build.rs                                   | 2 +-
 09_privilege_level/.vscode/settings.json                    | 6 ++++--
 09_privilege_level/build.rs                                 | 2 +-
 10_virtual_mem_part1_identity_mapping/.vscode/settings.json | 6 ++++--
 10_virtual_mem_part1_identity_mapping/build.rs              | 2 +-
 11_exceptions_part1_groundwork/.vscode/settings.json        | 6 ++++--
 11_exceptions_part1_groundwork/build.rs                     | 2 +-
 12_integrated_testing/.vscode/settings.json                 | 6 ++++--
 12_integrated_testing/build.rs                              | 2 +-
 13_exceptions_part2_peripheral_IRQs/.vscode/settings.json   | 6 ++++--
 13_exceptions_part2_peripheral_IRQs/build.rs                | 2 +-
 14_virtual_mem_part2_mmio_remap/.vscode/settings.json       | 6 ++++--
 14_virtual_mem_part2_mmio_remap/build.rs                    | 2 +-
 .../.vscode/settings.json                                   | 6 ++++--
 15_virtual_mem_part3_precomputed_tables/build.rs            | 2 +-
 .../.vscode/settings.json                                   | 6 ++++--
 16_virtual_mem_part4_higher_half_kernel/build.rs            | 2 +-
 X1_JTAG_boot/.vscode/settings.json                          | 6 ++++--
 X1_JTAG_boot/build.rs                                       | 2 +-
 34 files changed, 85 insertions(+), 51 deletions(-)

diff --git a/01_wait_forever/.vscode/settings.json b/01_wait_forever/.vscode/settings.json
index a0d6a9202..0a8d7c090 100644
--- a/01_wait_forever/.vscode/settings.json
+++ b/01_wait_forever/.vscode/settings.json
@@ -1,7 +1,9 @@
 {
   "editor.formatOnSave": true,
   "editor.rulers": [100],
-  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"]
+  "rust-analyzer.cargo.features": ["bsp_rpi3"],
+  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
+  "rust-analyzer.lens.debug": false,
+  "rust-analyzer.lens.run": false
 }
diff --git a/01_wait_forever/build.rs b/01_wait_forever/build.rs
index 3f0a29110..883c59556 100644
--- a/01_wait_forever/build.rs
+++ b/01_wait_forever/build.rs
@@ -1,7 +1,7 @@
 use std::env;
 
 fn main() {
-    let linker_file = env::var("LINKER_FILE").unwrap();
+    let linker_file = env::var("LINKER_FILE").unwrap_or_default();
 
     println!("cargo:rerun-if-changed={}", linker_file);
     println!("cargo:rerun-if-changed=build.rs");
diff --git a/02_runtime_init/.vscode/settings.json b/02_runtime_init/.vscode/settings.json
index a0d6a9202..0a8d7c090 100644
--- a/02_runtime_init/.vscode/settings.json
+++ b/02_runtime_init/.vscode/settings.json
@@ -1,7 +1,9 @@
 {
   "editor.formatOnSave": true,
   "editor.rulers": [100],
-  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"]
+  "rust-analyzer.cargo.features": ["bsp_rpi3"],
+  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
+  "rust-analyzer.lens.debug": false,
+  "rust-analyzer.lens.run": false
 }
diff --git a/02_runtime_init/build.rs b/02_runtime_init/build.rs
index 3f0a29110..883c59556 100644
--- a/02_runtime_init/build.rs
+++ b/02_runtime_init/build.rs
@@ -1,7 +1,7 @@
 use std::env;
 
 fn main() {
-    let linker_file = env::var("LINKER_FILE").unwrap();
+    let linker_file = env::var("LINKER_FILE").unwrap_or_default();
 
     println!("cargo:rerun-if-changed={}", linker_file);
     println!("cargo:rerun-if-changed=build.rs");
diff --git a/03_hacky_hello_world/.vscode/settings.json b/03_hacky_hello_world/.vscode/settings.json
index a0d6a9202..0a8d7c090 100644
--- a/03_hacky_hello_world/.vscode/settings.json
+++ b/03_hacky_hello_world/.vscode/settings.json
@@ -1,7 +1,9 @@
 {
   "editor.formatOnSave": true,
   "editor.rulers": [100],
-  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"]
+  "rust-analyzer.cargo.features": ["bsp_rpi3"],
+  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
+  "rust-analyzer.lens.debug": false,
+  "rust-analyzer.lens.run": false
 }
diff --git a/03_hacky_hello_world/build.rs b/03_hacky_hello_world/build.rs
index 3f0a29110..883c59556 100644
--- a/03_hacky_hello_world/build.rs
+++ b/03_hacky_hello_world/build.rs
@@ -1,7 +1,7 @@
 use std::env;
 
 fn main() {
-    let linker_file = env::var("LINKER_FILE").unwrap();
+    let linker_file = env::var("LINKER_FILE").unwrap_or_default();
 
     println!("cargo:rerun-if-changed={}", linker_file);
     println!("cargo:rerun-if-changed=build.rs");
diff --git a/04_safe_globals/.vscode/settings.json b/04_safe_globals/.vscode/settings.json
index a0d6a9202..0a8d7c090 100644
--- a/04_safe_globals/.vscode/settings.json
+++ b/04_safe_globals/.vscode/settings.json
@@ -1,7 +1,9 @@
 {
   "editor.formatOnSave": true,
   "editor.rulers": [100],
-  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"]
+  "rust-analyzer.cargo.features": ["bsp_rpi3"],
+  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
+  "rust-analyzer.lens.debug": false,
+  "rust-analyzer.lens.run": false
 }
diff --git a/04_safe_globals/build.rs b/04_safe_globals/build.rs
index 3f0a29110..883c59556 100644
--- a/04_safe_globals/build.rs
+++ b/04_safe_globals/build.rs
@@ -1,7 +1,7 @@
 use std::env;
 
 fn main() {
-    let linker_file = env::var("LINKER_FILE").unwrap();
+    let linker_file = env::var("LINKER_FILE").unwrap_or_default();
 
     println!("cargo:rerun-if-changed={}", linker_file);
     println!("cargo:rerun-if-changed=build.rs");
diff --git a/05_drivers_gpio_uart/.vscode/settings.json b/05_drivers_gpio_uart/.vscode/settings.json
index a0d6a9202..0a8d7c090 100644
--- a/05_drivers_gpio_uart/.vscode/settings.json
+++ b/05_drivers_gpio_uart/.vscode/settings.json
@@ -1,7 +1,9 @@
 {
   "editor.formatOnSave": true,
   "editor.rulers": [100],
-  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"]
+  "rust-analyzer.cargo.features": ["bsp_rpi3"],
+  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
+  "rust-analyzer.lens.debug": false,
+  "rust-analyzer.lens.run": false
 }
diff --git a/05_drivers_gpio_uart/build.rs b/05_drivers_gpio_uart/build.rs
index 3f0a29110..883c59556 100644
--- a/05_drivers_gpio_uart/build.rs
+++ b/05_drivers_gpio_uart/build.rs
@@ -1,7 +1,7 @@
 use std::env;
 
 fn main() {
-    let linker_file = env::var("LINKER_FILE").unwrap();
+    let linker_file = env::var("LINKER_FILE").unwrap_or_default();
 
     println!("cargo:rerun-if-changed={}", linker_file);
     println!("cargo:rerun-if-changed=build.rs");
diff --git a/06_uart_chainloader/.vscode/settings.json b/06_uart_chainloader/.vscode/settings.json
index a0d6a9202..0a8d7c090 100644
--- a/06_uart_chainloader/.vscode/settings.json
+++ b/06_uart_chainloader/.vscode/settings.json
@@ -1,7 +1,9 @@
 {
   "editor.formatOnSave": true,
   "editor.rulers": [100],
-  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"]
+  "rust-analyzer.cargo.features": ["bsp_rpi3"],
+  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
+  "rust-analyzer.lens.debug": false,
+  "rust-analyzer.lens.run": false
 }
diff --git a/06_uart_chainloader/build.rs b/06_uart_chainloader/build.rs
index 3f0a29110..883c59556 100644
--- a/06_uart_chainloader/build.rs
+++ b/06_uart_chainloader/build.rs
@@ -1,7 +1,7 @@
 use std::env;
 
 fn main() {
-    let linker_file = env::var("LINKER_FILE").unwrap();
+    let linker_file = env::var("LINKER_FILE").unwrap_or_default();
 
     println!("cargo:rerun-if-changed={}", linker_file);
     println!("cargo:rerun-if-changed=build.rs");
diff --git a/07_timestamps/.vscode/settings.json b/07_timestamps/.vscode/settings.json
index a0d6a9202..0a8d7c090 100644
--- a/07_timestamps/.vscode/settings.json
+++ b/07_timestamps/.vscode/settings.json
@@ -1,7 +1,9 @@
 {
   "editor.formatOnSave": true,
   "editor.rulers": [100],
-  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"]
+  "rust-analyzer.cargo.features": ["bsp_rpi3"],
+  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
+  "rust-analyzer.lens.debug": false,
+  "rust-analyzer.lens.run": false
 }
diff --git a/07_timestamps/build.rs b/07_timestamps/build.rs
index 3f0a29110..883c59556 100644
--- a/07_timestamps/build.rs
+++ b/07_timestamps/build.rs
@@ -1,7 +1,7 @@
 use std::env;
 
 fn main() {
-    let linker_file = env::var("LINKER_FILE").unwrap();
+    let linker_file = env::var("LINKER_FILE").unwrap_or_default();
 
     println!("cargo:rerun-if-changed={}", linker_file);
     println!("cargo:rerun-if-changed=build.rs");
diff --git a/08_hw_debug_JTAG/.vscode/settings.json b/08_hw_debug_JTAG/.vscode/settings.json
index a0d6a9202..0a8d7c090 100644
--- a/08_hw_debug_JTAG/.vscode/settings.json
+++ b/08_hw_debug_JTAG/.vscode/settings.json
@@ -1,7 +1,9 @@
 {
   "editor.formatOnSave": true,
   "editor.rulers": [100],
-  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"]
+  "rust-analyzer.cargo.features": ["bsp_rpi3"],
+  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
+  "rust-analyzer.lens.debug": false,
+  "rust-analyzer.lens.run": false
 }
diff --git a/08_hw_debug_JTAG/build.rs b/08_hw_debug_JTAG/build.rs
index 3f0a29110..883c59556 100644
--- a/08_hw_debug_JTAG/build.rs
+++ b/08_hw_debug_JTAG/build.rs
@@ -1,7 +1,7 @@
 use std::env;
 
 fn main() {
-    let linker_file = env::var("LINKER_FILE").unwrap();
+    let linker_file = env::var("LINKER_FILE").unwrap_or_default();
 
     println!("cargo:rerun-if-changed={}", linker_file);
     println!("cargo:rerun-if-changed=build.rs");
diff --git a/09_privilege_level/.vscode/settings.json b/09_privilege_level/.vscode/settings.json
index a0d6a9202..0a8d7c090 100644
--- a/09_privilege_level/.vscode/settings.json
+++ b/09_privilege_level/.vscode/settings.json
@@ -1,7 +1,9 @@
 {
   "editor.formatOnSave": true,
   "editor.rulers": [100],
-  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"]
+  "rust-analyzer.cargo.features": ["bsp_rpi3"],
+  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
+  "rust-analyzer.lens.debug": false,
+  "rust-analyzer.lens.run": false
 }
diff --git a/09_privilege_level/build.rs b/09_privilege_level/build.rs
index 3f0a29110..883c59556 100644
--- a/09_privilege_level/build.rs
+++ b/09_privilege_level/build.rs
@@ -1,7 +1,7 @@
 use std::env;
 
 fn main() {
-    let linker_file = env::var("LINKER_FILE").unwrap();
+    let linker_file = env::var("LINKER_FILE").unwrap_or_default();
 
     println!("cargo:rerun-if-changed={}", linker_file);
     println!("cargo:rerun-if-changed=build.rs");
diff --git a/10_virtual_mem_part1_identity_mapping/.vscode/settings.json b/10_virtual_mem_part1_identity_mapping/.vscode/settings.json
index a0d6a9202..0a8d7c090 100644
--- a/10_virtual_mem_part1_identity_mapping/.vscode/settings.json
+++ b/10_virtual_mem_part1_identity_mapping/.vscode/settings.json
@@ -1,7 +1,9 @@
 {
   "editor.formatOnSave": true,
   "editor.rulers": [100],
-  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"]
+  "rust-analyzer.cargo.features": ["bsp_rpi3"],
+  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
+  "rust-analyzer.lens.debug": false,
+  "rust-analyzer.lens.run": false
 }
diff --git a/10_virtual_mem_part1_identity_mapping/build.rs b/10_virtual_mem_part1_identity_mapping/build.rs
index 3f0a29110..883c59556 100644
--- a/10_virtual_mem_part1_identity_mapping/build.rs
+++ b/10_virtual_mem_part1_identity_mapping/build.rs
@@ -1,7 +1,7 @@
 use std::env;
 
 fn main() {
-    let linker_file = env::var("LINKER_FILE").unwrap();
+    let linker_file = env::var("LINKER_FILE").unwrap_or_default();
 
     println!("cargo:rerun-if-changed={}", linker_file);
     println!("cargo:rerun-if-changed=build.rs");
diff --git a/11_exceptions_part1_groundwork/.vscode/settings.json b/11_exceptions_part1_groundwork/.vscode/settings.json
index a0d6a9202..0a8d7c090 100644
--- a/11_exceptions_part1_groundwork/.vscode/settings.json
+++ b/11_exceptions_part1_groundwork/.vscode/settings.json
@@ -1,7 +1,9 @@
 {
   "editor.formatOnSave": true,
   "editor.rulers": [100],
-  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"]
+  "rust-analyzer.cargo.features": ["bsp_rpi3"],
+  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
+  "rust-analyzer.lens.debug": false,
+  "rust-analyzer.lens.run": false
 }
diff --git a/11_exceptions_part1_groundwork/build.rs b/11_exceptions_part1_groundwork/build.rs
index 3f0a29110..883c59556 100644
--- a/11_exceptions_part1_groundwork/build.rs
+++ b/11_exceptions_part1_groundwork/build.rs
@@ -1,7 +1,7 @@
 use std::env;
 
 fn main() {
-    let linker_file = env::var("LINKER_FILE").unwrap();
+    let linker_file = env::var("LINKER_FILE").unwrap_or_default();
 
     println!("cargo:rerun-if-changed={}", linker_file);
     println!("cargo:rerun-if-changed=build.rs");
diff --git a/12_integrated_testing/.vscode/settings.json b/12_integrated_testing/.vscode/settings.json
index a0d6a9202..0a8d7c090 100644
--- a/12_integrated_testing/.vscode/settings.json
+++ b/12_integrated_testing/.vscode/settings.json
@@ -1,7 +1,9 @@
 {
   "editor.formatOnSave": true,
   "editor.rulers": [100],
-  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"]
+  "rust-analyzer.cargo.features": ["bsp_rpi3"],
+  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
+  "rust-analyzer.lens.debug": false,
+  "rust-analyzer.lens.run": false
 }
diff --git a/12_integrated_testing/build.rs b/12_integrated_testing/build.rs
index 3f0a29110..883c59556 100644
--- a/12_integrated_testing/build.rs
+++ b/12_integrated_testing/build.rs
@@ -1,7 +1,7 @@
 use std::env;
 
 fn main() {
-    let linker_file = env::var("LINKER_FILE").unwrap();
+    let linker_file = env::var("LINKER_FILE").unwrap_or_default();
 
     println!("cargo:rerun-if-changed={}", linker_file);
     println!("cargo:rerun-if-changed=build.rs");
diff --git a/13_exceptions_part2_peripheral_IRQs/.vscode/settings.json b/13_exceptions_part2_peripheral_IRQs/.vscode/settings.json
index a0d6a9202..0a8d7c090 100644
--- a/13_exceptions_part2_peripheral_IRQs/.vscode/settings.json
+++ b/13_exceptions_part2_peripheral_IRQs/.vscode/settings.json
@@ -1,7 +1,9 @@
 {
   "editor.formatOnSave": true,
   "editor.rulers": [100],
-  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"]
+  "rust-analyzer.cargo.features": ["bsp_rpi3"],
+  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
+  "rust-analyzer.lens.debug": false,
+  "rust-analyzer.lens.run": false
 }
diff --git a/13_exceptions_part2_peripheral_IRQs/build.rs b/13_exceptions_part2_peripheral_IRQs/build.rs
index 3f0a29110..883c59556 100644
--- a/13_exceptions_part2_peripheral_IRQs/build.rs
+++ b/13_exceptions_part2_peripheral_IRQs/build.rs
@@ -1,7 +1,7 @@
 use std::env;
 
 fn main() {
-    let linker_file = env::var("LINKER_FILE").unwrap();
+    let linker_file = env::var("LINKER_FILE").unwrap_or_default();
 
     println!("cargo:rerun-if-changed={}", linker_file);
     println!("cargo:rerun-if-changed=build.rs");
diff --git a/14_virtual_mem_part2_mmio_remap/.vscode/settings.json b/14_virtual_mem_part2_mmio_remap/.vscode/settings.json
index a0d6a9202..0a8d7c090 100644
--- a/14_virtual_mem_part2_mmio_remap/.vscode/settings.json
+++ b/14_virtual_mem_part2_mmio_remap/.vscode/settings.json
@@ -1,7 +1,9 @@
 {
   "editor.formatOnSave": true,
   "editor.rulers": [100],
-  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"]
+  "rust-analyzer.cargo.features": ["bsp_rpi3"],
+  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
+  "rust-analyzer.lens.debug": false,
+  "rust-analyzer.lens.run": false
 }
diff --git a/14_virtual_mem_part2_mmio_remap/build.rs b/14_virtual_mem_part2_mmio_remap/build.rs
index 3f0a29110..883c59556 100644
--- a/14_virtual_mem_part2_mmio_remap/build.rs
+++ b/14_virtual_mem_part2_mmio_remap/build.rs
@@ -1,7 +1,7 @@
 use std::env;
 
 fn main() {
-    let linker_file = env::var("LINKER_FILE").unwrap();
+    let linker_file = env::var("LINKER_FILE").unwrap_or_default();
 
     println!("cargo:rerun-if-changed={}", linker_file);
     println!("cargo:rerun-if-changed=build.rs");
diff --git a/15_virtual_mem_part3_precomputed_tables/.vscode/settings.json b/15_virtual_mem_part3_precomputed_tables/.vscode/settings.json
index a0d6a9202..0a8d7c090 100644
--- a/15_virtual_mem_part3_precomputed_tables/.vscode/settings.json
+++ b/15_virtual_mem_part3_precomputed_tables/.vscode/settings.json
@@ -1,7 +1,9 @@
 {
   "editor.formatOnSave": true,
   "editor.rulers": [100],
-  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"]
+  "rust-analyzer.cargo.features": ["bsp_rpi3"],
+  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
+  "rust-analyzer.lens.debug": false,
+  "rust-analyzer.lens.run": false
 }
diff --git a/15_virtual_mem_part3_precomputed_tables/build.rs b/15_virtual_mem_part3_precomputed_tables/build.rs
index 3f0a29110..883c59556 100644
--- a/15_virtual_mem_part3_precomputed_tables/build.rs
+++ b/15_virtual_mem_part3_precomputed_tables/build.rs
@@ -1,7 +1,7 @@
 use std::env;
 
 fn main() {
-    let linker_file = env::var("LINKER_FILE").unwrap();
+    let linker_file = env::var("LINKER_FILE").unwrap_or_default();
 
     println!("cargo:rerun-if-changed={}", linker_file);
     println!("cargo:rerun-if-changed=build.rs");
diff --git a/16_virtual_mem_part4_higher_half_kernel/.vscode/settings.json b/16_virtual_mem_part4_higher_half_kernel/.vscode/settings.json
index a0d6a9202..0a8d7c090 100644
--- a/16_virtual_mem_part4_higher_half_kernel/.vscode/settings.json
+++ b/16_virtual_mem_part4_higher_half_kernel/.vscode/settings.json
@@ -1,7 +1,9 @@
 {
   "editor.formatOnSave": true,
   "editor.rulers": [100],
-  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"]
+  "rust-analyzer.cargo.features": ["bsp_rpi3"],
+  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
+  "rust-analyzer.lens.debug": false,
+  "rust-analyzer.lens.run": false
 }
diff --git a/16_virtual_mem_part4_higher_half_kernel/build.rs b/16_virtual_mem_part4_higher_half_kernel/build.rs
index 3f0a29110..883c59556 100644
--- a/16_virtual_mem_part4_higher_half_kernel/build.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/build.rs
@@ -1,7 +1,7 @@
 use std::env;
 
 fn main() {
-    let linker_file = env::var("LINKER_FILE").unwrap();
+    let linker_file = env::var("LINKER_FILE").unwrap_or_default();
 
     println!("cargo:rerun-if-changed={}", linker_file);
     println!("cargo:rerun-if-changed=build.rs");
diff --git a/X1_JTAG_boot/.vscode/settings.json b/X1_JTAG_boot/.vscode/settings.json
index a0d6a9202..0a8d7c090 100644
--- a/X1_JTAG_boot/.vscode/settings.json
+++ b/X1_JTAG_boot/.vscode/settings.json
@@ -1,7 +1,9 @@
 {
   "editor.formatOnSave": true,
   "editor.rulers": [100],
-  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"]
+  "rust-analyzer.cargo.features": ["bsp_rpi3"],
+  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
+  "rust-analyzer.lens.debug": false,
+  "rust-analyzer.lens.run": false
 }
diff --git a/X1_JTAG_boot/build.rs b/X1_JTAG_boot/build.rs
index 3f0a29110..883c59556 100644
--- a/X1_JTAG_boot/build.rs
+++ b/X1_JTAG_boot/build.rs
@@ -1,7 +1,7 @@
 use std::env;
 
 fn main() {
-    let linker_file = env::var("LINKER_FILE").unwrap();
+    let linker_file = env::var("LINKER_FILE").unwrap_or_default();
 
     println!("cargo:rerun-if-changed={}", linker_file);
     println!("cargo:rerun-if-changed=build.rs");

From 8c2cec00be2e158148cecb1ba4fe5330ffbbf93b Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sun, 4 Jul 2021 15:50:46 +0200
Subject: [PATCH 076/214] Assembly: Use local label syntax for named labels

This prevents that they show up in the symbol table.
---
 01_wait_forever/src/_arch/aarch64/cpu/boot.s  |  5 +++--
 02_runtime_init/README.md                     | 22 +++++++------------
 02_runtime_init/src/_arch/aarch64/cpu/boot.s  | 14 ++++++------
 .../src/_arch/aarch64/cpu/boot.s              | 14 ++++++------
 04_safe_globals/src/_arch/aarch64/cpu/boot.s  | 14 ++++++------
 .../src/_arch/aarch64/cpu/boot.s              | 14 ++++++------
 06_uart_chainloader/README.md                 | 18 +++++++--------
 .../src/_arch/aarch64/cpu/boot.s              | 18 +++++++--------
 07_timestamps/README.md                       | 18 +++++++--------
 07_timestamps/src/_arch/aarch64/cpu/boot.s    | 14 ++++++------
 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s | 14 ++++++------
 09_privilege_level/README.md                  |  4 ++--
 .../src/_arch/aarch64/cpu/boot.s              | 16 +++++++-------
 .../src/_arch/aarch64/cpu/boot.s              | 16 +++++++-------
 .../src/_arch/aarch64/cpu/boot.s              | 16 +++++++-------
 .../src/_arch/aarch64/cpu/boot.s              | 16 +++++++-------
 .../src/_arch/aarch64/cpu/boot.s              | 16 +++++++-------
 .../src/_arch/aarch64/cpu/boot.s              | 16 +++++++-------
 .../README.md                                 |  2 +-
 .../src/_arch/aarch64/cpu/boot.s              | 16 +++++++-------
 .../src/_arch/aarch64/cpu/boot.s              | 16 +++++++-------
 X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s     | 14 ++++++------
 22 files changed, 154 insertions(+), 159 deletions(-)

diff --git a/01_wait_forever/src/_arch/aarch64/cpu/boot.s b/01_wait_forever/src/_arch/aarch64/cpu/boot.s
index fb05382cd..a6d8ca565 100644
--- a/01_wait_forever/src/_arch/aarch64/cpu/boot.s
+++ b/01_wait_forever/src/_arch/aarch64/cpu/boot.s
@@ -12,8 +12,9 @@
 //------------------------------------------------------------------------------
 _start:
 	// Infinitely wait for events (aka "park the core").
-1:	wfe
-	b	1b
+.L_parking_loop:
+	wfe
+	b	.L_parking_loop
 
 .size	_start, . - _start
 .type	_start, function
diff --git a/02_runtime_init/README.md b/02_runtime_init/README.md
index 3dc0b3d36..044a2d090 100644
--- a/02_runtime_init/README.md
+++ b/02_runtime_init/README.md
@@ -110,7 +110,7 @@ diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.s 02_runtime_init/src/_arch
  // Public Code
  //--------------------------------------------------------------------------------------------------
  .section .text._start
-@@ -11,9 +29,38 @@
+@@ -11,6 +29,34 @@
  // fn _start()
  //------------------------------------------------------------------------------
  _start:
@@ -119,7 +119,7 @@ diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.s 02_runtime_init/src/_arch
 +	and	x1, x1, _core_id_mask
 +	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 +	cmp	x1, x2
-+	b.ne	parking_loop
++	b.ne	.L_parking_loop
 +
 +	// If execution reaches here, it is the boot core.
 +
@@ -127,14 +127,14 @@ diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.s 02_runtime_init/src/_arch
 +	ADR_REL	x0, __bss_start
 +	ADR_REL x1, __bss_end_exclusive
 +
-+bss_init_loop:
++.L_bss_init_loop:
 +	cmp	x0, x1
-+	b.eq	prepare_rust
++	b.eq	.L_prepare_rust
 +	stp	xzr, xzr, [x0], #16
-+	b	bss_init_loop
++	b	.L_bss_init_loop
 +
 +	// Prepare the jump to Rust code.
-+prepare_rust:
++.L_prepare_rust:
 +	// Set the stack pointer.
 +	ADR_REL	x0, __boot_core_stack_end_exclusive
 +	mov	sp, x0
@@ -143,14 +143,8 @@ diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.s 02_runtime_init/src/_arch
 +	b	_start_rust
 +
  	// Infinitely wait for events (aka "park the core").
--1:	wfe
--	b	1b
-+parking_loop:
-+	wfe
-+	b	parking_loop
-
- .size	_start, . - _start
- .type	_start, function
+ .L_parking_loop:
+ 	wfe
 
 diff -uNr 01_wait_forever/src/_arch/aarch64/cpu.rs 02_runtime_init/src/_arch/aarch64/cpu.rs
 --- 01_wait_forever/src/_arch/aarch64/cpu.rs
diff --git a/02_runtime_init/src/_arch/aarch64/cpu/boot.s b/02_runtime_init/src/_arch/aarch64/cpu/boot.s
index f4162c877..28bc1a70a 100644
--- a/02_runtime_init/src/_arch/aarch64/cpu/boot.s
+++ b/02_runtime_init/src/_arch/aarch64/cpu/boot.s
@@ -34,7 +34,7 @@ _start:
 	and	x1, x1, _core_id_mask
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
-	b.ne	parking_loop
+	b.ne	.L_parking_loop
 
 	// If execution reaches here, it is the boot core.
 
@@ -42,14 +42,14 @@ _start:
 	ADR_REL	x0, __bss_start
 	ADR_REL x1, __bss_end_exclusive
 
-bss_init_loop:
+.L_bss_init_loop:
 	cmp	x0, x1
-	b.eq	prepare_rust
+	b.eq	.L_prepare_rust
 	stp	xzr, xzr, [x0], #16
-	b	bss_init_loop
+	b	.L_bss_init_loop
 
 	// Prepare the jump to Rust code.
-prepare_rust:
+.L_prepare_rust:
 	// Set the stack pointer.
 	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
@@ -58,9 +58,9 @@ prepare_rust:
 	b	_start_rust
 
 	// Infinitely wait for events (aka "park the core").
-parking_loop:
+.L_parking_loop:
 	wfe
-	b	parking_loop
+	b	.L_parking_loop
 
 .size	_start, . - _start
 .type	_start, function
diff --git a/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.s b/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.s
index f4162c877..28bc1a70a 100644
--- a/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.s
+++ b/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.s
@@ -34,7 +34,7 @@ _start:
 	and	x1, x1, _core_id_mask
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
-	b.ne	parking_loop
+	b.ne	.L_parking_loop
 
 	// If execution reaches here, it is the boot core.
 
@@ -42,14 +42,14 @@ _start:
 	ADR_REL	x0, __bss_start
 	ADR_REL x1, __bss_end_exclusive
 
-bss_init_loop:
+.L_bss_init_loop:
 	cmp	x0, x1
-	b.eq	prepare_rust
+	b.eq	.L_prepare_rust
 	stp	xzr, xzr, [x0], #16
-	b	bss_init_loop
+	b	.L_bss_init_loop
 
 	// Prepare the jump to Rust code.
-prepare_rust:
+.L_prepare_rust:
 	// Set the stack pointer.
 	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
@@ -58,9 +58,9 @@ prepare_rust:
 	b	_start_rust
 
 	// Infinitely wait for events (aka "park the core").
-parking_loop:
+.L_parking_loop:
 	wfe
-	b	parking_loop
+	b	.L_parking_loop
 
 .size	_start, . - _start
 .type	_start, function
diff --git a/04_safe_globals/src/_arch/aarch64/cpu/boot.s b/04_safe_globals/src/_arch/aarch64/cpu/boot.s
index f4162c877..28bc1a70a 100644
--- a/04_safe_globals/src/_arch/aarch64/cpu/boot.s
+++ b/04_safe_globals/src/_arch/aarch64/cpu/boot.s
@@ -34,7 +34,7 @@ _start:
 	and	x1, x1, _core_id_mask
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
-	b.ne	parking_loop
+	b.ne	.L_parking_loop
 
 	// If execution reaches here, it is the boot core.
 
@@ -42,14 +42,14 @@ _start:
 	ADR_REL	x0, __bss_start
 	ADR_REL x1, __bss_end_exclusive
 
-bss_init_loop:
+.L_bss_init_loop:
 	cmp	x0, x1
-	b.eq	prepare_rust
+	b.eq	.L_prepare_rust
 	stp	xzr, xzr, [x0], #16
-	b	bss_init_loop
+	b	.L_bss_init_loop
 
 	// Prepare the jump to Rust code.
-prepare_rust:
+.L_prepare_rust:
 	// Set the stack pointer.
 	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
@@ -58,9 +58,9 @@ prepare_rust:
 	b	_start_rust
 
 	// Infinitely wait for events (aka "park the core").
-parking_loop:
+.L_parking_loop:
 	wfe
-	b	parking_loop
+	b	.L_parking_loop
 
 .size	_start, . - _start
 .type	_start, function
diff --git a/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s b/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s
index f4162c877..28bc1a70a 100644
--- a/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s
+++ b/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s
@@ -34,7 +34,7 @@ _start:
 	and	x1, x1, _core_id_mask
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
-	b.ne	parking_loop
+	b.ne	.L_parking_loop
 
 	// If execution reaches here, it is the boot core.
 
@@ -42,14 +42,14 @@ _start:
 	ADR_REL	x0, __bss_start
 	ADR_REL x1, __bss_end_exclusive
 
-bss_init_loop:
+.L_bss_init_loop:
 	cmp	x0, x1
-	b.eq	prepare_rust
+	b.eq	.L_prepare_rust
 	stp	xzr, xzr, [x0], #16
-	b	bss_init_loop
+	b	.L_bss_init_loop
 
 	// Prepare the jump to Rust code.
-prepare_rust:
+.L_prepare_rust:
 	// Set the stack pointer.
 	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
@@ -58,9 +58,9 @@ prepare_rust:
 	b	_start_rust
 
 	// Infinitely wait for events (aka "park the core").
-parking_loop:
+.L_parking_loop:
 	wfe
-	b	parking_loop
+	b	.L_parking_loop
 
 .size	_start, . - _start
 .type	_start, function
diff --git a/06_uart_chainloader/README.md b/06_uart_chainloader/README.md
index 18741f043..a7239e8b3 100644
--- a/06_uart_chainloader/README.md
+++ b/06_uart_chainloader/README.md
@@ -241,27 +241,27 @@ diff -uNr 05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s 06_uart_chainloader/
 +	ADR_ABS	x0, __bss_start
 +	ADR_ABS x1, __bss_end_exclusive
 
- bss_init_loop:
+ .L_bss_init_loop:
  	cmp	x0, x1
--	b.eq	prepare_rust
-+	b.eq	relocate_binary
+-	b.eq	.L_prepare_rust
++	b.eq	.L_relocate_binary
  	stp	xzr, xzr, [x0], #16
- 	b	bss_init_loop
+ 	b	.L_bss_init_loop
 
 +	// Next, relocate the binary.
-+relocate_binary:
++.L_relocate_binary:
 +	ADR_REL	x0, __binary_nonzero_start         // The address the binary got loaded to.
 +	ADR_ABS	x1, __binary_nonzero_start         // The address the binary was linked to.
 +	ADR_ABS	x2, __binary_nonzero_end_exclusive
 +
-+copy_loop:
++.L_copy_loop:
 +	ldr	x3, [x0], #8
 +	str	x3, [x1], #8
 +	cmp	x1, x2
-+	b.lo	copy_loop
++	b.lo	.L_copy_loop
 +
  	// Prepare the jump to Rust code.
--prepare_rust:
+-.L_prepare_rust:
  	// Set the stack pointer.
 -	ADR_REL	x0, __boot_core_stack_end_exclusive
 +	ADR_ABS	x0, __boot_core_stack_end_exclusive
@@ -274,7 +274,7 @@ diff -uNr 05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s 06_uart_chainloader/
 +	br	x1
 
  	// Infinitely wait for events (aka "park the core").
- parking_loop:
+ .L_parking_loop:
 
 diff -uNr 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 --- 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
diff --git a/06_uart_chainloader/src/_arch/aarch64/cpu/boot.s b/06_uart_chainloader/src/_arch/aarch64/cpu/boot.s
index c4ae4219e..e88b18867 100644
--- a/06_uart_chainloader/src/_arch/aarch64/cpu/boot.s
+++ b/06_uart_chainloader/src/_arch/aarch64/cpu/boot.s
@@ -45,7 +45,7 @@ _start:
 	and	x1, x1, _core_id_mask
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
-	b.ne	parking_loop
+	b.ne	.L_parking_loop
 
 	// If execution reaches here, it is the boot core.
 
@@ -53,23 +53,23 @@ _start:
 	ADR_ABS	x0, __bss_start
 	ADR_ABS x1, __bss_end_exclusive
 
-bss_init_loop:
+.L_bss_init_loop:
 	cmp	x0, x1
-	b.eq	relocate_binary
+	b.eq	.L_relocate_binary
 	stp	xzr, xzr, [x0], #16
-	b	bss_init_loop
+	b	.L_bss_init_loop
 
 	// Next, relocate the binary.
-relocate_binary:
+.L_relocate_binary:
 	ADR_REL	x0, __binary_nonzero_start         // The address the binary got loaded to.
 	ADR_ABS	x1, __binary_nonzero_start         // The address the binary was linked to.
 	ADR_ABS	x2, __binary_nonzero_end_exclusive
 
-copy_loop:
+.L_copy_loop:
 	ldr	x3, [x0], #8
 	str	x3, [x1], #8
 	cmp	x1, x2
-	b.lo	copy_loop
+	b.lo	.L_copy_loop
 
 	// Prepare the jump to Rust code.
 	// Set the stack pointer.
@@ -81,9 +81,9 @@ copy_loop:
 	br	x1
 
 	// Infinitely wait for events (aka "park the core").
-parking_loop:
+.L_parking_loop:
 	wfe
-	b	parking_loop
+	b	.L_parking_loop
 
 .size	_start, . - _start
 .type	_start, function
diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index 25d08f847..cfaa65d54 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -163,27 +163,27 @@ diff -uNr 06_uart_chainloader/src/_arch/aarch64/cpu/boot.s 07_timestamps/src/_ar
 +	ADR_REL	x0, __bss_start
 +	ADR_REL x1, __bss_end_exclusive
 
- bss_init_loop:
+ .L_bss_init_loop:
  	cmp	x0, x1
--	b.eq	relocate_binary
-+	b.eq	prepare_rust
+-	b.eq	.L_relocate_binary
++	b.eq	.L_prepare_rust
  	stp	xzr, xzr, [x0], #16
- 	b	bss_init_loop
+ 	b	.L_bss_init_loop
 
 -	// Next, relocate the binary.
--relocate_binary:
+-.L_relocate_binary:
 -	ADR_REL	x0, __binary_nonzero_start         // The address the binary got loaded to.
 -	ADR_ABS	x1, __binary_nonzero_start         // The address the binary was linked to.
 -	ADR_ABS	x2, __binary_nonzero_end_exclusive
 -
--copy_loop:
+-.L_copy_loop:
 -	ldr	x3, [x0], #8
 -	str	x3, [x1], #8
 -	cmp	x1, x2
--	b.lo	copy_loop
+-	b.lo	.L_copy_loop
 -
  	// Prepare the jump to Rust code.
-+prepare_rust:
++.L_prepare_rust:
  	// Set the stack pointer.
 -	ADR_ABS	x0, __boot_core_stack_end_exclusive
 +	ADR_REL	x0, __boot_core_stack_end_exclusive
@@ -196,7 +196,7 @@ diff -uNr 06_uart_chainloader/src/_arch/aarch64/cpu/boot.s 07_timestamps/src/_ar
 +	b	_start_rust
 
  	// Infinitely wait for events (aka "park the core").
- parking_loop:
+ .L_parking_loop:
 
 diff -uNr 06_uart_chainloader/src/_arch/aarch64/cpu.rs 07_timestamps/src/_arch/aarch64/cpu.rs
 --- 06_uart_chainloader/src/_arch/aarch64/cpu.rs
diff --git a/07_timestamps/src/_arch/aarch64/cpu/boot.s b/07_timestamps/src/_arch/aarch64/cpu/boot.s
index f4162c877..28bc1a70a 100644
--- a/07_timestamps/src/_arch/aarch64/cpu/boot.s
+++ b/07_timestamps/src/_arch/aarch64/cpu/boot.s
@@ -34,7 +34,7 @@ _start:
 	and	x1, x1, _core_id_mask
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
-	b.ne	parking_loop
+	b.ne	.L_parking_loop
 
 	// If execution reaches here, it is the boot core.
 
@@ -42,14 +42,14 @@ _start:
 	ADR_REL	x0, __bss_start
 	ADR_REL x1, __bss_end_exclusive
 
-bss_init_loop:
+.L_bss_init_loop:
 	cmp	x0, x1
-	b.eq	prepare_rust
+	b.eq	.L_prepare_rust
 	stp	xzr, xzr, [x0], #16
-	b	bss_init_loop
+	b	.L_bss_init_loop
 
 	// Prepare the jump to Rust code.
-prepare_rust:
+.L_prepare_rust:
 	// Set the stack pointer.
 	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
@@ -58,9 +58,9 @@ prepare_rust:
 	b	_start_rust
 
 	// Infinitely wait for events (aka "park the core").
-parking_loop:
+.L_parking_loop:
 	wfe
-	b	parking_loop
+	b	.L_parking_loop
 
 .size	_start, . - _start
 .type	_start, function
diff --git a/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s b/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s
index f4162c877..28bc1a70a 100644
--- a/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s
+++ b/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s
@@ -34,7 +34,7 @@ _start:
 	and	x1, x1, _core_id_mask
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
-	b.ne	parking_loop
+	b.ne	.L_parking_loop
 
 	// If execution reaches here, it is the boot core.
 
@@ -42,14 +42,14 @@ _start:
 	ADR_REL	x0, __bss_start
 	ADR_REL x1, __bss_end_exclusive
 
-bss_init_loop:
+.L_bss_init_loop:
 	cmp	x0, x1
-	b.eq	prepare_rust
+	b.eq	.L_prepare_rust
 	stp	xzr, xzr, [x0], #16
-	b	bss_init_loop
+	b	.L_bss_init_loop
 
 	// Prepare the jump to Rust code.
-prepare_rust:
+.L_prepare_rust:
 	// Set the stack pointer.
 	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
@@ -58,9 +58,9 @@ prepare_rust:
 	b	_start_rust
 
 	// Infinitely wait for events (aka "park the core").
-parking_loop:
+.L_parking_loop:
 	wfe
-	b	parking_loop
+	b	.L_parking_loop
 
 .size	_start, . - _start
 .type	_start, function
diff --git a/09_privilege_level/README.md b/09_privilege_level/README.md
index 7b4c0d3c0..42ad905e8 100644
--- a/09_privilege_level/README.md
+++ b/09_privilege_level/README.md
@@ -300,7 +300,7 @@ diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s 09_privilege_level/src/_
 +	// Only proceed if the core executes in EL2. Park it otherwise.
 +	mrs	x0, CurrentEL
 +	cmp	x0, _EL2
-+	b.ne	parking_loop
++	b.ne	.L_parking_loop
 +
  	// Only proceed on the boot core. Park it otherwise.
  	mrs	x1, MPIDR_EL1
@@ -308,7 +308,7 @@ diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s 09_privilege_level/src/_
 @@ -50,11 +56,11 @@
 
  	// Prepare the jump to Rust code.
- prepare_rust:
+ .L_prepare_rust:
 -	// Set the stack pointer.
 +	// Set the stack pointer. This ensures that any code in EL2 that needs the stack will work.
  	ADR_REL	x0, __boot_core_stack_end_exclusive
diff --git a/09_privilege_level/src/_arch/aarch64/cpu/boot.s b/09_privilege_level/src/_arch/aarch64/cpu/boot.s
index d1666919a..fa1984d66 100644
--- a/09_privilege_level/src/_arch/aarch64/cpu/boot.s
+++ b/09_privilege_level/src/_arch/aarch64/cpu/boot.s
@@ -33,14 +33,14 @@ _start:
 	// Only proceed if the core executes in EL2. Park it otherwise.
 	mrs	x0, CurrentEL
 	cmp	x0, _EL2
-	b.ne	parking_loop
+	b.ne	.L_parking_loop
 
 	// Only proceed on the boot core. Park it otherwise.
 	mrs	x1, MPIDR_EL1
 	and	x1, x1, _core_id_mask
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
-	b.ne	parking_loop
+	b.ne	.L_parking_loop
 
 	// If execution reaches here, it is the boot core.
 
@@ -48,14 +48,14 @@ _start:
 	ADR_REL	x0, __bss_start
 	ADR_REL x1, __bss_end_exclusive
 
-bss_init_loop:
+.L_bss_init_loop:
 	cmp	x0, x1
-	b.eq	prepare_rust
+	b.eq	.L_prepare_rust
 	stp	xzr, xzr, [x0], #16
-	b	bss_init_loop
+	b	.L_bss_init_loop
 
 	// Prepare the jump to Rust code.
-prepare_rust:
+.L_prepare_rust:
 	// Set the stack pointer. This ensures that any code in EL2 that needs the stack will work.
 	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
@@ -64,9 +64,9 @@ prepare_rust:
 	b	_start_rust
 
 	// Infinitely wait for events (aka "park the core").
-parking_loop:
+.L_parking_loop:
 	wfe
-	b	parking_loop
+	b	.L_parking_loop
 
 .size	_start, . - _start
 .type	_start, function
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.s b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.s
index d1666919a..fa1984d66 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.s
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.s
@@ -33,14 +33,14 @@ _start:
 	// Only proceed if the core executes in EL2. Park it otherwise.
 	mrs	x0, CurrentEL
 	cmp	x0, _EL2
-	b.ne	parking_loop
+	b.ne	.L_parking_loop
 
 	// Only proceed on the boot core. Park it otherwise.
 	mrs	x1, MPIDR_EL1
 	and	x1, x1, _core_id_mask
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
-	b.ne	parking_loop
+	b.ne	.L_parking_loop
 
 	// If execution reaches here, it is the boot core.
 
@@ -48,14 +48,14 @@ _start:
 	ADR_REL	x0, __bss_start
 	ADR_REL x1, __bss_end_exclusive
 
-bss_init_loop:
+.L_bss_init_loop:
 	cmp	x0, x1
-	b.eq	prepare_rust
+	b.eq	.L_prepare_rust
 	stp	xzr, xzr, [x0], #16
-	b	bss_init_loop
+	b	.L_bss_init_loop
 
 	// Prepare the jump to Rust code.
-prepare_rust:
+.L_prepare_rust:
 	// Set the stack pointer. This ensures that any code in EL2 that needs the stack will work.
 	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
@@ -64,9 +64,9 @@ prepare_rust:
 	b	_start_rust
 
 	// Infinitely wait for events (aka "park the core").
-parking_loop:
+.L_parking_loop:
 	wfe
-	b	parking_loop
+	b	.L_parking_loop
 
 .size	_start, . - _start
 .type	_start, function
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.s b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.s
index d1666919a..fa1984d66 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.s
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.s
@@ -33,14 +33,14 @@ _start:
 	// Only proceed if the core executes in EL2. Park it otherwise.
 	mrs	x0, CurrentEL
 	cmp	x0, _EL2
-	b.ne	parking_loop
+	b.ne	.L_parking_loop
 
 	// Only proceed on the boot core. Park it otherwise.
 	mrs	x1, MPIDR_EL1
 	and	x1, x1, _core_id_mask
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
-	b.ne	parking_loop
+	b.ne	.L_parking_loop
 
 	// If execution reaches here, it is the boot core.
 
@@ -48,14 +48,14 @@ _start:
 	ADR_REL	x0, __bss_start
 	ADR_REL x1, __bss_end_exclusive
 
-bss_init_loop:
+.L_bss_init_loop:
 	cmp	x0, x1
-	b.eq	prepare_rust
+	b.eq	.L_prepare_rust
 	stp	xzr, xzr, [x0], #16
-	b	bss_init_loop
+	b	.L_bss_init_loop
 
 	// Prepare the jump to Rust code.
-prepare_rust:
+.L_prepare_rust:
 	// Set the stack pointer. This ensures that any code in EL2 that needs the stack will work.
 	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
@@ -64,9 +64,9 @@ prepare_rust:
 	b	_start_rust
 
 	// Infinitely wait for events (aka "park the core").
-parking_loop:
+.L_parking_loop:
 	wfe
-	b	parking_loop
+	b	.L_parking_loop
 
 .size	_start, . - _start
 .type	_start, function
diff --git a/12_integrated_testing/src/_arch/aarch64/cpu/boot.s b/12_integrated_testing/src/_arch/aarch64/cpu/boot.s
index d1666919a..fa1984d66 100644
--- a/12_integrated_testing/src/_arch/aarch64/cpu/boot.s
+++ b/12_integrated_testing/src/_arch/aarch64/cpu/boot.s
@@ -33,14 +33,14 @@ _start:
 	// Only proceed if the core executes in EL2. Park it otherwise.
 	mrs	x0, CurrentEL
 	cmp	x0, _EL2
-	b.ne	parking_loop
+	b.ne	.L_parking_loop
 
 	// Only proceed on the boot core. Park it otherwise.
 	mrs	x1, MPIDR_EL1
 	and	x1, x1, _core_id_mask
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
-	b.ne	parking_loop
+	b.ne	.L_parking_loop
 
 	// If execution reaches here, it is the boot core.
 
@@ -48,14 +48,14 @@ _start:
 	ADR_REL	x0, __bss_start
 	ADR_REL x1, __bss_end_exclusive
 
-bss_init_loop:
+.L_bss_init_loop:
 	cmp	x0, x1
-	b.eq	prepare_rust
+	b.eq	.L_prepare_rust
 	stp	xzr, xzr, [x0], #16
-	b	bss_init_loop
+	b	.L_bss_init_loop
 
 	// Prepare the jump to Rust code.
-prepare_rust:
+.L_prepare_rust:
 	// Set the stack pointer. This ensures that any code in EL2 that needs the stack will work.
 	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
@@ -64,9 +64,9 @@ prepare_rust:
 	b	_start_rust
 
 	// Infinitely wait for events (aka "park the core").
-parking_loop:
+.L_parking_loop:
 	wfe
-	b	parking_loop
+	b	.L_parking_loop
 
 .size	_start, . - _start
 .type	_start, function
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.s b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.s
index d1666919a..fa1984d66 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.s
+++ b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.s
@@ -33,14 +33,14 @@ _start:
 	// Only proceed if the core executes in EL2. Park it otherwise.
 	mrs	x0, CurrentEL
 	cmp	x0, _EL2
-	b.ne	parking_loop
+	b.ne	.L_parking_loop
 
 	// Only proceed on the boot core. Park it otherwise.
 	mrs	x1, MPIDR_EL1
 	and	x1, x1, _core_id_mask
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
-	b.ne	parking_loop
+	b.ne	.L_parking_loop
 
 	// If execution reaches here, it is the boot core.
 
@@ -48,14 +48,14 @@ _start:
 	ADR_REL	x0, __bss_start
 	ADR_REL x1, __bss_end_exclusive
 
-bss_init_loop:
+.L_bss_init_loop:
 	cmp	x0, x1
-	b.eq	prepare_rust
+	b.eq	.L_prepare_rust
 	stp	xzr, xzr, [x0], #16
-	b	bss_init_loop
+	b	.L_bss_init_loop
 
 	// Prepare the jump to Rust code.
-prepare_rust:
+.L_prepare_rust:
 	// Set the stack pointer. This ensures that any code in EL2 that needs the stack will work.
 	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
@@ -64,9 +64,9 @@ prepare_rust:
 	b	_start_rust
 
 	// Infinitely wait for events (aka "park the core").
-parking_loop:
+.L_parking_loop:
 	wfe
-	b	parking_loop
+	b	.L_parking_loop
 
 .size	_start, . - _start
 .type	_start, function
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.s b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.s
index d1666919a..fa1984d66 100644
--- a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.s
+++ b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.s
@@ -33,14 +33,14 @@ _start:
 	// Only proceed if the core executes in EL2. Park it otherwise.
 	mrs	x0, CurrentEL
 	cmp	x0, _EL2
-	b.ne	parking_loop
+	b.ne	.L_parking_loop
 
 	// Only proceed on the boot core. Park it otherwise.
 	mrs	x1, MPIDR_EL1
 	and	x1, x1, _core_id_mask
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
-	b.ne	parking_loop
+	b.ne	.L_parking_loop
 
 	// If execution reaches here, it is the boot core.
 
@@ -48,14 +48,14 @@ _start:
 	ADR_REL	x0, __bss_start
 	ADR_REL x1, __bss_end_exclusive
 
-bss_init_loop:
+.L_bss_init_loop:
 	cmp	x0, x1
-	b.eq	prepare_rust
+	b.eq	.L_prepare_rust
 	stp	xzr, xzr, [x0], #16
-	b	bss_init_loop
+	b	.L_bss_init_loop
 
 	// Prepare the jump to Rust code.
-prepare_rust:
+.L_prepare_rust:
 	// Set the stack pointer. This ensures that any code in EL2 that needs the stack will work.
 	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
@@ -64,9 +64,9 @@ prepare_rust:
 	b	_start_rust
 
 	// Infinitely wait for events (aka "park the core").
-parking_loop:
+.L_parking_loop:
 	wfe
-	b	parking_loop
+	b	.L_parking_loop
 
 .size	_start, . - _start
 .type	_start, function
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index b06b222df..c04cb3d2d 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -832,7 +832,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.s 15_virtua
 @@ -56,11 +56,14 @@
 
  	// Prepare the jump to Rust code.
- prepare_rust:
+ .L_prepare_rust:
 +	// Load the base address of the kernel's translation tables.
 +	ldr	x0, PHYS_KERNEL_TABLES_BASE_ADDR // provided by bsp/__board_name__/memory/mmu.rs
 +
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.s b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.s
index 9e7fc619a..6b167d172 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.s
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.s
@@ -33,14 +33,14 @@ _start:
 	// Only proceed if the core executes in EL2. Park it otherwise.
 	mrs	x0, CurrentEL
 	cmp	x0, _EL2
-	b.ne	parking_loop
+	b.ne	.L_parking_loop
 
 	// Only proceed on the boot core. Park it otherwise.
 	mrs	x1, MPIDR_EL1
 	and	x1, x1, _core_id_mask
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
-	b.ne	parking_loop
+	b.ne	.L_parking_loop
 
 	// If execution reaches here, it is the boot core.
 
@@ -48,14 +48,14 @@ _start:
 	ADR_REL	x0, __bss_start
 	ADR_REL x1, __bss_end_exclusive
 
-bss_init_loop:
+.L_bss_init_loop:
 	cmp	x0, x1
-	b.eq	prepare_rust
+	b.eq	.L_prepare_rust
 	stp	xzr, xzr, [x0], #16
-	b	bss_init_loop
+	b	.L_bss_init_loop
 
 	// Prepare the jump to Rust code.
-prepare_rust:
+.L_prepare_rust:
 	// Load the base address of the kernel's translation tables.
 	ldr	x0, PHYS_KERNEL_TABLES_BASE_ADDR // provided by bsp/__board_name__/memory/mmu.rs
 
@@ -67,9 +67,9 @@ prepare_rust:
 	b	_start_rust
 
 	// Infinitely wait for events (aka "park the core").
-parking_loop:
+.L_parking_loop:
 	wfe
-	b	parking_loop
+	b	.L_parking_loop
 
 .size	_start, . - _start
 .type	_start, function
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.s b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.s
index 32a5c3ff6..d37b4623a 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.s
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.s
@@ -45,14 +45,14 @@ _start:
 	// Only proceed if the core executes in EL2. Park it otherwise.
 	mrs	x0, CurrentEL
 	cmp	x0, _EL2
-	b.ne	parking_loop
+	b.ne	.L_parking_loop
 
 	// Only proceed on the boot core. Park it otherwise.
 	mrs	x1, MPIDR_EL1
 	and	x1, x1, _core_id_mask
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
-	b.ne	parking_loop
+	b.ne	.L_parking_loop
 
 	// If execution reaches here, it is the boot core.
 
@@ -60,14 +60,14 @@ _start:
 	ADR_REL	x0, __bss_start
 	ADR_REL x1, __bss_end_exclusive
 
-bss_init_loop:
+.L_bss_init_loop:
 	cmp	x0, x1
-	b.eq	prepare_rust
+	b.eq	.L_prepare_rust
 	stp	xzr, xzr, [x0], #16
-	b	bss_init_loop
+	b	.L_bss_init_loop
 
 	// Prepare the jump to Rust code.
-prepare_rust:
+.L_prepare_rust:
 	// Load the base address of the kernel's translation tables.
 	ldr	x0, PHYS_KERNEL_TABLES_BASE_ADDR // provided by bsp/__board_name__/memory/mmu.rs
 
@@ -91,9 +91,9 @@ prepare_rust:
 	b	_start_rust
 
 	// Infinitely wait for events (aka "park the core").
-parking_loop:
+.L_parking_loop:
 	wfe
-	b	parking_loop
+	b	.L_parking_loop
 
 .size	_start, . - _start
 .type	_start, function
diff --git a/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s b/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s
index f4162c877..28bc1a70a 100644
--- a/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s
+++ b/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s
@@ -34,7 +34,7 @@ _start:
 	and	x1, x1, _core_id_mask
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
-	b.ne	parking_loop
+	b.ne	.L_parking_loop
 
 	// If execution reaches here, it is the boot core.
 
@@ -42,14 +42,14 @@ _start:
 	ADR_REL	x0, __bss_start
 	ADR_REL x1, __bss_end_exclusive
 
-bss_init_loop:
+.L_bss_init_loop:
 	cmp	x0, x1
-	b.eq	prepare_rust
+	b.eq	.L_prepare_rust
 	stp	xzr, xzr, [x0], #16
-	b	bss_init_loop
+	b	.L_bss_init_loop
 
 	// Prepare the jump to Rust code.
-prepare_rust:
+.L_prepare_rust:
 	// Set the stack pointer.
 	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
@@ -58,9 +58,9 @@ prepare_rust:
 	b	_start_rust
 
 	// Infinitely wait for events (aka "park the core").
-parking_loop:
+.L_parking_loop:
 	wfe
-	b	parking_loop
+	b	.L_parking_loop
 
 .size	_start, . - _start
 .type	_start, function

From 04e0f5bae08214c948c3595d84b592260f13349c Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 5 Jul 2021 23:59:18 +0200
Subject: [PATCH 077/214] Switch to tock-registers: Sources for tutorial 16

---
 .../Cargo.lock                                | 25 ++++++-------------
 .../Cargo.toml                                | 10 ++++----
 .../src/_arch/aarch64/cpu/boot.rs             |  3 ++-
 .../src/_arch/aarch64/cpu/smp.rs              |  3 ++-
 .../src/_arch/aarch64/exception.rs            |  7 ++++--
 .../_arch/aarch64/exception/asynchronous.rs   | 13 +++++-----
 .../src/_arch/aarch64/memory/mmu.rs           |  3 ++-
 .../aarch64/memory/mmu/translation_table.rs   | 10 +++++---
 .../src/_arch/aarch64/time.rs                 |  3 ++-
 .../src/bsp/device_driver/arm/gicv2/gicc.rs   |  6 ++++-
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |  6 ++++-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  6 ++++-
 .../peripheral_ic.rs                          |  6 ++++-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  7 +++++-
 .../src/lib.rs                                |  2 +-
 15 files changed, 67 insertions(+), 43 deletions(-)

diff --git a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
index 5703573b5..b9a33f4ec 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
+++ b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
@@ -4,11 +4,11 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "5.1.6"
+version = "6.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "ecefc30975eb87afc5a810d4b2305c0ec29e607ea97e51b2ecd80766e9268d28"
+checksum = "d25a057b35117d030453cd322f7adbdd331e886bc5bde46cdae656952c4feba6"
 dependencies = [
- "register",
+ "tock-registers",
 ]
 
 [[package]]
@@ -17,9 +17,9 @@ version = "0.16.0"
 dependencies = [
  "cortex-a",
  "qemu-exit",
- "register",
  "test-macros",
  "test-types",
+ "tock-registers",
 ]
 
 [[package]]
@@ -33,9 +33,9 @@ dependencies = [
 
 [[package]]
 name = "qemu-exit"
-version = "1.0.2"
+version = "2.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "702abe3c3255be20a4d67bda326c4117081a49a57afaf752de4845091bc6b476"
+checksum = "e179da212ad772061d4120ad2a86a019f929362a477582d8c8014dbf7509cd83"
 
 [[package]]
 name = "quote"
@@ -46,15 +46,6 @@ dependencies = [
  "proc-macro2",
 ]
 
-[[package]]
-name = "register"
-version = "1.0.2"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f4a247de29ab7cc8f5006cfe775c4a81c704f9914c5e2a79696862e643135433"
-dependencies = [
- "tock-registers",
-]
-
 [[package]]
 name = "syn"
 version = "1.0.68"
@@ -82,9 +73,9 @@ version = "0.1.0"
 
 [[package]]
 name = "tock-registers"
-version = "0.6.0"
+version = "0.7.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f521a79accce68c417c9c77ce22108056b626126da1932f7e2e9b5bbffee0cea"
+checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
 name = "unicode-xid"
diff --git a/16_virtual_mem_part4_higher_half_kernel/Cargo.toml b/16_virtual_mem_part4_higher_half_kernel/Cargo.toml
index f7147ecd3..4fd433bf7 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Cargo.toml
+++ b/16_virtual_mem_part4_higher_half_kernel/Cargo.toml
@@ -9,8 +9,8 @@ lto = true
 
 [features]
 default = []
-bsp_rpi3 = ["register"]
-bsp_rpi4 = ["register"]
+bsp_rpi3 = ["tock-registers"]
+bsp_rpi4 = ["tock-registers"]
 test_build = ["qemu-exit"]
 
 ##--------------------------------------------------------------------------------------------------
@@ -21,12 +21,12 @@ test_build = ["qemu-exit"]
 test-types = { path = "test-types" }
 
 # Optional dependencies
-register = { version = "1.x.x", features = ["no_std_unit_tests"], optional = true }
-qemu-exit = { version = "1.x.x", optional = true }
+tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
+qemu-exit = { version = "2.x.x", optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "5.x.x" }
+cortex-a = { version = "6.x.x" }
 
 ##--------------------------------------------------------------------------------------------------
 ## Testing
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs
index fe8e90600..176c628a3 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs
@@ -13,7 +13,8 @@
 
 use crate::{cpu, memory, memory::Address};
 use core::intrinsics::unlikely;
-use cortex_a::{asm, regs::*};
+use cortex_a::{asm, registers::*};
+use tock_registers::interfaces::Writeable;
 
 // Assembly counterpart to this file.
 global_asm!(include_str!("boot.s"));
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/smp.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/smp.rs
index b9fdd0f73..0ea9b8764 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/smp.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/smp.rs
@@ -11,7 +11,8 @@
 //!
 //! crate::cpu::smp::arch_smp
 
-use cortex_a::regs::*;
+use cortex_a::registers::*;
+use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.rs
index 4a2c8de96..1aac65454 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.rs
@@ -17,8 +17,11 @@ use crate::{
     memory::Address,
 };
 use core::{cell::UnsafeCell, fmt};
-use cortex_a::{barrier, regs::*};
-use register::InMemoryRegister;
+use cortex_a::{asm::barrier, registers::*};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    registers::InMemoryRegister,
+};
 
 // Assembly counterpart to this file.
 global_asm!(include_str!("exception.s"));
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception/asynchronous.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception/asynchronous.rs
index a4b1a548e..4e79cc8a1 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception/asynchronous.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception/asynchronous.rs
@@ -11,7 +11,8 @@
 //!
 //! crate::exception::asynchronous::arch_asynchronous
 
-use cortex_a::regs::*;
+use cortex_a::registers::*;
+use tock_registers::interfaces::{Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -22,7 +23,7 @@ mod daif_bits {
 }
 
 trait DaifField {
-    fn daif_field() -> register::Field<u64, DAIF::Register>;
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register>;
 }
 
 struct Debug;
@@ -35,25 +36,25 @@ struct FIQ;
 //--------------------------------------------------------------------------------------------------
 
 impl DaifField for Debug {
-    fn daif_field() -> register::Field<u64, DAIF::Register> {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
         DAIF::D
     }
 }
 
 impl DaifField for SError {
-    fn daif_field() -> register::Field<u64, DAIF::Register> {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
         DAIF::A
     }
 }
 
 impl DaifField for IRQ {
-    fn daif_field() -> register::Field<u64, DAIF::Register> {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
         DAIF::I
     }
 }
 
 impl DaifField for FIQ {
-    fn daif_field() -> register::Field<u64, DAIF::Register> {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
         DAIF::F
     }
 }
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu.rs
index f9e3d59bd..830fb9daf 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu.rs
@@ -18,7 +18,8 @@ use crate::{
     memory::{mmu::TranslationGranule, Address, Physical, Virtual},
 };
 use core::intrinsics::unlikely;
-use cortex_a::{barrier, regs::*};
+use cortex_a::{asm::barrier, registers::*};
+use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
index a2758b157..662ee3ee5 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -24,7 +24,11 @@ use crate::{
     },
 };
 use core::convert::{self, TryInto};
-use register::{register_bitfields, InMemoryRegister};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields,
+    registers::InMemoryRegister,
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -180,7 +184,7 @@ impl TableDescriptor {
 
 /// Convert the kernel's generic memory attributes to HW-specific attributes of the MMU.
 impl convert::From<AttributeFields>
-    for register::FieldValue<u64, STAGE1_PAGE_DESCRIPTOR::Register>
+    for tock_registers::fields::FieldValue<u64, STAGE1_PAGE_DESCRIPTOR::Register>
 {
     fn from(attribute_fields: AttributeFields) -> Self {
         // Memory attributes.
@@ -426,7 +430,7 @@ impl<const NUM_TABLES: usize, const START_FROM_TOP: bool>
                 return Err("Virtual page is already mapped");
             }
 
-            *page_descriptor = PageDescriptor::from_output_addr(phys_page.as_ptr(), &attr);
+            *page_descriptor = PageDescriptor::from_output_addr(phys_page.as_ptr(), attr);
         }
 
         Ok(())
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/time.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/time.rs
index 63017305b..7a7647ef7 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/time.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/time.rs
@@ -13,7 +13,8 @@
 
 use crate::{time, warn};
 use core::time::Duration;
-use cortex_a::{barrier, regs::*};
+use cortex_a::{asm::barrier, registers::*};
+use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2/gicc.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
index a1279f956..abfadb0c0 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
@@ -7,7 +7,11 @@
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper, exception, synchronization::InitStateLock,
 };
-use register::{mmio::*, register_bitfields, register_structs};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields, register_structs,
+    registers::ReadWrite,
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2/gicd.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
index 5f56e54a1..ae7861c98 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -12,7 +12,11 @@ use crate::{
     state, synchronization,
     synchronization::{IRQSafeNullLock, InitStateLock},
 };
-use register::{mmio::*, register_bitfields, register_structs};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields, register_structs,
+    registers::{ReadOnly, ReadWrite},
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index e444812ba..9bdc73f8a 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -9,7 +9,11 @@ use crate::{
     synchronization::IRQSafeNullLock,
 };
 use core::sync::atomic::{AtomicUsize, Ordering};
-use register::{mmio::*, register_bitfields, register_structs};
+use tock_registers::{
+    interfaces::{ReadWriteable, Writeable},
+    register_bitfields, register_structs,
+    registers::ReadWrite,
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index abc3af711..5934e6dd1 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -10,7 +10,11 @@ use crate::{
     driver, exception, memory, synchronization,
     synchronization::{IRQSafeNullLock, InitStateLock},
 };
-use register::{mmio::*, register_structs};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_structs,
+    registers::{ReadOnly, WriteOnly},
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 3adb9137d..13664712c 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -17,7 +17,11 @@ use core::{
     fmt,
     sync::atomic::{AtomicUsize, Ordering},
 };
-use register::{mmio::*, register_bitfields, register_structs};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields, register_structs,
+    registers::{ReadOnly, ReadWrite, WriteOnly},
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -84,6 +88,7 @@ register_bitfields! {
     LCR_H [
         /// Word length. These bits indicate the number of data bits transmitted or received in a
         /// frame.
+        #[allow(clippy::enum_variant_names)]
         WLEN OFFSET(5) NUMBITS(2) [
             FiveBit = 0b00,
             SixBit = 0b01,
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/lib.rs b/16_virtual_mem_part4_higher_half_kernel/src/lib.rs
index 3e3e08d8f..7b5cdb09b 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/lib.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/lib.rs
@@ -110,8 +110,8 @@
 #![allow(incomplete_features)]
 #![feature(asm)]
 #![feature(const_evaluatable_checked)]
-#![feature(const_fn)]
 #![feature(const_fn_fn_ptr_basics)]
+#![feature(const_fn_trait_bound)]
 #![feature(const_generics)]
 #![feature(const_panic)]
 #![feature(core_intrinsics)]

From 69eac31e05a0989133d6c9f80d4cdfb8a2870ace Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 5 Jul 2021 23:59:42 +0200
Subject: [PATCH 078/214] Switch to tock-registers: Sources for tutorial 15

---
 .../Cargo.lock                                | 25 ++++++-------------
 .../Cargo.toml                                | 10 ++++----
 .../src/_arch/aarch64/cpu/boot.rs             |  3 ++-
 .../src/_arch/aarch64/cpu/smp.rs              |  3 ++-
 .../src/_arch/aarch64/exception.rs            |  7 ++++--
 .../_arch/aarch64/exception/asynchronous.rs   | 13 +++++-----
 .../src/_arch/aarch64/memory/mmu.rs           |  3 ++-
 .../aarch64/memory/mmu/translation_table.rs   | 10 +++++---
 .../src/_arch/aarch64/time.rs                 |  3 ++-
 .../src/bsp/device_driver/arm/gicv2/gicc.rs   |  6 ++++-
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |  6 ++++-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  6 ++++-
 .../peripheral_ic.rs                          |  6 ++++-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  7 +++++-
 .../src/lib.rs                                |  2 +-
 15 files changed, 67 insertions(+), 43 deletions(-)

diff --git a/15_virtual_mem_part3_precomputed_tables/Cargo.lock b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
index cc4041447..d91bc03d3 100644
--- a/15_virtual_mem_part3_precomputed_tables/Cargo.lock
+++ b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
@@ -4,11 +4,11 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "5.1.6"
+version = "6.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "ecefc30975eb87afc5a810d4b2305c0ec29e607ea97e51b2ecd80766e9268d28"
+checksum = "d25a057b35117d030453cd322f7adbdd331e886bc5bde46cdae656952c4feba6"
 dependencies = [
- "register",
+ "tock-registers",
 ]
 
 [[package]]
@@ -17,9 +17,9 @@ version = "0.15.0"
 dependencies = [
  "cortex-a",
  "qemu-exit",
- "register",
  "test-macros",
  "test-types",
+ "tock-registers",
 ]
 
 [[package]]
@@ -33,9 +33,9 @@ dependencies = [
 
 [[package]]
 name = "qemu-exit"
-version = "1.0.2"
+version = "2.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "702abe3c3255be20a4d67bda326c4117081a49a57afaf752de4845091bc6b476"
+checksum = "e179da212ad772061d4120ad2a86a019f929362a477582d8c8014dbf7509cd83"
 
 [[package]]
 name = "quote"
@@ -46,15 +46,6 @@ dependencies = [
  "proc-macro2",
 ]
 
-[[package]]
-name = "register"
-version = "1.0.2"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f4a247de29ab7cc8f5006cfe775c4a81c704f9914c5e2a79696862e643135433"
-dependencies = [
- "tock-registers",
-]
-
 [[package]]
 name = "syn"
 version = "1.0.68"
@@ -82,9 +73,9 @@ version = "0.1.0"
 
 [[package]]
 name = "tock-registers"
-version = "0.6.0"
+version = "0.7.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f521a79accce68c417c9c77ce22108056b626126da1932f7e2e9b5bbffee0cea"
+checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
 name = "unicode-xid"
diff --git a/15_virtual_mem_part3_precomputed_tables/Cargo.toml b/15_virtual_mem_part3_precomputed_tables/Cargo.toml
index 4449da657..8ce927a2f 100644
--- a/15_virtual_mem_part3_precomputed_tables/Cargo.toml
+++ b/15_virtual_mem_part3_precomputed_tables/Cargo.toml
@@ -9,8 +9,8 @@ lto = true
 
 [features]
 default = []
-bsp_rpi3 = ["register"]
-bsp_rpi4 = ["register"]
+bsp_rpi3 = ["tock-registers"]
+bsp_rpi4 = ["tock-registers"]
 test_build = ["qemu-exit"]
 
 ##--------------------------------------------------------------------------------------------------
@@ -21,12 +21,12 @@ test_build = ["qemu-exit"]
 test-types = { path = "test-types" }
 
 # Optional dependencies
-register = { version = "1.x.x", features = ["no_std_unit_tests"], optional = true }
-qemu-exit = { version = "1.x.x", optional = true }
+tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
+qemu-exit = { version = "2.x.x", optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "5.x.x" }
+cortex-a = { version = "6.x.x" }
 
 ##--------------------------------------------------------------------------------------------------
 ## Testing
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
index f275c792d..d22b61877 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
@@ -13,7 +13,8 @@
 
 use crate::{cpu, memory, memory::Address};
 use core::intrinsics::unlikely;
-use cortex_a::{asm, regs::*};
+use cortex_a::{asm, registers::*};
+use tock_registers::interfaces::Writeable;
 
 // Assembly counterpart to this file.
 global_asm!(include_str!("boot.s"));
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/smp.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/smp.rs
index b9fdd0f73..0ea9b8764 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/smp.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/smp.rs
@@ -11,7 +11,8 @@
 //!
 //! crate::cpu::smp::arch_smp
 
-use cortex_a::regs::*;
+use cortex_a::registers::*;
+use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.rs
index 4a2c8de96..1aac65454 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.rs
@@ -17,8 +17,11 @@ use crate::{
     memory::Address,
 };
 use core::{cell::UnsafeCell, fmt};
-use cortex_a::{barrier, regs::*};
-use register::InMemoryRegister;
+use cortex_a::{asm::barrier, registers::*};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    registers::InMemoryRegister,
+};
 
 // Assembly counterpart to this file.
 global_asm!(include_str!("exception.s"));
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception/asynchronous.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception/asynchronous.rs
index a4b1a548e..4e79cc8a1 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception/asynchronous.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception/asynchronous.rs
@@ -11,7 +11,8 @@
 //!
 //! crate::exception::asynchronous::arch_asynchronous
 
-use cortex_a::regs::*;
+use cortex_a::registers::*;
+use tock_registers::interfaces::{Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -22,7 +23,7 @@ mod daif_bits {
 }
 
 trait DaifField {
-    fn daif_field() -> register::Field<u64, DAIF::Register>;
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register>;
 }
 
 struct Debug;
@@ -35,25 +36,25 @@ struct FIQ;
 //--------------------------------------------------------------------------------------------------
 
 impl DaifField for Debug {
-    fn daif_field() -> register::Field<u64, DAIF::Register> {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
         DAIF::D
     }
 }
 
 impl DaifField for SError {
-    fn daif_field() -> register::Field<u64, DAIF::Register> {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
         DAIF::A
     }
 }
 
 impl DaifField for IRQ {
-    fn daif_field() -> register::Field<u64, DAIF::Register> {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
         DAIF::I
     }
 }
 
 impl DaifField for FIQ {
-    fn daif_field() -> register::Field<u64, DAIF::Register> {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
         DAIF::F
     }
 }
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu.rs
index 49e6630ed..86b5337c4 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu.rs
@@ -18,7 +18,8 @@ use crate::{
     memory::{mmu::TranslationGranule, Address, Physical, Virtual},
 };
 use core::intrinsics::unlikely;
-use cortex_a::{barrier, regs::*};
+use cortex_a::{asm::barrier, registers::*};
+use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs
index 6b7227b3b..d4fa1f39b 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -24,7 +24,11 @@ use crate::{
     },
 };
 use core::convert::{self, TryInto};
-use register::{register_bitfields, InMemoryRegister};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields,
+    registers::InMemoryRegister,
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -180,7 +184,7 @@ impl TableDescriptor {
 
 /// Convert the kernel's generic memory attributes to HW-specific attributes of the MMU.
 impl convert::From<AttributeFields>
-    for register::FieldValue<u64, STAGE1_PAGE_DESCRIPTOR::Register>
+    for tock_registers::fields::FieldValue<u64, STAGE1_PAGE_DESCRIPTOR::Register>
 {
     fn from(attribute_fields: AttributeFields) -> Self {
         // Memory attributes.
@@ -399,7 +403,7 @@ impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::Transla
                 return Err("Virtual page is already mapped");
             }
 
-            *page_descriptor = PageDescriptor::from_output_addr(phys_page.as_ptr(), &attr);
+            *page_descriptor = PageDescriptor::from_output_addr(phys_page.as_ptr(), attr);
         }
 
         Ok(())
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/time.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/time.rs
index 63017305b..7a7647ef7 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/time.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/time.rs
@@ -13,7 +13,8 @@
 
 use crate::{time, warn};
 use core::time::Duration;
-use cortex_a::{barrier, regs::*};
+use cortex_a::{asm::barrier, registers::*};
+use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2/gicc.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2/gicc.rs
index a1279f956..abfadb0c0 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2/gicc.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2/gicc.rs
@@ -7,7 +7,11 @@
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper, exception, synchronization::InitStateLock,
 };
-use register::{mmio::*, register_bitfields, register_structs};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields, register_structs,
+    registers::ReadWrite,
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2/gicd.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2/gicd.rs
index 5f56e54a1..ae7861c98 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2/gicd.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -12,7 +12,11 @@ use crate::{
     state, synchronization,
     synchronization::{IRQSafeNullLock, InitStateLock},
 };
-use register::{mmio::*, register_bitfields, register_structs};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields, register_structs,
+    registers::{ReadOnly, ReadWrite},
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index e444812ba..9bdc73f8a 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -9,7 +9,11 @@ use crate::{
     synchronization::IRQSafeNullLock,
 };
 use core::sync::atomic::{AtomicUsize, Ordering};
-use register::{mmio::*, register_bitfields, register_structs};
+use tock_registers::{
+    interfaces::{ReadWriteable, Writeable},
+    register_bitfields, register_structs,
+    registers::ReadWrite,
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index abc3af711..5934e6dd1 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -10,7 +10,11 @@ use crate::{
     driver, exception, memory, synchronization,
     synchronization::{IRQSafeNullLock, InitStateLock},
 };
-use register::{mmio::*, register_structs};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_structs,
+    registers::{ReadOnly, WriteOnly},
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 3adb9137d..13664712c 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -17,7 +17,11 @@ use core::{
     fmt,
     sync::atomic::{AtomicUsize, Ordering},
 };
-use register::{mmio::*, register_bitfields, register_structs};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields, register_structs,
+    registers::{ReadOnly, ReadWrite, WriteOnly},
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -84,6 +88,7 @@ register_bitfields! {
     LCR_H [
         /// Word length. These bits indicate the number of data bits transmitted or received in a
         /// frame.
+        #[allow(clippy::enum_variant_names)]
         WLEN OFFSET(5) NUMBITS(2) [
             FiveBit = 0b00,
             SixBit = 0b01,
diff --git a/15_virtual_mem_part3_precomputed_tables/src/lib.rs b/15_virtual_mem_part3_precomputed_tables/src/lib.rs
index 1b2cb367a..8a0297385 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/lib.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/lib.rs
@@ -110,8 +110,8 @@
 #![allow(incomplete_features)]
 #![feature(asm)]
 #![feature(const_evaluatable_checked)]
-#![feature(const_fn)]
 #![feature(const_fn_fn_ptr_basics)]
+#![feature(const_fn_trait_bound)]
 #![feature(const_generics)]
 #![feature(const_panic)]
 #![feature(core_intrinsics)]

From 7c0272c365d30132d52dd333c3b86c5321e1ab11 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Tue, 6 Jul 2021 00:07:55 +0200
Subject: [PATCH 079/214] Switch to tock-registers: Sources for tutorial 14

---
 14_virtual_mem_part2_mmio_remap/Cargo.lock    | 25 ++++++-------------
 14_virtual_mem_part2_mmio_remap/Cargo.toml    | 10 ++++----
 .../src/_arch/aarch64/cpu/boot.rs             |  3 ++-
 .../src/_arch/aarch64/cpu/smp.rs              |  3 ++-
 .../src/_arch/aarch64/exception.rs            |  7 ++++--
 .../_arch/aarch64/exception/asynchronous.rs   | 13 +++++-----
 .../src/_arch/aarch64/memory/mmu.rs           |  3 ++-
 .../aarch64/memory/mmu/translation_table.rs   | 10 +++++---
 .../src/_arch/aarch64/time.rs                 |  3 ++-
 .../src/bsp/device_driver/arm/gicv2/gicc.rs   |  6 ++++-
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |  6 ++++-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  6 ++++-
 .../peripheral_ic.rs                          |  6 ++++-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  7 +++++-
 14_virtual_mem_part2_mmio_remap/src/lib.rs    |  2 +-
 15 files changed, 67 insertions(+), 43 deletions(-)

diff --git a/14_virtual_mem_part2_mmio_remap/Cargo.lock b/14_virtual_mem_part2_mmio_remap/Cargo.lock
index 24a35e1d8..6257551ab 100644
--- a/14_virtual_mem_part2_mmio_remap/Cargo.lock
+++ b/14_virtual_mem_part2_mmio_remap/Cargo.lock
@@ -4,11 +4,11 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "5.1.6"
+version = "6.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "ecefc30975eb87afc5a810d4b2305c0ec29e607ea97e51b2ecd80766e9268d28"
+checksum = "d25a057b35117d030453cd322f7adbdd331e886bc5bde46cdae656952c4feba6"
 dependencies = [
- "register",
+ "tock-registers",
 ]
 
 [[package]]
@@ -17,9 +17,9 @@ version = "0.14.0"
 dependencies = [
  "cortex-a",
  "qemu-exit",
- "register",
  "test-macros",
  "test-types",
+ "tock-registers",
 ]
 
 [[package]]
@@ -33,9 +33,9 @@ dependencies = [
 
 [[package]]
 name = "qemu-exit"
-version = "1.0.2"
+version = "2.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "702abe3c3255be20a4d67bda326c4117081a49a57afaf752de4845091bc6b476"
+checksum = "e179da212ad772061d4120ad2a86a019f929362a477582d8c8014dbf7509cd83"
 
 [[package]]
 name = "quote"
@@ -46,15 +46,6 @@ dependencies = [
  "proc-macro2",
 ]
 
-[[package]]
-name = "register"
-version = "1.0.2"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f4a247de29ab7cc8f5006cfe775c4a81c704f9914c5e2a79696862e643135433"
-dependencies = [
- "tock-registers",
-]
-
 [[package]]
 name = "syn"
 version = "1.0.68"
@@ -82,9 +73,9 @@ version = "0.1.0"
 
 [[package]]
 name = "tock-registers"
-version = "0.6.0"
+version = "0.7.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f521a79accce68c417c9c77ce22108056b626126da1932f7e2e9b5bbffee0cea"
+checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
 name = "unicode-xid"
diff --git a/14_virtual_mem_part2_mmio_remap/Cargo.toml b/14_virtual_mem_part2_mmio_remap/Cargo.toml
index ad9a78151..002b7bbd8 100644
--- a/14_virtual_mem_part2_mmio_remap/Cargo.toml
+++ b/14_virtual_mem_part2_mmio_remap/Cargo.toml
@@ -9,8 +9,8 @@ lto = true
 
 [features]
 default = []
-bsp_rpi3 = ["register"]
-bsp_rpi4 = ["register"]
+bsp_rpi3 = ["tock-registers"]
+bsp_rpi4 = ["tock-registers"]
 test_build = ["qemu-exit"]
 
 ##--------------------------------------------------------------------------------------------------
@@ -21,12 +21,12 @@ test_build = ["qemu-exit"]
 test-types = { path = "test-types" }
 
 # Optional dependencies
-register = { version = "1.x.x", features = ["no_std_unit_tests"], optional = true }
-qemu-exit = { version = "1.x.x", optional = true }
+tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
+qemu-exit = { version = "2.x.x", optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "5.x.x" }
+cortex-a = { version = "6.x.x" }
 
 ##--------------------------------------------------------------------------------------------------
 ## Testing
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs
index b743418e6..4f0068622 100644
--- a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs
@@ -11,7 +11,8 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-use cortex_a::{asm, regs::*};
+use cortex_a::{asm, registers::*};
+use tock_registers::interfaces::Writeable;
 
 // Assembly counterpart to this file.
 global_asm!(include_str!("boot.s"));
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/smp.rs b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/smp.rs
index b9fdd0f73..0ea9b8764 100644
--- a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/smp.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/smp.rs
@@ -11,7 +11,8 @@
 //!
 //! crate::cpu::smp::arch_smp
 
-use cortex_a::regs::*;
+use cortex_a::registers::*;
+use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
index 4a2c8de96..1aac65454 100644
--- a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
@@ -17,8 +17,11 @@ use crate::{
     memory::Address,
 };
 use core::{cell::UnsafeCell, fmt};
-use cortex_a::{barrier, regs::*};
-use register::InMemoryRegister;
+use cortex_a::{asm::barrier, registers::*};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    registers::InMemoryRegister,
+};
 
 // Assembly counterpart to this file.
 global_asm!(include_str!("exception.s"));
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception/asynchronous.rs b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception/asynchronous.rs
index a4b1a548e..4e79cc8a1 100644
--- a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception/asynchronous.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception/asynchronous.rs
@@ -11,7 +11,8 @@
 //!
 //! crate::exception::asynchronous::arch_asynchronous
 
-use cortex_a::regs::*;
+use cortex_a::registers::*;
+use tock_registers::interfaces::{Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -22,7 +23,7 @@ mod daif_bits {
 }
 
 trait DaifField {
-    fn daif_field() -> register::Field<u64, DAIF::Register>;
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register>;
 }
 
 struct Debug;
@@ -35,25 +36,25 @@ struct FIQ;
 //--------------------------------------------------------------------------------------------------
 
 impl DaifField for Debug {
-    fn daif_field() -> register::Field<u64, DAIF::Register> {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
         DAIF::D
     }
 }
 
 impl DaifField for SError {
-    fn daif_field() -> register::Field<u64, DAIF::Register> {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
         DAIF::A
     }
 }
 
 impl DaifField for IRQ {
-    fn daif_field() -> register::Field<u64, DAIF::Register> {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
         DAIF::I
     }
 }
 
 impl DaifField for FIQ {
-    fn daif_field() -> register::Field<u64, DAIF::Register> {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
         DAIF::F
     }
 }
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
index 223115168..2cad10b76 100644
--- a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
@@ -18,7 +18,8 @@ use crate::{
     memory::{mmu::TranslationGranule, Address, Physical},
 };
 use core::intrinsics::unlikely;
-use cortex_a::{barrier, regs::*};
+use cortex_a::{asm::barrier, registers::*};
+use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
index df7413614..0a9f6d52c 100644
--- a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -24,7 +24,11 @@ use crate::{
     },
 };
 use core::convert;
-use register::{register_bitfields, InMemoryRegister};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields,
+    registers::InMemoryRegister,
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -181,7 +185,7 @@ impl TableDescriptor {
 
 /// Convert the kernel's generic memory attributes to HW-specific attributes of the MMU.
 impl convert::From<AttributeFields>
-    for register::FieldValue<u64, STAGE1_PAGE_DESCRIPTOR::Register>
+    for tock_registers::fields::FieldValue<u64, STAGE1_PAGE_DESCRIPTOR::Register>
 {
     fn from(attribute_fields: AttributeFields) -> Self {
         // Memory attributes.
@@ -389,7 +393,7 @@ impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::Transla
                 return Err("Virtual page is already mapped");
             }
 
-            *page_descriptor = PageDescriptor::from_output_addr(phys_page.as_ptr(), &attr);
+            *page_descriptor = PageDescriptor::from_output_addr(phys_page.as_ptr(), attr);
         }
 
         Ok(())
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/time.rs b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/time.rs
index 63017305b..7a7647ef7 100644
--- a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/time.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/time.rs
@@ -13,7 +13,8 @@
 
 use crate::{time, warn};
 use core::time::Duration;
-use cortex_a::{barrier, regs::*};
+use cortex_a::{asm::barrier, registers::*};
+use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicc.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicc.rs
index a1279f956..abfadb0c0 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicc.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicc.rs
@@ -7,7 +7,11 @@
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper, exception, synchronization::InitStateLock,
 };
-use register::{mmio::*, register_bitfields, register_structs};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields, register_structs,
+    registers::ReadWrite,
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicd.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicd.rs
index 5f56e54a1..ae7861c98 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicd.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -12,7 +12,11 @@ use crate::{
     state, synchronization,
     synchronization::{IRQSafeNullLock, InitStateLock},
 };
-use register::{mmio::*, register_bitfields, register_structs};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields, register_structs,
+    registers::{ReadOnly, ReadWrite},
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index e444812ba..9bdc73f8a 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -9,7 +9,11 @@ use crate::{
     synchronization::IRQSafeNullLock,
 };
 use core::sync::atomic::{AtomicUsize, Ordering};
-use register::{mmio::*, register_bitfields, register_structs};
+use tock_registers::{
+    interfaces::{ReadWriteable, Writeable},
+    register_bitfields, register_structs,
+    registers::ReadWrite,
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index abc3af711..5934e6dd1 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -10,7 +10,11 @@ use crate::{
     driver, exception, memory, synchronization,
     synchronization::{IRQSafeNullLock, InitStateLock},
 };
-use register::{mmio::*, register_structs};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_structs,
+    registers::{ReadOnly, WriteOnly},
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 3adb9137d..13664712c 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -17,7 +17,11 @@ use core::{
     fmt,
     sync::atomic::{AtomicUsize, Ordering},
 };
-use register::{mmio::*, register_bitfields, register_structs};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields, register_structs,
+    registers::{ReadOnly, ReadWrite, WriteOnly},
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -84,6 +88,7 @@ register_bitfields! {
     LCR_H [
         /// Word length. These bits indicate the number of data bits transmitted or received in a
         /// frame.
+        #[allow(clippy::enum_variant_names)]
         WLEN OFFSET(5) NUMBITS(2) [
             FiveBit = 0b00,
             SixBit = 0b01,
diff --git a/14_virtual_mem_part2_mmio_remap/src/lib.rs b/14_virtual_mem_part2_mmio_remap/src/lib.rs
index 1b2cb367a..8a0297385 100644
--- a/14_virtual_mem_part2_mmio_remap/src/lib.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/lib.rs
@@ -110,8 +110,8 @@
 #![allow(incomplete_features)]
 #![feature(asm)]
 #![feature(const_evaluatable_checked)]
-#![feature(const_fn)]
 #![feature(const_fn_fn_ptr_basics)]
+#![feature(const_fn_trait_bound)]
 #![feature(const_generics)]
 #![feature(const_panic)]
 #![feature(core_intrinsics)]

From e1728636c11e1edb7a430fabda4514919ef68663 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Tue, 6 Jul 2021 22:57:44 +0200
Subject: [PATCH 080/214] Switch to tock-registers: Sources for tutorials
 13..02

---
 02_runtime_init/Cargo.lock                    | 19 ++++----------
 02_runtime_init/Cargo.toml                    |  3 ++-
 03_hacky_hello_world/Cargo.lock               | 19 ++++----------
 03_hacky_hello_world/Cargo.toml               |  3 ++-
 04_safe_globals/Cargo.lock                    | 19 ++++----------
 04_safe_globals/Cargo.toml                    |  3 ++-
 05_drivers_gpio_uart/Cargo.lock               | 19 ++++----------
 05_drivers_gpio_uart/Cargo.toml               |  9 ++++---
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  6 ++++-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  7 +++++-
 06_uart_chainloader/Cargo.lock                | 19 ++++----------
 06_uart_chainloader/Cargo.toml                |  9 ++++---
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  6 ++++-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  7 +++++-
 07_timestamps/Cargo.lock                      | 19 ++++----------
 07_timestamps/Cargo.toml                      |  9 ++++---
 07_timestamps/src/_arch/aarch64/time.rs       |  3 ++-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  6 ++++-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  7 +++++-
 08_hw_debug_JTAG/Cargo.lock                   | 19 ++++----------
 08_hw_debug_JTAG/Cargo.toml                   |  9 ++++---
 08_hw_debug_JTAG/src/_arch/aarch64/time.rs    |  3 ++-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  6 ++++-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  7 +++++-
 09_privilege_level/Cargo.lock                 | 19 ++++----------
 09_privilege_level/Cargo.toml                 |  9 ++++---
 .../src/_arch/aarch64/cpu/boot.rs             |  3 ++-
 .../src/_arch/aarch64/exception.rs            |  3 ++-
 .../_arch/aarch64/exception/asynchronous.rs   | 13 +++++-----
 09_privilege_level/src/_arch/aarch64/time.rs  |  3 ++-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  6 ++++-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  7 +++++-
 .../Cargo.lock                                | 19 ++++----------
 .../Cargo.toml                                |  9 ++++---
 .../src/_arch/aarch64/cpu/boot.rs             |  3 ++-
 .../src/_arch/aarch64/exception.rs            |  3 ++-
 .../_arch/aarch64/exception/asynchronous.rs   | 13 +++++-----
 .../src/_arch/aarch64/memory/mmu.rs           |  3 ++-
 .../aarch64/memory/mmu/translation_table.rs   |  8 ++++--
 .../src/_arch/aarch64/time.rs                 |  3 ++-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  6 ++++-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  7 +++++-
 11_exceptions_part1_groundwork/Cargo.lock     | 19 ++++----------
 11_exceptions_part1_groundwork/Cargo.toml     |  9 ++++---
 .../src/_arch/aarch64/cpu/boot.rs             |  3 ++-
 .../src/_arch/aarch64/exception.rs            |  7 ++++--
 .../_arch/aarch64/exception/asynchronous.rs   | 13 +++++-----
 .../src/_arch/aarch64/memory/mmu.rs           |  3 ++-
 .../aarch64/memory/mmu/translation_table.rs   |  8 ++++--
 .../src/_arch/aarch64/time.rs                 |  3 ++-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  6 ++++-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  7 +++++-
 12_integrated_testing/Cargo.lock              | 25 ++++++-------------
 12_integrated_testing/Cargo.toml              | 10 ++++----
 .../src/_arch/aarch64/cpu/boot.rs             |  3 ++-
 .../src/_arch/aarch64/exception.rs            |  7 ++++--
 .../_arch/aarch64/exception/asynchronous.rs   | 13 +++++-----
 .../src/_arch/aarch64/memory/mmu.rs           |  3 ++-
 .../aarch64/memory/mmu/translation_table.rs   |  8 ++++--
 .../src/_arch/aarch64/time.rs                 |  3 ++-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  6 ++++-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  7 +++++-
 .../Cargo.lock                                | 25 ++++++-------------
 .../Cargo.toml                                | 10 ++++----
 .../src/_arch/aarch64/cpu/boot.rs             |  3 ++-
 .../src/_arch/aarch64/cpu/smp.rs              |  3 ++-
 .../src/_arch/aarch64/exception.rs            |  7 ++++--
 .../_arch/aarch64/exception/asynchronous.rs   | 13 +++++-----
 .../src/_arch/aarch64/memory/mmu.rs           |  3 ++-
 .../aarch64/memory/mmu/translation_table.rs   |  8 ++++--
 .../src/_arch/aarch64/time.rs                 |  3 ++-
 .../src/bsp/device_driver/arm/gicv2/gicc.rs   |  6 ++++-
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |  6 ++++-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  6 ++++-
 .../peripheral_ic.rs                          |  8 ++++--
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  7 +++++-
 .../src/lib.rs                                |  1 +
 X1_JTAG_boot/Cargo.lock                       | 19 ++++----------
 X1_JTAG_boot/Cargo.toml                       |  9 ++++---
 X1_JTAG_boot/src/_arch/aarch64/time.rs        |  3 ++-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  6 ++++-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  7 +++++-
 82 files changed, 368 insertions(+), 321 deletions(-)

diff --git a/02_runtime_init/Cargo.lock b/02_runtime_init/Cargo.lock
index 090fdaee4..c2773baab 100644
--- a/02_runtime_init/Cargo.lock
+++ b/02_runtime_init/Cargo.lock
@@ -4,11 +4,11 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "5.1.6"
+version = "6.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "ecefc30975eb87afc5a810d4b2305c0ec29e607ea97e51b2ecd80766e9268d28"
+checksum = "d25a057b35117d030453cd322f7adbdd331e886bc5bde46cdae656952c4feba6"
 dependencies = [
- "register",
+ "tock-registers",
 ]
 
 [[package]]
@@ -18,17 +18,8 @@ dependencies = [
  "cortex-a",
 ]
 
-[[package]]
-name = "register"
-version = "1.0.2"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f4a247de29ab7cc8f5006cfe775c4a81c704f9914c5e2a79696862e643135433"
-dependencies = [
- "tock-registers",
-]
-
 [[package]]
 name = "tock-registers"
-version = "0.6.0"
+version = "0.7.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f521a79accce68c417c9c77ce22108056b626126da1932f7e2e9b5bbffee0cea"
+checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
diff --git a/02_runtime_init/Cargo.toml b/02_runtime_init/Cargo.toml
index 69f9f06d6..ebf536a79 100644
--- a/02_runtime_init/Cargo.toml
+++ b/02_runtime_init/Cargo.toml
@@ -24,4 +24,5 @@ path = "src/main.rs"
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "5.x.x" }
+cortex-a = { version = "6.x.x" }
+
diff --git a/03_hacky_hello_world/Cargo.lock b/03_hacky_hello_world/Cargo.lock
index 09dfcc720..6779dc472 100644
--- a/03_hacky_hello_world/Cargo.lock
+++ b/03_hacky_hello_world/Cargo.lock
@@ -4,11 +4,11 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "5.1.6"
+version = "6.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "ecefc30975eb87afc5a810d4b2305c0ec29e607ea97e51b2ecd80766e9268d28"
+checksum = "d25a057b35117d030453cd322f7adbdd331e886bc5bde46cdae656952c4feba6"
 dependencies = [
- "register",
+ "tock-registers",
 ]
 
 [[package]]
@@ -18,17 +18,8 @@ dependencies = [
  "cortex-a",
 ]
 
-[[package]]
-name = "register"
-version = "1.0.2"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f4a247de29ab7cc8f5006cfe775c4a81c704f9914c5e2a79696862e643135433"
-dependencies = [
- "tock-registers",
-]
-
 [[package]]
 name = "tock-registers"
-version = "0.6.0"
+version = "0.7.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f521a79accce68c417c9c77ce22108056b626126da1932f7e2e9b5bbffee0cea"
+checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
diff --git a/03_hacky_hello_world/Cargo.toml b/03_hacky_hello_world/Cargo.toml
index ffe9206f2..3d3e28ab4 100644
--- a/03_hacky_hello_world/Cargo.toml
+++ b/03_hacky_hello_world/Cargo.toml
@@ -24,4 +24,5 @@ path = "src/main.rs"
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "5.x.x" }
+cortex-a = { version = "6.x.x" }
+
diff --git a/04_safe_globals/Cargo.lock b/04_safe_globals/Cargo.lock
index ccfbefbf3..4b5f5c722 100644
--- a/04_safe_globals/Cargo.lock
+++ b/04_safe_globals/Cargo.lock
@@ -4,11 +4,11 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "5.1.6"
+version = "6.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "ecefc30975eb87afc5a810d4b2305c0ec29e607ea97e51b2ecd80766e9268d28"
+checksum = "d25a057b35117d030453cd322f7adbdd331e886bc5bde46cdae656952c4feba6"
 dependencies = [
- "register",
+ "tock-registers",
 ]
 
 [[package]]
@@ -18,17 +18,8 @@ dependencies = [
  "cortex-a",
 ]
 
-[[package]]
-name = "register"
-version = "1.0.2"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f4a247de29ab7cc8f5006cfe775c4a81c704f9914c5e2a79696862e643135433"
-dependencies = [
- "tock-registers",
-]
-
 [[package]]
 name = "tock-registers"
-version = "0.6.0"
+version = "0.7.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f521a79accce68c417c9c77ce22108056b626126da1932f7e2e9b5bbffee0cea"
+checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
diff --git a/04_safe_globals/Cargo.toml b/04_safe_globals/Cargo.toml
index fc077af93..09fbaa913 100644
--- a/04_safe_globals/Cargo.toml
+++ b/04_safe_globals/Cargo.toml
@@ -24,4 +24,5 @@ path = "src/main.rs"
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "5.x.x" }
+cortex-a = { version = "6.x.x" }
+
diff --git a/05_drivers_gpio_uart/Cargo.lock b/05_drivers_gpio_uart/Cargo.lock
index 87044397a..b39e584f2 100644
--- a/05_drivers_gpio_uart/Cargo.lock
+++ b/05_drivers_gpio_uart/Cargo.lock
@@ -4,11 +4,11 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "5.1.6"
+version = "6.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "ecefc30975eb87afc5a810d4b2305c0ec29e607ea97e51b2ecd80766e9268d28"
+checksum = "d25a057b35117d030453cd322f7adbdd331e886bc5bde46cdae656952c4feba6"
 dependencies = [
- "register",
+ "tock-registers",
 ]
 
 [[package]]
@@ -16,20 +16,11 @@ name = "mingo"
 version = "0.5.0"
 dependencies = [
  "cortex-a",
- "register",
-]
-
-[[package]]
-name = "register"
-version = "1.0.2"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f4a247de29ab7cc8f5006cfe775c4a81c704f9914c5e2a79696862e643135433"
-dependencies = [
  "tock-registers",
 ]
 
 [[package]]
 name = "tock-registers"
-version = "0.6.0"
+version = "0.7.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f521a79accce68c417c9c77ce22108056b626126da1932f7e2e9b5bbffee0cea"
+checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
diff --git a/05_drivers_gpio_uart/Cargo.toml b/05_drivers_gpio_uart/Cargo.toml
index 05abef4d4..92c98e0c5 100644
--- a/05_drivers_gpio_uart/Cargo.toml
+++ b/05_drivers_gpio_uart/Cargo.toml
@@ -9,8 +9,8 @@ lto = true
 
 [features]
 default = []
-bsp_rpi3 = ["register"]
-bsp_rpi4 = ["register"]
+bsp_rpi3 = ["tock-registers"]
+bsp_rpi4 = ["tock-registers"]
 
 [[bin]]
 name = "kernel"
@@ -23,8 +23,9 @@ path = "src/main.rs"
 [dependencies]
 
 # Optional dependencies
-register = { version = "1.x.x", optional = true }
+tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "5.x.x" }
+cortex-a = { version = "6.x.x" }
+
diff --git a/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 771151e76..dd207221a 100644
--- a/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -8,7 +8,11 @@ use crate::{
     bsp::device_driver::common::MMIODerefWrapper, driver, synchronization,
     synchronization::NullLock,
 };
-use register::{mmio::*, register_bitfields, register_structs};
+use tock_registers::{
+    interfaces::{ReadWriteable, Writeable},
+    register_bitfields, register_structs,
+    registers::ReadWrite,
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index d2aae4d24..70b3839e8 100644
--- a/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -14,7 +14,11 @@ use crate::{
     synchronization::NullLock,
 };
 use core::fmt;
-use register::{mmio::*, register_bitfields, register_structs};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields, register_structs,
+    registers::{ReadOnly, ReadWrite, WriteOnly},
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -81,6 +85,7 @@ register_bitfields! {
     LCR_H [
         /// Word length. These bits indicate the number of data bits transmitted or received in a
         /// frame.
+        #[allow(clippy::enum_variant_names)]
         WLEN OFFSET(5) NUMBITS(2) [
             FiveBit = 0b00,
             SixBit = 0b01,
diff --git a/06_uart_chainloader/Cargo.lock b/06_uart_chainloader/Cargo.lock
index 5d2602a8e..e390c9597 100644
--- a/06_uart_chainloader/Cargo.lock
+++ b/06_uart_chainloader/Cargo.lock
@@ -4,11 +4,11 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "5.1.6"
+version = "6.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "ecefc30975eb87afc5a810d4b2305c0ec29e607ea97e51b2ecd80766e9268d28"
+checksum = "d25a057b35117d030453cd322f7adbdd331e886bc5bde46cdae656952c4feba6"
 dependencies = [
- "register",
+ "tock-registers",
 ]
 
 [[package]]
@@ -16,20 +16,11 @@ name = "mingo"
 version = "0.6.0"
 dependencies = [
  "cortex-a",
- "register",
-]
-
-[[package]]
-name = "register"
-version = "1.0.2"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f4a247de29ab7cc8f5006cfe775c4a81c704f9914c5e2a79696862e643135433"
-dependencies = [
  "tock-registers",
 ]
 
 [[package]]
 name = "tock-registers"
-version = "0.6.0"
+version = "0.7.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f521a79accce68c417c9c77ce22108056b626126da1932f7e2e9b5bbffee0cea"
+checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
diff --git a/06_uart_chainloader/Cargo.toml b/06_uart_chainloader/Cargo.toml
index f3b9ba2f9..d21dd6a8f 100644
--- a/06_uart_chainloader/Cargo.toml
+++ b/06_uart_chainloader/Cargo.toml
@@ -9,8 +9,8 @@ lto = true
 
 [features]
 default = []
-bsp_rpi3 = ["register"]
-bsp_rpi4 = ["register"]
+bsp_rpi3 = ["tock-registers"]
+bsp_rpi4 = ["tock-registers"]
 
 [[bin]]
 name = "kernel"
@@ -23,8 +23,9 @@ path = "src/main.rs"
 [dependencies]
 
 # Optional dependencies
-register = { version = "1.x.x", optional = true }
+tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "5.x.x" }
+cortex-a = { version = "6.x.x" }
+
diff --git a/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 9d41900d7..cd2cf2af9 100644
--- a/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -8,7 +8,11 @@ use crate::{
     bsp::device_driver::common::MMIODerefWrapper, driver, synchronization,
     synchronization::NullLock,
 };
-use register::{mmio::*, register_bitfields, register_structs};
+use tock_registers::{
+    interfaces::{ReadWriteable, Writeable},
+    register_bitfields, register_structs,
+    registers::ReadWrite,
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 17ca3543b..2befbeebe 100644
--- a/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -14,7 +14,11 @@ use crate::{
     synchronization::NullLock,
 };
 use core::fmt;
-use register::{mmio::*, register_bitfields, register_structs};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields, register_structs,
+    registers::{ReadOnly, ReadWrite, WriteOnly},
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -81,6 +85,7 @@ register_bitfields! {
     LCR_H [
         /// Word length. These bits indicate the number of data bits transmitted or received in a
         /// frame.
+        #[allow(clippy::enum_variant_names)]
         WLEN OFFSET(5) NUMBITS(2) [
             FiveBit = 0b00,
             SixBit = 0b01,
diff --git a/07_timestamps/Cargo.lock b/07_timestamps/Cargo.lock
index 311b6c211..098fe83c6 100644
--- a/07_timestamps/Cargo.lock
+++ b/07_timestamps/Cargo.lock
@@ -4,11 +4,11 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "5.1.6"
+version = "6.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "ecefc30975eb87afc5a810d4b2305c0ec29e607ea97e51b2ecd80766e9268d28"
+checksum = "d25a057b35117d030453cd322f7adbdd331e886bc5bde46cdae656952c4feba6"
 dependencies = [
- "register",
+ "tock-registers",
 ]
 
 [[package]]
@@ -16,20 +16,11 @@ name = "mingo"
 version = "0.7.0"
 dependencies = [
  "cortex-a",
- "register",
-]
-
-[[package]]
-name = "register"
-version = "1.0.2"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f4a247de29ab7cc8f5006cfe775c4a81c704f9914c5e2a79696862e643135433"
-dependencies = [
  "tock-registers",
 ]
 
 [[package]]
 name = "tock-registers"
-version = "0.6.0"
+version = "0.7.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f521a79accce68c417c9c77ce22108056b626126da1932f7e2e9b5bbffee0cea"
+checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
diff --git a/07_timestamps/Cargo.toml b/07_timestamps/Cargo.toml
index 8d97be1f1..881f1d1af 100644
--- a/07_timestamps/Cargo.toml
+++ b/07_timestamps/Cargo.toml
@@ -9,8 +9,8 @@ lto = true
 
 [features]
 default = []
-bsp_rpi3 = ["register"]
-bsp_rpi4 = ["register"]
+bsp_rpi3 = ["tock-registers"]
+bsp_rpi4 = ["tock-registers"]
 
 [[bin]]
 name = "kernel"
@@ -23,8 +23,9 @@ path = "src/main.rs"
 [dependencies]
 
 # Optional dependencies
-register = { version = "1.x.x", optional = true }
+tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "5.x.x" }
+cortex-a = { version = "6.x.x" }
+
diff --git a/07_timestamps/src/_arch/aarch64/time.rs b/07_timestamps/src/_arch/aarch64/time.rs
index 63017305b..7a7647ef7 100644
--- a/07_timestamps/src/_arch/aarch64/time.rs
+++ b/07_timestamps/src/_arch/aarch64/time.rs
@@ -13,7 +13,8 @@
 
 use crate::{time, warn};
 use core::time::Duration;
-use cortex_a::{barrier, regs::*};
+use cortex_a::{asm::barrier, registers::*};
+use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 41d8b861c..8033381e9 100644
--- a/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -8,7 +8,11 @@ use crate::{
     bsp::device_driver::common::MMIODerefWrapper, driver, synchronization,
     synchronization::NullLock,
 };
-use register::{mmio::*, register_bitfields, register_structs};
+use tock_registers::{
+    interfaces::{ReadWriteable, Writeable},
+    register_bitfields, register_structs,
+    registers::ReadWrite,
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index d2aae4d24..70b3839e8 100644
--- a/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -14,7 +14,11 @@ use crate::{
     synchronization::NullLock,
 };
 use core::fmt;
-use register::{mmio::*, register_bitfields, register_structs};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields, register_structs,
+    registers::{ReadOnly, ReadWrite, WriteOnly},
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -81,6 +85,7 @@ register_bitfields! {
     LCR_H [
         /// Word length. These bits indicate the number of data bits transmitted or received in a
         /// frame.
+        #[allow(clippy::enum_variant_names)]
         WLEN OFFSET(5) NUMBITS(2) [
             FiveBit = 0b00,
             SixBit = 0b01,
diff --git a/08_hw_debug_JTAG/Cargo.lock b/08_hw_debug_JTAG/Cargo.lock
index 011adc0f3..c93636780 100644
--- a/08_hw_debug_JTAG/Cargo.lock
+++ b/08_hw_debug_JTAG/Cargo.lock
@@ -4,11 +4,11 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "5.1.6"
+version = "6.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "ecefc30975eb87afc5a810d4b2305c0ec29e607ea97e51b2ecd80766e9268d28"
+checksum = "d25a057b35117d030453cd322f7adbdd331e886bc5bde46cdae656952c4feba6"
 dependencies = [
- "register",
+ "tock-registers",
 ]
 
 [[package]]
@@ -16,20 +16,11 @@ name = "mingo"
 version = "0.8.0"
 dependencies = [
  "cortex-a",
- "register",
-]
-
-[[package]]
-name = "register"
-version = "1.0.2"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f4a247de29ab7cc8f5006cfe775c4a81c704f9914c5e2a79696862e643135433"
-dependencies = [
  "tock-registers",
 ]
 
 [[package]]
 name = "tock-registers"
-version = "0.6.0"
+version = "0.7.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f521a79accce68c417c9c77ce22108056b626126da1932f7e2e9b5bbffee0cea"
+checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
diff --git a/08_hw_debug_JTAG/Cargo.toml b/08_hw_debug_JTAG/Cargo.toml
index 7b1adb5b3..07dc9b5b6 100644
--- a/08_hw_debug_JTAG/Cargo.toml
+++ b/08_hw_debug_JTAG/Cargo.toml
@@ -9,8 +9,8 @@ lto = true
 
 [features]
 default = []
-bsp_rpi3 = ["register"]
-bsp_rpi4 = ["register"]
+bsp_rpi3 = ["tock-registers"]
+bsp_rpi4 = ["tock-registers"]
 
 [[bin]]
 name = "kernel"
@@ -23,8 +23,9 @@ path = "src/main.rs"
 [dependencies]
 
 # Optional dependencies
-register = { version = "1.x.x", optional = true }
+tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "5.x.x" }
+cortex-a = { version = "6.x.x" }
+
diff --git a/08_hw_debug_JTAG/src/_arch/aarch64/time.rs b/08_hw_debug_JTAG/src/_arch/aarch64/time.rs
index 63017305b..7a7647ef7 100644
--- a/08_hw_debug_JTAG/src/_arch/aarch64/time.rs
+++ b/08_hw_debug_JTAG/src/_arch/aarch64/time.rs
@@ -13,7 +13,8 @@
 
 use crate::{time, warn};
 use core::time::Duration;
-use cortex_a::{barrier, regs::*};
+use cortex_a::{asm::barrier, registers::*};
+use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 41d8b861c..8033381e9 100644
--- a/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -8,7 +8,11 @@ use crate::{
     bsp::device_driver::common::MMIODerefWrapper, driver, synchronization,
     synchronization::NullLock,
 };
-use register::{mmio::*, register_bitfields, register_structs};
+use tock_registers::{
+    interfaces::{ReadWriteable, Writeable},
+    register_bitfields, register_structs,
+    registers::ReadWrite,
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index d2aae4d24..70b3839e8 100644
--- a/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -14,7 +14,11 @@ use crate::{
     synchronization::NullLock,
 };
 use core::fmt;
-use register::{mmio::*, register_bitfields, register_structs};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields, register_structs,
+    registers::{ReadOnly, ReadWrite, WriteOnly},
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -81,6 +85,7 @@ register_bitfields! {
     LCR_H [
         /// Word length. These bits indicate the number of data bits transmitted or received in a
         /// frame.
+        #[allow(clippy::enum_variant_names)]
         WLEN OFFSET(5) NUMBITS(2) [
             FiveBit = 0b00,
             SixBit = 0b01,
diff --git a/09_privilege_level/Cargo.lock b/09_privilege_level/Cargo.lock
index 753961f7f..606b7819a 100644
--- a/09_privilege_level/Cargo.lock
+++ b/09_privilege_level/Cargo.lock
@@ -4,11 +4,11 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "5.1.6"
+version = "6.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "ecefc30975eb87afc5a810d4b2305c0ec29e607ea97e51b2ecd80766e9268d28"
+checksum = "d25a057b35117d030453cd322f7adbdd331e886bc5bde46cdae656952c4feba6"
 dependencies = [
- "register",
+ "tock-registers",
 ]
 
 [[package]]
@@ -16,20 +16,11 @@ name = "mingo"
 version = "0.9.0"
 dependencies = [
  "cortex-a",
- "register",
-]
-
-[[package]]
-name = "register"
-version = "1.0.2"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f4a247de29ab7cc8f5006cfe775c4a81c704f9914c5e2a79696862e643135433"
-dependencies = [
  "tock-registers",
 ]
 
 [[package]]
 name = "tock-registers"
-version = "0.6.0"
+version = "0.7.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f521a79accce68c417c9c77ce22108056b626126da1932f7e2e9b5bbffee0cea"
+checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
diff --git a/09_privilege_level/Cargo.toml b/09_privilege_level/Cargo.toml
index 7af3572f6..e9965b2f6 100644
--- a/09_privilege_level/Cargo.toml
+++ b/09_privilege_level/Cargo.toml
@@ -9,8 +9,8 @@ lto = true
 
 [features]
 default = []
-bsp_rpi3 = ["register"]
-bsp_rpi4 = ["register"]
+bsp_rpi3 = ["tock-registers"]
+bsp_rpi4 = ["tock-registers"]
 
 [[bin]]
 name = "kernel"
@@ -23,8 +23,9 @@ path = "src/main.rs"
 [dependencies]
 
 # Optional dependencies
-register = { version = "1.x.x", optional = true }
+tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "5.x.x" }
+cortex-a = { version = "6.x.x" }
+
diff --git a/09_privilege_level/src/_arch/aarch64/cpu/boot.rs b/09_privilege_level/src/_arch/aarch64/cpu/boot.rs
index b743418e6..4f0068622 100644
--- a/09_privilege_level/src/_arch/aarch64/cpu/boot.rs
+++ b/09_privilege_level/src/_arch/aarch64/cpu/boot.rs
@@ -11,7 +11,8 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-use cortex_a::{asm, regs::*};
+use cortex_a::{asm, registers::*};
+use tock_registers::interfaces::Writeable;
 
 // Assembly counterpart to this file.
 global_asm!(include_str!("boot.s"));
diff --git a/09_privilege_level/src/_arch/aarch64/exception.rs b/09_privilege_level/src/_arch/aarch64/exception.rs
index d8c617b2a..10fa86a93 100644
--- a/09_privilege_level/src/_arch/aarch64/exception.rs
+++ b/09_privilege_level/src/_arch/aarch64/exception.rs
@@ -11,7 +11,8 @@
 //!
 //! crate::exception::arch_exception
 
-use cortex_a::regs::*;
+use cortex_a::registers::*;
+use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/09_privilege_level/src/_arch/aarch64/exception/asynchronous.rs b/09_privilege_level/src/_arch/aarch64/exception/asynchronous.rs
index b63b00fe7..c447d4557 100644
--- a/09_privilege_level/src/_arch/aarch64/exception/asynchronous.rs
+++ b/09_privilege_level/src/_arch/aarch64/exception/asynchronous.rs
@@ -11,14 +11,15 @@
 //!
 //! crate::exception::asynchronous::arch_asynchronous
 
-use cortex_a::regs::*;
+use cortex_a::registers::*;
+use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
 trait DaifField {
-    fn daif_field() -> register::Field<u64, DAIF::Register>;
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register>;
 }
 
 struct Debug;
@@ -31,25 +32,25 @@ struct FIQ;
 //--------------------------------------------------------------------------------------------------
 
 impl DaifField for Debug {
-    fn daif_field() -> register::Field<u64, DAIF::Register> {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
         DAIF::D
     }
 }
 
 impl DaifField for SError {
-    fn daif_field() -> register::Field<u64, DAIF::Register> {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
         DAIF::A
     }
 }
 
 impl DaifField for IRQ {
-    fn daif_field() -> register::Field<u64, DAIF::Register> {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
         DAIF::I
     }
 }
 
 impl DaifField for FIQ {
-    fn daif_field() -> register::Field<u64, DAIF::Register> {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
         DAIF::F
     }
 }
diff --git a/09_privilege_level/src/_arch/aarch64/time.rs b/09_privilege_level/src/_arch/aarch64/time.rs
index 63017305b..7a7647ef7 100644
--- a/09_privilege_level/src/_arch/aarch64/time.rs
+++ b/09_privilege_level/src/_arch/aarch64/time.rs
@@ -13,7 +13,8 @@
 
 use crate::{time, warn};
 use core::time::Duration;
-use cortex_a::{barrier, regs::*};
+use cortex_a::{asm::barrier, registers::*};
+use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 41d8b861c..8033381e9 100644
--- a/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -8,7 +8,11 @@ use crate::{
     bsp::device_driver::common::MMIODerefWrapper, driver, synchronization,
     synchronization::NullLock,
 };
-use register::{mmio::*, register_bitfields, register_structs};
+use tock_registers::{
+    interfaces::{ReadWriteable, Writeable},
+    register_bitfields, register_structs,
+    registers::ReadWrite,
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index d2aae4d24..70b3839e8 100644
--- a/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -14,7 +14,11 @@ use crate::{
     synchronization::NullLock,
 };
 use core::fmt;
-use register::{mmio::*, register_bitfields, register_structs};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields, register_structs,
+    registers::{ReadOnly, ReadWrite, WriteOnly},
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -81,6 +85,7 @@ register_bitfields! {
     LCR_H [
         /// Word length. These bits indicate the number of data bits transmitted or received in a
         /// frame.
+        #[allow(clippy::enum_variant_names)]
         WLEN OFFSET(5) NUMBITS(2) [
             FiveBit = 0b00,
             SixBit = 0b01,
diff --git a/10_virtual_mem_part1_identity_mapping/Cargo.lock b/10_virtual_mem_part1_identity_mapping/Cargo.lock
index 5022ffadb..a3e7eb266 100644
--- a/10_virtual_mem_part1_identity_mapping/Cargo.lock
+++ b/10_virtual_mem_part1_identity_mapping/Cargo.lock
@@ -4,11 +4,11 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "5.1.6"
+version = "6.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "ecefc30975eb87afc5a810d4b2305c0ec29e607ea97e51b2ecd80766e9268d28"
+checksum = "d25a057b35117d030453cd322f7adbdd331e886bc5bde46cdae656952c4feba6"
 dependencies = [
- "register",
+ "tock-registers",
 ]
 
 [[package]]
@@ -16,20 +16,11 @@ name = "mingo"
 version = "0.10.0"
 dependencies = [
  "cortex-a",
- "register",
-]
-
-[[package]]
-name = "register"
-version = "1.0.2"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f4a247de29ab7cc8f5006cfe775c4a81c704f9914c5e2a79696862e643135433"
-dependencies = [
  "tock-registers",
 ]
 
 [[package]]
 name = "tock-registers"
-version = "0.6.0"
+version = "0.7.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f521a79accce68c417c9c77ce22108056b626126da1932f7e2e9b5bbffee0cea"
+checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
diff --git a/10_virtual_mem_part1_identity_mapping/Cargo.toml b/10_virtual_mem_part1_identity_mapping/Cargo.toml
index 9d47f28da..fac86dd5a 100644
--- a/10_virtual_mem_part1_identity_mapping/Cargo.toml
+++ b/10_virtual_mem_part1_identity_mapping/Cargo.toml
@@ -9,8 +9,8 @@ lto = true
 
 [features]
 default = []
-bsp_rpi3 = ["register"]
-bsp_rpi4 = ["register"]
+bsp_rpi3 = ["tock-registers"]
+bsp_rpi4 = ["tock-registers"]
 
 [[bin]]
 name = "kernel"
@@ -23,8 +23,9 @@ path = "src/main.rs"
 [dependencies]
 
 # Optional dependencies
-register = { version = "1.x.x", optional = true }
+tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "5.x.x" }
+cortex-a = { version = "6.x.x" }
+
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs
index b743418e6..4f0068622 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs
@@ -11,7 +11,8 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-use cortex_a::{asm, regs::*};
+use cortex_a::{asm, registers::*};
+use tock_registers::interfaces::Writeable;
 
 // Assembly counterpart to this file.
 global_asm!(include_str!("boot.s"));
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs
index d8c617b2a..10fa86a93 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs
@@ -11,7 +11,8 @@
 //!
 //! crate::exception::arch_exception
 
-use cortex_a::regs::*;
+use cortex_a::registers::*;
+use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception/asynchronous.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception/asynchronous.rs
index b63b00fe7..c447d4557 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception/asynchronous.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception/asynchronous.rs
@@ -11,14 +11,15 @@
 //!
 //! crate::exception::asynchronous::arch_asynchronous
 
-use cortex_a::regs::*;
+use cortex_a::registers::*;
+use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
 trait DaifField {
-    fn daif_field() -> register::Field<u64, DAIF::Register>;
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register>;
 }
 
 struct Debug;
@@ -31,25 +32,25 @@ struct FIQ;
 //--------------------------------------------------------------------------------------------------
 
 impl DaifField for Debug {
-    fn daif_field() -> register::Field<u64, DAIF::Register> {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
         DAIF::D
     }
 }
 
 impl DaifField for SError {
-    fn daif_field() -> register::Field<u64, DAIF::Register> {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
         DAIF::A
     }
 }
 
 impl DaifField for IRQ {
-    fn daif_field() -> register::Field<u64, DAIF::Register> {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
         DAIF::I
     }
 }
 
 impl DaifField for FIQ {
-    fn daif_field() -> register::Field<u64, DAIF::Register> {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
         DAIF::F
     }
 }
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
index 2f7bf615a..eaeff3219 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
@@ -18,7 +18,8 @@ use crate::{
     memory::mmu::{translation_table::KernelTranslationTable, TranslationGranule},
 };
 use core::intrinsics::unlikely;
-use cortex_a::{barrier, regs::*};
+use cortex_a::{asm::barrier, registers::*};
+use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs
index eba8e12b5..dac6e32f8 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -21,7 +21,11 @@ use crate::{
     },
 };
 use core::convert;
-use register::{register_bitfields, InMemoryRegister};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields,
+    registers::InMemoryRegister,
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -182,7 +186,7 @@ impl TableDescriptor {
 
 /// Convert the kernel's generic memory attributes to HW-specific attributes of the MMU.
 impl convert::From<AttributeFields>
-    for register::FieldValue<u64, STAGE1_PAGE_DESCRIPTOR::Register>
+    for tock_registers::fields::FieldValue<u64, STAGE1_PAGE_DESCRIPTOR::Register>
 {
     fn from(attribute_fields: AttributeFields) -> Self {
         // Memory attributes.
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs
index 63017305b..7a7647ef7 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs
@@ -13,7 +13,8 @@
 
 use crate::{time, warn};
 use core::time::Duration;
-use cortex_a::{barrier, regs::*};
+use cortex_a::{asm::barrier, registers::*};
+use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 41d8b861c..8033381e9 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -8,7 +8,11 @@ use crate::{
     bsp::device_driver::common::MMIODerefWrapper, driver, synchronization,
     synchronization::NullLock,
 };
-use register::{mmio::*, register_bitfields, register_structs};
+use tock_registers::{
+    interfaces::{ReadWriteable, Writeable},
+    register_bitfields, register_structs,
+    registers::ReadWrite,
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index d2aae4d24..70b3839e8 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -14,7 +14,11 @@ use crate::{
     synchronization::NullLock,
 };
 use core::fmt;
-use register::{mmio::*, register_bitfields, register_structs};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields, register_structs,
+    registers::{ReadOnly, ReadWrite, WriteOnly},
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -81,6 +85,7 @@ register_bitfields! {
     LCR_H [
         /// Word length. These bits indicate the number of data bits transmitted or received in a
         /// frame.
+        #[allow(clippy::enum_variant_names)]
         WLEN OFFSET(5) NUMBITS(2) [
             FiveBit = 0b00,
             SixBit = 0b01,
diff --git a/11_exceptions_part1_groundwork/Cargo.lock b/11_exceptions_part1_groundwork/Cargo.lock
index c956c58cd..6fca12525 100644
--- a/11_exceptions_part1_groundwork/Cargo.lock
+++ b/11_exceptions_part1_groundwork/Cargo.lock
@@ -4,11 +4,11 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "5.1.6"
+version = "6.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "ecefc30975eb87afc5a810d4b2305c0ec29e607ea97e51b2ecd80766e9268d28"
+checksum = "d25a057b35117d030453cd322f7adbdd331e886bc5bde46cdae656952c4feba6"
 dependencies = [
- "register",
+ "tock-registers",
 ]
 
 [[package]]
@@ -16,20 +16,11 @@ name = "mingo"
 version = "0.11.0"
 dependencies = [
  "cortex-a",
- "register",
-]
-
-[[package]]
-name = "register"
-version = "1.0.2"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f4a247de29ab7cc8f5006cfe775c4a81c704f9914c5e2a79696862e643135433"
-dependencies = [
  "tock-registers",
 ]
 
 [[package]]
 name = "tock-registers"
-version = "0.6.0"
+version = "0.7.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f521a79accce68c417c9c77ce22108056b626126da1932f7e2e9b5bbffee0cea"
+checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
diff --git a/11_exceptions_part1_groundwork/Cargo.toml b/11_exceptions_part1_groundwork/Cargo.toml
index 2f6683e5a..adafedfac 100644
--- a/11_exceptions_part1_groundwork/Cargo.toml
+++ b/11_exceptions_part1_groundwork/Cargo.toml
@@ -9,8 +9,8 @@ lto = true
 
 [features]
 default = []
-bsp_rpi3 = ["register"]
-bsp_rpi4 = ["register"]
+bsp_rpi3 = ["tock-registers"]
+bsp_rpi4 = ["tock-registers"]
 
 [[bin]]
 name = "kernel"
@@ -23,8 +23,9 @@ path = "src/main.rs"
 [dependencies]
 
 # Optional dependencies
-register = { version = "1.x.x", optional = true }
+tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "5.x.x" }
+cortex-a = { version = "6.x.x" }
+
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs
index b743418e6..4f0068622 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs
@@ -11,7 +11,8 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-use cortex_a::{asm, regs::*};
+use cortex_a::{asm, registers::*};
+use tock_registers::interfaces::Writeable;
 
 // Assembly counterpart to this file.
 global_asm!(include_str!("boot.s"));
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
index 21f0c68cf..d51d7f014 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
@@ -12,8 +12,11 @@
 //! crate::exception::arch_exception
 
 use core::{cell::UnsafeCell, fmt};
-use cortex_a::{asm, barrier, regs::*};
-use register::InMemoryRegister;
+use cortex_a::{asm, asm::barrier, registers::*};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    registers::InMemoryRegister,
+};
 
 // Assembly counterpart to this file.
 global_asm!(include_str!("exception.s"));
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/exception/asynchronous.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/exception/asynchronous.rs
index b63b00fe7..c447d4557 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/exception/asynchronous.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/exception/asynchronous.rs
@@ -11,14 +11,15 @@
 //!
 //! crate::exception::asynchronous::arch_asynchronous
 
-use cortex_a::regs::*;
+use cortex_a::registers::*;
+use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
 trait DaifField {
-    fn daif_field() -> register::Field<u64, DAIF::Register>;
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register>;
 }
 
 struct Debug;
@@ -31,25 +32,25 @@ struct FIQ;
 //--------------------------------------------------------------------------------------------------
 
 impl DaifField for Debug {
-    fn daif_field() -> register::Field<u64, DAIF::Register> {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
         DAIF::D
     }
 }
 
 impl DaifField for SError {
-    fn daif_field() -> register::Field<u64, DAIF::Register> {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
         DAIF::A
     }
 }
 
 impl DaifField for IRQ {
-    fn daif_field() -> register::Field<u64, DAIF::Register> {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
         DAIF::I
     }
 }
 
 impl DaifField for FIQ {
-    fn daif_field() -> register::Field<u64, DAIF::Register> {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
         DAIF::F
     }
 }
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
index 2f7bf615a..eaeff3219 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
@@ -18,7 +18,8 @@ use crate::{
     memory::mmu::{translation_table::KernelTranslationTable, TranslationGranule},
 };
 use core::intrinsics::unlikely;
-use cortex_a::{barrier, regs::*};
+use cortex_a::{asm::barrier, registers::*};
+use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs
index eba8e12b5..dac6e32f8 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -21,7 +21,11 @@ use crate::{
     },
 };
 use core::convert;
-use register::{register_bitfields, InMemoryRegister};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields,
+    registers::InMemoryRegister,
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -182,7 +186,7 @@ impl TableDescriptor {
 
 /// Convert the kernel's generic memory attributes to HW-specific attributes of the MMU.
 impl convert::From<AttributeFields>
-    for register::FieldValue<u64, STAGE1_PAGE_DESCRIPTOR::Register>
+    for tock_registers::fields::FieldValue<u64, STAGE1_PAGE_DESCRIPTOR::Register>
 {
     fn from(attribute_fields: AttributeFields) -> Self {
         // Memory attributes.
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/time.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/time.rs
index 63017305b..7a7647ef7 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/time.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/time.rs
@@ -13,7 +13,8 @@
 
 use crate::{time, warn};
 use core::time::Duration;
-use cortex_a::{barrier, regs::*};
+use cortex_a::{asm::barrier, registers::*};
+use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 41d8b861c..8033381e9 100644
--- a/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -8,7 +8,11 @@ use crate::{
     bsp::device_driver::common::MMIODerefWrapper, driver, synchronization,
     synchronization::NullLock,
 };
-use register::{mmio::*, register_bitfields, register_structs};
+use tock_registers::{
+    interfaces::{ReadWriteable, Writeable},
+    register_bitfields, register_structs,
+    registers::ReadWrite,
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index d2aae4d24..70b3839e8 100644
--- a/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -14,7 +14,11 @@ use crate::{
     synchronization::NullLock,
 };
 use core::fmt;
-use register::{mmio::*, register_bitfields, register_structs};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields, register_structs,
+    registers::{ReadOnly, ReadWrite, WriteOnly},
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -81,6 +85,7 @@ register_bitfields! {
     LCR_H [
         /// Word length. These bits indicate the number of data bits transmitted or received in a
         /// frame.
+        #[allow(clippy::enum_variant_names)]
         WLEN OFFSET(5) NUMBITS(2) [
             FiveBit = 0b00,
             SixBit = 0b01,
diff --git a/12_integrated_testing/Cargo.lock b/12_integrated_testing/Cargo.lock
index 009654700..18175739d 100644
--- a/12_integrated_testing/Cargo.lock
+++ b/12_integrated_testing/Cargo.lock
@@ -4,11 +4,11 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "5.1.6"
+version = "6.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "ecefc30975eb87afc5a810d4b2305c0ec29e607ea97e51b2ecd80766e9268d28"
+checksum = "d25a057b35117d030453cd322f7adbdd331e886bc5bde46cdae656952c4feba6"
 dependencies = [
- "register",
+ "tock-registers",
 ]
 
 [[package]]
@@ -17,9 +17,9 @@ version = "0.12.0"
 dependencies = [
  "cortex-a",
  "qemu-exit",
- "register",
  "test-macros",
  "test-types",
+ "tock-registers",
 ]
 
 [[package]]
@@ -33,9 +33,9 @@ dependencies = [
 
 [[package]]
 name = "qemu-exit"
-version = "1.0.2"
+version = "2.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "702abe3c3255be20a4d67bda326c4117081a49a57afaf752de4845091bc6b476"
+checksum = "e179da212ad772061d4120ad2a86a019f929362a477582d8c8014dbf7509cd83"
 
 [[package]]
 name = "quote"
@@ -46,15 +46,6 @@ dependencies = [
  "proc-macro2",
 ]
 
-[[package]]
-name = "register"
-version = "1.0.2"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f4a247de29ab7cc8f5006cfe775c4a81c704f9914c5e2a79696862e643135433"
-dependencies = [
- "tock-registers",
-]
-
 [[package]]
 name = "syn"
 version = "1.0.68"
@@ -82,9 +73,9 @@ version = "0.1.0"
 
 [[package]]
 name = "tock-registers"
-version = "0.6.0"
+version = "0.7.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f521a79accce68c417c9c77ce22108056b626126da1932f7e2e9b5bbffee0cea"
+checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
 name = "unicode-xid"
diff --git a/12_integrated_testing/Cargo.toml b/12_integrated_testing/Cargo.toml
index 686df7640..42013b264 100644
--- a/12_integrated_testing/Cargo.toml
+++ b/12_integrated_testing/Cargo.toml
@@ -9,8 +9,8 @@ lto = true
 
 [features]
 default = []
-bsp_rpi3 = ["register"]
-bsp_rpi4 = ["register"]
+bsp_rpi3 = ["tock-registers"]
+bsp_rpi4 = ["tock-registers"]
 test_build = ["qemu-exit"]
 
 ##--------------------------------------------------------------------------------------------------
@@ -21,12 +21,12 @@ test_build = ["qemu-exit"]
 test-types = { path = "test-types" }
 
 # Optional dependencies
-register = { version = "1.x.x", features = ["no_std_unit_tests"], optional = true }
-qemu-exit = { version = "1.x.x", optional = true }
+tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
+qemu-exit = { version = "2.x.x", optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "5.x.x" }
+cortex-a = { version = "6.x.x" }
 
 ##--------------------------------------------------------------------------------------------------
 ## Testing
diff --git a/12_integrated_testing/src/_arch/aarch64/cpu/boot.rs b/12_integrated_testing/src/_arch/aarch64/cpu/boot.rs
index b743418e6..4f0068622 100644
--- a/12_integrated_testing/src/_arch/aarch64/cpu/boot.rs
+++ b/12_integrated_testing/src/_arch/aarch64/cpu/boot.rs
@@ -11,7 +11,8 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-use cortex_a::{asm, regs::*};
+use cortex_a::{asm, registers::*};
+use tock_registers::interfaces::Writeable;
 
 // Assembly counterpart to this file.
 global_asm!(include_str!("boot.s"));
diff --git a/12_integrated_testing/src/_arch/aarch64/exception.rs b/12_integrated_testing/src/_arch/aarch64/exception.rs
index 1ee0a1982..6ba47300f 100644
--- a/12_integrated_testing/src/_arch/aarch64/exception.rs
+++ b/12_integrated_testing/src/_arch/aarch64/exception.rs
@@ -12,8 +12,11 @@
 //! crate::exception::arch_exception
 
 use core::{cell::UnsafeCell, fmt};
-use cortex_a::{barrier, regs::*};
-use register::InMemoryRegister;
+use cortex_a::{asm::barrier, registers::*};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    registers::InMemoryRegister,
+};
 
 // Assembly counterpart to this file.
 global_asm!(include_str!("exception.s"));
diff --git a/12_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs b/12_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs
index b63b00fe7..c447d4557 100644
--- a/12_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs
+++ b/12_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs
@@ -11,14 +11,15 @@
 //!
 //! crate::exception::asynchronous::arch_asynchronous
 
-use cortex_a::regs::*;
+use cortex_a::registers::*;
+use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
 trait DaifField {
-    fn daif_field() -> register::Field<u64, DAIF::Register>;
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register>;
 }
 
 struct Debug;
@@ -31,25 +32,25 @@ struct FIQ;
 //--------------------------------------------------------------------------------------------------
 
 impl DaifField for Debug {
-    fn daif_field() -> register::Field<u64, DAIF::Register> {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
         DAIF::D
     }
 }
 
 impl DaifField for SError {
-    fn daif_field() -> register::Field<u64, DAIF::Register> {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
         DAIF::A
     }
 }
 
 impl DaifField for IRQ {
-    fn daif_field() -> register::Field<u64, DAIF::Register> {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
         DAIF::I
     }
 }
 
 impl DaifField for FIQ {
-    fn daif_field() -> register::Field<u64, DAIF::Register> {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
         DAIF::F
     }
 }
diff --git a/12_integrated_testing/src/_arch/aarch64/memory/mmu.rs b/12_integrated_testing/src/_arch/aarch64/memory/mmu.rs
index a706290bd..99991b6fe 100644
--- a/12_integrated_testing/src/_arch/aarch64/memory/mmu.rs
+++ b/12_integrated_testing/src/_arch/aarch64/memory/mmu.rs
@@ -18,7 +18,8 @@ use crate::{
     memory::mmu::{translation_table::KernelTranslationTable, TranslationGranule},
 };
 use core::intrinsics::unlikely;
-use cortex_a::{barrier, regs::*};
+use cortex_a::{asm::barrier, registers::*};
+use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/12_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs b/12_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs
index 665631f49..1e1173f2d 100644
--- a/12_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/12_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -21,7 +21,11 @@ use crate::{
     },
 };
 use core::convert;
-use register::{register_bitfields, InMemoryRegister};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields,
+    registers::InMemoryRegister,
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -182,7 +186,7 @@ impl TableDescriptor {
 
 /// Convert the kernel's generic memory attributes to HW-specific attributes of the MMU.
 impl convert::From<AttributeFields>
-    for register::FieldValue<u64, STAGE1_PAGE_DESCRIPTOR::Register>
+    for tock_registers::fields::FieldValue<u64, STAGE1_PAGE_DESCRIPTOR::Register>
 {
     fn from(attribute_fields: AttributeFields) -> Self {
         // Memory attributes.
diff --git a/12_integrated_testing/src/_arch/aarch64/time.rs b/12_integrated_testing/src/_arch/aarch64/time.rs
index 63017305b..7a7647ef7 100644
--- a/12_integrated_testing/src/_arch/aarch64/time.rs
+++ b/12_integrated_testing/src/_arch/aarch64/time.rs
@@ -13,7 +13,8 @@
 
 use crate::{time, warn};
 use core::time::Duration;
-use cortex_a::{barrier, regs::*};
+use cortex_a::{asm::barrier, registers::*};
+use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 41d8b861c..8033381e9 100644
--- a/12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -8,7 +8,11 @@ use crate::{
     bsp::device_driver::common::MMIODerefWrapper, driver, synchronization,
     synchronization::NullLock,
 };
-use register::{mmio::*, register_bitfields, register_structs};
+use tock_registers::{
+    interfaces::{ReadWriteable, Writeable},
+    register_bitfields, register_structs,
+    registers::ReadWrite,
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index d2aae4d24..70b3839e8 100644
--- a/12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -14,7 +14,11 @@ use crate::{
     synchronization::NullLock,
 };
 use core::fmt;
-use register::{mmio::*, register_bitfields, register_structs};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields, register_structs,
+    registers::{ReadOnly, ReadWrite, WriteOnly},
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -81,6 +85,7 @@ register_bitfields! {
     LCR_H [
         /// Word length. These bits indicate the number of data bits transmitted or received in a
         /// frame.
+        #[allow(clippy::enum_variant_names)]
         WLEN OFFSET(5) NUMBITS(2) [
             FiveBit = 0b00,
             SixBit = 0b01,
diff --git a/13_exceptions_part2_peripheral_IRQs/Cargo.lock b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
index ed9501003..7fd778588 100644
--- a/13_exceptions_part2_peripheral_IRQs/Cargo.lock
+++ b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
@@ -4,11 +4,11 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "5.1.6"
+version = "6.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "ecefc30975eb87afc5a810d4b2305c0ec29e607ea97e51b2ecd80766e9268d28"
+checksum = "d25a057b35117d030453cd322f7adbdd331e886bc5bde46cdae656952c4feba6"
 dependencies = [
- "register",
+ "tock-registers",
 ]
 
 [[package]]
@@ -17,9 +17,9 @@ version = "0.13.0"
 dependencies = [
  "cortex-a",
  "qemu-exit",
- "register",
  "test-macros",
  "test-types",
+ "tock-registers",
 ]
 
 [[package]]
@@ -33,9 +33,9 @@ dependencies = [
 
 [[package]]
 name = "qemu-exit"
-version = "1.0.2"
+version = "2.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "702abe3c3255be20a4d67bda326c4117081a49a57afaf752de4845091bc6b476"
+checksum = "e179da212ad772061d4120ad2a86a019f929362a477582d8c8014dbf7509cd83"
 
 [[package]]
 name = "quote"
@@ -46,15 +46,6 @@ dependencies = [
  "proc-macro2",
 ]
 
-[[package]]
-name = "register"
-version = "1.0.2"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f4a247de29ab7cc8f5006cfe775c4a81c704f9914c5e2a79696862e643135433"
-dependencies = [
- "tock-registers",
-]
-
 [[package]]
 name = "syn"
 version = "1.0.68"
@@ -82,9 +73,9 @@ version = "0.1.0"
 
 [[package]]
 name = "tock-registers"
-version = "0.6.0"
+version = "0.7.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f521a79accce68c417c9c77ce22108056b626126da1932f7e2e9b5bbffee0cea"
+checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
 name = "unicode-xid"
diff --git a/13_exceptions_part2_peripheral_IRQs/Cargo.toml b/13_exceptions_part2_peripheral_IRQs/Cargo.toml
index 343bdfda3..4c6de8378 100644
--- a/13_exceptions_part2_peripheral_IRQs/Cargo.toml
+++ b/13_exceptions_part2_peripheral_IRQs/Cargo.toml
@@ -9,8 +9,8 @@ lto = true
 
 [features]
 default = []
-bsp_rpi3 = ["register"]
-bsp_rpi4 = ["register"]
+bsp_rpi3 = ["tock-registers"]
+bsp_rpi4 = ["tock-registers"]
 test_build = ["qemu-exit"]
 
 ##--------------------------------------------------------------------------------------------------
@@ -21,12 +21,12 @@ test_build = ["qemu-exit"]
 test-types = { path = "test-types" }
 
 # Optional dependencies
-register = { version = "1.x.x", features = ["no_std_unit_tests"], optional = true }
-qemu-exit = { version = "1.x.x", optional = true }
+tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
+qemu-exit = { version = "2.x.x", optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "5.x.x" }
+cortex-a = { version = "6.x.x" }
 
 ##--------------------------------------------------------------------------------------------------
 ## Testing
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.rs b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.rs
index b743418e6..4f0068622 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.rs
@@ -11,7 +11,8 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-use cortex_a::{asm, regs::*};
+use cortex_a::{asm, registers::*};
+use tock_registers::interfaces::Writeable;
 
 // Assembly counterpart to this file.
 global_asm!(include_str!("boot.s"));
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs
index b9fdd0f73..0ea9b8764 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs
@@ -11,7 +11,8 @@
 //!
 //! crate::cpu::smp::arch_smp
 
-use cortex_a::regs::*;
+use cortex_a::registers::*;
+use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
index 5c44abb70..d755c51db 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
@@ -13,8 +13,11 @@
 
 use crate::{bsp, exception};
 use core::{cell::UnsafeCell, fmt};
-use cortex_a::{barrier, regs::*};
-use register::InMemoryRegister;
+use cortex_a::{asm::barrier, registers::*};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    registers::InMemoryRegister,
+};
 
 // Assembly counterpart to this file.
 global_asm!(include_str!("exception.s"));
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs
index a4b1a548e..4e79cc8a1 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs
@@ -11,7 +11,8 @@
 //!
 //! crate::exception::asynchronous::arch_asynchronous
 
-use cortex_a::regs::*;
+use cortex_a::registers::*;
+use tock_registers::interfaces::{Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -22,7 +23,7 @@ mod daif_bits {
 }
 
 trait DaifField {
-    fn daif_field() -> register::Field<u64, DAIF::Register>;
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register>;
 }
 
 struct Debug;
@@ -35,25 +36,25 @@ struct FIQ;
 //--------------------------------------------------------------------------------------------------
 
 impl DaifField for Debug {
-    fn daif_field() -> register::Field<u64, DAIF::Register> {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
         DAIF::D
     }
 }
 
 impl DaifField for SError {
-    fn daif_field() -> register::Field<u64, DAIF::Register> {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
         DAIF::A
     }
 }
 
 impl DaifField for IRQ {
-    fn daif_field() -> register::Field<u64, DAIF::Register> {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
         DAIF::I
     }
 }
 
 impl DaifField for FIQ {
-    fn daif_field() -> register::Field<u64, DAIF::Register> {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
         DAIF::F
     }
 }
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
index a706290bd..99991b6fe 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
@@ -18,7 +18,8 @@ use crate::{
     memory::mmu::{translation_table::KernelTranslationTable, TranslationGranule},
 };
 use core::intrinsics::unlikely;
-use cortex_a::{barrier, regs::*};
+use cortex_a::{asm::barrier, registers::*};
+use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs
index 665631f49..1e1173f2d 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -21,7 +21,11 @@ use crate::{
     },
 };
 use core::convert;
-use register::{register_bitfields, InMemoryRegister};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields,
+    registers::InMemoryRegister,
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -182,7 +186,7 @@ impl TableDescriptor {
 
 /// Convert the kernel's generic memory attributes to HW-specific attributes of the MMU.
 impl convert::From<AttributeFields>
-    for register::FieldValue<u64, STAGE1_PAGE_DESCRIPTOR::Register>
+    for tock_registers::fields::FieldValue<u64, STAGE1_PAGE_DESCRIPTOR::Register>
 {
     fn from(attribute_fields: AttributeFields) -> Self {
         // Memory attributes.
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/time.rs b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/time.rs
index 63017305b..7a7647ef7 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/time.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/time.rs
@@ -13,7 +13,8 @@
 
 use crate::{time, warn};
 use core::time::Duration;
-use cortex_a::{barrier, regs::*};
+use cortex_a::{asm::barrier, registers::*};
+use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs
index 424bafba3..5f1d6d53b 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs
@@ -5,7 +5,11 @@
 //! GICC Driver - GIC CPU interface.
 
 use crate::{bsp::device_driver::common::MMIODerefWrapper, exception};
-use register::{mmio::*, register_bitfields, register_structs};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields, register_structs,
+    registers::ReadWrite,
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicd.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicd.rs
index 32c428089..38fa0ed6c 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicd.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -11,7 +11,11 @@ use crate::{
     bsp::device_driver::common::MMIODerefWrapper, state, synchronization,
     synchronization::IRQSafeNullLock,
 };
-use register::{mmio::*, register_bitfields, register_structs};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields, register_structs,
+    registers::{ReadOnly, ReadWrite},
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index aaf9e1caf..a2f7eb93d 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -8,7 +8,11 @@ use crate::{
     bsp::device_driver::common::MMIODerefWrapper, driver, synchronization,
     synchronization::IRQSafeNullLock,
 };
-use register::{mmio::*, register_bitfields, register_structs};
+use tock_registers::{
+    interfaces::{ReadWriteable, Writeable},
+    register_bitfields, register_structs,
+    registers::ReadWrite,
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index 79814d8c3..4ca5988c4 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -2,7 +2,7 @@
 //
 // Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
-//! Peripheral Interrupt regsler Driver.
+//! Peripheral Interrupt Controller Driver.
 
 use super::{InterruptController, PendingIRQs, PeripheralIRQ};
 use crate::{
@@ -10,7 +10,11 @@ use crate::{
     exception, synchronization,
     synchronization::{IRQSafeNullLock, InitStateLock},
 };
-use register::{mmio::*, register_structs};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_structs,
+    registers::{ReadOnly, WriteOnly},
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index c8026dcf5..11d9745e5 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -14,7 +14,11 @@ use crate::{
     synchronization, synchronization::IRQSafeNullLock,
 };
 use core::fmt;
-use register::{mmio::*, register_bitfields, register_structs};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields, register_structs,
+    registers::{ReadOnly, ReadWrite, WriteOnly},
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -81,6 +85,7 @@ register_bitfields! {
     LCR_H [
         /// Word length. These bits indicate the number of data bits transmitted or received in a
         /// frame.
+        #[allow(clippy::enum_variant_names)]
         WLEN OFFSET(5) NUMBITS(2) [
             FiveBit = 0b00,
             SixBit = 0b01,
diff --git a/13_exceptions_part2_peripheral_IRQs/src/lib.rs b/13_exceptions_part2_peripheral_IRQs/src/lib.rs
index ca761361d..4ca9f03ee 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/lib.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/lib.rs
@@ -110,6 +110,7 @@
 #![allow(incomplete_features)]
 #![feature(asm)]
 #![feature(const_fn_fn_ptr_basics)]
+#![feature(const_fn_trait_bound)]
 #![feature(const_generics)]
 #![feature(const_panic)]
 #![feature(core_intrinsics)]
diff --git a/X1_JTAG_boot/Cargo.lock b/X1_JTAG_boot/Cargo.lock
index 011adc0f3..c93636780 100644
--- a/X1_JTAG_boot/Cargo.lock
+++ b/X1_JTAG_boot/Cargo.lock
@@ -4,11 +4,11 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "5.1.6"
+version = "6.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "ecefc30975eb87afc5a810d4b2305c0ec29e607ea97e51b2ecd80766e9268d28"
+checksum = "d25a057b35117d030453cd322f7adbdd331e886bc5bde46cdae656952c4feba6"
 dependencies = [
- "register",
+ "tock-registers",
 ]
 
 [[package]]
@@ -16,20 +16,11 @@ name = "mingo"
 version = "0.8.0"
 dependencies = [
  "cortex-a",
- "register",
-]
-
-[[package]]
-name = "register"
-version = "1.0.2"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f4a247de29ab7cc8f5006cfe775c4a81c704f9914c5e2a79696862e643135433"
-dependencies = [
  "tock-registers",
 ]
 
 [[package]]
 name = "tock-registers"
-version = "0.6.0"
+version = "0.7.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f521a79accce68c417c9c77ce22108056b626126da1932f7e2e9b5bbffee0cea"
+checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
diff --git a/X1_JTAG_boot/Cargo.toml b/X1_JTAG_boot/Cargo.toml
index 7b1adb5b3..07dc9b5b6 100644
--- a/X1_JTAG_boot/Cargo.toml
+++ b/X1_JTAG_boot/Cargo.toml
@@ -9,8 +9,8 @@ lto = true
 
 [features]
 default = []
-bsp_rpi3 = ["register"]
-bsp_rpi4 = ["register"]
+bsp_rpi3 = ["tock-registers"]
+bsp_rpi4 = ["tock-registers"]
 
 [[bin]]
 name = "kernel"
@@ -23,8 +23,9 @@ path = "src/main.rs"
 [dependencies]
 
 # Optional dependencies
-register = { version = "1.x.x", optional = true }
+tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "5.x.x" }
+cortex-a = { version = "6.x.x" }
+
diff --git a/X1_JTAG_boot/src/_arch/aarch64/time.rs b/X1_JTAG_boot/src/_arch/aarch64/time.rs
index 63017305b..7a7647ef7 100644
--- a/X1_JTAG_boot/src/_arch/aarch64/time.rs
+++ b/X1_JTAG_boot/src/_arch/aarch64/time.rs
@@ -13,7 +13,8 @@
 
 use crate::{time, warn};
 use core::time::Duration;
-use cortex_a::{barrier, regs::*};
+use cortex_a::{asm::barrier, registers::*};
+use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 41d8b861c..8033381e9 100644
--- a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -8,7 +8,11 @@ use crate::{
     bsp::device_driver::common::MMIODerefWrapper, driver, synchronization,
     synchronization::NullLock,
 };
-use register::{mmio::*, register_bitfields, register_structs};
+use tock_registers::{
+    interfaces::{ReadWriteable, Writeable},
+    register_bitfields, register_structs,
+    registers::ReadWrite,
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index d2aae4d24..70b3839e8 100644
--- a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -14,7 +14,11 @@ use crate::{
     synchronization::NullLock,
 };
 use core::fmt;
-use register::{mmio::*, register_bitfields, register_structs};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields, register_structs,
+    registers::{ReadOnly, ReadWrite, WriteOnly},
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -81,6 +85,7 @@ register_bitfields! {
     LCR_H [
         /// Word length. These bits indicate the number of data bits transmitted or received in a
         /// frame.
+        #[allow(clippy::enum_variant_names)]
         WLEN OFFSET(5) NUMBITS(2) [
             FiveBit = 0b00,
             SixBit = 0b01,

From b23c4318f2edf83cc76ba5487afe7ffbfa2eb649 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Tue, 6 Jul 2021 23:02:20 +0200
Subject: [PATCH 081/214] Switch to tock-registers: Documentation and misc
 updates

---
 02_runtime_init/README.md                     |   5 +-
 05_drivers_gpio_uart/README.md                |  25 ++--
 06_uart_chainloader/README.md                 |   8 +-
 06_uart_chainloader/demo_payload_rpi3.img     | Bin 6696 -> 6696 bytes
 06_uart_chainloader/demo_payload_rpi4.img     | Bin 6552 -> 6528 bytes
 07_timestamps/README.md                       |  13 +-
 09_privilege_level/README.md                  |  25 ++--
 .../README.md                                 |  15 ++-
 11_exceptions_part1_groundwork/README.md      |  14 +-
 12_integrated_testing/README.md               |  31 +++--
 13_exceptions_part2_peripheral_IRQs/README.md |  80 +++++++-----
 14_virtual_mem_part2_mmio_remap/README.md     | 123 +++++++++---------
 .../README.md                                 |  28 ++--
 .../README.md                                 |  28 ++--
 X1_JTAG_boot/jtag_boot_rpi3.img               | Bin 7856 -> 7840 bytes
 X1_JTAG_boot/jtag_boot_rpi4.img               | Bin 6584 -> 6568 bytes
 16 files changed, 216 insertions(+), 179 deletions(-)

diff --git a/02_runtime_init/README.md b/02_runtime_init/README.md
index 044a2d090..11ad00cc9 100644
--- a/02_runtime_init/README.md
+++ b/02_runtime_init/README.md
@@ -40,14 +40,15 @@ diff -uNr 01_wait_forever/Cargo.toml 02_runtime_init/Cargo.toml
  authors = ["Andre Richter <andre.o.richter@gmail.com>"]
  edition = "2018"
 
-@@ -21,3 +21,7 @@
+@@ -21,3 +21,8 @@
  ##--------------------------------------------------------------------------------------------------
 
  [dependencies]
 +
 +# Platform specific dependencies
 +[target.'cfg(target_arch = "aarch64")'.dependencies]
-+cortex-a = { version = "5.x.x" }
++cortex-a = { version = "6.x.x" }
++
 
 diff -uNr 01_wait_forever/Makefile 02_runtime_init/Makefile
 --- 01_wait_forever/Makefile
diff --git a/05_drivers_gpio_uart/README.md b/05_drivers_gpio_uart/README.md
index 4125583e3..7f0bbda5b 100644
--- a/05_drivers_gpio_uart/README.md
+++ b/05_drivers_gpio_uart/README.md
@@ -126,8 +126,8 @@ diff -uNr 04_safe_globals/Cargo.toml 05_drivers_gpio_uart/Cargo.toml
  default = []
 -bsp_rpi3 = []
 -bsp_rpi4 = []
-+bsp_rpi3 = ["register"]
-+bsp_rpi4 = ["register"]
++bsp_rpi3 = ["tock-registers"]
++bsp_rpi4 = ["tock-registers"]
 
  [[bin]]
  name = "kernel"
@@ -136,11 +136,11 @@ diff -uNr 04_safe_globals/Cargo.toml 05_drivers_gpio_uart/Cargo.toml
  [dependencies]
 
 +# Optional dependencies
-+register = { version = "1.x.x", optional = true }
++tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
 +
  # Platform specific dependencies
  [target.'cfg(target_arch = "aarch64")'.dependencies]
- cortex-a = { version = "5.x.x" }
+ cortex-a = { version = "6.x.x" }
 
 diff -uNr 04_safe_globals/Makefile 05_drivers_gpio_uart/Makefile
 --- 04_safe_globals/Makefile
@@ -220,7 +220,7 @@ diff -uNr 04_safe_globals/src/_arch/aarch64/cpu.rs 05_drivers_gpio_uart/src/_arc
 diff -uNr 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 --- 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 +++ 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
-@@ -0,0 +1,221 @@
+@@ -0,0 +1,225 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -231,7 +231,11 @@ diff -uNr 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 05_drivers_g
 +    bsp::device_driver::common::MMIODerefWrapper, driver, synchronization,
 +    synchronization::NullLock,
 +};
-+use register::{mmio::*, register_bitfields, register_structs};
++use tock_registers::{
++    interfaces::{ReadWriteable, Writeable},
++    register_bitfields, register_structs,
++    registers::ReadWrite,
++};
 +
 +//--------------------------------------------------------------------------------------------------
 +// Private Definitions
@@ -446,7 +450,7 @@ diff -uNr 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 05_drivers_g
 diff -uNr 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 --- 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 +++ 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
-@@ -0,0 +1,403 @@
+@@ -0,0 +1,408 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -463,7 +467,11 @@ diff -uNr 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 05_dri
 +    synchronization::NullLock,
 +};
 +use core::fmt;
-+use register::{mmio::*, register_bitfields, register_structs};
++use tock_registers::{
++    interfaces::{Readable, Writeable},
++    register_bitfields, register_structs,
++    registers::{ReadOnly, ReadWrite, WriteOnly},
++};
 +
 +//--------------------------------------------------------------------------------------------------
 +// Private Definitions
@@ -530,6 +538,7 @@ diff -uNr 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 05_dri
 +    LCR_H [
 +        /// Word length. These bits indicate the number of data bits transmitted or received in a
 +        /// frame.
++        #[allow(clippy::enum_variant_names)]
 +        WLEN OFFSET(5) NUMBITS(2) [
 +            FiveBit = 0b00,
 +            SixBit = 0b01,
diff --git a/06_uart_chainloader/README.md b/06_uart_chainloader/README.md
index a7239e8b3..0f9e4aa61 100644
--- a/06_uart_chainloader/README.md
+++ b/06_uart_chainloader/README.md
@@ -279,7 +279,7 @@ diff -uNr 05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s 06_uart_chainloader/
 diff -uNr 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 --- 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 +++ 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
-@@ -144,7 +144,7 @@
+@@ -148,7 +148,7 @@
          // Make an educated guess for a good delay value (Sequence described in the BCM2837
          // peripherals PDF).
          //
@@ -292,7 +292,7 @@ diff -uNr 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 06_uart
 diff -uNr 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 --- 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 +++ 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
-@@ -279,7 +279,7 @@
+@@ -284,7 +284,7 @@
      }
 
      /// Retrieve a character.
@@ -301,7 +301,7 @@ diff -uNr 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 0
          // If RX FIFO is empty,
          if self.registers.FR.matches_all(FR::RXFE::SET) {
              // immediately return in non-blocking mode.
-@@ -294,12 +294,7 @@
+@@ -299,12 +299,7 @@
          }
 
          // Read one character.
@@ -315,7 +315,7 @@ diff -uNr 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 0
 
          // Update statistics.
          self.chars_read += 1;
-@@ -379,14 +374,14 @@
+@@ -384,14 +379,14 @@
  impl console::interface::Read for PL011Uart {
      fn read_char(&self) -> char {
          self.inner
diff --git a/06_uart_chainloader/demo_payload_rpi3.img b/06_uart_chainloader/demo_payload_rpi3.img
index 4e640c636357f92152d3c180e30879ff3abcb130..5e3bf103b1fecffa26150f846a9608f5b22fe04a 100755
GIT binary patch
delta 1694
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diff --git a/06_uart_chainloader/demo_payload_rpi4.img b/06_uart_chainloader/demo_payload_rpi4.img
index 7e017a42beb30832cd2c7beb0d8e180310445b27..a8c1362c19ab56f4e4d1857fe201b383f5618cbf 100755
GIT binary patch
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diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index cfaa65d54..4e146bd0a 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -221,7 +221,7 @@ diff -uNr 06_uart_chainloader/src/_arch/aarch64/cpu.rs 07_timestamps/src/_arch/a
 diff -uNr 06_uart_chainloader/src/_arch/aarch64/time.rs 07_timestamps/src/_arch/aarch64/time.rs
 --- 06_uart_chainloader/src/_arch/aarch64/time.rs
 +++ 07_timestamps/src/_arch/aarch64/time.rs
-@@ -0,0 +1,118 @@
+@@ -0,0 +1,119 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -237,7 +237,8 @@ diff -uNr 06_uart_chainloader/src/_arch/aarch64/time.rs 07_timestamps/src/_arch/
 +
 +use crate::{time, warn};
 +use core::time::Duration;
-+use cortex_a::{barrier, regs::*};
++use cortex_a::{asm::barrier, registers::*};
++use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 +
 +//--------------------------------------------------------------------------------------------------
 +// Private Definitions
@@ -344,7 +345,7 @@ diff -uNr 06_uart_chainloader/src/_arch/aarch64/time.rs 07_timestamps/src/_arch/
 diff -uNr 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 --- 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 +++ 07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
-@@ -139,25 +139,19 @@
+@@ -143,25 +143,19 @@
      /// Disable pull-up/down on pins 14 and 15.
      #[cfg(feature = "bsp_rpi3")]
      fn disable_pud_14_15_bcm2837(&mut self) {
@@ -380,7 +381,7 @@ diff -uNr 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 07_times
 diff -uNr 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 --- 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 +++ 07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
-@@ -279,7 +279,7 @@
+@@ -284,7 +284,7 @@
      }
 
      /// Retrieve a character.
@@ -389,7 +390,7 @@ diff -uNr 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 07
          // If RX FIFO is empty,
          if self.registers.FR.matches_all(FR::RXFE::SET) {
              // immediately return in non-blocking mode.
-@@ -294,7 +294,12 @@
+@@ -299,7 +299,12 @@
          }
 
          // Read one character.
@@ -403,7 +404,7 @@ diff -uNr 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 07
 
          // Update statistics.
          self.chars_read += 1;
-@@ -374,14 +379,14 @@
+@@ -379,14 +384,14 @@
  impl console::interface::Read for PL011Uart {
      fn read_char(&self) -> char {
          self.inner
diff --git a/09_privilege_level/README.md b/09_privilege_level/README.md
index 42ad905e8..4b4c538d8 100644
--- a/09_privilege_level/README.md
+++ b/09_privilege_level/README.md
@@ -211,11 +211,12 @@ diff -uNr 08_hw_debug_JTAG/Cargo.toml 09_privilege_level/Cargo.toml
 diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs 09_privilege_level/src/_arch/aarch64/cpu/boot.rs
 --- 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs
 +++ 09_privilege_level/src/_arch/aarch64/cpu/boot.rs
-@@ -11,17 +11,67 @@
+@@ -11,17 +11,68 @@
  //!
  //! crate::cpu::boot::arch_boot
 
-+use cortex_a::{asm, regs::*};
++use cortex_a::{asm, registers::*};
++use tock_registers::interfaces::Writeable;
 +
  // Assembly counterpart to this file.
  global_asm!(include_str!("boot.s"));
@@ -323,7 +324,7 @@ diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s 09_privilege_level/src/_
 diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/exception/asynchronous.rs 09_privilege_level/src/_arch/aarch64/exception/asynchronous.rs
 --- 08_hw_debug_JTAG/src/_arch/aarch64/exception/asynchronous.rs
 +++ 09_privilege_level/src/_arch/aarch64/exception/asynchronous.rs
-@@ -0,0 +1,81 @@
+@@ -0,0 +1,82 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -337,14 +338,15 @@ diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/exception/asynchronous.rs 09_privil
 +//!
 +//! crate::exception::asynchronous::arch_asynchronous
 +
-+use cortex_a::regs::*;
++use cortex_a::registers::*;
++use tock_registers::interfaces::Readable;
 +
 +//--------------------------------------------------------------------------------------------------
 +// Private Definitions
 +//--------------------------------------------------------------------------------------------------
 +
 +trait DaifField {
-+    fn daif_field() -> register::Field<u64, DAIF::Register>;
++    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register>;
 +}
 +
 +struct Debug;
@@ -357,25 +359,25 @@ diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/exception/asynchronous.rs 09_privil
 +//--------------------------------------------------------------------------------------------------
 +
 +impl DaifField for Debug {
-+    fn daif_field() -> register::Field<u64, DAIF::Register> {
++    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
 +        DAIF::D
 +    }
 +}
 +
 +impl DaifField for SError {
-+    fn daif_field() -> register::Field<u64, DAIF::Register> {
++    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
 +        DAIF::A
 +    }
 +}
 +
 +impl DaifField for IRQ {
-+    fn daif_field() -> register::Field<u64, DAIF::Register> {
++    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
 +        DAIF::I
 +    }
 +}
 +
 +impl DaifField for FIQ {
-+    fn daif_field() -> register::Field<u64, DAIF::Register> {
++    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
 +        DAIF::F
 +    }
 +}
@@ -409,7 +411,7 @@ diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/exception/asynchronous.rs 09_privil
 diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/exception.rs 09_privilege_level/src/_arch/aarch64/exception.rs
 --- 08_hw_debug_JTAG/src/_arch/aarch64/exception.rs
 +++ 09_privilege_level/src/_arch/aarch64/exception.rs
-@@ -0,0 +1,30 @@
+@@ -0,0 +1,31 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -423,7 +425,8 @@ diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/exception.rs 09_privilege_level/src
 +//!
 +//! crate::exception::arch_exception
 +
-+use cortex_a::regs::*;
++use cortex_a::registers::*;
++use tock_registers::interfaces::Readable;
 +
 +//--------------------------------------------------------------------------------------------------
 +// Public Code
diff --git a/10_virtual_mem_part1_identity_mapping/README.md b/10_virtual_mem_part1_identity_mapping/README.md
index f573de03a..9b16747d1 100644
--- a/10_virtual_mem_part1_identity_mapping/README.md
+++ b/10_virtual_mem_part1_identity_mapping/README.md
@@ -364,7 +364,7 @@ diff -uNr 09_privilege_level/Cargo.toml 10_virtual_mem_part1_identity_mapping/Ca
 diff -uNr 09_privilege_level/src/_arch/aarch64/memory/mmu/translation_table.rs 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs
 --- 09_privilege_level/src/_arch/aarch64/memory/mmu/translation_table.rs
 +++ 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs
-@@ -0,0 +1,288 @@
+@@ -0,0 +1,292 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
@@ -388,7 +388,11 @@ diff -uNr 09_privilege_level/src/_arch/aarch64/memory/mmu/translation_table.rs 1
 +    },
 +};
 +use core::convert;
-+use register::{register_bitfields, InMemoryRegister};
++use tock_registers::{
++    interfaces::{Readable, Writeable},
++    register_bitfields,
++    registers::InMemoryRegister,
++};
 +
 +//--------------------------------------------------------------------------------------------------
 +// Private Definitions
@@ -549,7 +553,7 @@ diff -uNr 09_privilege_level/src/_arch/aarch64/memory/mmu/translation_table.rs 1
 +
 +/// Convert the kernel's generic memory attributes to HW-specific attributes of the MMU.
 +impl convert::From<AttributeFields>
-+    for register::FieldValue<u64, STAGE1_PAGE_DESCRIPTOR::Register>
++    for tock_registers::fields::FieldValue<u64, STAGE1_PAGE_DESCRIPTOR::Register>
 +{
 +    fn from(attribute_fields: AttributeFields) -> Self {
 +        // Memory attributes.
@@ -657,7 +661,7 @@ diff -uNr 09_privilege_level/src/_arch/aarch64/memory/mmu/translation_table.rs 1
 diff -uNr 09_privilege_level/src/_arch/aarch64/memory/mmu.rs 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
 --- 09_privilege_level/src/_arch/aarch64/memory/mmu.rs
 +++ 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
-@@ -0,0 +1,164 @@
+@@ -0,0 +1,165 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -678,7 +682,8 @@ diff -uNr 09_privilege_level/src/_arch/aarch64/memory/mmu.rs 10_virtual_mem_part
 +    memory::mmu::{translation_table::KernelTranslationTable, TranslationGranule},
 +};
 +use core::intrinsics::unlikely;
-+use cortex_a::{barrier, regs::*};
++use cortex_a::{asm::barrier, registers::*};
++use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 +
 +//--------------------------------------------------------------------------------------------------
 +// Private Definitions
diff --git a/11_exceptions_part1_groundwork/README.md b/11_exceptions_part1_groundwork/README.md
index 77a45ec6d..df8ecd6f9 100644
--- a/11_exceptions_part1_groundwork/README.md
+++ b/11_exceptions_part1_groundwork/README.md
@@ -492,14 +492,18 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/Cargo.toml 11_exceptions_part1_g
 diff -uNr 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs 11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
 --- 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs
 +++ 11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
-@@ -11,7 +11,224 @@
+@@ -11,8 +11,227 @@
  //!
  //! crate::exception::arch_exception
 
--use cortex_a::regs::*;
+-use cortex_a::registers::*;
+-use tock_registers::interfaces::Readable;
 +use core::{cell::UnsafeCell, fmt};
-+use cortex_a::{asm, barrier, regs::*};
-+use register::InMemoryRegister;
++use cortex_a::{asm, asm::barrier, registers::*};
++use tock_registers::{
++    interfaces::{Readable, Writeable},
++    registers::InMemoryRegister,
++};
 +
 +// Assembly counterpart to this file.
 +global_asm!(include_str!("exception.s"));
@@ -718,7 +722,7 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs 1
 
  //--------------------------------------------------------------------------------------------------
  // Public Code
-@@ -28,3 +245,23 @@
+@@ -29,3 +248,23 @@
          _ => (PrivilegeLevel::Unknown, "Unknown"),
      }
  }
diff --git a/12_integrated_testing/README.md b/12_integrated_testing/README.md
index d252d0c23..bb1677e98 100644
--- a/12_integrated_testing/README.md
+++ b/12_integrated_testing/README.md
@@ -825,10 +825,10 @@ diff -uNr 11_exceptions_part1_groundwork/Cargo.toml 12_integrated_testing/Cargo.
  authors = ["Andre Richter <andre.o.richter@gmail.com>"]
  edition = "2018"
 
-@@ -11,20 +11,46 @@
+@@ -11,21 +11,46 @@
  default = []
- bsp_rpi3 = ["register"]
- bsp_rpi4 = ["register"]
+ bsp_rpi3 = ["tock-registers"]
+ bsp_rpi4 = ["tock-registers"]
 -
 -[[bin]]
 -name = "kernel"
@@ -843,14 +843,13 @@ diff -uNr 11_exceptions_part1_groundwork/Cargo.toml 12_integrated_testing/Cargo.
 +test-types = { path = "test-types" }
 
  # Optional dependencies
--register = { version = "1.x.x", optional = true }
-+register = { version = "1.x.x", features = ["no_std_unit_tests"], optional = true }
-+qemu-exit = { version = "1.x.x", optional = true }
+ tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
++qemu-exit = { version = "2.x.x", optional = true }
 
  # Platform specific dependencies
  [target.'cfg(target_arch = "aarch64")'.dependencies]
- cortex-a = { version = "5.x.x" }
-+
+ cortex-a = { version = "6.x.x" }
+
 +##--------------------------------------------------------------------------------------------------
 +## Testing
 +##--------------------------------------------------------------------------------------------------
@@ -1010,12 +1009,12 @@ diff -uNr 11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs 12_integ
  //! crate::exception::arch_exception
 
  use core::{cell::UnsafeCell, fmt};
--use cortex_a::{asm, barrier, regs::*};
-+use cortex_a::{barrier, regs::*};
- use register::InMemoryRegister;
-
- // Assembly counterpart to this file.
-@@ -87,16 +87,6 @@
+-use cortex_a::{asm, asm::barrier, registers::*};
++use cortex_a::{asm::barrier, registers::*};
+ use tock_registers::{
+     interfaces::{Readable, Writeable},
+     registers::InMemoryRegister,
+@@ -90,16 +90,6 @@
 
  #[no_mangle]
  unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
@@ -1036,7 +1035,7 @@ diff -uNr 11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs 12_integ
 diff -uNr 11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs 12_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs
 --- 11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs
 +++ 12_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs
-@@ -286,3 +286,31 @@
+@@ -290,3 +290,31 @@
          self.lvl2.phys_start_addr_u64()
      }
  }
@@ -1072,7 +1071,7 @@ diff -uNr 11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translatio
 diff -uNr 11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs 12_integrated_testing/src/_arch/aarch64/memory/mmu.rs
 --- 11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
 +++ 12_integrated_testing/src/_arch/aarch64/memory/mmu.rs
-@@ -162,3 +162,33 @@
+@@ -163,3 +163,33 @@
          SCTLR_EL1.matches_all(SCTLR_EL1::M::Enable)
      }
  }
diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index 1174ca9e4..02341a12a 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -761,7 +761,7 @@ diff -uNr 12_integrated_testing/Cargo.toml 13_exceptions_part2_peripheral_IRQs/C
 diff -uNr 12_integrated_testing/src/_arch/aarch64/cpu/smp.rs 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs
 --- 12_integrated_testing/src/_arch/aarch64/cpu/smp.rs
 +++ 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs
-@@ -0,0 +1,29 @@
+@@ -0,0 +1,30 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -775,7 +775,8 @@ diff -uNr 12_integrated_testing/src/_arch/aarch64/cpu/smp.rs 13_exceptions_part2
 +//!
 +//! crate::cpu::smp::arch_smp
 +
-+use cortex_a::regs::*;
++use cortex_a::registers::*;
++use tock_registers::interfaces::Readable;
 +
 +//--------------------------------------------------------------------------------------------------
 +// Public Code
@@ -795,7 +796,14 @@ diff -uNr 12_integrated_testing/src/_arch/aarch64/cpu/smp.rs 13_exceptions_part2
 diff -uNr 12_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs
 --- 12_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs
 +++ 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs
-@@ -17,6 +17,10 @@
+@@ -12,12 +12,16 @@
+ //! crate::exception::asynchronous::arch_asynchronous
+
+ use cortex_a::registers::*;
+-use tock_registers::interfaces::Readable;
++use tock_registers::interfaces::{Readable, Writeable};
+
+ //--------------------------------------------------------------------------------------------------
  // Private Definitions
  //--------------------------------------------------------------------------------------------------
 
@@ -804,9 +812,9 @@ diff -uNr 12_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs 13_e
 +}
 +
  trait DaifField {
-     fn daif_field() -> register::Field<u64, DAIF::Register>;
+     fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register>;
  }
-@@ -65,6 +69,71 @@
+@@ -66,6 +70,71 @@
  // Public Code
  //--------------------------------------------------------------------------------------------------
 
@@ -888,9 +896,9 @@ diff -uNr 12_integrated_testing/src/_arch/aarch64/exception.rs 13_exceptions_par
 
 +use crate::{bsp, exception};
  use core::{cell::UnsafeCell, fmt};
- use cortex_a::{barrier, regs::*};
- use register::InMemoryRegister;
-@@ -91,8 +92,11 @@
+ use cortex_a::{asm::barrier, registers::*};
+ use tock_registers::{
+@@ -94,8 +95,11 @@
  }
 
  #[no_mangle]
@@ -908,7 +916,7 @@ diff -uNr 12_integrated_testing/src/_arch/aarch64/exception.rs 13_exceptions_par
 diff -uNr 12_integrated_testing/src/bsp/device_driver/arm/gicv2/gicc.rs 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs
 --- 12_integrated_testing/src/bsp/device_driver/arm/gicv2/gicc.rs
 +++ 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs
-@@ -0,0 +1,137 @@
+@@ -0,0 +1,141 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -916,7 +924,11 @@ diff -uNr 12_integrated_testing/src/bsp/device_driver/arm/gicv2/gicc.rs 13_excep
 +//! GICC Driver - GIC CPU interface.
 +
 +use crate::{bsp::device_driver::common::MMIODerefWrapper, exception};
-+use register::{mmio::*, register_bitfields, register_structs};
++use tock_registers::{
++    interfaces::{Readable, Writeable},
++    register_bitfields, register_structs,
++    registers::ReadWrite,
++};
 +
 +//--------------------------------------------------------------------------------------------------
 +// Private Definitions
@@ -1050,7 +1062,7 @@ diff -uNr 12_integrated_testing/src/bsp/device_driver/arm/gicv2/gicc.rs 13_excep
 diff -uNr 12_integrated_testing/src/bsp/device_driver/arm/gicv2/gicd.rs 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicd.rs
 --- 12_integrated_testing/src/bsp/device_driver/arm/gicv2/gicd.rs
 +++ 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicd.rs
-@@ -0,0 +1,195 @@
+@@ -0,0 +1,199 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -1064,7 +1076,11 @@ diff -uNr 12_integrated_testing/src/bsp/device_driver/arm/gicv2/gicd.rs 13_excep
 +    bsp::device_driver::common::MMIODerefWrapper, state, synchronization,
 +    synchronization::IRQSafeNullLock,
 +};
-+use register::{mmio::*, register_bitfields, register_structs};
++use tock_registers::{
++    interfaces::{Readable, Writeable},
++    register_bitfields, register_structs,
++    registers::{ReadOnly, ReadWrite},
++};
 +
 +//--------------------------------------------------------------------------------------------------
 +// Private Definitions
@@ -1495,9 +1511,9 @@ diff -uNr 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 13_exc
 -    synchronization::NullLock,
 +    synchronization::IRQSafeNullLock,
  };
- use register::{mmio::*, register_bitfields, register_structs};
-
-@@ -117,7 +117,7 @@
+ use tock_registers::{
+     interfaces::{ReadWriteable, Writeable},
+@@ -121,7 +121,7 @@
 
  /// Representation of the GPIO HW.
  pub struct GPIO {
@@ -1506,7 +1522,7 @@ diff -uNr 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 13_exc
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -193,7 +193,7 @@
+@@ -197,7 +197,7 @@
      /// - The user must ensure to provide a correct MMIO start address.
      pub const unsafe fn new(mmio_start_addr: usize) -> Self {
          Self {
@@ -1519,12 +1535,12 @@ diff -uNr 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 13_exc
 diff -uNr 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
 --- 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
 +++ 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
-@@ -0,0 +1,163 @@
+@@ -0,0 +1,167 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 +
-+//! Peripheral Interrupt regsler Driver.
++//! Peripheral Interrupt Controller Driver.
 +
 +use super::{InterruptController, PendingIRQs, PeripheralIRQ};
 +use crate::{
@@ -1532,7 +1548,11 @@ diff -uNr 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_interrupt_cont
 +    exception, synchronization,
 +    synchronization::{IRQSafeNullLock, InitStateLock},
 +};
-+use register::{mmio::*, register_structs};
++use tock_registers::{
++    interfaces::{Readable, Writeable},
++    register_structs,
++    registers::{ReadOnly, WriteOnly},
++};
 +
 +//--------------------------------------------------------------------------------------------------
 +// Private Definitions
@@ -1833,8 +1853,8 @@ diff -uNr 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 +    synchronization, synchronization::IRQSafeNullLock,
  };
  use core::fmt;
- use register::{mmio::*, register_bitfields, register_structs};
-@@ -135,6 +135,52 @@
+ use tock_registers::{
+@@ -140,6 +140,52 @@
          ]
      ],
 
@@ -1887,7 +1907,7 @@ diff -uNr 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
      /// Interrupt Clear Register.
      ICR [
          /// Meta field for all pending interrupts.
-@@ -153,7 +199,10 @@
+@@ -158,7 +204,10 @@
          (0x28 => FBRD: WriteOnly<u32, FBRD::Register>),
          (0x2c => LCR_H: WriteOnly<u32, LCR_H::Register>),
          (0x30 => CR: WriteOnly<u32, CR::Register>),
@@ -1899,7 +1919,7 @@ diff -uNr 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
          (0x44 => ICR: WriteOnly<u32, ICR::Register>),
          (0x48 => @END),
      }
-@@ -183,7 +232,8 @@
+@@ -188,7 +237,8 @@
 
  /// Representation of the UART.
  pub struct PL011Uart {
@@ -1909,7 +1929,7 @@ diff -uNr 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -251,6 +301,14 @@
+@@ -256,6 +306,14 @@
              .LCR_H
              .write(LCR_H::WLEN::EightBit + LCR_H::FEN::FifosEnabled);
 
@@ -1924,7 +1944,7 @@ diff -uNr 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
          // Turn the UART on.
          self.registers
              .CR
-@@ -333,9 +391,13 @@
+@@ -338,9 +396,13 @@
      /// # Safety
      ///
      /// - The user must ensure to provide a correct MMIO start address.
@@ -1940,7 +1960,7 @@ diff -uNr 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
          }
      }
  }
-@@ -355,6 +417,21 @@
+@@ -360,6 +422,21 @@
 
          Ok(())
      }
@@ -1962,7 +1982,7 @@ diff -uNr 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
  }
 
  impl console::interface::Write for PL011Uart {
-@@ -401,3 +478,24 @@
+@@ -406,3 +483,24 @@
          self.inner.lock(|inner| inner.chars_read)
      }
  }
@@ -2376,15 +2396,17 @@ diff -uNr 12_integrated_testing/src/exception/asynchronous.rs 13_exceptions_part
 diff -uNr 12_integrated_testing/src/lib.rs 13_exceptions_part2_peripheral_IRQs/src/lib.rs
 --- 12_integrated_testing/src/lib.rs
 +++ 13_exceptions_part2_peripheral_IRQs/src/lib.rs
-@@ -108,6 +108,7 @@
+@@ -108,7 +108,9 @@
 
  #![allow(clippy::upper_case_acronyms)]
  #![allow(incomplete_features)]
 +#![feature(asm)]
  #![feature(const_fn_fn_ptr_basics)]
++#![feature(const_fn_trait_bound)]
  #![feature(const_generics)]
  #![feature(const_panic)]
-@@ -134,6 +135,7 @@
+ #![feature(core_intrinsics)]
+@@ -134,6 +136,7 @@
  pub mod exception;
  pub mod memory;
  pub mod print;
diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index 73ef83a3a..6cb7e16f1 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -397,9 +397,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs 14_
 +    memory::Address,
 +};
  use core::{cell::UnsafeCell, fmt};
- use cortex_a::{barrier, regs::*};
- use register::InMemoryRegister;
-@@ -50,6 +54,20 @@
+ use cortex_a::{asm::barrier, registers::*};
+ use tock_registers::{
+@@ -53,6 +57,20 @@
  // Private Code
  //--------------------------------------------------------------------------------------------------
 
@@ -420,7 +420,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs 14_
  /// Prints verbose information about the exception and then panics.
  fn default_exception_handler(e: &ExceptionContext) {
      panic!(
-@@ -166,7 +184,9 @@
+@@ -169,7 +187,9 @@
          writeln!(f, " - {}", ec_translation)?;
 
          // Raw print of instruction specific syndrome.
@@ -451,7 +451,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
      },
  };
  use core::convert;
-@@ -117,12 +120,9 @@
+@@ -121,12 +124,9 @@
  }
 
  trait StartAddr {
@@ -465,7 +465,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
  //--------------------------------------------------------------------------------------------------
  // Public Definitions
  //--------------------------------------------------------------------------------------------------
-@@ -137,10 +137,13 @@
+@@ -141,10 +141,13 @@
 
      /// Table descriptors, covering 512 MiB windows.
      lvl2: [TableDescriptor; NUM_TABLES],
@@ -482,7 +482,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
 
  //--------------------------------------------------------------------------------------------------
  // Private Code
-@@ -148,12 +151,8 @@
+@@ -152,12 +155,8 @@
 
  // The binary is still identity mapped, so we don't need to convert here.
  impl<T, const N: usize> StartAddr for [T; N] {
@@ -497,7 +497,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
      }
  }
 
-@@ -166,10 +165,10 @@
+@@ -170,10 +169,10 @@
      }
 
      /// Create an instance pointing to the supplied address.
@@ -510,7 +510,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
          val.write(
              STAGE1_TABLE_DESCRIPTOR::NEXT_LEVEL_TABLE_ADDR_64KiB.val(shifted as u64)
                  + STAGE1_TABLE_DESCRIPTOR::TYPE::Table
-@@ -226,7 +225,10 @@
+@@ -230,7 +229,10 @@
      }
 
      /// Create an instance.
@@ -522,7 +522,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
          let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
 
          let shifted = phys_output_addr as u64 >> Granule64KiB::SHIFT;
-@@ -240,50 +242,193 @@
+@@ -244,50 +246,193 @@
 
          Self { value: val.get() }
      }
@@ -687,7 +687,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
 +                return Err("Virtual page is already mapped");
              }
 +
-+            *page_descriptor = PageDescriptor::from_output_addr(phys_page.as_ptr(), &attr);
++            *page_descriptor = PageDescriptor::from_output_addr(phys_page.as_ptr(), attr);
          }
 
          Ok(())
@@ -733,7 +733,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
      }
  }
 
-@@ -292,6 +437,9 @@
+@@ -296,6 +441,9 @@
  //--------------------------------------------------------------------------------------------------
 
  #[cfg(test)]
@@ -755,8 +755,8 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 14
 +    memory::{mmu::TranslationGranule, Address, Physical},
  };
  use core::intrinsics::unlikely;
- use cortex_a::{barrier, regs::*};
-@@ -45,13 +45,6 @@
+ use cortex_a::{asm::barrier, registers::*};
+@@ -46,13 +46,6 @@
  // Global instances
  //--------------------------------------------------------------------------------------------------
 
@@ -770,7 +770,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 14
  static MMU: MemoryManagementUnit = MemoryManagementUnit;
 
  //--------------------------------------------------------------------------------------------------
-@@ -86,7 +79,7 @@
+@@ -87,7 +80,7 @@
 
      /// Configure various settings of stage 1 of the EL1 translation regime.
      fn configure_translation_control(&self) {
@@ -779,7 +779,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 14
 
          TCR_EL1.write(
              TCR_EL1::TBI0::Used
-@@ -118,7 +111,10 @@
+@@ -119,7 +112,10 @@
  use memory::mmu::MMUEnableError;
 
  impl memory::mmu::interface::MMU for MemoryManagementUnit {
@@ -791,7 +791,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 14
          if unlikely(self.is_enabled()) {
              return Err(MMUEnableError::AlreadyEnabled);
          }
-@@ -133,13 +129,8 @@
+@@ -134,13 +130,8 @@
          // Prepare the memory attribute indirection register.
          self.set_up_mair();
 
@@ -806,7 +806,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 14
 
          self.configure_translation_control();
 
-@@ -162,33 +153,3 @@
+@@ -163,33 +154,3 @@
          SCTLR_EL1.matches_all(SCTLR_EL1::M::Enable)
      }
  }
@@ -852,10 +852,10 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gi
 +use crate::{
 +    bsp::device_driver::common::MMIODerefWrapper, exception, synchronization::InitStateLock,
 +};
- use register::{mmio::*, register_bitfields, register_structs};
-
- //--------------------------------------------------------------------------------------------------
-@@ -56,12 +58,13 @@
+ use tock_registers::{
+     interfaces::{Readable, Writeable},
+     register_bitfields, register_structs,
+@@ -60,12 +62,13 @@
 
  /// Representation of the GIC CPU interface.
  pub struct GICC {
@@ -870,7 +870,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gi
 
  impl GICC {
      /// Create an instance.
-@@ -71,10 +74,15 @@
+@@ -75,10 +78,15 @@
      /// - The user must ensure to provide a correct MMIO start address.
      pub const unsafe fn new(mmio_start_addr: usize) -> Self {
          Self {
@@ -887,7 +887,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gi
      /// Accept interrupts of any priority.
      ///
      /// Quoting the GICv2 Architecture Specification:
-@@ -87,7 +95,9 @@
+@@ -91,7 +99,9 @@
      /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
      ///   of `&mut self`.
      pub fn priority_accept_all(&self) {
@@ -898,7 +898,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gi
      }
 
      /// Enable the interface - start accepting IRQs.
-@@ -97,7 +107,9 @@
+@@ -101,7 +111,9 @@
      /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
      ///   of `&mut self`.
      pub fn enable(&self) {
@@ -909,7 +909,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gi
      }
 
      /// Extract the number of the highest-priority pending IRQ.
-@@ -113,7 +125,8 @@
+@@ -117,7 +129,8 @@
          &self,
          _ic: &exception::asynchronous::IRQContext<'irq_context>,
      ) -> usize {
@@ -919,7 +919,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gi
      }
 
      /// Complete handling of the currently active IRQ.
-@@ -132,6 +145,8 @@
+@@ -136,6 +149,8 @@
          irq_number: u32,
          _ic: &exception::asynchronous::IRQContext<'irq_context>,
      ) {
@@ -943,9 +943,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gi
 +    state, synchronization,
 +    synchronization::{IRQSafeNullLock, InitStateLock},
  };
- use register::{mmio::*, register_bitfields, register_structs};
-
-@@ -79,7 +80,7 @@
+ use tock_registers::{
+     interfaces::{Readable, Writeable},
+@@ -83,7 +84,7 @@
      shared_registers: IRQSafeNullLock<SharedRegisters>,
 
      /// Access to banked registers is unguarded.
@@ -954,7 +954,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gi
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -116,6 +117,7 @@
+@@ -120,6 +121,7 @@
  //--------------------------------------------------------------------------------------------------
  // Public Code
  //--------------------------------------------------------------------------------------------------
@@ -962,7 +962,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gi
  use synchronization::interface::Mutex;
 
  impl GICD {
-@@ -127,10 +129,17 @@
+@@ -131,10 +133,17 @@
      pub const unsafe fn new(mmio_start_addr: usize) -> Self {
          Self {
              shared_registers: IRQSafeNullLock::new(SharedRegisters::new(mmio_start_addr)),
@@ -981,7 +981,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gi
      /// Use a banked ITARGETSR to retrieve the executing core's GIC target mask.
      ///
      /// Quoting the GICv2 Architecture Specification:
-@@ -138,7 +147,8 @@
+@@ -142,7 +151,8 @@
      ///   "GICD_ITARGETSR0 to GICD_ITARGETSR7 are read-only, and each field returns a value that
      ///    corresponds only to the processor reading the register."
      fn local_gic_target_mask(&self) -> u32 {
@@ -991,7 +991,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gi
      }
 
      /// Route all SPIs to the boot core and enable the distributor.
-@@ -177,10 +187,10 @@
+@@ -181,10 +191,10 @@
          // Check if we are handling a private or shared IRQ.
          match irq_num {
              // Private.
@@ -1096,10 +1096,10 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
      synchronization::IRQSafeNullLock,
  };
 +use core::sync::atomic::{AtomicUsize, Ordering};
- use register::{mmio::*, register_bitfields, register_structs};
-
- //--------------------------------------------------------------------------------------------------
-@@ -117,6 +118,8 @@
+ use tock_registers::{
+     interfaces::{ReadWriteable, Writeable},
+     register_bitfields, register_structs,
+@@ -121,6 +122,8 @@
 
  /// Representation of the GPIO HW.
  pub struct GPIO {
@@ -1108,7 +1108,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
      inner: IRQSafeNullLock<GPIOInner>,
  }
 
-@@ -136,6 +139,19 @@
+@@ -140,6 +143,19 @@
          }
      }
 
@@ -1128,7 +1128,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
      /// Disable pull-up/down on pins 14 and 15.
      #[cfg(feature = "bsp_rpi3")]
      fn disable_pud_14_15_bcm2837(&mut self) {
-@@ -190,10 +206,12 @@
+@@ -194,10 +210,12 @@
      ///
      /// # Safety
      ///
@@ -1144,7 +1144,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
          }
      }
 
-@@ -212,4 +230,26 @@
+@@ -216,4 +234,26 @@
      fn compatible(&self) -> &'static str {
          "BCM GPIO"
      }
@@ -1175,13 +1175,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
 diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
 --- 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
 +++ 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
-@@ -2,12 +2,12 @@
- //
- // Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
-
--//! Peripheral Interrupt regsler Driver.
-+//! Peripheral Interrupt Controller Driver.
-
+@@ -7,7 +7,7 @@
  use super::{InterruptController, PendingIRQs, PeripheralIRQ};
  use crate::{
      bsp::device_driver::common::MMIODerefWrapper,
@@ -1189,8 +1183,8 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
 +    driver, exception, memory, synchronization,
      synchronization::{IRQSafeNullLock, InitStateLock},
  };
- use register::{mmio::*, register_structs};
-@@ -51,11 +51,13 @@
+ use tock_registers::{
+@@ -55,11 +55,13 @@
 
  /// Representation of the peripheral interrupt controller.
  pub struct PeripheralIC {
@@ -1205,7 +1199,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
 
      /// Stores registered IRQ handlers. Writable only during kernel init. RO afterwards.
      handler_table: InitStateLock<HandlerTable>,
-@@ -70,21 +72,26 @@
+@@ -74,21 +76,26 @@
      ///
      /// # Safety
      ///
@@ -1239,7 +1233,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
      }
  }
 
-@@ -93,6 +100,24 @@
+@@ -97,6 +104,24 @@
  //------------------------------------------------------------------------------
  use synchronization::interface::{Mutex, ReadWriteEx};
 
@@ -1322,10 +1316,10 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
 +    fmt,
 +    sync::atomic::{AtomicUsize, Ordering},
 +};
- use register::{mmio::*, register_bitfields, register_structs};
-
- //--------------------------------------------------------------------------------------------------
-@@ -232,6 +235,8 @@
+ use tock_registers::{
+     interfaces::{Readable, Writeable},
+     register_bitfields, register_structs,
+@@ -237,6 +240,8 @@
 
  /// Representation of the UART.
  pub struct PL011Uart {
@@ -1334,7 +1328,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
      inner: IRQSafeNullLock<PL011UartInner>,
      irq_number: bsp::device_driver::IRQNumber,
  }
-@@ -271,7 +276,15 @@
+@@ -276,7 +281,15 @@
      /// genrated baud rate of `48_000_000 / (16 * 3.25) = 923_077`.
      ///
      /// Error = `((923_077 - 921_600) / 921_600) * 100 = 0.16modulo`.
@@ -1351,7 +1345,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
          // Execution can arrive here while there are still characters queued in the TX FIFO and
          // actively being sent out by the UART hardware. If the UART is turned off in this case,
          // those queued characters would be lost.
-@@ -313,6 +326,8 @@
+@@ -318,6 +331,8 @@
          self.registers
              .CR
              .write(CR::UARTEN::Enabled + CR::TXE::Enabled + CR::RXE::Enabled);
@@ -1360,7 +1354,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
      }
 
      /// Send a character.
-@@ -390,13 +405,18 @@
+@@ -395,13 +410,18 @@
      ///
      /// # Safety
      ///
@@ -1382,7 +1376,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
              irq_number,
          }
      }
-@@ -413,7 +433,13 @@
+@@ -418,7 +438,13 @@
      }
 
      unsafe fn init(&self) -> Result<(), &'static str> {
@@ -1397,7 +1391,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
 
          Ok(())
      }
-@@ -432,6 +458,16 @@
+@@ -437,6 +463,16 @@
 
          Ok(())
      }
@@ -2155,16 +2149,15 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/driver.rs 14_virtual_mem_part2
 diff -uNr 13_exceptions_part2_peripheral_IRQs/src/lib.rs 14_virtual_mem_part2_mmio_remap/src/lib.rs
 --- 13_exceptions_part2_peripheral_IRQs/src/lib.rs
 +++ 14_virtual_mem_part2_mmio_remap/src/lib.rs
-@@ -109,6 +109,8 @@
+@@ -109,6 +109,7 @@
  #![allow(clippy::upper_case_acronyms)]
  #![allow(incomplete_features)]
  #![feature(asm)]
 +#![feature(const_evaluatable_checked)]
-+#![feature(const_fn)]
  #![feature(const_fn_fn_ptr_basics)]
+ #![feature(const_fn_trait_bound)]
  #![feature(const_generics)]
- #![feature(const_panic)]
-@@ -129,6 +131,7 @@
+@@ -130,6 +131,7 @@
  mod synchronization;
 
  pub mod bsp;
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index c04cb3d2d..581dcefca 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -802,10 +802,10 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs 15_virtu
 
 +use crate::{cpu, memory, memory::Address};
 +use core::intrinsics::unlikely;
- use cortex_a::{asm, regs::*};
+ use cortex_a::{asm, registers::*};
+ use tock_registers::interfaces::Writeable;
 
- // Assembly counterpart to this file.
-@@ -69,9 +71,18 @@
+@@ -70,9 +72,18 @@
  ///
  /// - Exception return from EL2 must must continue execution in EL1 with `kernel_init()`.
  #[no_mangle]
@@ -857,10 +857,10 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translati
  };
 -use core::convert;
 +use core::convert::{self, TryInto};
- use register::{register_bitfields, InMemoryRegister};
-
- //--------------------------------------------------------------------------------------------------
-@@ -120,7 +120,7 @@
+ use tock_registers::{
+     interfaces::{Readable, Writeable},
+     register_bitfields,
+@@ -124,7 +124,7 @@
  }
 
  trait StartAddr {
@@ -869,7 +869,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translati
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -149,9 +149,8 @@
+@@ -153,9 +153,8 @@
  // Private Code
  //--------------------------------------------------------------------------------------------------
 
@@ -880,7 +880,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translati
          Address::new(self as *const _ as usize)
      }
  }
-@@ -269,7 +268,7 @@
+@@ -273,7 +272,7 @@
 
      /// Create an instance.
      #[allow(clippy::assertions_on_constants)]
@@ -889,7 +889,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translati
          assert!(bsp::memory::mmu::KernelGranule::SIZE == Granule64KiB::SIZE);
 
          // Can't have a zero-sized address space.
-@@ -278,11 +277,20 @@
+@@ -282,11 +281,20 @@
          Self {
              lvl3: [[PageDescriptor::new_zeroed(); 8192]; NUM_TABLES],
              lvl2: [TableDescriptor::new_zeroed(); NUM_TABLES],
@@ -912,7 +912,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translati
      /// The start address of the table's MMIO range.
      #[inline(always)]
      fn mmio_start_addr(&self) -> Address<Virtual> {
-@@ -338,24 +346,26 @@
+@@ -342,24 +350,26 @@
  impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::TranslationTable
      for FixedSizeTranslationTable<NUM_TABLES>
  {
@@ -958,8 +958,8 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs 15_vir
 +    memory::{mmu::TranslationGranule, Address, Physical, Virtual},
  };
  use core::intrinsics::unlikely;
- use cortex_a::{barrier, regs::*};
-@@ -108,7 +108,7 @@
+ use cortex_a::{asm::barrier, registers::*};
+@@ -109,7 +109,7 @@
  //------------------------------------------------------------------------------
  // OS Interface Code
  //------------------------------------------------------------------------------
@@ -968,7 +968,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs 15_vir
 
  impl memory::mmu::interface::MMU for MemoryManagementUnit {
      unsafe fn enable_mmu_and_caching(
-@@ -152,4 +152,31 @@
+@@ -153,4 +153,31 @@
      fn is_enabled(&self) -> bool {
          SCTLR_EL1.matches_all(SCTLR_EL1::M::Enable)
      }
diff --git a/16_virtual_mem_part4_higher_half_kernel/README.md b/16_virtual_mem_part4_higher_half_kernel/README.md
index 0a4381841..fa594703a 100644
--- a/16_virtual_mem_part4_higher_half_kernel/README.md
+++ b/16_virtual_mem_part4_higher_half_kernel/README.md
@@ -246,7 +246,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/Cargo.toml 16_virtual_mem_part
 diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs
 --- 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
 +++ 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs
-@@ -29,7 +29,10 @@
+@@ -30,7 +30,10 @@
  /// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
  /// - The HW state of EL1 must be prepared in a sound way.
  #[inline(always)]
@@ -258,7 +258,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
      // Enable timer counter registers for EL1.
      CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
 
-@@ -52,11 +55,11 @@
+@@ -53,11 +56,11 @@
      );
 
      // Second, let the link register point to kernel_init().
@@ -272,7 +272,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -73,9 +76,13 @@
+@@ -74,9 +77,13 @@
  #[no_mangle]
  pub unsafe extern "C" fn _start_rust(
      phys_kernel_tables_base_addr: u64,
@@ -288,7 +288,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
 
      // Turn on the MMU for EL1.
      let addr = Address::new(phys_kernel_tables_base_addr as usize);
-@@ -83,6 +90,7 @@
+@@ -84,6 +91,7 @@
          cpu::wait_forever();
      }
 
@@ -352,7 +352,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.s 1
 diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
 --- 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs
 +++ 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
-@@ -131,7 +131,7 @@
+@@ -135,7 +135,7 @@
  /// aligned, so the lvl3 is put first.
  #[repr(C)]
  #[repr(align(65536))]
@@ -361,7 +361,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/t
      /// Page descriptors, covering 64 KiB windows per entry.
      lvl3: [[PageDescriptor; 8192]; NUM_TABLES],
 
-@@ -258,14 +258,23 @@
+@@ -262,14 +262,23 @@
  where
      [u8; Self::SIZE >> Granule512MiB::SHIFT]: Sized,
  {
@@ -387,7 +387,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/t
      /// Create an instance.
      #[allow(clippy::assertions_on_constants)]
      const fn _new(for_precompute: bool) -> Self {
-@@ -294,20 +303,32 @@
+@@ -298,20 +307,32 @@
      /// The start address of the table's MMIO range.
      #[inline(always)]
      fn mmio_start_addr(&self) -> Address<Virtual> {
@@ -424,7 +424,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/t
      }
 
      /// Helper to calculate the lvl2 and lvl3 indices from an address.
-@@ -316,7 +337,12 @@
+@@ -320,7 +341,12 @@
          &self,
          addr: *const Page<Virtual>,
      ) -> Result<(usize, usize), &'static str> {
@@ -438,7 +438,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/t
          let lvl2_index = addr >> Granule512MiB::SHIFT;
          let lvl3_index = (addr & Granule512MiB::MASK) >> Granule64KiB::SHIFT;
 
-@@ -343,8 +369,9 @@
+@@ -347,8 +373,9 @@
  // OS Interface Code
  //------------------------------------------------------------------------------
 
@@ -450,7 +450,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/t
  {
      fn init(&mut self) -> Result<(), &'static str> {
          if self.initialized {
-@@ -419,12 +446,16 @@
+@@ -423,12 +450,16 @@
              return Err("Not enough MMIO space left");
          }
 
@@ -468,7 +468,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/t
          Ok(PageSliceDescriptor::from_addr(addr, num_pages))
      }
 
-@@ -447,7 +478,7 @@
+@@ -451,7 +482,7 @@
  //--------------------------------------------------------------------------------------------------
 
  #[cfg(test)]
@@ -481,7 +481,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/t
 diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu.rs 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu.rs
 --- 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu.rs
 +++ 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu.rs
-@@ -65,6 +65,7 @@
+@@ -66,6 +66,7 @@
 
  impl MemoryManagementUnit {
      /// Setup function for the MAIR_EL1 register.
@@ -489,7 +489,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu.r
      fn set_up_mair(&self) {
          // Define the memory types being mapped.
          MAIR_EL1.write(
-@@ -78,20 +79,21 @@
+@@ -79,20 +80,21 @@
      }
 
      /// Configure various settings of stage 1 of the EL1 translation regime.
@@ -521,7 +521,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu.r
          );
      }
  }
-@@ -130,7 +132,7 @@
+@@ -131,7 +133,7 @@
          self.set_up_mair();
 
          // Set the "Translation Table Base Register".
diff --git a/X1_JTAG_boot/jtag_boot_rpi3.img b/X1_JTAG_boot/jtag_boot_rpi3.img
index 9122433173b872ffac01c7ef68ea4d3f32a5243e..5e9581f57bcc227a275f045d352db907902e89c0 100755
GIT binary patch
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delta 2580
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zp-(x=+IN1Pj3D2{9_79xNT>?-Er$bP3O$22-+J3r%KNx}xWl^p2eRKNgtypj+x$id
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C|3-KK

diff --git a/X1_JTAG_boot/jtag_boot_rpi4.img b/X1_JTAG_boot/jtag_boot_rpi4.img
index 25e8aedfdf849d61eb75103719199b31f4b9c2d0..33045fe94e046489ca6227aa30056cd73e29f3fc 100755
GIT binary patch
delta 1901
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znx>|thj1w`CNO({=s)b#XYHuc*rgAHiJ)O#NXGCxvgjP<ae@;g?^lAa4oko`0{q<|
z@G<-ob~>47+IS2rbT@`C^N{?X{GAH$H6lN<RoR1VIYPiE|4`Yg3#;>%!jdSVP5L&n
zoBpn^$n=k~e|racnQks{&Rw^dAD5&*MK=g6K0-`Kgv4@eQtg#I8?(~m1@p+$^y>nv
zeso5%I-NlQ+gYcpo(>nd$xAfHu-w2Ku=gm1IEI1s+qtTp))^cu*m)7{=xDoP|Geu<
z`9v8Jbo-(oOiTekQKk^K&%82}i|QSL`FtL(pAqUcK1m3zGrIlhZb`6P68_MA>G)}Y
zB_SvCvxIe5H!U5PTN@w-oK7AKwKEu*%QLt(0KI5jKw9XqF}(1MgRj9yjF&Qk6vpt}
zz<bhXRVD@5$H(Yn5cnE;#I%3mfGexOq?ur`ucm?F2LNb92F#($%++)HOL#&e>*XdZ
z;+w^A%6pkc_B;BKxw1zzKSpXIHk3Rt_7-N&7<qcEY;E1uio1rayf7<&SnoNyuCQuR
zqcwxZeA8ol_KeSx9uIrl(KAq}CYq}S8Q8D%y0z4PIvY}c7W8@cOenFfeP&koy{y!b
z)sj~Z=d6oaw08Bj)}7mSIA7hmv#G&FPuU!bN+-Q+TVzOPE#UV~kCl|zOYH~jnOG{a
WYiD+?rvbY|v&Wpd-A|kBYySbEBvj1+

delta 1855
zcmZ`(eQZ-z6hHU9cJFncUB6qDzNQ(oLojo&u2aKnHxrZy3X_Rn8xWEXWUwKLW+d$t
zlku6pT!cYL7$Y&fBI+_Q&KTL?FBOe~PW_8+#H3qAGf=l8@I1GDQzZJ5m;3Iy=l473
z{O)<@WX(r433nk>Dg@vIAFlqzWZuA<Vq)m#JKm&iWGVYNPtTH5_Fe-V$hpO>O6n>o
z<2)$4>2~gE=F&hv<7D>1(GtFg$n+q;#UA!60Y1KR@&YLHA-;02Pf~ot)MI#rBX-(s
zm^4(t)J00n%V@&rUWliGZkv*>{8UW|L`@-mgogtXNZ$_gEu-<xhc7|$+;wOgxgP)I
z5Bj~ap7Tl6S`Z*F(#Hxa?KgREaxs7{#oLl&yt8VYcO=)**9*Gr4FCsPZwbMJFGti~
z0Th=2Q$S6^oCP=e`;xa1XFyyJo*dP}mp!+`mwVeI>fu^>=qR(HcM6~>N}mztkUrWW
zSOYL41fykgHpROzmOVMnTa!SRjLOqO@CNd=@YYN#$1tab8lUvL5S-z?RflU~=*T#P
z-qAE?n)f8V#FLq+Jm%@AM7&b8kCc3|$p}*_G0}{uzOb3h1Wg3aEFsp+Fve#qhn%}N
zPSmv!Qhka*(<Ihfg1N^?Vdm8RV394*wBIO)_L)GrXa~#Q4W3mob}MMVhEXRmw+Y@m
z_^YXdte(b=fZ%CfOr~`aOh!;d6d;JNy)~jb7Rf_yw1spLL@O)Wjzv4Fas_KbtqD1<
zL>fDoNMafNxai@S##u9Q%=K>fZ3Un(h@@$Yq6P2`%ll_k<r-g@WI0~VXiev^4jJou
z&o0+}h55%u_>KtfpUWxcM8%w$6e>23`(I|U=)+Iuv7eLTsyIMx)4N0t?L`7k53<Qr
zx@y@1Pt8VjXbCrV^kJ|DBoRd!JB?sHV)8e7ym(HmS(LLkcrGa#hA*{Y*N&aw)QPJQ
z(s;;fMUYKdAv-O?nP{n;eRZ|0dWk*r;Tt_iMvLG~Pob;^isdY0lUS+65Zq>wvo3(d
zk#*R3gJnt<+cI4x52b@Jls+$q(#V}&i2E8Cn&=P5)CqRyCYb6&IomAao`6x#E+MX5
z58&M;C;XsJ^kX0bXRTPCcx}h!=*H-bNaSn)6P`Wa^*=nV$jf+)|A~zeHO;XKK#5{-
zsE}1wNy-R8)&qS8XiE7bYIsjfogN3}`3CHl5;@B*wlyo%Rv>BA@o!}u{6EStHD=Y3
zd0@XqavBwha;{vgu{sRQ0^;8joGySV32&bT+=UK4Q&@G~9q>-R`Oa~UOn|;r+C|#w
zkEM0_>GC!`S@!JT6Nap%PnjiBP20`Rf`NKP^ttFBa|H>}0kgC8r`wuSk|HXOw}h{c
zj+*_XpWZY#l#i6-JTj<hOsWvio*bde%e|uPR#Gety1jfSM;@hrmU~Ry^Av38#OW}d
zYk7!->2ixdlpB-;2PIM7x}zP!3tikI@!x6Kcg?r7Lu|4EVnC7<?9)VKc&@_Zx?ZM9
z%Y1U2j#^^eh>tc~=N2=n6G(Ldlt$WZ-TB~{S7Dc(uH;n_F(OV+EryxKjQJ`Uz>h;3
z0WMl?Tgri-cG*1SOM1{&kK+zt@N3%x<O$J*@VlN}j{F`I$~}*Fc5dm!uWh>Bq1*5E
zi_)-TN%d>aJQ~Z$Jze@9h0Q(pM%yts;1G!E2Xh{lrX$Wu(}12*86~b2D`wC7bZfaz
z#a0>L#H_b&Kc??zLl!RE(AmD>6>00*_O|u)65a3e5+8lvRb4K+^HJS8vXM@?D&4)h
Yb*aAg>FZWn?e?1Dwmc?5*SJ^w1#CDo=Kufz


From 15a1e717fb21616f7115eb3416ad7ece406d08c1 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Tue, 6 Jul 2021 23:12:41 +0200
Subject: [PATCH 082/214] Switch to tock-registers: Bump rust toolchain

---
 rust-toolchain | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rust-toolchain b/rust-toolchain
index 268f9495a..70934f67f 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1,4 +1,4 @@
 [toolchain]
-channel = "nightly-2021-04-25"
+channel = "nightly-2021-07-01"
 components = ["llvm-tools-preview"]
 targets = ["aarch64-unknown-none-softfloat"]

From de3ba3e871d57ae6b6c0776292a22b6bb1d110ee Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 12 Jul 2021 22:08:22 +0200
Subject: [PATCH 083/214] Refactor Tests and Makefile

- Carve out common files for tests
- Add boot tests starting tutorial 3
- Overhaul the Makefile for more structure
---
 .githooks/pre-commit                          |   3 +-
 01_wait_forever/Makefile                      |  81 ++-
 02_runtime_init/Makefile                      |  81 ++-
 02_runtime_init/README.md                     |   4 +-
 03_hacky_hello_world/Makefile                 | 109 +++-
 03_hacky_hello_world/README.md                |  70 ++-
 .../tests/boot_test_string.rb                 |   3 +
 04_safe_globals/Makefile                      | 109 +++-
 04_safe_globals/tests/boot_test_string.rb     |   3 +
 05_drivers_gpio_uart/Makefile                 | 124 +++-
 05_drivers_gpio_uart/README.md                |  66 ++-
 .../tests/boot_test_string.rb                 |   3 +
 06_uart_chainloader/Makefile                  | 181 ++++--
 06_uart_chainloader/README.md                 | 235 +++++---
 06_uart_chainloader/tests/chainboot_test.rb   |  80 +++
 06_uart_chainloader/tests/qemu_minipush.rb    |  80 ---
 07_timestamps/Makefile                        | 125 +++-
 07_timestamps/README.md                       | 233 ++++----
 07_timestamps/tests/boot_test_string.rb       |   3 +
 08_hw_debug_JTAG/Makefile                     | 180 ++++--
 08_hw_debug_JTAG/README.md                    |  60 +-
 08_hw_debug_JTAG/tests/boot_test_string.rb    |   3 +
 09_privilege_level/Makefile                   | 180 ++++--
 09_privilege_level/README.md                  |   9 +
 09_privilege_level/tests/boot_test_string.rb  |   3 +
 .../Makefile                                  | 180 ++++--
 .../tests/boot_test_string.rb                 |   3 +
 11_exceptions_part1_groundwork/Makefile       | 180 ++++--
 11_exceptions_part1_groundwork/README.md      |   9 +
 .../tests/boot_test_string.rb                 |   3 +
 12_integrated_testing/Makefile                | 253 +++++---
 12_integrated_testing/README.md               | 555 ++++++++----------
 12_integrated_testing/src/lib.rs              |   3 +-
 12_integrated_testing/src/panic_wait.rs       |   4 +-
 .../tests/00_console_sanity.rb                |  13 +-
 .../tests/00_console_sanity.rs                |   9 +-
 .../tests/02_exception_sync_page_fault.rs     |   2 +-
 .../tests/boot_test_string.rb                 |   3 +
 12_integrated_testing/tests/runner.rb         | 143 -----
 13_exceptions_part2_peripheral_IRQs/Makefile  | 253 +++++---
 13_exceptions_part2_peripheral_IRQs/README.md |  13 +
 .../src/lib.rs                                |   3 +-
 .../src/panic_wait.rs                         |   4 +-
 .../tests/00_console_sanity.rb                |  13 +-
 .../tests/00_console_sanity.rs                |   9 +-
 .../tests/02_exception_sync_page_fault.rs     |   2 +-
 .../tests/boot_test_string.rb                 |   3 +
 .../tests/runner.rb                           | 143 -----
 14_virtual_mem_part2_mmio_remap/Makefile      | 253 +++++---
 14_virtual_mem_part2_mmio_remap/README.md     |   2 +-
 14_virtual_mem_part2_mmio_remap/src/lib.rs    |   3 +-
 .../src/panic_wait.rs                         |   4 +-
 .../tests/00_console_sanity.rb                |  13 +-
 .../tests/00_console_sanity.rs                |   9 +-
 .../tests/02_exception_sync_page_fault.rs     |   2 +-
 .../tests/boot_test_string.rb                 |   3 +
 .../tests/runner.rb                           | 143 -----
 .../Makefile                                  | 258 +++++---
 .../README.md                                 |  24 +-
 .../src/lib.rs                                |   3 +-
 .../src/panic_wait.rs                         |   4 +-
 .../tests/00_console_sanity.rb                |  13 +-
 .../tests/00_console_sanity.rs                |   9 +-
 .../tests/02_exception_sync_page_fault.rs     |   2 +-
 .../tests/boot_test_string.rb                 |   3 +
 .../tests/runner.rb                           | 143 -----
 .../Makefile                                  | 258 +++++---
 .../README.md                                 |   2 +-
 .../src/lib.rs                                |   3 +-
 .../src/panic_wait.rs                         |   4 +-
 .../tests/00_console_sanity.rb                |  13 +-
 .../tests/00_console_sanity.rs                |   9 +-
 .../tests/02_exception_sync_page_fault.rs     |   2 +-
 .../tests/boot_test_string.rb                 |   3 +
 .../tests/runner.rb                           | 143 -----
 X1_JTAG_boot/Makefile                         | 125 +++-
 X1_JTAG_boot/tests/boot_test_string.rb        |   3 +
 {utils => common}/color.mk.in                 |   0
 {utils => common/serial}/minipush.rb          |  33 +-
 .../serial}/minipush/progressbar_patch.rb     |   0
 {utils => common/serial}/miniterm.rb          |   3 +-
 common/tests/boot_test.rb                     |  75 +++
 common/tests/console_io_test.rb               |  48 ++
 common/tests/dispatch.rb                      |  35 ++
 common/tests/exit_code_test.rb                |  52 ++
 common/tests/test.rb                          |  82 +++
 devtool_completion.bash                       |   2 +-
 doc/12_demo.gif                               | Bin 0 -> 224703 bytes
 doc/13_demo.gif                               | Bin 441164 -> 0 bytes
 doc/demo_PS1.txt                              |   1 +
 utils/devtool.rb                              | 126 ++--
 utils/devtool/copyright.rb                    |   2 +
 utils/update_copyright.rb                     |   2 +
 93 files changed, 3558 insertions(+), 2190 deletions(-)
 create mode 100644 03_hacky_hello_world/tests/boot_test_string.rb
 create mode 100644 04_safe_globals/tests/boot_test_string.rb
 create mode 100644 05_drivers_gpio_uart/tests/boot_test_string.rb
 create mode 100644 06_uart_chainloader/tests/chainboot_test.rb
 delete mode 100644 06_uart_chainloader/tests/qemu_minipush.rb
 create mode 100644 07_timestamps/tests/boot_test_string.rb
 create mode 100644 08_hw_debug_JTAG/tests/boot_test_string.rb
 create mode 100644 09_privilege_level/tests/boot_test_string.rb
 create mode 100644 10_virtual_mem_part1_identity_mapping/tests/boot_test_string.rb
 create mode 100644 11_exceptions_part1_groundwork/tests/boot_test_string.rb
 create mode 100644 12_integrated_testing/tests/boot_test_string.rb
 delete mode 100755 12_integrated_testing/tests/runner.rb
 create mode 100644 13_exceptions_part2_peripheral_IRQs/tests/boot_test_string.rb
 delete mode 100755 13_exceptions_part2_peripheral_IRQs/tests/runner.rb
 create mode 100644 14_virtual_mem_part2_mmio_remap/tests/boot_test_string.rb
 delete mode 100755 14_virtual_mem_part2_mmio_remap/tests/runner.rb
 create mode 100644 15_virtual_mem_part3_precomputed_tables/tests/boot_test_string.rb
 delete mode 100755 15_virtual_mem_part3_precomputed_tables/tests/runner.rb
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/tests/boot_test_string.rb
 delete mode 100755 16_virtual_mem_part4_higher_half_kernel/tests/runner.rb
 create mode 100644 X1_JTAG_boot/tests/boot_test_string.rb
 rename {utils => common}/color.mk.in (100%)
 rename {utils => common/serial}/minipush.rb (83%)
 rename {utils => common/serial}/minipush/progressbar_patch.rb (100%)
 rename {utils => common/serial}/miniterm.rb (99%)
 create mode 100644 common/tests/boot_test.rb
 create mode 100644 common/tests/console_io_test.rb
 create mode 100755 common/tests/dispatch.rb
 create mode 100644 common/tests/exit_code_test.rb
 create mode 100644 common/tests/test.rb
 create mode 100644 doc/12_demo.gif
 delete mode 100644 doc/13_demo.gif
 create mode 100644 doc/demo_PS1.txt

diff --git a/.githooks/pre-commit b/.githooks/pre-commit
index 6636f0075..468906434 100755
--- a/.githooks/pre-commit
+++ b/.githooks/pre-commit
@@ -5,8 +5,6 @@
 #
 # Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-require 'rubygems'
-require 'bundler/setup'
 require_relative '../utils/devtool/copyright'
 
 def copyright_check(staged_files)
@@ -14,6 +12,7 @@ def copyright_check(staged_files)
 
     staged_files = staged_files.select do |f|
         next if f.include?('build.rs')
+        next if f.include?('boot_test_string.rb')
 
         f.include?('Makefile') ||
             f.include?('Dockerfile') ||
diff --git a/01_wait_forever/Makefile b/01_wait_forever/Makefile
index 2e44e7ac5..16607fe62 100644
--- a/01_wait_forever/Makefile
+++ b/01_wait_forever/Makefile
@@ -2,12 +2,22 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-include ../utils/color.mk.in
+include ../common/color.mk.in
 
-# Default to the RPi3
+##--------------------------------------------------------------------------------------------------
+## Optional, user-provided configuration values
+##--------------------------------------------------------------------------------------------------
+
+# Default to the RPi3.
 BSP ?= rpi3
 
-# BSP-specific arguments
+
+
+##--------------------------------------------------------------------------------------------------
+## Hardcoded configuration values
+##--------------------------------------------------------------------------------------------------
+
+# BSP-specific arguments.
 ifeq ($(BSP),rpi3)
     TARGET            = aarch64-unknown-none-softfloat
     KERNEL_BIN        = kernel8.img
@@ -32,11 +42,18 @@ else ifeq ($(BSP),rpi4)
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
-# Export for build.rs
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+
+# Export for build.rs.
 export LINKER_FILE
 
-QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+KERNEL_ELF = target/$(TARGET)/release/kernel
+
 
+
+##--------------------------------------------------------------------------------------------------
+## Command building blocks
+##--------------------------------------------------------------------------------------------------
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
@@ -53,61 +70,99 @@ OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
     -O binary
 
-KERNEL_ELF = target/$(TARGET)/release/kernel
+EXEC_QEMU = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
 
-DOCKER_IMAGE         = rustembedded/osdev-utils
-DOCKER_CMD           = docker run --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
-DOCKER_CMD_INTERACT  = $(DOCKER_CMD) -i -t
+##------------------------------------------------------------------------------
+## Dockerization
+##------------------------------------------------------------------------------
+DOCKER_IMAGE        = rustembedded/osdev-utils
+DOCKER_CMD          = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
+DOCKER_CMD_INTERACT = $(DOCKER_CMD) -i
 
 DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
 DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 
-EXEC_QEMU = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
 
+
+##--------------------------------------------------------------------------------------------------
+## Targets
+##--------------------------------------------------------------------------------------------------
 .PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu clippy clean readelf objdump nm check
 
 all: $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Build the kernel ELF
+##------------------------------------------------------------------------------
 $(KERNEL_ELF):
 	$(call colorecho, "\nCompiling kernel - $(BSP)")
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
+##------------------------------------------------------------------------------
+## Build the stripped kernel binary
+##------------------------------------------------------------------------------
 $(KERNEL_BIN): $(KERNEL_ELF)
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Build the documentation
+##------------------------------------------------------------------------------
 doc:
 	$(call colorecho, "\nGenerating docs")
 	@$(DOC_CMD) --document-private-items --open
 
-ifeq ($(QEMU_MACHINE_TYPE),)
+##------------------------------------------------------------------------------
+## Run the kernel in QEMU
+##------------------------------------------------------------------------------
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
 qemu:
 	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
-else
+
+else # QEMU is supported.
+
 qemu: $(KERNEL_BIN)
 	$(call colorecho, "\nLaunching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 endif
 
+##------------------------------------------------------------------------------
+## Run clippy
+##------------------------------------------------------------------------------
 clippy:
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
+##------------------------------------------------------------------------------
+## Clean
+##------------------------------------------------------------------------------
 clean:
 	rm -rf target $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Run readelf
+##------------------------------------------------------------------------------
 readelf: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching readelf")
 	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
+##------------------------------------------------------------------------------
+## Run objdump
+##------------------------------------------------------------------------------
 objdump: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching objdump")
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 $(KERNEL_ELF) | rustfilt
 
+##------------------------------------------------------------------------------
+## Run nm
+##------------------------------------------------------------------------------
 nm: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
-# For rust-analyzer
+##------------------------------------------------------------------------------
+## Helper target for rust-analyzer
+##------------------------------------------------------------------------------
 check:
 	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
diff --git a/02_runtime_init/Makefile b/02_runtime_init/Makefile
index a20b283b4..ea979232c 100644
--- a/02_runtime_init/Makefile
+++ b/02_runtime_init/Makefile
@@ -2,12 +2,22 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-include ../utils/color.mk.in
+include ../common/color.mk.in
 
-# Default to the RPi3
+##--------------------------------------------------------------------------------------------------
+## Optional, user-provided configuration values
+##--------------------------------------------------------------------------------------------------
+
+# Default to the RPi3.
 BSP ?= rpi3
 
-# BSP-specific arguments
+
+
+##--------------------------------------------------------------------------------------------------
+## Hardcoded configuration values
+##--------------------------------------------------------------------------------------------------
+
+# BSP-specific arguments.
 ifeq ($(BSP),rpi3)
     TARGET            = aarch64-unknown-none-softfloat
     KERNEL_BIN        = kernel8.img
@@ -32,11 +42,18 @@ else ifeq ($(BSP),rpi4)
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
-# Export for build.rs
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+
+# Export for build.rs.
 export LINKER_FILE
 
-QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+KERNEL_ELF = target/$(TARGET)/release/kernel
+
 
+
+##--------------------------------------------------------------------------------------------------
+## Command building blocks
+##--------------------------------------------------------------------------------------------------
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
@@ -53,51 +70,84 @@ OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
     -O binary
 
-KERNEL_ELF = target/$(TARGET)/release/kernel
+EXEC_QEMU = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
 
-DOCKER_IMAGE         = rustembedded/osdev-utils
-DOCKER_CMD           = docker run --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
-DOCKER_CMD_INTERACT  = $(DOCKER_CMD) -i -t
+##------------------------------------------------------------------------------
+## Dockerization
+##------------------------------------------------------------------------------
+DOCKER_IMAGE        = rustembedded/osdev-utils
+DOCKER_CMD          = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
+DOCKER_CMD_INTERACT = $(DOCKER_CMD) -i
 
 DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
 DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 
-EXEC_QEMU = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
 
+
+##--------------------------------------------------------------------------------------------------
+## Targets
+##--------------------------------------------------------------------------------------------------
 .PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu clippy clean readelf objdump nm check
 
 all: $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Build the kernel ELF
+##------------------------------------------------------------------------------
 $(KERNEL_ELF):
 	$(call colorecho, "\nCompiling kernel - $(BSP)")
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
+##------------------------------------------------------------------------------
+## Build the stripped kernel binary
+##------------------------------------------------------------------------------
 $(KERNEL_BIN): $(KERNEL_ELF)
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Build the documentation
+##------------------------------------------------------------------------------
 doc:
 	$(call colorecho, "\nGenerating docs")
 	@$(DOC_CMD) --document-private-items --open
 
-ifeq ($(QEMU_MACHINE_TYPE),)
+##------------------------------------------------------------------------------
+## Run the kernel in QEMU
+##------------------------------------------------------------------------------
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
 qemu:
 	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
-else
+
+else # QEMU is supported.
+
 qemu: $(KERNEL_BIN)
 	$(call colorecho, "\nLaunching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 endif
 
+##------------------------------------------------------------------------------
+## Run clippy
+##------------------------------------------------------------------------------
 clippy:
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
+##------------------------------------------------------------------------------
+## Clean
+##------------------------------------------------------------------------------
 clean:
 	rm -rf target $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Run readelf
+##------------------------------------------------------------------------------
 readelf: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching readelf")
 	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
+##------------------------------------------------------------------------------
+## Run objdump
+##------------------------------------------------------------------------------
 objdump: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching objdump")
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
@@ -106,10 +156,15 @@ objdump: $(KERNEL_ELF)
                 --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
+##------------------------------------------------------------------------------
+## Run nm
+##------------------------------------------------------------------------------
 nm: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
-# For rust-analyzer
+##------------------------------------------------------------------------------
+## Helper target for rust-analyzer
+##------------------------------------------------------------------------------
 check:
 	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
diff --git a/02_runtime_init/README.md b/02_runtime_init/README.md
index 11ad00cc9..d37b3c9f9 100644
--- a/02_runtime_init/README.md
+++ b/02_runtime_init/README.md
@@ -53,7 +53,7 @@ diff -uNr 01_wait_forever/Cargo.toml 02_runtime_init/Cargo.toml
 diff -uNr 01_wait_forever/Makefile 02_runtime_init/Makefile
 --- 01_wait_forever/Makefile
 +++ 02_runtime_init/Makefile
-@@ -102,6 +102,8 @@
+@@ -152,6 +152,8 @@
  	$(call colorecho, "\nLaunching objdump")
  	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                  --section .text   \
@@ -61,7 +61,7 @@ diff -uNr 01_wait_forever/Makefile 02_runtime_init/Makefile
 +                --section .got    \
                  $(KERNEL_ELF) | rustfilt
 
- nm: $(KERNEL_ELF)
+ ##------------------------------------------------------------------------------
 
 diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.rs 02_runtime_init/src/_arch/aarch64/cpu/boot.rs
 --- 01_wait_forever/src/_arch/aarch64/cpu/boot.rs
diff --git a/03_hacky_hello_world/Makefile b/03_hacky_hello_world/Makefile
index 2ed82a5f1..19e50b332 100644
--- a/03_hacky_hello_world/Makefile
+++ b/03_hacky_hello_world/Makefile
@@ -2,12 +2,22 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-include ../utils/color.mk.in
+include ../common/color.mk.in
 
-# Default to the RPi3
+##--------------------------------------------------------------------------------------------------
+## Optional, user-provided configuration values
+##--------------------------------------------------------------------------------------------------
+
+# Default to the RPi3.
 BSP ?= rpi3
 
-# BSP-specific arguments
+
+
+##--------------------------------------------------------------------------------------------------
+## Hardcoded configuration values
+##--------------------------------------------------------------------------------------------------
+
+# BSP-specific arguments.
 ifeq ($(BSP),rpi3)
     TARGET            = aarch64-unknown-none-softfloat
     KERNEL_BIN        = kernel8.img
@@ -32,11 +42,18 @@ else ifeq ($(BSP),rpi4)
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
-# Export for build.rs
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+
+# Export for build.rs.
 export LINKER_FILE
 
-QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+KERNEL_ELF = target/$(TARGET)/release/kernel
+
+
 
+##--------------------------------------------------------------------------------------------------
+## Command building blocks
+##--------------------------------------------------------------------------------------------------
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
@@ -53,51 +70,87 @@ OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
     -O binary
 
-KERNEL_ELF = target/$(TARGET)/release/kernel
+EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
+EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
 
-DOCKER_IMAGE         = rustembedded/osdev-utils
-DOCKER_CMD           = docker run --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
-DOCKER_CMD_INTERACT  = $(DOCKER_CMD) -i -t
+##------------------------------------------------------------------------------
+## Dockerization
+##------------------------------------------------------------------------------
+DOCKER_IMAGE          = rustembedded/osdev-utils
+DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
+DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
+DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
 
 DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
 DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
+
 
-EXEC_QEMU = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
 
+##--------------------------------------------------------------------------------------------------
+## Targets
+##--------------------------------------------------------------------------------------------------
 .PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu clippy clean readelf objdump nm check
 
 all: $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Build the kernel ELF
+##------------------------------------------------------------------------------
 $(KERNEL_ELF):
 	$(call colorecho, "\nCompiling kernel - $(BSP)")
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
+##------------------------------------------------------------------------------
+## Build the stripped kernel binary
+##------------------------------------------------------------------------------
 $(KERNEL_BIN): $(KERNEL_ELF)
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Build the documentation
+##------------------------------------------------------------------------------
 doc:
 	$(call colorecho, "\nGenerating docs")
 	@$(DOC_CMD) --document-private-items --open
 
-ifeq ($(QEMU_MACHINE_TYPE),)
+##------------------------------------------------------------------------------
+## Run the kernel in QEMU
+##------------------------------------------------------------------------------
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
 qemu:
 	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
-else
+
+else # QEMU is supported.
+
 qemu: $(KERNEL_BIN)
 	$(call colorecho, "\nLaunching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 endif
 
+##------------------------------------------------------------------------------
+## Run clippy
+##------------------------------------------------------------------------------
 clippy:
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
+##------------------------------------------------------------------------------
+## Clean
+##------------------------------------------------------------------------------
 clean:
 	rm -rf target $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Run readelf
+##------------------------------------------------------------------------------
 readelf: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching readelf")
 	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
+##------------------------------------------------------------------------------
+## Run objdump
+##------------------------------------------------------------------------------
 objdump: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching objdump")
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
@@ -106,10 +159,40 @@ objdump: $(KERNEL_ELF)
                 --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
+##------------------------------------------------------------------------------
+## Run nm
+##------------------------------------------------------------------------------
 nm: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
-# For rust-analyzer
+##------------------------------------------------------------------------------
+## Helper target for rust-analyzer
+##------------------------------------------------------------------------------
 check:
 	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Testing targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: test test_boot
+
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
+test_boot test :
+	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+
+else # QEMU is supported.
+
+##------------------------------------------------------------------------------
+## Run boot test
+##------------------------------------------------------------------------------
+test_boot: $(KERNEL_BIN)
+	$(call colorecho, "\nBoot test - $(BSP)")
+	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
+
+test: test_boot
+
+endif
diff --git a/03_hacky_hello_world/README.md b/03_hacky_hello_world/README.md
index 01bbf54cb..ce262bc98 100644
--- a/03_hacky_hello_world/README.md
+++ b/03_hacky_hello_world/README.md
@@ -12,6 +12,10 @@
 - `src/console.rs` introduces interface `Traits` for console commands.
 - `src/bsp/raspberrypi/console.rs` implements the interface for QEMU's emulated UART.
 - The panic handler makes use of the new `print!()` to display user error messages.
+- There is a new Makefile target, `make test`, intended for automated testing. It boots the compiled
+  kernel in `QEMU`, and checks for an expected output string produced by the kernel.
+    - In this tutorial, it checks for the string `Stopping here`, which is emitted by the `panic!()`
+      at the end of `main.rs`.
 
 ## Test it
 
@@ -43,7 +47,7 @@ diff -uNr 02_runtime_init/Cargo.toml 03_hacky_hello_world/Cargo.toml
 diff -uNr 02_runtime_init/Makefile 03_hacky_hello_world/Makefile
 --- 02_runtime_init/Makefile
 +++ 03_hacky_hello_world/Makefile
-@@ -13,7 +13,7 @@
+@@ -23,7 +23,7 @@
      KERNEL_BIN        = kernel8.img
      QEMU_BINARY       = qemu-system-aarch64
      QEMU_MACHINE_TYPE = raspi3
@@ -52,7 +56,7 @@ diff -uNr 02_runtime_init/Makefile 03_hacky_hello_world/Makefile
      OBJDUMP_BINARY    = aarch64-none-elf-objdump
      NM_BINARY         = aarch64-none-elf-nm
      READELF_BINARY    = aarch64-none-elf-readelf
-@@ -24,7 +24,7 @@
+@@ -34,7 +34,7 @@
      KERNEL_BIN        = kernel8.img
      QEMU_BINARY       = qemu-system-aarch64
      QEMU_MACHINE_TYPE =
@@ -61,6 +65,60 @@ diff -uNr 02_runtime_init/Makefile 03_hacky_hello_world/Makefile
      OBJDUMP_BINARY    = aarch64-none-elf-objdump
      NM_BINARY         = aarch64-none-elf-nm
      READELF_BINARY    = aarch64-none-elf-readelf
+@@ -70,17 +70,20 @@
+     --strip-all            \
+     -O binary
+
+-EXEC_QEMU = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
++EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
++EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
+
+ ##------------------------------------------------------------------------------
+ ## Dockerization
+ ##------------------------------------------------------------------------------
+-DOCKER_IMAGE        = rustembedded/osdev-utils
+-DOCKER_CMD          = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
+-DOCKER_CMD_INTERACT = $(DOCKER_CMD) -i
++DOCKER_IMAGE          = rustembedded/osdev-utils
++DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
++DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
++DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
+
+ DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
+ DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
++DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
+
+
+
+@@ -168,3 +171,28 @@
+ ##------------------------------------------------------------------------------
+ check:
+ 	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
++
++
++
++##--------------------------------------------------------------------------------------------------
++## Testing targets
++##--------------------------------------------------------------------------------------------------
++.PHONY: test test_boot
++
++ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
++
++test_boot test :
++	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
++
++else # QEMU is supported.
++
++##------------------------------------------------------------------------------
++## Run boot test
++##------------------------------------------------------------------------------
++test_boot: $(KERNEL_BIN)
++	$(call colorecho, "\nBoot test - $(BSP)")
++	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
++
++test: test_boot
++
++endif
 
 diff -uNr 02_runtime_init/src/bsp/raspberrypi/console.rs 03_hacky_hello_world/src/bsp/raspberrypi/console.rs
 --- 02_runtime_init/src/bsp/raspberrypi/console.rs
@@ -245,4 +303,12 @@ diff -uNr 02_runtime_init/src/print.rs 03_hacky_hello_world/src/print.rs
 +    })
 +}
 
+diff -uNr 02_runtime_init/tests/boot_test_string.rb 03_hacky_hello_world/tests/boot_test_string.rb
+--- 02_runtime_init/tests/boot_test_string.rb
++++ 03_hacky_hello_world/tests/boot_test_string.rb
+@@ -0,0 +1,3 @@
++# frozen_string_literal: true
++
++EXPECTED_PRINT = 'Stopping here'
+
 ```
diff --git a/03_hacky_hello_world/tests/boot_test_string.rb b/03_hacky_hello_world/tests/boot_test_string.rb
new file mode 100644
index 000000000..b0c595368
--- /dev/null
+++ b/03_hacky_hello_world/tests/boot_test_string.rb
@@ -0,0 +1,3 @@
+# frozen_string_literal: true
+
+EXPECTED_PRINT = 'Stopping here'
diff --git a/04_safe_globals/Makefile b/04_safe_globals/Makefile
index 2ed82a5f1..19e50b332 100644
--- a/04_safe_globals/Makefile
+++ b/04_safe_globals/Makefile
@@ -2,12 +2,22 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-include ../utils/color.mk.in
+include ../common/color.mk.in
 
-# Default to the RPi3
+##--------------------------------------------------------------------------------------------------
+## Optional, user-provided configuration values
+##--------------------------------------------------------------------------------------------------
+
+# Default to the RPi3.
 BSP ?= rpi3
 
-# BSP-specific arguments
+
+
+##--------------------------------------------------------------------------------------------------
+## Hardcoded configuration values
+##--------------------------------------------------------------------------------------------------
+
+# BSP-specific arguments.
 ifeq ($(BSP),rpi3)
     TARGET            = aarch64-unknown-none-softfloat
     KERNEL_BIN        = kernel8.img
@@ -32,11 +42,18 @@ else ifeq ($(BSP),rpi4)
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
-# Export for build.rs
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+
+# Export for build.rs.
 export LINKER_FILE
 
-QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+KERNEL_ELF = target/$(TARGET)/release/kernel
+
+
 
+##--------------------------------------------------------------------------------------------------
+## Command building blocks
+##--------------------------------------------------------------------------------------------------
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
@@ -53,51 +70,87 @@ OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
     -O binary
 
-KERNEL_ELF = target/$(TARGET)/release/kernel
+EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
+EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
 
-DOCKER_IMAGE         = rustembedded/osdev-utils
-DOCKER_CMD           = docker run --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
-DOCKER_CMD_INTERACT  = $(DOCKER_CMD) -i -t
+##------------------------------------------------------------------------------
+## Dockerization
+##------------------------------------------------------------------------------
+DOCKER_IMAGE          = rustembedded/osdev-utils
+DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
+DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
+DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
 
 DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
 DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
+
 
-EXEC_QEMU = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
 
+##--------------------------------------------------------------------------------------------------
+## Targets
+##--------------------------------------------------------------------------------------------------
 .PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu clippy clean readelf objdump nm check
 
 all: $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Build the kernel ELF
+##------------------------------------------------------------------------------
 $(KERNEL_ELF):
 	$(call colorecho, "\nCompiling kernel - $(BSP)")
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
+##------------------------------------------------------------------------------
+## Build the stripped kernel binary
+##------------------------------------------------------------------------------
 $(KERNEL_BIN): $(KERNEL_ELF)
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Build the documentation
+##------------------------------------------------------------------------------
 doc:
 	$(call colorecho, "\nGenerating docs")
 	@$(DOC_CMD) --document-private-items --open
 
-ifeq ($(QEMU_MACHINE_TYPE),)
+##------------------------------------------------------------------------------
+## Run the kernel in QEMU
+##------------------------------------------------------------------------------
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
 qemu:
 	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
-else
+
+else # QEMU is supported.
+
 qemu: $(KERNEL_BIN)
 	$(call colorecho, "\nLaunching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 endif
 
+##------------------------------------------------------------------------------
+## Run clippy
+##------------------------------------------------------------------------------
 clippy:
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
+##------------------------------------------------------------------------------
+## Clean
+##------------------------------------------------------------------------------
 clean:
 	rm -rf target $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Run readelf
+##------------------------------------------------------------------------------
 readelf: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching readelf")
 	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
+##------------------------------------------------------------------------------
+## Run objdump
+##------------------------------------------------------------------------------
 objdump: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching objdump")
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
@@ -106,10 +159,40 @@ objdump: $(KERNEL_ELF)
                 --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
+##------------------------------------------------------------------------------
+## Run nm
+##------------------------------------------------------------------------------
 nm: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
-# For rust-analyzer
+##------------------------------------------------------------------------------
+## Helper target for rust-analyzer
+##------------------------------------------------------------------------------
 check:
 	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Testing targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: test test_boot
+
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
+test_boot test :
+	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+
+else # QEMU is supported.
+
+##------------------------------------------------------------------------------
+## Run boot test
+##------------------------------------------------------------------------------
+test_boot: $(KERNEL_BIN)
+	$(call colorecho, "\nBoot test - $(BSP)")
+	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
+
+test: test_boot
+
+endif
diff --git a/04_safe_globals/tests/boot_test_string.rb b/04_safe_globals/tests/boot_test_string.rb
new file mode 100644
index 000000000..b0c595368
--- /dev/null
+++ b/04_safe_globals/tests/boot_test_string.rb
@@ -0,0 +1,3 @@
+# frozen_string_literal: true
+
+EXPECTED_PRINT = 'Stopping here'
diff --git a/05_drivers_gpio_uart/Makefile b/05_drivers_gpio_uart/Makefile
index 1dd6cc2b9..c38e049eb 100644
--- a/05_drivers_gpio_uart/Makefile
+++ b/05_drivers_gpio_uart/Makefile
@@ -2,18 +2,25 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-include ../utils/color.mk.in
+include ../common/color.mk.in
 
-# Default to the RPi3
+##--------------------------------------------------------------------------------------------------
+## Optional, user-provided configuration values
+##--------------------------------------------------------------------------------------------------
+
+# Default to the RPi3.
 BSP ?= rpi3
 
 # Default to a serial device name that is common in Linux.
 DEV_SERIAL ?= /dev/ttyUSB0
 
-# Query the host system's kernel name
-UNAME_S = $(shell uname -s)
 
-# BSP-specific arguments
+
+##--------------------------------------------------------------------------------------------------
+## Hardcoded configuration values
+##--------------------------------------------------------------------------------------------------
+
+# BSP-specific arguments.
 ifeq ($(BSP),rpi3)
     TARGET            = aarch64-unknown-none-softfloat
     KERNEL_BIN        = kernel8.img
@@ -38,11 +45,18 @@ else ifeq ($(BSP),rpi4)
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
-# Export for build.rs
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+
+# Export for build.rs.
 export LINKER_FILE
 
-QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+KERNEL_ELF = target/$(TARGET)/release/kernel
 
+
+
+##--------------------------------------------------------------------------------------------------
+## Command building blocks
+##--------------------------------------------------------------------------------------------------
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
@@ -59,64 +73,102 @@ OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
     -O binary
 
-KERNEL_ELF = target/$(TARGET)/release/kernel
+EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
+EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
+EXEC_MINITERM      = ruby ../common/serial/miniterm.rb
 
-DOCKER_IMAGE         = rustembedded/osdev-utils
-DOCKER_CMD           = docker run --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
-DOCKER_CMD_INTERACT  = $(DOCKER_CMD) -i -t
-DOCKER_ARG_DIR_UTILS = -v $(shell pwd)/../utils:/work/utils
-DOCKER_ARG_DEV       = --privileged -v /dev:/dev
+##------------------------------------------------------------------------------
+## Dockerization
+##------------------------------------------------------------------------------
+DOCKER_IMAGE          = rustembedded/osdev-utils
+DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
+DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
+DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
+DOCKER_ARG_DEV        = --privileged -v /dev:/dev
 
 DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
 DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
 
-# Dockerize commands that require USB device passthrough only on Linux
-ifeq ($(UNAME_S),Linux)
+# Dockerize commands, which require USB device passthrough, only on Linux.
+ifeq ($(shell uname -s),Linux)
     DOCKER_CMD_DEV = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DEV)
 
-    DOCKER_MINITERM = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_IMAGE)
+    DOCKER_MINITERM = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
 endif
 
-EXEC_QEMU     = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
-EXEC_MINITERM = ruby ../utils/miniterm.rb
 
+
+##--------------------------------------------------------------------------------------------------
+## Targets
+##--------------------------------------------------------------------------------------------------
 .PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu miniterm clippy clean readelf objdump nm check
 
 all: $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Build the kernel ELF
+##------------------------------------------------------------------------------
 $(KERNEL_ELF):
 	$(call colorecho, "\nCompiling kernel - $(BSP)")
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
+##------------------------------------------------------------------------------
+## Build the stripped kernel binary
+##------------------------------------------------------------------------------
 $(KERNEL_BIN): $(KERNEL_ELF)
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Build the documentation
+##------------------------------------------------------------------------------
 doc:
 	$(call colorecho, "\nGenerating docs")
 	@$(DOC_CMD) --document-private-items --open
 
-ifeq ($(QEMU_MACHINE_TYPE),)
+##------------------------------------------------------------------------------
+## Run the kernel in QEMU
+##------------------------------------------------------------------------------
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
 qemu:
 	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
-else
+
+else # QEMU is supported.
+
 qemu: $(KERNEL_BIN)
 	$(call colorecho, "\nLaunching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 endif
 
+##------------------------------------------------------------------------------
+## Connect to the target's serial
+##------------------------------------------------------------------------------
 miniterm:
 	@$(DOCKER_MINITERM) $(EXEC_MINITERM) $(DEV_SERIAL)
 
+##------------------------------------------------------------------------------
+## Run clippy
+##------------------------------------------------------------------------------
 clippy:
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
+##------------------------------------------------------------------------------
+## Clean
+##------------------------------------------------------------------------------
 clean:
 	rm -rf target $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Run readelf
+##------------------------------------------------------------------------------
 readelf: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching readelf")
 	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
+##------------------------------------------------------------------------------
+## Run objdump
+##------------------------------------------------------------------------------
 objdump: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching objdump")
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
@@ -125,10 +177,40 @@ objdump: $(KERNEL_ELF)
                 --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
+##------------------------------------------------------------------------------
+## Run nm
+##------------------------------------------------------------------------------
 nm: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
-# For rust-analyzer
+##------------------------------------------------------------------------------
+## Helper target for rust-analyzer
+##------------------------------------------------------------------------------
 check:
 	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Testing targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: test test_boot
+
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
+test_boot test :
+	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+
+else # QEMU is supported.
+
+##------------------------------------------------------------------------------
+## Run boot test
+##------------------------------------------------------------------------------
+test_boot: $(KERNEL_BIN)
+	$(call colorecho, "\nBoot test - $(BSP)")
+	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
+
+test: test_boot
+
+endif
diff --git a/05_drivers_gpio_uart/README.md b/05_drivers_gpio_uart/README.md
index 7f0bbda5b..2ee89aa6d 100644
--- a/05_drivers_gpio_uart/README.md
+++ b/05_drivers_gpio_uart/README.md
@@ -145,55 +145,64 @@ diff -uNr 04_safe_globals/Cargo.toml 05_drivers_gpio_uart/Cargo.toml
 diff -uNr 04_safe_globals/Makefile 05_drivers_gpio_uart/Makefile
 --- 04_safe_globals/Makefile
 +++ 05_drivers_gpio_uart/Makefile
-@@ -7,6 +7,12 @@
- # Default to the RPi3
+@@ -11,6 +11,9 @@
+ # Default to the RPi3.
  BSP ?= rpi3
 
 +# Default to a serial device name that is common in Linux.
 +DEV_SERIAL ?= /dev/ttyUSB0
 +
-+# Query the host system's kernel name
-+UNAME_S = $(shell uname -s)
-+
- # BSP-specific arguments
- ifeq ($(BSP),rpi3)
-     TARGET            = aarch64-unknown-none-softfloat
-@@ -58,13 +64,23 @@
- DOCKER_IMAGE         = rustembedded/osdev-utils
- DOCKER_CMD           = docker run --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
- DOCKER_CMD_INTERACT  = $(DOCKER_CMD) -i -t
-+DOCKER_ARG_DIR_UTILS = -v $(shell pwd)/../utils:/work/utils
-+DOCKER_ARG_DEV       = --privileged -v /dev:/dev
+
+
+ ##--------------------------------------------------------------------------------------------------
+@@ -72,6 +75,7 @@
+
+ EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
+ EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
++EXEC_MINITERM      = ruby ../common/serial/miniterm.rb
+
+ ##------------------------------------------------------------------------------
+ ## Dockerization
+@@ -80,17 +84,25 @@
+ DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
+ DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
+ DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
++DOCKER_ARG_DEV        = --privileged -v /dev:/dev
 
  DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
  DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+ DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
 
--EXEC_QEMU = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
-+# Dockerize commands that require USB device passthrough only on Linux
-+ifeq ($(UNAME_S),Linux)
++# Dockerize commands, which require USB device passthrough, only on Linux.
++ifeq ($(shell uname -s),Linux)
 +    DOCKER_CMD_DEV = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DEV)
 +
-+    DOCKER_MINITERM = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_IMAGE)
++    DOCKER_MINITERM = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
 +endif
 +
-+EXEC_QEMU     = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
-+EXEC_MINITERM = ruby ../utils/miniterm.rb
 
+
+ ##--------------------------------------------------------------------------------------------------
+ ## Targets
+ ##--------------------------------------------------------------------------------------------------
 -.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu clippy clean readelf objdump nm check
 +.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu miniterm clippy clean readelf objdump nm check
 
  all: $(KERNEL_BIN)
 
-@@ -88,6 +104,9 @@
- 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
+@@ -130,6 +142,12 @@
  endif
 
+ ##------------------------------------------------------------------------------
++## Connect to the target's serial
++##------------------------------------------------------------------------------
 +miniterm:
 +	@$(DOCKER_MINITERM) $(EXEC_MINITERM) $(DEV_SERIAL)
 +
++##------------------------------------------------------------------------------
+ ## Run clippy
+ ##------------------------------------------------------------------------------
  clippy:
- 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
-
 
 diff -uNr 04_safe_globals/src/_arch/aarch64/cpu.rs 05_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
 --- 04_safe_globals/src/_arch/aarch64/cpu.rs
@@ -1451,4 +1460,13 @@ diff -uNr 04_safe_globals/src/panic_wait.rs 05_drivers_gpio_uart/src/panic_wait.
 
      cpu::wait_forever()
 
+diff -uNr 04_safe_globals/tests/boot_test_string.rb 05_drivers_gpio_uart/tests/boot_test_string.rb
+--- 04_safe_globals/tests/boot_test_string.rb
++++ 05_drivers_gpio_uart/tests/boot_test_string.rb
+@@ -1,3 +1,3 @@
+ # frozen_string_literal: true
+
+-EXPECTED_PRINT = 'Stopping here'
++EXPECTED_PRINT = 'Echoing input now'
+
 ```
diff --git a/05_drivers_gpio_uart/tests/boot_test_string.rb b/05_drivers_gpio_uart/tests/boot_test_string.rb
new file mode 100644
index 000000000..f778b3d8c
--- /dev/null
+++ b/05_drivers_gpio_uart/tests/boot_test_string.rb
@@ -0,0 +1,3 @@
+# frozen_string_literal: true
+
+EXPECTED_PRINT = 'Echoing input now'
diff --git a/06_uart_chainloader/Makefile b/06_uart_chainloader/Makefile
index a8d38ffca..3064e67a0 100644
--- a/06_uart_chainloader/Makefile
+++ b/06_uart_chainloader/Makefile
@@ -2,49 +2,63 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-include ../utils/color.mk.in
+include ../common/color.mk.in
 
-# Default to the RPi3
+##--------------------------------------------------------------------------------------------------
+## Optional, user-provided configuration values
+##--------------------------------------------------------------------------------------------------
+
+# Default to the RPi3.
 BSP ?= rpi3
 
 # Default to a serial device name that is common in Linux.
 DEV_SERIAL ?= /dev/ttyUSB0
 
-# Query the host system's kernel name
-UNAME_S = $(shell uname -s)
 
-# BSP-specific arguments
+
+##--------------------------------------------------------------------------------------------------
+## Hardcoded configuration values
+##--------------------------------------------------------------------------------------------------
+
+# BSP-specific arguments.
 ifeq ($(BSP),rpi3)
-    TARGET            = aarch64-unknown-none-softfloat
-    KERNEL_BIN        = kernel8.img
-    QEMU_BINARY       = qemu-system-aarch64
-    QEMU_MACHINE_TYPE = raspi3
-    QEMU_RELEASE_ARGS = -serial stdio -display none
-    OBJDUMP_BINARY    = aarch64-none-elf-objdump
-    NM_BINARY         = aarch64-none-elf-nm
-    READELF_BINARY    = aarch64-none-elf-readelf
-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
-    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
+    TARGET                 = aarch64-unknown-none-softfloat
+    KERNEL_BIN             = kernel8.img
+    QEMU_BINARY            = qemu-system-aarch64
+    QEMU_MACHINE_TYPE      = raspi3
+    QEMU_RELEASE_ARGS      = -serial stdio -display none
+    OBJDUMP_BINARY         = aarch64-none-elf-objdump
+    NM_BINARY              = aarch64-none-elf-nm
+    READELF_BINARY         = aarch64-none-elf-readelf
+    LINKER_FILE            = src/bsp/raspberrypi/link.ld
+    RUSTC_MISC_ARGS        = -C target-cpu=cortex-a53
     CHAINBOOT_DEMO_PAYLOAD = demo_payload_rpi3.img
 else ifeq ($(BSP),rpi4)
-    TARGET            = aarch64-unknown-none-softfloat
-    KERNEL_BIN        = kernel8.img
-    QEMU_BINARY       = qemu-system-aarch64
-    QEMU_MACHINE_TYPE =
-    QEMU_RELEASE_ARGS = -serial stdio -display none
-    OBJDUMP_BINARY    = aarch64-none-elf-objdump
-    NM_BINARY         = aarch64-none-elf-nm
-    READELF_BINARY    = aarch64-none-elf-readelf
-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
-    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
+    TARGET                 = aarch64-unknown-none-softfloat
+    KERNEL_BIN             = kernel8.img
+    QEMU_BINARY            = qemu-system-aarch64
+    QEMU_MACHINE_TYPE      =
+    QEMU_RELEASE_ARGS      = -serial stdio -display none
+    OBJDUMP_BINARY         = aarch64-none-elf-objdump
+    NM_BINARY              = aarch64-none-elf-nm
+    READELF_BINARY         = aarch64-none-elf-readelf
+    LINKER_FILE            = src/bsp/raspberrypi/link.ld
+    RUSTC_MISC_ARGS        = -C target-cpu=cortex-a72
     CHAINBOOT_DEMO_PAYLOAD = demo_payload_rpi4.img
 endif
 
-# Export for build.rs
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+
+# Export for build.rs.
 export LINKER_FILE
 
-QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+KERNEL_ELF = target/$(TARGET)/release/kernel
+
 
+
+##--------------------------------------------------------------------------------------------------
+## Command building blocks
+##--------------------------------------------------------------------------------------------------
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
@@ -61,49 +75,69 @@ OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
     -O binary
 
-KERNEL_ELF = target/$(TARGET)/release/kernel
-
-DOCKER_IMAGE         = rustembedded/osdev-utils
-DOCKER_CMD           = docker run --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
-DOCKER_CMD_INTERACT  = $(DOCKER_CMD) -i -t
-DOCKER_ARG_DIR_UTILS = -v $(shell pwd)/../utils:/work/utils
-DOCKER_ARG_DEV       = --privileged -v /dev:/dev
+EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
+EXEC_TEST_MINIPUSH = ruby tests/chainboot_test.rb
+EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
+
+##------------------------------------------------------------------------------
+## Dockerization
+##------------------------------------------------------------------------------
+DOCKER_IMAGE          = rustembedded/osdev-utils
+DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
+DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
+DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
+DOCKER_ARG_DEV        = --privileged -v /dev:/dev
 
 DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
-DOCKER_TEST  = $(DOCKER_CMD) -t $(DOCKER_ARG_DIR_UTILS) $(DOCKER_IMAGE)
 DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
 
-# Dockerize commands that require USB device passthrough only on Linux
-ifeq ($(UNAME_S),Linux)
+# Dockerize commands, which require USB device passthrough, only on Linux.
+ifeq ($(shell uname -s),Linux)
     DOCKER_CMD_DEV = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DEV)
 
-    DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_IMAGE)
+    DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
 endif
 
-EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
-EXEC_MINIPUSH      = ruby ../utils/minipush.rb
-EXEC_QEMU_MINIPUSH = ruby tests/qemu_minipush.rb
 
-.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu qemuasm chainboot clippy clean readelf objdump nm \
-    check
+
+##--------------------------------------------------------------------------------------------------
+## Targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu chainboot clippy clean readelf objdump nm check
 
 all: $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Build the kernel ELF
+##------------------------------------------------------------------------------
 $(KERNEL_ELF):
 	$(call colorecho, "\nCompiling kernel - $(BSP)")
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
+##------------------------------------------------------------------------------
+## Build the stripped kernel binary
+##------------------------------------------------------------------------------
 $(KERNEL_BIN): $(KERNEL_ELF)
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Build the documentation
+##------------------------------------------------------------------------------
 doc:
 	$(call colorecho, "\nGenerating docs")
 	@$(DOC_CMD) --document-private-items --open
 
-ifeq ($(QEMU_MACHINE_TYPE),)
-qemu test:
+##------------------------------------------------------------------------------
+## Run the kernel in QEMU
+##------------------------------------------------------------------------------
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
+qemu qemuasm:
 	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
-else
+
+else # QEMU is supported.
+
 qemu: $(KERNEL_BIN)
 	$(call colorecho, "\nLaunching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
@@ -112,26 +146,36 @@ qemuasm: $(KERNEL_BIN)
 	$(call colorecho, "\nLaunching QEMU with ASM output")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN) -d in_asm
 
-test: $(KERNEL_BIN)
-	$(call colorecho, "\nTesting chainloading - $(BSP)")
-	@$(DOCKER_TEST) $(EXEC_QEMU_MINIPUSH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) \
-                -kernel $(KERNEL_BIN) $(CHAINBOOT_DEMO_PAYLOAD)
-
 endif
 
-chainboot:
+##------------------------------------------------------------------------------
+## Push the kernel to the real HW target
+##------------------------------------------------------------------------------
+chainboot: $(KERNEL_BIN)
 	@$(DOCKER_CHAINBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(CHAINBOOT_DEMO_PAYLOAD)
 
+##------------------------------------------------------------------------------
+## Run clippy
+##------------------------------------------------------------------------------
 clippy:
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
+##------------------------------------------------------------------------------
+## Clean
+##------------------------------------------------------------------------------
 clean:
 	rm -rf target $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Run readelf
+##------------------------------------------------------------------------------
 readelf: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching readelf")
 	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
+##------------------------------------------------------------------------------
+## Run objdump
+##------------------------------------------------------------------------------
 objdump: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching objdump")
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
@@ -140,10 +184,41 @@ objdump: $(KERNEL_ELF)
                 --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
+##------------------------------------------------------------------------------
+## Run nm
+##------------------------------------------------------------------------------
 nm: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
-# For rust-analyzer
+##------------------------------------------------------------------------------
+## Helper target for rust-analyzer
+##------------------------------------------------------------------------------
 check:
 	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Testing targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: test test_boot
+
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
+test_boot test :
+	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+
+else # QEMU is supported.
+
+##------------------------------------------------------------------------------
+## Run boot test
+##------------------------------------------------------------------------------
+test_boot: $(KERNEL_BIN)
+	$(call colorecho, "\nBoot test - $(BSP)")
+	@$(DOCKER_TEST) $(EXEC_TEST_MINIPUSH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) \
+		-kernel $(KERNEL_BIN) $(CHAINBOOT_DEMO_PAYLOAD)
+
+test: test_boot
+
+endif
diff --git a/06_uart_chainloader/README.md b/06_uart_chainloader/README.md
index 0f9e4aa61..d606f5369 100644
--- a/06_uart_chainloader/README.md
+++ b/06_uart_chainloader/README.md
@@ -137,57 +137,95 @@ Binary files 05_drivers_gpio_uart/demo_payload_rpi4.img and 06_uart_chainloader/
 diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
 --- 05_drivers_gpio_uart/Makefile
 +++ 06_uart_chainloader/Makefile
-@@ -25,6 +25,7 @@
-     READELF_BINARY    = aarch64-none-elf-readelf
-     LINKER_FILE       = src/bsp/raspberrypi/link.ld
-     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
+@@ -22,27 +22,29 @@
+
+ # BSP-specific arguments.
+ ifeq ($(BSP),rpi3)
+-    TARGET            = aarch64-unknown-none-softfloat
+-    KERNEL_BIN        = kernel8.img
+-    QEMU_BINARY       = qemu-system-aarch64
+-    QEMU_MACHINE_TYPE = raspi3
+-    QEMU_RELEASE_ARGS = -serial stdio -display none
+-    OBJDUMP_BINARY    = aarch64-none-elf-objdump
+-    NM_BINARY         = aarch64-none-elf-nm
+-    READELF_BINARY    = aarch64-none-elf-readelf
+-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+-    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
++    TARGET                 = aarch64-unknown-none-softfloat
++    KERNEL_BIN             = kernel8.img
++    QEMU_BINARY            = qemu-system-aarch64
++    QEMU_MACHINE_TYPE      = raspi3
++    QEMU_RELEASE_ARGS      = -serial stdio -display none
++    OBJDUMP_BINARY         = aarch64-none-elf-objdump
++    NM_BINARY              = aarch64-none-elf-nm
++    READELF_BINARY         = aarch64-none-elf-readelf
++    LINKER_FILE            = src/bsp/raspberrypi/link.ld
++    RUSTC_MISC_ARGS        = -C target-cpu=cortex-a53
 +    CHAINBOOT_DEMO_PAYLOAD = demo_payload_rpi3.img
  else ifeq ($(BSP),rpi4)
-     TARGET            = aarch64-unknown-none-softfloat
-     KERNEL_BIN        = kernel8.img
-@@ -36,6 +37,7 @@
-     READELF_BINARY    = aarch64-none-elf-readelf
-     LINKER_FILE       = src/bsp/raspberrypi/link.ld
-     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
+-    TARGET            = aarch64-unknown-none-softfloat
+-    KERNEL_BIN        = kernel8.img
+-    QEMU_BINARY       = qemu-system-aarch64
+-    QEMU_MACHINE_TYPE =
+-    QEMU_RELEASE_ARGS = -serial stdio -display none
+-    OBJDUMP_BINARY    = aarch64-none-elf-objdump
+-    NM_BINARY         = aarch64-none-elf-nm
+-    READELF_BINARY    = aarch64-none-elf-readelf
+-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+-    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
++    TARGET                 = aarch64-unknown-none-softfloat
++    KERNEL_BIN             = kernel8.img
++    QEMU_BINARY            = qemu-system-aarch64
++    QEMU_MACHINE_TYPE      =
++    QEMU_RELEASE_ARGS      = -serial stdio -display none
++    OBJDUMP_BINARY         = aarch64-none-elf-objdump
++    NM_BINARY              = aarch64-none-elf-nm
++    READELF_BINARY         = aarch64-none-elf-readelf
++    LINKER_FILE            = src/bsp/raspberrypi/link.ld
++    RUSTC_MISC_ARGS        = -C target-cpu=cortex-a72
 +    CHAINBOOT_DEMO_PAYLOAD = demo_payload_rpi4.img
  endif
 
- # Export for build.rs
-@@ -68,19 +70,22 @@
- DOCKER_ARG_DEV       = --privileged -v /dev:/dev
+ QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+@@ -74,8 +76,8 @@
+     -O binary
 
- DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
-+DOCKER_TEST  = $(DOCKER_CMD) -t $(DOCKER_ARG_DIR_UTILS) $(DOCKER_IMAGE)
- DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+ EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
+-EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
+-EXEC_MINITERM      = ruby ../common/serial/miniterm.rb
++EXEC_TEST_MINIPUSH = ruby tests/chainboot_test.rb
++EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
 
- # Dockerize commands that require USB device passthrough only on Linux
- ifeq ($(UNAME_S),Linux)
+ ##------------------------------------------------------------------------------
+ ## Dockerization
+@@ -94,7 +96,7 @@
+ ifeq ($(shell uname -s),Linux)
      DOCKER_CMD_DEV = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DEV)
 
--    DOCKER_MINITERM = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_IMAGE)
-+    DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_IMAGE)
+-    DOCKER_MINITERM = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
++    DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
  endif
 
--EXEC_QEMU     = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
--EXEC_MINITERM = ruby ../utils/miniterm.rb
-+EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
-+EXEC_MINIPUSH      = ruby ../utils/minipush.rb
-+EXEC_QEMU_MINIPUSH = ruby tests/qemu_minipush.rb
 
+@@ -102,7 +104,7 @@
+ ##--------------------------------------------------------------------------------------------------
+ ## Targets
+ ##--------------------------------------------------------------------------------------------------
 -.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu miniterm clippy clean readelf objdump nm check
-+.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu qemuasm chainboot clippy clean readelf objdump nm \
-+    check
++.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu chainboot clippy clean readelf objdump nm check
 
  all: $(KERNEL_BIN)
 
-@@ -96,16 +101,26 @@
- 	@$(DOC_CMD) --document-private-items --open
+@@ -131,7 +133,7 @@
+ ##------------------------------------------------------------------------------
+ ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
- ifeq ($(QEMU_MACHINE_TYPE),)
 -qemu:
-+qemu test:
++qemu qemuasm:
  	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
- else
+
+ else # QEMU is supported.
+@@ -139,13 +141,18 @@
  qemu: $(KERNEL_BIN)
  	$(call colorecho, "\nLaunching QEMU")
  	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
@@ -195,21 +233,30 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
 +qemuasm: $(KERNEL_BIN)
 +	$(call colorecho, "\nLaunching QEMU with ASM output")
 +	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN) -d in_asm
-+
-+test: $(KERNEL_BIN)
-+	$(call colorecho, "\nTesting chainloading - $(BSP)")
-+	@$(DOCKER_TEST) $(EXEC_QEMU_MINIPUSH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) \
-+                -kernel $(KERNEL_BIN) $(CHAINBOOT_DEMO_PAYLOAD)
 +
  endif
 
+ ##------------------------------------------------------------------------------
+-## Connect to the target's serial
++## Push the kernel to the real HW target
+ ##------------------------------------------------------------------------------
 -miniterm:
 -	@$(DOCKER_MINITERM) $(EXEC_MINITERM) $(DEV_SERIAL)
-+chainboot:
++chainboot: $(KERNEL_BIN)
 +	@$(DOCKER_CHAINBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(CHAINBOOT_DEMO_PAYLOAD)
 
- clippy:
- 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
+ ##------------------------------------------------------------------------------
+ ## Run clippy
+@@ -209,7 +216,8 @@
+ ##------------------------------------------------------------------------------
+ test_boot: $(KERNEL_BIN)
+ 	$(call colorecho, "\nBoot test - $(BSP)")
+-	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
++	@$(DOCKER_TEST) $(EXEC_TEST_MINIPUSH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) \
++		-kernel $(KERNEL_BIN) $(CHAINBOOT_DEMO_PAYLOAD)
+
+ test: test_boot
+
 
 diff -uNr 05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s 06_uart_chainloader/src/_arch/aarch64/cpu/boot.s
 --- 05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s
@@ -492,9 +539,17 @@ diff -uNr 05_drivers_gpio_uart/src/main.rs 06_uart_chainloader/src/main.rs
 +    kernel()
  }
 
-diff -uNr 05_drivers_gpio_uart/tests/qemu_minipush.rb 06_uart_chainloader/tests/qemu_minipush.rb
---- 05_drivers_gpio_uart/tests/qemu_minipush.rb
-+++ 06_uart_chainloader/tests/qemu_minipush.rb
+diff -uNr 05_drivers_gpio_uart/tests/boot_test_string.rb 06_uart_chainloader/tests/boot_test_string.rb
+--- 05_drivers_gpio_uart/tests/boot_test_string.rb
++++ 06_uart_chainloader/tests/boot_test_string.rb
+@@ -1,3 +0,0 @@
+-# frozen_string_literal: true
+-
+-EXPECTED_PRINT = 'Echoing input now'
+
+diff -uNr 05_drivers_gpio_uart/tests/chainboot_test.rb 06_uart_chainloader/tests/chainboot_test.rb
+--- 05_drivers_gpio_uart/tests/chainboot_test.rb
++++ 06_uart_chainloader/tests/chainboot_test.rb
 @@ -0,0 +1,80 @@
 +# frozen_string_literal: true
 +
@@ -502,80 +557,80 @@ diff -uNr 05_drivers_gpio_uart/tests/qemu_minipush.rb 06_uart_chainloader/tests/
 +#
 +# Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 +
-+require_relative '../../utils/minipush'
-+require 'expect'
-+require 'timeout'
++require_relative '../../common/serial/minipush'
++require_relative '../../common/tests/boot_test'
++require 'pty'
 +
 +# Match for the last print that 'demo_payload_rpiX.img' produces.
 +EXPECTED_PRINT = 'Echoing input now'
 +
-+# The main class
-+class QEMUMiniPush < MiniPush
-+    TIMEOUT_SECS = 3
++# Extend BootTest so that it listens on the output of a MiniPush instance, which is itself connected
++# to a QEMU instance instead of a real HW.
++class ChainbootTest < BootTest
++    MINIPUSH = '../common/serial/minipush.rb'
++    MINIPUSH_POWER_TARGET_REQUEST = 'Please power the target now'
 +
-+    # override
-+    def initialize(qemu_cmd, binary_image_path)
-+        super(nil, binary_image_path)
++    def initialize(qemu_cmd, payload_path)
++        super(qemu_cmd, EXPECTED_PRINT)
++
++        @test_name = 'Boot test using Minipush'
 +
-+        @qemu_cmd = qemu_cmd
++        @payload_path = payload_path
 +    end
 +
 +    private
 +
-+    def quit_qemu_graceful
-+        Timeout.timeout(5) do
-+            pid = @target_serial.pid
-+            Process.kill('TERM', pid)
-+            Process.wait(pid)
-+        end
-+    end
-+
 +    # override
-+    def open_serial
-+        @target_serial = IO.popen(@qemu_cmd, 'r+', err: '/dev/null')
++    def post_process_and_add_output(output)
++        temp = output.join.split("\r\n")
 +
-+        # Ensure all output is immediately flushed to the device.
-+        @target_serial.sync = true
++        # Should a line have solo carriage returns, remove any overridden parts of the string.
++        temp.map! { |x| x.gsub(/.*\r/, '') }
 +
-+        puts "[#{@name_short}] ✅ Serial connected"
++        @test_output += temp
 +    end
 +
-+    # override
-+    def terminal
-+        result = @target_serial.expect(EXPECTED_PRINT, TIMEOUT_SECS)
-+        exit(1) if result.nil?
-+
-+        puts result
-+
-+        quit_qemu_graceful
++    def wait_for_minipush_power_request(mp_out)
++        output = []
++        Timeout.timeout(MAX_WAIT_SECS) do
++            loop do
++                output << mp_out.gets
++                break if output.last.include?(MINIPUSH_POWER_TARGET_REQUEST)
++            end
++        end
++    rescue Timeout::Error
++        @test_error = 'Timed out waiting for power request'
++    rescue StandardError => e
++        @test_error = e.message
++    ensure
++        post_process_and_add_output(output)
 +    end
 +
 +    # override
-+    def connetion_reset; end
++    def setup
++        pty_main, pty_secondary = PTY.open
++        mp_out, _mp_in = PTY.spawn("ruby #{MINIPUSH} #{pty_secondary.path} #{@payload_path}")
 +
-+    # override
-+    def handle_reconnect(error)
-+        handle_unexpected(error)
++        # Wait until MiniPush asks for powering the target.
++        wait_for_minipush_power_request(mp_out)
++
++        # Now is the time to start QEMU with the chainloader binary. QEMU's virtual tty is connected
++        # to the MiniPush instance spawned above, so that the two processes talk to each other.
++        Process.spawn(@qemu_cmd, in: pty_main, out: pty_main)
++
++        # The remainder of the test is done by the parent class' run_concrete_test, which listens on
++        # @qemu_serial. Hence, point it to MiniPush's output.
++        @qemu_serial = mp_out
 +    end
 +end
 +
 +##--------------------------------------------------------------------------------------------------
 +## Execution starts here
 +##--------------------------------------------------------------------------------------------------
-+puts
-+puts 'QEMUMiniPush 1.0'.cyan
-+puts
-+
-+# CTRL + C handler. Only here to suppress Ruby's default exception print.
-+trap('INT') do
-+    # The `ensure` block from `QEMUMiniPush::run` will run after exit, restoring console state.
-+    exit
-+end
-+
-+binary_image_path = ARGV.pop
++payload_path = ARGV.pop
 +qemu_cmd = ARGV.join(' ')
 +
-+QEMUMiniPush.new(qemu_cmd, binary_image_path).run
++ChainbootTest.new(qemu_cmd, payload_path).run
 
 diff -uNr 05_drivers_gpio_uart/update.sh 06_uart_chainloader/update.sh
 --- 05_drivers_gpio_uart/update.sh
diff --git a/06_uart_chainloader/tests/chainboot_test.rb b/06_uart_chainloader/tests/chainboot_test.rb
new file mode 100644
index 000000000..3dee0f9c4
--- /dev/null
+++ b/06_uart_chainloader/tests/chainboot_test.rb
@@ -0,0 +1,80 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+
+require_relative '../../common/serial/minipush'
+require_relative '../../common/tests/boot_test'
+require 'pty'
+
+# Match for the last print that 'demo_payload_rpiX.img' produces.
+EXPECTED_PRINT = 'Echoing input now'
+
+# Extend BootTest so that it listens on the output of a MiniPush instance, which is itself connected
+# to a QEMU instance instead of a real HW.
+class ChainbootTest < BootTest
+    MINIPUSH = '../common/serial/minipush.rb'
+    MINIPUSH_POWER_TARGET_REQUEST = 'Please power the target now'
+
+    def initialize(qemu_cmd, payload_path)
+        super(qemu_cmd, EXPECTED_PRINT)
+
+        @test_name = 'Boot test using Minipush'
+
+        @payload_path = payload_path
+    end
+
+    private
+
+    # override
+    def post_process_and_add_output(output)
+        temp = output.join.split("\r\n")
+
+        # Should a line have solo carriage returns, remove any overridden parts of the string.
+        temp.map! { |x| x.gsub(/.*\r/, '') }
+
+        @test_output += temp
+    end
+
+    def wait_for_minipush_power_request(mp_out)
+        output = []
+        Timeout.timeout(MAX_WAIT_SECS) do
+            loop do
+                output << mp_out.gets
+                break if output.last.include?(MINIPUSH_POWER_TARGET_REQUEST)
+            end
+        end
+    rescue Timeout::Error
+        @test_error = 'Timed out waiting for power request'
+    rescue StandardError => e
+        @test_error = e.message
+    ensure
+        post_process_and_add_output(output)
+    end
+
+    # override
+    def setup
+        pty_main, pty_secondary = PTY.open
+        mp_out, _mp_in = PTY.spawn("ruby #{MINIPUSH} #{pty_secondary.path} #{@payload_path}")
+
+        # Wait until MiniPush asks for powering the target.
+        wait_for_minipush_power_request(mp_out)
+
+        # Now is the time to start QEMU with the chainloader binary. QEMU's virtual tty is connected
+        # to the MiniPush instance spawned above, so that the two processes talk to each other.
+        Process.spawn(@qemu_cmd, in: pty_main, out: pty_main)
+
+        # The remainder of the test is done by the parent class' run_concrete_test, which listens on
+        # @qemu_serial. Hence, point it to MiniPush's output.
+        @qemu_serial = mp_out
+    end
+end
+
+##--------------------------------------------------------------------------------------------------
+## Execution starts here
+##--------------------------------------------------------------------------------------------------
+payload_path = ARGV.pop
+qemu_cmd = ARGV.join(' ')
+
+ChainbootTest.new(qemu_cmd, payload_path).run
diff --git a/06_uart_chainloader/tests/qemu_minipush.rb b/06_uart_chainloader/tests/qemu_minipush.rb
deleted file mode 100644
index 73857cd6b..000000000
--- a/06_uart_chainloader/tests/qemu_minipush.rb
+++ /dev/null
@@ -1,80 +0,0 @@
-# frozen_string_literal: true
-
-# SPDX-License-Identifier: MIT OR Apache-2.0
-#
-# Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
-
-require_relative '../../utils/minipush'
-require 'expect'
-require 'timeout'
-
-# Match for the last print that 'demo_payload_rpiX.img' produces.
-EXPECTED_PRINT = 'Echoing input now'
-
-# The main class
-class QEMUMiniPush < MiniPush
-    TIMEOUT_SECS = 3
-
-    # override
-    def initialize(qemu_cmd, binary_image_path)
-        super(nil, binary_image_path)
-
-        @qemu_cmd = qemu_cmd
-    end
-
-    private
-
-    def quit_qemu_graceful
-        Timeout.timeout(5) do
-            pid = @target_serial.pid
-            Process.kill('TERM', pid)
-            Process.wait(pid)
-        end
-    end
-
-    # override
-    def open_serial
-        @target_serial = IO.popen(@qemu_cmd, 'r+', err: '/dev/null')
-
-        # Ensure all output is immediately flushed to the device.
-        @target_serial.sync = true
-
-        puts "[#{@name_short}] ✅ Serial connected"
-    end
-
-    # override
-    def terminal
-        result = @target_serial.expect(EXPECTED_PRINT, TIMEOUT_SECS)
-        exit(1) if result.nil?
-
-        puts result
-
-        quit_qemu_graceful
-    end
-
-    # override
-    def connetion_reset; end
-
-    # override
-    def handle_reconnect(error)
-        handle_unexpected(error)
-    end
-end
-
-##--------------------------------------------------------------------------------------------------
-## Execution starts here
-##--------------------------------------------------------------------------------------------------
-puts
-puts 'QEMUMiniPush 1.0'.cyan
-puts
-
-# CTRL + C handler. Only here to suppress Ruby's default exception print.
-trap('INT') do
-    # The `ensure` block from `QEMUMiniPush::run` will run after exit, restoring console state.
-    exit
-end
-
-binary_image_path = ARGV.pop
-qemu_cmd = ARGV.join(' ')
-
-QEMUMiniPush.new(qemu_cmd, binary_image_path).run
diff --git a/07_timestamps/Makefile b/07_timestamps/Makefile
index b5a56d075..8336ccb72 100644
--- a/07_timestamps/Makefile
+++ b/07_timestamps/Makefile
@@ -2,18 +2,25 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-include ../utils/color.mk.in
+include ../common/color.mk.in
 
-# Default to the RPi3
+##--------------------------------------------------------------------------------------------------
+## Optional, user-provided configuration values
+##--------------------------------------------------------------------------------------------------
+
+# Default to the RPi3.
 BSP ?= rpi3
 
 # Default to a serial device name that is common in Linux.
 DEV_SERIAL ?= /dev/ttyUSB0
 
-# Query the host system's kernel name
-UNAME_S = $(shell uname -s)
 
-# BSP-specific arguments
+
+##--------------------------------------------------------------------------------------------------
+## Hardcoded configuration values
+##--------------------------------------------------------------------------------------------------
+
+# BSP-specific arguments.
 ifeq ($(BSP),rpi3)
     TARGET            = aarch64-unknown-none-softfloat
     KERNEL_BIN        = kernel8.img
@@ -38,11 +45,18 @@ else ifeq ($(BSP),rpi4)
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
-# Export for build.rs
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+
+# Export for build.rs.
 export LINKER_FILE
 
-QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+KERNEL_ELF = target/$(TARGET)/release/kernel
 
+
+
+##--------------------------------------------------------------------------------------------------
+## Command building blocks
+##--------------------------------------------------------------------------------------------------
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
@@ -59,64 +73,103 @@ OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
     -O binary
 
-KERNEL_ELF = target/$(TARGET)/release/kernel
+EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
+EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
+EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
 
-DOCKER_IMAGE         = rustembedded/osdev-utils
-DOCKER_CMD           = docker run --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
-DOCKER_CMD_INTERACT  = $(DOCKER_CMD) -i -t
-DOCKER_ARG_DIR_UTILS = -v $(shell pwd)/../utils:/work/utils
-DOCKER_ARG_DEV       = --privileged -v /dev:/dev
+##------------------------------------------------------------------------------
+## Dockerization
+##------------------------------------------------------------------------------
+DOCKER_IMAGE          = rustembedded/osdev-utils
+DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
+DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
+DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
+DOCKER_ARG_DEV        = --privileged -v /dev:/dev
 
 DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
 DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
 
-# Dockerize commands that require USB device passthrough only on Linux
-ifeq ($(UNAME_S),Linux)
+# Dockerize commands, which require USB device passthrough, only on Linux.
+ifeq ($(shell uname -s),Linux)
     DOCKER_CMD_DEV = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DEV)
 
-    DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_IMAGE)
+    DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
 endif
 
-EXEC_QEMU     = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
-EXEC_MINIPUSH = ruby ../utils/minipush.rb
 
+
+##--------------------------------------------------------------------------------------------------
+## Targets
+##--------------------------------------------------------------------------------------------------
 .PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu chainboot clippy clean readelf objdump nm check
 
 all: $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Build the kernel ELF
+##------------------------------------------------------------------------------
 $(KERNEL_ELF):
 	$(call colorecho, "\nCompiling kernel - $(BSP)")
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
+##------------------------------------------------------------------------------
+## Build the stripped kernel binary
+##------------------------------------------------------------------------------
 $(KERNEL_BIN): $(KERNEL_ELF)
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Build the documentation
+##------------------------------------------------------------------------------
 doc:
 	$(call colorecho, "\nGenerating docs")
 	@$(DOC_CMD) --document-private-items --open
 
-ifeq ($(QEMU_MACHINE_TYPE),)
+##------------------------------------------------------------------------------
+## Run the kernel in QEMU
+##------------------------------------------------------------------------------
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
 qemu:
 	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
-else
+
+else # QEMU is supported.
+
 qemu: $(KERNEL_BIN)
 	$(call colorecho, "\nLaunching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
+
 endif
 
+##------------------------------------------------------------------------------
+## Push the kernel to the real HW target
+##------------------------------------------------------------------------------
 chainboot: $(KERNEL_BIN)
 	@$(DOCKER_CHAINBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Run clippy
+##------------------------------------------------------------------------------
 clippy:
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
+##------------------------------------------------------------------------------
+## Clean
+##------------------------------------------------------------------------------
 clean:
 	rm -rf target $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Run readelf
+##------------------------------------------------------------------------------
 readelf: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching readelf")
 	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
+##------------------------------------------------------------------------------
+## Run objdump
+##------------------------------------------------------------------------------
 objdump: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching objdump")
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
@@ -125,10 +178,40 @@ objdump: $(KERNEL_ELF)
                 --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
+##------------------------------------------------------------------------------
+## Run nm
+##------------------------------------------------------------------------------
 nm: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
-# For rust-analyzer
+##------------------------------------------------------------------------------
+## Helper target for rust-analyzer
+##------------------------------------------------------------------------------
 check:
 	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Testing targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: test test_boot
+
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
+test_boot test :
+	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+
+else # QEMU is supported.
+
+##------------------------------------------------------------------------------
+## Run boot test
+##------------------------------------------------------------------------------
+test_boot: $(KERNEL_BIN)
+	$(call colorecho, "\nBoot test - $(BSP)")
+	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
+
+test: test_boot
+
+endif
diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index 4e146bd0a..4fb36ddf2 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -62,76 +62,103 @@ Binary files 06_uart_chainloader/demo_payload_rpi4.img and 07_timestamps/demo_pa
 diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
 --- 06_uart_chainloader/Makefile
 +++ 07_timestamps/Makefile
-@@ -25,7 +25,6 @@
-     READELF_BINARY    = aarch64-none-elf-readelf
-     LINKER_FILE       = src/bsp/raspberrypi/link.ld
-     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
+@@ -22,29 +22,27 @@
+
+ # BSP-specific arguments.
+ ifeq ($(BSP),rpi3)
+-    TARGET                 = aarch64-unknown-none-softfloat
+-    KERNEL_BIN             = kernel8.img
+-    QEMU_BINARY            = qemu-system-aarch64
+-    QEMU_MACHINE_TYPE      = raspi3
+-    QEMU_RELEASE_ARGS      = -serial stdio -display none
+-    OBJDUMP_BINARY         = aarch64-none-elf-objdump
+-    NM_BINARY              = aarch64-none-elf-nm
+-    READELF_BINARY         = aarch64-none-elf-readelf
+-    LINKER_FILE            = src/bsp/raspberrypi/link.ld
+-    RUSTC_MISC_ARGS        = -C target-cpu=cortex-a53
 -    CHAINBOOT_DEMO_PAYLOAD = demo_payload_rpi3.img
++    TARGET            = aarch64-unknown-none-softfloat
++    KERNEL_BIN        = kernel8.img
++    QEMU_BINARY       = qemu-system-aarch64
++    QEMU_MACHINE_TYPE = raspi3
++    QEMU_RELEASE_ARGS = -serial stdio -display none
++    OBJDUMP_BINARY    = aarch64-none-elf-objdump
++    NM_BINARY         = aarch64-none-elf-nm
++    READELF_BINARY    = aarch64-none-elf-readelf
++    LINKER_FILE       = src/bsp/raspberrypi/link.ld
++    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
  else ifeq ($(BSP),rpi4)
-     TARGET            = aarch64-unknown-none-softfloat
-     KERNEL_BIN        = kernel8.img
-@@ -37,7 +36,6 @@
-     READELF_BINARY    = aarch64-none-elf-readelf
-     LINKER_FILE       = src/bsp/raspberrypi/link.ld
-     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
+-    TARGET                 = aarch64-unknown-none-softfloat
+-    KERNEL_BIN             = kernel8.img
+-    QEMU_BINARY            = qemu-system-aarch64
+-    QEMU_MACHINE_TYPE      =
+-    QEMU_RELEASE_ARGS      = -serial stdio -display none
+-    OBJDUMP_BINARY         = aarch64-none-elf-objdump
+-    NM_BINARY              = aarch64-none-elf-nm
+-    READELF_BINARY         = aarch64-none-elf-readelf
+-    LINKER_FILE            = src/bsp/raspberrypi/link.ld
+-    RUSTC_MISC_ARGS        = -C target-cpu=cortex-a72
 -    CHAINBOOT_DEMO_PAYLOAD = demo_payload_rpi4.img
++    TARGET            = aarch64-unknown-none-softfloat
++    KERNEL_BIN        = kernel8.img
++    QEMU_BINARY       = qemu-system-aarch64
++    QEMU_MACHINE_TYPE =
++    QEMU_RELEASE_ARGS = -serial stdio -display none
++    OBJDUMP_BINARY    = aarch64-none-elf-objdump
++    NM_BINARY         = aarch64-none-elf-nm
++    READELF_BINARY    = aarch64-none-elf-readelf
++    LINKER_FILE       = src/bsp/raspberrypi/link.ld
++    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
  endif
 
- # Export for build.rs
-@@ -70,7 +68,6 @@
- DOCKER_ARG_DEV       = --privileged -v /dev:/dev
+ QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+@@ -76,7 +74,7 @@
+     -O binary
 
- DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
--DOCKER_TEST  = $(DOCKER_CMD) -t $(DOCKER_ARG_DIR_UTILS) $(DOCKER_IMAGE)
- DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+ EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
+-EXEC_TEST_MINIPUSH = ruby tests/chainboot_test.rb
++EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
+ EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
 
- # Dockerize commands that require USB device passthrough only on Linux
-@@ -80,12 +77,10 @@
-     DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_IMAGE)
- endif
-
--EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
--EXEC_MINIPUSH      = ruby ../utils/minipush.rb
--EXEC_QEMU_MINIPUSH = ruby tests/qemu_minipush.rb
-+EXEC_QEMU     = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
-+EXEC_MINIPUSH = ruby ../utils/minipush.rb
-
--.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu qemuasm chainboot clippy clean readelf objdump nm \
--    check
-+.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu chainboot clippy clean readelf objdump nm check
-
- all: $(KERNEL_BIN)
+ ##------------------------------------------------------------------------------
+@@ -133,7 +131,7 @@
+ ##------------------------------------------------------------------------------
+ ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
-@@ -101,26 +96,16 @@
- 	@$(DOC_CMD) --document-private-items --open
-
- ifeq ($(QEMU_MACHINE_TYPE),)
--qemu test:
+-qemu qemuasm:
 +qemu:
  	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
- else
- qemu: $(KERNEL_BIN)
+
+ else # QEMU is supported.
+@@ -142,17 +140,13 @@
  	$(call colorecho, "\nLaunching QEMU")
  	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
--
+
 -qemuasm: $(KERNEL_BIN)
 -	$(call colorecho, "\nLaunching QEMU with ASM output")
 -	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN) -d in_asm
--
--test: $(KERNEL_BIN)
--	$(call colorecho, "\nTesting chainloading - $(BSP)")
--	@$(DOCKER_TEST) $(EXEC_QEMU_MINIPUSH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) \
--                -kernel $(KERNEL_BIN) $(CHAINBOOT_DEMO_PAYLOAD)
 -
  endif
 
--chainboot:
+ ##------------------------------------------------------------------------------
+ ## Push the kernel to the real HW target
+ ##------------------------------------------------------------------------------
+ chainboot: $(KERNEL_BIN)
 -	@$(DOCKER_CHAINBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(CHAINBOOT_DEMO_PAYLOAD)
-+chainboot: $(KERNEL_BIN)
 +	@$(DOCKER_CHAINBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(KERNEL_BIN)
 
- clippy:
- 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
+ ##------------------------------------------------------------------------------
+ ## Run clippy
+@@ -216,8 +210,7 @@
+ ##------------------------------------------------------------------------------
+ test_boot: $(KERNEL_BIN)
+ 	$(call colorecho, "\nBoot test - $(BSP)")
+-	@$(DOCKER_TEST) $(EXEC_TEST_MINIPUSH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) \
+-		-kernel $(KERNEL_BIN) $(CHAINBOOT_DEMO_PAYLOAD)
++	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
+
+ test: test_boot
+
 
 diff -uNr 06_uart_chainloader/src/_arch/aarch64/cpu/boot.s 07_timestamps/src/_arch/aarch64/cpu/boot.s
 --- 06_uart_chainloader/src/_arch/aarch64/cpu/boot.s
@@ -720,9 +747,17 @@ diff -uNr 06_uart_chainloader/src/time.rs 07_timestamps/src/time.rs
 +    }
 +}
 
-diff -uNr 06_uart_chainloader/tests/qemu_minipush.rb 07_timestamps/tests/qemu_minipush.rb
---- 06_uart_chainloader/tests/qemu_minipush.rb
-+++ 07_timestamps/tests/qemu_minipush.rb
+diff -uNr 06_uart_chainloader/tests/boot_test_string.rb 07_timestamps/tests/boot_test_string.rb
+--- 06_uart_chainloader/tests/boot_test_string.rb
++++ 07_timestamps/tests/boot_test_string.rb
+@@ -0,0 +1,3 @@
++# frozen_string_literal: true
++
++EXPECTED_PRINT = 'Spinning for 1 second'
+
+diff -uNr 06_uart_chainloader/tests/chainboot_test.rb 07_timestamps/tests/chainboot_test.rb
+--- 06_uart_chainloader/tests/chainboot_test.rb
++++ 07_timestamps/tests/chainboot_test.rb
 @@ -1,80 +0,0 @@
 -# frozen_string_literal: true
 -
@@ -730,80 +765,80 @@ diff -uNr 06_uart_chainloader/tests/qemu_minipush.rb 07_timestamps/tests/qemu_mi
 -#
 -# Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 -
--require_relative '../../utils/minipush'
--require 'expect'
--require 'timeout'
+-require_relative '../../common/serial/minipush'
+-require_relative '../../common/tests/boot_test'
+-require 'pty'
 -
 -# Match for the last print that 'demo_payload_rpiX.img' produces.
 -EXPECTED_PRINT = 'Echoing input now'
 -
--# The main class
--class QEMUMiniPush < MiniPush
--    TIMEOUT_SECS = 3
+-# Extend BootTest so that it listens on the output of a MiniPush instance, which is itself connected
+-# to a QEMU instance instead of a real HW.
+-class ChainbootTest < BootTest
+-    MINIPUSH = '../common/serial/minipush.rb'
+-    MINIPUSH_POWER_TARGET_REQUEST = 'Please power the target now'
 -
--    # override
--    def initialize(qemu_cmd, binary_image_path)
--        super(nil, binary_image_path)
+-    def initialize(qemu_cmd, payload_path)
+-        super(qemu_cmd, EXPECTED_PRINT)
 -
--        @qemu_cmd = qemu_cmd
+-        @test_name = 'Boot test using Minipush'
+-
+-        @payload_path = payload_path
 -    end
 -
 -    private
 -
--    def quit_qemu_graceful
--        Timeout.timeout(5) do
--            pid = @target_serial.pid
--            Process.kill('TERM', pid)
--            Process.wait(pid)
--        end
--    end
--
 -    # override
--    def open_serial
--        @target_serial = IO.popen(@qemu_cmd, 'r+', err: '/dev/null')
+-    def post_process_and_add_output(output)
+-        temp = output.join.split("\r\n")
 -
--        # Ensure all output is immediately flushed to the device.
--        @target_serial.sync = true
+-        # Should a line have solo carriage returns, remove any overridden parts of the string.
+-        temp.map! { |x| x.gsub(/.*\r/, '') }
 -
--        puts "[#{@name_short}] ✅ Serial connected"
+-        @test_output += temp
 -    end
 -
--    # override
--    def terminal
--        result = @target_serial.expect(EXPECTED_PRINT, TIMEOUT_SECS)
--        exit(1) if result.nil?
--
--        puts result
--
--        quit_qemu_graceful
+-    def wait_for_minipush_power_request(mp_out)
+-        output = []
+-        Timeout.timeout(MAX_WAIT_SECS) do
+-            loop do
+-                output << mp_out.gets
+-                break if output.last.include?(MINIPUSH_POWER_TARGET_REQUEST)
+-            end
+-        end
+-    rescue Timeout::Error
+-        @test_error = 'Timed out waiting for power request'
+-    rescue StandardError => e
+-        @test_error = e.message
+-    ensure
+-        post_process_and_add_output(output)
 -    end
 -
 -    # override
--    def connetion_reset; end
+-    def setup
+-        pty_main, pty_secondary = PTY.open
+-        mp_out, _mp_in = PTY.spawn("ruby #{MINIPUSH} #{pty_secondary.path} #{@payload_path}")
 -
--    # override
--    def handle_reconnect(error)
--        handle_unexpected(error)
+-        # Wait until MiniPush asks for powering the target.
+-        wait_for_minipush_power_request(mp_out)
+-
+-        # Now is the time to start QEMU with the chainloader binary. QEMU's virtual tty is connected
+-        # to the MiniPush instance spawned above, so that the two processes talk to each other.
+-        Process.spawn(@qemu_cmd, in: pty_main, out: pty_main)
+-
+-        # The remainder of the test is done by the parent class' run_concrete_test, which listens on
+-        # @qemu_serial. Hence, point it to MiniPush's output.
+-        @qemu_serial = mp_out
 -    end
 -end
 -
 -##--------------------------------------------------------------------------------------------------
 -## Execution starts here
 -##--------------------------------------------------------------------------------------------------
--puts
--puts 'QEMUMiniPush 1.0'.cyan
--puts
--
--# CTRL + C handler. Only here to suppress Ruby's default exception print.
--trap('INT') do
--    # The `ensure` block from `QEMUMiniPush::run` will run after exit, restoring console state.
--    exit
--end
--
--binary_image_path = ARGV.pop
+-payload_path = ARGV.pop
 -qemu_cmd = ARGV.join(' ')
 -
--QEMUMiniPush.new(qemu_cmd, binary_image_path).run
+-ChainbootTest.new(qemu_cmd, payload_path).run
 
 diff -uNr 06_uart_chainloader/update.sh 07_timestamps/update.sh
 --- 06_uart_chainloader/update.sh
diff --git a/07_timestamps/tests/boot_test_string.rb b/07_timestamps/tests/boot_test_string.rb
new file mode 100644
index 000000000..02c3c492a
--- /dev/null
+++ b/07_timestamps/tests/boot_test_string.rb
@@ -0,0 +1,3 @@
+# frozen_string_literal: true
+
+EXPECTED_PRINT = 'Spinning for 1 second'
diff --git a/08_hw_debug_JTAG/Makefile b/08_hw_debug_JTAG/Makefile
index e3dcaae86..0a2443acc 100644
--- a/08_hw_debug_JTAG/Makefile
+++ b/08_hw_debug_JTAG/Makefile
@@ -2,18 +2,25 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-include ../utils/color.mk.in
+include ../common/color.mk.in
 
-# Default to the RPi3
+##--------------------------------------------------------------------------------------------------
+## Optional, user-provided configuration values
+##--------------------------------------------------------------------------------------------------
+
+# Default to the RPi3.
 BSP ?= rpi3
 
 # Default to a serial device name that is common in Linux.
 DEV_SERIAL ?= /dev/ttyUSB0
 
-# Query the host system's kernel name
-UNAME_S = $(shell uname -s)
 
-# BSP-specific arguments
+
+##--------------------------------------------------------------------------------------------------
+## Hardcoded configuration values
+##--------------------------------------------------------------------------------------------------
+
+# BSP-specific arguments.
 ifeq ($(BSP),rpi3)
     TARGET            = aarch64-unknown-none-softfloat
     KERNEL_BIN        = kernel8.img
@@ -42,11 +49,18 @@ else ifeq ($(BSP),rpi4)
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
-# Export for build.rs
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+
+# Export for build.rs.
 export LINKER_FILE
 
-QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+KERNEL_ELF = target/$(TARGET)/release/kernel
+
 
+
+##--------------------------------------------------------------------------------------------------
+## Command building blocks
+##--------------------------------------------------------------------------------------------------
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
@@ -63,85 +77,110 @@ OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
     -O binary
 
-KERNEL_ELF = target/$(TARGET)/release/kernel
-
-DOCKER_IMAGE         = rustembedded/osdev-utils
-DOCKER_CMD           = docker run --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
-DOCKER_CMD_INTERACT  = $(DOCKER_CMD) -i -t
-DOCKER_ARG_DIR_UTILS = -v $(shell pwd)/../utils:/work/utils
-DOCKER_ARG_DIR_JTAG  = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
-DOCKER_ARG_DEV       = --privileged -v /dev:/dev
-DOCKER_ARG_NET       = --network host
+EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
+EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
+EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
+
+##------------------------------------------------------------------------------
+## Dockerization
+##------------------------------------------------------------------------------
+DOCKER_IMAGE          = rustembedded/osdev-utils
+DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
+DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
+DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
+DOCKER_ARG_DIR_JTAG   = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
+DOCKER_ARG_DEV        = --privileged -v /dev:/dev
+DOCKER_ARG_NET        = --network host
 
 DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
-DOCKER_GDB   = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
 DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
+DOCKER_GDB   = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
 
-# Dockerize commands that require USB device passthrough only on Linux
-ifeq ($(UNAME_S),Linux)
+# Dockerize commands, which require USB device passthrough, only on Linux.
+ifeq ($(shell uname -s),Linux)
     DOCKER_CMD_DEV = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DEV)
 
-    DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_IMAGE)
-    DOCKER_JTAGBOOT  = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_ARG_DIR_JTAG) $(DOCKER_IMAGE)
+    DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
+    DOCKER_JTAGBOOT  = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_ARG_DIR_JTAG) $(DOCKER_IMAGE)
     DOCKER_OPENOCD   = $(DOCKER_CMD_DEV) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
 else
     DOCKER_OPENOCD   = echo "Not yet supported on non-Linux systems."; \#
 endif
 
-EXEC_QEMU     = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
-EXEC_MINIPUSH = ruby ../utils/minipush.rb
 
-.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu chainboot jtagboot openocd gdb gdb-opt0  clippy \
-    clean readelf objdump nm check
+
+##--------------------------------------------------------------------------------------------------
+## Targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu chainboot clippy clean readelf objdump nm check
 
 all: $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Build the kernel ELF
+##------------------------------------------------------------------------------
 $(KERNEL_ELF):
 	$(call colorecho, "\nCompiling kernel - $(BSP)")
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
+##------------------------------------------------------------------------------
+## Build the stripped kernel binary
+##------------------------------------------------------------------------------
 $(KERNEL_BIN): $(KERNEL_ELF)
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Build the documentation
+##------------------------------------------------------------------------------
 doc:
 	$(call colorecho, "\nGenerating docs")
 	@$(DOC_CMD) --document-private-items --open
 
-ifeq ($(QEMU_MACHINE_TYPE),)
+##------------------------------------------------------------------------------
+## Run the kernel in QEMU
+##------------------------------------------------------------------------------
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
 qemu:
 	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
-else
+
+else # QEMU is supported.
+
 qemu: $(KERNEL_BIN)
 	$(call colorecho, "\nLaunching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
+
 endif
 
+##------------------------------------------------------------------------------
+## Push the kernel to the real HW target
+##------------------------------------------------------------------------------
 chainboot: $(KERNEL_BIN)
 	@$(DOCKER_CHAINBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(KERNEL_BIN)
 
-jtagboot:
-	@$(DOCKER_JTAGBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(JTAG_BOOT_IMAGE)
-
-openocd:
-	$(call colorecho, "\nLaunching OpenOCD")
-	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
-
-gdb: RUSTC_MISC_ARGS += -C debuginfo=2
-gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
-gdb gdb-opt0: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching GDB")
-	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
-
+##------------------------------------------------------------------------------
+## Run clippy
+##------------------------------------------------------------------------------
 clippy:
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
+##------------------------------------------------------------------------------
+## Clean
+##------------------------------------------------------------------------------
 clean:
 	rm -rf target $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Run readelf
+##------------------------------------------------------------------------------
 readelf: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching readelf")
 	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
+##------------------------------------------------------------------------------
+## Run objdump
+##------------------------------------------------------------------------------
 objdump: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching objdump")
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
@@ -150,10 +189,69 @@ objdump: $(KERNEL_ELF)
                 --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
+##------------------------------------------------------------------------------
+## Run nm
+##------------------------------------------------------------------------------
 nm: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
-# For rust-analyzer
+##------------------------------------------------------------------------------
+## Helper target for rust-analyzer
+##------------------------------------------------------------------------------
 check:
 	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Debugging targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: jtagboot openocd gdb gdb-opt0
+
+##------------------------------------------------------------------------------
+## Push the JTAG boot image to the real HW target
+##------------------------------------------------------------------------------
+jtagboot:
+	@$(DOCKER_JTAGBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(JTAG_BOOT_IMAGE)
+
+##------------------------------------------------------------------------------
+## Start OpenOCD session
+##------------------------------------------------------------------------------
+openocd:
+	$(call colorecho, "\nLaunching OpenOCD")
+	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
+
+##------------------------------------------------------------------------------
+## Start GDB session
+##------------------------------------------------------------------------------
+gdb: RUSTC_MISC_ARGS += -C debuginfo=2
+gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
+gdb gdb-opt0: $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching GDB")
+	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Testing targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: test test_boot
+
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
+test_boot test :
+	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+
+else # QEMU is supported.
+
+##------------------------------------------------------------------------------
+## Run boot test
+##------------------------------------------------------------------------------
+test_boot: $(KERNEL_BIN)
+	$(call colorecho, "\nBoot test - $(BSP)")
+	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
+
+test: test_boot
+
+endif
diff --git a/08_hw_debug_JTAG/README.md b/08_hw_debug_JTAG/README.md
index a30a296ed..74a942a80 100644
--- a/08_hw_debug_JTAG/README.md
+++ b/08_hw_debug_JTAG/README.md
@@ -320,7 +320,7 @@ diff -uNr 07_timestamps/Cargo.toml 08_hw_debug_JTAG/Cargo.toml
 diff -uNr 07_timestamps/Makefile 08_hw_debug_JTAG/Makefile
 --- 07_timestamps/Makefile
 +++ 08_hw_debug_JTAG/Makefile
-@@ -23,6 +23,8 @@
+@@ -30,6 +30,8 @@
      OBJDUMP_BINARY    = aarch64-none-elf-objdump
      NM_BINARY         = aarch64-none-elf-nm
      READELF_BINARY    = aarch64-none-elf-readelf
@@ -329,7 +329,7 @@ diff -uNr 07_timestamps/Makefile 08_hw_debug_JTAG/Makefile
      LINKER_FILE       = src/bsp/raspberrypi/link.ld
      RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
  else ifeq ($(BSP),rpi4)
-@@ -34,6 +36,8 @@
+@@ -41,6 +43,8 @@
      OBJDUMP_BINARY    = aarch64-none-elf-objdump
      NM_BINARY         = aarch64-none-elf-nm
      READELF_BINARY    = aarch64-none-elf-readelf
@@ -338,56 +338,66 @@ diff -uNr 07_timestamps/Makefile 08_hw_debug_JTAG/Makefile
      LINKER_FILE       = src/bsp/raspberrypi/link.ld
      RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
  endif
-@@ -65,9 +69,12 @@
- DOCKER_CMD           = docker run --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
- DOCKER_CMD_INTERACT  = $(DOCKER_CMD) -i -t
- DOCKER_ARG_DIR_UTILS = -v $(shell pwd)/../utils:/work/utils
-+DOCKER_ARG_DIR_JTAG  = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
- DOCKER_ARG_DEV       = --privileged -v /dev:/dev
-+DOCKER_ARG_NET       = --network host
+@@ -84,17 +88,24 @@
+ DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
+ DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
+ DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
++DOCKER_ARG_DIR_JTAG   = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
+ DOCKER_ARG_DEV        = --privileged -v /dev:/dev
++DOCKER_ARG_NET        = --network host
 
  DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
-+DOCKER_GDB   = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
  DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+ DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
++DOCKER_GDB   = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
 
- # Dockerize commands that require USB device passthrough only on Linux
-@@ -75,12 +82,17 @@
+ # Dockerize commands, which require USB device passthrough, only on Linux.
+ ifeq ($(shell uname -s),Linux)
      DOCKER_CMD_DEV = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DEV)
 
-     DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_IMAGE)
-+    DOCKER_JTAGBOOT  = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_ARG_DIR_JTAG) $(DOCKER_IMAGE)
+     DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
++    DOCKER_JTAGBOOT  = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_ARG_DIR_JTAG) $(DOCKER_IMAGE)
 +    DOCKER_OPENOCD   = $(DOCKER_CMD_DEV) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
 +else
 +    DOCKER_OPENOCD   = echo "Not yet supported on non-Linux systems."; \#
  endif
 
- EXEC_QEMU     = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
- EXEC_MINIPUSH = ruby ../utils/minipush.rb
 
--.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu chainboot clippy clean readelf objdump nm check
-+.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu chainboot jtagboot openocd gdb gdb-opt0  clippy \
-+    clean readelf objdump nm check
+@@ -193,6 +204,35 @@
 
- all: $(KERNEL_BIN)
 
-@@ -107,6 +119,19 @@
- chainboot: $(KERNEL_BIN)
- 	@$(DOCKER_CHAINBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(KERNEL_BIN)
 
++##--------------------------------------------------------------------------------------------------
++## Debugging targets
++##--------------------------------------------------------------------------------------------------
++.PHONY: jtagboot openocd gdb gdb-opt0
++
++##------------------------------------------------------------------------------
++## Push the JTAG boot image to the real HW target
++##------------------------------------------------------------------------------
 +jtagboot:
 +	@$(DOCKER_JTAGBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(JTAG_BOOT_IMAGE)
 +
++##------------------------------------------------------------------------------
++## Start OpenOCD session
++##------------------------------------------------------------------------------
 +openocd:
 +	$(call colorecho, "\nLaunching OpenOCD")
 +	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
 +
++##------------------------------------------------------------------------------
++## Start GDB session
++##------------------------------------------------------------------------------
 +gdb: RUSTC_MISC_ARGS += -C debuginfo=2
 +gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
 +gdb gdb-opt0: $(KERNEL_ELF)
 +	$(call colorecho, "\nLaunching GDB")
 +	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
 +
- clippy:
- 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
++
++
+ ##--------------------------------------------------------------------------------------------------
+ ## Testing targets
+ ##--------------------------------------------------------------------------------------------------
 
 ```
diff --git a/08_hw_debug_JTAG/tests/boot_test_string.rb b/08_hw_debug_JTAG/tests/boot_test_string.rb
new file mode 100644
index 000000000..02c3c492a
--- /dev/null
+++ b/08_hw_debug_JTAG/tests/boot_test_string.rb
@@ -0,0 +1,3 @@
+# frozen_string_literal: true
+
+EXPECTED_PRINT = 'Spinning for 1 second'
diff --git a/09_privilege_level/Makefile b/09_privilege_level/Makefile
index e3dcaae86..0a2443acc 100644
--- a/09_privilege_level/Makefile
+++ b/09_privilege_level/Makefile
@@ -2,18 +2,25 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-include ../utils/color.mk.in
+include ../common/color.mk.in
 
-# Default to the RPi3
+##--------------------------------------------------------------------------------------------------
+## Optional, user-provided configuration values
+##--------------------------------------------------------------------------------------------------
+
+# Default to the RPi3.
 BSP ?= rpi3
 
 # Default to a serial device name that is common in Linux.
 DEV_SERIAL ?= /dev/ttyUSB0
 
-# Query the host system's kernel name
-UNAME_S = $(shell uname -s)
 
-# BSP-specific arguments
+
+##--------------------------------------------------------------------------------------------------
+## Hardcoded configuration values
+##--------------------------------------------------------------------------------------------------
+
+# BSP-specific arguments.
 ifeq ($(BSP),rpi3)
     TARGET            = aarch64-unknown-none-softfloat
     KERNEL_BIN        = kernel8.img
@@ -42,11 +49,18 @@ else ifeq ($(BSP),rpi4)
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
-# Export for build.rs
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+
+# Export for build.rs.
 export LINKER_FILE
 
-QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+KERNEL_ELF = target/$(TARGET)/release/kernel
+
 
+
+##--------------------------------------------------------------------------------------------------
+## Command building blocks
+##--------------------------------------------------------------------------------------------------
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
@@ -63,85 +77,110 @@ OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
     -O binary
 
-KERNEL_ELF = target/$(TARGET)/release/kernel
-
-DOCKER_IMAGE         = rustembedded/osdev-utils
-DOCKER_CMD           = docker run --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
-DOCKER_CMD_INTERACT  = $(DOCKER_CMD) -i -t
-DOCKER_ARG_DIR_UTILS = -v $(shell pwd)/../utils:/work/utils
-DOCKER_ARG_DIR_JTAG  = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
-DOCKER_ARG_DEV       = --privileged -v /dev:/dev
-DOCKER_ARG_NET       = --network host
+EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
+EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
+EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
+
+##------------------------------------------------------------------------------
+## Dockerization
+##------------------------------------------------------------------------------
+DOCKER_IMAGE          = rustembedded/osdev-utils
+DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
+DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
+DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
+DOCKER_ARG_DIR_JTAG   = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
+DOCKER_ARG_DEV        = --privileged -v /dev:/dev
+DOCKER_ARG_NET        = --network host
 
 DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
-DOCKER_GDB   = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
 DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
+DOCKER_GDB   = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
 
-# Dockerize commands that require USB device passthrough only on Linux
-ifeq ($(UNAME_S),Linux)
+# Dockerize commands, which require USB device passthrough, only on Linux.
+ifeq ($(shell uname -s),Linux)
     DOCKER_CMD_DEV = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DEV)
 
-    DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_IMAGE)
-    DOCKER_JTAGBOOT  = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_ARG_DIR_JTAG) $(DOCKER_IMAGE)
+    DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
+    DOCKER_JTAGBOOT  = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_ARG_DIR_JTAG) $(DOCKER_IMAGE)
     DOCKER_OPENOCD   = $(DOCKER_CMD_DEV) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
 else
     DOCKER_OPENOCD   = echo "Not yet supported on non-Linux systems."; \#
 endif
 
-EXEC_QEMU     = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
-EXEC_MINIPUSH = ruby ../utils/minipush.rb
 
-.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu chainboot jtagboot openocd gdb gdb-opt0  clippy \
-    clean readelf objdump nm check
+
+##--------------------------------------------------------------------------------------------------
+## Targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu chainboot clippy clean readelf objdump nm check
 
 all: $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Build the kernel ELF
+##------------------------------------------------------------------------------
 $(KERNEL_ELF):
 	$(call colorecho, "\nCompiling kernel - $(BSP)")
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
+##------------------------------------------------------------------------------
+## Build the stripped kernel binary
+##------------------------------------------------------------------------------
 $(KERNEL_BIN): $(KERNEL_ELF)
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Build the documentation
+##------------------------------------------------------------------------------
 doc:
 	$(call colorecho, "\nGenerating docs")
 	@$(DOC_CMD) --document-private-items --open
 
-ifeq ($(QEMU_MACHINE_TYPE),)
+##------------------------------------------------------------------------------
+## Run the kernel in QEMU
+##------------------------------------------------------------------------------
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
 qemu:
 	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
-else
+
+else # QEMU is supported.
+
 qemu: $(KERNEL_BIN)
 	$(call colorecho, "\nLaunching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
+
 endif
 
+##------------------------------------------------------------------------------
+## Push the kernel to the real HW target
+##------------------------------------------------------------------------------
 chainboot: $(KERNEL_BIN)
 	@$(DOCKER_CHAINBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(KERNEL_BIN)
 
-jtagboot:
-	@$(DOCKER_JTAGBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(JTAG_BOOT_IMAGE)
-
-openocd:
-	$(call colorecho, "\nLaunching OpenOCD")
-	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
-
-gdb: RUSTC_MISC_ARGS += -C debuginfo=2
-gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
-gdb gdb-opt0: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching GDB")
-	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
-
+##------------------------------------------------------------------------------
+## Run clippy
+##------------------------------------------------------------------------------
 clippy:
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
+##------------------------------------------------------------------------------
+## Clean
+##------------------------------------------------------------------------------
 clean:
 	rm -rf target $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Run readelf
+##------------------------------------------------------------------------------
 readelf: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching readelf")
 	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
+##------------------------------------------------------------------------------
+## Run objdump
+##------------------------------------------------------------------------------
 objdump: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching objdump")
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
@@ -150,10 +189,69 @@ objdump: $(KERNEL_ELF)
                 --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
+##------------------------------------------------------------------------------
+## Run nm
+##------------------------------------------------------------------------------
 nm: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
-# For rust-analyzer
+##------------------------------------------------------------------------------
+## Helper target for rust-analyzer
+##------------------------------------------------------------------------------
 check:
 	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Debugging targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: jtagboot openocd gdb gdb-opt0
+
+##------------------------------------------------------------------------------
+## Push the JTAG boot image to the real HW target
+##------------------------------------------------------------------------------
+jtagboot:
+	@$(DOCKER_JTAGBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(JTAG_BOOT_IMAGE)
+
+##------------------------------------------------------------------------------
+## Start OpenOCD session
+##------------------------------------------------------------------------------
+openocd:
+	$(call colorecho, "\nLaunching OpenOCD")
+	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
+
+##------------------------------------------------------------------------------
+## Start GDB session
+##------------------------------------------------------------------------------
+gdb: RUSTC_MISC_ARGS += -C debuginfo=2
+gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
+gdb gdb-opt0: $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching GDB")
+	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Testing targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: test test_boot
+
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
+test_boot test :
+	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+
+else # QEMU is supported.
+
+##------------------------------------------------------------------------------
+## Run boot test
+##------------------------------------------------------------------------------
+test_boot: $(KERNEL_BIN)
+	$(call colorecho, "\nBoot test - $(BSP)")
+	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
+
+test: test_boot
+
+endif
diff --git a/09_privilege_level/README.md b/09_privilege_level/README.md
index 4b4c538d8..645ec210b 100644
--- a/09_privilege_level/README.md
+++ b/09_privilege_level/README.md
@@ -552,4 +552,13 @@ diff -uNr 08_hw_debug_JTAG/src/main.rs 09_privilege_level/src/main.rs
      }
  }
 
+diff -uNr 08_hw_debug_JTAG/tests/boot_test_string.rb 09_privilege_level/tests/boot_test_string.rb
+--- 08_hw_debug_JTAG/tests/boot_test_string.rb
++++ 09_privilege_level/tests/boot_test_string.rb
+@@ -1,3 +1,3 @@
+ # frozen_string_literal: true
+
+-EXPECTED_PRINT = 'Spinning for 1 second'
++EXPECTED_PRINT = 'Echoing input now'
+
 ```
diff --git a/09_privilege_level/tests/boot_test_string.rb b/09_privilege_level/tests/boot_test_string.rb
new file mode 100644
index 000000000..f778b3d8c
--- /dev/null
+++ b/09_privilege_level/tests/boot_test_string.rb
@@ -0,0 +1,3 @@
+# frozen_string_literal: true
+
+EXPECTED_PRINT = 'Echoing input now'
diff --git a/10_virtual_mem_part1_identity_mapping/Makefile b/10_virtual_mem_part1_identity_mapping/Makefile
index e3dcaae86..0a2443acc 100644
--- a/10_virtual_mem_part1_identity_mapping/Makefile
+++ b/10_virtual_mem_part1_identity_mapping/Makefile
@@ -2,18 +2,25 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-include ../utils/color.mk.in
+include ../common/color.mk.in
 
-# Default to the RPi3
+##--------------------------------------------------------------------------------------------------
+## Optional, user-provided configuration values
+##--------------------------------------------------------------------------------------------------
+
+# Default to the RPi3.
 BSP ?= rpi3
 
 # Default to a serial device name that is common in Linux.
 DEV_SERIAL ?= /dev/ttyUSB0
 
-# Query the host system's kernel name
-UNAME_S = $(shell uname -s)
 
-# BSP-specific arguments
+
+##--------------------------------------------------------------------------------------------------
+## Hardcoded configuration values
+##--------------------------------------------------------------------------------------------------
+
+# BSP-specific arguments.
 ifeq ($(BSP),rpi3)
     TARGET            = aarch64-unknown-none-softfloat
     KERNEL_BIN        = kernel8.img
@@ -42,11 +49,18 @@ else ifeq ($(BSP),rpi4)
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
-# Export for build.rs
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+
+# Export for build.rs.
 export LINKER_FILE
 
-QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+KERNEL_ELF = target/$(TARGET)/release/kernel
+
 
+
+##--------------------------------------------------------------------------------------------------
+## Command building blocks
+##--------------------------------------------------------------------------------------------------
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
@@ -63,85 +77,110 @@ OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
     -O binary
 
-KERNEL_ELF = target/$(TARGET)/release/kernel
-
-DOCKER_IMAGE         = rustembedded/osdev-utils
-DOCKER_CMD           = docker run --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
-DOCKER_CMD_INTERACT  = $(DOCKER_CMD) -i -t
-DOCKER_ARG_DIR_UTILS = -v $(shell pwd)/../utils:/work/utils
-DOCKER_ARG_DIR_JTAG  = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
-DOCKER_ARG_DEV       = --privileged -v /dev:/dev
-DOCKER_ARG_NET       = --network host
+EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
+EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
+EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
+
+##------------------------------------------------------------------------------
+## Dockerization
+##------------------------------------------------------------------------------
+DOCKER_IMAGE          = rustembedded/osdev-utils
+DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
+DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
+DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
+DOCKER_ARG_DIR_JTAG   = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
+DOCKER_ARG_DEV        = --privileged -v /dev:/dev
+DOCKER_ARG_NET        = --network host
 
 DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
-DOCKER_GDB   = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
 DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
+DOCKER_GDB   = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
 
-# Dockerize commands that require USB device passthrough only on Linux
-ifeq ($(UNAME_S),Linux)
+# Dockerize commands, which require USB device passthrough, only on Linux.
+ifeq ($(shell uname -s),Linux)
     DOCKER_CMD_DEV = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DEV)
 
-    DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_IMAGE)
-    DOCKER_JTAGBOOT  = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_ARG_DIR_JTAG) $(DOCKER_IMAGE)
+    DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
+    DOCKER_JTAGBOOT  = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_ARG_DIR_JTAG) $(DOCKER_IMAGE)
     DOCKER_OPENOCD   = $(DOCKER_CMD_DEV) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
 else
     DOCKER_OPENOCD   = echo "Not yet supported on non-Linux systems."; \#
 endif
 
-EXEC_QEMU     = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
-EXEC_MINIPUSH = ruby ../utils/minipush.rb
 
-.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu chainboot jtagboot openocd gdb gdb-opt0  clippy \
-    clean readelf objdump nm check
+
+##--------------------------------------------------------------------------------------------------
+## Targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu chainboot clippy clean readelf objdump nm check
 
 all: $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Build the kernel ELF
+##------------------------------------------------------------------------------
 $(KERNEL_ELF):
 	$(call colorecho, "\nCompiling kernel - $(BSP)")
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
+##------------------------------------------------------------------------------
+## Build the stripped kernel binary
+##------------------------------------------------------------------------------
 $(KERNEL_BIN): $(KERNEL_ELF)
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Build the documentation
+##------------------------------------------------------------------------------
 doc:
 	$(call colorecho, "\nGenerating docs")
 	@$(DOC_CMD) --document-private-items --open
 
-ifeq ($(QEMU_MACHINE_TYPE),)
+##------------------------------------------------------------------------------
+## Run the kernel in QEMU
+##------------------------------------------------------------------------------
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
 qemu:
 	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
-else
+
+else # QEMU is supported.
+
 qemu: $(KERNEL_BIN)
 	$(call colorecho, "\nLaunching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
+
 endif
 
+##------------------------------------------------------------------------------
+## Push the kernel to the real HW target
+##------------------------------------------------------------------------------
 chainboot: $(KERNEL_BIN)
 	@$(DOCKER_CHAINBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(KERNEL_BIN)
 
-jtagboot:
-	@$(DOCKER_JTAGBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(JTAG_BOOT_IMAGE)
-
-openocd:
-	$(call colorecho, "\nLaunching OpenOCD")
-	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
-
-gdb: RUSTC_MISC_ARGS += -C debuginfo=2
-gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
-gdb gdb-opt0: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching GDB")
-	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
-
+##------------------------------------------------------------------------------
+## Run clippy
+##------------------------------------------------------------------------------
 clippy:
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
+##------------------------------------------------------------------------------
+## Clean
+##------------------------------------------------------------------------------
 clean:
 	rm -rf target $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Run readelf
+##------------------------------------------------------------------------------
 readelf: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching readelf")
 	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
+##------------------------------------------------------------------------------
+## Run objdump
+##------------------------------------------------------------------------------
 objdump: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching objdump")
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
@@ -150,10 +189,69 @@ objdump: $(KERNEL_ELF)
                 --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
+##------------------------------------------------------------------------------
+## Run nm
+##------------------------------------------------------------------------------
 nm: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
-# For rust-analyzer
+##------------------------------------------------------------------------------
+## Helper target for rust-analyzer
+##------------------------------------------------------------------------------
 check:
 	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Debugging targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: jtagboot openocd gdb gdb-opt0
+
+##------------------------------------------------------------------------------
+## Push the JTAG boot image to the real HW target
+##------------------------------------------------------------------------------
+jtagboot:
+	@$(DOCKER_JTAGBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(JTAG_BOOT_IMAGE)
+
+##------------------------------------------------------------------------------
+## Start OpenOCD session
+##------------------------------------------------------------------------------
+openocd:
+	$(call colorecho, "\nLaunching OpenOCD")
+	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
+
+##------------------------------------------------------------------------------
+## Start GDB session
+##------------------------------------------------------------------------------
+gdb: RUSTC_MISC_ARGS += -C debuginfo=2
+gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
+gdb gdb-opt0: $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching GDB")
+	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Testing targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: test test_boot
+
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
+test_boot test :
+	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+
+else # QEMU is supported.
+
+##------------------------------------------------------------------------------
+## Run boot test
+##------------------------------------------------------------------------------
+test_boot: $(KERNEL_BIN)
+	$(call colorecho, "\nBoot test - $(BSP)")
+	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
+
+test: test_boot
+
+endif
diff --git a/10_virtual_mem_part1_identity_mapping/tests/boot_test_string.rb b/10_virtual_mem_part1_identity_mapping/tests/boot_test_string.rb
new file mode 100644
index 000000000..f778b3d8c
--- /dev/null
+++ b/10_virtual_mem_part1_identity_mapping/tests/boot_test_string.rb
@@ -0,0 +1,3 @@
+# frozen_string_literal: true
+
+EXPECTED_PRINT = 'Echoing input now'
diff --git a/11_exceptions_part1_groundwork/Makefile b/11_exceptions_part1_groundwork/Makefile
index e3dcaae86..0a2443acc 100644
--- a/11_exceptions_part1_groundwork/Makefile
+++ b/11_exceptions_part1_groundwork/Makefile
@@ -2,18 +2,25 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-include ../utils/color.mk.in
+include ../common/color.mk.in
 
-# Default to the RPi3
+##--------------------------------------------------------------------------------------------------
+## Optional, user-provided configuration values
+##--------------------------------------------------------------------------------------------------
+
+# Default to the RPi3.
 BSP ?= rpi3
 
 # Default to a serial device name that is common in Linux.
 DEV_SERIAL ?= /dev/ttyUSB0
 
-# Query the host system's kernel name
-UNAME_S = $(shell uname -s)
 
-# BSP-specific arguments
+
+##--------------------------------------------------------------------------------------------------
+## Hardcoded configuration values
+##--------------------------------------------------------------------------------------------------
+
+# BSP-specific arguments.
 ifeq ($(BSP),rpi3)
     TARGET            = aarch64-unknown-none-softfloat
     KERNEL_BIN        = kernel8.img
@@ -42,11 +49,18 @@ else ifeq ($(BSP),rpi4)
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
-# Export for build.rs
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+
+# Export for build.rs.
 export LINKER_FILE
 
-QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+KERNEL_ELF = target/$(TARGET)/release/kernel
+
 
+
+##--------------------------------------------------------------------------------------------------
+## Command building blocks
+##--------------------------------------------------------------------------------------------------
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
@@ -63,85 +77,110 @@ OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
     -O binary
 
-KERNEL_ELF = target/$(TARGET)/release/kernel
-
-DOCKER_IMAGE         = rustembedded/osdev-utils
-DOCKER_CMD           = docker run --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
-DOCKER_CMD_INTERACT  = $(DOCKER_CMD) -i -t
-DOCKER_ARG_DIR_UTILS = -v $(shell pwd)/../utils:/work/utils
-DOCKER_ARG_DIR_JTAG  = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
-DOCKER_ARG_DEV       = --privileged -v /dev:/dev
-DOCKER_ARG_NET       = --network host
+EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
+EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
+EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
+
+##------------------------------------------------------------------------------
+## Dockerization
+##------------------------------------------------------------------------------
+DOCKER_IMAGE          = rustembedded/osdev-utils
+DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
+DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
+DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
+DOCKER_ARG_DIR_JTAG   = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
+DOCKER_ARG_DEV        = --privileged -v /dev:/dev
+DOCKER_ARG_NET        = --network host
 
 DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
-DOCKER_GDB   = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
 DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
+DOCKER_GDB   = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
 
-# Dockerize commands that require USB device passthrough only on Linux
-ifeq ($(UNAME_S),Linux)
+# Dockerize commands, which require USB device passthrough, only on Linux.
+ifeq ($(shell uname -s),Linux)
     DOCKER_CMD_DEV = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DEV)
 
-    DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_IMAGE)
-    DOCKER_JTAGBOOT  = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_ARG_DIR_JTAG) $(DOCKER_IMAGE)
+    DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
+    DOCKER_JTAGBOOT  = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_ARG_DIR_JTAG) $(DOCKER_IMAGE)
     DOCKER_OPENOCD   = $(DOCKER_CMD_DEV) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
 else
     DOCKER_OPENOCD   = echo "Not yet supported on non-Linux systems."; \#
 endif
 
-EXEC_QEMU     = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
-EXEC_MINIPUSH = ruby ../utils/minipush.rb
 
-.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu chainboot jtagboot openocd gdb gdb-opt0  clippy \
-    clean readelf objdump nm check
+
+##--------------------------------------------------------------------------------------------------
+## Targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu chainboot clippy clean readelf objdump nm check
 
 all: $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Build the kernel ELF
+##------------------------------------------------------------------------------
 $(KERNEL_ELF):
 	$(call colorecho, "\nCompiling kernel - $(BSP)")
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
+##------------------------------------------------------------------------------
+## Build the stripped kernel binary
+##------------------------------------------------------------------------------
 $(KERNEL_BIN): $(KERNEL_ELF)
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Build the documentation
+##------------------------------------------------------------------------------
 doc:
 	$(call colorecho, "\nGenerating docs")
 	@$(DOC_CMD) --document-private-items --open
 
-ifeq ($(QEMU_MACHINE_TYPE),)
+##------------------------------------------------------------------------------
+## Run the kernel in QEMU
+##------------------------------------------------------------------------------
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
 qemu:
 	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
-else
+
+else # QEMU is supported.
+
 qemu: $(KERNEL_BIN)
 	$(call colorecho, "\nLaunching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
+
 endif
 
+##------------------------------------------------------------------------------
+## Push the kernel to the real HW target
+##------------------------------------------------------------------------------
 chainboot: $(KERNEL_BIN)
 	@$(DOCKER_CHAINBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(KERNEL_BIN)
 
-jtagboot:
-	@$(DOCKER_JTAGBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(JTAG_BOOT_IMAGE)
-
-openocd:
-	$(call colorecho, "\nLaunching OpenOCD")
-	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
-
-gdb: RUSTC_MISC_ARGS += -C debuginfo=2
-gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
-gdb gdb-opt0: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching GDB")
-	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
-
+##------------------------------------------------------------------------------
+## Run clippy
+##------------------------------------------------------------------------------
 clippy:
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
+##------------------------------------------------------------------------------
+## Clean
+##------------------------------------------------------------------------------
 clean:
 	rm -rf target $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Run readelf
+##------------------------------------------------------------------------------
 readelf: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching readelf")
 	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
+##------------------------------------------------------------------------------
+## Run objdump
+##------------------------------------------------------------------------------
 objdump: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching objdump")
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
@@ -150,10 +189,69 @@ objdump: $(KERNEL_ELF)
                 --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
+##------------------------------------------------------------------------------
+## Run nm
+##------------------------------------------------------------------------------
 nm: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
-# For rust-analyzer
+##------------------------------------------------------------------------------
+## Helper target for rust-analyzer
+##------------------------------------------------------------------------------
 check:
 	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Debugging targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: jtagboot openocd gdb gdb-opt0
+
+##------------------------------------------------------------------------------
+## Push the JTAG boot image to the real HW target
+##------------------------------------------------------------------------------
+jtagboot:
+	@$(DOCKER_JTAGBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(JTAG_BOOT_IMAGE)
+
+##------------------------------------------------------------------------------
+## Start OpenOCD session
+##------------------------------------------------------------------------------
+openocd:
+	$(call colorecho, "\nLaunching OpenOCD")
+	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
+
+##------------------------------------------------------------------------------
+## Start GDB session
+##------------------------------------------------------------------------------
+gdb: RUSTC_MISC_ARGS += -C debuginfo=2
+gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
+gdb gdb-opt0: $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching GDB")
+	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Testing targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: test test_boot
+
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
+test_boot test :
+	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+
+else # QEMU is supported.
+
+##------------------------------------------------------------------------------
+## Run boot test
+##------------------------------------------------------------------------------
+test_boot: $(KERNEL_BIN)
+	$(call colorecho, "\nBoot test - $(BSP)")
+	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
+
+test: test_boot
+
+endif
diff --git a/11_exceptions_part1_groundwork/README.md b/11_exceptions_part1_groundwork/README.md
index df8ecd6f9..629f5f091 100644
--- a/11_exceptions_part1_groundwork/README.md
+++ b/11_exceptions_part1_groundwork/README.md
@@ -1016,4 +1016,13 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/main.rs 11_exceptions_part1_
 
      // Discard any spurious received characters before going into echo mode.
 
+diff -uNr 10_virtual_mem_part1_identity_mapping/tests/boot_test_string.rb 11_exceptions_part1_groundwork/tests/boot_test_string.rb
+--- 10_virtual_mem_part1_identity_mapping/tests/boot_test_string.rb
++++ 11_exceptions_part1_groundwork/tests/boot_test_string.rb
+@@ -1,3 +1,3 @@
+ # frozen_string_literal: true
+
+-EXPECTED_PRINT = 'Echoing input now'
++EXPECTED_PRINT = 'lr : 0x'
+
 ```
diff --git a/11_exceptions_part1_groundwork/tests/boot_test_string.rb b/11_exceptions_part1_groundwork/tests/boot_test_string.rb
new file mode 100644
index 000000000..200cd9713
--- /dev/null
+++ b/11_exceptions_part1_groundwork/tests/boot_test_string.rb
@@ -0,0 +1,3 @@
+# frozen_string_literal: true
+
+EXPECTED_PRINT = 'lr : 0x'
diff --git a/12_integrated_testing/Makefile b/12_integrated_testing/Makefile
index 4c2fb069a..080049863 100644
--- a/12_integrated_testing/Makefile
+++ b/12_integrated_testing/Makefile
@@ -2,18 +2,32 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-include ../utils/color.mk.in
+include ../common/color.mk.in
 
-# Default to the RPi3
+##--------------------------------------------------------------------------------------------------
+## Optional, user-provided configuration values
+##--------------------------------------------------------------------------------------------------
+
+# Default to the RPi3.
 BSP ?= rpi3
 
 # Default to a serial device name that is common in Linux.
 DEV_SERIAL ?= /dev/ttyUSB0
 
-# Query the host system's kernel name
-UNAME_S = $(shell uname -s)
+# Optional integration test name.
+ifdef TEST
+    TEST_ARG = --test $(TEST)
+else
+    TEST_ARG = --test '*'
+endif
+
+
 
-# BSP-specific arguments
+##--------------------------------------------------------------------------------------------------
+## Hardcoded configuration values
+##--------------------------------------------------------------------------------------------------
+
+# BSP-specific arguments.
 ifeq ($(BSP),rpi3)
     TARGET            = aarch64-unknown-none-softfloat
     KERNEL_BIN        = kernel8.img
@@ -44,20 +58,18 @@ else ifeq ($(BSP),rpi4)
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
-# Export for build.rs
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+
+# Export for build.rs.
 export LINKER_FILE
 
-# Testing-specific arguments
-ifdef TEST
-    ifeq ($(TEST),unit)
-        TEST_ARG = --lib
-    else
-        TEST_ARG = --test $(TEST)
-    endif
-endif
+KERNEL_ELF = target/$(TARGET)/release/kernel
+
 
-QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
 
+##--------------------------------------------------------------------------------------------------
+## Command building blocks
+##--------------------------------------------------------------------------------------------------
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
@@ -75,105 +87,110 @@ OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
     -O binary
 
-KERNEL_ELF = target/$(TARGET)/release/kernel
-
-DOCKER_IMAGE         = rustembedded/osdev-utils
-DOCKER_CMD           = docker run --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
-DOCKER_CMD_INTERACT  = $(DOCKER_CMD) -i -t
-DOCKER_ARG_DIR_UTILS = -v $(shell pwd)/../utils:/work/utils
-DOCKER_ARG_DIR_JTAG  = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
-DOCKER_ARG_DEV       = --privileged -v /dev:/dev
-DOCKER_ARG_NET       = --network host
+EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
+EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
+EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
+
+##------------------------------------------------------------------------------
+## Dockerization
+##------------------------------------------------------------------------------
+DOCKER_IMAGE          = rustembedded/osdev-utils
+DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
+DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
+DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
+DOCKER_ARG_DIR_JTAG   = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
+DOCKER_ARG_DEV        = --privileged -v /dev:/dev
+DOCKER_ARG_NET        = --network host
 
 DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
-DOCKER_GDB   = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
-DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_IMAGE)
 DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
+DOCKER_GDB   = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
 
-# Dockerize commands that require USB device passthrough only on Linux
-ifeq ($(UNAME_S),Linux)
+# Dockerize commands, which require USB device passthrough, only on Linux.
+ifeq ($(shell uname -s),Linux)
     DOCKER_CMD_DEV = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DEV)
 
-    DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_IMAGE)
-    DOCKER_JTAGBOOT  = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_ARG_DIR_JTAG) $(DOCKER_IMAGE)
+    DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
+    DOCKER_JTAGBOOT  = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_ARG_DIR_JTAG) $(DOCKER_IMAGE)
     DOCKER_OPENOCD   = $(DOCKER_CMD_DEV) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
 else
     DOCKER_OPENOCD   = echo "Not yet supported on non-Linux systems."; \#
 endif
 
-EXEC_QEMU     = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
-EXEC_MINIPUSH = ruby ../utils/minipush.rb
 
-.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu test chainboot jtagboot openocd gdb gdb-opt0 \
-    clippy clean readelf objdump nm check
+
+##--------------------------------------------------------------------------------------------------
+## Targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu chainboot clippy clean readelf objdump nm check
 
 all: $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Build the kernel ELF
+##------------------------------------------------------------------------------
 $(KERNEL_ELF):
 	$(call colorecho, "\nCompiling kernel - $(BSP)")
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
+##------------------------------------------------------------------------------
+## Build the stripped kernel binary
+##------------------------------------------------------------------------------
 $(KERNEL_BIN): $(KERNEL_ELF)
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Build the documentation
+##------------------------------------------------------------------------------
 doc:
 	$(call colorecho, "\nGenerating docs")
 	@$(DOC_CMD) --document-private-items --open
 
-ifeq ($(QEMU_MACHINE_TYPE),)
-qemu test:
+##------------------------------------------------------------------------------
+## Run the kernel in QEMU
+##------------------------------------------------------------------------------
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
+qemu:
 	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
-else
+
+else # QEMU is supported.
+
 qemu: $(KERNEL_BIN)
 	$(call colorecho, "\nLaunching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
-define KERNEL_TEST_RUNNER
-    #!/usr/bin/env bash
-
-    TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
-    TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
-
-    $(OBJCOPY_CMD) $$TEST_ELF $$TEST_BINARY
-    $(DOCKER_TEST) ruby tests/runner.rb $(EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
-endef
-
-export KERNEL_TEST_RUNNER
-test: FEATURES += --features test_build
-test:
-	$(call colorecho, "\nCompiling test(s) - $(BSP)")
-	@mkdir -p target
-	@echo "$$KERNEL_TEST_RUNNER" > target/kernel_test_runner.sh
-	@chmod +x target/kernel_test_runner.sh
-	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) $(TEST_ARG)
 endif
 
+##------------------------------------------------------------------------------
+## Push the kernel to the real HW target
+##------------------------------------------------------------------------------
 chainboot: $(KERNEL_BIN)
 	@$(DOCKER_CHAINBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(KERNEL_BIN)
 
-jtagboot:
-	@$(DOCKER_JTAGBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(JTAG_BOOT_IMAGE)
-
-openocd:
-	$(call colorecho, "\nLaunching OpenOCD")
-	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
-
-gdb: RUSTC_MISC_ARGS += -C debuginfo=2
-gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
-gdb gdb-opt0: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching GDB")
-	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
-
+##------------------------------------------------------------------------------
+## Run clippy
+##------------------------------------------------------------------------------
 clippy:
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
+##------------------------------------------------------------------------------
+## Clean
+##------------------------------------------------------------------------------
 clean:
 	rm -rf target $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Run readelf
+##------------------------------------------------------------------------------
 readelf: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching readelf")
 	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
+##------------------------------------------------------------------------------
+## Run objdump
+##------------------------------------------------------------------------------
 objdump: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching objdump")
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
@@ -182,10 +199,108 @@ objdump: $(KERNEL_ELF)
                 --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
+##------------------------------------------------------------------------------
+## Run nm
+##------------------------------------------------------------------------------
 nm: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
-# For rust-analyzer
+##------------------------------------------------------------------------------
+## Helper target for rust-analyzer
+##------------------------------------------------------------------------------
 check:
 	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Debugging targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: jtagboot openocd gdb gdb-opt0
+
+##------------------------------------------------------------------------------
+## Push the JTAG boot image to the real HW target
+##------------------------------------------------------------------------------
+jtagboot:
+	@$(DOCKER_JTAGBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(JTAG_BOOT_IMAGE)
+
+##------------------------------------------------------------------------------
+## Start OpenOCD session
+##------------------------------------------------------------------------------
+openocd:
+	$(call colorecho, "\nLaunching OpenOCD")
+	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
+
+##------------------------------------------------------------------------------
+## Start GDB session
+##------------------------------------------------------------------------------
+gdb: RUSTC_MISC_ARGS += -C debuginfo=2
+gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
+gdb gdb-opt0: $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching GDB")
+	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Testing targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: test test_boot test_unit test_integration
+
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
+test_boot test_unit test_integration test:
+	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+
+else # QEMU is supported.
+
+##------------------------------------------------------------------------------
+## Run boot test
+##------------------------------------------------------------------------------
+test_boot: $(KERNEL_BIN)
+	$(call colorecho, "\nBoot test - $(BSP)")
+	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
+
+##------------------------------------------------------------------------------
+## Helpers for unit and integration test targets
+##------------------------------------------------------------------------------
+define KERNEL_TEST_RUNNER
+    #!/usr/bin/env bash
+
+    TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
+    TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
+
+    $(OBJCOPY_CMD) $$TEST_ELF $$TEST_BINARY
+    $(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
+endef
+
+export KERNEL_TEST_RUNNER
+
+define test_prepare
+    @mkdir -p target
+    @echo "$$KERNEL_TEST_RUNNER" > target/kernel_test_runner.sh
+    @chmod +x target/kernel_test_runner.sh
+endef
+
+test_unit test_integration: FEATURES += --features test_build
+
+##------------------------------------------------------------------------------
+## Run unit test(s)
+##------------------------------------------------------------------------------
+test_unit:
+	$(call colorecho, "\nCompiling unit test(s) - $(BSP)")
+	$(call test_prepare)
+	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) --lib
+
+##------------------------------------------------------------------------------
+## Run integration test(s)
+##------------------------------------------------------------------------------
+test_integration:
+	$(call colorecho, "\nCompiling integration test(s) - $(BSP)")
+	$(call test_prepare)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) $(TEST_ARG)
+
+test: test_boot test_unit test_integration
+
+endif
diff --git a/12_integrated_testing/README.md b/12_integrated_testing/README.md
index bb1677e98..c25e30474 100644
--- a/12_integrated_testing/README.md
+++ b/12_integrated_testing/README.md
@@ -2,12 +2,14 @@
 
 ## tl;dr
 
-- We implement our own test framework using `Rust`'s [custom_test_frameworks] feature by enabling
-  `Unit Tests` and `Integration Tests` using `QEMU`.
-- It is also possible to have test automation for the kernel's `console` (provided over `UART` in
-  our case): Sending strings/characters to the console and expecting specific answers in return.
+- We implement our own integrated test framework using `Rust`'s [custom_test_frameworks] feature by
+  enabling `Unit Tests` and `Integration Tests` using `QEMU`.
+- It is also possible to have test automation for I/O with the kernel's `console` (provided over
+  `UART` in our case). That is, sending strings/characters to the console and expecting specific
+  answers in return.
+- The already existing basic `boot test` remains unchanged.
 
-<img src="../doc/13_demo.gif" width="880">
+<img src="../doc/12_demo.gif" width="880">
 
 ## Table of Contents
 
@@ -40,13 +42,13 @@ functionality. For example:
   - Stalling execution during boot to test the kernel's timekeeping code by spinning for 1 second.
   - Willingly causing exceptions to see the exception handler running.
 
-The feature set of the kernel is now rich enough so that it makes sense to introduce proper testing
-modeled after Rust's [native testing framework]. This tutorial extends our kernel with three basic
-testing facilities:
+The feature set of the kernel is now rich enough so that it makes sense to introduce proper
+integrated testing modeled after Rust's [native testing framework]. This tutorial extends our single
+existing kernel test with three new testing facilities:
   - Classic `Unit Tests`.
   - [Integration Tests] (self-contained tests stored in the `$CRATE/tests/` directory).
-  - `Console Tests`. These are integration tests acting on external stimuli - aka `console` input.
-    Sending strings/characters to the console and expecting specific answers in return.
+  - `Console I/O Tests`. These are integration tests acting on external stimuli - aka `console`
+    input. Sending strings/characters to the console and expecting specific answers in return.
 
 [native testing framework]: https://doc.rust-lang.org/book/ch11-00-testing.html
 
@@ -64,7 +66,7 @@ dependencies on the standard library, but comes at the cost of having a reduced
 of annotating functions with `#[test]`, the `#[test_case]` attribute must be used. Additionally, we
 need to write a `test_runner` function, which is supposed to execute all the functions annotated
 with `#[test_case]`. This is barely enough to get `Unit Tests` running, though. There will be some
-more challenges that need solving for getting `Integration Tests` running as well.
+more challenges that need be solved for getting `Integration Tests` running as well.
 
 Please note that for automation purposes, all testing will be done in `QEMU` and not on real
 hardware.
@@ -82,15 +84,23 @@ additional insights.
 
 ## Implementation
 
-We introduce a new `Makefile` target:
+We introduce two new `Makefile` targets:
 
 ```console
-$ make test
+$ make test_unit
+$ make test_integration
 ```
 
-In essence, `make test` will execute `cargo test` instead of `cargo rustc`. The details will be
-explained in due course. The rest of the tutorial will explain as chronologically as possible what
-happens when `make test` aka `cargo test` runs.
+In essence, the `make test_*` targets will execute `cargo test` instead of `cargo rustc`. The
+details will be explained in due course. The rest of the tutorial will explain as chronologically as
+possible what happens when `make test_*` aka `cargo test` runs.
+
+Please note that the new targets are added to the existing `make test` target, so this is now your
+one-stop target to execute all possible tests for the kernel:
+
+```Makefile
+test: test_boot test_unit test_integration
+```
 
 ### Test Organization
 
@@ -166,8 +176,9 @@ that we are supposed to provide. This is the one that will be called by the `car
 ```rust
 /// The default runner for unit tests.
 pub fn test_runner(tests: &[&test_types::UnitTest]) {
+    // This line will be printed as the test header.
     println!("Running {} tests", tests.len());
-    println!("-------------------------------------------------------------------\n");
+
     for (i, test) in tests.iter().enumerate() {
         print!("{:>3}. {:.<58}", i + 1, test.name);
 
@@ -255,7 +266,7 @@ opportunity to cut down on setup code.
 [tutorial 03]: ../03_hacky_hello_world
 
 As a matter of fact, for the `Raspberrys`, nothing needs to be done, so the function is empy. But
-this might be different for other hardware emulated by QEMU, so it makes sense to introduce the
+this might be different for other hardware emulated by `QEMU`, so it makes sense to introduce the
 function now to make it easier in case new `BSPs` are added to the kernel in the future.
 
 Next, the reexported `test_main()` is called, which will call our `test_runner()` which finally
@@ -265,9 +276,10 @@ prints the unit test names and executes them.
 
 Let's recap where we are right now:
 
-We've enabled `custom_test_frameworks` in `lib.rs` to a point where, when using `make test`, the
-code gets compiled to a test kernel binary that eventually executes all the (yet-to-be-defined)
-`UnitTest` instances by executing all the way from `_start()` to our `test_runner()` function.
+We've enabled `custom_test_frameworks` in `lib.rs` to a point where, when using a `make test_unit`
+target, the code gets compiled to a test kernel binary that eventually executes all the
+(yet-to-be-defined) `UnitTest` instances by executing all the way from `_start()` to our
+`test_runner()` function.
 
 Through mechanisms that are explained later, `cargo` will now instantiate a `QEMU` process that
 exectues this test kernel. The question now is: How is test success/failure communicated to `cargo`?
@@ -339,30 +351,30 @@ concludes:
 #[linkage = "weak"]
 #[no_mangle]
 fn _panic_exit() -> ! {
-    #[cfg(not(test_build))]
+    #[cfg(not(feature = "test_build"))]
     {
         cpu::wait_forever()
     }
 
-    #[cfg(test_build)]
+    #[cfg(feature = "test_build")]
     {
         cpu::qemu_exit_failure()
     }
 }
 ```
 
-In case none of the unit tests panicked, `lib.rs`'s `kernel_init()` calls `cpu::qemu_exit_success()`
-to successfully conclude the unit test run.
+In case _none_ of the unit tests panicked, `lib.rs`'s `kernel_init()` calls
+`cpu::qemu_exit_success()` to successfully conclude the unit test run.
 
 ### Controlling Test Kernel Execution
 
 Now is a good time to catch up on how the test kernel binary is actually being executed. Normally,
 `cargo test` would try to execute the compiled binary as a normal child process. This would fail
-horribly because we build a kernel, and not a userspace process. Also, chances are very high that
-you sit in front of an `x86` machine, whereas the RPi kernel is `AArch64`.
+horribly because we build a kernel, and not a userspace process. Also, chances are high that you sit
+in front of an `x86` machine, whereas the RPi kernel is `AArch64`.
 
 Therefore, we need to install some hooks that make sure the test kernel gets executed inside `QEMU`,
-quite like it is done for the existing `make qemu` target that is in place since tutorial 1. The
+quite like it is done for the existing `make qemu` target that is in place since `tutorial 1`. The
 first step is to add a new file to the project, `.cargo/config.toml`:
 
 ```toml
@@ -374,10 +386,13 @@ Instead of executing a compilation result directly, the `runner` flag will instr
 delegate the execution. Using the setting depicted above, `target/kernel_test_runner.sh` will be
 executed and given the full path to the compiled test kernel as the first command line argument.
 
-The file `kernel_test_runner.sh` does not exist by default. We generate it on demand throguh the
-`make test` target:
+The file `kernel_test_runner.sh` does not exist by default. We generate it on demand when one of the
+`make test_*` targets is called:
 
 ```Makefile
+##------------------------------------------------------------------------------
+## Helpers for unit and integration test targets
+##------------------------------------------------------------------------------
 define KERNEL_TEST_RUNNER
     #!/usr/bin/env bash
 
@@ -385,16 +400,26 @@ define KERNEL_TEST_RUNNER
     TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
 
     $(OBJCOPY_CMD) $$TEST_ELF $$TEST_BINARY
-    $(DOCKER_TEST) ruby tests/runner.rb $(EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
+    $(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
 endef
 
 export KERNEL_TEST_RUNNER
-test: FEATURES += --features test_build
-test:
-	@mkdir -p target
-	@echo "$$KERNEL_TEST_RUNNER" > target/kernel_test_runner.sh
-	@chmod +x target/kernel_test_runner.sh
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) $(TEST_ARG)
+
+define test_prepare
+    @mkdir -p target
+    @echo "$$KERNEL_TEST_RUNNER" > target/kernel_test_runner.sh
+    @chmod +x target/kernel_test_runner.sh
+endef
+
+test_unit test_integration: FEATURES += --features test_build
+
+##------------------------------------------------------------------------------
+## Run unit test(s)
+##------------------------------------------------------------------------------
+test_unit:
+	$(call colorecho, "\nCompiling unit test(s) - $(BSP)")
+	$(call test_prepare)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) --lib
 ```
 
 It first does the standard `objcopy` step to strip the `ELF` down to a raw binary. Just like in all
@@ -403,44 +428,76 @@ provided to it by `cargo`, and finally compiles a `docker` command to execute th
 reference, here it is fully resolved for an `RPi3 BSP`:
 
 ```bash
-docker run -i --rm -v /opt/rust-raspberrypi-OS-tutorials/12_integrated_testing:/work/tutorial -w /work/tutorial rustembedded/osdev-utils ruby tests/runner.rb qemu-system-aarch64 -M raspi3 -serial stdio -display none -semihosting -kernel $TEST_BINARY
+docker run --rm -v /opt/rust-raspberrypi-OS-tutorials/12_integrated_testing:/work/tutorial -w /work/tutorial -v /opt/rust-raspberrypi-OS-tutorials/12_integrated_testing/../common:/work/common rustembedded/osdev-utils ruby ../common/tests/dispatch.rb qemu-system-aarch64 -M raspi3 -serial stdio -display none -semihosting -kernel $TEST_BINARY
 ```
 
-We're still not done with all the redirections. Spotted the `ruby tests/runner.rb` part that gets
-excuted inside Docker?
+This command is quite similar to the one used in the `make test_boot` target that we have since
+`tutorial 3`. However, we never bothered explaining it, so lets take a closer look this time. One of
+the key ingredients is that we execute this script: `ruby ../common/tests/dispatch.rb`.
 
 #### Wrapping QEMU Test Execution
 
-`runner.rb` is a [Ruby] wrapper script around `QEMU` that, for unit tests, catches the case that a
-test gets stuck, e.g. in an unintentional busy loop or a crash. If `runner.rb` does not observe any
-output of the test kernel for `5 seconds`, it cancels the execution and reports a failure back to
-`cargo`. If `QEMU` exited itself by means of `aarch64::exit_success() / aarch64::exit_failure()`,
-the respective exit status code is passed through. The essential part happens here in `class
-RawTest`:
+`dispatch.rb` is a [Ruby] script which first determines what kind of test is due by inspecting the
+`QEMU`-command that was given to it. In case of `unit tests`, we are only interested if they all
+executed successfully, which can be checked by inspecting `QEMU`'s exit code. So the script takes
+the provided qemu command it got from `ARGV`, and creates and runs an instance of `ExitCodeTest`:
 
 ```ruby
-def exec
-    error = 'Timed out waiting for test'
+require_relative 'boot_test'
+require_relative 'console_io_test'
+require_relative 'exit_code_test'
+
+qemu_cmd = ARGV.join(' ')
+binary = ARGV.last
+test_name = binary.gsub(%r{.*deps/}, '').split('-')[0]
+
+case test_name
+when 'kernel8.img'
+    load 'tests/boot_test_string.rb' # provides 'EXPECTED_PRINT'
+    BootTest.new(qemu_cmd, EXPECTED_PRINT).run # Doesn't return
+
+when 'libkernel'
+    ExitCodeTest.new(qemu_cmd, 'Kernel library unit tests').run # Doesn't return
+```
+
+The easy case is `QEMU` existing by itself by means of `aarch64::exit_success()` or
+`aarch64::exit_failure()`. But the script can also catch the case of a test that gets stuck, e.g. in
+an unintentional busy loop or a crash. If `ExitCodeTest` does not observe any output of the test
+kernel for `MAX_WAIT_SECS`, it cancels the execution and marks the test as failed. Test success or
+failure is finally reported back to `cargo`.
+
+Here is the essential part happening in `class ExitCodeTest` (If `QEMU` exits itself, an `EOFError`
+is thrown):
+
+```ruby
+def run_concrete_test
     io = IO.popen(@qemu_cmd)
 
-    while IO.select([io], nil, nil, MAX_WAIT_SECS)
-        begin
-            @output << io.read_nonblock(1024)
-        rescue EOFError
-            io.close
-            error = $CHILD_STATUS.to_i != 0
-            break
-        end
+    Timeout.timeout(MAX_WAIT_SECS) do
+        @test_output << io.read_nonblock(1024) while IO.select([io])
     end
+rescue EOFError
+    io.close
+    @test_error = $CHILD_STATUS.to_i.zero? ? false : 'QEMU exit status != 0'
+rescue Timeout::Error
+    @test_error = 'Timed out waiting for test'
+rescue StandardError => e
+    @test_error = e.message
+ensure
+    post_process_output
+end
 ```
 
+Please note that `dispatch.rb` and all its dependencies live in the shared folder
+`../common/tests/`.
+
 [Ruby]: https://www.ruby-lang.org/
 
 ### Writing Unit Tests
 
-Alright, that's a wrap for the whole chain from `make test` all the way to reporting the test exit
-status back to `cargo test`. It is a lot to digest already, but we haven't even learned to write
-`Unit Tests` yet.
+Alright, that's a wrap for the whole chain from `make test_unit` all the way to reporting the test
+exit status back to `cargo test`. It is a lot to digest already, but we haven't even learned to
+write `Unit Tests` yet.
 
 In essence, it is almost like in `std` environments, with the difference that `#[test]` can't be
 used, because it is part of the standard library. The `no_std` replacement attribute provided by
@@ -485,9 +542,9 @@ Since this is a bit boiler-platy with the const and name definition, let's write
 macro] named `#[kernel_test]` to simplify this. It should work this way:
 
   1. Must be put before functions that take no arguments and return nothing.
-  2. Automatically constructs a `const UnitTest` from attributed functions like shown above by:
+  1. Automatically constructs a `const UnitTest` from attributed functions like shown above by:
       1. Converting the function name to the `name` member of the `UnitTest` struct.
-      2. Populating the `test_func` member with a closure that executes the body of the attributed
+      1. Populating the `test_func` member with a closure that executes the body of the attributed
          function.
 
 For the sake of brevity, we're not going to discuss the macro implementation. [The source is in the
@@ -609,12 +666,12 @@ function? This marks the function in `lib.rs` as a [weak symbol]. Let's look at
 #[linkage = "weak"]
 #[no_mangle]
 fn _panic_exit() -> ! {
-    #[cfg(not(test_build))]
+    #[cfg(not(feature = "test_build"))]
     {
         cpu::wait_forever()
     }
 
-    #[cfg(test_build)]
+    #[cfg(feature = "test_build")]
     {
         cpu::qemu_exit_failure()
     }
@@ -624,7 +681,7 @@ fn _panic_exit() -> ! {
 [weak symbol]: https://en.wikipedia.org/wiki/Weak_symbol
 
 This enables integration tests in `$CRATE/tests/` to override this function according to their
-needs. This is useful because depending on the kind of test, a `panic!` could mean success or
+needs. This is useful, because depending on the kind of test, a `panic!` could mean success or
 failure. For example, `tests/02_exception_sync_page_fault.rs` is intentionally causing a page fault,
 so the wanted outcome is a `panic!`. Here is the whole test (minus some inline comments):
 
@@ -646,10 +703,10 @@ unsafe fn kernel_init() -> ! {
     exception::handling_init();
     bsp::console::qemu_bring_up_console();
 
+    // This line will be printed as the test header.
     println!("Testing synchronous exception handling by causing a page fault");
-    println!("-------------------------------------------------------------------\n");
 
-    if let Err(string) = memory::mmu::mmu().init() {
+    if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
         println!("MMU: {}", string);
         cpu::qemu_exit_failure()
     }
@@ -661,7 +718,6 @@ unsafe fn kernel_init() -> ! {
     // If execution reaches here, the memory access above did not cause a page fault exception.
     cpu::qemu_exit_failure()
 }
-
 ```
 
 The `_panic_exit()` version that makes `QEMU` return `0` (indicating test success) is pulled in by
@@ -671,22 +727,21 @@ The `_panic_exit()` version that makes `QEMU` return `0` (indicating test succes
 
 As the kernel or OS grows, it will be more and more interesting to test user/kernel interaction
 through the serial console. That is, sending strings/characters to the console and expecting
-specific answers in return. The `runner.rb` wrapper script provides infrastructure to do this with
-little overhead. It basically works like this:
+specific answers in return. The `dispatch.rb` wrapper script provides infrastructure to recognize
+and dispatch console I/O tests with little overhead. It basically works like this:
 
   1. For each integration test, check if a companion file to the `.rs` test file exists.
       - A companion file has the same name, but ends in `.rb`.
-      - The companion file contains one or more console subtests.
-  2. If it exists, load the file to dynamically import the console subtests.
-  3. Spawn `QEMU` and attach to the serial console.
-  4. Run the console subtests.
+      - The companion file contains one or more console I/O subtests.
+  1. If it exists, load the file to dynamically import the console subtests.
+  1. Create a `ConsoleIOTest` instance and run it.
+      - This first spawns `QEMU` and attaches to `QEMU`'s serial console emulation.
+      - Then it runs all console subtests on it.
 
 Here is an excerpt from `00_console_sanity.rb` showing a subtest that does a handshake with the
 kernel over the console:
 
 ```ruby
-TIMEOUT_SECS = 3
-
 # Verify sending and receiving works as expected.
 class TxRxHandshake
     def name
@@ -695,7 +750,7 @@ class TxRxHandshake
 
     def run(qemu_out, qemu_in)
         qemu_in.write_nonblock('ABC')
-        raise('TX/RX test failed') if qemu_out.expect('OK1234', TIMEOUT_SECS).nil?
+        raise ExpectTimeoutError if qemu_out.expect('OK1234', TIMEOUT_SECS).nil?
     end
 end
 ```
@@ -727,20 +782,22 @@ unsafe fn kernel_init() -> ! {
 
 ## Test it
 
-Believe it or not, that is all. There are three ways you can run tests:
+Believe it or not, that is all. There are four ways you can run tests now:
 
-  1. `make test` will run all tests back-to-back.
-  2. `TEST=unit make test` will run `libkernel`'s unit tests.
-  3. `TEST=TEST_NAME make test` will run a specficic integration test.
-      - For example, `TEST=01_timer_sanity make test`
+  1. `make test` will run all tests back-to-back. That is, the ever existing `boot test` first, then
+     `unit tests`, then `integration tests`.
+  1. `make test_unit` will run `libkernel`'s unit tests.
+  1. `make test_integration` will run all integration tests back-to-back.
+  1. `TEST=TEST_NAME make test_integration` will run a specficic integration test.
+      - For example, `TEST=01_timer_sanity make test_integration`
 
 ```console
 $ make test
 [...]
 
-     Running unittests (target/aarch64-unknown-none-softfloat/release/deps/libkernel-836110ac5dd535ba)
+     Running unittests (target/aarch64-unknown-none-softfloat/release/deps/libkernel-142a8d94bc9c615a)
          -------------------------------------------------------------------
-         🦀 Running 8 tests
+         🦀 Running 6 tests
          -------------------------------------------------------------------
 
            1. virt_mem_layout_sections_are_64KiB_aligned................[ok]
@@ -749,17 +806,18 @@ $ make test
            4. kernel_tables_in_bss......................................[ok]
            5. size_of_tabledescriptor_equals_64_bit.....................[ok]
            6. size_of_pagedescriptor_equals_64_bit......................[ok]
-           7. zero_volatile_works.......................................[ok]
-           8. bss_section_is_sane.......................................[ok]
 
          -------------------------------------------------------------------
-         ✅ Success: libkernel
+         ✅ Success: Kernel library unit tests
          -------------------------------------------------------------------
 
 
-     Running tests/00_console_sanity.rs (target/aarch64-unknown-none-softfloat/release/deps/00_console_sanity-78c12c5472d40df7)
+
+Compiling integration test(s) - rpi3
+    Finished release [optimized] target(s) in 0.00s
+     Running tests/00_console_sanity.rs (target/aarch64-unknown-none-softfloat/release/deps/00_console_sanity-c06130838f14dbff)
          -------------------------------------------------------------------
-         🦀 Running 3 console-based tests
+         🦀 Running 3 console I/O tests
          -------------------------------------------------------------------
 
            1. Transmit and Receive handshake............................[ok]
@@ -767,11 +825,11 @@ $ make test
            3. Receive statistics........................................[ok]
 
          -------------------------------------------------------------------
-         ✅ Success: 00_console_sanity
+         ✅ Success: 00_console_sanity.rs
          -------------------------------------------------------------------
 
 
-     Running tests/01_timer_sanity.rs (target/aarch64-unknown-none-softfloat/release/deps/01_timer_sanity-4866734b14c83c9b)
+     Running tests/01_timer_sanity.rs (target/aarch64-unknown-none-softfloat/release/deps/01_timer_sanity-62a954d22239d1a3)
          -------------------------------------------------------------------
          🦀 Running 3 tests
          -------------------------------------------------------------------
@@ -781,11 +839,11 @@ $ make test
            3. spin_accuracy_check_1_second..............................[ok]
 
          -------------------------------------------------------------------
-         ✅ Success: 01_timer_sanity
+         ✅ Success: 01_timer_sanity.rs
          -------------------------------------------------------------------
 
 
-     Running tests/02_exception_sync_page_fault.rs (target/aarch64-unknown-none-softfloat/release/deps/02_exception_sync_page_fault-f2d0885cada1105b)
+     Running tests/02_exception_sync_page_fault.rs (target/aarch64-unknown-none-softfloat/release/deps/02_exception_sync_page_fault-2d8ec603ef1c4d8e)
          -------------------------------------------------------------------
          🦀 Testing synchronous exception handling by causing a page fault
          -------------------------------------------------------------------
@@ -800,7 +858,7 @@ $ make test
          [...]
 
          -------------------------------------------------------------------
-         ✅ Success: 02_exception_sync_page_fault
+         ✅ Success: 02_exception_sync_page_fault.rs
          -------------------------------------------------------------------
 ```
 
@@ -880,7 +938,21 @@ diff -uNr 11_exceptions_part1_groundwork/Cargo.toml 12_integrated_testing/Cargo.
 diff -uNr 11_exceptions_part1_groundwork/Makefile 12_integrated_testing/Makefile
 --- 11_exceptions_part1_groundwork/Makefile
 +++ 12_integrated_testing/Makefile
-@@ -20,6 +20,7 @@
+@@ -14,6 +14,13 @@
+ # Default to a serial device name that is common in Linux.
+ DEV_SERIAL ?= /dev/ttyUSB0
+
++# Optional integration test name.
++ifdef TEST
++    TEST_ARG = --test $(TEST)
++else
++    TEST_ARG = --test '*'
++endif
++
+
+
+ ##--------------------------------------------------------------------------------------------------
+@@ -27,6 +34,7 @@
      QEMU_BINARY       = qemu-system-aarch64
      QEMU_MACHINE_TYPE = raspi3
      QEMU_RELEASE_ARGS = -serial stdio -display none
@@ -888,7 +960,7 @@ diff -uNr 11_exceptions_part1_groundwork/Makefile 12_integrated_testing/Makefile
      OBJDUMP_BINARY    = aarch64-none-elf-objdump
      NM_BINARY         = aarch64-none-elf-nm
      READELF_BINARY    = aarch64-none-elf-readelf
-@@ -33,6 +34,7 @@
+@@ -40,6 +48,7 @@
      QEMU_BINARY       = qemu-system-aarch64
      QEMU_MACHINE_TYPE =
      QEMU_RELEASE_ARGS = -serial stdio -display none
@@ -896,23 +968,7 @@ diff -uNr 11_exceptions_part1_groundwork/Makefile 12_integrated_testing/Makefile
      OBJDUMP_BINARY    = aarch64-none-elf-objdump
      NM_BINARY         = aarch64-none-elf-nm
      READELF_BINARY    = aarch64-none-elf-readelf
-@@ -45,6 +47,15 @@
- # Export for build.rs
- export LINKER_FILE
-
-+# Testing-specific arguments
-+ifdef TEST
-+    ifeq ($(TEST),unit)
-+        TEST_ARG = --lib
-+    else
-+        TEST_ARG = --test $(TEST)
-+    endif
-+endif
-+
- QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
-
- RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
-@@ -59,6 +70,7 @@
+@@ -73,6 +82,7 @@
  DOC_CMD     = cargo doc $(COMPILER_ARGS)
  CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
  CHECK_CMD   = cargo check $(COMPILER_ARGS)
@@ -920,37 +976,28 @@ diff -uNr 11_exceptions_part1_groundwork/Makefile 12_integrated_testing/Makefile
  OBJCOPY_CMD = rust-objcopy \
      --strip-all            \
      -O binary
-@@ -75,6 +87,7 @@
-
- DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
- DOCKER_GDB   = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
-+DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_IMAGE)
- DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
-
- # Dockerize commands that require USB device passthrough only on Linux
-@@ -91,8 +104,8 @@
- EXEC_QEMU     = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
- EXEC_MINIPUSH = ruby ../utils/minipush.rb
+@@ -236,11 +246,11 @@
+ ##--------------------------------------------------------------------------------------------------
+ ## Testing targets
+ ##--------------------------------------------------------------------------------------------------
+-.PHONY: test test_boot
++.PHONY: test test_boot test_unit test_integration
 
--.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu chainboot jtagboot openocd gdb gdb-opt0  clippy \
--    clean readelf objdump nm check
-+.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu test chainboot jtagboot openocd gdb gdb-opt0 \
-+    clippy clean readelf objdump nm check
+ ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
- all: $(KERNEL_BIN)
+-test_boot test :
++test_boot test_unit test_integration test:
+ 	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
 
-@@ -108,12 +121,31 @@
- 	@$(DOC_CMD) --document-private-items --open
+ else # QEMU is supported.
+@@ -252,6 +262,45 @@
+ 	$(call colorecho, "\nBoot test - $(BSP)")
+ 	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
- ifeq ($(QEMU_MACHINE_TYPE),)
--qemu:
-+qemu test:
- 	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
- else
- qemu: $(KERNEL_BIN)
- 	$(call colorecho, "\nLaunching QEMU")
- 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
-+
+-test: test_boot
++##------------------------------------------------------------------------------
++## Helpers for unit and integration test targets
++##------------------------------------------------------------------------------
 +define KERNEL_TEST_RUNNER
 +    #!/usr/bin/env bash
 +
@@ -958,20 +1005,38 @@ diff -uNr 11_exceptions_part1_groundwork/Makefile 12_integrated_testing/Makefile
 +    TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
 +
 +    $(OBJCOPY_CMD) $$TEST_ELF $$TEST_BINARY
-+    $(DOCKER_TEST) ruby tests/runner.rb $(EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
++    $(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
 +endef
 +
 +export KERNEL_TEST_RUNNER
-+test: FEATURES += --features test_build
-+test:
-+	$(call colorecho, "\nCompiling test(s) - $(BSP)")
-+	@mkdir -p target
-+	@echo "$$KERNEL_TEST_RUNNER" > target/kernel_test_runner.sh
-+	@chmod +x target/kernel_test_runner.sh
++
++define test_prepare
++    @mkdir -p target
++    @echo "$$KERNEL_TEST_RUNNER" > target/kernel_test_runner.sh
++    @chmod +x target/kernel_test_runner.sh
++endef
++
++test_unit test_integration: FEATURES += --features test_build
++
++##------------------------------------------------------------------------------
++## Run unit test(s)
++##------------------------------------------------------------------------------
++test_unit:
++	$(call colorecho, "\nCompiling unit test(s) - $(BSP)")
++	$(call test_prepare)
++	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) --lib
++
++##------------------------------------------------------------------------------
++## Run integration test(s)
++##------------------------------------------------------------------------------
++test_integration:
++	$(call colorecho, "\nCompiling integration test(s) - $(BSP)")
++	$(call test_prepare)
 +	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) $(TEST_ARG)
- endif
++
++test: test_boot test_unit test_integration
 
- chainboot: $(KERNEL_BIN)
+ endif
 
 diff -uNr 11_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs 12_integrated_testing/src/_arch/aarch64/cpu.rs
 --- 11_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs
@@ -1216,7 +1281,7 @@ diff -uNr 11_exceptions_part1_groundwork/src/exception.rs 12_integrated_testing/
 diff -uNr 11_exceptions_part1_groundwork/src/lib.rs 12_integrated_testing/src/lib.rs
 --- 11_exceptions_part1_groundwork/src/lib.rs
 +++ 12_integrated_testing/src/lib.rs
-@@ -0,0 +1,186 @@
+@@ -0,0 +1,187 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -1379,8 +1444,9 @@ diff -uNr 11_exceptions_part1_groundwork/src/lib.rs 12_integrated_testing/src/li
 +
 +/// The default runner for unit tests.
 +pub fn test_runner(tests: &[&test_types::UnitTest]) {
++    // This line will be printed as the test header.
 +    println!("Running {} tests", tests.len());
-+    println!("-------------------------------------------------------------------\n");
++
 +    for (i, test) in tests.iter().enumerate() {
 +        print!("{:>3}. {:.<58}", i + 1, test.name);
 +
@@ -1630,12 +1696,12 @@ diff -uNr 11_exceptions_part1_groundwork/src/panic_wait.rs 12_integrated_testing
 +#[linkage = "weak"]
 +#[no_mangle]
 +fn _panic_exit() -> ! {
-+    #[cfg(not(test_build))]
++    #[cfg(not(feature = "test_build"))]
 +    {
 +        cpu::wait_forever()
 +    }
 +
-+    #[cfg(test_build)]
++    #[cfg(feature = "test_build")]
 +    {
 +        cpu::qemu_exit_failure()
 +    }
@@ -1708,7 +1774,7 @@ diff -uNr 11_exceptions_part1_groundwork/test-macros/src/lib.rs 12_integrated_te
 diff -uNr 11_exceptions_part1_groundwork/tests/00_console_sanity.rb 12_integrated_testing/tests/00_console_sanity.rb
 --- 11_exceptions_part1_groundwork/tests/00_console_sanity.rb
 +++ 12_integrated_testing/tests/00_console_sanity.rb
-@@ -0,0 +1,50 @@
+@@ -0,0 +1,57 @@
 +# frozen_string_literal: true
 +
 +# SPDX-License-Identifier: MIT OR Apache-2.0
@@ -1719,6 +1785,13 @@ diff -uNr 11_exceptions_part1_groundwork/tests/00_console_sanity.rb 12_integrate
 +
 +TIMEOUT_SECS = 3
 +
++# Error class for when expect times out.
++class ExpectTimeoutError < StandardError
++    def initialize
++        super('Timeout while expecting string')
++    end
++end
++
 +# Verify sending and receiving works as expected.
 +class TxRxHandshake
 +    def name
@@ -1727,7 +1800,7 @@ diff -uNr 11_exceptions_part1_groundwork/tests/00_console_sanity.rb 12_integrate
 +
 +    def run(qemu_out, qemu_in)
 +        qemu_in.write_nonblock('ABC')
-+        raise('TX/RX test failed') if qemu_out.expect('OK1234', TIMEOUT_SECS).nil?
++        raise ExpectTimeoutError if qemu_out.expect('OK1234', TIMEOUT_SECS).nil?
 +    end
 +end
 +
@@ -1738,7 +1811,7 @@ diff -uNr 11_exceptions_part1_groundwork/tests/00_console_sanity.rb 12_integrate
 +    end
 +
 +    def run(qemu_out, _qemu_in)
-+        raise('chars_written reported wrong') if qemu_out.expect('6', TIMEOUT_SECS).nil?
++        raise ExpectTimeoutError if qemu_out.expect('6', TIMEOUT_SECS).nil?
 +    end
 +end
 +
@@ -1749,7 +1822,7 @@ diff -uNr 11_exceptions_part1_groundwork/tests/00_console_sanity.rb 12_integrate
 +    end
 +
 +    def run(qemu_out, _qemu_in)
-+        raise('chars_read reported wrong') if qemu_out.expect('3', TIMEOUT_SECS).nil?
++        raise ExpectTimeoutError if qemu_out.expect('3', TIMEOUT_SECS).nil?
 +    end
 +end
 +
@@ -1763,7 +1836,7 @@ diff -uNr 11_exceptions_part1_groundwork/tests/00_console_sanity.rb 12_integrate
 diff -uNr 11_exceptions_part1_groundwork/tests/00_console_sanity.rs 12_integrated_testing/tests/00_console_sanity.rs
 --- 11_exceptions_part1_groundwork/tests/00_console_sanity.rs
 +++ 12_integrated_testing/tests/00_console_sanity.rs
-@@ -0,0 +1,42 @@
+@@ -0,0 +1,35 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -1797,14 +1870,7 @@ diff -uNr 11_exceptions_part1_groundwork/tests/00_console_sanity.rs 12_integrate
 +    print!("{}", console().chars_read());
 +
 +    // The QEMU process running this test will be closed by the I/O test harness.
-+    // cpu::wait_forever();
-+
-+    // For some reason, in this test, rustc or the linker produces an empty binary when
-+    // wait_forever() is used. Calling qemu_exit_success() fixes this behavior. So for the time
-+    // being, the following lines are just a workaround to fix this compiler/linker weirdness.
-+    use libkernel::time::interface::TimeManager;
-+    libkernel::time::time_manager().spin_for(core::time::Duration::from_secs(3600));
-+    cpu::qemu_exit_success()
++    cpu::wait_forever();
 +}
 
 diff -uNr 11_exceptions_part1_groundwork/tests/01_timer_sanity.rs 12_integrated_testing/tests/01_timer_sanity.rs
@@ -1893,8 +1959,8 @@ diff -uNr 11_exceptions_part1_groundwork/tests/02_exception_sync_page_fault.rs 1
 +    exception::handling_init();
 +    bsp::console::qemu_bring_up_console();
 +
++    // This line will be printed as the test header.
 +    println!("Testing synchronous exception handling by causing a page fault");
-+    println!("-------------------------------------------------------------------\n");
 +
 +    if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
 +        println!("MMU: {}", string);
@@ -1909,6 +1975,15 @@ diff -uNr 11_exceptions_part1_groundwork/tests/02_exception_sync_page_fault.rs 1
 +    cpu::qemu_exit_failure()
 +}
 
+diff -uNr 11_exceptions_part1_groundwork/tests/boot_test_string.rb 12_integrated_testing/tests/boot_test_string.rb
+--- 11_exceptions_part1_groundwork/tests/boot_test_string.rb
++++ 12_integrated_testing/tests/boot_test_string.rb
+@@ -1,3 +1,3 @@
+ # frozen_string_literal: true
+
+-EXPECTED_PRINT = 'lr : 0x'
++EXPECTED_PRINT = 'Echoing input now'
+
 diff -uNr 11_exceptions_part1_groundwork/tests/panic_exit_success/mod.rs 12_integrated_testing/tests/panic_exit_success/mod.rs
 --- 11_exceptions_part1_groundwork/tests/panic_exit_success/mod.rs
 +++ 12_integrated_testing/tests/panic_exit_success/mod.rs
@@ -1923,154 +1998,6 @@ diff -uNr 11_exceptions_part1_groundwork/tests/panic_exit_success/mod.rs 12_inte
 +    libkernel::cpu::qemu_exit_success()
 +}
 
-diff -uNr 11_exceptions_part1_groundwork/tests/runner.rb 12_integrated_testing/tests/runner.rb
---- 11_exceptions_part1_groundwork/tests/runner.rb
-+++ 12_integrated_testing/tests/runner.rb
-@@ -0,0 +1,143 @@
-+#!/usr/bin/env ruby
-+# frozen_string_literal: true
-+
-+# SPDX-License-Identifier: MIT OR Apache-2.0
-+#
-+# Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
-+
-+require 'English'
-+require 'pty'
-+
-+# Test base class.
-+class Test
-+    INDENT = '         '
-+
-+    def print_border(status)
-+        puts
-+        puts "#{INDENT}-------------------------------------------------------------------"
-+        puts status
-+        puts "#{INDENT}-------------------------------------------------------------------\n\n\n"
-+    end
-+
-+    def print_error(error)
-+        puts
-+        print_border("#{INDENT}❌ Failure: #{error}: #{@test_name}")
-+    end
-+
-+    def print_success
-+        print_border("#{INDENT}✅ Success: #{@test_name}")
-+    end
-+
-+    def print_output
-+        puts "#{INDENT}-------------------------------------------------------------------"
-+        print INDENT
-+        print '🦀 '
-+        print @output.join.gsub("\n", "\n#{INDENT}")
-+    end
-+
-+    def finish(error)
-+        print_output
-+
-+        exit_code = if error
-+                        print_error(error)
-+                        false
-+                    else
-+                        print_success
-+                        true
-+                    end
-+
-+        exit(exit_code)
-+    end
-+end
-+
-+# Executes tests with console I/O.
-+class ConsoleTest < Test
-+    def initialize(binary, qemu_cmd, test_name, console_subtests)
-+        super()
-+
-+        @binary = binary
-+        @qemu_cmd = qemu_cmd
-+        @test_name = test_name
-+        @console_subtests = console_subtests
-+        @cur_subtest = 1
-+        @output = ["Running #{@console_subtests.length} console-based tests\n",
-+                   "-------------------------------------------------------------------\n\n"]
-+    end
-+
-+    def format_test_name(number, name)
-+        formatted_name = "#{number.to_s.rjust(3)}. #{name}"
-+        formatted_name.ljust(63, '.')
-+    end
-+
-+    def run_subtest(subtest, qemu_out, qemu_in)
-+        @output << format_test_name(@cur_subtest, subtest.name)
-+
-+        subtest.run(qemu_out, qemu_in)
-+
-+        @output << "[ok]\n"
-+        @cur_subtest += 1
-+    end
-+
-+    def exec
-+        error = false
-+
-+        PTY.spawn(@qemu_cmd) do |qemu_out, qemu_in|
-+            begin
-+                @console_subtests.each { |t| run_subtest(t, qemu_out, qemu_in) }
-+            rescue StandardError => e
-+                error = e.message
-+            end
-+
-+            finish(error)
-+        end
-+    end
-+end
-+
-+# A wrapper around the bare QEMU invocation.
-+class RawTest < Test
-+    MAX_WAIT_SECS = 5
-+
-+    def initialize(binary, qemu_cmd, test_name)
-+        super()
-+
-+        @binary = binary
-+        @qemu_cmd = qemu_cmd
-+        @test_name = test_name
-+        @output = []
-+    end
-+
-+    def exec
-+        error = 'Timed out waiting for test'
-+        io = IO.popen(@qemu_cmd)
-+
-+        while IO.select([io], nil, nil, MAX_WAIT_SECS)
-+            begin
-+                @output << io.read_nonblock(1024)
-+            rescue EOFError
-+                io.close
-+                error = $CHILD_STATUS.to_i != 0
-+                break
-+            end
-+        end
-+
-+        finish(error)
-+    end
-+end
-+
-+##--------------------------------------------------------------------------------------------------
-+## Script entry point
-+##--------------------------------------------------------------------------------------------------
-+binary = ARGV.last
-+test_name = binary.gsub(modulor{.*deps/}, '').split('-')[0]
-+console_test_file = "tests/#{test_name}.rb"
-+qemu_cmd = ARGV.join(' ')
-+
-+test_runner = if File.exist?(console_test_file)
-+                  load console_test_file
-+                  # subtest_collection is provided by console_test_file
-+                  ConsoleTest.new(binary, qemu_cmd, test_name, subtest_collection)
-+              else
-+                  RawTest.new(binary, qemu_cmd, test_name)
-+              end
-+
-+test_runner.exec
-
 diff -uNr 11_exceptions_part1_groundwork/test-types/Cargo.toml 12_integrated_testing/test-types/Cargo.toml
 --- 11_exceptions_part1_groundwork/test-types/Cargo.toml
 +++ 12_integrated_testing/test-types/Cargo.toml
diff --git a/12_integrated_testing/src/lib.rs b/12_integrated_testing/src/lib.rs
index 9890351f9..b8370a541 100644
--- a/12_integrated_testing/src/lib.rs
+++ b/12_integrated_testing/src/lib.rs
@@ -160,8 +160,9 @@ extern "Rust" {
 
 /// The default runner for unit tests.
 pub fn test_runner(tests: &[&test_types::UnitTest]) {
+    // This line will be printed as the test header.
     println!("Running {} tests", tests.len());
-    println!("-------------------------------------------------------------------\n");
+
     for (i, test) in tests.iter().enumerate() {
         print!("{:>3}. {:.<58}", i + 1, test.name);
 
diff --git a/12_integrated_testing/src/panic_wait.rs b/12_integrated_testing/src/panic_wait.rs
index 20493a912..d272a1975 100644
--- a/12_integrated_testing/src/panic_wait.rs
+++ b/12_integrated_testing/src/panic_wait.rs
@@ -23,12 +23,12 @@ fn _panic_print(args: fmt::Arguments) {
 #[linkage = "weak"]
 #[no_mangle]
 fn _panic_exit() -> ! {
-    #[cfg(not(test_build))]
+    #[cfg(not(feature = "test_build"))]
     {
         cpu::wait_forever()
     }
 
-    #[cfg(test_build)]
+    #[cfg(feature = "test_build")]
     {
         cpu::qemu_exit_failure()
     }
diff --git a/12_integrated_testing/tests/00_console_sanity.rb b/12_integrated_testing/tests/00_console_sanity.rb
index dfd6b16ea..16fb6c790 100644
--- a/12_integrated_testing/tests/00_console_sanity.rb
+++ b/12_integrated_testing/tests/00_console_sanity.rb
@@ -8,6 +8,13 @@
 
 TIMEOUT_SECS = 3
 
+# Error class for when expect times out.
+class ExpectTimeoutError < StandardError
+    def initialize
+        super('Timeout while expecting string')
+    end
+end
+
 # Verify sending and receiving works as expected.
 class TxRxHandshake
     def name
@@ -16,7 +23,7 @@ def name
 
     def run(qemu_out, qemu_in)
         qemu_in.write_nonblock('ABC')
-        raise('TX/RX test failed') if qemu_out.expect('OK1234', TIMEOUT_SECS).nil?
+        raise ExpectTimeoutError if qemu_out.expect('OK1234', TIMEOUT_SECS).nil?
     end
 end
 
@@ -27,7 +34,7 @@ def name
     end
 
     def run(qemu_out, _qemu_in)
-        raise('chars_written reported wrong') if qemu_out.expect('6', TIMEOUT_SECS).nil?
+        raise ExpectTimeoutError if qemu_out.expect('6', TIMEOUT_SECS).nil?
     end
 end
 
@@ -38,7 +45,7 @@ def name
     end
 
     def run(qemu_out, _qemu_in)
-        raise('chars_read reported wrong') if qemu_out.expect('3', TIMEOUT_SECS).nil?
+        raise ExpectTimeoutError if qemu_out.expect('3', TIMEOUT_SECS).nil?
     end
 end
 
diff --git a/12_integrated_testing/tests/00_console_sanity.rs b/12_integrated_testing/tests/00_console_sanity.rs
index 84b744798..03058f5ef 100644
--- a/12_integrated_testing/tests/00_console_sanity.rs
+++ b/12_integrated_testing/tests/00_console_sanity.rs
@@ -31,12 +31,5 @@ unsafe fn kernel_init() -> ! {
     print!("{}", console().chars_read());
 
     // The QEMU process running this test will be closed by the I/O test harness.
-    // cpu::wait_forever();
-
-    // For some reason, in this test, rustc or the linker produces an empty binary when
-    // wait_forever() is used. Calling qemu_exit_success() fixes this behavior. So for the time
-    // being, the following lines are just a workaround to fix this compiler/linker weirdness.
-    use libkernel::time::interface::TimeManager;
-    libkernel::time::time_manager().spin_for(core::time::Duration::from_secs(3600));
-    cpu::qemu_exit_success()
+    cpu::wait_forever();
 }
diff --git a/12_integrated_testing/tests/02_exception_sync_page_fault.rs b/12_integrated_testing/tests/02_exception_sync_page_fault.rs
index f1535d34c..8febacd14 100644
--- a/12_integrated_testing/tests/02_exception_sync_page_fault.rs
+++ b/12_integrated_testing/tests/02_exception_sync_page_fault.rs
@@ -26,8 +26,8 @@ unsafe fn kernel_init() -> ! {
     exception::handling_init();
     bsp::console::qemu_bring_up_console();
 
+    // This line will be printed as the test header.
     println!("Testing synchronous exception handling by causing a page fault");
-    println!("-------------------------------------------------------------------\n");
 
     if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
         println!("MMU: {}", string);
diff --git a/12_integrated_testing/tests/boot_test_string.rb b/12_integrated_testing/tests/boot_test_string.rb
new file mode 100644
index 000000000..f778b3d8c
--- /dev/null
+++ b/12_integrated_testing/tests/boot_test_string.rb
@@ -0,0 +1,3 @@
+# frozen_string_literal: true
+
+EXPECTED_PRINT = 'Echoing input now'
diff --git a/12_integrated_testing/tests/runner.rb b/12_integrated_testing/tests/runner.rb
deleted file mode 100755
index 53116e088..000000000
--- a/12_integrated_testing/tests/runner.rb
+++ /dev/null
@@ -1,143 +0,0 @@
-#!/usr/bin/env ruby
-# frozen_string_literal: true
-
-# SPDX-License-Identifier: MIT OR Apache-2.0
-#
-# Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
-
-require 'English'
-require 'pty'
-
-# Test base class.
-class Test
-    INDENT = '         '
-
-    def print_border(status)
-        puts
-        puts "#{INDENT}-------------------------------------------------------------------"
-        puts status
-        puts "#{INDENT}-------------------------------------------------------------------\n\n\n"
-    end
-
-    def print_error(error)
-        puts
-        print_border("#{INDENT}❌ Failure: #{error}: #{@test_name}")
-    end
-
-    def print_success
-        print_border("#{INDENT}✅ Success: #{@test_name}")
-    end
-
-    def print_output
-        puts "#{INDENT}-------------------------------------------------------------------"
-        print INDENT
-        print '🦀 '
-        print @output.join.gsub("\n", "\n#{INDENT}")
-    end
-
-    def finish(error)
-        print_output
-
-        exit_code = if error
-                        print_error(error)
-                        false
-                    else
-                        print_success
-                        true
-                    end
-
-        exit(exit_code)
-    end
-end
-
-# Executes tests with console I/O.
-class ConsoleTest < Test
-    def initialize(binary, qemu_cmd, test_name, console_subtests)
-        super()
-
-        @binary = binary
-        @qemu_cmd = qemu_cmd
-        @test_name = test_name
-        @console_subtests = console_subtests
-        @cur_subtest = 1
-        @output = ["Running #{@console_subtests.length} console-based tests\n",
-                   "-------------------------------------------------------------------\n\n"]
-    end
-
-    def format_test_name(number, name)
-        formatted_name = "#{number.to_s.rjust(3)}. #{name}"
-        formatted_name.ljust(63, '.')
-    end
-
-    def run_subtest(subtest, qemu_out, qemu_in)
-        @output << format_test_name(@cur_subtest, subtest.name)
-
-        subtest.run(qemu_out, qemu_in)
-
-        @output << "[ok]\n"
-        @cur_subtest += 1
-    end
-
-    def exec
-        error = false
-
-        PTY.spawn(@qemu_cmd) do |qemu_out, qemu_in|
-            begin
-                @console_subtests.each { |t| run_subtest(t, qemu_out, qemu_in) }
-            rescue StandardError => e
-                error = e.message
-            end
-
-            finish(error)
-        end
-    end
-end
-
-# A wrapper around the bare QEMU invocation.
-class RawTest < Test
-    MAX_WAIT_SECS = 5
-
-    def initialize(binary, qemu_cmd, test_name)
-        super()
-
-        @binary = binary
-        @qemu_cmd = qemu_cmd
-        @test_name = test_name
-        @output = []
-    end
-
-    def exec
-        error = 'Timed out waiting for test'
-        io = IO.popen(@qemu_cmd)
-
-        while IO.select([io], nil, nil, MAX_WAIT_SECS)
-            begin
-                @output << io.read_nonblock(1024)
-            rescue EOFError
-                io.close
-                error = $CHILD_STATUS.to_i != 0
-                break
-            end
-        end
-
-        finish(error)
-    end
-end
-
-##--------------------------------------------------------------------------------------------------
-## Script entry point
-##--------------------------------------------------------------------------------------------------
-binary = ARGV.last
-test_name = binary.gsub(%r{.*deps/}, '').split('-')[0]
-console_test_file = "tests/#{test_name}.rb"
-qemu_cmd = ARGV.join(' ')
-
-test_runner = if File.exist?(console_test_file)
-                  load console_test_file
-                  # subtest_collection is provided by console_test_file
-                  ConsoleTest.new(binary, qemu_cmd, test_name, subtest_collection)
-              else
-                  RawTest.new(binary, qemu_cmd, test_name)
-              end
-
-test_runner.exec
diff --git a/13_exceptions_part2_peripheral_IRQs/Makefile b/13_exceptions_part2_peripheral_IRQs/Makefile
index 4c2fb069a..e860f00dd 100644
--- a/13_exceptions_part2_peripheral_IRQs/Makefile
+++ b/13_exceptions_part2_peripheral_IRQs/Makefile
@@ -2,18 +2,32 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-include ../utils/color.mk.in
+include ../common/color.mk.in
 
-# Default to the RPi3
+##--------------------------------------------------------------------------------------------------
+## Optional, user-provided configuration values
+##--------------------------------------------------------------------------------------------------
+
+# Default to the RPi3.
 BSP ?= rpi3
 
 # Default to a serial device name that is common in Linux.
 DEV_SERIAL ?= /dev/ttyUSB0
 
-# Query the host system's kernel name
-UNAME_S = $(shell uname -s)
+# Optional integration test name.
+ifdef TEST
+    TEST_ARG = --test $(TEST)
+else
+    TEST_ARG = --test '*'
+endif
+
+
 
-# BSP-specific arguments
+##--------------------------------------------------------------------------------------------------
+## Hardcoded configuration values
+##--------------------------------------------------------------------------------------------------
+
+# BSP-specific arguments.
 ifeq ($(BSP),rpi3)
     TARGET            = aarch64-unknown-none-softfloat
     KERNEL_BIN        = kernel8.img
@@ -44,20 +58,18 @@ else ifeq ($(BSP),rpi4)
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
-# Export for build.rs
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+
+# Export for build.rs.
 export LINKER_FILE
 
-# Testing-specific arguments
-ifdef TEST
-    ifeq ($(TEST),unit)
-        TEST_ARG = --lib
-    else
-        TEST_ARG = --test $(TEST)
-    endif
-endif
+KERNEL_ELF = target/$(TARGET)/release/kernel
+
 
-QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
 
+##--------------------------------------------------------------------------------------------------
+## Command building blocks
+##--------------------------------------------------------------------------------------------------
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
@@ -75,105 +87,110 @@ OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
     -O binary
 
-KERNEL_ELF = target/$(TARGET)/release/kernel
-
-DOCKER_IMAGE         = rustembedded/osdev-utils
-DOCKER_CMD           = docker run --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
-DOCKER_CMD_INTERACT  = $(DOCKER_CMD) -i -t
-DOCKER_ARG_DIR_UTILS = -v $(shell pwd)/../utils:/work/utils
-DOCKER_ARG_DIR_JTAG  = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
-DOCKER_ARG_DEV       = --privileged -v /dev:/dev
-DOCKER_ARG_NET       = --network host
+EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
+EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
+EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
+
+##------------------------------------------------------------------------------
+## Dockerization
+##------------------------------------------------------------------------------
+DOCKER_IMAGE          = rustembedded/osdev-utils
+DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
+DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
+DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
+DOCKER_ARG_DIR_JTAG   = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
+DOCKER_ARG_DEV        = --privileged -v /dev:/dev
+DOCKER_ARG_NET        = --network host
 
 DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
-DOCKER_GDB   = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
-DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_IMAGE)
 DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
+DOCKER_GDB   = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
 
-# Dockerize commands that require USB device passthrough only on Linux
-ifeq ($(UNAME_S),Linux)
+# Dockerize commands, which require USB device passthrough, only on Linux.
+ifeq ($(shell uname -s),Linux)
     DOCKER_CMD_DEV = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DEV)
 
-    DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_IMAGE)
-    DOCKER_JTAGBOOT  = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_ARG_DIR_JTAG) $(DOCKER_IMAGE)
+    DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
+    DOCKER_JTAGBOOT  = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_ARG_DIR_JTAG) $(DOCKER_IMAGE)
     DOCKER_OPENOCD   = $(DOCKER_CMD_DEV) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
 else
     DOCKER_OPENOCD   = echo "Not yet supported on non-Linux systems."; \#
 endif
 
-EXEC_QEMU     = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
-EXEC_MINIPUSH = ruby ../utils/minipush.rb
 
-.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu test chainboot jtagboot openocd gdb gdb-opt0 \
-    clippy clean readelf objdump nm check
+
+##--------------------------------------------------------------------------------------------------
+## Targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu chainboot clippy clean readelf objdump nm check
 
 all: $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Build the kernel ELF
+##------------------------------------------------------------------------------
 $(KERNEL_ELF):
 	$(call colorecho, "\nCompiling kernel - $(BSP)")
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
+##------------------------------------------------------------------------------
+## Build the stripped kernel binary
+##------------------------------------------------------------------------------
 $(KERNEL_BIN): $(KERNEL_ELF)
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Build the documentation
+##------------------------------------------------------------------------------
 doc:
 	$(call colorecho, "\nGenerating docs")
 	@$(DOC_CMD) --document-private-items --open
 
-ifeq ($(QEMU_MACHINE_TYPE),)
-qemu test:
+##------------------------------------------------------------------------------
+## Run the kernel in QEMU
+##------------------------------------------------------------------------------
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
+qemu:
 	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
-else
+
+else # QEMU is supported.
+
 qemu: $(KERNEL_BIN)
 	$(call colorecho, "\nLaunching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
-define KERNEL_TEST_RUNNER
-    #!/usr/bin/env bash
-
-    TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
-    TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
-
-    $(OBJCOPY_CMD) $$TEST_ELF $$TEST_BINARY
-    $(DOCKER_TEST) ruby tests/runner.rb $(EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
-endef
-
-export KERNEL_TEST_RUNNER
-test: FEATURES += --features test_build
-test:
-	$(call colorecho, "\nCompiling test(s) - $(BSP)")
-	@mkdir -p target
-	@echo "$$KERNEL_TEST_RUNNER" > target/kernel_test_runner.sh
-	@chmod +x target/kernel_test_runner.sh
-	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) $(TEST_ARG)
 endif
 
+##------------------------------------------------------------------------------
+## Push the kernel to the real HW target
+##------------------------------------------------------------------------------
 chainboot: $(KERNEL_BIN)
 	@$(DOCKER_CHAINBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(KERNEL_BIN)
 
-jtagboot:
-	@$(DOCKER_JTAGBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(JTAG_BOOT_IMAGE)
-
-openocd:
-	$(call colorecho, "\nLaunching OpenOCD")
-	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
-
-gdb: RUSTC_MISC_ARGS += -C debuginfo=2
-gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
-gdb gdb-opt0: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching GDB")
-	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
-
+##------------------------------------------------------------------------------
+## Run clippy
+##------------------------------------------------------------------------------
 clippy:
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
+##------------------------------------------------------------------------------
+## Clean
+##------------------------------------------------------------------------------
 clean:
 	rm -rf target $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Run readelf
+##------------------------------------------------------------------------------
 readelf: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching readelf")
 	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
+##------------------------------------------------------------------------------
+## Run objdump
+##------------------------------------------------------------------------------
 objdump: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching objdump")
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
@@ -182,10 +199,108 @@ objdump: $(KERNEL_ELF)
                 --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
+##------------------------------------------------------------------------------
+## Run nm
+##------------------------------------------------------------------------------
 nm: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
-# For rust-analyzer
+##------------------------------------------------------------------------------
+## Helper target for rust-analyzer
+##------------------------------------------------------------------------------
 check:
 	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Debugging targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: jtagboot openocd gdb gdb-opt0
+
+##------------------------------------------------------------------------------
+## Push the JTAG boot image to the real HW target
+##------------------------------------------------------------------------------
+jtagboot:
+	@$(DOCKER_JTAGBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(JTAG_BOOT_IMAGE)
+
+##------------------------------------------------------------------------------
+## Start OpenOCD session
+##------------------------------------------------------------------------------
+openocd:
+	$(call colorecho, "\nLaunching OpenOCD")
+	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
+
+##------------------------------------------------------------------------------
+## Start GDB session
+##------------------------------------------------------------------------------
+gdb: RUSTC_MISC_ARGS += -C debuginfo=2
+gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
+gdb gdb-opt0: $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching GDB")
+	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Testing targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: test test_boot test_unit test_integration
+
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
+test_boot test_unit test_integration test:
+	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+
+else # QEMU is supported.
+
+##------------------------------------------------------------------------------
+## Run boot test
+##------------------------------------------------------------------------------
+test_boot: $(KERNEL_BIN)
+	$(call colorecho, "\nBoot test - $(BSP)")
+	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
+
+##------------------------------------------------------------------------------
+## Helpers for unit and integration test targets
+##------------------------------------------------------------------------------
+define KERNEL_TEST_RUNNER
+    #!/usr/bin/env bash
+
+    TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
+    TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
+
+    $(OBJCOPY_CMD) $$TEST_ELF $$TEST_BINARY
+    $(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
+endef
+
+export KERNEL_TEST_RUNNER
+
+define test_prepare
+    @mkdir -p target
+    @echo "$$KERNEL_TEST_RUNNER" > target/kernel_test_runner.sh
+    @chmod +x target/kernel_test_runner.sh
+endef
+
+test_unit test_integration: FEATURES += --features test_build
+
+##------------------------------------------------------------------------------
+## Run unit test(s)
+##------------------------------------------------------------------------------
+test_unit:
+	$(call colorecho, "\nCompiling unit test(s) - $(BSP)")
+	$(call test_prepare)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) --lib
+
+##------------------------------------------------------------------------------
+## Run integration test(s)
+##------------------------------------------------------------------------------
+test_integration:
+	$(call colorecho, "\nCompiling integration test(s) - $(BSP)")
+	$(call test_prepare)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) $(TEST_ARG)
+
+test: test_boot test_unit test_integration
+
+endif
diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index 02341a12a..b8cf351cb 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -758,6 +758,19 @@ diff -uNr 12_integrated_testing/Cargo.toml 13_exceptions_part2_peripheral_IRQs/C
  edition = "2018"
 
 
+diff -uNr 12_integrated_testing/Makefile 13_exceptions_part2_peripheral_IRQs/Makefile
+--- 12_integrated_testing/Makefile
++++ 13_exceptions_part2_peripheral_IRQs/Makefile
+@@ -291,7 +291,7 @@
+ test_unit:
+ 	$(call colorecho, "\nCompiling unit test(s) - $(BSP)")
+ 	$(call test_prepare)
+-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) --lib
++	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) --lib
+
+ ##------------------------------------------------------------------------------
+ ## Run integration test(s)
+
 diff -uNr 12_integrated_testing/src/_arch/aarch64/cpu/smp.rs 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs
 --- 12_integrated_testing/src/_arch/aarch64/cpu/smp.rs
 +++ 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/lib.rs b/13_exceptions_part2_peripheral_IRQs/src/lib.rs
index 4ca9f03ee..9c67f1ed6 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/lib.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/lib.rs
@@ -163,8 +163,9 @@ extern "Rust" {
 
 /// The default runner for unit tests.
 pub fn test_runner(tests: &[&test_types::UnitTest]) {
+    // This line will be printed as the test header.
     println!("Running {} tests", tests.len());
-    println!("-------------------------------------------------------------------\n");
+
     for (i, test) in tests.iter().enumerate() {
         print!("{:>3}. {:.<58}", i + 1, test.name);
 
diff --git a/13_exceptions_part2_peripheral_IRQs/src/panic_wait.rs b/13_exceptions_part2_peripheral_IRQs/src/panic_wait.rs
index e3a9ed8ab..130e952b8 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/panic_wait.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/panic_wait.rs
@@ -23,12 +23,12 @@ fn _panic_print(args: fmt::Arguments) {
 #[linkage = "weak"]
 #[no_mangle]
 fn _panic_exit() -> ! {
-    #[cfg(not(test_build))]
+    #[cfg(not(feature = "test_build"))]
     {
         cpu::wait_forever()
     }
 
-    #[cfg(test_build)]
+    #[cfg(feature = "test_build")]
     {
         cpu::qemu_exit_failure()
     }
diff --git a/13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rb b/13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rb
index dfd6b16ea..16fb6c790 100644
--- a/13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rb
+++ b/13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rb
@@ -8,6 +8,13 @@
 
 TIMEOUT_SECS = 3
 
+# Error class for when expect times out.
+class ExpectTimeoutError < StandardError
+    def initialize
+        super('Timeout while expecting string')
+    end
+end
+
 # Verify sending and receiving works as expected.
 class TxRxHandshake
     def name
@@ -16,7 +23,7 @@ def name
 
     def run(qemu_out, qemu_in)
         qemu_in.write_nonblock('ABC')
-        raise('TX/RX test failed') if qemu_out.expect('OK1234', TIMEOUT_SECS).nil?
+        raise ExpectTimeoutError if qemu_out.expect('OK1234', TIMEOUT_SECS).nil?
     end
 end
 
@@ -27,7 +34,7 @@ def name
     end
 
     def run(qemu_out, _qemu_in)
-        raise('chars_written reported wrong') if qemu_out.expect('6', TIMEOUT_SECS).nil?
+        raise ExpectTimeoutError if qemu_out.expect('6', TIMEOUT_SECS).nil?
     end
 end
 
@@ -38,7 +45,7 @@ def name
     end
 
     def run(qemu_out, _qemu_in)
-        raise('chars_read reported wrong') if qemu_out.expect('3', TIMEOUT_SECS).nil?
+        raise ExpectTimeoutError if qemu_out.expect('3', TIMEOUT_SECS).nil?
     end
 end
 
diff --git a/13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs b/13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs
index 84b744798..03058f5ef 100644
--- a/13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs
+++ b/13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs
@@ -31,12 +31,5 @@ unsafe fn kernel_init() -> ! {
     print!("{}", console().chars_read());
 
     // The QEMU process running this test will be closed by the I/O test harness.
-    // cpu::wait_forever();
-
-    // For some reason, in this test, rustc or the linker produces an empty binary when
-    // wait_forever() is used. Calling qemu_exit_success() fixes this behavior. So for the time
-    // being, the following lines are just a workaround to fix this compiler/linker weirdness.
-    use libkernel::time::interface::TimeManager;
-    libkernel::time::time_manager().spin_for(core::time::Duration::from_secs(3600));
-    cpu::qemu_exit_success()
+    cpu::wait_forever();
 }
diff --git a/13_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs b/13_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs
index f1535d34c..8febacd14 100644
--- a/13_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs
+++ b/13_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs
@@ -26,8 +26,8 @@ unsafe fn kernel_init() -> ! {
     exception::handling_init();
     bsp::console::qemu_bring_up_console();
 
+    // This line will be printed as the test header.
     println!("Testing synchronous exception handling by causing a page fault");
-    println!("-------------------------------------------------------------------\n");
 
     if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
         println!("MMU: {}", string);
diff --git a/13_exceptions_part2_peripheral_IRQs/tests/boot_test_string.rb b/13_exceptions_part2_peripheral_IRQs/tests/boot_test_string.rb
new file mode 100644
index 000000000..f778b3d8c
--- /dev/null
+++ b/13_exceptions_part2_peripheral_IRQs/tests/boot_test_string.rb
@@ -0,0 +1,3 @@
+# frozen_string_literal: true
+
+EXPECTED_PRINT = 'Echoing input now'
diff --git a/13_exceptions_part2_peripheral_IRQs/tests/runner.rb b/13_exceptions_part2_peripheral_IRQs/tests/runner.rb
deleted file mode 100755
index 53116e088..000000000
--- a/13_exceptions_part2_peripheral_IRQs/tests/runner.rb
+++ /dev/null
@@ -1,143 +0,0 @@
-#!/usr/bin/env ruby
-# frozen_string_literal: true
-
-# SPDX-License-Identifier: MIT OR Apache-2.0
-#
-# Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
-
-require 'English'
-require 'pty'
-
-# Test base class.
-class Test
-    INDENT = '         '
-
-    def print_border(status)
-        puts
-        puts "#{INDENT}-------------------------------------------------------------------"
-        puts status
-        puts "#{INDENT}-------------------------------------------------------------------\n\n\n"
-    end
-
-    def print_error(error)
-        puts
-        print_border("#{INDENT}❌ Failure: #{error}: #{@test_name}")
-    end
-
-    def print_success
-        print_border("#{INDENT}✅ Success: #{@test_name}")
-    end
-
-    def print_output
-        puts "#{INDENT}-------------------------------------------------------------------"
-        print INDENT
-        print '🦀 '
-        print @output.join.gsub("\n", "\n#{INDENT}")
-    end
-
-    def finish(error)
-        print_output
-
-        exit_code = if error
-                        print_error(error)
-                        false
-                    else
-                        print_success
-                        true
-                    end
-
-        exit(exit_code)
-    end
-end
-
-# Executes tests with console I/O.
-class ConsoleTest < Test
-    def initialize(binary, qemu_cmd, test_name, console_subtests)
-        super()
-
-        @binary = binary
-        @qemu_cmd = qemu_cmd
-        @test_name = test_name
-        @console_subtests = console_subtests
-        @cur_subtest = 1
-        @output = ["Running #{@console_subtests.length} console-based tests\n",
-                   "-------------------------------------------------------------------\n\n"]
-    end
-
-    def format_test_name(number, name)
-        formatted_name = "#{number.to_s.rjust(3)}. #{name}"
-        formatted_name.ljust(63, '.')
-    end
-
-    def run_subtest(subtest, qemu_out, qemu_in)
-        @output << format_test_name(@cur_subtest, subtest.name)
-
-        subtest.run(qemu_out, qemu_in)
-
-        @output << "[ok]\n"
-        @cur_subtest += 1
-    end
-
-    def exec
-        error = false
-
-        PTY.spawn(@qemu_cmd) do |qemu_out, qemu_in|
-            begin
-                @console_subtests.each { |t| run_subtest(t, qemu_out, qemu_in) }
-            rescue StandardError => e
-                error = e.message
-            end
-
-            finish(error)
-        end
-    end
-end
-
-# A wrapper around the bare QEMU invocation.
-class RawTest < Test
-    MAX_WAIT_SECS = 5
-
-    def initialize(binary, qemu_cmd, test_name)
-        super()
-
-        @binary = binary
-        @qemu_cmd = qemu_cmd
-        @test_name = test_name
-        @output = []
-    end
-
-    def exec
-        error = 'Timed out waiting for test'
-        io = IO.popen(@qemu_cmd)
-
-        while IO.select([io], nil, nil, MAX_WAIT_SECS)
-            begin
-                @output << io.read_nonblock(1024)
-            rescue EOFError
-                io.close
-                error = $CHILD_STATUS.to_i != 0
-                break
-            end
-        end
-
-        finish(error)
-    end
-end
-
-##--------------------------------------------------------------------------------------------------
-## Script entry point
-##--------------------------------------------------------------------------------------------------
-binary = ARGV.last
-test_name = binary.gsub(%r{.*deps/}, '').split('-')[0]
-console_test_file = "tests/#{test_name}.rb"
-qemu_cmd = ARGV.join(' ')
-
-test_runner = if File.exist?(console_test_file)
-                  load console_test_file
-                  # subtest_collection is provided by console_test_file
-                  ConsoleTest.new(binary, qemu_cmd, test_name, subtest_collection)
-              else
-                  RawTest.new(binary, qemu_cmd, test_name)
-              end
-
-test_runner.exec
diff --git a/14_virtual_mem_part2_mmio_remap/Makefile b/14_virtual_mem_part2_mmio_remap/Makefile
index 4c2fb069a..e860f00dd 100644
--- a/14_virtual_mem_part2_mmio_remap/Makefile
+++ b/14_virtual_mem_part2_mmio_remap/Makefile
@@ -2,18 +2,32 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-include ../utils/color.mk.in
+include ../common/color.mk.in
 
-# Default to the RPi3
+##--------------------------------------------------------------------------------------------------
+## Optional, user-provided configuration values
+##--------------------------------------------------------------------------------------------------
+
+# Default to the RPi3.
 BSP ?= rpi3
 
 # Default to a serial device name that is common in Linux.
 DEV_SERIAL ?= /dev/ttyUSB0
 
-# Query the host system's kernel name
-UNAME_S = $(shell uname -s)
+# Optional integration test name.
+ifdef TEST
+    TEST_ARG = --test $(TEST)
+else
+    TEST_ARG = --test '*'
+endif
+
+
 
-# BSP-specific arguments
+##--------------------------------------------------------------------------------------------------
+## Hardcoded configuration values
+##--------------------------------------------------------------------------------------------------
+
+# BSP-specific arguments.
 ifeq ($(BSP),rpi3)
     TARGET            = aarch64-unknown-none-softfloat
     KERNEL_BIN        = kernel8.img
@@ -44,20 +58,18 @@ else ifeq ($(BSP),rpi4)
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
-# Export for build.rs
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+
+# Export for build.rs.
 export LINKER_FILE
 
-# Testing-specific arguments
-ifdef TEST
-    ifeq ($(TEST),unit)
-        TEST_ARG = --lib
-    else
-        TEST_ARG = --test $(TEST)
-    endif
-endif
+KERNEL_ELF = target/$(TARGET)/release/kernel
+
 
-QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
 
+##--------------------------------------------------------------------------------------------------
+## Command building blocks
+##--------------------------------------------------------------------------------------------------
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
@@ -75,105 +87,110 @@ OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
     -O binary
 
-KERNEL_ELF = target/$(TARGET)/release/kernel
-
-DOCKER_IMAGE         = rustembedded/osdev-utils
-DOCKER_CMD           = docker run --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
-DOCKER_CMD_INTERACT  = $(DOCKER_CMD) -i -t
-DOCKER_ARG_DIR_UTILS = -v $(shell pwd)/../utils:/work/utils
-DOCKER_ARG_DIR_JTAG  = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
-DOCKER_ARG_DEV       = --privileged -v /dev:/dev
-DOCKER_ARG_NET       = --network host
+EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
+EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
+EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
+
+##------------------------------------------------------------------------------
+## Dockerization
+##------------------------------------------------------------------------------
+DOCKER_IMAGE          = rustembedded/osdev-utils
+DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
+DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
+DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
+DOCKER_ARG_DIR_JTAG   = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
+DOCKER_ARG_DEV        = --privileged -v /dev:/dev
+DOCKER_ARG_NET        = --network host
 
 DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
-DOCKER_GDB   = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
-DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_IMAGE)
 DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
+DOCKER_GDB   = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
 
-# Dockerize commands that require USB device passthrough only on Linux
-ifeq ($(UNAME_S),Linux)
+# Dockerize commands, which require USB device passthrough, only on Linux.
+ifeq ($(shell uname -s),Linux)
     DOCKER_CMD_DEV = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DEV)
 
-    DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_IMAGE)
-    DOCKER_JTAGBOOT  = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_ARG_DIR_JTAG) $(DOCKER_IMAGE)
+    DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
+    DOCKER_JTAGBOOT  = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_ARG_DIR_JTAG) $(DOCKER_IMAGE)
     DOCKER_OPENOCD   = $(DOCKER_CMD_DEV) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
 else
     DOCKER_OPENOCD   = echo "Not yet supported on non-Linux systems."; \#
 endif
 
-EXEC_QEMU     = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
-EXEC_MINIPUSH = ruby ../utils/minipush.rb
 
-.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu test chainboot jtagboot openocd gdb gdb-opt0 \
-    clippy clean readelf objdump nm check
+
+##--------------------------------------------------------------------------------------------------
+## Targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu chainboot clippy clean readelf objdump nm check
 
 all: $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Build the kernel ELF
+##------------------------------------------------------------------------------
 $(KERNEL_ELF):
 	$(call colorecho, "\nCompiling kernel - $(BSP)")
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
+##------------------------------------------------------------------------------
+## Build the stripped kernel binary
+##------------------------------------------------------------------------------
 $(KERNEL_BIN): $(KERNEL_ELF)
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Build the documentation
+##------------------------------------------------------------------------------
 doc:
 	$(call colorecho, "\nGenerating docs")
 	@$(DOC_CMD) --document-private-items --open
 
-ifeq ($(QEMU_MACHINE_TYPE),)
-qemu test:
+##------------------------------------------------------------------------------
+## Run the kernel in QEMU
+##------------------------------------------------------------------------------
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
+qemu:
 	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
-else
+
+else # QEMU is supported.
+
 qemu: $(KERNEL_BIN)
 	$(call colorecho, "\nLaunching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
-define KERNEL_TEST_RUNNER
-    #!/usr/bin/env bash
-
-    TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
-    TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
-
-    $(OBJCOPY_CMD) $$TEST_ELF $$TEST_BINARY
-    $(DOCKER_TEST) ruby tests/runner.rb $(EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
-endef
-
-export KERNEL_TEST_RUNNER
-test: FEATURES += --features test_build
-test:
-	$(call colorecho, "\nCompiling test(s) - $(BSP)")
-	@mkdir -p target
-	@echo "$$KERNEL_TEST_RUNNER" > target/kernel_test_runner.sh
-	@chmod +x target/kernel_test_runner.sh
-	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) $(TEST_ARG)
 endif
 
+##------------------------------------------------------------------------------
+## Push the kernel to the real HW target
+##------------------------------------------------------------------------------
 chainboot: $(KERNEL_BIN)
 	@$(DOCKER_CHAINBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(KERNEL_BIN)
 
-jtagboot:
-	@$(DOCKER_JTAGBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(JTAG_BOOT_IMAGE)
-
-openocd:
-	$(call colorecho, "\nLaunching OpenOCD")
-	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
-
-gdb: RUSTC_MISC_ARGS += -C debuginfo=2
-gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
-gdb gdb-opt0: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching GDB")
-	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
-
+##------------------------------------------------------------------------------
+## Run clippy
+##------------------------------------------------------------------------------
 clippy:
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
+##------------------------------------------------------------------------------
+## Clean
+##------------------------------------------------------------------------------
 clean:
 	rm -rf target $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Run readelf
+##------------------------------------------------------------------------------
 readelf: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching readelf")
 	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
+##------------------------------------------------------------------------------
+## Run objdump
+##------------------------------------------------------------------------------
 objdump: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching objdump")
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
@@ -182,10 +199,108 @@ objdump: $(KERNEL_ELF)
                 --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
+##------------------------------------------------------------------------------
+## Run nm
+##------------------------------------------------------------------------------
 nm: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
-# For rust-analyzer
+##------------------------------------------------------------------------------
+## Helper target for rust-analyzer
+##------------------------------------------------------------------------------
 check:
 	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Debugging targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: jtagboot openocd gdb gdb-opt0
+
+##------------------------------------------------------------------------------
+## Push the JTAG boot image to the real HW target
+##------------------------------------------------------------------------------
+jtagboot:
+	@$(DOCKER_JTAGBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(JTAG_BOOT_IMAGE)
+
+##------------------------------------------------------------------------------
+## Start OpenOCD session
+##------------------------------------------------------------------------------
+openocd:
+	$(call colorecho, "\nLaunching OpenOCD")
+	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
+
+##------------------------------------------------------------------------------
+## Start GDB session
+##------------------------------------------------------------------------------
+gdb: RUSTC_MISC_ARGS += -C debuginfo=2
+gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
+gdb gdb-opt0: $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching GDB")
+	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Testing targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: test test_boot test_unit test_integration
+
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
+test_boot test_unit test_integration test:
+	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+
+else # QEMU is supported.
+
+##------------------------------------------------------------------------------
+## Run boot test
+##------------------------------------------------------------------------------
+test_boot: $(KERNEL_BIN)
+	$(call colorecho, "\nBoot test - $(BSP)")
+	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
+
+##------------------------------------------------------------------------------
+## Helpers for unit and integration test targets
+##------------------------------------------------------------------------------
+define KERNEL_TEST_RUNNER
+    #!/usr/bin/env bash
+
+    TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
+    TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
+
+    $(OBJCOPY_CMD) $$TEST_ELF $$TEST_BINARY
+    $(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
+endef
+
+export KERNEL_TEST_RUNNER
+
+define test_prepare
+    @mkdir -p target
+    @echo "$$KERNEL_TEST_RUNNER" > target/kernel_test_runner.sh
+    @chmod +x target/kernel_test_runner.sh
+endef
+
+test_unit test_integration: FEATURES += --features test_build
+
+##------------------------------------------------------------------------------
+## Run unit test(s)
+##------------------------------------------------------------------------------
+test_unit:
+	$(call colorecho, "\nCompiling unit test(s) - $(BSP)")
+	$(call test_prepare)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) --lib
+
+##------------------------------------------------------------------------------
+## Run integration test(s)
+##------------------------------------------------------------------------------
+test_integration:
+	$(call colorecho, "\nCompiling integration test(s) - $(BSP)")
+	$(call test_prepare)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) $(TEST_ARG)
+
+test: test_boot test_unit test_integration
+
+endif
diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index 6cb7e16f1..d178e9c1e 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -3296,8 +3296,8 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault
      exception::handling_init();
      bsp::console::qemu_bring_up_console();
 @@ -29,10 +29,30 @@
+     // This line will be printed as the test header.
      println!("Testing synchronous exception handling by causing a page fault");
-     println!("-------------------------------------------------------------------\n");
 
 -    if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
 -        println!("MMU: {}", string);
diff --git a/14_virtual_mem_part2_mmio_remap/src/lib.rs b/14_virtual_mem_part2_mmio_remap/src/lib.rs
index 8a0297385..002e14b97 100644
--- a/14_virtual_mem_part2_mmio_remap/src/lib.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/lib.rs
@@ -165,8 +165,9 @@ extern "Rust" {
 
 /// The default runner for unit tests.
 pub fn test_runner(tests: &[&test_types::UnitTest]) {
+    // This line will be printed as the test header.
     println!("Running {} tests", tests.len());
-    println!("-------------------------------------------------------------------\n");
+
     for (i, test) in tests.iter().enumerate() {
         print!("{:>3}. {:.<58}", i + 1, test.name);
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/panic_wait.rs b/14_virtual_mem_part2_mmio_remap/src/panic_wait.rs
index e3a9ed8ab..130e952b8 100644
--- a/14_virtual_mem_part2_mmio_remap/src/panic_wait.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/panic_wait.rs
@@ -23,12 +23,12 @@ fn _panic_print(args: fmt::Arguments) {
 #[linkage = "weak"]
 #[no_mangle]
 fn _panic_exit() -> ! {
-    #[cfg(not(test_build))]
+    #[cfg(not(feature = "test_build"))]
     {
         cpu::wait_forever()
     }
 
-    #[cfg(test_build)]
+    #[cfg(feature = "test_build")]
     {
         cpu::qemu_exit_failure()
     }
diff --git a/14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rb b/14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rb
index dfd6b16ea..16fb6c790 100644
--- a/14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rb
+++ b/14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rb
@@ -8,6 +8,13 @@
 
 TIMEOUT_SECS = 3
 
+# Error class for when expect times out.
+class ExpectTimeoutError < StandardError
+    def initialize
+        super('Timeout while expecting string')
+    end
+end
+
 # Verify sending and receiving works as expected.
 class TxRxHandshake
     def name
@@ -16,7 +23,7 @@ def name
 
     def run(qemu_out, qemu_in)
         qemu_in.write_nonblock('ABC')
-        raise('TX/RX test failed') if qemu_out.expect('OK1234', TIMEOUT_SECS).nil?
+        raise ExpectTimeoutError if qemu_out.expect('OK1234', TIMEOUT_SECS).nil?
     end
 end
 
@@ -27,7 +34,7 @@ def name
     end
 
     def run(qemu_out, _qemu_in)
-        raise('chars_written reported wrong') if qemu_out.expect('6', TIMEOUT_SECS).nil?
+        raise ExpectTimeoutError if qemu_out.expect('6', TIMEOUT_SECS).nil?
     end
 end
 
@@ -38,7 +45,7 @@ def name
     end
 
     def run(qemu_out, _qemu_in)
-        raise('chars_read reported wrong') if qemu_out.expect('3', TIMEOUT_SECS).nil?
+        raise ExpectTimeoutError if qemu_out.expect('3', TIMEOUT_SECS).nil?
     end
 end
 
diff --git a/14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs b/14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs
index 84b744798..03058f5ef 100644
--- a/14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs
+++ b/14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs
@@ -31,12 +31,5 @@ unsafe fn kernel_init() -> ! {
     print!("{}", console().chars_read());
 
     // The QEMU process running this test will be closed by the I/O test harness.
-    // cpu::wait_forever();
-
-    // For some reason, in this test, rustc or the linker produces an empty binary when
-    // wait_forever() is used. Calling qemu_exit_success() fixes this behavior. So for the time
-    // being, the following lines are just a workaround to fix this compiler/linker weirdness.
-    use libkernel::time::interface::TimeManager;
-    libkernel::time::time_manager().spin_for(core::time::Duration::from_secs(3600));
-    cpu::qemu_exit_success()
+    cpu::wait_forever();
 }
diff --git a/14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs b/14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
index 940866a03..7b8bba35a 100644
--- a/14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
+++ b/14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
@@ -26,8 +26,8 @@ unsafe fn kernel_init() -> ! {
     exception::handling_init();
     bsp::console::qemu_bring_up_console();
 
+    // This line will be printed as the test header.
     println!("Testing synchronous exception handling by causing a page fault");
-    println!("-------------------------------------------------------------------\n");
 
     let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
         Err(string) => {
diff --git a/14_virtual_mem_part2_mmio_remap/tests/boot_test_string.rb b/14_virtual_mem_part2_mmio_remap/tests/boot_test_string.rb
new file mode 100644
index 000000000..f778b3d8c
--- /dev/null
+++ b/14_virtual_mem_part2_mmio_remap/tests/boot_test_string.rb
@@ -0,0 +1,3 @@
+# frozen_string_literal: true
+
+EXPECTED_PRINT = 'Echoing input now'
diff --git a/14_virtual_mem_part2_mmio_remap/tests/runner.rb b/14_virtual_mem_part2_mmio_remap/tests/runner.rb
deleted file mode 100755
index 53116e088..000000000
--- a/14_virtual_mem_part2_mmio_remap/tests/runner.rb
+++ /dev/null
@@ -1,143 +0,0 @@
-#!/usr/bin/env ruby
-# frozen_string_literal: true
-
-# SPDX-License-Identifier: MIT OR Apache-2.0
-#
-# Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
-
-require 'English'
-require 'pty'
-
-# Test base class.
-class Test
-    INDENT = '         '
-
-    def print_border(status)
-        puts
-        puts "#{INDENT}-------------------------------------------------------------------"
-        puts status
-        puts "#{INDENT}-------------------------------------------------------------------\n\n\n"
-    end
-
-    def print_error(error)
-        puts
-        print_border("#{INDENT}❌ Failure: #{error}: #{@test_name}")
-    end
-
-    def print_success
-        print_border("#{INDENT}✅ Success: #{@test_name}")
-    end
-
-    def print_output
-        puts "#{INDENT}-------------------------------------------------------------------"
-        print INDENT
-        print '🦀 '
-        print @output.join.gsub("\n", "\n#{INDENT}")
-    end
-
-    def finish(error)
-        print_output
-
-        exit_code = if error
-                        print_error(error)
-                        false
-                    else
-                        print_success
-                        true
-                    end
-
-        exit(exit_code)
-    end
-end
-
-# Executes tests with console I/O.
-class ConsoleTest < Test
-    def initialize(binary, qemu_cmd, test_name, console_subtests)
-        super()
-
-        @binary = binary
-        @qemu_cmd = qemu_cmd
-        @test_name = test_name
-        @console_subtests = console_subtests
-        @cur_subtest = 1
-        @output = ["Running #{@console_subtests.length} console-based tests\n",
-                   "-------------------------------------------------------------------\n\n"]
-    end
-
-    def format_test_name(number, name)
-        formatted_name = "#{number.to_s.rjust(3)}. #{name}"
-        formatted_name.ljust(63, '.')
-    end
-
-    def run_subtest(subtest, qemu_out, qemu_in)
-        @output << format_test_name(@cur_subtest, subtest.name)
-
-        subtest.run(qemu_out, qemu_in)
-
-        @output << "[ok]\n"
-        @cur_subtest += 1
-    end
-
-    def exec
-        error = false
-
-        PTY.spawn(@qemu_cmd) do |qemu_out, qemu_in|
-            begin
-                @console_subtests.each { |t| run_subtest(t, qemu_out, qemu_in) }
-            rescue StandardError => e
-                error = e.message
-            end
-
-            finish(error)
-        end
-    end
-end
-
-# A wrapper around the bare QEMU invocation.
-class RawTest < Test
-    MAX_WAIT_SECS = 5
-
-    def initialize(binary, qemu_cmd, test_name)
-        super()
-
-        @binary = binary
-        @qemu_cmd = qemu_cmd
-        @test_name = test_name
-        @output = []
-    end
-
-    def exec
-        error = 'Timed out waiting for test'
-        io = IO.popen(@qemu_cmd)
-
-        while IO.select([io], nil, nil, MAX_WAIT_SECS)
-            begin
-                @output << io.read_nonblock(1024)
-            rescue EOFError
-                io.close
-                error = $CHILD_STATUS.to_i != 0
-                break
-            end
-        end
-
-        finish(error)
-    end
-end
-
-##--------------------------------------------------------------------------------------------------
-## Script entry point
-##--------------------------------------------------------------------------------------------------
-binary = ARGV.last
-test_name = binary.gsub(%r{.*deps/}, '').split('-')[0]
-console_test_file = "tests/#{test_name}.rb"
-qemu_cmd = ARGV.join(' ')
-
-test_runner = if File.exist?(console_test_file)
-                  load console_test_file
-                  # subtest_collection is provided by console_test_file
-                  ConsoleTest.new(binary, qemu_cmd, test_name, subtest_collection)
-              else
-                  RawTest.new(binary, qemu_cmd, test_name)
-              end
-
-test_runner.exec
diff --git a/15_virtual_mem_part3_precomputed_tables/Makefile b/15_virtual_mem_part3_precomputed_tables/Makefile
index feb65cef7..86a64ee5a 100644
--- a/15_virtual_mem_part3_precomputed_tables/Makefile
+++ b/15_virtual_mem_part3_precomputed_tables/Makefile
@@ -2,18 +2,32 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-include ../utils/color.mk.in
+include ../common/color.mk.in
 
-# Default to the RPi3
+##--------------------------------------------------------------------------------------------------
+## Optional, user-provided configuration values
+##--------------------------------------------------------------------------------------------------
+
+# Default to the RPi3.
 BSP ?= rpi3
 
 # Default to a serial device name that is common in Linux.
 DEV_SERIAL ?= /dev/ttyUSB0
 
-# Query the host system's kernel name
-UNAME_S = $(shell uname -s)
+# Optional integration test name.
+ifdef TEST
+    TEST_ARG = --test $(TEST)
+else
+    TEST_ARG = --test '*'
+endif
+
+
 
-# BSP-specific arguments
+##--------------------------------------------------------------------------------------------------
+## Hardcoded configuration values
+##--------------------------------------------------------------------------------------------------
+
+# BSP-specific arguments.
 ifeq ($(BSP),rpi3)
     TARGET            = aarch64-unknown-none-softfloat
     KERNEL_BIN        = kernel8.img
@@ -44,20 +58,18 @@ else ifeq ($(BSP),rpi4)
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
-# Export for build.rs
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+
+# Export for build.rs.
 export LINKER_FILE
 
-# Testing-specific arguments
-ifdef TEST
-    ifeq ($(TEST),unit)
-        TEST_ARG = --lib
-    else
-        TEST_ARG = --test $(TEST)
-    endif
-endif
+KERNEL_ELF = target/$(TARGET)/release/kernel
+
 
-QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
 
+##--------------------------------------------------------------------------------------------------
+## Command building blocks
+##--------------------------------------------------------------------------------------------------
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
@@ -75,107 +87,112 @@ OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
     -O binary
 
-KERNEL_ELF = target/$(TARGET)/release/kernel
-
-DOCKER_IMAGE         = rustembedded/osdev-utils
-DOCKER_CMD           = docker run --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
-DOCKER_CMD_INTERACT  = $(DOCKER_CMD) -i -t
-DOCKER_ARG_DIR_UTILS = -v $(shell pwd)/../utils:/work/utils
-DOCKER_ARG_DIR_JTAG  = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
-DOCKER_ARG_DEV       = --privileged -v /dev:/dev
-DOCKER_ARG_NET       = --network host
+EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
+EXEC_TT_TOOL       = ruby translation_table_tool/main.rb
+EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
+EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
+
+##------------------------------------------------------------------------------
+## Dockerization
+##------------------------------------------------------------------------------
+DOCKER_IMAGE          = rustembedded/osdev-utils
+DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
+DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
+DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
+DOCKER_ARG_DIR_JTAG   = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
+DOCKER_ARG_DEV        = --privileged -v /dev:/dev
+DOCKER_ARG_NET        = --network host
 
 DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
-DOCKER_GDB   = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
-DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_IMAGE)
 DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
+DOCKER_GDB   = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
 
-# Dockerize commands that require USB device passthrough only on Linux
-ifeq ($(UNAME_S),Linux)
+# Dockerize commands, which require USB device passthrough, only on Linux.
+ifeq ($(shell uname -s),Linux)
     DOCKER_CMD_DEV = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DEV)
 
-    DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_IMAGE)
-    DOCKER_JTAGBOOT  = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_ARG_DIR_JTAG) $(DOCKER_IMAGE)
+    DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
+    DOCKER_JTAGBOOT  = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_ARG_DIR_JTAG) $(DOCKER_IMAGE)
     DOCKER_OPENOCD   = $(DOCKER_CMD_DEV) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
 else
     DOCKER_OPENOCD   = echo "Not yet supported on non-Linux systems."; \#
 endif
 
-EXEC_QEMU     = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
-EXEC_MINIPUSH = ruby ../utils/minipush.rb
 
-.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu test chainboot jtagboot openocd gdb gdb-opt0 \
-    clippy clean readelf objdump nm check
+
+##--------------------------------------------------------------------------------------------------
+## Targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu chainboot clippy clean readelf objdump nm check
 
 all: $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Build the kernel ELF
+##------------------------------------------------------------------------------
 $(KERNEL_ELF):
 	$(call colorecho, "\nCompiling kernel - $(BSP)")
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
-	@$(DOCKER_TOOLS) ruby translation_table_tool/main.rb $(TARGET) $(BSP) $(KERNEL_ELF)
+	@$(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(TARGET) $(BSP) $(KERNEL_ELF)
 
+##------------------------------------------------------------------------------
+## Build the stripped kernel binary
+##------------------------------------------------------------------------------
 $(KERNEL_BIN): $(KERNEL_ELF)
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Build the documentation
+##------------------------------------------------------------------------------
 doc:
 	$(call colorecho, "\nGenerating docs")
 	@$(DOC_CMD) --document-private-items --open
 
-ifeq ($(QEMU_MACHINE_TYPE),)
-qemu test:
+##------------------------------------------------------------------------------
+## Run the kernel in QEMU
+##------------------------------------------------------------------------------
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
+qemu:
 	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
-else
+
+else # QEMU is supported.
+
 qemu: $(KERNEL_BIN)
 	$(call colorecho, "\nLaunching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
-define KERNEL_TEST_RUNNER
-    #!/usr/bin/env bash
-
-    TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
-    TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
-
-    $(DOCKER_TOOLS) ruby translation_table_tool/main.rb $(TARGET) $(BSP) $$TEST_ELF > /dev/null
-    $(OBJCOPY_CMD) $$TEST_ELF $$TEST_BINARY
-    $(DOCKER_TEST) ruby tests/runner.rb $(EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
-endef
-
-export KERNEL_TEST_RUNNER
-test: FEATURES += --features test_build
-test:
-	$(call colorecho, "\nCompiling test(s) - $(BSP)")
-	@mkdir -p target
-	@echo "$$KERNEL_TEST_RUNNER" > target/kernel_test_runner.sh
-	@chmod +x target/kernel_test_runner.sh
-	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) $(TEST_ARG)
 endif
 
+##------------------------------------------------------------------------------
+## Push the kernel to the real HW target
+##------------------------------------------------------------------------------
 chainboot: $(KERNEL_BIN)
 	@$(DOCKER_CHAINBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(KERNEL_BIN)
 
-jtagboot:
-	@$(DOCKER_JTAGBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(JTAG_BOOT_IMAGE)
-
-openocd:
-	$(call colorecho, "\nLaunching OpenOCD")
-	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
-
-gdb: RUSTC_MISC_ARGS += -C debuginfo=2
-gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
-gdb gdb-opt0: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching GDB")
-	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
-
+##------------------------------------------------------------------------------
+## Run clippy
+##------------------------------------------------------------------------------
 clippy:
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
+##------------------------------------------------------------------------------
+## Clean
+##------------------------------------------------------------------------------
 clean:
 	rm -rf target $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Run readelf
+##------------------------------------------------------------------------------
 readelf: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching readelf")
 	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
+##------------------------------------------------------------------------------
+## Run objdump
+##------------------------------------------------------------------------------
 objdump: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching objdump")
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
@@ -184,10 +201,109 @@ objdump: $(KERNEL_ELF)
                 --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
+##------------------------------------------------------------------------------
+## Run nm
+##------------------------------------------------------------------------------
 nm: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
-# For rust-analyzer
+##------------------------------------------------------------------------------
+## Helper target for rust-analyzer
+##------------------------------------------------------------------------------
 check:
 	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Debugging targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: jtagboot openocd gdb gdb-opt0
+
+##------------------------------------------------------------------------------
+## Push the JTAG boot image to the real HW target
+##------------------------------------------------------------------------------
+jtagboot:
+	@$(DOCKER_JTAGBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(JTAG_BOOT_IMAGE)
+
+##------------------------------------------------------------------------------
+## Start OpenOCD session
+##------------------------------------------------------------------------------
+openocd:
+	$(call colorecho, "\nLaunching OpenOCD")
+	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
+
+##------------------------------------------------------------------------------
+## Start GDB session
+##------------------------------------------------------------------------------
+gdb: RUSTC_MISC_ARGS += -C debuginfo=2
+gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
+gdb gdb-opt0: $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching GDB")
+	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Testing targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: test test_boot test_unit test_integration
+
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
+test_boot test_unit test_integration test:
+	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+
+else # QEMU is supported.
+
+##------------------------------------------------------------------------------
+## Run boot test
+##------------------------------------------------------------------------------
+test_boot: $(KERNEL_BIN)
+	$(call colorecho, "\nBoot test - $(BSP)")
+	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
+
+##------------------------------------------------------------------------------
+## Helpers for unit and integration test targets
+##------------------------------------------------------------------------------
+define KERNEL_TEST_RUNNER
+    #!/usr/bin/env bash
+
+    TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
+    TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
+
+    $(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(TARGET) $(BSP) $$TEST_ELF > /dev/null
+    $(OBJCOPY_CMD) $$TEST_ELF $$TEST_BINARY
+    $(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
+endef
+
+export KERNEL_TEST_RUNNER
+
+define test_prepare
+    @mkdir -p target
+    @echo "$$KERNEL_TEST_RUNNER" > target/kernel_test_runner.sh
+    @chmod +x target/kernel_test_runner.sh
+endef
+
+test_unit test_integration: FEATURES += --features test_build
+
+##------------------------------------------------------------------------------
+## Run unit test(s)
+##------------------------------------------------------------------------------
+test_unit:
+	$(call colorecho, "\nCompiling unit test(s) - $(BSP)")
+	$(call test_prepare)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) --lib
+
+##------------------------------------------------------------------------------
+## Run integration test(s)
+##------------------------------------------------------------------------------
+test_integration:
+	$(call colorecho, "\nCompiling integration test(s) - $(BSP)")
+	$(call test_prepare)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) $(TEST_ARG)
+
+test: test_boot test_unit test_integration
+
+endif
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index 581dcefca..b6a2b5b65 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -776,21 +776,29 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/Cargo.toml 15_virtual_mem_part3_precom
 diff -uNr 14_virtual_mem_part2_mmio_remap/Makefile 15_virtual_mem_part3_precomputed_tables/Makefile
 --- 14_virtual_mem_part2_mmio_remap/Makefile
 +++ 15_virtual_mem_part3_precomputed_tables/Makefile
-@@ -112,6 +112,7 @@
+@@ -88,6 +88,7 @@
+     -O binary
+
+ EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
++EXEC_TT_TOOL       = ruby translation_table_tool/main.rb
+ EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
+ EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
+
+@@ -133,6 +134,7 @@
  $(KERNEL_ELF):
  	$(call colorecho, "\nCompiling kernel - $(BSP)")
  	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
-+	@$(DOCKER_TOOLS) ruby translation_table_tool/main.rb $(TARGET) $(BSP) $(KERNEL_ELF)
++	@$(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(TARGET) $(BSP) $(KERNEL_ELF)
 
- $(KERNEL_BIN): $(KERNEL_ELF)
- 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
-@@ -134,6 +135,7 @@
+ ##------------------------------------------------------------------------------
+ ## Build the stripped kernel binary
+@@ -271,6 +273,7 @@
      TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
      TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
 
-+    $(DOCKER_TOOLS) ruby translation_table_tool/main.rb $(TARGET) $(BSP) $$TEST_ELF > /dev/null
++    $(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(TARGET) $(BSP) $$TEST_ELF > /dev/null
      $(OBJCOPY_CMD) $$TEST_ELF $$TEST_BINARY
-     $(DOCKER_TEST) ruby tests/runner.rb $(EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
+     $(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
  endef
 
 diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
@@ -1555,8 +1563,8 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
      exception::handling_init();
      bsp::console::qemu_bring_up_console();
 
+     // This line will be printed as the test header.
      println!("Testing synchronous exception handling by causing a page fault");
-     println!("-------------------------------------------------------------------\n");
 
 -    let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
 -        Err(string) => {
diff --git a/15_virtual_mem_part3_precomputed_tables/src/lib.rs b/15_virtual_mem_part3_precomputed_tables/src/lib.rs
index 8a0297385..002e14b97 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/lib.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/lib.rs
@@ -165,8 +165,9 @@ extern "Rust" {
 
 /// The default runner for unit tests.
 pub fn test_runner(tests: &[&test_types::UnitTest]) {
+    // This line will be printed as the test header.
     println!("Running {} tests", tests.len());
-    println!("-------------------------------------------------------------------\n");
+
     for (i, test) in tests.iter().enumerate() {
         print!("{:>3}. {:.<58}", i + 1, test.name);
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/panic_wait.rs b/15_virtual_mem_part3_precomputed_tables/src/panic_wait.rs
index e3a9ed8ab..130e952b8 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/panic_wait.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/panic_wait.rs
@@ -23,12 +23,12 @@ fn _panic_print(args: fmt::Arguments) {
 #[linkage = "weak"]
 #[no_mangle]
 fn _panic_exit() -> ! {
-    #[cfg(not(test_build))]
+    #[cfg(not(feature = "test_build"))]
     {
         cpu::wait_forever()
     }
 
-    #[cfg(test_build)]
+    #[cfg(feature = "test_build")]
     {
         cpu::qemu_exit_failure()
     }
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rb b/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rb
index dfd6b16ea..16fb6c790 100644
--- a/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rb
+++ b/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rb
@@ -8,6 +8,13 @@
 
 TIMEOUT_SECS = 3
 
+# Error class for when expect times out.
+class ExpectTimeoutError < StandardError
+    def initialize
+        super('Timeout while expecting string')
+    end
+end
+
 # Verify sending and receiving works as expected.
 class TxRxHandshake
     def name
@@ -16,7 +23,7 @@ def name
 
     def run(qemu_out, qemu_in)
         qemu_in.write_nonblock('ABC')
-        raise('TX/RX test failed') if qemu_out.expect('OK1234', TIMEOUT_SECS).nil?
+        raise ExpectTimeoutError if qemu_out.expect('OK1234', TIMEOUT_SECS).nil?
     end
 end
 
@@ -27,7 +34,7 @@ def name
     end
 
     def run(qemu_out, _qemu_in)
-        raise('chars_written reported wrong') if qemu_out.expect('6', TIMEOUT_SECS).nil?
+        raise ExpectTimeoutError if qemu_out.expect('6', TIMEOUT_SECS).nil?
     end
 end
 
@@ -38,7 +45,7 @@ def name
     end
 
     def run(qemu_out, _qemu_in)
-        raise('chars_read reported wrong') if qemu_out.expect('3', TIMEOUT_SECS).nil?
+        raise ExpectTimeoutError if qemu_out.expect('3', TIMEOUT_SECS).nil?
     end
 end
 
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rs b/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rs
index 84b744798..03058f5ef 100644
--- a/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rs
+++ b/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rs
@@ -31,12 +31,5 @@ unsafe fn kernel_init() -> ! {
     print!("{}", console().chars_read());
 
     // The QEMU process running this test will be closed by the I/O test harness.
-    // cpu::wait_forever();
-
-    // For some reason, in this test, rustc or the linker produces an empty binary when
-    // wait_forever() is used. Calling qemu_exit_success() fixes this behavior. So for the time
-    // being, the following lines are just a workaround to fix this compiler/linker weirdness.
-    use libkernel::time::interface::TimeManager;
-    libkernel::time::time_manager().spin_for(core::time::Duration::from_secs(3600));
-    cpu::qemu_exit_success()
+    cpu::wait_forever();
 }
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs b/15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs
index 6a0c11f3c..e7fa8800c 100644
--- a/15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs
+++ b/15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs
@@ -24,8 +24,8 @@ unsafe fn kernel_init() -> ! {
     exception::handling_init();
     bsp::console::qemu_bring_up_console();
 
+    // This line will be printed as the test header.
     println!("Testing synchronous exception handling by causing a page fault");
-    println!("-------------------------------------------------------------------\n");
 
     println!("Writing beyond mapped area to address 9 GiB...");
     let big_addr: u64 = 9 * 1024 * 1024 * 1024;
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/boot_test_string.rb b/15_virtual_mem_part3_precomputed_tables/tests/boot_test_string.rb
new file mode 100644
index 000000000..f778b3d8c
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/tests/boot_test_string.rb
@@ -0,0 +1,3 @@
+# frozen_string_literal: true
+
+EXPECTED_PRINT = 'Echoing input now'
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/runner.rb b/15_virtual_mem_part3_precomputed_tables/tests/runner.rb
deleted file mode 100755
index 53116e088..000000000
--- a/15_virtual_mem_part3_precomputed_tables/tests/runner.rb
+++ /dev/null
@@ -1,143 +0,0 @@
-#!/usr/bin/env ruby
-# frozen_string_literal: true
-
-# SPDX-License-Identifier: MIT OR Apache-2.0
-#
-# Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
-
-require 'English'
-require 'pty'
-
-# Test base class.
-class Test
-    INDENT = '         '
-
-    def print_border(status)
-        puts
-        puts "#{INDENT}-------------------------------------------------------------------"
-        puts status
-        puts "#{INDENT}-------------------------------------------------------------------\n\n\n"
-    end
-
-    def print_error(error)
-        puts
-        print_border("#{INDENT}❌ Failure: #{error}: #{@test_name}")
-    end
-
-    def print_success
-        print_border("#{INDENT}✅ Success: #{@test_name}")
-    end
-
-    def print_output
-        puts "#{INDENT}-------------------------------------------------------------------"
-        print INDENT
-        print '🦀 '
-        print @output.join.gsub("\n", "\n#{INDENT}")
-    end
-
-    def finish(error)
-        print_output
-
-        exit_code = if error
-                        print_error(error)
-                        false
-                    else
-                        print_success
-                        true
-                    end
-
-        exit(exit_code)
-    end
-end
-
-# Executes tests with console I/O.
-class ConsoleTest < Test
-    def initialize(binary, qemu_cmd, test_name, console_subtests)
-        super()
-
-        @binary = binary
-        @qemu_cmd = qemu_cmd
-        @test_name = test_name
-        @console_subtests = console_subtests
-        @cur_subtest = 1
-        @output = ["Running #{@console_subtests.length} console-based tests\n",
-                   "-------------------------------------------------------------------\n\n"]
-    end
-
-    def format_test_name(number, name)
-        formatted_name = "#{number.to_s.rjust(3)}. #{name}"
-        formatted_name.ljust(63, '.')
-    end
-
-    def run_subtest(subtest, qemu_out, qemu_in)
-        @output << format_test_name(@cur_subtest, subtest.name)
-
-        subtest.run(qemu_out, qemu_in)
-
-        @output << "[ok]\n"
-        @cur_subtest += 1
-    end
-
-    def exec
-        error = false
-
-        PTY.spawn(@qemu_cmd) do |qemu_out, qemu_in|
-            begin
-                @console_subtests.each { |t| run_subtest(t, qemu_out, qemu_in) }
-            rescue StandardError => e
-                error = e.message
-            end
-
-            finish(error)
-        end
-    end
-end
-
-# A wrapper around the bare QEMU invocation.
-class RawTest < Test
-    MAX_WAIT_SECS = 5
-
-    def initialize(binary, qemu_cmd, test_name)
-        super()
-
-        @binary = binary
-        @qemu_cmd = qemu_cmd
-        @test_name = test_name
-        @output = []
-    end
-
-    def exec
-        error = 'Timed out waiting for test'
-        io = IO.popen(@qemu_cmd)
-
-        while IO.select([io], nil, nil, MAX_WAIT_SECS)
-            begin
-                @output << io.read_nonblock(1024)
-            rescue EOFError
-                io.close
-                error = $CHILD_STATUS.to_i != 0
-                break
-            end
-        end
-
-        finish(error)
-    end
-end
-
-##--------------------------------------------------------------------------------------------------
-## Script entry point
-##--------------------------------------------------------------------------------------------------
-binary = ARGV.last
-test_name = binary.gsub(%r{.*deps/}, '').split('-')[0]
-console_test_file = "tests/#{test_name}.rb"
-qemu_cmd = ARGV.join(' ')
-
-test_runner = if File.exist?(console_test_file)
-                  load console_test_file
-                  # subtest_collection is provided by console_test_file
-                  ConsoleTest.new(binary, qemu_cmd, test_name, subtest_collection)
-              else
-                  RawTest.new(binary, qemu_cmd, test_name)
-              end
-
-test_runner.exec
diff --git a/16_virtual_mem_part4_higher_half_kernel/Makefile b/16_virtual_mem_part4_higher_half_kernel/Makefile
index feb65cef7..86a64ee5a 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Makefile
+++ b/16_virtual_mem_part4_higher_half_kernel/Makefile
@@ -2,18 +2,32 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-include ../utils/color.mk.in
+include ../common/color.mk.in
 
-# Default to the RPi3
+##--------------------------------------------------------------------------------------------------
+## Optional, user-provided configuration values
+##--------------------------------------------------------------------------------------------------
+
+# Default to the RPi3.
 BSP ?= rpi3
 
 # Default to a serial device name that is common in Linux.
 DEV_SERIAL ?= /dev/ttyUSB0
 
-# Query the host system's kernel name
-UNAME_S = $(shell uname -s)
+# Optional integration test name.
+ifdef TEST
+    TEST_ARG = --test $(TEST)
+else
+    TEST_ARG = --test '*'
+endif
+
+
 
-# BSP-specific arguments
+##--------------------------------------------------------------------------------------------------
+## Hardcoded configuration values
+##--------------------------------------------------------------------------------------------------
+
+# BSP-specific arguments.
 ifeq ($(BSP),rpi3)
     TARGET            = aarch64-unknown-none-softfloat
     KERNEL_BIN        = kernel8.img
@@ -44,20 +58,18 @@ else ifeq ($(BSP),rpi4)
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
-# Export for build.rs
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+
+# Export for build.rs.
 export LINKER_FILE
 
-# Testing-specific arguments
-ifdef TEST
-    ifeq ($(TEST),unit)
-        TEST_ARG = --lib
-    else
-        TEST_ARG = --test $(TEST)
-    endif
-endif
+KERNEL_ELF = target/$(TARGET)/release/kernel
+
 
-QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
 
+##--------------------------------------------------------------------------------------------------
+## Command building blocks
+##--------------------------------------------------------------------------------------------------
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
@@ -75,107 +87,112 @@ OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
     -O binary
 
-KERNEL_ELF = target/$(TARGET)/release/kernel
-
-DOCKER_IMAGE         = rustembedded/osdev-utils
-DOCKER_CMD           = docker run --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
-DOCKER_CMD_INTERACT  = $(DOCKER_CMD) -i -t
-DOCKER_ARG_DIR_UTILS = -v $(shell pwd)/../utils:/work/utils
-DOCKER_ARG_DIR_JTAG  = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
-DOCKER_ARG_DEV       = --privileged -v /dev:/dev
-DOCKER_ARG_NET       = --network host
+EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
+EXEC_TT_TOOL       = ruby translation_table_tool/main.rb
+EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
+EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
+
+##------------------------------------------------------------------------------
+## Dockerization
+##------------------------------------------------------------------------------
+DOCKER_IMAGE          = rustembedded/osdev-utils
+DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
+DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
+DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
+DOCKER_ARG_DIR_JTAG   = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
+DOCKER_ARG_DEV        = --privileged -v /dev:/dev
+DOCKER_ARG_NET        = --network host
 
 DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
-DOCKER_GDB   = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
-DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_IMAGE)
 DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
+DOCKER_GDB   = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
 
-# Dockerize commands that require USB device passthrough only on Linux
-ifeq ($(UNAME_S),Linux)
+# Dockerize commands, which require USB device passthrough, only on Linux.
+ifeq ($(shell uname -s),Linux)
     DOCKER_CMD_DEV = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DEV)
 
-    DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_IMAGE)
-    DOCKER_JTAGBOOT  = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_ARG_DIR_JTAG) $(DOCKER_IMAGE)
+    DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
+    DOCKER_JTAGBOOT  = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_ARG_DIR_JTAG) $(DOCKER_IMAGE)
     DOCKER_OPENOCD   = $(DOCKER_CMD_DEV) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
 else
     DOCKER_OPENOCD   = echo "Not yet supported on non-Linux systems."; \#
 endif
 
-EXEC_QEMU     = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
-EXEC_MINIPUSH = ruby ../utils/minipush.rb
 
-.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu test chainboot jtagboot openocd gdb gdb-opt0 \
-    clippy clean readelf objdump nm check
+
+##--------------------------------------------------------------------------------------------------
+## Targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu chainboot clippy clean readelf objdump nm check
 
 all: $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Build the kernel ELF
+##------------------------------------------------------------------------------
 $(KERNEL_ELF):
 	$(call colorecho, "\nCompiling kernel - $(BSP)")
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
-	@$(DOCKER_TOOLS) ruby translation_table_tool/main.rb $(TARGET) $(BSP) $(KERNEL_ELF)
+	@$(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(TARGET) $(BSP) $(KERNEL_ELF)
 
+##------------------------------------------------------------------------------
+## Build the stripped kernel binary
+##------------------------------------------------------------------------------
 $(KERNEL_BIN): $(KERNEL_ELF)
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Build the documentation
+##------------------------------------------------------------------------------
 doc:
 	$(call colorecho, "\nGenerating docs")
 	@$(DOC_CMD) --document-private-items --open
 
-ifeq ($(QEMU_MACHINE_TYPE),)
-qemu test:
+##------------------------------------------------------------------------------
+## Run the kernel in QEMU
+##------------------------------------------------------------------------------
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
+qemu:
 	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
-else
+
+else # QEMU is supported.
+
 qemu: $(KERNEL_BIN)
 	$(call colorecho, "\nLaunching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
-define KERNEL_TEST_RUNNER
-    #!/usr/bin/env bash
-
-    TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
-    TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
-
-    $(DOCKER_TOOLS) ruby translation_table_tool/main.rb $(TARGET) $(BSP) $$TEST_ELF > /dev/null
-    $(OBJCOPY_CMD) $$TEST_ELF $$TEST_BINARY
-    $(DOCKER_TEST) ruby tests/runner.rb $(EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
-endef
-
-export KERNEL_TEST_RUNNER
-test: FEATURES += --features test_build
-test:
-	$(call colorecho, "\nCompiling test(s) - $(BSP)")
-	@mkdir -p target
-	@echo "$$KERNEL_TEST_RUNNER" > target/kernel_test_runner.sh
-	@chmod +x target/kernel_test_runner.sh
-	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) $(TEST_ARG)
 endif
 
+##------------------------------------------------------------------------------
+## Push the kernel to the real HW target
+##------------------------------------------------------------------------------
 chainboot: $(KERNEL_BIN)
 	@$(DOCKER_CHAINBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(KERNEL_BIN)
 
-jtagboot:
-	@$(DOCKER_JTAGBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(JTAG_BOOT_IMAGE)
-
-openocd:
-	$(call colorecho, "\nLaunching OpenOCD")
-	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
-
-gdb: RUSTC_MISC_ARGS += -C debuginfo=2
-gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
-gdb gdb-opt0: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching GDB")
-	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
-
+##------------------------------------------------------------------------------
+## Run clippy
+##------------------------------------------------------------------------------
 clippy:
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
+##------------------------------------------------------------------------------
+## Clean
+##------------------------------------------------------------------------------
 clean:
 	rm -rf target $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Run readelf
+##------------------------------------------------------------------------------
 readelf: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching readelf")
 	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
+##------------------------------------------------------------------------------
+## Run objdump
+##------------------------------------------------------------------------------
 objdump: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching objdump")
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
@@ -184,10 +201,109 @@ objdump: $(KERNEL_ELF)
                 --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
+##------------------------------------------------------------------------------
+## Run nm
+##------------------------------------------------------------------------------
 nm: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
-# For rust-analyzer
+##------------------------------------------------------------------------------
+## Helper target for rust-analyzer
+##------------------------------------------------------------------------------
 check:
 	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Debugging targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: jtagboot openocd gdb gdb-opt0
+
+##------------------------------------------------------------------------------
+## Push the JTAG boot image to the real HW target
+##------------------------------------------------------------------------------
+jtagboot:
+	@$(DOCKER_JTAGBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(JTAG_BOOT_IMAGE)
+
+##------------------------------------------------------------------------------
+## Start OpenOCD session
+##------------------------------------------------------------------------------
+openocd:
+	$(call colorecho, "\nLaunching OpenOCD")
+	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
+
+##------------------------------------------------------------------------------
+## Start GDB session
+##------------------------------------------------------------------------------
+gdb: RUSTC_MISC_ARGS += -C debuginfo=2
+gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
+gdb gdb-opt0: $(KERNEL_ELF)
+	$(call colorecho, "\nLaunching GDB")
+	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Testing targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: test test_boot test_unit test_integration
+
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
+test_boot test_unit test_integration test:
+	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+
+else # QEMU is supported.
+
+##------------------------------------------------------------------------------
+## Run boot test
+##------------------------------------------------------------------------------
+test_boot: $(KERNEL_BIN)
+	$(call colorecho, "\nBoot test - $(BSP)")
+	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
+
+##------------------------------------------------------------------------------
+## Helpers for unit and integration test targets
+##------------------------------------------------------------------------------
+define KERNEL_TEST_RUNNER
+    #!/usr/bin/env bash
+
+    TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
+    TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
+
+    $(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(TARGET) $(BSP) $$TEST_ELF > /dev/null
+    $(OBJCOPY_CMD) $$TEST_ELF $$TEST_BINARY
+    $(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
+endef
+
+export KERNEL_TEST_RUNNER
+
+define test_prepare
+    @mkdir -p target
+    @echo "$$KERNEL_TEST_RUNNER" > target/kernel_test_runner.sh
+    @chmod +x target/kernel_test_runner.sh
+endef
+
+test_unit test_integration: FEATURES += --features test_build
+
+##------------------------------------------------------------------------------
+## Run unit test(s)
+##------------------------------------------------------------------------------
+test_unit:
+	$(call colorecho, "\nCompiling unit test(s) - $(BSP)")
+	$(call test_prepare)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) --lib
+
+##------------------------------------------------------------------------------
+## Run integration test(s)
+##------------------------------------------------------------------------------
+test_integration:
+	$(call colorecho, "\nCompiling integration test(s) - $(BSP)")
+	$(call test_prepare)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) $(TEST_ARG)
+
+test: test_boot test_unit test_integration
+
+endif
diff --git a/16_virtual_mem_part4_higher_half_kernel/README.md b/16_virtual_mem_part4_higher_half_kernel/README.md
index fa594703a..15629a2ad 100644
--- a/16_virtual_mem_part4_higher_half_kernel/README.md
+++ b/16_virtual_mem_part4_higher_half_kernel/README.md
@@ -617,8 +617,8 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_f
 --- 15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs
 +++ 16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs
 @@ -27,8 +27,8 @@
+     // This line will be printed as the test header.
      println!("Testing synchronous exception handling by causing a page fault");
-     println!("-------------------------------------------------------------------\n");
 
 -    println!("Writing beyond mapped area to address 9 GiB...");
 -    let big_addr: u64 = 9 * 1024 * 1024 * 1024;
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/lib.rs b/16_virtual_mem_part4_higher_half_kernel/src/lib.rs
index 7b5cdb09b..c75a96eaf 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/lib.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/lib.rs
@@ -160,8 +160,9 @@ pub fn version() -> &'static str {
 
 /// The default runner for unit tests.
 pub fn test_runner(tests: &[&test_types::UnitTest]) {
+    // This line will be printed as the test header.
     println!("Running {} tests", tests.len());
-    println!("-------------------------------------------------------------------\n");
+
     for (i, test) in tests.iter().enumerate() {
         print!("{:>3}. {:.<58}", i + 1, test.name);
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/panic_wait.rs b/16_virtual_mem_part4_higher_half_kernel/src/panic_wait.rs
index e3a9ed8ab..130e952b8 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/panic_wait.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/panic_wait.rs
@@ -23,12 +23,12 @@ fn _panic_print(args: fmt::Arguments) {
 #[linkage = "weak"]
 #[no_mangle]
 fn _panic_exit() -> ! {
-    #[cfg(not(test_build))]
+    #[cfg(not(feature = "test_build"))]
     {
         cpu::wait_forever()
     }
 
-    #[cfg(test_build)]
+    #[cfg(feature = "test_build")]
     {
         cpu::qemu_exit_failure()
     }
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rb b/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rb
index dfd6b16ea..16fb6c790 100644
--- a/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rb
+++ b/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rb
@@ -8,6 +8,13 @@
 
 TIMEOUT_SECS = 3
 
+# Error class for when expect times out.
+class ExpectTimeoutError < StandardError
+    def initialize
+        super('Timeout while expecting string')
+    end
+end
+
 # Verify sending and receiving works as expected.
 class TxRxHandshake
     def name
@@ -16,7 +23,7 @@ def name
 
     def run(qemu_out, qemu_in)
         qemu_in.write_nonblock('ABC')
-        raise('TX/RX test failed') if qemu_out.expect('OK1234', TIMEOUT_SECS).nil?
+        raise ExpectTimeoutError if qemu_out.expect('OK1234', TIMEOUT_SECS).nil?
     end
 end
 
@@ -27,7 +34,7 @@ def name
     end
 
     def run(qemu_out, _qemu_in)
-        raise('chars_written reported wrong') if qemu_out.expect('6', TIMEOUT_SECS).nil?
+        raise ExpectTimeoutError if qemu_out.expect('6', TIMEOUT_SECS).nil?
     end
 end
 
@@ -38,7 +45,7 @@ def name
     end
 
     def run(qemu_out, _qemu_in)
-        raise('chars_read reported wrong') if qemu_out.expect('3', TIMEOUT_SECS).nil?
+        raise ExpectTimeoutError if qemu_out.expect('3', TIMEOUT_SECS).nil?
     end
 end
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rs b/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rs
index 84b744798..03058f5ef 100644
--- a/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rs
@@ -31,12 +31,5 @@ unsafe fn kernel_init() -> ! {
     print!("{}", console().chars_read());
 
     // The QEMU process running this test will be closed by the I/O test harness.
-    // cpu::wait_forever();
-
-    // For some reason, in this test, rustc or the linker produces an empty binary when
-    // wait_forever() is used. Calling qemu_exit_success() fixes this behavior. So for the time
-    // being, the following lines are just a workaround to fix this compiler/linker weirdness.
-    use libkernel::time::interface::TimeManager;
-    libkernel::time::time_manager().spin_for(core::time::Duration::from_secs(3600));
-    cpu::qemu_exit_success()
+    cpu::wait_forever();
 }
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs b/16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs
index 30d420a75..47ef31fa5 100644
--- a/16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs
@@ -24,8 +24,8 @@ unsafe fn kernel_init() -> ! {
     exception::handling_init();
     bsp::console::qemu_bring_up_console();
 
+    // This line will be printed as the test header.
     println!("Testing synchronous exception handling by causing a page fault");
-    println!("-------------------------------------------------------------------\n");
 
     println!("Writing to bottom of address space to address 1 GiB...");
     let big_addr: u64 = 1 * 1024 * 1024 * 1024;
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/boot_test_string.rb b/16_virtual_mem_part4_higher_half_kernel/tests/boot_test_string.rb
new file mode 100644
index 000000000..f778b3d8c
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/tests/boot_test_string.rb
@@ -0,0 +1,3 @@
+# frozen_string_literal: true
+
+EXPECTED_PRINT = 'Echoing input now'
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/runner.rb b/16_virtual_mem_part4_higher_half_kernel/tests/runner.rb
deleted file mode 100755
index 53116e088..000000000
--- a/16_virtual_mem_part4_higher_half_kernel/tests/runner.rb
+++ /dev/null
@@ -1,143 +0,0 @@
-#!/usr/bin/env ruby
-# frozen_string_literal: true
-
-# SPDX-License-Identifier: MIT OR Apache-2.0
-#
-# Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
-
-require 'English'
-require 'pty'
-
-# Test base class.
-class Test
-    INDENT = '         '
-
-    def print_border(status)
-        puts
-        puts "#{INDENT}-------------------------------------------------------------------"
-        puts status
-        puts "#{INDENT}-------------------------------------------------------------------\n\n\n"
-    end
-
-    def print_error(error)
-        puts
-        print_border("#{INDENT}❌ Failure: #{error}: #{@test_name}")
-    end
-
-    def print_success
-        print_border("#{INDENT}✅ Success: #{@test_name}")
-    end
-
-    def print_output
-        puts "#{INDENT}-------------------------------------------------------------------"
-        print INDENT
-        print '🦀 '
-        print @output.join.gsub("\n", "\n#{INDENT}")
-    end
-
-    def finish(error)
-        print_output
-
-        exit_code = if error
-                        print_error(error)
-                        false
-                    else
-                        print_success
-                        true
-                    end
-
-        exit(exit_code)
-    end
-end
-
-# Executes tests with console I/O.
-class ConsoleTest < Test
-    def initialize(binary, qemu_cmd, test_name, console_subtests)
-        super()
-
-        @binary = binary
-        @qemu_cmd = qemu_cmd
-        @test_name = test_name
-        @console_subtests = console_subtests
-        @cur_subtest = 1
-        @output = ["Running #{@console_subtests.length} console-based tests\n",
-                   "-------------------------------------------------------------------\n\n"]
-    end
-
-    def format_test_name(number, name)
-        formatted_name = "#{number.to_s.rjust(3)}. #{name}"
-        formatted_name.ljust(63, '.')
-    end
-
-    def run_subtest(subtest, qemu_out, qemu_in)
-        @output << format_test_name(@cur_subtest, subtest.name)
-
-        subtest.run(qemu_out, qemu_in)
-
-        @output << "[ok]\n"
-        @cur_subtest += 1
-    end
-
-    def exec
-        error = false
-
-        PTY.spawn(@qemu_cmd) do |qemu_out, qemu_in|
-            begin
-                @console_subtests.each { |t| run_subtest(t, qemu_out, qemu_in) }
-            rescue StandardError => e
-                error = e.message
-            end
-
-            finish(error)
-        end
-    end
-end
-
-# A wrapper around the bare QEMU invocation.
-class RawTest < Test
-    MAX_WAIT_SECS = 5
-
-    def initialize(binary, qemu_cmd, test_name)
-        super()
-
-        @binary = binary
-        @qemu_cmd = qemu_cmd
-        @test_name = test_name
-        @output = []
-    end
-
-    def exec
-        error = 'Timed out waiting for test'
-        io = IO.popen(@qemu_cmd)
-
-        while IO.select([io], nil, nil, MAX_WAIT_SECS)
-            begin
-                @output << io.read_nonblock(1024)
-            rescue EOFError
-                io.close
-                error = $CHILD_STATUS.to_i != 0
-                break
-            end
-        end
-
-        finish(error)
-    end
-end
-
-##--------------------------------------------------------------------------------------------------
-## Script entry point
-##--------------------------------------------------------------------------------------------------
-binary = ARGV.last
-test_name = binary.gsub(%r{.*deps/}, '').split('-')[0]
-console_test_file = "tests/#{test_name}.rb"
-qemu_cmd = ARGV.join(' ')
-
-test_runner = if File.exist?(console_test_file)
-                  load console_test_file
-                  # subtest_collection is provided by console_test_file
-                  ConsoleTest.new(binary, qemu_cmd, test_name, subtest_collection)
-              else
-                  RawTest.new(binary, qemu_cmd, test_name)
-              end
-
-test_runner.exec
diff --git a/X1_JTAG_boot/Makefile b/X1_JTAG_boot/Makefile
index b5a56d075..8336ccb72 100644
--- a/X1_JTAG_boot/Makefile
+++ b/X1_JTAG_boot/Makefile
@@ -2,18 +2,25 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-include ../utils/color.mk.in
+include ../common/color.mk.in
 
-# Default to the RPi3
+##--------------------------------------------------------------------------------------------------
+## Optional, user-provided configuration values
+##--------------------------------------------------------------------------------------------------
+
+# Default to the RPi3.
 BSP ?= rpi3
 
 # Default to a serial device name that is common in Linux.
 DEV_SERIAL ?= /dev/ttyUSB0
 
-# Query the host system's kernel name
-UNAME_S = $(shell uname -s)
 
-# BSP-specific arguments
+
+##--------------------------------------------------------------------------------------------------
+## Hardcoded configuration values
+##--------------------------------------------------------------------------------------------------
+
+# BSP-specific arguments.
 ifeq ($(BSP),rpi3)
     TARGET            = aarch64-unknown-none-softfloat
     KERNEL_BIN        = kernel8.img
@@ -38,11 +45,18 @@ else ifeq ($(BSP),rpi4)
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
-# Export for build.rs
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+
+# Export for build.rs.
 export LINKER_FILE
 
-QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+KERNEL_ELF = target/$(TARGET)/release/kernel
 
+
+
+##--------------------------------------------------------------------------------------------------
+## Command building blocks
+##--------------------------------------------------------------------------------------------------
 RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
 RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
 
@@ -59,64 +73,103 @@ OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
     -O binary
 
-KERNEL_ELF = target/$(TARGET)/release/kernel
+EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
+EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
+EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
 
-DOCKER_IMAGE         = rustembedded/osdev-utils
-DOCKER_CMD           = docker run --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
-DOCKER_CMD_INTERACT  = $(DOCKER_CMD) -i -t
-DOCKER_ARG_DIR_UTILS = -v $(shell pwd)/../utils:/work/utils
-DOCKER_ARG_DEV       = --privileged -v /dev:/dev
+##------------------------------------------------------------------------------
+## Dockerization
+##------------------------------------------------------------------------------
+DOCKER_IMAGE          = rustembedded/osdev-utils
+DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
+DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
+DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
+DOCKER_ARG_DEV        = --privileged -v /dev:/dev
 
 DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
 DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
 
-# Dockerize commands that require USB device passthrough only on Linux
-ifeq ($(UNAME_S),Linux)
+# Dockerize commands, which require USB device passthrough, only on Linux.
+ifeq ($(shell uname -s),Linux)
     DOCKER_CMD_DEV = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DEV)
 
-    DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_UTILS) $(DOCKER_IMAGE)
+    DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
 endif
 
-EXEC_QEMU     = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
-EXEC_MINIPUSH = ruby ../utils/minipush.rb
 
+
+##--------------------------------------------------------------------------------------------------
+## Targets
+##--------------------------------------------------------------------------------------------------
 .PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu chainboot clippy clean readelf objdump nm check
 
 all: $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Build the kernel ELF
+##------------------------------------------------------------------------------
 $(KERNEL_ELF):
 	$(call colorecho, "\nCompiling kernel - $(BSP)")
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
+##------------------------------------------------------------------------------
+## Build the stripped kernel binary
+##------------------------------------------------------------------------------
 $(KERNEL_BIN): $(KERNEL_ELF)
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Build the documentation
+##------------------------------------------------------------------------------
 doc:
 	$(call colorecho, "\nGenerating docs")
 	@$(DOC_CMD) --document-private-items --open
 
-ifeq ($(QEMU_MACHINE_TYPE),)
+##------------------------------------------------------------------------------
+## Run the kernel in QEMU
+##------------------------------------------------------------------------------
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
 qemu:
 	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
-else
+
+else # QEMU is supported.
+
 qemu: $(KERNEL_BIN)
 	$(call colorecho, "\nLaunching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
+
 endif
 
+##------------------------------------------------------------------------------
+## Push the kernel to the real HW target
+##------------------------------------------------------------------------------
 chainboot: $(KERNEL_BIN)
 	@$(DOCKER_CHAINBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Run clippy
+##------------------------------------------------------------------------------
 clippy:
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
 
+##------------------------------------------------------------------------------
+## Clean
+##------------------------------------------------------------------------------
 clean:
 	rm -rf target $(KERNEL_BIN)
 
+##------------------------------------------------------------------------------
+## Run readelf
+##------------------------------------------------------------------------------
 readelf: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching readelf")
 	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
+##------------------------------------------------------------------------------
+## Run objdump
+##------------------------------------------------------------------------------
 objdump: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching objdump")
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
@@ -125,10 +178,40 @@ objdump: $(KERNEL_ELF)
                 --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
+##------------------------------------------------------------------------------
+## Run nm
+##------------------------------------------------------------------------------
 nm: $(KERNEL_ELF)
 	$(call colorecho, "\nLaunching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
-# For rust-analyzer
+##------------------------------------------------------------------------------
+## Helper target for rust-analyzer
+##------------------------------------------------------------------------------
 check:
 	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Testing targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: test test_boot
+
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
+test_boot test :
+	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+
+else # QEMU is supported.
+
+##------------------------------------------------------------------------------
+## Run boot test
+##------------------------------------------------------------------------------
+test_boot: $(KERNEL_BIN)
+	$(call colorecho, "\nBoot test - $(BSP)")
+	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
+
+test: test_boot
+
+endif
diff --git a/X1_JTAG_boot/tests/boot_test_string.rb b/X1_JTAG_boot/tests/boot_test_string.rb
new file mode 100644
index 000000000..029dbd068
--- /dev/null
+++ b/X1_JTAG_boot/tests/boot_test_string.rb
@@ -0,0 +1,3 @@
+# frozen_string_literal: true
+
+EXPECTED_PRINT = 'Please connect over JTAG now'
diff --git a/utils/color.mk.in b/common/color.mk.in
similarity index 100%
rename from utils/color.mk.in
rename to common/color.mk.in
diff --git a/utils/minipush.rb b/common/serial/minipush.rb
similarity index 83%
rename from utils/minipush.rb
rename to common/serial/minipush.rb
index a9ee9bb2a..b18c49832 100755
--- a/utils/minipush.rb
+++ b/common/serial/minipush.rb
@@ -14,19 +14,19 @@ class ProtocolError < StandardError; end
 
 # The main class
 class MiniPush < MiniTerm
-    def initialize(serial_name, binary_image_path)
+    def initialize(serial_name, payload_path)
         super(serial_name)
 
         @name_short = 'MP' # override
-        @binary_image_path = binary_image_path
-        @binary_size = nil
-        @binary_image = nil
+        @payload_path = payload_path
+        @payload_size = nil
+        @payload_data = nil
     end
 
     private
 
     # The three characters signaling the request token form the consecutive sequence "\x03\x03\x03".
-    def wait_for_binary_request
+    def wait_for_payload_request
         puts "[#{@name_short}] 🔌 Please power the target now"
 
         # Timeout for the request token starts after the first sign of life was received.
@@ -54,27 +54,28 @@ def wait_for_binary_request
         end
     end
 
-    def load_binary
-        @binary_size = File.size(@binary_image_path)
-        @binary_image = File.binread(@binary_image_path)
+    def load_payload
+        @payload_size = File.size(@payload_path)
+        @payload_data = File.binread(@payload_path)
     end
 
     def send_size
-        @target_serial.print([@binary_size].pack('L<'))
+        @target_serial.print([@payload_size].pack('L<'))
         raise ProtocolError if @target_serial.read(2) != 'OK'
     end
 
-    def send_binary
+    def send_payload
         pb = ProgressBar.create(
-            total: @binary_size,
+            total: @payload_size,
             format: "[#{@name_short}] ⏩ Pushing %k KiB %b🦀%i %p%% %r KiB/s %a",
             rate_scale: ->(rate) { rate / 1024 },
-            length: 92
+            length: 92,
+            output: $stdout
         )
 
         # Send in 512 byte chunks.
         while pb.progress < pb.total
-            part = @binary_image.slice(pb.progress, 512)
+            part = @payload_data.slice(pb.progress, 512)
             pb.progress += @target_serial.write(part)
         end
     end
@@ -95,10 +96,10 @@ def handle_reconnect(_error)
     # override
     def run
         open_serial
-        wait_for_binary_request
-        load_binary
+        wait_for_payload_request
+        load_payload
         send_size
-        send_binary
+        send_payload
         terminal
     rescue ConnectionError, EOFError, Errno::EIO, ProtocolError, Timeout::Error => e
         handle_reconnect(e)
diff --git a/utils/minipush/progressbar_patch.rb b/common/serial/minipush/progressbar_patch.rb
similarity index 100%
rename from utils/minipush/progressbar_patch.rb
rename to common/serial/minipush/progressbar_patch.rb
diff --git a/utils/miniterm.rb b/common/serial/miniterm.rb
similarity index 99%
rename from utils/miniterm.rb
rename to common/serial/miniterm.rb
index 10cc4bc5d..06e7efd1d 100755
--- a/utils/miniterm.rb
+++ b/common/serial/miniterm.rb
@@ -7,8 +7,9 @@
 
 require 'rubygems'
 require 'bundler/setup'
-require 'io/console'
+
 require 'colorize'
+require 'io/console'
 require 'serialport'
 
 SERIAL_BAUD = 921_600
diff --git a/common/tests/boot_test.rb b/common/tests/boot_test.rb
new file mode 100644
index 000000000..1f5301f96
--- /dev/null
+++ b/common/tests/boot_test.rb
@@ -0,0 +1,75 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+require_relative 'test'
+require 'timeout'
+
+# Check for an expected string when booting the kernel in QEMU.
+class BootTest < Test
+    MAX_WAIT_SECS = 5
+
+    def initialize(qemu_cmd, expected_print)
+        super()
+
+        @qemu_cmd = qemu_cmd
+        @expected_print = expected_print
+
+        @test_name = 'Boot test'
+        @test_description = "Checking for the string: '#{@expected_print}'"
+        @test_output = []
+        @test_error = nil
+    end
+
+    private
+
+    def expected_string_observed?(qemu_output)
+        qemu_output.join.include?(@expected_print)
+    end
+
+    # Convert the recorded output to an array of lines.
+    def post_process_and_add_output(qemu_output)
+        @test_output += qemu_output.join.split("\n")
+    end
+
+    # override
+    def setup
+        @qemu_serial = IO.popen(@qemu_cmd, err: '/dev/null')
+        @qemu_pid = @qemu_serial.pid
+    end
+
+    # override
+    def cleanup
+        Timeout.timeout(MAX_WAIT_SECS) do
+            Process.kill('TERM', @qemu_pid)
+            Process.wait
+        end
+    rescue StandardError => e
+        puts 'QEMU graceful shutdown didn\'t work. Skipping it.'
+        puts e
+    end
+
+    def run_concrete_test
+        qemu_output = []
+        Timeout.timeout(MAX_WAIT_SECS) do
+            while IO.select([@qemu_serial])
+                qemu_output << @qemu_serial.read_nonblock(1024)
+
+                if expected_string_observed?(qemu_output)
+                    @test_error = false
+                    break
+                end
+            end
+        end
+    rescue EOFError
+        @test_error = 'QEMU quit unexpectedly'
+    rescue Timeout::Error
+        @test_error = 'Timed out waiting for magic string'
+    rescue StandardError => e
+        @test_error = e.message
+    ensure
+        post_process_and_add_output(qemu_output)
+    end
+end
diff --git a/common/tests/console_io_test.rb b/common/tests/console_io_test.rb
new file mode 100644
index 000000000..66822a4e9
--- /dev/null
+++ b/common/tests/console_io_test.rb
@@ -0,0 +1,48 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+
+require 'pty'
+require_relative 'test'
+
+# A test doing console I/O with the QEMU binary.
+class ConsoleIOTest < Test
+    def initialize(qemu_cmd, test_name, console_subtests)
+        super()
+
+        @qemu_cmd = qemu_cmd
+        @console_subtests = console_subtests
+
+        @test_name = test_name
+        @test_description = "Running #{@console_subtests.length} console I/O tests"
+        @test_output = []
+        @test_error = nil
+    end
+
+    private
+
+    def format_test_name(number, name)
+        formatted_name = "#{number.to_s.rjust(3)}. #{name}"
+        formatted_name.ljust(63, '.')
+    end
+
+    def run_subtest(subtest, test_id, qemu_out, qemu_in)
+        @test_output << format_test_name(test_id, subtest.name)
+        subtest.run(qemu_out, qemu_in)
+        @test_output.last.concat('[ok]')
+    end
+
+    def run_concrete_test
+        @test_error = false
+
+        PTY.spawn(@qemu_cmd) do |qemu_out, qemu_in|
+            @console_subtests.each_with_index do |t, i|
+                run_subtest(t, i + 1, qemu_out, qemu_in)
+            end
+        rescue StandardError => e
+            @test_error = e.message
+        end
+    end
+end
diff --git a/common/tests/dispatch.rb b/common/tests/dispatch.rb
new file mode 100755
index 000000000..148272657
--- /dev/null
+++ b/common/tests/dispatch.rb
@@ -0,0 +1,35 @@
+#!/usr/bin/env ruby
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+
+require_relative 'boot_test'
+require_relative 'console_io_test'
+require_relative 'exit_code_test'
+
+qemu_cmd = ARGV.join(' ')
+binary = ARGV.last
+test_name = binary.gsub(%r{.*deps/}, '').split('-')[0]
+
+case test_name
+when 'kernel8.img'
+    load 'tests/boot_test_string.rb' # provides 'EXPECTED_PRINT'
+    BootTest.new(qemu_cmd, EXPECTED_PRINT).run # Doesn't return
+
+when 'libkernel'
+    ExitCodeTest.new(qemu_cmd, 'Kernel library unit tests').run # Doesn't return
+
+else
+    console_test_file = "tests/#{test_name}.rb"
+    test_name.concat('.rs')
+    test = if File.exist?(console_test_file)
+               load console_test_file # provides 'subtest_collection'
+               ConsoleIOTest.new(qemu_cmd, test_name, subtest_collection)
+           else
+               ExitCodeTest.new(qemu_cmd, test_name)
+           end
+
+    test.run # Doesn't return
+end
diff --git a/common/tests/exit_code_test.rb b/common/tests/exit_code_test.rb
new file mode 100644
index 000000000..2f14ab782
--- /dev/null
+++ b/common/tests/exit_code_test.rb
@@ -0,0 +1,52 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+
+require 'English'
+require_relative 'test'
+
+# A test that only inspects the exit code of the QEMU binary.
+class ExitCodeTest < Test
+    MAX_WAIT_SECS = 5
+
+    def initialize(qemu_cmd, test_name)
+        super()
+
+        @qemu_cmd = qemu_cmd
+
+        @test_name = test_name
+        @test_description = nil
+        @test_output = []
+        @test_error = nil
+    end
+
+    private
+
+    # Convert the recorded output to an array of lines, and extract the test description.
+    def post_process_output
+        @test_output = @test_output.join.split("\n")
+        @test_description = @test_output.shift
+    end
+
+    # override
+    def setup
+        @qemu_serial = IO.popen(@qemu_cmd)
+    end
+
+    def run_concrete_test
+        Timeout.timeout(MAX_WAIT_SECS) do
+            @test_output << @qemu_serial.read_nonblock(1024) while IO.select([@qemu_serial])
+        end
+    rescue EOFError
+        @qemu_serial.close
+        @test_error = $CHILD_STATUS.to_i.zero? ? false : 'QEMU exit status != 0'
+    rescue Timeout::Error
+        @test_error = 'Timed out waiting for test'
+    rescue StandardError => e
+        @test_error = e.message
+    ensure
+        post_process_output
+    end
+end
diff --git a/common/tests/test.rb b/common/tests/test.rb
new file mode 100644
index 000000000..b0f67f3a1
--- /dev/null
+++ b/common/tests/test.rb
@@ -0,0 +1,82 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+
+# Test base class.
+class Test
+    INDENT = '         '
+
+    def initialize
+        # Template instance variables.
+        # @test_name
+        # @test_description
+        # @test_output
+        # @test_error
+    end
+
+    private
+
+    def print_border(content)
+        puts "#{INDENT}-------------------------------------------------------------------"
+        puts content
+        puts "#{INDENT}-------------------------------------------------------------------"
+    end
+
+    def print_header
+        print_border("#{INDENT}🦀 #{@test_description}")
+        puts
+    end
+
+    def print_footer_error(error)
+        puts
+        print_border("#{INDENT}❌ Failure: #{@test_name}: #{error}")
+        puts
+        puts
+    end
+
+    def print_footer_success
+        puts
+        print_border("#{INDENT}✅ Success: #{@test_name}")
+        puts
+        puts
+    end
+
+    # Expects @test_output the be an array of lines, without '\n'
+    def print_output
+        @test_output.each { |x| print "#{INDENT}#{x}\n" }
+    end
+
+    # Template method.
+    def setup; end
+
+    # Template method.
+    def cleanup; end
+
+    # Template method.
+    def run_concrete_test
+        raise('Not implemented')
+    end
+
+    public
+
+    def run
+        setup
+        run_concrete_test
+        cleanup
+
+        print_header
+        print_output
+
+        exit_code = if @test_error
+                        print_footer_error(@test_error)
+                        false
+                    else
+                        print_footer_success
+                        true
+                    end
+
+        exit(exit_code)
+    end
+end
diff --git a/devtool_completion.bash b/devtool_completion.bash
index 3831425cd..ce4c67b00 100755
--- a/devtool_completion.bash
+++ b/devtool_completion.bash
@@ -1,3 +1,3 @@
 #!/usr/bin/env bash
 
-complete -W "clean clippy copyright diff fmt fmt_check make make_xtra misspell ready_for_publish ready_for_publish_no_rust rubocop test_integration test_unit test_xtra update" devtool
+complete -W "clean clippy copyright diff fmt fmt_check make make_xtra misspell ready_for_publish ready_for_publish_no_rust rubocop test test_boot test_integration test_unit test_xtra update" devtool
diff --git a/doc/12_demo.gif b/doc/12_demo.gif
new file mode 100644
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P^94EFGW$Q$qmKL!d;H?A

diff --git a/doc/demo_PS1.txt b/doc/demo_PS1.txt
new file mode 100644
index 000000000..f83e206e0
--- /dev/null
+++ b/doc/demo_PS1.txt
@@ -0,0 +1 @@
+export PS1="\[\033[01;32m\]rust@osdev\[\033[00m\]:\[\033[01;34m\]\W\[\033[00m\] >> "
diff --git a/utils/devtool.rb b/utils/devtool.rb
index 7639a1b41..270866d7d 100755
--- a/utils/devtool.rb
+++ b/utils/devtool.rb
@@ -11,7 +11,7 @@
 require 'fileutils'
 require_relative 'devtool/copyright'
 
-# Actions for tutorial folders
+# Actions for tutorial folders.
 class TutorialCrate
     attr_reader :folder
 
@@ -26,16 +26,19 @@ def tutorial?
     def clean
         puts 'Cleaning '.light_blue + @folder
 
-        Dir.chdir(@folder) { system('make clean') }
+        # No output needed.
+        Dir.chdir(@folder) { `make clean` }
     end
 
     def update
+        puts "\n\n"
         puts 'Updating '.light_blue + @folder
 
         Dir.chdir(@folder) { system('cargo update') }
     end
 
     def clippy(bsp)
+        puts "\n\n"
         puts "Clippy #{@folder} - BSP: #{bsp}".light_blue
 
         Dir.chdir(@folder) { exit(1) unless system("BSP=#{bsp} make clippy") }
@@ -46,40 +49,60 @@ def fmt_cargo_rust(args)
     end
 
     def make(bsp)
+        puts "\n\n"
         puts "Make #{@folder} - BSP: #{bsp}".light_blue
 
         Dir.chdir(@folder) { exit(1) unless system("BSP=#{bsp} make") }
     end
 
-    def test_unit
-        return unless kernel_tests?
+    def test(bsp)
+        return unless boot_test?
 
-        puts "Unit Tests #{@folder}".light_blue
+        puts "\n\n"
+        puts "Test #{@folder} - BSP: #{bsp}".light_blue
 
-        Dir.chdir(@folder) { exit(1) unless system('TEST=unit make test') }
+        Dir.chdir(@folder) { exit(1) unless system("BSP=#{bsp} make test") }
     end
 
-    def test_integration
-        return unless kernel_tests?
+    def test_boot(bsp)
+        return unless boot_test?
 
-        puts "Integration Tests #{@folder}".light_blue
+        puts "\n\n"
+        puts "Test Boot #{@folder} - BSP: #{bsp}".light_blue
 
-        Dir.chdir(@folder) do
-            Dir['tests/*.rs'].sort.each do |t|
-                t = t.delete_prefix('tests/').delete_suffix('.rs')
-                exit(1) unless system("TEST=#{t} make test")
-            end
-        end
+        Dir.chdir(@folder) { exit(1) unless system("BSP=#{bsp} make test_boot") }
+    end
+
+    def test_unit(bsp)
+        return unless unit_integration_tests?
+
+        puts "\n\n"
+        puts "Test Unit #{@folder} - BSP: #{bsp}".light_blue
+
+        Dir.chdir(@folder) { exit(1) unless system("BSP=#{bsp} make test_unit") }
+    end
+
+    def test_integration(bsp)
+        return unless unit_integration_tests?
+
+        puts "\n\n"
+        puts "Test Integration #{@folder} - BSP: #{bsp}".light_blue
+
+        Dir.chdir(@folder) { exit(1) unless system("BSP=#{bsp} make test_integration") }
     end
 
     private
 
-    def kernel_tests?
-        File.exist?("#{@folder}/tests/runner.rb")
+    def boot_test?
+        Dir.exist?("#{@folder}/tests")
+    end
+
+    def unit_integration_tests?
+        !Dir.glob("#{@folder}/tests/00_*.rs").empty?
     end
 end
 
-# Forks commands to all applicable receivers
+# Forks commands to all applicable receivers.
 class DevTool
     def initialize
         @user_has_supplied_crates = false
@@ -100,11 +123,7 @@ def update
     def clippy(bsp = nil)
         bsp ||= @bsp
 
-        @crates.each do |c|
-            c.clippy(bsp)
-            puts
-            puts
-        end
+        @crates.each { |c| c.clippy(bsp) }
     end
 
     def diff
@@ -132,34 +151,40 @@ def fmt_check
     def make(bsp = nil)
         bsp ||= @bsp
 
-        @crates.each do |c|
-            c.make(bsp)
-            puts
-            puts
-        end
+        @crates.each { |c| c.make(bsp) }
     end
 
     def make_xtra
         return if @user_has_supplied_crates
 
+        puts "\n\n"
         puts 'Make Xtra stuff'.light_blue
         system('cd *_uart_chainloader && bash update.sh')
         system('cd X1_JTAG_boot && bash update.sh')
     end
 
-    def test_xtra
-        return if @user_has_supplied_crates
+    def test(bsp = nil)
+        bsp ||= @bsp
 
-        puts 'Test Xtra stuff'.light_blue
-        exit(1) unless system('cd *_uart_chainloader && make test')
+        @crates.each { |c| c.test(bsp) }
     end
 
-    def test_unit
-        @crates.each(&:test_unit)
+    def test_boot(bsp = nil)
+        bsp ||= @bsp
+
+        @crates.each { |c| c.test_boot(bsp) }
     end
 
-    def test_integration
-        @crates.each(&:test_integration)
+    def test_unit(bsp = nil)
+        bsp ||= @bsp
+
+        @crates.each { |c| c.test_unit(bsp) }
+    end
+
+    def test_integration(bsp = nil)
+        bsp ||= @bsp
+
+        @crates.each { |c| c.test_integration(bsp) }
     end
 
     def copyright
@@ -176,31 +201,25 @@ def rubocop
         exit(1) unless system('bundle exec rubocop')
     end
 
-    def ready_for_publish
+    def ready_for_publish_no_rust
         clean
         fmt
-        misspell
         rubocop
-        clippy('rpi4')
-        clippy('rpi3')
         copyright
         diff
-
-        clean
-        make_xtra
-        test_xtra
-        test_unit
-        test_integration
+        misspell
         clean
     end
 
-    def ready_for_publish_no_rust
-        clean
-        fmt
-        misspell
-        rubocop
-        copyright
-        diff
+    def ready_for_publish
+        ready_for_publish_no_rust
+
+        make_xtra
+        clippy('rpi4')
+        clippy('rpi3')
+        test_boot('rpi3')
+        test_unit('rpi3')
+        test_integration('rpi3')
         clean
     end
 
@@ -288,6 +307,7 @@ def copyright_source_files
         tracked_files.select do |f|
             next unless File.exist?(f)
             next if f.include?('build.rs')
+            next if f.include?('boot_test_string.rb')
 
             f.include?('Makefile') ||
                 f.include?('Dockerfile') ||
diff --git a/utils/devtool/copyright.rb b/utils/devtool/copyright.rb
index 956efce10..37aba399a 100644
--- a/utils/devtool/copyright.rb
+++ b/utils/devtool/copyright.rb
@@ -4,6 +4,8 @@
 #
 # Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
+require 'rubygems'
+require 'bundler/setup'
 require 'colorize'
 
 def copyright_check_files(source_files)
diff --git a/utils/update_copyright.rb b/utils/update_copyright.rb
index c86d8ac30..927bc93c5 100755
--- a/utils/update_copyright.rb
+++ b/utils/update_copyright.rb
@@ -5,6 +5,8 @@
 #
 # Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
 
+require 'rubygems'
+require 'bundler/setup'
 require 'date'
 
 files = `git ls-files`.split("\n")

From f196a67ff7cd49730a4a6af648f683faebd79f16 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 12 Jul 2021 22:36:05 +0200
Subject: [PATCH 084/214] Use toml extension for rust-toolchain

---
 rust-toolchain => rust-toolchain.toml | 0
 1 file changed, 0 insertions(+), 0 deletions(-)
 rename rust-toolchain => rust-toolchain.toml (100%)

diff --git a/rust-toolchain b/rust-toolchain.toml
similarity index 100%
rename from rust-toolchain
rename to rust-toolchain.toml

From c435dd60346a9930ffe55ff10f253d34741cd4e9 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 12 Jul 2021 22:40:48 +0200
Subject: [PATCH 085/214] Update dependencies

---
 12_integrated_testing/Cargo.lock                 | 16 ++++++++--------
 13_exceptions_part2_peripheral_IRQs/Cargo.lock   | 16 ++++++++--------
 14_virtual_mem_part2_mmio_remap/Cargo.lock       | 16 ++++++++--------
 .../Cargo.lock                                   | 16 ++++++++--------
 .../Cargo.lock                                   | 16 ++++++++--------
 5 files changed, 40 insertions(+), 40 deletions(-)

diff --git a/12_integrated_testing/Cargo.lock b/12_integrated_testing/Cargo.lock
index 18175739d..b8780bfe4 100644
--- a/12_integrated_testing/Cargo.lock
+++ b/12_integrated_testing/Cargo.lock
@@ -24,18 +24,18 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.26"
+version = "1.0.27"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "a152013215dca273577e18d2bf00fa862b89b24169fb78c4c95aeb07992c9cec"
+checksum = "f0d8caf72986c1a598726adc988bb5984792ef84f5ee5aa50209145ee8077038"
 dependencies = [
  "unicode-xid",
 ]
 
 [[package]]
 name = "qemu-exit"
-version = "2.0.0"
+version = "2.0.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "e179da212ad772061d4120ad2a86a019f929362a477582d8c8014dbf7509cd83"
+checksum = "220eb94f40665452ab6114bf8a8d86aa1fd41c6dbfaa4ab71b5912c8adb80389"
 
 [[package]]
 name = "quote"
@@ -48,9 +48,9 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.68"
+version = "1.0.73"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "3ce15dd3ed8aa2f8eeac4716d6ef5ab58b6b9256db41d7e1a0224c2788e8fd87"
+checksum = "f71489ff30030d2ae598524f61326b902466f72a0fb1a8564c001cc63425bcc7"
 dependencies = [
  "proc-macro2",
  "quote",
@@ -79,6 +79,6 @@ checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
 name = "unicode-xid"
-version = "0.2.1"
+version = "0.2.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f7fe0bb3479651439c9112f72b6c505038574c9fbb575ed1bf3b797fa39dd564"
+checksum = "8ccb82d61f80a663efe1f787a51b16b5a51e3314d6ac365b08639f52387b33f3"
diff --git a/13_exceptions_part2_peripheral_IRQs/Cargo.lock b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
index 7fd778588..a66aa8f5b 100644
--- a/13_exceptions_part2_peripheral_IRQs/Cargo.lock
+++ b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
@@ -24,18 +24,18 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.26"
+version = "1.0.27"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "a152013215dca273577e18d2bf00fa862b89b24169fb78c4c95aeb07992c9cec"
+checksum = "f0d8caf72986c1a598726adc988bb5984792ef84f5ee5aa50209145ee8077038"
 dependencies = [
  "unicode-xid",
 ]
 
 [[package]]
 name = "qemu-exit"
-version = "2.0.0"
+version = "2.0.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "e179da212ad772061d4120ad2a86a019f929362a477582d8c8014dbf7509cd83"
+checksum = "220eb94f40665452ab6114bf8a8d86aa1fd41c6dbfaa4ab71b5912c8adb80389"
 
 [[package]]
 name = "quote"
@@ -48,9 +48,9 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.68"
+version = "1.0.73"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "3ce15dd3ed8aa2f8eeac4716d6ef5ab58b6b9256db41d7e1a0224c2788e8fd87"
+checksum = "f71489ff30030d2ae598524f61326b902466f72a0fb1a8564c001cc63425bcc7"
 dependencies = [
  "proc-macro2",
  "quote",
@@ -79,6 +79,6 @@ checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
 name = "unicode-xid"
-version = "0.2.1"
+version = "0.2.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f7fe0bb3479651439c9112f72b6c505038574c9fbb575ed1bf3b797fa39dd564"
+checksum = "8ccb82d61f80a663efe1f787a51b16b5a51e3314d6ac365b08639f52387b33f3"
diff --git a/14_virtual_mem_part2_mmio_remap/Cargo.lock b/14_virtual_mem_part2_mmio_remap/Cargo.lock
index 6257551ab..d2aaae6ea 100644
--- a/14_virtual_mem_part2_mmio_remap/Cargo.lock
+++ b/14_virtual_mem_part2_mmio_remap/Cargo.lock
@@ -24,18 +24,18 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.26"
+version = "1.0.27"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "a152013215dca273577e18d2bf00fa862b89b24169fb78c4c95aeb07992c9cec"
+checksum = "f0d8caf72986c1a598726adc988bb5984792ef84f5ee5aa50209145ee8077038"
 dependencies = [
  "unicode-xid",
 ]
 
 [[package]]
 name = "qemu-exit"
-version = "2.0.0"
+version = "2.0.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "e179da212ad772061d4120ad2a86a019f929362a477582d8c8014dbf7509cd83"
+checksum = "220eb94f40665452ab6114bf8a8d86aa1fd41c6dbfaa4ab71b5912c8adb80389"
 
 [[package]]
 name = "quote"
@@ -48,9 +48,9 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.68"
+version = "1.0.73"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "3ce15dd3ed8aa2f8eeac4716d6ef5ab58b6b9256db41d7e1a0224c2788e8fd87"
+checksum = "f71489ff30030d2ae598524f61326b902466f72a0fb1a8564c001cc63425bcc7"
 dependencies = [
  "proc-macro2",
  "quote",
@@ -79,6 +79,6 @@ checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
 name = "unicode-xid"
-version = "0.2.1"
+version = "0.2.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f7fe0bb3479651439c9112f72b6c505038574c9fbb575ed1bf3b797fa39dd564"
+checksum = "8ccb82d61f80a663efe1f787a51b16b5a51e3314d6ac365b08639f52387b33f3"
diff --git a/15_virtual_mem_part3_precomputed_tables/Cargo.lock b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
index d91bc03d3..5801a6b72 100644
--- a/15_virtual_mem_part3_precomputed_tables/Cargo.lock
+++ b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
@@ -24,18 +24,18 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.26"
+version = "1.0.27"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "a152013215dca273577e18d2bf00fa862b89b24169fb78c4c95aeb07992c9cec"
+checksum = "f0d8caf72986c1a598726adc988bb5984792ef84f5ee5aa50209145ee8077038"
 dependencies = [
  "unicode-xid",
 ]
 
 [[package]]
 name = "qemu-exit"
-version = "2.0.0"
+version = "2.0.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "e179da212ad772061d4120ad2a86a019f929362a477582d8c8014dbf7509cd83"
+checksum = "220eb94f40665452ab6114bf8a8d86aa1fd41c6dbfaa4ab71b5912c8adb80389"
 
 [[package]]
 name = "quote"
@@ -48,9 +48,9 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.68"
+version = "1.0.73"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "3ce15dd3ed8aa2f8eeac4716d6ef5ab58b6b9256db41d7e1a0224c2788e8fd87"
+checksum = "f71489ff30030d2ae598524f61326b902466f72a0fb1a8564c001cc63425bcc7"
 dependencies = [
  "proc-macro2",
  "quote",
@@ -79,6 +79,6 @@ checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
 name = "unicode-xid"
-version = "0.2.1"
+version = "0.2.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f7fe0bb3479651439c9112f72b6c505038574c9fbb575ed1bf3b797fa39dd564"
+checksum = "8ccb82d61f80a663efe1f787a51b16b5a51e3314d6ac365b08639f52387b33f3"
diff --git a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
index b9a33f4ec..98edacde7 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
+++ b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
@@ -24,18 +24,18 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.26"
+version = "1.0.27"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "a152013215dca273577e18d2bf00fa862b89b24169fb78c4c95aeb07992c9cec"
+checksum = "f0d8caf72986c1a598726adc988bb5984792ef84f5ee5aa50209145ee8077038"
 dependencies = [
  "unicode-xid",
 ]
 
 [[package]]
 name = "qemu-exit"
-version = "2.0.0"
+version = "2.0.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "e179da212ad772061d4120ad2a86a019f929362a477582d8c8014dbf7509cd83"
+checksum = "220eb94f40665452ab6114bf8a8d86aa1fd41c6dbfaa4ab71b5912c8adb80389"
 
 [[package]]
 name = "quote"
@@ -48,9 +48,9 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.68"
+version = "1.0.73"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "3ce15dd3ed8aa2f8eeac4716d6ef5ab58b6b9256db41d7e1a0224c2788e8fd87"
+checksum = "f71489ff30030d2ae598524f61326b902466f72a0fb1a8564c001cc63425bcc7"
 dependencies = [
  "proc-macro2",
  "quote",
@@ -79,6 +79,6 @@ checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
 name = "unicode-xid"
-version = "0.2.1"
+version = "0.2.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f7fe0bb3479651439c9112f72b6c505038574c9fbb575ed1bf3b797fa39dd564"
+checksum = "8ccb82d61f80a663efe1f787a51b16b5a51e3314d6ac365b08639f52387b33f3"

From 062722a9e634505218ac785972250972bf89a958 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 12 Jul 2021 23:02:56 +0200
Subject: [PATCH 086/214] Update toolchain

---
 06_uart_chainloader/demo_payload_rpi3.img | Bin 6696 -> 6664 bytes
 06_uart_chainloader/demo_payload_rpi4.img | Bin 6528 -> 6512 bytes
 X1_JTAG_boot/jtag_boot_rpi3.img           | Bin 7840 -> 7848 bytes
 X1_JTAG_boot/jtag_boot_rpi4.img           | Bin 6568 -> 6552 bytes
 rust-toolchain.toml                       |   2 +-
 5 files changed, 1 insertion(+), 1 deletion(-)

diff --git a/06_uart_chainloader/demo_payload_rpi3.img b/06_uart_chainloader/demo_payload_rpi3.img
index 5e3bf103b1fecffa26150f846a9608f5b22fe04a..d2c22dd2c7beef03a3ff785d293686b2d3b1e652 100755
GIT binary patch
delta 1628
zcmZ8gZ%kWN6hF7Gz$-&2ltNp#_LYu8XR@&rhHgaOfW-|p!-i!sCL1_Sn9CH3ACxR9
zY>A?sNv{us`!Y66#vai`=!_6EGsY6#G?M8;)GxlGhJqjD&)D+(!}HwNOJX?5?dv(e
z^XGTYz2|Cme|5rblPf6!_|z}cvOQ#mKL4omEI?}rdLyYYJW&ZyTn|!L1AQ-G+r|`G
z?i!}ocaZ|RyiZ&V13g4+@njvTBKe<NVSwe*eg*26lRcKl2m$4a5VuT~B*WHbVo3#)
zv8)xcGZmzv{UtPA@ujNe5LFX^u2^6|0_olj;rOifas2yU=g3Oi(#*=G)4wN&a<a3C
zlDv|4laLAJWPY8uuZrdYB(wmiB34XoA?hEEK+lgoPQ{d4na*#Hw0Y<-b|E|>>uunh
z1#}~%Hv+GFs98hsji&Ih{{XUn%P>mC?Xo&2kWoz#5wne^nGNIKwf07AYfZ`)=ib;_
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za}HhJN{yIBT?i0$K_GM?AgJH`YYehkVo!t0t%5)}v1S-cqTfqD8?U1*%3(%&+0`e~
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zM+7xp3;MSTwYzL7ADx{GvMl5Fvd9;hr7a(7a6Sp<J1|^9HKBMk?Ew81q}YMBhe%L+
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zf#Un1s{-f?0jp}nveXB$Z1pt8T(V}yWYe2;Hm)6Rd2$h?+Ik{S=8^+?a~9BCqU<T!
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zHWKa4foqF6v<2kUOzV_Ci!K%+#Y#6!GU^8z?Y`~Gki$=iGUd2>{C{AkryyO-0UcKe
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zlqGno<<McYq`CjsB^kdZt}k(2>2$hs#exjzDo}oQdmH+NjQSz}M%ueOUwk<leN$>V
zDTM(}@tP&P=4K9UrOI5%ld&0BCQTN1yR%8Z&UGutr?`$6V#++HitoylPdIMp`eytB
z$8jN;MBpuM!1Xm{b3iA@H~Q${dN%iemFpX`omZAi2XmM5Gi}-3%KNS|C-eQ0GcDkO
d^U6=Iqy7!YuQ*!BQTCPbOeoK}>lM)>{RhgX*|Got

delta 1651
zcmZ8hUu;ul6hB|@ZFld0tzFw~9nilUv>0K_HYZ}(-N+&o4NC*Tg+#|t#PEO{@xcev
zP96kCq=#?17>${j2)7{$ZcCgdrpSxFXohAn(TBSsNmtMqhTxsL>-pNd#OzD%?#`dz
z@B5u|&*|y5%Wc_!nvWv`xEjf0^f7h~`_>080_;yfCN<Xz+s`;*Y6!sB3E{y3JQG`|
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z{Ys;z`!v9WM>7pc$%R?xY(avYA^CEJWoxof0eU8y))nFfimAj^IK?n=&5K1U$Ea}W
zq8E=xGV9SGO@+;}zMF&;H#>EaoM7wGN;~w07}FOdh6^!Czx%H>CVJ4zV3fDHW35;H
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zxgO|@i_h^?@1A{1Lz(n*8|k)f!?t;^zrOMtUpeU~A1~Gh-S10f^NRiEg+TZ}J;%`X

diff --git a/06_uart_chainloader/demo_payload_rpi4.img b/06_uart_chainloader/demo_payload_rpi4.img
index a8c1362c19ab56f4e4d1857fe201b383f5618cbf..554d4a9e72f7d2dbed024fae7e0990c1141b49c8 100755
GIT binary patch
delta 1524
zcmZ`(TTC2P82-=9?lQYw*(>ah!0e3`XtlObvXB~?Vr!H>6w#`UiKSGdO*PWxsj+sK
zRijDK?#UsN^oiI9Gn<+;Suo{ATkDJQ0jma|jI%`(zy~S4E{z@knK?@$i6=RG&Nu(<
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BtL^{*

delta 1622
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diff --git a/X1_JTAG_boot/jtag_boot_rpi3.img b/X1_JTAG_boot/jtag_boot_rpi3.img
index 5e9581f57bcc227a275f045d352db907902e89c0..b216c1e7ce7c72e4d28dc6eadd347147aee75e8e 100755
GIT binary patch
delta 2475
zcmb7_e@t7~701tg4~z{?VjCNRUBCp=V4EKyZW2fqcp<cnO(QagN?ofJQre9|&;<Rj
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delta 2428
zcmcgtYfKbZ6h1Sv?9KuT3%fjaWp{ZAyHpTYc`7VwgWv-LYhq)JAhqJ7X<7d?jb>N*
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QlLm$O^m9R^J=VfM04dYcfdBvi

diff --git a/X1_JTAG_boot/jtag_boot_rpi4.img b/X1_JTAG_boot/jtag_boot_rpi4.img
index 33045fe94e046489ca6227aa30056cd73e29f3fc..be9024cb4b881f1cb79a3549028d9552be9be81a 100755
GIT binary patch
delta 1046
zcmZ8fOH30{6uobz;1opqpOz}jR6aH&2-Xi^f~CX=sHs-O&qfp%hQtru=)%YpS)gLV
z%Om2-fG)H|6JuGRiHe|!JH_~0wi**eV-Vc{%6RAFLT@s2-+A|U?!E6;=xV6nXH`lm
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zMrYPSvg5&pSo8Ah@h=~NepS`kz64va`*TPs&BG*jhF7v8M+G;$ibWlPE^yNHM?ydF
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zsUr40B3Qz>Y+;1Mo+kiCaoi(8SGYQ2f$uh}8>)v@wMA<L69aqc@&-?F$OYvn7`ocT
zk%pbpt{s(CRnp%2SPMR5W_OEZlm*={8XJ9vuO5g$Su`+CRhO;t_{lh)&X|6c9>cDf
zc)y7?0y)nehVi|F9rP8hILjNbPuJ|4SdcSjGp@!wY(gvz<eJqyX0`vTgUBMDx^*_M
z5rr$(#c5(3wJ!fR;qtP3o^Nc-yN2|#jJHzOCa`T+Q`Gc7W|Gf0@o67h5L*L($?Y@E
TcGIlsFn*0b7WdY%UZ3;_$h#nA

delta 1127
zcmZ8fUrbY182`?_E#87)TdwWxKziF6uy#SE{$&YVAj<?bXoF<B2kO7X=%S%9MxVGU
z58_DHvqQ!nS@*I_;&iFJ7<FYx;*uo>ql9Ex(vBBa%re;?#LQm5+k2L%C%N}`zVG~g
z-}(NWZ{pv_(*akmkrII0p&SkGBoTU~E|3A}E5u<>6!b*Y2~+0*<aSU8JLyQU`WF$V
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z0F7bvQ4*#hJ;K&FTFEpk)qKqs9QT{i8SRkiQquz?zlIoj5oo&zV=AambK=0f=KAW1
zzVU~Z{ITCwpyN54akdI1oHd;*6^`sW`iha7U{<dFlaT3bspd1X;ZO^GZkm7RBVb4X
z=|UATmb-wCUTLLLfn9X(YfLIMgXxIX+G-Ml^JbSYSNaH6|Lv8Gf5hOVjH<EY8(Ed7
z(@Q;=n8R4Yq$<(fb46hTo`zZo&^*ShdTowddCmfiv9#w{px~y(Enu9vJCf*Gn@KG%
zLOGYwIacYdtL$i`)fnU^`G9TlHVdSV4S2&tS}n~l68eWo=#7#&J^`>}Koy^vrs+TW
zpB*1i1*%E~#7@0|iijs5NDHVrYuX%hhRl`Xuv&$-BwkHO4}VIj6>!Ie+}NOp7O{kU
z42%)1+=XYGU$oQZ7%^CV?WqsH4bpD(FExpVIfUg#fLhOCsmW>JYe|Q!9KXXHXK>!^
zX6^9Mbchqga+4(-Vp%x!mH>lTf(=$tugvZ56p>f$B9b9mK#stR0MJ%h$@F70CMAc4
zk3pLBVk64hT$mD~C#*-o7QAaKtm#U#Y~J0#CgggSla=VOfKFT|!N&dE?(90C9^Aim
z+cx!ZN1_klAtUSk<Pi(3f83)hHn%Lq-({a|W3$Wa<5cQ=3U?>C-^cy$^FH;lqOYyx
zwBMHFjLPdQx3Q1q_5O9A``J<dUrhHYmA|@e>4KkSe2v}-p4d9Byrr<8mHzPmtS|Yo
zhaX$0;ioICHP9wmC4X|TyO-@%Hj$TXP}v&c#One3n%x}J9FvIbo?O5Cf@~9pIVO2G
T6&}Do#qNvtZh|Ab6j0v)rMWvb

diff --git a/rust-toolchain.toml b/rust-toolchain.toml
index 70934f67f..119b34fac 100644
--- a/rust-toolchain.toml
+++ b/rust-toolchain.toml
@@ -1,4 +1,4 @@
 [toolchain]
-channel = "nightly-2021-07-01"
+channel = "nightly-2021-07-12"
 components = ["llvm-tools-preview"]
 targets = ["aarch64-unknown-none-softfloat"]

From dbf34410c9209637a1f9ac147cd82467ff65b3b7 Mon Sep 17 00:00:00 2001
From: IfanTsai <1558499691@qq.com>
Date: Mon, 2 Aug 2021 22:45:19 +0800
Subject: [PATCH 087/214] Update README.CN.md

Correct typos
---
 00_before_we_start/README.CN.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/00_before_we_start/README.CN.md b/00_before_we_start/README.CN.md
index 3d7e19576..f36182d41 100644
--- a/00_before_we_start/README.CN.md
+++ b/00_before_we_start/README.CN.md
@@ -14,7 +14,7 @@
 
 有的内核的子系统是基于特定目标架构的处理器的低级代码。对于每种支持的处理器架构，都有一个子文件夹在`src/_arch`中。例如，`src/_arch/aarch64`
 
-子模块系统在每个处理器架构的`src`文件夹中。例如，属于内核内存子系统(`src/memory.rs`)的代码将会被放在`src/_arch/aarch64/memory.rs`.后一个文件将被直接包含和重新导出到`src/memory.rs`中，以便架构代码部分是明显的遵循代码模块话。这意味着在`src/_arch/aarch64/memory.rs`中定义的公共函数foo（）。仅可通过`crate :: memory :: foo（）`访问。
+子模块系统在每个处理器架构的`src`文件夹中。例如，属于内核内存子系统(`src/memory.rs`)的代码将会被放在`src/_arch/aarch64/memory.rs`.后一个文件将被直接包含和重新导出到`src/memory.rs`中，以便架构代码部分是明显的遵循代码模块化。这意味着在`src/_arch/aarch64/memory.rs`中定义的公共函数foo（）。仅可通过`crate :: memory :: foo（）`访问。
 
 `_arch`中的`_`表示此文件夹不属于标准模块层次结构。而是使用`＃[path =“ _ arch/xxx/yyy.rs”]`属性将其内容有条件地引入各自的文件中。
 

From 909b05b23fa2610bf6bacb7ef91cd45d6bca9ea5 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 11 Oct 2021 12:33:33 +0200
Subject: [PATCH 088/214] Bump compiler version

---
 06_uart_chainloader/demo_payload_rpi3.img     | Bin 6664 -> 6872 bytes
 06_uart_chainloader/demo_payload_rpi4.img     | Bin 6512 -> 6712 bytes
 .../README.md                                 |  14 ++++++--------
 .../src/_arch/aarch64/memory/mmu.rs           |   2 +-
 .../src/main.rs                               |   2 --
 11_exceptions_part1_groundwork/README.md      |   4 ++--
 .../src/_arch/aarch64/memory/mmu.rs           |   2 +-
 11_exceptions_part1_groundwork/src/main.rs    |   2 --
 12_integrated_testing/README.md               |  14 +++++---------
 .../src/_arch/aarch64/memory/mmu.rs           |   2 +-
 12_integrated_testing/src/lib.rs              |   2 --
 13_exceptions_part2_peripheral_IRQs/README.md |   6 +++---
 .../src/_arch/aarch64/memory/mmu.rs           |   2 +-
 .../src/lib.rs                                |   2 --
 14_virtual_mem_part2_mmio_remap/README.md     |  18 +++++++++---------
 14_virtual_mem_part2_mmio_remap/src/lib.rs    |   4 +---
 .../README.md                                 |  12 ++++++------
 .../src/lib.rs                                |   4 +---
 .../translation_table_tool/arch.rb            |   2 +-
 .../translation_table_tool/generic.rb         |  10 +++++-----
 .../README.md                                 |   2 +-
 .../src/lib.rs                                |   4 +---
 .../translation_table_tool/arch.rb            |   2 +-
 .../translation_table_tool/generic.rb         |  10 +++++-----
 X1_JTAG_boot/jtag_boot_rpi3.img               | Bin 7848 -> 8032 bytes
 X1_JTAG_boot/jtag_boot_rpi4.img               | Bin 6552 -> 6736 bytes
 rust-toolchain.toml                           |   2 +-
 27 files changed, 52 insertions(+), 72 deletions(-)

diff --git a/06_uart_chainloader/demo_payload_rpi3.img b/06_uart_chainloader/demo_payload_rpi3.img
index d2c22dd2c7beef03a3ff785d293686b2d3b1e652..c3bf075513e0384378ae56a40d10fbcc2d6676da 100755
GIT binary patch
delta 4173
zcmcImeNYtV8Gm;74(^Tvx#NHX)Z6od+#QM^1P;tZ7R36MREuP6#~L8S2`3_gPLob!
z_Ar@=dKlTRnY1<?i<xP%7vp56+L8RxVC)}h%*PlTC;ucKq-pukRE$;5M7F<oSu&Wm
ze|Bf?-re{4z0b$*dEV!J58VH0MPGp<R;qABZ~8F?D!9*;pA;4I95se0)-Y5~)nnzP
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zgHGE>N`;7zr^D6`js|MTKJKtesr5*b!%C^7jT*-VF0nIru<Fn}a=%ZLks%=?kpaSY
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delta 3996
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diff --git a/06_uart_chainloader/demo_payload_rpi4.img b/06_uart_chainloader/demo_payload_rpi4.img
index 554d4a9e72f7d2dbed024fae7e0990c1141b49c8..03cddd9e44cd41bb8a0b48e143c35bc4327d17c8 100755
GIT binary patch
delta 4179
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diff --git a/10_virtual_mem_part1_identity_mapping/README.md b/10_virtual_mem_part1_identity_mapping/README.md
index 9b16747d1..6eb88329c 100644
--- a/10_virtual_mem_part1_identity_mapping/README.md
+++ b/10_virtual_mem_part1_identity_mapping/README.md
@@ -801,7 +801,7 @@ diff -uNr 09_privilege_level/src/_arch/aarch64/memory/mmu.rs 10_virtual_mem_part
 +        // Populate translation tables.
 +        KERNEL_TABLES
 +            .populate_tt_entries()
-+            .map_err(|e| MMUEnableError::Other(e))?;
++            .map_err(MMUEnableError::Other)?;
 +
 +        // Set the "Translation Table Base Register".
 +        TTBR0_EL1.set_baddr(KERNEL_TABLES.phys_base_address());
@@ -1042,19 +1042,17 @@ diff -uNr 09_privilege_level/src/bsp.rs 10_virtual_mem_part1_identity_mapping/sr
 diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/src/main.rs
 --- 09_privilege_level/src/main.rs
 +++ 10_virtual_mem_part1_identity_mapping/src/main.rs
-@@ -105,7 +105,11 @@
+@@ -105,7 +105,9 @@
  //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
  #![allow(clippy::upper_case_acronyms)]
 +#![allow(incomplete_features)]
  #![feature(const_fn_fn_ptr_basics)]
-+#![feature(const_generics)]
-+#![feature(const_panic)]
 +#![feature(core_intrinsics)]
  #![feature(format_args_nl)]
  #![feature(global_asm)]
  #![feature(panic_info_message)]
-@@ -118,6 +122,7 @@
+@@ -118,6 +120,7 @@
  mod cpu;
  mod driver;
  mod exception;
@@ -1062,7 +1060,7 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
  mod panic_wait;
  mod print;
  mod synchronization;
-@@ -128,9 +133,17 @@
+@@ -128,9 +131,17 @@
  /// # Safety
  ///
  /// - Only a single core must be active and running this function.
@@ -1081,7 +1079,7 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
 
      for i in bsp::driver::driver_manager().all_device_drivers().iter() {
          if let Err(x) = i.init() {
-@@ -159,6 +172,9 @@
+@@ -159,6 +170,9 @@
      );
      info!("Booting on: {}", bsp::board_name());
 
@@ -1091,7 +1089,7 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
      let (_, privilege_level) = exception::current_privilege_level();
      info!("Current privilege level: {}", privilege_level);
 
-@@ -182,6 +198,13 @@
+@@ -182,6 +196,13 @@
      info!("Timer test, spinning for 1 second");
      time::time_manager().spin_for(Duration::from_secs(1));
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
index eaeff3219..2af44aac9 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
@@ -137,7 +137,7 @@ impl memory::mmu::interface::MMU for MemoryManagementUnit {
         // Populate translation tables.
         KERNEL_TABLES
             .populate_tt_entries()
-            .map_err(|e| MMUEnableError::Other(e))?;
+            .map_err(MMUEnableError::Other)?;
 
         // Set the "Translation Table Base Register".
         TTBR0_EL1.set_baddr(KERNEL_TABLES.phys_base_address());
diff --git a/10_virtual_mem_part1_identity_mapping/src/main.rs b/10_virtual_mem_part1_identity_mapping/src/main.rs
index 3a1958d6a..f7c949bec 100644
--- a/10_virtual_mem_part1_identity_mapping/src/main.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/main.rs
@@ -107,8 +107,6 @@
 #![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
 #![feature(const_fn_fn_ptr_basics)]
-#![feature(const_generics)]
-#![feature(const_panic)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(global_asm)]
diff --git a/11_exceptions_part1_groundwork/README.md b/11_exceptions_part1_groundwork/README.md
index 629f5f091..3a471317b 100644
--- a/11_exceptions_part1_groundwork/README.md
+++ b/11_exceptions_part1_groundwork/README.md
@@ -971,7 +971,7 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/exception.rs 11_exceptions_p
 diff -uNr 10_virtual_mem_part1_identity_mapping/src/main.rs 11_exceptions_part1_groundwork/src/main.rs
 --- 10_virtual_mem_part1_identity_mapping/src/main.rs
 +++ 11_exceptions_part1_groundwork/src/main.rs
-@@ -141,6 +141,8 @@
+@@ -139,6 +139,8 @@
      use driver::interface::DriverManager;
      use memory::mmu::interface::MMU;
 
@@ -980,7 +980,7 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/main.rs 11_exceptions_part1_
      if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
          panic!("MMU: {}", string);
      }
-@@ -198,13 +200,28 @@
+@@ -196,13 +198,28 @@
      info!("Timer test, spinning for 1 second");
      time::time_manager().spin_for(Duration::from_secs(1));
 
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
index eaeff3219..2af44aac9 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
@@ -137,7 +137,7 @@ impl memory::mmu::interface::MMU for MemoryManagementUnit {
         // Populate translation tables.
         KERNEL_TABLES
             .populate_tt_entries()
-            .map_err(|e| MMUEnableError::Other(e))?;
+            .map_err(MMUEnableError::Other)?;
 
         // Set the "Translation Table Base Register".
         TTBR0_EL1.set_baddr(KERNEL_TABLES.phys_base_address());
diff --git a/11_exceptions_part1_groundwork/src/main.rs b/11_exceptions_part1_groundwork/src/main.rs
index cd9d0786e..637684b00 100644
--- a/11_exceptions_part1_groundwork/src/main.rs
+++ b/11_exceptions_part1_groundwork/src/main.rs
@@ -107,8 +107,6 @@
 #![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
 #![feature(const_fn_fn_ptr_basics)]
-#![feature(const_generics)]
-#![feature(const_panic)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(global_asm)]
diff --git a/12_integrated_testing/README.md b/12_integrated_testing/README.md
index c25e30474..651b8ae07 100644
--- a/12_integrated_testing/README.md
+++ b/12_integrated_testing/README.md
@@ -1281,7 +1281,7 @@ diff -uNr 11_exceptions_part1_groundwork/src/exception.rs 12_integrated_testing/
 diff -uNr 11_exceptions_part1_groundwork/src/lib.rs 12_integrated_testing/src/lib.rs
 --- 11_exceptions_part1_groundwork/src/lib.rs
 +++ 12_integrated_testing/src/lib.rs
-@@ -0,0 +1,187 @@
+@@ -0,0 +1,185 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -1393,8 +1393,6 @@ diff -uNr 11_exceptions_part1_groundwork/src/lib.rs 12_integrated_testing/src/li
 +#![allow(clippy::upper_case_acronyms)]
 +#![allow(incomplete_features)]
 +#![feature(const_fn_fn_ptr_basics)]
-+#![feature(const_generics)]
-+#![feature(const_panic)]
 +#![feature(core_intrinsics)]
 +#![feature(format_args_nl)]
 +#![feature(global_asm)]
@@ -1473,7 +1471,7 @@ diff -uNr 11_exceptions_part1_groundwork/src/lib.rs 12_integrated_testing/src/li
 diff -uNr 11_exceptions_part1_groundwork/src/main.rs 12_integrated_testing/src/main.rs
 --- 11_exceptions_part1_groundwork/src/main.rs
 +++ 12_integrated_testing/src/main.rs
-@@ -6,127 +6,12 @@
+@@ -6,125 +6,12 @@
  #![doc(html_logo_url = "https://git.io/JeGIp")]
 
  //! The `kernel` binary.
@@ -1578,8 +1576,6 @@ diff -uNr 11_exceptions_part1_groundwork/src/main.rs 12_integrated_testing/src/m
 -#![allow(clippy::upper_case_acronyms)]
 -#![allow(incomplete_features)]
 -#![feature(const_fn_fn_ptr_basics)]
--#![feature(const_generics)]
--#![feature(const_panic)]
 -#![feature(core_intrinsics)]
 +
  #![feature(format_args_nl)]
@@ -1603,7 +1599,7 @@ diff -uNr 11_exceptions_part1_groundwork/src/main.rs 12_integrated_testing/src/m
 
  /// Early init code.
  ///
-@@ -137,6 +22,7 @@
+@@ -135,6 +22,7 @@
  ///     - MMU + Data caching must be activated at the earliest. Without it, any atomic operations,
  ///       e.g. the yet-to-be-introduced spinlocks in the device drivers (which currently employ
  ///       NullLocks instead of spinlocks), will fail to work (properly) on the RPi SoCs.
@@ -1611,7 +1607,7 @@ diff -uNr 11_exceptions_part1_groundwork/src/main.rs 12_integrated_testing/src/m
  unsafe fn kernel_init() -> ! {
      use driver::interface::DriverManager;
      use memory::mmu::interface::MMU;
-@@ -163,15 +49,9 @@
+@@ -161,15 +49,9 @@
  fn kernel_main() -> ! {
      use bsp::console::console;
      use console::interface::All;
@@ -1628,7 +1624,7 @@ diff -uNr 11_exceptions_part1_groundwork/src/main.rs 12_integrated_testing/src/m
      info!("Booting on: {}", bsp::board_name());
 
      info!("MMU online. Special regions:");
-@@ -197,31 +77,6 @@
+@@ -195,31 +77,6 @@
          info!("      {}. {}", i + 1, driver.compatible());
      }
 
diff --git a/12_integrated_testing/src/_arch/aarch64/memory/mmu.rs b/12_integrated_testing/src/_arch/aarch64/memory/mmu.rs
index 99991b6fe..f23267009 100644
--- a/12_integrated_testing/src/_arch/aarch64/memory/mmu.rs
+++ b/12_integrated_testing/src/_arch/aarch64/memory/mmu.rs
@@ -137,7 +137,7 @@ impl memory::mmu::interface::MMU for MemoryManagementUnit {
         // Populate translation tables.
         KERNEL_TABLES
             .populate_tt_entries()
-            .map_err(|e| MMUEnableError::Other(e))?;
+            .map_err(MMUEnableError::Other)?;
 
         // Set the "Translation Table Base Register".
         TTBR0_EL1.set_baddr(KERNEL_TABLES.phys_base_address());
diff --git a/12_integrated_testing/src/lib.rs b/12_integrated_testing/src/lib.rs
index b8370a541..723b2a809 100644
--- a/12_integrated_testing/src/lib.rs
+++ b/12_integrated_testing/src/lib.rs
@@ -109,8 +109,6 @@
 #![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
 #![feature(const_fn_fn_ptr_basics)]
-#![feature(const_generics)]
-#![feature(const_panic)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(global_asm)]
diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index b8cf351cb..a3ec743e5 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -2416,10 +2416,10 @@ diff -uNr 12_integrated_testing/src/lib.rs 13_exceptions_part2_peripheral_IRQs/s
 +#![feature(asm)]
  #![feature(const_fn_fn_ptr_basics)]
 +#![feature(const_fn_trait_bound)]
- #![feature(const_generics)]
- #![feature(const_panic)]
  #![feature(core_intrinsics)]
-@@ -134,6 +136,7 @@
+ #![feature(format_args_nl)]
+ #![feature(global_asm)]
+@@ -132,6 +134,7 @@
  pub mod exception;
  pub mod memory;
  pub mod print;
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
index 99991b6fe..f23267009 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
@@ -137,7 +137,7 @@ impl memory::mmu::interface::MMU for MemoryManagementUnit {
         // Populate translation tables.
         KERNEL_TABLES
             .populate_tt_entries()
-            .map_err(|e| MMUEnableError::Other(e))?;
+            .map_err(MMUEnableError::Other)?;
 
         // Set the "Translation Table Base Register".
         TTBR0_EL1.set_baddr(KERNEL_TABLES.phys_base_address());
diff --git a/13_exceptions_part2_peripheral_IRQs/src/lib.rs b/13_exceptions_part2_peripheral_IRQs/src/lib.rs
index 9c67f1ed6..af4f62406 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/lib.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/lib.rs
@@ -111,8 +111,6 @@
 #![feature(asm)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(const_fn_trait_bound)]
-#![feature(const_generics)]
-#![feature(const_panic)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(global_asm)]
diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index d178e9c1e..c91302f83 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -798,7 +798,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 14
 -        // Populate translation tables.
 -        KERNEL_TABLES
 -            .populate_tt_entries()
--            .map_err(|e| MMUEnableError::Other(e))?;
+-            .map_err(MMUEnableError::Other)?;
 -
          // Set the "Translation Table Base Register".
 -        TTBR0_EL1.set_baddr(KERNEL_TABLES.phys_base_address());
@@ -2149,15 +2149,15 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/driver.rs 14_virtual_mem_part2
 diff -uNr 13_exceptions_part2_peripheral_IRQs/src/lib.rs 14_virtual_mem_part2_mmio_remap/src/lib.rs
 --- 13_exceptions_part2_peripheral_IRQs/src/lib.rs
 +++ 14_virtual_mem_part2_mmio_remap/src/lib.rs
-@@ -109,6 +109,7 @@
- #![allow(clippy::upper_case_acronyms)]
- #![allow(incomplete_features)]
- #![feature(asm)]
-+#![feature(const_evaluatable_checked)]
- #![feature(const_fn_fn_ptr_basics)]
+@@ -113,6 +113,7 @@
  #![feature(const_fn_trait_bound)]
- #![feature(const_generics)]
-@@ -130,6 +131,7 @@
+ #![feature(core_intrinsics)]
+ #![feature(format_args_nl)]
++#![feature(generic_const_exprs)]
+ #![feature(global_asm)]
+ #![feature(linkage)]
+ #![feature(panic_info_message)]
+@@ -128,6 +129,7 @@
  mod synchronization;
 
  pub mod bsp;
diff --git a/14_virtual_mem_part2_mmio_remap/src/lib.rs b/14_virtual_mem_part2_mmio_remap/src/lib.rs
index 002e14b97..78baa7d8a 100644
--- a/14_virtual_mem_part2_mmio_remap/src/lib.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/lib.rs
@@ -109,13 +109,11 @@
 #![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
 #![feature(asm)]
-#![feature(const_evaluatable_checked)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(const_fn_trait_bound)]
-#![feature(const_generics)]
-#![feature(const_panic)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
+#![feature(generic_const_exprs)]
 #![feature(global_asm)]
 #![feature(linkage)]
 #![feature(panic_info_message)]
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index b6a2b5b65..c285c067d 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -1613,7 +1613,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/arch.rb 15_virt
 +
 +    def self.attr_bitfield(name, offset, num_bits)
 +        define_method("#{name}=") do |bits|
-+            mask = 2**num_bits - 1
++            mask = (2**num_bits) - 1
 +
 +            raise "Input out of range: #{name} = 0x#{bits.to_s(16)}" if (bits & ~mask).positive?
 +
@@ -2167,7 +2167,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/generic.rb 15_v
 +
 +        num_pages = size / granule_size
 +        super(num_pages) do |i|
-+            i * granule_size + start_addr
++            (i * granule_size) + start_addr
 +        end
 +    end
 +end
@@ -2232,8 +2232,8 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/generic.rb 15_v
 +    print ' Kernel table struct at physical '
 +    puts BSP.phys_table_struct_start_addr.to_hex_underscore
 +
-+    IO.binwrite(kernel_binary, TRANSLATION_TABLES.to_binary,
-+                BSP.table_struct_offset_in_kernel_elf)
++    File.binwrite(kernel_binary, TRANSLATION_TABLES.to_binary,
++                  BSP.table_struct_offset_in_kernel_elf)
 +end
 +
 +def kernel_patch_base_addr(kernel_binary)
@@ -2243,8 +2243,8 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/generic.rb 15_v
 +    print ') at physical '
 +    puts BSP.phys_tables_base_addr.to_hex_underscore
 +
-+    IO.binwrite(kernel_binary, TRANSLATION_TABLES.phys_tables_base_addr_binary,
-+                BSP.phys_tables_base_addr_offset_in_kernel_elf)
++    File.binwrite(kernel_binary, TRANSLATION_TABLES.phys_tables_base_addr_binary,
++                  BSP.phys_tables_base_addr_offset_in_kernel_elf)
 +end
 
 diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/main.rb 15_virtual_mem_part3_precomputed_tables/translation_table_tool/main.rb
diff --git a/15_virtual_mem_part3_precomputed_tables/src/lib.rs b/15_virtual_mem_part3_precomputed_tables/src/lib.rs
index 002e14b97..78baa7d8a 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/lib.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/lib.rs
@@ -109,13 +109,11 @@
 #![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
 #![feature(asm)]
-#![feature(const_evaluatable_checked)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(const_fn_trait_bound)]
-#![feature(const_generics)]
-#![feature(const_panic)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
+#![feature(generic_const_exprs)]
 #![feature(global_asm)]
 #![feature(linkage)]
 #![feature(panic_info_message)]
diff --git a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb
index a6e5cf68c..3a8b41d90 100644
--- a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb
+++ b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb
@@ -12,7 +12,7 @@ def initialize
 
     def self.attr_bitfield(name, offset, num_bits)
         define_method("#{name}=") do |bits|
-            mask = 2**num_bits - 1
+            mask = (2**num_bits) - 1
 
             raise "Input out of range: #{name} = 0x#{bits.to_s(16)}" if (bits & ~mask).positive?
 
diff --git a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/generic.rb b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/generic.rb
index 2ab666afb..ca952bc80 100644
--- a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/generic.rb
+++ b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/generic.rb
@@ -44,7 +44,7 @@ def initialize(start_addr, size, granule_size)
 
         num_pages = size / granule_size
         super(num_pages) do |i|
-            i * granule_size + start_addr
+            (i * granule_size) + start_addr
         end
     end
 end
@@ -109,8 +109,8 @@ def kernel_patch_tables(kernel_binary)
     print ' Kernel table struct at physical '
     puts BSP.phys_table_struct_start_addr.to_hex_underscore
 
-    IO.binwrite(kernel_binary, TRANSLATION_TABLES.to_binary,
-                BSP.table_struct_offset_in_kernel_elf)
+    File.binwrite(kernel_binary, TRANSLATION_TABLES.to_binary,
+                  BSP.table_struct_offset_in_kernel_elf)
 end
 
 def kernel_patch_base_addr(kernel_binary)
@@ -120,6 +120,6 @@ def kernel_patch_base_addr(kernel_binary)
     print ') at physical '
     puts BSP.phys_tables_base_addr.to_hex_underscore
 
-    IO.binwrite(kernel_binary, TRANSLATION_TABLES.phys_tables_base_addr_binary,
-                BSP.phys_tables_base_addr_offset_in_kernel_elf)
+    File.binwrite(kernel_binary, TRANSLATION_TABLES.phys_tables_base_addr_binary,
+                  BSP.phys_tables_base_addr_offset_in_kernel_elf)
 end
diff --git a/16_virtual_mem_part4_higher_half_kernel/README.md b/16_virtual_mem_part4_higher_half_kernel/README.md
index 15629a2ad..02c914e3b 100644
--- a/16_virtual_mem_part4_higher_half_kernel/README.md
+++ b/16_virtual_mem_part4_higher_half_kernel/README.md
@@ -584,7 +584,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu
 diff -uNr 15_virtual_mem_part3_precomputed_tables/src/lib.rs 16_virtual_mem_part4_higher_half_kernel/src/lib.rs
 --- 15_virtual_mem_part3_precomputed_tables/src/lib.rs
 +++ 16_virtual_mem_part4_higher_half_kernel/src/lib.rs
-@@ -154,11 +154,6 @@
+@@ -152,11 +152,6 @@
      )
  }
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/lib.rs b/16_virtual_mem_part4_higher_half_kernel/src/lib.rs
index c75a96eaf..31d988d90 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/lib.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/lib.rs
@@ -109,13 +109,11 @@
 #![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
 #![feature(asm)]
-#![feature(const_evaluatable_checked)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(const_fn_trait_bound)]
-#![feature(const_generics)]
-#![feature(const_panic)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
+#![feature(generic_const_exprs)]
 #![feature(global_asm)]
 #![feature(linkage)]
 #![feature(panic_info_message)]
diff --git a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/arch.rb b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/arch.rb
index a6e5cf68c..3a8b41d90 100644
--- a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/arch.rb
+++ b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/arch.rb
@@ -12,7 +12,7 @@ def initialize
 
     def self.attr_bitfield(name, offset, num_bits)
         define_method("#{name}=") do |bits|
-            mask = 2**num_bits - 1
+            mask = (2**num_bits) - 1
 
             raise "Input out of range: #{name} = 0x#{bits.to_s(16)}" if (bits & ~mask).positive?
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/generic.rb b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/generic.rb
index 2ab666afb..ca952bc80 100644
--- a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/generic.rb
+++ b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/generic.rb
@@ -44,7 +44,7 @@ def initialize(start_addr, size, granule_size)
 
         num_pages = size / granule_size
         super(num_pages) do |i|
-            i * granule_size + start_addr
+            (i * granule_size) + start_addr
         end
     end
 end
@@ -109,8 +109,8 @@ def kernel_patch_tables(kernel_binary)
     print ' Kernel table struct at physical '
     puts BSP.phys_table_struct_start_addr.to_hex_underscore
 
-    IO.binwrite(kernel_binary, TRANSLATION_TABLES.to_binary,
-                BSP.table_struct_offset_in_kernel_elf)
+    File.binwrite(kernel_binary, TRANSLATION_TABLES.to_binary,
+                  BSP.table_struct_offset_in_kernel_elf)
 end
 
 def kernel_patch_base_addr(kernel_binary)
@@ -120,6 +120,6 @@ def kernel_patch_base_addr(kernel_binary)
     print ') at physical '
     puts BSP.phys_tables_base_addr.to_hex_underscore
 
-    IO.binwrite(kernel_binary, TRANSLATION_TABLES.phys_tables_base_addr_binary,
-                BSP.phys_tables_base_addr_offset_in_kernel_elf)
+    File.binwrite(kernel_binary, TRANSLATION_TABLES.phys_tables_base_addr_binary,
+                  BSP.phys_tables_base_addr_offset_in_kernel_elf)
 end
diff --git a/X1_JTAG_boot/jtag_boot_rpi3.img b/X1_JTAG_boot/jtag_boot_rpi3.img
index b216c1e7ce7c72e4d28dc6eadd347147aee75e8e..672a66406909bc5295e4faf3dcb7ab54002e3960 100755
GIT binary patch
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diff --git a/X1_JTAG_boot/jtag_boot_rpi4.img b/X1_JTAG_boot/jtag_boot_rpi4.img
index be9024cb4b881f1cb79a3549028d9552be9be81a..70eb0f3b448ad5f59f822996a82983fc5b6bb2ef 100755
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zjPJ&#o!&=wtlzM~`{?GDAg*-gtUR+Ae>f+Z->_L!Q;xqjZ7utz+~>@GBgUEEgW>SA
zVZ6OytXp52l}C*4@0W_|en*A%vMoFRkxhNVwQR$SLiRIejI9PtL+c$F7mBj$E~x3!
za``~Gv*)?B;e%{do&luP*z#>)WXSUj`B98G9dt0<zOK8ivj=K2*u7oPw(aTcdB(dZ
z-1(Ee;Z5F6-pr07SJpC;IP)uUiJr{MZHB(hjNPUFwCpX@553;CYEfC8y2Dwq)YyB}
z(1o^;`8|mLWom(Q={gpUhacIt%Mf%JtSvFVpEtg5+f+N9>+YlPBI|KuSFxdmjS`-%
qW$L`Myvk=~92{ut>1+=@-`2?pwQk=V?%CVr%}j3cTGjP#?|%S%^K)SU

diff --git a/rust-toolchain.toml b/rust-toolchain.toml
index 119b34fac..6051e9b68 100644
--- a/rust-toolchain.toml
+++ b/rust-toolchain.toml
@@ -1,4 +1,4 @@
 [toolchain]
-channel = "nightly-2021-07-12"
+channel = "nightly-2021-10-10"
 components = ["llvm-tools-preview"]
 targets = ["aarch64-unknown-none-softfloat"]

From 41cd775c96b07b752f1041f9dbe0a6ee71de7fda Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 11 Oct 2021 15:38:31 +0200
Subject: [PATCH 089/214] Bump dependencies

---
 02_runtime_init/Cargo.lock                    |   4 ++--
 03_hacky_hello_world/Cargo.lock               |   4 ++--
 04_safe_globals/Cargo.lock                    |   4 ++--
 05_drivers_gpio_uart/Cargo.lock               |   4 ++--
 06_uart_chainloader/Cargo.lock                |   4 ++--
 06_uart_chainloader/demo_payload_rpi3.img     | Bin 6872 -> 6872 bytes
 06_uart_chainloader/demo_payload_rpi4.img     | Bin 6712 -> 6712 bytes
 07_timestamps/Cargo.lock                      |   4 ++--
 08_hw_debug_JTAG/Cargo.lock                   |   4 ++--
 09_privilege_level/Cargo.lock                 |   4 ++--
 .../Cargo.lock                                |   4 ++--
 11_exceptions_part1_groundwork/Cargo.lock     |   4 ++--
 12_integrated_testing/Cargo.lock              |  16 ++++++++--------
 .../Cargo.lock                                |  16 ++++++++--------
 14_virtual_mem_part2_mmio_remap/Cargo.lock    |  16 ++++++++--------
 .../Cargo.lock                                |  16 ++++++++--------
 .../Cargo.lock                                |  16 ++++++++--------
 X1_JTAG_boot/Cargo.lock                       |   4 ++--
 X1_JTAG_boot/jtag_boot_rpi3.img               | Bin 8032 -> 8016 bytes
 X1_JTAG_boot/jtag_boot_rpi4.img               | Bin 6736 -> 6736 bytes
 20 files changed, 62 insertions(+), 62 deletions(-)

diff --git a/02_runtime_init/Cargo.lock b/02_runtime_init/Cargo.lock
index c2773baab..1fd038991 100644
--- a/02_runtime_init/Cargo.lock
+++ b/02_runtime_init/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "6.0.0"
+version = "6.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d25a057b35117d030453cd322f7adbdd331e886bc5bde46cdae656952c4feba6"
+checksum = "509fc35485a2b4ddbacabe0bf2212cdfff88da93658608e5cc651afcb75b7733"
 dependencies = [
  "tock-registers",
 ]
diff --git a/03_hacky_hello_world/Cargo.lock b/03_hacky_hello_world/Cargo.lock
index 6779dc472..1213b3842 100644
--- a/03_hacky_hello_world/Cargo.lock
+++ b/03_hacky_hello_world/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "6.0.0"
+version = "6.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d25a057b35117d030453cd322f7adbdd331e886bc5bde46cdae656952c4feba6"
+checksum = "509fc35485a2b4ddbacabe0bf2212cdfff88da93658608e5cc651afcb75b7733"
 dependencies = [
  "tock-registers",
 ]
diff --git a/04_safe_globals/Cargo.lock b/04_safe_globals/Cargo.lock
index 4b5f5c722..bd028f280 100644
--- a/04_safe_globals/Cargo.lock
+++ b/04_safe_globals/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "6.0.0"
+version = "6.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d25a057b35117d030453cd322f7adbdd331e886bc5bde46cdae656952c4feba6"
+checksum = "509fc35485a2b4ddbacabe0bf2212cdfff88da93658608e5cc651afcb75b7733"
 dependencies = [
  "tock-registers",
 ]
diff --git a/05_drivers_gpio_uart/Cargo.lock b/05_drivers_gpio_uart/Cargo.lock
index b39e584f2..8ac198e1e 100644
--- a/05_drivers_gpio_uart/Cargo.lock
+++ b/05_drivers_gpio_uart/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "6.0.0"
+version = "6.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d25a057b35117d030453cd322f7adbdd331e886bc5bde46cdae656952c4feba6"
+checksum = "509fc35485a2b4ddbacabe0bf2212cdfff88da93658608e5cc651afcb75b7733"
 dependencies = [
  "tock-registers",
 ]
diff --git a/06_uart_chainloader/Cargo.lock b/06_uart_chainloader/Cargo.lock
index e390c9597..98f3ca1c3 100644
--- a/06_uart_chainloader/Cargo.lock
+++ b/06_uart_chainloader/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "6.0.0"
+version = "6.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d25a057b35117d030453cd322f7adbdd331e886bc5bde46cdae656952c4feba6"
+checksum = "509fc35485a2b4ddbacabe0bf2212cdfff88da93658608e5cc651afcb75b7733"
 dependencies = [
  "tock-registers",
 ]
diff --git a/06_uart_chainloader/demo_payload_rpi3.img b/06_uart_chainloader/demo_payload_rpi3.img
index c3bf075513e0384378ae56a40d10fbcc2d6676da..7b482d7bfec157cced3d540423afefcf632d5e53 100755
GIT binary patch
delta 1131
zcmZ8gT}TvB6h1Sv?v7TtJG<_Wk<Gd~?iz_@n_&;F_Rt@pSWqO<ZYE`=#^!?sv1?BS
z5ngWKQ=t;s>_b18^%jM_1VIQAQa#K@!s=5bL{s5(?(8+f1846&-}%n(ot=-*$48Ef
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zRqS9z%AmOm*@ooJ{q}+>&<)CNuZo_e49(}936tfGy{@BO%C>kp;t3}-GwffT@hAza
zLBhTcd~LEUfw>rQ=oY@rkBn0n>1*YFfIUTa6Fx;1$s_3;CSqHqcPi$Tu@H{=pWF`8
ztNu@N+up<KzK#R!^lm6huLagsWCKOsdd^kw+)DdG7sQ_d`Z1&>qQN4eoD<3p^`!fI
zE~=MO{k`2SD(qk5U*I;5Vheo~2r5Gy#9i8g-FysGiBE#`S0Iup1DNLo2Pb^yHZH}M
zwORXm`_B%bC&<Sv;k?F%cta!J8`t1n+fJ%&0|SE?rVjMCsQbC!ja(;-T?o>Npw=?P
zaUa7_R9hO<)pgoj#2;`T{w-|5a51DQ^Bl&{a20L|Y1`eE#T~AWpM;`a`~_|SJS#6E
kZ_4TU%AMLS9`=f#Nq%;wE?+v`lTKezJ9^b7`n<CGFSuzdApigX

delta 1081
zcmYjPU1$_n6h3!m{}QNfXJ#|IYm=SHx|`hyTT8kPU5jiYVyZ|(K$Ji*n;$e*O_)GQ
z^&y+SH1sK#tN0wyrn3*$qEV`#+v<zHMI=N-nFPg69wcq)!xoz9nVB2uf!%w~chApv
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z76O<HmD;HYpt$}#%SmltEbXToIMoUUOoAD@m7vxEKt?{Z2g-dLZGN)>@vNSp_OxKG
zCyBW(61tug&6kWynbwj{7oYB@PLk{-&S=zWR67o)JLWf?y^!+qKU+vig1m!0Cgr}+
zObbiOX{D=`)@+}d!C8MTh-R%5>TlVA91ZA6y4;;%7v&ULX7lnc-{1HUR+Ur2cS-hE
z&XT+ALq#Uvvy`$={t>$mhM@Cwpjdb5&hKWE$|ve&#ESvwbTEgNGbTHeV)vA0GRvMT
zS3j?&X!l?<9oAatD!%I-7C36z56RM22h?jA&tg&N^@33j!mSP4-dsn$4(n`3_-A1z
z!ybfn;iE0K7QQo0GIS#dbt?&|l@GNNJqd8jwQ0Y(_7LbB+)S}<e~O!$6Yz)Im;;AH
zIZcNL+vqChjB^f74ne5^va~9mT(-mnehG<+<2y3`;4Akv3>>WQ@fUwR5>YzXPm!t=
zj^ow;?2*bYG`(O0Y6qEOR8{-?N|O^qqlWRV);p$k95jq^LpwWO8W}r(N*gi8z8N(N
zT0sN2u6m7{c(X@5M%J!P8p9u-D~+Ac8Ix{YQ`zs)<T3QaQLobHC4$0ZT!L!}P7xR4
z+BqCOj$SX%^K*P}E}z?r{^=+y#9E{>zYg>3M4X+8r3*JWtZ-O!EvKz;Jizf+Jl^Jy
z<xgU1DID|2;<xJ>!a_X#K@W%B*RyNt*FrVMq-a{$jIlzr`AFlo&O6`Nd40AY)qUWo
ncBuEuuLi-xy?@{lz*NLTW+SXW{#jEG*QCnN3HM~T<E{Sz94s8V

diff --git a/06_uart_chainloader/demo_payload_rpi4.img b/06_uart_chainloader/demo_payload_rpi4.img
index 03cddd9e44cd41bb8a0b48e143c35bc4327d17c8..e7b0e939902c5753bccd92e7a82c903a044cedac 100755
GIT binary patch
delta 954
zcmZ8fUr1A76#u?E=QdN^y?5Ka)9LP-?YalYBt=q!&FZ1-A$%xHB19yFm|8tV6wV0h
zt$mzeF9xosW)Ou5`Vy57(VrJVERtdqiqT7!U@e%pv%61;4t#v){C?-0d%oYf3mpp`
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zhdzS1qzW%I7?i^DJ?s>#CSALoG66_S0h)qEX<AK&n1C&NV|rPE)G%pfc?)G*Ai8C@
z-7pkFV#VXzhGHzy<?a2X_zkYhsxVatY5A%UXaU(3reQefx;dFa?Qz0_ZsAG<nK6k9
zPFk}RTL)&`EEgnfeTlFVE@I}7(LoR=J0oa&`3OOl$DCU@cX>f(&P)rVsMK@Ixz(J-
zKbyx>_DvP*juai%*djcwSK+w(n)F*m_#b=gfsgJrNGd8Wi_Ci}EDC8Fva?FFu;GC>
zN+_Tz6}F1AJ{~)GYy(kMjt+3t%F$?~GZICA{6BoK{jAnIHg<V5ab6osbZfUc@7(P+
zq3Q<~IO^i4W?DqcalD%2UwMrCGR+3dsxGShwfMtv)Zx|ZPH@zGC6qjkaK#%H9;h(u
z4YhyZWIZpb=^MG27`dR04<$y2yS17f0e5&C&;|vZit4C!SLE?QyV4~`y_HC7sN4fy
aJM?(Zz$echb%S%Y{2LP9ZFoR!(Eb9VcJ9mo

delta 1044
zcmZ8gTS!x39RJQaQ#UQ#)ty<o&+FMB*Ft4xFH?&yAek>+L}FfuL28|WkT07e`OwQg
z{-zHJDG@lMC`7QA@bc6{4?$Vjg)@m7feaFg8M^*%pAr4x<A3}8?|h4Oi*?aU!l!4K
zr*gz$W&T&r55YRDF!xLmODHd5TAmQoB*H$=@8mto)9DF$3P)@dW(%oe+(}Prge+{P
z)032taZ2bL1Vr`2B}^j3nvs`FAX!*#4p=drE|$Pl`3N}|C<Vn>s;5q-wGj3ZT8)*S
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zVm5xb43b8-^DE*aMpC~e@%TVFbCXDW5$0VRQNU-a65c|m>7=+)4i8Lj+w;A|`NY?O
zpx+jf(j?2=ZHSvr2oIseEQ|39@R{9~afJDEiSKXT<w^*d%Y-qwYo2nEDkfrqX03Q{
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Y?H{jjKkmPgnp;}w>9(`yK`y3$0Hr|<MgRZ+

diff --git a/07_timestamps/Cargo.lock b/07_timestamps/Cargo.lock
index 098fe83c6..663d313cd 100644
--- a/07_timestamps/Cargo.lock
+++ b/07_timestamps/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "6.0.0"
+version = "6.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d25a057b35117d030453cd322f7adbdd331e886bc5bde46cdae656952c4feba6"
+checksum = "509fc35485a2b4ddbacabe0bf2212cdfff88da93658608e5cc651afcb75b7733"
 dependencies = [
  "tock-registers",
 ]
diff --git a/08_hw_debug_JTAG/Cargo.lock b/08_hw_debug_JTAG/Cargo.lock
index c93636780..884ec5f07 100644
--- a/08_hw_debug_JTAG/Cargo.lock
+++ b/08_hw_debug_JTAG/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "6.0.0"
+version = "6.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d25a057b35117d030453cd322f7adbdd331e886bc5bde46cdae656952c4feba6"
+checksum = "509fc35485a2b4ddbacabe0bf2212cdfff88da93658608e5cc651afcb75b7733"
 dependencies = [
  "tock-registers",
 ]
diff --git a/09_privilege_level/Cargo.lock b/09_privilege_level/Cargo.lock
index 606b7819a..1703eebee 100644
--- a/09_privilege_level/Cargo.lock
+++ b/09_privilege_level/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "6.0.0"
+version = "6.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d25a057b35117d030453cd322f7adbdd331e886bc5bde46cdae656952c4feba6"
+checksum = "509fc35485a2b4ddbacabe0bf2212cdfff88da93658608e5cc651afcb75b7733"
 dependencies = [
  "tock-registers",
 ]
diff --git a/10_virtual_mem_part1_identity_mapping/Cargo.lock b/10_virtual_mem_part1_identity_mapping/Cargo.lock
index a3e7eb266..d01804669 100644
--- a/10_virtual_mem_part1_identity_mapping/Cargo.lock
+++ b/10_virtual_mem_part1_identity_mapping/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "6.0.0"
+version = "6.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d25a057b35117d030453cd322f7adbdd331e886bc5bde46cdae656952c4feba6"
+checksum = "509fc35485a2b4ddbacabe0bf2212cdfff88da93658608e5cc651afcb75b7733"
 dependencies = [
  "tock-registers",
 ]
diff --git a/11_exceptions_part1_groundwork/Cargo.lock b/11_exceptions_part1_groundwork/Cargo.lock
index 6fca12525..d25b6b783 100644
--- a/11_exceptions_part1_groundwork/Cargo.lock
+++ b/11_exceptions_part1_groundwork/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "6.0.0"
+version = "6.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d25a057b35117d030453cd322f7adbdd331e886bc5bde46cdae656952c4feba6"
+checksum = "509fc35485a2b4ddbacabe0bf2212cdfff88da93658608e5cc651afcb75b7733"
 dependencies = [
  "tock-registers",
 ]
diff --git a/12_integrated_testing/Cargo.lock b/12_integrated_testing/Cargo.lock
index b8780bfe4..c4d231f90 100644
--- a/12_integrated_testing/Cargo.lock
+++ b/12_integrated_testing/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "6.0.0"
+version = "6.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d25a057b35117d030453cd322f7adbdd331e886bc5bde46cdae656952c4feba6"
+checksum = "509fc35485a2b4ddbacabe0bf2212cdfff88da93658608e5cc651afcb75b7733"
 dependencies = [
  "tock-registers",
 ]
@@ -24,9 +24,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.27"
+version = "1.0.29"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f0d8caf72986c1a598726adc988bb5984792ef84f5ee5aa50209145ee8077038"
+checksum = "b9f5105d4fdaab20335ca9565e106a5d9b82b6219b5ba735731124ac6711d23d"
 dependencies = [
  "unicode-xid",
 ]
@@ -39,18 +39,18 @@ checksum = "220eb94f40665452ab6114bf8a8d86aa1fd41c6dbfaa4ab71b5912c8adb80389"
 
 [[package]]
 name = "quote"
-version = "1.0.9"
+version = "1.0.10"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "c3d0b9745dc2debf507c8422de05d7226cc1f0644216dfdfead988f9b1ab32a7"
+checksum = "38bc8cc6a5f2e3655e0899c1b848643b2562f853f114bfec7be120678e3ace05"
 dependencies = [
  "proc-macro2",
 ]
 
 [[package]]
 name = "syn"
-version = "1.0.73"
+version = "1.0.80"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f71489ff30030d2ae598524f61326b902466f72a0fb1a8564c001cc63425bcc7"
+checksum = "d010a1623fbd906d51d650a9916aaefc05ffa0e4053ff7fe601167f3e715d194"
 dependencies = [
  "proc-macro2",
  "quote",
diff --git a/13_exceptions_part2_peripheral_IRQs/Cargo.lock b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
index a66aa8f5b..db1cd2db4 100644
--- a/13_exceptions_part2_peripheral_IRQs/Cargo.lock
+++ b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "6.0.0"
+version = "6.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d25a057b35117d030453cd322f7adbdd331e886bc5bde46cdae656952c4feba6"
+checksum = "509fc35485a2b4ddbacabe0bf2212cdfff88da93658608e5cc651afcb75b7733"
 dependencies = [
  "tock-registers",
 ]
@@ -24,9 +24,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.27"
+version = "1.0.29"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f0d8caf72986c1a598726adc988bb5984792ef84f5ee5aa50209145ee8077038"
+checksum = "b9f5105d4fdaab20335ca9565e106a5d9b82b6219b5ba735731124ac6711d23d"
 dependencies = [
  "unicode-xid",
 ]
@@ -39,18 +39,18 @@ checksum = "220eb94f40665452ab6114bf8a8d86aa1fd41c6dbfaa4ab71b5912c8adb80389"
 
 [[package]]
 name = "quote"
-version = "1.0.9"
+version = "1.0.10"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "c3d0b9745dc2debf507c8422de05d7226cc1f0644216dfdfead988f9b1ab32a7"
+checksum = "38bc8cc6a5f2e3655e0899c1b848643b2562f853f114bfec7be120678e3ace05"
 dependencies = [
  "proc-macro2",
 ]
 
 [[package]]
 name = "syn"
-version = "1.0.73"
+version = "1.0.80"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f71489ff30030d2ae598524f61326b902466f72a0fb1a8564c001cc63425bcc7"
+checksum = "d010a1623fbd906d51d650a9916aaefc05ffa0e4053ff7fe601167f3e715d194"
 dependencies = [
  "proc-macro2",
  "quote",
diff --git a/14_virtual_mem_part2_mmio_remap/Cargo.lock b/14_virtual_mem_part2_mmio_remap/Cargo.lock
index d2aaae6ea..41426eba5 100644
--- a/14_virtual_mem_part2_mmio_remap/Cargo.lock
+++ b/14_virtual_mem_part2_mmio_remap/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "6.0.0"
+version = "6.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d25a057b35117d030453cd322f7adbdd331e886bc5bde46cdae656952c4feba6"
+checksum = "509fc35485a2b4ddbacabe0bf2212cdfff88da93658608e5cc651afcb75b7733"
 dependencies = [
  "tock-registers",
 ]
@@ -24,9 +24,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.27"
+version = "1.0.29"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f0d8caf72986c1a598726adc988bb5984792ef84f5ee5aa50209145ee8077038"
+checksum = "b9f5105d4fdaab20335ca9565e106a5d9b82b6219b5ba735731124ac6711d23d"
 dependencies = [
  "unicode-xid",
 ]
@@ -39,18 +39,18 @@ checksum = "220eb94f40665452ab6114bf8a8d86aa1fd41c6dbfaa4ab71b5912c8adb80389"
 
 [[package]]
 name = "quote"
-version = "1.0.9"
+version = "1.0.10"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "c3d0b9745dc2debf507c8422de05d7226cc1f0644216dfdfead988f9b1ab32a7"
+checksum = "38bc8cc6a5f2e3655e0899c1b848643b2562f853f114bfec7be120678e3ace05"
 dependencies = [
  "proc-macro2",
 ]
 
 [[package]]
 name = "syn"
-version = "1.0.73"
+version = "1.0.80"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f71489ff30030d2ae598524f61326b902466f72a0fb1a8564c001cc63425bcc7"
+checksum = "d010a1623fbd906d51d650a9916aaefc05ffa0e4053ff7fe601167f3e715d194"
 dependencies = [
  "proc-macro2",
  "quote",
diff --git a/15_virtual_mem_part3_precomputed_tables/Cargo.lock b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
index 5801a6b72..6cb12baa5 100644
--- a/15_virtual_mem_part3_precomputed_tables/Cargo.lock
+++ b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "6.0.0"
+version = "6.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d25a057b35117d030453cd322f7adbdd331e886bc5bde46cdae656952c4feba6"
+checksum = "509fc35485a2b4ddbacabe0bf2212cdfff88da93658608e5cc651afcb75b7733"
 dependencies = [
  "tock-registers",
 ]
@@ -24,9 +24,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.27"
+version = "1.0.29"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f0d8caf72986c1a598726adc988bb5984792ef84f5ee5aa50209145ee8077038"
+checksum = "b9f5105d4fdaab20335ca9565e106a5d9b82b6219b5ba735731124ac6711d23d"
 dependencies = [
  "unicode-xid",
 ]
@@ -39,18 +39,18 @@ checksum = "220eb94f40665452ab6114bf8a8d86aa1fd41c6dbfaa4ab71b5912c8adb80389"
 
 [[package]]
 name = "quote"
-version = "1.0.9"
+version = "1.0.10"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "c3d0b9745dc2debf507c8422de05d7226cc1f0644216dfdfead988f9b1ab32a7"
+checksum = "38bc8cc6a5f2e3655e0899c1b848643b2562f853f114bfec7be120678e3ace05"
 dependencies = [
  "proc-macro2",
 ]
 
 [[package]]
 name = "syn"
-version = "1.0.73"
+version = "1.0.80"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f71489ff30030d2ae598524f61326b902466f72a0fb1a8564c001cc63425bcc7"
+checksum = "d010a1623fbd906d51d650a9916aaefc05ffa0e4053ff7fe601167f3e715d194"
 dependencies = [
  "proc-macro2",
  "quote",
diff --git a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
index 98edacde7..d2e5b0d63 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
+++ b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "6.0.0"
+version = "6.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d25a057b35117d030453cd322f7adbdd331e886bc5bde46cdae656952c4feba6"
+checksum = "509fc35485a2b4ddbacabe0bf2212cdfff88da93658608e5cc651afcb75b7733"
 dependencies = [
  "tock-registers",
 ]
@@ -24,9 +24,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.27"
+version = "1.0.29"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f0d8caf72986c1a598726adc988bb5984792ef84f5ee5aa50209145ee8077038"
+checksum = "b9f5105d4fdaab20335ca9565e106a5d9b82b6219b5ba735731124ac6711d23d"
 dependencies = [
  "unicode-xid",
 ]
@@ -39,18 +39,18 @@ checksum = "220eb94f40665452ab6114bf8a8d86aa1fd41c6dbfaa4ab71b5912c8adb80389"
 
 [[package]]
 name = "quote"
-version = "1.0.9"
+version = "1.0.10"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "c3d0b9745dc2debf507c8422de05d7226cc1f0644216dfdfead988f9b1ab32a7"
+checksum = "38bc8cc6a5f2e3655e0899c1b848643b2562f853f114bfec7be120678e3ace05"
 dependencies = [
  "proc-macro2",
 ]
 
 [[package]]
 name = "syn"
-version = "1.0.73"
+version = "1.0.80"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f71489ff30030d2ae598524f61326b902466f72a0fb1a8564c001cc63425bcc7"
+checksum = "d010a1623fbd906d51d650a9916aaefc05ffa0e4053ff7fe601167f3e715d194"
 dependencies = [
  "proc-macro2",
  "quote",
diff --git a/X1_JTAG_boot/Cargo.lock b/X1_JTAG_boot/Cargo.lock
index c93636780..884ec5f07 100644
--- a/X1_JTAG_boot/Cargo.lock
+++ b/X1_JTAG_boot/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "6.0.0"
+version = "6.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d25a057b35117d030453cd322f7adbdd331e886bc5bde46cdae656952c4feba6"
+checksum = "509fc35485a2b4ddbacabe0bf2212cdfff88da93658608e5cc651afcb75b7733"
 dependencies = [
  "tock-registers",
 ]
diff --git a/X1_JTAG_boot/jtag_boot_rpi3.img b/X1_JTAG_boot/jtag_boot_rpi3.img
index 672a66406909bc5295e4faf3dcb7ab54002e3960..be80f810e3be61b54b0af0694cec1c5d73d1f1f5 100755
GIT binary patch
delta 1229
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delta 1237
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diff --git a/X1_JTAG_boot/jtag_boot_rpi4.img b/X1_JTAG_boot/jtag_boot_rpi4.img
index 70eb0f3b448ad5f59f822996a82983fc5b6bb2ef..f09f82c3f5afa5048cadebd9bd495e4cffdf0d36 100755
GIT binary patch
delta 700
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delta 720
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E0u4yg)Bpeg


From fb4a30f64cb375e23ff479c9234f12830289ab32 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 11 Oct 2021 15:46:01 +0200
Subject: [PATCH 090/214] Upgrade to Rust 2021 edition

---
 .rustfmt.toml                                               | 2 +-
 01_wait_forever/Cargo.toml                                  | 2 +-
 02_runtime_init/Cargo.toml                                  | 2 +-
 02_runtime_init/README.md                                   | 2 +-
 03_hacky_hello_world/Cargo.toml                             | 2 +-
 03_hacky_hello_world/README.md                              | 2 +-
 04_safe_globals/Cargo.toml                                  | 2 +-
 04_safe_globals/README.md                                   | 2 +-
 05_drivers_gpio_uart/Cargo.toml                             | 2 +-
 05_drivers_gpio_uart/README.md                              | 2 +-
 06_uart_chainloader/Cargo.toml                              | 2 +-
 06_uart_chainloader/README.md                               | 2 +-
 07_timestamps/Cargo.toml                                    | 2 +-
 07_timestamps/README.md                                     | 2 +-
 08_hw_debug_JTAG/Cargo.toml                                 | 2 +-
 08_hw_debug_JTAG/README.md                                  | 2 +-
 09_privilege_level/Cargo.toml                               | 2 +-
 09_privilege_level/README.md                                | 2 +-
 10_virtual_mem_part1_identity_mapping/Cargo.toml            | 2 +-
 10_virtual_mem_part1_identity_mapping/README.md             | 2 +-
 11_exceptions_part1_groundwork/Cargo.toml                   | 2 +-
 11_exceptions_part1_groundwork/README.md                    | 2 +-
 12_integrated_testing/Cargo.toml                            | 2 +-
 12_integrated_testing/README.md                             | 6 +++---
 12_integrated_testing/test-macros/Cargo.toml                | 2 +-
 12_integrated_testing/test-types/Cargo.toml                 | 2 +-
 13_exceptions_part2_peripheral_IRQs/Cargo.toml              | 2 +-
 13_exceptions_part2_peripheral_IRQs/README.md               | 2 +-
 13_exceptions_part2_peripheral_IRQs/test-macros/Cargo.toml  | 2 +-
 13_exceptions_part2_peripheral_IRQs/test-types/Cargo.toml   | 2 +-
 14_virtual_mem_part2_mmio_remap/Cargo.toml                  | 2 +-
 14_virtual_mem_part2_mmio_remap/README.md                   | 2 +-
 14_virtual_mem_part2_mmio_remap/test-macros/Cargo.toml      | 2 +-
 14_virtual_mem_part2_mmio_remap/test-types/Cargo.toml       | 2 +-
 15_virtual_mem_part3_precomputed_tables/Cargo.toml          | 2 +-
 15_virtual_mem_part3_precomputed_tables/README.md           | 2 +-
 .../test-macros/Cargo.toml                                  | 2 +-
 .../test-types/Cargo.toml                                   | 2 +-
 16_virtual_mem_part4_higher_half_kernel/Cargo.toml          | 2 +-
 16_virtual_mem_part4_higher_half_kernel/README.md           | 2 +-
 .../test-macros/Cargo.toml                                  | 2 +-
 .../test-types/Cargo.toml                                   | 2 +-
 X1_JTAG_boot/Cargo.toml                                     | 2 +-
 43 files changed, 45 insertions(+), 45 deletions(-)

diff --git a/.rustfmt.toml b/.rustfmt.toml
index 5e98361e6..33aca681f 100644
--- a/.rustfmt.toml
+++ b/.rustfmt.toml
@@ -1,5 +1,5 @@
 newline_style = "Unix"
-edition = "2018"
+edition = "2021"
 imports_granularity = "Crate"
 format_code_in_doc_comments = true
 normalize_comments = true
diff --git a/01_wait_forever/Cargo.toml b/01_wait_forever/Cargo.toml
index 2b46585e9..459866f8e 100644
--- a/01_wait_forever/Cargo.toml
+++ b/01_wait_forever/Cargo.toml
@@ -2,7 +2,7 @@
 name = "mingo"
 version = "0.1.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
-edition = "2018"
+edition = "2021"
 
 [profile.release]
 lto = true
diff --git a/02_runtime_init/Cargo.toml b/02_runtime_init/Cargo.toml
index ebf536a79..c4fd83e38 100644
--- a/02_runtime_init/Cargo.toml
+++ b/02_runtime_init/Cargo.toml
@@ -2,7 +2,7 @@
 name = "mingo"
 version = "0.2.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
-edition = "2018"
+edition = "2021"
 
 [profile.release]
 lto = true
diff --git a/02_runtime_init/README.md b/02_runtime_init/README.md
index d37b3c9f9..37e34ec8e 100644
--- a/02_runtime_init/README.md
+++ b/02_runtime_init/README.md
@@ -38,7 +38,7 @@ diff -uNr 01_wait_forever/Cargo.toml 02_runtime_init/Cargo.toml
 -version = "0.1.0"
 +version = "0.2.0"
  authors = ["Andre Richter <andre.o.richter@gmail.com>"]
- edition = "2018"
+ edition = "2021"
 
 @@ -21,3 +21,8 @@
  ##--------------------------------------------------------------------------------------------------
diff --git a/03_hacky_hello_world/Cargo.toml b/03_hacky_hello_world/Cargo.toml
index 3d3e28ab4..75cf6701c 100644
--- a/03_hacky_hello_world/Cargo.toml
+++ b/03_hacky_hello_world/Cargo.toml
@@ -2,7 +2,7 @@
 name = "mingo"
 version = "0.3.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
-edition = "2018"
+edition = "2021"
 
 [profile.release]
 lto = true
diff --git a/03_hacky_hello_world/README.md b/03_hacky_hello_world/README.md
index ce262bc98..22805fb30 100644
--- a/03_hacky_hello_world/README.md
+++ b/03_hacky_hello_world/README.md
@@ -41,7 +41,7 @@ diff -uNr 02_runtime_init/Cargo.toml 03_hacky_hello_world/Cargo.toml
 -version = "0.2.0"
 +version = "0.3.0"
  authors = ["Andre Richter <andre.o.richter@gmail.com>"]
- edition = "2018"
+ edition = "2021"
 
 
 diff -uNr 02_runtime_init/Makefile 03_hacky_hello_world/Makefile
diff --git a/04_safe_globals/Cargo.toml b/04_safe_globals/Cargo.toml
index 09fbaa913..3d282da6c 100644
--- a/04_safe_globals/Cargo.toml
+++ b/04_safe_globals/Cargo.toml
@@ -2,7 +2,7 @@
 name = "mingo"
 version = "0.4.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
-edition = "2018"
+edition = "2021"
 
 [profile.release]
 lto = true
diff --git a/04_safe_globals/README.md b/04_safe_globals/README.md
index 6b7f52c4e..b03f0c11e 100644
--- a/04_safe_globals/README.md
+++ b/04_safe_globals/README.md
@@ -64,7 +64,7 @@ diff -uNr 03_hacky_hello_world/Cargo.toml 04_safe_globals/Cargo.toml
 -version = "0.3.0"
 +version = "0.4.0"
  authors = ["Andre Richter <andre.o.richter@gmail.com>"]
- edition = "2018"
+ edition = "2021"
 
 
 diff -uNr 03_hacky_hello_world/src/bsp/raspberrypi/console.rs 04_safe_globals/src/bsp/raspberrypi/console.rs
diff --git a/05_drivers_gpio_uart/Cargo.toml b/05_drivers_gpio_uart/Cargo.toml
index 92c98e0c5..44d101419 100644
--- a/05_drivers_gpio_uart/Cargo.toml
+++ b/05_drivers_gpio_uart/Cargo.toml
@@ -2,7 +2,7 @@
 name = "mingo"
 version = "0.5.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
-edition = "2018"
+edition = "2021"
 
 [profile.release]
 lto = true
diff --git a/05_drivers_gpio_uart/README.md b/05_drivers_gpio_uart/README.md
index 2ee89aa6d..8eb7fda1c 100644
--- a/05_drivers_gpio_uart/README.md
+++ b/05_drivers_gpio_uart/README.md
@@ -118,7 +118,7 @@ diff -uNr 04_safe_globals/Cargo.toml 05_drivers_gpio_uart/Cargo.toml
 -version = "0.4.0"
 +version = "0.5.0"
  authors = ["Andre Richter <andre.o.richter@gmail.com>"]
- edition = "2018"
+ edition = "2021"
 
 @@ -9,8 +9,8 @@
 
diff --git a/06_uart_chainloader/Cargo.toml b/06_uart_chainloader/Cargo.toml
index d21dd6a8f..1ea68580f 100644
--- a/06_uart_chainloader/Cargo.toml
+++ b/06_uart_chainloader/Cargo.toml
@@ -2,7 +2,7 @@
 name = "mingo"
 version = "0.6.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
-edition = "2018"
+edition = "2021"
 
 [profile.release]
 lto = true
diff --git a/06_uart_chainloader/README.md b/06_uart_chainloader/README.md
index d606f5369..9cb8f4268 100644
--- a/06_uart_chainloader/README.md
+++ b/06_uart_chainloader/README.md
@@ -129,7 +129,7 @@ diff -uNr 05_drivers_gpio_uart/Cargo.toml 06_uart_chainloader/Cargo.toml
 -version = "0.5.0"
 +version = "0.6.0"
  authors = ["Andre Richter <andre.o.richter@gmail.com>"]
- edition = "2018"
+ edition = "2021"
 
 Binary files 05_drivers_gpio_uart/demo_payload_rpi3.img and 06_uart_chainloader/demo_payload_rpi3.img differ
 Binary files 05_drivers_gpio_uart/demo_payload_rpi4.img and 06_uart_chainloader/demo_payload_rpi4.img differ
diff --git a/07_timestamps/Cargo.toml b/07_timestamps/Cargo.toml
index 881f1d1af..4ad9af383 100644
--- a/07_timestamps/Cargo.toml
+++ b/07_timestamps/Cargo.toml
@@ -2,7 +2,7 @@
 name = "mingo"
 version = "0.7.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
-edition = "2018"
+edition = "2021"
 
 [profile.release]
 lto = true
diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index 4fb36ddf2..6d0360a09 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -54,7 +54,7 @@ diff -uNr 06_uart_chainloader/Cargo.toml 07_timestamps/Cargo.toml
 -version = "0.6.0"
 +version = "0.7.0"
  authors = ["Andre Richter <andre.o.richter@gmail.com>"]
- edition = "2018"
+ edition = "2021"
 
 Binary files 06_uart_chainloader/demo_payload_rpi3.img and 07_timestamps/demo_payload_rpi3.img differ
 Binary files 06_uart_chainloader/demo_payload_rpi4.img and 07_timestamps/demo_payload_rpi4.img differ
diff --git a/08_hw_debug_JTAG/Cargo.toml b/08_hw_debug_JTAG/Cargo.toml
index 07dc9b5b6..b6d421734 100644
--- a/08_hw_debug_JTAG/Cargo.toml
+++ b/08_hw_debug_JTAG/Cargo.toml
@@ -2,7 +2,7 @@
 name = "mingo"
 version = "0.8.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
-edition = "2018"
+edition = "2021"
 
 [profile.release]
 lto = true
diff --git a/08_hw_debug_JTAG/README.md b/08_hw_debug_JTAG/README.md
index 74a942a80..355b2d3da 100644
--- a/08_hw_debug_JTAG/README.md
+++ b/08_hw_debug_JTAG/README.md
@@ -314,7 +314,7 @@ diff -uNr 07_timestamps/Cargo.toml 08_hw_debug_JTAG/Cargo.toml
 -version = "0.7.0"
 +version = "0.8.0"
  authors = ["Andre Richter <andre.o.richter@gmail.com>"]
- edition = "2018"
+ edition = "2021"
 
 
 diff -uNr 07_timestamps/Makefile 08_hw_debug_JTAG/Makefile
diff --git a/09_privilege_level/Cargo.toml b/09_privilege_level/Cargo.toml
index e9965b2f6..b76d2e772 100644
--- a/09_privilege_level/Cargo.toml
+++ b/09_privilege_level/Cargo.toml
@@ -2,7 +2,7 @@
 name = "mingo"
 version = "0.9.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
-edition = "2018"
+edition = "2021"
 
 [profile.release]
 lto = true
diff --git a/09_privilege_level/README.md b/09_privilege_level/README.md
index 645ec210b..3dbe5bd65 100644
--- a/09_privilege_level/README.md
+++ b/09_privilege_level/README.md
@@ -205,7 +205,7 @@ diff -uNr 08_hw_debug_JTAG/Cargo.toml 09_privilege_level/Cargo.toml
 -version = "0.8.0"
 +version = "0.9.0"
  authors = ["Andre Richter <andre.o.richter@gmail.com>"]
- edition = "2018"
+ edition = "2021"
 
 
 diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs 09_privilege_level/src/_arch/aarch64/cpu/boot.rs
diff --git a/10_virtual_mem_part1_identity_mapping/Cargo.toml b/10_virtual_mem_part1_identity_mapping/Cargo.toml
index fac86dd5a..e52ac34c2 100644
--- a/10_virtual_mem_part1_identity_mapping/Cargo.toml
+++ b/10_virtual_mem_part1_identity_mapping/Cargo.toml
@@ -2,7 +2,7 @@
 name = "mingo"
 version = "0.10.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
-edition = "2018"
+edition = "2021"
 
 [profile.release]
 lto = true
diff --git a/10_virtual_mem_part1_identity_mapping/README.md b/10_virtual_mem_part1_identity_mapping/README.md
index 6eb88329c..22e265a6f 100644
--- a/10_virtual_mem_part1_identity_mapping/README.md
+++ b/10_virtual_mem_part1_identity_mapping/README.md
@@ -358,7 +358,7 @@ diff -uNr 09_privilege_level/Cargo.toml 10_virtual_mem_part1_identity_mapping/Ca
 -version = "0.9.0"
 +version = "0.10.0"
  authors = ["Andre Richter <andre.o.richter@gmail.com>"]
- edition = "2018"
+ edition = "2021"
 
 
 diff -uNr 09_privilege_level/src/_arch/aarch64/memory/mmu/translation_table.rs 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs
diff --git a/11_exceptions_part1_groundwork/Cargo.toml b/11_exceptions_part1_groundwork/Cargo.toml
index adafedfac..e92d9f438 100644
--- a/11_exceptions_part1_groundwork/Cargo.toml
+++ b/11_exceptions_part1_groundwork/Cargo.toml
@@ -2,7 +2,7 @@
 name = "mingo"
 version = "0.11.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
-edition = "2018"
+edition = "2021"
 
 [profile.release]
 lto = true
diff --git a/11_exceptions_part1_groundwork/README.md b/11_exceptions_part1_groundwork/README.md
index 3a471317b..afb6130ba 100644
--- a/11_exceptions_part1_groundwork/README.md
+++ b/11_exceptions_part1_groundwork/README.md
@@ -486,7 +486,7 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/Cargo.toml 11_exceptions_part1_g
 -version = "0.10.0"
 +version = "0.11.0"
  authors = ["Andre Richter <andre.o.richter@gmail.com>"]
- edition = "2018"
+ edition = "2021"
 
 
 diff -uNr 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs 11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
diff --git a/12_integrated_testing/Cargo.toml b/12_integrated_testing/Cargo.toml
index 42013b264..40f28b188 100644
--- a/12_integrated_testing/Cargo.toml
+++ b/12_integrated_testing/Cargo.toml
@@ -2,7 +2,7 @@
 name = "mingo"
 version = "0.12.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
-edition = "2018"
+edition = "2021"
 
 [profile.release]
 lto = true
diff --git a/12_integrated_testing/README.md b/12_integrated_testing/README.md
index 651b8ae07..4e2cdea87 100644
--- a/12_integrated_testing/README.md
+++ b/12_integrated_testing/README.md
@@ -881,7 +881,7 @@ diff -uNr 11_exceptions_part1_groundwork/Cargo.toml 12_integrated_testing/Cargo.
 -version = "0.11.0"
 +version = "0.12.0"
  authors = ["Andre Richter <andre.o.richter@gmail.com>"]
- edition = "2018"
+ edition = "2021"
 
 @@ -11,21 +11,46 @@
  default = []
@@ -1722,7 +1722,7 @@ diff -uNr 11_exceptions_part1_groundwork/test-macros/Cargo.toml 12_integrated_te
 +name = "test-macros"
 +version = "0.1.0"
 +authors = ["Andre Richter <andre.o.richter@gmail.com>"]
-+edition = "2018"
++edition = "2021"
 +
 +[lib]
 +proc-macro = true
@@ -2002,7 +2002,7 @@ diff -uNr 11_exceptions_part1_groundwork/test-types/Cargo.toml 12_integrated_tes
 +name = "test-types"
 +version = "0.1.0"
 +authors = ["Andre Richter <andre.o.richter@gmail.com>"]
-+edition = "2018"
++edition = "2021"
 
 diff -uNr 11_exceptions_part1_groundwork/test-types/src/lib.rs 12_integrated_testing/test-types/src/lib.rs
 --- 11_exceptions_part1_groundwork/test-types/src/lib.rs
diff --git a/12_integrated_testing/test-macros/Cargo.toml b/12_integrated_testing/test-macros/Cargo.toml
index a570f72b4..fff98a1fc 100644
--- a/12_integrated_testing/test-macros/Cargo.toml
+++ b/12_integrated_testing/test-macros/Cargo.toml
@@ -2,7 +2,7 @@
 name = "test-macros"
 version = "0.1.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
-edition = "2018"
+edition = "2021"
 
 [lib]
 proc-macro = true
diff --git a/12_integrated_testing/test-types/Cargo.toml b/12_integrated_testing/test-types/Cargo.toml
index a0be2c57c..2f20f060e 100644
--- a/12_integrated_testing/test-types/Cargo.toml
+++ b/12_integrated_testing/test-types/Cargo.toml
@@ -2,4 +2,4 @@
 name = "test-types"
 version = "0.1.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
-edition = "2018"
+edition = "2021"
diff --git a/13_exceptions_part2_peripheral_IRQs/Cargo.toml b/13_exceptions_part2_peripheral_IRQs/Cargo.toml
index 4c6de8378..c81105a53 100644
--- a/13_exceptions_part2_peripheral_IRQs/Cargo.toml
+++ b/13_exceptions_part2_peripheral_IRQs/Cargo.toml
@@ -2,7 +2,7 @@
 name = "mingo"
 version = "0.13.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
-edition = "2018"
+edition = "2021"
 
 [profile.release]
 lto = true
diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index a3ec743e5..f24039031 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -755,7 +755,7 @@ diff -uNr 12_integrated_testing/Cargo.toml 13_exceptions_part2_peripheral_IRQs/C
 -version = "0.12.0"
 +version = "0.13.0"
  authors = ["Andre Richter <andre.o.richter@gmail.com>"]
- edition = "2018"
+ edition = "2021"
 
 
 diff -uNr 12_integrated_testing/Makefile 13_exceptions_part2_peripheral_IRQs/Makefile
diff --git a/13_exceptions_part2_peripheral_IRQs/test-macros/Cargo.toml b/13_exceptions_part2_peripheral_IRQs/test-macros/Cargo.toml
index a570f72b4..fff98a1fc 100644
--- a/13_exceptions_part2_peripheral_IRQs/test-macros/Cargo.toml
+++ b/13_exceptions_part2_peripheral_IRQs/test-macros/Cargo.toml
@@ -2,7 +2,7 @@
 name = "test-macros"
 version = "0.1.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
-edition = "2018"
+edition = "2021"
 
 [lib]
 proc-macro = true
diff --git a/13_exceptions_part2_peripheral_IRQs/test-types/Cargo.toml b/13_exceptions_part2_peripheral_IRQs/test-types/Cargo.toml
index a0be2c57c..2f20f060e 100644
--- a/13_exceptions_part2_peripheral_IRQs/test-types/Cargo.toml
+++ b/13_exceptions_part2_peripheral_IRQs/test-types/Cargo.toml
@@ -2,4 +2,4 @@
 name = "test-types"
 version = "0.1.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
-edition = "2018"
+edition = "2021"
diff --git a/14_virtual_mem_part2_mmio_remap/Cargo.toml b/14_virtual_mem_part2_mmio_remap/Cargo.toml
index 002b7bbd8..d3b17db1e 100644
--- a/14_virtual_mem_part2_mmio_remap/Cargo.toml
+++ b/14_virtual_mem_part2_mmio_remap/Cargo.toml
@@ -2,7 +2,7 @@
 name = "mingo"
 version = "0.14.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
-edition = "2018"
+edition = "2021"
 
 [profile.release]
 lto = true
diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index c91302f83..dad01e706 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -380,7 +380,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/Cargo.toml 14_virtual_mem_part2_mm
 -version = "0.13.0"
 +version = "0.14.0"
  authors = ["Andre Richter <andre.o.richter@gmail.com>"]
- edition = "2018"
+ edition = "2021"
 
 
 diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
diff --git a/14_virtual_mem_part2_mmio_remap/test-macros/Cargo.toml b/14_virtual_mem_part2_mmio_remap/test-macros/Cargo.toml
index a570f72b4..fff98a1fc 100644
--- a/14_virtual_mem_part2_mmio_remap/test-macros/Cargo.toml
+++ b/14_virtual_mem_part2_mmio_remap/test-macros/Cargo.toml
@@ -2,7 +2,7 @@
 name = "test-macros"
 version = "0.1.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
-edition = "2018"
+edition = "2021"
 
 [lib]
 proc-macro = true
diff --git a/14_virtual_mem_part2_mmio_remap/test-types/Cargo.toml b/14_virtual_mem_part2_mmio_remap/test-types/Cargo.toml
index a0be2c57c..2f20f060e 100644
--- a/14_virtual_mem_part2_mmio_remap/test-types/Cargo.toml
+++ b/14_virtual_mem_part2_mmio_remap/test-types/Cargo.toml
@@ -2,4 +2,4 @@
 name = "test-types"
 version = "0.1.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
-edition = "2018"
+edition = "2021"
diff --git a/15_virtual_mem_part3_precomputed_tables/Cargo.toml b/15_virtual_mem_part3_precomputed_tables/Cargo.toml
index 8ce927a2f..91a69bf33 100644
--- a/15_virtual_mem_part3_precomputed_tables/Cargo.toml
+++ b/15_virtual_mem_part3_precomputed_tables/Cargo.toml
@@ -2,7 +2,7 @@
 name = "mingo"
 version = "0.15.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
-edition = "2018"
+edition = "2021"
 
 [profile.release]
 lto = true
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index c285c067d..ee01279eb 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -770,7 +770,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/Cargo.toml 15_virtual_mem_part3_precom
 -version = "0.14.0"
 +version = "0.15.0"
  authors = ["Andre Richter <andre.o.richter@gmail.com>"]
- edition = "2018"
+ edition = "2021"
 
 
 diff -uNr 14_virtual_mem_part2_mmio_remap/Makefile 15_virtual_mem_part3_precomputed_tables/Makefile
diff --git a/15_virtual_mem_part3_precomputed_tables/test-macros/Cargo.toml b/15_virtual_mem_part3_precomputed_tables/test-macros/Cargo.toml
index a570f72b4..fff98a1fc 100644
--- a/15_virtual_mem_part3_precomputed_tables/test-macros/Cargo.toml
+++ b/15_virtual_mem_part3_precomputed_tables/test-macros/Cargo.toml
@@ -2,7 +2,7 @@
 name = "test-macros"
 version = "0.1.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
-edition = "2018"
+edition = "2021"
 
 [lib]
 proc-macro = true
diff --git a/15_virtual_mem_part3_precomputed_tables/test-types/Cargo.toml b/15_virtual_mem_part3_precomputed_tables/test-types/Cargo.toml
index a0be2c57c..2f20f060e 100644
--- a/15_virtual_mem_part3_precomputed_tables/test-types/Cargo.toml
+++ b/15_virtual_mem_part3_precomputed_tables/test-types/Cargo.toml
@@ -2,4 +2,4 @@
 name = "test-types"
 version = "0.1.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
-edition = "2018"
+edition = "2021"
diff --git a/16_virtual_mem_part4_higher_half_kernel/Cargo.toml b/16_virtual_mem_part4_higher_half_kernel/Cargo.toml
index 4fd433bf7..9bf6df42f 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Cargo.toml
+++ b/16_virtual_mem_part4_higher_half_kernel/Cargo.toml
@@ -2,7 +2,7 @@
 name = "mingo"
 version = "0.16.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
-edition = "2018"
+edition = "2021"
 
 [profile.release]
 lto = true
diff --git a/16_virtual_mem_part4_higher_half_kernel/README.md b/16_virtual_mem_part4_higher_half_kernel/README.md
index 02c914e3b..28005223c 100644
--- a/16_virtual_mem_part4_higher_half_kernel/README.md
+++ b/16_virtual_mem_part4_higher_half_kernel/README.md
@@ -240,7 +240,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/Cargo.toml 16_virtual_mem_part
 -version = "0.15.0"
 +version = "0.16.0"
  authors = ["Andre Richter <andre.o.richter@gmail.com>"]
- edition = "2018"
+ edition = "2021"
 
 
 diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/test-macros/Cargo.toml b/16_virtual_mem_part4_higher_half_kernel/test-macros/Cargo.toml
index a570f72b4..fff98a1fc 100644
--- a/16_virtual_mem_part4_higher_half_kernel/test-macros/Cargo.toml
+++ b/16_virtual_mem_part4_higher_half_kernel/test-macros/Cargo.toml
@@ -2,7 +2,7 @@
 name = "test-macros"
 version = "0.1.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
-edition = "2018"
+edition = "2021"
 
 [lib]
 proc-macro = true
diff --git a/16_virtual_mem_part4_higher_half_kernel/test-types/Cargo.toml b/16_virtual_mem_part4_higher_half_kernel/test-types/Cargo.toml
index a0be2c57c..2f20f060e 100644
--- a/16_virtual_mem_part4_higher_half_kernel/test-types/Cargo.toml
+++ b/16_virtual_mem_part4_higher_half_kernel/test-types/Cargo.toml
@@ -2,4 +2,4 @@
 name = "test-types"
 version = "0.1.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
-edition = "2018"
+edition = "2021"
diff --git a/X1_JTAG_boot/Cargo.toml b/X1_JTAG_boot/Cargo.toml
index 07dc9b5b6..b6d421734 100644
--- a/X1_JTAG_boot/Cargo.toml
+++ b/X1_JTAG_boot/Cargo.toml
@@ -2,7 +2,7 @@
 name = "mingo"
 version = "0.8.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
-edition = "2018"
+edition = "2021"
 
 [profile.release]
 lto = true

From 6c0d7fb3bbe69f9567351bbd0af6f0e963088b21 Mon Sep 17 00:00:00 2001
From: xuwl <xuwl@tmsi.io>
Date: Wed, 13 Oct 2021 11:28:18 +0800
Subject: [PATCH 091/214] fix ower the Raspberrys over the external USB desc
 issue

---
 README.CN.md | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/README.CN.md b/README.CN.md
index 9d82c8ada..893f0550a 100644
--- a/README.CN.md
+++ b/README.CN.md
@@ -94,8 +94,7 @@ Rust内置的交叉编译支持在这方面帮了我们大忙。我们只需要
 
 ## 📟 USB 串行输出
 
-由于教程中开发的内核是在真实的硬件上运行的，因此强烈建议您使用 USB 串行调试线来进行试验。连接后调试线会为树莓派供电，
-所以不需要额外供电。
+由于教程中开发的内核是在真实的硬件上运行的，因此强烈建议您使用 USB 串行调试线来进行试验。连接调试线后，树莓派需要额外供电。
 
 - 淘宝搜索"USB 转串口"
 - 如下图连接 GPIO 串口的 14/15 号引脚

From 1ca89ae1c1ba51576944400e5cbbb30195f724fc Mon Sep 17 00:00:00 2001
From: xuwl <xuwl@tmsi.io>
Date: Wed, 13 Oct 2021 11:52:53 +0800
Subject: [PATCH 092/214] fix desc for README.CN.md

---
 README.CN.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/README.CN.md b/README.CN.md
index 893f0550a..b8cba52aa 100644
--- a/README.CN.md
+++ b/README.CN.md
@@ -94,7 +94,7 @@ Rust内置的交叉编译支持在这方面帮了我们大忙。我们只需要
 
 ## 📟 USB 串行输出
 
-由于教程中开发的内核是在真实的硬件上运行的，因此强烈建议您使用 USB 串行调试线来进行试验。连接调试线后，树莓派需要额外供电。
+由于教程中开发的内核是在真实的硬件上运行的，因此强烈建议您使用 USB 串行调试线来进行试验。连接调试线后，树莓派需要通过额外电源供电。
 
 - 淘宝搜索"USB 转串口"
 - 如下图连接 GPIO 串口的 14/15 号引脚

From ddb4f54e49994b730796e2485a3d8e8c04dc52f9 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Fri, 22 Oct 2021 18:57:05 +0200
Subject: [PATCH 093/214] Fix typo

---
 12_integrated_testing/README.md                                 | 2 +-
 12_integrated_testing/tests/02_exception_sync_page_fault.rs     | 2 +-
 .../tests/02_exception_sync_page_fault.rs                       | 2 +-
 .../tests/02_exception_sync_page_fault.rs                       | 2 +-
 .../tests/02_exception_sync_page_fault.rs                       | 2 +-
 .../tests/02_exception_sync_page_fault.rs                       | 2 +-
 6 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/12_integrated_testing/README.md b/12_integrated_testing/README.md
index 4e2cdea87..9567aa54a 100644
--- a/12_integrated_testing/README.md
+++ b/12_integrated_testing/README.md
@@ -1939,7 +1939,7 @@ diff -uNr 11_exceptions_part1_groundwork/tests/02_exception_sync_page_fault.rs 1
 +
 +/// Overwrites libkernel's `panic_wait::_panic_exit()` so that it returns a "success" code.
 +///
-+/// In this test, teaching the panic is a success, because it is called from the synchronous
++/// In this test, reaching the panic is a success, because it is called from the synchronous
 +/// exception handler, which is what this test wants to achieve.
 +///
 +/// It also means that this integration test can not use any other code that calls panic!() directly
diff --git a/12_integrated_testing/tests/02_exception_sync_page_fault.rs b/12_integrated_testing/tests/02_exception_sync_page_fault.rs
index 8febacd14..bc05dd714 100644
--- a/12_integrated_testing/tests/02_exception_sync_page_fault.rs
+++ b/12_integrated_testing/tests/02_exception_sync_page_fault.rs
@@ -10,7 +10,7 @@
 
 /// Overwrites libkernel's `panic_wait::_panic_exit()` so that it returns a "success" code.
 ///
-/// In this test, teaching the panic is a success, because it is called from the synchronous
+/// In this test, reaching the panic is a success, because it is called from the synchronous
 /// exception handler, which is what this test wants to achieve.
 ///
 /// It also means that this integration test can not use any other code that calls panic!() directly
diff --git a/13_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs b/13_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs
index 8febacd14..bc05dd714 100644
--- a/13_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs
+++ b/13_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs
@@ -10,7 +10,7 @@
 
 /// Overwrites libkernel's `panic_wait::_panic_exit()` so that it returns a "success" code.
 ///
-/// In this test, teaching the panic is a success, because it is called from the synchronous
+/// In this test, reaching the panic is a success, because it is called from the synchronous
 /// exception handler, which is what this test wants to achieve.
 ///
 /// It also means that this integration test can not use any other code that calls panic!() directly
diff --git a/14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs b/14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
index 7b8bba35a..0bb1cbba0 100644
--- a/14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
+++ b/14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
@@ -10,7 +10,7 @@
 
 /// Overwrites libkernel's `panic_wait::_panic_exit()` so that it returns a "success" code.
 ///
-/// In this test, teaching the panic is a success, because it is called from the synchronous
+/// In this test, reaching the panic is a success, because it is called from the synchronous
 /// exception handler, which is what this test wants to achieve.
 ///
 /// It also means that this integration test can not use any other code that calls panic!() directly
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs b/15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs
index e7fa8800c..655e92156 100644
--- a/15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs
+++ b/15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs
@@ -10,7 +10,7 @@
 
 /// Overwrites libkernel's `panic_wait::_panic_exit()` so that it returns a "success" code.
 ///
-/// In this test, teaching the panic is a success, because it is called from the synchronous
+/// In this test, reaching the panic is a success, because it is called from the synchronous
 /// exception handler, which is what this test wants to achieve.
 ///
 /// It also means that this integration test can not use any other code that calls panic!() directly
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs b/16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs
index 47ef31fa5..6e284f9c7 100644
--- a/16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs
@@ -10,7 +10,7 @@
 
 /// Overwrites libkernel's `panic_wait::_panic_exit()` so that it returns a "success" code.
 ///
-/// In this test, teaching the panic is a success, because it is called from the synchronous
+/// In this test, reaching the panic is a success, because it is called from the synchronous
 /// exception handler, which is what this test wants to achieve.
 ///
 /// It also means that this integration test can not use any other code that calls panic!() directly

From 920af57ab40f5b474ab48039c2501f68d4ba4c70 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Wed, 27 Oct 2021 20:40:38 +0200
Subject: [PATCH 094/214] Refactor parts of exception handling

---
 11_exceptions_part1_groundwork/README.md      | 262 ++++++++++--------
 .../src/_arch/aarch64/exception.rs            | 124 ++++++---
 .../src/_arch/aarch64/exception.s             |   6 +-
 12_integrated_testing/README.md               |  27 +-
 .../src/_arch/aarch64/exception.rs            | 108 +++++---
 .../src/_arch/aarch64/exception.s             |   6 +-
 13_exceptions_part2_peripheral_IRQs/README.md |   2 +-
 .../src/_arch/aarch64/exception.rs            | 108 +++++---
 .../src/_arch/aarch64/exception.s             |   6 +-
 14_virtual_mem_part2_mmio_remap/README.md     | 147 +++-------
 .../src/_arch/aarch64/exception.rs            | 130 +++++----
 .../src/_arch/aarch64/exception.s             |   6 +-
 .../src/bsp/raspberrypi/link.ld               |   2 -
 .../src/bsp/raspberrypi/memory.rs             |  15 -
 .../src/bsp/raspberrypi/memory/mmu.rs         |   7 -
 .../README.md                                 |   8 +-
 .../src/_arch/aarch64/exception.rs            | 130 +++++----
 .../src/_arch/aarch64/exception.s             |   6 +-
 .../src/bsp/raspberrypi/link.ld               |   2 -
 .../src/bsp/raspberrypi/memory.rs             |  15 -
 .../src/bsp/raspberrypi/memory/mmu.rs         |   7 -
 .../src/_arch/aarch64/exception.rs            | 130 +++++----
 .../src/_arch/aarch64/exception.s             |   6 +-
 .../src/bsp/raspberrypi/link.ld               |   2 -
 .../src/bsp/raspberrypi/memory.rs             |  15 -
 .../src/bsp/raspberrypi/memory/mmu.rs         |   7 -
 26 files changed, 664 insertions(+), 620 deletions(-)

diff --git a/11_exceptions_part1_groundwork/README.md b/11_exceptions_part1_groundwork/README.md
index afb6130ba..566b8b86d 100644
--- a/11_exceptions_part1_groundwork/README.md
+++ b/11_exceptions_part1_groundwork/README.md
@@ -203,12 +203,14 @@ some hand-crafted assembly. Introducing `exception.s`:
 	stp	x26, x27, [sp, #16 * 13]
 	stp	x28, x29, [sp, #16 * 14]
 
-	// Add the exception link register (ELR_EL1) and the saved program status (SPSR_EL1).
+	// Add the exception link register (ELR_EL1), saved program status (SPSR_EL1) and exception
+	// syndrome register (ESR_EL1).
 	mrs	x1,  ELR_EL1
 	mrs	x2,  SPSR_EL1
+	mrs	x3,  ESR_EL1
 
 	stp	lr,  x1,  [sp, #16 * 15]
-	str	x2,       [sp, #16 * 16]
+	stp	x2,  x3,  [sp, #16 * 16]
 
 	// x0 is the first argument for the function called through `\handler`.
 	mov	x0,  sp
@@ -224,10 +226,10 @@ some hand-crafted assembly. Introducing `exception.s`:
 
 First, a macro for saving the context is defined. It eventually jumps to follow-up handler code, and
 finally restores the context. In advance, we reserve space on the stack for the context. That is,
-the 30 `GPRs`, the `link register`, the `saved program status` and the `exception link register`
-(holding the preferred return address). Afterwards, we store those registers, save the current stack
-address in `x0` and branch off to follow-up handler-code, whose function name is supplied as an
-argument to the macro (`\handler`).
+the 30 `GPRs`, the `link register`, the `exception link register` (holding the preferred return
+address), the `saved program status` and the `exception syndrome register`. Afterwards, we store
+those registers, save the current stack address in `x0` and branch off to follow-up handler-code,
+whose function name is supplied as an argument to the macro (`\handler`).
 
 The handler code will be written in Rust, but use the platform's `C` ABI. This way, we can define a
 function signature that has a pointer to the context-data on the stack as its first argument, and
@@ -298,6 +300,9 @@ struct ExceptionContext {
 
     /// Saved program status.
     spsr_el1: SpsrEL1,
+
+    // Exception syndrome register.
+    esr_el1: EsrEL1,
 }
 ```
 
@@ -305,16 +310,12 @@ The handlers take a `struct ExceptionContext` argument. Since we do not plan to
 for each exception yet, a default handler is provided:
 
 ```rust
-/// Print verbose information about the exception and the panic.
-fn default_exception_handler(e: &ExceptionContext) {
+/// Prints verbose information about the exception and then panics.
+fn default_exception_handler(exc: &ExceptionContext) {
     panic!(
         "\n\nCPU Exception!\n\
-         FAR_EL1: {:#018x}\n\
-         {}\n\
-         {}",
-        FAR_EL1.get(),
-        EsrEL1 {},
-        e
+        {}",
+        exc
     );
 }
 ```
@@ -363,14 +364,16 @@ To survive this exception, the respective handler has a special demo case:
 ```rust
 #[no_mangle]
 unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
-    let far_el1 = FAR_EL1.get();
+    if e.fault_address_valid() {
+        let far_el1 = FAR_EL1.get();
 
-    // This catches the demo case for this tutorial. If the fault address happens to be 8 GiB,
-    // advance the exception link register for one instruction, so that execution can continue.
-    if far_el1 == 8 * 1024 * 1024 * 1024 {
-        e.elr_el1 += 4;
+        // This catches the demo case for this tutorial. If the fault address happens to be 8 GiB,
+        // advance the exception link register for one instruction, so that execution can continue.
+        if far_el1 == 8 * 1024 * 1024 * 1024 {
+            e.elr_el1 += 4;
 
-        asm::eret()
+            return;
+        }
     }
 
     default_exception_handler(e);
@@ -398,6 +401,7 @@ Minipush 1.0
 [MP] ⏳ Waiting for /dev/ttyUSB0
 [MP] ✅ Serial connected
 [MP] 🔌 Please power the target now
+
  __  __ _      _ _                 _
 |  \/  (_)_ _ (_) |   ___  __ _ __| |
 | |\/| | | ' \| | |__/ _ \/ _` / _` |
@@ -409,39 +413,38 @@ Minipush 1.0
 [MP] ⏩ Pushing 64 KiB =========================================🦀 100% 0 KiB/s Time: 00:00:00
 [ML] Loaded! Executing the payload now
 
-[    0.980247] mingo version 0.11.0
-[    0.980454] Booting on: Raspberry Pi 3
-[    0.980909] MMU online. Special regions:
-[    0.981386]       0x00080000 - 0x0008ffff |  64 KiB | C   RO PX  | Kernel code and RO data
-[    0.982404]       0x3f000000 - 0x4000ffff |  16 MiB | Dev RW PXN | Device MMIO
-[    0.983293] Current privilege level: EL1
-[    0.983769] Exception handling state:
-[    0.984213]       Debug:  Masked
-[    0.984604]       SError: Masked
-[    0.984993]       IRQ:    Masked
-[    0.985383]       FIQ:    Masked
-[    0.985773] Architectural timer resolution: 52 ns
-[    0.986347] Drivers loaded:
-[    0.986684]       1. BCM GPIO
-[    0.987041]       2. BCM PL011 UART
-[    0.987463] Timer test, spinning for 1 second
-[    1.987994]
-[    1.987998] Trying to read from address 8 GiB...
-[    1.988547] ************************************************
-[    1.989240] Whoa! We recovered from a synchronous exception!
-[    1.989933] ************************************************
-[    1.990627]
-[    1.990800] Let's try again
-[    1.991136] Trying to read from address 9 GiB...
+[    0.788994] mingo version 0.11.0
+[    0.789201] Booting on: Raspberry Pi 3
+[    0.789656] MMU online. Special regions:
+[    0.790133]       0x00080000 - 0x0008ffff |  64 KiB | C   RO PX  | Kernel code and RO data
+[    0.791151]       0x3f000000 - 0x4000ffff |  16 MiB | Dev RW PXN | Device MMIO
+[    0.792040] Current privilege level: EL1
+[    0.792516] Exception handling state:
+[    0.792960]       Debug:  Masked
+[    0.793350]       SError: Masked
+[    0.793740]       IRQ:    Masked
+[    0.794130]       FIQ:    Masked
+[    0.794520] Architectural timer resolution: 52 ns
+[    0.795094] Drivers loaded:
+[    0.795430]       1. BCM GPIO
+[    0.795788]       2. BCM PL011 UART
+[    0.796210] Timer test, spinning for 1 second
+[    1.796741]
+[    1.796745] Trying to read from address 8 GiB...
+[    1.797295] ************************************************
+[    1.797987] Whoa! We recovered from a synchronous exception!
+[    1.798680] ************************************************
+[    1.799373]
+[    1.799547] Let's try again
+[    1.799883] Trying to read from address 9 GiB...
 
 Kernel panic:
 
 CPU Exception!
-FAR_EL1: 0x0000000240000000
 ESR_EL1: 0x96000004
       Exception Class         (EC) : 0x25 - Data Abort, current EL
       Instr Specific Syndrome (ISS): 0x4
-ELR_EL1: 0x0000000000082578
+FAR_EL1: 0x0000000240000000
 SPSR_EL1: 0x600003c5
       Flags:
             Negative (N): Not set
@@ -454,24 +457,25 @@ SPSR_EL1: 0x600003c5
             IRQ    (I): Masked
             FIQ    (F): Masked
       Illegal Execution State (IL): Not set
+ELR_EL1: 0x0000000000082580
 
 General purpose register:
-      x0 : 0x0000000000000000         x1 : 0x00000000000858c7
-      x2 : 0x0000000000000027         x3 : 0x0000000000084cc4
-      x4 : 0x0000000000000003         x5 : 0x3f27329400000000
-      x6 : 0x0000000000000000         x7 : 0xd3d0b80800000000
-      x8 : 0x0000000240000000         x9 : 0x000000003f201000
-      x10: 0x0000000000000019         x11: 0x0000000000000000
-      x12: 0x0000000000000001         x13: 0x0000000000000036
-      x14: 0x000000000007fc2d         x15: 0x0000000000000000
-      x16: 0x0000000000000040         x17: 0xfd39702255e846c0
-      x18: 0x9cd47880832f1200         x19: 0x0000000000090008
-      x20: 0x00000000000856b0         x21: 0x000000003b9aca00
-      x22: 0x000000000008274c         x23: 0x00000000000833d8
+      x0 : 0x0000000000000000         x1 : 0x00000000000859b7
+      x2 : 0x0000000000000027         x3 : 0x0000000000084d3c
+      x4 : 0x0000000000000003         x5 : 0x3f26329c00000000
+      x6 : 0x0000000000000000         x7 : 0xd3d18800228d0241
+      x8 : 0x0000000240000000         x9 : 0x00000000000859b7
+      x10: 0x0000000000000443         x11: 0x000000003f201000
+      x12: 0x0000000000000019         x13: 0x0000000000000033
+      x14: 0x000000000007fd3d         x15: 0x0000000000000058
+      x16: 0x0000000000000078         x17: 0xfd29f02255a847c0
+      x18: 0x9cd4788000000008         x19: 0x0000000000090008
+      x20: 0x00000000000857a0         x21: 0x000000003b9aca00
+      x22: 0x000000000008271c         x23: 0x0000000000083314
       x24: 0x00000000000003e8         x25: 0xffffffffc4653600
-      x26: 0x00000000000f4240         x27: 0x0000000000085790
-      x28: 0x0000000000086a50         x29: 0x00000000000867ed
-      lr : 0x000000000008256c
+      x26: 0x00000000000f4240         x27: 0x0000000000085880
+      x28: 0x0000000000085170         x29: 0x0000000000086c10
+      lr : 0x0000000000082574
 ```
 
 ## Diff to previous
@@ -492,14 +496,14 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/Cargo.toml 11_exceptions_part1_g
 diff -uNr 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs 11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
 --- 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs
 +++ 11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
-@@ -11,8 +11,227 @@
+@@ -11,8 +11,263 @@
  //!
  //! crate::exception::arch_exception
 
 -use cortex_a::registers::*;
 -use tock_registers::interfaces::Readable;
 +use core::{cell::UnsafeCell, fmt};
-+use cortex_a::{asm, asm::barrier, registers::*};
++use cortex_a::{asm::barrier, registers::*};
 +use tock_registers::{
 +    interfaces::{Readable, Writeable},
 +    registers::InMemoryRegister,
@@ -512,9 +516,10 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs 1
 +// Private Definitions
 +//--------------------------------------------------------------------------------------------------
 +
-+/// Wrapper struct for memory copy of SPSR_EL1.
++/// Wrapper structs for memory copies of registers.
 +#[repr(transparent)]
 +struct SpsrEL1(InMemoryRegister<u64, SPSR_EL1::Register>);
++struct EsrEL1(InMemoryRegister<u64, ESR_EL1::Register>);
 +
 +/// The exception context as it is stored on the stack on exception entry.
 +#[repr(C)]
@@ -530,25 +535,21 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs 1
 +
 +    /// Saved program status.
 +    spsr_el1: SpsrEL1,
-+}
 +
-+/// Wrapper struct for pretty printing ESR_EL1.
-+struct EsrEL1;
++    // Exception syndrome register.
++    esr_el1: EsrEL1,
++}
 +
 +//--------------------------------------------------------------------------------------------------
 +// Private Code
 +//--------------------------------------------------------------------------------------------------
 +
 +/// Prints verbose information about the exception and then panics.
-+fn default_exception_handler(e: &ExceptionContext) {
++fn default_exception_handler(exc: &ExceptionContext) {
 +    panic!(
 +        "\n\nCPU Exception!\n\
-+         FAR_EL1: {:#018x}\n\
-+         {}\n\
-+         {}",
-+        FAR_EL1.get(),
-+        EsrEL1 {},
-+        e
++        {}",
++        exc
 +    );
 +}
 +
@@ -577,14 +578,16 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs 1
 +
 +#[no_mangle]
 +unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
-+    let far_el1 = FAR_EL1.get();
++    if e.fault_address_valid() {
++        let far_el1 = FAR_EL1.get();
 +
-+    // This catches the demo case for this tutorial. If the fault address happens to be 8 GiB,
-+    // advance the exception link register for one instruction, so that execution can continue.
-+    if far_el1 == 8 * 1024 * 1024 * 1024 {
-+        e.elr_el1 += 4;
++        // This catches the demo case for this tutorial. If the fault address happens to be 8 GiB,
++        // advance the exception link register for one instruction, so that execution can continue.
++        if far_el1 == 8 * 1024 * 1024 * 1024 {
++            e.elr_el1 += 4;
 +
-+        asm::eret()
++            return;
++        }
 +    }
 +
 +    default_exception_handler(e);
@@ -639,33 +642,9 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs 1
 +}
 +
 +//------------------------------------------------------------------------------
-+// Pretty printing
++// Misc
 +//------------------------------------------------------------------------------
 +
-+/// Human readable ESR_EL1.
-+#[rustfmt::skip]
-+impl fmt::Display for EsrEL1 {
-+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
-+        let esr_el1 = ESR_EL1.extract();
-+
-+        // Raw print of whole register.
-+        writeln!(f, "ESR_EL1: {:#010x}", esr_el1.get())?;
-+
-+        // Raw print of exception class.
-+        write!(f, "      Exception Class         (EC) : {:#x}", esr_el1.read(ESR_EL1::EC))?;
-+
-+        // Exception class, translation.
-+        let ec_translation = match esr_el1.read_as_enum(ESR_EL1::EC) {
-+            Some(ESR_EL1::EC::Value::DataAbortCurrentEL) => "Data Abort, current EL",
-+            _ => "N/A",
-+        };
-+        writeln!(f, " - {}", ec_translation)?;
-+
-+        // Raw print of instruction specific syndrome.
-+        write!(f, "      Instr Specific Syndrome (ISS): {:#x}", esr_el1.read(ESR_EL1::ISS))
-+    }
-+}
-+
 +/// Human readable SPSR_EL1.
 +#[rustfmt::skip]
 +impl fmt::Display for SpsrEL1 {
@@ -699,11 +678,72 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs 1
 +    }
 +}
 +
++impl EsrEL1 {
++    #[inline(always)]
++    fn exception_class(&self) -> Option<ESR_EL1::EC::Value> {
++        self.0.read_as_enum(ESR_EL1::EC)
++    }
++}
++
++/// Human readable ESR_EL1.
++#[rustfmt::skip]
++impl fmt::Display for EsrEL1 {
++    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
++        // Raw print of whole register.
++        writeln!(f, "ESR_EL1: {:#010x}", self.0.get())?;
++
++        // Raw print of exception class.
++        write!(f, "      Exception Class         (EC) : {:#x}", self.0.read(ESR_EL1::EC))?;
++
++        // Exception class.
++        let ec_translation = match self.exception_class() {
++            Some(ESR_EL1::EC::Value::DataAbortCurrentEL) => "Data Abort, current EL",
++            _ => "N/A",
++        };
++        writeln!(f, " - {}", ec_translation)?;
++
++        // Raw print of instruction specific syndrome.
++        write!(f, "      Instr Specific Syndrome (ISS): {:#x}", self.0.read(ESR_EL1::ISS))
++    }
++}
++
++impl ExceptionContext {
++    #[inline(always)]
++    fn exception_class(&self) -> Option<ESR_EL1::EC::Value> {
++        self.esr_el1.exception_class()
++    }
++
++    #[inline(always)]
++    fn fault_address_valid(&self) -> bool {
++        use ESR_EL1::EC::Value::*;
++
++        match self.exception_class() {
++            None => false,
++            Some(ec) => matches!(
++                ec,
++                InstrAbortLowerEL
++                    | InstrAbortCurrentEL
++                    | PCAlignmentFault
++                    | DataAbortLowerEL
++                    | DataAbortCurrentEL
++                    | WatchpointLowerEL
++                    | WatchpointCurrentEL
++            ),
++        }
++    }
++}
++
 +/// Human readable print of the exception context.
 +impl fmt::Display for ExceptionContext {
 +    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
-+        writeln!(f, "ELR_EL1: {:#018x}", self.elr_el1)?;
++        writeln!(f, "{}", self.esr_el1)?;
++
++        if self.fault_address_valid() {
++            writeln!(f, "FAR_EL1: {:#018x}", FAR_EL1.get() as usize)?;
++        }
++
 +        writeln!(f, "{}", self.spsr_el1)?;
++        writeln!(f, "ELR_EL1: {:#018x}", self.elr_el1)?;
 +        writeln!(f)?;
 +        writeln!(f, "General purpose register:")?;
 +
@@ -722,7 +762,7 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs 1
 
  //--------------------------------------------------------------------------------------------------
  // Public Code
-@@ -29,3 +248,23 @@
+@@ -29,3 +284,23 @@
          _ => (PrivilegeLevel::Unknown, "Unknown"),
      }
  }
@@ -750,7 +790,7 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs 1
 diff -uNr 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.s 11_exceptions_part1_groundwork/src/_arch/aarch64/exception.s
 --- 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.s
 +++ 11_exceptions_part1_groundwork/src/_arch/aarch64/exception.s
-@@ -0,0 +1,148 @@
+@@ -0,0 +1,150 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -782,12 +822,14 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.s 11
 +	stp	x26, x27, [sp, #16 * 13]
 +	stp	x28, x29, [sp, #16 * 14]
 +
-+	// Add the exception link register (ELR_EL1) and the saved program status (SPSR_EL1).
++	// Add the exception link register (ELR_EL1), saved program status (SPSR_EL1) and exception
++	// syndrome register (ESR_EL1).
 +	mrs	x1,  ELR_EL1
 +	mrs	x2,  SPSR_EL1
++	mrs	x3,  ESR_EL1
 +
 +	stp	lr,  x1,  [sp, #16 * 15]
-+	str	x2,       [sp, #16 * 16]
++	stp	x2,  x3,  [sp, #16 * 16]
 +
 +	// x0 is the first argument for the function called through `\handler`.
 +	mov	x0,  sp
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
index d51d7f014..2db1741c2 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
@@ -12,7 +12,7 @@
 //! crate::exception::arch_exception
 
 use core::{cell::UnsafeCell, fmt};
-use cortex_a::{asm, asm::barrier, registers::*};
+use cortex_a::{asm::barrier, registers::*};
 use tock_registers::{
     interfaces::{Readable, Writeable},
     registers::InMemoryRegister,
@@ -25,9 +25,10 @@ global_asm!(include_str!("exception.s"));
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
-/// Wrapper struct for memory copy of SPSR_EL1.
+/// Wrapper structs for memory copies of registers.
 #[repr(transparent)]
 struct SpsrEL1(InMemoryRegister<u64, SPSR_EL1::Register>);
+struct EsrEL1(InMemoryRegister<u64, ESR_EL1::Register>);
 
 /// The exception context as it is stored on the stack on exception entry.
 #[repr(C)]
@@ -43,25 +44,21 @@ struct ExceptionContext {
 
     /// Saved program status.
     spsr_el1: SpsrEL1,
-}
 
-/// Wrapper struct for pretty printing ESR_EL1.
-struct EsrEL1;
+    // Exception syndrome register.
+    esr_el1: EsrEL1,
+}
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
 /// Prints verbose information about the exception and then panics.
-fn default_exception_handler(e: &ExceptionContext) {
+fn default_exception_handler(exc: &ExceptionContext) {
     panic!(
         "\n\nCPU Exception!\n\
-         FAR_EL1: {:#018x}\n\
-         {}\n\
-         {}",
-        FAR_EL1.get(),
-        EsrEL1 {},
-        e
+        {}",
+        exc
     );
 }
 
@@ -90,14 +87,16 @@ unsafe extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
 
 #[no_mangle]
 unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
-    let far_el1 = FAR_EL1.get();
+    if e.fault_address_valid() {
+        let far_el1 = FAR_EL1.get();
 
-    // This catches the demo case for this tutorial. If the fault address happens to be 8 GiB,
-    // advance the exception link register for one instruction, so that execution can continue.
-    if far_el1 == 8 * 1024 * 1024 * 1024 {
-        e.elr_el1 += 4;
+        // This catches the demo case for this tutorial. If the fault address happens to be 8 GiB,
+        // advance the exception link register for one instruction, so that execution can continue.
+        if far_el1 == 8 * 1024 * 1024 * 1024 {
+            e.elr_el1 += 4;
 
-        asm::eret()
+            return;
+        }
     }
 
     default_exception_handler(e);
@@ -152,33 +151,9 @@ unsafe extern "C" fn lower_aarch32_serror(e: &mut ExceptionContext) {
 }
 
 //------------------------------------------------------------------------------
-// Pretty printing
+// Misc
 //------------------------------------------------------------------------------
 
-/// Human readable ESR_EL1.
-#[rustfmt::skip]
-impl fmt::Display for EsrEL1 {
-    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
-        let esr_el1 = ESR_EL1.extract();
-
-        // Raw print of whole register.
-        writeln!(f, "ESR_EL1: {:#010x}", esr_el1.get())?;
-
-        // Raw print of exception class.
-        write!(f, "      Exception Class         (EC) : {:#x}", esr_el1.read(ESR_EL1::EC))?;
-
-        // Exception class, translation.
-        let ec_translation = match esr_el1.read_as_enum(ESR_EL1::EC) {
-            Some(ESR_EL1::EC::Value::DataAbortCurrentEL) => "Data Abort, current EL",
-            _ => "N/A",
-        };
-        writeln!(f, " - {}", ec_translation)?;
-
-        // Raw print of instruction specific syndrome.
-        write!(f, "      Instr Specific Syndrome (ISS): {:#x}", esr_el1.read(ESR_EL1::ISS))
-    }
-}
-
 /// Human readable SPSR_EL1.
 #[rustfmt::skip]
 impl fmt::Display for SpsrEL1 {
@@ -212,11 +187,72 @@ impl fmt::Display for SpsrEL1 {
     }
 }
 
+impl EsrEL1 {
+    #[inline(always)]
+    fn exception_class(&self) -> Option<ESR_EL1::EC::Value> {
+        self.0.read_as_enum(ESR_EL1::EC)
+    }
+}
+
+/// Human readable ESR_EL1.
+#[rustfmt::skip]
+impl fmt::Display for EsrEL1 {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        // Raw print of whole register.
+        writeln!(f, "ESR_EL1: {:#010x}", self.0.get())?;
+
+        // Raw print of exception class.
+        write!(f, "      Exception Class         (EC) : {:#x}", self.0.read(ESR_EL1::EC))?;
+
+        // Exception class.
+        let ec_translation = match self.exception_class() {
+            Some(ESR_EL1::EC::Value::DataAbortCurrentEL) => "Data Abort, current EL",
+            _ => "N/A",
+        };
+        writeln!(f, " - {}", ec_translation)?;
+
+        // Raw print of instruction specific syndrome.
+        write!(f, "      Instr Specific Syndrome (ISS): {:#x}", self.0.read(ESR_EL1::ISS))
+    }
+}
+
+impl ExceptionContext {
+    #[inline(always)]
+    fn exception_class(&self) -> Option<ESR_EL1::EC::Value> {
+        self.esr_el1.exception_class()
+    }
+
+    #[inline(always)]
+    fn fault_address_valid(&self) -> bool {
+        use ESR_EL1::EC::Value::*;
+
+        match self.exception_class() {
+            None => false,
+            Some(ec) => matches!(
+                ec,
+                InstrAbortLowerEL
+                    | InstrAbortCurrentEL
+                    | PCAlignmentFault
+                    | DataAbortLowerEL
+                    | DataAbortCurrentEL
+                    | WatchpointLowerEL
+                    | WatchpointCurrentEL
+            ),
+        }
+    }
+}
+
 /// Human readable print of the exception context.
 impl fmt::Display for ExceptionContext {
     fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
-        writeln!(f, "ELR_EL1: {:#018x}", self.elr_el1)?;
+        writeln!(f, "{}", self.esr_el1)?;
+
+        if self.fault_address_valid() {
+            writeln!(f, "FAR_EL1: {:#018x}", FAR_EL1.get() as usize)?;
+        }
+
         writeln!(f, "{}", self.spsr_el1)?;
+        writeln!(f, "ELR_EL1: {:#018x}", self.elr_el1)?;
         writeln!(f)?;
         writeln!(f, "General purpose register:")?;
 
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.s b/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.s
index ffb1875ce..cb6bfb150 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.s
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.s
@@ -29,12 +29,14 @@
 	stp	x26, x27, [sp, #16 * 13]
 	stp	x28, x29, [sp, #16 * 14]
 
-	// Add the exception link register (ELR_EL1) and the saved program status (SPSR_EL1).
+	// Add the exception link register (ELR_EL1), saved program status (SPSR_EL1) and exception
+	// syndrome register (ESR_EL1).
 	mrs	x1,  ELR_EL1
 	mrs	x2,  SPSR_EL1
+	mrs	x3,  ESR_EL1
 
 	stp	lr,  x1,  [sp, #16 * 15]
-	str	x2,       [sp, #16 * 16]
+	stp	x2,  x3,  [sp, #16 * 16]
 
 	// x0 is the first argument for the function called through `\handler`.
 	mov	x0,  sp
diff --git a/12_integrated_testing/README.md b/12_integrated_testing/README.md
index 9567aa54a..a7fc3969b 100644
--- a/12_integrated_testing/README.md
+++ b/12_integrated_testing/README.md
@@ -853,8 +853,8 @@ Compiling integration test(s) - rpi3
          Kernel panic:
 
          CPU Exception!
-         FAR_EL1: 0x0000000240000000
          ESR_EL1: 0x96000004
+               Exception Class         (EC) : 0x25 - Data Abort, current EL
          [...]
 
          -------------------------------------------------------------------
@@ -1070,27 +1070,20 @@ diff -uNr 11_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs 12_integrated_
 diff -uNr 11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs 12_integrated_testing/src/_arch/aarch64/exception.rs
 --- 11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
 +++ 12_integrated_testing/src/_arch/aarch64/exception.rs
-@@ -12,7 +12,7 @@
- //! crate::exception::arch_exception
-
- use core::{cell::UnsafeCell, fmt};
--use cortex_a::{asm, asm::barrier, registers::*};
-+use cortex_a::{asm::barrier, registers::*};
- use tock_registers::{
-     interfaces::{Readable, Writeable},
-     registers::InMemoryRegister,
-@@ -90,16 +90,6 @@
+@@ -87,18 +87,6 @@
 
  #[no_mangle]
  unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
--    let far_el1 = FAR_EL1.get();
+-    if e.fault_address_valid() {
+-        let far_el1 = FAR_EL1.get();
 -
--    // This catches the demo case for this tutorial. If the fault address happens to be 8 GiB,
--    // advance the exception link register for one instruction, so that execution can continue.
--    if far_el1 == 8 * 1024 * 1024 * 1024 {
--        e.elr_el1 += 4;
+-        // This catches the demo case for this tutorial. If the fault address happens to be 8 GiB,
+-        // advance the exception link register for one instruction, so that execution can continue.
+-        if far_el1 == 8 * 1024 * 1024 * 1024 {
+-            e.elr_el1 += 4;
 -
--        asm::eret()
+-            return;
+-        }
 -    }
 -
      default_exception_handler(e);
diff --git a/12_integrated_testing/src/_arch/aarch64/exception.rs b/12_integrated_testing/src/_arch/aarch64/exception.rs
index 6ba47300f..6e8485b70 100644
--- a/12_integrated_testing/src/_arch/aarch64/exception.rs
+++ b/12_integrated_testing/src/_arch/aarch64/exception.rs
@@ -25,9 +25,10 @@ global_asm!(include_str!("exception.s"));
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
-/// Wrapper struct for memory copy of SPSR_EL1.
+/// Wrapper structs for memory copies of registers.
 #[repr(transparent)]
 struct SpsrEL1(InMemoryRegister<u64, SPSR_EL1::Register>);
+struct EsrEL1(InMemoryRegister<u64, ESR_EL1::Register>);
 
 /// The exception context as it is stored on the stack on exception entry.
 #[repr(C)]
@@ -43,25 +44,21 @@ struct ExceptionContext {
 
     /// Saved program status.
     spsr_el1: SpsrEL1,
-}
 
-/// Wrapper struct for pretty printing ESR_EL1.
-struct EsrEL1;
+    // Exception syndrome register.
+    esr_el1: EsrEL1,
+}
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
 /// Prints verbose information about the exception and then panics.
-fn default_exception_handler(e: &ExceptionContext) {
+fn default_exception_handler(exc: &ExceptionContext) {
     panic!(
         "\n\nCPU Exception!\n\
-         FAR_EL1: {:#018x}\n\
-         {}\n\
-         {}",
-        FAR_EL1.get(),
-        EsrEL1 {},
-        e
+        {}",
+        exc
     );
 }
 
@@ -142,33 +139,9 @@ unsafe extern "C" fn lower_aarch32_serror(e: &mut ExceptionContext) {
 }
 
 //------------------------------------------------------------------------------
-// Pretty printing
+// Misc
 //------------------------------------------------------------------------------
 
-/// Human readable ESR_EL1.
-#[rustfmt::skip]
-impl fmt::Display for EsrEL1 {
-    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
-        let esr_el1 = ESR_EL1.extract();
-
-        // Raw print of whole register.
-        writeln!(f, "ESR_EL1: {:#010x}", esr_el1.get())?;
-
-        // Raw print of exception class.
-        write!(f, "      Exception Class         (EC) : {:#x}", esr_el1.read(ESR_EL1::EC))?;
-
-        // Exception class, translation.
-        let ec_translation = match esr_el1.read_as_enum(ESR_EL1::EC) {
-            Some(ESR_EL1::EC::Value::DataAbortCurrentEL) => "Data Abort, current EL",
-            _ => "N/A",
-        };
-        writeln!(f, " - {}", ec_translation)?;
-
-        // Raw print of instruction specific syndrome.
-        write!(f, "      Instr Specific Syndrome (ISS): {:#x}", esr_el1.read(ESR_EL1::ISS))
-    }
-}
-
 /// Human readable SPSR_EL1.
 #[rustfmt::skip]
 impl fmt::Display for SpsrEL1 {
@@ -202,11 +175,72 @@ impl fmt::Display for SpsrEL1 {
     }
 }
 
+impl EsrEL1 {
+    #[inline(always)]
+    fn exception_class(&self) -> Option<ESR_EL1::EC::Value> {
+        self.0.read_as_enum(ESR_EL1::EC)
+    }
+}
+
+/// Human readable ESR_EL1.
+#[rustfmt::skip]
+impl fmt::Display for EsrEL1 {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        // Raw print of whole register.
+        writeln!(f, "ESR_EL1: {:#010x}", self.0.get())?;
+
+        // Raw print of exception class.
+        write!(f, "      Exception Class         (EC) : {:#x}", self.0.read(ESR_EL1::EC))?;
+
+        // Exception class.
+        let ec_translation = match self.exception_class() {
+            Some(ESR_EL1::EC::Value::DataAbortCurrentEL) => "Data Abort, current EL",
+            _ => "N/A",
+        };
+        writeln!(f, " - {}", ec_translation)?;
+
+        // Raw print of instruction specific syndrome.
+        write!(f, "      Instr Specific Syndrome (ISS): {:#x}", self.0.read(ESR_EL1::ISS))
+    }
+}
+
+impl ExceptionContext {
+    #[inline(always)]
+    fn exception_class(&self) -> Option<ESR_EL1::EC::Value> {
+        self.esr_el1.exception_class()
+    }
+
+    #[inline(always)]
+    fn fault_address_valid(&self) -> bool {
+        use ESR_EL1::EC::Value::*;
+
+        match self.exception_class() {
+            None => false,
+            Some(ec) => matches!(
+                ec,
+                InstrAbortLowerEL
+                    | InstrAbortCurrentEL
+                    | PCAlignmentFault
+                    | DataAbortLowerEL
+                    | DataAbortCurrentEL
+                    | WatchpointLowerEL
+                    | WatchpointCurrentEL
+            ),
+        }
+    }
+}
+
 /// Human readable print of the exception context.
 impl fmt::Display for ExceptionContext {
     fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
-        writeln!(f, "ELR_EL1: {:#018x}", self.elr_el1)?;
+        writeln!(f, "{}", self.esr_el1)?;
+
+        if self.fault_address_valid() {
+            writeln!(f, "FAR_EL1: {:#018x}", FAR_EL1.get() as usize)?;
+        }
+
         writeln!(f, "{}", self.spsr_el1)?;
+        writeln!(f, "ELR_EL1: {:#018x}", self.elr_el1)?;
         writeln!(f)?;
         writeln!(f, "General purpose register:")?;
 
diff --git a/12_integrated_testing/src/_arch/aarch64/exception.s b/12_integrated_testing/src/_arch/aarch64/exception.s
index ffb1875ce..cb6bfb150 100644
--- a/12_integrated_testing/src/_arch/aarch64/exception.s
+++ b/12_integrated_testing/src/_arch/aarch64/exception.s
@@ -29,12 +29,14 @@
 	stp	x26, x27, [sp, #16 * 13]
 	stp	x28, x29, [sp, #16 * 14]
 
-	// Add the exception link register (ELR_EL1) and the saved program status (SPSR_EL1).
+	// Add the exception link register (ELR_EL1), saved program status (SPSR_EL1) and exception
+	// syndrome register (ESR_EL1).
 	mrs	x1,  ELR_EL1
 	mrs	x2,  SPSR_EL1
+	mrs	x3,  ESR_EL1
 
 	stp	lr,  x1,  [sp, #16 * 15]
-	str	x2,       [sp, #16 * 16]
+	stp	x2,  x3,  [sp, #16 * 16]
 
 	// x0 is the first argument for the function called through `\handler`.
 	mov	x0,  sp
diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index f24039031..cf0ba6927 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -911,7 +911,7 @@ diff -uNr 12_integrated_testing/src/_arch/aarch64/exception.rs 13_exceptions_par
  use core::{cell::UnsafeCell, fmt};
  use cortex_a::{asm::barrier, registers::*};
  use tock_registers::{
-@@ -94,8 +95,11 @@
+@@ -91,8 +92,11 @@
  }
 
  #[no_mangle]
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
index d755c51db..880cc92b3 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
@@ -26,9 +26,10 @@ global_asm!(include_str!("exception.s"));
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
-/// Wrapper struct for memory copy of SPSR_EL1.
+/// Wrapper structs for memory copies of registers.
 #[repr(transparent)]
 struct SpsrEL1(InMemoryRegister<u64, SPSR_EL1::Register>);
+struct EsrEL1(InMemoryRegister<u64, ESR_EL1::Register>);
 
 /// The exception context as it is stored on the stack on exception entry.
 #[repr(C)]
@@ -44,25 +45,21 @@ struct ExceptionContext {
 
     /// Saved program status.
     spsr_el1: SpsrEL1,
-}
 
-/// Wrapper struct for pretty printing ESR_EL1.
-struct EsrEL1;
+    // Exception syndrome register.
+    esr_el1: EsrEL1,
+}
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
 /// Prints verbose information about the exception and then panics.
-fn default_exception_handler(e: &ExceptionContext) {
+fn default_exception_handler(exc: &ExceptionContext) {
     panic!(
         "\n\nCPU Exception!\n\
-         FAR_EL1: {:#018x}\n\
-         {}\n\
-         {}",
-        FAR_EL1.get(),
-        EsrEL1 {},
-        e
+        {}",
+        exc
     );
 }
 
@@ -146,33 +143,9 @@ unsafe extern "C" fn lower_aarch32_serror(e: &mut ExceptionContext) {
 }
 
 //------------------------------------------------------------------------------
-// Pretty printing
+// Misc
 //------------------------------------------------------------------------------
 
-/// Human readable ESR_EL1.
-#[rustfmt::skip]
-impl fmt::Display for EsrEL1 {
-    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
-        let esr_el1 = ESR_EL1.extract();
-
-        // Raw print of whole register.
-        writeln!(f, "ESR_EL1: {:#010x}", esr_el1.get())?;
-
-        // Raw print of exception class.
-        write!(f, "      Exception Class         (EC) : {:#x}", esr_el1.read(ESR_EL1::EC))?;
-
-        // Exception class, translation.
-        let ec_translation = match esr_el1.read_as_enum(ESR_EL1::EC) {
-            Some(ESR_EL1::EC::Value::DataAbortCurrentEL) => "Data Abort, current EL",
-            _ => "N/A",
-        };
-        writeln!(f, " - {}", ec_translation)?;
-
-        // Raw print of instruction specific syndrome.
-        write!(f, "      Instr Specific Syndrome (ISS): {:#x}", esr_el1.read(ESR_EL1::ISS))
-    }
-}
-
 /// Human readable SPSR_EL1.
 #[rustfmt::skip]
 impl fmt::Display for SpsrEL1 {
@@ -206,11 +179,72 @@ impl fmt::Display for SpsrEL1 {
     }
 }
 
+impl EsrEL1 {
+    #[inline(always)]
+    fn exception_class(&self) -> Option<ESR_EL1::EC::Value> {
+        self.0.read_as_enum(ESR_EL1::EC)
+    }
+}
+
+/// Human readable ESR_EL1.
+#[rustfmt::skip]
+impl fmt::Display for EsrEL1 {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        // Raw print of whole register.
+        writeln!(f, "ESR_EL1: {:#010x}", self.0.get())?;
+
+        // Raw print of exception class.
+        write!(f, "      Exception Class         (EC) : {:#x}", self.0.read(ESR_EL1::EC))?;
+
+        // Exception class.
+        let ec_translation = match self.exception_class() {
+            Some(ESR_EL1::EC::Value::DataAbortCurrentEL) => "Data Abort, current EL",
+            _ => "N/A",
+        };
+        writeln!(f, " - {}", ec_translation)?;
+
+        // Raw print of instruction specific syndrome.
+        write!(f, "      Instr Specific Syndrome (ISS): {:#x}", self.0.read(ESR_EL1::ISS))
+    }
+}
+
+impl ExceptionContext {
+    #[inline(always)]
+    fn exception_class(&self) -> Option<ESR_EL1::EC::Value> {
+        self.esr_el1.exception_class()
+    }
+
+    #[inline(always)]
+    fn fault_address_valid(&self) -> bool {
+        use ESR_EL1::EC::Value::*;
+
+        match self.exception_class() {
+            None => false,
+            Some(ec) => matches!(
+                ec,
+                InstrAbortLowerEL
+                    | InstrAbortCurrentEL
+                    | PCAlignmentFault
+                    | DataAbortLowerEL
+                    | DataAbortCurrentEL
+                    | WatchpointLowerEL
+                    | WatchpointCurrentEL
+            ),
+        }
+    }
+}
+
 /// Human readable print of the exception context.
 impl fmt::Display for ExceptionContext {
     fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
-        writeln!(f, "ELR_EL1: {:#018x}", self.elr_el1)?;
+        writeln!(f, "{}", self.esr_el1)?;
+
+        if self.fault_address_valid() {
+            writeln!(f, "FAR_EL1: {:#018x}", FAR_EL1.get() as usize)?;
+        }
+
         writeln!(f, "{}", self.spsr_el1)?;
+        writeln!(f, "ELR_EL1: {:#018x}", self.elr_el1)?;
         writeln!(f)?;
         writeln!(f, "General purpose register:")?;
 
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.s b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.s
index ffb1875ce..cb6bfb150 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.s
+++ b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.s
@@ -29,12 +29,14 @@
 	stp	x26, x27, [sp, #16 * 13]
 	stp	x28, x29, [sp, #16 * 14]
 
-	// Add the exception link register (ELR_EL1) and the saved program status (SPSR_EL1).
+	// Add the exception link register (ELR_EL1), saved program status (SPSR_EL1) and exception
+	// syndrome register (ESR_EL1).
 	mrs	x1,  ELR_EL1
 	mrs	x2,  SPSR_EL1
+	mrs	x3,  ESR_EL1
 
 	stp	lr,  x1,  [sp, #16 * 15]
-	str	x2,       [sp, #16 * 16]
+	stp	x2,  x3,  [sp, #16 * 16]
 
 	// x0 is the first argument for the function called through `\handler`.
 	mov	x0,  sp
diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index dad01e706..9d861bf6c 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -279,10 +279,6 @@ through them:
 - [`src/bsp/raspberrypi/memory.rs`](src/bsp/raspberrypi/memory.rs) and
   [`src/bsp/raspberrypi/link.ld`](src/bsp/raspberrypi/link.ld) changed the location of the boot
   core's stack. It is now located after the data segment, and separated by an unmapped `guard page`.
-  There is also supporting code in
-  [`src/_arch/aarch64/exception.rs`](src/_arch/aarch64/exception.rs) that runs on data aborts and
-  checks if the fault address lies within the `stack guard page`. This can be an indication that a
-  kernel stack overflow happened.
 - [`src/memory/mmu/types.rs`](src/memory/mmu/types.rs) introduces a couple of supporting types, like
   `Page<ATYPE>`.
 - [`src/memory/mmu/mapping_record.rs`](src/memory/mmu/mapping_record.rs) provides the generic kernel
@@ -383,55 +379,6 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/Cargo.toml 14_virtual_mem_part2_mm
  edition = "2021"
 
 
-diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
---- 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
-+++ 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
-@@ -11,7 +11,11 @@
- //!
- //! crate::exception::arch_exception
-
--use crate::{bsp, exception};
-+use crate::{
-+    bsp::{self},
-+    exception,
-+    memory::Address,
-+};
- use core::{cell::UnsafeCell, fmt};
- use cortex_a::{asm::barrier, registers::*};
- use tock_registers::{
-@@ -53,6 +57,20 @@
- // Private Code
- //--------------------------------------------------------------------------------------------------
-
-+/// Check if additional context can be derived from a data abort.
-+fn inspect_data_abort(f: &mut fmt::Formatter) -> fmt::Result {
-+    let fault_addr = Address::new(FAR_EL1.get() as usize);
-+
-+    if bsp::memory::mmu::virt_boot_core_stack_guard_page_desc().contains(fault_addr) {
-+        writeln!(
-+            f,
-+            "\n\n      >> Attempted to access the guard page of the kernel's boot core stack <<"
-+        )?;
-+    }
-+
-+    Ok(())
-+}
-+
- /// Prints verbose information about the exception and then panics.
- fn default_exception_handler(e: &ExceptionContext) {
-     panic!(
-@@ -169,7 +187,9 @@
-         writeln!(f, " - {}", ec_translation)?;
-
-         // Raw print of instruction specific syndrome.
--        write!(f, "      Instr Specific Syndrome (ISS): {:#x}", esr_el1.read(ESR_EL1::ISS))
-+        write!(f, "      Instr Specific Syndrome (ISS): {:#x}", esr_el1.read(ESR_EL1::ISS))?;
-+
-+        inspect_data_abort(f)
-     }
- }
-
-
 diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
 --- 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs
 +++ 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -1495,7 +1442,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld 14_vir
      .data : { *(.data*) } :segment_rw
 
      /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
-@@ -54,4 +50,23 @@
+@@ -54,4 +50,21 @@
          . = ALIGN(16);
          __bss_end_exclusive = .;
      } :NONE
@@ -1506,9 +1453,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld 14_vir
 +    /***********************************************************************************************
 +    * Guard Page between boot core stack and data
 +    ***********************************************************************************************/
-+    __boot_core_stack_guard_page_start = .;
 +    . += 64K;
-+    __boot_core_stack_guard_page_end_exclusive = .;
 +
 +    /***********************************************************************************************
 +    * Boot Core Stack
@@ -1523,7 +1468,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld 14_vir
 diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
 --- 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +++ 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
-@@ -4,70 +4,164 @@
+@@ -4,70 +4,157 @@
 
  //! BSP Memory Management Unit.
 
@@ -1559,16 +1504,16 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +/// The translation granule chosen by this BSP. This will be used everywhere else in the kernel to
 +/// derive respective data structures and their sizes. For example, the `crate::memory::mmu::Page`.
 +pub type KernelGranule = TranslationGranule<{ 64 * 1024 }>;
-
--const NUM_MEM_RANGES: usize = 2;
++
 +/// The kernel's virtual address space defined by this BSP.
 +pub type KernelVirtAddrSpace = AddressSpace<{ 8 * 1024 * 1024 * 1024 }>;
 
--/// The virtual memory layout.
+-const NUM_MEM_RANGES: usize = 2;
 +//--------------------------------------------------------------------------------------------------
 +// Global instances
 +//--------------------------------------------------------------------------------------------------
-+
+
+-/// The virtual memory layout.
 +/// The kernel translation tables.
  ///
 -/// The layout must contain only special ranges, aka anything that is _not_ normal cacheable DRAM.
@@ -1647,15 +1592,15 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +/// The Read+Execute (RX) pages of the kernel binary.
 +fn phys_rx_page_desc() -> PageSliceDescriptor<Physical> {
 +    virt_rx_page_desc().into()
-+}
-+
-+/// The Read+Write (RW) pages of the kernel binary.
-+fn phys_rw_page_desc() -> PageSliceDescriptor<Physical> {
-+    virt_rw_page_desc().into()
  }
 
 -fn mmio_range_inclusive() -> RangeInclusive<usize> {
 -    RangeInclusive::new(memory_map::mmio::START, memory_map::mmio::END_INCLUSIVE)
++/// The Read+Write (RW) pages of the kernel binary.
++fn phys_rw_page_desc() -> PageSliceDescriptor<Physical> {
++    virt_rw_page_desc().into()
++}
++
 +/// The boot core's stack.
 +fn phys_boot_core_stack_page_desc() -> PageSliceDescriptor<Physical> {
 +    virt_boot_core_stack_page_desc().into()
@@ -1673,13 +1618,6 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +    &KERNEL_TABLES
 +}
 +
-+/// The boot core's stack guard page.
-+pub fn virt_boot_core_stack_guard_page_desc() -> PageSliceDescriptor<Virtual> {
-+    let num_pages = size_to_num_pages(super::boot_core_stack_guard_page_size());
-+
-+    PageSliceDescriptor::from_addr(super::virt_boot_core_stack_guard_page_start(), num_pages)
-+}
-+
 +/// Pointer to the last page of the physical address space.
 +pub fn phys_addr_space_end_page() -> *const Page<Physical> {
 +    common::align_down(
@@ -1731,7 +1669,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -77,19 +171,24 @@
+@@ -77,19 +164,24 @@
  #[cfg(test)]
  mod tests {
      use super::*;
@@ -1742,6 +1680,10 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
      #[kernel_test]
      fn virt_mem_layout_sections_are_64KiB_aligned() {
 -        const SIXTYFOUR_KIB: usize = 65536;
+-
+-        for i in LAYOUT.inner().iter() {
+-            let start: usize = *(i.virtual_range)().start();
+-            let end: usize = *(i.virtual_range)().end() + 1;
 +        for i in [
 +            virt_rx_page_desc,
 +            virt_rw_page_desc,
@@ -1752,10 +1694,6 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +            let start: usize = i().start_addr().into_usize();
 +            let end: usize = i().end_addr().into_usize();
 
--        for i in LAYOUT.inner().iter() {
--            let start: usize = *(i.virtual_range)().start();
--            let end: usize = *(i.virtual_range)().end() + 1;
--
 -            assert_eq!(start modulo SIXTYFOUR_KIB, 0);
 -            assert_eq!(end modulo SIXTYFOUR_KIB, 0);
 +            assert_eq!(start modulo KernelGranule::SIZE, 0);
@@ -1763,7 +1701,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
              assert!(end >= start);
          }
      }
-@@ -97,18 +196,38 @@
+@@ -97,18 +189,38 @@
      /// Ensure the kernel's virtual memory layout is free of overlaps.
      #[kernel_test]
      fn virt_mem_layout_has_no_overlaps() {
@@ -1953,7 +1891,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 14_v
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -80,16 +120,67 @@
+@@ -80,16 +120,52 @@
  ///
  /// - Value is provided by the linker script and must be trusted as-is.
  #[inline(always)]
@@ -1961,26 +1899,10 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 14_v
 -    unsafe { __rx_start.get() as usize }
 +fn virt_rx_start() -> Address<Virtual> {
 +    Address::new(unsafe { __rx_start.get() as usize })
-+}
-+
-+/// Size of the Read+Execute (RX) range.
-+///
-+/// # Safety
-+///
-+/// - Value is provided by the linker script and must be trusted as-is.
-+#[inline(always)]
-+fn rx_size() -> usize {
-+    unsafe { (__rx_end_exclusive.get() as usize) - (__rx_start.get() as usize) }
  }
 
 -/// Exclusive end address of the Read+Execute (RX) range.
-+/// Start address of the Read+Write (RW) range.
-+#[inline(always)]
-+fn virt_rw_start() -> Address<Virtual> {
-+    Address::new(unsafe { __rw_start.get() as usize })
-+}
-+
-+/// Size of the Read+Write (RW) range.
++/// Size of the Read+Execute (RX) range.
  ///
  /// # Safety
  ///
@@ -1988,6 +1910,22 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 14_v
  #[inline(always)]
 -fn rx_end_exclusive() -> usize {
 -    unsafe { __rx_end_exclusive.get() as usize }
++fn rx_size() -> usize {
++    unsafe { (__rx_end_exclusive.get() as usize) - (__rx_start.get() as usize) }
++}
++
++/// Start address of the Read+Write (RW) range.
++#[inline(always)]
++fn virt_rw_start() -> Address<Virtual> {
++    Address::new(unsafe { __rw_start.get() as usize })
++}
++
++/// Size of the Read+Write (RW) range.
++///
++/// # Safety
++///
++/// - Value is provided by the linker script and must be trusted as-is.
++#[inline(always)]
 +fn rw_size() -> usize {
 +    unsafe { (__rw_end_exclusive.get() as usize) - (__rw_start.get() as usize) }
 +}
@@ -2006,21 +1944,6 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 14_v
 +    }
 +}
 +
-+/// Start address of the boot core's stack guard page.
-+#[inline(always)]
-+fn virt_boot_core_stack_guard_page_start() -> Address<Virtual> {
-+    Address::new(unsafe { __boot_core_stack_guard_page_start.get() as usize })
-+}
-+
-+/// Size of the boot core's stack guard page.
-+#[inline(always)]
-+fn boot_core_stack_guard_page_size() -> usize {
-+    unsafe {
-+        (__boot_core_stack_guard_page_end_exclusive.get() as usize)
-+            - (__boot_core_stack_guard_page_start.get() as usize)
-+    }
-+}
-+
 +/// Exclusive end address of the physical address space.
 +#[inline(always)]
 +fn phys_addr_space_end() -> Address<Physical> {
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
index 1aac65454..880cc92b3 100644
--- a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
@@ -11,11 +11,7 @@
 //!
 //! crate::exception::arch_exception
 
-use crate::{
-    bsp::{self},
-    exception,
-    memory::Address,
-};
+use crate::{bsp, exception};
 use core::{cell::UnsafeCell, fmt};
 use cortex_a::{asm::barrier, registers::*};
 use tock_registers::{
@@ -30,9 +26,10 @@ global_asm!(include_str!("exception.s"));
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
-/// Wrapper struct for memory copy of SPSR_EL1.
+/// Wrapper structs for memory copies of registers.
 #[repr(transparent)]
 struct SpsrEL1(InMemoryRegister<u64, SPSR_EL1::Register>);
+struct EsrEL1(InMemoryRegister<u64, ESR_EL1::Register>);
 
 /// The exception context as it is stored on the stack on exception entry.
 #[repr(C)]
@@ -48,39 +45,21 @@ struct ExceptionContext {
 
     /// Saved program status.
     spsr_el1: SpsrEL1,
-}
 
-/// Wrapper struct for pretty printing ESR_EL1.
-struct EsrEL1;
+    // Exception syndrome register.
+    esr_el1: EsrEL1,
+}
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-/// Check if additional context can be derived from a data abort.
-fn inspect_data_abort(f: &mut fmt::Formatter) -> fmt::Result {
-    let fault_addr = Address::new(FAR_EL1.get() as usize);
-
-    if bsp::memory::mmu::virt_boot_core_stack_guard_page_desc().contains(fault_addr) {
-        writeln!(
-            f,
-            "\n\n      >> Attempted to access the guard page of the kernel's boot core stack <<"
-        )?;
-    }
-
-    Ok(())
-}
-
 /// Prints verbose information about the exception and then panics.
-fn default_exception_handler(e: &ExceptionContext) {
+fn default_exception_handler(exc: &ExceptionContext) {
     panic!(
         "\n\nCPU Exception!\n\
-         FAR_EL1: {:#018x}\n\
-         {}\n\
-         {}",
-        FAR_EL1.get(),
-        EsrEL1 {},
-        e
+        {}",
+        exc
     );
 }
 
@@ -164,35 +143,9 @@ unsafe extern "C" fn lower_aarch32_serror(e: &mut ExceptionContext) {
 }
 
 //------------------------------------------------------------------------------
-// Pretty printing
+// Misc
 //------------------------------------------------------------------------------
 
-/// Human readable ESR_EL1.
-#[rustfmt::skip]
-impl fmt::Display for EsrEL1 {
-    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
-        let esr_el1 = ESR_EL1.extract();
-
-        // Raw print of whole register.
-        writeln!(f, "ESR_EL1: {:#010x}", esr_el1.get())?;
-
-        // Raw print of exception class.
-        write!(f, "      Exception Class         (EC) : {:#x}", esr_el1.read(ESR_EL1::EC))?;
-
-        // Exception class, translation.
-        let ec_translation = match esr_el1.read_as_enum(ESR_EL1::EC) {
-            Some(ESR_EL1::EC::Value::DataAbortCurrentEL) => "Data Abort, current EL",
-            _ => "N/A",
-        };
-        writeln!(f, " - {}", ec_translation)?;
-
-        // Raw print of instruction specific syndrome.
-        write!(f, "      Instr Specific Syndrome (ISS): {:#x}", esr_el1.read(ESR_EL1::ISS))?;
-
-        inspect_data_abort(f)
-    }
-}
-
 /// Human readable SPSR_EL1.
 #[rustfmt::skip]
 impl fmt::Display for SpsrEL1 {
@@ -226,11 +179,72 @@ impl fmt::Display for SpsrEL1 {
     }
 }
 
+impl EsrEL1 {
+    #[inline(always)]
+    fn exception_class(&self) -> Option<ESR_EL1::EC::Value> {
+        self.0.read_as_enum(ESR_EL1::EC)
+    }
+}
+
+/// Human readable ESR_EL1.
+#[rustfmt::skip]
+impl fmt::Display for EsrEL1 {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        // Raw print of whole register.
+        writeln!(f, "ESR_EL1: {:#010x}", self.0.get())?;
+
+        // Raw print of exception class.
+        write!(f, "      Exception Class         (EC) : {:#x}", self.0.read(ESR_EL1::EC))?;
+
+        // Exception class.
+        let ec_translation = match self.exception_class() {
+            Some(ESR_EL1::EC::Value::DataAbortCurrentEL) => "Data Abort, current EL",
+            _ => "N/A",
+        };
+        writeln!(f, " - {}", ec_translation)?;
+
+        // Raw print of instruction specific syndrome.
+        write!(f, "      Instr Specific Syndrome (ISS): {:#x}", self.0.read(ESR_EL1::ISS))
+    }
+}
+
+impl ExceptionContext {
+    #[inline(always)]
+    fn exception_class(&self) -> Option<ESR_EL1::EC::Value> {
+        self.esr_el1.exception_class()
+    }
+
+    #[inline(always)]
+    fn fault_address_valid(&self) -> bool {
+        use ESR_EL1::EC::Value::*;
+
+        match self.exception_class() {
+            None => false,
+            Some(ec) => matches!(
+                ec,
+                InstrAbortLowerEL
+                    | InstrAbortCurrentEL
+                    | PCAlignmentFault
+                    | DataAbortLowerEL
+                    | DataAbortCurrentEL
+                    | WatchpointLowerEL
+                    | WatchpointCurrentEL
+            ),
+        }
+    }
+}
+
 /// Human readable print of the exception context.
 impl fmt::Display for ExceptionContext {
     fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
-        writeln!(f, "ELR_EL1: {:#018x}", self.elr_el1)?;
+        writeln!(f, "{}", self.esr_el1)?;
+
+        if self.fault_address_valid() {
+            writeln!(f, "FAR_EL1: {:#018x}", FAR_EL1.get() as usize)?;
+        }
+
         writeln!(f, "{}", self.spsr_el1)?;
+        writeln!(f, "ELR_EL1: {:#018x}", self.elr_el1)?;
         writeln!(f)?;
         writeln!(f, "General purpose register:")?;
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.s b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.s
index ffb1875ce..cb6bfb150 100644
--- a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.s
+++ b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.s
@@ -29,12 +29,14 @@
 	stp	x26, x27, [sp, #16 * 13]
 	stp	x28, x29, [sp, #16 * 14]
 
-	// Add the exception link register (ELR_EL1) and the saved program status (SPSR_EL1).
+	// Add the exception link register (ELR_EL1), saved program status (SPSR_EL1) and exception
+	// syndrome register (ESR_EL1).
 	mrs	x1,  ELR_EL1
 	mrs	x2,  SPSR_EL1
+	mrs	x3,  ESR_EL1
 
 	stp	lr,  x1,  [sp, #16 * 15]
-	str	x2,       [sp, #16 * 16]
+	stp	x2,  x3,  [sp, #16 * 16]
 
 	// x0 is the first argument for the function called through `\handler`.
 	mov	x0,  sp
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
index 698ad85da..bdab23fc6 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
@@ -57,9 +57,7 @@ SECTIONS
     /***********************************************************************************************
     * Guard Page between boot core stack and data
     ***********************************************************************************************/
-    __boot_core_stack_guard_page_start = .;
     . += 64K;
-    __boot_core_stack_guard_page_end_exclusive = .;
 
     /***********************************************************************************************
     * Boot Core Stack
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
index e51b00fa1..2675633a7 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
@@ -164,21 +164,6 @@ fn boot_core_stack_size() -> usize {
     }
 }
 
-/// Start address of the boot core's stack guard page.
-#[inline(always)]
-fn virt_boot_core_stack_guard_page_start() -> Address<Virtual> {
-    Address::new(unsafe { __boot_core_stack_guard_page_start.get() as usize })
-}
-
-/// Size of the boot core's stack guard page.
-#[inline(always)]
-fn boot_core_stack_guard_page_size() -> usize {
-    unsafe {
-        (__boot_core_stack_guard_page_end_exclusive.get() as usize)
-            - (__boot_core_stack_guard_page_start.get() as usize)
-    }
-}
-
 /// Exclusive end address of the physical address space.
 #[inline(always)]
 fn phys_addr_space_end() -> Address<Physical> {
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
index 813fa0b4d..5bd2fdbdb 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
@@ -107,13 +107,6 @@ pub fn kernel_translation_tables() -> &'static InitStateLock<KernelTranslationTa
     &KERNEL_TABLES
 }
 
-/// The boot core's stack guard page.
-pub fn virt_boot_core_stack_guard_page_desc() -> PageSliceDescriptor<Virtual> {
-    let num_pages = size_to_num_pages(super::boot_core_stack_guard_page_size());
-
-    PageSliceDescriptor::from_addr(super::virt_boot_core_stack_guard_page_start(), num_pages)
-}
-
 /// Pointer to the last page of the physical address space.
 pub fn phys_addr_space_end_page() -> *const Page<Physical> {
     common::align_down(
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index ee01279eb..c564a1b5e 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -1166,7 +1166,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs 15_v
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -122,13 +144,15 @@
+@@ -115,13 +137,15 @@
      ) as *const Page<_>
  }
 
@@ -1187,7 +1187,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs 15_v
          "Kernel code and RO data",
          &virt_rx_page_desc(),
          &phys_rx_page_desc(),
-@@ -137,9 +161,9 @@
+@@ -130,9 +154,9 @@
              acc_perms: AccessPermissions::ReadOnly,
              execute_never: false,
          },
@@ -1199,7 +1199,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs 15_v
          "Kernel data and bss",
          &virt_rw_page_desc(),
          &phys_rw_page_desc(),
-@@ -148,9 +172,9 @@
+@@ -141,9 +165,9 @@
              acc_perms: AccessPermissions::ReadWrite,
              execute_never: true,
          },
@@ -1211,7 +1211,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs 15_v
          "Kernel boot-core stack",
          &virt_boot_core_stack_page_desc(),
          &phys_boot_core_stack_page_desc(),
-@@ -159,75 +183,5 @@
+@@ -152,75 +176,5 @@
              acc_perms: AccessPermissions::ReadWrite,
              execute_never: true,
          },
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.rs
index 1aac65454..880cc92b3 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.rs
@@ -11,11 +11,7 @@
 //!
 //! crate::exception::arch_exception
 
-use crate::{
-    bsp::{self},
-    exception,
-    memory::Address,
-};
+use crate::{bsp, exception};
 use core::{cell::UnsafeCell, fmt};
 use cortex_a::{asm::barrier, registers::*};
 use tock_registers::{
@@ -30,9 +26,10 @@ global_asm!(include_str!("exception.s"));
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
-/// Wrapper struct for memory copy of SPSR_EL1.
+/// Wrapper structs for memory copies of registers.
 #[repr(transparent)]
 struct SpsrEL1(InMemoryRegister<u64, SPSR_EL1::Register>);
+struct EsrEL1(InMemoryRegister<u64, ESR_EL1::Register>);
 
 /// The exception context as it is stored on the stack on exception entry.
 #[repr(C)]
@@ -48,39 +45,21 @@ struct ExceptionContext {
 
     /// Saved program status.
     spsr_el1: SpsrEL1,
-}
 
-/// Wrapper struct for pretty printing ESR_EL1.
-struct EsrEL1;
+    // Exception syndrome register.
+    esr_el1: EsrEL1,
+}
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-/// Check if additional context can be derived from a data abort.
-fn inspect_data_abort(f: &mut fmt::Formatter) -> fmt::Result {
-    let fault_addr = Address::new(FAR_EL1.get() as usize);
-
-    if bsp::memory::mmu::virt_boot_core_stack_guard_page_desc().contains(fault_addr) {
-        writeln!(
-            f,
-            "\n\n      >> Attempted to access the guard page of the kernel's boot core stack <<"
-        )?;
-    }
-
-    Ok(())
-}
-
 /// Prints verbose information about the exception and then panics.
-fn default_exception_handler(e: &ExceptionContext) {
+fn default_exception_handler(exc: &ExceptionContext) {
     panic!(
         "\n\nCPU Exception!\n\
-         FAR_EL1: {:#018x}\n\
-         {}\n\
-         {}",
-        FAR_EL1.get(),
-        EsrEL1 {},
-        e
+        {}",
+        exc
     );
 }
 
@@ -164,35 +143,9 @@ unsafe extern "C" fn lower_aarch32_serror(e: &mut ExceptionContext) {
 }
 
 //------------------------------------------------------------------------------
-// Pretty printing
+// Misc
 //------------------------------------------------------------------------------
 
-/// Human readable ESR_EL1.
-#[rustfmt::skip]
-impl fmt::Display for EsrEL1 {
-    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
-        let esr_el1 = ESR_EL1.extract();
-
-        // Raw print of whole register.
-        writeln!(f, "ESR_EL1: {:#010x}", esr_el1.get())?;
-
-        // Raw print of exception class.
-        write!(f, "      Exception Class         (EC) : {:#x}", esr_el1.read(ESR_EL1::EC))?;
-
-        // Exception class, translation.
-        let ec_translation = match esr_el1.read_as_enum(ESR_EL1::EC) {
-            Some(ESR_EL1::EC::Value::DataAbortCurrentEL) => "Data Abort, current EL",
-            _ => "N/A",
-        };
-        writeln!(f, " - {}", ec_translation)?;
-
-        // Raw print of instruction specific syndrome.
-        write!(f, "      Instr Specific Syndrome (ISS): {:#x}", esr_el1.read(ESR_EL1::ISS))?;
-
-        inspect_data_abort(f)
-    }
-}
-
 /// Human readable SPSR_EL1.
 #[rustfmt::skip]
 impl fmt::Display for SpsrEL1 {
@@ -226,11 +179,72 @@ impl fmt::Display for SpsrEL1 {
     }
 }
 
+impl EsrEL1 {
+    #[inline(always)]
+    fn exception_class(&self) -> Option<ESR_EL1::EC::Value> {
+        self.0.read_as_enum(ESR_EL1::EC)
+    }
+}
+
+/// Human readable ESR_EL1.
+#[rustfmt::skip]
+impl fmt::Display for EsrEL1 {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        // Raw print of whole register.
+        writeln!(f, "ESR_EL1: {:#010x}", self.0.get())?;
+
+        // Raw print of exception class.
+        write!(f, "      Exception Class         (EC) : {:#x}", self.0.read(ESR_EL1::EC))?;
+
+        // Exception class.
+        let ec_translation = match self.exception_class() {
+            Some(ESR_EL1::EC::Value::DataAbortCurrentEL) => "Data Abort, current EL",
+            _ => "N/A",
+        };
+        writeln!(f, " - {}", ec_translation)?;
+
+        // Raw print of instruction specific syndrome.
+        write!(f, "      Instr Specific Syndrome (ISS): {:#x}", self.0.read(ESR_EL1::ISS))
+    }
+}
+
+impl ExceptionContext {
+    #[inline(always)]
+    fn exception_class(&self) -> Option<ESR_EL1::EC::Value> {
+        self.esr_el1.exception_class()
+    }
+
+    #[inline(always)]
+    fn fault_address_valid(&self) -> bool {
+        use ESR_EL1::EC::Value::*;
+
+        match self.exception_class() {
+            None => false,
+            Some(ec) => matches!(
+                ec,
+                InstrAbortLowerEL
+                    | InstrAbortCurrentEL
+                    | PCAlignmentFault
+                    | DataAbortLowerEL
+                    | DataAbortCurrentEL
+                    | WatchpointLowerEL
+                    | WatchpointCurrentEL
+            ),
+        }
+    }
+}
+
 /// Human readable print of the exception context.
 impl fmt::Display for ExceptionContext {
     fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
-        writeln!(f, "ELR_EL1: {:#018x}", self.elr_el1)?;
+        writeln!(f, "{}", self.esr_el1)?;
+
+        if self.fault_address_valid() {
+            writeln!(f, "FAR_EL1: {:#018x}", FAR_EL1.get() as usize)?;
+        }
+
         writeln!(f, "{}", self.spsr_el1)?;
+        writeln!(f, "ELR_EL1: {:#018x}", self.elr_el1)?;
         writeln!(f)?;
         writeln!(f, "General purpose register:")?;
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.s b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.s
index ffb1875ce..cb6bfb150 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.s
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.s
@@ -29,12 +29,14 @@
 	stp	x26, x27, [sp, #16 * 13]
 	stp	x28, x29, [sp, #16 * 14]
 
-	// Add the exception link register (ELR_EL1) and the saved program status (SPSR_EL1).
+	// Add the exception link register (ELR_EL1), saved program status (SPSR_EL1) and exception
+	// syndrome register (ESR_EL1).
 	mrs	x1,  ELR_EL1
 	mrs	x2,  SPSR_EL1
+	mrs	x3,  ESR_EL1
 
 	stp	lr,  x1,  [sp, #16 * 15]
-	str	x2,       [sp, #16 * 16]
+	stp	x2,  x3,  [sp, #16 * 16]
 
 	// x0 is the first argument for the function called through `\handler`.
 	mov	x0,  sp
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld
index aa127cc01..99ca627bc 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld
@@ -60,9 +60,7 @@ SECTIONS
     /***********************************************************************************************
     * Guard Page between boot core stack and data
     ***********************************************************************************************/
-    __boot_core_stack_guard_page_start = .;
     . += 64K;
-    __boot_core_stack_guard_page_end_exclusive = .;
 
     /***********************************************************************************************
     * Boot Core Stack
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory.rs
index e51b00fa1..2675633a7 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory.rs
@@ -164,21 +164,6 @@ fn boot_core_stack_size() -> usize {
     }
 }
 
-/// Start address of the boot core's stack guard page.
-#[inline(always)]
-fn virt_boot_core_stack_guard_page_start() -> Address<Virtual> {
-    Address::new(unsafe { __boot_core_stack_guard_page_start.get() as usize })
-}
-
-/// Size of the boot core's stack guard page.
-#[inline(always)]
-fn boot_core_stack_guard_page_size() -> usize {
-    unsafe {
-        (__boot_core_stack_guard_page_end_exclusive.get() as usize)
-            - (__boot_core_stack_guard_page_start.get() as usize)
-    }
-}
-
 /// Exclusive end address of the physical address space.
 #[inline(always)]
 fn phys_addr_space_end() -> Address<Physical> {
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs
index 4ff01e436..ab2f60ac7 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs
@@ -129,13 +129,6 @@ pub fn kernel_translation_tables() -> &'static InitStateLock<KernelTranslationTa
     &KERNEL_TABLES
 }
 
-/// The boot core's stack guard page.
-pub fn virt_boot_core_stack_guard_page_desc() -> PageSliceDescriptor<Virtual> {
-    let num_pages = size_to_num_pages(super::boot_core_stack_guard_page_size());
-
-    PageSliceDescriptor::from_addr(super::virt_boot_core_stack_guard_page_start(), num_pages)
-}
-
 /// Pointer to the last page of the physical address space.
 pub fn phys_addr_space_end_page() -> *const Page<Physical> {
     common::align_down(
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.rs
index 1aac65454..880cc92b3 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.rs
@@ -11,11 +11,7 @@
 //!
 //! crate::exception::arch_exception
 
-use crate::{
-    bsp::{self},
-    exception,
-    memory::Address,
-};
+use crate::{bsp, exception};
 use core::{cell::UnsafeCell, fmt};
 use cortex_a::{asm::barrier, registers::*};
 use tock_registers::{
@@ -30,9 +26,10 @@ global_asm!(include_str!("exception.s"));
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
-/// Wrapper struct for memory copy of SPSR_EL1.
+/// Wrapper structs for memory copies of registers.
 #[repr(transparent)]
 struct SpsrEL1(InMemoryRegister<u64, SPSR_EL1::Register>);
+struct EsrEL1(InMemoryRegister<u64, ESR_EL1::Register>);
 
 /// The exception context as it is stored on the stack on exception entry.
 #[repr(C)]
@@ -48,39 +45,21 @@ struct ExceptionContext {
 
     /// Saved program status.
     spsr_el1: SpsrEL1,
-}
 
-/// Wrapper struct for pretty printing ESR_EL1.
-struct EsrEL1;
+    // Exception syndrome register.
+    esr_el1: EsrEL1,
+}
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-/// Check if additional context can be derived from a data abort.
-fn inspect_data_abort(f: &mut fmt::Formatter) -> fmt::Result {
-    let fault_addr = Address::new(FAR_EL1.get() as usize);
-
-    if bsp::memory::mmu::virt_boot_core_stack_guard_page_desc().contains(fault_addr) {
-        writeln!(
-            f,
-            "\n\n      >> Attempted to access the guard page of the kernel's boot core stack <<"
-        )?;
-    }
-
-    Ok(())
-}
-
 /// Prints verbose information about the exception and then panics.
-fn default_exception_handler(e: &ExceptionContext) {
+fn default_exception_handler(exc: &ExceptionContext) {
     panic!(
         "\n\nCPU Exception!\n\
-         FAR_EL1: {:#018x}\n\
-         {}\n\
-         {}",
-        FAR_EL1.get(),
-        EsrEL1 {},
-        e
+        {}",
+        exc
     );
 }
 
@@ -164,35 +143,9 @@ unsafe extern "C" fn lower_aarch32_serror(e: &mut ExceptionContext) {
 }
 
 //------------------------------------------------------------------------------
-// Pretty printing
+// Misc
 //------------------------------------------------------------------------------
 
-/// Human readable ESR_EL1.
-#[rustfmt::skip]
-impl fmt::Display for EsrEL1 {
-    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
-        let esr_el1 = ESR_EL1.extract();
-
-        // Raw print of whole register.
-        writeln!(f, "ESR_EL1: {:#010x}", esr_el1.get())?;
-
-        // Raw print of exception class.
-        write!(f, "      Exception Class         (EC) : {:#x}", esr_el1.read(ESR_EL1::EC))?;
-
-        // Exception class, translation.
-        let ec_translation = match esr_el1.read_as_enum(ESR_EL1::EC) {
-            Some(ESR_EL1::EC::Value::DataAbortCurrentEL) => "Data Abort, current EL",
-            _ => "N/A",
-        };
-        writeln!(f, " - {}", ec_translation)?;
-
-        // Raw print of instruction specific syndrome.
-        write!(f, "      Instr Specific Syndrome (ISS): {:#x}", esr_el1.read(ESR_EL1::ISS))?;
-
-        inspect_data_abort(f)
-    }
-}
-
 /// Human readable SPSR_EL1.
 #[rustfmt::skip]
 impl fmt::Display for SpsrEL1 {
@@ -226,11 +179,72 @@ impl fmt::Display for SpsrEL1 {
     }
 }
 
+impl EsrEL1 {
+    #[inline(always)]
+    fn exception_class(&self) -> Option<ESR_EL1::EC::Value> {
+        self.0.read_as_enum(ESR_EL1::EC)
+    }
+}
+
+/// Human readable ESR_EL1.
+#[rustfmt::skip]
+impl fmt::Display for EsrEL1 {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        // Raw print of whole register.
+        writeln!(f, "ESR_EL1: {:#010x}", self.0.get())?;
+
+        // Raw print of exception class.
+        write!(f, "      Exception Class         (EC) : {:#x}", self.0.read(ESR_EL1::EC))?;
+
+        // Exception class.
+        let ec_translation = match self.exception_class() {
+            Some(ESR_EL1::EC::Value::DataAbortCurrentEL) => "Data Abort, current EL",
+            _ => "N/A",
+        };
+        writeln!(f, " - {}", ec_translation)?;
+
+        // Raw print of instruction specific syndrome.
+        write!(f, "      Instr Specific Syndrome (ISS): {:#x}", self.0.read(ESR_EL1::ISS))
+    }
+}
+
+impl ExceptionContext {
+    #[inline(always)]
+    fn exception_class(&self) -> Option<ESR_EL1::EC::Value> {
+        self.esr_el1.exception_class()
+    }
+
+    #[inline(always)]
+    fn fault_address_valid(&self) -> bool {
+        use ESR_EL1::EC::Value::*;
+
+        match self.exception_class() {
+            None => false,
+            Some(ec) => matches!(
+                ec,
+                InstrAbortLowerEL
+                    | InstrAbortCurrentEL
+                    | PCAlignmentFault
+                    | DataAbortLowerEL
+                    | DataAbortCurrentEL
+                    | WatchpointLowerEL
+                    | WatchpointCurrentEL
+            ),
+        }
+    }
+}
+
 /// Human readable print of the exception context.
 impl fmt::Display for ExceptionContext {
     fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
-        writeln!(f, "ELR_EL1: {:#018x}", self.elr_el1)?;
+        writeln!(f, "{}", self.esr_el1)?;
+
+        if self.fault_address_valid() {
+            writeln!(f, "FAR_EL1: {:#018x}", FAR_EL1.get() as usize)?;
+        }
+
         writeln!(f, "{}", self.spsr_el1)?;
+        writeln!(f, "ELR_EL1: {:#018x}", self.elr_el1)?;
         writeln!(f)?;
         writeln!(f, "General purpose register:")?;
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.s b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.s
index ffb1875ce..cb6bfb150 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.s
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.s
@@ -29,12 +29,14 @@
 	stp	x26, x27, [sp, #16 * 13]
 	stp	x28, x29, [sp, #16 * 14]
 
-	// Add the exception link register (ELR_EL1) and the saved program status (SPSR_EL1).
+	// Add the exception link register (ELR_EL1), saved program status (SPSR_EL1) and exception
+	// syndrome register (ESR_EL1).
 	mrs	x1,  ELR_EL1
 	mrs	x2,  SPSR_EL1
+	mrs	x3,  ESR_EL1
 
 	stp	lr,  x1,  [sp, #16 * 15]
-	str	x2,       [sp, #16 * 16]
+	stp	x2,  x3,  [sp, #16 * 16]
 
 	// x0 is the first argument for the function called through `\handler`.
 	mov	x0,  sp
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/link.ld b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/link.ld
index a3179f1a3..f12fa29fb 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/link.ld
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/link.ld
@@ -70,9 +70,7 @@ SECTIONS
     /***********************************************************************************************
     * Guard Page between boot core stack and data
     ***********************************************************************************************/
-    __boot_core_stack_guard_page_start = .;
     . += 64K;
-    __boot_core_stack_guard_page_end_exclusive = .;
 
     /***********************************************************************************************
     * Boot Core Stack
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory.rs
index e51b00fa1..2675633a7 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory.rs
@@ -164,21 +164,6 @@ fn boot_core_stack_size() -> usize {
     }
 }
 
-/// Start address of the boot core's stack guard page.
-#[inline(always)]
-fn virt_boot_core_stack_guard_page_start() -> Address<Virtual> {
-    Address::new(unsafe { __boot_core_stack_guard_page_start.get() as usize })
-}
-
-/// Size of the boot core's stack guard page.
-#[inline(always)]
-fn boot_core_stack_guard_page_size() -> usize {
-    unsafe {
-        (__boot_core_stack_guard_page_end_exclusive.get() as usize)
-            - (__boot_core_stack_guard_page_start.get() as usize)
-    }
-}
-
 /// Exclusive end address of the physical address space.
 #[inline(always)]
 fn phys_addr_space_end() -> Address<Physical> {
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs
index dbb970208..34d220f0b 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs
@@ -129,13 +129,6 @@ pub fn kernel_translation_tables() -> &'static InitStateLock<KernelTranslationTa
     &KERNEL_TABLES
 }
 
-/// The boot core's stack guard page.
-pub fn virt_boot_core_stack_guard_page_desc() -> PageSliceDescriptor<Virtual> {
-    let num_pages = size_to_num_pages(super::boot_core_stack_guard_page_size());
-
-    PageSliceDescriptor::from_addr(super::virt_boot_core_stack_guard_page_start(), num_pages)
-}
-
 /// Pointer to the last page of the physical address space.
 pub fn phys_addr_space_end_page() -> *const Page<Physical> {
     common::align_down(

From b1c438dc6693431885e597890daeb5536a991e0b Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sun, 31 Oct 2021 20:10:45 +0100
Subject: [PATCH 095/214] Remove unused external symbols

---
 14_virtual_mem_part2_mmio_remap/README.md     | 45 +++++++++----------
 .../src/bsp/raspberrypi/memory.rs             |  3 --
 .../src/bsp/raspberrypi/memory.rs             |  3 --
 .../src/bsp/raspberrypi/memory.rs             |  3 --
 4 files changed, 21 insertions(+), 33 deletions(-)

diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index 9d861bf6c..896711632 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -1796,7 +1796,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 14_v
  use core::cell::UnsafeCell;
 
  //--------------------------------------------------------------------------------------------------
-@@ -16,6 +47,15 @@
+@@ -16,6 +47,12 @@
  extern "Rust" {
      static __rx_start: UnsafeCell<()>;
      static __rx_end_exclusive: UnsafeCell<()>;
@@ -1806,13 +1806,10 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 14_v
 +
 +    static __boot_core_stack_start: UnsafeCell<()>;
 +    static __boot_core_stack_end_exclusive: UnsafeCell<()>;
-+
-+    static __boot_core_stack_guard_page_start: UnsafeCell<()>;
-+    static __boot_core_stack_guard_page_end_exclusive: UnsafeCell<()>;
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -25,35 +65,26 @@
+@@ -25,35 +62,26 @@
  /// The board's physical memory map.
  #[rustfmt::skip]
  pub(super) mod map {
@@ -1862,7 +1859,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 14_v
      }
 
      /// Physical devices.
-@@ -61,13 +92,22 @@
+@@ -61,13 +89,22 @@
      pub mod mmio {
          use super::*;
 
@@ -1891,7 +1888,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 14_v
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -80,16 +120,52 @@
+@@ -80,16 +117,52 @@
  ///
  /// - Value is provided by the linker script and must be trusted as-is.
  #[inline(always)]
@@ -1899,17 +1896,14 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 14_v
 -    unsafe { __rx_start.get() as usize }
 +fn virt_rx_start() -> Address<Virtual> {
 +    Address::new(unsafe { __rx_start.get() as usize })
- }
-
--/// Exclusive end address of the Read+Execute (RX) range.
++}
++
 +/// Size of the Read+Execute (RX) range.
- ///
- /// # Safety
- ///
- /// - Value is provided by the linker script and must be trusted as-is.
- #[inline(always)]
--fn rx_end_exclusive() -> usize {
--    unsafe { __rx_end_exclusive.get() as usize }
++///
++/// # Safety
++///
++/// - Value is provided by the linker script and must be trusted as-is.
++#[inline(always)]
 +fn rx_size() -> usize {
 +    unsafe { (__rx_end_exclusive.get() as usize) - (__rx_start.get() as usize) }
 +}
@@ -1918,14 +1912,17 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 14_v
 +#[inline(always)]
 +fn virt_rw_start() -> Address<Virtual> {
 +    Address::new(unsafe { __rw_start.get() as usize })
-+}
-+
+ }
+
+-/// Exclusive end address of the Read+Execute (RX) range.
 +/// Size of the Read+Write (RW) range.
-+///
-+/// # Safety
-+///
-+/// - Value is provided by the linker script and must be trusted as-is.
-+#[inline(always)]
+ ///
+ /// # Safety
+ ///
+ /// - Value is provided by the linker script and must be trusted as-is.
+ #[inline(always)]
+-fn rx_end_exclusive() -> usize {
+-    unsafe { __rx_end_exclusive.get() as usize }
 +fn rw_size() -> usize {
 +    unsafe { (__rw_end_exclusive.get() as usize) - (__rw_start.get() as usize) }
 +}
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
index 2675633a7..88dcaf58a 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
@@ -53,9 +53,6 @@ extern "Rust" {
 
     static __boot_core_stack_start: UnsafeCell<()>;
     static __boot_core_stack_end_exclusive: UnsafeCell<()>;
-
-    static __boot_core_stack_guard_page_start: UnsafeCell<()>;
-    static __boot_core_stack_guard_page_end_exclusive: UnsafeCell<()>;
 }
 
 //--------------------------------------------------------------------------------------------------
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory.rs
index 2675633a7..88dcaf58a 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory.rs
@@ -53,9 +53,6 @@ extern "Rust" {
 
     static __boot_core_stack_start: UnsafeCell<()>;
     static __boot_core_stack_end_exclusive: UnsafeCell<()>;
-
-    static __boot_core_stack_guard_page_start: UnsafeCell<()>;
-    static __boot_core_stack_guard_page_end_exclusive: UnsafeCell<()>;
 }
 
 //--------------------------------------------------------------------------------------------------
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory.rs
index 2675633a7..88dcaf58a 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory.rs
@@ -53,9 +53,6 @@ extern "Rust" {
 
     static __boot_core_stack_start: UnsafeCell<()>;
     static __boot_core_stack_end_exclusive: UnsafeCell<()>;
-
-    static __boot_core_stack_guard_page_start: UnsafeCell<()>;
-    static __boot_core_stack_guard_page_end_exclusive: UnsafeCell<()>;
 }
 
 //--------------------------------------------------------------------------------------------------

From 02937e8033bdf078abc840487dbacdd6afeed3a6 Mon Sep 17 00:00:00 2001
From: lightning1141 <lightning1141@gmail.com>
Date: Mon, 8 Nov 2021 16:01:37 +0800
Subject: [PATCH 096/214] docs: Remove pl011_uart duplicate comments.

---
 05_drivers_gpio_uart/README.md                     |  8 +-------
 .../bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs    |  6 ------
 06_uart_chainloader/README.md                      |  6 +++---
 .../bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs    |  6 ------
 07_timestamps/README.md                            |  6 +++---
 .../bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs    |  6 ------
 .../bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs    |  6 ------
 .../bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs    |  6 ------
 .../bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs    |  6 ------
 .../bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs    |  6 ------
 .../bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs    |  6 ------
 13_exceptions_part2_peripheral_IRQs/README.md      | 14 +++++++-------
 .../bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs    |  6 ------
 14_virtual_mem_part2_mmio_remap/README.md          | 12 ++++++------
 .../bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs    |  6 ------
 .../bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs    |  6 ------
 .../bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs    |  6 ------
 .../bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs    |  6 ------
 18 files changed, 20 insertions(+), 104 deletions(-)

diff --git a/05_drivers_gpio_uart/README.md b/05_drivers_gpio_uart/README.md
index 8eb7fda1c..cbfd06fe2 100644
--- a/05_drivers_gpio_uart/README.md
+++ b/05_drivers_gpio_uart/README.md
@@ -459,7 +459,7 @@ diff -uNr 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 05_drivers_g
 diff -uNr 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 --- 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 +++ 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
-@@ -0,0 +1,408 @@
+@@ -0,0 +1,402 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -512,12 +512,6 @@ diff -uNr 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 05_dri
 +        /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
 +        /// LCR_H Register.
 +        ///
-+        /// If the FIFO is disabled, this bit is set when the receive holding register is empty. If
-+        /// the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
-+
-+        /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-+        /// LCR_H Register.
-+        ///
 +        /// - If the FIFO is disabled, this bit is set when the receive holding register is empty.
 +        /// - If the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
 +        RXFE OFFSET(4) NUMBITS(1) [],
diff --git a/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 70b3839e8..b290524ca 100644
--- a/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -47,12 +47,6 @@ register_bitfields! {
         /// - If the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
         TXFF OFFSET(5) NUMBITS(1) [],
 
-        /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-        /// LCR_H Register.
-        ///
-        /// If the FIFO is disabled, this bit is set when the receive holding register is empty. If
-        /// the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
-
         /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
         /// LCR_H Register.
         ///
diff --git a/06_uart_chainloader/README.md b/06_uart_chainloader/README.md
index 9cb8f4268..baeb9236c 100644
--- a/06_uart_chainloader/README.md
+++ b/06_uart_chainloader/README.md
@@ -339,7 +339,7 @@ diff -uNr 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 06_uart
 diff -uNr 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 --- 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 +++ 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
-@@ -284,7 +284,7 @@
+@@ -278,7 +278,7 @@
      }
 
      /// Retrieve a character.
@@ -348,7 +348,7 @@ diff -uNr 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 0
          // If RX FIFO is empty,
          if self.registers.FR.matches_all(FR::RXFE::SET) {
              // immediately return in non-blocking mode.
-@@ -299,12 +299,7 @@
+@@ -293,12 +293,7 @@
          }
 
          // Read one character.
@@ -362,7 +362,7 @@ diff -uNr 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 0
 
          // Update statistics.
          self.chars_read += 1;
-@@ -384,14 +379,14 @@
+@@ -378,14 +373,14 @@
  impl console::interface::Read for PL011Uart {
      fn read_char(&self) -> char {
          self.inner
diff --git a/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 2befbeebe..707d8a687 100644
--- a/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -47,12 +47,6 @@ register_bitfields! {
         /// - If the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
         TXFF OFFSET(5) NUMBITS(1) [],
 
-        /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-        /// LCR_H Register.
-        ///
-        /// If the FIFO is disabled, this bit is set when the receive holding register is empty. If
-        /// the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
-
         /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
         /// LCR_H Register.
         ///
diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index 6d0360a09..f081733bd 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -408,7 +408,7 @@ diff -uNr 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 07_times
 diff -uNr 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 --- 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 +++ 07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
-@@ -284,7 +284,7 @@
+@@ -278,7 +278,7 @@
      }
 
      /// Retrieve a character.
@@ -417,7 +417,7 @@ diff -uNr 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 07
          // If RX FIFO is empty,
          if self.registers.FR.matches_all(FR::RXFE::SET) {
              // immediately return in non-blocking mode.
-@@ -299,7 +299,12 @@
+@@ -293,7 +293,12 @@
          }
 
          // Read one character.
@@ -431,7 +431,7 @@ diff -uNr 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 07
 
          // Update statistics.
          self.chars_read += 1;
-@@ -379,14 +384,14 @@
+@@ -373,14 +378,14 @@
  impl console::interface::Read for PL011Uart {
      fn read_char(&self) -> char {
          self.inner
diff --git a/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 70b3839e8..b290524ca 100644
--- a/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -47,12 +47,6 @@ register_bitfields! {
         /// - If the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
         TXFF OFFSET(5) NUMBITS(1) [],
 
-        /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-        /// LCR_H Register.
-        ///
-        /// If the FIFO is disabled, this bit is set when the receive holding register is empty. If
-        /// the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
-
         /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
         /// LCR_H Register.
         ///
diff --git a/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 70b3839e8..b290524ca 100644
--- a/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -47,12 +47,6 @@ register_bitfields! {
         /// - If the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
         TXFF OFFSET(5) NUMBITS(1) [],
 
-        /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-        /// LCR_H Register.
-        ///
-        /// If the FIFO is disabled, this bit is set when the receive holding register is empty. If
-        /// the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
-
         /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
         /// LCR_H Register.
         ///
diff --git a/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 70b3839e8..b290524ca 100644
--- a/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -47,12 +47,6 @@ register_bitfields! {
         /// - If the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
         TXFF OFFSET(5) NUMBITS(1) [],
 
-        /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-        /// LCR_H Register.
-        ///
-        /// If the FIFO is disabled, this bit is set when the receive holding register is empty. If
-        /// the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
-
         /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
         /// LCR_H Register.
         ///
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 70b3839e8..b290524ca 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -47,12 +47,6 @@ register_bitfields! {
         /// - If the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
         TXFF OFFSET(5) NUMBITS(1) [],
 
-        /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-        /// LCR_H Register.
-        ///
-        /// If the FIFO is disabled, this bit is set when the receive holding register is empty. If
-        /// the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
-
         /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
         /// LCR_H Register.
         ///
diff --git a/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 70b3839e8..b290524ca 100644
--- a/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -47,12 +47,6 @@ register_bitfields! {
         /// - If the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
         TXFF OFFSET(5) NUMBITS(1) [],
 
-        /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-        /// LCR_H Register.
-        ///
-        /// If the FIFO is disabled, this bit is set when the receive holding register is empty. If
-        /// the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
-
         /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
         /// LCR_H Register.
         ///
diff --git a/12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 70b3839e8..b290524ca 100644
--- a/12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -47,12 +47,6 @@ register_bitfields! {
         /// - If the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
         TXFF OFFSET(5) NUMBITS(1) [],
 
-        /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-        /// LCR_H Register.
-        ///
-        /// If the FIFO is disabled, this bit is set when the receive holding register is empty. If
-        /// the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
-
         /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
         /// LCR_H Register.
         ///
diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index cf0ba6927..f1f3f1a7d 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -1867,7 +1867,7 @@ diff -uNr 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
  };
  use core::fmt;
  use tock_registers::{
-@@ -140,6 +140,52 @@
+@@ -134,6 +134,52 @@
          ]
      ],
 
@@ -1920,7 +1920,7 @@ diff -uNr 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
      /// Interrupt Clear Register.
      ICR [
          /// Meta field for all pending interrupts.
-@@ -158,7 +204,10 @@
+@@ -152,7 +198,10 @@
          (0x28 => FBRD: WriteOnly<u32, FBRD::Register>),
          (0x2c => LCR_H: WriteOnly<u32, LCR_H::Register>),
          (0x30 => CR: WriteOnly<u32, CR::Register>),
@@ -1932,7 +1932,7 @@ diff -uNr 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
          (0x44 => ICR: WriteOnly<u32, ICR::Register>),
          (0x48 => @END),
      }
-@@ -188,7 +237,8 @@
+@@ -182,7 +231,8 @@
 
  /// Representation of the UART.
  pub struct PL011Uart {
@@ -1942,7 +1942,7 @@ diff -uNr 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -256,6 +306,14 @@
+@@ -250,6 +300,14 @@
              .LCR_H
              .write(LCR_H::WLEN::EightBit + LCR_H::FEN::FifosEnabled);
 
@@ -1957,7 +1957,7 @@ diff -uNr 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
          // Turn the UART on.
          self.registers
              .CR
-@@ -338,9 +396,13 @@
+@@ -332,9 +390,13 @@
      /// # Safety
      ///
      /// - The user must ensure to provide a correct MMIO start address.
@@ -1973,7 +1973,7 @@ diff -uNr 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
          }
      }
  }
-@@ -360,6 +422,21 @@
+@@ -354,6 +416,21 @@
 
          Ok(())
      }
@@ -1995,7 +1995,7 @@ diff -uNr 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
  }
 
  impl console::interface::Write for PL011Uart {
-@@ -406,3 +483,24 @@
+@@ -400,3 +477,24 @@
          self.inner.lock(|inner| inner.chars_read)
      }
  }
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 11d9745e5..ba8af7982 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -47,12 +47,6 @@ register_bitfields! {
         /// - If the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
         TXFF OFFSET(5) NUMBITS(1) [],
 
-        /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-        /// LCR_H Register.
-        ///
-        /// If the FIFO is disabled, this bit is set when the receive holding register is empty. If
-        /// the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
-
         /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
         /// LCR_H Register.
         ///
diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index 896711632..dda4cc7fd 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -1266,7 +1266,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
  use tock_registers::{
      interfaces::{Readable, Writeable},
      register_bitfields, register_structs,
-@@ -237,6 +240,8 @@
+@@ -231,6 +234,8 @@
 
  /// Representation of the UART.
  pub struct PL011Uart {
@@ -1275,7 +1275,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
      inner: IRQSafeNullLock<PL011UartInner>,
      irq_number: bsp::device_driver::IRQNumber,
  }
-@@ -276,7 +281,15 @@
+@@ -270,7 +275,15 @@
      /// genrated baud rate of `48_000_000 / (16 * 3.25) = 923_077`.
      ///
      /// Error = `((923_077 - 921_600) / 921_600) * 100 = 0.16modulo`.
@@ -1292,7 +1292,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
          // Execution can arrive here while there are still characters queued in the TX FIFO and
          // actively being sent out by the UART hardware. If the UART is turned off in this case,
          // those queued characters would be lost.
-@@ -318,6 +331,8 @@
+@@ -312,6 +325,8 @@
          self.registers
              .CR
              .write(CR::UARTEN::Enabled + CR::TXE::Enabled + CR::RXE::Enabled);
@@ -1301,7 +1301,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
      }
 
      /// Send a character.
-@@ -395,13 +410,18 @@
+@@ -389,13 +404,18 @@
      ///
      /// # Safety
      ///
@@ -1323,7 +1323,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
              irq_number,
          }
      }
-@@ -418,7 +438,13 @@
+@@ -412,7 +432,13 @@
      }
 
      unsafe fn init(&self) -> Result<(), &'static str> {
@@ -1338,7 +1338,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
 
          Ok(())
      }
-@@ -437,6 +463,16 @@
+@@ -431,6 +457,16 @@
 
          Ok(())
      }
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 13664712c..83a984b8c 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -50,12 +50,6 @@ register_bitfields! {
         /// - If the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
         TXFF OFFSET(5) NUMBITS(1) [],
 
-        /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-        /// LCR_H Register.
-        ///
-        /// If the FIFO is disabled, this bit is set when the receive holding register is empty. If
-        /// the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
-
         /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
         /// LCR_H Register.
         ///
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 13664712c..83a984b8c 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -50,12 +50,6 @@ register_bitfields! {
         /// - If the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
         TXFF OFFSET(5) NUMBITS(1) [],
 
-        /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-        /// LCR_H Register.
-        ///
-        /// If the FIFO is disabled, this bit is set when the receive holding register is empty. If
-        /// the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
-
         /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
         /// LCR_H Register.
         ///
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 13664712c..83a984b8c 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -50,12 +50,6 @@ register_bitfields! {
         /// - If the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
         TXFF OFFSET(5) NUMBITS(1) [],
 
-        /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-        /// LCR_H Register.
-        ///
-        /// If the FIFO is disabled, this bit is set when the receive holding register is empty. If
-        /// the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
-
         /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
         /// LCR_H Register.
         ///
diff --git a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 70b3839e8..b290524ca 100644
--- a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -47,12 +47,6 @@ register_bitfields! {
         /// - If the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
         TXFF OFFSET(5) NUMBITS(1) [],
 
-        /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
-        /// LCR_H Register.
-        ///
-        /// If the FIFO is disabled, this bit is set when the receive holding register is empty. If
-        /// the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
-
         /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
         /// LCR_H Register.
         ///

From baa634f390624143c98573915ad4490d3f625d75 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre-richter@users.noreply.github.com>
Date: Wed, 10 Nov 2021 09:26:17 +0100
Subject: [PATCH 097/214] Adjust image width in README

---
 README.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/README.md b/README.md
index 183b33d4e..376641e97 100644
--- a/README.md
+++ b/README.md
@@ -4,7 +4,7 @@
 
 <br/>
 
-<img src="doc/header.jpg" height="379"> <img src="doc/minipush_demo_frontpage.gif" height="379">
+<img src="doc/header.jpg" height="372"> <img src="doc/minipush_demo_frontpage.gif" height="372">
 
 ## ℹ️ Introduction
 

From 57c6f72936478c4104574f98adffbb7de80845ee Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sat, 13 Nov 2021 12:07:47 +0100
Subject: [PATCH 098/214] Make address translation a feature of the tables

---
 14_virtual_mem_part2_mmio_remap/README.md     | 162 +++---
 .../aarch64/memory/mmu/translation_table.rs   |  50 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |  27 +-
 .../src/memory/mmu/types.rs                   |  19 +-
 .../README.md                                 | 511 ++++++++++--------
 .../src/_arch/aarch64/memory/mmu.rs           |  31 +-
 .../aarch64/memory/mmu/translation_table.rs   | 148 ++++-
 .../src/bsp/raspberrypi/memory/mmu.rs         |  66 +--
 .../src/memory.rs                             |  17 +-
 .../src/memory/mmu.rs                         |  47 +-
 .../src/memory/mmu/translation_table.rs       |  26 +-
 .../src/memory/mmu/types.rs                   |  28 +-
 .../README.md                                 |  93 ++--
 .../src/_arch/aarch64/memory/mmu.rs           |  31 +-
 .../aarch64/memory/mmu/translation_table.rs   | 148 ++++-
 .../src/bsp/raspberrypi/memory/mmu.rs         |  66 +--
 .../src/memory.rs                             |  17 +-
 .../src/memory/mmu.rs                         |  47 +-
 .../src/memory/mmu/translation_table.rs       |  26 +-
 .../src/memory/mmu/types.rs                   |  28 +-
 20 files changed, 905 insertions(+), 683 deletions(-)

diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index dda4cc7fd..cda4dcc95 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -457,19 +457,23 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
          val.write(
              STAGE1_TABLE_DESCRIPTOR::NEXT_LEVEL_TABLE_ADDR_64KiB.val(shifted as u64)
                  + STAGE1_TABLE_DESCRIPTOR::TYPE::Table
-@@ -230,7 +229,10 @@
+@@ -230,10 +229,13 @@
      }
 
      /// Create an instance.
 -    pub fn from_output_addr(phys_output_addr: usize, attribute_fields: &AttributeFields) -> Self {
-+    pub fn from_output_addr(
-+        phys_output_addr: *const Page<Physical>,
++    pub fn from_output_page(
++        phys_output_page: *const Page<Physical>,
 +        attribute_fields: &AttributeFields,
 +    ) -> Self {
          let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
 
-         let shifted = phys_output_addr as u64 >> Granule64KiB::SHIFT;
-@@ -244,50 +246,193 @@
+-        let shifted = phys_output_addr as u64 >> Granule64KiB::SHIFT;
++        let shifted = phys_output_page as u64 >> Granule64KiB::SHIFT;
+         val.write(
+             STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted)
+                 + STAGE1_PAGE_DESCRIPTOR::AF::True
+@@ -244,50 +246,201 @@
 
          Self { value: val.get() }
      }
@@ -517,12 +521,6 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
 -    /// Iterates over all static translation table entries and fills them at once.
 -    ///
 -    /// # Safety
--    ///
--    /// - Modifies a `static mut`. Ensure it only happens from here.
--    pub unsafe fn populate_tt_entries(&mut self) -> Result<(), &'static str> {
--        for (l2_nr, l2_entry) in self.lvl2.iter_mut().enumerate() {
--            *l2_entry =
--                TableDescriptor::from_next_lvl_table_addr(self.lvl3[l2_nr].phys_start_addr_usize());
 +    /// The start address of the table's MMIO range.
 +    #[inline(always)]
 +    fn mmio_start_addr(&self) -> Address<Virtual> {
@@ -544,11 +542,11 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
 +
 +    /// Helper to calculate the lvl2 and lvl3 indices from an address.
 +    #[inline(always)]
-+    fn lvl2_lvl3_index_from(
++    fn lvl2_lvl3_index_from_page(
 +        &self,
-+        addr: *const Page<Virtual>,
++        virt_page: *const Page<Virtual>,
 +    ) -> Result<(usize, usize), &'static str> {
-+        let addr = addr as usize;
++        let addr = virt_page as usize;
 +        let lvl2_index = addr >> Granule512MiB::SHIFT;
 +        let lvl3_index = (addr & Granule512MiB::MASK) >> Granule64KiB::SHIFT;
 +
@@ -559,24 +557,42 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
 +        Ok((lvl2_index, lvl3_index))
 +    }
 +
-+    /// Returns the PageDescriptor corresponding to the supplied Page.
++    /// Sets the PageDescriptor corresponding to the supplied page address.
+     ///
+-    /// - Modifies a `static mut`. Ensure it only happens from here.
+-    pub unsafe fn populate_tt_entries(&mut self) -> Result<(), &'static str> {
+-        for (l2_nr, l2_entry) in self.lvl2.iter_mut().enumerate() {
+-            *l2_entry =
+-                TableDescriptor::from_next_lvl_table_addr(self.lvl3[l2_nr].phys_start_addr_usize());
++    /// Doesn't allow overriding an already valid page.
 +    #[inline(always)]
-+    fn page_descriptor_from(
++    fn set_page_descriptor_from_page(
 +        &mut self,
-+        addr: *const Page<Virtual>,
-+    ) -> Result<&mut PageDescriptor, &'static str> {
-+        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from(addr)?;
-+
-+        Ok(&mut self.lvl3[lvl2_index][lvl3_index])
++        virt_page: *const Page<Virtual>,
++        new_desc: &PageDescriptor,
++    ) -> Result<(), &'static str> {
++        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page(virt_page)?;
++        let desc = &mut self.lvl3[lvl2_index][lvl3_index];
+
+-            for (l3_nr, l3_entry) in self.lvl3[l2_nr].iter_mut().enumerate() {
+-                let virt_addr = (l2_nr << Granule512MiB::SHIFT) + (l3_nr << Granule64KiB::SHIFT);
++        if desc.is_valid() {
++            return Err("Virtual page is already mapped");
++        }
+
+-                let (phys_output_addr, attribute_fields) =
+-                    bsp::memory::mmu::virt_mem_layout().virt_addr_properties(virt_addr)?;
++        *desc = *new_desc;
++        Ok(())
 +    }
 +}
-+
+
+-                *l3_entry = PageDescriptor::from_output_addr(phys_output_addr, &attribute_fields);
+-            }
 +//------------------------------------------------------------------------------
 +// OS Interface Code
 +//------------------------------------------------------------------------------
-
--            for (l3_nr, l3_entry) in self.lvl3[l2_nr].iter_mut().enumerate() {
--                let virt_addr = (l2_nr << Granule512MiB::SHIFT) + (l3_nr << Granule64KiB::SHIFT);
++
 +impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::TranslationTable
 +    for FixedSizeTranslationTable<NUM_TABLES>
 +{
@@ -587,9 +603,10 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
 +
 +        // Populate the l2 entries.
 +        for (lvl2_nr, lvl2_entry) in self.lvl2.iter_mut().enumerate() {
-+            let desc =
-+                TableDescriptor::from_next_lvl_table_addr(self.lvl3[lvl2_nr].phys_start_addr());
-+            *lvl2_entry = desc;
++            let phys_table_addr = self.lvl3[lvl2_nr].phys_start_addr();
++
++            let new_desc = TableDescriptor::from_next_lvl_table_addr(phys_table_addr);
++            *lvl2_entry = new_desc;
 +        }
 +
 +        self.cur_l3_mmio_index = Self::L3_MMIO_START_INDEX;
@@ -608,33 +625,28 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
 +    ) -> Result<(), &'static str> {
 +        assert!(self.initialized, "Translation tables not initialized");
 +
-+        let p = phys_pages.as_slice();
 +        let v = virt_pages.as_slice();
++        let p = phys_pages.as_slice();
 +
 +        // No work to do for empty slices.
 +        if v.is_empty() {
 +            return Ok(());
 +        }
-
--                let (phys_output_addr, attribute_fields) =
--                    bsp::memory::mmu::virt_mem_layout().virt_addr_properties(virt_addr)?;
++
 +        if v.len() != p.len() {
 +            return Err("Tried to map page slices with unequal sizes");
 +        }
-
--                *l3_entry = PageDescriptor::from_output_addr(phys_output_addr, &attribute_fields);
++
 +        if p.last().unwrap().as_ptr() >= bsp::memory::mmu::phys_addr_space_end_page() {
 +            return Err("Tried to map outside of physical address space");
 +        }
 +
 +        let iter = p.iter().zip(v.iter());
 +        for (phys_page, virt_page) in iter {
-+            let page_descriptor = self.page_descriptor_from(virt_page.as_ptr())?;
-+            if page_descriptor.is_valid() {
-+                return Err("Virtual page is already mapped");
-             }
++            let new_desc = PageDescriptor::from_output_page(phys_page.as_ptr(), attr);
++            let virt_page = virt_page.as_ptr();
 +
-+            *page_descriptor = PageDescriptor::from_output_addr(phys_page.as_ptr(), attr);
++            self.set_page_descriptor_from_page(virt_page, &new_desc)?;
          }
 
          Ok(())
@@ -680,7 +692,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
      }
  }
 
-@@ -296,6 +441,9 @@
+@@ -296,6 +449,9 @@
  //--------------------------------------------------------------------------------------------------
 
  #[cfg(test)]
@@ -1468,7 +1480,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld 14_vir
 diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
 --- 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +++ 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
-@@ -4,70 +4,157 @@
+@@ -4,70 +4,150 @@
 
  //! BSP Memory Management Unit.
 
@@ -1483,7 +1495,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +            AccessPermissions, AddressSpace, AssociatedTranslationTable, AttributeFields,
 +            MemAttributes, Page, PageSliceDescriptor, TranslationGranule,
 +        },
-+        Physical, Virtual,
++        Address, Physical, Virtual,
 +    },
 +    synchronization::InitStateLock,
 +};
@@ -1504,16 +1516,16 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +/// The translation granule chosen by this BSP. This will be used everywhere else in the kernel to
 +/// derive respective data structures and their sizes. For example, the `crate::memory::mmu::Page`.
 +pub type KernelGranule = TranslationGranule<{ 64 * 1024 }>;
-+
+
+-const NUM_MEM_RANGES: usize = 2;
 +/// The kernel's virtual address space defined by this BSP.
 +pub type KernelVirtAddrSpace = AddressSpace<{ 8 * 1024 * 1024 * 1024 }>;
 
--const NUM_MEM_RANGES: usize = 2;
+-/// The virtual memory layout.
 +//--------------------------------------------------------------------------------------------------
 +// Global instances
 +//--------------------------------------------------------------------------------------------------
-
--/// The virtual memory layout.
++
 +/// The kernel translation tables.
  ///
 -/// The layout must contain only special ranges, aka anything that is _not_ normal cacheable DRAM.
@@ -1571,8 +1583,10 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +    let num_pages = size_to_num_pages(super::rx_size());
 +
 +    PageSliceDescriptor::from_addr(super::virt_rx_start(), num_pages)
-+}
-+
+ }
+
+-fn mmio_range_inclusive() -> RangeInclusive<usize> {
+-    RangeInclusive::new(memory_map::mmio::START, memory_map::mmio::END_INCLUSIVE)
 +/// The Read+Write (RW) pages of the kernel binary.
 +fn virt_rw_page_desc() -> PageSliceDescriptor<Virtual> {
 +    let num_pages = size_to_num_pages(super::rw_size());
@@ -1587,23 +1601,14 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +    PageSliceDescriptor::from_addr(super::virt_boot_core_stack_start(), num_pages)
 +}
 +
-+// The binary is still identity mapped, so we don't need to convert in the following.
++// The binary is still identity mapped, so use this trivial conversion function for mapping below.
 +
-+/// The Read+Execute (RX) pages of the kernel binary.
-+fn phys_rx_page_desc() -> PageSliceDescriptor<Physical> {
-+    virt_rx_page_desc().into()
- }
-
--fn mmio_range_inclusive() -> RangeInclusive<usize> {
--    RangeInclusive::new(memory_map::mmio::START, memory_map::mmio::END_INCLUSIVE)
-+/// The Read+Write (RW) pages of the kernel binary.
-+fn phys_rw_page_desc() -> PageSliceDescriptor<Physical> {
-+    virt_rw_page_desc().into()
-+}
++fn kernel_virt_to_phys_page_slice(
++    virt_slice: PageSliceDescriptor<Virtual>,
++) -> PageSliceDescriptor<Physical> {
++    let phys_start_addr = Address::<Physical>::new(virt_slice.start_addr().into_usize());
 +
-+/// The boot core's stack.
-+fn phys_boot_core_stack_page_desc() -> PageSliceDescriptor<Physical> {
-+    virt_boot_core_stack_page_desc().into()
++    PageSliceDescriptor::from_addr(phys_start_addr, virt_slice.num_pages())
  }
 
  //--------------------------------------------------------------------------------------------------
@@ -1635,7 +1640,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +    generic_mmu::kernel_map_pages_at(
 +        "Kernel code and RO data",
 +        &virt_rx_page_desc(),
-+        &phys_rx_page_desc(),
++        &kernel_virt_to_phys_page_slice(virt_rx_page_desc()),
 +        &AttributeFields {
 +            mem_attributes: MemAttributes::CacheableDRAM,
 +            acc_perms: AccessPermissions::ReadOnly,
@@ -1646,7 +1651,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +    generic_mmu::kernel_map_pages_at(
 +        "Kernel data and bss",
 +        &virt_rw_page_desc(),
-+        &phys_rw_page_desc(),
++        &kernel_virt_to_phys_page_slice(virt_rw_page_desc()),
 +        &AttributeFields {
 +            mem_attributes: MemAttributes::CacheableDRAM,
 +            acc_perms: AccessPermissions::ReadWrite,
@@ -1657,7 +1662,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +    generic_mmu::kernel_map_pages_at(
 +        "Kernel boot-core stack",
 +        &virt_boot_core_stack_page_desc(),
-+        &phys_boot_core_stack_page_desc(),
++        &kernel_virt_to_phys_page_slice(virt_boot_core_stack_page_desc()),
 +        &AttributeFields {
 +            mem_attributes: MemAttributes::CacheableDRAM,
 +            acc_perms: AccessPermissions::ReadWrite,
@@ -1669,7 +1674,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -77,19 +164,24 @@
+@@ -77,19 +157,24 @@
  #[cfg(test)]
  mod tests {
      use super::*;
@@ -1701,7 +1706,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
              assert!(end >= start);
          }
      }
-@@ -97,18 +189,38 @@
+@@ -97,18 +182,38 @@
      /// Ensure the kernel's virtual memory layout is free of overlaps.
      #[kernel_test]
      fn virt_mem_layout_has_no_overlaps() {
@@ -2482,7 +2487,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.r
 diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
 --- 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs
 +++ 14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
-@@ -0,0 +1,210 @@
+@@ -0,0 +1,201 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -2491,7 +2496,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 14_virtual
 +
 +use crate::{
 +    bsp, common,
-+    memory::{Address, AddressType, Physical, Virtual},
++    memory::{Address, AddressType, Physical},
 +};
 +use core::{convert::From, marker::PhantomData};
 +
@@ -2577,11 +2582,11 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 14_virtual
 +    }
 +
 +    /// Return a pointer to the first page of the described slice.
-+    const fn first_page_ptr(&self) -> *const Page<ATYPE> {
++    const fn first_page(&self) -> *const Page<ATYPE> {
 +        self.start.into_usize() as *const _
 +    }
 +
-+    /// Return the number of Pages the slice describes.
++    /// Return the number of pages the slice describes.
 +    pub const fn num_pages(&self) -> usize {
 +        self.num_pages
 +    }
@@ -2611,22 +2616,13 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 14_virtual
 +        (addr >= self.start_addr()) && (addr <= self.end_addr_inclusive())
 +    }
 +
-+    /// Return a non-mutable slice of Pages.
++    /// Return a non-mutable slice of pages.
 +    ///
 +    /// # Safety
 +    ///
 +    /// - Same as applies for `core::slice::from_raw_parts`.
 +    pub unsafe fn as_slice(&self) -> &[Page<ATYPE>] {
-+        core::slice::from_raw_parts(self.first_page_ptr(), self.num_pages)
-+    }
-+}
-+
-+impl From<PageSliceDescriptor<Virtual>> for PageSliceDescriptor<Physical> {
-+    fn from(desc: PageSliceDescriptor<Virtual>) -> Self {
-+        Self {
-+            start: Address::new(desc.start.into_usize()),
-+            num_pages: desc.num_pages,
-+        }
++        core::slice::from_raw_parts(self.first_page(), self.num_pages)
 +    }
 +}
 +
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
index 0a9f6d52c..0c36cac64 100644
--- a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -229,13 +229,13 @@ impl PageDescriptor {
     }
 
     /// Create an instance.
-    pub fn from_output_addr(
-        phys_output_addr: *const Page<Physical>,
+    pub fn from_output_page(
+        phys_output_page: *const Page<Physical>,
         attribute_fields: &AttributeFields,
     ) -> Self {
         let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
 
-        let shifted = phys_output_addr as u64 >> Granule64KiB::SHIFT;
+        let shifted = phys_output_page as u64 >> Granule64KiB::SHIFT;
         val.write(
             STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted)
                 + STAGE1_PAGE_DESCRIPTOR::AF::True
@@ -308,11 +308,11 @@ impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
 
     /// Helper to calculate the lvl2 and lvl3 indices from an address.
     #[inline(always)]
-    fn lvl2_lvl3_index_from(
+    fn lvl2_lvl3_index_from_page(
         &self,
-        addr: *const Page<Virtual>,
+        virt_page: *const Page<Virtual>,
     ) -> Result<(usize, usize), &'static str> {
-        let addr = addr as usize;
+        let addr = virt_page as usize;
         let lvl2_index = addr >> Granule512MiB::SHIFT;
         let lvl3_index = (addr & Granule512MiB::MASK) >> Granule64KiB::SHIFT;
 
@@ -323,15 +323,24 @@ impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
         Ok((lvl2_index, lvl3_index))
     }
 
-    /// Returns the PageDescriptor corresponding to the supplied Page.
+    /// Sets the PageDescriptor corresponding to the supplied page address.
+    ///
+    /// Doesn't allow overriding an already valid page.
     #[inline(always)]
-    fn page_descriptor_from(
+    fn set_page_descriptor_from_page(
         &mut self,
-        addr: *const Page<Virtual>,
-    ) -> Result<&mut PageDescriptor, &'static str> {
-        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from(addr)?;
+        virt_page: *const Page<Virtual>,
+        new_desc: &PageDescriptor,
+    ) -> Result<(), &'static str> {
+        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page(virt_page)?;
+        let desc = &mut self.lvl3[lvl2_index][lvl3_index];
 
-        Ok(&mut self.lvl3[lvl2_index][lvl3_index])
+        if desc.is_valid() {
+            return Err("Virtual page is already mapped");
+        }
+
+        *desc = *new_desc;
+        Ok(())
     }
 }
 
@@ -349,9 +358,10 @@ impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::Transla
 
         // Populate the l2 entries.
         for (lvl2_nr, lvl2_entry) in self.lvl2.iter_mut().enumerate() {
-            let desc =
-                TableDescriptor::from_next_lvl_table_addr(self.lvl3[lvl2_nr].phys_start_addr());
-            *lvl2_entry = desc;
+            let phys_table_addr = self.lvl3[lvl2_nr].phys_start_addr();
+
+            let new_desc = TableDescriptor::from_next_lvl_table_addr(phys_table_addr);
+            *lvl2_entry = new_desc;
         }
 
         self.cur_l3_mmio_index = Self::L3_MMIO_START_INDEX;
@@ -370,8 +380,8 @@ impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::Transla
     ) -> Result<(), &'static str> {
         assert!(self.initialized, "Translation tables not initialized");
 
-        let p = phys_pages.as_slice();
         let v = virt_pages.as_slice();
+        let p = phys_pages.as_slice();
 
         // No work to do for empty slices.
         if v.is_empty() {
@@ -388,12 +398,10 @@ impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::Transla
 
         let iter = p.iter().zip(v.iter());
         for (phys_page, virt_page) in iter {
-            let page_descriptor = self.page_descriptor_from(virt_page.as_ptr())?;
-            if page_descriptor.is_valid() {
-                return Err("Virtual page is already mapped");
-            }
+            let new_desc = PageDescriptor::from_output_page(phys_page.as_ptr(), attr);
+            let virt_page = virt_page.as_ptr();
 
-            *page_descriptor = PageDescriptor::from_output_addr(phys_page.as_ptr(), attr);
+            self.set_page_descriptor_from_page(virt_page, &new_desc)?;
         }
 
         Ok(())
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
index 5bd2fdbdb..b99268b48 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
@@ -12,7 +12,7 @@ use crate::{
             AccessPermissions, AddressSpace, AssociatedTranslationTable, AttributeFields,
             MemAttributes, Page, PageSliceDescriptor, TranslationGranule,
         },
-        Physical, Virtual,
+        Address, Physical, Virtual,
     },
     synchronization::InitStateLock,
 };
@@ -81,21 +81,14 @@ fn virt_boot_core_stack_page_desc() -> PageSliceDescriptor<Virtual> {
     PageSliceDescriptor::from_addr(super::virt_boot_core_stack_start(), num_pages)
 }
 
-// The binary is still identity mapped, so we don't need to convert in the following.
+// The binary is still identity mapped, so use this trivial conversion function for mapping below.
 
-/// The Read+Execute (RX) pages of the kernel binary.
-fn phys_rx_page_desc() -> PageSliceDescriptor<Physical> {
-    virt_rx_page_desc().into()
-}
-
-/// The Read+Write (RW) pages of the kernel binary.
-fn phys_rw_page_desc() -> PageSliceDescriptor<Physical> {
-    virt_rw_page_desc().into()
-}
+fn kernel_virt_to_phys_page_slice(
+    virt_slice: PageSliceDescriptor<Virtual>,
+) -> PageSliceDescriptor<Physical> {
+    let phys_start_addr = Address::<Physical>::new(virt_slice.start_addr().into_usize());
 
-/// The boot core's stack.
-fn phys_boot_core_stack_page_desc() -> PageSliceDescriptor<Physical> {
-    virt_boot_core_stack_page_desc().into()
+    PageSliceDescriptor::from_addr(phys_start_addr, virt_slice.num_pages())
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -124,7 +117,7 @@ pub unsafe fn kernel_map_binary() -> Result<(), &'static str> {
     generic_mmu::kernel_map_pages_at(
         "Kernel code and RO data",
         &virt_rx_page_desc(),
-        &phys_rx_page_desc(),
+        &kernel_virt_to_phys_page_slice(virt_rx_page_desc()),
         &AttributeFields {
             mem_attributes: MemAttributes::CacheableDRAM,
             acc_perms: AccessPermissions::ReadOnly,
@@ -135,7 +128,7 @@ pub unsafe fn kernel_map_binary() -> Result<(), &'static str> {
     generic_mmu::kernel_map_pages_at(
         "Kernel data and bss",
         &virt_rw_page_desc(),
-        &phys_rw_page_desc(),
+        &kernel_virt_to_phys_page_slice(virt_rw_page_desc()),
         &AttributeFields {
             mem_attributes: MemAttributes::CacheableDRAM,
             acc_perms: AccessPermissions::ReadWrite,
@@ -146,7 +139,7 @@ pub unsafe fn kernel_map_binary() -> Result<(), &'static str> {
     generic_mmu::kernel_map_pages_at(
         "Kernel boot-core stack",
         &virt_boot_core_stack_page_desc(),
-        &phys_boot_core_stack_page_desc(),
+        &kernel_virt_to_phys_page_slice(virt_boot_core_stack_page_desc()),
         &AttributeFields {
             mem_attributes: MemAttributes::CacheableDRAM,
             acc_perms: AccessPermissions::ReadWrite,
diff --git a/14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs b/14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
index 2e52e8f3d..bbd4e9e84 100644
--- a/14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
@@ -6,7 +6,7 @@
 
 use crate::{
     bsp, common,
-    memory::{Address, AddressType, Physical, Virtual},
+    memory::{Address, AddressType, Physical},
 };
 use core::{convert::From, marker::PhantomData};
 
@@ -92,11 +92,11 @@ impl<ATYPE: AddressType> PageSliceDescriptor<ATYPE> {
     }
 
     /// Return a pointer to the first page of the described slice.
-    const fn first_page_ptr(&self) -> *const Page<ATYPE> {
+    const fn first_page(&self) -> *const Page<ATYPE> {
         self.start.into_usize() as *const _
     }
 
-    /// Return the number of Pages the slice describes.
+    /// Return the number of pages the slice describes.
     pub const fn num_pages(&self) -> usize {
         self.num_pages
     }
@@ -126,22 +126,13 @@ impl<ATYPE: AddressType> PageSliceDescriptor<ATYPE> {
         (addr >= self.start_addr()) && (addr <= self.end_addr_inclusive())
     }
 
-    /// Return a non-mutable slice of Pages.
+    /// Return a non-mutable slice of pages.
     ///
     /// # Safety
     ///
     /// - Same as applies for `core::slice::from_raw_parts`.
     pub unsafe fn as_slice(&self) -> &[Page<ATYPE>] {
-        core::slice::from_raw_parts(self.first_page_ptr(), self.num_pages)
-    }
-}
-
-impl From<PageSliceDescriptor<Virtual>> for PageSliceDescriptor<Physical> {
-    fn from(desc: PageSliceDescriptor<Virtual>) -> Self {
-        Self {
-            start: Address::new(desc.start.into_usize()),
-            num_pages: desc.num_pages,
-        }
+        core::slice::from_raw_parts(self.first_page(), self.num_pages)
     }
 }
 
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index c564a1b5e..efc28efff 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -257,7 +257,7 @@ ffff000000010008: 44 33 22 11
 ffff00000001000c: 00 00 00 00
 ```
 
-Both times, the `movabsq` instruction gets emitted. It means that the address is put into the target
+Both times, the `movabs` instruction gets emitted. It means that the address is put into the target
 register using hardcoded `immediate values`. PC-relative address calculation is not used here.
 Hence, this code would return the `absolute` address in both cases. Which means in the second case,
 even when the binary would be loaded at `0x8_0000`, the return value would be
@@ -350,11 +350,11 @@ ffff000000010008: 44 33 22 11
 ffff00000001000c: 00 00 00 00
 ```
 
-What changed compared to earlier is that `rx_start_address()` now indirects through the `Global
+What changed compared to earlier is that `get_address_of_global()` now indirects through the `Global
 Offset Table`, as has been promised by the compiler's documentation. Specifically,
-`rx_start_address()` addresses the `GOT` using PC-relative addressing (distance from code to `GOT`
-must always be fixed), and loads the first 64 bit word from the start of the `GOT`, which happens to
-be `0xffff_0000_0001_0008`.
+`get_address_of_global()` addresses the `GOT` using PC-relative addressing (distance from code to
+`GOT` must always be fixed), and loads the first 64 bit word from the start of the `GOT`, which
+happens to be `0xffff_0000_0001_0008`.
 
 Okay okay okay... So when we use `-fpic`, we get the **absolute** address of `global_data_word` even
 on `AArch64` now. How does this help when the code executes from `0x8_0000`?
@@ -674,7 +674,7 @@ Precomputing kernel translation tables and patching kernel ELF
   Generating Boot-core stack  | 0x0000_0000_0010_0000 | 512 KiB
              --------------------------------------------------
     Patching Kernel table struct at physical 0x9_0000
-    Patching Value of kernel table physical base address (0xd_0000) at physical 0x8_0040
+    Patching Value of kernel table physical base address (0xd_0000) at physical 0x8_0060
     Finished in 0.03s
 ```
 
@@ -685,11 +685,11 @@ tutorial, anything else, like `MMIO-remapping`, can and will happen lazily durin
 
 Two more things that changed in this tutorial, but won't be explained in detail:
 
-- Since virtual memory in `EL1` is now active from the start, any attempt to convert from
-  `Address<Virtual>` to `Address<Physical>` is now done through the `TryFrom` trait, which
-  internally uses HW-supported address translation of the CPU. So either the translation succeeds
-  because there is a valid virtual-to-physical mapping in the currently used translation tables, or
-  an `Err()` is returned.
+- Since virtual memory in `EL1` is now active from the start, any attempt to convert from a kernel
+  `Address<Virtual>` to `Address<Physical>` is now done using the function
+  `mmu::try_kernel_virt_addr_to_phys_addr()`, which internally uses a new function that has been
+  added to the `TranslationTable` interface. If there is no valid virtual-to-physical mapping
+  present in the tables, an `Err()` is returned.
 - The precomputed translation table mappings won't automatically have entries in the kernel's
   `mapping info record`, which is used to print mapping info during boot. Mapping record entries are
   not computed offline in order to reduce complexity. For this reason, the `BSP` code, which in
@@ -724,7 +724,7 @@ Precomputing kernel translation tables and patching kernel ELF
   Generating Boot-core stack  | 0x0000_0000_0010_0000 | 512 KiB
              --------------------------------------------------
     Patching Kernel table struct at physical 0x9_0000
-    Patching Value of kernel table physical base address (0xd_0000) at physical 0x8_0040
+    Patching Value of kernel table physical base address (0xd_0000) at physical 0x8_0060
     Finished in 0.03s
 
 Minipush 1.0
@@ -732,6 +732,7 @@ Minipush 1.0
 [MP] ⏳ Waiting for /dev/ttyUSB0
 [MP] ✅ Serial connected
 [MP] 🔌 Please power the target now
+
  __  __ _      _ _                 _
 |  \/  (_)_ _ (_) |   ___  __ _ __| |
 | |\/| | | ' \| | |__/ _ \/ _` / _` |
@@ -859,15 +860,6 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.s 15_virtua
 diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs
 --- 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
 +++ 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs
-@@ -23,7 +23,7 @@
-         Address, Physical, Virtual,
-     },
- };
--use core::convert;
-+use core::convert::{self, TryInto};
- use tock_registers::{
-     interfaces::{Readable, Writeable},
-     register_bitfields,
 @@ -124,7 +124,7 @@
  }
 
@@ -888,7 +880,64 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translati
          Address::new(self as *const _ as usize)
      }
  }
-@@ -273,7 +272,7 @@
+@@ -220,6 +219,35 @@
+     }
+ }
+
++/// Convert the HW-specific attributes of the MMU to kernel's generic memory attributes.
++impl convert::TryFrom<InMemoryRegister<u64, STAGE1_PAGE_DESCRIPTOR::Register>> for AttributeFields {
++    type Error = &'static str;
++
++    fn try_from(
++        desc: InMemoryRegister<u64, STAGE1_PAGE_DESCRIPTOR::Register>,
++    ) -> Result<AttributeFields, Self::Error> {
++        let mem_attributes = match desc.read(STAGE1_PAGE_DESCRIPTOR::AttrIndx) {
++            memory::mmu::arch_mmu::mair::NORMAL => MemAttributes::CacheableDRAM,
++            memory::mmu::arch_mmu::mair::DEVICE => MemAttributes::Device,
++            _ => return Err("Unexpected memory attribute"),
++        };
++
++        let acc_perms = match desc.read_as_enum(STAGE1_PAGE_DESCRIPTOR::AP) {
++            Some(STAGE1_PAGE_DESCRIPTOR::AP::Value::RO_EL1) => AccessPermissions::ReadOnly,
++            Some(STAGE1_PAGE_DESCRIPTOR::AP::Value::RW_EL1) => AccessPermissions::ReadWrite,
++            _ => return Err("Unexpected access permission"),
++        };
++
++        let execute_never = desc.read(STAGE1_PAGE_DESCRIPTOR::PXN) > 0;
++
++        Ok(AttributeFields {
++            mem_attributes,
++            acc_perms,
++            execute_never,
++        })
++    }
++}
++
+ impl PageDescriptor {
+     /// Create an instance.
+     ///
+@@ -252,6 +280,20 @@
+         InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(self.value)
+             .is_set(STAGE1_PAGE_DESCRIPTOR::VALID)
+     }
++
++    /// Returns the output page.
++    fn output_page(&self) -> *const Page<Physical> {
++        let shifted = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(self.value)
++            .read(STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB);
++        let addr = shifted << Granule64KiB::SHIFT;
++
++        addr as *const Page<Physical>
++    }
++
++    /// Returns the attributes.
++    fn try_attributes(&self) -> Result<AttributeFields, &'static str> {
++        InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(self.value).try_into()
++    }
+ }
+
+ //--------------------------------------------------------------------------------------------------
+@@ -273,7 +315,7 @@
 
      /// Create an instance.
      #[allow(clippy::assertions_on_constants)]
@@ -897,7 +946,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translati
          assert!(bsp::memory::mmu::KernelGranule::SIZE == Granule64KiB::SIZE);
 
          // Can't have a zero-sized address space.
-@@ -282,11 +281,20 @@
+@@ -282,11 +324,20 @@
          Self {
              lvl3: [[PageDescriptor::new_zeroed(); 8192]; NUM_TABLES],
              lvl2: [TableDescriptor::new_zeroed(); NUM_TABLES],
@@ -920,7 +969,26 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translati
      /// The start address of the table's MMIO range.
      #[inline(always)]
      fn mmio_start_addr(&self) -> Address<Virtual> {
-@@ -342,24 +350,26 @@
+@@ -323,6 +374,18 @@
+         Ok((lvl2_index, lvl3_index))
+     }
+
++    /// Returns the PageDescriptor corresponding to the supplied page address.
++    #[inline(always)]
++    fn page_descriptor_from_page(
++        &self,
++        virt_page: *const Page<Virtual>,
++    ) -> Result<&PageDescriptor, &'static str> {
++        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page(virt_page)?;
++        let desc = &self.lvl3[lvl2_index][lvl3_index];
++
++        Ok(desc)
++    }
++
+     /// Sets the PageDescriptor corresponding to the supplied page address.
+     ///
+     /// Doesn't allow overriding an already valid page.
+@@ -351,14 +414,15 @@
  impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::TranslationTable
      for FixedSizeTranslationTable<NUM_TABLES>
  {
@@ -933,16 +1001,13 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translati
 
          // Populate the l2 entries.
          for (lvl2_nr, lvl2_entry) in self.lvl2.iter_mut().enumerate() {
--            let desc =
--                TableDescriptor::from_next_lvl_table_addr(self.lvl3[lvl2_nr].phys_start_addr());
-+            let addr = self.lvl3[lvl2_nr]
-+                .virt_start_addr()
-+                .try_into()
-+                .map_err(|_| "Translation error")?;
-+
-+            let desc = TableDescriptor::from_next_lvl_table_addr(addr);
-             *lvl2_entry = desc;
-         }
+-            let phys_table_addr = self.lvl3[lvl2_nr].phys_start_addr();
++            let virt_table_addr = self.lvl3[lvl2_nr].virt_start_addr();
++            let phys_table_addr = memory::mmu::try_kernel_virt_addr_to_phys_addr(virt_table_addr)?;
+
+             let new_desc = TableDescriptor::from_next_lvl_table_addr(phys_table_addr);
+             *lvl2_entry = new_desc;
+@@ -366,10 +430,8 @@
 
          self.cur_l3_mmio_index = Self::L3_MMIO_START_INDEX;
          self.initialized = true;
@@ -954,61 +1019,52 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translati
      }
 
      unsafe fn map_pages_at(
+@@ -442,6 +504,44 @@
 
-diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu.rs
---- 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
-+++ 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu.rs
-@@ -15,7 +15,7 @@
-
- use crate::{
-     bsp, memory,
--    memory::{mmu::TranslationGranule, Address, Physical},
-+    memory::{mmu::TranslationGranule, Address, Physical, Virtual},
- };
- use core::intrinsics::unlikely;
- use cortex_a::{asm::barrier, registers::*};
-@@ -109,7 +109,7 @@
- //------------------------------------------------------------------------------
- // OS Interface Code
- //------------------------------------------------------------------------------
--use memory::mmu::MMUEnableError;
-+use memory::mmu::{MMUEnableError, TranslationError};
-
- impl memory::mmu::interface::MMU for MemoryManagementUnit {
-     unsafe fn enable_mmu_and_caching(
-@@ -153,4 +153,31 @@
-     fn is_enabled(&self) -> bool {
-         SCTLR_EL1.matches_all(SCTLR_EL1::M::Enable)
+         false
      }
 +
-+    fn try_virt_to_phys(
++    fn try_virt_page_to_phys_page(
 +        &self,
-+        virt: Address<Virtual>,
-+    ) -> Result<Address<Physical>, TranslationError> {
-+        if !self.is_enabled() {
-+            return Err(TranslationError::MMUDisabled);
-+        }
++        virt_page: *const Page<Virtual>,
++    ) -> Result<*const Page<Physical>, &'static str> {
++        let page_desc = self.page_descriptor_from_page(virt_page)?;
 +
-+        let addr = virt.into_usize() as u64;
-+        unsafe {
-+            asm!(
-+            "AT S1E1R, {0}",
-+            in(reg) addr,
-+            options(readonly, nostack, preserves_flags)
-+            );
++        if !page_desc.is_valid() {
++            return Err("Page marked invalid");
 +        }
 +
-+        let par_el1 = PAR_EL1.extract();
-+        if par_el1.matches_all(PAR_EL1::F::TranslationAborted) {
-+            return Err(TranslationError::Aborted);
++        Ok(page_desc.output_page())
++    }
++
++    fn try_page_attributes(
++        &self,
++        virt_page: *const Page<Virtual>,
++    ) -> Result<AttributeFields, &'static str> {
++        let page_desc = self.page_descriptor_from_page(virt_page)?;
++
++        if !page_desc.is_valid() {
++            return Err("Page marked invalid");
 +        }
 +
-+        let phys_addr = (par_el1.read(PAR_EL1::PA) << 12) | (addr & 0xFFF);
++        page_desc.try_attributes()
++    }
++
++    /// Try to translate a virtual address to a physical address.
++    ///
++    /// Will only succeed if there exists a valid mapping for the input address.
++    fn try_virt_addr_to_phys_addr(
++        &self,
++        virt_addr: Address<Virtual>,
++    ) -> Result<Address<Physical>, &'static str> {
++        let page = self.try_virt_page_to_phys_page(virt_addr.as_page_ptr())?;
 +
-+        Ok(Address::new(phys_addr as usize))
++        Ok(Address::new(page as usize + virt_addr.offset_into_page()))
 +    }
  }
 
+ //--------------------------------------------------------------------------------------------------
+
 diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/console.rs
 --- 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs
 +++ 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/console.rs
@@ -1087,15 +1143,18 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld 15_virtual
 diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs
 --- 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
 +++ 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs
-@@ -16,6 +16,7 @@
+@@ -9,8 +9,8 @@
+     memory::{
+         mmu as generic_mmu,
+         mmu::{
+-            AccessPermissions, AddressSpace, AssociatedTranslationTable, AttributeFields,
+-            MemAttributes, Page, PageSliceDescriptor, TranslationGranule,
++            AddressSpace, AssociatedTranslationTable, AttributeFields, Page, PageSliceDescriptor,
++            TranslationGranule,
+         },
+         Address, Physical, Virtual,
      },
-     synchronization::InitStateLock,
- };
-+use core::convert::TryInto;
-
- //--------------------------------------------------------------------------------------------------
- // Private Definitions
-@@ -33,7 +34,7 @@
+@@ -33,7 +33,7 @@
  pub type KernelGranule = TranslationGranule<{ 64 * 1024 }>;
 
  /// The kernel's virtual address space defined by this BSP.
@@ -1104,7 +1163,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs 15_v
 
  //--------------------------------------------------------------------------------------------------
  // Global instances
-@@ -45,13 +46,33 @@
+@@ -45,13 +45,33 @@
  ///
  /// That is, `size_of(InitStateLock<KernelTranslationTable>) == size_of(KernelTranslationTable)`.
  /// There is a unit tests that checks this porperty.
@@ -1139,82 +1198,92 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs 15_v
  /// Helper function for calculating the number of pages the given parameter spans.
  const fn size_to_num_pages(size: usize) -> usize {
      assert!(size > 0);
-@@ -81,21 +102,22 @@
+@@ -81,16 +101,22 @@
      PageSliceDescriptor::from_addr(super::virt_boot_core_stack_start(), num_pages)
  }
 
--// The binary is still identity mapped, so we don't need to convert in the following.
+-// The binary is still identity mapped, so use this trivial conversion function for mapping below.
+-
 +// There is no reason to expect the following conversions to fail, since they were generated offline
-+// by the `translation table tool`. If it doesn't work, a panic due to the unwrap is justified.
-
- /// The Read+Execute (RX) pages of the kernel binary.
- fn phys_rx_page_desc() -> PageSliceDescriptor<Physical> {
--    virt_rx_page_desc().into()
-+    virt_rx_page_desc().try_into().unwrap()
- }
-
- /// The Read+Write (RW) pages of the kernel binary.
- fn phys_rw_page_desc() -> PageSliceDescriptor<Physical> {
--    virt_rw_page_desc().into()
-+    virt_rw_page_desc().try_into().unwrap()
- }
-
- /// The boot core's stack.
- fn phys_boot_core_stack_page_desc() -> PageSliceDescriptor<Physical> {
--    virt_boot_core_stack_page_desc().into()
-+    virt_boot_core_stack_page_desc().try_into().unwrap()
++// by the `translation table tool`. If it doesn't work, a panic due to the unwraps is justified.
+ fn kernel_virt_to_phys_page_slice(
+     virt_slice: PageSliceDescriptor<Virtual>,
+ ) -> PageSliceDescriptor<Physical> {
+-    let phys_start_addr = Address::<Physical>::new(virt_slice.start_addr().into_usize());
++    let phys_first_page =
++        generic_mmu::try_kernel_virt_page_to_phys_page(virt_slice.first_page()).unwrap();
++    let phys_start_addr = Address::new(phys_first_page as usize);
+
+     PageSliceDescriptor::from_addr(phys_start_addr, virt_slice.num_pages())
  }
 
++fn kernel_page_attributes(virt_page: *const Page<Virtual>) -> AttributeFields {
++    generic_mmu::try_kernel_page_attributes(virt_page).unwrap()
++}
++
  //--------------------------------------------------------------------------------------------------
-@@ -115,13 +137,15 @@
+ // Public Code
+ //--------------------------------------------------------------------------------------------------
+@@ -108,112 +134,33 @@
      ) as *const Page<_>
  }
 
 -/// Map the kernel binary.
-+/// Add mapping records for the kernel binary.
- ///
+-///
 -/// # Safety
-+/// The actual translation table entries for the kernel binary are generated using the offline
-+/// `translation table tool` and patched into the kernel binary. This function just adds the mapping
-+/// record entries.
++/// Add mapping records for the kernel binary.
  ///
 -/// - Any miscalculation or attribute error will likely be fatal. Needs careful manual checking.
 -pub unsafe fn kernel_map_binary() -> Result<(), &'static str> {
 -    generic_mmu::kernel_map_pages_at(
-+/// It must be ensured that these entries are in sync with the offline tool.
++/// The actual translation table entries for the kernel binary are generated using the offline
++/// `translation table tool` and patched into the kernel binary. This function just adds the mapping
++/// record entries.
 +pub fn kernel_add_mapping_records_for_precomputed() {
++    let virt_rx_page_desc = virt_rx_page_desc();
 +    generic_mmu::kernel_add_mapping_record(
          "Kernel code and RO data",
-         &virt_rx_page_desc(),
-         &phys_rx_page_desc(),
-@@ -130,9 +154,9 @@
-             acc_perms: AccessPermissions::ReadOnly,
-             execute_never: false,
-         },
+-        &virt_rx_page_desc(),
+-        &kernel_virt_to_phys_page_slice(virt_rx_page_desc()),
+-        &AttributeFields {
+-            mem_attributes: MemAttributes::CacheableDRAM,
+-            acc_perms: AccessPermissions::ReadOnly,
+-            execute_never: false,
+-        },
 -    )?;
++        &virt_rx_page_desc,
++        &kernel_virt_to_phys_page_slice(virt_rx_page_desc),
++        &kernel_page_attributes(virt_rx_page_desc.first_page()),
 +    );
 
 -    generic_mmu::kernel_map_pages_at(
++    let virt_rw_page_desc = virt_rw_page_desc();
 +    generic_mmu::kernel_add_mapping_record(
          "Kernel data and bss",
-         &virt_rw_page_desc(),
-         &phys_rw_page_desc(),
-@@ -141,9 +165,9 @@
-             acc_perms: AccessPermissions::ReadWrite,
-             execute_never: true,
-         },
+-        &virt_rw_page_desc(),
+-        &kernel_virt_to_phys_page_slice(virt_rw_page_desc()),
+-        &AttributeFields {
+-            mem_attributes: MemAttributes::CacheableDRAM,
+-            acc_perms: AccessPermissions::ReadWrite,
+-            execute_never: true,
+-        },
 -    )?;
++        &virt_rw_page_desc,
++        &kernel_virt_to_phys_page_slice(virt_rw_page_desc),
++        &kernel_page_attributes(virt_rw_page_desc.first_page()),
 +    );
 
 -    generic_mmu::kernel_map_pages_at(
++    let virt_boot_core_stack_page_desc = virt_boot_core_stack_page_desc();
 +    generic_mmu::kernel_add_mapping_record(
          "Kernel boot-core stack",
-         &virt_boot_core_stack_page_desc(),
-         &phys_boot_core_stack_page_desc(),
-@@ -152,75 +176,5 @@
-             acc_perms: AccessPermissions::ReadWrite,
-             execute_never: true,
-         },
+-        &virt_boot_core_stack_page_desc(),
+-        &kernel_virt_to_phys_page_slice(virt_boot_core_stack_page_desc()),
+-        &AttributeFields {
+-            mem_attributes: MemAttributes::CacheableDRAM,
+-            acc_perms: AccessPermissions::ReadWrite,
+-            execute_never: true,
+-        },
 -    )?;
 -
 -    Ok(())
@@ -1286,6 +1355,9 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs 15_v
 -
 -        assert!(bss_range.contains(&kernel_tables_addr));
 -    }
++        &virt_boot_core_stack_page_desc,
++        &kernel_virt_to_phys_page_slice(virt_boot_core_stack_page_desc),
++        &kernel_page_attributes(virt_boot_core_stack_page_desc.first_page()),
 +    );
  }
 
@@ -1345,7 +1417,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs 15
  use crate::memory::{
      mmu::{AttributeFields, PageSliceDescriptor},
 -    Address, Physical, Virtual,
-+    Physical, Virtual,
++    Address, Page, Physical, Virtual,
  };
 
  //--------------------------------------------------------------------------------------------------
@@ -1361,7 +1433,38 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs 15
 
          /// Map the given virtual pages to the given physical pages.
          ///
-@@ -80,7 +77,7 @@
+@@ -70,6 +67,30 @@
+
+         /// Check if a virtual page splice is in the "MMIO region".
+         fn is_virt_page_slice_mmio(&self, virt_pages: &PageSliceDescriptor<Virtual>) -> bool;
++
++        /// Try to translate a virtual page pointer to a physical page pointer.
++        ///
++        /// Will only succeed if there exists a valid mapping for the input page.
++        fn try_virt_page_to_phys_page(
++            &self,
++            virt_page: *const Page<Virtual>,
++        ) -> Result<*const Page<Physical>, &'static str>;
++
++        /// Try to get the attributes of a page.
++        ///
++        /// Will only succeed if there exists a valid mapping for the input page.
++        fn try_page_attributes(
++            &self,
++            virt_page: *const Page<Virtual>,
++        ) -> Result<AttributeFields, &'static str>;
++
++        /// Try to translate a virtual address to a physical address.
++        ///
++        /// Will only succeed if there exists a valid mapping for the input address.
++        fn try_virt_addr_to_phys_addr(
++            &self,
++            virt_addr: Address<Virtual>,
++        ) -> Result<Address<Physical>, &'static str>;
+     }
+ }
+
+@@ -80,7 +101,7 @@
  #[cfg(test)]
  mod tests {
      use super::*;
@@ -1370,7 +1473,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs 15
      use arch_translation_table::MinSizeTranslationTable;
      use interface::TranslationTable;
      use test_macros::kernel_test;
-@@ -89,9 +86,9 @@
+@@ -89,9 +110,9 @@
      #[kernel_test]
      fn translationtable_implementation_sanity() {
          // This will occupy a lot of space on the stack.
@@ -1386,75 +1489,20 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs 15
 diff -uNr 14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs 15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs
 --- 14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
 +++ 15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs
-@@ -8,7 +8,10 @@
-     bsp, common,
-     memory::{Address, AddressType, Physical, Virtual},
- };
--use core::{convert::From, marker::PhantomData};
-+use core::{
-+    convert::{From, TryFrom},
-+    marker::PhantomData,
-+};
-
- //--------------------------------------------------------------------------------------------------
- // Public Definitions
-@@ -136,12 +139,16 @@
+@@ -92,7 +92,7 @@
      }
- }
 
--impl From<PageSliceDescriptor<Virtual>> for PageSliceDescriptor<Physical> {
--    fn from(desc: PageSliceDescriptor<Virtual>) -> Self {
--        Self {
--            start: Address::new(desc.start.into_usize()),
-+impl TryFrom<PageSliceDescriptor<Virtual>> for PageSliceDescriptor<Physical> {
-+    type Error = super::TranslationError;
-+
-+    fn try_from(desc: PageSliceDescriptor<Virtual>) -> Result<Self, Self::Error> {
-+        let phys_start = super::try_virt_to_phys(desc.start)?;
-+
-+        Ok(Self {
-+            start: phys_start,
-             num_pages: desc.num_pages,
--        }
-+        })
+     /// Return a pointer to the first page of the described slice.
+-    const fn first_page(&self) -> *const Page<ATYPE> {
++    pub const fn first_page(&self) -> *const Page<ATYPE> {
+         self.start.into_usize() as *const _
      }
- }
 
 
 diff -uNr 14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs 15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs
 --- 14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
 +++ 15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs
-@@ -33,6 +33,14 @@
-     Other(&'static str),
- }
-
-+/// Translation error variants.
-+#[allow(missing_docs)]
-+#[derive(Debug)]
-+pub enum TranslationError {
-+    MMUDisabled,
-+    Aborted,
-+}
-+
- /// Memory Management interfaces.
- pub mod interface {
-     use super::*;
-@@ -51,6 +59,14 @@
-
-         /// Returns true if the MMU is enabled, false otherwise.
-         fn is_enabled(&self) -> bool;
-+
-+        /// Try to translate a virtual address to a physical address.
-+        ///
-+        /// Will only succeed if there exists a valid mapping for the input VA.
-+        fn try_virt_to_phys(
-+            &self,
-+            virt: Address<Virtual>,
-+        ) -> Result<Address<Physical>, TranslationError>;
-     }
- }
-
-@@ -92,9 +108,7 @@
+@@ -92,9 +92,7 @@
      bsp::memory::mmu::kernel_translation_tables()
          .write(|tables| tables.map_pages_at(virt_pages, phys_pages, attr))?;
 
@@ -1465,7 +1513,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs 15_virtual_mem_part3
 
      Ok(())
  }
-@@ -146,6 +160,18 @@
+@@ -146,6 +144,18 @@
      }
  }
 
@@ -1484,14 +1532,14 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs 15_virtual_mem_part3
  /// Raw mapping of virtual to physical pages in the kernel translation tables.
  ///
  /// Prevents mapping into the MMIO range of the tables.
-@@ -214,21 +240,11 @@
+@@ -214,21 +224,34 @@
      Ok(virt_addr + offset_into_start_page)
  }
 
 -/// Map the kernel's binary. Returns the translation table's base address.
 -///
 -/// # Safety
-+/// Try to translate a virtual address to a physical address.
++/// Try to translate a kernel virtual page pointer to a physical page pointer.
  ///
 -/// - See [`bsp::memory::mmu::kernel_map_binary()`].
 -pub unsafe fn kernel_map_binary() -> Result<Address<Physical>, &'static str> {
@@ -1500,17 +1548,38 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs 15_virtual_mem_part3
 -            tables.init();
 -            tables.phys_base_address()
 -        });
--
++/// Will only succeed if there exists a valid mapping for the input page.
++pub fn try_kernel_virt_page_to_phys_page(
++    virt_page: *const Page<Virtual>,
++) -> Result<*const Page<Physical>, &'static str> {
++    bsp::memory::mmu::kernel_translation_tables()
++        .read(|tables| tables.try_virt_page_to_phys_page(virt_page))
++}
+
 -    bsp::memory::mmu::kernel_map_binary()?;
--
++/// Try to get the attributes of a kernel page.
++///
++/// Will only succeed if there exists a valid mapping for the input page.
++pub fn try_kernel_page_attributes(
++    virt_page: *const Page<Virtual>,
++) -> Result<AttributeFields, &'static str> {
++    bsp::memory::mmu::kernel_translation_tables()
++        .read(|tables| tables.try_page_attributes(virt_page))
++}
+
 -    Ok(phys_kernel_tables_base_addr)
-+/// Will only succeed if there exists a valid mapping for the input VA.
-+pub fn try_virt_to_phys(virt: Address<Virtual>) -> Result<Address<Physical>, TranslationError> {
-+    arch_mmu::mmu().try_virt_to_phys(virt)
++/// Try to translate a kernel virtual address to a physical address.
++///
++/// Will only succeed if there exists a valid mapping for the input address.
++fn try_kernel_virt_addr_to_phys_addr(
++    virt_addr: Address<Virtual>,
++) -> Result<Address<Physical>, &'static str> {
++    bsp::memory::mmu::kernel_translation_tables()
++        .read(|tables| tables.try_virt_addr_to_phys_addr(virt_addr))
  }
 
  /// Enable the MMU and data + instruction caching.
-@@ -236,6 +252,7 @@
+@@ -236,6 +259,7 @@
  /// # Safety
  ///
  /// - Crucial function during kernel init. Changes the the complete memory view of the processor.
@@ -1522,29 +1591,39 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs 15_virtual_mem_part3
 diff -uNr 14_virtual_mem_part2_mmio_remap/src/memory.rs 15_virtual_mem_part3_precomputed_tables/src/memory.rs
 --- 14_virtual_mem_part2_mmio_remap/src/memory.rs
 +++ 15_virtual_mem_part3_precomputed_tables/src/memory.rs
-@@ -8,6 +8,7 @@
+@@ -6,12 +6,13 @@
+
+ pub mod mmu;
 
- use crate::common;
+-use crate::common;
++use crate::{bsp, common};
  use core::{
-+    convert::TryFrom,
      fmt,
      marker::PhantomData,
      ops::{AddAssign, SubAssign},
-@@ -67,6 +68,14 @@
-     }
- }
+ };
++use mmu::Page;
 
-+impl TryFrom<Address<Virtual>> for Address<Physical> {
-+    type Error = mmu::TranslationError;
+ //--------------------------------------------------------------------------------------------------
+ // Public Definitions
+@@ -65,6 +66,17 @@
+     pub const fn into_usize(self) -> usize {
+         self.value
+     }
 +
-+    fn try_from(virt: Address<Virtual>) -> Result<Self, Self::Error> {
-+        mmu::try_virt_to_phys(virt)
++    /// Return a pointer to the page that contains this address.
++    pub const fn as_page_ptr(&self) -> *const Page<ATYPE> {
++        self.align_down(bsp::memory::mmu::KernelGranule::SIZE)
++            .into_usize() as *const _
 +    }
-+}
 +
- impl<ATYPE: AddressType> core::ops::Add<usize> for Address<ATYPE> {
-     type Output = Self;
++    /// Return the address' offset into the underlying page.
++    pub const fn offset_into_page(&self) -> usize {
++        self.value & bsp::memory::mmu::KernelGranule::MASK
++    }
+ }
 
+ impl<ATYPE: AddressType> core::ops::Add<usize> for Address<ATYPE> {
 
 diff -uNr 14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs 15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs
 --- 14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu.rs
index 86b5337c4..2cad10b76 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu.rs
@@ -15,7 +15,7 @@
 
 use crate::{
     bsp, memory,
-    memory::{mmu::TranslationGranule, Address, Physical, Virtual},
+    memory::{mmu::TranslationGranule, Address, Physical},
 };
 use core::intrinsics::unlikely;
 use cortex_a::{asm::barrier, registers::*};
@@ -109,7 +109,7 @@ pub fn mmu() -> &'static impl memory::mmu::interface::MMU {
 //------------------------------------------------------------------------------
 // OS Interface Code
 //------------------------------------------------------------------------------
-use memory::mmu::{MMUEnableError, TranslationError};
+use memory::mmu::MMUEnableError;
 
 impl memory::mmu::interface::MMU for MemoryManagementUnit {
     unsafe fn enable_mmu_and_caching(
@@ -153,31 +153,4 @@ impl memory::mmu::interface::MMU for MemoryManagementUnit {
     fn is_enabled(&self) -> bool {
         SCTLR_EL1.matches_all(SCTLR_EL1::M::Enable)
     }
-
-    fn try_virt_to_phys(
-        &self,
-        virt: Address<Virtual>,
-    ) -> Result<Address<Physical>, TranslationError> {
-        if !self.is_enabled() {
-            return Err(TranslationError::MMUDisabled);
-        }
-
-        let addr = virt.into_usize() as u64;
-        unsafe {
-            asm!(
-            "AT S1E1R, {0}",
-            in(reg) addr,
-            options(readonly, nostack, preserves_flags)
-            );
-        }
-
-        let par_el1 = PAR_EL1.extract();
-        if par_el1.matches_all(PAR_EL1::F::TranslationAborted) {
-            return Err(TranslationError::Aborted);
-        }
-
-        let phys_addr = (par_el1.read(PAR_EL1::PA) << 12) | (addr & 0xFFF);
-
-        Ok(Address::new(phys_addr as usize))
-    }
 }
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs
index d4fa1f39b..222f15cee 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -23,7 +23,7 @@ use crate::{
         Address, Physical, Virtual,
     },
 };
-use core::convert::{self, TryInto};
+use core::convert;
 use tock_registers::{
     interfaces::{Readable, Writeable},
     register_bitfields,
@@ -219,6 +219,35 @@ impl convert::From<AttributeFields>
     }
 }
 
+/// Convert the HW-specific attributes of the MMU to kernel's generic memory attributes.
+impl convert::TryFrom<InMemoryRegister<u64, STAGE1_PAGE_DESCRIPTOR::Register>> for AttributeFields {
+    type Error = &'static str;
+
+    fn try_from(
+        desc: InMemoryRegister<u64, STAGE1_PAGE_DESCRIPTOR::Register>,
+    ) -> Result<AttributeFields, Self::Error> {
+        let mem_attributes = match desc.read(STAGE1_PAGE_DESCRIPTOR::AttrIndx) {
+            memory::mmu::arch_mmu::mair::NORMAL => MemAttributes::CacheableDRAM,
+            memory::mmu::arch_mmu::mair::DEVICE => MemAttributes::Device,
+            _ => return Err("Unexpected memory attribute"),
+        };
+
+        let acc_perms = match desc.read_as_enum(STAGE1_PAGE_DESCRIPTOR::AP) {
+            Some(STAGE1_PAGE_DESCRIPTOR::AP::Value::RO_EL1) => AccessPermissions::ReadOnly,
+            Some(STAGE1_PAGE_DESCRIPTOR::AP::Value::RW_EL1) => AccessPermissions::ReadWrite,
+            _ => return Err("Unexpected access permission"),
+        };
+
+        let execute_never = desc.read(STAGE1_PAGE_DESCRIPTOR::PXN) > 0;
+
+        Ok(AttributeFields {
+            mem_attributes,
+            acc_perms,
+            execute_never,
+        })
+    }
+}
+
 impl PageDescriptor {
     /// Create an instance.
     ///
@@ -228,13 +257,13 @@ impl PageDescriptor {
     }
 
     /// Create an instance.
-    pub fn from_output_addr(
-        phys_output_addr: *const Page<Physical>,
+    pub fn from_output_page(
+        phys_output_page: *const Page<Physical>,
         attribute_fields: &AttributeFields,
     ) -> Self {
         let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
 
-        let shifted = phys_output_addr as u64 >> Granule64KiB::SHIFT;
+        let shifted = phys_output_page as u64 >> Granule64KiB::SHIFT;
         val.write(
             STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted)
                 + STAGE1_PAGE_DESCRIPTOR::AF::True
@@ -251,6 +280,20 @@ impl PageDescriptor {
         InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(self.value)
             .is_set(STAGE1_PAGE_DESCRIPTOR::VALID)
     }
+
+    /// Returns the output page.
+    fn output_page(&self) -> *const Page<Physical> {
+        let shifted = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(self.value)
+            .read(STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB);
+        let addr = shifted << Granule64KiB::SHIFT;
+
+        addr as *const Page<Physical>
+    }
+
+    /// Returns the attributes.
+    fn try_attributes(&self) -> Result<AttributeFields, &'static str> {
+        InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(self.value).try_into()
+    }
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -316,11 +359,11 @@ impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
 
     /// Helper to calculate the lvl2 and lvl3 indices from an address.
     #[inline(always)]
-    fn lvl2_lvl3_index_from(
+    fn lvl2_lvl3_index_from_page(
         &self,
-        addr: *const Page<Virtual>,
+        virt_page: *const Page<Virtual>,
     ) -> Result<(usize, usize), &'static str> {
-        let addr = addr as usize;
+        let addr = virt_page as usize;
         let lvl2_index = addr >> Granule512MiB::SHIFT;
         let lvl3_index = (addr & Granule512MiB::MASK) >> Granule64KiB::SHIFT;
 
@@ -331,15 +374,36 @@ impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
         Ok((lvl2_index, lvl3_index))
     }
 
-    /// Returns the PageDescriptor corresponding to the supplied Page.
+    /// Returns the PageDescriptor corresponding to the supplied page address.
     #[inline(always)]
-    fn page_descriptor_from(
+    fn page_descriptor_from_page(
+        &self,
+        virt_page: *const Page<Virtual>,
+    ) -> Result<&PageDescriptor, &'static str> {
+        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page(virt_page)?;
+        let desc = &self.lvl3[lvl2_index][lvl3_index];
+
+        Ok(desc)
+    }
+
+    /// Sets the PageDescriptor corresponding to the supplied page address.
+    ///
+    /// Doesn't allow overriding an already valid page.
+    #[inline(always)]
+    fn set_page_descriptor_from_page(
         &mut self,
-        addr: *const Page<Virtual>,
-    ) -> Result<&mut PageDescriptor, &'static str> {
-        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from(addr)?;
+        virt_page: *const Page<Virtual>,
+        new_desc: &PageDescriptor,
+    ) -> Result<(), &'static str> {
+        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page(virt_page)?;
+        let desc = &mut self.lvl3[lvl2_index][lvl3_index];
+
+        if desc.is_valid() {
+            return Err("Virtual page is already mapped");
+        }
 
-        Ok(&mut self.lvl3[lvl2_index][lvl3_index])
+        *desc = *new_desc;
+        Ok(())
     }
 }
 
@@ -357,13 +421,11 @@ impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::Transla
 
         // Populate the l2 entries.
         for (lvl2_nr, lvl2_entry) in self.lvl2.iter_mut().enumerate() {
-            let addr = self.lvl3[lvl2_nr]
-                .virt_start_addr()
-                .try_into()
-                .map_err(|_| "Translation error")?;
+            let virt_table_addr = self.lvl3[lvl2_nr].virt_start_addr();
+            let phys_table_addr = memory::mmu::try_kernel_virt_addr_to_phys_addr(virt_table_addr)?;
 
-            let desc = TableDescriptor::from_next_lvl_table_addr(addr);
-            *lvl2_entry = desc;
+            let new_desc = TableDescriptor::from_next_lvl_table_addr(phys_table_addr);
+            *lvl2_entry = new_desc;
         }
 
         self.cur_l3_mmio_index = Self::L3_MMIO_START_INDEX;
@@ -380,8 +442,8 @@ impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::Transla
     ) -> Result<(), &'static str> {
         assert!(self.initialized, "Translation tables not initialized");
 
-        let p = phys_pages.as_slice();
         let v = virt_pages.as_slice();
+        let p = phys_pages.as_slice();
 
         // No work to do for empty slices.
         if v.is_empty() {
@@ -398,12 +460,10 @@ impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::Transla
 
         let iter = p.iter().zip(v.iter());
         for (phys_page, virt_page) in iter {
-            let page_descriptor = self.page_descriptor_from(virt_page.as_ptr())?;
-            if page_descriptor.is_valid() {
-                return Err("Virtual page is already mapped");
-            }
+            let new_desc = PageDescriptor::from_output_page(phys_page.as_ptr(), attr);
+            let virt_page = virt_page.as_ptr();
 
-            *page_descriptor = PageDescriptor::from_output_addr(phys_page.as_ptr(), attr);
+            self.set_page_descriptor_from_page(virt_page, &new_desc)?;
         }
 
         Ok(())
@@ -444,6 +504,44 @@ impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::Transla
 
         false
     }
+
+    fn try_virt_page_to_phys_page(
+        &self,
+        virt_page: *const Page<Virtual>,
+    ) -> Result<*const Page<Physical>, &'static str> {
+        let page_desc = self.page_descriptor_from_page(virt_page)?;
+
+        if !page_desc.is_valid() {
+            return Err("Page marked invalid");
+        }
+
+        Ok(page_desc.output_page())
+    }
+
+    fn try_page_attributes(
+        &self,
+        virt_page: *const Page<Virtual>,
+    ) -> Result<AttributeFields, &'static str> {
+        let page_desc = self.page_descriptor_from_page(virt_page)?;
+
+        if !page_desc.is_valid() {
+            return Err("Page marked invalid");
+        }
+
+        page_desc.try_attributes()
+    }
+
+    /// Try to translate a virtual address to a physical address.
+    ///
+    /// Will only succeed if there exists a valid mapping for the input address.
+    fn try_virt_addr_to_phys_addr(
+        &self,
+        virt_addr: Address<Virtual>,
+    ) -> Result<Address<Physical>, &'static str> {
+        let page = self.try_virt_page_to_phys_page(virt_addr.as_page_ptr())?;
+
+        Ok(Address::new(page as usize + virt_addr.offset_into_page()))
+    }
 }
 
 //--------------------------------------------------------------------------------------------------
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs
index ab2f60ac7..588a57283 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs
@@ -9,14 +9,13 @@ use crate::{
     memory::{
         mmu as generic_mmu,
         mmu::{
-            AccessPermissions, AddressSpace, AssociatedTranslationTable, AttributeFields,
-            MemAttributes, Page, PageSliceDescriptor, TranslationGranule,
+            AddressSpace, AssociatedTranslationTable, AttributeFields, Page, PageSliceDescriptor,
+            TranslationGranule,
         },
-        Physical, Virtual,
+        Address, Physical, Virtual,
     },
     synchronization::InitStateLock,
 };
-use core::convert::TryInto;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -103,21 +102,19 @@ fn virt_boot_core_stack_page_desc() -> PageSliceDescriptor<Virtual> {
 }
 
 // There is no reason to expect the following conversions to fail, since they were generated offline
-// by the `translation table tool`. If it doesn't work, a panic due to the unwrap is justified.
-
-/// The Read+Execute (RX) pages of the kernel binary.
-fn phys_rx_page_desc() -> PageSliceDescriptor<Physical> {
-    virt_rx_page_desc().try_into().unwrap()
-}
-
-/// The Read+Write (RW) pages of the kernel binary.
-fn phys_rw_page_desc() -> PageSliceDescriptor<Physical> {
-    virt_rw_page_desc().try_into().unwrap()
+// by the `translation table tool`. If it doesn't work, a panic due to the unwraps is justified.
+fn kernel_virt_to_phys_page_slice(
+    virt_slice: PageSliceDescriptor<Virtual>,
+) -> PageSliceDescriptor<Physical> {
+    let phys_first_page =
+        generic_mmu::try_kernel_virt_page_to_phys_page(virt_slice.first_page()).unwrap();
+    let phys_start_addr = Address::new(phys_first_page as usize);
+
+    PageSliceDescriptor::from_addr(phys_start_addr, virt_slice.num_pages())
 }
 
-/// The boot core's stack.
-fn phys_boot_core_stack_page_desc() -> PageSliceDescriptor<Physical> {
-    virt_boot_core_stack_page_desc().try_into().unwrap()
+fn kernel_page_attributes(virt_page: *const Page<Virtual>) -> AttributeFields {
+    generic_mmu::try_kernel_page_attributes(virt_page).unwrap()
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -142,39 +139,28 @@ pub fn phys_addr_space_end_page() -> *const Page<Physical> {
 /// The actual translation table entries for the kernel binary are generated using the offline
 /// `translation table tool` and patched into the kernel binary. This function just adds the mapping
 /// record entries.
-///
-/// It must be ensured that these entries are in sync with the offline tool.
 pub fn kernel_add_mapping_records_for_precomputed() {
+    let virt_rx_page_desc = virt_rx_page_desc();
     generic_mmu::kernel_add_mapping_record(
         "Kernel code and RO data",
-        &virt_rx_page_desc(),
-        &phys_rx_page_desc(),
-        &AttributeFields {
-            mem_attributes: MemAttributes::CacheableDRAM,
-            acc_perms: AccessPermissions::ReadOnly,
-            execute_never: false,
-        },
+        &virt_rx_page_desc,
+        &kernel_virt_to_phys_page_slice(virt_rx_page_desc),
+        &kernel_page_attributes(virt_rx_page_desc.first_page()),
     );
 
+    let virt_rw_page_desc = virt_rw_page_desc();
     generic_mmu::kernel_add_mapping_record(
         "Kernel data and bss",
-        &virt_rw_page_desc(),
-        &phys_rw_page_desc(),
-        &AttributeFields {
-            mem_attributes: MemAttributes::CacheableDRAM,
-            acc_perms: AccessPermissions::ReadWrite,
-            execute_never: true,
-        },
+        &virt_rw_page_desc,
+        &kernel_virt_to_phys_page_slice(virt_rw_page_desc),
+        &kernel_page_attributes(virt_rw_page_desc.first_page()),
     );
 
+    let virt_boot_core_stack_page_desc = virt_boot_core_stack_page_desc();
     generic_mmu::kernel_add_mapping_record(
         "Kernel boot-core stack",
-        &virt_boot_core_stack_page_desc(),
-        &phys_boot_core_stack_page_desc(),
-        &AttributeFields {
-            mem_attributes: MemAttributes::CacheableDRAM,
-            acc_perms: AccessPermissions::ReadWrite,
-            execute_never: true,
-        },
+        &virt_boot_core_stack_page_desc,
+        &kernel_virt_to_phys_page_slice(virt_boot_core_stack_page_desc),
+        &kernel_page_attributes(virt_boot_core_stack_page_desc.first_page()),
     );
 }
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory.rs b/15_virtual_mem_part3_precomputed_tables/src/memory.rs
index 4ac969040..1780e7d4f 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/memory.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/memory.rs
@@ -6,13 +6,13 @@
 
 pub mod mmu;
 
-use crate::common;
+use crate::{bsp, common};
 use core::{
-    convert::TryFrom,
     fmt,
     marker::PhantomData,
     ops::{AddAssign, SubAssign},
 };
+use mmu::Page;
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -66,13 +66,16 @@ impl<ATYPE: AddressType> Address<ATYPE> {
     pub const fn into_usize(self) -> usize {
         self.value
     }
-}
 
-impl TryFrom<Address<Virtual>> for Address<Physical> {
-    type Error = mmu::TranslationError;
+    /// Return a pointer to the page that contains this address.
+    pub const fn as_page_ptr(&self) -> *const Page<ATYPE> {
+        self.align_down(bsp::memory::mmu::KernelGranule::SIZE)
+            .into_usize() as *const _
+    }
 
-    fn try_from(virt: Address<Virtual>) -> Result<Self, Self::Error> {
-        mmu::try_virt_to_phys(virt)
+    /// Return the address' offset into the underlying page.
+    pub const fn offset_into_page(&self) -> usize {
+        self.value & bsp::memory::mmu::KernelGranule::MASK
     }
 }
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs
index 106d3a902..3c3e51768 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs
@@ -33,14 +33,6 @@ pub enum MMUEnableError {
     Other(&'static str),
 }
 
-/// Translation error variants.
-#[allow(missing_docs)]
-#[derive(Debug)]
-pub enum TranslationError {
-    MMUDisabled,
-    Aborted,
-}
-
 /// Memory Management interfaces.
 pub mod interface {
     use super::*;
@@ -59,14 +51,6 @@ pub mod interface {
 
         /// Returns true if the MMU is enabled, false otherwise.
         fn is_enabled(&self) -> bool;
-
-        /// Try to translate a virtual address to a physical address.
-        ///
-        /// Will only succeed if there exists a valid mapping for the input VA.
-        fn try_virt_to_phys(
-            &self,
-            virt: Address<Virtual>,
-        ) -> Result<Address<Physical>, TranslationError>;
     }
 }
 
@@ -240,11 +224,34 @@ pub unsafe fn kernel_map_mmio(
     Ok(virt_addr + offset_into_start_page)
 }
 
-/// Try to translate a virtual address to a physical address.
+/// Try to translate a kernel virtual page pointer to a physical page pointer.
+///
+/// Will only succeed if there exists a valid mapping for the input page.
+pub fn try_kernel_virt_page_to_phys_page(
+    virt_page: *const Page<Virtual>,
+) -> Result<*const Page<Physical>, &'static str> {
+    bsp::memory::mmu::kernel_translation_tables()
+        .read(|tables| tables.try_virt_page_to_phys_page(virt_page))
+}
+
+/// Try to get the attributes of a kernel page.
+///
+/// Will only succeed if there exists a valid mapping for the input page.
+pub fn try_kernel_page_attributes(
+    virt_page: *const Page<Virtual>,
+) -> Result<AttributeFields, &'static str> {
+    bsp::memory::mmu::kernel_translation_tables()
+        .read(|tables| tables.try_page_attributes(virt_page))
+}
+
+/// Try to translate a kernel virtual address to a physical address.
 ///
-/// Will only succeed if there exists a valid mapping for the input VA.
-pub fn try_virt_to_phys(virt: Address<Virtual>) -> Result<Address<Physical>, TranslationError> {
-    arch_mmu::mmu().try_virt_to_phys(virt)
+/// Will only succeed if there exists a valid mapping for the input address.
+fn try_kernel_virt_addr_to_phys_addr(
+    virt_addr: Address<Virtual>,
+) -> Result<Address<Physical>, &'static str> {
+    bsp::memory::mmu::kernel_translation_tables()
+        .read(|tables| tables.try_virt_addr_to_phys_addr(virt_addr))
 }
 
 /// Enable the MMU and data + instruction caching.
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/translation_table.rs b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/translation_table.rs
index bf9bed8cb..bda05c7d8 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/translation_table.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/translation_table.rs
@@ -10,7 +10,7 @@ mod arch_translation_table;
 
 use crate::memory::{
     mmu::{AttributeFields, PageSliceDescriptor},
-    Physical, Virtual,
+    Address, Page, Physical, Virtual,
 };
 
 //--------------------------------------------------------------------------------------------------
@@ -67,6 +67,30 @@ pub mod interface {
 
         /// Check if a virtual page splice is in the "MMIO region".
         fn is_virt_page_slice_mmio(&self, virt_pages: &PageSliceDescriptor<Virtual>) -> bool;
+
+        /// Try to translate a virtual page pointer to a physical page pointer.
+        ///
+        /// Will only succeed if there exists a valid mapping for the input page.
+        fn try_virt_page_to_phys_page(
+            &self,
+            virt_page: *const Page<Virtual>,
+        ) -> Result<*const Page<Physical>, &'static str>;
+
+        /// Try to get the attributes of a page.
+        ///
+        /// Will only succeed if there exists a valid mapping for the input page.
+        fn try_page_attributes(
+            &self,
+            virt_page: *const Page<Virtual>,
+        ) -> Result<AttributeFields, &'static str>;
+
+        /// Try to translate a virtual address to a physical address.
+        ///
+        /// Will only succeed if there exists a valid mapping for the input address.
+        fn try_virt_addr_to_phys_addr(
+            &self,
+            virt_addr: Address<Virtual>,
+        ) -> Result<Address<Physical>, &'static str>;
     }
 }
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs
index dc05fd70c..b14089ed2 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs
@@ -6,12 +6,9 @@
 
 use crate::{
     bsp, common,
-    memory::{Address, AddressType, Physical, Virtual},
-};
-use core::{
-    convert::{From, TryFrom},
-    marker::PhantomData,
+    memory::{Address, AddressType, Physical},
 };
+use core::{convert::From, marker::PhantomData};
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -95,11 +92,11 @@ impl<ATYPE: AddressType> PageSliceDescriptor<ATYPE> {
     }
 
     /// Return a pointer to the first page of the described slice.
-    const fn first_page_ptr(&self) -> *const Page<ATYPE> {
+    pub const fn first_page(&self) -> *const Page<ATYPE> {
         self.start.into_usize() as *const _
     }
 
-    /// Return the number of Pages the slice describes.
+    /// Return the number of pages the slice describes.
     pub const fn num_pages(&self) -> usize {
         self.num_pages
     }
@@ -129,26 +126,13 @@ impl<ATYPE: AddressType> PageSliceDescriptor<ATYPE> {
         (addr >= self.start_addr()) && (addr <= self.end_addr_inclusive())
     }
 
-    /// Return a non-mutable slice of Pages.
+    /// Return a non-mutable slice of pages.
     ///
     /// # Safety
     ///
     /// - Same as applies for `core::slice::from_raw_parts`.
     pub unsafe fn as_slice(&self) -> &[Page<ATYPE>] {
-        core::slice::from_raw_parts(self.first_page_ptr(), self.num_pages)
-    }
-}
-
-impl TryFrom<PageSliceDescriptor<Virtual>> for PageSliceDescriptor<Physical> {
-    type Error = super::TranslationError;
-
-    fn try_from(desc: PageSliceDescriptor<Virtual>) -> Result<Self, Self::Error> {
-        let phys_start = super::try_virt_to_phys(desc.start)?;
-
-        Ok(Self {
-            start: phys_start,
-            num_pages: desc.num_pages,
-        })
+        core::slice::from_raw_parts(self.first_page(), self.num_pages)
     }
 }
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/README.md b/16_virtual_mem_part4_higher_half_kernel/README.md
index 28005223c..8eeee7c3b 100644
--- a/16_virtual_mem_part4_higher_half_kernel/README.md
+++ b/16_virtual_mem_part4_higher_half_kernel/README.md
@@ -144,7 +144,7 @@ Precomputing kernel translation tables and patching kernel ELF
   Generating Boot-core stack  | 0xffff_ffff_8010_0000 | 512 KiB
              --------------------------------------------------
     Patching Kernel table struct at physical 0x9_0000
-    Patching Value of kernel table physical base address (0xd_0000) at physical 0x8_0060
+    Patching Value of kernel table physical base address (0xd_0000) at physical 0x8_0080
     Finished in 0.03s
 
 Minipush 1.0
@@ -152,6 +152,7 @@ Minipush 1.0
 [MP] ⏳ Waiting for /dev/ttyUSB0
 [MP] ✅ Serial connected
 [MP] 🔌 Please power the target now
+
  __  __ _      _ _                 _
 |  \/  (_)_ _ (_) |   ___  __ _ __| |
 | |\/| | | ' \| | |__/ _ \/ _` / _` |
@@ -163,19 +164,20 @@ Minipush 1.0
 [MP] ⏩ Pushing 387 KiB =======================================🦀 100% 96 KiB/s Time: 00:00:04
 [ML] Loaded! Executing the payload now
 
-[    4.316420] mingo version 0.16.0
-[    4.316627] Booting on: Raspberry Pi 3
-[    4.317082] MMU online:
-[    4.317375]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    4.319119]                         Virtual                                   Physical               Size       Attr                    Entity
-[    4.320863]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    4.322610]       0xffff_ffff_8008_0000..0xffff_ffff_8008_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
-[    4.324223]       0xffff_ffff_8009_0000..0xffff_ffff_800e_ffff --> 0x00_0009_0000..0x00_000e_ffff | 384 KiB | C   RW XN | Kernel data and bss
-[    4.325793]       0xffff_ffff_8010_0000..0xffff_ffff_8017_ffff --> 0x00_0010_0000..0x00_0017_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
-[    4.327397]       0xffff_ffff_f000_0000..0xffff_ffff_f000_ffff --> 0x00_3f20_0000..0x00_3f20_ffff |  64 KiB | Dev RW XN | BCM GPIO
-[    4.328847]                                                                                                             | BCM PL011 UART
-[    4.330365]       0xffff_ffff_f001_0000..0xffff_ffff_f001_ffff --> 0x00_3f00_0000..0x00_3f00_ffff |  64 KiB | Dev RW XN | BCM Peripheral Interrupt Controller
-[    4.332108]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    4.318584] mingo version 0.16.0
+[    4.318792] Booting on: Raspberry Pi 3
+[    4.319247] MMU online:
+[    4.319540]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    4.321284]                         Virtual                                   Physical               Size       Attr                    Entity
+[    4.323028]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    4.324773]       0xffff_ffff_8008_0000..0xffff_ffff_8008_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
+[    4.326387]       0xffff_ffff_8009_0000..0xffff_ffff_800e_ffff --> 0x00_0009_0000..0x00_000e_ffff | 384 KiB | C   RW XN | Kernel data and bss
+[    4.327957]       0xffff_ffff_8010_0000..0xffff_ffff_8017_ffff --> 0x00_0010_0000..0x00_0017_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
+[    4.329560]       0xffff_ffff_f000_0000..0xffff_ffff_f000_ffff --> 0x00_3f20_0000..0x00_3f20_ffff |  64 KiB | Dev RW XN | BCM GPIO
+[    4.331012]                                                                                                             | BCM PL011 UART
+[    4.332529]       0xffff_ffff_f001_0000..0xffff_ffff_f001_ffff --> 0x00_3f00_0000..0x00_3f00_ffff |  64 KiB | Dev RW XN | BCM Peripheral Interrupt Controller
+[    4.334273]       -------------------------------------------------------------------------------------------------------------------------------------------
+
 ```
 
 Raspberry Pi 4:
@@ -189,18 +191,20 @@ Precomputing kernel translation tables and patching kernel ELF
                  Section           Start Virt Addr       Size
              --------------------------------------------------
   Generating Code and RO data | 0xffff_ffff_8008_0000 |  64 KiB
-  Generating Data and bss     | 0xffff_ffff_8009_0000 | 448 KiB
-  Generating Boot-core stack  | 0xffff_ffff_8011_0000 | 512 KiB
+  Generating Data and bss     | 0xffff_ffff_8009_0000 | 384 KiB
+  Generating Boot-core stack  | 0xffff_ffff_8010_0000 | 512 KiB
              --------------------------------------------------
-    Patching Kernel table struct at physical 0xa_0000
-    Patching Value of kernel table physical base address (0xe_0000) at physical 0x8_0068
+    Patching Kernel table struct at physical 0x9_0000
+    Patching Value of kernel table physical base address (0xd_0000) at physical 0x8_0080
     Finished in 0.03s
 
+
 Minipush 1.0
 
 [MP] ⏳ Waiting for /dev/ttyUSB0
 [MP] ✅ Serial connected
 [MP] 🔌 Please power the target now
+
  __  __ _      _ _                 _
 |  \/  (_)_ _ (_) |   ___  __ _ __| |
 | |\/| | | ' \| | |__/ _ \/ _` / _` |
@@ -209,23 +213,24 @@ Minipush 1.0
            Raspberry Pi 4
 
 [ML] Requesting binary
-[MP] ⏩ Pushing 449 KiB ======================================🦀 100% 112 KiB/s Time: 00:00:04
+[MP] ⏩ Pushing 394 KiB =======================================🦀 100% 98 KiB/s Time: 00:00:04
 [ML] Loaded! Executing the payload now
 
-[    5.009551] mingo version 0.16.0
-[    5.009585] Booting on: Raspberry Pi 4
-[    5.010040] MMU online:
-[    5.010332]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    5.012077]                         Virtual                                   Physical               Size       Attr                    Entity
-[    5.013821]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    5.015566]       0xffff_ffff_8008_0000..0xffff_ffff_8008_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
-[    5.017181]       0xffff_ffff_8009_0000..0xffff_ffff_800f_ffff --> 0x00_0009_0000..0x00_000f_ffff | 448 KiB | C   RW XN | Kernel data and bss
-[    5.018751]       0xffff_ffff_8011_0000..0xffff_ffff_8018_ffff --> 0x00_0011_0000..0x00_0018_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
-[    5.020354]       0xffff_ffff_f000_0000..0xffff_ffff_f000_ffff --> 0x00_fe20_0000..0x00_fe20_ffff |  64 KiB | Dev RW XN | BCM GPIO
-[    5.021805]                                                                                                             | BCM PL011 UART
-[    5.023322]       0xffff_ffff_f001_0000..0xffff_ffff_f001_ffff --> 0x00_ff84_0000..0x00_ff84_ffff |  64 KiB | Dev RW XN | GICD
-[    5.024730]                                                                                                             | GICC
-[    5.026138]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    4.401227] mingo version 0.16.0
+[    4.401260] Booting on: Raspberry Pi 4
+[    4.401715] MMU online:
+[    4.402008]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    4.403752]                         Virtual                                   Physical               Size       Attr                    Entity
+[    4.405496]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    4.407241]       0xffff_ffff_8008_0000..0xffff_ffff_8008_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
+[    4.408855]       0xffff_ffff_8009_0000..0xffff_ffff_800e_ffff --> 0x00_0009_0000..0x00_000e_ffff | 384 KiB | C   RW XN | Kernel data and bss
+[    4.410425]       0xffff_ffff_8010_0000..0xffff_ffff_8017_ffff --> 0x00_0010_0000..0x00_0017_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
+[    4.412028]       0xffff_ffff_f000_0000..0xffff_ffff_f000_ffff --> 0x00_fe20_0000..0x00_fe20_ffff |  64 KiB | Dev RW XN | BCM GPIO
+[    4.413480]                                                                                                             | BCM PL011 UART
+[    4.414997]       0xffff_ffff_f001_0000..0xffff_ffff_f001_ffff --> 0x00_ff84_0000..0x00_ff84_ffff |  64 KiB | Dev RW XN | GICD
+[    4.416405]                                                                                                             | GICC
+[    4.417814]       -------------------------------------------------------------------------------------------------------------------------------------------
+
 ```
 
 ## Diff to previous
@@ -361,7 +366,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/t
      /// Page descriptors, covering 64 KiB windows per entry.
      lvl3: [[PageDescriptor; 8192]; NUM_TABLES],
 
-@@ -262,14 +262,23 @@
+@@ -305,14 +305,23 @@
  where
      [u8; Self::SIZE >> Granule512MiB::SHIFT]: Sized,
  {
@@ -387,7 +392,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/t
      /// Create an instance.
      #[allow(clippy::assertions_on_constants)]
      const fn _new(for_precompute: bool) -> Self {
-@@ -298,20 +307,32 @@
+@@ -341,20 +350,32 @@
      /// The start address of the table's MMIO range.
      #[inline(always)]
      fn mmio_start_addr(&self) -> Address<Virtual> {
@@ -424,12 +429,12 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/t
      }
 
      /// Helper to calculate the lvl2 and lvl3 indices from an address.
-@@ -320,7 +341,12 @@
+@@ -363,7 +384,12 @@
          &self,
-         addr: *const Page<Virtual>,
+         virt_page: *const Page<Virtual>,
      ) -> Result<(usize, usize), &'static str> {
--        let addr = addr as usize;
-+        let mut addr = addr as usize;
+-        let addr = virt_page as usize;
++        let mut addr = virt_page as usize;
 +
 +        if START_FROM_TOP {
 +            addr -= Self::START_FROM_TOP_OFFSET.into_usize()
@@ -438,7 +443,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/t
          let lvl2_index = addr >> Granule512MiB::SHIFT;
          let lvl3_index = (addr & Granule512MiB::MASK) >> Granule64KiB::SHIFT;
 
-@@ -347,8 +373,9 @@
+@@ -411,8 +437,9 @@
  // OS Interface Code
  //------------------------------------------------------------------------------
 
@@ -450,7 +455,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/t
  {
      fn init(&mut self) -> Result<(), &'static str> {
          if self.initialized {
-@@ -423,12 +450,16 @@
+@@ -483,12 +510,16 @@
              return Err("Not enough MMIO space left");
          }
 
@@ -468,7 +473,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/t
          Ok(PageSliceDescriptor::from_addr(addr, num_pages))
      }
 
-@@ -451,7 +482,7 @@
+@@ -549,7 +580,7 @@
  //--------------------------------------------------------------------------------------------------
 
  #[cfg(test)]
@@ -571,7 +576,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld 16
 diff -uNr 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs
 --- 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs
 +++ 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs
-@@ -23,7 +23,7 @@
+@@ -22,7 +22,7 @@
  //--------------------------------------------------------------------------------------------------
 
  type KernelTranslationTable =
@@ -600,7 +605,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/lib.rs 16_virtual_mem_part
 diff -uNr 15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs 16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs
 --- 15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs
 +++ 16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs
-@@ -80,6 +80,11 @@
+@@ -64,6 +64,11 @@
  pub trait AssociatedTranslationTable {
      /// A translation table whose address range is:
      ///
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu.rs
index 830fb9daf..84191af9f 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu.rs
@@ -15,7 +15,7 @@
 
 use crate::{
     bsp, memory,
-    memory::{mmu::TranslationGranule, Address, Physical, Virtual},
+    memory::{mmu::TranslationGranule, Address, Physical},
 };
 use core::intrinsics::unlikely;
 use cortex_a::{asm::barrier, registers::*};
@@ -111,7 +111,7 @@ pub fn mmu() -> &'static impl memory::mmu::interface::MMU {
 //------------------------------------------------------------------------------
 // OS Interface Code
 //------------------------------------------------------------------------------
-use memory::mmu::{MMUEnableError, TranslationError};
+use memory::mmu::MMUEnableError;
 
 impl memory::mmu::interface::MMU for MemoryManagementUnit {
     unsafe fn enable_mmu_and_caching(
@@ -155,31 +155,4 @@ impl memory::mmu::interface::MMU for MemoryManagementUnit {
     fn is_enabled(&self) -> bool {
         SCTLR_EL1.matches_all(SCTLR_EL1::M::Enable)
     }
-
-    fn try_virt_to_phys(
-        &self,
-        virt: Address<Virtual>,
-    ) -> Result<Address<Physical>, TranslationError> {
-        if !self.is_enabled() {
-            return Err(TranslationError::MMUDisabled);
-        }
-
-        let addr = virt.into_usize() as u64;
-        unsafe {
-            asm!(
-            "AT S1E1R, {0}",
-            in(reg) addr,
-            options(readonly, nostack, preserves_flags)
-            );
-        }
-
-        let par_el1 = PAR_EL1.extract();
-        if par_el1.matches_all(PAR_EL1::F::TranslationAborted) {
-            return Err(TranslationError::Aborted);
-        }
-
-        let phys_addr = (par_el1.read(PAR_EL1::PA) << 12) | (addr & 0xFFF);
-
-        Ok(Address::new(phys_addr as usize))
-    }
 }
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
index 662ee3ee5..ead8a9902 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -23,7 +23,7 @@ use crate::{
         Address, Physical, Virtual,
     },
 };
-use core::convert::{self, TryInto};
+use core::convert;
 use tock_registers::{
     interfaces::{Readable, Writeable},
     register_bitfields,
@@ -219,6 +219,35 @@ impl convert::From<AttributeFields>
     }
 }
 
+/// Convert the HW-specific attributes of the MMU to kernel's generic memory attributes.
+impl convert::TryFrom<InMemoryRegister<u64, STAGE1_PAGE_DESCRIPTOR::Register>> for AttributeFields {
+    type Error = &'static str;
+
+    fn try_from(
+        desc: InMemoryRegister<u64, STAGE1_PAGE_DESCRIPTOR::Register>,
+    ) -> Result<AttributeFields, Self::Error> {
+        let mem_attributes = match desc.read(STAGE1_PAGE_DESCRIPTOR::AttrIndx) {
+            memory::mmu::arch_mmu::mair::NORMAL => MemAttributes::CacheableDRAM,
+            memory::mmu::arch_mmu::mair::DEVICE => MemAttributes::Device,
+            _ => return Err("Unexpected memory attribute"),
+        };
+
+        let acc_perms = match desc.read_as_enum(STAGE1_PAGE_DESCRIPTOR::AP) {
+            Some(STAGE1_PAGE_DESCRIPTOR::AP::Value::RO_EL1) => AccessPermissions::ReadOnly,
+            Some(STAGE1_PAGE_DESCRIPTOR::AP::Value::RW_EL1) => AccessPermissions::ReadWrite,
+            _ => return Err("Unexpected access permission"),
+        };
+
+        let execute_never = desc.read(STAGE1_PAGE_DESCRIPTOR::PXN) > 0;
+
+        Ok(AttributeFields {
+            mem_attributes,
+            acc_perms,
+            execute_never,
+        })
+    }
+}
+
 impl PageDescriptor {
     /// Create an instance.
     ///
@@ -228,13 +257,13 @@ impl PageDescriptor {
     }
 
     /// Create an instance.
-    pub fn from_output_addr(
-        phys_output_addr: *const Page<Physical>,
+    pub fn from_output_page(
+        phys_output_page: *const Page<Physical>,
         attribute_fields: &AttributeFields,
     ) -> Self {
         let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
 
-        let shifted = phys_output_addr as u64 >> Granule64KiB::SHIFT;
+        let shifted = phys_output_page as u64 >> Granule64KiB::SHIFT;
         val.write(
             STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted)
                 + STAGE1_PAGE_DESCRIPTOR::AF::True
@@ -251,6 +280,20 @@ impl PageDescriptor {
         InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(self.value)
             .is_set(STAGE1_PAGE_DESCRIPTOR::VALID)
     }
+
+    /// Returns the output page.
+    fn output_page(&self) -> *const Page<Physical> {
+        let shifted = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(self.value)
+            .read(STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB);
+        let addr = shifted << Granule64KiB::SHIFT;
+
+        addr as *const Page<Physical>
+    }
+
+    /// Returns the attributes.
+    fn try_attributes(&self) -> Result<AttributeFields, &'static str> {
+        InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(self.value).try_into()
+    }
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -337,11 +380,11 @@ impl<const NUM_TABLES: usize, const START_FROM_TOP: bool>
 
     /// Helper to calculate the lvl2 and lvl3 indices from an address.
     #[inline(always)]
-    fn lvl2_lvl3_index_from(
+    fn lvl2_lvl3_index_from_page(
         &self,
-        addr: *const Page<Virtual>,
+        virt_page: *const Page<Virtual>,
     ) -> Result<(usize, usize), &'static str> {
-        let mut addr = addr as usize;
+        let mut addr = virt_page as usize;
 
         if START_FROM_TOP {
             addr -= Self::START_FROM_TOP_OFFSET.into_usize()
@@ -357,15 +400,36 @@ impl<const NUM_TABLES: usize, const START_FROM_TOP: bool>
         Ok((lvl2_index, lvl3_index))
     }
 
-    /// Returns the PageDescriptor corresponding to the supplied Page.
+    /// Returns the PageDescriptor corresponding to the supplied page address.
     #[inline(always)]
-    fn page_descriptor_from(
+    fn page_descriptor_from_page(
+        &self,
+        virt_page: *const Page<Virtual>,
+    ) -> Result<&PageDescriptor, &'static str> {
+        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page(virt_page)?;
+        let desc = &self.lvl3[lvl2_index][lvl3_index];
+
+        Ok(desc)
+    }
+
+    /// Sets the PageDescriptor corresponding to the supplied page address.
+    ///
+    /// Doesn't allow overriding an already valid page.
+    #[inline(always)]
+    fn set_page_descriptor_from_page(
         &mut self,
-        addr: *const Page<Virtual>,
-    ) -> Result<&mut PageDescriptor, &'static str> {
-        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from(addr)?;
+        virt_page: *const Page<Virtual>,
+        new_desc: &PageDescriptor,
+    ) -> Result<(), &'static str> {
+        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page(virt_page)?;
+        let desc = &mut self.lvl3[lvl2_index][lvl3_index];
+
+        if desc.is_valid() {
+            return Err("Virtual page is already mapped");
+        }
 
-        Ok(&mut self.lvl3[lvl2_index][lvl3_index])
+        *desc = *new_desc;
+        Ok(())
     }
 }
 
@@ -384,13 +448,11 @@ impl<const NUM_TABLES: usize, const START_FROM_TOP: bool>
 
         // Populate the l2 entries.
         for (lvl2_nr, lvl2_entry) in self.lvl2.iter_mut().enumerate() {
-            let addr = self.lvl3[lvl2_nr]
-                .virt_start_addr()
-                .try_into()
-                .map_err(|_| "Translation error")?;
+            let virt_table_addr = self.lvl3[lvl2_nr].virt_start_addr();
+            let phys_table_addr = memory::mmu::try_kernel_virt_addr_to_phys_addr(virt_table_addr)?;
 
-            let desc = TableDescriptor::from_next_lvl_table_addr(addr);
-            *lvl2_entry = desc;
+            let new_desc = TableDescriptor::from_next_lvl_table_addr(phys_table_addr);
+            *lvl2_entry = new_desc;
         }
 
         self.cur_l3_mmio_index = Self::L3_MMIO_START_INDEX;
@@ -407,8 +469,8 @@ impl<const NUM_TABLES: usize, const START_FROM_TOP: bool>
     ) -> Result<(), &'static str> {
         assert!(self.initialized, "Translation tables not initialized");
 
-        let p = phys_pages.as_slice();
         let v = virt_pages.as_slice();
+        let p = phys_pages.as_slice();
 
         // No work to do for empty slices.
         if v.is_empty() {
@@ -425,12 +487,10 @@ impl<const NUM_TABLES: usize, const START_FROM_TOP: bool>
 
         let iter = p.iter().zip(v.iter());
         for (phys_page, virt_page) in iter {
-            let page_descriptor = self.page_descriptor_from(virt_page.as_ptr())?;
-            if page_descriptor.is_valid() {
-                return Err("Virtual page is already mapped");
-            }
+            let new_desc = PageDescriptor::from_output_page(phys_page.as_ptr(), attr);
+            let virt_page = virt_page.as_ptr();
 
-            *page_descriptor = PageDescriptor::from_output_addr(phys_page.as_ptr(), attr);
+            self.set_page_descriptor_from_page(virt_page, &new_desc)?;
         }
 
         Ok(())
@@ -475,6 +535,44 @@ impl<const NUM_TABLES: usize, const START_FROM_TOP: bool>
 
         false
     }
+
+    fn try_virt_page_to_phys_page(
+        &self,
+        virt_page: *const Page<Virtual>,
+    ) -> Result<*const Page<Physical>, &'static str> {
+        let page_desc = self.page_descriptor_from_page(virt_page)?;
+
+        if !page_desc.is_valid() {
+            return Err("Page marked invalid");
+        }
+
+        Ok(page_desc.output_page())
+    }
+
+    fn try_page_attributes(
+        &self,
+        virt_page: *const Page<Virtual>,
+    ) -> Result<AttributeFields, &'static str> {
+        let page_desc = self.page_descriptor_from_page(virt_page)?;
+
+        if !page_desc.is_valid() {
+            return Err("Page marked invalid");
+        }
+
+        page_desc.try_attributes()
+    }
+
+    /// Try to translate a virtual address to a physical address.
+    ///
+    /// Will only succeed if there exists a valid mapping for the input address.
+    fn try_virt_addr_to_phys_addr(
+        &self,
+        virt_addr: Address<Virtual>,
+    ) -> Result<Address<Physical>, &'static str> {
+        let page = self.try_virt_page_to_phys_page(virt_addr.as_page_ptr())?;
+
+        Ok(Address::new(page as usize + virt_addr.offset_into_page()))
+    }
 }
 
 //--------------------------------------------------------------------------------------------------
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs
index 34d220f0b..8e851a8de 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs
@@ -9,14 +9,13 @@ use crate::{
     memory::{
         mmu as generic_mmu,
         mmu::{
-            AccessPermissions, AddressSpace, AssociatedTranslationTable, AttributeFields,
-            MemAttributes, Page, PageSliceDescriptor, TranslationGranule,
+            AddressSpace, AssociatedTranslationTable, AttributeFields, Page, PageSliceDescriptor,
+            TranslationGranule,
         },
-        Physical, Virtual,
+        Address, Physical, Virtual,
     },
     synchronization::InitStateLock,
 };
-use core::convert::TryInto;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -103,21 +102,19 @@ fn virt_boot_core_stack_page_desc() -> PageSliceDescriptor<Virtual> {
 }
 
 // There is no reason to expect the following conversions to fail, since they were generated offline
-// by the `translation table tool`. If it doesn't work, a panic due to the unwrap is justified.
-
-/// The Read+Execute (RX) pages of the kernel binary.
-fn phys_rx_page_desc() -> PageSliceDescriptor<Physical> {
-    virt_rx_page_desc().try_into().unwrap()
-}
-
-/// The Read+Write (RW) pages of the kernel binary.
-fn phys_rw_page_desc() -> PageSliceDescriptor<Physical> {
-    virt_rw_page_desc().try_into().unwrap()
+// by the `translation table tool`. If it doesn't work, a panic due to the unwraps is justified.
+fn kernel_virt_to_phys_page_slice(
+    virt_slice: PageSliceDescriptor<Virtual>,
+) -> PageSliceDescriptor<Physical> {
+    let phys_first_page =
+        generic_mmu::try_kernel_virt_page_to_phys_page(virt_slice.first_page()).unwrap();
+    let phys_start_addr = Address::new(phys_first_page as usize);
+
+    PageSliceDescriptor::from_addr(phys_start_addr, virt_slice.num_pages())
 }
 
-/// The boot core's stack.
-fn phys_boot_core_stack_page_desc() -> PageSliceDescriptor<Physical> {
-    virt_boot_core_stack_page_desc().try_into().unwrap()
+fn kernel_page_attributes(virt_page: *const Page<Virtual>) -> AttributeFields {
+    generic_mmu::try_kernel_page_attributes(virt_page).unwrap()
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -142,39 +139,28 @@ pub fn phys_addr_space_end_page() -> *const Page<Physical> {
 /// The actual translation table entries for the kernel binary are generated using the offline
 /// `translation table tool` and patched into the kernel binary. This function just adds the mapping
 /// record entries.
-///
-/// It must be ensured that these entries are in sync with the offline tool.
 pub fn kernel_add_mapping_records_for_precomputed() {
+    let virt_rx_page_desc = virt_rx_page_desc();
     generic_mmu::kernel_add_mapping_record(
         "Kernel code and RO data",
-        &virt_rx_page_desc(),
-        &phys_rx_page_desc(),
-        &AttributeFields {
-            mem_attributes: MemAttributes::CacheableDRAM,
-            acc_perms: AccessPermissions::ReadOnly,
-            execute_never: false,
-        },
+        &virt_rx_page_desc,
+        &kernel_virt_to_phys_page_slice(virt_rx_page_desc),
+        &kernel_page_attributes(virt_rx_page_desc.first_page()),
     );
 
+    let virt_rw_page_desc = virt_rw_page_desc();
     generic_mmu::kernel_add_mapping_record(
         "Kernel data and bss",
-        &virt_rw_page_desc(),
-        &phys_rw_page_desc(),
-        &AttributeFields {
-            mem_attributes: MemAttributes::CacheableDRAM,
-            acc_perms: AccessPermissions::ReadWrite,
-            execute_never: true,
-        },
+        &virt_rw_page_desc,
+        &kernel_virt_to_phys_page_slice(virt_rw_page_desc),
+        &kernel_page_attributes(virt_rw_page_desc.first_page()),
     );
 
+    let virt_boot_core_stack_page_desc = virt_boot_core_stack_page_desc();
     generic_mmu::kernel_add_mapping_record(
         "Kernel boot-core stack",
-        &virt_boot_core_stack_page_desc(),
-        &phys_boot_core_stack_page_desc(),
-        &AttributeFields {
-            mem_attributes: MemAttributes::CacheableDRAM,
-            acc_perms: AccessPermissions::ReadWrite,
-            execute_never: true,
-        },
+        &virt_boot_core_stack_page_desc,
+        &kernel_virt_to_phys_page_slice(virt_boot_core_stack_page_desc),
+        &kernel_page_attributes(virt_boot_core_stack_page_desc.first_page()),
     );
 }
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory.rs b/16_virtual_mem_part4_higher_half_kernel/src/memory.rs
index 4ac969040..1780e7d4f 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/memory.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/memory.rs
@@ -6,13 +6,13 @@
 
 pub mod mmu;
 
-use crate::common;
+use crate::{bsp, common};
 use core::{
-    convert::TryFrom,
     fmt,
     marker::PhantomData,
     ops::{AddAssign, SubAssign},
 };
+use mmu::Page;
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -66,13 +66,16 @@ impl<ATYPE: AddressType> Address<ATYPE> {
     pub const fn into_usize(self) -> usize {
         self.value
     }
-}
 
-impl TryFrom<Address<Virtual>> for Address<Physical> {
-    type Error = mmu::TranslationError;
+    /// Return a pointer to the page that contains this address.
+    pub const fn as_page_ptr(&self) -> *const Page<ATYPE> {
+        self.align_down(bsp::memory::mmu::KernelGranule::SIZE)
+            .into_usize() as *const _
+    }
 
-    fn try_from(virt: Address<Virtual>) -> Result<Self, Self::Error> {
-        mmu::try_virt_to_phys(virt)
+    /// Return the address' offset into the underlying page.
+    pub const fn offset_into_page(&self) -> usize {
+        self.value & bsp::memory::mmu::KernelGranule::MASK
     }
 }
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs
index f9c40d35f..d4def2840 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs
@@ -33,14 +33,6 @@ pub enum MMUEnableError {
     Other(&'static str),
 }
 
-/// Translation error variants.
-#[allow(missing_docs)]
-#[derive(Debug)]
-pub enum TranslationError {
-    MMUDisabled,
-    Aborted,
-}
-
 /// Memory Management interfaces.
 pub mod interface {
     use super::*;
@@ -59,14 +51,6 @@ pub mod interface {
 
         /// Returns true if the MMU is enabled, false otherwise.
         fn is_enabled(&self) -> bool;
-
-        /// Try to translate a virtual address to a physical address.
-        ///
-        /// Will only succeed if there exists a valid mapping for the input VA.
-        fn try_virt_to_phys(
-            &self,
-            virt: Address<Virtual>,
-        ) -> Result<Address<Physical>, TranslationError>;
     }
 }
 
@@ -245,11 +229,34 @@ pub unsafe fn kernel_map_mmio(
     Ok(virt_addr + offset_into_start_page)
 }
 
-/// Try to translate a virtual address to a physical address.
+/// Try to translate a kernel virtual page pointer to a physical page pointer.
+///
+/// Will only succeed if there exists a valid mapping for the input page.
+pub fn try_kernel_virt_page_to_phys_page(
+    virt_page: *const Page<Virtual>,
+) -> Result<*const Page<Physical>, &'static str> {
+    bsp::memory::mmu::kernel_translation_tables()
+        .read(|tables| tables.try_virt_page_to_phys_page(virt_page))
+}
+
+/// Try to get the attributes of a kernel page.
+///
+/// Will only succeed if there exists a valid mapping for the input page.
+pub fn try_kernel_page_attributes(
+    virt_page: *const Page<Virtual>,
+) -> Result<AttributeFields, &'static str> {
+    bsp::memory::mmu::kernel_translation_tables()
+        .read(|tables| tables.try_page_attributes(virt_page))
+}
+
+/// Try to translate a kernel virtual address to a physical address.
 ///
-/// Will only succeed if there exists a valid mapping for the input VA.
-pub fn try_virt_to_phys(virt: Address<Virtual>) -> Result<Address<Physical>, TranslationError> {
-    arch_mmu::mmu().try_virt_to_phys(virt)
+/// Will only succeed if there exists a valid mapping for the input address.
+fn try_kernel_virt_addr_to_phys_addr(
+    virt_addr: Address<Virtual>,
+) -> Result<Address<Physical>, &'static str> {
+    bsp::memory::mmu::kernel_translation_tables()
+        .read(|tables| tables.try_virt_addr_to_phys_addr(virt_addr))
 }
 
 /// Enable the MMU and data + instruction caching.
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/translation_table.rs b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/translation_table.rs
index bf9bed8cb..bda05c7d8 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/translation_table.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/translation_table.rs
@@ -10,7 +10,7 @@ mod arch_translation_table;
 
 use crate::memory::{
     mmu::{AttributeFields, PageSliceDescriptor},
-    Physical, Virtual,
+    Address, Page, Physical, Virtual,
 };
 
 //--------------------------------------------------------------------------------------------------
@@ -67,6 +67,30 @@ pub mod interface {
 
         /// Check if a virtual page splice is in the "MMIO region".
         fn is_virt_page_slice_mmio(&self, virt_pages: &PageSliceDescriptor<Virtual>) -> bool;
+
+        /// Try to translate a virtual page pointer to a physical page pointer.
+        ///
+        /// Will only succeed if there exists a valid mapping for the input page.
+        fn try_virt_page_to_phys_page(
+            &self,
+            virt_page: *const Page<Virtual>,
+        ) -> Result<*const Page<Physical>, &'static str>;
+
+        /// Try to get the attributes of a page.
+        ///
+        /// Will only succeed if there exists a valid mapping for the input page.
+        fn try_page_attributes(
+            &self,
+            virt_page: *const Page<Virtual>,
+        ) -> Result<AttributeFields, &'static str>;
+
+        /// Try to translate a virtual address to a physical address.
+        ///
+        /// Will only succeed if there exists a valid mapping for the input address.
+        fn try_virt_addr_to_phys_addr(
+            &self,
+            virt_addr: Address<Virtual>,
+        ) -> Result<Address<Physical>, &'static str>;
     }
 }
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/types.rs b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/types.rs
index dc05fd70c..b14089ed2 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/types.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/types.rs
@@ -6,12 +6,9 @@
 
 use crate::{
     bsp, common,
-    memory::{Address, AddressType, Physical, Virtual},
-};
-use core::{
-    convert::{From, TryFrom},
-    marker::PhantomData,
+    memory::{Address, AddressType, Physical},
 };
+use core::{convert::From, marker::PhantomData};
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -95,11 +92,11 @@ impl<ATYPE: AddressType> PageSliceDescriptor<ATYPE> {
     }
 
     /// Return a pointer to the first page of the described slice.
-    const fn first_page_ptr(&self) -> *const Page<ATYPE> {
+    pub const fn first_page(&self) -> *const Page<ATYPE> {
         self.start.into_usize() as *const _
     }
 
-    /// Return the number of Pages the slice describes.
+    /// Return the number of pages the slice describes.
     pub const fn num_pages(&self) -> usize {
         self.num_pages
     }
@@ -129,26 +126,13 @@ impl<ATYPE: AddressType> PageSliceDescriptor<ATYPE> {
         (addr >= self.start_addr()) && (addr <= self.end_addr_inclusive())
     }
 
-    /// Return a non-mutable slice of Pages.
+    /// Return a non-mutable slice of pages.
     ///
     /// # Safety
     ///
     /// - Same as applies for `core::slice::from_raw_parts`.
     pub unsafe fn as_slice(&self) -> &[Page<ATYPE>] {
-        core::slice::from_raw_parts(self.first_page_ptr(), self.num_pages)
-    }
-}
-
-impl TryFrom<PageSliceDescriptor<Virtual>> for PageSliceDescriptor<Physical> {
-    type Error = super::TranslationError;
-
-    fn try_from(desc: PageSliceDescriptor<Virtual>) -> Result<Self, Self::Error> {
-        let phys_start = super::try_virt_to_phys(desc.start)?;
-
-        Ok(Self {
-            start: phys_start,
-            num_pages: desc.num_pages,
-        })
+        core::slice::from_raw_parts(self.first_page(), self.num_pages)
     }
 }
 

From 431b18d17bf204d6e8588ea077368c9d546e8c86 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sat, 13 Nov 2021 12:24:52 +0100
Subject: [PATCH 099/214] Improve some func/var naming

---
 14_virtual_mem_part2_mmio_remap/README.md     |  20 ++--
 .../aarch64/memory/mmu/translation_table.rs   |  14 +--
 .../src/bsp/raspberrypi/memory/mmu.rs         |   2 +-
 .../src/memory/mmu/types.rs                   |   4 +-
 .../README.md                                 | 104 +++++++++++++-----
 .../aarch64/memory/mmu/translation_table.rs   |  46 ++++----
 .../src/bsp/raspberrypi/memory/mmu.rs         |  15 +--
 .../src/memory/mmu.rs                         |  10 +-
 .../src/memory/mmu/translation_table.rs       |   6 +-
 .../src/memory/mmu/types.rs                   |   4 +-
 .../README.md                                 |   6 +-
 .../aarch64/memory/mmu/translation_table.rs   |  46 ++++----
 .../src/bsp/raspberrypi/memory/mmu.rs         |  15 +--
 .../src/memory/mmu.rs                         |  10 +-
 .../src/memory/mmu/translation_table.rs       |   6 +-
 .../src/memory/mmu/types.rs                   |   4 +-
 16 files changed, 179 insertions(+), 133 deletions(-)

diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index cda4dcc95..19852d472 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -463,13 +463,13 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
      /// Create an instance.
 -    pub fn from_output_addr(phys_output_addr: usize, attribute_fields: &AttributeFields) -> Self {
 +    pub fn from_output_page(
-+        phys_output_page: *const Page<Physical>,
++        phys_output_page_ptr: *const Page<Physical>,
 +        attribute_fields: &AttributeFields,
 +    ) -> Self {
          let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
 
 -        let shifted = phys_output_addr as u64 >> Granule64KiB::SHIFT;
-+        let shifted = phys_output_page as u64 >> Granule64KiB::SHIFT;
++        let shifted = phys_output_page_ptr as u64 >> Granule64KiB::SHIFT;
          val.write(
              STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted)
                  + STAGE1_PAGE_DESCRIPTOR::AF::True
@@ -544,9 +544,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
 +    #[inline(always)]
 +    fn lvl2_lvl3_index_from_page(
 +        &self,
-+        virt_page: *const Page<Virtual>,
++        virt_page_ptr: *const Page<Virtual>,
 +    ) -> Result<(usize, usize), &'static str> {
-+        let addr = virt_page as usize;
++        let addr = virt_page_ptr as usize;
 +        let lvl2_index = addr >> Granule512MiB::SHIFT;
 +        let lvl3_index = (addr & Granule512MiB::MASK) >> Granule64KiB::SHIFT;
 +
@@ -568,10 +568,10 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
 +    #[inline(always)]
 +    fn set_page_descriptor_from_page(
 +        &mut self,
-+        virt_page: *const Page<Virtual>,
++        virt_page_ptr: *const Page<Virtual>,
 +        new_desc: &PageDescriptor,
 +    ) -> Result<(), &'static str> {
-+        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page(virt_page)?;
++        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page(virt_page_ptr)?;
 +        let desc = &mut self.lvl3[lvl2_index][lvl3_index];
 
 -            for (l3_nr, l3_entry) in self.lvl3[l2_nr].iter_mut().enumerate() {
@@ -637,7 +637,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
 +            return Err("Tried to map page slices with unequal sizes");
 +        }
 +
-+        if p.last().unwrap().as_ptr() >= bsp::memory::mmu::phys_addr_space_end_page() {
++        if p.last().unwrap().as_ptr() >= bsp::memory::mmu::phys_addr_space_end_page_ptr() {
 +            return Err("Tried to map outside of physical address space");
 +        }
 +
@@ -1624,7 +1624,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +}
 +
 +/// Pointer to the last page of the physical address space.
-+pub fn phys_addr_space_end_page() -> *const Page<Physical> {
++pub fn phys_addr_space_end_page_ptr() -> *const Page<Physical> {
 +    common::align_down(
 +        super::phys_addr_space_end().into_usize(),
 +        KernelGranule::SIZE,
@@ -2582,7 +2582,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 14_virtual
 +    }
 +
 +    /// Return a pointer to the first page of the described slice.
-+    const fn first_page(&self) -> *const Page<ATYPE> {
++    const fn first_page_ptr(&self) -> *const Page<ATYPE> {
 +        self.start.into_usize() as *const _
 +    }
 +
@@ -2622,7 +2622,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 14_virtual
 +    ///
 +    /// - Same as applies for `core::slice::from_raw_parts`.
 +    pub unsafe fn as_slice(&self) -> &[Page<ATYPE>] {
-+        core::slice::from_raw_parts(self.first_page(), self.num_pages)
++        core::slice::from_raw_parts(self.first_page_ptr(), self.num_pages)
 +    }
 +}
 +
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
index 0c36cac64..32cea68c7 100644
--- a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -230,12 +230,12 @@ impl PageDescriptor {
 
     /// Create an instance.
     pub fn from_output_page(
-        phys_output_page: *const Page<Physical>,
+        phys_output_page_ptr: *const Page<Physical>,
         attribute_fields: &AttributeFields,
     ) -> Self {
         let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
 
-        let shifted = phys_output_page as u64 >> Granule64KiB::SHIFT;
+        let shifted = phys_output_page_ptr as u64 >> Granule64KiB::SHIFT;
         val.write(
             STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted)
                 + STAGE1_PAGE_DESCRIPTOR::AF::True
@@ -310,9 +310,9 @@ impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
     #[inline(always)]
     fn lvl2_lvl3_index_from_page(
         &self,
-        virt_page: *const Page<Virtual>,
+        virt_page_ptr: *const Page<Virtual>,
     ) -> Result<(usize, usize), &'static str> {
-        let addr = virt_page as usize;
+        let addr = virt_page_ptr as usize;
         let lvl2_index = addr >> Granule512MiB::SHIFT;
         let lvl3_index = (addr & Granule512MiB::MASK) >> Granule64KiB::SHIFT;
 
@@ -329,10 +329,10 @@ impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
     #[inline(always)]
     fn set_page_descriptor_from_page(
         &mut self,
-        virt_page: *const Page<Virtual>,
+        virt_page_ptr: *const Page<Virtual>,
         new_desc: &PageDescriptor,
     ) -> Result<(), &'static str> {
-        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page(virt_page)?;
+        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page(virt_page_ptr)?;
         let desc = &mut self.lvl3[lvl2_index][lvl3_index];
 
         if desc.is_valid() {
@@ -392,7 +392,7 @@ impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::Transla
             return Err("Tried to map page slices with unequal sizes");
         }
 
-        if p.last().unwrap().as_ptr() >= bsp::memory::mmu::phys_addr_space_end_page() {
+        if p.last().unwrap().as_ptr() >= bsp::memory::mmu::phys_addr_space_end_page_ptr() {
             return Err("Tried to map outside of physical address space");
         }
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
index b99268b48..7bf5c7fe9 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
@@ -101,7 +101,7 @@ pub fn kernel_translation_tables() -> &'static InitStateLock<KernelTranslationTa
 }
 
 /// Pointer to the last page of the physical address space.
-pub fn phys_addr_space_end_page() -> *const Page<Physical> {
+pub fn phys_addr_space_end_page_ptr() -> *const Page<Physical> {
     common::align_down(
         super::phys_addr_space_end().into_usize(),
         KernelGranule::SIZE,
diff --git a/14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs b/14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
index bbd4e9e84..0f2ad428b 100644
--- a/14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
@@ -92,7 +92,7 @@ impl<ATYPE: AddressType> PageSliceDescriptor<ATYPE> {
     }
 
     /// Return a pointer to the first page of the described slice.
-    const fn first_page(&self) -> *const Page<ATYPE> {
+    const fn first_page_ptr(&self) -> *const Page<ATYPE> {
         self.start.into_usize() as *const _
     }
 
@@ -132,7 +132,7 @@ impl<ATYPE: AddressType> PageSliceDescriptor<ATYPE> {
     ///
     /// - Same as applies for `core::slice::from_raw_parts`.
     pub unsafe fn as_slice(&self) -> &[Page<ATYPE>] {
-        core::slice::from_raw_parts(self.first_page(), self.num_pages)
+        core::slice::from_raw_parts(self.first_page_ptr(), self.num_pages)
     }
 }
 
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index efc28efff..f786f1e89 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -916,13 +916,22 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translati
  impl PageDescriptor {
      /// Create an instance.
      ///
+@@ -229,7 +257,7 @@
+     }
+
+     /// Create an instance.
+-    pub fn from_output_page(
++    pub fn from_output_page_ptr(
+         phys_output_page_ptr: *const Page<Physical>,
+         attribute_fields: &AttributeFields,
+     ) -> Self {
 @@ -252,6 +280,20 @@
          InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(self.value)
              .is_set(STAGE1_PAGE_DESCRIPTOR::VALID)
      }
 +
 +    /// Returns the output page.
-+    fn output_page(&self) -> *const Page<Physical> {
++    fn output_page_ptr(&self) -> *const Page<Physical> {
 +        let shifted = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(self.value)
 +            .read(STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB);
 +        let addr = shifted << Granule64KiB::SHIFT;
@@ -969,17 +978,26 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translati
      /// The start address of the table's MMIO range.
      #[inline(always)]
      fn mmio_start_addr(&self) -> Address<Virtual> {
-@@ -323,6 +374,18 @@
+@@ -308,7 +359,7 @@
+
+     /// Helper to calculate the lvl2 and lvl3 indices from an address.
+     #[inline(always)]
+-    fn lvl2_lvl3_index_from_page(
++    fn lvl2_lvl3_index_from_page_ptr(
+         &self,
+         virt_page_ptr: *const Page<Virtual>,
+     ) -> Result<(usize, usize), &'static str> {
+@@ -323,16 +374,28 @@
          Ok((lvl2_index, lvl3_index))
      }
 
 +    /// Returns the PageDescriptor corresponding to the supplied page address.
 +    #[inline(always)]
-+    fn page_descriptor_from_page(
++    fn page_descriptor_from_page_ptr(
 +        &self,
-+        virt_page: *const Page<Virtual>,
++        virt_page_ptr: *const Page<Virtual>,
 +    ) -> Result<&PageDescriptor, &'static str> {
-+        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page(virt_page)?;
++        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page_ptr(virt_page_ptr)?;
 +        let desc = &self.lvl3[lvl2_index][lvl3_index];
 +
 +        Ok(desc)
@@ -988,6 +1006,18 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translati
      /// Sets the PageDescriptor corresponding to the supplied page address.
      ///
      /// Doesn't allow overriding an already valid page.
+     #[inline(always)]
+-    fn set_page_descriptor_from_page(
++    fn set_page_descriptor_from_page_ptr(
+         &mut self,
+         virt_page_ptr: *const Page<Virtual>,
+         new_desc: &PageDescriptor,
+     ) -> Result<(), &'static str> {
+-        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page(virt_page_ptr)?;
++        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page_ptr(virt_page_ptr)?;
+         let desc = &mut self.lvl3[lvl2_index][lvl3_index];
+
+         if desc.is_valid() {
 @@ -351,14 +414,15 @@
  impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::TranslationTable
      for FixedSizeTranslationTable<NUM_TABLES>
@@ -1019,29 +1049,42 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translati
      }
 
      unsafe fn map_pages_at(
+@@ -398,10 +460,10 @@
+
+         let iter = p.iter().zip(v.iter());
+         for (phys_page, virt_page) in iter {
+-            let new_desc = PageDescriptor::from_output_page(phys_page.as_ptr(), attr);
++            let new_desc = PageDescriptor::from_output_page_ptr(phys_page.as_ptr(), attr);
+             let virt_page = virt_page.as_ptr();
+
+-            self.set_page_descriptor_from_page(virt_page, &new_desc)?;
++            self.set_page_descriptor_from_page_ptr(virt_page, &new_desc)?;
+         }
+
+         Ok(())
 @@ -442,6 +504,44 @@
 
          false
      }
 +
-+    fn try_virt_page_to_phys_page(
++    fn try_virt_page_ptr_to_phys_page_ptr(
 +        &self,
-+        virt_page: *const Page<Virtual>,
++        virt_page_ptr: *const Page<Virtual>,
 +    ) -> Result<*const Page<Physical>, &'static str> {
-+        let page_desc = self.page_descriptor_from_page(virt_page)?;
++        let page_desc = self.page_descriptor_from_page_ptr(virt_page_ptr)?;
 +
 +        if !page_desc.is_valid() {
 +            return Err("Page marked invalid");
 +        }
 +
-+        Ok(page_desc.output_page())
++        Ok(page_desc.output_page_ptr())
 +    }
 +
 +    fn try_page_attributes(
 +        &self,
-+        virt_page: *const Page<Virtual>,
++        virt_page_ptr: *const Page<Virtual>,
 +    ) -> Result<AttributeFields, &'static str> {
-+        let page_desc = self.page_descriptor_from_page(virt_page)?;
++        let page_desc = self.page_descriptor_from_page_ptr(virt_page_ptr)?;
 +
 +        if !page_desc.is_valid() {
 +            return Err("Page marked invalid");
@@ -1057,7 +1100,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translati
 +        &self,
 +        virt_addr: Address<Virtual>,
 +    ) -> Result<Address<Physical>, &'static str> {
-+        let page = self.try_virt_page_to_phys_page(virt_addr.as_page_ptr())?;
++        let page = self.try_virt_page_ptr_to_phys_page_ptr(virt_addr.as_page_ptr())?;
 +
 +        Ok(Address::new(page as usize + virt_addr.offset_into_page()))
 +    }
@@ -1198,7 +1241,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs 15_v
  /// Helper function for calculating the number of pages the given parameter spans.
  const fn size_to_num_pages(size: usize) -> usize {
      assert!(size > 0);
-@@ -81,16 +101,22 @@
+@@ -81,16 +101,23 @@
      PageSliceDescriptor::from_addr(super::virt_boot_core_stack_start(), num_pages)
  }
 
@@ -1211,20 +1254,21 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs 15_v
  ) -> PageSliceDescriptor<Physical> {
 -    let phys_start_addr = Address::<Physical>::new(virt_slice.start_addr().into_usize());
 +    let phys_first_page =
-+        generic_mmu::try_kernel_virt_page_to_phys_page(virt_slice.first_page()).unwrap();
++        generic_mmu::try_kernel_virt_page_ptr_to_phys_page_ptr(virt_slice.first_page_ptr())
++            .unwrap();
 +    let phys_start_addr = Address::new(phys_first_page as usize);
 
      PageSliceDescriptor::from_addr(phys_start_addr, virt_slice.num_pages())
  }
 
-+fn kernel_page_attributes(virt_page: *const Page<Virtual>) -> AttributeFields {
-+    generic_mmu::try_kernel_page_attributes(virt_page).unwrap()
++fn kernel_page_attributes(virt_page_ptr: *const Page<Virtual>) -> AttributeFields {
++    generic_mmu::try_kernel_page_attributes(virt_page_ptr).unwrap()
 +}
 +
  //--------------------------------------------------------------------------------------------------
  // Public Code
  //--------------------------------------------------------------------------------------------------
-@@ -108,112 +134,33 @@
+@@ -108,112 +135,33 @@
      ) as *const Page<_>
  }
 
@@ -1253,7 +1297,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs 15_v
 -    )?;
 +        &virt_rx_page_desc,
 +        &kernel_virt_to_phys_page_slice(virt_rx_page_desc),
-+        &kernel_page_attributes(virt_rx_page_desc.first_page()),
++        &kernel_page_attributes(virt_rx_page_desc.first_page_ptr()),
 +    );
 
 -    generic_mmu::kernel_map_pages_at(
@@ -1270,7 +1314,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs 15_v
 -    )?;
 +        &virt_rw_page_desc,
 +        &kernel_virt_to_phys_page_slice(virt_rw_page_desc),
-+        &kernel_page_attributes(virt_rw_page_desc.first_page()),
++        &kernel_page_attributes(virt_rw_page_desc.first_page_ptr()),
 +    );
 
 -    generic_mmu::kernel_map_pages_at(
@@ -1357,7 +1401,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs 15_v
 -    }
 +        &virt_boot_core_stack_page_desc,
 +        &kernel_virt_to_phys_page_slice(virt_boot_core_stack_page_desc),
-+        &kernel_page_attributes(virt_boot_core_stack_page_desc.first_page()),
++        &kernel_page_attributes(virt_boot_core_stack_page_desc.first_page_ptr()),
 +    );
  }
 
@@ -1441,9 +1485,9 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs 15
 +        /// Try to translate a virtual page pointer to a physical page pointer.
 +        ///
 +        /// Will only succeed if there exists a valid mapping for the input page.
-+        fn try_virt_page_to_phys_page(
++        fn try_virt_page_ptr_to_phys_page_ptr(
 +            &self,
-+            virt_page: *const Page<Virtual>,
++            virt_page_ptr: *const Page<Virtual>,
 +        ) -> Result<*const Page<Physical>, &'static str>;
 +
 +        /// Try to get the attributes of a page.
@@ -1451,7 +1495,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs 15
 +        /// Will only succeed if there exists a valid mapping for the input page.
 +        fn try_page_attributes(
 +            &self,
-+            virt_page: *const Page<Virtual>,
++            virt_page_ptr: *const Page<Virtual>,
 +        ) -> Result<AttributeFields, &'static str>;
 +
 +        /// Try to translate a virtual address to a physical address.
@@ -1493,8 +1537,8 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs 15_virtual_mem
      }
 
      /// Return a pointer to the first page of the described slice.
--    const fn first_page(&self) -> *const Page<ATYPE> {
-+    pub const fn first_page(&self) -> *const Page<ATYPE> {
+-    const fn first_page_ptr(&self) -> *const Page<ATYPE> {
++    pub const fn first_page_ptr(&self) -> *const Page<ATYPE> {
          self.start.into_usize() as *const _
      }
 
@@ -1549,11 +1593,11 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs 15_virtual_mem_part3
 -            tables.phys_base_address()
 -        });
 +/// Will only succeed if there exists a valid mapping for the input page.
-+pub fn try_kernel_virt_page_to_phys_page(
-+    virt_page: *const Page<Virtual>,
++pub fn try_kernel_virt_page_ptr_to_phys_page_ptr(
++    virt_page_ptr: *const Page<Virtual>,
 +) -> Result<*const Page<Physical>, &'static str> {
 +    bsp::memory::mmu::kernel_translation_tables()
-+        .read(|tables| tables.try_virt_page_to_phys_page(virt_page))
++        .read(|tables| tables.try_virt_page_ptr_to_phys_page_ptr(virt_page_ptr))
 +}
 
 -    bsp::memory::mmu::kernel_map_binary()?;
@@ -1561,10 +1605,10 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs 15_virtual_mem_part3
 +///
 +/// Will only succeed if there exists a valid mapping for the input page.
 +pub fn try_kernel_page_attributes(
-+    virt_page: *const Page<Virtual>,
++    virt_page_ptr: *const Page<Virtual>,
 +) -> Result<AttributeFields, &'static str> {
 +    bsp::memory::mmu::kernel_translation_tables()
-+        .read(|tables| tables.try_page_attributes(virt_page))
++        .read(|tables| tables.try_page_attributes(virt_page_ptr))
 +}
 
 -    Ok(phys_kernel_tables_base_addr)
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs
index 222f15cee..73ac3a5d4 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -257,13 +257,13 @@ impl PageDescriptor {
     }
 
     /// Create an instance.
-    pub fn from_output_page(
-        phys_output_page: *const Page<Physical>,
+    pub fn from_output_page_ptr(
+        phys_output_page_ptr: *const Page<Physical>,
         attribute_fields: &AttributeFields,
     ) -> Self {
         let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
 
-        let shifted = phys_output_page as u64 >> Granule64KiB::SHIFT;
+        let shifted = phys_output_page_ptr as u64 >> Granule64KiB::SHIFT;
         val.write(
             STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted)
                 + STAGE1_PAGE_DESCRIPTOR::AF::True
@@ -282,7 +282,7 @@ impl PageDescriptor {
     }
 
     /// Returns the output page.
-    fn output_page(&self) -> *const Page<Physical> {
+    fn output_page_ptr(&self) -> *const Page<Physical> {
         let shifted = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(self.value)
             .read(STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB);
         let addr = shifted << Granule64KiB::SHIFT;
@@ -359,11 +359,11 @@ impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
 
     /// Helper to calculate the lvl2 and lvl3 indices from an address.
     #[inline(always)]
-    fn lvl2_lvl3_index_from_page(
+    fn lvl2_lvl3_index_from_page_ptr(
         &self,
-        virt_page: *const Page<Virtual>,
+        virt_page_ptr: *const Page<Virtual>,
     ) -> Result<(usize, usize), &'static str> {
-        let addr = virt_page as usize;
+        let addr = virt_page_ptr as usize;
         let lvl2_index = addr >> Granule512MiB::SHIFT;
         let lvl3_index = (addr & Granule512MiB::MASK) >> Granule64KiB::SHIFT;
 
@@ -376,11 +376,11 @@ impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
 
     /// Returns the PageDescriptor corresponding to the supplied page address.
     #[inline(always)]
-    fn page_descriptor_from_page(
+    fn page_descriptor_from_page_ptr(
         &self,
-        virt_page: *const Page<Virtual>,
+        virt_page_ptr: *const Page<Virtual>,
     ) -> Result<&PageDescriptor, &'static str> {
-        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page(virt_page)?;
+        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page_ptr(virt_page_ptr)?;
         let desc = &self.lvl3[lvl2_index][lvl3_index];
 
         Ok(desc)
@@ -390,12 +390,12 @@ impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
     ///
     /// Doesn't allow overriding an already valid page.
     #[inline(always)]
-    fn set_page_descriptor_from_page(
+    fn set_page_descriptor_from_page_ptr(
         &mut self,
-        virt_page: *const Page<Virtual>,
+        virt_page_ptr: *const Page<Virtual>,
         new_desc: &PageDescriptor,
     ) -> Result<(), &'static str> {
-        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page(virt_page)?;
+        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page_ptr(virt_page_ptr)?;
         let desc = &mut self.lvl3[lvl2_index][lvl3_index];
 
         if desc.is_valid() {
@@ -454,16 +454,16 @@ impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::Transla
             return Err("Tried to map page slices with unequal sizes");
         }
 
-        if p.last().unwrap().as_ptr() >= bsp::memory::mmu::phys_addr_space_end_page() {
+        if p.last().unwrap().as_ptr() >= bsp::memory::mmu::phys_addr_space_end_page_ptr() {
             return Err("Tried to map outside of physical address space");
         }
 
         let iter = p.iter().zip(v.iter());
         for (phys_page, virt_page) in iter {
-            let new_desc = PageDescriptor::from_output_page(phys_page.as_ptr(), attr);
+            let new_desc = PageDescriptor::from_output_page_ptr(phys_page.as_ptr(), attr);
             let virt_page = virt_page.as_ptr();
 
-            self.set_page_descriptor_from_page(virt_page, &new_desc)?;
+            self.set_page_descriptor_from_page_ptr(virt_page, &new_desc)?;
         }
 
         Ok(())
@@ -505,24 +505,24 @@ impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::Transla
         false
     }
 
-    fn try_virt_page_to_phys_page(
+    fn try_virt_page_ptr_to_phys_page_ptr(
         &self,
-        virt_page: *const Page<Virtual>,
+        virt_page_ptr: *const Page<Virtual>,
     ) -> Result<*const Page<Physical>, &'static str> {
-        let page_desc = self.page_descriptor_from_page(virt_page)?;
+        let page_desc = self.page_descriptor_from_page_ptr(virt_page_ptr)?;
 
         if !page_desc.is_valid() {
             return Err("Page marked invalid");
         }
 
-        Ok(page_desc.output_page())
+        Ok(page_desc.output_page_ptr())
     }
 
     fn try_page_attributes(
         &self,
-        virt_page: *const Page<Virtual>,
+        virt_page_ptr: *const Page<Virtual>,
     ) -> Result<AttributeFields, &'static str> {
-        let page_desc = self.page_descriptor_from_page(virt_page)?;
+        let page_desc = self.page_descriptor_from_page_ptr(virt_page_ptr)?;
 
         if !page_desc.is_valid() {
             return Err("Page marked invalid");
@@ -538,7 +538,7 @@ impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::Transla
         &self,
         virt_addr: Address<Virtual>,
     ) -> Result<Address<Physical>, &'static str> {
-        let page = self.try_virt_page_to_phys_page(virt_addr.as_page_ptr())?;
+        let page = self.try_virt_page_ptr_to_phys_page_ptr(virt_addr.as_page_ptr())?;
 
         Ok(Address::new(page as usize + virt_addr.offset_into_page()))
     }
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs
index 588a57283..e56e44371 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs
@@ -107,14 +107,15 @@ fn kernel_virt_to_phys_page_slice(
     virt_slice: PageSliceDescriptor<Virtual>,
 ) -> PageSliceDescriptor<Physical> {
     let phys_first_page =
-        generic_mmu::try_kernel_virt_page_to_phys_page(virt_slice.first_page()).unwrap();
+        generic_mmu::try_kernel_virt_page_ptr_to_phys_page_ptr(virt_slice.first_page_ptr())
+            .unwrap();
     let phys_start_addr = Address::new(phys_first_page as usize);
 
     PageSliceDescriptor::from_addr(phys_start_addr, virt_slice.num_pages())
 }
 
-fn kernel_page_attributes(virt_page: *const Page<Virtual>) -> AttributeFields {
-    generic_mmu::try_kernel_page_attributes(virt_page).unwrap()
+fn kernel_page_attributes(virt_page_ptr: *const Page<Virtual>) -> AttributeFields {
+    generic_mmu::try_kernel_page_attributes(virt_page_ptr).unwrap()
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -127,7 +128,7 @@ pub fn kernel_translation_tables() -> &'static InitStateLock<KernelTranslationTa
 }
 
 /// Pointer to the last page of the physical address space.
-pub fn phys_addr_space_end_page() -> *const Page<Physical> {
+pub fn phys_addr_space_end_page_ptr() -> *const Page<Physical> {
     common::align_down(
         super::phys_addr_space_end().into_usize(),
         KernelGranule::SIZE,
@@ -145,7 +146,7 @@ pub fn kernel_add_mapping_records_for_precomputed() {
         "Kernel code and RO data",
         &virt_rx_page_desc,
         &kernel_virt_to_phys_page_slice(virt_rx_page_desc),
-        &kernel_page_attributes(virt_rx_page_desc.first_page()),
+        &kernel_page_attributes(virt_rx_page_desc.first_page_ptr()),
     );
 
     let virt_rw_page_desc = virt_rw_page_desc();
@@ -153,7 +154,7 @@ pub fn kernel_add_mapping_records_for_precomputed() {
         "Kernel data and bss",
         &virt_rw_page_desc,
         &kernel_virt_to_phys_page_slice(virt_rw_page_desc),
-        &kernel_page_attributes(virt_rw_page_desc.first_page()),
+        &kernel_page_attributes(virt_rw_page_desc.first_page_ptr()),
     );
 
     let virt_boot_core_stack_page_desc = virt_boot_core_stack_page_desc();
@@ -161,6 +162,6 @@ pub fn kernel_add_mapping_records_for_precomputed() {
         "Kernel boot-core stack",
         &virt_boot_core_stack_page_desc,
         &kernel_virt_to_phys_page_slice(virt_boot_core_stack_page_desc),
-        &kernel_page_attributes(virt_boot_core_stack_page_desc.first_page()),
+        &kernel_page_attributes(virt_boot_core_stack_page_desc.first_page_ptr()),
     );
 }
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs
index 3c3e51768..5746f3926 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs
@@ -227,21 +227,21 @@ pub unsafe fn kernel_map_mmio(
 /// Try to translate a kernel virtual page pointer to a physical page pointer.
 ///
 /// Will only succeed if there exists a valid mapping for the input page.
-pub fn try_kernel_virt_page_to_phys_page(
-    virt_page: *const Page<Virtual>,
+pub fn try_kernel_virt_page_ptr_to_phys_page_ptr(
+    virt_page_ptr: *const Page<Virtual>,
 ) -> Result<*const Page<Physical>, &'static str> {
     bsp::memory::mmu::kernel_translation_tables()
-        .read(|tables| tables.try_virt_page_to_phys_page(virt_page))
+        .read(|tables| tables.try_virt_page_ptr_to_phys_page_ptr(virt_page_ptr))
 }
 
 /// Try to get the attributes of a kernel page.
 ///
 /// Will only succeed if there exists a valid mapping for the input page.
 pub fn try_kernel_page_attributes(
-    virt_page: *const Page<Virtual>,
+    virt_page_ptr: *const Page<Virtual>,
 ) -> Result<AttributeFields, &'static str> {
     bsp::memory::mmu::kernel_translation_tables()
-        .read(|tables| tables.try_page_attributes(virt_page))
+        .read(|tables| tables.try_page_attributes(virt_page_ptr))
 }
 
 /// Try to translate a kernel virtual address to a physical address.
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/translation_table.rs b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/translation_table.rs
index bda05c7d8..0738091c6 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/translation_table.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/translation_table.rs
@@ -71,9 +71,9 @@ pub mod interface {
         /// Try to translate a virtual page pointer to a physical page pointer.
         ///
         /// Will only succeed if there exists a valid mapping for the input page.
-        fn try_virt_page_to_phys_page(
+        fn try_virt_page_ptr_to_phys_page_ptr(
             &self,
-            virt_page: *const Page<Virtual>,
+            virt_page_ptr: *const Page<Virtual>,
         ) -> Result<*const Page<Physical>, &'static str>;
 
         /// Try to get the attributes of a page.
@@ -81,7 +81,7 @@ pub mod interface {
         /// Will only succeed if there exists a valid mapping for the input page.
         fn try_page_attributes(
             &self,
-            virt_page: *const Page<Virtual>,
+            virt_page_ptr: *const Page<Virtual>,
         ) -> Result<AttributeFields, &'static str>;
 
         /// Try to translate a virtual address to a physical address.
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs
index b14089ed2..0fb3bf694 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs
@@ -92,7 +92,7 @@ impl<ATYPE: AddressType> PageSliceDescriptor<ATYPE> {
     }
 
     /// Return a pointer to the first page of the described slice.
-    pub const fn first_page(&self) -> *const Page<ATYPE> {
+    pub const fn first_page_ptr(&self) -> *const Page<ATYPE> {
         self.start.into_usize() as *const _
     }
 
@@ -132,7 +132,7 @@ impl<ATYPE: AddressType> PageSliceDescriptor<ATYPE> {
     ///
     /// - Same as applies for `core::slice::from_raw_parts`.
     pub unsafe fn as_slice(&self) -> &[Page<ATYPE>] {
-        core::slice::from_raw_parts(self.first_page(), self.num_pages)
+        core::slice::from_raw_parts(self.first_page_ptr(), self.num_pages)
     }
 }
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/README.md b/16_virtual_mem_part4_higher_half_kernel/README.md
index 8eeee7c3b..dae4e8466 100644
--- a/16_virtual_mem_part4_higher_half_kernel/README.md
+++ b/16_virtual_mem_part4_higher_half_kernel/README.md
@@ -431,10 +431,10 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/t
      /// Helper to calculate the lvl2 and lvl3 indices from an address.
 @@ -363,7 +384,12 @@
          &self,
-         virt_page: *const Page<Virtual>,
+         virt_page_ptr: *const Page<Virtual>,
      ) -> Result<(usize, usize), &'static str> {
--        let addr = virt_page as usize;
-+        let mut addr = virt_page as usize;
+-        let addr = virt_page_ptr as usize;
++        let mut addr = virt_page_ptr as usize;
 +
 +        if START_FROM_TOP {
 +            addr -= Self::START_FROM_TOP_OFFSET.into_usize()
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
index ead8a9902..1148ccd8f 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -257,13 +257,13 @@ impl PageDescriptor {
     }
 
     /// Create an instance.
-    pub fn from_output_page(
-        phys_output_page: *const Page<Physical>,
+    pub fn from_output_page_ptr(
+        phys_output_page_ptr: *const Page<Physical>,
         attribute_fields: &AttributeFields,
     ) -> Self {
         let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
 
-        let shifted = phys_output_page as u64 >> Granule64KiB::SHIFT;
+        let shifted = phys_output_page_ptr as u64 >> Granule64KiB::SHIFT;
         val.write(
             STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted)
                 + STAGE1_PAGE_DESCRIPTOR::AF::True
@@ -282,7 +282,7 @@ impl PageDescriptor {
     }
 
     /// Returns the output page.
-    fn output_page(&self) -> *const Page<Physical> {
+    fn output_page_ptr(&self) -> *const Page<Physical> {
         let shifted = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(self.value)
             .read(STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB);
         let addr = shifted << Granule64KiB::SHIFT;
@@ -380,11 +380,11 @@ impl<const NUM_TABLES: usize, const START_FROM_TOP: bool>
 
     /// Helper to calculate the lvl2 and lvl3 indices from an address.
     #[inline(always)]
-    fn lvl2_lvl3_index_from_page(
+    fn lvl2_lvl3_index_from_page_ptr(
         &self,
-        virt_page: *const Page<Virtual>,
+        virt_page_ptr: *const Page<Virtual>,
     ) -> Result<(usize, usize), &'static str> {
-        let mut addr = virt_page as usize;
+        let mut addr = virt_page_ptr as usize;
 
         if START_FROM_TOP {
             addr -= Self::START_FROM_TOP_OFFSET.into_usize()
@@ -402,11 +402,11 @@ impl<const NUM_TABLES: usize, const START_FROM_TOP: bool>
 
     /// Returns the PageDescriptor corresponding to the supplied page address.
     #[inline(always)]
-    fn page_descriptor_from_page(
+    fn page_descriptor_from_page_ptr(
         &self,
-        virt_page: *const Page<Virtual>,
+        virt_page_ptr: *const Page<Virtual>,
     ) -> Result<&PageDescriptor, &'static str> {
-        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page(virt_page)?;
+        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page_ptr(virt_page_ptr)?;
         let desc = &self.lvl3[lvl2_index][lvl3_index];
 
         Ok(desc)
@@ -416,12 +416,12 @@ impl<const NUM_TABLES: usize, const START_FROM_TOP: bool>
     ///
     /// Doesn't allow overriding an already valid page.
     #[inline(always)]
-    fn set_page_descriptor_from_page(
+    fn set_page_descriptor_from_page_ptr(
         &mut self,
-        virt_page: *const Page<Virtual>,
+        virt_page_ptr: *const Page<Virtual>,
         new_desc: &PageDescriptor,
     ) -> Result<(), &'static str> {
-        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page(virt_page)?;
+        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page_ptr(virt_page_ptr)?;
         let desc = &mut self.lvl3[lvl2_index][lvl3_index];
 
         if desc.is_valid() {
@@ -481,16 +481,16 @@ impl<const NUM_TABLES: usize, const START_FROM_TOP: bool>
             return Err("Tried to map page slices with unequal sizes");
         }
 
-        if p.last().unwrap().as_ptr() >= bsp::memory::mmu::phys_addr_space_end_page() {
+        if p.last().unwrap().as_ptr() >= bsp::memory::mmu::phys_addr_space_end_page_ptr() {
             return Err("Tried to map outside of physical address space");
         }
 
         let iter = p.iter().zip(v.iter());
         for (phys_page, virt_page) in iter {
-            let new_desc = PageDescriptor::from_output_page(phys_page.as_ptr(), attr);
+            let new_desc = PageDescriptor::from_output_page_ptr(phys_page.as_ptr(), attr);
             let virt_page = virt_page.as_ptr();
 
-            self.set_page_descriptor_from_page(virt_page, &new_desc)?;
+            self.set_page_descriptor_from_page_ptr(virt_page, &new_desc)?;
         }
 
         Ok(())
@@ -536,24 +536,24 @@ impl<const NUM_TABLES: usize, const START_FROM_TOP: bool>
         false
     }
 
-    fn try_virt_page_to_phys_page(
+    fn try_virt_page_ptr_to_phys_page_ptr(
         &self,
-        virt_page: *const Page<Virtual>,
+        virt_page_ptr: *const Page<Virtual>,
     ) -> Result<*const Page<Physical>, &'static str> {
-        let page_desc = self.page_descriptor_from_page(virt_page)?;
+        let page_desc = self.page_descriptor_from_page_ptr(virt_page_ptr)?;
 
         if !page_desc.is_valid() {
             return Err("Page marked invalid");
         }
 
-        Ok(page_desc.output_page())
+        Ok(page_desc.output_page_ptr())
     }
 
     fn try_page_attributes(
         &self,
-        virt_page: *const Page<Virtual>,
+        virt_page_ptr: *const Page<Virtual>,
     ) -> Result<AttributeFields, &'static str> {
-        let page_desc = self.page_descriptor_from_page(virt_page)?;
+        let page_desc = self.page_descriptor_from_page_ptr(virt_page_ptr)?;
 
         if !page_desc.is_valid() {
             return Err("Page marked invalid");
@@ -569,7 +569,7 @@ impl<const NUM_TABLES: usize, const START_FROM_TOP: bool>
         &self,
         virt_addr: Address<Virtual>,
     ) -> Result<Address<Physical>, &'static str> {
-        let page = self.try_virt_page_to_phys_page(virt_addr.as_page_ptr())?;
+        let page = self.try_virt_page_ptr_to_phys_page_ptr(virt_addr.as_page_ptr())?;
 
         Ok(Address::new(page as usize + virt_addr.offset_into_page()))
     }
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs
index 8e851a8de..7ec02cca7 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs
@@ -107,14 +107,15 @@ fn kernel_virt_to_phys_page_slice(
     virt_slice: PageSliceDescriptor<Virtual>,
 ) -> PageSliceDescriptor<Physical> {
     let phys_first_page =
-        generic_mmu::try_kernel_virt_page_to_phys_page(virt_slice.first_page()).unwrap();
+        generic_mmu::try_kernel_virt_page_ptr_to_phys_page_ptr(virt_slice.first_page_ptr())
+            .unwrap();
     let phys_start_addr = Address::new(phys_first_page as usize);
 
     PageSliceDescriptor::from_addr(phys_start_addr, virt_slice.num_pages())
 }
 
-fn kernel_page_attributes(virt_page: *const Page<Virtual>) -> AttributeFields {
-    generic_mmu::try_kernel_page_attributes(virt_page).unwrap()
+fn kernel_page_attributes(virt_page_ptr: *const Page<Virtual>) -> AttributeFields {
+    generic_mmu::try_kernel_page_attributes(virt_page_ptr).unwrap()
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -127,7 +128,7 @@ pub fn kernel_translation_tables() -> &'static InitStateLock<KernelTranslationTa
 }
 
 /// Pointer to the last page of the physical address space.
-pub fn phys_addr_space_end_page() -> *const Page<Physical> {
+pub fn phys_addr_space_end_page_ptr() -> *const Page<Physical> {
     common::align_down(
         super::phys_addr_space_end().into_usize(),
         KernelGranule::SIZE,
@@ -145,7 +146,7 @@ pub fn kernel_add_mapping_records_for_precomputed() {
         "Kernel code and RO data",
         &virt_rx_page_desc,
         &kernel_virt_to_phys_page_slice(virt_rx_page_desc),
-        &kernel_page_attributes(virt_rx_page_desc.first_page()),
+        &kernel_page_attributes(virt_rx_page_desc.first_page_ptr()),
     );
 
     let virt_rw_page_desc = virt_rw_page_desc();
@@ -153,7 +154,7 @@ pub fn kernel_add_mapping_records_for_precomputed() {
         "Kernel data and bss",
         &virt_rw_page_desc,
         &kernel_virt_to_phys_page_slice(virt_rw_page_desc),
-        &kernel_page_attributes(virt_rw_page_desc.first_page()),
+        &kernel_page_attributes(virt_rw_page_desc.first_page_ptr()),
     );
 
     let virt_boot_core_stack_page_desc = virt_boot_core_stack_page_desc();
@@ -161,6 +162,6 @@ pub fn kernel_add_mapping_records_for_precomputed() {
         "Kernel boot-core stack",
         &virt_boot_core_stack_page_desc,
         &kernel_virt_to_phys_page_slice(virt_boot_core_stack_page_desc),
-        &kernel_page_attributes(virt_boot_core_stack_page_desc.first_page()),
+        &kernel_page_attributes(virt_boot_core_stack_page_desc.first_page_ptr()),
     );
 }
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs
index d4def2840..0e699ccd9 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs
@@ -232,21 +232,21 @@ pub unsafe fn kernel_map_mmio(
 /// Try to translate a kernel virtual page pointer to a physical page pointer.
 ///
 /// Will only succeed if there exists a valid mapping for the input page.
-pub fn try_kernel_virt_page_to_phys_page(
-    virt_page: *const Page<Virtual>,
+pub fn try_kernel_virt_page_ptr_to_phys_page_ptr(
+    virt_page_ptr: *const Page<Virtual>,
 ) -> Result<*const Page<Physical>, &'static str> {
     bsp::memory::mmu::kernel_translation_tables()
-        .read(|tables| tables.try_virt_page_to_phys_page(virt_page))
+        .read(|tables| tables.try_virt_page_ptr_to_phys_page_ptr(virt_page_ptr))
 }
 
 /// Try to get the attributes of a kernel page.
 ///
 /// Will only succeed if there exists a valid mapping for the input page.
 pub fn try_kernel_page_attributes(
-    virt_page: *const Page<Virtual>,
+    virt_page_ptr: *const Page<Virtual>,
 ) -> Result<AttributeFields, &'static str> {
     bsp::memory::mmu::kernel_translation_tables()
-        .read(|tables| tables.try_page_attributes(virt_page))
+        .read(|tables| tables.try_page_attributes(virt_page_ptr))
 }
 
 /// Try to translate a kernel virtual address to a physical address.
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/translation_table.rs b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/translation_table.rs
index bda05c7d8..0738091c6 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/translation_table.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/translation_table.rs
@@ -71,9 +71,9 @@ pub mod interface {
         /// Try to translate a virtual page pointer to a physical page pointer.
         ///
         /// Will only succeed if there exists a valid mapping for the input page.
-        fn try_virt_page_to_phys_page(
+        fn try_virt_page_ptr_to_phys_page_ptr(
             &self,
-            virt_page: *const Page<Virtual>,
+            virt_page_ptr: *const Page<Virtual>,
         ) -> Result<*const Page<Physical>, &'static str>;
 
         /// Try to get the attributes of a page.
@@ -81,7 +81,7 @@ pub mod interface {
         /// Will only succeed if there exists a valid mapping for the input page.
         fn try_page_attributes(
             &self,
-            virt_page: *const Page<Virtual>,
+            virt_page_ptr: *const Page<Virtual>,
         ) -> Result<AttributeFields, &'static str>;
 
         /// Try to translate a virtual address to a physical address.
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/types.rs b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/types.rs
index b14089ed2..0fb3bf694 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/types.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/types.rs
@@ -92,7 +92,7 @@ impl<ATYPE: AddressType> PageSliceDescriptor<ATYPE> {
     }
 
     /// Return a pointer to the first page of the described slice.
-    pub const fn first_page(&self) -> *const Page<ATYPE> {
+    pub const fn first_page_ptr(&self) -> *const Page<ATYPE> {
         self.start.into_usize() as *const _
     }
 
@@ -132,7 +132,7 @@ impl<ATYPE: AddressType> PageSliceDescriptor<ATYPE> {
     ///
     /// - Same as applies for `core::slice::from_raw_parts`.
     pub unsafe fn as_slice(&self) -> &[Page<ATYPE>] {
-        core::slice::from_raw_parts(self.first_page(), self.num_pages)
+        core::slice::from_raw_parts(self.first_page_ptr(), self.num_pages)
     }
 }
 

From dee575bb18c8ffa89d81331d4474d07219ef1cd3 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sat, 13 Nov 2021 13:12:10 +0100
Subject: [PATCH 100/214] Bump QEMU to 6.1; Tag Docker images from now on

---
 01_wait_forever/Makefile                          |  5 +++--
 02_runtime_init/Makefile                          |  5 +++--
 02_runtime_init/README.md                         |  2 +-
 03_hacky_hello_world/Makefile                     |  5 +++--
 03_hacky_hello_world/README.md                    | 11 +++++------
 04_safe_globals/Makefile                          |  5 +++--
 05_drivers_gpio_uart/Makefile                     |  5 +++--
 05_drivers_gpio_uart/README.md                    |  9 +++++----
 06_uart_chainloader/Makefile                      |  5 +++--
 06_uart_chainloader/README.md                     | 14 +++++++-------
 07_timestamps/Makefile                            |  5 +++--
 07_timestamps/README.md                           | 10 +++++-----
 08_hw_debug_JTAG/Makefile                         |  5 +++--
 08_hw_debug_JTAG/README.md                        |  9 +++++----
 09_privilege_level/Makefile                       |  5 +++--
 10_virtual_mem_part1_identity_mapping/Makefile    |  5 +++--
 11_exceptions_part1_groundwork/Makefile           |  5 +++--
 12_integrated_testing/Makefile                    |  5 +++--
 12_integrated_testing/README.md                   | 12 ++++++------
 13_exceptions_part2_peripheral_IRQs/Makefile      |  5 +++--
 13_exceptions_part2_peripheral_IRQs/README.md     |  2 +-
 14_virtual_mem_part2_mmio_remap/Makefile          |  5 +++--
 15_virtual_mem_part3_precomputed_tables/Makefile  |  5 +++--
 15_virtual_mem_part3_precomputed_tables/README.md |  6 +++---
 16_virtual_mem_part4_higher_half_kernel/Makefile  |  5 +++--
 X1_JTAG_boot/Makefile                             |  5 +++--
 common/{color.mk.in => color.mk}                  |  0
 common/docker.mk                                  |  1 +
 docker/rustembedded-osdev-utils/Dockerfile        | 13 +++++++------
 docker/rustembedded-osdev-utils/Makefile          |  2 +-
 30 files changed, 98 insertions(+), 78 deletions(-)
 rename common/{color.mk.in => color.mk} (100%)
 create mode 100644 common/docker.mk

diff --git a/01_wait_forever/Makefile b/01_wait_forever/Makefile
index 16607fe62..cd0dd8d1b 100644
--- a/01_wait_forever/Makefile
+++ b/01_wait_forever/Makefile
@@ -2,7 +2,8 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/color.mk.in
+include ../common/color.mk
+include ../common/docker.mk
 
 ##--------------------------------------------------------------------------------------------------
 ## Optional, user-provided configuration values
@@ -75,10 +76,10 @@ EXEC_QEMU = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
 ##------------------------------------------------------------------------------
 ## Dockerization
 ##------------------------------------------------------------------------------
-DOCKER_IMAGE        = rustembedded/osdev-utils
 DOCKER_CMD          = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
 DOCKER_CMD_INTERACT = $(DOCKER_CMD) -i
 
+# DOCKER_IMAGE defined in include file (see top of this file).
 DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
 DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 
diff --git a/02_runtime_init/Makefile b/02_runtime_init/Makefile
index ea979232c..0e2b99065 100644
--- a/02_runtime_init/Makefile
+++ b/02_runtime_init/Makefile
@@ -2,7 +2,8 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/color.mk.in
+include ../common/color.mk
+include ../common/docker.mk
 
 ##--------------------------------------------------------------------------------------------------
 ## Optional, user-provided configuration values
@@ -75,10 +76,10 @@ EXEC_QEMU = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
 ##------------------------------------------------------------------------------
 ## Dockerization
 ##------------------------------------------------------------------------------
-DOCKER_IMAGE        = rustembedded/osdev-utils
 DOCKER_CMD          = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
 DOCKER_CMD_INTERACT = $(DOCKER_CMD) -i
 
+# DOCKER_IMAGE defined in include file (see top of this file).
 DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
 DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 
diff --git a/02_runtime_init/README.md b/02_runtime_init/README.md
index 37e34ec8e..36d9f7ef9 100644
--- a/02_runtime_init/README.md
+++ b/02_runtime_init/README.md
@@ -53,7 +53,7 @@ diff -uNr 01_wait_forever/Cargo.toml 02_runtime_init/Cargo.toml
 diff -uNr 01_wait_forever/Makefile 02_runtime_init/Makefile
 --- 01_wait_forever/Makefile
 +++ 02_runtime_init/Makefile
-@@ -152,6 +152,8 @@
+@@ -153,6 +153,8 @@
  	$(call colorecho, "\nLaunching objdump")
  	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                  --section .text   \
diff --git a/03_hacky_hello_world/Makefile b/03_hacky_hello_world/Makefile
index 19e50b332..586daf99b 100644
--- a/03_hacky_hello_world/Makefile
+++ b/03_hacky_hello_world/Makefile
@@ -2,7 +2,8 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/color.mk.in
+include ../common/color.mk
+include ../common/docker.mk
 
 ##--------------------------------------------------------------------------------------------------
 ## Optional, user-provided configuration values
@@ -76,11 +77,11 @@ EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
 ##------------------------------------------------------------------------------
 ## Dockerization
 ##------------------------------------------------------------------------------
-DOCKER_IMAGE          = rustembedded/osdev-utils
 DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
 DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
 DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
 
+# DOCKER_IMAGE defined in include file (see top of this file).
 DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
 DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
diff --git a/03_hacky_hello_world/README.md b/03_hacky_hello_world/README.md
index 22805fb30..c9c5862ac 100644
--- a/03_hacky_hello_world/README.md
+++ b/03_hacky_hello_world/README.md
@@ -47,7 +47,7 @@ diff -uNr 02_runtime_init/Cargo.toml 03_hacky_hello_world/Cargo.toml
 diff -uNr 02_runtime_init/Makefile 03_hacky_hello_world/Makefile
 --- 02_runtime_init/Makefile
 +++ 03_hacky_hello_world/Makefile
-@@ -23,7 +23,7 @@
+@@ -24,7 +24,7 @@
      KERNEL_BIN        = kernel8.img
      QEMU_BINARY       = qemu-system-aarch64
      QEMU_MACHINE_TYPE = raspi3
@@ -56,7 +56,7 @@ diff -uNr 02_runtime_init/Makefile 03_hacky_hello_world/Makefile
      OBJDUMP_BINARY    = aarch64-none-elf-objdump
      NM_BINARY         = aarch64-none-elf-nm
      READELF_BINARY    = aarch64-none-elf-readelf
-@@ -34,7 +34,7 @@
+@@ -35,7 +35,7 @@
      KERNEL_BIN        = kernel8.img
      QEMU_BINARY       = qemu-system-aarch64
      QEMU_MACHINE_TYPE =
@@ -65,7 +65,7 @@ diff -uNr 02_runtime_init/Makefile 03_hacky_hello_world/Makefile
      OBJDUMP_BINARY    = aarch64-none-elf-objdump
      NM_BINARY         = aarch64-none-elf-nm
      READELF_BINARY    = aarch64-none-elf-readelf
-@@ -70,17 +70,20 @@
+@@ -71,17 +71,20 @@
      --strip-all            \
      -O binary
 
@@ -76,21 +76,20 @@ diff -uNr 02_runtime_init/Makefile 03_hacky_hello_world/Makefile
  ##------------------------------------------------------------------------------
  ## Dockerization
  ##------------------------------------------------------------------------------
--DOCKER_IMAGE        = rustembedded/osdev-utils
 -DOCKER_CMD          = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
 -DOCKER_CMD_INTERACT = $(DOCKER_CMD) -i
-+DOCKER_IMAGE          = rustembedded/osdev-utils
 +DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
 +DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
 +DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
 
+ # DOCKER_IMAGE defined in include file (see top of this file).
  DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
  DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 +DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
 
 
 
-@@ -168,3 +171,28 @@
+@@ -169,3 +172,28 @@
  ##------------------------------------------------------------------------------
  check:
  	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
diff --git a/04_safe_globals/Makefile b/04_safe_globals/Makefile
index 19e50b332..586daf99b 100644
--- a/04_safe_globals/Makefile
+++ b/04_safe_globals/Makefile
@@ -2,7 +2,8 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/color.mk.in
+include ../common/color.mk
+include ../common/docker.mk
 
 ##--------------------------------------------------------------------------------------------------
 ## Optional, user-provided configuration values
@@ -76,11 +77,11 @@ EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
 ##------------------------------------------------------------------------------
 ## Dockerization
 ##------------------------------------------------------------------------------
-DOCKER_IMAGE          = rustembedded/osdev-utils
 DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
 DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
 DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
 
+# DOCKER_IMAGE defined in include file (see top of this file).
 DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
 DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
diff --git a/05_drivers_gpio_uart/Makefile b/05_drivers_gpio_uart/Makefile
index c38e049eb..cd09a5408 100644
--- a/05_drivers_gpio_uart/Makefile
+++ b/05_drivers_gpio_uart/Makefile
@@ -2,7 +2,8 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/color.mk.in
+include ../common/color.mk
+include ../common/docker.mk
 
 ##--------------------------------------------------------------------------------------------------
 ## Optional, user-provided configuration values
@@ -80,12 +81,12 @@ EXEC_MINITERM      = ruby ../common/serial/miniterm.rb
 ##------------------------------------------------------------------------------
 ## Dockerization
 ##------------------------------------------------------------------------------
-DOCKER_IMAGE          = rustembedded/osdev-utils
 DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
 DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
 DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
 DOCKER_ARG_DEV        = --privileged -v /dev:/dev
 
+# DOCKER_IMAGE defined in include file (see top of this file).
 DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
 DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
diff --git a/05_drivers_gpio_uart/README.md b/05_drivers_gpio_uart/README.md
index cbfd06fe2..00d232128 100644
--- a/05_drivers_gpio_uart/README.md
+++ b/05_drivers_gpio_uart/README.md
@@ -145,7 +145,7 @@ diff -uNr 04_safe_globals/Cargo.toml 05_drivers_gpio_uart/Cargo.toml
 diff -uNr 04_safe_globals/Makefile 05_drivers_gpio_uart/Makefile
 --- 04_safe_globals/Makefile
 +++ 05_drivers_gpio_uart/Makefile
-@@ -11,6 +11,9 @@
+@@ -12,6 +12,9 @@
  # Default to the RPi3.
  BSP ?= rpi3
 
@@ -155,7 +155,7 @@ diff -uNr 04_safe_globals/Makefile 05_drivers_gpio_uart/Makefile
 
 
  ##--------------------------------------------------------------------------------------------------
-@@ -72,6 +75,7 @@
+@@ -73,6 +76,7 @@
 
  EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
  EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
@@ -163,12 +163,13 @@ diff -uNr 04_safe_globals/Makefile 05_drivers_gpio_uart/Makefile
 
  ##------------------------------------------------------------------------------
  ## Dockerization
-@@ -80,17 +84,25 @@
+@@ -80,18 +84,26 @@
  DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
  DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
  DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
 +DOCKER_ARG_DEV        = --privileged -v /dev:/dev
 
+ # DOCKER_IMAGE defined in include file (see top of this file).
  DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
  DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
  DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
@@ -190,7 +191,7 @@ diff -uNr 04_safe_globals/Makefile 05_drivers_gpio_uart/Makefile
 
  all: $(KERNEL_BIN)
 
-@@ -130,6 +142,12 @@
+@@ -131,6 +143,12 @@
  endif
 
  ##------------------------------------------------------------------------------
diff --git a/06_uart_chainloader/Makefile b/06_uart_chainloader/Makefile
index 3064e67a0..e4f94ad19 100644
--- a/06_uart_chainloader/Makefile
+++ b/06_uart_chainloader/Makefile
@@ -2,7 +2,8 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/color.mk.in
+include ../common/color.mk
+include ../common/docker.mk
 
 ##--------------------------------------------------------------------------------------------------
 ## Optional, user-provided configuration values
@@ -82,12 +83,12 @@ EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
 ##------------------------------------------------------------------------------
 ## Dockerization
 ##------------------------------------------------------------------------------
-DOCKER_IMAGE          = rustembedded/osdev-utils
 DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
 DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
 DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
 DOCKER_ARG_DEV        = --privileged -v /dev:/dev
 
+# DOCKER_IMAGE defined in include file (see top of this file).
 DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
 DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
diff --git a/06_uart_chainloader/README.md b/06_uart_chainloader/README.md
index baeb9236c..8a927389a 100644
--- a/06_uart_chainloader/README.md
+++ b/06_uart_chainloader/README.md
@@ -137,7 +137,7 @@ Binary files 05_drivers_gpio_uart/demo_payload_rpi4.img and 06_uart_chainloader/
 diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
 --- 05_drivers_gpio_uart/Makefile
 +++ 06_uart_chainloader/Makefile
-@@ -22,27 +22,29 @@
+@@ -23,27 +23,29 @@
 
  # BSP-specific arguments.
  ifeq ($(BSP),rpi3)
@@ -187,7 +187,7 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
  endif
 
  QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
-@@ -74,8 +76,8 @@
+@@ -75,8 +77,8 @@
      -O binary
 
  EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
@@ -198,7 +198,7 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
 
  ##------------------------------------------------------------------------------
  ## Dockerization
-@@ -94,7 +96,7 @@
+@@ -95,7 +97,7 @@
  ifeq ($(shell uname -s),Linux)
      DOCKER_CMD_DEV = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DEV)
 
@@ -207,7 +207,7 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
  endif
 
 
-@@ -102,7 +104,7 @@
+@@ -103,7 +105,7 @@
  ##--------------------------------------------------------------------------------------------------
  ## Targets
  ##--------------------------------------------------------------------------------------------------
@@ -216,7 +216,7 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
 
  all: $(KERNEL_BIN)
 
-@@ -131,7 +133,7 @@
+@@ -132,7 +134,7 @@
  ##------------------------------------------------------------------------------
  ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
@@ -225,7 +225,7 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
  	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
 
  else # QEMU is supported.
-@@ -139,13 +141,18 @@
+@@ -140,13 +142,18 @@
  qemu: $(KERNEL_BIN)
  	$(call colorecho, "\nLaunching QEMU")
  	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
@@ -247,7 +247,7 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
 
  ##------------------------------------------------------------------------------
  ## Run clippy
-@@ -209,7 +216,8 @@
+@@ -210,7 +217,8 @@
  ##------------------------------------------------------------------------------
  test_boot: $(KERNEL_BIN)
  	$(call colorecho, "\nBoot test - $(BSP)")
diff --git a/07_timestamps/Makefile b/07_timestamps/Makefile
index 8336ccb72..d5023b033 100644
--- a/07_timestamps/Makefile
+++ b/07_timestamps/Makefile
@@ -2,7 +2,8 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/color.mk.in
+include ../common/color.mk
+include ../common/docker.mk
 
 ##--------------------------------------------------------------------------------------------------
 ## Optional, user-provided configuration values
@@ -80,12 +81,12 @@ EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
 ##------------------------------------------------------------------------------
 ## Dockerization
 ##------------------------------------------------------------------------------
-DOCKER_IMAGE          = rustembedded/osdev-utils
 DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
 DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
 DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
 DOCKER_ARG_DEV        = --privileged -v /dev:/dev
 
+# DOCKER_IMAGE defined in include file (see top of this file).
 DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
 DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index f081733bd..d1c535749 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -62,7 +62,7 @@ Binary files 06_uart_chainloader/demo_payload_rpi4.img and 07_timestamps/demo_pa
 diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
 --- 06_uart_chainloader/Makefile
 +++ 07_timestamps/Makefile
-@@ -22,29 +22,27 @@
+@@ -23,29 +23,27 @@
 
  # BSP-specific arguments.
  ifeq ($(BSP),rpi3)
@@ -112,7 +112,7 @@ diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
  endif
 
  QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
-@@ -76,7 +74,7 @@
+@@ -77,7 +75,7 @@
      -O binary
 
  EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
@@ -121,7 +121,7 @@ diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
  EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
 
  ##------------------------------------------------------------------------------
-@@ -133,7 +131,7 @@
+@@ -134,7 +132,7 @@
  ##------------------------------------------------------------------------------
  ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
@@ -130,7 +130,7 @@ diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
  	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
 
  else # QEMU is supported.
-@@ -142,17 +140,13 @@
+@@ -143,17 +141,13 @@
  	$(call colorecho, "\nLaunching QEMU")
  	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
@@ -149,7 +149,7 @@ diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
 
  ##------------------------------------------------------------------------------
  ## Run clippy
-@@ -216,8 +210,7 @@
+@@ -217,8 +211,7 @@
  ##------------------------------------------------------------------------------
  test_boot: $(KERNEL_BIN)
  	$(call colorecho, "\nBoot test - $(BSP)")
diff --git a/08_hw_debug_JTAG/Makefile b/08_hw_debug_JTAG/Makefile
index 0a2443acc..dd739e130 100644
--- a/08_hw_debug_JTAG/Makefile
+++ b/08_hw_debug_JTAG/Makefile
@@ -2,7 +2,8 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/color.mk.in
+include ../common/color.mk
+include ../common/docker.mk
 
 ##--------------------------------------------------------------------------------------------------
 ## Optional, user-provided configuration values
@@ -84,7 +85,6 @@ EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
 ##------------------------------------------------------------------------------
 ## Dockerization
 ##------------------------------------------------------------------------------
-DOCKER_IMAGE          = rustembedded/osdev-utils
 DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
 DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
 DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
@@ -92,6 +92,7 @@ DOCKER_ARG_DIR_JTAG   = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
 DOCKER_ARG_DEV        = --privileged -v /dev:/dev
 DOCKER_ARG_NET        = --network host
 
+# DOCKER_IMAGE defined in include file (see top of this file).
 DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
 DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
diff --git a/08_hw_debug_JTAG/README.md b/08_hw_debug_JTAG/README.md
index 355b2d3da..0742cdf13 100644
--- a/08_hw_debug_JTAG/README.md
+++ b/08_hw_debug_JTAG/README.md
@@ -320,7 +320,7 @@ diff -uNr 07_timestamps/Cargo.toml 08_hw_debug_JTAG/Cargo.toml
 diff -uNr 07_timestamps/Makefile 08_hw_debug_JTAG/Makefile
 --- 07_timestamps/Makefile
 +++ 08_hw_debug_JTAG/Makefile
-@@ -30,6 +30,8 @@
+@@ -31,6 +31,8 @@
      OBJDUMP_BINARY    = aarch64-none-elf-objdump
      NM_BINARY         = aarch64-none-elf-nm
      READELF_BINARY    = aarch64-none-elf-readelf
@@ -329,7 +329,7 @@ diff -uNr 07_timestamps/Makefile 08_hw_debug_JTAG/Makefile
      LINKER_FILE       = src/bsp/raspberrypi/link.ld
      RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
  else ifeq ($(BSP),rpi4)
-@@ -41,6 +43,8 @@
+@@ -42,6 +44,8 @@
      OBJDUMP_BINARY    = aarch64-none-elf-objdump
      NM_BINARY         = aarch64-none-elf-nm
      READELF_BINARY    = aarch64-none-elf-readelf
@@ -338,7 +338,7 @@ diff -uNr 07_timestamps/Makefile 08_hw_debug_JTAG/Makefile
      LINKER_FILE       = src/bsp/raspberrypi/link.ld
      RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
  endif
-@@ -84,17 +88,24 @@
+@@ -84,18 +88,25 @@
  DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
  DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
  DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
@@ -346,6 +346,7 @@ diff -uNr 07_timestamps/Makefile 08_hw_debug_JTAG/Makefile
  DOCKER_ARG_DEV        = --privileged -v /dev:/dev
 +DOCKER_ARG_NET        = --network host
 
+ # DOCKER_IMAGE defined in include file (see top of this file).
  DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
  DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
  DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
@@ -363,7 +364,7 @@ diff -uNr 07_timestamps/Makefile 08_hw_debug_JTAG/Makefile
  endif
 
 
-@@ -193,6 +204,35 @@
+@@ -194,6 +205,35 @@
 
 
 
diff --git a/09_privilege_level/Makefile b/09_privilege_level/Makefile
index 0a2443acc..dd739e130 100644
--- a/09_privilege_level/Makefile
+++ b/09_privilege_level/Makefile
@@ -2,7 +2,8 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/color.mk.in
+include ../common/color.mk
+include ../common/docker.mk
 
 ##--------------------------------------------------------------------------------------------------
 ## Optional, user-provided configuration values
@@ -84,7 +85,6 @@ EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
 ##------------------------------------------------------------------------------
 ## Dockerization
 ##------------------------------------------------------------------------------
-DOCKER_IMAGE          = rustembedded/osdev-utils
 DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
 DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
 DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
@@ -92,6 +92,7 @@ DOCKER_ARG_DIR_JTAG   = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
 DOCKER_ARG_DEV        = --privileged -v /dev:/dev
 DOCKER_ARG_NET        = --network host
 
+# DOCKER_IMAGE defined in include file (see top of this file).
 DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
 DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
diff --git a/10_virtual_mem_part1_identity_mapping/Makefile b/10_virtual_mem_part1_identity_mapping/Makefile
index 0a2443acc..dd739e130 100644
--- a/10_virtual_mem_part1_identity_mapping/Makefile
+++ b/10_virtual_mem_part1_identity_mapping/Makefile
@@ -2,7 +2,8 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/color.mk.in
+include ../common/color.mk
+include ../common/docker.mk
 
 ##--------------------------------------------------------------------------------------------------
 ## Optional, user-provided configuration values
@@ -84,7 +85,6 @@ EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
 ##------------------------------------------------------------------------------
 ## Dockerization
 ##------------------------------------------------------------------------------
-DOCKER_IMAGE          = rustembedded/osdev-utils
 DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
 DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
 DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
@@ -92,6 +92,7 @@ DOCKER_ARG_DIR_JTAG   = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
 DOCKER_ARG_DEV        = --privileged -v /dev:/dev
 DOCKER_ARG_NET        = --network host
 
+# DOCKER_IMAGE defined in include file (see top of this file).
 DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
 DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
diff --git a/11_exceptions_part1_groundwork/Makefile b/11_exceptions_part1_groundwork/Makefile
index 0a2443acc..dd739e130 100644
--- a/11_exceptions_part1_groundwork/Makefile
+++ b/11_exceptions_part1_groundwork/Makefile
@@ -2,7 +2,8 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/color.mk.in
+include ../common/color.mk
+include ../common/docker.mk
 
 ##--------------------------------------------------------------------------------------------------
 ## Optional, user-provided configuration values
@@ -84,7 +85,6 @@ EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
 ##------------------------------------------------------------------------------
 ## Dockerization
 ##------------------------------------------------------------------------------
-DOCKER_IMAGE          = rustembedded/osdev-utils
 DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
 DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
 DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
@@ -92,6 +92,7 @@ DOCKER_ARG_DIR_JTAG   = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
 DOCKER_ARG_DEV        = --privileged -v /dev:/dev
 DOCKER_ARG_NET        = --network host
 
+# DOCKER_IMAGE defined in include file (see top of this file).
 DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
 DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
diff --git a/12_integrated_testing/Makefile b/12_integrated_testing/Makefile
index 080049863..492d30692 100644
--- a/12_integrated_testing/Makefile
+++ b/12_integrated_testing/Makefile
@@ -2,7 +2,8 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/color.mk.in
+include ../common/color.mk
+include ../common/docker.mk
 
 ##--------------------------------------------------------------------------------------------------
 ## Optional, user-provided configuration values
@@ -94,7 +95,6 @@ EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
 ##------------------------------------------------------------------------------
 ## Dockerization
 ##------------------------------------------------------------------------------
-DOCKER_IMAGE          = rustembedded/osdev-utils
 DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
 DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
 DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
@@ -102,6 +102,7 @@ DOCKER_ARG_DIR_JTAG   = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
 DOCKER_ARG_DEV        = --privileged -v /dev:/dev
 DOCKER_ARG_NET        = --network host
 
+# DOCKER_IMAGE defined in include file (see top of this file).
 DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
 DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
diff --git a/12_integrated_testing/README.md b/12_integrated_testing/README.md
index a7fc3969b..607c5b5d3 100644
--- a/12_integrated_testing/README.md
+++ b/12_integrated_testing/README.md
@@ -938,7 +938,7 @@ diff -uNr 11_exceptions_part1_groundwork/Cargo.toml 12_integrated_testing/Cargo.
 diff -uNr 11_exceptions_part1_groundwork/Makefile 12_integrated_testing/Makefile
 --- 11_exceptions_part1_groundwork/Makefile
 +++ 12_integrated_testing/Makefile
-@@ -14,6 +14,13 @@
+@@ -15,6 +15,13 @@
  # Default to a serial device name that is common in Linux.
  DEV_SERIAL ?= /dev/ttyUSB0
 
@@ -952,7 +952,7 @@ diff -uNr 11_exceptions_part1_groundwork/Makefile 12_integrated_testing/Makefile
 
 
  ##--------------------------------------------------------------------------------------------------
-@@ -27,6 +34,7 @@
+@@ -28,6 +35,7 @@
      QEMU_BINARY       = qemu-system-aarch64
      QEMU_MACHINE_TYPE = raspi3
      QEMU_RELEASE_ARGS = -serial stdio -display none
@@ -960,7 +960,7 @@ diff -uNr 11_exceptions_part1_groundwork/Makefile 12_integrated_testing/Makefile
      OBJDUMP_BINARY    = aarch64-none-elf-objdump
      NM_BINARY         = aarch64-none-elf-nm
      READELF_BINARY    = aarch64-none-elf-readelf
-@@ -40,6 +48,7 @@
+@@ -41,6 +49,7 @@
      QEMU_BINARY       = qemu-system-aarch64
      QEMU_MACHINE_TYPE =
      QEMU_RELEASE_ARGS = -serial stdio -display none
@@ -968,7 +968,7 @@ diff -uNr 11_exceptions_part1_groundwork/Makefile 12_integrated_testing/Makefile
      OBJDUMP_BINARY    = aarch64-none-elf-objdump
      NM_BINARY         = aarch64-none-elf-nm
      READELF_BINARY    = aarch64-none-elf-readelf
-@@ -73,6 +82,7 @@
+@@ -74,6 +83,7 @@
  DOC_CMD     = cargo doc $(COMPILER_ARGS)
  CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
  CHECK_CMD   = cargo check $(COMPILER_ARGS)
@@ -976,7 +976,7 @@ diff -uNr 11_exceptions_part1_groundwork/Makefile 12_integrated_testing/Makefile
  OBJCOPY_CMD = rust-objcopy \
      --strip-all            \
      -O binary
-@@ -236,11 +246,11 @@
+@@ -237,11 +247,11 @@
  ##--------------------------------------------------------------------------------------------------
  ## Testing targets
  ##--------------------------------------------------------------------------------------------------
@@ -990,7 +990,7 @@ diff -uNr 11_exceptions_part1_groundwork/Makefile 12_integrated_testing/Makefile
  	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
 
  else # QEMU is supported.
-@@ -252,6 +262,45 @@
+@@ -253,6 +263,45 @@
  	$(call colorecho, "\nBoot test - $(BSP)")
  	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
diff --git a/13_exceptions_part2_peripheral_IRQs/Makefile b/13_exceptions_part2_peripheral_IRQs/Makefile
index e860f00dd..777031a17 100644
--- a/13_exceptions_part2_peripheral_IRQs/Makefile
+++ b/13_exceptions_part2_peripheral_IRQs/Makefile
@@ -2,7 +2,8 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/color.mk.in
+include ../common/color.mk
+include ../common/docker.mk
 
 ##--------------------------------------------------------------------------------------------------
 ## Optional, user-provided configuration values
@@ -94,7 +95,6 @@ EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
 ##------------------------------------------------------------------------------
 ## Dockerization
 ##------------------------------------------------------------------------------
-DOCKER_IMAGE          = rustembedded/osdev-utils
 DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
 DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
 DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
@@ -102,6 +102,7 @@ DOCKER_ARG_DIR_JTAG   = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
 DOCKER_ARG_DEV        = --privileged -v /dev:/dev
 DOCKER_ARG_NET        = --network host
 
+# DOCKER_IMAGE defined in include file (see top of this file).
 DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
 DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index f1f3f1a7d..1bc3ed7f5 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -761,7 +761,7 @@ diff -uNr 12_integrated_testing/Cargo.toml 13_exceptions_part2_peripheral_IRQs/C
 diff -uNr 12_integrated_testing/Makefile 13_exceptions_part2_peripheral_IRQs/Makefile
 --- 12_integrated_testing/Makefile
 +++ 13_exceptions_part2_peripheral_IRQs/Makefile
-@@ -291,7 +291,7 @@
+@@ -292,7 +292,7 @@
  test_unit:
  	$(call colorecho, "\nCompiling unit test(s) - $(BSP)")
  	$(call test_prepare)
diff --git a/14_virtual_mem_part2_mmio_remap/Makefile b/14_virtual_mem_part2_mmio_remap/Makefile
index e860f00dd..777031a17 100644
--- a/14_virtual_mem_part2_mmio_remap/Makefile
+++ b/14_virtual_mem_part2_mmio_remap/Makefile
@@ -2,7 +2,8 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/color.mk.in
+include ../common/color.mk
+include ../common/docker.mk
 
 ##--------------------------------------------------------------------------------------------------
 ## Optional, user-provided configuration values
@@ -94,7 +95,6 @@ EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
 ##------------------------------------------------------------------------------
 ## Dockerization
 ##------------------------------------------------------------------------------
-DOCKER_IMAGE          = rustembedded/osdev-utils
 DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
 DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
 DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
@@ -102,6 +102,7 @@ DOCKER_ARG_DIR_JTAG   = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
 DOCKER_ARG_DEV        = --privileged -v /dev:/dev
 DOCKER_ARG_NET        = --network host
 
+# DOCKER_IMAGE defined in include file (see top of this file).
 DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
 DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
diff --git a/15_virtual_mem_part3_precomputed_tables/Makefile b/15_virtual_mem_part3_precomputed_tables/Makefile
index 86a64ee5a..f484b21a2 100644
--- a/15_virtual_mem_part3_precomputed_tables/Makefile
+++ b/15_virtual_mem_part3_precomputed_tables/Makefile
@@ -2,7 +2,8 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/color.mk.in
+include ../common/color.mk
+include ../common/docker.mk
 
 ##--------------------------------------------------------------------------------------------------
 ## Optional, user-provided configuration values
@@ -95,7 +96,6 @@ EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
 ##------------------------------------------------------------------------------
 ## Dockerization
 ##------------------------------------------------------------------------------
-DOCKER_IMAGE          = rustembedded/osdev-utils
 DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
 DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
 DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
@@ -103,6 +103,7 @@ DOCKER_ARG_DIR_JTAG   = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
 DOCKER_ARG_DEV        = --privileged -v /dev:/dev
 DOCKER_ARG_NET        = --network host
 
+# DOCKER_IMAGE defined in include file (see top of this file).
 DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
 DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index f786f1e89..3e7ca4bdf 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -777,7 +777,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/Cargo.toml 15_virtual_mem_part3_precom
 diff -uNr 14_virtual_mem_part2_mmio_remap/Makefile 15_virtual_mem_part3_precomputed_tables/Makefile
 --- 14_virtual_mem_part2_mmio_remap/Makefile
 +++ 15_virtual_mem_part3_precomputed_tables/Makefile
-@@ -88,6 +88,7 @@
+@@ -89,6 +89,7 @@
      -O binary
 
  EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
@@ -785,7 +785,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/Makefile 15_virtual_mem_part3_precompu
  EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
  EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
 
-@@ -133,6 +134,7 @@
+@@ -134,6 +135,7 @@
  $(KERNEL_ELF):
  	$(call colorecho, "\nCompiling kernel - $(BSP)")
  	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
@@ -793,7 +793,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/Makefile 15_virtual_mem_part3_precompu
 
  ##------------------------------------------------------------------------------
  ## Build the stripped kernel binary
-@@ -271,6 +273,7 @@
+@@ -272,6 +274,7 @@
      TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
      TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/Makefile b/16_virtual_mem_part4_higher_half_kernel/Makefile
index 86a64ee5a..f484b21a2 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Makefile
+++ b/16_virtual_mem_part4_higher_half_kernel/Makefile
@@ -2,7 +2,8 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/color.mk.in
+include ../common/color.mk
+include ../common/docker.mk
 
 ##--------------------------------------------------------------------------------------------------
 ## Optional, user-provided configuration values
@@ -95,7 +96,6 @@ EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
 ##------------------------------------------------------------------------------
 ## Dockerization
 ##------------------------------------------------------------------------------
-DOCKER_IMAGE          = rustembedded/osdev-utils
 DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
 DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
 DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
@@ -103,6 +103,7 @@ DOCKER_ARG_DIR_JTAG   = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
 DOCKER_ARG_DEV        = --privileged -v /dev:/dev
 DOCKER_ARG_NET        = --network host
 
+# DOCKER_IMAGE defined in include file (see top of this file).
 DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
 DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
diff --git a/X1_JTAG_boot/Makefile b/X1_JTAG_boot/Makefile
index 8336ccb72..d5023b033 100644
--- a/X1_JTAG_boot/Makefile
+++ b/X1_JTAG_boot/Makefile
@@ -2,7 +2,8 @@
 ##
 ## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/color.mk.in
+include ../common/color.mk
+include ../common/docker.mk
 
 ##--------------------------------------------------------------------------------------------------
 ## Optional, user-provided configuration values
@@ -80,12 +81,12 @@ EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
 ##------------------------------------------------------------------------------
 ## Dockerization
 ##------------------------------------------------------------------------------
-DOCKER_IMAGE          = rustembedded/osdev-utils
 DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
 DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
 DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
 DOCKER_ARG_DEV        = --privileged -v /dev:/dev
 
+# DOCKER_IMAGE defined in include file (see top of this file).
 DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
 DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
diff --git a/common/color.mk.in b/common/color.mk
similarity index 100%
rename from common/color.mk.in
rename to common/color.mk
diff --git a/common/docker.mk b/common/docker.mk
new file mode 100644
index 000000000..c4b92f73d
--- /dev/null
+++ b/common/docker.mk
@@ -0,0 +1 @@
+DOCKER_IMAGE = rustembedded/osdev-utils:2021.11
diff --git a/docker/rustembedded-osdev-utils/Dockerfile b/docker/rustembedded-osdev-utils/Dockerfile
index 1366abf2d..981f3da7c 100644
--- a/docker/rustembedded-osdev-utils/Dockerfile
+++ b/docker/rustembedded-osdev-utils/Dockerfile
@@ -41,12 +41,13 @@ RUN set -ex;                                      \
         ruby-dev                                  \
     ;                                             \
     # Ruby dependencies
-    gem install bundler;                            \
-    bundle install --retry 3 --without development; \
+    gem install bundler;                             \
+    bundle config set --local without 'development'; \
+    bundle install --retry 3;                        \
     # QEMU
-    git clone https://git.qemu.org/git/qemu.git;               \
+    git clone https://gitlab.com/qemu-project/qemu.git;        \
     cd qemu;                                                   \
-    git checkout tags/v5.2.0;                                  \
+    git checkout tags/v6.1.0;                                  \
     ./configure --target-list=aarch64-softmmu --enable-modules \
         --enable-tcg-interpreter --enable-debug-tcg            \
         --python=/usr/bin/python3;                             \
@@ -81,8 +82,8 @@ RUN set -ex;                                      \
 # Locales
 RUN locale-gen en_US.UTF-8
 
-ENV LANG=en_US.UTF-8  \
-    LANGUAGE=en_US:en \
+ENV LANG=en_US.UTF-8   \
+    LANGUAGE=en_US:en  \
     LC_ALL=en_US.UTF-8 \
     RUBYOPT=-W0
 
diff --git a/docker/rustembedded-osdev-utils/Makefile b/docker/rustembedded-osdev-utils/Makefile
index e40b5ac4f..9418ee87e 100644
--- a/docker/rustembedded-osdev-utils/Makefile
+++ b/docker/rustembedded-osdev-utils/Makefile
@@ -6,6 +6,6 @@ default: docker_build
 
 docker_build:
 	cp ../../Gemfile .
-	docker build -t rustembedded/osdev-utils \
+	docker build -t rustembedded/osdev-utils:2021.11 \
 	--build-arg VCS_REF=`git rev-parse --short HEAD` .
 	rm Gemfile

From 89472abea5244f691874a158ad4c1ca95483b0cc Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 22 Nov 2021 22:37:13 +0100
Subject: [PATCH 101/214] Support for multi-arch Docker images

---
 README.md                                  | 15 +++++++-------
 docker/rustembedded-osdev-utils/Dockerfile | 24 ++++++++++++----------
 docker/rustembedded-osdev-utils/Makefile   | 22 ++++++++++++++++----
 3 files changed, 38 insertions(+), 23 deletions(-)

diff --git a/README.md b/README.md
index 376641e97..49c4060f0 100644
--- a/README.md
+++ b/README.md
@@ -59,13 +59,12 @@ moment though.
 
 ## 🛠 System Requirements
 
-The tutorials are primarily targeted at **Linux**-based distributions. Most stuff will also work on
-other Unix flavors such as **macOS**, but this is only _experimental_.
+The tutorials are primarily targeted at **Linux**-based distributions. Most stuff will also work on **macOS**, but this is only _experimental_.
 
 ### 🚀 The tl;dr Version
 
-1. [Install Docker][install_docker].
-1. Ensure your user account is in the [docker group].
+1. [Install Docker Desktop][install_docker].
+1. (**Linux only**) Ensure your user account is in the [docker group].
 1. Prepare the `Rust` toolchain. Most of it will be handled on first use through the
    [rust-toolchain](rust-toolchain) file. What's left for us to do is:
    1. If you already have a version of Rust installed:
@@ -82,12 +81,12 @@ other Unix flavors such as **macOS**, but this is only _experimental_.
       ```
 
 1. In case you use `Visual Studio Code`, I strongly recommend installing the [Rust Analyzer extension].
-1. If you are **NOT** running Linux, some `Ruby` gems are needed as well:
+1. (**macOS only**) Install a few `Ruby` gems.
+
+   Run this in the repository root folder:
 
    ```bash
-   sudo gem install bundler
-   bundle config set path '.vendor/bundle'
-   bundle install
+   bundle install --path .vendor/bundle --without development
    ```
 
 [docker group]: https://docs.docker.com/engine/install/linux-postinstall/
diff --git a/docker/rustembedded-osdev-utils/Dockerfile b/docker/rustembedded-osdev-utils/Dockerfile
index 981f3da7c..f540a38c8 100644
--- a/docker/rustembedded-osdev-utils/Dockerfile
+++ b/docker/rustembedded-osdev-utils/Dockerfile
@@ -5,6 +5,8 @@
 FROM ubuntu:20.04
 
 ARG VCS_REF
+ARG GCC_AARCH64=https://developer.arm.com/-/media/Files/downloads/gnu-a/10.3-2021.07/binrel/gcc-arm-10.3-2021.07-aarch64-aarch64-none-elf.tar.xz
+ARG GCC_X86_64=https://developer.arm.com/-/media/Files/downloads/gnu-a/10.3-2021.07/binrel/gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf.tar.xz
 
 LABEL org.label-schema.vcs-ref=$VCS_REF \
     org.label-schema.vcs-url="https://github.com/rust-embedded/rust-raspberrypi-OS-tutorials"
@@ -40,6 +42,15 @@ RUN set -ex;                                      \
         ruby                                      \
         ruby-dev                                  \
     ;                                             \
+    # GCC AArch64 tools
+    if [ "$(uname -m)" = "aarch64" ]; then wget ${GCC_AARCH64}; else wget ${GCC_X86_64}; fi; \
+    tar -xf gcc-arm-10*;                                                                     \
+    cp                                                                                       \
+        gcc-arm-10*/bin/aarch64-none-elf-objdump                                             \
+        gcc-arm-10*/bin/aarch64-none-elf-readelf                                             \
+        gcc-arm-10*/bin/aarch64-none-elf-nm                                                  \
+        /usr/local/bin/;                                                                     \
+    rm -rf gcc-arm-10*;                                                                      \
     # Ruby dependencies
     gem install bundler;                             \
     bundle config set --local without 'development'; \
@@ -51,7 +62,7 @@ RUN set -ex;                                      \
     ./configure --target-list=aarch64-softmmu --enable-modules \
         --enable-tcg-interpreter --enable-debug-tcg            \
         --python=/usr/bin/python3;                             \
-    make -j8;                                                  \
+    make -j10;                                                 \
     make install;                                              \
     cd ..;                                                     \
     rm -rf qemu;                                               \
@@ -60,19 +71,10 @@ RUN set -ex;                                      \
     cd openocd;                                                         \
     ./bootstrap;                                                        \
     ./configure --enable-ftdi;                                          \
-    make -j8;                                                           \
+    make -j10;                                                          \
     make install;                                                       \
     # GDB
     wget -P ~ git.io/.gdbinit; \
-    # GCC AArch64 tools
-    wget https://developer.arm.com/-/media/Files/downloads/gnu-a/10.2-2020.11/binrel/gcc-arm-10.2-2020.11-x86_64-aarch64-none-elf.tar.xz; \
-    tar -xf gcc-arm-10*;                                                                                                                  \
-    cp                                                                                                                                    \
-        gcc-arm-10*/bin/aarch64-none-elf-objdump                                                                                          \
-        gcc-arm-10*/bin/aarch64-none-elf-readelf                                                                                          \
-        gcc-arm-10*/bin/aarch64-none-elf-nm                                                                                               \
-        /usr/local/bin/;                                                                                                                  \
-    rm -rf gcc-arm-10*;                                                                                                                   \
     # Cleanup
     apt-get purge -y --auto-remove $tempPkgs; \
     apt-get autoremove -q -y;                 \
diff --git a/docker/rustembedded-osdev-utils/Makefile b/docker/rustembedded-osdev-utils/Makefile
index 9418ee87e..c69ce62d0 100644
--- a/docker/rustembedded-osdev-utils/Makefile
+++ b/docker/rustembedded-osdev-utils/Makefile
@@ -2,10 +2,24 @@
 ##
 ## Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
 
-default: docker_build
+# Reference followed: https://www.docker.com/blog/getting-started-with-docker-for-arm-on-linux
 
-docker_build:
+TAG=2021.11
+
+default: build_local
+
+build_local:
+	cp ../../Gemfile .
+	docker build                                           \
+	    --tag rustembedded/osdev-utils:$(TAG)              \
+	    --build-arg VCS_REF=`git rev-parse --short HEAD` . \
+	rm Gemfile
+
+buildx_push:
 	cp ../../Gemfile .
-	docker build -t rustembedded/osdev-utils:2021.11 \
-	--build-arg VCS_REF=`git rev-parse --short HEAD` .
+	docker buildx build                                    \
+	    --push                                             \
+	    --platform linux/arm64/v8,linux/amd64              \
+	    --tag rustembedded/osdev-utils:$(TAG)              \
+	    --build-arg VCS_REF=`git rev-parse --short HEAD` .
 	rm Gemfile

From 02c01c821bddf44d42adb36531f098d5fb37f225 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Thu, 2 Dec 2021 20:44:12 +0100
Subject: [PATCH 102/214] Refactor memory subsystem code

This patch refactors big chunks of the memory subsystem code.

Most of all, it does away with the the design being based around the raw pointer
type "*const Page". While raw pointers to an actual page seemed like a
compelling idea, in practice it turned out difficult. Rust feels a bit
inconsistent with respect to raw pointers. While it is safe to create them out
of nowhere (only dereferencing is unsafe), it gets weird when multi-threading
comes into picture.

For example, wrapping them into synchronization primitives caused issues because
they don't implement Send. For this reason, we switch to the PageAddress type
which is based on usize, which makes things a lot easier.

Other changes/benefits include:

- Gets rid of unsafe code in the removed PageSlice type.

- Decouple the translation table code and MMIO VA allocation.

- For the translation table tool, make better use of what the ELF format already
  provides with respect to memory segmentation and translation. For example, the
  tool now queries the ELF file for VA->PA translations and other segment
  attributes. This has also the added benefit of reduced BSP code and more
  generic code in the tool.

- Packs rbelftools in the Docker image now (used by translation table tool).

- In tutorials 14/15/16, rearrange the PA and VA layout.
---
 .rubocop.yml                                  |    3 +
 01_wait_forever/src/bsp/raspberrypi/link.ld   |   18 +-
 02_runtime_init/README.md                     |   56 +-
 02_runtime_init/src/bsp/raspberrypi/link.ld   |   53 +-
 .../src/bsp/raspberrypi/link.ld               |   53 +-
 04_safe_globals/src/bsp/raspberrypi/link.ld   |   53 +-
 .../src/bsp/raspberrypi/link.ld               |   53 +-
 06_uart_chainloader/README.md                 |   27 +-
 .../src/bsp/raspberrypi/link.ld               |   49 +-
 07_timestamps/README.md                       |   27 +-
 07_timestamps/src/bsp/raspberrypi/link.ld     |   53 +-
 08_hw_debug_JTAG/src/bsp/raspberrypi/link.ld  |   53 +-
 .../src/bsp/raspberrypi/link.ld               |   53 +-
 .../README.md                                 |   99 +-
 .../src/bsp/raspberrypi/link.ld               |   64 +-
 .../src/bsp/raspberrypi/memory.rs             |   44 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |    6 +-
 11_exceptions_part1_groundwork/README.md      |    2 +-
 .../src/bsp/raspberrypi/link.ld               |   64 +-
 .../src/bsp/raspberrypi/memory.rs             |   44 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |    6 +-
 .../src/bsp/raspberrypi/link.ld               |   64 +-
 .../src/bsp/raspberrypi/memory.rs             |   44 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |    6 +-
 13_exceptions_part2_peripheral_IRQs/README.md |    4 +-
 .../src/bsp/raspberrypi/link.ld               |   64 +-
 .../src/bsp/raspberrypi/memory.rs             |   44 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |    6 +-
 14_virtual_mem_part2_mmio_remap/README.md     | 1805 ++++++++++-------
 .../src/_arch/aarch64/memory/mmu.rs           |    2 +-
 .../aarch64/memory/mmu/translation_table.rs   |  122 +-
 .../src/bsp/device_driver/arm/gicv2.rs        |    8 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |    6 +-
 .../peripheral_ic.rs                          |    4 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |    6 +-
 .../src/bsp/raspberrypi/console.rs            |    4 +-
 .../src/bsp/raspberrypi/link.ld               |   80 +-
 .../src/bsp/raspberrypi/memory.rs             |  155 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |  130 +-
 14_virtual_mem_part2_mmio_remap/src/common.rs |    8 +
 14_virtual_mem_part2_mmio_remap/src/lib.rs    |    2 +
 14_virtual_mem_part2_mmio_remap/src/main.rs   |    2 +
 14_virtual_mem_part2_mmio_remap/src/memory.rs |  112 +-
 .../src/memory/mmu.rs                         |  115 +-
 .../src/memory/mmu/alloc.rs                   |   70 +
 .../src/memory/mmu/mapping_record.rs          |   61 +-
 .../src/memory/mmu/translation_table.rs       |   56 +-
 .../src/memory/mmu/types.rs                   |  330 ++-
 .../tests/02_exception_sync_page_fault.rs     |    4 +-
 .../README.md                                 | 1266 ++++++------
 .../src/_arch/aarch64/cpu/boot.rs             |    7 +-
 .../src/_arch/aarch64/memory/mmu.rs           |    2 +-
 .../aarch64/memory/mmu/translation_table.rs   |  154 +-
 .../src/bsp/device_driver/arm/gicv2.rs        |    8 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |    6 +-
 .../peripheral_ic.rs                          |    4 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |    6 +-
 .../src/bsp/raspberrypi/console.rs            |    6 +-
 .../kernel_virt_addr_space_size.ld            |    2 +-
 .../src/bsp/raspberrypi/link.ld               |   81 +-
 .../src/bsp/raspberrypi/memory.rs             |  155 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |  107 +-
 .../src/common.rs                             |    8 +
 .../src/lib.rs                                |    2 +
 .../src/main.rs                               |    1 +
 .../src/memory.rs                             |  112 +-
 .../src/memory/mmu.rs                         |  127 +-
 .../src/memory/mmu/alloc.rs                   |   70 +
 .../src/memory/mmu/mapping_record.rs          |   61 +-
 .../src/memory/mmu/translation_table.rs       |   80 +-
 .../src/memory/mmu/types.rs                   |  330 ++-
 .../tests/00_console_sanity.rs                |    3 +-
 .../tests/01_timer_sanity.rs                  |    3 +-
 .../tests/02_exception_sync_page_fault.rs     |    3 +-
 .../tests/03_exception_irq_sanity.rs          |    3 +-
 .../translation_table_tool/arch.rb            |   39 +-
 .../translation_table_tool/bsp.rb             |  154 +-
 .../translation_table_tool/generic.rb         |  108 +-
 .../translation_table_tool/kernel_elf.rb      |   92 +
 .../translation_table_tool/main.rb            |   15 +-
 .../README.md                                 |  612 ++++--
 .../src/_arch/aarch64/cpu/boot.rs             |    7 +-
 .../src/_arch/aarch64/memory/mmu.rs           |    2 +-
 .../aarch64/memory/mmu/translation_table.rs   |  178 +-
 .../src/bsp/device_driver/arm/gicv2.rs        |    8 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |    6 +-
 .../peripheral_ic.rs                          |    4 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |    6 +-
 .../src/bsp/raspberrypi/console.rs            |   36 +-
 .../kernel_virt_addr_space_size.ld            |    2 +-
 .../src/bsp/raspberrypi/link.ld               |   87 +-
 .../src/bsp/raspberrypi/memory.rs             |  159 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |  101 +-
 .../src/common.rs                             |    8 +
 .../src/lib.rs                                |    2 +
 .../src/main.rs                               |    1 +
 .../src/memory.rs                             |  112 +-
 .../src/memory/mmu.rs                         |  127 +-
 .../src/memory/mmu/alloc.rs                   |   70 +
 .../src/memory/mmu/mapping_record.rs          |   61 +-
 .../src/memory/mmu/translation_table.rs       |   80 +-
 .../src/memory/mmu/types.rs                   |  335 ++-
 .../tests/00_console_sanity.rs                |    3 +-
 .../tests/01_timer_sanity.rs                  |    3 +-
 .../tests/02_exception_sync_page_fault.rs     |    3 +-
 .../tests/03_exception_irq_sanity.rs          |    3 +-
 .../translation_table_tool/arch.rb            |   37 +-
 .../translation_table_tool/bsp.rb             |  153 +-
 .../translation_table_tool/generic.rb         |  108 +-
 .../translation_table_tool/kernel_elf.rb      |   92 +
 .../translation_table_tool/main.rb            |   15 +-
 Gemfile                                       |    1 +
 X1_JTAG_boot/src/bsp/raspberrypi/link.ld      |   53 +-
 common/docker.mk                              |    2 +-
 docker/rustembedded-osdev-utils/Makefile      |    4 +-
 115 files changed, 5926 insertions(+), 3764 deletions(-)
 create mode 100644 14_virtual_mem_part2_mmio_remap/src/memory/mmu/alloc.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/src/memory/mmu/alloc.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/translation_table_tool/kernel_elf.rb
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/alloc.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/translation_table_tool/kernel_elf.rb

diff --git a/.rubocop.yml b/.rubocop.yml
index a1687fd16..2fd609ed8 100644
--- a/.rubocop.yml
+++ b/.rubocop.yml
@@ -16,6 +16,9 @@ Layout/IndentationWidth:
 Layout/LineLength:
   Max: 100
 
+Metrics/AbcSize:
+  Max: 25
+
 Metrics/ClassLength:
   Enabled: false
 
diff --git a/01_wait_forever/src/bsp/raspberrypi/link.ld b/01_wait_forever/src/bsp/raspberrypi/link.ld
index 60c393d6b..f3906f92d 100644
--- a/01_wait_forever/src/bsp/raspberrypi/link.ld
+++ b/01_wait_forever/src/bsp/raspberrypi/link.ld
@@ -3,19 +3,25 @@
  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
-/* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
-__rpi_load_addr = 0x80000;
+/* The physical address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_phys_binary_load_addr = 0x80000;
 
-ENTRY(__rpi_load_addr)
 
+ENTRY(__rpi_phys_binary_load_addr)
+
+/* Flags:
+ *     4 == R
+ *     5 == RX
+ *     6 == RW
+ */
 PHDRS
 {
-    segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
+    segment_code PT_LOAD FLAGS(5);
 }
 
 SECTIONS
 {
-    . =  __rpi_load_addr;
+    . =  __rpi_phys_binary_load_addr;
 
     /***********************************************************************************************
     * Code
@@ -23,5 +29,5 @@ SECTIONS
     .text :
     {
         KEEP(*(.text._start))
-    } :segment_rx
+    } :segment_code
 }
diff --git a/02_runtime_init/README.md b/02_runtime_init/README.md
index 36d9f7ef9..7c8d44cf9 100644
--- a/02_runtime_init/README.md
+++ b/02_runtime_init/README.md
@@ -200,21 +200,47 @@ diff -uNr 01_wait_forever/src/bsp/raspberrypi/cpu.rs 02_runtime_init/src/bsp/ras
 diff -uNr 01_wait_forever/src/bsp/raspberrypi/link.ld 02_runtime_init/src/bsp/raspberrypi/link.ld
 --- 01_wait_forever/src/bsp/raspberrypi/link.ld
 +++ 02_runtime_init/src/bsp/raspberrypi/link.ld
-@@ -11,17 +11,43 @@
+@@ -3,6 +3,8 @@
+  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+  */
+
++__rpi_phys_dram_start_addr = 0;
++
+ /* The physical address at which the the kernel binary will be loaded by the Raspberry's firmware */
+ __rpi_phys_binary_load_addr = 0x80000;
+
+@@ -13,21 +15,58 @@
+  *     4 == R
+  *     5 == RX
+  *     6 == RW
++ *
++ * Segments are marked PT_LOAD below so that the ELF file provides virtual and physical addresses.
++ * It doesn't mean all of them need actually be loaded.
+  */
  PHDRS
  {
-     segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
-+    segment_rw PT_LOAD FLAGS(6); /* 6 == RW */
+-    segment_code PT_LOAD FLAGS(5);
++    segment_boot_core_stack PT_LOAD FLAGS(6);
++    segment_code            PT_LOAD FLAGS(5);
++    segment_data            PT_LOAD FLAGS(6);
  }
 
  SECTIONS
  {
-     . =  __rpi_load_addr;
-+                                        /*   ^             */
-+                                        /*   | stack       */
-+                                        /*   | growth      */
-+                                        /*   | direction   */
-+   __boot_core_stack_end_exclusive = .; /*   |             */
+-    . =  __rpi_phys_binary_load_addr;
++    . =  __rpi_phys_dram_start_addr;
++
++    /***********************************************************************************************
++    * Boot Core Stack
++    ***********************************************************************************************/
++    .boot_core_stack (NOLOAD) :
++    {
++                                             /*   ^             */
++                                             /*   | stack       */
++        . += __rpi_phys_binary_load_addr;    /*   | growth      */
++                                             /*   | direction   */
++        __boot_core_stack_end_exclusive = .; /*   |             */
++    } :segment_boot_core_stack
 
      /***********************************************************************************************
 -    * Code
@@ -226,24 +252,24 @@ diff -uNr 01_wait_forever/src/bsp/raspberrypi/link.ld 02_runtime_init/src/bsp/ra
 +        *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
 +        *(.text._start_rust)      /* The Rust entry point */
 +        *(.text*)                 /* Everything else */
-     } :segment_rx
+     } :segment_code
 +
-+    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
-+    .got    : ALIGN(8) { *(.got)     } :segment_rx
++    .rodata : ALIGN(8) { *(.rodata*) } :segment_code
++    .got    : ALIGN(8) { *(.got)     } :segment_code
 +
 +    /***********************************************************************************************
 +    * Data + BSS
 +    ***********************************************************************************************/
-+    .data : { *(.data*) } :segment_rw
++    .data : { *(.data*) } :segment_data
 +
 +    /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
-+    .bss : ALIGN(16)
++    .bss (NOLOAD) : ALIGN(16)
 +    {
 +        __bss_start = .;
 +        *(.bss*);
 +        . = ALIGN(16);
 +        __bss_end_exclusive = .;
-+    } :NONE
++    } :segment_data
  }
 
 diff -uNr 01_wait_forever/src/bsp/raspberrypi.rs 02_runtime_init/src/bsp/raspberrypi.rs
diff --git a/02_runtime_init/src/bsp/raspberrypi/link.ld b/02_runtime_init/src/bsp/raspberrypi/link.ld
index cf63a4a64..7c01ccbf5 100644
--- a/02_runtime_init/src/bsp/raspberrypi/link.ld
+++ b/02_runtime_init/src/bsp/raspberrypi/link.ld
@@ -3,25 +3,44 @@
  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
-/* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
-__rpi_load_addr = 0x80000;
+__rpi_phys_dram_start_addr = 0;
 
-ENTRY(__rpi_load_addr)
+/* The physical address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_phys_binary_load_addr = 0x80000;
 
+
+ENTRY(__rpi_phys_binary_load_addr)
+
+/* Flags:
+ *     4 == R
+ *     5 == RX
+ *     6 == RW
+ *
+ * Segments are marked PT_LOAD below so that the ELF file provides virtual and physical addresses.
+ * It doesn't mean all of them need actually be loaded.
+ */
 PHDRS
 {
-    segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
-    segment_rw PT_LOAD FLAGS(6); /* 6 == RW */
+    segment_boot_core_stack PT_LOAD FLAGS(6);
+    segment_code            PT_LOAD FLAGS(5);
+    segment_data            PT_LOAD FLAGS(6);
 }
 
 SECTIONS
 {
-    . =  __rpi_load_addr;
-                                        /*   ^             */
-                                        /*   | stack       */
-                                        /*   | growth      */
-                                        /*   | direction   */
-   __boot_core_stack_end_exclusive = .; /*   |             */
+    . =  __rpi_phys_dram_start_addr;
+
+    /***********************************************************************************************
+    * Boot Core Stack
+    ***********************************************************************************************/
+    .boot_core_stack (NOLOAD) :
+    {
+                                             /*   ^             */
+                                             /*   | stack       */
+        . += __rpi_phys_binary_load_addr;    /*   | growth      */
+                                             /*   | direction   */
+        __boot_core_stack_end_exclusive = .; /*   |             */
+    } :segment_boot_core_stack
 
     /***********************************************************************************************
     * Code + RO Data + Global Offset Table
@@ -32,22 +51,22 @@ SECTIONS
         *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
         *(.text._start_rust)      /* The Rust entry point */
         *(.text*)                 /* Everything else */
-    } :segment_rx
+    } :segment_code
 
-    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
-    .got    : ALIGN(8) { *(.got)     } :segment_rx
+    .rodata : ALIGN(8) { *(.rodata*) } :segment_code
+    .got    : ALIGN(8) { *(.got)     } :segment_code
 
     /***********************************************************************************************
     * Data + BSS
     ***********************************************************************************************/
-    .data : { *(.data*) } :segment_rw
+    .data : { *(.data*) } :segment_data
 
     /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
-    .bss : ALIGN(16)
+    .bss (NOLOAD) : ALIGN(16)
     {
         __bss_start = .;
         *(.bss*);
         . = ALIGN(16);
         __bss_end_exclusive = .;
-    } :NONE
+    } :segment_data
 }
diff --git a/03_hacky_hello_world/src/bsp/raspberrypi/link.ld b/03_hacky_hello_world/src/bsp/raspberrypi/link.ld
index cf63a4a64..7c01ccbf5 100644
--- a/03_hacky_hello_world/src/bsp/raspberrypi/link.ld
+++ b/03_hacky_hello_world/src/bsp/raspberrypi/link.ld
@@ -3,25 +3,44 @@
  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
-/* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
-__rpi_load_addr = 0x80000;
+__rpi_phys_dram_start_addr = 0;
 
-ENTRY(__rpi_load_addr)
+/* The physical address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_phys_binary_load_addr = 0x80000;
 
+
+ENTRY(__rpi_phys_binary_load_addr)
+
+/* Flags:
+ *     4 == R
+ *     5 == RX
+ *     6 == RW
+ *
+ * Segments are marked PT_LOAD below so that the ELF file provides virtual and physical addresses.
+ * It doesn't mean all of them need actually be loaded.
+ */
 PHDRS
 {
-    segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
-    segment_rw PT_LOAD FLAGS(6); /* 6 == RW */
+    segment_boot_core_stack PT_LOAD FLAGS(6);
+    segment_code            PT_LOAD FLAGS(5);
+    segment_data            PT_LOAD FLAGS(6);
 }
 
 SECTIONS
 {
-    . =  __rpi_load_addr;
-                                        /*   ^             */
-                                        /*   | stack       */
-                                        /*   | growth      */
-                                        /*   | direction   */
-   __boot_core_stack_end_exclusive = .; /*   |             */
+    . =  __rpi_phys_dram_start_addr;
+
+    /***********************************************************************************************
+    * Boot Core Stack
+    ***********************************************************************************************/
+    .boot_core_stack (NOLOAD) :
+    {
+                                             /*   ^             */
+                                             /*   | stack       */
+        . += __rpi_phys_binary_load_addr;    /*   | growth      */
+                                             /*   | direction   */
+        __boot_core_stack_end_exclusive = .; /*   |             */
+    } :segment_boot_core_stack
 
     /***********************************************************************************************
     * Code + RO Data + Global Offset Table
@@ -32,22 +51,22 @@ SECTIONS
         *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
         *(.text._start_rust)      /* The Rust entry point */
         *(.text*)                 /* Everything else */
-    } :segment_rx
+    } :segment_code
 
-    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
-    .got    : ALIGN(8) { *(.got)     } :segment_rx
+    .rodata : ALIGN(8) { *(.rodata*) } :segment_code
+    .got    : ALIGN(8) { *(.got)     } :segment_code
 
     /***********************************************************************************************
     * Data + BSS
     ***********************************************************************************************/
-    .data : { *(.data*) } :segment_rw
+    .data : { *(.data*) } :segment_data
 
     /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
-    .bss : ALIGN(16)
+    .bss (NOLOAD) : ALIGN(16)
     {
         __bss_start = .;
         *(.bss*);
         . = ALIGN(16);
         __bss_end_exclusive = .;
-    } :NONE
+    } :segment_data
 }
diff --git a/04_safe_globals/src/bsp/raspberrypi/link.ld b/04_safe_globals/src/bsp/raspberrypi/link.ld
index cf63a4a64..7c01ccbf5 100644
--- a/04_safe_globals/src/bsp/raspberrypi/link.ld
+++ b/04_safe_globals/src/bsp/raspberrypi/link.ld
@@ -3,25 +3,44 @@
  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
-/* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
-__rpi_load_addr = 0x80000;
+__rpi_phys_dram_start_addr = 0;
 
-ENTRY(__rpi_load_addr)
+/* The physical address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_phys_binary_load_addr = 0x80000;
 
+
+ENTRY(__rpi_phys_binary_load_addr)
+
+/* Flags:
+ *     4 == R
+ *     5 == RX
+ *     6 == RW
+ *
+ * Segments are marked PT_LOAD below so that the ELF file provides virtual and physical addresses.
+ * It doesn't mean all of them need actually be loaded.
+ */
 PHDRS
 {
-    segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
-    segment_rw PT_LOAD FLAGS(6); /* 6 == RW */
+    segment_boot_core_stack PT_LOAD FLAGS(6);
+    segment_code            PT_LOAD FLAGS(5);
+    segment_data            PT_LOAD FLAGS(6);
 }
 
 SECTIONS
 {
-    . =  __rpi_load_addr;
-                                        /*   ^             */
-                                        /*   | stack       */
-                                        /*   | growth      */
-                                        /*   | direction   */
-   __boot_core_stack_end_exclusive = .; /*   |             */
+    . =  __rpi_phys_dram_start_addr;
+
+    /***********************************************************************************************
+    * Boot Core Stack
+    ***********************************************************************************************/
+    .boot_core_stack (NOLOAD) :
+    {
+                                             /*   ^             */
+                                             /*   | stack       */
+        . += __rpi_phys_binary_load_addr;    /*   | growth      */
+                                             /*   | direction   */
+        __boot_core_stack_end_exclusive = .; /*   |             */
+    } :segment_boot_core_stack
 
     /***********************************************************************************************
     * Code + RO Data + Global Offset Table
@@ -32,22 +51,22 @@ SECTIONS
         *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
         *(.text._start_rust)      /* The Rust entry point */
         *(.text*)                 /* Everything else */
-    } :segment_rx
+    } :segment_code
 
-    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
-    .got    : ALIGN(8) { *(.got)     } :segment_rx
+    .rodata : ALIGN(8) { *(.rodata*) } :segment_code
+    .got    : ALIGN(8) { *(.got)     } :segment_code
 
     /***********************************************************************************************
     * Data + BSS
     ***********************************************************************************************/
-    .data : { *(.data*) } :segment_rw
+    .data : { *(.data*) } :segment_data
 
     /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
-    .bss : ALIGN(16)
+    .bss (NOLOAD) : ALIGN(16)
     {
         __bss_start = .;
         *(.bss*);
         . = ALIGN(16);
         __bss_end_exclusive = .;
-    } :NONE
+    } :segment_data
 }
diff --git a/05_drivers_gpio_uart/src/bsp/raspberrypi/link.ld b/05_drivers_gpio_uart/src/bsp/raspberrypi/link.ld
index cf63a4a64..7c01ccbf5 100644
--- a/05_drivers_gpio_uart/src/bsp/raspberrypi/link.ld
+++ b/05_drivers_gpio_uart/src/bsp/raspberrypi/link.ld
@@ -3,25 +3,44 @@
  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
-/* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
-__rpi_load_addr = 0x80000;
+__rpi_phys_dram_start_addr = 0;
 
-ENTRY(__rpi_load_addr)
+/* The physical address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_phys_binary_load_addr = 0x80000;
 
+
+ENTRY(__rpi_phys_binary_load_addr)
+
+/* Flags:
+ *     4 == R
+ *     5 == RX
+ *     6 == RW
+ *
+ * Segments are marked PT_LOAD below so that the ELF file provides virtual and physical addresses.
+ * It doesn't mean all of them need actually be loaded.
+ */
 PHDRS
 {
-    segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
-    segment_rw PT_LOAD FLAGS(6); /* 6 == RW */
+    segment_boot_core_stack PT_LOAD FLAGS(6);
+    segment_code            PT_LOAD FLAGS(5);
+    segment_data            PT_LOAD FLAGS(6);
 }
 
 SECTIONS
 {
-    . =  __rpi_load_addr;
-                                        /*   ^             */
-                                        /*   | stack       */
-                                        /*   | growth      */
-                                        /*   | direction   */
-   __boot_core_stack_end_exclusive = .; /*   |             */
+    . =  __rpi_phys_dram_start_addr;
+
+    /***********************************************************************************************
+    * Boot Core Stack
+    ***********************************************************************************************/
+    .boot_core_stack (NOLOAD) :
+    {
+                                             /*   ^             */
+                                             /*   | stack       */
+        . += __rpi_phys_binary_load_addr;    /*   | growth      */
+                                             /*   | direction   */
+        __boot_core_stack_end_exclusive = .; /*   |             */
+    } :segment_boot_core_stack
 
     /***********************************************************************************************
     * Code + RO Data + Global Offset Table
@@ -32,22 +51,22 @@ SECTIONS
         *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
         *(.text._start_rust)      /* The Rust entry point */
         *(.text*)                 /* Everything else */
-    } :segment_rx
+    } :segment_code
 
-    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
-    .got    : ALIGN(8) { *(.got)     } :segment_rx
+    .rodata : ALIGN(8) { *(.rodata*) } :segment_code
+    .got    : ALIGN(8) { *(.got)     } :segment_code
 
     /***********************************************************************************************
     * Data + BSS
     ***********************************************************************************************/
-    .data : { *(.data*) } :segment_rw
+    .data : { *(.data*) } :segment_data
 
     /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
-    .bss : ALIGN(16)
+    .bss (NOLOAD) : ALIGN(16)
     {
         __bss_start = .;
         *(.bss*);
         . = ALIGN(16);
         __bss_end_exclusive = .;
-    } :NONE
+    } :segment_data
 }
diff --git a/06_uart_chainloader/README.md b/06_uart_chainloader/README.md
index 8a927389a..857a3a83d 100644
--- a/06_uart_chainloader/README.md
+++ b/06_uart_chainloader/README.md
@@ -383,17 +383,26 @@ diff -uNr 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 0
 diff -uNr 05_drivers_gpio_uart/src/bsp/raspberrypi/link.ld 06_uart_chainloader/src/bsp/raspberrypi/link.ld
 --- 05_drivers_gpio_uart/src/bsp/raspberrypi/link.ld
 +++ 06_uart_chainloader/src/bsp/raspberrypi/link.ld
-@@ -16,7 +16,8 @@
+@@ -3,8 +3,6 @@
+  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+  */
+
+-__rpi_phys_dram_start_addr = 0;
+-
+ /* The physical address at which the the kernel binary will be loaded by the Raspberry's firmware */
+ __rpi_phys_binary_load_addr = 0x80000;
+
+@@ -28,7 +26,8 @@
 
  SECTIONS
  {
--    . =  __rpi_load_addr;
+-    . =  __rpi_phys_dram_start_addr;
 +    /* Set the link address to 32 MiB */
 +    . = 0x2000000;
-                                         /*   ^             */
-                                         /*   | stack       */
-                                         /*   | growth      */
-@@ -26,6 +27,7 @@
+
+     /***********************************************************************************************
+     * Boot Core Stack
+@@ -45,6 +44,7 @@
      /***********************************************************************************************
      * Code + RO Data + Global Offset Table
      ***********************************************************************************************/
@@ -401,16 +410,16 @@ diff -uNr 05_drivers_gpio_uart/src/bsp/raspberrypi/link.ld 06_uart_chainloader/s
      .text :
      {
          KEEP(*(.text._start))
-@@ -42,6 +44,10 @@
+@@ -61,6 +61,10 @@
      ***********************************************************************************************/
-     .data : { *(.data*) } :segment_rw
+     .data : { *(.data*) } :segment_data
 
 +    /* Fill up to 8 byte, b/c relocating the binary is done in u64 chunks */
 +    . = ALIGN(8);
 +    __binary_nonzero_end_exclusive = .;
 +
      /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
-     .bss : ALIGN(16)
+     .bss (NOLOAD) : ALIGN(16)
      {
 
 diff -uNr 05_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs 06_uart_chainloader/src/bsp/raspberrypi/memory.rs
diff --git a/06_uart_chainloader/src/bsp/raspberrypi/link.ld b/06_uart_chainloader/src/bsp/raspberrypi/link.ld
index 40added4a..6194c41f8 100644
--- a/06_uart_chainloader/src/bsp/raspberrypi/link.ld
+++ b/06_uart_chainloader/src/bsp/raspberrypi/link.ld
@@ -3,26 +3,43 @@
  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
-/* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
-__rpi_load_addr = 0x80000;
+/* The physical address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_phys_binary_load_addr = 0x80000;
 
-ENTRY(__rpi_load_addr)
 
+ENTRY(__rpi_phys_binary_load_addr)
+
+/* Flags:
+ *     4 == R
+ *     5 == RX
+ *     6 == RW
+ *
+ * Segments are marked PT_LOAD below so that the ELF file provides virtual and physical addresses.
+ * It doesn't mean all of them need actually be loaded.
+ */
 PHDRS
 {
-    segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
-    segment_rw PT_LOAD FLAGS(6); /* 6 == RW */
+    segment_boot_core_stack PT_LOAD FLAGS(6);
+    segment_code            PT_LOAD FLAGS(5);
+    segment_data            PT_LOAD FLAGS(6);
 }
 
 SECTIONS
 {
     /* Set the link address to 32 MiB */
     . = 0x2000000;
-                                        /*   ^             */
-                                        /*   | stack       */
-                                        /*   | growth      */
-                                        /*   | direction   */
-   __boot_core_stack_end_exclusive = .; /*   |             */
+
+    /***********************************************************************************************
+    * Boot Core Stack
+    ***********************************************************************************************/
+    .boot_core_stack (NOLOAD) :
+    {
+                                             /*   ^             */
+                                             /*   | stack       */
+        . += __rpi_phys_binary_load_addr;    /*   | growth      */
+                                             /*   | direction   */
+        __boot_core_stack_end_exclusive = .; /*   |             */
+    } :segment_boot_core_stack
 
     /***********************************************************************************************
     * Code + RO Data + Global Offset Table
@@ -34,26 +51,26 @@ SECTIONS
         *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
         *(.text._start_rust)      /* The Rust entry point */
         *(.text*)                 /* Everything else */
-    } :segment_rx
+    } :segment_code
 
-    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
-    .got    : ALIGN(8) { *(.got)     } :segment_rx
+    .rodata : ALIGN(8) { *(.rodata*) } :segment_code
+    .got    : ALIGN(8) { *(.got)     } :segment_code
 
     /***********************************************************************************************
     * Data + BSS
     ***********************************************************************************************/
-    .data : { *(.data*) } :segment_rw
+    .data : { *(.data*) } :segment_data
 
     /* Fill up to 8 byte, b/c relocating the binary is done in u64 chunks */
     . = ALIGN(8);
     __binary_nonzero_end_exclusive = .;
 
     /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
-    .bss : ALIGN(16)
+    .bss (NOLOAD) : ALIGN(16)
     {
         __bss_start = .;
         *(.bss*);
         . = ALIGN(16);
         __bss_end_exclusive = .;
-    } :NONE
+    } :segment_data
 }
diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index d1c535749..f04b8fe48 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -452,17 +452,26 @@ diff -uNr 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 07
 diff -uNr 06_uart_chainloader/src/bsp/raspberrypi/link.ld 07_timestamps/src/bsp/raspberrypi/link.ld
 --- 06_uart_chainloader/src/bsp/raspberrypi/link.ld
 +++ 07_timestamps/src/bsp/raspberrypi/link.ld
-@@ -16,8 +16,7 @@
+@@ -3,6 +3,8 @@
+  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+  */
+
++__rpi_phys_dram_start_addr = 0;
++
+ /* The physical address at which the the kernel binary will be loaded by the Raspberry's firmware */
+ __rpi_phys_binary_load_addr = 0x80000;
+
+@@ -26,8 +28,7 @@
 
  SECTIONS
  {
 -    /* Set the link address to 32 MiB */
 -    . = 0x2000000;
-+    . =  __rpi_load_addr;
-                                         /*   ^             */
-                                         /*   | stack       */
-                                         /*   | growth      */
-@@ -27,7 +26,6 @@
++    . =  __rpi_phys_dram_start_addr;
+
+     /***********************************************************************************************
+     * Boot Core Stack
+@@ -44,7 +45,6 @@
      /***********************************************************************************************
      * Code + RO Data + Global Offset Table
      ***********************************************************************************************/
@@ -470,16 +479,16 @@ diff -uNr 06_uart_chainloader/src/bsp/raspberrypi/link.ld 07_timestamps/src/bsp/
      .text :
      {
          KEEP(*(.text._start))
-@@ -44,10 +42,6 @@
+@@ -61,10 +61,6 @@
      ***********************************************************************************************/
-     .data : { *(.data*) } :segment_rw
+     .data : { *(.data*) } :segment_data
 
 -    /* Fill up to 8 byte, b/c relocating the binary is done in u64 chunks */
 -    . = ALIGN(8);
 -    __binary_nonzero_end_exclusive = .;
 -
      /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
-     .bss : ALIGN(16)
+     .bss (NOLOAD) : ALIGN(16)
      {
 
 diff -uNr 06_uart_chainloader/src/bsp/raspberrypi/memory.rs 07_timestamps/src/bsp/raspberrypi/memory.rs
diff --git a/07_timestamps/src/bsp/raspberrypi/link.ld b/07_timestamps/src/bsp/raspberrypi/link.ld
index cf63a4a64..7c01ccbf5 100644
--- a/07_timestamps/src/bsp/raspberrypi/link.ld
+++ b/07_timestamps/src/bsp/raspberrypi/link.ld
@@ -3,25 +3,44 @@
  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
-/* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
-__rpi_load_addr = 0x80000;
+__rpi_phys_dram_start_addr = 0;
 
-ENTRY(__rpi_load_addr)
+/* The physical address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_phys_binary_load_addr = 0x80000;
 
+
+ENTRY(__rpi_phys_binary_load_addr)
+
+/* Flags:
+ *     4 == R
+ *     5 == RX
+ *     6 == RW
+ *
+ * Segments are marked PT_LOAD below so that the ELF file provides virtual and physical addresses.
+ * It doesn't mean all of them need actually be loaded.
+ */
 PHDRS
 {
-    segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
-    segment_rw PT_LOAD FLAGS(6); /* 6 == RW */
+    segment_boot_core_stack PT_LOAD FLAGS(6);
+    segment_code            PT_LOAD FLAGS(5);
+    segment_data            PT_LOAD FLAGS(6);
 }
 
 SECTIONS
 {
-    . =  __rpi_load_addr;
-                                        /*   ^             */
-                                        /*   | stack       */
-                                        /*   | growth      */
-                                        /*   | direction   */
-   __boot_core_stack_end_exclusive = .; /*   |             */
+    . =  __rpi_phys_dram_start_addr;
+
+    /***********************************************************************************************
+    * Boot Core Stack
+    ***********************************************************************************************/
+    .boot_core_stack (NOLOAD) :
+    {
+                                             /*   ^             */
+                                             /*   | stack       */
+        . += __rpi_phys_binary_load_addr;    /*   | growth      */
+                                             /*   | direction   */
+        __boot_core_stack_end_exclusive = .; /*   |             */
+    } :segment_boot_core_stack
 
     /***********************************************************************************************
     * Code + RO Data + Global Offset Table
@@ -32,22 +51,22 @@ SECTIONS
         *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
         *(.text._start_rust)      /* The Rust entry point */
         *(.text*)                 /* Everything else */
-    } :segment_rx
+    } :segment_code
 
-    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
-    .got    : ALIGN(8) { *(.got)     } :segment_rx
+    .rodata : ALIGN(8) { *(.rodata*) } :segment_code
+    .got    : ALIGN(8) { *(.got)     } :segment_code
 
     /***********************************************************************************************
     * Data + BSS
     ***********************************************************************************************/
-    .data : { *(.data*) } :segment_rw
+    .data : { *(.data*) } :segment_data
 
     /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
-    .bss : ALIGN(16)
+    .bss (NOLOAD) : ALIGN(16)
     {
         __bss_start = .;
         *(.bss*);
         . = ALIGN(16);
         __bss_end_exclusive = .;
-    } :NONE
+    } :segment_data
 }
diff --git a/08_hw_debug_JTAG/src/bsp/raspberrypi/link.ld b/08_hw_debug_JTAG/src/bsp/raspberrypi/link.ld
index cf63a4a64..7c01ccbf5 100644
--- a/08_hw_debug_JTAG/src/bsp/raspberrypi/link.ld
+++ b/08_hw_debug_JTAG/src/bsp/raspberrypi/link.ld
@@ -3,25 +3,44 @@
  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
-/* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
-__rpi_load_addr = 0x80000;
+__rpi_phys_dram_start_addr = 0;
 
-ENTRY(__rpi_load_addr)
+/* The physical address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_phys_binary_load_addr = 0x80000;
 
+
+ENTRY(__rpi_phys_binary_load_addr)
+
+/* Flags:
+ *     4 == R
+ *     5 == RX
+ *     6 == RW
+ *
+ * Segments are marked PT_LOAD below so that the ELF file provides virtual and physical addresses.
+ * It doesn't mean all of them need actually be loaded.
+ */
 PHDRS
 {
-    segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
-    segment_rw PT_LOAD FLAGS(6); /* 6 == RW */
+    segment_boot_core_stack PT_LOAD FLAGS(6);
+    segment_code            PT_LOAD FLAGS(5);
+    segment_data            PT_LOAD FLAGS(6);
 }
 
 SECTIONS
 {
-    . =  __rpi_load_addr;
-                                        /*   ^             */
-                                        /*   | stack       */
-                                        /*   | growth      */
-                                        /*   | direction   */
-   __boot_core_stack_end_exclusive = .; /*   |             */
+    . =  __rpi_phys_dram_start_addr;
+
+    /***********************************************************************************************
+    * Boot Core Stack
+    ***********************************************************************************************/
+    .boot_core_stack (NOLOAD) :
+    {
+                                             /*   ^             */
+                                             /*   | stack       */
+        . += __rpi_phys_binary_load_addr;    /*   | growth      */
+                                             /*   | direction   */
+        __boot_core_stack_end_exclusive = .; /*   |             */
+    } :segment_boot_core_stack
 
     /***********************************************************************************************
     * Code + RO Data + Global Offset Table
@@ -32,22 +51,22 @@ SECTIONS
         *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
         *(.text._start_rust)      /* The Rust entry point */
         *(.text*)                 /* Everything else */
-    } :segment_rx
+    } :segment_code
 
-    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
-    .got    : ALIGN(8) { *(.got)     } :segment_rx
+    .rodata : ALIGN(8) { *(.rodata*) } :segment_code
+    .got    : ALIGN(8) { *(.got)     } :segment_code
 
     /***********************************************************************************************
     * Data + BSS
     ***********************************************************************************************/
-    .data : { *(.data*) } :segment_rw
+    .data : { *(.data*) } :segment_data
 
     /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
-    .bss : ALIGN(16)
+    .bss (NOLOAD) : ALIGN(16)
     {
         __bss_start = .;
         *(.bss*);
         . = ALIGN(16);
         __bss_end_exclusive = .;
-    } :NONE
+    } :segment_data
 }
diff --git a/09_privilege_level/src/bsp/raspberrypi/link.ld b/09_privilege_level/src/bsp/raspberrypi/link.ld
index cf63a4a64..7c01ccbf5 100644
--- a/09_privilege_level/src/bsp/raspberrypi/link.ld
+++ b/09_privilege_level/src/bsp/raspberrypi/link.ld
@@ -3,25 +3,44 @@
  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
-/* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
-__rpi_load_addr = 0x80000;
+__rpi_phys_dram_start_addr = 0;
 
-ENTRY(__rpi_load_addr)
+/* The physical address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_phys_binary_load_addr = 0x80000;
 
+
+ENTRY(__rpi_phys_binary_load_addr)
+
+/* Flags:
+ *     4 == R
+ *     5 == RX
+ *     6 == RW
+ *
+ * Segments are marked PT_LOAD below so that the ELF file provides virtual and physical addresses.
+ * It doesn't mean all of them need actually be loaded.
+ */
 PHDRS
 {
-    segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
-    segment_rw PT_LOAD FLAGS(6); /* 6 == RW */
+    segment_boot_core_stack PT_LOAD FLAGS(6);
+    segment_code            PT_LOAD FLAGS(5);
+    segment_data            PT_LOAD FLAGS(6);
 }
 
 SECTIONS
 {
-    . =  __rpi_load_addr;
-                                        /*   ^             */
-                                        /*   | stack       */
-                                        /*   | growth      */
-                                        /*   | direction   */
-   __boot_core_stack_end_exclusive = .; /*   |             */
+    . =  __rpi_phys_dram_start_addr;
+
+    /***********************************************************************************************
+    * Boot Core Stack
+    ***********************************************************************************************/
+    .boot_core_stack (NOLOAD) :
+    {
+                                             /*   ^             */
+                                             /*   | stack       */
+        . += __rpi_phys_binary_load_addr;    /*   | growth      */
+                                             /*   | direction   */
+        __boot_core_stack_end_exclusive = .; /*   |             */
+    } :segment_boot_core_stack
 
     /***********************************************************************************************
     * Code + RO Data + Global Offset Table
@@ -32,22 +51,22 @@ SECTIONS
         *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
         *(.text._start_rust)      /* The Rust entry point */
         *(.text*)                 /* Everything else */
-    } :segment_rx
+    } :segment_code
 
-    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
-    .got    : ALIGN(8) { *(.got)     } :segment_rx
+    .rodata : ALIGN(8) { *(.rodata*) } :segment_code
+    .got    : ALIGN(8) { *(.got)     } :segment_code
 
     /***********************************************************************************************
     * Data + BSS
     ***********************************************************************************************/
-    .data : { *(.data*) } :segment_rw
+    .data : { *(.data*) } :segment_data
 
     /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
-    .bss : ALIGN(16)
+    .bss (NOLOAD) : ALIGN(16)
     {
         __bss_start = .;
         *(.bss*);
         . = ALIGN(16);
         __bss_end_exclusive = .;
-    } :NONE
+    } :segment_data
 }
diff --git a/10_virtual_mem_part1_identity_mapping/README.md b/10_virtual_mem_part1_identity_mapping/README.md
index 22e265a6f..ed01e03d7 100644
--- a/10_virtual_mem_part1_identity_mapping/README.md
+++ b/10_virtual_mem_part1_identity_mapping/README.md
@@ -224,12 +224,12 @@ enables caching for data and instructions.
 
 ### `link.ld`
 
-We need to align the `rx` segment to `64 KiB` so that it doesn't overlap with the next section that
-needs read/write attributes instead of read/execute attributes:
+We need to align the `code` segment to `64 KiB` so that it doesn't overlap with the next section
+that needs read/write attributes instead of read/execute attributes:
 
 ```ld.s
-. = ALIGN(64K); /* Align to page boundary */
-__rx_end_exclusive = .;
+. = ALIGN(PAGE_SIZE);
+__code_end_exclusive = .;
 ```
 
 This blows up the binary in size, but is a small price to pay considering that it reduces the amount
@@ -831,20 +831,35 @@ diff -uNr 09_privilege_level/src/_arch/aarch64/memory/mmu.rs 10_virtual_mem_part
 diff -uNr 09_privilege_level/src/bsp/raspberrypi/link.ld 10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
 --- 09_privilege_level/src/bsp/raspberrypi/link.ld
 +++ 10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
-@@ -26,6 +26,7 @@
+@@ -3,6 +3,9 @@
+  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+  */
+
++PAGE_SIZE = 64K;
++PAGE_MASK = PAGE_SIZE - 1;
++
+ __rpi_phys_dram_start_addr = 0;
+
+ /* The physical address at which the the kernel binary will be loaded by the Raspberry's firmware */
+@@ -42,9 +45,12 @@
+         __boot_core_stack_end_exclusive = .; /*   |             */
+     } :segment_boot_core_stack
+
++    ASSERT((. & PAGE_MASK) == 0, "End of boot core stack is not page aligned")
++
      /***********************************************************************************************
      * Code + RO Data + Global Offset Table
      ***********************************************************************************************/
-+    __rx_start = .;
++    __code_start = .;
      .text :
      {
          KEEP(*(.text._start))
-@@ -37,6 +38,9 @@
-     .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
-     .got    : ALIGN(8) { *(.got)     } :segment_rx
+@@ -56,6 +62,9 @@
+     .rodata : ALIGN(8) { *(.rodata*) } :segment_code
+     .got    : ALIGN(8) { *(.got)     } :segment_code
 
-+    . = ALIGN(64K); /* Align to page boundary */
-+    __rx_end_exclusive = .;
++    . = ALIGN(PAGE_SIZE);
++    __code_end_exclusive = .;
 +
      /***********************************************************************************************
      * Data + BSS
@@ -882,7 +897,7 @@ diff -uNr 09_privilege_level/src/bsp/raspberrypi/memory/mmu.rs 10_virtual_mem_pa
 +    [
 +        TranslationDescriptor {
 +            name: "Kernel code and RO data",
-+            virtual_range: rx_range_inclusive,
++            virtual_range: code_range_inclusive,
 +            physical_range_translation: Translation::Identity,
 +            attribute_fields: AttributeFields {
 +                mem_attributes: MemAttributes::CacheableDRAM,
@@ -917,10 +932,10 @@ diff -uNr 09_privilege_level/src/bsp/raspberrypi/memory/mmu.rs 10_virtual_mem_pa
 +// Private Code
 +//--------------------------------------------------------------------------------------------------
 +
-+fn rx_range_inclusive() -> RangeInclusive<usize> {
++fn code_range_inclusive() -> RangeInclusive<usize> {
 +    // Notice the subtraction to turn the exclusive end into an inclusive end.
 +    #[allow(clippy::range_minus_one)]
-+    RangeInclusive::new(super::rx_start(), super::rx_end_exclusive() - 1)
++    RangeInclusive::new(super::code_start(), super::code_end_exclusive() - 1)
 +}
 +
 +fn remapped_mmio_range_inclusive() -> RangeInclusive<usize> {
@@ -944,10 +959,36 @@ diff -uNr 09_privilege_level/src/bsp/raspberrypi/memory/mmu.rs 10_virtual_mem_pa
 diff -uNr 09_privilege_level/src/bsp/raspberrypi/memory.rs 10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs
 --- 09_privilege_level/src/bsp/raspberrypi/memory.rs
 +++ 10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs
-@@ -4,6 +4,20 @@
+@@ -3,6 +3,45 @@
+ // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
  //! BSP Memory Management.
-
++//!
++//! The physical memory layout.
++//!
++//! The Raspberry's firmware copies the kernel binary to 0x8_0000. The preceding region will be used
++//! as the boot core's stack.
++//!
++//! +---------------------------------------+
++//! |                                       | 0x0
++//! |                                       |                                ^
++//! | Boot-core Stack                       |                                | stack
++//! |                                       |                                | growth
++//! |                                       |                                | direction
++//! +---------------------------------------+
++//! |                                       | code_start @ 0x8_0000
++//! | .text                                 |
++//! | .rodata                               |
++//! | .got                                  |
++//! |                                       |
++//! +---------------------------------------+
++//! |                                       | code_end_exclusive
++//! | .data                                 |
++//! | .bss                                  |
++//! |                                       |
++//! +---------------------------------------+
++//! |                                       |
++//! |                                       |
 +pub mod mmu;
 +
 +use core::cell::UnsafeCell;
@@ -958,14 +999,13 @@ diff -uNr 09_privilege_level/src/bsp/raspberrypi/memory.rs 10_virtual_mem_part1_
 +
 +// Symbols from the linker script.
 +extern "Rust" {
-+    static __rx_start: UnsafeCell<()>;
-+    static __rx_end_exclusive: UnsafeCell<()>;
++    static __code_start: UnsafeCell<()>;
++    static __code_end_exclusive: UnsafeCell<()>;
 +}
-+
+
  //--------------------------------------------------------------------------------------------------
  // Public Definitions
- //--------------------------------------------------------------------------------------------------
-@@ -11,6 +25,20 @@
+@@ -11,6 +50,20 @@
  /// The board's physical memory map.
  #[rustfmt::skip]
  pub(super) mod map {
@@ -986,7 +1026,7 @@ diff -uNr 09_privilege_level/src/bsp/raspberrypi/memory.rs 10_virtual_mem_part1_
 
      pub const GPIO_OFFSET:         usize = 0x0020_0000;
      pub const UART_OFFSET:         usize = 0x0020_1000;
-@@ -23,6 +51,7 @@
+@@ -23,6 +76,7 @@
          pub const START:            usize =         0x3F00_0000;
          pub const GPIO_START:       usize = START + GPIO_OFFSET;
          pub const PL011_UART_START: usize = START + UART_OFFSET;
@@ -994,7 +1034,7 @@ diff -uNr 09_privilege_level/src/bsp/raspberrypi/memory.rs 10_virtual_mem_part1_
      }
 
      /// Physical devices.
-@@ -33,5 +62,30 @@
+@@ -33,5 +87,29 @@
          pub const START:            usize =         0xFE00_0000;
          pub const GPIO_START:       usize = START + GPIO_OFFSET;
          pub const PL011_UART_START: usize = START + UART_OFFSET;
@@ -1006,24 +1046,23 @@ diff -uNr 09_privilege_level/src/bsp/raspberrypi/memory.rs 10_virtual_mem_part1_
 +// Private Code
 +//--------------------------------------------------------------------------------------------------
 +
-+/// Start address of the Read+Execute (RX) range.
++/// Start page address of the code segment.
 +///
 +/// # Safety
 +///
 +/// - Value is provided by the linker script and must be trusted as-is.
 +#[inline(always)]
-+fn rx_start() -> usize {
-+    unsafe { __rx_start.get() as usize }
++fn code_start() -> usize {
++    unsafe { __code_start.get() as usize }
 +}
 +
-+/// Exclusive end address of the Read+Execute (RX) range.
-+///
++/// Exclusive end page address of the code segment.
 +/// # Safety
 +///
 +/// - Value is provided by the linker script and must be trusted as-is.
 +#[inline(always)]
-+fn rx_end_exclusive() -> usize {
-+    unsafe { __rx_end_exclusive.get() as usize }
++fn code_end_exclusive() -> usize {
++    unsafe { __code_end_exclusive.get() as usize }
 +}
 
 diff -uNr 09_privilege_level/src/bsp.rs 10_virtual_mem_part1_identity_mapping/src/bsp.rs
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
index 485ba49b0..48aea0b54 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
@@ -3,55 +3,79 @@
  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
-/* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
-__rpi_load_addr = 0x80000;
+PAGE_SIZE = 64K;
+PAGE_MASK = PAGE_SIZE - 1;
 
-ENTRY(__rpi_load_addr)
+__rpi_phys_dram_start_addr = 0;
 
+/* The physical address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_phys_binary_load_addr = 0x80000;
+
+
+ENTRY(__rpi_phys_binary_load_addr)
+
+/* Flags:
+ *     4 == R
+ *     5 == RX
+ *     6 == RW
+ *
+ * Segments are marked PT_LOAD below so that the ELF file provides virtual and physical addresses.
+ * It doesn't mean all of them need actually be loaded.
+ */
 PHDRS
 {
-    segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
-    segment_rw PT_LOAD FLAGS(6); /* 6 == RW */
+    segment_boot_core_stack PT_LOAD FLAGS(6);
+    segment_code            PT_LOAD FLAGS(5);
+    segment_data            PT_LOAD FLAGS(6);
 }
 
 SECTIONS
 {
-    . =  __rpi_load_addr;
-                                        /*   ^             */
-                                        /*   | stack       */
-                                        /*   | growth      */
-                                        /*   | direction   */
-   __boot_core_stack_end_exclusive = .; /*   |             */
+    . =  __rpi_phys_dram_start_addr;
+
+    /***********************************************************************************************
+    * Boot Core Stack
+    ***********************************************************************************************/
+    .boot_core_stack (NOLOAD) :
+    {
+                                             /*   ^             */
+                                             /*   | stack       */
+        . += __rpi_phys_binary_load_addr;    /*   | growth      */
+                                             /*   | direction   */
+        __boot_core_stack_end_exclusive = .; /*   |             */
+    } :segment_boot_core_stack
+
+    ASSERT((. & PAGE_MASK) == 0, "End of boot core stack is not page aligned")
 
     /***********************************************************************************************
     * Code + RO Data + Global Offset Table
     ***********************************************************************************************/
-    __rx_start = .;
+    __code_start = .;
     .text :
     {
         KEEP(*(.text._start))
         *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
         *(.text._start_rust)      /* The Rust entry point */
         *(.text*)                 /* Everything else */
-    } :segment_rx
+    } :segment_code
 
-    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
-    .got    : ALIGN(8) { *(.got)     } :segment_rx
+    .rodata : ALIGN(8) { *(.rodata*) } :segment_code
+    .got    : ALIGN(8) { *(.got)     } :segment_code
 
-    . = ALIGN(64K); /* Align to page boundary */
-    __rx_end_exclusive = .;
+    . = ALIGN(PAGE_SIZE);
+    __code_end_exclusive = .;
 
     /***********************************************************************************************
     * Data + BSS
     ***********************************************************************************************/
-    .data : { *(.data*) } :segment_rw
+    .data : { *(.data*) } :segment_data
 
     /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
-    .bss : ALIGN(16)
+    .bss (NOLOAD) : ALIGN(16)
     {
         __bss_start = .;
         *(.bss*);
         . = ALIGN(16);
         __bss_end_exclusive = .;
-    } :NONE
+    } :segment_data
 }
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs
index 48b1d603a..d2a2e94cd 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs
@@ -3,7 +3,32 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
-
+//!
+//! The physical memory layout.
+//!
+//! The Raspberry's firmware copies the kernel binary to 0x8_0000. The preceding region will be used
+//! as the boot core's stack.
+//!
+//! +---------------------------------------+
+//! |                                       | 0x0
+//! |                                       |                                ^
+//! | Boot-core Stack                       |                                | stack
+//! |                                       |                                | growth
+//! |                                       |                                | direction
+//! +---------------------------------------+
+//! |                                       | code_start @ 0x8_0000
+//! | .text                                 |
+//! | .rodata                               |
+//! | .got                                  |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       | code_end_exclusive
+//! | .data                                 |
+//! | .bss                                  |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       |
+//! |                                       |
 pub mod mmu;
 
 use core::cell::UnsafeCell;
@@ -14,8 +39,8 @@ use core::cell::UnsafeCell;
 
 // Symbols from the linker script.
 extern "Rust" {
-    static __rx_start: UnsafeCell<()>;
-    static __rx_end_exclusive: UnsafeCell<()>;
+    static __code_start: UnsafeCell<()>;
+    static __code_end_exclusive: UnsafeCell<()>;
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -70,22 +95,21 @@ pub(super) mod map {
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-/// Start address of the Read+Execute (RX) range.
+/// Start page address of the code segment.
 ///
 /// # Safety
 ///
 /// - Value is provided by the linker script and must be trusted as-is.
 #[inline(always)]
-fn rx_start() -> usize {
-    unsafe { __rx_start.get() as usize }
+fn code_start() -> usize {
+    unsafe { __code_start.get() as usize }
 }
 
-/// Exclusive end address of the Read+Execute (RX) range.
-///
+/// Exclusive end page address of the code segment.
 /// # Safety
 ///
 /// - Value is provided by the linker script and must be trusted as-is.
 #[inline(always)]
-fn rx_end_exclusive() -> usize {
-    unsafe { __rx_end_exclusive.get() as usize }
+fn code_end_exclusive() -> usize {
+    unsafe { __code_end_exclusive.get() as usize }
 }
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
index cf9cfcae2..8ce79a4e7 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
@@ -26,7 +26,7 @@ pub static LAYOUT: KernelVirtualLayout<NUM_MEM_RANGES> = KernelVirtualLayout::ne
     [
         TranslationDescriptor {
             name: "Kernel code and RO data",
-            virtual_range: rx_range_inclusive,
+            virtual_range: code_range_inclusive,
             physical_range_translation: Translation::Identity,
             attribute_fields: AttributeFields {
                 mem_attributes: MemAttributes::CacheableDRAM,
@@ -61,10 +61,10 @@ pub static LAYOUT: KernelVirtualLayout<NUM_MEM_RANGES> = KernelVirtualLayout::ne
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-fn rx_range_inclusive() -> RangeInclusive<usize> {
+fn code_range_inclusive() -> RangeInclusive<usize> {
     // Notice the subtraction to turn the exclusive end into an inclusive end.
     #[allow(clippy::range_minus_one)]
-    RangeInclusive::new(super::rx_start(), super::rx_end_exclusive() - 1)
+    RangeInclusive::new(super::code_start(), super::code_end_exclusive() - 1)
 }
 
 fn remapped_mmio_range_inclusive() -> RangeInclusive<usize> {
diff --git a/11_exceptions_part1_groundwork/README.md b/11_exceptions_part1_groundwork/README.md
index 566b8b86d..ec6a312da 100644
--- a/11_exceptions_part1_groundwork/README.md
+++ b/11_exceptions_part1_groundwork/README.md
@@ -972,7 +972,7 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.r
              virtual_range: mmio_range_inclusive,
              physical_range_translation: Translation::Identity,
 @@ -67,11 +57,6 @@
-     RangeInclusive::new(super::rx_start(), super::rx_end_exclusive() - 1)
+     RangeInclusive::new(super::code_start(), super::code_end_exclusive() - 1)
  }
 
 -fn remapped_mmio_range_inclusive() -> RangeInclusive<usize> {
diff --git a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/link.ld b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/link.ld
index 485ba49b0..48aea0b54 100644
--- a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/link.ld
+++ b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/link.ld
@@ -3,55 +3,79 @@
  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
-/* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
-__rpi_load_addr = 0x80000;
+PAGE_SIZE = 64K;
+PAGE_MASK = PAGE_SIZE - 1;
 
-ENTRY(__rpi_load_addr)
+__rpi_phys_dram_start_addr = 0;
 
+/* The physical address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_phys_binary_load_addr = 0x80000;
+
+
+ENTRY(__rpi_phys_binary_load_addr)
+
+/* Flags:
+ *     4 == R
+ *     5 == RX
+ *     6 == RW
+ *
+ * Segments are marked PT_LOAD below so that the ELF file provides virtual and physical addresses.
+ * It doesn't mean all of them need actually be loaded.
+ */
 PHDRS
 {
-    segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
-    segment_rw PT_LOAD FLAGS(6); /* 6 == RW */
+    segment_boot_core_stack PT_LOAD FLAGS(6);
+    segment_code            PT_LOAD FLAGS(5);
+    segment_data            PT_LOAD FLAGS(6);
 }
 
 SECTIONS
 {
-    . =  __rpi_load_addr;
-                                        /*   ^             */
-                                        /*   | stack       */
-                                        /*   | growth      */
-                                        /*   | direction   */
-   __boot_core_stack_end_exclusive = .; /*   |             */
+    . =  __rpi_phys_dram_start_addr;
+
+    /***********************************************************************************************
+    * Boot Core Stack
+    ***********************************************************************************************/
+    .boot_core_stack (NOLOAD) :
+    {
+                                             /*   ^             */
+                                             /*   | stack       */
+        . += __rpi_phys_binary_load_addr;    /*   | growth      */
+                                             /*   | direction   */
+        __boot_core_stack_end_exclusive = .; /*   |             */
+    } :segment_boot_core_stack
+
+    ASSERT((. & PAGE_MASK) == 0, "End of boot core stack is not page aligned")
 
     /***********************************************************************************************
     * Code + RO Data + Global Offset Table
     ***********************************************************************************************/
-    __rx_start = .;
+    __code_start = .;
     .text :
     {
         KEEP(*(.text._start))
         *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
         *(.text._start_rust)      /* The Rust entry point */
         *(.text*)                 /* Everything else */
-    } :segment_rx
+    } :segment_code
 
-    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
-    .got    : ALIGN(8) { *(.got)     } :segment_rx
+    .rodata : ALIGN(8) { *(.rodata*) } :segment_code
+    .got    : ALIGN(8) { *(.got)     } :segment_code
 
-    . = ALIGN(64K); /* Align to page boundary */
-    __rx_end_exclusive = .;
+    . = ALIGN(PAGE_SIZE);
+    __code_end_exclusive = .;
 
     /***********************************************************************************************
     * Data + BSS
     ***********************************************************************************************/
-    .data : { *(.data*) } :segment_rw
+    .data : { *(.data*) } :segment_data
 
     /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
-    .bss : ALIGN(16)
+    .bss (NOLOAD) : ALIGN(16)
     {
         __bss_start = .;
         *(.bss*);
         . = ALIGN(16);
         __bss_end_exclusive = .;
-    } :NONE
+    } :segment_data
 }
diff --git a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory.rs b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory.rs
index 48b1d603a..d2a2e94cd 100644
--- a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory.rs
+++ b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory.rs
@@ -3,7 +3,32 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
-
+//!
+//! The physical memory layout.
+//!
+//! The Raspberry's firmware copies the kernel binary to 0x8_0000. The preceding region will be used
+//! as the boot core's stack.
+//!
+//! +---------------------------------------+
+//! |                                       | 0x0
+//! |                                       |                                ^
+//! | Boot-core Stack                       |                                | stack
+//! |                                       |                                | growth
+//! |                                       |                                | direction
+//! +---------------------------------------+
+//! |                                       | code_start @ 0x8_0000
+//! | .text                                 |
+//! | .rodata                               |
+//! | .got                                  |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       | code_end_exclusive
+//! | .data                                 |
+//! | .bss                                  |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       |
+//! |                                       |
 pub mod mmu;
 
 use core::cell::UnsafeCell;
@@ -14,8 +39,8 @@ use core::cell::UnsafeCell;
 
 // Symbols from the linker script.
 extern "Rust" {
-    static __rx_start: UnsafeCell<()>;
-    static __rx_end_exclusive: UnsafeCell<()>;
+    static __code_start: UnsafeCell<()>;
+    static __code_end_exclusive: UnsafeCell<()>;
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -70,22 +95,21 @@ pub(super) mod map {
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-/// Start address of the Read+Execute (RX) range.
+/// Start page address of the code segment.
 ///
 /// # Safety
 ///
 /// - Value is provided by the linker script and must be trusted as-is.
 #[inline(always)]
-fn rx_start() -> usize {
-    unsafe { __rx_start.get() as usize }
+fn code_start() -> usize {
+    unsafe { __code_start.get() as usize }
 }
 
-/// Exclusive end address of the Read+Execute (RX) range.
-///
+/// Exclusive end page address of the code segment.
 /// # Safety
 ///
 /// - Value is provided by the linker script and must be trusted as-is.
 #[inline(always)]
-fn rx_end_exclusive() -> usize {
-    unsafe { __rx_end_exclusive.get() as usize }
+fn code_end_exclusive() -> usize {
+    unsafe { __code_end_exclusive.get() as usize }
 }
diff --git a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
index ef4bf32cc..5f4265e64 100644
--- a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
+++ b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
@@ -26,7 +26,7 @@ pub static LAYOUT: KernelVirtualLayout<NUM_MEM_RANGES> = KernelVirtualLayout::ne
     [
         TranslationDescriptor {
             name: "Kernel code and RO data",
-            virtual_range: rx_range_inclusive,
+            virtual_range: code_range_inclusive,
             physical_range_translation: Translation::Identity,
             attribute_fields: AttributeFields {
                 mem_attributes: MemAttributes::CacheableDRAM,
@@ -51,10 +51,10 @@ pub static LAYOUT: KernelVirtualLayout<NUM_MEM_RANGES> = KernelVirtualLayout::ne
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-fn rx_range_inclusive() -> RangeInclusive<usize> {
+fn code_range_inclusive() -> RangeInclusive<usize> {
     // Notice the subtraction to turn the exclusive end into an inclusive end.
     #[allow(clippy::range_minus_one)]
-    RangeInclusive::new(super::rx_start(), super::rx_end_exclusive() - 1)
+    RangeInclusive::new(super::code_start(), super::code_end_exclusive() - 1)
 }
 
 fn mmio_range_inclusive() -> RangeInclusive<usize> {
diff --git a/12_integrated_testing/src/bsp/raspberrypi/link.ld b/12_integrated_testing/src/bsp/raspberrypi/link.ld
index 485ba49b0..48aea0b54 100644
--- a/12_integrated_testing/src/bsp/raspberrypi/link.ld
+++ b/12_integrated_testing/src/bsp/raspberrypi/link.ld
@@ -3,55 +3,79 @@
  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
-/* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
-__rpi_load_addr = 0x80000;
+PAGE_SIZE = 64K;
+PAGE_MASK = PAGE_SIZE - 1;
 
-ENTRY(__rpi_load_addr)
+__rpi_phys_dram_start_addr = 0;
 
+/* The physical address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_phys_binary_load_addr = 0x80000;
+
+
+ENTRY(__rpi_phys_binary_load_addr)
+
+/* Flags:
+ *     4 == R
+ *     5 == RX
+ *     6 == RW
+ *
+ * Segments are marked PT_LOAD below so that the ELF file provides virtual and physical addresses.
+ * It doesn't mean all of them need actually be loaded.
+ */
 PHDRS
 {
-    segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
-    segment_rw PT_LOAD FLAGS(6); /* 6 == RW */
+    segment_boot_core_stack PT_LOAD FLAGS(6);
+    segment_code            PT_LOAD FLAGS(5);
+    segment_data            PT_LOAD FLAGS(6);
 }
 
 SECTIONS
 {
-    . =  __rpi_load_addr;
-                                        /*   ^             */
-                                        /*   | stack       */
-                                        /*   | growth      */
-                                        /*   | direction   */
-   __boot_core_stack_end_exclusive = .; /*   |             */
+    . =  __rpi_phys_dram_start_addr;
+
+    /***********************************************************************************************
+    * Boot Core Stack
+    ***********************************************************************************************/
+    .boot_core_stack (NOLOAD) :
+    {
+                                             /*   ^             */
+                                             /*   | stack       */
+        . += __rpi_phys_binary_load_addr;    /*   | growth      */
+                                             /*   | direction   */
+        __boot_core_stack_end_exclusive = .; /*   |             */
+    } :segment_boot_core_stack
+
+    ASSERT((. & PAGE_MASK) == 0, "End of boot core stack is not page aligned")
 
     /***********************************************************************************************
     * Code + RO Data + Global Offset Table
     ***********************************************************************************************/
-    __rx_start = .;
+    __code_start = .;
     .text :
     {
         KEEP(*(.text._start))
         *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
         *(.text._start_rust)      /* The Rust entry point */
         *(.text*)                 /* Everything else */
-    } :segment_rx
+    } :segment_code
 
-    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
-    .got    : ALIGN(8) { *(.got)     } :segment_rx
+    .rodata : ALIGN(8) { *(.rodata*) } :segment_code
+    .got    : ALIGN(8) { *(.got)     } :segment_code
 
-    . = ALIGN(64K); /* Align to page boundary */
-    __rx_end_exclusive = .;
+    . = ALIGN(PAGE_SIZE);
+    __code_end_exclusive = .;
 
     /***********************************************************************************************
     * Data + BSS
     ***********************************************************************************************/
-    .data : { *(.data*) } :segment_rw
+    .data : { *(.data*) } :segment_data
 
     /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
-    .bss : ALIGN(16)
+    .bss (NOLOAD) : ALIGN(16)
     {
         __bss_start = .;
         *(.bss*);
         . = ALIGN(16);
         __bss_end_exclusive = .;
-    } :NONE
+    } :segment_data
 }
diff --git a/12_integrated_testing/src/bsp/raspberrypi/memory.rs b/12_integrated_testing/src/bsp/raspberrypi/memory.rs
index 48b1d603a..d2a2e94cd 100644
--- a/12_integrated_testing/src/bsp/raspberrypi/memory.rs
+++ b/12_integrated_testing/src/bsp/raspberrypi/memory.rs
@@ -3,7 +3,32 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
-
+//!
+//! The physical memory layout.
+//!
+//! The Raspberry's firmware copies the kernel binary to 0x8_0000. The preceding region will be used
+//! as the boot core's stack.
+//!
+//! +---------------------------------------+
+//! |                                       | 0x0
+//! |                                       |                                ^
+//! | Boot-core Stack                       |                                | stack
+//! |                                       |                                | growth
+//! |                                       |                                | direction
+//! +---------------------------------------+
+//! |                                       | code_start @ 0x8_0000
+//! | .text                                 |
+//! | .rodata                               |
+//! | .got                                  |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       | code_end_exclusive
+//! | .data                                 |
+//! | .bss                                  |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       |
+//! |                                       |
 pub mod mmu;
 
 use core::cell::UnsafeCell;
@@ -14,8 +39,8 @@ use core::cell::UnsafeCell;
 
 // Symbols from the linker script.
 extern "Rust" {
-    static __rx_start: UnsafeCell<()>;
-    static __rx_end_exclusive: UnsafeCell<()>;
+    static __code_start: UnsafeCell<()>;
+    static __code_end_exclusive: UnsafeCell<()>;
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -70,22 +95,21 @@ pub(super) mod map {
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-/// Start address of the Read+Execute (RX) range.
+/// Start page address of the code segment.
 ///
 /// # Safety
 ///
 /// - Value is provided by the linker script and must be trusted as-is.
 #[inline(always)]
-fn rx_start() -> usize {
-    unsafe { __rx_start.get() as usize }
+fn code_start() -> usize {
+    unsafe { __code_start.get() as usize }
 }
 
-/// Exclusive end address of the Read+Execute (RX) range.
-///
+/// Exclusive end page address of the code segment.
 /// # Safety
 ///
 /// - Value is provided by the linker script and must be trusted as-is.
 #[inline(always)]
-fn rx_end_exclusive() -> usize {
-    unsafe { __rx_end_exclusive.get() as usize }
+fn code_end_exclusive() -> usize {
+    unsafe { __code_end_exclusive.get() as usize }
 }
diff --git a/12_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs b/12_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs
index f4769ad39..188921b38 100644
--- a/12_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs
+++ b/12_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs
@@ -26,7 +26,7 @@ pub static LAYOUT: KernelVirtualLayout<NUM_MEM_RANGES> = KernelVirtualLayout::ne
     [
         TranslationDescriptor {
             name: "Kernel code and RO data",
-            virtual_range: rx_range_inclusive,
+            virtual_range: code_range_inclusive,
             physical_range_translation: Translation::Identity,
             attribute_fields: AttributeFields {
                 mem_attributes: MemAttributes::CacheableDRAM,
@@ -51,10 +51,10 @@ pub static LAYOUT: KernelVirtualLayout<NUM_MEM_RANGES> = KernelVirtualLayout::ne
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-fn rx_range_inclusive() -> RangeInclusive<usize> {
+fn code_range_inclusive() -> RangeInclusive<usize> {
     // Notice the subtraction to turn the exclusive end into an inclusive end.
     #[allow(clippy::range_minus_one)]
-    RangeInclusive::new(super::rx_start(), super::rx_end_exclusive() - 1)
+    RangeInclusive::new(super::code_start(), super::code_end_exclusive() - 1)
 }
 
 fn mmio_range_inclusive() -> RangeInclusive<usize> {
diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index 1bc3ed7f5..efb83e646 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -2137,7 +2137,7 @@ diff -uNr 12_integrated_testing/src/bsp/raspberrypi/exception.rs 13_exceptions_p
 diff -uNr 12_integrated_testing/src/bsp/raspberrypi/memory.rs 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
 --- 12_integrated_testing/src/bsp/raspberrypi/memory.rs
 +++ 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
-@@ -48,10 +48,12 @@
+@@ -73,10 +73,12 @@
      pub mod mmio {
          use super::*;
 
@@ -2154,7 +2154,7 @@ diff -uNr 12_integrated_testing/src/bsp/raspberrypi/memory.rs 13_exceptions_part
      }
 
      /// Physical devices.
-@@ -62,6 +64,8 @@
+@@ -87,6 +89,8 @@
          pub const START:            usize =         0xFE00_0000;
          pub const GPIO_START:       usize = START + GPIO_OFFSET;
          pub const PL011_UART_START: usize = START + UART_OFFSET;
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld
index 485ba49b0..48aea0b54 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld
+++ b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld
@@ -3,55 +3,79 @@
  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
-/* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
-__rpi_load_addr = 0x80000;
+PAGE_SIZE = 64K;
+PAGE_MASK = PAGE_SIZE - 1;
 
-ENTRY(__rpi_load_addr)
+__rpi_phys_dram_start_addr = 0;
 
+/* The physical address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_phys_binary_load_addr = 0x80000;
+
+
+ENTRY(__rpi_phys_binary_load_addr)
+
+/* Flags:
+ *     4 == R
+ *     5 == RX
+ *     6 == RW
+ *
+ * Segments are marked PT_LOAD below so that the ELF file provides virtual and physical addresses.
+ * It doesn't mean all of them need actually be loaded.
+ */
 PHDRS
 {
-    segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
-    segment_rw PT_LOAD FLAGS(6); /* 6 == RW */
+    segment_boot_core_stack PT_LOAD FLAGS(6);
+    segment_code            PT_LOAD FLAGS(5);
+    segment_data            PT_LOAD FLAGS(6);
 }
 
 SECTIONS
 {
-    . =  __rpi_load_addr;
-                                        /*   ^             */
-                                        /*   | stack       */
-                                        /*   | growth      */
-                                        /*   | direction   */
-   __boot_core_stack_end_exclusive = .; /*   |             */
+    . =  __rpi_phys_dram_start_addr;
+
+    /***********************************************************************************************
+    * Boot Core Stack
+    ***********************************************************************************************/
+    .boot_core_stack (NOLOAD) :
+    {
+                                             /*   ^             */
+                                             /*   | stack       */
+        . += __rpi_phys_binary_load_addr;    /*   | growth      */
+                                             /*   | direction   */
+        __boot_core_stack_end_exclusive = .; /*   |             */
+    } :segment_boot_core_stack
+
+    ASSERT((. & PAGE_MASK) == 0, "End of boot core stack is not page aligned")
 
     /***********************************************************************************************
     * Code + RO Data + Global Offset Table
     ***********************************************************************************************/
-    __rx_start = .;
+    __code_start = .;
     .text :
     {
         KEEP(*(.text._start))
         *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
         *(.text._start_rust)      /* The Rust entry point */
         *(.text*)                 /* Everything else */
-    } :segment_rx
+    } :segment_code
 
-    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
-    .got    : ALIGN(8) { *(.got)     } :segment_rx
+    .rodata : ALIGN(8) { *(.rodata*) } :segment_code
+    .got    : ALIGN(8) { *(.got)     } :segment_code
 
-    . = ALIGN(64K); /* Align to page boundary */
-    __rx_end_exclusive = .;
+    . = ALIGN(PAGE_SIZE);
+    __code_end_exclusive = .;
 
     /***********************************************************************************************
     * Data + BSS
     ***********************************************************************************************/
-    .data : { *(.data*) } :segment_rw
+    .data : { *(.data*) } :segment_data
 
     /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
-    .bss : ALIGN(16)
+    .bss (NOLOAD) : ALIGN(16)
     {
         __bss_start = .;
         *(.bss*);
         . = ALIGN(16);
         __bss_end_exclusive = .;
-    } :NONE
+    } :segment_data
 }
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
index ede648f67..69dffa768 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
@@ -3,7 +3,32 @@
 // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
-
+//!
+//! The physical memory layout.
+//!
+//! The Raspberry's firmware copies the kernel binary to 0x8_0000. The preceding region will be used
+//! as the boot core's stack.
+//!
+//! +---------------------------------------+
+//! |                                       | 0x0
+//! |                                       |                                ^
+//! | Boot-core Stack                       |                                | stack
+//! |                                       |                                | growth
+//! |                                       |                                | direction
+//! +---------------------------------------+
+//! |                                       | code_start @ 0x8_0000
+//! | .text                                 |
+//! | .rodata                               |
+//! | .got                                  |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       | code_end_exclusive
+//! | .data                                 |
+//! | .bss                                  |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       |
+//! |                                       |
 pub mod mmu;
 
 use core::cell::UnsafeCell;
@@ -14,8 +39,8 @@ use core::cell::UnsafeCell;
 
 // Symbols from the linker script.
 extern "Rust" {
-    static __rx_start: UnsafeCell<()>;
-    static __rx_end_exclusive: UnsafeCell<()>;
+    static __code_start: UnsafeCell<()>;
+    static __code_end_exclusive: UnsafeCell<()>;
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -74,22 +99,21 @@ pub(super) mod map {
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-/// Start address of the Read+Execute (RX) range.
+/// Start page address of the code segment.
 ///
 /// # Safety
 ///
 /// - Value is provided by the linker script and must be trusted as-is.
 #[inline(always)]
-fn rx_start() -> usize {
-    unsafe { __rx_start.get() as usize }
+fn code_start() -> usize {
+    unsafe { __code_start.get() as usize }
 }
 
-/// Exclusive end address of the Read+Execute (RX) range.
-///
+/// Exclusive end page address of the code segment.
 /// # Safety
 ///
 /// - Value is provided by the linker script and must be trusted as-is.
 #[inline(always)]
-fn rx_end_exclusive() -> usize {
-    unsafe { __rx_end_exclusive.get() as usize }
+fn code_end_exclusive() -> usize {
+    unsafe { __code_end_exclusive.get() as usize }
 }
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
index f4769ad39..188921b38 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
@@ -26,7 +26,7 @@ pub static LAYOUT: KernelVirtualLayout<NUM_MEM_RANGES> = KernelVirtualLayout::ne
     [
         TranslationDescriptor {
             name: "Kernel code and RO data",
-            virtual_range: rx_range_inclusive,
+            virtual_range: code_range_inclusive,
             physical_range_translation: Translation::Identity,
             attribute_fields: AttributeFields {
                 mem_attributes: MemAttributes::CacheableDRAM,
@@ -51,10 +51,10 @@ pub static LAYOUT: KernelVirtualLayout<NUM_MEM_RANGES> = KernelVirtualLayout::ne
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-fn rx_range_inclusive() -> RangeInclusive<usize> {
+fn code_range_inclusive() -> RangeInclusive<usize> {
     // Notice the subtraction to turn the exclusive end into an inclusive end.
     #[allow(clippy::range_minus_one)]
-    RangeInclusive::new(super::rx_start(), super::rx_end_exclusive() - 1)
+    RangeInclusive::new(super::code_start(), super::code_end_exclusive() - 1)
 }
 
 fn mmio_range_inclusive() -> RangeInclusive<usize> {
diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index 19852d472..2e62c878a 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -8,8 +8,8 @@
   whole of the board's address space.
 - Instead, only ranges that are actually needed are mapped:
     - The `kernel binary` stays `identity mapped` for now.
-    - Device `MMIO regions` are remapped lazily to a special virtual address region at the top of
-      the virtual address space during the device driver's `init()`.
+    - Device `MMIO regions` are remapped lazily (to a special reserved virtual address region)
+      during the device driver's `init()`.
 
 ## Table of Contents
 
@@ -17,6 +17,7 @@
 - [Implementation](#implementation)
   - [A New Mapping API in `src/memory/mmu.rs`](#a-new-mapping-api-in-srcmemorymmutranslationtablers)
   - [The new APIs in action](#the-new-apis-in-action)
+  - [MMIO Virtual Address Allocation](#mmio-virtual-address-allocation)
   - [Supporting Changes](#supporting-changes)
 - [Test it](#test-it)
 - [Diff to previous](#diff-to-previous)
@@ -58,12 +59,9 @@ separation, this tutorial makes a start by changing the following things:
    parts that are needed will be mapped.
 1. For now, the `kernel binary` stays identity mapped. This will be changed in the in the coming
    tutorials as it is a quite difficult and peculiar exercise to remap the kernel.
-1. Device `MMIO regions` are lazily remapped during the device driver's `init()`.
-   1. The remappings will populate the top of the virtual address space. In the `AArch64 MMU
-      Driver`, we provide the top `256 MiB` for it.
-   1. It is possible to define the size of the virtual address space at compile time. We chose `8
-      GiB` for now, which means remapped MMIO virtual addresses will start at `7936 MiB`
-      (`0x1_f000_0000`).
+1. Device `MMIO regions` are lazily remapped during a device driver's `init()`.
+   1. A dedicated region of virtual addresses that we reserve using `BSP` code and the `linker
+      script` is used for this.
 1. We keep using `TTBR0` for the kernel translation tables for now. This will be changed when we
    remap the `kernel binary` in the coming tutorials.
 
@@ -94,27 +92,23 @@ First, we define an interface for operating on `translation tables`:
 /// Translation table operations.
 pub trait TranslationTable {
     /// Anything that needs to run before any of the other provided functions can be used.
+    ///
+    /// # Safety
+    ///
+    /// - Implementor must ensure that this function can run only once or is harmless if invoked
+    ///   multiple times.
     fn init(&mut self);
 
     /// The translation table's base address to be used for programming the MMU.
     fn phys_base_address(&self) -> Address<Physical>;
 
-    /// Map the given virtual pages to the given physical pages.
-    unsafe fn map_pages_at(
+    /// Map the given virtual memory region to the given physical memory region.
+    unsafe fn map_at(
         &mut self,
-        virt_pages: &PageSliceDescriptor<Virtual>,
-        phys_pages: &PageSliceDescriptor<Physical>,
+        virt_region: &MemoryRegion<Virtual>,
+        phys_region: &MemoryRegion<Physical>,
         attr: &AttributeFields,
     ) -> Result<(), &'static str>;
-
-    /// Obtain a free virtual page slice in the MMIO region.
-    fn next_mmio_virt_page_slice(
-        &mut self,
-        num_pages: usize,
-    ) -> Result<PageSliceDescriptor<Virtual>, &'static str>;
-
-    /// Check if a virtual page splice is in the "MMIO region".
-    fn is_virt_page_slice_mmio(&self, virt_pages: &PageSliceDescriptor<Virtual>) -> bool;
 }
 ```
 
@@ -163,13 +157,13 @@ functions that access and manipulate this instance. They  are exported for the r
 use:
 
 ```rust
-/// Raw mapping of virtual to physical pages in the kernel translation tables.
+/// Raw mapping of a virtual to physical region in the kernel translation tables.
 ///
 /// Prevents mapping into the MMIO range of the tables.
-pub unsafe fn kernel_map_pages_at(
+pub unsafe fn kernel_map_at(
     name: &'static str,
-    virt_pages: &PageSliceDescriptor<Virtual>,
-    phys_pages: &PageSliceDescriptor<Physical>,
+    virt_pages: &MemoryRegion<Virtual>,
+    phys_pages: &MemoryRegion<Physical>,
     attr: &AttributeFields,
 ) -> Result<(), &'static str>;
 
@@ -178,7 +172,7 @@ pub unsafe fn kernel_map_pages_at(
 /// Typically used by device drivers.
 pub unsafe fn kernel_map_mmio(
     name: &'static str,
-    phys_mmio_descriptor: &MMIODescriptor<Physical>,
+    mmio_descriptor: &MMIODescriptor,
 ) -> Result<Address<Virtual>, &'static str>;
 
 /// Map the kernel's binary. Returns the translation table's base address.
@@ -213,23 +207,23 @@ Both functions internally use `bsp` and `arch` specific code to achieve their go
 ```rust
 /// Map the kernel binary.
 pub unsafe fn kernel_map_binary() -> Result<(), &'static str> {
-    generic_mmu::kernel_map_pages_at(
+    generic_mmu::kernel_map_at(
         "Kernel boot-core stack",
-        &virt_stack_page_desc(),
-        &phys_stack_page_desc(),
-        &AttributeFields {
-            mem_attributes: MemAttributes::CacheableDRAM,
-            acc_perms: AccessPermissions::ReadWrite,
-            execute_never: true,
-        },
+        // omitted for brevity.
     )?;
 
-    generic_mmu::kernel_map_pages_at(
+    generic_mmu::kernel_map_at(
         "Kernel code and RO data",
-        // omitted for brevity.
+        &virt_code_region(),
+        &kernel_virt_to_phys_region(virt_code_region()),
+        &AttributeFields {
+            mem_attributes: MemAttributes::CacheableDRAM,
+            acc_perms: AccessPermissions::ReadOnly,
+            execute_never: false,
+        },
     )?;
 
-    generic_mmu::kernel_map_pages_at(
+    generic_mmu::kernel_map_at(
         "Kernel data and bss",
         // omitted for brevity.
     )?;
@@ -260,27 +254,96 @@ during kernel boot, the MMIO Descriptor is used to remap the MMIO region on dema
 
 ```rust
 unsafe fn init(&self) -> Result<(), &'static str> {
-    let virt_addr =
-        memory::mmu::kernel_map_mmio(self.compatible(), &self.phys_mmio_descriptor)?;
+    let virt_addr = memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?;
 
-    self.inner.lock(|inner| inner.init(Some(virt_addr.into_usize())))?;
+    self.inner
+        .lock(|inner| inner.init(Some(virt_addr.as_usize())))?;
 
      // omitted for brevity.
 
-     Ok(())
+    Ok(())
+}
+```
+
+### MMIO Virtual Address Allocation
+
+Peeking inside `memory::mmu::kernel_map_mmio()`, we can see that a `virtual address region` is
+obtained from an `allocator` before remapping:
+
+```rust
+pub unsafe fn kernel_map_mmio(
+    name: &'static str,
+    mmio_descriptor: &MMIODescriptor,
+) -> Result<Address<Virtual>, &'static str> {
+
+    // omitted
+
+        let virt_region =
+            alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.alloc(num_pages))?;
+
+        kernel_map_at_unchecked(
+            name,
+            &virt_region,
+            &phys_region,
+            &AttributeFields {
+                mem_attributes: MemAttributes::Device,
+                acc_perms: AccessPermissions::ReadWrite,
+                execute_never: true,
+            },
+        )?;
+
+    // omitted
+}
+```
+
+This allocator is defined and implemented in the added file `src/memory/mmu/alloc.rs`. Like other
+parts of the mapping code, its implementation makes use of the newly introduced `PageAddress<ATYPE>`
+and `MemoryRegion<ATYPE>` types (in [`src/memory/mmu/types.rs`](src/memory/mmu/types.rs)), but apart
+from that is rather straight forward. Therefore, it won't be covered in details here.
+
+The more interesting question is: How does the allocator get to learn which VAs it can use?
+
+This is happening in the following function, which gets called as part of
+`memory::mmu::post_enable_init()`, which in turn gets called in `kernel_init()` after the MMU has
+been turned on.
+
+```rust
+/// Query the BSP for the reserved virtual addresses for MMIO remapping and initialize the kernel's
+/// MMIO VA allocator with it.
+fn kernel_init_mmio_va_allocator() {
+    let region = bsp::memory::mmu::virt_mmio_remap_region();
+
+    alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.initialize(region));
 }
 ```
 
+Again, it is the `BSP` that provides the information. The `BSP` itself indirectly gets it from the
+linker script. In it, we have defined an `8 MiB` region right after the `.data` segment:
+
+```ld.s
+__data_end_exclusive = .;
+
+/***********************************************************************************************
+* MMIO Remap Reserved
+***********************************************************************************************/
+__mmio_remap_start = .;
+. += 8 * 1024 * 1024;
+__mmio_remap_end_exclusive = .;
+
+ASSERT((. & PAGE_MASK) == 0, "MMIO remap reservation is not page aligned")
+```
+
+The two symbols `__mmio_remap_start` and `__mmio_remap_end_exclusive` are used by the `BSP` to learn
+the VA range.
+
 ### Supporting Changes
 
 There's a couple of changes not covered in this tutorial text, but the reader should ideally skim
 through them:
 
-- [`src/bsp/raspberrypi/memory.rs`](src/bsp/raspberrypi/memory.rs) and
-  [`src/bsp/raspberrypi/link.ld`](src/bsp/raspberrypi/link.ld) changed the location of the boot
-  core's stack. It is now located after the data segment, and separated by an unmapped `guard page`.
-- [`src/memory/mmu/types.rs`](src/memory/mmu/types.rs) introduces a couple of supporting types, like
-  `Page<ATYPE>`.
+- [`src/memory.rs`](src/memory.rs) and [`src/memory/mmu/types.rs`](src/memory/mmu/types.rs)
+  introduce a couple of supporting types, like`Address<ATYPE>`, `PageAddress<ATYPE>` and
+  `MemoryRegion<ATYPE>`. It is worth reading their implementations.
 - [`src/memory/mmu/mapping_record.rs`](src/memory/mmu/mapping_record.rs) provides the generic kernel
   code's way of tracking previous memory mappings for use cases such as reusing existing mappings
   (in case of drivers that have their MMIO ranges in the same `64 KiB` page) or printing mappings
@@ -288,8 +351,8 @@ through them:
 
 ## Test it
 
-When you load the kernel, you can now see that the driver's MMIO virtual addresses start at
-`0x1_f000_0000`:
+When you load the kernel, you can now see that the driver's MMIO virtual addresses start right after
+the `.data` section:
 
 Raspberry Pi 3:
 
@@ -301,6 +364,7 @@ Minipush 1.0
 [MP] ⏳ Waiting for /dev/ttyUSB0
 [MP] ✅ Serial connected
 [MP] 🔌 Please power the target now
+
  __  __ _      _ _                 _
 |  \/  (_)_ _ (_) |   ___  __ _ __| |
 | |\/| | | ' \| | |__/ _ \/ _` / _` |
@@ -312,19 +376,19 @@ Minipush 1.0
 [MP] ⏩ Pushing 67 KiB =========================================🦀 100% 0 KiB/s Time: 00:00:00
 [ML] Loaded! Executing the payload now
 
-[    0.785711] mingo version 0.14.0
-[    0.785919] Booting on: Raspberry Pi 3
-[    0.786374] MMU online:
-[    0.786666]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    0.788410]                         Virtual                                   Physical               Size       Attr                    Entity
-[    0.790154]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    0.791902]       0x0000_0000_0008_0000..0x0000_0000_0008_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
-[    0.793515]       0x0000_0000_0009_0000..0x0000_0000_001b_ffff --> 0x00_0009_0000..0x00_001b_ffff |   1 MiB | C   RW XN | Kernel data and bss
-[    0.795085]       0x0000_0000_001d_0000..0x0000_0000_0024_ffff --> 0x00_001d_0000..0x00_0024_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
-[    0.796688]       0x0000_0001_f000_0000..0x0000_0001_f000_ffff --> 0x00_3f20_0000..0x00_3f20_ffff |  64 KiB | Dev RW XN | BCM GPIO
-[    0.798139]                                                                                                             | BCM PL011 UART
-[    0.799657]       0x0000_0001_f001_0000..0x0000_0001_f001_ffff --> 0x00_3f00_0000..0x00_3f00_ffff |  64 KiB | Dev RW XN | BCM Peripheral Interrupt Controller
-[    0.801400]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    0.758253] mingo version 0.14.0
+[    0.758460] Booting on: Raspberry Pi 3
+[    0.758915] MMU online:
+[    0.759208]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    0.760952]                         Virtual                                   Physical               Size       Attr                    Entity
+[    0.762696]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    0.764441]       0x0000_0000_0000_0000..0x0000_0000_0007_ffff --> 0x00_0000_0000..0x00_0007_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
+[    0.766044]       0x0000_0000_0008_0000..0x0000_0000_0008_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
+[    0.767658]       0x0000_0000_0009_0000..0x0000_0000_000d_ffff --> 0x00_0009_0000..0x00_000d_ffff | 320 KiB | C   RW XN | Kernel data and bss
+[    0.769229]       0x0000_0000_000e_0000..0x0000_0000_000e_ffff --> 0x00_3f20_0000..0x00_3f20_ffff |  64 KiB | Dev RW XN | BCM GPIO
+[    0.770680]                                                                                                             | BCM PL011 UART
+[    0.772197]       0x0000_0000_000f_0000..0x0000_0000_000f_ffff --> 0x00_3f00_0000..0x00_3f00_ffff |  64 KiB | Dev RW XN | BCM Peripheral Interrupt Controller
+[    0.773941]       -------------------------------------------------------------------------------------------------------------------------------------------
 ```
 
 Raspberry Pi 4:
@@ -337,6 +401,7 @@ Minipush 1.0
 [MP] ⏳ Waiting for /dev/ttyUSB0
 [MP] ✅ Serial connected
 [MP] 🔌 Please power the target now
+
  __  __ _      _ _                 _
 |  \/  (_)_ _ (_) |   ___  __ _ __| |
 | |\/| | | ' \| | |__/ _ \/ _` / _` |
@@ -348,20 +413,21 @@ Minipush 1.0
 [MP] ⏩ Pushing 74 KiB =========================================🦀 100% 0 KiB/s Time: 00:00:00
 [ML] Loaded! Executing the payload now
 
-[    0.869392] mingo version 0.14.0
-[    0.869425] Booting on: Raspberry Pi 4
-[    0.869880] MMU online:
-[    0.870173]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    0.871917]                         Virtual                                   Physical               Size       Attr                    Entity
-[    0.873661]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    0.875407]       0x0000_0000_0008_0000..0x0000_0000_0008_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
-[    0.877021]       0x0000_0000_0009_0000..0x0000_0000_001b_ffff --> 0x00_0009_0000..0x00_001b_ffff |   1 MiB | C   RW XN | Kernel data and bss
-[    0.878591]       0x0000_0000_001d_0000..0x0000_0000_0024_ffff --> 0x00_001d_0000..0x00_0024_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
-[    0.880195]       0x0000_0001_f000_0000..0x0000_0001_f000_ffff --> 0x00_fe20_0000..0x00_fe20_ffff |  64 KiB | Dev RW XN | BCM GPIO
-[    0.881645]                                                                                                             | BCM PL011 UART
-[    0.883163]       0x0000_0001_f001_0000..0x0000_0001_f001_ffff --> 0x00_ff84_0000..0x00_ff84_ffff |  64 KiB | Dev RW XN | GICD
-[    0.884570]                                                                                                             | GICC
-[    0.885979]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    0.842275] mingo version 0.14.0
+[    0.842308] Booting on: Raspberry Pi 4
+[    0.842763] MMU online:
+[    0.843055]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    0.844800]                         Virtual                                   Physical               Size       Attr                    Entity
+[    0.846544]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    0.848288]       0x0000_0000_0000_0000..0x0000_0000_0007_ffff --> 0x00_0000_0000..0x00_0007_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
+[    0.849892]       0x0000_0000_0008_0000..0x0000_0000_0008_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
+[    0.851505]       0x0000_0000_0009_0000..0x0000_0000_000d_ffff --> 0x00_0009_0000..0x00_000d_ffff | 320 KiB | C   RW XN | Kernel data and bss
+[    0.853076]       0x0000_0000_000e_0000..0x0000_0000_000e_ffff --> 0x00_fe20_0000..0x00_fe20_ffff |  64 KiB | Dev RW XN | BCM GPIO
+[    0.854528]                                                                                                             | BCM PL011 UART
+[    0.856045]       0x0000_0000_000f_0000..0x0000_0000_000f_ffff --> 0x00_ff84_0000..0x00_ff84_ffff |  64 KiB | Dev RW XN | GICD
+[    0.857453]                                                                                                             | GICC
+[    0.858862]       -------------------------------------------------------------------------------------------------------------------------------------------
+
 ```
 
 ## Diff to previous
@@ -382,23 +448,26 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/Cargo.toml 14_virtual_mem_part2_mm
 diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
 --- 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs
 +++ 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
-@@ -15,9 +15,12 @@
+@@ -14,10 +14,14 @@
+ //! crate::memory::mmu::translation_table::arch_translation_table
 
  use crate::{
-     bsp, memory,
+-    bsp, memory,
 -    memory::mmu::{
 -        arch_mmu::{Granule512MiB, Granule64KiB},
 -        AccessPermissions, AttributeFields, MemAttributes,
++    bsp,
 +    memory::{
++        self,
 +        mmu::{
 +            arch_mmu::{Granule512MiB, Granule64KiB},
-+            AccessPermissions, AttributeFields, MemAttributes, Page, PageSliceDescriptor,
++            AccessPermissions, AttributeFields, MemAttributes, MemoryRegion, PageAddress,
 +        },
 +        Address, Physical, Virtual,
      },
  };
  use core::convert;
-@@ -121,12 +124,9 @@
+@@ -121,12 +125,9 @@
  }
 
  trait StartAddr {
@@ -412,7 +481,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
  //--------------------------------------------------------------------------------------------------
  // Public Definitions
  //--------------------------------------------------------------------------------------------------
-@@ -141,10 +141,13 @@
+@@ -141,10 +142,10 @@
 
      /// Table descriptors, covering 512 MiB windows.
      lvl2: [TableDescriptor; NUM_TABLES],
@@ -420,16 +489,13 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
 
 -/// A translation table type for the kernel space.
 -pub type KernelTranslationTable = FixedSizeTranslationTable<NUM_LVL2_TABLES>;
-+    /// Index of the next free MMIO page.
-+    cur_l3_mmio_index: usize,
-+
 +    /// Have the tables been initialized?
 +    initialized: bool,
 +}
 
  //--------------------------------------------------------------------------------------------------
  // Private Code
-@@ -152,12 +155,8 @@
+@@ -152,12 +153,8 @@
 
  // The binary is still identity mapped, so we don't need to convert here.
  impl<T, const N: usize> StartAddr for [T; N] {
@@ -444,7 +510,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
      }
  }
 
-@@ -170,10 +169,10 @@
+@@ -170,10 +167,10 @@
      }
 
      /// Create an instance pointing to the supplied address.
@@ -453,27 +519,30 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
          let val = InMemoryRegister::<u64, STAGE1_TABLE_DESCRIPTOR::Register>::new(0);
 
 -        let shifted = phys_next_lvl_table_addr >> Granule64KiB::SHIFT;
-+        let shifted = phys_next_lvl_table_addr.into_usize() >> Granule64KiB::SHIFT;
++        let shifted = phys_next_lvl_table_addr.as_usize() >> Granule64KiB::SHIFT;
          val.write(
              STAGE1_TABLE_DESCRIPTOR::NEXT_LEVEL_TABLE_ADDR_64KiB.val(shifted as u64)
                  + STAGE1_TABLE_DESCRIPTOR::TYPE::Table
-@@ -230,10 +229,13 @@
+@@ -230,12 +227,15 @@
      }
 
      /// Create an instance.
 -    pub fn from_output_addr(phys_output_addr: usize, attribute_fields: &AttributeFields) -> Self {
-+    pub fn from_output_page(
-+        phys_output_page_ptr: *const Page<Physical>,
++    pub fn from_output_page_addr(
++        phys_output_page_addr: PageAddress<Physical>,
 +        attribute_fields: &AttributeFields,
 +    ) -> Self {
          let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
 
 -        let shifted = phys_output_addr as u64 >> Granule64KiB::SHIFT;
-+        let shifted = phys_output_page_ptr as u64 >> Granule64KiB::SHIFT;
++        let shifted = phys_output_page_addr.into_inner().as_usize() >> Granule64KiB::SHIFT;
          val.write(
-             STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted)
+-            STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted)
++            STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted as u64)
                  + STAGE1_PAGE_DESCRIPTOR::AF::True
-@@ -244,50 +246,201 @@
+                 + STAGE1_PAGE_DESCRIPTOR::TYPE::Page
+                 + STAGE1_PAGE_DESCRIPTOR::VALID::True
+@@ -244,50 +244,133 @@
 
          Self { value: val.get() }
      }
@@ -498,10 +567,6 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
 +}
 +
  impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
-+    // Reserve the last 256 MiB of the address space for MMIO mappings.
-+    const L2_MMIO_START_INDEX: usize = NUM_TABLES - 1;
-+    const L3_MMIO_START_INDEX: usize = 8192 / 2;
-+
      /// Create an instance.
 +    #[allow(clippy::assertions_on_constants)]
      pub const fn new() -> Self {
@@ -513,7 +578,6 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
          Self {
              lvl3: [[PageDescriptor::new_zeroed(); 8192]; NUM_TABLES],
              lvl2: [TableDescriptor::new_zeroed(); NUM_TABLES],
-+            cur_l3_mmio_index: 0,
 +            initialized: false,
          }
      }
@@ -521,74 +585,59 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
 -    /// Iterates over all static translation table entries and fills them at once.
 -    ///
 -    /// # Safety
-+    /// The start address of the table's MMIO range.
-+    #[inline(always)]
-+    fn mmio_start_addr(&self) -> Address<Virtual> {
-+        Address::new(
-+            (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
-+                | (Self::L3_MMIO_START_INDEX << Granule64KiB::SHIFT),
-+        )
-+    }
-+
-+    /// The inclusive end address of the table's MMIO range.
-+    #[inline(always)]
-+    fn mmio_end_addr_inclusive(&self) -> Address<Virtual> {
-+        Address::new(
-+            (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
-+                | (8191 << Granule64KiB::SHIFT)
-+                | (Granule64KiB::SIZE - 1),
-+        )
-+    }
-+
+-    ///
+-    /// - Modifies a `static mut`. Ensure it only happens from here.
+-    pub unsafe fn populate_tt_entries(&mut self) -> Result<(), &'static str> {
+-        for (l2_nr, l2_entry) in self.lvl2.iter_mut().enumerate() {
+-            *l2_entry =
+-                TableDescriptor::from_next_lvl_table_addr(self.lvl3[l2_nr].phys_start_addr_usize());
 +    /// Helper to calculate the lvl2 and lvl3 indices from an address.
 +    #[inline(always)]
-+    fn lvl2_lvl3_index_from_page(
++    fn lvl2_lvl3_index_from_page_addr(
 +        &self,
-+        virt_page_ptr: *const Page<Virtual>,
++        virt_page_addr: PageAddress<Virtual>,
 +    ) -> Result<(usize, usize), &'static str> {
-+        let addr = virt_page_ptr as usize;
++        let addr = virt_page_addr.into_inner().as_usize();
 +        let lvl2_index = addr >> Granule512MiB::SHIFT;
 +        let lvl3_index = (addr & Granule512MiB::MASK) >> Granule64KiB::SHIFT;
-+
+
+-            for (l3_nr, l3_entry) in self.lvl3[l2_nr].iter_mut().enumerate() {
+-                let virt_addr = (l2_nr << Granule512MiB::SHIFT) + (l3_nr << Granule64KiB::SHIFT);
 +        if lvl2_index > (NUM_TABLES - 1) {
 +            return Err("Virtual page is out of bounds of translation table");
 +        }
-+
+
+-                let (phys_output_addr, attribute_fields) =
+-                    bsp::memory::mmu::virt_mem_layout().virt_addr_properties(virt_addr)?;
 +        Ok((lvl2_index, lvl3_index))
 +    }
-+
+
+-                *l3_entry = PageDescriptor::from_output_addr(phys_output_addr, &attribute_fields);
+-            }
 +    /// Sets the PageDescriptor corresponding to the supplied page address.
-     ///
--    /// - Modifies a `static mut`. Ensure it only happens from here.
--    pub unsafe fn populate_tt_entries(&mut self) -> Result<(), &'static str> {
--        for (l2_nr, l2_entry) in self.lvl2.iter_mut().enumerate() {
--            *l2_entry =
--                TableDescriptor::from_next_lvl_table_addr(self.lvl3[l2_nr].phys_start_addr_usize());
++    ///
 +    /// Doesn't allow overriding an already valid page.
 +    #[inline(always)]
-+    fn set_page_descriptor_from_page(
++    fn set_page_descriptor_from_page_addr(
 +        &mut self,
-+        virt_page_ptr: *const Page<Virtual>,
++        virt_page_addr: PageAddress<Virtual>,
 +        new_desc: &PageDescriptor,
 +    ) -> Result<(), &'static str> {
-+        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page(virt_page_ptr)?;
++        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page_addr(virt_page_addr)?;
 +        let desc = &mut self.lvl3[lvl2_index][lvl3_index];
-
--            for (l3_nr, l3_entry) in self.lvl3[l2_nr].iter_mut().enumerate() {
--                let virt_addr = (l2_nr << Granule512MiB::SHIFT) + (l3_nr << Granule64KiB::SHIFT);
++
 +        if desc.is_valid() {
 +            return Err("Virtual page is already mapped");
-+        }
+         }
 
--                let (phys_output_addr, attribute_fields) =
--                    bsp::memory::mmu::virt_mem_layout().virt_addr_properties(virt_addr)?;
 +        *desc = *new_desc;
-+        Ok(())
-+    }
+         Ok(())
+     }
 +}
 
--                *l3_entry = PageDescriptor::from_output_addr(phys_output_addr, &attribute_fields);
--            }
+-    /// The translation table's base address to be used for programming the MMU.
+-    pub fn phys_base_address(&self) -> u64 {
+-        self.lvl2.phys_start_addr_u64()
 +//------------------------------------------------------------------------------
 +// OS Interface Code
 +//------------------------------------------------------------------------------
@@ -609,7 +658,6 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
 +            *lvl2_entry = new_desc;
 +        }
 +
-+        self.cur_l3_mmio_index = Self::L3_MMIO_START_INDEX;
 +        self.initialized = true;
 +    }
 +
@@ -617,82 +665,36 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
 +        self.lvl2.phys_start_addr()
 +    }
 +
-+    unsafe fn map_pages_at(
++    unsafe fn map_at(
 +        &mut self,
-+        virt_pages: &PageSliceDescriptor<Virtual>,
-+        phys_pages: &PageSliceDescriptor<Physical>,
++        virt_region: &MemoryRegion<Virtual>,
++        phys_region: &MemoryRegion<Physical>,
 +        attr: &AttributeFields,
 +    ) -> Result<(), &'static str> {
 +        assert!(self.initialized, "Translation tables not initialized");
 +
-+        let v = virt_pages.as_slice();
-+        let p = phys_pages.as_slice();
-+
-+        // No work to do for empty slices.
-+        if v.is_empty() {
-+            return Ok(());
++        if virt_region.size() != phys_region.size() {
++            return Err("Tried to map memory regions with unequal sizes");
 +        }
 +
-+        if v.len() != p.len() {
-+            return Err("Tried to map page slices with unequal sizes");
-+        }
-+
-+        if p.last().unwrap().as_ptr() >= bsp::memory::mmu::phys_addr_space_end_page_ptr() {
++        if phys_region.end_exclusive_page_addr() > bsp::memory::phys_addr_space_end_exclusive_addr()
++        {
 +            return Err("Tried to map outside of physical address space");
 +        }
 +
-+        let iter = p.iter().zip(v.iter());
-+        for (phys_page, virt_page) in iter {
-+            let new_desc = PageDescriptor::from_output_page(phys_page.as_ptr(), attr);
-+            let virt_page = virt_page.as_ptr();
-+
-+            self.set_page_descriptor_from_page(virt_page, &new_desc)?;
-         }
-
-         Ok(())
-     }
-
--    /// The translation table's base address to be used for programming the MMU.
--    pub fn phys_base_address(&self) -> u64 {
--        self.lvl2.phys_start_addr_u64()
-+    fn next_mmio_virt_page_slice(
-+        &mut self,
-+        num_pages: usize,
-+    ) -> Result<PageSliceDescriptor<Virtual>, &'static str> {
-+        assert!(self.initialized, "Translation tables not initialized");
-+
-+        if num_pages == 0 {
-+            return Err("num_pages == 0");
-+        }
-+
-+        if (self.cur_l3_mmio_index + num_pages) > 8191 {
-+            return Err("Not enough MMIO space left");
-+        }
-+
-+        let addr = Address::new(
-+            (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
-+                | (self.cur_l3_mmio_index << Granule64KiB::SHIFT),
-+        );
-+        self.cur_l3_mmio_index += num_pages;
-+
-+        Ok(PageSliceDescriptor::from_addr(addr, num_pages))
-+    }
-+
-+    fn is_virt_page_slice_mmio(&self, virt_pages: &PageSliceDescriptor<Virtual>) -> bool {
-+        let start_addr = virt_pages.start_addr();
-+        let end_addr_inclusive = virt_pages.end_addr_inclusive();
++        let iter = phys_region.into_iter().zip(virt_region.into_iter());
++        for (phys_page_addr, virt_page_addr) in iter {
++            let new_desc = PageDescriptor::from_output_page_addr(phys_page_addr, attr);
++            let virt_page = virt_page_addr;
 +
-+        for i in [start_addr, end_addr_inclusive].iter() {
-+            if (*i >= self.mmio_start_addr()) && (*i <= self.mmio_end_addr_inclusive()) {
-+                return true;
-+            }
++            self.set_page_descriptor_from_page_addr(virt_page, &new_desc)?;
 +        }
 +
-+        false
++        Ok(())
      }
  }
 
-@@ -296,6 +449,9 @@
+@@ -296,6 +379,9 @@
  //--------------------------------------------------------------------------------------------------
 
  #[cfg(test)]
@@ -761,7 +763,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 14
 -
          // Set the "Translation Table Base Register".
 -        TTBR0_EL1.set_baddr(KERNEL_TABLES.phys_base_address());
-+        TTBR0_EL1.set_baddr(phys_tables_base_addr.into_usize() as u64);
++        TTBR0_EL1.set_baddr(phys_tables_base_addr.as_usize() as u64);
 
          self.configure_translation_control();
 
@@ -1013,8 +1015,8 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs
 -            gicc: gicc::GICC::new(gicc_mmio_start_addr),
 +            gicd_mmio_descriptor,
 +            gicc_mmio_descriptor,
-+            gicd: gicd::GICD::new(gicd_mmio_descriptor.start_addr().into_usize()),
-+            gicc: gicc::GICC::new(gicc_mmio_descriptor.start_addr().into_usize()),
++            gicd: gicd::GICD::new(gicd_mmio_descriptor.start_addr().as_usize()),
++            gicc: gicc::GICC::new(gicc_mmio_descriptor.start_addr().as_usize()),
 +            is_mmio_remapped: AtomicBool::new(false),
              handler_table: InitStateLock::new([None; Self::NUM_IRQS]),
          }
@@ -1029,11 +1031,11 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs
 +
 +            // GICD
 +            virt_addr = memory::mmu::kernel_map_mmio("GICD", &self.gicd_mmio_descriptor)?;
-+            self.gicd.set_mmio(virt_addr.into_usize());
++            self.gicd.set_mmio(virt_addr.as_usize());
 +
 +            // GICC
 +            virt_addr = memory::mmu::kernel_map_mmio("GICC", &self.gicc_mmio_descriptor)?;
-+            self.gicc.set_mmio(virt_addr.into_usize());
++            self.gicc.set_mmio(virt_addr.as_usize());
 +
 +            // Conclude remapping.
 +            self.is_mmio_remapped.store(true, Ordering::Relaxed);
@@ -1099,7 +1101,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
 -            inner: IRQSafeNullLock::new(GPIOInner::new(mmio_start_addr)),
 +            mmio_descriptor,
 +            virt_mmio_start_addr: AtomicUsize::new(0),
-+            inner: IRQSafeNullLock::new(GPIOInner::new(mmio_descriptor.start_addr().into_usize())),
++            inner: IRQSafeNullLock::new(GPIOInner::new(mmio_descriptor.start_addr().as_usize())),
          }
      }
 
@@ -1112,10 +1114,10 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
 +        let virt_addr = memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?;
 +
 +        self.inner
-+            .lock(|inner| inner.init(Some(virt_addr.into_usize())))?;
++            .lock(|inner| inner.init(Some(virt_addr.as_usize())))?;
 +
 +        self.virt_mmio_start_addr
-+            .store(virt_addr.into_usize(), Ordering::Relaxed);
++            .store(virt_addr.as_usize(), Ordering::Relaxed);
 +
 +        Ok(())
 +    }
@@ -1166,7 +1168,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
 -    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
 +    /// - The user must ensure to provide correct MMIO descriptors.
 +    pub const unsafe fn new(mmio_descriptor: memory::mmu::MMIODescriptor) -> Self {
-+        let addr = mmio_descriptor.start_addr().into_usize();
++        let addr = mmio_descriptor.start_addr().as_usize();
 +
          Self {
 -            wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(mmio_start_addr)),
@@ -1203,7 +1205,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
 +
 +    unsafe fn init(&self) -> Result<(), &'static str> {
 +        let virt_addr =
-+            memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?.into_usize();
++            memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?.as_usize();
 +
 +        self.wo_registers
 +            .lock(|regs| *regs = WriteOnlyRegisters::new(virt_addr));
@@ -1330,7 +1332,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
 +            mmio_descriptor,
 +            virt_mmio_start_addr: AtomicUsize::new(0),
 +            inner: IRQSafeNullLock::new(PL011UartInner::new(
-+                mmio_descriptor.start_addr().into_usize(),
++                mmio_descriptor.start_addr().as_usize(),
 +            )),
              irq_number,
          }
@@ -1343,10 +1345,10 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
 +        let virt_addr = memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?;
 +
 +        self.inner
-+            .lock(|inner| inner.init(Some(virt_addr.into_usize())))?;
++            .lock(|inner| inner.init(Some(virt_addr.as_usize())))?;
 +
 +        self.virt_mmio_start_addr
-+            .store(virt_addr.into_usize(), Ordering::Relaxed);
++            .store(virt_addr.as_usize(), Ordering::Relaxed);
 
          Ok(())
      }
@@ -1388,9 +1390,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/console.rs 14_
 -    let mut panic_uart = device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START);
 +    use driver::interface::DeviceDriver;
 
-+    let mut panic_gpio = device_driver::PanicGPIO::new(memory::map::mmio::GPIO_START.into_usize());
++    let mut panic_gpio = device_driver::PanicGPIO::new(memory::map::mmio::GPIO_START.as_usize());
 +    let mut panic_uart =
-+        device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START.into_usize());
++        device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START.as_usize());
 +
 +    // If remapping of the driver's MMIO already happened, take the remapped start address.
 +    // Otherwise, take a chance with the default physical address.
@@ -1434,53 +1436,45 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/driver.rs 14_v
 diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
 --- 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld
 +++ 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
-@@ -17,11 +17,6 @@
- SECTIONS
- {
-     . =  __rpi_load_addr;
--                                        /*   ^             */
--                                        /*   | stack       */
--                                        /*   | growth      */
--                                        /*   | direction   */
--   __boot_core_stack_end_exclusive = .; /*   |             */
-
-     /***********************************************************************************************
-     * Code + RO Data + Global Offset Table
-@@ -44,6 +39,7 @@
+@@ -38,7 +38,7 @@
+     ***********************************************************************************************/
+     .boot_core_stack (NOLOAD) :
+     {
+-                                             /*   ^             */
++        __boot_core_stack_start = .;         /*   ^             */
+                                              /*   | stack       */
+         . += __rpi_phys_binary_load_addr;    /*   | growth      */
+                                              /*   | direction   */
+@@ -68,6 +68,7 @@
      /***********************************************************************************************
      * Data + BSS
      ***********************************************************************************************/
-+    __rw_start = .;
-     .data : { *(.data*) } :segment_rw
++    __data_start = .;
+     .data : { *(.data*) } :segment_data
 
      /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
-@@ -54,4 +50,21 @@
+@@ -78,4 +79,16 @@
          . = ALIGN(16);
          __bss_end_exclusive = .;
-     } :NONE
+     } :segment_data
 +
-+    . = ALIGN(64K); /* Align to page boundary */
-+    __rw_end_exclusive = .;
++    . = ALIGN(PAGE_SIZE);
++    __data_end_exclusive = .;
 +
 +    /***********************************************************************************************
-+    * Guard Page between boot core stack and data
++    * MMIO Remap Reserved
 +    ***********************************************************************************************/
-+    . += 64K;
++    __mmio_remap_start = .;
++    . += 8 * 1024 * 1024;
++    __mmio_remap_end_exclusive = .;
 +
-+    /***********************************************************************************************
-+    * Boot Core Stack
-+    ***********************************************************************************************/
-+    __boot_core_stack_start = .;         /*   ^             */
-+                                         /*   | stack       */
-+    . += 512K;                           /*   | growth      */
-+                                         /*   | direction   */
-+    __boot_core_stack_end_exclusive = .; /*   |             */
++    ASSERT((. & PAGE_MASK) == 0, "MMIO remap reservation is not page aligned")
  }
 
 diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
 --- 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +++ 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
-@@ -4,70 +4,150 @@
+@@ -4,70 +4,163 @@
 
  //! BSP Memory Management Unit.
 
@@ -1488,14 +1482,12 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 -use crate::memory::mmu::*;
 -use core::ops::RangeInclusive;
 +use crate::{
-+    common,
 +    memory::{
-+        mmu as generic_mmu,
 +        mmu::{
-+            AccessPermissions, AddressSpace, AssociatedTranslationTable, AttributeFields,
-+            MemAttributes, Page, PageSliceDescriptor, TranslationGranule,
++            self as generic_mmu, AccessPermissions, AddressSpace, AssociatedTranslationTable,
++            AttributeFields, MemAttributes, MemoryRegion, PageAddress, TranslationGranule,
 +        },
-+        Address, Physical, Virtual,
++        Physical, Virtual,
 +    },
 +    synchronization::InitStateLock,
 +};
@@ -1516,16 +1508,16 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +/// The translation granule chosen by this BSP. This will be used everywhere else in the kernel to
 +/// derive respective data structures and their sizes. For example, the `crate::memory::mmu::Page`.
 +pub type KernelGranule = TranslationGranule<{ 64 * 1024 }>;
-
--const NUM_MEM_RANGES: usize = 2;
++
 +/// The kernel's virtual address space defined by this BSP.
-+pub type KernelVirtAddrSpace = AddressSpace<{ 8 * 1024 * 1024 * 1024 }>;
++pub type KernelVirtAddrSpace = AddressSpace<{ 1024 * 1024 * 1024 }>;
 
--/// The virtual memory layout.
+-const NUM_MEM_RANGES: usize = 2;
 +//--------------------------------------------------------------------------------------------------
 +// Global instances
 +//--------------------------------------------------------------------------------------------------
-+
+
+-/// The virtual memory layout.
 +/// The kernel translation tables.
  ///
 -/// The layout must contain only special ranges, aka anything that is _not_ normal cacheable DRAM.
@@ -1535,7 +1527,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 -    [
 -        TranslationDescriptor {
 -            name: "Kernel code and RO data",
--            virtual_range: rx_range_inclusive,
+-            virtual_range: code_range_inclusive,
 -            physical_range_translation: Translation::Identity,
 -            attribute_fields: AttributeFields {
 -                mem_attributes: MemAttributes::CacheableDRAM,
@@ -1566,10 +1558,10 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
  // Private Code
  //--------------------------------------------------------------------------------------------------
 
--fn rx_range_inclusive() -> RangeInclusive<usize> {
+-fn code_range_inclusive() -> RangeInclusive<usize> {
 -    // Notice the subtraction to turn the exclusive end into an inclusive end.
 -    #[allow(clippy::range_minus_one)]
--    RangeInclusive::new(super::rx_start(), super::rx_end_exclusive() - 1)
+-    RangeInclusive::new(super::code_start(), super::code_end_exclusive() - 1)
 +/// Helper function for calculating the number of pages the given parameter spans.
 +const fn size_to_num_pages(size: usize) -> usize {
 +    assert!(size > 0);
@@ -1578,37 +1570,50 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +    size >> KernelGranule::SHIFT
 +}
 +
-+/// The Read+Execute (RX) pages of the kernel binary.
-+fn virt_rx_page_desc() -> PageSliceDescriptor<Virtual> {
-+    let num_pages = size_to_num_pages(super::rx_size());
++/// The code pages of the kernel binary.
++fn virt_code_region() -> MemoryRegion<Virtual> {
++    let num_pages = size_to_num_pages(super::code_size());
 +
-+    PageSliceDescriptor::from_addr(super::virt_rx_start(), num_pages)
- }
-
--fn mmio_range_inclusive() -> RangeInclusive<usize> {
--    RangeInclusive::new(memory_map::mmio::START, memory_map::mmio::END_INCLUSIVE)
-+/// The Read+Write (RW) pages of the kernel binary.
-+fn virt_rw_page_desc() -> PageSliceDescriptor<Virtual> {
-+    let num_pages = size_to_num_pages(super::rw_size());
++    let start_page_addr = super::virt_code_start();
++    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
 +
-+    PageSliceDescriptor::from_addr(super::virt_rw_start(), num_pages)
++    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
 +}
 +
-+/// The boot core's stack.
-+fn virt_boot_core_stack_page_desc() -> PageSliceDescriptor<Virtual> {
-+    let num_pages = size_to_num_pages(super::boot_core_stack_size());
++/// The data pages of the kernel binary.
++fn virt_data_region() -> MemoryRegion<Virtual> {
++    let num_pages = size_to_num_pages(super::data_size());
 +
-+    PageSliceDescriptor::from_addr(super::virt_boot_core_stack_start(), num_pages)
++    let start_page_addr = super::virt_data_start();
++    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
++
++    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
 +}
 +
-+// The binary is still identity mapped, so use this trivial conversion function for mapping below.
++/// The boot core stack pages.
++fn virt_boot_core_stack_region() -> MemoryRegion<Virtual> {
++    let num_pages = size_to_num_pages(super::boot_core_stack_size());
++
++    let start_page_addr = super::virt_boot_core_stack_start();
++    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
 +
-+fn kernel_virt_to_phys_page_slice(
-+    virt_slice: PageSliceDescriptor<Virtual>,
-+) -> PageSliceDescriptor<Physical> {
-+    let phys_start_addr = Address::<Physical>::new(virt_slice.start_addr().into_usize());
++    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
+ }
+
+-fn mmio_range_inclusive() -> RangeInclusive<usize> {
+-    RangeInclusive::new(memory_map::mmio::START, memory_map::mmio::END_INCLUSIVE)
++// The binary is still identity mapped, so use this trivial conversion function for mapping below.
 +
-+    PageSliceDescriptor::from_addr(phys_start_addr, virt_slice.num_pages())
++fn kernel_virt_to_phys_region(virt_region: MemoryRegion<Virtual>) -> MemoryRegion<Physical> {
++    MemoryRegion::new(
++        PageAddress::from(virt_region.start_page_addr().into_inner().as_usize()),
++        PageAddress::from(
++            virt_region
++                .end_exclusive_page_addr()
++                .into_inner()
++                .as_usize(),
++        ),
++    )
  }
 
  //--------------------------------------------------------------------------------------------------
@@ -1623,12 +1628,14 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +    &KERNEL_TABLES
 +}
 +
-+/// Pointer to the last page of the physical address space.
-+pub fn phys_addr_space_end_page_ptr() -> *const Page<Physical> {
-+    common::align_down(
-+        super::phys_addr_space_end().into_usize(),
-+        KernelGranule::SIZE,
-+    ) as *const Page<_>
++/// The MMIO remap pages.
++pub fn virt_mmio_remap_region() -> MemoryRegion<Virtual> {
++    let num_pages = size_to_num_pages(super::mmio_remap_size());
++
++    let start_page_addr = super::virt_mmio_remap_start();
++    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
++
++    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
 +}
 +
 +/// Map the kernel binary.
@@ -1637,32 +1644,32 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +///
 +/// - Any miscalculation or attribute error will likely be fatal. Needs careful manual checking.
 +pub unsafe fn kernel_map_binary() -> Result<(), &'static str> {
-+    generic_mmu::kernel_map_pages_at(
-+        "Kernel code and RO data",
-+        &virt_rx_page_desc(),
-+        &kernel_virt_to_phys_page_slice(virt_rx_page_desc()),
++    generic_mmu::kernel_map_at(
++        "Kernel boot-core stack",
++        &virt_boot_core_stack_region(),
++        &kernel_virt_to_phys_region(virt_boot_core_stack_region()),
 +        &AttributeFields {
 +            mem_attributes: MemAttributes::CacheableDRAM,
-+            acc_perms: AccessPermissions::ReadOnly,
-+            execute_never: false,
++            acc_perms: AccessPermissions::ReadWrite,
++            execute_never: true,
 +        },
 +    )?;
 +
-+    generic_mmu::kernel_map_pages_at(
-+        "Kernel data and bss",
-+        &virt_rw_page_desc(),
-+        &kernel_virt_to_phys_page_slice(virt_rw_page_desc()),
++    generic_mmu::kernel_map_at(
++        "Kernel code and RO data",
++        &virt_code_region(),
++        &kernel_virt_to_phys_region(virt_code_region()),
 +        &AttributeFields {
 +            mem_attributes: MemAttributes::CacheableDRAM,
-+            acc_perms: AccessPermissions::ReadWrite,
-+            execute_never: true,
++            acc_perms: AccessPermissions::ReadOnly,
++            execute_never: false,
 +        },
 +    )?;
 +
-+    generic_mmu::kernel_map_pages_at(
-+        "Kernel boot-core stack",
-+        &virt_boot_core_stack_page_desc(),
-+        &kernel_virt_to_phys_page_slice(virt_boot_core_stack_page_desc()),
++    generic_mmu::kernel_map_at(
++        "Kernel data and bss",
++        &virt_data_region(),
++        &kernel_virt_to_phys_region(virt_data_region()),
 +        &AttributeFields {
 +            mem_attributes: MemAttributes::CacheableDRAM,
 +            acc_perms: AccessPermissions::ReadWrite,
@@ -1674,7 +1681,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -77,19 +157,24 @@
+@@ -77,38 +170,60 @@
  #[cfg(test)]
  mod tests {
      use super::*;
@@ -1689,24 +1696,26 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 -        for i in LAYOUT.inner().iter() {
 -            let start: usize = *(i.virtual_range)().start();
 -            let end: usize = *(i.virtual_range)().end() + 1;
+-
+-            assert_eq!(start modulo SIXTYFOUR_KIB, 0);
+-            assert_eq!(end modulo SIXTYFOUR_KIB, 0);
+-            assert!(end >= start);
 +        for i in [
-+            virt_rx_page_desc,
-+            virt_rw_page_desc,
-+            virt_boot_core_stack_page_desc,
++            virt_boot_core_stack_region,
++            virt_code_region,
++            virt_data_region,
 +        ]
 +        .iter()
 +        {
-+            let start: usize = i().start_addr().into_usize();
-+            let end: usize = i().end_addr().into_usize();
-
--            assert_eq!(start modulo SIXTYFOUR_KIB, 0);
--            assert_eq!(end modulo SIXTYFOUR_KIB, 0);
-+            assert_eq!(start modulo KernelGranule::SIZE, 0);
-+            assert_eq!(end modulo KernelGranule::SIZE, 0);
-             assert!(end >= start);
++            let start = i().start_page_addr().into_inner();
++            let end_exclusive = i().end_exclusive_page_addr().into_inner();
++
++            assert!(start.is_page_aligned());
++            assert!(end_exclusive.is_page_aligned());
++            assert!(end_exclusive >= start);
          }
      }
-@@ -97,18 +182,38 @@
+
      /// Ensure the kernel's virtual memory layout is free of overlaps.
      #[kernel_test]
      fn virt_mem_layout_has_no_overlaps() {
@@ -1722,17 +1731,14 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 -                assert!(!second_range().contains(first_range().start()));
 -                assert!(!second_range().contains(first_range().end()));
 +        let layout = [
-+            virt_rx_page_desc(),
-+            virt_rw_page_desc(),
-+            virt_boot_core_stack_page_desc(),
++            virt_boot_core_stack_region(),
++            virt_code_region(),
++            virt_data_region(),
 +        ];
 +
 +        for (i, first_range) in layout.iter().enumerate() {
 +            for second_range in layout.iter().skip(i + 1) {
-+                assert!(!first_range.contains(second_range.start_addr()));
-+                assert!(!first_range.contains(second_range.end_addr_inclusive()));
-+                assert!(!second_range.contains(first_range.start_addr()));
-+                assert!(!second_range.contains(first_range.end_addr_inclusive()));
++                assert!(!first_range.overlaps(second_range))
              }
          }
      }
@@ -1760,61 +1766,86 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
 --- 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
 +++ 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
-@@ -3,9 +3,40 @@
- // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
-
- //! BSP Memory Management.
+@@ -10,27 +10,59 @@
+ //! as the boot core's stack.
+ //!
+ //! +---------------------------------------+
+-//! |                                       | 0x0
++//! |                                       | boot_core_stack_start @ 0x0
+ //! |                                       |                                ^
+ //! | Boot-core Stack                       |                                | stack
+ //! |                                       |                                | growth
+ //! |                                       |                                | direction
+ //! +---------------------------------------+
+-//! |                                       | code_start @ 0x8_0000
++//! |                                       | code_start @ 0x8_0000 == boot_core_stack_end_exclusive
+ //! | .text                                 |
+ //! | .rodata                               |
+ //! | .got                                  |
+ //! |                                       |
+ //! +---------------------------------------+
+-//! |                                       | code_end_exclusive
++//! |                                       | data_start == code_end_exclusive
+ //! | .data                                 |
+ //! | .bss                                  |
+ //! |                                       |
+ //! +---------------------------------------+
++//! |                                       | data_end_exclusive
+ //! |                                       |
 +//!
-+//! The physical memory layout after the kernel has been loaded by the Raspberry's firmware, which
-+//! copies the binary to 0x8_0000:
 +//!
-+//! +---------------------------------------------+
-+//! |                                             |
-+//! | Unmapped                                    |
-+//! |                                             |
-+//! +---------------------------------------------+
-+//! |                                             | rx_start @ 0x8_0000
-+//! | .text                                       |
-+//! | .rodata                                     |
-+//! | .got                                        |
-+//! |                                             | rx_end_inclusive
-+//! +---------------------------------------------+
-+//! |                                             | rw_start == rx_end
-+//! | .data                                       |
-+//! | .bss                                        |
-+//! |                                             | rw_end_inclusive
-+//! +---------------------------------------------+
-+//! |                                             | rw_end
-+//! | Unmapped Boot-core Stack Guard Page         |
-+//! |                                             |
-+//! +---------------------------------------------+
-+//! |                                             | boot_core_stack_start          ^
-+//! |                                             |                                | stack
-+//! | Boot-core Stack                             |                                | growth
-+//! |                                             |                                | direction
-+//! |                                             | boot_core_stack_end_inclusive  |
-+//! +---------------------------------------------+
-
++//!
++//!
++//!
++//! The virtual memory layout is as follows:
++//!
++//! +---------------------------------------+
++//! |                                       | boot_core_stack_start @ 0x0
++//! |                                       |                                ^
++//! | Boot-core Stack                       |                                | stack
++//! |                                       |                                | growth
++//! |                                       |                                | direction
++//! +---------------------------------------+
++//! |                                       | code_start @ 0x8_0000 == boot_core_stack_end_exclusive
++//! | .text                                 |
++//! | .rodata                               |
++//! | .got                                  |
++//! |                                       |
++//! +---------------------------------------+
++//! |                                       | data_start == code_end_exclusive
++//! | .data                                 |
++//! | .bss                                  |
++//! |                                       |
++//! +---------------------------------------+
++//! |                                       |  mmio_remap_start == data_end_exclusive
++//! | VA region for MMIO remapping          |
++//! |                                       |
++//! +---------------------------------------+
++//! |                                       |  mmio_remap_end_exclusive
+ //! |                                       |
  pub mod mmu;
 
-+use crate::memory::{Address, Physical, Virtual};
++use crate::memory::{mmu::PageAddress, Address, Physical, Virtual};
  use core::cell::UnsafeCell;
 
  //--------------------------------------------------------------------------------------------------
-@@ -16,6 +47,12 @@
+@@ -41,6 +73,15 @@
  extern "Rust" {
-     static __rx_start: UnsafeCell<()>;
-     static __rx_end_exclusive: UnsafeCell<()>;
+     static __code_start: UnsafeCell<()>;
+     static __code_end_exclusive: UnsafeCell<()>;
++
++    static __data_start: UnsafeCell<()>;
++    static __data_end_exclusive: UnsafeCell<()>;
 +
-+    static __rw_start: UnsafeCell<()>;
-+    static __rw_end_exclusive: UnsafeCell<()>;
++    static __mmio_remap_start: UnsafeCell<()>;
++    static __mmio_remap_end_exclusive: UnsafeCell<()>;
 +
 +    static __boot_core_stack_start: UnsafeCell<()>;
 +    static __boot_core_stack_end_exclusive: UnsafeCell<()>;
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -25,35 +62,26 @@
+@@ -50,35 +91,26 @@
  /// The board's physical memory map.
  #[rustfmt::skip]
  pub(super) mod map {
@@ -1864,7 +1895,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 14_v
      }
 
      /// Physical devices.
-@@ -61,13 +89,22 @@
+@@ -86,13 +118,22 @@
      pub mod mmio {
          use super::*;
 
@@ -1893,49 +1924,69 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 14_v
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -80,16 +117,52 @@
+@@ -105,15 +146,76 @@
  ///
  /// - Value is provided by the linker script and must be trusted as-is.
  #[inline(always)]
--fn rx_start() -> usize {
--    unsafe { __rx_start.get() as usize }
-+fn virt_rx_start() -> Address<Virtual> {
-+    Address::new(unsafe { __rx_start.get() as usize })
+-fn code_start() -> usize {
+-    unsafe { __code_start.get() as usize }
++fn virt_code_start() -> PageAddress<Virtual> {
++    PageAddress::from(unsafe { __code_start.get() as usize })
 +}
 +
-+/// Size of the Read+Execute (RX) range.
++/// Size of the code segment.
 +///
 +/// # Safety
 +///
 +/// - Value is provided by the linker script and must be trusted as-is.
 +#[inline(always)]
-+fn rx_size() -> usize {
-+    unsafe { (__rx_end_exclusive.get() as usize) - (__rx_start.get() as usize) }
-+}
-+
-+/// Start address of the Read+Write (RW) range.
-+#[inline(always)]
-+fn virt_rw_start() -> Address<Virtual> {
-+    Address::new(unsafe { __rw_start.get() as usize })
++fn code_size() -> usize {
++    unsafe { (__code_end_exclusive.get() as usize) - (__code_start.get() as usize) }
  }
 
--/// Exclusive end address of the Read+Execute (RX) range.
-+/// Size of the Read+Write (RW) range.
- ///
+-/// Exclusive end page address of the code segment.
++/// Start page address of the data segment.
++#[inline(always)]
++fn virt_data_start() -> PageAddress<Virtual> {
++    PageAddress::from(unsafe { __data_start.get() as usize })
++}
++
++/// Size of the data segment.
++///
  /// # Safety
  ///
  /// - Value is provided by the linker script and must be trusted as-is.
  #[inline(always)]
--fn rx_end_exclusive() -> usize {
--    unsafe { __rx_end_exclusive.get() as usize }
-+fn rw_size() -> usize {
-+    unsafe { (__rw_end_exclusive.get() as usize) - (__rw_start.get() as usize) }
+-fn code_end_exclusive() -> usize {
+-    unsafe { __code_end_exclusive.get() as usize }
++fn data_size() -> usize {
++    unsafe { (__data_end_exclusive.get() as usize) - (__data_start.get() as usize) }
++}
++
++/// Start page address of the MMIO remap reservation.
++///
++/// # Safety
++///
++/// - Value is provided by the linker script and must be trusted as-is.
++#[inline(always)]
++fn virt_mmio_remap_start() -> PageAddress<Virtual> {
++    PageAddress::from(unsafe { __mmio_remap_start.get() as usize })
++}
++
++/// Size of the MMIO remap reservation.
++///
++/// # Safety
++///
++/// - Value is provided by the linker script and must be trusted as-is.
++#[inline(always)]
++fn mmio_remap_size() -> usize {
++    unsafe { (__mmio_remap_end_exclusive.get() as usize) - (__mmio_remap_start.get() as usize) }
 +}
 +
-+/// Start address of the boot core's stack.
++/// Start page address of the boot core's stack.
 +#[inline(always)]
-+fn virt_boot_core_stack_start() -> Address<Virtual> {
-+    Address::new(unsafe { __boot_core_stack_start.get() as usize })
++fn virt_boot_core_stack_start() -> PageAddress<Virtual> {
++    PageAddress::from(unsafe { __boot_core_stack_start.get() as usize })
 +}
 +
 +/// Size of the boot core's stack.
@@ -1946,10 +1997,14 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 14_v
 +    }
 +}
 +
++//--------------------------------------------------------------------------------------------------
++// Public Code
++//--------------------------------------------------------------------------------------------------
++
 +/// Exclusive end address of the physical address space.
 +#[inline(always)]
-+fn phys_addr_space_end() -> Address<Physical> {
-+    map::END
++pub fn phys_addr_space_end_exclusive_addr() -> PageAddress<Physical> {
++    PageAddress::from(map::END)
  }
 
 diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi.rs 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi.rs
@@ -2004,7 +2059,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi.rs 14_virtual_
 diff -uNr 13_exceptions_part2_peripheral_IRQs/src/common.rs 14_virtual_mem_part2_mmio_remap/src/common.rs
 --- 13_exceptions_part2_peripheral_IRQs/src/common.rs
 +++ 14_virtual_mem_part2_mmio_remap/src/common.rs
-@@ -0,0 +1,21 @@
+@@ -0,0 +1,29 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -2026,6 +2081,14 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/common.rs 14_virtual_mem_part2
 +
 +    value & !(alignment - 1)
 +}
++
++/// Align up.
++#[inline(always)]
++pub const fn align_up(value: usize, alignment: usize) -> usize {
++    assert!(alignment.is_power_of_two());
++
++    (value + alignment - 1) & !(alignment - 1)
++}
 
 diff -uNr 13_exceptions_part2_peripheral_IRQs/src/driver.rs 14_virtual_mem_part2_mmio_remap/src/driver.rs
 --- 13_exceptions_part2_peripheral_IRQs/src/driver.rs
@@ -2074,7 +2137,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/driver.rs 14_virtual_mem_part2
 diff -uNr 13_exceptions_part2_peripheral_IRQs/src/lib.rs 14_virtual_mem_part2_mmio_remap/src/lib.rs
 --- 13_exceptions_part2_peripheral_IRQs/src/lib.rs
 +++ 14_virtual_mem_part2_mmio_remap/src/lib.rs
-@@ -113,6 +113,7 @@
+@@ -113,9 +113,11 @@
  #![feature(const_fn_trait_bound)]
  #![feature(core_intrinsics)]
  #![feature(format_args_nl)]
@@ -2082,7 +2145,11 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/lib.rs 14_virtual_mem_part2_mm
  #![feature(global_asm)]
  #![feature(linkage)]
  #![feature(panic_info_message)]
-@@ -128,6 +129,7 @@
++#![feature(step_trait)]
+ #![feature(trait_alias)]
+ #![no_std]
+ // Testing
+@@ -128,6 +130,7 @@
  mod synchronization;
 
  pub mod bsp;
@@ -2090,11 +2157,19 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/lib.rs 14_virtual_mem_part2_mm
  pub mod console;
  pub mod cpu;
  pub mod driver;
+@@ -180,6 +183,7 @@
+ #[no_mangle]
+ unsafe fn kernel_init() -> ! {
+     exception::handling_init();
++    memory::mmu::post_enable_init();
+     bsp::console::qemu_bring_up_console();
+
+     test_main();
 
 diff -uNr 13_exceptions_part2_peripheral_IRQs/src/main.rs 14_virtual_mem_part2_mmio_remap/src/main.rs
 --- 13_exceptions_part2_peripheral_IRQs/src/main.rs
 +++ 14_virtual_mem_part2_mmio_remap/src/main.rs
-@@ -25,21 +25,39 @@
+@@ -25,21 +25,41 @@
  #[no_mangle]
  unsafe fn kernel_init() -> ! {
      use driver::interface::DriverManager;
@@ -2114,6 +2189,8 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/main.rs 14_virtual_mem_part2_m
 +    }
 +    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
 +
++    memory::mmu::post_enable_init();
++
 +    // Bring up the drivers needed for printing first.
 +    for i in bsp::driver::driver_manager()
 +        .early_print_device_drivers()
@@ -2140,7 +2217,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/main.rs 14_virtual_mem_part2_m
 
      // Let device drivers register and enable their handlers with the interrupt controller.
      for i in bsp::driver::driver_manager().all_device_drivers() {
-@@ -66,8 +84,8 @@
+@@ -66,8 +86,8 @@
      info!("{}", libkernel::version());
      info!("Booting on: {}", bsp::board_name());
 
@@ -2152,10 +2229,85 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/main.rs 14_virtual_mem_part2_m
      let (_, privilege_level) = exception::current_privilege_level();
      info!("Current privilege level: {}", privilege_level);
 
+diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/alloc.rs 14_virtual_mem_part2_mmio_remap/src/memory/mmu/alloc.rs
+--- 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/alloc.rs
++++ 14_virtual_mem_part2_mmio_remap/src/memory/mmu/alloc.rs
+@@ -0,0 +1,70 @@
++// SPDX-License-Identifier: MIT OR Apache-2.0
++//
++// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
++
++//! Allocation.
++
++use super::MemoryRegion;
++use crate::{
++    memory::{AddressType, Virtual},
++    synchronization::IRQSafeNullLock,
++    warn,
++};
++use core::num::NonZeroUsize;
++
++//--------------------------------------------------------------------------------------------------
++// Public Definitions
++//--------------------------------------------------------------------------------------------------
++
++/// A page allocator that can be lazyily initialized.
++pub struct PageAllocator<ATYPE: AddressType> {
++    pool: Option<MemoryRegion<ATYPE>>,
++}
++
++//--------------------------------------------------------------------------------------------------
++// Global instances
++//--------------------------------------------------------------------------------------------------
++
++static KERNEL_MMIO_VA_ALLOCATOR: IRQSafeNullLock<PageAllocator<Virtual>> =
++    IRQSafeNullLock::new(PageAllocator::new());
++
++//--------------------------------------------------------------------------------------------------
++// Public Code
++//--------------------------------------------------------------------------------------------------
++
++/// Return a reference to the kernel's MMIO virtual address allocator.
++pub fn kernel_mmio_va_allocator() -> &'static IRQSafeNullLock<PageAllocator<Virtual>> {
++    &KERNEL_MMIO_VA_ALLOCATOR
++}
++
++impl<ATYPE: AddressType> PageAllocator<ATYPE> {
++    /// Create an instance.
++    pub const fn new() -> Self {
++        Self { pool: None }
++    }
++
++    /// Initialize the allocator.
++    pub fn initialize(&mut self, pool: MemoryRegion<ATYPE>) {
++        if self.pool.is_some() {
++            warn!("Already initialized");
++            return;
++        }
++
++        self.pool = Some(pool);
++    }
++
++    /// Allocate a number of pages.
++    pub fn alloc(
++        &mut self,
++        num_requested_pages: NonZeroUsize,
++    ) -> Result<MemoryRegion<ATYPE>, &'static str> {
++        if self.pool.is_none() {
++            return Err("Allocator not initialized");
++        }
++
++        self.pool
++            .as_mut()
++            .unwrap()
++            .take_first_n_pages(num_requested_pages)
++    }
++}
+
 diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/mapping_record.rs 14_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs
 --- 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/mapping_record.rs
 +++ 14_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs
-@@ -0,0 +1,216 @@
+@@ -0,0 +1,233 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -2163,10 +2315,10 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/mapping_record.rs 1
 +//! A record of mapped pages.
 +
 +use super::{
-+    AccessPermissions, Address, AttributeFields, MMIODescriptor, MemAttributes,
-+    PageSliceDescriptor, Physical, Virtual,
++    AccessPermissions, Address, AttributeFields, MMIODescriptor, MemAttributes, MemoryRegion,
++    Physical, Virtual,
 +};
-+use crate::{info, synchronization, synchronization::InitStateLock, warn};
++use crate::{bsp, info, synchronization, synchronization::InitStateLock, warn};
 +
 +//--------------------------------------------------------------------------------------------------
 +// Private Definitions
@@ -2177,8 +2329,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/mapping_record.rs 1
 +#[derive(Copy, Clone)]
 +struct MappingRecordEntry {
 +    pub users: [Option<&'static str>; 5],
-+    pub phys_pages: PageSliceDescriptor<Physical>,
++    pub phys_start_addr: Address<Physical>,
 +    pub virt_start_addr: Address<Virtual>,
++    pub num_pages: usize,
 +    pub attribute_fields: AttributeFields,
 +}
 +
@@ -2200,14 +2353,15 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/mapping_record.rs 1
 +impl MappingRecordEntry {
 +    pub fn new(
 +        name: &'static str,
-+        virt_pages: &PageSliceDescriptor<Virtual>,
-+        phys_pages: &PageSliceDescriptor<Physical>,
++        virt_region: &MemoryRegion<Virtual>,
++        phys_region: &MemoryRegion<Physical>,
 +        attr: &AttributeFields,
 +    ) -> Self {
 +        Self {
 +            users: [Some(name), None, None, None, None],
-+            phys_pages: *phys_pages,
-+            virt_start_addr: virt_pages.start_addr(),
++            phys_start_addr: phys_region.start_addr(),
++            virt_start_addr: virt_region.start_addr(),
++            num_pages: phys_region.num_pages(),
 +            attribute_fields: *attr,
 +        }
 +    }
@@ -2242,26 +2396,41 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/mapping_record.rs 1
 +
 +    fn find_duplicate(
 +        &mut self,
-+        phys_pages: &PageSliceDescriptor<Physical>,
++        phys_region: &MemoryRegion<Physical>,
 +    ) -> Option<&mut MappingRecordEntry> {
 +        self.inner
 +            .iter_mut()
 +            .filter(|x| x.is_some())
 +            .map(|x| x.as_mut().unwrap())
 +            .filter(|x| x.attribute_fields.mem_attributes == MemAttributes::Device)
-+            .find(|x| x.phys_pages == *phys_pages)
-+    }
++            .find(|x| {
++                if x.phys_start_addr != phys_region.start_addr() {
++                    return false;
++                }
++
++                if x.num_pages != phys_region.num_pages() {
++                    return false;
++                }
++
++                true
++            })
++    }
 +
 +    pub fn add(
 +        &mut self,
 +        name: &'static str,
-+        virt_pages: &PageSliceDescriptor<Virtual>,
-+        phys_pages: &PageSliceDescriptor<Physical>,
++        virt_region: &MemoryRegion<Virtual>,
++        phys_region: &MemoryRegion<Physical>,
 +        attr: &AttributeFields,
 +    ) -> Result<(), &'static str> {
 +        let x = self.find_next_free()?;
 +
-+        *x = Some(MappingRecordEntry::new(name, virt_pages, phys_pages, attr));
++        *x = Some(MappingRecordEntry::new(
++            name,
++            virt_region,
++            phys_region,
++            attr,
++        ));
 +        Ok(())
 +    }
 +
@@ -2277,11 +2446,11 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/mapping_record.rs 1
 +        info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
 +
 +        for i in self.inner.iter().flatten() {
++            let size = i.num_pages * bsp::memory::mmu::KernelGranule::SIZE;
 +            let virt_start = i.virt_start_addr;
-+            let virt_end_inclusive = virt_start + i.phys_pages.size() - 1;
-+            let phys_start = i.phys_pages.start_addr();
-+            let phys_end_inclusive = i.phys_pages.end_addr_inclusive();
-+            let size = i.phys_pages.size();
++            let virt_end_inclusive = virt_start + (size - 1);
++            let phys_start = i.phys_start_addr;
++            let phys_end_inclusive = phys_start + (size - 1);
 +
 +            let (size, unit) = if (size >> MIB_RSHIFT) > 0 {
 +                (size >> MIB_RSHIFT, "MiB")
@@ -2344,21 +2513,21 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/mapping_record.rs 1
 +/// Add an entry to the mapping info record.
 +pub fn kernel_add(
 +    name: &'static str,
-+    virt_pages: &PageSliceDescriptor<Virtual>,
-+    phys_pages: &PageSliceDescriptor<Physical>,
++    virt_region: &MemoryRegion<Virtual>,
++    phys_region: &MemoryRegion<Physical>,
 +    attr: &AttributeFields,
 +) -> Result<(), &'static str> {
-+    KERNEL_MAPPING_RECORD.write(|mr| mr.add(name, virt_pages, phys_pages, attr))
++    KERNEL_MAPPING_RECORD.write(|mr| mr.add(name, virt_region, phys_region, attr))
 +}
 +
 +pub fn kernel_find_and_insert_mmio_duplicate(
 +    mmio_descriptor: &MMIODescriptor,
 +    new_user: &'static str,
 +) -> Option<Address<Virtual>> {
-+    let phys_pages: PageSliceDescriptor<Physical> = (*mmio_descriptor).into();
++    let phys_region: MemoryRegion<Physical> = (*mmio_descriptor).into();
 +
 +    KERNEL_MAPPING_RECORD.write(|mr| {
-+        let dup = mr.find_duplicate(&phys_pages)?;
++        let dup = mr.find_duplicate(&phys_region)?;
 +
 +        if let Err(x) = dup.add_user(new_user) {
 +            warn!("{}", x);
@@ -2376,14 +2545,12 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/mapping_record.rs 1
 diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.rs 14_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs
 --- 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.rs
 +++ 14_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs
-@@ -8,7 +8,105 @@
+@@ -8,7 +8,91 @@
  #[path = "../../_arch/aarch64/memory/mmu/translation_table.rs"]
  mod arch_translation_table;
 
-+use crate::memory::{
-+    mmu::{AttributeFields, PageSliceDescriptor},
-+    Address, Physical, Virtual,
-+};
++use super::{AttributeFields, MemoryRegion};
++use crate::memory::{Address, Physical, Virtual};
 +
  //--------------------------------------------------------------------------------------------------
  // Architectural Public Reexports
@@ -2413,7 +2580,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.r
 +        /// The translation table's base address to be used for programming the MMU.
 +        fn phys_base_address(&self) -> Address<Physical>;
 +
-+        /// Map the given virtual pages to the given physical pages.
++        /// Map the given virtual memory region to the given physical memory region.
 +        ///
 +        /// # Safety
 +        ///
@@ -2422,27 +2589,12 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.r
 +        ///   mapping to the same physical memory using multiple virtual addresses, which would
 +        ///   break Rust's ownership assumptions. This should be protected against in the kernel's
 +        ///   generic MMU code.
-+        unsafe fn map_pages_at(
++        unsafe fn map_at(
 +            &mut self,
-+            virt_pages: &PageSliceDescriptor<Virtual>,
-+            phys_pages: &PageSliceDescriptor<Physical>,
++            virt_region: &MemoryRegion<Virtual>,
++            phys_region: &MemoryRegion<Physical>,
 +            attr: &AttributeFields,
 +        ) -> Result<(), &'static str>;
-+
-+        /// Obtain a free virtual page slice in the MMIO region.
-+        ///
-+        /// The "MMIO region" is a distinct region of the implementor's choice, which allows
-+        /// differentiating MMIO addresses from others. This can speed up debugging efforts.
-+        /// Ideally, those MMIO addresses are also standing out visually so that a human eye can
-+        /// identify them. For example, by allocating them from near the end of the virtual address
-+        /// space.
-+        fn next_mmio_virt_page_slice(
-+            &mut self,
-+            num_pages: usize,
-+        ) -> Result<PageSliceDescriptor<Virtual>, &'static str>;
-+
-+        /// Check if a virtual page splice is in the "MMIO region".
-+        fn is_virt_page_slice_mmio(&self, virt_pages: &PageSliceDescriptor<Virtual>) -> bool;
 +    }
 +}
 +
@@ -2453,7 +2605,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.r
 +#[cfg(test)]
 +mod tests {
 +    use super::*;
-+    use crate::bsp;
++    use crate::memory::mmu::{AccessPermissions, MemAttributes, PageAddress};
 +    use arch_translation_table::MinSizeTranslationTable;
 +    use interface::TranslationTable;
 +    use test_macros::kernel_test;
@@ -2466,28 +2618,31 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.r
 +
 +        tables.init();
 +
-+        let x = tables.next_mmio_virt_page_slice(0);
-+        assert!(x.is_err());
++        let virt_start_page_addr: PageAddress<Virtual> = PageAddress::from(0);
++        let virt_end_exclusive_page_addr: PageAddress<Virtual> =
++            virt_start_page_addr.checked_offset(5).unwrap();
 +
-+        let x = tables.next_mmio_virt_page_slice(1_0000_0000);
-+        assert!(x.is_err());
++        let phys_start_page_addr: PageAddress<Physical> = PageAddress::from(0);
++        let phys_end_exclusive_page_addr: PageAddress<Physical> =
++            phys_start_page_addr.checked_offset(5).unwrap();
 +
-+        let x = tables.next_mmio_virt_page_slice(2).unwrap();
-+        assert_eq!(x.size(), bsp::memory::mmu::KernelGranule::SIZE * 2);
++        let virt_region = MemoryRegion::new(virt_start_page_addr, virt_end_exclusive_page_addr);
++        let phys_region = MemoryRegion::new(phys_start_page_addr, phys_end_exclusive_page_addr);
 +
-+        assert_eq!(tables.is_virt_page_slice_mmio(&x), true);
++        let attr = AttributeFields {
++            mem_attributes: MemAttributes::CacheableDRAM,
++            acc_perms: AccessPermissions::ReadWrite,
++            execute_never: true,
++        };
 +
-+        assert_eq!(
-+            tables.is_virt_page_slice_mmio(&PageSliceDescriptor::from_addr(Address::new(0), 1)),
-+            false
-+        );
++        unsafe { assert_eq!(tables.map_at(&virt_region, &phys_region, &attr), Ok(())) };
 +    }
 +}
 
 diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
 --- 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs
 +++ 14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
-@@ -0,0 +1,201 @@
+@@ -0,0 +1,373 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -2498,29 +2653,28 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 14_virtual
 +    bsp, common,
 +    memory::{Address, AddressType, Physical},
 +};
-+use core::{convert::From, marker::PhantomData};
++use core::{convert::From, iter::Step, num::NonZeroUsize, ops::Range};
 +
 +//--------------------------------------------------------------------------------------------------
 +// Public Definitions
 +//--------------------------------------------------------------------------------------------------
 +
-+/// Generic page type.
-+#[repr(C)]
-+pub struct Page<ATYPE: AddressType> {
-+    inner: [u8; bsp::memory::mmu::KernelGranule::SIZE],
-+    _address_type: PhantomData<ATYPE>,
++/// A wrapper type around [Address] that ensures page alignment.
++#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
++pub struct PageAddress<ATYPE: AddressType> {
++    inner: Address<ATYPE>,
 +}
 +
-+/// Type describing a slice of pages.
-+#[derive(Copy, Clone, PartialOrd, PartialEq)]
-+pub struct PageSliceDescriptor<ATYPE: AddressType> {
-+    start: Address<ATYPE>,
-+    num_pages: usize,
++/// A type that describes a region of memory in quantities of pages.
++#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
++pub struct MemoryRegion<ATYPE: AddressType> {
++    start: PageAddress<ATYPE>,
++    end_exclusive: PageAddress<ATYPE>,
 +}
 +
 +/// Architecture agnostic memory attributes.
 +#[allow(missing_docs)]
-+#[derive(Copy, Clone, PartialOrd, PartialEq)]
++#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
 +pub enum MemAttributes {
 +    CacheableDRAM,
 +    Device,
@@ -2528,7 +2682,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 14_virtual
 +
 +/// Architecture agnostic access permissions.
 +#[allow(missing_docs)]
-+#[derive(Copy, Clone)]
++#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
 +pub enum AccessPermissions {
 +    ReadOnly,
 +    ReadWrite,
@@ -2536,7 +2690,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 14_virtual
 +
 +/// Collection of memory attributes.
 +#[allow(missing_docs)]
-+#[derive(Copy, Clone)]
++#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
 +pub struct AttributeFields {
 +    pub mem_attributes: MemAttributes,
 +    pub acc_perms: AccessPermissions,
@@ -2547,7 +2701,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 14_virtual
 +#[derive(Copy, Clone)]
 +pub struct MMIODescriptor {
 +    start_addr: Address<Physical>,
-+    size: usize,
++    end_addr_exclusive: Address<Physical>,
 +}
 +
 +//--------------------------------------------------------------------------------------------------
@@ -2555,90 +2709,202 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 14_virtual
 +//--------------------------------------------------------------------------------------------------
 +
 +//------------------------------------------------------------------------------
-+// Page
++// PageAddress
 +//------------------------------------------------------------------------------
++impl<ATYPE: AddressType> PageAddress<ATYPE> {
++    /// Unwraps the value.
++    pub fn into_inner(self) -> Address<ATYPE> {
++        self.inner
++    }
 +
-+impl<ATYPE: AddressType> Page<ATYPE> {
-+    /// Get a pointer to the instance.
-+    pub const fn as_ptr(&self) -> *const Page<ATYPE> {
-+        self as *const _
++    /// Calculates the offset from the page address.
++    ///
++    /// `count` is in units of [PageAddress]. For example, a count of 2 means `result = self + 2 *
++    /// page_size`.
++    pub fn checked_offset(self, count: isize) -> Option<Self> {
++        if count == 0 {
++            return Some(self);
++        }
++
++        let delta = (count.abs() as usize).checked_mul(bsp::memory::mmu::KernelGranule::SIZE)?;
++        let result = if count.is_positive() {
++            self.inner.as_usize().checked_add(delta)?
++        } else {
++            self.inner.as_usize().checked_sub(delta)?
++        };
++
++        Some(Self {
++            inner: Address::new(result),
++        })
 +    }
 +}
 +
-+//------------------------------------------------------------------------------
-+// PageSliceDescriptor
-+//------------------------------------------------------------------------------
++impl<ATYPE: AddressType> From<usize> for PageAddress<ATYPE> {
++    fn from(addr: usize) -> Self {
++        assert!(
++            common::is_aligned(addr, bsp::memory::mmu::KernelGranule::SIZE),
++            "Input usize not page aligned"
++        );
 +
-+impl<ATYPE: AddressType> PageSliceDescriptor<ATYPE> {
-+    /// Create an instance.
-+    pub const fn from_addr(start: Address<ATYPE>, num_pages: usize) -> Self {
-+        assert!(common::is_aligned(
-+            start.into_usize(),
-+            bsp::memory::mmu::KernelGranule::SIZE
-+        ));
-+        assert!(num_pages > 0);
++        Self {
++            inner: Address::new(addr),
++        }
++    }
++}
 +
-+        Self { start, num_pages }
++impl<ATYPE: AddressType> From<Address<ATYPE>> for PageAddress<ATYPE> {
++    fn from(addr: Address<ATYPE>) -> Self {
++        assert!(addr.is_page_aligned(), "Input Address not page aligned");
++
++        Self { inner: addr }
 +    }
++}
++
++impl<ATYPE: AddressType> Step for PageAddress<ATYPE> {
++    fn steps_between(start: &Self, end: &Self) -> Option<usize> {
++        if start > end {
++            return None;
++        }
 +
-+    /// Return a pointer to the first page of the described slice.
-+    const fn first_page_ptr(&self) -> *const Page<ATYPE> {
-+        self.start.into_usize() as *const _
++        // Since start <= end, do unchecked arithmetic.
++        Some(
++            (end.inner.as_usize() - start.inner.as_usize())
++                >> bsp::memory::mmu::KernelGranule::SHIFT,
++        )
 +    }
 +
-+    /// Return the number of pages the slice describes.
-+    pub const fn num_pages(&self) -> usize {
-+        self.num_pages
++    fn forward_checked(start: Self, count: usize) -> Option<Self> {
++        start.checked_offset(count as isize)
 +    }
 +
-+    /// Return the memory size this descriptor spans.
-+    pub const fn size(&self) -> usize {
-+        self.num_pages * bsp::memory::mmu::KernelGranule::SIZE
++    fn backward_checked(start: Self, count: usize) -> Option<Self> {
++        start.checked_offset(-(count as isize))
 +    }
++}
 +
-+    /// Return the start address.
-+    pub const fn start_addr(&self) -> Address<ATYPE> {
++//------------------------------------------------------------------------------
++// MemoryRegion
++//------------------------------------------------------------------------------
++impl<ATYPE: AddressType> MemoryRegion<ATYPE> {
++    /// Create an instance.
++    pub fn new(start: PageAddress<ATYPE>, end_exclusive: PageAddress<ATYPE>) -> Self {
++        assert!(start <= end_exclusive);
++
++        Self {
++            start,
++            end_exclusive,
++        }
++    }
++
++    fn as_range(&self) -> Range<PageAddress<ATYPE>> {
++        self.into_iter()
++    }
++
++    /// Returns the start page address.
++    pub fn start_page_addr(&self) -> PageAddress<ATYPE> {
 +        self.start
 +    }
 +
-+    /// Return the exclusive end address.
-+    pub fn end_addr(&self) -> Address<ATYPE> {
-+        self.start + self.size()
++    /// Returns the start address.
++    pub fn start_addr(&self) -> Address<ATYPE> {
++        self.start.into_inner()
++    }
++
++    /// Returns the exclusive end page address.
++    pub fn end_exclusive_page_addr(&self) -> PageAddress<ATYPE> {
++        self.end_exclusive
 +    }
 +
-+    /// Return the inclusive end address.
-+    pub fn end_addr_inclusive(&self) -> Address<ATYPE> {
-+        self.start + (self.size() - 1)
++    /// Returns the exclusive end page address.
++    pub fn end_inclusive_page_addr(&self) -> PageAddress<ATYPE> {
++        self.end_exclusive.checked_offset(-1).unwrap()
 +    }
 +
-+    /// Check if an address is contained within this descriptor.
++    /// Checks if self contains an address.
 +    pub fn contains(&self, addr: Address<ATYPE>) -> bool {
-+        (addr >= self.start_addr()) && (addr <= self.end_addr_inclusive())
++        let page_addr = PageAddress::from(addr.align_down_page());
++        self.as_range().contains(&page_addr)
++    }
++
++    /// Checks if there is an overlap with another memory region.
++    pub fn overlaps(&self, other_region: &Self) -> bool {
++        let self_range = self.as_range();
++
++        self_range.contains(&other_region.start_page_addr())
++            || self_range.contains(&other_region.end_inclusive_page_addr())
++    }
++
++    /// Returns the number of pages contained in this region.
++    pub fn num_pages(&self) -> usize {
++        PageAddress::steps_between(&self.start, &self.end_exclusive).unwrap()
 +    }
 +
-+    /// Return a non-mutable slice of pages.
++    /// Returns the size in bytes of this region.
++    pub fn size(&self) -> usize {
++        // Invariant: start <= end_exclusive, so do unchecked arithmetic.
++        let end_exclusive = self.end_exclusive.into_inner().as_usize();
++        let start = self.start.into_inner().as_usize();
++
++        end_exclusive - start
++    }
++
++    /// Splits the MemoryRegion like:
 +    ///
-+    /// # Safety
++    /// --------------------------------------------------------------------------------
++    /// |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |
++    /// --------------------------------------------------------------------------------
++    ///   ^                               ^                                       ^
++    ///   |                               |                                       |
++    ///   left_start     left_end_exclusive                                       |
++    ///                                                                           |
++    ///                                   ^                                       |
++    ///                                   |                                       |
++    ///                                   right_start           right_end_exclusive
 +    ///
-+    /// - Same as applies for `core::slice::from_raw_parts`.
-+    pub unsafe fn as_slice(&self) -> &[Page<ATYPE>] {
-+        core::slice::from_raw_parts(self.first_page_ptr(), self.num_pages)
++    /// Left region is returned to the caller. Right region is the new region for this struct.
++    pub fn take_first_n_pages(&mut self, num_pages: NonZeroUsize) -> Result<Self, &'static str> {
++        let count: usize = num_pages.into();
++
++        let left_end_exclusive = self.start.checked_offset(count as isize);
++        let left_end_exclusive = match left_end_exclusive {
++            None => return Err("Overflow while calculating left_end_exclusive"),
++            Some(x) => x,
++        };
++
++        if left_end_exclusive > self.end_exclusive {
++            return Err("Not enough free pages");
++        }
++
++        let allocation = Self {
++            start: self.start,
++            end_exclusive: left_end_exclusive,
++        };
++        self.start = left_end_exclusive;
++
++        Ok(allocation)
 +    }
 +}
 +
-+impl From<MMIODescriptor> for PageSliceDescriptor<Physical> {
-+    fn from(desc: MMIODescriptor) -> Self {
-+        let start_page_addr = desc
-+            .start_addr
-+            .align_down(bsp::memory::mmu::KernelGranule::SIZE);
++impl<ATYPE: AddressType> IntoIterator for MemoryRegion<ATYPE> {
++    type Item = PageAddress<ATYPE>;
++    type IntoIter = Range<Self::Item>;
 +
-+        let len = ((desc.end_addr_inclusive().into_usize() - start_page_addr.into_usize())
-+            >> bsp::memory::mmu::KernelGranule::SHIFT)
-+            + 1;
++    fn into_iter(self) -> Self::IntoIter {
++        Range {
++            start: self.start,
++            end: self.end_exclusive,
++        }
++    }
++}
++
++impl From<MMIODescriptor> for MemoryRegion<Physical> {
++    fn from(desc: MMIODescriptor) -> Self {
++        let start = PageAddress::from(desc.start_addr.align_down_page());
++        let end_exclusive = PageAddress::from(desc.end_addr_exclusive().align_up_page());
 +
 +        Self {
-+            start: start_page_addr,
-+            num_pages: len,
++            start,
++            end_exclusive,
 +        }
 +    }
 +}
@@ -2651,8 +2917,12 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 14_virtual
 +    /// Create an instance.
 +    pub const fn new(start_addr: Address<Physical>, size: usize) -> Self {
 +        assert!(size > 0);
++        let end_addr_exclusive = Address::new(start_addr.as_usize() + size);
 +
-+        Self { start_addr, size }
++        Self {
++            start_addr,
++            end_addr_exclusive,
++        }
 +    }
 +
 +    /// Return the start address.
@@ -2660,14 +2930,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 14_virtual
 +        self.start_addr
 +    }
 +
-+    /// Return the inclusive end address.
-+    pub fn end_addr_inclusive(&self) -> Address<Physical> {
-+        self.start_addr + (self.size - 1)
-+    }
-+
-+    /// Return the size.
-+    pub const fn size(&self) -> usize {
-+        self.size
++    /// Return the exclusive end address.
++    pub fn end_addr_exclusive(&self) -> Address<Physical> {
++        self.end_addr_exclusive
 +    }
 +}
 +
@@ -2678,22 +2943,84 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 14_virtual
 +#[cfg(test)]
 +mod tests {
 +    use super::*;
++    use crate::memory::Virtual;
 +    use test_macros::kernel_test;
 +
-+    /// Check if the size of `struct Page` is as expected.
++    /// Sanity of [PageAddress] methods.
 +    #[kernel_test]
-+    fn size_of_page_equals_granule_size() {
++    fn pageaddress_type_method_sanity() {
++        let page_addr: PageAddress<Virtual> =
++            PageAddress::from(bsp::memory::mmu::KernelGranule::SIZE * 2);
++
 +        assert_eq!(
-+            core::mem::size_of::<Page<Physical>>(),
-+            bsp::memory::mmu::KernelGranule::SIZE
++            page_addr.checked_offset(-2),
++            Some(PageAddress::<Virtual>::from(0))
++        );
++
++        assert_eq!(
++            page_addr.checked_offset(2),
++            Some(PageAddress::<Virtual>::from(
++                bsp::memory::mmu::KernelGranule::SIZE * 4
++            ))
++        );
++
++        assert_eq!(
++            PageAddress::<Virtual>::from(0).checked_offset(0),
++            Some(PageAddress::<Virtual>::from(0))
++        );
++        assert_eq!(PageAddress::<Virtual>::from(0).checked_offset(-1), None);
++
++        let max_page_addr = Address::<Virtual>::new(usize::MAX).align_down_page();
++        assert_eq!(
++            PageAddress::<Virtual>::from(max_page_addr).checked_offset(1),
++            None
 +        );
++
++        let zero = PageAddress::<Virtual>::from(0);
++        let three = PageAddress::<Virtual>::from(bsp::memory::mmu::KernelGranule::SIZE * 3);
++        assert_eq!(PageAddress::steps_between(&zero, &three), Some(3));
++    }
++
++    /// Sanity of [MemoryRegion] methods.
++    #[kernel_test]
++    fn memoryregion_type_method_sanity() {
++        let zero = PageAddress::<Virtual>::from(0);
++        let zero_region = MemoryRegion::new(zero, zero);
++        assert_eq!(zero_region.num_pages(), 0);
++        assert_eq!(zero_region.size(), 0);
++
++        let one = PageAddress::<Virtual>::from(bsp::memory::mmu::KernelGranule::SIZE);
++        let one_region = MemoryRegion::new(zero, one);
++        assert_eq!(one_region.num_pages(), 1);
++        assert_eq!(one_region.size(), bsp::memory::mmu::KernelGranule::SIZE);
++
++        let three = PageAddress::<Virtual>::from(bsp::memory::mmu::KernelGranule::SIZE * 3);
++        let mut three_region = MemoryRegion::new(zero, three);
++        assert!(three_region.contains(zero.into_inner()));
++        assert!(!three_region.contains(three.into_inner()));
++        assert!(three_region.overlaps(&one_region));
++
++        let allocation = three_region
++            .take_first_n_pages(NonZeroUsize::new(2).unwrap())
++            .unwrap();
++        assert_eq!(allocation.num_pages(), 2);
++        assert_eq!(three_region.num_pages(), 1);
++
++        let mut count = 0;
++        for i in allocation.into_iter() {
++            assert_eq!(
++                i.into_inner().as_usize(),
++                count * bsp::memory::mmu::KernelGranule::SIZE
++            );
++            count = count + 1;
++        }
 +    }
 +}
 
 diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
 --- 13_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs
 +++ 14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
-@@ -3,29 +3,23 @@
+@@ -3,29 +3,24 @@
  // Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
 
  //! Memory Management Unit.
@@ -2712,6 +3039,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 14_virtual_mem_p
  #[path = "../_arch/aarch64/memory/mmu.rs"]
  mod arch_mmu;
 
++mod alloc;
 +mod mapping_record;
  mod translation_table;
 +mod types;
@@ -2722,7 +3050,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 14_virtual_mem_p
 +    memory::{Address, Physical, Virtual},
 +    synchronization, warn,
 +};
-+use core::fmt;
++use core::{fmt, num::NonZeroUsize};
 
 -//--------------------------------------------------------------------------------------------------
 -// Architectural Public Reexports
@@ -2732,7 +3060,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 14_virtual_mem_p
 
  //--------------------------------------------------------------------------------------------------
  // Public Definitions
-@@ -45,13 +39,15 @@
+@@ -45,13 +40,15 @@
 
      /// MMU functions.
      pub trait MMU {
@@ -2751,7 +3079,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 14_virtual_mem_p
 
          /// Returns true if the MMU is enabled, false otherwise.
          fn is_enabled(&self) -> bool;
-@@ -64,55 +60,43 @@
+@@ -64,55 +61,51 @@
  /// Describes properties of an address space.
  pub struct AddressSpace<const AS_SIZE: usize>;
 
@@ -2806,31 +3134,39 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 14_virtual_mem_p
 +// Private Code
 +//--------------------------------------------------------------------------------------------------
 +use interface::MMU;
-+use synchronization::interface::ReadWriteEx;
++use synchronization::interface::*;
 +use translation_table::interface::TranslationTable;
 +
-+/// Map pages in the kernel's translation tables.
++/// Query the BSP for the reserved virtual addresses for MMIO remapping and initialize the kernel's
++/// MMIO VA allocator with it.
++fn kernel_init_mmio_va_allocator() {
++    let region = bsp::memory::mmu::virt_mmio_remap_region();
++
++    alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.initialize(region));
++}
++
++/// Map a region in the kernel's translation tables.
 +///
 +/// No input checks done, input is passed through to the architectural implementation.
 +///
 +/// # Safety
 +///
-+/// - See `map_pages_at()`.
++/// - See `map_at()`.
 +/// - Does not prevent aliasing.
-+unsafe fn kernel_map_pages_at_unchecked(
++unsafe fn kernel_map_at_unchecked(
 +    name: &'static str,
-+    virt_pages: &PageSliceDescriptor<Virtual>,
-+    phys_pages: &PageSliceDescriptor<Physical>,
++    virt_region: &MemoryRegion<Virtual>,
++    phys_region: &MemoryRegion<Physical>,
 +    attr: &AttributeFields,
 +) -> Result<(), &'static str> {
 +    bsp::memory::mmu::kernel_translation_tables()
-+        .write(|tables| tables.map_pages_at(virt_pages, phys_pages, attr))?;
++        .write(|tables| tables.map_at(virt_region, phys_region, attr))?;
 
 -/// Type for expressing the kernel's virtual memory layout.
 -pub struct KernelVirtualLayout<const NUM_SPECIAL_RANGES: usize> {
 -    /// The last (inclusive) address of the address space.
 -    max_virt_addr_inclusive: usize,
-+    if let Err(x) = mapping_record::kernel_add(name, virt_pages, phys_pages, attr) {
++    if let Err(x) = mapping_record::kernel_add(name, virt_region, phys_region, attr) {
 +        warn!("{}", x);
 +    }
 
@@ -2840,7 +3176,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 14_virtual_mem_p
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -132,6 +116,9 @@
+@@ -132,6 +125,9 @@
      /// The granule's size.
      pub const SIZE: usize = Self::size_checked();
 
@@ -2850,7 +3186,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 14_virtual_mem_p
      /// The granule's shift, aka log2(size).
      pub const SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
 
-@@ -159,110 +146,103 @@
+@@ -159,110 +155,147 @@
      }
  }
 
@@ -2861,9 +3197,25 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 14_virtual_mem_p
 -            acc_perms: AccessPermissions::ReadWrite,
 -            execute_never: true,
 -        }
--    }
++/// Raw mapping of a virtual to physical region in the kernel translation tables.
++///
++/// Prevents mapping into the MMIO range of the tables.
++///
++/// # Safety
++///
++/// - See `kernel_map_at_unchecked()`.
++/// - Does not prevent aliasing. Currently, the callers must be trusted.
++pub unsafe fn kernel_map_at(
++    name: &'static str,
++    virt_pages: &MemoryRegion<Virtual>,
++    phys_pages: &MemoryRegion<Physical>,
++    attr: &AttributeFields,
++) -> Result<(), &'static str> {
++    if bsp::memory::mmu::virt_mmio_remap_region().overlaps(virt_pages) {
++        return Err("Attempt to manually map into MMIO region");
+     }
 -}
--
+
 -/// Human-readable output of a TranslationDescriptor.
 -impl fmt::Display for TranslationDescriptor {
 -    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
@@ -2886,135 +3238,62 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 14_virtual_mem_p
 -        } else {
 -            (size, "Byte")
 -        };
--
++    kernel_map_at_unchecked(name, virt_pages, phys_pages, attr)?;
+
 -        let attr = match self.attribute_fields.mem_attributes {
 -            MemAttributes::CacheableDRAM => "C",
 -            MemAttributes::Device => "Dev",
 -        };
--
++    Ok(())
++}
+
 -        let acc_p = match self.attribute_fields.acc_perms {
 -            AccessPermissions::ReadOnly => "RO",
 -            AccessPermissions::ReadWrite => "RW",
--        };
--
--        let xn = if self.attribute_fields.execute_never {
--            "PXN"
--        } else {
--            "PX"
--        };
--
--        write!(
--            f,
--            "      {:#010x} - {:#010x} | {: >3} {} | {: <3} {} {: <3} | {}",
--            start, end, size, unit, attr, acc_p, xn, self.name
--        )
--    }
--}
--
--impl<const NUM_SPECIAL_RANGES: usize> KernelVirtualLayout<{ NUM_SPECIAL_RANGES }> {
--    /// Create a new instance.
--    pub const fn new(max: usize, layout: [TranslationDescriptor; NUM_SPECIAL_RANGES]) -> Self {
--        Self {
--            max_virt_addr_inclusive: max,
--            inner: layout,
--        }
--    }
--
--    /// For a virtual address, find and return the physical output address and corresponding
--    /// attributes.
--    ///
--    /// If the address is not found in `inner`, return an identity mapped default with normal
--    /// cacheable DRAM attributes.
--    pub fn virt_addr_properties(
--        &self,
--        virt_addr: usize,
--    ) -> Result<(usize, AttributeFields), &'static str> {
--        if virt_addr > self.max_virt_addr_inclusive {
--            return Err("Address out of range");
--        }
--
--        for i in self.inner.iter() {
--            if (i.virtual_range)().contains(&virt_addr) {
--                let output_addr = match i.physical_range_translation {
--                    Translation::Identity => virt_addr,
--                    Translation::Offset(a) => a + (virt_addr - (i.virtual_range)().start()),
--                };
--
--                return Ok((output_addr, i.attribute_fields));
--            }
--        }
--
--        Ok((virt_addr, AttributeFields::default()))
--    }
--
--    /// Print the memory layout.
--    pub fn print_layout(&self) {
--        use crate::info;
--
--        for i in self.inner.iter() {
--            info!("{}", i);
--        }
--    }
--
--    #[cfg(test)]
--    pub fn inner(&self) -> &[TranslationDescriptor; NUM_SPECIAL_RANGES] {
--        &self.inner
--    }
-+/// Raw mapping of virtual to physical pages in the kernel translation tables.
-+///
-+/// Prevents mapping into the MMIO range of the tables.
-+///
-+/// # Safety
-+///
-+/// - See `kernel_map_pages_at_unchecked()`.
-+/// - Does not prevent aliasing. Currently, the callers must be trusted.
-+pub unsafe fn kernel_map_pages_at(
-+    name: &'static str,
-+    virt_pages: &PageSliceDescriptor<Virtual>,
-+    phys_pages: &PageSliceDescriptor<Physical>,
-+    attr: &AttributeFields,
-+) -> Result<(), &'static str> {
-+    let is_mmio = bsp::memory::mmu::kernel_translation_tables()
-+        .read(|tables| tables.is_virt_page_slice_mmio(virt_pages));
-+    if is_mmio {
-+        return Err("Attempt to manually map into MMIO region");
-+    }
-+
-+    kernel_map_pages_at_unchecked(name, virt_pages, phys_pages, attr)?;
-+
-+    Ok(())
-+}
-+
 +/// MMIO remapping in the kernel translation tables.
 +///
 +/// Typically used by device drivers.
 +///
 +/// # Safety
 +///
-+/// - Same as `kernel_map_pages_at_unchecked()`, minus the aliasing part.
++/// - Same as `kernel_map_at_unchecked()`, minus the aliasing part.
 +pub unsafe fn kernel_map_mmio(
 +    name: &'static str,
 +    mmio_descriptor: &MMIODescriptor,
 +) -> Result<Address<Virtual>, &'static str> {
-+    let phys_pages: PageSliceDescriptor<Physical> = (*mmio_descriptor).into();
-+    let offset_into_start_page =
-+        mmio_descriptor.start_addr().into_usize() & bsp::memory::mmu::KernelGranule::MASK;
++    let phys_region = MemoryRegion::from(*mmio_descriptor);
++    let offset_into_start_page = mmio_descriptor.start_addr().offset_into_page();
 +
-+    // Check if an identical page slice has been mapped for another driver. If so, reuse it.
++    // Check if an identical region has been mapped for another driver. If so, reuse it.
 +    let virt_addr = if let Some(addr) =
 +        mapping_record::kernel_find_and_insert_mmio_duplicate(mmio_descriptor, name)
 +    {
 +        addr
-+    // Otherwise, allocate a new virtual page slice and map it.
++    // Otherwise, allocate a new region and map it.
 +    } else {
-+        let virt_pages: PageSliceDescriptor<Virtual> =
-+            bsp::memory::mmu::kernel_translation_tables()
-+                .write(|tables| tables.next_mmio_virt_page_slice(phys_pages.num_pages()))?;
-+
-+        kernel_map_pages_at_unchecked(
++        let num_pages = match NonZeroUsize::new(phys_region.num_pages()) {
++            None => return Err("Requested 0 pages"),
++            Some(x) => x,
+         };
+
+-        let xn = if self.attribute_fields.execute_never {
+-            "PXN"
+-        } else {
+-            "PX"
+-        };
++        let virt_region =
++            alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.alloc(num_pages))?;
+
+-        write!(
+-            f,
+-            "      {:#010x} - {:#010x} | {: >3} {} | {: <3} {} {: <3} | {}",
+-            start, end, size, unit, attr, acc_p, xn, self.name
+-        )
+-    }
++        kernel_map_at_unchecked(
 +            name,
-+            &virt_pages,
-+            &phys_pages,
++            &virt_region,
++            &phys_region,
 +            &AttributeFields {
 +                mem_attributes: MemAttributes::Device,
 +                acc_perms: AccessPermissions::ReadWrite,
@@ -3022,7 +3301,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 14_virtual_mem_p
 +            },
 +        )?;
 +
-+        virt_pages.start_addr()
++        virt_region.start_addr()
 +    };
 +
 +    Ok(virt_addr + offset_into_start_page)
@@ -3056,24 +3335,111 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 14_virtual_mem_p
 +    arch_mmu::mmu().enable_mmu_and_caching(phys_tables_base_addr)
 +}
 +
++/// Finish initialization of the MMU subsystem.
++pub fn post_enable_init() {
++    kernel_init_mmio_va_allocator();
++}
++
 +/// Human-readable print of all recorded kernel mappings.
 +pub fn kernel_print_mappings() {
 +    mapping_record::kernel_print()
  }
 
+-impl<const NUM_SPECIAL_RANGES: usize> KernelVirtualLayout<{ NUM_SPECIAL_RANGES }> {
+-    /// Create a new instance.
+-    pub const fn new(max: usize, layout: [TranslationDescriptor; NUM_SPECIAL_RANGES]) -> Self {
+-        Self {
+-            max_virt_addr_inclusive: max,
+-            inner: layout,
+-        }
+-    }
+-
+-    /// For a virtual address, find and return the physical output address and corresponding
+-    /// attributes.
+-    ///
+-    /// If the address is not found in `inner`, return an identity mapped default with normal
+-    /// cacheable DRAM attributes.
+-    pub fn virt_addr_properties(
+-        &self,
+-        virt_addr: usize,
+-    ) -> Result<(usize, AttributeFields), &'static str> {
+-        if virt_addr > self.max_virt_addr_inclusive {
+-            return Err("Address out of range");
+-        }
+-
+-        for i in self.inner.iter() {
+-            if (i.virtual_range)().contains(&virt_addr) {
+-                let output_addr = match i.physical_range_translation {
+-                    Translation::Identity => virt_addr,
+-                    Translation::Offset(a) => a + (virt_addr - (i.virtual_range)().start()),
+-                };
+-
+-                return Ok((output_addr, i.attribute_fields));
+-            }
+-        }
++//--------------------------------------------------------------------------------------------------
++// Testing
++//--------------------------------------------------------------------------------------------------
+
+-        Ok((virt_addr, AttributeFields::default()))
+-    }
++#[cfg(test)]
++mod tests {
++    use super::*;
++    use crate::memory::mmu::{AccessPermissions, MemAttributes, PageAddress};
++    use test_macros::kernel_test;
+
+-    /// Print the memory layout.
+-    pub fn print_layout(&self) {
+-        use crate::info;
++    /// Check that you cannot map into the MMIO VA range from kernel_map_at().
++    #[kernel_test]
++    fn no_manual_mmio_map() {
++        let phys_start_page_addr: PageAddress<Physical> = PageAddress::from(0);
++        let phys_end_exclusive_page_addr: PageAddress<Physical> =
++            phys_start_page_addr.checked_offset(5).unwrap();
++        let phys_region = MemoryRegion::new(phys_start_page_addr, phys_end_exclusive_page_addr);
++
++        let num_pages = NonZeroUsize::new(phys_region.num_pages()).unwrap();
++        let virt_region = alloc::kernel_mmio_va_allocator()
++            .lock(|allocator| allocator.alloc(num_pages))
++            .unwrap();
+
+-        for i in self.inner.iter() {
+-            info!("{}", i);
+-        }
+-    }
++        let attr = AttributeFields {
++            mem_attributes: MemAttributes::CacheableDRAM,
++            acc_perms: AccessPermissions::ReadWrite,
++            execute_never: true,
++        };
+
+-    #[cfg(test)]
+-    pub fn inner(&self) -> &[TranslationDescriptor; NUM_SPECIAL_RANGES] {
+-        &self.inner
++        unsafe {
++            assert_eq!(
++                kernel_map_at("test", &virt_region, &phys_region, &attr),
++                Err("Attempt to manually map into MMIO region")
++            )
++        };
+     }
+ }
+
 diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory.rs 14_virtual_mem_part2_mmio_remap/src/memory.rs
 --- 13_exceptions_part2_peripheral_IRQs/src/memory.rs
 +++ 14_virtual_mem_part2_mmio_remap/src/memory.rs
-@@ -5,3 +5,133 @@
+@@ -5,3 +5,161 @@
  //! Memory Management.
 
  pub mod mmu;
 +
-+use crate::common;
++use crate::{bsp, common};
 +use core::{
 +    fmt,
 +    marker::PhantomData,
-+    ops::{AddAssign, SubAssign},
++    ops::{Add, Sub},
 +};
 +
 +//--------------------------------------------------------------------------------------------------
@@ -3084,15 +3450,15 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory.rs 14_virtual_mem_part2
 +pub trait AddressType: Copy + Clone + PartialOrd + PartialEq {}
 +
 +/// Zero-sized type to mark a physical address.
-+#[derive(Copy, Clone, PartialOrd, PartialEq)]
++#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
 +pub enum Physical {}
 +
 +/// Zero-sized type to mark a virtual address.
-+#[derive(Copy, Clone, PartialOrd, PartialEq)]
++#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
 +pub enum Virtual {}
 +
 +/// Generic address type.
-+#[derive(Copy, Clone, PartialOrd, PartialEq)]
++#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
 +pub struct Address<ATYPE: AddressType> {
 +    value: usize,
 +    _address_type: PhantomData<fn() -> ATYPE>,
@@ -3114,59 +3480,57 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory.rs 14_virtual_mem_part2
 +        }
 +    }
 +
-+    /// Align down.
-+    pub const fn align_down(self, alignment: usize) -> Self {
-+        let aligned = common::align_down(self.value, alignment);
-+
-+        Self {
-+            value: aligned,
-+            _address_type: PhantomData,
-+        }
++    /// Convert to usize.
++    pub const fn as_usize(self) -> usize {
++        self.value
 +    }
 +
-+    /// Converts `Address` into an usize.
-+    pub const fn into_usize(self) -> usize {
-+        self.value
++    /// Align down to page size.
++    pub const fn align_down_page(self) -> Self {
++        let aligned = common::align_down(self.value, bsp::memory::mmu::KernelGranule::SIZE);
++
++        Self::new(aligned)
 +    }
-+}
 +
-+impl<ATYPE: AddressType> core::ops::Add<usize> for Address<ATYPE> {
-+    type Output = Self;
++    /// Align up to page size.
++    pub const fn align_up_page(self) -> Self {
++        let aligned = common::align_up(self.value, bsp::memory::mmu::KernelGranule::SIZE);
 +
-+    fn add(self, other: usize) -> Self {
-+        Self {
-+            value: self.value + other,
-+            _address_type: PhantomData,
-+        }
++        Self::new(aligned)
 +    }
-+}
 +
-+impl<ATYPE: AddressType> AddAssign for Address<ATYPE> {
-+    fn add_assign(&mut self, other: Self) {
-+        *self = Self {
-+            value: self.value + other.into_usize(),
-+            _address_type: PhantomData,
-+        };
++    /// Checks if the address is page aligned.
++    pub const fn is_page_aligned(&self) -> bool {
++        common::is_aligned(self.value, bsp::memory::mmu::KernelGranule::SIZE)
++    }
++
++    /// Return the address' offset into the corresponding page.
++    pub const fn offset_into_page(&self) -> usize {
++        self.value & bsp::memory::mmu::KernelGranule::MASK
 +    }
 +}
 +
-+impl<ATYPE: AddressType> core::ops::Sub<usize> for Address<ATYPE> {
++impl<ATYPE: AddressType> Add<usize> for Address<ATYPE> {
 +    type Output = Self;
 +
-+    fn sub(self, other: usize) -> Self {
-+        Self {
-+            value: self.value - other,
-+            _address_type: PhantomData,
++    #[inline(always)]
++    fn add(self, rhs: usize) -> Self::Output {
++        match self.value.checked_add(rhs) {
++            None => panic!("Overflow on Address::add"),
++            Some(x) => Self::new(x),
 +        }
 +    }
 +}
 +
-+impl<ATYPE: AddressType> SubAssign for Address<ATYPE> {
-+    fn sub_assign(&mut self, other: Self) {
-+        *self = Self {
-+            value: self.value - other.into_usize(),
-+            _address_type: PhantomData,
-+        };
++impl<ATYPE: AddressType> Sub<Address<ATYPE>> for Address<ATYPE> {
++    type Output = Self;
++
++    #[inline(always)]
++    fn sub(self, rhs: Address<ATYPE>) -> Self::Output {
++        match self.value.checked_sub(rhs.value) {
++            None => panic!("Overflow on Address::sub"),
++            Some(x) => Self::new(x),
++        }
 +    }
 +}
 +
@@ -3198,11 +3562,41 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory.rs 14_virtual_mem_part2
 +        write!(f, "{:04x}", q1)
 +    }
 +}
++
++//--------------------------------------------------------------------------------------------------
++// Testing
++//--------------------------------------------------------------------------------------------------
++
++#[cfg(test)]
++mod tests {
++    use super::*;
++    use test_macros::kernel_test;
++
++    /// Sanity of [Address] methods.
++    #[kernel_test]
++    fn address_type_method_sanity() {
++        let addr = Address::<Virtual>::new(bsp::memory::mmu::KernelGranule::SIZE + 100);
++
++        assert_eq!(
++            addr.align_down_page().as_usize(),
++            bsp::memory::mmu::KernelGranule::SIZE
++        );
++
++        assert_eq!(
++            addr.align_up_page().as_usize(),
++            bsp::memory::mmu::KernelGranule::SIZE * 2
++        );
++
++        assert_eq!(addr.is_page_aligned(), false);
++
++        assert_eq!(addr.offset_into_page(), 100);
++    }
++}
 
 diff -uNr 13_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs 14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
 --- 13_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs
 +++ 14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
-@@ -21,7 +21,7 @@
+@@ -21,18 +21,40 @@
 
  #[no_mangle]
  unsafe fn kernel_init() -> ! {
@@ -3210,8 +3604,8 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault
 +    use libkernel::driver::interface::DriverManager;
 
      exception::handling_init();
-     bsp::console::qemu_bring_up_console();
-@@ -29,10 +29,30 @@
+-    bsp::console::qemu_bring_up_console();
+
      // This line will be printed as the test header.
      println!("Testing synchronous exception handling by causing a page fault");
 
@@ -3231,6 +3625,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault
      }
 +    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
 +
++    memory::mmu::post_enable_init();
++    bsp::console::qemu_bring_up_console();
++
 +    // Bring up the drivers needed for printing first.
 +    for i in bsp::driver::driver_manager()
 +        .early_print_device_drivers()
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
index 2cad10b76..ac0ef3e19 100644
--- a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
@@ -131,7 +131,7 @@ impl memory::mmu::interface::MMU for MemoryManagementUnit {
         self.set_up_mair();
 
         // Set the "Translation Table Base Register".
-        TTBR0_EL1.set_baddr(phys_tables_base_addr.into_usize() as u64);
+        TTBR0_EL1.set_baddr(phys_tables_base_addr.as_usize() as u64);
 
         self.configure_translation_control();
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
index 32cea68c7..2eac24d65 100644
--- a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -14,11 +14,12 @@
 //! crate::memory::mmu::translation_table::arch_translation_table
 
 use crate::{
-    bsp, memory,
+    bsp,
     memory::{
+        self,
         mmu::{
             arch_mmu::{Granule512MiB, Granule64KiB},
-            AccessPermissions, AttributeFields, MemAttributes, Page, PageSliceDescriptor,
+            AccessPermissions, AttributeFields, MemAttributes, MemoryRegion, PageAddress,
         },
         Address, Physical, Virtual,
     },
@@ -142,9 +143,6 @@ pub struct FixedSizeTranslationTable<const NUM_TABLES: usize> {
     /// Table descriptors, covering 512 MiB windows.
     lvl2: [TableDescriptor; NUM_TABLES],
 
-    /// Index of the next free MMIO page.
-    cur_l3_mmio_index: usize,
-
     /// Have the tables been initialized?
     initialized: bool,
 }
@@ -172,7 +170,7 @@ impl TableDescriptor {
     pub fn from_next_lvl_table_addr(phys_next_lvl_table_addr: Address<Physical>) -> Self {
         let val = InMemoryRegister::<u64, STAGE1_TABLE_DESCRIPTOR::Register>::new(0);
 
-        let shifted = phys_next_lvl_table_addr.into_usize() >> Granule64KiB::SHIFT;
+        let shifted = phys_next_lvl_table_addr.as_usize() >> Granule64KiB::SHIFT;
         val.write(
             STAGE1_TABLE_DESCRIPTOR::NEXT_LEVEL_TABLE_ADDR_64KiB.val(shifted as u64)
                 + STAGE1_TABLE_DESCRIPTOR::TYPE::Table
@@ -229,15 +227,15 @@ impl PageDescriptor {
     }
 
     /// Create an instance.
-    pub fn from_output_page(
-        phys_output_page_ptr: *const Page<Physical>,
+    pub fn from_output_page_addr(
+        phys_output_page_addr: PageAddress<Physical>,
         attribute_fields: &AttributeFields,
     ) -> Self {
         let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
 
-        let shifted = phys_output_page_ptr as u64 >> Granule64KiB::SHIFT;
+        let shifted = phys_output_page_addr.into_inner().as_usize() >> Granule64KiB::SHIFT;
         val.write(
-            STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted)
+            STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted as u64)
                 + STAGE1_PAGE_DESCRIPTOR::AF::True
                 + STAGE1_PAGE_DESCRIPTOR::TYPE::Page
                 + STAGE1_PAGE_DESCRIPTOR::VALID::True
@@ -267,10 +265,6 @@ where
 }
 
 impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
-    // Reserve the last 256 MiB of the address space for MMIO mappings.
-    const L2_MMIO_START_INDEX: usize = NUM_TABLES - 1;
-    const L3_MMIO_START_INDEX: usize = 8192 / 2;
-
     /// Create an instance.
     #[allow(clippy::assertions_on_constants)]
     pub const fn new() -> Self {
@@ -282,37 +276,17 @@ impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
         Self {
             lvl3: [[PageDescriptor::new_zeroed(); 8192]; NUM_TABLES],
             lvl2: [TableDescriptor::new_zeroed(); NUM_TABLES],
-            cur_l3_mmio_index: 0,
             initialized: false,
         }
     }
 
-    /// The start address of the table's MMIO range.
-    #[inline(always)]
-    fn mmio_start_addr(&self) -> Address<Virtual> {
-        Address::new(
-            (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
-                | (Self::L3_MMIO_START_INDEX << Granule64KiB::SHIFT),
-        )
-    }
-
-    /// The inclusive end address of the table's MMIO range.
-    #[inline(always)]
-    fn mmio_end_addr_inclusive(&self) -> Address<Virtual> {
-        Address::new(
-            (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
-                | (8191 << Granule64KiB::SHIFT)
-                | (Granule64KiB::SIZE - 1),
-        )
-    }
-
     /// Helper to calculate the lvl2 and lvl3 indices from an address.
     #[inline(always)]
-    fn lvl2_lvl3_index_from_page(
+    fn lvl2_lvl3_index_from_page_addr(
         &self,
-        virt_page_ptr: *const Page<Virtual>,
+        virt_page_addr: PageAddress<Virtual>,
     ) -> Result<(usize, usize), &'static str> {
-        let addr = virt_page_ptr as usize;
+        let addr = virt_page_addr.into_inner().as_usize();
         let lvl2_index = addr >> Granule512MiB::SHIFT;
         let lvl3_index = (addr & Granule512MiB::MASK) >> Granule64KiB::SHIFT;
 
@@ -327,12 +301,12 @@ impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
     ///
     /// Doesn't allow overriding an already valid page.
     #[inline(always)]
-    fn set_page_descriptor_from_page(
+    fn set_page_descriptor_from_page_addr(
         &mut self,
-        virt_page_ptr: *const Page<Virtual>,
+        virt_page_addr: PageAddress<Virtual>,
         new_desc: &PageDescriptor,
     ) -> Result<(), &'static str> {
-        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page(virt_page_ptr)?;
+        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page_addr(virt_page_addr)?;
         let desc = &mut self.lvl3[lvl2_index][lvl3_index];
 
         if desc.is_valid() {
@@ -364,7 +338,6 @@ impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::Transla
             *lvl2_entry = new_desc;
         }
 
-        self.cur_l3_mmio_index = Self::L3_MMIO_START_INDEX;
         self.initialized = true;
     }
 
@@ -372,76 +345,33 @@ impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::Transla
         self.lvl2.phys_start_addr()
     }
 
-    unsafe fn map_pages_at(
+    unsafe fn map_at(
         &mut self,
-        virt_pages: &PageSliceDescriptor<Virtual>,
-        phys_pages: &PageSliceDescriptor<Physical>,
+        virt_region: &MemoryRegion<Virtual>,
+        phys_region: &MemoryRegion<Physical>,
         attr: &AttributeFields,
     ) -> Result<(), &'static str> {
         assert!(self.initialized, "Translation tables not initialized");
 
-        let v = virt_pages.as_slice();
-        let p = phys_pages.as_slice();
-
-        // No work to do for empty slices.
-        if v.is_empty() {
-            return Ok(());
-        }
-
-        if v.len() != p.len() {
-            return Err("Tried to map page slices with unequal sizes");
+        if virt_region.size() != phys_region.size() {
+            return Err("Tried to map memory regions with unequal sizes");
         }
 
-        if p.last().unwrap().as_ptr() >= bsp::memory::mmu::phys_addr_space_end_page_ptr() {
+        if phys_region.end_exclusive_page_addr() > bsp::memory::phys_addr_space_end_exclusive_addr()
+        {
             return Err("Tried to map outside of physical address space");
         }
 
-        let iter = p.iter().zip(v.iter());
-        for (phys_page, virt_page) in iter {
-            let new_desc = PageDescriptor::from_output_page(phys_page.as_ptr(), attr);
-            let virt_page = virt_page.as_ptr();
+        let iter = phys_region.into_iter().zip(virt_region.into_iter());
+        for (phys_page_addr, virt_page_addr) in iter {
+            let new_desc = PageDescriptor::from_output_page_addr(phys_page_addr, attr);
+            let virt_page = virt_page_addr;
 
-            self.set_page_descriptor_from_page(virt_page, &new_desc)?;
+            self.set_page_descriptor_from_page_addr(virt_page, &new_desc)?;
         }
 
         Ok(())
     }
-
-    fn next_mmio_virt_page_slice(
-        &mut self,
-        num_pages: usize,
-    ) -> Result<PageSliceDescriptor<Virtual>, &'static str> {
-        assert!(self.initialized, "Translation tables not initialized");
-
-        if num_pages == 0 {
-            return Err("num_pages == 0");
-        }
-
-        if (self.cur_l3_mmio_index + num_pages) > 8191 {
-            return Err("Not enough MMIO space left");
-        }
-
-        let addr = Address::new(
-            (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
-                | (self.cur_l3_mmio_index << Granule64KiB::SHIFT),
-        );
-        self.cur_l3_mmio_index += num_pages;
-
-        Ok(PageSliceDescriptor::from_addr(addr, num_pages))
-    }
-
-    fn is_virt_page_slice_mmio(&self, virt_pages: &PageSliceDescriptor<Virtual>) -> bool {
-        let start_addr = virt_pages.start_addr();
-        let end_addr_inclusive = virt_pages.end_addr_inclusive();
-
-        for i in [start_addr, end_addr_inclusive].iter() {
-            if (*i >= self.mmio_start_addr()) && (*i <= self.mmio_end_addr_inclusive()) {
-                return true;
-            }
-        }
-
-        false
-    }
 }
 
 //--------------------------------------------------------------------------------------------------
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs
index 51c321868..3f69bd113 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs
@@ -133,8 +133,8 @@ impl GICv2 {
         Self {
             gicd_mmio_descriptor,
             gicc_mmio_descriptor,
-            gicd: gicd::GICD::new(gicd_mmio_descriptor.start_addr().into_usize()),
-            gicc: gicc::GICC::new(gicc_mmio_descriptor.start_addr().into_usize()),
+            gicd: gicd::GICD::new(gicd_mmio_descriptor.start_addr().as_usize()),
+            gicc: gicc::GICC::new(gicc_mmio_descriptor.start_addr().as_usize()),
             is_mmio_remapped: AtomicBool::new(false),
             handler_table: InitStateLock::new([None; Self::NUM_IRQS]),
         }
@@ -158,11 +158,11 @@ impl driver::interface::DeviceDriver for GICv2 {
 
             // GICD
             virt_addr = memory::mmu::kernel_map_mmio("GICD", &self.gicd_mmio_descriptor)?;
-            self.gicd.set_mmio(virt_addr.into_usize());
+            self.gicd.set_mmio(virt_addr.as_usize());
 
             // GICC
             virt_addr = memory::mmu::kernel_map_mmio("GICC", &self.gicc_mmio_descriptor)?;
-            self.gicc.set_mmio(virt_addr.into_usize());
+            self.gicc.set_mmio(virt_addr.as_usize());
 
             // Conclude remapping.
             self.is_mmio_remapped.store(true, Ordering::Relaxed);
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 9bdc73f8a..bc96a1290 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -215,7 +215,7 @@ impl GPIO {
         Self {
             mmio_descriptor,
             virt_mmio_start_addr: AtomicUsize::new(0),
-            inner: IRQSafeNullLock::new(GPIOInner::new(mmio_descriptor.start_addr().into_usize())),
+            inner: IRQSafeNullLock::new(GPIOInner::new(mmio_descriptor.start_addr().as_usize())),
         }
     }
 
@@ -239,10 +239,10 @@ impl driver::interface::DeviceDriver for GPIO {
         let virt_addr = memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?;
 
         self.inner
-            .lock(|inner| inner.init(Some(virt_addr.into_usize())))?;
+            .lock(|inner| inner.init(Some(virt_addr.as_usize())))?;
 
         self.virt_mmio_start_addr
-            .store(virt_addr.into_usize(), Ordering::Relaxed);
+            .store(virt_addr.as_usize(), Ordering::Relaxed);
 
         Ok(())
     }
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index 5934e6dd1..a197adfcf 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -78,7 +78,7 @@ impl PeripheralIC {
     ///
     /// - The user must ensure to provide correct MMIO descriptors.
     pub const unsafe fn new(mmio_descriptor: memory::mmu::MMIODescriptor) -> Self {
-        let addr = mmio_descriptor.start_addr().into_usize();
+        let addr = mmio_descriptor.start_addr().as_usize();
 
         Self {
             mmio_descriptor,
@@ -111,7 +111,7 @@ impl driver::interface::DeviceDriver for PeripheralIC {
 
     unsafe fn init(&self) -> Result<(), &'static str> {
         let virt_addr =
-            memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?.into_usize();
+            memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?.as_usize();
 
         self.wo_registers
             .lock(|regs| *regs = WriteOnlyRegisters::new(virt_addr));
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 83a984b8c..9d58d9ea2 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -414,7 +414,7 @@ impl PL011Uart {
             mmio_descriptor,
             virt_mmio_start_addr: AtomicUsize::new(0),
             inner: IRQSafeNullLock::new(PL011UartInner::new(
-                mmio_descriptor.start_addr().into_usize(),
+                mmio_descriptor.start_addr().as_usize(),
             )),
             irq_number,
         }
@@ -435,10 +435,10 @@ impl driver::interface::DeviceDriver for PL011Uart {
         let virt_addr = memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?;
 
         self.inner
-            .lock(|inner| inner.init(Some(virt_addr.into_usize())))?;
+            .lock(|inner| inner.init(Some(virt_addr.as_usize())))?;
 
         self.virt_mmio_start_addr
-            .store(virt_addr.into_usize(), Ordering::Relaxed);
+            .store(virt_addr.as_usize(), Ordering::Relaxed);
 
         Ok(())
     }
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs
index 0d0f8e40b..7ba9546e6 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs
@@ -25,9 +25,9 @@ use core::fmt;
 pub unsafe fn panic_console_out() -> impl fmt::Write {
     use driver::interface::DeviceDriver;
 
-    let mut panic_gpio = device_driver::PanicGPIO::new(memory::map::mmio::GPIO_START.into_usize());
+    let mut panic_gpio = device_driver::PanicGPIO::new(memory::map::mmio::GPIO_START.as_usize());
     let mut panic_uart =
-        device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START.into_usize());
+        device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START.as_usize());
 
     // If remapping of the driver's MMIO already happened, take the remapped start address.
     // Otherwise, take a chance with the default physical address.
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
index bdab23fc6..f5bf6b6b9 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
@@ -3,68 +3,92 @@
  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
-/* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
-__rpi_load_addr = 0x80000;
+PAGE_SIZE = 64K;
+PAGE_MASK = PAGE_SIZE - 1;
 
-ENTRY(__rpi_load_addr)
+__rpi_phys_dram_start_addr = 0;
 
+/* The physical address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_phys_binary_load_addr = 0x80000;
+
+
+ENTRY(__rpi_phys_binary_load_addr)
+
+/* Flags:
+ *     4 == R
+ *     5 == RX
+ *     6 == RW
+ *
+ * Segments are marked PT_LOAD below so that the ELF file provides virtual and physical addresses.
+ * It doesn't mean all of them need actually be loaded.
+ */
 PHDRS
 {
-    segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
-    segment_rw PT_LOAD FLAGS(6); /* 6 == RW */
+    segment_boot_core_stack PT_LOAD FLAGS(6);
+    segment_code            PT_LOAD FLAGS(5);
+    segment_data            PT_LOAD FLAGS(6);
 }
 
 SECTIONS
 {
-    . =  __rpi_load_addr;
+    . =  __rpi_phys_dram_start_addr;
+
+    /***********************************************************************************************
+    * Boot Core Stack
+    ***********************************************************************************************/
+    .boot_core_stack (NOLOAD) :
+    {
+        __boot_core_stack_start = .;         /*   ^             */
+                                             /*   | stack       */
+        . += __rpi_phys_binary_load_addr;    /*   | growth      */
+                                             /*   | direction   */
+        __boot_core_stack_end_exclusive = .; /*   |             */
+    } :segment_boot_core_stack
+
+    ASSERT((. & PAGE_MASK) == 0, "End of boot core stack is not page aligned")
 
     /***********************************************************************************************
     * Code + RO Data + Global Offset Table
     ***********************************************************************************************/
-    __rx_start = .;
+    __code_start = .;
     .text :
     {
         KEEP(*(.text._start))
         *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
         *(.text._start_rust)      /* The Rust entry point */
         *(.text*)                 /* Everything else */
-    } :segment_rx
+    } :segment_code
 
-    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
-    .got    : ALIGN(8) { *(.got)     } :segment_rx
+    .rodata : ALIGN(8) { *(.rodata*) } :segment_code
+    .got    : ALIGN(8) { *(.got)     } :segment_code
 
-    . = ALIGN(64K); /* Align to page boundary */
-    __rx_end_exclusive = .;
+    . = ALIGN(PAGE_SIZE);
+    __code_end_exclusive = .;
 
     /***********************************************************************************************
     * Data + BSS
     ***********************************************************************************************/
-    __rw_start = .;
-    .data : { *(.data*) } :segment_rw
+    __data_start = .;
+    .data : { *(.data*) } :segment_data
 
     /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
-    .bss : ALIGN(16)
+    .bss (NOLOAD) : ALIGN(16)
     {
         __bss_start = .;
         *(.bss*);
         . = ALIGN(16);
         __bss_end_exclusive = .;
-    } :NONE
+    } :segment_data
 
-    . = ALIGN(64K); /* Align to page boundary */
-    __rw_end_exclusive = .;
+    . = ALIGN(PAGE_SIZE);
+    __data_end_exclusive = .;
 
     /***********************************************************************************************
-    * Guard Page between boot core stack and data
+    * MMIO Remap Reserved
     ***********************************************************************************************/
-    . += 64K;
+    __mmio_remap_start = .;
+    . += 8 * 1024 * 1024;
+    __mmio_remap_end_exclusive = .;
 
-    /***********************************************************************************************
-    * Boot Core Stack
-    ***********************************************************************************************/
-    __boot_core_stack_start = .;         /*   ^             */
-                                         /*   | stack       */
-    . += 512K;                           /*   | growth      */
-                                         /*   | direction   */
-    __boot_core_stack_end_exclusive = .; /*   |             */
+    ASSERT((. & PAGE_MASK) == 0, "MMIO remap reservation is not page aligned")
 }
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
index 88dcaf58a..a6da7d556 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
@@ -4,39 +4,65 @@
 
 //! BSP Memory Management.
 //!
-//! The physical memory layout after the kernel has been loaded by the Raspberry's firmware, which
-//! copies the binary to 0x8_0000:
+//! The physical memory layout.
 //!
-//! +---------------------------------------------+
-//! |                                             |
-//! | Unmapped                                    |
-//! |                                             |
-//! +---------------------------------------------+
-//! |                                             | rx_start @ 0x8_0000
-//! | .text                                       |
-//! | .rodata                                     |
-//! | .got                                        |
-//! |                                             | rx_end_inclusive
-//! +---------------------------------------------+
-//! |                                             | rw_start == rx_end
-//! | .data                                       |
-//! | .bss                                        |
-//! |                                             | rw_end_inclusive
-//! +---------------------------------------------+
-//! |                                             | rw_end
-//! | Unmapped Boot-core Stack Guard Page         |
-//! |                                             |
-//! +---------------------------------------------+
-//! |                                             | boot_core_stack_start          ^
-//! |                                             |                                | stack
-//! | Boot-core Stack                             |                                | growth
-//! |                                             |                                | direction
-//! |                                             | boot_core_stack_end_inclusive  |
-//! +---------------------------------------------+
-
+//! The Raspberry's firmware copies the kernel binary to 0x8_0000. The preceding region will be used
+//! as the boot core's stack.
+//!
+//! +---------------------------------------+
+//! |                                       | boot_core_stack_start @ 0x0
+//! |                                       |                                ^
+//! | Boot-core Stack                       |                                | stack
+//! |                                       |                                | growth
+//! |                                       |                                | direction
+//! +---------------------------------------+
+//! |                                       | code_start @ 0x8_0000 == boot_core_stack_end_exclusive
+//! | .text                                 |
+//! | .rodata                               |
+//! | .got                                  |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       | data_start == code_end_exclusive
+//! | .data                                 |
+//! | .bss                                  |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       | data_end_exclusive
+//! |                                       |
+//!
+//!
+//!
+//!
+//!
+//! The virtual memory layout is as follows:
+//!
+//! +---------------------------------------+
+//! |                                       | boot_core_stack_start @ 0x0
+//! |                                       |                                ^
+//! | Boot-core Stack                       |                                | stack
+//! |                                       |                                | growth
+//! |                                       |                                | direction
+//! +---------------------------------------+
+//! |                                       | code_start @ 0x8_0000 == boot_core_stack_end_exclusive
+//! | .text                                 |
+//! | .rodata                               |
+//! | .got                                  |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       | data_start == code_end_exclusive
+//! | .data                                 |
+//! | .bss                                  |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       |  mmio_remap_start == data_end_exclusive
+//! | VA region for MMIO remapping          |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       |  mmio_remap_end_exclusive
+//! |                                       |
 pub mod mmu;
 
-use crate::memory::{Address, Physical, Virtual};
+use crate::memory::{mmu::PageAddress, Address, Physical, Virtual};
 use core::cell::UnsafeCell;
 
 //--------------------------------------------------------------------------------------------------
@@ -45,11 +71,14 @@ use core::cell::UnsafeCell;
 
 // Symbols from the linker script.
 extern "Rust" {
-    static __rx_start: UnsafeCell<()>;
-    static __rx_end_exclusive: UnsafeCell<()>;
+    static __code_start: UnsafeCell<()>;
+    static __code_end_exclusive: UnsafeCell<()>;
+
+    static __data_start: UnsafeCell<()>;
+    static __data_end_exclusive: UnsafeCell<()>;
 
-    static __rw_start: UnsafeCell<()>;
-    static __rw_end_exclusive: UnsafeCell<()>;
+    static __mmio_remap_start: UnsafeCell<()>;
+    static __mmio_remap_end_exclusive: UnsafeCell<()>;
 
     static __boot_core_stack_start: UnsafeCell<()>;
     static __boot_core_stack_end_exclusive: UnsafeCell<()>;
@@ -111,46 +140,66 @@ pub(super) mod map {
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-/// Start address of the Read+Execute (RX) range.
+/// Start page address of the code segment.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn virt_code_start() -> PageAddress<Virtual> {
+    PageAddress::from(unsafe { __code_start.get() as usize })
+}
+
+/// Size of the code segment.
 ///
 /// # Safety
 ///
 /// - Value is provided by the linker script and must be trusted as-is.
 #[inline(always)]
-fn virt_rx_start() -> Address<Virtual> {
-    Address::new(unsafe { __rx_start.get() as usize })
+fn code_size() -> usize {
+    unsafe { (__code_end_exclusive.get() as usize) - (__code_start.get() as usize) }
 }
 
-/// Size of the Read+Execute (RX) range.
+/// Start page address of the data segment.
+#[inline(always)]
+fn virt_data_start() -> PageAddress<Virtual> {
+    PageAddress::from(unsafe { __data_start.get() as usize })
+}
+
+/// Size of the data segment.
 ///
 /// # Safety
 ///
 /// - Value is provided by the linker script and must be trusted as-is.
 #[inline(always)]
-fn rx_size() -> usize {
-    unsafe { (__rx_end_exclusive.get() as usize) - (__rx_start.get() as usize) }
+fn data_size() -> usize {
+    unsafe { (__data_end_exclusive.get() as usize) - (__data_start.get() as usize) }
 }
 
-/// Start address of the Read+Write (RW) range.
+/// Start page address of the MMIO remap reservation.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
 #[inline(always)]
-fn virt_rw_start() -> Address<Virtual> {
-    Address::new(unsafe { __rw_start.get() as usize })
+fn virt_mmio_remap_start() -> PageAddress<Virtual> {
+    PageAddress::from(unsafe { __mmio_remap_start.get() as usize })
 }
 
-/// Size of the Read+Write (RW) range.
+/// Size of the MMIO remap reservation.
 ///
 /// # Safety
 ///
 /// - Value is provided by the linker script and must be trusted as-is.
 #[inline(always)]
-fn rw_size() -> usize {
-    unsafe { (__rw_end_exclusive.get() as usize) - (__rw_start.get() as usize) }
+fn mmio_remap_size() -> usize {
+    unsafe { (__mmio_remap_end_exclusive.get() as usize) - (__mmio_remap_start.get() as usize) }
 }
 
-/// Start address of the boot core's stack.
+/// Start page address of the boot core's stack.
 #[inline(always)]
-fn virt_boot_core_stack_start() -> Address<Virtual> {
-    Address::new(unsafe { __boot_core_stack_start.get() as usize })
+fn virt_boot_core_stack_start() -> PageAddress<Virtual> {
+    PageAddress::from(unsafe { __boot_core_stack_start.get() as usize })
 }
 
 /// Size of the boot core's stack.
@@ -161,8 +210,12 @@ fn boot_core_stack_size() -> usize {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
 /// Exclusive end address of the physical address space.
 #[inline(always)]
-fn phys_addr_space_end() -> Address<Physical> {
-    map::END
+pub fn phys_addr_space_end_exclusive_addr() -> PageAddress<Physical> {
+    PageAddress::from(map::END)
 }
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
index 7bf5c7fe9..96ee537c3 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
@@ -5,14 +5,12 @@
 //! BSP Memory Management Unit.
 
 use crate::{
-    common,
     memory::{
-        mmu as generic_mmu,
         mmu::{
-            AccessPermissions, AddressSpace, AssociatedTranslationTable, AttributeFields,
-            MemAttributes, Page, PageSliceDescriptor, TranslationGranule,
+            self as generic_mmu, AccessPermissions, AddressSpace, AssociatedTranslationTable,
+            AttributeFields, MemAttributes, MemoryRegion, PageAddress, TranslationGranule,
         },
-        Address, Physical, Virtual,
+        Physical, Virtual,
     },
     synchronization::InitStateLock,
 };
@@ -33,7 +31,7 @@ type KernelTranslationTable =
 pub type KernelGranule = TranslationGranule<{ 64 * 1024 }>;
 
 /// The kernel's virtual address space defined by this BSP.
-pub type KernelVirtAddrSpace = AddressSpace<{ 8 * 1024 * 1024 * 1024 }>;
+pub type KernelVirtAddrSpace = AddressSpace<{ 1024 * 1024 * 1024 }>;
 
 //--------------------------------------------------------------------------------------------------
 // Global instances
@@ -60,35 +58,48 @@ const fn size_to_num_pages(size: usize) -> usize {
     size >> KernelGranule::SHIFT
 }
 
-/// The Read+Execute (RX) pages of the kernel binary.
-fn virt_rx_page_desc() -> PageSliceDescriptor<Virtual> {
-    let num_pages = size_to_num_pages(super::rx_size());
+/// The code pages of the kernel binary.
+fn virt_code_region() -> MemoryRegion<Virtual> {
+    let num_pages = size_to_num_pages(super::code_size());
 
-    PageSliceDescriptor::from_addr(super::virt_rx_start(), num_pages)
+    let start_page_addr = super::virt_code_start();
+    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
+
+    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
 }
 
-/// The Read+Write (RW) pages of the kernel binary.
-fn virt_rw_page_desc() -> PageSliceDescriptor<Virtual> {
-    let num_pages = size_to_num_pages(super::rw_size());
+/// The data pages of the kernel binary.
+fn virt_data_region() -> MemoryRegion<Virtual> {
+    let num_pages = size_to_num_pages(super::data_size());
+
+    let start_page_addr = super::virt_data_start();
+    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
 
-    PageSliceDescriptor::from_addr(super::virt_rw_start(), num_pages)
+    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
 }
 
-/// The boot core's stack.
-fn virt_boot_core_stack_page_desc() -> PageSliceDescriptor<Virtual> {
+/// The boot core stack pages.
+fn virt_boot_core_stack_region() -> MemoryRegion<Virtual> {
     let num_pages = size_to_num_pages(super::boot_core_stack_size());
 
-    PageSliceDescriptor::from_addr(super::virt_boot_core_stack_start(), num_pages)
+    let start_page_addr = super::virt_boot_core_stack_start();
+    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
+
+    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
 }
 
 // The binary is still identity mapped, so use this trivial conversion function for mapping below.
 
-fn kernel_virt_to_phys_page_slice(
-    virt_slice: PageSliceDescriptor<Virtual>,
-) -> PageSliceDescriptor<Physical> {
-    let phys_start_addr = Address::<Physical>::new(virt_slice.start_addr().into_usize());
-
-    PageSliceDescriptor::from_addr(phys_start_addr, virt_slice.num_pages())
+fn kernel_virt_to_phys_region(virt_region: MemoryRegion<Virtual>) -> MemoryRegion<Physical> {
+    MemoryRegion::new(
+        PageAddress::from(virt_region.start_page_addr().into_inner().as_usize()),
+        PageAddress::from(
+            virt_region
+                .end_exclusive_page_addr()
+                .into_inner()
+                .as_usize(),
+        ),
+    )
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -100,12 +111,14 @@ pub fn kernel_translation_tables() -> &'static InitStateLock<KernelTranslationTa
     &KERNEL_TABLES
 }
 
-/// Pointer to the last page of the physical address space.
-pub fn phys_addr_space_end_page_ptr() -> *const Page<Physical> {
-    common::align_down(
-        super::phys_addr_space_end().into_usize(),
-        KernelGranule::SIZE,
-    ) as *const Page<_>
+/// The MMIO remap pages.
+pub fn virt_mmio_remap_region() -> MemoryRegion<Virtual> {
+    let num_pages = size_to_num_pages(super::mmio_remap_size());
+
+    let start_page_addr = super::virt_mmio_remap_start();
+    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
+
+    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
 }
 
 /// Map the kernel binary.
@@ -114,32 +127,32 @@ pub fn phys_addr_space_end_page_ptr() -> *const Page<Physical> {
 ///
 /// - Any miscalculation or attribute error will likely be fatal. Needs careful manual checking.
 pub unsafe fn kernel_map_binary() -> Result<(), &'static str> {
-    generic_mmu::kernel_map_pages_at(
-        "Kernel code and RO data",
-        &virt_rx_page_desc(),
-        &kernel_virt_to_phys_page_slice(virt_rx_page_desc()),
+    generic_mmu::kernel_map_at(
+        "Kernel boot-core stack",
+        &virt_boot_core_stack_region(),
+        &kernel_virt_to_phys_region(virt_boot_core_stack_region()),
         &AttributeFields {
             mem_attributes: MemAttributes::CacheableDRAM,
-            acc_perms: AccessPermissions::ReadOnly,
-            execute_never: false,
+            acc_perms: AccessPermissions::ReadWrite,
+            execute_never: true,
         },
     )?;
 
-    generic_mmu::kernel_map_pages_at(
-        "Kernel data and bss",
-        &virt_rw_page_desc(),
-        &kernel_virt_to_phys_page_slice(virt_rw_page_desc()),
+    generic_mmu::kernel_map_at(
+        "Kernel code and RO data",
+        &virt_code_region(),
+        &kernel_virt_to_phys_region(virt_code_region()),
         &AttributeFields {
             mem_attributes: MemAttributes::CacheableDRAM,
-            acc_perms: AccessPermissions::ReadWrite,
-            execute_never: true,
+            acc_perms: AccessPermissions::ReadOnly,
+            execute_never: false,
         },
     )?;
 
-    generic_mmu::kernel_map_pages_at(
-        "Kernel boot-core stack",
-        &virt_boot_core_stack_page_desc(),
-        &kernel_virt_to_phys_page_slice(virt_boot_core_stack_page_desc()),
+    generic_mmu::kernel_map_at(
+        "Kernel data and bss",
+        &virt_data_region(),
+        &kernel_virt_to_phys_region(virt_data_region()),
         &AttributeFields {
             mem_attributes: MemAttributes::CacheableDRAM,
             acc_perms: AccessPermissions::ReadWrite,
@@ -164,18 +177,18 @@ mod tests {
     #[kernel_test]
     fn virt_mem_layout_sections_are_64KiB_aligned() {
         for i in [
-            virt_rx_page_desc,
-            virt_rw_page_desc,
-            virt_boot_core_stack_page_desc,
+            virt_boot_core_stack_region,
+            virt_code_region,
+            virt_data_region,
         ]
         .iter()
         {
-            let start: usize = i().start_addr().into_usize();
-            let end: usize = i().end_addr().into_usize();
+            let start = i().start_page_addr().into_inner();
+            let end_exclusive = i().end_exclusive_page_addr().into_inner();
 
-            assert_eq!(start % KernelGranule::SIZE, 0);
-            assert_eq!(end % KernelGranule::SIZE, 0);
-            assert!(end >= start);
+            assert!(start.is_page_aligned());
+            assert!(end_exclusive.is_page_aligned());
+            assert!(end_exclusive >= start);
         }
     }
 
@@ -183,17 +196,14 @@ mod tests {
     #[kernel_test]
     fn virt_mem_layout_has_no_overlaps() {
         let layout = [
-            virt_rx_page_desc(),
-            virt_rw_page_desc(),
-            virt_boot_core_stack_page_desc(),
+            virt_boot_core_stack_region(),
+            virt_code_region(),
+            virt_data_region(),
         ];
 
         for (i, first_range) in layout.iter().enumerate() {
             for second_range in layout.iter().skip(i + 1) {
-                assert!(!first_range.contains(second_range.start_addr()));
-                assert!(!first_range.contains(second_range.end_addr_inclusive()));
-                assert!(!second_range.contains(first_range.start_addr()));
-                assert!(!second_range.contains(first_range.end_addr_inclusive()));
+                assert!(!first_range.overlaps(second_range))
             }
         }
     }
diff --git a/14_virtual_mem_part2_mmio_remap/src/common.rs b/14_virtual_mem_part2_mmio_remap/src/common.rs
index 71443cfbd..a91ab7a37 100644
--- a/14_virtual_mem_part2_mmio_remap/src/common.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/common.rs
@@ -19,3 +19,11 @@ pub const fn align_down(value: usize, alignment: usize) -> usize {
 
     value & !(alignment - 1)
 }
+
+/// Align up.
+#[inline(always)]
+pub const fn align_up(value: usize, alignment: usize) -> usize {
+    assert!(alignment.is_power_of_two());
+
+    (value + alignment - 1) & !(alignment - 1)
+}
diff --git a/14_virtual_mem_part2_mmio_remap/src/lib.rs b/14_virtual_mem_part2_mmio_remap/src/lib.rs
index 78baa7d8a..6b944627a 100644
--- a/14_virtual_mem_part2_mmio_remap/src/lib.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/lib.rs
@@ -117,6 +117,7 @@
 #![feature(global_asm)]
 #![feature(linkage)]
 #![feature(panic_info_message)]
+#![feature(step_trait)]
 #![feature(trait_alias)]
 #![no_std]
 // Testing
@@ -182,6 +183,7 @@ pub fn test_runner(tests: &[&test_types::UnitTest]) {
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
     exception::handling_init();
+    memory::mmu::post_enable_init();
     bsp::console::qemu_bring_up_console();
 
     test_main();
diff --git a/14_virtual_mem_part2_mmio_remap/src/main.rs b/14_virtual_mem_part2_mmio_remap/src/main.rs
index 3052db666..750573fc2 100644
--- a/14_virtual_mem_part2_mmio_remap/src/main.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/main.rs
@@ -38,6 +38,8 @@ unsafe fn kernel_init() -> ! {
     }
     // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
 
+    memory::mmu::post_enable_init();
+
     // Bring up the drivers needed for printing first.
     for i in bsp::driver::driver_manager()
         .early_print_device_drivers()
diff --git a/14_virtual_mem_part2_mmio_remap/src/memory.rs b/14_virtual_mem_part2_mmio_remap/src/memory.rs
index 3de1d6077..360541734 100644
--- a/14_virtual_mem_part2_mmio_remap/src/memory.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/memory.rs
@@ -6,11 +6,11 @@
 
 pub mod mmu;
 
-use crate::common;
+use crate::{bsp, common};
 use core::{
     fmt,
     marker::PhantomData,
-    ops::{AddAssign, SubAssign},
+    ops::{Add, Sub},
 };
 
 //--------------------------------------------------------------------------------------------------
@@ -21,15 +21,15 @@ use core::{
 pub trait AddressType: Copy + Clone + PartialOrd + PartialEq {}
 
 /// Zero-sized type to mark a physical address.
-#[derive(Copy, Clone, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
 pub enum Physical {}
 
 /// Zero-sized type to mark a virtual address.
-#[derive(Copy, Clone, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
 pub enum Virtual {}
 
 /// Generic address type.
-#[derive(Copy, Clone, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
 pub struct Address<ATYPE: AddressType> {
     value: usize,
     _address_type: PhantomData<fn() -> ATYPE>,
@@ -51,59 +51,57 @@ impl<ATYPE: AddressType> Address<ATYPE> {
         }
     }
 
-    /// Align down.
-    pub const fn align_down(self, alignment: usize) -> Self {
-        let aligned = common::align_down(self.value, alignment);
-
-        Self {
-            value: aligned,
-            _address_type: PhantomData,
-        }
+    /// Convert to usize.
+    pub const fn as_usize(self) -> usize {
+        self.value
     }
 
-    /// Converts `Address` into an usize.
-    pub const fn into_usize(self) -> usize {
-        self.value
+    /// Align down to page size.
+    pub const fn align_down_page(self) -> Self {
+        let aligned = common::align_down(self.value, bsp::memory::mmu::KernelGranule::SIZE);
+
+        Self::new(aligned)
     }
-}
 
-impl<ATYPE: AddressType> core::ops::Add<usize> for Address<ATYPE> {
-    type Output = Self;
+    /// Align up to page size.
+    pub const fn align_up_page(self) -> Self {
+        let aligned = common::align_up(self.value, bsp::memory::mmu::KernelGranule::SIZE);
 
-    fn add(self, other: usize) -> Self {
-        Self {
-            value: self.value + other,
-            _address_type: PhantomData,
-        }
+        Self::new(aligned)
     }
-}
 
-impl<ATYPE: AddressType> AddAssign for Address<ATYPE> {
-    fn add_assign(&mut self, other: Self) {
-        *self = Self {
-            value: self.value + other.into_usize(),
-            _address_type: PhantomData,
-        };
+    /// Checks if the address is page aligned.
+    pub const fn is_page_aligned(&self) -> bool {
+        common::is_aligned(self.value, bsp::memory::mmu::KernelGranule::SIZE)
+    }
+
+    /// Return the address' offset into the corresponding page.
+    pub const fn offset_into_page(&self) -> usize {
+        self.value & bsp::memory::mmu::KernelGranule::MASK
     }
 }
 
-impl<ATYPE: AddressType> core::ops::Sub<usize> for Address<ATYPE> {
+impl<ATYPE: AddressType> Add<usize> for Address<ATYPE> {
     type Output = Self;
 
-    fn sub(self, other: usize) -> Self {
-        Self {
-            value: self.value - other,
-            _address_type: PhantomData,
+    #[inline(always)]
+    fn add(self, rhs: usize) -> Self::Output {
+        match self.value.checked_add(rhs) {
+            None => panic!("Overflow on Address::add"),
+            Some(x) => Self::new(x),
         }
     }
 }
 
-impl<ATYPE: AddressType> SubAssign for Address<ATYPE> {
-    fn sub_assign(&mut self, other: Self) {
-        *self = Self {
-            value: self.value - other.into_usize(),
-            _address_type: PhantomData,
-        };
+impl<ATYPE: AddressType> Sub<Address<ATYPE>> for Address<ATYPE> {
+    type Output = Self;
+
+    #[inline(always)]
+    fn sub(self, rhs: Address<ATYPE>) -> Self::Output {
+        match self.value.checked_sub(rhs.value) {
+            None => panic!("Overflow on Address::sub"),
+            Some(x) => Self::new(x),
+        }
     }
 }
 
@@ -135,3 +133,33 @@ impl fmt::Display for Address<Virtual> {
         write!(f, "{:04x}", q1)
     }
 }
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// Sanity of [Address] methods.
+    #[kernel_test]
+    fn address_type_method_sanity() {
+        let addr = Address::<Virtual>::new(bsp::memory::mmu::KernelGranule::SIZE + 100);
+
+        assert_eq!(
+            addr.align_down_page().as_usize(),
+            bsp::memory::mmu::KernelGranule::SIZE
+        );
+
+        assert_eq!(
+            addr.align_up_page().as_usize(),
+            bsp::memory::mmu::KernelGranule::SIZE * 2
+        );
+
+        assert_eq!(addr.is_page_aligned(), false);
+
+        assert_eq!(addr.offset_into_page(), 100);
+    }
+}
diff --git a/14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs b/14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
index 9f10ad72b..e833dd1a6 100644
--- a/14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
@@ -8,6 +8,7 @@
 #[path = "../_arch/aarch64/memory/mmu.rs"]
 mod arch_mmu;
 
+mod alloc;
 mod mapping_record;
 mod translation_table;
 mod types;
@@ -17,7 +18,7 @@ use crate::{
     memory::{Address, Physical, Virtual},
     synchronization, warn,
 };
-use core::fmt;
+use core::{fmt, num::NonZeroUsize};
 
 pub use types::*;
 
@@ -72,27 +73,35 @@ pub trait AssociatedTranslationTable {
 // Private Code
 //--------------------------------------------------------------------------------------------------
 use interface::MMU;
-use synchronization::interface::ReadWriteEx;
+use synchronization::interface::*;
 use translation_table::interface::TranslationTable;
 
-/// Map pages in the kernel's translation tables.
+/// Query the BSP for the reserved virtual addresses for MMIO remapping and initialize the kernel's
+/// MMIO VA allocator with it.
+fn kernel_init_mmio_va_allocator() {
+    let region = bsp::memory::mmu::virt_mmio_remap_region();
+
+    alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.initialize(region));
+}
+
+/// Map a region in the kernel's translation tables.
 ///
 /// No input checks done, input is passed through to the architectural implementation.
 ///
 /// # Safety
 ///
-/// - See `map_pages_at()`.
+/// - See `map_at()`.
 /// - Does not prevent aliasing.
-unsafe fn kernel_map_pages_at_unchecked(
+unsafe fn kernel_map_at_unchecked(
     name: &'static str,
-    virt_pages: &PageSliceDescriptor<Virtual>,
-    phys_pages: &PageSliceDescriptor<Physical>,
+    virt_region: &MemoryRegion<Virtual>,
+    phys_region: &MemoryRegion<Physical>,
     attr: &AttributeFields,
 ) -> Result<(), &'static str> {
     bsp::memory::mmu::kernel_translation_tables()
-        .write(|tables| tables.map_pages_at(virt_pages, phys_pages, attr))?;
+        .write(|tables| tables.map_at(virt_region, phys_region, attr))?;
 
-    if let Err(x) = mapping_record::kernel_add(name, virt_pages, phys_pages, attr) {
+    if let Err(x) = mapping_record::kernel_add(name, virt_region, phys_region, attr) {
         warn!("{}", x);
     }
 
@@ -146,27 +155,25 @@ impl<const AS_SIZE: usize> AddressSpace<AS_SIZE> {
     }
 }
 
-/// Raw mapping of virtual to physical pages in the kernel translation tables.
+/// Raw mapping of a virtual to physical region in the kernel translation tables.
 ///
 /// Prevents mapping into the MMIO range of the tables.
 ///
 /// # Safety
 ///
-/// - See `kernel_map_pages_at_unchecked()`.
+/// - See `kernel_map_at_unchecked()`.
 /// - Does not prevent aliasing. Currently, the callers must be trusted.
-pub unsafe fn kernel_map_pages_at(
+pub unsafe fn kernel_map_at(
     name: &'static str,
-    virt_pages: &PageSliceDescriptor<Virtual>,
-    phys_pages: &PageSliceDescriptor<Physical>,
+    virt_pages: &MemoryRegion<Virtual>,
+    phys_pages: &MemoryRegion<Physical>,
     attr: &AttributeFields,
 ) -> Result<(), &'static str> {
-    let is_mmio = bsp::memory::mmu::kernel_translation_tables()
-        .read(|tables| tables.is_virt_page_slice_mmio(virt_pages));
-    if is_mmio {
+    if bsp::memory::mmu::virt_mmio_remap_region().overlaps(virt_pages) {
         return Err("Attempt to manually map into MMIO region");
     }
 
-    kernel_map_pages_at_unchecked(name, virt_pages, phys_pages, attr)?;
+    kernel_map_at_unchecked(name, virt_pages, phys_pages, attr)?;
 
     Ok(())
 }
@@ -177,30 +184,33 @@ pub unsafe fn kernel_map_pages_at(
 ///
 /// # Safety
 ///
-/// - Same as `kernel_map_pages_at_unchecked()`, minus the aliasing part.
+/// - Same as `kernel_map_at_unchecked()`, minus the aliasing part.
 pub unsafe fn kernel_map_mmio(
     name: &'static str,
     mmio_descriptor: &MMIODescriptor,
 ) -> Result<Address<Virtual>, &'static str> {
-    let phys_pages: PageSliceDescriptor<Physical> = (*mmio_descriptor).into();
-    let offset_into_start_page =
-        mmio_descriptor.start_addr().into_usize() & bsp::memory::mmu::KernelGranule::MASK;
+    let phys_region = MemoryRegion::from(*mmio_descriptor);
+    let offset_into_start_page = mmio_descriptor.start_addr().offset_into_page();
 
-    // Check if an identical page slice has been mapped for another driver. If so, reuse it.
+    // Check if an identical region has been mapped for another driver. If so, reuse it.
     let virt_addr = if let Some(addr) =
         mapping_record::kernel_find_and_insert_mmio_duplicate(mmio_descriptor, name)
     {
         addr
-    // Otherwise, allocate a new virtual page slice and map it.
+    // Otherwise, allocate a new region and map it.
     } else {
-        let virt_pages: PageSliceDescriptor<Virtual> =
-            bsp::memory::mmu::kernel_translation_tables()
-                .write(|tables| tables.next_mmio_virt_page_slice(phys_pages.num_pages()))?;
+        let num_pages = match NonZeroUsize::new(phys_region.num_pages()) {
+            None => return Err("Requested 0 pages"),
+            Some(x) => x,
+        };
+
+        let virt_region =
+            alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.alloc(num_pages))?;
 
-        kernel_map_pages_at_unchecked(
+        kernel_map_at_unchecked(
             name,
-            &virt_pages,
-            &phys_pages,
+            &virt_region,
+            &phys_region,
             &AttributeFields {
                 mem_attributes: MemAttributes::Device,
                 acc_perms: AccessPermissions::ReadWrite,
@@ -208,7 +218,7 @@ pub unsafe fn kernel_map_mmio(
             },
         )?;
 
-        virt_pages.start_addr()
+        virt_region.start_addr()
     };
 
     Ok(virt_addr + offset_into_start_page)
@@ -242,7 +252,50 @@ pub unsafe fn enable_mmu_and_caching(
     arch_mmu::mmu().enable_mmu_and_caching(phys_tables_base_addr)
 }
 
+/// Finish initialization of the MMU subsystem.
+pub fn post_enable_init() {
+    kernel_init_mmio_va_allocator();
+}
+
 /// Human-readable print of all recorded kernel mappings.
 pub fn kernel_print_mappings() {
     mapping_record::kernel_print()
 }
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use crate::memory::mmu::{AccessPermissions, MemAttributes, PageAddress};
+    use test_macros::kernel_test;
+
+    /// Check that you cannot map into the MMIO VA range from kernel_map_at().
+    #[kernel_test]
+    fn no_manual_mmio_map() {
+        let phys_start_page_addr: PageAddress<Physical> = PageAddress::from(0);
+        let phys_end_exclusive_page_addr: PageAddress<Physical> =
+            phys_start_page_addr.checked_offset(5).unwrap();
+        let phys_region = MemoryRegion::new(phys_start_page_addr, phys_end_exclusive_page_addr);
+
+        let num_pages = NonZeroUsize::new(phys_region.num_pages()).unwrap();
+        let virt_region = alloc::kernel_mmio_va_allocator()
+            .lock(|allocator| allocator.alloc(num_pages))
+            .unwrap();
+
+        let attr = AttributeFields {
+            mem_attributes: MemAttributes::CacheableDRAM,
+            acc_perms: AccessPermissions::ReadWrite,
+            execute_never: true,
+        };
+
+        unsafe {
+            assert_eq!(
+                kernel_map_at("test", &virt_region, &phys_region, &attr),
+                Err("Attempt to manually map into MMIO region")
+            )
+        };
+    }
+}
diff --git a/14_virtual_mem_part2_mmio_remap/src/memory/mmu/alloc.rs b/14_virtual_mem_part2_mmio_remap/src/memory/mmu/alloc.rs
new file mode 100644
index 000000000..a63df0978
--- /dev/null
+++ b/14_virtual_mem_part2_mmio_remap/src/memory/mmu/alloc.rs
@@ -0,0 +1,70 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Allocation.
+
+use super::MemoryRegion;
+use crate::{
+    memory::{AddressType, Virtual},
+    synchronization::IRQSafeNullLock,
+    warn,
+};
+use core::num::NonZeroUsize;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// A page allocator that can be lazyily initialized.
+pub struct PageAllocator<ATYPE: AddressType> {
+    pool: Option<MemoryRegion<ATYPE>>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static KERNEL_MMIO_VA_ALLOCATOR: IRQSafeNullLock<PageAllocator<Virtual>> =
+    IRQSafeNullLock::new(PageAllocator::new());
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the kernel's MMIO virtual address allocator.
+pub fn kernel_mmio_va_allocator() -> &'static IRQSafeNullLock<PageAllocator<Virtual>> {
+    &KERNEL_MMIO_VA_ALLOCATOR
+}
+
+impl<ATYPE: AddressType> PageAllocator<ATYPE> {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self { pool: None }
+    }
+
+    /// Initialize the allocator.
+    pub fn initialize(&mut self, pool: MemoryRegion<ATYPE>) {
+        if self.pool.is_some() {
+            warn!("Already initialized");
+            return;
+        }
+
+        self.pool = Some(pool);
+    }
+
+    /// Allocate a number of pages.
+    pub fn alloc(
+        &mut self,
+        num_requested_pages: NonZeroUsize,
+    ) -> Result<MemoryRegion<ATYPE>, &'static str> {
+        if self.pool.is_none() {
+            return Err("Allocator not initialized");
+        }
+
+        self.pool
+            .as_mut()
+            .unwrap()
+            .take_first_n_pages(num_requested_pages)
+    }
+}
diff --git a/14_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs b/14_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs
index 16c27e38c..eba13ef90 100644
--- a/14_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs
@@ -5,10 +5,10 @@
 //! A record of mapped pages.
 
 use super::{
-    AccessPermissions, Address, AttributeFields, MMIODescriptor, MemAttributes,
-    PageSliceDescriptor, Physical, Virtual,
+    AccessPermissions, Address, AttributeFields, MMIODescriptor, MemAttributes, MemoryRegion,
+    Physical, Virtual,
 };
-use crate::{info, synchronization, synchronization::InitStateLock, warn};
+use crate::{bsp, info, synchronization, synchronization::InitStateLock, warn};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -19,8 +19,9 @@ use crate::{info, synchronization, synchronization::InitStateLock, warn};
 #[derive(Copy, Clone)]
 struct MappingRecordEntry {
     pub users: [Option<&'static str>; 5],
-    pub phys_pages: PageSliceDescriptor<Physical>,
+    pub phys_start_addr: Address<Physical>,
     pub virt_start_addr: Address<Virtual>,
+    pub num_pages: usize,
     pub attribute_fields: AttributeFields,
 }
 
@@ -42,14 +43,15 @@ static KERNEL_MAPPING_RECORD: InitStateLock<MappingRecord> =
 impl MappingRecordEntry {
     pub fn new(
         name: &'static str,
-        virt_pages: &PageSliceDescriptor<Virtual>,
-        phys_pages: &PageSliceDescriptor<Physical>,
+        virt_region: &MemoryRegion<Virtual>,
+        phys_region: &MemoryRegion<Physical>,
         attr: &AttributeFields,
     ) -> Self {
         Self {
             users: [Some(name), None, None, None, None],
-            phys_pages: *phys_pages,
-            virt_start_addr: virt_pages.start_addr(),
+            phys_start_addr: phys_region.start_addr(),
+            virt_start_addr: virt_region.start_addr(),
+            num_pages: phys_region.num_pages(),
             attribute_fields: *attr,
         }
     }
@@ -84,26 +86,41 @@ impl MappingRecord {
 
     fn find_duplicate(
         &mut self,
-        phys_pages: &PageSliceDescriptor<Physical>,
+        phys_region: &MemoryRegion<Physical>,
     ) -> Option<&mut MappingRecordEntry> {
         self.inner
             .iter_mut()
             .filter(|x| x.is_some())
             .map(|x| x.as_mut().unwrap())
             .filter(|x| x.attribute_fields.mem_attributes == MemAttributes::Device)
-            .find(|x| x.phys_pages == *phys_pages)
+            .find(|x| {
+                if x.phys_start_addr != phys_region.start_addr() {
+                    return false;
+                }
+
+                if x.num_pages != phys_region.num_pages() {
+                    return false;
+                }
+
+                true
+            })
     }
 
     pub fn add(
         &mut self,
         name: &'static str,
-        virt_pages: &PageSliceDescriptor<Virtual>,
-        phys_pages: &PageSliceDescriptor<Physical>,
+        virt_region: &MemoryRegion<Virtual>,
+        phys_region: &MemoryRegion<Physical>,
         attr: &AttributeFields,
     ) -> Result<(), &'static str> {
         let x = self.find_next_free()?;
 
-        *x = Some(MappingRecordEntry::new(name, virt_pages, phys_pages, attr));
+        *x = Some(MappingRecordEntry::new(
+            name,
+            virt_region,
+            phys_region,
+            attr,
+        ));
         Ok(())
     }
 
@@ -119,11 +136,11 @@ impl MappingRecord {
         info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
 
         for i in self.inner.iter().flatten() {
+            let size = i.num_pages * bsp::memory::mmu::KernelGranule::SIZE;
             let virt_start = i.virt_start_addr;
-            let virt_end_inclusive = virt_start + i.phys_pages.size() - 1;
-            let phys_start = i.phys_pages.start_addr();
-            let phys_end_inclusive = i.phys_pages.end_addr_inclusive();
-            let size = i.phys_pages.size();
+            let virt_end_inclusive = virt_start + (size - 1);
+            let phys_start = i.phys_start_addr;
+            let phys_end_inclusive = phys_start + (size - 1);
 
             let (size, unit) = if (size >> MIB_RSHIFT) > 0 {
                 (size >> MIB_RSHIFT, "MiB")
@@ -186,21 +203,21 @@ use synchronization::interface::ReadWriteEx;
 /// Add an entry to the mapping info record.
 pub fn kernel_add(
     name: &'static str,
-    virt_pages: &PageSliceDescriptor<Virtual>,
-    phys_pages: &PageSliceDescriptor<Physical>,
+    virt_region: &MemoryRegion<Virtual>,
+    phys_region: &MemoryRegion<Physical>,
     attr: &AttributeFields,
 ) -> Result<(), &'static str> {
-    KERNEL_MAPPING_RECORD.write(|mr| mr.add(name, virt_pages, phys_pages, attr))
+    KERNEL_MAPPING_RECORD.write(|mr| mr.add(name, virt_region, phys_region, attr))
 }
 
 pub fn kernel_find_and_insert_mmio_duplicate(
     mmio_descriptor: &MMIODescriptor,
     new_user: &'static str,
 ) -> Option<Address<Virtual>> {
-    let phys_pages: PageSliceDescriptor<Physical> = (*mmio_descriptor).into();
+    let phys_region: MemoryRegion<Physical> = (*mmio_descriptor).into();
 
     KERNEL_MAPPING_RECORD.write(|mr| {
-        let dup = mr.find_duplicate(&phys_pages)?;
+        let dup = mr.find_duplicate(&phys_region)?;
 
         if let Err(x) = dup.add_user(new_user) {
             warn!("{}", x);
diff --git a/14_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs b/14_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs
index 65af83cb1..462e278be 100644
--- a/14_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs
@@ -8,10 +8,8 @@
 #[path = "../../_arch/aarch64/memory/mmu/translation_table.rs"]
 mod arch_translation_table;
 
-use crate::memory::{
-    mmu::{AttributeFields, PageSliceDescriptor},
-    Address, Physical, Virtual,
-};
+use super::{AttributeFields, MemoryRegion};
+use crate::memory::{Address, Physical, Virtual};
 
 //--------------------------------------------------------------------------------------------------
 // Architectural Public Reexports
@@ -40,7 +38,7 @@ pub mod interface {
         /// The translation table's base address to be used for programming the MMU.
         fn phys_base_address(&self) -> Address<Physical>;
 
-        /// Map the given virtual pages to the given physical pages.
+        /// Map the given virtual memory region to the given physical memory region.
         ///
         /// # Safety
         ///
@@ -49,27 +47,12 @@ pub mod interface {
         ///   mapping to the same physical memory using multiple virtual addresses, which would
         ///   break Rust's ownership assumptions. This should be protected against in the kernel's
         ///   generic MMU code.
-        unsafe fn map_pages_at(
+        unsafe fn map_at(
             &mut self,
-            virt_pages: &PageSliceDescriptor<Virtual>,
-            phys_pages: &PageSliceDescriptor<Physical>,
+            virt_region: &MemoryRegion<Virtual>,
+            phys_region: &MemoryRegion<Physical>,
             attr: &AttributeFields,
         ) -> Result<(), &'static str>;
-
-        /// Obtain a free virtual page slice in the MMIO region.
-        ///
-        /// The "MMIO region" is a distinct region of the implementor's choice, which allows
-        /// differentiating MMIO addresses from others. This can speed up debugging efforts.
-        /// Ideally, those MMIO addresses are also standing out visually so that a human eye can
-        /// identify them. For example, by allocating them from near the end of the virtual address
-        /// space.
-        fn next_mmio_virt_page_slice(
-            &mut self,
-            num_pages: usize,
-        ) -> Result<PageSliceDescriptor<Virtual>, &'static str>;
-
-        /// Check if a virtual page splice is in the "MMIO region".
-        fn is_virt_page_slice_mmio(&self, virt_pages: &PageSliceDescriptor<Virtual>) -> bool;
     }
 }
 
@@ -80,7 +63,7 @@ pub mod interface {
 #[cfg(test)]
 mod tests {
     use super::*;
-    use crate::bsp;
+    use crate::memory::mmu::{AccessPermissions, MemAttributes, PageAddress};
     use arch_translation_table::MinSizeTranslationTable;
     use interface::TranslationTable;
     use test_macros::kernel_test;
@@ -93,20 +76,23 @@ mod tests {
 
         tables.init();
 
-        let x = tables.next_mmio_virt_page_slice(0);
-        assert!(x.is_err());
+        let virt_start_page_addr: PageAddress<Virtual> = PageAddress::from(0);
+        let virt_end_exclusive_page_addr: PageAddress<Virtual> =
+            virt_start_page_addr.checked_offset(5).unwrap();
 
-        let x = tables.next_mmio_virt_page_slice(1_0000_0000);
-        assert!(x.is_err());
+        let phys_start_page_addr: PageAddress<Physical> = PageAddress::from(0);
+        let phys_end_exclusive_page_addr: PageAddress<Physical> =
+            phys_start_page_addr.checked_offset(5).unwrap();
 
-        let x = tables.next_mmio_virt_page_slice(2).unwrap();
-        assert_eq!(x.size(), bsp::memory::mmu::KernelGranule::SIZE * 2);
+        let virt_region = MemoryRegion::new(virt_start_page_addr, virt_end_exclusive_page_addr);
+        let phys_region = MemoryRegion::new(phys_start_page_addr, phys_end_exclusive_page_addr);
 
-        assert_eq!(tables.is_virt_page_slice_mmio(&x), true);
+        let attr = AttributeFields {
+            mem_attributes: MemAttributes::CacheableDRAM,
+            acc_perms: AccessPermissions::ReadWrite,
+            execute_never: true,
+        };
 
-        assert_eq!(
-            tables.is_virt_page_slice_mmio(&PageSliceDescriptor::from_addr(Address::new(0), 1)),
-            false
-        );
+        unsafe { assert_eq!(tables.map_at(&virt_region, &phys_region, &attr), Ok(())) };
     }
 }
diff --git a/14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs b/14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
index 0f2ad428b..3ea746f48 100644
--- a/14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
@@ -8,29 +8,28 @@ use crate::{
     bsp, common,
     memory::{Address, AddressType, Physical},
 };
-use core::{convert::From, marker::PhantomData};
+use core::{convert::From, iter::Step, num::NonZeroUsize, ops::Range};
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
-/// Generic page type.
-#[repr(C)]
-pub struct Page<ATYPE: AddressType> {
-    inner: [u8; bsp::memory::mmu::KernelGranule::SIZE],
-    _address_type: PhantomData<ATYPE>,
+/// A wrapper type around [Address] that ensures page alignment.
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+pub struct PageAddress<ATYPE: AddressType> {
+    inner: Address<ATYPE>,
 }
 
-/// Type describing a slice of pages.
-#[derive(Copy, Clone, PartialOrd, PartialEq)]
-pub struct PageSliceDescriptor<ATYPE: AddressType> {
-    start: Address<ATYPE>,
-    num_pages: usize,
+/// A type that describes a region of memory in quantities of pages.
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+pub struct MemoryRegion<ATYPE: AddressType> {
+    start: PageAddress<ATYPE>,
+    end_exclusive: PageAddress<ATYPE>,
 }
 
 /// Architecture agnostic memory attributes.
 #[allow(missing_docs)]
-#[derive(Copy, Clone, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
 pub enum MemAttributes {
     CacheableDRAM,
     Device,
@@ -38,7 +37,7 @@ pub enum MemAttributes {
 
 /// Architecture agnostic access permissions.
 #[allow(missing_docs)]
-#[derive(Copy, Clone)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
 pub enum AccessPermissions {
     ReadOnly,
     ReadWrite,
@@ -46,7 +45,7 @@ pub enum AccessPermissions {
 
 /// Collection of memory attributes.
 #[allow(missing_docs)]
-#[derive(Copy, Clone)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
 pub struct AttributeFields {
     pub mem_attributes: MemAttributes,
     pub acc_perms: AccessPermissions,
@@ -57,7 +56,7 @@ pub struct AttributeFields {
 #[derive(Copy, Clone)]
 pub struct MMIODescriptor {
     start_addr: Address<Physical>,
-    size: usize,
+    end_addr_exclusive: Address<Physical>,
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -65,90 +64,202 @@ pub struct MMIODescriptor {
 //--------------------------------------------------------------------------------------------------
 
 //------------------------------------------------------------------------------
-// Page
+// PageAddress
 //------------------------------------------------------------------------------
+impl<ATYPE: AddressType> PageAddress<ATYPE> {
+    /// Unwraps the value.
+    pub fn into_inner(self) -> Address<ATYPE> {
+        self.inner
+    }
 
-impl<ATYPE: AddressType> Page<ATYPE> {
-    /// Get a pointer to the instance.
-    pub const fn as_ptr(&self) -> *const Page<ATYPE> {
-        self as *const _
+    /// Calculates the offset from the page address.
+    ///
+    /// `count` is in units of [PageAddress]. For example, a count of 2 means `result = self + 2 *
+    /// page_size`.
+    pub fn checked_offset(self, count: isize) -> Option<Self> {
+        if count == 0 {
+            return Some(self);
+        }
+
+        let delta = (count.abs() as usize).checked_mul(bsp::memory::mmu::KernelGranule::SIZE)?;
+        let result = if count.is_positive() {
+            self.inner.as_usize().checked_add(delta)?
+        } else {
+            self.inner.as_usize().checked_sub(delta)?
+        };
+
+        Some(Self {
+            inner: Address::new(result),
+        })
     }
 }
 
-//------------------------------------------------------------------------------
-// PageSliceDescriptor
-//------------------------------------------------------------------------------
+impl<ATYPE: AddressType> From<usize> for PageAddress<ATYPE> {
+    fn from(addr: usize) -> Self {
+        assert!(
+            common::is_aligned(addr, bsp::memory::mmu::KernelGranule::SIZE),
+            "Input usize not page aligned"
+        );
 
-impl<ATYPE: AddressType> PageSliceDescriptor<ATYPE> {
-    /// Create an instance.
-    pub const fn from_addr(start: Address<ATYPE>, num_pages: usize) -> Self {
-        assert!(common::is_aligned(
-            start.into_usize(),
-            bsp::memory::mmu::KernelGranule::SIZE
-        ));
-        assert!(num_pages > 0);
+        Self {
+            inner: Address::new(addr),
+        }
+    }
+}
+
+impl<ATYPE: AddressType> From<Address<ATYPE>> for PageAddress<ATYPE> {
+    fn from(addr: Address<ATYPE>) -> Self {
+        assert!(addr.is_page_aligned(), "Input Address not page aligned");
+
+        Self { inner: addr }
+    }
+}
+
+impl<ATYPE: AddressType> Step for PageAddress<ATYPE> {
+    fn steps_between(start: &Self, end: &Self) -> Option<usize> {
+        if start > end {
+            return None;
+        }
+
+        // Since start <= end, do unchecked arithmetic.
+        Some(
+            (end.inner.as_usize() - start.inner.as_usize())
+                >> bsp::memory::mmu::KernelGranule::SHIFT,
+        )
+    }
 
-        Self { start, num_pages }
+    fn forward_checked(start: Self, count: usize) -> Option<Self> {
+        start.checked_offset(count as isize)
     }
 
-    /// Return a pointer to the first page of the described slice.
-    const fn first_page_ptr(&self) -> *const Page<ATYPE> {
-        self.start.into_usize() as *const _
+    fn backward_checked(start: Self, count: usize) -> Option<Self> {
+        start.checked_offset(-(count as isize))
     }
+}
+
+//------------------------------------------------------------------------------
+// MemoryRegion
+//------------------------------------------------------------------------------
+impl<ATYPE: AddressType> MemoryRegion<ATYPE> {
+    /// Create an instance.
+    pub fn new(start: PageAddress<ATYPE>, end_exclusive: PageAddress<ATYPE>) -> Self {
+        assert!(start <= end_exclusive);
 
-    /// Return the number of pages the slice describes.
-    pub const fn num_pages(&self) -> usize {
-        self.num_pages
+        Self {
+            start,
+            end_exclusive,
+        }
     }
 
-    /// Return the memory size this descriptor spans.
-    pub const fn size(&self) -> usize {
-        self.num_pages * bsp::memory::mmu::KernelGranule::SIZE
+    fn as_range(&self) -> Range<PageAddress<ATYPE>> {
+        self.into_iter()
     }
 
-    /// Return the start address.
-    pub const fn start_addr(&self) -> Address<ATYPE> {
+    /// Returns the start page address.
+    pub fn start_page_addr(&self) -> PageAddress<ATYPE> {
         self.start
     }
 
-    /// Return the exclusive end address.
-    pub fn end_addr(&self) -> Address<ATYPE> {
-        self.start + self.size()
+    /// Returns the start address.
+    pub fn start_addr(&self) -> Address<ATYPE> {
+        self.start.into_inner()
     }
 
-    /// Return the inclusive end address.
-    pub fn end_addr_inclusive(&self) -> Address<ATYPE> {
-        self.start + (self.size() - 1)
+    /// Returns the exclusive end page address.
+    pub fn end_exclusive_page_addr(&self) -> PageAddress<ATYPE> {
+        self.end_exclusive
     }
 
-    /// Check if an address is contained within this descriptor.
+    /// Returns the exclusive end page address.
+    pub fn end_inclusive_page_addr(&self) -> PageAddress<ATYPE> {
+        self.end_exclusive.checked_offset(-1).unwrap()
+    }
+
+    /// Checks if self contains an address.
     pub fn contains(&self, addr: Address<ATYPE>) -> bool {
-        (addr >= self.start_addr()) && (addr <= self.end_addr_inclusive())
+        let page_addr = PageAddress::from(addr.align_down_page());
+        self.as_range().contains(&page_addr)
     }
 
-    /// Return a non-mutable slice of pages.
+    /// Checks if there is an overlap with another memory region.
+    pub fn overlaps(&self, other_region: &Self) -> bool {
+        let self_range = self.as_range();
+
+        self_range.contains(&other_region.start_page_addr())
+            || self_range.contains(&other_region.end_inclusive_page_addr())
+    }
+
+    /// Returns the number of pages contained in this region.
+    pub fn num_pages(&self) -> usize {
+        PageAddress::steps_between(&self.start, &self.end_exclusive).unwrap()
+    }
+
+    /// Returns the size in bytes of this region.
+    pub fn size(&self) -> usize {
+        // Invariant: start <= end_exclusive, so do unchecked arithmetic.
+        let end_exclusive = self.end_exclusive.into_inner().as_usize();
+        let start = self.start.into_inner().as_usize();
+
+        end_exclusive - start
+    }
+
+    /// Splits the MemoryRegion like:
     ///
-    /// # Safety
+    /// --------------------------------------------------------------------------------
+    /// |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |
+    /// --------------------------------------------------------------------------------
+    ///   ^                               ^                                       ^
+    ///   |                               |                                       |
+    ///   left_start     left_end_exclusive                                       |
+    ///                                                                           |
+    ///                                   ^                                       |
+    ///                                   |                                       |
+    ///                                   right_start           right_end_exclusive
     ///
-    /// - Same as applies for `core::slice::from_raw_parts`.
-    pub unsafe fn as_slice(&self) -> &[Page<ATYPE>] {
-        core::slice::from_raw_parts(self.first_page_ptr(), self.num_pages)
+    /// Left region is returned to the caller. Right region is the new region for this struct.
+    pub fn take_first_n_pages(&mut self, num_pages: NonZeroUsize) -> Result<Self, &'static str> {
+        let count: usize = num_pages.into();
+
+        let left_end_exclusive = self.start.checked_offset(count as isize);
+        let left_end_exclusive = match left_end_exclusive {
+            None => return Err("Overflow while calculating left_end_exclusive"),
+            Some(x) => x,
+        };
+
+        if left_end_exclusive > self.end_exclusive {
+            return Err("Not enough free pages");
+        }
+
+        let allocation = Self {
+            start: self.start,
+            end_exclusive: left_end_exclusive,
+        };
+        self.start = left_end_exclusive;
+
+        Ok(allocation)
     }
 }
 
-impl From<MMIODescriptor> for PageSliceDescriptor<Physical> {
-    fn from(desc: MMIODescriptor) -> Self {
-        let start_page_addr = desc
-            .start_addr
-            .align_down(bsp::memory::mmu::KernelGranule::SIZE);
+impl<ATYPE: AddressType> IntoIterator for MemoryRegion<ATYPE> {
+    type Item = PageAddress<ATYPE>;
+    type IntoIter = Range<Self::Item>;
 
-        let len = ((desc.end_addr_inclusive().into_usize() - start_page_addr.into_usize())
-            >> bsp::memory::mmu::KernelGranule::SHIFT)
-            + 1;
+    fn into_iter(self) -> Self::IntoIter {
+        Range {
+            start: self.start,
+            end: self.end_exclusive,
+        }
+    }
+}
+
+impl From<MMIODescriptor> for MemoryRegion<Physical> {
+    fn from(desc: MMIODescriptor) -> Self {
+        let start = PageAddress::from(desc.start_addr.align_down_page());
+        let end_exclusive = PageAddress::from(desc.end_addr_exclusive().align_up_page());
 
         Self {
-            start: start_page_addr,
-            num_pages: len,
+            start,
+            end_exclusive,
         }
     }
 }
@@ -161,8 +272,12 @@ impl MMIODescriptor {
     /// Create an instance.
     pub const fn new(start_addr: Address<Physical>, size: usize) -> Self {
         assert!(size > 0);
+        let end_addr_exclusive = Address::new(start_addr.as_usize() + size);
 
-        Self { start_addr, size }
+        Self {
+            start_addr,
+            end_addr_exclusive,
+        }
     }
 
     /// Return the start address.
@@ -170,14 +285,9 @@ impl MMIODescriptor {
         self.start_addr
     }
 
-    /// Return the inclusive end address.
-    pub fn end_addr_inclusive(&self) -> Address<Physical> {
-        self.start_addr + (self.size - 1)
-    }
-
-    /// Return the size.
-    pub const fn size(&self) -> usize {
-        self.size
+    /// Return the exclusive end address.
+    pub fn end_addr_exclusive(&self) -> Address<Physical> {
+        self.end_addr_exclusive
     }
 }
 
@@ -188,14 +298,76 @@ impl MMIODescriptor {
 #[cfg(test)]
 mod tests {
     use super::*;
+    use crate::memory::Virtual;
     use test_macros::kernel_test;
 
-    /// Check if the size of `struct Page` is as expected.
+    /// Sanity of [PageAddress] methods.
     #[kernel_test]
-    fn size_of_page_equals_granule_size() {
+    fn pageaddress_type_method_sanity() {
+        let page_addr: PageAddress<Virtual> =
+            PageAddress::from(bsp::memory::mmu::KernelGranule::SIZE * 2);
+
+        assert_eq!(
+            page_addr.checked_offset(-2),
+            Some(PageAddress::<Virtual>::from(0))
+        );
+
+        assert_eq!(
+            page_addr.checked_offset(2),
+            Some(PageAddress::<Virtual>::from(
+                bsp::memory::mmu::KernelGranule::SIZE * 4
+            ))
+        );
+
         assert_eq!(
-            core::mem::size_of::<Page<Physical>>(),
-            bsp::memory::mmu::KernelGranule::SIZE
+            PageAddress::<Virtual>::from(0).checked_offset(0),
+            Some(PageAddress::<Virtual>::from(0))
         );
+        assert_eq!(PageAddress::<Virtual>::from(0).checked_offset(-1), None);
+
+        let max_page_addr = Address::<Virtual>::new(usize::MAX).align_down_page();
+        assert_eq!(
+            PageAddress::<Virtual>::from(max_page_addr).checked_offset(1),
+            None
+        );
+
+        let zero = PageAddress::<Virtual>::from(0);
+        let three = PageAddress::<Virtual>::from(bsp::memory::mmu::KernelGranule::SIZE * 3);
+        assert_eq!(PageAddress::steps_between(&zero, &three), Some(3));
+    }
+
+    /// Sanity of [MemoryRegion] methods.
+    #[kernel_test]
+    fn memoryregion_type_method_sanity() {
+        let zero = PageAddress::<Virtual>::from(0);
+        let zero_region = MemoryRegion::new(zero, zero);
+        assert_eq!(zero_region.num_pages(), 0);
+        assert_eq!(zero_region.size(), 0);
+
+        let one = PageAddress::<Virtual>::from(bsp::memory::mmu::KernelGranule::SIZE);
+        let one_region = MemoryRegion::new(zero, one);
+        assert_eq!(one_region.num_pages(), 1);
+        assert_eq!(one_region.size(), bsp::memory::mmu::KernelGranule::SIZE);
+
+        let three = PageAddress::<Virtual>::from(bsp::memory::mmu::KernelGranule::SIZE * 3);
+        let mut three_region = MemoryRegion::new(zero, three);
+        assert!(three_region.contains(zero.into_inner()));
+        assert!(!three_region.contains(three.into_inner()));
+        assert!(three_region.overlaps(&one_region));
+
+        let allocation = three_region
+            .take_first_n_pages(NonZeroUsize::new(2).unwrap())
+            .unwrap();
+        assert_eq!(allocation.num_pages(), 2);
+        assert_eq!(three_region.num_pages(), 1);
+
+        let mut count = 0;
+        for i in allocation.into_iter() {
+            assert_eq!(
+                i.into_inner().as_usize(),
+                count * bsp::memory::mmu::KernelGranule::SIZE
+            );
+            count = count + 1;
+        }
     }
 }
diff --git a/14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs b/14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
index 0bb1cbba0..1979a66c4 100644
--- a/14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
+++ b/14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
@@ -24,7 +24,6 @@ unsafe fn kernel_init() -> ! {
     use libkernel::driver::interface::DriverManager;
 
     exception::handling_init();
-    bsp::console::qemu_bring_up_console();
 
     // This line will be printed as the test header.
     println!("Testing synchronous exception handling by causing a page fault");
@@ -43,6 +42,9 @@ unsafe fn kernel_init() -> ! {
     }
     // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
 
+    memory::mmu::post_enable_init();
+    bsp::console::qemu_bring_up_console();
+
     // Bring up the drivers needed for printing first.
     for i in bsp::driver::driver_manager()
         .early_print_device_drivers()
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index 3e7ca4bdf..a8d6f8f3c 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -96,7 +96,7 @@ uint64_t* get_address_of_global(void) {
 
 Let's compile and link this using the following linker script:
 
-```lds
+```ld.s
 SECTIONS
 {
     . =  0x80000;
@@ -157,10 +157,10 @@ that our function returns the correct address of our global data word.
 
 Now lets link this to the most significant area of memory:
 
-```lds
+```ld.s
 SECTIONS
 {
-    . =  0xffff000000000000; <--- Only line changed in the linker script!
+    . =  0xffff000000000000; /* <--- Only line changed in the linker script! */
 
     .text : {
 
@@ -462,13 +462,15 @@ This is ensured using an attribute on the table's instance definition in
 
 ```rust
 #[link_section = ".data"]
+#[no_mangle]
 static KERNEL_TABLES: InitStateLock<KernelTranslationTable> =
     InitStateLock::new(KernelTranslationTable::new_for_precompute());
 ```
 
 The `new_for_precompute()` is a new constructor in the the respective `_arch` code that ensures some
 struct members that are not the translation table entries themselves are initialized properly for
-the precompute use-case.
+the precompute use-case. The additional `#[no_mangle]` is added because we will need to parse the
+symbol from the `translation table tool`, and this is easier with unmangled names.
 
 In the `BSP` code, there is also a new file called `kernel_virt_addr_space_size.ld`, which contains
 the kernel's virtual address space size. This file gets included in both, the `link.ld` linker
@@ -542,7 +544,8 @@ already, the only missing piece that's left is the offline computation of the tr
 
 The tool for translation table computation is located in the folder `translation_table_tool` in the
 root directory. For ease of use, it is written in `Ruby` 💎. The code is organized into `BSP` and
-`arch` parts just like the kernel's `Rust` code:
+`arch` parts just like the kernel's `Rust` code, and also has a class for processing the kernel
+`ELF` file:
 
 ```console
 $ tree translation_table_tool
@@ -551,9 +554,10 @@ translation_table_tool
 ├── arch.rb
 ├── bsp.rb
 ├── generic.rb
+├── kernel_elf.rb
 └── main.rb
 
-0 directories, 4 files
+0 directories, 5 files
 ```
 
 Especially the `arch` part, which deals with compiling the translation table entries, will contain
@@ -577,44 +581,19 @@ $(KERNEL_BIN): $(KERNEL_ELF)
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
 ```
 
-In `main.rb`, the `BSP`-part of the tool is executed first. This part is mostly concerned with
-parsing symbols from the ELF file that are needed for the computation of the tables. Here is an
-excerpt of the symbols in question:
+In `main.rb`, the `KERNEL_ELF` instance for handling the `ELF` file is created first, followed by
+`BSP` and `arch` parts:
 
 ```ruby
-class RaspberryPi
-
-    # omitted
-
-    def initialize(kernel_elf)
-        # omitted
-
-        @virt_addresses = {
-            boot_core_stack_start: /__boot_core_stack_start/,
-            boot_core_stack_end_exclusive: /__boot_core_stack_end_exclusive/,
-
-            rx_start: /__rx_start/,
-            rx_end_exclusive: /__rx_end_exclusive/,
-
-            rw_start: /__rw_start/,
-            rw_end_exclusive: /__rw_end_exclusive/,
-
-            table_struct_start_addr: /bsp::.*::memory::mmu::KERNEL_TABLES/,
-            phys_tables_base_addr: /PHYS_KERNEL_TABLES_BASE_ADDR/
-        }
-```
-
-Using those values, the `BSP` code goes on to create descriptors for each of the three sections that
-whose mappings need to be computed:
-
-- The RX section.
-- The RW section.
-- The boot-core's stack.
+KERNEL_ELF = KernelELF.new(kernel_elf_path)
 
-After the `BSP` setup, `main.rb` creates an instance of the translation tables and the kernel binary
-is mapped using the same:
+BSP = case BSP_TYPE
+      when :rpi3, :rpi4
+          RaspberryPi.new
+      else
+          raise
+      end
 
-```ruby
 TRANSLATION_TABLES = case TARGET
                      when :aarch64
                          Arch::ARMv8::TranslationTable.new
@@ -622,39 +601,72 @@ TRANSLATION_TABLES = case TARGET
                          raise
                      end
 
-BSP.kernel_map_binary
+kernel_map_binary
 ```
 
-As initially said, the `arch` code works rather similar to the mapping code in the actual kernel's
-driver. `BSP.kernel_map_binary` internally calls `map_pages_at` of the `TRANSLATION_TABLE` instance:
+Finally, the function `kernel_map_binary` is called, which kicks of a sequence of interactions
+between the `KERNEL_ELF`, `BSP` and `TRANSLATION_TABLES` instances:
 
 ```ruby
 def kernel_map_binary
-    MappingDescriptor.print_header
+    mapping_descriptors = KERNEL_ELF.generate_mapping_descriptors
+
+    # omitted
 
-    @descriptors.each do |i|
+    mapping_descriptors.each do |i|
         print 'Generating'.rjust(12).green.bold
         print ' '
         puts i.to_s
 
-        TRANSLATION_TABLES.map_pages_at(i.virt_pages, i.phys_pages, i.attributes)
+        TRANSLATION_TABLES.map_at(i.virt_region, i.phys_region, i.attributes)
     end
 
-    MappingDescriptor.print_divider
+    # omitted
 end
 ```
 
-For `map_pages_at()` to work, the `arch` code needs knowledge about **location** and **layout** of
-the kernels table structure. Location will be queried from the `BSP` code, which itself retrieves it
-during the symbol parsing. The layout, on the other hand, is hardcoded and as such must be kept in
-sync with the structure definition in `translation_tables.rs`.
+The `generate_mapping_descriptors` method internally uses the
+[rbelftools](https://github.com/david942j/rbelftools) gem to parse the kernel's `ELF`. It extracts
+information about the various segments that comprise the kernel, as well as segment characteristics
+like their `virtual` and `physical` addresses (aka the mapping; still identity-mapped in this case)
+and the memory attributes.
+
+Part of this information can be cross-checked using the `make readelf` target if you're curious:
+
+```console
+$ make readelf
+
+Program Headers:
+  Type           Offset             VirtAddr           PhysAddr
+                 FileSiz            MemSiz              Flags  Align
+  LOAD           0x0000000000010000 0x0000000000000000 0x0000000000000000
+                 0x0000000000000000 0x0000000000080000  RW     0x10000
+  LOAD           0x0000000000010000 0x0000000000080000 0x0000000000080000
+                 0x000000000000cae8 0x000000000000cae8  R E    0x10000
+  LOAD           0x0000000000020000 0x0000000000090000 0x0000000000090000
+                 0x0000000000030dc0 0x0000000000030de0  RW     0x10000
+
+ Section to Segment mapping:
+  Segment Sections...
+   00     .boot_core_stack
+   01     .text .rodata
+   02     .data .bss
+
+```
+
+The output of `generate_mapping_descriptors` is then fed into the `map_at()` method of the
+`TRANSLATION_TABLE` instance. For it to work properly, `TRANSLATION_TABLE` needs knowledge about
+**location** and **layout** of the kernel's table structure. Location will be queried from the `BSP`
+code, which itself retrieves it by querying `KERNEL_ELF` for the `BSP`-specific `KERNEL_TABLES`
+symbol. The layout, on the other hand, is hardcoded and as such must be kept in sync with the
+structure definition in `translation_tables.rs`.
 
 Finally, after the mappings have been created, it is time to _patch_ them back into the kernel ELF
 file. This is initiated from `main.rb` again:
 
 ```ruby
-kernel_patch_tables(kernel_elf)
-kernel_patch_base_addr(kernel_elf)
+kernel_patch_tables(kernel_elf_path)
+kernel_patch_base_addr(kernel_elf_path)
 ```
 
 The tool prints some information on the fly. Here's the console output of a successful run:
@@ -663,22 +675,23 @@ The tool prints some information on the fly. Here's the console output of a succ
 $ make
 
 Compiling kernel - rpi3
-    Finished release [optimized] target(s) in 0.01s
+    Finished release [optimized] target(s) in 0.00s
 
 Precomputing kernel translation tables and patching kernel ELF
-             --------------------------------------------------
-                 Section           Start Virt Addr       Size
-             --------------------------------------------------
-  Generating Code and RO data | 0x0000_0000_0008_0000 |  64 KiB
-  Generating Data and bss     | 0x0000_0000_0009_0000 | 384 KiB
-  Generating Boot-core stack  | 0x0000_0000_0010_0000 | 512 KiB
-             --------------------------------------------------
-    Patching Kernel table struct at physical 0x9_0000
-    Patching Value of kernel table physical base address (0xd_0000) at physical 0x8_0060
-    Finished in 0.03s
+             ------------------------------------------------------------------------------------
+                 Sections          Virt Start Addr         Phys Start Addr       Size      Attr
+             ------------------------------------------------------------------------------------
+  Generating .boot_core_stack | 0x0000_0000_0000_0000 | 0x0000_0000_0000_0000 | 512 KiB | C RW XN
+  Generating .text .rodata    | 0x0000_0000_0008_0000 | 0x0000_0000_0008_0000 |  64 KiB | C RO X
+  Generating .data .bss       | 0x0000_0000_0009_0000 | 0x0000_0000_0009_0000 | 256 KiB | C RW XN
+             ------------------------------------------------------------------------------------
+    Patching Kernel table struct at ELF file offset 0x2_0000
+    Patching Kernel tables physical base address start argument to value 0xb_0000 at ELF file offset 0x1_0068
+    Finished in 0.16s
+
 ```
 
-Please note how only the kernel's binary is precomputed! Thanks to the changes made in the last
+Please note how **only** the kernel binary is precomputed! Thanks to the changes made in the last
 tutorial, anything else, like `MMIO-remapping`, can and will happen lazily during runtime.
 
 ### Other changes
@@ -693,7 +706,7 @@ Two more things that changed in this tutorial, but won't be explained in detail:
 - The precomputed translation table mappings won't automatically have entries in the kernel's
   `mapping info record`, which is used to print mapping info during boot. Mapping record entries are
   not computed offline in order to reduce complexity. For this reason, the `BSP` code, which in
-  earlier tutorials would have called `kernel_map_pages_at()` (which implicitly would have generated
+  earlier tutorials would have called `kernel_map_at()` (which implicitly would have generated
   mapping record entries), now only calls `kernel_add_mapping_record()`, since the mappings are
   already in place.
 
@@ -701,9 +714,9 @@ Two more things that changed in this tutorial, but won't be explained in detail:
 
 It is understood that there is room for optimizations in the presented approach. For example, the
 generated kernel binary contains the _complete_ array of translation tables for the whole kernel
-virtual address space (`2 GiB`). However, most of the entries are empty initially, because the
-kernel binary only occupies a small area in the tables. It would make sense to add some smarts so
-that only the non-zero entries are packed into binary.
+virtual address space. However, most of the entries are empty initially, because the kernel binary
+only occupies a small area in the tables. It would make sense to add some smarts so that only the
+non-zero entries are packed into binary.
 
 On the other hand, this would add complexity to the code. The increased size doesn't hurt too much
 yet, so the reduced complexity in the code is a tradeoff made willingly to keep everything concise
@@ -716,16 +729,16 @@ $ make chainboot
 [...]
 
 Precomputing kernel translation tables and patching kernel ELF
-             --------------------------------------------------
-                 Section           Start Virt Addr       Size
-             --------------------------------------------------
-  Generating Code and RO data | 0x0000_0000_0008_0000 |  64 KiB
-  Generating Data and bss     | 0x0000_0000_0009_0000 | 384 KiB
-  Generating Boot-core stack  | 0x0000_0000_0010_0000 | 512 KiB
-             --------------------------------------------------
-    Patching Kernel table struct at physical 0x9_0000
-    Patching Value of kernel table physical base address (0xd_0000) at physical 0x8_0060
-    Finished in 0.03s
+             ------------------------------------------------------------------------------------
+                 Sections          Virt Start Addr         Phys Start Addr       Size      Attr
+             ------------------------------------------------------------------------------------
+  Generating .boot_core_stack | 0x0000_0000_0000_0000 | 0x0000_0000_0000_0000 | 512 KiB | C RW XN
+  Generating .text .rodata    | 0x0000_0000_0008_0000 | 0x0000_0000_0008_0000 |  64 KiB | C RO X
+  Generating .data .bss       | 0x0000_0000_0009_0000 | 0x0000_0000_0009_0000 | 256 KiB | C RW XN
+             ------------------------------------------------------------------------------------
+    Patching Kernel table struct at ELF file offset 0x2_0000
+    Patching Kernel tables physical base address start argument to value 0xb_0000 at ELF file offset 0x1_0068
+    Finished in 0.15s
 
 Minipush 1.0
 
@@ -741,22 +754,22 @@ Minipush 1.0
            Raspberry Pi 3
 
 [ML] Requesting binary
-[MP] ⏩ Pushing 387 KiB =======================================🦀 100% 96 KiB/s Time: 00:00:04
+[MP] ⏩ Pushing 259 KiB ======================================🦀 100% 129 KiB/s Time: 00:00:02
 [ML] Loaded! Executing the payload now
 
-[    4.324361] mingo version 0.15.0
-[    4.324568] Booting on: Raspberry Pi 3
-[    4.325023] MMU online:
-[    4.325316]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    4.327060]                         Virtual                                   Physical               Size       Attr                    Entity
-[    4.328804]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    4.330551]       0x0000_0000_0008_0000..0x0000_0000_0008_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
-[    4.332164]       0x0000_0000_0009_0000..0x0000_0000_000e_ffff --> 0x00_0009_0000..0x00_000e_ffff | 384 KiB | C   RW XN | Kernel data and bss
-[    4.333735]       0x0000_0000_0010_0000..0x0000_0000_0017_ffff --> 0x00_0010_0000..0x00_0017_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
-[    4.335338]       0x0000_0000_7000_0000..0x0000_0000_7000_ffff --> 0x00_3f20_0000..0x00_3f20_ffff |  64 KiB | Dev RW XN | BCM GPIO
-[    4.336788]                                                                                                             | BCM PL011 UART
-[    4.338306]       0x0000_0000_7001_0000..0x0000_0000_7001_ffff --> 0x00_3f00_0000..0x00_3f00_ffff |  64 KiB | Dev RW XN | BCM Peripheral Interrupt Controller
-[    4.340050]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    2.891133] mingo version 0.15.0
+[    2.891341] Booting on: Raspberry Pi 3
+[    2.891796] MMU online:
+[    2.892088]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    2.893833]                         Virtual                                   Physical               Size       Attr                    Entity
+[    2.895577]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    2.897322]       0x0000_0000_0000_0000..0x0000_0000_0007_ffff --> 0x00_0000_0000..0x00_0007_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
+[    2.898925]       0x0000_0000_0008_0000..0x0000_0000_0008_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
+[    2.900538]       0x0000_0000_0009_0000..0x0000_0000_000c_ffff --> 0x00_0009_0000..0x00_000c_ffff | 256 KiB | C   RW XN | Kernel data and bss
+[    2.902109]       0x0000_0000_000d_0000..0x0000_0000_000d_ffff --> 0x00_3f20_0000..0x00_3f20_ffff |  64 KiB | Dev RW XN | BCM GPIO
+[    2.903561]                                                                                                             | BCM PL011 UART
+[    2.905078]       0x0000_0000_000e_0000..0x0000_0000_000e_ffff --> 0x00_3f00_0000..0x00_3f00_ffff |  64 KiB | Dev RW XN | BCM Peripheral Interrupt Controller
+[    2.906822]       -------------------------------------------------------------------------------------------------------------------------------------------
 ```
 
 ## Diff to previous
@@ -805,16 +818,15 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/Makefile 15_virtual_mem_part3_precompu
 diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
 --- 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs
 +++ 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
-@@ -11,6 +11,8 @@
+@@ -11,6 +11,7 @@
  //!
  //! crate::cpu::boot::arch_boot
 
-+use crate::{cpu, memory, memory::Address};
-+use core::intrinsics::unlikely;
++use crate::{memory, memory::Address};
  use cortex_a::{asm, registers::*};
  use tock_registers::interfaces::Writeable;
 
-@@ -70,9 +72,18 @@
+@@ -70,9 +71,16 @@
  ///
  /// - Exception return from EL2 must must continue execution in EL1 with `kernel_init()`.
  #[no_mangle]
@@ -827,9 +839,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs 15_virtu
 
 +    // Turn on the MMU for EL1.
 +    let addr = Address::new(phys_kernel_tables_base_addr as usize);
-+    if unlikely(memory::mmu::enable_mmu_and_caching(addr).is_err()) {
-+        cpu::wait_forever();
-+    }
++    memory::mmu::enable_mmu_and_caching(addr).unwrap();
 +
      // Use `eret` to "return" to EL1. This results in execution of kernel_init() in EL1.
      asm::eret()
@@ -860,7 +870,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.s 15_virtua
 diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs
 --- 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
 +++ 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs
-@@ -124,7 +124,7 @@
+@@ -125,7 +125,7 @@
  }
 
  trait StartAddr {
@@ -869,7 +879,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translati
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -153,9 +153,8 @@
+@@ -151,9 +151,8 @@
  // Private Code
  //--------------------------------------------------------------------------------------------------
 
@@ -880,7 +890,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translati
          Address::new(self as *const _ as usize)
      }
  }
-@@ -220,6 +219,35 @@
+@@ -218,6 +217,35 @@
      }
  }
 
@@ -916,27 +926,17 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translati
  impl PageDescriptor {
      /// Create an instance.
      ///
-@@ -229,7 +257,7 @@
-     }
-
-     /// Create an instance.
--    pub fn from_output_page(
-+    pub fn from_output_page_ptr(
-         phys_output_page_ptr: *const Page<Physical>,
-         attribute_fields: &AttributeFields,
-     ) -> Self {
-@@ -252,6 +280,20 @@
+@@ -250,6 +278,19 @@
          InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(self.value)
              .is_set(STAGE1_PAGE_DESCRIPTOR::VALID)
      }
 +
 +    /// Returns the output page.
-+    fn output_page_ptr(&self) -> *const Page<Physical> {
++    fn output_page_addr(&self) -> PageAddress<Physical> {
 +        let shifted = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(self.value)
-+            .read(STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB);
-+        let addr = shifted << Granule64KiB::SHIFT;
++            .read(STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB) as usize;
 +
-+        addr as *const Page<Physical>
++        PageAddress::from(shifted << Granule64KiB::SHIFT)
 +    }
 +
 +    /// Returns the attributes.
@@ -946,8 +946,8 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translati
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -273,7 +315,7 @@
-
+@@ -267,7 +308,7 @@
+ impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
      /// Create an instance.
      #[allow(clippy::assertions_on_constants)]
 -    pub const fn new() -> Self {
@@ -955,13 +955,11 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translati
          assert!(bsp::memory::mmu::KernelGranule::SIZE == Granule64KiB::SIZE);
 
          // Can't have a zero-sized address space.
-@@ -282,11 +324,20 @@
+@@ -276,10 +317,19 @@
          Self {
              lvl3: [[PageDescriptor::new_zeroed(); 8192]; NUM_TABLES],
              lvl2: [TableDescriptor::new_zeroed(); NUM_TABLES],
--            cur_l3_mmio_index: 0,
 -            initialized: false,
-+            cur_l3_mmio_index: Self::L3_MMIO_START_INDEX,
 +            initialized: for_precompute,
          }
      }
@@ -975,29 +973,20 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translati
 +        Self::_new(false)
 +    }
 +
-     /// The start address of the table's MMIO range.
-     #[inline(always)]
-     fn mmio_start_addr(&self) -> Address<Virtual> {
-@@ -308,7 +359,7 @@
-
      /// Helper to calculate the lvl2 and lvl3 indices from an address.
      #[inline(always)]
--    fn lvl2_lvl3_index_from_page(
-+    fn lvl2_lvl3_index_from_page_ptr(
-         &self,
-         virt_page_ptr: *const Page<Virtual>,
-     ) -> Result<(usize, usize), &'static str> {
-@@ -323,16 +374,28 @@
+     fn lvl2_lvl3_index_from_page_addr(
+@@ -297,6 +347,18 @@
          Ok((lvl2_index, lvl3_index))
      }
 
 +    /// Returns the PageDescriptor corresponding to the supplied page address.
 +    #[inline(always)]
-+    fn page_descriptor_from_page_ptr(
++    fn page_descriptor_from_page_addr(
 +        &self,
-+        virt_page_ptr: *const Page<Virtual>,
++        virt_page_addr: PageAddress<Virtual>,
 +    ) -> Result<&PageDescriptor, &'static str> {
-+        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page_ptr(virt_page_ptr)?;
++        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page_addr(virt_page_addr)?;
 +        let desc = &self.lvl3[lvl2_index][lvl3_index];
 +
 +        Ok(desc)
@@ -1006,19 +995,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translati
      /// Sets the PageDescriptor corresponding to the supplied page address.
      ///
      /// Doesn't allow overriding an already valid page.
-     #[inline(always)]
--    fn set_page_descriptor_from_page(
-+    fn set_page_descriptor_from_page_ptr(
-         &mut self,
-         virt_page_ptr: *const Page<Virtual>,
-         new_desc: &PageDescriptor,
-     ) -> Result<(), &'static str> {
--        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page(virt_page_ptr)?;
-+        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page_ptr(virt_page_ptr)?;
-         let desc = &mut self.lvl3[lvl2_index][lvl3_index];
-
-         if desc.is_valid() {
-@@ -351,14 +414,15 @@
+@@ -325,24 +387,23 @@
  impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::TranslationTable
      for FixedSizeTranslationTable<NUM_TABLES>
  {
@@ -1037,9 +1014,8 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translati
 
              let new_desc = TableDescriptor::from_next_lvl_table_addr(phys_table_addr);
              *lvl2_entry = new_desc;
-@@ -366,10 +430,8 @@
+         }
 
-         self.cur_l3_mmio_index = Self::L3_MMIO_START_INDEX;
          self.initialized = true;
 -    }
 
@@ -1048,43 +1024,30 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translati
 +        Ok(())
      }
 
-     unsafe fn map_pages_at(
-@@ -398,10 +460,10 @@
-
-         let iter = p.iter().zip(v.iter());
-         for (phys_page, virt_page) in iter {
--            let new_desc = PageDescriptor::from_output_page(phys_page.as_ptr(), attr);
-+            let new_desc = PageDescriptor::from_output_page_ptr(phys_page.as_ptr(), attr);
-             let virt_page = virt_page.as_ptr();
-
--            self.set_page_descriptor_from_page(virt_page, &new_desc)?;
-+            self.set_page_descriptor_from_page_ptr(virt_page, &new_desc)?;
-         }
+     unsafe fn map_at(
+@@ -372,6 +433,45 @@
 
          Ok(())
-@@ -442,6 +504,44 @@
-
-         false
      }
 +
-+    fn try_virt_page_ptr_to_phys_page_ptr(
++    fn try_virt_page_addr_to_phys_page_addr(
 +        &self,
-+        virt_page_ptr: *const Page<Virtual>,
-+    ) -> Result<*const Page<Physical>, &'static str> {
-+        let page_desc = self.page_descriptor_from_page_ptr(virt_page_ptr)?;
++        virt_page_addr: PageAddress<Virtual>,
++    ) -> Result<PageAddress<Physical>, &'static str> {
++        let page_desc = self.page_descriptor_from_page_addr(virt_page_addr)?;
 +
 +        if !page_desc.is_valid() {
 +            return Err("Page marked invalid");
 +        }
 +
-+        Ok(page_desc.output_page_ptr())
++        Ok(page_desc.output_page_addr())
 +    }
 +
 +    fn try_page_attributes(
 +        &self,
-+        virt_page_ptr: *const Page<Virtual>,
++        virt_page_addr: PageAddress<Virtual>,
 +    ) -> Result<AttributeFields, &'static str> {
-+        let page_desc = self.page_descriptor_from_page_ptr(virt_page_ptr)?;
++        let page_desc = self.page_descriptor_from_page_addr(virt_page_addr)?;
 +
 +        if !page_desc.is_valid() {
 +            return Err("Page marked invalid");
@@ -1100,9 +1063,10 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translati
 +        &self,
 +        virt_addr: Address<Virtual>,
 +    ) -> Result<Address<Physical>, &'static str> {
-+        let page = self.try_virt_page_ptr_to_phys_page_ptr(virt_addr.as_page_ptr())?;
++        let virt_page = PageAddress::from(virt_addr.align_down_page());
++        let phys_page = self.try_virt_page_addr_to_phys_page_addr(virt_page)?;
 +
-+        Ok(Address::new(page as usize + virt_addr.offset_into_page()))
++        Ok(phys_page.into_inner() + virt_addr.offset_into_page())
 +    }
  }
 
@@ -1129,7 +1093,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs 15_virt
 +    use driver::interface::DeviceDriver;
 +
 +    let mut panic_uart =
-+        device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START.into_usize());
++        device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START.as_usize());
 +
 +    let maybe_uart_mmio_start_addr = super::PL011_UART.virt_mmio_start_addr();
 +
@@ -1167,50 +1131,50 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/kernel_virt_addr_s
 --- 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
 +++ 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
 @@ -0,0 +1 @@
-+__kernel_virt_addr_space_size = 2 * 1024 * 1024 * 1024
++__kernel_virt_addr_space_size = 1024 * 1024 * 1024
 
 diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld
 --- 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
 +++ 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld
-@@ -3,6 +3,9 @@
+@@ -3,6 +3,8 @@
   * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
   */
 
-+/* This file provides __kernel_virt_addr_space_size */
 +INCLUDE src/bsp/raspberrypi/kernel_virt_addr_space_size.ld;
 +
- /* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
- __rpi_load_addr = 0x80000;
+ PAGE_SIZE = 64K;
+ PAGE_MASK = PAGE_SIZE - 1;
 
 
 diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs
 --- 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
 +++ 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs
-@@ -9,8 +9,8 @@
+@@ -7,8 +7,8 @@
+ use crate::{
      memory::{
-         mmu as generic_mmu,
          mmu::{
--            AccessPermissions, AddressSpace, AssociatedTranslationTable, AttributeFields,
--            MemAttributes, Page, PageSliceDescriptor, TranslationGranule,
-+            AddressSpace, AssociatedTranslationTable, AttributeFields, Page, PageSliceDescriptor,
-+            TranslationGranule,
+-            self as generic_mmu, AccessPermissions, AddressSpace, AssociatedTranslationTable,
+-            AttributeFields, MemAttributes, MemoryRegion, PageAddress, TranslationGranule,
++            self as generic_mmu, AddressSpace, AssociatedTranslationTable, AttributeFields,
++            MemoryRegion, PageAddress, TranslationGranule,
          },
-         Address, Physical, Virtual,
+         Physical, Virtual,
      },
-@@ -33,7 +33,7 @@
+@@ -31,7 +31,7 @@
  pub type KernelGranule = TranslationGranule<{ 64 * 1024 }>;
 
  /// The kernel's virtual address space defined by this BSP.
--pub type KernelVirtAddrSpace = AddressSpace<{ 8 * 1024 * 1024 * 1024 }>;
-+pub type KernelVirtAddrSpace = AddressSpace<{ get_virt_addr_space_size() }>;
+-pub type KernelVirtAddrSpace = AddressSpace<{ 1024 * 1024 * 1024 }>;
++pub type KernelVirtAddrSpace = AddressSpace<{ kernel_virt_addr_space_size() }>;
 
  //--------------------------------------------------------------------------------------------------
  // Global instances
-@@ -45,13 +45,33 @@
+@@ -43,13 +43,34 @@
  ///
  /// That is, `size_of(InitStateLock<KernelTranslationTable>) == size_of(KernelTranslationTable)`.
  /// There is a unit tests that checks this porperty.
 +#[link_section = ".data"]
++#[no_mangle]
  static KERNEL_TABLES: InitStateLock<KernelTranslationTable> =
 -    InitStateLock::new(KernelTranslationTable::new());
 +    InitStateLock::new(KernelTranslationTable::new_for_precompute());
@@ -1230,7 +1194,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs 15_v
 +/// This is a hack for retrieving the value for the kernel's virtual address space size as a
 +/// constant from a common place, since it is needed as a compile-time/link-time constant in both,
 +/// the linker script and the Rust sources.
-+const fn get_virt_addr_space_size() -> usize {
++const fn kernel_virt_addr_space_size() -> usize {
 +    let __kernel_virt_addr_space_size;
 +
 +    include!("../kernel_virt_addr_space_size.ld");
@@ -1241,88 +1205,95 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs 15_v
  /// Helper function for calculating the number of pages the given parameter spans.
  const fn size_to_num_pages(size: usize) -> usize {
      assert!(size > 0);
-@@ -81,16 +101,23 @@
-     PageSliceDescriptor::from_addr(super::virt_boot_core_stack_start(), num_pages)
+@@ -88,18 +109,22 @@
+     MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
  }
 
 -// The binary is still identity mapped, so use this trivial conversion function for mapping below.
 -
 +// There is no reason to expect the following conversions to fail, since they were generated offline
 +// by the `translation table tool`. If it doesn't work, a panic due to the unwraps is justified.
- fn kernel_virt_to_phys_page_slice(
-     virt_slice: PageSliceDescriptor<Virtual>,
- ) -> PageSliceDescriptor<Physical> {
--    let phys_start_addr = Address::<Physical>::new(virt_slice.start_addr().into_usize());
-+    let phys_first_page =
-+        generic_mmu::try_kernel_virt_page_ptr_to_phys_page_ptr(virt_slice.first_page_ptr())
+ fn kernel_virt_to_phys_region(virt_region: MemoryRegion<Virtual>) -> MemoryRegion<Physical> {
+-    MemoryRegion::new(
+-        PageAddress::from(virt_region.start_page_addr().into_inner().as_usize()),
+-        PageAddress::from(
+-            virt_region
+-                .end_exclusive_page_addr()
+-                .into_inner()
+-                .as_usize(),
+-        ),
+-    )
++    let phys_start_page_addr =
++        generic_mmu::try_kernel_virt_page_addr_to_phys_page_addr(virt_region.start_page_addr())
 +            .unwrap();
-+    let phys_start_addr = Address::new(phys_first_page as usize);
-
-     PageSliceDescriptor::from_addr(phys_start_addr, virt_slice.num_pages())
- }
-
-+fn kernel_page_attributes(virt_page_ptr: *const Page<Virtual>) -> AttributeFields {
-+    generic_mmu::try_kernel_page_attributes(virt_page_ptr).unwrap()
++
++    let phys_end_exclusive_page_addr = phys_start_page_addr
++        .checked_offset(virt_region.num_pages() as isize)
++        .unwrap();
++
++    MemoryRegion::new(phys_start_page_addr, phys_end_exclusive_page_addr)
 +}
 +
++fn kernel_page_attributes(virt_page_addr: PageAddress<Virtual>) -> AttributeFields {
++    generic_mmu::try_kernel_page_attributes(virt_page_addr).unwrap()
+ }
+
  //--------------------------------------------------------------------------------------------------
- // Public Code
- //--------------------------------------------------------------------------------------------------
-@@ -108,112 +135,33 @@
-     ) as *const Page<_>
+@@ -121,109 +146,33 @@
+     MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
  }
 
 -/// Map the kernel binary.
--///
--/// # Safety
 +/// Add mapping records for the kernel binary.
  ///
+-/// # Safety
+-///
 -/// - Any miscalculation or attribute error will likely be fatal. Needs careful manual checking.
 -pub unsafe fn kernel_map_binary() -> Result<(), &'static str> {
--    generic_mmu::kernel_map_pages_at(
+-    generic_mmu::kernel_map_at(
 +/// The actual translation table entries for the kernel binary are generated using the offline
 +/// `translation table tool` and patched into the kernel binary. This function just adds the mapping
 +/// record entries.
 +pub fn kernel_add_mapping_records_for_precomputed() {
-+    let virt_rx_page_desc = virt_rx_page_desc();
++    let virt_boot_core_stack_region = virt_boot_core_stack_region();
 +    generic_mmu::kernel_add_mapping_record(
-         "Kernel code and RO data",
--        &virt_rx_page_desc(),
--        &kernel_virt_to_phys_page_slice(virt_rx_page_desc()),
+         "Kernel boot-core stack",
+-        &virt_boot_core_stack_region(),
+-        &kernel_virt_to_phys_region(virt_boot_core_stack_region()),
 -        &AttributeFields {
 -            mem_attributes: MemAttributes::CacheableDRAM,
--            acc_perms: AccessPermissions::ReadOnly,
--            execute_never: false,
+-            acc_perms: AccessPermissions::ReadWrite,
+-            execute_never: true,
 -        },
 -    )?;
-+        &virt_rx_page_desc,
-+        &kernel_virt_to_phys_page_slice(virt_rx_page_desc),
-+        &kernel_page_attributes(virt_rx_page_desc.first_page_ptr()),
++        &virt_boot_core_stack_region,
++        &kernel_virt_to_phys_region(virt_boot_core_stack_region),
++        &kernel_page_attributes(virt_boot_core_stack_region.start_page_addr()),
 +    );
 
--    generic_mmu::kernel_map_pages_at(
-+    let virt_rw_page_desc = virt_rw_page_desc();
+-    generic_mmu::kernel_map_at(
++    let virt_code_region = virt_code_region();
 +    generic_mmu::kernel_add_mapping_record(
-         "Kernel data and bss",
--        &virt_rw_page_desc(),
--        &kernel_virt_to_phys_page_slice(virt_rw_page_desc()),
+         "Kernel code and RO data",
+-        &virt_code_region(),
+-        &kernel_virt_to_phys_region(virt_code_region()),
 -        &AttributeFields {
 -            mem_attributes: MemAttributes::CacheableDRAM,
--            acc_perms: AccessPermissions::ReadWrite,
--            execute_never: true,
+-            acc_perms: AccessPermissions::ReadOnly,
+-            execute_never: false,
 -        },
 -    )?;
-+        &virt_rw_page_desc,
-+        &kernel_virt_to_phys_page_slice(virt_rw_page_desc),
-+        &kernel_page_attributes(virt_rw_page_desc.first_page_ptr()),
++        &virt_code_region,
++        &kernel_virt_to_phys_region(virt_code_region),
++        &kernel_page_attributes(virt_code_region.start_page_addr()),
 +    );
 
--    generic_mmu::kernel_map_pages_at(
-+    let virt_boot_core_stack_page_desc = virt_boot_core_stack_page_desc();
+-    generic_mmu::kernel_map_at(
++    let virt_data_region = virt_data_region();
 +    generic_mmu::kernel_add_mapping_record(
-         "Kernel boot-core stack",
--        &virt_boot_core_stack_page_desc(),
--        &kernel_virt_to_phys_page_slice(virt_boot_core_stack_page_desc()),
+         "Kernel data and bss",
+-        &virt_data_region(),
+-        &kernel_virt_to_phys_region(virt_data_region()),
 -        &AttributeFields {
 -            mem_attributes: MemAttributes::CacheableDRAM,
 -            acc_perms: AccessPermissions::ReadWrite,
@@ -1347,18 +1318,18 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs 15_v
 -    #[kernel_test]
 -    fn virt_mem_layout_sections_are_64KiB_aligned() {
 -        for i in [
--            virt_rx_page_desc,
--            virt_rw_page_desc,
--            virt_boot_core_stack_page_desc,
+-            virt_boot_core_stack_region,
+-            virt_code_region,
+-            virt_data_region,
 -        ]
 -        .iter()
 -        {
--            let start: usize = i().start_addr().into_usize();
--            let end: usize = i().end_addr().into_usize();
+-            let start = i().start_page_addr().into_inner();
+-            let end_exclusive = i().end_exclusive_page_addr().into_inner();
 -
--            assert_eq!(start modulo KernelGranule::SIZE, 0);
--            assert_eq!(end modulo KernelGranule::SIZE, 0);
--            assert!(end >= start);
+-            assert!(start.is_page_aligned());
+-            assert!(end_exclusive.is_page_aligned());
+-            assert!(end_exclusive >= start);
 -        }
 -    }
 -
@@ -1366,17 +1337,14 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs 15_v
 -    #[kernel_test]
 -    fn virt_mem_layout_has_no_overlaps() {
 -        let layout = [
--            virt_rx_page_desc(),
--            virt_rw_page_desc(),
--            virt_boot_core_stack_page_desc(),
+-            virt_boot_core_stack_region(),
+-            virt_code_region(),
+-            virt_data_region(),
 -        ];
 -
 -        for (i, first_range) in layout.iter().enumerate() {
 -            for second_range in layout.iter().skip(i + 1) {
--                assert!(!first_range.contains(second_range.start_addr()));
--                assert!(!first_range.contains(second_range.end_addr_inclusive()));
--                assert!(!second_range.contains(first_range.start_addr()));
--                assert!(!second_range.contains(first_range.end_addr_inclusive()));
+-                assert!(!first_range.overlaps(second_range))
 -            }
 -        }
 -    }
@@ -1399,16 +1367,16 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs 15_v
 -
 -        assert!(bss_range.contains(&kernel_tables_addr));
 -    }
-+        &virt_boot_core_stack_page_desc,
-+        &kernel_virt_to_phys_page_slice(virt_boot_core_stack_page_desc),
-+        &kernel_page_attributes(virt_boot_core_stack_page_desc.first_page_ptr()),
++        &virt_data_region,
++        &kernel_virt_to_phys_region(virt_data_region),
++        &kernel_page_attributes(virt_data_region.start_page_addr()),
 +    );
  }
 
 diff -uNr 14_virtual_mem_part2_mmio_remap/src/main.rs 15_virtual_mem_part3_precomputed_tables/src/main.rs
 --- 14_virtual_mem_part2_mmio_remap/src/main.rs
 +++ 15_virtual_mem_part3_precomputed_tables/src/main.rs
-@@ -15,28 +15,21 @@
+@@ -15,31 +15,23 @@
 
  /// Early init code.
  ///
@@ -1427,7 +1395,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/main.rs 15_virtual_mem_part3_preco
      use driver::interface::DriverManager;
 
      exception::handling_init();
-
+-
 -    let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
 -        Err(string) => panic!("Error mapping kernel binary: {}", string),
 -        Ok(addr) => addr,
@@ -1437,13 +1405,17 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/main.rs 15_virtual_mem_part3_preco
 -        panic!("Enabling MMU failed: {}", e);
 -    }
 -    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
+-
+     memory::mmu::post_enable_init();
+
 +    // Add the mapping records for the precomputed entries first, so that they appear on the top of
 +    // the list.
 +    bsp::memory::mmu::kernel_add_mapping_records_for_precomputed();
-
++
      // Bring up the drivers needed for printing first.
      for i in bsp::driver::driver_manager()
-@@ -47,7 +40,7 @@
+         .early_print_device_drivers()
+@@ -49,7 +41,7 @@
          i.init().unwrap_or_else(|_| cpu::wait_forever());
      }
      bsp::driver::driver_manager().post_early_print_device_driver_init();
@@ -1456,16 +1428,16 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/main.rs 15_virtual_mem_part3_preco
 diff -uNr 14_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs 15_virtual_mem_part3_precomputed_tables/src/memory/mmu/translation_table.rs
 --- 14_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs
 +++ 15_virtual_mem_part3_precomputed_tables/src/memory/mmu/translation_table.rs
-@@ -10,7 +10,7 @@
+@@ -23,6 +23,8 @@
 
- use crate::memory::{
-     mmu::{AttributeFields, PageSliceDescriptor},
--    Address, Physical, Virtual,
-+    Address, Page, Physical, Virtual,
- };
+ /// Translation table interfaces.
+ pub mod interface {
++    use crate::memory::mmu::PageAddress;
++
+     use super::*;
 
- //--------------------------------------------------------------------------------------------------
-@@ -35,10 +35,7 @@
+     /// Translation table operations.
+@@ -33,10 +35,7 @@
          ///
          /// - Implementor must ensure that this function can run only once or is harmless if invoked
          ///   multiple times.
@@ -1475,27 +1447,27 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs 15
 -        fn phys_base_address(&self) -> Address<Physical>;
 +        fn init(&mut self) -> Result<(), &'static str>;
 
-         /// Map the given virtual pages to the given physical pages.
+         /// Map the given virtual memory region to the given physical memory region.
          ///
-@@ -70,6 +67,30 @@
-
-         /// Check if a virtual page splice is in the "MMIO region".
-         fn is_virt_page_slice_mmio(&self, virt_pages: &PageSliceDescriptor<Virtual>) -> bool;
+@@ -53,6 +52,30 @@
+             phys_region: &MemoryRegion<Physical>,
+             attr: &AttributeFields,
+         ) -> Result<(), &'static str>;
 +
-+        /// Try to translate a virtual page pointer to a physical page pointer.
++        /// Try to translate a virtual page address to a physical page address.
 +        ///
 +        /// Will only succeed if there exists a valid mapping for the input page.
-+        fn try_virt_page_ptr_to_phys_page_ptr(
++        fn try_virt_page_addr_to_phys_page_addr(
 +            &self,
-+            virt_page_ptr: *const Page<Virtual>,
-+        ) -> Result<*const Page<Physical>, &'static str>;
++            virt_page_addr: PageAddress<Virtual>,
++        ) -> Result<PageAddress<Physical>, &'static str>;
 +
 +        /// Try to get the attributes of a page.
 +        ///
 +        /// Will only succeed if there exists a valid mapping for the input page.
 +        fn try_page_attributes(
 +            &self,
-+            virt_page_ptr: *const Page<Virtual>,
++            virt_page_addr: PageAddress<Virtual>,
 +        ) -> Result<AttributeFields, &'static str>;
 +
 +        /// Try to translate a virtual address to a physical address.
@@ -1508,16 +1480,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs 15
      }
  }
 
-@@ -80,7 +101,7 @@
- #[cfg(test)]
- mod tests {
-     use super::*;
--    use crate::bsp;
-+    use crate::{bsp, memory::Address};
-     use arch_translation_table::MinSizeTranslationTable;
-     use interface::TranslationTable;
-     use test_macros::kernel_test;
-@@ -89,9 +110,9 @@
+@@ -72,9 +95,9 @@
      #[kernel_test]
      fn translationtable_implementation_sanity() {
          // This will occupy a lot of space on the stack.
@@ -1527,64 +1490,122 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs 15
 -        tables.init();
 +        assert!(tables.init().is_ok());
 
-         let x = tables.next_mmio_virt_page_slice(0);
-         assert!(x.is_err());
-
-diff -uNr 14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs 15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs
---- 14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
-+++ 15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs
-@@ -92,7 +92,7 @@
-     }
+         let virt_start_page_addr: PageAddress<Virtual> = PageAddress::from(0);
+         let virt_end_exclusive_page_addr: PageAddress<Virtual> =
+@@ -94,5 +117,21 @@
+         };
 
-     /// Return a pointer to the first page of the described slice.
--    const fn first_page_ptr(&self) -> *const Page<ATYPE> {
-+    pub const fn first_page_ptr(&self) -> *const Page<ATYPE> {
-         self.start.into_usize() as *const _
+         unsafe { assert_eq!(tables.map_at(&virt_region, &phys_region, &attr), Ok(())) };
++
++        assert_eq!(
++            tables.try_virt_page_addr_to_phys_page_addr(virt_start_page_addr),
++            Ok(phys_start_page_addr)
++        );
++
++        assert_eq!(
++            tables.try_page_attributes(virt_start_page_addr.checked_offset(6).unwrap()),
++            Err("Page marked invalid")
++        );
++
++        assert_eq!(tables.try_page_attributes(virt_start_page_addr), Ok(attr));
++
++        let virt_addr = virt_start_page_addr.into_inner() + 0x100;
++        let phys_addr = phys_start_page_addr.into_inner() + 0x100;
++        assert_eq!(tables.try_virt_addr_to_phys_addr(virt_addr), Ok(phys_addr));
      }
-
+ }
 
 diff -uNr 14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs 15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs
 --- 14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
 +++ 15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs
-@@ -92,9 +92,7 @@
+@@ -16,7 +16,8 @@
+ use crate::{
+     bsp,
+     memory::{Address, Physical, Virtual},
+-    synchronization, warn,
++    synchronization::{self, interface::Mutex},
++    warn,
+ };
+ use core::{fmt, num::NonZeroUsize};
+
+@@ -73,7 +74,7 @@
+ // Private Code
+ //--------------------------------------------------------------------------------------------------
+ use interface::MMU;
+-use synchronization::interface::*;
++use synchronization::interface::ReadWriteEx;
+ use translation_table::interface::TranslationTable;
+
+ /// Query the BSP for the reserved virtual addresses for MMIO remapping and initialize the kernel's
+@@ -101,13 +102,21 @@
      bsp::memory::mmu::kernel_translation_tables()
-         .write(|tables| tables.map_pages_at(virt_pages, phys_pages, attr))?;
+         .write(|tables| tables.map_at(virt_region, phys_region, attr))?;
 
--    if let Err(x) = mapping_record::kernel_add(name, virt_pages, phys_pages, attr) {
+-    if let Err(x) = mapping_record::kernel_add(name, virt_region, phys_region, attr) {
 -        warn!("{}", x);
 -    }
-+    kernel_add_mapping_record(name, virt_pages, phys_pages, attr);
++    kernel_add_mapping_record(name, virt_region, phys_region, attr);
 
      Ok(())
  }
-@@ -146,6 +144,18 @@
+
++/// Try to translate a kernel virtual address to a physical address.
++///
++/// Will only succeed if there exists a valid mapping for the input address.
++fn try_kernel_virt_addr_to_phys_addr(
++    virt_addr: Address<Virtual>,
++) -> Result<Address<Physical>, &'static str> {
++    bsp::memory::mmu::kernel_translation_tables()
++        .read(|tables| tables.try_virt_addr_to_phys_addr(virt_addr))
++}
++
+ //--------------------------------------------------------------------------------------------------
+ // Public Code
+ //--------------------------------------------------------------------------------------------------
+@@ -155,27 +164,16 @@
      }
  }
 
+-/// Raw mapping of a virtual to physical region in the kernel translation tables.
+-///
+-/// Prevents mapping into the MMIO range of the tables.
+-///
+-/// # Safety
+-///
+-/// - See `kernel_map_at_unchecked()`.
+-/// - Does not prevent aliasing. Currently, the callers must be trusted.
+-pub unsafe fn kernel_map_at(
 +/// Add an entry to the mapping info record.
 +pub fn kernel_add_mapping_record(
-+    name: &'static str,
-+    virt_pages: &PageSliceDescriptor<Virtual>,
-+    phys_pages: &PageSliceDescriptor<Physical>,
-+    attr: &AttributeFields,
+     name: &'static str,
+-    virt_pages: &MemoryRegion<Virtual>,
+-    phys_pages: &MemoryRegion<Physical>,
++    virt_region: &MemoryRegion<Virtual>,
++    phys_region: &MemoryRegion<Physical>,
+     attr: &AttributeFields,
+-) -> Result<(), &'static str> {
+-    if bsp::memory::mmu::virt_mmio_remap_region().overlaps(virt_pages) {
+-        return Err("Attempt to manually map into MMIO region");
 +) {
-+    if let Err(x) = mapping_record::kernel_add(name, virt_pages, phys_pages, attr) {
++    if let Err(x) = mapping_record::kernel_add(name, virt_region, phys_region, attr) {
 +        warn!("{}", x);
-+    }
-+}
-+
- /// Raw mapping of virtual to physical pages in the kernel translation tables.
- ///
- /// Prevents mapping into the MMIO range of the tables.
-@@ -214,21 +224,34 @@
+     }
+-
+-    kernel_map_at_unchecked(name, virt_pages, phys_pages, attr)?;
+-
+-    Ok(())
+ }
+
+ /// MMIO remapping in the kernel translation tables.
+@@ -224,21 +222,24 @@
      Ok(virt_addr + offset_into_start_page)
  }
 
 -/// Map the kernel's binary. Returns the translation table's base address.
--///
--/// # Safety
-+/// Try to translate a kernel virtual page pointer to a physical page pointer.
++/// Try to translate a kernel virtual page address to a physical page address.
  ///
+-/// # Safety
+-///
 -/// - See [`bsp::memory::mmu::kernel_map_binary()`].
 -pub unsafe fn kernel_map_binary() -> Result<Address<Physical>, &'static str> {
 -    let phys_kernel_tables_base_addr =
@@ -1592,38 +1613,29 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs 15_virtual_mem_part3
 -            tables.init();
 -            tables.phys_base_address()
 -        });
+-
+-    bsp::memory::mmu::kernel_map_binary()?;
 +/// Will only succeed if there exists a valid mapping for the input page.
-+pub fn try_kernel_virt_page_ptr_to_phys_page_ptr(
-+    virt_page_ptr: *const Page<Virtual>,
-+) -> Result<*const Page<Physical>, &'static str> {
++pub fn try_kernel_virt_page_addr_to_phys_page_addr(
++    virt_page_addr: PageAddress<Virtual>,
++) -> Result<PageAddress<Physical>, &'static str> {
 +    bsp::memory::mmu::kernel_translation_tables()
-+        .read(|tables| tables.try_virt_page_ptr_to_phys_page_ptr(virt_page_ptr))
++        .read(|tables| tables.try_virt_page_addr_to_phys_page_addr(virt_page_addr))
 +}
 
--    bsp::memory::mmu::kernel_map_binary()?;
+-    Ok(phys_kernel_tables_base_addr)
 +/// Try to get the attributes of a kernel page.
 +///
 +/// Will only succeed if there exists a valid mapping for the input page.
 +pub fn try_kernel_page_attributes(
-+    virt_page_ptr: *const Page<Virtual>,
++    virt_page_addr: PageAddress<Virtual>,
 +) -> Result<AttributeFields, &'static str> {
 +    bsp::memory::mmu::kernel_translation_tables()
-+        .read(|tables| tables.try_page_attributes(virt_page_ptr))
-+}
-
--    Ok(phys_kernel_tables_base_addr)
-+/// Try to translate a kernel virtual address to a physical address.
-+///
-+/// Will only succeed if there exists a valid mapping for the input address.
-+fn try_kernel_virt_addr_to_phys_addr(
-+    virt_addr: Address<Virtual>,
-+) -> Result<Address<Physical>, &'static str> {
-+    bsp::memory::mmu::kernel_translation_tables()
-+        .read(|tables| tables.try_virt_addr_to_phys_addr(virt_addr))
++        .read(|tables| tables.try_page_attributes(virt_page_addr))
  }
 
  /// Enable the MMU and data + instruction caching.
-@@ -236,6 +259,7 @@
+@@ -246,6 +247,7 @@
  /// # Safety
  ///
  /// - Crucial function during kernel init. Changes the the complete memory view of the processor.
@@ -1631,64 +1643,103 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs 15_virtual_mem_part3
  pub unsafe fn enable_mmu_and_caching(
      phys_tables_base_addr: Address<Physical>,
  ) -> Result<(), MMUEnableError> {
+@@ -261,41 +263,3 @@
+ pub fn kernel_print_mappings() {
+     mapping_record::kernel_print()
+ }
+-
+-//--------------------------------------------------------------------------------------------------
+-// Testing
+-//--------------------------------------------------------------------------------------------------
+-
+-#[cfg(test)]
+-mod tests {
+-    use super::*;
+-    use crate::memory::mmu::{AccessPermissions, MemAttributes, PageAddress};
+-    use test_macros::kernel_test;
+-
+-    /// Check that you cannot map into the MMIO VA range from kernel_map_at().
+-    #[kernel_test]
+-    fn no_manual_mmio_map() {
+-        let phys_start_page_addr: PageAddress<Physical> = PageAddress::from(0);
+-        let phys_end_exclusive_page_addr: PageAddress<Physical> =
+-            phys_start_page_addr.checked_offset(5).unwrap();
+-        let phys_region = MemoryRegion::new(phys_start_page_addr, phys_end_exclusive_page_addr);
+-
+-        let num_pages = NonZeroUsize::new(phys_region.num_pages()).unwrap();
+-        let virt_region = alloc::kernel_mmio_va_allocator()
+-            .lock(|allocator| allocator.alloc(num_pages))
+-            .unwrap();
+-
+-        let attr = AttributeFields {
+-            mem_attributes: MemAttributes::CacheableDRAM,
+-            acc_perms: AccessPermissions::ReadWrite,
+-            execute_never: true,
+-        };
+-
+-        unsafe {
+-            assert_eq!(
+-                kernel_map_at("test", &virt_region, &phys_region, &attr),
+-                Err("Attempt to manually map into MMIO region")
+-            )
+-        };
+-    }
+-}
 
-diff -uNr 14_virtual_mem_part2_mmio_remap/src/memory.rs 15_virtual_mem_part3_precomputed_tables/src/memory.rs
---- 14_virtual_mem_part2_mmio_remap/src/memory.rs
-+++ 15_virtual_mem_part3_precomputed_tables/src/memory.rs
-@@ -6,12 +6,13 @@
+diff -uNr 14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs 15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rs
+--- 14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs
++++ 15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rs
+@@ -8,7 +8,7 @@
+ #![no_main]
+ #![no_std]
 
- pub mod mmu;
+-use libkernel::{bsp, console, cpu, exception, print};
++use libkernel::{bsp, console, cpu, exception, memory, print};
 
--use crate::common;
-+use crate::{bsp, common};
- use core::{
-     fmt,
-     marker::PhantomData,
-     ops::{AddAssign, SubAssign},
- };
-+use mmu::Page;
+ #[no_mangle]
+ unsafe fn kernel_init() -> ! {
+@@ -16,6 +16,7 @@
+     use console::interface::*;
 
- //--------------------------------------------------------------------------------------------------
- // Public Definitions
-@@ -65,6 +66,17 @@
-     pub const fn into_usize(self) -> usize {
-         self.value
-     }
-+
-+    /// Return a pointer to the page that contains this address.
-+    pub const fn as_page_ptr(&self) -> *const Page<ATYPE> {
-+        self.align_down(bsp::memory::mmu::KernelGranule::SIZE)
-+            .into_usize() as *const _
-+    }
-+
-+    /// Return the address' offset into the underlying page.
-+    pub const fn offset_into_page(&self) -> usize {
-+        self.value & bsp::memory::mmu::KernelGranule::MASK
-+    }
- }
+     exception::handling_init();
++    memory::mmu::post_enable_init();
+     bsp::console::qemu_bring_up_console();
+
+     // Handshake
 
- impl<ATYPE: AddressType> core::ops::Add<usize> for Address<ATYPE> {
+diff -uNr 14_virtual_mem_part2_mmio_remap/tests/01_timer_sanity.rs 15_virtual_mem_part3_precomputed_tables/tests/01_timer_sanity.rs
+--- 14_virtual_mem_part2_mmio_remap/tests/01_timer_sanity.rs
++++ 15_virtual_mem_part3_precomputed_tables/tests/01_timer_sanity.rs
+@@ -11,12 +11,13 @@
+ #![test_runner(libkernel::test_runner)]
+
+ use core::time::Duration;
+-use libkernel::{bsp, cpu, exception, time, time::interface::TimeManager};
++use libkernel::{bsp, cpu, exception, memory, time, time::interface::TimeManager};
+ use test_macros::kernel_test;
+
+ #[no_mangle]
+ unsafe fn kernel_init() -> ! {
+     exception::handling_init();
++    memory::mmu::post_enable_init();
+     bsp::console::qemu_bring_up_console();
+
+     // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
 
 diff -uNr 14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs 15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs
 --- 14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
 +++ 15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs
-@@ -17,43 +17,16 @@
- /// or indirectly.
- mod panic_exit_success;
-
--use libkernel::{bsp, cpu, exception, memory, println};
-+use libkernel::{bsp, cpu, exception, println};
+@@ -21,40 +21,12 @@
 
  #[no_mangle]
  unsafe fn kernel_init() -> ! {
 -    use libkernel::driver::interface::DriverManager;
 -
      exception::handling_init();
-     bsp::console::qemu_bring_up_console();
-
-     // This line will be printed as the test header.
-     println!("Testing synchronous exception handling by causing a page fault");
-
+-
+-    // This line will be printed as the test header.
+-    println!("Testing synchronous exception handling by causing a page fault");
+-
 -    let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
 -        Err(string) => {
 -            println!("Error mapping kernel binary: {}", string);
@@ -1703,6 +1754,9 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
 -    }
 -    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
 -
+     memory::mmu::post_enable_init();
+     bsp::console::qemu_bring_up_console();
+
 -    // Bring up the drivers needed for printing first.
 -    for i in bsp::driver::driver_manager()
 -        .early_print_device_drivers()
@@ -1713,15 +1767,34 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
 -    }
 -    bsp::driver::driver_manager().post_early_print_device_driver_init();
 -    // Printing available again from here on.
--
++    // This line will be printed as the test header.
++    println!("Testing synchronous exception handling by causing a page fault");
+
      println!("Writing beyond mapped area to address 9 GiB...");
      let big_addr: u64 = 9 * 1024 * 1024 * 1024;
-     core::ptr::read_volatile(big_addr as *mut u64);
+
+diff -uNr 14_virtual_mem_part2_mmio_remap/tests/03_exception_irq_sanity.rs 15_virtual_mem_part3_precomputed_tables/tests/03_exception_irq_sanity.rs
+--- 14_virtual_mem_part2_mmio_remap/tests/03_exception_irq_sanity.rs
++++ 15_virtual_mem_part3_precomputed_tables/tests/03_exception_irq_sanity.rs
+@@ -10,11 +10,12 @@
+ #![reexport_test_harness_main = "test_main"]
+ #![test_runner(libkernel::test_runner)]
+
+-use libkernel::{bsp, cpu, exception};
++use libkernel::{bsp, cpu, exception, memory};
+ use test_macros::kernel_test;
+
+ #[no_mangle]
+ unsafe fn kernel_init() -> ! {
++    memory::mmu::post_enable_init();
+     bsp::console::qemu_bring_up_console();
+
+     exception::handling_init();
 
 diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/arch.rb 15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb
 --- 14_virtual_mem_part2_mmio_remap/translation_table_tool/arch.rb
 +++ 15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb
-@@ -0,0 +1,335 @@
+@@ -0,0 +1,312 @@
 +# frozen_string_literal: true
 +
 +# SPDX-License-Identifier: MIT OR Apache-2.0
@@ -1904,21 +1977,16 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/arch.rb 15_virt
 +
 +# Translation table representing the structure defined in translation_table.rs.
 +class TranslationTable
-+    MMIO_APERTURE_MiB = 256 * 1024 * 1024
-+
 +    module MAIR
 +        NORMAL = 1
 +    end
 +
 +    def initialize
-+        @virt_mmio_start_addr = (BSP.kernel_virt_addr_space_size - MMIO_APERTURE_MiB) +
-+                                BSP.kernel_virt_start_addr
-+
 +        do_sanity_checks
 +
 +        num_lvl2_tables = BSP.kernel_virt_addr_space_size >> Granule512MiB::SHIFT
 +
-+        @lvl3 = new_lvl3(num_lvl2_tables, BSP.phys_table_struct_start_addr)
++        @lvl3 = new_lvl3(num_lvl2_tables, BSP.phys_addr_of_kernel_tables)
 +
 +        @lvl2_phys_start_addr = @lvl3.phys_start_addr + @lvl3.size_in_byte
 +        @lvl2 = new_lvl2(num_lvl2_tables, @lvl2_phys_start_addr)
@@ -1926,13 +1994,13 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/arch.rb 15_virt
 +        populate_lvl2_entries
 +    end
 +
-+    def map_pages_at(virt_pages, phys_pages, attributes)
-+        return if virt_pages.empty?
++    def map_at(virt_region, phys_region, attributes)
++        return if virt_region.empty?
 +
-+        raise if virt_pages.size != phys_pages.size
-+        raise if phys_pages.last > BSP.phys_addr_space_end_page
++        raise if virt_region.size != phys_region.size
++        raise if phys_region.last > BSP.phys_addr_space_end_page
 +
-+        virt_pages.zip(phys_pages).each do |virt_page, phys_page|
++        virt_region.zip(phys_region).each do |virt_page, phys_page|
 +            desc = page_descriptor_from(virt_page)
 +            set_lvl3_entry(desc, phys_page, attributes)
 +        end
@@ -1953,22 +2021,9 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/arch.rb 15_virt
 +
 +    private
 +
-+    def binary_with_mmio_clash?
-+        BSP.rw_end_exclusive >= @virt_mmio_start_addr
-+    end
-+
 +    def do_sanity_checks
 +        raise unless BSP.kernel_granule::SIZE == Granule64KiB::SIZE
 +        raise unless (BSP.kernel_virt_addr_space_size modulo Granule512MiB::SIZE).zero?
-+
-+        # Need to ensure that that the kernel binary does not clash with the upmost 256 MiB of the
-+        # virtual address space, which is reserved for runtime-remapping of MMIO.
-+        return unless binary_with_mmio_clash?
-+
-+        puts format('__data_end_exclusive: 0xmodulo16x', BSP.data_end_exclusive)
-+        puts format('MMIO start:           0xmodulo16x', @virt_mmio_start_addr)
-+
-+        raise 'Kernel virtual addresses clash with 256 MiB MMIO window'
 +    end
 +
 +    def new_lvl3(num_lvl2_tables, start_addr)
@@ -1997,8 +2052,6 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/arch.rb 15_virt
 +    end
 +
 +    def lvl2_lvl3_index_from(addr)
-+        addr -= BSP.kernel_virt_start_addr
-+
 +        lvl2_index = addr >> Granule512MiB::SHIFT
 +        lvl3_index = (addr & Granule512MiB::MASK) >> Granule64KiB::SHIFT
 +
@@ -2033,13 +2086,10 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/arch.rb 15_virt
 +
 +                  end
 +
-+        desc.pxn = case attributes.execute_never
-+                   when :XN
++        desc.pxn = if attributes.execute_never
 +                       Stage1PageDescriptor::PXN::TRUE
-+                   when :X
-+                       Stage1PageDescriptor::PXN::FALSE
 +                   else
-+                       raise 'Invalid input'
++                       Stage1PageDescriptor::PXN::FALSE
 +                   end
 +
 +        desc.uxn = Stage1PageDescriptor::UXN::TRUE
@@ -2061,7 +2111,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/arch.rb 15_virt
 diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/bsp.rb 15_virtual_mem_part3_precomputed_tables/translation_table_tool/bsp.rb
 --- 14_virtual_mem_part2_mmio_remap/translation_table_tool/bsp.rb
 +++ 15_virtual_mem_part3_precomputed_tables/translation_table_tool/bsp.rb
-@@ -0,0 +1,177 @@
+@@ -0,0 +1,49 @@
 +# frozen_string_literal: true
 +
 +# SPDX-License-Identifier: MIT OR Apache-2.0
@@ -2070,61 +2120,31 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/bsp.rb 15_virtu
 +
 +# Raspberry Pi 3 + 4
 +class RaspberryPi
-+    attr_reader :kernel_granule, :kernel_virt_addr_space_size, :kernel_virt_start_addr
++    attr_reader :kernel_granule, :kernel_virt_addr_space_size
 +
-+    NM_BINARY = 'aarch64-none-elf-nm'
-+    READELF_BINARY = 'aarch64-none-elf-readelf'
 +    MEMORY_SRC = File.read('src/bsp/raspberrypi/memory.rs').split("\n")
 +
-+    def initialize(kernel_elf)
++    def initialize
 +        @kernel_granule = Granule64KiB
 +
-+        @virt_addresses = {
-+            boot_core_stack_start: /__boot_core_stack_start/,
-+            boot_core_stack_end_exclusive: /__boot_core_stack_end_exclusive/,
-+
-+            rx_start: /__rx_start/,
-+            rx_end_exclusive: /__rx_end_exclusive/,
-+
-+            rw_start: /__rw_start/,
-+            rw_end_exclusive: /__rw_end_exclusive/,
-+
-+            table_struct_start_addr: /bsp::.*::memory::mmu::KERNEL_TABLES/,
-+            phys_tables_base_addr: /PHYS_KERNEL_TABLES_BASE_ADDR/
-+        }
-+
-+        symbols = `#{NM_BINARY} --demangle #{kernel_elf}`.split("\n")
-+        @kernel_virt_addr_space_size = parse_from_symbols(symbols, /__kernel_virt_addr_space_size/)
-+        @kernel_virt_start_addr = 0
-+        @virt_addresses = parse_from_symbols(symbols, @virt_addresses)
-+        @phys_addresses = virt_to_phys(@virt_addresses)
-+
-+        @descriptors = parse_descriptors
-+        update_max_descriptor_name_length
++        @kernel_virt_addr_space_size = KERNEL_ELF.symbol_value('__kernel_virt_addr_space_size')
 +
-+        @text_section_offset_in_elf = parse_text_section_offset_in_elf(kernel_elf)
++        @virt_addr_of_kernel_tables = KERNEL_ELF.symbol_value('KERNEL_TABLES')
++        @virt_addr_of_phys_kernel_tables_base_addr = KERNEL_ELF.symbol_value(
++            'PHYS_KERNEL_TABLES_BASE_ADDR'
++        )
 +    end
 +
-+    def rw_end_exclusive
-+        @virt_addresses[:rw_end_exclusive]
++    def phys_addr_of_kernel_tables
++        KERNEL_ELF.virt_to_phys(@virt_addr_of_kernel_tables)
 +    end
 +
-+    def phys_table_struct_start_addr
-+        @phys_addresses[:table_struct_start_addr]
++    def kernel_tables_offset_in_file
++        KERNEL_ELF.virt_addr_to_file_offset(@virt_addr_of_kernel_tables)
 +    end
 +
-+    def table_struct_offset_in_kernel_elf
-+        (@virt_addresses[:table_struct_start_addr] - @virt_addresses[:rx_start]) +
-+            @text_section_offset_in_elf
-+    end
-+
-+    def phys_tables_base_addr
-+        @phys_addresses[:phys_tables_base_addr]
-+    end
-+
-+    def phys_tables_base_addr_offset_in_kernel_elf
-+        (@virt_addresses[:phys_tables_base_addr] - @virt_addresses[:rx_start]) +
-+            @text_section_offset_in_elf
++    def phys_kernel_tables_base_addr_offset_in_file
++        KERNEL_ELF.virt_addr_to_file_offset(@virt_addr_of_phys_kernel_tables_base_addr)
 +    end
 +
 +    def phys_addr_space_end_page
@@ -2140,110 +2160,12 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/bsp.rb 15_virtu
 +
 +        x.scan(/\d+/).join.to_i(16)
 +    end
-+
-+    def kernel_map_binary
-+        MappingDescriptor.print_header
-+
-+        @descriptors.each do |i|
-+            print 'Generating'.rjust(12).green.bold
-+            print ' '
-+            puts i.to_s
-+
-+            TRANSLATION_TABLES.map_pages_at(i.virt_pages, i.phys_pages, i.attributes)
-+        end
-+
-+        MappingDescriptor.print_divider
-+    end
-+
-+    private
-+
-+    def parse_from_symbols(symbols, input)
-+        case input.class.to_s
-+        when 'Regexp'
-+            symbols.grep(input).first.split.first.to_i(16)
-+        when 'Hash'
-+            input.transform_values do |val|
-+                symbols.grep(val).first.split.first.to_i(16)
-+            end
-+        else
-+            raise
-+        end
-+    end
-+
-+    def parse_text_section_offset_in_elf(kernel_elf)
-+        `#{READELF_BINARY} --sections #{kernel_elf}`.scan(/.text.*/).first.split.last.to_i(16)
-+    end
-+
-+    def virt_to_phys(input)
-+        case input.class.to_s
-+        when 'Integer'
-+            input - @kernel_virt_start_addr
-+        when 'Hash'
-+            input.transform_values do |val|
-+                val - @kernel_virt_start_addr
-+            end
-+        else
-+            raise
-+        end
-+    end
-+
-+    def descriptor_ro
-+        name = 'Code and RO data'
-+
-+        ro_size = @virt_addresses[:rx_end_exclusive] -
-+                  @virt_addresses[:rx_start]
-+
-+        virt_ro_pages = PageArray.new(@virt_addresses[:rx_start], ro_size, @kernel_granule::SIZE)
-+        phys_ro_pages = PageArray.new(@phys_addresses[:rx_start], ro_size, @kernel_granule::SIZE)
-+        ro_attribues = AttributeFields.new(:CacheableDRAM, :ReadOnly, :X)
-+
-+        MappingDescriptor.new(name, virt_ro_pages, phys_ro_pages, ro_attribues)
-+    end
-+
-+    def descriptor_data
-+        name = 'Data and bss'
-+
-+        data_size = @virt_addresses[:rw_end_exclusive] -
-+                    @virt_addresses[:rw_start]
-+
-+        virt_data_pages = PageArray.new(@virt_addresses[:rw_start], data_size,
-+                                        @kernel_granule::SIZE)
-+        phys_data_pages = PageArray.new(@phys_addresses[:rw_start], data_size,
-+                                        @kernel_granule::SIZE)
-+        data_attribues = AttributeFields.new(:CacheableDRAM, :ReadWrite, :XN)
-+
-+        MappingDescriptor.new(name, virt_data_pages, phys_data_pages, data_attribues)
-+    end
-+
-+    def descriptor_boot_core_stack
-+        name = 'Boot-core stack'
-+
-+        boot_core_stack_size = @virt_addresses[:boot_core_stack_end_exclusive] -
-+                               @virt_addresses[:boot_core_stack_start]
-+
-+        virt_boot_core_stack_pages = PageArray.new(@virt_addresses[:boot_core_stack_start],
-+                                                   boot_core_stack_size, @kernel_granule::SIZE)
-+        phys_boot_core_stack_pages = PageArray.new(@phys_addresses[:boot_core_stack_start],
-+                                                   boot_core_stack_size, @kernel_granule::SIZE)
-+        boot_core_stack_attribues = AttributeFields.new(:CacheableDRAM, :ReadWrite, :XN)
-+
-+        MappingDescriptor.new(name, virt_boot_core_stack_pages, phys_boot_core_stack_pages,
-+                              boot_core_stack_attribues)
-+    end
-+
-+    def parse_descriptors
-+        [descriptor_ro, descriptor_data, descriptor_boot_core_stack]
-+    end
-+
-+    def update_max_descriptor_name_length
-+        MappingDescriptor.max_descriptor_name_length = @descriptors.map { |i| i.name.size }.max
-+    end
 +end
 
 diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/generic.rb 15_virtual_mem_part3_precomputed_tables/translation_table_tool/generic.rb
 --- 14_virtual_mem_part2_mmio_remap/translation_table_tool/generic.rb
 +++ 15_virtual_mem_part3_precomputed_tables/translation_table_tool/generic.rb
-@@ -0,0 +1,125 @@
+@@ -0,0 +1,179 @@
 +# frozen_string_literal: true
 +
 +# SPDX-License-Identifier: MIT OR Apache-2.0
@@ -2273,6 +2195,12 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/generic.rb 15_v
 +        (self & (alignment - 1)).zero?
 +    end
 +
++    def align_up(alignment)
++        raise unless alignment.power_of_two?
++
++        (self + alignment - 1) & ~(alignment - 1)
++    end
++
 +    def to_hex_underscore(with_leading_zeros: false)
 +        fmt = with_leading_zeros ? 'modulo016x' : 'modulox'
 +        value = format(fmt, self).to_s.reverse.scan(/.{4}|.+/).join('_').reverse
@@ -2282,7 +2210,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/generic.rb 15_v
 +end
 +
 +# An array where each value is the start address of a Page.
-+class PageArray < Array
++class MemoryRegion < Array
 +    def initialize(start_addr, size, granule_size)
 +        raise unless start_addr.aligned?(granule_size)
 +        raise unless size.positive?
@@ -2304,76 +2232,221 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/generic.rb 15_v
 +        @acc_perms = acc_perms
 +        @execute_never = execute_never
 +    end
++
++    def to_s
++        x = case @mem_attributes
++            when :CacheableDRAM
++                'C'
++            else
++                '?'
++            end
++
++        y = case @acc_perms
++            when :ReadWrite
++                'RW'
++            when :ReadOnly
++                'RO'
++            else
++                '??'
++            end
++
++        z = @execute_never ? 'XN' : 'X '
++
++        "#{x} #{y} #{z}"
++    end
 +end
 +
-+# A container that describes a one- or many-page virt-to-phys mapping.
++# A container that describes a virt-to-phys region mapping.
 +class MappingDescriptor
-+    @max_descriptor_name_length = 0
++    @max_section_name_length = 'Sections'.length
 +
 +    class << self
-+        attr_accessor :max_descriptor_name_length
++        attr_accessor :max_section_name_length
++
++        def update_max_section_name_length(length)
++            @max_section_name_length = [@max_section_name_length, length].max
++        end
 +    end
 +
-+    attr_reader :name, :virt_pages, :phys_pages, :attributes
++    attr_reader :name, :virt_region, :phys_region, :attributes
 +
-+    def initialize(name, virt_pages, phys_pages, attributes)
++    def initialize(name, virt_region, phys_region, attributes)
 +        @name = name
-+        @virt_pages = virt_pages
-+        @phys_pages = phys_pages
++        @virt_region = virt_region
++        @phys_region = phys_region
 +        @attributes = attributes
 +    end
 +
 +    def to_s
-+        name = @name.ljust(self.class.max_descriptor_name_length)
-+        virt_start = @virt_pages.first.to_hex_underscore(with_leading_zeros: true)
-+        size = ((@virt_pages.size * 65_536) / 1024).to_s.rjust(3)
++        name = @name.ljust(self.class.max_section_name_length)
++        virt_start = @virt_region.first.to_hex_underscore(with_leading_zeros: true)
++        phys_start = @phys_region.first.to_hex_underscore(with_leading_zeros: true)
++        size = ((@virt_region.size * 65_536) / 1024).to_s.rjust(3)
 +
-+        "#{name} | #{virt_start} | #{size} KiB"
++        "#{name} | #{virt_start} | #{phys_start} | #{size} KiB | #{@attributes}"
 +    end
 +
 +    def self.print_divider
 +        print '             '
-+        print '-' * max_descriptor_name_length
-+        puts '----------------------------------'
++        print '-' * max_section_name_length
++        puts '--------------------------------------------------------------------'
 +    end
 +
 +    def self.print_header
 +        print_divider
 +        print '             '
-+        print 'Section'.center(max_descriptor_name_length)
++        print 'Sections'.center(max_section_name_length)
 +        print '   '
-+        print 'Start Virt Addr'.center(21)
++        print 'Virt Start Addr'.center(21)
++        print '   '
++        print 'Phys Start Addr'.center(21)
 +        print '   '
 +        print 'Size'.center(7)
++        print '   '
++        print 'Attr'.center(7)
 +        puts
 +        print_divider
 +    end
 +end
 +
-+def kernel_patch_tables(kernel_binary)
++def kernel_map_binary
++    mapping_descriptors = KERNEL_ELF.generate_mapping_descriptors
++
++    # Generate_mapping_descriptors updates the header being printed with this call. So it must come
++    # afterwards.
++    MappingDescriptor.print_header
++
++    mapping_descriptors.each do |i|
++        print 'Generating'.rjust(12).green.bold
++        print ' '
++        puts i.to_s
++
++        TRANSLATION_TABLES.map_at(i.virt_region, i.phys_region, i.attributes)
++    end
++
++    MappingDescriptor.print_divider
++end
++
++def kernel_patch_tables(kernel_elf_path)
 +    print 'Patching'.rjust(12).green.bold
-+    print ' Kernel table struct at physical '
-+    puts BSP.phys_table_struct_start_addr.to_hex_underscore
++    print ' Kernel table struct at ELF file offset '
++    puts BSP.kernel_tables_offset_in_file.to_hex_underscore
 +
-+    File.binwrite(kernel_binary, TRANSLATION_TABLES.to_binary,
-+                  BSP.table_struct_offset_in_kernel_elf)
++    File.binwrite(kernel_elf_path, TRANSLATION_TABLES.to_binary, BSP.kernel_tables_offset_in_file)
 +end
 +
-+def kernel_patch_base_addr(kernel_binary)
++def kernel_patch_base_addr(kernel_elf_path)
 +    print 'Patching'.rjust(12).green.bold
-+    print ' Value of kernel table physical base address ('
++    print ' Kernel tables physical base address start argument to value '
 +    print TRANSLATION_TABLES.phys_tables_base_addr.to_hex_underscore
-+    print ') at physical '
-+    puts BSP.phys_tables_base_addr.to_hex_underscore
++    print ' at ELF file offset '
++    puts BSP.phys_kernel_tables_base_addr_offset_in_file.to_hex_underscore
++
++    File.binwrite(kernel_elf_path, TRANSLATION_TABLES.phys_tables_base_addr_binary,
++                  BSP.phys_kernel_tables_base_addr_offset_in_file)
++end
+
+diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/kernel_elf.rb 15_virtual_mem_part3_precomputed_tables/translation_table_tool/kernel_elf.rb
+--- 14_virtual_mem_part2_mmio_remap/translation_table_tool/kernel_elf.rb
++++ 15_virtual_mem_part3_precomputed_tables/translation_table_tool/kernel_elf.rb
+@@ -0,0 +1,92 @@
++# frozen_string_literal: true
++
++# SPDX-License-Identifier: MIT OR Apache-2.0
++#
++# Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
++
++# KernelELF
++class KernelELF
++    SECTION_FLAG_ALLOC = 2
++
++    def initialize(kernel_elf_path)
++        @elf = ELFTools::ELFFile.new(File.open(kernel_elf_path))
++        @symtab_section = @elf.section_by_name('.symtab')
++    end
++
++    def symbol_value(symbol_name)
++        @symtab_section.symbol_by_name(symbol_name).header.st_value
++    end
++
++    def segment_containing_virt_addr(virt_addr)
++        @elf.each_segments do |segment|
++            return segment if segment.vma_in?(virt_addr)
++        end
++    end
++
++    def virt_to_phys(virt_addr)
++        segment = segment_containing_virt_addr(virt_addr)
++        translation_offset = segment.header.p_vaddr - segment.header.p_paddr
++
++        virt_addr - translation_offset
++    end
++
++    def virt_addr_to_file_offset(virt_addr)
++        segment = segment_containing_virt_addr(virt_addr)
++        segment.vma_to_offset(virt_addr)
++    end
 +
-+    File.binwrite(kernel_binary, TRANSLATION_TABLES.phys_tables_base_addr_binary,
-+                  BSP.phys_tables_base_addr_offset_in_kernel_elf)
++    def sections_in_segment(segment)
++        head = segment.mem_head
++        tail = segment.mem_tail
++
++        sections = @elf.each_sections.select do |section|
++            file_offset = section.header.sh_addr
++            flags = section.header.sh_flags
++
++            file_offset >= head && file_offset < tail && (flags & SECTION_FLAG_ALLOC != 0)
++        end
++
++        sections.map(&:name).join(' ')
++    end
++
++    def select_load_segments
++        @elf.each_segments.select do |segment|
++            segment.instance_of?(ELFTools::Segments::LoadSegment)
++        end
++    end
++
++    def segment_get_acc_perms(segment)
++        if segment.readable? && segment.writable?
++            :ReadWrite
++        elsif segment.readable?
++            :ReadOnly
++        else
++            :Invalid
++        end
++    end
++
++    def update_max_section_name_length(descriptors)
++        MappingDescriptor.update_max_section_name_length(descriptors.map { |i| i.name.size }.max)
++    end
++
++    def generate_mapping_descriptors
++        descriptors = select_load_segments.map do |segment|
++            # Assume each segment is page aligned.
++            size = segment.mem_size.align_up(BSP.kernel_granule::SIZE)
++            virt_start_addr = segment.header.p_vaddr
++            phys_start_addr = segment.header.p_paddr
++            acc_perms = segment_get_acc_perms(segment)
++            execute_never = !segment.executable?
++            section_names = sections_in_segment(segment)
++
++            virt_region = MemoryRegion.new(virt_start_addr, size, BSP.kernel_granule::SIZE)
++            phys_region = MemoryRegion.new(phys_start_addr, size, BSP.kernel_granule::SIZE)
++            attributes = AttributeFields.new(:CacheableDRAM, acc_perms, execute_never)
++
++            MappingDescriptor.new(section_names, virt_region, phys_region, attributes)
++        end
++
++        update_max_section_name_length(descriptors)
++        descriptors
++    end
 +end
 
 diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/main.rb 15_virtual_mem_part3_precomputed_tables/translation_table_tool/main.rb
 --- 14_virtual_mem_part2_mmio_remap/translation_table_tool/main.rb
 +++ 15_virtual_mem_part3_precomputed_tables/translation_table_tool/main.rb
-@@ -0,0 +1,47 @@
+@@ -0,0 +1,50 @@
 +#!/usr/bin/env ruby
 +# frozen_string_literal: true
 +
@@ -2383,13 +2456,15 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/main.rb 15_virt
 +
 +TARGET = ARGV[0].split('-').first.to_sym
 +BSP_TYPE = ARGV[1].to_sym
-+kernel_elf = ARGV[2]
++kernel_elf_path = ARGV[2]
 +
 +require 'rubygems'
 +require 'bundler/setup'
 +require 'colorize'
++require 'elftools'
 +
 +require_relative 'generic'
++require_relative 'kernel_elf'
 +require_relative 'bsp'
 +require_relative 'arch'
 +
@@ -2398,9 +2473,11 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/main.rb 15_virt
 +
 +start = Time.now
 +
++KERNEL_ELF = KernelELF.new(kernel_elf_path)
++
 +BSP = case BSP_TYPE
 +      when :rpi3, :rpi4
-+          RaspberryPi.new(kernel_elf)
++          RaspberryPi.new
 +      else
 +          raise
 +      end
@@ -2412,10 +2489,9 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/main.rb 15_virt
 +                         raise
 +                     end
 +
-+BSP.kernel_map_binary
-+
-+kernel_patch_tables(kernel_elf)
-+kernel_patch_base_addr(kernel_elf)
++kernel_map_binary
++kernel_patch_tables(kernel_elf_path)
++kernel_patch_base_addr(kernel_elf_path)
 +
 +elapsed = Time.now - start
 +
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
index d22b61877..52195d8fb 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
@@ -11,8 +11,7 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-use crate::{cpu, memory, memory::Address};
-use core::intrinsics::unlikely;
+use crate::{memory, memory::Address};
 use cortex_a::{asm, registers::*};
 use tock_registers::interfaces::Writeable;
 
@@ -80,9 +79,7 @@ pub unsafe extern "C" fn _start_rust(
 
     // Turn on the MMU for EL1.
     let addr = Address::new(phys_kernel_tables_base_addr as usize);
-    if unlikely(memory::mmu::enable_mmu_and_caching(addr).is_err()) {
-        cpu::wait_forever();
-    }
+    memory::mmu::enable_mmu_and_caching(addr).unwrap();
 
     // Use `eret` to "return" to EL1. This results in execution of kernel_init() in EL1.
     asm::eret()
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu.rs
index 2cad10b76..ac0ef3e19 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu.rs
@@ -131,7 +131,7 @@ impl memory::mmu::interface::MMU for MemoryManagementUnit {
         self.set_up_mair();
 
         // Set the "Translation Table Base Register".
-        TTBR0_EL1.set_baddr(phys_tables_base_addr.into_usize() as u64);
+        TTBR0_EL1.set_baddr(phys_tables_base_addr.as_usize() as u64);
 
         self.configure_translation_control();
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs
index 73ac3a5d4..ceb85252b 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -14,11 +14,12 @@
 //! crate::memory::mmu::translation_table::arch_translation_table
 
 use crate::{
-    bsp, memory,
+    bsp,
     memory::{
+        self,
         mmu::{
             arch_mmu::{Granule512MiB, Granule64KiB},
-            AccessPermissions, AttributeFields, MemAttributes, Page, PageSliceDescriptor,
+            AccessPermissions, AttributeFields, MemAttributes, MemoryRegion, PageAddress,
         },
         Address, Physical, Virtual,
     },
@@ -142,9 +143,6 @@ pub struct FixedSizeTranslationTable<const NUM_TABLES: usize> {
     /// Table descriptors, covering 512 MiB windows.
     lvl2: [TableDescriptor; NUM_TABLES],
 
-    /// Index of the next free MMIO page.
-    cur_l3_mmio_index: usize,
-
     /// Have the tables been initialized?
     initialized: bool,
 }
@@ -171,7 +169,7 @@ impl TableDescriptor {
     pub fn from_next_lvl_table_addr(phys_next_lvl_table_addr: Address<Physical>) -> Self {
         let val = InMemoryRegister::<u64, STAGE1_TABLE_DESCRIPTOR::Register>::new(0);
 
-        let shifted = phys_next_lvl_table_addr.into_usize() >> Granule64KiB::SHIFT;
+        let shifted = phys_next_lvl_table_addr.as_usize() >> Granule64KiB::SHIFT;
         val.write(
             STAGE1_TABLE_DESCRIPTOR::NEXT_LEVEL_TABLE_ADDR_64KiB.val(shifted as u64)
                 + STAGE1_TABLE_DESCRIPTOR::TYPE::Table
@@ -257,15 +255,15 @@ impl PageDescriptor {
     }
 
     /// Create an instance.
-    pub fn from_output_page_ptr(
-        phys_output_page_ptr: *const Page<Physical>,
+    pub fn from_output_page_addr(
+        phys_output_page_addr: PageAddress<Physical>,
         attribute_fields: &AttributeFields,
     ) -> Self {
         let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
 
-        let shifted = phys_output_page_ptr as u64 >> Granule64KiB::SHIFT;
+        let shifted = phys_output_page_addr.into_inner().as_usize() >> Granule64KiB::SHIFT;
         val.write(
-            STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted)
+            STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted as u64)
                 + STAGE1_PAGE_DESCRIPTOR::AF::True
                 + STAGE1_PAGE_DESCRIPTOR::TYPE::Page
                 + STAGE1_PAGE_DESCRIPTOR::VALID::True
@@ -282,12 +280,11 @@ impl PageDescriptor {
     }
 
     /// Returns the output page.
-    fn output_page_ptr(&self) -> *const Page<Physical> {
+    fn output_page_addr(&self) -> PageAddress<Physical> {
         let shifted = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(self.value)
-            .read(STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB);
-        let addr = shifted << Granule64KiB::SHIFT;
+            .read(STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB) as usize;
 
-        addr as *const Page<Physical>
+        PageAddress::from(shifted << Granule64KiB::SHIFT)
     }
 
     /// Returns the attributes.
@@ -309,10 +306,6 @@ where
 }
 
 impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
-    // Reserve the last 256 MiB of the address space for MMIO mappings.
-    const L2_MMIO_START_INDEX: usize = NUM_TABLES - 1;
-    const L3_MMIO_START_INDEX: usize = 8192 / 2;
-
     /// Create an instance.
     #[allow(clippy::assertions_on_constants)]
     const fn _new(for_precompute: bool) -> Self {
@@ -324,7 +317,6 @@ impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
         Self {
             lvl3: [[PageDescriptor::new_zeroed(); 8192]; NUM_TABLES],
             lvl2: [TableDescriptor::new_zeroed(); NUM_TABLES],
-            cur_l3_mmio_index: Self::L3_MMIO_START_INDEX,
             initialized: for_precompute,
         }
     }
@@ -338,32 +330,13 @@ impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
         Self::_new(false)
     }
 
-    /// The start address of the table's MMIO range.
-    #[inline(always)]
-    fn mmio_start_addr(&self) -> Address<Virtual> {
-        Address::new(
-            (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
-                | (Self::L3_MMIO_START_INDEX << Granule64KiB::SHIFT),
-        )
-    }
-
-    /// The inclusive end address of the table's MMIO range.
-    #[inline(always)]
-    fn mmio_end_addr_inclusive(&self) -> Address<Virtual> {
-        Address::new(
-            (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
-                | (8191 << Granule64KiB::SHIFT)
-                | (Granule64KiB::SIZE - 1),
-        )
-    }
-
     /// Helper to calculate the lvl2 and lvl3 indices from an address.
     #[inline(always)]
-    fn lvl2_lvl3_index_from_page_ptr(
+    fn lvl2_lvl3_index_from_page_addr(
         &self,
-        virt_page_ptr: *const Page<Virtual>,
+        virt_page_addr: PageAddress<Virtual>,
     ) -> Result<(usize, usize), &'static str> {
-        let addr = virt_page_ptr as usize;
+        let addr = virt_page_addr.into_inner().as_usize();
         let lvl2_index = addr >> Granule512MiB::SHIFT;
         let lvl3_index = (addr & Granule512MiB::MASK) >> Granule64KiB::SHIFT;
 
@@ -376,11 +349,11 @@ impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
 
     /// Returns the PageDescriptor corresponding to the supplied page address.
     #[inline(always)]
-    fn page_descriptor_from_page_ptr(
+    fn page_descriptor_from_page_addr(
         &self,
-        virt_page_ptr: *const Page<Virtual>,
+        virt_page_addr: PageAddress<Virtual>,
     ) -> Result<&PageDescriptor, &'static str> {
-        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page_ptr(virt_page_ptr)?;
+        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page_addr(virt_page_addr)?;
         let desc = &self.lvl3[lvl2_index][lvl3_index];
 
         Ok(desc)
@@ -390,12 +363,12 @@ impl<const NUM_TABLES: usize> FixedSizeTranslationTable<NUM_TABLES> {
     ///
     /// Doesn't allow overriding an already valid page.
     #[inline(always)]
-    fn set_page_descriptor_from_page_ptr(
+    fn set_page_descriptor_from_page_addr(
         &mut self,
-        virt_page_ptr: *const Page<Virtual>,
+        virt_page_addr: PageAddress<Virtual>,
         new_desc: &PageDescriptor,
     ) -> Result<(), &'static str> {
-        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page_ptr(virt_page_ptr)?;
+        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page_addr(virt_page_addr)?;
         let desc = &mut self.lvl3[lvl2_index][lvl3_index];
 
         if desc.is_valid() {
@@ -428,101 +401,57 @@ impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::Transla
             *lvl2_entry = new_desc;
         }
 
-        self.cur_l3_mmio_index = Self::L3_MMIO_START_INDEX;
         self.initialized = true;
 
         Ok(())
     }
 
-    unsafe fn map_pages_at(
+    unsafe fn map_at(
         &mut self,
-        virt_pages: &PageSliceDescriptor<Virtual>,
-        phys_pages: &PageSliceDescriptor<Physical>,
+        virt_region: &MemoryRegion<Virtual>,
+        phys_region: &MemoryRegion<Physical>,
         attr: &AttributeFields,
     ) -> Result<(), &'static str> {
         assert!(self.initialized, "Translation tables not initialized");
 
-        let v = virt_pages.as_slice();
-        let p = phys_pages.as_slice();
-
-        // No work to do for empty slices.
-        if v.is_empty() {
-            return Ok(());
-        }
-
-        if v.len() != p.len() {
-            return Err("Tried to map page slices with unequal sizes");
+        if virt_region.size() != phys_region.size() {
+            return Err("Tried to map memory regions with unequal sizes");
         }
 
-        if p.last().unwrap().as_ptr() >= bsp::memory::mmu::phys_addr_space_end_page_ptr() {
+        if phys_region.end_exclusive_page_addr() > bsp::memory::phys_addr_space_end_exclusive_addr()
+        {
             return Err("Tried to map outside of physical address space");
         }
 
-        let iter = p.iter().zip(v.iter());
-        for (phys_page, virt_page) in iter {
-            let new_desc = PageDescriptor::from_output_page_ptr(phys_page.as_ptr(), attr);
-            let virt_page = virt_page.as_ptr();
+        let iter = phys_region.into_iter().zip(virt_region.into_iter());
+        for (phys_page_addr, virt_page_addr) in iter {
+            let new_desc = PageDescriptor::from_output_page_addr(phys_page_addr, attr);
+            let virt_page = virt_page_addr;
 
-            self.set_page_descriptor_from_page_ptr(virt_page, &new_desc)?;
+            self.set_page_descriptor_from_page_addr(virt_page, &new_desc)?;
         }
 
         Ok(())
     }
 
-    fn next_mmio_virt_page_slice(
-        &mut self,
-        num_pages: usize,
-    ) -> Result<PageSliceDescriptor<Virtual>, &'static str> {
-        assert!(self.initialized, "Translation tables not initialized");
-
-        if num_pages == 0 {
-            return Err("num_pages == 0");
-        }
-
-        if (self.cur_l3_mmio_index + num_pages) > 8191 {
-            return Err("Not enough MMIO space left");
-        }
-
-        let addr = Address::new(
-            (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
-                | (self.cur_l3_mmio_index << Granule64KiB::SHIFT),
-        );
-        self.cur_l3_mmio_index += num_pages;
-
-        Ok(PageSliceDescriptor::from_addr(addr, num_pages))
-    }
-
-    fn is_virt_page_slice_mmio(&self, virt_pages: &PageSliceDescriptor<Virtual>) -> bool {
-        let start_addr = virt_pages.start_addr();
-        let end_addr_inclusive = virt_pages.end_addr_inclusive();
-
-        for i in [start_addr, end_addr_inclusive].iter() {
-            if (*i >= self.mmio_start_addr()) && (*i <= self.mmio_end_addr_inclusive()) {
-                return true;
-            }
-        }
-
-        false
-    }
-
-    fn try_virt_page_ptr_to_phys_page_ptr(
+    fn try_virt_page_addr_to_phys_page_addr(
         &self,
-        virt_page_ptr: *const Page<Virtual>,
-    ) -> Result<*const Page<Physical>, &'static str> {
-        let page_desc = self.page_descriptor_from_page_ptr(virt_page_ptr)?;
+        virt_page_addr: PageAddress<Virtual>,
+    ) -> Result<PageAddress<Physical>, &'static str> {
+        let page_desc = self.page_descriptor_from_page_addr(virt_page_addr)?;
 
         if !page_desc.is_valid() {
             return Err("Page marked invalid");
         }
 
-        Ok(page_desc.output_page_ptr())
+        Ok(page_desc.output_page_addr())
     }
 
     fn try_page_attributes(
         &self,
-        virt_page_ptr: *const Page<Virtual>,
+        virt_page_addr: PageAddress<Virtual>,
     ) -> Result<AttributeFields, &'static str> {
-        let page_desc = self.page_descriptor_from_page_ptr(virt_page_ptr)?;
+        let page_desc = self.page_descriptor_from_page_addr(virt_page_addr)?;
 
         if !page_desc.is_valid() {
             return Err("Page marked invalid");
@@ -538,9 +467,10 @@ impl<const NUM_TABLES: usize> memory::mmu::translation_table::interface::Transla
         &self,
         virt_addr: Address<Virtual>,
     ) -> Result<Address<Physical>, &'static str> {
-        let page = self.try_virt_page_ptr_to_phys_page_ptr(virt_addr.as_page_ptr())?;
+        let virt_page = PageAddress::from(virt_addr.align_down_page());
+        let phys_page = self.try_virt_page_addr_to_phys_page_addr(virt_page)?;
 
-        Ok(Address::new(page as usize + virt_addr.offset_into_page()))
+        Ok(phys_page.into_inner() + virt_addr.offset_into_page())
     }
 }
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2.rs
index 51c321868..3f69bd113 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2.rs
@@ -133,8 +133,8 @@ impl GICv2 {
         Self {
             gicd_mmio_descriptor,
             gicc_mmio_descriptor,
-            gicd: gicd::GICD::new(gicd_mmio_descriptor.start_addr().into_usize()),
-            gicc: gicc::GICC::new(gicc_mmio_descriptor.start_addr().into_usize()),
+            gicd: gicd::GICD::new(gicd_mmio_descriptor.start_addr().as_usize()),
+            gicc: gicc::GICC::new(gicc_mmio_descriptor.start_addr().as_usize()),
             is_mmio_remapped: AtomicBool::new(false),
             handler_table: InitStateLock::new([None; Self::NUM_IRQS]),
         }
@@ -158,11 +158,11 @@ impl driver::interface::DeviceDriver for GICv2 {
 
             // GICD
             virt_addr = memory::mmu::kernel_map_mmio("GICD", &self.gicd_mmio_descriptor)?;
-            self.gicd.set_mmio(virt_addr.into_usize());
+            self.gicd.set_mmio(virt_addr.as_usize());
 
             // GICC
             virt_addr = memory::mmu::kernel_map_mmio("GICC", &self.gicc_mmio_descriptor)?;
-            self.gicc.set_mmio(virt_addr.into_usize());
+            self.gicc.set_mmio(virt_addr.as_usize());
 
             // Conclude remapping.
             self.is_mmio_remapped.store(true, Ordering::Relaxed);
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 9bdc73f8a..bc96a1290 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -215,7 +215,7 @@ impl GPIO {
         Self {
             mmio_descriptor,
             virt_mmio_start_addr: AtomicUsize::new(0),
-            inner: IRQSafeNullLock::new(GPIOInner::new(mmio_descriptor.start_addr().into_usize())),
+            inner: IRQSafeNullLock::new(GPIOInner::new(mmio_descriptor.start_addr().as_usize())),
         }
     }
 
@@ -239,10 +239,10 @@ impl driver::interface::DeviceDriver for GPIO {
         let virt_addr = memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?;
 
         self.inner
-            .lock(|inner| inner.init(Some(virt_addr.into_usize())))?;
+            .lock(|inner| inner.init(Some(virt_addr.as_usize())))?;
 
         self.virt_mmio_start_addr
-            .store(virt_addr.into_usize(), Ordering::Relaxed);
+            .store(virt_addr.as_usize(), Ordering::Relaxed);
 
         Ok(())
     }
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index 5934e6dd1..a197adfcf 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -78,7 +78,7 @@ impl PeripheralIC {
     ///
     /// - The user must ensure to provide correct MMIO descriptors.
     pub const unsafe fn new(mmio_descriptor: memory::mmu::MMIODescriptor) -> Self {
-        let addr = mmio_descriptor.start_addr().into_usize();
+        let addr = mmio_descriptor.start_addr().as_usize();
 
         Self {
             mmio_descriptor,
@@ -111,7 +111,7 @@ impl driver::interface::DeviceDriver for PeripheralIC {
 
     unsafe fn init(&self) -> Result<(), &'static str> {
         let virt_addr =
-            memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?.into_usize();
+            memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?.as_usize();
 
         self.wo_registers
             .lock(|regs| *regs = WriteOnlyRegisters::new(virt_addr));
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 83a984b8c..9d58d9ea2 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -414,7 +414,7 @@ impl PL011Uart {
             mmio_descriptor,
             virt_mmio_start_addr: AtomicUsize::new(0),
             inner: IRQSafeNullLock::new(PL011UartInner::new(
-                mmio_descriptor.start_addr().into_usize(),
+                mmio_descriptor.start_addr().as_usize(),
             )),
             irq_number,
         }
@@ -435,10 +435,10 @@ impl driver::interface::DeviceDriver for PL011Uart {
         let virt_addr = memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?;
 
         self.inner
-            .lock(|inner| inner.init(Some(virt_addr.into_usize())))?;
+            .lock(|inner| inner.init(Some(virt_addr.as_usize())))?;
 
         self.virt_mmio_start_addr
-            .store(virt_addr.into_usize(), Ordering::Relaxed);
+            .store(virt_addr.as_usize(), Ordering::Relaxed);
 
         Ok(())
     }
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/console.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/console.rs
index e16b3a3d6..e249e8223 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/console.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/console.rs
@@ -26,9 +26,9 @@ use core::fmt;
 pub unsafe fn panic_console_out() -> impl fmt::Write {
     use driver::interface::DeviceDriver;
 
-    let mut panic_gpio = device_driver::PanicGPIO::new(memory::map::mmio::GPIO_START.into_usize());
+    let mut panic_gpio = device_driver::PanicGPIO::new(memory::map::mmio::GPIO_START.as_usize());
     let mut panic_uart =
-        device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START.into_usize());
+        device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START.as_usize());
 
     // If remapping of the driver's MMIO already happened, take the remapped start address.
     // Otherwise, take a chance with the default physical address.
@@ -52,7 +52,7 @@ pub unsafe fn panic_console_out() -> impl fmt::Write {
     use driver::interface::DeviceDriver;
 
     let mut panic_uart =
-        device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START.into_usize());
+        device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START.as_usize());
 
     let maybe_uart_mmio_start_addr = super::PL011_UART.virt_mmio_start_addr();
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
index 0d46f9d97..c5d58c30a 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
@@ -1 +1 @@
-__kernel_virt_addr_space_size = 2 * 1024 * 1024 * 1024
+__kernel_virt_addr_space_size = 1024 * 1024 * 1024
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld
index 99ca627bc..7a8ed2aff 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld
@@ -3,71 +3,94 @@
  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
-/* This file provides __kernel_virt_addr_space_size */
 INCLUDE src/bsp/raspberrypi/kernel_virt_addr_space_size.ld;
 
-/* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
-__rpi_load_addr = 0x80000;
+PAGE_SIZE = 64K;
+PAGE_MASK = PAGE_SIZE - 1;
 
-ENTRY(__rpi_load_addr)
+__rpi_phys_dram_start_addr = 0;
 
+/* The physical address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_phys_binary_load_addr = 0x80000;
+
+
+ENTRY(__rpi_phys_binary_load_addr)
+
+/* Flags:
+ *     4 == R
+ *     5 == RX
+ *     6 == RW
+ *
+ * Segments are marked PT_LOAD below so that the ELF file provides virtual and physical addresses.
+ * It doesn't mean all of them need actually be loaded.
+ */
 PHDRS
 {
-    segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
-    segment_rw PT_LOAD FLAGS(6); /* 6 == RW */
+    segment_boot_core_stack PT_LOAD FLAGS(6);
+    segment_code            PT_LOAD FLAGS(5);
+    segment_data            PT_LOAD FLAGS(6);
 }
 
 SECTIONS
 {
-    . =  __rpi_load_addr;
+    . =  __rpi_phys_dram_start_addr;
+
+    /***********************************************************************************************
+    * Boot Core Stack
+    ***********************************************************************************************/
+    .boot_core_stack (NOLOAD) :
+    {
+        __boot_core_stack_start = .;         /*   ^             */
+                                             /*   | stack       */
+        . += __rpi_phys_binary_load_addr;    /*   | growth      */
+                                             /*   | direction   */
+        __boot_core_stack_end_exclusive = .; /*   |             */
+    } :segment_boot_core_stack
+
+    ASSERT((. & PAGE_MASK) == 0, "End of boot core stack is not page aligned")
 
     /***********************************************************************************************
     * Code + RO Data + Global Offset Table
     ***********************************************************************************************/
-    __rx_start = .;
+    __code_start = .;
     .text :
     {
         KEEP(*(.text._start))
         *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
         *(.text._start_rust)      /* The Rust entry point */
         *(.text*)                 /* Everything else */
-    } :segment_rx
+    } :segment_code
 
-    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
-    .got    : ALIGN(8) { *(.got)     } :segment_rx
+    .rodata : ALIGN(8) { *(.rodata*) } :segment_code
+    .got    : ALIGN(8) { *(.got)     } :segment_code
 
-    . = ALIGN(64K); /* Align to page boundary */
-    __rx_end_exclusive = .;
+    . = ALIGN(PAGE_SIZE);
+    __code_end_exclusive = .;
 
     /***********************************************************************************************
     * Data + BSS
     ***********************************************************************************************/
-    __rw_start = .;
-    .data : { *(.data*) } :segment_rw
+    __data_start = .;
+    .data : { *(.data*) } :segment_data
 
     /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
-    .bss : ALIGN(16)
+    .bss (NOLOAD) : ALIGN(16)
     {
         __bss_start = .;
         *(.bss*);
         . = ALIGN(16);
         __bss_end_exclusive = .;
-    } :NONE
+    } :segment_data
 
-    . = ALIGN(64K); /* Align to page boundary */
-    __rw_end_exclusive = .;
+    . = ALIGN(PAGE_SIZE);
+    __data_end_exclusive = .;
 
     /***********************************************************************************************
-    * Guard Page between boot core stack and data
+    * MMIO Remap Reserved
     ***********************************************************************************************/
-    . += 64K;
+    __mmio_remap_start = .;
+    . += 8 * 1024 * 1024;
+    __mmio_remap_end_exclusive = .;
 
-    /***********************************************************************************************
-    * Boot Core Stack
-    ***********************************************************************************************/
-    __boot_core_stack_start = .;         /*   ^             */
-                                         /*   | stack       */
-    . += 512K;                           /*   | growth      */
-                                         /*   | direction   */
-    __boot_core_stack_end_exclusive = .; /*   |             */
+    ASSERT((. & PAGE_MASK) == 0, "MMIO remap reservation is not page aligned")
 }
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory.rs
index 88dcaf58a..a6da7d556 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory.rs
@@ -4,39 +4,65 @@
 
 //! BSP Memory Management.
 //!
-//! The physical memory layout after the kernel has been loaded by the Raspberry's firmware, which
-//! copies the binary to 0x8_0000:
+//! The physical memory layout.
 //!
-//! +---------------------------------------------+
-//! |                                             |
-//! | Unmapped                                    |
-//! |                                             |
-//! +---------------------------------------------+
-//! |                                             | rx_start @ 0x8_0000
-//! | .text                                       |
-//! | .rodata                                     |
-//! | .got                                        |
-//! |                                             | rx_end_inclusive
-//! +---------------------------------------------+
-//! |                                             | rw_start == rx_end
-//! | .data                                       |
-//! | .bss                                        |
-//! |                                             | rw_end_inclusive
-//! +---------------------------------------------+
-//! |                                             | rw_end
-//! | Unmapped Boot-core Stack Guard Page         |
-//! |                                             |
-//! +---------------------------------------------+
-//! |                                             | boot_core_stack_start          ^
-//! |                                             |                                | stack
-//! | Boot-core Stack                             |                                | growth
-//! |                                             |                                | direction
-//! |                                             | boot_core_stack_end_inclusive  |
-//! +---------------------------------------------+
-
+//! The Raspberry's firmware copies the kernel binary to 0x8_0000. The preceding region will be used
+//! as the boot core's stack.
+//!
+//! +---------------------------------------+
+//! |                                       | boot_core_stack_start @ 0x0
+//! |                                       |                                ^
+//! | Boot-core Stack                       |                                | stack
+//! |                                       |                                | growth
+//! |                                       |                                | direction
+//! +---------------------------------------+
+//! |                                       | code_start @ 0x8_0000 == boot_core_stack_end_exclusive
+//! | .text                                 |
+//! | .rodata                               |
+//! | .got                                  |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       | data_start == code_end_exclusive
+//! | .data                                 |
+//! | .bss                                  |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       | data_end_exclusive
+//! |                                       |
+//!
+//!
+//!
+//!
+//!
+//! The virtual memory layout is as follows:
+//!
+//! +---------------------------------------+
+//! |                                       | boot_core_stack_start @ 0x0
+//! |                                       |                                ^
+//! | Boot-core Stack                       |                                | stack
+//! |                                       |                                | growth
+//! |                                       |                                | direction
+//! +---------------------------------------+
+//! |                                       | code_start @ 0x8_0000 == boot_core_stack_end_exclusive
+//! | .text                                 |
+//! | .rodata                               |
+//! | .got                                  |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       | data_start == code_end_exclusive
+//! | .data                                 |
+//! | .bss                                  |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       |  mmio_remap_start == data_end_exclusive
+//! | VA region for MMIO remapping          |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       |  mmio_remap_end_exclusive
+//! |                                       |
 pub mod mmu;
 
-use crate::memory::{Address, Physical, Virtual};
+use crate::memory::{mmu::PageAddress, Address, Physical, Virtual};
 use core::cell::UnsafeCell;
 
 //--------------------------------------------------------------------------------------------------
@@ -45,11 +71,14 @@ use core::cell::UnsafeCell;
 
 // Symbols from the linker script.
 extern "Rust" {
-    static __rx_start: UnsafeCell<()>;
-    static __rx_end_exclusive: UnsafeCell<()>;
+    static __code_start: UnsafeCell<()>;
+    static __code_end_exclusive: UnsafeCell<()>;
+
+    static __data_start: UnsafeCell<()>;
+    static __data_end_exclusive: UnsafeCell<()>;
 
-    static __rw_start: UnsafeCell<()>;
-    static __rw_end_exclusive: UnsafeCell<()>;
+    static __mmio_remap_start: UnsafeCell<()>;
+    static __mmio_remap_end_exclusive: UnsafeCell<()>;
 
     static __boot_core_stack_start: UnsafeCell<()>;
     static __boot_core_stack_end_exclusive: UnsafeCell<()>;
@@ -111,46 +140,66 @@ pub(super) mod map {
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-/// Start address of the Read+Execute (RX) range.
+/// Start page address of the code segment.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn virt_code_start() -> PageAddress<Virtual> {
+    PageAddress::from(unsafe { __code_start.get() as usize })
+}
+
+/// Size of the code segment.
 ///
 /// # Safety
 ///
 /// - Value is provided by the linker script and must be trusted as-is.
 #[inline(always)]
-fn virt_rx_start() -> Address<Virtual> {
-    Address::new(unsafe { __rx_start.get() as usize })
+fn code_size() -> usize {
+    unsafe { (__code_end_exclusive.get() as usize) - (__code_start.get() as usize) }
 }
 
-/// Size of the Read+Execute (RX) range.
+/// Start page address of the data segment.
+#[inline(always)]
+fn virt_data_start() -> PageAddress<Virtual> {
+    PageAddress::from(unsafe { __data_start.get() as usize })
+}
+
+/// Size of the data segment.
 ///
 /// # Safety
 ///
 /// - Value is provided by the linker script and must be trusted as-is.
 #[inline(always)]
-fn rx_size() -> usize {
-    unsafe { (__rx_end_exclusive.get() as usize) - (__rx_start.get() as usize) }
+fn data_size() -> usize {
+    unsafe { (__data_end_exclusive.get() as usize) - (__data_start.get() as usize) }
 }
 
-/// Start address of the Read+Write (RW) range.
+/// Start page address of the MMIO remap reservation.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
 #[inline(always)]
-fn virt_rw_start() -> Address<Virtual> {
-    Address::new(unsafe { __rw_start.get() as usize })
+fn virt_mmio_remap_start() -> PageAddress<Virtual> {
+    PageAddress::from(unsafe { __mmio_remap_start.get() as usize })
 }
 
-/// Size of the Read+Write (RW) range.
+/// Size of the MMIO remap reservation.
 ///
 /// # Safety
 ///
 /// - Value is provided by the linker script and must be trusted as-is.
 #[inline(always)]
-fn rw_size() -> usize {
-    unsafe { (__rw_end_exclusive.get() as usize) - (__rw_start.get() as usize) }
+fn mmio_remap_size() -> usize {
+    unsafe { (__mmio_remap_end_exclusive.get() as usize) - (__mmio_remap_start.get() as usize) }
 }
 
-/// Start address of the boot core's stack.
+/// Start page address of the boot core's stack.
 #[inline(always)]
-fn virt_boot_core_stack_start() -> Address<Virtual> {
-    Address::new(unsafe { __boot_core_stack_start.get() as usize })
+fn virt_boot_core_stack_start() -> PageAddress<Virtual> {
+    PageAddress::from(unsafe { __boot_core_stack_start.get() as usize })
 }
 
 /// Size of the boot core's stack.
@@ -161,8 +210,12 @@ fn boot_core_stack_size() -> usize {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
 /// Exclusive end address of the physical address space.
 #[inline(always)]
-fn phys_addr_space_end() -> Address<Physical> {
-    map::END
+pub fn phys_addr_space_end_exclusive_addr() -> PageAddress<Physical> {
+    PageAddress::from(map::END)
 }
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs
index e56e44371..2881ab115 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs
@@ -5,14 +5,12 @@
 //! BSP Memory Management Unit.
 
 use crate::{
-    common,
     memory::{
-        mmu as generic_mmu,
         mmu::{
-            AddressSpace, AssociatedTranslationTable, AttributeFields, Page, PageSliceDescriptor,
-            TranslationGranule,
+            self as generic_mmu, AddressSpace, AssociatedTranslationTable, AttributeFields,
+            MemoryRegion, PageAddress, TranslationGranule,
         },
-        Address, Physical, Virtual,
+        Physical, Virtual,
     },
     synchronization::InitStateLock,
 };
@@ -33,7 +31,7 @@ type KernelTranslationTable =
 pub type KernelGranule = TranslationGranule<{ 64 * 1024 }>;
 
 /// The kernel's virtual address space defined by this BSP.
-pub type KernelVirtAddrSpace = AddressSpace<{ get_virt_addr_space_size() }>;
+pub type KernelVirtAddrSpace = AddressSpace<{ kernel_virt_addr_space_size() }>;
 
 //--------------------------------------------------------------------------------------------------
 // Global instances
@@ -46,6 +44,7 @@ pub type KernelVirtAddrSpace = AddressSpace<{ get_virt_addr_space_size() }>;
 /// That is, `size_of(InitStateLock<KernelTranslationTable>) == size_of(KernelTranslationTable)`.
 /// There is a unit tests that checks this porperty.
 #[link_section = ".data"]
+#[no_mangle]
 static KERNEL_TABLES: InitStateLock<KernelTranslationTable> =
     InitStateLock::new(KernelTranslationTable::new_for_precompute());
 
@@ -64,7 +63,7 @@ static PHYS_KERNEL_TABLES_BASE_ADDR: u64 = 0xCCCCAAAAFFFFEEEE;
 /// This is a hack for retrieving the value for the kernel's virtual address space size as a
 /// constant from a common place, since it is needed as a compile-time/link-time constant in both,
 /// the linker script and the Rust sources.
-const fn get_virt_addr_space_size() -> usize {
+const fn kernel_virt_addr_space_size() -> usize {
     let __kernel_virt_addr_space_size;
 
     include!("../kernel_virt_addr_space_size.ld");
@@ -80,42 +79,52 @@ const fn size_to_num_pages(size: usize) -> usize {
     size >> KernelGranule::SHIFT
 }
 
-/// The Read+Execute (RX) pages of the kernel binary.
-fn virt_rx_page_desc() -> PageSliceDescriptor<Virtual> {
-    let num_pages = size_to_num_pages(super::rx_size());
+/// The code pages of the kernel binary.
+fn virt_code_region() -> MemoryRegion<Virtual> {
+    let num_pages = size_to_num_pages(super::code_size());
+
+    let start_page_addr = super::virt_code_start();
+    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
 
-    PageSliceDescriptor::from_addr(super::virt_rx_start(), num_pages)
+    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
 }
 
-/// The Read+Write (RW) pages of the kernel binary.
-fn virt_rw_page_desc() -> PageSliceDescriptor<Virtual> {
-    let num_pages = size_to_num_pages(super::rw_size());
+/// The data pages of the kernel binary.
+fn virt_data_region() -> MemoryRegion<Virtual> {
+    let num_pages = size_to_num_pages(super::data_size());
 
-    PageSliceDescriptor::from_addr(super::virt_rw_start(), num_pages)
+    let start_page_addr = super::virt_data_start();
+    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
+
+    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
 }
 
-/// The boot core's stack.
-fn virt_boot_core_stack_page_desc() -> PageSliceDescriptor<Virtual> {
+/// The boot core stack pages.
+fn virt_boot_core_stack_region() -> MemoryRegion<Virtual> {
     let num_pages = size_to_num_pages(super::boot_core_stack_size());
 
-    PageSliceDescriptor::from_addr(super::virt_boot_core_stack_start(), num_pages)
+    let start_page_addr = super::virt_boot_core_stack_start();
+    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
+
+    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
 }
 
 // There is no reason to expect the following conversions to fail, since they were generated offline
 // by the `translation table tool`. If it doesn't work, a panic due to the unwraps is justified.
-fn kernel_virt_to_phys_page_slice(
-    virt_slice: PageSliceDescriptor<Virtual>,
-) -> PageSliceDescriptor<Physical> {
-    let phys_first_page =
-        generic_mmu::try_kernel_virt_page_ptr_to_phys_page_ptr(virt_slice.first_page_ptr())
+fn kernel_virt_to_phys_region(virt_region: MemoryRegion<Virtual>) -> MemoryRegion<Physical> {
+    let phys_start_page_addr =
+        generic_mmu::try_kernel_virt_page_addr_to_phys_page_addr(virt_region.start_page_addr())
             .unwrap();
-    let phys_start_addr = Address::new(phys_first_page as usize);
 
-    PageSliceDescriptor::from_addr(phys_start_addr, virt_slice.num_pages())
+    let phys_end_exclusive_page_addr = phys_start_page_addr
+        .checked_offset(virt_region.num_pages() as isize)
+        .unwrap();
+
+    MemoryRegion::new(phys_start_page_addr, phys_end_exclusive_page_addr)
 }
 
-fn kernel_page_attributes(virt_page_ptr: *const Page<Virtual>) -> AttributeFields {
-    generic_mmu::try_kernel_page_attributes(virt_page_ptr).unwrap()
+fn kernel_page_attributes(virt_page_addr: PageAddress<Virtual>) -> AttributeFields {
+    generic_mmu::try_kernel_page_attributes(virt_page_addr).unwrap()
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -127,12 +136,14 @@ pub fn kernel_translation_tables() -> &'static InitStateLock<KernelTranslationTa
     &KERNEL_TABLES
 }
 
-/// Pointer to the last page of the physical address space.
-pub fn phys_addr_space_end_page_ptr() -> *const Page<Physical> {
-    common::align_down(
-        super::phys_addr_space_end().into_usize(),
-        KernelGranule::SIZE,
-    ) as *const Page<_>
+/// The MMIO remap pages.
+pub fn virt_mmio_remap_region() -> MemoryRegion<Virtual> {
+    let num_pages = size_to_num_pages(super::mmio_remap_size());
+
+    let start_page_addr = super::virt_mmio_remap_start();
+    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
+
+    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
 }
 
 /// Add mapping records for the kernel binary.
@@ -141,27 +152,27 @@ pub fn phys_addr_space_end_page_ptr() -> *const Page<Physical> {
 /// `translation table tool` and patched into the kernel binary. This function just adds the mapping
 /// record entries.
 pub fn kernel_add_mapping_records_for_precomputed() {
-    let virt_rx_page_desc = virt_rx_page_desc();
+    let virt_boot_core_stack_region = virt_boot_core_stack_region();
     generic_mmu::kernel_add_mapping_record(
-        "Kernel code and RO data",
-        &virt_rx_page_desc,
-        &kernel_virt_to_phys_page_slice(virt_rx_page_desc),
-        &kernel_page_attributes(virt_rx_page_desc.first_page_ptr()),
+        "Kernel boot-core stack",
+        &virt_boot_core_stack_region,
+        &kernel_virt_to_phys_region(virt_boot_core_stack_region),
+        &kernel_page_attributes(virt_boot_core_stack_region.start_page_addr()),
     );
 
-    let virt_rw_page_desc = virt_rw_page_desc();
+    let virt_code_region = virt_code_region();
     generic_mmu::kernel_add_mapping_record(
-        "Kernel data and bss",
-        &virt_rw_page_desc,
-        &kernel_virt_to_phys_page_slice(virt_rw_page_desc),
-        &kernel_page_attributes(virt_rw_page_desc.first_page_ptr()),
+        "Kernel code and RO data",
+        &virt_code_region,
+        &kernel_virt_to_phys_region(virt_code_region),
+        &kernel_page_attributes(virt_code_region.start_page_addr()),
     );
 
-    let virt_boot_core_stack_page_desc = virt_boot_core_stack_page_desc();
+    let virt_data_region = virt_data_region();
     generic_mmu::kernel_add_mapping_record(
-        "Kernel boot-core stack",
-        &virt_boot_core_stack_page_desc,
-        &kernel_virt_to_phys_page_slice(virt_boot_core_stack_page_desc),
-        &kernel_page_attributes(virt_boot_core_stack_page_desc.first_page_ptr()),
+        "Kernel data and bss",
+        &virt_data_region,
+        &kernel_virt_to_phys_region(virt_data_region),
+        &kernel_page_attributes(virt_data_region.start_page_addr()),
     );
 }
diff --git a/15_virtual_mem_part3_precomputed_tables/src/common.rs b/15_virtual_mem_part3_precomputed_tables/src/common.rs
index 71443cfbd..a91ab7a37 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/common.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/common.rs
@@ -19,3 +19,11 @@ pub const fn align_down(value: usize, alignment: usize) -> usize {
 
     value & !(alignment - 1)
 }
+
+/// Align up.
+#[inline(always)]
+pub const fn align_up(value: usize, alignment: usize) -> usize {
+    assert!(alignment.is_power_of_two());
+
+    (value + alignment - 1) & !(alignment - 1)
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/lib.rs b/15_virtual_mem_part3_precomputed_tables/src/lib.rs
index 78baa7d8a..6b944627a 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/lib.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/lib.rs
@@ -117,6 +117,7 @@
 #![feature(global_asm)]
 #![feature(linkage)]
 #![feature(panic_info_message)]
+#![feature(step_trait)]
 #![feature(trait_alias)]
 #![no_std]
 // Testing
@@ -182,6 +183,7 @@ pub fn test_runner(tests: &[&test_types::UnitTest]) {
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
     exception::handling_init();
+    memory::mmu::post_enable_init();
     bsp::console::qemu_bring_up_console();
 
     test_main();
diff --git a/15_virtual_mem_part3_precomputed_tables/src/main.rs b/15_virtual_mem_part3_precomputed_tables/src/main.rs
index 9ecba1e7e..210796445 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/main.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/main.rs
@@ -26,6 +26,7 @@ unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
 
     exception::handling_init();
+    memory::mmu::post_enable_init();
 
     // Add the mapping records for the precomputed entries first, so that they appear on the top of
     // the list.
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory.rs b/15_virtual_mem_part3_precomputed_tables/src/memory.rs
index 1780e7d4f..360541734 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/memory.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/memory.rs
@@ -10,9 +10,8 @@ use crate::{bsp, common};
 use core::{
     fmt,
     marker::PhantomData,
-    ops::{AddAssign, SubAssign},
+    ops::{Add, Sub},
 };
-use mmu::Page;
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -22,15 +21,15 @@ use mmu::Page;
 pub trait AddressType: Copy + Clone + PartialOrd + PartialEq {}
 
 /// Zero-sized type to mark a physical address.
-#[derive(Copy, Clone, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
 pub enum Physical {}
 
 /// Zero-sized type to mark a virtual address.
-#[derive(Copy, Clone, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
 pub enum Virtual {}
 
 /// Generic address type.
-#[derive(Copy, Clone, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
 pub struct Address<ATYPE: AddressType> {
     value: usize,
     _address_type: PhantomData<fn() -> ATYPE>,
@@ -52,73 +51,60 @@ impl<ATYPE: AddressType> Address<ATYPE> {
         }
     }
 
-    /// Align down.
-    pub const fn align_down(self, alignment: usize) -> Self {
-        let aligned = common::align_down(self.value, alignment);
+    /// Convert to usize.
+    pub const fn as_usize(self) -> usize {
+        self.value
+    }
 
-        Self {
-            value: aligned,
-            _address_type: PhantomData,
-        }
+    /// Align down to page size.
+    pub const fn align_down_page(self) -> Self {
+        let aligned = common::align_down(self.value, bsp::memory::mmu::KernelGranule::SIZE);
+
+        Self::new(aligned)
     }
 
-    /// Converts `Address` into an usize.
-    pub const fn into_usize(self) -> usize {
-        self.value
+    /// Align up to page size.
+    pub const fn align_up_page(self) -> Self {
+        let aligned = common::align_up(self.value, bsp::memory::mmu::KernelGranule::SIZE);
+
+        Self::new(aligned)
     }
 
-    /// Return a pointer to the page that contains this address.
-    pub const fn as_page_ptr(&self) -> *const Page<ATYPE> {
-        self.align_down(bsp::memory::mmu::KernelGranule::SIZE)
-            .into_usize() as *const _
+    /// Checks if the address is page aligned.
+    pub const fn is_page_aligned(&self) -> bool {
+        common::is_aligned(self.value, bsp::memory::mmu::KernelGranule::SIZE)
     }
 
-    /// Return the address' offset into the underlying page.
+    /// Return the address' offset into the corresponding page.
     pub const fn offset_into_page(&self) -> usize {
         self.value & bsp::memory::mmu::KernelGranule::MASK
     }
 }
 
-impl<ATYPE: AddressType> core::ops::Add<usize> for Address<ATYPE> {
+impl<ATYPE: AddressType> Add<usize> for Address<ATYPE> {
     type Output = Self;
 
-    fn add(self, other: usize) -> Self {
-        Self {
-            value: self.value + other,
-            _address_type: PhantomData,
+    #[inline(always)]
+    fn add(self, rhs: usize) -> Self::Output {
+        match self.value.checked_add(rhs) {
+            None => panic!("Overflow on Address::add"),
+            Some(x) => Self::new(x),
         }
     }
 }
 
-impl<ATYPE: AddressType> AddAssign for Address<ATYPE> {
-    fn add_assign(&mut self, other: Self) {
-        *self = Self {
-            value: self.value + other.into_usize(),
-            _address_type: PhantomData,
-        };
-    }
-}
-
-impl<ATYPE: AddressType> core::ops::Sub<usize> for Address<ATYPE> {
+impl<ATYPE: AddressType> Sub<Address<ATYPE>> for Address<ATYPE> {
     type Output = Self;
 
-    fn sub(self, other: usize) -> Self {
-        Self {
-            value: self.value - other,
-            _address_type: PhantomData,
+    #[inline(always)]
+    fn sub(self, rhs: Address<ATYPE>) -> Self::Output {
+        match self.value.checked_sub(rhs.value) {
+            None => panic!("Overflow on Address::sub"),
+            Some(x) => Self::new(x),
         }
     }
 }
 
-impl<ATYPE: AddressType> SubAssign for Address<ATYPE> {
-    fn sub_assign(&mut self, other: Self) {
-        *self = Self {
-            value: self.value - other.into_usize(),
-            _address_type: PhantomData,
-        };
-    }
-}
-
 impl fmt::Display for Address<Physical> {
     // Don't expect to see physical addresses greater than 40 bit.
     fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
@@ -147,3 +133,33 @@ impl fmt::Display for Address<Virtual> {
         write!(f, "{:04x}", q1)
     }
 }
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// Sanity of [Address] methods.
+    #[kernel_test]
+    fn address_type_method_sanity() {
+        let addr = Address::<Virtual>::new(bsp::memory::mmu::KernelGranule::SIZE + 100);
+
+        assert_eq!(
+            addr.align_down_page().as_usize(),
+            bsp::memory::mmu::KernelGranule::SIZE
+        );
+
+        assert_eq!(
+            addr.align_up_page().as_usize(),
+            bsp::memory::mmu::KernelGranule::SIZE * 2
+        );
+
+        assert_eq!(addr.is_page_aligned(), false);
+
+        assert_eq!(addr.offset_into_page(), 100);
+    }
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs
index 5746f3926..53cb2d003 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs
@@ -8,6 +8,7 @@
 #[path = "../_arch/aarch64/memory/mmu.rs"]
 mod arch_mmu;
 
+mod alloc;
 mod mapping_record;
 mod translation_table;
 mod types;
@@ -15,9 +16,10 @@ mod types;
 use crate::{
     bsp,
     memory::{Address, Physical, Virtual},
-    synchronization, warn,
+    synchronization::{self, interface::Mutex},
+    warn,
 };
-use core::fmt;
+use core::{fmt, num::NonZeroUsize};
 
 pub use types::*;
 
@@ -75,28 +77,46 @@ use interface::MMU;
 use synchronization::interface::ReadWriteEx;
 use translation_table::interface::TranslationTable;
 
-/// Map pages in the kernel's translation tables.
+/// Query the BSP for the reserved virtual addresses for MMIO remapping and initialize the kernel's
+/// MMIO VA allocator with it.
+fn kernel_init_mmio_va_allocator() {
+    let region = bsp::memory::mmu::virt_mmio_remap_region();
+
+    alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.initialize(region));
+}
+
+/// Map a region in the kernel's translation tables.
 ///
 /// No input checks done, input is passed through to the architectural implementation.
 ///
 /// # Safety
 ///
-/// - See `map_pages_at()`.
+/// - See `map_at()`.
 /// - Does not prevent aliasing.
-unsafe fn kernel_map_pages_at_unchecked(
+unsafe fn kernel_map_at_unchecked(
     name: &'static str,
-    virt_pages: &PageSliceDescriptor<Virtual>,
-    phys_pages: &PageSliceDescriptor<Physical>,
+    virt_region: &MemoryRegion<Virtual>,
+    phys_region: &MemoryRegion<Physical>,
     attr: &AttributeFields,
 ) -> Result<(), &'static str> {
     bsp::memory::mmu::kernel_translation_tables()
-        .write(|tables| tables.map_pages_at(virt_pages, phys_pages, attr))?;
+        .write(|tables| tables.map_at(virt_region, phys_region, attr))?;
 
-    kernel_add_mapping_record(name, virt_pages, phys_pages, attr);
+    kernel_add_mapping_record(name, virt_region, phys_region, attr);
 
     Ok(())
 }
 
+/// Try to translate a kernel virtual address to a physical address.
+///
+/// Will only succeed if there exists a valid mapping for the input address.
+fn try_kernel_virt_addr_to_phys_addr(
+    virt_addr: Address<Virtual>,
+) -> Result<Address<Physical>, &'static str> {
+    bsp::memory::mmu::kernel_translation_tables()
+        .read(|tables| tables.try_virt_addr_to_phys_addr(virt_addr))
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -147,70 +167,48 @@ impl<const AS_SIZE: usize> AddressSpace<AS_SIZE> {
 /// Add an entry to the mapping info record.
 pub fn kernel_add_mapping_record(
     name: &'static str,
-    virt_pages: &PageSliceDescriptor<Virtual>,
-    phys_pages: &PageSliceDescriptor<Physical>,
+    virt_region: &MemoryRegion<Virtual>,
+    phys_region: &MemoryRegion<Physical>,
     attr: &AttributeFields,
 ) {
-    if let Err(x) = mapping_record::kernel_add(name, virt_pages, phys_pages, attr) {
+    if let Err(x) = mapping_record::kernel_add(name, virt_region, phys_region, attr) {
         warn!("{}", x);
     }
 }
 
-/// Raw mapping of virtual to physical pages in the kernel translation tables.
-///
-/// Prevents mapping into the MMIO range of the tables.
-///
-/// # Safety
-///
-/// - See `kernel_map_pages_at_unchecked()`.
-/// - Does not prevent aliasing. Currently, the callers must be trusted.
-pub unsafe fn kernel_map_pages_at(
-    name: &'static str,
-    virt_pages: &PageSliceDescriptor<Virtual>,
-    phys_pages: &PageSliceDescriptor<Physical>,
-    attr: &AttributeFields,
-) -> Result<(), &'static str> {
-    let is_mmio = bsp::memory::mmu::kernel_translation_tables()
-        .read(|tables| tables.is_virt_page_slice_mmio(virt_pages));
-    if is_mmio {
-        return Err("Attempt to manually map into MMIO region");
-    }
-
-    kernel_map_pages_at_unchecked(name, virt_pages, phys_pages, attr)?;
-
-    Ok(())
-}
-
 /// MMIO remapping in the kernel translation tables.
 ///
 /// Typically used by device drivers.
 ///
 /// # Safety
 ///
-/// - Same as `kernel_map_pages_at_unchecked()`, minus the aliasing part.
+/// - Same as `kernel_map_at_unchecked()`, minus the aliasing part.
 pub unsafe fn kernel_map_mmio(
     name: &'static str,
     mmio_descriptor: &MMIODescriptor,
 ) -> Result<Address<Virtual>, &'static str> {
-    let phys_pages: PageSliceDescriptor<Physical> = (*mmio_descriptor).into();
-    let offset_into_start_page =
-        mmio_descriptor.start_addr().into_usize() & bsp::memory::mmu::KernelGranule::MASK;
+    let phys_region = MemoryRegion::from(*mmio_descriptor);
+    let offset_into_start_page = mmio_descriptor.start_addr().offset_into_page();
 
-    // Check if an identical page slice has been mapped for another driver. If so, reuse it.
+    // Check if an identical region has been mapped for another driver. If so, reuse it.
     let virt_addr = if let Some(addr) =
         mapping_record::kernel_find_and_insert_mmio_duplicate(mmio_descriptor, name)
     {
         addr
-    // Otherwise, allocate a new virtual page slice and map it.
+    // Otherwise, allocate a new region and map it.
     } else {
-        let virt_pages: PageSliceDescriptor<Virtual> =
-            bsp::memory::mmu::kernel_translation_tables()
-                .write(|tables| tables.next_mmio_virt_page_slice(phys_pages.num_pages()))?;
+        let num_pages = match NonZeroUsize::new(phys_region.num_pages()) {
+            None => return Err("Requested 0 pages"),
+            Some(x) => x,
+        };
+
+        let virt_region =
+            alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.alloc(num_pages))?;
 
-        kernel_map_pages_at_unchecked(
+        kernel_map_at_unchecked(
             name,
-            &virt_pages,
-            &phys_pages,
+            &virt_region,
+            &phys_region,
             &AttributeFields {
                 mem_attributes: MemAttributes::Device,
                 acc_perms: AccessPermissions::ReadWrite,
@@ -218,40 +216,30 @@ pub unsafe fn kernel_map_mmio(
             },
         )?;
 
-        virt_pages.start_addr()
+        virt_region.start_addr()
     };
 
     Ok(virt_addr + offset_into_start_page)
 }
 
-/// Try to translate a kernel virtual page pointer to a physical page pointer.
+/// Try to translate a kernel virtual page address to a physical page address.
 ///
 /// Will only succeed if there exists a valid mapping for the input page.
-pub fn try_kernel_virt_page_ptr_to_phys_page_ptr(
-    virt_page_ptr: *const Page<Virtual>,
-) -> Result<*const Page<Physical>, &'static str> {
+pub fn try_kernel_virt_page_addr_to_phys_page_addr(
+    virt_page_addr: PageAddress<Virtual>,
+) -> Result<PageAddress<Physical>, &'static str> {
     bsp::memory::mmu::kernel_translation_tables()
-        .read(|tables| tables.try_virt_page_ptr_to_phys_page_ptr(virt_page_ptr))
+        .read(|tables| tables.try_virt_page_addr_to_phys_page_addr(virt_page_addr))
 }
 
 /// Try to get the attributes of a kernel page.
 ///
 /// Will only succeed if there exists a valid mapping for the input page.
 pub fn try_kernel_page_attributes(
-    virt_page_ptr: *const Page<Virtual>,
+    virt_page_addr: PageAddress<Virtual>,
 ) -> Result<AttributeFields, &'static str> {
     bsp::memory::mmu::kernel_translation_tables()
-        .read(|tables| tables.try_page_attributes(virt_page_ptr))
-}
-
-/// Try to translate a kernel virtual address to a physical address.
-///
-/// Will only succeed if there exists a valid mapping for the input address.
-fn try_kernel_virt_addr_to_phys_addr(
-    virt_addr: Address<Virtual>,
-) -> Result<Address<Physical>, &'static str> {
-    bsp::memory::mmu::kernel_translation_tables()
-        .read(|tables| tables.try_virt_addr_to_phys_addr(virt_addr))
+        .read(|tables| tables.try_page_attributes(virt_page_addr))
 }
 
 /// Enable the MMU and data + instruction caching.
@@ -266,6 +254,11 @@ pub unsafe fn enable_mmu_and_caching(
     arch_mmu::mmu().enable_mmu_and_caching(phys_tables_base_addr)
 }
 
+/// Finish initialization of the MMU subsystem.
+pub fn post_enable_init() {
+    kernel_init_mmio_va_allocator();
+}
+
 /// Human-readable print of all recorded kernel mappings.
 pub fn kernel_print_mappings() {
     mapping_record::kernel_print()
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/alloc.rs b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/alloc.rs
new file mode 100644
index 000000000..a63df0978
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/alloc.rs
@@ -0,0 +1,70 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Allocation.
+
+use super::MemoryRegion;
+use crate::{
+    memory::{AddressType, Virtual},
+    synchronization::IRQSafeNullLock,
+    warn,
+};
+use core::num::NonZeroUsize;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// A page allocator that can be lazyily initialized.
+pub struct PageAllocator<ATYPE: AddressType> {
+    pool: Option<MemoryRegion<ATYPE>>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static KERNEL_MMIO_VA_ALLOCATOR: IRQSafeNullLock<PageAllocator<Virtual>> =
+    IRQSafeNullLock::new(PageAllocator::new());
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the kernel's MMIO virtual address allocator.
+pub fn kernel_mmio_va_allocator() -> &'static IRQSafeNullLock<PageAllocator<Virtual>> {
+    &KERNEL_MMIO_VA_ALLOCATOR
+}
+
+impl<ATYPE: AddressType> PageAllocator<ATYPE> {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self { pool: None }
+    }
+
+    /// Initialize the allocator.
+    pub fn initialize(&mut self, pool: MemoryRegion<ATYPE>) {
+        if self.pool.is_some() {
+            warn!("Already initialized");
+            return;
+        }
+
+        self.pool = Some(pool);
+    }
+
+    /// Allocate a number of pages.
+    pub fn alloc(
+        &mut self,
+        num_requested_pages: NonZeroUsize,
+    ) -> Result<MemoryRegion<ATYPE>, &'static str> {
+        if self.pool.is_none() {
+            return Err("Allocator not initialized");
+        }
+
+        self.pool
+            .as_mut()
+            .unwrap()
+            .take_first_n_pages(num_requested_pages)
+    }
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/mapping_record.rs b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/mapping_record.rs
index 16c27e38c..eba13ef90 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/mapping_record.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/mapping_record.rs
@@ -5,10 +5,10 @@
 //! A record of mapped pages.
 
 use super::{
-    AccessPermissions, Address, AttributeFields, MMIODescriptor, MemAttributes,
-    PageSliceDescriptor, Physical, Virtual,
+    AccessPermissions, Address, AttributeFields, MMIODescriptor, MemAttributes, MemoryRegion,
+    Physical, Virtual,
 };
-use crate::{info, synchronization, synchronization::InitStateLock, warn};
+use crate::{bsp, info, synchronization, synchronization::InitStateLock, warn};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -19,8 +19,9 @@ use crate::{info, synchronization, synchronization::InitStateLock, warn};
 #[derive(Copy, Clone)]
 struct MappingRecordEntry {
     pub users: [Option<&'static str>; 5],
-    pub phys_pages: PageSliceDescriptor<Physical>,
+    pub phys_start_addr: Address<Physical>,
     pub virt_start_addr: Address<Virtual>,
+    pub num_pages: usize,
     pub attribute_fields: AttributeFields,
 }
 
@@ -42,14 +43,15 @@ static KERNEL_MAPPING_RECORD: InitStateLock<MappingRecord> =
 impl MappingRecordEntry {
     pub fn new(
         name: &'static str,
-        virt_pages: &PageSliceDescriptor<Virtual>,
-        phys_pages: &PageSliceDescriptor<Physical>,
+        virt_region: &MemoryRegion<Virtual>,
+        phys_region: &MemoryRegion<Physical>,
         attr: &AttributeFields,
     ) -> Self {
         Self {
             users: [Some(name), None, None, None, None],
-            phys_pages: *phys_pages,
-            virt_start_addr: virt_pages.start_addr(),
+            phys_start_addr: phys_region.start_addr(),
+            virt_start_addr: virt_region.start_addr(),
+            num_pages: phys_region.num_pages(),
             attribute_fields: *attr,
         }
     }
@@ -84,26 +86,41 @@ impl MappingRecord {
 
     fn find_duplicate(
         &mut self,
-        phys_pages: &PageSliceDescriptor<Physical>,
+        phys_region: &MemoryRegion<Physical>,
     ) -> Option<&mut MappingRecordEntry> {
         self.inner
             .iter_mut()
             .filter(|x| x.is_some())
             .map(|x| x.as_mut().unwrap())
             .filter(|x| x.attribute_fields.mem_attributes == MemAttributes::Device)
-            .find(|x| x.phys_pages == *phys_pages)
+            .find(|x| {
+                if x.phys_start_addr != phys_region.start_addr() {
+                    return false;
+                }
+
+                if x.num_pages != phys_region.num_pages() {
+                    return false;
+                }
+
+                true
+            })
     }
 
     pub fn add(
         &mut self,
         name: &'static str,
-        virt_pages: &PageSliceDescriptor<Virtual>,
-        phys_pages: &PageSliceDescriptor<Physical>,
+        virt_region: &MemoryRegion<Virtual>,
+        phys_region: &MemoryRegion<Physical>,
         attr: &AttributeFields,
     ) -> Result<(), &'static str> {
         let x = self.find_next_free()?;
 
-        *x = Some(MappingRecordEntry::new(name, virt_pages, phys_pages, attr));
+        *x = Some(MappingRecordEntry::new(
+            name,
+            virt_region,
+            phys_region,
+            attr,
+        ));
         Ok(())
     }
 
@@ -119,11 +136,11 @@ impl MappingRecord {
         info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
 
         for i in self.inner.iter().flatten() {
+            let size = i.num_pages * bsp::memory::mmu::KernelGranule::SIZE;
             let virt_start = i.virt_start_addr;
-            let virt_end_inclusive = virt_start + i.phys_pages.size() - 1;
-            let phys_start = i.phys_pages.start_addr();
-            let phys_end_inclusive = i.phys_pages.end_addr_inclusive();
-            let size = i.phys_pages.size();
+            let virt_end_inclusive = virt_start + (size - 1);
+            let phys_start = i.phys_start_addr;
+            let phys_end_inclusive = phys_start + (size - 1);
 
             let (size, unit) = if (size >> MIB_RSHIFT) > 0 {
                 (size >> MIB_RSHIFT, "MiB")
@@ -186,21 +203,21 @@ use synchronization::interface::ReadWriteEx;
 /// Add an entry to the mapping info record.
 pub fn kernel_add(
     name: &'static str,
-    virt_pages: &PageSliceDescriptor<Virtual>,
-    phys_pages: &PageSliceDescriptor<Physical>,
+    virt_region: &MemoryRegion<Virtual>,
+    phys_region: &MemoryRegion<Physical>,
     attr: &AttributeFields,
 ) -> Result<(), &'static str> {
-    KERNEL_MAPPING_RECORD.write(|mr| mr.add(name, virt_pages, phys_pages, attr))
+    KERNEL_MAPPING_RECORD.write(|mr| mr.add(name, virt_region, phys_region, attr))
 }
 
 pub fn kernel_find_and_insert_mmio_duplicate(
     mmio_descriptor: &MMIODescriptor,
     new_user: &'static str,
 ) -> Option<Address<Virtual>> {
-    let phys_pages: PageSliceDescriptor<Physical> = (*mmio_descriptor).into();
+    let phys_region: MemoryRegion<Physical> = (*mmio_descriptor).into();
 
     KERNEL_MAPPING_RECORD.write(|mr| {
-        let dup = mr.find_duplicate(&phys_pages)?;
+        let dup = mr.find_duplicate(&phys_region)?;
 
         if let Err(x) = dup.add_user(new_user) {
             warn!("{}", x);
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/translation_table.rs b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/translation_table.rs
index 0738091c6..698cad629 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/translation_table.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/translation_table.rs
@@ -8,10 +8,8 @@
 #[path = "../../_arch/aarch64/memory/mmu/translation_table.rs"]
 mod arch_translation_table;
 
-use crate::memory::{
-    mmu::{AttributeFields, PageSliceDescriptor},
-    Address, Page, Physical, Virtual,
-};
+use super::{AttributeFields, MemoryRegion};
+use crate::memory::{Address, Physical, Virtual};
 
 //--------------------------------------------------------------------------------------------------
 // Architectural Public Reexports
@@ -25,6 +23,8 @@ pub use arch_translation_table::FixedSizeTranslationTable;
 
 /// Translation table interfaces.
 pub mod interface {
+    use crate::memory::mmu::PageAddress;
+
     use super::*;
 
     /// Translation table operations.
@@ -37,7 +37,7 @@ pub mod interface {
         ///   multiple times.
         fn init(&mut self) -> Result<(), &'static str>;
 
-        /// Map the given virtual pages to the given physical pages.
+        /// Map the given virtual memory region to the given physical memory region.
         ///
         /// # Safety
         ///
@@ -46,42 +46,27 @@ pub mod interface {
         ///   mapping to the same physical memory using multiple virtual addresses, which would
         ///   break Rust's ownership assumptions. This should be protected against in the kernel's
         ///   generic MMU code.
-        unsafe fn map_pages_at(
+        unsafe fn map_at(
             &mut self,
-            virt_pages: &PageSliceDescriptor<Virtual>,
-            phys_pages: &PageSliceDescriptor<Physical>,
+            virt_region: &MemoryRegion<Virtual>,
+            phys_region: &MemoryRegion<Physical>,
             attr: &AttributeFields,
         ) -> Result<(), &'static str>;
 
-        /// Obtain a free virtual page slice in the MMIO region.
-        ///
-        /// The "MMIO region" is a distinct region of the implementor's choice, which allows
-        /// differentiating MMIO addresses from others. This can speed up debugging efforts.
-        /// Ideally, those MMIO addresses are also standing out visually so that a human eye can
-        /// identify them. For example, by allocating them from near the end of the virtual address
-        /// space.
-        fn next_mmio_virt_page_slice(
-            &mut self,
-            num_pages: usize,
-        ) -> Result<PageSliceDescriptor<Virtual>, &'static str>;
-
-        /// Check if a virtual page splice is in the "MMIO region".
-        fn is_virt_page_slice_mmio(&self, virt_pages: &PageSliceDescriptor<Virtual>) -> bool;
-
-        /// Try to translate a virtual page pointer to a physical page pointer.
+        /// Try to translate a virtual page address to a physical page address.
         ///
         /// Will only succeed if there exists a valid mapping for the input page.
-        fn try_virt_page_ptr_to_phys_page_ptr(
+        fn try_virt_page_addr_to_phys_page_addr(
             &self,
-            virt_page_ptr: *const Page<Virtual>,
-        ) -> Result<*const Page<Physical>, &'static str>;
+            virt_page_addr: PageAddress<Virtual>,
+        ) -> Result<PageAddress<Physical>, &'static str>;
 
         /// Try to get the attributes of a page.
         ///
         /// Will only succeed if there exists a valid mapping for the input page.
         fn try_page_attributes(
             &self,
-            virt_page_ptr: *const Page<Virtual>,
+            virt_page_addr: PageAddress<Virtual>,
         ) -> Result<AttributeFields, &'static str>;
 
         /// Try to translate a virtual address to a physical address.
@@ -101,7 +86,7 @@ pub mod interface {
 #[cfg(test)]
 mod tests {
     use super::*;
-    use crate::{bsp, memory::Address};
+    use crate::memory::mmu::{AccessPermissions, MemAttributes, PageAddress};
     use arch_translation_table::MinSizeTranslationTable;
     use interface::TranslationTable;
     use test_macros::kernel_test;
@@ -114,20 +99,39 @@ mod tests {
 
         assert!(tables.init().is_ok());
 
-        let x = tables.next_mmio_virt_page_slice(0);
-        assert!(x.is_err());
+        let virt_start_page_addr: PageAddress<Virtual> = PageAddress::from(0);
+        let virt_end_exclusive_page_addr: PageAddress<Virtual> =
+            virt_start_page_addr.checked_offset(5).unwrap();
+
+        let phys_start_page_addr: PageAddress<Physical> = PageAddress::from(0);
+        let phys_end_exclusive_page_addr: PageAddress<Physical> =
+            phys_start_page_addr.checked_offset(5).unwrap();
 
-        let x = tables.next_mmio_virt_page_slice(1_0000_0000);
-        assert!(x.is_err());
+        let virt_region = MemoryRegion::new(virt_start_page_addr, virt_end_exclusive_page_addr);
+        let phys_region = MemoryRegion::new(phys_start_page_addr, phys_end_exclusive_page_addr);
 
-        let x = tables.next_mmio_virt_page_slice(2).unwrap();
-        assert_eq!(x.size(), bsp::memory::mmu::KernelGranule::SIZE * 2);
+        let attr = AttributeFields {
+            mem_attributes: MemAttributes::CacheableDRAM,
+            acc_perms: AccessPermissions::ReadWrite,
+            execute_never: true,
+        };
 
-        assert_eq!(tables.is_virt_page_slice_mmio(&x), true);
+        unsafe { assert_eq!(tables.map_at(&virt_region, &phys_region, &attr), Ok(())) };
 
         assert_eq!(
-            tables.is_virt_page_slice_mmio(&PageSliceDescriptor::from_addr(Address::new(0), 1)),
-            false
+            tables.try_virt_page_addr_to_phys_page_addr(virt_start_page_addr),
+            Ok(phys_start_page_addr)
         );
+
+        assert_eq!(
+            tables.try_page_attributes(virt_start_page_addr.checked_offset(6).unwrap()),
+            Err("Page marked invalid")
+        );
+
+        assert_eq!(tables.try_page_attributes(virt_start_page_addr), Ok(attr));
+
+        let virt_addr = virt_start_page_addr.into_inner() + 0x100;
+        let phys_addr = phys_start_page_addr.into_inner() + 0x100;
+        assert_eq!(tables.try_virt_addr_to_phys_addr(virt_addr), Ok(phys_addr));
     }
 }
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs
index 0fb3bf694..3ea746f48 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs
@@ -8,29 +8,28 @@ use crate::{
     bsp, common,
     memory::{Address, AddressType, Physical},
 };
-use core::{convert::From, marker::PhantomData};
+use core::{convert::From, iter::Step, num::NonZeroUsize, ops::Range};
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
-/// Generic page type.
-#[repr(C)]
-pub struct Page<ATYPE: AddressType> {
-    inner: [u8; bsp::memory::mmu::KernelGranule::SIZE],
-    _address_type: PhantomData<ATYPE>,
+/// A wrapper type around [Address] that ensures page alignment.
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+pub struct PageAddress<ATYPE: AddressType> {
+    inner: Address<ATYPE>,
 }
 
-/// Type describing a slice of pages.
-#[derive(Copy, Clone, PartialOrd, PartialEq)]
-pub struct PageSliceDescriptor<ATYPE: AddressType> {
-    start: Address<ATYPE>,
-    num_pages: usize,
+/// A type that describes a region of memory in quantities of pages.
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+pub struct MemoryRegion<ATYPE: AddressType> {
+    start: PageAddress<ATYPE>,
+    end_exclusive: PageAddress<ATYPE>,
 }
 
 /// Architecture agnostic memory attributes.
 #[allow(missing_docs)]
-#[derive(Copy, Clone, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
 pub enum MemAttributes {
     CacheableDRAM,
     Device,
@@ -38,7 +37,7 @@ pub enum MemAttributes {
 
 /// Architecture agnostic access permissions.
 #[allow(missing_docs)]
-#[derive(Copy, Clone)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
 pub enum AccessPermissions {
     ReadOnly,
     ReadWrite,
@@ -46,7 +45,7 @@ pub enum AccessPermissions {
 
 /// Collection of memory attributes.
 #[allow(missing_docs)]
-#[derive(Copy, Clone)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
 pub struct AttributeFields {
     pub mem_attributes: MemAttributes,
     pub acc_perms: AccessPermissions,
@@ -57,7 +56,7 @@ pub struct AttributeFields {
 #[derive(Copy, Clone)]
 pub struct MMIODescriptor {
     start_addr: Address<Physical>,
-    size: usize,
+    end_addr_exclusive: Address<Physical>,
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -65,90 +64,202 @@ pub struct MMIODescriptor {
 //--------------------------------------------------------------------------------------------------
 
 //------------------------------------------------------------------------------
-// Page
+// PageAddress
 //------------------------------------------------------------------------------
+impl<ATYPE: AddressType> PageAddress<ATYPE> {
+    /// Unwraps the value.
+    pub fn into_inner(self) -> Address<ATYPE> {
+        self.inner
+    }
 
-impl<ATYPE: AddressType> Page<ATYPE> {
-    /// Get a pointer to the instance.
-    pub const fn as_ptr(&self) -> *const Page<ATYPE> {
-        self as *const _
+    /// Calculates the offset from the page address.
+    ///
+    /// `count` is in units of [PageAddress]. For example, a count of 2 means `result = self + 2 *
+    /// page_size`.
+    pub fn checked_offset(self, count: isize) -> Option<Self> {
+        if count == 0 {
+            return Some(self);
+        }
+
+        let delta = (count.abs() as usize).checked_mul(bsp::memory::mmu::KernelGranule::SIZE)?;
+        let result = if count.is_positive() {
+            self.inner.as_usize().checked_add(delta)?
+        } else {
+            self.inner.as_usize().checked_sub(delta)?
+        };
+
+        Some(Self {
+            inner: Address::new(result),
+        })
     }
 }
 
-//------------------------------------------------------------------------------
-// PageSliceDescriptor
-//------------------------------------------------------------------------------
+impl<ATYPE: AddressType> From<usize> for PageAddress<ATYPE> {
+    fn from(addr: usize) -> Self {
+        assert!(
+            common::is_aligned(addr, bsp::memory::mmu::KernelGranule::SIZE),
+            "Input usize not page aligned"
+        );
 
-impl<ATYPE: AddressType> PageSliceDescriptor<ATYPE> {
-    /// Create an instance.
-    pub const fn from_addr(start: Address<ATYPE>, num_pages: usize) -> Self {
-        assert!(common::is_aligned(
-            start.into_usize(),
-            bsp::memory::mmu::KernelGranule::SIZE
-        ));
-        assert!(num_pages > 0);
+        Self {
+            inner: Address::new(addr),
+        }
+    }
+}
+
+impl<ATYPE: AddressType> From<Address<ATYPE>> for PageAddress<ATYPE> {
+    fn from(addr: Address<ATYPE>) -> Self {
+        assert!(addr.is_page_aligned(), "Input Address not page aligned");
+
+        Self { inner: addr }
+    }
+}
+
+impl<ATYPE: AddressType> Step for PageAddress<ATYPE> {
+    fn steps_between(start: &Self, end: &Self) -> Option<usize> {
+        if start > end {
+            return None;
+        }
+
+        // Since start <= end, do unchecked arithmetic.
+        Some(
+            (end.inner.as_usize() - start.inner.as_usize())
+                >> bsp::memory::mmu::KernelGranule::SHIFT,
+        )
+    }
 
-        Self { start, num_pages }
+    fn forward_checked(start: Self, count: usize) -> Option<Self> {
+        start.checked_offset(count as isize)
     }
 
-    /// Return a pointer to the first page of the described slice.
-    pub const fn first_page_ptr(&self) -> *const Page<ATYPE> {
-        self.start.into_usize() as *const _
+    fn backward_checked(start: Self, count: usize) -> Option<Self> {
+        start.checked_offset(-(count as isize))
     }
+}
+
+//------------------------------------------------------------------------------
+// MemoryRegion
+//------------------------------------------------------------------------------
+impl<ATYPE: AddressType> MemoryRegion<ATYPE> {
+    /// Create an instance.
+    pub fn new(start: PageAddress<ATYPE>, end_exclusive: PageAddress<ATYPE>) -> Self {
+        assert!(start <= end_exclusive);
 
-    /// Return the number of pages the slice describes.
-    pub const fn num_pages(&self) -> usize {
-        self.num_pages
+        Self {
+            start,
+            end_exclusive,
+        }
     }
 
-    /// Return the memory size this descriptor spans.
-    pub const fn size(&self) -> usize {
-        self.num_pages * bsp::memory::mmu::KernelGranule::SIZE
+    fn as_range(&self) -> Range<PageAddress<ATYPE>> {
+        self.into_iter()
     }
 
-    /// Return the start address.
-    pub const fn start_addr(&self) -> Address<ATYPE> {
+    /// Returns the start page address.
+    pub fn start_page_addr(&self) -> PageAddress<ATYPE> {
         self.start
     }
 
-    /// Return the exclusive end address.
-    pub fn end_addr(&self) -> Address<ATYPE> {
-        self.start + self.size()
+    /// Returns the start address.
+    pub fn start_addr(&self) -> Address<ATYPE> {
+        self.start.into_inner()
     }
 
-    /// Return the inclusive end address.
-    pub fn end_addr_inclusive(&self) -> Address<ATYPE> {
-        self.start + (self.size() - 1)
+    /// Returns the exclusive end page address.
+    pub fn end_exclusive_page_addr(&self) -> PageAddress<ATYPE> {
+        self.end_exclusive
     }
 
-    /// Check if an address is contained within this descriptor.
+    /// Returns the exclusive end page address.
+    pub fn end_inclusive_page_addr(&self) -> PageAddress<ATYPE> {
+        self.end_exclusive.checked_offset(-1).unwrap()
+    }
+
+    /// Checks if self contains an address.
     pub fn contains(&self, addr: Address<ATYPE>) -> bool {
-        (addr >= self.start_addr()) && (addr <= self.end_addr_inclusive())
+        let page_addr = PageAddress::from(addr.align_down_page());
+        self.as_range().contains(&page_addr)
     }
 
-    /// Return a non-mutable slice of pages.
+    /// Checks if there is an overlap with another memory region.
+    pub fn overlaps(&self, other_region: &Self) -> bool {
+        let self_range = self.as_range();
+
+        self_range.contains(&other_region.start_page_addr())
+            || self_range.contains(&other_region.end_inclusive_page_addr())
+    }
+
+    /// Returns the number of pages contained in this region.
+    pub fn num_pages(&self) -> usize {
+        PageAddress::steps_between(&self.start, &self.end_exclusive).unwrap()
+    }
+
+    /// Returns the size in bytes of this region.
+    pub fn size(&self) -> usize {
+        // Invariant: start <= end_exclusive, so do unchecked arithmetic.
+        let end_exclusive = self.end_exclusive.into_inner().as_usize();
+        let start = self.start.into_inner().as_usize();
+
+        end_exclusive - start
+    }
+
+    /// Splits the MemoryRegion like:
     ///
-    /// # Safety
+    /// --------------------------------------------------------------------------------
+    /// |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |
+    /// --------------------------------------------------------------------------------
+    ///   ^                               ^                                       ^
+    ///   |                               |                                       |
+    ///   left_start     left_end_exclusive                                       |
+    ///                                                                           |
+    ///                                   ^                                       |
+    ///                                   |                                       |
+    ///                                   right_start           right_end_exclusive
     ///
-    /// - Same as applies for `core::slice::from_raw_parts`.
-    pub unsafe fn as_slice(&self) -> &[Page<ATYPE>] {
-        core::slice::from_raw_parts(self.first_page_ptr(), self.num_pages)
+    /// Left region is returned to the caller. Right region is the new region for this struct.
+    pub fn take_first_n_pages(&mut self, num_pages: NonZeroUsize) -> Result<Self, &'static str> {
+        let count: usize = num_pages.into();
+
+        let left_end_exclusive = self.start.checked_offset(count as isize);
+        let left_end_exclusive = match left_end_exclusive {
+            None => return Err("Overflow while calculating left_end_exclusive"),
+            Some(x) => x,
+        };
+
+        if left_end_exclusive > self.end_exclusive {
+            return Err("Not enough free pages");
+        }
+
+        let allocation = Self {
+            start: self.start,
+            end_exclusive: left_end_exclusive,
+        };
+        self.start = left_end_exclusive;
+
+        Ok(allocation)
     }
 }
 
-impl From<MMIODescriptor> for PageSliceDescriptor<Physical> {
-    fn from(desc: MMIODescriptor) -> Self {
-        let start_page_addr = desc
-            .start_addr
-            .align_down(bsp::memory::mmu::KernelGranule::SIZE);
+impl<ATYPE: AddressType> IntoIterator for MemoryRegion<ATYPE> {
+    type Item = PageAddress<ATYPE>;
+    type IntoIter = Range<Self::Item>;
 
-        let len = ((desc.end_addr_inclusive().into_usize() - start_page_addr.into_usize())
-            >> bsp::memory::mmu::KernelGranule::SHIFT)
-            + 1;
+    fn into_iter(self) -> Self::IntoIter {
+        Range {
+            start: self.start,
+            end: self.end_exclusive,
+        }
+    }
+}
+
+impl From<MMIODescriptor> for MemoryRegion<Physical> {
+    fn from(desc: MMIODescriptor) -> Self {
+        let start = PageAddress::from(desc.start_addr.align_down_page());
+        let end_exclusive = PageAddress::from(desc.end_addr_exclusive().align_up_page());
 
         Self {
-            start: start_page_addr,
-            num_pages: len,
+            start,
+            end_exclusive,
         }
     }
 }
@@ -161,8 +272,12 @@ impl MMIODescriptor {
     /// Create an instance.
     pub const fn new(start_addr: Address<Physical>, size: usize) -> Self {
         assert!(size > 0);
+        let end_addr_exclusive = Address::new(start_addr.as_usize() + size);
 
-        Self { start_addr, size }
+        Self {
+            start_addr,
+            end_addr_exclusive,
+        }
     }
 
     /// Return the start address.
@@ -170,14 +285,9 @@ impl MMIODescriptor {
         self.start_addr
     }
 
-    /// Return the inclusive end address.
-    pub fn end_addr_inclusive(&self) -> Address<Physical> {
-        self.start_addr + (self.size - 1)
-    }
-
-    /// Return the size.
-    pub const fn size(&self) -> usize {
-        self.size
+    /// Return the exclusive end address.
+    pub fn end_addr_exclusive(&self) -> Address<Physical> {
+        self.end_addr_exclusive
     }
 }
 
@@ -188,14 +298,76 @@ impl MMIODescriptor {
 #[cfg(test)]
 mod tests {
     use super::*;
+    use crate::memory::Virtual;
     use test_macros::kernel_test;
 
-    /// Check if the size of `struct Page` is as expected.
+    /// Sanity of [PageAddress] methods.
     #[kernel_test]
-    fn size_of_page_equals_granule_size() {
+    fn pageaddress_type_method_sanity() {
+        let page_addr: PageAddress<Virtual> =
+            PageAddress::from(bsp::memory::mmu::KernelGranule::SIZE * 2);
+
+        assert_eq!(
+            page_addr.checked_offset(-2),
+            Some(PageAddress::<Virtual>::from(0))
+        );
+
+        assert_eq!(
+            page_addr.checked_offset(2),
+            Some(PageAddress::<Virtual>::from(
+                bsp::memory::mmu::KernelGranule::SIZE * 4
+            ))
+        );
+
         assert_eq!(
-            core::mem::size_of::<Page<Physical>>(),
-            bsp::memory::mmu::KernelGranule::SIZE
+            PageAddress::<Virtual>::from(0).checked_offset(0),
+            Some(PageAddress::<Virtual>::from(0))
         );
+        assert_eq!(PageAddress::<Virtual>::from(0).checked_offset(-1), None);
+
+        let max_page_addr = Address::<Virtual>::new(usize::MAX).align_down_page();
+        assert_eq!(
+            PageAddress::<Virtual>::from(max_page_addr).checked_offset(1),
+            None
+        );
+
+        let zero = PageAddress::<Virtual>::from(0);
+        let three = PageAddress::<Virtual>::from(bsp::memory::mmu::KernelGranule::SIZE * 3);
+        assert_eq!(PageAddress::steps_between(&zero, &three), Some(3));
+    }
+
+    /// Sanity of [MemoryRegion] methods.
+    #[kernel_test]
+    fn memoryregion_type_method_sanity() {
+        let zero = PageAddress::<Virtual>::from(0);
+        let zero_region = MemoryRegion::new(zero, zero);
+        assert_eq!(zero_region.num_pages(), 0);
+        assert_eq!(zero_region.size(), 0);
+
+        let one = PageAddress::<Virtual>::from(bsp::memory::mmu::KernelGranule::SIZE);
+        let one_region = MemoryRegion::new(zero, one);
+        assert_eq!(one_region.num_pages(), 1);
+        assert_eq!(one_region.size(), bsp::memory::mmu::KernelGranule::SIZE);
+
+        let three = PageAddress::<Virtual>::from(bsp::memory::mmu::KernelGranule::SIZE * 3);
+        let mut three_region = MemoryRegion::new(zero, three);
+        assert!(three_region.contains(zero.into_inner()));
+        assert!(!three_region.contains(three.into_inner()));
+        assert!(three_region.overlaps(&one_region));
+
+        let allocation = three_region
+            .take_first_n_pages(NonZeroUsize::new(2).unwrap())
+            .unwrap();
+        assert_eq!(allocation.num_pages(), 2);
+        assert_eq!(three_region.num_pages(), 1);
+
+        let mut count = 0;
+        for i in allocation.into_iter() {
+            assert_eq!(
+                i.into_inner().as_usize(),
+                count * bsp::memory::mmu::KernelGranule::SIZE
+            );
+            count = count + 1;
+        }
     }
 }
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rs b/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rs
index 03058f5ef..489529411 100644
--- a/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rs
+++ b/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rs
@@ -8,7 +8,7 @@
 #![no_main]
 #![no_std]
 
-use libkernel::{bsp, console, cpu, exception, print};
+use libkernel::{bsp, console, cpu, exception, memory, print};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
@@ -16,6 +16,7 @@ unsafe fn kernel_init() -> ! {
     use console::interface::*;
 
     exception::handling_init();
+    memory::mmu::post_enable_init();
     bsp::console::qemu_bring_up_console();
 
     // Handshake
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/01_timer_sanity.rs b/15_virtual_mem_part3_precomputed_tables/tests/01_timer_sanity.rs
index f39d83845..9ffc38e7b 100644
--- a/15_virtual_mem_part3_precomputed_tables/tests/01_timer_sanity.rs
+++ b/15_virtual_mem_part3_precomputed_tables/tests/01_timer_sanity.rs
@@ -11,12 +11,13 @@
 #![test_runner(libkernel::test_runner)]
 
 use core::time::Duration;
-use libkernel::{bsp, cpu, exception, time, time::interface::TimeManager};
+use libkernel::{bsp, cpu, exception, memory, time, time::interface::TimeManager};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
     exception::handling_init();
+    memory::mmu::post_enable_init();
     bsp::console::qemu_bring_up_console();
 
     // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs b/15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs
index 655e92156..1063c123a 100644
--- a/15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs
+++ b/15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs
@@ -17,11 +17,12 @@
 /// or indirectly.
 mod panic_exit_success;
 
-use libkernel::{bsp, cpu, exception, println};
+use libkernel::{bsp, cpu, exception, memory, println};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
     exception::handling_init();
+    memory::mmu::post_enable_init();
     bsp::console::qemu_bring_up_console();
 
     // This line will be printed as the test header.
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/03_exception_irq_sanity.rs b/15_virtual_mem_part3_precomputed_tables/tests/03_exception_irq_sanity.rs
index ac25d01a8..c21f0c490 100644
--- a/15_virtual_mem_part3_precomputed_tables/tests/03_exception_irq_sanity.rs
+++ b/15_virtual_mem_part3_precomputed_tables/tests/03_exception_irq_sanity.rs
@@ -10,11 +10,12 @@
 #![reexport_test_harness_main = "test_main"]
 #![test_runner(libkernel::test_runner)]
 
-use libkernel::{bsp, cpu, exception};
+use libkernel::{bsp, cpu, exception, memory};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    memory::mmu::post_enable_init();
     bsp::console::qemu_bring_up_console();
 
     exception::handling_init();
diff --git a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb
index 3a8b41d90..3b9d03847 100644
--- a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb
+++ b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb
@@ -180,21 +180,16 @@ def output_addr=(addr)
 
 # Translation table representing the structure defined in translation_table.rs.
 class TranslationTable
-    MMIO_APERTURE_MiB = 256 * 1024 * 1024
-
     module MAIR
         NORMAL = 1
     end
 
     def initialize
-        @virt_mmio_start_addr = (BSP.kernel_virt_addr_space_size - MMIO_APERTURE_MiB) +
-                                BSP.kernel_virt_start_addr
-
         do_sanity_checks
 
         num_lvl2_tables = BSP.kernel_virt_addr_space_size >> Granule512MiB::SHIFT
 
-        @lvl3 = new_lvl3(num_lvl2_tables, BSP.phys_table_struct_start_addr)
+        @lvl3 = new_lvl3(num_lvl2_tables, BSP.phys_addr_of_kernel_tables)
 
         @lvl2_phys_start_addr = @lvl3.phys_start_addr + @lvl3.size_in_byte
         @lvl2 = new_lvl2(num_lvl2_tables, @lvl2_phys_start_addr)
@@ -202,13 +197,13 @@ def initialize
         populate_lvl2_entries
     end
 
-    def map_pages_at(virt_pages, phys_pages, attributes)
-        return if virt_pages.empty?
+    def map_at(virt_region, phys_region, attributes)
+        return if virt_region.empty?
 
-        raise if virt_pages.size != phys_pages.size
-        raise if phys_pages.last > BSP.phys_addr_space_end_page
+        raise if virt_region.size != phys_region.size
+        raise if phys_region.last > BSP.phys_addr_space_end_page
 
-        virt_pages.zip(phys_pages).each do |virt_page, phys_page|
+        virt_region.zip(phys_region).each do |virt_page, phys_page|
             desc = page_descriptor_from(virt_page)
             set_lvl3_entry(desc, phys_page, attributes)
         end
@@ -229,22 +224,9 @@ def phys_tables_base_addr
 
     private
 
-    def binary_with_mmio_clash?
-        BSP.rw_end_exclusive >= @virt_mmio_start_addr
-    end
-
     def do_sanity_checks
         raise unless BSP.kernel_granule::SIZE == Granule64KiB::SIZE
         raise unless (BSP.kernel_virt_addr_space_size % Granule512MiB::SIZE).zero?
-
-        # Need to ensure that that the kernel binary does not clash with the upmost 256 MiB of the
-        # virtual address space, which is reserved for runtime-remapping of MMIO.
-        return unless binary_with_mmio_clash?
-
-        puts format('__data_end_exclusive: 0x%16x', BSP.data_end_exclusive)
-        puts format('MMIO start:           0x%16x', @virt_mmio_start_addr)
-
-        raise 'Kernel virtual addresses clash with 256 MiB MMIO window'
     end
 
     def new_lvl3(num_lvl2_tables, start_addr)
@@ -273,8 +255,6 @@ def populate_lvl2_entries
     end
 
     def lvl2_lvl3_index_from(addr)
-        addr -= BSP.kernel_virt_start_addr
-
         lvl2_index = addr >> Granule512MiB::SHIFT
         lvl3_index = (addr & Granule512MiB::MASK) >> Granule64KiB::SHIFT
 
@@ -309,13 +289,10 @@ def set_attributes(desc, attributes)
 
                   end
 
-        desc.pxn = case attributes.execute_never
-                   when :XN
+        desc.pxn = if attributes.execute_never
                        Stage1PageDescriptor::PXN::TRUE
-                   when :X
-                       Stage1PageDescriptor::PXN::FALSE
                    else
-                       raise 'Invalid input'
+                       Stage1PageDescriptor::PXN::FALSE
                    end
 
         desc.uxn = Stage1PageDescriptor::UXN::TRUE
diff --git a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/bsp.rb b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/bsp.rb
index 6acafe984..d00c0ee94 100644
--- a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/bsp.rb
+++ b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/bsp.rb
@@ -6,61 +6,31 @@
 
 # Raspberry Pi 3 + 4
 class RaspberryPi
-    attr_reader :kernel_granule, :kernel_virt_addr_space_size, :kernel_virt_start_addr
+    attr_reader :kernel_granule, :kernel_virt_addr_space_size
 
-    NM_BINARY = 'aarch64-none-elf-nm'
-    READELF_BINARY = 'aarch64-none-elf-readelf'
     MEMORY_SRC = File.read('src/bsp/raspberrypi/memory.rs').split("\n")
 
-    def initialize(kernel_elf)
+    def initialize
         @kernel_granule = Granule64KiB
 
-        @virt_addresses = {
-            boot_core_stack_start: /__boot_core_stack_start/,
-            boot_core_stack_end_exclusive: /__boot_core_stack_end_exclusive/,
+        @kernel_virt_addr_space_size = KERNEL_ELF.symbol_value('__kernel_virt_addr_space_size')
 
-            rx_start: /__rx_start/,
-            rx_end_exclusive: /__rx_end_exclusive/,
-
-            rw_start: /__rw_start/,
-            rw_end_exclusive: /__rw_end_exclusive/,
-
-            table_struct_start_addr: /bsp::.*::memory::mmu::KERNEL_TABLES/,
-            phys_tables_base_addr: /PHYS_KERNEL_TABLES_BASE_ADDR/
-        }
-
-        symbols = `#{NM_BINARY} --demangle #{kernel_elf}`.split("\n")
-        @kernel_virt_addr_space_size = parse_from_symbols(symbols, /__kernel_virt_addr_space_size/)
-        @kernel_virt_start_addr = 0
-        @virt_addresses = parse_from_symbols(symbols, @virt_addresses)
-        @phys_addresses = virt_to_phys(@virt_addresses)
-
-        @descriptors = parse_descriptors
-        update_max_descriptor_name_length
-
-        @text_section_offset_in_elf = parse_text_section_offset_in_elf(kernel_elf)
+        @virt_addr_of_kernel_tables = KERNEL_ELF.symbol_value('KERNEL_TABLES')
+        @virt_addr_of_phys_kernel_tables_base_addr = KERNEL_ELF.symbol_value(
+            'PHYS_KERNEL_TABLES_BASE_ADDR'
+        )
     end
 
-    def rw_end_exclusive
-        @virt_addresses[:rw_end_exclusive]
+    def phys_addr_of_kernel_tables
+        KERNEL_ELF.virt_to_phys(@virt_addr_of_kernel_tables)
     end
 
-    def phys_table_struct_start_addr
-        @phys_addresses[:table_struct_start_addr]
+    def kernel_tables_offset_in_file
+        KERNEL_ELF.virt_addr_to_file_offset(@virt_addr_of_kernel_tables)
     end
 
-    def table_struct_offset_in_kernel_elf
-        (@virt_addresses[:table_struct_start_addr] - @virt_addresses[:rx_start]) +
-            @text_section_offset_in_elf
-    end
-
-    def phys_tables_base_addr
-        @phys_addresses[:phys_tables_base_addr]
-    end
-
-    def phys_tables_base_addr_offset_in_kernel_elf
-        (@virt_addresses[:phys_tables_base_addr] - @virt_addresses[:rx_start]) +
-            @text_section_offset_in_elf
+    def phys_kernel_tables_base_addr_offset_in_file
+        KERNEL_ELF.virt_addr_to_file_offset(@virt_addr_of_phys_kernel_tables_base_addr)
     end
 
     def phys_addr_space_end_page
@@ -76,102 +46,4 @@ def phys_addr_space_end_page
 
         x.scan(/\d+/).join.to_i(16)
     end
-
-    def kernel_map_binary
-        MappingDescriptor.print_header
-
-        @descriptors.each do |i|
-            print 'Generating'.rjust(12).green.bold
-            print ' '
-            puts i.to_s
-
-            TRANSLATION_TABLES.map_pages_at(i.virt_pages, i.phys_pages, i.attributes)
-        end
-
-        MappingDescriptor.print_divider
-    end
-
-    private
-
-    def parse_from_symbols(symbols, input)
-        case input.class.to_s
-        when 'Regexp'
-            symbols.grep(input).first.split.first.to_i(16)
-        when 'Hash'
-            input.transform_values do |val|
-                symbols.grep(val).first.split.first.to_i(16)
-            end
-        else
-            raise
-        end
-    end
-
-    def parse_text_section_offset_in_elf(kernel_elf)
-        `#{READELF_BINARY} --sections #{kernel_elf}`.scan(/.text.*/).first.split.last.to_i(16)
-    end
-
-    def virt_to_phys(input)
-        case input.class.to_s
-        when 'Integer'
-            input - @kernel_virt_start_addr
-        when 'Hash'
-            input.transform_values do |val|
-                val - @kernel_virt_start_addr
-            end
-        else
-            raise
-        end
-    end
-
-    def descriptor_ro
-        name = 'Code and RO data'
-
-        ro_size = @virt_addresses[:rx_end_exclusive] -
-                  @virt_addresses[:rx_start]
-
-        virt_ro_pages = PageArray.new(@virt_addresses[:rx_start], ro_size, @kernel_granule::SIZE)
-        phys_ro_pages = PageArray.new(@phys_addresses[:rx_start], ro_size, @kernel_granule::SIZE)
-        ro_attribues = AttributeFields.new(:CacheableDRAM, :ReadOnly, :X)
-
-        MappingDescriptor.new(name, virt_ro_pages, phys_ro_pages, ro_attribues)
-    end
-
-    def descriptor_data
-        name = 'Data and bss'
-
-        data_size = @virt_addresses[:rw_end_exclusive] -
-                    @virt_addresses[:rw_start]
-
-        virt_data_pages = PageArray.new(@virt_addresses[:rw_start], data_size,
-                                        @kernel_granule::SIZE)
-        phys_data_pages = PageArray.new(@phys_addresses[:rw_start], data_size,
-                                        @kernel_granule::SIZE)
-        data_attribues = AttributeFields.new(:CacheableDRAM, :ReadWrite, :XN)
-
-        MappingDescriptor.new(name, virt_data_pages, phys_data_pages, data_attribues)
-    end
-
-    def descriptor_boot_core_stack
-        name = 'Boot-core stack'
-
-        boot_core_stack_size = @virt_addresses[:boot_core_stack_end_exclusive] -
-                               @virt_addresses[:boot_core_stack_start]
-
-        virt_boot_core_stack_pages = PageArray.new(@virt_addresses[:boot_core_stack_start],
-                                                   boot_core_stack_size, @kernel_granule::SIZE)
-        phys_boot_core_stack_pages = PageArray.new(@phys_addresses[:boot_core_stack_start],
-                                                   boot_core_stack_size, @kernel_granule::SIZE)
-        boot_core_stack_attribues = AttributeFields.new(:CacheableDRAM, :ReadWrite, :XN)
-
-        MappingDescriptor.new(name, virt_boot_core_stack_pages, phys_boot_core_stack_pages,
-                              boot_core_stack_attribues)
-    end
-
-    def parse_descriptors
-        [descriptor_ro, descriptor_data, descriptor_boot_core_stack]
-    end
-
-    def update_max_descriptor_name_length
-        MappingDescriptor.max_descriptor_name_length = @descriptors.map { |i| i.name.size }.max
-    end
 end
diff --git a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/generic.rb b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/generic.rb
index ca952bc80..977e92574 100644
--- a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/generic.rb
+++ b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/generic.rb
@@ -27,6 +27,12 @@ def aligned?(alignment)
         (self & (alignment - 1)).zero?
     end
 
+    def align_up(alignment)
+        raise unless alignment.power_of_two?
+
+        (self + alignment - 1) & ~(alignment - 1)
+    end
+
     def to_hex_underscore(with_leading_zeros: false)
         fmt = with_leading_zeros ? '%016x' : '%x'
         value = format(fmt, self).to_s.reverse.scan(/.{4}|.+/).join('_').reverse
@@ -36,7 +42,7 @@ def to_hex_underscore(with_leading_zeros: false)
 end
 
 # An array where each value is the start address of a Page.
-class PageArray < Array
+class MemoryRegion < Array
     def initialize(start_addr, size, granule_size)
         raise unless start_addr.aligned?(granule_size)
         raise unless size.positive?
@@ -58,68 +64,116 @@ def initialize(mem_attributes, acc_perms, execute_never)
         @acc_perms = acc_perms
         @execute_never = execute_never
     end
+
+    def to_s
+        x = case @mem_attributes
+            when :CacheableDRAM
+                'C'
+            else
+                '?'
+            end
+
+        y = case @acc_perms
+            when :ReadWrite
+                'RW'
+            when :ReadOnly
+                'RO'
+            else
+                '??'
+            end
+
+        z = @execute_never ? 'XN' : 'X '
+
+        "#{x} #{y} #{z}"
+    end
 end
 
-# A container that describes a one- or many-page virt-to-phys mapping.
+# A container that describes a virt-to-phys region mapping.
 class MappingDescriptor
-    @max_descriptor_name_length = 0
+    @max_section_name_length = 'Sections'.length
 
     class << self
-        attr_accessor :max_descriptor_name_length
+        attr_accessor :max_section_name_length
+
+        def update_max_section_name_length(length)
+            @max_section_name_length = [@max_section_name_length, length].max
+        end
     end
 
-    attr_reader :name, :virt_pages, :phys_pages, :attributes
+    attr_reader :name, :virt_region, :phys_region, :attributes
 
-    def initialize(name, virt_pages, phys_pages, attributes)
+    def initialize(name, virt_region, phys_region, attributes)
         @name = name
-        @virt_pages = virt_pages
-        @phys_pages = phys_pages
+        @virt_region = virt_region
+        @phys_region = phys_region
         @attributes = attributes
     end
 
     def to_s
-        name = @name.ljust(self.class.max_descriptor_name_length)
-        virt_start = @virt_pages.first.to_hex_underscore(with_leading_zeros: true)
-        size = ((@virt_pages.size * 65_536) / 1024).to_s.rjust(3)
+        name = @name.ljust(self.class.max_section_name_length)
+        virt_start = @virt_region.first.to_hex_underscore(with_leading_zeros: true)
+        phys_start = @phys_region.first.to_hex_underscore(with_leading_zeros: true)
+        size = ((@virt_region.size * 65_536) / 1024).to_s.rjust(3)
 
-        "#{name} | #{virt_start} | #{size} KiB"
+        "#{name} | #{virt_start} | #{phys_start} | #{size} KiB | #{@attributes}"
     end
 
     def self.print_divider
         print '             '
-        print '-' * max_descriptor_name_length
-        puts '----------------------------------'
+        print '-' * max_section_name_length
+        puts '--------------------------------------------------------------------'
     end
 
     def self.print_header
         print_divider
         print '             '
-        print 'Section'.center(max_descriptor_name_length)
+        print 'Sections'.center(max_section_name_length)
         print '   '
-        print 'Start Virt Addr'.center(21)
+        print 'Virt Start Addr'.center(21)
+        print '   '
+        print 'Phys Start Addr'.center(21)
         print '   '
         print 'Size'.center(7)
+        print '   '
+        print 'Attr'.center(7)
         puts
         print_divider
     end
 end
 
-def kernel_patch_tables(kernel_binary)
+def kernel_map_binary
+    mapping_descriptors = KERNEL_ELF.generate_mapping_descriptors
+
+    # Generate_mapping_descriptors updates the header being printed with this call. So it must come
+    # afterwards.
+    MappingDescriptor.print_header
+
+    mapping_descriptors.each do |i|
+        print 'Generating'.rjust(12).green.bold
+        print ' '
+        puts i.to_s
+
+        TRANSLATION_TABLES.map_at(i.virt_region, i.phys_region, i.attributes)
+    end
+
+    MappingDescriptor.print_divider
+end
+
+def kernel_patch_tables(kernel_elf_path)
     print 'Patching'.rjust(12).green.bold
-    print ' Kernel table struct at physical '
-    puts BSP.phys_table_struct_start_addr.to_hex_underscore
+    print ' Kernel table struct at ELF file offset '
+    puts BSP.kernel_tables_offset_in_file.to_hex_underscore
 
-    File.binwrite(kernel_binary, TRANSLATION_TABLES.to_binary,
-                  BSP.table_struct_offset_in_kernel_elf)
+    File.binwrite(kernel_elf_path, TRANSLATION_TABLES.to_binary, BSP.kernel_tables_offset_in_file)
 end
 
-def kernel_patch_base_addr(kernel_binary)
+def kernel_patch_base_addr(kernel_elf_path)
     print 'Patching'.rjust(12).green.bold
-    print ' Value of kernel table physical base address ('
+    print ' Kernel tables physical base address start argument to value '
     print TRANSLATION_TABLES.phys_tables_base_addr.to_hex_underscore
-    print ') at physical '
-    puts BSP.phys_tables_base_addr.to_hex_underscore
+    print ' at ELF file offset '
+    puts BSP.phys_kernel_tables_base_addr_offset_in_file.to_hex_underscore
 
-    File.binwrite(kernel_binary, TRANSLATION_TABLES.phys_tables_base_addr_binary,
-                  BSP.phys_tables_base_addr_offset_in_kernel_elf)
+    File.binwrite(kernel_elf_path, TRANSLATION_TABLES.phys_tables_base_addr_binary,
+                  BSP.phys_kernel_tables_base_addr_offset_in_file)
 end
diff --git a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/kernel_elf.rb b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/kernel_elf.rb
new file mode 100644
index 000000000..a467856e0
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/kernel_elf.rb
@@ -0,0 +1,92 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+# KernelELF
+class KernelELF
+    SECTION_FLAG_ALLOC = 2
+
+    def initialize(kernel_elf_path)
+        @elf = ELFTools::ELFFile.new(File.open(kernel_elf_path))
+        @symtab_section = @elf.section_by_name('.symtab')
+    end
+
+    def symbol_value(symbol_name)
+        @symtab_section.symbol_by_name(symbol_name).header.st_value
+    end
+
+    def segment_containing_virt_addr(virt_addr)
+        @elf.each_segments do |segment|
+            return segment if segment.vma_in?(virt_addr)
+        end
+    end
+
+    def virt_to_phys(virt_addr)
+        segment = segment_containing_virt_addr(virt_addr)
+        translation_offset = segment.header.p_vaddr - segment.header.p_paddr
+
+        virt_addr - translation_offset
+    end
+
+    def virt_addr_to_file_offset(virt_addr)
+        segment = segment_containing_virt_addr(virt_addr)
+        segment.vma_to_offset(virt_addr)
+    end
+
+    def sections_in_segment(segment)
+        head = segment.mem_head
+        tail = segment.mem_tail
+
+        sections = @elf.each_sections.select do |section|
+            file_offset = section.header.sh_addr
+            flags = section.header.sh_flags
+
+            file_offset >= head && file_offset < tail && (flags & SECTION_FLAG_ALLOC != 0)
+        end
+
+        sections.map(&:name).join(' ')
+    end
+
+    def select_load_segments
+        @elf.each_segments.select do |segment|
+            segment.instance_of?(ELFTools::Segments::LoadSegment)
+        end
+    end
+
+    def segment_get_acc_perms(segment)
+        if segment.readable? && segment.writable?
+            :ReadWrite
+        elsif segment.readable?
+            :ReadOnly
+        else
+            :Invalid
+        end
+    end
+
+    def update_max_section_name_length(descriptors)
+        MappingDescriptor.update_max_section_name_length(descriptors.map { |i| i.name.size }.max)
+    end
+
+    def generate_mapping_descriptors
+        descriptors = select_load_segments.map do |segment|
+            # Assume each segment is page aligned.
+            size = segment.mem_size.align_up(BSP.kernel_granule::SIZE)
+            virt_start_addr = segment.header.p_vaddr
+            phys_start_addr = segment.header.p_paddr
+            acc_perms = segment_get_acc_perms(segment)
+            execute_never = !segment.executable?
+            section_names = sections_in_segment(segment)
+
+            virt_region = MemoryRegion.new(virt_start_addr, size, BSP.kernel_granule::SIZE)
+            phys_region = MemoryRegion.new(phys_start_addr, size, BSP.kernel_granule::SIZE)
+            attributes = AttributeFields.new(:CacheableDRAM, acc_perms, execute_never)
+
+            MappingDescriptor.new(section_names, virt_region, phys_region, attributes)
+        end
+
+        update_max_section_name_length(descriptors)
+        descriptors
+    end
+end
diff --git a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/main.rb b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/main.rb
index 5200a4858..5485cc61a 100755
--- a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/main.rb
+++ b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/main.rb
@@ -7,13 +7,15 @@
 
 TARGET = ARGV[0].split('-').first.to_sym
 BSP_TYPE = ARGV[1].to_sym
-kernel_elf = ARGV[2]
+kernel_elf_path = ARGV[2]
 
 require 'rubygems'
 require 'bundler/setup'
 require 'colorize'
+require 'elftools'
 
 require_relative 'generic'
+require_relative 'kernel_elf'
 require_relative 'bsp'
 require_relative 'arch'
 
@@ -22,9 +24,11 @@
 
 start = Time.now
 
+KERNEL_ELF = KernelELF.new(kernel_elf_path)
+
 BSP = case BSP_TYPE
       when :rpi3, :rpi4
-          RaspberryPi.new(kernel_elf)
+          RaspberryPi.new
       else
           raise
       end
@@ -36,10 +40,9 @@
                          raise
                      end
 
-BSP.kernel_map_binary
-
-kernel_patch_tables(kernel_elf)
-kernel_patch_base_addr(kernel_elf)
+kernel_map_binary
+kernel_patch_tables(kernel_elf_path)
+kernel_patch_base_addr(kernel_elf_path)
 
 elapsed = Time.now - start
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/README.md b/16_virtual_mem_part4_higher_half_kernel/README.md
index dae4e8466..86276cde2 100644
--- a/16_virtual_mem_part4_higher_half_kernel/README.md
+++ b/16_virtual_mem_part4_higher_half_kernel/README.md
@@ -8,6 +8,7 @@
 
 - [Introduction](#introduction)
 - [Implementation](#implementation)
+  - [Linking Changes](#linking-changes)
   - [Position-Independent Boot Code](#position-independent-boot-code)
 - [Test it](#test-it)
 - [Diff to previous](#diff-to-previous)
@@ -19,8 +20,9 @@ A long time in the making, in this tutorial we finally map the kernel to the mos
 applications to use the whole of the least significant area of the virtual memory space.
 
 As has been teased since `tutorial 14`, we will make use of the `AArch64`'s `TTBR1`. Since the
-kernel's virtual address space size is `2 GiB` since the last tutorial, `TTBR1` will cover the range
-from `0xffff_ffff_ffff_ffff` down to `ffff_ffff_8000_0000` (both inclusive).
+kernel's virtual address space size currently is `1 GiB` (defined in
+`bsp/__board_name__/memory/mmu.rs`), `TTBR1` will cover the range from `0xffff_ffff_ffff_ffff` down
+to `ffff_ffff_c000_0000` (both inclusive).
 
 ## Implementation
 
@@ -65,7 +67,7 @@ where
 }
 ```
 
-Thanks to this infrastructure, `BSP` Rust code in `bsp/raspberrypi/memory/mmu.rs` only needs to
+Thanks to this infrastructure, `BSP` Rust code in `bsp/__board_name__/memory/mmu.rs` only needs to
 change to this newly introduced type in order to switch from lower half to higher half translation
 tables for the kernel:
 
@@ -74,20 +76,110 @@ type KernelTranslationTable =
     <KernelVirtAddrSpace as AssociatedTranslationTable>::TableStartFromTop;
 ```
 
+### Linking Changes
+
 In the `link.ld` linker script, we define a new symbol `__kernel_virt_start_addr` now, which is the
 start address of the kernel's virtual address space, calculated as `(u64::MAX -
-__kernel_virt_addr_space_size) + 1`. In order to make virtual-to-physical address translation easier
-for the human eye (and mind), we link the kernel itself at `__kernel_virt_start_addr +
-__rpi_load_addr`.
+__kernel_virt_addr_space_size) + 1`. Before the first section definition, we set the linker script's
+location counter to this address:
+
+```ld.s
+SECTIONS
+{
+    . =  __kernel_virt_start_addr;
+
+    ASSERT((. & PAGE_MASK) == 0, "Start of address space is not page aligned")
+
+    /***********************************************************************************************
+    * Code + RO Data + Global Offset Table
+    ***********************************************************************************************/
+```
 
-Before these tutorials, the first mapped address of the kernel binary was always located at
-`__rpi_load_addr == 0x8_0000`. Starting with this tutorial, due to the `2 GiB` virtual address space
-size, the new first mapped address is `ffff_ffff_8008_0000`. So by ignoring the upper bits of the
-address, you can easily derive the physical address.
+Since we are not identity mapping anymore, we start to make use of the `AT` keyword in the output
+section specification:
 
-The changes in the `_arch` `MMU` driver are minimal, and mostly concerned with configuring `TCR_EL1`
-for use with `TTBR1_EL1` now. And of course, setting `TTBR1_EL1` in `fn
-enable_mmu_and_caching(...)`.
+```ld.s
+/* The physical address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_phys_binary_load_addr = 0x80000;
+
+/* omitted */
+
+SECTIONS
+{
+    . =  __kernel_virt_start_addr;
+
+    /* omitted */
+
+    __code_start = .;
+    .text : AT(__rpi_phys_binary_load_addr)
+```
+
+This will manifest in the kernel ELF `segment` attributes, as can be inspected using the `make
+readelf` command:
+
+```console
+$ make readelf
+
+Program Headers:
+  Type           Offset             VirtAddr           PhysAddr
+                 FileSiz            MemSiz              Flags  Align
+  LOAD           0x0000000000010000 0xffffffffc0000000 0x0000000000080000
+                 0x000000000000cb08 0x000000000000cb08  R E    0x10000
+  LOAD           0x0000000000020000 0xffffffffc0010000 0x0000000000090000
+                 0x0000000000030dc0 0x0000000000030de0  RW     0x10000
+  LOAD           0x0000000000060000 0xffffffffc0860000 0x0000000000000000
+                 0x0000000000000000 0x0000000000080000  RW     0x10000
+
+ Section to Segment mapping:
+  Segment Sections...
+   00     .text .rodata
+   01     .data .bss
+   02     .boot_core_stack
+
+```
+
+As you can see, `VirtAddr` and `PhysAddr` are different now, as compared to all the previous
+tutorials where they were identical. This information from the `ELF` file will eventually be parsed
+by the `translation table tool` and incorporated when compiling the precomputed translation tables.
+
+You might have noticed that `.text .rodata` and `.boot_core_stack` exchanged places as compared to
+previous tutorials. The reason this was done is that with a remapped kernel, this is trivial to do
+without affecting the physical layout. This allows us to place an unmapped `guard page` between the
+`boot core stack` and the `mmio remap region` in the VA space, which nicely protects the kernel from
+stack overflows now:
+
+```ld.s
+/***********************************************************************************************
+* MMIO Remap Reserved
+***********************************************************************************************/
+__mmio_remap_start = .;
+. += 8 * 1024 * 1024;
+__mmio_remap_end_exclusive = .;
+
+ASSERT((. & PAGE_MASK) == 0, "MMIO remap reservation is not page aligned")
+
+/***********************************************************************************************
+* Guard Page
+***********************************************************************************************/
+. += PAGE_SIZE;
+
+/***********************************************************************************************
+* Boot Core Stack
+***********************************************************************************************/
+.boot_core_stack (NOLOAD) : AT(__rpi_phys_dram_start_addr)
+{
+    __boot_core_stack_start = .;         /*   ^             */
+                                         /*   | stack       */
+    . += __rpi_phys_binary_load_addr;    /*   | growth      */
+                                         /*   | direction   */
+    __boot_core_stack_end_exclusive = .; /*   |             */
+} :segment_boot_core_stack
+
+ASSERT((. & PAGE_MASK) == 0, "End of boot core stack is not page aligned")
+```
+
+Changes in the `_arch` `MMU` driver are minimal, and mostly concerned with configuring `TCR_EL1` for
+use with `TTBR1_EL1` now. And of course, setting `TTBR1_EL1` in `fn enable_mmu_and_caching(...)`.
 
 ### Position-Independent Boot Code
 
@@ -136,16 +228,16 @@ $ make chainboot
 [...]
 
 Precomputing kernel translation tables and patching kernel ELF
-             --------------------------------------------------
-                 Section           Start Virt Addr       Size
-             --------------------------------------------------
-  Generating Code and RO data | 0xffff_ffff_8008_0000 |  64 KiB
-  Generating Data and bss     | 0xffff_ffff_8009_0000 | 384 KiB
-  Generating Boot-core stack  | 0xffff_ffff_8010_0000 | 512 KiB
-             --------------------------------------------------
-    Patching Kernel table struct at physical 0x9_0000
-    Patching Value of kernel table physical base address (0xd_0000) at physical 0x8_0080
-    Finished in 0.03s
+             ------------------------------------------------------------------------------------
+                 Sections          Virt Start Addr         Phys Start Addr       Size      Attr
+             ------------------------------------------------------------------------------------
+  Generating .text .rodata    | 0xffff_ffff_c000_0000 | 0x0000_0000_0008_0000 |  64 KiB | C RO X
+  Generating .data .bss       | 0xffff_ffff_c001_0000 | 0x0000_0000_0009_0000 | 256 KiB | C RW XN
+  Generating .boot_core_stack | 0xffff_ffff_c086_0000 | 0x0000_0000_0000_0000 | 512 KiB | C RW XN
+             ------------------------------------------------------------------------------------
+    Patching Kernel table struct at ELF file offset 0x2_0000
+    Patching Kernel tables physical base address start argument to value 0xb_0000 at ELF file offset 0x1_0088
+    Finished in 0.14s
 
 Minipush 1.0
 
@@ -161,23 +253,22 @@ Minipush 1.0
            Raspberry Pi 3
 
 [ML] Requesting binary
-[MP] ⏩ Pushing 387 KiB =======================================🦀 100% 96 KiB/s Time: 00:00:04
+[MP] ⏩ Pushing 259 KiB ======================================🦀 100% 129 KiB/s Time: 00:00:02
 [ML] Loaded! Executing the payload now
 
-[    4.318584] mingo version 0.16.0
-[    4.318792] Booting on: Raspberry Pi 3
-[    4.319247] MMU online:
-[    4.319540]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    4.321284]                         Virtual                                   Physical               Size       Attr                    Entity
-[    4.323028]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    4.324773]       0xffff_ffff_8008_0000..0xffff_ffff_8008_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
-[    4.326387]       0xffff_ffff_8009_0000..0xffff_ffff_800e_ffff --> 0x00_0009_0000..0x00_000e_ffff | 384 KiB | C   RW XN | Kernel data and bss
-[    4.327957]       0xffff_ffff_8010_0000..0xffff_ffff_8017_ffff --> 0x00_0010_0000..0x00_0017_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
-[    4.329560]       0xffff_ffff_f000_0000..0xffff_ffff_f000_ffff --> 0x00_3f20_0000..0x00_3f20_ffff |  64 KiB | Dev RW XN | BCM GPIO
-[    4.331012]                                                                                                             | BCM PL011 UART
-[    4.332529]       0xffff_ffff_f001_0000..0xffff_ffff_f001_ffff --> 0x00_3f00_0000..0x00_3f00_ffff |  64 KiB | Dev RW XN | BCM Peripheral Interrupt Controller
-[    4.334273]       -------------------------------------------------------------------------------------------------------------------------------------------
-
+[    2.893480] mingo version 0.16.0
+[    2.893687] Booting on: Raspberry Pi 3
+[    2.894142] MMU online:
+[    2.894434]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    2.896179]                         Virtual                                   Physical               Size       Attr                    Entity
+[    2.897923]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    2.899668]       0xffff_ffff_c000_0000..0xffff_ffff_c000_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
+[    2.901282]       0xffff_ffff_c001_0000..0xffff_ffff_c004_ffff --> 0x00_0009_0000..0x00_000c_ffff | 256 KiB | C   RW XN | Kernel data and bss
+[    2.902852]       0xffff_ffff_c086_0000..0xffff_ffff_c08d_ffff --> 0x00_0000_0000..0x00_0007_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
+[    2.904455]       0xffff_ffff_c005_0000..0xffff_ffff_c005_ffff --> 0x00_3f20_0000..0x00_3f20_ffff |  64 KiB | Dev RW XN | BCM GPIO
+[    2.905907]                                                                                                             | BCM PL011 UART
+[    2.907424]       0xffff_ffff_c006_0000..0xffff_ffff_c006_ffff --> 0x00_3f00_0000..0x00_3f00_ffff |  64 KiB | Dev RW XN | BCM Peripheral Interrupt Controller
+[    2.909168]       -------------------------------------------------------------------------------------------------------------------------------------------
 ```
 
 Raspberry Pi 4:
@@ -187,17 +278,16 @@ $ BSP=rpi4 make chainboot
 [...]
 
 Precomputing kernel translation tables and patching kernel ELF
-             --------------------------------------------------
-                 Section           Start Virt Addr       Size
-             --------------------------------------------------
-  Generating Code and RO data | 0xffff_ffff_8008_0000 |  64 KiB
-  Generating Data and bss     | 0xffff_ffff_8009_0000 | 384 KiB
-  Generating Boot-core stack  | 0xffff_ffff_8010_0000 | 512 KiB
-             --------------------------------------------------
-    Patching Kernel table struct at physical 0x9_0000
-    Patching Value of kernel table physical base address (0xd_0000) at physical 0x8_0080
-    Finished in 0.03s
-
+             ------------------------------------------------------------------------------------
+                 Sections          Virt Start Addr         Phys Start Addr       Size      Attr
+             ------------------------------------------------------------------------------------
+  Generating .text .rodata    | 0xffff_ffff_c000_0000 | 0x0000_0000_0008_0000 |  64 KiB | C RO X
+  Generating .data .bss       | 0xffff_ffff_c001_0000 | 0x0000_0000_0009_0000 | 256 KiB | C RW XN
+  Generating .boot_core_stack | 0xffff_ffff_c086_0000 | 0x0000_0000_0000_0000 | 512 KiB | C RW XN
+             ------------------------------------------------------------------------------------
+    Patching Kernel table struct at ELF file offset 0x2_0000
+    Patching Kernel tables physical base address start argument to value 0xb_0000 at ELF file offset 0x1_0080
+    Finished in 0.13s
 
 Minipush 1.0
 
@@ -213,24 +303,23 @@ Minipush 1.0
            Raspberry Pi 4
 
 [ML] Requesting binary
-[MP] ⏩ Pushing 394 KiB =======================================🦀 100% 98 KiB/s Time: 00:00:04
+[MP] ⏩ Pushing 266 KiB ======================================🦀 100% 133 KiB/s Time: 00:00:02
 [ML] Loaded! Executing the payload now
 
-[    4.401227] mingo version 0.16.0
-[    4.401260] Booting on: Raspberry Pi 4
-[    4.401715] MMU online:
-[    4.402008]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    4.403752]                         Virtual                                   Physical               Size       Attr                    Entity
-[    4.405496]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    4.407241]       0xffff_ffff_8008_0000..0xffff_ffff_8008_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
-[    4.408855]       0xffff_ffff_8009_0000..0xffff_ffff_800e_ffff --> 0x00_0009_0000..0x00_000e_ffff | 384 KiB | C   RW XN | Kernel data and bss
-[    4.410425]       0xffff_ffff_8010_0000..0xffff_ffff_8017_ffff --> 0x00_0010_0000..0x00_0017_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
-[    4.412028]       0xffff_ffff_f000_0000..0xffff_ffff_f000_ffff --> 0x00_fe20_0000..0x00_fe20_ffff |  64 KiB | Dev RW XN | BCM GPIO
-[    4.413480]                                                                                                             | BCM PL011 UART
-[    4.414997]       0xffff_ffff_f001_0000..0xffff_ffff_f001_ffff --> 0x00_ff84_0000..0x00_ff84_ffff |  64 KiB | Dev RW XN | GICD
-[    4.416405]                                                                                                             | GICC
-[    4.417814]       -------------------------------------------------------------------------------------------------------------------------------------------
-
+[    2.973300] mingo version 0.16.0
+[    2.973334] Booting on: Raspberry Pi 4
+[    2.973789] MMU online:
+[    2.974081]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    2.975825]                         Virtual                                   Physical               Size       Attr                    Entity
+[    2.977569]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    2.979314]       0xffff_ffff_c000_0000..0xffff_ffff_c000_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
+[    2.980929]       0xffff_ffff_c001_0000..0xffff_ffff_c004_ffff --> 0x00_0009_0000..0x00_000c_ffff | 256 KiB | C   RW XN | Kernel data and bss
+[    2.982499]       0xffff_ffff_c086_0000..0xffff_ffff_c08d_ffff --> 0x00_0000_0000..0x00_0007_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
+[    2.984102]       0xffff_ffff_c005_0000..0xffff_ffff_c005_ffff --> 0x00_fe20_0000..0x00_fe20_ffff |  64 KiB | Dev RW XN | BCM GPIO
+[    2.985554]                                                                                                             | BCM PL011 UART
+[    2.987070]       0xffff_ffff_c006_0000..0xffff_ffff_c006_ffff --> 0x00_ff84_0000..0x00_ff84_ffff |  64 KiB | Dev RW XN | GICD
+[    2.988479]                                                                                                             | GICC
+[    2.989887]       -------------------------------------------------------------------------------------------------------------------------------------------
 ```
 
 ## Diff to previous
@@ -251,7 +340,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/Cargo.toml 16_virtual_mem_part
 diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs
 --- 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
 +++ 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs
-@@ -30,7 +30,10 @@
+@@ -29,7 +29,10 @@
  /// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
  /// - The HW state of EL1 must be prepared in a sound way.
  #[inline(always)]
@@ -263,7 +352,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
      // Enable timer counter registers for EL1.
      CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
 
-@@ -53,11 +56,11 @@
+@@ -52,11 +55,11 @@
      );
 
      // Second, let the link register point to kernel_init().
@@ -277,7 +366,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -74,9 +77,13 @@
+@@ -73,14 +76,19 @@
  #[no_mangle]
  pub unsafe extern "C" fn _start_rust(
      phys_kernel_tables_base_addr: u64,
@@ -293,9 +382,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
 
      // Turn on the MMU for EL1.
      let addr = Address::new(phys_kernel_tables_base_addr as usize);
-@@ -84,6 +91,7 @@
-         cpu::wait_forever();
-     }
+     memory::mmu::enable_mmu_and_caching(addr).unwrap();
 
 -    // Use `eret` to "return" to EL1. This results in execution of kernel_init() in EL1.
 +    // Use `eret` to "return" to EL1. Since virtual memory will already be enabled, this results in
@@ -357,7 +444,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.s 1
 diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
 --- 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs
 +++ 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
-@@ -135,7 +135,7 @@
+@@ -136,7 +136,7 @@
  /// aligned, so the lvl3 is put first.
  #[repr(C)]
  #[repr(align(65536))]
@@ -366,7 +453,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/t
      /// Page descriptors, covering 64 KiB windows per entry.
      lvl3: [[PageDescriptor; 8192]; NUM_TABLES],
 
-@@ -305,14 +305,23 @@
+@@ -302,10 +302,19 @@
  where
      [u8; Self::SIZE >> Granule512MiB::SHIFT]: Sized,
  {
@@ -382,68 +469,31 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/t
 +impl<const NUM_TABLES: usize, const START_FROM_TOP: bool>
 +    FixedSizeTranslationTable<NUM_TABLES, START_FROM_TOP>
 +{
-     // Reserve the last 256 MiB of the address space for MMIO mappings.
-     const L2_MMIO_START_INDEX: usize = NUM_TABLES - 1;
-     const L3_MMIO_START_INDEX: usize = 8192 / 2;
-
 +    const START_FROM_TOP_OFFSET: Address<Virtual> =
 +        Address::new((usize::MAX - (Granule512MiB::SIZE * NUM_TABLES)) + 1);
 +
      /// Create an instance.
      #[allow(clippy::assertions_on_constants)]
      const fn _new(for_precompute: bool) -> Self {
-@@ -341,20 +350,32 @@
-     /// The start address of the table's MMIO range.
-     #[inline(always)]
-     fn mmio_start_addr(&self) -> Address<Virtual> {
--        Address::new(
-+        let mut addr = Address::new(
-             (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
-                 | (Self::L3_MMIO_START_INDEX << Granule64KiB::SHIFT),
--        )
-+        );
-+
-+        if START_FROM_TOP {
-+            addr += Self::START_FROM_TOP_OFFSET;
-+        }
-+
-+        addr
-     }
-
-     /// The inclusive end address of the table's MMIO range.
-     #[inline(always)]
-     fn mmio_end_addr_inclusive(&self) -> Address<Virtual> {
--        Address::new(
-+        let mut addr = Address::new(
-             (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
-                 | (8191 << Granule64KiB::SHIFT)
-                 | (Granule64KiB::SIZE - 1),
--        )
-+        );
-+
-+        if START_FROM_TOP {
-+            addr += Self::START_FROM_TOP_OFFSET;
-+        }
-+
-+        addr
-     }
-
-     /// Helper to calculate the lvl2 and lvl3 indices from an address.
-@@ -363,7 +384,12 @@
+@@ -336,9 +345,14 @@
          &self,
-         virt_page_ptr: *const Page<Virtual>,
+         virt_page_addr: PageAddress<Virtual>,
      ) -> Result<(usize, usize), &'static str> {
--        let addr = virt_page_ptr as usize;
-+        let mut addr = virt_page_ptr as usize;
+-        let addr = virt_page_addr.into_inner().as_usize();
+-        let lvl2_index = addr >> Granule512MiB::SHIFT;
+-        let lvl3_index = (addr & Granule512MiB::MASK) >> Granule64KiB::SHIFT;
++        let mut addr = virt_page_addr.into_inner();
 +
 +        if START_FROM_TOP {
-+            addr -= Self::START_FROM_TOP_OFFSET.into_usize()
++            addr = addr - Self::START_FROM_TOP_OFFSET;
 +        }
 +
-         let lvl2_index = addr >> Granule512MiB::SHIFT;
-         let lvl3_index = (addr & Granule512MiB::MASK) >> Granule64KiB::SHIFT;
++        let lvl2_index = addr.as_usize() >> Granule512MiB::SHIFT;
++        let lvl3_index = (addr.as_usize() & Granule512MiB::MASK) >> Granule64KiB::SHIFT;
 
-@@ -411,8 +437,9 @@
+         if lvl2_index > (NUM_TABLES - 1) {
+             return Err("Virtual page is out of bounds of translation table");
+@@ -384,8 +398,9 @@
  // OS Interface Code
  //------------------------------------------------------------------------------
 
@@ -455,30 +505,12 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/t
  {
      fn init(&mut self) -> Result<(), &'static str> {
          if self.initialized {
-@@ -483,12 +510,16 @@
-             return Err("Not enough MMIO space left");
-         }
-
--        let addr = Address::new(
-+        let mut addr = Address::new(
-             (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
-                 | (self.cur_l3_mmio_index << Granule64KiB::SHIFT),
-         );
-         self.cur_l3_mmio_index += num_pages;
-
-+        if START_FROM_TOP {
-+            addr += Self::START_FROM_TOP_OFFSET;
-+        }
-+
-         Ok(PageSliceDescriptor::from_addr(addr, num_pages))
-     }
-
-@@ -549,7 +580,7 @@
+@@ -479,7 +494,7 @@
  //--------------------------------------------------------------------------------------------------
 
  #[cfg(test)]
 -pub type MinSizeTranslationTable = FixedSizeTranslationTable<1>;
-+pub type MinSizeTranslationTable = FixedSizeTranslationTable<1, false>;
++pub type MinSizeTranslationTable = FixedSizeTranslationTable<1, true>;
 
  #[cfg(test)]
  mod tests {
@@ -530,53 +562,167 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu.r
          self.set_up_mair();
 
          // Set the "Translation Table Base Register".
--        TTBR0_EL1.set_baddr(phys_tables_base_addr.into_usize() as u64);
-+        TTBR1_EL1.set_baddr(phys_tables_base_addr.into_usize() as u64);
+-        TTBR0_EL1.set_baddr(phys_tables_base_addr.as_usize() as u64);
++        TTBR1_EL1.set_baddr(phys_tables_base_addr.as_usize() as u64);
 
          self.configure_translation_control();
 
 
+diff -uNr 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/console.rs 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/console.rs
+--- 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/console.rs
++++ 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/console.rs
+@@ -4,7 +4,6 @@
+
+ //! BSP console facilities.
+
+-use super::memory;
+ use crate::{bsp::device_driver, console, cpu, driver};
+ use core::fmt;
+
+@@ -26,21 +25,27 @@
+ pub unsafe fn panic_console_out() -> impl fmt::Write {
+     use driver::interface::DeviceDriver;
+
+-    let mut panic_gpio = device_driver::PanicGPIO::new(memory::map::mmio::GPIO_START.as_usize());
+-    let mut panic_uart =
+-        device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START.as_usize());
+-
+-    // If remapping of the driver's MMIO already happened, take the remapped start address.
+-    // Otherwise, take a chance with the default physical address.
+-    let maybe_gpio_mmio_start_addr = super::GPIO.virt_mmio_start_addr();
+-    let maybe_uart_mmio_start_addr = super::PL011_UART.virt_mmio_start_addr();
++    // If remapping of the driver's MMIO hasn't already happened, we won't be able to print. Just
++    // park the CPU core in this case.
++    let gpio_mmio_start_addr = match super::GPIO.virt_mmio_start_addr() {
++        None => cpu::wait_forever(),
++        Some(x) => x,
++    };
++
++    let uart_mmio_start_addr = match super::PL011_UART.virt_mmio_start_addr() {
++        None => cpu::wait_forever(),
++        Some(x) => x,
++    };
++
++    let mut panic_gpio = device_driver::PanicGPIO::new(gpio_mmio_start_addr);
++    let mut panic_uart = device_driver::PanicUart::new(uart_mmio_start_addr);
+
+     panic_gpio
+-        .init(maybe_gpio_mmio_start_addr)
++        .init(None)
+         .unwrap_or_else(|_| cpu::wait_forever());
+     panic_gpio.map_pl011_uart();
+     panic_uart
+-        .init(maybe_uart_mmio_start_addr)
++        .init(None)
+         .unwrap_or_else(|_| cpu::wait_forever());
+
+     panic_uart
+@@ -51,13 +56,14 @@
+ pub unsafe fn panic_console_out() -> impl fmt::Write {
+     use driver::interface::DeviceDriver;
+
+-    let mut panic_uart =
+-        device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START.as_usize());
+-
+-    let maybe_uart_mmio_start_addr = super::PL011_UART.virt_mmio_start_addr();
++    let uart_mmio_start_addr = match super::PL011_UART.virt_mmio_start_addr() {
++        None => cpu::wait_forever(),
++        Some(x) => x,
++    };
++    let mut panic_uart = device_driver::PanicUart::new(uart_mmio_start_addr);
+
+     panic_uart
+-        .init(maybe_uart_mmio_start_addr)
++        .init(None)
+         .unwrap_or_else(|_| cpu::qemu_exit_failure());
+
+     panic_uart
+
 diff -uNr 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/link.ld
 --- 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld
 +++ 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/link.ld
-@@ -6,6 +6,15 @@
- /* This file provides __kernel_virt_addr_space_size */
- INCLUDE src/bsp/raspberrypi/kernel_virt_addr_space_size.ld;
+@@ -8,6 +8,13 @@
+ PAGE_SIZE = 64K;
+ PAGE_MASK = PAGE_SIZE - 1;
 
 +/* The kernel's virtual address range will be:
 + *
 + * [END_ADDRESS_INCLUSIVE, START_ADDRESS]
 + * [u64::MAX             , (u64::MAX - __kernel_virt_addr_space_size) + 1]
-+ *
-+ * Since the start address is needed to set the linker address below, calculate it now.
 + */
 +__kernel_virt_start_addr = ((0xffffffffffffffff - __kernel_virt_addr_space_size) + 1);
 +
- /* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
- __rpi_load_addr = 0x80000;
+ __rpi_phys_dram_start_addr = 0;
 
-@@ -19,13 +28,14 @@
+ /* The physical address at which the the kernel binary will be loaded by the Raspberry's firmware */
+@@ -26,34 +33,22 @@
+  */
+ PHDRS
+ {
+-    segment_boot_core_stack PT_LOAD FLAGS(6);
+     segment_code            PT_LOAD FLAGS(5);
+     segment_data            PT_LOAD FLAGS(6);
++    segment_boot_core_stack PT_LOAD FLAGS(6);
+ }
 
  SECTIONS
  {
--    . =  __rpi_load_addr;
-+    /* Add the load address as an offset. Makes virt-to-phys translation easier for the human eye */
-+    . =  __kernel_virt_start_addr + __rpi_load_addr;
+-    . =  __rpi_phys_dram_start_addr;
++    . =  __kernel_virt_start_addr;
+
+-    /***********************************************************************************************
+-    * Boot Core Stack
+-    ***********************************************************************************************/
+-    .boot_core_stack (NOLOAD) :
+-    {
+-        __boot_core_stack_start = .;         /*   ^             */
+-                                             /*   | stack       */
+-        . += __rpi_phys_binary_load_addr;    /*   | growth      */
+-                                             /*   | direction   */
+-        __boot_core_stack_end_exclusive = .; /*   |             */
+-    } :segment_boot_core_stack
+-
+-    ASSERT((. & PAGE_MASK) == 0, "End of boot core stack is not page aligned")
++    ASSERT((. & PAGE_MASK) == 0, "Start of address space is not page aligned")
 
      /***********************************************************************************************
      * Code + RO Data + Global Offset Table
      ***********************************************************************************************/
-     __rx_start = .;
+     __code_start = .;
 -    .text :
-+    .text : AT(__rpi_load_addr)
++    .text : AT(__rpi_phys_binary_load_addr)
      {
          KEEP(*(.text._start))
          *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
+@@ -93,4 +88,23 @@
+     __mmio_remap_end_exclusive = .;
+
+     ASSERT((. & PAGE_MASK) == 0, "MMIO remap reservation is not page aligned")
++
++    /***********************************************************************************************
++    * Guard Page
++    ***********************************************************************************************/
++    . += PAGE_SIZE;
++
++    /***********************************************************************************************
++    * Boot Core Stack
++    ***********************************************************************************************/
++    .boot_core_stack (NOLOAD) : AT(__rpi_phys_dram_start_addr)
++    {
++        __boot_core_stack_start = .;         /*   ^             */
++                                             /*   | stack       */
++        . += __rpi_phys_binary_load_addr;    /*   | growth      */
++                                             /*   | direction   */
++        __boot_core_stack_end_exclusive = .; /*   |             */
++    } :segment_boot_core_stack
++
++    ASSERT((. & PAGE_MASK) == 0, "End of boot core stack is not page aligned")
+ }
 
 diff -uNr 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs
 --- 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs
 +++ 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs
-@@ -22,7 +22,7 @@
+@@ -20,7 +20,7 @@
  //--------------------------------------------------------------------------------------------------
 
  type KernelTranslationTable =
@@ -585,11 +731,75 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu
 
  //--------------------------------------------------------------------------------------------------
  // Public Definitions
+@@ -152,14 +152,6 @@
+ /// `translation table tool` and patched into the kernel binary. This function just adds the mapping
+ /// record entries.
+ pub fn kernel_add_mapping_records_for_precomputed() {
+-    let virt_boot_core_stack_region = virt_boot_core_stack_region();
+-    generic_mmu::kernel_add_mapping_record(
+-        "Kernel boot-core stack",
+-        &virt_boot_core_stack_region,
+-        &kernel_virt_to_phys_region(virt_boot_core_stack_region),
+-        &kernel_page_attributes(virt_boot_core_stack_region.start_page_addr()),
+-    );
+-
+     let virt_code_region = virt_code_region();
+     generic_mmu::kernel_add_mapping_record(
+         "Kernel code and RO data",
+@@ -175,4 +167,12 @@
+         &kernel_virt_to_phys_region(virt_data_region),
+         &kernel_page_attributes(virt_data_region.start_page_addr()),
+     );
++
++    let virt_boot_core_stack_region = virt_boot_core_stack_region();
++    generic_mmu::kernel_add_mapping_record(
++        "Kernel boot-core stack",
++        &virt_boot_core_stack_region,
++        &kernel_virt_to_phys_region(virt_boot_core_stack_region),
++        &kernel_page_attributes(virt_boot_core_stack_region.start_page_addr()),
++    );
+ }
+
+diff -uNr 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory.rs 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory.rs
+--- 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory.rs
++++ 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory.rs
+@@ -37,13 +37,7 @@
+ //! The virtual memory layout is as follows:
+ //!
+ //! +---------------------------------------+
+-//! |                                       | boot_core_stack_start @ 0x0
+-//! |                                       |                                ^
+-//! | Boot-core Stack                       |                                | stack
+-//! |                                       |                                | growth
+-//! |                                       |                                | direction
+-//! +---------------------------------------+
+-//! |                                       | code_start @ 0x8_0000 == boot_core_stack_end_exclusive
++//! |                                       | code_start @ __kernel_virt_start_addr
+ //! | .text                                 |
+ //! | .rodata                               |
+ //! | .got                                  |
+@@ -59,6 +53,16 @@
+ //! |                                       |
+ //! +---------------------------------------+
+ //! |                                       |  mmio_remap_end_exclusive
++//! | Unmapped guard page                   |
++//! |                                       |
++//! +---------------------------------------+
++//! |                                       | boot_core_stack_start
++//! |                                       |                                ^
++//! | Boot-core Stack                       |                                | stack
++//! |                                       |                                | growth
++//! |                                       |                                | direction
++//! +---------------------------------------+
++//! |                                       | boot_core_stack_end_exclusive
+ //! |                                       |
+ pub mod mmu;
+
 
 diff -uNr 15_virtual_mem_part3_precomputed_tables/src/lib.rs 16_virtual_mem_part4_higher_half_kernel/src/lib.rs
 --- 15_virtual_mem_part3_precomputed_tables/src/lib.rs
 +++ 16_virtual_mem_part4_higher_half_kernel/src/lib.rs
-@@ -152,11 +152,6 @@
+@@ -153,11 +153,6 @@
      )
  }
 
@@ -602,10 +812,52 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/lib.rs 16_virtual_mem_part
  // Testing
  //--------------------------------------------------------------------------------------------------
 
+diff -uNr 15_virtual_mem_part3_precomputed_tables/src/memory/mmu/translation_table.rs 16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/translation_table.rs
+--- 15_virtual_mem_part3_precomputed_tables/src/memory/mmu/translation_table.rs
++++ 16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/translation_table.rs
+@@ -99,9 +99,9 @@
+
+         assert!(tables.init().is_ok());
+
+-        let virt_start_page_addr: PageAddress<Virtual> = PageAddress::from(0);
+-        let virt_end_exclusive_page_addr: PageAddress<Virtual> =
+-            virt_start_page_addr.checked_offset(5).unwrap();
++        let virt_end_exclusive_page_addr: PageAddress<Virtual> = PageAddress::MAX;
++        let virt_start_page_addr: PageAddress<Virtual> =
++            virt_end_exclusive_page_addr.checked_offset(-5).unwrap();
+
+         let phys_start_page_addr: PageAddress<Physical> = PageAddress::from(0);
+         let phys_end_exclusive_page_addr: PageAddress<Physical> =
+@@ -124,7 +124,7 @@
+         );
+
+         assert_eq!(
+-            tables.try_page_attributes(virt_start_page_addr.checked_offset(6).unwrap()),
++            tables.try_page_attributes(virt_start_page_addr.checked_offset(-1).unwrap()),
+             Err("Page marked invalid")
+         );
+
+
+diff -uNr 15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs 16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/types.rs
+--- 15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs
++++ 16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/types.rs
+@@ -67,6 +67,11 @@
+ // PageAddress
+ //------------------------------------------------------------------------------
+ impl<ATYPE: AddressType> PageAddress<ATYPE> {
++    /// The largest value that can be represented by this type.
++    pub const MAX: Self = PageAddress {
++        inner: Address::new(usize::MAX).align_down_page(),
++    };
++
+     /// Unwraps the value.
+     pub fn into_inner(self) -> Address<ATYPE> {
+         self.inner
+
 diff -uNr 15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs 16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs
 --- 15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs
 +++ 16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs
-@@ -64,6 +64,11 @@
+@@ -66,6 +66,11 @@
  pub trait AssociatedTranslationTable {
      /// A translation table whose address range is:
      ///
@@ -621,7 +873,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs 16_virtual_m
 diff -uNr 15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs 16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs
 --- 15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs
 +++ 16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs
-@@ -27,8 +27,8 @@
+@@ -28,8 +28,8 @@
      // This line will be printed as the test header.
      println!("Testing synchronous exception handling by causing a page fault");
 
@@ -633,16 +885,38 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_f
 
      // If execution reaches here, the memory access above did not cause a page fault exception.
 
+diff -uNr 15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb 16_virtual_mem_part4_higher_half_kernel/translation_table_tool/arch.rb
+--- 15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb
++++ 16_virtual_mem_part4_higher_half_kernel/translation_table_tool/arch.rb
+@@ -255,6 +255,8 @@
+     end
+
+     def lvl2_lvl3_index_from(addr)
++        addr -= BSP.kernel_virt_start_addr
++
+         lvl2_index = addr >> Granule512MiB::SHIFT
+         lvl3_index = (addr & Granule512MiB::MASK) >> Granule64KiB::SHIFT
+
+
 diff -uNr 15_virtual_mem_part3_precomputed_tables/translation_table_tool/bsp.rb 16_virtual_mem_part4_higher_half_kernel/translation_table_tool/bsp.rb
 --- 15_virtual_mem_part3_precomputed_tables/translation_table_tool/bsp.rb
 +++ 16_virtual_mem_part4_higher_half_kernel/translation_table_tool/bsp.rb
-@@ -31,7 +31,7 @@
-
-         symbols = `#{NM_BINARY} --demangle #{kernel_elf}`.split("\n")
-         @kernel_virt_addr_space_size = parse_from_symbols(symbols, /__kernel_virt_addr_space_size/)
--        @kernel_virt_start_addr = 0
-+        @kernel_virt_start_addr = parse_from_symbols(symbols, /__kernel_virt_start_addr/)
-         @virt_addresses = parse_from_symbols(symbols, @virt_addresses)
-         @phys_addresses = virt_to_phys(@virt_addresses)
+@@ -6,7 +6,7 @@
+
+ # Raspberry Pi 3 + 4
+ class RaspberryPi
+-    attr_reader :kernel_granule, :kernel_virt_addr_space_size
++    attr_reader :kernel_granule, :kernel_virt_addr_space_size, :kernel_virt_start_addr
+
+     MEMORY_SRC = File.read('src/bsp/raspberrypi/memory.rs').split("\n")
+
+@@ -14,6 +14,7 @@
+         @kernel_granule = Granule64KiB
+
+         @kernel_virt_addr_space_size = KERNEL_ELF.symbol_value('__kernel_virt_addr_space_size')
++        @kernel_virt_start_addr = KERNEL_ELF.symbol_value('__kernel_virt_start_addr')
+
+         @virt_addr_of_kernel_tables = KERNEL_ELF.symbol_value('KERNEL_TABLES')
+         @virt_addr_of_phys_kernel_tables_base_addr = KERNEL_ELF.symbol_value(
 
 ```
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs
index 176c628a3..96a5bbb37 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs
@@ -11,8 +11,7 @@
 //!
 //! crate::cpu::boot::arch_boot
 
-use crate::{cpu, memory, memory::Address};
-use core::intrinsics::unlikely;
+use crate::{memory, memory::Address};
 use cortex_a::{asm, registers::*};
 use tock_registers::interfaces::Writeable;
 
@@ -87,9 +86,7 @@ pub unsafe extern "C" fn _start_rust(
 
     // Turn on the MMU for EL1.
     let addr = Address::new(phys_kernel_tables_base_addr as usize);
-    if unlikely(memory::mmu::enable_mmu_and_caching(addr).is_err()) {
-        cpu::wait_forever();
-    }
+    memory::mmu::enable_mmu_and_caching(addr).unwrap();
 
     // Use `eret` to "return" to EL1. Since virtual memory will already be enabled, this results in
     // execution of kernel_init() in EL1 from its _virtual address_.
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu.rs
index 84191af9f..e12a47d4e 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu.rs
@@ -133,7 +133,7 @@ impl memory::mmu::interface::MMU for MemoryManagementUnit {
         self.set_up_mair();
 
         // Set the "Translation Table Base Register".
-        TTBR1_EL1.set_baddr(phys_tables_base_addr.into_usize() as u64);
+        TTBR1_EL1.set_baddr(phys_tables_base_addr.as_usize() as u64);
 
         self.configure_translation_control();
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
index 1148ccd8f..b333abe64 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -14,11 +14,12 @@
 //! crate::memory::mmu::translation_table::arch_translation_table
 
 use crate::{
-    bsp, memory,
+    bsp,
     memory::{
+        self,
         mmu::{
             arch_mmu::{Granule512MiB, Granule64KiB},
-            AccessPermissions, AttributeFields, MemAttributes, Page, PageSliceDescriptor,
+            AccessPermissions, AttributeFields, MemAttributes, MemoryRegion, PageAddress,
         },
         Address, Physical, Virtual,
     },
@@ -142,9 +143,6 @@ pub struct FixedSizeTranslationTable<const NUM_TABLES: usize, const START_FROM_T
     /// Table descriptors, covering 512 MiB windows.
     lvl2: [TableDescriptor; NUM_TABLES],
 
-    /// Index of the next free MMIO page.
-    cur_l3_mmio_index: usize,
-
     /// Have the tables been initialized?
     initialized: bool,
 }
@@ -171,7 +169,7 @@ impl TableDescriptor {
     pub fn from_next_lvl_table_addr(phys_next_lvl_table_addr: Address<Physical>) -> Self {
         let val = InMemoryRegister::<u64, STAGE1_TABLE_DESCRIPTOR::Register>::new(0);
 
-        let shifted = phys_next_lvl_table_addr.into_usize() >> Granule64KiB::SHIFT;
+        let shifted = phys_next_lvl_table_addr.as_usize() >> Granule64KiB::SHIFT;
         val.write(
             STAGE1_TABLE_DESCRIPTOR::NEXT_LEVEL_TABLE_ADDR_64KiB.val(shifted as u64)
                 + STAGE1_TABLE_DESCRIPTOR::TYPE::Table
@@ -257,15 +255,15 @@ impl PageDescriptor {
     }
 
     /// Create an instance.
-    pub fn from_output_page_ptr(
-        phys_output_page_ptr: *const Page<Physical>,
+    pub fn from_output_page_addr(
+        phys_output_page_addr: PageAddress<Physical>,
         attribute_fields: &AttributeFields,
     ) -> Self {
         let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
 
-        let shifted = phys_output_page_ptr as u64 >> Granule64KiB::SHIFT;
+        let shifted = phys_output_page_addr.into_inner().as_usize() >> Granule64KiB::SHIFT;
         val.write(
-            STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted)
+            STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted as u64)
                 + STAGE1_PAGE_DESCRIPTOR::AF::True
                 + STAGE1_PAGE_DESCRIPTOR::TYPE::Page
                 + STAGE1_PAGE_DESCRIPTOR::VALID::True
@@ -282,12 +280,11 @@ impl PageDescriptor {
     }
 
     /// Returns the output page.
-    fn output_page_ptr(&self) -> *const Page<Physical> {
+    fn output_page_addr(&self) -> PageAddress<Physical> {
         let shifted = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(self.value)
-            .read(STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB);
-        let addr = shifted << Granule64KiB::SHIFT;
+            .read(STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB) as usize;
 
-        addr as *const Page<Physical>
+        PageAddress::from(shifted << Granule64KiB::SHIFT)
     }
 
     /// Returns the attributes.
@@ -315,10 +312,6 @@ where
 impl<const NUM_TABLES: usize, const START_FROM_TOP: bool>
     FixedSizeTranslationTable<NUM_TABLES, START_FROM_TOP>
 {
-    // Reserve the last 256 MiB of the address space for MMIO mappings.
-    const L2_MMIO_START_INDEX: usize = NUM_TABLES - 1;
-    const L3_MMIO_START_INDEX: usize = 8192 / 2;
-
     const START_FROM_TOP_OFFSET: Address<Virtual> =
         Address::new((usize::MAX - (Granule512MiB::SIZE * NUM_TABLES)) + 1);
 
@@ -333,7 +326,6 @@ impl<const NUM_TABLES: usize, const START_FROM_TOP: bool>
         Self {
             lvl3: [[PageDescriptor::new_zeroed(); 8192]; NUM_TABLES],
             lvl2: [TableDescriptor::new_zeroed(); NUM_TABLES],
-            cur_l3_mmio_index: Self::L3_MMIO_START_INDEX,
             initialized: for_precompute,
         }
     }
@@ -347,51 +339,20 @@ impl<const NUM_TABLES: usize, const START_FROM_TOP: bool>
         Self::_new(false)
     }
 
-    /// The start address of the table's MMIO range.
-    #[inline(always)]
-    fn mmio_start_addr(&self) -> Address<Virtual> {
-        let mut addr = Address::new(
-            (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
-                | (Self::L3_MMIO_START_INDEX << Granule64KiB::SHIFT),
-        );
-
-        if START_FROM_TOP {
-            addr += Self::START_FROM_TOP_OFFSET;
-        }
-
-        addr
-    }
-
-    /// The inclusive end address of the table's MMIO range.
-    #[inline(always)]
-    fn mmio_end_addr_inclusive(&self) -> Address<Virtual> {
-        let mut addr = Address::new(
-            (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
-                | (8191 << Granule64KiB::SHIFT)
-                | (Granule64KiB::SIZE - 1),
-        );
-
-        if START_FROM_TOP {
-            addr += Self::START_FROM_TOP_OFFSET;
-        }
-
-        addr
-    }
-
     /// Helper to calculate the lvl2 and lvl3 indices from an address.
     #[inline(always)]
-    fn lvl2_lvl3_index_from_page_ptr(
+    fn lvl2_lvl3_index_from_page_addr(
         &self,
-        virt_page_ptr: *const Page<Virtual>,
+        virt_page_addr: PageAddress<Virtual>,
     ) -> Result<(usize, usize), &'static str> {
-        let mut addr = virt_page_ptr as usize;
+        let mut addr = virt_page_addr.into_inner();
 
         if START_FROM_TOP {
-            addr -= Self::START_FROM_TOP_OFFSET.into_usize()
+            addr = addr - Self::START_FROM_TOP_OFFSET;
         }
 
-        let lvl2_index = addr >> Granule512MiB::SHIFT;
-        let lvl3_index = (addr & Granule512MiB::MASK) >> Granule64KiB::SHIFT;
+        let lvl2_index = addr.as_usize() >> Granule512MiB::SHIFT;
+        let lvl3_index = (addr.as_usize() & Granule512MiB::MASK) >> Granule64KiB::SHIFT;
 
         if lvl2_index > (NUM_TABLES - 1) {
             return Err("Virtual page is out of bounds of translation table");
@@ -402,11 +363,11 @@ impl<const NUM_TABLES: usize, const START_FROM_TOP: bool>
 
     /// Returns the PageDescriptor corresponding to the supplied page address.
     #[inline(always)]
-    fn page_descriptor_from_page_ptr(
+    fn page_descriptor_from_page_addr(
         &self,
-        virt_page_ptr: *const Page<Virtual>,
+        virt_page_addr: PageAddress<Virtual>,
     ) -> Result<&PageDescriptor, &'static str> {
-        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page_ptr(virt_page_ptr)?;
+        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page_addr(virt_page_addr)?;
         let desc = &self.lvl3[lvl2_index][lvl3_index];
 
         Ok(desc)
@@ -416,12 +377,12 @@ impl<const NUM_TABLES: usize, const START_FROM_TOP: bool>
     ///
     /// Doesn't allow overriding an already valid page.
     #[inline(always)]
-    fn set_page_descriptor_from_page_ptr(
+    fn set_page_descriptor_from_page_addr(
         &mut self,
-        virt_page_ptr: *const Page<Virtual>,
+        virt_page_addr: PageAddress<Virtual>,
         new_desc: &PageDescriptor,
     ) -> Result<(), &'static str> {
-        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page_ptr(virt_page_ptr)?;
+        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page_addr(virt_page_addr)?;
         let desc = &mut self.lvl3[lvl2_index][lvl3_index];
 
         if desc.is_valid() {
@@ -455,105 +416,57 @@ impl<const NUM_TABLES: usize, const START_FROM_TOP: bool>
             *lvl2_entry = new_desc;
         }
 
-        self.cur_l3_mmio_index = Self::L3_MMIO_START_INDEX;
         self.initialized = true;
 
         Ok(())
     }
 
-    unsafe fn map_pages_at(
+    unsafe fn map_at(
         &mut self,
-        virt_pages: &PageSliceDescriptor<Virtual>,
-        phys_pages: &PageSliceDescriptor<Physical>,
+        virt_region: &MemoryRegion<Virtual>,
+        phys_region: &MemoryRegion<Physical>,
         attr: &AttributeFields,
     ) -> Result<(), &'static str> {
         assert!(self.initialized, "Translation tables not initialized");
 
-        let v = virt_pages.as_slice();
-        let p = phys_pages.as_slice();
-
-        // No work to do for empty slices.
-        if v.is_empty() {
-            return Ok(());
-        }
-
-        if v.len() != p.len() {
-            return Err("Tried to map page slices with unequal sizes");
+        if virt_region.size() != phys_region.size() {
+            return Err("Tried to map memory regions with unequal sizes");
         }
 
-        if p.last().unwrap().as_ptr() >= bsp::memory::mmu::phys_addr_space_end_page_ptr() {
+        if phys_region.end_exclusive_page_addr() > bsp::memory::phys_addr_space_end_exclusive_addr()
+        {
             return Err("Tried to map outside of physical address space");
         }
 
-        let iter = p.iter().zip(v.iter());
-        for (phys_page, virt_page) in iter {
-            let new_desc = PageDescriptor::from_output_page_ptr(phys_page.as_ptr(), attr);
-            let virt_page = virt_page.as_ptr();
+        let iter = phys_region.into_iter().zip(virt_region.into_iter());
+        for (phys_page_addr, virt_page_addr) in iter {
+            let new_desc = PageDescriptor::from_output_page_addr(phys_page_addr, attr);
+            let virt_page = virt_page_addr;
 
-            self.set_page_descriptor_from_page_ptr(virt_page, &new_desc)?;
+            self.set_page_descriptor_from_page_addr(virt_page, &new_desc)?;
         }
 
         Ok(())
     }
 
-    fn next_mmio_virt_page_slice(
-        &mut self,
-        num_pages: usize,
-    ) -> Result<PageSliceDescriptor<Virtual>, &'static str> {
-        assert!(self.initialized, "Translation tables not initialized");
-
-        if num_pages == 0 {
-            return Err("num_pages == 0");
-        }
-
-        if (self.cur_l3_mmio_index + num_pages) > 8191 {
-            return Err("Not enough MMIO space left");
-        }
-
-        let mut addr = Address::new(
-            (Self::L2_MMIO_START_INDEX << Granule512MiB::SHIFT)
-                | (self.cur_l3_mmio_index << Granule64KiB::SHIFT),
-        );
-        self.cur_l3_mmio_index += num_pages;
-
-        if START_FROM_TOP {
-            addr += Self::START_FROM_TOP_OFFSET;
-        }
-
-        Ok(PageSliceDescriptor::from_addr(addr, num_pages))
-    }
-
-    fn is_virt_page_slice_mmio(&self, virt_pages: &PageSliceDescriptor<Virtual>) -> bool {
-        let start_addr = virt_pages.start_addr();
-        let end_addr_inclusive = virt_pages.end_addr_inclusive();
-
-        for i in [start_addr, end_addr_inclusive].iter() {
-            if (*i >= self.mmio_start_addr()) && (*i <= self.mmio_end_addr_inclusive()) {
-                return true;
-            }
-        }
-
-        false
-    }
-
-    fn try_virt_page_ptr_to_phys_page_ptr(
+    fn try_virt_page_addr_to_phys_page_addr(
         &self,
-        virt_page_ptr: *const Page<Virtual>,
-    ) -> Result<*const Page<Physical>, &'static str> {
-        let page_desc = self.page_descriptor_from_page_ptr(virt_page_ptr)?;
+        virt_page_addr: PageAddress<Virtual>,
+    ) -> Result<PageAddress<Physical>, &'static str> {
+        let page_desc = self.page_descriptor_from_page_addr(virt_page_addr)?;
 
         if !page_desc.is_valid() {
             return Err("Page marked invalid");
         }
 
-        Ok(page_desc.output_page_ptr())
+        Ok(page_desc.output_page_addr())
     }
 
     fn try_page_attributes(
         &self,
-        virt_page_ptr: *const Page<Virtual>,
+        virt_page_addr: PageAddress<Virtual>,
     ) -> Result<AttributeFields, &'static str> {
-        let page_desc = self.page_descriptor_from_page_ptr(virt_page_ptr)?;
+        let page_desc = self.page_descriptor_from_page_addr(virt_page_addr)?;
 
         if !page_desc.is_valid() {
             return Err("Page marked invalid");
@@ -569,9 +482,10 @@ impl<const NUM_TABLES: usize, const START_FROM_TOP: bool>
         &self,
         virt_addr: Address<Virtual>,
     ) -> Result<Address<Physical>, &'static str> {
-        let page = self.try_virt_page_ptr_to_phys_page_ptr(virt_addr.as_page_ptr())?;
+        let virt_page = PageAddress::from(virt_addr.align_down_page());
+        let phys_page = self.try_virt_page_addr_to_phys_page_addr(virt_page)?;
 
-        Ok(Address::new(page as usize + virt_addr.offset_into_page()))
+        Ok(phys_page.into_inner() + virt_addr.offset_into_page())
     }
 }
 
@@ -580,7 +494,7 @@ impl<const NUM_TABLES: usize, const START_FROM_TOP: bool>
 //--------------------------------------------------------------------------------------------------
 
 #[cfg(test)]
-pub type MinSizeTranslationTable = FixedSizeTranslationTable<1, false>;
+pub type MinSizeTranslationTable = FixedSizeTranslationTable<1, true>;
 
 #[cfg(test)]
 mod tests {
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2.rs
index 51c321868..3f69bd113 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2.rs
@@ -133,8 +133,8 @@ impl GICv2 {
         Self {
             gicd_mmio_descriptor,
             gicc_mmio_descriptor,
-            gicd: gicd::GICD::new(gicd_mmio_descriptor.start_addr().into_usize()),
-            gicc: gicc::GICC::new(gicc_mmio_descriptor.start_addr().into_usize()),
+            gicd: gicd::GICD::new(gicd_mmio_descriptor.start_addr().as_usize()),
+            gicc: gicc::GICC::new(gicc_mmio_descriptor.start_addr().as_usize()),
             is_mmio_remapped: AtomicBool::new(false),
             handler_table: InitStateLock::new([None; Self::NUM_IRQS]),
         }
@@ -158,11 +158,11 @@ impl driver::interface::DeviceDriver for GICv2 {
 
             // GICD
             virt_addr = memory::mmu::kernel_map_mmio("GICD", &self.gicd_mmio_descriptor)?;
-            self.gicd.set_mmio(virt_addr.into_usize());
+            self.gicd.set_mmio(virt_addr.as_usize());
 
             // GICC
             virt_addr = memory::mmu::kernel_map_mmio("GICC", &self.gicc_mmio_descriptor)?;
-            self.gicc.set_mmio(virt_addr.into_usize());
+            self.gicc.set_mmio(virt_addr.as_usize());
 
             // Conclude remapping.
             self.is_mmio_remapped.store(true, Ordering::Relaxed);
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 9bdc73f8a..bc96a1290 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -215,7 +215,7 @@ impl GPIO {
         Self {
             mmio_descriptor,
             virt_mmio_start_addr: AtomicUsize::new(0),
-            inner: IRQSafeNullLock::new(GPIOInner::new(mmio_descriptor.start_addr().into_usize())),
+            inner: IRQSafeNullLock::new(GPIOInner::new(mmio_descriptor.start_addr().as_usize())),
         }
     }
 
@@ -239,10 +239,10 @@ impl driver::interface::DeviceDriver for GPIO {
         let virt_addr = memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?;
 
         self.inner
-            .lock(|inner| inner.init(Some(virt_addr.into_usize())))?;
+            .lock(|inner| inner.init(Some(virt_addr.as_usize())))?;
 
         self.virt_mmio_start_addr
-            .store(virt_addr.into_usize(), Ordering::Relaxed);
+            .store(virt_addr.as_usize(), Ordering::Relaxed);
 
         Ok(())
     }
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index 5934e6dd1..a197adfcf 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -78,7 +78,7 @@ impl PeripheralIC {
     ///
     /// - The user must ensure to provide correct MMIO descriptors.
     pub const unsafe fn new(mmio_descriptor: memory::mmu::MMIODescriptor) -> Self {
-        let addr = mmio_descriptor.start_addr().into_usize();
+        let addr = mmio_descriptor.start_addr().as_usize();
 
         Self {
             mmio_descriptor,
@@ -111,7 +111,7 @@ impl driver::interface::DeviceDriver for PeripheralIC {
 
     unsafe fn init(&self) -> Result<(), &'static str> {
         let virt_addr =
-            memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?.into_usize();
+            memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?.as_usize();
 
         self.wo_registers
             .lock(|regs| *regs = WriteOnlyRegisters::new(virt_addr));
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 83a984b8c..9d58d9ea2 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -414,7 +414,7 @@ impl PL011Uart {
             mmio_descriptor,
             virt_mmio_start_addr: AtomicUsize::new(0),
             inner: IRQSafeNullLock::new(PL011UartInner::new(
-                mmio_descriptor.start_addr().into_usize(),
+                mmio_descriptor.start_addr().as_usize(),
             )),
             irq_number,
         }
@@ -435,10 +435,10 @@ impl driver::interface::DeviceDriver for PL011Uart {
         let virt_addr = memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?;
 
         self.inner
-            .lock(|inner| inner.init(Some(virt_addr.into_usize())))?;
+            .lock(|inner| inner.init(Some(virt_addr.as_usize())))?;
 
         self.virt_mmio_start_addr
-            .store(virt_addr.into_usize(), Ordering::Relaxed);
+            .store(virt_addr.as_usize(), Ordering::Relaxed);
 
         Ok(())
     }
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/console.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/console.rs
index e16b3a3d6..16dc2d3b3 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/console.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/console.rs
@@ -4,7 +4,6 @@
 
 //! BSP console facilities.
 
-use super::memory;
 use crate::{bsp::device_driver, console, cpu, driver};
 use core::fmt;
 
@@ -26,21 +25,27 @@ use core::fmt;
 pub unsafe fn panic_console_out() -> impl fmt::Write {
     use driver::interface::DeviceDriver;
 
-    let mut panic_gpio = device_driver::PanicGPIO::new(memory::map::mmio::GPIO_START.into_usize());
-    let mut panic_uart =
-        device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START.into_usize());
+    // If remapping of the driver's MMIO hasn't already happened, we won't be able to print. Just
+    // park the CPU core in this case.
+    let gpio_mmio_start_addr = match super::GPIO.virt_mmio_start_addr() {
+        None => cpu::wait_forever(),
+        Some(x) => x,
+    };
 
-    // If remapping of the driver's MMIO already happened, take the remapped start address.
-    // Otherwise, take a chance with the default physical address.
-    let maybe_gpio_mmio_start_addr = super::GPIO.virt_mmio_start_addr();
-    let maybe_uart_mmio_start_addr = super::PL011_UART.virt_mmio_start_addr();
+    let uart_mmio_start_addr = match super::PL011_UART.virt_mmio_start_addr() {
+        None => cpu::wait_forever(),
+        Some(x) => x,
+    };
+
+    let mut panic_gpio = device_driver::PanicGPIO::new(gpio_mmio_start_addr);
+    let mut panic_uart = device_driver::PanicUart::new(uart_mmio_start_addr);
 
     panic_gpio
-        .init(maybe_gpio_mmio_start_addr)
+        .init(None)
         .unwrap_or_else(|_| cpu::wait_forever());
     panic_gpio.map_pl011_uart();
     panic_uart
-        .init(maybe_uart_mmio_start_addr)
+        .init(None)
         .unwrap_or_else(|_| cpu::wait_forever());
 
     panic_uart
@@ -51,13 +56,14 @@ pub unsafe fn panic_console_out() -> impl fmt::Write {
 pub unsafe fn panic_console_out() -> impl fmt::Write {
     use driver::interface::DeviceDriver;
 
-    let mut panic_uart =
-        device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START.into_usize());
-
-    let maybe_uart_mmio_start_addr = super::PL011_UART.virt_mmio_start_addr();
+    let uart_mmio_start_addr = match super::PL011_UART.virt_mmio_start_addr() {
+        None => cpu::wait_forever(),
+        Some(x) => x,
+    };
+    let mut panic_uart = device_driver::PanicUart::new(uart_mmio_start_addr);
 
     panic_uart
-        .init(maybe_uart_mmio_start_addr)
+        .init(None)
         .unwrap_or_else(|_| cpu::qemu_exit_failure());
 
     panic_uart
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
index 0d46f9d97..c5d58c30a 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
@@ -1 +1 @@
-__kernel_virt_addr_space_size = 2 * 1024 * 1024 * 1024
+__kernel_virt_addr_space_size = 1024 * 1024 * 1024
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/link.ld b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/link.ld
index f12fa29fb..9e07f8d7e 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/link.ld
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/link.ld
@@ -3,81 +3,108 @@
  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
-/* This file provides __kernel_virt_addr_space_size */
 INCLUDE src/bsp/raspberrypi/kernel_virt_addr_space_size.ld;
 
+PAGE_SIZE = 64K;
+PAGE_MASK = PAGE_SIZE - 1;
+
 /* The kernel's virtual address range will be:
  *
  * [END_ADDRESS_INCLUSIVE, START_ADDRESS]
  * [u64::MAX             , (u64::MAX - __kernel_virt_addr_space_size) + 1]
- *
- * Since the start address is needed to set the linker address below, calculate it now.
  */
 __kernel_virt_start_addr = ((0xffffffffffffffff - __kernel_virt_addr_space_size) + 1);
 
-/* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
-__rpi_load_addr = 0x80000;
+__rpi_phys_dram_start_addr = 0;
+
+/* The physical address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_phys_binary_load_addr = 0x80000;
+
 
-ENTRY(__rpi_load_addr)
+ENTRY(__rpi_phys_binary_load_addr)
 
+/* Flags:
+ *     4 == R
+ *     5 == RX
+ *     6 == RW
+ *
+ * Segments are marked PT_LOAD below so that the ELF file provides virtual and physical addresses.
+ * It doesn't mean all of them need actually be loaded.
+ */
 PHDRS
 {
-    segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
-    segment_rw PT_LOAD FLAGS(6); /* 6 == RW */
+    segment_code            PT_LOAD FLAGS(5);
+    segment_data            PT_LOAD FLAGS(6);
+    segment_boot_core_stack PT_LOAD FLAGS(6);
 }
 
 SECTIONS
 {
-    /* Add the load address as an offset. Makes virt-to-phys translation easier for the human eye */
-    . =  __kernel_virt_start_addr + __rpi_load_addr;
+    . =  __kernel_virt_start_addr;
+
+    ASSERT((. & PAGE_MASK) == 0, "Start of address space is not page aligned")
 
     /***********************************************************************************************
     * Code + RO Data + Global Offset Table
     ***********************************************************************************************/
-    __rx_start = .;
-    .text : AT(__rpi_load_addr)
+    __code_start = .;
+    .text : AT(__rpi_phys_binary_load_addr)
     {
         KEEP(*(.text._start))
         *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
         *(.text._start_rust)      /* The Rust entry point */
         *(.text*)                 /* Everything else */
-    } :segment_rx
+    } :segment_code
 
-    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
-    .got    : ALIGN(8) { *(.got)     } :segment_rx
+    .rodata : ALIGN(8) { *(.rodata*) } :segment_code
+    .got    : ALIGN(8) { *(.got)     } :segment_code
 
-    . = ALIGN(64K); /* Align to page boundary */
-    __rx_end_exclusive = .;
+    . = ALIGN(PAGE_SIZE);
+    __code_end_exclusive = .;
 
     /***********************************************************************************************
     * Data + BSS
     ***********************************************************************************************/
-    __rw_start = .;
-    .data : { *(.data*) } :segment_rw
+    __data_start = .;
+    .data : { *(.data*) } :segment_data
 
     /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
-    .bss : ALIGN(16)
+    .bss (NOLOAD) : ALIGN(16)
     {
         __bss_start = .;
         *(.bss*);
         . = ALIGN(16);
         __bss_end_exclusive = .;
-    } :NONE
+    } :segment_data
 
-    . = ALIGN(64K); /* Align to page boundary */
-    __rw_end_exclusive = .;
+    . = ALIGN(PAGE_SIZE);
+    __data_end_exclusive = .;
 
     /***********************************************************************************************
-    * Guard Page between boot core stack and data
+    * MMIO Remap Reserved
     ***********************************************************************************************/
-    . += 64K;
+    __mmio_remap_start = .;
+    . += 8 * 1024 * 1024;
+    __mmio_remap_end_exclusive = .;
+
+    ASSERT((. & PAGE_MASK) == 0, "MMIO remap reservation is not page aligned")
+
+    /***********************************************************************************************
+    * Guard Page
+    ***********************************************************************************************/
+    . += PAGE_SIZE;
 
     /***********************************************************************************************
     * Boot Core Stack
     ***********************************************************************************************/
-    __boot_core_stack_start = .;         /*   ^             */
-                                         /*   | stack       */
-    . += 512K;                           /*   | growth      */
-                                         /*   | direction   */
-    __boot_core_stack_end_exclusive = .; /*   |             */
+    .boot_core_stack (NOLOAD) : AT(__rpi_phys_dram_start_addr)
+    {
+        __boot_core_stack_start = .;         /*   ^             */
+                                             /*   | stack       */
+        . += __rpi_phys_binary_load_addr;    /*   | growth      */
+                                             /*   | direction   */
+        __boot_core_stack_end_exclusive = .; /*   |             */
+    } :segment_boot_core_stack
+
+    ASSERT((. & PAGE_MASK) == 0, "End of boot core stack is not page aligned")
 }
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory.rs
index 88dcaf58a..1709ae4da 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory.rs
@@ -4,39 +4,69 @@
 
 //! BSP Memory Management.
 //!
-//! The physical memory layout after the kernel has been loaded by the Raspberry's firmware, which
-//! copies the binary to 0x8_0000:
+//! The physical memory layout.
 //!
-//! +---------------------------------------------+
-//! |                                             |
-//! | Unmapped                                    |
-//! |                                             |
-//! +---------------------------------------------+
-//! |                                             | rx_start @ 0x8_0000
-//! | .text                                       |
-//! | .rodata                                     |
-//! | .got                                        |
-//! |                                             | rx_end_inclusive
-//! +---------------------------------------------+
-//! |                                             | rw_start == rx_end
-//! | .data                                       |
-//! | .bss                                        |
-//! |                                             | rw_end_inclusive
-//! +---------------------------------------------+
-//! |                                             | rw_end
-//! | Unmapped Boot-core Stack Guard Page         |
-//! |                                             |
-//! +---------------------------------------------+
-//! |                                             | boot_core_stack_start          ^
-//! |                                             |                                | stack
-//! | Boot-core Stack                             |                                | growth
-//! |                                             |                                | direction
-//! |                                             | boot_core_stack_end_inclusive  |
-//! +---------------------------------------------+
-
+//! The Raspberry's firmware copies the kernel binary to 0x8_0000. The preceding region will be used
+//! as the boot core's stack.
+//!
+//! +---------------------------------------+
+//! |                                       | boot_core_stack_start @ 0x0
+//! |                                       |                                ^
+//! | Boot-core Stack                       |                                | stack
+//! |                                       |                                | growth
+//! |                                       |                                | direction
+//! +---------------------------------------+
+//! |                                       | code_start @ 0x8_0000 == boot_core_stack_end_exclusive
+//! | .text                                 |
+//! | .rodata                               |
+//! | .got                                  |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       | data_start == code_end_exclusive
+//! | .data                                 |
+//! | .bss                                  |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       | data_end_exclusive
+//! |                                       |
+//!
+//!
+//!
+//!
+//!
+//! The virtual memory layout is as follows:
+//!
+//! +---------------------------------------+
+//! |                                       | code_start @ __kernel_virt_start_addr
+//! | .text                                 |
+//! | .rodata                               |
+//! | .got                                  |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       | data_start == code_end_exclusive
+//! | .data                                 |
+//! | .bss                                  |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       |  mmio_remap_start == data_end_exclusive
+//! | VA region for MMIO remapping          |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       |  mmio_remap_end_exclusive
+//! | Unmapped guard page                   |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       | boot_core_stack_start
+//! |                                       |                                ^
+//! | Boot-core Stack                       |                                | stack
+//! |                                       |                                | growth
+//! |                                       |                                | direction
+//! +---------------------------------------+
+//! |                                       | boot_core_stack_end_exclusive
+//! |                                       |
 pub mod mmu;
 
-use crate::memory::{Address, Physical, Virtual};
+use crate::memory::{mmu::PageAddress, Address, Physical, Virtual};
 use core::cell::UnsafeCell;
 
 //--------------------------------------------------------------------------------------------------
@@ -45,11 +75,14 @@ use core::cell::UnsafeCell;
 
 // Symbols from the linker script.
 extern "Rust" {
-    static __rx_start: UnsafeCell<()>;
-    static __rx_end_exclusive: UnsafeCell<()>;
+    static __code_start: UnsafeCell<()>;
+    static __code_end_exclusive: UnsafeCell<()>;
+
+    static __data_start: UnsafeCell<()>;
+    static __data_end_exclusive: UnsafeCell<()>;
 
-    static __rw_start: UnsafeCell<()>;
-    static __rw_end_exclusive: UnsafeCell<()>;
+    static __mmio_remap_start: UnsafeCell<()>;
+    static __mmio_remap_end_exclusive: UnsafeCell<()>;
 
     static __boot_core_stack_start: UnsafeCell<()>;
     static __boot_core_stack_end_exclusive: UnsafeCell<()>;
@@ -111,46 +144,66 @@ pub(super) mod map {
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-/// Start address of the Read+Execute (RX) range.
+/// Start page address of the code segment.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn virt_code_start() -> PageAddress<Virtual> {
+    PageAddress::from(unsafe { __code_start.get() as usize })
+}
+
+/// Size of the code segment.
 ///
 /// # Safety
 ///
 /// - Value is provided by the linker script and must be trusted as-is.
 #[inline(always)]
-fn virt_rx_start() -> Address<Virtual> {
-    Address::new(unsafe { __rx_start.get() as usize })
+fn code_size() -> usize {
+    unsafe { (__code_end_exclusive.get() as usize) - (__code_start.get() as usize) }
 }
 
-/// Size of the Read+Execute (RX) range.
+/// Start page address of the data segment.
+#[inline(always)]
+fn virt_data_start() -> PageAddress<Virtual> {
+    PageAddress::from(unsafe { __data_start.get() as usize })
+}
+
+/// Size of the data segment.
 ///
 /// # Safety
 ///
 /// - Value is provided by the linker script and must be trusted as-is.
 #[inline(always)]
-fn rx_size() -> usize {
-    unsafe { (__rx_end_exclusive.get() as usize) - (__rx_start.get() as usize) }
+fn data_size() -> usize {
+    unsafe { (__data_end_exclusive.get() as usize) - (__data_start.get() as usize) }
 }
 
-/// Start address of the Read+Write (RW) range.
+/// Start page address of the MMIO remap reservation.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
 #[inline(always)]
-fn virt_rw_start() -> Address<Virtual> {
-    Address::new(unsafe { __rw_start.get() as usize })
+fn virt_mmio_remap_start() -> PageAddress<Virtual> {
+    PageAddress::from(unsafe { __mmio_remap_start.get() as usize })
 }
 
-/// Size of the Read+Write (RW) range.
+/// Size of the MMIO remap reservation.
 ///
 /// # Safety
 ///
 /// - Value is provided by the linker script and must be trusted as-is.
 #[inline(always)]
-fn rw_size() -> usize {
-    unsafe { (__rw_end_exclusive.get() as usize) - (__rw_start.get() as usize) }
+fn mmio_remap_size() -> usize {
+    unsafe { (__mmio_remap_end_exclusive.get() as usize) - (__mmio_remap_start.get() as usize) }
 }
 
-/// Start address of the boot core's stack.
+/// Start page address of the boot core's stack.
 #[inline(always)]
-fn virt_boot_core_stack_start() -> Address<Virtual> {
-    Address::new(unsafe { __boot_core_stack_start.get() as usize })
+fn virt_boot_core_stack_start() -> PageAddress<Virtual> {
+    PageAddress::from(unsafe { __boot_core_stack_start.get() as usize })
 }
 
 /// Size of the boot core's stack.
@@ -161,8 +214,12 @@ fn boot_core_stack_size() -> usize {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
 /// Exclusive end address of the physical address space.
 #[inline(always)]
-fn phys_addr_space_end() -> Address<Physical> {
-    map::END
+pub fn phys_addr_space_end_exclusive_addr() -> PageAddress<Physical> {
+    PageAddress::from(map::END)
 }
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs
index 7ec02cca7..07df4483c 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs
@@ -5,14 +5,12 @@
 //! BSP Memory Management Unit.
 
 use crate::{
-    common,
     memory::{
-        mmu as generic_mmu,
         mmu::{
-            AddressSpace, AssociatedTranslationTable, AttributeFields, Page, PageSliceDescriptor,
-            TranslationGranule,
+            self as generic_mmu, AddressSpace, AssociatedTranslationTable, AttributeFields,
+            MemoryRegion, PageAddress, TranslationGranule,
         },
-        Address, Physical, Virtual,
+        Physical, Virtual,
     },
     synchronization::InitStateLock,
 };
@@ -33,7 +31,7 @@ type KernelTranslationTable =
 pub type KernelGranule = TranslationGranule<{ 64 * 1024 }>;
 
 /// The kernel's virtual address space defined by this BSP.
-pub type KernelVirtAddrSpace = AddressSpace<{ get_virt_addr_space_size() }>;
+pub type KernelVirtAddrSpace = AddressSpace<{ kernel_virt_addr_space_size() }>;
 
 //--------------------------------------------------------------------------------------------------
 // Global instances
@@ -46,6 +44,7 @@ pub type KernelVirtAddrSpace = AddressSpace<{ get_virt_addr_space_size() }>;
 /// That is, `size_of(InitStateLock<KernelTranslationTable>) == size_of(KernelTranslationTable)`.
 /// There is a unit tests that checks this porperty.
 #[link_section = ".data"]
+#[no_mangle]
 static KERNEL_TABLES: InitStateLock<KernelTranslationTable> =
     InitStateLock::new(KernelTranslationTable::new_for_precompute());
 
@@ -64,7 +63,7 @@ static PHYS_KERNEL_TABLES_BASE_ADDR: u64 = 0xCCCCAAAAFFFFEEEE;
 /// This is a hack for retrieving the value for the kernel's virtual address space size as a
 /// constant from a common place, since it is needed as a compile-time/link-time constant in both,
 /// the linker script and the Rust sources.
-const fn get_virt_addr_space_size() -> usize {
+const fn kernel_virt_addr_space_size() -> usize {
     let __kernel_virt_addr_space_size;
 
     include!("../kernel_virt_addr_space_size.ld");
@@ -80,42 +79,52 @@ const fn size_to_num_pages(size: usize) -> usize {
     size >> KernelGranule::SHIFT
 }
 
-/// The Read+Execute (RX) pages of the kernel binary.
-fn virt_rx_page_desc() -> PageSliceDescriptor<Virtual> {
-    let num_pages = size_to_num_pages(super::rx_size());
+/// The code pages of the kernel binary.
+fn virt_code_region() -> MemoryRegion<Virtual> {
+    let num_pages = size_to_num_pages(super::code_size());
+
+    let start_page_addr = super::virt_code_start();
+    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
 
-    PageSliceDescriptor::from_addr(super::virt_rx_start(), num_pages)
+    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
 }
 
-/// The Read+Write (RW) pages of the kernel binary.
-fn virt_rw_page_desc() -> PageSliceDescriptor<Virtual> {
-    let num_pages = size_to_num_pages(super::rw_size());
+/// The data pages of the kernel binary.
+fn virt_data_region() -> MemoryRegion<Virtual> {
+    let num_pages = size_to_num_pages(super::data_size());
 
-    PageSliceDescriptor::from_addr(super::virt_rw_start(), num_pages)
+    let start_page_addr = super::virt_data_start();
+    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
+
+    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
 }
 
-/// The boot core's stack.
-fn virt_boot_core_stack_page_desc() -> PageSliceDescriptor<Virtual> {
+/// The boot core stack pages.
+fn virt_boot_core_stack_region() -> MemoryRegion<Virtual> {
     let num_pages = size_to_num_pages(super::boot_core_stack_size());
 
-    PageSliceDescriptor::from_addr(super::virt_boot_core_stack_start(), num_pages)
+    let start_page_addr = super::virt_boot_core_stack_start();
+    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
+
+    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
 }
 
 // There is no reason to expect the following conversions to fail, since they were generated offline
 // by the `translation table tool`. If it doesn't work, a panic due to the unwraps is justified.
-fn kernel_virt_to_phys_page_slice(
-    virt_slice: PageSliceDescriptor<Virtual>,
-) -> PageSliceDescriptor<Physical> {
-    let phys_first_page =
-        generic_mmu::try_kernel_virt_page_ptr_to_phys_page_ptr(virt_slice.first_page_ptr())
+fn kernel_virt_to_phys_region(virt_region: MemoryRegion<Virtual>) -> MemoryRegion<Physical> {
+    let phys_start_page_addr =
+        generic_mmu::try_kernel_virt_page_addr_to_phys_page_addr(virt_region.start_page_addr())
             .unwrap();
-    let phys_start_addr = Address::new(phys_first_page as usize);
 
-    PageSliceDescriptor::from_addr(phys_start_addr, virt_slice.num_pages())
+    let phys_end_exclusive_page_addr = phys_start_page_addr
+        .checked_offset(virt_region.num_pages() as isize)
+        .unwrap();
+
+    MemoryRegion::new(phys_start_page_addr, phys_end_exclusive_page_addr)
 }
 
-fn kernel_page_attributes(virt_page_ptr: *const Page<Virtual>) -> AttributeFields {
-    generic_mmu::try_kernel_page_attributes(virt_page_ptr).unwrap()
+fn kernel_page_attributes(virt_page_addr: PageAddress<Virtual>) -> AttributeFields {
+    generic_mmu::try_kernel_page_attributes(virt_page_addr).unwrap()
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -127,12 +136,14 @@ pub fn kernel_translation_tables() -> &'static InitStateLock<KernelTranslationTa
     &KERNEL_TABLES
 }
 
-/// Pointer to the last page of the physical address space.
-pub fn phys_addr_space_end_page_ptr() -> *const Page<Physical> {
-    common::align_down(
-        super::phys_addr_space_end().into_usize(),
-        KernelGranule::SIZE,
-    ) as *const Page<_>
+/// The MMIO remap pages.
+pub fn virt_mmio_remap_region() -> MemoryRegion<Virtual> {
+    let num_pages = size_to_num_pages(super::mmio_remap_size());
+
+    let start_page_addr = super::virt_mmio_remap_start();
+    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
+
+    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
 }
 
 /// Add mapping records for the kernel binary.
@@ -141,27 +152,27 @@ pub fn phys_addr_space_end_page_ptr() -> *const Page<Physical> {
 /// `translation table tool` and patched into the kernel binary. This function just adds the mapping
 /// record entries.
 pub fn kernel_add_mapping_records_for_precomputed() {
-    let virt_rx_page_desc = virt_rx_page_desc();
+    let virt_code_region = virt_code_region();
     generic_mmu::kernel_add_mapping_record(
         "Kernel code and RO data",
-        &virt_rx_page_desc,
-        &kernel_virt_to_phys_page_slice(virt_rx_page_desc),
-        &kernel_page_attributes(virt_rx_page_desc.first_page_ptr()),
+        &virt_code_region,
+        &kernel_virt_to_phys_region(virt_code_region),
+        &kernel_page_attributes(virt_code_region.start_page_addr()),
     );
 
-    let virt_rw_page_desc = virt_rw_page_desc();
+    let virt_data_region = virt_data_region();
     generic_mmu::kernel_add_mapping_record(
         "Kernel data and bss",
-        &virt_rw_page_desc,
-        &kernel_virt_to_phys_page_slice(virt_rw_page_desc),
-        &kernel_page_attributes(virt_rw_page_desc.first_page_ptr()),
+        &virt_data_region,
+        &kernel_virt_to_phys_region(virt_data_region),
+        &kernel_page_attributes(virt_data_region.start_page_addr()),
     );
 
-    let virt_boot_core_stack_page_desc = virt_boot_core_stack_page_desc();
+    let virt_boot_core_stack_region = virt_boot_core_stack_region();
     generic_mmu::kernel_add_mapping_record(
         "Kernel boot-core stack",
-        &virt_boot_core_stack_page_desc,
-        &kernel_virt_to_phys_page_slice(virt_boot_core_stack_page_desc),
-        &kernel_page_attributes(virt_boot_core_stack_page_desc.first_page_ptr()),
+        &virt_boot_core_stack_region,
+        &kernel_virt_to_phys_region(virt_boot_core_stack_region),
+        &kernel_page_attributes(virt_boot_core_stack_region.start_page_addr()),
     );
 }
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/common.rs b/16_virtual_mem_part4_higher_half_kernel/src/common.rs
index 71443cfbd..a91ab7a37 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/common.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/common.rs
@@ -19,3 +19,11 @@ pub const fn align_down(value: usize, alignment: usize) -> usize {
 
     value & !(alignment - 1)
 }
+
+/// Align up.
+#[inline(always)]
+pub const fn align_up(value: usize, alignment: usize) -> usize {
+    assert!(alignment.is_power_of_two());
+
+    (value + alignment - 1) & !(alignment - 1)
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/lib.rs b/16_virtual_mem_part4_higher_half_kernel/src/lib.rs
index 31d988d90..f768643aa 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/lib.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/lib.rs
@@ -117,6 +117,7 @@
 #![feature(global_asm)]
 #![feature(linkage)]
 #![feature(panic_info_message)]
+#![feature(step_trait)]
 #![feature(trait_alias)]
 #![no_std]
 // Testing
@@ -177,6 +178,7 @@ pub fn test_runner(tests: &[&test_types::UnitTest]) {
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
     exception::handling_init();
+    memory::mmu::post_enable_init();
     bsp::console::qemu_bring_up_console();
 
     test_main();
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/main.rs b/16_virtual_mem_part4_higher_half_kernel/src/main.rs
index 9ecba1e7e..210796445 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/main.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/main.rs
@@ -26,6 +26,7 @@ unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
 
     exception::handling_init();
+    memory::mmu::post_enable_init();
 
     // Add the mapping records for the precomputed entries first, so that they appear on the top of
     // the list.
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory.rs b/16_virtual_mem_part4_higher_half_kernel/src/memory.rs
index 1780e7d4f..360541734 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/memory.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/memory.rs
@@ -10,9 +10,8 @@ use crate::{bsp, common};
 use core::{
     fmt,
     marker::PhantomData,
-    ops::{AddAssign, SubAssign},
+    ops::{Add, Sub},
 };
-use mmu::Page;
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -22,15 +21,15 @@ use mmu::Page;
 pub trait AddressType: Copy + Clone + PartialOrd + PartialEq {}
 
 /// Zero-sized type to mark a physical address.
-#[derive(Copy, Clone, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
 pub enum Physical {}
 
 /// Zero-sized type to mark a virtual address.
-#[derive(Copy, Clone, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
 pub enum Virtual {}
 
 /// Generic address type.
-#[derive(Copy, Clone, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
 pub struct Address<ATYPE: AddressType> {
     value: usize,
     _address_type: PhantomData<fn() -> ATYPE>,
@@ -52,73 +51,60 @@ impl<ATYPE: AddressType> Address<ATYPE> {
         }
     }
 
-    /// Align down.
-    pub const fn align_down(self, alignment: usize) -> Self {
-        let aligned = common::align_down(self.value, alignment);
+    /// Convert to usize.
+    pub const fn as_usize(self) -> usize {
+        self.value
+    }
 
-        Self {
-            value: aligned,
-            _address_type: PhantomData,
-        }
+    /// Align down to page size.
+    pub const fn align_down_page(self) -> Self {
+        let aligned = common::align_down(self.value, bsp::memory::mmu::KernelGranule::SIZE);
+
+        Self::new(aligned)
     }
 
-    /// Converts `Address` into an usize.
-    pub const fn into_usize(self) -> usize {
-        self.value
+    /// Align up to page size.
+    pub const fn align_up_page(self) -> Self {
+        let aligned = common::align_up(self.value, bsp::memory::mmu::KernelGranule::SIZE);
+
+        Self::new(aligned)
     }
 
-    /// Return a pointer to the page that contains this address.
-    pub const fn as_page_ptr(&self) -> *const Page<ATYPE> {
-        self.align_down(bsp::memory::mmu::KernelGranule::SIZE)
-            .into_usize() as *const _
+    /// Checks if the address is page aligned.
+    pub const fn is_page_aligned(&self) -> bool {
+        common::is_aligned(self.value, bsp::memory::mmu::KernelGranule::SIZE)
     }
 
-    /// Return the address' offset into the underlying page.
+    /// Return the address' offset into the corresponding page.
     pub const fn offset_into_page(&self) -> usize {
         self.value & bsp::memory::mmu::KernelGranule::MASK
     }
 }
 
-impl<ATYPE: AddressType> core::ops::Add<usize> for Address<ATYPE> {
+impl<ATYPE: AddressType> Add<usize> for Address<ATYPE> {
     type Output = Self;
 
-    fn add(self, other: usize) -> Self {
-        Self {
-            value: self.value + other,
-            _address_type: PhantomData,
+    #[inline(always)]
+    fn add(self, rhs: usize) -> Self::Output {
+        match self.value.checked_add(rhs) {
+            None => panic!("Overflow on Address::add"),
+            Some(x) => Self::new(x),
         }
     }
 }
 
-impl<ATYPE: AddressType> AddAssign for Address<ATYPE> {
-    fn add_assign(&mut self, other: Self) {
-        *self = Self {
-            value: self.value + other.into_usize(),
-            _address_type: PhantomData,
-        };
-    }
-}
-
-impl<ATYPE: AddressType> core::ops::Sub<usize> for Address<ATYPE> {
+impl<ATYPE: AddressType> Sub<Address<ATYPE>> for Address<ATYPE> {
     type Output = Self;
 
-    fn sub(self, other: usize) -> Self {
-        Self {
-            value: self.value - other,
-            _address_type: PhantomData,
+    #[inline(always)]
+    fn sub(self, rhs: Address<ATYPE>) -> Self::Output {
+        match self.value.checked_sub(rhs.value) {
+            None => panic!("Overflow on Address::sub"),
+            Some(x) => Self::new(x),
         }
     }
 }
 
-impl<ATYPE: AddressType> SubAssign for Address<ATYPE> {
-    fn sub_assign(&mut self, other: Self) {
-        *self = Self {
-            value: self.value - other.into_usize(),
-            _address_type: PhantomData,
-        };
-    }
-}
-
 impl fmt::Display for Address<Physical> {
     // Don't expect to see physical addresses greater than 40 bit.
     fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
@@ -147,3 +133,33 @@ impl fmt::Display for Address<Virtual> {
         write!(f, "{:04x}", q1)
     }
 }
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// Sanity of [Address] methods.
+    #[kernel_test]
+    fn address_type_method_sanity() {
+        let addr = Address::<Virtual>::new(bsp::memory::mmu::KernelGranule::SIZE + 100);
+
+        assert_eq!(
+            addr.align_down_page().as_usize(),
+            bsp::memory::mmu::KernelGranule::SIZE
+        );
+
+        assert_eq!(
+            addr.align_up_page().as_usize(),
+            bsp::memory::mmu::KernelGranule::SIZE * 2
+        );
+
+        assert_eq!(addr.is_page_aligned(), false);
+
+        assert_eq!(addr.offset_into_page(), 100);
+    }
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs
index 0e699ccd9..ce75f9287 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs
@@ -8,6 +8,7 @@
 #[path = "../_arch/aarch64/memory/mmu.rs"]
 mod arch_mmu;
 
+mod alloc;
 mod mapping_record;
 mod translation_table;
 mod types;
@@ -15,9 +16,10 @@ mod types;
 use crate::{
     bsp,
     memory::{Address, Physical, Virtual},
-    synchronization, warn,
+    synchronization::{self, interface::Mutex},
+    warn,
 };
-use core::fmt;
+use core::{fmt, num::NonZeroUsize};
 
 pub use types::*;
 
@@ -80,28 +82,46 @@ use interface::MMU;
 use synchronization::interface::ReadWriteEx;
 use translation_table::interface::TranslationTable;
 
-/// Map pages in the kernel's translation tables.
+/// Query the BSP for the reserved virtual addresses for MMIO remapping and initialize the kernel's
+/// MMIO VA allocator with it.
+fn kernel_init_mmio_va_allocator() {
+    let region = bsp::memory::mmu::virt_mmio_remap_region();
+
+    alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.initialize(region));
+}
+
+/// Map a region in the kernel's translation tables.
 ///
 /// No input checks done, input is passed through to the architectural implementation.
 ///
 /// # Safety
 ///
-/// - See `map_pages_at()`.
+/// - See `map_at()`.
 /// - Does not prevent aliasing.
-unsafe fn kernel_map_pages_at_unchecked(
+unsafe fn kernel_map_at_unchecked(
     name: &'static str,
-    virt_pages: &PageSliceDescriptor<Virtual>,
-    phys_pages: &PageSliceDescriptor<Physical>,
+    virt_region: &MemoryRegion<Virtual>,
+    phys_region: &MemoryRegion<Physical>,
     attr: &AttributeFields,
 ) -> Result<(), &'static str> {
     bsp::memory::mmu::kernel_translation_tables()
-        .write(|tables| tables.map_pages_at(virt_pages, phys_pages, attr))?;
+        .write(|tables| tables.map_at(virt_region, phys_region, attr))?;
 
-    kernel_add_mapping_record(name, virt_pages, phys_pages, attr);
+    kernel_add_mapping_record(name, virt_region, phys_region, attr);
 
     Ok(())
 }
 
+/// Try to translate a kernel virtual address to a physical address.
+///
+/// Will only succeed if there exists a valid mapping for the input address.
+fn try_kernel_virt_addr_to_phys_addr(
+    virt_addr: Address<Virtual>,
+) -> Result<Address<Physical>, &'static str> {
+    bsp::memory::mmu::kernel_translation_tables()
+        .read(|tables| tables.try_virt_addr_to_phys_addr(virt_addr))
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -152,70 +172,48 @@ impl<const AS_SIZE: usize> AddressSpace<AS_SIZE> {
 /// Add an entry to the mapping info record.
 pub fn kernel_add_mapping_record(
     name: &'static str,
-    virt_pages: &PageSliceDescriptor<Virtual>,
-    phys_pages: &PageSliceDescriptor<Physical>,
+    virt_region: &MemoryRegion<Virtual>,
+    phys_region: &MemoryRegion<Physical>,
     attr: &AttributeFields,
 ) {
-    if let Err(x) = mapping_record::kernel_add(name, virt_pages, phys_pages, attr) {
+    if let Err(x) = mapping_record::kernel_add(name, virt_region, phys_region, attr) {
         warn!("{}", x);
     }
 }
 
-/// Raw mapping of virtual to physical pages in the kernel translation tables.
-///
-/// Prevents mapping into the MMIO range of the tables.
-///
-/// # Safety
-///
-/// - See `kernel_map_pages_at_unchecked()`.
-/// - Does not prevent aliasing. Currently, the callers must be trusted.
-pub unsafe fn kernel_map_pages_at(
-    name: &'static str,
-    virt_pages: &PageSliceDescriptor<Virtual>,
-    phys_pages: &PageSliceDescriptor<Physical>,
-    attr: &AttributeFields,
-) -> Result<(), &'static str> {
-    let is_mmio = bsp::memory::mmu::kernel_translation_tables()
-        .read(|tables| tables.is_virt_page_slice_mmio(virt_pages));
-    if is_mmio {
-        return Err("Attempt to manually map into MMIO region");
-    }
-
-    kernel_map_pages_at_unchecked(name, virt_pages, phys_pages, attr)?;
-
-    Ok(())
-}
-
 /// MMIO remapping in the kernel translation tables.
 ///
 /// Typically used by device drivers.
 ///
 /// # Safety
 ///
-/// - Same as `kernel_map_pages_at_unchecked()`, minus the aliasing part.
+/// - Same as `kernel_map_at_unchecked()`, minus the aliasing part.
 pub unsafe fn kernel_map_mmio(
     name: &'static str,
     mmio_descriptor: &MMIODescriptor,
 ) -> Result<Address<Virtual>, &'static str> {
-    let phys_pages: PageSliceDescriptor<Physical> = (*mmio_descriptor).into();
-    let offset_into_start_page =
-        mmio_descriptor.start_addr().into_usize() & bsp::memory::mmu::KernelGranule::MASK;
+    let phys_region = MemoryRegion::from(*mmio_descriptor);
+    let offset_into_start_page = mmio_descriptor.start_addr().offset_into_page();
 
-    // Check if an identical page slice has been mapped for another driver. If so, reuse it.
+    // Check if an identical region has been mapped for another driver. If so, reuse it.
     let virt_addr = if let Some(addr) =
         mapping_record::kernel_find_and_insert_mmio_duplicate(mmio_descriptor, name)
     {
         addr
-    // Otherwise, allocate a new virtual page slice and map it.
+    // Otherwise, allocate a new region and map it.
     } else {
-        let virt_pages: PageSliceDescriptor<Virtual> =
-            bsp::memory::mmu::kernel_translation_tables()
-                .write(|tables| tables.next_mmio_virt_page_slice(phys_pages.num_pages()))?;
+        let num_pages = match NonZeroUsize::new(phys_region.num_pages()) {
+            None => return Err("Requested 0 pages"),
+            Some(x) => x,
+        };
+
+        let virt_region =
+            alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.alloc(num_pages))?;
 
-        kernel_map_pages_at_unchecked(
+        kernel_map_at_unchecked(
             name,
-            &virt_pages,
-            &phys_pages,
+            &virt_region,
+            &phys_region,
             &AttributeFields {
                 mem_attributes: MemAttributes::Device,
                 acc_perms: AccessPermissions::ReadWrite,
@@ -223,40 +221,30 @@ pub unsafe fn kernel_map_mmio(
             },
         )?;
 
-        virt_pages.start_addr()
+        virt_region.start_addr()
     };
 
     Ok(virt_addr + offset_into_start_page)
 }
 
-/// Try to translate a kernel virtual page pointer to a physical page pointer.
+/// Try to translate a kernel virtual page address to a physical page address.
 ///
 /// Will only succeed if there exists a valid mapping for the input page.
-pub fn try_kernel_virt_page_ptr_to_phys_page_ptr(
-    virt_page_ptr: *const Page<Virtual>,
-) -> Result<*const Page<Physical>, &'static str> {
+pub fn try_kernel_virt_page_addr_to_phys_page_addr(
+    virt_page_addr: PageAddress<Virtual>,
+) -> Result<PageAddress<Physical>, &'static str> {
     bsp::memory::mmu::kernel_translation_tables()
-        .read(|tables| tables.try_virt_page_ptr_to_phys_page_ptr(virt_page_ptr))
+        .read(|tables| tables.try_virt_page_addr_to_phys_page_addr(virt_page_addr))
 }
 
 /// Try to get the attributes of a kernel page.
 ///
 /// Will only succeed if there exists a valid mapping for the input page.
 pub fn try_kernel_page_attributes(
-    virt_page_ptr: *const Page<Virtual>,
+    virt_page_addr: PageAddress<Virtual>,
 ) -> Result<AttributeFields, &'static str> {
     bsp::memory::mmu::kernel_translation_tables()
-        .read(|tables| tables.try_page_attributes(virt_page_ptr))
-}
-
-/// Try to translate a kernel virtual address to a physical address.
-///
-/// Will only succeed if there exists a valid mapping for the input address.
-fn try_kernel_virt_addr_to_phys_addr(
-    virt_addr: Address<Virtual>,
-) -> Result<Address<Physical>, &'static str> {
-    bsp::memory::mmu::kernel_translation_tables()
-        .read(|tables| tables.try_virt_addr_to_phys_addr(virt_addr))
+        .read(|tables| tables.try_page_attributes(virt_page_addr))
 }
 
 /// Enable the MMU and data + instruction caching.
@@ -271,6 +259,11 @@ pub unsafe fn enable_mmu_and_caching(
     arch_mmu::mmu().enable_mmu_and_caching(phys_tables_base_addr)
 }
 
+/// Finish initialization of the MMU subsystem.
+pub fn post_enable_init() {
+    kernel_init_mmio_va_allocator();
+}
+
 /// Human-readable print of all recorded kernel mappings.
 pub fn kernel_print_mappings() {
     mapping_record::kernel_print()
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/alloc.rs b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/alloc.rs
new file mode 100644
index 000000000..a63df0978
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/alloc.rs
@@ -0,0 +1,70 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+//! Allocation.
+
+use super::MemoryRegion;
+use crate::{
+    memory::{AddressType, Virtual},
+    synchronization::IRQSafeNullLock,
+    warn,
+};
+use core::num::NonZeroUsize;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// A page allocator that can be lazyily initialized.
+pub struct PageAllocator<ATYPE: AddressType> {
+    pool: Option<MemoryRegion<ATYPE>>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static KERNEL_MMIO_VA_ALLOCATOR: IRQSafeNullLock<PageAllocator<Virtual>> =
+    IRQSafeNullLock::new(PageAllocator::new());
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the kernel's MMIO virtual address allocator.
+pub fn kernel_mmio_va_allocator() -> &'static IRQSafeNullLock<PageAllocator<Virtual>> {
+    &KERNEL_MMIO_VA_ALLOCATOR
+}
+
+impl<ATYPE: AddressType> PageAllocator<ATYPE> {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self { pool: None }
+    }
+
+    /// Initialize the allocator.
+    pub fn initialize(&mut self, pool: MemoryRegion<ATYPE>) {
+        if self.pool.is_some() {
+            warn!("Already initialized");
+            return;
+        }
+
+        self.pool = Some(pool);
+    }
+
+    /// Allocate a number of pages.
+    pub fn alloc(
+        &mut self,
+        num_requested_pages: NonZeroUsize,
+    ) -> Result<MemoryRegion<ATYPE>, &'static str> {
+        if self.pool.is_none() {
+            return Err("Allocator not initialized");
+        }
+
+        self.pool
+            .as_mut()
+            .unwrap()
+            .take_first_n_pages(num_requested_pages)
+    }
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/mapping_record.rs b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/mapping_record.rs
index 16c27e38c..eba13ef90 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/mapping_record.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/mapping_record.rs
@@ -5,10 +5,10 @@
 //! A record of mapped pages.
 
 use super::{
-    AccessPermissions, Address, AttributeFields, MMIODescriptor, MemAttributes,
-    PageSliceDescriptor, Physical, Virtual,
+    AccessPermissions, Address, AttributeFields, MMIODescriptor, MemAttributes, MemoryRegion,
+    Physical, Virtual,
 };
-use crate::{info, synchronization, synchronization::InitStateLock, warn};
+use crate::{bsp, info, synchronization, synchronization::InitStateLock, warn};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -19,8 +19,9 @@ use crate::{info, synchronization, synchronization::InitStateLock, warn};
 #[derive(Copy, Clone)]
 struct MappingRecordEntry {
     pub users: [Option<&'static str>; 5],
-    pub phys_pages: PageSliceDescriptor<Physical>,
+    pub phys_start_addr: Address<Physical>,
     pub virt_start_addr: Address<Virtual>,
+    pub num_pages: usize,
     pub attribute_fields: AttributeFields,
 }
 
@@ -42,14 +43,15 @@ static KERNEL_MAPPING_RECORD: InitStateLock<MappingRecord> =
 impl MappingRecordEntry {
     pub fn new(
         name: &'static str,
-        virt_pages: &PageSliceDescriptor<Virtual>,
-        phys_pages: &PageSliceDescriptor<Physical>,
+        virt_region: &MemoryRegion<Virtual>,
+        phys_region: &MemoryRegion<Physical>,
         attr: &AttributeFields,
     ) -> Self {
         Self {
             users: [Some(name), None, None, None, None],
-            phys_pages: *phys_pages,
-            virt_start_addr: virt_pages.start_addr(),
+            phys_start_addr: phys_region.start_addr(),
+            virt_start_addr: virt_region.start_addr(),
+            num_pages: phys_region.num_pages(),
             attribute_fields: *attr,
         }
     }
@@ -84,26 +86,41 @@ impl MappingRecord {
 
     fn find_duplicate(
         &mut self,
-        phys_pages: &PageSliceDescriptor<Physical>,
+        phys_region: &MemoryRegion<Physical>,
     ) -> Option<&mut MappingRecordEntry> {
         self.inner
             .iter_mut()
             .filter(|x| x.is_some())
             .map(|x| x.as_mut().unwrap())
             .filter(|x| x.attribute_fields.mem_attributes == MemAttributes::Device)
-            .find(|x| x.phys_pages == *phys_pages)
+            .find(|x| {
+                if x.phys_start_addr != phys_region.start_addr() {
+                    return false;
+                }
+
+                if x.num_pages != phys_region.num_pages() {
+                    return false;
+                }
+
+                true
+            })
     }
 
     pub fn add(
         &mut self,
         name: &'static str,
-        virt_pages: &PageSliceDescriptor<Virtual>,
-        phys_pages: &PageSliceDescriptor<Physical>,
+        virt_region: &MemoryRegion<Virtual>,
+        phys_region: &MemoryRegion<Physical>,
         attr: &AttributeFields,
     ) -> Result<(), &'static str> {
         let x = self.find_next_free()?;
 
-        *x = Some(MappingRecordEntry::new(name, virt_pages, phys_pages, attr));
+        *x = Some(MappingRecordEntry::new(
+            name,
+            virt_region,
+            phys_region,
+            attr,
+        ));
         Ok(())
     }
 
@@ -119,11 +136,11 @@ impl MappingRecord {
         info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
 
         for i in self.inner.iter().flatten() {
+            let size = i.num_pages * bsp::memory::mmu::KernelGranule::SIZE;
             let virt_start = i.virt_start_addr;
-            let virt_end_inclusive = virt_start + i.phys_pages.size() - 1;
-            let phys_start = i.phys_pages.start_addr();
-            let phys_end_inclusive = i.phys_pages.end_addr_inclusive();
-            let size = i.phys_pages.size();
+            let virt_end_inclusive = virt_start + (size - 1);
+            let phys_start = i.phys_start_addr;
+            let phys_end_inclusive = phys_start + (size - 1);
 
             let (size, unit) = if (size >> MIB_RSHIFT) > 0 {
                 (size >> MIB_RSHIFT, "MiB")
@@ -186,21 +203,21 @@ use synchronization::interface::ReadWriteEx;
 /// Add an entry to the mapping info record.
 pub fn kernel_add(
     name: &'static str,
-    virt_pages: &PageSliceDescriptor<Virtual>,
-    phys_pages: &PageSliceDescriptor<Physical>,
+    virt_region: &MemoryRegion<Virtual>,
+    phys_region: &MemoryRegion<Physical>,
     attr: &AttributeFields,
 ) -> Result<(), &'static str> {
-    KERNEL_MAPPING_RECORD.write(|mr| mr.add(name, virt_pages, phys_pages, attr))
+    KERNEL_MAPPING_RECORD.write(|mr| mr.add(name, virt_region, phys_region, attr))
 }
 
 pub fn kernel_find_and_insert_mmio_duplicate(
     mmio_descriptor: &MMIODescriptor,
     new_user: &'static str,
 ) -> Option<Address<Virtual>> {
-    let phys_pages: PageSliceDescriptor<Physical> = (*mmio_descriptor).into();
+    let phys_region: MemoryRegion<Physical> = (*mmio_descriptor).into();
 
     KERNEL_MAPPING_RECORD.write(|mr| {
-        let dup = mr.find_duplicate(&phys_pages)?;
+        let dup = mr.find_duplicate(&phys_region)?;
 
         if let Err(x) = dup.add_user(new_user) {
             warn!("{}", x);
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/translation_table.rs b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/translation_table.rs
index 0738091c6..d81e6957f 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/translation_table.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/translation_table.rs
@@ -8,10 +8,8 @@
 #[path = "../../_arch/aarch64/memory/mmu/translation_table.rs"]
 mod arch_translation_table;
 
-use crate::memory::{
-    mmu::{AttributeFields, PageSliceDescriptor},
-    Address, Page, Physical, Virtual,
-};
+use super::{AttributeFields, MemoryRegion};
+use crate::memory::{Address, Physical, Virtual};
 
 //--------------------------------------------------------------------------------------------------
 // Architectural Public Reexports
@@ -25,6 +23,8 @@ pub use arch_translation_table::FixedSizeTranslationTable;
 
 /// Translation table interfaces.
 pub mod interface {
+    use crate::memory::mmu::PageAddress;
+
     use super::*;
 
     /// Translation table operations.
@@ -37,7 +37,7 @@ pub mod interface {
         ///   multiple times.
         fn init(&mut self) -> Result<(), &'static str>;
 
-        /// Map the given virtual pages to the given physical pages.
+        /// Map the given virtual memory region to the given physical memory region.
         ///
         /// # Safety
         ///
@@ -46,42 +46,27 @@ pub mod interface {
         ///   mapping to the same physical memory using multiple virtual addresses, which would
         ///   break Rust's ownership assumptions. This should be protected against in the kernel's
         ///   generic MMU code.
-        unsafe fn map_pages_at(
+        unsafe fn map_at(
             &mut self,
-            virt_pages: &PageSliceDescriptor<Virtual>,
-            phys_pages: &PageSliceDescriptor<Physical>,
+            virt_region: &MemoryRegion<Virtual>,
+            phys_region: &MemoryRegion<Physical>,
             attr: &AttributeFields,
         ) -> Result<(), &'static str>;
 
-        /// Obtain a free virtual page slice in the MMIO region.
-        ///
-        /// The "MMIO region" is a distinct region of the implementor's choice, which allows
-        /// differentiating MMIO addresses from others. This can speed up debugging efforts.
-        /// Ideally, those MMIO addresses are also standing out visually so that a human eye can
-        /// identify them. For example, by allocating them from near the end of the virtual address
-        /// space.
-        fn next_mmio_virt_page_slice(
-            &mut self,
-            num_pages: usize,
-        ) -> Result<PageSliceDescriptor<Virtual>, &'static str>;
-
-        /// Check if a virtual page splice is in the "MMIO region".
-        fn is_virt_page_slice_mmio(&self, virt_pages: &PageSliceDescriptor<Virtual>) -> bool;
-
-        /// Try to translate a virtual page pointer to a physical page pointer.
+        /// Try to translate a virtual page address to a physical page address.
         ///
         /// Will only succeed if there exists a valid mapping for the input page.
-        fn try_virt_page_ptr_to_phys_page_ptr(
+        fn try_virt_page_addr_to_phys_page_addr(
             &self,
-            virt_page_ptr: *const Page<Virtual>,
-        ) -> Result<*const Page<Physical>, &'static str>;
+            virt_page_addr: PageAddress<Virtual>,
+        ) -> Result<PageAddress<Physical>, &'static str>;
 
         /// Try to get the attributes of a page.
         ///
         /// Will only succeed if there exists a valid mapping for the input page.
         fn try_page_attributes(
             &self,
-            virt_page_ptr: *const Page<Virtual>,
+            virt_page_addr: PageAddress<Virtual>,
         ) -> Result<AttributeFields, &'static str>;
 
         /// Try to translate a virtual address to a physical address.
@@ -101,7 +86,7 @@ pub mod interface {
 #[cfg(test)]
 mod tests {
     use super::*;
-    use crate::{bsp, memory::Address};
+    use crate::memory::mmu::{AccessPermissions, MemAttributes, PageAddress};
     use arch_translation_table::MinSizeTranslationTable;
     use interface::TranslationTable;
     use test_macros::kernel_test;
@@ -114,20 +99,39 @@ mod tests {
 
         assert!(tables.init().is_ok());
 
-        let x = tables.next_mmio_virt_page_slice(0);
-        assert!(x.is_err());
+        let virt_end_exclusive_page_addr: PageAddress<Virtual> = PageAddress::MAX;
+        let virt_start_page_addr: PageAddress<Virtual> =
+            virt_end_exclusive_page_addr.checked_offset(-5).unwrap();
+
+        let phys_start_page_addr: PageAddress<Physical> = PageAddress::from(0);
+        let phys_end_exclusive_page_addr: PageAddress<Physical> =
+            phys_start_page_addr.checked_offset(5).unwrap();
 
-        let x = tables.next_mmio_virt_page_slice(1_0000_0000);
-        assert!(x.is_err());
+        let virt_region = MemoryRegion::new(virt_start_page_addr, virt_end_exclusive_page_addr);
+        let phys_region = MemoryRegion::new(phys_start_page_addr, phys_end_exclusive_page_addr);
 
-        let x = tables.next_mmio_virt_page_slice(2).unwrap();
-        assert_eq!(x.size(), bsp::memory::mmu::KernelGranule::SIZE * 2);
+        let attr = AttributeFields {
+            mem_attributes: MemAttributes::CacheableDRAM,
+            acc_perms: AccessPermissions::ReadWrite,
+            execute_never: true,
+        };
 
-        assert_eq!(tables.is_virt_page_slice_mmio(&x), true);
+        unsafe { assert_eq!(tables.map_at(&virt_region, &phys_region, &attr), Ok(())) };
 
         assert_eq!(
-            tables.is_virt_page_slice_mmio(&PageSliceDescriptor::from_addr(Address::new(0), 1)),
-            false
+            tables.try_virt_page_addr_to_phys_page_addr(virt_start_page_addr),
+            Ok(phys_start_page_addr)
         );
+
+        assert_eq!(
+            tables.try_page_attributes(virt_start_page_addr.checked_offset(-1).unwrap()),
+            Err("Page marked invalid")
+        );
+
+        assert_eq!(tables.try_page_attributes(virt_start_page_addr), Ok(attr));
+
+        let virt_addr = virt_start_page_addr.into_inner() + 0x100;
+        let phys_addr = phys_start_page_addr.into_inner() + 0x100;
+        assert_eq!(tables.try_virt_addr_to_phys_addr(virt_addr), Ok(phys_addr));
     }
 }
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/types.rs b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/types.rs
index 0fb3bf694..8235ea622 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/types.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/types.rs
@@ -8,29 +8,28 @@ use crate::{
     bsp, common,
     memory::{Address, AddressType, Physical},
 };
-use core::{convert::From, marker::PhantomData};
+use core::{convert::From, iter::Step, num::NonZeroUsize, ops::Range};
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
-/// Generic page type.
-#[repr(C)]
-pub struct Page<ATYPE: AddressType> {
-    inner: [u8; bsp::memory::mmu::KernelGranule::SIZE],
-    _address_type: PhantomData<ATYPE>,
+/// A wrapper type around [Address] that ensures page alignment.
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+pub struct PageAddress<ATYPE: AddressType> {
+    inner: Address<ATYPE>,
 }
 
-/// Type describing a slice of pages.
-#[derive(Copy, Clone, PartialOrd, PartialEq)]
-pub struct PageSliceDescriptor<ATYPE: AddressType> {
-    start: Address<ATYPE>,
-    num_pages: usize,
+/// A type that describes a region of memory in quantities of pages.
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+pub struct MemoryRegion<ATYPE: AddressType> {
+    start: PageAddress<ATYPE>,
+    end_exclusive: PageAddress<ATYPE>,
 }
 
 /// Architecture agnostic memory attributes.
 #[allow(missing_docs)]
-#[derive(Copy, Clone, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
 pub enum MemAttributes {
     CacheableDRAM,
     Device,
@@ -38,7 +37,7 @@ pub enum MemAttributes {
 
 /// Architecture agnostic access permissions.
 #[allow(missing_docs)]
-#[derive(Copy, Clone)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
 pub enum AccessPermissions {
     ReadOnly,
     ReadWrite,
@@ -46,7 +45,7 @@ pub enum AccessPermissions {
 
 /// Collection of memory attributes.
 #[allow(missing_docs)]
-#[derive(Copy, Clone)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
 pub struct AttributeFields {
     pub mem_attributes: MemAttributes,
     pub acc_perms: AccessPermissions,
@@ -57,7 +56,7 @@ pub struct AttributeFields {
 #[derive(Copy, Clone)]
 pub struct MMIODescriptor {
     start_addr: Address<Physical>,
-    size: usize,
+    end_addr_exclusive: Address<Physical>,
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -65,90 +64,207 @@ pub struct MMIODescriptor {
 //--------------------------------------------------------------------------------------------------
 
 //------------------------------------------------------------------------------
-// Page
+// PageAddress
 //------------------------------------------------------------------------------
+impl<ATYPE: AddressType> PageAddress<ATYPE> {
+    /// The largest value that can be represented by this type.
+    pub const MAX: Self = PageAddress {
+        inner: Address::new(usize::MAX).align_down_page(),
+    };
+
+    /// Unwraps the value.
+    pub fn into_inner(self) -> Address<ATYPE> {
+        self.inner
+    }
 
-impl<ATYPE: AddressType> Page<ATYPE> {
-    /// Get a pointer to the instance.
-    pub const fn as_ptr(&self) -> *const Page<ATYPE> {
-        self as *const _
+    /// Calculates the offset from the page address.
+    ///
+    /// `count` is in units of [PageAddress]. For example, a count of 2 means `result = self + 2 *
+    /// page_size`.
+    pub fn checked_offset(self, count: isize) -> Option<Self> {
+        if count == 0 {
+            return Some(self);
+        }
+
+        let delta = (count.abs() as usize).checked_mul(bsp::memory::mmu::KernelGranule::SIZE)?;
+        let result = if count.is_positive() {
+            self.inner.as_usize().checked_add(delta)?
+        } else {
+            self.inner.as_usize().checked_sub(delta)?
+        };
+
+        Some(Self {
+            inner: Address::new(result),
+        })
     }
 }
 
-//------------------------------------------------------------------------------
-// PageSliceDescriptor
-//------------------------------------------------------------------------------
+impl<ATYPE: AddressType> From<usize> for PageAddress<ATYPE> {
+    fn from(addr: usize) -> Self {
+        assert!(
+            common::is_aligned(addr, bsp::memory::mmu::KernelGranule::SIZE),
+            "Input usize not page aligned"
+        );
 
-impl<ATYPE: AddressType> PageSliceDescriptor<ATYPE> {
-    /// Create an instance.
-    pub const fn from_addr(start: Address<ATYPE>, num_pages: usize) -> Self {
-        assert!(common::is_aligned(
-            start.into_usize(),
-            bsp::memory::mmu::KernelGranule::SIZE
-        ));
-        assert!(num_pages > 0);
+        Self {
+            inner: Address::new(addr),
+        }
+    }
+}
+
+impl<ATYPE: AddressType> From<Address<ATYPE>> for PageAddress<ATYPE> {
+    fn from(addr: Address<ATYPE>) -> Self {
+        assert!(addr.is_page_aligned(), "Input Address not page aligned");
+
+        Self { inner: addr }
+    }
+}
+
+impl<ATYPE: AddressType> Step for PageAddress<ATYPE> {
+    fn steps_between(start: &Self, end: &Self) -> Option<usize> {
+        if start > end {
+            return None;
+        }
+
+        // Since start <= end, do unchecked arithmetic.
+        Some(
+            (end.inner.as_usize() - start.inner.as_usize())
+                >> bsp::memory::mmu::KernelGranule::SHIFT,
+        )
+    }
 
-        Self { start, num_pages }
+    fn forward_checked(start: Self, count: usize) -> Option<Self> {
+        start.checked_offset(count as isize)
     }
 
-    /// Return a pointer to the first page of the described slice.
-    pub const fn first_page_ptr(&self) -> *const Page<ATYPE> {
-        self.start.into_usize() as *const _
+    fn backward_checked(start: Self, count: usize) -> Option<Self> {
+        start.checked_offset(-(count as isize))
     }
+}
+
+//------------------------------------------------------------------------------
+// MemoryRegion
+//------------------------------------------------------------------------------
+impl<ATYPE: AddressType> MemoryRegion<ATYPE> {
+    /// Create an instance.
+    pub fn new(start: PageAddress<ATYPE>, end_exclusive: PageAddress<ATYPE>) -> Self {
+        assert!(start <= end_exclusive);
 
-    /// Return the number of pages the slice describes.
-    pub const fn num_pages(&self) -> usize {
-        self.num_pages
+        Self {
+            start,
+            end_exclusive,
+        }
     }
 
-    /// Return the memory size this descriptor spans.
-    pub const fn size(&self) -> usize {
-        self.num_pages * bsp::memory::mmu::KernelGranule::SIZE
+    fn as_range(&self) -> Range<PageAddress<ATYPE>> {
+        self.into_iter()
     }
 
-    /// Return the start address.
-    pub const fn start_addr(&self) -> Address<ATYPE> {
+    /// Returns the start page address.
+    pub fn start_page_addr(&self) -> PageAddress<ATYPE> {
         self.start
     }
 
-    /// Return the exclusive end address.
-    pub fn end_addr(&self) -> Address<ATYPE> {
-        self.start + self.size()
+    /// Returns the start address.
+    pub fn start_addr(&self) -> Address<ATYPE> {
+        self.start.into_inner()
     }
 
-    /// Return the inclusive end address.
-    pub fn end_addr_inclusive(&self) -> Address<ATYPE> {
-        self.start + (self.size() - 1)
+    /// Returns the exclusive end page address.
+    pub fn end_exclusive_page_addr(&self) -> PageAddress<ATYPE> {
+        self.end_exclusive
     }
 
-    /// Check if an address is contained within this descriptor.
+    /// Returns the exclusive end page address.
+    pub fn end_inclusive_page_addr(&self) -> PageAddress<ATYPE> {
+        self.end_exclusive.checked_offset(-1).unwrap()
+    }
+
+    /// Checks if self contains an address.
     pub fn contains(&self, addr: Address<ATYPE>) -> bool {
-        (addr >= self.start_addr()) && (addr <= self.end_addr_inclusive())
+        let page_addr = PageAddress::from(addr.align_down_page());
+        self.as_range().contains(&page_addr)
     }
 
-    /// Return a non-mutable slice of pages.
+    /// Checks if there is an overlap with another memory region.
+    pub fn overlaps(&self, other_region: &Self) -> bool {
+        let self_range = self.as_range();
+
+        self_range.contains(&other_region.start_page_addr())
+            || self_range.contains(&other_region.end_inclusive_page_addr())
+    }
+
+    /// Returns the number of pages contained in this region.
+    pub fn num_pages(&self) -> usize {
+        PageAddress::steps_between(&self.start, &self.end_exclusive).unwrap()
+    }
+
+    /// Returns the size in bytes of this region.
+    pub fn size(&self) -> usize {
+        // Invariant: start <= end_exclusive, so do unchecked arithmetic.
+        let end_exclusive = self.end_exclusive.into_inner().as_usize();
+        let start = self.start.into_inner().as_usize();
+
+        end_exclusive - start
+    }
+
+    /// Splits the MemoryRegion like:
     ///
-    /// # Safety
+    /// --------------------------------------------------------------------------------
+    /// |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |
+    /// --------------------------------------------------------------------------------
+    ///   ^                               ^                                       ^
+    ///   |                               |                                       |
+    ///   left_start     left_end_exclusive                                       |
+    ///                                                                           |
+    ///                                   ^                                       |
+    ///                                   |                                       |
+    ///                                   right_start           right_end_exclusive
     ///
-    /// - Same as applies for `core::slice::from_raw_parts`.
-    pub unsafe fn as_slice(&self) -> &[Page<ATYPE>] {
-        core::slice::from_raw_parts(self.first_page_ptr(), self.num_pages)
+    /// Left region is returned to the caller. Right region is the new region for this struct.
+    pub fn take_first_n_pages(&mut self, num_pages: NonZeroUsize) -> Result<Self, &'static str> {
+        let count: usize = num_pages.into();
+
+        let left_end_exclusive = self.start.checked_offset(count as isize);
+        let left_end_exclusive = match left_end_exclusive {
+            None => return Err("Overflow while calculating left_end_exclusive"),
+            Some(x) => x,
+        };
+
+        if left_end_exclusive > self.end_exclusive {
+            return Err("Not enough free pages");
+        }
+
+        let allocation = Self {
+            start: self.start,
+            end_exclusive: left_end_exclusive,
+        };
+        self.start = left_end_exclusive;
+
+        Ok(allocation)
     }
 }
 
-impl From<MMIODescriptor> for PageSliceDescriptor<Physical> {
-    fn from(desc: MMIODescriptor) -> Self {
-        let start_page_addr = desc
-            .start_addr
-            .align_down(bsp::memory::mmu::KernelGranule::SIZE);
+impl<ATYPE: AddressType> IntoIterator for MemoryRegion<ATYPE> {
+    type Item = PageAddress<ATYPE>;
+    type IntoIter = Range<Self::Item>;
 
-        let len = ((desc.end_addr_inclusive().into_usize() - start_page_addr.into_usize())
-            >> bsp::memory::mmu::KernelGranule::SHIFT)
-            + 1;
+    fn into_iter(self) -> Self::IntoIter {
+        Range {
+            start: self.start,
+            end: self.end_exclusive,
+        }
+    }
+}
+
+impl From<MMIODescriptor> for MemoryRegion<Physical> {
+    fn from(desc: MMIODescriptor) -> Self {
+        let start = PageAddress::from(desc.start_addr.align_down_page());
+        let end_exclusive = PageAddress::from(desc.end_addr_exclusive().align_up_page());
 
         Self {
-            start: start_page_addr,
-            num_pages: len,
+            start,
+            end_exclusive,
         }
     }
 }
@@ -161,8 +277,12 @@ impl MMIODescriptor {
     /// Create an instance.
     pub const fn new(start_addr: Address<Physical>, size: usize) -> Self {
         assert!(size > 0);
+        let end_addr_exclusive = Address::new(start_addr.as_usize() + size);
 
-        Self { start_addr, size }
+        Self {
+            start_addr,
+            end_addr_exclusive,
+        }
     }
 
     /// Return the start address.
@@ -170,14 +290,9 @@ impl MMIODescriptor {
         self.start_addr
     }
 
-    /// Return the inclusive end address.
-    pub fn end_addr_inclusive(&self) -> Address<Physical> {
-        self.start_addr + (self.size - 1)
-    }
-
-    /// Return the size.
-    pub const fn size(&self) -> usize {
-        self.size
+    /// Return the exclusive end address.
+    pub fn end_addr_exclusive(&self) -> Address<Physical> {
+        self.end_addr_exclusive
     }
 }
 
@@ -188,14 +303,76 @@ impl MMIODescriptor {
 #[cfg(test)]
 mod tests {
     use super::*;
+    use crate::memory::Virtual;
     use test_macros::kernel_test;
 
-    /// Check if the size of `struct Page` is as expected.
+    /// Sanity of [PageAddress] methods.
     #[kernel_test]
-    fn size_of_page_equals_granule_size() {
+    fn pageaddress_type_method_sanity() {
+        let page_addr: PageAddress<Virtual> =
+            PageAddress::from(bsp::memory::mmu::KernelGranule::SIZE * 2);
+
+        assert_eq!(
+            page_addr.checked_offset(-2),
+            Some(PageAddress::<Virtual>::from(0))
+        );
+
+        assert_eq!(
+            page_addr.checked_offset(2),
+            Some(PageAddress::<Virtual>::from(
+                bsp::memory::mmu::KernelGranule::SIZE * 4
+            ))
+        );
+
         assert_eq!(
-            core::mem::size_of::<Page<Physical>>(),
-            bsp::memory::mmu::KernelGranule::SIZE
+            PageAddress::<Virtual>::from(0).checked_offset(0),
+            Some(PageAddress::<Virtual>::from(0))
         );
+        assert_eq!(PageAddress::<Virtual>::from(0).checked_offset(-1), None);
+
+        let max_page_addr = Address::<Virtual>::new(usize::MAX).align_down_page();
+        assert_eq!(
+            PageAddress::<Virtual>::from(max_page_addr).checked_offset(1),
+            None
+        );
+
+        let zero = PageAddress::<Virtual>::from(0);
+        let three = PageAddress::<Virtual>::from(bsp::memory::mmu::KernelGranule::SIZE * 3);
+        assert_eq!(PageAddress::steps_between(&zero, &three), Some(3));
+    }
+
+    /// Sanity of [MemoryRegion] methods.
+    #[kernel_test]
+    fn memoryregion_type_method_sanity() {
+        let zero = PageAddress::<Virtual>::from(0);
+        let zero_region = MemoryRegion::new(zero, zero);
+        assert_eq!(zero_region.num_pages(), 0);
+        assert_eq!(zero_region.size(), 0);
+
+        let one = PageAddress::<Virtual>::from(bsp::memory::mmu::KernelGranule::SIZE);
+        let one_region = MemoryRegion::new(zero, one);
+        assert_eq!(one_region.num_pages(), 1);
+        assert_eq!(one_region.size(), bsp::memory::mmu::KernelGranule::SIZE);
+
+        let three = PageAddress::<Virtual>::from(bsp::memory::mmu::KernelGranule::SIZE * 3);
+        let mut three_region = MemoryRegion::new(zero, three);
+        assert!(three_region.contains(zero.into_inner()));
+        assert!(!three_region.contains(three.into_inner()));
+        assert!(three_region.overlaps(&one_region));
+
+        let allocation = three_region
+            .take_first_n_pages(NonZeroUsize::new(2).unwrap())
+            .unwrap();
+        assert_eq!(allocation.num_pages(), 2);
+        assert_eq!(three_region.num_pages(), 1);
+
+        let mut count = 0;
+        for i in allocation.into_iter() {
+            assert_eq!(
+                i.into_inner().as_usize(),
+                count * bsp::memory::mmu::KernelGranule::SIZE
+            );
+            count = count + 1;
+        }
     }
 }
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rs b/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rs
index 03058f5ef..489529411 100644
--- a/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rs
@@ -8,7 +8,7 @@
 #![no_main]
 #![no_std]
 
-use libkernel::{bsp, console, cpu, exception, print};
+use libkernel::{bsp, console, cpu, exception, memory, print};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
@@ -16,6 +16,7 @@ unsafe fn kernel_init() -> ! {
     use console::interface::*;
 
     exception::handling_init();
+    memory::mmu::post_enable_init();
     bsp::console::qemu_bring_up_console();
 
     // Handshake
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/01_timer_sanity.rs b/16_virtual_mem_part4_higher_half_kernel/tests/01_timer_sanity.rs
index f39d83845..9ffc38e7b 100644
--- a/16_virtual_mem_part4_higher_half_kernel/tests/01_timer_sanity.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/tests/01_timer_sanity.rs
@@ -11,12 +11,13 @@
 #![test_runner(libkernel::test_runner)]
 
 use core::time::Duration;
-use libkernel::{bsp, cpu, exception, time, time::interface::TimeManager};
+use libkernel::{bsp, cpu, exception, memory, time, time::interface::TimeManager};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
     exception::handling_init();
+    memory::mmu::post_enable_init();
     bsp::console::qemu_bring_up_console();
 
     // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs b/16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs
index 6e284f9c7..7eb099ff1 100644
--- a/16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs
@@ -17,11 +17,12 @@
 /// or indirectly.
 mod panic_exit_success;
 
-use libkernel::{bsp, cpu, exception, println};
+use libkernel::{bsp, cpu, exception, memory, println};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
     exception::handling_init();
+    memory::mmu::post_enable_init();
     bsp::console::qemu_bring_up_console();
 
     // This line will be printed as the test header.
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/03_exception_irq_sanity.rs b/16_virtual_mem_part4_higher_half_kernel/tests/03_exception_irq_sanity.rs
index ac25d01a8..c21f0c490 100644
--- a/16_virtual_mem_part4_higher_half_kernel/tests/03_exception_irq_sanity.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/tests/03_exception_irq_sanity.rs
@@ -10,11 +10,12 @@
 #![reexport_test_harness_main = "test_main"]
 #![test_runner(libkernel::test_runner)]
 
-use libkernel::{bsp, cpu, exception};
+use libkernel::{bsp, cpu, exception, memory};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    memory::mmu::post_enable_init();
     bsp::console::qemu_bring_up_console();
 
     exception::handling_init();
diff --git a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/arch.rb b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/arch.rb
index 3a8b41d90..f9f5c86e3 100644
--- a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/arch.rb
+++ b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/arch.rb
@@ -180,21 +180,16 @@ def output_addr=(addr)
 
 # Translation table representing the structure defined in translation_table.rs.
 class TranslationTable
-    MMIO_APERTURE_MiB = 256 * 1024 * 1024
-
     module MAIR
         NORMAL = 1
     end
 
     def initialize
-        @virt_mmio_start_addr = (BSP.kernel_virt_addr_space_size - MMIO_APERTURE_MiB) +
-                                BSP.kernel_virt_start_addr
-
         do_sanity_checks
 
         num_lvl2_tables = BSP.kernel_virt_addr_space_size >> Granule512MiB::SHIFT
 
-        @lvl3 = new_lvl3(num_lvl2_tables, BSP.phys_table_struct_start_addr)
+        @lvl3 = new_lvl3(num_lvl2_tables, BSP.phys_addr_of_kernel_tables)
 
         @lvl2_phys_start_addr = @lvl3.phys_start_addr + @lvl3.size_in_byte
         @lvl2 = new_lvl2(num_lvl2_tables, @lvl2_phys_start_addr)
@@ -202,13 +197,13 @@ def initialize
         populate_lvl2_entries
     end
 
-    def map_pages_at(virt_pages, phys_pages, attributes)
-        return if virt_pages.empty?
+    def map_at(virt_region, phys_region, attributes)
+        return if virt_region.empty?
 
-        raise if virt_pages.size != phys_pages.size
-        raise if phys_pages.last > BSP.phys_addr_space_end_page
+        raise if virt_region.size != phys_region.size
+        raise if phys_region.last > BSP.phys_addr_space_end_page
 
-        virt_pages.zip(phys_pages).each do |virt_page, phys_page|
+        virt_region.zip(phys_region).each do |virt_page, phys_page|
             desc = page_descriptor_from(virt_page)
             set_lvl3_entry(desc, phys_page, attributes)
         end
@@ -229,22 +224,9 @@ def phys_tables_base_addr
 
     private
 
-    def binary_with_mmio_clash?
-        BSP.rw_end_exclusive >= @virt_mmio_start_addr
-    end
-
     def do_sanity_checks
         raise unless BSP.kernel_granule::SIZE == Granule64KiB::SIZE
         raise unless (BSP.kernel_virt_addr_space_size % Granule512MiB::SIZE).zero?
-
-        # Need to ensure that that the kernel binary does not clash with the upmost 256 MiB of the
-        # virtual address space, which is reserved for runtime-remapping of MMIO.
-        return unless binary_with_mmio_clash?
-
-        puts format('__data_end_exclusive: 0x%16x', BSP.data_end_exclusive)
-        puts format('MMIO start:           0x%16x', @virt_mmio_start_addr)
-
-        raise 'Kernel virtual addresses clash with 256 MiB MMIO window'
     end
 
     def new_lvl3(num_lvl2_tables, start_addr)
@@ -309,13 +291,10 @@ def set_attributes(desc, attributes)
 
                   end
 
-        desc.pxn = case attributes.execute_never
-                   when :XN
+        desc.pxn = if attributes.execute_never
                        Stage1PageDescriptor::PXN::TRUE
-                   when :X
-                       Stage1PageDescriptor::PXN::FALSE
                    else
-                       raise 'Invalid input'
+                       Stage1PageDescriptor::PXN::FALSE
                    end
 
         desc.uxn = Stage1PageDescriptor::UXN::TRUE
diff --git a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/bsp.rb b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/bsp.rb
index ddc0f3ba6..54b511411 100644
--- a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/bsp.rb
+++ b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/bsp.rb
@@ -8,59 +8,30 @@
 class RaspberryPi
     attr_reader :kernel_granule, :kernel_virt_addr_space_size, :kernel_virt_start_addr
 
-    NM_BINARY = 'aarch64-none-elf-nm'
-    READELF_BINARY = 'aarch64-none-elf-readelf'
     MEMORY_SRC = File.read('src/bsp/raspberrypi/memory.rs').split("\n")
 
-    def initialize(kernel_elf)
+    def initialize
         @kernel_granule = Granule64KiB
 
-        @virt_addresses = {
-            boot_core_stack_start: /__boot_core_stack_start/,
-            boot_core_stack_end_exclusive: /__boot_core_stack_end_exclusive/,
+        @kernel_virt_addr_space_size = KERNEL_ELF.symbol_value('__kernel_virt_addr_space_size')
+        @kernel_virt_start_addr = KERNEL_ELF.symbol_value('__kernel_virt_start_addr')
 
-            rx_start: /__rx_start/,
-            rx_end_exclusive: /__rx_end_exclusive/,
-
-            rw_start: /__rw_start/,
-            rw_end_exclusive: /__rw_end_exclusive/,
-
-            table_struct_start_addr: /bsp::.*::memory::mmu::KERNEL_TABLES/,
-            phys_tables_base_addr: /PHYS_KERNEL_TABLES_BASE_ADDR/
-        }
-
-        symbols = `#{NM_BINARY} --demangle #{kernel_elf}`.split("\n")
-        @kernel_virt_addr_space_size = parse_from_symbols(symbols, /__kernel_virt_addr_space_size/)
-        @kernel_virt_start_addr = parse_from_symbols(symbols, /__kernel_virt_start_addr/)
-        @virt_addresses = parse_from_symbols(symbols, @virt_addresses)
-        @phys_addresses = virt_to_phys(@virt_addresses)
-
-        @descriptors = parse_descriptors
-        update_max_descriptor_name_length
-
-        @text_section_offset_in_elf = parse_text_section_offset_in_elf(kernel_elf)
+        @virt_addr_of_kernel_tables = KERNEL_ELF.symbol_value('KERNEL_TABLES')
+        @virt_addr_of_phys_kernel_tables_base_addr = KERNEL_ELF.symbol_value(
+            'PHYS_KERNEL_TABLES_BASE_ADDR'
+        )
     end
 
-    def rw_end_exclusive
-        @virt_addresses[:rw_end_exclusive]
+    def phys_addr_of_kernel_tables
+        KERNEL_ELF.virt_to_phys(@virt_addr_of_kernel_tables)
     end
 
-    def phys_table_struct_start_addr
-        @phys_addresses[:table_struct_start_addr]
+    def kernel_tables_offset_in_file
+        KERNEL_ELF.virt_addr_to_file_offset(@virt_addr_of_kernel_tables)
     end
 
-    def table_struct_offset_in_kernel_elf
-        (@virt_addresses[:table_struct_start_addr] - @virt_addresses[:rx_start]) +
-            @text_section_offset_in_elf
-    end
-
-    def phys_tables_base_addr
-        @phys_addresses[:phys_tables_base_addr]
-    end
-
-    def phys_tables_base_addr_offset_in_kernel_elf
-        (@virt_addresses[:phys_tables_base_addr] - @virt_addresses[:rx_start]) +
-            @text_section_offset_in_elf
+    def phys_kernel_tables_base_addr_offset_in_file
+        KERNEL_ELF.virt_addr_to_file_offset(@virt_addr_of_phys_kernel_tables_base_addr)
     end
 
     def phys_addr_space_end_page
@@ -76,102 +47,4 @@ def phys_addr_space_end_page
 
         x.scan(/\d+/).join.to_i(16)
     end
-
-    def kernel_map_binary
-        MappingDescriptor.print_header
-
-        @descriptors.each do |i|
-            print 'Generating'.rjust(12).green.bold
-            print ' '
-            puts i.to_s
-
-            TRANSLATION_TABLES.map_pages_at(i.virt_pages, i.phys_pages, i.attributes)
-        end
-
-        MappingDescriptor.print_divider
-    end
-
-    private
-
-    def parse_from_symbols(symbols, input)
-        case input.class.to_s
-        when 'Regexp'
-            symbols.grep(input).first.split.first.to_i(16)
-        when 'Hash'
-            input.transform_values do |val|
-                symbols.grep(val).first.split.first.to_i(16)
-            end
-        else
-            raise
-        end
-    end
-
-    def parse_text_section_offset_in_elf(kernel_elf)
-        `#{READELF_BINARY} --sections #{kernel_elf}`.scan(/.text.*/).first.split.last.to_i(16)
-    end
-
-    def virt_to_phys(input)
-        case input.class.to_s
-        when 'Integer'
-            input - @kernel_virt_start_addr
-        when 'Hash'
-            input.transform_values do |val|
-                val - @kernel_virt_start_addr
-            end
-        else
-            raise
-        end
-    end
-
-    def descriptor_ro
-        name = 'Code and RO data'
-
-        ro_size = @virt_addresses[:rx_end_exclusive] -
-                  @virt_addresses[:rx_start]
-
-        virt_ro_pages = PageArray.new(@virt_addresses[:rx_start], ro_size, @kernel_granule::SIZE)
-        phys_ro_pages = PageArray.new(@phys_addresses[:rx_start], ro_size, @kernel_granule::SIZE)
-        ro_attribues = AttributeFields.new(:CacheableDRAM, :ReadOnly, :X)
-
-        MappingDescriptor.new(name, virt_ro_pages, phys_ro_pages, ro_attribues)
-    end
-
-    def descriptor_data
-        name = 'Data and bss'
-
-        data_size = @virt_addresses[:rw_end_exclusive] -
-                    @virt_addresses[:rw_start]
-
-        virt_data_pages = PageArray.new(@virt_addresses[:rw_start], data_size,
-                                        @kernel_granule::SIZE)
-        phys_data_pages = PageArray.new(@phys_addresses[:rw_start], data_size,
-                                        @kernel_granule::SIZE)
-        data_attribues = AttributeFields.new(:CacheableDRAM, :ReadWrite, :XN)
-
-        MappingDescriptor.new(name, virt_data_pages, phys_data_pages, data_attribues)
-    end
-
-    def descriptor_boot_core_stack
-        name = 'Boot-core stack'
-
-        boot_core_stack_size = @virt_addresses[:boot_core_stack_end_exclusive] -
-                               @virt_addresses[:boot_core_stack_start]
-
-        virt_boot_core_stack_pages = PageArray.new(@virt_addresses[:boot_core_stack_start],
-                                                   boot_core_stack_size, @kernel_granule::SIZE)
-        phys_boot_core_stack_pages = PageArray.new(@phys_addresses[:boot_core_stack_start],
-                                                   boot_core_stack_size, @kernel_granule::SIZE)
-        boot_core_stack_attribues = AttributeFields.new(:CacheableDRAM, :ReadWrite, :XN)
-
-        MappingDescriptor.new(name, virt_boot_core_stack_pages, phys_boot_core_stack_pages,
-                              boot_core_stack_attribues)
-    end
-
-    def parse_descriptors
-        [descriptor_ro, descriptor_data, descriptor_boot_core_stack]
-    end
-
-    def update_max_descriptor_name_length
-        MappingDescriptor.max_descriptor_name_length = @descriptors.map { |i| i.name.size }.max
-    end
 end
diff --git a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/generic.rb b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/generic.rb
index ca952bc80..977e92574 100644
--- a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/generic.rb
+++ b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/generic.rb
@@ -27,6 +27,12 @@ def aligned?(alignment)
         (self & (alignment - 1)).zero?
     end
 
+    def align_up(alignment)
+        raise unless alignment.power_of_two?
+
+        (self + alignment - 1) & ~(alignment - 1)
+    end
+
     def to_hex_underscore(with_leading_zeros: false)
         fmt = with_leading_zeros ? '%016x' : '%x'
         value = format(fmt, self).to_s.reverse.scan(/.{4}|.+/).join('_').reverse
@@ -36,7 +42,7 @@ def to_hex_underscore(with_leading_zeros: false)
 end
 
 # An array where each value is the start address of a Page.
-class PageArray < Array
+class MemoryRegion < Array
     def initialize(start_addr, size, granule_size)
         raise unless start_addr.aligned?(granule_size)
         raise unless size.positive?
@@ -58,68 +64,116 @@ def initialize(mem_attributes, acc_perms, execute_never)
         @acc_perms = acc_perms
         @execute_never = execute_never
     end
+
+    def to_s
+        x = case @mem_attributes
+            when :CacheableDRAM
+                'C'
+            else
+                '?'
+            end
+
+        y = case @acc_perms
+            when :ReadWrite
+                'RW'
+            when :ReadOnly
+                'RO'
+            else
+                '??'
+            end
+
+        z = @execute_never ? 'XN' : 'X '
+
+        "#{x} #{y} #{z}"
+    end
 end
 
-# A container that describes a one- or many-page virt-to-phys mapping.
+# A container that describes a virt-to-phys region mapping.
 class MappingDescriptor
-    @max_descriptor_name_length = 0
+    @max_section_name_length = 'Sections'.length
 
     class << self
-        attr_accessor :max_descriptor_name_length
+        attr_accessor :max_section_name_length
+
+        def update_max_section_name_length(length)
+            @max_section_name_length = [@max_section_name_length, length].max
+        end
     end
 
-    attr_reader :name, :virt_pages, :phys_pages, :attributes
+    attr_reader :name, :virt_region, :phys_region, :attributes
 
-    def initialize(name, virt_pages, phys_pages, attributes)
+    def initialize(name, virt_region, phys_region, attributes)
         @name = name
-        @virt_pages = virt_pages
-        @phys_pages = phys_pages
+        @virt_region = virt_region
+        @phys_region = phys_region
         @attributes = attributes
     end
 
     def to_s
-        name = @name.ljust(self.class.max_descriptor_name_length)
-        virt_start = @virt_pages.first.to_hex_underscore(with_leading_zeros: true)
-        size = ((@virt_pages.size * 65_536) / 1024).to_s.rjust(3)
+        name = @name.ljust(self.class.max_section_name_length)
+        virt_start = @virt_region.first.to_hex_underscore(with_leading_zeros: true)
+        phys_start = @phys_region.first.to_hex_underscore(with_leading_zeros: true)
+        size = ((@virt_region.size * 65_536) / 1024).to_s.rjust(3)
 
-        "#{name} | #{virt_start} | #{size} KiB"
+        "#{name} | #{virt_start} | #{phys_start} | #{size} KiB | #{@attributes}"
     end
 
     def self.print_divider
         print '             '
-        print '-' * max_descriptor_name_length
-        puts '----------------------------------'
+        print '-' * max_section_name_length
+        puts '--------------------------------------------------------------------'
     end
 
     def self.print_header
         print_divider
         print '             '
-        print 'Section'.center(max_descriptor_name_length)
+        print 'Sections'.center(max_section_name_length)
         print '   '
-        print 'Start Virt Addr'.center(21)
+        print 'Virt Start Addr'.center(21)
+        print '   '
+        print 'Phys Start Addr'.center(21)
         print '   '
         print 'Size'.center(7)
+        print '   '
+        print 'Attr'.center(7)
         puts
         print_divider
     end
 end
 
-def kernel_patch_tables(kernel_binary)
+def kernel_map_binary
+    mapping_descriptors = KERNEL_ELF.generate_mapping_descriptors
+
+    # Generate_mapping_descriptors updates the header being printed with this call. So it must come
+    # afterwards.
+    MappingDescriptor.print_header
+
+    mapping_descriptors.each do |i|
+        print 'Generating'.rjust(12).green.bold
+        print ' '
+        puts i.to_s
+
+        TRANSLATION_TABLES.map_at(i.virt_region, i.phys_region, i.attributes)
+    end
+
+    MappingDescriptor.print_divider
+end
+
+def kernel_patch_tables(kernel_elf_path)
     print 'Patching'.rjust(12).green.bold
-    print ' Kernel table struct at physical '
-    puts BSP.phys_table_struct_start_addr.to_hex_underscore
+    print ' Kernel table struct at ELF file offset '
+    puts BSP.kernel_tables_offset_in_file.to_hex_underscore
 
-    File.binwrite(kernel_binary, TRANSLATION_TABLES.to_binary,
-                  BSP.table_struct_offset_in_kernel_elf)
+    File.binwrite(kernel_elf_path, TRANSLATION_TABLES.to_binary, BSP.kernel_tables_offset_in_file)
 end
 
-def kernel_patch_base_addr(kernel_binary)
+def kernel_patch_base_addr(kernel_elf_path)
     print 'Patching'.rjust(12).green.bold
-    print ' Value of kernel table physical base address ('
+    print ' Kernel tables physical base address start argument to value '
     print TRANSLATION_TABLES.phys_tables_base_addr.to_hex_underscore
-    print ') at physical '
-    puts BSP.phys_tables_base_addr.to_hex_underscore
+    print ' at ELF file offset '
+    puts BSP.phys_kernel_tables_base_addr_offset_in_file.to_hex_underscore
 
-    File.binwrite(kernel_binary, TRANSLATION_TABLES.phys_tables_base_addr_binary,
-                  BSP.phys_tables_base_addr_offset_in_kernel_elf)
+    File.binwrite(kernel_elf_path, TRANSLATION_TABLES.phys_tables_base_addr_binary,
+                  BSP.phys_kernel_tables_base_addr_offset_in_file)
 end
diff --git a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/kernel_elf.rb b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/kernel_elf.rb
new file mode 100644
index 000000000..a467856e0
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/kernel_elf.rb
@@ -0,0 +1,92 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+
+# KernelELF
+class KernelELF
+    SECTION_FLAG_ALLOC = 2
+
+    def initialize(kernel_elf_path)
+        @elf = ELFTools::ELFFile.new(File.open(kernel_elf_path))
+        @symtab_section = @elf.section_by_name('.symtab')
+    end
+
+    def symbol_value(symbol_name)
+        @symtab_section.symbol_by_name(symbol_name).header.st_value
+    end
+
+    def segment_containing_virt_addr(virt_addr)
+        @elf.each_segments do |segment|
+            return segment if segment.vma_in?(virt_addr)
+        end
+    end
+
+    def virt_to_phys(virt_addr)
+        segment = segment_containing_virt_addr(virt_addr)
+        translation_offset = segment.header.p_vaddr - segment.header.p_paddr
+
+        virt_addr - translation_offset
+    end
+
+    def virt_addr_to_file_offset(virt_addr)
+        segment = segment_containing_virt_addr(virt_addr)
+        segment.vma_to_offset(virt_addr)
+    end
+
+    def sections_in_segment(segment)
+        head = segment.mem_head
+        tail = segment.mem_tail
+
+        sections = @elf.each_sections.select do |section|
+            file_offset = section.header.sh_addr
+            flags = section.header.sh_flags
+
+            file_offset >= head && file_offset < tail && (flags & SECTION_FLAG_ALLOC != 0)
+        end
+
+        sections.map(&:name).join(' ')
+    end
+
+    def select_load_segments
+        @elf.each_segments.select do |segment|
+            segment.instance_of?(ELFTools::Segments::LoadSegment)
+        end
+    end
+
+    def segment_get_acc_perms(segment)
+        if segment.readable? && segment.writable?
+            :ReadWrite
+        elsif segment.readable?
+            :ReadOnly
+        else
+            :Invalid
+        end
+    end
+
+    def update_max_section_name_length(descriptors)
+        MappingDescriptor.update_max_section_name_length(descriptors.map { |i| i.name.size }.max)
+    end
+
+    def generate_mapping_descriptors
+        descriptors = select_load_segments.map do |segment|
+            # Assume each segment is page aligned.
+            size = segment.mem_size.align_up(BSP.kernel_granule::SIZE)
+            virt_start_addr = segment.header.p_vaddr
+            phys_start_addr = segment.header.p_paddr
+            acc_perms = segment_get_acc_perms(segment)
+            execute_never = !segment.executable?
+            section_names = sections_in_segment(segment)
+
+            virt_region = MemoryRegion.new(virt_start_addr, size, BSP.kernel_granule::SIZE)
+            phys_region = MemoryRegion.new(phys_start_addr, size, BSP.kernel_granule::SIZE)
+            attributes = AttributeFields.new(:CacheableDRAM, acc_perms, execute_never)
+
+            MappingDescriptor.new(section_names, virt_region, phys_region, attributes)
+        end
+
+        update_max_section_name_length(descriptors)
+        descriptors
+    end
+end
diff --git a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/main.rb b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/main.rb
index 5200a4858..5485cc61a 100755
--- a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/main.rb
+++ b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/main.rb
@@ -7,13 +7,15 @@
 
 TARGET = ARGV[0].split('-').first.to_sym
 BSP_TYPE = ARGV[1].to_sym
-kernel_elf = ARGV[2]
+kernel_elf_path = ARGV[2]
 
 require 'rubygems'
 require 'bundler/setup'
 require 'colorize'
+require 'elftools'
 
 require_relative 'generic'
+require_relative 'kernel_elf'
 require_relative 'bsp'
 require_relative 'arch'
 
@@ -22,9 +24,11 @@
 
 start = Time.now
 
+KERNEL_ELF = KernelELF.new(kernel_elf_path)
+
 BSP = case BSP_TYPE
       when :rpi3, :rpi4
-          RaspberryPi.new(kernel_elf)
+          RaspberryPi.new
       else
           raise
       end
@@ -36,10 +40,9 @@
                          raise
                      end
 
-BSP.kernel_map_binary
-
-kernel_patch_tables(kernel_elf)
-kernel_patch_base_addr(kernel_elf)
+kernel_map_binary
+kernel_patch_tables(kernel_elf_path)
+kernel_patch_base_addr(kernel_elf_path)
 
 elapsed = Time.now - start
 
diff --git a/Gemfile b/Gemfile
index b6fad4ea1..7ac3b89ec 100644
--- a/Gemfile
+++ b/Gemfile
@@ -3,6 +3,7 @@
 source 'https://rubygems.org'
 
 gem 'colorize'
+gem 'elftools'
 
 group :uart do
     gem 'ruby-progressbar'
diff --git a/X1_JTAG_boot/src/bsp/raspberrypi/link.ld b/X1_JTAG_boot/src/bsp/raspberrypi/link.ld
index cf63a4a64..7c01ccbf5 100644
--- a/X1_JTAG_boot/src/bsp/raspberrypi/link.ld
+++ b/X1_JTAG_boot/src/bsp/raspberrypi/link.ld
@@ -3,25 +3,44 @@
  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
  */
 
-/* The address at which the the kernel binary will be loaded by the Raspberry's firmware */
-__rpi_load_addr = 0x80000;
+__rpi_phys_dram_start_addr = 0;
 
-ENTRY(__rpi_load_addr)
+/* The physical address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_phys_binary_load_addr = 0x80000;
 
+
+ENTRY(__rpi_phys_binary_load_addr)
+
+/* Flags:
+ *     4 == R
+ *     5 == RX
+ *     6 == RW
+ *
+ * Segments are marked PT_LOAD below so that the ELF file provides virtual and physical addresses.
+ * It doesn't mean all of them need actually be loaded.
+ */
 PHDRS
 {
-    segment_rx PT_LOAD FLAGS(5); /* 5 == RX */
-    segment_rw PT_LOAD FLAGS(6); /* 6 == RW */
+    segment_boot_core_stack PT_LOAD FLAGS(6);
+    segment_code            PT_LOAD FLAGS(5);
+    segment_data            PT_LOAD FLAGS(6);
 }
 
 SECTIONS
 {
-    . =  __rpi_load_addr;
-                                        /*   ^             */
-                                        /*   | stack       */
-                                        /*   | growth      */
-                                        /*   | direction   */
-   __boot_core_stack_end_exclusive = .; /*   |             */
+    . =  __rpi_phys_dram_start_addr;
+
+    /***********************************************************************************************
+    * Boot Core Stack
+    ***********************************************************************************************/
+    .boot_core_stack (NOLOAD) :
+    {
+                                             /*   ^             */
+                                             /*   | stack       */
+        . += __rpi_phys_binary_load_addr;    /*   | growth      */
+                                             /*   | direction   */
+        __boot_core_stack_end_exclusive = .; /*   |             */
+    } :segment_boot_core_stack
 
     /***********************************************************************************************
     * Code + RO Data + Global Offset Table
@@ -32,22 +51,22 @@ SECTIONS
         *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
         *(.text._start_rust)      /* The Rust entry point */
         *(.text*)                 /* Everything else */
-    } :segment_rx
+    } :segment_code
 
-    .rodata : ALIGN(8) { *(.rodata*) } :segment_rx
-    .got    : ALIGN(8) { *(.got)     } :segment_rx
+    .rodata : ALIGN(8) { *(.rodata*) } :segment_code
+    .got    : ALIGN(8) { *(.got)     } :segment_code
 
     /***********************************************************************************************
     * Data + BSS
     ***********************************************************************************************/
-    .data : { *(.data*) } :segment_rw
+    .data : { *(.data*) } :segment_data
 
     /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
-    .bss : ALIGN(16)
+    .bss (NOLOAD) : ALIGN(16)
     {
         __bss_start = .;
         *(.bss*);
         . = ALIGN(16);
         __bss_end_exclusive = .;
-    } :NONE
+    } :segment_data
 }
diff --git a/common/docker.mk b/common/docker.mk
index c4b92f73d..61355768f 100644
--- a/common/docker.mk
+++ b/common/docker.mk
@@ -1 +1 @@
-DOCKER_IMAGE = rustembedded/osdev-utils:2021.11
+DOCKER_IMAGE := rustembedded/osdev-utils:2021.12
diff --git a/docker/rustembedded-osdev-utils/Makefile b/docker/rustembedded-osdev-utils/Makefile
index c69ce62d0..161abc7bc 100644
--- a/docker/rustembedded-osdev-utils/Makefile
+++ b/docker/rustembedded-osdev-utils/Makefile
@@ -4,7 +4,7 @@
 
 # Reference followed: https://www.docker.com/blog/getting-started-with-docker-for-arm-on-linux
 
-TAG=2021.11
+TAG := 2021.12
 
 default: build_local
 
@@ -12,7 +12,7 @@ build_local:
 	cp ../../Gemfile .
 	docker build                                           \
 	    --tag rustembedded/osdev-utils:$(TAG)              \
-	    --build-arg VCS_REF=`git rev-parse --short HEAD` . \
+	    --build-arg VCS_REF=`git rev-parse --short HEAD` .
 	rm Gemfile
 
 buildx_push:

From b8227b7e5dbf9b50adde76e5e2cf5a697a82f3b2 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Thu, 2 Dec 2021 23:10:18 +0100
Subject: [PATCH 103/214] Typos

---
 14_virtual_mem_part2_mmio_remap/README.md        | 16 ++++++++--------
 .../src/memory/mmu.rs                            |  8 ++++----
 .../README.md                                    | 10 ++++------
 3 files changed, 16 insertions(+), 18 deletions(-)

diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index 2e62c878a..cb87b91c1 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -57,8 +57,8 @@ separation, this tutorial makes a start by changing the following things:
 
 1. Instead of bulk-`identity mapping` the whole of the board's address space, only the particular
    parts that are needed will be mapped.
-1. For now, the `kernel binary` stays identity mapped. This will be changed in the in the coming
-   tutorials as it is a quite difficult and peculiar exercise to remap the kernel.
+1. For now, the `kernel binary` stays identity mapped. This will be changed in the coming tutorials
+   as it is a quite difficult and peculiar exercise to remap the kernel.
 1. Device `MMIO regions` are lazily remapped during a device driver's `init()`.
    1. A dedicated region of virtual addresses that we reserve using `BSP` code and the `linker
       script` is used for this.
@@ -162,8 +162,8 @@ use:
 /// Prevents mapping into the MMIO range of the tables.
 pub unsafe fn kernel_map_at(
     name: &'static str,
-    virt_pages: &MemoryRegion<Virtual>,
-    phys_pages: &MemoryRegion<Physical>,
+    virt_region: &MemoryRegion<Virtual>,
+    phys_region: &MemoryRegion<Physical>,
     attr: &AttributeFields,
 ) -> Result<(), &'static str>;
 
@@ -3207,11 +3207,11 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 14_virtual_mem_p
 +/// - Does not prevent aliasing. Currently, the callers must be trusted.
 +pub unsafe fn kernel_map_at(
 +    name: &'static str,
-+    virt_pages: &MemoryRegion<Virtual>,
-+    phys_pages: &MemoryRegion<Physical>,
++    virt_region: &MemoryRegion<Virtual>,
++    phys_region: &MemoryRegion<Physical>,
 +    attr: &AttributeFields,
 +) -> Result<(), &'static str> {
-+    if bsp::memory::mmu::virt_mmio_remap_region().overlaps(virt_pages) {
++    if bsp::memory::mmu::virt_mmio_remap_region().overlaps(virt_region) {
 +        return Err("Attempt to manually map into MMIO region");
      }
 -}
@@ -3238,7 +3238,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 14_virtual_mem_p
 -        } else {
 -            (size, "Byte")
 -        };
-+    kernel_map_at_unchecked(name, virt_pages, phys_pages, attr)?;
++    kernel_map_at_unchecked(name, virt_region, phys_region, attr)?;
 
 -        let attr = match self.attribute_fields.mem_attributes {
 -            MemAttributes::CacheableDRAM => "C",
diff --git a/14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs b/14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
index e833dd1a6..efc87a33b 100644
--- a/14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
@@ -165,15 +165,15 @@ impl<const AS_SIZE: usize> AddressSpace<AS_SIZE> {
 /// - Does not prevent aliasing. Currently, the callers must be trusted.
 pub unsafe fn kernel_map_at(
     name: &'static str,
-    virt_pages: &MemoryRegion<Virtual>,
-    phys_pages: &MemoryRegion<Physical>,
+    virt_region: &MemoryRegion<Virtual>,
+    phys_region: &MemoryRegion<Physical>,
     attr: &AttributeFields,
 ) -> Result<(), &'static str> {
-    if bsp::memory::mmu::virt_mmio_remap_region().overlaps(virt_pages) {
+    if bsp::memory::mmu::virt_mmio_remap_region().overlaps(virt_region) {
         return Err("Attempt to manually map into MMIO region");
     }
 
-    kernel_map_at_unchecked(name, virt_pages, phys_pages, attr)?;
+    kernel_map_at_unchecked(name, virt_region, phys_region, attr)?;
 
     Ok(())
 }
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index a8d6f8f3c..97188d491 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -1578,20 +1578,18 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs 15_virtual_mem_part3
 +/// Add an entry to the mapping info record.
 +pub fn kernel_add_mapping_record(
      name: &'static str,
--    virt_pages: &MemoryRegion<Virtual>,
--    phys_pages: &MemoryRegion<Physical>,
-+    virt_region: &MemoryRegion<Virtual>,
-+    phys_region: &MemoryRegion<Physical>,
+     virt_region: &MemoryRegion<Virtual>,
+     phys_region: &MemoryRegion<Physical>,
      attr: &AttributeFields,
 -) -> Result<(), &'static str> {
--    if bsp::memory::mmu::virt_mmio_remap_region().overlaps(virt_pages) {
+-    if bsp::memory::mmu::virt_mmio_remap_region().overlaps(virt_region) {
 -        return Err("Attempt to manually map into MMIO region");
 +) {
 +    if let Err(x) = mapping_record::kernel_add(name, virt_region, phys_region, attr) {
 +        warn!("{}", x);
      }
 -
--    kernel_map_at_unchecked(name, virt_pages, phys_pages, attr)?;
+-    kernel_map_at_unchecked(name, virt_region, phys_region, attr)?;
 -
 -    Ok(())
  }

From ea8ef5a7f1ae31837cf49a3a1ee691c907d0a7df Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Thu, 2 Dec 2021 23:36:52 +0100
Subject: [PATCH 104/214] More Readme fixes

---
 14_virtual_mem_part2_mmio_remap/README.md         | 2 +-
 15_virtual_mem_part3_precomputed_tables/README.md | 4 +---
 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index cb87b91c1..8fac022aa 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -239,7 +239,7 @@ of a raw address. The following is an example for the `UART`:
 impl PL011Uart {
     /// Create an instance.
     pub const unsafe fn new(
-        phys_mmio_descriptor: memory::mmu::MMIODescriptor<Physical>,
+        mmio_descriptor: memory::mmu::MMIODescriptor,
         irq_number: bsp::device_driver::IRQNumber,
     ) -> Self {
         Self {
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index 97188d491..f0067cda4 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -528,9 +528,7 @@ pub unsafe extern "C" fn _start_rust(
 
     // Turn on the MMU for EL1.
     let addr = Address::new(phys_kernel_tables_base_addr as usize);
-    if unlikely(memory::mmu::enable_mmu_and_caching(addr).is_err()) {
-        cpu::wait_forever();
-    }
+    memory::mmu::enable_mmu_and_caching(addr).unwrap();
 
     // Use `eret` to "return" to EL1. This results in execution of kernel_init() in EL1.
     asm::eret()

From 7d025375156097127e788d6d983a83d043e68a1c Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 20 Dec 2021 00:01:38 +0100
Subject: [PATCH 105/214] Bump toolchain

---
 01_wait_forever/src/_arch/aarch64/cpu/boot.rs |   2 +-
 01_wait_forever/src/main.rs                   |   2 -
 02_runtime_init/Cargo.lock                    |   4 +-
 02_runtime_init/Cargo.toml                    |   3 +-
 02_runtime_init/README.md                     |  13 ++----
 02_runtime_init/src/_arch/aarch64/cpu/boot.rs |   2 +-
 02_runtime_init/src/main.rs                   |   1 -
 03_hacky_hello_world/Cargo.lock               |   4 +-
 03_hacky_hello_world/Cargo.toml               |   3 +-
 03_hacky_hello_world/README.md                |   5 +-
 .../src/_arch/aarch64/cpu/boot.rs             |   2 +-
 03_hacky_hello_world/src/main.rs              |   1 -
 04_safe_globals/Cargo.lock                    |   4 +-
 04_safe_globals/Cargo.toml                    |   3 +-
 04_safe_globals/README.md                     |   8 ++--
 04_safe_globals/src/_arch/aarch64/cpu/boot.rs |   2 +-
 04_safe_globals/src/main.rs                   |   1 -
 05_drivers_gpio_uart/Cargo.lock               |   4 +-
 05_drivers_gpio_uart/Cargo.toml               |   3 +-
 05_drivers_gpio_uart/README.md                |   8 ++--
 .../src/_arch/aarch64/cpu/boot.rs             |   2 +-
 05_drivers_gpio_uart/src/main.rs              |   1 -
 06_uart_chainloader/Cargo.lock                |   4 +-
 06_uart_chainloader/Cargo.toml                |   3 +-
 06_uart_chainloader/README.md                 |  43 +++++++-----------
 06_uart_chainloader/demo_payload_rpi3.img     | Bin 6872 -> 6664 bytes
 06_uart_chainloader/demo_payload_rpi4.img     | Bin 6712 -> 6512 bytes
 .../src/_arch/aarch64/cpu/boot.rs             |   2 +-
 06_uart_chainloader/src/main.rs               |   2 -
 07_timestamps/Cargo.lock                      |   4 +-
 07_timestamps/Cargo.toml                      |   3 +-
 07_timestamps/README.md                       |  12 +----
 07_timestamps/src/_arch/aarch64/cpu/boot.rs   |   2 +-
 07_timestamps/src/main.rs                     |   1 -
 08_hw_debug_JTAG/Cargo.lock                   |   4 +-
 08_hw_debug_JTAG/Cargo.toml                   |   3 +-
 .../src/_arch/aarch64/cpu/boot.rs             |   2 +-
 08_hw_debug_JTAG/src/main.rs                  |   1 -
 09_privilege_level/Cargo.lock                 |   4 +-
 09_privilege_level/Cargo.toml                 |   3 +-
 09_privilege_level/README.md                  |  25 +++++-----
 .../src/_arch/aarch64/cpu/boot.rs             |   1 +
 09_privilege_level/src/main.rs                |   1 -
 .../Cargo.lock                                |   4 +-
 .../Cargo.toml                                |   3 +-
 .../README.md                                 |  10 ++--
 .../src/_arch/aarch64/cpu/boot.rs             |   1 +
 .../src/main.rs                               |   1 -
 11_exceptions_part1_groundwork/Cargo.lock     |   4 +-
 11_exceptions_part1_groundwork/Cargo.toml     |   3 +-
 11_exceptions_part1_groundwork/README.md      |   6 +--
 .../src/_arch/aarch64/cpu/boot.rs             |   1 +
 .../src/_arch/aarch64/exception.rs            |   2 +-
 11_exceptions_part1_groundwork/src/main.rs    |   1 -
 12_integrated_testing/Cargo.lock              |   8 ++--
 12_integrated_testing/Cargo.toml              |   4 +-
 12_integrated_testing/README.md               |  20 ++++----
 .../src/_arch/aarch64/cpu/boot.rs             |   1 +
 .../src/_arch/aarch64/exception.rs            |   2 +-
 12_integrated_testing/src/lib.rs              |   1 -
 .../Cargo.lock                                |   8 ++--
 .../Cargo.toml                                |   4 +-
 13_exceptions_part2_peripheral_IRQs/README.md |  14 +++---
 .../src/_arch/aarch64/cpu/boot.rs             |   1 +
 .../src/_arch/aarch64/exception.rs            |   2 +-
 .../_arch/aarch64/exception/asynchronous.rs   |   1 +
 .../src/lib.rs                                |   3 +-
 14_virtual_mem_part2_mmio_remap/Cargo.lock    |   8 ++--
 14_virtual_mem_part2_mmio_remap/Cargo.toml    |   4 +-
 14_virtual_mem_part2_mmio_remap/README.md     |  17 ++++---
 .../src/_arch/aarch64/cpu/boot.rs             |   1 +
 .../src/_arch/aarch64/exception.rs            |   2 +-
 .../_arch/aarch64/exception/asynchronous.rs   |   1 +
 .../src/bsp/device_driver/arm/gicv2.rs        |   4 +-
 14_virtual_mem_part2_mmio_remap/src/lib.rs    |   3 +-
 14_virtual_mem_part2_mmio_remap/src/memory.rs |   2 +
 .../Cargo.lock                                |   8 ++--
 .../Cargo.toml                                |   4 +-
 .../README.md                                 |  11 +++--
 .../src/_arch/aarch64/cpu/boot.rs             |   1 +
 .../src/_arch/aarch64/exception.rs            |   2 +-
 .../_arch/aarch64/exception/asynchronous.rs   |   1 +
 .../src/bsp/device_driver/arm/gicv2.rs        |   4 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |   1 +
 .../src/lib.rs                                |   3 +-
 .../src/memory.rs                             |   2 +
 .../Cargo.lock                                |   8 ++--
 .../Cargo.toml                                |   4 +-
 .../README.md                                 |  12 ++---
 .../src/_arch/aarch64/cpu/boot.rs             |   1 +
 .../src/_arch/aarch64/exception.rs            |   2 +-
 .../_arch/aarch64/exception/asynchronous.rs   |   1 +
 .../src/bsp/device_driver/arm/gicv2.rs        |   4 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |   1 +
 .../src/lib.rs                                |   3 +-
 .../src/memory.rs                             |   2 +
 X1_JTAG_boot/Cargo.lock                       |   4 +-
 X1_JTAG_boot/Cargo.toml                       |   3 +-
 X1_JTAG_boot/jtag_boot_rpi3.img               | Bin 8016 -> 7832 bytes
 X1_JTAG_boot/jtag_boot_rpi4.img               | Bin 6736 -> 6520 bytes
 X1_JTAG_boot/src/_arch/aarch64/cpu/boot.rs    |   2 +-
 X1_JTAG_boot/src/main.rs                      |   1 -
 rust-toolchain.toml                           |   2 +-
 103 files changed, 198 insertions(+), 234 deletions(-)

diff --git a/01_wait_forever/src/_arch/aarch64/cpu/boot.rs b/01_wait_forever/src/_arch/aarch64/cpu/boot.rs
index 4bc6ed6da..13aee3a3e 100644
--- a/01_wait_forever/src/_arch/aarch64/cpu/boot.rs
+++ b/01_wait_forever/src/_arch/aarch64/cpu/boot.rs
@@ -12,4 +12,4 @@
 //! crate::cpu::boot::arch_boot
 
 // Assembly counterpart to this file.
-global_asm!(include_str!("boot.s"));
+core::arch::global_asm!(include_str!("boot.s"));
diff --git a/01_wait_forever/src/main.rs b/01_wait_forever/src/main.rs
index b01a84cb0..84e9c8c19 100644
--- a/01_wait_forever/src/main.rs
+++ b/01_wait_forever/src/main.rs
@@ -103,8 +103,6 @@
 //! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
 //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
 
-#![feature(asm)]
-#![feature(global_asm)]
 #![no_main]
 #![no_std]
 
diff --git a/02_runtime_init/Cargo.lock b/02_runtime_init/Cargo.lock
index 1fd038991..19fc8b73f 100644
--- a/02_runtime_init/Cargo.lock
+++ b/02_runtime_init/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "6.1.0"
+version = "7.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "509fc35485a2b4ddbacabe0bf2212cdfff88da93658608e5cc651afcb75b7733"
+checksum = "b27f5d071b671f9799dfdf0c0afcec11de65195383d36e186639c83b00705e4f"
 dependencies = [
  "tock-registers",
 ]
diff --git a/02_runtime_init/Cargo.toml b/02_runtime_init/Cargo.toml
index c4fd83e38..52786a400 100644
--- a/02_runtime_init/Cargo.toml
+++ b/02_runtime_init/Cargo.toml
@@ -24,5 +24,4 @@ path = "src/main.rs"
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "6.x.x" }
-
+cortex-a = { version = "7.x.x" }
diff --git a/02_runtime_init/README.md b/02_runtime_init/README.md
index 7c8d44cf9..530c1a3fd 100644
--- a/02_runtime_init/README.md
+++ b/02_runtime_init/README.md
@@ -40,15 +40,14 @@ diff -uNr 01_wait_forever/Cargo.toml 02_runtime_init/Cargo.toml
  authors = ["Andre Richter <andre.o.richter@gmail.com>"]
  edition = "2021"
 
-@@ -21,3 +21,8 @@
+@@ -21,3 +21,7 @@
  ##--------------------------------------------------------------------------------------------------
 
  [dependencies]
 +
 +# Platform specific dependencies
 +[target.'cfg(target_arch = "aarch64")'.dependencies]
-+cortex-a = { version = "6.x.x" }
-+
++cortex-a = { version = "7.x.x" }
 
 diff -uNr 01_wait_forever/Makefile 02_runtime_init/Makefile
 --- 01_wait_forever/Makefile
@@ -69,7 +68,7 @@ diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.rs 02_runtime_init/src/_arc
 @@ -13,3 +13,15 @@
 
  // Assembly counterpart to this file.
- global_asm!(include_str!("boot.s"));
+ core::arch::global_asm!(include_str!("boot.s"));
 +
 +//--------------------------------------------------------------------------------------------------
 +// Public Code
@@ -303,17 +302,15 @@ diff -uNr 01_wait_forever/src/cpu.rs 02_runtime_init/src/cpu.rs
 diff -uNr 01_wait_forever/src/main.rs 02_runtime_init/src/main.rs
 --- 01_wait_forever/src/main.rs
 +++ 02_runtime_init/src/main.rs
-@@ -102,8 +102,8 @@
+@@ -102,6 +102,7 @@
  //!
  //! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
  //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
 +//! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
--#![feature(asm)]
- #![feature(global_asm)]
  #![no_main]
  #![no_std]
-@@ -112,4 +112,11 @@
+@@ -110,4 +111,11 @@
  mod cpu;
  mod panic_wait;
 
diff --git a/02_runtime_init/src/_arch/aarch64/cpu/boot.rs b/02_runtime_init/src/_arch/aarch64/cpu/boot.rs
index 7513df074..a8defcdae 100644
--- a/02_runtime_init/src/_arch/aarch64/cpu/boot.rs
+++ b/02_runtime_init/src/_arch/aarch64/cpu/boot.rs
@@ -12,7 +12,7 @@
 //! crate::cpu::boot::arch_boot
 
 // Assembly counterpart to this file.
-global_asm!(include_str!("boot.s"));
+core::arch::global_asm!(include_str!("boot.s"));
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/02_runtime_init/src/main.rs b/02_runtime_init/src/main.rs
index cf15402fd..561ee9d2c 100644
--- a/02_runtime_init/src/main.rs
+++ b/02_runtime_init/src/main.rs
@@ -104,7 +104,6 @@
 //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
 //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
-#![feature(global_asm)]
 #![no_main]
 #![no_std]
 
diff --git a/03_hacky_hello_world/Cargo.lock b/03_hacky_hello_world/Cargo.lock
index 1213b3842..cdaf44bfe 100644
--- a/03_hacky_hello_world/Cargo.lock
+++ b/03_hacky_hello_world/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "6.1.0"
+version = "7.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "509fc35485a2b4ddbacabe0bf2212cdfff88da93658608e5cc651afcb75b7733"
+checksum = "b27f5d071b671f9799dfdf0c0afcec11de65195383d36e186639c83b00705e4f"
 dependencies = [
  "tock-registers",
 ]
diff --git a/03_hacky_hello_world/Cargo.toml b/03_hacky_hello_world/Cargo.toml
index 75cf6701c..cca928349 100644
--- a/03_hacky_hello_world/Cargo.toml
+++ b/03_hacky_hello_world/Cargo.toml
@@ -24,5 +24,4 @@ path = "src/main.rs"
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "6.x.x" }
-
+cortex-a = { version = "7.x.x" }
diff --git a/03_hacky_hello_world/README.md b/03_hacky_hello_world/README.md
index c9c5862ac..cb04d3753 100644
--- a/03_hacky_hello_world/README.md
+++ b/03_hacky_hello_world/README.md
@@ -208,12 +208,11 @@ diff -uNr 02_runtime_init/src/console.rs 03_hacky_hello_world/src/console.rs
 diff -uNr 02_runtime_init/src/main.rs 03_hacky_hello_world/src/main.rs
 --- 02_runtime_init/src/main.rs
 +++ 03_hacky_hello_world/src/main.rs
-@@ -104,13 +104,17 @@
+@@ -104,12 +104,16 @@
  //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
  //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
 +#![feature(format_args_nl)]
- #![feature(global_asm)]
 +#![feature(panic_info_message)]
  #![no_main]
  #![no_std]
@@ -226,7 +225,7 @@ diff -uNr 02_runtime_init/src/main.rs 03_hacky_hello_world/src/main.rs
 
  /// Early init code.
  ///
-@@ -118,5 +122,7 @@
+@@ -117,5 +121,7 @@
  ///
  /// - Only a single core must be active and running this function.
  unsafe fn kernel_init() -> ! {
diff --git a/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.rs b/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.rs
index 7513df074..a8defcdae 100644
--- a/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.rs
+++ b/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.rs
@@ -12,7 +12,7 @@
 //! crate::cpu::boot::arch_boot
 
 // Assembly counterpart to this file.
-global_asm!(include_str!("boot.s"));
+core::arch::global_asm!(include_str!("boot.s"));
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/03_hacky_hello_world/src/main.rs b/03_hacky_hello_world/src/main.rs
index de9a05768..7ae7138de 100644
--- a/03_hacky_hello_world/src/main.rs
+++ b/03_hacky_hello_world/src/main.rs
@@ -105,7 +105,6 @@
 //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
 #![feature(format_args_nl)]
-#![feature(global_asm)]
 #![feature(panic_info_message)]
 #![no_main]
 #![no_std]
diff --git a/04_safe_globals/Cargo.lock b/04_safe_globals/Cargo.lock
index bd028f280..08a979d5e 100644
--- a/04_safe_globals/Cargo.lock
+++ b/04_safe_globals/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "6.1.0"
+version = "7.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "509fc35485a2b4ddbacabe0bf2212cdfff88da93658608e5cc651afcb75b7733"
+checksum = "b27f5d071b671f9799dfdf0c0afcec11de65195383d36e186639c83b00705e4f"
 dependencies = [
  "tock-registers",
 ]
diff --git a/04_safe_globals/Cargo.toml b/04_safe_globals/Cargo.toml
index 3d282da6c..cb51da559 100644
--- a/04_safe_globals/Cargo.toml
+++ b/04_safe_globals/Cargo.toml
@@ -24,5 +24,4 @@ path = "src/main.rs"
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "6.x.x" }
-
+cortex-a = { version = "7.x.x" }
diff --git a/04_safe_globals/README.md b/04_safe_globals/README.md
index b03f0c11e..86767a95c 100644
--- a/04_safe_globals/README.md
+++ b/04_safe_globals/README.md
@@ -224,15 +224,15 @@ diff -uNr 03_hacky_hello_world/src/console.rs 04_safe_globals/src/console.rs
 diff -uNr 03_hacky_hello_world/src/main.rs 04_safe_globals/src/main.rs
 --- 03_hacky_hello_world/src/main.rs
 +++ 04_safe_globals/src/main.rs
-@@ -107,6 +107,7 @@
+@@ -106,6 +106,7 @@
+
  #![feature(format_args_nl)]
- #![feature(global_asm)]
  #![feature(panic_info_message)]
 +#![feature(trait_alias)]
  #![no_main]
  #![no_std]
 
-@@ -115,6 +116,7 @@
+@@ -114,6 +115,7 @@
  mod cpu;
  mod panic_wait;
  mod print;
@@ -240,7 +240,7 @@ diff -uNr 03_hacky_hello_world/src/main.rs 04_safe_globals/src/main.rs
 
  /// Early init code.
  ///
-@@ -122,7 +124,15 @@
+@@ -121,7 +123,15 @@
  ///
  /// - Only a single core must be active and running this function.
  unsafe fn kernel_init() -> ! {
diff --git a/04_safe_globals/src/_arch/aarch64/cpu/boot.rs b/04_safe_globals/src/_arch/aarch64/cpu/boot.rs
index 7513df074..a8defcdae 100644
--- a/04_safe_globals/src/_arch/aarch64/cpu/boot.rs
+++ b/04_safe_globals/src/_arch/aarch64/cpu/boot.rs
@@ -12,7 +12,7 @@
 //! crate::cpu::boot::arch_boot
 
 // Assembly counterpart to this file.
-global_asm!(include_str!("boot.s"));
+core::arch::global_asm!(include_str!("boot.s"));
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/04_safe_globals/src/main.rs b/04_safe_globals/src/main.rs
index 82262ea17..dddacdb25 100644
--- a/04_safe_globals/src/main.rs
+++ b/04_safe_globals/src/main.rs
@@ -105,7 +105,6 @@
 //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
 #![feature(format_args_nl)]
-#![feature(global_asm)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
 #![no_main]
diff --git a/05_drivers_gpio_uart/Cargo.lock b/05_drivers_gpio_uart/Cargo.lock
index 8ac198e1e..ff66f5485 100644
--- a/05_drivers_gpio_uart/Cargo.lock
+++ b/05_drivers_gpio_uart/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "6.1.0"
+version = "7.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "509fc35485a2b4ddbacabe0bf2212cdfff88da93658608e5cc651afcb75b7733"
+checksum = "b27f5d071b671f9799dfdf0c0afcec11de65195383d36e186639c83b00705e4f"
 dependencies = [
  "tock-registers",
 ]
diff --git a/05_drivers_gpio_uart/Cargo.toml b/05_drivers_gpio_uart/Cargo.toml
index 44d101419..b2f17d8d3 100644
--- a/05_drivers_gpio_uart/Cargo.toml
+++ b/05_drivers_gpio_uart/Cargo.toml
@@ -27,5 +27,4 @@ tock-registers = { version = "0.7.x", default-features = false, features = ["reg
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "6.x.x" }
-
+cortex-a = { version = "7.x.x" }
diff --git a/05_drivers_gpio_uart/README.md b/05_drivers_gpio_uart/README.md
index 00d232128..e9f59429f 100644
--- a/05_drivers_gpio_uart/README.md
+++ b/05_drivers_gpio_uart/README.md
@@ -140,7 +140,7 @@ diff -uNr 04_safe_globals/Cargo.toml 05_drivers_gpio_uart/Cargo.toml
 +
  # Platform specific dependencies
  [target.'cfg(target_arch = "aarch64")'.dependencies]
- cortex-a = { version = "6.x.x" }
+ cortex-a = { version = "7.x.x" }
 
 diff -uNr 04_safe_globals/Makefile 05_drivers_gpio_uart/Makefile
 --- 04_safe_globals/Makefile
@@ -1340,9 +1340,9 @@ diff -uNr 04_safe_globals/src/main.rs 05_drivers_gpio_uart/src/main.rs
 +#![allow(clippy::upper_case_acronyms)]
 +#![feature(const_fn_fn_ptr_basics)]
  #![feature(format_args_nl)]
- #![feature(global_asm)]
  #![feature(panic_info_message)]
-@@ -114,6 +116,7 @@
+ #![feature(trait_alias)]
+@@ -113,6 +115,7 @@
  mod bsp;
  mod console;
  mod cpu;
@@ -1350,7 +1350,7 @@ diff -uNr 04_safe_globals/src/main.rs 05_drivers_gpio_uart/src/main.rs
  mod panic_wait;
  mod print;
  mod synchronization;
-@@ -123,16 +126,54 @@
+@@ -122,16 +125,54 @@
  /// # Safety
  ///
  /// - Only a single core must be active and running this function.
diff --git a/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs b/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs
index 7513df074..a8defcdae 100644
--- a/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs
+++ b/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs
@@ -12,7 +12,7 @@
 //! crate::cpu::boot::arch_boot
 
 // Assembly counterpart to this file.
-global_asm!(include_str!("boot.s"));
+core::arch::global_asm!(include_str!("boot.s"));
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/05_drivers_gpio_uart/src/main.rs b/05_drivers_gpio_uart/src/main.rs
index 0261a136e..1ca13aebf 100644
--- a/05_drivers_gpio_uart/src/main.rs
+++ b/05_drivers_gpio_uart/src/main.rs
@@ -107,7 +107,6 @@
 #![allow(clippy::upper_case_acronyms)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
-#![feature(global_asm)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
 #![no_main]
diff --git a/06_uart_chainloader/Cargo.lock b/06_uart_chainloader/Cargo.lock
index 98f3ca1c3..c642ff43f 100644
--- a/06_uart_chainloader/Cargo.lock
+++ b/06_uart_chainloader/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "6.1.0"
+version = "7.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "509fc35485a2b4ddbacabe0bf2212cdfff88da93658608e5cc651afcb75b7733"
+checksum = "b27f5d071b671f9799dfdf0c0afcec11de65195383d36e186639c83b00705e4f"
 dependencies = [
  "tock-registers",
 ]
diff --git a/06_uart_chainloader/Cargo.toml b/06_uart_chainloader/Cargo.toml
index 1ea68580f..f00c87a84 100644
--- a/06_uart_chainloader/Cargo.toml
+++ b/06_uart_chainloader/Cargo.toml
@@ -27,5 +27,4 @@ tock-registers = { version = "0.7.x", default-features = false, features = ["reg
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "6.x.x" }
-
+cortex-a = { version = "7.x.x" }
diff --git a/06_uart_chainloader/README.md b/06_uart_chainloader/README.md
index 857a3a83d..ef4bee8c3 100644
--- a/06_uart_chainloader/README.md
+++ b/06_uart_chainloader/README.md
@@ -456,15 +456,7 @@ diff -uNr 05_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs 06_uart_chainloader
 diff -uNr 05_drivers_gpio_uart/src/main.rs 06_uart_chainloader/src/main.rs
 --- 05_drivers_gpio_uart/src/main.rs
 +++ 06_uart_chainloader/src/main.rs
-@@ -105,6 +105,7 @@
- //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
-
- #![allow(clippy::upper_case_acronyms)]
-+#![feature(asm)]
- #![feature(const_fn_fn_ptr_basics)]
- #![feature(format_args_nl)]
- #![feature(global_asm)]
-@@ -142,38 +143,56 @@
+@@ -141,38 +141,56 @@
      kernel_main()
  }
 
@@ -480,7 +472,7 @@ diff -uNr 05_drivers_gpio_uart/src/main.rs 06_uart_chainloader/src/main.rs
      use bsp::console::console;
      use console::interface::All;
 -    use driver::interface::DriverManager;
--
+
 -    println!(
 -        "[0] {} version {}",
 -        env!("CARGO_PKG_NAME"),
@@ -495,37 +487,36 @@ diff -uNr 05_drivers_gpio_uart/src/main.rs 06_uart_chainloader/src/main.rs
 -        .enumerate()
 -    {
 -        println!("      {}. {}", i + 1, driver.compatible());
--    }
-
--    println!(
--        "[3] Chars written: {}",
--        bsp::console::console().chars_written()
--    );
--    println!("[4] Echoing input now");
 +    println!("{}", MINILOAD_LOGO);
 +    println!("{:^37}", bsp::board_name());
 +    println!();
 +    println!("[ML] Requesting binary");
 +    console().flush();
-
--    // Discard any spurious received characters before going into echo mode.
++
 +    // Discard any spurious received characters before starting with the loader protocol.
-     console().clear_rx();
--    loop {
--        let c = bsp::console::console().read_char();
--        bsp::console::console().write_char(c);
++    console().clear_rx();
 +
 +    // Notify `Minipush` to send the binary.
 +    for _ in 0..3 {
 +        console().write_char(3 as char);
      }
-+
+
+-    println!(
+-        "[3] Chars written: {}",
+-        bsp::console::console().chars_written()
+-    );
+-    println!("[4] Echoing input now");
 +    // Read the binary's size.
 +    let mut size: u32 = u32::from(console().read_char() as u8);
 +    size |= u32::from(console().read_char() as u8) << 8;
 +    size |= u32::from(console().read_char() as u8) << 16;
 +    size |= u32::from(console().read_char() as u8) << 24;
-+
+
+-    // Discard any spurious received characters before going into echo mode.
+-    console().clear_rx();
+-    loop {
+-        let c = bsp::console::console().read_char();
+-        bsp::console::console().write_char(c);
 +    // Trust it's not too big.
 +    console().write_char('O');
 +    console().write_char('K');
@@ -536,7 +527,7 @@ diff -uNr 05_drivers_gpio_uart/src/main.rs 06_uart_chainloader/src/main.rs
 +        for i in 0..size {
 +            core::ptr::write_volatile(kernel_addr.offset(i as isize), console().read_char() as u8)
 +        }
-+    }
+     }
 +
 +    println!("[ML] Loaded! Executing the payload now\n");
 +    console().flush();
diff --git a/06_uart_chainloader/demo_payload_rpi3.img b/06_uart_chainloader/demo_payload_rpi3.img
index 7b482d7bfec157cced3d540423afefcf632d5e53..f49c5288b5c0d2e3dc29d2ad43b1b8fee2d64804 100755
GIT binary patch
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Rz9+n2{l?e!D`(xi{tH;0@_zsT

delta 2880
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H%Ul0n`kxnd

diff --git a/06_uart_chainloader/demo_payload_rpi4.img b/06_uart_chainloader/demo_payload_rpi4.img
index e7b0e939902c5753bccd92e7a82c903a044cedac..fa4374e9da72ab704526e41fc7bd02a88c961b57 100755
GIT binary patch
delta 2625
zcmZ8jZBSI#8Gg^b3tX06++B9r1;yQkfP4sOR{5}rT)<8fsFjdSKc<}mYNka|Vd*sb
zBV9<wq$84YxX##4r!9$pvTL+V3Dabz6^#AUF-dFE&`Bqbi?$sUKS>*1(s28nyLVHX
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z=~f%80OB`+h^t71ORQ}w@HxX0NWrt0QtLX6d%T;=vr;=lgdenw@oY5D|179n^_<f_
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z;`O@@n>P3-!+1PiE$%I2uWFaP-r_V*nWk{gR0jKLWvj2urT9{?F_zNDExxiG)jS3o
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QOy}P;_lj6GPhrV_0d#f(;{X5v

delta 2848
zcmZuyeQXow9sa#{c5*f`iA@|kPKYlUg5!pd5J&<{<&qAy1khOUy7E_&hG<J6K+H6$
zlQt*aB)TSmUmX?Fx~d8JW3$K5B*;XhX?#u9Hrh^XjBeVr*+EQ@@DX4Qn2y|@_k7MM
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zU<PpC?$w%q4tt+B&>-T)FUbAhx9ns?4A|ix_Y6B0?mW37&@jXnMB*)9?q@KrLb7Q&
z7@3kCsb>>}pBm92cc39(m`e^f1%SO{VV_NQ@jpiNu)DNjT6RV9_`@vRwD6hO!w%0E
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zad7RX-2KPay7i^)>W*!z>+998wX{cxY)Z~<g7Js0%uBKMAN#*(zpT5xf3Mpdi|vo8
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zX{{aBy0AQF&)3z5g!^H8P5-LT#}4SdzM$uA%co@CNB@zphMm<f_<T#!ma)Jx{>xfJ
zQ|47zu0QeBc>GqM7!~>LHU65a9oBZfoA$1Q2VU=q#oknR^r~z1Id4Ep6zhSqD(R<w
zeM4EzD}S*Z@VPNB=hmLszMj46fv$bM-5XSAp3l7f`ToTDyu4$}SHvOiEb``>ue9!+
z)?xas;5jQ%r7ibVXWjjQ+<LV|o@%XMD_8Vx|MnG$;+*|ptb5ggSns}Xt&ANMA!jT+
Pz6j>!!T$<<dwJ-;;I}4+

diff --git a/06_uart_chainloader/src/_arch/aarch64/cpu/boot.rs b/06_uart_chainloader/src/_arch/aarch64/cpu/boot.rs
index 7513df074..a8defcdae 100644
--- a/06_uart_chainloader/src/_arch/aarch64/cpu/boot.rs
+++ b/06_uart_chainloader/src/_arch/aarch64/cpu/boot.rs
@@ -12,7 +12,7 @@
 //! crate::cpu::boot::arch_boot
 
 // Assembly counterpart to this file.
-global_asm!(include_str!("boot.s"));
+core::arch::global_asm!(include_str!("boot.s"));
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/06_uart_chainloader/src/main.rs b/06_uart_chainloader/src/main.rs
index 5c45cb5f0..225e26fbb 100644
--- a/06_uart_chainloader/src/main.rs
+++ b/06_uart_chainloader/src/main.rs
@@ -105,10 +105,8 @@
 //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
 #![allow(clippy::upper_case_acronyms)]
-#![feature(asm)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
-#![feature(global_asm)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
 #![no_main]
diff --git a/07_timestamps/Cargo.lock b/07_timestamps/Cargo.lock
index 663d313cd..dab65cbb5 100644
--- a/07_timestamps/Cargo.lock
+++ b/07_timestamps/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "6.1.0"
+version = "7.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "509fc35485a2b4ddbacabe0bf2212cdfff88da93658608e5cc651afcb75b7733"
+checksum = "b27f5d071b671f9799dfdf0c0afcec11de65195383d36e186639c83b00705e4f"
 dependencies = [
  "tock-registers",
 ]
diff --git a/07_timestamps/Cargo.toml b/07_timestamps/Cargo.toml
index 4ad9af383..970def3b1 100644
--- a/07_timestamps/Cargo.toml
+++ b/07_timestamps/Cargo.toml
@@ -27,5 +27,4 @@ tock-registers = { version = "0.7.x", default-features = false, features = ["reg
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "6.x.x" }
-
+cortex-a = { version = "7.x.x" }
diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index f04b8fe48..02670c160 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -536,15 +536,7 @@ diff -uNr 06_uart_chainloader/src/cpu.rs 07_timestamps/src/cpu.rs
 diff -uNr 06_uart_chainloader/src/main.rs 07_timestamps/src/main.rs
 --- 06_uart_chainloader/src/main.rs
 +++ 07_timestamps/src/main.rs
-@@ -105,7 +105,6 @@
- //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
-
- #![allow(clippy::upper_case_acronyms)]
--#![feature(asm)]
- #![feature(const_fn_fn_ptr_basics)]
- #![feature(format_args_nl)]
- #![feature(global_asm)]
-@@ -121,6 +120,7 @@
+@@ -119,6 +119,7 @@
  mod panic_wait;
  mod print;
  mod synchronization;
@@ -552,7 +544,7 @@ diff -uNr 06_uart_chainloader/src/main.rs 07_timestamps/src/main.rs
 
  /// Early init code.
  ///
-@@ -143,56 +143,38 @@
+@@ -141,56 +142,38 @@
      kernel_main()
  }
 
diff --git a/07_timestamps/src/_arch/aarch64/cpu/boot.rs b/07_timestamps/src/_arch/aarch64/cpu/boot.rs
index 7513df074..a8defcdae 100644
--- a/07_timestamps/src/_arch/aarch64/cpu/boot.rs
+++ b/07_timestamps/src/_arch/aarch64/cpu/boot.rs
@@ -12,7 +12,7 @@
 //! crate::cpu::boot::arch_boot
 
 // Assembly counterpart to this file.
-global_asm!(include_str!("boot.s"));
+core::arch::global_asm!(include_str!("boot.s"));
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/07_timestamps/src/main.rs b/07_timestamps/src/main.rs
index 1e6bf16a4..2df465b70 100644
--- a/07_timestamps/src/main.rs
+++ b/07_timestamps/src/main.rs
@@ -107,7 +107,6 @@
 #![allow(clippy::upper_case_acronyms)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
-#![feature(global_asm)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
 #![no_main]
diff --git a/08_hw_debug_JTAG/Cargo.lock b/08_hw_debug_JTAG/Cargo.lock
index 884ec5f07..2abe1c742 100644
--- a/08_hw_debug_JTAG/Cargo.lock
+++ b/08_hw_debug_JTAG/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "6.1.0"
+version = "7.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "509fc35485a2b4ddbacabe0bf2212cdfff88da93658608e5cc651afcb75b7733"
+checksum = "b27f5d071b671f9799dfdf0c0afcec11de65195383d36e186639c83b00705e4f"
 dependencies = [
  "tock-registers",
 ]
diff --git a/08_hw_debug_JTAG/Cargo.toml b/08_hw_debug_JTAG/Cargo.toml
index b6d421734..638d4de1e 100644
--- a/08_hw_debug_JTAG/Cargo.toml
+++ b/08_hw_debug_JTAG/Cargo.toml
@@ -27,5 +27,4 @@ tock-registers = { version = "0.7.x", default-features = false, features = ["reg
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "6.x.x" }
-
+cortex-a = { version = "7.x.x" }
diff --git a/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs b/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs
index 7513df074..a8defcdae 100644
--- a/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs
+++ b/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs
@@ -12,7 +12,7 @@
 //! crate::cpu::boot::arch_boot
 
 // Assembly counterpart to this file.
-global_asm!(include_str!("boot.s"));
+core::arch::global_asm!(include_str!("boot.s"));
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/08_hw_debug_JTAG/src/main.rs b/08_hw_debug_JTAG/src/main.rs
index 1e6bf16a4..2df465b70 100644
--- a/08_hw_debug_JTAG/src/main.rs
+++ b/08_hw_debug_JTAG/src/main.rs
@@ -107,7 +107,6 @@
 #![allow(clippy::upper_case_acronyms)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
-#![feature(global_asm)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
 #![no_main]
diff --git a/09_privilege_level/Cargo.lock b/09_privilege_level/Cargo.lock
index 1703eebee..f65b54307 100644
--- a/09_privilege_level/Cargo.lock
+++ b/09_privilege_level/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "6.1.0"
+version = "7.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "509fc35485a2b4ddbacabe0bf2212cdfff88da93658608e5cc651afcb75b7733"
+checksum = "b27f5d071b671f9799dfdf0c0afcec11de65195383d36e186639c83b00705e4f"
 dependencies = [
  "tock-registers",
 ]
diff --git a/09_privilege_level/Cargo.toml b/09_privilege_level/Cargo.toml
index b76d2e772..dccb5622d 100644
--- a/09_privilege_level/Cargo.toml
+++ b/09_privilege_level/Cargo.toml
@@ -27,5 +27,4 @@ tock-registers = { version = "0.7.x", default-features = false, features = ["reg
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "6.x.x" }
-
+cortex-a = { version = "7.x.x" }
diff --git a/09_privilege_level/README.md b/09_privilege_level/README.md
index 3dbe5bd65..8dc091933 100644
--- a/09_privilege_level/README.md
+++ b/09_privilege_level/README.md
@@ -211,17 +211,19 @@ diff -uNr 08_hw_debug_JTAG/Cargo.toml 09_privilege_level/Cargo.toml
 diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs 09_privilege_level/src/_arch/aarch64/cpu/boot.rs
 --- 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs
 +++ 09_privilege_level/src/_arch/aarch64/cpu/boot.rs
-@@ -11,17 +11,68 @@
+@@ -11,8 +11,53 @@
  //!
  //! crate::cpu::boot::arch_boot
 
++use core::arch::global_asm;
 +use cortex_a::{asm, registers::*};
 +use tock_registers::interfaces::Writeable;
 +
  // Assembly counterpart to this file.
- global_asm!(include_str!("boot.s"));
-
- //--------------------------------------------------------------------------------------------------
+-core::arch::global_asm!(include_str!("boot.s"));
++global_asm!(include_str!("boot.s"));
++
++//--------------------------------------------------------------------------------------------------
 +// Private Code
 +//--------------------------------------------------------------------------------------------------
 +
@@ -261,11 +263,10 @@ diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs 09_privilege_level/src/
 +    // are no plans to ever return to EL2, just re-use the same stack.
 +    SP_EL1.set(phys_boot_core_stack_end_exclusive_addr);
 +}
-+
-+//--------------------------------------------------------------------------------------------------
- // Public Code
- //--------------------------------------------------------------------------------------------------
 
+ //--------------------------------------------------------------------------------------------------
+ // Public Code
+@@ -21,7 +66,14 @@
  /// The Rust entry of the `kernel` binary.
  ///
  /// The function is called from the assembly `_start` function.
@@ -501,7 +502,7 @@ diff -uNr 08_hw_debug_JTAG/src/exception.rs 09_privilege_level/src/exception.rs
 diff -uNr 08_hw_debug_JTAG/src/main.rs 09_privilege_level/src/main.rs
 --- 08_hw_debug_JTAG/src/main.rs
 +++ 09_privilege_level/src/main.rs
-@@ -117,6 +117,7 @@
+@@ -116,6 +116,7 @@
  mod console;
  mod cpu;
  mod driver;
@@ -509,7 +510,7 @@ diff -uNr 08_hw_debug_JTAG/src/main.rs 09_privilege_level/src/main.rs
  mod panic_wait;
  mod print;
  mod synchronization;
-@@ -145,6 +146,8 @@
+@@ -144,6 +145,8 @@
 
  /// The main function running after the early init.
  fn kernel_main() -> ! {
@@ -518,7 +519,7 @@ diff -uNr 08_hw_debug_JTAG/src/main.rs 09_privilege_level/src/main.rs
      use core::time::Duration;
      use driver::interface::DriverManager;
      use time::interface::TimeManager;
-@@ -156,6 +159,12 @@
+@@ -155,6 +158,12 @@
      );
      info!("Booting on: {}", bsp::board_name());
 
@@ -531,7 +532,7 @@ diff -uNr 08_hw_debug_JTAG/src/main.rs 09_privilege_level/src/main.rs
      info!(
          "Architectural timer resolution: {} ns",
          time::time_manager().resolution().as_nanos()
-@@ -170,11 +179,15 @@
+@@ -169,11 +178,15 @@
          info!("      {}. {}", i + 1, driver.compatible());
      }
 
diff --git a/09_privilege_level/src/_arch/aarch64/cpu/boot.rs b/09_privilege_level/src/_arch/aarch64/cpu/boot.rs
index 4f0068622..f54ae739b 100644
--- a/09_privilege_level/src/_arch/aarch64/cpu/boot.rs
+++ b/09_privilege_level/src/_arch/aarch64/cpu/boot.rs
@@ -11,6 +11,7 @@
 //!
 //! crate::cpu::boot::arch_boot
 
+use core::arch::global_asm;
 use cortex_a::{asm, registers::*};
 use tock_registers::interfaces::Writeable;
 
diff --git a/09_privilege_level/src/main.rs b/09_privilege_level/src/main.rs
index 74902def1..7a692a0c8 100644
--- a/09_privilege_level/src/main.rs
+++ b/09_privilege_level/src/main.rs
@@ -107,7 +107,6 @@
 #![allow(clippy::upper_case_acronyms)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
-#![feature(global_asm)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
 #![no_main]
diff --git a/10_virtual_mem_part1_identity_mapping/Cargo.lock b/10_virtual_mem_part1_identity_mapping/Cargo.lock
index d01804669..23fe8e43f 100644
--- a/10_virtual_mem_part1_identity_mapping/Cargo.lock
+++ b/10_virtual_mem_part1_identity_mapping/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "6.1.0"
+version = "7.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "509fc35485a2b4ddbacabe0bf2212cdfff88da93658608e5cc651afcb75b7733"
+checksum = "b27f5d071b671f9799dfdf0c0afcec11de65195383d36e186639c83b00705e4f"
 dependencies = [
  "tock-registers",
 ]
diff --git a/10_virtual_mem_part1_identity_mapping/Cargo.toml b/10_virtual_mem_part1_identity_mapping/Cargo.toml
index e52ac34c2..144767d30 100644
--- a/10_virtual_mem_part1_identity_mapping/Cargo.toml
+++ b/10_virtual_mem_part1_identity_mapping/Cargo.toml
@@ -27,5 +27,4 @@ tock-registers = { version = "0.7.x", default-features = false, features = ["reg
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "6.x.x" }
-
+cortex-a = { version = "7.x.x" }
diff --git a/10_virtual_mem_part1_identity_mapping/README.md b/10_virtual_mem_part1_identity_mapping/README.md
index ed01e03d7..759f324be 100644
--- a/10_virtual_mem_part1_identity_mapping/README.md
+++ b/10_virtual_mem_part1_identity_mapping/README.md
@@ -1089,9 +1089,9 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
  #![feature(const_fn_fn_ptr_basics)]
 +#![feature(core_intrinsics)]
  #![feature(format_args_nl)]
- #![feature(global_asm)]
  #![feature(panic_info_message)]
-@@ -118,6 +120,7 @@
+ #![feature(trait_alias)]
+@@ -117,6 +119,7 @@
  mod cpu;
  mod driver;
  mod exception;
@@ -1099,7 +1099,7 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
  mod panic_wait;
  mod print;
  mod synchronization;
-@@ -128,9 +131,17 @@
+@@ -127,9 +130,17 @@
  /// # Safety
  ///
  /// - Only a single core must be active and running this function.
@@ -1118,7 +1118,7 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
 
      for i in bsp::driver::driver_manager().all_device_drivers().iter() {
          if let Err(x) = i.init() {
-@@ -159,6 +170,9 @@
+@@ -158,6 +169,9 @@
      );
      info!("Booting on: {}", bsp::board_name());
 
@@ -1128,7 +1128,7 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
      let (_, privilege_level) = exception::current_privilege_level();
      info!("Current privilege level: {}", privilege_level);
 
-@@ -182,6 +196,13 @@
+@@ -181,6 +195,13 @@
      info!("Timer test, spinning for 1 second");
      time::time_manager().spin_for(Duration::from_secs(1));
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs
index 4f0068622..f54ae739b 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs
@@ -11,6 +11,7 @@
 //!
 //! crate::cpu::boot::arch_boot
 
+use core::arch::global_asm;
 use cortex_a::{asm, registers::*};
 use tock_registers::interfaces::Writeable;
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/main.rs b/10_virtual_mem_part1_identity_mapping/src/main.rs
index f7c949bec..86d7f4733 100644
--- a/10_virtual_mem_part1_identity_mapping/src/main.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/main.rs
@@ -109,7 +109,6 @@
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
-#![feature(global_asm)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
 #![no_main]
diff --git a/11_exceptions_part1_groundwork/Cargo.lock b/11_exceptions_part1_groundwork/Cargo.lock
index d25b6b783..2c16d5d55 100644
--- a/11_exceptions_part1_groundwork/Cargo.lock
+++ b/11_exceptions_part1_groundwork/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "6.1.0"
+version = "7.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "509fc35485a2b4ddbacabe0bf2212cdfff88da93658608e5cc651afcb75b7733"
+checksum = "b27f5d071b671f9799dfdf0c0afcec11de65195383d36e186639c83b00705e4f"
 dependencies = [
  "tock-registers",
 ]
diff --git a/11_exceptions_part1_groundwork/Cargo.toml b/11_exceptions_part1_groundwork/Cargo.toml
index e92d9f438..aa8a870c5 100644
--- a/11_exceptions_part1_groundwork/Cargo.toml
+++ b/11_exceptions_part1_groundwork/Cargo.toml
@@ -27,5 +27,4 @@ tock-registers = { version = "0.7.x", default-features = false, features = ["reg
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "6.x.x" }
-
+cortex-a = { version = "7.x.x" }
diff --git a/11_exceptions_part1_groundwork/README.md b/11_exceptions_part1_groundwork/README.md
index ec6a312da..8424b79c3 100644
--- a/11_exceptions_part1_groundwork/README.md
+++ b/11_exceptions_part1_groundwork/README.md
@@ -502,7 +502,7 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs 1
 
 -use cortex_a::registers::*;
 -use tock_registers::interfaces::Readable;
-+use core::{cell::UnsafeCell, fmt};
++use core::{arch::global_asm, cell::UnsafeCell, fmt};
 +use cortex_a::{asm::barrier, registers::*};
 +use tock_registers::{
 +    interfaces::{Readable, Writeable},
@@ -1013,7 +1013,7 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/exception.rs 11_exceptions_p
 diff -uNr 10_virtual_mem_part1_identity_mapping/src/main.rs 11_exceptions_part1_groundwork/src/main.rs
 --- 10_virtual_mem_part1_identity_mapping/src/main.rs
 +++ 11_exceptions_part1_groundwork/src/main.rs
-@@ -139,6 +139,8 @@
+@@ -138,6 +138,8 @@
      use driver::interface::DriverManager;
      use memory::mmu::interface::MMU;
 
@@ -1022,7 +1022,7 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/main.rs 11_exceptions_part1_
      if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
          panic!("MMU: {}", string);
      }
-@@ -196,13 +198,28 @@
+@@ -195,13 +197,28 @@
      info!("Timer test, spinning for 1 second");
      time::time_manager().spin_for(Duration::from_secs(1));
 
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs
index 4f0068622..f54ae739b 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs
@@ -11,6 +11,7 @@
 //!
 //! crate::cpu::boot::arch_boot
 
+use core::arch::global_asm;
 use cortex_a::{asm, registers::*};
 use tock_registers::interfaces::Writeable;
 
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
index 2db1741c2..1454145ea 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::exception::arch_exception
 
-use core::{cell::UnsafeCell, fmt};
+use core::{arch::global_asm, cell::UnsafeCell, fmt};
 use cortex_a::{asm::barrier, registers::*};
 use tock_registers::{
     interfaces::{Readable, Writeable},
diff --git a/11_exceptions_part1_groundwork/src/main.rs b/11_exceptions_part1_groundwork/src/main.rs
index 637684b00..12deeb2cd 100644
--- a/11_exceptions_part1_groundwork/src/main.rs
+++ b/11_exceptions_part1_groundwork/src/main.rs
@@ -109,7 +109,6 @@
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
-#![feature(global_asm)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
 #![no_main]
diff --git a/12_integrated_testing/Cargo.lock b/12_integrated_testing/Cargo.lock
index c4d231f90..7294834df 100644
--- a/12_integrated_testing/Cargo.lock
+++ b/12_integrated_testing/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "6.1.0"
+version = "7.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "509fc35485a2b4ddbacabe0bf2212cdfff88da93658608e5cc651afcb75b7733"
+checksum = "b27f5d071b671f9799dfdf0c0afcec11de65195383d36e186639c83b00705e4f"
 dependencies = [
  "tock-registers",
 ]
@@ -33,9 +33,9 @@ dependencies = [
 
 [[package]]
 name = "qemu-exit"
-version = "2.0.1"
+version = "3.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "220eb94f40665452ab6114bf8a8d86aa1fd41c6dbfaa4ab71b5912c8adb80389"
+checksum = "0e0fa04276d522a40ed717bf874183a3b2a8bbb3fb4c646b03a7eb874ce5d543"
 
 [[package]]
 name = "quote"
diff --git a/12_integrated_testing/Cargo.toml b/12_integrated_testing/Cargo.toml
index 40f28b188..80a3a0bce 100644
--- a/12_integrated_testing/Cargo.toml
+++ b/12_integrated_testing/Cargo.toml
@@ -22,11 +22,11 @@ test-types = { path = "test-types" }
 
 # Optional dependencies
 tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
-qemu-exit = { version = "2.x.x", optional = true }
+qemu-exit = { version = "3.x.x", optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "6.x.x" }
+cortex-a = { version = "7.x.x" }
 
 ##--------------------------------------------------------------------------------------------------
 ## Testing
diff --git a/12_integrated_testing/README.md b/12_integrated_testing/README.md
index 607c5b5d3..ac37d5412 100644
--- a/12_integrated_testing/README.md
+++ b/12_integrated_testing/README.md
@@ -883,7 +883,7 @@ diff -uNr 11_exceptions_part1_groundwork/Cargo.toml 12_integrated_testing/Cargo.
  authors = ["Andre Richter <andre.o.richter@gmail.com>"]
  edition = "2021"
 
-@@ -11,21 +11,46 @@
+@@ -11,20 +11,46 @@
  default = []
  bsp_rpi3 = ["tock-registers"]
  bsp_rpi4 = ["tock-registers"]
@@ -902,12 +902,12 @@ diff -uNr 11_exceptions_part1_groundwork/Cargo.toml 12_integrated_testing/Cargo.
 
  # Optional dependencies
  tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
-+qemu-exit = { version = "2.x.x", optional = true }
++qemu-exit = { version = "3.x.x", optional = true }
 
  # Platform specific dependencies
  [target.'cfg(target_arch = "aarch64")'.dependencies]
- cortex-a = { version = "6.x.x" }
-
+ cortex-a = { version = "7.x.x" }
++
 +##--------------------------------------------------------------------------------------------------
 +## Testing
 +##--------------------------------------------------------------------------------------------------
@@ -1274,7 +1274,7 @@ diff -uNr 11_exceptions_part1_groundwork/src/exception.rs 12_integrated_testing/
 diff -uNr 11_exceptions_part1_groundwork/src/lib.rs 12_integrated_testing/src/lib.rs
 --- 11_exceptions_part1_groundwork/src/lib.rs
 +++ 12_integrated_testing/src/lib.rs
-@@ -0,0 +1,185 @@
+@@ -0,0 +1,184 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -1388,7 +1388,6 @@ diff -uNr 11_exceptions_part1_groundwork/src/lib.rs 12_integrated_testing/src/li
 +#![feature(const_fn_fn_ptr_basics)]
 +#![feature(core_intrinsics)]
 +#![feature(format_args_nl)]
-+#![feature(global_asm)]
 +#![feature(linkage)]
 +#![feature(panic_info_message)]
 +#![feature(trait_alias)]
@@ -1464,7 +1463,7 @@ diff -uNr 11_exceptions_part1_groundwork/src/lib.rs 12_integrated_testing/src/li
 diff -uNr 11_exceptions_part1_groundwork/src/main.rs 12_integrated_testing/src/main.rs
 --- 11_exceptions_part1_groundwork/src/main.rs
 +++ 12_integrated_testing/src/main.rs
-@@ -6,125 +6,12 @@
+@@ -6,124 +6,12 @@
  #![doc(html_logo_url = "https://git.io/JeGIp")]
 
  //! The `kernel` binary.
@@ -1572,7 +1571,6 @@ diff -uNr 11_exceptions_part1_groundwork/src/main.rs 12_integrated_testing/src/m
 -#![feature(core_intrinsics)]
 +
  #![feature(format_args_nl)]
--#![feature(global_asm)]
 -#![feature(panic_info_message)]
 -#![feature(trait_alias)]
  #![no_main]
@@ -1592,7 +1590,7 @@ diff -uNr 11_exceptions_part1_groundwork/src/main.rs 12_integrated_testing/src/m
 
  /// Early init code.
  ///
-@@ -135,6 +22,7 @@
+@@ -134,6 +22,7 @@
  ///     - MMU + Data caching must be activated at the earliest. Without it, any atomic operations,
  ///       e.g. the yet-to-be-introduced spinlocks in the device drivers (which currently employ
  ///       NullLocks instead of spinlocks), will fail to work (properly) on the RPi SoCs.
@@ -1600,7 +1598,7 @@ diff -uNr 11_exceptions_part1_groundwork/src/main.rs 12_integrated_testing/src/m
  unsafe fn kernel_init() -> ! {
      use driver::interface::DriverManager;
      use memory::mmu::interface::MMU;
-@@ -161,15 +49,9 @@
+@@ -160,15 +49,9 @@
  fn kernel_main() -> ! {
      use bsp::console::console;
      use console::interface::All;
@@ -1617,7 +1615,7 @@ diff -uNr 11_exceptions_part1_groundwork/src/main.rs 12_integrated_testing/src/m
      info!("Booting on: {}", bsp::board_name());
 
      info!("MMU online. Special regions:");
-@@ -195,31 +77,6 @@
+@@ -194,31 +77,6 @@
          info!("      {}. {}", i + 1, driver.compatible());
      }
 
diff --git a/12_integrated_testing/src/_arch/aarch64/cpu/boot.rs b/12_integrated_testing/src/_arch/aarch64/cpu/boot.rs
index 4f0068622..f54ae739b 100644
--- a/12_integrated_testing/src/_arch/aarch64/cpu/boot.rs
+++ b/12_integrated_testing/src/_arch/aarch64/cpu/boot.rs
@@ -11,6 +11,7 @@
 //!
 //! crate::cpu::boot::arch_boot
 
+use core::arch::global_asm;
 use cortex_a::{asm, registers::*};
 use tock_registers::interfaces::Writeable;
 
diff --git a/12_integrated_testing/src/_arch/aarch64/exception.rs b/12_integrated_testing/src/_arch/aarch64/exception.rs
index 6e8485b70..05b729e2b 100644
--- a/12_integrated_testing/src/_arch/aarch64/exception.rs
+++ b/12_integrated_testing/src/_arch/aarch64/exception.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::exception::arch_exception
 
-use core::{cell::UnsafeCell, fmt};
+use core::{arch::global_asm, cell::UnsafeCell, fmt};
 use cortex_a::{asm::barrier, registers::*};
 use tock_registers::{
     interfaces::{Readable, Writeable},
diff --git a/12_integrated_testing/src/lib.rs b/12_integrated_testing/src/lib.rs
index 723b2a809..39eea925b 100644
--- a/12_integrated_testing/src/lib.rs
+++ b/12_integrated_testing/src/lib.rs
@@ -111,7 +111,6 @@
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
-#![feature(global_asm)]
 #![feature(linkage)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
diff --git a/13_exceptions_part2_peripheral_IRQs/Cargo.lock b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
index db1cd2db4..b3514b231 100644
--- a/13_exceptions_part2_peripheral_IRQs/Cargo.lock
+++ b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "6.1.0"
+version = "7.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "509fc35485a2b4ddbacabe0bf2212cdfff88da93658608e5cc651afcb75b7733"
+checksum = "b27f5d071b671f9799dfdf0c0afcec11de65195383d36e186639c83b00705e4f"
 dependencies = [
  "tock-registers",
 ]
@@ -33,9 +33,9 @@ dependencies = [
 
 [[package]]
 name = "qemu-exit"
-version = "2.0.1"
+version = "3.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "220eb94f40665452ab6114bf8a8d86aa1fd41c6dbfaa4ab71b5912c8adb80389"
+checksum = "0e0fa04276d522a40ed717bf874183a3b2a8bbb3fb4c646b03a7eb874ce5d543"
 
 [[package]]
 name = "quote"
diff --git a/13_exceptions_part2_peripheral_IRQs/Cargo.toml b/13_exceptions_part2_peripheral_IRQs/Cargo.toml
index c81105a53..b4572cb21 100644
--- a/13_exceptions_part2_peripheral_IRQs/Cargo.toml
+++ b/13_exceptions_part2_peripheral_IRQs/Cargo.toml
@@ -22,11 +22,11 @@ test-types = { path = "test-types" }
 
 # Optional dependencies
 tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
-qemu-exit = { version = "2.x.x", optional = true }
+qemu-exit = { version = "3.x.x", optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "6.x.x" }
+cortex-a = { version = "7.x.x" }
 
 ##--------------------------------------------------------------------------------------------------
 ## Testing
diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index efb83e646..18de9ac6e 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -809,9 +809,11 @@ diff -uNr 12_integrated_testing/src/_arch/aarch64/cpu/smp.rs 13_exceptions_part2
 diff -uNr 12_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs
 --- 12_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs
 +++ 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs
-@@ -12,12 +12,16 @@
+@@ -11,13 +11,18 @@
+ //!
  //! crate::exception::asynchronous::arch_asynchronous
 
++use core::arch::asm;
  use cortex_a::registers::*;
 -use tock_registers::interfaces::Readable;
 +use tock_registers::interfaces::{Readable, Writeable};
@@ -827,7 +829,7 @@ diff -uNr 12_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs 13_e
  trait DaifField {
      fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register>;
  }
-@@ -66,6 +70,71 @@
+@@ -66,6 +71,71 @@
  // Public Code
  //--------------------------------------------------------------------------------------------------
 
@@ -908,7 +910,7 @@ diff -uNr 12_integrated_testing/src/_arch/aarch64/exception.rs 13_exceptions_par
  //! crate::exception::arch_exception
 
 +use crate::{bsp, exception};
- use core::{cell::UnsafeCell, fmt};
+ use core::{arch::global_asm, cell::UnsafeCell, fmt};
  use cortex_a::{asm::barrier, registers::*};
  use tock_registers::{
 @@ -91,8 +92,11 @@
@@ -2413,13 +2415,13 @@ diff -uNr 12_integrated_testing/src/lib.rs 13_exceptions_part2_peripheral_IRQs/s
 
  #![allow(clippy::upper_case_acronyms)]
  #![allow(incomplete_features)]
-+#![feature(asm)]
++#![feature(asm_const)]
  #![feature(const_fn_fn_ptr_basics)]
 +#![feature(const_fn_trait_bound)]
  #![feature(core_intrinsics)]
  #![feature(format_args_nl)]
- #![feature(global_asm)]
-@@ -132,6 +134,7 @@
+ #![feature(linkage)]
+@@ -131,6 +133,7 @@
  pub mod exception;
  pub mod memory;
  pub mod print;
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.rs b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.rs
index 4f0068622..f54ae739b 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.rs
@@ -11,6 +11,7 @@
 //!
 //! crate::cpu::boot::arch_boot
 
+use core::arch::global_asm;
 use cortex_a::{asm, registers::*};
 use tock_registers::interfaces::Writeable;
 
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
index 880cc92b3..708f63ddb 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
@@ -12,7 +12,7 @@
 //! crate::exception::arch_exception
 
 use crate::{bsp, exception};
-use core::{cell::UnsafeCell, fmt};
+use core::{arch::global_asm, cell::UnsafeCell, fmt};
 use cortex_a::{asm::barrier, registers::*};
 use tock_registers::{
     interfaces::{Readable, Writeable},
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs
index 4e79cc8a1..799ab4e82 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs
@@ -11,6 +11,7 @@
 //!
 //! crate::exception::asynchronous::arch_asynchronous
 
+use core::arch::asm;
 use cortex_a::registers::*;
 use tock_registers::interfaces::{Readable, Writeable};
 
diff --git a/13_exceptions_part2_peripheral_IRQs/src/lib.rs b/13_exceptions_part2_peripheral_IRQs/src/lib.rs
index af4f62406..5b1eb3e1a 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/lib.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/lib.rs
@@ -108,12 +108,11 @@
 
 #![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
-#![feature(asm)]
+#![feature(asm_const)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(const_fn_trait_bound)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
-#![feature(global_asm)]
 #![feature(linkage)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
diff --git a/14_virtual_mem_part2_mmio_remap/Cargo.lock b/14_virtual_mem_part2_mmio_remap/Cargo.lock
index 41426eba5..38d026fdf 100644
--- a/14_virtual_mem_part2_mmio_remap/Cargo.lock
+++ b/14_virtual_mem_part2_mmio_remap/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "6.1.0"
+version = "7.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "509fc35485a2b4ddbacabe0bf2212cdfff88da93658608e5cc651afcb75b7733"
+checksum = "b27f5d071b671f9799dfdf0c0afcec11de65195383d36e186639c83b00705e4f"
 dependencies = [
  "tock-registers",
 ]
@@ -33,9 +33,9 @@ dependencies = [
 
 [[package]]
 name = "qemu-exit"
-version = "2.0.1"
+version = "3.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "220eb94f40665452ab6114bf8a8d86aa1fd41c6dbfaa4ab71b5912c8adb80389"
+checksum = "0e0fa04276d522a40ed717bf874183a3b2a8bbb3fb4c646b03a7eb874ce5d543"
 
 [[package]]
 name = "quote"
diff --git a/14_virtual_mem_part2_mmio_remap/Cargo.toml b/14_virtual_mem_part2_mmio_remap/Cargo.toml
index d3b17db1e..760dbce20 100644
--- a/14_virtual_mem_part2_mmio_remap/Cargo.toml
+++ b/14_virtual_mem_part2_mmio_remap/Cargo.toml
@@ -22,11 +22,11 @@ test-types = { path = "test-types" }
 
 # Optional dependencies
 tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
-qemu-exit = { version = "2.x.x", optional = true }
+qemu-exit = { version = "3.x.x", optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "6.x.x" }
+cortex-a = { version = "7.x.x" }
 
 ##--------------------------------------------------------------------------------------------------
 ## Testing
diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index 8fac022aa..a068bc7a8 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -1021,16 +1021,14 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs
              handler_table: InitStateLock::new([None; Self::NUM_IRQS]),
          }
      }
-@@ -139,6 +152,22 @@
+@@ -139,6 +152,20 @@
      }
 
      unsafe fn init(&self) -> Result<(), &'static str> {
 +        let remapped = self.is_mmio_remapped.load(Ordering::Relaxed);
 +        if !remapped {
-+            let mut virt_addr;
-+
 +            // GICD
-+            virt_addr = memory::mmu::kernel_map_mmio("GICD", &self.gicd_mmio_descriptor)?;
++            let mut virt_addr = memory::mmu::kernel_map_mmio("GICD", &self.gicd_mmio_descriptor)?;
 +            self.gicd.set_mmio(virt_addr.as_usize());
 +
 +            // GICC
@@ -2137,19 +2135,18 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/driver.rs 14_virtual_mem_part2
 diff -uNr 13_exceptions_part2_peripheral_IRQs/src/lib.rs 14_virtual_mem_part2_mmio_remap/src/lib.rs
 --- 13_exceptions_part2_peripheral_IRQs/src/lib.rs
 +++ 14_virtual_mem_part2_mmio_remap/src/lib.rs
-@@ -113,9 +113,11 @@
+@@ -113,8 +113,10 @@
  #![feature(const_fn_trait_bound)]
  #![feature(core_intrinsics)]
  #![feature(format_args_nl)]
 +#![feature(generic_const_exprs)]
- #![feature(global_asm)]
  #![feature(linkage)]
  #![feature(panic_info_message)]
 +#![feature(step_trait)]
  #![feature(trait_alias)]
  #![no_std]
  // Testing
-@@ -128,6 +130,7 @@
+@@ -127,6 +129,7 @@
  mod synchronization;
 
  pub mod bsp;
@@ -2157,7 +2154,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/lib.rs 14_virtual_mem_part2_mm
  pub mod console;
  pub mod cpu;
  pub mod driver;
-@@ -180,6 +183,7 @@
+@@ -179,6 +182,7 @@
  #[no_mangle]
  unsafe fn kernel_init() -> ! {
      exception::handling_init();
@@ -3430,7 +3427,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 14_virtual_mem_p
 diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory.rs 14_virtual_mem_part2_mmio_remap/src/memory.rs
 --- 13_exceptions_part2_peripheral_IRQs/src/memory.rs
 +++ 14_virtual_mem_part2_mmio_remap/src/memory.rs
-@@ -5,3 +5,161 @@
+@@ -5,3 +5,163 @@
  //! Memory Management.
 
  pub mod mmu;
@@ -3486,6 +3483,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory.rs 14_virtual_mem_part2
 +    }
 +
 +    /// Align down to page size.
++    #[must_use]
 +    pub const fn align_down_page(self) -> Self {
 +        let aligned = common::align_down(self.value, bsp::memory::mmu::KernelGranule::SIZE);
 +
@@ -3493,6 +3491,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory.rs 14_virtual_mem_part2
 +    }
 +
 +    /// Align up to page size.
++    #[must_use]
 +    pub const fn align_up_page(self) -> Self {
 +        let aligned = common::align_up(self.value, bsp::memory::mmu::KernelGranule::SIZE);
 +
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs
index 4f0068622..f54ae739b 100644
--- a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs
@@ -11,6 +11,7 @@
 //!
 //! crate::cpu::boot::arch_boot
 
+use core::arch::global_asm;
 use cortex_a::{asm, registers::*};
 use tock_registers::interfaces::Writeable;
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
index 880cc92b3..708f63ddb 100644
--- a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
@@ -12,7 +12,7 @@
 //! crate::exception::arch_exception
 
 use crate::{bsp, exception};
-use core::{cell::UnsafeCell, fmt};
+use core::{arch::global_asm, cell::UnsafeCell, fmt};
 use cortex_a::{asm::barrier, registers::*};
 use tock_registers::{
     interfaces::{Readable, Writeable},
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception/asynchronous.rs b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception/asynchronous.rs
index 4e79cc8a1..799ab4e82 100644
--- a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception/asynchronous.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception/asynchronous.rs
@@ -11,6 +11,7 @@
 //!
 //! crate::exception::asynchronous::arch_asynchronous
 
+use core::arch::asm;
 use cortex_a::registers::*;
 use tock_registers::interfaces::{Readable, Writeable};
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs
index 3f69bd113..bbafa5fe8 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs
@@ -154,10 +154,8 @@ impl driver::interface::DeviceDriver for GICv2 {
     unsafe fn init(&self) -> Result<(), &'static str> {
         let remapped = self.is_mmio_remapped.load(Ordering::Relaxed);
         if !remapped {
-            let mut virt_addr;
-
             // GICD
-            virt_addr = memory::mmu::kernel_map_mmio("GICD", &self.gicd_mmio_descriptor)?;
+            let mut virt_addr = memory::mmu::kernel_map_mmio("GICD", &self.gicd_mmio_descriptor)?;
             self.gicd.set_mmio(virt_addr.as_usize());
 
             // GICC
diff --git a/14_virtual_mem_part2_mmio_remap/src/lib.rs b/14_virtual_mem_part2_mmio_remap/src/lib.rs
index 6b944627a..d36e54481 100644
--- a/14_virtual_mem_part2_mmio_remap/src/lib.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/lib.rs
@@ -108,13 +108,12 @@
 
 #![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
-#![feature(asm)]
+#![feature(asm_const)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(const_fn_trait_bound)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(generic_const_exprs)]
-#![feature(global_asm)]
 #![feature(linkage)]
 #![feature(panic_info_message)]
 #![feature(step_trait)]
diff --git a/14_virtual_mem_part2_mmio_remap/src/memory.rs b/14_virtual_mem_part2_mmio_remap/src/memory.rs
index 360541734..f33ca3234 100644
--- a/14_virtual_mem_part2_mmio_remap/src/memory.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/memory.rs
@@ -57,6 +57,7 @@ impl<ATYPE: AddressType> Address<ATYPE> {
     }
 
     /// Align down to page size.
+    #[must_use]
     pub const fn align_down_page(self) -> Self {
         let aligned = common::align_down(self.value, bsp::memory::mmu::KernelGranule::SIZE);
 
@@ -64,6 +65,7 @@ impl<ATYPE: AddressType> Address<ATYPE> {
     }
 
     /// Align up to page size.
+    #[must_use]
     pub const fn align_up_page(self) -> Self {
         let aligned = common::align_up(self.value, bsp::memory::mmu::KernelGranule::SIZE);
 
diff --git a/15_virtual_mem_part3_precomputed_tables/Cargo.lock b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
index 6cb12baa5..6c03310ce 100644
--- a/15_virtual_mem_part3_precomputed_tables/Cargo.lock
+++ b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "6.1.0"
+version = "7.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "509fc35485a2b4ddbacabe0bf2212cdfff88da93658608e5cc651afcb75b7733"
+checksum = "b27f5d071b671f9799dfdf0c0afcec11de65195383d36e186639c83b00705e4f"
 dependencies = [
  "tock-registers",
 ]
@@ -33,9 +33,9 @@ dependencies = [
 
 [[package]]
 name = "qemu-exit"
-version = "2.0.1"
+version = "3.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "220eb94f40665452ab6114bf8a8d86aa1fd41c6dbfaa4ab71b5912c8adb80389"
+checksum = "0e0fa04276d522a40ed717bf874183a3b2a8bbb3fb4c646b03a7eb874ce5d543"
 
 [[package]]
 name = "quote"
diff --git a/15_virtual_mem_part3_precomputed_tables/Cargo.toml b/15_virtual_mem_part3_precomputed_tables/Cargo.toml
index 91a69bf33..ea20f0db3 100644
--- a/15_virtual_mem_part3_precomputed_tables/Cargo.toml
+++ b/15_virtual_mem_part3_precomputed_tables/Cargo.toml
@@ -22,11 +22,11 @@ test-types = { path = "test-types" }
 
 # Optional dependencies
 tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
-qemu-exit = { version = "2.x.x", optional = true }
+qemu-exit = { version = "3.x.x", optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "6.x.x" }
+cortex-a = { version = "7.x.x" }
 
 ##--------------------------------------------------------------------------------------------------
 ## Testing
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index f0067cda4..f87d297a9 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -821,10 +821,10 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs 15_virtu
  //! crate::cpu::boot::arch_boot
 
 +use crate::{memory, memory::Address};
+ use core::arch::global_asm;
  use cortex_a::{asm, registers::*};
  use tock_registers::interfaces::Writeable;
-
-@@ -70,9 +71,16 @@
+@@ -71,9 +72,16 @@
  ///
  /// - Exception return from EL2 must must continue execution in EL1 with `kernel_init()`.
  #[no_mangle]
@@ -1167,7 +1167,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs 15_v
 
  //--------------------------------------------------------------------------------------------------
  // Global instances
-@@ -43,13 +43,34 @@
+@@ -43,13 +43,35 @@
  ///
  /// That is, `size_of(InitStateLock<KernelTranslationTable>) == size_of(KernelTranslationTable)`.
  /// There is a unit tests that checks this porperty.
@@ -1192,6 +1192,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs 15_v
 +/// This is a hack for retrieving the value for the kernel's virtual address space size as a
 +/// constant from a common place, since it is needed as a compile-time/link-time constant in both,
 +/// the linker script and the Rust sources.
++#[allow(clippy::needless_late_init)]
 +const fn kernel_virt_addr_space_size() -> usize {
 +    let __kernel_virt_addr_space_size;
 +
@@ -1203,7 +1204,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs 15_v
  /// Helper function for calculating the number of pages the given parameter spans.
  const fn size_to_num_pages(size: usize) -> usize {
      assert!(size > 0);
-@@ -88,18 +109,22 @@
+@@ -88,18 +110,22 @@
      MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
  }
 
@@ -1237,7 +1238,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs 15_v
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -121,109 +146,33 @@
+@@ -121,109 +147,33 @@
      MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
  }
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
index 52195d8fb..e604e1124 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
@@ -12,6 +12,7 @@
 //! crate::cpu::boot::arch_boot
 
 use crate::{memory, memory::Address};
+use core::arch::global_asm;
 use cortex_a::{asm, registers::*};
 use tock_registers::interfaces::Writeable;
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.rs
index 880cc92b3..708f63ddb 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.rs
@@ -12,7 +12,7 @@
 //! crate::exception::arch_exception
 
 use crate::{bsp, exception};
-use core::{cell::UnsafeCell, fmt};
+use core::{arch::global_asm, cell::UnsafeCell, fmt};
 use cortex_a::{asm::barrier, registers::*};
 use tock_registers::{
     interfaces::{Readable, Writeable},
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception/asynchronous.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception/asynchronous.rs
index 4e79cc8a1..799ab4e82 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception/asynchronous.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception/asynchronous.rs
@@ -11,6 +11,7 @@
 //!
 //! crate::exception::asynchronous::arch_asynchronous
 
+use core::arch::asm;
 use cortex_a::registers::*;
 use tock_registers::interfaces::{Readable, Writeable};
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2.rs
index 3f69bd113..bbafa5fe8 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2.rs
@@ -154,10 +154,8 @@ impl driver::interface::DeviceDriver for GICv2 {
     unsafe fn init(&self) -> Result<(), &'static str> {
         let remapped = self.is_mmio_remapped.load(Ordering::Relaxed);
         if !remapped {
-            let mut virt_addr;
-
             // GICD
-            virt_addr = memory::mmu::kernel_map_mmio("GICD", &self.gicd_mmio_descriptor)?;
+            let mut virt_addr = memory::mmu::kernel_map_mmio("GICD", &self.gicd_mmio_descriptor)?;
             self.gicd.set_mmio(virt_addr.as_usize());
 
             // GICC
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs
index 2881ab115..441000dbb 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs
@@ -63,6 +63,7 @@ static PHYS_KERNEL_TABLES_BASE_ADDR: u64 = 0xCCCCAAAAFFFFEEEE;
 /// This is a hack for retrieving the value for the kernel's virtual address space size as a
 /// constant from a common place, since it is needed as a compile-time/link-time constant in both,
 /// the linker script and the Rust sources.
+#[allow(clippy::needless_late_init)]
 const fn kernel_virt_addr_space_size() -> usize {
     let __kernel_virt_addr_space_size;
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/lib.rs b/15_virtual_mem_part3_precomputed_tables/src/lib.rs
index 6b944627a..d36e54481 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/lib.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/lib.rs
@@ -108,13 +108,12 @@
 
 #![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
-#![feature(asm)]
+#![feature(asm_const)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(const_fn_trait_bound)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(generic_const_exprs)]
-#![feature(global_asm)]
 #![feature(linkage)]
 #![feature(panic_info_message)]
 #![feature(step_trait)]
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory.rs b/15_virtual_mem_part3_precomputed_tables/src/memory.rs
index 360541734..f33ca3234 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/memory.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/memory.rs
@@ -57,6 +57,7 @@ impl<ATYPE: AddressType> Address<ATYPE> {
     }
 
     /// Align down to page size.
+    #[must_use]
     pub const fn align_down_page(self) -> Self {
         let aligned = common::align_down(self.value, bsp::memory::mmu::KernelGranule::SIZE);
 
@@ -64,6 +65,7 @@ impl<ATYPE: AddressType> Address<ATYPE> {
     }
 
     /// Align up to page size.
+    #[must_use]
     pub const fn align_up_page(self) -> Self {
         let aligned = common::align_up(self.value, bsp::memory::mmu::KernelGranule::SIZE);
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
index d2e5b0d63..13d1d9286 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
+++ b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "6.1.0"
+version = "7.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "509fc35485a2b4ddbacabe0bf2212cdfff88da93658608e5cc651afcb75b7733"
+checksum = "b27f5d071b671f9799dfdf0c0afcec11de65195383d36e186639c83b00705e4f"
 dependencies = [
  "tock-registers",
 ]
@@ -33,9 +33,9 @@ dependencies = [
 
 [[package]]
 name = "qemu-exit"
-version = "2.0.1"
+version = "3.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "220eb94f40665452ab6114bf8a8d86aa1fd41c6dbfaa4ab71b5912c8adb80389"
+checksum = "0e0fa04276d522a40ed717bf874183a3b2a8bbb3fb4c646b03a7eb874ce5d543"
 
 [[package]]
 name = "quote"
diff --git a/16_virtual_mem_part4_higher_half_kernel/Cargo.toml b/16_virtual_mem_part4_higher_half_kernel/Cargo.toml
index 9bf6df42f..07a1c57ec 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Cargo.toml
+++ b/16_virtual_mem_part4_higher_half_kernel/Cargo.toml
@@ -22,11 +22,11 @@ test-types = { path = "test-types" }
 
 # Optional dependencies
 tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
-qemu-exit = { version = "2.x.x", optional = true }
+qemu-exit = { version = "3.x.x", optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "6.x.x" }
+cortex-a = { version = "7.x.x" }
 
 ##--------------------------------------------------------------------------------------------------
 ## Testing
diff --git a/16_virtual_mem_part4_higher_half_kernel/README.md b/16_virtual_mem_part4_higher_half_kernel/README.md
index 86276cde2..bde234391 100644
--- a/16_virtual_mem_part4_higher_half_kernel/README.md
+++ b/16_virtual_mem_part4_higher_half_kernel/README.md
@@ -340,7 +340,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/Cargo.toml 16_virtual_mem_part
 diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs
 --- 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
 +++ 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs
-@@ -29,7 +29,10 @@
+@@ -30,7 +30,10 @@
  /// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
  /// - The HW state of EL1 must be prepared in a sound way.
  #[inline(always)]
@@ -352,7 +352,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
      // Enable timer counter registers for EL1.
      CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
 
-@@ -52,11 +55,11 @@
+@@ -53,11 +56,11 @@
      );
 
      // Second, let the link register point to kernel_init().
@@ -366,7 +366,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -73,14 +76,19 @@
+@@ -74,14 +77,19 @@
  #[no_mangle]
  pub unsafe extern "C" fn _start_rust(
      phys_kernel_tables_base_addr: u64,
@@ -731,7 +731,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu
 
  //--------------------------------------------------------------------------------------------------
  // Public Definitions
-@@ -152,14 +152,6 @@
+@@ -153,14 +153,6 @@
  /// `translation table tool` and patched into the kernel binary. This function just adds the mapping
  /// record entries.
  pub fn kernel_add_mapping_records_for_precomputed() {
@@ -746,7 +746,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu
      let virt_code_region = virt_code_region();
      generic_mmu::kernel_add_mapping_record(
          "Kernel code and RO data",
-@@ -175,4 +167,12 @@
+@@ -176,4 +168,12 @@
          &kernel_virt_to_phys_region(virt_data_region),
          &kernel_page_attributes(virt_data_region.start_page_addr()),
      );
@@ -799,7 +799,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory.rs
 diff -uNr 15_virtual_mem_part3_precomputed_tables/src/lib.rs 16_virtual_mem_part4_higher_half_kernel/src/lib.rs
 --- 15_virtual_mem_part3_precomputed_tables/src/lib.rs
 +++ 16_virtual_mem_part4_higher_half_kernel/src/lib.rs
-@@ -153,11 +153,6 @@
+@@ -152,11 +152,6 @@
      )
  }
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs
index 96a5bbb37..87f120d25 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs
@@ -12,6 +12,7 @@
 //! crate::cpu::boot::arch_boot
 
 use crate::{memory, memory::Address};
+use core::arch::global_asm;
 use cortex_a::{asm, registers::*};
 use tock_registers::interfaces::Writeable;
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.rs
index 880cc92b3..708f63ddb 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.rs
@@ -12,7 +12,7 @@
 //! crate::exception::arch_exception
 
 use crate::{bsp, exception};
-use core::{cell::UnsafeCell, fmt};
+use core::{arch::global_asm, cell::UnsafeCell, fmt};
 use cortex_a::{asm::barrier, registers::*};
 use tock_registers::{
     interfaces::{Readable, Writeable},
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception/asynchronous.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception/asynchronous.rs
index 4e79cc8a1..799ab4e82 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception/asynchronous.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception/asynchronous.rs
@@ -11,6 +11,7 @@
 //!
 //! crate::exception::asynchronous::arch_asynchronous
 
+use core::arch::asm;
 use cortex_a::registers::*;
 use tock_registers::interfaces::{Readable, Writeable};
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2.rs
index 3f69bd113..bbafa5fe8 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2.rs
@@ -154,10 +154,8 @@ impl driver::interface::DeviceDriver for GICv2 {
     unsafe fn init(&self) -> Result<(), &'static str> {
         let remapped = self.is_mmio_remapped.load(Ordering::Relaxed);
         if !remapped {
-            let mut virt_addr;
-
             // GICD
-            virt_addr = memory::mmu::kernel_map_mmio("GICD", &self.gicd_mmio_descriptor)?;
+            let mut virt_addr = memory::mmu::kernel_map_mmio("GICD", &self.gicd_mmio_descriptor)?;
             self.gicd.set_mmio(virt_addr.as_usize());
 
             // GICC
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs
index 07df4483c..86e09c017 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs
@@ -63,6 +63,7 @@ static PHYS_KERNEL_TABLES_BASE_ADDR: u64 = 0xCCCCAAAAFFFFEEEE;
 /// This is a hack for retrieving the value for the kernel's virtual address space size as a
 /// constant from a common place, since it is needed as a compile-time/link-time constant in both,
 /// the linker script and the Rust sources.
+#[allow(clippy::needless_late_init)]
 const fn kernel_virt_addr_space_size() -> usize {
     let __kernel_virt_addr_space_size;
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/lib.rs b/16_virtual_mem_part4_higher_half_kernel/src/lib.rs
index f768643aa..7fd5a761e 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/lib.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/lib.rs
@@ -108,13 +108,12 @@
 
 #![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
-#![feature(asm)]
+#![feature(asm_const)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(const_fn_trait_bound)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(generic_const_exprs)]
-#![feature(global_asm)]
 #![feature(linkage)]
 #![feature(panic_info_message)]
 #![feature(step_trait)]
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory.rs b/16_virtual_mem_part4_higher_half_kernel/src/memory.rs
index 360541734..f33ca3234 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/memory.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/memory.rs
@@ -57,6 +57,7 @@ impl<ATYPE: AddressType> Address<ATYPE> {
     }
 
     /// Align down to page size.
+    #[must_use]
     pub const fn align_down_page(self) -> Self {
         let aligned = common::align_down(self.value, bsp::memory::mmu::KernelGranule::SIZE);
 
@@ -64,6 +65,7 @@ impl<ATYPE: AddressType> Address<ATYPE> {
     }
 
     /// Align up to page size.
+    #[must_use]
     pub const fn align_up_page(self) -> Self {
         let aligned = common::align_up(self.value, bsp::memory::mmu::KernelGranule::SIZE);
 
diff --git a/X1_JTAG_boot/Cargo.lock b/X1_JTAG_boot/Cargo.lock
index 884ec5f07..2abe1c742 100644
--- a/X1_JTAG_boot/Cargo.lock
+++ b/X1_JTAG_boot/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "6.1.0"
+version = "7.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "509fc35485a2b4ddbacabe0bf2212cdfff88da93658608e5cc651afcb75b7733"
+checksum = "b27f5d071b671f9799dfdf0c0afcec11de65195383d36e186639c83b00705e4f"
 dependencies = [
  "tock-registers",
 ]
diff --git a/X1_JTAG_boot/Cargo.toml b/X1_JTAG_boot/Cargo.toml
index b6d421734..638d4de1e 100644
--- a/X1_JTAG_boot/Cargo.toml
+++ b/X1_JTAG_boot/Cargo.toml
@@ -27,5 +27,4 @@ tock-registers = { version = "0.7.x", default-features = false, features = ["reg
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "6.x.x" }
-
+cortex-a = { version = "7.x.x" }
diff --git a/X1_JTAG_boot/jtag_boot_rpi3.img b/X1_JTAG_boot/jtag_boot_rpi3.img
index be80f810e3be61b54b0af0694cec1c5d73d1f1f5..76a5d4c6e7aa0ab07c6bb1d6edb323b85c4c819d 100755
GIT binary patch
delta 2976
zcmb7FYj6|S6~4PG$&xG^OO|c?l!S>b$u`Ca+maLF6(j*{D8VSxNt%i58XCYh!AhH9
zrg0=s1_&58zFAr*{0NU9VFd;fLtB?L*yT@C2&K?4`B91lZN^U?o=zJzgSOw5*F%%(
zk9KGFaqqe3yXSo8+;6WveQ?=8zA@53IYQ1l@Gh<8OSJT*g79w%3Ajn5W!yukn=|(L
zb>6yqLadF%-hGTC0oR+l4e42t7T2bNB^6fUX~NpLU~o^?6CZroo$~9|c<WruPZYa(
zp81(({k9Y?F~Ps0Qs=3J|5nwX`2r*Cn|kswNE`31n-35J9NceOHZ*q?rJOTZ0MD2_
zl>n&%$ler4x_cZ!Oah2uOgBEpi4$+VOG{`)5wVy!G0~qd4)<%E^<}`W(2BlAn6Jzt
zmfJmHp}Ql8SX_v>${_k~j|$y`7<c6qcvfJpB17~s`^l;TPoE*v6ZSvTJt81GGof?9
zpK;FmEC9O<g!Y*WJah9Im^Wg+-)!}`G6<a%GTd{ve&VdN*@e&hr7k|bxREnXrfbDS
z2SQHQl0*bGad4t<G|^ahL;5*iTDDM2_OsH(?h@({ZS;;nXn-gClZ9eJ5jZ*`1aB@#
zlkV^fc%qYZLP>ZZ(w$M1yh@GeYc>;0ut(_bS2L~Di@qQ--G}ihWZI5Q-6ql3gz;Wv
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zD@t|!6)cPiHa82KAgxg@(n5$`@@U@R{SN8OJSsh<9bVMtp)S9jj+K8R$I>`ChNM44
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z?;RzxW1@x?QO8bo{A?)nTFBn{THD4g+g`PA3~hO1Q>ek-VBfCVbJZ|+NwmmjKcUX1
ztFycDhMtk{+3olV5F%YET3X9KuBi+ES604|YKng;Jt$t~{dnGNz^{ketG9=?Z2RG&
e(CZ9wl^QtuG<8|<tisJYXyx;(*GY?Q_J0F1ka*(&

delta 3092
zcmb7GZ%kX)6~FgA{@7pwI5v)rgH1?_Z9;%JfFU$Ir%@@U9g*W|YWsm?EE@?SD`c9c
zwTX=)O-UgwcaJS?`XSJKXdfkQHJUYS(n69COWXX}lBMdTNwL|cf(;>{Dy`SR+wYpk
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z-P;Y`K$ra?plR4~uwxodDj?v@G(L<KBfi=)J2A#Z!-#=O$>UaO{Ay;{RV%^4DXLFM
zA_=vmOLYM~VV!1T+>l3%<uEvZNbGh))&`vjp3j;k-x<g^Le^!rd2e43yN_sck_HUO
zxqZKW)y~m!o41c<d&2(h-4wD4_)3TlPh8ZGr0_d62d+gm)R%Abu0)n2x@v7up4F5e
zbawH+8akeD@+QO_&x-zW>Z)D!0QjTMohXAGrS@W;MRvNB>_m;T(@AoOkdU8Bb-d=g
z?={w(ldVF@<3C9!gS=Iu{~)Y5vW`uPgq;$|;8LNKR7J`r#J10cEcpk*Iw7i)e<>7&
z_h-6l7gW^}20j5BWoc4fv5v4VFwv4vjBQ|X8bLG?ePS2n8%&a~AF@#}*aimMvBzam
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zdBR#qXXTjH@+(`1|0&zD3OYJ<eP&-?uRuKt(X8oX4y3N<#}u1|R{g&)=j8c9i|n%I
zm3QPXJ3QFaUhz`T-UC0~*mIC0OIje9S*gp2-*UOjUYOsZNeVQ{VfjtF!#<?#W^21g
z@x=5YFFKtY<uB};t1fE_|7)gKWdGWab)5319nG!sH*233I`ZXutAiHFFIY=`8n+mV
zsVl2xPtSop`<*ZCKCrjF-kG&R+=~2^rcdQhEDrtlg5|73a<Sb}=}KE(`Lt)HV|hKH
P+4!{el(v?CUgZ1_PC%o>

diff --git a/X1_JTAG_boot/jtag_boot_rpi4.img b/X1_JTAG_boot/jtag_boot_rpi4.img
index f09f82c3f5afa5048cadebd9bd495e4cffdf0d36..ec6a26ea174641aeeac6f28af378fef8043da246 100755
GIT binary patch
delta 2189
zcmZ8hZERcB8Gg^bPIB$oX`I+`;(YizCTX0uNvT6(vyI-gNMi}5ZDurJ2&ZIBBMDWL
zZW04^w%Hh>j<+0cr3&$*Y5NDev{VaB+NP~xoivF8qm)+sLA6^pH6LYdkWgLG+&#y>
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zaDN|>Yb&W!FY(u#y+d~y2QA_L^}?uWQ&$-Oq|-Tmw^a)Fdvpg2#Sh+fny2tUu!8u8
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z+u$hqoY>?IrK~lf_~3(63o=E6PU7XfAF{52TA~hD&`Lbz^oGg?2Mjh`7<3R%J6)k=
z+0m`<lDeE*nQb`%3j9oqyjR%Te?d=6fzBr_bg0NwqK@aT62Br7k4kiCtywD=GUE$!
z>{5G`eo1PVs8YWzwZ&(EXw@)0!%iTwXpuCkkC|vTDq3U)`?r851~g+p({0xxLpVDK
zG~+-M1DYJp{k6oa!O|pHT0zmDBd1>>{v5z8q3E*B4%;PRvlE|mx;DdT|F7|OZ@*8K
zFN!1|7`+1@z%eKLx<%Op0gzU&2P`j0N!R=l%Mj~1dJhjK>-n|yf63&kSSAOw12P>_
zN&QrWj9yHCvhd33)x_@4R}+7}rh6*yXGiBpDi2EWAt8nex|yt@XtiA{9F*!)i?S~}
zY@v5nWLLHd_B47CWcG6t@C!0WYDIQrN71+=pq{EIdR?|>Pq`PuU#=PbAGT86nItG$
zGooie)mcW--#{F{g&<}jfR8}gzw!HMhwJ-ay1h?@Y8ohX3jAFLe{&X!rlE#^0&W_O
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zv(PYfJp;D<YBLus8F7}mwqDLG^-^XfE@ghUW*io*DT)RbSvD^#*?^(1+W#c&ubF?_
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z)}}@N(fa)SVB7QayIUGV`|xu<P#emBXWzX47o+q3m+974rYxWI6F+{(h@x$ex=>*@
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dz0XXl`}XX8cI<xDR!&s5519Vti}cN2^*{C{exCpU

delta 2387
zcmZuxZA@F&8Gg^bhS*>i>|h%lf-kTT+o2HV6r3S7*U8o{p;c1qPFpw0AhxQEkd1U&
zrA+OGZQ8m*TFy?UsA{E<_Qzx|O{XQPT2(5fY*p3IrA?~-nP$@;B^a89NlEDfch9-L
zt`f8>!SOlo^L{+fdC&XhH~+a~vaUjpaz^ymMy$<uDANx9U}%fND3y=X&M1xcF2srN
zWv=mi%7`b+6P;Z|HM>X~d7kr44SUxC#vF;xs08Txh@$W}Tl|CT5dBJ`vzD*MjX$h2
z<SEg$t)6@fsypju`pVHd{nht2M7nf@JHcE9U8Ph{nZ9$Mi};YAe67{wyB+xH$JCK1
zY-wOdvEJ*~6EDI(><`6dJmb7N@*CSu4#a>R{)TVDb=&=?ZV$!BS!K*fetU$$*p6fc
zH5^+|UD=xxL{`nzxHl9p73NVRT_IqXZ0ya+-ne0=j(Th21=SNP;g7ON*KIe&o^bhY
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zYxKkfY^NYy8nO-GOxki-W3cUmZ3wE3L$#l>idY(|<zd@mE0Kq4rMM5Tnnr3Ek}W`n
zO5Eo`+~=Ya>3SapEkZU4E+v|SWCtM`?*41+1SFdUcEQH3PfY01Qry<-?VVvwy(DwI
zYqoctgI`Ydgkw?@LU+?>K-{e!QO*a&bq^OQ$E$6P-{8^n0Y1O=^-OL9%YY+af|?p>
z7cDRCsSmX~v&(%?ytS<V>6+*+`xa|F^UJa)72|Qx-Bm_cnI9Fn^_3@;jpLWqaCUqH
zon2CEvK6p%bXiA$d{-dX2mYFPRUj1qoOxsahGfYyN(})s%_<6-hf<5GC;PO2Ch@f6
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zwpPU(C{+Mp7%bic3j+!Mf~qBxr@-VWn7j)n6F&*vZ-9v`tlshu$Cf}uo~dZ0X`94p
zkdVyf+m%=^u#&We-HyW-5LklWX71Q10H^R;Walb&P}wX!R+qYC=`;UwMwC|8#G@+4
z*(~vG7(ElX|Hi3CF7MqmSZ02!nptS4%%Y)WlA@z>qjF_U+*SFS@~QWX>Rx7Ooio=x
z9gOvgXjORYf@ywn8Ls<yoG;>cu9-4UqRD(E%M|typSTd`&SX&htZGX)hR1Q)R`V*$
z;<;pVs*;^ko!LvPW>C|1XYi;e8*?H4Jjzl%`br;#KbEnab>9&mRBi5_gP+r(qeY$B
z%jj$(edW@c88m0vg|#@XyknZjo#nsob^d+&uvSiIWnJjO$)1ztBJ4xcH;89_4Q@F$
zUSND~miXVqKYYJ6k_}uAc*)#K2SrT7k(oEjiX};hX3QBl{BF%WKJ}Hk18-@P^e~6c
zle=f?xr%jQYBSFR^DxSgG)+~xu+~j07Ir4WA0;}5MmT5fa}nNl!#tiNIv0N2awtAI
ztAL~xu*Uj5RxkEfxA^+Y@j_9PTBNiu-z0ut-Qb#P=D9t@kK7QatJ4bei7IcP#d{|&
z#95~DvFx);|G{gHE199yhdy$n#)*7{d$7L9wul~Yo5EVeue?o$HAx`}rsqb<km!yy
z#)t`#KeI2*s=CCOv?AjfjpyNW6+V)&g_(+Q#zuSP?8spl<nbqeqkYe!`fL>QbGL)8
zy8M(lX__f%bHI_rb2ar3UQ|FD-;b%dK4<TD@3~hyaL@LR4()+tZ;HrKUbI_a{6p(l
zpVK~f*4=7<saE*>*Y4ZyFCOdm+GnS!ExFrky`zY0wb$*T;(jJjTod+wUi=^sZu*h8
zc>2iUf%c#G9~vA;KiWU|i?+j$*wGFI#d2+nG8z=2x`w)`U=fXhWPLB$dnU$e_lItY
zb$IYlDU4Pt{ut;~zFRBa4zvpv3?F!=wiqW+ievB5lGZ1y8SWoERI1|>+g@qgpTLS%
wpdV^ln>-Q+gF8Cq53;pGPg|dA@4wb~owm+8@nP^~r@W%O5A5A9zF(*P4}TS<;{X5v

diff --git a/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.rs b/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.rs
index 7513df074..a8defcdae 100644
--- a/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.rs
+++ b/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.rs
@@ -12,7 +12,7 @@
 //! crate::cpu::boot::arch_boot
 
 // Assembly counterpart to this file.
-global_asm!(include_str!("boot.s"));
+core::arch::global_asm!(include_str!("boot.s"));
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/X1_JTAG_boot/src/main.rs b/X1_JTAG_boot/src/main.rs
index 23221621b..4f0a6ffc9 100644
--- a/X1_JTAG_boot/src/main.rs
+++ b/X1_JTAG_boot/src/main.rs
@@ -107,7 +107,6 @@
 #![allow(clippy::upper_case_acronyms)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
-#![feature(global_asm)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
 #![no_main]
diff --git a/rust-toolchain.toml b/rust-toolchain.toml
index 6051e9b68..19f8449aa 100644
--- a/rust-toolchain.toml
+++ b/rust-toolchain.toml
@@ -1,4 +1,4 @@
 [toolchain]
-channel = "nightly-2021-10-10"
+channel = "nightly-2021-12-18"
 components = ["llvm-tools-preview"]
 targets = ["aarch64-unknown-none-softfloat"]

From d901ae6cfe3758325a3a09c520ebe3319460f9f1 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sat, 15 Jan 2022 21:50:11 +0100
Subject: [PATCH 106/214] Update copyright

---
 .githooks/pre-commit                          |  2 +-
 01_wait_forever/Makefile                      |  2 +-
 01_wait_forever/src/_arch/aarch64/cpu/boot.rs |  2 +-
 01_wait_forever/src/_arch/aarch64/cpu/boot.s  |  2 +-
 01_wait_forever/src/bsp.rs                    |  2 +-
 01_wait_forever/src/bsp/raspberrypi.rs        |  2 +-
 01_wait_forever/src/bsp/raspberrypi/link.ld   |  2 +-
 01_wait_forever/src/cpu.rs                    |  2 +-
 01_wait_forever/src/cpu/boot.rs               |  2 +-
 01_wait_forever/src/main.rs                   |  2 +-
 01_wait_forever/src/panic_wait.rs             |  2 +-
 02_runtime_init/Makefile                      |  2 +-
 02_runtime_init/README.CN.md                  |  8 +++----
 02_runtime_init/README.md                     |  8 +++----
 02_runtime_init/src/_arch/aarch64/cpu.rs      |  2 +-
 02_runtime_init/src/_arch/aarch64/cpu/boot.rs |  2 +-
 02_runtime_init/src/_arch/aarch64/cpu/boot.s  |  2 +-
 02_runtime_init/src/bsp.rs                    |  2 +-
 02_runtime_init/src/bsp/raspberrypi.rs        |  2 +-
 02_runtime_init/src/bsp/raspberrypi/cpu.rs    |  2 +-
 02_runtime_init/src/bsp/raspberrypi/link.ld   |  2 +-
 02_runtime_init/src/cpu.rs                    |  2 +-
 02_runtime_init/src/cpu/boot.rs               |  2 +-
 02_runtime_init/src/main.rs                   |  2 +-
 02_runtime_init/src/panic_wait.rs             |  2 +-
 03_hacky_hello_world/Makefile                 |  2 +-
 03_hacky_hello_world/README.md                |  6 ++---
 03_hacky_hello_world/src/_arch/aarch64/cpu.rs |  2 +-
 .../src/_arch/aarch64/cpu/boot.rs             |  2 +-
 .../src/_arch/aarch64/cpu/boot.s              |  2 +-
 03_hacky_hello_world/src/bsp.rs               |  2 +-
 03_hacky_hello_world/src/bsp/raspberrypi.rs   |  2 +-
 .../src/bsp/raspberrypi/console.rs            |  2 +-
 .../src/bsp/raspberrypi/cpu.rs                |  2 +-
 .../src/bsp/raspberrypi/link.ld               |  2 +-
 03_hacky_hello_world/src/console.rs           |  2 +-
 03_hacky_hello_world/src/cpu.rs               |  2 +-
 03_hacky_hello_world/src/cpu/boot.rs          |  2 +-
 03_hacky_hello_world/src/main.rs              |  2 +-
 03_hacky_hello_world/src/panic_wait.rs        |  2 +-
 03_hacky_hello_world/src/print.rs             |  2 +-
 04_safe_globals/Makefile                      |  2 +-
 04_safe_globals/README.md                     |  2 +-
 04_safe_globals/src/_arch/aarch64/cpu.rs      |  2 +-
 04_safe_globals/src/_arch/aarch64/cpu/boot.rs |  2 +-
 04_safe_globals/src/_arch/aarch64/cpu/boot.s  |  2 +-
 04_safe_globals/src/bsp.rs                    |  2 +-
 04_safe_globals/src/bsp/raspberrypi.rs        |  2 +-
 .../src/bsp/raspberrypi/console.rs            |  2 +-
 04_safe_globals/src/bsp/raspberrypi/cpu.rs    |  2 +-
 04_safe_globals/src/bsp/raspberrypi/link.ld   |  2 +-
 04_safe_globals/src/console.rs                |  2 +-
 04_safe_globals/src/cpu.rs                    |  2 +-
 04_safe_globals/src/cpu/boot.rs               |  2 +-
 04_safe_globals/src/main.rs                   |  2 +-
 04_safe_globals/src/panic_wait.rs             |  2 +-
 04_safe_globals/src/print.rs                  |  2 +-
 04_safe_globals/src/synchronization.rs        |  2 +-
 05_drivers_gpio_uart/Makefile                 |  2 +-
 05_drivers_gpio_uart/README.md                | 16 ++++++-------
 05_drivers_gpio_uart/src/_arch/aarch64/cpu.rs |  2 +-
 .../src/_arch/aarch64/cpu/boot.rs             |  2 +-
 .../src/_arch/aarch64/cpu/boot.s              |  2 +-
 05_drivers_gpio_uart/src/bsp.rs               |  2 +-
 05_drivers_gpio_uart/src/bsp/device_driver.rs |  2 +-
 .../src/bsp/device_driver/bcm.rs              |  2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  2 +-
 .../src/bsp/device_driver/common.rs           |  2 +-
 05_drivers_gpio_uart/src/bsp/raspberrypi.rs   |  2 +-
 .../src/bsp/raspberrypi/console.rs            |  2 +-
 .../src/bsp/raspberrypi/cpu.rs                |  2 +-
 .../src/bsp/raspberrypi/driver.rs             |  2 +-
 .../src/bsp/raspberrypi/link.ld               |  2 +-
 .../src/bsp/raspberrypi/memory.rs             |  2 +-
 05_drivers_gpio_uart/src/console.rs           |  2 +-
 05_drivers_gpio_uart/src/cpu.rs               |  2 +-
 05_drivers_gpio_uart/src/cpu/boot.rs          |  2 +-
 05_drivers_gpio_uart/src/driver.rs            |  2 +-
 05_drivers_gpio_uart/src/main.rs              |  2 +-
 05_drivers_gpio_uart/src/panic_wait.rs        |  2 +-
 05_drivers_gpio_uart/src/print.rs             |  2 +-
 05_drivers_gpio_uart/src/synchronization.rs   |  2 +-
 06_uart_chainloader/Makefile                  |  2 +-
 06_uart_chainloader/README.md                 |  4 ++--
 06_uart_chainloader/src/_arch/aarch64/cpu.rs  |  2 +-
 .../src/_arch/aarch64/cpu/boot.rs             |  2 +-
 .../src/_arch/aarch64/cpu/boot.s              |  2 +-
 06_uart_chainloader/src/bsp.rs                |  2 +-
 06_uart_chainloader/src/bsp/device_driver.rs  |  2 +-
 .../src/bsp/device_driver/bcm.rs              |  2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  2 +-
 .../src/bsp/device_driver/common.rs           |  2 +-
 06_uart_chainloader/src/bsp/raspberrypi.rs    |  2 +-
 .../src/bsp/raspberrypi/console.rs            |  2 +-
 .../src/bsp/raspberrypi/cpu.rs                |  2 +-
 .../src/bsp/raspberrypi/driver.rs             |  2 +-
 .../src/bsp/raspberrypi/link.ld               |  2 +-
 .../src/bsp/raspberrypi/memory.rs             |  2 +-
 06_uart_chainloader/src/console.rs            |  2 +-
 06_uart_chainloader/src/cpu.rs                |  2 +-
 06_uart_chainloader/src/cpu/boot.rs           |  2 +-
 06_uart_chainloader/src/driver.rs             |  2 +-
 06_uart_chainloader/src/main.rs               |  2 +-
 06_uart_chainloader/src/panic_wait.rs         |  2 +-
 06_uart_chainloader/src/print.rs              |  2 +-
 06_uart_chainloader/src/synchronization.rs    |  2 +-
 06_uart_chainloader/tests/chainboot_test.rb   |  2 +-
 07_timestamps/Makefile                        |  2 +-
 07_timestamps/README.md                       |  8 +++----
 07_timestamps/src/_arch/aarch64/cpu.rs        |  2 +-
 07_timestamps/src/_arch/aarch64/cpu/boot.rs   |  2 +-
 07_timestamps/src/_arch/aarch64/cpu/boot.s    |  2 +-
 07_timestamps/src/_arch/aarch64/time.rs       |  2 +-
 07_timestamps/src/bsp.rs                      |  2 +-
 07_timestamps/src/bsp/device_driver.rs        |  2 +-
 07_timestamps/src/bsp/device_driver/bcm.rs    |  2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  2 +-
 07_timestamps/src/bsp/device_driver/common.rs |  2 +-
 07_timestamps/src/bsp/raspberrypi.rs          |  2 +-
 07_timestamps/src/bsp/raspberrypi/console.rs  |  2 +-
 07_timestamps/src/bsp/raspberrypi/cpu.rs      |  2 +-
 07_timestamps/src/bsp/raspberrypi/driver.rs   |  2 +-
 07_timestamps/src/bsp/raspberrypi/link.ld     |  2 +-
 07_timestamps/src/bsp/raspberrypi/memory.rs   |  2 +-
 07_timestamps/src/console.rs                  |  2 +-
 07_timestamps/src/cpu.rs                      |  2 +-
 07_timestamps/src/cpu/boot.rs                 |  2 +-
 07_timestamps/src/driver.rs                   |  2 +-
 07_timestamps/src/main.rs                     |  2 +-
 07_timestamps/src/panic_wait.rs               |  2 +-
 07_timestamps/src/print.rs                    |  2 +-
 07_timestamps/src/synchronization.rs          |  2 +-
 07_timestamps/src/time.rs                     |  2 +-
 08_hw_debug_JTAG/Makefile                     |  2 +-
 08_hw_debug_JTAG/src/_arch/aarch64/cpu.rs     |  2 +-
 .../src/_arch/aarch64/cpu/boot.rs             |  2 +-
 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s |  2 +-
 08_hw_debug_JTAG/src/_arch/aarch64/time.rs    |  2 +-
 08_hw_debug_JTAG/src/bsp.rs                   |  2 +-
 08_hw_debug_JTAG/src/bsp/device_driver.rs     |  2 +-
 08_hw_debug_JTAG/src/bsp/device_driver/bcm.rs |  2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  2 +-
 .../src/bsp/device_driver/common.rs           |  2 +-
 08_hw_debug_JTAG/src/bsp/raspberrypi.rs       |  2 +-
 .../src/bsp/raspberrypi/console.rs            |  2 +-
 08_hw_debug_JTAG/src/bsp/raspberrypi/cpu.rs   |  2 +-
 .../src/bsp/raspberrypi/driver.rs             |  2 +-
 08_hw_debug_JTAG/src/bsp/raspberrypi/link.ld  |  2 +-
 .../src/bsp/raspberrypi/memory.rs             |  2 +-
 08_hw_debug_JTAG/src/console.rs               |  2 +-
 08_hw_debug_JTAG/src/cpu.rs                   |  2 +-
 08_hw_debug_JTAG/src/cpu/boot.rs              |  2 +-
 08_hw_debug_JTAG/src/driver.rs                |  2 +-
 08_hw_debug_JTAG/src/main.rs                  |  2 +-
 08_hw_debug_JTAG/src/panic_wait.rs            |  2 +-
 08_hw_debug_JTAG/src/print.rs                 |  2 +-
 08_hw_debug_JTAG/src/synchronization.rs       |  2 +-
 08_hw_debug_JTAG/src/time.rs                  |  2 +-
 09_privilege_level/Makefile                   |  2 +-
 09_privilege_level/README.md                  |  8 +++----
 09_privilege_level/src/_arch/aarch64/cpu.rs   |  2 +-
 .../src/_arch/aarch64/cpu/boot.rs             |  2 +-
 .../src/_arch/aarch64/cpu/boot.s              |  2 +-
 .../src/_arch/aarch64/exception.rs            |  2 +-
 .../_arch/aarch64/exception/asynchronous.rs   |  2 +-
 09_privilege_level/src/_arch/aarch64/time.rs  |  2 +-
 09_privilege_level/src/bsp.rs                 |  2 +-
 09_privilege_level/src/bsp/device_driver.rs   |  2 +-
 .../src/bsp/device_driver/bcm.rs              |  2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  2 +-
 .../src/bsp/device_driver/common.rs           |  2 +-
 09_privilege_level/src/bsp/raspberrypi.rs     |  2 +-
 .../src/bsp/raspberrypi/console.rs            |  2 +-
 09_privilege_level/src/bsp/raspberrypi/cpu.rs |  2 +-
 .../src/bsp/raspberrypi/driver.rs             |  2 +-
 .../src/bsp/raspberrypi/link.ld               |  2 +-
 .../src/bsp/raspberrypi/memory.rs             |  2 +-
 09_privilege_level/src/console.rs             |  2 +-
 09_privilege_level/src/cpu.rs                 |  2 +-
 09_privilege_level/src/cpu/boot.rs            |  2 +-
 09_privilege_level/src/driver.rs              |  2 +-
 09_privilege_level/src/exception.rs           |  2 +-
 .../src/exception/asynchronous.rs             |  2 +-
 09_privilege_level/src/main.rs                |  2 +-
 09_privilege_level/src/panic_wait.rs          |  2 +-
 09_privilege_level/src/print.rs               |  2 +-
 09_privilege_level/src/synchronization.rs     |  2 +-
 09_privilege_level/src/time.rs                |  2 +-
 .../Makefile                                  |  2 +-
 .../README.md                                 | 16 ++++++-------
 .../src/_arch/aarch64/cpu.rs                  |  2 +-
 .../src/_arch/aarch64/cpu/boot.rs             |  2 +-
 .../src/_arch/aarch64/cpu/boot.s              |  2 +-
 .../src/_arch/aarch64/exception.rs            |  2 +-
 .../_arch/aarch64/exception/asynchronous.rs   |  2 +-
 .../src/_arch/aarch64/memory/mmu.rs           |  2 +-
 .../aarch64/memory/mmu/translation_table.rs   |  2 +-
 .../src/_arch/aarch64/time.rs                 |  2 +-
 .../src/bsp.rs                                |  2 +-
 .../src/bsp/device_driver.rs                  |  2 +-
 .../src/bsp/device_driver/bcm.rs              |  2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  2 +-
 .../src/bsp/device_driver/common.rs           |  2 +-
 .../src/bsp/raspberrypi.rs                    |  2 +-
 .../src/bsp/raspberrypi/console.rs            |  2 +-
 .../src/bsp/raspberrypi/cpu.rs                |  2 +-
 .../src/bsp/raspberrypi/driver.rs             |  2 +-
 .../src/bsp/raspberrypi/link.ld               |  2 +-
 .../src/bsp/raspberrypi/memory.rs             |  2 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |  2 +-
 .../src/console.rs                            |  2 +-
 .../src/cpu.rs                                |  2 +-
 .../src/cpu/boot.rs                           |  2 +-
 .../src/driver.rs                             |  2 +-
 .../src/exception.rs                          |  2 +-
 .../src/exception/asynchronous.rs             |  2 +-
 .../src/main.rs                               |  2 +-
 .../src/memory.rs                             |  2 +-
 .../src/memory/mmu.rs                         |  2 +-
 .../src/memory/mmu/translation_table.rs       |  2 +-
 .../src/panic_wait.rs                         |  2 +-
 .../src/print.rs                              |  2 +-
 .../src/synchronization.rs                    |  2 +-
 .../src/time.rs                               |  2 +-
 11_exceptions_part1_groundwork/Makefile       |  2 +-
 11_exceptions_part1_groundwork/README.md      |  2 +-
 .../src/_arch/aarch64/cpu.rs                  |  2 +-
 .../src/_arch/aarch64/cpu/boot.rs             |  2 +-
 .../src/_arch/aarch64/cpu/boot.s              |  2 +-
 .../src/_arch/aarch64/exception.rs            |  2 +-
 .../src/_arch/aarch64/exception.s             |  2 +-
 .../_arch/aarch64/exception/asynchronous.rs   |  2 +-
 .../src/_arch/aarch64/memory/mmu.rs           |  2 +-
 .../aarch64/memory/mmu/translation_table.rs   |  2 +-
 .../src/_arch/aarch64/time.rs                 |  2 +-
 11_exceptions_part1_groundwork/src/bsp.rs     |  2 +-
 .../src/bsp/device_driver.rs                  |  2 +-
 .../src/bsp/device_driver/bcm.rs              |  2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  2 +-
 .../src/bsp/device_driver/common.rs           |  2 +-
 .../src/bsp/raspberrypi.rs                    |  2 +-
 .../src/bsp/raspberrypi/console.rs            |  2 +-
 .../src/bsp/raspberrypi/cpu.rs                |  2 +-
 .../src/bsp/raspberrypi/driver.rs             |  2 +-
 .../src/bsp/raspberrypi/link.ld               |  2 +-
 .../src/bsp/raspberrypi/memory.rs             |  2 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |  2 +-
 11_exceptions_part1_groundwork/src/console.rs |  2 +-
 11_exceptions_part1_groundwork/src/cpu.rs     |  2 +-
 .../src/cpu/boot.rs                           |  2 +-
 11_exceptions_part1_groundwork/src/driver.rs  |  2 +-
 .../src/exception.rs                          |  2 +-
 .../src/exception/asynchronous.rs             |  2 +-
 11_exceptions_part1_groundwork/src/main.rs    |  2 +-
 11_exceptions_part1_groundwork/src/memory.rs  |  2 +-
 .../src/memory/mmu.rs                         |  2 +-
 .../src/memory/mmu/translation_table.rs       |  2 +-
 .../src/panic_wait.rs                         |  2 +-
 11_exceptions_part1_groundwork/src/print.rs   |  2 +-
 .../src/synchronization.rs                    |  2 +-
 11_exceptions_part1_groundwork/src/time.rs    |  2 +-
 12_integrated_testing/Makefile                |  2 +-
 12_integrated_testing/README.md               | 16 ++++++-------
 .../src/_arch/aarch64/cpu.rs                  |  2 +-
 .../src/_arch/aarch64/cpu/boot.rs             |  2 +-
 .../src/_arch/aarch64/cpu/boot.s              |  2 +-
 .../src/_arch/aarch64/exception.rs            |  2 +-
 .../src/_arch/aarch64/exception.s             |  2 +-
 .../_arch/aarch64/exception/asynchronous.rs   |  2 +-
 .../src/_arch/aarch64/memory/mmu.rs           |  2 +-
 .../aarch64/memory/mmu/translation_table.rs   |  2 +-
 .../src/_arch/aarch64/time.rs                 |  2 +-
 12_integrated_testing/src/bsp.rs              |  2 +-
 .../src/bsp/device_driver.rs                  |  2 +-
 .../src/bsp/device_driver/bcm.rs              |  2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  2 +-
 .../src/bsp/device_driver/common.rs           |  2 +-
 12_integrated_testing/src/bsp/raspberrypi.rs  |  2 +-
 .../src/bsp/raspberrypi/console.rs            |  2 +-
 .../src/bsp/raspberrypi/cpu.rs                |  2 +-
 .../src/bsp/raspberrypi/driver.rs             |  2 +-
 .../src/bsp/raspberrypi/link.ld               |  2 +-
 .../src/bsp/raspberrypi/memory.rs             |  2 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |  2 +-
 12_integrated_testing/src/console.rs          |  2 +-
 12_integrated_testing/src/cpu.rs              |  2 +-
 12_integrated_testing/src/cpu/boot.rs         |  2 +-
 12_integrated_testing/src/driver.rs           |  2 +-
 12_integrated_testing/src/exception.rs        |  2 +-
 .../src/exception/asynchronous.rs             |  2 +-
 12_integrated_testing/src/lib.rs              |  2 +-
 12_integrated_testing/src/main.rs             |  2 +-
 12_integrated_testing/src/memory.rs           |  2 +-
 12_integrated_testing/src/memory/mmu.rs       |  2 +-
 .../src/memory/mmu/translation_table.rs       |  2 +-
 12_integrated_testing/src/panic_wait.rs       |  2 +-
 12_integrated_testing/src/print.rs            |  2 +-
 12_integrated_testing/src/synchronization.rs  |  2 +-
 12_integrated_testing/src/time.rs             |  2 +-
 12_integrated_testing/test-macros/src/lib.rs  |  2 +-
 12_integrated_testing/test-types/src/lib.rs   |  2 +-
 .../tests/00_console_sanity.rb                |  2 +-
 .../tests/00_console_sanity.rs                |  2 +-
 .../tests/01_timer_sanity.rs                  |  2 +-
 .../tests/02_exception_sync_page_fault.rs     |  2 +-
 .../tests/panic_exit_success/mod.rs           |  2 +-
 13_exceptions_part2_peripheral_IRQs/Makefile  |  2 +-
 13_exceptions_part2_peripheral_IRQs/README.md | 24 +++++++++----------
 .../src/_arch/aarch64/cpu.rs                  |  2 +-
 .../src/_arch/aarch64/cpu/boot.rs             |  2 +-
 .../src/_arch/aarch64/cpu/boot.s              |  2 +-
 .../src/_arch/aarch64/cpu/smp.rs              |  2 +-
 .../src/_arch/aarch64/exception.rs            |  2 +-
 .../src/_arch/aarch64/exception.s             |  2 +-
 .../_arch/aarch64/exception/asynchronous.rs   |  2 +-
 .../src/_arch/aarch64/memory/mmu.rs           |  2 +-
 .../aarch64/memory/mmu/translation_table.rs   |  2 +-
 .../src/_arch/aarch64/time.rs                 |  2 +-
 .../src/bsp.rs                                |  2 +-
 .../src/bsp/device_driver.rs                  |  2 +-
 .../src/bsp/device_driver/arm.rs              |  2 +-
 .../src/bsp/device_driver/arm/gicv2.rs        |  2 +-
 .../src/bsp/device_driver/arm/gicv2/gicc.rs   |  2 +-
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |  2 +-
 .../src/bsp/device_driver/bcm.rs              |  2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  2 +-
 .../bcm/bcm2xxx_interrupt_controller.rs       |  2 +-
 .../peripheral_ic.rs                          |  2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  2 +-
 .../src/bsp/device_driver/common.rs           |  2 +-
 .../src/bsp/raspberrypi.rs                    |  2 +-
 .../src/bsp/raspberrypi/console.rs            |  2 +-
 .../src/bsp/raspberrypi/cpu.rs                |  2 +-
 .../src/bsp/raspberrypi/driver.rs             |  2 +-
 .../src/bsp/raspberrypi/exception.rs          |  2 +-
 .../bsp/raspberrypi/exception/asynchronous.rs |  2 +-
 .../src/bsp/raspberrypi/link.ld               |  2 +-
 .../src/bsp/raspberrypi/memory.rs             |  2 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |  2 +-
 .../src/console.rs                            |  2 +-
 .../src/cpu.rs                                |  2 +-
 .../src/cpu/boot.rs                           |  2 +-
 .../src/cpu/smp.rs                            |  2 +-
 .../src/driver.rs                             |  2 +-
 .../src/exception.rs                          |  2 +-
 .../src/exception/asynchronous.rs             |  2 +-
 .../src/lib.rs                                |  2 +-
 .../src/main.rs                               |  2 +-
 .../src/memory.rs                             |  2 +-
 .../src/memory/mmu.rs                         |  2 +-
 .../src/memory/mmu/translation_table.rs       |  2 +-
 .../src/panic_wait.rs                         |  2 +-
 .../src/print.rs                              |  2 +-
 .../src/state.rs                              |  2 +-
 .../src/synchronization.rs                    |  2 +-
 .../src/time.rs                               |  2 +-
 .../test-macros/src/lib.rs                    |  2 +-
 .../test-types/src/lib.rs                     |  2 +-
 .../tests/00_console_sanity.rb                |  2 +-
 .../tests/00_console_sanity.rs                |  2 +-
 .../tests/01_timer_sanity.rs                  |  2 +-
 .../tests/02_exception_sync_page_fault.rs     |  2 +-
 .../tests/03_exception_irq_sanity.rs          |  2 +-
 .../tests/panic_exit_success/mod.rs           |  2 +-
 14_virtual_mem_part2_mmio_remap/Makefile      |  2 +-
 14_virtual_mem_part2_mmio_remap/README.md     | 10 ++++----
 .../src/_arch/aarch64/cpu.rs                  |  2 +-
 .../src/_arch/aarch64/cpu/boot.rs             |  2 +-
 .../src/_arch/aarch64/cpu/boot.s              |  2 +-
 .../src/_arch/aarch64/cpu/smp.rs              |  2 +-
 .../src/_arch/aarch64/exception.rs            |  2 +-
 .../src/_arch/aarch64/exception.s             |  2 +-
 .../_arch/aarch64/exception/asynchronous.rs   |  2 +-
 .../src/_arch/aarch64/memory/mmu.rs           |  2 +-
 .../aarch64/memory/mmu/translation_table.rs   |  2 +-
 .../src/_arch/aarch64/time.rs                 |  2 +-
 14_virtual_mem_part2_mmio_remap/src/bsp.rs    |  2 +-
 .../src/bsp/device_driver.rs                  |  2 +-
 .../src/bsp/device_driver/arm.rs              |  2 +-
 .../src/bsp/device_driver/arm/gicv2.rs        |  2 +-
 .../src/bsp/device_driver/arm/gicv2/gicc.rs   |  2 +-
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |  2 +-
 .../src/bsp/device_driver/bcm.rs              |  2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  2 +-
 .../bcm/bcm2xxx_interrupt_controller.rs       |  2 +-
 .../peripheral_ic.rs                          |  2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  2 +-
 .../src/bsp/device_driver/common.rs           |  2 +-
 .../src/bsp/raspberrypi.rs                    |  2 +-
 .../src/bsp/raspberrypi/console.rs            |  2 +-
 .../src/bsp/raspberrypi/cpu.rs                |  2 +-
 .../src/bsp/raspberrypi/driver.rs             |  2 +-
 .../src/bsp/raspberrypi/exception.rs          |  2 +-
 .../bsp/raspberrypi/exception/asynchronous.rs |  2 +-
 .../src/bsp/raspberrypi/link.ld               |  2 +-
 .../src/bsp/raspberrypi/memory.rs             |  2 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |  2 +-
 14_virtual_mem_part2_mmio_remap/src/common.rs |  2 +-
 .../src/console.rs                            |  2 +-
 14_virtual_mem_part2_mmio_remap/src/cpu.rs    |  2 +-
 .../src/cpu/boot.rs                           |  2 +-
 .../src/cpu/smp.rs                            |  2 +-
 14_virtual_mem_part2_mmio_remap/src/driver.rs |  2 +-
 .../src/exception.rs                          |  2 +-
 .../src/exception/asynchronous.rs             |  2 +-
 14_virtual_mem_part2_mmio_remap/src/lib.rs    |  2 +-
 14_virtual_mem_part2_mmio_remap/src/main.rs   |  2 +-
 14_virtual_mem_part2_mmio_remap/src/memory.rs |  2 +-
 .../src/memory/mmu.rs                         |  2 +-
 .../src/memory/mmu/alloc.rs                   |  2 +-
 .../src/memory/mmu/mapping_record.rs          |  2 +-
 .../src/memory/mmu/translation_table.rs       |  2 +-
 .../src/memory/mmu/types.rs                   |  2 +-
 .../src/panic_wait.rs                         |  2 +-
 14_virtual_mem_part2_mmio_remap/src/print.rs  |  2 +-
 14_virtual_mem_part2_mmio_remap/src/state.rs  |  2 +-
 .../src/synchronization.rs                    |  2 +-
 14_virtual_mem_part2_mmio_remap/src/time.rs   |  2 +-
 .../test-macros/src/lib.rs                    |  2 +-
 .../test-types/src/lib.rs                     |  2 +-
 .../tests/00_console_sanity.rb                |  2 +-
 .../tests/00_console_sanity.rs                |  2 +-
 .../tests/01_timer_sanity.rs                  |  2 +-
 .../tests/02_exception_sync_page_fault.rs     |  2 +-
 .../tests/03_exception_irq_sanity.rs          |  2 +-
 .../tests/panic_exit_success/mod.rs           |  2 +-
 .../Makefile                                  |  2 +-
 .../README.md                                 | 12 +++++-----
 .../src/_arch/aarch64/cpu.rs                  |  2 +-
 .../src/_arch/aarch64/cpu/boot.rs             |  2 +-
 .../src/_arch/aarch64/cpu/boot.s              |  2 +-
 .../src/_arch/aarch64/cpu/smp.rs              |  2 +-
 .../src/_arch/aarch64/exception.rs            |  2 +-
 .../src/_arch/aarch64/exception.s             |  2 +-
 .../_arch/aarch64/exception/asynchronous.rs   |  2 +-
 .../src/_arch/aarch64/memory/mmu.rs           |  2 +-
 .../aarch64/memory/mmu/translation_table.rs   |  2 +-
 .../src/_arch/aarch64/time.rs                 |  2 +-
 .../src/bsp.rs                                |  2 +-
 .../src/bsp/device_driver.rs                  |  2 +-
 .../src/bsp/device_driver/arm.rs              |  2 +-
 .../src/bsp/device_driver/arm/gicv2.rs        |  2 +-
 .../src/bsp/device_driver/arm/gicv2/gicc.rs   |  2 +-
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |  2 +-
 .../src/bsp/device_driver/bcm.rs              |  2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  2 +-
 .../bcm/bcm2xxx_interrupt_controller.rs       |  2 +-
 .../peripheral_ic.rs                          |  2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  2 +-
 .../src/bsp/device_driver/common.rs           |  2 +-
 .../src/bsp/raspberrypi.rs                    |  2 +-
 .../src/bsp/raspberrypi/console.rs            |  2 +-
 .../src/bsp/raspberrypi/cpu.rs                |  2 +-
 .../src/bsp/raspberrypi/driver.rs             |  2 +-
 .../src/bsp/raspberrypi/exception.rs          |  2 +-
 .../bsp/raspberrypi/exception/asynchronous.rs |  2 +-
 .../src/bsp/raspberrypi/link.ld               |  2 +-
 .../src/bsp/raspberrypi/memory.rs             |  2 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |  2 +-
 .../src/common.rs                             |  2 +-
 .../src/console.rs                            |  2 +-
 .../src/cpu.rs                                |  2 +-
 .../src/cpu/boot.rs                           |  2 +-
 .../src/cpu/smp.rs                            |  2 +-
 .../src/driver.rs                             |  2 +-
 .../src/exception.rs                          |  2 +-
 .../src/exception/asynchronous.rs             |  2 +-
 .../src/lib.rs                                |  2 +-
 .../src/main.rs                               |  2 +-
 .../src/memory.rs                             |  2 +-
 .../src/memory/mmu.rs                         |  2 +-
 .../src/memory/mmu/alloc.rs                   |  2 +-
 .../src/memory/mmu/mapping_record.rs          |  2 +-
 .../src/memory/mmu/translation_table.rs       |  2 +-
 .../src/memory/mmu/types.rs                   |  2 +-
 .../src/panic_wait.rs                         |  2 +-
 .../src/print.rs                              |  2 +-
 .../src/state.rs                              |  2 +-
 .../src/synchronization.rs                    |  2 +-
 .../src/time.rs                               |  2 +-
 .../test-macros/src/lib.rs                    |  2 +-
 .../test-types/src/lib.rs                     |  2 +-
 .../tests/00_console_sanity.rb                |  2 +-
 .../tests/00_console_sanity.rs                |  2 +-
 .../tests/01_timer_sanity.rs                  |  2 +-
 .../tests/02_exception_sync_page_fault.rs     |  2 +-
 .../tests/03_exception_irq_sanity.rs          |  2 +-
 .../tests/panic_exit_success/mod.rs           |  2 +-
 .../translation_table_tool/arch.rb            |  2 +-
 .../translation_table_tool/bsp.rb             |  2 +-
 .../translation_table_tool/generic.rb         |  2 +-
 .../translation_table_tool/kernel_elf.rb      |  2 +-
 .../translation_table_tool/main.rb            |  2 +-
 .../Makefile                                  |  2 +-
 .../src/_arch/aarch64/cpu.rs                  |  2 +-
 .../src/_arch/aarch64/cpu/boot.rs             |  2 +-
 .../src/_arch/aarch64/cpu/boot.s              |  2 +-
 .../src/_arch/aarch64/cpu/smp.rs              |  2 +-
 .../src/_arch/aarch64/exception.rs            |  2 +-
 .../src/_arch/aarch64/exception.s             |  2 +-
 .../_arch/aarch64/exception/asynchronous.rs   |  2 +-
 .../src/_arch/aarch64/memory/mmu.rs           |  2 +-
 .../aarch64/memory/mmu/translation_table.rs   |  2 +-
 .../src/_arch/aarch64/time.rs                 |  2 +-
 .../src/bsp.rs                                |  2 +-
 .../src/bsp/device_driver.rs                  |  2 +-
 .../src/bsp/device_driver/arm.rs              |  2 +-
 .../src/bsp/device_driver/arm/gicv2.rs        |  2 +-
 .../src/bsp/device_driver/arm/gicv2/gicc.rs   |  2 +-
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |  2 +-
 .../src/bsp/device_driver/bcm.rs              |  2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  2 +-
 .../bcm/bcm2xxx_interrupt_controller.rs       |  2 +-
 .../peripheral_ic.rs                          |  2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  2 +-
 .../src/bsp/device_driver/common.rs           |  2 +-
 .../src/bsp/raspberrypi.rs                    |  2 +-
 .../src/bsp/raspberrypi/console.rs            |  2 +-
 .../src/bsp/raspberrypi/cpu.rs                |  2 +-
 .../src/bsp/raspberrypi/driver.rs             |  2 +-
 .../src/bsp/raspberrypi/exception.rs          |  2 +-
 .../bsp/raspberrypi/exception/asynchronous.rs |  2 +-
 .../src/bsp/raspberrypi/link.ld               |  2 +-
 .../src/bsp/raspberrypi/memory.rs             |  2 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |  2 +-
 .../src/common.rs                             |  2 +-
 .../src/console.rs                            |  2 +-
 .../src/cpu.rs                                |  2 +-
 .../src/cpu/boot.rs                           |  2 +-
 .../src/cpu/smp.rs                            |  2 +-
 .../src/driver.rs                             |  2 +-
 .../src/exception.rs                          |  2 +-
 .../src/exception/asynchronous.rs             |  2 +-
 .../src/lib.rs                                |  2 +-
 .../src/main.rs                               |  2 +-
 .../src/memory.rs                             |  2 +-
 .../src/memory/mmu.rs                         |  2 +-
 .../src/memory/mmu/alloc.rs                   |  2 +-
 .../src/memory/mmu/mapping_record.rs          |  2 +-
 .../src/memory/mmu/translation_table.rs       |  2 +-
 .../src/memory/mmu/types.rs                   |  2 +-
 .../src/panic_wait.rs                         |  2 +-
 .../src/print.rs                              |  2 +-
 .../src/state.rs                              |  2 +-
 .../src/synchronization.rs                    |  2 +-
 .../src/time.rs                               |  2 +-
 .../test-macros/src/lib.rs                    |  2 +-
 .../test-types/src/lib.rs                     |  2 +-
 .../tests/00_console_sanity.rb                |  2 +-
 .../tests/00_console_sanity.rs                |  2 +-
 .../tests/01_timer_sanity.rs                  |  2 +-
 .../tests/02_exception_sync_page_fault.rs     |  2 +-
 .../tests/03_exception_irq_sanity.rs          |  2 +-
 .../tests/panic_exit_success/mod.rs           |  2 +-
 .../translation_table_tool/arch.rb            |  2 +-
 .../translation_table_tool/bsp.rb             |  2 +-
 .../translation_table_tool/generic.rb         |  2 +-
 .../translation_table_tool/kernel_elf.rb      |  2 +-
 .../translation_table_tool/main.rb            |  2 +-
 LICENSE-MIT                                   |  2 +-
 X1_JTAG_boot/Makefile                         |  2 +-
 X1_JTAG_boot/src/_arch/aarch64/cpu.rs         |  2 +-
 X1_JTAG_boot/src/_arch/aarch64/cpu/boot.rs    |  2 +-
 X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s     |  2 +-
 X1_JTAG_boot/src/_arch/aarch64/time.rs        |  2 +-
 X1_JTAG_boot/src/bsp.rs                       |  2 +-
 X1_JTAG_boot/src/bsp/device_driver.rs         |  2 +-
 X1_JTAG_boot/src/bsp/device_driver/bcm.rs     |  2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  2 +-
 X1_JTAG_boot/src/bsp/device_driver/common.rs  |  2 +-
 X1_JTAG_boot/src/bsp/raspberrypi.rs           |  2 +-
 X1_JTAG_boot/src/bsp/raspberrypi/console.rs   |  2 +-
 X1_JTAG_boot/src/bsp/raspberrypi/cpu.rs       |  2 +-
 X1_JTAG_boot/src/bsp/raspberrypi/driver.rs    |  2 +-
 X1_JTAG_boot/src/bsp/raspberrypi/link.ld      |  2 +-
 X1_JTAG_boot/src/bsp/raspberrypi/memory.rs    |  2 +-
 X1_JTAG_boot/src/console.rs                   |  2 +-
 X1_JTAG_boot/src/cpu.rs                       |  2 +-
 X1_JTAG_boot/src/cpu/boot.rs                  |  2 +-
 X1_JTAG_boot/src/driver.rs                    |  2 +-
 X1_JTAG_boot/src/main.rs                      |  2 +-
 X1_JTAG_boot/src/panic_wait.rs                |  2 +-
 X1_JTAG_boot/src/print.rs                     |  2 +-
 X1_JTAG_boot/src/synchronization.rs           |  2 +-
 X1_JTAG_boot/src/time.rs                      |  2 +-
 common/serial/minipush.rb                     |  2 +-
 common/serial/minipush/progressbar_patch.rb   |  2 +-
 common/serial/miniterm.rb                     |  2 +-
 common/tests/boot_test.rb                     |  2 +-
 common/tests/console_io_test.rb               |  2 +-
 common/tests/dispatch.rb                      |  2 +-
 common/tests/exit_code_test.rb                |  2 +-
 common/tests/test.rb                          |  2 +-
 docker/rustembedded-osdev-utils/Dockerfile    |  4 ++--
 docker/rustembedded-osdev-utils/Makefile      |  2 +-
 utils/devtool.rb                              |  2 +-
 utils/devtool/copyright.rb                    |  2 +-
 utils/diff_tut_folders.bash                   |  2 +-
 utils/update_copyright.rb                     |  2 +-
 608 files changed, 665 insertions(+), 665 deletions(-)

diff --git a/.githooks/pre-commit b/.githooks/pre-commit
index 468906434..e9570651f 100755
--- a/.githooks/pre-commit
+++ b/.githooks/pre-commit
@@ -3,7 +3,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 require_relative '../utils/devtool/copyright'
 
diff --git a/01_wait_forever/Makefile b/01_wait_forever/Makefile
index cd0dd8d1b..4228b06ea 100644
--- a/01_wait_forever/Makefile
+++ b/01_wait_forever/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/color.mk
 include ../common/docker.mk
diff --git a/01_wait_forever/src/_arch/aarch64/cpu/boot.rs b/01_wait_forever/src/_arch/aarch64/cpu/boot.rs
index 13aee3a3e..b5cc68fcf 100644
--- a/01_wait_forever/src/_arch/aarch64/cpu/boot.rs
+++ b/01_wait_forever/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/01_wait_forever/src/_arch/aarch64/cpu/boot.s b/01_wait_forever/src/_arch/aarch64/cpu/boot.s
index a6d8ca565..d5b5bc9ce 100644
--- a/01_wait_forever/src/_arch/aarch64/cpu/boot.s
+++ b/01_wait_forever/src/_arch/aarch64/cpu/boot.s
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/01_wait_forever/src/bsp.rs b/01_wait_forever/src/bsp.rs
index 2b92251f5..a09ba8a45 100644
--- a/01_wait_forever/src/bsp.rs
+++ b/01_wait_forever/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/01_wait_forever/src/bsp/raspberrypi.rs b/01_wait_forever/src/bsp/raspberrypi.rs
index e7a4b6af2..26b678a00 100644
--- a/01_wait_forever/src/bsp/raspberrypi.rs
+++ b/01_wait_forever/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/01_wait_forever/src/bsp/raspberrypi/link.ld b/01_wait_forever/src/bsp/raspberrypi/link.ld
index f3906f92d..8f79ff76d 100644
--- a/01_wait_forever/src/bsp/raspberrypi/link.ld
+++ b/01_wait_forever/src/bsp/raspberrypi/link.ld
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT OR Apache-2.0
  *
- * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+ * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
  */
 
 /* The physical address at which the the kernel binary will be loaded by the Raspberry's firmware */
diff --git a/01_wait_forever/src/cpu.rs b/01_wait_forever/src/cpu.rs
index c3962ff8e..8f50133f5 100644
--- a/01_wait_forever/src/cpu.rs
+++ b/01_wait_forever/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/01_wait_forever/src/cpu/boot.rs b/01_wait_forever/src/cpu/boot.rs
index 1dc5c1808..8091dac36 100644
--- a/01_wait_forever/src/cpu/boot.rs
+++ b/01_wait_forever/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/01_wait_forever/src/main.rs b/01_wait_forever/src/main.rs
index 84e9c8c19..4f405becc 100644
--- a/01_wait_forever/src/main.rs
+++ b/01_wait_forever/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/01_wait_forever/src/panic_wait.rs b/01_wait_forever/src/panic_wait.rs
index 2887ed170..c0ee2be3c 100644
--- a/01_wait_forever/src/panic_wait.rs
+++ b/01_wait_forever/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/02_runtime_init/Makefile b/02_runtime_init/Makefile
index 0e2b99065..c66931df6 100644
--- a/02_runtime_init/Makefile
+++ b/02_runtime_init/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/color.mk
 include ../common/docker.mk
diff --git a/02_runtime_init/README.CN.md b/02_runtime_init/README.CN.md
index 0ffecb496..51c637934 100644
--- a/02_runtime_init/README.CN.md
+++ b/02_runtime_init/README.CN.md
@@ -63,7 +63,7 @@ diff -uNr 01_wait_forever/src/_arch/aarch64/cpu.rs 02_runtime_init/src/_arch/aar
 @@ -0,0 +1,30 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Architectural processor code.
 +//!
@@ -130,7 +130,7 @@ diff -uNr 01_wait_forever/src/bsp/raspberrypi/memory.rs 02_runtime_init/src/bsp/
 @@ -0,0 +1,37 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! BSP Memory Management.
 +
@@ -229,7 +229,7 @@ diff -uNr 01_wait_forever/src/memory.rs 02_runtime_init/src/memory.rs
 @@ -0,0 +1,30 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Memory Management.
 +
@@ -280,7 +280,7 @@ diff -uNr 01_wait_forever/src/runtime_init.rs 02_runtime_init/src/runtime_init.r
 @@ -0,0 +1,38 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Rust runtime initialization code.
 +
diff --git a/02_runtime_init/README.md b/02_runtime_init/README.md
index 530c1a3fd..bcb3f8c37 100644
--- a/02_runtime_init/README.md
+++ b/02_runtime_init/README.md
@@ -86,7 +86,7 @@ diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.s 02_runtime_init/src/_arch
 --- 01_wait_forever/src/_arch/aarch64/cpu/boot.s
 +++ 02_runtime_init/src/_arch/aarch64/cpu/boot.s
 @@ -3,6 +3,24 @@
- // Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+ // Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
  //--------------------------------------------------------------------------------------------------
 +// Definitions
@@ -152,7 +152,7 @@ diff -uNr 01_wait_forever/src/_arch/aarch64/cpu.rs 02_runtime_init/src/_arch/aar
 @@ -0,0 +1,26 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Architectural processor code.
 +//!
@@ -183,7 +183,7 @@ diff -uNr 01_wait_forever/src/bsp/raspberrypi/cpu.rs 02_runtime_init/src/bsp/ras
 @@ -0,0 +1,14 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! BSP Processor code.
 +
@@ -200,7 +200,7 @@ diff -uNr 01_wait_forever/src/bsp/raspberrypi/link.ld 02_runtime_init/src/bsp/ra
 --- 01_wait_forever/src/bsp/raspberrypi/link.ld
 +++ 02_runtime_init/src/bsp/raspberrypi/link.ld
 @@ -3,6 +3,8 @@
-  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+  * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
   */
 
 +__rpi_phys_dram_start_addr = 0;
diff --git a/02_runtime_init/src/_arch/aarch64/cpu.rs b/02_runtime_init/src/_arch/aarch64/cpu.rs
index 5f97ea410..3b52e3a36 100644
--- a/02_runtime_init/src/_arch/aarch64/cpu.rs
+++ b/02_runtime_init/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 //!
diff --git a/02_runtime_init/src/_arch/aarch64/cpu/boot.rs b/02_runtime_init/src/_arch/aarch64/cpu/boot.rs
index a8defcdae..2f9654c7f 100644
--- a/02_runtime_init/src/_arch/aarch64/cpu/boot.rs
+++ b/02_runtime_init/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/02_runtime_init/src/_arch/aarch64/cpu/boot.s b/02_runtime_init/src/_arch/aarch64/cpu/boot.s
index 28bc1a70a..7d445a935 100644
--- a/02_runtime_init/src/_arch/aarch64/cpu/boot.s
+++ b/02_runtime_init/src/_arch/aarch64/cpu/boot.s
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //--------------------------------------------------------------------------------------------------
 // Definitions
diff --git a/02_runtime_init/src/bsp.rs b/02_runtime_init/src/bsp.rs
index 2b92251f5..a09ba8a45 100644
--- a/02_runtime_init/src/bsp.rs
+++ b/02_runtime_init/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/02_runtime_init/src/bsp/raspberrypi.rs b/02_runtime_init/src/bsp/raspberrypi.rs
index 8fed4b83c..5ab6cb345 100644
--- a/02_runtime_init/src/bsp/raspberrypi.rs
+++ b/02_runtime_init/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/02_runtime_init/src/bsp/raspberrypi/cpu.rs b/02_runtime_init/src/bsp/raspberrypi/cpu.rs
index d09ff9568..85fb89e49 100644
--- a/02_runtime_init/src/bsp/raspberrypi/cpu.rs
+++ b/02_runtime_init/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/02_runtime_init/src/bsp/raspberrypi/link.ld b/02_runtime_init/src/bsp/raspberrypi/link.ld
index 7c01ccbf5..007afd4a5 100644
--- a/02_runtime_init/src/bsp/raspberrypi/link.ld
+++ b/02_runtime_init/src/bsp/raspberrypi/link.ld
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT OR Apache-2.0
  *
- * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+ * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
  */
 
 __rpi_phys_dram_start_addr = 0;
diff --git a/02_runtime_init/src/cpu.rs b/02_runtime_init/src/cpu.rs
index d8f780823..b2a960103 100644
--- a/02_runtime_init/src/cpu.rs
+++ b/02_runtime_init/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/02_runtime_init/src/cpu/boot.rs b/02_runtime_init/src/cpu/boot.rs
index 1dc5c1808..8091dac36 100644
--- a/02_runtime_init/src/cpu/boot.rs
+++ b/02_runtime_init/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/02_runtime_init/src/main.rs b/02_runtime_init/src/main.rs
index 561ee9d2c..398c4a042 100644
--- a/02_runtime_init/src/main.rs
+++ b/02_runtime_init/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/02_runtime_init/src/panic_wait.rs b/02_runtime_init/src/panic_wait.rs
index a1705688d..cc0e1ae04 100644
--- a/02_runtime_init/src/panic_wait.rs
+++ b/02_runtime_init/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/03_hacky_hello_world/Makefile b/03_hacky_hello_world/Makefile
index 586daf99b..d64f1dccf 100644
--- a/03_hacky_hello_world/Makefile
+++ b/03_hacky_hello_world/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/color.mk
 include ../common/docker.mk
diff --git a/03_hacky_hello_world/README.md b/03_hacky_hello_world/README.md
index cb04d3753..131e45b3a 100644
--- a/03_hacky_hello_world/README.md
+++ b/03_hacky_hello_world/README.md
@@ -125,7 +125,7 @@ diff -uNr 02_runtime_init/src/bsp/raspberrypi/console.rs 03_hacky_hello_world/sr
 @@ -0,0 +1,47 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! BSP console facilities.
 +
@@ -187,7 +187,7 @@ diff -uNr 02_runtime_init/src/console.rs 03_hacky_hello_world/src/console.rs
 @@ -0,0 +1,19 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! System console.
 +
@@ -264,7 +264,7 @@ diff -uNr 02_runtime_init/src/print.rs 03_hacky_hello_world/src/print.rs
 @@ -0,0 +1,38 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Printing.
 +
diff --git a/03_hacky_hello_world/src/_arch/aarch64/cpu.rs b/03_hacky_hello_world/src/_arch/aarch64/cpu.rs
index 5f97ea410..3b52e3a36 100644
--- a/03_hacky_hello_world/src/_arch/aarch64/cpu.rs
+++ b/03_hacky_hello_world/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 //!
diff --git a/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.rs b/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.rs
index a8defcdae..2f9654c7f 100644
--- a/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.rs
+++ b/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.s b/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.s
index 28bc1a70a..7d445a935 100644
--- a/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.s
+++ b/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.s
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //--------------------------------------------------------------------------------------------------
 // Definitions
diff --git a/03_hacky_hello_world/src/bsp.rs b/03_hacky_hello_world/src/bsp.rs
index 2b92251f5..a09ba8a45 100644
--- a/03_hacky_hello_world/src/bsp.rs
+++ b/03_hacky_hello_world/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/03_hacky_hello_world/src/bsp/raspberrypi.rs b/03_hacky_hello_world/src/bsp/raspberrypi.rs
index 73863b174..6688a5146 100644
--- a/03_hacky_hello_world/src/bsp/raspberrypi.rs
+++ b/03_hacky_hello_world/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/03_hacky_hello_world/src/bsp/raspberrypi/console.rs b/03_hacky_hello_world/src/bsp/raspberrypi/console.rs
index fca7042e6..4cdf53ee6 100644
--- a/03_hacky_hello_world/src/bsp/raspberrypi/console.rs
+++ b/03_hacky_hello_world/src/bsp/raspberrypi/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP console facilities.
 
diff --git a/03_hacky_hello_world/src/bsp/raspberrypi/cpu.rs b/03_hacky_hello_world/src/bsp/raspberrypi/cpu.rs
index d09ff9568..85fb89e49 100644
--- a/03_hacky_hello_world/src/bsp/raspberrypi/cpu.rs
+++ b/03_hacky_hello_world/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/03_hacky_hello_world/src/bsp/raspberrypi/link.ld b/03_hacky_hello_world/src/bsp/raspberrypi/link.ld
index 7c01ccbf5..007afd4a5 100644
--- a/03_hacky_hello_world/src/bsp/raspberrypi/link.ld
+++ b/03_hacky_hello_world/src/bsp/raspberrypi/link.ld
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT OR Apache-2.0
  *
- * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+ * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
  */
 
 __rpi_phys_dram_start_addr = 0;
diff --git a/03_hacky_hello_world/src/console.rs b/03_hacky_hello_world/src/console.rs
index 27b79f7dd..5ab4cc455 100644
--- a/03_hacky_hello_world/src/console.rs
+++ b/03_hacky_hello_world/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/03_hacky_hello_world/src/cpu.rs b/03_hacky_hello_world/src/cpu.rs
index d8f780823..b2a960103 100644
--- a/03_hacky_hello_world/src/cpu.rs
+++ b/03_hacky_hello_world/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/03_hacky_hello_world/src/cpu/boot.rs b/03_hacky_hello_world/src/cpu/boot.rs
index 1dc5c1808..8091dac36 100644
--- a/03_hacky_hello_world/src/cpu/boot.rs
+++ b/03_hacky_hello_world/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/03_hacky_hello_world/src/main.rs b/03_hacky_hello_world/src/main.rs
index 7ae7138de..7a3957dde 100644
--- a/03_hacky_hello_world/src/main.rs
+++ b/03_hacky_hello_world/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/03_hacky_hello_world/src/panic_wait.rs b/03_hacky_hello_world/src/panic_wait.rs
index 255eedeeb..3c1ca85b7 100644
--- a/03_hacky_hello_world/src/panic_wait.rs
+++ b/03_hacky_hello_world/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/03_hacky_hello_world/src/print.rs b/03_hacky_hello_world/src/print.rs
index 8ea5db240..81c6d179a 100644
--- a/03_hacky_hello_world/src/print.rs
+++ b/03_hacky_hello_world/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing.
 
diff --git a/04_safe_globals/Makefile b/04_safe_globals/Makefile
index 586daf99b..d64f1dccf 100644
--- a/04_safe_globals/Makefile
+++ b/04_safe_globals/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/color.mk
 include ../common/docker.mk
diff --git a/04_safe_globals/README.md b/04_safe_globals/README.md
index 86767a95c..83e1a45c7 100644
--- a/04_safe_globals/README.md
+++ b/04_safe_globals/README.md
@@ -264,7 +264,7 @@ diff -uNr 03_hacky_hello_world/src/synchronization.rs 04_safe_globals/src/synchr
 @@ -0,0 +1,77 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Synchronization primitives.
 +//!
diff --git a/04_safe_globals/src/_arch/aarch64/cpu.rs b/04_safe_globals/src/_arch/aarch64/cpu.rs
index 5f97ea410..3b52e3a36 100644
--- a/04_safe_globals/src/_arch/aarch64/cpu.rs
+++ b/04_safe_globals/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 //!
diff --git a/04_safe_globals/src/_arch/aarch64/cpu/boot.rs b/04_safe_globals/src/_arch/aarch64/cpu/boot.rs
index a8defcdae..2f9654c7f 100644
--- a/04_safe_globals/src/_arch/aarch64/cpu/boot.rs
+++ b/04_safe_globals/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/04_safe_globals/src/_arch/aarch64/cpu/boot.s b/04_safe_globals/src/_arch/aarch64/cpu/boot.s
index 28bc1a70a..7d445a935 100644
--- a/04_safe_globals/src/_arch/aarch64/cpu/boot.s
+++ b/04_safe_globals/src/_arch/aarch64/cpu/boot.s
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //--------------------------------------------------------------------------------------------------
 // Definitions
diff --git a/04_safe_globals/src/bsp.rs b/04_safe_globals/src/bsp.rs
index 2b92251f5..a09ba8a45 100644
--- a/04_safe_globals/src/bsp.rs
+++ b/04_safe_globals/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/04_safe_globals/src/bsp/raspberrypi.rs b/04_safe_globals/src/bsp/raspberrypi.rs
index 73863b174..6688a5146 100644
--- a/04_safe_globals/src/bsp/raspberrypi.rs
+++ b/04_safe_globals/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/04_safe_globals/src/bsp/raspberrypi/console.rs b/04_safe_globals/src/bsp/raspberrypi/console.rs
index f340d940f..f471cebb9 100644
--- a/04_safe_globals/src/bsp/raspberrypi/console.rs
+++ b/04_safe_globals/src/bsp/raspberrypi/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP console facilities.
 
diff --git a/04_safe_globals/src/bsp/raspberrypi/cpu.rs b/04_safe_globals/src/bsp/raspberrypi/cpu.rs
index d09ff9568..85fb89e49 100644
--- a/04_safe_globals/src/bsp/raspberrypi/cpu.rs
+++ b/04_safe_globals/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/04_safe_globals/src/bsp/raspberrypi/link.ld b/04_safe_globals/src/bsp/raspberrypi/link.ld
index 7c01ccbf5..007afd4a5 100644
--- a/04_safe_globals/src/bsp/raspberrypi/link.ld
+++ b/04_safe_globals/src/bsp/raspberrypi/link.ld
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT OR Apache-2.0
  *
- * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+ * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
  */
 
 __rpi_phys_dram_start_addr = 0;
diff --git a/04_safe_globals/src/console.rs b/04_safe_globals/src/console.rs
index 658cf66df..3894c18d9 100644
--- a/04_safe_globals/src/console.rs
+++ b/04_safe_globals/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/04_safe_globals/src/cpu.rs b/04_safe_globals/src/cpu.rs
index d8f780823..b2a960103 100644
--- a/04_safe_globals/src/cpu.rs
+++ b/04_safe_globals/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/04_safe_globals/src/cpu/boot.rs b/04_safe_globals/src/cpu/boot.rs
index 1dc5c1808..8091dac36 100644
--- a/04_safe_globals/src/cpu/boot.rs
+++ b/04_safe_globals/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/04_safe_globals/src/main.rs b/04_safe_globals/src/main.rs
index dddacdb25..450ae1ff5 100644
--- a/04_safe_globals/src/main.rs
+++ b/04_safe_globals/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/04_safe_globals/src/panic_wait.rs b/04_safe_globals/src/panic_wait.rs
index 255eedeeb..3c1ca85b7 100644
--- a/04_safe_globals/src/panic_wait.rs
+++ b/04_safe_globals/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/04_safe_globals/src/print.rs b/04_safe_globals/src/print.rs
index 8ea5db240..81c6d179a 100644
--- a/04_safe_globals/src/print.rs
+++ b/04_safe_globals/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing.
 
diff --git a/04_safe_globals/src/synchronization.rs b/04_safe_globals/src/synchronization.rs
index 7bb2938be..d5653a19f 100644
--- a/04_safe_globals/src/synchronization.rs
+++ b/04_safe_globals/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/05_drivers_gpio_uart/Makefile b/05_drivers_gpio_uart/Makefile
index cd09a5408..518a1d5f0 100644
--- a/05_drivers_gpio_uart/Makefile
+++ b/05_drivers_gpio_uart/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/color.mk
 include ../common/docker.mk
diff --git a/05_drivers_gpio_uart/README.md b/05_drivers_gpio_uart/README.md
index e9f59429f..d54fa722e 100644
--- a/05_drivers_gpio_uart/README.md
+++ b/05_drivers_gpio_uart/README.md
@@ -233,7 +233,7 @@ diff -uNr 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 05_drivers_g
 @@ -0,0 +1,225 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! GPIO Driver.
 +
@@ -463,7 +463,7 @@ diff -uNr 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 05_dri
 @@ -0,0 +1,402 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! PL011 UART driver.
 +//!
@@ -870,7 +870,7 @@ diff -uNr 04_safe_globals/src/bsp/device_driver/bcm.rs 05_drivers_gpio_uart/src/
 @@ -0,0 +1,11 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! BCM driver top level.
 +
@@ -886,7 +886,7 @@ diff -uNr 04_safe_globals/src/bsp/device_driver/common.rs 05_drivers_gpio_uart/s
 @@ -0,0 +1,38 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Common device driver code.
 +
@@ -929,7 +929,7 @@ diff -uNr 04_safe_globals/src/bsp/device_driver.rs 05_drivers_gpio_uart/src/bsp/
 @@ -0,0 +1,12 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Device driver.
 +
@@ -1082,7 +1082,7 @@ diff -uNr 04_safe_globals/src/bsp/raspberrypi/driver.rs 05_drivers_gpio_uart/src
 @@ -0,0 +1,49 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! BSP driver support.
 +
@@ -1136,7 +1136,7 @@ diff -uNr 04_safe_globals/src/bsp/raspberrypi/memory.rs 05_drivers_gpio_uart/src
 @@ -0,0 +1,37 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! BSP Memory Management.
 +
@@ -1287,7 +1287,7 @@ diff -uNr 04_safe_globals/src/driver.rs 05_drivers_gpio_uart/src/driver.rs
 @@ -0,0 +1,44 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Driver support.
 +
diff --git a/05_drivers_gpio_uart/src/_arch/aarch64/cpu.rs b/05_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
index ade53a3ca..2ef860d23 100644
--- a/05_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
+++ b/05_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 //!
diff --git a/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs b/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs
index a8defcdae..2f9654c7f 100644
--- a/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs
+++ b/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s b/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s
index 28bc1a70a..7d445a935 100644
--- a/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s
+++ b/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //--------------------------------------------------------------------------------------------------
 // Definitions
diff --git a/05_drivers_gpio_uart/src/bsp.rs b/05_drivers_gpio_uart/src/bsp.rs
index c558922f7..824787f65 100644
--- a/05_drivers_gpio_uart/src/bsp.rs
+++ b/05_drivers_gpio_uart/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/05_drivers_gpio_uart/src/bsp/device_driver.rs b/05_drivers_gpio_uart/src/bsp/device_driver.rs
index 2fcbc83e7..6e9bf8f39 100644
--- a/05_drivers_gpio_uart/src/bsp/device_driver.rs
+++ b/05_drivers_gpio_uart/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/05_drivers_gpio_uart/src/bsp/device_driver/bcm.rs b/05_drivers_gpio_uart/src/bsp/device_driver/bcm.rs
index 77613d261..b4b7906e5 100644
--- a/05_drivers_gpio_uart/src/bsp/device_driver/bcm.rs
+++ b/05_drivers_gpio_uart/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index dd207221a..76ce3bd19 100644
--- a/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index b290524ca..878ea567f 100644
--- a/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 //!
diff --git a/05_drivers_gpio_uart/src/bsp/device_driver/common.rs b/05_drivers_gpio_uart/src/bsp/device_driver/common.rs
index 41553b7a5..fd9e988ea 100644
--- a/05_drivers_gpio_uart/src/bsp/device_driver/common.rs
+++ b/05_drivers_gpio_uart/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/05_drivers_gpio_uart/src/bsp/raspberrypi.rs b/05_drivers_gpio_uart/src/bsp/raspberrypi.rs
index c0b639c97..22edb4fa6 100644
--- a/05_drivers_gpio_uart/src/bsp/raspberrypi.rs
+++ b/05_drivers_gpio_uart/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/05_drivers_gpio_uart/src/bsp/raspberrypi/console.rs b/05_drivers_gpio_uart/src/bsp/raspberrypi/console.rs
index c6bb5263c..a247032fc 100644
--- a/05_drivers_gpio_uart/src/bsp/raspberrypi/console.rs
+++ b/05_drivers_gpio_uart/src/bsp/raspberrypi/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP console facilities.
 
diff --git a/05_drivers_gpio_uart/src/bsp/raspberrypi/cpu.rs b/05_drivers_gpio_uart/src/bsp/raspberrypi/cpu.rs
index d09ff9568..85fb89e49 100644
--- a/05_drivers_gpio_uart/src/bsp/raspberrypi/cpu.rs
+++ b/05_drivers_gpio_uart/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/05_drivers_gpio_uart/src/bsp/raspberrypi/driver.rs b/05_drivers_gpio_uart/src/bsp/raspberrypi/driver.rs
index ab910185c..b5538baa3 100644
--- a/05_drivers_gpio_uart/src/bsp/raspberrypi/driver.rs
+++ b/05_drivers_gpio_uart/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/05_drivers_gpio_uart/src/bsp/raspberrypi/link.ld b/05_drivers_gpio_uart/src/bsp/raspberrypi/link.ld
index 7c01ccbf5..007afd4a5 100644
--- a/05_drivers_gpio_uart/src/bsp/raspberrypi/link.ld
+++ b/05_drivers_gpio_uart/src/bsp/raspberrypi/link.ld
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT OR Apache-2.0
  *
- * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+ * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
  */
 
 __rpi_phys_dram_start_addr = 0;
diff --git a/05_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs b/05_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
index ef397a6f9..27be8590e 100644
--- a/05_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
+++ b/05_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 
diff --git a/05_drivers_gpio_uart/src/console.rs b/05_drivers_gpio_uart/src/console.rs
index c3154ba23..e49e241fe 100644
--- a/05_drivers_gpio_uart/src/console.rs
+++ b/05_drivers_gpio_uart/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/05_drivers_gpio_uart/src/cpu.rs b/05_drivers_gpio_uart/src/cpu.rs
index c5e956ea6..6ccee4562 100644
--- a/05_drivers_gpio_uart/src/cpu.rs
+++ b/05_drivers_gpio_uart/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/05_drivers_gpio_uart/src/cpu/boot.rs b/05_drivers_gpio_uart/src/cpu/boot.rs
index 1dc5c1808..8091dac36 100644
--- a/05_drivers_gpio_uart/src/cpu/boot.rs
+++ b/05_drivers_gpio_uart/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/05_drivers_gpio_uart/src/driver.rs b/05_drivers_gpio_uart/src/driver.rs
index 6e8c5533a..2fcc75629 100644
--- a/05_drivers_gpio_uart/src/driver.rs
+++ b/05_drivers_gpio_uart/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/05_drivers_gpio_uart/src/main.rs b/05_drivers_gpio_uart/src/main.rs
index 1ca13aebf..55e80f566 100644
--- a/05_drivers_gpio_uart/src/main.rs
+++ b/05_drivers_gpio_uart/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/05_drivers_gpio_uart/src/panic_wait.rs b/05_drivers_gpio_uart/src/panic_wait.rs
index 66fbe6b40..946041b32 100644
--- a/05_drivers_gpio_uart/src/panic_wait.rs
+++ b/05_drivers_gpio_uart/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/05_drivers_gpio_uart/src/print.rs b/05_drivers_gpio_uart/src/print.rs
index 8ea5db240..81c6d179a 100644
--- a/05_drivers_gpio_uart/src/print.rs
+++ b/05_drivers_gpio_uart/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing.
 
diff --git a/05_drivers_gpio_uart/src/synchronization.rs b/05_drivers_gpio_uart/src/synchronization.rs
index 7bb2938be..d5653a19f 100644
--- a/05_drivers_gpio_uart/src/synchronization.rs
+++ b/05_drivers_gpio_uart/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/06_uart_chainloader/Makefile b/06_uart_chainloader/Makefile
index e4f94ad19..9cddeddb9 100644
--- a/06_uart_chainloader/Makefile
+++ b/06_uart_chainloader/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/color.mk
 include ../common/docker.mk
diff --git a/06_uart_chainloader/README.md b/06_uart_chainloader/README.md
index ef4bee8c3..fd2d84cd8 100644
--- a/06_uart_chainloader/README.md
+++ b/06_uart_chainloader/README.md
@@ -384,7 +384,7 @@ diff -uNr 05_drivers_gpio_uart/src/bsp/raspberrypi/link.ld 06_uart_chainloader/s
 --- 05_drivers_gpio_uart/src/bsp/raspberrypi/link.ld
 +++ 06_uart_chainloader/src/bsp/raspberrypi/link.ld
 @@ -3,8 +3,6 @@
-  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+  * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
   */
 
 -__rpi_phys_dram_start_addr = 0;
@@ -555,7 +555,7 @@ diff -uNr 05_drivers_gpio_uart/tests/chainboot_test.rb 06_uart_chainloader/tests
 +
 +# SPDX-License-Identifier: MIT OR Apache-2.0
 +#
-+# Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
++# Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +require_relative '../../common/serial/minipush'
 +require_relative '../../common/tests/boot_test'
diff --git a/06_uart_chainloader/src/_arch/aarch64/cpu.rs b/06_uart_chainloader/src/_arch/aarch64/cpu.rs
index ade53a3ca..2ef860d23 100644
--- a/06_uart_chainloader/src/_arch/aarch64/cpu.rs
+++ b/06_uart_chainloader/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 //!
diff --git a/06_uart_chainloader/src/_arch/aarch64/cpu/boot.rs b/06_uart_chainloader/src/_arch/aarch64/cpu/boot.rs
index a8defcdae..2f9654c7f 100644
--- a/06_uart_chainloader/src/_arch/aarch64/cpu/boot.rs
+++ b/06_uart_chainloader/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/06_uart_chainloader/src/_arch/aarch64/cpu/boot.s b/06_uart_chainloader/src/_arch/aarch64/cpu/boot.s
index e88b18867..74dcdfbe6 100644
--- a/06_uart_chainloader/src/_arch/aarch64/cpu/boot.s
+++ b/06_uart_chainloader/src/_arch/aarch64/cpu/boot.s
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //--------------------------------------------------------------------------------------------------
 // Definitions
diff --git a/06_uart_chainloader/src/bsp.rs b/06_uart_chainloader/src/bsp.rs
index c558922f7..824787f65 100644
--- a/06_uart_chainloader/src/bsp.rs
+++ b/06_uart_chainloader/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/06_uart_chainloader/src/bsp/device_driver.rs b/06_uart_chainloader/src/bsp/device_driver.rs
index 2fcbc83e7..6e9bf8f39 100644
--- a/06_uart_chainloader/src/bsp/device_driver.rs
+++ b/06_uart_chainloader/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/06_uart_chainloader/src/bsp/device_driver/bcm.rs b/06_uart_chainloader/src/bsp/device_driver/bcm.rs
index 77613d261..b4b7906e5 100644
--- a/06_uart_chainloader/src/bsp/device_driver/bcm.rs
+++ b/06_uart_chainloader/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index cd2cf2af9..5c68107a9 100644
--- a/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 707d8a687..e6b4a952e 100644
--- a/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 //!
diff --git a/06_uart_chainloader/src/bsp/device_driver/common.rs b/06_uart_chainloader/src/bsp/device_driver/common.rs
index 41553b7a5..fd9e988ea 100644
--- a/06_uart_chainloader/src/bsp/device_driver/common.rs
+++ b/06_uart_chainloader/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/06_uart_chainloader/src/bsp/raspberrypi.rs b/06_uart_chainloader/src/bsp/raspberrypi.rs
index c0b639c97..22edb4fa6 100644
--- a/06_uart_chainloader/src/bsp/raspberrypi.rs
+++ b/06_uart_chainloader/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/06_uart_chainloader/src/bsp/raspberrypi/console.rs b/06_uart_chainloader/src/bsp/raspberrypi/console.rs
index c6bb5263c..a247032fc 100644
--- a/06_uart_chainloader/src/bsp/raspberrypi/console.rs
+++ b/06_uart_chainloader/src/bsp/raspberrypi/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP console facilities.
 
diff --git a/06_uart_chainloader/src/bsp/raspberrypi/cpu.rs b/06_uart_chainloader/src/bsp/raspberrypi/cpu.rs
index d09ff9568..85fb89e49 100644
--- a/06_uart_chainloader/src/bsp/raspberrypi/cpu.rs
+++ b/06_uart_chainloader/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/06_uart_chainloader/src/bsp/raspberrypi/driver.rs b/06_uart_chainloader/src/bsp/raspberrypi/driver.rs
index ab910185c..b5538baa3 100644
--- a/06_uart_chainloader/src/bsp/raspberrypi/driver.rs
+++ b/06_uart_chainloader/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/06_uart_chainloader/src/bsp/raspberrypi/link.ld b/06_uart_chainloader/src/bsp/raspberrypi/link.ld
index 6194c41f8..4fd5bf6af 100644
--- a/06_uart_chainloader/src/bsp/raspberrypi/link.ld
+++ b/06_uart_chainloader/src/bsp/raspberrypi/link.ld
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT OR Apache-2.0
  *
- * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+ * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
  */
 
 /* The physical address at which the the kernel binary will be loaded by the Raspberry's firmware */
diff --git a/06_uart_chainloader/src/bsp/raspberrypi/memory.rs b/06_uart_chainloader/src/bsp/raspberrypi/memory.rs
index 852b89050..0959bdce7 100644
--- a/06_uart_chainloader/src/bsp/raspberrypi/memory.rs
+++ b/06_uart_chainloader/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 
diff --git a/06_uart_chainloader/src/console.rs b/06_uart_chainloader/src/console.rs
index c3154ba23..e49e241fe 100644
--- a/06_uart_chainloader/src/console.rs
+++ b/06_uart_chainloader/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/06_uart_chainloader/src/cpu.rs b/06_uart_chainloader/src/cpu.rs
index c5e956ea6..6ccee4562 100644
--- a/06_uart_chainloader/src/cpu.rs
+++ b/06_uart_chainloader/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/06_uart_chainloader/src/cpu/boot.rs b/06_uart_chainloader/src/cpu/boot.rs
index 1dc5c1808..8091dac36 100644
--- a/06_uart_chainloader/src/cpu/boot.rs
+++ b/06_uart_chainloader/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/06_uart_chainloader/src/driver.rs b/06_uart_chainloader/src/driver.rs
index 6e8c5533a..2fcc75629 100644
--- a/06_uart_chainloader/src/driver.rs
+++ b/06_uart_chainloader/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/06_uart_chainloader/src/main.rs b/06_uart_chainloader/src/main.rs
index 225e26fbb..e44a1ae67 100644
--- a/06_uart_chainloader/src/main.rs
+++ b/06_uart_chainloader/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/06_uart_chainloader/src/panic_wait.rs b/06_uart_chainloader/src/panic_wait.rs
index 66fbe6b40..946041b32 100644
--- a/06_uart_chainloader/src/panic_wait.rs
+++ b/06_uart_chainloader/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/06_uart_chainloader/src/print.rs b/06_uart_chainloader/src/print.rs
index 8ea5db240..81c6d179a 100644
--- a/06_uart_chainloader/src/print.rs
+++ b/06_uart_chainloader/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing.
 
diff --git a/06_uart_chainloader/src/synchronization.rs b/06_uart_chainloader/src/synchronization.rs
index 7bb2938be..d5653a19f 100644
--- a/06_uart_chainloader/src/synchronization.rs
+++ b/06_uart_chainloader/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/06_uart_chainloader/tests/chainboot_test.rb b/06_uart_chainloader/tests/chainboot_test.rb
index 3dee0f9c4..0da2d82d5 100644
--- a/06_uart_chainloader/tests/chainboot_test.rb
+++ b/06_uart_chainloader/tests/chainboot_test.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 require_relative '../../common/serial/minipush'
 require_relative '../../common/tests/boot_test'
diff --git a/07_timestamps/Makefile b/07_timestamps/Makefile
index d5023b033..7a97517f1 100644
--- a/07_timestamps/Makefile
+++ b/07_timestamps/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/color.mk
 include ../common/docker.mk
diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index 02670c160..42bd87f96 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -251,7 +251,7 @@ diff -uNr 06_uart_chainloader/src/_arch/aarch64/time.rs 07_timestamps/src/_arch/
 @@ -0,0 +1,119 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Architectural timer primitives.
 +//!
@@ -453,7 +453,7 @@ diff -uNr 06_uart_chainloader/src/bsp/raspberrypi/link.ld 07_timestamps/src/bsp/
 --- 06_uart_chainloader/src/bsp/raspberrypi/link.ld
 +++ 07_timestamps/src/bsp/raspberrypi/link.ld
 @@ -3,6 +3,8 @@
-  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+  * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
   */
 
 +__rpi_phys_dram_start_addr = 0;
@@ -712,7 +712,7 @@ diff -uNr 06_uart_chainloader/src/time.rs 07_timestamps/src/time.rs
 @@ -0,0 +1,37 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Timer primitives.
 +
@@ -764,7 +764,7 @@ diff -uNr 06_uart_chainloader/tests/chainboot_test.rb 07_timestamps/tests/chainb
 -
 -# SPDX-License-Identifier: MIT OR Apache-2.0
 -#
--# Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+-# Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 -
 -require_relative '../../common/serial/minipush'
 -require_relative '../../common/tests/boot_test'
diff --git a/07_timestamps/src/_arch/aarch64/cpu.rs b/07_timestamps/src/_arch/aarch64/cpu.rs
index d3b07461a..4414ac6ad 100644
--- a/07_timestamps/src/_arch/aarch64/cpu.rs
+++ b/07_timestamps/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 //!
diff --git a/07_timestamps/src/_arch/aarch64/cpu/boot.rs b/07_timestamps/src/_arch/aarch64/cpu/boot.rs
index a8defcdae..2f9654c7f 100644
--- a/07_timestamps/src/_arch/aarch64/cpu/boot.rs
+++ b/07_timestamps/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/07_timestamps/src/_arch/aarch64/cpu/boot.s b/07_timestamps/src/_arch/aarch64/cpu/boot.s
index 28bc1a70a..7d445a935 100644
--- a/07_timestamps/src/_arch/aarch64/cpu/boot.s
+++ b/07_timestamps/src/_arch/aarch64/cpu/boot.s
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //--------------------------------------------------------------------------------------------------
 // Definitions
diff --git a/07_timestamps/src/_arch/aarch64/time.rs b/07_timestamps/src/_arch/aarch64/time.rs
index 7a7647ef7..576248390 100644
--- a/07_timestamps/src/_arch/aarch64/time.rs
+++ b/07_timestamps/src/_arch/aarch64/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
 //!
diff --git a/07_timestamps/src/bsp.rs b/07_timestamps/src/bsp.rs
index c558922f7..824787f65 100644
--- a/07_timestamps/src/bsp.rs
+++ b/07_timestamps/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/07_timestamps/src/bsp/device_driver.rs b/07_timestamps/src/bsp/device_driver.rs
index 2fcbc83e7..6e9bf8f39 100644
--- a/07_timestamps/src/bsp/device_driver.rs
+++ b/07_timestamps/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/07_timestamps/src/bsp/device_driver/bcm.rs b/07_timestamps/src/bsp/device_driver/bcm.rs
index 77613d261..b4b7906e5 100644
--- a/07_timestamps/src/bsp/device_driver/bcm.rs
+++ b/07_timestamps/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 8033381e9..dbb4beaa6 100644
--- a/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index b290524ca..878ea567f 100644
--- a/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 //!
diff --git a/07_timestamps/src/bsp/device_driver/common.rs b/07_timestamps/src/bsp/device_driver/common.rs
index 41553b7a5..fd9e988ea 100644
--- a/07_timestamps/src/bsp/device_driver/common.rs
+++ b/07_timestamps/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/07_timestamps/src/bsp/raspberrypi.rs b/07_timestamps/src/bsp/raspberrypi.rs
index c0b639c97..22edb4fa6 100644
--- a/07_timestamps/src/bsp/raspberrypi.rs
+++ b/07_timestamps/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/07_timestamps/src/bsp/raspberrypi/console.rs b/07_timestamps/src/bsp/raspberrypi/console.rs
index c6bb5263c..a247032fc 100644
--- a/07_timestamps/src/bsp/raspberrypi/console.rs
+++ b/07_timestamps/src/bsp/raspberrypi/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP console facilities.
 
diff --git a/07_timestamps/src/bsp/raspberrypi/cpu.rs b/07_timestamps/src/bsp/raspberrypi/cpu.rs
index d09ff9568..85fb89e49 100644
--- a/07_timestamps/src/bsp/raspberrypi/cpu.rs
+++ b/07_timestamps/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/07_timestamps/src/bsp/raspberrypi/driver.rs b/07_timestamps/src/bsp/raspberrypi/driver.rs
index ab910185c..b5538baa3 100644
--- a/07_timestamps/src/bsp/raspberrypi/driver.rs
+++ b/07_timestamps/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/07_timestamps/src/bsp/raspberrypi/link.ld b/07_timestamps/src/bsp/raspberrypi/link.ld
index 7c01ccbf5..007afd4a5 100644
--- a/07_timestamps/src/bsp/raspberrypi/link.ld
+++ b/07_timestamps/src/bsp/raspberrypi/link.ld
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT OR Apache-2.0
  *
- * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+ * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
  */
 
 __rpi_phys_dram_start_addr = 0;
diff --git a/07_timestamps/src/bsp/raspberrypi/memory.rs b/07_timestamps/src/bsp/raspberrypi/memory.rs
index ef397a6f9..27be8590e 100644
--- a/07_timestamps/src/bsp/raspberrypi/memory.rs
+++ b/07_timestamps/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 
diff --git a/07_timestamps/src/console.rs b/07_timestamps/src/console.rs
index c3154ba23..e49e241fe 100644
--- a/07_timestamps/src/console.rs
+++ b/07_timestamps/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/07_timestamps/src/cpu.rs b/07_timestamps/src/cpu.rs
index 7a095cb12..62503fb40 100644
--- a/07_timestamps/src/cpu.rs
+++ b/07_timestamps/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/07_timestamps/src/cpu/boot.rs b/07_timestamps/src/cpu/boot.rs
index 1dc5c1808..8091dac36 100644
--- a/07_timestamps/src/cpu/boot.rs
+++ b/07_timestamps/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/07_timestamps/src/driver.rs b/07_timestamps/src/driver.rs
index 6e8c5533a..2fcc75629 100644
--- a/07_timestamps/src/driver.rs
+++ b/07_timestamps/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/07_timestamps/src/main.rs b/07_timestamps/src/main.rs
index 2df465b70..e5d1d81ea 100644
--- a/07_timestamps/src/main.rs
+++ b/07_timestamps/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/07_timestamps/src/panic_wait.rs b/07_timestamps/src/panic_wait.rs
index 66fbe6b40..946041b32 100644
--- a/07_timestamps/src/panic_wait.rs
+++ b/07_timestamps/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/07_timestamps/src/print.rs b/07_timestamps/src/print.rs
index 89fa66943..5decb2926 100644
--- a/07_timestamps/src/print.rs
+++ b/07_timestamps/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing.
 
diff --git a/07_timestamps/src/synchronization.rs b/07_timestamps/src/synchronization.rs
index 7bb2938be..d5653a19f 100644
--- a/07_timestamps/src/synchronization.rs
+++ b/07_timestamps/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/07_timestamps/src/time.rs b/07_timestamps/src/time.rs
index 953b6f0df..6d92b1966 100644
--- a/07_timestamps/src/time.rs
+++ b/07_timestamps/src/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer primitives.
 
diff --git a/08_hw_debug_JTAG/Makefile b/08_hw_debug_JTAG/Makefile
index dd739e130..5b1c2339e 100644
--- a/08_hw_debug_JTAG/Makefile
+++ b/08_hw_debug_JTAG/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/color.mk
 include ../common/docker.mk
diff --git a/08_hw_debug_JTAG/src/_arch/aarch64/cpu.rs b/08_hw_debug_JTAG/src/_arch/aarch64/cpu.rs
index d3b07461a..4414ac6ad 100644
--- a/08_hw_debug_JTAG/src/_arch/aarch64/cpu.rs
+++ b/08_hw_debug_JTAG/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 //!
diff --git a/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs b/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs
index a8defcdae..2f9654c7f 100644
--- a/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs
+++ b/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s b/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s
index 28bc1a70a..7d445a935 100644
--- a/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s
+++ b/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //--------------------------------------------------------------------------------------------------
 // Definitions
diff --git a/08_hw_debug_JTAG/src/_arch/aarch64/time.rs b/08_hw_debug_JTAG/src/_arch/aarch64/time.rs
index 7a7647ef7..576248390 100644
--- a/08_hw_debug_JTAG/src/_arch/aarch64/time.rs
+++ b/08_hw_debug_JTAG/src/_arch/aarch64/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
 //!
diff --git a/08_hw_debug_JTAG/src/bsp.rs b/08_hw_debug_JTAG/src/bsp.rs
index c558922f7..824787f65 100644
--- a/08_hw_debug_JTAG/src/bsp.rs
+++ b/08_hw_debug_JTAG/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/08_hw_debug_JTAG/src/bsp/device_driver.rs b/08_hw_debug_JTAG/src/bsp/device_driver.rs
index 2fcbc83e7..6e9bf8f39 100644
--- a/08_hw_debug_JTAG/src/bsp/device_driver.rs
+++ b/08_hw_debug_JTAG/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/08_hw_debug_JTAG/src/bsp/device_driver/bcm.rs b/08_hw_debug_JTAG/src/bsp/device_driver/bcm.rs
index 77613d261..b4b7906e5 100644
--- a/08_hw_debug_JTAG/src/bsp/device_driver/bcm.rs
+++ b/08_hw_debug_JTAG/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 8033381e9..dbb4beaa6 100644
--- a/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index b290524ca..878ea567f 100644
--- a/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 //!
diff --git a/08_hw_debug_JTAG/src/bsp/device_driver/common.rs b/08_hw_debug_JTAG/src/bsp/device_driver/common.rs
index 41553b7a5..fd9e988ea 100644
--- a/08_hw_debug_JTAG/src/bsp/device_driver/common.rs
+++ b/08_hw_debug_JTAG/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/08_hw_debug_JTAG/src/bsp/raspberrypi.rs b/08_hw_debug_JTAG/src/bsp/raspberrypi.rs
index c0b639c97..22edb4fa6 100644
--- a/08_hw_debug_JTAG/src/bsp/raspberrypi.rs
+++ b/08_hw_debug_JTAG/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/08_hw_debug_JTAG/src/bsp/raspberrypi/console.rs b/08_hw_debug_JTAG/src/bsp/raspberrypi/console.rs
index c6bb5263c..a247032fc 100644
--- a/08_hw_debug_JTAG/src/bsp/raspberrypi/console.rs
+++ b/08_hw_debug_JTAG/src/bsp/raspberrypi/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP console facilities.
 
diff --git a/08_hw_debug_JTAG/src/bsp/raspberrypi/cpu.rs b/08_hw_debug_JTAG/src/bsp/raspberrypi/cpu.rs
index d09ff9568..85fb89e49 100644
--- a/08_hw_debug_JTAG/src/bsp/raspberrypi/cpu.rs
+++ b/08_hw_debug_JTAG/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/08_hw_debug_JTAG/src/bsp/raspberrypi/driver.rs b/08_hw_debug_JTAG/src/bsp/raspberrypi/driver.rs
index ab910185c..b5538baa3 100644
--- a/08_hw_debug_JTAG/src/bsp/raspberrypi/driver.rs
+++ b/08_hw_debug_JTAG/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/08_hw_debug_JTAG/src/bsp/raspberrypi/link.ld b/08_hw_debug_JTAG/src/bsp/raspberrypi/link.ld
index 7c01ccbf5..007afd4a5 100644
--- a/08_hw_debug_JTAG/src/bsp/raspberrypi/link.ld
+++ b/08_hw_debug_JTAG/src/bsp/raspberrypi/link.ld
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT OR Apache-2.0
  *
- * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+ * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
  */
 
 __rpi_phys_dram_start_addr = 0;
diff --git a/08_hw_debug_JTAG/src/bsp/raspberrypi/memory.rs b/08_hw_debug_JTAG/src/bsp/raspberrypi/memory.rs
index ef397a6f9..27be8590e 100644
--- a/08_hw_debug_JTAG/src/bsp/raspberrypi/memory.rs
+++ b/08_hw_debug_JTAG/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 
diff --git a/08_hw_debug_JTAG/src/console.rs b/08_hw_debug_JTAG/src/console.rs
index c3154ba23..e49e241fe 100644
--- a/08_hw_debug_JTAG/src/console.rs
+++ b/08_hw_debug_JTAG/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/08_hw_debug_JTAG/src/cpu.rs b/08_hw_debug_JTAG/src/cpu.rs
index 7a095cb12..62503fb40 100644
--- a/08_hw_debug_JTAG/src/cpu.rs
+++ b/08_hw_debug_JTAG/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/08_hw_debug_JTAG/src/cpu/boot.rs b/08_hw_debug_JTAG/src/cpu/boot.rs
index 1dc5c1808..8091dac36 100644
--- a/08_hw_debug_JTAG/src/cpu/boot.rs
+++ b/08_hw_debug_JTAG/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/08_hw_debug_JTAG/src/driver.rs b/08_hw_debug_JTAG/src/driver.rs
index 6e8c5533a..2fcc75629 100644
--- a/08_hw_debug_JTAG/src/driver.rs
+++ b/08_hw_debug_JTAG/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/08_hw_debug_JTAG/src/main.rs b/08_hw_debug_JTAG/src/main.rs
index 2df465b70..e5d1d81ea 100644
--- a/08_hw_debug_JTAG/src/main.rs
+++ b/08_hw_debug_JTAG/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/08_hw_debug_JTAG/src/panic_wait.rs b/08_hw_debug_JTAG/src/panic_wait.rs
index 66fbe6b40..946041b32 100644
--- a/08_hw_debug_JTAG/src/panic_wait.rs
+++ b/08_hw_debug_JTAG/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/08_hw_debug_JTAG/src/print.rs b/08_hw_debug_JTAG/src/print.rs
index 89fa66943..5decb2926 100644
--- a/08_hw_debug_JTAG/src/print.rs
+++ b/08_hw_debug_JTAG/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing.
 
diff --git a/08_hw_debug_JTAG/src/synchronization.rs b/08_hw_debug_JTAG/src/synchronization.rs
index 7bb2938be..d5653a19f 100644
--- a/08_hw_debug_JTAG/src/synchronization.rs
+++ b/08_hw_debug_JTAG/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/08_hw_debug_JTAG/src/time.rs b/08_hw_debug_JTAG/src/time.rs
index 953b6f0df..6d92b1966 100644
--- a/08_hw_debug_JTAG/src/time.rs
+++ b/08_hw_debug_JTAG/src/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer primitives.
 
diff --git a/09_privilege_level/Makefile b/09_privilege_level/Makefile
index dd739e130..5b1c2339e 100644
--- a/09_privilege_level/Makefile
+++ b/09_privilege_level/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/color.mk
 include ../common/docker.mk
diff --git a/09_privilege_level/README.md b/09_privilege_level/README.md
index 8dc091933..b98434958 100644
--- a/09_privilege_level/README.md
+++ b/09_privilege_level/README.md
@@ -328,7 +328,7 @@ diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/exception/asynchronous.rs 09_privil
 @@ -0,0 +1,82 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Architectural asynchronous exception handling.
 +//!
@@ -415,7 +415,7 @@ diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/exception.rs 09_privilege_level/src
 @@ -0,0 +1,31 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Architectural synchronous and asynchronous exception handling.
 +//!
@@ -451,7 +451,7 @@ diff -uNr 08_hw_debug_JTAG/src/exception/asynchronous.rs 09_privilege_level/src/
 @@ -0,0 +1,14 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Asynchronous exception handling.
 +
@@ -470,7 +470,7 @@ diff -uNr 08_hw_debug_JTAG/src/exception.rs 09_privilege_level/src/exception.rs
 @@ -0,0 +1,30 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Synchronous and asynchronous exception handling.
 +
diff --git a/09_privilege_level/src/_arch/aarch64/cpu.rs b/09_privilege_level/src/_arch/aarch64/cpu.rs
index d3b07461a..4414ac6ad 100644
--- a/09_privilege_level/src/_arch/aarch64/cpu.rs
+++ b/09_privilege_level/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 //!
diff --git a/09_privilege_level/src/_arch/aarch64/cpu/boot.rs b/09_privilege_level/src/_arch/aarch64/cpu/boot.rs
index f54ae739b..f677c9c4b 100644
--- a/09_privilege_level/src/_arch/aarch64/cpu/boot.rs
+++ b/09_privilege_level/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/09_privilege_level/src/_arch/aarch64/cpu/boot.s b/09_privilege_level/src/_arch/aarch64/cpu/boot.s
index fa1984d66..28b35087c 100644
--- a/09_privilege_level/src/_arch/aarch64/cpu/boot.s
+++ b/09_privilege_level/src/_arch/aarch64/cpu/boot.s
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //--------------------------------------------------------------------------------------------------
 // Definitions
diff --git a/09_privilege_level/src/_arch/aarch64/exception.rs b/09_privilege_level/src/_arch/aarch64/exception.rs
index 10fa86a93..c8eac4f02 100644
--- a/09_privilege_level/src/_arch/aarch64/exception.rs
+++ b/09_privilege_level/src/_arch/aarch64/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural synchronous and asynchronous exception handling.
 //!
diff --git a/09_privilege_level/src/_arch/aarch64/exception/asynchronous.rs b/09_privilege_level/src/_arch/aarch64/exception/asynchronous.rs
index c447d4557..e3e3672e4 100644
--- a/09_privilege_level/src/_arch/aarch64/exception/asynchronous.rs
+++ b/09_privilege_level/src/_arch/aarch64/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural asynchronous exception handling.
 //!
diff --git a/09_privilege_level/src/_arch/aarch64/time.rs b/09_privilege_level/src/_arch/aarch64/time.rs
index 7a7647ef7..576248390 100644
--- a/09_privilege_level/src/_arch/aarch64/time.rs
+++ b/09_privilege_level/src/_arch/aarch64/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
 //!
diff --git a/09_privilege_level/src/bsp.rs b/09_privilege_level/src/bsp.rs
index c558922f7..824787f65 100644
--- a/09_privilege_level/src/bsp.rs
+++ b/09_privilege_level/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/09_privilege_level/src/bsp/device_driver.rs b/09_privilege_level/src/bsp/device_driver.rs
index 2fcbc83e7..6e9bf8f39 100644
--- a/09_privilege_level/src/bsp/device_driver.rs
+++ b/09_privilege_level/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/09_privilege_level/src/bsp/device_driver/bcm.rs b/09_privilege_level/src/bsp/device_driver/bcm.rs
index 77613d261..b4b7906e5 100644
--- a/09_privilege_level/src/bsp/device_driver/bcm.rs
+++ b/09_privilege_level/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 8033381e9..dbb4beaa6 100644
--- a/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index b290524ca..878ea567f 100644
--- a/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 //!
diff --git a/09_privilege_level/src/bsp/device_driver/common.rs b/09_privilege_level/src/bsp/device_driver/common.rs
index 41553b7a5..fd9e988ea 100644
--- a/09_privilege_level/src/bsp/device_driver/common.rs
+++ b/09_privilege_level/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/09_privilege_level/src/bsp/raspberrypi.rs b/09_privilege_level/src/bsp/raspberrypi.rs
index c0b639c97..22edb4fa6 100644
--- a/09_privilege_level/src/bsp/raspberrypi.rs
+++ b/09_privilege_level/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/09_privilege_level/src/bsp/raspberrypi/console.rs b/09_privilege_level/src/bsp/raspberrypi/console.rs
index c6bb5263c..a247032fc 100644
--- a/09_privilege_level/src/bsp/raspberrypi/console.rs
+++ b/09_privilege_level/src/bsp/raspberrypi/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP console facilities.
 
diff --git a/09_privilege_level/src/bsp/raspberrypi/cpu.rs b/09_privilege_level/src/bsp/raspberrypi/cpu.rs
index d09ff9568..85fb89e49 100644
--- a/09_privilege_level/src/bsp/raspberrypi/cpu.rs
+++ b/09_privilege_level/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/09_privilege_level/src/bsp/raspberrypi/driver.rs b/09_privilege_level/src/bsp/raspberrypi/driver.rs
index ab910185c..b5538baa3 100644
--- a/09_privilege_level/src/bsp/raspberrypi/driver.rs
+++ b/09_privilege_level/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/09_privilege_level/src/bsp/raspberrypi/link.ld b/09_privilege_level/src/bsp/raspberrypi/link.ld
index 7c01ccbf5..007afd4a5 100644
--- a/09_privilege_level/src/bsp/raspberrypi/link.ld
+++ b/09_privilege_level/src/bsp/raspberrypi/link.ld
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT OR Apache-2.0
  *
- * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+ * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
  */
 
 __rpi_phys_dram_start_addr = 0;
diff --git a/09_privilege_level/src/bsp/raspberrypi/memory.rs b/09_privilege_level/src/bsp/raspberrypi/memory.rs
index ef397a6f9..27be8590e 100644
--- a/09_privilege_level/src/bsp/raspberrypi/memory.rs
+++ b/09_privilege_level/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 
diff --git a/09_privilege_level/src/console.rs b/09_privilege_level/src/console.rs
index c3154ba23..e49e241fe 100644
--- a/09_privilege_level/src/console.rs
+++ b/09_privilege_level/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/09_privilege_level/src/cpu.rs b/09_privilege_level/src/cpu.rs
index 7a095cb12..62503fb40 100644
--- a/09_privilege_level/src/cpu.rs
+++ b/09_privilege_level/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/09_privilege_level/src/cpu/boot.rs b/09_privilege_level/src/cpu/boot.rs
index 1dc5c1808..8091dac36 100644
--- a/09_privilege_level/src/cpu/boot.rs
+++ b/09_privilege_level/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/09_privilege_level/src/driver.rs b/09_privilege_level/src/driver.rs
index 6e8c5533a..2fcc75629 100644
--- a/09_privilege_level/src/driver.rs
+++ b/09_privilege_level/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/09_privilege_level/src/exception.rs b/09_privilege_level/src/exception.rs
index 87d4db63a..b80248f7b 100644
--- a/09_privilege_level/src/exception.rs
+++ b/09_privilege_level/src/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronous and asynchronous exception handling.
 
diff --git a/09_privilege_level/src/exception/asynchronous.rs b/09_privilege_level/src/exception/asynchronous.rs
index 566efe329..bad857790 100644
--- a/09_privilege_level/src/exception/asynchronous.rs
+++ b/09_privilege_level/src/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Asynchronous exception handling.
 
diff --git a/09_privilege_level/src/main.rs b/09_privilege_level/src/main.rs
index 7a692a0c8..c3bca5c33 100644
--- a/09_privilege_level/src/main.rs
+++ b/09_privilege_level/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/09_privilege_level/src/panic_wait.rs b/09_privilege_level/src/panic_wait.rs
index 66fbe6b40..946041b32 100644
--- a/09_privilege_level/src/panic_wait.rs
+++ b/09_privilege_level/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/09_privilege_level/src/print.rs b/09_privilege_level/src/print.rs
index 89fa66943..5decb2926 100644
--- a/09_privilege_level/src/print.rs
+++ b/09_privilege_level/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing.
 
diff --git a/09_privilege_level/src/synchronization.rs b/09_privilege_level/src/synchronization.rs
index 7bb2938be..d5653a19f 100644
--- a/09_privilege_level/src/synchronization.rs
+++ b/09_privilege_level/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/09_privilege_level/src/time.rs b/09_privilege_level/src/time.rs
index 953b6f0df..6d92b1966 100644
--- a/09_privilege_level/src/time.rs
+++ b/09_privilege_level/src/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer primitives.
 
diff --git a/10_virtual_mem_part1_identity_mapping/Makefile b/10_virtual_mem_part1_identity_mapping/Makefile
index dd739e130..5b1c2339e 100644
--- a/10_virtual_mem_part1_identity_mapping/Makefile
+++ b/10_virtual_mem_part1_identity_mapping/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/color.mk
 include ../common/docker.mk
diff --git a/10_virtual_mem_part1_identity_mapping/README.md b/10_virtual_mem_part1_identity_mapping/README.md
index 759f324be..3c41b814c 100644
--- a/10_virtual_mem_part1_identity_mapping/README.md
+++ b/10_virtual_mem_part1_identity_mapping/README.md
@@ -367,7 +367,7 @@ diff -uNr 09_privilege_level/src/_arch/aarch64/memory/mmu/translation_table.rs 1
 @@ -0,0 +1,292 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Architectural translation table.
 +//!
@@ -664,7 +664,7 @@ diff -uNr 09_privilege_level/src/_arch/aarch64/memory/mmu.rs 10_virtual_mem_part
 @@ -0,0 +1,165 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Memory Management Unit Driver.
 +//!
@@ -832,7 +832,7 @@ diff -uNr 09_privilege_level/src/bsp/raspberrypi/link.ld 10_virtual_mem_part1_id
 --- 09_privilege_level/src/bsp/raspberrypi/link.ld
 +++ 10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
 @@ -3,6 +3,9 @@
-  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+  * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
   */
 
 +PAGE_SIZE = 64K;
@@ -871,7 +871,7 @@ diff -uNr 09_privilege_level/src/bsp/raspberrypi/memory/mmu.rs 10_virtual_mem_pa
 @@ -0,0 +1,86 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! BSP Memory Management Unit.
 +
@@ -960,7 +960,7 @@ diff -uNr 09_privilege_level/src/bsp/raspberrypi/memory.rs 10_virtual_mem_part1_
 --- 09_privilege_level/src/bsp/raspberrypi/memory.rs
 +++ 10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs
 @@ -3,6 +3,45 @@
- // Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+ // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
  //! BSP Memory Management.
 +//!
@@ -1149,7 +1149,7 @@ diff -uNr 09_privilege_level/src/memory/mmu/translation_table.rs 10_virtual_mem_
 @@ -0,0 +1,14 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Translation table.
 +
@@ -1168,7 +1168,7 @@ diff -uNr 09_privilege_level/src/memory/mmu.rs 10_virtual_mem_part1_identity_map
 @@ -0,0 +1,264 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Memory Management Unit.
 +//!
@@ -1437,7 +1437,7 @@ diff -uNr 09_privilege_level/src/memory.rs 10_virtual_mem_part1_identity_mapping
 @@ -0,0 +1,7 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Memory Management.
 +
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu.rs
index d3b07461a..4414ac6ad 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 //!
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs
index f54ae739b..f677c9c4b 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.s b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.s
index fa1984d66..28b35087c 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.s
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.s
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //--------------------------------------------------------------------------------------------------
 // Definitions
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs
index 10fa86a93..c8eac4f02 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural synchronous and asynchronous exception handling.
 //!
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception/asynchronous.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception/asynchronous.rs
index c447d4557..e3e3672e4 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception/asynchronous.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural asynchronous exception handling.
 //!
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
index 2af44aac9..3a965f710 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit Driver.
 //!
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs
index dac6e32f8..057335c46 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural translation table.
 //!
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs
index 7a7647ef7..576248390 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
 //!
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp.rs b/10_virtual_mem_part1_identity_mapping/src/bsp.rs
index 91ce3c495..2e860ecbf 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver.rs
index 2fcbc83e7..6e9bf8f39 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm.rs
index 77613d261..b4b7906e5 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 8033381e9..dbb4beaa6 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index b290524ca..878ea567f 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 //!
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/common.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/common.rs
index 41553b7a5..fd9e988ea 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/common.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi.rs
index c0b639c97..22edb4fa6 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/console.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/console.rs
index c6bb5263c..a247032fc 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/console.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP console facilities.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/cpu.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/cpu.rs
index d09ff9568..85fb89e49 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/cpu.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/driver.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/driver.rs
index ab910185c..b5538baa3 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/driver.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
index 48aea0b54..2ce4b44b9 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT OR Apache-2.0
  *
- * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+ * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
  */
 
 PAGE_SIZE = 64K;
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs
index d2a2e94cd..7a57b6188 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 //!
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
index 8ce79a4e7..ea43f899a 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management Unit.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/console.rs b/10_virtual_mem_part1_identity_mapping/src/console.rs
index c3154ba23..e49e241fe 100644
--- a/10_virtual_mem_part1_identity_mapping/src/console.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/cpu.rs b/10_virtual_mem_part1_identity_mapping/src/cpu.rs
index 7a095cb12..62503fb40 100644
--- a/10_virtual_mem_part1_identity_mapping/src/cpu.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/cpu/boot.rs b/10_virtual_mem_part1_identity_mapping/src/cpu/boot.rs
index 1dc5c1808..8091dac36 100644
--- a/10_virtual_mem_part1_identity_mapping/src/cpu/boot.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/driver.rs b/10_virtual_mem_part1_identity_mapping/src/driver.rs
index 6e8c5533a..2fcc75629 100644
--- a/10_virtual_mem_part1_identity_mapping/src/driver.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/exception.rs b/10_virtual_mem_part1_identity_mapping/src/exception.rs
index 87d4db63a..b80248f7b 100644
--- a/10_virtual_mem_part1_identity_mapping/src/exception.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronous and asynchronous exception handling.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/exception/asynchronous.rs b/10_virtual_mem_part1_identity_mapping/src/exception/asynchronous.rs
index 566efe329..bad857790 100644
--- a/10_virtual_mem_part1_identity_mapping/src/exception/asynchronous.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Asynchronous exception handling.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/main.rs b/10_virtual_mem_part1_identity_mapping/src/main.rs
index 86d7f4733..5b5cb473b 100644
--- a/10_virtual_mem_part1_identity_mapping/src/main.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/10_virtual_mem_part1_identity_mapping/src/memory.rs b/10_virtual_mem_part1_identity_mapping/src/memory.rs
index 7959c555e..ac6663b36 100644
--- a/10_virtual_mem_part1_identity_mapping/src/memory.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/memory/mmu.rs b/10_virtual_mem_part1_identity_mapping/src/memory/mmu.rs
index 77cdcc061..17a98274a 100644
--- a/10_virtual_mem_part1_identity_mapping/src/memory/mmu.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit.
 //!
diff --git a/10_virtual_mem_part1_identity_mapping/src/memory/mmu/translation_table.rs b/10_virtual_mem_part1_identity_mapping/src/memory/mmu/translation_table.rs
index bbb6f9394..88e3fe48d 100644
--- a/10_virtual_mem_part1_identity_mapping/src/memory/mmu/translation_table.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/memory/mmu/translation_table.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Translation table.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/panic_wait.rs b/10_virtual_mem_part1_identity_mapping/src/panic_wait.rs
index 66fbe6b40..946041b32 100644
--- a/10_virtual_mem_part1_identity_mapping/src/panic_wait.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/print.rs b/10_virtual_mem_part1_identity_mapping/src/print.rs
index 89fa66943..5decb2926 100644
--- a/10_virtual_mem_part1_identity_mapping/src/print.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/synchronization.rs b/10_virtual_mem_part1_identity_mapping/src/synchronization.rs
index 7bb2938be..d5653a19f 100644
--- a/10_virtual_mem_part1_identity_mapping/src/synchronization.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/10_virtual_mem_part1_identity_mapping/src/time.rs b/10_virtual_mem_part1_identity_mapping/src/time.rs
index 953b6f0df..6d92b1966 100644
--- a/10_virtual_mem_part1_identity_mapping/src/time.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer primitives.
 
diff --git a/11_exceptions_part1_groundwork/Makefile b/11_exceptions_part1_groundwork/Makefile
index dd739e130..5b1c2339e 100644
--- a/11_exceptions_part1_groundwork/Makefile
+++ b/11_exceptions_part1_groundwork/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/color.mk
 include ../common/docker.mk
diff --git a/11_exceptions_part1_groundwork/README.md b/11_exceptions_part1_groundwork/README.md
index 8424b79c3..95aa27242 100644
--- a/11_exceptions_part1_groundwork/README.md
+++ b/11_exceptions_part1_groundwork/README.md
@@ -793,7 +793,7 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.s 11
 @@ -0,0 +1,150 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//--------------------------------------------------------------------------------------------------
 +// Definitions
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs
index d3b07461a..4414ac6ad 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 //!
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs
index f54ae739b..f677c9c4b 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.s b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.s
index fa1984d66..28b35087c 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.s
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.s
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //--------------------------------------------------------------------------------------------------
 // Definitions
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
index 1454145ea..f81782103 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural synchronous and asynchronous exception handling.
 //!
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.s b/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.s
index cb6bfb150..5aae30b9c 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.s
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.s
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //--------------------------------------------------------------------------------------------------
 // Definitions
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/exception/asynchronous.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/exception/asynchronous.rs
index c447d4557..e3e3672e4 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/exception/asynchronous.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural asynchronous exception handling.
 //!
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
index 2af44aac9..3a965f710 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit Driver.
 //!
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs
index dac6e32f8..057335c46 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural translation table.
 //!
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/time.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/time.rs
index 7a7647ef7..576248390 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/time.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
 //!
diff --git a/11_exceptions_part1_groundwork/src/bsp.rs b/11_exceptions_part1_groundwork/src/bsp.rs
index c558922f7..824787f65 100644
--- a/11_exceptions_part1_groundwork/src/bsp.rs
+++ b/11_exceptions_part1_groundwork/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/11_exceptions_part1_groundwork/src/bsp/device_driver.rs b/11_exceptions_part1_groundwork/src/bsp/device_driver.rs
index 2fcbc83e7..6e9bf8f39 100644
--- a/11_exceptions_part1_groundwork/src/bsp/device_driver.rs
+++ b/11_exceptions_part1_groundwork/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm.rs b/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm.rs
index 77613d261..b4b7906e5 100644
--- a/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm.rs
+++ b/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 8033381e9..dbb4beaa6 100644
--- a/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index b290524ca..878ea567f 100644
--- a/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 //!
diff --git a/11_exceptions_part1_groundwork/src/bsp/device_driver/common.rs b/11_exceptions_part1_groundwork/src/bsp/device_driver/common.rs
index 41553b7a5..fd9e988ea 100644
--- a/11_exceptions_part1_groundwork/src/bsp/device_driver/common.rs
+++ b/11_exceptions_part1_groundwork/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/11_exceptions_part1_groundwork/src/bsp/raspberrypi.rs b/11_exceptions_part1_groundwork/src/bsp/raspberrypi.rs
index c0b639c97..22edb4fa6 100644
--- a/11_exceptions_part1_groundwork/src/bsp/raspberrypi.rs
+++ b/11_exceptions_part1_groundwork/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/console.rs b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/console.rs
index c6bb5263c..a247032fc 100644
--- a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/console.rs
+++ b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP console facilities.
 
diff --git a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/cpu.rs b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/cpu.rs
index d09ff9568..85fb89e49 100644
--- a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/cpu.rs
+++ b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/driver.rs b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/driver.rs
index ab910185c..b5538baa3 100644
--- a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/driver.rs
+++ b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/link.ld b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/link.ld
index 48aea0b54..2ce4b44b9 100644
--- a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/link.ld
+++ b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/link.ld
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT OR Apache-2.0
  *
- * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+ * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
  */
 
 PAGE_SIZE = 64K;
diff --git a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory.rs b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory.rs
index d2a2e94cd..7a57b6188 100644
--- a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory.rs
+++ b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 //!
diff --git a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
index 5f4265e64..2b3a609ba 100644
--- a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
+++ b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management Unit.
 
diff --git a/11_exceptions_part1_groundwork/src/console.rs b/11_exceptions_part1_groundwork/src/console.rs
index c3154ba23..e49e241fe 100644
--- a/11_exceptions_part1_groundwork/src/console.rs
+++ b/11_exceptions_part1_groundwork/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/11_exceptions_part1_groundwork/src/cpu.rs b/11_exceptions_part1_groundwork/src/cpu.rs
index 7a095cb12..62503fb40 100644
--- a/11_exceptions_part1_groundwork/src/cpu.rs
+++ b/11_exceptions_part1_groundwork/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/11_exceptions_part1_groundwork/src/cpu/boot.rs b/11_exceptions_part1_groundwork/src/cpu/boot.rs
index 1dc5c1808..8091dac36 100644
--- a/11_exceptions_part1_groundwork/src/cpu/boot.rs
+++ b/11_exceptions_part1_groundwork/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/11_exceptions_part1_groundwork/src/driver.rs b/11_exceptions_part1_groundwork/src/driver.rs
index 6e8c5533a..2fcc75629 100644
--- a/11_exceptions_part1_groundwork/src/driver.rs
+++ b/11_exceptions_part1_groundwork/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/11_exceptions_part1_groundwork/src/exception.rs b/11_exceptions_part1_groundwork/src/exception.rs
index 8e91d8bb9..696787c1e 100644
--- a/11_exceptions_part1_groundwork/src/exception.rs
+++ b/11_exceptions_part1_groundwork/src/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronous and asynchronous exception handling.
 
diff --git a/11_exceptions_part1_groundwork/src/exception/asynchronous.rs b/11_exceptions_part1_groundwork/src/exception/asynchronous.rs
index 566efe329..bad857790 100644
--- a/11_exceptions_part1_groundwork/src/exception/asynchronous.rs
+++ b/11_exceptions_part1_groundwork/src/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Asynchronous exception handling.
 
diff --git a/11_exceptions_part1_groundwork/src/main.rs b/11_exceptions_part1_groundwork/src/main.rs
index 12deeb2cd..22912318e 100644
--- a/11_exceptions_part1_groundwork/src/main.rs
+++ b/11_exceptions_part1_groundwork/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/11_exceptions_part1_groundwork/src/memory.rs b/11_exceptions_part1_groundwork/src/memory.rs
index 7959c555e..ac6663b36 100644
--- a/11_exceptions_part1_groundwork/src/memory.rs
+++ b/11_exceptions_part1_groundwork/src/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management.
 
diff --git a/11_exceptions_part1_groundwork/src/memory/mmu.rs b/11_exceptions_part1_groundwork/src/memory/mmu.rs
index 77cdcc061..17a98274a 100644
--- a/11_exceptions_part1_groundwork/src/memory/mmu.rs
+++ b/11_exceptions_part1_groundwork/src/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit.
 //!
diff --git a/11_exceptions_part1_groundwork/src/memory/mmu/translation_table.rs b/11_exceptions_part1_groundwork/src/memory/mmu/translation_table.rs
index bbb6f9394..88e3fe48d 100644
--- a/11_exceptions_part1_groundwork/src/memory/mmu/translation_table.rs
+++ b/11_exceptions_part1_groundwork/src/memory/mmu/translation_table.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Translation table.
 
diff --git a/11_exceptions_part1_groundwork/src/panic_wait.rs b/11_exceptions_part1_groundwork/src/panic_wait.rs
index 66fbe6b40..946041b32 100644
--- a/11_exceptions_part1_groundwork/src/panic_wait.rs
+++ b/11_exceptions_part1_groundwork/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/11_exceptions_part1_groundwork/src/print.rs b/11_exceptions_part1_groundwork/src/print.rs
index 89fa66943..5decb2926 100644
--- a/11_exceptions_part1_groundwork/src/print.rs
+++ b/11_exceptions_part1_groundwork/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing.
 
diff --git a/11_exceptions_part1_groundwork/src/synchronization.rs b/11_exceptions_part1_groundwork/src/synchronization.rs
index 7bb2938be..d5653a19f 100644
--- a/11_exceptions_part1_groundwork/src/synchronization.rs
+++ b/11_exceptions_part1_groundwork/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/11_exceptions_part1_groundwork/src/time.rs b/11_exceptions_part1_groundwork/src/time.rs
index 953b6f0df..6d92b1966 100644
--- a/11_exceptions_part1_groundwork/src/time.rs
+++ b/11_exceptions_part1_groundwork/src/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer primitives.
 
diff --git a/12_integrated_testing/Makefile b/12_integrated_testing/Makefile
index 492d30692..872de5a5d 100644
--- a/12_integrated_testing/Makefile
+++ b/12_integrated_testing/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/color.mk
 include ../common/docker.mk
diff --git a/12_integrated_testing/README.md b/12_integrated_testing/README.md
index ac37d5412..b34b72087 100644
--- a/12_integrated_testing/README.md
+++ b/12_integrated_testing/README.md
@@ -1277,7 +1277,7 @@ diff -uNr 11_exceptions_part1_groundwork/src/lib.rs 12_integrated_testing/src/li
 @@ -0,0 +1,184 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +// Rust embedded logo for `make doc`.
 +#![doc(html_logo_url = "https://git.io/JeGIp")]
@@ -1730,7 +1730,7 @@ diff -uNr 11_exceptions_part1_groundwork/test-macros/src/lib.rs 12_integrated_te
 @@ -0,0 +1,29 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +use proc_macro::TokenStream;
 +use proc_macro2::Span;
@@ -1766,7 +1766,7 @@ diff -uNr 11_exceptions_part1_groundwork/tests/00_console_sanity.rb 12_integrate
 +
 +# SPDX-License-Identifier: MIT OR Apache-2.0
 +#
-+# Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
++# Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +require 'expect'
 +
@@ -1826,7 +1826,7 @@ diff -uNr 11_exceptions_part1_groundwork/tests/00_console_sanity.rs 12_integrate
 @@ -0,0 +1,35 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Console sanity tests - RX, TX and statistics.
 +
@@ -1866,7 +1866,7 @@ diff -uNr 11_exceptions_part1_groundwork/tests/01_timer_sanity.rs 12_integrated_
 @@ -0,0 +1,49 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Timer sanity tests.
 +
@@ -1920,7 +1920,7 @@ diff -uNr 11_exceptions_part1_groundwork/tests/02_exception_sync_page_fault.rs 1
 @@ -0,0 +1,43 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Page faults must result in synchronous exceptions.
 +
@@ -1977,7 +1977,7 @@ diff -uNr 11_exceptions_part1_groundwork/tests/panic_exit_success/mod.rs 12_inte
 @@ -0,0 +1,9 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +/// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
 +#[no_mangle]
@@ -2001,7 +2001,7 @@ diff -uNr 11_exceptions_part1_groundwork/test-types/src/lib.rs 12_integrated_tes
 @@ -0,0 +1,16 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Types for the `custom_test_frameworks` implementation.
 +
diff --git a/12_integrated_testing/src/_arch/aarch64/cpu.rs b/12_integrated_testing/src/_arch/aarch64/cpu.rs
index 56443865a..66da661c7 100644
--- a/12_integrated_testing/src/_arch/aarch64/cpu.rs
+++ b/12_integrated_testing/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 //!
diff --git a/12_integrated_testing/src/_arch/aarch64/cpu/boot.rs b/12_integrated_testing/src/_arch/aarch64/cpu/boot.rs
index f54ae739b..f677c9c4b 100644
--- a/12_integrated_testing/src/_arch/aarch64/cpu/boot.rs
+++ b/12_integrated_testing/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/12_integrated_testing/src/_arch/aarch64/cpu/boot.s b/12_integrated_testing/src/_arch/aarch64/cpu/boot.s
index fa1984d66..28b35087c 100644
--- a/12_integrated_testing/src/_arch/aarch64/cpu/boot.s
+++ b/12_integrated_testing/src/_arch/aarch64/cpu/boot.s
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //--------------------------------------------------------------------------------------------------
 // Definitions
diff --git a/12_integrated_testing/src/_arch/aarch64/exception.rs b/12_integrated_testing/src/_arch/aarch64/exception.rs
index 05b729e2b..eb73a2cc2 100644
--- a/12_integrated_testing/src/_arch/aarch64/exception.rs
+++ b/12_integrated_testing/src/_arch/aarch64/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural synchronous and asynchronous exception handling.
 //!
diff --git a/12_integrated_testing/src/_arch/aarch64/exception.s b/12_integrated_testing/src/_arch/aarch64/exception.s
index cb6bfb150..5aae30b9c 100644
--- a/12_integrated_testing/src/_arch/aarch64/exception.s
+++ b/12_integrated_testing/src/_arch/aarch64/exception.s
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //--------------------------------------------------------------------------------------------------
 // Definitions
diff --git a/12_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs b/12_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs
index c447d4557..e3e3672e4 100644
--- a/12_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs
+++ b/12_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural asynchronous exception handling.
 //!
diff --git a/12_integrated_testing/src/_arch/aarch64/memory/mmu.rs b/12_integrated_testing/src/_arch/aarch64/memory/mmu.rs
index f23267009..15a7faeb2 100644
--- a/12_integrated_testing/src/_arch/aarch64/memory/mmu.rs
+++ b/12_integrated_testing/src/_arch/aarch64/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit Driver.
 //!
diff --git a/12_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs b/12_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs
index 1e1173f2d..78776126b 100644
--- a/12_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/12_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural translation table.
 //!
diff --git a/12_integrated_testing/src/_arch/aarch64/time.rs b/12_integrated_testing/src/_arch/aarch64/time.rs
index 7a7647ef7..576248390 100644
--- a/12_integrated_testing/src/_arch/aarch64/time.rs
+++ b/12_integrated_testing/src/_arch/aarch64/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
 //!
diff --git a/12_integrated_testing/src/bsp.rs b/12_integrated_testing/src/bsp.rs
index c558922f7..824787f65 100644
--- a/12_integrated_testing/src/bsp.rs
+++ b/12_integrated_testing/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/12_integrated_testing/src/bsp/device_driver.rs b/12_integrated_testing/src/bsp/device_driver.rs
index 2fcbc83e7..6e9bf8f39 100644
--- a/12_integrated_testing/src/bsp/device_driver.rs
+++ b/12_integrated_testing/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/12_integrated_testing/src/bsp/device_driver/bcm.rs b/12_integrated_testing/src/bsp/device_driver/bcm.rs
index 77613d261..b4b7906e5 100644
--- a/12_integrated_testing/src/bsp/device_driver/bcm.rs
+++ b/12_integrated_testing/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 8033381e9..dbb4beaa6 100644
--- a/12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index b290524ca..878ea567f 100644
--- a/12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 //!
diff --git a/12_integrated_testing/src/bsp/device_driver/common.rs b/12_integrated_testing/src/bsp/device_driver/common.rs
index 41553b7a5..fd9e988ea 100644
--- a/12_integrated_testing/src/bsp/device_driver/common.rs
+++ b/12_integrated_testing/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/12_integrated_testing/src/bsp/raspberrypi.rs b/12_integrated_testing/src/bsp/raspberrypi.rs
index c0b639c97..22edb4fa6 100644
--- a/12_integrated_testing/src/bsp/raspberrypi.rs
+++ b/12_integrated_testing/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/12_integrated_testing/src/bsp/raspberrypi/console.rs b/12_integrated_testing/src/bsp/raspberrypi/console.rs
index 75c0540bd..eaef0b1fb 100644
--- a/12_integrated_testing/src/bsp/raspberrypi/console.rs
+++ b/12_integrated_testing/src/bsp/raspberrypi/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP console facilities.
 
diff --git a/12_integrated_testing/src/bsp/raspberrypi/cpu.rs b/12_integrated_testing/src/bsp/raspberrypi/cpu.rs
index d09ff9568..85fb89e49 100644
--- a/12_integrated_testing/src/bsp/raspberrypi/cpu.rs
+++ b/12_integrated_testing/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/12_integrated_testing/src/bsp/raspberrypi/driver.rs b/12_integrated_testing/src/bsp/raspberrypi/driver.rs
index ab910185c..b5538baa3 100644
--- a/12_integrated_testing/src/bsp/raspberrypi/driver.rs
+++ b/12_integrated_testing/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/12_integrated_testing/src/bsp/raspberrypi/link.ld b/12_integrated_testing/src/bsp/raspberrypi/link.ld
index 48aea0b54..2ce4b44b9 100644
--- a/12_integrated_testing/src/bsp/raspberrypi/link.ld
+++ b/12_integrated_testing/src/bsp/raspberrypi/link.ld
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT OR Apache-2.0
  *
- * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+ * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
  */
 
 PAGE_SIZE = 64K;
diff --git a/12_integrated_testing/src/bsp/raspberrypi/memory.rs b/12_integrated_testing/src/bsp/raspberrypi/memory.rs
index d2a2e94cd..7a57b6188 100644
--- a/12_integrated_testing/src/bsp/raspberrypi/memory.rs
+++ b/12_integrated_testing/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 //!
diff --git a/12_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs b/12_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs
index 188921b38..f8cdc82f9 100644
--- a/12_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs
+++ b/12_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management Unit.
 
diff --git a/12_integrated_testing/src/console.rs b/12_integrated_testing/src/console.rs
index c3154ba23..e49e241fe 100644
--- a/12_integrated_testing/src/console.rs
+++ b/12_integrated_testing/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/12_integrated_testing/src/cpu.rs b/12_integrated_testing/src/cpu.rs
index 61c411fcd..6d3e9f085 100644
--- a/12_integrated_testing/src/cpu.rs
+++ b/12_integrated_testing/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/12_integrated_testing/src/cpu/boot.rs b/12_integrated_testing/src/cpu/boot.rs
index 1dc5c1808..8091dac36 100644
--- a/12_integrated_testing/src/cpu/boot.rs
+++ b/12_integrated_testing/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/12_integrated_testing/src/driver.rs b/12_integrated_testing/src/driver.rs
index 6e8c5533a..2fcc75629 100644
--- a/12_integrated_testing/src/driver.rs
+++ b/12_integrated_testing/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/12_integrated_testing/src/exception.rs b/12_integrated_testing/src/exception.rs
index 3c5e7bc83..f4af81444 100644
--- a/12_integrated_testing/src/exception.rs
+++ b/12_integrated_testing/src/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronous and asynchronous exception handling.
 
diff --git a/12_integrated_testing/src/exception/asynchronous.rs b/12_integrated_testing/src/exception/asynchronous.rs
index 566efe329..bad857790 100644
--- a/12_integrated_testing/src/exception/asynchronous.rs
+++ b/12_integrated_testing/src/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Asynchronous exception handling.
 
diff --git a/12_integrated_testing/src/lib.rs b/12_integrated_testing/src/lib.rs
index 39eea925b..036e8e5d0 100644
--- a/12_integrated_testing/src/lib.rs
+++ b/12_integrated_testing/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/12_integrated_testing/src/main.rs b/12_integrated_testing/src/main.rs
index 1daeb4038..2c1bf9ac0 100644
--- a/12_integrated_testing/src/main.rs
+++ b/12_integrated_testing/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/12_integrated_testing/src/memory.rs b/12_integrated_testing/src/memory.rs
index 7959c555e..ac6663b36 100644
--- a/12_integrated_testing/src/memory.rs
+++ b/12_integrated_testing/src/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management.
 
diff --git a/12_integrated_testing/src/memory/mmu.rs b/12_integrated_testing/src/memory/mmu.rs
index ec4ca0748..a68973e7e 100644
--- a/12_integrated_testing/src/memory/mmu.rs
+++ b/12_integrated_testing/src/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit.
 //!
diff --git a/12_integrated_testing/src/memory/mmu/translation_table.rs b/12_integrated_testing/src/memory/mmu/translation_table.rs
index bbb6f9394..88e3fe48d 100644
--- a/12_integrated_testing/src/memory/mmu/translation_table.rs
+++ b/12_integrated_testing/src/memory/mmu/translation_table.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Translation table.
 
diff --git a/12_integrated_testing/src/panic_wait.rs b/12_integrated_testing/src/panic_wait.rs
index d272a1975..a20e37e19 100644
--- a/12_integrated_testing/src/panic_wait.rs
+++ b/12_integrated_testing/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/12_integrated_testing/src/print.rs b/12_integrated_testing/src/print.rs
index 89fa66943..5decb2926 100644
--- a/12_integrated_testing/src/print.rs
+++ b/12_integrated_testing/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing.
 
diff --git a/12_integrated_testing/src/synchronization.rs b/12_integrated_testing/src/synchronization.rs
index 7bb2938be..d5653a19f 100644
--- a/12_integrated_testing/src/synchronization.rs
+++ b/12_integrated_testing/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/12_integrated_testing/src/time.rs b/12_integrated_testing/src/time.rs
index 953b6f0df..6d92b1966 100644
--- a/12_integrated_testing/src/time.rs
+++ b/12_integrated_testing/src/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer primitives.
 
diff --git a/12_integrated_testing/test-macros/src/lib.rs b/12_integrated_testing/test-macros/src/lib.rs
index 36c95e8a6..83025a091 100644
--- a/12_integrated_testing/test-macros/src/lib.rs
+++ b/12_integrated_testing/test-macros/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 use proc_macro::TokenStream;
 use proc_macro2::Span;
diff --git a/12_integrated_testing/test-types/src/lib.rs b/12_integrated_testing/test-types/src/lib.rs
index fe7d918f5..922c2a1c3 100644
--- a/12_integrated_testing/test-types/src/lib.rs
+++ b/12_integrated_testing/test-types/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Types for the `custom_test_frameworks` implementation.
 
diff --git a/12_integrated_testing/tests/00_console_sanity.rb b/12_integrated_testing/tests/00_console_sanity.rb
index 16fb6c790..249de2245 100644
--- a/12_integrated_testing/tests/00_console_sanity.rb
+++ b/12_integrated_testing/tests/00_console_sanity.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 require 'expect'
 
diff --git a/12_integrated_testing/tests/00_console_sanity.rs b/12_integrated_testing/tests/00_console_sanity.rs
index 03058f5ef..6aa3de18a 100644
--- a/12_integrated_testing/tests/00_console_sanity.rs
+++ b/12_integrated_testing/tests/00_console_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Console sanity tests - RX, TX and statistics.
 
diff --git a/12_integrated_testing/tests/01_timer_sanity.rs b/12_integrated_testing/tests/01_timer_sanity.rs
index f39d83845..59ef4a7f7 100644
--- a/12_integrated_testing/tests/01_timer_sanity.rs
+++ b/12_integrated_testing/tests/01_timer_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer sanity tests.
 
diff --git a/12_integrated_testing/tests/02_exception_sync_page_fault.rs b/12_integrated_testing/tests/02_exception_sync_page_fault.rs
index bc05dd714..1c4133e18 100644
--- a/12_integrated_testing/tests/02_exception_sync_page_fault.rs
+++ b/12_integrated_testing/tests/02_exception_sync_page_fault.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Page faults must result in synchronous exceptions.
 
diff --git a/12_integrated_testing/tests/panic_exit_success/mod.rs b/12_integrated_testing/tests/panic_exit_success/mod.rs
index 29d1f9750..908fac51c 100644
--- a/12_integrated_testing/tests/panic_exit_success/mod.rs
+++ b/12_integrated_testing/tests/panic_exit_success/mod.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 /// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
 #[no_mangle]
diff --git a/13_exceptions_part2_peripheral_IRQs/Makefile b/13_exceptions_part2_peripheral_IRQs/Makefile
index 777031a17..72ae3c36a 100644
--- a/13_exceptions_part2_peripheral_IRQs/Makefile
+++ b/13_exceptions_part2_peripheral_IRQs/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/color.mk
 include ../common/docker.mk
diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index 18de9ac6e..df20c15be 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -777,7 +777,7 @@ diff -uNr 12_integrated_testing/src/_arch/aarch64/cpu/smp.rs 13_exceptions_part2
 @@ -0,0 +1,30 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Architectural symmetric multiprocessing.
 +//!
@@ -934,7 +934,7 @@ diff -uNr 12_integrated_testing/src/bsp/device_driver/arm/gicv2/gicc.rs 13_excep
 @@ -0,0 +1,141 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! GICC Driver - GIC CPU interface.
 +
@@ -1080,7 +1080,7 @@ diff -uNr 12_integrated_testing/src/bsp/device_driver/arm/gicv2/gicd.rs 13_excep
 @@ -0,0 +1,199 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! GICD Driver - GIC Distributor.
 +//!
@@ -1284,7 +1284,7 @@ diff -uNr 12_integrated_testing/src/bsp/device_driver/arm/gicv2.rs 13_exceptions
 @@ -0,0 +1,219 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! GICv2 Driver - ARM Generic Interrupt Controller v2.
 +//!
@@ -1508,7 +1508,7 @@ diff -uNr 12_integrated_testing/src/bsp/device_driver/arm.rs 13_exceptions_part2
 @@ -0,0 +1,9 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! ARM driver top level.
 +
@@ -1553,7 +1553,7 @@ diff -uNr 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_interrupt_cont
 @@ -0,0 +1,167 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Peripheral Interrupt Controller Driver.
 +
@@ -1725,7 +1725,7 @@ diff -uNr 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_interrupt_cont
 @@ -0,0 +1,131 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Interrupt Controller Driver.
 +
@@ -2089,7 +2089,7 @@ diff -uNr 12_integrated_testing/src/bsp/raspberrypi/exception/asynchronous.rs 13
 @@ -0,0 +1,36 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! BSP asynchronous exception handling.
 +
@@ -2130,7 +2130,7 @@ diff -uNr 12_integrated_testing/src/bsp/raspberrypi/exception.rs 13_exceptions_p
 @@ -0,0 +1,7 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! BSP synchronous and asynchronous exception handling.
 +
@@ -2212,7 +2212,7 @@ diff -uNr 12_integrated_testing/src/cpu/smp.rs 13_exceptions_part2_peripheral_IR
 @@ -0,0 +1,14 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Symmetric multiprocessing.
 +
@@ -2527,7 +2527,7 @@ diff -uNr 12_integrated_testing/src/state.rs 13_exceptions_part2_peripheral_IRQs
 @@ -0,0 +1,92 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! State information about the kernel itself.
 +
@@ -2759,7 +2759,7 @@ diff -uNr 12_integrated_testing/tests/03_exception_irq_sanity.rs 13_exceptions_p
 @@ -0,0 +1,66 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! IRQ handling sanity tests.
 +
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu.rs b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu.rs
index 56443865a..66da661c7 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 //!
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.rs b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.rs
index f54ae739b..f677c9c4b 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.s b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.s
index fa1984d66..28b35087c 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.s
+++ b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.s
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //--------------------------------------------------------------------------------------------------
 // Definitions
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs
index 0ea9b8764..351fde62e 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
 //!
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
index 708f63ddb..1e9c3f99b 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural synchronous and asynchronous exception handling.
 //!
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.s b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.s
index cb6bfb150..5aae30b9c 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.s
+++ b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.s
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //--------------------------------------------------------------------------------------------------
 // Definitions
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs
index 799ab4e82..73b82e65d 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural asynchronous exception handling.
 //!
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
index f23267009..15a7faeb2 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit Driver.
 //!
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs
index 1e1173f2d..78776126b 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural translation table.
 //!
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/time.rs b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/time.rs
index 7a7647ef7..576248390 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/time.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
 //!
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp.rs
index c558922f7..824787f65 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/bsp.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver.rs
index eac6bdd16..eafaf7754 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm.rs
index 0bb1bd4b6..e83e24c92 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! ARM driver top level.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs
index 33713459c..09a0cdf40 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICv2 Driver - ARM Generic Interrupt Controller v2.
 //!
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs
index 5f1d6d53b..2d2eebc6d 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICC Driver - GIC CPU interface.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicd.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicd.rs
index 38fa0ed6c..bc7f7f236 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicd.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICD Driver - GIC Distributor.
 //!
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm.rs
index 01bcaa895..5a7cc23be 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index a2f7eb93d..c0dc838a7 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
index dbe9988e8..577470d4a 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Interrupt Controller Driver.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index 4ca5988c4..3107d296f 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Peripheral Interrupt Controller Driver.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index ba8af7982..af573fd09 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 //!
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/common.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/common.rs
index 41553b7a5..fd9e988ea 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/common.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi.rs
index a2e2fa9a6..97656a27e 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/console.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/console.rs
index 75c0540bd..eaef0b1fb 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/console.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP console facilities.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/cpu.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/cpu.rs
index d09ff9568..85fb89e49 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/cpu.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/driver.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/driver.rs
index 58949a815..1cf6d23ce 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/driver.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception.rs
index 94d0728ff..aa6c5a63f 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP synchronous and asynchronous exception handling.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception/asynchronous.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception/asynchronous.rs
index a253daa94..dc5ab4215 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception/asynchronous.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP asynchronous exception handling.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld
index 48aea0b54..2ce4b44b9 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld
+++ b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT OR Apache-2.0
  *
- * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+ * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
  */
 
 PAGE_SIZE = 64K;
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
index 69dffa768..51b334c0e 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 //!
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
index 188921b38..f8cdc82f9 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management Unit.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/src/console.rs b/13_exceptions_part2_peripheral_IRQs/src/console.rs
index c3154ba23..e49e241fe 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/console.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/src/cpu.rs b/13_exceptions_part2_peripheral_IRQs/src/cpu.rs
index 36b6a9d4c..e1493d1dd 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/cpu.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/src/cpu/boot.rs b/13_exceptions_part2_peripheral_IRQs/src/cpu/boot.rs
index 1dc5c1808..8091dac36 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/cpu/boot.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/src/cpu/smp.rs b/13_exceptions_part2_peripheral_IRQs/src/cpu/smp.rs
index 38230ce1e..57386f79b 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/cpu/smp.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Symmetric multiprocessing.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/src/driver.rs b/13_exceptions_part2_peripheral_IRQs/src/driver.rs
index 380eace51..8c5c5e167 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/driver.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/src/exception.rs b/13_exceptions_part2_peripheral_IRQs/src/exception.rs
index 3c5e7bc83..f4af81444 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/exception.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronous and asynchronous exception handling.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/src/exception/asynchronous.rs b/13_exceptions_part2_peripheral_IRQs/src/exception/asynchronous.rs
index e9aace357..0e2835b28 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/exception/asynchronous.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Asynchronous exception handling.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/src/lib.rs b/13_exceptions_part2_peripheral_IRQs/src/lib.rs
index 5b1eb3e1a..235aca13f 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/lib.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/13_exceptions_part2_peripheral_IRQs/src/main.rs b/13_exceptions_part2_peripheral_IRQs/src/main.rs
index 1dde38845..6729d45c9 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/main.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/13_exceptions_part2_peripheral_IRQs/src/memory.rs b/13_exceptions_part2_peripheral_IRQs/src/memory.rs
index 7959c555e..ac6663b36 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/memory.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs b/13_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs
index ec4ca0748..a68973e7e 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit.
 //!
diff --git a/13_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.rs b/13_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.rs
index bbb6f9394..88e3fe48d 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Translation table.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/src/panic_wait.rs b/13_exceptions_part2_peripheral_IRQs/src/panic_wait.rs
index 130e952b8..0f958f288 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/panic_wait.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/src/print.rs b/13_exceptions_part2_peripheral_IRQs/src/print.rs
index 89fa66943..5decb2926 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/print.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/src/state.rs b/13_exceptions_part2_peripheral_IRQs/src/state.rs
index c94d04c84..0af3688c2 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/state.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/state.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! State information about the kernel itself.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/src/synchronization.rs b/13_exceptions_part2_peripheral_IRQs/src/synchronization.rs
index 94582732c..4b4c4c3fb 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/synchronization.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/13_exceptions_part2_peripheral_IRQs/src/time.rs b/13_exceptions_part2_peripheral_IRQs/src/time.rs
index 953b6f0df..6d92b1966 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/time.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer primitives.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/test-macros/src/lib.rs b/13_exceptions_part2_peripheral_IRQs/test-macros/src/lib.rs
index 36c95e8a6..83025a091 100644
--- a/13_exceptions_part2_peripheral_IRQs/test-macros/src/lib.rs
+++ b/13_exceptions_part2_peripheral_IRQs/test-macros/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 use proc_macro::TokenStream;
 use proc_macro2::Span;
diff --git a/13_exceptions_part2_peripheral_IRQs/test-types/src/lib.rs b/13_exceptions_part2_peripheral_IRQs/test-types/src/lib.rs
index fe7d918f5..922c2a1c3 100644
--- a/13_exceptions_part2_peripheral_IRQs/test-types/src/lib.rs
+++ b/13_exceptions_part2_peripheral_IRQs/test-types/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Types for the `custom_test_frameworks` implementation.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rb b/13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rb
index 16fb6c790..249de2245 100644
--- a/13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rb
+++ b/13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 require 'expect'
 
diff --git a/13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs b/13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs
index 03058f5ef..6aa3de18a 100644
--- a/13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs
+++ b/13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Console sanity tests - RX, TX and statistics.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/tests/01_timer_sanity.rs b/13_exceptions_part2_peripheral_IRQs/tests/01_timer_sanity.rs
index f39d83845..59ef4a7f7 100644
--- a/13_exceptions_part2_peripheral_IRQs/tests/01_timer_sanity.rs
+++ b/13_exceptions_part2_peripheral_IRQs/tests/01_timer_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer sanity tests.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs b/13_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs
index bc05dd714..1c4133e18 100644
--- a/13_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs
+++ b/13_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Page faults must result in synchronous exceptions.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/tests/03_exception_irq_sanity.rs b/13_exceptions_part2_peripheral_IRQs/tests/03_exception_irq_sanity.rs
index ac25d01a8..e1e025548 100644
--- a/13_exceptions_part2_peripheral_IRQs/tests/03_exception_irq_sanity.rs
+++ b/13_exceptions_part2_peripheral_IRQs/tests/03_exception_irq_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! IRQ handling sanity tests.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/tests/panic_exit_success/mod.rs b/13_exceptions_part2_peripheral_IRQs/tests/panic_exit_success/mod.rs
index 29d1f9750..908fac51c 100644
--- a/13_exceptions_part2_peripheral_IRQs/tests/panic_exit_success/mod.rs
+++ b/13_exceptions_part2_peripheral_IRQs/tests/panic_exit_success/mod.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 /// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
 #[no_mangle]
diff --git a/14_virtual_mem_part2_mmio_remap/Makefile b/14_virtual_mem_part2_mmio_remap/Makefile
index 777031a17..72ae3c36a 100644
--- a/14_virtual_mem_part2_mmio_remap/Makefile
+++ b/14_virtual_mem_part2_mmio_remap/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/color.mk
 include ../common/docker.mk
diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index a068bc7a8..82fa51a2a 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -2060,7 +2060,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/common.rs 14_virtual_mem_part2
 @@ -0,0 +1,29 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! General purpose code.
 +
@@ -2232,7 +2232,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/alloc.rs 14_virtual
 @@ -0,0 +1,70 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Allocation.
 +
@@ -2307,7 +2307,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/mapping_record.rs 1
 @@ -0,0 +1,233 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! A record of mapped pages.
 +
@@ -2642,7 +2642,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 14_virtual
 @@ -0,0 +1,373 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Memory Management Unit types.
 +
@@ -3018,7 +3018,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 14_virtual_mem_p
 --- 13_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs
 +++ 14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
 @@ -3,29 +3,24 @@
- // Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+ // Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
  //! Memory Management Unit.
 -//!
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu.rs b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu.rs
index 56443865a..66da661c7 100644
--- a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 //!
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs
index f54ae739b..f677c9c4b 100644
--- a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.s b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.s
index fa1984d66..28b35087c 100644
--- a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.s
+++ b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.s
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //--------------------------------------------------------------------------------------------------
 // Definitions
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/smp.rs b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/smp.rs
index 0ea9b8764..351fde62e 100644
--- a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/smp.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
 //!
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
index 708f63ddb..1e9c3f99b 100644
--- a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural synchronous and asynchronous exception handling.
 //!
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.s b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.s
index cb6bfb150..5aae30b9c 100644
--- a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.s
+++ b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.s
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //--------------------------------------------------------------------------------------------------
 // Definitions
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception/asynchronous.rs b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception/asynchronous.rs
index 799ab4e82..73b82e65d 100644
--- a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception/asynchronous.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural asynchronous exception handling.
 //!
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
index ac0ef3e19..e2db2d236 100644
--- a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit Driver.
 //!
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
index 2eac24d65..cc31b3023 100644
--- a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural translation table.
 //!
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/time.rs b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/time.rs
index 7a7647ef7..576248390 100644
--- a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/time.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
 //!
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp.rs b/14_virtual_mem_part2_mmio_remap/src/bsp.rs
index c558922f7..824787f65 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver.rs
index eac6bdd16..eafaf7754 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm.rs
index 0bb1bd4b6..e83e24c92 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! ARM driver top level.
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs
index bbafa5fe8..4c68a6929 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICv2 Driver - ARM Generic Interrupt Controller v2.
 //!
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicc.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicc.rs
index abfadb0c0..1a151d246 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicc.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicc.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICC Driver - GIC CPU interface.
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicd.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicd.rs
index ae7861c98..60bbc4689 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicd.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICD Driver - GIC Distributor.
 //!
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm.rs
index 01bcaa895..5a7cc23be 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index bc96a1290..eea07b755 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
index 0bd84e3cf..99961facb 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Interrupt Controller Driver.
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index a197adfcf..f09da862f 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Peripheral Interrupt Controller Driver.
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 9d58d9ea2..23c09a7f2 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 //!
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/common.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/common.rs
index 41553b7a5..fd9e988ea 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/common.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi.rs
index 10d482781..fb9edf88d 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs
index 7ba9546e6..c75bf9be4 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP console facilities.
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/cpu.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/cpu.rs
index d09ff9568..85fb89e49 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/cpu.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/driver.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/driver.rs
index 4d5007e4e..531687524 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/driver.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/exception.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/exception.rs
index 94d0728ff..aa6c5a63f 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/exception.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP synchronous and asynchronous exception handling.
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/exception/asynchronous.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/exception/asynchronous.rs
index a253daa94..dc5ab4215 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/exception/asynchronous.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP asynchronous exception handling.
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
index f5bf6b6b9..c4a0b6a46 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT OR Apache-2.0
  *
- * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+ * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
  */
 
 PAGE_SIZE = 64K;
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
index a6da7d556..660409bbd 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 //!
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
index 96ee537c3..8d395a58b 100644
--- a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management Unit.
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/common.rs b/14_virtual_mem_part2_mmio_remap/src/common.rs
index a91ab7a37..678f4a6c6 100644
--- a/14_virtual_mem_part2_mmio_remap/src/common.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! General purpose code.
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/console.rs b/14_virtual_mem_part2_mmio_remap/src/console.rs
index c3154ba23..e49e241fe 100644
--- a/14_virtual_mem_part2_mmio_remap/src/console.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/cpu.rs b/14_virtual_mem_part2_mmio_remap/src/cpu.rs
index 36b6a9d4c..e1493d1dd 100644
--- a/14_virtual_mem_part2_mmio_remap/src/cpu.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/cpu/boot.rs b/14_virtual_mem_part2_mmio_remap/src/cpu/boot.rs
index 1dc5c1808..8091dac36 100644
--- a/14_virtual_mem_part2_mmio_remap/src/cpu/boot.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/cpu/smp.rs b/14_virtual_mem_part2_mmio_remap/src/cpu/smp.rs
index 38230ce1e..57386f79b 100644
--- a/14_virtual_mem_part2_mmio_remap/src/cpu/smp.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Symmetric multiprocessing.
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/driver.rs b/14_virtual_mem_part2_mmio_remap/src/driver.rs
index 83fac4a7c..7b800dbc3 100644
--- a/14_virtual_mem_part2_mmio_remap/src/driver.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/exception.rs b/14_virtual_mem_part2_mmio_remap/src/exception.rs
index 3c5e7bc83..f4af81444 100644
--- a/14_virtual_mem_part2_mmio_remap/src/exception.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronous and asynchronous exception handling.
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/exception/asynchronous.rs b/14_virtual_mem_part2_mmio_remap/src/exception/asynchronous.rs
index e9aace357..0e2835b28 100644
--- a/14_virtual_mem_part2_mmio_remap/src/exception/asynchronous.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Asynchronous exception handling.
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/lib.rs b/14_virtual_mem_part2_mmio_remap/src/lib.rs
index d36e54481..7808f5ba2 100644
--- a/14_virtual_mem_part2_mmio_remap/src/lib.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/14_virtual_mem_part2_mmio_remap/src/main.rs b/14_virtual_mem_part2_mmio_remap/src/main.rs
index 750573fc2..b891492a8 100644
--- a/14_virtual_mem_part2_mmio_remap/src/main.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/14_virtual_mem_part2_mmio_remap/src/memory.rs b/14_virtual_mem_part2_mmio_remap/src/memory.rs
index f33ca3234..b5aa666de 100644
--- a/14_virtual_mem_part2_mmio_remap/src/memory.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management.
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs b/14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
index efc87a33b..b0616f883 100644
--- a/14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit.
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/memory/mmu/alloc.rs b/14_virtual_mem_part2_mmio_remap/src/memory/mmu/alloc.rs
index a63df0978..aadb72ef2 100644
--- a/14_virtual_mem_part2_mmio_remap/src/memory/mmu/alloc.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/memory/mmu/alloc.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Allocation.
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs b/14_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs
index eba13ef90..d171c6e67 100644
--- a/14_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! A record of mapped pages.
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs b/14_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs
index 462e278be..7eb46ebfc 100644
--- a/14_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Translation table.
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs b/14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
index 3ea746f48..842148360 100644
--- a/14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit types.
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/panic_wait.rs b/14_virtual_mem_part2_mmio_remap/src/panic_wait.rs
index 130e952b8..0f958f288 100644
--- a/14_virtual_mem_part2_mmio_remap/src/panic_wait.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/print.rs b/14_virtual_mem_part2_mmio_remap/src/print.rs
index 89fa66943..5decb2926 100644
--- a/14_virtual_mem_part2_mmio_remap/src/print.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing.
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/state.rs b/14_virtual_mem_part2_mmio_remap/src/state.rs
index c94d04c84..0af3688c2 100644
--- a/14_virtual_mem_part2_mmio_remap/src/state.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/state.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! State information about the kernel itself.
 
diff --git a/14_virtual_mem_part2_mmio_remap/src/synchronization.rs b/14_virtual_mem_part2_mmio_remap/src/synchronization.rs
index 94582732c..4b4c4c3fb 100644
--- a/14_virtual_mem_part2_mmio_remap/src/synchronization.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/14_virtual_mem_part2_mmio_remap/src/time.rs b/14_virtual_mem_part2_mmio_remap/src/time.rs
index 953b6f0df..6d92b1966 100644
--- a/14_virtual_mem_part2_mmio_remap/src/time.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer primitives.
 
diff --git a/14_virtual_mem_part2_mmio_remap/test-macros/src/lib.rs b/14_virtual_mem_part2_mmio_remap/test-macros/src/lib.rs
index 36c95e8a6..83025a091 100644
--- a/14_virtual_mem_part2_mmio_remap/test-macros/src/lib.rs
+++ b/14_virtual_mem_part2_mmio_remap/test-macros/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 use proc_macro::TokenStream;
 use proc_macro2::Span;
diff --git a/14_virtual_mem_part2_mmio_remap/test-types/src/lib.rs b/14_virtual_mem_part2_mmio_remap/test-types/src/lib.rs
index fe7d918f5..922c2a1c3 100644
--- a/14_virtual_mem_part2_mmio_remap/test-types/src/lib.rs
+++ b/14_virtual_mem_part2_mmio_remap/test-types/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Types for the `custom_test_frameworks` implementation.
 
diff --git a/14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rb b/14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rb
index 16fb6c790..249de2245 100644
--- a/14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rb
+++ b/14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 require 'expect'
 
diff --git a/14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs b/14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs
index 03058f5ef..6aa3de18a 100644
--- a/14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs
+++ b/14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Console sanity tests - RX, TX and statistics.
 
diff --git a/14_virtual_mem_part2_mmio_remap/tests/01_timer_sanity.rs b/14_virtual_mem_part2_mmio_remap/tests/01_timer_sanity.rs
index f39d83845..59ef4a7f7 100644
--- a/14_virtual_mem_part2_mmio_remap/tests/01_timer_sanity.rs
+++ b/14_virtual_mem_part2_mmio_remap/tests/01_timer_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer sanity tests.
 
diff --git a/14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs b/14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
index 1979a66c4..de92b2b2b 100644
--- a/14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
+++ b/14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Page faults must result in synchronous exceptions.
 
diff --git a/14_virtual_mem_part2_mmio_remap/tests/03_exception_irq_sanity.rs b/14_virtual_mem_part2_mmio_remap/tests/03_exception_irq_sanity.rs
index ac25d01a8..e1e025548 100644
--- a/14_virtual_mem_part2_mmio_remap/tests/03_exception_irq_sanity.rs
+++ b/14_virtual_mem_part2_mmio_remap/tests/03_exception_irq_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! IRQ handling sanity tests.
 
diff --git a/14_virtual_mem_part2_mmio_remap/tests/panic_exit_success/mod.rs b/14_virtual_mem_part2_mmio_remap/tests/panic_exit_success/mod.rs
index 29d1f9750..908fac51c 100644
--- a/14_virtual_mem_part2_mmio_remap/tests/panic_exit_success/mod.rs
+++ b/14_virtual_mem_part2_mmio_remap/tests/panic_exit_success/mod.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 /// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
 #[no_mangle]
diff --git a/15_virtual_mem_part3_precomputed_tables/Makefile b/15_virtual_mem_part3_precomputed_tables/Makefile
index f484b21a2..385c003ca 100644
--- a/15_virtual_mem_part3_precomputed_tables/Makefile
+++ b/15_virtual_mem_part3_precomputed_tables/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/color.mk
 include ../common/docker.mk
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index f87d297a9..b58ed67ee 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -1135,7 +1135,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld 15_virtual
 --- 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
 +++ 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld
 @@ -3,6 +3,8 @@
-  * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+  * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
   */
 
 +INCLUDE src/bsp/raspberrypi/kernel_virt_addr_space_size.ld;
@@ -1796,7 +1796,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/arch.rb 15_virt
 +
 +# SPDX-License-Identifier: MIT OR Apache-2.0
 +#
-+# Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
++# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +# Bitfield manipulation.
 +class BitField
@@ -2113,7 +2113,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/bsp.rb 15_virtu
 +
 +# SPDX-License-Identifier: MIT OR Apache-2.0
 +#
-+# Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
++# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +# Raspberry Pi 3 + 4
 +class RaspberryPi
@@ -2167,7 +2167,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/generic.rb 15_v
 +
 +# SPDX-License-Identifier: MIT OR Apache-2.0
 +#
-+# Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
++# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +module Granule64KiB
 +    SIZE = 64 * 1024
@@ -2351,7 +2351,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/kernel_elf.rb 1
 +
 +# SPDX-License-Identifier: MIT OR Apache-2.0
 +#
-+# Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
++# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +# KernelELF
 +class KernelELF
@@ -2449,7 +2449,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/main.rb 15_virt
 +
 +# SPDX-License-Identifier: MIT OR Apache-2.0
 +#
-+# Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
++# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +TARGET = ARGV[0].split('-').first.to_sym
 +BSP_TYPE = ARGV[1].to_sym
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu.rs
index 56443865a..66da661c7 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 //!
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
index e604e1124..0a606a484 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.s b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.s
index 6b167d172..dd2b50b88 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.s
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.s
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //--------------------------------------------------------------------------------------------------
 // Definitions
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/smp.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/smp.rs
index 0ea9b8764..351fde62e 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/smp.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
 //!
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.rs
index 708f63ddb..1e9c3f99b 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural synchronous and asynchronous exception handling.
 //!
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.s b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.s
index cb6bfb150..5aae30b9c 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.s
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.s
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //--------------------------------------------------------------------------------------------------
 // Definitions
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception/asynchronous.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception/asynchronous.rs
index 799ab4e82..73b82e65d 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception/asynchronous.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural asynchronous exception handling.
 //!
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu.rs
index ac0ef3e19..e2db2d236 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit Driver.
 //!
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs
index ceb85252b..53f592162 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural translation table.
 //!
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/time.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/time.rs
index 7a7647ef7..576248390 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/time.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
 //!
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp.rs
index c558922f7..824787f65 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver.rs
index eac6bdd16..eafaf7754 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm.rs
index 0bb1bd4b6..e83e24c92 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! ARM driver top level.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2.rs
index bbafa5fe8..4c68a6929 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICv2 Driver - ARM Generic Interrupt Controller v2.
 //!
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2/gicc.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2/gicc.rs
index abfadb0c0..1a151d246 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2/gicc.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2/gicc.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICC Driver - GIC CPU interface.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2/gicd.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2/gicd.rs
index ae7861c98..60bbc4689 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2/gicd.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICD Driver - GIC Distributor.
 //!
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm.rs
index 01bcaa895..5a7cc23be 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index bc96a1290..eea07b755 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
index 0bd84e3cf..99961facb 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Interrupt Controller Driver.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index a197adfcf..f09da862f 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Peripheral Interrupt Controller Driver.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 9d58d9ea2..23c09a7f2 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 //!
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/common.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/common.rs
index 41553b7a5..fd9e988ea 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/common.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi.rs
index 10d482781..fb9edf88d 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/console.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/console.rs
index e249e8223..edb1a831e 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/console.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP console facilities.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/cpu.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/cpu.rs
index d09ff9568..85fb89e49 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/cpu.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/driver.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/driver.rs
index 4d5007e4e..531687524 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/driver.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/exception.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/exception.rs
index 94d0728ff..aa6c5a63f 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/exception.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP synchronous and asynchronous exception handling.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/exception/asynchronous.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/exception/asynchronous.rs
index a253daa94..dc5ab4215 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/exception/asynchronous.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP asynchronous exception handling.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld
index 7a8ed2aff..ae45e27ab 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT OR Apache-2.0
  *
- * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+ * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
  */
 
 INCLUDE src/bsp/raspberrypi/kernel_virt_addr_space_size.ld;
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory.rs
index a6da7d556..660409bbd 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 //!
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs
index 441000dbb..f78b57d11 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management Unit.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/common.rs b/15_virtual_mem_part3_precomputed_tables/src/common.rs
index a91ab7a37..678f4a6c6 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/common.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! General purpose code.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/console.rs b/15_virtual_mem_part3_precomputed_tables/src/console.rs
index c3154ba23..e49e241fe 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/console.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/cpu.rs b/15_virtual_mem_part3_precomputed_tables/src/cpu.rs
index 36b6a9d4c..e1493d1dd 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/cpu.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/cpu/boot.rs b/15_virtual_mem_part3_precomputed_tables/src/cpu/boot.rs
index 1dc5c1808..8091dac36 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/cpu/boot.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/cpu/smp.rs b/15_virtual_mem_part3_precomputed_tables/src/cpu/smp.rs
index 38230ce1e..57386f79b 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/cpu/smp.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Symmetric multiprocessing.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/driver.rs b/15_virtual_mem_part3_precomputed_tables/src/driver.rs
index 83fac4a7c..7b800dbc3 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/driver.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/exception.rs b/15_virtual_mem_part3_precomputed_tables/src/exception.rs
index 3c5e7bc83..f4af81444 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/exception.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronous and asynchronous exception handling.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/exception/asynchronous.rs b/15_virtual_mem_part3_precomputed_tables/src/exception/asynchronous.rs
index e9aace357..0e2835b28 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/exception/asynchronous.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Asynchronous exception handling.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/lib.rs b/15_virtual_mem_part3_precomputed_tables/src/lib.rs
index d36e54481..7808f5ba2 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/lib.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/15_virtual_mem_part3_precomputed_tables/src/main.rs b/15_virtual_mem_part3_precomputed_tables/src/main.rs
index 210796445..8bc808853 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/main.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory.rs b/15_virtual_mem_part3_precomputed_tables/src/memory.rs
index f33ca3234..b5aa666de 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/memory.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs
index 53cb2d003..23dc7094b 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/alloc.rs b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/alloc.rs
index a63df0978..aadb72ef2 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/alloc.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/alloc.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Allocation.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/mapping_record.rs b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/mapping_record.rs
index eba13ef90..d171c6e67 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/mapping_record.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/mapping_record.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! A record of mapped pages.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/translation_table.rs b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/translation_table.rs
index 698cad629..5a34a1e69 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/translation_table.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/translation_table.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Translation table.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs
index 3ea746f48..842148360 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit types.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/panic_wait.rs b/15_virtual_mem_part3_precomputed_tables/src/panic_wait.rs
index 130e952b8..0f958f288 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/panic_wait.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/print.rs b/15_virtual_mem_part3_precomputed_tables/src/print.rs
index 89fa66943..5decb2926 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/print.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/state.rs b/15_virtual_mem_part3_precomputed_tables/src/state.rs
index c94d04c84..0af3688c2 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/state.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/state.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! State information about the kernel itself.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/src/synchronization.rs b/15_virtual_mem_part3_precomputed_tables/src/synchronization.rs
index 94582732c..4b4c4c3fb 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/synchronization.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/15_virtual_mem_part3_precomputed_tables/src/time.rs b/15_virtual_mem_part3_precomputed_tables/src/time.rs
index 953b6f0df..6d92b1966 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/time.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer primitives.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/test-macros/src/lib.rs b/15_virtual_mem_part3_precomputed_tables/test-macros/src/lib.rs
index 36c95e8a6..83025a091 100644
--- a/15_virtual_mem_part3_precomputed_tables/test-macros/src/lib.rs
+++ b/15_virtual_mem_part3_precomputed_tables/test-macros/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 use proc_macro::TokenStream;
 use proc_macro2::Span;
diff --git a/15_virtual_mem_part3_precomputed_tables/test-types/src/lib.rs b/15_virtual_mem_part3_precomputed_tables/test-types/src/lib.rs
index fe7d918f5..922c2a1c3 100644
--- a/15_virtual_mem_part3_precomputed_tables/test-types/src/lib.rs
+++ b/15_virtual_mem_part3_precomputed_tables/test-types/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Types for the `custom_test_frameworks` implementation.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rb b/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rb
index 16fb6c790..249de2245 100644
--- a/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rb
+++ b/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 require 'expect'
 
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rs b/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rs
index 489529411..e038cd47b 100644
--- a/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rs
+++ b/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Console sanity tests - RX, TX and statistics.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/01_timer_sanity.rs b/15_virtual_mem_part3_precomputed_tables/tests/01_timer_sanity.rs
index 9ffc38e7b..9b2b228d9 100644
--- a/15_virtual_mem_part3_precomputed_tables/tests/01_timer_sanity.rs
+++ b/15_virtual_mem_part3_precomputed_tables/tests/01_timer_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer sanity tests.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs b/15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs
index 1063c123a..2cf693fc8 100644
--- a/15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs
+++ b/15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Page faults must result in synchronous exceptions.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/03_exception_irq_sanity.rs b/15_virtual_mem_part3_precomputed_tables/tests/03_exception_irq_sanity.rs
index c21f0c490..9030424d5 100644
--- a/15_virtual_mem_part3_precomputed_tables/tests/03_exception_irq_sanity.rs
+++ b/15_virtual_mem_part3_precomputed_tables/tests/03_exception_irq_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! IRQ handling sanity tests.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/panic_exit_success/mod.rs b/15_virtual_mem_part3_precomputed_tables/tests/panic_exit_success/mod.rs
index 29d1f9750..908fac51c 100644
--- a/15_virtual_mem_part3_precomputed_tables/tests/panic_exit_success/mod.rs
+++ b/15_virtual_mem_part3_precomputed_tables/tests/panic_exit_success/mod.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 /// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
 #[no_mangle]
diff --git a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb
index 3b9d03847..07b06f13d 100644
--- a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb
+++ b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 # Bitfield manipulation.
 class BitField
diff --git a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/bsp.rb b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/bsp.rb
index d00c0ee94..4aaedaf73 100644
--- a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/bsp.rb
+++ b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/bsp.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 # Raspberry Pi 3 + 4
 class RaspberryPi
diff --git a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/generic.rb b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/generic.rb
index 977e92574..13df06588 100644
--- a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/generic.rb
+++ b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/generic.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 module Granule64KiB
     SIZE = 64 * 1024
diff --git a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/kernel_elf.rb b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/kernel_elf.rb
index a467856e0..80d00f717 100644
--- a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/kernel_elf.rb
+++ b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/kernel_elf.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 # KernelELF
 class KernelELF
diff --git a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/main.rb b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/main.rb
index 5485cc61a..275129ae7 100755
--- a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/main.rb
+++ b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/main.rb
@@ -3,7 +3,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 TARGET = ARGV[0].split('-').first.to_sym
 BSP_TYPE = ARGV[1].to_sym
diff --git a/16_virtual_mem_part4_higher_half_kernel/Makefile b/16_virtual_mem_part4_higher_half_kernel/Makefile
index f484b21a2..385c003ca 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Makefile
+++ b/16_virtual_mem_part4_higher_half_kernel/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/color.mk
 include ../common/docker.mk
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu.rs
index 56443865a..66da661c7 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 //!
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs
index 87f120d25..3d01b0dcc 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.s b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.s
index d37b4623a..d2c9270d0 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.s
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.s
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //--------------------------------------------------------------------------------------------------
 // Definitions
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/smp.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/smp.rs
index 0ea9b8764..351fde62e 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/smp.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
 //!
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.rs
index 708f63ddb..1e9c3f99b 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural synchronous and asynchronous exception handling.
 //!
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.s b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.s
index cb6bfb150..5aae30b9c 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.s
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.s
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //--------------------------------------------------------------------------------------------------
 // Definitions
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception/asynchronous.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception/asynchronous.rs
index 799ab4e82..73b82e65d 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception/asynchronous.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural asynchronous exception handling.
 //!
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu.rs
index e12a47d4e..3d6c18b74 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit Driver.
 //!
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
index b333abe64..f0b4ac85f 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural translation table.
 //!
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/time.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/time.rs
index 7a7647ef7..576248390 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/time.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
 //!
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp.rs
index c558922f7..824787f65 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver.rs
index eac6bdd16..eafaf7754 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm.rs
index 0bb1bd4b6..e83e24c92 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! ARM driver top level.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2.rs
index bbafa5fe8..4c68a6929 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICv2 Driver - ARM Generic Interrupt Controller v2.
 //!
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2/gicc.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
index abfadb0c0..1a151d246 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICC Driver - GIC CPU interface.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2/gicd.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
index ae7861c98..60bbc4689 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICD Driver - GIC Distributor.
 //!
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm.rs
index 01bcaa895..5a7cc23be 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index bc96a1290..eea07b755 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
index 0bd84e3cf..99961facb 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Interrupt Controller Driver.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index a197adfcf..f09da862f 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Peripheral Interrupt Controller Driver.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 9d58d9ea2..23c09a7f2 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 //!
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/common.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/common.rs
index 41553b7a5..fd9e988ea 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/common.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi.rs
index 10d482781..fb9edf88d 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/console.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/console.rs
index 16dc2d3b3..e75f5fda1 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/console.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP console facilities.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/cpu.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/cpu.rs
index d09ff9568..85fb89e49 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/cpu.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/driver.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/driver.rs
index 4d5007e4e..531687524 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/driver.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/exception.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/exception.rs
index 94d0728ff..aa6c5a63f 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/exception.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP synchronous and asynchronous exception handling.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/exception/asynchronous.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/exception/asynchronous.rs
index a253daa94..dc5ab4215 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/exception/asynchronous.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP asynchronous exception handling.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/link.ld b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/link.ld
index 9e07f8d7e..af64d9605 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/link.ld
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/link.ld
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT OR Apache-2.0
  *
- * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+ * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
  */
 
 INCLUDE src/bsp/raspberrypi/kernel_virt_addr_space_size.ld;
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory.rs
index 1709ae4da..9e071726c 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 //!
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs
index 86e09c017..bfebd8b29 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management Unit.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/common.rs b/16_virtual_mem_part4_higher_half_kernel/src/common.rs
index a91ab7a37..678f4a6c6 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/common.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! General purpose code.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/console.rs b/16_virtual_mem_part4_higher_half_kernel/src/console.rs
index c3154ba23..e49e241fe 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/console.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/cpu.rs b/16_virtual_mem_part4_higher_half_kernel/src/cpu.rs
index 36b6a9d4c..e1493d1dd 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/cpu.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/cpu/boot.rs b/16_virtual_mem_part4_higher_half_kernel/src/cpu/boot.rs
index 1dc5c1808..8091dac36 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/cpu/boot.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/cpu/smp.rs b/16_virtual_mem_part4_higher_half_kernel/src/cpu/smp.rs
index 38230ce1e..57386f79b 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/cpu/smp.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Symmetric multiprocessing.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/driver.rs b/16_virtual_mem_part4_higher_half_kernel/src/driver.rs
index 83fac4a7c..7b800dbc3 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/driver.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/exception.rs b/16_virtual_mem_part4_higher_half_kernel/src/exception.rs
index 3c5e7bc83..f4af81444 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/exception.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronous and asynchronous exception handling.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/exception/asynchronous.rs b/16_virtual_mem_part4_higher_half_kernel/src/exception/asynchronous.rs
index e9aace357..0e2835b28 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/exception/asynchronous.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Asynchronous exception handling.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/lib.rs b/16_virtual_mem_part4_higher_half_kernel/src/lib.rs
index 7fd5a761e..c15d35eed 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/lib.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/main.rs b/16_virtual_mem_part4_higher_half_kernel/src/main.rs
index 210796445..8bc808853 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/main.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory.rs b/16_virtual_mem_part4_higher_half_kernel/src/memory.rs
index f33ca3234..b5aa666de 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/memory.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs
index ce75f9287..dfc299932 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/alloc.rs b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/alloc.rs
index a63df0978..aadb72ef2 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/alloc.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/alloc.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Allocation.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/mapping_record.rs b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/mapping_record.rs
index eba13ef90..d171c6e67 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/mapping_record.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/mapping_record.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! A record of mapped pages.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/translation_table.rs b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/translation_table.rs
index d81e6957f..9d627f974 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/translation_table.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/translation_table.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Translation table.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/types.rs b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/types.rs
index 8235ea622..43a96a116 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/types.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/types.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit types.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/panic_wait.rs b/16_virtual_mem_part4_higher_half_kernel/src/panic_wait.rs
index 130e952b8..0f958f288 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/panic_wait.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/print.rs b/16_virtual_mem_part4_higher_half_kernel/src/print.rs
index 89fa66943..5decb2926 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/print.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/state.rs b/16_virtual_mem_part4_higher_half_kernel/src/state.rs
index c94d04c84..0af3688c2 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/state.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/state.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! State information about the kernel itself.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/synchronization.rs b/16_virtual_mem_part4_higher_half_kernel/src/synchronization.rs
index 94582732c..4b4c4c3fb 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/synchronization.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/time.rs b/16_virtual_mem_part4_higher_half_kernel/src/time.rs
index 953b6f0df..6d92b1966 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/time.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer primitives.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/test-macros/src/lib.rs b/16_virtual_mem_part4_higher_half_kernel/test-macros/src/lib.rs
index 36c95e8a6..83025a091 100644
--- a/16_virtual_mem_part4_higher_half_kernel/test-macros/src/lib.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/test-macros/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 use proc_macro::TokenStream;
 use proc_macro2::Span;
diff --git a/16_virtual_mem_part4_higher_half_kernel/test-types/src/lib.rs b/16_virtual_mem_part4_higher_half_kernel/test-types/src/lib.rs
index fe7d918f5..922c2a1c3 100644
--- a/16_virtual_mem_part4_higher_half_kernel/test-types/src/lib.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/test-types/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Types for the `custom_test_frameworks` implementation.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rb b/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rb
index 16fb6c790..249de2245 100644
--- a/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rb
+++ b/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 require 'expect'
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rs b/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rs
index 489529411..e038cd47b 100644
--- a/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Console sanity tests - RX, TX and statistics.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/01_timer_sanity.rs b/16_virtual_mem_part4_higher_half_kernel/tests/01_timer_sanity.rs
index 9ffc38e7b..9b2b228d9 100644
--- a/16_virtual_mem_part4_higher_half_kernel/tests/01_timer_sanity.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/tests/01_timer_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer sanity tests.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs b/16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs
index 7eb099ff1..b28246158 100644
--- a/16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Page faults must result in synchronous exceptions.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/03_exception_irq_sanity.rs b/16_virtual_mem_part4_higher_half_kernel/tests/03_exception_irq_sanity.rs
index c21f0c490..9030424d5 100644
--- a/16_virtual_mem_part4_higher_half_kernel/tests/03_exception_irq_sanity.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/tests/03_exception_irq_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! IRQ handling sanity tests.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/panic_exit_success/mod.rs b/16_virtual_mem_part4_higher_half_kernel/tests/panic_exit_success/mod.rs
index 29d1f9750..908fac51c 100644
--- a/16_virtual_mem_part4_higher_half_kernel/tests/panic_exit_success/mod.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/tests/panic_exit_success/mod.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 /// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
 #[no_mangle]
diff --git a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/arch.rb b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/arch.rb
index f9f5c86e3..deceb6d0c 100644
--- a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/arch.rb
+++ b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/arch.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 # Bitfield manipulation.
 class BitField
diff --git a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/bsp.rb b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/bsp.rb
index 54b511411..ddf69a173 100644
--- a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/bsp.rb
+++ b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/bsp.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 # Raspberry Pi 3 + 4
 class RaspberryPi
diff --git a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/generic.rb b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/generic.rb
index 977e92574..13df06588 100644
--- a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/generic.rb
+++ b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/generic.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 module Granule64KiB
     SIZE = 64 * 1024
diff --git a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/kernel_elf.rb b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/kernel_elf.rb
index a467856e0..80d00f717 100644
--- a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/kernel_elf.rb
+++ b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/kernel_elf.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 # KernelELF
 class KernelELF
diff --git a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/main.rb b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/main.rb
index 5485cc61a..275129ae7 100755
--- a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/main.rb
+++ b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/main.rb
@@ -3,7 +3,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 TARGET = ARGV[0].split('-').first.to_sym
 BSP_TYPE = ARGV[1].to_sym
diff --git a/LICENSE-MIT b/LICENSE-MIT
index cfd323793..d36a7e184 100644
--- a/LICENSE-MIT
+++ b/LICENSE-MIT
@@ -1,6 +1,6 @@
 MIT License
 
-Copyright (C) 2018-2021 by the respective authors
+Copyright (C) 2018-2022 by the respective authors
 
 Permission is hereby granted, free of charge, to any person obtaining a copy
 of this software and associated documentation files (the "Software"), to deal
diff --git a/X1_JTAG_boot/Makefile b/X1_JTAG_boot/Makefile
index d5023b033..7a97517f1 100644
--- a/X1_JTAG_boot/Makefile
+++ b/X1_JTAG_boot/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/color.mk
 include ../common/docker.mk
diff --git a/X1_JTAG_boot/src/_arch/aarch64/cpu.rs b/X1_JTAG_boot/src/_arch/aarch64/cpu.rs
index d3b07461a..4414ac6ad 100644
--- a/X1_JTAG_boot/src/_arch/aarch64/cpu.rs
+++ b/X1_JTAG_boot/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 //!
diff --git a/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.rs b/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.rs
index a8defcdae..2f9654c7f 100644
--- a/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.rs
+++ b/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s b/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s
index 28bc1a70a..7d445a935 100644
--- a/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s
+++ b/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //--------------------------------------------------------------------------------------------------
 // Definitions
diff --git a/X1_JTAG_boot/src/_arch/aarch64/time.rs b/X1_JTAG_boot/src/_arch/aarch64/time.rs
index 7a7647ef7..576248390 100644
--- a/X1_JTAG_boot/src/_arch/aarch64/time.rs
+++ b/X1_JTAG_boot/src/_arch/aarch64/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
 //!
diff --git a/X1_JTAG_boot/src/bsp.rs b/X1_JTAG_boot/src/bsp.rs
index c558922f7..824787f65 100644
--- a/X1_JTAG_boot/src/bsp.rs
+++ b/X1_JTAG_boot/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/X1_JTAG_boot/src/bsp/device_driver.rs b/X1_JTAG_boot/src/bsp/device_driver.rs
index 2fcbc83e7..6e9bf8f39 100644
--- a/X1_JTAG_boot/src/bsp/device_driver.rs
+++ b/X1_JTAG_boot/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/X1_JTAG_boot/src/bsp/device_driver/bcm.rs b/X1_JTAG_boot/src/bsp/device_driver/bcm.rs
index 77613d261..b4b7906e5 100644
--- a/X1_JTAG_boot/src/bsp/device_driver/bcm.rs
+++ b/X1_JTAG_boot/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 8033381e9..dbb4beaa6 100644
--- a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index b290524ca..878ea567f 100644
--- a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 //!
diff --git a/X1_JTAG_boot/src/bsp/device_driver/common.rs b/X1_JTAG_boot/src/bsp/device_driver/common.rs
index 41553b7a5..fd9e988ea 100644
--- a/X1_JTAG_boot/src/bsp/device_driver/common.rs
+++ b/X1_JTAG_boot/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/X1_JTAG_boot/src/bsp/raspberrypi.rs b/X1_JTAG_boot/src/bsp/raspberrypi.rs
index ecc6fd108..f8dbc1f40 100644
--- a/X1_JTAG_boot/src/bsp/raspberrypi.rs
+++ b/X1_JTAG_boot/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/X1_JTAG_boot/src/bsp/raspberrypi/console.rs b/X1_JTAG_boot/src/bsp/raspberrypi/console.rs
index c6bb5263c..a247032fc 100644
--- a/X1_JTAG_boot/src/bsp/raspberrypi/console.rs
+++ b/X1_JTAG_boot/src/bsp/raspberrypi/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP console facilities.
 
diff --git a/X1_JTAG_boot/src/bsp/raspberrypi/cpu.rs b/X1_JTAG_boot/src/bsp/raspberrypi/cpu.rs
index d09ff9568..85fb89e49 100644
--- a/X1_JTAG_boot/src/bsp/raspberrypi/cpu.rs
+++ b/X1_JTAG_boot/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/X1_JTAG_boot/src/bsp/raspberrypi/driver.rs b/X1_JTAG_boot/src/bsp/raspberrypi/driver.rs
index ab910185c..b5538baa3 100644
--- a/X1_JTAG_boot/src/bsp/raspberrypi/driver.rs
+++ b/X1_JTAG_boot/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/X1_JTAG_boot/src/bsp/raspberrypi/link.ld b/X1_JTAG_boot/src/bsp/raspberrypi/link.ld
index 7c01ccbf5..007afd4a5 100644
--- a/X1_JTAG_boot/src/bsp/raspberrypi/link.ld
+++ b/X1_JTAG_boot/src/bsp/raspberrypi/link.ld
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT OR Apache-2.0
  *
- * Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+ * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
  */
 
 __rpi_phys_dram_start_addr = 0;
diff --git a/X1_JTAG_boot/src/bsp/raspberrypi/memory.rs b/X1_JTAG_boot/src/bsp/raspberrypi/memory.rs
index ef397a6f9..27be8590e 100644
--- a/X1_JTAG_boot/src/bsp/raspberrypi/memory.rs
+++ b/X1_JTAG_boot/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 
diff --git a/X1_JTAG_boot/src/console.rs b/X1_JTAG_boot/src/console.rs
index c3154ba23..e49e241fe 100644
--- a/X1_JTAG_boot/src/console.rs
+++ b/X1_JTAG_boot/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/X1_JTAG_boot/src/cpu.rs b/X1_JTAG_boot/src/cpu.rs
index 7a095cb12..62503fb40 100644
--- a/X1_JTAG_boot/src/cpu.rs
+++ b/X1_JTAG_boot/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/X1_JTAG_boot/src/cpu/boot.rs b/X1_JTAG_boot/src/cpu/boot.rs
index 1dc5c1808..8091dac36 100644
--- a/X1_JTAG_boot/src/cpu/boot.rs
+++ b/X1_JTAG_boot/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/X1_JTAG_boot/src/driver.rs b/X1_JTAG_boot/src/driver.rs
index 6e8c5533a..2fcc75629 100644
--- a/X1_JTAG_boot/src/driver.rs
+++ b/X1_JTAG_boot/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/X1_JTAG_boot/src/main.rs b/X1_JTAG_boot/src/main.rs
index 4f0a6ffc9..808b3176c 100644
--- a/X1_JTAG_boot/src/main.rs
+++ b/X1_JTAG_boot/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(html_logo_url = "https://git.io/JeGIp")]
diff --git a/X1_JTAG_boot/src/panic_wait.rs b/X1_JTAG_boot/src/panic_wait.rs
index 66fbe6b40..946041b32 100644
--- a/X1_JTAG_boot/src/panic_wait.rs
+++ b/X1_JTAG_boot/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/X1_JTAG_boot/src/print.rs b/X1_JTAG_boot/src/print.rs
index 89fa66943..5decb2926 100644
--- a/X1_JTAG_boot/src/print.rs
+++ b/X1_JTAG_boot/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing.
 
diff --git a/X1_JTAG_boot/src/synchronization.rs b/X1_JTAG_boot/src/synchronization.rs
index 7bb2938be..d5653a19f 100644
--- a/X1_JTAG_boot/src/synchronization.rs
+++ b/X1_JTAG_boot/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/X1_JTAG_boot/src/time.rs b/X1_JTAG_boot/src/time.rs
index 953b6f0df..6d92b1966 100644
--- a/X1_JTAG_boot/src/time.rs
+++ b/X1_JTAG_boot/src/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer primitives.
 
diff --git a/common/serial/minipush.rb b/common/serial/minipush.rb
index b18c49832..62feebf2a 100755
--- a/common/serial/minipush.rb
+++ b/common/serial/minipush.rb
@@ -3,7 +3,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 require_relative 'miniterm'
 require 'ruby-progressbar'
diff --git a/common/serial/minipush/progressbar_patch.rb b/common/serial/minipush/progressbar_patch.rb
index 2be5ad5a3..1862a234c 100644
--- a/common/serial/minipush/progressbar_patch.rb
+++ b/common/serial/minipush/progressbar_patch.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 # Monkey-patch ruby-progressbar so that it supports reporting the progress in KiB instead of Byte.
 
diff --git a/common/serial/miniterm.rb b/common/serial/miniterm.rb
index 06e7efd1d..996e1d3fe 100755
--- a/common/serial/miniterm.rb
+++ b/common/serial/miniterm.rb
@@ -3,7 +3,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 require 'rubygems'
 require 'bundler/setup'
diff --git a/common/tests/boot_test.rb b/common/tests/boot_test.rb
index 1f5301f96..401c01831 100644
--- a/common/tests/boot_test.rb
+++ b/common/tests/boot_test.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 require_relative 'test'
 require 'timeout'
diff --git a/common/tests/console_io_test.rb b/common/tests/console_io_test.rb
index 66822a4e9..74610f845 100644
--- a/common/tests/console_io_test.rb
+++ b/common/tests/console_io_test.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 require 'pty'
 require_relative 'test'
diff --git a/common/tests/dispatch.rb b/common/tests/dispatch.rb
index 148272657..13ae3af85 100755
--- a/common/tests/dispatch.rb
+++ b/common/tests/dispatch.rb
@@ -3,7 +3,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 require_relative 'boot_test'
 require_relative 'console_io_test'
diff --git a/common/tests/exit_code_test.rb b/common/tests/exit_code_test.rb
index 2f14ab782..181e624e0 100644
--- a/common/tests/exit_code_test.rb
+++ b/common/tests/exit_code_test.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 require 'English'
 require_relative 'test'
diff --git a/common/tests/test.rb b/common/tests/test.rb
index b0f67f3a1..d8777ba7a 100644
--- a/common/tests/test.rb
+++ b/common/tests/test.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 # Test base class.
 class Test
diff --git a/docker/rustembedded-osdev-utils/Dockerfile b/docker/rustembedded-osdev-utils/Dockerfile
index f540a38c8..7aa705df2 100644
--- a/docker/rustembedded-osdev-utils/Dockerfile
+++ b/docker/rustembedded-osdev-utils/Dockerfile
@@ -1,7 +1,7 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2017-2021 Andre Richter <andre.o.richter@gmail.com>
-## Copyright (c) 2019-2021 Nao Taco <naotaco@gmail.com>
+## Copyright (c) 2017-2022 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2019-2022 Nao Taco <naotaco@gmail.com>
 FROM ubuntu:20.04
 
 ARG VCS_REF
diff --git a/docker/rustembedded-osdev-utils/Makefile b/docker/rustembedded-osdev-utils/Makefile
index 161abc7bc..8127375d6 100644
--- a/docker/rustembedded-osdev-utils/Makefile
+++ b/docker/rustembedded-osdev-utils/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2019-2021 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
 # Reference followed: https://www.docker.com/blog/getting-started-with-docker-for-arm-on-linux
 
diff --git a/utils/devtool.rb b/utils/devtool.rb
index 270866d7d..849d139c7 100755
--- a/utils/devtool.rb
+++ b/utils/devtool.rb
@@ -3,7 +3,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2020-2021 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 require 'rubygems'
 require 'bundler/setup'
diff --git a/utils/devtool/copyright.rb b/utils/devtool/copyright.rb
index 37aba399a..e1741554a 100644
--- a/utils/devtool/copyright.rb
+++ b/utils/devtool/copyright.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 require 'rubygems'
 require 'bundler/setup'
diff --git a/utils/diff_tut_folders.bash b/utils/diff_tut_folders.bash
index 65a0e7fa6..73d5f38d0 100755
--- a/utils/diff_tut_folders.bash
+++ b/utils/diff_tut_folders.bash
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 DIFF=$(
     diff -uNr \
diff --git a/utils/update_copyright.rb b/utils/update_copyright.rb
index 927bc93c5..2b54a3bee 100755
--- a/utils/update_copyright.rb
+++ b/utils/update_copyright.rb
@@ -3,7 +3,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 require 'rubygems'
 require 'bundler/setup'

From 98329b2660a1496b2f46006427723612e984378b Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sat, 15 Jan 2022 21:51:59 +0100
Subject: [PATCH 107/214] Don't need bundler for update_copyright.rb

---
 utils/update_copyright.rb | 2 --
 1 file changed, 2 deletions(-)

diff --git a/utils/update_copyright.rb b/utils/update_copyright.rb
index 2b54a3bee..2bfd28959 100755
--- a/utils/update_copyright.rb
+++ b/utils/update_copyright.rb
@@ -5,8 +5,6 @@
 #
 # Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
-require 'rubygems'
-require 'bundler/setup'
 require 'date'
 
 files = `git ls-files`.split("\n")

From a4a9d0d2bfcfd29a4612150e787247b0cbda7386 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sat, 15 Jan 2022 22:23:01 +0100
Subject: [PATCH 108/214] Update dependencies

---
 02_runtime_init/Cargo.lock                    |   4 ++--
 03_hacky_hello_world/Cargo.lock               |   4 ++--
 04_safe_globals/Cargo.lock                    |   4 ++--
 05_drivers_gpio_uart/Cargo.lock               |   4 ++--
 06_uart_chainloader/Cargo.lock                |   4 ++--
 06_uart_chainloader/demo_payload_rpi3.img     | Bin 6664 -> 6664 bytes
 06_uart_chainloader/demo_payload_rpi4.img     | Bin 6512 -> 6512 bytes
 07_timestamps/Cargo.lock                      |   4 ++--
 08_hw_debug_JTAG/Cargo.lock                   |   4 ++--
 09_privilege_level/Cargo.lock                 |   4 ++--
 .../Cargo.lock                                |   4 ++--
 11_exceptions_part1_groundwork/Cargo.lock     |   4 ++--
 12_integrated_testing/Cargo.lock              |  20 +++++++++---------
 .../Cargo.lock                                |  20 +++++++++---------
 14_virtual_mem_part2_mmio_remap/Cargo.lock    |  20 +++++++++---------
 .../Cargo.lock                                |  20 +++++++++---------
 .../Cargo.lock                                |  20 +++++++++---------
 X1_JTAG_boot/Cargo.lock                       |   4 ++--
 X1_JTAG_boot/jtag_boot_rpi3.img               | Bin 7832 -> 7816 bytes
 X1_JTAG_boot/jtag_boot_rpi4.img               | Bin 6520 -> 6520 bytes
 20 files changed, 72 insertions(+), 72 deletions(-)

diff --git a/02_runtime_init/Cargo.lock b/02_runtime_init/Cargo.lock
index 19fc8b73f..0eafa2a5b 100644
--- a/02_runtime_init/Cargo.lock
+++ b/02_runtime_init/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.0.0"
+version = "7.0.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "b27f5d071b671f9799dfdf0c0afcec11de65195383d36e186639c83b00705e4f"
+checksum = "5bd95fd055d118f77d4e4d527201b6ceccd13586b19b4dac1270f7081fef0f98"
 dependencies = [
  "tock-registers",
 ]
diff --git a/03_hacky_hello_world/Cargo.lock b/03_hacky_hello_world/Cargo.lock
index cdaf44bfe..7f24b65ae 100644
--- a/03_hacky_hello_world/Cargo.lock
+++ b/03_hacky_hello_world/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.0.0"
+version = "7.0.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "b27f5d071b671f9799dfdf0c0afcec11de65195383d36e186639c83b00705e4f"
+checksum = "5bd95fd055d118f77d4e4d527201b6ceccd13586b19b4dac1270f7081fef0f98"
 dependencies = [
  "tock-registers",
 ]
diff --git a/04_safe_globals/Cargo.lock b/04_safe_globals/Cargo.lock
index 08a979d5e..d9a502e1f 100644
--- a/04_safe_globals/Cargo.lock
+++ b/04_safe_globals/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.0.0"
+version = "7.0.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "b27f5d071b671f9799dfdf0c0afcec11de65195383d36e186639c83b00705e4f"
+checksum = "5bd95fd055d118f77d4e4d527201b6ceccd13586b19b4dac1270f7081fef0f98"
 dependencies = [
  "tock-registers",
 ]
diff --git a/05_drivers_gpio_uart/Cargo.lock b/05_drivers_gpio_uart/Cargo.lock
index ff66f5485..926733bcf 100644
--- a/05_drivers_gpio_uart/Cargo.lock
+++ b/05_drivers_gpio_uart/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.0.0"
+version = "7.0.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "b27f5d071b671f9799dfdf0c0afcec11de65195383d36e186639c83b00705e4f"
+checksum = "5bd95fd055d118f77d4e4d527201b6ceccd13586b19b4dac1270f7081fef0f98"
 dependencies = [
  "tock-registers",
 ]
diff --git a/06_uart_chainloader/Cargo.lock b/06_uart_chainloader/Cargo.lock
index c642ff43f..5b7f9177f 100644
--- a/06_uart_chainloader/Cargo.lock
+++ b/06_uart_chainloader/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.0.0"
+version = "7.0.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "b27f5d071b671f9799dfdf0c0afcec11de65195383d36e186639c83b00705e4f"
+checksum = "5bd95fd055d118f77d4e4d527201b6ceccd13586b19b4dac1270f7081fef0f98"
 dependencies = [
  "tock-registers",
 ]
diff --git a/06_uart_chainloader/demo_payload_rpi3.img b/06_uart_chainloader/demo_payload_rpi3.img
index f49c5288b5c0d2e3dc29d2ad43b1b8fee2d64804..011abf13cec01da79d5c41cc3837dd91cd2b70a7 100755
GIT binary patch
delta 1007
zcmZ8fO-vI(82x6qv<q6GyKT3XpYBp&?EwM`qLf2HjYclU3j|HHA^s%>30_D%Q1!x*
zaWuquDe-{YM1>%DFfkeqYBWX?qeeY!jWLCj!HbQi>o;Xgj9)UD+4sGDGw;nzbxw6o
z4@n#H!thIvWX2b*iVYGp<1~>E(Sr5Zc6`KkWS|chTYaCrad(BRmUcn$qwCI0LFTCP
zb#6T4g9lXr^J_>uoCbEQ`krLgvw<2@s&?6E&BEmT4x}b#>*%@<icTD;JL$34;<Bya
zZwl^Kn5?kBtN?vqa%WOSw-XSTaL70yTTlCqZFB_cXdXFf+}Z%+t+G93f00Sfk(FFt
zuFQ?Qt`3kYE|*;0m8I2E5{jrZ4Ow=jR<)k}c4r)br2@cp6GvGB+lpyX+$M-enO4#k
zdsN$Spc2=GtAr*3K-XoUj?Zfo#LR4rI{N^F@z{sZ(z;b)b8aHvh?XR@MC>)0P;TuS
zYY4=x5LY!#x}*Z-OpUYq49e9CgTMorRxX?DOrT4<gytO;x;XZNV79Z(?0%qSCuyPu
z*JJYxf6U2tp&N>4k(#N6E-o3y!R5*s=bPxera1Gd&18_Zs{5t>IJ>AOLP@S&1>MI`
z#F4e!FAa*lY(Y(G7Isc5(0$gMDwe&Zw=-AmAYs;_1*N`bc2H}ODogCNcDtM3#K{Ia
zVl>h`+Pr|j@)&u_1P=_EX8J@v@y?NBcq6eKUvo2TNA;1#-r#YfK9At{Keenc=0Y-I
zH*`(96J|NRCHWz|NvRREs)1AEqo>XrW9iXzBRvNE{IBm9k{AI?>ci}AcuQzP-_+PD
zG*p~hnLkpeW<>`>E7!8ldLoU|2b~Q^T1*gH9?|uPZ_K4!el{D?qbY$_2(-PetF0Z^
zLu@q?3yg_wt?2q0iCTNJ0u2h(C|8^DHxRGDUke^S{&M+QI%)+Vy6FdBk3ermEwYC_
gjauwYI8yaW+w6bV*hYAFctX&>i#c1K*|%uZABYDFzyJUM

delta 1008
zcmYjQO=uHQ5T3W2CTW$L?55eIZJJG!W)0HXYSTmoNsEGb@&{2`#MFX%tl~Aa;-$wt
zo=^}(i-&e2N^9&%D6PHtb5WFn^s*@)lHj2~Dh4&{Z1O4&%)Z@kX1+J?o3~T_Q~lXX
zg2T2j{LUs6B6+Q0n|KNl8Y{HWqPC<P4x$?((2x0U$GTm0MpF8QNOFeg%oW7O+?Hu7
z0I5nGS0}(c`zoIao2%qQ^)OVHOmlh)CeJy)%-))Gz>6k;Yzete-%PRt&Ci6DAX{$^
z3ENdxZC<#L-H)lU!5}R=pkjo9niDp?6c%;l%{sBA;zWbKu?qBM)tpXM%zi*zKo`*g
z0(59OK*t_+&;sV1#I03OKQYy%YR`Y0(+0reRRlu-_pCsT^iDg)Vo&XTrJY@O1=>oc
zxmmnRXe^YZW$e{(*mZ&%gwi4Q(B<{asMwc)eG$DR5^D9AVQ*Yv?K>7a3!QYaGf5k<
zKt_*|PHGhwFGBqkgJCAS<MK5;fgwTM+V~AYfkrhp;*K6#3Dcr!(=8!(W<|Z2fXaDH
zopeFmqV%F$bTy%7B6Mvd!t(AeGQ>W+PY6O63rew;sKwm`i4i0*L^=0MhKj~6OUGmh
zBWWijZrD>5i!K(5vL{mC06{!uhlGXwqbC{-86Ikl9_LMWM5vU)Hr>P-{Ft!o-~KR3
zetghUU2UafMk_5~)-W<z;#!j-crHk3bXmNzW{5$&Ex}wq=}8kQ>Bn>bXHj21*CG;@
zQT802^VVZ~d0fJ^8$Atme7ACURjuKn^?KNS|A73Smv8bdetMlOtPHcKURlU0?3Fhv
zEGw++?Fbmwbw%4(dje#9^=}jafIU#!Bo{|e^_oR}?5)xvobs`<5)F;>sEtQ&^KTTf
zW*OG!Q~dKBZQy8cPrRoW-(Ry)U(jvvsEbE4jQX@AF5bI`qiW51)Lq%^96!$U@E53A
ahHd#Y_c%xK`f)Vo*T@_@>(^M(ul@zO?-z6c

diff --git a/06_uart_chainloader/demo_payload_rpi4.img b/06_uart_chainloader/demo_payload_rpi4.img
index fa4374e9da72ab704526e41fc7bd02a88c961b57..12bafdc692218bf5b46b41effc30a1b3dcf2cefc 100755
GIT binary patch
delta 815
zcmZ8fOH31C5T5B)SO_h<Tj-W&w+~z-!32U2;NVh1j3h+mB5<)4jFO;ejd~#gFT{&+
z{|pHs;m~V2p$(iNUObtggm~OF9ynr%hbG$fZ~J46lT7CE&3rpE`=9im^xIST`Q7xM
zA7h2qbEn8nu(q+*mkAc4!66>fOryD+PB0(9b_ya);&#@FF!uwnm!7w7fN|(azJt;*
z6oF%4b+J=`H9**@#OW^f{g=1y0PJvGGb(Bv%Dh(IkC*wHDn2GyT@0903wc1R*v(ZA
zSVh2VN7Swav{;ZGoBsT<1gsvw9(P-5Sm~5=ZOj=3woMr&*&FL%%^cf_^V&O*=e)N3
zs)PHO4{`t5JwBTb#Y%pJ-YXYzgIvWxB%j*TxmxnpR}{E(Dv1)elU;z7$uMs{iqp7y
z9-q@wwavfGcOYBs!W8YQJvdFS8p0X+sSe{9^=T2z(74v44RAiI2Cn?&8=+M#jwa=`
z&1m(ccFIVWPhihFN#;t(-teCCNogsR9N_n}!Ada1mB~Hn?vW!!w_L7e|C@wcvfs)(
zlDze{<mmub@yl;dFXTdLR6pu`$A4tEpf)e#U_hi%Kx5hLV%At#%*@R{eqhXH=U?2<
z4jDs6E?jNrn^$C)4#H9VN<YHpAP5e>!2BYv6Y>Awc*Lm}IcCvqUB@Y!*Q4qa(W9L8
z(1vbej`npub~bvAz&?pu{s1cyprUT75UEbcf2+v$Ma+h)B3quDHk;b(7edvtr4adA
nE*oiqPqkFjuSJ|1oiMK7x^a^pM$*mQ0&Eb}8n?YP(USNBfLz24

delta 827
zcmYjPO=uHQ5T2J!+qJaKZj#MzQf#(AX-uJ^7HZIfq$y$*ic$|&Jv6l!@!(0&lZ}Gj
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diff --git a/07_timestamps/Cargo.lock b/07_timestamps/Cargo.lock
index dab65cbb5..a03a0377a 100644
--- a/07_timestamps/Cargo.lock
+++ b/07_timestamps/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.0.0"
+version = "7.0.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "b27f5d071b671f9799dfdf0c0afcec11de65195383d36e186639c83b00705e4f"
+checksum = "5bd95fd055d118f77d4e4d527201b6ceccd13586b19b4dac1270f7081fef0f98"
 dependencies = [
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 ]
diff --git a/08_hw_debug_JTAG/Cargo.lock b/08_hw_debug_JTAG/Cargo.lock
index 2abe1c742..e09d7f932 100644
--- a/08_hw_debug_JTAG/Cargo.lock
+++ b/08_hw_debug_JTAG/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.0.0"
+version = "7.0.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "b27f5d071b671f9799dfdf0c0afcec11de65195383d36e186639c83b00705e4f"
+checksum = "5bd95fd055d118f77d4e4d527201b6ceccd13586b19b4dac1270f7081fef0f98"
 dependencies = [
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 ]
diff --git a/09_privilege_level/Cargo.lock b/09_privilege_level/Cargo.lock
index f65b54307..84e7bc9e2 100644
--- a/09_privilege_level/Cargo.lock
+++ b/09_privilege_level/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.0.0"
+version = "7.0.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "b27f5d071b671f9799dfdf0c0afcec11de65195383d36e186639c83b00705e4f"
+checksum = "5bd95fd055d118f77d4e4d527201b6ceccd13586b19b4dac1270f7081fef0f98"
 dependencies = [
  "tock-registers",
 ]
diff --git a/10_virtual_mem_part1_identity_mapping/Cargo.lock b/10_virtual_mem_part1_identity_mapping/Cargo.lock
index 23fe8e43f..abfcc70f2 100644
--- a/10_virtual_mem_part1_identity_mapping/Cargo.lock
+++ b/10_virtual_mem_part1_identity_mapping/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.0.0"
+version = "7.0.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "b27f5d071b671f9799dfdf0c0afcec11de65195383d36e186639c83b00705e4f"
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 dependencies = [
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 ]
diff --git a/11_exceptions_part1_groundwork/Cargo.lock b/11_exceptions_part1_groundwork/Cargo.lock
index 2c16d5d55..6c3288ea1 100644
--- a/11_exceptions_part1_groundwork/Cargo.lock
+++ b/11_exceptions_part1_groundwork/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.0.0"
+version = "7.0.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "b27f5d071b671f9799dfdf0c0afcec11de65195383d36e186639c83b00705e4f"
+checksum = "5bd95fd055d118f77d4e4d527201b6ceccd13586b19b4dac1270f7081fef0f98"
 dependencies = [
  "tock-registers",
 ]
diff --git a/12_integrated_testing/Cargo.lock b/12_integrated_testing/Cargo.lock
index 7294834df..39f1503e4 100644
--- a/12_integrated_testing/Cargo.lock
+++ b/12_integrated_testing/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.0.0"
+version = "7.0.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "b27f5d071b671f9799dfdf0c0afcec11de65195383d36e186639c83b00705e4f"
+checksum = "5bd95fd055d118f77d4e4d527201b6ceccd13586b19b4dac1270f7081fef0f98"
 dependencies = [
  "tock-registers",
 ]
@@ -24,33 +24,33 @@ dependencies = [
 
 [[package]]
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-version = "1.0.29"
+version = "1.0.36"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "b9f5105d4fdaab20335ca9565e106a5d9b82b6219b5ba735731124ac6711d23d"
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 [[package]]
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 [[package]]
 name = "quote"
-version = "1.0.10"
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-checksum = "38bc8cc6a5f2e3655e0899c1b848643b2562f853f114bfec7be120678e3ace05"
+checksum = "47aa80447ce4daf1717500037052af176af5d38cc3e571d9ec1c7353fc10c87d"
 dependencies = [
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 [[package]]
 name = "syn"
-version = "1.0.80"
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-checksum = "d010a1623fbd906d51d650a9916aaefc05ffa0e4053ff7fe601167f3e715d194"
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 dependencies = [
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diff --git a/13_exceptions_part2_peripheral_IRQs/Cargo.lock b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
index b3514b231..ae9530ef7 100644
--- a/13_exceptions_part2_peripheral_IRQs/Cargo.lock
+++ b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.0.0"
+version = "7.0.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "b27f5d071b671f9799dfdf0c0afcec11de65195383d36e186639c83b00705e4f"
+checksum = "5bd95fd055d118f77d4e4d527201b6ceccd13586b19b4dac1270f7081fef0f98"
 dependencies = [
  "tock-registers",
 ]
@@ -24,33 +24,33 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.29"
+version = "1.0.36"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "b9f5105d4fdaab20335ca9565e106a5d9b82b6219b5ba735731124ac6711d23d"
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 dependencies = [
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 ]
 
 [[package]]
 name = "qemu-exit"
-version = "3.0.0"
+version = "3.0.1"
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-checksum = "0e0fa04276d522a40ed717bf874183a3b2a8bbb3fb4c646b03a7eb874ce5d543"
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 [[package]]
 name = "quote"
-version = "1.0.10"
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 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "38bc8cc6a5f2e3655e0899c1b848643b2562f853f114bfec7be120678e3ace05"
+checksum = "47aa80447ce4daf1717500037052af176af5d38cc3e571d9ec1c7353fc10c87d"
 dependencies = [
  "proc-macro2",
 ]
 
 [[package]]
 name = "syn"
-version = "1.0.80"
+version = "1.0.85"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d010a1623fbd906d51d650a9916aaefc05ffa0e4053ff7fe601167f3e715d194"
+checksum = "a684ac3dcd8913827e18cd09a68384ee66c1de24157e3c556c9ab16d85695fb7"
 dependencies = [
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diff --git a/14_virtual_mem_part2_mmio_remap/Cargo.lock b/14_virtual_mem_part2_mmio_remap/Cargo.lock
index 38d026fdf..acc615941 100644
--- a/14_virtual_mem_part2_mmio_remap/Cargo.lock
+++ b/14_virtual_mem_part2_mmio_remap/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.0.0"
+version = "7.0.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "b27f5d071b671f9799dfdf0c0afcec11de65195383d36e186639c83b00705e4f"
+checksum = "5bd95fd055d118f77d4e4d527201b6ceccd13586b19b4dac1270f7081fef0f98"
 dependencies = [
  "tock-registers",
 ]
@@ -24,33 +24,33 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.29"
+version = "1.0.36"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "b9f5105d4fdaab20335ca9565e106a5d9b82b6219b5ba735731124ac6711d23d"
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 dependencies = [
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 ]
 
 [[package]]
 name = "qemu-exit"
-version = "3.0.0"
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-checksum = "0e0fa04276d522a40ed717bf874183a3b2a8bbb3fb4c646b03a7eb874ce5d543"
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 [[package]]
 name = "quote"
-version = "1.0.10"
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-checksum = "38bc8cc6a5f2e3655e0899c1b848643b2562f853f114bfec7be120678e3ace05"
+checksum = "47aa80447ce4daf1717500037052af176af5d38cc3e571d9ec1c7353fc10c87d"
 dependencies = [
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 ]
 
 [[package]]
 name = "syn"
-version = "1.0.80"
+version = "1.0.85"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d010a1623fbd906d51d650a9916aaefc05ffa0e4053ff7fe601167f3e715d194"
+checksum = "a684ac3dcd8913827e18cd09a68384ee66c1de24157e3c556c9ab16d85695fb7"
 dependencies = [
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diff --git a/15_virtual_mem_part3_precomputed_tables/Cargo.lock b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
index 6c03310ce..231e7643e 100644
--- a/15_virtual_mem_part3_precomputed_tables/Cargo.lock
+++ b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.0.0"
+version = "7.0.1"
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-checksum = "b27f5d071b671f9799dfdf0c0afcec11de65195383d36e186639c83b00705e4f"
+checksum = "5bd95fd055d118f77d4e4d527201b6ceccd13586b19b4dac1270f7081fef0f98"
 dependencies = [
  "tock-registers",
 ]
@@ -24,33 +24,33 @@ dependencies = [
 
 [[package]]
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-version = "1.0.29"
+version = "1.0.36"
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-checksum = "b9f5105d4fdaab20335ca9565e106a5d9b82b6219b5ba735731124ac6711d23d"
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 [[package]]
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-checksum = "0e0fa04276d522a40ed717bf874183a3b2a8bbb3fb4c646b03a7eb874ce5d543"
+checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
 
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 dependencies = [
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 [[package]]
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-checksum = "d010a1623fbd906d51d650a9916aaefc05ffa0e4053ff7fe601167f3e715d194"
+checksum = "a684ac3dcd8913827e18cd09a68384ee66c1de24157e3c556c9ab16d85695fb7"
 dependencies = [
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diff --git a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
index 13d1d9286..dd78c9328 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
+++ b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
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@@ -24,33 +24,33 @@ dependencies = [
 
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diff --git a/X1_JTAG_boot/Cargo.lock b/X1_JTAG_boot/Cargo.lock
index 2abe1c742..e09d7f932 100644
--- a/X1_JTAG_boot/Cargo.lock
+++ b/X1_JTAG_boot/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
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zTMrK(KYUagI&l2R!SzyY{yqOgLnr*6(^vaQdkz%E&YL~q_GD8<ePe)z486fqu@7w8
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K<0SvKN%{wF=xdSy

delta 1316
zcmb7CUuaup6hGg+Ns}}yOWHIw&HrU4xh?H%vpSPflQih&Lg|cuzz3IwScyzVsV{pe
zNg2%g2kGZGY;g~+_~34|Y^Cc%5nRTe6d$x*hXaSVLuS*7ogzw<=6deUEsWuVesK8C
z`Of*y`JLZ6(?fGZGY(TJMhU=We~IpUoOl*rs_5Et5h^5obTjmYC>e+-@jw?j)~kPx
z%SD#X=-<=ZNtg<JDYJDQXg8EH@8S=CDYO(aFX&Rn{R#07Ps$Q+EN}3p@~^Vo0g$NO
zuFD-V&wX2uK<)QYgSaZovtWQL=P*H4mhans{A6MiO9}IFcD=R7k^?wrgt^T02e5J+
z_4nIe=B9!y+vX-$*koJW()&O_w;FJaxoj<I5~OlbCrSaJ)c`LV0cMN{aI>fv?;zl*
zx;$H{$p-=7ITRiRq(gMLw4dfrJW4k(CXd*B;Jd+Y?9Fi`#tvD6967+UmM$(iz}~Tp
zkO6kf@)$Q6W@hUPp>2e3!8BdM9_P<kcKg{l{pAubRu4eUgzxFeh4U6J#@@7g>>FM5
zvz=GhTJU*#!RS1?GqJWXFR;(8eaG+b$g`zC{{`8FClFbbZhXwqRYb2KGbe7Xrr-GK
zw=6N=%M*CsjQPGoCQpuq>Ag=u{2|V-cT0oo%_v)c$jgg6>}YGISRcKr67rU=lxZ6}
zTq`ssR>JMJNTCT<ib(X+*tkM^;X_zSp{~3YQLm3)yIA3~H`M_SLQNqLq$oX&yaRz{
z)rJ^7|F=9V0W9Cezkc*7P}Kn>`zR7!w5i5aA2s=b8cCui89)@28@EMhNz{BKepA_o
z%`=1wNaGd{R5CP)xT7<Esh>(Iz{S*wN3hqekX}^i75x1;aZaoTh*;%`I`z8<L@B-t
zSm8sESh+o=%yYZFpGzKO0sE86JoEM*YZ|$~05FjC@#`{fte4H(Z4qTHcFD)Yf=0g5
zEg_{0RH9U2MdH1<>fW-VFMVx)g;>9HVWSV6vn=_@_iV&D$R!-?ZD%ks?q~$;)q<MS
zV-u&wUiXdXPQ8|o`I=`Q@_(e+$b)*A+u_`&Y8B1n&^%A!?a_2#BaV~9!Oli49DsV(
zG;q7Q9tJCD@wn3JiFPji<*<|J|IIV!Y}5^~FFU-=m+cL!VrQ+cUiWEF!vqaXNwdR>
z&2GD#)^W{a*I=AwCbyTn=we;&7o*>3&i~reZjb$pbY5Zw*9qSdt>7LleJkEQD8s1{
N-{E7=jIx5q_YZ}Pe!l<!

diff --git a/X1_JTAG_boot/jtag_boot_rpi4.img b/X1_JTAG_boot/jtag_boot_rpi4.img
index ec6a26ea174641aeeac6f28af378fef8043da246..109e47ab772629ac4e44215271b48a914b968b63 100755
GIT binary patch
delta 620
zcmZ8dKWGzC82{eAq#mu%^iJ<C4NdNP3E>c{jfz8u1YN{}Xz1XdAt{|4+94ejbvUKq
zBGSiK?4Uyyp$RyYv}>$HL39fK!|meIv@Uj$L?qAG%L&yF9`F4=zTcnkbuyjI@>TME
z{n|$8h-EY9zRKF^dc`|LDjo%P60PuzWZAV_;m2X^RgyW>&F?mV9RoN2ND!=IvKAZq
z5X$DdUwd5tMoCo;<pfu*ZgZ}4Dm8mk&;@{HD5jVPumS`&ee9;#``>(3^ftF~GLqGI
zIRD`^vm!yL(iZN6f_0I^@L?n_Z^f8*9+-|VBF`i;hSMVx5{cv8k>iDXJ-%87I8!j`
zCoW7c3v7b<(KjiZOcFBZ+$f{sp39B07A5RD@6YfCY4%P*cSc}&;6Yw~{jy{Zz{ZZS
z-xYDD*Rz;V?ntvXK2;ntg>RH4r8UkRv41;FE3(j(EgNsB(F?=-Iezie|M(WIz;~Rr
z8o>4rW=p0RA#Q$)7Cw74QEiE{|E`tQB2nHNLi<3~HB^rN99&ZS?G+Uj?Fkay$gFAo
zmKIFc11$FTYq2zUVt)4K!bEA&$DW3H{nDhY_i5r={2B@{3Gn{`4%eD`f{@#|XQZVy
f14pCrvA;9J0q08)+SkD6nk{t<e5akoE79~Hool)z

delta 676
zcmZ9JPiPZC6vp4|Ce7L&(r$D&+i0_CQex0ntd&4T8Z4qHDh-16)P`0xw6?efd+?Br
zco9T84A_f@=H}+4q`i31LOgj3{=wr$M3T^x2T7!4eA%p^K3I0Y+3%b8n>Wqz=J>`<
zviE9s+jFoGqltWg*5Yq0+ea*01e#<K?{%RNE3JE<dX;>LCPXvcC<8qPX8H*RB6_G4
z>igiChL`XyL<up|yW-quTMQSg_;kLxC{)^KpalRMFh4?DoNoew9Y>oZ^!+~Hv;lU$
zv(f&kvj@<XpgyGVST!W*MSUrM7`4~Bh)o+&V)2|{)kQ+<QPCp!Kax5^?P;J2v-+P4
z`5|^;U`)t|+4{g}?m?SxZULO0)5TAmbM+c(9rTY*cYT-&m_KJ~RK)i}YLHfO-&rK=
zc)p6HD0xyi38}b*S%6gQMw_d=Oe*bD(7J*?spnx@diU1Qdtkfn@?Ng^s2vCEF_^4R
zHiT-7<>UmJV3zzy&ft{s9JRP;N!U{=#Mo3oJ1%uNfANWbxa{FB*KU+n%Rn10dub~$
zPvoN-=Km^HW%8k)y?g%d^1h$R$}`ps>cR_!4Qk1m^M<i%=*z2_#q7#$ebLC?zhzA7
zle)VHQM*CK)vBv;LQbt23n%VovMXc8nxj)H`=MMtdB?Tk0G(QLHC~KU|6?wf?x|ry
bzAze$3zEiO2Zyvj9>1GOx<?~yMvMOjJ$%S@


From 4c92421f3a310fad900ed3d269b837da098a4185 Mon Sep 17 00:00:00 2001
From: Max Desiatov <max@desiatov.com>
Date: Mon, 14 Feb 2022 23:56:55 +0000
Subject: [PATCH 109/214] Fix typo in chapter 10 `README.md`

`chacheable` -> `cacheable`
---
 10_virtual_mem_part1_identity_mapping/README.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/10_virtual_mem_part1_identity_mapping/README.md b/10_virtual_mem_part1_identity_mapping/README.md
index 3c41b814c..59537311e 100644
--- a/10_virtual_mem_part1_identity_mapping/README.md
+++ b/10_virtual_mem_part1_identity_mapping/README.md
@@ -72,7 +72,7 @@ This file contains an instance of `KernelVirtualLayout`, which stores the descri
 previously. The `BSP` is the correct place to do this, because it has knowledge of the target
 board's memory map.
 
-The policy is to only describe regions that are **not** ordinary, normal chacheable DRAM. However,
+The policy is to only describe regions that are **not** ordinary, normal cacheable DRAM. However,
 nothing prevents you from defining those too if you wish to. Here is an example for the device MMIO
 region:
 

From 3a84b65d4c80b0414f9b9cded7b1c55c23bb2e1b Mon Sep 17 00:00:00 2001
From: Max Desiatov <max@desiatov.com>
Date: Tue, 15 Feb 2022 00:00:04 +0000
Subject: [PATCH 110/214] Update README.md

---
 10_virtual_mem_part1_identity_mapping/README.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/10_virtual_mem_part1_identity_mapping/README.md b/10_virtual_mem_part1_identity_mapping/README.md
index 59537311e..f553e0e09 100644
--- a/10_virtual_mem_part1_identity_mapping/README.md
+++ b/10_virtual_mem_part1_identity_mapping/README.md
@@ -102,7 +102,7 @@ It will be used by `_arch/aarch64`'s `MMU` code to request attributes for a virt
 translation, which delivers the physical output address (the `usize` in the return-tuple). The
 function scans for a descriptor that contains the queried address, and returns the respective
 findings for the first entry that is a hit. If no entry is found, it returns default attributes for
-normal chacheable DRAM and the input address, hence telling the `MMU` code that the requested
+normal cacheable DRAM and the input address, hence telling the `MMU` code that the requested
 address should be `identity mapped`.
 
 Due to this default behavior, it is not needed to define normal cacheable DRAM regions.

From 85ee27715c7b534fffc7b8ae0959df397ce3ab2b Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Tue, 15 Feb 2022 23:21:37 +0100
Subject: [PATCH 111/214] Fix latest rubocop warnings

---
 common/tests/boot_test.rb      | 3 ++-
 common/tests/exit_code_test.rb | 3 ++-
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/common/tests/boot_test.rb b/common/tests/boot_test.rb
index 401c01831..532efa968 100644
--- a/common/tests/boot_test.rb
+++ b/common/tests/boot_test.rb
@@ -5,6 +5,7 @@
 # Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
 require_relative 'test'
+require 'io/wait'
 require 'timeout'
 
 # Check for an expected string when booting the kernel in QEMU.
@@ -54,7 +55,7 @@ def cleanup
     def run_concrete_test
         qemu_output = []
         Timeout.timeout(MAX_WAIT_SECS) do
-            while IO.select([@qemu_serial])
+            while @qemu_serial.wait_readable
                 qemu_output << @qemu_serial.read_nonblock(1024)
 
                 if expected_string_observed?(qemu_output)
diff --git a/common/tests/exit_code_test.rb b/common/tests/exit_code_test.rb
index 181e624e0..e5c42502c 100644
--- a/common/tests/exit_code_test.rb
+++ b/common/tests/exit_code_test.rb
@@ -6,6 +6,7 @@
 
 require 'English'
 require_relative 'test'
+require 'io/wait'
 
 # A test that only inspects the exit code of the QEMU binary.
 class ExitCodeTest < Test
@@ -37,7 +38,7 @@ def setup
 
     def run_concrete_test
         Timeout.timeout(MAX_WAIT_SECS) do
-            @test_output << @qemu_serial.read_nonblock(1024) while IO.select([@qemu_serial])
+            @test_output << @qemu_serial.read_nonblock(1024) while @qemu_serial.wait_readable
         end
     rescue EOFError
         @qemu_serial.close

From 79c772245ad5527fdac1833ffc162783f6c82b2f Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Tue, 15 Feb 2022 23:26:06 +0100
Subject: [PATCH 112/214] Update ruby actions

---
 .github/workflows/build_rpi3.yml       | 4 +---
 .github/workflows/build_rpi4.yml       | 4 +---
 .github/workflows/sanity.yml           | 4 +---
 .github/workflows/test_integration.yml | 4 +---
 .github/workflows/test_unit.yml        | 4 +---
 .github/workflows/test_xtra.yml        | 4 +---
 .ruby-version                          | 1 +
 7 files changed, 7 insertions(+), 18 deletions(-)
 create mode 100644 .ruby-version

diff --git a/.github/workflows/build_rpi3.yml b/.github/workflows/build_rpi3.yml
index a9e4db3c2..d6dcfa3f5 100644
--- a/.github/workflows/build_rpi3.yml
+++ b/.github/workflows/build_rpi3.yml
@@ -26,9 +26,7 @@ jobs:
     steps:
       - uses: actions/checkout@v2
       - name: Set up Ruby 2.x
-        uses: actions/setup-ruby@v1
-        with:
-          ruby-version: "2.7"
+        uses: ruby/setup-ruby@v1
       - name: Set up Rust nightly
         run: |
           cargo install cargo-binutils
diff --git a/.github/workflows/build_rpi4.yml b/.github/workflows/build_rpi4.yml
index 9f9730dbb..de47cc83d 100644
--- a/.github/workflows/build_rpi4.yml
+++ b/.github/workflows/build_rpi4.yml
@@ -26,9 +26,7 @@ jobs:
     steps:
       - uses: actions/checkout@v2
       - name: Set up Ruby 2.x
-        uses: actions/setup-ruby@v1
-        with:
-          ruby-version: "2.7"
+        uses: ruby/setup-ruby@v1
       - name: Set up Rust nightly
         run: |
           cargo install cargo-binutils
diff --git a/.github/workflows/sanity.yml b/.github/workflows/sanity.yml
index 3bb343092..4f0589928 100644
--- a/.github/workflows/sanity.yml
+++ b/.github/workflows/sanity.yml
@@ -20,9 +20,7 @@ jobs:
         with:
           node-version: "12"
       - name: Set up Ruby 2.x
-        uses: actions/setup-ruby@v1
-        with:
-          ruby-version: "2.7"
+        uses: ruby/setup-ruby@v1
       - name: Set up Rust nightly
         run: |
           rustup component add clippy
diff --git a/.github/workflows/test_integration.yml b/.github/workflows/test_integration.yml
index 4105894b9..8c18c0a0d 100644
--- a/.github/workflows/test_integration.yml
+++ b/.github/workflows/test_integration.yml
@@ -26,9 +26,7 @@ jobs:
     steps:
       - uses: actions/checkout@v2
       - name: Set up Ruby 2.x
-        uses: actions/setup-ruby@v1
-        with:
-          ruby-version: "2.7"
+        uses: ruby/setup-ruby@v1
       - name: Set up Rust nightly
         run: |
           cargo install cargo-binutils
diff --git a/.github/workflows/test_unit.yml b/.github/workflows/test_unit.yml
index 48c1a758f..624cf16d1 100644
--- a/.github/workflows/test_unit.yml
+++ b/.github/workflows/test_unit.yml
@@ -26,9 +26,7 @@ jobs:
     steps:
       - uses: actions/checkout@v2
       - name: Set up Ruby 2.x
-        uses: actions/setup-ruby@v1
-        with:
-          ruby-version: "2.7"
+        uses: ruby/setup-ruby@v1
       - name: Set up Rust nightly
         run: |
           cargo install cargo-binutils
diff --git a/.github/workflows/test_xtra.yml b/.github/workflows/test_xtra.yml
index 8a7287a81..97fa20817 100644
--- a/.github/workflows/test_xtra.yml
+++ b/.github/workflows/test_xtra.yml
@@ -26,9 +26,7 @@ jobs:
     steps:
       - uses: actions/checkout@v2
       - name: Set up Ruby 2.x
-        uses: actions/setup-ruby@v1
-        with:
-          ruby-version: "2.7"
+        uses: ruby/setup-ruby@v1
       - name: Set up Rust nightly
         run: |
           cargo install cargo-binutils
diff --git a/.ruby-version b/.ruby-version
new file mode 100644
index 000000000..1effb0034
--- /dev/null
+++ b/.ruby-version
@@ -0,0 +1 @@
+2.7

From 97ff6f100cd19a6120a1a5839850a662169cc3f7 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Fri, 11 Mar 2022 22:45:14 +0100
Subject: [PATCH 113/214] Minor dependency upgrade

---
 02_runtime_init/Cargo.lock                    |   4 ++--
 03_hacky_hello_world/Cargo.lock               |   4 ++--
 04_safe_globals/Cargo.lock                    |   4 ++--
 05_drivers_gpio_uart/Cargo.lock               |   4 ++--
 06_uart_chainloader/Cargo.lock                |   4 ++--
 06_uart_chainloader/demo_payload_rpi3.img     | Bin 6664 -> 6664 bytes
 06_uart_chainloader/demo_payload_rpi4.img     | Bin 6512 -> 6512 bytes
 07_timestamps/Cargo.lock                      |   4 ++--
 08_hw_debug_JTAG/Cargo.lock                   |   4 ++--
 09_privilege_level/Cargo.lock                 |   4 ++--
 .../Cargo.lock                                |   4 ++--
 11_exceptions_part1_groundwork/Cargo.lock     |   4 ++--
 12_integrated_testing/Cargo.lock              |  12 ++++++------
 .../Cargo.lock                                |  12 ++++++------
 14_virtual_mem_part2_mmio_remap/Cargo.lock    |  12 ++++++------
 .../Cargo.lock                                |  12 ++++++------
 .../Cargo.lock                                |  12 ++++++------
 X1_JTAG_boot/Cargo.lock                       |   4 ++--
 X1_JTAG_boot/jtag_boot_rpi3.img               | Bin 7816 -> 7808 bytes
 X1_JTAG_boot/jtag_boot_rpi4.img               | Bin 6520 -> 6528 bytes
 20 files changed, 52 insertions(+), 52 deletions(-)

diff --git a/02_runtime_init/Cargo.lock b/02_runtime_init/Cargo.lock
index 0eafa2a5b..459f38054 100644
--- a/02_runtime_init/Cargo.lock
+++ b/02_runtime_init/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.0.1"
+version = "7.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "5bd95fd055d118f77d4e4d527201b6ceccd13586b19b4dac1270f7081fef0f98"
+checksum = "6d45e46ff04ebb97b52e628261821faba10e190a82130c1467f0a50c21f8b075"
 dependencies = [
  "tock-registers",
 ]
diff --git a/03_hacky_hello_world/Cargo.lock b/03_hacky_hello_world/Cargo.lock
index 7f24b65ae..89e08fdbb 100644
--- a/03_hacky_hello_world/Cargo.lock
+++ b/03_hacky_hello_world/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.0.1"
+version = "7.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "5bd95fd055d118f77d4e4d527201b6ceccd13586b19b4dac1270f7081fef0f98"
+checksum = "6d45e46ff04ebb97b52e628261821faba10e190a82130c1467f0a50c21f8b075"
 dependencies = [
  "tock-registers",
 ]
diff --git a/04_safe_globals/Cargo.lock b/04_safe_globals/Cargo.lock
index d9a502e1f..ad6d3d3f4 100644
--- a/04_safe_globals/Cargo.lock
+++ b/04_safe_globals/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.0.1"
+version = "7.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "5bd95fd055d118f77d4e4d527201b6ceccd13586b19b4dac1270f7081fef0f98"
+checksum = "6d45e46ff04ebb97b52e628261821faba10e190a82130c1467f0a50c21f8b075"
 dependencies = [
  "tock-registers",
 ]
diff --git a/05_drivers_gpio_uart/Cargo.lock b/05_drivers_gpio_uart/Cargo.lock
index 926733bcf..f99b9384f 100644
--- a/05_drivers_gpio_uart/Cargo.lock
+++ b/05_drivers_gpio_uart/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.0.1"
+version = "7.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "5bd95fd055d118f77d4e4d527201b6ceccd13586b19b4dac1270f7081fef0f98"
+checksum = "6d45e46ff04ebb97b52e628261821faba10e190a82130c1467f0a50c21f8b075"
 dependencies = [
  "tock-registers",
 ]
diff --git a/06_uart_chainloader/Cargo.lock b/06_uart_chainloader/Cargo.lock
index 5b7f9177f..8894ec378 100644
--- a/06_uart_chainloader/Cargo.lock
+++ b/06_uart_chainloader/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.0.1"
+version = "7.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "5bd95fd055d118f77d4e4d527201b6ceccd13586b19b4dac1270f7081fef0f98"
+checksum = "6d45e46ff04ebb97b52e628261821faba10e190a82130c1467f0a50c21f8b075"
 dependencies = [
  "tock-registers",
 ]
diff --git a/06_uart_chainloader/demo_payload_rpi3.img b/06_uart_chainloader/demo_payload_rpi3.img
index 011abf13cec01da79d5c41cc3837dd91cd2b70a7..800ae2132d4aaf9745d5e39fe7fa3e8986e34362 100755
GIT binary patch
delta 1176
zcmZ8fU1$?o6h1SPKZ~UKpTyca)7VL)So~?Ms1Kn9|3EB#*zK+gRS_%xRJzNePi+-3
zJ~`K0P}B#jf=oq>)Phf9s~{`;u*F3miZH1@OrnS=D&u0tb0=3&58UM5?|k>W-<)#_
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delta 1201
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diff --git a/06_uart_chainloader/demo_payload_rpi4.img b/06_uart_chainloader/demo_payload_rpi4.img
index 12bafdc692218bf5b46b41effc30a1b3dcf2cefc..03c84dda9f54a735da2366496f485dd49dc7d074 100755
GIT binary patch
delta 1225
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delta 1226
zcmZ8gU1$_n6h3!mvre?`-y}N|lel-X$;K@hqb8({FYAi5Dq;wTNf$Bk2OF?i8MXC6
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diff --git a/07_timestamps/Cargo.lock b/07_timestamps/Cargo.lock
index a03a0377a..419159f0b 100644
--- a/07_timestamps/Cargo.lock
+++ b/07_timestamps/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.0.1"
+version = "7.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "5bd95fd055d118f77d4e4d527201b6ceccd13586b19b4dac1270f7081fef0f98"
+checksum = "6d45e46ff04ebb97b52e628261821faba10e190a82130c1467f0a50c21f8b075"
 dependencies = [
  "tock-registers",
 ]
diff --git a/08_hw_debug_JTAG/Cargo.lock b/08_hw_debug_JTAG/Cargo.lock
index e09d7f932..2cbbc3f45 100644
--- a/08_hw_debug_JTAG/Cargo.lock
+++ b/08_hw_debug_JTAG/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.0.1"
+version = "7.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "5bd95fd055d118f77d4e4d527201b6ceccd13586b19b4dac1270f7081fef0f98"
+checksum = "6d45e46ff04ebb97b52e628261821faba10e190a82130c1467f0a50c21f8b075"
 dependencies = [
  "tock-registers",
 ]
diff --git a/09_privilege_level/Cargo.lock b/09_privilege_level/Cargo.lock
index 84e7bc9e2..c10e07852 100644
--- a/09_privilege_level/Cargo.lock
+++ b/09_privilege_level/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.0.1"
+version = "7.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "5bd95fd055d118f77d4e4d527201b6ceccd13586b19b4dac1270f7081fef0f98"
+checksum = "6d45e46ff04ebb97b52e628261821faba10e190a82130c1467f0a50c21f8b075"
 dependencies = [
  "tock-registers",
 ]
diff --git a/10_virtual_mem_part1_identity_mapping/Cargo.lock b/10_virtual_mem_part1_identity_mapping/Cargo.lock
index abfcc70f2..022eb1244 100644
--- a/10_virtual_mem_part1_identity_mapping/Cargo.lock
+++ b/10_virtual_mem_part1_identity_mapping/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.0.1"
+version = "7.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "5bd95fd055d118f77d4e4d527201b6ceccd13586b19b4dac1270f7081fef0f98"
+checksum = "6d45e46ff04ebb97b52e628261821faba10e190a82130c1467f0a50c21f8b075"
 dependencies = [
  "tock-registers",
 ]
diff --git a/11_exceptions_part1_groundwork/Cargo.lock b/11_exceptions_part1_groundwork/Cargo.lock
index 6c3288ea1..a00db8e4c 100644
--- a/11_exceptions_part1_groundwork/Cargo.lock
+++ b/11_exceptions_part1_groundwork/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.0.1"
+version = "7.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "5bd95fd055d118f77d4e4d527201b6ceccd13586b19b4dac1270f7081fef0f98"
+checksum = "6d45e46ff04ebb97b52e628261821faba10e190a82130c1467f0a50c21f8b075"
 dependencies = [
  "tock-registers",
 ]
diff --git a/12_integrated_testing/Cargo.lock b/12_integrated_testing/Cargo.lock
index 39f1503e4..eac8bcd71 100644
--- a/12_integrated_testing/Cargo.lock
+++ b/12_integrated_testing/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.0.1"
+version = "7.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "5bd95fd055d118f77d4e4d527201b6ceccd13586b19b4dac1270f7081fef0f98"
+checksum = "6d45e46ff04ebb97b52e628261821faba10e190a82130c1467f0a50c21f8b075"
 dependencies = [
  "tock-registers",
 ]
@@ -39,18 +39,18 @@ checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
 
 [[package]]
 name = "quote"
-version = "1.0.14"
+version = "1.0.15"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "47aa80447ce4daf1717500037052af176af5d38cc3e571d9ec1c7353fc10c87d"
+checksum = "864d3e96a899863136fc6e99f3d7cae289dafe43bf2c5ac19b70df7210c0a145"
 dependencies = [
  "proc-macro2",
 ]
 
 [[package]]
 name = "syn"
-version = "1.0.85"
+version = "1.0.86"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "a684ac3dcd8913827e18cd09a68384ee66c1de24157e3c556c9ab16d85695fb7"
+checksum = "8a65b3f4ffa0092e9887669db0eae07941f023991ab58ea44da8fe8e2d511c6b"
 dependencies = [
  "proc-macro2",
  "quote",
diff --git a/13_exceptions_part2_peripheral_IRQs/Cargo.lock b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
index ae9530ef7..898e14bcd 100644
--- a/13_exceptions_part2_peripheral_IRQs/Cargo.lock
+++ b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.0.1"
+version = "7.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "5bd95fd055d118f77d4e4d527201b6ceccd13586b19b4dac1270f7081fef0f98"
+checksum = "6d45e46ff04ebb97b52e628261821faba10e190a82130c1467f0a50c21f8b075"
 dependencies = [
  "tock-registers",
 ]
@@ -39,18 +39,18 @@ checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
 
 [[package]]
 name = "quote"
-version = "1.0.14"
+version = "1.0.15"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "47aa80447ce4daf1717500037052af176af5d38cc3e571d9ec1c7353fc10c87d"
+checksum = "864d3e96a899863136fc6e99f3d7cae289dafe43bf2c5ac19b70df7210c0a145"
 dependencies = [
  "proc-macro2",
 ]
 
 [[package]]
 name = "syn"
-version = "1.0.85"
+version = "1.0.86"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "a684ac3dcd8913827e18cd09a68384ee66c1de24157e3c556c9ab16d85695fb7"
+checksum = "8a65b3f4ffa0092e9887669db0eae07941f023991ab58ea44da8fe8e2d511c6b"
 dependencies = [
  "proc-macro2",
  "quote",
diff --git a/14_virtual_mem_part2_mmio_remap/Cargo.lock b/14_virtual_mem_part2_mmio_remap/Cargo.lock
index acc615941..4cc5a514d 100644
--- a/14_virtual_mem_part2_mmio_remap/Cargo.lock
+++ b/14_virtual_mem_part2_mmio_remap/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.0.1"
+version = "7.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "5bd95fd055d118f77d4e4d527201b6ceccd13586b19b4dac1270f7081fef0f98"
+checksum = "6d45e46ff04ebb97b52e628261821faba10e190a82130c1467f0a50c21f8b075"
 dependencies = [
  "tock-registers",
 ]
@@ -39,18 +39,18 @@ checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
 
 [[package]]
 name = "quote"
-version = "1.0.14"
+version = "1.0.15"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "47aa80447ce4daf1717500037052af176af5d38cc3e571d9ec1c7353fc10c87d"
+checksum = "864d3e96a899863136fc6e99f3d7cae289dafe43bf2c5ac19b70df7210c0a145"
 dependencies = [
  "proc-macro2",
 ]
 
 [[package]]
 name = "syn"
-version = "1.0.85"
+version = "1.0.86"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "a684ac3dcd8913827e18cd09a68384ee66c1de24157e3c556c9ab16d85695fb7"
+checksum = "8a65b3f4ffa0092e9887669db0eae07941f023991ab58ea44da8fe8e2d511c6b"
 dependencies = [
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  "quote",
diff --git a/15_virtual_mem_part3_precomputed_tables/Cargo.lock b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
index 231e7643e..b393d6dc7 100644
--- a/15_virtual_mem_part3_precomputed_tables/Cargo.lock
+++ b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.0.1"
+version = "7.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "5bd95fd055d118f77d4e4d527201b6ceccd13586b19b4dac1270f7081fef0f98"
+checksum = "6d45e46ff04ebb97b52e628261821faba10e190a82130c1467f0a50c21f8b075"
 dependencies = [
  "tock-registers",
 ]
@@ -39,18 +39,18 @@ checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
 
 [[package]]
 name = "quote"
-version = "1.0.14"
+version = "1.0.15"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "47aa80447ce4daf1717500037052af176af5d38cc3e571d9ec1c7353fc10c87d"
+checksum = "864d3e96a899863136fc6e99f3d7cae289dafe43bf2c5ac19b70df7210c0a145"
 dependencies = [
  "proc-macro2",
 ]
 
 [[package]]
 name = "syn"
-version = "1.0.85"
+version = "1.0.86"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "a684ac3dcd8913827e18cd09a68384ee66c1de24157e3c556c9ab16d85695fb7"
+checksum = "8a65b3f4ffa0092e9887669db0eae07941f023991ab58ea44da8fe8e2d511c6b"
 dependencies = [
  "proc-macro2",
  "quote",
diff --git a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
index dd78c9328..8310ec059 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
+++ b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.0.1"
+version = "7.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "5bd95fd055d118f77d4e4d527201b6ceccd13586b19b4dac1270f7081fef0f98"
+checksum = "6d45e46ff04ebb97b52e628261821faba10e190a82130c1467f0a50c21f8b075"
 dependencies = [
  "tock-registers",
 ]
@@ -39,18 +39,18 @@ checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
 
 [[package]]
 name = "quote"
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 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "47aa80447ce4daf1717500037052af176af5d38cc3e571d9ec1c7353fc10c87d"
+checksum = "864d3e96a899863136fc6e99f3d7cae289dafe43bf2c5ac19b70df7210c0a145"
 dependencies = [
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 ]
 
 [[package]]
 name = "syn"
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 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "a684ac3dcd8913827e18cd09a68384ee66c1de24157e3c556c9ab16d85695fb7"
+checksum = "8a65b3f4ffa0092e9887669db0eae07941f023991ab58ea44da8fe8e2d511c6b"
 dependencies = [
  "proc-macro2",
  "quote",
diff --git a/X1_JTAG_boot/Cargo.lock b/X1_JTAG_boot/Cargo.lock
index e09d7f932..2cbbc3f45 100644
--- a/X1_JTAG_boot/Cargo.lock
+++ b/X1_JTAG_boot/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.0.1"
+version = "7.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "5bd95fd055d118f77d4e4d527201b6ceccd13586b19b4dac1270f7081fef0f98"
+checksum = "6d45e46ff04ebb97b52e628261821faba10e190a82130c1467f0a50c21f8b075"
 dependencies = [
  "tock-registers",
 ]
diff --git a/X1_JTAG_boot/jtag_boot_rpi3.img b/X1_JTAG_boot/jtag_boot_rpi3.img
index e705a98fcfc3fd98f078d8af8bf5179553ac787b..752daff808a7e211ccd731e16780a081ca9ffbea 100755
GIT binary patch
delta 975
zcmZuvZAep57=G`)o13$2-hKFSH@!CVBbesb+ziDO)R360BJj@~OIi>TQWQmP5s1~F
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zs;MY;=+Dx=Cj3ahX(}?Hoq0w`H9$HaAUtsA<rDpLJYIBL$2(9rv?70^6&J85m~k%)
zT7r0>3V95Ted$16SG?9_Y!2i>JU9jMUP+2*VcHXT4DlYamvcd~&$w6S5{!3EV(1T<
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zY%o+zWVEp)lOJ2kNX1#L&5-`#)(F!C4;pwqNqEVej9+KRwg~sS?<`(r?S(N?mwlTc
ze$8fZhV{}(C-xew^sPO7*U(vb;{f2A4Deu!@$e;|lSoquq7AaLvhI*CuoYAb8>@i&
zh?YcJYLV@w$s`trL6#yq$dk6AB*E1Ekpf|g3VC4Ih2*CanF=DMA|~$_-<vN|Y;8H|
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zrJ!WknnN8@U@TefWa5D3Jig8u=yfZ8$W`}i6^2I?oNi!bY;@!bf7Lg7+279V_PyG#
Vw<-92kGgx#@O^`)-8fLr{|1~c9Q6PI

delta 960
zcmZuuUr19?82|3Q+uYPlw>vkzyK{5qpNA<rx6qhOja)=5W>G|-P!H=RWc3!YK_Esi
zI~-||5PONbgRoeF3(8qfL6Jg91l3g{oDUHZ!Vq^m=k7*AeQ>zv`+dLj-QV~7lEIl^
zs>u`@L=3<qcL=ox*aP~<XP0!m+mE`2U1+o8xg=LHlFR`*hrRlftlOWvuD`3NUr&u$
z&n)9W{W!}U#5e1|Sy#>I`#dKVd!S?jNFBTOaIXFZo^H5Wo#{m*lYQvC%ZF>ss6*k{
z)v^ytzamvqhoYpR3ZBeDGD=_ZU+>2^$^W|C7Oe2zx&cx*!tLnHEyxEHJZPO@hkNjx
zRb)+N{M0&BXV^pFC?Sf^H110*cOxaClVlH|qKA`=q_vTZwVBXM8!rK^?JDU)N$CfI
zv*d8(0F@c?5}Dm-op2V*O4<dkcjd^E`u>J48MXMwN-;wy-)ZH2F$3fiMAi!7QHilT
zkbgt&6iXyXQjRP?C~y;N#<q~O!7*8xGiKL0Q#M~#YyhFsy<Pf+6vHH=knBa2D|0P`
z(~_lk)u%&Hq8!K!pc3_pfdw@$44~N^B`pIid?2_RV3vwi2W5I|5t)crli^<Mv9t%t
zcD9JGa+N_M`%bwt{YV}KvSXbTCf;v#=q2iZ*Se1w$4W&HBNaJDHSfy~p0=DO%l>Tf
zu}lD4_#wLUao*c-nE03h@K3n7_lly}>=^O9?eD(PI_c4>8JT<Cc!4p8MIviYY&&uz
z_G!jEs^LVP8euW_vFXVFaNH-f<FF{=PojmL67Wy4oy`ci+39R52$kmhwI*-1oWZYb
zE!8X35fU<w<3e|5%vni)Xrw7Ew>v8M$mns`*omVNJR_cR#V=mE(jC7{pD$|lTAGkB
zljFtD1i>t8l|~f@*mmG8!O7Z1T<vJqQ4qH|`h)Zm(#9owQsdw8D<ZTq{IRVMGtKjO
H(&_pQhwU4@

diff --git a/X1_JTAG_boot/jtag_boot_rpi4.img b/X1_JTAG_boot/jtag_boot_rpi4.img
index 109e47ab772629ac4e44215271b48a914b968b63..3119ef8deffdf4e0bbe6e97c52e6b82d22032b99 100755
GIT binary patch
delta 812
zcmZ8eO-K}R6o3DjT^+yJb=I8^H+5!ZlPy{!EdnDKJ=h14Y=@)`bn&8xJgk8b)b2*m
zC1U^n15bgSVm1V2wL^z8^w3EVGK4O(o>mWDy0~FGz4<sq4~F-C@8kdby*DS9@&m;Q
zF6~=;Q1*q1PUD3Tt@eF3%tm6EJkU*!Mg8|UqL&x^ul-V?lg9ac>Szn-dB~?;;e@Vr
zmLn}Iz9;~!!n#Ze$)`5?$sZ=)Q>x%+#{$-bHMSGz9y;JjN$@4{b)j@%Su#Mfwo|uc
zYm4mG2cWiXSxZ90^OUgtC95^S`XQ=l1}NUn0OQ3c9O+^?F-|@(Lwq3?&d@mOsP^#&
zQWOQEv*D1M%hj!=<=@sIN-9FWi*o2kAVPWc(`JNLP=5w_G|;|VJhxjPf|}bKqXo<Z
zfei;Q$7uT0S~3APo;m&S#-4Gwbk%;Z!-+F0ZPJ07jbH#tvirgC^(N$sW3JlgGpgPW
zx4!lu_8T`)^HDD`tQ=<?@`N7t@&>_vJ+D!76zKa?RtmD_cQM+A*_DdU#@Z8HCCV1s
zFI;Q2mjk#wsquRj9?<;bF5)iWEt~9imxUf$L4qTkv4xkHLsLXdDk%CNJC>Ok{wa)%
z-qFU!Z{B5ZJ0i{B0&dTKfQeEfGNrokB<%Vb4{MUZekn0-Mq-_6Ki-+8rE~1565>pW
zEh=ZZpv*og-ReczoeOxh!yYC~S01)yXXhR#vh#LrRc4D)Vtn7LOJ4u6hmpat`RsK6
zqs;7_Hw8g&r53OL5<T7y(wdgAQ>;}UykZAey+-_XjtzMj&+pj(w@E52D}Q7Ys`eK-
C65IO#

delta 787
zcmZ9JO=uHQ5Xa~3Chd|ciP>g1X|QaP#t_6*`hj4<#^&Hh6-!j86>LK2p`u07gCasx
zDF`Z(#}s-Jdh8YgmROIiS`UH;DO5zfq=J~lOTD#4vraZ!sLti>|NY<0{AM=Sz1@``
z7JiCLBSo7h5aQ8knU^Cgda0S|B@y^>5rg*2LLgMUYky`}-gNM&m`hgIfFFfi@+oBm
zQXNHqOTpG80lbh3Sar7F0Eq8=sTt}wku6HLI8~Ase;9^ph{AfU4|V_`52-LO0n7q}
zWmD(E{KIc!j_#J}?VLuQ2HFOd%}dP3MSxcG`!qV-!BZ8(*ov<A6Rb@y6R3lpoo9a1
zcKs}&RYOcSrUbnrGF}OZIwL>u+RsY~;OZZ|=|;zNm>;Cu0y~V&a!g?DctSol`k-da
z%>(p~YT_q@n1@K$IZVcRjSG}AkTZGmnRpxDqy{4<ueM>VvGrOv>|7x&H9bs9?^d%~
z6TGYtV3mLem-;c`x-X<dxax|sKCHNA+?zojCE#*I)Xn(<A)Gqo>vq;Tc8#8Y`lbT)
zJy72u-&_O!Yd>2@7(Y5a#d$f!-0!_qYG14<==OZY=dFInjNGthWo%Po{$XE3Zh0DK
z%F<p%!Y694kW=uj8oRKdG;GBxx?*YCh8dIDOy}+N_(Uu_Y3h>Yw^;roI%(N(UDIM1
z_x5y2YNH^HV@8Xm=|7qA{{#nAT=c%elzJ7vE3$CUi@VB^z6EPer<LUx9Lr9O-O}!)
oC&n`;HOF3+J^!=yp1NR02@Bg^e5`az1Br{;nW1x+@R~337gf00AOHXW


From 819f62d51b8b59e1718bdce36ca0660b7ababbea Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 14 Mar 2022 21:57:58 +0100
Subject: [PATCH 114/214] Refactor tests for more synergy

---
 .rubocop.yml                                  |  3 +
 06_uart_chainloader/README.md                 | 70 ++++++++---------
 06_uart_chainloader/tests/chainboot_test.rb   | 68 ++++++++--------
 07_timestamps/README.md                       | 70 ++++++++---------
 12_integrated_testing/README.md               | 48 +++++-------
 .../tests/00_console_sanity.rb                | 25 ++----
 .../tests/00_console_sanity.rb                | 25 ++----
 .../tests/00_console_sanity.rb                | 25 ++----
 .../tests/00_console_sanity.rb                | 25 ++----
 .../tests/00_console_sanity.rb                | 25 ++----
 common/tests/boot_test.rb                     | 72 ++++-------------
 common/tests/console_io_test.rb               | 77 ++++++++++++++++++-
 common/tests/exit_code_test.rb                | 16 ++--
 common/tests/test.rb                          |  4 +-
 14 files changed, 261 insertions(+), 292 deletions(-)

diff --git a/.rubocop.yml b/.rubocop.yml
index 2fd609ed8..b0f756acf 100644
--- a/.rubocop.yml
+++ b/.rubocop.yml
@@ -16,6 +16,9 @@ Layout/IndentationWidth:
 Layout/LineLength:
   Max: 100
 
+Lint/UnusedMethodArgument:
+  AutoCorrect: False
+
 Metrics/AbcSize:
   Max: 25
 
diff --git a/06_uart_chainloader/README.md b/06_uart_chainloader/README.md
index fd2d84cd8..66ba5ce73 100644
--- a/06_uart_chainloader/README.md
+++ b/06_uart_chainloader/README.md
@@ -550,7 +550,7 @@ diff -uNr 05_drivers_gpio_uart/tests/boot_test_string.rb 06_uart_chainloader/tes
 diff -uNr 05_drivers_gpio_uart/tests/chainboot_test.rb 06_uart_chainloader/tests/chainboot_test.rb
 --- 05_drivers_gpio_uart/tests/chainboot_test.rb
 +++ 06_uart_chainloader/tests/chainboot_test.rb
-@@ -0,0 +1,80 @@
+@@ -0,0 +1,78 @@
 +# frozen_string_literal: true
 +
 +# SPDX-License-Identifier: MIT OR Apache-2.0
@@ -564,11 +564,33 @@ diff -uNr 05_drivers_gpio_uart/tests/chainboot_test.rb 06_uart_chainloader/tests
 +# Match for the last print that 'demo_payload_rpiX.img' produces.
 +EXPECTED_PRINT = 'Echoing input now'
 +
++# Wait for request to power the target.
++class PowerTargetRequestTest < SubtestBase
++    MINIPUSH_POWER_TARGET_REQUEST = 'Please power the target now'
++
++    def initialize(qemu_cmd, pty_main)
++        super()
++        @qemu_cmd = qemu_cmd
++        @pty_main = pty_main
++    end
++
++    def name
++        'Waiting for request to power target'
++    end
++
++    def run(qemu_out, _qemu_in)
++        expect_or_raise(qemu_out, MINIPUSH_POWER_TARGET_REQUEST)
++
++        # Now is the time to start QEMU with the chainloader binary. QEMU's virtual tty connects to
++        # the MiniPush instance spawned on pty_main, so that the two processes talk to each other.
++        Process.spawn(@qemu_cmd, in: @pty_main, out: @pty_main, err: '/dev/null')
++    end
++end
++
 +# Extend BootTest so that it listens on the output of a MiniPush instance, which is itself connected
 +# to a QEMU instance instead of a real HW.
 +class ChainbootTest < BootTest
 +    MINIPUSH = '../common/serial/minipush.rb'
-+    MINIPUSH_POWER_TARGET_REQUEST = 'Please power the target now'
 +
 +    def initialize(qemu_cmd, payload_path)
 +        super(qemu_cmd, EXPECTED_PRINT)
@@ -581,46 +603,22 @@ diff -uNr 05_drivers_gpio_uart/tests/chainboot_test.rb 06_uart_chainloader/tests
 +    private
 +
 +    # override
-+    def post_process_and_add_output(output)
-+        temp = output.join.split("\r\n")
-+
-+        # Should a line have solo carriage returns, remove any overridden parts of the string.
-+        temp.map! { |x| x.gsub(/.*\r/, '') }
-+
-+        @test_output += temp
-+    end
-+
-+    def wait_for_minipush_power_request(mp_out)
-+        output = []
-+        Timeout.timeout(MAX_WAIT_SECS) do
-+            loop do
-+                output << mp_out.gets
-+                break if output.last.include?(MINIPUSH_POWER_TARGET_REQUEST)
-+            end
-+        end
-+    rescue Timeout::Error
-+        @test_error = 'Timed out waiting for power request'
-+    rescue StandardError => e
-+        @test_error = e.message
-+    ensure
-+        post_process_and_add_output(output)
-+    end
-+
-+    # override
 +    def setup
 +        pty_main, pty_secondary = PTY.open
 +        mp_out, _mp_in = PTY.spawn("ruby #{MINIPUSH} #{pty_secondary.path} #{@payload_path}")
 +
-+        # Wait until MiniPush asks for powering the target.
-+        wait_for_minipush_power_request(mp_out)
++        # The subtests (from this class and the parents) listen on @qemu_out_wrapped. Hence, point
++        # it to MiniPush's output.
++        @qemu_out_wrapped = PTYLoggerWrapper.new(mp_out, "\r\n")
 +
-+        # Now is the time to start QEMU with the chainloader binary. QEMU's virtual tty is connected
-+        # to the MiniPush instance spawned above, so that the two processes talk to each other.
-+        Process.spawn(@qemu_cmd, in: pty_main, out: pty_main)
++        # Important: Run this subtest before the one in the parent class.
++        @console_subtests.prepend(PowerTargetRequestTest.new(@qemu_cmd, pty_main))
++    end
 +
-+        # The remainder of the test is done by the parent class' run_concrete_test, which listens on
-+        # @qemu_serial. Hence, point it to MiniPush's output.
-+        @qemu_serial = mp_out
++    # override
++    def finish
++        super()
++        @test_output.map! { |x| x.gsub(/.*\r/, '  ') }
 +    end
 +end
 +
diff --git a/06_uart_chainloader/tests/chainboot_test.rb b/06_uart_chainloader/tests/chainboot_test.rb
index 0da2d82d5..560997404 100644
--- a/06_uart_chainloader/tests/chainboot_test.rb
+++ b/06_uart_chainloader/tests/chainboot_test.rb
@@ -11,11 +11,33 @@
 # Match for the last print that 'demo_payload_rpiX.img' produces.
 EXPECTED_PRINT = 'Echoing input now'
 
+# Wait for request to power the target.
+class PowerTargetRequestTest < SubtestBase
+    MINIPUSH_POWER_TARGET_REQUEST = 'Please power the target now'
+
+    def initialize(qemu_cmd, pty_main)
+        super()
+        @qemu_cmd = qemu_cmd
+        @pty_main = pty_main
+    end
+
+    def name
+        'Waiting for request to power target'
+    end
+
+    def run(qemu_out, _qemu_in)
+        expect_or_raise(qemu_out, MINIPUSH_POWER_TARGET_REQUEST)
+
+        # Now is the time to start QEMU with the chainloader binary. QEMU's virtual tty connects to
+        # the MiniPush instance spawned on pty_main, so that the two processes talk to each other.
+        Process.spawn(@qemu_cmd, in: @pty_main, out: @pty_main, err: '/dev/null')
+    end
+end
+
 # Extend BootTest so that it listens on the output of a MiniPush instance, which is itself connected
 # to a QEMU instance instead of a real HW.
 class ChainbootTest < BootTest
     MINIPUSH = '../common/serial/minipush.rb'
-    MINIPUSH_POWER_TARGET_REQUEST = 'Please power the target now'
 
     def initialize(qemu_cmd, payload_path)
         super(qemu_cmd, EXPECTED_PRINT)
@@ -27,47 +49,23 @@ def initialize(qemu_cmd, payload_path)
 
     private
 
-    # override
-    def post_process_and_add_output(output)
-        temp = output.join.split("\r\n")
-
-        # Should a line have solo carriage returns, remove any overridden parts of the string.
-        temp.map! { |x| x.gsub(/.*\r/, '') }
-
-        @test_output += temp
-    end
-
-    def wait_for_minipush_power_request(mp_out)
-        output = []
-        Timeout.timeout(MAX_WAIT_SECS) do
-            loop do
-                output << mp_out.gets
-                break if output.last.include?(MINIPUSH_POWER_TARGET_REQUEST)
-            end
-        end
-    rescue Timeout::Error
-        @test_error = 'Timed out waiting for power request'
-    rescue StandardError => e
-        @test_error = e.message
-    ensure
-        post_process_and_add_output(output)
-    end
-
     # override
     def setup
         pty_main, pty_secondary = PTY.open
         mp_out, _mp_in = PTY.spawn("ruby #{MINIPUSH} #{pty_secondary.path} #{@payload_path}")
 
-        # Wait until MiniPush asks for powering the target.
-        wait_for_minipush_power_request(mp_out)
+        # The subtests (from this class and the parents) listen on @qemu_out_wrapped. Hence, point
+        # it to MiniPush's output.
+        @qemu_out_wrapped = PTYLoggerWrapper.new(mp_out, "\r\n")
 
-        # Now is the time to start QEMU with the chainloader binary. QEMU's virtual tty is connected
-        # to the MiniPush instance spawned above, so that the two processes talk to each other.
-        Process.spawn(@qemu_cmd, in: pty_main, out: pty_main)
+        # Important: Run this subtest before the one in the parent class.
+        @console_subtests.prepend(PowerTargetRequestTest.new(@qemu_cmd, pty_main))
+    end
 
-        # The remainder of the test is done by the parent class' run_concrete_test, which listens on
-        # @qemu_serial. Hence, point it to MiniPush's output.
-        @qemu_serial = mp_out
+    # override
+    def finish
+        super()
+        @test_output.map! { |x| x.gsub(/.*\r/, '  ') }
     end
 end
 
diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index 42bd87f96..3e1100300 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -759,7 +759,7 @@ diff -uNr 06_uart_chainloader/tests/boot_test_string.rb 07_timestamps/tests/boot
 diff -uNr 06_uart_chainloader/tests/chainboot_test.rb 07_timestamps/tests/chainboot_test.rb
 --- 06_uart_chainloader/tests/chainboot_test.rb
 +++ 07_timestamps/tests/chainboot_test.rb
-@@ -1,80 +0,0 @@
+@@ -1,78 +0,0 @@
 -# frozen_string_literal: true
 -
 -# SPDX-License-Identifier: MIT OR Apache-2.0
@@ -773,11 +773,33 @@ diff -uNr 06_uart_chainloader/tests/chainboot_test.rb 07_timestamps/tests/chainb
 -# Match for the last print that 'demo_payload_rpiX.img' produces.
 -EXPECTED_PRINT = 'Echoing input now'
 -
+-# Wait for request to power the target.
+-class PowerTargetRequestTest < SubtestBase
+-    MINIPUSH_POWER_TARGET_REQUEST = 'Please power the target now'
+-
+-    def initialize(qemu_cmd, pty_main)
+-        super()
+-        @qemu_cmd = qemu_cmd
+-        @pty_main = pty_main
+-    end
+-
+-    def name
+-        'Waiting for request to power target'
+-    end
+-
+-    def run(qemu_out, _qemu_in)
+-        expect_or_raise(qemu_out, MINIPUSH_POWER_TARGET_REQUEST)
+-
+-        # Now is the time to start QEMU with the chainloader binary. QEMU's virtual tty connects to
+-        # the MiniPush instance spawned on pty_main, so that the two processes talk to each other.
+-        Process.spawn(@qemu_cmd, in: @pty_main, out: @pty_main, err: '/dev/null')
+-    end
+-end
+-
 -# Extend BootTest so that it listens on the output of a MiniPush instance, which is itself connected
 -# to a QEMU instance instead of a real HW.
 -class ChainbootTest < BootTest
 -    MINIPUSH = '../common/serial/minipush.rb'
--    MINIPUSH_POWER_TARGET_REQUEST = 'Please power the target now'
 -
 -    def initialize(qemu_cmd, payload_path)
 -        super(qemu_cmd, EXPECTED_PRINT)
@@ -790,46 +812,22 @@ diff -uNr 06_uart_chainloader/tests/chainboot_test.rb 07_timestamps/tests/chainb
 -    private
 -
 -    # override
--    def post_process_and_add_output(output)
--        temp = output.join.split("\r\n")
--
--        # Should a line have solo carriage returns, remove any overridden parts of the string.
--        temp.map! { |x| x.gsub(/.*\r/, '') }
--
--        @test_output += temp
--    end
--
--    def wait_for_minipush_power_request(mp_out)
--        output = []
--        Timeout.timeout(MAX_WAIT_SECS) do
--            loop do
--                output << mp_out.gets
--                break if output.last.include?(MINIPUSH_POWER_TARGET_REQUEST)
--            end
--        end
--    rescue Timeout::Error
--        @test_error = 'Timed out waiting for power request'
--    rescue StandardError => e
--        @test_error = e.message
--    ensure
--        post_process_and_add_output(output)
--    end
--
--    # override
 -    def setup
 -        pty_main, pty_secondary = PTY.open
 -        mp_out, _mp_in = PTY.spawn("ruby #{MINIPUSH} #{pty_secondary.path} #{@payload_path}")
 -
--        # Wait until MiniPush asks for powering the target.
--        wait_for_minipush_power_request(mp_out)
+-        # The subtests (from this class and the parents) listen on @qemu_out_wrapped. Hence, point
+-        # it to MiniPush's output.
+-        @qemu_out_wrapped = PTYLoggerWrapper.new(mp_out, "\r\n")
 -
--        # Now is the time to start QEMU with the chainloader binary. QEMU's virtual tty is connected
--        # to the MiniPush instance spawned above, so that the two processes talk to each other.
--        Process.spawn(@qemu_cmd, in: pty_main, out: pty_main)
+-        # Important: Run this subtest before the one in the parent class.
+-        @console_subtests.prepend(PowerTargetRequestTest.new(@qemu_cmd, pty_main))
+-    end
 -
--        # The remainder of the test is done by the parent class' run_concrete_test, which listens on
--        # @qemu_serial. Hence, point it to MiniPush's output.
--        @qemu_serial = mp_out
+-    # override
+-    def finish
+-        super()
+-        @test_output.map! { |x| x.gsub(/.*\r/, '  ') }
 -    end
 -end
 -
diff --git a/12_integrated_testing/README.md b/12_integrated_testing/README.md
index b34b72087..48fd1876d 100644
--- a/12_integrated_testing/README.md
+++ b/12_integrated_testing/README.md
@@ -460,7 +460,7 @@ when 'libkernel'
     ExitCodeTest.new(qemu_cmd, 'Kernel library unit tests').run # Doesn't return
 ```
 
-The easy case is `QEMU` existing by itself by means of `aarch64::exit_success()` or
+The easy case is `QEMU` exiting by itself by means of `aarch64::exit_success()` or
 `aarch64::exit_failure()`. But the script can also catch the case of a test that gets stuck, e.g. in
 an unintentional busy loop or a crash. If `ExitCodeTest` does not observe any output of the test
 kernel for `MAX_WAIT_SECS`, it cancels the execution and marks the test as failed. Test success or
@@ -471,20 +471,16 @@ is thrown):
 
 ```ruby
 def run_concrete_test
-    io = IO.popen(@qemu_cmd)
-
     Timeout.timeout(MAX_WAIT_SECS) do
-        @test_output << io.read_nonblock(1024) while IO.select([io])
+        @test_output << @qemu_serial.read_nonblock(1024) while @qemu_serial.wait_readable
     end
 rescue EOFError
-    io.close
+    @qemu_serial.close
     @test_error = $CHILD_STATUS.to_i.zero? ? false : 'QEMU exit status != 0'
 rescue Timeout::Error
     @test_error = 'Timed out waiting for test'
 rescue StandardError => e
-    @test_error = e.message
-ensure
-    post_process_output
+    @test_error = e.inspect
 end
 ```
 
@@ -742,15 +738,17 @@ Here is an excerpt from `00_console_sanity.rb` showing a subtest that does a han
 kernel over the console:
 
 ```ruby
+require_relative '../../common/tests/console_io_test'
+
 # Verify sending and receiving works as expected.
-class TxRxHandshake
+class TxRxHandshakeTest < SubtestBase
     def name
         'Transmit and Receive handshake'
     end
 
     def run(qemu_out, qemu_in)
         qemu_in.write_nonblock('ABC')
-        raise ExpectTimeoutError if qemu_out.expect('OK1234', TIMEOUT_SECS).nil?
+        expect_or_raise(qemu_out, 'OK1234')
     end
 end
 ```
@@ -824,6 +822,9 @@ Compiling integration test(s) - rpi3
            2. Transmit statistics.......................................[ok]
            3. Receive statistics........................................[ok]
 
+         Console log:
+           ABCOK123463
+
          -------------------------------------------------------------------
          ✅ Success: 00_console_sanity.rs
          -------------------------------------------------------------------
@@ -1761,55 +1762,46 @@ diff -uNr 11_exceptions_part1_groundwork/test-macros/src/lib.rs 12_integrated_te
 diff -uNr 11_exceptions_part1_groundwork/tests/00_console_sanity.rb 12_integrated_testing/tests/00_console_sanity.rb
 --- 11_exceptions_part1_groundwork/tests/00_console_sanity.rb
 +++ 12_integrated_testing/tests/00_console_sanity.rb
-@@ -0,0 +1,57 @@
+@@ -0,0 +1,48 @@
 +# frozen_string_literal: true
 +
 +# SPDX-License-Identifier: MIT OR Apache-2.0
 +#
 +# Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 +
-+require 'expect'
-+
-+TIMEOUT_SECS = 3
-+
-+# Error class for when expect times out.
-+class ExpectTimeoutError < StandardError
-+    def initialize
-+        super('Timeout while expecting string')
-+    end
-+end
++require_relative '../../common/tests/console_io_test'
 +
 +# Verify sending and receiving works as expected.
-+class TxRxHandshake
++class TxRxHandshakeTest < SubtestBase
 +    def name
 +        'Transmit and Receive handshake'
 +    end
 +
 +    def run(qemu_out, qemu_in)
 +        qemu_in.write_nonblock('ABC')
-+        raise ExpectTimeoutError if qemu_out.expect('OK1234', TIMEOUT_SECS).nil?
++        expect_or_raise(qemu_out, 'OK1234')
 +    end
 +end
 +
 +# Check for correct TX statistics implementation. Depends on test 1 being run first.
-+class TxStatistics
++class TxStatisticsTest < SubtestBase
 +    def name
 +        'Transmit statistics'
 +    end
 +
 +    def run(qemu_out, _qemu_in)
-+        raise ExpectTimeoutError if qemu_out.expect('6', TIMEOUT_SECS).nil?
++        expect_or_raise(qemu_out, '6')
 +    end
 +end
 +
 +# Check for correct RX statistics implementation. Depends on test 1 being run first.
-+class RxStatistics
++class RxStatisticsTest < SubtestBase
 +    def name
 +        'Receive statistics'
 +    end
 +
 +    def run(qemu_out, _qemu_in)
-+        raise ExpectTimeoutError if qemu_out.expect('3', TIMEOUT_SECS).nil?
++        expect_or_raise(qemu_out, '3')
 +    end
 +end
 +
@@ -1817,7 +1809,7 @@ diff -uNr 11_exceptions_part1_groundwork/tests/00_console_sanity.rb 12_integrate
 +## Test registration
 +##--------------------------------------------------------------------------------------------------
 +def subtest_collection
-+    [TxRxHandshake.new, TxStatistics.new, RxStatistics.new]
++    [TxRxHandshakeTest.new, TxStatisticsTest.new, RxStatisticsTest.new]
 +end
 
 diff -uNr 11_exceptions_part1_groundwork/tests/00_console_sanity.rs 12_integrated_testing/tests/00_console_sanity.rs
diff --git a/12_integrated_testing/tests/00_console_sanity.rb b/12_integrated_testing/tests/00_console_sanity.rb
index 249de2245..48c9703db 100644
--- a/12_integrated_testing/tests/00_console_sanity.rb
+++ b/12_integrated_testing/tests/00_console_sanity.rb
@@ -4,48 +4,39 @@
 #
 # Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
-require 'expect'
-
-TIMEOUT_SECS = 3
-
-# Error class for when expect times out.
-class ExpectTimeoutError < StandardError
-    def initialize
-        super('Timeout while expecting string')
-    end
-end
+require_relative '../../common/tests/console_io_test'
 
 # Verify sending and receiving works as expected.
-class TxRxHandshake
+class TxRxHandshakeTest < SubtestBase
     def name
         'Transmit and Receive handshake'
     end
 
     def run(qemu_out, qemu_in)
         qemu_in.write_nonblock('ABC')
-        raise ExpectTimeoutError if qemu_out.expect('OK1234', TIMEOUT_SECS).nil?
+        expect_or_raise(qemu_out, 'OK1234')
     end
 end
 
 # Check for correct TX statistics implementation. Depends on test 1 being run first.
-class TxStatistics
+class TxStatisticsTest < SubtestBase
     def name
         'Transmit statistics'
     end
 
     def run(qemu_out, _qemu_in)
-        raise ExpectTimeoutError if qemu_out.expect('6', TIMEOUT_SECS).nil?
+        expect_or_raise(qemu_out, '6')
     end
 end
 
 # Check for correct RX statistics implementation. Depends on test 1 being run first.
-class RxStatistics
+class RxStatisticsTest < SubtestBase
     def name
         'Receive statistics'
     end
 
     def run(qemu_out, _qemu_in)
-        raise ExpectTimeoutError if qemu_out.expect('3', TIMEOUT_SECS).nil?
+        expect_or_raise(qemu_out, '3')
     end
 end
 
@@ -53,5 +44,5 @@ def run(qemu_out, _qemu_in)
 ## Test registration
 ##--------------------------------------------------------------------------------------------------
 def subtest_collection
-    [TxRxHandshake.new, TxStatistics.new, RxStatistics.new]
+    [TxRxHandshakeTest.new, TxStatisticsTest.new, RxStatisticsTest.new]
 end
diff --git a/13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rb b/13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rb
index 249de2245..48c9703db 100644
--- a/13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rb
+++ b/13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rb
@@ -4,48 +4,39 @@
 #
 # Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
-require 'expect'
-
-TIMEOUT_SECS = 3
-
-# Error class for when expect times out.
-class ExpectTimeoutError < StandardError
-    def initialize
-        super('Timeout while expecting string')
-    end
-end
+require_relative '../../common/tests/console_io_test'
 
 # Verify sending and receiving works as expected.
-class TxRxHandshake
+class TxRxHandshakeTest < SubtestBase
     def name
         'Transmit and Receive handshake'
     end
 
     def run(qemu_out, qemu_in)
         qemu_in.write_nonblock('ABC')
-        raise ExpectTimeoutError if qemu_out.expect('OK1234', TIMEOUT_SECS).nil?
+        expect_or_raise(qemu_out, 'OK1234')
     end
 end
 
 # Check for correct TX statistics implementation. Depends on test 1 being run first.
-class TxStatistics
+class TxStatisticsTest < SubtestBase
     def name
         'Transmit statistics'
     end
 
     def run(qemu_out, _qemu_in)
-        raise ExpectTimeoutError if qemu_out.expect('6', TIMEOUT_SECS).nil?
+        expect_or_raise(qemu_out, '6')
     end
 end
 
 # Check for correct RX statistics implementation. Depends on test 1 being run first.
-class RxStatistics
+class RxStatisticsTest < SubtestBase
     def name
         'Receive statistics'
     end
 
     def run(qemu_out, _qemu_in)
-        raise ExpectTimeoutError if qemu_out.expect('3', TIMEOUT_SECS).nil?
+        expect_or_raise(qemu_out, '3')
     end
 end
 
@@ -53,5 +44,5 @@ def run(qemu_out, _qemu_in)
 ## Test registration
 ##--------------------------------------------------------------------------------------------------
 def subtest_collection
-    [TxRxHandshake.new, TxStatistics.new, RxStatistics.new]
+    [TxRxHandshakeTest.new, TxStatisticsTest.new, RxStatisticsTest.new]
 end
diff --git a/14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rb b/14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rb
index 249de2245..48c9703db 100644
--- a/14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rb
+++ b/14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rb
@@ -4,48 +4,39 @@
 #
 # Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
-require 'expect'
-
-TIMEOUT_SECS = 3
-
-# Error class for when expect times out.
-class ExpectTimeoutError < StandardError
-    def initialize
-        super('Timeout while expecting string')
-    end
-end
+require_relative '../../common/tests/console_io_test'
 
 # Verify sending and receiving works as expected.
-class TxRxHandshake
+class TxRxHandshakeTest < SubtestBase
     def name
         'Transmit and Receive handshake'
     end
 
     def run(qemu_out, qemu_in)
         qemu_in.write_nonblock('ABC')
-        raise ExpectTimeoutError if qemu_out.expect('OK1234', TIMEOUT_SECS).nil?
+        expect_or_raise(qemu_out, 'OK1234')
     end
 end
 
 # Check for correct TX statistics implementation. Depends on test 1 being run first.
-class TxStatistics
+class TxStatisticsTest < SubtestBase
     def name
         'Transmit statistics'
     end
 
     def run(qemu_out, _qemu_in)
-        raise ExpectTimeoutError if qemu_out.expect('6', TIMEOUT_SECS).nil?
+        expect_or_raise(qemu_out, '6')
     end
 end
 
 # Check for correct RX statistics implementation. Depends on test 1 being run first.
-class RxStatistics
+class RxStatisticsTest < SubtestBase
     def name
         'Receive statistics'
     end
 
     def run(qemu_out, _qemu_in)
-        raise ExpectTimeoutError if qemu_out.expect('3', TIMEOUT_SECS).nil?
+        expect_or_raise(qemu_out, '3')
     end
 end
 
@@ -53,5 +44,5 @@ def run(qemu_out, _qemu_in)
 ## Test registration
 ##--------------------------------------------------------------------------------------------------
 def subtest_collection
-    [TxRxHandshake.new, TxStatistics.new, RxStatistics.new]
+    [TxRxHandshakeTest.new, TxStatisticsTest.new, RxStatisticsTest.new]
 end
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rb b/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rb
index 249de2245..48c9703db 100644
--- a/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rb
+++ b/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rb
@@ -4,48 +4,39 @@
 #
 # Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
-require 'expect'
-
-TIMEOUT_SECS = 3
-
-# Error class for when expect times out.
-class ExpectTimeoutError < StandardError
-    def initialize
-        super('Timeout while expecting string')
-    end
-end
+require_relative '../../common/tests/console_io_test'
 
 # Verify sending and receiving works as expected.
-class TxRxHandshake
+class TxRxHandshakeTest < SubtestBase
     def name
         'Transmit and Receive handshake'
     end
 
     def run(qemu_out, qemu_in)
         qemu_in.write_nonblock('ABC')
-        raise ExpectTimeoutError if qemu_out.expect('OK1234', TIMEOUT_SECS).nil?
+        expect_or_raise(qemu_out, 'OK1234')
     end
 end
 
 # Check for correct TX statistics implementation. Depends on test 1 being run first.
-class TxStatistics
+class TxStatisticsTest < SubtestBase
     def name
         'Transmit statistics'
     end
 
     def run(qemu_out, _qemu_in)
-        raise ExpectTimeoutError if qemu_out.expect('6', TIMEOUT_SECS).nil?
+        expect_or_raise(qemu_out, '6')
     end
 end
 
 # Check for correct RX statistics implementation. Depends on test 1 being run first.
-class RxStatistics
+class RxStatisticsTest < SubtestBase
     def name
         'Receive statistics'
     end
 
     def run(qemu_out, _qemu_in)
-        raise ExpectTimeoutError if qemu_out.expect('3', TIMEOUT_SECS).nil?
+        expect_or_raise(qemu_out, '3')
     end
 end
 
@@ -53,5 +44,5 @@ def run(qemu_out, _qemu_in)
 ## Test registration
 ##--------------------------------------------------------------------------------------------------
 def subtest_collection
-    [TxRxHandshake.new, TxStatistics.new, RxStatistics.new]
+    [TxRxHandshakeTest.new, TxStatisticsTest.new, RxStatisticsTest.new]
 end
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rb b/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rb
index 249de2245..48c9703db 100644
--- a/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rb
+++ b/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rb
@@ -4,48 +4,39 @@
 #
 # Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
-require 'expect'
-
-TIMEOUT_SECS = 3
-
-# Error class for when expect times out.
-class ExpectTimeoutError < StandardError
-    def initialize
-        super('Timeout while expecting string')
-    end
-end
+require_relative '../../common/tests/console_io_test'
 
 # Verify sending and receiving works as expected.
-class TxRxHandshake
+class TxRxHandshakeTest < SubtestBase
     def name
         'Transmit and Receive handshake'
     end
 
     def run(qemu_out, qemu_in)
         qemu_in.write_nonblock('ABC')
-        raise ExpectTimeoutError if qemu_out.expect('OK1234', TIMEOUT_SECS).nil?
+        expect_or_raise(qemu_out, 'OK1234')
     end
 end
 
 # Check for correct TX statistics implementation. Depends on test 1 being run first.
-class TxStatistics
+class TxStatisticsTest < SubtestBase
     def name
         'Transmit statistics'
     end
 
     def run(qemu_out, _qemu_in)
-        raise ExpectTimeoutError if qemu_out.expect('6', TIMEOUT_SECS).nil?
+        expect_or_raise(qemu_out, '6')
     end
 end
 
 # Check for correct RX statistics implementation. Depends on test 1 being run first.
-class RxStatistics
+class RxStatisticsTest < SubtestBase
     def name
         'Receive statistics'
     end
 
     def run(qemu_out, _qemu_in)
-        raise ExpectTimeoutError if qemu_out.expect('3', TIMEOUT_SECS).nil?
+        expect_or_raise(qemu_out, '3')
     end
 end
 
@@ -53,5 +44,5 @@ def run(qemu_out, _qemu_in)
 ## Test registration
 ##--------------------------------------------------------------------------------------------------
 def subtest_collection
-    [TxRxHandshake.new, TxStatistics.new, RxStatistics.new]
+    [TxRxHandshakeTest.new, TxStatisticsTest.new, RxStatisticsTest.new]
 end
diff --git a/common/tests/boot_test.rb b/common/tests/boot_test.rb
index 532efa968..0dbef3df2 100644
--- a/common/tests/boot_test.rb
+++ b/common/tests/boot_test.rb
@@ -4,73 +4,29 @@
 #
 # Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
-require_relative 'test'
-require 'io/wait'
-require 'timeout'
+require_relative 'console_io_test'
 
-# Check for an expected string when booting the kernel in QEMU.
-class BootTest < Test
-    MAX_WAIT_SECS = 5
-
-    def initialize(qemu_cmd, expected_print)
+# Wait for an expected print during boot.
+class ExpectedBootPrintTest < SubtestBase
+    def initialize(expected_print)
         super()
-
-        @qemu_cmd = qemu_cmd
         @expected_print = expected_print
-
-        @test_name = 'Boot test'
-        @test_description = "Checking for the string: '#{@expected_print}'"
-        @test_output = []
-        @test_error = nil
     end
 
-    private
-
-    def expected_string_observed?(qemu_output)
-        qemu_output.join.include?(@expected_print)
+    def name
+        "Checking for the string: '#{@expected_print}'"
     end
 
-    # Convert the recorded output to an array of lines.
-    def post_process_and_add_output(qemu_output)
-        @test_output += qemu_output.join.split("\n")
-    end
-
-    # override
-    def setup
-        @qemu_serial = IO.popen(@qemu_cmd, err: '/dev/null')
-        @qemu_pid = @qemu_serial.pid
-    end
-
-    # override
-    def cleanup
-        Timeout.timeout(MAX_WAIT_SECS) do
-            Process.kill('TERM', @qemu_pid)
-            Process.wait
-        end
-    rescue StandardError => e
-        puts 'QEMU graceful shutdown didn\'t work. Skipping it.'
-        puts e
+    def run(qemu_out, _qemu_in)
+        expect_or_raise(qemu_out, @expected_print)
     end
+end
 
-    def run_concrete_test
-        qemu_output = []
-        Timeout.timeout(MAX_WAIT_SECS) do
-            while @qemu_serial.wait_readable
-                qemu_output << @qemu_serial.read_nonblock(1024)
+# Check for an expected string when booting the kernel in QEMU.
+class BootTest < ConsoleIOTest
+    def initialize(qemu_cmd, expected_print)
+        subtests = [ExpectedBootPrintTest.new(expected_print)]
 
-                if expected_string_observed?(qemu_output)
-                    @test_error = false
-                    break
-                end
-            end
-        end
-    rescue EOFError
-        @test_error = 'QEMU quit unexpectedly'
-    rescue Timeout::Error
-        @test_error = 'Timed out waiting for magic string'
-    rescue StandardError => e
-        @test_error = e.message
-    ensure
-        post_process_and_add_output(qemu_output)
+        super(qemu_cmd, 'Boot test', subtests)
     end
 end
diff --git a/common/tests/console_io_test.rb b/common/tests/console_io_test.rb
index 74610f845..cfb45a2b5 100644
--- a/common/tests/console_io_test.rb
+++ b/common/tests/console_io_test.rb
@@ -4,11 +4,62 @@
 #
 # Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
+require 'expect'
 require 'pty'
+require 'timeout'
 require_relative 'test'
 
+# Error class for when expect times out.
+class ExpectTimeoutError < StandardError
+    def initialize(string)
+        super("Timeout while expecting string: #{string}")
+    end
+end
+
+# Provide boilderplate for expecting a string and throwing an error on failure.
+class SubtestBase
+    TIMEOUT_SECONDS = 3
+
+    def expect_or_raise(io, string, timeout = TIMEOUT_SECONDS)
+        raise ExpectTimeoutError, string if io.expect(string, timeout).nil?
+    end
+end
+
+# Monkey-patch IO so that we get access to the buffer of a previously unsuccessful expect().
+class IO
+    # rubocop:disable Naming:MethodName
+    attr_reader :unusedBuf
+    # rubocop:enable Naming:MethodName
+end
+
+# A wrapper class that records characters that have been received from a PTY.
+class PTYLoggerWrapper
+    def initialize(pty, linebreak = "\n")
+        @pty = pty
+        @linebreak = linebreak
+        @log = []
+    end
+
+    def expect(pattern, timeout)
+        result = @pty.expect(pattern, timeout)
+        @log << if result.nil?
+                    @pty.unusedBuf
+                else
+                    result
+                end
+
+        result
+    end
+
+    def log
+        @log.join.split(@linebreak)
+    end
+end
+
 # A test doing console I/O with the QEMU binary.
 class ConsoleIOTest < Test
+    MAX_TIME_ALL_TESTS_SECONDS = 20
+
     def initialize(qemu_cmd, test_name, console_subtests)
         super()
 
@@ -34,15 +85,33 @@ def run_subtest(subtest, test_id, qemu_out, qemu_in)
         @test_output.last.concat('[ok]')
     end
 
+    # override
+    def setup
+        qemu_out, @qemu_in = PTY.spawn(@qemu_cmd)
+        @qemu_out_wrapped = PTYLoggerWrapper.new(qemu_out)
+    end
+
+    # override
+    def finish
+        @test_output << ''
+        @test_output << 'Console log:'
+        @test_output += @qemu_out_wrapped.log.map { |line| "  #{line}" }
+    end
+
+    # override
     def run_concrete_test
         @test_error = false
 
-        PTY.spawn(@qemu_cmd) do |qemu_out, qemu_in|
+        Timeout.timeout(MAX_TIME_ALL_TESTS_SECONDS) do
             @console_subtests.each_with_index do |t, i|
-                run_subtest(t, i + 1, qemu_out, qemu_in)
+                run_subtest(t, i + 1, @qemu_out_wrapped, @qemu_in)
             end
-        rescue StandardError => e
-            @test_error = e.message
         end
+    rescue Errno::EIO => e
+        @test_error = "#{e.inspect} - QEMU might have quit early"
+    rescue Timeout::Error
+        @test_error = "Overall time for tests exceeded (#{MAX_TIME_ALL_TESTS_SECONDS}s)"
+    rescue StandardError => e
+        @test_error = e.inspect
     end
 end
diff --git a/common/tests/exit_code_test.rb b/common/tests/exit_code_test.rb
index e5c42502c..4bcdc7afe 100644
--- a/common/tests/exit_code_test.rb
+++ b/common/tests/exit_code_test.rb
@@ -25,17 +25,19 @@ def initialize(qemu_cmd, test_name)
 
     private
 
+    # override
+    def setup
+        @qemu_serial = IO.popen(@qemu_cmd)
+    end
+
+    # override
     # Convert the recorded output to an array of lines, and extract the test description.
-    def post_process_output
+    def finish
         @test_output = @test_output.join.split("\n")
         @test_description = @test_output.shift
     end
 
     # override
-    def setup
-        @qemu_serial = IO.popen(@qemu_cmd)
-    end
-
     def run_concrete_test
         Timeout.timeout(MAX_WAIT_SECS) do
             @test_output << @qemu_serial.read_nonblock(1024) while @qemu_serial.wait_readable
@@ -46,8 +48,6 @@ def run_concrete_test
     rescue Timeout::Error
         @test_error = 'Timed out waiting for test'
     rescue StandardError => e
-        @test_error = e.message
-    ensure
-        post_process_output
+        @test_error = e.inspect
     end
 end
diff --git a/common/tests/test.rb b/common/tests/test.rb
index d8777ba7a..d102ecd99 100644
--- a/common/tests/test.rb
+++ b/common/tests/test.rb
@@ -52,7 +52,7 @@ def print_output
     def setup; end
 
     # Template method.
-    def cleanup; end
+    def finish; end
 
     # Template method.
     def run_concrete_test
@@ -64,7 +64,7 @@ def run_concrete_test
     def run
         setup
         run_concrete_test
-        cleanup
+        finish
 
         print_header
         print_output

From 2c48286c1f031ca5cb0321e38e85bc63d5b38fb7 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 21 Mar 2022 22:09:18 +0100
Subject: [PATCH 115/214] Skip misspell on files of non-english language

---
 utils/devtool.rb | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/utils/devtool.rb b/utils/devtool.rb
index 849d139c7..a926cd2c4 100755
--- a/utils/devtool.rb
+++ b/utils/devtool.rb
@@ -193,7 +193,12 @@ def copyright
 
     def misspell
         puts 'Misspell'.light_blue
-        exit(1) unless system(".vendor/misspell -error #{tracked_files.join(' ')}")
+
+        translations = ['README.CN.md', 'README.ES.md']
+        files = tracked_files.reject { |f| translations.include?(File.basename(f)) }
+        files = files.join(' ')
+
+        exit(1) unless system(".vendor/misspell -error #{files}")
     end
 
     def rubocop

From 22aaa9e38a4873a167447408da6e4132cecbb29a Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=C2=B0=7Ezanez?=
 <51524324+zanezhub@users.noreply.github.com>
Date: Tue, 22 Mar 2022 03:26:40 -0600
Subject: [PATCH 116/214] README.ES.md (#148)

* README.ES.md

I added a spanish translation for the README.md file, and modified the README.md to add my github profile and to add the link to README.ES.md file

* Slightly reorganize translation overview

* README.ES.md These changes are in response to PR comments

* Update README.ES.md

Co-authored-by: zanez <zanez@protonmail.com>
Co-authored-by: Andre Richter <andre-richter@users.noreply.github.com>
---
 README.ES.md | 171 +++++++++++++++++++++++++++++++++++++++++++++++++++
 README.md    |  21 +++++--
 2 files changed, 187 insertions(+), 5 deletions(-)
 create mode 100644 README.ES.md

diff --git a/README.ES.md b/README.ES.md
new file mode 100644
index 000000000..d5c1d95ba
--- /dev/null
+++ b/README.ES.md
@@ -0,0 +1,171 @@
+# Tutoriales de desarrollo de Sistemas Operativos en Rust con la Raspberry Pi
+
+![](https://github.com/rust-embedded/rust-raspberrypi-OS-tutorials/workflows/BSP-RPi3/badge.svg) ![](https://github.com/rust-embedded/rust-raspberrypi-OS-tutorials/workflows/BSP-RPi4/badge.svg) ![](https://github.com/rust-embedded/rust-raspberrypi-OS-tutorials/workflows/Unit-Tests/badge.svg) ![](https://github.com/rust-embedded/rust-raspberrypi-OS-tutorials/workflows/Integration-Tests/badge.svg) ![](https://img.shields.io/badge/License-MIT%20OR%20Apache--2.0-blue)
+
+<br/>
+
+<img src="doc/header.jpg" height="372"> <img src="doc/minipush_demo_frontpage.gif" height="372">
+
+## ℹ️ Introducción
+
+Esto es una serie de tutoriales para los desarrolladores aficionados a los Sistemas Operativos (OS) 
+que se están adentrando a la nueva arquitectura ARM de 64 bits [ARMv8-A
+architecture]. Los tutoriales darán una guía paso a paso en cómo escribir un Sistema Operativo 
+[monolítico] desde cero.
+Estos tutoriales cubren la implementación común de diferentes tareas de Sistemas Operativos, como 
+escribir en una terminal serie, configurar la memoria virtual y manejar excepciones de hardware (HW). 
+Todo mientras usamos la seguridad y velocidad que `Rust` nos proporciona.
+
+¡Divértanse!
+
+_Atentamente, <br>Andre ([@andre-richter])_
+
+P.S.: Para otros lenguajes, por favor busquen los diferentes archivos README. Por ejemplo, [`README.CN.md`](README.CN.md) o [`README.ES.md`](README.ES.md). Muchas gracias a nuestros
+[traductores](#traducciones-de-este-repositorio) 🙌.
+
+[ARMv8-A architecture]: https://developer.arm.com/products/architecture/cpu-architecture/a-profile/docs
+[monolítico]: https://en.wikipedia.org/wiki/Monolithic_kernel
+[@andre-richter]: https://github.com/andre-richter
+
+## 📑 Estructura
+
+- Cada tutorial contiene un solo binario arrancable correspondiente al núcleo.
+- Cada tutorial nuevo extiende el tutorial anterior.
+- Cada tutorial tendrá un `README` y cada `README` tendrá un pequeña sección de [`tl;dr`](https://es.wikipedia.org/wiki/TL;DR) en donde se dará una pequeña perspectiva general de los cambios y se mostrará el código fuente `diff` del tutorial anterior para que se puedan inspeccionar los cambios/adiciones que han ocurrido.
+    - Algunos tutoriales además de tener un `tl;dr` también tendrán una sección en la que se dará una explicación con todo lujo de detalle.
+       El plan a largo plazo es que cada tutorial tenga una buena explicación además del `tl;dr` y el `diff`; pero por el momento los únicos tutoriales
+      que gozan de una son los tutoriales en los que creo que el `tl;dr` y el `diff` no son suficientes para comprender lo que está pasando.
+- El código que se escribió en este tutorial soporta y corre en la **Raspberry Pi 3** y en la **Raspberry 4**
+  - Del tutorial 1 hasta el 5 son tutoriales "preparatorios", por lo que este código solo tendrá sentido ejecutarlo en [`QEMU`](https://www.qemu.org/).
+  - Cuando llegues al [tutorial 5](05_drivers_gpio_uart) podrás comenzar a cargar y a ejecutar el núcleo en una
+    Raspeberry de verdad, y observar la salida serie (`UART`).
+- Aunque la Raspberry Pi 3 y 4 son las principales placas este código está escrito en un estilo modular,
+  lo que permite una fácil portabilidad a otras arquitecturas de CPU o/y placas.
+  - Me encantaría si alguien intentase adaptar este código en una arquitectura **RISC-V**.
+- Para la edición recomiendo [Visual Studio Code] con [Rust Analyzer].
+- En adición al texto que aparece en los tutoriales también sería recomendable revisar 
+  el comando `make doc` en cada tutorial. Este comando te deja navegar el código documentado de una manera cómoda.
+
+### Salida del comando `make doc`
+
+![make doc](doc/make_doc.png)
+
+[Visual Studio Code]: https://code.visualstudio.com
+[Rust Analyzer]: https://rust-analyzer.github.io
+
+## 🛠 Requisitos del sistema
+
+Estos tutoriales están dirigidos principalmente a distribuciones de **Linux**. 
+Muchas de las cosas vistas aquí también funcionan en **macOS**, pero esto solo es _experimental_.
+
+### 🚀 La versión tl;dr
+
+1. [Instala Docker Desktop][install_docker].
+2. (**Solo para Linux**) Asegúrate de que la cuenta de tu usuario está en el [grupo `docker`][docker group].
+3. Prepara la `Rust` toolchain. La mayor parte se hará automáticamente durante el primer uso del archivo [rust-toolchain](rust-toolchain). 
+   Todo lo que nos queda hacer a nosotros es: 
+
+   i. Si ya tienes una versión de Rust instalada:
+      ```bash
+      cargo install cargo-binutils rustfilt
+      ```
+
+   ii. Si necesitas instalar Rust desde cero:
+      ```bash
+      curl --proto '=https' --tlsv1.2 -sSf https://sh.rustup.rs | sh
+
+      source $HOME/.cargo/env
+      cargo install cargo-binutils rustfilt
+      ```
+
+4. En caso de que uses `Visual Studio Code`, recomiendo que instales la extensión [Rust Analyzer extension].
+5. (**Solo para macOS**) Instala algunas `Ruby` gems.
+
+   Ejecuta esto en la carpeta root del repositorio:
+
+   ```bash
+   bundle install --path .vendor/bundle --without development
+   ```
+
+[docker group]: https://docs.docker.com/engine/install/linux-postinstall/
+[Rust Analyzer extension]: https://marketplace.visualstudio.com/items?itemName=matklad.rust-analyzer
+
+### 🧰 Más detalles: Eliminando Lios con Toolchains
+
+Esta serie trata de enfocarse lo máximo posible en tener una experiencia agradable para el usario.
+Por lo tanto, se han dirigido muchos esfuerzos a eliminar la parte más difícil del desarrollo de
+los sistemas incorporados (embedded) tanto como se pudo.
+
+Rust por sí mismo ya ayuda mucho, porque tiene integrado el soporte para compilación cruzada.
+Todo lo que necesitamos para compilar desde una máquina con una arquitectura `x86` a una Raspberry Pi
+con arquitectura `AArch64` será automáticamente instalado por `rustup`. Sin embargo, además de usar
+el compilador de Rust, también usaremos algunas otras herramientas, entre las cuales están:
+
+- `QEMU` para emular nuestro núcleo en nuestra máquina principal.
+-  Una herramienta llamada `Minipush` para cargar el núcleo en una Raspberry Pi cuando queramos usando `UART`.
+- `OpenOCD` y `GDB` para hacer depuración ("debugging") en la máquina a instalar.
+
+Hay muchas cosas que pueden salir mal mientras instalamos y/o compilamos las versiones correctas de cada
+herramienta en tu máquina. Por ejemplo, tu distribución de Linux tal vez podría no proporcionar las versiones más
+recientes de paquetes que se necesiten. O tal vez te falten algunas dependencias para la compilar estas herramientas.
+
+Esta es la razón por la cual usaremos [Docker][install_docker] mientras sea posible. Te
+estamos proporcionando un contenedor que tiene todas las herramientas o dependencias preinstaladas.
+Si quieres saber más acerca de Docker y revisar el contenedor proporcionado, por favor revisa la carpeta
+[docker](docker) del repositorio.
+
+[install_docker]: https://docs.docker.com/get-docker/
+
+## 📟 Puerto Serie USB
+
+Ya que el núcleo desarrollado en este tutorial se ejecuta en hardware real, se recomienda que tengas un adaptador de puerto serie USB cable para sentir la experiencia completa.
+
+- Puedes encontrar estos cables que deberían funcionar sin ningún problema en [\[1\]] [\[2\]], pero
+  hay muchos otros que pueden funcionar. Idealmente, tu cable estaría basado en el chip `CP2102`.
+- Lo conectas a los pines `GND` y `GPIO` `14/15` como se muestra en la parte inferior.  
+- [Tutorial 5](05_drivers_gpio_uart) es la primera vez en la que lo vas usar. Revisa las instrucciones
+  sobre cómo preparar una tarjeta SD para arrancar en tu núcleo desde ahí.
+- Empezando con el [tutorial 6](06_uart_chainloader), arrancar núcleos en tu Raspberry Pi comienza a ser
+  más fácil. En este tutorial se desarrolla un `chainloader`, que será el último archivo que necesitarás
+  copiar de manera manual a la tarjeta SD por el momento. Esto te permitirá cargar los núcleos de los tutoriales
+  durante el arranque usando `UART`.
+
+![UART wiring diagram](doc/wiring.png)
+
+[\[1\]]: https://www.amazon.de/dp/B0757FQ5CX/ref=cm_sw_r_tw_dp_U_x_ozGRDbVTJAG4Q
+[\[2\]]: https://www.adafruit.com/product/954
+
+## 🙌 Agradecimientos
+
+La versión original de estos tutoriales empezó como un fork de los increíbles 
+[tutoriales de programación en hardware en la RPi3](https://github.com/bztsrc/raspi3-tutorial) en `C`
+de [Zoltan Baldaszti](https://github.com/bztsrc). ¡Gracias por darme un punto de partida!
+
+### Traducciones de este repositorio
+
+ - **Chino:**
+   - [@colachg] y [@readlnh].
+   - Necesitan actualizaciones.
+ - **Español:**
+   -  [@zanezhub].
+   -  En el futuro habrán tutoriales traducidos al español. 
+
+[@colachg]: https://github.com/colachg
+[@readlnh]: https://github.com/readlnh
+[@zanezhub]: https://github.com/zanezhub
+
+## Licencia
+
+Este proyecto está licenciado por cualquiera de las siguientes licencias como alguna de tus dos opciones
+
+- Apache License, Version 2.0, ([LICENSE-APACHE](LICENSE-APACHE) or http://www.apache.org/licenses/LICENSE-2.0)
+- MIT license ([LICENSE-MIT](LICENSE-MIT) or http://opensource.org/licenses/MIT)
+
+
+### Contribución
+
+A menos de que lo menciones, cualquier contribución enviada por ti para su inclusión en este trabajo,
+tal como se define en la licencia Apache-2.0, deberá tener doble licencia como se muestra en la parte superior, sin ningún
+cambio de términos o condiciones.
+
+
diff --git a/README.md b/README.md
index 49c4060f0..66e60d447 100644
--- a/README.md
+++ b/README.md
@@ -18,15 +18,13 @@ Have fun!
 
 _Best regards,<br>Andre ([@andre-richter])_
 
-P.S.: Chinese :cn: versions of the tutorials were started by [@colachg] and [@readlnh]. You can find
-them as [`README.CN.md`](README.CN.md) in the respective folders. They are a bit out-of-date at the
-moment though.
+P.S.: For other languages, please look out for alternative README files. For example,
+[`README.CN.md`](README.CN.md) or [`README.ES.md`](README.ES.md). Many thanks to our
+[translators](#translations-of-this-repository) 🙌.
 
 [ARMv8-A architecture]: https://developer.arm.com/products/architecture/cpu-architecture/a-profile/docs
 [monolithic]: https://en.wikipedia.org/wiki/Monolithic_kernel
 [@andre-richter]: https://github.com/andre-richter
-[@colachg]: https://github.com/colachg
-[@readlnh]: https://github.com/readlnh
 
 ## 📑 Organization
 
@@ -143,6 +141,19 @@ The original version of the tutorials started out as a fork of [Zoltan
 Baldaszti](https://github.com/bztsrc)'s awesome [tutorials on bare metal programming on
 RPi3](https://github.com/bztsrc/raspi3-tutorial) in `C`. Thanks for giving me a head start!
 
+### Translations of this repository
+
+ - **Chinese**
+   - [@colachg] and [@readlnh].
+   - Need updating.
+ - **Spanish**
+   -  [@zanezhub].
+   -  In the future there'll be tutorials translated to spanish.
+
+[@colachg]: https://github.com/colachg
+[@readlnh]: https://github.com/readlnh
+[@zanezhub]: https://github.com/zanezhub
+
 ## License
 
 Licensed under either of

From 22c604fad772860a904d6701a6b08bbb9502fd52 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=C2=B0=7Ezanez?=
 <51524324+zanezhub@users.noreply.github.com>
Date: Thu, 24 Mar 2022 12:35:32 -0600
Subject: [PATCH 117/214] README.ES.md -> 00_before_we_start (#149)

* README.ES.md

I added a spanish translation for the README.md file, and modified the README.md to add my github profile and to add the link to README.ES.md file

* Slightly reorganize translation overview

* README.ES.md These changes are in response to PR comments

* Update README.ES.md

* README.ES.md -> 00_before_we_start

* Updating README.ES.md

I corrected a few mistakes in both README.ES.md files.

* README.ES.md for 00 These changes are in response to PR comments

Co-authored-by: zanez <zanez@protonmail.com>
Co-authored-by: Andre Richter <andre-richter@users.noreply.github.com>
---
 00_before_we_start/README.ES.md | 103 ++++++++++++++++++++++++++++++++
 README.ES.md                    |  60 ++++++++++---------
 2 files changed, 134 insertions(+), 29 deletions(-)
 create mode 100644 00_before_we_start/README.ES.md

diff --git a/00_before_we_start/README.ES.md b/00_before_we_start/README.ES.md
new file mode 100644
index 000000000..9b589a5a3
--- /dev/null
+++ b/00_before_we_start/README.ES.md
@@ -0,0 +1,103 @@
+# Antes de comenzar
+
+El texto a continuación es una copia 1:1 de la documentación que 
+puede ser encontrada al principio del archivo del código fuente 
+del núcleo (kernel) en cada tutorial. Esta describe la estructura 
+general del código fuente, e intenta transmitir la filosofía detrás
+de cada enfoque. Por favor leélo para familiarizarte
+con lo que te vas a encontrar durante los tutoriales. Te ayudará a navegar el código de una mejor manera y a entender las diferencias y agregados entre los diferentes tutoriales.
+
+Por favor, nota también que el siguiente texto va a referenciar
+los archivos del código fuente (p. e.j. `**/memory.rs`) o funciones que
+no van a existir aún en los primeros tutoriales. Estos archivos serán agregados 
+a medida que el tutorial avance.
+
+¡Diviértanse!
+
+# La estructura del código y la arquitectura
+
+El código está dividido en diferentes módulos donde cada uno representa un
+subsistema típico del `kernel (núcleo)`. Los módulos de más alto nivel de los subsistemas se encuentran directamente en la carpeta `src`.
+Por ejemplo, `src/memory.rs` contiene el código que está relacionado
+con el manejo de memoria.
+
+## Visibilidad del código de arquitectura del procesador
+
+Algunos de los subsistemas del `núcleo (kernel)` dependen del código de bajo nivel (low-level) dedicado a la arquitectura del procesador.
+Por cada arquitectura de procesador que está soportada, existe una subcarpeta en `src/_arch`, por ejemplo, `src/_arch/aarch64`.
+
+La carpeta de arquitecturas refleja los módulos del subsistema establecidos en `src`. Por ejemplo, el código de arquitectura que pertenece al subsistema MMU del `núcleo(kernel)` (`src/memory/mmu.rs`) irá dentro de (`src/_arch/aarch64/memory/mmu.rs`).
+Este archivo puede ser cargado como un módulo en `src/memory/mmu.rs` usando el `path attribute` (atributo de ruta). Usualmente, el nombre del módulo elegido es el nombre del módulo genérico con el prefijo de `arch_`
+
+Por ejemplo, esta es la parte superior de `src/memory/mmu.rs`:
+
+```
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/memory/mmu.rs"]
+mod arch_mmu;
+```
+
+En muchas ocasiones, los elementos de `arch_module` serán reexportados públicamente por el módulo principal.
+De esta manera, cada módulo específico de la arquitectura puede proporcionar su implementación de un elemento, mientras que el *invocante* no debe de preocuparse por la arquitectura que se ha compilado condicionalmente.
+
+## Código BSP
+
+`BSP` significa Board Support Package (Paquete de Soporte de la Placa).
+El código `BSP` está dentro de `src/bsp.rs` y contiene las definiciones y funciones de la placa base específica elegida. 
+Entre estas cosas se encuentran diferentes elementos como el mapa de memoria de la placa o instancias de controladores para dispositivos que se presentan en la placa elegida.
+
+Justo como el código de la arquitectura del procesador, la estructura del módulo del código `BSP` trata de reflejar los módulos del subsistema del `núcleo (kernel)`, pero no ocurre una reexportación esta vez. Eso significa que lo que sea que se esté proporcionando debe ser llamado empezando por el *namespace* (espacio de nombres) de `bsp`, p. ej. `bsp::driver::driver_manager()`.
+
+## La interfaz del núcleo (kernel)
+
+El `arch` y el `bsp` contienen código que se compilará condicionalmente dependiendo del procesador y placa actual para la que se compila el núcleo (kernel).
+Por ejemplo, el hardware de control de interrupciones de la `Raspberry Pi 3` y la  `Raspberry Pi 4` es diferente, pero nosotros queremos que el resto del código del kernel funcione correctamente con cualquiera de los dos sin mucha complicación.
+
+Para poder dar una limpia abstracción entre `arch`, `bsp` y código genérico del núcleo, los rasgos de `interface` se proporcionan *siempre y cuando tenga sentido*. Son definidos en su módulo de subsistema correspondiente y ayuda a reforzar el patrón de programar con respecto a una interfaz, sin importar la implementación concreta.
+
+Por ejemplo, habrá una *IRQ handling interface* (interfaz de manejo de interrupciones) común, el cual los dos diferentes controladores de ambas `Raspberry` implementarán, y solo exportarán la interfaz común al resto del `núcleo (kernel)`.
+
+```
+        +-------------------+
+        | Interface (Trait) |
+        |                   |
+        +--+-------------+--+
+           ^             ^
+           |             |
+           |             |
++----------+--+       +--+----------+
+| kernel code |       |  bsp code   |
+|             |       |  arch code  |
++-------------+       +-------------+
+```
+
+# Resumen
+
+Para un subsistema lógico del `núcleo (kernel)`, el código correspondiente puede ser distribuido sobre diferentes localizaciones físicas. Aquí un ejemplo para el subsistema de memoria:
+
+- `src/memory.rs` y `src/memory/**/*`
+  
+  - Código común que es independiente de la arquitectura del procesador de destino y las características de la placa (`BSP`).
+    - Ejemplo: Una función para poner a cero un trozo de memoria.
+  - Las interfaces para el subsistema de la memoria que son implementados por código de `arch` o `BSP`.
+    - Ejemplo: Una interfaz `MMU` que define prototipos de función de `MMU`.
+
+- `src/bsp/__board_name__/memory.rs` y `src/bsp/__board_name__/memory/**/*`
+  
+  - Código específico de `BSP`.
+  - Ejemplo: El mapa de memoria de la placa (direcciones físicas de DRAM y dispositivos MMIO).
+
+- `src/_arch/__arch_name__/memory.rs` y `src/_arch/__arch_name__/memory/**/*`
+  
+  - El código específico de la arquitectura del procesador.
+  - Ejemplo: Implementación de la interfaz `MMU` para la arquitectura `__arch_name__`.
+
+Desde una perspectiva de *namespace*, el código del subsistema de **memoria** vive en:
+
+- `crate::memory::*`
+- `crate::bsp::memory::*`
+
+# Flujo de Boot / Boot flow
+
+1. El punto de entrada del núcleo (kernel) es la función `cpu::boot::arch_boot::_start()`.
+   - Está implementado en `src/_arch/__arch_name__/cpu/boot.s`.
diff --git a/README.ES.md b/README.ES.md
index d5c1d95ba..0ed0634f6 100644
--- a/README.ES.md
+++ b/README.ES.md
@@ -32,9 +32,9 @@ P.S.: Para otros lenguajes, por favor busquen los diferentes archivos README. Po
 - Cada tutorial contiene un solo binario arrancable correspondiente al núcleo.
 - Cada tutorial nuevo extiende el tutorial anterior.
 - Cada tutorial tendrá un `README` y cada `README` tendrá un pequeña sección de [`tl;dr`](https://es.wikipedia.org/wiki/TL;DR) en donde se dará una pequeña perspectiva general de los cambios y se mostrará el código fuente `diff` del tutorial anterior para que se puedan inspeccionar los cambios/adiciones que han ocurrido.
-    - Algunos tutoriales además de tener un `tl;dr` también tendrán una sección en la que se dará una explicación con todo lujo de detalle.
-       El plan a largo plazo es que cada tutorial tenga una buena explicación además del `tl;dr` y el `diff`; pero por el momento los únicos tutoriales
-      que gozan de una son los tutoriales en los que creo que el `tl;dr` y el `diff` no son suficientes para comprender lo que está pasando.
+  - Algunos tutoriales además de tener un `tl;dr` también tendrán una sección en la que se dará una explicación con todo lujo de detalle.
+     El plan a largo plazo es que cada tutorial tenga una buena explicación además del `tl;dr` y el `diff`; pero por el momento los únicos tutoriales
+    que gozan de una son los tutoriales en los que creo que el `tl;dr` y el `diff` no son suficientes para comprender lo que está pasando.
 - El código que se escribió en este tutorial soporta y corre en la **Raspberry Pi 3** y en la **Raspberry 4**
   - Del tutorial 1 hasta el 5 son tutoriales "preparatorios", por lo que este código solo tendrá sentido ejecutarlo en [`QEMU`](https://www.qemu.org/).
   - Cuando llegues al [tutorial 5](05_drivers_gpio_uart) podrás comenzar a cargar y a ejecutar el núcleo en una
@@ -61,28 +61,33 @@ Muchas de las cosas vistas aquí también funcionan en **macOS**, pero esto solo
 ### 🚀 La versión tl;dr
 
 1. [Instala Docker Desktop][install_docker].
+
 2. (**Solo para Linux**) Asegúrate de que la cuenta de tu usuario está en el [grupo `docker`][docker group].
+
 3. Prepara la `Rust` toolchain. La mayor parte se hará automáticamente durante el primer uso del archivo [rust-toolchain](rust-toolchain). 
    Todo lo que nos queda hacer a nosotros es: 
-
+   
    i. Si ya tienes una versión de Rust instalada:
-      ```bash
-      cargo install cargo-binutils rustfilt
-      ```
-
+   
+   ```bash
+   cargo install cargo-binutils rustfilt
+   ```
+   
    ii. Si necesitas instalar Rust desde cero:
-      ```bash
-      curl --proto '=https' --tlsv1.2 -sSf https://sh.rustup.rs | sh
-
-      source $HOME/.cargo/env
-      cargo install cargo-binutils rustfilt
-      ```
+   
+   ```bash
+   curl --proto '=https' --tlsv1.2 -sSf https://sh.rustup.rs | sh
+   
+   source $HOME/.cargo/env
+   cargo install cargo-binutils rustfilt
+   ```
 
 4. En caso de que uses `Visual Studio Code`, recomiendo que instales la extensión [Rust Analyzer extension].
-5. (**Solo para macOS**) Instala algunas `Ruby` gems.
 
+5. (**Solo para macOS**) Instala algunas `Ruby` gems.
+   
    Ejecuta esto en la carpeta root del repositorio:
-
+   
    ```bash
    bundle install --path .vendor/bundle --without development
    ```
@@ -92,7 +97,7 @@ Muchas de las cosas vistas aquí también funcionan en **macOS**, pero esto solo
 
 ### 🧰 Más detalles: Eliminando Lios con Toolchains
 
-Esta serie trata de enfocarse lo máximo posible en tener una experiencia agradable para el usario.
+Esta serie trata de enfocarse lo máximo posible en tener una experiencia agradable para el usuario.
 Por lo tanto, se han dirigido muchos esfuerzos a eliminar la parte más difícil del desarrollo de
 los sistemas incorporados (embedded) tanto como se pudo.
 
@@ -102,7 +107,7 @@ con arquitectura `AArch64` será automáticamente instalado por `rustup`. Sin em
 el compilador de Rust, también usaremos algunas otras herramientas, entre las cuales están:
 
 - `QEMU` para emular nuestro núcleo en nuestra máquina principal.
--  Una herramienta llamada `Minipush` para cargar el núcleo en una Raspberry Pi cuando queramos usando `UART`.
+- Una herramienta llamada `Minipush` para cargar el núcleo en una Raspberry Pi cuando queramos usando `UART`.
 - `OpenOCD` y `GDB` para hacer depuración ("debugging") en la máquina a instalar.
 
 Hay muchas cosas que pueden salir mal mientras instalamos y/o compilamos las versiones correctas de cada
@@ -143,12 +148,12 @@ de [Zoltan Baldaszti](https://github.com/bztsrc). ¡Gracias por darme un punto d
 
 ### Traducciones de este repositorio
 
- - **Chino:**
-   - [@colachg] y [@readlnh].
-   - Necesitan actualizaciones.
- - **Español:**
-   -  [@zanezhub].
-   -  En el futuro habrán tutoriales traducidos al español. 
+- **Chino:**
+  - [@colachg] y [@readlnh].
+  - Necesitan actualizaciones.
+- **Español:**
+  - [@zanezhub].
+  - En el futuro habrán tutoriales traducidos al español. 
 
 [@colachg]: https://github.com/colachg
 [@readlnh]: https://github.com/readlnh
@@ -158,14 +163,11 @@ de [Zoltan Baldaszti](https://github.com/bztsrc). ¡Gracias por darme un punto d
 
 Este proyecto está licenciado por cualquiera de las siguientes licencias como alguna de tus dos opciones
 
-- Apache License, Version 2.0, ([LICENSE-APACHE](LICENSE-APACHE) or http://www.apache.org/licenses/LICENSE-2.0)
-- MIT license ([LICENSE-MIT](LICENSE-MIT) or http://opensource.org/licenses/MIT)
-
+- Apache License, Version 2.0, ([LICENSE-APACHE](LICENSE-APACHE) o http://www.apache.org/licenses/LICENSE-2.0)
+- MIT license ([LICENSE-MIT](LICENSE-MIT) o http://opensource.org/licenses/MIT)
 
 ### Contribución
 
 A menos de que lo menciones, cualquier contribución enviada por ti para su inclusión en este trabajo,
 tal como se define en la licencia Apache-2.0, deberá tener doble licencia como se muestra en la parte superior, sin ningún
 cambio de términos o condiciones.
-
-

From 722e8b72329f5462945190df7843be8a3c36edfa Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Thu, 31 Mar 2022 22:09:17 +0200
Subject: [PATCH 118/214] Print a timestamp on panic

---
 07_timestamps/README.md                       |  72 +++++++++++-------
 07_timestamps/src/_arch/aarch64/time.rs       |   2 +
 07_timestamps/src/panic_wait.rs               |  17 ++++-
 07_timestamps/src/print.rs                    |  36 +++------
 08_hw_debug_JTAG/src/_arch/aarch64/time.rs    |   2 +
 08_hw_debug_JTAG/src/panic_wait.rs            |  17 ++++-
 08_hw_debug_JTAG/src/print.rs                 |  36 +++------
 09_privilege_level/src/_arch/aarch64/time.rs  |   2 +
 09_privilege_level/src/panic_wait.rs          |  17 ++++-
 09_privilege_level/src/print.rs               |  36 +++------
 .../src/_arch/aarch64/time.rs                 |   2 +
 .../src/panic_wait.rs                         |  17 ++++-
 .../src/print.rs                              |  36 +++------
 .../src/_arch/aarch64/time.rs                 |   2 +
 .../src/panic_wait.rs                         |  17 ++++-
 11_exceptions_part1_groundwork/src/print.rs   |  36 +++------
 12_integrated_testing/README.md               |  15 ++--
 .../src/_arch/aarch64/time.rs                 |   2 +
 12_integrated_testing/src/panic_wait.rs       |  17 ++++-
 12_integrated_testing/src/print.rs            |  36 +++------
 .../tests/02_exception_sync_page_fault.rs     |   6 +-
 13_exceptions_part2_peripheral_IRQs/README.md |  10 +--
 .../src/_arch/aarch64/time.rs                 |   2 +
 .../src/panic_wait.rs                         |  17 ++++-
 .../src/print.rs                              |  36 +++------
 .../tests/02_exception_sync_page_fault.rs     |   6 +-
 14_virtual_mem_part2_mmio_remap/README.md     |   8 +-
 .../src/_arch/aarch64/time.rs                 |   2 +
 .../src/panic_wait.rs                         |  17 ++++-
 14_virtual_mem_part2_mmio_remap/src/print.rs  |  36 +++------
 .../tests/02_exception_sync_page_fault.rs     |   8 +-
 .../README.md                                 |   6 +-
 .../src/_arch/aarch64/time.rs                 |   2 +
 .../src/panic_wait.rs                         |  17 ++++-
 .../src/print.rs                              |  36 +++------
 .../tests/02_exception_sync_page_fault.rs     |   4 +-
 .../README.md                                 |   4 +-
 .../src/_arch/aarch64/time.rs                 |   2 +
 .../src/panic_wait.rs                         |  17 ++++-
 .../src/print.rs                              |  36 +++------
 .../tests/02_exception_sync_page_fault.rs     |   4 +-
 X1_JTAG_boot/jtag_boot_rpi3.img               | Bin 7808 -> 7808 bytes
 X1_JTAG_boot/jtag_boot_rpi4.img               | Bin 6528 -> 6832 bytes
 X1_JTAG_boot/src/_arch/aarch64/time.rs        |   2 +
 X1_JTAG_boot/src/panic_wait.rs                |  17 ++++-
 X1_JTAG_boot/src/print.rs                     |  36 +++------
 46 files changed, 400 insertions(+), 348 deletions(-)

diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index 3e1100300..762e3cb30 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -248,7 +248,7 @@ diff -uNr 06_uart_chainloader/src/_arch/aarch64/cpu.rs 07_timestamps/src/_arch/a
 diff -uNr 06_uart_chainloader/src/_arch/aarch64/time.rs 07_timestamps/src/_arch/aarch64/time.rs
 --- 06_uart_chainloader/src/_arch/aarch64/time.rs
 +++ 07_timestamps/src/_arch/aarch64/time.rs
-@@ -0,0 +1,119 @@
+@@ -0,0 +1,121 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
@@ -329,6 +329,7 @@ diff -uNr 06_uart_chainloader/src/_arch/aarch64/time.rs 07_timestamps/src/_arch/
 +        // Calculate the register compare value.
 +        let frq = CNTFRQ_EL0.get();
 +        let x = match frq.checked_mul(duration.as_nanos() as u64) {
++            #[allow(unused_imports)]
 +            None => {
 +                warn!("Spin duration too long, skipping");
 +                return;
@@ -347,6 +348,7 @@ diff -uNr 06_uart_chainloader/src/_arch/aarch64/time.rs 07_timestamps/src/_arch/
 +            None
 +        };
 +
++        #[allow(unused_imports)]
 +        if let Some(w) = warn {
 +            warn!(
 +                "Spin duration {} than architecturally supported, skipping",
@@ -630,10 +632,40 @@ diff -uNr 06_uart_chainloader/src/main.rs 07_timestamps/src/main.rs
 +    }
  }
 
+diff -uNr 06_uart_chainloader/src/panic_wait.rs 07_timestamps/src/panic_wait.rs
+--- 06_uart_chainloader/src/panic_wait.rs
++++ 07_timestamps/src/panic_wait.rs
+@@ -29,10 +29,23 @@
+
+ #[panic_handler]
+ fn panic(info: &PanicInfo) -> ! {
++    use crate::time::interface::TimeManager;
++
++    let timestamp = crate::time::time_manager().uptime();
++
+     if let Some(args) = info.message() {
+-        panic_println!("\nKernel panic: {}", args);
++        panic_println!(
++            "[  {:>3}.{:06}] Kernel panic: {}",
++            timestamp.as_secs(),
++            timestamp.subsec_micros(),
++            args,
++        );
+     } else {
+-        panic_println!("\nKernel panic!");
++        panic_println!(
++            "[  {:>3}.{:06}] Kernel panic!",
++            timestamp.as_secs(),
++            timestamp.subsec_micros(),
++        );
+     }
+
+     cpu::wait_forever()
+
 diff -uNr 06_uart_chainloader/src/print.rs 07_timestamps/src/print.rs
 --- 06_uart_chainloader/src/print.rs
 +++ 07_timestamps/src/print.rs
-@@ -36,3 +36,71 @@
+@@ -36,3 +36,59 @@
          $crate::print::_print(format_args_nl!($($arg)*));
      })
  }
@@ -642,31 +674,25 @@ diff -uNr 06_uart_chainloader/src/print.rs 07_timestamps/src/print.rs
 +#[macro_export]
 +macro_rules! info {
 +    ($string:expr) => ({
-+        #[allow(unused_imports)]
-+        use crate::time::interface::TimeManager;
++        use $crate::time::interface::TimeManager;
 +
 +        let timestamp = $crate::time::time_manager().uptime();
-+        let timestamp_subsec_us = timestamp.subsec_micros();
 +
 +        $crate::print::_print(format_args_nl!(
-+            concat!("[  {:>3}.{:03}{:03}] ", $string),
++            concat!("[  {:>3}.{:06}] ", $string),
 +            timestamp.as_secs(),
-+            timestamp_subsec_us / 1_000,
-+            timestamp_subsec_us modulo 1_000
++            timestamp.subsec_micros(),
 +        ));
 +    });
 +    ($format_string:expr, $($arg:tt)*) => ({
-+        #[allow(unused_imports)]
-+        use crate::time::interface::TimeManager;
++        use $crate::time::interface::TimeManager;
 +
 +        let timestamp = $crate::time::time_manager().uptime();
-+        let timestamp_subsec_us = timestamp.subsec_micros();
 +
 +        $crate::print::_print(format_args_nl!(
-+            concat!("[  {:>3}.{:03}{:03}] ", $format_string),
++            concat!("[  {:>3}.{:06}] ", $format_string),
 +            timestamp.as_secs(),
-+            timestamp_subsec_us / 1_000,
-+            timestamp_subsec_us modulo 1_000,
++            timestamp.subsec_micros(),
 +            $($arg)*
 +        ));
 +    })
@@ -676,31 +702,25 @@ diff -uNr 06_uart_chainloader/src/print.rs 07_timestamps/src/print.rs
 +#[macro_export]
 +macro_rules! warn {
 +    ($string:expr) => ({
-+        #[allow(unused_imports)]
-+        use crate::time::interface::TimeManager;
++        use $crate::time::interface::TimeManager;
 +
 +        let timestamp = $crate::time::time_manager().uptime();
-+        let timestamp_subsec_us = timestamp.subsec_micros();
 +
 +        $crate::print::_print(format_args_nl!(
-+            concat!("[W {:>3}.{:03}{:03}] ", $string),
++            concat!("[W {:>3}.{:06}] ", $string),
 +            timestamp.as_secs(),
-+            timestamp_subsec_us / 1_000,
-+            timestamp_subsec_us modulo 1_000
++            timestamp.subsec_micros(),
 +        ));
 +    });
 +    ($format_string:expr, $($arg:tt)*) => ({
-+        #[allow(unused_imports)]
-+        use crate::time::interface::TimeManager;
++        use $crate::time::interface::TimeManager;
 +
 +        let timestamp = $crate::time::time_manager().uptime();
-+        let timestamp_subsec_us = timestamp.subsec_micros();
 +
 +        $crate::print::_print(format_args_nl!(
-+            concat!("[W {:>3}.{:03}{:03}] ", $format_string),
++            concat!("[W {:>3}.{:06}] ", $format_string),
 +            timestamp.as_secs(),
-+            timestamp_subsec_us / 1_000,
-+            timestamp_subsec_us modulo 1_000,
++            timestamp.subsec_micros(),
 +            $($arg)*
 +        ));
 +    })
diff --git a/07_timestamps/src/_arch/aarch64/time.rs b/07_timestamps/src/_arch/aarch64/time.rs
index 576248390..c814219ca 100644
--- a/07_timestamps/src/_arch/aarch64/time.rs
+++ b/07_timestamps/src/_arch/aarch64/time.rs
@@ -78,6 +78,7 @@ impl time::interface::TimeManager for GenericTimer {
         // Calculate the register compare value.
         let frq = CNTFRQ_EL0.get();
         let x = match frq.checked_mul(duration.as_nanos() as u64) {
+            #[allow(unused_imports)]
             None => {
                 warn!("Spin duration too long, skipping");
                 return;
@@ -96,6 +97,7 @@ impl time::interface::TimeManager for GenericTimer {
             None
         };
 
+        #[allow(unused_imports)]
         if let Some(w) = warn {
             warn!(
                 "Spin duration {} than architecturally supported, skipping",
diff --git a/07_timestamps/src/panic_wait.rs b/07_timestamps/src/panic_wait.rs
index 946041b32..923db3299 100644
--- a/07_timestamps/src/panic_wait.rs
+++ b/07_timestamps/src/panic_wait.rs
@@ -29,10 +29,23 @@ macro_rules! panic_println {
 
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
+    use crate::time::interface::TimeManager;
+
+    let timestamp = crate::time::time_manager().uptime();
+
     if let Some(args) = info.message() {
-        panic_println!("\nKernel panic: {}", args);
+        panic_println!(
+            "[  {:>3}.{:06}] Kernel panic: {}",
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+            args,
+        );
     } else {
-        panic_println!("\nKernel panic!");
+        panic_println!(
+            "[  {:>3}.{:06}] Kernel panic!",
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+        );
     }
 
     cpu::wait_forever()
diff --git a/07_timestamps/src/print.rs b/07_timestamps/src/print.rs
index 5decb2926..9ec13a286 100644
--- a/07_timestamps/src/print.rs
+++ b/07_timestamps/src/print.rs
@@ -41,31 +41,25 @@ macro_rules! println {
 #[macro_export]
 macro_rules! info {
     ($string:expr) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[  {:>3}.{:03}{:03}] ", $string),
+            concat!("[  {:>3}.{:06}] ", $string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000
+            timestamp.subsec_micros(),
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[  {:>3}.{:03}{:03}] ", $format_string),
+            concat!("[  {:>3}.{:06}] ", $format_string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000,
+            timestamp.subsec_micros(),
             $($arg)*
         ));
     })
@@ -75,31 +69,25 @@ macro_rules! info {
 #[macro_export]
 macro_rules! warn {
     ($string:expr) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[W {:>3}.{:03}{:03}] ", $string),
+            concat!("[W {:>3}.{:06}] ", $string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000
+            timestamp.subsec_micros(),
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[W {:>3}.{:03}{:03}] ", $format_string),
+            concat!("[W {:>3}.{:06}] ", $format_string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000,
+            timestamp.subsec_micros(),
             $($arg)*
         ));
     })
diff --git a/08_hw_debug_JTAG/src/_arch/aarch64/time.rs b/08_hw_debug_JTAG/src/_arch/aarch64/time.rs
index 576248390..c814219ca 100644
--- a/08_hw_debug_JTAG/src/_arch/aarch64/time.rs
+++ b/08_hw_debug_JTAG/src/_arch/aarch64/time.rs
@@ -78,6 +78,7 @@ impl time::interface::TimeManager for GenericTimer {
         // Calculate the register compare value.
         let frq = CNTFRQ_EL0.get();
         let x = match frq.checked_mul(duration.as_nanos() as u64) {
+            #[allow(unused_imports)]
             None => {
                 warn!("Spin duration too long, skipping");
                 return;
@@ -96,6 +97,7 @@ impl time::interface::TimeManager for GenericTimer {
             None
         };
 
+        #[allow(unused_imports)]
         if let Some(w) = warn {
             warn!(
                 "Spin duration {} than architecturally supported, skipping",
diff --git a/08_hw_debug_JTAG/src/panic_wait.rs b/08_hw_debug_JTAG/src/panic_wait.rs
index 946041b32..923db3299 100644
--- a/08_hw_debug_JTAG/src/panic_wait.rs
+++ b/08_hw_debug_JTAG/src/panic_wait.rs
@@ -29,10 +29,23 @@ macro_rules! panic_println {
 
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
+    use crate::time::interface::TimeManager;
+
+    let timestamp = crate::time::time_manager().uptime();
+
     if let Some(args) = info.message() {
-        panic_println!("\nKernel panic: {}", args);
+        panic_println!(
+            "[  {:>3}.{:06}] Kernel panic: {}",
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+            args,
+        );
     } else {
-        panic_println!("\nKernel panic!");
+        panic_println!(
+            "[  {:>3}.{:06}] Kernel panic!",
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+        );
     }
 
     cpu::wait_forever()
diff --git a/08_hw_debug_JTAG/src/print.rs b/08_hw_debug_JTAG/src/print.rs
index 5decb2926..9ec13a286 100644
--- a/08_hw_debug_JTAG/src/print.rs
+++ b/08_hw_debug_JTAG/src/print.rs
@@ -41,31 +41,25 @@ macro_rules! println {
 #[macro_export]
 macro_rules! info {
     ($string:expr) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[  {:>3}.{:03}{:03}] ", $string),
+            concat!("[  {:>3}.{:06}] ", $string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000
+            timestamp.subsec_micros(),
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[  {:>3}.{:03}{:03}] ", $format_string),
+            concat!("[  {:>3}.{:06}] ", $format_string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000,
+            timestamp.subsec_micros(),
             $($arg)*
         ));
     })
@@ -75,31 +69,25 @@ macro_rules! info {
 #[macro_export]
 macro_rules! warn {
     ($string:expr) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[W {:>3}.{:03}{:03}] ", $string),
+            concat!("[W {:>3}.{:06}] ", $string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000
+            timestamp.subsec_micros(),
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[W {:>3}.{:03}{:03}] ", $format_string),
+            concat!("[W {:>3}.{:06}] ", $format_string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000,
+            timestamp.subsec_micros(),
             $($arg)*
         ));
     })
diff --git a/09_privilege_level/src/_arch/aarch64/time.rs b/09_privilege_level/src/_arch/aarch64/time.rs
index 576248390..c814219ca 100644
--- a/09_privilege_level/src/_arch/aarch64/time.rs
+++ b/09_privilege_level/src/_arch/aarch64/time.rs
@@ -78,6 +78,7 @@ impl time::interface::TimeManager for GenericTimer {
         // Calculate the register compare value.
         let frq = CNTFRQ_EL0.get();
         let x = match frq.checked_mul(duration.as_nanos() as u64) {
+            #[allow(unused_imports)]
             None => {
                 warn!("Spin duration too long, skipping");
                 return;
@@ -96,6 +97,7 @@ impl time::interface::TimeManager for GenericTimer {
             None
         };
 
+        #[allow(unused_imports)]
         if let Some(w) = warn {
             warn!(
                 "Spin duration {} than architecturally supported, skipping",
diff --git a/09_privilege_level/src/panic_wait.rs b/09_privilege_level/src/panic_wait.rs
index 946041b32..923db3299 100644
--- a/09_privilege_level/src/panic_wait.rs
+++ b/09_privilege_level/src/panic_wait.rs
@@ -29,10 +29,23 @@ macro_rules! panic_println {
 
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
+    use crate::time::interface::TimeManager;
+
+    let timestamp = crate::time::time_manager().uptime();
+
     if let Some(args) = info.message() {
-        panic_println!("\nKernel panic: {}", args);
+        panic_println!(
+            "[  {:>3}.{:06}] Kernel panic: {}",
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+            args,
+        );
     } else {
-        panic_println!("\nKernel panic!");
+        panic_println!(
+            "[  {:>3}.{:06}] Kernel panic!",
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+        );
     }
 
     cpu::wait_forever()
diff --git a/09_privilege_level/src/print.rs b/09_privilege_level/src/print.rs
index 5decb2926..9ec13a286 100644
--- a/09_privilege_level/src/print.rs
+++ b/09_privilege_level/src/print.rs
@@ -41,31 +41,25 @@ macro_rules! println {
 #[macro_export]
 macro_rules! info {
     ($string:expr) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[  {:>3}.{:03}{:03}] ", $string),
+            concat!("[  {:>3}.{:06}] ", $string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000
+            timestamp.subsec_micros(),
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[  {:>3}.{:03}{:03}] ", $format_string),
+            concat!("[  {:>3}.{:06}] ", $format_string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000,
+            timestamp.subsec_micros(),
             $($arg)*
         ));
     })
@@ -75,31 +69,25 @@ macro_rules! info {
 #[macro_export]
 macro_rules! warn {
     ($string:expr) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[W {:>3}.{:03}{:03}] ", $string),
+            concat!("[W {:>3}.{:06}] ", $string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000
+            timestamp.subsec_micros(),
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[W {:>3}.{:03}{:03}] ", $format_string),
+            concat!("[W {:>3}.{:06}] ", $format_string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000,
+            timestamp.subsec_micros(),
             $($arg)*
         ));
     })
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs
index 576248390..c814219ca 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs
@@ -78,6 +78,7 @@ impl time::interface::TimeManager for GenericTimer {
         // Calculate the register compare value.
         let frq = CNTFRQ_EL0.get();
         let x = match frq.checked_mul(duration.as_nanos() as u64) {
+            #[allow(unused_imports)]
             None => {
                 warn!("Spin duration too long, skipping");
                 return;
@@ -96,6 +97,7 @@ impl time::interface::TimeManager for GenericTimer {
             None
         };
 
+        #[allow(unused_imports)]
         if let Some(w) = warn {
             warn!(
                 "Spin duration {} than architecturally supported, skipping",
diff --git a/10_virtual_mem_part1_identity_mapping/src/panic_wait.rs b/10_virtual_mem_part1_identity_mapping/src/panic_wait.rs
index 946041b32..923db3299 100644
--- a/10_virtual_mem_part1_identity_mapping/src/panic_wait.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/panic_wait.rs
@@ -29,10 +29,23 @@ macro_rules! panic_println {
 
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
+    use crate::time::interface::TimeManager;
+
+    let timestamp = crate::time::time_manager().uptime();
+
     if let Some(args) = info.message() {
-        panic_println!("\nKernel panic: {}", args);
+        panic_println!(
+            "[  {:>3}.{:06}] Kernel panic: {}",
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+            args,
+        );
     } else {
-        panic_println!("\nKernel panic!");
+        panic_println!(
+            "[  {:>3}.{:06}] Kernel panic!",
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+        );
     }
 
     cpu::wait_forever()
diff --git a/10_virtual_mem_part1_identity_mapping/src/print.rs b/10_virtual_mem_part1_identity_mapping/src/print.rs
index 5decb2926..9ec13a286 100644
--- a/10_virtual_mem_part1_identity_mapping/src/print.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/print.rs
@@ -41,31 +41,25 @@ macro_rules! println {
 #[macro_export]
 macro_rules! info {
     ($string:expr) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[  {:>3}.{:03}{:03}] ", $string),
+            concat!("[  {:>3}.{:06}] ", $string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000
+            timestamp.subsec_micros(),
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[  {:>3}.{:03}{:03}] ", $format_string),
+            concat!("[  {:>3}.{:06}] ", $format_string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000,
+            timestamp.subsec_micros(),
             $($arg)*
         ));
     })
@@ -75,31 +69,25 @@ macro_rules! info {
 #[macro_export]
 macro_rules! warn {
     ($string:expr) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[W {:>3}.{:03}{:03}] ", $string),
+            concat!("[W {:>3}.{:06}] ", $string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000
+            timestamp.subsec_micros(),
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[W {:>3}.{:03}{:03}] ", $format_string),
+            concat!("[W {:>3}.{:06}] ", $format_string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000,
+            timestamp.subsec_micros(),
             $($arg)*
         ));
     })
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/time.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/time.rs
index 576248390..c814219ca 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/time.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/time.rs
@@ -78,6 +78,7 @@ impl time::interface::TimeManager for GenericTimer {
         // Calculate the register compare value.
         let frq = CNTFRQ_EL0.get();
         let x = match frq.checked_mul(duration.as_nanos() as u64) {
+            #[allow(unused_imports)]
             None => {
                 warn!("Spin duration too long, skipping");
                 return;
@@ -96,6 +97,7 @@ impl time::interface::TimeManager for GenericTimer {
             None
         };
 
+        #[allow(unused_imports)]
         if let Some(w) = warn {
             warn!(
                 "Spin duration {} than architecturally supported, skipping",
diff --git a/11_exceptions_part1_groundwork/src/panic_wait.rs b/11_exceptions_part1_groundwork/src/panic_wait.rs
index 946041b32..923db3299 100644
--- a/11_exceptions_part1_groundwork/src/panic_wait.rs
+++ b/11_exceptions_part1_groundwork/src/panic_wait.rs
@@ -29,10 +29,23 @@ macro_rules! panic_println {
 
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
+    use crate::time::interface::TimeManager;
+
+    let timestamp = crate::time::time_manager().uptime();
+
     if let Some(args) = info.message() {
-        panic_println!("\nKernel panic: {}", args);
+        panic_println!(
+            "[  {:>3}.{:06}] Kernel panic: {}",
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+            args,
+        );
     } else {
-        panic_println!("\nKernel panic!");
+        panic_println!(
+            "[  {:>3}.{:06}] Kernel panic!",
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+        );
     }
 
     cpu::wait_forever()
diff --git a/11_exceptions_part1_groundwork/src/print.rs b/11_exceptions_part1_groundwork/src/print.rs
index 5decb2926..9ec13a286 100644
--- a/11_exceptions_part1_groundwork/src/print.rs
+++ b/11_exceptions_part1_groundwork/src/print.rs
@@ -41,31 +41,25 @@ macro_rules! println {
 #[macro_export]
 macro_rules! info {
     ($string:expr) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[  {:>3}.{:03}{:03}] ", $string),
+            concat!("[  {:>3}.{:06}] ", $string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000
+            timestamp.subsec_micros(),
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[  {:>3}.{:03}{:03}] ", $format_string),
+            concat!("[  {:>3}.{:06}] ", $format_string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000,
+            timestamp.subsec_micros(),
             $($arg)*
         ));
     })
@@ -75,31 +69,25 @@ macro_rules! info {
 #[macro_export]
 macro_rules! warn {
     ($string:expr) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[W {:>3}.{:03}{:03}] ", $string),
+            concat!("[W {:>3}.{:06}] ", $string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000
+            timestamp.subsec_micros(),
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[W {:>3}.{:03}{:03}] ", $format_string),
+            concat!("[W {:>3}.{:06}] ", $format_string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000,
+            timestamp.subsec_micros(),
             $($arg)*
         ));
     })
diff --git a/12_integrated_testing/README.md b/12_integrated_testing/README.md
index 48fd1876d..71ee33426 100644
--- a/12_integrated_testing/README.md
+++ b/12_integrated_testing/README.md
@@ -849,9 +849,8 @@ Compiling integration test(s) - rpi3
          🦀 Testing synchronous exception handling by causing a page fault
          -------------------------------------------------------------------
 
-         Writing beyond mapped area to address 9 GiB...
-
-         Kernel panic:
+         [    0.163030] Writing beyond mapped area to address 9 GiB...
+         [    0.164791] Kernel panic:
 
          CPU Exception!
          ESR_EL1: 0x96000004
@@ -1698,8 +1697,8 @@ diff -uNr 11_exceptions_part1_groundwork/src/panic_wait.rs 12_integrated_testing
  /// Prints with a newline - only use from the panic handler.
  ///
  /// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
-@@ -35,5 +52,5 @@
-         panic_println!("\nKernel panic!");
+@@ -48,5 +65,5 @@
+         );
      }
 
 -    cpu::wait_forever()
@@ -1929,7 +1928,7 @@ diff -uNr 11_exceptions_part1_groundwork/tests/02_exception_sync_page_fault.rs 1
 +/// or indirectly.
 +mod panic_exit_success;
 +
-+use libkernel::{bsp, cpu, exception, memory, println};
++use libkernel::{bsp, cpu, exception, info, memory, println};
 +
 +#[no_mangle]
 +unsafe fn kernel_init() -> ! {
@@ -1942,11 +1941,11 @@ diff -uNr 11_exceptions_part1_groundwork/tests/02_exception_sync_page_fault.rs 1
 +    println!("Testing synchronous exception handling by causing a page fault");
 +
 +    if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
-+        println!("MMU: {}", string);
++        info!("MMU: {}", string);
 +        cpu::qemu_exit_failure()
 +    }
 +
-+    println!("Writing beyond mapped area to address 9 GiB...");
++    info!("Writing beyond mapped area to address 9 GiB...");
 +    let big_addr: u64 = 9 * 1024 * 1024 * 1024;
 +    core::ptr::read_volatile(big_addr as *mut u64);
 +
diff --git a/12_integrated_testing/src/_arch/aarch64/time.rs b/12_integrated_testing/src/_arch/aarch64/time.rs
index 576248390..c814219ca 100644
--- a/12_integrated_testing/src/_arch/aarch64/time.rs
+++ b/12_integrated_testing/src/_arch/aarch64/time.rs
@@ -78,6 +78,7 @@ impl time::interface::TimeManager for GenericTimer {
         // Calculate the register compare value.
         let frq = CNTFRQ_EL0.get();
         let x = match frq.checked_mul(duration.as_nanos() as u64) {
+            #[allow(unused_imports)]
             None => {
                 warn!("Spin duration too long, skipping");
                 return;
@@ -96,6 +97,7 @@ impl time::interface::TimeManager for GenericTimer {
             None
         };
 
+        #[allow(unused_imports)]
         if let Some(w) = warn {
             warn!(
                 "Spin duration {} than architecturally supported, skipping",
diff --git a/12_integrated_testing/src/panic_wait.rs b/12_integrated_testing/src/panic_wait.rs
index a20e37e19..2e56f1ce8 100644
--- a/12_integrated_testing/src/panic_wait.rs
+++ b/12_integrated_testing/src/panic_wait.rs
@@ -46,10 +46,23 @@ macro_rules! panic_println {
 
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
+    use crate::time::interface::TimeManager;
+
+    let timestamp = crate::time::time_manager().uptime();
+
     if let Some(args) = info.message() {
-        panic_println!("\nKernel panic: {}", args);
+        panic_println!(
+            "[  {:>3}.{:06}] Kernel panic: {}",
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+            args,
+        );
     } else {
-        panic_println!("\nKernel panic!");
+        panic_println!(
+            "[  {:>3}.{:06}] Kernel panic!",
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+        );
     }
 
     _panic_exit()
diff --git a/12_integrated_testing/src/print.rs b/12_integrated_testing/src/print.rs
index 5decb2926..9ec13a286 100644
--- a/12_integrated_testing/src/print.rs
+++ b/12_integrated_testing/src/print.rs
@@ -41,31 +41,25 @@ macro_rules! println {
 #[macro_export]
 macro_rules! info {
     ($string:expr) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[  {:>3}.{:03}{:03}] ", $string),
+            concat!("[  {:>3}.{:06}] ", $string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000
+            timestamp.subsec_micros(),
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[  {:>3}.{:03}{:03}] ", $format_string),
+            concat!("[  {:>3}.{:06}] ", $format_string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000,
+            timestamp.subsec_micros(),
             $($arg)*
         ));
     })
@@ -75,31 +69,25 @@ macro_rules! info {
 #[macro_export]
 macro_rules! warn {
     ($string:expr) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[W {:>3}.{:03}{:03}] ", $string),
+            concat!("[W {:>3}.{:06}] ", $string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000
+            timestamp.subsec_micros(),
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[W {:>3}.{:03}{:03}] ", $format_string),
+            concat!("[W {:>3}.{:06}] ", $format_string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000,
+            timestamp.subsec_micros(),
             $($arg)*
         ));
     })
diff --git a/12_integrated_testing/tests/02_exception_sync_page_fault.rs b/12_integrated_testing/tests/02_exception_sync_page_fault.rs
index 1c4133e18..9be94acde 100644
--- a/12_integrated_testing/tests/02_exception_sync_page_fault.rs
+++ b/12_integrated_testing/tests/02_exception_sync_page_fault.rs
@@ -17,7 +17,7 @@
 /// or indirectly.
 mod panic_exit_success;
 
-use libkernel::{bsp, cpu, exception, memory, println};
+use libkernel::{bsp, cpu, exception, info, memory, println};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
@@ -30,11 +30,11 @@ unsafe fn kernel_init() -> ! {
     println!("Testing synchronous exception handling by causing a page fault");
 
     if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
-        println!("MMU: {}", string);
+        info!("MMU: {}", string);
         cpu::qemu_exit_failure()
     }
 
-    println!("Writing beyond mapped area to address 9 GiB...");
+    info!("Writing beyond mapped area to address 9 GiB...");
     let big_addr: u64 = 9 * 1024 * 1024 * 1024;
     core::ptr::read_volatile(big_addr as *mut u64);
 
diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index df20c15be..42b984b73 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -2511,15 +2511,15 @@ diff -uNr 12_integrated_testing/src/panic_wait.rs 13_exceptions_part2_peripheral
  use core::{fmt, panic::PanicInfo};
 
  //--------------------------------------------------------------------------------------------------
-@@ -46,6 +46,8 @@
-
- #[panic_handler]
+@@ -48,6 +48,8 @@
  fn panic(info: &PanicInfo) -> ! {
+     use crate::time::interface::TimeManager;
+
 +    unsafe { exception::asynchronous::local_irq_mask() };
 +
+     let timestamp = crate::time::time_manager().uptime();
+
      if let Some(args) = info.message() {
-         panic_println!("\nKernel panic: {}", args);
-     } else {
 
 diff -uNr 12_integrated_testing/src/state.rs 13_exceptions_part2_peripheral_IRQs/src/state.rs
 --- 12_integrated_testing/src/state.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/time.rs b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/time.rs
index 576248390..c814219ca 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/time.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/time.rs
@@ -78,6 +78,7 @@ impl time::interface::TimeManager for GenericTimer {
         // Calculate the register compare value.
         let frq = CNTFRQ_EL0.get();
         let x = match frq.checked_mul(duration.as_nanos() as u64) {
+            #[allow(unused_imports)]
             None => {
                 warn!("Spin duration too long, skipping");
                 return;
@@ -96,6 +97,7 @@ impl time::interface::TimeManager for GenericTimer {
             None
         };
 
+        #[allow(unused_imports)]
         if let Some(w) = warn {
             warn!(
                 "Spin duration {} than architecturally supported, skipping",
diff --git a/13_exceptions_part2_peripheral_IRQs/src/panic_wait.rs b/13_exceptions_part2_peripheral_IRQs/src/panic_wait.rs
index 0f958f288..da7106c9c 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/panic_wait.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/panic_wait.rs
@@ -46,12 +46,25 @@ macro_rules! panic_println {
 
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
+    use crate::time::interface::TimeManager;
+
     unsafe { exception::asynchronous::local_irq_mask() };
 
+    let timestamp = crate::time::time_manager().uptime();
+
     if let Some(args) = info.message() {
-        panic_println!("\nKernel panic: {}", args);
+        panic_println!(
+            "[  {:>3}.{:06}] Kernel panic: {}",
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+            args,
+        );
     } else {
-        panic_println!("\nKernel panic!");
+        panic_println!(
+            "[  {:>3}.{:06}] Kernel panic!",
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+        );
     }
 
     _panic_exit()
diff --git a/13_exceptions_part2_peripheral_IRQs/src/print.rs b/13_exceptions_part2_peripheral_IRQs/src/print.rs
index 5decb2926..9ec13a286 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/print.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/print.rs
@@ -41,31 +41,25 @@ macro_rules! println {
 #[macro_export]
 macro_rules! info {
     ($string:expr) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[  {:>3}.{:03}{:03}] ", $string),
+            concat!("[  {:>3}.{:06}] ", $string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000
+            timestamp.subsec_micros(),
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[  {:>3}.{:03}{:03}] ", $format_string),
+            concat!("[  {:>3}.{:06}] ", $format_string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000,
+            timestamp.subsec_micros(),
             $($arg)*
         ));
     })
@@ -75,31 +69,25 @@ macro_rules! info {
 #[macro_export]
 macro_rules! warn {
     ($string:expr) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[W {:>3}.{:03}{:03}] ", $string),
+            concat!("[W {:>3}.{:06}] ", $string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000
+            timestamp.subsec_micros(),
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[W {:>3}.{:03}{:03}] ", $format_string),
+            concat!("[W {:>3}.{:06}] ", $format_string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000,
+            timestamp.subsec_micros(),
             $($arg)*
         ));
     })
diff --git a/13_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs b/13_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs
index 1c4133e18..9be94acde 100644
--- a/13_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs
+++ b/13_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs
@@ -17,7 +17,7 @@
 /// or indirectly.
 mod panic_exit_success;
 
-use libkernel::{bsp, cpu, exception, memory, println};
+use libkernel::{bsp, cpu, exception, info, memory, println};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
@@ -30,11 +30,11 @@ unsafe fn kernel_init() -> ! {
     println!("Testing synchronous exception handling by causing a page fault");
 
     if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
-        println!("MMU: {}", string);
+        info!("MMU: {}", string);
         cpu::qemu_exit_failure()
     }
 
-    println!("Writing beyond mapped area to address 9 GiB...");
+    info!("Writing beyond mapped area to address 9 GiB...");
     let big_addr: u64 = 9 * 1024 * 1024 * 1024;
     core::ptr::read_volatile(big_addr as *mut u64);
 
diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index 82fa51a2a..3f6c78e93 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -3609,17 +3609,17 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault
      println!("Testing synchronous exception handling by causing a page fault");
 
 -    if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
--        println!("MMU: {}", string);
+-        info!("MMU: {}", string);
 +    let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
 +        Err(string) => {
-+            println!("Error mapping kernel binary: {}", string);
++            info!("Error mapping kernel binary: {}", string);
 +            cpu::qemu_exit_failure()
 +        }
 +        Ok(addr) => addr,
 +    };
 +
 +    if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
-+        println!("Enabling MMU failed: {}", e);
++        info!("Enabling MMU failed: {}", e);
          cpu::qemu_exit_failure()
      }
 +    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
@@ -3638,7 +3638,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault
 +    bsp::driver::driver_manager().post_early_print_device_driver_init();
 +    // Printing available again from here on.
 
-     println!("Writing beyond mapped area to address 9 GiB...");
+     info!("Writing beyond mapped area to address 9 GiB...");
      let big_addr: u64 = 9 * 1024 * 1024 * 1024;
 
 ```
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/time.rs b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/time.rs
index 576248390..c814219ca 100644
--- a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/time.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/time.rs
@@ -78,6 +78,7 @@ impl time::interface::TimeManager for GenericTimer {
         // Calculate the register compare value.
         let frq = CNTFRQ_EL0.get();
         let x = match frq.checked_mul(duration.as_nanos() as u64) {
+            #[allow(unused_imports)]
             None => {
                 warn!("Spin duration too long, skipping");
                 return;
@@ -96,6 +97,7 @@ impl time::interface::TimeManager for GenericTimer {
             None
         };
 
+        #[allow(unused_imports)]
         if let Some(w) = warn {
             warn!(
                 "Spin duration {} than architecturally supported, skipping",
diff --git a/14_virtual_mem_part2_mmio_remap/src/panic_wait.rs b/14_virtual_mem_part2_mmio_remap/src/panic_wait.rs
index 0f958f288..da7106c9c 100644
--- a/14_virtual_mem_part2_mmio_remap/src/panic_wait.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/panic_wait.rs
@@ -46,12 +46,25 @@ macro_rules! panic_println {
 
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
+    use crate::time::interface::TimeManager;
+
     unsafe { exception::asynchronous::local_irq_mask() };
 
+    let timestamp = crate::time::time_manager().uptime();
+
     if let Some(args) = info.message() {
-        panic_println!("\nKernel panic: {}", args);
+        panic_println!(
+            "[  {:>3}.{:06}] Kernel panic: {}",
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+            args,
+        );
     } else {
-        panic_println!("\nKernel panic!");
+        panic_println!(
+            "[  {:>3}.{:06}] Kernel panic!",
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+        );
     }
 
     _panic_exit()
diff --git a/14_virtual_mem_part2_mmio_remap/src/print.rs b/14_virtual_mem_part2_mmio_remap/src/print.rs
index 5decb2926..9ec13a286 100644
--- a/14_virtual_mem_part2_mmio_remap/src/print.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/print.rs
@@ -41,31 +41,25 @@ macro_rules! println {
 #[macro_export]
 macro_rules! info {
     ($string:expr) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[  {:>3}.{:03}{:03}] ", $string),
+            concat!("[  {:>3}.{:06}] ", $string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000
+            timestamp.subsec_micros(),
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[  {:>3}.{:03}{:03}] ", $format_string),
+            concat!("[  {:>3}.{:06}] ", $format_string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000,
+            timestamp.subsec_micros(),
             $($arg)*
         ));
     })
@@ -75,31 +69,25 @@ macro_rules! info {
 #[macro_export]
 macro_rules! warn {
     ($string:expr) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[W {:>3}.{:03}{:03}] ", $string),
+            concat!("[W {:>3}.{:06}] ", $string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000
+            timestamp.subsec_micros(),
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[W {:>3}.{:03}{:03}] ", $format_string),
+            concat!("[W {:>3}.{:06}] ", $format_string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000,
+            timestamp.subsec_micros(),
             $($arg)*
         ));
     })
diff --git a/14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs b/14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
index de92b2b2b..e146aa3ee 100644
--- a/14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
+++ b/14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
@@ -17,7 +17,7 @@
 /// or indirectly.
 mod panic_exit_success;
 
-use libkernel::{bsp, cpu, exception, memory, println};
+use libkernel::{bsp, cpu, exception, info, memory, println};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
@@ -30,14 +30,14 @@ unsafe fn kernel_init() -> ! {
 
     let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
         Err(string) => {
-            println!("Error mapping kernel binary: {}", string);
+            info!("Error mapping kernel binary: {}", string);
             cpu::qemu_exit_failure()
         }
         Ok(addr) => addr,
     };
 
     if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
-        println!("Enabling MMU failed: {}", e);
+        info!("Enabling MMU failed: {}", e);
         cpu::qemu_exit_failure()
     }
     // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
@@ -56,7 +56,7 @@ unsafe fn kernel_init() -> ! {
     bsp::driver::driver_manager().post_early_print_device_driver_init();
     // Printing available again from here on.
 
-    println!("Writing beyond mapped area to address 9 GiB...");
+    info!("Writing beyond mapped area to address 9 GiB...");
     let big_addr: u64 = 9 * 1024 * 1024 * 1024;
     core::ptr::read_volatile(big_addr as *mut u64);
 
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index b58ed67ee..4d7cc40eb 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -1739,14 +1739,14 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
 -
 -    let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
 -        Err(string) => {
--            println!("Error mapping kernel binary: {}", string);
+-            info!("Error mapping kernel binary: {}", string);
 -            cpu::qemu_exit_failure()
 -        }
 -        Ok(addr) => addr,
 -    };
 -
 -    if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
--        println!("Enabling MMU failed: {}", e);
+-        info!("Enabling MMU failed: {}", e);
 -        cpu::qemu_exit_failure()
 -    }
 -    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
@@ -1767,7 +1767,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
 +    // This line will be printed as the test header.
 +    println!("Testing synchronous exception handling by causing a page fault");
 
-     println!("Writing beyond mapped area to address 9 GiB...");
+     info!("Writing beyond mapped area to address 9 GiB...");
      let big_addr: u64 = 9 * 1024 * 1024 * 1024;
 
 diff -uNr 14_virtual_mem_part2_mmio_remap/tests/03_exception_irq_sanity.rs 15_virtual_mem_part3_precomputed_tables/tests/03_exception_irq_sanity.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/time.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/time.rs
index 576248390..c814219ca 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/time.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/time.rs
@@ -78,6 +78,7 @@ impl time::interface::TimeManager for GenericTimer {
         // Calculate the register compare value.
         let frq = CNTFRQ_EL0.get();
         let x = match frq.checked_mul(duration.as_nanos() as u64) {
+            #[allow(unused_imports)]
             None => {
                 warn!("Spin duration too long, skipping");
                 return;
@@ -96,6 +97,7 @@ impl time::interface::TimeManager for GenericTimer {
             None
         };
 
+        #[allow(unused_imports)]
         if let Some(w) = warn {
             warn!(
                 "Spin duration {} than architecturally supported, skipping",
diff --git a/15_virtual_mem_part3_precomputed_tables/src/panic_wait.rs b/15_virtual_mem_part3_precomputed_tables/src/panic_wait.rs
index 0f958f288..da7106c9c 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/panic_wait.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/panic_wait.rs
@@ -46,12 +46,25 @@ macro_rules! panic_println {
 
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
+    use crate::time::interface::TimeManager;
+
     unsafe { exception::asynchronous::local_irq_mask() };
 
+    let timestamp = crate::time::time_manager().uptime();
+
     if let Some(args) = info.message() {
-        panic_println!("\nKernel panic: {}", args);
+        panic_println!(
+            "[  {:>3}.{:06}] Kernel panic: {}",
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+            args,
+        );
     } else {
-        panic_println!("\nKernel panic!");
+        panic_println!(
+            "[  {:>3}.{:06}] Kernel panic!",
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+        );
     }
 
     _panic_exit()
diff --git a/15_virtual_mem_part3_precomputed_tables/src/print.rs b/15_virtual_mem_part3_precomputed_tables/src/print.rs
index 5decb2926..9ec13a286 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/print.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/print.rs
@@ -41,31 +41,25 @@ macro_rules! println {
 #[macro_export]
 macro_rules! info {
     ($string:expr) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[  {:>3}.{:03}{:03}] ", $string),
+            concat!("[  {:>3}.{:06}] ", $string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000
+            timestamp.subsec_micros(),
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[  {:>3}.{:03}{:03}] ", $format_string),
+            concat!("[  {:>3}.{:06}] ", $format_string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000,
+            timestamp.subsec_micros(),
             $($arg)*
         ));
     })
@@ -75,31 +69,25 @@ macro_rules! info {
 #[macro_export]
 macro_rules! warn {
     ($string:expr) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[W {:>3}.{:03}{:03}] ", $string),
+            concat!("[W {:>3}.{:06}] ", $string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000
+            timestamp.subsec_micros(),
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[W {:>3}.{:03}{:03}] ", $format_string),
+            concat!("[W {:>3}.{:06}] ", $format_string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000,
+            timestamp.subsec_micros(),
             $($arg)*
         ));
     })
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs b/15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs
index 2cf693fc8..2d4b0977f 100644
--- a/15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs
+++ b/15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs
@@ -17,7 +17,7 @@
 /// or indirectly.
 mod panic_exit_success;
 
-use libkernel::{bsp, cpu, exception, memory, println};
+use libkernel::{bsp, cpu, exception, info, memory, println};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
@@ -28,7 +28,7 @@ unsafe fn kernel_init() -> ! {
     // This line will be printed as the test header.
     println!("Testing synchronous exception handling by causing a page fault");
 
-    println!("Writing beyond mapped area to address 9 GiB...");
+    info!("Writing beyond mapped area to address 9 GiB...");
     let big_addr: u64 = 9 * 1024 * 1024 * 1024;
     core::ptr::read_volatile(big_addr as *mut u64);
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/README.md b/16_virtual_mem_part4_higher_half_kernel/README.md
index bde234391..487ce443d 100644
--- a/16_virtual_mem_part4_higher_half_kernel/README.md
+++ b/16_virtual_mem_part4_higher_half_kernel/README.md
@@ -877,9 +877,9 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_f
      // This line will be printed as the test header.
      println!("Testing synchronous exception handling by causing a page fault");
 
--    println!("Writing beyond mapped area to address 9 GiB...");
+-    info!("Writing beyond mapped area to address 9 GiB...");
 -    let big_addr: u64 = 9 * 1024 * 1024 * 1024;
-+    println!("Writing to bottom of address space to address 1 GiB...");
++    info!("Writing to bottom of address space to address 1 GiB...");
 +    let big_addr: u64 = 1 * 1024 * 1024 * 1024;
      core::ptr::read_volatile(big_addr as *mut u64);
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/time.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/time.rs
index 576248390..c814219ca 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/time.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/time.rs
@@ -78,6 +78,7 @@ impl time::interface::TimeManager for GenericTimer {
         // Calculate the register compare value.
         let frq = CNTFRQ_EL0.get();
         let x = match frq.checked_mul(duration.as_nanos() as u64) {
+            #[allow(unused_imports)]
             None => {
                 warn!("Spin duration too long, skipping");
                 return;
@@ -96,6 +97,7 @@ impl time::interface::TimeManager for GenericTimer {
             None
         };
 
+        #[allow(unused_imports)]
         if let Some(w) = warn {
             warn!(
                 "Spin duration {} than architecturally supported, skipping",
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/panic_wait.rs b/16_virtual_mem_part4_higher_half_kernel/src/panic_wait.rs
index 0f958f288..da7106c9c 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/panic_wait.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/panic_wait.rs
@@ -46,12 +46,25 @@ macro_rules! panic_println {
 
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
+    use crate::time::interface::TimeManager;
+
     unsafe { exception::asynchronous::local_irq_mask() };
 
+    let timestamp = crate::time::time_manager().uptime();
+
     if let Some(args) = info.message() {
-        panic_println!("\nKernel panic: {}", args);
+        panic_println!(
+            "[  {:>3}.{:06}] Kernel panic: {}",
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+            args,
+        );
     } else {
-        panic_println!("\nKernel panic!");
+        panic_println!(
+            "[  {:>3}.{:06}] Kernel panic!",
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+        );
     }
 
     _panic_exit()
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/print.rs b/16_virtual_mem_part4_higher_half_kernel/src/print.rs
index 5decb2926..9ec13a286 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/print.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/print.rs
@@ -41,31 +41,25 @@ macro_rules! println {
 #[macro_export]
 macro_rules! info {
     ($string:expr) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[  {:>3}.{:03}{:03}] ", $string),
+            concat!("[  {:>3}.{:06}] ", $string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000
+            timestamp.subsec_micros(),
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[  {:>3}.{:03}{:03}] ", $format_string),
+            concat!("[  {:>3}.{:06}] ", $format_string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000,
+            timestamp.subsec_micros(),
             $($arg)*
         ));
     })
@@ -75,31 +69,25 @@ macro_rules! info {
 #[macro_export]
 macro_rules! warn {
     ($string:expr) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[W {:>3}.{:03}{:03}] ", $string),
+            concat!("[W {:>3}.{:06}] ", $string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000
+            timestamp.subsec_micros(),
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[W {:>3}.{:03}{:03}] ", $format_string),
+            concat!("[W {:>3}.{:06}] ", $format_string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000,
+            timestamp.subsec_micros(),
             $($arg)*
         ));
     })
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs b/16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs
index b28246158..71b63e212 100644
--- a/16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs
@@ -17,7 +17,7 @@
 /// or indirectly.
 mod panic_exit_success;
 
-use libkernel::{bsp, cpu, exception, memory, println};
+use libkernel::{bsp, cpu, exception, info, memory, println};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
@@ -28,7 +28,7 @@ unsafe fn kernel_init() -> ! {
     // This line will be printed as the test header.
     println!("Testing synchronous exception handling by causing a page fault");
 
-    println!("Writing to bottom of address space to address 1 GiB...");
+    info!("Writing to bottom of address space to address 1 GiB...");
     let big_addr: u64 = 1 * 1024 * 1024 * 1024;
     core::ptr::read_volatile(big_addr as *mut u64);
 
diff --git a/X1_JTAG_boot/jtag_boot_rpi3.img b/X1_JTAG_boot/jtag_boot_rpi3.img
index 752daff808a7e211ccd731e16780a081ca9ffbea..64189d659354f3894c8887bc419ede120173112f 100755
GIT binary patch
delta 2195
zcmai#ZA?>F7{|}KmzLY2NTC8!gqBX)f>^a6=@vtQ#6ekR(z&QxHc{r%3S*{j?!!`B
zblD)fh2tT**$*OH;;t{rmSRH9vcOo3WLcat-TbtobL(vt3^UOtD|gRn%Oun3Ne;K?
z-t+SO{?Gq81l9-E_iw=;f4%i4USe0E0gTXBk(-DZ0{T!Jr^cMaKsWPyxt@y9CEkg(
zJqBWd9yNU{MzXOO;Su?f)+jb{J%-Q$#V3lwo=Rfj1FqOOBGoA1Is}sq`buibc^OL~
zU(N>{Y(+2egbw81;&26he~Ghha0MBHx%^^Bq8*iAlbgBAbIm9r_yR6f<hiR=zKg+_
z5)J>>z+bh%SYSPm4i!}Tr;QwOj^&awheo_+)x~2fg!(Nf?BtFt-#ts}$qbLlbTt-t
zo$qr=JW8mNt&<kt4?*XmA#V=MovG(UOR{ZpG5j_g7U=-Lzq7H5bU`?0r))%eo`rEL
z=!CJ<oRWnwW+D0JWZb6ki+8G(Vze2BrRr?)Ml&Yg%*jUs*{E)=*^vMaGRkkeX7LF@
z!SR`^WzR`(0~X>#*=Um*4w7I~XR?ySOh{yGRlvn~Edm;L!Wss#1m@+8e(1UlAZG!z
zRW)&J1^`b3a7^~gcc*QbIDwSW&p@<n!R>l1b^-Cs8Vymc$kD|i;unB;x|$Q&!BHbh
zSbS%K&J$)5Z{Wp)5QrIwQtFMZBTR+pMih3#`<PWB#^%XEZONz<W5zUWj~{49AIP-`
z7I4sc=m@PLO%W^U7+g)JK#>kvKB`ChpVf}*SDbtPoNd7Bcn3}^Fu@eK^%w;n$mg11
zZ??|uJb1+dX>%70&qfu$%=QYASu;37fV9!B{1u9n()37v<>FW1C;@%yavwwC&2%E)
zs42r}0AX~F1&9XiWF<}J7w0yvBoL`qfR{qgN@^^q+zLv?K&42wQe^aoNDYYqb<~t4
zwlEb;3NfXQp@ztQPLzyTlprONkr&_lI~}MzjxW#IP-3A?Ta;;=9zajFX$XN$QQD^U
zkFzO$)TRdOLz@;Xuqj|b^^(ZvnA{joS+xSZ%7az2#Hf{7RU!V7l#dP~RJTpfUzKIK
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zL3aP8?jvA71UfKg&>`Fl{L*QZVvUEe$aIJTJJaF6>^m2*@1XXjHvbdR*v$xN>58zC
zHb7+e0^BPkX3YkdJ&INfXp#Gmxhh82z*Vu9OaXo&M8QfPC*{!TLIb8h6}4;Hi=j>z
zv<<Ye_&$D%+Ltx0YTN1U-r1$!y}jGh@vQze{Y$$&-TF7)^=^O1^L96k7k)RWY2Pxd
z{lc>Jc5nft+IVSt3{{_M*E8SqGUG&MTt%l!tcItpcGE_kNu5=c-cwsdy}EVzqb2E~
zyDa^TmeBLMGR<mTdRUk_X#<sX<;CvITd+*3eFT5uzZ0U*l-Aa;H=~(={|}%)v%y+w
zUtZ4@ms0QYeXaeOMH;pPH1>2re^swv1&^n0D$T1xamhBUq}xl18o}tP_OyT|=GSKC
WyO*cA@xOanX<kVl{T2F_GV?#>?FjGy

delta 2143
zcmb7FdrVtZ7(e%3N^i?+6b6j)Xaj?`DD1@maiMI<l#*rI%_x}(kZ#IrY^ifPO>Lb<
zL5Xra#7%0lu|?Uz5w;Z~)u>GVnNznZ8|q&c(AWoWA6t!Z{Z8A(&A6y1IrN@$zWd$Z
z<NFSdO^!{Sk8nL_Yo@q_Tp8-(5IW<TLRf3ec2)CAjz=2uuyByC)VeMUCN8<B6zeNB
z*qi?`^~gEu5fBcLyJb81o>JEfve#rOm8-E{aG3q02p1rSxdUF%dU8pA%tPE&mo4T+
z9#WCZ0w!JYKl0}_<k<w1y)GA@fLI~U7_39t<I*Vq)$$G$6m1T(!c%_DV7uTnh-mQp
z3gMao)@-j`g$84cZ<$+6uYO(qM6b0aX>f5`_RV74$V+CEEymd)dKUXThOGffnx8$%
z;pX%4xJvO^w-TXFQ%@P5gZ(*Ng6Ca4wl7#XJX<8EemM#nma4`~wlAEq5ZF<97oM*W
zscETttP=oMt&UUg{h-~vE%t;p2F@2M6m;Jer@7G9?`*DLhxb`dS*J%idTHsgu@;E`
z(iZ0gK|A%f0VfEG`(Z!e;^`^3s1A&B*pq|sqy^cre#tuKFG0b8OQ601<o51D?sLo1
zkr5FUFYho0K@mJ6)Q%f$qEi8^tAKGWrwB}nXeR^WhmSRXv>FHALzJmh017E#HYw0x
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zFY+)2m`Jk`Z$`z~GE$5uPV#uWBpuNp&D9v=cTgKYE!J`|0Sgya>LOF>o!gaK$)xiC
zCJhxra`s{a6jc?GsqU49v?p6td2w4Isfdo68@iEu3pu39N&FR|F2tcB1_d22!)c^n
zl@|YeAqGszB5aE13(1%&uLkt;3kZAU(UkGkYSv)S76d&MMeheV{(Ko_I_m3-uw>_{
zFNdQ(fy2HWfm;3uBa#GYiE<QV=IQ~h2(wL2eox4=&x|5$ig>D1T<8v^f(mDz&lDiq
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zpy(S~mQq7vtw+IMw#(^Jcmc`LU>5*n$|V2LYxM#!{elX=vRDxkJSqCH8CsDh!I`gs
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z_OQ=_aMP#R!>pPcAOo}62mKxLW}+0cs+R0gV6{NKIe-Svy-)^|qX<6(GB~3Dl7%5>
zWx<e#kO69jn4$G1pdcVkzYXeBw?I8Wwxz89S9m%G5AMDYy!z4*G<G*Jc%eduOWbP@
z!@CdQjRgOp0X-X`0ZZ@%P|yQ{n@)0^!xfXdk|P;uyAyR;knWZ-PH@_FE|avc+8n=Q
ze`Bj=_mkH81C9GyH6*yIsOsRVa5ywnXyjys*C2Oj{5{>FNIcwDq0t^$8^}UNExD2z
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J9C<LS=ua`s`fmUL

diff --git a/X1_JTAG_boot/jtag_boot_rpi4.img b/X1_JTAG_boot/jtag_boot_rpi4.img
index 3119ef8deffdf4e0bbe6e97c52e6b82d22032b99..6c029255bf7f1c2d8b7941ca8d39524fc1606c02 100755
GIT binary patch
delta 1414
zcma))VN6?96oAitk9O_r7#+}-w@&-Ix&g&d6_G?VRHtq&CM3;FTsE^-vMECu7Nf=l
zTb!AK#PsGa!P!5!{n+022U3=RGm(n^n19Sf+)vB?*w?aT!jjoUc%I(AnSp;i$$jUZ
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zp{hA^)<K)I4pwJ+UC25z@0-3bIkUTIvzUw&7J#-uGBS=X-so=Tw!K0g&%9&%M8NpW
zz3TUf@SKyKstG%DGChxuVs)?-1<!AQ7;sl+KiBLMLNBsnO-DkwvC$2syFHTndzZM>
zl<Qow;?nFeBL&Yz!b2D1mSHJvv0nemx*l3Q8UFm2lXWwz1=G#dF-vZ>dHAPv+j{q+
zb^c659iNTAyT|ID*7b?tHkf(yo6*R@?dRj8A6-gY%pXTAKYSNo^FgV3{lucy1#_CN
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z!~NlGIflc<+~s`reE+qZ*=jpp*o){U^&lb_d<35@U~LH1e4@&clly3HKhO^_BmeUP
zxv|j(r3WW1WM*e-_a%y0-hM3a%4wjtGeB1Ypz<>;@$CRnL&Mk85)RpA95UX%n4fOP
z$BkzjX|ba`RNagHh_Mn7)h4gx*6N^izm<H3u(I7{%s`cD8CKI49Kw76$3p~~513x6
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zsa=)x&zu$grD0F8n6r`m#YUZ{5`(VF-A*IEtb@2-Q@W4G2adm`48{ifdY@J{+g@o_
zuEb%JxLh-AYz3DoBd^`Cu`XP;#Q9-s;N+ITJBCfzbi*-XW;^8on{TjN6(ga@4!hnE
z9+TPkuGW`dH7K0M<$z)1jB*)@_XggM^$oPfhq#?G?y<{UKE-b}t|N-l%7P6~?%9I-
SAKGtacDdmM$8xc#to#FRE6Ke8

delta 1214
zcmaJ=UuaWT82`?_Nt@iH)~0Fx&gI_KT2rCwV%N>;8mcgCUnJ;*RA^&RTdh?iY%s`@
zjImJ`Mh-{lL-x>h58L$*R-({OVTywIq*CkVlc~PM#1>m0G-7-G?jN!9VFxbX`TqRA
z^E<!u-HEnTDC-qq9VGx0657T#(tB~=Kg71*1gEuN%8~Ej1j2>u*;o9xT-wQA)=;*`
zG*v|;8cf%-dh-E}NcnHfznEQV9}V)UNa+U94UmdtutXAl%x~LE?D><nA2`J4U)Fq0
zIO1f-Yr9=zZaR*Id`-C04}k}OG~kk(-Kq6)7k9F9ZTlDG-f{>kHx*^nQuTera`W%F
zSOu4!@<0WEY)=$up&8^6Y+}V+%R(nDZy>Ug<k*F}?MW+#@pNF)x(e;}z+|u=ErF?G
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zmFJceJl74C780KN*_4VLX>hVDb({a6L$$#n{gH7dFYBBns&PrK;DEeT4oQ{6Yh??H
zm4(zA%AxH7KjqQJ3Vu3^HBr<{1o6JYb35-XcR)oiZlY;S0D;SzKh{Kh-zcL6fXm-$
z0649JGy;-WZRphYQ7^mYXeR-tI09=$TG#>f55yS<X#F2`@-yoT9Wz$^Mygp?{kr6?
z#O<7L?Z?QO%w#;c)HA(a68!39lojRqQM!tjHiCTQuaQW%eLP-%0`wWiGtqWh4iVXw
zIFp-u0dy|J$w!wCP22Hqnctdd4chaw5`ESQl?=YoT*xF3-OWXYVt>Y;`cccoxtwDu
zK0S~Sk~wQ46;X$zd-fA*!6ripD22?j<-FCu*jODb@;C&cs`rol1Rt3v)UFB)?;p9a
zq~BH7&=5TQu`W0S=qzGNh*9<E+Xf3kGwdny>`UjO2_e8XHS{~e9#nG0ns?{N8$Ki6
zey<*X)u7t}!x!0ttC<Wiulsnk;L>w-241yc{Dhu^@!^9*;)&?+U`!HVwOg;NHR}G8
z-zo~5KFD_(K4A|%hq(zi>+-hl{?`b)j3)Djk5i_tQ}NiwW6{Ck*7zySUu|5>X5@cD
zi?0N|qS&g2*j4YA?ds-pqY$S`TOEdvznHc@ROp@mDckJnV_~12{pwlEc6*#??JVmP
F-vSWza>W1u

diff --git a/X1_JTAG_boot/src/_arch/aarch64/time.rs b/X1_JTAG_boot/src/_arch/aarch64/time.rs
index 576248390..c814219ca 100644
--- a/X1_JTAG_boot/src/_arch/aarch64/time.rs
+++ b/X1_JTAG_boot/src/_arch/aarch64/time.rs
@@ -78,6 +78,7 @@ impl time::interface::TimeManager for GenericTimer {
         // Calculate the register compare value.
         let frq = CNTFRQ_EL0.get();
         let x = match frq.checked_mul(duration.as_nanos() as u64) {
+            #[allow(unused_imports)]
             None => {
                 warn!("Spin duration too long, skipping");
                 return;
@@ -96,6 +97,7 @@ impl time::interface::TimeManager for GenericTimer {
             None
         };
 
+        #[allow(unused_imports)]
         if let Some(w) = warn {
             warn!(
                 "Spin duration {} than architecturally supported, skipping",
diff --git a/X1_JTAG_boot/src/panic_wait.rs b/X1_JTAG_boot/src/panic_wait.rs
index 946041b32..923db3299 100644
--- a/X1_JTAG_boot/src/panic_wait.rs
+++ b/X1_JTAG_boot/src/panic_wait.rs
@@ -29,10 +29,23 @@ macro_rules! panic_println {
 
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
+    use crate::time::interface::TimeManager;
+
+    let timestamp = crate::time::time_manager().uptime();
+
     if let Some(args) = info.message() {
-        panic_println!("\nKernel panic: {}", args);
+        panic_println!(
+            "[  {:>3}.{:06}] Kernel panic: {}",
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+            args,
+        );
     } else {
-        panic_println!("\nKernel panic!");
+        panic_println!(
+            "[  {:>3}.{:06}] Kernel panic!",
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+        );
     }
 
     cpu::wait_forever()
diff --git a/X1_JTAG_boot/src/print.rs b/X1_JTAG_boot/src/print.rs
index 5decb2926..9ec13a286 100644
--- a/X1_JTAG_boot/src/print.rs
+++ b/X1_JTAG_boot/src/print.rs
@@ -41,31 +41,25 @@ macro_rules! println {
 #[macro_export]
 macro_rules! info {
     ($string:expr) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[  {:>3}.{:03}{:03}] ", $string),
+            concat!("[  {:>3}.{:06}] ", $string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000
+            timestamp.subsec_micros(),
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[  {:>3}.{:03}{:03}] ", $format_string),
+            concat!("[  {:>3}.{:06}] ", $format_string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000,
+            timestamp.subsec_micros(),
             $($arg)*
         ));
     })
@@ -75,31 +69,25 @@ macro_rules! info {
 #[macro_export]
 macro_rules! warn {
     ($string:expr) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[W {:>3}.{:03}{:03}] ", $string),
+            concat!("[W {:>3}.{:06}] ", $string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000
+            timestamp.subsec_micros(),
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        #[allow(unused_imports)]
-        use crate::time::interface::TimeManager;
+        use $crate::time::interface::TimeManager;
 
         let timestamp = $crate::time::time_manager().uptime();
-        let timestamp_subsec_us = timestamp.subsec_micros();
 
         $crate::print::_print(format_args_nl!(
-            concat!("[W {:>3}.{:03}{:03}] ", $format_string),
+            concat!("[W {:>3}.{:06}] ", $format_string),
             timestamp.as_secs(),
-            timestamp_subsec_us / 1_000,
-            timestamp_subsec_us % 1_000,
+            timestamp.subsec_micros(),
             $($arg)*
         ));
     })

From a6be5b34ad621ab9425bb0b8913f99fcc525eba0 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=C2=B0=7Ezanez?=
 <51524324+zanezhub@users.noreply.github.com>
Date: Fri, 1 Apr 2022 01:14:44 -0600
Subject: [PATCH 119/214] README.ES.md -> 01 & 02 (#150)

* README.ES.md

I added a spanish translation for the README.md file, and modified the README.md to add my github profile and to add the link to README.ES.md file

* Slightly reorganize translation overview

* README.ES.md These changes are in response to PR comments

* Update README.ES.md

* README.ES.md -> 00_before_we_start

* Updating README.ES.md

I corrected a few mistakes in both README.ES.md files.

* README.ES.md for 00 These changes are in response to PR comments

* README.ES.md -> 01_wait_forever

* README.ES.md -> 02_runtime_init

* README.md for 01 & 02 with corrections/improvements

* Update 01_wait_forever/README.ES.md

* Update 02_runtime_init/README.ES.md

Co-authored-by: zanez <zanez@protonmail.com>
Co-authored-by: Andre Richter <andre-richter@users.noreply.github.com>
Co-authored-by: Diego Barrios Romero <eldruin@gmail.com>
---
 01_wait_forever/README.ES.md |  55 ++++++
 02_runtime_init/README.ES.md | 348 +++++++++++++++++++++++++++++++++++
 2 files changed, 403 insertions(+)
 create mode 100644 01_wait_forever/README.ES.md
 create mode 100644 02_runtime_init/README.ES.md

diff --git a/01_wait_forever/README.ES.md b/01_wait_forever/README.ES.md
new file mode 100644
index 000000000..5244372ab
--- /dev/null
+++ b/01_wait_forever/README.ES.md
@@ -0,0 +1,55 @@
+# Tutorial 01 - Esperar infinitamente
+
+## tl;dr
+
+* Se configura la estructura que tiene el proyecto.
+
+* Se ejecuta una pequeño código hecho en ensamblador que tiene como función detener todos los núcleos del procesador que están ejecutando el kernel.
+
+## Compilar
+
+* El archivo `Makefile` permite ejecutar:
+  
+  * `doc`: Genera la documentación.
+  
+  * `qemu`: Ejecutar el kernel en QEMU.
+  
+  * `clippy`: Analiza el código y sugiere mejoras.
+  
+  * `clean`: Elimina todos los archivos generados durante la compilación, etc.
+  
+  * `readelf`: Inspecciona el archivo `ELF` de salida.
+  
+  * `objdump`: Inspecciona el ensamblador. 
+  
+  * `nm`: Inspecciona los símbolos.
+
+## Código a revisar
+
+* El script para enlazado específico para la `BSP` llamado `link.ld`.
+  
+  * Carga la dirección en `0x8_0000`.
+  
+  * Solo la sección `.text`.
+
+* `main.rs`: [Atributos internos](https://doc.rust-lang.org/reference/attributes.html) importantes:
+  
+  * `#![no_std]`, `#![no_main]`.
+
+* `boot.s`: La función de ensamblador `_start()` que inicia `wfe` (Wait For Event / Esperar Hasta Un Evento), detiene todos los núcleos del procesador que están ejecutando `_start()`. 
+
+* Tenemos que definir una función que funcione como `#[panic_handler]` (manejador de pánico) para que el compilador no nos cause problemas.
+  
+  * Hazla `unimplemented!()` porque se eliminará ya que no está siendo usada.
+
+## Pruébalo
+
+Dentro de la carpeta del proyecto, ejecuta a QEMU y mira el núcleo del procesador ejecutando `wfe` en bucle:
+
+```
+$ make qemu
+[...]
+IN:
+0x00080000:  d503205f  wfe
+0x00080004:  17ffffff  b        #0x80000
+```
diff --git a/02_runtime_init/README.ES.md b/02_runtime_init/README.ES.md
new file mode 100644
index 000000000..6a5b3974f
--- /dev/null
+++ b/02_runtime_init/README.ES.md
@@ -0,0 +1,348 @@
+# Tutorial 02 - Inicialización del `runtime`
+
+## tl;dr
+
+* Extendimos la funcionalidad de `boot.s` para que sea capaz de llamar código Rust por primera vez. Antes de que el cambio a Rust ocurra, se realizan algunos trabajos de inicialización del `runtime` (soporte para ejecución de código).
+* El código Rust que es llamado solo pausa la ejecución con una llamada a `panic!()`.
+* Ejecuta `make qemu` de nuevo para que puedas ver el código adicional en acción.
+
+## Adiciones importantes
+
+* Adiciones importantes al script `link.ld`:
+  
+  * Nuevas secciones: `.rodata`, `.got`, `.data`, `.bss`.
+  
+  * Un lugar totalmente dedicado a enlazar argumentos de tiempo de arranque (boot-time) que necesitan estar listos cuando se llame a `_start()`.
+
+* `_start()` en `_arch/__arch_name__/cpu/boot.s`:
+  
+  1. Para todos los núcleos expecto el núcleo 0.
+  
+  2. Inicializa la [`DRAM`](https://es.wikipedia.org/wiki/DRAM) poniendo a cero la sección [`.bss`](https://en.wikipedia.org/wiki/.bss).
+  
+  3. Configura el `stack pointer` (puntero a la memoria [pila](https://es.wikipedia.org/wiki/Pila_(inform%C3%A1tica))).
+  
+  4. Salta hacia la función `_start_rust()`, definida en `arch/__arch_name__/cpu/boot.rs`.
+
+* `_start_rust()`:
+  
+  * Llama a `kernel_init()`, que llama a `panic!()`, que al final también pone al núcleo 0 en pausa.
+
+* La librería ahora usa el crate [cortex-a](https://github.com/rust-embedded/cortex-a), que nos da abstracciones sin coste y envuelve las partes que hacen uso de un `unsafe` (partes con código que no es seguro y podría causar errores) cuando se trabaja directamente con los recursos del procesador.
+  
+  * Lo puedes ver en acción en `_arch/__arch_name__/cpu.rs`.
+
+## Diferencia con el archivo anterior
+
+```diff
+diff -uNr 01_wait_forever/Cargo.toml 02_runtime_init/Cargo.toml
+--- 01_wait_forever/Cargo.toml
++++ 02_runtime_init/Cargo.toml
+@@ -1,6 +1,6 @@
+ [package]
+ name = "mingo"
+-version = "0.1.0"
++version = "0.2.0"
+ authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+ edition = "2021"
+
+@@ -21,3 +21,7 @@
+ ##--------------------------------------------------------------------------------------------------
+
+ [dependencies]
++
++# Platform specific dependencies
++[target.'cfg(target_arch = "aarch64")'.dependencies]
++cortex-a = { version = "7.x.x" }
+
+diff -uNr 01_wait_forever/Makefile 02_runtime_init/Makefile
+--- 01_wait_forever/Makefile
++++ 02_runtime_init/Makefile
+@@ -153,6 +153,8 @@
+     $(call colorecho, "\nLaunching objdump")
+     @$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
+                 --section .text   \
++                --section .rodata \
++                --section .got    \
+                 $(KERNEL_ELF) | rustfilt
+
+ ##------------------------------------------------------------------------------
+
+diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.rs 02_runtime_init/src/_arch/aarch64/cpu/boot.rs
+--- 01_wait_forever/src/_arch/aarch64/cpu/boot.rs
++++ 02_runtime_init/src/_arch/aarch64/cpu/boot.rs
+@@ -13,3 +13,15 @@
+
+ // Assembly counterpart to this file.
+ core::arch::global_asm!(include_str!("boot.s"));
++
++//--------------------------------------------------------------------------------------------------
++// Public Code
++//--------------------------------------------------------------------------------------------------
++
++/// The Rust entry of the `kernel` binary.
++///
++/// The function is called from the assembly `_start` function.
++#[no_mangle]
++pub unsafe fn _start_rust() -> ! {
++    crate::kernel_init()
++}
+
+diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.s 02_runtime_init/src/_arch/aarch64/cpu/boot.s
+--- 01_wait_forever/src/_arch/aarch64/cpu/boot.s
++++ 02_runtime_init/src/_arch/aarch64/cpu/boot.s
+@@ -3,6 +3,24 @@
+ // Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+ //--------------------------------------------------------------------------------------------------
++// Definitions
++//--------------------------------------------------------------------------------------------------
++
++// Load the address of a symbol into a register, PC-relative.
++//
++// The symbol must lie within +/- 4 GiB of the Program Counter.
++//
++// # Resources
++//
++// - https://sourceware.org/binutils/docs-2.36/as/AArch64_002dRelocations.html
++.macro ADR_REL register, symbol
++    adrp    \register, \symbol
++    add    \register, \register, #:lo12:\symbol
++.endm
++
++.equ _core_id_mask, 0b11
++
++//--------------------------------------------------------------------------------------------------
+ // Public Code
+ //--------------------------------------------------------------------------------------------------
+ .section .text._start
+@@ -11,6 +29,34 @@
+ // fn _start()
+ //------------------------------------------------------------------------------
+ _start:
++    // Only proceed on the boot core. Park it otherwise.
++    mrs    x1, MPIDR_EL1
++    and    x1, x1, _core_id_mask
++    ldr    x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
++    cmp    x1, x2
++    b.ne    .L_parking_loop
++
++    // If execution reaches here, it is the boot core.
++
++    // Initialize DRAM.
++    ADR_REL    x0, __bss_start
++    ADR_REL x1, __bss_end_exclusive
++
++.L_bss_init_loop:
++    cmp    x0, x1
++    b.eq    .L_prepare_rust
++    stp    xzr, xzr, [x0], #16
++    b    .L_bss_init_loop
++
++    // Prepare the jump to Rust code.
++.L_prepare_rust:
++    // Set the stack pointer.
++    ADR_REL    x0, __boot_core_stack_end_exclusive
++    mov    sp, x0
++
++    // Jump to Rust code.
++    b    _start_rust
++
+     // Infinitely wait for events (aka "park the core").
+ .L_parking_loop:
+     wfe
+
+diff -uNr 01_wait_forever/src/_arch/aarch64/cpu.rs 02_runtime_init/src/_arch/aarch64/cpu.rs
+--- 01_wait_forever/src/_arch/aarch64/cpu.rs
++++ 02_runtime_init/src/_arch/aarch64/cpu.rs
+@@ -0,0 +1,26 @@
++// SPDX-License-Identifier: MIT OR Apache-2.0
++//
++// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
++
++//! Architectural processor code.
++//!
++//! # Orientation
++//!
++//! Since arch modules are imported into generic modules using the path attribute, the path of this
++//! file is:
++//!
++//! crate::cpu::arch_cpu
++
++use cortex_a::asm;
++
++//--------------------------------------------------------------------------------------------------
++// Public Code
++//--------------------------------------------------------------------------------------------------
++
++/// Pause execution on the core.
++#[inline(always)]
++pub fn wait_forever() -> ! {
++    loop {
++        asm::wfe()
++    }
++}
+
+diff -uNr 01_wait_forever/src/bsp/raspberrypi/cpu.rs 02_runtime_init/src/bsp/raspberrypi/cpu.rs
+--- 01_wait_forever/src/bsp/raspberrypi/cpu.rs
++++ 02_runtime_init/src/bsp/raspberrypi/cpu.rs
+@@ -0,0 +1,14 @@
++// SPDX-License-Identifier: MIT OR Apache-2.0
++//
++// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
++
++//! BSP Processor code.
++
++//--------------------------------------------------------------------------------------------------
++// Public Definitions
++//--------------------------------------------------------------------------------------------------
++
++/// Used by `arch` code to find the early boot core.
++#[no_mangle]
++#[link_section = ".text._start_arguments"]
++pub static BOOT_CORE_ID: u64 = 0;
+
+diff -uNr 01_wait_forever/src/bsp/raspberrypi/link.ld 02_runtime_init/src/bsp/raspberrypi/link.ld
+--- 01_wait_forever/src/bsp/raspberrypi/link.ld
++++ 02_runtime_init/src/bsp/raspberrypi/link.ld
+@@ -3,6 +3,8 @@
+  * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+  */
+
++__rpi_phys_dram_start_addr = 0;
++
+ /* The physical address at which the the kernel binary will be loaded by the Raspberry's firmware */
+ __rpi_phys_binary_load_addr = 0x80000;
+
+@@ -13,21 +15,58 @@
+  *     4 == R
+  *     5 == RX
+  *     6 == RW
++ *
++ * Segments are marked PT_LOAD below so that the ELF file provides virtual and physical addresses.
++ * It doesn't mean all of them need actually be loaded.
+  */
+ PHDRS
+ {
+-    segment_code PT_LOAD FLAGS(5);
++    segment_boot_core_stack PT_LOAD FLAGS(6);
++    segment_code            PT_LOAD FLAGS(5);
++    segment_data            PT_LOAD FLAGS(6);
+ }
+
+ SECTIONS
+ {
+-    . =  __rpi_phys_binary_load_addr;
++    . =  __rpi_phys_dram_start_addr;
++
++    /***********************************************************************************************
++    * Boot Core Stack
++    ***********************************************************************************************/
++    .boot_core_stack (NOLOAD) :
++    {
++                                             /*   ^             */
++                                             /*   | stack       */
++        . += __rpi_phys_binary_load_addr;    /*   | growth      */
++                                             /*   | direction   */
++        __boot_core_stack_end_exclusive = .; /*   |             */
++    } :segment_boot_core_stack
+
+     /***********************************************************************************************
+-    * Code
++    * Code + RO Data + Global Offset Table
+     ***********************************************************************************************/
+     .text :
+     {
+         KEEP(*(.text._start))
++        *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
++        *(.text._start_rust)      /* The Rust entry point */
++        *(.text*)                 /* Everything else */
+     } :segment_code
++
++    .rodata : ALIGN(8) { *(.rodata*) } :segment_code
++    .got    : ALIGN(8) { *(.got)     } :segment_code
++
++    /***********************************************************************************************
++    * Data + BSS
++    ***********************************************************************************************/
++    .data : { *(.data*) } :segment_data
++
++    /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
++    .bss (NOLOAD) : ALIGN(16)
++    {
++        __bss_start = .;
++        *(.bss*);
++        . = ALIGN(16);
++        __bss_end_exclusive = .;
++    } :segment_data
+ }
+
+diff -uNr 01_wait_forever/src/bsp/raspberrypi.rs 02_runtime_init/src/bsp/raspberrypi.rs
+--- 01_wait_forever/src/bsp/raspberrypi.rs
++++ 02_runtime_init/src/bsp/raspberrypi.rs
+@@ -4,4 +4,4 @@
+
+ //! Top-level BSP file for the Raspberry Pi 3 and 4.
+
+-// Coming soon.
++pub mod cpu;
+
+diff -uNr 01_wait_forever/src/cpu.rs 02_runtime_init/src/cpu.rs
+--- 01_wait_forever/src/cpu.rs
++++ 02_runtime_init/src/cpu.rs
+@@ -4,4 +4,13 @@
+
+ //! Processor code.
+
++#[cfg(target_arch = "aarch64")]
++#[path = "_arch/aarch64/cpu.rs"]
++mod arch_cpu;
++
+ mod boot;
++
++//--------------------------------------------------------------------------------------------------
++// Architectural Public Reexports
++//--------------------------------------------------------------------------------------------------
++pub use arch_cpu::wait_forever;
+
+diff -uNr 01_wait_forever/src/main.rs 02_runtime_init/src/main.rs
+--- 01_wait_forever/src/main.rs
++++ 02_runtime_init/src/main.rs
+@@ -102,6 +102,7 @@
+ //!
+ //! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
+ //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
++//! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
+
+ #![no_main]
+ #![no_std]
+@@ -110,4 +111,11 @@
+ mod cpu;
+ mod panic_wait;
+
+-// Kernel code coming next tutorial.
++/// Early init code.
++///
++/// # Safety
++///
++/// - Only a single core must be active and running this function.
++unsafe fn kernel_init() -> ! {
++    panic!()
++}
+
+diff -uNr 01_wait_forever/src/panic_wait.rs 02_runtime_init/src/panic_wait.rs
+--- 01_wait_forever/src/panic_wait.rs
++++ 02_runtime_init/src/panic_wait.rs
+@@ -4,9 +4,10 @@
+
+ //! A panic handler that infinitely waits.
+
++use crate::cpu;
+ use core::panic::PanicInfo;
+
+ #[panic_handler]
+ fn panic(_info: &PanicInfo) -> ! {
+-    unimplemented!()
++    cpu::wait_forever()
+ }
+```

From 55548bf6913cc44857ec66f20ef0e5c1d1b9deb6 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre-richter@users.noreply.github.com>
Date: Sun, 3 Apr 2022 21:44:19 +0200
Subject: [PATCH 120/214] Update README.md

---
 06_uart_chainloader/README.md | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/06_uart_chainloader/README.md b/06_uart_chainloader/README.md
index 66ba5ce73..b904d9d89 100644
--- a/06_uart_chainloader/README.md
+++ b/06_uart_chainloader/README.md
@@ -27,7 +27,8 @@ from SD card all along.
 
 Please bear with me until I find the time to write it all down here elaborately. For the time being,
 please see this tutorial as an enabler for a convenience feature that allows booting the following
-tutorials in a quick manner.
+tutorials in a quick manner. _For those keen to get a deeper understanding, it could make sense to skip forward to [Chapter 15](../15_virtual_mem_part3_precomputed_tables) and read the first half of the README,
+where `Load Address != Link Address` is discussed_.
 
 [position independent code]: https://en.wikipedia.org/wiki/Position-independent_code
 

From 7d374adad20471c98ba0b0404a07ffa0dc6b2afb Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Tue, 5 Apr 2022 23:00:47 +0200
Subject: [PATCH 121/214] Tests: Exception restore sanity

---
 11_exceptions_part1_groundwork/README.md      |  83 +++++----
 12_integrated_testing/Cargo.toml              |   4 +
 12_integrated_testing/README.md               | 174 +++++++++++++++++-
 .../src/_arch/aarch64/exception.rs            |  17 ++
 .../tests/00_console_sanity.rs                |   3 +
 .../tests/03_exception_restore_sanity.rb      |  25 +++
 .../tests/03_exception_restore_sanity.rs      |  55 ++++++
 .../tests/panic_wait_forever/mod.rs           |   9 +
 .../Cargo.toml                                |   4 +
 13_exceptions_part2_peripheral_IRQs/README.md |   8 +-
 .../src/_arch/aarch64/exception.rs            |  17 ++
 .../tests/00_console_sanity.rs                |   3 +
 .../tests/03_exception_restore_sanity.rb      |  25 +++
 .../tests/03_exception_restore_sanity.rs      |  55 ++++++
 ...q_sanity.rs => 04_exception_irq_sanity.rs} |   0
 .../tests/panic_wait_forever/mod.rs           |   9 +
 14_virtual_mem_part2_mmio_remap/Cargo.toml    |   4 +
 14_virtual_mem_part2_mmio_remap/README.md     |  48 +++++
 .../src/_arch/aarch64/exception.rs            |  17 ++
 .../tests/00_console_sanity.rs                |   3 +
 .../tests/03_exception_restore_sanity.rb      |  25 +++
 .../tests/03_exception_restore_sanity.rs      |  77 ++++++++
 ...q_sanity.rs => 04_exception_irq_sanity.rs} |   0
 .../tests/panic_wait_forever/mod.rs           |   9 +
 .../Cargo.toml                                |   4 +
 .../README.md                                 |  61 +++++-
 .../src/_arch/aarch64/exception.rs            |  17 ++
 .../tests/00_console_sanity.rs                |   3 +
 .../tests/03_exception_restore_sanity.rb      |  25 +++
 .../tests/03_exception_restore_sanity.rs      |  49 +++++
 ...q_sanity.rs => 04_exception_irq_sanity.rs} |   0
 .../tests/panic_wait_forever/mod.rs           |   9 +
 .../Cargo.toml                                |   4 +
 .../src/_arch/aarch64/exception.rs            |  17 ++
 .../tests/00_console_sanity.rs                |   3 +
 .../tests/03_exception_restore_sanity.rb      |  25 +++
 .../tests/03_exception_restore_sanity.rs      |  49 +++++
 ...q_sanity.rs => 04_exception_irq_sanity.rs} |   0
 .../tests/panic_wait_forever/mod.rs           |   9 +
 39 files changed, 886 insertions(+), 63 deletions(-)
 create mode 100644 12_integrated_testing/tests/03_exception_restore_sanity.rb
 create mode 100644 12_integrated_testing/tests/03_exception_restore_sanity.rs
 create mode 100644 12_integrated_testing/tests/panic_wait_forever/mod.rs
 create mode 100644 13_exceptions_part2_peripheral_IRQs/tests/03_exception_restore_sanity.rb
 create mode 100644 13_exceptions_part2_peripheral_IRQs/tests/03_exception_restore_sanity.rs
 rename 13_exceptions_part2_peripheral_IRQs/tests/{03_exception_irq_sanity.rs => 04_exception_irq_sanity.rs} (100%)
 create mode 100644 13_exceptions_part2_peripheral_IRQs/tests/panic_wait_forever/mod.rs
 create mode 100644 14_virtual_mem_part2_mmio_remap/tests/03_exception_restore_sanity.rb
 create mode 100644 14_virtual_mem_part2_mmio_remap/tests/03_exception_restore_sanity.rs
 rename 14_virtual_mem_part2_mmio_remap/tests/{03_exception_irq_sanity.rs => 04_exception_irq_sanity.rs} (100%)
 create mode 100644 14_virtual_mem_part2_mmio_remap/tests/panic_wait_forever/mod.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/tests/03_exception_restore_sanity.rb
 create mode 100644 15_virtual_mem_part3_precomputed_tables/tests/03_exception_restore_sanity.rs
 rename 15_virtual_mem_part3_precomputed_tables/tests/{03_exception_irq_sanity.rs => 04_exception_irq_sanity.rs} (100%)
 create mode 100644 15_virtual_mem_part3_precomputed_tables/tests/panic_wait_forever/mod.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/tests/03_exception_restore_sanity.rb
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/tests/03_exception_restore_sanity.rs
 rename 16_virtual_mem_part4_higher_half_kernel/tests/{03_exception_irq_sanity.rs => 04_exception_irq_sanity.rs} (100%)
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/tests/panic_wait_forever/mod.rs

diff --git a/11_exceptions_part1_groundwork/README.md b/11_exceptions_part1_groundwork/README.md
index 95aa27242..8d18d6162 100644
--- a/11_exceptions_part1_groundwork/README.md
+++ b/11_exceptions_part1_groundwork/README.md
@@ -413,32 +413,31 @@ Minipush 1.0
 [MP] ⏩ Pushing 64 KiB =========================================🦀 100% 0 KiB/s Time: 00:00:00
 [ML] Loaded! Executing the payload now
 
-[    0.788994] mingo version 0.11.0
-[    0.789201] Booting on: Raspberry Pi 3
-[    0.789656] MMU online. Special regions:
-[    0.790133]       0x00080000 - 0x0008ffff |  64 KiB | C   RO PX  | Kernel code and RO data
-[    0.791151]       0x3f000000 - 0x4000ffff |  16 MiB | Dev RW PXN | Device MMIO
-[    0.792040] Current privilege level: EL1
-[    0.792516] Exception handling state:
-[    0.792960]       Debug:  Masked
-[    0.793350]       SError: Masked
-[    0.793740]       IRQ:    Masked
-[    0.794130]       FIQ:    Masked
-[    0.794520] Architectural timer resolution: 52 ns
-[    0.795094] Drivers loaded:
-[    0.795430]       1. BCM GPIO
-[    0.795788]       2. BCM PL011 UART
-[    0.796210] Timer test, spinning for 1 second
-[    1.796741]
-[    1.796745] Trying to read from address 8 GiB...
-[    1.797295] ************************************************
-[    1.797987] Whoa! We recovered from a synchronous exception!
-[    1.798680] ************************************************
-[    1.799373]
-[    1.799547] Let's try again
-[    1.799883] Trying to read from address 9 GiB...
-
-Kernel panic:
+[    0.789853] mingo version 0.11.0
+[    0.790060] Booting on: Raspberry Pi 3
+[    0.790515] MMU online. Special regions:
+[    0.790992]       0x00080000 - 0x0008ffff |  64 KiB | C   RO PX  | Kernel code and RO data
+[    0.792010]       0x3f000000 - 0x4000ffff |  16 MiB | Dev RW PXN | Device MMIO
+[    0.792899] Current privilege level: EL1
+[    0.793375] Exception handling state:
+[    0.793819]       Debug:  Masked
+[    0.794209]       SError: Masked
+[    0.794599]       IRQ:    Masked
+[    0.794989]       FIQ:    Masked
+[    0.795379] Architectural timer resolution: 52 ns
+[    0.795954] Drivers loaded:
+[    0.796289]       1. BCM GPIO
+[    0.796647]       2. BCM PL011 UART
+[    0.797070] Timer test, spinning for 1 second
+[    1.797600]
+[    1.797604] Trying to read from address 8 GiB...
+[    1.798154] ************************************************
+[    1.798846] Whoa! We recovered from a synchronous exception!
+[    1.799539] ************************************************
+[    1.800233]
+[    1.800406] Let's try again
+[    1.800742] Trying to read from address 9 GiB...
+[    1.801306] Kernel panic:
 
 CPU Exception!
 ESR_EL1: 0x96000004
@@ -457,25 +456,25 @@ SPSR_EL1: 0x600003c5
             IRQ    (I): Masked
             FIQ    (F): Masked
       Illegal Execution State (IL): Not set
-ELR_EL1: 0x0000000000082580
+ELR_EL1: 0x0000000000082194
 
 General purpose register:
-      x0 : 0x0000000000000000         x1 : 0x00000000000859b7
-      x2 : 0x0000000000000027         x3 : 0x0000000000084d3c
-      x4 : 0x0000000000000003         x5 : 0x3f26329c00000000
-      x6 : 0x0000000000000000         x7 : 0xd3d18800228d0241
-      x8 : 0x0000000240000000         x9 : 0x00000000000859b7
+      x0 : 0x0000000000000000         x1 : 0x000000000008555f
+      x2 : 0x0000000000000027         x3 : 0x000000000008435c
+      x4 : 0x0000000000000006         x5 : 0x3f27329c00000000
+      x6 : 0x0000000000000000         x7 : 0xd3d1b900228f0241
+      x8 : 0x0000000240000000         x9 : 0x000000000008555f
       x10: 0x0000000000000443         x11: 0x000000003f201000
-      x12: 0x0000000000000019         x13: 0x0000000000000033
-      x14: 0x000000000007fd3d         x15: 0x0000000000000058
-      x16: 0x0000000000000078         x17: 0xfd29f02255a847c0
-      x18: 0x9cd4788000000008         x19: 0x0000000000090008
-      x20: 0x00000000000857a0         x21: 0x000000003b9aca00
-      x22: 0x000000000008271c         x23: 0x0000000000083314
-      x24: 0x00000000000003e8         x25: 0xffffffffc4653600
-      x26: 0x00000000000f4240         x27: 0x0000000000085880
-      x28: 0x0000000000085170         x29: 0x0000000000086c10
-      lr : 0x0000000000082574
+      x12: 0x0000000000000019         x13: 0x00000000ffffd8f0
+      x14: 0x000000000000147b         x15: 0x00000000ffffff9c
+      x16: 0x000000000007fd38         x17: 0x0000000005f5e0ff
+      x18: 0x0000000000000034         x19: 0x0000000000090008
+      x20: 0x0000000000085398         x21: 0x000000003b9aca00
+      x22: 0x0000000000082e30         x23: 0x0000000000082308
+      x24: 0x0000000010624dd3         x25: 0xffffffffc4653600
+      x26: 0x00000000000866b8         x27: 0x0000000000085458
+      x28: 0x0000000000084fe0         x29: 0x0000000000086770
+      lr : 0x0000000000082188
 ```
 
 ## Diff to previous
diff --git a/12_integrated_testing/Cargo.toml b/12_integrated_testing/Cargo.toml
index 80a3a0bce..e768e6787 100644
--- a/12_integrated_testing/Cargo.toml
+++ b/12_integrated_testing/Cargo.toml
@@ -54,3 +54,7 @@ harness = false
 [[test]]
 name = "02_exception_sync_page_fault"
 harness = false
+
+[[test]]
+name = "03_exception_restore_sanity"
+harness = false
diff --git a/12_integrated_testing/README.md b/12_integrated_testing/README.md
index 71ee33426..b5649cd0a 100644
--- a/12_integrated_testing/README.md
+++ b/12_integrated_testing/README.md
@@ -648,6 +648,10 @@ harness = false
 [[test]]
 name = "02_exception_sync_page_fault"
 harness = false
+
+[[test]]
+name = "03_exception_restore_sanity"
+harness = false
 ```
 
 #### Overriding Panic Behavior
@@ -703,11 +707,11 @@ unsafe fn kernel_init() -> ! {
     println!("Testing synchronous exception handling by causing a page fault");
 
     if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
-        println!("MMU: {}", string);
+        info!("MMU: {}", string);
         cpu::qemu_exit_failure()
     }
 
-    println!("Writing beyond mapped area to address 9 GiB...");
+    info!("Writing beyond mapped area to address 9 GiB...");
     let big_addr: u64 = 9 * 1024 * 1024 * 1024;
     core::ptr::read_volatile(big_addr as *mut u64);
 
@@ -761,7 +765,10 @@ The subtest first sends `"ABC"` over the console to the kernel, and then expects
 #![no_main]
 #![no_std]
 
-use libkernel::{bsp, console, exception, print};
+/// Console tests should time out on the I/O harness in case of panic.
+mod panic_wait_forever;
+
+use libkernel::{bsp, console, cpu, exception, print};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
@@ -860,6 +867,24 @@ Compiling integration test(s) - rpi3
          -------------------------------------------------------------------
          ✅ Success: 02_exception_sync_page_fault.rs
          -------------------------------------------------------------------
+
+
+     Running tests/03_exception_restore_sanity.rs (target/aarch64-unknown-none-softfloat/release/deps/03_exception_restore_sanity-a56e14285bb26e0e)
+         -------------------------------------------------------------------
+         🦀 Running 1 console I/O tests
+         -------------------------------------------------------------------
+
+           1. Exception restore.........................................[ok]
+
+         Console log:
+           Testing exception restore
+           [    0.130757] Making a dummy system call
+           [    0.132592] Back from system call!
+
+         -------------------------------------------------------------------
+         ✅ Success: 03_exception_restore_sanity.rs
+         -------------------------------------------------------------------
+
 ```
 
 ## Diff to previous
@@ -883,7 +908,7 @@ diff -uNr 11_exceptions_part1_groundwork/Cargo.toml 12_integrated_testing/Cargo.
  authors = ["Andre Richter <andre.o.richter@gmail.com>"]
  edition = "2021"
 
-@@ -11,20 +11,46 @@
+@@ -11,20 +11,50 @@
  default = []
  bsp_rpi3 = ["tock-registers"]
  bsp_rpi4 = ["tock-registers"]
@@ -934,6 +959,10 @@ diff -uNr 11_exceptions_part1_groundwork/Cargo.toml 12_integrated_testing/Cargo.
 +[[test]]
 +name = "02_exception_sync_page_fault"
 +harness = false
++
++[[test]]
++name = "03_exception_restore_sanity"
++harness = false
 
 diff -uNr 11_exceptions_part1_groundwork/Makefile 12_integrated_testing/Makefile
 --- 11_exceptions_part1_groundwork/Makefile
@@ -1070,7 +1099,7 @@ diff -uNr 11_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs 12_integrated_
 diff -uNr 11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs 12_integrated_testing/src/_arch/aarch64/exception.rs
 --- 11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
 +++ 12_integrated_testing/src/_arch/aarch64/exception.rs
-@@ -87,18 +87,6 @@
+@@ -87,15 +87,14 @@
 
  #[no_mangle]
  unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
@@ -1083,12 +1112,30 @@ diff -uNr 11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs 12_integ
 -            e.elr_el1 += 4;
 -
 -            return;
--        }
--    }
--
-     default_exception_handler(e);
++    #[cfg(feature = "test_build")]
++    {
++        const TEST_SVC_ID: u64 = 0x1337;
++
++        if let Some(ESR_EL1::EC::Value::SVC64) = e.esr_el1.exception_class() {
++            if e.esr_el1.iss() == TEST_SVC_ID {
++                return;
++            }
+         }
+     }
+
+@@ -192,6 +191,12 @@
+     fn exception_class(&self) -> Option<ESR_EL1::EC::Value> {
+         self.0.read_as_enum(ESR_EL1::EC)
+     }
++
++    #[cfg(feature = "test_build")]
++    #[inline(always)]
++    fn iss(&self) -> u64 {
++        self.0.read(ESR_EL1::ISS)
++    }
  }
 
+ /// Human readable ESR_EL1.
 
 diff -uNr 11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs 12_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs
 --- 11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -1814,7 +1861,7 @@ diff -uNr 11_exceptions_part1_groundwork/tests/00_console_sanity.rb 12_integrate
 diff -uNr 11_exceptions_part1_groundwork/tests/00_console_sanity.rs 12_integrated_testing/tests/00_console_sanity.rs
 --- 11_exceptions_part1_groundwork/tests/00_console_sanity.rs
 +++ 12_integrated_testing/tests/00_console_sanity.rs
-@@ -0,0 +1,35 @@
+@@ -0,0 +1,38 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
@@ -1825,6 +1872,9 @@ diff -uNr 11_exceptions_part1_groundwork/tests/00_console_sanity.rs 12_integrate
 +#![no_main]
 +#![no_std]
 +
++/// Console tests should time out on the I/O harness in case of panic.
++mod panic_wait_forever;
++
 +use libkernel::{bsp, console, cpu, exception, print};
 +
 +#[no_mangle]
@@ -1953,6 +2003,96 @@ diff -uNr 11_exceptions_part1_groundwork/tests/02_exception_sync_page_fault.rs 1
 +    cpu::qemu_exit_failure()
 +}
 
+diff -uNr 11_exceptions_part1_groundwork/tests/03_exception_restore_sanity.rb 12_integrated_testing/tests/03_exception_restore_sanity.rb
+--- 11_exceptions_part1_groundwork/tests/03_exception_restore_sanity.rb
++++ 12_integrated_testing/tests/03_exception_restore_sanity.rb
+@@ -0,0 +1,25 @@
++# frozen_string_literal: true
++
++# SPDX-License-Identifier: MIT OR Apache-2.0
++#
++# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++
++require_relative '../../common/tests/console_io_test'
++
++# Verify that exception restore works.
++class ExceptionRestoreTest < SubtestBase
++    def name
++        'Exception restore'
++    end
++
++    def run(qemu_out, _qemu_in)
++        expect_or_raise(qemu_out, 'Back from system call!')
++    end
++end
++
++##--------------------------------------------------------------------------------------------------
++## Test registration
++##--------------------------------------------------------------------------------------------------
++def subtest_collection
++    [ExceptionRestoreTest.new]
++end
+
+diff -uNr 11_exceptions_part1_groundwork/tests/03_exception_restore_sanity.rs 12_integrated_testing/tests/03_exception_restore_sanity.rs
+--- 11_exceptions_part1_groundwork/tests/03_exception_restore_sanity.rs
++++ 12_integrated_testing/tests/03_exception_restore_sanity.rs
+@@ -0,0 +1,55 @@
++// SPDX-License-Identifier: MIT OR Apache-2.0
++//
++// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++
++//! A simple sanity test to see if exception restore code works.
++
++#![feature(format_args_nl)]
++#![no_main]
++#![no_std]
++
++/// Console tests should time out on the I/O harness in case of panic.
++mod panic_wait_forever;
++
++use core::arch::asm;
++use libkernel::{bsp, cpu, exception, info, memory, println};
++
++#[inline(never)]
++fn nested_system_call() {
++    #[cfg(target_arch = "aarch64")]
++    unsafe {
++        asm!("svc #0x1337", options(nomem, nostack, preserves_flags));
++    }
++
++    #[cfg(not(target_arch = "aarch64"))]
++    {
++        info!("Not supported yet");
++        cpu::wait_forever();
++    }
++}
++
++#[no_mangle]
++unsafe fn kernel_init() -> ! {
++    use memory::mmu::interface::MMU;
++
++    exception::handling_init();
++    bsp::console::qemu_bring_up_console();
++
++    // This line will be printed as the test header.
++    println!("Testing exception restore");
++
++    if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
++        info!("MMU: {}", string);
++        cpu::qemu_exit_failure()
++    }
++
++    info!("Making a dummy system call");
++
++    // Calling this inside a function indirectly tests if the link register is restored properly.
++    nested_system_call();
++
++    info!("Back from system call!");
++
++    // The QEMU process running this test will be closed by the I/O test harness.
++    cpu::wait_forever();
++}
+
 diff -uNr 11_exceptions_part1_groundwork/tests/boot_test_string.rb 12_integrated_testing/tests/boot_test_string.rb
 --- 11_exceptions_part1_groundwork/tests/boot_test_string.rb
 +++ 12_integrated_testing/tests/boot_test_string.rb
@@ -1976,6 +2116,20 @@ diff -uNr 11_exceptions_part1_groundwork/tests/panic_exit_success/mod.rs 12_inte
 +    libkernel::cpu::qemu_exit_success()
 +}
 
+diff -uNr 11_exceptions_part1_groundwork/tests/panic_wait_forever/mod.rs 12_integrated_testing/tests/panic_wait_forever/mod.rs
+--- 11_exceptions_part1_groundwork/tests/panic_wait_forever/mod.rs
++++ 12_integrated_testing/tests/panic_wait_forever/mod.rs
+@@ -0,0 +1,9 @@
++// SPDX-License-Identifier: MIT OR Apache-2.0
++//
++// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++
++/// Overwrites libkernel's `panic_wait::_panic_exit()` with wait_forever.
++#[no_mangle]
++fn _panic_exit() -> ! {
++    libkernel::cpu::wait_forever()
++}
+
 diff -uNr 11_exceptions_part1_groundwork/test-types/Cargo.toml 12_integrated_testing/test-types/Cargo.toml
 --- 11_exceptions_part1_groundwork/test-types/Cargo.toml
 +++ 12_integrated_testing/test-types/Cargo.toml
diff --git a/12_integrated_testing/src/_arch/aarch64/exception.rs b/12_integrated_testing/src/_arch/aarch64/exception.rs
index eb73a2cc2..e15dc7a06 100644
--- a/12_integrated_testing/src/_arch/aarch64/exception.rs
+++ b/12_integrated_testing/src/_arch/aarch64/exception.rs
@@ -87,6 +87,17 @@ unsafe extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
 
 #[no_mangle]
 unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
+    #[cfg(feature = "test_build")]
+    {
+        const TEST_SVC_ID: u64 = 0x1337;
+
+        if let Some(ESR_EL1::EC::Value::SVC64) = e.esr_el1.exception_class() {
+            if e.esr_el1.iss() == TEST_SVC_ID {
+                return;
+            }
+        }
+    }
+
     default_exception_handler(e);
 }
 
@@ -180,6 +191,12 @@ impl EsrEL1 {
     fn exception_class(&self) -> Option<ESR_EL1::EC::Value> {
         self.0.read_as_enum(ESR_EL1::EC)
     }
+
+    #[cfg(feature = "test_build")]
+    #[inline(always)]
+    fn iss(&self) -> u64 {
+        self.0.read(ESR_EL1::ISS)
+    }
 }
 
 /// Human readable ESR_EL1.
diff --git a/12_integrated_testing/tests/00_console_sanity.rs b/12_integrated_testing/tests/00_console_sanity.rs
index 6aa3de18a..dccb6cc2a 100644
--- a/12_integrated_testing/tests/00_console_sanity.rs
+++ b/12_integrated_testing/tests/00_console_sanity.rs
@@ -8,6 +8,9 @@
 #![no_main]
 #![no_std]
 
+/// Console tests should time out on the I/O harness in case of panic.
+mod panic_wait_forever;
+
 use libkernel::{bsp, console, cpu, exception, print};
 
 #[no_mangle]
diff --git a/12_integrated_testing/tests/03_exception_restore_sanity.rb b/12_integrated_testing/tests/03_exception_restore_sanity.rb
new file mode 100644
index 000000000..c3c725ed5
--- /dev/null
+++ b/12_integrated_testing/tests/03_exception_restore_sanity.rb
@@ -0,0 +1,25 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+require_relative '../../common/tests/console_io_test'
+
+# Verify that exception restore works.
+class ExceptionRestoreTest < SubtestBase
+    def name
+        'Exception restore'
+    end
+
+    def run(qemu_out, _qemu_in)
+        expect_or_raise(qemu_out, 'Back from system call!')
+    end
+end
+
+##--------------------------------------------------------------------------------------------------
+## Test registration
+##--------------------------------------------------------------------------------------------------
+def subtest_collection
+    [ExceptionRestoreTest.new]
+end
diff --git a/12_integrated_testing/tests/03_exception_restore_sanity.rs b/12_integrated_testing/tests/03_exception_restore_sanity.rs
new file mode 100644
index 000000000..f25ed6453
--- /dev/null
+++ b/12_integrated_testing/tests/03_exception_restore_sanity.rs
@@ -0,0 +1,55 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! A simple sanity test to see if exception restore code works.
+
+#![feature(format_args_nl)]
+#![no_main]
+#![no_std]
+
+/// Console tests should time out on the I/O harness in case of panic.
+mod panic_wait_forever;
+
+use core::arch::asm;
+use libkernel::{bsp, cpu, exception, info, memory, println};
+
+#[inline(never)]
+fn nested_system_call() {
+    #[cfg(target_arch = "aarch64")]
+    unsafe {
+        asm!("svc #0x1337", options(nomem, nostack, preserves_flags));
+    }
+
+    #[cfg(not(target_arch = "aarch64"))]
+    {
+        info!("Not supported yet");
+        cpu::wait_forever();
+    }
+}
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    use memory::mmu::interface::MMU;
+
+    exception::handling_init();
+    bsp::console::qemu_bring_up_console();
+
+    // This line will be printed as the test header.
+    println!("Testing exception restore");
+
+    if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
+        info!("MMU: {}", string);
+        cpu::qemu_exit_failure()
+    }
+
+    info!("Making a dummy system call");
+
+    // Calling this inside a function indirectly tests if the link register is restored properly.
+    nested_system_call();
+
+    info!("Back from system call!");
+
+    // The QEMU process running this test will be closed by the I/O test harness.
+    cpu::wait_forever();
+}
diff --git a/12_integrated_testing/tests/panic_wait_forever/mod.rs b/12_integrated_testing/tests/panic_wait_forever/mod.rs
new file mode 100644
index 000000000..7a4effa50
--- /dev/null
+++ b/12_integrated_testing/tests/panic_wait_forever/mod.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+/// Overwrites libkernel's `panic_wait::_panic_exit()` with wait_forever.
+#[no_mangle]
+fn _panic_exit() -> ! {
+    libkernel::cpu::wait_forever()
+}
diff --git a/13_exceptions_part2_peripheral_IRQs/Cargo.toml b/13_exceptions_part2_peripheral_IRQs/Cargo.toml
index b4572cb21..7ef558318 100644
--- a/13_exceptions_part2_peripheral_IRQs/Cargo.toml
+++ b/13_exceptions_part2_peripheral_IRQs/Cargo.toml
@@ -54,3 +54,7 @@ harness = false
 [[test]]
 name = "02_exception_sync_page_fault"
 harness = false
+
+[[test]]
+name = "03_exception_restore_sanity"
+harness = false
diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index 42b984b73..72b3fa5e3 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -913,7 +913,7 @@ diff -uNr 12_integrated_testing/src/_arch/aarch64/exception.rs 13_exceptions_par
  use core::{arch::global_asm, cell::UnsafeCell, fmt};
  use cortex_a::{asm::barrier, registers::*};
  use tock_registers::{
-@@ -91,8 +92,11 @@
+@@ -102,8 +103,11 @@
  }
 
  #[no_mangle]
@@ -2753,9 +2753,9 @@ diff -uNr 12_integrated_testing/src/synchronization.rs 13_exceptions_part2_perip
 +    }
  }
 
-diff -uNr 12_integrated_testing/tests/03_exception_irq_sanity.rs 13_exceptions_part2_peripheral_IRQs/tests/03_exception_irq_sanity.rs
---- 12_integrated_testing/tests/03_exception_irq_sanity.rs
-+++ 13_exceptions_part2_peripheral_IRQs/tests/03_exception_irq_sanity.rs
+diff -uNr 12_integrated_testing/tests/04_exception_irq_sanity.rs 13_exceptions_part2_peripheral_IRQs/tests/04_exception_irq_sanity.rs
+--- 12_integrated_testing/tests/04_exception_irq_sanity.rs
++++ 13_exceptions_part2_peripheral_IRQs/tests/04_exception_irq_sanity.rs
 @@ -0,0 +1,66 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
index 1e9c3f99b..184410187 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
@@ -88,6 +88,17 @@ unsafe extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
 
 #[no_mangle]
 unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
+    #[cfg(feature = "test_build")]
+    {
+        const TEST_SVC_ID: u64 = 0x1337;
+
+        if let Some(ESR_EL1::EC::Value::SVC64) = e.esr_el1.exception_class() {
+            if e.esr_el1.iss() == TEST_SVC_ID {
+                return;
+            }
+        }
+    }
+
     default_exception_handler(e);
 }
 
@@ -184,6 +195,12 @@ impl EsrEL1 {
     fn exception_class(&self) -> Option<ESR_EL1::EC::Value> {
         self.0.read_as_enum(ESR_EL1::EC)
     }
+
+    #[cfg(feature = "test_build")]
+    #[inline(always)]
+    fn iss(&self) -> u64 {
+        self.0.read(ESR_EL1::ISS)
+    }
 }
 
 /// Human readable ESR_EL1.
diff --git a/13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs b/13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs
index 6aa3de18a..dccb6cc2a 100644
--- a/13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs
+++ b/13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs
@@ -8,6 +8,9 @@
 #![no_main]
 #![no_std]
 
+/// Console tests should time out on the I/O harness in case of panic.
+mod panic_wait_forever;
+
 use libkernel::{bsp, console, cpu, exception, print};
 
 #[no_mangle]
diff --git a/13_exceptions_part2_peripheral_IRQs/tests/03_exception_restore_sanity.rb b/13_exceptions_part2_peripheral_IRQs/tests/03_exception_restore_sanity.rb
new file mode 100644
index 000000000..c3c725ed5
--- /dev/null
+++ b/13_exceptions_part2_peripheral_IRQs/tests/03_exception_restore_sanity.rb
@@ -0,0 +1,25 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+require_relative '../../common/tests/console_io_test'
+
+# Verify that exception restore works.
+class ExceptionRestoreTest < SubtestBase
+    def name
+        'Exception restore'
+    end
+
+    def run(qemu_out, _qemu_in)
+        expect_or_raise(qemu_out, 'Back from system call!')
+    end
+end
+
+##--------------------------------------------------------------------------------------------------
+## Test registration
+##--------------------------------------------------------------------------------------------------
+def subtest_collection
+    [ExceptionRestoreTest.new]
+end
diff --git a/13_exceptions_part2_peripheral_IRQs/tests/03_exception_restore_sanity.rs b/13_exceptions_part2_peripheral_IRQs/tests/03_exception_restore_sanity.rs
new file mode 100644
index 000000000..f25ed6453
--- /dev/null
+++ b/13_exceptions_part2_peripheral_IRQs/tests/03_exception_restore_sanity.rs
@@ -0,0 +1,55 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! A simple sanity test to see if exception restore code works.
+
+#![feature(format_args_nl)]
+#![no_main]
+#![no_std]
+
+/// Console tests should time out on the I/O harness in case of panic.
+mod panic_wait_forever;
+
+use core::arch::asm;
+use libkernel::{bsp, cpu, exception, info, memory, println};
+
+#[inline(never)]
+fn nested_system_call() {
+    #[cfg(target_arch = "aarch64")]
+    unsafe {
+        asm!("svc #0x1337", options(nomem, nostack, preserves_flags));
+    }
+
+    #[cfg(not(target_arch = "aarch64"))]
+    {
+        info!("Not supported yet");
+        cpu::wait_forever();
+    }
+}
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    use memory::mmu::interface::MMU;
+
+    exception::handling_init();
+    bsp::console::qemu_bring_up_console();
+
+    // This line will be printed as the test header.
+    println!("Testing exception restore");
+
+    if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
+        info!("MMU: {}", string);
+        cpu::qemu_exit_failure()
+    }
+
+    info!("Making a dummy system call");
+
+    // Calling this inside a function indirectly tests if the link register is restored properly.
+    nested_system_call();
+
+    info!("Back from system call!");
+
+    // The QEMU process running this test will be closed by the I/O test harness.
+    cpu::wait_forever();
+}
diff --git a/13_exceptions_part2_peripheral_IRQs/tests/03_exception_irq_sanity.rs b/13_exceptions_part2_peripheral_IRQs/tests/04_exception_irq_sanity.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/tests/03_exception_irq_sanity.rs
rename to 13_exceptions_part2_peripheral_IRQs/tests/04_exception_irq_sanity.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/tests/panic_wait_forever/mod.rs b/13_exceptions_part2_peripheral_IRQs/tests/panic_wait_forever/mod.rs
new file mode 100644
index 000000000..7a4effa50
--- /dev/null
+++ b/13_exceptions_part2_peripheral_IRQs/tests/panic_wait_forever/mod.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+/// Overwrites libkernel's `panic_wait::_panic_exit()` with wait_forever.
+#[no_mangle]
+fn _panic_exit() -> ! {
+    libkernel::cpu::wait_forever()
+}
diff --git a/14_virtual_mem_part2_mmio_remap/Cargo.toml b/14_virtual_mem_part2_mmio_remap/Cargo.toml
index 760dbce20..3146ad05f 100644
--- a/14_virtual_mem_part2_mmio_remap/Cargo.toml
+++ b/14_virtual_mem_part2_mmio_remap/Cargo.toml
@@ -54,3 +54,7 @@ harness = false
 [[test]]
 name = "02_exception_sync_page_fault"
 harness = false
+
+[[test]]
+name = "03_exception_restore_sanity"
+harness = false
diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index 3f6c78e93..ccec183cf 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -3641,4 +3641,52 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault
      info!("Writing beyond mapped area to address 9 GiB...");
      let big_addr: u64 = 9 * 1024 * 1024 * 1024;
 
+diff -uNr 13_exceptions_part2_peripheral_IRQs/tests/03_exception_restore_sanity.rs 14_virtual_mem_part2_mmio_remap/tests/03_exception_restore_sanity.rs
+--- 13_exceptions_part2_peripheral_IRQs/tests/03_exception_restore_sanity.rs
++++ 14_virtual_mem_part2_mmio_remap/tests/03_exception_restore_sanity.rs
+@@ -30,18 +30,40 @@
+
+ #[no_mangle]
+ unsafe fn kernel_init() -> ! {
+-    use memory::mmu::interface::MMU;
++    use libkernel::driver::interface::DriverManager;
+
+     exception::handling_init();
+-    bsp::console::qemu_bring_up_console();
+
+     // This line will be printed as the test header.
+     println!("Testing exception restore");
+
+-    if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
+-        info!("MMU: {}", string);
++    let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
++        Err(string) => {
++            info!("Error mapping kernel binary: {}", string);
++            cpu::qemu_exit_failure()
++        }
++        Ok(addr) => addr,
++    };
++
++    if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
++        info!("Enabling MMU failed: {}", e);
+         cpu::qemu_exit_failure()
+     }
++    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
++
++    memory::mmu::post_enable_init();
++    bsp::console::qemu_bring_up_console();
++
++    // Bring up the drivers needed for printing first.
++    for i in bsp::driver::driver_manager()
++        .early_print_device_drivers()
++        .iter()
++    {
++        // Any encountered errors cannot be printed yet, obviously, so just safely park the CPU.
++        i.init().unwrap_or_else(|_| cpu::qemu_exit_failure());
++    }
++    bsp::driver::driver_manager().post_early_print_device_driver_init();
++    // Printing available again from here on.
+
+     info!("Making a dummy system call");
+
 ```
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
index 1e9c3f99b..184410187 100644
--- a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
@@ -88,6 +88,17 @@ unsafe extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
 
 #[no_mangle]
 unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
+    #[cfg(feature = "test_build")]
+    {
+        const TEST_SVC_ID: u64 = 0x1337;
+
+        if let Some(ESR_EL1::EC::Value::SVC64) = e.esr_el1.exception_class() {
+            if e.esr_el1.iss() == TEST_SVC_ID {
+                return;
+            }
+        }
+    }
+
     default_exception_handler(e);
 }
 
@@ -184,6 +195,12 @@ impl EsrEL1 {
     fn exception_class(&self) -> Option<ESR_EL1::EC::Value> {
         self.0.read_as_enum(ESR_EL1::EC)
     }
+
+    #[cfg(feature = "test_build")]
+    #[inline(always)]
+    fn iss(&self) -> u64 {
+        self.0.read(ESR_EL1::ISS)
+    }
 }
 
 /// Human readable ESR_EL1.
diff --git a/14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs b/14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs
index 6aa3de18a..dccb6cc2a 100644
--- a/14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs
+++ b/14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs
@@ -8,6 +8,9 @@
 #![no_main]
 #![no_std]
 
+/// Console tests should time out on the I/O harness in case of panic.
+mod panic_wait_forever;
+
 use libkernel::{bsp, console, cpu, exception, print};
 
 #[no_mangle]
diff --git a/14_virtual_mem_part2_mmio_remap/tests/03_exception_restore_sanity.rb b/14_virtual_mem_part2_mmio_remap/tests/03_exception_restore_sanity.rb
new file mode 100644
index 000000000..c3c725ed5
--- /dev/null
+++ b/14_virtual_mem_part2_mmio_remap/tests/03_exception_restore_sanity.rb
@@ -0,0 +1,25 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+require_relative '../../common/tests/console_io_test'
+
+# Verify that exception restore works.
+class ExceptionRestoreTest < SubtestBase
+    def name
+        'Exception restore'
+    end
+
+    def run(qemu_out, _qemu_in)
+        expect_or_raise(qemu_out, 'Back from system call!')
+    end
+end
+
+##--------------------------------------------------------------------------------------------------
+## Test registration
+##--------------------------------------------------------------------------------------------------
+def subtest_collection
+    [ExceptionRestoreTest.new]
+end
diff --git a/14_virtual_mem_part2_mmio_remap/tests/03_exception_restore_sanity.rs b/14_virtual_mem_part2_mmio_remap/tests/03_exception_restore_sanity.rs
new file mode 100644
index 000000000..c6ff7b3d9
--- /dev/null
+++ b/14_virtual_mem_part2_mmio_remap/tests/03_exception_restore_sanity.rs
@@ -0,0 +1,77 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! A simple sanity test to see if exception restore code works.
+
+#![feature(format_args_nl)]
+#![no_main]
+#![no_std]
+
+/// Console tests should time out on the I/O harness in case of panic.
+mod panic_wait_forever;
+
+use core::arch::asm;
+use libkernel::{bsp, cpu, exception, info, memory, println};
+
+#[inline(never)]
+fn nested_system_call() {
+    #[cfg(target_arch = "aarch64")]
+    unsafe {
+        asm!("svc #0x1337", options(nomem, nostack, preserves_flags));
+    }
+
+    #[cfg(not(target_arch = "aarch64"))]
+    {
+        info!("Not supported yet");
+        cpu::wait_forever();
+    }
+}
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    use libkernel::driver::interface::DriverManager;
+
+    exception::handling_init();
+
+    // This line will be printed as the test header.
+    println!("Testing exception restore");
+
+    let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
+        Err(string) => {
+            info!("Error mapping kernel binary: {}", string);
+            cpu::qemu_exit_failure()
+        }
+        Ok(addr) => addr,
+    };
+
+    if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
+        info!("Enabling MMU failed: {}", e);
+        cpu::qemu_exit_failure()
+    }
+    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
+
+    memory::mmu::post_enable_init();
+    bsp::console::qemu_bring_up_console();
+
+    // Bring up the drivers needed for printing first.
+    for i in bsp::driver::driver_manager()
+        .early_print_device_drivers()
+        .iter()
+    {
+        // Any encountered errors cannot be printed yet, obviously, so just safely park the CPU.
+        i.init().unwrap_or_else(|_| cpu::qemu_exit_failure());
+    }
+    bsp::driver::driver_manager().post_early_print_device_driver_init();
+    // Printing available again from here on.
+
+    info!("Making a dummy system call");
+
+    // Calling this inside a function indirectly tests if the link register is restored properly.
+    nested_system_call();
+
+    info!("Back from system call!");
+
+    // The QEMU process running this test will be closed by the I/O test harness.
+    cpu::wait_forever();
+}
diff --git a/14_virtual_mem_part2_mmio_remap/tests/03_exception_irq_sanity.rs b/14_virtual_mem_part2_mmio_remap/tests/04_exception_irq_sanity.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/tests/03_exception_irq_sanity.rs
rename to 14_virtual_mem_part2_mmio_remap/tests/04_exception_irq_sanity.rs
diff --git a/14_virtual_mem_part2_mmio_remap/tests/panic_wait_forever/mod.rs b/14_virtual_mem_part2_mmio_remap/tests/panic_wait_forever/mod.rs
new file mode 100644
index 000000000..7a4effa50
--- /dev/null
+++ b/14_virtual_mem_part2_mmio_remap/tests/panic_wait_forever/mod.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+/// Overwrites libkernel's `panic_wait::_panic_exit()` with wait_forever.
+#[no_mangle]
+fn _panic_exit() -> ! {
+    libkernel::cpu::wait_forever()
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/Cargo.toml b/15_virtual_mem_part3_precomputed_tables/Cargo.toml
index ea20f0db3..6a41bd03d 100644
--- a/15_virtual_mem_part3_precomputed_tables/Cargo.toml
+++ b/15_virtual_mem_part3_precomputed_tables/Cargo.toml
@@ -54,3 +54,7 @@ harness = false
 [[test]]
 name = "02_exception_sync_page_fault"
 harness = false
+
+[[test]]
+name = "03_exception_restore_sanity"
+harness = false
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index 4d7cc40eb..77d93f598 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -1686,16 +1686,16 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs 15_virtual_mem_part3
 diff -uNr 14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs 15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rs
 --- 14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs
 +++ 15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rs
-@@ -8,7 +8,7 @@
- #![no_main]
- #![no_std]
+@@ -11,7 +11,7 @@
+ /// Console tests should time out on the I/O harness in case of panic.
+ mod panic_wait_forever;
 
 -use libkernel::{bsp, console, cpu, exception, print};
 +use libkernel::{bsp, console, cpu, exception, memory, print};
 
  #[no_mangle]
  unsafe fn kernel_init() -> ! {
-@@ -16,6 +16,7 @@
+@@ -19,6 +19,7 @@
      use console::interface::*;
 
      exception::handling_init();
@@ -1770,9 +1770,56 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
      info!("Writing beyond mapped area to address 9 GiB...");
      let big_addr: u64 = 9 * 1024 * 1024 * 1024;
 
-diff -uNr 14_virtual_mem_part2_mmio_remap/tests/03_exception_irq_sanity.rs 15_virtual_mem_part3_precomputed_tables/tests/03_exception_irq_sanity.rs
---- 14_virtual_mem_part2_mmio_remap/tests/03_exception_irq_sanity.rs
-+++ 15_virtual_mem_part3_precomputed_tables/tests/03_exception_irq_sanity.rs
+diff -uNr 14_virtual_mem_part2_mmio_remap/tests/03_exception_restore_sanity.rs 15_virtual_mem_part3_precomputed_tables/tests/03_exception_restore_sanity.rs
+--- 14_virtual_mem_part2_mmio_remap/tests/03_exception_restore_sanity.rs
++++ 15_virtual_mem_part3_precomputed_tables/tests/03_exception_restore_sanity.rs
+@@ -30,40 +30,12 @@
+
+ #[no_mangle]
+ unsafe fn kernel_init() -> ! {
+-    use libkernel::driver::interface::DriverManager;
+-
+     exception::handling_init();
+-
+-    // This line will be printed as the test header.
+-    println!("Testing exception restore");
+-
+-    let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
+-        Err(string) => {
+-            info!("Error mapping kernel binary: {}", string);
+-            cpu::qemu_exit_failure()
+-        }
+-        Ok(addr) => addr,
+-    };
+-
+-    if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
+-        info!("Enabling MMU failed: {}", e);
+-        cpu::qemu_exit_failure()
+-    }
+-    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
+-
+     memory::mmu::post_enable_init();
+     bsp::console::qemu_bring_up_console();
+
+-    // Bring up the drivers needed for printing first.
+-    for i in bsp::driver::driver_manager()
+-        .early_print_device_drivers()
+-        .iter()
+-    {
+-        // Any encountered errors cannot be printed yet, obviously, so just safely park the CPU.
+-        i.init().unwrap_or_else(|_| cpu::qemu_exit_failure());
+-    }
+-    bsp::driver::driver_manager().post_early_print_device_driver_init();
+-    // Printing available again from here on.
++    // This line will be printed as the test header.
++    println!("Testing exception restore");
+
+     info!("Making a dummy system call");
+
+
+diff -uNr 14_virtual_mem_part2_mmio_remap/tests/04_exception_irq_sanity.rs 15_virtual_mem_part3_precomputed_tables/tests/04_exception_irq_sanity.rs
+--- 14_virtual_mem_part2_mmio_remap/tests/04_exception_irq_sanity.rs
++++ 15_virtual_mem_part3_precomputed_tables/tests/04_exception_irq_sanity.rs
 @@ -10,11 +10,12 @@
  #![reexport_test_harness_main = "test_main"]
  #![test_runner(libkernel::test_runner)]
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.rs
index 1e9c3f99b..184410187 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.rs
@@ -88,6 +88,17 @@ unsafe extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
 
 #[no_mangle]
 unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
+    #[cfg(feature = "test_build")]
+    {
+        const TEST_SVC_ID: u64 = 0x1337;
+
+        if let Some(ESR_EL1::EC::Value::SVC64) = e.esr_el1.exception_class() {
+            if e.esr_el1.iss() == TEST_SVC_ID {
+                return;
+            }
+        }
+    }
+
     default_exception_handler(e);
 }
 
@@ -184,6 +195,12 @@ impl EsrEL1 {
     fn exception_class(&self) -> Option<ESR_EL1::EC::Value> {
         self.0.read_as_enum(ESR_EL1::EC)
     }
+
+    #[cfg(feature = "test_build")]
+    #[inline(always)]
+    fn iss(&self) -> u64 {
+        self.0.read(ESR_EL1::ISS)
+    }
 }
 
 /// Human readable ESR_EL1.
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rs b/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rs
index e038cd47b..6595aac1b 100644
--- a/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rs
+++ b/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rs
@@ -8,6 +8,9 @@
 #![no_main]
 #![no_std]
 
+/// Console tests should time out on the I/O harness in case of panic.
+mod panic_wait_forever;
+
 use libkernel::{bsp, console, cpu, exception, memory, print};
 
 #[no_mangle]
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/03_exception_restore_sanity.rb b/15_virtual_mem_part3_precomputed_tables/tests/03_exception_restore_sanity.rb
new file mode 100644
index 000000000..c3c725ed5
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/tests/03_exception_restore_sanity.rb
@@ -0,0 +1,25 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+require_relative '../../common/tests/console_io_test'
+
+# Verify that exception restore works.
+class ExceptionRestoreTest < SubtestBase
+    def name
+        'Exception restore'
+    end
+
+    def run(qemu_out, _qemu_in)
+        expect_or_raise(qemu_out, 'Back from system call!')
+    end
+end
+
+##--------------------------------------------------------------------------------------------------
+## Test registration
+##--------------------------------------------------------------------------------------------------
+def subtest_collection
+    [ExceptionRestoreTest.new]
+end
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/03_exception_restore_sanity.rs b/15_virtual_mem_part3_precomputed_tables/tests/03_exception_restore_sanity.rs
new file mode 100644
index 000000000..983d488f1
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/tests/03_exception_restore_sanity.rs
@@ -0,0 +1,49 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! A simple sanity test to see if exception restore code works.
+
+#![feature(format_args_nl)]
+#![no_main]
+#![no_std]
+
+/// Console tests should time out on the I/O harness in case of panic.
+mod panic_wait_forever;
+
+use core::arch::asm;
+use libkernel::{bsp, cpu, exception, info, memory, println};
+
+#[inline(never)]
+fn nested_system_call() {
+    #[cfg(target_arch = "aarch64")]
+    unsafe {
+        asm!("svc #0x1337", options(nomem, nostack, preserves_flags));
+    }
+
+    #[cfg(not(target_arch = "aarch64"))]
+    {
+        info!("Not supported yet");
+        cpu::wait_forever();
+    }
+}
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    exception::handling_init();
+    memory::mmu::post_enable_init();
+    bsp::console::qemu_bring_up_console();
+
+    // This line will be printed as the test header.
+    println!("Testing exception restore");
+
+    info!("Making a dummy system call");
+
+    // Calling this inside a function indirectly tests if the link register is restored properly.
+    nested_system_call();
+
+    info!("Back from system call!");
+
+    // The QEMU process running this test will be closed by the I/O test harness.
+    cpu::wait_forever();
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/03_exception_irq_sanity.rs b/15_virtual_mem_part3_precomputed_tables/tests/04_exception_irq_sanity.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/tests/03_exception_irq_sanity.rs
rename to 15_virtual_mem_part3_precomputed_tables/tests/04_exception_irq_sanity.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/panic_wait_forever/mod.rs b/15_virtual_mem_part3_precomputed_tables/tests/panic_wait_forever/mod.rs
new file mode 100644
index 000000000..7a4effa50
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/tests/panic_wait_forever/mod.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+/// Overwrites libkernel's `panic_wait::_panic_exit()` with wait_forever.
+#[no_mangle]
+fn _panic_exit() -> ! {
+    libkernel::cpu::wait_forever()
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/Cargo.toml b/16_virtual_mem_part4_higher_half_kernel/Cargo.toml
index 07a1c57ec..4964df472 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Cargo.toml
+++ b/16_virtual_mem_part4_higher_half_kernel/Cargo.toml
@@ -54,3 +54,7 @@ harness = false
 [[test]]
 name = "02_exception_sync_page_fault"
 harness = false
+
+[[test]]
+name = "03_exception_restore_sanity"
+harness = false
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.rs
index 1e9c3f99b..184410187 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.rs
@@ -88,6 +88,17 @@ unsafe extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
 
 #[no_mangle]
 unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
+    #[cfg(feature = "test_build")]
+    {
+        const TEST_SVC_ID: u64 = 0x1337;
+
+        if let Some(ESR_EL1::EC::Value::SVC64) = e.esr_el1.exception_class() {
+            if e.esr_el1.iss() == TEST_SVC_ID {
+                return;
+            }
+        }
+    }
+
     default_exception_handler(e);
 }
 
@@ -184,6 +195,12 @@ impl EsrEL1 {
     fn exception_class(&self) -> Option<ESR_EL1::EC::Value> {
         self.0.read_as_enum(ESR_EL1::EC)
     }
+
+    #[cfg(feature = "test_build")]
+    #[inline(always)]
+    fn iss(&self) -> u64 {
+        self.0.read(ESR_EL1::ISS)
+    }
 }
 
 /// Human readable ESR_EL1.
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rs b/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rs
index e038cd47b..6595aac1b 100644
--- a/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rs
@@ -8,6 +8,9 @@
 #![no_main]
 #![no_std]
 
+/// Console tests should time out on the I/O harness in case of panic.
+mod panic_wait_forever;
+
 use libkernel::{bsp, console, cpu, exception, memory, print};
 
 #[no_mangle]
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/03_exception_restore_sanity.rb b/16_virtual_mem_part4_higher_half_kernel/tests/03_exception_restore_sanity.rb
new file mode 100644
index 000000000..c3c725ed5
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/tests/03_exception_restore_sanity.rb
@@ -0,0 +1,25 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+require_relative '../../common/tests/console_io_test'
+
+# Verify that exception restore works.
+class ExceptionRestoreTest < SubtestBase
+    def name
+        'Exception restore'
+    end
+
+    def run(qemu_out, _qemu_in)
+        expect_or_raise(qemu_out, 'Back from system call!')
+    end
+end
+
+##--------------------------------------------------------------------------------------------------
+## Test registration
+##--------------------------------------------------------------------------------------------------
+def subtest_collection
+    [ExceptionRestoreTest.new]
+end
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/03_exception_restore_sanity.rs b/16_virtual_mem_part4_higher_half_kernel/tests/03_exception_restore_sanity.rs
new file mode 100644
index 000000000..983d488f1
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/tests/03_exception_restore_sanity.rs
@@ -0,0 +1,49 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! A simple sanity test to see if exception restore code works.
+
+#![feature(format_args_nl)]
+#![no_main]
+#![no_std]
+
+/// Console tests should time out on the I/O harness in case of panic.
+mod panic_wait_forever;
+
+use core::arch::asm;
+use libkernel::{bsp, cpu, exception, info, memory, println};
+
+#[inline(never)]
+fn nested_system_call() {
+    #[cfg(target_arch = "aarch64")]
+    unsafe {
+        asm!("svc #0x1337", options(nomem, nostack, preserves_flags));
+    }
+
+    #[cfg(not(target_arch = "aarch64"))]
+    {
+        info!("Not supported yet");
+        cpu::wait_forever();
+    }
+}
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    exception::handling_init();
+    memory::mmu::post_enable_init();
+    bsp::console::qemu_bring_up_console();
+
+    // This line will be printed as the test header.
+    println!("Testing exception restore");
+
+    info!("Making a dummy system call");
+
+    // Calling this inside a function indirectly tests if the link register is restored properly.
+    nested_system_call();
+
+    info!("Back from system call!");
+
+    // The QEMU process running this test will be closed by the I/O test harness.
+    cpu::wait_forever();
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/03_exception_irq_sanity.rs b/16_virtual_mem_part4_higher_half_kernel/tests/04_exception_irq_sanity.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/tests/03_exception_irq_sanity.rs
rename to 16_virtual_mem_part4_higher_half_kernel/tests/04_exception_irq_sanity.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/panic_wait_forever/mod.rs b/16_virtual_mem_part4_higher_half_kernel/tests/panic_wait_forever/mod.rs
new file mode 100644
index 000000000..7a4effa50
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/tests/panic_wait_forever/mod.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+/// Overwrites libkernel's `panic_wait::_panic_exit()` with wait_forever.
+#[no_mangle]
+fn _panic_exit() -> ! {
+    libkernel::cpu::wait_forever()
+}

From 0f2db4bf8e92bcc0bab2d566c9a71480e549a7d9 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Tue, 5 Apr 2022 23:11:36 +0200
Subject: [PATCH 122/214] Ignore spanish translations in diff

---
 utils/diff_tut_folders.bash | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/utils/diff_tut_folders.bash b/utils/diff_tut_folders.bash
index 73d5f38d0..f4e6d1070 100755
--- a/utils/diff_tut_folders.bash
+++ b/utils/diff_tut_folders.bash
@@ -8,6 +8,7 @@ DIFF=$(
     diff -uNr \
 	 -x README.md \
 	 -x README.CN.md \
+	 -x README.ES.md \
 	 -x kernel \
 	 -x kernel8.img \
 	 -x Cargo.lock \
@@ -16,7 +17,7 @@ DIFF=$(
 	| sed -r "s/[12][90][127][0-9]-[0-9][0-9]-[0-9][0-9] .*//g" \
 	| sed -r "s/[[:space:]]*$//g" \
 	| sed -r "s/%/modulo/g" \
-        | sed -r "s/diff -uNr -x README.md -x README.CN.md -x kernel -x kernel8.img -x Cargo.lock -x target/\ndiff -uNr/g"
+        | sed -r "s/diff -uNr -x README.md -x README.CN.md -x README.ES.md -x kernel -x kernel8.img -x Cargo.lock -x target/\ndiff -uNr/g"
      )
 
 HEADER="## Diff to previous"

From 68b81aa6a0c464413145075dc9d4f4a2389a633e Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Fri, 8 Apr 2022 22:24:12 +0200
Subject: [PATCH 123/214] Panic: Guard against infinite panic loops

---
 01_wait_forever/src/panic_wait.rs             |   4 ++
 02_runtime_init/README.md                     |   5 ++-
 02_runtime_init/src/panic_wait.rs             |   4 ++
 03_hacky_hello_world/README.md                |  38 +++++++++++++++++-
 03_hacky_hello_world/src/panic_wait.rs        |  36 +++++++++++++++++
 04_safe_globals/src/panic_wait.rs             |  36 +++++++++++++++++
 05_drivers_gpio_uart/README.md                |  20 +++++----
 05_drivers_gpio_uart/src/panic_wait.rs        |  32 +++++++++++++++
 06_uart_chainloader/demo_payload_rpi3.img     | Bin 6664 -> 6696 bytes
 06_uart_chainloader/demo_payload_rpi4.img     | Bin 6512 -> 6536 bytes
 06_uart_chainloader/src/panic_wait.rs         |  32 +++++++++++++++
 07_timestamps/README.md                       |   5 ++-
 07_timestamps/src/panic_wait.rs               |  32 +++++++++++++++
 08_hw_debug_JTAG/src/panic_wait.rs            |  32 +++++++++++++++
 09_privilege_level/src/panic_wait.rs          |  32 +++++++++++++++
 .../src/panic_wait.rs                         |  32 +++++++++++++++
 .../src/panic_wait.rs                         |  32 +++++++++++++++
 12_integrated_testing/README.md               |  11 ++++-
 12_integrated_testing/src/panic_wait.rs       |  32 +++++++++++++++
 13_exceptions_part2_peripheral_IRQs/README.md |   6 +--
 .../src/panic_wait.rs                         |  32 +++++++++++++++
 .../src/panic_wait.rs                         |  32 +++++++++++++++
 .../src/panic_wait.rs                         |  32 +++++++++++++++
 .../src/panic_wait.rs                         |  32 +++++++++++++++
 X1_JTAG_boot/jtag_boot_rpi3.img               | Bin 7808 -> 7840 bytes
 X1_JTAG_boot/jtag_boot_rpi4.img               | Bin 6832 -> 6864 bytes
 X1_JTAG_boot/src/panic_wait.rs                |  32 +++++++++++++++
 27 files changed, 566 insertions(+), 15 deletions(-)

diff --git a/01_wait_forever/src/panic_wait.rs b/01_wait_forever/src/panic_wait.rs
index c0ee2be3c..c9a8f5e43 100644
--- a/01_wait_forever/src/panic_wait.rs
+++ b/01_wait_forever/src/panic_wait.rs
@@ -6,6 +6,10 @@
 
 use core::panic::PanicInfo;
 
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
 #[panic_handler]
 fn panic(_info: &PanicInfo) -> ! {
     unimplemented!()
diff --git a/02_runtime_init/README.md b/02_runtime_init/README.md
index bcb3f8c37..221113efd 100644
--- a/02_runtime_init/README.md
+++ b/02_runtime_init/README.md
@@ -327,13 +327,16 @@ diff -uNr 01_wait_forever/src/main.rs 02_runtime_init/src/main.rs
 diff -uNr 01_wait_forever/src/panic_wait.rs 02_runtime_init/src/panic_wait.rs
 --- 01_wait_forever/src/panic_wait.rs
 +++ 02_runtime_init/src/panic_wait.rs
-@@ -4,9 +4,10 @@
+@@ -4,6 +4,7 @@
 
  //! A panic handler that infinitely waits.
 
 +use crate::cpu;
  use core::panic::PanicInfo;
 
+ //--------------------------------------------------------------------------------------------------
+@@ -12,5 +13,5 @@
+
  #[panic_handler]
  fn panic(_info: &PanicInfo) -> ! {
 -    unimplemented!()
diff --git a/02_runtime_init/src/panic_wait.rs b/02_runtime_init/src/panic_wait.rs
index cc0e1ae04..7e9adfcea 100644
--- a/02_runtime_init/src/panic_wait.rs
+++ b/02_runtime_init/src/panic_wait.rs
@@ -7,6 +7,10 @@
 use crate::cpu;
 use core::panic::PanicInfo;
 
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
 #[panic_handler]
 fn panic(_info: &PanicInfo) -> ! {
     cpu::wait_forever()
diff --git a/03_hacky_hello_world/README.md b/03_hacky_hello_world/README.md
index 131e45b3a..dffbbb8ae 100644
--- a/03_hacky_hello_world/README.md
+++ b/03_hacky_hello_world/README.md
@@ -238,7 +238,7 @@ diff -uNr 02_runtime_init/src/main.rs 03_hacky_hello_world/src/main.rs
 diff -uNr 02_runtime_init/src/panic_wait.rs 03_hacky_hello_world/src/panic_wait.rs
 --- 02_runtime_init/src/panic_wait.rs
 +++ 03_hacky_hello_world/src/panic_wait.rs
-@@ -4,10 +4,16 @@
+@@ -4,14 +4,52 @@
 
  //! A panic handler that infinitely waits.
 
@@ -246,9 +246,45 @@ diff -uNr 02_runtime_init/src/panic_wait.rs 03_hacky_hello_world/src/panic_wait.
 +use crate::{cpu, println};
  use core::panic::PanicInfo;
 
+ //--------------------------------------------------------------------------------------------------
+ // Private Code
+ //--------------------------------------------------------------------------------------------------
+
++/// Stop immediately if called a second time.
++///
++/// # Note
++///
++/// Using atomics here relieves us from needing to use `unsafe` for the static variable.
++///
++/// On `AArch64`, which is the only implemented architecture at the time of writing this,
++/// [`AtomicBool::load`] and [`AtomicBool::store`] are lowered to ordinary load and store
++/// instructions. They are therefore safe to use even with MMU + caching deactivated.
++///
++/// [`AtomicBool::load`]: core::sync::atomic::AtomicBool::load
++/// [`AtomicBool::store`]: core::sync::atomic::AtomicBool::store
++fn panic_prevent_reenter() {
++    use core::sync::atomic::{AtomicBool, Ordering};
++
++    #[cfg(not(target_arch = "aarch64"))]
++    compile_error!("Add the target_arch to above's check if the following code is safe to use");
++
++    static PANIC_IN_PROGRESS: AtomicBool = AtomicBool::new(false);
++
++    if !PANIC_IN_PROGRESS.load(Ordering::Relaxed) {
++        PANIC_IN_PROGRESS.store(true, Ordering::Relaxed);
++
++        return;
++    }
++
++    cpu::wait_forever()
++}
++
  #[panic_handler]
 -fn panic(_info: &PanicInfo) -> ! {
 +fn panic(info: &PanicInfo) -> ! {
++    // Protect against panic infinite loops if any of the following code panics itself.
++    panic_prevent_reenter();
++
 +    if let Some(args) = info.message() {
 +        println!("\nKernel panic: {}", args);
 +    } else {
diff --git a/03_hacky_hello_world/src/panic_wait.rs b/03_hacky_hello_world/src/panic_wait.rs
index 3c1ca85b7..e37724a47 100644
--- a/03_hacky_hello_world/src/panic_wait.rs
+++ b/03_hacky_hello_world/src/panic_wait.rs
@@ -7,8 +7,44 @@
 use crate::{cpu, println};
 use core::panic::PanicInfo;
 
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// Stop immediately if called a second time.
+///
+/// # Note
+///
+/// Using atomics here relieves us from needing to use `unsafe` for the static variable.
+///
+/// On `AArch64`, which is the only implemented architecture at the time of writing this,
+/// [`AtomicBool::load`] and [`AtomicBool::store`] are lowered to ordinary load and store
+/// instructions. They are therefore safe to use even with MMU + caching deactivated.
+///
+/// [`AtomicBool::load`]: core::sync::atomic::AtomicBool::load
+/// [`AtomicBool::store`]: core::sync::atomic::AtomicBool::store
+fn panic_prevent_reenter() {
+    use core::sync::atomic::{AtomicBool, Ordering};
+
+    #[cfg(not(target_arch = "aarch64"))]
+    compile_error!("Add the target_arch to above's check if the following code is safe to use");
+
+    static PANIC_IN_PROGRESS: AtomicBool = AtomicBool::new(false);
+
+    if !PANIC_IN_PROGRESS.load(Ordering::Relaxed) {
+        PANIC_IN_PROGRESS.store(true, Ordering::Relaxed);
+
+        return;
+    }
+
+    cpu::wait_forever()
+}
+
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
+    // Protect against panic infinite loops if any of the following code panics itself.
+    panic_prevent_reenter();
+
     if let Some(args) = info.message() {
         println!("\nKernel panic: {}", args);
     } else {
diff --git a/04_safe_globals/src/panic_wait.rs b/04_safe_globals/src/panic_wait.rs
index 3c1ca85b7..e37724a47 100644
--- a/04_safe_globals/src/panic_wait.rs
+++ b/04_safe_globals/src/panic_wait.rs
@@ -7,8 +7,44 @@
 use crate::{cpu, println};
 use core::panic::PanicInfo;
 
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// Stop immediately if called a second time.
+///
+/// # Note
+///
+/// Using atomics here relieves us from needing to use `unsafe` for the static variable.
+///
+/// On `AArch64`, which is the only implemented architecture at the time of writing this,
+/// [`AtomicBool::load`] and [`AtomicBool::store`] are lowered to ordinary load and store
+/// instructions. They are therefore safe to use even with MMU + caching deactivated.
+///
+/// [`AtomicBool::load`]: core::sync::atomic::AtomicBool::load
+/// [`AtomicBool::store`]: core::sync::atomic::AtomicBool::store
+fn panic_prevent_reenter() {
+    use core::sync::atomic::{AtomicBool, Ordering};
+
+    #[cfg(not(target_arch = "aarch64"))]
+    compile_error!("Add the target_arch to above's check if the following code is safe to use");
+
+    static PANIC_IN_PROGRESS: AtomicBool = AtomicBool::new(false);
+
+    if !PANIC_IN_PROGRESS.load(Ordering::Relaxed) {
+        PANIC_IN_PROGRESS.store(true, Ordering::Relaxed);
+
+        return;
+    }
+
+    cpu::wait_forever()
+}
+
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
+    // Protect against panic infinite loops if any of the following code panics itself.
+    panic_prevent_reenter();
+
     if let Some(args) = info.message() {
         println!("\nKernel panic: {}", args);
     } else {
diff --git a/05_drivers_gpio_uart/README.md b/05_drivers_gpio_uart/README.md
index d54fa722e..44e5aadfa 100644
--- a/05_drivers_gpio_uart/README.md
+++ b/05_drivers_gpio_uart/README.md
@@ -1414,7 +1414,7 @@ diff -uNr 04_safe_globals/src/main.rs 05_drivers_gpio_uart/src/main.rs
 diff -uNr 04_safe_globals/src/panic_wait.rs 05_drivers_gpio_uart/src/panic_wait.rs
 --- 04_safe_globals/src/panic_wait.rs
 +++ 05_drivers_gpio_uart/src/panic_wait.rs
-@@ -4,15 +4,35 @@
+@@ -4,13 +4,29 @@
 
  //! A panic handler that infinitely waits.
 
@@ -1422,11 +1422,11 @@ diff -uNr 04_safe_globals/src/panic_wait.rs 05_drivers_gpio_uart/src/panic_wait.
 -use core::panic::PanicInfo;
 +use crate::{bsp, cpu};
 +use core::{fmt, panic::PanicInfo};
-+
-+//--------------------------------------------------------------------------------------------------
-+// Private Code
-+//--------------------------------------------------------------------------------------------------
-+
+
+ //--------------------------------------------------------------------------------------------------
+ // Private Code
+ //--------------------------------------------------------------------------------------------------
+
 +fn _panic_print(args: fmt::Arguments) {
 +    use fmt::Write;
 +
@@ -1442,9 +1442,13 @@ diff -uNr 04_safe_globals/src/panic_wait.rs 05_drivers_gpio_uart/src/panic_wait.
 +        _panic_print(format_args_nl!($($arg)*));
 +    })
 +}
++
+ /// Stop immediately if called a second time.
+ ///
+ /// # Note
+@@ -46,9 +62,9 @@
+     panic_prevent_reenter();
 
- #[panic_handler]
- fn panic(info: &PanicInfo) -> ! {
      if let Some(args) = info.message() {
 -        println!("\nKernel panic: {}", args);
 +        panic_println!("\nKernel panic: {}", args);
diff --git a/05_drivers_gpio_uart/src/panic_wait.rs b/05_drivers_gpio_uart/src/panic_wait.rs
index 946041b32..e879b5b3a 100644
--- a/05_drivers_gpio_uart/src/panic_wait.rs
+++ b/05_drivers_gpio_uart/src/panic_wait.rs
@@ -27,8 +27,40 @@ macro_rules! panic_println {
     })
 }
 
+/// Stop immediately if called a second time.
+///
+/// # Note
+///
+/// Using atomics here relieves us from needing to use `unsafe` for the static variable.
+///
+/// On `AArch64`, which is the only implemented architecture at the time of writing this,
+/// [`AtomicBool::load`] and [`AtomicBool::store`] are lowered to ordinary load and store
+/// instructions. They are therefore safe to use even with MMU + caching deactivated.
+///
+/// [`AtomicBool::load`]: core::sync::atomic::AtomicBool::load
+/// [`AtomicBool::store`]: core::sync::atomic::AtomicBool::store
+fn panic_prevent_reenter() {
+    use core::sync::atomic::{AtomicBool, Ordering};
+
+    #[cfg(not(target_arch = "aarch64"))]
+    compile_error!("Add the target_arch to above's check if the following code is safe to use");
+
+    static PANIC_IN_PROGRESS: AtomicBool = AtomicBool::new(false);
+
+    if !PANIC_IN_PROGRESS.load(Ordering::Relaxed) {
+        PANIC_IN_PROGRESS.store(true, Ordering::Relaxed);
+
+        return;
+    }
+
+    cpu::wait_forever()
+}
+
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
+    // Protect against panic infinite loops if any of the following code panics itself.
+    panic_prevent_reenter();
+
     if let Some(args) = info.message() {
         panic_println!("\nKernel panic: {}", args);
     } else {
diff --git a/06_uart_chainloader/demo_payload_rpi3.img b/06_uart_chainloader/demo_payload_rpi3.img
index 800ae2132d4aaf9745d5e39fe7fa3e8986e34362..b95058e4377a7f061a86cb39025e188660b064fe 100755
GIT binary patch
delta 974
zcmYjPUr1A76hGg+`=4(2PPe<;THBm?H=!aM$VSjKhNeVf4?fOWWFq~6Ug{<1QxZMw
z<1;LX)Q4c#he(Fd5Mts}&_hy5(nFg*xYm<G)&jkK_wFJdxZLlY-#Nc?e&_q9qPb{R
zv=ze`0lW=DWHBT%j>iU=R{hcz;NY+;-_O_(6L6Cu_6d^~@>^^-V$xDxGVUT%TEdaE
zJMTB|uxK#PAA8B5GI`V3k22(6qc<K1<6i*NfM5wIBP7E3%DysF0$8fhc#wVp2z;?n
z%z{Fg1!&gJT_JMS-qyau;VKKbWH!m#fJHAZT>@N@4011I2CI@$w$joF@{(D5{7jb*
zFYR(z4K=CZ^a)K@We8-Ab>4^XcZcyFrKGxu*%7x*hU(I(+wVBZ1W%H2N4pLA@%o6Q
zCCxfIn3gd4?C7wM_;E$4cUH@rxITvdQe209GN7_#`{+z6GRwtH>7Z8rgKP6ylQr5t
z+b$*wRS0xmM2UipPuBX3fNeZ!;X50tH|_)HQyOXD$xXg9SZc-H#Sp%pX~kt0;ok?!
zjJhbg#4JLYL6{@&c`sv3lJ9&xYE0Jr&!FIc0fi!)T31%l+QE6ynp#(G#l`@lsQ~*`
zQ4}FUN3^blV;{+Br-$j{NssdtKkUL`1O>Xcth(07JlS)$ARuB>ZsG_QR<WRjt7fQ`
zLV%SCgZwkZs=Liv=tHPX80F1Xz#r%hCu&Mm9hRXVz11wJg62+9L2bB9bFS%vEUgK7
zlSK<9*0NA$tqV5}6agSn%k3*d>H_SLMDt$*B?2<w@sI&mFaJ%X{f^i&kzIfI*Y0}M
zts~21(d|bivgVdz7NL%5JQQ!xeX3WpZJm)`p=P(o?u_20r(SYS5YRBWEcp2cdJU)N
zY?FtAgmPqF5Q3j{%%o%Mx=*!hwoNt!iMM#_Q_z>GM|qEg5+vps6)nf>*gZXm)BWe9
e;OSvFkuc&TG({#w3B4n-=s#S7<B)7aJo_J!{snOW

delta 921
zcmYjPOH30{6uobTeyGrP`kRim^aFMZ3qKV@?8XK$nl?ryF{m3fBqAXy(Tyu@O-zV!
z(U*%sf)Q{dWucggu^R)jAnYU<663;7aZ%AkFhNrjsc+f|;U<%L_nddnJNLdf**e&o
zmQ1lQB>>ZbSol?=#95LxFr?=BRiJ^qBb(q%gd2Ba7yp1$T-jB=op4GhE9-s{y%M6$
ziZkmoZ15zJ6?Q%0$Yp#{pCEvL>pjtNnSKWt0s=F@6k%4Tr~Z|P^8hnNh6mW^2mePS
z<BX{w<pCU(^;{57n?o%rD_!G(<_-Ex)u4ywj{z;pHJOu;>|B#|nOauboZ5|J=IFk;
zJ#^-tm8y_kg%wYwuVNQuDyji5z4czEznLWK3k{a2i8NMQXKBLHz)g6u-_l}AHPDqp
zsIqCy65*c7xNM1-3k|ebuAZ!x+pTeq{kp9YGx4h`={WPGGGo@LUh!ATzgR=wQb&m$
zpKg(2xi#>&9VM}xi5xG*bwEu7gF;(9%lf@wd&rPFf>(sLz@;YI9&4mM&_orU(9Ny#
zusSF<#55tvPVnP9!NYBK;AbHk+3YC!9zo7G0=Zefd!;;2mbMN-X_*xbGE2s<&u=CT
z@Y=+Rzp>uqOIGZ$Jr(i}8YYlq<4UX3Y!0B!9wY`lY@f94;KC|55yGE#R~@_V;$2;)
zFc0(t3J%8s)u(?i^BJNF121YmjZLvkfhSXW-Z-W3wNw3DWf34&dWq*8WgKw3alm;}
zcq_5F?1)iZbp8?UyQ-*5V@7ew<s-AW;gXLOHLgbEerP%Cp%M$4BD;-BT<g2udxNdQ
zcvcii4Esc%a9*tHTeUq4I3mhq5a&cOFs*TVjeDcz-1gp*C<{dmWsj^93wY2i6F**X
s_ew?0!5Me;lyxn?ji1~nxOF!Mr90#*PDnC&jEj<QdkB_ov68g^KQ$Ku!2kdN

diff --git a/06_uart_chainloader/demo_payload_rpi4.img b/06_uart_chainloader/demo_payload_rpi4.img
index 03c84dda9f54a735da2366496f485dd49dc7d074..33debd906b54faf573ba0976cffd27da54c1c226 100755
GIT binary patch
delta 993
zcmYjQO=uHA6rR~l+9dr+HoqHVn@yH<n+j>Et)UfcqQ#%~QhO0BVoRauMJis32+2V~
zi{K7ZD1wJj53*it4H0{56c0UBQ0vj8BBZ_a4~h|VeY+Wh4;JS8-kWc}_hxpl_u)x3
z=ty-CjL>o<+p!|IaE@sUS}<`bKgcy<oTKOYC%By7<j-La%lVM?09&z4;^n-%@qovP
zytU~Who|UL%P5CLy4%t_n2V8Vj1~|^1q9M)Ek-W<))z|%6~=&<knu^MZIH9!7~v7}
zn(K6oPPCqi6h%@|tlCAC9p90$re`>9o5y5Z=Cztr`nvT*0*8nXA+>OjB$X>jGX<tX
zu*RAPgzvnIk;4G0ntbFKZF08b676z^d_Iw^<Lr1vLE6z*uC}pEuR6n!zv~P|ipNPD
zj`oAdCMSax3s|sfN12A&@g@4kso0icq{Mq)?$RI5PA=L;oi0N^;TknmT*{erI~f6$
z$_rlG(Lv#pRqHfx5>=rIHBxeu(sM+%ps~e2`eLd9B@cPiu4;>f={J|Z-zed0CG${{
zv!H(HMzyaF8(pbg!PM#wl9EF>wdyDiS4XUfIEu7OIBf^?7*KPO-V(aqS&48^e|9o#
zj9Q(RB>GD5wV7J!nSq-K^<9_vFS@P=jK=Nhj)Cv=gRsD*Wjf(*Z#J!Bvh^O3D1G3*
zf2|lbCsa{*V|uC$o`asTXcd@Jy*C+*!-gZc_uMbN58i=_{uxO{n2{(cLroT%WA8z=
z73hpd#@YP5$Bk*uJ1MM*aK?WT&kMdrEO`7i8m`HVIF0+mc#K~1E0H;tv#{JfhV2Y*
zP~r~+-!j(9*q%gxq6gL=Y0)1RDlF@&@7eb&17e_ds+X~n83`%H_y)$GXBg&g#s<9{
zP=q<g!uw?Gqkw{!=}KS-|D^kY44$R8MFsx3r((F?xU*ipE-Ln%r{-XpR>kh%jbIJ!
Nu_4VeEYfta`!D)w4)_27

delta 951
zcmYjPT}V@L6#xJ4-E^BD+uhvm*35l5t}{@wY-Nzkq)cDJm#hq21>r;X&_mG6W(ZjX
z-9Kkw4?S!K)eWL-Eb~q4$v2^}dTJAbIf6n#u&{ORN78`{|KIueo!>d<P9ON$CHriP
zQAP=Q6<UnWMH)EUsEK4WoX+=fb(ALHB>#X;=2!U>l*@(le)9%3=fW&DnRnK1@Knm1
z>mG5G!feA3mlfehLsw5C%0?;45K0OJsmWNBo!Y6+6bUJuMt_i~U+|*^W0qVi;|Xcf
z-lbN!(0C}6^s=&KRt89VxDugCHN`3GJZ0+<UeS~V;dSG_j@%yRCPXf5#98?)Q8WVT
z$2V16NPOc`lx>P+Tk|jZpw8Yx)6j1By9**)rs?6bM3k*hoL)Ey=j{QE-?IBd$z~SA
z)*d8ToeiTD6G|{ETd5koeHz}_B}-qF75S#;W%y=q<K8uc-J$Y#IEGXfhjgs8mklCI
z`6;hds>txcthA{(PPTCfIh1y?;$y<raIl#_)tN*MiEr|nT-mbJ0$&}TZZ(D1Q|@6(
z)<n8-8rk}yU!6*B_azo8BpC0di3MAse|ykOn5_Wq!ci-t`-tibFd=k0gF(h&ejf>_
ztClY>2H>UOrWGg&8LkwDo6eScO%7#i?+J@R&N+24i6>U|O1!!u*@7pprc6p1H?gZf
zg5t1X2XCAGRXvEemdU?n#h}qF#7dZR2L~{2E?X41?TXM~{)x*;;k&mPR+<KcXI|{{
zp9%SxyOs*S-MSmkp_u^3Jpp<ck{;>Em`9J9jMx<eTMayKP@-VXu8mJzy^gOeEO|uw
z7QT1_!irJjFmmR>DoT{Veo+jyi8_Cc5$iB8Zd0>)7#AgB%<$r0XLxhS@DP^8URngJ
uH$_L_u2-VdFy{^Ij%nY`E_o&EluPfF0m0YlJLA*QXG8ypfeD=Rb^Zle%m(iO

diff --git a/06_uart_chainloader/src/panic_wait.rs b/06_uart_chainloader/src/panic_wait.rs
index 946041b32..e879b5b3a 100644
--- a/06_uart_chainloader/src/panic_wait.rs
+++ b/06_uart_chainloader/src/panic_wait.rs
@@ -27,8 +27,40 @@ macro_rules! panic_println {
     })
 }
 
+/// Stop immediately if called a second time.
+///
+/// # Note
+///
+/// Using atomics here relieves us from needing to use `unsafe` for the static variable.
+///
+/// On `AArch64`, which is the only implemented architecture at the time of writing this,
+/// [`AtomicBool::load`] and [`AtomicBool::store`] are lowered to ordinary load and store
+/// instructions. They are therefore safe to use even with MMU + caching deactivated.
+///
+/// [`AtomicBool::load`]: core::sync::atomic::AtomicBool::load
+/// [`AtomicBool::store`]: core::sync::atomic::AtomicBool::store
+fn panic_prevent_reenter() {
+    use core::sync::atomic::{AtomicBool, Ordering};
+
+    #[cfg(not(target_arch = "aarch64"))]
+    compile_error!("Add the target_arch to above's check if the following code is safe to use");
+
+    static PANIC_IN_PROGRESS: AtomicBool = AtomicBool::new(false);
+
+    if !PANIC_IN_PROGRESS.load(Ordering::Relaxed) {
+        PANIC_IN_PROGRESS.store(true, Ordering::Relaxed);
+
+        return;
+    }
+
+    cpu::wait_forever()
+}
+
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
+    // Protect against panic infinite loops if any of the following code panics itself.
+    panic_prevent_reenter();
+
     if let Some(args) = info.message() {
         panic_println!("\nKernel panic: {}", args);
     } else {
diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index 762e3cb30..bfd2ee145 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -635,12 +635,15 @@ diff -uNr 06_uart_chainloader/src/main.rs 07_timestamps/src/main.rs
 diff -uNr 06_uart_chainloader/src/panic_wait.rs 07_timestamps/src/panic_wait.rs
 --- 06_uart_chainloader/src/panic_wait.rs
 +++ 07_timestamps/src/panic_wait.rs
-@@ -29,10 +29,23 @@
+@@ -58,13 +58,26 @@
 
  #[panic_handler]
  fn panic(info: &PanicInfo) -> ! {
 +    use crate::time::interface::TimeManager;
 +
+     // Protect against panic infinite loops if any of the following code panics itself.
+     panic_prevent_reenter();
+
 +    let timestamp = crate::time::time_manager().uptime();
 +
      if let Some(args) = info.message() {
diff --git a/07_timestamps/src/panic_wait.rs b/07_timestamps/src/panic_wait.rs
index 923db3299..3c57f5620 100644
--- a/07_timestamps/src/panic_wait.rs
+++ b/07_timestamps/src/panic_wait.rs
@@ -27,10 +27,42 @@ macro_rules! panic_println {
     })
 }
 
+/// Stop immediately if called a second time.
+///
+/// # Note
+///
+/// Using atomics here relieves us from needing to use `unsafe` for the static variable.
+///
+/// On `AArch64`, which is the only implemented architecture at the time of writing this,
+/// [`AtomicBool::load`] and [`AtomicBool::store`] are lowered to ordinary load and store
+/// instructions. They are therefore safe to use even with MMU + caching deactivated.
+///
+/// [`AtomicBool::load`]: core::sync::atomic::AtomicBool::load
+/// [`AtomicBool::store`]: core::sync::atomic::AtomicBool::store
+fn panic_prevent_reenter() {
+    use core::sync::atomic::{AtomicBool, Ordering};
+
+    #[cfg(not(target_arch = "aarch64"))]
+    compile_error!("Add the target_arch to above's check if the following code is safe to use");
+
+    static PANIC_IN_PROGRESS: AtomicBool = AtomicBool::new(false);
+
+    if !PANIC_IN_PROGRESS.load(Ordering::Relaxed) {
+        PANIC_IN_PROGRESS.store(true, Ordering::Relaxed);
+
+        return;
+    }
+
+    cpu::wait_forever()
+}
+
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
     use crate::time::interface::TimeManager;
 
+    // Protect against panic infinite loops if any of the following code panics itself.
+    panic_prevent_reenter();
+
     let timestamp = crate::time::time_manager().uptime();
 
     if let Some(args) = info.message() {
diff --git a/08_hw_debug_JTAG/src/panic_wait.rs b/08_hw_debug_JTAG/src/panic_wait.rs
index 923db3299..3c57f5620 100644
--- a/08_hw_debug_JTAG/src/panic_wait.rs
+++ b/08_hw_debug_JTAG/src/panic_wait.rs
@@ -27,10 +27,42 @@ macro_rules! panic_println {
     })
 }
 
+/// Stop immediately if called a second time.
+///
+/// # Note
+///
+/// Using atomics here relieves us from needing to use `unsafe` for the static variable.
+///
+/// On `AArch64`, which is the only implemented architecture at the time of writing this,
+/// [`AtomicBool::load`] and [`AtomicBool::store`] are lowered to ordinary load and store
+/// instructions. They are therefore safe to use even with MMU + caching deactivated.
+///
+/// [`AtomicBool::load`]: core::sync::atomic::AtomicBool::load
+/// [`AtomicBool::store`]: core::sync::atomic::AtomicBool::store
+fn panic_prevent_reenter() {
+    use core::sync::atomic::{AtomicBool, Ordering};
+
+    #[cfg(not(target_arch = "aarch64"))]
+    compile_error!("Add the target_arch to above's check if the following code is safe to use");
+
+    static PANIC_IN_PROGRESS: AtomicBool = AtomicBool::new(false);
+
+    if !PANIC_IN_PROGRESS.load(Ordering::Relaxed) {
+        PANIC_IN_PROGRESS.store(true, Ordering::Relaxed);
+
+        return;
+    }
+
+    cpu::wait_forever()
+}
+
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
     use crate::time::interface::TimeManager;
 
+    // Protect against panic infinite loops if any of the following code panics itself.
+    panic_prevent_reenter();
+
     let timestamp = crate::time::time_manager().uptime();
 
     if let Some(args) = info.message() {
diff --git a/09_privilege_level/src/panic_wait.rs b/09_privilege_level/src/panic_wait.rs
index 923db3299..3c57f5620 100644
--- a/09_privilege_level/src/panic_wait.rs
+++ b/09_privilege_level/src/panic_wait.rs
@@ -27,10 +27,42 @@ macro_rules! panic_println {
     })
 }
 
+/// Stop immediately if called a second time.
+///
+/// # Note
+///
+/// Using atomics here relieves us from needing to use `unsafe` for the static variable.
+///
+/// On `AArch64`, which is the only implemented architecture at the time of writing this,
+/// [`AtomicBool::load`] and [`AtomicBool::store`] are lowered to ordinary load and store
+/// instructions. They are therefore safe to use even with MMU + caching deactivated.
+///
+/// [`AtomicBool::load`]: core::sync::atomic::AtomicBool::load
+/// [`AtomicBool::store`]: core::sync::atomic::AtomicBool::store
+fn panic_prevent_reenter() {
+    use core::sync::atomic::{AtomicBool, Ordering};
+
+    #[cfg(not(target_arch = "aarch64"))]
+    compile_error!("Add the target_arch to above's check if the following code is safe to use");
+
+    static PANIC_IN_PROGRESS: AtomicBool = AtomicBool::new(false);
+
+    if !PANIC_IN_PROGRESS.load(Ordering::Relaxed) {
+        PANIC_IN_PROGRESS.store(true, Ordering::Relaxed);
+
+        return;
+    }
+
+    cpu::wait_forever()
+}
+
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
     use crate::time::interface::TimeManager;
 
+    // Protect against panic infinite loops if any of the following code panics itself.
+    panic_prevent_reenter();
+
     let timestamp = crate::time::time_manager().uptime();
 
     if let Some(args) = info.message() {
diff --git a/10_virtual_mem_part1_identity_mapping/src/panic_wait.rs b/10_virtual_mem_part1_identity_mapping/src/panic_wait.rs
index 923db3299..3c57f5620 100644
--- a/10_virtual_mem_part1_identity_mapping/src/panic_wait.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/panic_wait.rs
@@ -27,10 +27,42 @@ macro_rules! panic_println {
     })
 }
 
+/// Stop immediately if called a second time.
+///
+/// # Note
+///
+/// Using atomics here relieves us from needing to use `unsafe` for the static variable.
+///
+/// On `AArch64`, which is the only implemented architecture at the time of writing this,
+/// [`AtomicBool::load`] and [`AtomicBool::store`] are lowered to ordinary load and store
+/// instructions. They are therefore safe to use even with MMU + caching deactivated.
+///
+/// [`AtomicBool::load`]: core::sync::atomic::AtomicBool::load
+/// [`AtomicBool::store`]: core::sync::atomic::AtomicBool::store
+fn panic_prevent_reenter() {
+    use core::sync::atomic::{AtomicBool, Ordering};
+
+    #[cfg(not(target_arch = "aarch64"))]
+    compile_error!("Add the target_arch to above's check if the following code is safe to use");
+
+    static PANIC_IN_PROGRESS: AtomicBool = AtomicBool::new(false);
+
+    if !PANIC_IN_PROGRESS.load(Ordering::Relaxed) {
+        PANIC_IN_PROGRESS.store(true, Ordering::Relaxed);
+
+        return;
+    }
+
+    cpu::wait_forever()
+}
+
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
     use crate::time::interface::TimeManager;
 
+    // Protect against panic infinite loops if any of the following code panics itself.
+    panic_prevent_reenter();
+
     let timestamp = crate::time::time_manager().uptime();
 
     if let Some(args) = info.message() {
diff --git a/11_exceptions_part1_groundwork/src/panic_wait.rs b/11_exceptions_part1_groundwork/src/panic_wait.rs
index 923db3299..3c57f5620 100644
--- a/11_exceptions_part1_groundwork/src/panic_wait.rs
+++ b/11_exceptions_part1_groundwork/src/panic_wait.rs
@@ -27,10 +27,42 @@ macro_rules! panic_println {
     })
 }
 
+/// Stop immediately if called a second time.
+///
+/// # Note
+///
+/// Using atomics here relieves us from needing to use `unsafe` for the static variable.
+///
+/// On `AArch64`, which is the only implemented architecture at the time of writing this,
+/// [`AtomicBool::load`] and [`AtomicBool::store`] are lowered to ordinary load and store
+/// instructions. They are therefore safe to use even with MMU + caching deactivated.
+///
+/// [`AtomicBool::load`]: core::sync::atomic::AtomicBool::load
+/// [`AtomicBool::store`]: core::sync::atomic::AtomicBool::store
+fn panic_prevent_reenter() {
+    use core::sync::atomic::{AtomicBool, Ordering};
+
+    #[cfg(not(target_arch = "aarch64"))]
+    compile_error!("Add the target_arch to above's check if the following code is safe to use");
+
+    static PANIC_IN_PROGRESS: AtomicBool = AtomicBool::new(false);
+
+    if !PANIC_IN_PROGRESS.load(Ordering::Relaxed) {
+        PANIC_IN_PROGRESS.store(true, Ordering::Relaxed);
+
+        return;
+    }
+
+    cpu::wait_forever()
+}
+
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
     use crate::time::interface::TimeManager;
 
+    // Protect against panic infinite loops if any of the following code panics itself.
+    panic_prevent_reenter();
+
     let timestamp = crate::time::time_manager().uptime();
 
     if let Some(args) = info.message() {
diff --git a/12_integrated_testing/README.md b/12_integrated_testing/README.md
index b5649cd0a..5de7c0efe 100644
--- a/12_integrated_testing/README.md
+++ b/12_integrated_testing/README.md
@@ -1744,7 +1744,16 @@ diff -uNr 11_exceptions_part1_groundwork/src/panic_wait.rs 12_integrated_testing
  /// Prints with a newline - only use from the panic handler.
  ///
  /// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
-@@ -48,5 +65,5 @@
+@@ -53,7 +70,7 @@
+         return;
+     }
+
+-    cpu::wait_forever()
++    _panic_exit()
+ }
+
+ #[panic_handler]
+@@ -80,5 +97,5 @@
          );
      }
 
diff --git a/12_integrated_testing/src/panic_wait.rs b/12_integrated_testing/src/panic_wait.rs
index 2e56f1ce8..a1b090d70 100644
--- a/12_integrated_testing/src/panic_wait.rs
+++ b/12_integrated_testing/src/panic_wait.rs
@@ -44,10 +44,42 @@ macro_rules! panic_println {
     })
 }
 
+/// Stop immediately if called a second time.
+///
+/// # Note
+///
+/// Using atomics here relieves us from needing to use `unsafe` for the static variable.
+///
+/// On `AArch64`, which is the only implemented architecture at the time of writing this,
+/// [`AtomicBool::load`] and [`AtomicBool::store`] are lowered to ordinary load and store
+/// instructions. They are therefore safe to use even with MMU + caching deactivated.
+///
+/// [`AtomicBool::load`]: core::sync::atomic::AtomicBool::load
+/// [`AtomicBool::store`]: core::sync::atomic::AtomicBool::store
+fn panic_prevent_reenter() {
+    use core::sync::atomic::{AtomicBool, Ordering};
+
+    #[cfg(not(target_arch = "aarch64"))]
+    compile_error!("Add the target_arch to above's check if the following code is safe to use");
+
+    static PANIC_IN_PROGRESS: AtomicBool = AtomicBool::new(false);
+
+    if !PANIC_IN_PROGRESS.load(Ordering::Relaxed) {
+        PANIC_IN_PROGRESS.store(true, Ordering::Relaxed);
+
+        return;
+    }
+
+    _panic_exit()
+}
+
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
     use crate::time::interface::TimeManager;
 
+    // Protect against panic infinite loops if any of the following code panics itself.
+    panic_prevent_reenter();
+
     let timestamp = crate::time::time_manager().uptime();
 
     if let Some(args) = info.message() {
diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index 72b3fa5e3..d89093df0 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -2511,15 +2511,15 @@ diff -uNr 12_integrated_testing/src/panic_wait.rs 13_exceptions_part2_peripheral
  use core::{fmt, panic::PanicInfo};
 
  //--------------------------------------------------------------------------------------------------
-@@ -48,6 +48,8 @@
+@@ -77,6 +77,8 @@
  fn panic(info: &PanicInfo) -> ! {
      use crate::time::interface::TimeManager;
 
 +    unsafe { exception::asynchronous::local_irq_mask() };
 +
-     let timestamp = crate::time::time_manager().uptime();
+     // Protect against panic infinite loops if any of the following code panics itself.
+     panic_prevent_reenter();
 
-     if let Some(args) = info.message() {
 
 diff -uNr 12_integrated_testing/src/state.rs 13_exceptions_part2_peripheral_IRQs/src/state.rs
 --- 12_integrated_testing/src/state.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/panic_wait.rs b/13_exceptions_part2_peripheral_IRQs/src/panic_wait.rs
index da7106c9c..787bc7dc8 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/panic_wait.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/panic_wait.rs
@@ -44,12 +44,44 @@ macro_rules! panic_println {
     })
 }
 
+/// Stop immediately if called a second time.
+///
+/// # Note
+///
+/// Using atomics here relieves us from needing to use `unsafe` for the static variable.
+///
+/// On `AArch64`, which is the only implemented architecture at the time of writing this,
+/// [`AtomicBool::load`] and [`AtomicBool::store`] are lowered to ordinary load and store
+/// instructions. They are therefore safe to use even with MMU + caching deactivated.
+///
+/// [`AtomicBool::load`]: core::sync::atomic::AtomicBool::load
+/// [`AtomicBool::store`]: core::sync::atomic::AtomicBool::store
+fn panic_prevent_reenter() {
+    use core::sync::atomic::{AtomicBool, Ordering};
+
+    #[cfg(not(target_arch = "aarch64"))]
+    compile_error!("Add the target_arch to above's check if the following code is safe to use");
+
+    static PANIC_IN_PROGRESS: AtomicBool = AtomicBool::new(false);
+
+    if !PANIC_IN_PROGRESS.load(Ordering::Relaxed) {
+        PANIC_IN_PROGRESS.store(true, Ordering::Relaxed);
+
+        return;
+    }
+
+    _panic_exit()
+}
+
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
     use crate::time::interface::TimeManager;
 
     unsafe { exception::asynchronous::local_irq_mask() };
 
+    // Protect against panic infinite loops if any of the following code panics itself.
+    panic_prevent_reenter();
+
     let timestamp = crate::time::time_manager().uptime();
 
     if let Some(args) = info.message() {
diff --git a/14_virtual_mem_part2_mmio_remap/src/panic_wait.rs b/14_virtual_mem_part2_mmio_remap/src/panic_wait.rs
index da7106c9c..787bc7dc8 100644
--- a/14_virtual_mem_part2_mmio_remap/src/panic_wait.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/panic_wait.rs
@@ -44,12 +44,44 @@ macro_rules! panic_println {
     })
 }
 
+/// Stop immediately if called a second time.
+///
+/// # Note
+///
+/// Using atomics here relieves us from needing to use `unsafe` for the static variable.
+///
+/// On `AArch64`, which is the only implemented architecture at the time of writing this,
+/// [`AtomicBool::load`] and [`AtomicBool::store`] are lowered to ordinary load and store
+/// instructions. They are therefore safe to use even with MMU + caching deactivated.
+///
+/// [`AtomicBool::load`]: core::sync::atomic::AtomicBool::load
+/// [`AtomicBool::store`]: core::sync::atomic::AtomicBool::store
+fn panic_prevent_reenter() {
+    use core::sync::atomic::{AtomicBool, Ordering};
+
+    #[cfg(not(target_arch = "aarch64"))]
+    compile_error!("Add the target_arch to above's check if the following code is safe to use");
+
+    static PANIC_IN_PROGRESS: AtomicBool = AtomicBool::new(false);
+
+    if !PANIC_IN_PROGRESS.load(Ordering::Relaxed) {
+        PANIC_IN_PROGRESS.store(true, Ordering::Relaxed);
+
+        return;
+    }
+
+    _panic_exit()
+}
+
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
     use crate::time::interface::TimeManager;
 
     unsafe { exception::asynchronous::local_irq_mask() };
 
+    // Protect against panic infinite loops if any of the following code panics itself.
+    panic_prevent_reenter();
+
     let timestamp = crate::time::time_manager().uptime();
 
     if let Some(args) = info.message() {
diff --git a/15_virtual_mem_part3_precomputed_tables/src/panic_wait.rs b/15_virtual_mem_part3_precomputed_tables/src/panic_wait.rs
index da7106c9c..787bc7dc8 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/panic_wait.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/panic_wait.rs
@@ -44,12 +44,44 @@ macro_rules! panic_println {
     })
 }
 
+/// Stop immediately if called a second time.
+///
+/// # Note
+///
+/// Using atomics here relieves us from needing to use `unsafe` for the static variable.
+///
+/// On `AArch64`, which is the only implemented architecture at the time of writing this,
+/// [`AtomicBool::load`] and [`AtomicBool::store`] are lowered to ordinary load and store
+/// instructions. They are therefore safe to use even with MMU + caching deactivated.
+///
+/// [`AtomicBool::load`]: core::sync::atomic::AtomicBool::load
+/// [`AtomicBool::store`]: core::sync::atomic::AtomicBool::store
+fn panic_prevent_reenter() {
+    use core::sync::atomic::{AtomicBool, Ordering};
+
+    #[cfg(not(target_arch = "aarch64"))]
+    compile_error!("Add the target_arch to above's check if the following code is safe to use");
+
+    static PANIC_IN_PROGRESS: AtomicBool = AtomicBool::new(false);
+
+    if !PANIC_IN_PROGRESS.load(Ordering::Relaxed) {
+        PANIC_IN_PROGRESS.store(true, Ordering::Relaxed);
+
+        return;
+    }
+
+    _panic_exit()
+}
+
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
     use crate::time::interface::TimeManager;
 
     unsafe { exception::asynchronous::local_irq_mask() };
 
+    // Protect against panic infinite loops if any of the following code panics itself.
+    panic_prevent_reenter();
+
     let timestamp = crate::time::time_manager().uptime();
 
     if let Some(args) = info.message() {
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/panic_wait.rs b/16_virtual_mem_part4_higher_half_kernel/src/panic_wait.rs
index da7106c9c..787bc7dc8 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/panic_wait.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/panic_wait.rs
@@ -44,12 +44,44 @@ macro_rules! panic_println {
     })
 }
 
+/// Stop immediately if called a second time.
+///
+/// # Note
+///
+/// Using atomics here relieves us from needing to use `unsafe` for the static variable.
+///
+/// On `AArch64`, which is the only implemented architecture at the time of writing this,
+/// [`AtomicBool::load`] and [`AtomicBool::store`] are lowered to ordinary load and store
+/// instructions. They are therefore safe to use even with MMU + caching deactivated.
+///
+/// [`AtomicBool::load`]: core::sync::atomic::AtomicBool::load
+/// [`AtomicBool::store`]: core::sync::atomic::AtomicBool::store
+fn panic_prevent_reenter() {
+    use core::sync::atomic::{AtomicBool, Ordering};
+
+    #[cfg(not(target_arch = "aarch64"))]
+    compile_error!("Add the target_arch to above's check if the following code is safe to use");
+
+    static PANIC_IN_PROGRESS: AtomicBool = AtomicBool::new(false);
+
+    if !PANIC_IN_PROGRESS.load(Ordering::Relaxed) {
+        PANIC_IN_PROGRESS.store(true, Ordering::Relaxed);
+
+        return;
+    }
+
+    _panic_exit()
+}
+
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
     use crate::time::interface::TimeManager;
 
     unsafe { exception::asynchronous::local_irq_mask() };
 
+    // Protect against panic infinite loops if any of the following code panics itself.
+    panic_prevent_reenter();
+
     let timestamp = crate::time::time_manager().uptime();
 
     if let Some(args) = info.message() {
diff --git a/X1_JTAG_boot/jtag_boot_rpi3.img b/X1_JTAG_boot/jtag_boot_rpi3.img
index 64189d659354f3894c8887bc419ede120173112f..9fcd693ec7b0fc4bda4a744f682aa366843ed900 100755
GIT binary patch
delta 924
zcmah`T}TvB6ux(+tyx8PXLsFoXSdy%m3A7--%NAC-=IV(WgmnL%Ce+T>Mco-MvPdo
zA1_BL2uUBu2$aPK=|$-wdXlgndTLDycYWzCjB2}gXP|`$&&%PQd%o{{=ev5-T+_7Q
zuEz*QXi-^Rib$NJ)rMwRnc6}`K}xcVE5LXadifC!mnGNvPP`vSh=wB&wq53MBspPw
zXe+@g(Re+cd5y>sq{r{m5oHddg}wM&a;)$!N3pQZ6PPLfg2!Rh(Z$J8c;mRiDKThp
zHiy>A$uPyeyi`Zhr_ru3w(zWz*6EWu5dhA!+?Wbm&RPcWiKi+RjqJ4W#uObo{A+N-
zj?lE$*1!&#-tI;#*JwXeWiv7s!IT&+&}&G0e>EA9Yv7d_<*rgb@fL1_K39ti#mFIy
zW)Mcph*BUq1}|Jv@!C<sBjgciOTZPd;i~udSCSMZ-B$M*9c+neGjhx4A>tll>K?h9
zL-SRC&vECS!<*;qxZCs9G<c2&*$VskXybK+>MqLshio?M(<r}vJk|)qo(?<<%btm%
zx!>6*0(u%xJVq<CaK@{`aEVseR!`F1Xm^s%7gC-fYD7leZ=}l**(p0fvtTe|QUe_O
zQu28Mlbi6iWTfaq9^H9L*HgqkfKpi}EqKF%1*m{`UXR8+Y^|jp9wVES#X<2hlHdRM
zX=dgf#(Es3lEpq3hG6LxQ7@&p<;5V7((m{IO!}YKe)XGg)Z|=jF&}79wYk`}-knzM
zm!MCoSN4J>U`bN#vd<)|hE1tT(nDsIlFXd2Y9RpSfsoh}Fxy^h(;%D+gmD6H2fCG%
prRskw7a<*J!6!fq-ocAt1jCWN5OxVN!F%FAWAHJ^md+pi^aopH^xgmf

delta 923
zcmah`-%C?r7=FKVoNbD_v(34k&22|%b7sw%KUm<;$V{QdF1+Y!DaF9*QcI9F?7}eW
ze7urH7flf26hSh&kZu&g@JhsPx@snZn}2|KVfLM!0}Unm;PCSPc%Jup-jnW3cFIl@
zT%iQuvjj_ZB3BhLz?_<9cY#VtUuK9aBcun1`3Wvnm)Yb8Noh)=!IXqv!w8p>GSh|^
zhU%1`2Ki(xzXtRIBxBFnh~z_m`7p_4rpljk42zpQ#ktBoLU6Kbh)bWxZ&eSug$Q<-
zyF9&(^ghFV+PO?~*Wt)G_2KOx%X3!?A`s0txnn=>np;#rjnIE-p@ANB^U5q6YB;{P
zZ32*ktL>^0c|Quv30BXC3`$-nm=*kG5T<?E5FJf7<5$7Y?J+)KoP_bVrQ4E>P!EAQ
zAn*kk1*9YR(IQs%Hc=kHW@IH}stLC(?au5)nq{Q>ff8jvT@o-Th2;{~S;tg$FRfi3
zDfHKlwa5;y**UQG6|3p6wc(6yfGpycZMx$9?~{2WypGMhg5^cLQ+=y-wT<SYaP*9=
zD`!f^n9qEmRLRu?J*Yp&qES(OXGb~pkI`S#gpT80^+d(pBB~Ka6+qb@tWa;v=ycWV
zcJDPE)Ovg}pFKQjRWHD?k6D*Nz1m8cU9E-gFk(BS^nvd?VY6yfX9-EhAf9Qgu@LNW
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znGK06B*r~jwjydVq38P|4!S%-vr8-6^-cZw*ySY&eB+8rE4r$Gsg%*=?j{br;eJA7
e+;Dq^GYDL$^`fKpQTR;fl;e$4juW_A`|}T@Wcn%q

diff --git a/X1_JTAG_boot/jtag_boot_rpi4.img b/X1_JTAG_boot/jtag_boot_rpi4.img
index 6c029255bf7f1c2d8b7941ca8d39524fc1606c02..fb16a02b18124c41465c5d4ffafac9455f46d64c 100755
GIT binary patch
delta 738
zcmaiyOK1~O6o${elaw?u&8st$8QUhKO=A*85o0agWa`2~5v7XIm8o4xp-`v~+?b*Z
zl@f9|g)VLFMqNe5f^JI1g$ox(@CCY<bS2%nDh2I$GZR5^(X%=HXa4iwZ!Wi9Y!qu+
zuv9<>P&X<CJXmD-Y~nKu-SfesJ1oi8Fb^^g3Z0Q|aZ{!3Fw#Ze%MMe)oT*U4e}$Wh
zb;Dov%Vsa;q{{f#Yrq0j#utReut^VHVyCRx&|NOpt?lr2#$M4(WK1dR_(<5KaA~Iu
zsZSsvU{0rZ5uHuYR%E0n08r~Rr-!ZroVc8pK01!0=EO#)Ss0?j(NXr4u0<PNlWBY)
zrXk^;o;2t}Y`tqfh2OIsPg(&1mZMZ$zg?2ip5nN9hvC^>XK5Lr_$Sj4It}R$f}jS_
zk6iSTjb4;QpIYw2rr0Ssp2v~+``uyKalIRP920Y3u;ywzkC~s&k`1sn>iS`^mD|FI
z1e*I>f!!{X(L-<IC%HL5PP{JwS+q|B&Qc~Z7i{KnpYSi3hiEl1zy<x=#DP+aewE>-
zxLW(yzx2<A{-3_zqpxJJDR$PaBi$172}q!0ayeF$1;$@hwN~Uorqy+C{8;h&i?(ji
z4<*Z!D(UJBtI>UR(D<Tx7V%4NeQj&;YTRm2Q&o@e<=RlalxTY^nzZssg|YKwYDZ%?
Z+nGxHYnA4;6syyUc5ct}zfnwo_#1}~#R32T

delta 704
zcmaiyPfQb05XR@drKD*sZE1IxZI!kn6sn0rQc3Kk;6cy>rXfa7wsJJ7m>4x)EYX7@
z#B?$wcoX!*tz<)@!6+N!Sxo$MZSjEN<iP|<gmt>xgT@1MnSAqpGxNQdx0$VFtA=kQ
zg94zI;@p!JbE{Kdg@3jU7TjXg%t@b+6_qY1_ob!LZUAYr?Nz&_;((=6#B*I*s(IJ*
z#G_hAaX_gQcHRM=gi2wakyMdl{wre8yybr+x!v3i+!11g%E3!o-N5IJDS`Z65fWd3
zO~6lsJ_KW8oOXhvG!_~YtAwG=jz$9K81(~GZ#0s0GyJAQB=CE>eZ|Wq?`%KiI%5wu
zqFA4nxb;xr<bl1o1dzR!R6g6bt@pD|Lh=(YsY0a(CFjxnF;qBDC%du1Jwvw3*oypk
zkb^yk&1bN{br7)T=wb#>{k9kD0BaKt4-3t?O&dXPDc&3ybv!M{>09SnY4uV(((SGE
zVf{SdJsOGJ_LVYtg!y?ZO>ZN8lHG4dj^~^1UkKdd*W2Fz*Zn%{|J|Q(-9s-nxaYk&
z9#sTgR*T^ol^y&QWz$lJg;9;U<;R+vpSE<3!g^Z%(&(IC7BjS>52s!lF2c8QV!fsL
zPdHH{(WMU^MlI>?lu)bdhi+c%(u6oeCF6AXYHOy}IxW+(kq}j~jEO_{zox<1vp?ml
B!ZQE>

diff --git a/X1_JTAG_boot/src/panic_wait.rs b/X1_JTAG_boot/src/panic_wait.rs
index 923db3299..3c57f5620 100644
--- a/X1_JTAG_boot/src/panic_wait.rs
+++ b/X1_JTAG_boot/src/panic_wait.rs
@@ -27,10 +27,42 @@ macro_rules! panic_println {
     })
 }
 
+/// Stop immediately if called a second time.
+///
+/// # Note
+///
+/// Using atomics here relieves us from needing to use `unsafe` for the static variable.
+///
+/// On `AArch64`, which is the only implemented architecture at the time of writing this,
+/// [`AtomicBool::load`] and [`AtomicBool::store`] are lowered to ordinary load and store
+/// instructions. They are therefore safe to use even with MMU + caching deactivated.
+///
+/// [`AtomicBool::load`]: core::sync::atomic::AtomicBool::load
+/// [`AtomicBool::store`]: core::sync::atomic::AtomicBool::store
+fn panic_prevent_reenter() {
+    use core::sync::atomic::{AtomicBool, Ordering};
+
+    #[cfg(not(target_arch = "aarch64"))]
+    compile_error!("Add the target_arch to above's check if the following code is safe to use");
+
+    static PANIC_IN_PROGRESS: AtomicBool = AtomicBool::new(false);
+
+    if !PANIC_IN_PROGRESS.load(Ordering::Relaxed) {
+        PANIC_IN_PROGRESS.store(true, Ordering::Relaxed);
+
+        return;
+    }
+
+    cpu::wait_forever()
+}
+
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
     use crate::time::interface::TimeManager;
 
+    // Protect against panic infinite loops if any of the following code panics itself.
+    panic_prevent_reenter();
+
     let timestamp = crate::time::time_manager().uptime();
 
     if let Some(args) = info.message() {

From 1581b26995c47666b26530dff55307671215ab41 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Fri, 8 Apr 2022 22:24:56 +0200
Subject: [PATCH 124/214] Panic: Print location

---
 03_hacky_hello_world/README.md                |  30 +++++--
 03_hacky_hello_world/src/main.rs              |   2 +-
 03_hacky_hello_world/src/panic_wait.rs        |  19 +++--
 04_safe_globals/README.md                     |   5 +-
 04_safe_globals/src/panic_wait.rs             |  19 +++--
 05_drivers_gpio_uart/README.md                |  21 ++---
 05_drivers_gpio_uart/src/panic_wait.rs        |  19 +++--
 06_uart_chainloader/demo_payload_rpi3.img     | Bin 6696 -> 7112 bytes
 06_uart_chainloader/demo_payload_rpi4.img     | Bin 6536 -> 7000 bytes
 06_uart_chainloader/src/panic_wait.rs         |  19 +++--
 07_timestamps/README.md                       |  36 ++++----
 07_timestamps/src/panic_wait.rs               |  31 +++----
 08_hw_debug_JTAG/src/panic_wait.rs            |  31 +++----
 09_privilege_level/src/panic_wait.rs          |  31 +++----
 .../src/panic_wait.rs                         |  31 +++----
 11_exceptions_part1_groundwork/README.md      |  78 +++++++++---------
 .../src/_arch/aarch64/exception.rs            |   2 +-
 .../src/panic_wait.rs                         |  31 +++----
 12_integrated_testing/README.md               |  14 ++--
 .../src/_arch/aarch64/exception.rs            |   2 +-
 12_integrated_testing/src/panic_wait.rs       |  31 +++----
 .../src/_arch/aarch64/exception.rs            |   2 +-
 .../src/panic_wait.rs                         |  31 +++----
 .../src/_arch/aarch64/exception.rs            |   2 +-
 .../src/panic_wait.rs                         |  31 +++----
 .../src/_arch/aarch64/exception.rs            |   2 +-
 .../src/panic_wait.rs                         |  31 +++----
 .../src/_arch/aarch64/exception.rs            |   2 +-
 .../src/panic_wait.rs                         |  31 +++----
 X1_JTAG_boot/jtag_boot_rpi3.img               | Bin 7840 -> 8104 bytes
 X1_JTAG_boot/jtag_boot_rpi4.img               | Bin 6864 -> 7032 bytes
 X1_JTAG_boot/src/panic_wait.rs                |  31 +++----
 32 files changed, 339 insertions(+), 276 deletions(-)

diff --git a/03_hacky_hello_world/README.md b/03_hacky_hello_world/README.md
index dffbbb8ae..1e764e657 100644
--- a/03_hacky_hello_world/README.md
+++ b/03_hacky_hello_world/README.md
@@ -24,9 +24,14 @@ QEMU is no longer running in assembly mode. It will from now on show the output
 ```console
 $ make qemu
 [...]
+
 Hello from Rust!
+Kernel panic!
+
+Panic location:
+      File 'src/main.rs', line 126, column 5
 
-Kernel panic: Stopping here.
+Stopping here.
 ```
 
 ## Diff to previous
@@ -230,7 +235,7 @@ diff -uNr 02_runtime_init/src/main.rs 03_hacky_hello_world/src/main.rs
  /// - Only a single core must be active and running this function.
  unsafe fn kernel_init() -> ! {
 -    panic!()
-+    println!("[0] Hello from Rust!");
++    println!("Hello from Rust!");
 +
 +    panic!("Stopping here.")
  }
@@ -238,7 +243,7 @@ diff -uNr 02_runtime_init/src/main.rs 03_hacky_hello_world/src/main.rs
 diff -uNr 02_runtime_init/src/panic_wait.rs 03_hacky_hello_world/src/panic_wait.rs
 --- 02_runtime_init/src/panic_wait.rs
 +++ 03_hacky_hello_world/src/panic_wait.rs
-@@ -4,14 +4,52 @@
+@@ -4,14 +4,61 @@
 
  //! A panic handler that infinitely waits.
 
@@ -285,11 +290,20 @@ diff -uNr 02_runtime_init/src/panic_wait.rs 03_hacky_hello_world/src/panic_wait.
 +    // Protect against panic infinite loops if any of the following code panics itself.
 +    panic_prevent_reenter();
 +
-+    if let Some(args) = info.message() {
-+        println!("\nKernel panic: {}", args);
-+    } else {
-+        println!("\nKernel panic!");
-+    }
++    let (location, line, column) = match info.location() {
++        Some(loc) => (loc.file(), loc.line(), loc.column()),
++        _ => ("???", 0, 0),
++    };
++
++    println!(
++        "Kernel panic!\n\n\
++        Panic location:\n      File '{}', line {}, column {}\n\n\
++        {}",
++        location,
++        line,
++        column,
++        info.message().unwrap_or(&format_args!("")),
++    );
 +
      cpu::wait_forever()
  }
diff --git a/03_hacky_hello_world/src/main.rs b/03_hacky_hello_world/src/main.rs
index 7a3957dde..da4501393 100644
--- a/03_hacky_hello_world/src/main.rs
+++ b/03_hacky_hello_world/src/main.rs
@@ -121,7 +121,7 @@ mod print;
 ///
 /// - Only a single core must be active and running this function.
 unsafe fn kernel_init() -> ! {
-    println!("[0] Hello from Rust!");
+    println!("Hello from Rust!");
 
     panic!("Stopping here.")
 }
diff --git a/03_hacky_hello_world/src/panic_wait.rs b/03_hacky_hello_world/src/panic_wait.rs
index e37724a47..fb30e8d4c 100644
--- a/03_hacky_hello_world/src/panic_wait.rs
+++ b/03_hacky_hello_world/src/panic_wait.rs
@@ -45,11 +45,20 @@ fn panic(info: &PanicInfo) -> ! {
     // Protect against panic infinite loops if any of the following code panics itself.
     panic_prevent_reenter();
 
-    if let Some(args) = info.message() {
-        println!("\nKernel panic: {}", args);
-    } else {
-        println!("\nKernel panic!");
-    }
+    let (location, line, column) = match info.location() {
+        Some(loc) => (loc.file(), loc.line(), loc.column()),
+        _ => ("???", 0, 0),
+    };
+
+    println!(
+        "Kernel panic!\n\n\
+        Panic location:\n      File '{}', line {}, column {}\n\n\
+        {}",
+        location,
+        line,
+        column,
+        info.message().unwrap_or(&format_args!("")),
+    );
 
     cpu::wait_forever()
 }
diff --git a/04_safe_globals/README.md b/04_safe_globals/README.md
index 83e1a45c7..b42be6421 100644
--- a/04_safe_globals/README.md
+++ b/04_safe_globals/README.md
@@ -244,11 +244,12 @@ diff -uNr 03_hacky_hello_world/src/main.rs 04_safe_globals/src/main.rs
  ///
  /// - Only a single core must be active and running this function.
  unsafe fn kernel_init() -> ! {
+-    println!("Hello from Rust!");
 +    use console::interface::Statistics;
-+
-     println!("[0] Hello from Rust!");
 
 -    panic!("Stopping here.")
++    println!("[0] Hello from Rust!");
++
 +    println!(
 +        "[1] Chars written: {}",
 +        bsp::console::console().chars_written()
diff --git a/04_safe_globals/src/panic_wait.rs b/04_safe_globals/src/panic_wait.rs
index e37724a47..fb30e8d4c 100644
--- a/04_safe_globals/src/panic_wait.rs
+++ b/04_safe_globals/src/panic_wait.rs
@@ -45,11 +45,20 @@ fn panic(info: &PanicInfo) -> ! {
     // Protect against panic infinite loops if any of the following code panics itself.
     panic_prevent_reenter();
 
-    if let Some(args) = info.message() {
-        println!("\nKernel panic: {}", args);
-    } else {
-        println!("\nKernel panic!");
-    }
+    let (location, line, column) = match info.location() {
+        Some(loc) => (loc.file(), loc.line(), loc.column()),
+        _ => ("???", 0, 0),
+    };
+
+    println!(
+        "Kernel panic!\n\n\
+        Panic location:\n      File '{}', line {}, column {}\n\n\
+        {}",
+        location,
+        line,
+        column,
+        info.message().unwrap_or(&format_args!("")),
+    );
 
     cpu::wait_forever()
 }
diff --git a/05_drivers_gpio_uart/README.md b/05_drivers_gpio_uart/README.md
index 44e5aadfa..aa39cbaab 100644
--- a/05_drivers_gpio_uart/README.md
+++ b/05_drivers_gpio_uart/README.md
@@ -1446,18 +1446,15 @@ diff -uNr 04_safe_globals/src/panic_wait.rs 05_drivers_gpio_uart/src/panic_wait.
  /// Stop immediately if called a second time.
  ///
  /// # Note
-@@ -46,9 +62,9 @@
-     panic_prevent_reenter();
-
-     if let Some(args) = info.message() {
--        println!("\nKernel panic: {}", args);
-+        panic_println!("\nKernel panic: {}", args);
-     } else {
--        println!("\nKernel panic!");
-+        panic_println!("\nKernel panic!");
-     }
-
-     cpu::wait_forever()
+@@ -50,7 +66,7 @@
+         _ => ("???", 0, 0),
+     };
+
+-    println!(
++    panic_println!(
+         "Kernel panic!\n\n\
+         Panic location:\n      File '{}', line {}, column {}\n\n\
+         {}",
 
 diff -uNr 04_safe_globals/tests/boot_test_string.rb 05_drivers_gpio_uart/tests/boot_test_string.rb
 --- 04_safe_globals/tests/boot_test_string.rb
diff --git a/05_drivers_gpio_uart/src/panic_wait.rs b/05_drivers_gpio_uart/src/panic_wait.rs
index e879b5b3a..e546b06d1 100644
--- a/05_drivers_gpio_uart/src/panic_wait.rs
+++ b/05_drivers_gpio_uart/src/panic_wait.rs
@@ -61,11 +61,20 @@ fn panic(info: &PanicInfo) -> ! {
     // Protect against panic infinite loops if any of the following code panics itself.
     panic_prevent_reenter();
 
-    if let Some(args) = info.message() {
-        panic_println!("\nKernel panic: {}", args);
-    } else {
-        panic_println!("\nKernel panic!");
-    }
+    let (location, line, column) = match info.location() {
+        Some(loc) => (loc.file(), loc.line(), loc.column()),
+        _ => ("???", 0, 0),
+    };
+
+    panic_println!(
+        "Kernel panic!\n\n\
+        Panic location:\n      File '{}', line {}, column {}\n\n\
+        {}",
+        location,
+        line,
+        column,
+        info.message().unwrap_or(&format_args!("")),
+    );
 
     cpu::wait_forever()
 }
diff --git a/06_uart_chainloader/demo_payload_rpi3.img b/06_uart_chainloader/demo_payload_rpi3.img
index b95058e4377a7f061a86cb39025e188660b064fe..1997951a5d4b8429956ff250ab5928d11b3d272f 100755
GIT binary patch
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cKA#E3HNA38?+fxRUejuISLGPuId|i~0W&8^V*mgE

diff --git a/06_uart_chainloader/demo_payload_rpi4.img b/06_uart_chainloader/demo_payload_rpi4.img
index 33debd906b54faf573ba0976cffd27da54c1c226..9f463d32d7dd4c60080c8b92f3b298fa1d8f9d4c 100755
GIT binary patch
delta 3099
zcmb_deN0=|6+ibq+dP|3^JRl0{0s$RzQ)o5ai)d`geH(i=?qgfF$E~g0s%}RSz0ZP
z?378NKvcgxw5GIKL(!BztADhLBE^-~Ql(S7EUQLYXjHA5O{K}eJ^~2@H^AGu&yOtY
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E8!KS%-2eap

delta 2678
zcmb_deQZ<L6+ibqe>|H6;y6z1IK(fBoWzD@4Ky*YUFVk%3JID*O{R)Yf<#dvh7w4a
zCRRXpt4aNE>3sXp&;k?I@<;o;B4uJon5`WdowP20bSW!ke@wGOH91MAk^oUmnt10v
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zlPooJva~>~v2Gho$?t*G_AW^6qaeNT3y=m^^1a=^0vbF+=061JwF8vR8loXa7jw|N
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zF+CugZiDSIe%4(tj|{#1ig>JlC_GSOg@i7*L6>{t{29@@R)@87#B!~&-kPu%K#bd!
g*~+HIL05sit6Mv!(@uSF@A!eZV|Q1Nvdu027qbFPt^fc4

diff --git a/06_uart_chainloader/src/panic_wait.rs b/06_uart_chainloader/src/panic_wait.rs
index e879b5b3a..e546b06d1 100644
--- a/06_uart_chainloader/src/panic_wait.rs
+++ b/06_uart_chainloader/src/panic_wait.rs
@@ -61,11 +61,20 @@ fn panic(info: &PanicInfo) -> ! {
     // Protect against panic infinite loops if any of the following code panics itself.
     panic_prevent_reenter();
 
-    if let Some(args) = info.message() {
-        panic_println!("\nKernel panic: {}", args);
-    } else {
-        panic_println!("\nKernel panic!");
-    }
+    let (location, line, column) = match info.location() {
+        Some(loc) => (loc.file(), loc.line(), loc.column()),
+        _ => ("???", 0, 0),
+    };
+
+    panic_println!(
+        "Kernel panic!\n\n\
+        Panic location:\n      File '{}', line {}, column {}\n\n\
+        {}",
+        location,
+        line,
+        column,
+        info.message().unwrap_or(&format_args!("")),
+    );
 
     cpu::wait_forever()
 }
diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index bfd2ee145..0af0b0466 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -635,7 +635,7 @@ diff -uNr 06_uart_chainloader/src/main.rs 07_timestamps/src/main.rs
 diff -uNr 06_uart_chainloader/src/panic_wait.rs 07_timestamps/src/panic_wait.rs
 --- 06_uart_chainloader/src/panic_wait.rs
 +++ 07_timestamps/src/panic_wait.rs
-@@ -58,13 +58,26 @@
+@@ -58,18 +58,23 @@
 
  #[panic_handler]
  fn panic(info: &PanicInfo) -> ! {
@@ -645,25 +645,21 @@ diff -uNr 06_uart_chainloader/src/panic_wait.rs 07_timestamps/src/panic_wait.rs
      panic_prevent_reenter();
 
 +    let timestamp = crate::time::time_manager().uptime();
-+
-     if let Some(args) = info.message() {
--        panic_println!("\nKernel panic: {}", args);
-+        panic_println!(
-+            "[  {:>3}.{:06}] Kernel panic: {}",
-+            timestamp.as_secs(),
-+            timestamp.subsec_micros(),
-+            args,
-+        );
-     } else {
--        panic_println!("\nKernel panic!");
-+        panic_println!(
-+            "[  {:>3}.{:06}] Kernel panic!",
-+            timestamp.as_secs(),
-+            timestamp.subsec_micros(),
-+        );
-     }
-
-     cpu::wait_forever()
+     let (location, line, column) = match info.location() {
+         Some(loc) => (loc.file(), loc.line(), loc.column()),
+         _ => ("???", 0, 0),
+     };
+
+     panic_println!(
+-        "Kernel panic!\n\n\
++        "[  {:>3}.{:06}] Kernel panic!\n\n\
+         Panic location:\n      File '{}', line {}, column {}\n\n\
+         {}",
++        timestamp.as_secs(),
++        timestamp.subsec_micros(),
+         location,
+         line,
+         column,
 
 diff -uNr 06_uart_chainloader/src/print.rs 07_timestamps/src/print.rs
 --- 06_uart_chainloader/src/print.rs
diff --git a/07_timestamps/src/panic_wait.rs b/07_timestamps/src/panic_wait.rs
index 3c57f5620..f851e0d8c 100644
--- a/07_timestamps/src/panic_wait.rs
+++ b/07_timestamps/src/panic_wait.rs
@@ -64,21 +64,22 @@ fn panic(info: &PanicInfo) -> ! {
     panic_prevent_reenter();
 
     let timestamp = crate::time::time_manager().uptime();
-
-    if let Some(args) = info.message() {
-        panic_println!(
-            "[  {:>3}.{:06}] Kernel panic: {}",
-            timestamp.as_secs(),
-            timestamp.subsec_micros(),
-            args,
-        );
-    } else {
-        panic_println!(
-            "[  {:>3}.{:06}] Kernel panic!",
-            timestamp.as_secs(),
-            timestamp.subsec_micros(),
-        );
-    }
+    let (location, line, column) = match info.location() {
+        Some(loc) => (loc.file(), loc.line(), loc.column()),
+        _ => ("???", 0, 0),
+    };
+
+    panic_println!(
+        "[  {:>3}.{:06}] Kernel panic!\n\n\
+        Panic location:\n      File '{}', line {}, column {}\n\n\
+        {}",
+        timestamp.as_secs(),
+        timestamp.subsec_micros(),
+        location,
+        line,
+        column,
+        info.message().unwrap_or(&format_args!("")),
+    );
 
     cpu::wait_forever()
 }
diff --git a/08_hw_debug_JTAG/src/panic_wait.rs b/08_hw_debug_JTAG/src/panic_wait.rs
index 3c57f5620..f851e0d8c 100644
--- a/08_hw_debug_JTAG/src/panic_wait.rs
+++ b/08_hw_debug_JTAG/src/panic_wait.rs
@@ -64,21 +64,22 @@ fn panic(info: &PanicInfo) -> ! {
     panic_prevent_reenter();
 
     let timestamp = crate::time::time_manager().uptime();
-
-    if let Some(args) = info.message() {
-        panic_println!(
-            "[  {:>3}.{:06}] Kernel panic: {}",
-            timestamp.as_secs(),
-            timestamp.subsec_micros(),
-            args,
-        );
-    } else {
-        panic_println!(
-            "[  {:>3}.{:06}] Kernel panic!",
-            timestamp.as_secs(),
-            timestamp.subsec_micros(),
-        );
-    }
+    let (location, line, column) = match info.location() {
+        Some(loc) => (loc.file(), loc.line(), loc.column()),
+        _ => ("???", 0, 0),
+    };
+
+    panic_println!(
+        "[  {:>3}.{:06}] Kernel panic!\n\n\
+        Panic location:\n      File '{}', line {}, column {}\n\n\
+        {}",
+        timestamp.as_secs(),
+        timestamp.subsec_micros(),
+        location,
+        line,
+        column,
+        info.message().unwrap_or(&format_args!("")),
+    );
 
     cpu::wait_forever()
 }
diff --git a/09_privilege_level/src/panic_wait.rs b/09_privilege_level/src/panic_wait.rs
index 3c57f5620..f851e0d8c 100644
--- a/09_privilege_level/src/panic_wait.rs
+++ b/09_privilege_level/src/panic_wait.rs
@@ -64,21 +64,22 @@ fn panic(info: &PanicInfo) -> ! {
     panic_prevent_reenter();
 
     let timestamp = crate::time::time_manager().uptime();
-
-    if let Some(args) = info.message() {
-        panic_println!(
-            "[  {:>3}.{:06}] Kernel panic: {}",
-            timestamp.as_secs(),
-            timestamp.subsec_micros(),
-            args,
-        );
-    } else {
-        panic_println!(
-            "[  {:>3}.{:06}] Kernel panic!",
-            timestamp.as_secs(),
-            timestamp.subsec_micros(),
-        );
-    }
+    let (location, line, column) = match info.location() {
+        Some(loc) => (loc.file(), loc.line(), loc.column()),
+        _ => ("???", 0, 0),
+    };
+
+    panic_println!(
+        "[  {:>3}.{:06}] Kernel panic!\n\n\
+        Panic location:\n      File '{}', line {}, column {}\n\n\
+        {}",
+        timestamp.as_secs(),
+        timestamp.subsec_micros(),
+        location,
+        line,
+        column,
+        info.message().unwrap_or(&format_args!("")),
+    );
 
     cpu::wait_forever()
 }
diff --git a/10_virtual_mem_part1_identity_mapping/src/panic_wait.rs b/10_virtual_mem_part1_identity_mapping/src/panic_wait.rs
index 3c57f5620..f851e0d8c 100644
--- a/10_virtual_mem_part1_identity_mapping/src/panic_wait.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/panic_wait.rs
@@ -64,21 +64,22 @@ fn panic(info: &PanicInfo) -> ! {
     panic_prevent_reenter();
 
     let timestamp = crate::time::time_manager().uptime();
-
-    if let Some(args) = info.message() {
-        panic_println!(
-            "[  {:>3}.{:06}] Kernel panic: {}",
-            timestamp.as_secs(),
-            timestamp.subsec_micros(),
-            args,
-        );
-    } else {
-        panic_println!(
-            "[  {:>3}.{:06}] Kernel panic!",
-            timestamp.as_secs(),
-            timestamp.subsec_micros(),
-        );
-    }
+    let (location, line, column) = match info.location() {
+        Some(loc) => (loc.file(), loc.line(), loc.column()),
+        _ => ("???", 0, 0),
+    };
+
+    panic_println!(
+        "[  {:>3}.{:06}] Kernel panic!\n\n\
+        Panic location:\n      File '{}', line {}, column {}\n\n\
+        {}",
+        timestamp.as_secs(),
+        timestamp.subsec_micros(),
+        location,
+        line,
+        column,
+        info.message().unwrap_or(&format_args!("")),
+    );
 
     cpu::wait_forever()
 }
diff --git a/11_exceptions_part1_groundwork/README.md b/11_exceptions_part1_groundwork/README.md
index 8d18d6162..4df5c9391 100644
--- a/11_exceptions_part1_groundwork/README.md
+++ b/11_exceptions_part1_groundwork/README.md
@@ -313,7 +313,7 @@ for each exception yet, a default handler is provided:
 /// Prints verbose information about the exception and then panics.
 fn default_exception_handler(exc: &ExceptionContext) {
     panic!(
-        "\n\nCPU Exception!\n\
+        "CPU Exception!\n\n\
         {}",
         exc
     );
@@ -413,33 +413,37 @@ Minipush 1.0
 [MP] ⏩ Pushing 64 KiB =========================================🦀 100% 0 KiB/s Time: 00:00:00
 [ML] Loaded! Executing the payload now
 
-[    0.789853] mingo version 0.11.0
-[    0.790060] Booting on: Raspberry Pi 3
-[    0.790515] MMU online. Special regions:
-[    0.790992]       0x00080000 - 0x0008ffff |  64 KiB | C   RO PX  | Kernel code and RO data
-[    0.792010]       0x3f000000 - 0x4000ffff |  16 MiB | Dev RW PXN | Device MMIO
-[    0.792899] Current privilege level: EL1
-[    0.793375] Exception handling state:
-[    0.793819]       Debug:  Masked
-[    0.794209]       SError: Masked
-[    0.794599]       IRQ:    Masked
-[    0.794989]       FIQ:    Masked
-[    0.795379] Architectural timer resolution: 52 ns
-[    0.795954] Drivers loaded:
-[    0.796289]       1. BCM GPIO
-[    0.796647]       2. BCM PL011 UART
-[    0.797070] Timer test, spinning for 1 second
-[    1.797600]
-[    1.797604] Trying to read from address 8 GiB...
-[    1.798154] ************************************************
-[    1.798846] Whoa! We recovered from a synchronous exception!
-[    1.799539] ************************************************
-[    1.800233]
-[    1.800406] Let's try again
-[    1.800742] Trying to read from address 9 GiB...
-[    1.801306] Kernel panic:
+[    0.787414] mingo version 0.11.0
+[    0.787621] Booting on: Raspberry Pi 3
+[    0.788076] MMU online. Special regions:
+[    0.788553]       0x00080000 - 0x0008ffff |  64 KiB | C   RO PX  | Kernel code and RO data
+[    0.789571]       0x3f000000 - 0x4000ffff |  16 MiB | Dev RW PXN | Device MMIO
+[    0.790460] Current privilege level: EL1
+[    0.790936] Exception handling state:
+[    0.791380]       Debug:  Masked
+[    0.791770]       SError: Masked
+[    0.792160]       IRQ:    Masked
+[    0.792550]       FIQ:    Masked
+[    0.792940] Architectural timer resolution: 52 ns
+[    0.793514] Drivers loaded:
+[    0.793850]       1. BCM GPIO
+[    0.794208]       2. BCM PL011 UART
+[    0.794630] Timer test, spinning for 1 second
+[    1.795161]
+[    1.795165] Trying to read from address 8 GiB...
+[    1.795715] ************************************************
+[    1.796407] Whoa! We recovered from a synchronous exception!
+[    1.797100] ************************************************
+[    1.797794]
+[    1.797967] Let's try again
+[    1.798303] Trying to read from address 9 GiB...
+[    1.798867] Kernel panic!
+
+Panic location:
+      File 'src/_arch/aarch64/exception.rs', line 58, column 5
 
 CPU Exception!
+
 ESR_EL1: 0x96000004
       Exception Class         (EC) : 0x25 - Data Abort, current EL
       Instr Specific Syndrome (ISS): 0x4
@@ -459,21 +463,21 @@ SPSR_EL1: 0x600003c5
 ELR_EL1: 0x0000000000082194
 
 General purpose register:
-      x0 : 0x0000000000000000         x1 : 0x000000000008555f
-      x2 : 0x0000000000000027         x3 : 0x000000000008435c
-      x4 : 0x0000000000000006         x5 : 0x3f27329c00000000
-      x6 : 0x0000000000000000         x7 : 0xd3d1b900228f0241
-      x8 : 0x0000000240000000         x9 : 0x000000000008555f
+      x0 : 0x0000000000000000         x1 : 0x0000000000085517
+      x2 : 0x0000000000000027         x3 : 0x0000000000084380
+      x4 : 0x0000000000000006         x5 : 0xfb5f341800000000
+      x6 : 0x0000000000000000         x7 : 0x7f91bc012b2b0209
+      x8 : 0x0000000240000000         x9 : 0x0000000000085517
       x10: 0x0000000000000443         x11: 0x000000003f201000
       x12: 0x0000000000000019         x13: 0x00000000ffffd8f0
       x14: 0x000000000000147b         x15: 0x00000000ffffff9c
       x16: 0x000000000007fd38         x17: 0x0000000005f5e0ff
-      x18: 0x0000000000000034         x19: 0x0000000000090008
-      x20: 0x0000000000085398         x21: 0x000000003b9aca00
-      x22: 0x0000000000082e30         x23: 0x0000000000082308
+      x18: 0x0000000000000030         x19: 0x0000000000090008
+      x20: 0x0000000000085350         x21: 0x000000003b9aca00
+      x22: 0x0000000000082e4c         x23: 0x0000000000082308
       x24: 0x0000000010624dd3         x25: 0xffffffffc4653600
-      x26: 0x00000000000866b8         x27: 0x0000000000085458
-      x28: 0x0000000000084fe0         x29: 0x0000000000086770
+      x26: 0x0000000000086638         x27: 0x0000000000085410
+      x28: 0x0000000000084f90         x29: 0x0000000000086538
       lr : 0x0000000000082188
 ```
 
@@ -546,7 +550,7 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs 1
 +/// Prints verbose information about the exception and then panics.
 +fn default_exception_handler(exc: &ExceptionContext) {
 +    panic!(
-+        "\n\nCPU Exception!\n\
++        "CPU Exception!\n\n\
 +        {}",
 +        exc
 +    );
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
index f81782103..e84849380 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
@@ -56,7 +56,7 @@ struct ExceptionContext {
 /// Prints verbose information about the exception and then panics.
 fn default_exception_handler(exc: &ExceptionContext) {
     panic!(
-        "\n\nCPU Exception!\n\
+        "CPU Exception!\n\n\
         {}",
         exc
     );
diff --git a/11_exceptions_part1_groundwork/src/panic_wait.rs b/11_exceptions_part1_groundwork/src/panic_wait.rs
index 3c57f5620..f851e0d8c 100644
--- a/11_exceptions_part1_groundwork/src/panic_wait.rs
+++ b/11_exceptions_part1_groundwork/src/panic_wait.rs
@@ -64,21 +64,22 @@ fn panic(info: &PanicInfo) -> ! {
     panic_prevent_reenter();
 
     let timestamp = crate::time::time_manager().uptime();
-
-    if let Some(args) = info.message() {
-        panic_println!(
-            "[  {:>3}.{:06}] Kernel panic: {}",
-            timestamp.as_secs(),
-            timestamp.subsec_micros(),
-            args,
-        );
-    } else {
-        panic_println!(
-            "[  {:>3}.{:06}] Kernel panic!",
-            timestamp.as_secs(),
-            timestamp.subsec_micros(),
-        );
-    }
+    let (location, line, column) = match info.location() {
+        Some(loc) => (loc.file(), loc.line(), loc.column()),
+        _ => ("???", 0, 0),
+    };
+
+    panic_println!(
+        "[  {:>3}.{:06}] Kernel panic!\n\n\
+        Panic location:\n      File '{}', line {}, column {}\n\n\
+        {}",
+        timestamp.as_secs(),
+        timestamp.subsec_micros(),
+        location,
+        line,
+        column,
+        info.message().unwrap_or(&format_args!("")),
+    );
 
     cpu::wait_forever()
 }
diff --git a/12_integrated_testing/README.md b/12_integrated_testing/README.md
index 5de7c0efe..8a20a0d59 100644
--- a/12_integrated_testing/README.md
+++ b/12_integrated_testing/README.md
@@ -856,10 +856,14 @@ Compiling integration test(s) - rpi3
          🦀 Testing synchronous exception handling by causing a page fault
          -------------------------------------------------------------------
 
-         [    0.163030] Writing beyond mapped area to address 9 GiB...
-         [    0.164791] Kernel panic:
+         [    0.132792] Writing beyond mapped area to address 9 GiB...
+         [    0.134563] Kernel panic!
+
+         Panic location:
+               File 'src/_arch/aarch64/exception.rs', line 58, column 5
 
          CPU Exception!
+
          ESR_EL1: 0x96000004
                Exception Class         (EC) : 0x25 - Data Abort, current EL
          [...]
@@ -1753,9 +1757,9 @@ diff -uNr 11_exceptions_part1_groundwork/src/panic_wait.rs 12_integrated_testing
  }
 
  #[panic_handler]
-@@ -80,5 +97,5 @@
-         );
-     }
+@@ -81,5 +98,5 @@
+         info.message().unwrap_or(&format_args!("")),
+     );
 
 -    cpu::wait_forever()
 +    _panic_exit()
diff --git a/12_integrated_testing/src/_arch/aarch64/exception.rs b/12_integrated_testing/src/_arch/aarch64/exception.rs
index e15dc7a06..e84699e1e 100644
--- a/12_integrated_testing/src/_arch/aarch64/exception.rs
+++ b/12_integrated_testing/src/_arch/aarch64/exception.rs
@@ -56,7 +56,7 @@ struct ExceptionContext {
 /// Prints verbose information about the exception and then panics.
 fn default_exception_handler(exc: &ExceptionContext) {
     panic!(
-        "\n\nCPU Exception!\n\
+        "CPU Exception!\n\n\
         {}",
         exc
     );
diff --git a/12_integrated_testing/src/panic_wait.rs b/12_integrated_testing/src/panic_wait.rs
index a1b090d70..6f09f11c9 100644
--- a/12_integrated_testing/src/panic_wait.rs
+++ b/12_integrated_testing/src/panic_wait.rs
@@ -81,21 +81,22 @@ fn panic(info: &PanicInfo) -> ! {
     panic_prevent_reenter();
 
     let timestamp = crate::time::time_manager().uptime();
-
-    if let Some(args) = info.message() {
-        panic_println!(
-            "[  {:>3}.{:06}] Kernel panic: {}",
-            timestamp.as_secs(),
-            timestamp.subsec_micros(),
-            args,
-        );
-    } else {
-        panic_println!(
-            "[  {:>3}.{:06}] Kernel panic!",
-            timestamp.as_secs(),
-            timestamp.subsec_micros(),
-        );
-    }
+    let (location, line, column) = match info.location() {
+        Some(loc) => (loc.file(), loc.line(), loc.column()),
+        _ => ("???", 0, 0),
+    };
+
+    panic_println!(
+        "[  {:>3}.{:06}] Kernel panic!\n\n\
+        Panic location:\n      File '{}', line {}, column {}\n\n\
+        {}",
+        timestamp.as_secs(),
+        timestamp.subsec_micros(),
+        location,
+        line,
+        column,
+        info.message().unwrap_or(&format_args!("")),
+    );
 
     _panic_exit()
 }
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
index 184410187..495dba34f 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
@@ -57,7 +57,7 @@ struct ExceptionContext {
 /// Prints verbose information about the exception and then panics.
 fn default_exception_handler(exc: &ExceptionContext) {
     panic!(
-        "\n\nCPU Exception!\n\
+        "CPU Exception!\n\n\
         {}",
         exc
     );
diff --git a/13_exceptions_part2_peripheral_IRQs/src/panic_wait.rs b/13_exceptions_part2_peripheral_IRQs/src/panic_wait.rs
index 787bc7dc8..08d7d4533 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/panic_wait.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/panic_wait.rs
@@ -83,21 +83,22 @@ fn panic(info: &PanicInfo) -> ! {
     panic_prevent_reenter();
 
     let timestamp = crate::time::time_manager().uptime();
-
-    if let Some(args) = info.message() {
-        panic_println!(
-            "[  {:>3}.{:06}] Kernel panic: {}",
-            timestamp.as_secs(),
-            timestamp.subsec_micros(),
-            args,
-        );
-    } else {
-        panic_println!(
-            "[  {:>3}.{:06}] Kernel panic!",
-            timestamp.as_secs(),
-            timestamp.subsec_micros(),
-        );
-    }
+    let (location, line, column) = match info.location() {
+        Some(loc) => (loc.file(), loc.line(), loc.column()),
+        _ => ("???", 0, 0),
+    };
+
+    panic_println!(
+        "[  {:>3}.{:06}] Kernel panic!\n\n\
+        Panic location:\n      File '{}', line {}, column {}\n\n\
+        {}",
+        timestamp.as_secs(),
+        timestamp.subsec_micros(),
+        location,
+        line,
+        column,
+        info.message().unwrap_or(&format_args!("")),
+    );
 
     _panic_exit()
 }
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
index 184410187..495dba34f 100644
--- a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
@@ -57,7 +57,7 @@ struct ExceptionContext {
 /// Prints verbose information about the exception and then panics.
 fn default_exception_handler(exc: &ExceptionContext) {
     panic!(
-        "\n\nCPU Exception!\n\
+        "CPU Exception!\n\n\
         {}",
         exc
     );
diff --git a/14_virtual_mem_part2_mmio_remap/src/panic_wait.rs b/14_virtual_mem_part2_mmio_remap/src/panic_wait.rs
index 787bc7dc8..08d7d4533 100644
--- a/14_virtual_mem_part2_mmio_remap/src/panic_wait.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/panic_wait.rs
@@ -83,21 +83,22 @@ fn panic(info: &PanicInfo) -> ! {
     panic_prevent_reenter();
 
     let timestamp = crate::time::time_manager().uptime();
-
-    if let Some(args) = info.message() {
-        panic_println!(
-            "[  {:>3}.{:06}] Kernel panic: {}",
-            timestamp.as_secs(),
-            timestamp.subsec_micros(),
-            args,
-        );
-    } else {
-        panic_println!(
-            "[  {:>3}.{:06}] Kernel panic!",
-            timestamp.as_secs(),
-            timestamp.subsec_micros(),
-        );
-    }
+    let (location, line, column) = match info.location() {
+        Some(loc) => (loc.file(), loc.line(), loc.column()),
+        _ => ("???", 0, 0),
+    };
+
+    panic_println!(
+        "[  {:>3}.{:06}] Kernel panic!\n\n\
+        Panic location:\n      File '{}', line {}, column {}\n\n\
+        {}",
+        timestamp.as_secs(),
+        timestamp.subsec_micros(),
+        location,
+        line,
+        column,
+        info.message().unwrap_or(&format_args!("")),
+    );
 
     _panic_exit()
 }
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.rs b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.rs
index 184410187..495dba34f 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.rs
@@ -57,7 +57,7 @@ struct ExceptionContext {
 /// Prints verbose information about the exception and then panics.
 fn default_exception_handler(exc: &ExceptionContext) {
     panic!(
-        "\n\nCPU Exception!\n\
+        "CPU Exception!\n\n\
         {}",
         exc
     );
diff --git a/15_virtual_mem_part3_precomputed_tables/src/panic_wait.rs b/15_virtual_mem_part3_precomputed_tables/src/panic_wait.rs
index 787bc7dc8..08d7d4533 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/panic_wait.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/panic_wait.rs
@@ -83,21 +83,22 @@ fn panic(info: &PanicInfo) -> ! {
     panic_prevent_reenter();
 
     let timestamp = crate::time::time_manager().uptime();
-
-    if let Some(args) = info.message() {
-        panic_println!(
-            "[  {:>3}.{:06}] Kernel panic: {}",
-            timestamp.as_secs(),
-            timestamp.subsec_micros(),
-            args,
-        );
-    } else {
-        panic_println!(
-            "[  {:>3}.{:06}] Kernel panic!",
-            timestamp.as_secs(),
-            timestamp.subsec_micros(),
-        );
-    }
+    let (location, line, column) = match info.location() {
+        Some(loc) => (loc.file(), loc.line(), loc.column()),
+        _ => ("???", 0, 0),
+    };
+
+    panic_println!(
+        "[  {:>3}.{:06}] Kernel panic!\n\n\
+        Panic location:\n      File '{}', line {}, column {}\n\n\
+        {}",
+        timestamp.as_secs(),
+        timestamp.subsec_micros(),
+        location,
+        line,
+        column,
+        info.message().unwrap_or(&format_args!("")),
+    );
 
     _panic_exit()
 }
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.rs b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.rs
index 184410187..495dba34f 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.rs
@@ -57,7 +57,7 @@ struct ExceptionContext {
 /// Prints verbose information about the exception and then panics.
 fn default_exception_handler(exc: &ExceptionContext) {
     panic!(
-        "\n\nCPU Exception!\n\
+        "CPU Exception!\n\n\
         {}",
         exc
     );
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/panic_wait.rs b/16_virtual_mem_part4_higher_half_kernel/src/panic_wait.rs
index 787bc7dc8..08d7d4533 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/panic_wait.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/panic_wait.rs
@@ -83,21 +83,22 @@ fn panic(info: &PanicInfo) -> ! {
     panic_prevent_reenter();
 
     let timestamp = crate::time::time_manager().uptime();
-
-    if let Some(args) = info.message() {
-        panic_println!(
-            "[  {:>3}.{:06}] Kernel panic: {}",
-            timestamp.as_secs(),
-            timestamp.subsec_micros(),
-            args,
-        );
-    } else {
-        panic_println!(
-            "[  {:>3}.{:06}] Kernel panic!",
-            timestamp.as_secs(),
-            timestamp.subsec_micros(),
-        );
-    }
+    let (location, line, column) = match info.location() {
+        Some(loc) => (loc.file(), loc.line(), loc.column()),
+        _ => ("???", 0, 0),
+    };
+
+    panic_println!(
+        "[  {:>3}.{:06}] Kernel panic!\n\n\
+        Panic location:\n      File '{}', line {}, column {}\n\n\
+        {}",
+        timestamp.as_secs(),
+        timestamp.subsec_micros(),
+        location,
+        line,
+        column,
+        info.message().unwrap_or(&format_args!("")),
+    );
 
     _panic_exit()
 }
diff --git a/X1_JTAG_boot/jtag_boot_rpi3.img b/X1_JTAG_boot/jtag_boot_rpi3.img
index 9fcd693ec7b0fc4bda4a744f682aa366843ed900..14b22a47c71443e49155f7e5c782e9f24bb121bc 100755
GIT binary patch
delta 2334
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E4}iOyB>(^b

delta 2508
zcma)8eQZ-z6hH61wQCD>8~Z4uxW2Bku7feg24e-XZi@jn$e=(pf^5qGTQ)aRP!bY&
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z<a*F}aS95H?USu&B-}nyLOL+o<E@n>z7&#%-2(?3a38N%QKIiOJlJw^v_dD{n5CCu
z^$>~AN|&zGGvthTA)~|)j^p))-A<9qESZNPEH|D%Fov#=VJJ#y6%1)0RfL8$h8{A|
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zX_8`XUsu19U$tUxc{#tX*1HyIuS;nvW&rzuG8Ss*!D)}nw^)_ExO4g~_U(LetF?Ac
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zA#HC^!GY%jfvy1G(bc-i-}y4XDd2x?bHL5J`Bj=cPjjGw3E0n+u|3dM_DZY2b53Bp
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zP_sW-Q<#e1Qk-qA9b&evbo$fniT5l8%TH+PS(-ZidT_4i`8o7xqVSCxz?q_b#?D%7
fOUjr?EB+7mgq~3!$DozZ47384u3FwChHU&_c4zQr

diff --git a/X1_JTAG_boot/jtag_boot_rpi4.img b/X1_JTAG_boot/jtag_boot_rpi4.img
index fb16a02b18124c41465c5d4ffafac9455f46d64c..8622b9be7170b4557239565e64e74a6903bee4cd 100755
GIT binary patch
delta 1815
zcmah|Z)_7~7=PZo7Vf%#u(oT<u)S?;Yk_SJWD5I0w+4YJG7H2-6St+JG>lFLh7Wvb
zbw-dZ+Shjp36ePeBzQF@kbzlAl;Mn-iHQ;zUo`PLK5&JZKtQ${xAVE{)u7S%CYRsy
zyzle(_dNIGy1AC5#|Dj*0GzK1Hqx4PT}Lc1EP-@G8?;`VKfF}_{f%;YuG=m@ddVR_
z-0qYGG!;o~eH7rSZi%1LG|d%&L|7z^>wnqEPx+PBDG|RwDO`NOL(0AAov{0xD+8=+
zi9f!6{<-Vo_<Lb_Xl!6Zjad0I55o`9XqJQF-w+@1B&G0<)Ew%wJgn5^2m0G9AS>Nm
zAh!{6doI5p-co#eU`zbdkA?Zyud7EOt?>5LCXA&QC$xE~8W&|PZj;q`k?aGwuZB1(
zkVO21x*2lnEkZ?rWT4kZ)pJDeC@Gv;OS5*4X3ubPmIrFXKpp!<n*EHIvmwBHi=5q|
zqg7UGINkqz;DU($i{zu&y?`Bx_czjPyja%uLQW*X^f5~!yw&MgD-uYHkP3^LIHZNa
zSI3TmyTymp>GGuJd)miC+UJ7w9z9UVHzsh1gNUVw6TUHj4<g#AJfBb8=EB4!@*Uk?
z@0fV#cPQUEQ!1+wy~r{-djxXER1?)yiSTrKkf$ZBNaYB?y29KtBtL7wAaJ&ha)|BY
z4$31&Mw~Q*P7l#X-v@S*uOmJ-TSD1R%jF6$4d^`Ae<dr6iL4-Hc1=6ZR#?NtJ9^0a
zq19PO13cC=0dy7CHiXty<F%}^XcyVf_7^3&kZqJNo+56+5=4I?HO_b6geAeWfsSCB
z-6*LhzR}r|X0km#uN_~g4CXYRP~%+)<_s*(qc%aV?Xf1pIJTrdzK#oiT8y$%1IEH;
ziimtS1a#=Wp9)vKtiP<bbqB`O8&h%TGPrvR&!wiZ4p`7!lGH96?DbUB(^x%U63q30
z@1{Z2#R~RAnUi&L_b$BlJy~@UU>I$aRXWqRfKFrnriFjhi|-JuVVn6~i;Q*qoZTr~
zxdSP40R(f8<~5hbbJrGHA%`iF(9=LGkxn3R$<PxG^d{;Gz@^)W5~kEkH$q)qq0h@<
z$fTCtDz7WY#Z~JqvWk`HjC5rDtkUikMgmj`0eyzG*|${S^3Mzc{dE-ROcTg=HSONs
zQ)}5L_6pnE4F-8bnU(B{y^cGziruzX2le*O5IQ{p^c+$*^4K07HmNjf&F@jNy{BHU
zD;bgeG=n}LjBa%-Ce>(SoIgsj;KvR!Xq?GXcFg7FI-M-#S`n|Z**be;(TLR7AL%_9
z?T>A+Nyd3L+P7P(Zx3ygHg|5_UcXxEi^g_KtEEVP-&^})lFf#F8z-?Wp9f1Z&Y-Cm
z@+F-4_XhL*lBpZFwRriZd4YetalSQm{8x-K>0}-5F9^@5+r<>OL@a+v)`GNVx#i!x
zmCXC3>+kO^%h=b>pW>LHz*FJ9fKZl~W=uT0G_UKFbUy!NbF;LoExhx;{S}k{dnOk0
zxXrfoXpOr3vl)2C#IDMGBE_A@9#a=QtlU-iM5iZz?J?tQLiCz4ux+m8A9<RZ3&{%i
zg<(vZ#T*!jG`%?xjU8+pIH23iv0hKp8p#}8h3VE}>V-+@Ui*5ZG1CdUkVMZ5f&bfp
Qcg-+s*o*E%?EEt6Pkr6|SO5S3

delta 1821
zcmb7ET}+!*7=F+975Xz)5NJyaqb=pH?X)7om`k=6H2gUs4P2P0gCIJ<kXcCdMq6Am
zMRE4zEa8G=A=}M97Lz7r5j5Gl;Dx)HER$tX6I*uE!j?=i(I$h>_xtHU6SM3jU*Ged
z^Zq^0`=0*YyxJ7C8vI^L0AkLFm%5sCR0HQ6;P@$?E?gy!&rp*u{U(~c2XvhW+Q-4U
zopOIx<OyYuj1RSd-T-EH@0orU<!Xr~{teen%x3Bim}$E1s*uzYA&H&|^kik4ATh_s
zG+*VJ4p28A32v+a^+F^#gVxSu1uHc4lNL5?h;kFg_+N%K!qNqm7*xBzfwZ657H4zG
z6a0xgpz~)XDXx%PC-Wjf13)x`sk%}JX#wt&E)aBBUuqu_Hrs&CIG?4u>t^<;v4*_C
zzBXEp>UTto!_g|pFb8b(0+zz>_h$#den&<&X`_Thf>M?wZ(m5^C+(%Ey4Ts!V$aL#
zqG$o|XK!LCafQ3J(+$}_dkj+Is6H@ucm&|Z6Ape&L_0Tz*9W|Ze>=vn)hCav>G8`H
z!6J>-ha0!MZ|f6hg2K#FXtGLQz95RTel0AX{B}CnQE(wN{qdzaUH&IQ-S^i*TQ11D
zx8J#)IR?uaQGDp7M!JC=NqRxZYysWCv*6$%x>-jAi4cjHu0f!G)N#T_Ib^4$Ixvps
z_hV?Q5kwz^vmWAK{z4N8j+#mvJp`5wun_d5U|B!)*3vYTHQNz{w7((R583hFZi3|z
z8IXO+z#;onD2*tu+m}28DA6YEA~f9tS&0nYpo4yn_WN)@Ht3{jZ@#d31hS0)rMmpE
zf@}oQcFJglIT<032oafts0&eME+axjB<qMUbD0Qx(QJ7UO*l_@YB1raMKfi`@y?gq
ztRrsPiOAB3ChY>6xu_K~?U2Q(iaMpoGsMyL(}W)15ohNCnsVddL|uArIBC&$0jep7
zo7Thu%A*{bucRq-^5PswMk0^1g$X2MNO)*Bo&$j^vYzzNnn&Vn65vXQY_Ggynf6q<
z6t7g?J1f|C#kDO?z}huJIyV}DTGaD|4#cqGB1j;IBomr(@zTqPI-!mx+kn2$tR)@I
z*oFJ2fj)=>z3&5I6FW18op|6QLgz;}<_tK)3pm4an^PY7A<hKq*=$KIN8IdMNtIus
z<RYQ#D?pR@r04fgvWR+)l3hls6-FX8G=)A_<IYko2@e25!lnG~%05mxd0V}yQ1#Zf
z<Br}}pKoYz^ap}{0QGq}PdN;7sjP$QdDQgp`?FR>$0kXO{b;!vmSVQ|cJ`qDf93p8
zsJPu#WzMclj<Q>}pI7X9RT;A>`X#d>msEXK)h9wjKGtWgFqK&p1FIVF6_l0iOKXKw
zJ;-HL)yF_%g{;d|$we(})KndQ$?>M6dpI;c{GQ{~;P}Xp({NV>jMF2pUsOFu)T)}e
zNWI5@8F@X)FYzD0qA~=aL07_3whvg$+`<H_?}f*Vs$uuktpJu7I29ThpL{MfA=&gY
jz0Ftrp<1O`bvtWiUA9UtW@V$c*Q%aW+pkvkv+evp0d)z^

diff --git a/X1_JTAG_boot/src/panic_wait.rs b/X1_JTAG_boot/src/panic_wait.rs
index 3c57f5620..f851e0d8c 100644
--- a/X1_JTAG_boot/src/panic_wait.rs
+++ b/X1_JTAG_boot/src/panic_wait.rs
@@ -64,21 +64,22 @@ fn panic(info: &PanicInfo) -> ! {
     panic_prevent_reenter();
 
     let timestamp = crate::time::time_manager().uptime();
-
-    if let Some(args) = info.message() {
-        panic_println!(
-            "[  {:>3}.{:06}] Kernel panic: {}",
-            timestamp.as_secs(),
-            timestamp.subsec_micros(),
-            args,
-        );
-    } else {
-        panic_println!(
-            "[  {:>3}.{:06}] Kernel panic!",
-            timestamp.as_secs(),
-            timestamp.subsec_micros(),
-        );
-    }
+    let (location, line, column) = match info.location() {
+        Some(loc) => (loc.file(), loc.line(), loc.column()),
+        _ => ("???", 0, 0),
+    };
+
+    panic_println!(
+        "[  {:>3}.{:06}] Kernel panic!\n\n\
+        Panic location:\n      File '{}', line {}, column {}\n\n\
+        {}",
+        timestamp.as_secs(),
+        timestamp.subsec_micros(),
+        location,
+        line,
+        column,
+        info.message().unwrap_or(&format_args!("")),
+    );
 
     cpu::wait_forever()
 }

From c411de77f023c86ae588176c33d0dc0c25205ad1 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Fri, 8 Apr 2022 22:36:39 +0200
Subject: [PATCH 125/214] Fix rubocop complaint

---
 common/tests/test.rb | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/common/tests/test.rb b/common/tests/test.rb
index d102ecd99..7ba5b7c43 100644
--- a/common/tests/test.rb
+++ b/common/tests/test.rb
@@ -8,6 +8,7 @@
 class Test
     INDENT = '         '
 
+    # rubocop:disable Style/RedundantInitialize
     def initialize
         # Template instance variables.
         # @test_name
@@ -15,6 +16,7 @@ def initialize
         # @test_output
         # @test_error
     end
+    # rubocop:enable Style/RedundantInitialize
 
     private
 

From d50f675965a3bef1b5fd48368a253d89277490f5 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=C2=B0=7Ezanez?=
 <51524324+zanezhub@users.noreply.github.com>
Date: Sat, 9 Apr 2022 13:23:58 -0500
Subject: [PATCH 126/214] README.ES.md --> 03 (#151)

* README.ES.md

I added a spanish translation for the README.md file, and modified the README.md to add my github profile and to add the link to README.ES.md file

* Slightly reorganize translation overview

* README.ES.md These changes are in response to PR comments

* Update README.ES.md

* README.ES.md -> 00_before_we_start

* Updating README.ES.md

I corrected a few mistakes in both README.ES.md files.

* README.ES.md for 00 These changes are in response to PR comments

* README.ES.md -> 01_wait_forever

* README.ES.md -> 02_runtime_init

* README.md for 01 & 02 with corrections/improvements

* Update 01_wait_forever/README.ES.md

* Update 02_runtime_init/README.ES.md

* README.ES.md -> 03_hacky_hello_world

* README.md with corrections/improvements

Co-authored-by: zanez <zanez@protonmail.com>
Co-authored-by: Andre Richter <andre-richter@users.noreply.github.com>
Co-authored-by: Diego Barrios Romero <eldruin@gmail.com>
---
 03_hacky_hello_world/README.ES.md | 322 ++++++++++++++++++++++++++++++
 03_hacky_hello_world/README.md    |  15 +-
 2 files changed, 329 insertions(+), 8 deletions(-)
 create mode 100644 03_hacky_hello_world/README.ES.md

diff --git a/03_hacky_hello_world/README.ES.md b/03_hacky_hello_world/README.ES.md
new file mode 100644
index 000000000..f52b226e0
--- /dev/null
+++ b/03_hacky_hello_world/README.ES.md
@@ -0,0 +1,322 @@
+# Tutorial 03 - Hacky Hello World
+
+## tl;dr
+
+* Se añade la macro global `print!()` para habilitar la "depuración basada en printf" ("printf debugging") lo más pronto posible.
+* Para mantener una duración razonable en este tutorial, las funciones de impresión por el momento "abusan" una propiedad de QEMU que nos permite hacer uso del `UART` de la Raspberry sin haberla configurado apropiadamente.
+* El uso del hardware real de `UART` se habilitará paso por paso en los siguientes tutoriales.
+
+## Adiciones notables
+
+* `src/console.rs` introduce una interfaz con `Trait`s para comandos de consola.
+* `src/bsp/raspberrypi/console.rs` implementa la interfaz para que QEMU pueda crear una emulación de UART.
+* El *panic handler* (manejador de pánico) hace uso de la nueva macro `print!()` para mostrar mensajes de error del usuario.
+* Hay un nuevo objetivo en el Makefile: `make test`, destinado a la automatización de pruebas. Este comando inicia el kernel (núcleo) compilado en `QEMU`, y busca una cadena de  texto específica en la salida que ha sido producida por el kernel (núcleo).
+  * En este tutorial, se buscará la cadena `Stopping here`, que es creada por la macro `panic!()` al final del archivo `main.rs`.
+
+## Pruébalo
+
+QEMU ya no está siendo ejecutado en modo ensamblador. Desde ahora en adelante mostrará la salida de la `consola`.
+
+```console
+$ make qemu
+[...]
+Hello from Rust!
+
+Kernel panic: Stopping here.
+```
+
+### Diccionario
+
+* *Hacky:* Solución torpe o poco elegante para un problema.
+
+* *Debugging:* Proceso para identificar y corregir errores de programación.
+  
+  * *printf debugging:* Usado para describir el trabajo de depuración (*debugging*) poniendo comandos que dan una salida en consola, como el de "printf", en diferentes lugares del programa; observando la información y tratando de deducir qué está mal en el programa basándose en la información que nos dan nuestros comandos.
+
+* *Traits:* Un *trait* le hace saber al compilador de Rust acerca de una funcionalidad que tiene un tipo de dato particular y que puede compartir con otros tipos de datos.
+  
+  > NOTA: Los *traits* son similares a una característica que se le conoce comúnmente como *interfaces* en otros lenguajes, aunque con algunas diferencias.
+  
+  Si deseas aprender más acerca de esto, por favor lee este capítulo del libro de Rust: [Traits: Defining Shared Behavior - The Rust Programming Language](https://doc.rust-lang.org/book/ch10-02-traits.html)
+
+## Diferencias con el archivo anterior
+
+```diff
+diff -uNr 02_runtime_init/Cargo.toml 03_hacky_hello_world/Cargo.toml
+--- 02_runtime_init/Cargo.toml
++++ 03_hacky_hello_world/Cargo.toml
+@@ -1,6 +1,6 @@
+ [package]
+ name = "mingo"
+-version = "0.2.0"
++version = "0.3.0"
+ authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+ edition = "2021"
+
+
+diff -uNr 02_runtime_init/Makefile 03_hacky_hello_world/Makefile
+--- 02_runtime_init/Makefile
++++ 03_hacky_hello_world/Makefile
+@@ -24,7 +24,7 @@
+     KERNEL_BIN        = kernel8.img
+     QEMU_BINARY       = qemu-system-aarch64
+     QEMU_MACHINE_TYPE = raspi3
+-    QEMU_RELEASE_ARGS = -d in_asm -display none
++    QEMU_RELEASE_ARGS = -serial stdio -display none
+     OBJDUMP_BINARY    = aarch64-none-elf-objdump
+     NM_BINARY         = aarch64-none-elf-nm
+     READELF_BINARY    = aarch64-none-elf-readelf
+@@ -35,7 +35,7 @@
+     KERNEL_BIN        = kernel8.img
+     QEMU_BINARY       = qemu-system-aarch64
+     QEMU_MACHINE_TYPE =
+-    QEMU_RELEASE_ARGS = -d in_asm -display none
++    QEMU_RELEASE_ARGS = -serial stdio -display none
+     OBJDUMP_BINARY    = aarch64-none-elf-objdump
+     NM_BINARY         = aarch64-none-elf-nm
+     READELF_BINARY    = aarch64-none-elf-readelf
+@@ -71,17 +71,20 @@
+     --strip-all            \
+     -O binary
+
+-EXEC_QEMU = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
++EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
++EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
+
+ ##------------------------------------------------------------------------------
+ ## Dockerization
+ ##------------------------------------------------------------------------------
+-DOCKER_CMD          = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
+-DOCKER_CMD_INTERACT = $(DOCKER_CMD) -i
++DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
++DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
++DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
+
+ # DOCKER_IMAGE defined in include file (see top of this file).
+ DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
+ DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
++DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
+
+
+
+@@ -169,3 +172,28 @@
+ ##------------------------------------------------------------------------------
+ check:
+     @RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
++
++
++
++##--------------------------------------------------------------------------------------------------
++## Testing targets
++##--------------------------------------------------------------------------------------------------
++.PHONY: test test_boot
++
++ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
++
++test_boot test :
++    $(call colorecho, "\n$(QEMU_MISSING_STRING)")
++
++else # QEMU is supported.
++
++##------------------------------------------------------------------------------
++## Run boot test
++##------------------------------------------------------------------------------
++test_boot: $(KERNEL_BIN)
++    $(call colorecho, "\nBoot test - $(BSP)")
++    @$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
++
++test: test_boot
++
++endif
+
+diff -uNr 02_runtime_init/src/bsp/raspberrypi/console.rs 03_hacky_hello_world/src/bsp/raspberrypi/console.rs
+--- 02_runtime_init/src/bsp/raspberrypi/console.rs
++++ 03_hacky_hello_world/src/bsp/raspberrypi/console.rs
+@@ -0,0 +1,47 @@
++// SPDX-License-Identifier: MIT OR Apache-2.0
++//
++// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
++
++//! BSP console facilities.
++
++use crate::console;
++use core::fmt;
++
++//--------------------------------------------------------------------------------------------------
++// Private Definitions
++//--------------------------------------------------------------------------------------------------
++
++/// A mystical, magical device for generating QEMU output out of the void.
++struct QEMUOutput;
++
++//--------------------------------------------------------------------------------------------------
++// Private Code
++//--------------------------------------------------------------------------------------------------
++
++/// Implementing `core::fmt::Write` enables usage of the `format_args!` macros, which in turn are
++/// used to implement the `kernel`'s `print!` and `println!` macros. By implementing `write_str()`,
++/// we get `write_fmt()` automatically.
++///
++/// See [`src/print.rs`].
++///
++/// [`src/print.rs`]: ../../print/index.html
++impl fmt::Write for QEMUOutput {
++    fn write_str(&mut self, s: &str) -> fmt::Result {
++        for c in s.chars() {
++            unsafe {
++                core::ptr::write_volatile(0x3F20_1000 as *mut u8, c as u8);
++            }
++        }
++
++        Ok(())
++    }
++}
++
++//--------------------------------------------------------------------------------------------------
++// Public Code
++//--------------------------------------------------------------------------------------------------
++
++/// Return a reference to the console.
++pub fn console() -> impl console::interface::Write {
++    QEMUOutput {}
++}
+
+diff -uNr 02_runtime_init/src/bsp/raspberrypi.rs 03_hacky_hello_world/src/bsp/raspberrypi.rs
+--- 02_runtime_init/src/bsp/raspberrypi.rs
++++ 03_hacky_hello_world/src/bsp/raspberrypi.rs
+@@ -4,4 +4,5 @@
+
+ //! Top-level BSP file for the Raspberry Pi 3 and 4.
+
++pub mod console;
+ pub mod cpu;
+
+diff -uNr 02_runtime_init/src/console.rs 03_hacky_hello_world/src/console.rs
+--- 02_runtime_init/src/console.rs
++++ 03_hacky_hello_world/src/console.rs
+@@ -0,0 +1,19 @@
++// SPDX-License-Identifier: MIT OR Apache-2.0
++//
++// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
++
++//! System console.
++
++//--------------------------------------------------------------------------------------------------
++// Public Definitions
++//--------------------------------------------------------------------------------------------------
++
++/// Console interfaces.
++pub mod interface {
++    /// Console write functions.
++    ///
++    /// `core::fmt::Write` is exactly what we need for now. Re-export it here because
++    /// implementing `console::Write` gives a better hint to the reader about the
++    /// intention.
++    pub use core::fmt::Write;
++}
+
+diff -uNr 02_runtime_init/src/main.rs 03_hacky_hello_world/src/main.rs
+--- 02_runtime_init/src/main.rs
++++ 03_hacky_hello_world/src/main.rs
+@@ -104,12 +104,16 @@
+ //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
+ //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
+
++#![feature(format_args_nl)]
++#![feature(panic_info_message)]
+ #![no_main]
+ #![no_std]
+
+ mod bsp;
++mod console;
+ mod cpu;
+ mod panic_wait;
++mod print;
+
+ /// Early init code.
+ ///
+@@ -117,5 +121,7 @@
+ ///
+ /// - Only a single core must be active and running this function.
+ unsafe fn kernel_init() -> ! {
+-    panic!()
++    println!("[0] Hello from Rust!");
++
++    panic!("Stopping here.")
+ }
+
+diff -uNr 02_runtime_init/src/panic_wait.rs 03_hacky_hello_world/src/panic_wait.rs
+--- 02_runtime_init/src/panic_wait.rs
++++ 03_hacky_hello_world/src/panic_wait.rs
+@@ -4,10 +4,16 @@
+
+ //! A panic handler that infinitely waits.
+
+-use crate::cpu;
++use crate::{cpu, println};
+ use core::panic::PanicInfo;
+
+ #[panic_handler]
+-fn panic(_info: &PanicInfo) -> ! {
++fn panic(info: &PanicInfo) -> ! {
++    if let Some(args) = info.message() {
++        println!("\nKernel panic: {}", args);
++    } else {
++        println!("\nKernel panic!");
++    }
++
+     cpu::wait_forever()
+ }
+
+diff -uNr 02_runtime_init/src/print.rs 03_hacky_hello_world/src/print.rs
+--- 02_runtime_init/src/print.rs
++++ 03_hacky_hello_world/src/print.rs
+@@ -0,0 +1,38 @@
++// SPDX-License-Identifier: MIT OR Apache-2.0
++//
++// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
++
++//! Printing.
++
++use crate::{bsp, console};
++use core::fmt;
++
++//--------------------------------------------------------------------------------------------------
++// Public Code
++//--------------------------------------------------------------------------------------------------
++
++#[doc(hidden)]
++pub fn _print(args: fmt::Arguments) {
++    use console::interface::Write;
++
++    bsp::console::console().write_fmt(args).unwrap();
++}
++
++/// Prints without a newline.
++///
++/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
++#[macro_export]
++macro_rules! print {
++    ($($arg:tt)*) => ($crate::print::_print(format_args!($($arg)*)));
++}
++
++/// Prints with a newline.
++///
++/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
++#[macro_export]
++macro_rules! println {
++    () => ($crate::print!("\n"));
++    ($($arg:tt)*) => ({
++        $crate::print::_print(format_args_nl!($($arg)*));
++    })
++}
+
+diff -uNr 02_runtime_init/tests/boot_test_string.rb 03_hacky_hello_world/tests/boot_test_string.rb
+--- 02_runtime_init/tests/boot_test_string.rb
++++ 03_hacky_hello_world/tests/boot_test_string.rb
+@@ -0,0 +1,3 @@
++# frozen_string_literal: true
++
++EXPECTED_PRINT = 'Stopping here'
+```
diff --git a/03_hacky_hello_world/README.md b/03_hacky_hello_world/README.md
index 1e764e657..527757ddb 100644
--- a/03_hacky_hello_world/README.md
+++ b/03_hacky_hello_world/README.md
@@ -14,8 +14,8 @@
 - The panic handler makes use of the new `print!()` to display user error messages.
 - There is a new Makefile target, `make test`, intended for automated testing. It boots the compiled
   kernel in `QEMU`, and checks for an expected output string produced by the kernel.
-    - In this tutorial, it checks for the string `Stopping here`, which is emitted by the `panic!()`
-      at the end of `main.rs`.
+  - In this tutorial, it checks for the string `Stopping here`, which is emitted by the `panic!()`
+    at the end of `main.rs`.
 
 ## Test it
 
@@ -35,8 +35,8 @@ Stopping here.
 ```
 
 ## Diff to previous
-```diff
 
+```diff
 diff -uNr 02_runtime_init/Cargo.toml 03_hacky_hello_world/Cargo.toml
 --- 02_runtime_init/Cargo.toml
 +++ 03_hacky_hello_world/Cargo.toml
@@ -97,7 +97,7 @@ diff -uNr 02_runtime_init/Makefile 03_hacky_hello_world/Makefile
 @@ -169,3 +172,28 @@
  ##------------------------------------------------------------------------------
  check:
- 	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
+     @RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
 +
 +
 +
@@ -109,7 +109,7 @@ diff -uNr 02_runtime_init/Makefile 03_hacky_hello_world/Makefile
 +ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 +
 +test_boot test :
-+	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
++    $(call colorecho, "\n$(QEMU_MISSING_STRING)")
 +
 +else # QEMU is supported.
 +
@@ -117,8 +117,8 @@ diff -uNr 02_runtime_init/Makefile 03_hacky_hello_world/Makefile
 +## Run boot test
 +##------------------------------------------------------------------------------
 +test_boot: $(KERNEL_BIN)
-+	$(call colorecho, "\nBoot test - $(BSP)")
-+	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
++    $(call colorecho, "\nBoot test - $(BSP)")
++    @$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 +
 +test: test_boot
 +
@@ -358,5 +358,4 @@ diff -uNr 02_runtime_init/tests/boot_test_string.rb 03_hacky_hello_world/tests/b
 +# frozen_string_literal: true
 +
 +EXPECTED_PRINT = 'Stopping here'
-
 ```

From ad5a96db4c1af9680936ee2ff1b8367f208e8004 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sun, 10 Apr 2022 12:18:11 +0200
Subject: [PATCH 127/214] Bump compiler version

---
 03_hacky_hello_world/README.md                |  11 ++++++-----
 05_drivers_gpio_uart/README.md                |   7 +++----
 05_drivers_gpio_uart/src/main.rs              |   1 -
 06_uart_chainloader/README.md                 |   2 +-
 06_uart_chainloader/demo_payload_rpi3.img     | Bin 7112 -> 7968 bytes
 06_uart_chainloader/demo_payload_rpi4.img     | Bin 7000 -> 7872 bytes
 06_uart_chainloader/src/main.rs               |   1 -
 07_timestamps/README.md                       |   4 ++--
 07_timestamps/src/main.rs                     |   1 -
 08_hw_debug_JTAG/src/main.rs                  |   1 -
 09_privilege_level/README.md                  |   8 ++++----
 09_privilege_level/src/main.rs                |   1 -
 .../README.md                                 |  11 +++++------
 .../src/main.rs                               |   1 -
 11_exceptions_part1_groundwork/README.md      |   4 ++--
 11_exceptions_part1_groundwork/src/main.rs    |   1 -
 12_integrated_testing/README.md               |  12 +++++-------
 12_integrated_testing/src/lib.rs              |   1 -
 13_exceptions_part2_peripheral_IRQs/README.md |   8 +++-----
 .../src/exception/asynchronous.rs             |   2 +-
 .../src/lib.rs                                |   2 --
 14_virtual_mem_part2_mmio_remap/README.md     |  14 ++++++++------
 .../src/exception/asynchronous.rs             |   2 +-
 14_virtual_mem_part2_mmio_remap/src/lib.rs    |   2 --
 .../src/memory/mmu/types.rs                   |   4 +++-
 .../src/exception/asynchronous.rs             |   2 +-
 .../src/lib.rs                                |   2 --
 .../src/memory/mmu/types.rs                   |   4 +++-
 .../README.md                                 |   2 +-
 .../src/exception/asynchronous.rs             |   2 +-
 .../src/lib.rs                                |   2 --
 .../src/memory/mmu/types.rs                   |   4 +++-
 X1_JTAG_boot/jtag_boot_rpi3.img               | Bin 8104 -> 9000 bytes
 X1_JTAG_boot/jtag_boot_rpi4.img               | Bin 7032 -> 7920 bytes
 X1_JTAG_boot/src/main.rs                      |   1 -
 rust-toolchain.toml                           |   2 +-
 36 files changed, 54 insertions(+), 68 deletions(-)

diff --git a/03_hacky_hello_world/README.md b/03_hacky_hello_world/README.md
index 527757ddb..b0cfee129 100644
--- a/03_hacky_hello_world/README.md
+++ b/03_hacky_hello_world/README.md
@@ -35,8 +35,8 @@ Stopping here.
 ```
 
 ## Diff to previous
-
 ```diff
+
 diff -uNr 02_runtime_init/Cargo.toml 03_hacky_hello_world/Cargo.toml
 --- 02_runtime_init/Cargo.toml
 +++ 03_hacky_hello_world/Cargo.toml
@@ -97,7 +97,7 @@ diff -uNr 02_runtime_init/Makefile 03_hacky_hello_world/Makefile
 @@ -169,3 +172,28 @@
  ##------------------------------------------------------------------------------
  check:
-     @RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
+ 	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
 +
 +
 +
@@ -109,7 +109,7 @@ diff -uNr 02_runtime_init/Makefile 03_hacky_hello_world/Makefile
 +ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 +
 +test_boot test :
-+    $(call colorecho, "\n$(QEMU_MISSING_STRING)")
++	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
 +
 +else # QEMU is supported.
 +
@@ -117,8 +117,8 @@ diff -uNr 02_runtime_init/Makefile 03_hacky_hello_world/Makefile
 +## Run boot test
 +##------------------------------------------------------------------------------
 +test_boot: $(KERNEL_BIN)
-+    $(call colorecho, "\nBoot test - $(BSP)")
-+    @$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
++	$(call colorecho, "\nBoot test - $(BSP)")
++	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 +
 +test: test_boot
 +
@@ -358,4 +358,5 @@ diff -uNr 02_runtime_init/tests/boot_test_string.rb 03_hacky_hello_world/tests/b
 +# frozen_string_literal: true
 +
 +EXPECTED_PRINT = 'Stopping here'
+
 ```
diff --git a/05_drivers_gpio_uart/README.md b/05_drivers_gpio_uart/README.md
index aa39cbaab..d49adf285 100644
--- a/05_drivers_gpio_uart/README.md
+++ b/05_drivers_gpio_uart/README.md
@@ -1333,16 +1333,15 @@ diff -uNr 04_safe_globals/src/driver.rs 05_drivers_gpio_uart/src/driver.rs
 diff -uNr 04_safe_globals/src/main.rs 05_drivers_gpio_uart/src/main.rs
 --- 04_safe_globals/src/main.rs
 +++ 05_drivers_gpio_uart/src/main.rs
-@@ -104,6 +104,8 @@
+@@ -104,6 +104,7 @@
  //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
  //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
 +#![allow(clippy::upper_case_acronyms)]
-+#![feature(const_fn_fn_ptr_basics)]
  #![feature(format_args_nl)]
  #![feature(panic_info_message)]
  #![feature(trait_alias)]
-@@ -113,6 +115,7 @@
+@@ -113,6 +114,7 @@
  mod bsp;
  mod console;
  mod cpu;
@@ -1350,7 +1349,7 @@ diff -uNr 04_safe_globals/src/main.rs 05_drivers_gpio_uart/src/main.rs
  mod panic_wait;
  mod print;
  mod synchronization;
-@@ -122,16 +125,54 @@
+@@ -122,16 +124,54 @@
  /// # Safety
  ///
  /// - Only a single core must be active and running this function.
diff --git a/05_drivers_gpio_uart/src/main.rs b/05_drivers_gpio_uart/src/main.rs
index 55e80f566..70e6b1168 100644
--- a/05_drivers_gpio_uart/src/main.rs
+++ b/05_drivers_gpio_uart/src/main.rs
@@ -105,7 +105,6 @@
 //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
 #![allow(clippy::upper_case_acronyms)]
-#![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
diff --git a/06_uart_chainloader/README.md b/06_uart_chainloader/README.md
index b904d9d89..6f786dd85 100644
--- a/06_uart_chainloader/README.md
+++ b/06_uart_chainloader/README.md
@@ -457,7 +457,7 @@ diff -uNr 05_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs 06_uart_chainloader
 diff -uNr 05_drivers_gpio_uart/src/main.rs 06_uart_chainloader/src/main.rs
 --- 05_drivers_gpio_uart/src/main.rs
 +++ 06_uart_chainloader/src/main.rs
-@@ -141,38 +141,56 @@
+@@ -140,38 +140,56 @@
      kernel_main()
  }
 
diff --git a/06_uart_chainloader/demo_payload_rpi3.img b/06_uart_chainloader/demo_payload_rpi3.img
index 1997951a5d4b8429956ff250ab5928d11b3d272f..1491d9b590d392fb5d5998c3037ed74fc8579c89 100755
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diff --git a/06_uart_chainloader/demo_payload_rpi4.img b/06_uart_chainloader/demo_payload_rpi4.img
index 9f463d32d7dd4c60080c8b92f3b298fa1d8f9d4c..9f7de6dfbb4dc9afc2d188340fb8a6de00dd6812 100755
GIT binary patch
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z)+fqyp^p`Ek$P0`=iQ0>_!*Nr@s3ITTjZQDkuQTQ^5Gz5Y}8wB*r-As$J!Twm5~<*
zg`cfYisl7+m<>ICN9l8z@o96YobkP9;rE)*pW=Rmy8`m#CP7rLi6lgkdvT{A+zHsX
zE+zO#3E}=BPM<;Dzlnr*E3u|+=HRgq)>m-W=t*|3LQRJI7w%P-*k`zF75<qLd;|BK
zzsG&&A93$Fg?rHH5=G|o6}iBo$p3!tvv1Yj_v~BWyJwkaFW$lj3q0fB-TRjPuflKH
ze@JsRoG|@5^7|QlqtWlMkSCNyGcnXHg@_Hd-@A~L?f1qHmAN$r4U@4JGCe6O$Jlzd
zM&wM<%3>vGfgUzP4|Yz53EqY${r7I$WJ-_hG-mEG`gQe>N?RUrx?Iv@wT(?g73K`3
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zx@5Q0?Q*-_9=F%+bNk%^chD_+oF13Q?eTcL9-qhW33!4Y+3WPWyl$_@>-GA)es91V
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zhj*KEyCi{ecci0TLSI;x#us-({jnN-<azyh#;`}mPJ19*2WB=H>rnISk8_Q0jT67Z
zUm4%#+Ah^~bnIg)b+oUQo;Buich#S-^55p(F0Ip5@7AGc*|`=a2+>)C4rikNNcyuz
z`VV6q|DVvGD@H%#FJI&D*)G+$Hg|PP`@16h_O(DHolaPu#sM{m{(OzjyIoqpqqT$S
z5ozE1^ggM*V?QKQ47!Y6GVx)sx#Qo1i_-j=o%VJ`+V>fTI%3cxUiGI4e^=w((cIS7
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z(%vFfOFKH+p5D_gSu7TE8vLtt?$FEVr_mtVZS*t#w$JE)oBc9+X6Q4mvn2gXG1|;J
n+@<v=vrggDzqS}{uq@rr<Q>K6e`d%*B+cs#3XIm^mudbF7%--A

diff --git a/06_uart_chainloader/src/main.rs b/06_uart_chainloader/src/main.rs
index e44a1ae67..32a56bda7 100644
--- a/06_uart_chainloader/src/main.rs
+++ b/06_uart_chainloader/src/main.rs
@@ -105,7 +105,6 @@
 //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
 #![allow(clippy::upper_case_acronyms)]
-#![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index 0af0b0466..e6796930d 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -538,7 +538,7 @@ diff -uNr 06_uart_chainloader/src/cpu.rs 07_timestamps/src/cpu.rs
 diff -uNr 06_uart_chainloader/src/main.rs 07_timestamps/src/main.rs
 --- 06_uart_chainloader/src/main.rs
 +++ 07_timestamps/src/main.rs
-@@ -119,6 +119,7 @@
+@@ -118,6 +118,7 @@
  mod panic_wait;
  mod print;
  mod synchronization;
@@ -546,7 +546,7 @@ diff -uNr 06_uart_chainloader/src/main.rs 07_timestamps/src/main.rs
 
  /// Early init code.
  ///
-@@ -141,56 +142,38 @@
+@@ -140,56 +141,38 @@
      kernel_main()
  }
 
diff --git a/07_timestamps/src/main.rs b/07_timestamps/src/main.rs
index e5d1d81ea..3d4ace4fc 100644
--- a/07_timestamps/src/main.rs
+++ b/07_timestamps/src/main.rs
@@ -105,7 +105,6 @@
 //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
 #![allow(clippy::upper_case_acronyms)]
-#![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
diff --git a/08_hw_debug_JTAG/src/main.rs b/08_hw_debug_JTAG/src/main.rs
index e5d1d81ea..3d4ace4fc 100644
--- a/08_hw_debug_JTAG/src/main.rs
+++ b/08_hw_debug_JTAG/src/main.rs
@@ -105,7 +105,6 @@
 //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
 #![allow(clippy::upper_case_acronyms)]
-#![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
diff --git a/09_privilege_level/README.md b/09_privilege_level/README.md
index b98434958..729634ac0 100644
--- a/09_privilege_level/README.md
+++ b/09_privilege_level/README.md
@@ -502,7 +502,7 @@ diff -uNr 08_hw_debug_JTAG/src/exception.rs 09_privilege_level/src/exception.rs
 diff -uNr 08_hw_debug_JTAG/src/main.rs 09_privilege_level/src/main.rs
 --- 08_hw_debug_JTAG/src/main.rs
 +++ 09_privilege_level/src/main.rs
-@@ -116,6 +116,7 @@
+@@ -115,6 +115,7 @@
  mod console;
  mod cpu;
  mod driver;
@@ -510,7 +510,7 @@ diff -uNr 08_hw_debug_JTAG/src/main.rs 09_privilege_level/src/main.rs
  mod panic_wait;
  mod print;
  mod synchronization;
-@@ -144,6 +145,8 @@
+@@ -143,6 +144,8 @@
 
  /// The main function running after the early init.
  fn kernel_main() -> ! {
@@ -519,7 +519,7 @@ diff -uNr 08_hw_debug_JTAG/src/main.rs 09_privilege_level/src/main.rs
      use core::time::Duration;
      use driver::interface::DriverManager;
      use time::interface::TimeManager;
-@@ -155,6 +158,12 @@
+@@ -154,6 +157,12 @@
      );
      info!("Booting on: {}", bsp::board_name());
 
@@ -532,7 +532,7 @@ diff -uNr 08_hw_debug_JTAG/src/main.rs 09_privilege_level/src/main.rs
      info!(
          "Architectural timer resolution: {} ns",
          time::time_manager().resolution().as_nanos()
-@@ -169,11 +178,15 @@
+@@ -168,11 +177,15 @@
          info!("      {}. {}", i + 1, driver.compatible());
      }
 
diff --git a/09_privilege_level/src/main.rs b/09_privilege_level/src/main.rs
index c3bca5c33..b44497341 100644
--- a/09_privilege_level/src/main.rs
+++ b/09_privilege_level/src/main.rs
@@ -105,7 +105,6 @@
 //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
 #![allow(clippy::upper_case_acronyms)]
-#![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
diff --git a/10_virtual_mem_part1_identity_mapping/README.md b/10_virtual_mem_part1_identity_mapping/README.md
index f553e0e09..1bf427c02 100644
--- a/10_virtual_mem_part1_identity_mapping/README.md
+++ b/10_virtual_mem_part1_identity_mapping/README.md
@@ -1081,17 +1081,16 @@ diff -uNr 09_privilege_level/src/bsp.rs 10_virtual_mem_part1_identity_mapping/sr
 diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/src/main.rs
 --- 09_privilege_level/src/main.rs
 +++ 10_virtual_mem_part1_identity_mapping/src/main.rs
-@@ -105,7 +105,9 @@
+@@ -105,6 +105,8 @@
  //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
  #![allow(clippy::upper_case_acronyms)]
 +#![allow(incomplete_features)]
- #![feature(const_fn_fn_ptr_basics)]
 +#![feature(core_intrinsics)]
  #![feature(format_args_nl)]
  #![feature(panic_info_message)]
  #![feature(trait_alias)]
-@@ -117,6 +119,7 @@
+@@ -116,6 +118,7 @@
  mod cpu;
  mod driver;
  mod exception;
@@ -1099,7 +1098,7 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
  mod panic_wait;
  mod print;
  mod synchronization;
-@@ -127,9 +130,17 @@
+@@ -126,9 +129,17 @@
  /// # Safety
  ///
  /// - Only a single core must be active and running this function.
@@ -1118,7 +1117,7 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
 
      for i in bsp::driver::driver_manager().all_device_drivers().iter() {
          if let Err(x) = i.init() {
-@@ -158,6 +169,9 @@
+@@ -157,6 +168,9 @@
      );
      info!("Booting on: {}", bsp::board_name());
 
@@ -1128,7 +1127,7 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
      let (_, privilege_level) = exception::current_privilege_level();
      info!("Current privilege level: {}", privilege_level);
 
-@@ -181,6 +195,13 @@
+@@ -180,6 +194,13 @@
      info!("Timer test, spinning for 1 second");
      time::time_manager().spin_for(Duration::from_secs(1));
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/main.rs b/10_virtual_mem_part1_identity_mapping/src/main.rs
index 5b5cb473b..faa81ee86 100644
--- a/10_virtual_mem_part1_identity_mapping/src/main.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/main.rs
@@ -106,7 +106,6 @@
 
 #![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
-#![feature(const_fn_fn_ptr_basics)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(panic_info_message)]
diff --git a/11_exceptions_part1_groundwork/README.md b/11_exceptions_part1_groundwork/README.md
index 4df5c9391..2f90b7ff8 100644
--- a/11_exceptions_part1_groundwork/README.md
+++ b/11_exceptions_part1_groundwork/README.md
@@ -1016,7 +1016,7 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/exception.rs 11_exceptions_p
 diff -uNr 10_virtual_mem_part1_identity_mapping/src/main.rs 11_exceptions_part1_groundwork/src/main.rs
 --- 10_virtual_mem_part1_identity_mapping/src/main.rs
 +++ 11_exceptions_part1_groundwork/src/main.rs
-@@ -138,6 +138,8 @@
+@@ -137,6 +137,8 @@
      use driver::interface::DriverManager;
      use memory::mmu::interface::MMU;
 
@@ -1025,7 +1025,7 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/main.rs 11_exceptions_part1_
      if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
          panic!("MMU: {}", string);
      }
-@@ -195,13 +197,28 @@
+@@ -194,13 +196,28 @@
      info!("Timer test, spinning for 1 second");
      time::time_manager().spin_for(Duration::from_secs(1));
 
diff --git a/11_exceptions_part1_groundwork/src/main.rs b/11_exceptions_part1_groundwork/src/main.rs
index 22912318e..77ffd9cda 100644
--- a/11_exceptions_part1_groundwork/src/main.rs
+++ b/11_exceptions_part1_groundwork/src/main.rs
@@ -106,7 +106,6 @@
 
 #![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
-#![feature(const_fn_fn_ptr_basics)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(panic_info_message)]
diff --git a/12_integrated_testing/README.md b/12_integrated_testing/README.md
index 8a20a0d59..fddd4be5a 100644
--- a/12_integrated_testing/README.md
+++ b/12_integrated_testing/README.md
@@ -1325,7 +1325,7 @@ diff -uNr 11_exceptions_part1_groundwork/src/exception.rs 12_integrated_testing/
 diff -uNr 11_exceptions_part1_groundwork/src/lib.rs 12_integrated_testing/src/lib.rs
 --- 11_exceptions_part1_groundwork/src/lib.rs
 +++ 12_integrated_testing/src/lib.rs
-@@ -0,0 +1,184 @@
+@@ -0,0 +1,183 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
@@ -1436,7 +1436,6 @@ diff -uNr 11_exceptions_part1_groundwork/src/lib.rs 12_integrated_testing/src/li
 +
 +#![allow(clippy::upper_case_acronyms)]
 +#![allow(incomplete_features)]
-+#![feature(const_fn_fn_ptr_basics)]
 +#![feature(core_intrinsics)]
 +#![feature(format_args_nl)]
 +#![feature(linkage)]
@@ -1514,7 +1513,7 @@ diff -uNr 11_exceptions_part1_groundwork/src/lib.rs 12_integrated_testing/src/li
 diff -uNr 11_exceptions_part1_groundwork/src/main.rs 12_integrated_testing/src/main.rs
 --- 11_exceptions_part1_groundwork/src/main.rs
 +++ 12_integrated_testing/src/main.rs
-@@ -6,124 +6,12 @@
+@@ -6,123 +6,12 @@
  #![doc(html_logo_url = "https://git.io/JeGIp")]
 
  //! The `kernel` binary.
@@ -1618,7 +1617,6 @@ diff -uNr 11_exceptions_part1_groundwork/src/main.rs 12_integrated_testing/src/m
 -
 -#![allow(clippy::upper_case_acronyms)]
 -#![allow(incomplete_features)]
--#![feature(const_fn_fn_ptr_basics)]
 -#![feature(core_intrinsics)]
 +
  #![feature(format_args_nl)]
@@ -1641,7 +1639,7 @@ diff -uNr 11_exceptions_part1_groundwork/src/main.rs 12_integrated_testing/src/m
 
  /// Early init code.
  ///
-@@ -134,6 +22,7 @@
+@@ -133,6 +22,7 @@
  ///     - MMU + Data caching must be activated at the earliest. Without it, any atomic operations,
  ///       e.g. the yet-to-be-introduced spinlocks in the device drivers (which currently employ
  ///       NullLocks instead of spinlocks), will fail to work (properly) on the RPi SoCs.
@@ -1649,7 +1647,7 @@ diff -uNr 11_exceptions_part1_groundwork/src/main.rs 12_integrated_testing/src/m
  unsafe fn kernel_init() -> ! {
      use driver::interface::DriverManager;
      use memory::mmu::interface::MMU;
-@@ -160,15 +49,9 @@
+@@ -159,15 +49,9 @@
  fn kernel_main() -> ! {
      use bsp::console::console;
      use console::interface::All;
@@ -1666,7 +1664,7 @@ diff -uNr 11_exceptions_part1_groundwork/src/main.rs 12_integrated_testing/src/m
      info!("Booting on: {}", bsp::board_name());
 
      info!("MMU online. Special regions:");
-@@ -194,31 +77,6 @@
+@@ -193,31 +77,6 @@
          info!("      {}. {}", i + 1, driver.compatible());
      }
 
diff --git a/12_integrated_testing/src/lib.rs b/12_integrated_testing/src/lib.rs
index 036e8e5d0..51f10d7c1 100644
--- a/12_integrated_testing/src/lib.rs
+++ b/12_integrated_testing/src/lib.rs
@@ -108,7 +108,6 @@
 
 #![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
-#![feature(const_fn_fn_ptr_basics)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(linkage)]
diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index d89093df0..4224d8b90 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -2376,7 +2376,7 @@ diff -uNr 12_integrated_testing/src/exception/asynchronous.rs 13_exceptions_part
 +    pub const fn new(number: usize) -> Self {
 +        assert!(number <= MAX_INCLUSIVE);
 +
-+        Self { 0: number }
++        Self(number)
 +    }
 +
 +    /// Return the wrapped number.
@@ -2411,17 +2411,15 @@ diff -uNr 12_integrated_testing/src/exception/asynchronous.rs 13_exceptions_part
 diff -uNr 12_integrated_testing/src/lib.rs 13_exceptions_part2_peripheral_IRQs/src/lib.rs
 --- 12_integrated_testing/src/lib.rs
 +++ 13_exceptions_part2_peripheral_IRQs/src/lib.rs
-@@ -108,7 +108,9 @@
+@@ -108,6 +108,7 @@
 
  #![allow(clippy::upper_case_acronyms)]
  #![allow(incomplete_features)]
 +#![feature(asm_const)]
- #![feature(const_fn_fn_ptr_basics)]
-+#![feature(const_fn_trait_bound)]
  #![feature(core_intrinsics)]
  #![feature(format_args_nl)]
  #![feature(linkage)]
-@@ -131,6 +133,7 @@
+@@ -130,6 +131,7 @@
  pub mod exception;
  pub mod memory;
  pub mod print;
diff --git a/13_exceptions_part2_peripheral_IRQs/src/exception/asynchronous.rs b/13_exceptions_part2_peripheral_IRQs/src/exception/asynchronous.rs
index 0e2835b28..fb1785c23 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/exception/asynchronous.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/exception/asynchronous.rs
@@ -119,7 +119,7 @@ impl<const MAX_INCLUSIVE: usize> IRQNumber<{ MAX_INCLUSIVE }> {
     pub const fn new(number: usize) -> Self {
         assert!(number <= MAX_INCLUSIVE);
 
-        Self { 0: number }
+        Self(number)
     }
 
     /// Return the wrapped number.
diff --git a/13_exceptions_part2_peripheral_IRQs/src/lib.rs b/13_exceptions_part2_peripheral_IRQs/src/lib.rs
index 235aca13f..6133f01ad 100644
--- a/13_exceptions_part2_peripheral_IRQs/src/lib.rs
+++ b/13_exceptions_part2_peripheral_IRQs/src/lib.rs
@@ -109,8 +109,6 @@
 #![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
 #![feature(asm_const)]
-#![feature(const_fn_fn_ptr_basics)]
-#![feature(const_fn_trait_bound)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(linkage)]
diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index ccec183cf..07a82cda9 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -2135,8 +2135,8 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/driver.rs 14_virtual_mem_part2
 diff -uNr 13_exceptions_part2_peripheral_IRQs/src/lib.rs 14_virtual_mem_part2_mmio_remap/src/lib.rs
 --- 13_exceptions_part2_peripheral_IRQs/src/lib.rs
 +++ 14_virtual_mem_part2_mmio_remap/src/lib.rs
-@@ -113,8 +113,10 @@
- #![feature(const_fn_trait_bound)]
+@@ -111,8 +111,10 @@
+ #![feature(asm_const)]
  #![feature(core_intrinsics)]
  #![feature(format_args_nl)]
 +#![feature(generic_const_exprs)]
@@ -2146,7 +2146,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/lib.rs 14_virtual_mem_part2_mm
  #![feature(trait_alias)]
  #![no_std]
  // Testing
-@@ -127,6 +129,7 @@
+@@ -125,6 +127,7 @@
  mod synchronization;
 
  pub mod bsp;
@@ -2154,7 +2154,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/lib.rs 14_virtual_mem_part2_mm
  pub mod console;
  pub mod cpu;
  pub mod driver;
-@@ -179,6 +182,7 @@
+@@ -177,6 +180,7 @@
  #[no_mangle]
  unsafe fn kernel_init() -> ! {
      exception::handling_init();
@@ -2639,7 +2639,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.r
 diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
 --- 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs
 +++ 14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
-@@ -0,0 +1,373 @@
+@@ -0,0 +1,375 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
@@ -2723,7 +2723,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 14_virtual
 +            return Some(self);
 +        }
 +
-+        let delta = (count.abs() as usize).checked_mul(bsp::memory::mmu::KernelGranule::SIZE)?;
++        let delta = count
++            .unsigned_abs()
++            .checked_mul(bsp::memory::mmu::KernelGranule::SIZE)?;
 +        let result = if count.is_positive() {
 +            self.inner.as_usize().checked_add(delta)?
 +        } else {
diff --git a/14_virtual_mem_part2_mmio_remap/src/exception/asynchronous.rs b/14_virtual_mem_part2_mmio_remap/src/exception/asynchronous.rs
index 0e2835b28..fb1785c23 100644
--- a/14_virtual_mem_part2_mmio_remap/src/exception/asynchronous.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/exception/asynchronous.rs
@@ -119,7 +119,7 @@ impl<const MAX_INCLUSIVE: usize> IRQNumber<{ MAX_INCLUSIVE }> {
     pub const fn new(number: usize) -> Self {
         assert!(number <= MAX_INCLUSIVE);
 
-        Self { 0: number }
+        Self(number)
     }
 
     /// Return the wrapped number.
diff --git a/14_virtual_mem_part2_mmio_remap/src/lib.rs b/14_virtual_mem_part2_mmio_remap/src/lib.rs
index 7808f5ba2..9ed0941cc 100644
--- a/14_virtual_mem_part2_mmio_remap/src/lib.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/lib.rs
@@ -109,8 +109,6 @@
 #![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
 #![feature(asm_const)]
-#![feature(const_fn_fn_ptr_basics)]
-#![feature(const_fn_trait_bound)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(generic_const_exprs)]
diff --git a/14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs b/14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
index 842148360..82d5009c6 100644
--- a/14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
@@ -81,7 +81,9 @@ impl<ATYPE: AddressType> PageAddress<ATYPE> {
             return Some(self);
         }
 
-        let delta = (count.abs() as usize).checked_mul(bsp::memory::mmu::KernelGranule::SIZE)?;
+        let delta = count
+            .unsigned_abs()
+            .checked_mul(bsp::memory::mmu::KernelGranule::SIZE)?;
         let result = if count.is_positive() {
             self.inner.as_usize().checked_add(delta)?
         } else {
diff --git a/15_virtual_mem_part3_precomputed_tables/src/exception/asynchronous.rs b/15_virtual_mem_part3_precomputed_tables/src/exception/asynchronous.rs
index 0e2835b28..fb1785c23 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/exception/asynchronous.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/exception/asynchronous.rs
@@ -119,7 +119,7 @@ impl<const MAX_INCLUSIVE: usize> IRQNumber<{ MAX_INCLUSIVE }> {
     pub const fn new(number: usize) -> Self {
         assert!(number <= MAX_INCLUSIVE);
 
-        Self { 0: number }
+        Self(number)
     }
 
     /// Return the wrapped number.
diff --git a/15_virtual_mem_part3_precomputed_tables/src/lib.rs b/15_virtual_mem_part3_precomputed_tables/src/lib.rs
index 7808f5ba2..9ed0941cc 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/lib.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/lib.rs
@@ -109,8 +109,6 @@
 #![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
 #![feature(asm_const)]
-#![feature(const_fn_fn_ptr_basics)]
-#![feature(const_fn_trait_bound)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(generic_const_exprs)]
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs
index 842148360..82d5009c6 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs
@@ -81,7 +81,9 @@ impl<ATYPE: AddressType> PageAddress<ATYPE> {
             return Some(self);
         }
 
-        let delta = (count.abs() as usize).checked_mul(bsp::memory::mmu::KernelGranule::SIZE)?;
+        let delta = count
+            .unsigned_abs()
+            .checked_mul(bsp::memory::mmu::KernelGranule::SIZE)?;
         let result = if count.is_positive() {
             self.inner.as_usize().checked_add(delta)?
         } else {
diff --git a/16_virtual_mem_part4_higher_half_kernel/README.md b/16_virtual_mem_part4_higher_half_kernel/README.md
index 487ce443d..52ca9bfee 100644
--- a/16_virtual_mem_part4_higher_half_kernel/README.md
+++ b/16_virtual_mem_part4_higher_half_kernel/README.md
@@ -799,7 +799,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory.rs
 diff -uNr 15_virtual_mem_part3_precomputed_tables/src/lib.rs 16_virtual_mem_part4_higher_half_kernel/src/lib.rs
 --- 15_virtual_mem_part3_precomputed_tables/src/lib.rs
 +++ 16_virtual_mem_part4_higher_half_kernel/src/lib.rs
-@@ -152,11 +152,6 @@
+@@ -150,11 +150,6 @@
      )
  }
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/exception/asynchronous.rs b/16_virtual_mem_part4_higher_half_kernel/src/exception/asynchronous.rs
index 0e2835b28..fb1785c23 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/exception/asynchronous.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/exception/asynchronous.rs
@@ -119,7 +119,7 @@ impl<const MAX_INCLUSIVE: usize> IRQNumber<{ MAX_INCLUSIVE }> {
     pub const fn new(number: usize) -> Self {
         assert!(number <= MAX_INCLUSIVE);
 
-        Self { 0: number }
+        Self(number)
     }
 
     /// Return the wrapped number.
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/lib.rs b/16_virtual_mem_part4_higher_half_kernel/src/lib.rs
index c15d35eed..76cd3792f 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/lib.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/lib.rs
@@ -109,8 +109,6 @@
 #![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
 #![feature(asm_const)]
-#![feature(const_fn_fn_ptr_basics)]
-#![feature(const_fn_trait_bound)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(generic_const_exprs)]
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/types.rs b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/types.rs
index 43a96a116..b72ece286 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/types.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/types.rs
@@ -86,7 +86,9 @@ impl<ATYPE: AddressType> PageAddress<ATYPE> {
             return Some(self);
         }
 
-        let delta = (count.abs() as usize).checked_mul(bsp::memory::mmu::KernelGranule::SIZE)?;
+        let delta = count
+            .unsigned_abs()
+            .checked_mul(bsp::memory::mmu::KernelGranule::SIZE)?;
         let result = if count.is_positive() {
             self.inner.as_usize().checked_add(delta)?
         } else {
diff --git a/X1_JTAG_boot/jtag_boot_rpi3.img b/X1_JTAG_boot/jtag_boot_rpi3.img
index 14b22a47c71443e49155f7e5c782e9f24bb121bc..a55f8318566fdb849b3c50333105ee4118586b14 100755
GIT binary patch
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R<3D-(S#_Y$t9~}y{!d`^0zv=)

diff --git a/X1_JTAG_boot/src/main.rs b/X1_JTAG_boot/src/main.rs
index 808b3176c..6e6cf9098 100644
--- a/X1_JTAG_boot/src/main.rs
+++ b/X1_JTAG_boot/src/main.rs
@@ -105,7 +105,6 @@
 //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
 #![allow(clippy::upper_case_acronyms)]
-#![feature(const_fn_fn_ptr_basics)]
 #![feature(format_args_nl)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
diff --git a/rust-toolchain.toml b/rust-toolchain.toml
index 19f8449aa..96b65c78d 100644
--- a/rust-toolchain.toml
+++ b/rust-toolchain.toml
@@ -1,4 +1,4 @@
 [toolchain]
-channel = "nightly-2021-12-18"
+channel = "nightly-2022-04-10"
 components = ["llvm-tools-preview"]
 targets = ["aarch64-unknown-none-softfloat"]

From f659eb566af0ff10065492e40daff3091776cfcc Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sun, 10 Apr 2022 12:22:22 +0200
Subject: [PATCH 128/214] Try to fix missing rustfmt in workflows

---
 rust-toolchain.toml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rust-toolchain.toml b/rust-toolchain.toml
index 96b65c78d..a24afec20 100644
--- a/rust-toolchain.toml
+++ b/rust-toolchain.toml
@@ -1,4 +1,4 @@
 [toolchain]
 channel = "nightly-2022-04-10"
-components = ["llvm-tools-preview"]
+components = ["llvm-tools-preview", "rustfmt"]
 targets = ["aarch64-unknown-none-softfloat"]

From d4d8ebe2e00477c2594a2991eab1e9bd644b0522 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sun, 10 Apr 2022 12:26:12 +0200
Subject: [PATCH 129/214] Bump dependencies

---
 02_runtime_init/Cargo.lock                    |   4 ++--
 03_hacky_hello_world/Cargo.lock               |   4 ++--
 04_safe_globals/Cargo.lock                    |   4 ++--
 05_drivers_gpio_uart/Cargo.lock               |   4 ++--
 06_uart_chainloader/Cargo.lock                |   4 ++--
 06_uart_chainloader/demo_payload_rpi3.img     | Bin 7968 -> 7960 bytes
 06_uart_chainloader/demo_payload_rpi4.img     | Bin 7872 -> 7872 bytes
 07_timestamps/Cargo.lock                      |   4 ++--
 08_hw_debug_JTAG/Cargo.lock                   |   4 ++--
 09_privilege_level/Cargo.lock                 |   4 ++--
 .../Cargo.lock                                |   4 ++--
 11_exceptions_part1_groundwork/Cargo.lock     |   4 ++--
 12_integrated_testing/Cargo.lock              |  16 ++++++++--------
 .../Cargo.lock                                |  16 ++++++++--------
 14_virtual_mem_part2_mmio_remap/Cargo.lock    |  16 ++++++++--------
 .../Cargo.lock                                |  16 ++++++++--------
 .../Cargo.lock                                |  16 ++++++++--------
 X1_JTAG_boot/Cargo.lock                       |   4 ++--
 X1_JTAG_boot/jtag_boot_rpi3.img               | Bin 9000 -> 9000 bytes
 X1_JTAG_boot/jtag_boot_rpi4.img               | Bin 7920 -> 7888 bytes
 20 files changed, 62 insertions(+), 62 deletions(-)

diff --git a/02_runtime_init/Cargo.lock b/02_runtime_init/Cargo.lock
index 459f38054..6e58e97aa 100644
--- a/02_runtime_init/Cargo.lock
+++ b/02_runtime_init/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.1.0"
+version = "7.2.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "6d45e46ff04ebb97b52e628261821faba10e190a82130c1467f0a50c21f8b075"
+checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
 dependencies = [
  "tock-registers",
 ]
diff --git a/03_hacky_hello_world/Cargo.lock b/03_hacky_hello_world/Cargo.lock
index 89e08fdbb..9b44f7de2 100644
--- a/03_hacky_hello_world/Cargo.lock
+++ b/03_hacky_hello_world/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.1.0"
+version = "7.2.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "6d45e46ff04ebb97b52e628261821faba10e190a82130c1467f0a50c21f8b075"
+checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
 dependencies = [
  "tock-registers",
 ]
diff --git a/04_safe_globals/Cargo.lock b/04_safe_globals/Cargo.lock
index ad6d3d3f4..c8a669d93 100644
--- a/04_safe_globals/Cargo.lock
+++ b/04_safe_globals/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.1.0"
+version = "7.2.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "6d45e46ff04ebb97b52e628261821faba10e190a82130c1467f0a50c21f8b075"
+checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
 dependencies = [
  "tock-registers",
 ]
diff --git a/05_drivers_gpio_uart/Cargo.lock b/05_drivers_gpio_uart/Cargo.lock
index f99b9384f..caf94f7c2 100644
--- a/05_drivers_gpio_uart/Cargo.lock
+++ b/05_drivers_gpio_uart/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.1.0"
+version = "7.2.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "6d45e46ff04ebb97b52e628261821faba10e190a82130c1467f0a50c21f8b075"
+checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
 dependencies = [
  "tock-registers",
 ]
diff --git a/06_uart_chainloader/Cargo.lock b/06_uart_chainloader/Cargo.lock
index 8894ec378..a92a3ab5a 100644
--- a/06_uart_chainloader/Cargo.lock
+++ b/06_uart_chainloader/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.1.0"
+version = "7.2.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "6d45e46ff04ebb97b52e628261821faba10e190a82130c1467f0a50c21f8b075"
+checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
 dependencies = [
  "tock-registers",
 ]
diff --git a/06_uart_chainloader/demo_payload_rpi3.img b/06_uart_chainloader/demo_payload_rpi3.img
index 1491d9b590d392fb5d5998c3037ed74fc8579c89..b422ad25ac3df2dfa5f0d19917a13ebc15e3944a 100755
GIT binary patch
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delta 1498
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diff --git a/06_uart_chainloader/demo_payload_rpi4.img b/06_uart_chainloader/demo_payload_rpi4.img
index 9f7de6dfbb4dc9afc2d188340fb8a6de00dd6812..173debe6238f9e92465a494719602bded0577b33 100755
GIT binary patch
delta 913
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delta 913
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diff --git a/07_timestamps/Cargo.lock b/07_timestamps/Cargo.lock
index 419159f0b..b14b49bb2 100644
--- a/07_timestamps/Cargo.lock
+++ b/07_timestamps/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.1.0"
+version = "7.2.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "6d45e46ff04ebb97b52e628261821faba10e190a82130c1467f0a50c21f8b075"
+checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
 dependencies = [
  "tock-registers",
 ]
diff --git a/08_hw_debug_JTAG/Cargo.lock b/08_hw_debug_JTAG/Cargo.lock
index 2cbbc3f45..ef4ed8664 100644
--- a/08_hw_debug_JTAG/Cargo.lock
+++ b/08_hw_debug_JTAG/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.1.0"
+version = "7.2.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "6d45e46ff04ebb97b52e628261821faba10e190a82130c1467f0a50c21f8b075"
+checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
 dependencies = [
  "tock-registers",
 ]
diff --git a/09_privilege_level/Cargo.lock b/09_privilege_level/Cargo.lock
index c10e07852..49e377d2c 100644
--- a/09_privilege_level/Cargo.lock
+++ b/09_privilege_level/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.1.0"
+version = "7.2.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "6d45e46ff04ebb97b52e628261821faba10e190a82130c1467f0a50c21f8b075"
+checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
 dependencies = [
  "tock-registers",
 ]
diff --git a/10_virtual_mem_part1_identity_mapping/Cargo.lock b/10_virtual_mem_part1_identity_mapping/Cargo.lock
index 022eb1244..615d5ad8e 100644
--- a/10_virtual_mem_part1_identity_mapping/Cargo.lock
+++ b/10_virtual_mem_part1_identity_mapping/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.1.0"
+version = "7.2.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "6d45e46ff04ebb97b52e628261821faba10e190a82130c1467f0a50c21f8b075"
+checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
 dependencies = [
  "tock-registers",
 ]
diff --git a/11_exceptions_part1_groundwork/Cargo.lock b/11_exceptions_part1_groundwork/Cargo.lock
index a00db8e4c..9eae6c69d 100644
--- a/11_exceptions_part1_groundwork/Cargo.lock
+++ b/11_exceptions_part1_groundwork/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.1.0"
+version = "7.2.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "6d45e46ff04ebb97b52e628261821faba10e190a82130c1467f0a50c21f8b075"
+checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
 dependencies = [
  "tock-registers",
 ]
diff --git a/12_integrated_testing/Cargo.lock b/12_integrated_testing/Cargo.lock
index eac8bcd71..5834e9f3a 100644
--- a/12_integrated_testing/Cargo.lock
+++ b/12_integrated_testing/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.1.0"
+version = "7.2.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "6d45e46ff04ebb97b52e628261821faba10e190a82130c1467f0a50c21f8b075"
+checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
 dependencies = [
  "tock-registers",
 ]
@@ -24,9 +24,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.36"
+version = "1.0.37"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "c7342d5883fbccae1cc37a2353b09c87c9b0f3afd73f5fb9bba687a1f733b029"
+checksum = "ec757218438d5fda206afc041538b2f6d889286160d649a86a24d37e1235afd1"
 dependencies = [
  "unicode-xid",
 ]
@@ -39,18 +39,18 @@ checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
 
 [[package]]
 name = "quote"
-version = "1.0.15"
+version = "1.0.17"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "864d3e96a899863136fc6e99f3d7cae289dafe43bf2c5ac19b70df7210c0a145"
+checksum = "632d02bff7f874a36f33ea8bb416cd484b90cc66c1194b1a1110d067a7013f58"
 dependencies = [
  "proc-macro2",
 ]
 
 [[package]]
 name = "syn"
-version = "1.0.86"
+version = "1.0.91"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "8a65b3f4ffa0092e9887669db0eae07941f023991ab58ea44da8fe8e2d511c6b"
+checksum = "b683b2b825c8eef438b77c36a06dc262294da3d5a5813fac20da149241dcd44d"
 dependencies = [
  "proc-macro2",
  "quote",
diff --git a/13_exceptions_part2_peripheral_IRQs/Cargo.lock b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
index 898e14bcd..8fde49eff 100644
--- a/13_exceptions_part2_peripheral_IRQs/Cargo.lock
+++ b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.1.0"
+version = "7.2.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "6d45e46ff04ebb97b52e628261821faba10e190a82130c1467f0a50c21f8b075"
+checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
 dependencies = [
  "tock-registers",
 ]
@@ -24,9 +24,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.36"
+version = "1.0.37"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "c7342d5883fbccae1cc37a2353b09c87c9b0f3afd73f5fb9bba687a1f733b029"
+checksum = "ec757218438d5fda206afc041538b2f6d889286160d649a86a24d37e1235afd1"
 dependencies = [
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 ]
@@ -39,18 +39,18 @@ checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
 
 [[package]]
 name = "quote"
-version = "1.0.15"
+version = "1.0.17"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "864d3e96a899863136fc6e99f3d7cae289dafe43bf2c5ac19b70df7210c0a145"
+checksum = "632d02bff7f874a36f33ea8bb416cd484b90cc66c1194b1a1110d067a7013f58"
 dependencies = [
  "proc-macro2",
 ]
 
 [[package]]
 name = "syn"
-version = "1.0.86"
+version = "1.0.91"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "8a65b3f4ffa0092e9887669db0eae07941f023991ab58ea44da8fe8e2d511c6b"
+checksum = "b683b2b825c8eef438b77c36a06dc262294da3d5a5813fac20da149241dcd44d"
 dependencies = [
  "proc-macro2",
  "quote",
diff --git a/14_virtual_mem_part2_mmio_remap/Cargo.lock b/14_virtual_mem_part2_mmio_remap/Cargo.lock
index 4cc5a514d..6526767a7 100644
--- a/14_virtual_mem_part2_mmio_remap/Cargo.lock
+++ b/14_virtual_mem_part2_mmio_remap/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.1.0"
+version = "7.2.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "6d45e46ff04ebb97b52e628261821faba10e190a82130c1467f0a50c21f8b075"
+checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
 dependencies = [
  "tock-registers",
 ]
@@ -24,9 +24,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.36"
+version = "1.0.37"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "c7342d5883fbccae1cc37a2353b09c87c9b0f3afd73f5fb9bba687a1f733b029"
+checksum = "ec757218438d5fda206afc041538b2f6d889286160d649a86a24d37e1235afd1"
 dependencies = [
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 ]
@@ -39,18 +39,18 @@ checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
 
 [[package]]
 name = "quote"
-version = "1.0.15"
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-checksum = "864d3e96a899863136fc6e99f3d7cae289dafe43bf2c5ac19b70df7210c0a145"
+checksum = "632d02bff7f874a36f33ea8bb416cd484b90cc66c1194b1a1110d067a7013f58"
 dependencies = [
  "proc-macro2",
 ]
 
 [[package]]
 name = "syn"
-version = "1.0.86"
+version = "1.0.91"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "8a65b3f4ffa0092e9887669db0eae07941f023991ab58ea44da8fe8e2d511c6b"
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 dependencies = [
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diff --git a/15_virtual_mem_part3_precomputed_tables/Cargo.lock b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
index b393d6dc7..9ce8fc76f 100644
--- a/15_virtual_mem_part3_precomputed_tables/Cargo.lock
+++ b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.1.0"
+version = "7.2.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "6d45e46ff04ebb97b52e628261821faba10e190a82130c1467f0a50c21f8b075"
+checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
 dependencies = [
  "tock-registers",
 ]
@@ -24,9 +24,9 @@ dependencies = [
 
 [[package]]
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-version = "1.0.36"
+version = "1.0.37"
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-checksum = "c7342d5883fbccae1cc37a2353b09c87c9b0f3afd73f5fb9bba687a1f733b029"
+checksum = "ec757218438d5fda206afc041538b2f6d889286160d649a86a24d37e1235afd1"
 dependencies = [
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 ]
@@ -39,18 +39,18 @@ checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
 
 [[package]]
 name = "quote"
-version = "1.0.15"
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-checksum = "864d3e96a899863136fc6e99f3d7cae289dafe43bf2c5ac19b70df7210c0a145"
+checksum = "632d02bff7f874a36f33ea8bb416cd484b90cc66c1194b1a1110d067a7013f58"
 dependencies = [
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 [[package]]
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+version = "1.0.91"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "8a65b3f4ffa0092e9887669db0eae07941f023991ab58ea44da8fe8e2d511c6b"
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 dependencies = [
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diff --git a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
index 8310ec059..af4081afc 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
+++ b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.1.0"
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 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "6d45e46ff04ebb97b52e628261821faba10e190a82130c1467f0a50c21f8b075"
+checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
 dependencies = [
  "tock-registers",
 ]
@@ -24,9 +24,9 @@ dependencies = [
 
 [[package]]
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+version = "1.0.37"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "c7342d5883fbccae1cc37a2353b09c87c9b0f3afd73f5fb9bba687a1f733b029"
+checksum = "ec757218438d5fda206afc041538b2f6d889286160d649a86a24d37e1235afd1"
 dependencies = [
  "unicode-xid",
 ]
@@ -39,18 +39,18 @@ checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
 
 [[package]]
 name = "quote"
-version = "1.0.15"
+version = "1.0.17"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "864d3e96a899863136fc6e99f3d7cae289dafe43bf2c5ac19b70df7210c0a145"
+checksum = "632d02bff7f874a36f33ea8bb416cd484b90cc66c1194b1a1110d067a7013f58"
 dependencies = [
  "proc-macro2",
 ]
 
 [[package]]
 name = "syn"
-version = "1.0.86"
+version = "1.0.91"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "8a65b3f4ffa0092e9887669db0eae07941f023991ab58ea44da8fe8e2d511c6b"
+checksum = "b683b2b825c8eef438b77c36a06dc262294da3d5a5813fac20da149241dcd44d"
 dependencies = [
  "proc-macro2",
  "quote",
diff --git a/X1_JTAG_boot/Cargo.lock b/X1_JTAG_boot/Cargo.lock
index 2cbbc3f45..ef4ed8664 100644
--- a/X1_JTAG_boot/Cargo.lock
+++ b/X1_JTAG_boot/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.1.0"
+version = "7.2.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "6d45e46ff04ebb97b52e628261821faba10e190a82130c1467f0a50c21f8b075"
+checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
 dependencies = [
  "tock-registers",
 ]
diff --git a/X1_JTAG_boot/jtag_boot_rpi3.img b/X1_JTAG_boot/jtag_boot_rpi3.img
index a55f8318566fdb849b3c50333105ee4118586b14..584c5a6ef4c2141a22eafa3270aabe16b117ecef 100755
GIT binary patch
delta 1486
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zf{=k&6e8Q0DNUOCG0~qieKWzJ(wDg%uwqh8_ke8~n*xE07)pU!%=Z6fjHCfB?!@l_
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z|3ShN!C3#4zp$%V#7c2B>$Yp!aZNdPJbt*h?}&0(>pl6Dwq4n-EQoxk$j=G9TKk07
zeebjJ-o85RL_R|iT=37$+pGA-D*#U@$^oS-&btCz?}LZ$KzNUc*B5F4pQ!W%^L|Q1
z+#=GBt55jAzpK25)N!kKXT4KM_<xdCh`3GctqJg#ymR3@ZBv5<^+J5m`y!V^%HQ<%
Bk5T{t

delta 1477
zcmah}eM}o=7=PY7=&lr4M_bxb+TKxR?GQA4C|{e+2-{MKnufnLaa0(LFj>4M(|<O)
zm?*)2`sO8KhFPZmv0fErA!zo`2Ad`j6BDz!EHN?1)JS2vnD|v=dp_4YoF6fJlK0;C
zchA@FdEVzPeIR`xHOPVG;&U8Vsg=SE0a#GK1}Y^NWzJ1Vluh#|IqQ|hXLmId)>`WK
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zlf)LP^60mlSArt{#cGntm2vXj;wP1}92XhDMAL+<v20az=lN#JS44Az5WEQ}?3Vil
za)-q{QcLRYW1JGn_g$~R&|#_EhbdCyi4J-UQ_QbeX!aoFgj1Qh7~*V?UJpCx32=)A
zcG(jVQdxW*%eSz*o~PT0M6D0nd|ODWzx-|ahXzh5!)O~J$VE=QHy4xI=+@)B@*28?
z^CQ=F(qp~swAbB{Y@}+4quG!}*$nMaZub!SQbC(t{!ME|x(ggG9v4K*=zg%#p=BFg
zN1KGkKJ$8o)S6D>TO{FiaqR_Wsfi1EnYyr~W2)YxX|q4^kXgc*KjW_Q&de`7$$W_T
zS0480_+o)IIqL&Fng#)W%=T~;gQOxPc~-!i(#cNWV6wBT3d`Jjw?wg_*73~+d3;4=
zSDbBj-BW-!;zwVHOMquq;u@%&>IQo(v5$U=46$<~uDZ$9yf%9tpzSb5)HKaKhgbyh
z29nhaO<|#_VxeLu9fB^p{xVPJk*H~-7qu-ZLXvTCcGG44@J*EuX4Y}(XTu<xdo!=O
zw~d7dqRMTa3}W>H8d@{&7w#!_BaP=iFLXgpFI61?`yDI-2rQurJ6}#e{#~0@0hUGp
zW+YrXA>DTM39ut+C$?)rAZ2W{x_%e-XcNak-C-%t=3D#OxoWpF3U+OhQ?enVWO;(u
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z&cda=c%H<&n#6PA$(1x4sQIHr?*r@i4OdMC{u&|u9TY@%)%PV^5Ph!sT0`Y6Dgb(M
z53ujWhgglYuLUfALyavdN}pt4{IH5*HT8BAd;M%$`l{i6ZjYFRLP*f&-^--~Eao3Q
zY6kzmWVcMOMl)GO&>&+x0bC}wn)-l=aS)3lnwT&ueZW=&>ET{kJ}!&Ljwgo4CPu|!
zdF<p7xl`;EH$)?5wdq+f@phyW^3cQ2C&nh4<P%0@lR17yMR^6E_z!|-M6rqWiLH@C
z_bIL4)Hfrw7ui!jPnq3gP!K)rYVD&AvCe?@kg*@C6WDn0h)Xr!mm7(p3in1<8Vdah
DcnXk6

diff --git a/X1_JTAG_boot/jtag_boot_rpi4.img b/X1_JTAG_boot/jtag_boot_rpi4.img
index c7b3bf0e87b803b7a3e142ad92b2a7bb03b668ca..4ebab5bfd8dac22484d5e9dafb48c6ecc5dd4722 100755
GIT binary patch
delta 1085
zcmah|TS!z<6y4{Zgqi8VjPq(9I#&l9bu=r+pu%u^*(5y>3WFX>1x=cf6haXV1-<CQ
z%Pxfa8Im4%z6#MI3ap3<Dl&TbQE(Lk#|ZpL%O2kLoqL4(YQtrpb<SFQpLNc;V>Pd8
zI(^o0u!m&+mQ5(d%h~f=&0Ml>$b$>UTv5+{$;%{7#Z&x<boNHi4#y&fvAlwU<|?Hu
z9#*u|Ox41mj9dq`6jBW%-LPbmV_ROG)LhkbJMWUEC|;^CfSaR_K#3BgNQ)>MCq;y-
zMvJvA*gmI$E$(?dr%RI58ftNlu>@xGYipV!3ZGp&*#x0?@K4lE4o>Ob>8WAPGL{*&
zs>Usu&${ll0CZZm;u?2!4VMO{mcgXaDBTG5UjP??K`$vgL0hVP|EYIr0KKES-c>|v
zGRSWX?$c_pa{yPaQoJ0WIOjQj==PDw40VL|Zcz4B<CL?|Iz&uuB`B+~#8uCtc+ll6
zZuz9!zf>_baqQV;TmPws%=tU*GpS?C(9)c=B8Jyo^Q3(-eCZ0;1*t$cQ-&Xb(lMoX
zr2(pUQhl9_tRp<VrPNyUnjR+1%<I8EM4D~1b%TR@-6ih$(IrWM*tEWk&f6NtEAA~N
zF`|9tkQtzo<CG`p%rx%Gye9mOL%A`2fd!t3EksPi;ND8y;EBksWcxbHU6tj%ZqGU;
zCEG2jS#b=bc+nGLN$mA><R_y*+}Y|VwarzSkITLO-4AT!a2HpGPjV&u`(KCm2v0lg
zUu-%%5f%<h$RTN7ic`p4+U|u4W2uIIzVn^NLzyA^j4`IYUokzm$uSt9JNqm8(Bb=l
zsX)N}(Pyss#Oi9wg?K-(%$71<3`M6GrQm$|W}yie_|1Gr;6{P*w{NZ^Er2Jd1n9#u
ze~1lY!oRV&G-wLx1?3_tF#QH*1n{oE8?OeP(svpL>yEEjxn8c@l-L-lkXw^&d*ljv
z*MZi<``cuj%|?>{6|4{qDn<Qffz53IBn7sL^>%?Jfvtzc1j7gZ4je1ca8qzIZV$|K
RpAqI~32Hv&N_<fm{sW!pHuwMl

delta 1129
zcmah{T}TvB6h3#Z!tVOR=&Y{$<L;>Bwq>qbQX<8ggh`aPP=pV)5(!o+2oe<0R!|TH
z4yO>R2g8S$t%qX!d$gj+=)uUWhl){%c8#EiRK#>Tvoj0z)Pc*n-^_QubH8)%<kp{C
zhu!uC5CbxQ&lZ)+ZS2+kZZ6n6a^b4+?N+i+a4{j4zzh7OU{{j|iy9bi$}KN%saHa0
zs}$`bQ?)8kQnx`}3-M@b44POD_UE<<E%nLAxz}wKEUYkqdvni0Sx=0Lc&(ywst9t`
zXki<`!NMrpoP1F@A_$>v)Z!9j6PPZJoEZ%&ydbg^gTOTW6-HU45$YI=N5}c0X^jUG
zGqjAoL7U|)VatiA8n-3B>ADLbvh-%v$Y$tVc)QvRONNfz1>#R#9{~mr>F+Sanw8(n
z`iKVbFwg^VwStxm@{~b-)e0g9aN3AyWA*q!sxDgA#Z)jyO_3#oGFOL%PQSgo9z?Ab
zl%3e<+{NzTS*KL_{i`ni2s5?)^u!Iv_=RZV@{_?lQaaY%oGHB<#z)R-VJ?hcoK^eE
zNnngAv(G^}wW^Pd0yG{XeVzR5A)GzZc$0a1&+5#~8$g_)nizR9IHqHO%#nMsM_P}2
zOME3yPc`)dY|1Kz=wj?o@m$INH8oWDi$h|9n#@yPpkZp<nRrcjk;6J;{{mM^f({ok
z4a;lmu(mWPAEQCsX6Btv>tb3Gl=PUOrmevo#i7ywOXIcD6UCu05Vt^`qqZ4^2K2i;
zJ6jy&`7l>z&vRvF<zLSa2xmRVt1Zt#Gq;AwGu6Db=7Kj}zw)!jjf}%(v7$~N&ET()
zkhwpJ+go?bZJq5M!5aB^Z~qY)M?GauVy(DMcBxe%;e;o^wqV-RQ8{TT(NoC8I}6h@
z&qU0FUEVRg;?FBP;5B8k$0;Vl23q*p?XAp^;}*l6K>#}_`>j1-fv4FKkxY$F38S7`
z@1);^npODG!Zx1`H~PD9#VZM;J}maNovD!z4;&xr>z5r42TA_#+*6hh<A6rYTQe~G
d0kCp&XE%R?!@`1v^DUg6Lo(&-WO&an{{hRuGbaE5


From 0b449706f3a0c3bbd115f1a3e6844e5fc0459ee0 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sun, 10 Apr 2022 22:08:43 +0200
Subject: [PATCH 130/214] Move test-features activation to Cargo.toml

---
 12_integrated_testing/Cargo.lock              |  1 +
 12_integrated_testing/Cargo.toml              |  7 +++++++
 12_integrated_testing/Makefile                |  4 +---
 12_integrated_testing/README.md               | 19 +++++++++++--------
 .../Cargo.lock                                |  1 +
 .../Cargo.toml                                |  7 +++++++
 13_exceptions_part2_peripheral_IRQs/Makefile  |  2 --
 13_exceptions_part2_peripheral_IRQs/README.md | 13 -------------
 14_virtual_mem_part2_mmio_remap/Cargo.lock    |  1 +
 14_virtual_mem_part2_mmio_remap/Cargo.toml    |  7 +++++++
 14_virtual_mem_part2_mmio_remap/Makefile      |  2 --
 .../Cargo.lock                                |  1 +
 .../Cargo.toml                                |  7 +++++++
 .../Makefile                                  |  2 --
 .../Cargo.lock                                |  1 +
 .../Cargo.toml                                |  7 +++++++
 .../Makefile                                  |  2 --
 17 files changed, 52 insertions(+), 32 deletions(-)

diff --git a/12_integrated_testing/Cargo.lock b/12_integrated_testing/Cargo.lock
index 5834e9f3a..d34ce1348 100644
--- a/12_integrated_testing/Cargo.lock
+++ b/12_integrated_testing/Cargo.lock
@@ -16,6 +16,7 @@ name = "mingo"
 version = "0.12.0"
 dependencies = [
  "cortex-a",
+ "mingo",
  "qemu-exit",
  "test-macros",
  "test-types",
diff --git a/12_integrated_testing/Cargo.toml b/12_integrated_testing/Cargo.toml
index e768e6787..3e4b2a8a7 100644
--- a/12_integrated_testing/Cargo.toml
+++ b/12_integrated_testing/Cargo.toml
@@ -35,6 +35,13 @@ cortex-a = { version = "7.x.x" }
 [dev-dependencies]
 test-macros = { path = "test-macros" }
 
+# The following line is a workaround, as suggested in [1], to enable a feature in test-builds only.
+# This allows building the library part of the kernel with specialized code for testing.
+#
+#
+# [1] https://github.com/rust-lang/cargo/issues/2911#issuecomment-749580481
+mingo = { path = ".", features = ["test_build"] }
+
 # Unit tests are done in the library part of the kernel.
 [lib]
 name = "libkernel"
diff --git a/12_integrated_testing/Makefile b/12_integrated_testing/Makefile
index 872de5a5d..e9ed2d277 100644
--- a/12_integrated_testing/Makefile
+++ b/12_integrated_testing/Makefile
@@ -284,15 +284,13 @@ define test_prepare
     @chmod +x target/kernel_test_runner.sh
 endef
 
-test_unit test_integration: FEATURES += --features test_build
-
 ##------------------------------------------------------------------------------
 ## Run unit test(s)
 ##------------------------------------------------------------------------------
 test_unit:
 	$(call colorecho, "\nCompiling unit test(s) - $(BSP)")
 	$(call test_prepare)
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) --lib
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) --lib
 
 ##------------------------------------------------------------------------------
 ## Run integration test(s)
diff --git a/12_integrated_testing/README.md b/12_integrated_testing/README.md
index fddd4be5a..698ad1b0a 100644
--- a/12_integrated_testing/README.md
+++ b/12_integrated_testing/README.md
@@ -324,7 +324,7 @@ pub fn qemu_exit_success() -> ! {
 [Click here] in case you are interested in the implementation. Note that for the functions to work,
 the `-semihosting` flag must be added to the `QEMU` invocation.
 
-You might have also noted the `#[cfg(feature = "test_build")]`. In the `Makefile`, we ensure that
+You might have also noted the `#[cfg(feature = "test_build")]`. In `Cargo.toml`, we ensure that
 this feature is only enabled when `cargo test` runs. This way, it is ensured that testing-specific
 code is conditionally compiled only for testing.
 
@@ -411,8 +411,6 @@ define test_prepare
     @chmod +x target/kernel_test_runner.sh
 endef
 
-test_unit test_integration: FEATURES += --features test_build
-
 ##------------------------------------------------------------------------------
 ## Run unit test(s)
 ##------------------------------------------------------------------------------
@@ -912,7 +910,7 @@ diff -uNr 11_exceptions_part1_groundwork/Cargo.toml 12_integrated_testing/Cargo.
  authors = ["Andre Richter <andre.o.richter@gmail.com>"]
  edition = "2021"
 
-@@ -11,20 +11,50 @@
+@@ -11,20 +11,57 @@
  default = []
  bsp_rpi3 = ["tock-registers"]
  bsp_rpi4 = ["tock-registers"]
@@ -944,6 +942,13 @@ diff -uNr 11_exceptions_part1_groundwork/Cargo.toml 12_integrated_testing/Cargo.
 +[dev-dependencies]
 +test-macros = { path = "test-macros" }
 +
++# The following line is a workaround, as suggested in [1], to enable a feature in test-builds only.
++# This allows building the library part of the kernel with specialized code for testing.
++#
++#
++# [1] https://github.com/rust-lang/cargo/issues/2911#issuecomment-749580481
++mingo = { path = ".", features = ["test_build"] }
++
 +# Unit tests are done in the library part of the kernel.
 +[lib]
 +name = "libkernel"
@@ -1023,7 +1028,7 @@ diff -uNr 11_exceptions_part1_groundwork/Makefile 12_integrated_testing/Makefile
  	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
 
  else # QEMU is supported.
-@@ -253,6 +263,45 @@
+@@ -253,6 +263,43 @@
  	$(call colorecho, "\nBoot test - $(BSP)")
  	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
@@ -1049,15 +1054,13 @@ diff -uNr 11_exceptions_part1_groundwork/Makefile 12_integrated_testing/Makefile
 +    @chmod +x target/kernel_test_runner.sh
 +endef
 +
-+test_unit test_integration: FEATURES += --features test_build
-+
 +##------------------------------------------------------------------------------
 +## Run unit test(s)
 +##------------------------------------------------------------------------------
 +test_unit:
 +	$(call colorecho, "\nCompiling unit test(s) - $(BSP)")
 +	$(call test_prepare)
-+	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) --lib
++	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) --lib
 +
 +##------------------------------------------------------------------------------
 +## Run integration test(s)
diff --git a/13_exceptions_part2_peripheral_IRQs/Cargo.lock b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
index 8fde49eff..ba1b9013c 100644
--- a/13_exceptions_part2_peripheral_IRQs/Cargo.lock
+++ b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
@@ -16,6 +16,7 @@ name = "mingo"
 version = "0.13.0"
 dependencies = [
  "cortex-a",
+ "mingo",
  "qemu-exit",
  "test-macros",
  "test-types",
diff --git a/13_exceptions_part2_peripheral_IRQs/Cargo.toml b/13_exceptions_part2_peripheral_IRQs/Cargo.toml
index 7ef558318..a1a3bfbf4 100644
--- a/13_exceptions_part2_peripheral_IRQs/Cargo.toml
+++ b/13_exceptions_part2_peripheral_IRQs/Cargo.toml
@@ -35,6 +35,13 @@ cortex-a = { version = "7.x.x" }
 [dev-dependencies]
 test-macros = { path = "test-macros" }
 
+# The following line is a workaround, as suggested in [1], to enable a feature in test-builds only.
+# This allows building the library part of the kernel with specialized code for testing.
+#
+#
+# [1] https://github.com/rust-lang/cargo/issues/2911#issuecomment-749580481
+mingo = { path = ".", features = ["test_build"] }
+
 # Unit tests are done in the library part of the kernel.
 [lib]
 name = "libkernel"
diff --git a/13_exceptions_part2_peripheral_IRQs/Makefile b/13_exceptions_part2_peripheral_IRQs/Makefile
index 72ae3c36a..e9ed2d277 100644
--- a/13_exceptions_part2_peripheral_IRQs/Makefile
+++ b/13_exceptions_part2_peripheral_IRQs/Makefile
@@ -284,8 +284,6 @@ define test_prepare
     @chmod +x target/kernel_test_runner.sh
 endef
 
-test_unit test_integration: FEATURES += --features test_build
-
 ##------------------------------------------------------------------------------
 ## Run unit test(s)
 ##------------------------------------------------------------------------------
diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index 4224d8b90..eefe4b7eb 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -758,19 +758,6 @@ diff -uNr 12_integrated_testing/Cargo.toml 13_exceptions_part2_peripheral_IRQs/C
  edition = "2021"
 
 
-diff -uNr 12_integrated_testing/Makefile 13_exceptions_part2_peripheral_IRQs/Makefile
---- 12_integrated_testing/Makefile
-+++ 13_exceptions_part2_peripheral_IRQs/Makefile
-@@ -292,7 +292,7 @@
- test_unit:
- 	$(call colorecho, "\nCompiling unit test(s) - $(BSP)")
- 	$(call test_prepare)
--	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) --lib
-+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) --lib
-
- ##------------------------------------------------------------------------------
- ## Run integration test(s)
-
 diff -uNr 12_integrated_testing/src/_arch/aarch64/cpu/smp.rs 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs
 --- 12_integrated_testing/src/_arch/aarch64/cpu/smp.rs
 +++ 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs
diff --git a/14_virtual_mem_part2_mmio_remap/Cargo.lock b/14_virtual_mem_part2_mmio_remap/Cargo.lock
index 6526767a7..ab4eda716 100644
--- a/14_virtual_mem_part2_mmio_remap/Cargo.lock
+++ b/14_virtual_mem_part2_mmio_remap/Cargo.lock
@@ -16,6 +16,7 @@ name = "mingo"
 version = "0.14.0"
 dependencies = [
  "cortex-a",
+ "mingo",
  "qemu-exit",
  "test-macros",
  "test-types",
diff --git a/14_virtual_mem_part2_mmio_remap/Cargo.toml b/14_virtual_mem_part2_mmio_remap/Cargo.toml
index 3146ad05f..130d80f7d 100644
--- a/14_virtual_mem_part2_mmio_remap/Cargo.toml
+++ b/14_virtual_mem_part2_mmio_remap/Cargo.toml
@@ -35,6 +35,13 @@ cortex-a = { version = "7.x.x" }
 [dev-dependencies]
 test-macros = { path = "test-macros" }
 
+# The following line is a workaround, as suggested in [1], to enable a feature in test-builds only.
+# This allows building the library part of the kernel with specialized code for testing.
+#
+#
+# [1] https://github.com/rust-lang/cargo/issues/2911#issuecomment-749580481
+mingo = { path = ".", features = ["test_build"] }
+
 # Unit tests are done in the library part of the kernel.
 [lib]
 name = "libkernel"
diff --git a/14_virtual_mem_part2_mmio_remap/Makefile b/14_virtual_mem_part2_mmio_remap/Makefile
index 72ae3c36a..e9ed2d277 100644
--- a/14_virtual_mem_part2_mmio_remap/Makefile
+++ b/14_virtual_mem_part2_mmio_remap/Makefile
@@ -284,8 +284,6 @@ define test_prepare
     @chmod +x target/kernel_test_runner.sh
 endef
 
-test_unit test_integration: FEATURES += --features test_build
-
 ##------------------------------------------------------------------------------
 ## Run unit test(s)
 ##------------------------------------------------------------------------------
diff --git a/15_virtual_mem_part3_precomputed_tables/Cargo.lock b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
index 9ce8fc76f..29683180a 100644
--- a/15_virtual_mem_part3_precomputed_tables/Cargo.lock
+++ b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
@@ -16,6 +16,7 @@ name = "mingo"
 version = "0.15.0"
 dependencies = [
  "cortex-a",
+ "mingo",
  "qemu-exit",
  "test-macros",
  "test-types",
diff --git a/15_virtual_mem_part3_precomputed_tables/Cargo.toml b/15_virtual_mem_part3_precomputed_tables/Cargo.toml
index 6a41bd03d..1c39f36f3 100644
--- a/15_virtual_mem_part3_precomputed_tables/Cargo.toml
+++ b/15_virtual_mem_part3_precomputed_tables/Cargo.toml
@@ -35,6 +35,13 @@ cortex-a = { version = "7.x.x" }
 [dev-dependencies]
 test-macros = { path = "test-macros" }
 
+# The following line is a workaround, as suggested in [1], to enable a feature in test-builds only.
+# This allows building the library part of the kernel with specialized code for testing.
+#
+#
+# [1] https://github.com/rust-lang/cargo/issues/2911#issuecomment-749580481
+mingo = { path = ".", features = ["test_build"] }
+
 # Unit tests are done in the library part of the kernel.
 [lib]
 name = "libkernel"
diff --git a/15_virtual_mem_part3_precomputed_tables/Makefile b/15_virtual_mem_part3_precomputed_tables/Makefile
index 385c003ca..513f3dc1f 100644
--- a/15_virtual_mem_part3_precomputed_tables/Makefile
+++ b/15_virtual_mem_part3_precomputed_tables/Makefile
@@ -287,8 +287,6 @@ define test_prepare
     @chmod +x target/kernel_test_runner.sh
 endef
 
-test_unit test_integration: FEATURES += --features test_build
-
 ##------------------------------------------------------------------------------
 ## Run unit test(s)
 ##------------------------------------------------------------------------------
diff --git a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
index af4081afc..a17668285 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
+++ b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
@@ -16,6 +16,7 @@ name = "mingo"
 version = "0.16.0"
 dependencies = [
  "cortex-a",
+ "mingo",
  "qemu-exit",
  "test-macros",
  "test-types",
diff --git a/16_virtual_mem_part4_higher_half_kernel/Cargo.toml b/16_virtual_mem_part4_higher_half_kernel/Cargo.toml
index 4964df472..34f5090d1 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Cargo.toml
+++ b/16_virtual_mem_part4_higher_half_kernel/Cargo.toml
@@ -35,6 +35,13 @@ cortex-a = { version = "7.x.x" }
 [dev-dependencies]
 test-macros = { path = "test-macros" }
 
+# The following line is a workaround, as suggested in [1], to enable a feature in test-builds only.
+# This allows building the library part of the kernel with specialized code for testing.
+#
+#
+# [1] https://github.com/rust-lang/cargo/issues/2911#issuecomment-749580481
+mingo = { path = ".", features = ["test_build"] }
+
 # Unit tests are done in the library part of the kernel.
 [lib]
 name = "libkernel"
diff --git a/16_virtual_mem_part4_higher_half_kernel/Makefile b/16_virtual_mem_part4_higher_half_kernel/Makefile
index 385c003ca..513f3dc1f 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Makefile
+++ b/16_virtual_mem_part4_higher_half_kernel/Makefile
@@ -287,8 +287,6 @@ define test_prepare
     @chmod +x target/kernel_test_runner.sh
 endef
 
-test_unit test_integration: FEATURES += --features test_build
-
 ##------------------------------------------------------------------------------
 ## Run unit test(s)
 ##------------------------------------------------------------------------------

From cb4ae40ac2b86edeaac95b104b655671756dc897 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 11 Apr 2022 22:24:18 +0200
Subject: [PATCH 131/214] Linker: Provide LD script folder via cmdline

This enables shorter relative paths for ld-internal INCLUDE, which adds more
flexibility wrt to directory structure.
---
 01_wait_forever/Makefile                      | 29 ++++++++++++-------
 01_wait_forever/build.rs                      | 17 ++++++++---
 02_runtime_init/Makefile                      | 29 ++++++++++++-------
 02_runtime_init/README.md                     |  2 +-
 02_runtime_init/build.rs                      | 17 ++++++++---
 03_hacky_hello_world/Makefile                 | 29 ++++++++++++-------
 03_hacky_hello_world/README.md                |  4 +--
 03_hacky_hello_world/build.rs                 | 17 ++++++++---
 04_safe_globals/Makefile                      | 29 ++++++++++++-------
 04_safe_globals/build.rs                      | 17 ++++++++---
 05_drivers_gpio_uart/Makefile                 | 29 ++++++++++++-------
 05_drivers_gpio_uart/README.md                |  6 ++--
 05_drivers_gpio_uart/build.rs                 | 17 ++++++++---
 06_uart_chainloader/Makefile                  | 29 ++++++++++++-------
 06_uart_chainloader/README.md                 | 26 ++++++++---------
 06_uart_chainloader/build.rs                  | 17 ++++++++---
 07_timestamps/Makefile                        | 29 ++++++++++++-------
 07_timestamps/README.md                       | 26 ++++++++---------
 07_timestamps/build.rs                        | 17 ++++++++---
 08_hw_debug_JTAG/Makefile                     | 29 ++++++++++++-------
 08_hw_debug_JTAG/README.md                    |  8 ++---
 08_hw_debug_JTAG/build.rs                     | 17 ++++++++---
 09_privilege_level/Makefile                   | 29 ++++++++++++-------
 09_privilege_level/build.rs                   | 17 ++++++++---
 .../Makefile                                  | 29 ++++++++++++-------
 .../build.rs                                  | 17 ++++++++---
 11_exceptions_part1_groundwork/Makefile       | 29 ++++++++++++-------
 11_exceptions_part1_groundwork/build.rs       | 17 ++++++++---
 12_integrated_testing/Makefile                | 29 ++++++++++++-------
 12_integrated_testing/README.md               |  6 ++--
 12_integrated_testing/build.rs                | 17 ++++++++---
 13_exceptions_part2_peripheral_IRQs/Makefile  | 29 ++++++++++++-------
 13_exceptions_part2_peripheral_IRQs/build.rs  | 17 ++++++++---
 14_virtual_mem_part2_mmio_remap/Makefile      | 29 ++++++++++++-------
 14_virtual_mem_part2_mmio_remap/build.rs      | 17 ++++++++---
 .../Makefile                                  | 29 ++++++++++++-------
 .../README.md                                 |  8 ++---
 .../build.rs                                  | 17 ++++++++---
 .../src/bsp/raspberrypi/link.ld               |  2 +-
 .../Makefile                                  | 29 ++++++++++++-------
 .../build.rs                                  | 17 ++++++++---
 .../src/bsp/raspberrypi/link.ld               |  2 +-
 X1_JTAG_boot/Makefile                         | 29 ++++++++++++-------
 X1_JTAG_boot/build.rs                         | 17 ++++++++---
 44 files changed, 587 insertions(+), 285 deletions(-)

diff --git a/01_wait_forever/Makefile b/01_wait_forever/Makefile
index 4228b06ea..2f7010758 100644
--- a/01_wait_forever/Makefile
+++ b/01_wait_forever/Makefile
@@ -15,10 +15,10 @@ BSP ?= rpi3
 
 
 ##--------------------------------------------------------------------------------------------------
-## Hardcoded configuration values
+## BSP-specific configuration values
 ##--------------------------------------------------------------------------------------------------
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
 
-# BSP-specific arguments.
 ifeq ($(BSP),rpi3)
     TARGET            = aarch64-unknown-none-softfloat
     KERNEL_BIN        = kernel8.img
@@ -28,7 +28,7 @@ ifeq ($(BSP),rpi3)
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
     READELF_BINARY    = aarch64-none-elf-readelf
-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+    LD_SCRIPT_PATH    = src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -39,24 +39,33 @@ else ifeq ($(BSP),rpi4)
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
     READELF_BINARY    = aarch64-none-elf-readelf
-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+    LD_SCRIPT_PATH    = src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
-QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
-
 # Export for build.rs.
-export LINKER_FILE
+export LD_SCRIPT_PATH
+
 
-KERNEL_ELF = target/$(TARGET)/release/kernel
+
+##--------------------------------------------------------------------------------------------------
+## Generic configuration values
+##--------------------------------------------------------------------------------------------------
+KERNEL_LINKER_SCRIPT = link.ld
+KERNEL_ELF           = target/$(TARGET)/release/kernel
 
 
 
 ##--------------------------------------------------------------------------------------------------
 ## Command building blocks
 ##--------------------------------------------------------------------------------------------------
-RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
-RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
+RUSTFLAGS = $(RUSTC_MISC_ARGS)                   \
+    -C link-arg=--library-path=$(LD_SCRIPT_PATH) \
+    -C link-arg=--script=$(KERNEL_LINKER_SCRIPT)
+
+RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) \
+    -D warnings                   \
+    -D missing_docs
 
 FEATURES      = --features bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
diff --git a/01_wait_forever/build.rs b/01_wait_forever/build.rs
index 883c59556..f53b99494 100644
--- a/01_wait_forever/build.rs
+++ b/01_wait_forever/build.rs
@@ -1,8 +1,17 @@
-use std::env;
+use std::{env, fs};
 
 fn main() {
-    let linker_file = env::var("LINKER_FILE").unwrap_or_default();
+    let ld_script_path = env::var("LD_SCRIPT_PATH").unwrap_or_default();
 
-    println!("cargo:rerun-if-changed={}", linker_file);
-    println!("cargo:rerun-if-changed=build.rs");
+    let files = fs::read_dir(ld_script_path).unwrap();
+    files
+        .filter_map(Result::ok)
+        .filter(|d| {
+            if let Some(e) = d.path().extension() {
+                e == "ld"
+            } else {
+                false
+            }
+        })
+        .for_each(|f| println!("cargo:rerun-if-changed={}", f.path().display()));
 }
diff --git a/02_runtime_init/Makefile b/02_runtime_init/Makefile
index c66931df6..1daff4d63 100644
--- a/02_runtime_init/Makefile
+++ b/02_runtime_init/Makefile
@@ -15,10 +15,10 @@ BSP ?= rpi3
 
 
 ##--------------------------------------------------------------------------------------------------
-## Hardcoded configuration values
+## BSP-specific configuration values
 ##--------------------------------------------------------------------------------------------------
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
 
-# BSP-specific arguments.
 ifeq ($(BSP),rpi3)
     TARGET            = aarch64-unknown-none-softfloat
     KERNEL_BIN        = kernel8.img
@@ -28,7 +28,7 @@ ifeq ($(BSP),rpi3)
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
     READELF_BINARY    = aarch64-none-elf-readelf
-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+    LD_SCRIPT_PATH    = src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -39,24 +39,33 @@ else ifeq ($(BSP),rpi4)
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
     READELF_BINARY    = aarch64-none-elf-readelf
-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+    LD_SCRIPT_PATH    = src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
-QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
-
 # Export for build.rs.
-export LINKER_FILE
+export LD_SCRIPT_PATH
+
 
-KERNEL_ELF = target/$(TARGET)/release/kernel
+
+##--------------------------------------------------------------------------------------------------
+## Generic configuration values
+##--------------------------------------------------------------------------------------------------
+KERNEL_LINKER_SCRIPT = link.ld
+KERNEL_ELF           = target/$(TARGET)/release/kernel
 
 
 
 ##--------------------------------------------------------------------------------------------------
 ## Command building blocks
 ##--------------------------------------------------------------------------------------------------
-RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
-RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
+RUSTFLAGS = $(RUSTC_MISC_ARGS)                   \
+    -C link-arg=--library-path=$(LD_SCRIPT_PATH) \
+    -C link-arg=--script=$(KERNEL_LINKER_SCRIPT)
+
+RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) \
+    -D warnings                   \
+    -D missing_docs
 
 FEATURES      = --features bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
diff --git a/02_runtime_init/README.md b/02_runtime_init/README.md
index 221113efd..8b2c8ece9 100644
--- a/02_runtime_init/README.md
+++ b/02_runtime_init/README.md
@@ -52,7 +52,7 @@ diff -uNr 01_wait_forever/Cargo.toml 02_runtime_init/Cargo.toml
 diff -uNr 01_wait_forever/Makefile 02_runtime_init/Makefile
 --- 01_wait_forever/Makefile
 +++ 02_runtime_init/Makefile
-@@ -153,6 +153,8 @@
+@@ -162,6 +162,8 @@
  	$(call colorecho, "\nLaunching objdump")
  	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                  --section .text   \
diff --git a/02_runtime_init/build.rs b/02_runtime_init/build.rs
index 883c59556..f53b99494 100644
--- a/02_runtime_init/build.rs
+++ b/02_runtime_init/build.rs
@@ -1,8 +1,17 @@
-use std::env;
+use std::{env, fs};
 
 fn main() {
-    let linker_file = env::var("LINKER_FILE").unwrap_or_default();
+    let ld_script_path = env::var("LD_SCRIPT_PATH").unwrap_or_default();
 
-    println!("cargo:rerun-if-changed={}", linker_file);
-    println!("cargo:rerun-if-changed=build.rs");
+    let files = fs::read_dir(ld_script_path).unwrap();
+    files
+        .filter_map(Result::ok)
+        .filter(|d| {
+            if let Some(e) = d.path().extension() {
+                e == "ld"
+            } else {
+                false
+            }
+        })
+        .for_each(|f| println!("cargo:rerun-if-changed={}", f.path().display()));
 }
diff --git a/03_hacky_hello_world/Makefile b/03_hacky_hello_world/Makefile
index d64f1dccf..dfad06c5d 100644
--- a/03_hacky_hello_world/Makefile
+++ b/03_hacky_hello_world/Makefile
@@ -15,10 +15,10 @@ BSP ?= rpi3
 
 
 ##--------------------------------------------------------------------------------------------------
-## Hardcoded configuration values
+## BSP-specific configuration values
 ##--------------------------------------------------------------------------------------------------
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
 
-# BSP-specific arguments.
 ifeq ($(BSP),rpi3)
     TARGET            = aarch64-unknown-none-softfloat
     KERNEL_BIN        = kernel8.img
@@ -28,7 +28,7 @@ ifeq ($(BSP),rpi3)
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
     READELF_BINARY    = aarch64-none-elf-readelf
-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+    LD_SCRIPT_PATH    = src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -39,24 +39,33 @@ else ifeq ($(BSP),rpi4)
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
     READELF_BINARY    = aarch64-none-elf-readelf
-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+    LD_SCRIPT_PATH    = src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
-QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
-
 # Export for build.rs.
-export LINKER_FILE
+export LD_SCRIPT_PATH
+
 
-KERNEL_ELF = target/$(TARGET)/release/kernel
+
+##--------------------------------------------------------------------------------------------------
+## Generic configuration values
+##--------------------------------------------------------------------------------------------------
+KERNEL_LINKER_SCRIPT = link.ld
+KERNEL_ELF           = target/$(TARGET)/release/kernel
 
 
 
 ##--------------------------------------------------------------------------------------------------
 ## Command building blocks
 ##--------------------------------------------------------------------------------------------------
-RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
-RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
+RUSTFLAGS = $(RUSTC_MISC_ARGS)                   \
+    -C link-arg=--library-path=$(LD_SCRIPT_PATH) \
+    -C link-arg=--script=$(KERNEL_LINKER_SCRIPT)
+
+RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) \
+    -D warnings                   \
+    -D missing_docs
 
 FEATURES      = --features bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
diff --git a/03_hacky_hello_world/README.md b/03_hacky_hello_world/README.md
index b0cfee129..2614a4d71 100644
--- a/03_hacky_hello_world/README.md
+++ b/03_hacky_hello_world/README.md
@@ -70,7 +70,7 @@ diff -uNr 02_runtime_init/Makefile 03_hacky_hello_world/Makefile
      OBJDUMP_BINARY    = aarch64-none-elf-objdump
      NM_BINARY         = aarch64-none-elf-nm
      READELF_BINARY    = aarch64-none-elf-readelf
-@@ -71,17 +71,20 @@
+@@ -80,17 +80,20 @@
      --strip-all            \
      -O binary
 
@@ -94,7 +94,7 @@ diff -uNr 02_runtime_init/Makefile 03_hacky_hello_world/Makefile
 
 
 
-@@ -169,3 +172,28 @@
+@@ -178,3 +181,28 @@
  ##------------------------------------------------------------------------------
  check:
  	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
diff --git a/03_hacky_hello_world/build.rs b/03_hacky_hello_world/build.rs
index 883c59556..f53b99494 100644
--- a/03_hacky_hello_world/build.rs
+++ b/03_hacky_hello_world/build.rs
@@ -1,8 +1,17 @@
-use std::env;
+use std::{env, fs};
 
 fn main() {
-    let linker_file = env::var("LINKER_FILE").unwrap_or_default();
+    let ld_script_path = env::var("LD_SCRIPT_PATH").unwrap_or_default();
 
-    println!("cargo:rerun-if-changed={}", linker_file);
-    println!("cargo:rerun-if-changed=build.rs");
+    let files = fs::read_dir(ld_script_path).unwrap();
+    files
+        .filter_map(Result::ok)
+        .filter(|d| {
+            if let Some(e) = d.path().extension() {
+                e == "ld"
+            } else {
+                false
+            }
+        })
+        .for_each(|f| println!("cargo:rerun-if-changed={}", f.path().display()));
 }
diff --git a/04_safe_globals/Makefile b/04_safe_globals/Makefile
index d64f1dccf..dfad06c5d 100644
--- a/04_safe_globals/Makefile
+++ b/04_safe_globals/Makefile
@@ -15,10 +15,10 @@ BSP ?= rpi3
 
 
 ##--------------------------------------------------------------------------------------------------
-## Hardcoded configuration values
+## BSP-specific configuration values
 ##--------------------------------------------------------------------------------------------------
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
 
-# BSP-specific arguments.
 ifeq ($(BSP),rpi3)
     TARGET            = aarch64-unknown-none-softfloat
     KERNEL_BIN        = kernel8.img
@@ -28,7 +28,7 @@ ifeq ($(BSP),rpi3)
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
     READELF_BINARY    = aarch64-none-elf-readelf
-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+    LD_SCRIPT_PATH    = src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -39,24 +39,33 @@ else ifeq ($(BSP),rpi4)
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
     READELF_BINARY    = aarch64-none-elf-readelf
-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+    LD_SCRIPT_PATH    = src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
-QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
-
 # Export for build.rs.
-export LINKER_FILE
+export LD_SCRIPT_PATH
+
 
-KERNEL_ELF = target/$(TARGET)/release/kernel
+
+##--------------------------------------------------------------------------------------------------
+## Generic configuration values
+##--------------------------------------------------------------------------------------------------
+KERNEL_LINKER_SCRIPT = link.ld
+KERNEL_ELF           = target/$(TARGET)/release/kernel
 
 
 
 ##--------------------------------------------------------------------------------------------------
 ## Command building blocks
 ##--------------------------------------------------------------------------------------------------
-RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
-RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
+RUSTFLAGS = $(RUSTC_MISC_ARGS)                   \
+    -C link-arg=--library-path=$(LD_SCRIPT_PATH) \
+    -C link-arg=--script=$(KERNEL_LINKER_SCRIPT)
+
+RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) \
+    -D warnings                   \
+    -D missing_docs
 
 FEATURES      = --features bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
diff --git a/04_safe_globals/build.rs b/04_safe_globals/build.rs
index 883c59556..f53b99494 100644
--- a/04_safe_globals/build.rs
+++ b/04_safe_globals/build.rs
@@ -1,8 +1,17 @@
-use std::env;
+use std::{env, fs};
 
 fn main() {
-    let linker_file = env::var("LINKER_FILE").unwrap_or_default();
+    let ld_script_path = env::var("LD_SCRIPT_PATH").unwrap_or_default();
 
-    println!("cargo:rerun-if-changed={}", linker_file);
-    println!("cargo:rerun-if-changed=build.rs");
+    let files = fs::read_dir(ld_script_path).unwrap();
+    files
+        .filter_map(Result::ok)
+        .filter(|d| {
+            if let Some(e) = d.path().extension() {
+                e == "ld"
+            } else {
+                false
+            }
+        })
+        .for_each(|f| println!("cargo:rerun-if-changed={}", f.path().display()));
 }
diff --git a/05_drivers_gpio_uart/Makefile b/05_drivers_gpio_uart/Makefile
index 518a1d5f0..78fd8d2f6 100644
--- a/05_drivers_gpio_uart/Makefile
+++ b/05_drivers_gpio_uart/Makefile
@@ -18,10 +18,10 @@ DEV_SERIAL ?= /dev/ttyUSB0
 
 
 ##--------------------------------------------------------------------------------------------------
-## Hardcoded configuration values
+## BSP-specific configuration values
 ##--------------------------------------------------------------------------------------------------
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
 
-# BSP-specific arguments.
 ifeq ($(BSP),rpi3)
     TARGET            = aarch64-unknown-none-softfloat
     KERNEL_BIN        = kernel8.img
@@ -31,7 +31,7 @@ ifeq ($(BSP),rpi3)
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
     READELF_BINARY    = aarch64-none-elf-readelf
-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+    LD_SCRIPT_PATH    = src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -42,24 +42,33 @@ else ifeq ($(BSP),rpi4)
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
     READELF_BINARY    = aarch64-none-elf-readelf
-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+    LD_SCRIPT_PATH    = src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
-QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
-
 # Export for build.rs.
-export LINKER_FILE
+export LD_SCRIPT_PATH
+
 
-KERNEL_ELF = target/$(TARGET)/release/kernel
+
+##--------------------------------------------------------------------------------------------------
+## Generic configuration values
+##--------------------------------------------------------------------------------------------------
+KERNEL_LINKER_SCRIPT = link.ld
+KERNEL_ELF           = target/$(TARGET)/release/kernel
 
 
 
 ##--------------------------------------------------------------------------------------------------
 ## Command building blocks
 ##--------------------------------------------------------------------------------------------------
-RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
-RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
+RUSTFLAGS = $(RUSTC_MISC_ARGS)                   \
+    -C link-arg=--library-path=$(LD_SCRIPT_PATH) \
+    -C link-arg=--script=$(KERNEL_LINKER_SCRIPT)
+
+RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) \
+    -D warnings                   \
+    -D missing_docs
 
 FEATURES      = --features bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
diff --git a/05_drivers_gpio_uart/README.md b/05_drivers_gpio_uart/README.md
index d49adf285..76840b67c 100644
--- a/05_drivers_gpio_uart/README.md
+++ b/05_drivers_gpio_uart/README.md
@@ -155,7 +155,7 @@ diff -uNr 04_safe_globals/Makefile 05_drivers_gpio_uart/Makefile
 
 
  ##--------------------------------------------------------------------------------------------------
-@@ -73,6 +76,7 @@
+@@ -82,6 +85,7 @@
 
  EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
  EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
@@ -163,7 +163,7 @@ diff -uNr 04_safe_globals/Makefile 05_drivers_gpio_uart/Makefile
 
  ##------------------------------------------------------------------------------
  ## Dockerization
-@@ -80,18 +84,26 @@
+@@ -89,18 +93,26 @@
  DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
  DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
  DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
@@ -191,7 +191,7 @@ diff -uNr 04_safe_globals/Makefile 05_drivers_gpio_uart/Makefile
 
  all: $(KERNEL_BIN)
 
-@@ -131,6 +143,12 @@
+@@ -140,6 +152,12 @@
  endif
 
  ##------------------------------------------------------------------------------
diff --git a/05_drivers_gpio_uart/build.rs b/05_drivers_gpio_uart/build.rs
index 883c59556..f53b99494 100644
--- a/05_drivers_gpio_uart/build.rs
+++ b/05_drivers_gpio_uart/build.rs
@@ -1,8 +1,17 @@
-use std::env;
+use std::{env, fs};
 
 fn main() {
-    let linker_file = env::var("LINKER_FILE").unwrap_or_default();
+    let ld_script_path = env::var("LD_SCRIPT_PATH").unwrap_or_default();
 
-    println!("cargo:rerun-if-changed={}", linker_file);
-    println!("cargo:rerun-if-changed=build.rs");
+    let files = fs::read_dir(ld_script_path).unwrap();
+    files
+        .filter_map(Result::ok)
+        .filter(|d| {
+            if let Some(e) = d.path().extension() {
+                e == "ld"
+            } else {
+                false
+            }
+        })
+        .for_each(|f| println!("cargo:rerun-if-changed={}", f.path().display()));
 }
diff --git a/06_uart_chainloader/Makefile b/06_uart_chainloader/Makefile
index 9cddeddb9..99b464c81 100644
--- a/06_uart_chainloader/Makefile
+++ b/06_uart_chainloader/Makefile
@@ -18,10 +18,10 @@ DEV_SERIAL ?= /dev/ttyUSB0
 
 
 ##--------------------------------------------------------------------------------------------------
-## Hardcoded configuration values
+## BSP-specific configuration values
 ##--------------------------------------------------------------------------------------------------
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
 
-# BSP-specific arguments.
 ifeq ($(BSP),rpi3)
     TARGET                 = aarch64-unknown-none-softfloat
     KERNEL_BIN             = kernel8.img
@@ -31,7 +31,7 @@ ifeq ($(BSP),rpi3)
     OBJDUMP_BINARY         = aarch64-none-elf-objdump
     NM_BINARY              = aarch64-none-elf-nm
     READELF_BINARY         = aarch64-none-elf-readelf
-    LINKER_FILE            = src/bsp/raspberrypi/link.ld
+    LD_SCRIPT_PATH    = src/bsp/raspberrypi
     RUSTC_MISC_ARGS        = -C target-cpu=cortex-a53
     CHAINBOOT_DEMO_PAYLOAD = demo_payload_rpi3.img
 else ifeq ($(BSP),rpi4)
@@ -43,25 +43,34 @@ else ifeq ($(BSP),rpi4)
     OBJDUMP_BINARY         = aarch64-none-elf-objdump
     NM_BINARY              = aarch64-none-elf-nm
     READELF_BINARY         = aarch64-none-elf-readelf
-    LINKER_FILE            = src/bsp/raspberrypi/link.ld
+    LD_SCRIPT_PATH    = src/bsp/raspberrypi
     RUSTC_MISC_ARGS        = -C target-cpu=cortex-a72
     CHAINBOOT_DEMO_PAYLOAD = demo_payload_rpi4.img
 endif
 
-QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
-
 # Export for build.rs.
-export LINKER_FILE
+export LD_SCRIPT_PATH
+
 
-KERNEL_ELF = target/$(TARGET)/release/kernel
+
+##--------------------------------------------------------------------------------------------------
+## Generic configuration values
+##--------------------------------------------------------------------------------------------------
+KERNEL_LINKER_SCRIPT = link.ld
+KERNEL_ELF           = target/$(TARGET)/release/kernel
 
 
 
 ##--------------------------------------------------------------------------------------------------
 ## Command building blocks
 ##--------------------------------------------------------------------------------------------------
-RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
-RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
+RUSTFLAGS = $(RUSTC_MISC_ARGS)                   \
+    -C link-arg=--library-path=$(LD_SCRIPT_PATH) \
+    -C link-arg=--script=$(KERNEL_LINKER_SCRIPT)
+
+RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) \
+    -D warnings                   \
+    -D missing_docs
 
 FEATURES      = --features bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
diff --git a/06_uart_chainloader/README.md b/06_uart_chainloader/README.md
index 6f786dd85..81d93d120 100644
--- a/06_uart_chainloader/README.md
+++ b/06_uart_chainloader/README.md
@@ -139,8 +139,8 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
 --- 05_drivers_gpio_uart/Makefile
 +++ 06_uart_chainloader/Makefile
 @@ -23,27 +23,29 @@
+ QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
 
- # BSP-specific arguments.
  ifeq ($(BSP),rpi3)
 -    TARGET            = aarch64-unknown-none-softfloat
 -    KERNEL_BIN        = kernel8.img
@@ -150,8 +150,6 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
 -    OBJDUMP_BINARY    = aarch64-none-elf-objdump
 -    NM_BINARY         = aarch64-none-elf-nm
 -    READELF_BINARY    = aarch64-none-elf-readelf
--    LINKER_FILE       = src/bsp/raspberrypi/link.ld
--    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 +    TARGET                 = aarch64-unknown-none-softfloat
 +    KERNEL_BIN             = kernel8.img
 +    QEMU_BINARY            = qemu-system-aarch64
@@ -160,7 +158,8 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
 +    OBJDUMP_BINARY         = aarch64-none-elf-objdump
 +    NM_BINARY              = aarch64-none-elf-nm
 +    READELF_BINARY         = aarch64-none-elf-readelf
-+    LINKER_FILE            = src/bsp/raspberrypi/link.ld
+     LD_SCRIPT_PATH    = src/bsp/raspberrypi
+-    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 +    RUSTC_MISC_ARGS        = -C target-cpu=cortex-a53
 +    CHAINBOOT_DEMO_PAYLOAD = demo_payload_rpi3.img
  else ifeq ($(BSP),rpi4)
@@ -172,8 +171,6 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
 -    OBJDUMP_BINARY    = aarch64-none-elf-objdump
 -    NM_BINARY         = aarch64-none-elf-nm
 -    READELF_BINARY    = aarch64-none-elf-readelf
--    LINKER_FILE       = src/bsp/raspberrypi/link.ld
--    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 +    TARGET                 = aarch64-unknown-none-softfloat
 +    KERNEL_BIN             = kernel8.img
 +    QEMU_BINARY            = qemu-system-aarch64
@@ -182,13 +179,14 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
 +    OBJDUMP_BINARY         = aarch64-none-elf-objdump
 +    NM_BINARY              = aarch64-none-elf-nm
 +    READELF_BINARY         = aarch64-none-elf-readelf
-+    LINKER_FILE            = src/bsp/raspberrypi/link.ld
+     LD_SCRIPT_PATH    = src/bsp/raspberrypi
+-    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 +    RUSTC_MISC_ARGS        = -C target-cpu=cortex-a72
 +    CHAINBOOT_DEMO_PAYLOAD = demo_payload_rpi4.img
  endif
 
- QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
-@@ -75,8 +77,8 @@
+ # Export for build.rs.
+@@ -84,8 +86,8 @@
      -O binary
 
  EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
@@ -199,7 +197,7 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
 
  ##------------------------------------------------------------------------------
  ## Dockerization
-@@ -95,7 +97,7 @@
+@@ -104,7 +106,7 @@
  ifeq ($(shell uname -s),Linux)
      DOCKER_CMD_DEV = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DEV)
 
@@ -208,7 +206,7 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
  endif
 
 
-@@ -103,7 +105,7 @@
+@@ -112,7 +114,7 @@
  ##--------------------------------------------------------------------------------------------------
  ## Targets
  ##--------------------------------------------------------------------------------------------------
@@ -217,7 +215,7 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
 
  all: $(KERNEL_BIN)
 
-@@ -132,7 +134,7 @@
+@@ -141,7 +143,7 @@
  ##------------------------------------------------------------------------------
  ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
@@ -226,7 +224,7 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
  	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
 
  else # QEMU is supported.
-@@ -140,13 +142,18 @@
+@@ -149,13 +151,18 @@
  qemu: $(KERNEL_BIN)
  	$(call colorecho, "\nLaunching QEMU")
  	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
@@ -248,7 +246,7 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
 
  ##------------------------------------------------------------------------------
  ## Run clippy
-@@ -210,7 +217,8 @@
+@@ -219,7 +226,8 @@
  ##------------------------------------------------------------------------------
  test_boot: $(KERNEL_BIN)
  	$(call colorecho, "\nBoot test - $(BSP)")
diff --git a/06_uart_chainloader/build.rs b/06_uart_chainloader/build.rs
index 883c59556..f53b99494 100644
--- a/06_uart_chainloader/build.rs
+++ b/06_uart_chainloader/build.rs
@@ -1,8 +1,17 @@
-use std::env;
+use std::{env, fs};
 
 fn main() {
-    let linker_file = env::var("LINKER_FILE").unwrap_or_default();
+    let ld_script_path = env::var("LD_SCRIPT_PATH").unwrap_or_default();
 
-    println!("cargo:rerun-if-changed={}", linker_file);
-    println!("cargo:rerun-if-changed=build.rs");
+    let files = fs::read_dir(ld_script_path).unwrap();
+    files
+        .filter_map(Result::ok)
+        .filter(|d| {
+            if let Some(e) = d.path().extension() {
+                e == "ld"
+            } else {
+                false
+            }
+        })
+        .for_each(|f| println!("cargo:rerun-if-changed={}", f.path().display()));
 }
diff --git a/07_timestamps/Makefile b/07_timestamps/Makefile
index 7a97517f1..562ccfa68 100644
--- a/07_timestamps/Makefile
+++ b/07_timestamps/Makefile
@@ -18,10 +18,10 @@ DEV_SERIAL ?= /dev/ttyUSB0
 
 
 ##--------------------------------------------------------------------------------------------------
-## Hardcoded configuration values
+## BSP-specific configuration values
 ##--------------------------------------------------------------------------------------------------
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
 
-# BSP-specific arguments.
 ifeq ($(BSP),rpi3)
     TARGET            = aarch64-unknown-none-softfloat
     KERNEL_BIN        = kernel8.img
@@ -31,7 +31,7 @@ ifeq ($(BSP),rpi3)
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
     READELF_BINARY    = aarch64-none-elf-readelf
-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+    LD_SCRIPT_PATH    = src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -42,24 +42,33 @@ else ifeq ($(BSP),rpi4)
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
     READELF_BINARY    = aarch64-none-elf-readelf
-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+    LD_SCRIPT_PATH    = src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
-QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
-
 # Export for build.rs.
-export LINKER_FILE
+export LD_SCRIPT_PATH
+
 
-KERNEL_ELF = target/$(TARGET)/release/kernel
+
+##--------------------------------------------------------------------------------------------------
+## Generic configuration values
+##--------------------------------------------------------------------------------------------------
+KERNEL_LINKER_SCRIPT = link.ld
+KERNEL_ELF           = target/$(TARGET)/release/kernel
 
 
 
 ##--------------------------------------------------------------------------------------------------
 ## Command building blocks
 ##--------------------------------------------------------------------------------------------------
-RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
-RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
+RUSTFLAGS = $(RUSTC_MISC_ARGS)                   \
+    -C link-arg=--library-path=$(LD_SCRIPT_PATH) \
+    -C link-arg=--script=$(KERNEL_LINKER_SCRIPT)
+
+RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) \
+    -D warnings                   \
+    -D missing_docs
 
 FEATURES      = --features bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index e6796930d..f8d67d40c 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -63,8 +63,8 @@ diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
 --- 06_uart_chainloader/Makefile
 +++ 07_timestamps/Makefile
 @@ -23,29 +23,27 @@
+ QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
 
- # BSP-specific arguments.
  ifeq ($(BSP),rpi3)
 -    TARGET                 = aarch64-unknown-none-softfloat
 -    KERNEL_BIN             = kernel8.img
@@ -74,9 +74,6 @@ diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
 -    OBJDUMP_BINARY         = aarch64-none-elf-objdump
 -    NM_BINARY              = aarch64-none-elf-nm
 -    READELF_BINARY         = aarch64-none-elf-readelf
--    LINKER_FILE            = src/bsp/raspberrypi/link.ld
--    RUSTC_MISC_ARGS        = -C target-cpu=cortex-a53
--    CHAINBOOT_DEMO_PAYLOAD = demo_payload_rpi3.img
 +    TARGET            = aarch64-unknown-none-softfloat
 +    KERNEL_BIN        = kernel8.img
 +    QEMU_BINARY       = qemu-system-aarch64
@@ -85,7 +82,9 @@ diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
 +    OBJDUMP_BINARY    = aarch64-none-elf-objdump
 +    NM_BINARY         = aarch64-none-elf-nm
 +    READELF_BINARY    = aarch64-none-elf-readelf
-+    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+     LD_SCRIPT_PATH    = src/bsp/raspberrypi
+-    RUSTC_MISC_ARGS        = -C target-cpu=cortex-a53
+-    CHAINBOOT_DEMO_PAYLOAD = demo_payload_rpi3.img
 +    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
  else ifeq ($(BSP),rpi4)
 -    TARGET                 = aarch64-unknown-none-softfloat
@@ -96,9 +95,6 @@ diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
 -    OBJDUMP_BINARY         = aarch64-none-elf-objdump
 -    NM_BINARY              = aarch64-none-elf-nm
 -    READELF_BINARY         = aarch64-none-elf-readelf
--    LINKER_FILE            = src/bsp/raspberrypi/link.ld
--    RUSTC_MISC_ARGS        = -C target-cpu=cortex-a72
--    CHAINBOOT_DEMO_PAYLOAD = demo_payload_rpi4.img
 +    TARGET            = aarch64-unknown-none-softfloat
 +    KERNEL_BIN        = kernel8.img
 +    QEMU_BINARY       = qemu-system-aarch64
@@ -107,12 +103,14 @@ diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
 +    OBJDUMP_BINARY    = aarch64-none-elf-objdump
 +    NM_BINARY         = aarch64-none-elf-nm
 +    READELF_BINARY    = aarch64-none-elf-readelf
-+    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+     LD_SCRIPT_PATH    = src/bsp/raspberrypi
+-    RUSTC_MISC_ARGS        = -C target-cpu=cortex-a72
+-    CHAINBOOT_DEMO_PAYLOAD = demo_payload_rpi4.img
 +    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
  endif
 
- QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
-@@ -77,7 +75,7 @@
+ # Export for build.rs.
+@@ -86,7 +84,7 @@
      -O binary
 
  EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
@@ -121,7 +119,7 @@ diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
  EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
 
  ##------------------------------------------------------------------------------
-@@ -134,7 +132,7 @@
+@@ -143,7 +141,7 @@
  ##------------------------------------------------------------------------------
  ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
@@ -130,7 +128,7 @@ diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
  	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
 
  else # QEMU is supported.
-@@ -143,17 +141,13 @@
+@@ -152,17 +150,13 @@
  	$(call colorecho, "\nLaunching QEMU")
  	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
@@ -149,7 +147,7 @@ diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
 
  ##------------------------------------------------------------------------------
  ## Run clippy
-@@ -217,8 +211,7 @@
+@@ -226,8 +220,7 @@
  ##------------------------------------------------------------------------------
  test_boot: $(KERNEL_BIN)
  	$(call colorecho, "\nBoot test - $(BSP)")
diff --git a/07_timestamps/build.rs b/07_timestamps/build.rs
index 883c59556..f53b99494 100644
--- a/07_timestamps/build.rs
+++ b/07_timestamps/build.rs
@@ -1,8 +1,17 @@
-use std::env;
+use std::{env, fs};
 
 fn main() {
-    let linker_file = env::var("LINKER_FILE").unwrap_or_default();
+    let ld_script_path = env::var("LD_SCRIPT_PATH").unwrap_or_default();
 
-    println!("cargo:rerun-if-changed={}", linker_file);
-    println!("cargo:rerun-if-changed=build.rs");
+    let files = fs::read_dir(ld_script_path).unwrap();
+    files
+        .filter_map(Result::ok)
+        .filter(|d| {
+            if let Some(e) = d.path().extension() {
+                e == "ld"
+            } else {
+                false
+            }
+        })
+        .for_each(|f| println!("cargo:rerun-if-changed={}", f.path().display()));
 }
diff --git a/08_hw_debug_JTAG/Makefile b/08_hw_debug_JTAG/Makefile
index 5b1c2339e..1ec96d4ac 100644
--- a/08_hw_debug_JTAG/Makefile
+++ b/08_hw_debug_JTAG/Makefile
@@ -18,10 +18,10 @@ DEV_SERIAL ?= /dev/ttyUSB0
 
 
 ##--------------------------------------------------------------------------------------------------
-## Hardcoded configuration values
+## BSP-specific configuration values
 ##--------------------------------------------------------------------------------------------------
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
 
-# BSP-specific arguments.
 ifeq ($(BSP),rpi3)
     TARGET            = aarch64-unknown-none-softfloat
     KERNEL_BIN        = kernel8.img
@@ -33,7 +33,7 @@ ifeq ($(BSP),rpi3)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+    LD_SCRIPT_PATH    = src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -46,24 +46,33 @@ else ifeq ($(BSP),rpi4)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+    LD_SCRIPT_PATH    = src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
-QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
-
 # Export for build.rs.
-export LINKER_FILE
+export LD_SCRIPT_PATH
+
 
-KERNEL_ELF = target/$(TARGET)/release/kernel
+
+##--------------------------------------------------------------------------------------------------
+## Generic configuration values
+##--------------------------------------------------------------------------------------------------
+KERNEL_LINKER_SCRIPT = link.ld
+KERNEL_ELF           = target/$(TARGET)/release/kernel
 
 
 
 ##--------------------------------------------------------------------------------------------------
 ## Command building blocks
 ##--------------------------------------------------------------------------------------------------
-RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
-RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
+RUSTFLAGS = $(RUSTC_MISC_ARGS)                   \
+    -C link-arg=--library-path=$(LD_SCRIPT_PATH) \
+    -C link-arg=--script=$(KERNEL_LINKER_SCRIPT)
+
+RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) \
+    -D warnings                   \
+    -D missing_docs
 
 FEATURES      = --features bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
diff --git a/08_hw_debug_JTAG/README.md b/08_hw_debug_JTAG/README.md
index 0742cdf13..ea116a8b6 100644
--- a/08_hw_debug_JTAG/README.md
+++ b/08_hw_debug_JTAG/README.md
@@ -326,7 +326,7 @@ diff -uNr 07_timestamps/Makefile 08_hw_debug_JTAG/Makefile
      READELF_BINARY    = aarch64-none-elf-readelf
 +    OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
 +    JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
-     LINKER_FILE       = src/bsp/raspberrypi/link.ld
+     LD_SCRIPT_PATH    = src/bsp/raspberrypi
      RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
  else ifeq ($(BSP),rpi4)
 @@ -42,6 +44,8 @@
@@ -335,10 +335,10 @@ diff -uNr 07_timestamps/Makefile 08_hw_debug_JTAG/Makefile
      READELF_BINARY    = aarch64-none-elf-readelf
 +    OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
 +    JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
-     LINKER_FILE       = src/bsp/raspberrypi/link.ld
+     LD_SCRIPT_PATH    = src/bsp/raspberrypi
      RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
  endif
-@@ -84,18 +88,25 @@
+@@ -93,18 +97,25 @@
  DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
  DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
  DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
@@ -364,7 +364,7 @@ diff -uNr 07_timestamps/Makefile 08_hw_debug_JTAG/Makefile
  endif
 
 
-@@ -194,6 +205,35 @@
+@@ -203,6 +214,35 @@
 
 
 
diff --git a/08_hw_debug_JTAG/build.rs b/08_hw_debug_JTAG/build.rs
index 883c59556..f53b99494 100644
--- a/08_hw_debug_JTAG/build.rs
+++ b/08_hw_debug_JTAG/build.rs
@@ -1,8 +1,17 @@
-use std::env;
+use std::{env, fs};
 
 fn main() {
-    let linker_file = env::var("LINKER_FILE").unwrap_or_default();
+    let ld_script_path = env::var("LD_SCRIPT_PATH").unwrap_or_default();
 
-    println!("cargo:rerun-if-changed={}", linker_file);
-    println!("cargo:rerun-if-changed=build.rs");
+    let files = fs::read_dir(ld_script_path).unwrap();
+    files
+        .filter_map(Result::ok)
+        .filter(|d| {
+            if let Some(e) = d.path().extension() {
+                e == "ld"
+            } else {
+                false
+            }
+        })
+        .for_each(|f| println!("cargo:rerun-if-changed={}", f.path().display()));
 }
diff --git a/09_privilege_level/Makefile b/09_privilege_level/Makefile
index 5b1c2339e..1ec96d4ac 100644
--- a/09_privilege_level/Makefile
+++ b/09_privilege_level/Makefile
@@ -18,10 +18,10 @@ DEV_SERIAL ?= /dev/ttyUSB0
 
 
 ##--------------------------------------------------------------------------------------------------
-## Hardcoded configuration values
+## BSP-specific configuration values
 ##--------------------------------------------------------------------------------------------------
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
 
-# BSP-specific arguments.
 ifeq ($(BSP),rpi3)
     TARGET            = aarch64-unknown-none-softfloat
     KERNEL_BIN        = kernel8.img
@@ -33,7 +33,7 @@ ifeq ($(BSP),rpi3)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+    LD_SCRIPT_PATH    = src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -46,24 +46,33 @@ else ifeq ($(BSP),rpi4)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+    LD_SCRIPT_PATH    = src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
-QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
-
 # Export for build.rs.
-export LINKER_FILE
+export LD_SCRIPT_PATH
+
 
-KERNEL_ELF = target/$(TARGET)/release/kernel
+
+##--------------------------------------------------------------------------------------------------
+## Generic configuration values
+##--------------------------------------------------------------------------------------------------
+KERNEL_LINKER_SCRIPT = link.ld
+KERNEL_ELF           = target/$(TARGET)/release/kernel
 
 
 
 ##--------------------------------------------------------------------------------------------------
 ## Command building blocks
 ##--------------------------------------------------------------------------------------------------
-RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
-RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
+RUSTFLAGS = $(RUSTC_MISC_ARGS)                   \
+    -C link-arg=--library-path=$(LD_SCRIPT_PATH) \
+    -C link-arg=--script=$(KERNEL_LINKER_SCRIPT)
+
+RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) \
+    -D warnings                   \
+    -D missing_docs
 
 FEATURES      = --features bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
diff --git a/09_privilege_level/build.rs b/09_privilege_level/build.rs
index 883c59556..f53b99494 100644
--- a/09_privilege_level/build.rs
+++ b/09_privilege_level/build.rs
@@ -1,8 +1,17 @@
-use std::env;
+use std::{env, fs};
 
 fn main() {
-    let linker_file = env::var("LINKER_FILE").unwrap_or_default();
+    let ld_script_path = env::var("LD_SCRIPT_PATH").unwrap_or_default();
 
-    println!("cargo:rerun-if-changed={}", linker_file);
-    println!("cargo:rerun-if-changed=build.rs");
+    let files = fs::read_dir(ld_script_path).unwrap();
+    files
+        .filter_map(Result::ok)
+        .filter(|d| {
+            if let Some(e) = d.path().extension() {
+                e == "ld"
+            } else {
+                false
+            }
+        })
+        .for_each(|f| println!("cargo:rerun-if-changed={}", f.path().display()));
 }
diff --git a/10_virtual_mem_part1_identity_mapping/Makefile b/10_virtual_mem_part1_identity_mapping/Makefile
index 5b1c2339e..1ec96d4ac 100644
--- a/10_virtual_mem_part1_identity_mapping/Makefile
+++ b/10_virtual_mem_part1_identity_mapping/Makefile
@@ -18,10 +18,10 @@ DEV_SERIAL ?= /dev/ttyUSB0
 
 
 ##--------------------------------------------------------------------------------------------------
-## Hardcoded configuration values
+## BSP-specific configuration values
 ##--------------------------------------------------------------------------------------------------
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
 
-# BSP-specific arguments.
 ifeq ($(BSP),rpi3)
     TARGET            = aarch64-unknown-none-softfloat
     KERNEL_BIN        = kernel8.img
@@ -33,7 +33,7 @@ ifeq ($(BSP),rpi3)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+    LD_SCRIPT_PATH    = src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -46,24 +46,33 @@ else ifeq ($(BSP),rpi4)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+    LD_SCRIPT_PATH    = src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
-QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
-
 # Export for build.rs.
-export LINKER_FILE
+export LD_SCRIPT_PATH
+
 
-KERNEL_ELF = target/$(TARGET)/release/kernel
+
+##--------------------------------------------------------------------------------------------------
+## Generic configuration values
+##--------------------------------------------------------------------------------------------------
+KERNEL_LINKER_SCRIPT = link.ld
+KERNEL_ELF           = target/$(TARGET)/release/kernel
 
 
 
 ##--------------------------------------------------------------------------------------------------
 ## Command building blocks
 ##--------------------------------------------------------------------------------------------------
-RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
-RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
+RUSTFLAGS = $(RUSTC_MISC_ARGS)                   \
+    -C link-arg=--library-path=$(LD_SCRIPT_PATH) \
+    -C link-arg=--script=$(KERNEL_LINKER_SCRIPT)
+
+RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) \
+    -D warnings                   \
+    -D missing_docs
 
 FEATURES      = --features bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
diff --git a/10_virtual_mem_part1_identity_mapping/build.rs b/10_virtual_mem_part1_identity_mapping/build.rs
index 883c59556..f53b99494 100644
--- a/10_virtual_mem_part1_identity_mapping/build.rs
+++ b/10_virtual_mem_part1_identity_mapping/build.rs
@@ -1,8 +1,17 @@
-use std::env;
+use std::{env, fs};
 
 fn main() {
-    let linker_file = env::var("LINKER_FILE").unwrap_or_default();
+    let ld_script_path = env::var("LD_SCRIPT_PATH").unwrap_or_default();
 
-    println!("cargo:rerun-if-changed={}", linker_file);
-    println!("cargo:rerun-if-changed=build.rs");
+    let files = fs::read_dir(ld_script_path).unwrap();
+    files
+        .filter_map(Result::ok)
+        .filter(|d| {
+            if let Some(e) = d.path().extension() {
+                e == "ld"
+            } else {
+                false
+            }
+        })
+        .for_each(|f| println!("cargo:rerun-if-changed={}", f.path().display()));
 }
diff --git a/11_exceptions_part1_groundwork/Makefile b/11_exceptions_part1_groundwork/Makefile
index 5b1c2339e..1ec96d4ac 100644
--- a/11_exceptions_part1_groundwork/Makefile
+++ b/11_exceptions_part1_groundwork/Makefile
@@ -18,10 +18,10 @@ DEV_SERIAL ?= /dev/ttyUSB0
 
 
 ##--------------------------------------------------------------------------------------------------
-## Hardcoded configuration values
+## BSP-specific configuration values
 ##--------------------------------------------------------------------------------------------------
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
 
-# BSP-specific arguments.
 ifeq ($(BSP),rpi3)
     TARGET            = aarch64-unknown-none-softfloat
     KERNEL_BIN        = kernel8.img
@@ -33,7 +33,7 @@ ifeq ($(BSP),rpi3)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+    LD_SCRIPT_PATH    = src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -46,24 +46,33 @@ else ifeq ($(BSP),rpi4)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+    LD_SCRIPT_PATH    = src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
-QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
-
 # Export for build.rs.
-export LINKER_FILE
+export LD_SCRIPT_PATH
+
 
-KERNEL_ELF = target/$(TARGET)/release/kernel
+
+##--------------------------------------------------------------------------------------------------
+## Generic configuration values
+##--------------------------------------------------------------------------------------------------
+KERNEL_LINKER_SCRIPT = link.ld
+KERNEL_ELF           = target/$(TARGET)/release/kernel
 
 
 
 ##--------------------------------------------------------------------------------------------------
 ## Command building blocks
 ##--------------------------------------------------------------------------------------------------
-RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
-RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
+RUSTFLAGS = $(RUSTC_MISC_ARGS)                   \
+    -C link-arg=--library-path=$(LD_SCRIPT_PATH) \
+    -C link-arg=--script=$(KERNEL_LINKER_SCRIPT)
+
+RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) \
+    -D warnings                   \
+    -D missing_docs
 
 FEATURES      = --features bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
diff --git a/11_exceptions_part1_groundwork/build.rs b/11_exceptions_part1_groundwork/build.rs
index 883c59556..f53b99494 100644
--- a/11_exceptions_part1_groundwork/build.rs
+++ b/11_exceptions_part1_groundwork/build.rs
@@ -1,8 +1,17 @@
-use std::env;
+use std::{env, fs};
 
 fn main() {
-    let linker_file = env::var("LINKER_FILE").unwrap_or_default();
+    let ld_script_path = env::var("LD_SCRIPT_PATH").unwrap_or_default();
 
-    println!("cargo:rerun-if-changed={}", linker_file);
-    println!("cargo:rerun-if-changed=build.rs");
+    let files = fs::read_dir(ld_script_path).unwrap();
+    files
+        .filter_map(Result::ok)
+        .filter(|d| {
+            if let Some(e) = d.path().extension() {
+                e == "ld"
+            } else {
+                false
+            }
+        })
+        .for_each(|f| println!("cargo:rerun-if-changed={}", f.path().display()));
 }
diff --git a/12_integrated_testing/Makefile b/12_integrated_testing/Makefile
index e9ed2d277..a1db677bd 100644
--- a/12_integrated_testing/Makefile
+++ b/12_integrated_testing/Makefile
@@ -25,10 +25,10 @@ endif
 
 
 ##--------------------------------------------------------------------------------------------------
-## Hardcoded configuration values
+## BSP-specific configuration values
 ##--------------------------------------------------------------------------------------------------
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
 
-# BSP-specific arguments.
 ifeq ($(BSP),rpi3)
     TARGET            = aarch64-unknown-none-softfloat
     KERNEL_BIN        = kernel8.img
@@ -41,7 +41,7 @@ ifeq ($(BSP),rpi3)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+    LD_SCRIPT_PATH    = src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -55,24 +55,33 @@ else ifeq ($(BSP),rpi4)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+    LD_SCRIPT_PATH    = src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
-QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
-
 # Export for build.rs.
-export LINKER_FILE
+export LD_SCRIPT_PATH
+
 
-KERNEL_ELF = target/$(TARGET)/release/kernel
+
+##--------------------------------------------------------------------------------------------------
+## Generic configuration values
+##--------------------------------------------------------------------------------------------------
+KERNEL_LINKER_SCRIPT = link.ld
+KERNEL_ELF           = target/$(TARGET)/release/kernel
 
 
 
 ##--------------------------------------------------------------------------------------------------
 ## Command building blocks
 ##--------------------------------------------------------------------------------------------------
-RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
-RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
+RUSTFLAGS = $(RUSTC_MISC_ARGS)                   \
+    -C link-arg=--library-path=$(LD_SCRIPT_PATH) \
+    -C link-arg=--script=$(KERNEL_LINKER_SCRIPT)
+
+RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) \
+    -D warnings                   \
+    -D missing_docs
 
 FEATURES      = --features bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
diff --git a/12_integrated_testing/README.md b/12_integrated_testing/README.md
index 698ad1b0a..ce94c2195 100644
--- a/12_integrated_testing/README.md
+++ b/12_integrated_testing/README.md
@@ -1006,7 +1006,7 @@ diff -uNr 11_exceptions_part1_groundwork/Makefile 12_integrated_testing/Makefile
      OBJDUMP_BINARY    = aarch64-none-elf-objdump
      NM_BINARY         = aarch64-none-elf-nm
      READELF_BINARY    = aarch64-none-elf-readelf
-@@ -74,6 +83,7 @@
+@@ -83,6 +92,7 @@
  DOC_CMD     = cargo doc $(COMPILER_ARGS)
  CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
  CHECK_CMD   = cargo check $(COMPILER_ARGS)
@@ -1014,7 +1014,7 @@ diff -uNr 11_exceptions_part1_groundwork/Makefile 12_integrated_testing/Makefile
  OBJCOPY_CMD = rust-objcopy \
      --strip-all            \
      -O binary
-@@ -237,11 +247,11 @@
+@@ -246,11 +256,11 @@
  ##--------------------------------------------------------------------------------------------------
  ## Testing targets
  ##--------------------------------------------------------------------------------------------------
@@ -1028,7 +1028,7 @@ diff -uNr 11_exceptions_part1_groundwork/Makefile 12_integrated_testing/Makefile
  	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
 
  else # QEMU is supported.
-@@ -253,6 +263,43 @@
+@@ -262,6 +272,43 @@
  	$(call colorecho, "\nBoot test - $(BSP)")
  	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
diff --git a/12_integrated_testing/build.rs b/12_integrated_testing/build.rs
index 883c59556..f53b99494 100644
--- a/12_integrated_testing/build.rs
+++ b/12_integrated_testing/build.rs
@@ -1,8 +1,17 @@
-use std::env;
+use std::{env, fs};
 
 fn main() {
-    let linker_file = env::var("LINKER_FILE").unwrap_or_default();
+    let ld_script_path = env::var("LD_SCRIPT_PATH").unwrap_or_default();
 
-    println!("cargo:rerun-if-changed={}", linker_file);
-    println!("cargo:rerun-if-changed=build.rs");
+    let files = fs::read_dir(ld_script_path).unwrap();
+    files
+        .filter_map(Result::ok)
+        .filter(|d| {
+            if let Some(e) = d.path().extension() {
+                e == "ld"
+            } else {
+                false
+            }
+        })
+        .for_each(|f| println!("cargo:rerun-if-changed={}", f.path().display()));
 }
diff --git a/13_exceptions_part2_peripheral_IRQs/Makefile b/13_exceptions_part2_peripheral_IRQs/Makefile
index e9ed2d277..a1db677bd 100644
--- a/13_exceptions_part2_peripheral_IRQs/Makefile
+++ b/13_exceptions_part2_peripheral_IRQs/Makefile
@@ -25,10 +25,10 @@ endif
 
 
 ##--------------------------------------------------------------------------------------------------
-## Hardcoded configuration values
+## BSP-specific configuration values
 ##--------------------------------------------------------------------------------------------------
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
 
-# BSP-specific arguments.
 ifeq ($(BSP),rpi3)
     TARGET            = aarch64-unknown-none-softfloat
     KERNEL_BIN        = kernel8.img
@@ -41,7 +41,7 @@ ifeq ($(BSP),rpi3)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+    LD_SCRIPT_PATH    = src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -55,24 +55,33 @@ else ifeq ($(BSP),rpi4)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+    LD_SCRIPT_PATH    = src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
-QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
-
 # Export for build.rs.
-export LINKER_FILE
+export LD_SCRIPT_PATH
+
 
-KERNEL_ELF = target/$(TARGET)/release/kernel
+
+##--------------------------------------------------------------------------------------------------
+## Generic configuration values
+##--------------------------------------------------------------------------------------------------
+KERNEL_LINKER_SCRIPT = link.ld
+KERNEL_ELF           = target/$(TARGET)/release/kernel
 
 
 
 ##--------------------------------------------------------------------------------------------------
 ## Command building blocks
 ##--------------------------------------------------------------------------------------------------
-RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
-RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
+RUSTFLAGS = $(RUSTC_MISC_ARGS)                   \
+    -C link-arg=--library-path=$(LD_SCRIPT_PATH) \
+    -C link-arg=--script=$(KERNEL_LINKER_SCRIPT)
+
+RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) \
+    -D warnings                   \
+    -D missing_docs
 
 FEATURES      = --features bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
diff --git a/13_exceptions_part2_peripheral_IRQs/build.rs b/13_exceptions_part2_peripheral_IRQs/build.rs
index 883c59556..f53b99494 100644
--- a/13_exceptions_part2_peripheral_IRQs/build.rs
+++ b/13_exceptions_part2_peripheral_IRQs/build.rs
@@ -1,8 +1,17 @@
-use std::env;
+use std::{env, fs};
 
 fn main() {
-    let linker_file = env::var("LINKER_FILE").unwrap_or_default();
+    let ld_script_path = env::var("LD_SCRIPT_PATH").unwrap_or_default();
 
-    println!("cargo:rerun-if-changed={}", linker_file);
-    println!("cargo:rerun-if-changed=build.rs");
+    let files = fs::read_dir(ld_script_path).unwrap();
+    files
+        .filter_map(Result::ok)
+        .filter(|d| {
+            if let Some(e) = d.path().extension() {
+                e == "ld"
+            } else {
+                false
+            }
+        })
+        .for_each(|f| println!("cargo:rerun-if-changed={}", f.path().display()));
 }
diff --git a/14_virtual_mem_part2_mmio_remap/Makefile b/14_virtual_mem_part2_mmio_remap/Makefile
index e9ed2d277..a1db677bd 100644
--- a/14_virtual_mem_part2_mmio_remap/Makefile
+++ b/14_virtual_mem_part2_mmio_remap/Makefile
@@ -25,10 +25,10 @@ endif
 
 
 ##--------------------------------------------------------------------------------------------------
-## Hardcoded configuration values
+## BSP-specific configuration values
 ##--------------------------------------------------------------------------------------------------
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
 
-# BSP-specific arguments.
 ifeq ($(BSP),rpi3)
     TARGET            = aarch64-unknown-none-softfloat
     KERNEL_BIN        = kernel8.img
@@ -41,7 +41,7 @@ ifeq ($(BSP),rpi3)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+    LD_SCRIPT_PATH    = src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -55,24 +55,33 @@ else ifeq ($(BSP),rpi4)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+    LD_SCRIPT_PATH    = src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
-QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
-
 # Export for build.rs.
-export LINKER_FILE
+export LD_SCRIPT_PATH
+
 
-KERNEL_ELF = target/$(TARGET)/release/kernel
+
+##--------------------------------------------------------------------------------------------------
+## Generic configuration values
+##--------------------------------------------------------------------------------------------------
+KERNEL_LINKER_SCRIPT = link.ld
+KERNEL_ELF           = target/$(TARGET)/release/kernel
 
 
 
 ##--------------------------------------------------------------------------------------------------
 ## Command building blocks
 ##--------------------------------------------------------------------------------------------------
-RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
-RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
+RUSTFLAGS = $(RUSTC_MISC_ARGS)                   \
+    -C link-arg=--library-path=$(LD_SCRIPT_PATH) \
+    -C link-arg=--script=$(KERNEL_LINKER_SCRIPT)
+
+RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) \
+    -D warnings                   \
+    -D missing_docs
 
 FEATURES      = --features bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
diff --git a/14_virtual_mem_part2_mmio_remap/build.rs b/14_virtual_mem_part2_mmio_remap/build.rs
index 883c59556..f53b99494 100644
--- a/14_virtual_mem_part2_mmio_remap/build.rs
+++ b/14_virtual_mem_part2_mmio_remap/build.rs
@@ -1,8 +1,17 @@
-use std::env;
+use std::{env, fs};
 
 fn main() {
-    let linker_file = env::var("LINKER_FILE").unwrap_or_default();
+    let ld_script_path = env::var("LD_SCRIPT_PATH").unwrap_or_default();
 
-    println!("cargo:rerun-if-changed={}", linker_file);
-    println!("cargo:rerun-if-changed=build.rs");
+    let files = fs::read_dir(ld_script_path).unwrap();
+    files
+        .filter_map(Result::ok)
+        .filter(|d| {
+            if let Some(e) = d.path().extension() {
+                e == "ld"
+            } else {
+                false
+            }
+        })
+        .for_each(|f| println!("cargo:rerun-if-changed={}", f.path().display()));
 }
diff --git a/15_virtual_mem_part3_precomputed_tables/Makefile b/15_virtual_mem_part3_precomputed_tables/Makefile
index 513f3dc1f..0f077200b 100644
--- a/15_virtual_mem_part3_precomputed_tables/Makefile
+++ b/15_virtual_mem_part3_precomputed_tables/Makefile
@@ -25,10 +25,10 @@ endif
 
 
 ##--------------------------------------------------------------------------------------------------
-## Hardcoded configuration values
+## BSP-specific configuration values
 ##--------------------------------------------------------------------------------------------------
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
 
-# BSP-specific arguments.
 ifeq ($(BSP),rpi3)
     TARGET            = aarch64-unknown-none-softfloat
     KERNEL_BIN        = kernel8.img
@@ -41,7 +41,7 @@ ifeq ($(BSP),rpi3)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+    LD_SCRIPT_PATH    = src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -55,24 +55,33 @@ else ifeq ($(BSP),rpi4)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+    LD_SCRIPT_PATH    = src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
-QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
-
 # Export for build.rs.
-export LINKER_FILE
+export LD_SCRIPT_PATH
+
 
-KERNEL_ELF = target/$(TARGET)/release/kernel
+
+##--------------------------------------------------------------------------------------------------
+## Generic configuration values
+##--------------------------------------------------------------------------------------------------
+KERNEL_LINKER_SCRIPT = link.ld
+KERNEL_ELF           = target/$(TARGET)/release/kernel
 
 
 
 ##--------------------------------------------------------------------------------------------------
 ## Command building blocks
 ##--------------------------------------------------------------------------------------------------
-RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
-RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
+RUSTFLAGS = $(RUSTC_MISC_ARGS)                   \
+    -C link-arg=--library-path=$(LD_SCRIPT_PATH) \
+    -C link-arg=--script=$(KERNEL_LINKER_SCRIPT)
+
+RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) \
+    -D warnings                   \
+    -D missing_docs
 
 FEATURES      = --features bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index 77d93f598..04d98dbd1 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -788,7 +788,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/Cargo.toml 15_virtual_mem_part3_precom
 diff -uNr 14_virtual_mem_part2_mmio_remap/Makefile 15_virtual_mem_part3_precomputed_tables/Makefile
 --- 14_virtual_mem_part2_mmio_remap/Makefile
 +++ 15_virtual_mem_part3_precomputed_tables/Makefile
-@@ -89,6 +89,7 @@
+@@ -98,6 +98,7 @@
      -O binary
 
  EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
@@ -796,7 +796,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/Makefile 15_virtual_mem_part3_precompu
  EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
  EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
 
-@@ -134,6 +135,7 @@
+@@ -143,6 +144,7 @@
  $(KERNEL_ELF):
  	$(call colorecho, "\nCompiling kernel - $(BSP)")
  	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
@@ -804,7 +804,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/Makefile 15_virtual_mem_part3_precompu
 
  ##------------------------------------------------------------------------------
  ## Build the stripped kernel binary
-@@ -272,6 +274,7 @@
+@@ -281,6 +283,7 @@
      TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
      TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
 
@@ -1138,7 +1138,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld 15_virtual
   * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
   */
 
-+INCLUDE src/bsp/raspberrypi/kernel_virt_addr_space_size.ld;
++INCLUDE kernel_virt_addr_space_size.ld;
 +
  PAGE_SIZE = 64K;
  PAGE_MASK = PAGE_SIZE - 1;
diff --git a/15_virtual_mem_part3_precomputed_tables/build.rs b/15_virtual_mem_part3_precomputed_tables/build.rs
index 883c59556..f53b99494 100644
--- a/15_virtual_mem_part3_precomputed_tables/build.rs
+++ b/15_virtual_mem_part3_precomputed_tables/build.rs
@@ -1,8 +1,17 @@
-use std::env;
+use std::{env, fs};
 
 fn main() {
-    let linker_file = env::var("LINKER_FILE").unwrap_or_default();
+    let ld_script_path = env::var("LD_SCRIPT_PATH").unwrap_or_default();
 
-    println!("cargo:rerun-if-changed={}", linker_file);
-    println!("cargo:rerun-if-changed=build.rs");
+    let files = fs::read_dir(ld_script_path).unwrap();
+    files
+        .filter_map(Result::ok)
+        .filter(|d| {
+            if let Some(e) = d.path().extension() {
+                e == "ld"
+            } else {
+                false
+            }
+        })
+        .for_each(|f| println!("cargo:rerun-if-changed={}", f.path().display()));
 }
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld
index ae45e27ab..717d817e2 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld
@@ -3,7 +3,7 @@
  * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
  */
 
-INCLUDE src/bsp/raspberrypi/kernel_virt_addr_space_size.ld;
+INCLUDE kernel_virt_addr_space_size.ld;
 
 PAGE_SIZE = 64K;
 PAGE_MASK = PAGE_SIZE - 1;
diff --git a/16_virtual_mem_part4_higher_half_kernel/Makefile b/16_virtual_mem_part4_higher_half_kernel/Makefile
index 513f3dc1f..0f077200b 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Makefile
+++ b/16_virtual_mem_part4_higher_half_kernel/Makefile
@@ -25,10 +25,10 @@ endif
 
 
 ##--------------------------------------------------------------------------------------------------
-## Hardcoded configuration values
+## BSP-specific configuration values
 ##--------------------------------------------------------------------------------------------------
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
 
-# BSP-specific arguments.
 ifeq ($(BSP),rpi3)
     TARGET            = aarch64-unknown-none-softfloat
     KERNEL_BIN        = kernel8.img
@@ -41,7 +41,7 @@ ifeq ($(BSP),rpi3)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+    LD_SCRIPT_PATH    = src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -55,24 +55,33 @@ else ifeq ($(BSP),rpi4)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+    LD_SCRIPT_PATH    = src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
-QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
-
 # Export for build.rs.
-export LINKER_FILE
+export LD_SCRIPT_PATH
+
 
-KERNEL_ELF = target/$(TARGET)/release/kernel
+
+##--------------------------------------------------------------------------------------------------
+## Generic configuration values
+##--------------------------------------------------------------------------------------------------
+KERNEL_LINKER_SCRIPT = link.ld
+KERNEL_ELF           = target/$(TARGET)/release/kernel
 
 
 
 ##--------------------------------------------------------------------------------------------------
 ## Command building blocks
 ##--------------------------------------------------------------------------------------------------
-RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
-RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
+RUSTFLAGS = $(RUSTC_MISC_ARGS)                   \
+    -C link-arg=--library-path=$(LD_SCRIPT_PATH) \
+    -C link-arg=--script=$(KERNEL_LINKER_SCRIPT)
+
+RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) \
+    -D warnings                   \
+    -D missing_docs
 
 FEATURES      = --features bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
diff --git a/16_virtual_mem_part4_higher_half_kernel/build.rs b/16_virtual_mem_part4_higher_half_kernel/build.rs
index 883c59556..f53b99494 100644
--- a/16_virtual_mem_part4_higher_half_kernel/build.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/build.rs
@@ -1,8 +1,17 @@
-use std::env;
+use std::{env, fs};
 
 fn main() {
-    let linker_file = env::var("LINKER_FILE").unwrap_or_default();
+    let ld_script_path = env::var("LD_SCRIPT_PATH").unwrap_or_default();
 
-    println!("cargo:rerun-if-changed={}", linker_file);
-    println!("cargo:rerun-if-changed=build.rs");
+    let files = fs::read_dir(ld_script_path).unwrap();
+    files
+        .filter_map(Result::ok)
+        .filter(|d| {
+            if let Some(e) = d.path().extension() {
+                e == "ld"
+            } else {
+                false
+            }
+        })
+        .for_each(|f| println!("cargo:rerun-if-changed={}", f.path().display()));
 }
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/link.ld b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/link.ld
index af64d9605..146198297 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/link.ld
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/link.ld
@@ -3,7 +3,7 @@
  * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
  */
 
-INCLUDE src/bsp/raspberrypi/kernel_virt_addr_space_size.ld;
+INCLUDE kernel_virt_addr_space_size.ld;
 
 PAGE_SIZE = 64K;
 PAGE_MASK = PAGE_SIZE - 1;
diff --git a/X1_JTAG_boot/Makefile b/X1_JTAG_boot/Makefile
index 7a97517f1..562ccfa68 100644
--- a/X1_JTAG_boot/Makefile
+++ b/X1_JTAG_boot/Makefile
@@ -18,10 +18,10 @@ DEV_SERIAL ?= /dev/ttyUSB0
 
 
 ##--------------------------------------------------------------------------------------------------
-## Hardcoded configuration values
+## BSP-specific configuration values
 ##--------------------------------------------------------------------------------------------------
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
 
-# BSP-specific arguments.
 ifeq ($(BSP),rpi3)
     TARGET            = aarch64-unknown-none-softfloat
     KERNEL_BIN        = kernel8.img
@@ -31,7 +31,7 @@ ifeq ($(BSP),rpi3)
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
     READELF_BINARY    = aarch64-none-elf-readelf
-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+    LD_SCRIPT_PATH    = src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -42,24 +42,33 @@ else ifeq ($(BSP),rpi4)
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
     READELF_BINARY    = aarch64-none-elf-readelf
-    LINKER_FILE       = src/bsp/raspberrypi/link.ld
+    LD_SCRIPT_PATH    = src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
-QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
-
 # Export for build.rs.
-export LINKER_FILE
+export LD_SCRIPT_PATH
+
 
-KERNEL_ELF = target/$(TARGET)/release/kernel
+
+##--------------------------------------------------------------------------------------------------
+## Generic configuration values
+##--------------------------------------------------------------------------------------------------
+KERNEL_LINKER_SCRIPT = link.ld
+KERNEL_ELF           = target/$(TARGET)/release/kernel
 
 
 
 ##--------------------------------------------------------------------------------------------------
 ## Command building blocks
 ##--------------------------------------------------------------------------------------------------
-RUSTFLAGS          = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
-RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
+RUSTFLAGS = $(RUSTC_MISC_ARGS)                   \
+    -C link-arg=--library-path=$(LD_SCRIPT_PATH) \
+    -C link-arg=--script=$(KERNEL_LINKER_SCRIPT)
+
+RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) \
+    -D warnings                   \
+    -D missing_docs
 
 FEATURES      = --features bsp_$(BSP)
 COMPILER_ARGS = --target=$(TARGET) \
diff --git a/X1_JTAG_boot/build.rs b/X1_JTAG_boot/build.rs
index 883c59556..f53b99494 100644
--- a/X1_JTAG_boot/build.rs
+++ b/X1_JTAG_boot/build.rs
@@ -1,8 +1,17 @@
-use std::env;
+use std::{env, fs};
 
 fn main() {
-    let linker_file = env::var("LINKER_FILE").unwrap_or_default();
+    let ld_script_path = env::var("LD_SCRIPT_PATH").unwrap_or_default();
 
-    println!("cargo:rerun-if-changed={}", linker_file);
-    println!("cargo:rerun-if-changed=build.rs");
+    let files = fs::read_dir(ld_script_path).unwrap();
+    files
+        .filter_map(Result::ok)
+        .filter(|d| {
+            if let Some(e) = d.path().extension() {
+                e == "ld"
+            } else {
+                false
+            }
+        })
+        .for_each(|f| println!("cargo:rerun-if-changed={}", f.path().display()));
 }

From b7cecafa1e1c488a300b38bbbec0c87298340e55 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Tue, 12 Apr 2022 21:54:53 +0200
Subject: [PATCH 132/214] Non-phony kernel targets

Saves time on various targets that depend on the kernel ELF because calling
cargo can be completely skipped if nothing changed.
---
 01_wait_forever/Makefile                      |  49 ++++++---
 02_runtime_init/Makefile                      |  49 ++++++---
 02_runtime_init/README.md                     |   4 +-
 03_hacky_hello_world/Makefile                 |  55 ++++++----
 03_hacky_hello_world/README.md                |  10 +-
 04_safe_globals/Makefile                      |  55 ++++++----
 05_drivers_gpio_uart/Makefile                 |  56 ++++++----
 05_drivers_gpio_uart/README.md                |  14 ++-
 06_uart_chainloader/Makefile                  |  57 ++++++----
 06_uart_chainloader/README.md                 |  27 +++--
 07_timestamps/Makefile                        |  55 ++++++----
 07_timestamps/README.md                       |  16 +--
 08_hw_debug_JTAG/Makefile                     |  59 ++++++----
 08_hw_debug_JTAG/README.md                    |   8 +-
 09_privilege_level/Makefile                   |  59 ++++++----
 .../Makefile                                  |  59 ++++++----
 11_exceptions_part1_groundwork/Makefile       |  59 ++++++----
 12_integrated_testing/Makefile                |  61 +++++++----
 12_integrated_testing/README.md               |  18 ++--
 13_exceptions_part2_peripheral_IRQs/Makefile  |  61 +++++++----
 14_virtual_mem_part2_mmio_remap/Makefile      |  61 +++++++----
 .../Makefile                                  |  83 +++++++++-----
 .../README.md                                 | 102 ++++++++++++++----
 .../translation_table_tool/main.rb            |   3 -
 .../Makefile                                  |  83 +++++++++-----
 .../translation_table_tool/main.rb            |   3 -
 X1_JTAG_boot/Makefile                         |  55 ++++++----
 common/color.mk                               |   5 -
 common/format.mk                              |  12 +++
 29 files changed, 828 insertions(+), 410 deletions(-)
 delete mode 100644 common/color.mk
 create mode 100644 common/format.mk

diff --git a/01_wait_forever/Makefile b/01_wait_forever/Makefile
index 2f7010758..6d50a2db7 100644
--- a/01_wait_forever/Makefile
+++ b/01_wait_forever/Makefile
@@ -2,7 +2,7 @@
 ##
 ## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/color.mk
+include ../common/format.mk
 include ../common/docker.mk
 
 ##--------------------------------------------------------------------------------------------------
@@ -49,10 +49,16 @@ export LD_SCRIPT_PATH
 
 
 ##--------------------------------------------------------------------------------------------------
-## Generic configuration values
+## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
 KERNEL_LINKER_SCRIPT = link.ld
-KERNEL_ELF           = target/$(TARGET)/release/kernel
+
+LAST_BUILD_CONFIG = target/$(BSP).build_config
+
+KERNEL_ELF      = target/$(TARGET)/release/kernel
+# This parses cargo's dep-info file.
+# https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
 
 
 
@@ -97,28 +103,41 @@ DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 ##--------------------------------------------------------------------------------------------------
 ## Targets
 ##--------------------------------------------------------------------------------------------------
-.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu clippy clean readelf objdump nm check
+.PHONY: all doc qemu clippy clean readelf objdump nm check
 
 all: $(KERNEL_BIN)
 
 ##------------------------------------------------------------------------------
-## Build the kernel ELF
+## Save the configuration as a file, so make understands if it changed.
+##------------------------------------------------------------------------------
+$(LAST_BUILD_CONFIG):
+	@rm -f target/*.build_config
+	@mkdir -p target
+	@touch $(LAST_BUILD_CONFIG)
+
+##------------------------------------------------------------------------------
+## Compile the kernel ELF
 ##------------------------------------------------------------------------------
-$(KERNEL_ELF):
-	$(call colorecho, "\nCompiling kernel - $(BSP)")
+$(KERNEL_ELF): $(KERNEL_ELF_DEPS)
+	$(call color_header, "Compiling kernel ELF - $(BSP)")
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
 ##------------------------------------------------------------------------------
-## Build the stripped kernel binary
+## Generate the stripped kernel binary
 ##------------------------------------------------------------------------------
 $(KERNEL_BIN): $(KERNEL_ELF)
+	$(call color_header, "Generating stripped binary")
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
+	$(call color_progress_prefix, "Name")
+	@echo $(KERNEL_BIN)
+	$(call color_progress_prefix, "Size")
+	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
 
 ##------------------------------------------------------------------------------
-## Build the documentation
+## Generate the documentation
 ##------------------------------------------------------------------------------
 doc:
-	$(call colorecho, "\nGenerating docs")
+	$(call color_header, "Generating docs")
 	@$(DOC_CMD) --document-private-items --open
 
 ##------------------------------------------------------------------------------
@@ -127,12 +146,12 @@ doc:
 ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
 qemu:
-	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+	$(call color_header, "$(QEMU_MISSING_STRING)")
 
 else # QEMU is supported.
 
 qemu: $(KERNEL_BIN)
-	$(call colorecho, "\nLaunching QEMU")
+	$(call color_header, "Launching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 endif
 
@@ -152,14 +171,14 @@ clean:
 ## Run readelf
 ##------------------------------------------------------------------------------
 readelf: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching readelf")
+	$(call color_header, "Launching readelf")
 	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
 ##------------------------------------------------------------------------------
 ## Run objdump
 ##------------------------------------------------------------------------------
 objdump: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching objdump")
+	$(call color_header, "Launching objdump")
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 $(KERNEL_ELF) | rustfilt
@@ -168,7 +187,7 @@ objdump: $(KERNEL_ELF)
 ## Run nm
 ##------------------------------------------------------------------------------
 nm: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching nm")
+	$(call color_header, "Launching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
 ##------------------------------------------------------------------------------
diff --git a/02_runtime_init/Makefile b/02_runtime_init/Makefile
index 1daff4d63..d96f72e61 100644
--- a/02_runtime_init/Makefile
+++ b/02_runtime_init/Makefile
@@ -2,7 +2,7 @@
 ##
 ## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/color.mk
+include ../common/format.mk
 include ../common/docker.mk
 
 ##--------------------------------------------------------------------------------------------------
@@ -49,10 +49,16 @@ export LD_SCRIPT_PATH
 
 
 ##--------------------------------------------------------------------------------------------------
-## Generic configuration values
+## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
 KERNEL_LINKER_SCRIPT = link.ld
-KERNEL_ELF           = target/$(TARGET)/release/kernel
+
+LAST_BUILD_CONFIG = target/$(BSP).build_config
+
+KERNEL_ELF      = target/$(TARGET)/release/kernel
+# This parses cargo's dep-info file.
+# https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
 
 
 
@@ -97,28 +103,41 @@ DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 ##--------------------------------------------------------------------------------------------------
 ## Targets
 ##--------------------------------------------------------------------------------------------------
-.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu clippy clean readelf objdump nm check
+.PHONY: all doc qemu clippy clean readelf objdump nm check
 
 all: $(KERNEL_BIN)
 
 ##------------------------------------------------------------------------------
-## Build the kernel ELF
+## Save the configuration as a file, so make understands if it changed.
+##------------------------------------------------------------------------------
+$(LAST_BUILD_CONFIG):
+	@rm -f target/*.build_config
+	@mkdir -p target
+	@touch $(LAST_BUILD_CONFIG)
+
+##------------------------------------------------------------------------------
+## Compile the kernel ELF
 ##------------------------------------------------------------------------------
-$(KERNEL_ELF):
-	$(call colorecho, "\nCompiling kernel - $(BSP)")
+$(KERNEL_ELF): $(KERNEL_ELF_DEPS)
+	$(call color_header, "Compiling kernel ELF - $(BSP)")
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
 ##------------------------------------------------------------------------------
-## Build the stripped kernel binary
+## Generate the stripped kernel binary
 ##------------------------------------------------------------------------------
 $(KERNEL_BIN): $(KERNEL_ELF)
+	$(call color_header, "Generating stripped binary")
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
+	$(call color_progress_prefix, "Name")
+	@echo $(KERNEL_BIN)
+	$(call color_progress_prefix, "Size")
+	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
 
 ##------------------------------------------------------------------------------
-## Build the documentation
+## Generate the documentation
 ##------------------------------------------------------------------------------
 doc:
-	$(call colorecho, "\nGenerating docs")
+	$(call color_header, "Generating docs")
 	@$(DOC_CMD) --document-private-items --open
 
 ##------------------------------------------------------------------------------
@@ -127,12 +146,12 @@ doc:
 ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
 qemu:
-	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+	$(call color_header, "$(QEMU_MISSING_STRING)")
 
 else # QEMU is supported.
 
 qemu: $(KERNEL_BIN)
-	$(call colorecho, "\nLaunching QEMU")
+	$(call color_header, "Launching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 endif
 
@@ -152,14 +171,14 @@ clean:
 ## Run readelf
 ##------------------------------------------------------------------------------
 readelf: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching readelf")
+	$(call color_header, "Launching readelf")
 	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
 ##------------------------------------------------------------------------------
 ## Run objdump
 ##------------------------------------------------------------------------------
 objdump: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching objdump")
+	$(call color_header, "Launching objdump")
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
@@ -170,7 +189,7 @@ objdump: $(KERNEL_ELF)
 ## Run nm
 ##------------------------------------------------------------------------------
 nm: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching nm")
+	$(call color_header, "Launching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
 ##------------------------------------------------------------------------------
diff --git a/02_runtime_init/README.md b/02_runtime_init/README.md
index 8b2c8ece9..88c292391 100644
--- a/02_runtime_init/README.md
+++ b/02_runtime_init/README.md
@@ -52,8 +52,8 @@ diff -uNr 01_wait_forever/Cargo.toml 02_runtime_init/Cargo.toml
 diff -uNr 01_wait_forever/Makefile 02_runtime_init/Makefile
 --- 01_wait_forever/Makefile
 +++ 02_runtime_init/Makefile
-@@ -162,6 +162,8 @@
- 	$(call colorecho, "\nLaunching objdump")
+@@ -181,6 +181,8 @@
+ 	$(call color_header, "Launching objdump")
  	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                  --section .text   \
 +                --section .rodata \
diff --git a/03_hacky_hello_world/Makefile b/03_hacky_hello_world/Makefile
index dfad06c5d..b74e27613 100644
--- a/03_hacky_hello_world/Makefile
+++ b/03_hacky_hello_world/Makefile
@@ -2,7 +2,7 @@
 ##
 ## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/color.mk
+include ../common/format.mk
 include ../common/docker.mk
 
 ##--------------------------------------------------------------------------------------------------
@@ -49,10 +49,16 @@ export LD_SCRIPT_PATH
 
 
 ##--------------------------------------------------------------------------------------------------
-## Generic configuration values
+## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
 KERNEL_LINKER_SCRIPT = link.ld
-KERNEL_ELF           = target/$(TARGET)/release/kernel
+
+LAST_BUILD_CONFIG = target/$(BSP).build_config
+
+KERNEL_ELF      = target/$(TARGET)/release/kernel
+# This parses cargo's dep-info file.
+# https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
 
 
 
@@ -100,28 +106,41 @@ DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
 ##--------------------------------------------------------------------------------------------------
 ## Targets
 ##--------------------------------------------------------------------------------------------------
-.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu clippy clean readelf objdump nm check
+.PHONY: all doc qemu clippy clean readelf objdump nm check
 
 all: $(KERNEL_BIN)
 
 ##------------------------------------------------------------------------------
-## Build the kernel ELF
+## Save the configuration as a file, so make understands if it changed.
+##------------------------------------------------------------------------------
+$(LAST_BUILD_CONFIG):
+	@rm -f target/*.build_config
+	@mkdir -p target
+	@touch $(LAST_BUILD_CONFIG)
+
+##------------------------------------------------------------------------------
+## Compile the kernel ELF
 ##------------------------------------------------------------------------------
-$(KERNEL_ELF):
-	$(call colorecho, "\nCompiling kernel - $(BSP)")
+$(KERNEL_ELF): $(KERNEL_ELF_DEPS)
+	$(call color_header, "Compiling kernel ELF - $(BSP)")
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
 ##------------------------------------------------------------------------------
-## Build the stripped kernel binary
+## Generate the stripped kernel binary
 ##------------------------------------------------------------------------------
 $(KERNEL_BIN): $(KERNEL_ELF)
+	$(call color_header, "Generating stripped binary")
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
+	$(call color_progress_prefix, "Name")
+	@echo $(KERNEL_BIN)
+	$(call color_progress_prefix, "Size")
+	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
 
 ##------------------------------------------------------------------------------
-## Build the documentation
+## Generate the documentation
 ##------------------------------------------------------------------------------
 doc:
-	$(call colorecho, "\nGenerating docs")
+	$(call color_header, "Generating docs")
 	@$(DOC_CMD) --document-private-items --open
 
 ##------------------------------------------------------------------------------
@@ -130,12 +149,12 @@ doc:
 ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
 qemu:
-	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+	$(call color_header, "$(QEMU_MISSING_STRING)")
 
 else # QEMU is supported.
 
 qemu: $(KERNEL_BIN)
-	$(call colorecho, "\nLaunching QEMU")
+	$(call color_header, "Launching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 endif
 
@@ -155,14 +174,14 @@ clean:
 ## Run readelf
 ##------------------------------------------------------------------------------
 readelf: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching readelf")
+	$(call color_header, "Launching readelf")
 	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
 ##------------------------------------------------------------------------------
 ## Run objdump
 ##------------------------------------------------------------------------------
 objdump: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching objdump")
+	$(call color_header, "Launching objdump")
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
@@ -173,7 +192,7 @@ objdump: $(KERNEL_ELF)
 ## Run nm
 ##------------------------------------------------------------------------------
 nm: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching nm")
+	$(call color_header, "Launching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
 ##------------------------------------------------------------------------------
@@ -191,8 +210,8 @@ check:
 
 ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
-test_boot test :
-	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+test_boot test:
+	$(call color_header, "$(QEMU_MISSING_STRING)")
 
 else # QEMU is supported.
 
@@ -200,7 +219,7 @@ else # QEMU is supported.
 ## Run boot test
 ##------------------------------------------------------------------------------
 test_boot: $(KERNEL_BIN)
-	$(call colorecho, "\nBoot test - $(BSP)")
+	$(call color_header, "Boot test - $(BSP)")
 	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
 test: test_boot
diff --git a/03_hacky_hello_world/README.md b/03_hacky_hello_world/README.md
index 2614a4d71..a1f3e1502 100644
--- a/03_hacky_hello_world/README.md
+++ b/03_hacky_hello_world/README.md
@@ -70,7 +70,7 @@ diff -uNr 02_runtime_init/Makefile 03_hacky_hello_world/Makefile
      OBJDUMP_BINARY    = aarch64-none-elf-objdump
      NM_BINARY         = aarch64-none-elf-nm
      READELF_BINARY    = aarch64-none-elf-readelf
-@@ -80,17 +80,20 @@
+@@ -86,17 +86,20 @@
      --strip-all            \
      -O binary
 
@@ -94,7 +94,7 @@ diff -uNr 02_runtime_init/Makefile 03_hacky_hello_world/Makefile
 
 
 
-@@ -178,3 +181,28 @@
+@@ -197,3 +200,28 @@
  ##------------------------------------------------------------------------------
  check:
  	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
@@ -108,8 +108,8 @@ diff -uNr 02_runtime_init/Makefile 03_hacky_hello_world/Makefile
 +
 +ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 +
-+test_boot test :
-+	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
++test_boot test:
++	$(call color_header, "$(QEMU_MISSING_STRING)")
 +
 +else # QEMU is supported.
 +
@@ -117,7 +117,7 @@ diff -uNr 02_runtime_init/Makefile 03_hacky_hello_world/Makefile
 +## Run boot test
 +##------------------------------------------------------------------------------
 +test_boot: $(KERNEL_BIN)
-+	$(call colorecho, "\nBoot test - $(BSP)")
++	$(call color_header, "Boot test - $(BSP)")
 +	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 +
 +test: test_boot
diff --git a/04_safe_globals/Makefile b/04_safe_globals/Makefile
index dfad06c5d..b74e27613 100644
--- a/04_safe_globals/Makefile
+++ b/04_safe_globals/Makefile
@@ -2,7 +2,7 @@
 ##
 ## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/color.mk
+include ../common/format.mk
 include ../common/docker.mk
 
 ##--------------------------------------------------------------------------------------------------
@@ -49,10 +49,16 @@ export LD_SCRIPT_PATH
 
 
 ##--------------------------------------------------------------------------------------------------
-## Generic configuration values
+## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
 KERNEL_LINKER_SCRIPT = link.ld
-KERNEL_ELF           = target/$(TARGET)/release/kernel
+
+LAST_BUILD_CONFIG = target/$(BSP).build_config
+
+KERNEL_ELF      = target/$(TARGET)/release/kernel
+# This parses cargo's dep-info file.
+# https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
 
 
 
@@ -100,28 +106,41 @@ DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
 ##--------------------------------------------------------------------------------------------------
 ## Targets
 ##--------------------------------------------------------------------------------------------------
-.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu clippy clean readelf objdump nm check
+.PHONY: all doc qemu clippy clean readelf objdump nm check
 
 all: $(KERNEL_BIN)
 
 ##------------------------------------------------------------------------------
-## Build the kernel ELF
+## Save the configuration as a file, so make understands if it changed.
+##------------------------------------------------------------------------------
+$(LAST_BUILD_CONFIG):
+	@rm -f target/*.build_config
+	@mkdir -p target
+	@touch $(LAST_BUILD_CONFIG)
+
+##------------------------------------------------------------------------------
+## Compile the kernel ELF
 ##------------------------------------------------------------------------------
-$(KERNEL_ELF):
-	$(call colorecho, "\nCompiling kernel - $(BSP)")
+$(KERNEL_ELF): $(KERNEL_ELF_DEPS)
+	$(call color_header, "Compiling kernel ELF - $(BSP)")
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
 ##------------------------------------------------------------------------------
-## Build the stripped kernel binary
+## Generate the stripped kernel binary
 ##------------------------------------------------------------------------------
 $(KERNEL_BIN): $(KERNEL_ELF)
+	$(call color_header, "Generating stripped binary")
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
+	$(call color_progress_prefix, "Name")
+	@echo $(KERNEL_BIN)
+	$(call color_progress_prefix, "Size")
+	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
 
 ##------------------------------------------------------------------------------
-## Build the documentation
+## Generate the documentation
 ##------------------------------------------------------------------------------
 doc:
-	$(call colorecho, "\nGenerating docs")
+	$(call color_header, "Generating docs")
 	@$(DOC_CMD) --document-private-items --open
 
 ##------------------------------------------------------------------------------
@@ -130,12 +149,12 @@ doc:
 ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
 qemu:
-	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+	$(call color_header, "$(QEMU_MISSING_STRING)")
 
 else # QEMU is supported.
 
 qemu: $(KERNEL_BIN)
-	$(call colorecho, "\nLaunching QEMU")
+	$(call color_header, "Launching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 endif
 
@@ -155,14 +174,14 @@ clean:
 ## Run readelf
 ##------------------------------------------------------------------------------
 readelf: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching readelf")
+	$(call color_header, "Launching readelf")
 	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
 ##------------------------------------------------------------------------------
 ## Run objdump
 ##------------------------------------------------------------------------------
 objdump: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching objdump")
+	$(call color_header, "Launching objdump")
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
@@ -173,7 +192,7 @@ objdump: $(KERNEL_ELF)
 ## Run nm
 ##------------------------------------------------------------------------------
 nm: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching nm")
+	$(call color_header, "Launching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
 ##------------------------------------------------------------------------------
@@ -191,8 +210,8 @@ check:
 
 ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
-test_boot test :
-	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+test_boot test:
+	$(call color_header, "$(QEMU_MISSING_STRING)")
 
 else # QEMU is supported.
 
@@ -200,7 +219,7 @@ else # QEMU is supported.
 ## Run boot test
 ##------------------------------------------------------------------------------
 test_boot: $(KERNEL_BIN)
-	$(call colorecho, "\nBoot test - $(BSP)")
+	$(call color_header, "Boot test - $(BSP)")
 	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
 test: test_boot
diff --git a/05_drivers_gpio_uart/Makefile b/05_drivers_gpio_uart/Makefile
index 78fd8d2f6..aacf97714 100644
--- a/05_drivers_gpio_uart/Makefile
+++ b/05_drivers_gpio_uart/Makefile
@@ -2,7 +2,7 @@
 ##
 ## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/color.mk
+include ../common/format.mk
 include ../common/docker.mk
 
 ##--------------------------------------------------------------------------------------------------
@@ -52,10 +52,16 @@ export LD_SCRIPT_PATH
 
 
 ##--------------------------------------------------------------------------------------------------
-## Generic configuration values
+## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
 KERNEL_LINKER_SCRIPT = link.ld
-KERNEL_ELF           = target/$(TARGET)/release/kernel
+
+LAST_BUILD_CONFIG = target/$(BSP).build_config
+
+KERNEL_ELF      = target/$(TARGET)/release/kernel
+# This parses cargo's dep-info file.
+# https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
 
 
 
@@ -112,28 +118,41 @@ endif
 ##--------------------------------------------------------------------------------------------------
 ## Targets
 ##--------------------------------------------------------------------------------------------------
-.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu miniterm clippy clean readelf objdump nm check
+.PHONY: all doc qemu miniterm clippy clean readelf objdump nm check
 
 all: $(KERNEL_BIN)
 
 ##------------------------------------------------------------------------------
-## Build the kernel ELF
+## Save the configuration as a file, so make understands if it changed.
+##------------------------------------------------------------------------------
+$(LAST_BUILD_CONFIG):
+	@rm -f target/*.build_config
+	@mkdir -p target
+	@touch $(LAST_BUILD_CONFIG)
+
+##------------------------------------------------------------------------------
+## Compile the kernel ELF
 ##------------------------------------------------------------------------------
-$(KERNEL_ELF):
-	$(call colorecho, "\nCompiling kernel - $(BSP)")
+$(KERNEL_ELF): $(KERNEL_ELF_DEPS)
+	$(call color_header, "Compiling kernel ELF - $(BSP)")
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
 ##------------------------------------------------------------------------------
-## Build the stripped kernel binary
+## Generate the stripped kernel binary
 ##------------------------------------------------------------------------------
 $(KERNEL_BIN): $(KERNEL_ELF)
+	$(call color_header, "Generating stripped binary")
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
+	$(call color_progress_prefix, "Name")
+	@echo $(KERNEL_BIN)
+	$(call color_progress_prefix, "Size")
+	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
 
 ##------------------------------------------------------------------------------
-## Build the documentation
+## Generate the documentation
 ##------------------------------------------------------------------------------
 doc:
-	$(call colorecho, "\nGenerating docs")
+	$(call color_header, "Generating docs")
 	@$(DOC_CMD) --document-private-items --open
 
 ##------------------------------------------------------------------------------
@@ -142,13 +161,14 @@ doc:
 ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
 qemu:
-	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+	$(call color_header, "$(QEMU_MISSING_STRING)")
 
 else # QEMU is supported.
 
 qemu: $(KERNEL_BIN)
-	$(call colorecho, "\nLaunching QEMU")
+	$(call color_header, "Launching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
+
 endif
 
 ##------------------------------------------------------------------------------
@@ -173,14 +193,14 @@ clean:
 ## Run readelf
 ##------------------------------------------------------------------------------
 readelf: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching readelf")
+	$(call color_header, "Launching readelf")
 	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
 ##------------------------------------------------------------------------------
 ## Run objdump
 ##------------------------------------------------------------------------------
 objdump: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching objdump")
+	$(call color_header, "Launching objdump")
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
@@ -191,7 +211,7 @@ objdump: $(KERNEL_ELF)
 ## Run nm
 ##------------------------------------------------------------------------------
 nm: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching nm")
+	$(call color_header, "Launching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
 ##------------------------------------------------------------------------------
@@ -209,8 +229,8 @@ check:
 
 ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
-test_boot test :
-	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+test_boot test:
+	$(call color_header, "$(QEMU_MISSING_STRING)")
 
 else # QEMU is supported.
 
@@ -218,7 +238,7 @@ else # QEMU is supported.
 ## Run boot test
 ##------------------------------------------------------------------------------
 test_boot: $(KERNEL_BIN)
-	$(call colorecho, "\nBoot test - $(BSP)")
+	$(call color_header, "Boot test - $(BSP)")
 	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
 test: test_boot
diff --git a/05_drivers_gpio_uart/README.md b/05_drivers_gpio_uart/README.md
index 76840b67c..ccd4575e9 100644
--- a/05_drivers_gpio_uart/README.md
+++ b/05_drivers_gpio_uart/README.md
@@ -155,7 +155,7 @@ diff -uNr 04_safe_globals/Makefile 05_drivers_gpio_uart/Makefile
 
 
  ##--------------------------------------------------------------------------------------------------
-@@ -82,6 +85,7 @@
+@@ -88,6 +91,7 @@
 
  EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
  EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
@@ -163,7 +163,7 @@ diff -uNr 04_safe_globals/Makefile 05_drivers_gpio_uart/Makefile
 
  ##------------------------------------------------------------------------------
  ## Dockerization
-@@ -89,18 +93,26 @@
+@@ -95,18 +99,26 @@
  DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
  DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
  DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
@@ -186,12 +186,16 @@ diff -uNr 04_safe_globals/Makefile 05_drivers_gpio_uart/Makefile
  ##--------------------------------------------------------------------------------------------------
  ## Targets
  ##--------------------------------------------------------------------------------------------------
--.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu clippy clean readelf objdump nm check
-+.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu miniterm clippy clean readelf objdump nm check
+-.PHONY: all doc qemu clippy clean readelf objdump nm check
++.PHONY: all doc qemu miniterm clippy clean readelf objdump nm check
 
  all: $(KERNEL_BIN)
 
-@@ -140,6 +152,12 @@
+@@ -156,9 +168,16 @@
+ qemu: $(KERNEL_BIN)
+ 	$(call color_header, "Launching QEMU")
+ 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
++
  endif
 
  ##------------------------------------------------------------------------------
diff --git a/06_uart_chainloader/Makefile b/06_uart_chainloader/Makefile
index 99b464c81..b697a68d0 100644
--- a/06_uart_chainloader/Makefile
+++ b/06_uart_chainloader/Makefile
@@ -2,7 +2,7 @@
 ##
 ## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/color.mk
+include ../common/format.mk
 include ../common/docker.mk
 
 ##--------------------------------------------------------------------------------------------------
@@ -54,10 +54,16 @@ export LD_SCRIPT_PATH
 
 
 ##--------------------------------------------------------------------------------------------------
-## Generic configuration values
+## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
 KERNEL_LINKER_SCRIPT = link.ld
-KERNEL_ELF           = target/$(TARGET)/release/kernel
+
+LAST_BUILD_CONFIG = target/$(BSP).build_config
+
+KERNEL_ELF      = target/$(TARGET)/release/kernel
+# This parses cargo's dep-info file.
+# https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
 
 
 
@@ -114,28 +120,41 @@ endif
 ##--------------------------------------------------------------------------------------------------
 ## Targets
 ##--------------------------------------------------------------------------------------------------
-.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu chainboot clippy clean readelf objdump nm check
+.PHONY: all doc qemu chainboot clippy clean readelf objdump nm check
 
 all: $(KERNEL_BIN)
 
 ##------------------------------------------------------------------------------
-## Build the kernel ELF
+## Save the configuration as a file, so make understands if it changed.
+##------------------------------------------------------------------------------
+$(LAST_BUILD_CONFIG):
+	@rm -f target/*.build_config
+	@mkdir -p target
+	@touch $(LAST_BUILD_CONFIG)
+
+##------------------------------------------------------------------------------
+## Compile the kernel ELF
 ##------------------------------------------------------------------------------
-$(KERNEL_ELF):
-	$(call colorecho, "\nCompiling kernel - $(BSP)")
+$(KERNEL_ELF): $(KERNEL_ELF_DEPS)
+	$(call color_header, "Compiling kernel ELF - $(BSP)")
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
 ##------------------------------------------------------------------------------
-## Build the stripped kernel binary
+## Generate the stripped kernel binary
 ##------------------------------------------------------------------------------
 $(KERNEL_BIN): $(KERNEL_ELF)
+	$(call color_header, "Generating stripped binary")
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
+	$(call color_progress_prefix, "Name")
+	@echo $(KERNEL_BIN)
+	$(call color_progress_prefix, "Size")
+	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
 
 ##------------------------------------------------------------------------------
-## Build the documentation
+## Generate the documentation
 ##------------------------------------------------------------------------------
 doc:
-	$(call colorecho, "\nGenerating docs")
+	$(call color_header, "Generating docs")
 	@$(DOC_CMD) --document-private-items --open
 
 ##------------------------------------------------------------------------------
@@ -144,16 +163,16 @@ doc:
 ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
 qemu qemuasm:
-	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+	$(call color_header, "$(QEMU_MISSING_STRING)")
 
 else # QEMU is supported.
 
 qemu: $(KERNEL_BIN)
-	$(call colorecho, "\nLaunching QEMU")
+	$(call color_header, "Launching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
 qemuasm: $(KERNEL_BIN)
-	$(call colorecho, "\nLaunching QEMU with ASM output")
+	$(call color_header, "Launching QEMU with ASM output")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN) -d in_asm
 
 endif
@@ -180,14 +199,14 @@ clean:
 ## Run readelf
 ##------------------------------------------------------------------------------
 readelf: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching readelf")
+	$(call color_header, "Launching readelf")
 	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
 ##------------------------------------------------------------------------------
 ## Run objdump
 ##------------------------------------------------------------------------------
 objdump: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching objdump")
+	$(call color_header, "Launching objdump")
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
@@ -198,7 +217,7 @@ objdump: $(KERNEL_ELF)
 ## Run nm
 ##------------------------------------------------------------------------------
 nm: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching nm")
+	$(call color_header, "Launching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
 ##------------------------------------------------------------------------------
@@ -216,8 +235,8 @@ check:
 
 ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
-test_boot test :
-	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+test_boot test:
+	$(call color_header, "$(QEMU_MISSING_STRING)")
 
 else # QEMU is supported.
 
@@ -225,7 +244,7 @@ else # QEMU is supported.
 ## Run boot test
 ##------------------------------------------------------------------------------
 test_boot: $(KERNEL_BIN)
-	$(call colorecho, "\nBoot test - $(BSP)")
+	$(call color_header, "Boot test - $(BSP)")
 	@$(DOCKER_TEST) $(EXEC_TEST_MINIPUSH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) \
 		-kernel $(KERNEL_BIN) $(CHAINBOOT_DEMO_PAYLOAD)
 
diff --git a/06_uart_chainloader/README.md b/06_uart_chainloader/README.md
index 81d93d120..cec774769 100644
--- a/06_uart_chainloader/README.md
+++ b/06_uart_chainloader/README.md
@@ -186,7 +186,7 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
  endif
 
  # Export for build.rs.
-@@ -84,8 +86,8 @@
+@@ -90,8 +92,8 @@
      -O binary
 
  EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
@@ -197,7 +197,7 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
 
  ##------------------------------------------------------------------------------
  ## Dockerization
-@@ -104,7 +106,7 @@
+@@ -110,7 +112,7 @@
  ifeq ($(shell uname -s),Linux)
      DOCKER_CMD_DEV = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DEV)
 
@@ -206,31 +206,30 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
  endif
 
 
-@@ -112,7 +114,7 @@
+@@ -118,7 +120,7 @@
  ##--------------------------------------------------------------------------------------------------
  ## Targets
  ##--------------------------------------------------------------------------------------------------
--.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu miniterm clippy clean readelf objdump nm check
-+.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu chainboot clippy clean readelf objdump nm check
+-.PHONY: all doc qemu miniterm clippy clean readelf objdump nm check
++.PHONY: all doc qemu chainboot clippy clean readelf objdump nm check
 
  all: $(KERNEL_BIN)
 
-@@ -141,7 +143,7 @@
+@@ -160,7 +162,7 @@
  ##------------------------------------------------------------------------------
  ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
 -qemu:
 +qemu qemuasm:
- 	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+ 	$(call color_header, "$(QEMU_MISSING_STRING)")
 
  else # QEMU is supported.
-@@ -149,13 +151,18 @@
- qemu: $(KERNEL_BIN)
- 	$(call colorecho, "\nLaunching QEMU")
+@@ -169,13 +171,17 @@
+ 	$(call color_header, "Launching QEMU")
  	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
-+
+
 +qemuasm: $(KERNEL_BIN)
-+	$(call colorecho, "\nLaunching QEMU with ASM output")
++	$(call color_header, "Launching QEMU with ASM output")
 +	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN) -d in_asm
 +
  endif
@@ -246,10 +245,10 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
 
  ##------------------------------------------------------------------------------
  ## Run clippy
-@@ -219,7 +226,8 @@
+@@ -239,7 +245,8 @@
  ##------------------------------------------------------------------------------
  test_boot: $(KERNEL_BIN)
- 	$(call colorecho, "\nBoot test - $(BSP)")
+ 	$(call color_header, "Boot test - $(BSP)")
 -	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 +	@$(DOCKER_TEST) $(EXEC_TEST_MINIPUSH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) \
 +		-kernel $(KERNEL_BIN) $(CHAINBOOT_DEMO_PAYLOAD)
diff --git a/07_timestamps/Makefile b/07_timestamps/Makefile
index 562ccfa68..1f2158e6c 100644
--- a/07_timestamps/Makefile
+++ b/07_timestamps/Makefile
@@ -2,7 +2,7 @@
 ##
 ## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/color.mk
+include ../common/format.mk
 include ../common/docker.mk
 
 ##--------------------------------------------------------------------------------------------------
@@ -52,10 +52,16 @@ export LD_SCRIPT_PATH
 
 
 ##--------------------------------------------------------------------------------------------------
-## Generic configuration values
+## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
 KERNEL_LINKER_SCRIPT = link.ld
-KERNEL_ELF           = target/$(TARGET)/release/kernel
+
+LAST_BUILD_CONFIG = target/$(BSP).build_config
+
+KERNEL_ELF      = target/$(TARGET)/release/kernel
+# This parses cargo's dep-info file.
+# https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
 
 
 
@@ -112,28 +118,41 @@ endif
 ##--------------------------------------------------------------------------------------------------
 ## Targets
 ##--------------------------------------------------------------------------------------------------
-.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu chainboot clippy clean readelf objdump nm check
+.PHONY: all doc qemu chainboot clippy clean readelf objdump nm check
 
 all: $(KERNEL_BIN)
 
 ##------------------------------------------------------------------------------
-## Build the kernel ELF
+## Save the configuration as a file, so make understands if it changed.
+##------------------------------------------------------------------------------
+$(LAST_BUILD_CONFIG):
+	@rm -f target/*.build_config
+	@mkdir -p target
+	@touch $(LAST_BUILD_CONFIG)
+
+##------------------------------------------------------------------------------
+## Compile the kernel ELF
 ##------------------------------------------------------------------------------
-$(KERNEL_ELF):
-	$(call colorecho, "\nCompiling kernel - $(BSP)")
+$(KERNEL_ELF): $(KERNEL_ELF_DEPS)
+	$(call color_header, "Compiling kernel ELF - $(BSP)")
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
 ##------------------------------------------------------------------------------
-## Build the stripped kernel binary
+## Generate the stripped kernel binary
 ##------------------------------------------------------------------------------
 $(KERNEL_BIN): $(KERNEL_ELF)
+	$(call color_header, "Generating stripped binary")
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
+	$(call color_progress_prefix, "Name")
+	@echo $(KERNEL_BIN)
+	$(call color_progress_prefix, "Size")
+	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
 
 ##------------------------------------------------------------------------------
-## Build the documentation
+## Generate the documentation
 ##------------------------------------------------------------------------------
 doc:
-	$(call colorecho, "\nGenerating docs")
+	$(call color_header, "Generating docs")
 	@$(DOC_CMD) --document-private-items --open
 
 ##------------------------------------------------------------------------------
@@ -142,12 +161,12 @@ doc:
 ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
 qemu:
-	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+	$(call color_header, "$(QEMU_MISSING_STRING)")
 
 else # QEMU is supported.
 
 qemu: $(KERNEL_BIN)
-	$(call colorecho, "\nLaunching QEMU")
+	$(call color_header, "Launching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
 endif
@@ -174,14 +193,14 @@ clean:
 ## Run readelf
 ##------------------------------------------------------------------------------
 readelf: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching readelf")
+	$(call color_header, "Launching readelf")
 	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
 ##------------------------------------------------------------------------------
 ## Run objdump
 ##------------------------------------------------------------------------------
 objdump: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching objdump")
+	$(call color_header, "Launching objdump")
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
@@ -192,7 +211,7 @@ objdump: $(KERNEL_ELF)
 ## Run nm
 ##------------------------------------------------------------------------------
 nm: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching nm")
+	$(call color_header, "Launching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
 ##------------------------------------------------------------------------------
@@ -210,8 +229,8 @@ check:
 
 ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
-test_boot test :
-	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+test_boot test:
+	$(call color_header, "$(QEMU_MISSING_STRING)")
 
 else # QEMU is supported.
 
@@ -219,7 +238,7 @@ else # QEMU is supported.
 ## Run boot test
 ##------------------------------------------------------------------------------
 test_boot: $(KERNEL_BIN)
-	$(call colorecho, "\nBoot test - $(BSP)")
+	$(call color_header, "Boot test - $(BSP)")
 	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
 test: test_boot
diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index f8d67d40c..d5e50466a 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -110,7 +110,7 @@ diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
  endif
 
  # Export for build.rs.
-@@ -86,7 +84,7 @@
+@@ -92,7 +90,7 @@
      -O binary
 
  EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
@@ -119,21 +119,21 @@ diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
  EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
 
  ##------------------------------------------------------------------------------
-@@ -143,7 +141,7 @@
+@@ -162,7 +160,7 @@
  ##------------------------------------------------------------------------------
  ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
 -qemu qemuasm:
 +qemu:
- 	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+ 	$(call color_header, "$(QEMU_MISSING_STRING)")
 
  else # QEMU is supported.
-@@ -152,17 +150,13 @@
- 	$(call colorecho, "\nLaunching QEMU")
+@@ -171,17 +169,13 @@
+ 	$(call color_header, "Launching QEMU")
  	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
 -qemuasm: $(KERNEL_BIN)
--	$(call colorecho, "\nLaunching QEMU with ASM output")
+-	$(call color_header, "Launching QEMU with ASM output")
 -	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN) -d in_asm
 -
  endif
@@ -147,10 +147,10 @@ diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
 
  ##------------------------------------------------------------------------------
  ## Run clippy
-@@ -226,8 +220,7 @@
+@@ -245,8 +239,7 @@
  ##------------------------------------------------------------------------------
  test_boot: $(KERNEL_BIN)
- 	$(call colorecho, "\nBoot test - $(BSP)")
+ 	$(call color_header, "Boot test - $(BSP)")
 -	@$(DOCKER_TEST) $(EXEC_TEST_MINIPUSH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) \
 -		-kernel $(KERNEL_BIN) $(CHAINBOOT_DEMO_PAYLOAD)
 +	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
diff --git a/08_hw_debug_JTAG/Makefile b/08_hw_debug_JTAG/Makefile
index 1ec96d4ac..813a6112a 100644
--- a/08_hw_debug_JTAG/Makefile
+++ b/08_hw_debug_JTAG/Makefile
@@ -2,7 +2,7 @@
 ##
 ## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/color.mk
+include ../common/format.mk
 include ../common/docker.mk
 
 ##--------------------------------------------------------------------------------------------------
@@ -56,10 +56,16 @@ export LD_SCRIPT_PATH
 
 
 ##--------------------------------------------------------------------------------------------------
-## Generic configuration values
+## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
 KERNEL_LINKER_SCRIPT = link.ld
-KERNEL_ELF           = target/$(TARGET)/release/kernel
+
+LAST_BUILD_CONFIG = target/$(BSP).build_config
+
+KERNEL_ELF      = target/$(TARGET)/release/kernel
+# This parses cargo's dep-info file.
+# https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
 
 
 
@@ -123,28 +129,41 @@ endif
 ##--------------------------------------------------------------------------------------------------
 ## Targets
 ##--------------------------------------------------------------------------------------------------
-.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu chainboot clippy clean readelf objdump nm check
+.PHONY: all doc qemu chainboot clippy clean readelf objdump nm check
 
 all: $(KERNEL_BIN)
 
 ##------------------------------------------------------------------------------
-## Build the kernel ELF
+## Save the configuration as a file, so make understands if it changed.
+##------------------------------------------------------------------------------
+$(LAST_BUILD_CONFIG):
+	@rm -f target/*.build_config
+	@mkdir -p target
+	@touch $(LAST_BUILD_CONFIG)
+
+##------------------------------------------------------------------------------
+## Compile the kernel ELF
 ##------------------------------------------------------------------------------
-$(KERNEL_ELF):
-	$(call colorecho, "\nCompiling kernel - $(BSP)")
+$(KERNEL_ELF): $(KERNEL_ELF_DEPS)
+	$(call color_header, "Compiling kernel ELF - $(BSP)")
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
 ##------------------------------------------------------------------------------
-## Build the stripped kernel binary
+## Generate the stripped kernel binary
 ##------------------------------------------------------------------------------
 $(KERNEL_BIN): $(KERNEL_ELF)
+	$(call color_header, "Generating stripped binary")
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
+	$(call color_progress_prefix, "Name")
+	@echo $(KERNEL_BIN)
+	$(call color_progress_prefix, "Size")
+	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
 
 ##------------------------------------------------------------------------------
-## Build the documentation
+## Generate the documentation
 ##------------------------------------------------------------------------------
 doc:
-	$(call colorecho, "\nGenerating docs")
+	$(call color_header, "Generating docs")
 	@$(DOC_CMD) --document-private-items --open
 
 ##------------------------------------------------------------------------------
@@ -153,12 +172,12 @@ doc:
 ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
 qemu:
-	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+	$(call color_header, "$(QEMU_MISSING_STRING)")
 
 else # QEMU is supported.
 
 qemu: $(KERNEL_BIN)
-	$(call colorecho, "\nLaunching QEMU")
+	$(call color_header, "Launching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
 endif
@@ -185,14 +204,14 @@ clean:
 ## Run readelf
 ##------------------------------------------------------------------------------
 readelf: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching readelf")
+	$(call color_header, "Launching readelf")
 	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
 ##------------------------------------------------------------------------------
 ## Run objdump
 ##------------------------------------------------------------------------------
 objdump: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching objdump")
+	$(call color_header, "Launching objdump")
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
@@ -203,7 +222,7 @@ objdump: $(KERNEL_ELF)
 ## Run nm
 ##------------------------------------------------------------------------------
 nm: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching nm")
+	$(call color_header, "Launching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
 ##------------------------------------------------------------------------------
@@ -229,7 +248,7 @@ jtagboot:
 ## Start OpenOCD session
 ##------------------------------------------------------------------------------
 openocd:
-	$(call colorecho, "\nLaunching OpenOCD")
+	$(call color_header, "Launching OpenOCD")
 	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
 
 ##------------------------------------------------------------------------------
@@ -238,7 +257,7 @@ openocd:
 gdb: RUSTC_MISC_ARGS += -C debuginfo=2
 gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
 gdb gdb-opt0: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching GDB")
+	$(call color_header, "Launching GDB")
 	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
 
 
@@ -250,8 +269,8 @@ gdb gdb-opt0: $(KERNEL_ELF)
 
 ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
-test_boot test :
-	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+test_boot test:
+	$(call color_header, "$(QEMU_MISSING_STRING)")
 
 else # QEMU is supported.
 
@@ -259,7 +278,7 @@ else # QEMU is supported.
 ## Run boot test
 ##------------------------------------------------------------------------------
 test_boot: $(KERNEL_BIN)
-	$(call colorecho, "\nBoot test - $(BSP)")
+	$(call color_header, "Boot test - $(BSP)")
 	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
 test: test_boot
diff --git a/08_hw_debug_JTAG/README.md b/08_hw_debug_JTAG/README.md
index ea116a8b6..33fa69b2e 100644
--- a/08_hw_debug_JTAG/README.md
+++ b/08_hw_debug_JTAG/README.md
@@ -338,7 +338,7 @@ diff -uNr 07_timestamps/Makefile 08_hw_debug_JTAG/Makefile
      LD_SCRIPT_PATH    = src/bsp/raspberrypi
      RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
  endif
-@@ -93,18 +97,25 @@
+@@ -99,18 +103,25 @@
  DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
  DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
  DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
@@ -364,7 +364,7 @@ diff -uNr 07_timestamps/Makefile 08_hw_debug_JTAG/Makefile
  endif
 
 
-@@ -203,6 +214,35 @@
+@@ -222,6 +233,35 @@
 
 
 
@@ -383,7 +383,7 @@ diff -uNr 07_timestamps/Makefile 08_hw_debug_JTAG/Makefile
 +## Start OpenOCD session
 +##------------------------------------------------------------------------------
 +openocd:
-+	$(call colorecho, "\nLaunching OpenOCD")
++	$(call color_header, "Launching OpenOCD")
 +	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
 +
 +##------------------------------------------------------------------------------
@@ -392,7 +392,7 @@ diff -uNr 07_timestamps/Makefile 08_hw_debug_JTAG/Makefile
 +gdb: RUSTC_MISC_ARGS += -C debuginfo=2
 +gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
 +gdb gdb-opt0: $(KERNEL_ELF)
-+	$(call colorecho, "\nLaunching GDB")
++	$(call color_header, "Launching GDB")
 +	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
 +
 +
diff --git a/09_privilege_level/Makefile b/09_privilege_level/Makefile
index 1ec96d4ac..813a6112a 100644
--- a/09_privilege_level/Makefile
+++ b/09_privilege_level/Makefile
@@ -2,7 +2,7 @@
 ##
 ## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/color.mk
+include ../common/format.mk
 include ../common/docker.mk
 
 ##--------------------------------------------------------------------------------------------------
@@ -56,10 +56,16 @@ export LD_SCRIPT_PATH
 
 
 ##--------------------------------------------------------------------------------------------------
-## Generic configuration values
+## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
 KERNEL_LINKER_SCRIPT = link.ld
-KERNEL_ELF           = target/$(TARGET)/release/kernel
+
+LAST_BUILD_CONFIG = target/$(BSP).build_config
+
+KERNEL_ELF      = target/$(TARGET)/release/kernel
+# This parses cargo's dep-info file.
+# https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
 
 
 
@@ -123,28 +129,41 @@ endif
 ##--------------------------------------------------------------------------------------------------
 ## Targets
 ##--------------------------------------------------------------------------------------------------
-.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu chainboot clippy clean readelf objdump nm check
+.PHONY: all doc qemu chainboot clippy clean readelf objdump nm check
 
 all: $(KERNEL_BIN)
 
 ##------------------------------------------------------------------------------
-## Build the kernel ELF
+## Save the configuration as a file, so make understands if it changed.
+##------------------------------------------------------------------------------
+$(LAST_BUILD_CONFIG):
+	@rm -f target/*.build_config
+	@mkdir -p target
+	@touch $(LAST_BUILD_CONFIG)
+
+##------------------------------------------------------------------------------
+## Compile the kernel ELF
 ##------------------------------------------------------------------------------
-$(KERNEL_ELF):
-	$(call colorecho, "\nCompiling kernel - $(BSP)")
+$(KERNEL_ELF): $(KERNEL_ELF_DEPS)
+	$(call color_header, "Compiling kernel ELF - $(BSP)")
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
 ##------------------------------------------------------------------------------
-## Build the stripped kernel binary
+## Generate the stripped kernel binary
 ##------------------------------------------------------------------------------
 $(KERNEL_BIN): $(KERNEL_ELF)
+	$(call color_header, "Generating stripped binary")
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
+	$(call color_progress_prefix, "Name")
+	@echo $(KERNEL_BIN)
+	$(call color_progress_prefix, "Size")
+	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
 
 ##------------------------------------------------------------------------------
-## Build the documentation
+## Generate the documentation
 ##------------------------------------------------------------------------------
 doc:
-	$(call colorecho, "\nGenerating docs")
+	$(call color_header, "Generating docs")
 	@$(DOC_CMD) --document-private-items --open
 
 ##------------------------------------------------------------------------------
@@ -153,12 +172,12 @@ doc:
 ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
 qemu:
-	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+	$(call color_header, "$(QEMU_MISSING_STRING)")
 
 else # QEMU is supported.
 
 qemu: $(KERNEL_BIN)
-	$(call colorecho, "\nLaunching QEMU")
+	$(call color_header, "Launching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
 endif
@@ -185,14 +204,14 @@ clean:
 ## Run readelf
 ##------------------------------------------------------------------------------
 readelf: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching readelf")
+	$(call color_header, "Launching readelf")
 	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
 ##------------------------------------------------------------------------------
 ## Run objdump
 ##------------------------------------------------------------------------------
 objdump: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching objdump")
+	$(call color_header, "Launching objdump")
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
@@ -203,7 +222,7 @@ objdump: $(KERNEL_ELF)
 ## Run nm
 ##------------------------------------------------------------------------------
 nm: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching nm")
+	$(call color_header, "Launching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
 ##------------------------------------------------------------------------------
@@ -229,7 +248,7 @@ jtagboot:
 ## Start OpenOCD session
 ##------------------------------------------------------------------------------
 openocd:
-	$(call colorecho, "\nLaunching OpenOCD")
+	$(call color_header, "Launching OpenOCD")
 	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
 
 ##------------------------------------------------------------------------------
@@ -238,7 +257,7 @@ openocd:
 gdb: RUSTC_MISC_ARGS += -C debuginfo=2
 gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
 gdb gdb-opt0: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching GDB")
+	$(call color_header, "Launching GDB")
 	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
 
 
@@ -250,8 +269,8 @@ gdb gdb-opt0: $(KERNEL_ELF)
 
 ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
-test_boot test :
-	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+test_boot test:
+	$(call color_header, "$(QEMU_MISSING_STRING)")
 
 else # QEMU is supported.
 
@@ -259,7 +278,7 @@ else # QEMU is supported.
 ## Run boot test
 ##------------------------------------------------------------------------------
 test_boot: $(KERNEL_BIN)
-	$(call colorecho, "\nBoot test - $(BSP)")
+	$(call color_header, "Boot test - $(BSP)")
 	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
 test: test_boot
diff --git a/10_virtual_mem_part1_identity_mapping/Makefile b/10_virtual_mem_part1_identity_mapping/Makefile
index 1ec96d4ac..813a6112a 100644
--- a/10_virtual_mem_part1_identity_mapping/Makefile
+++ b/10_virtual_mem_part1_identity_mapping/Makefile
@@ -2,7 +2,7 @@
 ##
 ## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/color.mk
+include ../common/format.mk
 include ../common/docker.mk
 
 ##--------------------------------------------------------------------------------------------------
@@ -56,10 +56,16 @@ export LD_SCRIPT_PATH
 
 
 ##--------------------------------------------------------------------------------------------------
-## Generic configuration values
+## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
 KERNEL_LINKER_SCRIPT = link.ld
-KERNEL_ELF           = target/$(TARGET)/release/kernel
+
+LAST_BUILD_CONFIG = target/$(BSP).build_config
+
+KERNEL_ELF      = target/$(TARGET)/release/kernel
+# This parses cargo's dep-info file.
+# https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
 
 
 
@@ -123,28 +129,41 @@ endif
 ##--------------------------------------------------------------------------------------------------
 ## Targets
 ##--------------------------------------------------------------------------------------------------
-.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu chainboot clippy clean readelf objdump nm check
+.PHONY: all doc qemu chainboot clippy clean readelf objdump nm check
 
 all: $(KERNEL_BIN)
 
 ##------------------------------------------------------------------------------
-## Build the kernel ELF
+## Save the configuration as a file, so make understands if it changed.
+##------------------------------------------------------------------------------
+$(LAST_BUILD_CONFIG):
+	@rm -f target/*.build_config
+	@mkdir -p target
+	@touch $(LAST_BUILD_CONFIG)
+
+##------------------------------------------------------------------------------
+## Compile the kernel ELF
 ##------------------------------------------------------------------------------
-$(KERNEL_ELF):
-	$(call colorecho, "\nCompiling kernel - $(BSP)")
+$(KERNEL_ELF): $(KERNEL_ELF_DEPS)
+	$(call color_header, "Compiling kernel ELF - $(BSP)")
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
 ##------------------------------------------------------------------------------
-## Build the stripped kernel binary
+## Generate the stripped kernel binary
 ##------------------------------------------------------------------------------
 $(KERNEL_BIN): $(KERNEL_ELF)
+	$(call color_header, "Generating stripped binary")
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
+	$(call color_progress_prefix, "Name")
+	@echo $(KERNEL_BIN)
+	$(call color_progress_prefix, "Size")
+	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
 
 ##------------------------------------------------------------------------------
-## Build the documentation
+## Generate the documentation
 ##------------------------------------------------------------------------------
 doc:
-	$(call colorecho, "\nGenerating docs")
+	$(call color_header, "Generating docs")
 	@$(DOC_CMD) --document-private-items --open
 
 ##------------------------------------------------------------------------------
@@ -153,12 +172,12 @@ doc:
 ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
 qemu:
-	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+	$(call color_header, "$(QEMU_MISSING_STRING)")
 
 else # QEMU is supported.
 
 qemu: $(KERNEL_BIN)
-	$(call colorecho, "\nLaunching QEMU")
+	$(call color_header, "Launching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
 endif
@@ -185,14 +204,14 @@ clean:
 ## Run readelf
 ##------------------------------------------------------------------------------
 readelf: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching readelf")
+	$(call color_header, "Launching readelf")
 	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
 ##------------------------------------------------------------------------------
 ## Run objdump
 ##------------------------------------------------------------------------------
 objdump: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching objdump")
+	$(call color_header, "Launching objdump")
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
@@ -203,7 +222,7 @@ objdump: $(KERNEL_ELF)
 ## Run nm
 ##------------------------------------------------------------------------------
 nm: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching nm")
+	$(call color_header, "Launching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
 ##------------------------------------------------------------------------------
@@ -229,7 +248,7 @@ jtagboot:
 ## Start OpenOCD session
 ##------------------------------------------------------------------------------
 openocd:
-	$(call colorecho, "\nLaunching OpenOCD")
+	$(call color_header, "Launching OpenOCD")
 	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
 
 ##------------------------------------------------------------------------------
@@ -238,7 +257,7 @@ openocd:
 gdb: RUSTC_MISC_ARGS += -C debuginfo=2
 gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
 gdb gdb-opt0: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching GDB")
+	$(call color_header, "Launching GDB")
 	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
 
 
@@ -250,8 +269,8 @@ gdb gdb-opt0: $(KERNEL_ELF)
 
 ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
-test_boot test :
-	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+test_boot test:
+	$(call color_header, "$(QEMU_MISSING_STRING)")
 
 else # QEMU is supported.
 
@@ -259,7 +278,7 @@ else # QEMU is supported.
 ## Run boot test
 ##------------------------------------------------------------------------------
 test_boot: $(KERNEL_BIN)
-	$(call colorecho, "\nBoot test - $(BSP)")
+	$(call color_header, "Boot test - $(BSP)")
 	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
 test: test_boot
diff --git a/11_exceptions_part1_groundwork/Makefile b/11_exceptions_part1_groundwork/Makefile
index 1ec96d4ac..813a6112a 100644
--- a/11_exceptions_part1_groundwork/Makefile
+++ b/11_exceptions_part1_groundwork/Makefile
@@ -2,7 +2,7 @@
 ##
 ## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/color.mk
+include ../common/format.mk
 include ../common/docker.mk
 
 ##--------------------------------------------------------------------------------------------------
@@ -56,10 +56,16 @@ export LD_SCRIPT_PATH
 
 
 ##--------------------------------------------------------------------------------------------------
-## Generic configuration values
+## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
 KERNEL_LINKER_SCRIPT = link.ld
-KERNEL_ELF           = target/$(TARGET)/release/kernel
+
+LAST_BUILD_CONFIG = target/$(BSP).build_config
+
+KERNEL_ELF      = target/$(TARGET)/release/kernel
+# This parses cargo's dep-info file.
+# https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
 
 
 
@@ -123,28 +129,41 @@ endif
 ##--------------------------------------------------------------------------------------------------
 ## Targets
 ##--------------------------------------------------------------------------------------------------
-.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu chainboot clippy clean readelf objdump nm check
+.PHONY: all doc qemu chainboot clippy clean readelf objdump nm check
 
 all: $(KERNEL_BIN)
 
 ##------------------------------------------------------------------------------
-## Build the kernel ELF
+## Save the configuration as a file, so make understands if it changed.
+##------------------------------------------------------------------------------
+$(LAST_BUILD_CONFIG):
+	@rm -f target/*.build_config
+	@mkdir -p target
+	@touch $(LAST_BUILD_CONFIG)
+
+##------------------------------------------------------------------------------
+## Compile the kernel ELF
 ##------------------------------------------------------------------------------
-$(KERNEL_ELF):
-	$(call colorecho, "\nCompiling kernel - $(BSP)")
+$(KERNEL_ELF): $(KERNEL_ELF_DEPS)
+	$(call color_header, "Compiling kernel ELF - $(BSP)")
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
 ##------------------------------------------------------------------------------
-## Build the stripped kernel binary
+## Generate the stripped kernel binary
 ##------------------------------------------------------------------------------
 $(KERNEL_BIN): $(KERNEL_ELF)
+	$(call color_header, "Generating stripped binary")
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
+	$(call color_progress_prefix, "Name")
+	@echo $(KERNEL_BIN)
+	$(call color_progress_prefix, "Size")
+	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
 
 ##------------------------------------------------------------------------------
-## Build the documentation
+## Generate the documentation
 ##------------------------------------------------------------------------------
 doc:
-	$(call colorecho, "\nGenerating docs")
+	$(call color_header, "Generating docs")
 	@$(DOC_CMD) --document-private-items --open
 
 ##------------------------------------------------------------------------------
@@ -153,12 +172,12 @@ doc:
 ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
 qemu:
-	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+	$(call color_header, "$(QEMU_MISSING_STRING)")
 
 else # QEMU is supported.
 
 qemu: $(KERNEL_BIN)
-	$(call colorecho, "\nLaunching QEMU")
+	$(call color_header, "Launching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
 endif
@@ -185,14 +204,14 @@ clean:
 ## Run readelf
 ##------------------------------------------------------------------------------
 readelf: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching readelf")
+	$(call color_header, "Launching readelf")
 	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
 ##------------------------------------------------------------------------------
 ## Run objdump
 ##------------------------------------------------------------------------------
 objdump: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching objdump")
+	$(call color_header, "Launching objdump")
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
@@ -203,7 +222,7 @@ objdump: $(KERNEL_ELF)
 ## Run nm
 ##------------------------------------------------------------------------------
 nm: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching nm")
+	$(call color_header, "Launching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
 ##------------------------------------------------------------------------------
@@ -229,7 +248,7 @@ jtagboot:
 ## Start OpenOCD session
 ##------------------------------------------------------------------------------
 openocd:
-	$(call colorecho, "\nLaunching OpenOCD")
+	$(call color_header, "Launching OpenOCD")
 	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
 
 ##------------------------------------------------------------------------------
@@ -238,7 +257,7 @@ openocd:
 gdb: RUSTC_MISC_ARGS += -C debuginfo=2
 gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
 gdb gdb-opt0: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching GDB")
+	$(call color_header, "Launching GDB")
 	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
 
 
@@ -250,8 +269,8 @@ gdb gdb-opt0: $(KERNEL_ELF)
 
 ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
-test_boot test :
-	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+test_boot test:
+	$(call color_header, "$(QEMU_MISSING_STRING)")
 
 else # QEMU is supported.
 
@@ -259,7 +278,7 @@ else # QEMU is supported.
 ## Run boot test
 ##------------------------------------------------------------------------------
 test_boot: $(KERNEL_BIN)
-	$(call colorecho, "\nBoot test - $(BSP)")
+	$(call color_header, "Boot test - $(BSP)")
 	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
 test: test_boot
diff --git a/12_integrated_testing/Makefile b/12_integrated_testing/Makefile
index a1db677bd..4e499306f 100644
--- a/12_integrated_testing/Makefile
+++ b/12_integrated_testing/Makefile
@@ -2,7 +2,7 @@
 ##
 ## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/color.mk
+include ../common/format.mk
 include ../common/docker.mk
 
 ##--------------------------------------------------------------------------------------------------
@@ -65,10 +65,16 @@ export LD_SCRIPT_PATH
 
 
 ##--------------------------------------------------------------------------------------------------
-## Generic configuration values
+## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
 KERNEL_LINKER_SCRIPT = link.ld
-KERNEL_ELF           = target/$(TARGET)/release/kernel
+
+LAST_BUILD_CONFIG = target/$(BSP).build_config
+
+KERNEL_ELF      = target/$(TARGET)/release/kernel
+# This parses cargo's dep-info file.
+# https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
 
 
 
@@ -133,28 +139,41 @@ endif
 ##--------------------------------------------------------------------------------------------------
 ## Targets
 ##--------------------------------------------------------------------------------------------------
-.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu chainboot clippy clean readelf objdump nm check
+.PHONY: all doc qemu chainboot clippy clean readelf objdump nm check
 
 all: $(KERNEL_BIN)
 
 ##------------------------------------------------------------------------------
-## Build the kernel ELF
+## Save the configuration as a file, so make understands if it changed.
+##------------------------------------------------------------------------------
+$(LAST_BUILD_CONFIG):
+	@rm -f target/*.build_config
+	@mkdir -p target
+	@touch $(LAST_BUILD_CONFIG)
+
+##------------------------------------------------------------------------------
+## Compile the kernel ELF
 ##------------------------------------------------------------------------------
-$(KERNEL_ELF):
-	$(call colorecho, "\nCompiling kernel - $(BSP)")
+$(KERNEL_ELF): $(KERNEL_ELF_DEPS)
+	$(call color_header, "Compiling kernel ELF - $(BSP)")
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
 ##------------------------------------------------------------------------------
-## Build the stripped kernel binary
+## Generate the stripped kernel binary
 ##------------------------------------------------------------------------------
 $(KERNEL_BIN): $(KERNEL_ELF)
+	$(call color_header, "Generating stripped binary")
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
+	$(call color_progress_prefix, "Name")
+	@echo $(KERNEL_BIN)
+	$(call color_progress_prefix, "Size")
+	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
 
 ##------------------------------------------------------------------------------
-## Build the documentation
+## Generate the documentation
 ##------------------------------------------------------------------------------
 doc:
-	$(call colorecho, "\nGenerating docs")
+	$(call color_header, "Generating docs")
 	@$(DOC_CMD) --document-private-items --open
 
 ##------------------------------------------------------------------------------
@@ -163,12 +182,12 @@ doc:
 ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
 qemu:
-	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+	$(call color_header, "$(QEMU_MISSING_STRING)")
 
 else # QEMU is supported.
 
 qemu: $(KERNEL_BIN)
-	$(call colorecho, "\nLaunching QEMU")
+	$(call color_header, "Launching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
 endif
@@ -195,14 +214,14 @@ clean:
 ## Run readelf
 ##------------------------------------------------------------------------------
 readelf: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching readelf")
+	$(call color_header, "Launching readelf")
 	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
 ##------------------------------------------------------------------------------
 ## Run objdump
 ##------------------------------------------------------------------------------
 objdump: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching objdump")
+	$(call color_header, "Launching objdump")
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
@@ -213,7 +232,7 @@ objdump: $(KERNEL_ELF)
 ## Run nm
 ##------------------------------------------------------------------------------
 nm: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching nm")
+	$(call color_header, "Launching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
 ##------------------------------------------------------------------------------
@@ -239,7 +258,7 @@ jtagboot:
 ## Start OpenOCD session
 ##------------------------------------------------------------------------------
 openocd:
-	$(call colorecho, "\nLaunching OpenOCD")
+	$(call color_header, "Launching OpenOCD")
 	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
 
 ##------------------------------------------------------------------------------
@@ -248,7 +267,7 @@ openocd:
 gdb: RUSTC_MISC_ARGS += -C debuginfo=2
 gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
 gdb gdb-opt0: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching GDB")
+	$(call color_header, "Launching GDB")
 	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
 
 
@@ -261,7 +280,7 @@ gdb gdb-opt0: $(KERNEL_ELF)
 ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
 test_boot test_unit test_integration test:
-	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+	$(call color_header, "$(QEMU_MISSING_STRING)")
 
 else # QEMU is supported.
 
@@ -269,7 +288,7 @@ else # QEMU is supported.
 ## Run boot test
 ##------------------------------------------------------------------------------
 test_boot: $(KERNEL_BIN)
-	$(call colorecho, "\nBoot test - $(BSP)")
+	$(call color_header, "Boot test - $(BSP)")
 	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
 ##------------------------------------------------------------------------------
@@ -297,7 +316,7 @@ endef
 ## Run unit test(s)
 ##------------------------------------------------------------------------------
 test_unit:
-	$(call colorecho, "\nCompiling unit test(s) - $(BSP)")
+	$(call color_header, "Compiling unit test(s) - $(BSP)")
 	$(call test_prepare)
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) --lib
 
@@ -305,7 +324,7 @@ test_unit:
 ## Run integration test(s)
 ##------------------------------------------------------------------------------
 test_integration:
-	$(call colorecho, "\nCompiling integration test(s) - $(BSP)")
+	$(call color_header, "Compiling integration test(s) - $(BSP)")
 	$(call test_prepare)
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) $(TEST_ARG)
 
diff --git a/12_integrated_testing/README.md b/12_integrated_testing/README.md
index ce94c2195..05029ca1b 100644
--- a/12_integrated_testing/README.md
+++ b/12_integrated_testing/README.md
@@ -415,7 +415,7 @@ endef
 ## Run unit test(s)
 ##------------------------------------------------------------------------------
 test_unit:
-	$(call colorecho, "\nCompiling unit test(s) - $(BSP)")
+	$(call color_header, "Compiling unit test(s) - $(BSP)")
 	$(call test_prepare)
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) --lib
 ```
@@ -1006,7 +1006,7 @@ diff -uNr 11_exceptions_part1_groundwork/Makefile 12_integrated_testing/Makefile
      OBJDUMP_BINARY    = aarch64-none-elf-objdump
      NM_BINARY         = aarch64-none-elf-nm
      READELF_BINARY    = aarch64-none-elf-readelf
-@@ -83,6 +92,7 @@
+@@ -89,6 +98,7 @@
  DOC_CMD     = cargo doc $(COMPILER_ARGS)
  CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
  CHECK_CMD   = cargo check $(COMPILER_ARGS)
@@ -1014,7 +1014,7 @@ diff -uNr 11_exceptions_part1_groundwork/Makefile 12_integrated_testing/Makefile
  OBJCOPY_CMD = rust-objcopy \
      --strip-all            \
      -O binary
-@@ -246,11 +256,11 @@
+@@ -265,11 +275,11 @@
  ##--------------------------------------------------------------------------------------------------
  ## Testing targets
  ##--------------------------------------------------------------------------------------------------
@@ -1023,13 +1023,13 @@ diff -uNr 11_exceptions_part1_groundwork/Makefile 12_integrated_testing/Makefile
 
  ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
--test_boot test :
+-test_boot test:
 +test_boot test_unit test_integration test:
- 	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+ 	$(call color_header, "$(QEMU_MISSING_STRING)")
 
  else # QEMU is supported.
-@@ -262,6 +272,43 @@
- 	$(call colorecho, "\nBoot test - $(BSP)")
+@@ -281,6 +291,43 @@
+ 	$(call color_header, "Boot test - $(BSP)")
  	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
 -test: test_boot
@@ -1058,7 +1058,7 @@ diff -uNr 11_exceptions_part1_groundwork/Makefile 12_integrated_testing/Makefile
 +## Run unit test(s)
 +##------------------------------------------------------------------------------
 +test_unit:
-+	$(call colorecho, "\nCompiling unit test(s) - $(BSP)")
++	$(call color_header, "Compiling unit test(s) - $(BSP)")
 +	$(call test_prepare)
 +	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) --lib
 +
@@ -1066,7 +1066,7 @@ diff -uNr 11_exceptions_part1_groundwork/Makefile 12_integrated_testing/Makefile
 +## Run integration test(s)
 +##------------------------------------------------------------------------------
 +test_integration:
-+	$(call colorecho, "\nCompiling integration test(s) - $(BSP)")
++	$(call color_header, "Compiling integration test(s) - $(BSP)")
 +	$(call test_prepare)
 +	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) $(TEST_ARG)
 +
diff --git a/13_exceptions_part2_peripheral_IRQs/Makefile b/13_exceptions_part2_peripheral_IRQs/Makefile
index a1db677bd..4e499306f 100644
--- a/13_exceptions_part2_peripheral_IRQs/Makefile
+++ b/13_exceptions_part2_peripheral_IRQs/Makefile
@@ -2,7 +2,7 @@
 ##
 ## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/color.mk
+include ../common/format.mk
 include ../common/docker.mk
 
 ##--------------------------------------------------------------------------------------------------
@@ -65,10 +65,16 @@ export LD_SCRIPT_PATH
 
 
 ##--------------------------------------------------------------------------------------------------
-## Generic configuration values
+## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
 KERNEL_LINKER_SCRIPT = link.ld
-KERNEL_ELF           = target/$(TARGET)/release/kernel
+
+LAST_BUILD_CONFIG = target/$(BSP).build_config
+
+KERNEL_ELF      = target/$(TARGET)/release/kernel
+# This parses cargo's dep-info file.
+# https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
 
 
 
@@ -133,28 +139,41 @@ endif
 ##--------------------------------------------------------------------------------------------------
 ## Targets
 ##--------------------------------------------------------------------------------------------------
-.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu chainboot clippy clean readelf objdump nm check
+.PHONY: all doc qemu chainboot clippy clean readelf objdump nm check
 
 all: $(KERNEL_BIN)
 
 ##------------------------------------------------------------------------------
-## Build the kernel ELF
+## Save the configuration as a file, so make understands if it changed.
+##------------------------------------------------------------------------------
+$(LAST_BUILD_CONFIG):
+	@rm -f target/*.build_config
+	@mkdir -p target
+	@touch $(LAST_BUILD_CONFIG)
+
+##------------------------------------------------------------------------------
+## Compile the kernel ELF
 ##------------------------------------------------------------------------------
-$(KERNEL_ELF):
-	$(call colorecho, "\nCompiling kernel - $(BSP)")
+$(KERNEL_ELF): $(KERNEL_ELF_DEPS)
+	$(call color_header, "Compiling kernel ELF - $(BSP)")
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
 ##------------------------------------------------------------------------------
-## Build the stripped kernel binary
+## Generate the stripped kernel binary
 ##------------------------------------------------------------------------------
 $(KERNEL_BIN): $(KERNEL_ELF)
+	$(call color_header, "Generating stripped binary")
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
+	$(call color_progress_prefix, "Name")
+	@echo $(KERNEL_BIN)
+	$(call color_progress_prefix, "Size")
+	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
 
 ##------------------------------------------------------------------------------
-## Build the documentation
+## Generate the documentation
 ##------------------------------------------------------------------------------
 doc:
-	$(call colorecho, "\nGenerating docs")
+	$(call color_header, "Generating docs")
 	@$(DOC_CMD) --document-private-items --open
 
 ##------------------------------------------------------------------------------
@@ -163,12 +182,12 @@ doc:
 ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
 qemu:
-	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+	$(call color_header, "$(QEMU_MISSING_STRING)")
 
 else # QEMU is supported.
 
 qemu: $(KERNEL_BIN)
-	$(call colorecho, "\nLaunching QEMU")
+	$(call color_header, "Launching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
 endif
@@ -195,14 +214,14 @@ clean:
 ## Run readelf
 ##------------------------------------------------------------------------------
 readelf: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching readelf")
+	$(call color_header, "Launching readelf")
 	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
 ##------------------------------------------------------------------------------
 ## Run objdump
 ##------------------------------------------------------------------------------
 objdump: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching objdump")
+	$(call color_header, "Launching objdump")
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
@@ -213,7 +232,7 @@ objdump: $(KERNEL_ELF)
 ## Run nm
 ##------------------------------------------------------------------------------
 nm: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching nm")
+	$(call color_header, "Launching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
 ##------------------------------------------------------------------------------
@@ -239,7 +258,7 @@ jtagboot:
 ## Start OpenOCD session
 ##------------------------------------------------------------------------------
 openocd:
-	$(call colorecho, "\nLaunching OpenOCD")
+	$(call color_header, "Launching OpenOCD")
 	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
 
 ##------------------------------------------------------------------------------
@@ -248,7 +267,7 @@ openocd:
 gdb: RUSTC_MISC_ARGS += -C debuginfo=2
 gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
 gdb gdb-opt0: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching GDB")
+	$(call color_header, "Launching GDB")
 	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
 
 
@@ -261,7 +280,7 @@ gdb gdb-opt0: $(KERNEL_ELF)
 ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
 test_boot test_unit test_integration test:
-	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+	$(call color_header, "$(QEMU_MISSING_STRING)")
 
 else # QEMU is supported.
 
@@ -269,7 +288,7 @@ else # QEMU is supported.
 ## Run boot test
 ##------------------------------------------------------------------------------
 test_boot: $(KERNEL_BIN)
-	$(call colorecho, "\nBoot test - $(BSP)")
+	$(call color_header, "Boot test - $(BSP)")
 	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
 ##------------------------------------------------------------------------------
@@ -297,7 +316,7 @@ endef
 ## Run unit test(s)
 ##------------------------------------------------------------------------------
 test_unit:
-	$(call colorecho, "\nCompiling unit test(s) - $(BSP)")
+	$(call color_header, "Compiling unit test(s) - $(BSP)")
 	$(call test_prepare)
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) --lib
 
@@ -305,7 +324,7 @@ test_unit:
 ## Run integration test(s)
 ##------------------------------------------------------------------------------
 test_integration:
-	$(call colorecho, "\nCompiling integration test(s) - $(BSP)")
+	$(call color_header, "Compiling integration test(s) - $(BSP)")
 	$(call test_prepare)
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) $(TEST_ARG)
 
diff --git a/14_virtual_mem_part2_mmio_remap/Makefile b/14_virtual_mem_part2_mmio_remap/Makefile
index a1db677bd..4e499306f 100644
--- a/14_virtual_mem_part2_mmio_remap/Makefile
+++ b/14_virtual_mem_part2_mmio_remap/Makefile
@@ -2,7 +2,7 @@
 ##
 ## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/color.mk
+include ../common/format.mk
 include ../common/docker.mk
 
 ##--------------------------------------------------------------------------------------------------
@@ -65,10 +65,16 @@ export LD_SCRIPT_PATH
 
 
 ##--------------------------------------------------------------------------------------------------
-## Generic configuration values
+## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
 KERNEL_LINKER_SCRIPT = link.ld
-KERNEL_ELF           = target/$(TARGET)/release/kernel
+
+LAST_BUILD_CONFIG = target/$(BSP).build_config
+
+KERNEL_ELF      = target/$(TARGET)/release/kernel
+# This parses cargo's dep-info file.
+# https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
 
 
 
@@ -133,28 +139,41 @@ endif
 ##--------------------------------------------------------------------------------------------------
 ## Targets
 ##--------------------------------------------------------------------------------------------------
-.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu chainboot clippy clean readelf objdump nm check
+.PHONY: all doc qemu chainboot clippy clean readelf objdump nm check
 
 all: $(KERNEL_BIN)
 
 ##------------------------------------------------------------------------------
-## Build the kernel ELF
+## Save the configuration as a file, so make understands if it changed.
+##------------------------------------------------------------------------------
+$(LAST_BUILD_CONFIG):
+	@rm -f target/*.build_config
+	@mkdir -p target
+	@touch $(LAST_BUILD_CONFIG)
+
+##------------------------------------------------------------------------------
+## Compile the kernel ELF
 ##------------------------------------------------------------------------------
-$(KERNEL_ELF):
-	$(call colorecho, "\nCompiling kernel - $(BSP)")
+$(KERNEL_ELF): $(KERNEL_ELF_DEPS)
+	$(call color_header, "Compiling kernel ELF - $(BSP)")
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
 ##------------------------------------------------------------------------------
-## Build the stripped kernel binary
+## Generate the stripped kernel binary
 ##------------------------------------------------------------------------------
 $(KERNEL_BIN): $(KERNEL_ELF)
+	$(call color_header, "Generating stripped binary")
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
+	$(call color_progress_prefix, "Name")
+	@echo $(KERNEL_BIN)
+	$(call color_progress_prefix, "Size")
+	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
 
 ##------------------------------------------------------------------------------
-## Build the documentation
+## Generate the documentation
 ##------------------------------------------------------------------------------
 doc:
-	$(call colorecho, "\nGenerating docs")
+	$(call color_header, "Generating docs")
 	@$(DOC_CMD) --document-private-items --open
 
 ##------------------------------------------------------------------------------
@@ -163,12 +182,12 @@ doc:
 ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
 qemu:
-	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+	$(call color_header, "$(QEMU_MISSING_STRING)")
 
 else # QEMU is supported.
 
 qemu: $(KERNEL_BIN)
-	$(call colorecho, "\nLaunching QEMU")
+	$(call color_header, "Launching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
 endif
@@ -195,14 +214,14 @@ clean:
 ## Run readelf
 ##------------------------------------------------------------------------------
 readelf: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching readelf")
+	$(call color_header, "Launching readelf")
 	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
 ##------------------------------------------------------------------------------
 ## Run objdump
 ##------------------------------------------------------------------------------
 objdump: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching objdump")
+	$(call color_header, "Launching objdump")
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
@@ -213,7 +232,7 @@ objdump: $(KERNEL_ELF)
 ## Run nm
 ##------------------------------------------------------------------------------
 nm: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching nm")
+	$(call color_header, "Launching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
 ##------------------------------------------------------------------------------
@@ -239,7 +258,7 @@ jtagboot:
 ## Start OpenOCD session
 ##------------------------------------------------------------------------------
 openocd:
-	$(call colorecho, "\nLaunching OpenOCD")
+	$(call color_header, "Launching OpenOCD")
 	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
 
 ##------------------------------------------------------------------------------
@@ -248,7 +267,7 @@ openocd:
 gdb: RUSTC_MISC_ARGS += -C debuginfo=2
 gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
 gdb gdb-opt0: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching GDB")
+	$(call color_header, "Launching GDB")
 	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
 
 
@@ -261,7 +280,7 @@ gdb gdb-opt0: $(KERNEL_ELF)
 ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
 test_boot test_unit test_integration test:
-	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+	$(call color_header, "$(QEMU_MISSING_STRING)")
 
 else # QEMU is supported.
 
@@ -269,7 +288,7 @@ else # QEMU is supported.
 ## Run boot test
 ##------------------------------------------------------------------------------
 test_boot: $(KERNEL_BIN)
-	$(call colorecho, "\nBoot test - $(BSP)")
+	$(call color_header, "Boot test - $(BSP)")
 	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
 ##------------------------------------------------------------------------------
@@ -297,7 +316,7 @@ endef
 ## Run unit test(s)
 ##------------------------------------------------------------------------------
 test_unit:
-	$(call colorecho, "\nCompiling unit test(s) - $(BSP)")
+	$(call color_header, "Compiling unit test(s) - $(BSP)")
 	$(call test_prepare)
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) --lib
 
@@ -305,7 +324,7 @@ test_unit:
 ## Run integration test(s)
 ##------------------------------------------------------------------------------
 test_integration:
-	$(call colorecho, "\nCompiling integration test(s) - $(BSP)")
+	$(call color_header, "Compiling integration test(s) - $(BSP)")
 	$(call test_prepare)
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) $(TEST_ARG)
 
diff --git a/15_virtual_mem_part3_precomputed_tables/Makefile b/15_virtual_mem_part3_precomputed_tables/Makefile
index 0f077200b..e33b1b569 100644
--- a/15_virtual_mem_part3_precomputed_tables/Makefile
+++ b/15_virtual_mem_part3_precomputed_tables/Makefile
@@ -2,7 +2,7 @@
 ##
 ## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/color.mk
+include ../common/format.mk
 include ../common/docker.mk
 
 ##--------------------------------------------------------------------------------------------------
@@ -65,10 +65,23 @@ export LD_SCRIPT_PATH
 
 
 ##--------------------------------------------------------------------------------------------------
-## Generic configuration values
+## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
 KERNEL_LINKER_SCRIPT = link.ld
-KERNEL_ELF           = target/$(TARGET)/release/kernel
+
+TT_TOOL_PATH = translation_table_tool
+
+LAST_BUILD_CONFIG = target/$(BSP).build_config
+
+KERNEL_ELF_RAW      = target/$(TARGET)/release/kernel
+# This parses cargo's dep-info file.
+# https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
+KERNEL_ELF_RAW_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
+
+KERNEL_ELF_TTABLES      = target/$(TARGET)/release/kernel+ttables
+KERNEL_ELF_TTABLES_DEPS = $(KERNEL_ELF_RAW) $(wildcard $(TT_TOOL_PATH)/*)
+
+KERNEL_ELF = $(KERNEL_ELF_TTABLES)
 
 
 
@@ -98,7 +111,7 @@ OBJCOPY_CMD = rust-objcopy \
     -O binary
 
 EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
-EXEC_TT_TOOL       = ruby translation_table_tool/main.rb
+EXEC_TT_TOOL       = ruby $(TT_TOOL_PATH)/main.rb
 EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
 EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
 
@@ -134,29 +147,49 @@ endif
 ##--------------------------------------------------------------------------------------------------
 ## Targets
 ##--------------------------------------------------------------------------------------------------
-.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu chainboot clippy clean readelf objdump nm check
+.PHONY: all doc qemu chainboot clippy clean readelf objdump nm check
 
 all: $(KERNEL_BIN)
 
 ##------------------------------------------------------------------------------
-## Build the kernel ELF
+## Save the configuration as a file, so make understands if it changed.
 ##------------------------------------------------------------------------------
-$(KERNEL_ELF):
-	$(call colorecho, "\nCompiling kernel - $(BSP)")
+$(LAST_BUILD_CONFIG):
+	@rm -f target/*.build_config
+	@mkdir -p target
+	@touch $(LAST_BUILD_CONFIG)
+
+##------------------------------------------------------------------------------
+## Compile the kernel ELF
+##------------------------------------------------------------------------------
+$(KERNEL_ELF_RAW): $(KERNEL_ELF_RAW_DEPS)
+	$(call color_header, "Compiling kernel ELF - $(BSP)")
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
-	@$(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(TARGET) $(BSP) $(KERNEL_ELF)
 
 ##------------------------------------------------------------------------------
-## Build the stripped kernel binary
+## Precompute the kernel translation tables and patch them into the kernel ELF
+##------------------------------------------------------------------------------
+$(KERNEL_ELF_TTABLES): $(KERNEL_ELF_TTABLES_DEPS)
+	$(call color_header, "Precomputing kernel translation tables and patching kernel ELF")
+	@cp $(KERNEL_ELF_RAW) $(KERNEL_ELF_TTABLES)
+	@$(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(TARGET) $(BSP) $(KERNEL_ELF_TTABLES)
+
+##------------------------------------------------------------------------------
+## Generate the stripped kernel binary
 ##------------------------------------------------------------------------------
-$(KERNEL_BIN): $(KERNEL_ELF)
-	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
+$(KERNEL_BIN): $(KERNEL_ELF_TTABLES)
+	$(call color_header, "Generating stripped binary")
+	@$(OBJCOPY_CMD) $(KERNEL_ELF_TTABLES) $(KERNEL_BIN)
+	$(call color_progress_prefix, "Name")
+	@echo $(KERNEL_BIN)
+	$(call color_progress_prefix, "Size")
+	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
 
 ##------------------------------------------------------------------------------
-## Build the documentation
+## Generate the documentation
 ##------------------------------------------------------------------------------
 doc:
-	$(call colorecho, "\nGenerating docs")
+	$(call color_header, "Generating docs")
 	@$(DOC_CMD) --document-private-items --open
 
 ##------------------------------------------------------------------------------
@@ -165,12 +198,12 @@ doc:
 ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
 qemu:
-	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+	$(call color_header, "$(QEMU_MISSING_STRING)")
 
 else # QEMU is supported.
 
 qemu: $(KERNEL_BIN)
-	$(call colorecho, "\nLaunching QEMU")
+	$(call color_header, "Launching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
 endif
@@ -197,14 +230,14 @@ clean:
 ## Run readelf
 ##------------------------------------------------------------------------------
 readelf: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching readelf")
+	$(call color_header, "Launching readelf")
 	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
 ##------------------------------------------------------------------------------
 ## Run objdump
 ##------------------------------------------------------------------------------
 objdump: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching objdump")
+	$(call color_header, "Launching objdump")
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
@@ -215,7 +248,7 @@ objdump: $(KERNEL_ELF)
 ## Run nm
 ##------------------------------------------------------------------------------
 nm: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching nm")
+	$(call color_header, "Launching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
 ##------------------------------------------------------------------------------
@@ -241,7 +274,7 @@ jtagboot:
 ## Start OpenOCD session
 ##------------------------------------------------------------------------------
 openocd:
-	$(call colorecho, "\nLaunching OpenOCD")
+	$(call color_header, "Launching OpenOCD")
 	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
 
 ##------------------------------------------------------------------------------
@@ -250,7 +283,7 @@ openocd:
 gdb: RUSTC_MISC_ARGS += -C debuginfo=2
 gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
 gdb gdb-opt0: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching GDB")
+	$(call color_header, "Launching GDB")
 	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
 
 
@@ -263,7 +296,7 @@ gdb gdb-opt0: $(KERNEL_ELF)
 ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
 test_boot test_unit test_integration test:
-	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+	$(call color_header, "$(QEMU_MISSING_STRING)")
 
 else # QEMU is supported.
 
@@ -271,7 +304,7 @@ else # QEMU is supported.
 ## Run boot test
 ##------------------------------------------------------------------------------
 test_boot: $(KERNEL_BIN)
-	$(call colorecho, "\nBoot test - $(BSP)")
+	$(call color_header, "Boot test - $(BSP)")
 	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
 ##------------------------------------------------------------------------------
@@ -300,7 +333,7 @@ endef
 ## Run unit test(s)
 ##------------------------------------------------------------------------------
 test_unit:
-	$(call colorecho, "\nCompiling unit test(s) - $(BSP)")
+	$(call color_header, "Compiling unit test(s) - $(BSP)")
 	$(call test_prepare)
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) --lib
 
@@ -308,7 +341,7 @@ test_unit:
 ## Run integration test(s)
 ##------------------------------------------------------------------------------
 test_integration:
-	$(call colorecho, "\nCompiling integration test(s) - $(BSP)")
+	$(call color_header, "Compiling integration test(s) - $(BSP)")
 	$(call test_prepare)
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) $(TEST_ARG)
 
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index 04d98dbd1..f24fb3c9a 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -564,19 +564,42 @@ might have been possible to write this tool in Rust as well, and borrow/share th
 with the kernel. But in the end, I found it not worth the effort for the few lines of code.
 
 In the `Makefile`, the tool is invoked after compiling and linking the kernel, and before the
-`objcopy`. It's command line arguments are the target `BSP` type and the path to the kernel's `ELF`
-file:
+`stripped binary` is generated. It's command line arguments are the target `BSP` type and the path
+to the kernel's `ELF` file:
 
 ```Makefile
-all: $(KERNEL_BIN)
+TT_TOOL_PATH = translation_table_tool
 
-$(KERNEL_ELF):
-	$(call colorecho, "\nCompiling kernel - $(BSP)")
+KERNEL_ELF_RAW      = target/$(TARGET)/release/kernel
+# [...]
+
+KERNEL_ELF_TTABLES      = target/$(TARGET)/release/kernel+ttables
+# [...]
+
+EXEC_TT_TOOL       = ruby $(TT_TOOL_PATH)/main.rb
+# [...]
+
+##------------------------------------------------------------------------------
+## Compile the kernel ELF
+##------------------------------------------------------------------------------
+$(KERNEL_ELF_RAW): $(KERNEL_ELF_RAW_DEPS)
+	$(call color_header, "Compiling kernel ELF - $(BSP)")
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
-	@$(DOCKER_TOOLS) ruby translation_table_tool/main.rb $(TARGET) $(BSP) $(KERNEL_ELF)
 
-$(KERNEL_BIN): $(KERNEL_ELF)
-	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
+##------------------------------------------------------------------------------
+## Precompute the kernel translation tables and patch them into the kernel ELF
+##------------------------------------------------------------------------------
+$(KERNEL_ELF_TTABLES): $(KERNEL_ELF_TTABLES_DEPS)
+	$(call color_header, "Precomputing kernel translation tables and patching kernel ELF")
+	@cp $(KERNEL_ELF_RAW) $(KERNEL_ELF_TTABLES)
+	@$(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(TARGET) $(BSP) $(KERNEL_ELF_TTABLES)
+
+##------------------------------------------------------------------------------
+## Generate the stripped kernel binary
+##------------------------------------------------------------------------------
+$(KERNEL_BIN): $(KERNEL_ELF_TTABLES)
+	$(call color_header, "Generating stripped binary")
+	@$(OBJCOPY_CMD) $(KERNEL_ELF_TTABLES) $(KERNEL_BIN)
 ```
 
 In `main.rb`, the `KERNEL_ELF` instance for handling the `ELF` file is created first, followed by
@@ -788,23 +811,65 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/Cargo.toml 15_virtual_mem_part3_precom
 diff -uNr 14_virtual_mem_part2_mmio_remap/Makefile 15_virtual_mem_part3_precomputed_tables/Makefile
 --- 14_virtual_mem_part2_mmio_remap/Makefile
 +++ 15_virtual_mem_part3_precomputed_tables/Makefile
-@@ -98,6 +98,7 @@
+@@ -69,12 +69,19 @@
+ ##--------------------------------------------------------------------------------------------------
+ KERNEL_LINKER_SCRIPT = link.ld
+
++TT_TOOL_PATH = translation_table_tool
++
+ LAST_BUILD_CONFIG = target/$(BSP).build_config
+
+-KERNEL_ELF      = target/$(TARGET)/release/kernel
++KERNEL_ELF_RAW      = target/$(TARGET)/release/kernel
+ # This parses cargo's dep-info file.
+ # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
+-KERNEL_ELF_DEPS = $(filter-out modulo: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
++KERNEL_ELF_RAW_DEPS = $(filter-out modulo: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
++
++KERNEL_ELF_TTABLES      = target/$(TARGET)/release/kernel+ttables
++KERNEL_ELF_TTABLES_DEPS = $(KERNEL_ELF_RAW) $(wildcard $(TT_TOOL_PATH)/*)
++
++KERNEL_ELF = $(KERNEL_ELF_TTABLES)
+
+
+
+@@ -104,6 +111,7 @@
      -O binary
 
  EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
-+EXEC_TT_TOOL       = ruby translation_table_tool/main.rb
++EXEC_TT_TOOL       = ruby $(TT_TOOL_PATH)/main.rb
  EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
  EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
 
-@@ -143,6 +144,7 @@
- $(KERNEL_ELF):
- 	$(call colorecho, "\nCompiling kernel - $(BSP)")
+@@ -154,16 +162,24 @@
+ ##------------------------------------------------------------------------------
+ ## Compile the kernel ELF
+ ##------------------------------------------------------------------------------
+-$(KERNEL_ELF): $(KERNEL_ELF_DEPS)
++$(KERNEL_ELF_RAW): $(KERNEL_ELF_RAW_DEPS)
+ 	$(call color_header, "Compiling kernel ELF - $(BSP)")
  	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
-+	@$(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(TARGET) $(BSP) $(KERNEL_ELF)
 
  ##------------------------------------------------------------------------------
- ## Build the stripped kernel binary
-@@ -281,6 +283,7 @@
++## Precompute the kernel translation tables and patch them into the kernel ELF
++##------------------------------------------------------------------------------
++$(KERNEL_ELF_TTABLES): $(KERNEL_ELF_TTABLES_DEPS)
++	$(call color_header, "Precomputing kernel translation tables and patching kernel ELF")
++	@cp $(KERNEL_ELF_RAW) $(KERNEL_ELF_TTABLES)
++	@$(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(TARGET) $(BSP) $(KERNEL_ELF_TTABLES)
++
++##------------------------------------------------------------------------------
+ ## Generate the stripped kernel binary
+ ##------------------------------------------------------------------------------
+-$(KERNEL_BIN): $(KERNEL_ELF)
++$(KERNEL_BIN): $(KERNEL_ELF_TTABLES)
+ 	$(call color_header, "Generating stripped binary")
+-	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
++	@$(OBJCOPY_CMD) $(KERNEL_ELF_TTABLES) $(KERNEL_BIN)
+ 	$(call color_progress_prefix, "Name")
+ 	@echo $(KERNEL_BIN)
+ 	$(call color_progress_prefix, "Size")
+@@ -300,6 +316,7 @@
      TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
      TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
 
@@ -2490,7 +2555,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/kernel_elf.rb 1
 diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/main.rb 15_virtual_mem_part3_precomputed_tables/translation_table_tool/main.rb
 --- 14_virtual_mem_part2_mmio_remap/translation_table_tool/main.rb
 +++ 15_virtual_mem_part3_precomputed_tables/translation_table_tool/main.rb
-@@ -0,0 +1,50 @@
+@@ -0,0 +1,47 @@
 +#!/usr/bin/env ruby
 +# frozen_string_literal: true
 +
@@ -2512,9 +2577,6 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/main.rb 15_virt
 +require_relative 'bsp'
 +require_relative 'arch'
 +
-+puts
-+puts 'Precomputing kernel translation tables and patching kernel ELF'.cyan
-+
 +start = Time.now
 +
 +KERNEL_ELF = KernelELF.new(kernel_elf_path)
diff --git a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/main.rb b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/main.rb
index 275129ae7..fe69fb33f 100755
--- a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/main.rb
+++ b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/main.rb
@@ -19,9 +19,6 @@
 require_relative 'bsp'
 require_relative 'arch'
 
-puts
-puts 'Precomputing kernel translation tables and patching kernel ELF'.cyan
-
 start = Time.now
 
 KERNEL_ELF = KernelELF.new(kernel_elf_path)
diff --git a/16_virtual_mem_part4_higher_half_kernel/Makefile b/16_virtual_mem_part4_higher_half_kernel/Makefile
index 0f077200b..e33b1b569 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Makefile
+++ b/16_virtual_mem_part4_higher_half_kernel/Makefile
@@ -2,7 +2,7 @@
 ##
 ## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/color.mk
+include ../common/format.mk
 include ../common/docker.mk
 
 ##--------------------------------------------------------------------------------------------------
@@ -65,10 +65,23 @@ export LD_SCRIPT_PATH
 
 
 ##--------------------------------------------------------------------------------------------------
-## Generic configuration values
+## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
 KERNEL_LINKER_SCRIPT = link.ld
-KERNEL_ELF           = target/$(TARGET)/release/kernel
+
+TT_TOOL_PATH = translation_table_tool
+
+LAST_BUILD_CONFIG = target/$(BSP).build_config
+
+KERNEL_ELF_RAW      = target/$(TARGET)/release/kernel
+# This parses cargo's dep-info file.
+# https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
+KERNEL_ELF_RAW_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
+
+KERNEL_ELF_TTABLES      = target/$(TARGET)/release/kernel+ttables
+KERNEL_ELF_TTABLES_DEPS = $(KERNEL_ELF_RAW) $(wildcard $(TT_TOOL_PATH)/*)
+
+KERNEL_ELF = $(KERNEL_ELF_TTABLES)
 
 
 
@@ -98,7 +111,7 @@ OBJCOPY_CMD = rust-objcopy \
     -O binary
 
 EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
-EXEC_TT_TOOL       = ruby translation_table_tool/main.rb
+EXEC_TT_TOOL       = ruby $(TT_TOOL_PATH)/main.rb
 EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
 EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
 
@@ -134,29 +147,49 @@ endif
 ##--------------------------------------------------------------------------------------------------
 ## Targets
 ##--------------------------------------------------------------------------------------------------
-.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu chainboot clippy clean readelf objdump nm check
+.PHONY: all doc qemu chainboot clippy clean readelf objdump nm check
 
 all: $(KERNEL_BIN)
 
 ##------------------------------------------------------------------------------
-## Build the kernel ELF
+## Save the configuration as a file, so make understands if it changed.
 ##------------------------------------------------------------------------------
-$(KERNEL_ELF):
-	$(call colorecho, "\nCompiling kernel - $(BSP)")
+$(LAST_BUILD_CONFIG):
+	@rm -f target/*.build_config
+	@mkdir -p target
+	@touch $(LAST_BUILD_CONFIG)
+
+##------------------------------------------------------------------------------
+## Compile the kernel ELF
+##------------------------------------------------------------------------------
+$(KERNEL_ELF_RAW): $(KERNEL_ELF_RAW_DEPS)
+	$(call color_header, "Compiling kernel ELF - $(BSP)")
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
-	@$(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(TARGET) $(BSP) $(KERNEL_ELF)
 
 ##------------------------------------------------------------------------------
-## Build the stripped kernel binary
+## Precompute the kernel translation tables and patch them into the kernel ELF
+##------------------------------------------------------------------------------
+$(KERNEL_ELF_TTABLES): $(KERNEL_ELF_TTABLES_DEPS)
+	$(call color_header, "Precomputing kernel translation tables and patching kernel ELF")
+	@cp $(KERNEL_ELF_RAW) $(KERNEL_ELF_TTABLES)
+	@$(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(TARGET) $(BSP) $(KERNEL_ELF_TTABLES)
+
+##------------------------------------------------------------------------------
+## Generate the stripped kernel binary
 ##------------------------------------------------------------------------------
-$(KERNEL_BIN): $(KERNEL_ELF)
-	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
+$(KERNEL_BIN): $(KERNEL_ELF_TTABLES)
+	$(call color_header, "Generating stripped binary")
+	@$(OBJCOPY_CMD) $(KERNEL_ELF_TTABLES) $(KERNEL_BIN)
+	$(call color_progress_prefix, "Name")
+	@echo $(KERNEL_BIN)
+	$(call color_progress_prefix, "Size")
+	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
 
 ##------------------------------------------------------------------------------
-## Build the documentation
+## Generate the documentation
 ##------------------------------------------------------------------------------
 doc:
-	$(call colorecho, "\nGenerating docs")
+	$(call color_header, "Generating docs")
 	@$(DOC_CMD) --document-private-items --open
 
 ##------------------------------------------------------------------------------
@@ -165,12 +198,12 @@ doc:
 ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
 qemu:
-	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+	$(call color_header, "$(QEMU_MISSING_STRING)")
 
 else # QEMU is supported.
 
 qemu: $(KERNEL_BIN)
-	$(call colorecho, "\nLaunching QEMU")
+	$(call color_header, "Launching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
 endif
@@ -197,14 +230,14 @@ clean:
 ## Run readelf
 ##------------------------------------------------------------------------------
 readelf: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching readelf")
+	$(call color_header, "Launching readelf")
 	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
 ##------------------------------------------------------------------------------
 ## Run objdump
 ##------------------------------------------------------------------------------
 objdump: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching objdump")
+	$(call color_header, "Launching objdump")
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
@@ -215,7 +248,7 @@ objdump: $(KERNEL_ELF)
 ## Run nm
 ##------------------------------------------------------------------------------
 nm: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching nm")
+	$(call color_header, "Launching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
 ##------------------------------------------------------------------------------
@@ -241,7 +274,7 @@ jtagboot:
 ## Start OpenOCD session
 ##------------------------------------------------------------------------------
 openocd:
-	$(call colorecho, "\nLaunching OpenOCD")
+	$(call color_header, "Launching OpenOCD")
 	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
 
 ##------------------------------------------------------------------------------
@@ -250,7 +283,7 @@ openocd:
 gdb: RUSTC_MISC_ARGS += -C debuginfo=2
 gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
 gdb gdb-opt0: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching GDB")
+	$(call color_header, "Launching GDB")
 	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
 
 
@@ -263,7 +296,7 @@ gdb gdb-opt0: $(KERNEL_ELF)
 ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
 test_boot test_unit test_integration test:
-	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+	$(call color_header, "$(QEMU_MISSING_STRING)")
 
 else # QEMU is supported.
 
@@ -271,7 +304,7 @@ else # QEMU is supported.
 ## Run boot test
 ##------------------------------------------------------------------------------
 test_boot: $(KERNEL_BIN)
-	$(call colorecho, "\nBoot test - $(BSP)")
+	$(call color_header, "Boot test - $(BSP)")
 	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
 ##------------------------------------------------------------------------------
@@ -300,7 +333,7 @@ endef
 ## Run unit test(s)
 ##------------------------------------------------------------------------------
 test_unit:
-	$(call colorecho, "\nCompiling unit test(s) - $(BSP)")
+	$(call color_header, "Compiling unit test(s) - $(BSP)")
 	$(call test_prepare)
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) --lib
 
@@ -308,7 +341,7 @@ test_unit:
 ## Run integration test(s)
 ##------------------------------------------------------------------------------
 test_integration:
-	$(call colorecho, "\nCompiling integration test(s) - $(BSP)")
+	$(call color_header, "Compiling integration test(s) - $(BSP)")
 	$(call test_prepare)
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) $(TEST_ARG)
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/main.rb b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/main.rb
index 275129ae7..fe69fb33f 100755
--- a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/main.rb
+++ b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/main.rb
@@ -19,9 +19,6 @@
 require_relative 'bsp'
 require_relative 'arch'
 
-puts
-puts 'Precomputing kernel translation tables and patching kernel ELF'.cyan
-
 start = Time.now
 
 KERNEL_ELF = KernelELF.new(kernel_elf_path)
diff --git a/X1_JTAG_boot/Makefile b/X1_JTAG_boot/Makefile
index 562ccfa68..1f2158e6c 100644
--- a/X1_JTAG_boot/Makefile
+++ b/X1_JTAG_boot/Makefile
@@ -2,7 +2,7 @@
 ##
 ## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/color.mk
+include ../common/format.mk
 include ../common/docker.mk
 
 ##--------------------------------------------------------------------------------------------------
@@ -52,10 +52,16 @@ export LD_SCRIPT_PATH
 
 
 ##--------------------------------------------------------------------------------------------------
-## Generic configuration values
+## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
 KERNEL_LINKER_SCRIPT = link.ld
-KERNEL_ELF           = target/$(TARGET)/release/kernel
+
+LAST_BUILD_CONFIG = target/$(BSP).build_config
+
+KERNEL_ELF      = target/$(TARGET)/release/kernel
+# This parses cargo's dep-info file.
+# https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
 
 
 
@@ -112,28 +118,41 @@ endif
 ##--------------------------------------------------------------------------------------------------
 ## Targets
 ##--------------------------------------------------------------------------------------------------
-.PHONY: all $(KERNEL_ELF) $(KERNEL_BIN) doc qemu chainboot clippy clean readelf objdump nm check
+.PHONY: all doc qemu chainboot clippy clean readelf objdump nm check
 
 all: $(KERNEL_BIN)
 
 ##------------------------------------------------------------------------------
-## Build the kernel ELF
+## Save the configuration as a file, so make understands if it changed.
+##------------------------------------------------------------------------------
+$(LAST_BUILD_CONFIG):
+	@rm -f target/*.build_config
+	@mkdir -p target
+	@touch $(LAST_BUILD_CONFIG)
+
+##------------------------------------------------------------------------------
+## Compile the kernel ELF
 ##------------------------------------------------------------------------------
-$(KERNEL_ELF):
-	$(call colorecho, "\nCompiling kernel - $(BSP)")
+$(KERNEL_ELF): $(KERNEL_ELF_DEPS)
+	$(call color_header, "Compiling kernel ELF - $(BSP)")
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
 
 ##------------------------------------------------------------------------------
-## Build the stripped kernel binary
+## Generate the stripped kernel binary
 ##------------------------------------------------------------------------------
 $(KERNEL_BIN): $(KERNEL_ELF)
+	$(call color_header, "Generating stripped binary")
 	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
+	$(call color_progress_prefix, "Name")
+	@echo $(KERNEL_BIN)
+	$(call color_progress_prefix, "Size")
+	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
 
 ##------------------------------------------------------------------------------
-## Build the documentation
+## Generate the documentation
 ##------------------------------------------------------------------------------
 doc:
-	$(call colorecho, "\nGenerating docs")
+	$(call color_header, "Generating docs")
 	@$(DOC_CMD) --document-private-items --open
 
 ##------------------------------------------------------------------------------
@@ -142,12 +161,12 @@ doc:
 ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
 qemu:
-	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+	$(call color_header, "$(QEMU_MISSING_STRING)")
 
 else # QEMU is supported.
 
 qemu: $(KERNEL_BIN)
-	$(call colorecho, "\nLaunching QEMU")
+	$(call color_header, "Launching QEMU")
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
 endif
@@ -174,14 +193,14 @@ clean:
 ## Run readelf
 ##------------------------------------------------------------------------------
 readelf: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching readelf")
+	$(call color_header, "Launching readelf")
 	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
 
 ##------------------------------------------------------------------------------
 ## Run objdump
 ##------------------------------------------------------------------------------
 objdump: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching objdump")
+	$(call color_header, "Launching objdump")
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
@@ -192,7 +211,7 @@ objdump: $(KERNEL_ELF)
 ## Run nm
 ##------------------------------------------------------------------------------
 nm: $(KERNEL_ELF)
-	$(call colorecho, "\nLaunching nm")
+	$(call color_header, "Launching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
 ##------------------------------------------------------------------------------
@@ -210,8 +229,8 @@ check:
 
 ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
-test_boot test :
-	$(call colorecho, "\n$(QEMU_MISSING_STRING)")
+test_boot test:
+	$(call color_header, "$(QEMU_MISSING_STRING)")
 
 else # QEMU is supported.
 
@@ -219,7 +238,7 @@ else # QEMU is supported.
 ## Run boot test
 ##------------------------------------------------------------------------------
 test_boot: $(KERNEL_BIN)
-	$(call colorecho, "\nBoot test - $(BSP)")
+	$(call color_header, "Boot test - $(BSP)")
 	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
 test: test_boot
diff --git a/common/color.mk b/common/color.mk
deleted file mode 100644
index 851bac875..000000000
--- a/common/color.mk
+++ /dev/null
@@ -1,5 +0,0 @@
-define colorecho
-      @tput setaf 6 2> /dev/null || true
-      @echo $1
-      @tput sgr0 2> /dev/null || true
-endef
diff --git a/common/format.mk b/common/format.mk
new file mode 100644
index 000000000..e392304ad
--- /dev/null
+++ b/common/format.mk
@@ -0,0 +1,12 @@
+define color_header
+    @tput setaf 6 2> /dev/null || true
+    @printf '\n%s\n' $(1)
+    @tput sgr0 2> /dev/null || true
+endef
+
+define color_progress_prefix
+    @tput setaf 2 2> /dev/null || true
+    @tput bold 2 2> /dev/null || true
+    @printf '%12s ' $(1)
+    @tput sgr0 2> /dev/null || true
+endef

From 7ca7f6728f87edd4862772a084b7fcbbfbc3971a Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Tue, 12 Apr 2022 21:57:55 +0200
Subject: [PATCH 133/214] TT Tool: Check arch through kernel ELF

---
 .../Makefile                                  |  4 +--
 .../README.md                                 | 27 ++++++++++---------
 .../translation_table_tool/kernel_elf.rb      |  4 +++
 .../translation_table_tool/main.rb            | 11 ++++----
 .../Makefile                                  |  4 +--
 .../translation_table_tool/kernel_elf.rb      |  4 +++
 .../translation_table_tool/main.rb            | 11 ++++----
 7 files changed, 37 insertions(+), 28 deletions(-)

diff --git a/15_virtual_mem_part3_precomputed_tables/Makefile b/15_virtual_mem_part3_precomputed_tables/Makefile
index e33b1b569..15dc5af05 100644
--- a/15_virtual_mem_part3_precomputed_tables/Makefile
+++ b/15_virtual_mem_part3_precomputed_tables/Makefile
@@ -172,7 +172,7 @@ $(KERNEL_ELF_RAW): $(KERNEL_ELF_RAW_DEPS)
 $(KERNEL_ELF_TTABLES): $(KERNEL_ELF_TTABLES_DEPS)
 	$(call color_header, "Precomputing kernel translation tables and patching kernel ELF")
 	@cp $(KERNEL_ELF_RAW) $(KERNEL_ELF_TTABLES)
-	@$(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(TARGET) $(BSP) $(KERNEL_ELF_TTABLES)
+	@$(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(BSP) $(KERNEL_ELF_TTABLES)
 
 ##------------------------------------------------------------------------------
 ## Generate the stripped kernel binary
@@ -316,7 +316,7 @@ define KERNEL_TEST_RUNNER
     TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
     TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
 
-    $(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(TARGET) $(BSP) $$TEST_ELF > /dev/null
+    $(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(BSP) $$TEST_ELF > /dev/null
     $(OBJCOPY_CMD) $$TEST_ELF $$TEST_BINARY
     $(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
 endef
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index f24fb3c9a..37d157cc8 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -615,8 +615,8 @@ BSP = case BSP_TYPE
           raise
       end
 
-TRANSLATION_TABLES = case TARGET
-                     when :aarch64
+TRANSLATION_TABLES = case KERNEL_ELF.machine
+                     when :AArch64
                          Arch::ARMv8::TranslationTable.new
                      else
                          raise
@@ -856,7 +856,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/Makefile 15_virtual_mem_part3_precompu
 +$(KERNEL_ELF_TTABLES): $(KERNEL_ELF_TTABLES_DEPS)
 +	$(call color_header, "Precomputing kernel translation tables and patching kernel ELF")
 +	@cp $(KERNEL_ELF_RAW) $(KERNEL_ELF_TTABLES)
-+	@$(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(TARGET) $(BSP) $(KERNEL_ELF_TTABLES)
++	@$(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(BSP) $(KERNEL_ELF_TTABLES)
 +
 +##------------------------------------------------------------------------------
  ## Generate the stripped kernel binary
@@ -873,7 +873,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/Makefile 15_virtual_mem_part3_precompu
      TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
      TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
 
-+    $(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(TARGET) $(BSP) $$TEST_ELF > /dev/null
++    $(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(BSP) $$TEST_ELF > /dev/null
      $(OBJCOPY_CMD) $$TEST_ELF $$TEST_BINARY
      $(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
  endef
@@ -2458,7 +2458,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/generic.rb 15_v
 diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/kernel_elf.rb 15_virtual_mem_part3_precomputed_tables/translation_table_tool/kernel_elf.rb
 --- 14_virtual_mem_part2_mmio_remap/translation_table_tool/kernel_elf.rb
 +++ 15_virtual_mem_part3_precomputed_tables/translation_table_tool/kernel_elf.rb
-@@ -0,0 +1,92 @@
+@@ -0,0 +1,96 @@
 +# frozen_string_literal: true
 +
 +# SPDX-License-Identifier: MIT OR Apache-2.0
@@ -2474,6 +2474,10 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/kernel_elf.rb 1
 +        @symtab_section = @elf.section_by_name('.symtab')
 +    end
 +
++    def machine
++        @elf.machine.to_sym
++    end
++
 +    def symbol_value(symbol_name)
 +        @symtab_section.symbol_by_name(symbol_name).header.st_value
 +    end
@@ -2555,7 +2559,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/kernel_elf.rb 1
 diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/main.rb 15_virtual_mem_part3_precomputed_tables/translation_table_tool/main.rb
 --- 14_virtual_mem_part2_mmio_remap/translation_table_tool/main.rb
 +++ 15_virtual_mem_part3_precomputed_tables/translation_table_tool/main.rb
-@@ -0,0 +1,47 @@
+@@ -0,0 +1,46 @@
 +#!/usr/bin/env ruby
 +# frozen_string_literal: true
 +
@@ -2563,10 +2567,6 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/main.rb 15_virt
 +#
 +# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 +
-+TARGET = ARGV[0].split('-').first.to_sym
-+BSP_TYPE = ARGV[1].to_sym
-+kernel_elf_path = ARGV[2]
-+
 +require 'rubygems'
 +require 'bundler/setup'
 +require 'colorize'
@@ -2577,6 +2577,9 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/main.rb 15_virt
 +require_relative 'bsp'
 +require_relative 'arch'
 +
++BSP_TYPE = ARGV[0].to_sym
++kernel_elf_path = ARGV[1]
++
 +start = Time.now
 +
 +KERNEL_ELF = KernelELF.new(kernel_elf_path)
@@ -2588,8 +2591,8 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/main.rb 15_virt
 +          raise
 +      end
 +
-+TRANSLATION_TABLES = case TARGET
-+                     when :aarch64
++TRANSLATION_TABLES = case KERNEL_ELF.machine
++                     when :AArch64
 +                         Arch::ARMv8::TranslationTable.new
 +                     else
 +                         raise
diff --git a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/kernel_elf.rb b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/kernel_elf.rb
index 80d00f717..f2d5b0b72 100644
--- a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/kernel_elf.rb
+++ b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/kernel_elf.rb
@@ -13,6 +13,10 @@ def initialize(kernel_elf_path)
         @symtab_section = @elf.section_by_name('.symtab')
     end
 
+    def machine
+        @elf.machine.to_sym
+    end
+
     def symbol_value(symbol_name)
         @symtab_section.symbol_by_name(symbol_name).header.st_value
     end
diff --git a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/main.rb b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/main.rb
index fe69fb33f..6419e364e 100755
--- a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/main.rb
+++ b/15_virtual_mem_part3_precomputed_tables/translation_table_tool/main.rb
@@ -5,10 +5,6 @@
 #
 # Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
-TARGET = ARGV[0].split('-').first.to_sym
-BSP_TYPE = ARGV[1].to_sym
-kernel_elf_path = ARGV[2]
-
 require 'rubygems'
 require 'bundler/setup'
 require 'colorize'
@@ -19,6 +15,9 @@
 require_relative 'bsp'
 require_relative 'arch'
 
+BSP_TYPE = ARGV[0].to_sym
+kernel_elf_path = ARGV[1]
+
 start = Time.now
 
 KERNEL_ELF = KernelELF.new(kernel_elf_path)
@@ -30,8 +29,8 @@
           raise
       end
 
-TRANSLATION_TABLES = case TARGET
-                     when :aarch64
+TRANSLATION_TABLES = case KERNEL_ELF.machine
+                     when :AArch64
                          Arch::ARMv8::TranslationTable.new
                      else
                          raise
diff --git a/16_virtual_mem_part4_higher_half_kernel/Makefile b/16_virtual_mem_part4_higher_half_kernel/Makefile
index e33b1b569..15dc5af05 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Makefile
+++ b/16_virtual_mem_part4_higher_half_kernel/Makefile
@@ -172,7 +172,7 @@ $(KERNEL_ELF_RAW): $(KERNEL_ELF_RAW_DEPS)
 $(KERNEL_ELF_TTABLES): $(KERNEL_ELF_TTABLES_DEPS)
 	$(call color_header, "Precomputing kernel translation tables and patching kernel ELF")
 	@cp $(KERNEL_ELF_RAW) $(KERNEL_ELF_TTABLES)
-	@$(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(TARGET) $(BSP) $(KERNEL_ELF_TTABLES)
+	@$(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(BSP) $(KERNEL_ELF_TTABLES)
 
 ##------------------------------------------------------------------------------
 ## Generate the stripped kernel binary
@@ -316,7 +316,7 @@ define KERNEL_TEST_RUNNER
     TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
     TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
 
-    $(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(TARGET) $(BSP) $$TEST_ELF > /dev/null
+    $(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(BSP) $$TEST_ELF > /dev/null
     $(OBJCOPY_CMD) $$TEST_ELF $$TEST_BINARY
     $(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
 endef
diff --git a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/kernel_elf.rb b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/kernel_elf.rb
index 80d00f717..f2d5b0b72 100644
--- a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/kernel_elf.rb
+++ b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/kernel_elf.rb
@@ -13,6 +13,10 @@ def initialize(kernel_elf_path)
         @symtab_section = @elf.section_by_name('.symtab')
     end
 
+    def machine
+        @elf.machine.to_sym
+    end
+
     def symbol_value(symbol_name)
         @symtab_section.symbol_by_name(symbol_name).header.st_value
     end
diff --git a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/main.rb b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/main.rb
index fe69fb33f..6419e364e 100755
--- a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/main.rb
+++ b/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/main.rb
@@ -5,10 +5,6 @@
 #
 # Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
-TARGET = ARGV[0].split('-').first.to_sym
-BSP_TYPE = ARGV[1].to_sym
-kernel_elf_path = ARGV[2]
-
 require 'rubygems'
 require 'bundler/setup'
 require 'colorize'
@@ -19,6 +15,9 @@
 require_relative 'bsp'
 require_relative 'arch'
 
+BSP_TYPE = ARGV[0].to_sym
+kernel_elf_path = ARGV[1]
+
 start = Time.now
 
 KERNEL_ELF = KernelELF.new(kernel_elf_path)
@@ -30,8 +29,8 @@
           raise
       end
 
-TRANSLATION_TABLES = case TARGET
-                     when :aarch64
+TRANSLATION_TABLES = case KERNEL_ELF.machine
+                     when :AArch64
                          Arch::ARMv8::TranslationTable.new
                      else
                          raise

From d3e5834e30958680874658a1160f512c06566873 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Tue, 12 Apr 2022 21:58:40 +0200
Subject: [PATCH 134/214] Linker: Use absolute library path

---
 01_wait_forever/Makefile                         |  4 ++--
 01_wait_forever/build.rs                         |  7 +++++--
 02_runtime_init/Makefile                         |  4 ++--
 02_runtime_init/build.rs                         |  7 +++++--
 03_hacky_hello_world/Makefile                    |  4 ++--
 03_hacky_hello_world/build.rs                    |  7 +++++--
 04_safe_globals/Makefile                         |  4 ++--
 04_safe_globals/build.rs                         |  7 +++++--
 05_drivers_gpio_uart/Makefile                    |  4 ++--
 05_drivers_gpio_uart/build.rs                    |  7 +++++--
 06_uart_chainloader/Makefile                     |  4 ++--
 06_uart_chainloader/README.md                    | 10 ++++++----
 06_uart_chainloader/build.rs                     |  7 +++++--
 07_timestamps/Makefile                           |  4 ++--
 07_timestamps/README.md                          | 14 ++++++++------
 07_timestamps/build.rs                           |  7 +++++--
 08_hw_debug_JTAG/Makefile                        |  4 ++--
 08_hw_debug_JTAG/README.md                       |  4 ++--
 08_hw_debug_JTAG/build.rs                        |  7 +++++--
 09_privilege_level/Makefile                      |  4 ++--
 09_privilege_level/build.rs                      |  7 +++++--
 10_virtual_mem_part1_identity_mapping/Makefile   |  4 ++--
 10_virtual_mem_part1_identity_mapping/build.rs   |  7 +++++--
 11_exceptions_part1_groundwork/Makefile          |  4 ++--
 11_exceptions_part1_groundwork/build.rs          |  7 +++++--
 12_integrated_testing/Makefile                   |  4 ++--
 12_integrated_testing/build.rs                   |  7 +++++--
 13_exceptions_part2_peripheral_IRQs/Makefile     |  4 ++--
 13_exceptions_part2_peripheral_IRQs/build.rs     |  7 +++++--
 14_virtual_mem_part2_mmio_remap/Makefile         |  4 ++--
 14_virtual_mem_part2_mmio_remap/build.rs         |  7 +++++--
 15_virtual_mem_part3_precomputed_tables/Makefile |  4 ++--
 15_virtual_mem_part3_precomputed_tables/build.rs |  7 +++++--
 16_virtual_mem_part4_higher_half_kernel/Makefile |  4 ++--
 16_virtual_mem_part4_higher_half_kernel/build.rs |  7 +++++--
 X1_JTAG_boot/Makefile                            |  4 ++--
 X1_JTAG_boot/build.rs                            |  7 +++++--
 37 files changed, 135 insertions(+), 80 deletions(-)

diff --git a/01_wait_forever/Makefile b/01_wait_forever/Makefile
index 6d50a2db7..cd987db5f 100644
--- a/01_wait_forever/Makefile
+++ b/01_wait_forever/Makefile
@@ -28,7 +28,7 @@ ifeq ($(BSP),rpi3)
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
     READELF_BINARY    = aarch64-none-elf-readelf
-    LD_SCRIPT_PATH    = src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -39,7 +39,7 @@ else ifeq ($(BSP),rpi4)
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
     READELF_BINARY    = aarch64-none-elf-readelf
-    LD_SCRIPT_PATH    = src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
diff --git a/01_wait_forever/build.rs b/01_wait_forever/build.rs
index f53b99494..cab00bb37 100644
--- a/01_wait_forever/build.rs
+++ b/01_wait_forever/build.rs
@@ -1,7 +1,10 @@
-use std::{env, fs};
+use std::{env, fs, process};
 
 fn main() {
-    let ld_script_path = env::var("LD_SCRIPT_PATH").unwrap_or_default();
+    let ld_script_path = match env::var("LD_SCRIPT_PATH") {
+        Ok(var) => var,
+        _ => process::exit(0),
+    };
 
     let files = fs::read_dir(ld_script_path).unwrap();
     files
diff --git a/02_runtime_init/Makefile b/02_runtime_init/Makefile
index d96f72e61..d1d71ec99 100644
--- a/02_runtime_init/Makefile
+++ b/02_runtime_init/Makefile
@@ -28,7 +28,7 @@ ifeq ($(BSP),rpi3)
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
     READELF_BINARY    = aarch64-none-elf-readelf
-    LD_SCRIPT_PATH    = src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -39,7 +39,7 @@ else ifeq ($(BSP),rpi4)
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
     READELF_BINARY    = aarch64-none-elf-readelf
-    LD_SCRIPT_PATH    = src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
diff --git a/02_runtime_init/build.rs b/02_runtime_init/build.rs
index f53b99494..cab00bb37 100644
--- a/02_runtime_init/build.rs
+++ b/02_runtime_init/build.rs
@@ -1,7 +1,10 @@
-use std::{env, fs};
+use std::{env, fs, process};
 
 fn main() {
-    let ld_script_path = env::var("LD_SCRIPT_PATH").unwrap_or_default();
+    let ld_script_path = match env::var("LD_SCRIPT_PATH") {
+        Ok(var) => var,
+        _ => process::exit(0),
+    };
 
     let files = fs::read_dir(ld_script_path).unwrap();
     files
diff --git a/03_hacky_hello_world/Makefile b/03_hacky_hello_world/Makefile
index b74e27613..49dcc1ed1 100644
--- a/03_hacky_hello_world/Makefile
+++ b/03_hacky_hello_world/Makefile
@@ -28,7 +28,7 @@ ifeq ($(BSP),rpi3)
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
     READELF_BINARY    = aarch64-none-elf-readelf
-    LD_SCRIPT_PATH    = src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -39,7 +39,7 @@ else ifeq ($(BSP),rpi4)
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
     READELF_BINARY    = aarch64-none-elf-readelf
-    LD_SCRIPT_PATH    = src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
diff --git a/03_hacky_hello_world/build.rs b/03_hacky_hello_world/build.rs
index f53b99494..cab00bb37 100644
--- a/03_hacky_hello_world/build.rs
+++ b/03_hacky_hello_world/build.rs
@@ -1,7 +1,10 @@
-use std::{env, fs};
+use std::{env, fs, process};
 
 fn main() {
-    let ld_script_path = env::var("LD_SCRIPT_PATH").unwrap_or_default();
+    let ld_script_path = match env::var("LD_SCRIPT_PATH") {
+        Ok(var) => var,
+        _ => process::exit(0),
+    };
 
     let files = fs::read_dir(ld_script_path).unwrap();
     files
diff --git a/04_safe_globals/Makefile b/04_safe_globals/Makefile
index b74e27613..49dcc1ed1 100644
--- a/04_safe_globals/Makefile
+++ b/04_safe_globals/Makefile
@@ -28,7 +28,7 @@ ifeq ($(BSP),rpi3)
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
     READELF_BINARY    = aarch64-none-elf-readelf
-    LD_SCRIPT_PATH    = src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -39,7 +39,7 @@ else ifeq ($(BSP),rpi4)
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
     READELF_BINARY    = aarch64-none-elf-readelf
-    LD_SCRIPT_PATH    = src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
diff --git a/04_safe_globals/build.rs b/04_safe_globals/build.rs
index f53b99494..cab00bb37 100644
--- a/04_safe_globals/build.rs
+++ b/04_safe_globals/build.rs
@@ -1,7 +1,10 @@
-use std::{env, fs};
+use std::{env, fs, process};
 
 fn main() {
-    let ld_script_path = env::var("LD_SCRIPT_PATH").unwrap_or_default();
+    let ld_script_path = match env::var("LD_SCRIPT_PATH") {
+        Ok(var) => var,
+        _ => process::exit(0),
+    };
 
     let files = fs::read_dir(ld_script_path).unwrap();
     files
diff --git a/05_drivers_gpio_uart/Makefile b/05_drivers_gpio_uart/Makefile
index aacf97714..28702bc8f 100644
--- a/05_drivers_gpio_uart/Makefile
+++ b/05_drivers_gpio_uart/Makefile
@@ -31,7 +31,7 @@ ifeq ($(BSP),rpi3)
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
     READELF_BINARY    = aarch64-none-elf-readelf
-    LD_SCRIPT_PATH    = src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -42,7 +42,7 @@ else ifeq ($(BSP),rpi4)
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
     READELF_BINARY    = aarch64-none-elf-readelf
-    LD_SCRIPT_PATH    = src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
diff --git a/05_drivers_gpio_uart/build.rs b/05_drivers_gpio_uart/build.rs
index f53b99494..cab00bb37 100644
--- a/05_drivers_gpio_uart/build.rs
+++ b/05_drivers_gpio_uart/build.rs
@@ -1,7 +1,10 @@
-use std::{env, fs};
+use std::{env, fs, process};
 
 fn main() {
-    let ld_script_path = env::var("LD_SCRIPT_PATH").unwrap_or_default();
+    let ld_script_path = match env::var("LD_SCRIPT_PATH") {
+        Ok(var) => var,
+        _ => process::exit(0),
+    };
 
     let files = fs::read_dir(ld_script_path).unwrap();
     files
diff --git a/06_uart_chainloader/Makefile b/06_uart_chainloader/Makefile
index b697a68d0..b3af24c5e 100644
--- a/06_uart_chainloader/Makefile
+++ b/06_uart_chainloader/Makefile
@@ -31,7 +31,7 @@ ifeq ($(BSP),rpi3)
     OBJDUMP_BINARY         = aarch64-none-elf-objdump
     NM_BINARY              = aarch64-none-elf-nm
     READELF_BINARY         = aarch64-none-elf-readelf
-    LD_SCRIPT_PATH    = src/bsp/raspberrypi
+    LD_SCRIPT_PATH         = $(shell pwd)/src/bsp/raspberrypi
     RUSTC_MISC_ARGS        = -C target-cpu=cortex-a53
     CHAINBOOT_DEMO_PAYLOAD = demo_payload_rpi3.img
 else ifeq ($(BSP),rpi4)
@@ -43,7 +43,7 @@ else ifeq ($(BSP),rpi4)
     OBJDUMP_BINARY         = aarch64-none-elf-objdump
     NM_BINARY              = aarch64-none-elf-nm
     READELF_BINARY         = aarch64-none-elf-readelf
-    LD_SCRIPT_PATH    = src/bsp/raspberrypi
+    LD_SCRIPT_PATH         = $(shell pwd)/src/bsp/raspberrypi
     RUSTC_MISC_ARGS        = -C target-cpu=cortex-a72
     CHAINBOOT_DEMO_PAYLOAD = demo_payload_rpi4.img
 endif
diff --git a/06_uart_chainloader/README.md b/06_uart_chainloader/README.md
index cec774769..f07131ec7 100644
--- a/06_uart_chainloader/README.md
+++ b/06_uart_chainloader/README.md
@@ -150,6 +150,8 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
 -    OBJDUMP_BINARY    = aarch64-none-elf-objdump
 -    NM_BINARY         = aarch64-none-elf-nm
 -    READELF_BINARY    = aarch64-none-elf-readelf
+-    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
+-    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 +    TARGET                 = aarch64-unknown-none-softfloat
 +    KERNEL_BIN             = kernel8.img
 +    QEMU_BINARY            = qemu-system-aarch64
@@ -158,8 +160,7 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
 +    OBJDUMP_BINARY         = aarch64-none-elf-objdump
 +    NM_BINARY              = aarch64-none-elf-nm
 +    READELF_BINARY         = aarch64-none-elf-readelf
-     LD_SCRIPT_PATH    = src/bsp/raspberrypi
--    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
++    LD_SCRIPT_PATH         = $(shell pwd)/src/bsp/raspberrypi
 +    RUSTC_MISC_ARGS        = -C target-cpu=cortex-a53
 +    CHAINBOOT_DEMO_PAYLOAD = demo_payload_rpi3.img
  else ifeq ($(BSP),rpi4)
@@ -171,6 +172,8 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
 -    OBJDUMP_BINARY    = aarch64-none-elf-objdump
 -    NM_BINARY         = aarch64-none-elf-nm
 -    READELF_BINARY    = aarch64-none-elf-readelf
+-    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
+-    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 +    TARGET                 = aarch64-unknown-none-softfloat
 +    KERNEL_BIN             = kernel8.img
 +    QEMU_BINARY            = qemu-system-aarch64
@@ -179,8 +182,7 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
 +    OBJDUMP_BINARY         = aarch64-none-elf-objdump
 +    NM_BINARY              = aarch64-none-elf-nm
 +    READELF_BINARY         = aarch64-none-elf-readelf
-     LD_SCRIPT_PATH    = src/bsp/raspberrypi
--    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
++    LD_SCRIPT_PATH         = $(shell pwd)/src/bsp/raspberrypi
 +    RUSTC_MISC_ARGS        = -C target-cpu=cortex-a72
 +    CHAINBOOT_DEMO_PAYLOAD = demo_payload_rpi4.img
  endif
diff --git a/06_uart_chainloader/build.rs b/06_uart_chainloader/build.rs
index f53b99494..cab00bb37 100644
--- a/06_uart_chainloader/build.rs
+++ b/06_uart_chainloader/build.rs
@@ -1,7 +1,10 @@
-use std::{env, fs};
+use std::{env, fs, process};
 
 fn main() {
-    let ld_script_path = env::var("LD_SCRIPT_PATH").unwrap_or_default();
+    let ld_script_path = match env::var("LD_SCRIPT_PATH") {
+        Ok(var) => var,
+        _ => process::exit(0),
+    };
 
     let files = fs::read_dir(ld_script_path).unwrap();
     files
diff --git a/07_timestamps/Makefile b/07_timestamps/Makefile
index 1f2158e6c..3f6b230a5 100644
--- a/07_timestamps/Makefile
+++ b/07_timestamps/Makefile
@@ -31,7 +31,7 @@ ifeq ($(BSP),rpi3)
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
     READELF_BINARY    = aarch64-none-elf-readelf
-    LD_SCRIPT_PATH    = src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -42,7 +42,7 @@ else ifeq ($(BSP),rpi4)
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
     READELF_BINARY    = aarch64-none-elf-readelf
-    LD_SCRIPT_PATH    = src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index d5e50466a..14bdc6bd6 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -74,6 +74,9 @@ diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
 -    OBJDUMP_BINARY         = aarch64-none-elf-objdump
 -    NM_BINARY              = aarch64-none-elf-nm
 -    READELF_BINARY         = aarch64-none-elf-readelf
+-    LD_SCRIPT_PATH         = $(shell pwd)/src/bsp/raspberrypi
+-    RUSTC_MISC_ARGS        = -C target-cpu=cortex-a53
+-    CHAINBOOT_DEMO_PAYLOAD = demo_payload_rpi3.img
 +    TARGET            = aarch64-unknown-none-softfloat
 +    KERNEL_BIN        = kernel8.img
 +    QEMU_BINARY       = qemu-system-aarch64
@@ -82,9 +85,7 @@ diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
 +    OBJDUMP_BINARY    = aarch64-none-elf-objdump
 +    NM_BINARY         = aarch64-none-elf-nm
 +    READELF_BINARY    = aarch64-none-elf-readelf
-     LD_SCRIPT_PATH    = src/bsp/raspberrypi
--    RUSTC_MISC_ARGS        = -C target-cpu=cortex-a53
--    CHAINBOOT_DEMO_PAYLOAD = demo_payload_rpi3.img
++    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
 +    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
  else ifeq ($(BSP),rpi4)
 -    TARGET                 = aarch64-unknown-none-softfloat
@@ -95,6 +96,9 @@ diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
 -    OBJDUMP_BINARY         = aarch64-none-elf-objdump
 -    NM_BINARY              = aarch64-none-elf-nm
 -    READELF_BINARY         = aarch64-none-elf-readelf
+-    LD_SCRIPT_PATH         = $(shell pwd)/src/bsp/raspberrypi
+-    RUSTC_MISC_ARGS        = -C target-cpu=cortex-a72
+-    CHAINBOOT_DEMO_PAYLOAD = demo_payload_rpi4.img
 +    TARGET            = aarch64-unknown-none-softfloat
 +    KERNEL_BIN        = kernel8.img
 +    QEMU_BINARY       = qemu-system-aarch64
@@ -103,9 +107,7 @@ diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
 +    OBJDUMP_BINARY    = aarch64-none-elf-objdump
 +    NM_BINARY         = aarch64-none-elf-nm
 +    READELF_BINARY    = aarch64-none-elf-readelf
-     LD_SCRIPT_PATH    = src/bsp/raspberrypi
--    RUSTC_MISC_ARGS        = -C target-cpu=cortex-a72
--    CHAINBOOT_DEMO_PAYLOAD = demo_payload_rpi4.img
++    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
 +    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
  endif
 
diff --git a/07_timestamps/build.rs b/07_timestamps/build.rs
index f53b99494..cab00bb37 100644
--- a/07_timestamps/build.rs
+++ b/07_timestamps/build.rs
@@ -1,7 +1,10 @@
-use std::{env, fs};
+use std::{env, fs, process};
 
 fn main() {
-    let ld_script_path = env::var("LD_SCRIPT_PATH").unwrap_or_default();
+    let ld_script_path = match env::var("LD_SCRIPT_PATH") {
+        Ok(var) => var,
+        _ => process::exit(0),
+    };
 
     let files = fs::read_dir(ld_script_path).unwrap();
     files
diff --git a/08_hw_debug_JTAG/Makefile b/08_hw_debug_JTAG/Makefile
index 813a6112a..e3db66a95 100644
--- a/08_hw_debug_JTAG/Makefile
+++ b/08_hw_debug_JTAG/Makefile
@@ -33,7 +33,7 @@ ifeq ($(BSP),rpi3)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
-    LD_SCRIPT_PATH    = src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -46,7 +46,7 @@ else ifeq ($(BSP),rpi4)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
-    LD_SCRIPT_PATH    = src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
diff --git a/08_hw_debug_JTAG/README.md b/08_hw_debug_JTAG/README.md
index 33fa69b2e..902ca6e4a 100644
--- a/08_hw_debug_JTAG/README.md
+++ b/08_hw_debug_JTAG/README.md
@@ -326,7 +326,7 @@ diff -uNr 07_timestamps/Makefile 08_hw_debug_JTAG/Makefile
      READELF_BINARY    = aarch64-none-elf-readelf
 +    OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
 +    JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
-     LD_SCRIPT_PATH    = src/bsp/raspberrypi
+     LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
      RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
  else ifeq ($(BSP),rpi4)
 @@ -42,6 +44,8 @@
@@ -335,7 +335,7 @@ diff -uNr 07_timestamps/Makefile 08_hw_debug_JTAG/Makefile
      READELF_BINARY    = aarch64-none-elf-readelf
 +    OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
 +    JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
-     LD_SCRIPT_PATH    = src/bsp/raspberrypi
+     LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
      RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
  endif
 @@ -99,18 +103,25 @@
diff --git a/08_hw_debug_JTAG/build.rs b/08_hw_debug_JTAG/build.rs
index f53b99494..cab00bb37 100644
--- a/08_hw_debug_JTAG/build.rs
+++ b/08_hw_debug_JTAG/build.rs
@@ -1,7 +1,10 @@
-use std::{env, fs};
+use std::{env, fs, process};
 
 fn main() {
-    let ld_script_path = env::var("LD_SCRIPT_PATH").unwrap_or_default();
+    let ld_script_path = match env::var("LD_SCRIPT_PATH") {
+        Ok(var) => var,
+        _ => process::exit(0),
+    };
 
     let files = fs::read_dir(ld_script_path).unwrap();
     files
diff --git a/09_privilege_level/Makefile b/09_privilege_level/Makefile
index 813a6112a..e3db66a95 100644
--- a/09_privilege_level/Makefile
+++ b/09_privilege_level/Makefile
@@ -33,7 +33,7 @@ ifeq ($(BSP),rpi3)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
-    LD_SCRIPT_PATH    = src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -46,7 +46,7 @@ else ifeq ($(BSP),rpi4)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
-    LD_SCRIPT_PATH    = src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
diff --git a/09_privilege_level/build.rs b/09_privilege_level/build.rs
index f53b99494..cab00bb37 100644
--- a/09_privilege_level/build.rs
+++ b/09_privilege_level/build.rs
@@ -1,7 +1,10 @@
-use std::{env, fs};
+use std::{env, fs, process};
 
 fn main() {
-    let ld_script_path = env::var("LD_SCRIPT_PATH").unwrap_or_default();
+    let ld_script_path = match env::var("LD_SCRIPT_PATH") {
+        Ok(var) => var,
+        _ => process::exit(0),
+    };
 
     let files = fs::read_dir(ld_script_path).unwrap();
     files
diff --git a/10_virtual_mem_part1_identity_mapping/Makefile b/10_virtual_mem_part1_identity_mapping/Makefile
index 813a6112a..e3db66a95 100644
--- a/10_virtual_mem_part1_identity_mapping/Makefile
+++ b/10_virtual_mem_part1_identity_mapping/Makefile
@@ -33,7 +33,7 @@ ifeq ($(BSP),rpi3)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
-    LD_SCRIPT_PATH    = src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -46,7 +46,7 @@ else ifeq ($(BSP),rpi4)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
-    LD_SCRIPT_PATH    = src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
diff --git a/10_virtual_mem_part1_identity_mapping/build.rs b/10_virtual_mem_part1_identity_mapping/build.rs
index f53b99494..cab00bb37 100644
--- a/10_virtual_mem_part1_identity_mapping/build.rs
+++ b/10_virtual_mem_part1_identity_mapping/build.rs
@@ -1,7 +1,10 @@
-use std::{env, fs};
+use std::{env, fs, process};
 
 fn main() {
-    let ld_script_path = env::var("LD_SCRIPT_PATH").unwrap_or_default();
+    let ld_script_path = match env::var("LD_SCRIPT_PATH") {
+        Ok(var) => var,
+        _ => process::exit(0),
+    };
 
     let files = fs::read_dir(ld_script_path).unwrap();
     files
diff --git a/11_exceptions_part1_groundwork/Makefile b/11_exceptions_part1_groundwork/Makefile
index 813a6112a..e3db66a95 100644
--- a/11_exceptions_part1_groundwork/Makefile
+++ b/11_exceptions_part1_groundwork/Makefile
@@ -33,7 +33,7 @@ ifeq ($(BSP),rpi3)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
-    LD_SCRIPT_PATH    = src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -46,7 +46,7 @@ else ifeq ($(BSP),rpi4)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
-    LD_SCRIPT_PATH    = src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
diff --git a/11_exceptions_part1_groundwork/build.rs b/11_exceptions_part1_groundwork/build.rs
index f53b99494..cab00bb37 100644
--- a/11_exceptions_part1_groundwork/build.rs
+++ b/11_exceptions_part1_groundwork/build.rs
@@ -1,7 +1,10 @@
-use std::{env, fs};
+use std::{env, fs, process};
 
 fn main() {
-    let ld_script_path = env::var("LD_SCRIPT_PATH").unwrap_or_default();
+    let ld_script_path = match env::var("LD_SCRIPT_PATH") {
+        Ok(var) => var,
+        _ => process::exit(0),
+    };
 
     let files = fs::read_dir(ld_script_path).unwrap();
     files
diff --git a/12_integrated_testing/Makefile b/12_integrated_testing/Makefile
index 4e499306f..afa22480e 100644
--- a/12_integrated_testing/Makefile
+++ b/12_integrated_testing/Makefile
@@ -41,7 +41,7 @@ ifeq ($(BSP),rpi3)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
-    LD_SCRIPT_PATH    = src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -55,7 +55,7 @@ else ifeq ($(BSP),rpi4)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
-    LD_SCRIPT_PATH    = src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
diff --git a/12_integrated_testing/build.rs b/12_integrated_testing/build.rs
index f53b99494..cab00bb37 100644
--- a/12_integrated_testing/build.rs
+++ b/12_integrated_testing/build.rs
@@ -1,7 +1,10 @@
-use std::{env, fs};
+use std::{env, fs, process};
 
 fn main() {
-    let ld_script_path = env::var("LD_SCRIPT_PATH").unwrap_or_default();
+    let ld_script_path = match env::var("LD_SCRIPT_PATH") {
+        Ok(var) => var,
+        _ => process::exit(0),
+    };
 
     let files = fs::read_dir(ld_script_path).unwrap();
     files
diff --git a/13_exceptions_part2_peripheral_IRQs/Makefile b/13_exceptions_part2_peripheral_IRQs/Makefile
index 4e499306f..afa22480e 100644
--- a/13_exceptions_part2_peripheral_IRQs/Makefile
+++ b/13_exceptions_part2_peripheral_IRQs/Makefile
@@ -41,7 +41,7 @@ ifeq ($(BSP),rpi3)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
-    LD_SCRIPT_PATH    = src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -55,7 +55,7 @@ else ifeq ($(BSP),rpi4)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
-    LD_SCRIPT_PATH    = src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
diff --git a/13_exceptions_part2_peripheral_IRQs/build.rs b/13_exceptions_part2_peripheral_IRQs/build.rs
index f53b99494..cab00bb37 100644
--- a/13_exceptions_part2_peripheral_IRQs/build.rs
+++ b/13_exceptions_part2_peripheral_IRQs/build.rs
@@ -1,7 +1,10 @@
-use std::{env, fs};
+use std::{env, fs, process};
 
 fn main() {
-    let ld_script_path = env::var("LD_SCRIPT_PATH").unwrap_or_default();
+    let ld_script_path = match env::var("LD_SCRIPT_PATH") {
+        Ok(var) => var,
+        _ => process::exit(0),
+    };
 
     let files = fs::read_dir(ld_script_path).unwrap();
     files
diff --git a/14_virtual_mem_part2_mmio_remap/Makefile b/14_virtual_mem_part2_mmio_remap/Makefile
index 4e499306f..afa22480e 100644
--- a/14_virtual_mem_part2_mmio_remap/Makefile
+++ b/14_virtual_mem_part2_mmio_remap/Makefile
@@ -41,7 +41,7 @@ ifeq ($(BSP),rpi3)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
-    LD_SCRIPT_PATH    = src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -55,7 +55,7 @@ else ifeq ($(BSP),rpi4)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
-    LD_SCRIPT_PATH    = src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
diff --git a/14_virtual_mem_part2_mmio_remap/build.rs b/14_virtual_mem_part2_mmio_remap/build.rs
index f53b99494..cab00bb37 100644
--- a/14_virtual_mem_part2_mmio_remap/build.rs
+++ b/14_virtual_mem_part2_mmio_remap/build.rs
@@ -1,7 +1,10 @@
-use std::{env, fs};
+use std::{env, fs, process};
 
 fn main() {
-    let ld_script_path = env::var("LD_SCRIPT_PATH").unwrap_or_default();
+    let ld_script_path = match env::var("LD_SCRIPT_PATH") {
+        Ok(var) => var,
+        _ => process::exit(0),
+    };
 
     let files = fs::read_dir(ld_script_path).unwrap();
     files
diff --git a/15_virtual_mem_part3_precomputed_tables/Makefile b/15_virtual_mem_part3_precomputed_tables/Makefile
index 15dc5af05..fec9097c6 100644
--- a/15_virtual_mem_part3_precomputed_tables/Makefile
+++ b/15_virtual_mem_part3_precomputed_tables/Makefile
@@ -41,7 +41,7 @@ ifeq ($(BSP),rpi3)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
-    LD_SCRIPT_PATH    = src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -55,7 +55,7 @@ else ifeq ($(BSP),rpi4)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
-    LD_SCRIPT_PATH    = src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
diff --git a/15_virtual_mem_part3_precomputed_tables/build.rs b/15_virtual_mem_part3_precomputed_tables/build.rs
index f53b99494..cab00bb37 100644
--- a/15_virtual_mem_part3_precomputed_tables/build.rs
+++ b/15_virtual_mem_part3_precomputed_tables/build.rs
@@ -1,7 +1,10 @@
-use std::{env, fs};
+use std::{env, fs, process};
 
 fn main() {
-    let ld_script_path = env::var("LD_SCRIPT_PATH").unwrap_or_default();
+    let ld_script_path = match env::var("LD_SCRIPT_PATH") {
+        Ok(var) => var,
+        _ => process::exit(0),
+    };
 
     let files = fs::read_dir(ld_script_path).unwrap();
     files
diff --git a/16_virtual_mem_part4_higher_half_kernel/Makefile b/16_virtual_mem_part4_higher_half_kernel/Makefile
index 15dc5af05..fec9097c6 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Makefile
+++ b/16_virtual_mem_part4_higher_half_kernel/Makefile
@@ -41,7 +41,7 @@ ifeq ($(BSP),rpi3)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
-    LD_SCRIPT_PATH    = src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -55,7 +55,7 @@ else ifeq ($(BSP),rpi4)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
-    LD_SCRIPT_PATH    = src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/build.rs b/16_virtual_mem_part4_higher_half_kernel/build.rs
index f53b99494..cab00bb37 100644
--- a/16_virtual_mem_part4_higher_half_kernel/build.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/build.rs
@@ -1,7 +1,10 @@
-use std::{env, fs};
+use std::{env, fs, process};
 
 fn main() {
-    let ld_script_path = env::var("LD_SCRIPT_PATH").unwrap_or_default();
+    let ld_script_path = match env::var("LD_SCRIPT_PATH") {
+        Ok(var) => var,
+        _ => process::exit(0),
+    };
 
     let files = fs::read_dir(ld_script_path).unwrap();
     files
diff --git a/X1_JTAG_boot/Makefile b/X1_JTAG_boot/Makefile
index 1f2158e6c..3f6b230a5 100644
--- a/X1_JTAG_boot/Makefile
+++ b/X1_JTAG_boot/Makefile
@@ -31,7 +31,7 @@ ifeq ($(BSP),rpi3)
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
     READELF_BINARY    = aarch64-none-elf-readelf
-    LD_SCRIPT_PATH    = src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -42,7 +42,7 @@ else ifeq ($(BSP),rpi4)
     OBJDUMP_BINARY    = aarch64-none-elf-objdump
     NM_BINARY         = aarch64-none-elf-nm
     READELF_BINARY    = aarch64-none-elf-readelf
-    LD_SCRIPT_PATH    = src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
diff --git a/X1_JTAG_boot/build.rs b/X1_JTAG_boot/build.rs
index f53b99494..cab00bb37 100644
--- a/X1_JTAG_boot/build.rs
+++ b/X1_JTAG_boot/build.rs
@@ -1,7 +1,10 @@
-use std::{env, fs};
+use std::{env, fs, process};
 
 fn main() {
-    let ld_script_path = env::var("LD_SCRIPT_PATH").unwrap_or_default();
+    let ld_script_path = match env::var("LD_SCRIPT_PATH") {
+        Ok(var) => var,
+        _ => process::exit(0),
+    };
 
     let files = fs::read_dir(ld_script_path).unwrap();
     files

From e9a3c4b489ed830b73b530dfc6a3b9a8a048b452 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Tue, 19 Apr 2022 09:09:09 +0200
Subject: [PATCH 135/214] Rename main LD script to kernel.ld

---
 01_wait_forever/Makefile                      |  2 +-
 .../bsp/raspberrypi/{link.ld => kernel.ld}    |  0
 02_runtime_init/Makefile                      |  2 +-
 02_runtime_init/README.md                     |  6 +++---
 .../bsp/raspberrypi/{link.ld => kernel.ld}    |  0
 03_hacky_hello_world/Makefile                 |  2 +-
 .../bsp/raspberrypi/{link.ld => kernel.ld}    |  0
 04_safe_globals/Makefile                      |  2 +-
 .../bsp/raspberrypi/{link.ld => kernel.ld}    |  0
 05_drivers_gpio_uart/Makefile                 |  2 +-
 .../bsp/raspberrypi/{link.ld => kernel.ld}    |  0
 06_uart_chainloader/Makefile                  |  2 +-
 06_uart_chainloader/README.md                 |  6 +++---
 .../bsp/raspberrypi/{link.ld => kernel.ld}    |  0
 07_timestamps/Makefile                        |  2 +-
 07_timestamps/README.md                       |  6 +++---
 .../bsp/raspberrypi/{link.ld => kernel.ld}    |  0
 08_hw_debug_JTAG/Makefile                     |  2 +-
 .../bsp/raspberrypi/{link.ld => kernel.ld}    |  0
 09_privilege_level/Makefile                   |  2 +-
 .../bsp/raspberrypi/{link.ld => kernel.ld}    |  0
 .../Makefile                                  |  2 +-
 .../README.md                                 |  6 +++---
 .../bsp/raspberrypi/{link.ld => kernel.ld}    |  0
 11_exceptions_part1_groundwork/Makefile       |  2 +-
 .../bsp/raspberrypi/{link.ld => kernel.ld}    |  0
 12_integrated_testing/Makefile                |  2 +-
 .../bsp/raspberrypi/{link.ld => kernel.ld}    |  0
 13_exceptions_part2_peripheral_IRQs/Makefile  |  2 +-
 .../bsp/raspberrypi/{link.ld => kernel.ld}    |  0
 14_virtual_mem_part2_mmio_remap/Makefile      |  2 +-
 14_virtual_mem_part2_mmio_remap/README.md     |  6 +++---
 .../bsp/raspberrypi/{link.ld => kernel.ld}    |  0
 .../Makefile                                  |  2 +-
 .../README.md                                 | 20 +++++++++----------
 .../bsp/raspberrypi/{link.ld => kernel.ld}    |  0
 .../Makefile                                  |  2 +-
 .../README.md                                 |  6 +++---
 .../bsp/raspberrypi/{link.ld => kernel.ld}    |  0
 X1_JTAG_boot/Makefile                         |  2 +-
 .../bsp/raspberrypi/{link.ld => kernel.ld}    |  0
 41 files changed, 45 insertions(+), 45 deletions(-)
 rename 01_wait_forever/src/bsp/raspberrypi/{link.ld => kernel.ld} (100%)
 rename 02_runtime_init/src/bsp/raspberrypi/{link.ld => kernel.ld} (100%)
 rename 03_hacky_hello_world/src/bsp/raspberrypi/{link.ld => kernel.ld} (100%)
 rename 04_safe_globals/src/bsp/raspberrypi/{link.ld => kernel.ld} (100%)
 rename 05_drivers_gpio_uart/src/bsp/raspberrypi/{link.ld => kernel.ld} (100%)
 rename 06_uart_chainloader/src/bsp/raspberrypi/{link.ld => kernel.ld} (100%)
 rename 07_timestamps/src/bsp/raspberrypi/{link.ld => kernel.ld} (100%)
 rename 08_hw_debug_JTAG/src/bsp/raspberrypi/{link.ld => kernel.ld} (100%)
 rename 09_privilege_level/src/bsp/raspberrypi/{link.ld => kernel.ld} (100%)
 rename 10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/{link.ld => kernel.ld} (100%)
 rename 11_exceptions_part1_groundwork/src/bsp/raspberrypi/{link.ld => kernel.ld} (100%)
 rename 12_integrated_testing/src/bsp/raspberrypi/{link.ld => kernel.ld} (100%)
 rename 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/{link.ld => kernel.ld} (100%)
 rename 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/{link.ld => kernel.ld} (100%)
 rename 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/{link.ld => kernel.ld} (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/{link.ld => kernel.ld} (100%)
 rename X1_JTAG_boot/src/bsp/raspberrypi/{link.ld => kernel.ld} (100%)

diff --git a/01_wait_forever/Makefile b/01_wait_forever/Makefile
index cd987db5f..15082c037 100644
--- a/01_wait_forever/Makefile
+++ b/01_wait_forever/Makefile
@@ -51,7 +51,7 @@ export LD_SCRIPT_PATH
 ##--------------------------------------------------------------------------------------------------
 ## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
-KERNEL_LINKER_SCRIPT = link.ld
+KERNEL_LINKER_SCRIPT = kernel.ld
 
 LAST_BUILD_CONFIG = target/$(BSP).build_config
 
diff --git a/01_wait_forever/src/bsp/raspberrypi/link.ld b/01_wait_forever/src/bsp/raspberrypi/kernel.ld
similarity index 100%
rename from 01_wait_forever/src/bsp/raspberrypi/link.ld
rename to 01_wait_forever/src/bsp/raspberrypi/kernel.ld
diff --git a/02_runtime_init/Makefile b/02_runtime_init/Makefile
index d1d71ec99..d44f07aad 100644
--- a/02_runtime_init/Makefile
+++ b/02_runtime_init/Makefile
@@ -51,7 +51,7 @@ export LD_SCRIPT_PATH
 ##--------------------------------------------------------------------------------------------------
 ## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
-KERNEL_LINKER_SCRIPT = link.ld
+KERNEL_LINKER_SCRIPT = kernel.ld
 
 LAST_BUILD_CONFIG = target/$(BSP).build_config
 
diff --git a/02_runtime_init/README.md b/02_runtime_init/README.md
index 88c292391..f2f0f0472 100644
--- a/02_runtime_init/README.md
+++ b/02_runtime_init/README.md
@@ -196,9 +196,9 @@ diff -uNr 01_wait_forever/src/bsp/raspberrypi/cpu.rs 02_runtime_init/src/bsp/ras
 +#[link_section = ".text._start_arguments"]
 +pub static BOOT_CORE_ID: u64 = 0;
 
-diff -uNr 01_wait_forever/src/bsp/raspberrypi/link.ld 02_runtime_init/src/bsp/raspberrypi/link.ld
---- 01_wait_forever/src/bsp/raspberrypi/link.ld
-+++ 02_runtime_init/src/bsp/raspberrypi/link.ld
+diff -uNr 01_wait_forever/src/bsp/raspberrypi/kernel.ld 02_runtime_init/src/bsp/raspberrypi/kernel.ld
+--- 01_wait_forever/src/bsp/raspberrypi/kernel.ld
++++ 02_runtime_init/src/bsp/raspberrypi/kernel.ld
 @@ -3,6 +3,8 @@
   * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
   */
diff --git a/02_runtime_init/src/bsp/raspberrypi/link.ld b/02_runtime_init/src/bsp/raspberrypi/kernel.ld
similarity index 100%
rename from 02_runtime_init/src/bsp/raspberrypi/link.ld
rename to 02_runtime_init/src/bsp/raspberrypi/kernel.ld
diff --git a/03_hacky_hello_world/Makefile b/03_hacky_hello_world/Makefile
index 49dcc1ed1..ac52002f0 100644
--- a/03_hacky_hello_world/Makefile
+++ b/03_hacky_hello_world/Makefile
@@ -51,7 +51,7 @@ export LD_SCRIPT_PATH
 ##--------------------------------------------------------------------------------------------------
 ## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
-KERNEL_LINKER_SCRIPT = link.ld
+KERNEL_LINKER_SCRIPT = kernel.ld
 
 LAST_BUILD_CONFIG = target/$(BSP).build_config
 
diff --git a/03_hacky_hello_world/src/bsp/raspberrypi/link.ld b/03_hacky_hello_world/src/bsp/raspberrypi/kernel.ld
similarity index 100%
rename from 03_hacky_hello_world/src/bsp/raspberrypi/link.ld
rename to 03_hacky_hello_world/src/bsp/raspberrypi/kernel.ld
diff --git a/04_safe_globals/Makefile b/04_safe_globals/Makefile
index 49dcc1ed1..ac52002f0 100644
--- a/04_safe_globals/Makefile
+++ b/04_safe_globals/Makefile
@@ -51,7 +51,7 @@ export LD_SCRIPT_PATH
 ##--------------------------------------------------------------------------------------------------
 ## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
-KERNEL_LINKER_SCRIPT = link.ld
+KERNEL_LINKER_SCRIPT = kernel.ld
 
 LAST_BUILD_CONFIG = target/$(BSP).build_config
 
diff --git a/04_safe_globals/src/bsp/raspberrypi/link.ld b/04_safe_globals/src/bsp/raspberrypi/kernel.ld
similarity index 100%
rename from 04_safe_globals/src/bsp/raspberrypi/link.ld
rename to 04_safe_globals/src/bsp/raspberrypi/kernel.ld
diff --git a/05_drivers_gpio_uart/Makefile b/05_drivers_gpio_uart/Makefile
index 28702bc8f..193581e9f 100644
--- a/05_drivers_gpio_uart/Makefile
+++ b/05_drivers_gpio_uart/Makefile
@@ -54,7 +54,7 @@ export LD_SCRIPT_PATH
 ##--------------------------------------------------------------------------------------------------
 ## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
-KERNEL_LINKER_SCRIPT = link.ld
+KERNEL_LINKER_SCRIPT = kernel.ld
 
 LAST_BUILD_CONFIG = target/$(BSP).build_config
 
diff --git a/05_drivers_gpio_uart/src/bsp/raspberrypi/link.ld b/05_drivers_gpio_uart/src/bsp/raspberrypi/kernel.ld
similarity index 100%
rename from 05_drivers_gpio_uart/src/bsp/raspberrypi/link.ld
rename to 05_drivers_gpio_uart/src/bsp/raspberrypi/kernel.ld
diff --git a/06_uart_chainloader/Makefile b/06_uart_chainloader/Makefile
index b3af24c5e..5ae541753 100644
--- a/06_uart_chainloader/Makefile
+++ b/06_uart_chainloader/Makefile
@@ -56,7 +56,7 @@ export LD_SCRIPT_PATH
 ##--------------------------------------------------------------------------------------------------
 ## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
-KERNEL_LINKER_SCRIPT = link.ld
+KERNEL_LINKER_SCRIPT = kernel.ld
 
 LAST_BUILD_CONFIG = target/$(BSP).build_config
 
diff --git a/06_uart_chainloader/README.md b/06_uart_chainloader/README.md
index f07131ec7..b3db670fe 100644
--- a/06_uart_chainloader/README.md
+++ b/06_uart_chainloader/README.md
@@ -380,9 +380,9 @@ diff -uNr 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 0
          {}
      }
 
-diff -uNr 05_drivers_gpio_uart/src/bsp/raspberrypi/link.ld 06_uart_chainloader/src/bsp/raspberrypi/link.ld
---- 05_drivers_gpio_uart/src/bsp/raspberrypi/link.ld
-+++ 06_uart_chainloader/src/bsp/raspberrypi/link.ld
+diff -uNr 05_drivers_gpio_uart/src/bsp/raspberrypi/kernel.ld 06_uart_chainloader/src/bsp/raspberrypi/kernel.ld
+--- 05_drivers_gpio_uart/src/bsp/raspberrypi/kernel.ld
++++ 06_uart_chainloader/src/bsp/raspberrypi/kernel.ld
 @@ -3,8 +3,6 @@
   * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
   */
diff --git a/06_uart_chainloader/src/bsp/raspberrypi/link.ld b/06_uart_chainloader/src/bsp/raspberrypi/kernel.ld
similarity index 100%
rename from 06_uart_chainloader/src/bsp/raspberrypi/link.ld
rename to 06_uart_chainloader/src/bsp/raspberrypi/kernel.ld
diff --git a/07_timestamps/Makefile b/07_timestamps/Makefile
index 3f6b230a5..d127c422b 100644
--- a/07_timestamps/Makefile
+++ b/07_timestamps/Makefile
@@ -54,7 +54,7 @@ export LD_SCRIPT_PATH
 ##--------------------------------------------------------------------------------------------------
 ## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
-KERNEL_LINKER_SCRIPT = link.ld
+KERNEL_LINKER_SCRIPT = kernel.ld
 
 LAST_BUILD_CONFIG = target/$(BSP).build_config
 
diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index 14bdc6bd6..6904f4f92 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -451,9 +451,9 @@ diff -uNr 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 07
          {}
      }
 
-diff -uNr 06_uart_chainloader/src/bsp/raspberrypi/link.ld 07_timestamps/src/bsp/raspberrypi/link.ld
---- 06_uart_chainloader/src/bsp/raspberrypi/link.ld
-+++ 07_timestamps/src/bsp/raspberrypi/link.ld
+diff -uNr 06_uart_chainloader/src/bsp/raspberrypi/kernel.ld 07_timestamps/src/bsp/raspberrypi/kernel.ld
+--- 06_uart_chainloader/src/bsp/raspberrypi/kernel.ld
++++ 07_timestamps/src/bsp/raspberrypi/kernel.ld
 @@ -3,6 +3,8 @@
   * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
   */
diff --git a/07_timestamps/src/bsp/raspberrypi/link.ld b/07_timestamps/src/bsp/raspberrypi/kernel.ld
similarity index 100%
rename from 07_timestamps/src/bsp/raspberrypi/link.ld
rename to 07_timestamps/src/bsp/raspberrypi/kernel.ld
diff --git a/08_hw_debug_JTAG/Makefile b/08_hw_debug_JTAG/Makefile
index e3db66a95..1cf4d1aa8 100644
--- a/08_hw_debug_JTAG/Makefile
+++ b/08_hw_debug_JTAG/Makefile
@@ -58,7 +58,7 @@ export LD_SCRIPT_PATH
 ##--------------------------------------------------------------------------------------------------
 ## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
-KERNEL_LINKER_SCRIPT = link.ld
+KERNEL_LINKER_SCRIPT = kernel.ld
 
 LAST_BUILD_CONFIG = target/$(BSP).build_config
 
diff --git a/08_hw_debug_JTAG/src/bsp/raspberrypi/link.ld b/08_hw_debug_JTAG/src/bsp/raspberrypi/kernel.ld
similarity index 100%
rename from 08_hw_debug_JTAG/src/bsp/raspberrypi/link.ld
rename to 08_hw_debug_JTAG/src/bsp/raspberrypi/kernel.ld
diff --git a/09_privilege_level/Makefile b/09_privilege_level/Makefile
index e3db66a95..1cf4d1aa8 100644
--- a/09_privilege_level/Makefile
+++ b/09_privilege_level/Makefile
@@ -58,7 +58,7 @@ export LD_SCRIPT_PATH
 ##--------------------------------------------------------------------------------------------------
 ## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
-KERNEL_LINKER_SCRIPT = link.ld
+KERNEL_LINKER_SCRIPT = kernel.ld
 
 LAST_BUILD_CONFIG = target/$(BSP).build_config
 
diff --git a/09_privilege_level/src/bsp/raspberrypi/link.ld b/09_privilege_level/src/bsp/raspberrypi/kernel.ld
similarity index 100%
rename from 09_privilege_level/src/bsp/raspberrypi/link.ld
rename to 09_privilege_level/src/bsp/raspberrypi/kernel.ld
diff --git a/10_virtual_mem_part1_identity_mapping/Makefile b/10_virtual_mem_part1_identity_mapping/Makefile
index e3db66a95..1cf4d1aa8 100644
--- a/10_virtual_mem_part1_identity_mapping/Makefile
+++ b/10_virtual_mem_part1_identity_mapping/Makefile
@@ -58,7 +58,7 @@ export LD_SCRIPT_PATH
 ##--------------------------------------------------------------------------------------------------
 ## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
-KERNEL_LINKER_SCRIPT = link.ld
+KERNEL_LINKER_SCRIPT = kernel.ld
 
 LAST_BUILD_CONFIG = target/$(BSP).build_config
 
diff --git a/10_virtual_mem_part1_identity_mapping/README.md b/10_virtual_mem_part1_identity_mapping/README.md
index 1bf427c02..1a02666b1 100644
--- a/10_virtual_mem_part1_identity_mapping/README.md
+++ b/10_virtual_mem_part1_identity_mapping/README.md
@@ -828,9 +828,9 @@ diff -uNr 09_privilege_level/src/_arch/aarch64/memory/mmu.rs 10_virtual_mem_part
 +    }
 +}
 
-diff -uNr 09_privilege_level/src/bsp/raspberrypi/link.ld 10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
---- 09_privilege_level/src/bsp/raspberrypi/link.ld
-+++ 10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
+diff -uNr 09_privilege_level/src/bsp/raspberrypi/kernel.ld 10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/kernel.ld
+--- 09_privilege_level/src/bsp/raspberrypi/kernel.ld
++++ 10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/kernel.ld
 @@ -3,6 +3,9 @@
   * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
   */
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/kernel.ld
similarity index 100%
rename from 10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/link.ld
rename to 10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/kernel.ld
diff --git a/11_exceptions_part1_groundwork/Makefile b/11_exceptions_part1_groundwork/Makefile
index e3db66a95..1cf4d1aa8 100644
--- a/11_exceptions_part1_groundwork/Makefile
+++ b/11_exceptions_part1_groundwork/Makefile
@@ -58,7 +58,7 @@ export LD_SCRIPT_PATH
 ##--------------------------------------------------------------------------------------------------
 ## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
-KERNEL_LINKER_SCRIPT = link.ld
+KERNEL_LINKER_SCRIPT = kernel.ld
 
 LAST_BUILD_CONFIG = target/$(BSP).build_config
 
diff --git a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/link.ld b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/kernel.ld
similarity index 100%
rename from 11_exceptions_part1_groundwork/src/bsp/raspberrypi/link.ld
rename to 11_exceptions_part1_groundwork/src/bsp/raspberrypi/kernel.ld
diff --git a/12_integrated_testing/Makefile b/12_integrated_testing/Makefile
index afa22480e..925ac45fc 100644
--- a/12_integrated_testing/Makefile
+++ b/12_integrated_testing/Makefile
@@ -67,7 +67,7 @@ export LD_SCRIPT_PATH
 ##--------------------------------------------------------------------------------------------------
 ## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
-KERNEL_LINKER_SCRIPT = link.ld
+KERNEL_LINKER_SCRIPT = kernel.ld
 
 LAST_BUILD_CONFIG = target/$(BSP).build_config
 
diff --git a/12_integrated_testing/src/bsp/raspberrypi/link.ld b/12_integrated_testing/src/bsp/raspberrypi/kernel.ld
similarity index 100%
rename from 12_integrated_testing/src/bsp/raspberrypi/link.ld
rename to 12_integrated_testing/src/bsp/raspberrypi/kernel.ld
diff --git a/13_exceptions_part2_peripheral_IRQs/Makefile b/13_exceptions_part2_peripheral_IRQs/Makefile
index afa22480e..925ac45fc 100644
--- a/13_exceptions_part2_peripheral_IRQs/Makefile
+++ b/13_exceptions_part2_peripheral_IRQs/Makefile
@@ -67,7 +67,7 @@ export LD_SCRIPT_PATH
 ##--------------------------------------------------------------------------------------------------
 ## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
-KERNEL_LINKER_SCRIPT = link.ld
+KERNEL_LINKER_SCRIPT = kernel.ld
 
 LAST_BUILD_CONFIG = target/$(BSP).build_config
 
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld b/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/kernel.ld
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld
rename to 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/kernel.ld
diff --git a/14_virtual_mem_part2_mmio_remap/Makefile b/14_virtual_mem_part2_mmio_remap/Makefile
index afa22480e..925ac45fc 100644
--- a/14_virtual_mem_part2_mmio_remap/Makefile
+++ b/14_virtual_mem_part2_mmio_remap/Makefile
@@ -67,7 +67,7 @@ export LD_SCRIPT_PATH
 ##--------------------------------------------------------------------------------------------------
 ## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
-KERNEL_LINKER_SCRIPT = link.ld
+KERNEL_LINKER_SCRIPT = kernel.ld
 
 LAST_BUILD_CONFIG = target/$(BSP).build_config
 
diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index 07a82cda9..9e9adb70c 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -1431,9 +1431,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/driver.rs 14_v
          super::GPIO.map_pl011_uart();
      }
 
-diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
---- 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/link.ld
-+++ 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
+diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/kernel.ld 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/kernel.ld
+--- 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/kernel.ld
++++ 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/kernel.ld
 @@ -38,7 +38,7 @@
      ***********************************************************************************************/
      .boot_core_stack (NOLOAD) :
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld b/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/kernel.ld
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
rename to 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/kernel.ld
diff --git a/15_virtual_mem_part3_precomputed_tables/Makefile b/15_virtual_mem_part3_precomputed_tables/Makefile
index fec9097c6..56a776920 100644
--- a/15_virtual_mem_part3_precomputed_tables/Makefile
+++ b/15_virtual_mem_part3_precomputed_tables/Makefile
@@ -67,7 +67,7 @@ export LD_SCRIPT_PATH
 ##--------------------------------------------------------------------------------------------------
 ## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
-KERNEL_LINKER_SCRIPT = link.ld
+KERNEL_LINKER_SCRIPT = kernel.ld
 
 TT_TOOL_PATH = translation_table_tool
 
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index 37d157cc8..39881214f 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -813,7 +813,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/Makefile 15_virtual_mem_part3_precompu
 +++ 15_virtual_mem_part3_precomputed_tables/Makefile
 @@ -69,12 +69,19 @@
  ##--------------------------------------------------------------------------------------------------
- KERNEL_LINKER_SCRIPT = link.ld
+ KERNEL_LINKER_SCRIPT = kernel.ld
 
 +TT_TOOL_PATH = translation_table_tool
 +
@@ -1190,15 +1190,9 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs 15_virt
 +    }
 +}
 
-diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
---- 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
-+++ 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
-@@ -0,0 +1 @@
-+__kernel_virt_addr_space_size = 1024 * 1024 * 1024
-
-diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld
---- 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld
-+++ 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld
+diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/kernel.ld 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/kernel.ld
+--- 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/kernel.ld
++++ 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/kernel.ld
 @@ -3,6 +3,8 @@
   * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
   */
@@ -1209,6 +1203,12 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/link.ld 15_virtual
  PAGE_MASK = PAGE_SIZE - 1;
 
 
+diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
+--- 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
++++ 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
+@@ -0,0 +1 @@
++__kernel_virt_addr_space_size = 1024 * 1024 * 1024
+
 diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs
 --- 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
 +++ 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/kernel.ld
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld
rename to 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/kernel.ld
diff --git a/16_virtual_mem_part4_higher_half_kernel/Makefile b/16_virtual_mem_part4_higher_half_kernel/Makefile
index fec9097c6..56a776920 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Makefile
+++ b/16_virtual_mem_part4_higher_half_kernel/Makefile
@@ -67,7 +67,7 @@ export LD_SCRIPT_PATH
 ##--------------------------------------------------------------------------------------------------
 ## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
-KERNEL_LINKER_SCRIPT = link.ld
+KERNEL_LINKER_SCRIPT = kernel.ld
 
 TT_TOOL_PATH = translation_table_tool
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/README.md b/16_virtual_mem_part4_higher_half_kernel/README.md
index 52ca9bfee..f7c72aca3 100644
--- a/16_virtual_mem_part4_higher_half_kernel/README.md
+++ b/16_virtual_mem_part4_higher_half_kernel/README.md
@@ -638,9 +638,9 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/console.rs
 
      panic_uart
 
-diff -uNr 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/link.ld
---- 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/link.ld
-+++ 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/link.ld
+diff -uNr 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/kernel.ld 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/kernel.ld
+--- 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/kernel.ld
++++ 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/kernel.ld
 @@ -8,6 +8,13 @@
  PAGE_SIZE = 64K;
  PAGE_MASK = PAGE_SIZE - 1;
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/link.ld b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/kernel.ld
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/link.ld
rename to 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/kernel.ld
diff --git a/X1_JTAG_boot/Makefile b/X1_JTAG_boot/Makefile
index 3f6b230a5..d127c422b 100644
--- a/X1_JTAG_boot/Makefile
+++ b/X1_JTAG_boot/Makefile
@@ -54,7 +54,7 @@ export LD_SCRIPT_PATH
 ##--------------------------------------------------------------------------------------------------
 ## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
-KERNEL_LINKER_SCRIPT = link.ld
+KERNEL_LINKER_SCRIPT = kernel.ld
 
 LAST_BUILD_CONFIG = target/$(BSP).build_config
 
diff --git a/X1_JTAG_boot/src/bsp/raspberrypi/link.ld b/X1_JTAG_boot/src/bsp/raspberrypi/kernel.ld
similarity index 100%
rename from X1_JTAG_boot/src/bsp/raspberrypi/link.ld
rename to X1_JTAG_boot/src/bsp/raspberrypi/kernel.ld

From 353d92b1dfb6b3cb154c70e98b403d155ff0261b Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Tue, 19 Apr 2022 09:10:06 +0200
Subject: [PATCH 136/214] Revert "Move test-features activation to Cargo.toml"

This reverts commit 0b449706f3a0c3bbd115f1a3e6844e5fc0459ee0.

Also moves the feature addition before the if/else
---
 12_integrated_testing/Cargo.lock              |  1 -
 12_integrated_testing/Cargo.toml              |  7 -------
 12_integrated_testing/Makefile                |  2 ++
 12_integrated_testing/README.md               | 19 +++++++------------
 .../Cargo.lock                                |  1 -
 .../Cargo.toml                                |  7 -------
 13_exceptions_part2_peripheral_IRQs/Makefile  |  2 ++
 14_virtual_mem_part2_mmio_remap/Cargo.lock    |  1 -
 14_virtual_mem_part2_mmio_remap/Cargo.toml    |  7 -------
 14_virtual_mem_part2_mmio_remap/Makefile      |  2 ++
 .../Cargo.lock                                |  1 -
 .../Cargo.toml                                |  7 -------
 .../Makefile                                  |  2 ++
 .../README.md                                 |  2 +-
 .../Cargo.lock                                |  1 -
 .../Cargo.toml                                |  7 -------
 .../Makefile                                  |  2 ++
 17 files changed, 18 insertions(+), 53 deletions(-)

diff --git a/12_integrated_testing/Cargo.lock b/12_integrated_testing/Cargo.lock
index d34ce1348..5834e9f3a 100644
--- a/12_integrated_testing/Cargo.lock
+++ b/12_integrated_testing/Cargo.lock
@@ -16,7 +16,6 @@ name = "mingo"
 version = "0.12.0"
 dependencies = [
  "cortex-a",
- "mingo",
  "qemu-exit",
  "test-macros",
  "test-types",
diff --git a/12_integrated_testing/Cargo.toml b/12_integrated_testing/Cargo.toml
index 3e4b2a8a7..e768e6787 100644
--- a/12_integrated_testing/Cargo.toml
+++ b/12_integrated_testing/Cargo.toml
@@ -35,13 +35,6 @@ cortex-a = { version = "7.x.x" }
 [dev-dependencies]
 test-macros = { path = "test-macros" }
 
-# The following line is a workaround, as suggested in [1], to enable a feature in test-builds only.
-# This allows building the library part of the kernel with specialized code for testing.
-#
-#
-# [1] https://github.com/rust-lang/cargo/issues/2911#issuecomment-749580481
-mingo = { path = ".", features = ["test_build"] }
-
 # Unit tests are done in the library part of the kernel.
 [lib]
 name = "libkernel"
diff --git a/12_integrated_testing/Makefile b/12_integrated_testing/Makefile
index 925ac45fc..6adb1aca6 100644
--- a/12_integrated_testing/Makefile
+++ b/12_integrated_testing/Makefile
@@ -277,6 +277,8 @@ gdb gdb-opt0: $(KERNEL_ELF)
 ##--------------------------------------------------------------------------------------------------
 .PHONY: test test_boot test_unit test_integration
 
+test_unit test_integration: FEATURES += --features test_build
+
 ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
 test_boot test_unit test_integration test:
diff --git a/12_integrated_testing/README.md b/12_integrated_testing/README.md
index 05029ca1b..3bd88c966 100644
--- a/12_integrated_testing/README.md
+++ b/12_integrated_testing/README.md
@@ -324,7 +324,7 @@ pub fn qemu_exit_success() -> ! {
 [Click here] in case you are interested in the implementation. Note that for the functions to work,
 the `-semihosting` flag must be added to the `QEMU` invocation.
 
-You might have also noted the `#[cfg(feature = "test_build")]`. In `Cargo.toml`, we ensure that
+You might have also noted the `#[cfg(feature = "test_build")]`. In the `Makefile`, we ensure that
 this feature is only enabled when `cargo test` runs. This way, it is ensured that testing-specific
 code is conditionally compiled only for testing.
 
@@ -417,7 +417,7 @@ endef
 test_unit:
 	$(call color_header, "Compiling unit test(s) - $(BSP)")
 	$(call test_prepare)
-	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) --lib
+	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) --lib
 ```
 
 It first does the standard `objcopy` step to strip the `ELF` down to a raw binary. Just like in all
@@ -910,7 +910,7 @@ diff -uNr 11_exceptions_part1_groundwork/Cargo.toml 12_integrated_testing/Cargo.
  authors = ["Andre Richter <andre.o.richter@gmail.com>"]
  edition = "2021"
 
-@@ -11,20 +11,57 @@
+@@ -11,20 +11,50 @@
  default = []
  bsp_rpi3 = ["tock-registers"]
  bsp_rpi4 = ["tock-registers"]
@@ -942,13 +942,6 @@ diff -uNr 11_exceptions_part1_groundwork/Cargo.toml 12_integrated_testing/Cargo.
 +[dev-dependencies]
 +test-macros = { path = "test-macros" }
 +
-+# The following line is a workaround, as suggested in [1], to enable a feature in test-builds only.
-+# This allows building the library part of the kernel with specialized code for testing.
-+#
-+#
-+# [1] https://github.com/rust-lang/cargo/issues/2911#issuecomment-749580481
-+mingo = { path = ".", features = ["test_build"] }
-+
 +# Unit tests are done in the library part of the kernel.
 +[lib]
 +name = "libkernel"
@@ -1014,12 +1007,14 @@ diff -uNr 11_exceptions_part1_groundwork/Makefile 12_integrated_testing/Makefile
  OBJCOPY_CMD = rust-objcopy \
      --strip-all            \
      -O binary
-@@ -265,11 +275,11 @@
+@@ -265,11 +275,13 @@
  ##--------------------------------------------------------------------------------------------------
  ## Testing targets
  ##--------------------------------------------------------------------------------------------------
 -.PHONY: test test_boot
 +.PHONY: test test_boot test_unit test_integration
++
++test_unit test_integration: FEATURES += --features test_build
 
  ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
@@ -1028,7 +1023,7 @@ diff -uNr 11_exceptions_part1_groundwork/Makefile 12_integrated_testing/Makefile
  	$(call color_header, "$(QEMU_MISSING_STRING)")
 
  else # QEMU is supported.
-@@ -281,6 +291,43 @@
+@@ -281,6 +293,43 @@
  	$(call color_header, "Boot test - $(BSP)")
  	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
diff --git a/13_exceptions_part2_peripheral_IRQs/Cargo.lock b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
index ba1b9013c..8fde49eff 100644
--- a/13_exceptions_part2_peripheral_IRQs/Cargo.lock
+++ b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
@@ -16,7 +16,6 @@ name = "mingo"
 version = "0.13.0"
 dependencies = [
  "cortex-a",
- "mingo",
  "qemu-exit",
  "test-macros",
  "test-types",
diff --git a/13_exceptions_part2_peripheral_IRQs/Cargo.toml b/13_exceptions_part2_peripheral_IRQs/Cargo.toml
index a1a3bfbf4..7ef558318 100644
--- a/13_exceptions_part2_peripheral_IRQs/Cargo.toml
+++ b/13_exceptions_part2_peripheral_IRQs/Cargo.toml
@@ -35,13 +35,6 @@ cortex-a = { version = "7.x.x" }
 [dev-dependencies]
 test-macros = { path = "test-macros" }
 
-# The following line is a workaround, as suggested in [1], to enable a feature in test-builds only.
-# This allows building the library part of the kernel with specialized code for testing.
-#
-#
-# [1] https://github.com/rust-lang/cargo/issues/2911#issuecomment-749580481
-mingo = { path = ".", features = ["test_build"] }
-
 # Unit tests are done in the library part of the kernel.
 [lib]
 name = "libkernel"
diff --git a/13_exceptions_part2_peripheral_IRQs/Makefile b/13_exceptions_part2_peripheral_IRQs/Makefile
index 925ac45fc..6adb1aca6 100644
--- a/13_exceptions_part2_peripheral_IRQs/Makefile
+++ b/13_exceptions_part2_peripheral_IRQs/Makefile
@@ -277,6 +277,8 @@ gdb gdb-opt0: $(KERNEL_ELF)
 ##--------------------------------------------------------------------------------------------------
 .PHONY: test test_boot test_unit test_integration
 
+test_unit test_integration: FEATURES += --features test_build
+
 ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
 test_boot test_unit test_integration test:
diff --git a/14_virtual_mem_part2_mmio_remap/Cargo.lock b/14_virtual_mem_part2_mmio_remap/Cargo.lock
index ab4eda716..6526767a7 100644
--- a/14_virtual_mem_part2_mmio_remap/Cargo.lock
+++ b/14_virtual_mem_part2_mmio_remap/Cargo.lock
@@ -16,7 +16,6 @@ name = "mingo"
 version = "0.14.0"
 dependencies = [
  "cortex-a",
- "mingo",
  "qemu-exit",
  "test-macros",
  "test-types",
diff --git a/14_virtual_mem_part2_mmio_remap/Cargo.toml b/14_virtual_mem_part2_mmio_remap/Cargo.toml
index 130d80f7d..3146ad05f 100644
--- a/14_virtual_mem_part2_mmio_remap/Cargo.toml
+++ b/14_virtual_mem_part2_mmio_remap/Cargo.toml
@@ -35,13 +35,6 @@ cortex-a = { version = "7.x.x" }
 [dev-dependencies]
 test-macros = { path = "test-macros" }
 
-# The following line is a workaround, as suggested in [1], to enable a feature in test-builds only.
-# This allows building the library part of the kernel with specialized code for testing.
-#
-#
-# [1] https://github.com/rust-lang/cargo/issues/2911#issuecomment-749580481
-mingo = { path = ".", features = ["test_build"] }
-
 # Unit tests are done in the library part of the kernel.
 [lib]
 name = "libkernel"
diff --git a/14_virtual_mem_part2_mmio_remap/Makefile b/14_virtual_mem_part2_mmio_remap/Makefile
index 925ac45fc..6adb1aca6 100644
--- a/14_virtual_mem_part2_mmio_remap/Makefile
+++ b/14_virtual_mem_part2_mmio_remap/Makefile
@@ -277,6 +277,8 @@ gdb gdb-opt0: $(KERNEL_ELF)
 ##--------------------------------------------------------------------------------------------------
 .PHONY: test test_boot test_unit test_integration
 
+test_unit test_integration: FEATURES += --features test_build
+
 ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
 test_boot test_unit test_integration test:
diff --git a/15_virtual_mem_part3_precomputed_tables/Cargo.lock b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
index 29683180a..9ce8fc76f 100644
--- a/15_virtual_mem_part3_precomputed_tables/Cargo.lock
+++ b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
@@ -16,7 +16,6 @@ name = "mingo"
 version = "0.15.0"
 dependencies = [
  "cortex-a",
- "mingo",
  "qemu-exit",
  "test-macros",
  "test-types",
diff --git a/15_virtual_mem_part3_precomputed_tables/Cargo.toml b/15_virtual_mem_part3_precomputed_tables/Cargo.toml
index 1c39f36f3..6a41bd03d 100644
--- a/15_virtual_mem_part3_precomputed_tables/Cargo.toml
+++ b/15_virtual_mem_part3_precomputed_tables/Cargo.toml
@@ -35,13 +35,6 @@ cortex-a = { version = "7.x.x" }
 [dev-dependencies]
 test-macros = { path = "test-macros" }
 
-# The following line is a workaround, as suggested in [1], to enable a feature in test-builds only.
-# This allows building the library part of the kernel with specialized code for testing.
-#
-#
-# [1] https://github.com/rust-lang/cargo/issues/2911#issuecomment-749580481
-mingo = { path = ".", features = ["test_build"] }
-
 # Unit tests are done in the library part of the kernel.
 [lib]
 name = "libkernel"
diff --git a/15_virtual_mem_part3_precomputed_tables/Makefile b/15_virtual_mem_part3_precomputed_tables/Makefile
index 56a776920..a695185dc 100644
--- a/15_virtual_mem_part3_precomputed_tables/Makefile
+++ b/15_virtual_mem_part3_precomputed_tables/Makefile
@@ -293,6 +293,8 @@ gdb gdb-opt0: $(KERNEL_ELF)
 ##--------------------------------------------------------------------------------------------------
 .PHONY: test test_boot test_unit test_integration
 
+test_unit test_integration: FEATURES += --features test_build
+
 ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
 test_boot test_unit test_integration test:
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index 39881214f..bc666db81 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -869,7 +869,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/Makefile 15_virtual_mem_part3_precompu
  	$(call color_progress_prefix, "Name")
  	@echo $(KERNEL_BIN)
  	$(call color_progress_prefix, "Size")
-@@ -300,6 +316,7 @@
+@@ -302,6 +318,7 @@
      TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
      TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
index a17668285..af4081afc 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
+++ b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
@@ -16,7 +16,6 @@ name = "mingo"
 version = "0.16.0"
 dependencies = [
  "cortex-a",
- "mingo",
  "qemu-exit",
  "test-macros",
  "test-types",
diff --git a/16_virtual_mem_part4_higher_half_kernel/Cargo.toml b/16_virtual_mem_part4_higher_half_kernel/Cargo.toml
index 34f5090d1..4964df472 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Cargo.toml
+++ b/16_virtual_mem_part4_higher_half_kernel/Cargo.toml
@@ -35,13 +35,6 @@ cortex-a = { version = "7.x.x" }
 [dev-dependencies]
 test-macros = { path = "test-macros" }
 
-# The following line is a workaround, as suggested in [1], to enable a feature in test-builds only.
-# This allows building the library part of the kernel with specialized code for testing.
-#
-#
-# [1] https://github.com/rust-lang/cargo/issues/2911#issuecomment-749580481
-mingo = { path = ".", features = ["test_build"] }
-
 # Unit tests are done in the library part of the kernel.
 [lib]
 name = "libkernel"
diff --git a/16_virtual_mem_part4_higher_half_kernel/Makefile b/16_virtual_mem_part4_higher_half_kernel/Makefile
index 56a776920..a695185dc 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Makefile
+++ b/16_virtual_mem_part4_higher_half_kernel/Makefile
@@ -293,6 +293,8 @@ gdb gdb-opt0: $(KERNEL_ELF)
 ##--------------------------------------------------------------------------------------------------
 .PHONY: test test_boot test_unit test_integration
 
+test_unit test_integration: FEATURES += --features test_build
+
 ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
 test_boot test_unit test_integration test:

From 5d746828ad1311d88d0a6013aeb1b009d4d1f74a Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Tue, 19 Apr 2022 09:10:36 +0200
Subject: [PATCH 137/214] Remove relative path import from test scripts

---
 12_integrated_testing/README.md                          | 4 ++--
 12_integrated_testing/tests/00_console_sanity.rb         | 2 +-
 .../tests/03_exception_restore_sanity.rb                 | 2 +-
 .../tests/00_console_sanity.rb                           | 2 +-
 .../tests/03_exception_restore_sanity.rb                 | 2 +-
 .../tests/00_console_sanity.rb                           | 2 +-
 .../tests/03_exception_restore_sanity.rb                 | 2 +-
 .../tests/00_console_sanity.rb                           | 2 +-
 .../tests/03_exception_restore_sanity.rb                 | 2 +-
 .../tests/00_console_sanity.rb                           | 2 +-
 .../tests/03_exception_restore_sanity.rb                 | 2 +-
 common/tests/dispatch.rb                                 | 9 ++++++---
 12 files changed, 18 insertions(+), 15 deletions(-)

diff --git a/12_integrated_testing/README.md b/12_integrated_testing/README.md
index 3bd88c966..bfcff97a9 100644
--- a/12_integrated_testing/README.md
+++ b/12_integrated_testing/README.md
@@ -1824,7 +1824,7 @@ diff -uNr 11_exceptions_part1_groundwork/tests/00_console_sanity.rb 12_integrate
 +#
 +# Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 +
-+require_relative '../../common/tests/console_io_test'
++require 'console_io_test'
 +
 +# Verify sending and receiving works as expected.
 +class TxRxHandshakeTest < SubtestBase
@@ -2022,7 +2022,7 @@ diff -uNr 11_exceptions_part1_groundwork/tests/03_exception_restore_sanity.rb 12
 +#
 +# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
 +
-+require_relative '../../common/tests/console_io_test'
++require 'console_io_test'
 +
 +# Verify that exception restore works.
 +class ExceptionRestoreTest < SubtestBase
diff --git a/12_integrated_testing/tests/00_console_sanity.rb b/12_integrated_testing/tests/00_console_sanity.rb
index 48c9703db..4dde55762 100644
--- a/12_integrated_testing/tests/00_console_sanity.rb
+++ b/12_integrated_testing/tests/00_console_sanity.rb
@@ -4,7 +4,7 @@
 #
 # Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
-require_relative '../../common/tests/console_io_test'
+require 'console_io_test'
 
 # Verify sending and receiving works as expected.
 class TxRxHandshakeTest < SubtestBase
diff --git a/12_integrated_testing/tests/03_exception_restore_sanity.rb b/12_integrated_testing/tests/03_exception_restore_sanity.rb
index c3c725ed5..5f52e0c7c 100644
--- a/12_integrated_testing/tests/03_exception_restore_sanity.rb
+++ b/12_integrated_testing/tests/03_exception_restore_sanity.rb
@@ -4,7 +4,7 @@
 #
 # Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
 
-require_relative '../../common/tests/console_io_test'
+require 'console_io_test'
 
 # Verify that exception restore works.
 class ExceptionRestoreTest < SubtestBase
diff --git a/13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rb b/13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rb
index 48c9703db..4dde55762 100644
--- a/13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rb
+++ b/13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rb
@@ -4,7 +4,7 @@
 #
 # Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
-require_relative '../../common/tests/console_io_test'
+require 'console_io_test'
 
 # Verify sending and receiving works as expected.
 class TxRxHandshakeTest < SubtestBase
diff --git a/13_exceptions_part2_peripheral_IRQs/tests/03_exception_restore_sanity.rb b/13_exceptions_part2_peripheral_IRQs/tests/03_exception_restore_sanity.rb
index c3c725ed5..5f52e0c7c 100644
--- a/13_exceptions_part2_peripheral_IRQs/tests/03_exception_restore_sanity.rb
+++ b/13_exceptions_part2_peripheral_IRQs/tests/03_exception_restore_sanity.rb
@@ -4,7 +4,7 @@
 #
 # Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
 
-require_relative '../../common/tests/console_io_test'
+require 'console_io_test'
 
 # Verify that exception restore works.
 class ExceptionRestoreTest < SubtestBase
diff --git a/14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rb b/14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rb
index 48c9703db..4dde55762 100644
--- a/14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rb
+++ b/14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rb
@@ -4,7 +4,7 @@
 #
 # Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
-require_relative '../../common/tests/console_io_test'
+require 'console_io_test'
 
 # Verify sending and receiving works as expected.
 class TxRxHandshakeTest < SubtestBase
diff --git a/14_virtual_mem_part2_mmio_remap/tests/03_exception_restore_sanity.rb b/14_virtual_mem_part2_mmio_remap/tests/03_exception_restore_sanity.rb
index c3c725ed5..5f52e0c7c 100644
--- a/14_virtual_mem_part2_mmio_remap/tests/03_exception_restore_sanity.rb
+++ b/14_virtual_mem_part2_mmio_remap/tests/03_exception_restore_sanity.rb
@@ -4,7 +4,7 @@
 #
 # Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
 
-require_relative '../../common/tests/console_io_test'
+require 'console_io_test'
 
 # Verify that exception restore works.
 class ExceptionRestoreTest < SubtestBase
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rb b/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rb
index 48c9703db..4dde55762 100644
--- a/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rb
+++ b/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rb
@@ -4,7 +4,7 @@
 #
 # Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
-require_relative '../../common/tests/console_io_test'
+require 'console_io_test'
 
 # Verify sending and receiving works as expected.
 class TxRxHandshakeTest < SubtestBase
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/03_exception_restore_sanity.rb b/15_virtual_mem_part3_precomputed_tables/tests/03_exception_restore_sanity.rb
index c3c725ed5..5f52e0c7c 100644
--- a/15_virtual_mem_part3_precomputed_tables/tests/03_exception_restore_sanity.rb
+++ b/15_virtual_mem_part3_precomputed_tables/tests/03_exception_restore_sanity.rb
@@ -4,7 +4,7 @@
 #
 # Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
 
-require_relative '../../common/tests/console_io_test'
+require 'console_io_test'
 
 # Verify that exception restore works.
 class ExceptionRestoreTest < SubtestBase
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rb b/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rb
index 48c9703db..4dde55762 100644
--- a/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rb
+++ b/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rb
@@ -4,7 +4,7 @@
 #
 # Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
-require_relative '../../common/tests/console_io_test'
+require 'console_io_test'
 
 # Verify sending and receiving works as expected.
 class TxRxHandshakeTest < SubtestBase
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/03_exception_restore_sanity.rb b/16_virtual_mem_part4_higher_half_kernel/tests/03_exception_restore_sanity.rb
index c3c725ed5..5f52e0c7c 100644
--- a/16_virtual_mem_part4_higher_half_kernel/tests/03_exception_restore_sanity.rb
+++ b/16_virtual_mem_part4_higher_half_kernel/tests/03_exception_restore_sanity.rb
@@ -4,7 +4,7 @@
 #
 # Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
 
-require_relative '../../common/tests/console_io_test'
+require 'console_io_test'
 
 # Verify that exception restore works.
 class ExceptionRestoreTest < SubtestBase
diff --git a/common/tests/dispatch.rb b/common/tests/dispatch.rb
index 13ae3af85..86aaea86a 100755
--- a/common/tests/dispatch.rb
+++ b/common/tests/dispatch.rb
@@ -5,9 +5,12 @@
 #
 # Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
 
-require_relative 'boot_test'
-require_relative 'console_io_test'
-require_relative 'exit_code_test'
+file_dir = File.dirname(__FILE__)
+$LOAD_PATH.unshift(file_dir) unless $LOAD_PATH.include?(file_dir)
+
+require 'boot_test'
+require 'console_io_test'
+require 'exit_code_test'
 
 qemu_cmd = ARGV.join(' ')
 binary = ARGV.last

From 70f1ced57b20d2acd431347c94ace1d7c3e9bd0c Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Tue, 19 Apr 2022 09:11:12 +0200
Subject: [PATCH 138/214] Fix various clippy warnings

---
 12_integrated_testing/README.md                      |  2 +-
 12_integrated_testing/test-macros/src/lib.rs         |  2 +-
 .../test-macros/src/lib.rs                           |  2 +-
 14_virtual_mem_part2_mmio_remap/README.md            | 12 +++++-------
 14_virtual_mem_part2_mmio_remap/src/memory.rs        |  2 +-
 .../src/memory/mmu/types.rs                          |  8 +++-----
 .../test-macros/src/lib.rs                           |  2 +-
 15_virtual_mem_part3_precomputed_tables/README.md    |  8 ++++++--
 .../src/bsp/raspberrypi/console.rs                   |  4 ++++
 .../src/memory.rs                                    |  2 +-
 .../src/memory/mmu/types.rs                          |  8 +++-----
 .../test-macros/src/lib.rs                           |  2 +-
 16_virtual_mem_part4_higher_half_kernel/README.md    |  4 ++--
 .../src/bsp/raspberrypi/console.rs                   |  4 ++++
 .../src/memory.rs                                    |  2 +-
 .../src/memory/mmu/types.rs                          |  8 +++-----
 .../test-macros/src/lib.rs                           |  2 +-
 .../tests/02_exception_sync_page_fault.rs            |  2 +-
 18 files changed, 40 insertions(+), 36 deletions(-)

diff --git a/12_integrated_testing/README.md b/12_integrated_testing/README.md
index bfcff97a9..9c325e765 100644
--- a/12_integrated_testing/README.md
+++ b/12_integrated_testing/README.md
@@ -1797,7 +1797,7 @@ diff -uNr 11_exceptions_part1_groundwork/test-macros/src/lib.rs 12_integrated_te
 +pub fn kernel_test(_attr: TokenStream, input: TokenStream) -> TokenStream {
 +    let f = parse_macro_input!(input as ItemFn);
 +
-+    let test_name = &format!("{}", f.sig.ident.to_string());
++    let test_name = &format!("{}", f.sig.ident);
 +    let test_ident = Ident::new(
 +        &format!("{}_TEST_CONTAINER", f.sig.ident.to_string().to_uppercase()),
 +        Span::call_site(),
diff --git a/12_integrated_testing/test-macros/src/lib.rs b/12_integrated_testing/test-macros/src/lib.rs
index 83025a091..9879677cf 100644
--- a/12_integrated_testing/test-macros/src/lib.rs
+++ b/12_integrated_testing/test-macros/src/lib.rs
@@ -11,7 +11,7 @@ use syn::{parse_macro_input, Ident, ItemFn};
 pub fn kernel_test(_attr: TokenStream, input: TokenStream) -> TokenStream {
     let f = parse_macro_input!(input as ItemFn);
 
-    let test_name = &format!("{}", f.sig.ident.to_string());
+    let test_name = &format!("{}", f.sig.ident);
     let test_ident = Ident::new(
         &format!("{}_TEST_CONTAINER", f.sig.ident.to_string().to_uppercase()),
         Span::call_site(),
diff --git a/13_exceptions_part2_peripheral_IRQs/test-macros/src/lib.rs b/13_exceptions_part2_peripheral_IRQs/test-macros/src/lib.rs
index 83025a091..9879677cf 100644
--- a/13_exceptions_part2_peripheral_IRQs/test-macros/src/lib.rs
+++ b/13_exceptions_part2_peripheral_IRQs/test-macros/src/lib.rs
@@ -11,7 +11,7 @@ use syn::{parse_macro_input, Ident, ItemFn};
 pub fn kernel_test(_attr: TokenStream, input: TokenStream) -> TokenStream {
     let f = parse_macro_input!(input as ItemFn);
 
-    let test_name = &format!("{}", f.sig.ident.to_string());
+    let test_name = &format!("{}", f.sig.ident);
     let test_ident = Ident::new(
         &format!("{}_TEST_CONTAINER", f.sig.ident.to_string().to_uppercase()),
         Span::call_site(),
diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index 9e9adb70c..0056174b6 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -2639,7 +2639,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.r
 diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
 --- 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs
 +++ 14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
-@@ -0,0 +1,375 @@
+@@ -0,0 +1,373 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
@@ -3005,13 +3005,11 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 14_virtual
 +        assert_eq!(allocation.num_pages(), 2);
 +        assert_eq!(three_region.num_pages(), 1);
 +
-+        let mut count = 0;
-+        for i in allocation.into_iter() {
++        for (i, alloc) in allocation.into_iter().enumerate() {
 +            assert_eq!(
-+                i.into_inner().as_usize(),
-+                count * bsp::memory::mmu::KernelGranule::SIZE
++                alloc.into_inner().as_usize(),
++                i * bsp::memory::mmu::KernelGranule::SIZE
 +            );
-+            count = count + 1;
 +        }
 +    }
 +}
@@ -3588,7 +3586,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory.rs 14_virtual_mem_part2
 +            bsp::memory::mmu::KernelGranule::SIZE * 2
 +        );
 +
-+        assert_eq!(addr.is_page_aligned(), false);
++        assert!(!addr.is_page_aligned());
 +
 +        assert_eq!(addr.offset_into_page(), 100);
 +    }
diff --git a/14_virtual_mem_part2_mmio_remap/src/memory.rs b/14_virtual_mem_part2_mmio_remap/src/memory.rs
index b5aa666de..f20719bb7 100644
--- a/14_virtual_mem_part2_mmio_remap/src/memory.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/memory.rs
@@ -160,7 +160,7 @@ mod tests {
             bsp::memory::mmu::KernelGranule::SIZE * 2
         );
 
-        assert_eq!(addr.is_page_aligned(), false);
+        assert!(!addr.is_page_aligned());
 
         assert_eq!(addr.offset_into_page(), 100);
     }
diff --git a/14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs b/14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
index 82d5009c6..7a4fb0713 100644
--- a/14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
+++ b/14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
@@ -363,13 +363,11 @@ mod tests {
         assert_eq!(allocation.num_pages(), 2);
         assert_eq!(three_region.num_pages(), 1);
 
-        let mut count = 0;
-        for i in allocation.into_iter() {
+        for (i, alloc) in allocation.into_iter().enumerate() {
             assert_eq!(
-                i.into_inner().as_usize(),
-                count * bsp::memory::mmu::KernelGranule::SIZE
+                alloc.into_inner().as_usize(),
+                i * bsp::memory::mmu::KernelGranule::SIZE
             );
-            count = count + 1;
         }
     }
 }
diff --git a/14_virtual_mem_part2_mmio_remap/test-macros/src/lib.rs b/14_virtual_mem_part2_mmio_remap/test-macros/src/lib.rs
index 83025a091..9879677cf 100644
--- a/14_virtual_mem_part2_mmio_remap/test-macros/src/lib.rs
+++ b/14_virtual_mem_part2_mmio_remap/test-macros/src/lib.rs
@@ -11,7 +11,7 @@ use syn::{parse_macro_input, Ident, ItemFn};
 pub fn kernel_test(_attr: TokenStream, input: TokenStream) -> TokenStream {
     let f = parse_macro_input!(input as ItemFn);
 
-    let test_name = &format!("{}", f.sig.ident.to_string());
+    let test_name = &format!("{}", f.sig.ident);
     let test_ident = Ident::new(
         &format!("{}_TEST_CONTAINER", f.sig.ident.to_string().to_uppercase()),
         Span::call_site(),
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index bc666db81..b27571e3f 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -1146,11 +1146,15 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs 15_virt
  pub unsafe fn panic_console_out() -> impl fmt::Write {
      use driver::interface::DeviceDriver;
 
-@@ -45,6 +46,23 @@
+@@ -45,6 +46,27 @@
      panic_uart
  }
 
 +/// Reduced version for test builds.
++///
++/// # Safety
++///
++/// - Use only for printing during a panic.
 +#[cfg(feature = "test_build")]
 +pub unsafe fn panic_console_out() -> impl fmt::Write {
 +    use driver::interface::DeviceDriver;
@@ -1170,7 +1174,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs 15_virt
  /// Return a reference to the console.
  pub fn console() -> &'static impl console::interface::All {
      &super::PL011_UART
-@@ -56,7 +74,15 @@
+@@ -56,7 +78,15 @@
 
  /// Minimal code needed to bring up the console in QEMU (for testing only). This is often less steps
  /// than on real hardware due to QEMU's abstractions.
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/console.rs b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/console.rs
index edb1a831e..f4105ed77 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/console.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/console.rs
@@ -47,6 +47,10 @@ pub unsafe fn panic_console_out() -> impl fmt::Write {
 }
 
 /// Reduced version for test builds.
+///
+/// # Safety
+///
+/// - Use only for printing during a panic.
 #[cfg(feature = "test_build")]
 pub unsafe fn panic_console_out() -> impl fmt::Write {
     use driver::interface::DeviceDriver;
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory.rs b/15_virtual_mem_part3_precomputed_tables/src/memory.rs
index b5aa666de..f20719bb7 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/memory.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/memory.rs
@@ -160,7 +160,7 @@ mod tests {
             bsp::memory::mmu::KernelGranule::SIZE * 2
         );
 
-        assert_eq!(addr.is_page_aligned(), false);
+        assert!(!addr.is_page_aligned());
 
         assert_eq!(addr.offset_into_page(), 100);
     }
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs
index 82d5009c6..7a4fb0713 100644
--- a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs
+++ b/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs
@@ -363,13 +363,11 @@ mod tests {
         assert_eq!(allocation.num_pages(), 2);
         assert_eq!(three_region.num_pages(), 1);
 
-        let mut count = 0;
-        for i in allocation.into_iter() {
+        for (i, alloc) in allocation.into_iter().enumerate() {
             assert_eq!(
-                i.into_inner().as_usize(),
-                count * bsp::memory::mmu::KernelGranule::SIZE
+                alloc.into_inner().as_usize(),
+                i * bsp::memory::mmu::KernelGranule::SIZE
             );
-            count = count + 1;
         }
     }
 }
diff --git a/15_virtual_mem_part3_precomputed_tables/test-macros/src/lib.rs b/15_virtual_mem_part3_precomputed_tables/test-macros/src/lib.rs
index 83025a091..9879677cf 100644
--- a/15_virtual_mem_part3_precomputed_tables/test-macros/src/lib.rs
+++ b/15_virtual_mem_part3_precomputed_tables/test-macros/src/lib.rs
@@ -11,7 +11,7 @@ use syn::{parse_macro_input, Ident, ItemFn};
 pub fn kernel_test(_attr: TokenStream, input: TokenStream) -> TokenStream {
     let f = parse_macro_input!(input as ItemFn);
 
-    let test_name = &format!("{}", f.sig.ident.to_string());
+    let test_name = &format!("{}", f.sig.ident);
     let test_ident = Ident::new(
         &format!("{}_TEST_CONTAINER", f.sig.ident.to_string().to_uppercase()),
         Span::call_site(),
diff --git a/16_virtual_mem_part4_higher_half_kernel/README.md b/16_virtual_mem_part4_higher_half_kernel/README.md
index f7c72aca3..0c45e3ec9 100644
--- a/16_virtual_mem_part4_higher_half_kernel/README.md
+++ b/16_virtual_mem_part4_higher_half_kernel/README.md
@@ -617,7 +617,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/console.rs
          .unwrap_or_else(|_| cpu::wait_forever());
 
      panic_uart
-@@ -51,13 +56,14 @@
+@@ -55,13 +60,14 @@
  pub unsafe fn panic_console_out() -> impl fmt::Write {
      use driver::interface::DeviceDriver;
 
@@ -880,7 +880,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_f
 -    info!("Writing beyond mapped area to address 9 GiB...");
 -    let big_addr: u64 = 9 * 1024 * 1024 * 1024;
 +    info!("Writing to bottom of address space to address 1 GiB...");
-+    let big_addr: u64 = 1 * 1024 * 1024 * 1024;
++    let big_addr: u64 = 1024 * 1024 * 1024;
      core::ptr::read_volatile(big_addr as *mut u64);
 
      // If execution reaches here, the memory access above did not cause a page fault exception.
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/console.rs b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/console.rs
index e75f5fda1..a0d2e687c 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/console.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/console.rs
@@ -52,6 +52,10 @@ pub unsafe fn panic_console_out() -> impl fmt::Write {
 }
 
 /// Reduced version for test builds.
+///
+/// # Safety
+///
+/// - Use only for printing during a panic.
 #[cfg(feature = "test_build")]
 pub unsafe fn panic_console_out() -> impl fmt::Write {
     use driver::interface::DeviceDriver;
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory.rs b/16_virtual_mem_part4_higher_half_kernel/src/memory.rs
index b5aa666de..f20719bb7 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/memory.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/memory.rs
@@ -160,7 +160,7 @@ mod tests {
             bsp::memory::mmu::KernelGranule::SIZE * 2
         );
 
-        assert_eq!(addr.is_page_aligned(), false);
+        assert!(!addr.is_page_aligned());
 
         assert_eq!(addr.offset_into_page(), 100);
     }
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/types.rs b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/types.rs
index b72ece286..85c852b34 100644
--- a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/types.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/types.rs
@@ -368,13 +368,11 @@ mod tests {
         assert_eq!(allocation.num_pages(), 2);
         assert_eq!(three_region.num_pages(), 1);
 
-        let mut count = 0;
-        for i in allocation.into_iter() {
+        for (i, alloc) in allocation.into_iter().enumerate() {
             assert_eq!(
-                i.into_inner().as_usize(),
-                count * bsp::memory::mmu::KernelGranule::SIZE
+                alloc.into_inner().as_usize(),
+                i * bsp::memory::mmu::KernelGranule::SIZE
             );
-            count = count + 1;
         }
     }
 }
diff --git a/16_virtual_mem_part4_higher_half_kernel/test-macros/src/lib.rs b/16_virtual_mem_part4_higher_half_kernel/test-macros/src/lib.rs
index 83025a091..9879677cf 100644
--- a/16_virtual_mem_part4_higher_half_kernel/test-macros/src/lib.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/test-macros/src/lib.rs
@@ -11,7 +11,7 @@ use syn::{parse_macro_input, Ident, ItemFn};
 pub fn kernel_test(_attr: TokenStream, input: TokenStream) -> TokenStream {
     let f = parse_macro_input!(input as ItemFn);
 
-    let test_name = &format!("{}", f.sig.ident.to_string());
+    let test_name = &format!("{}", f.sig.ident);
     let test_ident = Ident::new(
         &format!("{}_TEST_CONTAINER", f.sig.ident.to_string().to_uppercase()),
         Span::call_site(),
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs b/16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs
index 71b63e212..0d2a1e63c 100644
--- a/16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs
@@ -29,7 +29,7 @@ unsafe fn kernel_init() -> ! {
     println!("Testing synchronous exception handling by causing a page fault");
 
     info!("Writing to bottom of address space to address 1 GiB...");
-    let big_addr: u64 = 1 * 1024 * 1024 * 1024;
+    let big_addr: u64 = 1024 * 1024 * 1024;
     core::ptr::read_volatile(big_addr as *mut u64);
 
     // If execution reaches here, the memory access above did not cause a page fault exception.

From e13edf999226007fc497646d6c6152a59aa296dc Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Tue, 19 Apr 2022 22:43:26 +0200
Subject: [PATCH 139/214] No diffs in translations

---
 02_runtime_init/README.CN.md      | 299 +--------------------------
 02_runtime_init/README.ES.md      | 329 +-----------------------------
 03_hacky_hello_world/README.ES.md | 285 +-------------------------
 3 files changed, 14 insertions(+), 899 deletions(-)

diff --git a/02_runtime_init/README.CN.md b/02_runtime_init/README.CN.md
index 51c637934..46c524672 100644
--- a/02_runtime_init/README.CN.md
+++ b/02_runtime_init/README.CN.md
@@ -19,302 +19,5 @@
 [bss]: https://en.wikipedia.org/wiki/.bss
 
 ## 相比之前的变化（diff）
-```diff
 
-diff -uNr 01_wait_forever/Cargo.toml 02_runtime_init/Cargo.toml
---- 01_wait_forever/Cargo.toml
-+++ 02_runtime_init/Cargo.toml
-@@ -4,6 +4,9 @@
- authors = ["Andre Richter <andre.o.richter@gmail.com>"]
- edition = "2018"
-
-+[profile.release]
-+lto = true
-+
- # The features section is used to select the target board.
- [features]
- default = []
-
-diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.S 02_runtime_init/src/_arch/aarch64/cpu/boot.S
---- 01_wait_forever/src/_arch/aarch64/cpu/boot.S
-+++ 02_runtime_init/src/_arch/aarch64/cpu/boot.S
-@@ -7,5 +7,15 @@
- .global _start
-
- _start:
--1:  wfe         // Wait for event
--    b       1b  // In case an event happened, jump back to 1
-+    mrs     x1, mpidr_el1   // Read Multiprocessor Affinity Register
-+    and     x1, x1, #3      // Clear all bits except [1:0], which hold core id
-+    cbz     x1, 2f          // Jump to label 2 if we are core 0
-+1:  wfe                     // Wait for event
-+    b       1b              // In case an event happened, jump back to 1
-+2:                          // If we are here, we are core0
-+    ldr     x1, =_start     // Load address of function "_start()"
-+    mov     sp, x1          // Set start of stack to before our code, aka first
-+                            // address before "_start()"
-+    bl      runtime_init    // Jump to the "runtime_init()" kernel function
-+    b       1b              // We should never reach here. But just in case,
-+                            // park this core aswell
-
-diff -uNr 01_wait_forever/src/_arch/aarch64/cpu.rs 02_runtime_init/src/_arch/aarch64/cpu.rs
---- 01_wait_forever/src/_arch/aarch64/cpu.rs
-+++ 02_runtime_init/src/_arch/aarch64/cpu.rs
-@@ -0,0 +1,30 @@
-+// SPDX-License-Identifier: MIT OR Apache-2.0
-+//
-+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
-+
-+//! Architectural processor code.
-+//!
-+//! # Orientation
-+//!
-+//! Since arch modules are imported into generic modules using the path attribute, the path of this
-+//! file is:
-+//!
-+//! crate::cpu::arch_cpu
-+
-+//--------------------------------------------------------------------------------------------------
-+// Public Code
-+//--------------------------------------------------------------------------------------------------
-+
-+/// Pause execution on the core.
-+#[inline(always)]
-+pub fn wait_forever() -> ! {
-+    unsafe {
-+        loop {
-+            #[rustfmt::skip]
-+            asm!(
-+                "wfe",
-+                options(nomem, nostack, preserves_flags)
-+            );
-+        }
-+    }
-+}
-
-diff -uNr 01_wait_forever/src/bsp/raspberrypi/link.ld 02_runtime_init/src/bsp/raspberrypi/link.ld
---- 01_wait_forever/src/bsp/raspberrypi/link.ld
-+++ 02_runtime_init/src/bsp/raspberrypi/link.ld
-@@ -13,5 +13,27 @@
-         *(.text._start) *(.text*)
-     }
-
-+    .rodata :
-+    {
-+        *(.rodata*)
-+    }
-+
-+    .data :
-+    {
-+        *(.data*)
-+    }
-+
-+    /* Section is zeroed in u64 chunks, align start and end to 8 bytes */
-+    .bss ALIGN(8):
-+    {
-+        __bss_start = .;
-+        *(.bss*);
-+        . = ALIGN(8);
-+
-+        /* Fill for the bss == 0 case, so that __bss_start <= __bss_end_inclusive holds */
-+        . += 8;
-+        __bss_end_inclusive = . - 8;
-+    }
-+
-     /DISCARD/ : { *(.comment*) }
- }
-
-diff -uNr 01_wait_forever/src/bsp/raspberrypi/memory.rs 02_runtime_init/src/bsp/raspberrypi/memory.rs
---- 01_wait_forever/src/bsp/raspberrypi/memory.rs
-+++ 02_runtime_init/src/bsp/raspberrypi/memory.rs
-@@ -0,0 +1,37 @@
-+// SPDX-License-Identifier: MIT OR Apache-2.0
-+//
-+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
-+
-+//! BSP Memory Management.
-+
-+use core::{cell::UnsafeCell, ops::RangeInclusive};
-+
-+//--------------------------------------------------------------------------------------------------
-+// Private Definitions
-+//--------------------------------------------------------------------------------------------------
-+
-+// Symbols from the linker script.
-+extern "Rust" {
-+    static __bss_start: UnsafeCell<u64>;
-+    static __bss_end_inclusive: UnsafeCell<u64>;
-+}
-+
-+//--------------------------------------------------------------------------------------------------
-+// Public Code
-+//--------------------------------------------------------------------------------------------------
-+
-+/// Return the inclusive range spanning the .bss section.
-+///
-+/// # Safety
-+///
-+/// - Values are provided by the linker script and must be trusted as-is.
-+/// - The linker-provided addresses must be u64 aligned.
-+pub fn bss_range_inclusive() -> RangeInclusive<*mut u64> {
-+    let range;
-+    unsafe {
-+        range = RangeInclusive::new(__bss_start.get(), __bss_end_inclusive.get());
-+    }
-+    assert!(!range.is_empty());
-+
-+    range
-+}
-
-diff -uNr 01_wait_forever/src/bsp/raspberrypi.rs 02_runtime_init/src/bsp/raspberrypi.rs
---- 01_wait_forever/src/bsp/raspberrypi.rs
-+++ 02_runtime_init/src/bsp/raspberrypi.rs
-@@ -4,4 +4,4 @@
-
- //! Top-level BSP file for the Raspberry Pi 3 and 4.
-
--// Coming soon.
-+pub mod memory;
-
-diff -uNr 01_wait_forever/src/cpu.rs 02_runtime_init/src/cpu.rs
---- 01_wait_forever/src/cpu.rs
-+++ 02_runtime_init/src/cpu.rs
-@@ -4,4 +4,13 @@
-
- //! Processor code.
-
-+#[cfg(target_arch = "aarch64")]
-+#[path = "_arch/aarch64/cpu.rs"]
-+mod arch_cpu;
-+
- mod boot;
-+
-+//--------------------------------------------------------------------------------------------------
-+// Architectural Public Reexports
-+//--------------------------------------------------------------------------------------------------
-+pub use arch_cpu::wait_forever;
-
-diff -uNr 01_wait_forever/src/main.rs 02_runtime_init/src/main.rs
---- 01_wait_forever/src/main.rs
-+++ 02_runtime_init/src/main.rs
-@@ -102,6 +102,7 @@
- //!
- //! 1. The kernel's entry point is the function [`cpu::boot::arch_boot::_start()`].
- //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.rs`.
-+//! 2. Once finished with architectural setup, the arch code calls [`runtime_init::runtime_init()`].
- //!
- //! [`cpu::boot::arch_boot::_start()`]: cpu/boot/arch_boot/fn._start.html
-
-@@ -112,6 +113,15 @@
-
- mod bsp;
- mod cpu;
-+mod memory;
- mod panic_wait;
-+mod runtime_init;
-
--// Kernel code coming next tutorial.
-+/// Early init code.
-+///
-+/// # Safety
-+///
-+/// - Only a single core must be active and running this function.
-+unsafe fn kernel_init() -> ! {
-+    panic!()
-+}
-
-diff -uNr 01_wait_forever/src/memory.rs 02_runtime_init/src/memory.rs
---- 01_wait_forever/src/memory.rs
-+++ 02_runtime_init/src/memory.rs
-@@ -0,0 +1,30 @@
-+// SPDX-License-Identifier: MIT OR Apache-2.0
-+//
-+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
-+
-+//! Memory Management.
-+
-+use core::ops::RangeInclusive;
-+
-+//--------------------------------------------------------------------------------------------------
-+// Public Code
-+//--------------------------------------------------------------------------------------------------
-+
-+/// Zero out an inclusive memory range.
-+///
-+/// # Safety
-+///
-+/// - `range.start` and `range.end` must be valid.
-+/// - `range.start` and `range.end` must be `T` aligned.
-+pub unsafe fn zero_volatile<T>(range: RangeInclusive<*mut T>)
-+where
-+    T: From<u8>,
-+{
-+    let mut ptr = *range.start();
-+    let end_inclusive = *range.end();
-+
-+    while ptr <= end_inclusive {
-+        core::ptr::write_volatile(ptr, T::from(0));
-+        ptr = ptr.offset(1);
-+    }
-+}
-
-diff -uNr 01_wait_forever/src/panic_wait.rs 02_runtime_init/src/panic_wait.rs
---- 01_wait_forever/src/panic_wait.rs
-+++ 02_runtime_init/src/panic_wait.rs
-@@ -4,9 +4,10 @@
-
- //! A panic handler that infinitely waits.
-
-+use crate::cpu;
- use core::panic::PanicInfo;
-
- #[panic_handler]
- fn panic(_info: &PanicInfo) -> ! {
--    unimplemented!()
-+    cpu::wait_forever()
- }
-
-diff -uNr 01_wait_forever/src/runtime_init.rs 02_runtime_init/src/runtime_init.rs
---- 01_wait_forever/src/runtime_init.rs
-+++ 02_runtime_init/src/runtime_init.rs
-@@ -0,0 +1,38 @@
-+// SPDX-License-Identifier: MIT OR Apache-2.0
-+//
-+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
-+
-+//! Rust runtime initialization code.
-+
-+use crate::{bsp, memory};
-+
-+//--------------------------------------------------------------------------------------------------
-+// Private Code
-+//--------------------------------------------------------------------------------------------------
-+
-+/// Zero out the .bss section.
-+///
-+/// # Safety
-+///
-+/// - Must only be called pre `kernel_init()`.
-+#[inline(always)]
-+unsafe fn zero_bss() {
-+    memory::zero_volatile(bsp::memory::bss_range_inclusive());
-+}
-+
-+//--------------------------------------------------------------------------------------------------
-+// Public Code
-+//--------------------------------------------------------------------------------------------------
-+
-+/// Equivalent to `crt0` or `c0` code in C/C++ world. Clears the `bss` section, then jumps to kernel
-+/// init code.
-+///
-+/// # Safety
-+///
-+/// - Only a single core must be active and running this function.
-+#[no_mangle]
-+pub unsafe fn runtime_init() -> ! {
-+    zero_bss();
-+
-+    crate::kernel_init()
-+}
-
-```
+Please check [the english version](README.md#diff-to-previous), which is kept up-to-date.
diff --git a/02_runtime_init/README.ES.md b/02_runtime_init/README.ES.md
index 6a5b3974f..79c4c2b45 100644
--- a/02_runtime_init/README.ES.md
+++ b/02_runtime_init/README.ES.md
@@ -9,340 +9,29 @@
 ## Adiciones importantes
 
 * Adiciones importantes al script `link.ld`:
-  
+
   * Nuevas secciones: `.rodata`, `.got`, `.data`, `.bss`.
-  
+
   * Un lugar totalmente dedicado a enlazar argumentos de tiempo de arranque (boot-time) que necesitan estar listos cuando se llame a `_start()`.
 
 * `_start()` en `_arch/__arch_name__/cpu/boot.s`:
-  
+
   1. Para todos los núcleos expecto el núcleo 0.
-  
+
   2. Inicializa la [`DRAM`](https://es.wikipedia.org/wiki/DRAM) poniendo a cero la sección [`.bss`](https://en.wikipedia.org/wiki/.bss).
-  
+
   3. Configura el `stack pointer` (puntero a la memoria [pila](https://es.wikipedia.org/wiki/Pila_(inform%C3%A1tica))).
-  
+
   4. Salta hacia la función `_start_rust()`, definida en `arch/__arch_name__/cpu/boot.rs`.
 
 * `_start_rust()`:
-  
+
   * Llama a `kernel_init()`, que llama a `panic!()`, que al final también pone al núcleo 0 en pausa.
 
 * La librería ahora usa el crate [cortex-a](https://github.com/rust-embedded/cortex-a), que nos da abstracciones sin coste y envuelve las partes que hacen uso de un `unsafe` (partes con código que no es seguro y podría causar errores) cuando se trabaja directamente con los recursos del procesador.
-  
+
   * Lo puedes ver en acción en `_arch/__arch_name__/cpu.rs`.
 
 ## Diferencia con el archivo anterior
 
-```diff
-diff -uNr 01_wait_forever/Cargo.toml 02_runtime_init/Cargo.toml
---- 01_wait_forever/Cargo.toml
-+++ 02_runtime_init/Cargo.toml
-@@ -1,6 +1,6 @@
- [package]
- name = "mingo"
--version = "0.1.0"
-+version = "0.2.0"
- authors = ["Andre Richter <andre.o.richter@gmail.com>"]
- edition = "2021"
-
-@@ -21,3 +21,7 @@
- ##--------------------------------------------------------------------------------------------------
-
- [dependencies]
-+
-+# Platform specific dependencies
-+[target.'cfg(target_arch = "aarch64")'.dependencies]
-+cortex-a = { version = "7.x.x" }
-
-diff -uNr 01_wait_forever/Makefile 02_runtime_init/Makefile
---- 01_wait_forever/Makefile
-+++ 02_runtime_init/Makefile
-@@ -153,6 +153,8 @@
-     $(call colorecho, "\nLaunching objdump")
-     @$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
-                 --section .text   \
-+                --section .rodata \
-+                --section .got    \
-                 $(KERNEL_ELF) | rustfilt
-
- ##------------------------------------------------------------------------------
-
-diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.rs 02_runtime_init/src/_arch/aarch64/cpu/boot.rs
---- 01_wait_forever/src/_arch/aarch64/cpu/boot.rs
-+++ 02_runtime_init/src/_arch/aarch64/cpu/boot.rs
-@@ -13,3 +13,15 @@
-
- // Assembly counterpart to this file.
- core::arch::global_asm!(include_str!("boot.s"));
-+
-+//--------------------------------------------------------------------------------------------------
-+// Public Code
-+//--------------------------------------------------------------------------------------------------
-+
-+/// The Rust entry of the `kernel` binary.
-+///
-+/// The function is called from the assembly `_start` function.
-+#[no_mangle]
-+pub unsafe fn _start_rust() -> ! {
-+    crate::kernel_init()
-+}
-
-diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.s 02_runtime_init/src/_arch/aarch64/cpu/boot.s
---- 01_wait_forever/src/_arch/aarch64/cpu/boot.s
-+++ 02_runtime_init/src/_arch/aarch64/cpu/boot.s
-@@ -3,6 +3,24 @@
- // Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
-
- //--------------------------------------------------------------------------------------------------
-+// Definitions
-+//--------------------------------------------------------------------------------------------------
-+
-+// Load the address of a symbol into a register, PC-relative.
-+//
-+// The symbol must lie within +/- 4 GiB of the Program Counter.
-+//
-+// # Resources
-+//
-+// - https://sourceware.org/binutils/docs-2.36/as/AArch64_002dRelocations.html
-+.macro ADR_REL register, symbol
-+    adrp    \register, \symbol
-+    add    \register, \register, #:lo12:\symbol
-+.endm
-+
-+.equ _core_id_mask, 0b11
-+
-+//--------------------------------------------------------------------------------------------------
- // Public Code
- //--------------------------------------------------------------------------------------------------
- .section .text._start
-@@ -11,6 +29,34 @@
- // fn _start()
- //------------------------------------------------------------------------------
- _start:
-+    // Only proceed on the boot core. Park it otherwise.
-+    mrs    x1, MPIDR_EL1
-+    and    x1, x1, _core_id_mask
-+    ldr    x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
-+    cmp    x1, x2
-+    b.ne    .L_parking_loop
-+
-+    // If execution reaches here, it is the boot core.
-+
-+    // Initialize DRAM.
-+    ADR_REL    x0, __bss_start
-+    ADR_REL x1, __bss_end_exclusive
-+
-+.L_bss_init_loop:
-+    cmp    x0, x1
-+    b.eq    .L_prepare_rust
-+    stp    xzr, xzr, [x0], #16
-+    b    .L_bss_init_loop
-+
-+    // Prepare the jump to Rust code.
-+.L_prepare_rust:
-+    // Set the stack pointer.
-+    ADR_REL    x0, __boot_core_stack_end_exclusive
-+    mov    sp, x0
-+
-+    // Jump to Rust code.
-+    b    _start_rust
-+
-     // Infinitely wait for events (aka "park the core").
- .L_parking_loop:
-     wfe
-
-diff -uNr 01_wait_forever/src/_arch/aarch64/cpu.rs 02_runtime_init/src/_arch/aarch64/cpu.rs
---- 01_wait_forever/src/_arch/aarch64/cpu.rs
-+++ 02_runtime_init/src/_arch/aarch64/cpu.rs
-@@ -0,0 +1,26 @@
-+// SPDX-License-Identifier: MIT OR Apache-2.0
-+//
-+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
-+
-+//! Architectural processor code.
-+//!
-+//! # Orientation
-+//!
-+//! Since arch modules are imported into generic modules using the path attribute, the path of this
-+//! file is:
-+//!
-+//! crate::cpu::arch_cpu
-+
-+use cortex_a::asm;
-+
-+//--------------------------------------------------------------------------------------------------
-+// Public Code
-+//--------------------------------------------------------------------------------------------------
-+
-+/// Pause execution on the core.
-+#[inline(always)]
-+pub fn wait_forever() -> ! {
-+    loop {
-+        asm::wfe()
-+    }
-+}
-
-diff -uNr 01_wait_forever/src/bsp/raspberrypi/cpu.rs 02_runtime_init/src/bsp/raspberrypi/cpu.rs
---- 01_wait_forever/src/bsp/raspberrypi/cpu.rs
-+++ 02_runtime_init/src/bsp/raspberrypi/cpu.rs
-@@ -0,0 +1,14 @@
-+// SPDX-License-Identifier: MIT OR Apache-2.0
-+//
-+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
-+
-+//! BSP Processor code.
-+
-+//--------------------------------------------------------------------------------------------------
-+// Public Definitions
-+//--------------------------------------------------------------------------------------------------
-+
-+/// Used by `arch` code to find the early boot core.
-+#[no_mangle]
-+#[link_section = ".text._start_arguments"]
-+pub static BOOT_CORE_ID: u64 = 0;
-
-diff -uNr 01_wait_forever/src/bsp/raspberrypi/link.ld 02_runtime_init/src/bsp/raspberrypi/link.ld
---- 01_wait_forever/src/bsp/raspberrypi/link.ld
-+++ 02_runtime_init/src/bsp/raspberrypi/link.ld
-@@ -3,6 +3,8 @@
-  * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
-  */
-
-+__rpi_phys_dram_start_addr = 0;
-+
- /* The physical address at which the the kernel binary will be loaded by the Raspberry's firmware */
- __rpi_phys_binary_load_addr = 0x80000;
-
-@@ -13,21 +15,58 @@
-  *     4 == R
-  *     5 == RX
-  *     6 == RW
-+ *
-+ * Segments are marked PT_LOAD below so that the ELF file provides virtual and physical addresses.
-+ * It doesn't mean all of them need actually be loaded.
-  */
- PHDRS
- {
--    segment_code PT_LOAD FLAGS(5);
-+    segment_boot_core_stack PT_LOAD FLAGS(6);
-+    segment_code            PT_LOAD FLAGS(5);
-+    segment_data            PT_LOAD FLAGS(6);
- }
-
- SECTIONS
- {
--    . =  __rpi_phys_binary_load_addr;
-+    . =  __rpi_phys_dram_start_addr;
-+
-+    /***********************************************************************************************
-+    * Boot Core Stack
-+    ***********************************************************************************************/
-+    .boot_core_stack (NOLOAD) :
-+    {
-+                                             /*   ^             */
-+                                             /*   | stack       */
-+        . += __rpi_phys_binary_load_addr;    /*   | growth      */
-+                                             /*   | direction   */
-+        __boot_core_stack_end_exclusive = .; /*   |             */
-+    } :segment_boot_core_stack
-
-     /***********************************************************************************************
--    * Code
-+    * Code + RO Data + Global Offset Table
-     ***********************************************************************************************/
-     .text :
-     {
-         KEEP(*(.text._start))
-+        *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
-+        *(.text._start_rust)      /* The Rust entry point */
-+        *(.text*)                 /* Everything else */
-     } :segment_code
-+
-+    .rodata : ALIGN(8) { *(.rodata*) } :segment_code
-+    .got    : ALIGN(8) { *(.got)     } :segment_code
-+
-+    /***********************************************************************************************
-+    * Data + BSS
-+    ***********************************************************************************************/
-+    .data : { *(.data*) } :segment_data
-+
-+    /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
-+    .bss (NOLOAD) : ALIGN(16)
-+    {
-+        __bss_start = .;
-+        *(.bss*);
-+        . = ALIGN(16);
-+        __bss_end_exclusive = .;
-+    } :segment_data
- }
-
-diff -uNr 01_wait_forever/src/bsp/raspberrypi.rs 02_runtime_init/src/bsp/raspberrypi.rs
---- 01_wait_forever/src/bsp/raspberrypi.rs
-+++ 02_runtime_init/src/bsp/raspberrypi.rs
-@@ -4,4 +4,4 @@
-
- //! Top-level BSP file for the Raspberry Pi 3 and 4.
-
--// Coming soon.
-+pub mod cpu;
-
-diff -uNr 01_wait_forever/src/cpu.rs 02_runtime_init/src/cpu.rs
---- 01_wait_forever/src/cpu.rs
-+++ 02_runtime_init/src/cpu.rs
-@@ -4,4 +4,13 @@
-
- //! Processor code.
-
-+#[cfg(target_arch = "aarch64")]
-+#[path = "_arch/aarch64/cpu.rs"]
-+mod arch_cpu;
-+
- mod boot;
-+
-+//--------------------------------------------------------------------------------------------------
-+// Architectural Public Reexports
-+//--------------------------------------------------------------------------------------------------
-+pub use arch_cpu::wait_forever;
-
-diff -uNr 01_wait_forever/src/main.rs 02_runtime_init/src/main.rs
---- 01_wait_forever/src/main.rs
-+++ 02_runtime_init/src/main.rs
-@@ -102,6 +102,7 @@
- //!
- //! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
- //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
-+//! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
-
- #![no_main]
- #![no_std]
-@@ -110,4 +111,11 @@
- mod cpu;
- mod panic_wait;
-
--// Kernel code coming next tutorial.
-+/// Early init code.
-+///
-+/// # Safety
-+///
-+/// - Only a single core must be active and running this function.
-+unsafe fn kernel_init() -> ! {
-+    panic!()
-+}
-
-diff -uNr 01_wait_forever/src/panic_wait.rs 02_runtime_init/src/panic_wait.rs
---- 01_wait_forever/src/panic_wait.rs
-+++ 02_runtime_init/src/panic_wait.rs
-@@ -4,9 +4,10 @@
-
- //! A panic handler that infinitely waits.
-
-+use crate::cpu;
- use core::panic::PanicInfo;
-
- #[panic_handler]
- fn panic(_info: &PanicInfo) -> ! {
--    unimplemented!()
-+    cpu::wait_forever()
- }
-```
+Please check [the english version](README.md#diff-to-previous), which is kept up-to-date.
diff --git a/03_hacky_hello_world/README.ES.md b/03_hacky_hello_world/README.ES.md
index f52b226e0..eafa3c214 100644
--- a/03_hacky_hello_world/README.ES.md
+++ b/03_hacky_hello_world/README.ES.md
@@ -31,292 +31,15 @@ Kernel panic: Stopping here.
 * *Hacky:* Solución torpe o poco elegante para un problema.
 
 * *Debugging:* Proceso para identificar y corregir errores de programación.
-  
+
   * *printf debugging:* Usado para describir el trabajo de depuración (*debugging*) poniendo comandos que dan una salida en consola, como el de "printf", en diferentes lugares del programa; observando la información y tratando de deducir qué está mal en el programa basándose en la información que nos dan nuestros comandos.
 
 * *Traits:* Un *trait* le hace saber al compilador de Rust acerca de una funcionalidad que tiene un tipo de dato particular y que puede compartir con otros tipos de datos.
-  
+
   > NOTA: Los *traits* son similares a una característica que se le conoce comúnmente como *interfaces* en otros lenguajes, aunque con algunas diferencias.
-  
+
   Si deseas aprender más acerca de esto, por favor lee este capítulo del libro de Rust: [Traits: Defining Shared Behavior - The Rust Programming Language](https://doc.rust-lang.org/book/ch10-02-traits.html)
 
 ## Diferencias con el archivo anterior
 
-```diff
-diff -uNr 02_runtime_init/Cargo.toml 03_hacky_hello_world/Cargo.toml
---- 02_runtime_init/Cargo.toml
-+++ 03_hacky_hello_world/Cargo.toml
-@@ -1,6 +1,6 @@
- [package]
- name = "mingo"
--version = "0.2.0"
-+version = "0.3.0"
- authors = ["Andre Richter <andre.o.richter@gmail.com>"]
- edition = "2021"
-
-
-diff -uNr 02_runtime_init/Makefile 03_hacky_hello_world/Makefile
---- 02_runtime_init/Makefile
-+++ 03_hacky_hello_world/Makefile
-@@ -24,7 +24,7 @@
-     KERNEL_BIN        = kernel8.img
-     QEMU_BINARY       = qemu-system-aarch64
-     QEMU_MACHINE_TYPE = raspi3
--    QEMU_RELEASE_ARGS = -d in_asm -display none
-+    QEMU_RELEASE_ARGS = -serial stdio -display none
-     OBJDUMP_BINARY    = aarch64-none-elf-objdump
-     NM_BINARY         = aarch64-none-elf-nm
-     READELF_BINARY    = aarch64-none-elf-readelf
-@@ -35,7 +35,7 @@
-     KERNEL_BIN        = kernel8.img
-     QEMU_BINARY       = qemu-system-aarch64
-     QEMU_MACHINE_TYPE =
--    QEMU_RELEASE_ARGS = -d in_asm -display none
-+    QEMU_RELEASE_ARGS = -serial stdio -display none
-     OBJDUMP_BINARY    = aarch64-none-elf-objdump
-     NM_BINARY         = aarch64-none-elf-nm
-     READELF_BINARY    = aarch64-none-elf-readelf
-@@ -71,17 +71,20 @@
-     --strip-all            \
-     -O binary
-
--EXEC_QEMU = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
-+EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
-+EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
-
- ##------------------------------------------------------------------------------
- ## Dockerization
- ##------------------------------------------------------------------------------
--DOCKER_CMD          = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
--DOCKER_CMD_INTERACT = $(DOCKER_CMD) -i
-+DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
-+DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
-+DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
-
- # DOCKER_IMAGE defined in include file (see top of this file).
- DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
- DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
-+DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
-
-
-
-@@ -169,3 +172,28 @@
- ##------------------------------------------------------------------------------
- check:
-     @RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
-+
-+
-+
-+##--------------------------------------------------------------------------------------------------
-+## Testing targets
-+##--------------------------------------------------------------------------------------------------
-+.PHONY: test test_boot
-+
-+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
-+
-+test_boot test :
-+    $(call colorecho, "\n$(QEMU_MISSING_STRING)")
-+
-+else # QEMU is supported.
-+
-+##------------------------------------------------------------------------------
-+## Run boot test
-+##------------------------------------------------------------------------------
-+test_boot: $(KERNEL_BIN)
-+    $(call colorecho, "\nBoot test - $(BSP)")
-+    @$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
-+
-+test: test_boot
-+
-+endif
-
-diff -uNr 02_runtime_init/src/bsp/raspberrypi/console.rs 03_hacky_hello_world/src/bsp/raspberrypi/console.rs
---- 02_runtime_init/src/bsp/raspberrypi/console.rs
-+++ 03_hacky_hello_world/src/bsp/raspberrypi/console.rs
-@@ -0,0 +1,47 @@
-+// SPDX-License-Identifier: MIT OR Apache-2.0
-+//
-+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
-+
-+//! BSP console facilities.
-+
-+use crate::console;
-+use core::fmt;
-+
-+//--------------------------------------------------------------------------------------------------
-+// Private Definitions
-+//--------------------------------------------------------------------------------------------------
-+
-+/// A mystical, magical device for generating QEMU output out of the void.
-+struct QEMUOutput;
-+
-+//--------------------------------------------------------------------------------------------------
-+// Private Code
-+//--------------------------------------------------------------------------------------------------
-+
-+/// Implementing `core::fmt::Write` enables usage of the `format_args!` macros, which in turn are
-+/// used to implement the `kernel`'s `print!` and `println!` macros. By implementing `write_str()`,
-+/// we get `write_fmt()` automatically.
-+///
-+/// See [`src/print.rs`].
-+///
-+/// [`src/print.rs`]: ../../print/index.html
-+impl fmt::Write for QEMUOutput {
-+    fn write_str(&mut self, s: &str) -> fmt::Result {
-+        for c in s.chars() {
-+            unsafe {
-+                core::ptr::write_volatile(0x3F20_1000 as *mut u8, c as u8);
-+            }
-+        }
-+
-+        Ok(())
-+    }
-+}
-+
-+//--------------------------------------------------------------------------------------------------
-+// Public Code
-+//--------------------------------------------------------------------------------------------------
-+
-+/// Return a reference to the console.
-+pub fn console() -> impl console::interface::Write {
-+    QEMUOutput {}
-+}
-
-diff -uNr 02_runtime_init/src/bsp/raspberrypi.rs 03_hacky_hello_world/src/bsp/raspberrypi.rs
---- 02_runtime_init/src/bsp/raspberrypi.rs
-+++ 03_hacky_hello_world/src/bsp/raspberrypi.rs
-@@ -4,4 +4,5 @@
-
- //! Top-level BSP file for the Raspberry Pi 3 and 4.
-
-+pub mod console;
- pub mod cpu;
-
-diff -uNr 02_runtime_init/src/console.rs 03_hacky_hello_world/src/console.rs
---- 02_runtime_init/src/console.rs
-+++ 03_hacky_hello_world/src/console.rs
-@@ -0,0 +1,19 @@
-+// SPDX-License-Identifier: MIT OR Apache-2.0
-+//
-+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
-+
-+//! System console.
-+
-+//--------------------------------------------------------------------------------------------------
-+// Public Definitions
-+//--------------------------------------------------------------------------------------------------
-+
-+/// Console interfaces.
-+pub mod interface {
-+    /// Console write functions.
-+    ///
-+    /// `core::fmt::Write` is exactly what we need for now. Re-export it here because
-+    /// implementing `console::Write` gives a better hint to the reader about the
-+    /// intention.
-+    pub use core::fmt::Write;
-+}
-
-diff -uNr 02_runtime_init/src/main.rs 03_hacky_hello_world/src/main.rs
---- 02_runtime_init/src/main.rs
-+++ 03_hacky_hello_world/src/main.rs
-@@ -104,12 +104,16 @@
- //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
- //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
-
-+#![feature(format_args_nl)]
-+#![feature(panic_info_message)]
- #![no_main]
- #![no_std]
-
- mod bsp;
-+mod console;
- mod cpu;
- mod panic_wait;
-+mod print;
-
- /// Early init code.
- ///
-@@ -117,5 +121,7 @@
- ///
- /// - Only a single core must be active and running this function.
- unsafe fn kernel_init() -> ! {
--    panic!()
-+    println!("[0] Hello from Rust!");
-+
-+    panic!("Stopping here.")
- }
-
-diff -uNr 02_runtime_init/src/panic_wait.rs 03_hacky_hello_world/src/panic_wait.rs
---- 02_runtime_init/src/panic_wait.rs
-+++ 03_hacky_hello_world/src/panic_wait.rs
-@@ -4,10 +4,16 @@
-
- //! A panic handler that infinitely waits.
-
--use crate::cpu;
-+use crate::{cpu, println};
- use core::panic::PanicInfo;
-
- #[panic_handler]
--fn panic(_info: &PanicInfo) -> ! {
-+fn panic(info: &PanicInfo) -> ! {
-+    if let Some(args) = info.message() {
-+        println!("\nKernel panic: {}", args);
-+    } else {
-+        println!("\nKernel panic!");
-+    }
-+
-     cpu::wait_forever()
- }
-
-diff -uNr 02_runtime_init/src/print.rs 03_hacky_hello_world/src/print.rs
---- 02_runtime_init/src/print.rs
-+++ 03_hacky_hello_world/src/print.rs
-@@ -0,0 +1,38 @@
-+// SPDX-License-Identifier: MIT OR Apache-2.0
-+//
-+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
-+
-+//! Printing.
-+
-+use crate::{bsp, console};
-+use core::fmt;
-+
-+//--------------------------------------------------------------------------------------------------
-+// Public Code
-+//--------------------------------------------------------------------------------------------------
-+
-+#[doc(hidden)]
-+pub fn _print(args: fmt::Arguments) {
-+    use console::interface::Write;
-+
-+    bsp::console::console().write_fmt(args).unwrap();
-+}
-+
-+/// Prints without a newline.
-+///
-+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
-+#[macro_export]
-+macro_rules! print {
-+    ($($arg:tt)*) => ($crate::print::_print(format_args!($($arg)*)));
-+}
-+
-+/// Prints with a newline.
-+///
-+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
-+#[macro_export]
-+macro_rules! println {
-+    () => ($crate::print!("\n"));
-+    ($($arg:tt)*) => ({
-+        $crate::print::_print(format_args_nl!($($arg)*));
-+    })
-+}
-
-diff -uNr 02_runtime_init/tests/boot_test_string.rb 03_hacky_hello_world/tests/boot_test_string.rb
---- 02_runtime_init/tests/boot_test_string.rb
-+++ 03_hacky_hello_world/tests/boot_test_string.rb
-@@ -0,0 +1,3 @@
-+# frozen_string_literal: true
-+
-+EXPECTED_PRINT = 'Stopping here'
-```
+Please check [the english version](README.md#diff-to-previous), which is kept up-to-date.

From 8c661977b8541f403cd1405a5fa4ae6d73d43675 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Tue, 19 Apr 2022 22:44:01 +0200
Subject: [PATCH 140/214] Use a virtual manifest starting tutorial 12

This is finally possible since the new feature resolver.

For reference:
https://github.com/rust-lang/rust-analyzer/issues/6197#issuecomment-827564835
---
 12_integrated_testing/Cargo.lock              |    4 +-
 12_integrated_testing/Cargo.toml              |   63 +-
 12_integrated_testing/Makefile                |   18 +-
 12_integrated_testing/README.md               | 1352 +----------------
 12_integrated_testing/kernel/Cargo.toml       |   58 +
 12_integrated_testing/{ => kernel}/build.rs   |    0
 .../{ => kernel}/src/_arch/aarch64/cpu.rs     |    0
 .../src/_arch/aarch64/cpu/boot.rs             |    0
 .../{ => kernel}/src/_arch/aarch64/cpu/boot.s |    0
 .../src/_arch/aarch64/exception.rs            |    0
 .../src/_arch/aarch64/exception.s             |    0
 .../_arch/aarch64/exception/asynchronous.rs   |    0
 .../src/_arch/aarch64/memory/mmu.rs           |    0
 .../aarch64/memory/mmu/translation_table.rs   |    0
 .../{ => kernel}/src/_arch/aarch64/time.rs    |    0
 12_integrated_testing/{ => kernel}/src/bsp.rs |    0
 .../{ => kernel}/src/bsp/device_driver.rs     |    0
 .../{ => kernel}/src/bsp/device_driver/bcm.rs |    0
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |    0
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |    0
 .../src/bsp/device_driver/common.rs           |    0
 .../{ => kernel}/src/bsp/raspberrypi.rs       |    0
 .../src/bsp/raspberrypi/console.rs            |    0
 .../{ => kernel}/src/bsp/raspberrypi/cpu.rs   |    0
 .../src/bsp/raspberrypi/driver.rs             |    0
 .../src/bsp/raspberrypi/kernel.ld             |    0
 .../src/bsp/raspberrypi/memory.rs             |    0
 .../src/bsp/raspberrypi/memory/mmu.rs         |    0
 .../{ => kernel}/src/console.rs               |    0
 12_integrated_testing/{ => kernel}/src/cpu.rs |    0
 .../{ => kernel}/src/cpu/boot.rs              |    0
 .../{ => kernel}/src/driver.rs                |    0
 .../{ => kernel}/src/exception.rs             |    0
 .../src/exception/asynchronous.rs             |    0
 12_integrated_testing/{ => kernel}/src/lib.rs |    0
 .../{ => kernel}/src/main.rs                  |    0
 .../{ => kernel}/src/memory.rs                |    0
 .../{ => kernel}/src/memory/mmu.rs            |    0
 .../src/memory/mmu/translation_table.rs       |    0
 .../{ => kernel}/src/panic_wait.rs            |    0
 .../{ => kernel}/src/print.rs                 |    0
 .../{ => kernel}/src/synchronization.rs       |    0
 .../{ => kernel}/src/time.rs                  |    0
 .../{ => kernel}/tests/00_console_sanity.rb   |    0
 .../{ => kernel}/tests/00_console_sanity.rs   |    0
 .../{ => kernel}/tests/01_timer_sanity.rs     |    0
 .../tests/02_exception_sync_page_fault.rs     |    0
 .../tests/03_exception_restore_sanity.rb      |    0
 .../tests/03_exception_restore_sanity.rs      |    0
 .../{ => kernel}/tests/boot_test_string.rb    |    0
 .../tests/panic_exit_success/mod.rs           |    0
 .../tests/panic_wait_forever/mod.rs           |    0
 .../{ => libraries}/test-macros/Cargo.toml    |    0
 .../{ => libraries}/test-macros/src/lib.rs    |    0
 .../{ => libraries}/test-types/Cargo.toml     |    0
 .../{ => libraries}/test-types/src/lib.rs     |    0
 .../Cargo.lock                                |    4 +-
 .../Cargo.toml                                |   63 +-
 13_exceptions_part2_peripheral_IRQs/Makefile  |   18 +-
 13_exceptions_part2_peripheral_IRQs/README.md |  178 +--
 .../kernel/Cargo.toml                         |   58 +
 .../{ => kernel}/build.rs                     |    0
 .../{ => kernel}/src/_arch/aarch64/cpu.rs     |    0
 .../src/_arch/aarch64/cpu/boot.rs             |    0
 .../{ => kernel}/src/_arch/aarch64/cpu/boot.s |    0
 .../{ => kernel}/src/_arch/aarch64/cpu/smp.rs |    0
 .../src/_arch/aarch64/exception.rs            |    0
 .../src/_arch/aarch64/exception.s             |    0
 .../_arch/aarch64/exception/asynchronous.rs   |    0
 .../src/_arch/aarch64/memory/mmu.rs           |    0
 .../aarch64/memory/mmu/translation_table.rs   |    0
 .../{ => kernel}/src/_arch/aarch64/time.rs    |    0
 .../{ => kernel}/src/bsp.rs                   |    0
 .../{ => kernel}/src/bsp/device_driver.rs     |    0
 .../{ => kernel}/src/bsp/device_driver/arm.rs |    0
 .../src/bsp/device_driver/arm/gicv2.rs        |    0
 .../src/bsp/device_driver/arm/gicv2/gicc.rs   |    0
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |    0
 .../{ => kernel}/src/bsp/device_driver/bcm.rs |    0
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |    0
 .../bcm/bcm2xxx_interrupt_controller.rs       |    0
 .../peripheral_ic.rs                          |    0
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |    0
 .../src/bsp/device_driver/common.rs           |    0
 .../{ => kernel}/src/bsp/raspberrypi.rs       |    0
 .../src/bsp/raspberrypi/console.rs            |    0
 .../{ => kernel}/src/bsp/raspberrypi/cpu.rs   |    0
 .../src/bsp/raspberrypi/driver.rs             |    0
 .../src/bsp/raspberrypi/exception.rs          |    0
 .../bsp/raspberrypi/exception/asynchronous.rs |    0
 .../src/bsp/raspberrypi/kernel.ld             |    0
 .../src/bsp/raspberrypi/memory.rs             |    0
 .../src/bsp/raspberrypi/memory/mmu.rs         |    0
 .../{ => kernel}/src/console.rs               |    0
 .../{ => kernel}/src/cpu.rs                   |    0
 .../{ => kernel}/src/cpu/boot.rs              |    0
 .../{ => kernel}/src/cpu/smp.rs               |    0
 .../{ => kernel}/src/driver.rs                |    0
 .../{ => kernel}/src/exception.rs             |    0
 .../src/exception/asynchronous.rs             |    0
 .../{ => kernel}/src/lib.rs                   |    0
 .../{ => kernel}/src/main.rs                  |    0
 .../{ => kernel}/src/memory.rs                |    0
 .../{ => kernel}/src/memory/mmu.rs            |    0
 .../src/memory/mmu/translation_table.rs       |    0
 .../{ => kernel}/src/panic_wait.rs            |    0
 .../{ => kernel}/src/print.rs                 |    0
 .../{ => kernel}/src/state.rs                 |    0
 .../{ => kernel}/src/synchronization.rs       |    0
 .../{ => kernel}/src/time.rs                  |    0
 .../{ => kernel}/tests/00_console_sanity.rb   |    0
 .../{ => kernel}/tests/00_console_sanity.rs   |    0
 .../{ => kernel}/tests/01_timer_sanity.rs     |    0
 .../tests/02_exception_sync_page_fault.rs     |    0
 .../tests/03_exception_restore_sanity.rb      |    0
 .../tests/03_exception_restore_sanity.rs      |    0
 .../tests/04_exception_irq_sanity.rs          |    0
 .../{ => kernel}/tests/boot_test_string.rb    |    0
 .../tests/panic_exit_success/mod.rs           |    0
 .../tests/panic_wait_forever/mod.rs           |    0
 .../{ => libraries}/test-macros/Cargo.toml    |    0
 .../{ => libraries}/test-macros/src/lib.rs    |    0
 .../{ => libraries}/test-types/Cargo.toml     |    0
 .../{ => libraries}/test-types/src/lib.rs     |    0
 14_virtual_mem_part2_mmio_remap/Cargo.lock    |    4 +-
 14_virtual_mem_part2_mmio_remap/Cargo.toml    |   63 +-
 14_virtual_mem_part2_mmio_remap/Makefile      |   18 +-
 14_virtual_mem_part2_mmio_remap/README.md     |  187 +--
 .../kernel/Cargo.toml                         |   58 +
 .../{ => kernel}/build.rs                     |    0
 .../{ => kernel}/src/_arch/aarch64/cpu.rs     |    0
 .../src/_arch/aarch64/cpu/boot.rs             |    0
 .../{ => kernel}/src/_arch/aarch64/cpu/boot.s |    0
 .../{ => kernel}/src/_arch/aarch64/cpu/smp.rs |    0
 .../src/_arch/aarch64/exception.rs            |    0
 .../src/_arch/aarch64/exception.s             |    0
 .../_arch/aarch64/exception/asynchronous.rs   |    0
 .../src/_arch/aarch64/memory/mmu.rs           |    0
 .../aarch64/memory/mmu/translation_table.rs   |    0
 .../{ => kernel}/src/_arch/aarch64/time.rs    |    0
 .../{ => kernel}/src/bsp.rs                   |    0
 .../{ => kernel}/src/bsp/device_driver.rs     |    0
 .../{ => kernel}/src/bsp/device_driver/arm.rs |    0
 .../src/bsp/device_driver/arm/gicv2.rs        |    0
 .../src/bsp/device_driver/arm/gicv2/gicc.rs   |    0
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |    0
 .../{ => kernel}/src/bsp/device_driver/bcm.rs |    0
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |    0
 .../bcm/bcm2xxx_interrupt_controller.rs       |    0
 .../peripheral_ic.rs                          |    0
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |    0
 .../src/bsp/device_driver/common.rs           |    0
 .../{ => kernel}/src/bsp/raspberrypi.rs       |    0
 .../src/bsp/raspberrypi/console.rs            |    0
 .../{ => kernel}/src/bsp/raspberrypi/cpu.rs   |    0
 .../src/bsp/raspberrypi/driver.rs             |    0
 .../src/bsp/raspberrypi/exception.rs          |    0
 .../bsp/raspberrypi/exception/asynchronous.rs |    0
 .../src/bsp/raspberrypi/kernel.ld             |    0
 .../src/bsp/raspberrypi/memory.rs             |    0
 .../src/bsp/raspberrypi/memory/mmu.rs         |    0
 .../{ => kernel}/src/common.rs                |    0
 .../{ => kernel}/src/console.rs               |    0
 .../{ => kernel}/src/cpu.rs                   |    0
 .../{ => kernel}/src/cpu/boot.rs              |    0
 .../{ => kernel}/src/cpu/smp.rs               |    0
 .../{ => kernel}/src/driver.rs                |    0
 .../{ => kernel}/src/exception.rs             |    0
 .../src/exception/asynchronous.rs             |    0
 .../{ => kernel}/src/lib.rs                   |    0
 .../{ => kernel}/src/main.rs                  |    0
 .../{ => kernel}/src/memory.rs                |    0
 .../{ => kernel}/src/memory/mmu.rs            |    0
 .../{ => kernel}/src/memory/mmu/alloc.rs      |    0
 .../src/memory/mmu/mapping_record.rs          |    0
 .../src/memory/mmu/translation_table.rs       |    0
 .../{ => kernel}/src/memory/mmu/types.rs      |    0
 .../{ => kernel}/src/panic_wait.rs            |    0
 .../{ => kernel}/src/print.rs                 |    0
 .../{ => kernel}/src/state.rs                 |    0
 .../{ => kernel}/src/synchronization.rs       |    0
 .../{ => kernel}/src/time.rs                  |    0
 .../{ => kernel}/tests/00_console_sanity.rb   |    0
 .../{ => kernel}/tests/00_console_sanity.rs   |    0
 .../{ => kernel}/tests/01_timer_sanity.rs     |    0
 .../tests/02_exception_sync_page_fault.rs     |    0
 .../tests/03_exception_restore_sanity.rb      |    0
 .../tests/03_exception_restore_sanity.rs      |    0
 .../tests/04_exception_irq_sanity.rs          |    0
 .../{ => kernel}/tests/boot_test_string.rb    |    0
 .../tests/panic_exit_success/mod.rs           |    0
 .../tests/panic_wait_forever/mod.rs           |    0
 .../{ => libraries}/test-macros/Cargo.toml    |    0
 .../{ => libraries}/test-macros/src/lib.rs    |    0
 .../{ => libraries}/test-types/Cargo.toml     |    0
 .../{ => libraries}/test-types/src/lib.rs     |    0
 .../Cargo.lock                                |    4 +-
 .../Cargo.toml                                |   63 +-
 .../Makefile                                  |   20 +-
 .../README.md                                 |  280 ++--
 .../kernel/Cargo.toml                         |   58 +
 .../{ => kernel}/build.rs                     |    0
 .../{ => kernel}/src/_arch/aarch64/cpu.rs     |    0
 .../src/_arch/aarch64/cpu/boot.rs             |    0
 .../{ => kernel}/src/_arch/aarch64/cpu/boot.s |    0
 .../{ => kernel}/src/_arch/aarch64/cpu/smp.rs |    0
 .../src/_arch/aarch64/exception.rs            |    0
 .../src/_arch/aarch64/exception.s             |    0
 .../_arch/aarch64/exception/asynchronous.rs   |    0
 .../src/_arch/aarch64/memory/mmu.rs           |    0
 .../aarch64/memory/mmu/translation_table.rs   |    0
 .../{ => kernel}/src/_arch/aarch64/time.rs    |    0
 .../{ => kernel}/src/bsp.rs                   |    0
 .../{ => kernel}/src/bsp/device_driver.rs     |    0
 .../{ => kernel}/src/bsp/device_driver/arm.rs |    0
 .../src/bsp/device_driver/arm/gicv2.rs        |    0
 .../src/bsp/device_driver/arm/gicv2/gicc.rs   |    0
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |    0
 .../{ => kernel}/src/bsp/device_driver/bcm.rs |    0
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |    0
 .../bcm/bcm2xxx_interrupt_controller.rs       |    0
 .../peripheral_ic.rs                          |    0
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |    0
 .../src/bsp/device_driver/common.rs           |    0
 .../{ => kernel}/src/bsp/raspberrypi.rs       |    0
 .../src/bsp/raspberrypi/console.rs            |    0
 .../{ => kernel}/src/bsp/raspberrypi/cpu.rs   |    0
 .../src/bsp/raspberrypi/driver.rs             |    0
 .../src/bsp/raspberrypi/exception.rs          |    0
 .../bsp/raspberrypi/exception/asynchronous.rs |    0
 .../src/bsp/raspberrypi/kernel.ld             |    0
 .../kernel_virt_addr_space_size.ld            |    0
 .../src/bsp/raspberrypi/memory.rs             |    0
 .../src/bsp/raspberrypi/memory/mmu.rs         |    0
 .../{ => kernel}/src/common.rs                |    0
 .../{ => kernel}/src/console.rs               |    0
 .../{ => kernel}/src/cpu.rs                   |    0
 .../{ => kernel}/src/cpu/boot.rs              |    0
 .../{ => kernel}/src/cpu/smp.rs               |    0
 .../{ => kernel}/src/driver.rs                |    0
 .../{ => kernel}/src/exception.rs             |    0
 .../src/exception/asynchronous.rs             |    0
 .../{ => kernel}/src/lib.rs                   |    0
 .../{ => kernel}/src/main.rs                  |    0
 .../{ => kernel}/src/memory.rs                |    0
 .../{ => kernel}/src/memory/mmu.rs            |    0
 .../{ => kernel}/src/memory/mmu/alloc.rs      |    0
 .../src/memory/mmu/mapping_record.rs          |    0
 .../src/memory/mmu/translation_table.rs       |    0
 .../{ => kernel}/src/memory/mmu/types.rs      |    0
 .../{ => kernel}/src/panic_wait.rs            |    0
 .../{ => kernel}/src/print.rs                 |    0
 .../{ => kernel}/src/state.rs                 |    0
 .../{ => kernel}/src/synchronization.rs       |    0
 .../{ => kernel}/src/time.rs                  |    0
 .../{ => kernel}/tests/00_console_sanity.rb   |    0
 .../{ => kernel}/tests/00_console_sanity.rs   |    0
 .../{ => kernel}/tests/01_timer_sanity.rs     |    0
 .../tests/02_exception_sync_page_fault.rs     |    0
 .../tests/03_exception_restore_sanity.rb      |    0
 .../tests/03_exception_restore_sanity.rs      |    0
 .../tests/04_exception_irq_sanity.rs          |    0
 .../{ => kernel}/tests/boot_test_string.rb    |    0
 .../tests/panic_exit_success/mod.rs           |    0
 .../tests/panic_wait_forever/mod.rs           |    0
 .../{ => libraries}/test-macros/Cargo.toml    |    0
 .../{ => libraries}/test-macros/src/lib.rs    |    0
 .../{ => libraries}/test-types/Cargo.toml     |    0
 .../{ => libraries}/test-types/src/lib.rs     |    0
 .../translation_table_tool/arch.rb            |    0
 .../{ => tools}/translation_table_tool/bsp.rb |    2 +-
 .../translation_table_tool/generic.rb         |    0
 .../translation_table_tool/kernel_elf.rb      |    0
 .../translation_table_tool/main.rb            |    0
 .../Cargo.lock                                |    4 +-
 .../Cargo.toml                                |   63 +-
 .../Makefile                                  |   20 +-
 .../README.md                                 |  102 +-
 .../kernel/Cargo.toml                         |   58 +
 .../{ => kernel}/build.rs                     |    0
 .../{ => kernel}/src/_arch/aarch64/cpu.rs     |    0
 .../src/_arch/aarch64/cpu/boot.rs             |    0
 .../{ => kernel}/src/_arch/aarch64/cpu/boot.s |    0
 .../{ => kernel}/src/_arch/aarch64/cpu/smp.rs |    0
 .../src/_arch/aarch64/exception.rs            |    0
 .../src/_arch/aarch64/exception.s             |    0
 .../_arch/aarch64/exception/asynchronous.rs   |    0
 .../src/_arch/aarch64/memory/mmu.rs           |    0
 .../aarch64/memory/mmu/translation_table.rs   |    0
 .../{ => kernel}/src/_arch/aarch64/time.rs    |    0
 .../{ => kernel}/src/bsp.rs                   |    0
 .../{ => kernel}/src/bsp/device_driver.rs     |    0
 .../{ => kernel}/src/bsp/device_driver/arm.rs |    0
 .../src/bsp/device_driver/arm/gicv2.rs        |    0
 .../src/bsp/device_driver/arm/gicv2/gicc.rs   |    0
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |    0
 .../{ => kernel}/src/bsp/device_driver/bcm.rs |    0
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |    0
 .../bcm/bcm2xxx_interrupt_controller.rs       |    0
 .../peripheral_ic.rs                          |    0
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |    0
 .../src/bsp/device_driver/common.rs           |    0
 .../{ => kernel}/src/bsp/raspberrypi.rs       |    0
 .../src/bsp/raspberrypi/console.rs            |    0
 .../{ => kernel}/src/bsp/raspberrypi/cpu.rs   |    0
 .../src/bsp/raspberrypi/driver.rs             |    0
 .../src/bsp/raspberrypi/exception.rs          |    0
 .../bsp/raspberrypi/exception/asynchronous.rs |    0
 .../src/bsp/raspberrypi/kernel.ld             |    0
 .../kernel_virt_addr_space_size.ld            |    0
 .../src/bsp/raspberrypi/memory.rs             |    0
 .../src/bsp/raspberrypi/memory/mmu.rs         |    0
 .../{ => kernel}/src/common.rs                |    0
 .../{ => kernel}/src/console.rs               |    0
 .../{ => kernel}/src/cpu.rs                   |    0
 .../{ => kernel}/src/cpu/boot.rs              |    0
 .../{ => kernel}/src/cpu/smp.rs               |    0
 .../{ => kernel}/src/driver.rs                |    0
 .../{ => kernel}/src/exception.rs             |    0
 .../src/exception/asynchronous.rs             |    0
 .../{ => kernel}/src/lib.rs                   |    0
 .../{ => kernel}/src/main.rs                  |    0
 .../{ => kernel}/src/memory.rs                |    0
 .../{ => kernel}/src/memory/mmu.rs            |    0
 .../{ => kernel}/src/memory/mmu/alloc.rs      |    0
 .../src/memory/mmu/mapping_record.rs          |    0
 .../src/memory/mmu/translation_table.rs       |    0
 .../{ => kernel}/src/memory/mmu/types.rs      |    0
 .../{ => kernel}/src/panic_wait.rs            |    0
 .../{ => kernel}/src/print.rs                 |    0
 .../{ => kernel}/src/state.rs                 |    0
 .../{ => kernel}/src/synchronization.rs       |    0
 .../{ => kernel}/src/time.rs                  |    0
 .../{ => kernel}/tests/00_console_sanity.rb   |    0
 .../{ => kernel}/tests/00_console_sanity.rs   |    0
 .../{ => kernel}/tests/01_timer_sanity.rs     |    0
 .../tests/02_exception_sync_page_fault.rs     |    0
 .../tests/03_exception_restore_sanity.rb      |    0
 .../tests/03_exception_restore_sanity.rs      |    0
 .../tests/04_exception_irq_sanity.rs          |    0
 .../{ => kernel}/tests/boot_test_string.rb    |    0
 .../tests/panic_exit_success/mod.rs           |    0
 .../tests/panic_wait_forever/mod.rs           |    0
 .../{ => libraries}/test-macros/Cargo.toml    |    0
 .../{ => libraries}/test-macros/src/lib.rs    |    0
 .../{ => libraries}/test-types/Cargo.toml     |    0
 .../{ => libraries}/test-types/src/lib.rs     |    0
 .../translation_table_tool/arch.rb            |    0
 .../{ => tools}/translation_table_tool/bsp.rb |    2 +-
 .../translation_table_tool/generic.rb         |    0
 .../translation_table_tool/kernel_elf.rb      |    0
 .../translation_table_tool/main.rb            |    0
 common/tests/dispatch.rb                      |    7 +-
 utils/devtool.rb                              |   10 +-
 utils/diff_tut_folders.bash                   |    3 +-
 355 files changed, 833 insertions(+), 2009 deletions(-)
 create mode 100644 12_integrated_testing/kernel/Cargo.toml
 rename 12_integrated_testing/{ => kernel}/build.rs (100%)
 rename 12_integrated_testing/{ => kernel}/src/_arch/aarch64/cpu.rs (100%)
 rename 12_integrated_testing/{ => kernel}/src/_arch/aarch64/cpu/boot.rs (100%)
 rename 12_integrated_testing/{ => kernel}/src/_arch/aarch64/cpu/boot.s (100%)
 rename 12_integrated_testing/{ => kernel}/src/_arch/aarch64/exception.rs (100%)
 rename 12_integrated_testing/{ => kernel}/src/_arch/aarch64/exception.s (100%)
 rename 12_integrated_testing/{ => kernel}/src/_arch/aarch64/exception/asynchronous.rs (100%)
 rename 12_integrated_testing/{ => kernel}/src/_arch/aarch64/memory/mmu.rs (100%)
 rename 12_integrated_testing/{ => kernel}/src/_arch/aarch64/memory/mmu/translation_table.rs (100%)
 rename 12_integrated_testing/{ => kernel}/src/_arch/aarch64/time.rs (100%)
 rename 12_integrated_testing/{ => kernel}/src/bsp.rs (100%)
 rename 12_integrated_testing/{ => kernel}/src/bsp/device_driver.rs (100%)
 rename 12_integrated_testing/{ => kernel}/src/bsp/device_driver/bcm.rs (100%)
 rename 12_integrated_testing/{ => kernel}/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs (100%)
 rename 12_integrated_testing/{ => kernel}/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs (100%)
 rename 12_integrated_testing/{ => kernel}/src/bsp/device_driver/common.rs (100%)
 rename 12_integrated_testing/{ => kernel}/src/bsp/raspberrypi.rs (100%)
 rename 12_integrated_testing/{ => kernel}/src/bsp/raspberrypi/console.rs (100%)
 rename 12_integrated_testing/{ => kernel}/src/bsp/raspberrypi/cpu.rs (100%)
 rename 12_integrated_testing/{ => kernel}/src/bsp/raspberrypi/driver.rs (100%)
 rename 12_integrated_testing/{ => kernel}/src/bsp/raspberrypi/kernel.ld (100%)
 rename 12_integrated_testing/{ => kernel}/src/bsp/raspberrypi/memory.rs (100%)
 rename 12_integrated_testing/{ => kernel}/src/bsp/raspberrypi/memory/mmu.rs (100%)
 rename 12_integrated_testing/{ => kernel}/src/console.rs (100%)
 rename 12_integrated_testing/{ => kernel}/src/cpu.rs (100%)
 rename 12_integrated_testing/{ => kernel}/src/cpu/boot.rs (100%)
 rename 12_integrated_testing/{ => kernel}/src/driver.rs (100%)
 rename 12_integrated_testing/{ => kernel}/src/exception.rs (100%)
 rename 12_integrated_testing/{ => kernel}/src/exception/asynchronous.rs (100%)
 rename 12_integrated_testing/{ => kernel}/src/lib.rs (100%)
 rename 12_integrated_testing/{ => kernel}/src/main.rs (100%)
 rename 12_integrated_testing/{ => kernel}/src/memory.rs (100%)
 rename 12_integrated_testing/{ => kernel}/src/memory/mmu.rs (100%)
 rename 12_integrated_testing/{ => kernel}/src/memory/mmu/translation_table.rs (100%)
 rename 12_integrated_testing/{ => kernel}/src/panic_wait.rs (100%)
 rename 12_integrated_testing/{ => kernel}/src/print.rs (100%)
 rename 12_integrated_testing/{ => kernel}/src/synchronization.rs (100%)
 rename 12_integrated_testing/{ => kernel}/src/time.rs (100%)
 rename 12_integrated_testing/{ => kernel}/tests/00_console_sanity.rb (100%)
 rename 12_integrated_testing/{ => kernel}/tests/00_console_sanity.rs (100%)
 rename 12_integrated_testing/{ => kernel}/tests/01_timer_sanity.rs (100%)
 rename 12_integrated_testing/{ => kernel}/tests/02_exception_sync_page_fault.rs (100%)
 rename 12_integrated_testing/{ => kernel}/tests/03_exception_restore_sanity.rb (100%)
 rename 12_integrated_testing/{ => kernel}/tests/03_exception_restore_sanity.rs (100%)
 rename 12_integrated_testing/{ => kernel}/tests/boot_test_string.rb (100%)
 rename 12_integrated_testing/{ => kernel}/tests/panic_exit_success/mod.rs (100%)
 rename 12_integrated_testing/{ => kernel}/tests/panic_wait_forever/mod.rs (100%)
 rename 12_integrated_testing/{ => libraries}/test-macros/Cargo.toml (100%)
 rename 12_integrated_testing/{ => libraries}/test-macros/src/lib.rs (100%)
 rename 12_integrated_testing/{ => libraries}/test-types/Cargo.toml (100%)
 rename 12_integrated_testing/{ => libraries}/test-types/src/lib.rs (100%)
 create mode 100644 13_exceptions_part2_peripheral_IRQs/kernel/Cargo.toml
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/build.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/_arch/aarch64/cpu.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/_arch/aarch64/cpu/boot.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/_arch/aarch64/cpu/boot.s (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/_arch/aarch64/cpu/smp.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/_arch/aarch64/exception.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/_arch/aarch64/exception.s (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/_arch/aarch64/exception/asynchronous.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/_arch/aarch64/memory/mmu.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/_arch/aarch64/memory/mmu/translation_table.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/_arch/aarch64/time.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/bsp.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/bsp/device_driver.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/bsp/device_driver/arm.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/bsp/device_driver/arm/gicv2.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/bsp/device_driver/arm/gicv2/gicc.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/bsp/device_driver/arm/gicv2/gicd.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/bsp/device_driver/bcm.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/bsp/device_driver/common.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/bsp/raspberrypi.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/bsp/raspberrypi/console.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/bsp/raspberrypi/cpu.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/bsp/raspberrypi/driver.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/bsp/raspberrypi/exception.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/bsp/raspberrypi/exception/asynchronous.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/bsp/raspberrypi/kernel.ld (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/bsp/raspberrypi/memory.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/bsp/raspberrypi/memory/mmu.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/console.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/cpu.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/cpu/boot.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/cpu/smp.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/driver.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/exception.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/exception/asynchronous.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/lib.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/main.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/memory.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/memory/mmu.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/memory/mmu/translation_table.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/panic_wait.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/print.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/state.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/synchronization.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/src/time.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/tests/00_console_sanity.rb (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/tests/00_console_sanity.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/tests/01_timer_sanity.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/tests/02_exception_sync_page_fault.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/tests/03_exception_restore_sanity.rb (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/tests/03_exception_restore_sanity.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/tests/04_exception_irq_sanity.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/tests/boot_test_string.rb (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/tests/panic_exit_success/mod.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => kernel}/tests/panic_wait_forever/mod.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => libraries}/test-macros/Cargo.toml (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => libraries}/test-macros/src/lib.rs (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => libraries}/test-types/Cargo.toml (100%)
 rename 13_exceptions_part2_peripheral_IRQs/{ => libraries}/test-types/src/lib.rs (100%)
 create mode 100644 14_virtual_mem_part2_mmio_remap/kernel/Cargo.toml
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/build.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/_arch/aarch64/cpu.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/_arch/aarch64/cpu/boot.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/_arch/aarch64/cpu/boot.s (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/_arch/aarch64/cpu/smp.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/_arch/aarch64/exception.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/_arch/aarch64/exception.s (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/_arch/aarch64/exception/asynchronous.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/_arch/aarch64/memory/mmu.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/_arch/aarch64/memory/mmu/translation_table.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/_arch/aarch64/time.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/bsp.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/bsp/device_driver.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/bsp/device_driver/arm.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/bsp/device_driver/arm/gicv2.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/bsp/device_driver/arm/gicv2/gicc.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/bsp/device_driver/arm/gicv2/gicd.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/bsp/device_driver/bcm.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/bsp/device_driver/common.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/bsp/raspberrypi.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/bsp/raspberrypi/console.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/bsp/raspberrypi/cpu.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/bsp/raspberrypi/driver.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/bsp/raspberrypi/exception.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/bsp/raspberrypi/exception/asynchronous.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/bsp/raspberrypi/kernel.ld (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/bsp/raspberrypi/memory.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/bsp/raspberrypi/memory/mmu.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/common.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/console.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/cpu.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/cpu/boot.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/cpu/smp.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/driver.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/exception.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/exception/asynchronous.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/lib.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/main.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/memory.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/memory/mmu.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/memory/mmu/alloc.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/memory/mmu/mapping_record.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/memory/mmu/translation_table.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/memory/mmu/types.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/panic_wait.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/print.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/state.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/synchronization.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/src/time.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/tests/00_console_sanity.rb (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/tests/00_console_sanity.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/tests/01_timer_sanity.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/tests/02_exception_sync_page_fault.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/tests/03_exception_restore_sanity.rb (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/tests/03_exception_restore_sanity.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/tests/04_exception_irq_sanity.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/tests/boot_test_string.rb (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/tests/panic_exit_success/mod.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => kernel}/tests/panic_wait_forever/mod.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => libraries}/test-macros/Cargo.toml (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => libraries}/test-macros/src/lib.rs (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => libraries}/test-types/Cargo.toml (100%)
 rename 14_virtual_mem_part2_mmio_remap/{ => libraries}/test-types/src/lib.rs (100%)
 create mode 100644 15_virtual_mem_part3_precomputed_tables/kernel/Cargo.toml
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/build.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/_arch/aarch64/cpu.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/_arch/aarch64/cpu/boot.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/_arch/aarch64/cpu/boot.s (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/_arch/aarch64/cpu/smp.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/_arch/aarch64/exception.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/_arch/aarch64/exception.s (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/_arch/aarch64/exception/asynchronous.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/_arch/aarch64/memory/mmu.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/_arch/aarch64/memory/mmu/translation_table.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/_arch/aarch64/time.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/bsp.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/bsp/device_driver.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/bsp/device_driver/arm.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/bsp/device_driver/arm/gicv2.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/bsp/device_driver/arm/gicv2/gicc.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/bsp/device_driver/arm/gicv2/gicd.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/bsp/device_driver/bcm.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/bsp/device_driver/common.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/bsp/raspberrypi.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/bsp/raspberrypi/console.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/bsp/raspberrypi/cpu.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/bsp/raspberrypi/driver.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/bsp/raspberrypi/exception.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/bsp/raspberrypi/exception/asynchronous.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/bsp/raspberrypi/kernel.ld (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/bsp/raspberrypi/memory.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/bsp/raspberrypi/memory/mmu.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/common.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/console.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/cpu.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/cpu/boot.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/cpu/smp.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/driver.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/exception.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/exception/asynchronous.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/lib.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/main.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/memory.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/memory/mmu.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/memory/mmu/alloc.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/memory/mmu/mapping_record.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/memory/mmu/translation_table.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/memory/mmu/types.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/panic_wait.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/print.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/state.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/synchronization.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/src/time.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/tests/00_console_sanity.rb (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/tests/00_console_sanity.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/tests/01_timer_sanity.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/tests/02_exception_sync_page_fault.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/tests/03_exception_restore_sanity.rb (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/tests/03_exception_restore_sanity.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/tests/04_exception_irq_sanity.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/tests/boot_test_string.rb (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/tests/panic_exit_success/mod.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => kernel}/tests/panic_wait_forever/mod.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => libraries}/test-macros/Cargo.toml (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => libraries}/test-macros/src/lib.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => libraries}/test-types/Cargo.toml (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => libraries}/test-types/src/lib.rs (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => tools}/translation_table_tool/arch.rb (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => tools}/translation_table_tool/bsp.rb (94%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => tools}/translation_table_tool/generic.rb (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => tools}/translation_table_tool/kernel_elf.rb (100%)
 rename 15_virtual_mem_part3_precomputed_tables/{ => tools}/translation_table_tool/main.rb (100%)
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/kernel/Cargo.toml
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/build.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/_arch/aarch64/cpu.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/_arch/aarch64/cpu/boot.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/_arch/aarch64/cpu/boot.s (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/_arch/aarch64/cpu/smp.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/_arch/aarch64/exception.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/_arch/aarch64/exception.s (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/_arch/aarch64/exception/asynchronous.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/_arch/aarch64/memory/mmu.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/_arch/aarch64/memory/mmu/translation_table.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/_arch/aarch64/time.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/bsp.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/bsp/device_driver.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/bsp/device_driver/arm.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/bsp/device_driver/arm/gicv2.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/bsp/device_driver/arm/gicv2/gicc.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/bsp/device_driver/arm/gicv2/gicd.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/bsp/device_driver/bcm.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/bsp/device_driver/common.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/bsp/raspberrypi.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/bsp/raspberrypi/console.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/bsp/raspberrypi/cpu.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/bsp/raspberrypi/driver.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/bsp/raspberrypi/exception.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/bsp/raspberrypi/exception/asynchronous.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/bsp/raspberrypi/kernel.ld (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/bsp/raspberrypi/memory.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/bsp/raspberrypi/memory/mmu.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/common.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/console.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/cpu.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/cpu/boot.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/cpu/smp.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/driver.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/exception.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/exception/asynchronous.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/lib.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/main.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/memory.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/memory/mmu.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/memory/mmu/alloc.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/memory/mmu/mapping_record.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/memory/mmu/translation_table.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/memory/mmu/types.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/panic_wait.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/print.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/state.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/synchronization.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/src/time.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/tests/00_console_sanity.rb (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/tests/00_console_sanity.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/tests/01_timer_sanity.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/tests/02_exception_sync_page_fault.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/tests/03_exception_restore_sanity.rb (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/tests/03_exception_restore_sanity.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/tests/04_exception_irq_sanity.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/tests/boot_test_string.rb (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/tests/panic_exit_success/mod.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => kernel}/tests/panic_wait_forever/mod.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => libraries}/test-macros/Cargo.toml (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => libraries}/test-macros/src/lib.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => libraries}/test-types/Cargo.toml (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => libraries}/test-types/src/lib.rs (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => tools}/translation_table_tool/arch.rb (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => tools}/translation_table_tool/bsp.rb (94%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => tools}/translation_table_tool/generic.rb (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => tools}/translation_table_tool/kernel_elf.rb (100%)
 rename 16_virtual_mem_part4_higher_half_kernel/{ => tools}/translation_table_tool/main.rb (100%)

diff --git a/12_integrated_testing/Cargo.lock b/12_integrated_testing/Cargo.lock
index 5834e9f3a..46e096295 100644
--- a/12_integrated_testing/Cargo.lock
+++ b/12_integrated_testing/Cargo.lock
@@ -39,9 +39,9 @@ checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
 
 [[package]]
 name = "quote"
-version = "1.0.17"
+version = "1.0.18"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "632d02bff7f874a36f33ea8bb416cd484b90cc66c1194b1a1110d067a7013f58"
+checksum = "a1feb54ed693b93a84e14094943b84b7c4eae204c512b7ccb95ab0c66d278ad1"
 dependencies = [
  "proc-macro2",
 ]
diff --git a/12_integrated_testing/Cargo.toml b/12_integrated_testing/Cargo.toml
index e768e6787..6480a7276 100644
--- a/12_integrated_testing/Cargo.toml
+++ b/12_integrated_testing/Cargo.toml
@@ -1,60 +1,9 @@
-[package]
-name = "mingo"
-version = "0.12.0"
-authors = ["Andre Richter <andre.o.richter@gmail.com>"]
-edition = "2021"
+[workspace]
+
+members = [
+        "libraries/*",
+        "kernel"
+]
 
 [profile.release]
 lto = true
-
-[features]
-default = []
-bsp_rpi3 = ["tock-registers"]
-bsp_rpi4 = ["tock-registers"]
-test_build = ["qemu-exit"]
-
-##--------------------------------------------------------------------------------------------------
-## Dependencies
-##--------------------------------------------------------------------------------------------------
-
-[dependencies]
-test-types = { path = "test-types" }
-
-# Optional dependencies
-tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
-qemu-exit = { version = "3.x.x", optional = true }
-
-# Platform specific dependencies
-[target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "7.x.x" }
-
-##--------------------------------------------------------------------------------------------------
-## Testing
-##--------------------------------------------------------------------------------------------------
-
-[dev-dependencies]
-test-macros = { path = "test-macros" }
-
-# Unit tests are done in the library part of the kernel.
-[lib]
-name = "libkernel"
-test = true
-
-# Disable unit tests for the kernel binary.
-[[bin]]
-name = "kernel"
-path = "src/main.rs"
-test = false
-
-# List of tests without harness.
-[[test]]
-name = "00_console_sanity"
-harness = false
-
-[[test]]
-name = "02_exception_sync_page_fault"
-harness = false
-
-[[test]]
-name = "03_exception_restore_sanity"
-harness = false
diff --git a/12_integrated_testing/Makefile b/12_integrated_testing/Makefile
index 6adb1aca6..427c93034 100644
--- a/12_integrated_testing/Makefile
+++ b/12_integrated_testing/Makefile
@@ -41,7 +41,7 @@ ifeq ($(BSP),rpi3)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
-    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/kernel/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -55,7 +55,7 @@ else ifeq ($(BSP),rpi4)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
-    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/kernel/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
@@ -67,9 +67,9 @@ export LD_SCRIPT_PATH
 ##--------------------------------------------------------------------------------------------------
 ## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
+KERNEL_MANIFEST      = kernel/Cargo.toml
 KERNEL_LINKER_SCRIPT = kernel.ld
-
-LAST_BUILD_CONFIG = target/$(BSP).build_config
+LAST_BUILD_CONFIG    = target/$(BSP).build_config
 
 KERNEL_ELF      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
@@ -94,11 +94,11 @@ COMPILER_ARGS = --target=$(TARGET) \
     $(FEATURES)                    \
     --release
 
-RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
+RUSTC_CMD   = cargo rustc $(COMPILER_ARGS) --manifest-path $(KERNEL_MANIFEST)
 DOC_CMD     = cargo doc $(COMPILER_ARGS)
 CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
 CHECK_CMD   = cargo check $(COMPILER_ARGS)
-TEST_CMD    = cargo test $(COMPILER_ARGS)
+TEST_CMD    = cargo test $(COMPILER_ARGS) --manifest-path $(KERNEL_MANIFEST)
 OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
     -O binary
@@ -203,6 +203,8 @@ chainboot: $(KERNEL_BIN)
 ##------------------------------------------------------------------------------
 clippy:
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD) --features test_build --tests \
+                --manifest-path $(KERNEL_MANIFEST)
 
 ##------------------------------------------------------------------------------
 ## Clean
@@ -299,6 +301,10 @@ test_boot: $(KERNEL_BIN)
 define KERNEL_TEST_RUNNER
     #!/usr/bin/env bash
 
+    # The cargo test runner seems to change into the crate under test's directory. Therefore, ensure
+    # this script executes from the root.
+    cd $(shell pwd)
+
     TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
     TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
 
diff --git a/12_integrated_testing/README.md b/12_integrated_testing/README.md
index 9c325e765..14dc38788 100644
--- a/12_integrated_testing/README.md
+++ b/12_integrated_testing/README.md
@@ -16,6 +16,7 @@
 - [Introduction](#introduction)
 - [Challenges](#challenges)
   * [Acknowledgements](#acknowledgements)
+- [Folder Restructuring](#folder-restructuring)
 - [Implementation](#implementation)
   * [Test Organization](#test-organization)
   * [Enabling `custom_test_frameworks` for Unit Tests](#enabling-custom_test_frameworks-for-unit-tests)
@@ -82,6 +83,24 @@ additional insights.
 
 [testing]: https://os.phil-opp.com/testing
 
+## Folder Restructuring
+
+For reasons explained later, in this tutorial, we need to add two support crates next to our main
+kernel crate. To keep everything organized in separate directories, we are switching to what `cargo`
+calls a [virtual manifest]. The kernel crate moves to `$ROOT/kernel`, and the support crates will go
+into `$ROOT/libraries/`. The `Cargo.toml` in the `$ROOT` folder desribes this layout:
+
+```toml
+[workspace]
+
+members = [
+        "libraries/*",
+        "kernel"
+]
+```
+
+[virtual manifest]: https://doc.rust-lang.org/cargo/reference/workspaces.html#virtual-manifest
+
 ## Implementation
 
 We introduce two new `Makefile` targets:
@@ -104,8 +123,8 @@ test: test_boot test_unit test_integration
 
 ### Test Organization
 
-Until now, our kernel was a so-called `binary crate`. As [explained in the official Rust book], this
-crate type disallows having `integration tests`. Quoting the book:
+Until now, our kernel crate was a so-called `binary crate`. As [explained in the official Rust
+book], this crate type disallows having `integration tests`. Quoting the book:
 
 [explained in the official Rust book]: https://doc.rust-lang.org/book/ch11-03-test-organization.html#integration-tests-for-binary-crates
 
@@ -126,10 +145,10 @@ of the kernel code. The `main.rs` file is stripped down to the minimum. It only
 `use` statements.
 
 Since it is not possible to use `kernel` as the name for both the library and the binary part of the
-crate, new entries in `Cargo.toml` are needed to differentiate the names. What's more, `cargo test`
-would try to compile and run `unit tests` for both. In our case, it will be sufficient to have all
-the unit test code in `lib.rs`, so test generation for `main.rs` can be disabled in `Cargo.toml` as
-well through the `test` flag:
+crate, new entries in `$ROOT/kernel/Cargo.toml` are needed to differentiate the names. What's more,
+`cargo test` would try to compile and run `unit tests` for both. In our case, it will be sufficient
+to have all the unit test code in `lib.rs`, so test generation for `main.rs` can be disabled in
+`Cargo.toml` as well through the `test` flag:
 
 ```toml
 [lib]
@@ -193,10 +212,10 @@ pub fn test_runner(tests: &[&test_types::UnitTest]) {
 
 The function signature shows that `test_runner` takes one argument: A slice of
 `test_types::UnitTest` references. This type definition lives in an external crate stored at
-`$ROOT/test_types`. It is external because the type is also needed for a self-made [procedural
-macro] that we'll use to write unit tests, and procedural macros _have_ to live in their own crate.
-So to avoid a circular dependency between kernel and proc-macro, this split was needed. Anyways,
-here is the type definition:
+`$ROOT/libraries/test_types`. It is external because the type is also needed for a self-made
+[procedural macro] that we'll use to write unit tests, and procedural macros _have_ to live in their
+own crate. So to avoid a circular dependency between kernel and proc-macro, this split was needed.
+Anyways, here is the type definition:
 
 [procedural macro]: https://doc.rust-lang.org/reference/procedural-macros.html
 
@@ -396,6 +415,10 @@ The file `kernel_test_runner.sh` does not exist by default. We generate it on de
 define KERNEL_TEST_RUNNER
     #!/usr/bin/env bash
 
+    # The cargo test runner seems to change into the crate under test's directory. Therefore, ensure
+    # this script executes from the root.
+    cd $(shell pwd)
+
     TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
     TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
 
@@ -417,7 +440,7 @@ endef
 test_unit:
 	$(call color_header, "Compiling unit test(s) - $(BSP)")
 	$(call test_prepare)
-	RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) --lib
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) --lib
 ```
 
 It first does the standard `objcopy` step to strip the `ELF` down to a raw binary. Just like in all
@@ -426,7 +449,7 @@ provided to it by `cargo`, and finally compiles a `docker` command to execute th
 reference, here it is fully resolved for an `RPi3 BSP`:
 
 ```bash
-docker run --rm -v /opt/rust-raspberrypi-OS-tutorials/12_integrated_testing:/work/tutorial -w /work/tutorial -v /opt/rust-raspberrypi-OS-tutorials/12_integrated_testing/../common:/work/common rustembedded/osdev-utils ruby ../common/tests/dispatch.rb qemu-system-aarch64 -M raspi3 -serial stdio -display none -semihosting -kernel $TEST_BINARY
+docker run -t --rm -v /opt/rust-raspberrypi-OS-tutorials/12_integrated_testing:/work/tutorial -w /work/tutorial -v /opt/rust-raspberrypi-OS-tutorials/12_integrated_testing/../common:/work/common rustembedded/osdev-utils:2021.12 ruby ../common/tests/dispatch.rb qemu-system-aarch64 -M raspi3 -serial stdio -display none -semihosting -kernel $TEST_BINARY
 ```
 
 This command is quite similar to the one used in the `make test_boot` target that we have since
@@ -441,17 +464,16 @@ executed successfully, which can be checked by inspecting `QEMU`'s exit code. So
 the provided qemu command it got from `ARGV`, and creates and runs an instance of `ExitCodeTest`:
 
 ```ruby
-require_relative 'boot_test'
-require_relative 'console_io_test'
-require_relative 'exit_code_test'
-
 qemu_cmd = ARGV.join(' ')
 binary = ARGV.last
 test_name = binary.gsub(%r{.*deps/}, '').split('-')[0]
 
+# Check if virtual manifest (tutorial 12 or later) or not
+path_prefix = File.exist?('kernel/Cargo.toml') ? 'kernel/' : ''
+
 case test_name
 when 'kernel8.img'
-    load 'tests/boot_test_string.rb' # provides 'EXPECTED_PRINT'
+    load "#{path_prefix}tests/boot_test_string.rb" # provides 'EXPECTED_PRINT'
     BootTest.new(qemu_cmd, EXPECTED_PRINT).run # Doesn't return
 
 when 'libkernel'
@@ -566,7 +588,7 @@ mod tests {
 ```
 
 Note that since proc macros need to live in their own crates, we need to create a new one at
-`$ROOT/test-macros` and save it there.
+`$ROOT/libraries/test-macros` and save it there.
 
 Aaaaaand that's how you write unit tests. We're finished with that part for good now :raised_hands:.
 
@@ -633,9 +655,9 @@ Note how the `test_runner` from `libkernel` is pulled in through
 
 For some tests, however, it is not needed to have the harness, because there is no need or
 possibility to partition the test into individual pieces. In this case, all the test code can live
-in `kernel_init()`, and harness generation can be turned off through `Cargo.toml`. This tutorial
-introduces two tests that don't need a harness. Here is how harness generation is turned off for
-them:
+in `kernel_init()`, and harness generation can be turned off through `$ROOT/kernel/Cargo.toml`. This
+tutorial introduces two tests that don't need a harness. Here is how harness generation is turned
+off for them:
 
 ```toml
 # List of tests without harness.
@@ -740,7 +762,7 @@ Here is an excerpt from `00_console_sanity.rb` showing a subtest that does a han
 kernel over the console:
 
 ```ruby
-require_relative '../../common/tests/console_io_test'
+require 'console_io_test'
 
 # Verify sending and receiving works as expected.
 class TxRxHandshakeTest < SubtestBase
@@ -890,1284 +912,12 @@ Compiling integration test(s) - rpi3
 ```
 
 ## Diff to previous
-```diff
-
-diff -uNr 11_exceptions_part1_groundwork/.cargo/config.toml 12_integrated_testing/.cargo/config.toml
---- 11_exceptions_part1_groundwork/.cargo/config.toml
-+++ 12_integrated_testing/.cargo/config.toml
-@@ -0,0 +1,2 @@
-+[target.'cfg(target_os = "none")']
-+runner = "target/kernel_test_runner.sh"
-
-diff -uNr 11_exceptions_part1_groundwork/Cargo.toml 12_integrated_testing/Cargo.toml
---- 11_exceptions_part1_groundwork/Cargo.toml
-+++ 12_integrated_testing/Cargo.toml
-@@ -1,6 +1,6 @@
- [package]
- name = "mingo"
--version = "0.11.0"
-+version = "0.12.0"
- authors = ["Andre Richter <andre.o.richter@gmail.com>"]
- edition = "2021"
-
-@@ -11,20 +11,50 @@
- default = []
- bsp_rpi3 = ["tock-registers"]
- bsp_rpi4 = ["tock-registers"]
--
--[[bin]]
--name = "kernel"
--path = "src/main.rs"
-+test_build = ["qemu-exit"]
-
- ##--------------------------------------------------------------------------------------------------
- ## Dependencies
- ##--------------------------------------------------------------------------------------------------
-
- [dependencies]
-+test-types = { path = "test-types" }
-
- # Optional dependencies
- tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
-+qemu-exit = { version = "3.x.x", optional = true }
-
- # Platform specific dependencies
- [target.'cfg(target_arch = "aarch64")'.dependencies]
- cortex-a = { version = "7.x.x" }
-+
-+##--------------------------------------------------------------------------------------------------
-+## Testing
-+##--------------------------------------------------------------------------------------------------
-+
-+[dev-dependencies]
-+test-macros = { path = "test-macros" }
-+
-+# Unit tests are done in the library part of the kernel.
-+[lib]
-+name = "libkernel"
-+test = true
-+
-+# Disable unit tests for the kernel binary.
-+[[bin]]
-+name = "kernel"
-+path = "src/main.rs"
-+test = false
-+
-+# List of tests without harness.
-+[[test]]
-+name = "00_console_sanity"
-+harness = false
-+
-+[[test]]
-+name = "02_exception_sync_page_fault"
-+harness = false
-+
-+[[test]]
-+name = "03_exception_restore_sanity"
-+harness = false
-
-diff -uNr 11_exceptions_part1_groundwork/Makefile 12_integrated_testing/Makefile
---- 11_exceptions_part1_groundwork/Makefile
-+++ 12_integrated_testing/Makefile
-@@ -15,6 +15,13 @@
- # Default to a serial device name that is common in Linux.
- DEV_SERIAL ?= /dev/ttyUSB0
-
-+# Optional integration test name.
-+ifdef TEST
-+    TEST_ARG = --test $(TEST)
-+else
-+    TEST_ARG = --test '*'
-+endif
-+
-
-
- ##--------------------------------------------------------------------------------------------------
-@@ -28,6 +35,7 @@
-     QEMU_BINARY       = qemu-system-aarch64
-     QEMU_MACHINE_TYPE = raspi3
-     QEMU_RELEASE_ARGS = -serial stdio -display none
-+    QEMU_TEST_ARGS    = $(QEMU_RELEASE_ARGS) -semihosting
-     OBJDUMP_BINARY    = aarch64-none-elf-objdump
-     NM_BINARY         = aarch64-none-elf-nm
-     READELF_BINARY    = aarch64-none-elf-readelf
-@@ -41,6 +49,7 @@
-     QEMU_BINARY       = qemu-system-aarch64
-     QEMU_MACHINE_TYPE =
-     QEMU_RELEASE_ARGS = -serial stdio -display none
-+    QEMU_TEST_ARGS    = $(QEMU_RELEASE_ARGS) -semihosting
-     OBJDUMP_BINARY    = aarch64-none-elf-objdump
-     NM_BINARY         = aarch64-none-elf-nm
-     READELF_BINARY    = aarch64-none-elf-readelf
-@@ -89,6 +98,7 @@
- DOC_CMD     = cargo doc $(COMPILER_ARGS)
- CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
- CHECK_CMD   = cargo check $(COMPILER_ARGS)
-+TEST_CMD    = cargo test $(COMPILER_ARGS)
- OBJCOPY_CMD = rust-objcopy \
-     --strip-all            \
-     -O binary
-@@ -265,11 +275,13 @@
- ##--------------------------------------------------------------------------------------------------
- ## Testing targets
- ##--------------------------------------------------------------------------------------------------
--.PHONY: test test_boot
-+.PHONY: test test_boot test_unit test_integration
-+
-+test_unit test_integration: FEATURES += --features test_build
-
- ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
-
--test_boot test:
-+test_boot test_unit test_integration test:
- 	$(call color_header, "$(QEMU_MISSING_STRING)")
-
- else # QEMU is supported.
-@@ -281,6 +293,43 @@
- 	$(call color_header, "Boot test - $(BSP)")
- 	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
-
--test: test_boot
-+##------------------------------------------------------------------------------
-+## Helpers for unit and integration test targets
-+##------------------------------------------------------------------------------
-+define KERNEL_TEST_RUNNER
-+    #!/usr/bin/env bash
-+
-+    TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
-+    TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
-+
-+    $(OBJCOPY_CMD) $$TEST_ELF $$TEST_BINARY
-+    $(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
-+endef
-+
-+export KERNEL_TEST_RUNNER
-+
-+define test_prepare
-+    @mkdir -p target
-+    @echo "$$KERNEL_TEST_RUNNER" > target/kernel_test_runner.sh
-+    @chmod +x target/kernel_test_runner.sh
-+endef
-+
-+##------------------------------------------------------------------------------
-+## Run unit test(s)
-+##------------------------------------------------------------------------------
-+test_unit:
-+	$(call color_header, "Compiling unit test(s) - $(BSP)")
-+	$(call test_prepare)
-+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) --lib
-+
-+##------------------------------------------------------------------------------
-+## Run integration test(s)
-+##------------------------------------------------------------------------------
-+test_integration:
-+	$(call color_header, "Compiling integration test(s) - $(BSP)")
-+	$(call test_prepare)
-+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) $(TEST_ARG)
-+
-+test: test_boot test_unit test_integration
-
- endif
-
-diff -uNr 11_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs 12_integrated_testing/src/_arch/aarch64/cpu.rs
---- 11_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs
-+++ 12_integrated_testing/src/_arch/aarch64/cpu.rs
-@@ -26,3 +26,24 @@
-         asm::wfe()
-     }
- }
-+
-+//--------------------------------------------------------------------------------------------------
-+// Testing
-+//--------------------------------------------------------------------------------------------------
-+#[cfg(feature = "test_build")]
-+use qemu_exit::QEMUExit;
-+
-+#[cfg(feature = "test_build")]
-+const QEMU_EXIT_HANDLE: qemu_exit::AArch64 = qemu_exit::AArch64::new();
-+
-+/// Make the host QEMU binary execute `exit(1)`.
-+#[cfg(feature = "test_build")]
-+pub fn qemu_exit_failure() -> ! {
-+    QEMU_EXIT_HANDLE.exit_failure()
-+}
-+
-+/// Make the host QEMU binary execute `exit(0)`.
-+#[cfg(feature = "test_build")]
-+pub fn qemu_exit_success() -> ! {
-+    QEMU_EXIT_HANDLE.exit_success()
-+}
-
-diff -uNr 11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs 12_integrated_testing/src/_arch/aarch64/exception.rs
---- 11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
-+++ 12_integrated_testing/src/_arch/aarch64/exception.rs
-@@ -87,15 +87,14 @@
-
- #[no_mangle]
- unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
--    if e.fault_address_valid() {
--        let far_el1 = FAR_EL1.get();
--
--        // This catches the demo case for this tutorial. If the fault address happens to be 8 GiB,
--        // advance the exception link register for one instruction, so that execution can continue.
--        if far_el1 == 8 * 1024 * 1024 * 1024 {
--            e.elr_el1 += 4;
--
--            return;
-+    #[cfg(feature = "test_build")]
-+    {
-+        const TEST_SVC_ID: u64 = 0x1337;
-+
-+        if let Some(ESR_EL1::EC::Value::SVC64) = e.esr_el1.exception_class() {
-+            if e.esr_el1.iss() == TEST_SVC_ID {
-+                return;
-+            }
-         }
-     }
-
-@@ -192,6 +191,12 @@
-     fn exception_class(&self) -> Option<ESR_EL1::EC::Value> {
-         self.0.read_as_enum(ESR_EL1::EC)
-     }
-+
-+    #[cfg(feature = "test_build")]
-+    #[inline(always)]
-+    fn iss(&self) -> u64 {
-+        self.0.read(ESR_EL1::ISS)
-+    }
- }
-
- /// Human readable ESR_EL1.
-
-diff -uNr 11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs 12_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs
---- 11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs
-+++ 12_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs
-@@ -290,3 +290,31 @@
-         self.lvl2.phys_start_addr_u64()
-     }
- }
-+
-+//--------------------------------------------------------------------------------------------------
-+// Testing
-+//--------------------------------------------------------------------------------------------------
-+
-+#[cfg(test)]
-+mod tests {
-+    use super::*;
-+    use test_macros::kernel_test;
-+
-+    /// Check if the size of `struct TableDescriptor` is as expected.
-+    #[kernel_test]
-+    fn size_of_tabledescriptor_equals_64_bit() {
-+        assert_eq!(
-+            core::mem::size_of::<TableDescriptor>(),
-+            core::mem::size_of::<u64>()
-+        );
-+    }
-+
-+    /// Check if the size of `struct PageDescriptor` is as expected.
-+    #[kernel_test]
-+    fn size_of_pagedescriptor_equals_64_bit() {
-+        assert_eq!(
-+            core::mem::size_of::<PageDescriptor>(),
-+            core::mem::size_of::<u64>()
-+        );
-+    }
-+}
-
-diff -uNr 11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs 12_integrated_testing/src/_arch/aarch64/memory/mmu.rs
---- 11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
-+++ 12_integrated_testing/src/_arch/aarch64/memory/mmu.rs
-@@ -163,3 +163,33 @@
-         SCTLR_EL1.matches_all(SCTLR_EL1::M::Enable)
-     }
- }
-+
-+//--------------------------------------------------------------------------------------------------
-+// Testing
-+//--------------------------------------------------------------------------------------------------
-+
-+#[cfg(test)]
-+mod tests {
-+    use super::*;
-+    use core::{cell::UnsafeCell, ops::Range};
-+    use test_macros::kernel_test;
-+
-+    /// Check if KERNEL_TABLES is in .bss.
-+    #[kernel_test]
-+    fn kernel_tables_in_bss() {
-+        extern "Rust" {
-+            static __bss_start: UnsafeCell<u64>;
-+            static __bss_end_exclusive: UnsafeCell<u64>;
-+        }
-+
-+        let bss_range = unsafe {
-+            Range {
-+                start: __bss_start.get(),
-+                end: __bss_end_exclusive.get(),
-+            }
-+        };
-+        let kernel_tables_addr = unsafe { &KERNEL_TABLES as *const _ as usize as *mut u64 };
-+
-+        assert!(bss_range.contains(&kernel_tables_addr));
-+    }
-+}
-
-diff -uNr 11_exceptions_part1_groundwork/src/bsp/raspberrypi/console.rs 12_integrated_testing/src/bsp/raspberrypi/console.rs
---- 11_exceptions_part1_groundwork/src/bsp/raspberrypi/console.rs
-+++ 12_integrated_testing/src/bsp/raspberrypi/console.rs
-@@ -35,3 +35,14 @@
- pub fn console() -> &'static impl console::interface::All {
-     &super::PL011_UART
- }
-+
-+//--------------------------------------------------------------------------------------------------
-+// Testing
-+//--------------------------------------------------------------------------------------------------
-+
-+/// Minimal code needed to bring up the console in QEMU (for testing only). This is often less steps
-+/// than on real hardware due to QEMU's abstractions.
-+///
-+/// For the RPi, nothing needs to be done.
-+#[cfg(feature = "test_build")]
-+pub fn qemu_bring_up_console() {}
-
-diff -uNr 11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs 12_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs
---- 11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
-+++ 12_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs
-@@ -69,3 +69,46 @@
- pub fn virt_mem_layout() -> &'static KernelVirtualLayout<NUM_MEM_RANGES> {
-     &LAYOUT
- }
-+
-+//--------------------------------------------------------------------------------------------------
-+// Testing
-+//--------------------------------------------------------------------------------------------------
-+
-+#[cfg(test)]
-+mod tests {
-+    use super::*;
-+    use test_macros::kernel_test;
-+
-+    /// Check alignment of the kernel's virtual memory layout sections.
-+    #[kernel_test]
-+    fn virt_mem_layout_sections_are_64KiB_aligned() {
-+        const SIXTYFOUR_KIB: usize = 65536;
-+
-+        for i in LAYOUT.inner().iter() {
-+            let start: usize = *(i.virtual_range)().start();
-+            let end: usize = *(i.virtual_range)().end() + 1;
-+
-+            assert_eq!(start modulo SIXTYFOUR_KIB, 0);
-+            assert_eq!(end modulo SIXTYFOUR_KIB, 0);
-+            assert!(end >= start);
-+        }
-+    }
-+
-+    /// Ensure the kernel's virtual memory layout is free of overlaps.
-+    #[kernel_test]
-+    fn virt_mem_layout_has_no_overlaps() {
-+        let layout = virt_mem_layout().inner();
-+
-+        for (i, first) in layout.iter().enumerate() {
-+            for second in layout.iter().skip(i + 1) {
-+                let first_range = first.virtual_range;
-+                let second_range = second.virtual_range;
-+
-+                assert!(!first_range().contains(second_range().start()));
-+                assert!(!first_range().contains(second_range().end()));
-+                assert!(!second_range().contains(first_range().start()));
-+                assert!(!second_range().contains(first_range().end()));
-+            }
-+        }
-+    }
-+}
-
-diff -uNr 11_exceptions_part1_groundwork/src/cpu.rs 12_integrated_testing/src/cpu.rs
---- 11_exceptions_part1_groundwork/src/cpu.rs
-+++ 12_integrated_testing/src/cpu.rs
-@@ -14,3 +14,6 @@
- // Architectural Public Reexports
- //--------------------------------------------------------------------------------------------------
- pub use arch_cpu::{nop, wait_forever};
-+
-+#[cfg(feature = "test_build")]
-+pub use arch_cpu::{qemu_exit_failure, qemu_exit_success};
-
-diff -uNr 11_exceptions_part1_groundwork/src/exception.rs 12_integrated_testing/src/exception.rs
---- 11_exceptions_part1_groundwork/src/exception.rs
-+++ 12_integrated_testing/src/exception.rs
-@@ -28,3 +28,21 @@
-     Hypervisor,
-     Unknown,
- }
-+
-+//--------------------------------------------------------------------------------------------------
-+// Testing
-+//--------------------------------------------------------------------------------------------------
-+
-+#[cfg(test)]
-+mod tests {
-+    use super::*;
-+    use test_macros::kernel_test;
-+
-+    /// Libkernel unit tests must execute in kernel mode.
-+    #[kernel_test]
-+    fn test_runner_executes_in_kernel_mode() {
-+        let (level, _) = current_privilege_level();
-+
-+        assert!(level == PrivilegeLevel::Kernel)
-+    }
-+}
-
-diff -uNr 11_exceptions_part1_groundwork/src/lib.rs 12_integrated_testing/src/lib.rs
---- 11_exceptions_part1_groundwork/src/lib.rs
-+++ 12_integrated_testing/src/lib.rs
-@@ -0,0 +1,183 @@
-+// SPDX-License-Identifier: MIT OR Apache-2.0
-+//
-+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
-+
-+// Rust embedded logo for `make doc`.
-+#![doc(html_logo_url = "https://git.io/JeGIp")]
-+
-+//! The `kernel` library.
-+//!
-+//! Used to compose the final kernel binary.
-+//!
-+//! # Code organization and architecture
-+//!
-+//! The code is divided into different *modules*, each representing a typical **subsystem** of the
-+//! `kernel`. Top-level module files of subsystems reside directly in the `src` folder. For example,
-+//! `src/memory.rs` contains code that is concerned with all things memory management.
-+//!
-+//! ## Visibility of processor architecture code
-+//!
-+//! Some of the `kernel`'s subsystems depend on low-level code that is specific to the target
-+//! processor architecture. For each supported processor architecture, there exists a subfolder in
-+//! `src/_arch`, for example, `src/_arch/aarch64`.
-+//!
-+//! The architecture folders mirror the subsystem modules laid out in `src`. For example,
-+//! architectural code that belongs to the `kernel`'s MMU subsystem (`src/memory/mmu.rs`) would go
-+//! into `src/_arch/aarch64/memory/mmu.rs`. The latter file is loaded as a module in
-+//! `src/memory/mmu.rs` using the `path attribute`. Usually, the chosen module name is the generic
-+//! module's name prefixed with `arch_`.
-+//!
-+//! For example, this is the top of `src/memory/mmu.rs`:
-+//!
-+//! ```
-+//! #[cfg(target_arch = "aarch64")]
-+//! #[path = "../_arch/aarch64/memory/mmu.rs"]
-+//! mod arch_mmu;
-+//! ```
-+//!
-+//! Often times, items from the `arch_ module` will be publicly reexported by the parent module.
-+//! This way, each architecture specific module can provide its implementation of an item, while the
-+//! caller must not be concerned which architecture has been conditionally compiled.
-+//!
-+//! ## BSP code
-+//!
-+//! `BSP` stands for Board Support Package. `BSP` code is organized under `src/bsp.rs` and contains
-+//! target board specific definitions and functions. These are things such as the board's memory map
-+//! or instances of drivers for devices that are featured on the respective board.
-+//!
-+//! Just like processor architecture code, the `BSP` code's module structure tries to mirror the
-+//! `kernel`'s subsystem modules, but there is no reexporting this time. That means whatever is
-+//! provided must be called starting from the `bsp` namespace, e.g. `bsp::driver::driver_manager()`.
-+//!
-+//! ## Kernel interfaces
-+//!
-+//! Both `arch` and `bsp` contain code that is conditionally compiled depending on the actual target
-+//! and board for which the kernel is compiled. For example, the `interrupt controller` hardware of
-+//! the `Raspberry Pi 3` and the `Raspberry Pi 4` is different, but we want the rest of the `kernel`
-+//! code to play nicely with any of the two without much hassle.
-+//!
-+//! In order to provide a clean abstraction between `arch`, `bsp` and `generic kernel code`,
-+//! `interface` traits are provided *whenever possible* and *where it makes sense*. They are defined
-+//! in the respective subsystem module and help to enforce the idiom of *program to an interface,
-+//! not an implementation*. For example, there will be a common IRQ handling interface which the two
-+//! different interrupt controller `drivers` of both Raspberrys will implement, and only export the
-+//! interface to the rest of the `kernel`.
-+//!
-+//! ```
-+//!         +-------------------+
-+//!         | Interface (Trait) |
-+//!         |                   |
-+//!         +--+-------------+--+
-+//!            ^             ^
-+//!            |             |
-+//!            |             |
-+//! +----------+--+       +--+----------+
-+//! | kernel code |       |  bsp code   |
-+//! |             |       |  arch code  |
-+//! +-------------+       +-------------+
-+//! ```
-+//!
-+//! # Summary
-+//!
-+//! For a logical `kernel` subsystem, corresponding code can be distributed over several physical
-+//! locations. Here is an example for the **memory** subsystem:
-+//!
-+//! - `src/memory.rs` and `src/memory/**/*`
-+//!   - Common code that is agnostic of target processor architecture and `BSP` characteristics.
-+//!     - Example: A function to zero a chunk of memory.
-+//!   - Interfaces for the memory subsystem that are implemented by `arch` or `BSP` code.
-+//!     - Example: An `MMU` interface that defines `MMU` function prototypes.
-+//! - `src/bsp/__board_name__/memory.rs` and `src/bsp/__board_name__/memory/**/*`
-+//!   - `BSP` specific code.
-+//!   - Example: The board's memory map (physical addresses of DRAM and MMIO devices).
-+//! - `src/_arch/__arch_name__/memory.rs` and `src/_arch/__arch_name__/memory/**/*`
-+//!   - Processor architecture specific code.
-+//!   - Example: Implementation of the `MMU` interface for the `__arch_name__` processor
-+//!     architecture.
-+//!
-+//! From a namespace perspective, **memory** subsystem code lives in:
-+//!
-+//! - `crate::memory::*`
-+//! - `crate::bsp::memory::*`
-+//!
-+//! # Boot flow
-+//!
-+//! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
-+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
-+//! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
-+
-+#![allow(clippy::upper_case_acronyms)]
-+#![allow(incomplete_features)]
-+#![feature(core_intrinsics)]
-+#![feature(format_args_nl)]
-+#![feature(linkage)]
-+#![feature(panic_info_message)]
-+#![feature(trait_alias)]
-+#![no_std]
-+// Testing
-+#![cfg_attr(test, no_main)]
-+#![feature(custom_test_frameworks)]
-+#![reexport_test_harness_main = "test_main"]
-+#![test_runner(crate::test_runner)]
-+
-+mod panic_wait;
-+mod synchronization;
-+
-+pub mod bsp;
-+pub mod console;
-+pub mod cpu;
-+pub mod driver;
-+pub mod exception;
-+pub mod memory;
-+pub mod print;
-+pub mod time;
-+
-+//--------------------------------------------------------------------------------------------------
-+// Public Code
-+//--------------------------------------------------------------------------------------------------
-+
-+/// Version string.
-+pub fn version() -> &'static str {
-+    concat!(
-+        env!("CARGO_PKG_NAME"),
-+        " version ",
-+        env!("CARGO_PKG_VERSION")
-+    )
-+}
-+
-+#[cfg(not(test))]
-+extern "Rust" {
-+    fn kernel_init() -> !;
-+}
-+
-+//--------------------------------------------------------------------------------------------------
-+// Testing
-+//--------------------------------------------------------------------------------------------------
-+
-+/// The default runner for unit tests.
-+pub fn test_runner(tests: &[&test_types::UnitTest]) {
-+    // This line will be printed as the test header.
-+    println!("Running {} tests", tests.len());
-+
-+    for (i, test) in tests.iter().enumerate() {
-+        print!("{:>3}. {:.<58}", i + 1, test.name);
-+
-+        // Run the actual test.
-+        (test.test_func)();
-+
-+        // Failed tests call panic!(). Execution reaches here only if the test has passed.
-+        println!("[ok]")
-+    }
-+}
-+
-+/// The `kernel_init()` for unit tests.
-+#[cfg(test)]
-+#[no_mangle]
-+unsafe fn kernel_init() -> ! {
-+    exception::handling_init();
-+    bsp::console::qemu_bring_up_console();
-+
-+    test_main();
-+
-+    cpu::qemu_exit_success()
-+}
-
-diff -uNr 11_exceptions_part1_groundwork/src/main.rs 12_integrated_testing/src/main.rs
---- 11_exceptions_part1_groundwork/src/main.rs
-+++ 12_integrated_testing/src/main.rs
-@@ -6,123 +6,12 @@
- #![doc(html_logo_url = "https://git.io/JeGIp")]
-
- //! The `kernel` binary.
--//!
--//! # Code organization and architecture
--//!
--//! The code is divided into different *modules*, each representing a typical **subsystem** of the
--//! `kernel`. Top-level module files of subsystems reside directly in the `src` folder. For example,
--//! `src/memory.rs` contains code that is concerned with all things memory management.
--//!
--//! ## Visibility of processor architecture code
--//!
--//! Some of the `kernel`'s subsystems depend on low-level code that is specific to the target
--//! processor architecture. For each supported processor architecture, there exists a subfolder in
--//! `src/_arch`, for example, `src/_arch/aarch64`.
--//!
--//! The architecture folders mirror the subsystem modules laid out in `src`. For example,
--//! architectural code that belongs to the `kernel`'s MMU subsystem (`src/memory/mmu.rs`) would go
--//! into `src/_arch/aarch64/memory/mmu.rs`. The latter file is loaded as a module in
--//! `src/memory/mmu.rs` using the `path attribute`. Usually, the chosen module name is the generic
--//! module's name prefixed with `arch_`.
--//!
--//! For example, this is the top of `src/memory/mmu.rs`:
--//!
--//! ```
--//! #[cfg(target_arch = "aarch64")]
--//! #[path = "../_arch/aarch64/memory/mmu.rs"]
--//! mod arch_mmu;
--//! ```
--//!
--//! Often times, items from the `arch_ module` will be publicly reexported by the parent module.
--//! This way, each architecture specific module can provide its implementation of an item, while the
--//! caller must not be concerned which architecture has been conditionally compiled.
--//!
--//! ## BSP code
--//!
--//! `BSP` stands for Board Support Package. `BSP` code is organized under `src/bsp.rs` and contains
--//! target board specific definitions and functions. These are things such as the board's memory map
--//! or instances of drivers for devices that are featured on the respective board.
--//!
--//! Just like processor architecture code, the `BSP` code's module structure tries to mirror the
--//! `kernel`'s subsystem modules, but there is no reexporting this time. That means whatever is
--//! provided must be called starting from the `bsp` namespace, e.g. `bsp::driver::driver_manager()`.
--//!
--//! ## Kernel interfaces
--//!
--//! Both `arch` and `bsp` contain code that is conditionally compiled depending on the actual target
--//! and board for which the kernel is compiled. For example, the `interrupt controller` hardware of
--//! the `Raspberry Pi 3` and the `Raspberry Pi 4` is different, but we want the rest of the `kernel`
--//! code to play nicely with any of the two without much hassle.
--//!
--//! In order to provide a clean abstraction between `arch`, `bsp` and `generic kernel code`,
--//! `interface` traits are provided *whenever possible* and *where it makes sense*. They are defined
--//! in the respective subsystem module and help to enforce the idiom of *program to an interface,
--//! not an implementation*. For example, there will be a common IRQ handling interface which the two
--//! different interrupt controller `drivers` of both Raspberrys will implement, and only export the
--//! interface to the rest of the `kernel`.
--//!
--//! ```
--//!         +-------------------+
--//!         | Interface (Trait) |
--//!         |                   |
--//!         +--+-------------+--+
--//!            ^             ^
--//!            |             |
--//!            |             |
--//! +----------+--+       +--+----------+
--//! | kernel code |       |  bsp code   |
--//! |             |       |  arch code  |
--//! +-------------+       +-------------+
--//! ```
--//!
--//! # Summary
--//!
--//! For a logical `kernel` subsystem, corresponding code can be distributed over several physical
--//! locations. Here is an example for the **memory** subsystem:
--//!
--//! - `src/memory.rs` and `src/memory/**/*`
--//!   - Common code that is agnostic of target processor architecture and `BSP` characteristics.
--//!     - Example: A function to zero a chunk of memory.
--//!   - Interfaces for the memory subsystem that are implemented by `arch` or `BSP` code.
--//!     - Example: An `MMU` interface that defines `MMU` function prototypes.
--//! - `src/bsp/__board_name__/memory.rs` and `src/bsp/__board_name__/memory/**/*`
--//!   - `BSP` specific code.
--//!   - Example: The board's memory map (physical addresses of DRAM and MMIO devices).
--//! - `src/_arch/__arch_name__/memory.rs` and `src/_arch/__arch_name__/memory/**/*`
--//!   - Processor architecture specific code.
--//!   - Example: Implementation of the `MMU` interface for the `__arch_name__` processor
--//!     architecture.
--//!
--//! From a namespace perspective, **memory** subsystem code lives in:
--//!
--//! - `crate::memory::*`
--//! - `crate::bsp::memory::*`
--//!
--//! # Boot flow
--//!
--//! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
--//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
--//! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
--
--#![allow(clippy::upper_case_acronyms)]
--#![allow(incomplete_features)]
--#![feature(core_intrinsics)]
-+
- #![feature(format_args_nl)]
--#![feature(panic_info_message)]
--#![feature(trait_alias)]
- #![no_main]
- #![no_std]
-
--mod bsp;
--mod console;
--mod cpu;
--mod driver;
--mod exception;
--mod memory;
--mod panic_wait;
--mod print;
--mod synchronization;
--mod time;
-+use libkernel::{bsp, console, driver, exception, info, memory, time};
-
- /// Early init code.
- ///
-@@ -133,6 +22,7 @@
- ///     - MMU + Data caching must be activated at the earliest. Without it, any atomic operations,
- ///       e.g. the yet-to-be-introduced spinlocks in the device drivers (which currently employ
- ///       NullLocks instead of spinlocks), will fail to work (properly) on the RPi SoCs.
-+#[no_mangle]
- unsafe fn kernel_init() -> ! {
-     use driver::interface::DriverManager;
-     use memory::mmu::interface::MMU;
-@@ -159,15 +49,9 @@
- fn kernel_main() -> ! {
-     use bsp::console::console;
-     use console::interface::All;
--    use core::time::Duration;
-     use driver::interface::DriverManager;
--    use time::interface::TimeManager;
-
--    info!(
--        "{} version {}",
--        env!("CARGO_PKG_NAME"),
--        env!("CARGO_PKG_VERSION")
--    );
-+    info!("{}", libkernel::version());
-     info!("Booting on: {}", bsp::board_name());
-
-     info!("MMU online. Special regions:");
-@@ -193,31 +77,6 @@
-         info!("      {}. {}", i + 1, driver.compatible());
-     }
-
--    info!("Timer test, spinning for 1 second");
--    time::time_manager().spin_for(Duration::from_secs(1));
--
--    // Cause an exception by accessing a virtual address for which no translation was set up. This
--    // code accesses the address 8 GiB, which is outside the mapped address space.
--    //
--    // For demo purposes, the exception handler will catch the faulting 8 GiB address and allow
--    // execution to continue.
--    info!("");
--    info!("Trying to read from address 8 GiB...");
--    let mut big_addr: u64 = 8 * 1024 * 1024 * 1024;
--    unsafe { core::ptr::read_volatile(big_addr as *mut u64) };
--
--    info!("************************************************");
--    info!("Whoa! We recovered from a synchronous exception!");
--    info!("************************************************");
--    info!("");
--    info!("Let's try again");
--
--    // Now use address 9 GiB. The exception handler won't forgive us this time.
--    info!("Trying to read from address 9 GiB...");
--    big_addr = 9 * 1024 * 1024 * 1024;
--    unsafe { core::ptr::read_volatile(big_addr as *mut u64) };
--
--    // Will never reach here in this tutorial.
-     info!("Echoing input now");
-
-     // Discard any spurious received characters before going into echo mode.
-
-diff -uNr 11_exceptions_part1_groundwork/src/memory/mmu.rs 12_integrated_testing/src/memory/mmu.rs
---- 11_exceptions_part1_groundwork/src/memory/mmu.rs
-+++ 12_integrated_testing/src/memory/mmu.rs
-@@ -66,7 +66,6 @@
-
- /// Architecture agnostic translation types.
- #[allow(missing_docs)]
--#[allow(dead_code)]
- #[derive(Copy, Clone)]
- pub enum Translation {
-     Identity,
-@@ -261,4 +260,9 @@
-             info!("{}", i);
-         }
-     }
-+
-+    #[cfg(test)]
-+    pub fn inner(&self) -> &[TranslationDescriptor; NUM_SPECIAL_RANGES] {
-+        &self.inner
-+    }
- }
-
-diff -uNr 11_exceptions_part1_groundwork/src/panic_wait.rs 12_integrated_testing/src/panic_wait.rs
---- 11_exceptions_part1_groundwork/src/panic_wait.rs
-+++ 12_integrated_testing/src/panic_wait.rs
-@@ -17,6 +17,23 @@
-     unsafe { bsp::console::panic_console_out().write_fmt(args).unwrap() };
- }
-
-+/// The point of exit for `libkernel`.
-+///
-+/// It is linked weakly, so that the integration tests can overload its standard behavior.
-+#[linkage = "weak"]
-+#[no_mangle]
-+fn _panic_exit() -> ! {
-+    #[cfg(not(feature = "test_build"))]
-+    {
-+        cpu::wait_forever()
-+    }
-+
-+    #[cfg(feature = "test_build")]
-+    {
-+        cpu::qemu_exit_failure()
-+    }
-+}
-+
- /// Prints with a newline - only use from the panic handler.
- ///
- /// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
-@@ -53,7 +70,7 @@
-         return;
-     }
-
--    cpu::wait_forever()
-+    _panic_exit()
- }
-
- #[panic_handler]
-@@ -81,5 +98,5 @@
-         info.message().unwrap_or(&format_args!("")),
-     );
-
--    cpu::wait_forever()
-+    _panic_exit()
- }
-
-diff -uNr 11_exceptions_part1_groundwork/test-macros/Cargo.toml 12_integrated_testing/test-macros/Cargo.toml
---- 11_exceptions_part1_groundwork/test-macros/Cargo.toml
-+++ 12_integrated_testing/test-macros/Cargo.toml
-@@ -0,0 +1,14 @@
-+[package]
-+name = "test-macros"
-+version = "0.1.0"
-+authors = ["Andre Richter <andre.o.richter@gmail.com>"]
-+edition = "2021"
-+
-+[lib]
-+proc-macro = true
-+
-+[dependencies]
-+proc-macro2 = "1.x"
-+quote = "1.x"
-+syn = { version = "1.x", features = ["full"] }
-+test-types = { path = "../test-types" }
-
-diff -uNr 11_exceptions_part1_groundwork/test-macros/src/lib.rs 12_integrated_testing/test-macros/src/lib.rs
---- 11_exceptions_part1_groundwork/test-macros/src/lib.rs
-+++ 12_integrated_testing/test-macros/src/lib.rs
-@@ -0,0 +1,29 @@
-+// SPDX-License-Identifier: MIT OR Apache-2.0
-+//
-+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
-+
-+use proc_macro::TokenStream;
-+use proc_macro2::Span;
-+use quote::quote;
-+use syn::{parse_macro_input, Ident, ItemFn};
-+
-+#[proc_macro_attribute]
-+pub fn kernel_test(_attr: TokenStream, input: TokenStream) -> TokenStream {
-+    let f = parse_macro_input!(input as ItemFn);
-+
-+    let test_name = &format!("{}", f.sig.ident);
-+    let test_ident = Ident::new(
-+        &format!("{}_TEST_CONTAINER", f.sig.ident.to_string().to_uppercase()),
-+        Span::call_site(),
-+    );
-+    let test_code_block = f.block;
-+
-+    quote!(
-+        #[test_case]
-+        const #test_ident: test_types::UnitTest = test_types::UnitTest {
-+            name: #test_name,
-+            test_func: || #test_code_block,
-+        };
-+    )
-+    .into()
-+}
-
-diff -uNr 11_exceptions_part1_groundwork/tests/00_console_sanity.rb 12_integrated_testing/tests/00_console_sanity.rb
---- 11_exceptions_part1_groundwork/tests/00_console_sanity.rb
-+++ 12_integrated_testing/tests/00_console_sanity.rb
-@@ -0,0 +1,48 @@
-+# frozen_string_literal: true
-+
-+# SPDX-License-Identifier: MIT OR Apache-2.0
-+#
-+# Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
-+
-+require 'console_io_test'
-+
-+# Verify sending and receiving works as expected.
-+class TxRxHandshakeTest < SubtestBase
-+    def name
-+        'Transmit and Receive handshake'
-+    end
-+
-+    def run(qemu_out, qemu_in)
-+        qemu_in.write_nonblock('ABC')
-+        expect_or_raise(qemu_out, 'OK1234')
-+    end
-+end
-+
-+# Check for correct TX statistics implementation. Depends on test 1 being run first.
-+class TxStatisticsTest < SubtestBase
-+    def name
-+        'Transmit statistics'
-+    end
-+
-+    def run(qemu_out, _qemu_in)
-+        expect_or_raise(qemu_out, '6')
-+    end
-+end
-+
-+# Check for correct RX statistics implementation. Depends on test 1 being run first.
-+class RxStatisticsTest < SubtestBase
-+    def name
-+        'Receive statistics'
-+    end
-+
-+    def run(qemu_out, _qemu_in)
-+        expect_or_raise(qemu_out, '3')
-+    end
-+end
-+
-+##--------------------------------------------------------------------------------------------------
-+## Test registration
-+##--------------------------------------------------------------------------------------------------
-+def subtest_collection
-+    [TxRxHandshakeTest.new, TxStatisticsTest.new, RxStatisticsTest.new]
-+end
-
-diff -uNr 11_exceptions_part1_groundwork/tests/00_console_sanity.rs 12_integrated_testing/tests/00_console_sanity.rs
---- 11_exceptions_part1_groundwork/tests/00_console_sanity.rs
-+++ 12_integrated_testing/tests/00_console_sanity.rs
-@@ -0,0 +1,38 @@
-+// SPDX-License-Identifier: MIT OR Apache-2.0
-+//
-+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
-+
-+//! Console sanity tests - RX, TX and statistics.
-+
-+#![feature(format_args_nl)]
-+#![no_main]
-+#![no_std]
-+
-+/// Console tests should time out on the I/O harness in case of panic.
-+mod panic_wait_forever;
-+
-+use libkernel::{bsp, console, cpu, exception, print};
-+
-+#[no_mangle]
-+unsafe fn kernel_init() -> ! {
-+    use bsp::console::console;
-+    use console::interface::*;
-+
-+    exception::handling_init();
-+    bsp::console::qemu_bring_up_console();
-+
-+    // Handshake
-+    assert_eq!(console().read_char(), 'A');
-+    assert_eq!(console().read_char(), 'B');
-+    assert_eq!(console().read_char(), 'C');
-+    print!("OK1234");
-+
-+    // 6
-+    print!("{}", console().chars_written());
-+
-+    // 3
-+    print!("{}", console().chars_read());
-+
-+    // The QEMU process running this test will be closed by the I/O test harness.
-+    cpu::wait_forever();
-+}
-
-diff -uNr 11_exceptions_part1_groundwork/tests/01_timer_sanity.rs 12_integrated_testing/tests/01_timer_sanity.rs
---- 11_exceptions_part1_groundwork/tests/01_timer_sanity.rs
-+++ 12_integrated_testing/tests/01_timer_sanity.rs
-@@ -0,0 +1,49 @@
-+// SPDX-License-Identifier: MIT OR Apache-2.0
-+//
-+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
-+
-+//! Timer sanity tests.
-+
-+#![feature(custom_test_frameworks)]
-+#![no_main]
-+#![no_std]
-+#![reexport_test_harness_main = "test_main"]
-+#![test_runner(libkernel::test_runner)]
-+
-+use core::time::Duration;
-+use libkernel::{bsp, cpu, exception, time, time::interface::TimeManager};
-+use test_macros::kernel_test;
-+
-+#[no_mangle]
-+unsafe fn kernel_init() -> ! {
-+    exception::handling_init();
-+    bsp::console::qemu_bring_up_console();
-+
-+    // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
-+
-+    test_main();
-+
-+    cpu::qemu_exit_success()
-+}
-+
-+/// Simple check that the timer is running.
-+#[kernel_test]
-+fn timer_is_counting() {
-+    assert!(time::time_manager().uptime().as_nanos() > 0)
-+}
-+
-+/// Timer resolution must be sufficient.
-+#[kernel_test]
-+fn timer_resolution_is_sufficient() {
-+    assert!(time::time_manager().resolution().as_nanos() < 100)
-+}
-+
-+/// Sanity check spin_for() implementation.
-+#[kernel_test]
-+fn spin_accuracy_check_1_second() {
-+    let t1 = time::time_manager().uptime();
-+    time::time_manager().spin_for(Duration::from_secs(1));
-+    let t2 = time::time_manager().uptime();
-+
-+    assert_eq!((t2 - t1).as_secs(), 1)
-+}
-
-diff -uNr 11_exceptions_part1_groundwork/tests/02_exception_sync_page_fault.rs 12_integrated_testing/tests/02_exception_sync_page_fault.rs
---- 11_exceptions_part1_groundwork/tests/02_exception_sync_page_fault.rs
-+++ 12_integrated_testing/tests/02_exception_sync_page_fault.rs
-@@ -0,0 +1,43 @@
-+// SPDX-License-Identifier: MIT OR Apache-2.0
-+//
-+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
-+
-+//! Page faults must result in synchronous exceptions.
-+
-+#![feature(format_args_nl)]
-+#![no_main]
-+#![no_std]
-+
-+/// Overwrites libkernel's `panic_wait::_panic_exit()` so that it returns a "success" code.
-+///
-+/// In this test, reaching the panic is a success, because it is called from the synchronous
-+/// exception handler, which is what this test wants to achieve.
-+///
-+/// It also means that this integration test can not use any other code that calls panic!() directly
-+/// or indirectly.
-+mod panic_exit_success;
-+
-+use libkernel::{bsp, cpu, exception, info, memory, println};
-+
-+#[no_mangle]
-+unsafe fn kernel_init() -> ! {
-+    use memory::mmu::interface::MMU;
-+
-+    exception::handling_init();
-+    bsp::console::qemu_bring_up_console();
-+
-+    // This line will be printed as the test header.
-+    println!("Testing synchronous exception handling by causing a page fault");
-+
-+    if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
-+        info!("MMU: {}", string);
-+        cpu::qemu_exit_failure()
-+    }
-+
-+    info!("Writing beyond mapped area to address 9 GiB...");
-+    let big_addr: u64 = 9 * 1024 * 1024 * 1024;
-+    core::ptr::read_volatile(big_addr as *mut u64);
-+
-+    // If execution reaches here, the memory access above did not cause a page fault exception.
-+    cpu::qemu_exit_failure()
-+}
-
-diff -uNr 11_exceptions_part1_groundwork/tests/03_exception_restore_sanity.rb 12_integrated_testing/tests/03_exception_restore_sanity.rb
---- 11_exceptions_part1_groundwork/tests/03_exception_restore_sanity.rb
-+++ 12_integrated_testing/tests/03_exception_restore_sanity.rb
-@@ -0,0 +1,25 @@
-+# frozen_string_literal: true
-+
-+# SPDX-License-Identifier: MIT OR Apache-2.0
-+#
-+# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
-+
-+require 'console_io_test'
-+
-+# Verify that exception restore works.
-+class ExceptionRestoreTest < SubtestBase
-+    def name
-+        'Exception restore'
-+    end
-+
-+    def run(qemu_out, _qemu_in)
-+        expect_or_raise(qemu_out, 'Back from system call!')
-+    end
-+end
-+
-+##--------------------------------------------------------------------------------------------------
-+## Test registration
-+##--------------------------------------------------------------------------------------------------
-+def subtest_collection
-+    [ExceptionRestoreTest.new]
-+end
-
-diff -uNr 11_exceptions_part1_groundwork/tests/03_exception_restore_sanity.rs 12_integrated_testing/tests/03_exception_restore_sanity.rs
---- 11_exceptions_part1_groundwork/tests/03_exception_restore_sanity.rs
-+++ 12_integrated_testing/tests/03_exception_restore_sanity.rs
-@@ -0,0 +1,55 @@
-+// SPDX-License-Identifier: MIT OR Apache-2.0
-+//
-+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
-+
-+//! A simple sanity test to see if exception restore code works.
-+
-+#![feature(format_args_nl)]
-+#![no_main]
-+#![no_std]
-+
-+/// Console tests should time out on the I/O harness in case of panic.
-+mod panic_wait_forever;
-+
-+use core::arch::asm;
-+use libkernel::{bsp, cpu, exception, info, memory, println};
-+
-+#[inline(never)]
-+fn nested_system_call() {
-+    #[cfg(target_arch = "aarch64")]
-+    unsafe {
-+        asm!("svc #0x1337", options(nomem, nostack, preserves_flags));
-+    }
-+
-+    #[cfg(not(target_arch = "aarch64"))]
-+    {
-+        info!("Not supported yet");
-+        cpu::wait_forever();
-+    }
-+}
-+
-+#[no_mangle]
-+unsafe fn kernel_init() -> ! {
-+    use memory::mmu::interface::MMU;
-+
-+    exception::handling_init();
-+    bsp::console::qemu_bring_up_console();
-+
-+    // This line will be printed as the test header.
-+    println!("Testing exception restore");
-+
-+    if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
-+        info!("MMU: {}", string);
-+        cpu::qemu_exit_failure()
-+    }
-+
-+    info!("Making a dummy system call");
-+
-+    // Calling this inside a function indirectly tests if the link register is restored properly.
-+    nested_system_call();
-+
-+    info!("Back from system call!");
-+
-+    // The QEMU process running this test will be closed by the I/O test harness.
-+    cpu::wait_forever();
-+}
-
-diff -uNr 11_exceptions_part1_groundwork/tests/boot_test_string.rb 12_integrated_testing/tests/boot_test_string.rb
---- 11_exceptions_part1_groundwork/tests/boot_test_string.rb
-+++ 12_integrated_testing/tests/boot_test_string.rb
-@@ -1,3 +1,3 @@
- # frozen_string_literal: true
-
--EXPECTED_PRINT = 'lr : 0x'
-+EXPECTED_PRINT = 'Echoing input now'
-
-diff -uNr 11_exceptions_part1_groundwork/tests/panic_exit_success/mod.rs 12_integrated_testing/tests/panic_exit_success/mod.rs
---- 11_exceptions_part1_groundwork/tests/panic_exit_success/mod.rs
-+++ 12_integrated_testing/tests/panic_exit_success/mod.rs
-@@ -0,0 +1,9 @@
-+// SPDX-License-Identifier: MIT OR Apache-2.0
-+//
-+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
-+
-+/// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
-+#[no_mangle]
-+fn _panic_exit() -> ! {
-+    libkernel::cpu::qemu_exit_success()
-+}
-
-diff -uNr 11_exceptions_part1_groundwork/tests/panic_wait_forever/mod.rs 12_integrated_testing/tests/panic_wait_forever/mod.rs
---- 11_exceptions_part1_groundwork/tests/panic_wait_forever/mod.rs
-+++ 12_integrated_testing/tests/panic_wait_forever/mod.rs
-@@ -0,0 +1,9 @@
-+// SPDX-License-Identifier: MIT OR Apache-2.0
-+//
-+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
-+
-+/// Overwrites libkernel's `panic_wait::_panic_exit()` with wait_forever.
-+#[no_mangle]
-+fn _panic_exit() -> ! {
-+    libkernel::cpu::wait_forever()
-+}
-
-diff -uNr 11_exceptions_part1_groundwork/test-types/Cargo.toml 12_integrated_testing/test-types/Cargo.toml
---- 11_exceptions_part1_groundwork/test-types/Cargo.toml
-+++ 12_integrated_testing/test-types/Cargo.toml
-@@ -0,0 +1,5 @@
-+[package]
-+name = "test-types"
-+version = "0.1.0"
-+authors = ["Andre Richter <andre.o.richter@gmail.com>"]
-+edition = "2021"
-
-diff -uNr 11_exceptions_part1_groundwork/test-types/src/lib.rs 12_integrated_testing/test-types/src/lib.rs
---- 11_exceptions_part1_groundwork/test-types/src/lib.rs
-+++ 12_integrated_testing/test-types/src/lib.rs
-@@ -0,0 +1,16 @@
-+// SPDX-License-Identifier: MIT OR Apache-2.0
-+//
-+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
-+
-+//! Types for the `custom_test_frameworks` implementation.
-+
-+#![no_std]
-+
-+/// Unit test container.
-+pub struct UnitTest {
-+    /// Name of the test.
-+    pub name: &'static str,
-+
-+    /// Function pointer to the test.
-+    pub test_func: fn(),
-+}
 
+The diff in this tutorial is skipped, because due to the changes in top-level folder structure, it
+becomes unreadable. This might be fixed in the future. For now, consider using a diff tool like
+`meld` to diff between the previous and the `kernel` folder of this tutorial to see the lion's share
+of changes:
+
+```console
+meld 11_exceptions_part1_groundwork 12_integrated_testing/kernel
 ```
diff --git a/12_integrated_testing/kernel/Cargo.toml b/12_integrated_testing/kernel/Cargo.toml
new file mode 100644
index 000000000..be478e855
--- /dev/null
+++ b/12_integrated_testing/kernel/Cargo.toml
@@ -0,0 +1,58 @@
+[package]
+name = "mingo"
+version = "0.12.0"
+authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+edition = "2021"
+
+
+[features]
+default = []
+bsp_rpi3 = ["tock-registers"]
+bsp_rpi4 = ["tock-registers"]
+test_build = ["qemu-exit"]
+
+##--------------------------------------------------------------------------------------------------
+## Dependencies
+##--------------------------------------------------------------------------------------------------
+
+[dependencies]
+test-types = { path = "../libraries/test-types" }
+
+# Optional dependencies
+tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
+qemu-exit = { version = "3.x.x", optional = true }
+
+# Platform specific dependencies
+[target.'cfg(target_arch = "aarch64")'.dependencies]
+cortex-a = { version = "7.x.x" }
+
+##--------------------------------------------------------------------------------------------------
+## Testing
+##--------------------------------------------------------------------------------------------------
+
+[dev-dependencies]
+test-macros = { path = "../libraries/test-macros" }
+
+# Unit tests are done in the library part of the kernel.
+[lib]
+name = "libkernel"
+test = true
+
+# Disable unit tests for the kernel binary.
+[[bin]]
+name = "kernel"
+path = "src/main.rs"
+test = false
+
+# List of tests without harness.
+[[test]]
+name = "00_console_sanity"
+harness = false
+
+[[test]]
+name = "02_exception_sync_page_fault"
+harness = false
+
+[[test]]
+name = "03_exception_restore_sanity"
+harness = false
diff --git a/12_integrated_testing/build.rs b/12_integrated_testing/kernel/build.rs
similarity index 100%
rename from 12_integrated_testing/build.rs
rename to 12_integrated_testing/kernel/build.rs
diff --git a/12_integrated_testing/src/_arch/aarch64/cpu.rs b/12_integrated_testing/kernel/src/_arch/aarch64/cpu.rs
similarity index 100%
rename from 12_integrated_testing/src/_arch/aarch64/cpu.rs
rename to 12_integrated_testing/kernel/src/_arch/aarch64/cpu.rs
diff --git a/12_integrated_testing/src/_arch/aarch64/cpu/boot.rs b/12_integrated_testing/kernel/src/_arch/aarch64/cpu/boot.rs
similarity index 100%
rename from 12_integrated_testing/src/_arch/aarch64/cpu/boot.rs
rename to 12_integrated_testing/kernel/src/_arch/aarch64/cpu/boot.rs
diff --git a/12_integrated_testing/src/_arch/aarch64/cpu/boot.s b/12_integrated_testing/kernel/src/_arch/aarch64/cpu/boot.s
similarity index 100%
rename from 12_integrated_testing/src/_arch/aarch64/cpu/boot.s
rename to 12_integrated_testing/kernel/src/_arch/aarch64/cpu/boot.s
diff --git a/12_integrated_testing/src/_arch/aarch64/exception.rs b/12_integrated_testing/kernel/src/_arch/aarch64/exception.rs
similarity index 100%
rename from 12_integrated_testing/src/_arch/aarch64/exception.rs
rename to 12_integrated_testing/kernel/src/_arch/aarch64/exception.rs
diff --git a/12_integrated_testing/src/_arch/aarch64/exception.s b/12_integrated_testing/kernel/src/_arch/aarch64/exception.s
similarity index 100%
rename from 12_integrated_testing/src/_arch/aarch64/exception.s
rename to 12_integrated_testing/kernel/src/_arch/aarch64/exception.s
diff --git a/12_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs b/12_integrated_testing/kernel/src/_arch/aarch64/exception/asynchronous.rs
similarity index 100%
rename from 12_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs
rename to 12_integrated_testing/kernel/src/_arch/aarch64/exception/asynchronous.rs
diff --git a/12_integrated_testing/src/_arch/aarch64/memory/mmu.rs b/12_integrated_testing/kernel/src/_arch/aarch64/memory/mmu.rs
similarity index 100%
rename from 12_integrated_testing/src/_arch/aarch64/memory/mmu.rs
rename to 12_integrated_testing/kernel/src/_arch/aarch64/memory/mmu.rs
diff --git a/12_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs b/12_integrated_testing/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
similarity index 100%
rename from 12_integrated_testing/src/_arch/aarch64/memory/mmu/translation_table.rs
rename to 12_integrated_testing/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
diff --git a/12_integrated_testing/src/_arch/aarch64/time.rs b/12_integrated_testing/kernel/src/_arch/aarch64/time.rs
similarity index 100%
rename from 12_integrated_testing/src/_arch/aarch64/time.rs
rename to 12_integrated_testing/kernel/src/_arch/aarch64/time.rs
diff --git a/12_integrated_testing/src/bsp.rs b/12_integrated_testing/kernel/src/bsp.rs
similarity index 100%
rename from 12_integrated_testing/src/bsp.rs
rename to 12_integrated_testing/kernel/src/bsp.rs
diff --git a/12_integrated_testing/src/bsp/device_driver.rs b/12_integrated_testing/kernel/src/bsp/device_driver.rs
similarity index 100%
rename from 12_integrated_testing/src/bsp/device_driver.rs
rename to 12_integrated_testing/kernel/src/bsp/device_driver.rs
diff --git a/12_integrated_testing/src/bsp/device_driver/bcm.rs b/12_integrated_testing/kernel/src/bsp/device_driver/bcm.rs
similarity index 100%
rename from 12_integrated_testing/src/bsp/device_driver/bcm.rs
rename to 12_integrated_testing/kernel/src/bsp/device_driver/bcm.rs
diff --git a/12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
similarity index 100%
rename from 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
rename to 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
diff --git a/12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
similarity index 100%
rename from 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
rename to 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
diff --git a/12_integrated_testing/src/bsp/device_driver/common.rs b/12_integrated_testing/kernel/src/bsp/device_driver/common.rs
similarity index 100%
rename from 12_integrated_testing/src/bsp/device_driver/common.rs
rename to 12_integrated_testing/kernel/src/bsp/device_driver/common.rs
diff --git a/12_integrated_testing/src/bsp/raspberrypi.rs b/12_integrated_testing/kernel/src/bsp/raspberrypi.rs
similarity index 100%
rename from 12_integrated_testing/src/bsp/raspberrypi.rs
rename to 12_integrated_testing/kernel/src/bsp/raspberrypi.rs
diff --git a/12_integrated_testing/src/bsp/raspberrypi/console.rs b/12_integrated_testing/kernel/src/bsp/raspberrypi/console.rs
similarity index 100%
rename from 12_integrated_testing/src/bsp/raspberrypi/console.rs
rename to 12_integrated_testing/kernel/src/bsp/raspberrypi/console.rs
diff --git a/12_integrated_testing/src/bsp/raspberrypi/cpu.rs b/12_integrated_testing/kernel/src/bsp/raspberrypi/cpu.rs
similarity index 100%
rename from 12_integrated_testing/src/bsp/raspberrypi/cpu.rs
rename to 12_integrated_testing/kernel/src/bsp/raspberrypi/cpu.rs
diff --git a/12_integrated_testing/src/bsp/raspberrypi/driver.rs b/12_integrated_testing/kernel/src/bsp/raspberrypi/driver.rs
similarity index 100%
rename from 12_integrated_testing/src/bsp/raspberrypi/driver.rs
rename to 12_integrated_testing/kernel/src/bsp/raspberrypi/driver.rs
diff --git a/12_integrated_testing/src/bsp/raspberrypi/kernel.ld b/12_integrated_testing/kernel/src/bsp/raspberrypi/kernel.ld
similarity index 100%
rename from 12_integrated_testing/src/bsp/raspberrypi/kernel.ld
rename to 12_integrated_testing/kernel/src/bsp/raspberrypi/kernel.ld
diff --git a/12_integrated_testing/src/bsp/raspberrypi/memory.rs b/12_integrated_testing/kernel/src/bsp/raspberrypi/memory.rs
similarity index 100%
rename from 12_integrated_testing/src/bsp/raspberrypi/memory.rs
rename to 12_integrated_testing/kernel/src/bsp/raspberrypi/memory.rs
diff --git a/12_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs b/12_integrated_testing/kernel/src/bsp/raspberrypi/memory/mmu.rs
similarity index 100%
rename from 12_integrated_testing/src/bsp/raspberrypi/memory/mmu.rs
rename to 12_integrated_testing/kernel/src/bsp/raspberrypi/memory/mmu.rs
diff --git a/12_integrated_testing/src/console.rs b/12_integrated_testing/kernel/src/console.rs
similarity index 100%
rename from 12_integrated_testing/src/console.rs
rename to 12_integrated_testing/kernel/src/console.rs
diff --git a/12_integrated_testing/src/cpu.rs b/12_integrated_testing/kernel/src/cpu.rs
similarity index 100%
rename from 12_integrated_testing/src/cpu.rs
rename to 12_integrated_testing/kernel/src/cpu.rs
diff --git a/12_integrated_testing/src/cpu/boot.rs b/12_integrated_testing/kernel/src/cpu/boot.rs
similarity index 100%
rename from 12_integrated_testing/src/cpu/boot.rs
rename to 12_integrated_testing/kernel/src/cpu/boot.rs
diff --git a/12_integrated_testing/src/driver.rs b/12_integrated_testing/kernel/src/driver.rs
similarity index 100%
rename from 12_integrated_testing/src/driver.rs
rename to 12_integrated_testing/kernel/src/driver.rs
diff --git a/12_integrated_testing/src/exception.rs b/12_integrated_testing/kernel/src/exception.rs
similarity index 100%
rename from 12_integrated_testing/src/exception.rs
rename to 12_integrated_testing/kernel/src/exception.rs
diff --git a/12_integrated_testing/src/exception/asynchronous.rs b/12_integrated_testing/kernel/src/exception/asynchronous.rs
similarity index 100%
rename from 12_integrated_testing/src/exception/asynchronous.rs
rename to 12_integrated_testing/kernel/src/exception/asynchronous.rs
diff --git a/12_integrated_testing/src/lib.rs b/12_integrated_testing/kernel/src/lib.rs
similarity index 100%
rename from 12_integrated_testing/src/lib.rs
rename to 12_integrated_testing/kernel/src/lib.rs
diff --git a/12_integrated_testing/src/main.rs b/12_integrated_testing/kernel/src/main.rs
similarity index 100%
rename from 12_integrated_testing/src/main.rs
rename to 12_integrated_testing/kernel/src/main.rs
diff --git a/12_integrated_testing/src/memory.rs b/12_integrated_testing/kernel/src/memory.rs
similarity index 100%
rename from 12_integrated_testing/src/memory.rs
rename to 12_integrated_testing/kernel/src/memory.rs
diff --git a/12_integrated_testing/src/memory/mmu.rs b/12_integrated_testing/kernel/src/memory/mmu.rs
similarity index 100%
rename from 12_integrated_testing/src/memory/mmu.rs
rename to 12_integrated_testing/kernel/src/memory/mmu.rs
diff --git a/12_integrated_testing/src/memory/mmu/translation_table.rs b/12_integrated_testing/kernel/src/memory/mmu/translation_table.rs
similarity index 100%
rename from 12_integrated_testing/src/memory/mmu/translation_table.rs
rename to 12_integrated_testing/kernel/src/memory/mmu/translation_table.rs
diff --git a/12_integrated_testing/src/panic_wait.rs b/12_integrated_testing/kernel/src/panic_wait.rs
similarity index 100%
rename from 12_integrated_testing/src/panic_wait.rs
rename to 12_integrated_testing/kernel/src/panic_wait.rs
diff --git a/12_integrated_testing/src/print.rs b/12_integrated_testing/kernel/src/print.rs
similarity index 100%
rename from 12_integrated_testing/src/print.rs
rename to 12_integrated_testing/kernel/src/print.rs
diff --git a/12_integrated_testing/src/synchronization.rs b/12_integrated_testing/kernel/src/synchronization.rs
similarity index 100%
rename from 12_integrated_testing/src/synchronization.rs
rename to 12_integrated_testing/kernel/src/synchronization.rs
diff --git a/12_integrated_testing/src/time.rs b/12_integrated_testing/kernel/src/time.rs
similarity index 100%
rename from 12_integrated_testing/src/time.rs
rename to 12_integrated_testing/kernel/src/time.rs
diff --git a/12_integrated_testing/tests/00_console_sanity.rb b/12_integrated_testing/kernel/tests/00_console_sanity.rb
similarity index 100%
rename from 12_integrated_testing/tests/00_console_sanity.rb
rename to 12_integrated_testing/kernel/tests/00_console_sanity.rb
diff --git a/12_integrated_testing/tests/00_console_sanity.rs b/12_integrated_testing/kernel/tests/00_console_sanity.rs
similarity index 100%
rename from 12_integrated_testing/tests/00_console_sanity.rs
rename to 12_integrated_testing/kernel/tests/00_console_sanity.rs
diff --git a/12_integrated_testing/tests/01_timer_sanity.rs b/12_integrated_testing/kernel/tests/01_timer_sanity.rs
similarity index 100%
rename from 12_integrated_testing/tests/01_timer_sanity.rs
rename to 12_integrated_testing/kernel/tests/01_timer_sanity.rs
diff --git a/12_integrated_testing/tests/02_exception_sync_page_fault.rs b/12_integrated_testing/kernel/tests/02_exception_sync_page_fault.rs
similarity index 100%
rename from 12_integrated_testing/tests/02_exception_sync_page_fault.rs
rename to 12_integrated_testing/kernel/tests/02_exception_sync_page_fault.rs
diff --git a/12_integrated_testing/tests/03_exception_restore_sanity.rb b/12_integrated_testing/kernel/tests/03_exception_restore_sanity.rb
similarity index 100%
rename from 12_integrated_testing/tests/03_exception_restore_sanity.rb
rename to 12_integrated_testing/kernel/tests/03_exception_restore_sanity.rb
diff --git a/12_integrated_testing/tests/03_exception_restore_sanity.rs b/12_integrated_testing/kernel/tests/03_exception_restore_sanity.rs
similarity index 100%
rename from 12_integrated_testing/tests/03_exception_restore_sanity.rs
rename to 12_integrated_testing/kernel/tests/03_exception_restore_sanity.rs
diff --git a/12_integrated_testing/tests/boot_test_string.rb b/12_integrated_testing/kernel/tests/boot_test_string.rb
similarity index 100%
rename from 12_integrated_testing/tests/boot_test_string.rb
rename to 12_integrated_testing/kernel/tests/boot_test_string.rb
diff --git a/12_integrated_testing/tests/panic_exit_success/mod.rs b/12_integrated_testing/kernel/tests/panic_exit_success/mod.rs
similarity index 100%
rename from 12_integrated_testing/tests/panic_exit_success/mod.rs
rename to 12_integrated_testing/kernel/tests/panic_exit_success/mod.rs
diff --git a/12_integrated_testing/tests/panic_wait_forever/mod.rs b/12_integrated_testing/kernel/tests/panic_wait_forever/mod.rs
similarity index 100%
rename from 12_integrated_testing/tests/panic_wait_forever/mod.rs
rename to 12_integrated_testing/kernel/tests/panic_wait_forever/mod.rs
diff --git a/12_integrated_testing/test-macros/Cargo.toml b/12_integrated_testing/libraries/test-macros/Cargo.toml
similarity index 100%
rename from 12_integrated_testing/test-macros/Cargo.toml
rename to 12_integrated_testing/libraries/test-macros/Cargo.toml
diff --git a/12_integrated_testing/test-macros/src/lib.rs b/12_integrated_testing/libraries/test-macros/src/lib.rs
similarity index 100%
rename from 12_integrated_testing/test-macros/src/lib.rs
rename to 12_integrated_testing/libraries/test-macros/src/lib.rs
diff --git a/12_integrated_testing/test-types/Cargo.toml b/12_integrated_testing/libraries/test-types/Cargo.toml
similarity index 100%
rename from 12_integrated_testing/test-types/Cargo.toml
rename to 12_integrated_testing/libraries/test-types/Cargo.toml
diff --git a/12_integrated_testing/test-types/src/lib.rs b/12_integrated_testing/libraries/test-types/src/lib.rs
similarity index 100%
rename from 12_integrated_testing/test-types/src/lib.rs
rename to 12_integrated_testing/libraries/test-types/src/lib.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/Cargo.lock b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
index 8fde49eff..51d3ab82d 100644
--- a/13_exceptions_part2_peripheral_IRQs/Cargo.lock
+++ b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
@@ -39,9 +39,9 @@ checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
 
 [[package]]
 name = "quote"
-version = "1.0.17"
+version = "1.0.18"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "632d02bff7f874a36f33ea8bb416cd484b90cc66c1194b1a1110d067a7013f58"
+checksum = "a1feb54ed693b93a84e14094943b84b7c4eae204c512b7ccb95ab0c66d278ad1"
 dependencies = [
  "proc-macro2",
 ]
diff --git a/13_exceptions_part2_peripheral_IRQs/Cargo.toml b/13_exceptions_part2_peripheral_IRQs/Cargo.toml
index 7ef558318..6480a7276 100644
--- a/13_exceptions_part2_peripheral_IRQs/Cargo.toml
+++ b/13_exceptions_part2_peripheral_IRQs/Cargo.toml
@@ -1,60 +1,9 @@
-[package]
-name = "mingo"
-version = "0.13.0"
-authors = ["Andre Richter <andre.o.richter@gmail.com>"]
-edition = "2021"
+[workspace]
+
+members = [
+        "libraries/*",
+        "kernel"
+]
 
 [profile.release]
 lto = true
-
-[features]
-default = []
-bsp_rpi3 = ["tock-registers"]
-bsp_rpi4 = ["tock-registers"]
-test_build = ["qemu-exit"]
-
-##--------------------------------------------------------------------------------------------------
-## Dependencies
-##--------------------------------------------------------------------------------------------------
-
-[dependencies]
-test-types = { path = "test-types" }
-
-# Optional dependencies
-tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
-qemu-exit = { version = "3.x.x", optional = true }
-
-# Platform specific dependencies
-[target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "7.x.x" }
-
-##--------------------------------------------------------------------------------------------------
-## Testing
-##--------------------------------------------------------------------------------------------------
-
-[dev-dependencies]
-test-macros = { path = "test-macros" }
-
-# Unit tests are done in the library part of the kernel.
-[lib]
-name = "libkernel"
-test = true
-
-# Disable unit tests for the kernel binary.
-[[bin]]
-name = "kernel"
-path = "src/main.rs"
-test = false
-
-# List of tests without harness.
-[[test]]
-name = "00_console_sanity"
-harness = false
-
-[[test]]
-name = "02_exception_sync_page_fault"
-harness = false
-
-[[test]]
-name = "03_exception_restore_sanity"
-harness = false
diff --git a/13_exceptions_part2_peripheral_IRQs/Makefile b/13_exceptions_part2_peripheral_IRQs/Makefile
index 6adb1aca6..427c93034 100644
--- a/13_exceptions_part2_peripheral_IRQs/Makefile
+++ b/13_exceptions_part2_peripheral_IRQs/Makefile
@@ -41,7 +41,7 @@ ifeq ($(BSP),rpi3)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
-    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/kernel/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -55,7 +55,7 @@ else ifeq ($(BSP),rpi4)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
-    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/kernel/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
@@ -67,9 +67,9 @@ export LD_SCRIPT_PATH
 ##--------------------------------------------------------------------------------------------------
 ## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
+KERNEL_MANIFEST      = kernel/Cargo.toml
 KERNEL_LINKER_SCRIPT = kernel.ld
-
-LAST_BUILD_CONFIG = target/$(BSP).build_config
+LAST_BUILD_CONFIG    = target/$(BSP).build_config
 
 KERNEL_ELF      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
@@ -94,11 +94,11 @@ COMPILER_ARGS = --target=$(TARGET) \
     $(FEATURES)                    \
     --release
 
-RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
+RUSTC_CMD   = cargo rustc $(COMPILER_ARGS) --manifest-path $(KERNEL_MANIFEST)
 DOC_CMD     = cargo doc $(COMPILER_ARGS)
 CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
 CHECK_CMD   = cargo check $(COMPILER_ARGS)
-TEST_CMD    = cargo test $(COMPILER_ARGS)
+TEST_CMD    = cargo test $(COMPILER_ARGS) --manifest-path $(KERNEL_MANIFEST)
 OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
     -O binary
@@ -203,6 +203,8 @@ chainboot: $(KERNEL_BIN)
 ##------------------------------------------------------------------------------
 clippy:
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD) --features test_build --tests \
+                --manifest-path $(KERNEL_MANIFEST)
 
 ##------------------------------------------------------------------------------
 ## Clean
@@ -299,6 +301,10 @@ test_boot: $(KERNEL_BIN)
 define KERNEL_TEST_RUNNER
     #!/usr/bin/env bash
 
+    # The cargo test runner seems to change into the crate under test's directory. Therefore, ensure
+    # this script executes from the root.
+    cd $(shell pwd)
+
     TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
     TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
 
diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index eefe4b7eb..35e0307f8 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -489,7 +489,7 @@ sequences might be needed.
 Since nothing complex is happening in the implementation, it is not covered in detail here. Please
 refer to [the source of the **peripheral** controller] to check it out.
 
-[the source of the **peripheral** controller]: src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+[the source of the **peripheral** controller]: kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
 
 ##### The IRQ Handler Table
 
@@ -639,7 +639,7 @@ As with the implementation of the BCM interrupt controller driver, we won't cove
 parts in exhaustive detail. For that, please refer to [this folder] folder which contains all the
 sources.
 
-[this folder]: src/bsp/device_driver/arm
+[this folder]: kernel/src/bsp/device_driver/arm
 
 ## Test it
 
@@ -746,9 +746,9 @@ Minipush 1.0
 ## Diff to previous
 ```diff
 
-diff -uNr 12_integrated_testing/Cargo.toml 13_exceptions_part2_peripheral_IRQs/Cargo.toml
---- 12_integrated_testing/Cargo.toml
-+++ 13_exceptions_part2_peripheral_IRQs/Cargo.toml
+diff -uNr 12_integrated_testing/kernel/Cargo.toml 13_exceptions_part2_peripheral_IRQs/kernel/Cargo.toml
+--- 12_integrated_testing/kernel/Cargo.toml
++++ 13_exceptions_part2_peripheral_IRQs/kernel/Cargo.toml
 @@ -1,6 +1,6 @@
  [package]
  name = "mingo"
@@ -758,9 +758,9 @@ diff -uNr 12_integrated_testing/Cargo.toml 13_exceptions_part2_peripheral_IRQs/C
  edition = "2021"
 
 
-diff -uNr 12_integrated_testing/src/_arch/aarch64/cpu/smp.rs 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs
---- 12_integrated_testing/src/_arch/aarch64/cpu/smp.rs
-+++ 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs
+diff -uNr 12_integrated_testing/kernel/src/_arch/aarch64/cpu/smp.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/smp.rs
+--- 12_integrated_testing/kernel/src/_arch/aarch64/cpu/smp.rs
++++ 13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/smp.rs
 @@ -0,0 +1,30 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -793,9 +793,9 @@ diff -uNr 12_integrated_testing/src/_arch/aarch64/cpu/smp.rs 13_exceptions_part2
 +    T::from((MPIDR_EL1.get() & CORE_MASK) as u8)
 +}
 
-diff -uNr 12_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs
---- 12_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs
-+++ 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs
+diff -uNr 12_integrated_testing/kernel/src/_arch/aarch64/exception/asynchronous.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception/asynchronous.rs
+--- 12_integrated_testing/kernel/src/_arch/aarch64/exception/asynchronous.rs
++++ 13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception/asynchronous.rs
 @@ -11,13 +11,18 @@
  //!
  //! crate::exception::asynchronous::arch_asynchronous
@@ -889,9 +889,9 @@ diff -uNr 12_integrated_testing/src/_arch/aarch64/exception/asynchronous.rs 13_e
  #[rustfmt::skip]
  pub fn print_state() {
 
-diff -uNr 12_integrated_testing/src/_arch/aarch64/exception.rs 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
---- 12_integrated_testing/src/_arch/aarch64/exception.rs
-+++ 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
+diff -uNr 12_integrated_testing/kernel/src/_arch/aarch64/exception.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception.rs
+--- 12_integrated_testing/kernel/src/_arch/aarch64/exception.rs
++++ 13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception.rs
 @@ -11,6 +11,7 @@
  //!
  //! crate::exception::arch_exception
@@ -915,9 +915,9 @@ diff -uNr 12_integrated_testing/src/_arch/aarch64/exception.rs 13_exceptions_par
 
  #[no_mangle]
 
-diff -uNr 12_integrated_testing/src/bsp/device_driver/arm/gicv2/gicc.rs 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs
---- 12_integrated_testing/src/bsp/device_driver/arm/gicv2/gicc.rs
-+++ 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs
+diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
+--- 12_integrated_testing/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
++++ 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
 @@ -0,0 +1,141 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -1061,9 +1061,9 @@ diff -uNr 12_integrated_testing/src/bsp/device_driver/arm/gicv2/gicc.rs 13_excep
 +    }
 +}
 
-diff -uNr 12_integrated_testing/src/bsp/device_driver/arm/gicv2/gicd.rs 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicd.rs
---- 12_integrated_testing/src/bsp/device_driver/arm/gicv2/gicd.rs
-+++ 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicd.rs
+diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
+--- 12_integrated_testing/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
++++ 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
 @@ -0,0 +1,199 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -1265,9 +1265,9 @@ diff -uNr 12_integrated_testing/src/bsp/device_driver/arm/gicv2/gicd.rs 13_excep
 +    }
 +}
 
-diff -uNr 12_integrated_testing/src/bsp/device_driver/arm/gicv2.rs 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs
---- 12_integrated_testing/src/bsp/device_driver/arm/gicv2.rs
-+++ 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs
+diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/arm/gicv2.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2.rs
+--- 12_integrated_testing/kernel/src/bsp/device_driver/arm/gicv2.rs
++++ 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2.rs
 @@ -0,0 +1,219 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -1489,9 +1489,9 @@ diff -uNr 12_integrated_testing/src/bsp/device_driver/arm/gicv2.rs 13_exceptions
 +    }
 +}
 
-diff -uNr 12_integrated_testing/src/bsp/device_driver/arm.rs 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm.rs
---- 12_integrated_testing/src/bsp/device_driver/arm.rs
-+++ 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm.rs
+diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/arm.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm.rs
+--- 12_integrated_testing/kernel/src/bsp/device_driver/arm.rs
++++ 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm.rs
 @@ -0,0 +1,9 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -1503,9 +1503,9 @@ diff -uNr 12_integrated_testing/src/bsp/device_driver/arm.rs 13_exceptions_part2
 +
 +pub use gicv2::*;
 
-diff -uNr 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
---- 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
-+++ 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+--- 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
++++ 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 @@ -6,7 +6,7 @@
 
  use crate::{
@@ -1534,9 +1534,9 @@ diff -uNr 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 13_exc
      }
 
 
-diff -uNr 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
---- 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
-+++ 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+--- 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
++++ 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
 @@ -0,0 +1,167 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -1706,9 +1706,9 @@ diff -uNr 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_interrupt_cont
 +    }
 +}
 
-diff -uNr 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
---- 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
-+++ 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+--- 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
++++ 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
 @@ -0,0 +1,131 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -1842,9 +1842,9 @@ diff -uNr 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_interrupt_cont
 +    }
 +}
 
-diff -uNr 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
---- 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
-+++ 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+--- 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
++++ 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 @@ -10,8 +10,8 @@
  //! - <https://developer.arm.com/documentation/ddi0183/latest>
 
@@ -2010,9 +2010,9 @@ diff -uNr 12_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 +    }
 +}
 
-diff -uNr 12_integrated_testing/src/bsp/device_driver/bcm.rs 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm.rs
---- 12_integrated_testing/src/bsp/device_driver/bcm.rs
-+++ 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm.rs
+diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm.rs
+--- 12_integrated_testing/kernel/src/bsp/device_driver/bcm.rs
++++ 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm.rs
 @@ -5,7 +5,11 @@
  //! BCM driver top level.
 
@@ -2026,9 +2026,9 @@ diff -uNr 12_integrated_testing/src/bsp/device_driver/bcm.rs 13_exceptions_part2
 +pub use bcm2xxx_interrupt_controller::*;
  pub use bcm2xxx_pl011_uart::*;
 
-diff -uNr 12_integrated_testing/src/bsp/device_driver.rs 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver.rs
---- 12_integrated_testing/src/bsp/device_driver.rs
-+++ 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver.rs
+diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver.rs
+--- 12_integrated_testing/kernel/src/bsp/device_driver.rs
++++ 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver.rs
 @@ -4,9 +4,13 @@
 
  //! Device driver.
@@ -2044,9 +2044,9 @@ diff -uNr 12_integrated_testing/src/bsp/device_driver.rs 13_exceptions_part2_per
  #[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
  pub use bcm::*;
 
-diff -uNr 12_integrated_testing/src/bsp/raspberrypi/driver.rs 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/driver.rs
---- 12_integrated_testing/src/bsp/raspberrypi/driver.rs
-+++ 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/driver.rs
+diff -uNr 12_integrated_testing/kernel/src/bsp/raspberrypi/driver.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/driver.rs
+--- 12_integrated_testing/kernel/src/bsp/raspberrypi/driver.rs
++++ 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/driver.rs
 @@ -12,7 +12,7 @@
 
  /// Device Driver Manager type.
@@ -2070,9 +2070,9 @@ diff -uNr 12_integrated_testing/src/bsp/raspberrypi/driver.rs 13_exceptions_part
 
  //--------------------------------------------------------------------------------------------------
 
-diff -uNr 12_integrated_testing/src/bsp/raspberrypi/exception/asynchronous.rs 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception/asynchronous.rs
---- 12_integrated_testing/src/bsp/raspberrypi/exception/asynchronous.rs
-+++ 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception/asynchronous.rs
+diff -uNr 12_integrated_testing/kernel/src/bsp/raspberrypi/exception/asynchronous.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
+--- 12_integrated_testing/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
++++ 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
 @@ -0,0 +1,36 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -2111,9 +2111,9 @@ diff -uNr 12_integrated_testing/src/bsp/raspberrypi/exception/asynchronous.rs 13
 +    &super::super::INTERRUPT_CONTROLLER
 +}
 
-diff -uNr 12_integrated_testing/src/bsp/raspberrypi/exception.rs 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception.rs
---- 12_integrated_testing/src/bsp/raspberrypi/exception.rs
-+++ 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception.rs
+diff -uNr 12_integrated_testing/kernel/src/bsp/raspberrypi/exception.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/exception.rs
+--- 12_integrated_testing/kernel/src/bsp/raspberrypi/exception.rs
++++ 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/exception.rs
 @@ -0,0 +1,7 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -2123,9 +2123,9 @@ diff -uNr 12_integrated_testing/src/bsp/raspberrypi/exception.rs 13_exceptions_p
 +
 +pub mod asynchronous;
 
-diff -uNr 12_integrated_testing/src/bsp/raspberrypi/memory.rs 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
---- 12_integrated_testing/src/bsp/raspberrypi/memory.rs
-+++ 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
+diff -uNr 12_integrated_testing/kernel/src/bsp/raspberrypi/memory.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory.rs
+--- 12_integrated_testing/kernel/src/bsp/raspberrypi/memory.rs
++++ 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory.rs
 @@ -73,10 +73,12 @@
      pub mod mmio {
          use super::*;
@@ -2153,9 +2153,9 @@ diff -uNr 12_integrated_testing/src/bsp/raspberrypi/memory.rs 13_exceptions_part
      }
  }
 
-diff -uNr 12_integrated_testing/src/bsp/raspberrypi.rs 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi.rs
---- 12_integrated_testing/src/bsp/raspberrypi.rs
-+++ 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi.rs
+diff -uNr 12_integrated_testing/kernel/src/bsp/raspberrypi.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi.rs
+--- 12_integrated_testing/kernel/src/bsp/raspberrypi.rs
++++ 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi.rs
 @@ -7,6 +7,7 @@
  pub mod console;
  pub mod cpu;
@@ -2193,9 +2193,9 @@ diff -uNr 12_integrated_testing/src/bsp/raspberrypi.rs 13_exceptions_part2_perip
  //--------------------------------------------------------------------------------------------------
  // Public Code
 
-diff -uNr 12_integrated_testing/src/cpu/smp.rs 13_exceptions_part2_peripheral_IRQs/src/cpu/smp.rs
---- 12_integrated_testing/src/cpu/smp.rs
-+++ 13_exceptions_part2_peripheral_IRQs/src/cpu/smp.rs
+diff -uNr 12_integrated_testing/kernel/src/cpu/smp.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/cpu/smp.rs
+--- 12_integrated_testing/kernel/src/cpu/smp.rs
++++ 13_exceptions_part2_peripheral_IRQs/kernel/src/cpu/smp.rs
 @@ -0,0 +1,14 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -2212,9 +2212,9 @@ diff -uNr 12_integrated_testing/src/cpu/smp.rs 13_exceptions_part2_peripheral_IR
 +//--------------------------------------------------------------------------------------------------
 +pub use arch_smp::core_id;
 
-diff -uNr 12_integrated_testing/src/cpu.rs 13_exceptions_part2_peripheral_IRQs/src/cpu.rs
---- 12_integrated_testing/src/cpu.rs
-+++ 13_exceptions_part2_peripheral_IRQs/src/cpu.rs
+diff -uNr 12_integrated_testing/kernel/src/cpu.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/cpu.rs
+--- 12_integrated_testing/kernel/src/cpu.rs
++++ 13_exceptions_part2_peripheral_IRQs/kernel/src/cpu.rs
 @@ -10,6 +10,8 @@
 
  mod boot;
@@ -2225,9 +2225,9 @@ diff -uNr 12_integrated_testing/src/cpu.rs 13_exceptions_part2_peripheral_IRQs/s
  // Architectural Public Reexports
  //--------------------------------------------------------------------------------------------------
 
-diff -uNr 12_integrated_testing/src/driver.rs 13_exceptions_part2_peripheral_IRQs/src/driver.rs
---- 12_integrated_testing/src/driver.rs
-+++ 13_exceptions_part2_peripheral_IRQs/src/driver.rs
+diff -uNr 12_integrated_testing/kernel/src/driver.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/driver.rs
+--- 12_integrated_testing/kernel/src/driver.rs
++++ 13_exceptions_part2_peripheral_IRQs/kernel/src/driver.rs
 @@ -23,6 +23,14 @@
          unsafe fn init(&self) -> Result<(), &'static str> {
              Ok(())
@@ -2244,9 +2244,9 @@ diff -uNr 12_integrated_testing/src/driver.rs 13_exceptions_part2_peripheral_IRQ
 
      /// Device driver management functions.
 
-diff -uNr 12_integrated_testing/src/exception/asynchronous.rs 13_exceptions_part2_peripheral_IRQs/src/exception/asynchronous.rs
---- 12_integrated_testing/src/exception/asynchronous.rs
-+++ 13_exceptions_part2_peripheral_IRQs/src/exception/asynchronous.rs
+diff -uNr 12_integrated_testing/kernel/src/exception/asynchronous.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.rs
+--- 12_integrated_testing/kernel/src/exception/asynchronous.rs
++++ 13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.rs
 @@ -8,7 +8,145 @@
  #[path = "../_arch/aarch64/exception/asynchronous.rs"]
  mod arch_asynchronous;
@@ -2395,9 +2395,9 @@ diff -uNr 12_integrated_testing/src/exception/asynchronous.rs 13_exceptions_part
 +    ret
 +}
 
-diff -uNr 12_integrated_testing/src/lib.rs 13_exceptions_part2_peripheral_IRQs/src/lib.rs
---- 12_integrated_testing/src/lib.rs
-+++ 13_exceptions_part2_peripheral_IRQs/src/lib.rs
+diff -uNr 12_integrated_testing/kernel/src/lib.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
+--- 12_integrated_testing/kernel/src/lib.rs
++++ 13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
 @@ -108,6 +108,7 @@
 
  #![allow(clippy::upper_case_acronyms)]
@@ -2415,9 +2415,9 @@ diff -uNr 12_integrated_testing/src/lib.rs 13_exceptions_part2_peripheral_IRQs/s
 
  //--------------------------------------------------------------------------------------------------
 
-diff -uNr 12_integrated_testing/src/main.rs 13_exceptions_part2_peripheral_IRQs/src/main.rs
---- 12_integrated_testing/src/main.rs
-+++ 13_exceptions_part2_peripheral_IRQs/src/main.rs
+diff -uNr 12_integrated_testing/kernel/src/main.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs
+--- 12_integrated_testing/kernel/src/main.rs
++++ 13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs
 @@ -11,7 +11,7 @@
  #![no_main]
  #![no_std]
@@ -2484,9 +2484,9 @@ diff -uNr 12_integrated_testing/src/main.rs 13_exceptions_part2_peripheral_IRQs/
 +    cpu::wait_forever();
  }
 
-diff -uNr 12_integrated_testing/src/panic_wait.rs 13_exceptions_part2_peripheral_IRQs/src/panic_wait.rs
---- 12_integrated_testing/src/panic_wait.rs
-+++ 13_exceptions_part2_peripheral_IRQs/src/panic_wait.rs
+diff -uNr 12_integrated_testing/kernel/src/panic_wait.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/panic_wait.rs
+--- 12_integrated_testing/kernel/src/panic_wait.rs
++++ 13_exceptions_part2_peripheral_IRQs/kernel/src/panic_wait.rs
 @@ -4,7 +4,7 @@
 
  //! A panic handler that infinitely waits.
@@ -2506,9 +2506,9 @@ diff -uNr 12_integrated_testing/src/panic_wait.rs 13_exceptions_part2_peripheral
      panic_prevent_reenter();
 
 
-diff -uNr 12_integrated_testing/src/state.rs 13_exceptions_part2_peripheral_IRQs/src/state.rs
---- 12_integrated_testing/src/state.rs
-+++ 13_exceptions_part2_peripheral_IRQs/src/state.rs
+diff -uNr 12_integrated_testing/kernel/src/state.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/state.rs
+--- 12_integrated_testing/kernel/src/state.rs
++++ 13_exceptions_part2_peripheral_IRQs/kernel/src/state.rs
 @@ -0,0 +1,92 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -2603,9 +2603,9 @@ diff -uNr 12_integrated_testing/src/state.rs 13_exceptions_part2_peripheral_IRQs
 +    }
 +}
 
-diff -uNr 12_integrated_testing/src/synchronization.rs 13_exceptions_part2_peripheral_IRQs/src/synchronization.rs
---- 12_integrated_testing/src/synchronization.rs
-+++ 13_exceptions_part2_peripheral_IRQs/src/synchronization.rs
+diff -uNr 12_integrated_testing/kernel/src/synchronization.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/synchronization.rs
+--- 12_integrated_testing/kernel/src/synchronization.rs
++++ 13_exceptions_part2_peripheral_IRQs/kernel/src/synchronization.rs
 @@ -28,6 +28,21 @@
          /// Locks the mutex and grants the closure temporary mutable access to the wrapped data.
          fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R;
@@ -2738,9 +2738,9 @@ diff -uNr 12_integrated_testing/src/synchronization.rs 13_exceptions_part2_perip
 +    }
  }
 
-diff -uNr 12_integrated_testing/tests/04_exception_irq_sanity.rs 13_exceptions_part2_peripheral_IRQs/tests/04_exception_irq_sanity.rs
---- 12_integrated_testing/tests/04_exception_irq_sanity.rs
-+++ 13_exceptions_part2_peripheral_IRQs/tests/04_exception_irq_sanity.rs
+diff -uNr 12_integrated_testing/kernel/tests/04_exception_irq_sanity.rs 13_exceptions_part2_peripheral_IRQs/kernel/tests/04_exception_irq_sanity.rs
+--- 12_integrated_testing/kernel/tests/04_exception_irq_sanity.rs
++++ 13_exceptions_part2_peripheral_IRQs/kernel/tests/04_exception_irq_sanity.rs
 @@ -0,0 +1,66 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/Cargo.toml b/13_exceptions_part2_peripheral_IRQs/kernel/Cargo.toml
new file mode 100644
index 000000000..1d99ad38e
--- /dev/null
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/Cargo.toml
@@ -0,0 +1,58 @@
+[package]
+name = "mingo"
+version = "0.13.0"
+authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+edition = "2021"
+
+
+[features]
+default = []
+bsp_rpi3 = ["tock-registers"]
+bsp_rpi4 = ["tock-registers"]
+test_build = ["qemu-exit"]
+
+##--------------------------------------------------------------------------------------------------
+## Dependencies
+##--------------------------------------------------------------------------------------------------
+
+[dependencies]
+test-types = { path = "../libraries/test-types" }
+
+# Optional dependencies
+tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
+qemu-exit = { version = "3.x.x", optional = true }
+
+# Platform specific dependencies
+[target.'cfg(target_arch = "aarch64")'.dependencies]
+cortex-a = { version = "7.x.x" }
+
+##--------------------------------------------------------------------------------------------------
+## Testing
+##--------------------------------------------------------------------------------------------------
+
+[dev-dependencies]
+test-macros = { path = "../libraries/test-macros" }
+
+# Unit tests are done in the library part of the kernel.
+[lib]
+name = "libkernel"
+test = true
+
+# Disable unit tests for the kernel binary.
+[[bin]]
+name = "kernel"
+path = "src/main.rs"
+test = false
+
+# List of tests without harness.
+[[test]]
+name = "00_console_sanity"
+harness = false
+
+[[test]]
+name = "02_exception_sync_page_fault"
+harness = false
+
+[[test]]
+name = "03_exception_restore_sanity"
+harness = false
diff --git a/13_exceptions_part2_peripheral_IRQs/build.rs b/13_exceptions_part2_peripheral_IRQs/kernel/build.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/build.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/build.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/boot.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/boot.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.s b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/boot.s
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/boot.s
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/boot.s
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/smp.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/cpu/smp.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/smp.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.s b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception.s
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception.s
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception.s
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception/asynchronous.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/exception/asynchronous.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception/asynchronous.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/memory/mmu.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/memory/mmu.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/time.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/time.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/time.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/time.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/bsp.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicd.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicd.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/common.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/common.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/common.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/common.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/console.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/console.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/console.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/console.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/cpu.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/cpu.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/cpu.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/cpu.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/driver.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/driver.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/driver.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/driver.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/exception.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/exception.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception/asynchronous.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/exception/asynchronous.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/kernel.ld b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/kernel.ld
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/kernel.ld
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/kernel.ld
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory/mmu.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory/mmu.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/console.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/console.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/console.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/console.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/cpu.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/cpu.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/cpu.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/cpu.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/cpu/boot.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/cpu/boot.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/cpu/boot.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/cpu/boot.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/cpu/smp.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/cpu/smp.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/cpu/smp.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/cpu/smp.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/driver.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/driver.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/driver.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/driver.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/exception.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/exception.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/exception.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/exception.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/exception/asynchronous.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/exception/asynchronous.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/lib.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/lib.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/main.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/main.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/memory.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/memory.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/memory.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/memory.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/translation_table.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/translation_table.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/panic_wait.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/panic_wait.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/panic_wait.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/panic_wait.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/print.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/print.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/print.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/print.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/state.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/state.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/state.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/state.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/synchronization.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/synchronization.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/synchronization.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/synchronization.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/src/time.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/time.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/src/time.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/src/time.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rb b/13_exceptions_part2_peripheral_IRQs/kernel/tests/00_console_sanity.rb
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rb
rename to 13_exceptions_part2_peripheral_IRQs/kernel/tests/00_console_sanity.rb
diff --git a/13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs b/13_exceptions_part2_peripheral_IRQs/kernel/tests/00_console_sanity.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/tests/00_console_sanity.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/tests/00_console_sanity.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/tests/01_timer_sanity.rs b/13_exceptions_part2_peripheral_IRQs/kernel/tests/01_timer_sanity.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/tests/01_timer_sanity.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/tests/01_timer_sanity.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs b/13_exceptions_part2_peripheral_IRQs/kernel/tests/02_exception_sync_page_fault.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/tests/02_exception_sync_page_fault.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/tests/03_exception_restore_sanity.rb b/13_exceptions_part2_peripheral_IRQs/kernel/tests/03_exception_restore_sanity.rb
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/tests/03_exception_restore_sanity.rb
rename to 13_exceptions_part2_peripheral_IRQs/kernel/tests/03_exception_restore_sanity.rb
diff --git a/13_exceptions_part2_peripheral_IRQs/tests/03_exception_restore_sanity.rs b/13_exceptions_part2_peripheral_IRQs/kernel/tests/03_exception_restore_sanity.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/tests/03_exception_restore_sanity.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/tests/03_exception_restore_sanity.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/tests/04_exception_irq_sanity.rs b/13_exceptions_part2_peripheral_IRQs/kernel/tests/04_exception_irq_sanity.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/tests/04_exception_irq_sanity.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/tests/04_exception_irq_sanity.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/tests/boot_test_string.rb b/13_exceptions_part2_peripheral_IRQs/kernel/tests/boot_test_string.rb
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/tests/boot_test_string.rb
rename to 13_exceptions_part2_peripheral_IRQs/kernel/tests/boot_test_string.rb
diff --git a/13_exceptions_part2_peripheral_IRQs/tests/panic_exit_success/mod.rs b/13_exceptions_part2_peripheral_IRQs/kernel/tests/panic_exit_success/mod.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/tests/panic_exit_success/mod.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/tests/panic_exit_success/mod.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/tests/panic_wait_forever/mod.rs b/13_exceptions_part2_peripheral_IRQs/kernel/tests/panic_wait_forever/mod.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/tests/panic_wait_forever/mod.rs
rename to 13_exceptions_part2_peripheral_IRQs/kernel/tests/panic_wait_forever/mod.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/test-macros/Cargo.toml b/13_exceptions_part2_peripheral_IRQs/libraries/test-macros/Cargo.toml
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/test-macros/Cargo.toml
rename to 13_exceptions_part2_peripheral_IRQs/libraries/test-macros/Cargo.toml
diff --git a/13_exceptions_part2_peripheral_IRQs/test-macros/src/lib.rs b/13_exceptions_part2_peripheral_IRQs/libraries/test-macros/src/lib.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/test-macros/src/lib.rs
rename to 13_exceptions_part2_peripheral_IRQs/libraries/test-macros/src/lib.rs
diff --git a/13_exceptions_part2_peripheral_IRQs/test-types/Cargo.toml b/13_exceptions_part2_peripheral_IRQs/libraries/test-types/Cargo.toml
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/test-types/Cargo.toml
rename to 13_exceptions_part2_peripheral_IRQs/libraries/test-types/Cargo.toml
diff --git a/13_exceptions_part2_peripheral_IRQs/test-types/src/lib.rs b/13_exceptions_part2_peripheral_IRQs/libraries/test-types/src/lib.rs
similarity index 100%
rename from 13_exceptions_part2_peripheral_IRQs/test-types/src/lib.rs
rename to 13_exceptions_part2_peripheral_IRQs/libraries/test-types/src/lib.rs
diff --git a/14_virtual_mem_part2_mmio_remap/Cargo.lock b/14_virtual_mem_part2_mmio_remap/Cargo.lock
index 6526767a7..337a9ed80 100644
--- a/14_virtual_mem_part2_mmio_remap/Cargo.lock
+++ b/14_virtual_mem_part2_mmio_remap/Cargo.lock
@@ -39,9 +39,9 @@ checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
 
 [[package]]
 name = "quote"
-version = "1.0.17"
+version = "1.0.18"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "632d02bff7f874a36f33ea8bb416cd484b90cc66c1194b1a1110d067a7013f58"
+checksum = "a1feb54ed693b93a84e14094943b84b7c4eae204c512b7ccb95ab0c66d278ad1"
 dependencies = [
  "proc-macro2",
 ]
diff --git a/14_virtual_mem_part2_mmio_remap/Cargo.toml b/14_virtual_mem_part2_mmio_remap/Cargo.toml
index 3146ad05f..6480a7276 100644
--- a/14_virtual_mem_part2_mmio_remap/Cargo.toml
+++ b/14_virtual_mem_part2_mmio_remap/Cargo.toml
@@ -1,60 +1,9 @@
-[package]
-name = "mingo"
-version = "0.14.0"
-authors = ["Andre Richter <andre.o.richter@gmail.com>"]
-edition = "2021"
+[workspace]
+
+members = [
+        "libraries/*",
+        "kernel"
+]
 
 [profile.release]
 lto = true
-
-[features]
-default = []
-bsp_rpi3 = ["tock-registers"]
-bsp_rpi4 = ["tock-registers"]
-test_build = ["qemu-exit"]
-
-##--------------------------------------------------------------------------------------------------
-## Dependencies
-##--------------------------------------------------------------------------------------------------
-
-[dependencies]
-test-types = { path = "test-types" }
-
-# Optional dependencies
-tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
-qemu-exit = { version = "3.x.x", optional = true }
-
-# Platform specific dependencies
-[target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "7.x.x" }
-
-##--------------------------------------------------------------------------------------------------
-## Testing
-##--------------------------------------------------------------------------------------------------
-
-[dev-dependencies]
-test-macros = { path = "test-macros" }
-
-# Unit tests are done in the library part of the kernel.
-[lib]
-name = "libkernel"
-test = true
-
-# Disable unit tests for the kernel binary.
-[[bin]]
-name = "kernel"
-path = "src/main.rs"
-test = false
-
-# List of tests without harness.
-[[test]]
-name = "00_console_sanity"
-harness = false
-
-[[test]]
-name = "02_exception_sync_page_fault"
-harness = false
-
-[[test]]
-name = "03_exception_restore_sanity"
-harness = false
diff --git a/14_virtual_mem_part2_mmio_remap/Makefile b/14_virtual_mem_part2_mmio_remap/Makefile
index 6adb1aca6..427c93034 100644
--- a/14_virtual_mem_part2_mmio_remap/Makefile
+++ b/14_virtual_mem_part2_mmio_remap/Makefile
@@ -41,7 +41,7 @@ ifeq ($(BSP),rpi3)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
-    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/kernel/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -55,7 +55,7 @@ else ifeq ($(BSP),rpi4)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
-    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/kernel/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
@@ -67,9 +67,9 @@ export LD_SCRIPT_PATH
 ##--------------------------------------------------------------------------------------------------
 ## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
+KERNEL_MANIFEST      = kernel/Cargo.toml
 KERNEL_LINKER_SCRIPT = kernel.ld
-
-LAST_BUILD_CONFIG = target/$(BSP).build_config
+LAST_BUILD_CONFIG    = target/$(BSP).build_config
 
 KERNEL_ELF      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
@@ -94,11 +94,11 @@ COMPILER_ARGS = --target=$(TARGET) \
     $(FEATURES)                    \
     --release
 
-RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
+RUSTC_CMD   = cargo rustc $(COMPILER_ARGS) --manifest-path $(KERNEL_MANIFEST)
 DOC_CMD     = cargo doc $(COMPILER_ARGS)
 CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
 CHECK_CMD   = cargo check $(COMPILER_ARGS)
-TEST_CMD    = cargo test $(COMPILER_ARGS)
+TEST_CMD    = cargo test $(COMPILER_ARGS) --manifest-path $(KERNEL_MANIFEST)
 OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
     -O binary
@@ -203,6 +203,8 @@ chainboot: $(KERNEL_BIN)
 ##------------------------------------------------------------------------------
 clippy:
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD) --features test_build --tests \
+                --manifest-path $(KERNEL_MANIFEST)
 
 ##------------------------------------------------------------------------------
 ## Clean
@@ -299,6 +301,10 @@ test_boot: $(KERNEL_BIN)
 define KERNEL_TEST_RUNNER
     #!/usr/bin/env bash
 
+    # The cargo test runner seems to change into the crate under test's directory. Therefore, ensure
+    # this script executes from the root.
+    cd $(shell pwd)
+
     TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
     TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
 
diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index 0056174b6..e19cedb7a 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -298,8 +298,8 @@ pub unsafe fn kernel_map_mmio(
 
 This allocator is defined and implemented in the added file `src/memory/mmu/alloc.rs`. Like other
 parts of the mapping code, its implementation makes use of the newly introduced `PageAddress<ATYPE>`
-and `MemoryRegion<ATYPE>` types (in [`src/memory/mmu/types.rs`](src/memory/mmu/types.rs)), but apart
-from that is rather straight forward. Therefore, it won't be covered in details here.
+and `MemoryRegion<ATYPE>` types (in [`src/memory/mmu/types.rs`](kernel/src/memory/mmu/types.rs)),
+but apart from that is rather straight forward. Therefore, it won't be covered in details here.
 
 The more interesting question is: How does the allocator get to learn which VAs it can use?
 
@@ -341,13 +341,14 @@ the VA range.
 There's a couple of changes not covered in this tutorial text, but the reader should ideally skim
 through them:
 
-- [`src/memory.rs`](src/memory.rs) and [`src/memory/mmu/types.rs`](src/memory/mmu/types.rs)
-  introduce a couple of supporting types, like`Address<ATYPE>`, `PageAddress<ATYPE>` and
-  `MemoryRegion<ATYPE>`. It is worth reading their implementations.
-- [`src/memory/mmu/mapping_record.rs`](src/memory/mmu/mapping_record.rs) provides the generic kernel
-  code's way of tracking previous memory mappings for use cases such as reusing existing mappings
-  (in case of drivers that have their MMIO ranges in the same `64 KiB` page) or printing mappings
-  statistics.
+- [`src/memory.rs`](kernel/src/memory.rs) and
+  [`src/memory/mmu/types.rs`](kernel/src/memory/mmu/types.rs) introduce a couple of supporting
+  types, like`Address<ATYPE>`, `PageAddress<ATYPE>` and `MemoryRegion<ATYPE>`. It is worth reading
+  their implementations.
+- [`src/memory/mmu/mapping_record.rs`](kernel/src/memory/mmu/mapping_record.rs) provides the generic
+  kernel code's way of tracking previous memory mappings for use cases such as reusing existing
+  mappings (in case of drivers that have their MMIO ranges in the same `64 KiB` page) or printing
+  mappings statistics.
 
 ## Test it
 
@@ -433,9 +434,9 @@ Minipush 1.0
 ## Diff to previous
 ```diff
 
-diff -uNr 13_exceptions_part2_peripheral_IRQs/Cargo.toml 14_virtual_mem_part2_mmio_remap/Cargo.toml
---- 13_exceptions_part2_peripheral_IRQs/Cargo.toml
-+++ 14_virtual_mem_part2_mmio_remap/Cargo.toml
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/Cargo.toml 14_virtual_mem_part2_mmio_remap/kernel/Cargo.toml
+--- 13_exceptions_part2_peripheral_IRQs/kernel/Cargo.toml
++++ 14_virtual_mem_part2_mmio_remap/kernel/Cargo.toml
 @@ -1,6 +1,6 @@
  [package]
  name = "mingo"
@@ -445,9 +446,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/Cargo.toml 14_virtual_mem_part2_mm
  edition = "2021"
 
 
-diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
---- 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/translation_table.rs
-+++ 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs 14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
+--- 13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
++++ 14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
 @@ -14,10 +14,14 @@
  //! crate::memory::mmu::translation_table::arch_translation_table
 
@@ -705,9 +706,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu/trans
      use super::*;
      use test_macros::kernel_test;
 
-diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
---- 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs
-+++ 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/memory/mmu.rs 14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/memory/mmu.rs
+--- 13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/memory/mmu.rs
++++ 14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/memory/mmu.rs
 @@ -15,7 +15,7 @@
 
  use crate::{
@@ -802,9 +803,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/_arch/aarch64/memory/mmu.rs 14
 -    }
 -}
 
-diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicc.rs
---- 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicc.rs
-+++ 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicc.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
+--- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
++++ 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
 @@ -4,7 +4,9 @@
 
  //! GICC Driver - GIC CPU interface.
@@ -891,9 +892,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gi
      }
  }
 
-diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicd.rs 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicd.rs
---- 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gicd.rs
-+++ 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicd.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
+--- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
++++ 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
 @@ -8,8 +8,9 @@
  //!   - SPI - Shared Peripheral Interrupt.
 
@@ -967,9 +968,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2/gi
              _ => {
                  let enable_reg_index_shared = enable_reg_index - 1;
 
-diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs
---- 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs
-+++ 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2.rs 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2.rs
+--- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2.rs
++++ 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2.rs
 @@ -79,7 +79,8 @@
  mod gicc;
  mod gicd;
@@ -1043,9 +1044,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/arm/gicv2.rs
              self.gicd.boot_core_init();
          }
 
-diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
---- 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
-+++ 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+--- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
++++ 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 @@ -5,9 +5,10 @@
  //! GPIO Driver.
 
@@ -1131,9 +1132,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
 +    }
  }
 
-diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
---- 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
-+++ 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+--- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
++++ 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
 @@ -7,7 +7,7 @@
  use super::{InterruptController, PendingIRQs, PeripheralIRQ};
  use crate::{
@@ -1218,9 +1219,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
      type IRQNumberType = PeripheralIRQ;
 
 
-diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
---- 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
-+++ 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+--- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
++++ 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
 @@ -6,7 +6,7 @@
 
  mod peripheral_ic;
@@ -1259,9 +1260,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
 
  impl exception::asynchronous::interface::IRQManager for InterruptController {
 
-diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
---- 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
-+++ 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+--- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
++++ 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 @@ -10,10 +10,13 @@
  //! - <https://developer.arm.com/documentation/ddi0183/latest>
 
@@ -1368,9 +1369,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
 
  impl console::interface::Write for PL011Uart {
 
-diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/console.rs 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs
---- 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/console.rs
-+++ 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/console.rs 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/console.rs
+--- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/console.rs
++++ 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/console.rs
 @@ -5,7 +5,7 @@
  //! BSP console facilities.
 
@@ -1410,9 +1411,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/console.rs 14_
  }
 
 
-diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/driver.rs 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/driver.rs
---- 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/driver.rs
-+++ 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/driver.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/driver.rs 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/driver.rs
+--- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/driver.rs
++++ 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/driver.rs
 @@ -46,7 +46,15 @@
          &self.device_drivers[..]
      }
@@ -1431,9 +1432,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/driver.rs 14_v
          super::GPIO.map_pl011_uart();
      }
 
-diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/kernel.ld 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/kernel.ld
---- 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/kernel.ld
-+++ 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/kernel.ld
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/kernel.ld 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/kernel.ld
+--- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/kernel.ld
++++ 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/kernel.ld
 @@ -38,7 +38,7 @@
      ***********************************************************************************************/
      .boot_core_stack (NOLOAD) :
@@ -1469,9 +1470,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/kernel.ld 14_v
 +    ASSERT((. & PAGE_MASK) == 0, "MMIO remap reservation is not page aligned")
  }
 
-diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
---- 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
-+++ 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory/mmu.rs 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/memory/mmu.rs
+--- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory/mmu.rs
++++ 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/memory/mmu.rs
 @@ -4,70 +4,163 @@
 
  //! BSP Memory Management Unit.
@@ -1761,9 +1762,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory/mmu.rs
 +    }
  }
 
-diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
---- 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs
-+++ 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory.rs 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/memory.rs
+--- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory.rs
++++ 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/memory.rs
 @@ -10,27 +10,59 @@
  //! as the boot core's stack.
  //!
@@ -2005,9 +2006,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi/memory.rs 14_v
 +    PageAddress::from(map::END)
  }
 
-diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi.rs 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi.rs
---- 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi.rs
-+++ 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi.rs 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi.rs
+--- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi.rs
++++ 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi.rs
 @@ -10,17 +10,20 @@
  pub mod exception;
  pub mod memory;
@@ -2054,9 +2055,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/bsp/raspberrypi.rs 14_virtual_
 
  //--------------------------------------------------------------------------------------------------
 
-diff -uNr 13_exceptions_part2_peripheral_IRQs/src/common.rs 14_virtual_mem_part2_mmio_remap/src/common.rs
---- 13_exceptions_part2_peripheral_IRQs/src/common.rs
-+++ 14_virtual_mem_part2_mmio_remap/src/common.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/common.rs 14_virtual_mem_part2_mmio_remap/kernel/src/common.rs
+--- 13_exceptions_part2_peripheral_IRQs/kernel/src/common.rs
++++ 14_virtual_mem_part2_mmio_remap/kernel/src/common.rs
 @@ -0,0 +1,29 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -2088,9 +2089,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/common.rs 14_virtual_mem_part2
 +    (value + alignment - 1) & !(alignment - 1)
 +}
 
-diff -uNr 13_exceptions_part2_peripheral_IRQs/src/driver.rs 14_virtual_mem_part2_mmio_remap/src/driver.rs
---- 13_exceptions_part2_peripheral_IRQs/src/driver.rs
-+++ 14_virtual_mem_part2_mmio_remap/src/driver.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/driver.rs 14_virtual_mem_part2_mmio_remap/kernel/src/driver.rs
+--- 13_exceptions_part2_peripheral_IRQs/kernel/src/driver.rs
++++ 14_virtual_mem_part2_mmio_remap/kernel/src/driver.rs
 @@ -31,6 +31,14 @@
          fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
              Ok(())
@@ -2132,9 +2133,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/driver.rs 14_virtual_mem_part2
      }
  }
 
-diff -uNr 13_exceptions_part2_peripheral_IRQs/src/lib.rs 14_virtual_mem_part2_mmio_remap/src/lib.rs
---- 13_exceptions_part2_peripheral_IRQs/src/lib.rs
-+++ 14_virtual_mem_part2_mmio_remap/src/lib.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs 14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
+--- 13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
++++ 14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
 @@ -111,8 +111,10 @@
  #![feature(asm_const)]
  #![feature(core_intrinsics)]
@@ -2163,9 +2164,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/lib.rs 14_virtual_mem_part2_mm
 
      test_main();
 
-diff -uNr 13_exceptions_part2_peripheral_IRQs/src/main.rs 14_virtual_mem_part2_mmio_remap/src/main.rs
---- 13_exceptions_part2_peripheral_IRQs/src/main.rs
-+++ 14_virtual_mem_part2_mmio_remap/src/main.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs 14_virtual_mem_part2_mmio_remap/kernel/src/main.rs
+--- 13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs
++++ 14_virtual_mem_part2_mmio_remap/kernel/src/main.rs
 @@ -25,21 +25,41 @@
  #[no_mangle]
  unsafe fn kernel_init() -> ! {
@@ -2226,9 +2227,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/main.rs 14_virtual_mem_part2_m
      let (_, privilege_level) = exception::current_privilege_level();
      info!("Current privilege level: {}", privilege_level);
 
-diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/alloc.rs 14_virtual_mem_part2_mmio_remap/src/memory/mmu/alloc.rs
---- 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/alloc.rs
-+++ 14_virtual_mem_part2_mmio_remap/src/memory/mmu/alloc.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/alloc.rs 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/alloc.rs
+--- 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/alloc.rs
++++ 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/alloc.rs
 @@ -0,0 +1,70 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -2301,9 +2302,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/alloc.rs 14_virtual
 +    }
 +}
 
-diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/mapping_record.rs 14_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs
---- 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/mapping_record.rs
-+++ 14_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/mapping_record.rs 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/mapping_record.rs
+--- 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/mapping_record.rs
++++ 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/mapping_record.rs
 @@ -0,0 +1,233 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -2539,9 +2540,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/mapping_record.rs 1
 +    KERNEL_MAPPING_RECORD.read(|mr| mr.print());
 +}
 
-diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.rs 14_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs
---- 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.rs
-+++ 14_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/translation_table.rs 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/translation_table.rs
+--- 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/translation_table.rs
++++ 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/translation_table.rs
 @@ -8,7 +8,91 @@
  #[path = "../../_arch/aarch64/memory/mmu/translation_table.rs"]
  mod arch_translation_table;
@@ -2636,9 +2637,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/translation_table.r
 +    }
 +}
 
-diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
---- 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs
-+++ 14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/types.rs 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/types.rs
+--- 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/types.rs
++++ 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/types.rs
 @@ -0,0 +1,373 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
@@ -3014,9 +3015,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu/types.rs 14_virtual
 +    }
 +}
 
-diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
---- 13_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs
-+++ 14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu.rs 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu.rs
+--- 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu.rs
++++ 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu.rs
 @@ -3,29 +3,24 @@
  // Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
@@ -3424,9 +3425,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory/mmu.rs 14_virtual_mem_p
      }
  }
 
-diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory.rs 14_virtual_mem_part2_mmio_remap/src/memory.rs
---- 13_exceptions_part2_peripheral_IRQs/src/memory.rs
-+++ 14_virtual_mem_part2_mmio_remap/src/memory.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory.rs 14_virtual_mem_part2_mmio_remap/kernel/src/memory.rs
+--- 13_exceptions_part2_peripheral_IRQs/kernel/src/memory.rs
++++ 14_virtual_mem_part2_mmio_remap/kernel/src/memory.rs
 @@ -5,3 +5,163 @@
  //! Memory Management.
 
@@ -3592,9 +3593,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/src/memory.rs 14_virtual_mem_part2
 +    }
 +}
 
-diff -uNr 13_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs 14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
---- 13_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault.rs
-+++ 14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/tests/02_exception_sync_page_fault.rs 14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fault.rs
+--- 13_exceptions_part2_peripheral_IRQs/kernel/tests/02_exception_sync_page_fault.rs
++++ 14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fault.rs
 @@ -21,18 +21,40 @@
 
  #[no_mangle]
@@ -3641,9 +3642,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/tests/02_exception_sync_page_fault
      info!("Writing beyond mapped area to address 9 GiB...");
      let big_addr: u64 = 9 * 1024 * 1024 * 1024;
 
-diff -uNr 13_exceptions_part2_peripheral_IRQs/tests/03_exception_restore_sanity.rs 14_virtual_mem_part2_mmio_remap/tests/03_exception_restore_sanity.rs
---- 13_exceptions_part2_peripheral_IRQs/tests/03_exception_restore_sanity.rs
-+++ 14_virtual_mem_part2_mmio_remap/tests/03_exception_restore_sanity.rs
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/tests/03_exception_restore_sanity.rs 14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rs
+--- 13_exceptions_part2_peripheral_IRQs/kernel/tests/03_exception_restore_sanity.rs
++++ 14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rs
 @@ -30,18 +30,40 @@
 
  #[no_mangle]
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/Cargo.toml b/14_virtual_mem_part2_mmio_remap/kernel/Cargo.toml
new file mode 100644
index 000000000..deb0c8bc5
--- /dev/null
+++ b/14_virtual_mem_part2_mmio_remap/kernel/Cargo.toml
@@ -0,0 +1,58 @@
+[package]
+name = "mingo"
+version = "0.14.0"
+authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+edition = "2021"
+
+
+[features]
+default = []
+bsp_rpi3 = ["tock-registers"]
+bsp_rpi4 = ["tock-registers"]
+test_build = ["qemu-exit"]
+
+##--------------------------------------------------------------------------------------------------
+## Dependencies
+##--------------------------------------------------------------------------------------------------
+
+[dependencies]
+test-types = { path = "../libraries/test-types" }
+
+# Optional dependencies
+tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
+qemu-exit = { version = "3.x.x", optional = true }
+
+# Platform specific dependencies
+[target.'cfg(target_arch = "aarch64")'.dependencies]
+cortex-a = { version = "7.x.x" }
+
+##--------------------------------------------------------------------------------------------------
+## Testing
+##--------------------------------------------------------------------------------------------------
+
+[dev-dependencies]
+test-macros = { path = "../libraries/test-macros" }
+
+# Unit tests are done in the library part of the kernel.
+[lib]
+name = "libkernel"
+test = true
+
+# Disable unit tests for the kernel binary.
+[[bin]]
+name = "kernel"
+path = "src/main.rs"
+test = false
+
+# List of tests without harness.
+[[test]]
+name = "00_console_sanity"
+harness = false
+
+[[test]]
+name = "02_exception_sync_page_fault"
+harness = false
+
+[[test]]
+name = "03_exception_restore_sanity"
+harness = false
diff --git a/14_virtual_mem_part2_mmio_remap/build.rs b/14_virtual_mem_part2_mmio_remap/kernel/build.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/build.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/build.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.s b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.s
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.s
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.s
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/smp.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/smp.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/smp.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/smp.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.s b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception.s
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception.s
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception.s
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception/asynchronous.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception/asynchronous.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/exception/asynchronous.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception/asynchronous.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/memory/mmu.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/memory/mmu.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/time.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/time.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/time.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/time.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/bsp.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/bsp.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicc.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicc.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicd.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/arm/gicv2/gicd.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/common.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/common.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/bsp/device_driver/common.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/common.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/console.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/console.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/cpu.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/cpu.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/cpu.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/cpu.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/driver.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/driver.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/driver.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/driver.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/exception.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/exception.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/exception.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/exception.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/exception/asynchronous.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/exception/asynchronous.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/kernel.ld b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/kernel.ld
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/kernel.ld
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/kernel.ld
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/memory.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/memory.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/memory/mmu.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/memory/mmu.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/common.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/common.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/common.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/common.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/console.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/console.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/console.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/console.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/cpu.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/cpu.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/cpu.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/cpu.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/cpu/boot.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/cpu/boot.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/cpu/boot.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/cpu/boot.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/cpu/smp.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/cpu/smp.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/cpu/smp.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/cpu/smp.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/driver.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/driver.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/driver.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/driver.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/exception.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/exception.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/exception.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/exception.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/exception/asynchronous.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/exception/asynchronous.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/lib.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/lib.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/main.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/main.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/main.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/main.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/memory.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/memory.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/memory.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/memory.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/memory/mmu/alloc.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/alloc.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/memory/mmu/alloc.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/alloc.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/mapping_record.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/memory/mmu/mapping_record.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/mapping_record.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/translation_table.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/translation_table.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/types.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/memory/mmu/types.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/types.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/panic_wait.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/panic_wait.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/panic_wait.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/panic_wait.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/print.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/print.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/print.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/print.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/state.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/state.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/state.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/state.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/synchronization.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/synchronization.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/synchronization.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/synchronization.rs
diff --git a/14_virtual_mem_part2_mmio_remap/src/time.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/time.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/src/time.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/time.rs
diff --git a/14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rb b/14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rb
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rb
rename to 14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rb
diff --git a/14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs b/14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rs
diff --git a/14_virtual_mem_part2_mmio_remap/tests/01_timer_sanity.rs b/14_virtual_mem_part2_mmio_remap/kernel/tests/01_timer_sanity.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/tests/01_timer_sanity.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/tests/01_timer_sanity.rs
diff --git a/14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs b/14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fault.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fault.rs
diff --git a/14_virtual_mem_part2_mmio_remap/tests/03_exception_restore_sanity.rb b/14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rb
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/tests/03_exception_restore_sanity.rb
rename to 14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rb
diff --git a/14_virtual_mem_part2_mmio_remap/tests/03_exception_restore_sanity.rs b/14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/tests/03_exception_restore_sanity.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rs
diff --git a/14_virtual_mem_part2_mmio_remap/tests/04_exception_irq_sanity.rs b/14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/tests/04_exception_irq_sanity.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.rs
diff --git a/14_virtual_mem_part2_mmio_remap/tests/boot_test_string.rb b/14_virtual_mem_part2_mmio_remap/kernel/tests/boot_test_string.rb
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/tests/boot_test_string.rb
rename to 14_virtual_mem_part2_mmio_remap/kernel/tests/boot_test_string.rb
diff --git a/14_virtual_mem_part2_mmio_remap/tests/panic_exit_success/mod.rs b/14_virtual_mem_part2_mmio_remap/kernel/tests/panic_exit_success/mod.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/tests/panic_exit_success/mod.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/tests/panic_exit_success/mod.rs
diff --git a/14_virtual_mem_part2_mmio_remap/tests/panic_wait_forever/mod.rs b/14_virtual_mem_part2_mmio_remap/kernel/tests/panic_wait_forever/mod.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/tests/panic_wait_forever/mod.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/tests/panic_wait_forever/mod.rs
diff --git a/14_virtual_mem_part2_mmio_remap/test-macros/Cargo.toml b/14_virtual_mem_part2_mmio_remap/libraries/test-macros/Cargo.toml
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/test-macros/Cargo.toml
rename to 14_virtual_mem_part2_mmio_remap/libraries/test-macros/Cargo.toml
diff --git a/14_virtual_mem_part2_mmio_remap/test-macros/src/lib.rs b/14_virtual_mem_part2_mmio_remap/libraries/test-macros/src/lib.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/test-macros/src/lib.rs
rename to 14_virtual_mem_part2_mmio_remap/libraries/test-macros/src/lib.rs
diff --git a/14_virtual_mem_part2_mmio_remap/test-types/Cargo.toml b/14_virtual_mem_part2_mmio_remap/libraries/test-types/Cargo.toml
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/test-types/Cargo.toml
rename to 14_virtual_mem_part2_mmio_remap/libraries/test-types/Cargo.toml
diff --git a/14_virtual_mem_part2_mmio_remap/test-types/src/lib.rs b/14_virtual_mem_part2_mmio_remap/libraries/test-types/src/lib.rs
similarity index 100%
rename from 14_virtual_mem_part2_mmio_remap/test-types/src/lib.rs
rename to 14_virtual_mem_part2_mmio_remap/libraries/test-types/src/lib.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/Cargo.lock b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
index 9ce8fc76f..1bac7e897 100644
--- a/15_virtual_mem_part3_precomputed_tables/Cargo.lock
+++ b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
@@ -39,9 +39,9 @@ checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
 
 [[package]]
 name = "quote"
-version = "1.0.17"
+version = "1.0.18"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "632d02bff7f874a36f33ea8bb416cd484b90cc66c1194b1a1110d067a7013f58"
+checksum = "a1feb54ed693b93a84e14094943b84b7c4eae204c512b7ccb95ab0c66d278ad1"
 dependencies = [
  "proc-macro2",
 ]
diff --git a/15_virtual_mem_part3_precomputed_tables/Cargo.toml b/15_virtual_mem_part3_precomputed_tables/Cargo.toml
index 6a41bd03d..6480a7276 100644
--- a/15_virtual_mem_part3_precomputed_tables/Cargo.toml
+++ b/15_virtual_mem_part3_precomputed_tables/Cargo.toml
@@ -1,60 +1,9 @@
-[package]
-name = "mingo"
-version = "0.15.0"
-authors = ["Andre Richter <andre.o.richter@gmail.com>"]
-edition = "2021"
+[workspace]
+
+members = [
+        "libraries/*",
+        "kernel"
+]
 
 [profile.release]
 lto = true
-
-[features]
-default = []
-bsp_rpi3 = ["tock-registers"]
-bsp_rpi4 = ["tock-registers"]
-test_build = ["qemu-exit"]
-
-##--------------------------------------------------------------------------------------------------
-## Dependencies
-##--------------------------------------------------------------------------------------------------
-
-[dependencies]
-test-types = { path = "test-types" }
-
-# Optional dependencies
-tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
-qemu-exit = { version = "3.x.x", optional = true }
-
-# Platform specific dependencies
-[target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "7.x.x" }
-
-##--------------------------------------------------------------------------------------------------
-## Testing
-##--------------------------------------------------------------------------------------------------
-
-[dev-dependencies]
-test-macros = { path = "test-macros" }
-
-# Unit tests are done in the library part of the kernel.
-[lib]
-name = "libkernel"
-test = true
-
-# Disable unit tests for the kernel binary.
-[[bin]]
-name = "kernel"
-path = "src/main.rs"
-test = false
-
-# List of tests without harness.
-[[test]]
-name = "00_console_sanity"
-harness = false
-
-[[test]]
-name = "02_exception_sync_page_fault"
-harness = false
-
-[[test]]
-name = "03_exception_restore_sanity"
-harness = false
diff --git a/15_virtual_mem_part3_precomputed_tables/Makefile b/15_virtual_mem_part3_precomputed_tables/Makefile
index a695185dc..81de6005c 100644
--- a/15_virtual_mem_part3_precomputed_tables/Makefile
+++ b/15_virtual_mem_part3_precomputed_tables/Makefile
@@ -41,7 +41,7 @@ ifeq ($(BSP),rpi3)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
-    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/kernel/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -55,7 +55,7 @@ else ifeq ($(BSP),rpi4)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
-    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/kernel/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
@@ -67,11 +67,11 @@ export LD_SCRIPT_PATH
 ##--------------------------------------------------------------------------------------------------
 ## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
+KERNEL_MANIFEST      = kernel/Cargo.toml
 KERNEL_LINKER_SCRIPT = kernel.ld
+LAST_BUILD_CONFIG    = target/$(BSP).build_config
 
-TT_TOOL_PATH = translation_table_tool
-
-LAST_BUILD_CONFIG = target/$(BSP).build_config
+TT_TOOL_PATH = tools/translation_table_tool
 
 KERNEL_ELF_RAW      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
@@ -101,11 +101,11 @@ COMPILER_ARGS = --target=$(TARGET) \
     $(FEATURES)                    \
     --release
 
-RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
+RUSTC_CMD   = cargo rustc $(COMPILER_ARGS) --manifest-path $(KERNEL_MANIFEST)
 DOC_CMD     = cargo doc $(COMPILER_ARGS)
 CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
 CHECK_CMD   = cargo check $(COMPILER_ARGS)
-TEST_CMD    = cargo test $(COMPILER_ARGS)
+TEST_CMD    = cargo test $(COMPILER_ARGS) --manifest-path $(KERNEL_MANIFEST)
 OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
     -O binary
@@ -219,6 +219,8 @@ chainboot: $(KERNEL_BIN)
 ##------------------------------------------------------------------------------
 clippy:
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD) --features test_build --tests \
+                --manifest-path $(KERNEL_MANIFEST)
 
 ##------------------------------------------------------------------------------
 ## Clean
@@ -315,6 +317,10 @@ test_boot: $(KERNEL_BIN)
 define KERNEL_TEST_RUNNER
     #!/usr/bin/env bash
 
+    # The cargo test runner seems to change into the crate under test's directory. Therefore, ensure
+    # this script executes from the root.
+    cd $(shell pwd)
+
     TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
     TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
 
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index b27571e3f..c3554f199 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -540,15 +540,15 @@ already, the only missing piece that's left is the offline computation of the tr
 
 ### The Translation Table Tool
 
-The tool for translation table computation is located in the folder `translation_table_tool` in the
-root directory. For ease of use, it is written in `Ruby` 💎. The code is organized into `BSP` and
-`arch` parts just like the kernel's `Rust` code, and also has a class for processing the kernel
-`ELF` file:
+The tool for translation table computation is located in the folder
+`$ROOT/tools/translation_table_tool`. For ease of use, it is written in `Ruby` 💎. The code is
+organized into `BSP` and `arch` parts just like the kernel's `Rust` code, and also has a class for
+processing the kernel `ELF` file:
 
 ```console
-$ tree translation_table_tool
+$ tree tools/translation_table_tool
 
-translation_table_tool
+tools/translation_table_tool
 ├── arch.rb
 ├── bsp.rb
 ├── generic.rb
@@ -568,7 +568,7 @@ In the `Makefile`, the tool is invoked after compiling and linking the kernel, a
 to the kernel's `ELF` file:
 
 ```Makefile
-TT_TOOL_PATH = translation_table_tool
+TT_TOOL_PATH = tools/translation_table_tool
 
 KERNEL_ELF_RAW      = target/$(TARGET)/release/kernel
 # [...]
@@ -796,9 +796,9 @@ Minipush 1.0
 ## Diff to previous
 ```diff
 
-diff -uNr 14_virtual_mem_part2_mmio_remap/Cargo.toml 15_virtual_mem_part3_precomputed_tables/Cargo.toml
---- 14_virtual_mem_part2_mmio_remap/Cargo.toml
-+++ 15_virtual_mem_part3_precomputed_tables/Cargo.toml
+diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/Cargo.toml 15_virtual_mem_part3_precomputed_tables/kernel/Cargo.toml
+--- 14_virtual_mem_part2_mmio_remap/kernel/Cargo.toml
++++ 15_virtual_mem_part3_precomputed_tables/kernel/Cargo.toml
 @@ -1,6 +1,6 @@
  [package]
  name = "mingo"
@@ -808,79 +808,9 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/Cargo.toml 15_virtual_mem_part3_precom
  edition = "2021"
 
 
-diff -uNr 14_virtual_mem_part2_mmio_remap/Makefile 15_virtual_mem_part3_precomputed_tables/Makefile
---- 14_virtual_mem_part2_mmio_remap/Makefile
-+++ 15_virtual_mem_part3_precomputed_tables/Makefile
-@@ -69,12 +69,19 @@
- ##--------------------------------------------------------------------------------------------------
- KERNEL_LINKER_SCRIPT = kernel.ld
-
-+TT_TOOL_PATH = translation_table_tool
-+
- LAST_BUILD_CONFIG = target/$(BSP).build_config
-
--KERNEL_ELF      = target/$(TARGET)/release/kernel
-+KERNEL_ELF_RAW      = target/$(TARGET)/release/kernel
- # This parses cargo's dep-info file.
- # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
--KERNEL_ELF_DEPS = $(filter-out modulo: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
-+KERNEL_ELF_RAW_DEPS = $(filter-out modulo: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
-+
-+KERNEL_ELF_TTABLES      = target/$(TARGET)/release/kernel+ttables
-+KERNEL_ELF_TTABLES_DEPS = $(KERNEL_ELF_RAW) $(wildcard $(TT_TOOL_PATH)/*)
-+
-+KERNEL_ELF = $(KERNEL_ELF_TTABLES)
-
-
-
-@@ -104,6 +111,7 @@
-     -O binary
-
- EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
-+EXEC_TT_TOOL       = ruby $(TT_TOOL_PATH)/main.rb
- EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
- EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
-
-@@ -154,16 +162,24 @@
- ##------------------------------------------------------------------------------
- ## Compile the kernel ELF
- ##------------------------------------------------------------------------------
--$(KERNEL_ELF): $(KERNEL_ELF_DEPS)
-+$(KERNEL_ELF_RAW): $(KERNEL_ELF_RAW_DEPS)
- 	$(call color_header, "Compiling kernel ELF - $(BSP)")
- 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
-
- ##------------------------------------------------------------------------------
-+## Precompute the kernel translation tables and patch them into the kernel ELF
-+##------------------------------------------------------------------------------
-+$(KERNEL_ELF_TTABLES): $(KERNEL_ELF_TTABLES_DEPS)
-+	$(call color_header, "Precomputing kernel translation tables and patching kernel ELF")
-+	@cp $(KERNEL_ELF_RAW) $(KERNEL_ELF_TTABLES)
-+	@$(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(BSP) $(KERNEL_ELF_TTABLES)
-+
-+##------------------------------------------------------------------------------
- ## Generate the stripped kernel binary
- ##------------------------------------------------------------------------------
--$(KERNEL_BIN): $(KERNEL_ELF)
-+$(KERNEL_BIN): $(KERNEL_ELF_TTABLES)
- 	$(call color_header, "Generating stripped binary")
--	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
-+	@$(OBJCOPY_CMD) $(KERNEL_ELF_TTABLES) $(KERNEL_BIN)
- 	$(call color_progress_prefix, "Name")
- 	@echo $(KERNEL_BIN)
- 	$(call color_progress_prefix, "Size")
-@@ -302,6 +318,7 @@
-     TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
-     TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
-
-+    $(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(BSP) $$TEST_ELF > /dev/null
-     $(OBJCOPY_CMD) $$TEST_ELF $$TEST_BINARY
-     $(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
- endef
-
-diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
---- 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs
-+++ 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
+diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.rs 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.rs
+--- 14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.rs
++++ 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.rs
 @@ -11,6 +11,7 @@
  //!
  //! crate::cpu::boot::arch_boot
@@ -908,9 +838,9 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.rs 15_virtu
      asm::eret()
  }
 
-diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.s 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.s
---- 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.s
-+++ 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.s
+diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.s 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.s
+--- 14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.s
++++ 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.s
 @@ -56,11 +56,14 @@
 
  	// Prepare the jump to Rust code.
@@ -930,9 +860,9 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/cpu/boot.s 15_virtua
 
  	// Infinitely wait for events (aka "park the core").
 
-diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs
---- 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translation_table.rs
-+++ 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs
+diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
+--- 14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
++++ 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
 @@ -125,7 +125,7 @@
  }
 
@@ -1135,9 +1065,9 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/_arch/aarch64/memory/mmu/translati
 
  //--------------------------------------------------------------------------------------------------
 
-diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/console.rs
---- 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs
-+++ 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/console.rs
+diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/console.rs 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/console.rs
+--- 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/console.rs
++++ 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/console.rs
 @@ -22,6 +22,7 @@
  /// # Safety
  ///
@@ -1194,9 +1124,9 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/console.rs 15_virt
 +    }
 +}
 
-diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/kernel.ld 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/kernel.ld
---- 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/kernel.ld
-+++ 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/kernel.ld
+diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/kernel.ld 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/kernel.ld
+--- 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/kernel.ld
++++ 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/kernel.ld
 @@ -3,6 +3,8 @@
   * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
   */
@@ -1207,15 +1137,15 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/kernel.ld 15_virtu
  PAGE_MASK = PAGE_SIZE - 1;
 
 
-diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
---- 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
-+++ 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
+diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
+--- 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
++++ 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
 @@ -0,0 +1 @@
 +__kernel_virt_addr_space_size = 1024 * 1024 * 1024
 
-diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs
---- 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs
-+++ 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs
+diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/memory/mmu.rs 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/memory/mmu.rs
+--- 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/memory/mmu.rs
++++ 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/memory/mmu.rs
 @@ -7,8 +7,8 @@
  use crate::{
      memory::{
@@ -1441,9 +1371,9 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/bsp/raspberrypi/memory/mmu.rs 15_v
 +    );
  }
 
-diff -uNr 14_virtual_mem_part2_mmio_remap/src/main.rs 15_virtual_mem_part3_precomputed_tables/src/main.rs
---- 14_virtual_mem_part2_mmio_remap/src/main.rs
-+++ 15_virtual_mem_part3_precomputed_tables/src/main.rs
+diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/main.rs 15_virtual_mem_part3_precomputed_tables/kernel/src/main.rs
+--- 14_virtual_mem_part2_mmio_remap/kernel/src/main.rs
++++ 15_virtual_mem_part3_precomputed_tables/kernel/src/main.rs
 @@ -15,31 +15,23 @@
 
  /// Early init code.
@@ -1493,9 +1423,9 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/main.rs 15_virtual_mem_part3_preco
      // Now bring up the remaining drivers.
      for i in bsp::driver::driver_manager()
 
-diff -uNr 14_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs 15_virtual_mem_part3_precomputed_tables/src/memory/mmu/translation_table.rs
---- 14_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs
-+++ 15_virtual_mem_part3_precomputed_tables/src/memory/mmu/translation_table.rs
+diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/translation_table.rs 15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/translation_table.rs
+--- 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/translation_table.rs
++++ 15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/translation_table.rs
 @@ -23,6 +23,8 @@
 
  /// Translation table interfaces.
@@ -1583,9 +1513,9 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/memory/mmu/translation_table.rs 15
      }
  }
 
-diff -uNr 14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs 15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs
---- 14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs
-+++ 15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs
+diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu.rs 15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu.rs
+--- 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu.rs
++++ 15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu.rs
 @@ -16,7 +16,8 @@
  use crate::{
      bsp,
@@ -1752,9 +1682,9 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/src/memory/mmu.rs 15_virtual_mem_part3
 -    }
 -}
 
-diff -uNr 14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs 15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rs
---- 14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs
-+++ 15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rs
+diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rs 15_virtual_mem_part3_precomputed_tables/kernel/tests/00_console_sanity.rs
+--- 14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rs
++++ 15_virtual_mem_part3_precomputed_tables/kernel/tests/00_console_sanity.rs
 @@ -11,7 +11,7 @@
  /// Console tests should time out on the I/O harness in case of panic.
  mod panic_wait_forever;
@@ -1773,9 +1703,9 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/tests/00_console_sanity.rs 15_virtual_
 
      // Handshake
 
-diff -uNr 14_virtual_mem_part2_mmio_remap/tests/01_timer_sanity.rs 15_virtual_mem_part3_precomputed_tables/tests/01_timer_sanity.rs
---- 14_virtual_mem_part2_mmio_remap/tests/01_timer_sanity.rs
-+++ 15_virtual_mem_part3_precomputed_tables/tests/01_timer_sanity.rs
+diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/01_timer_sanity.rs 15_virtual_mem_part3_precomputed_tables/kernel/tests/01_timer_sanity.rs
+--- 14_virtual_mem_part2_mmio_remap/kernel/tests/01_timer_sanity.rs
++++ 15_virtual_mem_part3_precomputed_tables/kernel/tests/01_timer_sanity.rs
 @@ -11,12 +11,13 @@
  #![test_runner(libkernel::test_runner)]
 
@@ -1792,9 +1722,9 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/tests/01_timer_sanity.rs 15_virtual_me
 
      // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
 
-diff -uNr 14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs 15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs
---- 14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
-+++ 15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs
+diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fault.rs 15_virtual_mem_part3_precomputed_tables/kernel/tests/02_exception_sync_page_fault.rs
+--- 14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fault.rs
++++ 15_virtual_mem_part3_precomputed_tables/kernel/tests/02_exception_sync_page_fault.rs
 @@ -21,40 +21,12 @@
 
  #[no_mangle]
@@ -1839,9 +1769,9 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
      info!("Writing beyond mapped area to address 9 GiB...");
      let big_addr: u64 = 9 * 1024 * 1024 * 1024;
 
-diff -uNr 14_virtual_mem_part2_mmio_remap/tests/03_exception_restore_sanity.rs 15_virtual_mem_part3_precomputed_tables/tests/03_exception_restore_sanity.rs
---- 14_virtual_mem_part2_mmio_remap/tests/03_exception_restore_sanity.rs
-+++ 15_virtual_mem_part3_precomputed_tables/tests/03_exception_restore_sanity.rs
+diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rs 15_virtual_mem_part3_precomputed_tables/kernel/tests/03_exception_restore_sanity.rs
+--- 14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rs
++++ 15_virtual_mem_part3_precomputed_tables/kernel/tests/03_exception_restore_sanity.rs
 @@ -30,40 +30,12 @@
 
  #[no_mangle]
@@ -1886,9 +1816,9 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/tests/03_exception_restore_sanity.rs 1
      info!("Making a dummy system call");
 
 
-diff -uNr 14_virtual_mem_part2_mmio_remap/tests/04_exception_irq_sanity.rs 15_virtual_mem_part3_precomputed_tables/tests/04_exception_irq_sanity.rs
---- 14_virtual_mem_part2_mmio_remap/tests/04_exception_irq_sanity.rs
-+++ 15_virtual_mem_part3_precomputed_tables/tests/04_exception_irq_sanity.rs
+diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.rs 15_virtual_mem_part3_precomputed_tables/kernel/tests/04_exception_irq_sanity.rs
+--- 14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.rs
++++ 15_virtual_mem_part3_precomputed_tables/kernel/tests/04_exception_irq_sanity.rs
 @@ -10,11 +10,12 @@
  #![reexport_test_harness_main = "test_main"]
  #![test_runner(libkernel::test_runner)]
@@ -1904,9 +1834,77 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/tests/04_exception_irq_sanity.rs 15_vi
 
      exception::handling_init();
 
-diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/arch.rb 15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb
---- 14_virtual_mem_part2_mmio_remap/translation_table_tool/arch.rb
-+++ 15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb
+diff -uNr 14_virtual_mem_part2_mmio_remap/Makefile 15_virtual_mem_part3_precomputed_tables/Makefile
+--- 14_virtual_mem_part2_mmio_remap/Makefile
++++ 15_virtual_mem_part3_precomputed_tables/Makefile
+@@ -71,10 +71,17 @@
+ KERNEL_LINKER_SCRIPT = kernel.ld
+ LAST_BUILD_CONFIG    = target/$(BSP).build_config
+
+-KERNEL_ELF      = target/$(TARGET)/release/kernel
++TT_TOOL_PATH = tools/translation_table_tool
++
++KERNEL_ELF_RAW      = target/$(TARGET)/release/kernel
+ # This parses cargo's dep-info file.
+ # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
+-KERNEL_ELF_DEPS = $(filter-out modulo: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
++KERNEL_ELF_RAW_DEPS = $(filter-out modulo: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
++
++KERNEL_ELF_TTABLES      = target/$(TARGET)/release/kernel+ttables
++KERNEL_ELF_TTABLES_DEPS = $(KERNEL_ELF_RAW) $(wildcard $(TT_TOOL_PATH)/*)
++
++KERNEL_ELF = $(KERNEL_ELF_TTABLES)
+
+
+
+@@ -104,6 +111,7 @@
+     -O binary
+
+ EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
++EXEC_TT_TOOL       = ruby $(TT_TOOL_PATH)/main.rb
+ EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
+ EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
+
+@@ -154,16 +162,24 @@
+ ##------------------------------------------------------------------------------
+ ## Compile the kernel ELF
+ ##------------------------------------------------------------------------------
+-$(KERNEL_ELF): $(KERNEL_ELF_DEPS)
++$(KERNEL_ELF_RAW): $(KERNEL_ELF_RAW_DEPS)
+ 	$(call color_header, "Compiling kernel ELF - $(BSP)")
+ 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
+
+ ##------------------------------------------------------------------------------
++## Precompute the kernel translation tables and patch them into the kernel ELF
++##------------------------------------------------------------------------------
++$(KERNEL_ELF_TTABLES): $(KERNEL_ELF_TTABLES_DEPS)
++	$(call color_header, "Precomputing kernel translation tables and patching kernel ELF")
++	@cp $(KERNEL_ELF_RAW) $(KERNEL_ELF_TTABLES)
++	@$(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(BSP) $(KERNEL_ELF_TTABLES)
++
++##------------------------------------------------------------------------------
+ ## Generate the stripped kernel binary
+ ##------------------------------------------------------------------------------
+-$(KERNEL_BIN): $(KERNEL_ELF)
++$(KERNEL_BIN): $(KERNEL_ELF_TTABLES)
+ 	$(call color_header, "Generating stripped binary")
+-	@$(OBJCOPY_CMD) $(KERNEL_ELF) $(KERNEL_BIN)
++	@$(OBJCOPY_CMD) $(KERNEL_ELF_TTABLES) $(KERNEL_BIN)
+ 	$(call color_progress_prefix, "Name")
+ 	@echo $(KERNEL_BIN)
+ 	$(call color_progress_prefix, "Size")
+@@ -308,6 +324,7 @@
+     TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
+     TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
+
++    $(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(BSP) $$TEST_ELF > /dev/null
+     $(OBJCOPY_CMD) $$TEST_ELF $$TEST_BINARY
+     $(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
+ endef
+
+diff -uNr 14_virtual_mem_part2_mmio_remap/tools/translation_table_tool/arch.rb 15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/arch.rb
+--- 14_virtual_mem_part2_mmio_remap/tools/translation_table_tool/arch.rb
++++ 15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/arch.rb
 @@ -0,0 +1,312 @@
 +# frozen_string_literal: true
 +
@@ -2221,9 +2219,9 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/arch.rb 15_virt
 +end
 +end
 
-diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/bsp.rb 15_virtual_mem_part3_precomputed_tables/translation_table_tool/bsp.rb
---- 14_virtual_mem_part2_mmio_remap/translation_table_tool/bsp.rb
-+++ 15_virtual_mem_part3_precomputed_tables/translation_table_tool/bsp.rb
+diff -uNr 14_virtual_mem_part2_mmio_remap/tools/translation_table_tool/bsp.rb 15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/bsp.rb
+--- 14_virtual_mem_part2_mmio_remap/tools/translation_table_tool/bsp.rb
++++ 15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/bsp.rb
 @@ -0,0 +1,49 @@
 +# frozen_string_literal: true
 +
@@ -2235,7 +2233,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/bsp.rb 15_virtu
 +class RaspberryPi
 +    attr_reader :kernel_granule, :kernel_virt_addr_space_size
 +
-+    MEMORY_SRC = File.read('src/bsp/raspberrypi/memory.rs').split("\n")
++    MEMORY_SRC = File.read('kernel/src/bsp/raspberrypi/memory.rs').split("\n")
 +
 +    def initialize
 +        @kernel_granule = Granule64KiB
@@ -2275,9 +2273,9 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/bsp.rb 15_virtu
 +    end
 +end
 
-diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/generic.rb 15_virtual_mem_part3_precomputed_tables/translation_table_tool/generic.rb
---- 14_virtual_mem_part2_mmio_remap/translation_table_tool/generic.rb
-+++ 15_virtual_mem_part3_precomputed_tables/translation_table_tool/generic.rb
+diff -uNr 14_virtual_mem_part2_mmio_remap/tools/translation_table_tool/generic.rb 15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/generic.rb
+--- 14_virtual_mem_part2_mmio_remap/tools/translation_table_tool/generic.rb
++++ 15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/generic.rb
 @@ -0,0 +1,179 @@
 +# frozen_string_literal: true
 +
@@ -2459,9 +2457,9 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/generic.rb 15_v
 +                  BSP.phys_kernel_tables_base_addr_offset_in_file)
 +end
 
-diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/kernel_elf.rb 15_virtual_mem_part3_precomputed_tables/translation_table_tool/kernel_elf.rb
---- 14_virtual_mem_part2_mmio_remap/translation_table_tool/kernel_elf.rb
-+++ 15_virtual_mem_part3_precomputed_tables/translation_table_tool/kernel_elf.rb
+diff -uNr 14_virtual_mem_part2_mmio_remap/tools/translation_table_tool/kernel_elf.rb 15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/kernel_elf.rb
+--- 14_virtual_mem_part2_mmio_remap/tools/translation_table_tool/kernel_elf.rb
++++ 15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/kernel_elf.rb
 @@ -0,0 +1,96 @@
 +# frozen_string_literal: true
 +
@@ -2560,9 +2558,9 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/kernel_elf.rb 1
 +    end
 +end
 
-diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/main.rb 15_virtual_mem_part3_precomputed_tables/translation_table_tool/main.rb
---- 14_virtual_mem_part2_mmio_remap/translation_table_tool/main.rb
-+++ 15_virtual_mem_part3_precomputed_tables/translation_table_tool/main.rb
+diff -uNr 14_virtual_mem_part2_mmio_remap/tools/translation_table_tool/main.rb 15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/main.rb
+--- 14_virtual_mem_part2_mmio_remap/tools/translation_table_tool/main.rb
++++ 15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/main.rb
 @@ -0,0 +1,46 @@
 +#!/usr/bin/env ruby
 +# frozen_string_literal: true
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/Cargo.toml b/15_virtual_mem_part3_precomputed_tables/kernel/Cargo.toml
new file mode 100644
index 000000000..0d675c935
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/Cargo.toml
@@ -0,0 +1,58 @@
+[package]
+name = "mingo"
+version = "0.15.0"
+authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+edition = "2021"
+
+
+[features]
+default = []
+bsp_rpi3 = ["tock-registers"]
+bsp_rpi4 = ["tock-registers"]
+test_build = ["qemu-exit"]
+
+##--------------------------------------------------------------------------------------------------
+## Dependencies
+##--------------------------------------------------------------------------------------------------
+
+[dependencies]
+test-types = { path = "../libraries/test-types" }
+
+# Optional dependencies
+tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
+qemu-exit = { version = "3.x.x", optional = true }
+
+# Platform specific dependencies
+[target.'cfg(target_arch = "aarch64")'.dependencies]
+cortex-a = { version = "7.x.x" }
+
+##--------------------------------------------------------------------------------------------------
+## Testing
+##--------------------------------------------------------------------------------------------------
+
+[dev-dependencies]
+test-macros = { path = "../libraries/test-macros" }
+
+# Unit tests are done in the library part of the kernel.
+[lib]
+name = "libkernel"
+test = true
+
+# Disable unit tests for the kernel binary.
+[[bin]]
+name = "kernel"
+path = "src/main.rs"
+test = false
+
+# List of tests without harness.
+[[test]]
+name = "00_console_sanity"
+harness = false
+
+[[test]]
+name = "02_exception_sync_page_fault"
+harness = false
+
+[[test]]
+name = "03_exception_restore_sanity"
+harness = false
diff --git a/15_virtual_mem_part3_precomputed_tables/build.rs b/15_virtual_mem_part3_precomputed_tables/kernel/build.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/build.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/build.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.s b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.s
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.s
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.s
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/smp.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/smp.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/smp.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/smp.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.s b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception.s
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception.s
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception.s
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception/asynchronous.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception/asynchronous.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/exception/asynchronous.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception/asynchronous.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/memory/mmu.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/memory/mmu.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/time.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/time.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/time.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/time.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/bsp.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2/gicc.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2/gicc.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2/gicd.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/arm/gicv2/gicd.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/common.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/common.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/bsp/device_driver/common.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/common.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/console.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/console.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/console.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/console.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/cpu.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/cpu.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/cpu.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/cpu.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/driver.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/driver.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/driver.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/driver.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/exception.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/exception.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/exception.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/exception.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/exception/asynchronous.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/exception/asynchronous.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/kernel.ld b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/kernel.ld
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/kernel.ld
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/kernel.ld
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/memory.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/memory.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/memory/mmu.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/memory/mmu.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/common.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/common.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/common.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/common.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/console.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/console.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/console.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/console.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/cpu.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/cpu.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/cpu.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/cpu.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/cpu/boot.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/cpu/boot.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/cpu/boot.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/cpu/boot.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/cpu/smp.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/cpu/smp.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/cpu/smp.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/cpu/smp.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/driver.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/driver.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/driver.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/driver.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/exception.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/exception.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/exception.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/exception.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/exception/asynchronous.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/exception/asynchronous.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/exception/asynchronous.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/exception/asynchronous.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/lib.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/lib.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/main.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/main.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/main.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/main.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/memory.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/memory.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/alloc.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/alloc.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/memory/mmu/alloc.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/alloc.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/mapping_record.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/mapping_record.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/memory/mmu/mapping_record.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/mapping_record.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/translation_table.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/translation_table.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/memory/mmu/translation_table.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/translation_table.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/types.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/types.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/panic_wait.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/panic_wait.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/panic_wait.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/panic_wait.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/print.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/print.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/print.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/print.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/state.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/state.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/state.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/state.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/synchronization.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/synchronization.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/synchronization.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/synchronization.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/src/time.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/time.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/src/time.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/time.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rb b/15_virtual_mem_part3_precomputed_tables/kernel/tests/00_console_sanity.rb
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rb
rename to 15_virtual_mem_part3_precomputed_tables/kernel/tests/00_console_sanity.rb
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rs b/15_virtual_mem_part3_precomputed_tables/kernel/tests/00_console_sanity.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/tests/00_console_sanity.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/tests/00_console_sanity.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/01_timer_sanity.rs b/15_virtual_mem_part3_precomputed_tables/kernel/tests/01_timer_sanity.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/tests/01_timer_sanity.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/tests/01_timer_sanity.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs b/15_virtual_mem_part3_precomputed_tables/kernel/tests/02_exception_sync_page_fault.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/tests/02_exception_sync_page_fault.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/03_exception_restore_sanity.rb b/15_virtual_mem_part3_precomputed_tables/kernel/tests/03_exception_restore_sanity.rb
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/tests/03_exception_restore_sanity.rb
rename to 15_virtual_mem_part3_precomputed_tables/kernel/tests/03_exception_restore_sanity.rb
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/03_exception_restore_sanity.rs b/15_virtual_mem_part3_precomputed_tables/kernel/tests/03_exception_restore_sanity.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/tests/03_exception_restore_sanity.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/tests/03_exception_restore_sanity.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/04_exception_irq_sanity.rs b/15_virtual_mem_part3_precomputed_tables/kernel/tests/04_exception_irq_sanity.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/tests/04_exception_irq_sanity.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/tests/04_exception_irq_sanity.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/boot_test_string.rb b/15_virtual_mem_part3_precomputed_tables/kernel/tests/boot_test_string.rb
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/tests/boot_test_string.rb
rename to 15_virtual_mem_part3_precomputed_tables/kernel/tests/boot_test_string.rb
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/panic_exit_success/mod.rs b/15_virtual_mem_part3_precomputed_tables/kernel/tests/panic_exit_success/mod.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/tests/panic_exit_success/mod.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/tests/panic_exit_success/mod.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/tests/panic_wait_forever/mod.rs b/15_virtual_mem_part3_precomputed_tables/kernel/tests/panic_wait_forever/mod.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/tests/panic_wait_forever/mod.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/tests/panic_wait_forever/mod.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/test-macros/Cargo.toml b/15_virtual_mem_part3_precomputed_tables/libraries/test-macros/Cargo.toml
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/test-macros/Cargo.toml
rename to 15_virtual_mem_part3_precomputed_tables/libraries/test-macros/Cargo.toml
diff --git a/15_virtual_mem_part3_precomputed_tables/test-macros/src/lib.rs b/15_virtual_mem_part3_precomputed_tables/libraries/test-macros/src/lib.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/test-macros/src/lib.rs
rename to 15_virtual_mem_part3_precomputed_tables/libraries/test-macros/src/lib.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/test-types/Cargo.toml b/15_virtual_mem_part3_precomputed_tables/libraries/test-types/Cargo.toml
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/test-types/Cargo.toml
rename to 15_virtual_mem_part3_precomputed_tables/libraries/test-types/Cargo.toml
diff --git a/15_virtual_mem_part3_precomputed_tables/test-types/src/lib.rs b/15_virtual_mem_part3_precomputed_tables/libraries/test-types/src/lib.rs
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/test-types/src/lib.rs
rename to 15_virtual_mem_part3_precomputed_tables/libraries/test-types/src/lib.rs
diff --git a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb b/15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/arch.rb
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb
rename to 15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/arch.rb
diff --git a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/bsp.rb b/15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/bsp.rb
similarity index 94%
rename from 15_virtual_mem_part3_precomputed_tables/translation_table_tool/bsp.rb
rename to 15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/bsp.rb
index 4aaedaf73..0b76b403b 100644
--- a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/bsp.rb
+++ b/15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/bsp.rb
@@ -8,7 +8,7 @@
 class RaspberryPi
     attr_reader :kernel_granule, :kernel_virt_addr_space_size
 
-    MEMORY_SRC = File.read('src/bsp/raspberrypi/memory.rs').split("\n")
+    MEMORY_SRC = File.read('kernel/src/bsp/raspberrypi/memory.rs').split("\n")
 
     def initialize
         @kernel_granule = Granule64KiB
diff --git a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/generic.rb b/15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/generic.rb
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/translation_table_tool/generic.rb
rename to 15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/generic.rb
diff --git a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/kernel_elf.rb b/15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/kernel_elf.rb
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/translation_table_tool/kernel_elf.rb
rename to 15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/kernel_elf.rb
diff --git a/15_virtual_mem_part3_precomputed_tables/translation_table_tool/main.rb b/15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/main.rb
similarity index 100%
rename from 15_virtual_mem_part3_precomputed_tables/translation_table_tool/main.rb
rename to 15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/main.rb
diff --git a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
index af4081afc..7a24ae092 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
+++ b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
@@ -39,9 +39,9 @@ checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
 
 [[package]]
 name = "quote"
-version = "1.0.17"
+version = "1.0.18"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "632d02bff7f874a36f33ea8bb416cd484b90cc66c1194b1a1110d067a7013f58"
+checksum = "a1feb54ed693b93a84e14094943b84b7c4eae204c512b7ccb95ab0c66d278ad1"
 dependencies = [
  "proc-macro2",
 ]
diff --git a/16_virtual_mem_part4_higher_half_kernel/Cargo.toml b/16_virtual_mem_part4_higher_half_kernel/Cargo.toml
index 4964df472..6480a7276 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Cargo.toml
+++ b/16_virtual_mem_part4_higher_half_kernel/Cargo.toml
@@ -1,60 +1,9 @@
-[package]
-name = "mingo"
-version = "0.16.0"
-authors = ["Andre Richter <andre.o.richter@gmail.com>"]
-edition = "2021"
+[workspace]
+
+members = [
+        "libraries/*",
+        "kernel"
+]
 
 [profile.release]
 lto = true
-
-[features]
-default = []
-bsp_rpi3 = ["tock-registers"]
-bsp_rpi4 = ["tock-registers"]
-test_build = ["qemu-exit"]
-
-##--------------------------------------------------------------------------------------------------
-## Dependencies
-##--------------------------------------------------------------------------------------------------
-
-[dependencies]
-test-types = { path = "test-types" }
-
-# Optional dependencies
-tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
-qemu-exit = { version = "3.x.x", optional = true }
-
-# Platform specific dependencies
-[target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "7.x.x" }
-
-##--------------------------------------------------------------------------------------------------
-## Testing
-##--------------------------------------------------------------------------------------------------
-
-[dev-dependencies]
-test-macros = { path = "test-macros" }
-
-# Unit tests are done in the library part of the kernel.
-[lib]
-name = "libkernel"
-test = true
-
-# Disable unit tests for the kernel binary.
-[[bin]]
-name = "kernel"
-path = "src/main.rs"
-test = false
-
-# List of tests without harness.
-[[test]]
-name = "00_console_sanity"
-harness = false
-
-[[test]]
-name = "02_exception_sync_page_fault"
-harness = false
-
-[[test]]
-name = "03_exception_restore_sanity"
-harness = false
diff --git a/16_virtual_mem_part4_higher_half_kernel/Makefile b/16_virtual_mem_part4_higher_half_kernel/Makefile
index a695185dc..81de6005c 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Makefile
+++ b/16_virtual_mem_part4_higher_half_kernel/Makefile
@@ -41,7 +41,7 @@ ifeq ($(BSP),rpi3)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
-    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/kernel/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
@@ -55,7 +55,7 @@ else ifeq ($(BSP),rpi4)
     READELF_BINARY    = aarch64-none-elf-readelf
     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
-    LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
+    LD_SCRIPT_PATH    = $(shell pwd)/kernel/src/bsp/raspberrypi
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
 endif
 
@@ -67,11 +67,11 @@ export LD_SCRIPT_PATH
 ##--------------------------------------------------------------------------------------------------
 ## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
+KERNEL_MANIFEST      = kernel/Cargo.toml
 KERNEL_LINKER_SCRIPT = kernel.ld
+LAST_BUILD_CONFIG    = target/$(BSP).build_config
 
-TT_TOOL_PATH = translation_table_tool
-
-LAST_BUILD_CONFIG = target/$(BSP).build_config
+TT_TOOL_PATH = tools/translation_table_tool
 
 KERNEL_ELF_RAW      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
@@ -101,11 +101,11 @@ COMPILER_ARGS = --target=$(TARGET) \
     $(FEATURES)                    \
     --release
 
-RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
+RUSTC_CMD   = cargo rustc $(COMPILER_ARGS) --manifest-path $(KERNEL_MANIFEST)
 DOC_CMD     = cargo doc $(COMPILER_ARGS)
 CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
 CHECK_CMD   = cargo check $(COMPILER_ARGS)
-TEST_CMD    = cargo test $(COMPILER_ARGS)
+TEST_CMD    = cargo test $(COMPILER_ARGS) --manifest-path $(KERNEL_MANIFEST)
 OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
     -O binary
@@ -219,6 +219,8 @@ chainboot: $(KERNEL_BIN)
 ##------------------------------------------------------------------------------
 clippy:
 	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD) --features test_build --tests \
+                --manifest-path $(KERNEL_MANIFEST)
 
 ##------------------------------------------------------------------------------
 ## Clean
@@ -315,6 +317,10 @@ test_boot: $(KERNEL_BIN)
 define KERNEL_TEST_RUNNER
     #!/usr/bin/env bash
 
+    # The cargo test runner seems to change into the crate under test's directory. Therefore, ensure
+    # this script executes from the root.
+    cd $(shell pwd)
+
     TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
     TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/README.md b/16_virtual_mem_part4_higher_half_kernel/README.md
index 0c45e3ec9..89f650a37 100644
--- a/16_virtual_mem_part4_higher_half_kernel/README.md
+++ b/16_virtual_mem_part4_higher_half_kernel/README.md
@@ -78,8 +78,8 @@ type KernelTranslationTable =
 
 ### Linking Changes
 
-In the `link.ld` linker script, we define a new symbol `__kernel_virt_start_addr` now, which is the
-start address of the kernel's virtual address space, calculated as `(u64::MAX -
+In the `kernel.ld` linker script, we define a new symbol `__kernel_virt_start_addr` now, which is
+the start address of the kernel's virtual address space, calculated as `(u64::MAX -
 __kernel_virt_addr_space_size) + 1`. Before the first section definition, we set the linker script's
 location counter to this address:
 
@@ -325,9 +325,9 @@ Minipush 1.0
 ## Diff to previous
 ```diff
 
-diff -uNr 15_virtual_mem_part3_precomputed_tables/Cargo.toml 16_virtual_mem_part4_higher_half_kernel/Cargo.toml
---- 15_virtual_mem_part3_precomputed_tables/Cargo.toml
-+++ 16_virtual_mem_part4_higher_half_kernel/Cargo.toml
+diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/Cargo.toml 16_virtual_mem_part4_higher_half_kernel/kernel/Cargo.toml
+--- 15_virtual_mem_part3_precomputed_tables/kernel/Cargo.toml
++++ 16_virtual_mem_part4_higher_half_kernel/kernel/Cargo.toml
 @@ -1,6 +1,6 @@
  [package]
  name = "mingo"
@@ -337,9 +337,9 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/Cargo.toml 16_virtual_mem_part
  edition = "2021"
 
 
-diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs
---- 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
-+++ 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs
+diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.rs 16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.rs
+--- 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.rs
++++ 16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.rs
 @@ -30,7 +30,10 @@
  /// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
  /// - The HW state of EL1 must be prepared in a sound way.
@@ -390,9 +390,9 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.rs
      asm::eret()
  }
 
-diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.s 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.s
---- 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.s
-+++ 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.s
+diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.s 16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.s
+--- 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.s
++++ 16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.s
 @@ -18,6 +18,18 @@
  	add	\register, \register, #:lo12:\symbol
  .endm
@@ -441,9 +441,9 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/cpu/boot.s 1
 
  	// Infinitely wait for events (aka "park the core").
 
-diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
---- 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/translation_table.rs
-+++ 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
+diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs 16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
+--- 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
++++ 16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
 @@ -136,7 +136,7 @@
  /// aligned, so the lvl3 is put first.
  #[repr(C)]
@@ -515,9 +515,9 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu/t
  #[cfg(test)]
  mod tests {
 
-diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu.rs 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu.rs
---- 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu.rs
-+++ 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu.rs
+diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/memory/mmu.rs 16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/memory/mmu.rs
+--- 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/memory/mmu.rs
++++ 16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/memory/mmu.rs
 @@ -66,6 +66,7 @@
 
  impl MemoryManagementUnit {
@@ -568,9 +568,9 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/_arch/aarch64/memory/mmu.r
          self.configure_translation_control();
 
 
-diff -uNr 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/console.rs 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/console.rs
---- 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/console.rs
-+++ 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/console.rs
+diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/console.rs 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/console.rs
+--- 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/console.rs
++++ 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/console.rs
 @@ -4,7 +4,6 @@
 
  //! BSP console facilities.
@@ -638,9 +638,9 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/console.rs
 
      panic_uart
 
-diff -uNr 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/kernel.ld 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/kernel.ld
---- 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/kernel.ld
-+++ 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/kernel.ld
+diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/kernel.ld 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/kernel.ld
+--- 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/kernel.ld
++++ 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/kernel.ld
 @@ -8,6 +8,13 @@
  PAGE_SIZE = 64K;
  PAGE_MASK = PAGE_SIZE - 1;
@@ -719,9 +719,9 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/kernel.ld
 +    ASSERT((. & PAGE_MASK) == 0, "End of boot core stack is not page aligned")
  }
 
-diff -uNr 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs
---- 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu.rs
-+++ 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs
+diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/memory/mmu.rs 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/memory/mmu.rs
+--- 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/memory/mmu.rs
++++ 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/memory/mmu.rs
 @@ -20,7 +20,7 @@
  //--------------------------------------------------------------------------------------------------
 
@@ -760,9 +760,9 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory/mmu
 +    );
  }
 
-diff -uNr 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory.rs 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory.rs
---- 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory.rs
-+++ 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory.rs
+diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/memory.rs 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/memory.rs
+--- 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/memory.rs
++++ 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/memory.rs
 @@ -37,13 +37,7 @@
  //! The virtual memory layout is as follows:
  //!
@@ -796,9 +796,9 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/bsp/raspberrypi/memory.rs
  pub mod mmu;
 
 
-diff -uNr 15_virtual_mem_part3_precomputed_tables/src/lib.rs 16_virtual_mem_part4_higher_half_kernel/src/lib.rs
---- 15_virtual_mem_part3_precomputed_tables/src/lib.rs
-+++ 16_virtual_mem_part4_higher_half_kernel/src/lib.rs
+diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs 16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
+--- 15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs
++++ 16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
 @@ -150,11 +150,6 @@
      )
  }
@@ -812,9 +812,9 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/lib.rs 16_virtual_mem_part
  // Testing
  //--------------------------------------------------------------------------------------------------
 
-diff -uNr 15_virtual_mem_part3_precomputed_tables/src/memory/mmu/translation_table.rs 16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/translation_table.rs
---- 15_virtual_mem_part3_precomputed_tables/src/memory/mmu/translation_table.rs
-+++ 16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/translation_table.rs
+diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/translation_table.rs 16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/translation_table.rs
+--- 15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/translation_table.rs
++++ 16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/translation_table.rs
 @@ -99,9 +99,9 @@
 
          assert!(tables.init().is_ok());
@@ -838,9 +838,9 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/memory/mmu/translation_tab
          );
 
 
-diff -uNr 15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs 16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/types.rs
---- 15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs
-+++ 16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/types.rs
+diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/types.rs 16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/types.rs
+--- 15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/types.rs
++++ 16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/types.rs
 @@ -67,6 +67,11 @@
  // PageAddress
  //------------------------------------------------------------------------------
@@ -854,9 +854,9 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/memory/mmu/types.rs 16_vir
      pub fn into_inner(self) -> Address<ATYPE> {
          self.inner
 
-diff -uNr 15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs 16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs
---- 15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs
-+++ 16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs
+diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu.rs 16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu.rs
+--- 15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu.rs
++++ 16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu.rs
 @@ -66,6 +66,11 @@
  pub trait AssociatedTranslationTable {
      /// A translation table whose address range is:
@@ -870,9 +870,9 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/src/memory/mmu.rs 16_virtual_m
      type TableStartFromBottom;
  }
 
-diff -uNr 15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs 16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs
---- 15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_fault.rs
-+++ 16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs
+diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/tests/02_exception_sync_page_fault.rs 16_virtual_mem_part4_higher_half_kernel/kernel/tests/02_exception_sync_page_fault.rs
+--- 15_virtual_mem_part3_precomputed_tables/kernel/tests/02_exception_sync_page_fault.rs
++++ 16_virtual_mem_part4_higher_half_kernel/kernel/tests/02_exception_sync_page_fault.rs
 @@ -28,8 +28,8 @@
      // This line will be printed as the test header.
      println!("Testing synchronous exception handling by causing a page fault");
@@ -885,9 +885,9 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/tests/02_exception_sync_page_f
 
      // If execution reaches here, the memory access above did not cause a page fault exception.
 
-diff -uNr 15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb 16_virtual_mem_part4_higher_half_kernel/translation_table_tool/arch.rb
---- 15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb
-+++ 16_virtual_mem_part4_higher_half_kernel/translation_table_tool/arch.rb
+diff -uNr 15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/arch.rb 16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/arch.rb
+--- 15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/arch.rb
++++ 16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/arch.rb
 @@ -255,6 +255,8 @@
      end
 
@@ -898,9 +898,9 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb
          lvl3_index = (addr & Granule512MiB::MASK) >> Granule64KiB::SHIFT
 
 
-diff -uNr 15_virtual_mem_part3_precomputed_tables/translation_table_tool/bsp.rb 16_virtual_mem_part4_higher_half_kernel/translation_table_tool/bsp.rb
---- 15_virtual_mem_part3_precomputed_tables/translation_table_tool/bsp.rb
-+++ 16_virtual_mem_part4_higher_half_kernel/translation_table_tool/bsp.rb
+diff -uNr 15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/bsp.rb 16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/bsp.rb
+--- 15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/bsp.rb
++++ 16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/bsp.rb
 @@ -6,7 +6,7 @@
 
  # Raspberry Pi 3 + 4
@@ -908,7 +908,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/translation_table_tool/bsp.rb
 -    attr_reader :kernel_granule, :kernel_virt_addr_space_size
 +    attr_reader :kernel_granule, :kernel_virt_addr_space_size, :kernel_virt_start_addr
 
-     MEMORY_SRC = File.read('src/bsp/raspberrypi/memory.rs').split("\n")
+     MEMORY_SRC = File.read('kernel/src/bsp/raspberrypi/memory.rs').split("\n")
 
 @@ -14,6 +14,7 @@
          @kernel_granule = Granule64KiB
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/Cargo.toml b/16_virtual_mem_part4_higher_half_kernel/kernel/Cargo.toml
new file mode 100644
index 000000000..d58c2f095
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/Cargo.toml
@@ -0,0 +1,58 @@
+[package]
+name = "mingo"
+version = "0.16.0"
+authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+edition = "2021"
+
+
+[features]
+default = []
+bsp_rpi3 = ["tock-registers"]
+bsp_rpi4 = ["tock-registers"]
+test_build = ["qemu-exit"]
+
+##--------------------------------------------------------------------------------------------------
+## Dependencies
+##--------------------------------------------------------------------------------------------------
+
+[dependencies]
+test-types = { path = "../libraries/test-types" }
+
+# Optional dependencies
+tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
+qemu-exit = { version = "3.x.x", optional = true }
+
+# Platform specific dependencies
+[target.'cfg(target_arch = "aarch64")'.dependencies]
+cortex-a = { version = "7.x.x" }
+
+##--------------------------------------------------------------------------------------------------
+## Testing
+##--------------------------------------------------------------------------------------------------
+
+[dev-dependencies]
+test-macros = { path = "../libraries/test-macros" }
+
+# Unit tests are done in the library part of the kernel.
+[lib]
+name = "libkernel"
+test = true
+
+# Disable unit tests for the kernel binary.
+[[bin]]
+name = "kernel"
+path = "src/main.rs"
+test = false
+
+# List of tests without harness.
+[[test]]
+name = "00_console_sanity"
+harness = false
+
+[[test]]
+name = "02_exception_sync_page_fault"
+harness = false
+
+[[test]]
+name = "03_exception_restore_sanity"
+harness = false
diff --git a/16_virtual_mem_part4_higher_half_kernel/build.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/build.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/build.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/build.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.s b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.s
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/boot.s
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.s
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/smp.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/smp.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/cpu/smp.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/smp.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.s b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception.s
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception.s
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception.s
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception/asynchronous.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception/asynchronous.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/exception/asynchronous.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception/asynchronous.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/memory/mmu.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/memory/mmu.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/time.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/time.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/_arch/aarch64/time.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/time.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/bsp.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2/gicc.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2/gicd.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/common.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/common.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/bsp/device_driver/common.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/common.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/console.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/console.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/console.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/console.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/cpu.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/cpu.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/cpu.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/cpu.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/driver.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/driver.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/driver.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/driver.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/exception.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/exception.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/exception.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/exception.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/exception/asynchronous.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/exception/asynchronous.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/kernel.ld b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/kernel.ld
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/kernel.ld
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/kernel.ld
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/memory.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/memory.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/memory/mmu.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/bsp/raspberrypi/memory/mmu.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/memory/mmu.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/common.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/common.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/common.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/common.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/console.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/console.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/console.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/console.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/cpu.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/cpu.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/cpu.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/cpu.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/cpu/boot.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/cpu/boot.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/cpu/boot.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/cpu/boot.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/cpu/smp.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/cpu/smp.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/cpu/smp.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/cpu/smp.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/driver.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/driver.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/driver.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/driver.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/exception.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/exception.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/exception.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/exception/asynchronous.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception/asynchronous.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/exception/asynchronous.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/exception/asynchronous.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/lib.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/lib.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/main.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/main.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/main.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/main.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/memory.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/memory.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/memory/mmu.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/alloc.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/alloc.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/alloc.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/alloc.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/mapping_record.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/mapping_record.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/mapping_record.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/mapping_record.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/translation_table.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/translation_table.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/translation_table.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/translation_table.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/types.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/types.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/memory/mmu/types.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/types.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/panic_wait.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/panic_wait.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/panic_wait.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/panic_wait.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/print.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/print.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/print.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/print.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/state.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/state.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/state.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/state.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/synchronization.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/synchronization.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/synchronization.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/synchronization.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/src/time.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/time.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/src/time.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/time.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rb b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/00_console_sanity.rb
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rb
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/tests/00_console_sanity.rb
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/00_console_sanity.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/tests/00_console_sanity.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/tests/00_console_sanity.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/01_timer_sanity.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/01_timer_sanity.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/tests/01_timer_sanity.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/tests/01_timer_sanity.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/02_exception_sync_page_fault.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/tests/02_exception_sync_page_fault.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/tests/02_exception_sync_page_fault.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/03_exception_restore_sanity.rb b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/03_exception_restore_sanity.rb
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/tests/03_exception_restore_sanity.rb
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/tests/03_exception_restore_sanity.rb
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/03_exception_restore_sanity.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/03_exception_restore_sanity.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/tests/03_exception_restore_sanity.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/tests/03_exception_restore_sanity.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/04_exception_irq_sanity.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/04_exception_irq_sanity.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/tests/04_exception_irq_sanity.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/tests/04_exception_irq_sanity.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/boot_test_string.rb b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/boot_test_string.rb
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/tests/boot_test_string.rb
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/tests/boot_test_string.rb
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/panic_exit_success/mod.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/panic_exit_success/mod.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/tests/panic_exit_success/mod.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/tests/panic_exit_success/mod.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/tests/panic_wait_forever/mod.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/panic_wait_forever/mod.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/tests/panic_wait_forever/mod.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/tests/panic_wait_forever/mod.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/test-macros/Cargo.toml b/16_virtual_mem_part4_higher_half_kernel/libraries/test-macros/Cargo.toml
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/test-macros/Cargo.toml
rename to 16_virtual_mem_part4_higher_half_kernel/libraries/test-macros/Cargo.toml
diff --git a/16_virtual_mem_part4_higher_half_kernel/test-macros/src/lib.rs b/16_virtual_mem_part4_higher_half_kernel/libraries/test-macros/src/lib.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/test-macros/src/lib.rs
rename to 16_virtual_mem_part4_higher_half_kernel/libraries/test-macros/src/lib.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/test-types/Cargo.toml b/16_virtual_mem_part4_higher_half_kernel/libraries/test-types/Cargo.toml
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/test-types/Cargo.toml
rename to 16_virtual_mem_part4_higher_half_kernel/libraries/test-types/Cargo.toml
diff --git a/16_virtual_mem_part4_higher_half_kernel/test-types/src/lib.rs b/16_virtual_mem_part4_higher_half_kernel/libraries/test-types/src/lib.rs
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/test-types/src/lib.rs
rename to 16_virtual_mem_part4_higher_half_kernel/libraries/test-types/src/lib.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/arch.rb b/16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/arch.rb
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/translation_table_tool/arch.rb
rename to 16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/arch.rb
diff --git a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/bsp.rb b/16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/bsp.rb
similarity index 94%
rename from 16_virtual_mem_part4_higher_half_kernel/translation_table_tool/bsp.rb
rename to 16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/bsp.rb
index ddf69a173..536a2f21d 100644
--- a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/bsp.rb
+++ b/16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/bsp.rb
@@ -8,7 +8,7 @@
 class RaspberryPi
     attr_reader :kernel_granule, :kernel_virt_addr_space_size, :kernel_virt_start_addr
 
-    MEMORY_SRC = File.read('src/bsp/raspberrypi/memory.rs').split("\n")
+    MEMORY_SRC = File.read('kernel/src/bsp/raspberrypi/memory.rs').split("\n")
 
     def initialize
         @kernel_granule = Granule64KiB
diff --git a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/generic.rb b/16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/generic.rb
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/translation_table_tool/generic.rb
rename to 16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/generic.rb
diff --git a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/kernel_elf.rb b/16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/kernel_elf.rb
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/translation_table_tool/kernel_elf.rb
rename to 16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/kernel_elf.rb
diff --git a/16_virtual_mem_part4_higher_half_kernel/translation_table_tool/main.rb b/16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/main.rb
similarity index 100%
rename from 16_virtual_mem_part4_higher_half_kernel/translation_table_tool/main.rb
rename to 16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/main.rb
diff --git a/common/tests/dispatch.rb b/common/tests/dispatch.rb
index 86aaea86a..b6223418b 100755
--- a/common/tests/dispatch.rb
+++ b/common/tests/dispatch.rb
@@ -16,16 +16,19 @@
 binary = ARGV.last
 test_name = binary.gsub(%r{.*deps/}, '').split('-')[0]
 
+# Check if virtual manifest (tutorial 12 or later) or not
+path_prefix = File.exist?('kernel/Cargo.toml') ? 'kernel/' : ''
+
 case test_name
 when 'kernel8.img'
-    load 'tests/boot_test_string.rb' # provides 'EXPECTED_PRINT'
+    load "#{path_prefix}tests/boot_test_string.rb" # provides 'EXPECTED_PRINT'
     BootTest.new(qemu_cmd, EXPECTED_PRINT).run # Doesn't return
 
 when 'libkernel'
     ExitCodeTest.new(qemu_cmd, 'Kernel library unit tests').run # Doesn't return
 
 else
-    console_test_file = "tests/#{test_name}.rb"
+    console_test_file = "#{path_prefix}tests/#{test_name}.rb"
     test_name.concat('.rs')
     test = if File.exist?(console_test_file)
                load console_test_file # provides 'subtest_collection'
diff --git a/utils/devtool.rb b/utils/devtool.rb
index a926cd2c4..9473ff8de 100755
--- a/utils/devtool.rb
+++ b/utils/devtool.rb
@@ -301,7 +301,15 @@ def diff_pair(original, update, padding)
         # Only diff adjacent tutorials. This checks the numbers of the tutorial folders.
         return unless original[0..1].to_i + 1 == update[0..1].to_i
 
-        puts 'Diffing '.light_blue + original.ljust(padding) + " -> #{update}"
+        # Skip for tutorial 11. Due to the change to virtual manifest, the diff is rather
+        # unreadable.
+        if original[0..1].to_i == 11
+            puts 'Skipping '.light_yellow +
+                 "#{original}: Too noisy due to change to virtual manifest"
+            return
+        end
+
+        puts 'Diffing  '.light_blue + original.ljust(padding) + " -> #{update}"
         system("bash utils/diff_tut_folders.bash #{original} #{update}")
     end
 
diff --git a/utils/diff_tut_folders.bash b/utils/diff_tut_folders.bash
index f4e6d1070..d93ca57d0 100755
--- a/utils/diff_tut_folders.bash
+++ b/utils/diff_tut_folders.bash
@@ -9,7 +9,6 @@ DIFF=$(
 	 -x README.md \
 	 -x README.CN.md \
 	 -x README.ES.md \
-	 -x kernel \
 	 -x kernel8.img \
 	 -x Cargo.lock \
 	 -x target \
@@ -17,7 +16,7 @@ DIFF=$(
 	| sed -r "s/[12][90][127][0-9]-[0-9][0-9]-[0-9][0-9] .*//g" \
 	| sed -r "s/[[:space:]]*$//g" \
 	| sed -r "s/%/modulo/g" \
-        | sed -r "s/diff -uNr -x README.md -x README.CN.md -x README.ES.md -x kernel -x kernel8.img -x Cargo.lock -x target/\ndiff -uNr/g"
+        | sed -r "s/diff -uNr -x README.md -x README.CN.md -x README.ES.md -x kernel8.img -x Cargo.lock -x target/\ndiff -uNr/g"
      )
 
 HEADER="## Diff to previous"

From 6e3051e6fd045151b85fc23e2d6a0c5d43296aca Mon Sep 17 00:00:00 2001
From: Andrew Cherry <andrew@xyncro.com>
Date: Tue, 19 Apr 2022 10:26:00 +0100
Subject: [PATCH 141/214] Updated to reflect rename of link.ld to kernel.ld

---
 01_wait_forever/README.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/01_wait_forever/README.md b/01_wait_forever/README.md
index 9c6eaf762..73b15af5c 100644
--- a/01_wait_forever/README.md
+++ b/01_wait_forever/README.md
@@ -18,7 +18,7 @@
 
 ## Code to look at
 
-- `BSP`-specific `link.ld` linker script.
+- `BSP`-specific `kernel.ld` linker script.
     - Load address at `0x8_0000`
     - Only `.text` section.
 - `main.rs`: Important [inner attributes]:

From b836655d668959b8fdd39ca91ea04e3ee0803c0f Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Tue, 19 Apr 2022 22:54:42 +0200
Subject: [PATCH 142/214] More link.ld -> kernel.ld renaming

---
 01_wait_forever/README.CN.md                  |  2 +-
 01_wait_forever/README.ES.md                  | 28 +++++++++----------
 02_runtime_init/README.ES.md                  |  2 +-
 06_uart_chainloader/README.md                 |  9 +++---
 .../README.md                                 |  4 +--
 .../README.md                                 |  6 ++--
 6 files changed, 26 insertions(+), 25 deletions(-)

diff --git a/01_wait_forever/README.CN.md b/01_wait_forever/README.CN.md
index 281a92903..06b2178d5 100644
--- a/01_wait_forever/README.CN.md
+++ b/01_wait_forever/README.CN.md
@@ -14,7 +14,7 @@
     - `nm`: 检查符号。
 - 代码按照 `kernel`， `arch` 和 `BSP` （板级支持包）的形式组织。
     - 条件编译会根据用户提供的参数编译各自的  `arch` 和  `BSP` 的内容。
-- 自定义 `link.ld` 链接脚本.
+- 自定义 `kernel.ld` 链接脚本.
     - 载入地址为 `0x80_000`
     - 目前仅有 `.text` 小节（section）。
 - `main.rs`: 重要的 [inner attributes]:
diff --git a/01_wait_forever/README.ES.md b/01_wait_forever/README.ES.md
index 5244372ab..0d86a4ea4 100644
--- a/01_wait_forever/README.ES.md
+++ b/01_wait_forever/README.ES.md
@@ -9,37 +9,37 @@
 ## Compilar
 
 * El archivo `Makefile` permite ejecutar:
-  
+
   * `doc`: Genera la documentación.
-  
+
   * `qemu`: Ejecutar el kernel en QEMU.
-  
+
   * `clippy`: Analiza el código y sugiere mejoras.
-  
+
   * `clean`: Elimina todos los archivos generados durante la compilación, etc.
-  
+
   * `readelf`: Inspecciona el archivo `ELF` de salida.
-  
-  * `objdump`: Inspecciona el ensamblador. 
-  
+
+  * `objdump`: Inspecciona el ensamblador.
+
   * `nm`: Inspecciona los símbolos.
 
 ## Código a revisar
 
-* El script para enlazado específico para la `BSP` llamado `link.ld`.
-  
+* El script para enlazado específico para la `BSP` llamado `kernel.ld`.
+
   * Carga la dirección en `0x8_0000`.
-  
+
   * Solo la sección `.text`.
 
 * `main.rs`: [Atributos internos](https://doc.rust-lang.org/reference/attributes.html) importantes:
-  
+
   * `#![no_std]`, `#![no_main]`.
 
-* `boot.s`: La función de ensamblador `_start()` que inicia `wfe` (Wait For Event / Esperar Hasta Un Evento), detiene todos los núcleos del procesador que están ejecutando `_start()`. 
+* `boot.s`: La función de ensamblador `_start()` que inicia `wfe` (Wait For Event / Esperar Hasta Un Evento), detiene todos los núcleos del procesador que están ejecutando `_start()`.
 
 * Tenemos que definir una función que funcione como `#[panic_handler]` (manejador de pánico) para que el compilador no nos cause problemas.
-  
+
   * Hazla `unimplemented!()` porque se eliminará ya que no está siendo usada.
 
 ## Pruébalo
diff --git a/02_runtime_init/README.ES.md b/02_runtime_init/README.ES.md
index 79c4c2b45..e1210e9b9 100644
--- a/02_runtime_init/README.ES.md
+++ b/02_runtime_init/README.ES.md
@@ -8,7 +8,7 @@
 
 ## Adiciones importantes
 
-* Adiciones importantes al script `link.ld`:
+* Adiciones importantes al script `kernel.ld`:
 
   * Nuevas secciones: `.rodata`, `.got`, `.data`, `.bss`.
 
diff --git a/06_uart_chainloader/README.md b/06_uart_chainloader/README.md
index b3db670fe..8c8603164 100644
--- a/06_uart_chainloader/README.md
+++ b/06_uart_chainloader/README.md
@@ -17,8 +17,8 @@ at the source code changes.
 
 The gist of it is that in `boot.s`, we are writing a piece of [position independent code] which
 automatically determines where the firmware has loaded the binary (`0x8_0000`), and where it was
-linked to (`0x200_0000`, see `link.ld`). The binary then copies itself from loaded to linked address
-(aka  "relocating" itself), and then jumps to the relocated version of `_start_rust()`.
+linked to (`0x200_0000`, see `kernel.ld`). The binary then copies itself from loaded to linked
+address (aka  "relocating" itself), and then jumps to the relocated version of `_start_rust()`.
 
 Since the chainloader has put itself "out of the way" now, it can now receive another kernel binary
 from the `UART` and copy it to the standard load address of the RPi firmware at `0x8_0000`. Finally,
@@ -27,8 +27,9 @@ from SD card all along.
 
 Please bear with me until I find the time to write it all down here elaborately. For the time being,
 please see this tutorial as an enabler for a convenience feature that allows booting the following
-tutorials in a quick manner. _For those keen to get a deeper understanding, it could make sense to skip forward to [Chapter 15](../15_virtual_mem_part3_precomputed_tables) and read the first half of the README,
-where `Load Address != Link Address` is discussed_.
+tutorials in a quick manner. _For those keen to get a deeper understanding, it could make sense to
+skip forward to [Chapter 15](../15_virtual_mem_part3_precomputed_tables) and read the first half of
+the README, where `Load Address != Link Address` is discussed_.
 
 [position independent code]: https://en.wikipedia.org/wiki/Position-independent_code
 
diff --git a/10_virtual_mem_part1_identity_mapping/README.md b/10_virtual_mem_part1_identity_mapping/README.md
index 1a02666b1..8c2de2067 100644
--- a/10_virtual_mem_part1_identity_mapping/README.md
+++ b/10_virtual_mem_part1_identity_mapping/README.md
@@ -14,7 +14,7 @@
   * [Generic Kernel code: `memory/mmu.rs`](#generic-kernel-code-memorymmurs)
   * [BSP: `bsp/raspberrypi/memory/mmu.rs`](#bsp-bspraspberrypimemorymmurs)
   * [AArch64: `_arch/aarch64/memory/*`](#aarch64-_archaarch64memory)
-  * [`link.ld`](#linkld)
+  * [`kernel.ld`](#kernelld)
 - [Address translation examples](#address-translation-examples)
   * [Address translation using a 64 KiB page descriptor](#address-translation-using-a-64-kib-page-descriptor)
 - [Zero-cost abstraction](#zero-cost-abstraction)
@@ -222,7 +222,7 @@ enables caching for data and instructions.
 [Translation Control Register - EL1]: https://docs.rs/crate/cortex-a/5.1.2/source/src/regs/tcr_el1.rs
 [System Control Register - EL1]: https://docs.rs/crate/cortex-a/5.1.2/source/src/regs/sctlr_el1.rs
 
-### `link.ld`
+### `kernel.ld`
 
 We need to align the `code` segment to `64 KiB` so that it doesn't overlap with the next section
 that needs read/write attributes instead of read/execute attributes:
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index c3554f199..8cd644f4f 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -118,7 +118,7 @@ Here are the compilation steps and the corresponding `objdump` for `AArch64`:
 
 ```console
 $ clang --target=aarch64-none-elf -Iinclude -Wall -c start.c -o start.o
-$ ld.lld start.o -T link.ld -o example.elf
+$ ld.lld start.o -T kernel.ld -o example.elf
 ```
 
 ```c-objdump
@@ -326,7 +326,7 @@ space:
 
 ```console
 $ clang --target=aarch64-none-elf -Iinclude -Wall -fpic -c start.c -o start.o
-$ ld.lld start.o -T link.ld -o example.elf
+$ ld.lld start.o -T kernel.ld -o example.elf
 ```
 
 ```c-objdump
@@ -473,7 +473,7 @@ the precompute use-case. The additional `#[no_mangle]` is added because we will
 symbol from the `translation table tool`, and this is easier with unmangled names.
 
 In the `BSP` code, there is also a new file called `kernel_virt_addr_space_size.ld`, which contains
-the kernel's virtual address space size. This file gets included in both, the `link.ld` linker
+the kernel's virtual address space size. This file gets included in both, the `kernel.ld` linker
 script and `mmu.rs`. We need this value both as a symbol in the kernel's ELF (for the `translation
 table tool` to parse it later) and as a constant in the `Rust` code. This inclusion approach is just
 a convenience hack that turned out working well.

From 1323c8245b83b340d63952e23e8ffce2c8606164 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Fri, 22 Apr 2022 22:30:16 +0200
Subject: [PATCH 143/214] Remove RA helper target from Makefile

---
 01_wait_forever/.vscode/settings.json                    | 3 ++-
 01_wait_forever/Makefile                                 | 5 -----
 02_runtime_init/.vscode/settings.json                    | 3 ++-
 02_runtime_init/Makefile                                 | 5 -----
 03_hacky_hello_world/.vscode/settings.json               | 3 ++-
 03_hacky_hello_world/Makefile                            | 6 ------
 03_hacky_hello_world/README.md                           | 9 ++++-----
 04_safe_globals/.vscode/settings.json                    | 3 ++-
 04_safe_globals/Makefile                                 | 6 ------
 05_drivers_gpio_uart/.vscode/settings.json               | 3 ++-
 05_drivers_gpio_uart/Makefile                            | 6 ------
 06_uart_chainloader/.vscode/settings.json                | 3 ++-
 06_uart_chainloader/Makefile                             | 6 ------
 06_uart_chainloader/README.md                            | 2 +-
 07_timestamps/.vscode/settings.json                      | 3 ++-
 07_timestamps/Makefile                                   | 6 ------
 07_timestamps/README.md                                  | 2 +-
 08_hw_debug_JTAG/.vscode/settings.json                   | 3 ++-
 08_hw_debug_JTAG/Makefile                                | 6 ------
 08_hw_debug_JTAG/README.md                               | 2 +-
 09_privilege_level/.vscode/settings.json                 | 3 ++-
 09_privilege_level/Makefile                              | 6 ------
 .../.vscode/settings.json                                | 3 ++-
 10_virtual_mem_part1_identity_mapping/Makefile           | 6 ------
 11_exceptions_part1_groundwork/.vscode/settings.json     | 3 ++-
 11_exceptions_part1_groundwork/Makefile                  | 6 ------
 12_integrated_testing/.vscode/settings.json              | 3 ++-
 12_integrated_testing/Makefile                           | 6 ------
 .../.vscode/settings.json                                | 3 ++-
 13_exceptions_part2_peripheral_IRQs/Makefile             | 6 ------
 14_virtual_mem_part2_mmio_remap/.vscode/settings.json    | 3 ++-
 14_virtual_mem_part2_mmio_remap/Makefile                 | 6 ------
 .../.vscode/settings.json                                | 3 ++-
 15_virtual_mem_part3_precomputed_tables/Makefile         | 6 ------
 15_virtual_mem_part3_precomputed_tables/README.md        | 2 +-
 .../.vscode/settings.json                                | 3 ++-
 16_virtual_mem_part4_higher_half_kernel/Makefile         | 6 ------
 X1_JTAG_boot/.vscode/settings.json                       | 3 ++-
 X1_JTAG_boot/Makefile                                    | 6 ------
 39 files changed, 42 insertions(+), 126 deletions(-)

diff --git a/01_wait_forever/.vscode/settings.json b/01_wait_forever/.vscode/settings.json
index 0a8d7c090..292bf2a93 100644
--- a/01_wait_forever/.vscode/settings.json
+++ b/01_wait_forever/.vscode/settings.json
@@ -3,7 +3,8 @@
   "editor.rulers": [100],
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
   "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
+  "rust-analyzer.checkOnSave.allTargets": false,
+  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
   "rust-analyzer.lens.debug": false,
   "rust-analyzer.lens.run": false
 }
diff --git a/01_wait_forever/Makefile b/01_wait_forever/Makefile
index 15082c037..7699e5f4d 100644
--- a/01_wait_forever/Makefile
+++ b/01_wait_forever/Makefile
@@ -190,8 +190,3 @@ nm: $(KERNEL_ELF)
 	$(call color_header, "Launching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
-##------------------------------------------------------------------------------
-## Helper target for rust-analyzer
-##------------------------------------------------------------------------------
-check:
-	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
diff --git a/02_runtime_init/.vscode/settings.json b/02_runtime_init/.vscode/settings.json
index 0a8d7c090..292bf2a93 100644
--- a/02_runtime_init/.vscode/settings.json
+++ b/02_runtime_init/.vscode/settings.json
@@ -3,7 +3,8 @@
   "editor.rulers": [100],
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
   "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
+  "rust-analyzer.checkOnSave.allTargets": false,
+  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
   "rust-analyzer.lens.debug": false,
   "rust-analyzer.lens.run": false
 }
diff --git a/02_runtime_init/Makefile b/02_runtime_init/Makefile
index d44f07aad..0d877c154 100644
--- a/02_runtime_init/Makefile
+++ b/02_runtime_init/Makefile
@@ -192,8 +192,3 @@ nm: $(KERNEL_ELF)
 	$(call color_header, "Launching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
-##------------------------------------------------------------------------------
-## Helper target for rust-analyzer
-##------------------------------------------------------------------------------
-check:
-	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
diff --git a/03_hacky_hello_world/.vscode/settings.json b/03_hacky_hello_world/.vscode/settings.json
index 0a8d7c090..292bf2a93 100644
--- a/03_hacky_hello_world/.vscode/settings.json
+++ b/03_hacky_hello_world/.vscode/settings.json
@@ -3,7 +3,8 @@
   "editor.rulers": [100],
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
   "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
+  "rust-analyzer.checkOnSave.allTargets": false,
+  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
   "rust-analyzer.lens.debug": false,
   "rust-analyzer.lens.run": false
 }
diff --git a/03_hacky_hello_world/Makefile b/03_hacky_hello_world/Makefile
index ac52002f0..c3e75cce3 100644
--- a/03_hacky_hello_world/Makefile
+++ b/03_hacky_hello_world/Makefile
@@ -195,12 +195,6 @@ nm: $(KERNEL_ELF)
 	$(call color_header, "Launching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
-##------------------------------------------------------------------------------
-## Helper target for rust-analyzer
-##------------------------------------------------------------------------------
-check:
-	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
-
 
 
 ##--------------------------------------------------------------------------------------------------
diff --git a/03_hacky_hello_world/README.md b/03_hacky_hello_world/README.md
index a1f3e1502..7263532cf 100644
--- a/03_hacky_hello_world/README.md
+++ b/03_hacky_hello_world/README.md
@@ -94,11 +94,10 @@ diff -uNr 02_runtime_init/Makefile 03_hacky_hello_world/Makefile
 
 
 
-@@ -197,3 +200,28 @@
- ##------------------------------------------------------------------------------
- check:
- 	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
-+
+@@ -192,3 +195,27 @@
+ 	$(call color_header, "Launching nm")
+ 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
+
 +
 +
 +##--------------------------------------------------------------------------------------------------
diff --git a/04_safe_globals/.vscode/settings.json b/04_safe_globals/.vscode/settings.json
index 0a8d7c090..292bf2a93 100644
--- a/04_safe_globals/.vscode/settings.json
+++ b/04_safe_globals/.vscode/settings.json
@@ -3,7 +3,8 @@
   "editor.rulers": [100],
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
   "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
+  "rust-analyzer.checkOnSave.allTargets": false,
+  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
   "rust-analyzer.lens.debug": false,
   "rust-analyzer.lens.run": false
 }
diff --git a/04_safe_globals/Makefile b/04_safe_globals/Makefile
index ac52002f0..c3e75cce3 100644
--- a/04_safe_globals/Makefile
+++ b/04_safe_globals/Makefile
@@ -195,12 +195,6 @@ nm: $(KERNEL_ELF)
 	$(call color_header, "Launching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
-##------------------------------------------------------------------------------
-## Helper target for rust-analyzer
-##------------------------------------------------------------------------------
-check:
-	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
-
 
 
 ##--------------------------------------------------------------------------------------------------
diff --git a/05_drivers_gpio_uart/.vscode/settings.json b/05_drivers_gpio_uart/.vscode/settings.json
index 0a8d7c090..292bf2a93 100644
--- a/05_drivers_gpio_uart/.vscode/settings.json
+++ b/05_drivers_gpio_uart/.vscode/settings.json
@@ -3,7 +3,8 @@
   "editor.rulers": [100],
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
   "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
+  "rust-analyzer.checkOnSave.allTargets": false,
+  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
   "rust-analyzer.lens.debug": false,
   "rust-analyzer.lens.run": false
 }
diff --git a/05_drivers_gpio_uart/Makefile b/05_drivers_gpio_uart/Makefile
index 193581e9f..38afeef96 100644
--- a/05_drivers_gpio_uart/Makefile
+++ b/05_drivers_gpio_uart/Makefile
@@ -214,12 +214,6 @@ nm: $(KERNEL_ELF)
 	$(call color_header, "Launching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
-##------------------------------------------------------------------------------
-## Helper target for rust-analyzer
-##------------------------------------------------------------------------------
-check:
-	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
-
 
 
 ##--------------------------------------------------------------------------------------------------
diff --git a/06_uart_chainloader/.vscode/settings.json b/06_uart_chainloader/.vscode/settings.json
index 0a8d7c090..292bf2a93 100644
--- a/06_uart_chainloader/.vscode/settings.json
+++ b/06_uart_chainloader/.vscode/settings.json
@@ -3,7 +3,8 @@
   "editor.rulers": [100],
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
   "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
+  "rust-analyzer.checkOnSave.allTargets": false,
+  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
   "rust-analyzer.lens.debug": false,
   "rust-analyzer.lens.run": false
 }
diff --git a/06_uart_chainloader/Makefile b/06_uart_chainloader/Makefile
index 5ae541753..3cde6041e 100644
--- a/06_uart_chainloader/Makefile
+++ b/06_uart_chainloader/Makefile
@@ -220,12 +220,6 @@ nm: $(KERNEL_ELF)
 	$(call color_header, "Launching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
-##------------------------------------------------------------------------------
-## Helper target for rust-analyzer
-##------------------------------------------------------------------------------
-check:
-	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
-
 
 
 ##--------------------------------------------------------------------------------------------------
diff --git a/06_uart_chainloader/README.md b/06_uart_chainloader/README.md
index 8c8603164..04a21dff7 100644
--- a/06_uart_chainloader/README.md
+++ b/06_uart_chainloader/README.md
@@ -248,7 +248,7 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
 
  ##------------------------------------------------------------------------------
  ## Run clippy
-@@ -239,7 +245,8 @@
+@@ -233,7 +239,8 @@
  ##------------------------------------------------------------------------------
  test_boot: $(KERNEL_BIN)
  	$(call color_header, "Boot test - $(BSP)")
diff --git a/07_timestamps/.vscode/settings.json b/07_timestamps/.vscode/settings.json
index 0a8d7c090..292bf2a93 100644
--- a/07_timestamps/.vscode/settings.json
+++ b/07_timestamps/.vscode/settings.json
@@ -3,7 +3,8 @@
   "editor.rulers": [100],
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
   "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
+  "rust-analyzer.checkOnSave.allTargets": false,
+  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
   "rust-analyzer.lens.debug": false,
   "rust-analyzer.lens.run": false
 }
diff --git a/07_timestamps/Makefile b/07_timestamps/Makefile
index d127c422b..d53950118 100644
--- a/07_timestamps/Makefile
+++ b/07_timestamps/Makefile
@@ -214,12 +214,6 @@ nm: $(KERNEL_ELF)
 	$(call color_header, "Launching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
-##------------------------------------------------------------------------------
-## Helper target for rust-analyzer
-##------------------------------------------------------------------------------
-check:
-	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
-
 
 
 ##--------------------------------------------------------------------------------------------------
diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index 6904f4f92..abdca3481 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -149,7 +149,7 @@ diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
 
  ##------------------------------------------------------------------------------
  ## Run clippy
-@@ -245,8 +239,7 @@
+@@ -239,8 +233,7 @@
  ##------------------------------------------------------------------------------
  test_boot: $(KERNEL_BIN)
  	$(call color_header, "Boot test - $(BSP)")
diff --git a/08_hw_debug_JTAG/.vscode/settings.json b/08_hw_debug_JTAG/.vscode/settings.json
index 0a8d7c090..292bf2a93 100644
--- a/08_hw_debug_JTAG/.vscode/settings.json
+++ b/08_hw_debug_JTAG/.vscode/settings.json
@@ -3,7 +3,8 @@
   "editor.rulers": [100],
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
   "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
+  "rust-analyzer.checkOnSave.allTargets": false,
+  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
   "rust-analyzer.lens.debug": false,
   "rust-analyzer.lens.run": false
 }
diff --git a/08_hw_debug_JTAG/Makefile b/08_hw_debug_JTAG/Makefile
index 1cf4d1aa8..4f6b01f98 100644
--- a/08_hw_debug_JTAG/Makefile
+++ b/08_hw_debug_JTAG/Makefile
@@ -225,12 +225,6 @@ nm: $(KERNEL_ELF)
 	$(call color_header, "Launching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
-##------------------------------------------------------------------------------
-## Helper target for rust-analyzer
-##------------------------------------------------------------------------------
-check:
-	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
-
 
 
 ##--------------------------------------------------------------------------------------------------
diff --git a/08_hw_debug_JTAG/README.md b/08_hw_debug_JTAG/README.md
index 902ca6e4a..b1f5d679c 100644
--- a/08_hw_debug_JTAG/README.md
+++ b/08_hw_debug_JTAG/README.md
@@ -364,7 +364,7 @@ diff -uNr 07_timestamps/Makefile 08_hw_debug_JTAG/Makefile
  endif
 
 
-@@ -222,6 +233,35 @@
+@@ -216,6 +227,35 @@
 
 
 
diff --git a/09_privilege_level/.vscode/settings.json b/09_privilege_level/.vscode/settings.json
index 0a8d7c090..292bf2a93 100644
--- a/09_privilege_level/.vscode/settings.json
+++ b/09_privilege_level/.vscode/settings.json
@@ -3,7 +3,8 @@
   "editor.rulers": [100],
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
   "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
+  "rust-analyzer.checkOnSave.allTargets": false,
+  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
   "rust-analyzer.lens.debug": false,
   "rust-analyzer.lens.run": false
 }
diff --git a/09_privilege_level/Makefile b/09_privilege_level/Makefile
index 1cf4d1aa8..4f6b01f98 100644
--- a/09_privilege_level/Makefile
+++ b/09_privilege_level/Makefile
@@ -225,12 +225,6 @@ nm: $(KERNEL_ELF)
 	$(call color_header, "Launching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
-##------------------------------------------------------------------------------
-## Helper target for rust-analyzer
-##------------------------------------------------------------------------------
-check:
-	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
-
 
 
 ##--------------------------------------------------------------------------------------------------
diff --git a/10_virtual_mem_part1_identity_mapping/.vscode/settings.json b/10_virtual_mem_part1_identity_mapping/.vscode/settings.json
index 0a8d7c090..292bf2a93 100644
--- a/10_virtual_mem_part1_identity_mapping/.vscode/settings.json
+++ b/10_virtual_mem_part1_identity_mapping/.vscode/settings.json
@@ -3,7 +3,8 @@
   "editor.rulers": [100],
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
   "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
+  "rust-analyzer.checkOnSave.allTargets": false,
+  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
   "rust-analyzer.lens.debug": false,
   "rust-analyzer.lens.run": false
 }
diff --git a/10_virtual_mem_part1_identity_mapping/Makefile b/10_virtual_mem_part1_identity_mapping/Makefile
index 1cf4d1aa8..4f6b01f98 100644
--- a/10_virtual_mem_part1_identity_mapping/Makefile
+++ b/10_virtual_mem_part1_identity_mapping/Makefile
@@ -225,12 +225,6 @@ nm: $(KERNEL_ELF)
 	$(call color_header, "Launching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
-##------------------------------------------------------------------------------
-## Helper target for rust-analyzer
-##------------------------------------------------------------------------------
-check:
-	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
-
 
 
 ##--------------------------------------------------------------------------------------------------
diff --git a/11_exceptions_part1_groundwork/.vscode/settings.json b/11_exceptions_part1_groundwork/.vscode/settings.json
index 0a8d7c090..292bf2a93 100644
--- a/11_exceptions_part1_groundwork/.vscode/settings.json
+++ b/11_exceptions_part1_groundwork/.vscode/settings.json
@@ -3,7 +3,8 @@
   "editor.rulers": [100],
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
   "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
+  "rust-analyzer.checkOnSave.allTargets": false,
+  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
   "rust-analyzer.lens.debug": false,
   "rust-analyzer.lens.run": false
 }
diff --git a/11_exceptions_part1_groundwork/Makefile b/11_exceptions_part1_groundwork/Makefile
index 1cf4d1aa8..4f6b01f98 100644
--- a/11_exceptions_part1_groundwork/Makefile
+++ b/11_exceptions_part1_groundwork/Makefile
@@ -225,12 +225,6 @@ nm: $(KERNEL_ELF)
 	$(call color_header, "Launching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
-##------------------------------------------------------------------------------
-## Helper target for rust-analyzer
-##------------------------------------------------------------------------------
-check:
-	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
-
 
 
 ##--------------------------------------------------------------------------------------------------
diff --git a/12_integrated_testing/.vscode/settings.json b/12_integrated_testing/.vscode/settings.json
index 0a8d7c090..292bf2a93 100644
--- a/12_integrated_testing/.vscode/settings.json
+++ b/12_integrated_testing/.vscode/settings.json
@@ -3,7 +3,8 @@
   "editor.rulers": [100],
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
   "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
+  "rust-analyzer.checkOnSave.allTargets": false,
+  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
   "rust-analyzer.lens.debug": false,
   "rust-analyzer.lens.run": false
 }
diff --git a/12_integrated_testing/Makefile b/12_integrated_testing/Makefile
index 427c93034..50986ce23 100644
--- a/12_integrated_testing/Makefile
+++ b/12_integrated_testing/Makefile
@@ -237,12 +237,6 @@ nm: $(KERNEL_ELF)
 	$(call color_header, "Launching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
-##------------------------------------------------------------------------------
-## Helper target for rust-analyzer
-##------------------------------------------------------------------------------
-check:
-	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
-
 
 
 ##--------------------------------------------------------------------------------------------------
diff --git a/13_exceptions_part2_peripheral_IRQs/.vscode/settings.json b/13_exceptions_part2_peripheral_IRQs/.vscode/settings.json
index 0a8d7c090..292bf2a93 100644
--- a/13_exceptions_part2_peripheral_IRQs/.vscode/settings.json
+++ b/13_exceptions_part2_peripheral_IRQs/.vscode/settings.json
@@ -3,7 +3,8 @@
   "editor.rulers": [100],
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
   "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
+  "rust-analyzer.checkOnSave.allTargets": false,
+  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
   "rust-analyzer.lens.debug": false,
   "rust-analyzer.lens.run": false
 }
diff --git a/13_exceptions_part2_peripheral_IRQs/Makefile b/13_exceptions_part2_peripheral_IRQs/Makefile
index 427c93034..50986ce23 100644
--- a/13_exceptions_part2_peripheral_IRQs/Makefile
+++ b/13_exceptions_part2_peripheral_IRQs/Makefile
@@ -237,12 +237,6 @@ nm: $(KERNEL_ELF)
 	$(call color_header, "Launching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
-##------------------------------------------------------------------------------
-## Helper target for rust-analyzer
-##------------------------------------------------------------------------------
-check:
-	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
-
 
 
 ##--------------------------------------------------------------------------------------------------
diff --git a/14_virtual_mem_part2_mmio_remap/.vscode/settings.json b/14_virtual_mem_part2_mmio_remap/.vscode/settings.json
index 0a8d7c090..292bf2a93 100644
--- a/14_virtual_mem_part2_mmio_remap/.vscode/settings.json
+++ b/14_virtual_mem_part2_mmio_remap/.vscode/settings.json
@@ -3,7 +3,8 @@
   "editor.rulers": [100],
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
   "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
+  "rust-analyzer.checkOnSave.allTargets": false,
+  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
   "rust-analyzer.lens.debug": false,
   "rust-analyzer.lens.run": false
 }
diff --git a/14_virtual_mem_part2_mmio_remap/Makefile b/14_virtual_mem_part2_mmio_remap/Makefile
index 427c93034..50986ce23 100644
--- a/14_virtual_mem_part2_mmio_remap/Makefile
+++ b/14_virtual_mem_part2_mmio_remap/Makefile
@@ -237,12 +237,6 @@ nm: $(KERNEL_ELF)
 	$(call color_header, "Launching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
-##------------------------------------------------------------------------------
-## Helper target for rust-analyzer
-##------------------------------------------------------------------------------
-check:
-	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
-
 
 
 ##--------------------------------------------------------------------------------------------------
diff --git a/15_virtual_mem_part3_precomputed_tables/.vscode/settings.json b/15_virtual_mem_part3_precomputed_tables/.vscode/settings.json
index 0a8d7c090..292bf2a93 100644
--- a/15_virtual_mem_part3_precomputed_tables/.vscode/settings.json
+++ b/15_virtual_mem_part3_precomputed_tables/.vscode/settings.json
@@ -3,7 +3,8 @@
   "editor.rulers": [100],
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
   "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
+  "rust-analyzer.checkOnSave.allTargets": false,
+  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
   "rust-analyzer.lens.debug": false,
   "rust-analyzer.lens.run": false
 }
diff --git a/15_virtual_mem_part3_precomputed_tables/Makefile b/15_virtual_mem_part3_precomputed_tables/Makefile
index 81de6005c..5c11f99e0 100644
--- a/15_virtual_mem_part3_precomputed_tables/Makefile
+++ b/15_virtual_mem_part3_precomputed_tables/Makefile
@@ -253,12 +253,6 @@ nm: $(KERNEL_ELF)
 	$(call color_header, "Launching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
-##------------------------------------------------------------------------------
-## Helper target for rust-analyzer
-##------------------------------------------------------------------------------
-check:
-	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
-
 
 
 ##--------------------------------------------------------------------------------------------------
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index 8cd644f4f..9072bac4b 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -1893,7 +1893,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/Makefile 15_virtual_mem_part3_precompu
  	$(call color_progress_prefix, "Name")
  	@echo $(KERNEL_BIN)
  	$(call color_progress_prefix, "Size")
-@@ -308,6 +324,7 @@
+@@ -302,6 +318,7 @@
      TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
      TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/.vscode/settings.json b/16_virtual_mem_part4_higher_half_kernel/.vscode/settings.json
index 0a8d7c090..292bf2a93 100644
--- a/16_virtual_mem_part4_higher_half_kernel/.vscode/settings.json
+++ b/16_virtual_mem_part4_higher_half_kernel/.vscode/settings.json
@@ -3,7 +3,8 @@
   "editor.rulers": [100],
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
   "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
+  "rust-analyzer.checkOnSave.allTargets": false,
+  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
   "rust-analyzer.lens.debug": false,
   "rust-analyzer.lens.run": false
 }
diff --git a/16_virtual_mem_part4_higher_half_kernel/Makefile b/16_virtual_mem_part4_higher_half_kernel/Makefile
index 81de6005c..5c11f99e0 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Makefile
+++ b/16_virtual_mem_part4_higher_half_kernel/Makefile
@@ -253,12 +253,6 @@ nm: $(KERNEL_ELF)
 	$(call color_header, "Launching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
-##------------------------------------------------------------------------------
-## Helper target for rust-analyzer
-##------------------------------------------------------------------------------
-check:
-	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
-
 
 
 ##--------------------------------------------------------------------------------------------------
diff --git a/X1_JTAG_boot/.vscode/settings.json b/X1_JTAG_boot/.vscode/settings.json
index 0a8d7c090..292bf2a93 100644
--- a/X1_JTAG_boot/.vscode/settings.json
+++ b/X1_JTAG_boot/.vscode/settings.json
@@ -3,7 +3,8 @@
   "editor.rulers": [100],
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
   "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.overrideCommand": ["make", "check"],
+  "rust-analyzer.checkOnSave.allTargets": false,
+  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
   "rust-analyzer.lens.debug": false,
   "rust-analyzer.lens.run": false
 }
diff --git a/X1_JTAG_boot/Makefile b/X1_JTAG_boot/Makefile
index d127c422b..d53950118 100644
--- a/X1_JTAG_boot/Makefile
+++ b/X1_JTAG_boot/Makefile
@@ -214,12 +214,6 @@ nm: $(KERNEL_ELF)
 	$(call color_header, "Launching nm")
 	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
-##------------------------------------------------------------------------------
-## Helper target for rust-analyzer
-##------------------------------------------------------------------------------
-check:
-	@RUSTFLAGS="$(RUSTFLAGS)" $(CHECK_CMD) --message-format=json
-
 
 
 ##--------------------------------------------------------------------------------------------------

From 9785300ab44b5d8098fc75a7ba8da7a6d61d0826 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Fri, 22 Apr 2022 23:10:03 +0200
Subject: [PATCH 144/214] Fix newest rubocop complaints

---
 .rubocop.yml         | 2 +-
 common/tests/test.rb | 2 --
 utils/devtool.rb     | 6 +++---
 3 files changed, 4 insertions(+), 6 deletions(-)

diff --git a/.rubocop.yml b/.rubocop.yml
index b0f756acf..1de61528e 100644
--- a/.rubocop.yml
+++ b/.rubocop.yml
@@ -11,7 +11,7 @@
 
 Layout/IndentationWidth:
   Width: 4
-  IgnoredPatterns: ['^\s*module']
+  AllowedPatterns: ['^\s*module']
 
 Layout/LineLength:
   Max: 100
diff --git a/common/tests/test.rb b/common/tests/test.rb
index 7ba5b7c43..d102ecd99 100644
--- a/common/tests/test.rb
+++ b/common/tests/test.rb
@@ -8,7 +8,6 @@
 class Test
     INDENT = '         '
 
-    # rubocop:disable Style/RedundantInitialize
     def initialize
         # Template instance variables.
         # @test_name
@@ -16,7 +15,6 @@ def initialize
         # @test_output
         # @test_error
     end
-    # rubocop:enable Style/RedundantInitialize
 
     private
 
diff --git a/utils/devtool.rb b/utils/devtool.rb
index 9473ff8de..7c02e9bab 100755
--- a/utils/devtool.rb
+++ b/utils/devtool.rb
@@ -94,11 +94,11 @@ def test_integration(bsp)
     private
 
     def boot_test?
-        Dir.exist?("#{@folder}/tests")
+        Dir.exist?("#{@folder}/kernel/tests")
     end
 
     def unit_integration_tests?
-        !Dir.glob("#{@folder}/tests/00_*.rs").empty?
+        !Dir.glob("#{@folder}/kernel/tests/00_*.rs").empty?
     end
 end
 
@@ -233,7 +233,7 @@ def ready_for_publish
     SUPPORTED_BSPS = %w[rpi3 rpi4].freeze
 
     def bsp_from_env
-        bsp = ENV['BSP']
+        bsp = ENV.fetch('BSP', nil)
 
         return bsp if SUPPORTED_BSPS.include?(bsp)
 

From 8d87d2c847a8768bec8282edec5a52cc633cc2c2 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 25 Apr 2022 23:22:50 +0200
Subject: [PATCH 145/214] minor cosmetics

---
 12_integrated_testing/kernel/Cargo.toml           |  1 -
 .../kernel/Cargo.toml                             |  1 -
 14_virtual_mem_part2_mmio_remap/kernel/Cargo.toml |  1 -
 15_virtual_mem_part3_precomputed_tables/Makefile  |  7 +++++--
 15_virtual_mem_part3_precomputed_tables/README.md | 15 +++++++++------
 .../kernel/Cargo.toml                             |  1 -
 16_virtual_mem_part4_higher_half_kernel/Makefile  |  7 +++++--
 .../kernel/Cargo.toml                             |  1 -
 8 files changed, 19 insertions(+), 15 deletions(-)

diff --git a/12_integrated_testing/kernel/Cargo.toml b/12_integrated_testing/kernel/Cargo.toml
index be478e855..864cfb614 100644
--- a/12_integrated_testing/kernel/Cargo.toml
+++ b/12_integrated_testing/kernel/Cargo.toml
@@ -4,7 +4,6 @@ version = "0.12.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
 edition = "2021"
 
-
 [features]
 default = []
 bsp_rpi3 = ["tock-registers"]
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/Cargo.toml b/13_exceptions_part2_peripheral_IRQs/kernel/Cargo.toml
index 1d99ad38e..f45458f9b 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/Cargo.toml
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/Cargo.toml
@@ -4,7 +4,6 @@ version = "0.13.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
 edition = "2021"
 
-
 [features]
 default = []
 bsp_rpi3 = ["tock-registers"]
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/Cargo.toml b/14_virtual_mem_part2_mmio_remap/kernel/Cargo.toml
index deb0c8bc5..f187a4671 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/Cargo.toml
+++ b/14_virtual_mem_part2_mmio_remap/kernel/Cargo.toml
@@ -4,7 +4,6 @@ version = "0.14.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
 edition = "2021"
 
-
 [features]
 default = []
 bsp_rpi3 = ["tock-registers"]
diff --git a/15_virtual_mem_part3_precomputed_tables/Makefile b/15_virtual_mem_part3_precomputed_tables/Makefile
index 5c11f99e0..85b8ca385 100644
--- a/15_virtual_mem_part3_precomputed_tables/Makefile
+++ b/15_virtual_mem_part3_precomputed_tables/Makefile
@@ -71,13 +71,16 @@ KERNEL_MANIFEST      = kernel/Cargo.toml
 KERNEL_LINKER_SCRIPT = kernel.ld
 LAST_BUILD_CONFIG    = target/$(BSP).build_config
 
-TT_TOOL_PATH = tools/translation_table_tool
-
 KERNEL_ELF_RAW      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
 # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
 KERNEL_ELF_RAW_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
 
+##------------------------------------------------------------------------------
+## Translation tables
+##------------------------------------------------------------------------------
+TT_TOOL_PATH = tools/translation_table_tool
+
 KERNEL_ELF_TTABLES      = target/$(TARGET)/release/kernel+ttables
 KERNEL_ELF_TTABLES_DEPS = $(KERNEL_ELF_RAW) $(wildcard $(TT_TOOL_PATH)/*)
 
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index 9072bac4b..b09b265bb 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -1837,19 +1837,22 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.r
 diff -uNr 14_virtual_mem_part2_mmio_remap/Makefile 15_virtual_mem_part3_precomputed_tables/Makefile
 --- 14_virtual_mem_part2_mmio_remap/Makefile
 +++ 15_virtual_mem_part3_precomputed_tables/Makefile
-@@ -71,10 +71,17 @@
+@@ -71,10 +71,20 @@
  KERNEL_LINKER_SCRIPT = kernel.ld
  LAST_BUILD_CONFIG    = target/$(BSP).build_config
 
 -KERNEL_ELF      = target/$(TARGET)/release/kernel
-+TT_TOOL_PATH = tools/translation_table_tool
-+
 +KERNEL_ELF_RAW      = target/$(TARGET)/release/kernel
  # This parses cargo's dep-info file.
  # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
 -KERNEL_ELF_DEPS = $(filter-out modulo: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
 +KERNEL_ELF_RAW_DEPS = $(filter-out modulo: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
 +
++##------------------------------------------------------------------------------
++## Translation tables
++##------------------------------------------------------------------------------
++TT_TOOL_PATH = tools/translation_table_tool
++
 +KERNEL_ELF_TTABLES      = target/$(TARGET)/release/kernel+ttables
 +KERNEL_ELF_TTABLES_DEPS = $(KERNEL_ELF_RAW) $(wildcard $(TT_TOOL_PATH)/*)
 +
@@ -1857,7 +1860,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/Makefile 15_virtual_mem_part3_precompu
 
 
 
-@@ -104,6 +111,7 @@
+@@ -104,6 +114,7 @@
      -O binary
 
  EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
@@ -1865,7 +1868,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/Makefile 15_virtual_mem_part3_precompu
  EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
  EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
 
-@@ -154,16 +162,24 @@
+@@ -154,16 +165,24 @@
  ##------------------------------------------------------------------------------
  ## Compile the kernel ELF
  ##------------------------------------------------------------------------------
@@ -1893,7 +1896,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/Makefile 15_virtual_mem_part3_precompu
  	$(call color_progress_prefix, "Name")
  	@echo $(KERNEL_BIN)
  	$(call color_progress_prefix, "Size")
-@@ -302,6 +318,7 @@
+@@ -302,6 +321,7 @@
      TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
      TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/Cargo.toml b/15_virtual_mem_part3_precomputed_tables/kernel/Cargo.toml
index 0d675c935..4641b0e86 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/Cargo.toml
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/Cargo.toml
@@ -4,7 +4,6 @@ version = "0.15.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
 edition = "2021"
 
-
 [features]
 default = []
 bsp_rpi3 = ["tock-registers"]
diff --git a/16_virtual_mem_part4_higher_half_kernel/Makefile b/16_virtual_mem_part4_higher_half_kernel/Makefile
index 5c11f99e0..85b8ca385 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Makefile
+++ b/16_virtual_mem_part4_higher_half_kernel/Makefile
@@ -71,13 +71,16 @@ KERNEL_MANIFEST      = kernel/Cargo.toml
 KERNEL_LINKER_SCRIPT = kernel.ld
 LAST_BUILD_CONFIG    = target/$(BSP).build_config
 
-TT_TOOL_PATH = tools/translation_table_tool
-
 KERNEL_ELF_RAW      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
 # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
 KERNEL_ELF_RAW_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
 
+##------------------------------------------------------------------------------
+## Translation tables
+##------------------------------------------------------------------------------
+TT_TOOL_PATH = tools/translation_table_tool
+
 KERNEL_ELF_TTABLES      = target/$(TARGET)/release/kernel+ttables
 KERNEL_ELF_TTABLES_DEPS = $(KERNEL_ELF_RAW) $(wildcard $(TT_TOOL_PATH)/*)
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/Cargo.toml b/16_virtual_mem_part4_higher_half_kernel/kernel/Cargo.toml
index d58c2f095..28f87a506 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/Cargo.toml
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/Cargo.toml
@@ -4,7 +4,6 @@ version = "0.16.0"
 authors = ["Andre Richter <andre.o.richter@gmail.com>"]
 edition = "2021"
 
-
 [features]
 default = []
 bsp_rpi3 = ["tock-registers"]

From 067589b0cf240b2e2152d560089b43f1d3a9bf88 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 25 Apr 2022 23:23:26 +0200
Subject: [PATCH 146/214] Add tutorial 17

---
 .editorconfig                                 |   2 +-
 17_kernel_symbols/.cargo/config.toml          |   2 +
 17_kernel_symbols/.vscode/settings.json       |  10 +
 17_kernel_symbols/Cargo.lock                  |  96 ++
 17_kernel_symbols/Cargo.toml                  |  10 +
 17_kernel_symbols/Makefile                    | 389 ++++++++
 17_kernel_symbols/README.md                   | 927 ++++++++++++++++++
 17_kernel_symbols/kernel/Cargo.toml           |  58 ++
 17_kernel_symbols/kernel/build.rs             |  20 +
 .../kernel/src/_arch/aarch64/cpu.rs           |  49 +
 .../kernel/src/_arch/aarch64/cpu/boot.rs      |  95 ++
 .../kernel/src/_arch/aarch64/cpu/boot.s       | 100 ++
 .../kernel/src/_arch/aarch64/cpu/smp.rs       |  30 +
 .../kernel/src/_arch/aarch64/exception.rs     | 321 ++++++
 .../kernel/src/_arch/aarch64/exception.s      | 150 +++
 .../_arch/aarch64/exception/asynchronous.rs   | 152 +++
 .../kernel/src/_arch/aarch64/memory/mmu.rs    | 158 +++
 .../aarch64/memory/mmu/translation_table.rs   | 521 ++++++++++
 .../kernel/src/_arch/aarch64/time.rs          | 121 +++
 17_kernel_symbols/kernel/src/bsp.rs           |  13 +
 .../kernel/src/bsp/device_driver.rs           |  16 +
 .../kernel/src/bsp/device_driver/arm.rs       |   9 +
 .../kernel/src/bsp/device_driver/arm/gicv2.rs | 246 +++++
 .../src/bsp/device_driver/arm/gicv2/gicc.rs   | 156 +++
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   | 209 ++++
 .../kernel/src/bsp/device_driver/bcm.rs       |  15 +
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs | 259 +++++
 .../bcm/bcm2xxx_interrupt_controller.rs       | 138 +++
 .../peripheral_ic.rs                          | 192 ++++
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   | 536 ++++++++++
 .../kernel/src/bsp/device_driver/common.rs    |  38 +
 .../kernel/src/bsp/raspberrypi.rs             |  62 ++
 .../kernel/src/bsp/raspberrypi/console.rs     |  98 ++
 .../kernel/src/bsp/raspberrypi/cpu.rs         |  14 +
 .../kernel/src/bsp/raspberrypi/driver.rs      |  61 ++
 .../kernel/src/bsp/raspberrypi/exception.rs   |   7 +
 .../bsp/raspberrypi/exception/asynchronous.rs |  36 +
 .../kernel/src/bsp/raspberrypi/kernel.ld      | 114 +++
 .../kernel_virt_addr_space_size.ld            |   1 +
 .../kernel/src/bsp/raspberrypi/memory.rs      | 227 +++++
 .../kernel/src/bsp/raspberrypi/memory/mmu.rs  | 179 ++++
 17_kernel_symbols/kernel/src/common.rs        |  29 +
 17_kernel_symbols/kernel/src/console.rs       |  53 +
 17_kernel_symbols/kernel/src/cpu.rs           |  21 +
 17_kernel_symbols/kernel/src/cpu/boot.rs      |   9 +
 17_kernel_symbols/kernel/src/cpu/smp.rs       |  14 +
 17_kernel_symbols/kernel/src/driver.rs        |  62 ++
 17_kernel_symbols/kernel/src/exception.rs     |  48 +
 .../kernel/src/exception/asynchronous.rs      | 152 +++
 17_kernel_symbols/kernel/src/lib.rs           | 185 ++++
 17_kernel_symbols/kernel/src/main.rs          | 109 ++
 17_kernel_symbols/kernel/src/memory.rs        | 167 ++++
 17_kernel_symbols/kernel/src/memory/mmu.rs    | 270 +++++
 .../kernel/src/memory/mmu/alloc.rs            |  70 ++
 .../kernel/src/memory/mmu/mapping_record.rs   | 233 +++++
 .../src/memory/mmu/translation_table.rs       | 137 +++
 .../kernel/src/memory/mmu/types.rs            | 378 +++++++
 17_kernel_symbols/kernel/src/panic_wait.rs    | 104 ++
 17_kernel_symbols/kernel/src/print.rs         |  94 ++
 17_kernel_symbols/kernel/src/state.rs         |  92 ++
 17_kernel_symbols/kernel/src/symbols.rs       |  85 ++
 .../kernel/src/synchronization.rs             | 159 +++
 17_kernel_symbols/kernel/src/time.rs          |  37 +
 .../kernel/tests/00_console_sanity.rb         |  48 +
 .../kernel/tests/00_console_sanity.rs         |  39 +
 .../kernel/tests/01_timer_sanity.rs           |  50 +
 .../tests/02_exception_sync_page_fault.rs     |  37 +
 .../tests/03_exception_restore_sanity.rb      |  25 +
 .../tests/03_exception_restore_sanity.rs      |  49 +
 .../kernel/tests/04_exception_irq_sanity.rs   |  67 ++
 .../kernel/tests/boot_test_string.rb          |   3 +
 .../kernel/tests/panic_exit_success/mod.rs    |   9 +
 .../kernel/tests/panic_wait_forever/mod.rs    |   9 +
 17_kernel_symbols/kernel_symbols.mk           | 103 ++
 17_kernel_symbols/kernel_symbols/Cargo.toml   |  15 +
 17_kernel_symbols/kernel_symbols/build.rs     |  14 +
 .../kernel_symbols/kernel_symbols.ld          |  15 +
 17_kernel_symbols/kernel_symbols/src/main.rs  |  16 +
 .../libraries/debug-symbol-types/Cargo.toml   |   4 +
 .../libraries/debug-symbol-types/src/lib.rs   |  39 +
 .../libraries/test-macros/Cargo.toml          |  14 +
 .../libraries/test-macros/src/lib.rs          |  29 +
 .../libraries/test-types/Cargo.toml           |   5 +
 .../libraries/test-types/src/lib.rs           |  16 +
 .../tools/kernel_symbols_tool/cmds.rb         |  45 +
 .../tools/kernel_symbols_tool/kernel_elf.rb   |  74 ++
 .../tools/kernel_symbols_tool/main.rb         |  47 +
 .../tools/translation_table_tool/arch.rb      | 314 ++++++
 .../tools/translation_table_tool/bsp.rb       |  50 +
 .../tools/translation_table_tool/generic.rb   | 179 ++++
 .../translation_table_tool/kernel_elf.rb      |  96 ++
 .../tools/translation_table_tool/main.rb      |  46 +
 92 files changed, 9801 insertions(+), 1 deletion(-)
 create mode 100644 17_kernel_symbols/.cargo/config.toml
 create mode 100644 17_kernel_symbols/.vscode/settings.json
 create mode 100644 17_kernel_symbols/Cargo.lock
 create mode 100644 17_kernel_symbols/Cargo.toml
 create mode 100644 17_kernel_symbols/Makefile
 create mode 100644 17_kernel_symbols/README.md
 create mode 100644 17_kernel_symbols/kernel/Cargo.toml
 create mode 100644 17_kernel_symbols/kernel/build.rs
 create mode 100644 17_kernel_symbols/kernel/src/_arch/aarch64/cpu.rs
 create mode 100644 17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.rs
 create mode 100644 17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.s
 create mode 100644 17_kernel_symbols/kernel/src/_arch/aarch64/cpu/smp.rs
 create mode 100644 17_kernel_symbols/kernel/src/_arch/aarch64/exception.rs
 create mode 100644 17_kernel_symbols/kernel/src/_arch/aarch64/exception.s
 create mode 100644 17_kernel_symbols/kernel/src/_arch/aarch64/exception/asynchronous.rs
 create mode 100644 17_kernel_symbols/kernel/src/_arch/aarch64/memory/mmu.rs
 create mode 100644 17_kernel_symbols/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
 create mode 100644 17_kernel_symbols/kernel/src/_arch/aarch64/time.rs
 create mode 100644 17_kernel_symbols/kernel/src/bsp.rs
 create mode 100644 17_kernel_symbols/kernel/src/bsp/device_driver.rs
 create mode 100644 17_kernel_symbols/kernel/src/bsp/device_driver/arm.rs
 create mode 100644 17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2.rs
 create mode 100644 17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
 create mode 100644 17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
 create mode 100644 17_kernel_symbols/kernel/src/bsp/device_driver/bcm.rs
 create mode 100644 17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 create mode 100644 17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
 create mode 100644 17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
 create mode 100644 17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 create mode 100644 17_kernel_symbols/kernel/src/bsp/device_driver/common.rs
 create mode 100644 17_kernel_symbols/kernel/src/bsp/raspberrypi.rs
 create mode 100644 17_kernel_symbols/kernel/src/bsp/raspberrypi/console.rs
 create mode 100644 17_kernel_symbols/kernel/src/bsp/raspberrypi/cpu.rs
 create mode 100644 17_kernel_symbols/kernel/src/bsp/raspberrypi/driver.rs
 create mode 100644 17_kernel_symbols/kernel/src/bsp/raspberrypi/exception.rs
 create mode 100644 17_kernel_symbols/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
 create mode 100644 17_kernel_symbols/kernel/src/bsp/raspberrypi/kernel.ld
 create mode 100644 17_kernel_symbols/kernel/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
 create mode 100644 17_kernel_symbols/kernel/src/bsp/raspberrypi/memory.rs
 create mode 100644 17_kernel_symbols/kernel/src/bsp/raspberrypi/memory/mmu.rs
 create mode 100644 17_kernel_symbols/kernel/src/common.rs
 create mode 100644 17_kernel_symbols/kernel/src/console.rs
 create mode 100644 17_kernel_symbols/kernel/src/cpu.rs
 create mode 100644 17_kernel_symbols/kernel/src/cpu/boot.rs
 create mode 100644 17_kernel_symbols/kernel/src/cpu/smp.rs
 create mode 100644 17_kernel_symbols/kernel/src/driver.rs
 create mode 100644 17_kernel_symbols/kernel/src/exception.rs
 create mode 100644 17_kernel_symbols/kernel/src/exception/asynchronous.rs
 create mode 100644 17_kernel_symbols/kernel/src/lib.rs
 create mode 100644 17_kernel_symbols/kernel/src/main.rs
 create mode 100644 17_kernel_symbols/kernel/src/memory.rs
 create mode 100644 17_kernel_symbols/kernel/src/memory/mmu.rs
 create mode 100644 17_kernel_symbols/kernel/src/memory/mmu/alloc.rs
 create mode 100644 17_kernel_symbols/kernel/src/memory/mmu/mapping_record.rs
 create mode 100644 17_kernel_symbols/kernel/src/memory/mmu/translation_table.rs
 create mode 100644 17_kernel_symbols/kernel/src/memory/mmu/types.rs
 create mode 100644 17_kernel_symbols/kernel/src/panic_wait.rs
 create mode 100644 17_kernel_symbols/kernel/src/print.rs
 create mode 100644 17_kernel_symbols/kernel/src/state.rs
 create mode 100644 17_kernel_symbols/kernel/src/symbols.rs
 create mode 100644 17_kernel_symbols/kernel/src/synchronization.rs
 create mode 100644 17_kernel_symbols/kernel/src/time.rs
 create mode 100644 17_kernel_symbols/kernel/tests/00_console_sanity.rb
 create mode 100644 17_kernel_symbols/kernel/tests/00_console_sanity.rs
 create mode 100644 17_kernel_symbols/kernel/tests/01_timer_sanity.rs
 create mode 100644 17_kernel_symbols/kernel/tests/02_exception_sync_page_fault.rs
 create mode 100644 17_kernel_symbols/kernel/tests/03_exception_restore_sanity.rb
 create mode 100644 17_kernel_symbols/kernel/tests/03_exception_restore_sanity.rs
 create mode 100644 17_kernel_symbols/kernel/tests/04_exception_irq_sanity.rs
 create mode 100644 17_kernel_symbols/kernel/tests/boot_test_string.rb
 create mode 100644 17_kernel_symbols/kernel/tests/panic_exit_success/mod.rs
 create mode 100644 17_kernel_symbols/kernel/tests/panic_wait_forever/mod.rs
 create mode 100644 17_kernel_symbols/kernel_symbols.mk
 create mode 100644 17_kernel_symbols/kernel_symbols/Cargo.toml
 create mode 100644 17_kernel_symbols/kernel_symbols/build.rs
 create mode 100644 17_kernel_symbols/kernel_symbols/kernel_symbols.ld
 create mode 100644 17_kernel_symbols/kernel_symbols/src/main.rs
 create mode 100644 17_kernel_symbols/libraries/debug-symbol-types/Cargo.toml
 create mode 100644 17_kernel_symbols/libraries/debug-symbol-types/src/lib.rs
 create mode 100644 17_kernel_symbols/libraries/test-macros/Cargo.toml
 create mode 100644 17_kernel_symbols/libraries/test-macros/src/lib.rs
 create mode 100644 17_kernel_symbols/libraries/test-types/Cargo.toml
 create mode 100644 17_kernel_symbols/libraries/test-types/src/lib.rs
 create mode 100644 17_kernel_symbols/tools/kernel_symbols_tool/cmds.rb
 create mode 100644 17_kernel_symbols/tools/kernel_symbols_tool/kernel_elf.rb
 create mode 100755 17_kernel_symbols/tools/kernel_symbols_tool/main.rb
 create mode 100644 17_kernel_symbols/tools/translation_table_tool/arch.rb
 create mode 100644 17_kernel_symbols/tools/translation_table_tool/bsp.rb
 create mode 100644 17_kernel_symbols/tools/translation_table_tool/generic.rb
 create mode 100644 17_kernel_symbols/tools/translation_table_tool/kernel_elf.rb
 create mode 100755 17_kernel_symbols/tools/translation_table_tool/main.rb

diff --git a/.editorconfig b/.editorconfig
index dd8892ca7..4d2b34c14 100644
--- a/.editorconfig
+++ b/.editorconfig
@@ -13,7 +13,7 @@ max_line_length = 100
 [Dockerfile]
 indent_size = 4
 
-[Makefile]
+[{Makefile,*.mk}]
 indent_style = tab
 indent_size = 8
 
diff --git a/17_kernel_symbols/.cargo/config.toml b/17_kernel_symbols/.cargo/config.toml
new file mode 100644
index 000000000..e34764853
--- /dev/null
+++ b/17_kernel_symbols/.cargo/config.toml
@@ -0,0 +1,2 @@
+[target.'cfg(target_os = "none")']
+runner = "target/kernel_test_runner.sh"
diff --git a/17_kernel_symbols/.vscode/settings.json b/17_kernel_symbols/.vscode/settings.json
new file mode 100644
index 000000000..292bf2a93
--- /dev/null
+++ b/17_kernel_symbols/.vscode/settings.json
@@ -0,0 +1,10 @@
+{
+  "editor.formatOnSave": true,
+  "editor.rulers": [100],
+  "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
+  "rust-analyzer.cargo.features": ["bsp_rpi3"],
+  "rust-analyzer.checkOnSave.allTargets": false,
+  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
+  "rust-analyzer.lens.debug": false,
+  "rust-analyzer.lens.run": false
+}
diff --git a/17_kernel_symbols/Cargo.lock b/17_kernel_symbols/Cargo.lock
new file mode 100644
index 000000000..7648b5c1f
--- /dev/null
+++ b/17_kernel_symbols/Cargo.lock
@@ -0,0 +1,96 @@
+# This file is automatically @generated by Cargo.
+# It is not intended for manual editing.
+version = 3
+
+[[package]]
+name = "cortex-a"
+version = "7.2.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
+dependencies = [
+ "tock-registers",
+]
+
+[[package]]
+name = "debug-symbol-types"
+version = "0.1.0"
+
+[[package]]
+name = "kernel_symbols"
+version = "0.1.0"
+dependencies = [
+ "debug-symbol-types",
+]
+
+[[package]]
+name = "mingo"
+version = "0.17.0"
+dependencies = [
+ "cortex-a",
+ "debug-symbol-types",
+ "qemu-exit",
+ "test-macros",
+ "test-types",
+ "tock-registers",
+]
+
+[[package]]
+name = "proc-macro2"
+version = "1.0.37"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "ec757218438d5fda206afc041538b2f6d889286160d649a86a24d37e1235afd1"
+dependencies = [
+ "unicode-xid",
+]
+
+[[package]]
+name = "qemu-exit"
+version = "3.0.1"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
+
+[[package]]
+name = "quote"
+version = "1.0.18"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "a1feb54ed693b93a84e14094943b84b7c4eae204c512b7ccb95ab0c66d278ad1"
+dependencies = [
+ "proc-macro2",
+]
+
+[[package]]
+name = "syn"
+version = "1.0.91"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "b683b2b825c8eef438b77c36a06dc262294da3d5a5813fac20da149241dcd44d"
+dependencies = [
+ "proc-macro2",
+ "quote",
+ "unicode-xid",
+]
+
+[[package]]
+name = "test-macros"
+version = "0.1.0"
+dependencies = [
+ "proc-macro2",
+ "quote",
+ "syn",
+ "test-types",
+]
+
+[[package]]
+name = "test-types"
+version = "0.1.0"
+
+[[package]]
+name = "tock-registers"
+version = "0.7.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
+
+[[package]]
+name = "unicode-xid"
+version = "0.2.2"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "8ccb82d61f80a663efe1f787a51b16b5a51e3314d6ac365b08639f52387b33f3"
diff --git a/17_kernel_symbols/Cargo.toml b/17_kernel_symbols/Cargo.toml
new file mode 100644
index 000000000..1ea72c9f0
--- /dev/null
+++ b/17_kernel_symbols/Cargo.toml
@@ -0,0 +1,10 @@
+[workspace]
+
+members = [
+        "libraries/*",
+        "kernel",
+        "kernel_symbols"
+]
+
+[profile.release]
+lto = true
diff --git a/17_kernel_symbols/Makefile b/17_kernel_symbols/Makefile
new file mode 100644
index 000000000..1e9282a28
--- /dev/null
+++ b/17_kernel_symbols/Makefile
@@ -0,0 +1,389 @@
+## SPDX-License-Identifier: MIT OR Apache-2.0
+##
+## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+include ../common/format.mk
+include ../common/docker.mk
+
+##--------------------------------------------------------------------------------------------------
+## Optional, user-provided configuration values
+##--------------------------------------------------------------------------------------------------
+
+# Default to the RPi3.
+BSP ?= rpi3
+
+# Default to a serial device name that is common in Linux.
+DEV_SERIAL ?= /dev/ttyUSB0
+
+# Optional integration test name.
+ifdef TEST
+    TEST_ARG = --test $(TEST)
+else
+    TEST_ARG = --test '*'
+endif
+
+
+
+##--------------------------------------------------------------------------------------------------
+## BSP-specific configuration values
+##--------------------------------------------------------------------------------------------------
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+
+ifeq ($(BSP),rpi3)
+    TARGET            = aarch64-unknown-none-softfloat
+    KERNEL_BIN        = kernel8.img
+    QEMU_BINARY       = qemu-system-aarch64
+    QEMU_MACHINE_TYPE = raspi3
+    QEMU_RELEASE_ARGS = -serial stdio -display none
+    QEMU_TEST_ARGS    = $(QEMU_RELEASE_ARGS) -semihosting
+    OBJDUMP_BINARY    = aarch64-none-elf-objdump
+    NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
+    OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
+    JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
+    LD_SCRIPT_PATH    = $(shell pwd)/kernel/src/bsp/raspberrypi
+    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
+else ifeq ($(BSP),rpi4)
+    TARGET            = aarch64-unknown-none-softfloat
+    KERNEL_BIN        = kernel8.img
+    QEMU_BINARY       = qemu-system-aarch64
+    QEMU_MACHINE_TYPE =
+    QEMU_RELEASE_ARGS = -serial stdio -display none
+    QEMU_TEST_ARGS    = $(QEMU_RELEASE_ARGS) -semihosting
+    OBJDUMP_BINARY    = aarch64-none-elf-objdump
+    NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
+    OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
+    JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
+    LD_SCRIPT_PATH    = $(shell pwd)/kernel/src/bsp/raspberrypi
+    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
+endif
+
+# Export for build.rs.
+export LD_SCRIPT_PATH
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Targets and Prerequisites
+##--------------------------------------------------------------------------------------------------
+KERNEL_MANIFEST      = kernel/Cargo.toml
+KERNEL_LINKER_SCRIPT = kernel.ld
+LAST_BUILD_CONFIG    = target/$(BSP).build_config
+
+KERNEL_ELF_RAW      = target/$(TARGET)/release/kernel
+# This parses cargo's dep-info file.
+# https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
+KERNEL_ELF_RAW_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
+
+##------------------------------------------------------------------------------
+## Translation tables
+##------------------------------------------------------------------------------
+TT_TOOL_PATH = tools/translation_table_tool
+
+KERNEL_ELF_TTABLES      = target/$(TARGET)/release/kernel+ttables
+KERNEL_ELF_TTABLES_DEPS = $(KERNEL_ELF_RAW) $(wildcard $(TT_TOOL_PATH)/*)
+
+##------------------------------------------------------------------------------
+## Kernel symbols
+##------------------------------------------------------------------------------
+export KERNEL_SYMBOLS_TOOL_PATH = tools/kernel_symbols_tool
+
+KERNEL_ELF_TTABLES_SYMS = target/$(TARGET)/release/kernel+ttables+symbols
+
+# Unlike with KERNEL_ELF_RAW, we are not relying on dep-info here. One of the reasons being that the
+# name of the generated symbols file varies between runs, which can cause confusion.
+KERNEL_ELF_TTABLES_SYMS_DEPS = $(KERNEL_ELF_TTABLES) \
+    $(wildcard kernel_symbols/*)                     \
+    $(wildcard $(KERNEL_SYMBOLS_TOOL_PATH)/*)
+
+export TARGET
+export KERNEL_SYMBOLS_INPUT_ELF  = $(KERNEL_ELF_TTABLES)
+export KERNEL_SYMBOLS_OUTPUT_ELF = $(KERNEL_ELF_TTABLES_SYMS)
+
+KERNEL_ELF = $(KERNEL_ELF_TTABLES_SYMS)
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Command building blocks
+##--------------------------------------------------------------------------------------------------
+RUSTFLAGS = $(RUSTC_MISC_ARGS)                   \
+    -C link-arg=--library-path=$(LD_SCRIPT_PATH) \
+    -C link-arg=--script=$(KERNEL_LINKER_SCRIPT)
+
+RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) \
+    -D warnings                   \
+    -D missing_docs
+
+FEATURES      = --features bsp_$(BSP)
+COMPILER_ARGS = --target=$(TARGET) \
+    $(FEATURES)                    \
+    --release
+
+RUSTC_CMD   = cargo rustc $(COMPILER_ARGS) --manifest-path $(KERNEL_MANIFEST)
+DOC_CMD     = cargo doc $(COMPILER_ARGS)
+CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
+CHECK_CMD   = cargo check $(COMPILER_ARGS)
+TEST_CMD    = cargo test $(COMPILER_ARGS) --manifest-path $(KERNEL_MANIFEST)
+OBJCOPY_CMD = rust-objcopy \
+    --strip-all            \
+    -O binary
+
+EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
+EXEC_TT_TOOL       = ruby $(TT_TOOL_PATH)/main.rb
+EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
+EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
+
+##------------------------------------------------------------------------------
+## Dockerization
+##------------------------------------------------------------------------------
+DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
+DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
+DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
+DOCKER_ARG_DIR_JTAG   = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
+DOCKER_ARG_DEV        = --privileged -v /dev:/dev
+DOCKER_ARG_NET        = --network host
+
+# DOCKER_IMAGE defined in include file (see top of this file).
+DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
+DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
+DOCKER_GDB   = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
+
+# Dockerize commands, which require USB device passthrough, only on Linux.
+ifeq ($(shell uname -s),Linux)
+    DOCKER_CMD_DEV = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DEV)
+
+    DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
+    DOCKER_JTAGBOOT  = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_ARG_DIR_JTAG) $(DOCKER_IMAGE)
+    DOCKER_OPENOCD   = $(DOCKER_CMD_DEV) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
+else
+    DOCKER_OPENOCD   = echo "Not yet supported on non-Linux systems."; \#
+endif
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: all doc qemu chainboot clippy clean readelf objdump nm check
+
+all: $(KERNEL_BIN)
+
+##------------------------------------------------------------------------------
+## Save the configuration as a file, so make understands if it changed.
+##------------------------------------------------------------------------------
+$(LAST_BUILD_CONFIG):
+	@rm -f target/*.build_config
+	@mkdir -p target
+	@touch $(LAST_BUILD_CONFIG)
+
+##------------------------------------------------------------------------------
+## Compile the kernel ELF
+##------------------------------------------------------------------------------
+$(KERNEL_ELF_RAW): $(KERNEL_ELF_RAW_DEPS)
+	$(call color_header, "Compiling kernel ELF - $(BSP)")
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
+
+##------------------------------------------------------------------------------
+## Precompute the kernel translation tables and patch them into the kernel ELF
+##------------------------------------------------------------------------------
+$(KERNEL_ELF_TTABLES): $(KERNEL_ELF_TTABLES_DEPS)
+	$(call color_header, "Precomputing kernel translation tables and patching kernel ELF")
+	@cp $(KERNEL_ELF_RAW) $(KERNEL_ELF_TTABLES)
+	@$(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(BSP) $(KERNEL_ELF_TTABLES)
+
+##------------------------------------------------------------------------------
+## Generate kernel symbols and patch them into the kernel ELF
+##------------------------------------------------------------------------------
+$(KERNEL_ELF_TTABLES_SYMS): $(KERNEL_ELF_TTABLES_SYMS_DEPS)
+	$(call color_header, "Generating kernel symbols and patching kernel ELF")
+	@time -f "in %es" \
+                $(MAKE) --no-print-directory -f kernel_symbols.mk
+
+##------------------------------------------------------------------------------
+## Generate the stripped kernel binary
+##------------------------------------------------------------------------------
+$(KERNEL_BIN): $(KERNEL_ELF_TTABLES_SYMS)
+	$(call color_header, "Generating stripped binary")
+	@$(OBJCOPY_CMD) $(KERNEL_ELF_TTABLES_SYMS) $(KERNEL_BIN)
+	$(call color_progress_prefix, "Name")
+	@echo $(KERNEL_BIN)
+	$(call color_progress_prefix, "Size")
+	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
+
+##------------------------------------------------------------------------------
+## Generate the documentation
+##------------------------------------------------------------------------------
+doc:
+	$(call color_header, "Generating docs")
+	@$(DOC_CMD) --document-private-items --open
+
+##------------------------------------------------------------------------------
+## Run the kernel in QEMU
+##------------------------------------------------------------------------------
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
+qemu:
+	$(call color_header, "$(QEMU_MISSING_STRING)")
+
+else # QEMU is supported.
+
+qemu: $(KERNEL_BIN)
+	$(call color_header, "Launching QEMU")
+	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
+
+endif
+
+##------------------------------------------------------------------------------
+## Push the kernel to the real HW target
+##------------------------------------------------------------------------------
+chainboot: $(KERNEL_BIN)
+	@$(DOCKER_CHAINBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(KERNEL_BIN)
+
+##------------------------------------------------------------------------------
+## Run clippy
+##------------------------------------------------------------------------------
+clippy:
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD) --features test_build --tests \
+                --manifest-path $(KERNEL_MANIFEST)
+
+##------------------------------------------------------------------------------
+## Clean
+##------------------------------------------------------------------------------
+clean:
+	rm -rf target $(KERNEL_BIN)
+
+##------------------------------------------------------------------------------
+## Run readelf
+##------------------------------------------------------------------------------
+readelf: $(KERNEL_ELF)
+	$(call color_header, "Launching readelf")
+	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
+
+##------------------------------------------------------------------------------
+## Run objdump
+##------------------------------------------------------------------------------
+objdump: $(KERNEL_ELF)
+	$(call color_header, "Launching objdump")
+	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
+                --section .text   \
+                --section .rodata \
+                --section .got    \
+                $(KERNEL_ELF) | rustfilt
+
+##------------------------------------------------------------------------------
+## Run nm
+##------------------------------------------------------------------------------
+nm: $(KERNEL_ELF)
+	$(call color_header, "Launching nm")
+	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Debugging targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: jtagboot openocd gdb gdb-opt0
+
+##------------------------------------------------------------------------------
+## Push the JTAG boot image to the real HW target
+##------------------------------------------------------------------------------
+jtagboot:
+	@$(DOCKER_JTAGBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(JTAG_BOOT_IMAGE)
+
+##------------------------------------------------------------------------------
+## Start OpenOCD session
+##------------------------------------------------------------------------------
+openocd:
+	$(call color_header, "Launching OpenOCD")
+	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
+
+##------------------------------------------------------------------------------
+## Start GDB session
+##------------------------------------------------------------------------------
+gdb: RUSTC_MISC_ARGS += -C debuginfo=2
+gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
+gdb gdb-opt0: $(KERNEL_ELF)
+	$(call color_header, "Launching GDB")
+	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Testing targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: test test_boot test_unit test_integration
+
+test_unit test_integration: FEATURES += --features test_build
+
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
+test_boot test_unit test_integration test:
+	$(call color_header, "$(QEMU_MISSING_STRING)")
+
+else # QEMU is supported.
+
+##------------------------------------------------------------------------------
+## Run boot test
+##------------------------------------------------------------------------------
+test_boot: $(KERNEL_BIN)
+	$(call color_header, "Boot test - $(BSP)")
+	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
+
+##------------------------------------------------------------------------------
+## Helpers for unit and integration test targets
+##------------------------------------------------------------------------------
+define KERNEL_TEST_RUNNER
+    #!/usr/bin/env bash
+
+    # The cargo test runner seems to change into the crate under test's directory. Therefore, ensure
+    # this script executes from the root.
+    cd $(shell pwd)
+
+    TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
+    TEST_ELF_SYMS="$${TEST_ELF}_syms"
+    TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
+
+    $(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(BSP) $$TEST_ELF > /dev/null
+
+    # This overrides the two ENV variables. The other ENV variables that are required as input for
+    # the .mk file are set already because they are exported by this Makefile and this script is
+    # started by the same.
+    KERNEL_SYMBOLS_INPUT_ELF=$$TEST_ELF           \
+        KERNEL_SYMBOLS_OUTPUT_ELF=$$TEST_ELF_SYMS \
+	$(MAKE) --no-print-directory -f kernel_symbols.mk > /dev/null 2>&1
+
+    $(OBJCOPY_CMD) $$TEST_ELF_SYMS $$TEST_BINARY
+    $(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
+endef
+
+export KERNEL_TEST_RUNNER
+
+define test_prepare
+    @mkdir -p target
+    @echo "$$KERNEL_TEST_RUNNER" > target/kernel_test_runner.sh
+    @chmod +x target/kernel_test_runner.sh
+endef
+
+##------------------------------------------------------------------------------
+## Run unit test(s)
+##------------------------------------------------------------------------------
+test_unit:
+	$(call color_header, "Compiling unit test(s) - $(BSP)")
+	$(call test_prepare)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) --lib
+
+##------------------------------------------------------------------------------
+## Run integration test(s)
+##------------------------------------------------------------------------------
+test_integration:
+	$(call color_header, "Compiling integration test(s) - $(BSP)")
+	$(call test_prepare)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) $(TEST_ARG)
+
+test: test_boot test_unit test_integration
+
+endif
diff --git a/17_kernel_symbols/README.md b/17_kernel_symbols/README.md
new file mode 100644
index 000000000..72428c23f
--- /dev/null
+++ b/17_kernel_symbols/README.md
@@ -0,0 +1,927 @@
+# Tutorial 17 - Kernel Symbols
+
+## tl;dr
+
+- To enrich and augment existing and future debugging code, we add support for `kernel symbol`
+  lookup.
+
+## Table of Contents
+
+- [Introduction](#introduction)
+- [Implementation](#implementation)
+  - [Linking Changes](#linking-changes)
+  - [Kernel Symbols Tool](#kernel-symbols-tool)
+  - [Lookup Code](#lookup-code)
+- [Test it](#test-it)
+- [Diff to previous](#diff-to-previous)
+
+## Introduction
+
+Ever since the first tutorial, it was possible to execute the `make nm` target in order to view all
+`kernel symbols`. The kernel itself, however, does not have any means yet to correlate a virtual
+address to a symbol during runtime. Gaining this capability would be useful for augmenting
+debug-related prints. For example, when the kernel is handling an `exception`, it prints the content
+of the `exception link register`, which is the program address where the CPU was executing from when
+the exception happened.
+
+Until now, in order to understand to which function or code such an address belongs to, a manual
+lookup by the person debugging the issue was necessary. In this tutorial, we are adding a `data
+structure` to the kernel which contains _all the symbol names and corresponding address ranges_.
+This enables the kernel to print symbol names in existing and future debug-related code, which
+improves triaging of issues by humans, because it does away with the manual lookup.
+
+This tutorial is mostly is an enabler for the upcoming tutorial that will add [`backtracing`]
+support.
+
+[`backtracing`]: https://en.wikipedia.org/wiki/Stack_trace
+
+## Implementation
+
+First of all, a new support crate is added under `$ROOT/libraries/debug-symbol-types`. It contains
+the definition for `struct Symbol`:
+
+```rust
+/// A symbol containing a size.
+#[repr(C)]
+pub struct Symbol {
+    addr_range: Range<usize>,
+    name: &'static str,
+}
+```
+
+The implementation of the struct furthermore defines the two public functions `name()` and
+`contains()`, which will be used to query information.
+
+To enable the kernel to lookup symbol names, we will add an `array` to the kernel binary that
+contains all the kernel symbols. Because we can query the final symbol names and addresses only
+_after_ the kernel has been `linked`, the same approach as for the `translation tables` will be
+used: The symbols array will be patched into a `placeholder section` of the final kernel `ELF`.
+
+### Linking Changes
+
+In the `kernel.ld` linker script, we define a new section named `kernel_symbols` and give it a size
+of `32 KiB`:
+
+```ld.s
+    .rodata         : ALIGN(8) { *(.rodata*) } :segment_code
+    .got            : ALIGN(8) { *(.got)     } :segment_code
+    .kernel_symbols : ALIGN(8) {
+        __kernel_symbols_start = .;
+        . += 32 * 1024;
+    } :segment_code
+```
+
+Also, we are providing the start address of the section through the symbol `__kernel_symbols_start`,
+which will be used by our `Rust` code later on.
+
+### Kernel Symbols Tool
+
+Under `$ROOT/tools/kernel_symbols_tool`, we are adding a helper tool that is able to dynamically
+generate an `array` of all the kernel symbols and patch it into the final kernel `ELF`. In our main
+`Makefile`, we are invoking the tool after the translation table generation. In the first step, the
+tool generates a temporary `Rust` file that instantiates the symbols array. Here is an example of
+how this can look like:
+
+```console
+$ head ./target/aarch64-unknown-none-softfloat/release/kernel+ttables_symbols_demangled.rs
+```
+```rust
+use debug_symbol_types::Symbol;
+
+# [no_mangle]
+# [link_section = ".rodata.symbol_desc"]
+static KERNEL_SYMBOLS: [Symbol; 139] = [
+    Symbol::new(18446744072635809792, 124, "_start"),
+    Symbol::new(18446744072635809920, 8, "BOOT_CORE_ID"),
+    Symbol::new(18446744072635809928, 8, "PHYS_KERNEL_TABLES_BASE_ADDR"),
+    Symbol::new(18446744072635809936, 80, "_start_rust"),
+    Symbol::new(18446744072635813888, 84, "__exception_restore_context"),
+    // Many more
+```
+
+Next, the _helper crate_ `$ROOT/kernel_symbols` is compiled. This crate contains a single `main.rs`
+that just includes the temporary symbols file shown above.
+
+```rust
+//! Generation of kernel symbols.
+
+#![no_std]
+#![no_main]
+
+#[cfg(feature = "generated_symbols_available")]
+include!(env!("KERNEL_SYMBOLS_DEMANGLED_RS"));
+```
+
+`KERNEL_SYMBOLS_DEMANGLED_RS` is set by the corresponding `build.rs` file. The helper crate has its
+own `linker file`, which ensures that that just the array and the corresponding strings that it
+references are kept:
+
+```ld.s
+SECTIONS
+{
+    .rodata : {
+        ASSERT(. > 0xffffffff00000000, "Expected higher half address")
+
+        KEEP(*(.rodata.symbol_desc*))
+        . = ALIGN(8);
+        *(.rodata*)
+    }
+}
+```
+
+Afterwards, `objcopy` is used to strip the produced helper crate ELF. What remains is a small
+`binary blob` that just contains the symbols array and the `names` that are referenced. To ensure
+that these references are valid kernel addresses (remember that those are defined as `name: &'static
+str`, so basically a pointer to a kernel address), the sub-makefile compiling this helper crate
+(`$ROOT/kernel_symbols.mk`) did the following:
+
+It used the `kernel_symbols_tool` to query the virtual address of the `kernel_symbols` **section**
+(of the final kernel ELF). This address was then supplied to the linker when the helper crate was
+linked (emphasis on the `--section-start=.rodata=` part):
+
+```Makefile
+GET_SYMBOLS_SECTION_VIRT_ADDR = $(DOCKER_TOOLS) $(EXEC_SYMBOLS_TOOL) \
+    --get_symbols_section_virt_addr $(KERNEL_SYMBOLS_OUTPUT_ELF)
+
+RUSTFLAGS = -C link-arg=--script=$(KERNEL_SYMBOLS_LINKER_SCRIPT) \
+    -C link-arg=--section-start=.rodata=$$($(GET_SYMBOLS_SECTION_VIRT_ADDR))
+```
+
+This might be a bit convoluted, but the main take away is: This ensures that the start address of
+the `.rodata` section of the `kernel_symbols` helper crate is exactly the same address as the
+`placeholder section` of the final kernel ELF where the symbols `binary blob` will be patched into.
+The latter is the last step done by the tool.
+
+### Lookup Code
+
+In the kernel, we add the file `src/symbols.rs`. It makes the linker-provided symbol
+`__kernel_symbols_start` that we saw earlier accesible, and also defines `NUM_KERNEL_SYMBOLS`:
+
+```rust
+#[no_mangle]
+static NUM_KERNEL_SYMBOLS: u64 = 0;
+```
+
+When the `kernel_symbols_tool` patches the symbols blob into the kernel ELF, it also updates this
+value to reflect the number of symbols that are available. This is needed for the code that
+internally crafts the slice of symbols that the kernel uses for lookup:
+
+```rust
+fn kernel_symbol_section_virt_start_addr() -> Address<Virtual> {
+    Address::new(unsafe { __kernel_symbols_start.get() as usize })
+}
+
+fn kernel_symbols_slice() -> &'static [Symbol] {
+    let ptr = kernel_symbol_section_virt_start_addr().as_usize() as *const Symbol;
+
+    unsafe {
+        let num = core::ptr::read_volatile(&NUM_KERNEL_SYMBOLS as *const u64) as usize;
+        slice::from_raw_parts(ptr, num)
+    }
+}
+```
+
+Lookup is done by just iterating over the slice:
+
+```rust
+/// Retrieve the symbol name corresponding to a virtual address, if any.
+pub fn lookup_symbol(addr: Address<Virtual>) -> Option<&'static str> {
+    for i in kernel_symbols_slice() {
+        if i.contains(addr.as_usize()) {
+            return Some(i.name());
+        }
+    }
+
+    None
+}
+```
+
+And that's it for this tutorial. The upcoming tutorial on `backtracing` will put this code to more
+prominent use.
+
+## Test it
+
+For now, symbol lookup can be observed in the integration test for synchronous exception handling.
+Here, the kernel now also prints the symbol name that corresponds to the value of `ELR_EL1`. In the
+following case, this is `kernel_init()`, which is where the the exception is generated in the test:
+
+```console
+$ TEST=02_exception_sync_page_fault make test_integration
+[...]
+         -------------------------------------------------------------------
+         🦀 Testing synchronous exception handling by causing a page fault
+         -------------------------------------------------------------------
+
+         [    0.002640] Writing to bottom of address space to address 1 GiB...
+         [    0.004549] Kernel panic!
+
+         Panic location:
+               File 'kernel/src/_arch/aarch64/exception.rs', line 59, column 5
+
+         CPU Exception!
+
+         ESR_EL1: 0x96000004
+
+         ...
+
+         ELR_EL1: 0xffffffffc0001118
+               Symbol: kernel_init
+```
+
+## Diff to previous
+```diff
+
+diff -uNr 16_virtual_mem_part4_higher_half_kernel/Cargo.toml 17_kernel_symbols/Cargo.toml
+--- 16_virtual_mem_part4_higher_half_kernel/Cargo.toml
++++ 17_kernel_symbols/Cargo.toml
+@@ -2,7 +2,8 @@
+
+ members = [
+         "libraries/*",
+-        "kernel"
++        "kernel",
++        "kernel_symbols"
+ ]
+
+ [profile.release]
+
+diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel/Cargo.toml 17_kernel_symbols/kernel/Cargo.toml
+--- 16_virtual_mem_part4_higher_half_kernel/kernel/Cargo.toml
++++ 17_kernel_symbols/kernel/Cargo.toml
+@@ -1,6 +1,6 @@
+ [package]
+ name = "mingo"
+-version = "0.16.0"
++version = "0.17.0"
+ authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+ edition = "2021"
+
+@@ -16,6 +16,7 @@
+
+ [dependencies]
+ test-types = { path = "../libraries/test-types" }
++debug-symbol-types = { path = "../libraries/debug-symbol-types" }
+
+ # Optional dependencies
+ tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
+
+diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception.rs 17_kernel_symbols/kernel/src/_arch/aarch64/exception.rs
+--- 16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception.rs
++++ 17_kernel_symbols/kernel/src/_arch/aarch64/exception.rs
+@@ -11,7 +11,7 @@
+ //!
+ //! crate::exception::arch_exception
+
+-use crate::{bsp, exception};
++use crate::{bsp, exception, memory, symbols};
+ use core::{arch::global_asm, cell::UnsafeCell, fmt};
+ use cortex_a::{asm::barrier, registers::*};
+ use tock_registers::{
+@@ -262,6 +262,12 @@
+
+         writeln!(f, "{}", self.spsr_el1)?;
+         writeln!(f, "ELR_EL1: {:#018x}", self.elr_el1)?;
++        writeln!(
++            f,
++            "      Symbol: {}",
++            symbols::lookup_symbol(memory::Address::new(self.elr_el1 as usize))
++                .unwrap_or("Symbol not found")
++        )?;
+         writeln!(f)?;
+         writeln!(f, "General purpose register:")?;
+
+
+diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/kernel.ld 17_kernel_symbols/kernel/src/bsp/raspberrypi/kernel.ld
+--- 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/kernel.ld
++++ 17_kernel_symbols/kernel/src/bsp/raspberrypi/kernel.ld
+@@ -56,8 +56,12 @@
+         *(.text*)                 /* Everything else */
+     } :segment_code
+
+-    .rodata : ALIGN(8) { *(.rodata*) } :segment_code
+-    .got    : ALIGN(8) { *(.got)     } :segment_code
++    .rodata         : ALIGN(8) { *(.rodata*) } :segment_code
++    .got            : ALIGN(8) { *(.got)     } :segment_code
++    .kernel_symbols : ALIGN(8) {
++        __kernel_symbols_start = .;
++        . += 32 * 1024;
++    } :segment_code
+
+     . = ALIGN(PAGE_SIZE);
+     __code_end_exclusive = .;
+
+diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/memory.rs 17_kernel_symbols/kernel/src/bsp/raspberrypi/memory.rs
+--- 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/memory.rs
++++ 17_kernel_symbols/kernel/src/bsp/raspberrypi/memory.rs
+@@ -20,6 +20,7 @@
+ //! | .text                                 |
+ //! | .rodata                               |
+ //! | .got                                  |
++//! | .kernel_symbols                       |
+ //! |                                       |
+ //! +---------------------------------------+
+ //! |                                       | data_start == code_end_exclusive
+@@ -41,6 +42,7 @@
+ //! | .text                                 |
+ //! | .rodata                               |
+ //! | .got                                  |
++//! | .kernel_symbols                       |
+ //! |                                       |
+ //! +---------------------------------------+
+ //! |                                       | data_start == code_end_exclusive
+
+diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs 17_kernel_symbols/kernel/src/lib.rs
+--- 16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
++++ 17_kernel_symbols/kernel/src/lib.rs
+@@ -135,6 +135,7 @@
+ pub mod memory;
+ pub mod print;
+ pub mod state;
++pub mod symbols;
+ pub mod time;
+
+ //--------------------------------------------------------------------------------------------------
+
+diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel/src/symbols.rs 17_kernel_symbols/kernel/src/symbols.rs
+--- 16_virtual_mem_part4_higher_half_kernel/kernel/src/symbols.rs
++++ 17_kernel_symbols/kernel/src/symbols.rs
+@@ -0,0 +1,85 @@
++// SPDX-License-Identifier: MIT OR Apache-2.0
++//
++// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++
++//! Debug symbol support.
++
++use crate::memory::{Address, Virtual};
++use core::{cell::UnsafeCell, slice};
++use debug_symbol_types::Symbol;
++
++//--------------------------------------------------------------------------------------------------
++// Private Definitions
++//--------------------------------------------------------------------------------------------------
++
++// Symbol from the linker script.
++extern "Rust" {
++    static __kernel_symbols_start: UnsafeCell<()>;
++}
++
++//--------------------------------------------------------------------------------------------------
++// Global instances
++//--------------------------------------------------------------------------------------------------
++
++/// This will be patched to the correct value by the "kernel symbols tool" after linking. This given
++/// value here is just a (safe) dummy.
++#[no_mangle]
++static NUM_KERNEL_SYMBOLS: u64 = 0;
++
++//--------------------------------------------------------------------------------------------------
++// Private Code
++//--------------------------------------------------------------------------------------------------
++
++fn kernel_symbol_section_virt_start_addr() -> Address<Virtual> {
++    Address::new(unsafe { __kernel_symbols_start.get() as usize })
++}
++
++fn kernel_symbols_slice() -> &'static [Symbol] {
++    let ptr = kernel_symbol_section_virt_start_addr().as_usize() as *const Symbol;
++
++    unsafe {
++        let num = core::ptr::read_volatile(&NUM_KERNEL_SYMBOLS as *const u64) as usize;
++        slice::from_raw_parts(ptr, num)
++    }
++}
++
++//--------------------------------------------------------------------------------------------------
++// Public Code
++//--------------------------------------------------------------------------------------------------
++
++/// Retrieve the symbol name corresponding to a virtual address, if any.
++pub fn lookup_symbol(addr: Address<Virtual>) -> Option<&'static str> {
++    for i in kernel_symbols_slice() {
++        if i.contains(addr.as_usize()) {
++            return Some(i.name());
++        }
++    }
++
++    None
++}
++
++//--------------------------------------------------------------------------------------------------
++// Testing
++//--------------------------------------------------------------------------------------------------
++
++#[cfg(test)]
++mod tests {
++    use super::*;
++    use test_macros::kernel_test;
++
++    /// Sanity of symbols module.
++    #[kernel_test]
++    fn symbols_sanity() {
++        let first_sym = lookup_symbol(Address::new(
++            crate::common::is_aligned as *const usize as usize,
++        ))
++        .unwrap();
++
++        assert_eq!(first_sym, "libkernel::common::is_aligned");
++
++        let second_sym =
++            lookup_symbol(Address::new(crate::version as *const usize as usize)).unwrap();
++
++        assert_eq!(second_sym, "libkernel::version");
++    }
++}
+
+diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel_symbols/build.rs 17_kernel_symbols/kernel_symbols/build.rs
+--- 16_virtual_mem_part4_higher_half_kernel/kernel_symbols/build.rs
++++ 17_kernel_symbols/kernel_symbols/build.rs
+@@ -0,0 +1,14 @@
++use std::{env, path::Path};
++
++fn main() {
++    if let Ok(path) = env::var("KERNEL_SYMBOLS_DEMANGLED_RS") {
++        if Path::new(&path).exists() {
++            println!("cargo:rustc-cfg=feature=\"generated_symbols_available\"")
++        }
++    }
++
++    println!(
++        "cargo:rerun-if-changed={}",
++        Path::new("kernel_symbols.ld").display()
++    );
++}
+
+diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel_symbols/Cargo.toml 17_kernel_symbols/kernel_symbols/Cargo.toml
+--- 16_virtual_mem_part4_higher_half_kernel/kernel_symbols/Cargo.toml
++++ 17_kernel_symbols/kernel_symbols/Cargo.toml
+@@ -0,0 +1,15 @@
++[package]
++name = "kernel_symbols"
++version = "0.1.0"
++edition = "2021"
++
++[features]
++default = []
++generated_symbols_available = []
++
++##--------------------------------------------------------------------------------------------------
++## Dependencies
++##--------------------------------------------------------------------------------------------------
++
++[dependencies]
++debug-symbol-types = { path = "../libraries/debug-symbol-types" }
+
+diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel_symbols/kernel_symbols.ld 17_kernel_symbols/kernel_symbols/kernel_symbols.ld
+--- 16_virtual_mem_part4_higher_half_kernel/kernel_symbols/kernel_symbols.ld
++++ 17_kernel_symbols/kernel_symbols/kernel_symbols.ld
+@@ -0,0 +1,15 @@
++/* SPDX-License-Identifier: MIT OR Apache-2.0
++ *
++ * Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++ */
++
++SECTIONS
++{
++    .rodata : {
++        ASSERT(. > 0xffffffff00000000, "Expected higher half address")
++
++        KEEP(*(.rodata.symbol_desc*))
++        . = ALIGN(8);
++        *(.rodata*)
++    }
++}
+
+diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel_symbols/src/main.rs 17_kernel_symbols/kernel_symbols/src/main.rs
+--- 16_virtual_mem_part4_higher_half_kernel/kernel_symbols/src/main.rs
++++ 17_kernel_symbols/kernel_symbols/src/main.rs
+@@ -0,0 +1,16 @@
++// SPDX-License-Identifier: MIT OR Apache-2.0
++//
++// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++
++//! Generation of kernel symbols.
++
++#![no_std]
++#![no_main]
++
++#[cfg(feature = "generated_symbols_available")]
++include!(env!("KERNEL_SYMBOLS_DEMANGLED_RS"));
++
++#[panic_handler]
++fn panic(_info: &core::panic::PanicInfo) -> ! {
++    unimplemented!()
++}
+
+diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel_symbols.mk 17_kernel_symbols/kernel_symbols.mk
+--- 16_virtual_mem_part4_higher_half_kernel/kernel_symbols.mk
++++ 17_kernel_symbols/kernel_symbols.mk
+@@ -0,0 +1,101 @@
++## SPDX-License-Identifier: MIT OR Apache-2.0
++##
++## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
++
++include ../common/format.mk
++include ../common/docker.mk
++
++##--------------------------------------------------------------------------------------------------
++## Check for input variables that need be exported by the calling Makefile
++##--------------------------------------------------------------------------------------------------
++ifndef KERNEL_SYMBOLS_TOOL_PATH
++$(error KERNEL_SYMBOLS_TOOL_PATH is not set)
++endif
++
++ifndef TARGET
++$(error TARGET is not set)
++endif
++
++ifndef KERNEL_SYMBOLS_INPUT_ELF
++$(error KERNEL_SYMBOLS_INPUT_ELF is not set)
++endif
++
++ifndef KERNEL_SYMBOLS_OUTPUT_ELF
++$(error KERNEL_SYMBOLS_OUTPUT_ELF is not set)
++endif
++
++
++
++##--------------------------------------------------------------------------------------------------
++## Targets and Prerequisites
++##--------------------------------------------------------------------------------------------------
++KERNEL_SYMBOLS_MANIFEST      = kernel_symbols/Cargo.toml
++KERNEL_SYMBOLS_LINKER_SCRIPT = kernel_symbols/kernel_symbols.ld
++
++KERNEL_SYMBOLS_RS           = $(KERNEL_SYMBOLS_INPUT_ELF)_symbols.rs
++KERNEL_SYMBOLS_DEMANGLED_RS = $(shell pwd)/$(KERNEL_SYMBOLS_INPUT_ELF)_symbols_demangled.rs
++
++KERNEL_SYMBOLS_ELF      = target/$(TARGET)/release/kernel_symbols
++KERNEL_SYMBOLS_STRIPPED = target/$(TARGET)/release/kernel_symbols_stripped
++
++# Export for build.rs of kernel_symbols crate.
++export KERNEL_SYMBOLS_DEMANGLED_RS
++
++
++
++##--------------------------------------------------------------------------------------------------
++## Command building blocks
++##--------------------------------------------------------------------------------------------------
++GET_SYMBOLS_SECTION_VIRT_ADDR = $(DOCKER_TOOLS) $(EXEC_SYMBOLS_TOOL) \
++    --get_symbols_section_virt_addr $(KERNEL_SYMBOLS_OUTPUT_ELF)
++
++RUSTFLAGS = -C link-arg=--script=$(KERNEL_SYMBOLS_LINKER_SCRIPT) \
++    -C link-arg=--section-start=.rodata=$$($(GET_SYMBOLS_SECTION_VIRT_ADDR))
++
++RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) \
++    -D warnings                   \
++    -D missing_docs
++
++COMPILER_ARGS = --target=$(TARGET) \
++    --release
++
++RUSTC_CMD   = cargo rustc $(COMPILER_ARGS) --manifest-path $(KERNEL_SYMBOLS_MANIFEST)
++OBJCOPY_CMD = rust-objcopy \
++    --strip-all            \
++    -O binary
++
++EXEC_SYMBOLS_TOOL  = ruby $(KERNEL_SYMBOLS_TOOL_PATH)/main.rb
++
++##------------------------------------------------------------------------------
++## Dockerization
++##------------------------------------------------------------------------------
++DOCKER_CMD = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
++
++# DOCKER_IMAGE defined in include file (see top of this file).
++DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
++
++
++
++##--------------------------------------------------------------------------------------------------
++## Targets
++##--------------------------------------------------------------------------------------------------
++.PHONY: all
++
++all:
++	@cp $(KERNEL_SYMBOLS_INPUT_ELF) $(KERNEL_SYMBOLS_OUTPUT_ELF)
++
++	@$(DOCKER_TOOLS) $(EXEC_SYMBOLS_TOOL) --gen_symbols $(KERNEL_SYMBOLS_OUTPUT_ELF) \
++                $(KERNEL_SYMBOLS_RS)
++
++	$(call color_progress_prefix, "Demangling")
++	@echo Symbol names
++	@cat $(KERNEL_SYMBOLS_RS) | rustfilt > $(KERNEL_SYMBOLS_DEMANGLED_RS)
++
++	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
++
++	$(call color_progress_prefix, "Stripping")
++	@echo Symbols ELF file
++	@$(OBJCOPY_CMD) $(KERNEL_SYMBOLS_ELF) $(KERNEL_SYMBOLS_STRIPPED)
++
++	@$(DOCKER_TOOLS) $(EXEC_SYMBOLS_TOOL) --patch_data $(KERNEL_SYMBOLS_OUTPUT_ELF) \
++                $(KERNEL_SYMBOLS_STRIPPED)
+
+diff -uNr 16_virtual_mem_part4_higher_half_kernel/libraries/debug-symbol-types/Cargo.toml 17_kernel_symbols/libraries/debug-symbol-types/Cargo.toml
+--- 16_virtual_mem_part4_higher_half_kernel/libraries/debug-symbol-types/Cargo.toml
++++ 17_kernel_symbols/libraries/debug-symbol-types/Cargo.toml
+@@ -0,0 +1,4 @@
++[package]
++name = "debug-symbol-types"
++version = "0.1.0"
++edition = "2021"
+
+diff -uNr 16_virtual_mem_part4_higher_half_kernel/libraries/debug-symbol-types/src/lib.rs 17_kernel_symbols/libraries/debug-symbol-types/src/lib.rs
+--- 16_virtual_mem_part4_higher_half_kernel/libraries/debug-symbol-types/src/lib.rs
++++ 17_kernel_symbols/libraries/debug-symbol-types/src/lib.rs
+@@ -0,0 +1,39 @@
++// SPDX-License-Identifier: MIT OR Apache-2.0
++//
++// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++
++//! Types for implementing debug symbol support.
++
++#![no_std]
++
++use core::ops::Range;
++
++/// A symbol containing a size.
++#[repr(C)]
++pub struct Symbol {
++    addr_range: Range<usize>,
++    name: &'static str,
++}
++
++impl Symbol {
++    /// Create an instance.
++    pub const fn new(start: usize, size: usize, name: &'static str) -> Symbol {
++        Symbol {
++            addr_range: Range {
++                start,
++                end: start + size,
++            },
++            name,
++        }
++    }
++
++    /// Returns true if addr is contained in the range.
++    pub fn contains(&self, addr: usize) -> bool {
++        self.addr_range.contains(&addr)
++    }
++
++    /// Returns the symbol's name.
++    pub fn name(&self) -> &'static str {
++        self.name
++    }
++}
+
+diff -uNr 16_virtual_mem_part4_higher_half_kernel/Makefile 17_kernel_symbols/Makefile
+--- 16_virtual_mem_part4_higher_half_kernel/Makefile
++++ 17_kernel_symbols/Makefile
+@@ -84,7 +84,24 @@
+ KERNEL_ELF_TTABLES      = target/$(TARGET)/release/kernel+ttables
+ KERNEL_ELF_TTABLES_DEPS = $(KERNEL_ELF_RAW) $(wildcard $(TT_TOOL_PATH)/*)
+
+-KERNEL_ELF = $(KERNEL_ELF_TTABLES)
++##------------------------------------------------------------------------------
++## Kernel symbols
++##------------------------------------------------------------------------------
++export KERNEL_SYMBOLS_TOOL_PATH = tools/kernel_symbols_tool
++
++KERNEL_ELF_TTABLES_SYMS = target/$(TARGET)/release/kernel+ttables+symbols
++
++# Unlike with KERNEL_ELF_RAW, we are not relying on dep-info here. One of the reasons being that the
++# name of the generated symbols file varies between runs, which can cause confusion.
++KERNEL_ELF_TTABLES_SYMS_DEPS = $(KERNEL_ELF_TTABLES) \
++    $(wildcard kernel_symbols/*)                     \
++    $(wildcard $(KERNEL_SYMBOLS_TOOL_PATH)/*)
++
++export TARGET
++export KERNEL_SYMBOLS_INPUT_ELF  = $(KERNEL_ELF_TTABLES)
++export KERNEL_SYMBOLS_OUTPUT_ELF = $(KERNEL_ELF_TTABLES_SYMS)
++
++KERNEL_ELF = $(KERNEL_ELF_TTABLES_SYMS)
+
+
+
+@@ -178,11 +195,18 @@
+ 	@$(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(BSP) $(KERNEL_ELF_TTABLES)
+
+ ##------------------------------------------------------------------------------
++## Generate kernel symbols and patch them into the kernel ELF
++##------------------------------------------------------------------------------
++$(KERNEL_ELF_TTABLES_SYMS): $(KERNEL_ELF_TTABLES_SYMS_DEPS)
++	$(call color_header, "Generating kernel symbols and patching kernel ELF")
++	@$(MAKE) --no-print-directory -f kernel_symbols.mk
++
++##------------------------------------------------------------------------------
+ ## Generate the stripped kernel binary
+ ##------------------------------------------------------------------------------
+-$(KERNEL_BIN): $(KERNEL_ELF_TTABLES)
++$(KERNEL_BIN): $(KERNEL_ELF_TTABLES_SYMS)
+ 	$(call color_header, "Generating stripped binary")
+-	@$(OBJCOPY_CMD) $(KERNEL_ELF_TTABLES) $(KERNEL_BIN)
++	@$(OBJCOPY_CMD) $(KERNEL_ELF_TTABLES_SYMS) $(KERNEL_BIN)
+ 	$(call color_progress_prefix, "Name")
+ 	@echo $(KERNEL_BIN)
+ 	$(call color_progress_prefix, "Size")
+@@ -319,10 +343,19 @@
+     cd $(shell pwd)
+
+     TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
++    TEST_ELF_SYMS="$${TEST_ELF}_syms"
+     TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
+
+     $(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(BSP) $$TEST_ELF > /dev/null
+-    $(OBJCOPY_CMD) $$TEST_ELF $$TEST_BINARY
++
++    # This overrides the two ENV variables. The other ENV variables that are required as input for
++    # the .mk file are set already because they are exported by this Makefile and this script is
++    # started by the same.
++    KERNEL_SYMBOLS_INPUT_ELF=$$TEST_ELF           \
++        KERNEL_SYMBOLS_OUTPUT_ELF=$$TEST_ELF_SYMS \
++	$(MAKE) --no-print-directory -f kernel_symbols.mk
++
++    $(OBJCOPY_CMD) $$TEST_ELF_SYMS $$TEST_BINARY
+     $(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
+ endef
+
+
+diff -uNr 16_virtual_mem_part4_higher_half_kernel/tools/kernel_symbols_tool/cmds.rb 17_kernel_symbols/tools/kernel_symbols_tool/cmds.rb
+--- 16_virtual_mem_part4_higher_half_kernel/tools/kernel_symbols_tool/cmds.rb
++++ 17_kernel_symbols/tools/kernel_symbols_tool/cmds.rb
+@@ -0,0 +1,45 @@
++# frozen_string_literal: true
++
++# SPDX-License-Identifier: MIT OR Apache-2.0
++#
++# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++
++def generate_symbols(kernel_elf, output_file)
++    File.open(output_file, 'w') do |file|
++        header = <<~HEREDOC
++            use debug_symbol_types::Symbol;
++
++            # [no_mangle]
++            # [link_section = ".rodata.symbol_desc"]
++            static KERNEL_SYMBOLS: [Symbol; #{kernel_elf.num_symbols}] = [
++        HEREDOC
++
++        file.write(header)
++        kernel_elf.symbols.each do |sym|
++            value = sym.header.st_value
++            size = sym.header.st_size
++            name = sym.name
++
++            file.write("    Symbol::new(#{value}, #{size}, \"#{name}\"),\n")
++        end
++        file.write("];\n")
++    end
++end
++
++def get_symbols_section_virt_addr(kernel_elf)
++    kernel_elf.kernel_symbols_section_virt_addr
++end
++
++def patch_symbol_data(kernel_elf, symbols_blob_path)
++    symbols_blob = File.binread(symbols_blob_path)
++
++    raise if symbols_blob.size > kernel_elf.kernel_symbols_section_size
++
++    File.binwrite(kernel_elf.path, File.binread(symbols_blob_path),
++                  kernel_elf.kernel_symbols_section_offset_in_file)
++end
++
++def patch_num_symbols(kernel_elf)
++    num_packed = [kernel_elf.num_symbols].pack('Q<*') # "Q" == uint64_t, "<" == little endian
++    File.binwrite(kernel_elf.path, num_packed, kernel_elf.num_kernel_symbols_offset_in_file)
++end
+
+diff -uNr 16_virtual_mem_part4_higher_half_kernel/tools/kernel_symbols_tool/kernel_elf.rb 17_kernel_symbols/tools/kernel_symbols_tool/kernel_elf.rb
+--- 16_virtual_mem_part4_higher_half_kernel/tools/kernel_symbols_tool/kernel_elf.rb
++++ 17_kernel_symbols/tools/kernel_symbols_tool/kernel_elf.rb
+@@ -0,0 +1,74 @@
++# frozen_string_literal: true
++
++# SPDX-License-Identifier: MIT OR Apache-2.0
++#
++# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
++
++# KernelELF
++class KernelELF
++    attr_reader :path
++
++    def initialize(kernel_elf_path, kernel_symbols_section, num_kernel_symbols)
++        @elf = ELFTools::ELFFile.new(File.open(kernel_elf_path))
++        @symtab_section = @elf.section_by_name('.symtab')
++
++        @path = kernel_elf_path
++        fetch_values(kernel_symbols_section, num_kernel_symbols)
++    end
++
++    private
++
++    def fetch_values(kernel_symbols_section, num_kernel_symbols)
++        sym = @symtab_section.symbol_by_name(num_kernel_symbols)
++        raise "Symbol \"#{num_kernel_symbols}\" not found" if sym.nil?
++
++        @num_kernel_symbols = sym
++
++        section = @elf.section_by_name(kernel_symbols_section)
++        raise "Section \"#{kernel_symbols_section}\" not found" if section.nil?
++
++        @kernel_symbols_section = section
++    end
++
++    def num_kernel_symbols_virt_addr
++        @num_kernel_symbols.header.st_value
++    end
++
++    def segment_containing_virt_addr(virt_addr)
++        @elf.each_segments do |segment|
++            return segment if segment.vma_in?(virt_addr)
++        end
++    end
++
++    def virt_addr_to_file_offset(virt_addr)
++        segment = segment_containing_virt_addr(virt_addr)
++        segment.vma_to_offset(virt_addr)
++    end
++
++    public
++
++    def symbols
++        non_zero_symbols = @symtab_section.symbols.reject { |sym| sym.header.st_size.zero? }
++        non_zero_symbols.sort_by { |sym| sym.header.st_value }
++    end
++
++    def num_symbols
++        symbols.size
++    end
++
++    def kernel_symbols_section_virt_addr
++        @kernel_symbols_section.header.sh_addr.to_i
++    end
++
++    def kernel_symbols_section_size
++        @kernel_symbols_section.header.sh_size.to_i
++    end
++
++    def kernel_symbols_section_offset_in_file
++        virt_addr_to_file_offset(kernel_symbols_section_virt_addr)
++    end
++
++    def num_kernel_symbols_offset_in_file
++        virt_addr_to_file_offset(num_kernel_symbols_virt_addr)
++    end
++end
+
+diff -uNr 16_virtual_mem_part4_higher_half_kernel/tools/kernel_symbols_tool/main.rb 17_kernel_symbols/tools/kernel_symbols_tool/main.rb
+--- 16_virtual_mem_part4_higher_half_kernel/tools/kernel_symbols_tool/main.rb
++++ 17_kernel_symbols/tools/kernel_symbols_tool/main.rb
+@@ -0,0 +1,47 @@
++#!/usr/bin/env ruby
++# frozen_string_literal: true
++
++# SPDX-License-Identifier: MIT OR Apache-2.0
++#
++# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++
++require 'rubygems'
++require 'bundler/setup'
++require 'colorize'
++require 'elftools'
++
++require_relative 'kernel_elf'
++require_relative 'cmds'
++
++KERNEL_SYMBOLS_SECTION = '.kernel_symbols'
++NUM_KERNEL_SYMBOLS = 'NUM_KERNEL_SYMBOLS'
++
++cmd = ARGV[0]
++
++kernel_elf_path = ARGV[1]
++kernel_elf = KernelELF.new(kernel_elf_path, KERNEL_SYMBOLS_SECTION, NUM_KERNEL_SYMBOLS)
++
++case cmd
++when '--gen_symbols'
++    output_file = ARGV[2]
++
++    print 'Generating'.rjust(12).green.bold
++    puts ' Symbols source file'
++
++    generate_symbols(kernel_elf, output_file)
++when '--get_symbols_section_virt_addr'
++    addr = get_symbols_section_virt_addr(kernel_elf)
++
++    puts "0x#{addr.to_s(16)}"
++when '--patch_data'
++    symbols_blob_path = ARGV[2]
++    num_symbols = kernel_elf.num_symbols
++
++    print 'Patching'.rjust(12).green.bold
++    puts " Symbols blob and number of symbols (#{num_symbols}) into ELF"
++
++    patch_symbol_data(kernel_elf, symbols_blob_path)
++    patch_num_symbols(kernel_elf)
++else
++    raise
++end
+
+```
diff --git a/17_kernel_symbols/kernel/Cargo.toml b/17_kernel_symbols/kernel/Cargo.toml
new file mode 100644
index 000000000..c040d60c5
--- /dev/null
+++ b/17_kernel_symbols/kernel/Cargo.toml
@@ -0,0 +1,58 @@
+[package]
+name = "mingo"
+version = "0.17.0"
+authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+edition = "2021"
+
+[features]
+default = []
+bsp_rpi3 = ["tock-registers"]
+bsp_rpi4 = ["tock-registers"]
+test_build = ["qemu-exit"]
+
+##--------------------------------------------------------------------------------------------------
+## Dependencies
+##--------------------------------------------------------------------------------------------------
+
+[dependencies]
+test-types = { path = "../libraries/test-types" }
+debug-symbol-types = { path = "../libraries/debug-symbol-types" }
+
+# Optional dependencies
+tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
+qemu-exit = { version = "3.x.x", optional = true }
+
+# Platform specific dependencies
+[target.'cfg(target_arch = "aarch64")'.dependencies]
+cortex-a = { version = "7.x.x" }
+
+##--------------------------------------------------------------------------------------------------
+## Testing
+##--------------------------------------------------------------------------------------------------
+
+[dev-dependencies]
+test-macros = { path = "../libraries/test-macros" }
+
+# Unit tests are done in the library part of the kernel.
+[lib]
+name = "libkernel"
+test = true
+
+# Disable unit tests for the kernel binary.
+[[bin]]
+name = "kernel"
+path = "src/main.rs"
+test = false
+
+# List of tests without harness.
+[[test]]
+name = "00_console_sanity"
+harness = false
+
+[[test]]
+name = "02_exception_sync_page_fault"
+harness = false
+
+[[test]]
+name = "03_exception_restore_sanity"
+harness = false
diff --git a/17_kernel_symbols/kernel/build.rs b/17_kernel_symbols/kernel/build.rs
new file mode 100644
index 000000000..cab00bb37
--- /dev/null
+++ b/17_kernel_symbols/kernel/build.rs
@@ -0,0 +1,20 @@
+use std::{env, fs, process};
+
+fn main() {
+    let ld_script_path = match env::var("LD_SCRIPT_PATH") {
+        Ok(var) => var,
+        _ => process::exit(0),
+    };
+
+    let files = fs::read_dir(ld_script_path).unwrap();
+    files
+        .filter_map(Result::ok)
+        .filter(|d| {
+            if let Some(e) = d.path().extension() {
+                e == "ld"
+            } else {
+                false
+            }
+        })
+        .for_each(|f| println!("cargo:rerun-if-changed={}", f.path().display()));
+}
diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/cpu.rs b/17_kernel_symbols/kernel/src/_arch/aarch64/cpu.rs
new file mode 100644
index 000000000..66da661c7
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/_arch/aarch64/cpu.rs
@@ -0,0 +1,49 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural processor code.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::arch_cpu
+
+use cortex_a::asm;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+pub use asm::nop;
+
+/// Pause execution on the core.
+#[inline(always)]
+pub fn wait_forever() -> ! {
+    loop {
+        asm::wfe()
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+#[cfg(feature = "test_build")]
+use qemu_exit::QEMUExit;
+
+#[cfg(feature = "test_build")]
+const QEMU_EXIT_HANDLE: qemu_exit::AArch64 = qemu_exit::AArch64::new();
+
+/// Make the host QEMU binary execute `exit(1)`.
+#[cfg(feature = "test_build")]
+pub fn qemu_exit_failure() -> ! {
+    QEMU_EXIT_HANDLE.exit_failure()
+}
+
+/// Make the host QEMU binary execute `exit(0)`.
+#[cfg(feature = "test_build")]
+pub fn qemu_exit_success() -> ! {
+    QEMU_EXIT_HANDLE.exit_success()
+}
diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.rs b/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.rs
new file mode 100644
index 000000000..3d01b0dcc
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.rs
@@ -0,0 +1,95 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural boot code.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::boot::arch_boot
+
+use crate::{memory, memory::Address};
+use core::arch::global_asm;
+use cortex_a::{asm, registers::*};
+use tock_registers::interfaces::Writeable;
+
+// Assembly counterpart to this file.
+global_asm!(include_str!("boot.s"));
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// Prepares the transition from EL2 to EL1.
+///
+/// # Safety
+///
+/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
+/// - The HW state of EL1 must be prepared in a sound way.
+#[inline(always)]
+unsafe fn prepare_el2_to_el1_transition(
+    virt_boot_core_stack_end_exclusive_addr: u64,
+    virt_kernel_init_addr: u64,
+) {
+    // Enable timer counter registers for EL1.
+    CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
+
+    // No offset for reading the counters.
+    CNTVOFF_EL2.set(0);
+
+    // Set EL1 execution state to AArch64.
+    HCR_EL2.write(HCR_EL2::RW::EL1IsAarch64);
+
+    // Set up a simulated exception return.
+    //
+    // First, fake a saved program status where all interrupts were masked and SP_EL1 was used as a
+    // stack pointer.
+    SPSR_EL2.write(
+        SPSR_EL2::D::Masked
+            + SPSR_EL2::A::Masked
+            + SPSR_EL2::I::Masked
+            + SPSR_EL2::F::Masked
+            + SPSR_EL2::M::EL1h,
+    );
+
+    // Second, let the link register point to kernel_init().
+    ELR_EL2.set(virt_kernel_init_addr);
+
+    // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it. Since there
+    // are no plans to ever return to EL2, just re-use the same stack.
+    SP_EL1.set(virt_boot_core_stack_end_exclusive_addr);
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The Rust entry of the `kernel` binary.
+///
+/// The function is called from the assembly `_start` function.
+///
+/// # Safety
+///
+/// - Exception return from EL2 must must continue execution in EL1 with `kernel_init()`.
+#[no_mangle]
+pub unsafe extern "C" fn _start_rust(
+    phys_kernel_tables_base_addr: u64,
+    virt_boot_core_stack_end_exclusive_addr: u64,
+    virt_kernel_init_addr: u64,
+) -> ! {
+    prepare_el2_to_el1_transition(
+        virt_boot_core_stack_end_exclusive_addr,
+        virt_kernel_init_addr,
+    );
+
+    // Turn on the MMU for EL1.
+    let addr = Address::new(phys_kernel_tables_base_addr as usize);
+    memory::mmu::enable_mmu_and_caching(addr).unwrap();
+
+    // Use `eret` to "return" to EL1. Since virtual memory will already be enabled, this results in
+    // execution of kernel_init() in EL1 from its _virtual address_.
+    asm::eret()
+}
diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.s b/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.s
new file mode 100644
index 000000000..d2c9270d0
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.s
@@ -0,0 +1,100 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//--------------------------------------------------------------------------------------------------
+// Definitions
+//--------------------------------------------------------------------------------------------------
+
+// Load the address of a symbol into a register, PC-relative.
+//
+// The symbol must lie within +/- 4 GiB of the Program Counter.
+//
+// # Resources
+//
+// - https://sourceware.org/binutils/docs-2.36/as/AArch64_002dRelocations.html
+.macro ADR_REL register, symbol
+	adrp	\register, \symbol
+	add	\register, \register, #:lo12:\symbol
+.endm
+
+// Load the address of a symbol into a register, absolute.
+//
+// # Resources
+//
+// - https://sourceware.org/binutils/docs-2.36/as/AArch64_002dRelocations.html
+.macro ADR_ABS register, symbol
+	movz	\register, #:abs_g3:\symbol
+	movk	\register, #:abs_g2_nc:\symbol
+	movk	\register, #:abs_g1_nc:\symbol
+	movk	\register, #:abs_g0_nc:\symbol
+.endm
+
+.equ _EL2, 0x8
+.equ _core_id_mask, 0b11
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+.section .text._start
+
+//------------------------------------------------------------------------------
+// fn _start()
+//------------------------------------------------------------------------------
+_start:
+	// Only proceed if the core executes in EL2. Park it otherwise.
+	mrs	x0, CurrentEL
+	cmp	x0, _EL2
+	b.ne	.L_parking_loop
+
+	// Only proceed on the boot core. Park it otherwise.
+	mrs	x1, MPIDR_EL1
+	and	x1, x1, _core_id_mask
+	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
+	cmp	x1, x2
+	b.ne	.L_parking_loop
+
+	// If execution reaches here, it is the boot core.
+
+	// Initialize DRAM.
+	ADR_REL	x0, __bss_start
+	ADR_REL x1, __bss_end_exclusive
+
+.L_bss_init_loop:
+	cmp	x0, x1
+	b.eq	.L_prepare_rust
+	stp	xzr, xzr, [x0], #16
+	b	.L_bss_init_loop
+
+	// Prepare the jump to Rust code.
+.L_prepare_rust:
+	// Load the base address of the kernel's translation tables.
+	ldr	x0, PHYS_KERNEL_TABLES_BASE_ADDR // provided by bsp/__board_name__/memory/mmu.rs
+
+	// Load the _absolute_ addresses of the following symbols. Since the kernel is linked at
+	// the top of the 64 bit address space, these are effectively virtual addresses.
+	ADR_ABS	x1, __boot_core_stack_end_exclusive
+	ADR_ABS	x2, kernel_init
+
+	// Load the PC-relative address of the stack and set the stack pointer.
+	//
+	// Since _start() is the first function that runs after the firmware has loaded the kernel
+	// into memory, retrieving this symbol PC-relative returns the "physical" address.
+	//
+	// Setting the stack pointer to this value ensures that anything that still runs in EL2,
+	// until the kernel returns to EL1 with the MMU enabled, works as well. After the return to
+	// EL1, the virtual address of the stack retrieved above will be used.
+	ADR_REL	x4, __boot_core_stack_end_exclusive
+	mov	sp, x4
+
+	// Jump to Rust code. x0, x1 and x2 hold the function arguments provided to _start_rust().
+	b	_start_rust
+
+	// Infinitely wait for events (aka "park the core").
+.L_parking_loop:
+	wfe
+	b	.L_parking_loop
+
+.size	_start, . - _start
+.type	_start, function
+.global	_start
diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/smp.rs b/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/smp.rs
new file mode 100644
index 000000000..351fde62e
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/smp.rs
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural symmetric multiprocessing.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::smp::arch_smp
+
+use cortex_a::registers::*;
+use tock_registers::interfaces::Readable;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return the executing core's id.
+#[inline(always)]
+pub fn core_id<T>() -> T
+where
+    T: From<u8>,
+{
+    const CORE_MASK: u64 = 0b11;
+
+    T::from((MPIDR_EL1.get() & CORE_MASK) as u8)
+}
diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/exception.rs b/17_kernel_symbols/kernel/src/_arch/aarch64/exception.rs
new file mode 100644
index 000000000..3515d9560
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/_arch/aarch64/exception.rs
@@ -0,0 +1,321 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural synchronous and asynchronous exception handling.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::exception::arch_exception
+
+use crate::{bsp, exception, memory, symbols};
+use core::{arch::global_asm, cell::UnsafeCell, fmt};
+use cortex_a::{asm::barrier, registers::*};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    registers::InMemoryRegister,
+};
+
+// Assembly counterpart to this file.
+global_asm!(include_str!("exception.s"));
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Wrapper structs for memory copies of registers.
+#[repr(transparent)]
+struct SpsrEL1(InMemoryRegister<u64, SPSR_EL1::Register>);
+struct EsrEL1(InMemoryRegister<u64, ESR_EL1::Register>);
+
+/// The exception context as it is stored on the stack on exception entry.
+#[repr(C)]
+struct ExceptionContext {
+    /// General Purpose Registers.
+    gpr: [u64; 30],
+
+    /// The link register, aka x30.
+    lr: u64,
+
+    /// Exception link register. The program counter at the time the exception happened.
+    elr_el1: u64,
+
+    /// Saved program status.
+    spsr_el1: SpsrEL1,
+
+    // Exception syndrome register.
+    esr_el1: EsrEL1,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// Prints verbose information about the exception and then panics.
+fn default_exception_handler(exc: &ExceptionContext) {
+    panic!(
+        "CPU Exception!\n\n\
+        {}",
+        exc
+    );
+}
+
+//------------------------------------------------------------------------------
+// Current, EL0
+//------------------------------------------------------------------------------
+
+#[no_mangle]
+unsafe extern "C" fn current_el0_synchronous(_e: &mut ExceptionContext) {
+    panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
+}
+
+#[no_mangle]
+unsafe extern "C" fn current_el0_irq(_e: &mut ExceptionContext) {
+    panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
+}
+
+#[no_mangle]
+unsafe extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
+    panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
+}
+
+//------------------------------------------------------------------------------
+// Current, ELx
+//------------------------------------------------------------------------------
+
+#[no_mangle]
+unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
+    #[cfg(feature = "test_build")]
+    {
+        const TEST_SVC_ID: u64 = 0x1337;
+
+        if let Some(ESR_EL1::EC::Value::SVC64) = e.esr_el1.exception_class() {
+            if e.esr_el1.iss() == TEST_SVC_ID {
+                return;
+            }
+        }
+    }
+
+    default_exception_handler(e);
+}
+
+#[no_mangle]
+unsafe extern "C" fn current_elx_irq(_e: &mut ExceptionContext) {
+    use exception::asynchronous::interface::IRQManager;
+
+    let token = &exception::asynchronous::IRQContext::new();
+    bsp::exception::asynchronous::irq_manager().handle_pending_irqs(token);
+}
+
+#[no_mangle]
+unsafe extern "C" fn current_elx_serror(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+//------------------------------------------------------------------------------
+// Lower, AArch64
+//------------------------------------------------------------------------------
+
+#[no_mangle]
+unsafe extern "C" fn lower_aarch64_synchronous(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+#[no_mangle]
+unsafe extern "C" fn lower_aarch64_irq(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+#[no_mangle]
+unsafe extern "C" fn lower_aarch64_serror(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+//------------------------------------------------------------------------------
+// Lower, AArch32
+//------------------------------------------------------------------------------
+
+#[no_mangle]
+unsafe extern "C" fn lower_aarch32_synchronous(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+#[no_mangle]
+unsafe extern "C" fn lower_aarch32_irq(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+#[no_mangle]
+unsafe extern "C" fn lower_aarch32_serror(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+//------------------------------------------------------------------------------
+// Misc
+//------------------------------------------------------------------------------
+
+/// Human readable SPSR_EL1.
+#[rustfmt::skip]
+impl fmt::Display for SpsrEL1 {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        // Raw value.
+        writeln!(f, "SPSR_EL1: {:#010x}", self.0.get())?;
+
+        let to_flag_str = |x| -> _ {
+            if x { "Set" } else { "Not set" }
+         };
+
+        writeln!(f, "      Flags:")?;
+        writeln!(f, "            Negative (N): {}", to_flag_str(self.0.is_set(SPSR_EL1::N)))?;
+        writeln!(f, "            Zero     (Z): {}", to_flag_str(self.0.is_set(SPSR_EL1::Z)))?;
+        writeln!(f, "            Carry    (C): {}", to_flag_str(self.0.is_set(SPSR_EL1::C)))?;
+        writeln!(f, "            Overflow (V): {}", to_flag_str(self.0.is_set(SPSR_EL1::V)))?;
+
+        let to_mask_str = |x| -> _ {
+            if x { "Masked" } else { "Unmasked" }
+        };
+
+        writeln!(f, "      Exception handling state:")?;
+        writeln!(f, "            Debug  (D): {}", to_mask_str(self.0.is_set(SPSR_EL1::D)))?;
+        writeln!(f, "            SError (A): {}", to_mask_str(self.0.is_set(SPSR_EL1::A)))?;
+        writeln!(f, "            IRQ    (I): {}", to_mask_str(self.0.is_set(SPSR_EL1::I)))?;
+        writeln!(f, "            FIQ    (F): {}", to_mask_str(self.0.is_set(SPSR_EL1::F)))?;
+
+        write!(f, "      Illegal Execution State (IL): {}",
+            to_flag_str(self.0.is_set(SPSR_EL1::IL))
+        )
+    }
+}
+
+impl EsrEL1 {
+    #[inline(always)]
+    fn exception_class(&self) -> Option<ESR_EL1::EC::Value> {
+        self.0.read_as_enum(ESR_EL1::EC)
+    }
+
+    #[cfg(feature = "test_build")]
+    #[inline(always)]
+    fn iss(&self) -> u64 {
+        self.0.read(ESR_EL1::ISS)
+    }
+}
+
+/// Human readable ESR_EL1.
+#[rustfmt::skip]
+impl fmt::Display for EsrEL1 {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        // Raw print of whole register.
+        writeln!(f, "ESR_EL1: {:#010x}", self.0.get())?;
+
+        // Raw print of exception class.
+        write!(f, "      Exception Class         (EC) : {:#x}", self.0.read(ESR_EL1::EC))?;
+
+        // Exception class.
+        let ec_translation = match self.exception_class() {
+            Some(ESR_EL1::EC::Value::DataAbortCurrentEL) => "Data Abort, current EL",
+            _ => "N/A",
+        };
+        writeln!(f, " - {}", ec_translation)?;
+
+        // Raw print of instruction specific syndrome.
+        write!(f, "      Instr Specific Syndrome (ISS): {:#x}", self.0.read(ESR_EL1::ISS))
+    }
+}
+
+impl ExceptionContext {
+    #[inline(always)]
+    fn exception_class(&self) -> Option<ESR_EL1::EC::Value> {
+        self.esr_el1.exception_class()
+    }
+
+    #[inline(always)]
+    fn fault_address_valid(&self) -> bool {
+        use ESR_EL1::EC::Value::*;
+
+        match self.exception_class() {
+            None => false,
+            Some(ec) => matches!(
+                ec,
+                InstrAbortLowerEL
+                    | InstrAbortCurrentEL
+                    | PCAlignmentFault
+                    | DataAbortLowerEL
+                    | DataAbortCurrentEL
+                    | WatchpointLowerEL
+                    | WatchpointCurrentEL
+            ),
+        }
+    }
+}
+
+/// Human readable print of the exception context.
+impl fmt::Display for ExceptionContext {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        writeln!(f, "{}", self.esr_el1)?;
+
+        if self.fault_address_valid() {
+            writeln!(f, "FAR_EL1: {:#018x}", FAR_EL1.get() as usize)?;
+        }
+
+        writeln!(f, "{}", self.spsr_el1)?;
+        writeln!(f, "ELR_EL1: {:#018x}", self.elr_el1)?;
+        writeln!(
+            f,
+            "      Symbol: {}",
+            symbols::lookup_symbol(memory::Address::new(self.elr_el1 as usize))
+                .unwrap_or("Symbol not found")
+        )?;
+        writeln!(f)?;
+        writeln!(f, "General purpose register:")?;
+
+        #[rustfmt::skip]
+        let alternating = |x| -> _ {
+            if x % 2 == 0 { "   " } else { "\n" }
+        };
+
+        // Print two registers per line.
+        for (i, reg) in self.gpr.iter().enumerate() {
+            write!(f, "      x{: <2}: {: >#018x}{}", i, reg, alternating(i))?;
+        }
+        write!(f, "      lr : {:#018x}", self.lr)
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+use crate::exception::PrivilegeLevel;
+
+/// The processing element's current privilege level.
+pub fn current_privilege_level() -> (PrivilegeLevel, &'static str) {
+    let el = CurrentEL.read_as_enum(CurrentEL::EL);
+    match el {
+        Some(CurrentEL::EL::Value::EL2) => (PrivilegeLevel::Hypervisor, "EL2"),
+        Some(CurrentEL::EL::Value::EL1) => (PrivilegeLevel::Kernel, "EL1"),
+        Some(CurrentEL::EL::Value::EL0) => (PrivilegeLevel::User, "EL0"),
+        _ => (PrivilegeLevel::Unknown, "Unknown"),
+    }
+}
+
+/// Init exception handling by setting the exception vector base address register.
+///
+/// # Safety
+///
+/// - Changes the HW state of the executing core.
+/// - The vector table and the symbol `__exception_vector_table_start` from the linker script must
+///   adhere to the alignment and size constraints demanded by the ARMv8-A Architecture Reference
+///   Manual.
+pub unsafe fn handling_init() {
+    // Provided by exception.S.
+    extern "Rust" {
+        static __exception_vector_start: UnsafeCell<()>;
+    }
+
+    VBAR_EL1.set(__exception_vector_start.get() as u64);
+
+    // Force VBAR update to complete before next instruction.
+    barrier::isb(barrier::SY);
+}
diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/exception.s b/17_kernel_symbols/kernel/src/_arch/aarch64/exception.s
new file mode 100644
index 000000000..5aae30b9c
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/_arch/aarch64/exception.s
@@ -0,0 +1,150 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//--------------------------------------------------------------------------------------------------
+// Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Call the function provided by parameter `\handler` after saving the exception context. Provide
+/// the context as the first parameter to '\handler'.
+.macro CALL_WITH_CONTEXT handler
+	// Make room on the stack for the exception context.
+	sub	sp,  sp,  #16 * 17
+
+	// Store all general purpose registers on the stack.
+	stp	x0,  x1,  [sp, #16 * 0]
+	stp	x2,  x3,  [sp, #16 * 1]
+	stp	x4,  x5,  [sp, #16 * 2]
+	stp	x6,  x7,  [sp, #16 * 3]
+	stp	x8,  x9,  [sp, #16 * 4]
+	stp	x10, x11, [sp, #16 * 5]
+	stp	x12, x13, [sp, #16 * 6]
+	stp	x14, x15, [sp, #16 * 7]
+	stp	x16, x17, [sp, #16 * 8]
+	stp	x18, x19, [sp, #16 * 9]
+	stp	x20, x21, [sp, #16 * 10]
+	stp	x22, x23, [sp, #16 * 11]
+	stp	x24, x25, [sp, #16 * 12]
+	stp	x26, x27, [sp, #16 * 13]
+	stp	x28, x29, [sp, #16 * 14]
+
+	// Add the exception link register (ELR_EL1), saved program status (SPSR_EL1) and exception
+	// syndrome register (ESR_EL1).
+	mrs	x1,  ELR_EL1
+	mrs	x2,  SPSR_EL1
+	mrs	x3,  ESR_EL1
+
+	stp	lr,  x1,  [sp, #16 * 15]
+	stp	x2,  x3,  [sp, #16 * 16]
+
+	// x0 is the first argument for the function called through `\handler`.
+	mov	x0,  sp
+
+	// Call `\handler`.
+	bl	\handler
+
+	// After returning from exception handling code, replay the saved context and return via
+	// `eret`.
+	b	__exception_restore_context
+.endm
+
+.macro FIQ_SUSPEND
+1:	wfe
+	b	1b
+.endm
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+.section .text
+
+//------------------------------------------------------------------------------
+// The exception vector table.
+//------------------------------------------------------------------------------
+
+// Align by 2^11 bytes, as demanded by ARMv8-A. Same as ALIGN(2048) in an ld script.
+.align 11
+
+// Export a symbol for the Rust code to use.
+__exception_vector_start:
+
+// Current exception level with SP_EL0.
+//
+// .org sets the offset relative to section start.
+//
+// # Safety
+//
+// - It must be ensured that `CALL_WITH_CONTEXT` <= 0x80 bytes.
+.org 0x000
+	CALL_WITH_CONTEXT current_el0_synchronous
+.org 0x080
+	CALL_WITH_CONTEXT current_el0_irq
+.org 0x100
+	FIQ_SUSPEND
+.org 0x180
+	CALL_WITH_CONTEXT current_el0_serror
+
+// Current exception level with SP_ELx, x > 0.
+.org 0x200
+	CALL_WITH_CONTEXT current_elx_synchronous
+.org 0x280
+	CALL_WITH_CONTEXT current_elx_irq
+.org 0x300
+	FIQ_SUSPEND
+.org 0x380
+	CALL_WITH_CONTEXT current_elx_serror
+
+// Lower exception level, AArch64
+.org 0x400
+	CALL_WITH_CONTEXT lower_aarch64_synchronous
+.org 0x480
+	CALL_WITH_CONTEXT lower_aarch64_irq
+.org 0x500
+	FIQ_SUSPEND
+.org 0x580
+	CALL_WITH_CONTEXT lower_aarch64_serror
+
+// Lower exception level, AArch32
+.org 0x600
+	CALL_WITH_CONTEXT lower_aarch32_synchronous
+.org 0x680
+	CALL_WITH_CONTEXT lower_aarch32_irq
+.org 0x700
+	FIQ_SUSPEND
+.org 0x780
+	CALL_WITH_CONTEXT lower_aarch32_serror
+.org 0x800
+
+//------------------------------------------------------------------------------
+// fn __exception_restore_context()
+//------------------------------------------------------------------------------
+__exception_restore_context:
+	ldr	w19,      [sp, #16 * 16]
+	ldp	lr,  x20, [sp, #16 * 15]
+
+	msr	SPSR_EL1, x19
+	msr	ELR_EL1,  x20
+
+	ldp	x0,  x1,  [sp, #16 * 0]
+	ldp	x2,  x3,  [sp, #16 * 1]
+	ldp	x4,  x5,  [sp, #16 * 2]
+	ldp	x6,  x7,  [sp, #16 * 3]
+	ldp	x8,  x9,  [sp, #16 * 4]
+	ldp	x10, x11, [sp, #16 * 5]
+	ldp	x12, x13, [sp, #16 * 6]
+	ldp	x14, x15, [sp, #16 * 7]
+	ldp	x16, x17, [sp, #16 * 8]
+	ldp	x18, x19, [sp, #16 * 9]
+	ldp	x20, x21, [sp, #16 * 10]
+	ldp	x22, x23, [sp, #16 * 11]
+	ldp	x24, x25, [sp, #16 * 12]
+	ldp	x26, x27, [sp, #16 * 13]
+	ldp	x28, x29, [sp, #16 * 14]
+
+	add	sp,  sp,  #16 * 17
+
+	eret
+
+.size	__exception_restore_context, . - __exception_restore_context
+.type	__exception_restore_context, function
diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/exception/asynchronous.rs b/17_kernel_symbols/kernel/src/_arch/aarch64/exception/asynchronous.rs
new file mode 100644
index 000000000..73b82e65d
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/_arch/aarch64/exception/asynchronous.rs
@@ -0,0 +1,152 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural asynchronous exception handling.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::exception::asynchronous::arch_asynchronous
+
+use core::arch::asm;
+use cortex_a::registers::*;
+use tock_registers::interfaces::{Readable, Writeable};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+mod daif_bits {
+    pub const IRQ: u8 = 0b0010;
+}
+
+trait DaifField {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register>;
+}
+
+struct Debug;
+struct SError;
+struct IRQ;
+struct FIQ;
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl DaifField for Debug {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
+        DAIF::D
+    }
+}
+
+impl DaifField for SError {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
+        DAIF::A
+    }
+}
+
+impl DaifField for IRQ {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
+        DAIF::I
+    }
+}
+
+impl DaifField for FIQ {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
+        DAIF::F
+    }
+}
+
+fn is_masked<T>() -> bool
+where
+    T: DaifField,
+{
+    DAIF.is_set(T::daif_field())
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Returns whether IRQs are masked on the executing core.
+pub fn is_local_irq_masked() -> bool {
+    !is_masked::<IRQ>()
+}
+
+/// Unmask IRQs on the executing core.
+///
+/// It is not needed to place an explicit instruction synchronization barrier after the `msr`.
+/// Quoting the Architecture Reference Manual for ARMv8-A, section C5.1.3:
+///
+/// "Writes to PSTATE.{PAN, D, A, I, F} occur in program order without the need for additional
+/// synchronization."
+///
+/// # Safety
+///
+/// - Changes the HW state of the executing core.
+#[inline(always)]
+pub unsafe fn local_irq_unmask() {
+    #[rustfmt::skip]
+    asm!(
+        "msr DAIFClr, {arg}",
+        arg = const daif_bits::IRQ,
+        options(nomem, nostack, preserves_flags)
+    );
+}
+
+/// Mask IRQs on the executing core.
+///
+/// # Safety
+///
+/// - Changes the HW state of the executing core.
+#[inline(always)]
+pub unsafe fn local_irq_mask() {
+    #[rustfmt::skip]
+    asm!(
+        "msr DAIFSet, {arg}",
+        arg = const daif_bits::IRQ,
+        options(nomem, nostack, preserves_flags)
+    );
+}
+
+/// Mask IRQs on the executing core and return the previously saved interrupt mask bits (DAIF).
+///
+/// # Safety
+///
+/// - Changes the HW state of the executing core.
+#[inline(always)]
+pub unsafe fn local_irq_mask_save() -> u64 {
+    let saved = DAIF.get();
+    local_irq_mask();
+
+    saved
+}
+
+/// Restore the interrupt mask bits (DAIF) using the callee's argument.
+///
+/// # Safety
+///
+/// - Changes the HW state of the executing core.
+/// - No sanity checks on the input.
+#[inline(always)]
+pub unsafe fn local_irq_restore(saved: u64) {
+    DAIF.set(saved);
+}
+
+/// Print the AArch64 exceptions status.
+#[rustfmt::skip]
+pub fn print_state() {
+    use crate::info;
+
+    let to_mask_str = |x| -> _ {
+        if x { "Masked" } else { "Unmasked" }
+    };
+
+    info!("      Debug:  {}", to_mask_str(is_masked::<Debug>()));
+    info!("      SError: {}", to_mask_str(is_masked::<SError>()));
+    info!("      IRQ:    {}", to_mask_str(is_masked::<IRQ>()));
+    info!("      FIQ:    {}", to_mask_str(is_masked::<FIQ>()));
+}
diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/memory/mmu.rs b/17_kernel_symbols/kernel/src/_arch/aarch64/memory/mmu.rs
new file mode 100644
index 000000000..3d6c18b74
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/_arch/aarch64/memory/mmu.rs
@@ -0,0 +1,158 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Memory Management Unit Driver.
+//!
+//! Only 64 KiB granule is supported.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::memory::mmu::arch_mmu
+
+use crate::{
+    bsp, memory,
+    memory::{mmu::TranslationGranule, Address, Physical},
+};
+use core::intrinsics::unlikely;
+use cortex_a::{asm::barrier, registers::*};
+use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Memory Management Unit type.
+struct MemoryManagementUnit;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub type Granule512MiB = TranslationGranule<{ 512 * 1024 * 1024 }>;
+pub type Granule64KiB = TranslationGranule<{ 64 * 1024 }>;
+
+/// Constants for indexing the MAIR_EL1.
+#[allow(dead_code)]
+pub mod mair {
+    pub const DEVICE: u64 = 0;
+    pub const NORMAL: u64 = 1;
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static MMU: MemoryManagementUnit = MemoryManagementUnit;
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl<const AS_SIZE: usize> memory::mmu::AddressSpace<AS_SIZE> {
+    /// Checks for architectural restrictions.
+    pub const fn arch_address_space_size_sanity_checks() {
+        // Size must be at least one full 512 MiB table.
+        assert!((AS_SIZE % Granule512MiB::SIZE) == 0);
+
+        // Check for 48 bit virtual address size as maximum, which is supported by any ARMv8
+        // version.
+        assert!(AS_SIZE <= (1 << 48));
+    }
+}
+
+impl MemoryManagementUnit {
+    /// Setup function for the MAIR_EL1 register.
+    #[inline(always)]
+    fn set_up_mair(&self) {
+        // Define the memory types being mapped.
+        MAIR_EL1.write(
+            // Attribute 1 - Cacheable normal DRAM.
+            MAIR_EL1::Attr1_Normal_Outer::WriteBack_NonTransient_ReadWriteAlloc +
+        MAIR_EL1::Attr1_Normal_Inner::WriteBack_NonTransient_ReadWriteAlloc +
+
+        // Attribute 0 - Device.
+        MAIR_EL1::Attr0_Device::nonGathering_nonReordering_EarlyWriteAck,
+        );
+    }
+
+    /// Configure various settings of stage 1 of the EL1 translation regime.
+    #[inline(always)]
+    fn configure_translation_control(&self) {
+        let t1sz = (64 - bsp::memory::mmu::KernelVirtAddrSpace::SIZE_SHIFT) as u64;
+
+        TCR_EL1.write(
+            TCR_EL1::TBI1::Used
+                + TCR_EL1::IPS::Bits_40
+                + TCR_EL1::TG1::KiB_64
+                + TCR_EL1::SH1::Inner
+                + TCR_EL1::ORGN1::WriteBack_ReadAlloc_WriteAlloc_Cacheable
+                + TCR_EL1::IRGN1::WriteBack_ReadAlloc_WriteAlloc_Cacheable
+                + TCR_EL1::EPD1::EnableTTBR1Walks
+                + TCR_EL1::A1::TTBR1
+                + TCR_EL1::T1SZ.val(t1sz)
+                + TCR_EL1::EPD0::DisableTTBR0Walks,
+        );
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the MMU instance.
+pub fn mmu() -> &'static impl memory::mmu::interface::MMU {
+    &MMU
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use memory::mmu::MMUEnableError;
+
+impl memory::mmu::interface::MMU for MemoryManagementUnit {
+    unsafe fn enable_mmu_and_caching(
+        &self,
+        phys_tables_base_addr: Address<Physical>,
+    ) -> Result<(), MMUEnableError> {
+        if unlikely(self.is_enabled()) {
+            return Err(MMUEnableError::AlreadyEnabled);
+        }
+
+        // Fail early if translation granule is not supported.
+        if unlikely(!ID_AA64MMFR0_EL1.matches_all(ID_AA64MMFR0_EL1::TGran64::Supported)) {
+            return Err(MMUEnableError::Other(
+                "Translation granule not supported in HW",
+            ));
+        }
+
+        // Prepare the memory attribute indirection register.
+        self.set_up_mair();
+
+        // Set the "Translation Table Base Register".
+        TTBR1_EL1.set_baddr(phys_tables_base_addr.as_usize() as u64);
+
+        self.configure_translation_control();
+
+        // Switch the MMU on.
+        //
+        // First, force all previous changes to be seen before the MMU is enabled.
+        barrier::isb(barrier::SY);
+
+        // Enable the MMU and turn on data and instruction caching.
+        SCTLR_EL1.modify(SCTLR_EL1::M::Enable + SCTLR_EL1::C::Cacheable + SCTLR_EL1::I::Cacheable);
+
+        // Force MMU init to complete before next instruction.
+        barrier::isb(barrier::SY);
+
+        Ok(())
+    }
+
+    #[inline(always)]
+    fn is_enabled(&self) -> bool {
+        SCTLR_EL1.matches_all(SCTLR_EL1::M::Enable)
+    }
+}
diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs b/17_kernel_symbols/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
new file mode 100644
index 000000000..f0b4ac85f
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -0,0 +1,521 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural translation table.
+//!
+//! Only 64 KiB granule is supported.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::memory::mmu::translation_table::arch_translation_table
+
+use crate::{
+    bsp,
+    memory::{
+        self,
+        mmu::{
+            arch_mmu::{Granule512MiB, Granule64KiB},
+            AccessPermissions, AttributeFields, MemAttributes, MemoryRegion, PageAddress,
+        },
+        Address, Physical, Virtual,
+    },
+};
+use core::convert;
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields,
+    registers::InMemoryRegister,
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+// A table descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-15.
+register_bitfields! {u64,
+    STAGE1_TABLE_DESCRIPTOR [
+        /// Physical address of the next descriptor.
+        NEXT_LEVEL_TABLE_ADDR_64KiB OFFSET(16) NUMBITS(32) [], // [47:16]
+
+        TYPE  OFFSET(1) NUMBITS(1) [
+            Block = 0,
+            Table = 1
+        ],
+
+        VALID OFFSET(0) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ]
+    ]
+}
+
+// A level 3 page descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-17.
+register_bitfields! {u64,
+    STAGE1_PAGE_DESCRIPTOR [
+        /// Unprivileged execute-never.
+        UXN      OFFSET(54) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
+        /// Privileged execute-never.
+        PXN      OFFSET(53) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
+        /// Physical address of the next table descriptor (lvl2) or the page descriptor (lvl3).
+        OUTPUT_ADDR_64KiB OFFSET(16) NUMBITS(32) [], // [47:16]
+
+        /// Access flag.
+        AF       OFFSET(10) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
+        /// Shareability field.
+        SH       OFFSET(8) NUMBITS(2) [
+            OuterShareable = 0b10,
+            InnerShareable = 0b11
+        ],
+
+        /// Access Permissions.
+        AP       OFFSET(6) NUMBITS(2) [
+            RW_EL1 = 0b00,
+            RW_EL1_EL0 = 0b01,
+            RO_EL1 = 0b10,
+            RO_EL1_EL0 = 0b11
+        ],
+
+        /// Memory attributes index into the MAIR_EL1 register.
+        AttrIndx OFFSET(2) NUMBITS(3) [],
+
+        TYPE     OFFSET(1) NUMBITS(1) [
+            Reserved_Invalid = 0,
+            Page = 1
+        ],
+
+        VALID    OFFSET(0) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ]
+    ]
+}
+
+/// A table descriptor for 64 KiB aperture.
+///
+/// The output points to the next table.
+#[derive(Copy, Clone)]
+#[repr(C)]
+struct TableDescriptor {
+    value: u64,
+}
+
+/// A page descriptor with 64 KiB aperture.
+///
+/// The output points to physical memory.
+#[derive(Copy, Clone)]
+#[repr(C)]
+struct PageDescriptor {
+    value: u64,
+}
+
+trait StartAddr {
+    fn virt_start_addr(&self) -> Address<Virtual>;
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Big monolithic struct for storing the translation tables. Individual levels must be 64 KiB
+/// aligned, so the lvl3 is put first.
+#[repr(C)]
+#[repr(align(65536))]
+pub struct FixedSizeTranslationTable<const NUM_TABLES: usize, const START_FROM_TOP: bool> {
+    /// Page descriptors, covering 64 KiB windows per entry.
+    lvl3: [[PageDescriptor; 8192]; NUM_TABLES],
+
+    /// Table descriptors, covering 512 MiB windows.
+    lvl2: [TableDescriptor; NUM_TABLES],
+
+    /// Have the tables been initialized?
+    initialized: bool,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl<T, const N: usize> StartAddr for [T; N] {
+    fn virt_start_addr(&self) -> Address<Virtual> {
+        Address::new(self as *const _ as usize)
+    }
+}
+
+impl TableDescriptor {
+    /// Create an instance.
+    ///
+    /// Descriptor is invalid by default.
+    pub const fn new_zeroed() -> Self {
+        Self { value: 0 }
+    }
+
+    /// Create an instance pointing to the supplied address.
+    pub fn from_next_lvl_table_addr(phys_next_lvl_table_addr: Address<Physical>) -> Self {
+        let val = InMemoryRegister::<u64, STAGE1_TABLE_DESCRIPTOR::Register>::new(0);
+
+        let shifted = phys_next_lvl_table_addr.as_usize() >> Granule64KiB::SHIFT;
+        val.write(
+            STAGE1_TABLE_DESCRIPTOR::NEXT_LEVEL_TABLE_ADDR_64KiB.val(shifted as u64)
+                + STAGE1_TABLE_DESCRIPTOR::TYPE::Table
+                + STAGE1_TABLE_DESCRIPTOR::VALID::True,
+        );
+
+        TableDescriptor { value: val.get() }
+    }
+}
+
+/// Convert the kernel's generic memory attributes to HW-specific attributes of the MMU.
+impl convert::From<AttributeFields>
+    for tock_registers::fields::FieldValue<u64, STAGE1_PAGE_DESCRIPTOR::Register>
+{
+    fn from(attribute_fields: AttributeFields) -> Self {
+        // Memory attributes.
+        let mut desc = match attribute_fields.mem_attributes {
+            MemAttributes::CacheableDRAM => {
+                STAGE1_PAGE_DESCRIPTOR::SH::InnerShareable
+                    + STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(memory::mmu::arch_mmu::mair::NORMAL)
+            }
+            MemAttributes::Device => {
+                STAGE1_PAGE_DESCRIPTOR::SH::OuterShareable
+                    + STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(memory::mmu::arch_mmu::mair::DEVICE)
+            }
+        };
+
+        // Access Permissions.
+        desc += match attribute_fields.acc_perms {
+            AccessPermissions::ReadOnly => STAGE1_PAGE_DESCRIPTOR::AP::RO_EL1,
+            AccessPermissions::ReadWrite => STAGE1_PAGE_DESCRIPTOR::AP::RW_EL1,
+        };
+
+        // The execute-never attribute is mapped to PXN in AArch64.
+        desc += if attribute_fields.execute_never {
+            STAGE1_PAGE_DESCRIPTOR::PXN::True
+        } else {
+            STAGE1_PAGE_DESCRIPTOR::PXN::False
+        };
+
+        // Always set unprivileged exectue-never as long as userspace is not implemented yet.
+        desc += STAGE1_PAGE_DESCRIPTOR::UXN::True;
+
+        desc
+    }
+}
+
+/// Convert the HW-specific attributes of the MMU to kernel's generic memory attributes.
+impl convert::TryFrom<InMemoryRegister<u64, STAGE1_PAGE_DESCRIPTOR::Register>> for AttributeFields {
+    type Error = &'static str;
+
+    fn try_from(
+        desc: InMemoryRegister<u64, STAGE1_PAGE_DESCRIPTOR::Register>,
+    ) -> Result<AttributeFields, Self::Error> {
+        let mem_attributes = match desc.read(STAGE1_PAGE_DESCRIPTOR::AttrIndx) {
+            memory::mmu::arch_mmu::mair::NORMAL => MemAttributes::CacheableDRAM,
+            memory::mmu::arch_mmu::mair::DEVICE => MemAttributes::Device,
+            _ => return Err("Unexpected memory attribute"),
+        };
+
+        let acc_perms = match desc.read_as_enum(STAGE1_PAGE_DESCRIPTOR::AP) {
+            Some(STAGE1_PAGE_DESCRIPTOR::AP::Value::RO_EL1) => AccessPermissions::ReadOnly,
+            Some(STAGE1_PAGE_DESCRIPTOR::AP::Value::RW_EL1) => AccessPermissions::ReadWrite,
+            _ => return Err("Unexpected access permission"),
+        };
+
+        let execute_never = desc.read(STAGE1_PAGE_DESCRIPTOR::PXN) > 0;
+
+        Ok(AttributeFields {
+            mem_attributes,
+            acc_perms,
+            execute_never,
+        })
+    }
+}
+
+impl PageDescriptor {
+    /// Create an instance.
+    ///
+    /// Descriptor is invalid by default.
+    pub const fn new_zeroed() -> Self {
+        Self { value: 0 }
+    }
+
+    /// Create an instance.
+    pub fn from_output_page_addr(
+        phys_output_page_addr: PageAddress<Physical>,
+        attribute_fields: &AttributeFields,
+    ) -> Self {
+        let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
+
+        let shifted = phys_output_page_addr.into_inner().as_usize() >> Granule64KiB::SHIFT;
+        val.write(
+            STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted as u64)
+                + STAGE1_PAGE_DESCRIPTOR::AF::True
+                + STAGE1_PAGE_DESCRIPTOR::TYPE::Page
+                + STAGE1_PAGE_DESCRIPTOR::VALID::True
+                + (*attribute_fields).into(),
+        );
+
+        Self { value: val.get() }
+    }
+
+    /// Returns the valid bit.
+    fn is_valid(&self) -> bool {
+        InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(self.value)
+            .is_set(STAGE1_PAGE_DESCRIPTOR::VALID)
+    }
+
+    /// Returns the output page.
+    fn output_page_addr(&self) -> PageAddress<Physical> {
+        let shifted = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(self.value)
+            .read(STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB) as usize;
+
+        PageAddress::from(shifted << Granule64KiB::SHIFT)
+    }
+
+    /// Returns the attributes.
+    fn try_attributes(&self) -> Result<AttributeFields, &'static str> {
+        InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(self.value).try_into()
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl<const AS_SIZE: usize> memory::mmu::AssociatedTranslationTable
+    for memory::mmu::AddressSpace<AS_SIZE>
+where
+    [u8; Self::SIZE >> Granule512MiB::SHIFT]: Sized,
+{
+    type TableStartFromTop =
+        FixedSizeTranslationTable<{ Self::SIZE >> Granule512MiB::SHIFT }, true>;
+
+    type TableStartFromBottom =
+        FixedSizeTranslationTable<{ Self::SIZE >> Granule512MiB::SHIFT }, false>;
+}
+
+impl<const NUM_TABLES: usize, const START_FROM_TOP: bool>
+    FixedSizeTranslationTable<NUM_TABLES, START_FROM_TOP>
+{
+    const START_FROM_TOP_OFFSET: Address<Virtual> =
+        Address::new((usize::MAX - (Granule512MiB::SIZE * NUM_TABLES)) + 1);
+
+    /// Create an instance.
+    #[allow(clippy::assertions_on_constants)]
+    const fn _new(for_precompute: bool) -> Self {
+        assert!(bsp::memory::mmu::KernelGranule::SIZE == Granule64KiB::SIZE);
+
+        // Can't have a zero-sized address space.
+        assert!(NUM_TABLES > 0);
+
+        Self {
+            lvl3: [[PageDescriptor::new_zeroed(); 8192]; NUM_TABLES],
+            lvl2: [TableDescriptor::new_zeroed(); NUM_TABLES],
+            initialized: for_precompute,
+        }
+    }
+
+    pub const fn new_for_precompute() -> Self {
+        Self::_new(true)
+    }
+
+    #[cfg(test)]
+    pub fn new_for_runtime() -> Self {
+        Self::_new(false)
+    }
+
+    /// Helper to calculate the lvl2 and lvl3 indices from an address.
+    #[inline(always)]
+    fn lvl2_lvl3_index_from_page_addr(
+        &self,
+        virt_page_addr: PageAddress<Virtual>,
+    ) -> Result<(usize, usize), &'static str> {
+        let mut addr = virt_page_addr.into_inner();
+
+        if START_FROM_TOP {
+            addr = addr - Self::START_FROM_TOP_OFFSET;
+        }
+
+        let lvl2_index = addr.as_usize() >> Granule512MiB::SHIFT;
+        let lvl3_index = (addr.as_usize() & Granule512MiB::MASK) >> Granule64KiB::SHIFT;
+
+        if lvl2_index > (NUM_TABLES - 1) {
+            return Err("Virtual page is out of bounds of translation table");
+        }
+
+        Ok((lvl2_index, lvl3_index))
+    }
+
+    /// Returns the PageDescriptor corresponding to the supplied page address.
+    #[inline(always)]
+    fn page_descriptor_from_page_addr(
+        &self,
+        virt_page_addr: PageAddress<Virtual>,
+    ) -> Result<&PageDescriptor, &'static str> {
+        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page_addr(virt_page_addr)?;
+        let desc = &self.lvl3[lvl2_index][lvl3_index];
+
+        Ok(desc)
+    }
+
+    /// Sets the PageDescriptor corresponding to the supplied page address.
+    ///
+    /// Doesn't allow overriding an already valid page.
+    #[inline(always)]
+    fn set_page_descriptor_from_page_addr(
+        &mut self,
+        virt_page_addr: PageAddress<Virtual>,
+        new_desc: &PageDescriptor,
+    ) -> Result<(), &'static str> {
+        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page_addr(virt_page_addr)?;
+        let desc = &mut self.lvl3[lvl2_index][lvl3_index];
+
+        if desc.is_valid() {
+            return Err("Virtual page is already mapped");
+        }
+
+        *desc = *new_desc;
+        Ok(())
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+
+impl<const NUM_TABLES: usize, const START_FROM_TOP: bool>
+    memory::mmu::translation_table::interface::TranslationTable
+    for FixedSizeTranslationTable<NUM_TABLES, START_FROM_TOP>
+{
+    fn init(&mut self) -> Result<(), &'static str> {
+        if self.initialized {
+            return Ok(());
+        }
+
+        // Populate the l2 entries.
+        for (lvl2_nr, lvl2_entry) in self.lvl2.iter_mut().enumerate() {
+            let virt_table_addr = self.lvl3[lvl2_nr].virt_start_addr();
+            let phys_table_addr = memory::mmu::try_kernel_virt_addr_to_phys_addr(virt_table_addr)?;
+
+            let new_desc = TableDescriptor::from_next_lvl_table_addr(phys_table_addr);
+            *lvl2_entry = new_desc;
+        }
+
+        self.initialized = true;
+
+        Ok(())
+    }
+
+    unsafe fn map_at(
+        &mut self,
+        virt_region: &MemoryRegion<Virtual>,
+        phys_region: &MemoryRegion<Physical>,
+        attr: &AttributeFields,
+    ) -> Result<(), &'static str> {
+        assert!(self.initialized, "Translation tables not initialized");
+
+        if virt_region.size() != phys_region.size() {
+            return Err("Tried to map memory regions with unequal sizes");
+        }
+
+        if phys_region.end_exclusive_page_addr() > bsp::memory::phys_addr_space_end_exclusive_addr()
+        {
+            return Err("Tried to map outside of physical address space");
+        }
+
+        let iter = phys_region.into_iter().zip(virt_region.into_iter());
+        for (phys_page_addr, virt_page_addr) in iter {
+            let new_desc = PageDescriptor::from_output_page_addr(phys_page_addr, attr);
+            let virt_page = virt_page_addr;
+
+            self.set_page_descriptor_from_page_addr(virt_page, &new_desc)?;
+        }
+
+        Ok(())
+    }
+
+    fn try_virt_page_addr_to_phys_page_addr(
+        &self,
+        virt_page_addr: PageAddress<Virtual>,
+    ) -> Result<PageAddress<Physical>, &'static str> {
+        let page_desc = self.page_descriptor_from_page_addr(virt_page_addr)?;
+
+        if !page_desc.is_valid() {
+            return Err("Page marked invalid");
+        }
+
+        Ok(page_desc.output_page_addr())
+    }
+
+    fn try_page_attributes(
+        &self,
+        virt_page_addr: PageAddress<Virtual>,
+    ) -> Result<AttributeFields, &'static str> {
+        let page_desc = self.page_descriptor_from_page_addr(virt_page_addr)?;
+
+        if !page_desc.is_valid() {
+            return Err("Page marked invalid");
+        }
+
+        page_desc.try_attributes()
+    }
+
+    /// Try to translate a virtual address to a physical address.
+    ///
+    /// Will only succeed if there exists a valid mapping for the input address.
+    fn try_virt_addr_to_phys_addr(
+        &self,
+        virt_addr: Address<Virtual>,
+    ) -> Result<Address<Physical>, &'static str> {
+        let virt_page = PageAddress::from(virt_addr.align_down_page());
+        let phys_page = self.try_virt_page_addr_to_phys_page_addr(virt_page)?;
+
+        Ok(phys_page.into_inner() + virt_addr.offset_into_page())
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+pub type MinSizeTranslationTable = FixedSizeTranslationTable<1, true>;
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// Check if the size of `struct TableDescriptor` is as expected.
+    #[kernel_test]
+    fn size_of_tabledescriptor_equals_64_bit() {
+        assert_eq!(
+            core::mem::size_of::<TableDescriptor>(),
+            core::mem::size_of::<u64>()
+        );
+    }
+
+    /// Check if the size of `struct PageDescriptor` is as expected.
+    #[kernel_test]
+    fn size_of_pagedescriptor_equals_64_bit() {
+        assert_eq!(
+            core::mem::size_of::<PageDescriptor>(),
+            core::mem::size_of::<u64>()
+        );
+    }
+}
diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/time.rs b/17_kernel_symbols/kernel/src/_arch/aarch64/time.rs
new file mode 100644
index 000000000..c814219ca
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/_arch/aarch64/time.rs
@@ -0,0 +1,121 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural timer primitives.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::time::arch_time
+
+use crate::{time, warn};
+use core::time::Duration;
+use cortex_a::{asm::barrier, registers::*};
+use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+const NS_PER_S: u64 = 1_000_000_000;
+
+/// ARMv8 Generic Timer.
+struct GenericTimer;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static TIME_MANAGER: GenericTimer = GenericTimer;
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl GenericTimer {
+    #[inline(always)]
+    fn read_cntpct(&self) -> u64 {
+        // Prevent that the counter is read ahead of time due to out-of-order execution.
+        unsafe { barrier::isb(barrier::SY) };
+        CNTPCT_EL0.get()
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the time manager.
+pub fn time_manager() -> &'static impl time::interface::TimeManager {
+    &TIME_MANAGER
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+
+impl time::interface::TimeManager for GenericTimer {
+    fn resolution(&self) -> Duration {
+        Duration::from_nanos(NS_PER_S / (CNTFRQ_EL0.get() as u64))
+    }
+
+    fn uptime(&self) -> Duration {
+        let current_count: u64 = self.read_cntpct() * NS_PER_S;
+        let frq: u64 = CNTFRQ_EL0.get() as u64;
+
+        Duration::from_nanos(current_count / frq)
+    }
+
+    fn spin_for(&self, duration: Duration) {
+        // Instantly return on zero.
+        if duration.as_nanos() == 0 {
+            return;
+        }
+
+        // Calculate the register compare value.
+        let frq = CNTFRQ_EL0.get();
+        let x = match frq.checked_mul(duration.as_nanos() as u64) {
+            #[allow(unused_imports)]
+            None => {
+                warn!("Spin duration too long, skipping");
+                return;
+            }
+            Some(val) => val,
+        };
+        let tval = x / NS_PER_S;
+
+        // Check if it is within supported bounds.
+        let warn: Option<&str> = if tval == 0 {
+            Some("smaller")
+        // The upper 32 bits of CNTP_TVAL_EL0 are reserved.
+        } else if tval > u32::max_value().into() {
+            Some("bigger")
+        } else {
+            None
+        };
+
+        #[allow(unused_imports)]
+        if let Some(w) = warn {
+            warn!(
+                "Spin duration {} than architecturally supported, skipping",
+                w
+            );
+            return;
+        }
+
+        // Set the compare value register.
+        CNTP_TVAL_EL0.set(tval);
+
+        // Kick off the counting.                       // Disable timer interrupt.
+        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::SET + CNTP_CTL_EL0::IMASK::SET);
+
+        // ISTATUS will be '1' when cval ticks have passed. Busy-check it.
+        while !CNTP_CTL_EL0.matches_all(CNTP_CTL_EL0::ISTATUS::SET) {}
+
+        // Disable counting again.
+        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::CLEAR);
+    }
+}
diff --git a/17_kernel_symbols/kernel/src/bsp.rs b/17_kernel_symbols/kernel/src/bsp.rs
new file mode 100644
index 000000000..824787f65
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/bsp.rs
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Conditional reexporting of Board Support Packages.
+
+mod device_driver;
+
+#[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
+mod raspberrypi;
+
+#[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
+pub use raspberrypi::*;
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver.rs b/17_kernel_symbols/kernel/src/bsp/device_driver.rs
new file mode 100644
index 000000000..eafaf7754
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver.rs
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Device driver.
+
+#[cfg(feature = "bsp_rpi4")]
+mod arm;
+#[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
+mod bcm;
+mod common;
+
+#[cfg(feature = "bsp_rpi4")]
+pub use arm::*;
+#[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
+pub use bcm::*;
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/arm.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/arm.rs
new file mode 100644
index 000000000..e83e24c92
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/arm.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! ARM driver top level.
+
+pub mod gicv2;
+
+pub use gicv2::*;
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2.rs
new file mode 100644
index 000000000..4c68a6929
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2.rs
@@ -0,0 +1,246 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! GICv2 Driver - ARM Generic Interrupt Controller v2.
+//!
+//! The following is a collection of excerpts with useful information from
+//!   - `Programmer's Guide for ARMv8-A`
+//!   - `ARM Generic Interrupt Controller Architecture Specification`
+//!
+//! # Programmer's Guide - 10.6.1 Configuration
+//!
+//! The GIC is accessed as a memory-mapped peripheral.
+//!
+//! All cores can access the common Distributor, but the CPU interface is banked, that is, each core
+//! uses the same address to access its own private CPU interface.
+//!
+//! It is not possible for a core to access the CPU interface of another core.
+//!
+//! # Architecture Specification - 10.6.2 Initialization
+//!
+//! Both the Distributor and the CPU interfaces are disabled at reset. The GIC must be initialized
+//! after reset before it can deliver interrupts to the core.
+//!
+//! In the Distributor, software must configure the priority, target, security and enable individual
+//! interrupts. The Distributor must subsequently be enabled through its control register
+//! (GICD_CTLR). For each CPU interface, software must program the priority mask and preemption
+//! settings.
+//!
+//! Each CPU interface block itself must be enabled through its control register (GICD_CTLR). This
+//! prepares the GIC to deliver interrupts to the core.
+//!
+//! Before interrupts are expected in the core, software prepares the core to take interrupts by
+//! setting a valid interrupt vector in the vector table, and clearing interrupt mask bits in
+//! PSTATE, and setting the routing controls.
+//!
+//! The entire interrupt mechanism in the system can be disabled by disabling the Distributor.
+//! Interrupt delivery to an individual core can be disabled by disabling its CPU interface.
+//! Individual interrupts can also be disabled (or enabled) in the distributor.
+//!
+//! For an interrupt to reach the core, the individual interrupt, Distributor and CPU interface must
+//! all be enabled. The interrupt also needs to be of sufficient priority, that is, higher than the
+//! core's priority mask.
+//!
+//! # Architecture Specification - 1.4.2 Interrupt types
+//!
+//! - Peripheral interrupt
+//!     - Private Peripheral Interrupt (PPI)
+//!         - This is a peripheral interrupt that is specific to a single processor.
+//!     - Shared Peripheral Interrupt (SPI)
+//!         - This is a peripheral interrupt that the Distributor can route to any of a specified
+//!           combination of processors.
+//!
+//! - Software-generated interrupt (SGI)
+//!     - This is an interrupt generated by software writing to a GICD_SGIR register in the GIC. The
+//!       system uses SGIs for interprocessor communication.
+//!     - An SGI has edge-triggered properties. The software triggering of the interrupt is
+//!       equivalent to the edge transition of the interrupt request signal.
+//!     - When an SGI occurs in a multiprocessor implementation, the CPUID field in the Interrupt
+//!       Acknowledge Register, GICC_IAR, or the Aliased Interrupt Acknowledge Register, GICC_AIAR,
+//!       identifies the processor that requested the interrupt.
+//!
+//! # Architecture Specification - 2.2.1 Interrupt IDs
+//!
+//! Interrupts from sources are identified using ID numbers. Each CPU interface can see up to 1020
+//! interrupts. The banking of SPIs and PPIs increases the total number of interrupts supported by
+//! the Distributor.
+//!
+//! The GIC assigns interrupt ID numbers ID0-ID1019 as follows:
+//!   - Interrupt numbers 32..1019 are used for SPIs.
+//!   - Interrupt numbers 0..31 are used for interrupts that are private to a CPU interface. These
+//!     interrupts are banked in the Distributor.
+//!       - A banked interrupt is one where the Distributor can have multiple interrupts with the
+//!         same ID. A banked interrupt is identified uniquely by its ID number and its associated
+//!         CPU interface number. Of the banked interrupt IDs:
+//!           - 00..15 SGIs
+//!           - 16..31 PPIs
+
+mod gicc;
+mod gicd;
+
+use crate::{bsp, cpu, driver, exception, memory, synchronization, synchronization::InitStateLock};
+use core::sync::atomic::{AtomicBool, Ordering};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; GICv2::NUM_IRQS];
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Used for the associated type of trait [`exception::asynchronous::interface::IRQManager`].
+pub type IRQNumber = exception::asynchronous::IRQNumber<{ GICv2::MAX_IRQ_NUMBER }>;
+
+/// Representation of the GIC.
+pub struct GICv2 {
+    gicd_mmio_descriptor: memory::mmu::MMIODescriptor,
+    gicc_mmio_descriptor: memory::mmu::MMIODescriptor,
+
+    /// The Distributor.
+    gicd: gicd::GICD,
+
+    /// The CPU Interface.
+    gicc: gicc::GICC,
+
+    /// Have the MMIO regions been remapped yet?
+    is_mmio_remapped: AtomicBool,
+
+    /// Stores registered IRQ handlers. Writable only during kernel init. RO afterwards.
+    handler_table: InitStateLock<HandlerTable>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl GICv2 {
+    const MAX_IRQ_NUMBER: usize = 300; // Normally 1019, but keep it lower to save some space.
+    const NUM_IRQS: usize = Self::MAX_IRQ_NUMBER + 1;
+
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide correct MMIO descriptors.
+    pub const unsafe fn new(
+        gicd_mmio_descriptor: memory::mmu::MMIODescriptor,
+        gicc_mmio_descriptor: memory::mmu::MMIODescriptor,
+    ) -> Self {
+        Self {
+            gicd_mmio_descriptor,
+            gicc_mmio_descriptor,
+            gicd: gicd::GICD::new(gicd_mmio_descriptor.start_addr().as_usize()),
+            gicc: gicc::GICC::new(gicc_mmio_descriptor.start_addr().as_usize()),
+            is_mmio_remapped: AtomicBool::new(false),
+            handler_table: InitStateLock::new([None; Self::NUM_IRQS]),
+        }
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use synchronization::interface::ReadWriteEx;
+
+impl driver::interface::DeviceDriver for GICv2 {
+    fn compatible(&self) -> &'static str {
+        "GICv2 (ARM Generic Interrupt Controller v2)"
+    }
+
+    unsafe fn init(&self) -> Result<(), &'static str> {
+        let remapped = self.is_mmio_remapped.load(Ordering::Relaxed);
+        if !remapped {
+            // GICD
+            let mut virt_addr = memory::mmu::kernel_map_mmio("GICD", &self.gicd_mmio_descriptor)?;
+            self.gicd.set_mmio(virt_addr.as_usize());
+
+            // GICC
+            virt_addr = memory::mmu::kernel_map_mmio("GICC", &self.gicc_mmio_descriptor)?;
+            self.gicc.set_mmio(virt_addr.as_usize());
+
+            // Conclude remapping.
+            self.is_mmio_remapped.store(true, Ordering::Relaxed);
+        }
+
+        if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
+            self.gicd.boot_core_init();
+        }
+
+        self.gicc.priority_accept_all();
+        self.gicc.enable();
+
+        Ok(())
+    }
+}
+
+impl exception::asynchronous::interface::IRQManager for GICv2 {
+    type IRQNumberType = IRQNumber;
+
+    fn register_handler(
+        &self,
+        irq_number: Self::IRQNumberType,
+        descriptor: exception::asynchronous::IRQDescriptor,
+    ) -> Result<(), &'static str> {
+        self.handler_table.write(|table| {
+            let irq_number = irq_number.get();
+
+            if table[irq_number].is_some() {
+                return Err("IRQ handler already registered");
+            }
+
+            table[irq_number] = Some(descriptor);
+
+            Ok(())
+        })
+    }
+
+    fn enable(&self, irq_number: Self::IRQNumberType) {
+        self.gicd.enable(irq_number);
+    }
+
+    fn handle_pending_irqs<'irq_context>(
+        &'irq_context self,
+        ic: &exception::asynchronous::IRQContext<'irq_context>,
+    ) {
+        // Extract the highest priority pending IRQ number from the Interrupt Acknowledge Register
+        // (IAR).
+        let irq_number = self.gicc.pending_irq_number(ic);
+
+        // Guard against spurious interrupts.
+        if irq_number > GICv2::MAX_IRQ_NUMBER {
+            return;
+        }
+
+        // Call the IRQ handler. Panic if there is none.
+        self.handler_table.read(|table| {
+            match table[irq_number] {
+                None => panic!("No handler registered for IRQ {}", irq_number),
+                Some(descriptor) => {
+                    // Call the IRQ handler. Panics on failure.
+                    descriptor.handler.handle().expect("Error handling IRQ");
+                }
+            }
+        });
+
+        // Signal completion of handling.
+        self.gicc.mark_comleted(irq_number as u32, ic);
+    }
+
+    fn print_handler(&self) {
+        use crate::info;
+
+        info!("      Peripheral handler:");
+
+        self.handler_table.read(|table| {
+            for (i, opt) in table.iter().skip(32).enumerate() {
+                if let Some(handler) = opt {
+                    info!("            {: >3}. {}", i + 32, handler.name);
+                }
+            }
+        });
+    }
+}
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
new file mode 100644
index 000000000..1a151d246
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
@@ -0,0 +1,156 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! GICC Driver - GIC CPU interface.
+
+use crate::{
+    bsp::device_driver::common::MMIODerefWrapper, exception, synchronization::InitStateLock,
+};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields, register_structs,
+    registers::ReadWrite,
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+register_bitfields! {
+    u32,
+
+    /// CPU Interface Control Register
+    CTLR [
+        Enable OFFSET(0) NUMBITS(1) []
+    ],
+
+    /// Interrupt Priority Mask Register
+    PMR [
+        Priority OFFSET(0) NUMBITS(8) []
+    ],
+
+    /// Interrupt Acknowledge Register
+    IAR [
+        InterruptID OFFSET(0) NUMBITS(10) []
+    ],
+
+    /// End of Interrupt Register
+    EOIR [
+        EOIINTID OFFSET(0) NUMBITS(10) []
+    ]
+}
+
+register_structs! {
+    #[allow(non_snake_case)]
+    pub RegisterBlock {
+        (0x000 => CTLR: ReadWrite<u32, CTLR::Register>),
+        (0x004 => PMR: ReadWrite<u32, PMR::Register>),
+        (0x008 => _reserved1),
+        (0x00C => IAR: ReadWrite<u32, IAR::Register>),
+        (0x010 => EOIR: ReadWrite<u32, EOIR::Register>),
+        (0x014  => @END),
+    }
+}
+
+/// Abstraction for the associated MMIO registers.
+type Registers = MMIODerefWrapper<RegisterBlock>;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Representation of the GIC CPU interface.
+pub struct GICC {
+    registers: InitStateLock<Registers>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+use crate::synchronization::interface::ReadWriteEx;
+
+impl GICC {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+        Self {
+            registers: InitStateLock::new(Registers::new(mmio_start_addr)),
+        }
+    }
+
+    pub unsafe fn set_mmio(&self, new_mmio_start_addr: usize) {
+        self.registers
+            .write(|regs| *regs = Registers::new(new_mmio_start_addr));
+    }
+
+    /// Accept interrupts of any priority.
+    ///
+    /// Quoting the GICv2 Architecture Specification:
+    ///
+    ///   "Writing 255 to the GICC_PMR always sets it to the largest supported priority field
+    ///    value."
+    ///
+    /// # Safety
+    ///
+    /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
+    ///   of `&mut self`.
+    pub fn priority_accept_all(&self) {
+        self.registers.read(|regs| {
+            regs.PMR.write(PMR::Priority.val(255)); // Comment in arch spec.
+        });
+    }
+
+    /// Enable the interface - start accepting IRQs.
+    ///
+    /// # Safety
+    ///
+    /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
+    ///   of `&mut self`.
+    pub fn enable(&self) {
+        self.registers.read(|regs| {
+            regs.CTLR.write(CTLR::Enable::SET);
+        });
+    }
+
+    /// Extract the number of the highest-priority pending IRQ.
+    ///
+    /// Can only be called from IRQ context, which is ensured by taking an `IRQContext` token.
+    ///
+    /// # Safety
+    ///
+    /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
+    ///   of `&mut self`.
+    #[allow(clippy::trivially_copy_pass_by_ref)]
+    pub fn pending_irq_number<'irq_context>(
+        &self,
+        _ic: &exception::asynchronous::IRQContext<'irq_context>,
+    ) -> usize {
+        self.registers
+            .read(|regs| regs.IAR.read(IAR::InterruptID) as usize)
+    }
+
+    /// Complete handling of the currently active IRQ.
+    ///
+    /// Can only be called from IRQ context, which is ensured by taking an `IRQContext` token.
+    ///
+    /// To be called after `pending_irq_number()`.
+    ///
+    /// # Safety
+    ///
+    /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
+    ///   of `&mut self`.
+    #[allow(clippy::trivially_copy_pass_by_ref)]
+    pub fn mark_comleted<'irq_context>(
+        &self,
+        irq_number: u32,
+        _ic: &exception::asynchronous::IRQContext<'irq_context>,
+    ) {
+        self.registers.read(|regs| {
+            regs.EOIR.write(EOIR::EOIINTID.val(irq_number));
+        });
+    }
+}
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
new file mode 100644
index 000000000..60bbc4689
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -0,0 +1,209 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! GICD Driver - GIC Distributor.
+//!
+//! # Glossary
+//!   - SPI - Shared Peripheral Interrupt.
+
+use crate::{
+    bsp::device_driver::common::MMIODerefWrapper,
+    state, synchronization,
+    synchronization::{IRQSafeNullLock, InitStateLock},
+};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields, register_structs,
+    registers::{ReadOnly, ReadWrite},
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+register_bitfields! {
+    u32,
+
+    /// Distributor Control Register
+    CTLR [
+        Enable OFFSET(0) NUMBITS(1) []
+    ],
+
+    /// Interrupt Controller Type Register
+    TYPER [
+        ITLinesNumber OFFSET(0)  NUMBITS(5) []
+    ],
+
+    /// Interrupt Processor Targets Registers
+    ITARGETSR [
+        Offset3 OFFSET(24) NUMBITS(8) [],
+        Offset2 OFFSET(16) NUMBITS(8) [],
+        Offset1 OFFSET(8)  NUMBITS(8) [],
+        Offset0 OFFSET(0)  NUMBITS(8) []
+    ]
+}
+
+register_structs! {
+    #[allow(non_snake_case)]
+    SharedRegisterBlock {
+        (0x000 => CTLR: ReadWrite<u32, CTLR::Register>),
+        (0x004 => TYPER: ReadOnly<u32, TYPER::Register>),
+        (0x008 => _reserved1),
+        (0x104 => ISENABLER: [ReadWrite<u32>; 31]),
+        (0x108 => _reserved2),
+        (0x820 => ITARGETSR: [ReadWrite<u32, ITARGETSR::Register>; 248]),
+        (0x824 => @END),
+    }
+}
+
+register_structs! {
+    #[allow(non_snake_case)]
+    BankedRegisterBlock {
+        (0x000 => _reserved1),
+        (0x100 => ISENABLER: ReadWrite<u32>),
+        (0x104 => _reserved2),
+        (0x800 => ITARGETSR: [ReadOnly<u32, ITARGETSR::Register>; 8]),
+        (0x804 => @END),
+    }
+}
+
+/// Abstraction for the non-banked parts of the associated MMIO registers.
+type SharedRegisters = MMIODerefWrapper<SharedRegisterBlock>;
+
+/// Abstraction for the banked parts of the associated MMIO registers.
+type BankedRegisters = MMIODerefWrapper<BankedRegisterBlock>;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Representation of the GIC Distributor.
+pub struct GICD {
+    /// Access to shared registers is guarded with a lock.
+    shared_registers: IRQSafeNullLock<SharedRegisters>,
+
+    /// Access to banked registers is unguarded.
+    banked_registers: InitStateLock<BankedRegisters>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl SharedRegisters {
+    /// Return the number of IRQs that this HW implements.
+    #[inline(always)]
+    fn num_irqs(&mut self) -> usize {
+        // Query number of implemented IRQs.
+        //
+        // Refer to GICv2 Architecture Specification, Section 4.3.2.
+        ((self.TYPER.read(TYPER::ITLinesNumber) as usize) + 1) * 32
+    }
+
+    /// Return a slice of the implemented ITARGETSR.
+    #[inline(always)]
+    fn implemented_itargets_slice(&mut self) -> &[ReadWrite<u32, ITARGETSR::Register>] {
+        assert!(self.num_irqs() >= 36);
+
+        // Calculate the max index of the shared ITARGETSR array.
+        //
+        // The first 32 IRQs are private, so not included in `shared_registers`. Each ITARGETS
+        // register has four entries, so shift right by two. Subtract one because we start
+        // counting at zero.
+        let spi_itargetsr_max_index = ((self.num_irqs() - 32) >> 2) - 1;
+
+        // Rust automatically inserts slice range sanity check, i.e. max >= min.
+        &self.ITARGETSR[0..spi_itargetsr_max_index]
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+use crate::synchronization::interface::ReadWriteEx;
+use synchronization::interface::Mutex;
+
+impl GICD {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+        Self {
+            shared_registers: IRQSafeNullLock::new(SharedRegisters::new(mmio_start_addr)),
+            banked_registers: InitStateLock::new(BankedRegisters::new(mmio_start_addr)),
+        }
+    }
+
+    pub unsafe fn set_mmio(&self, new_mmio_start_addr: usize) {
+        self.shared_registers
+            .lock(|regs| *regs = SharedRegisters::new(new_mmio_start_addr));
+        self.banked_registers
+            .write(|regs| *regs = BankedRegisters::new(new_mmio_start_addr));
+    }
+
+    /// Use a banked ITARGETSR to retrieve the executing core's GIC target mask.
+    ///
+    /// Quoting the GICv2 Architecture Specification:
+    ///
+    ///   "GICD_ITARGETSR0 to GICD_ITARGETSR7 are read-only, and each field returns a value that
+    ///    corresponds only to the processor reading the register."
+    fn local_gic_target_mask(&self) -> u32 {
+        self.banked_registers
+            .read(|regs| regs.ITARGETSR[0].read(ITARGETSR::Offset0))
+    }
+
+    /// Route all SPIs to the boot core and enable the distributor.
+    pub fn boot_core_init(&self) {
+        assert!(
+            state::state_manager().is_init(),
+            "Only allowed during kernel init phase"
+        );
+
+        // Target all SPIs to the boot core only.
+        let mask = self.local_gic_target_mask();
+
+        self.shared_registers.lock(|regs| {
+            for i in regs.implemented_itargets_slice().iter() {
+                i.write(
+                    ITARGETSR::Offset3.val(mask)
+                        + ITARGETSR::Offset2.val(mask)
+                        + ITARGETSR::Offset1.val(mask)
+                        + ITARGETSR::Offset0.val(mask),
+                );
+            }
+
+            regs.CTLR.write(CTLR::Enable::SET);
+        });
+    }
+
+    /// Enable an interrupt.
+    pub fn enable(&self, irq_num: super::IRQNumber) {
+        let irq_num = irq_num.get();
+
+        // Each bit in the u32 enable register corresponds to one IRQ number. Shift right by 5
+        // (division by 32) and arrive at the index for the respective ISENABLER[i].
+        let enable_reg_index = irq_num >> 5;
+        let enable_bit: u32 = 1u32 << (irq_num % 32);
+
+        // Check if we are handling a private or shared IRQ.
+        match irq_num {
+            // Private.
+            0..=31 => self.banked_registers.read(|regs| {
+                let enable_reg = &regs.ISENABLER;
+                enable_reg.set(enable_reg.get() | enable_bit);
+            }),
+            // Shared.
+            _ => {
+                let enable_reg_index_shared = enable_reg_index - 1;
+
+                self.shared_registers.lock(|regs| {
+                    let enable_reg = &regs.ISENABLER[enable_reg_index_shared];
+                    enable_reg.set(enable_reg.get() | enable_bit);
+                });
+            }
+        }
+    }
+}
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm.rs
new file mode 100644
index 000000000..5a7cc23be
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm.rs
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! BCM driver top level.
+
+mod bcm2xxx_gpio;
+#[cfg(feature = "bsp_rpi3")]
+mod bcm2xxx_interrupt_controller;
+mod bcm2xxx_pl011_uart;
+
+pub use bcm2xxx_gpio::*;
+#[cfg(feature = "bsp_rpi3")]
+pub use bcm2xxx_interrupt_controller::*;
+pub use bcm2xxx_pl011_uart::*;
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
new file mode 100644
index 000000000..eea07b755
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -0,0 +1,259 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! GPIO Driver.
+
+use crate::{
+    bsp::device_driver::common::MMIODerefWrapper, driver, memory, synchronization,
+    synchronization::IRQSafeNullLock,
+};
+use core::sync::atomic::{AtomicUsize, Ordering};
+use tock_registers::{
+    interfaces::{ReadWriteable, Writeable},
+    register_bitfields, register_structs,
+    registers::ReadWrite,
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+// GPIO registers.
+//
+// Descriptions taken from
+// - https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
+// - https://datasheets.raspberrypi.org/bcm2711/bcm2711-peripherals.pdf
+register_bitfields! {
+    u32,
+
+    /// GPIO Function Select 1
+    GPFSEL1 [
+        /// Pin 15
+        FSEL15 OFFSET(15) NUMBITS(3) [
+            Input = 0b000,
+            Output = 0b001,
+            AltFunc0 = 0b100  // PL011 UART RX
+
+        ],
+
+        /// Pin 14
+        FSEL14 OFFSET(12) NUMBITS(3) [
+            Input = 0b000,
+            Output = 0b001,
+            AltFunc0 = 0b100  // PL011 UART TX
+        ]
+    ],
+
+    /// GPIO Pull-up/down Register
+    ///
+    /// BCM2837 only.
+    GPPUD [
+        /// Controls the actuation of the internal pull-up/down control line to ALL the GPIO pins.
+        PUD OFFSET(0) NUMBITS(2) [
+            Off = 0b00,
+            PullDown = 0b01,
+            PullUp = 0b10
+        ]
+    ],
+
+    /// GPIO Pull-up/down Clock Register 0
+    ///
+    /// BCM2837 only.
+    GPPUDCLK0 [
+        /// Pin 15
+        PUDCLK15 OFFSET(15) NUMBITS(1) [
+            NoEffect = 0,
+            AssertClock = 1
+        ],
+
+        /// Pin 14
+        PUDCLK14 OFFSET(14) NUMBITS(1) [
+            NoEffect = 0,
+            AssertClock = 1
+        ]
+    ],
+
+    /// GPIO Pull-up / Pull-down Register 0
+    ///
+    /// BCM2711 only.
+    GPIO_PUP_PDN_CNTRL_REG0 [
+        /// Pin 15
+        GPIO_PUP_PDN_CNTRL15 OFFSET(30) NUMBITS(2) [
+            NoResistor = 0b00,
+            PullUp = 0b01
+        ],
+
+        /// Pin 14
+        GPIO_PUP_PDN_CNTRL14 OFFSET(28) NUMBITS(2) [
+            NoResistor = 0b00,
+            PullUp = 0b01
+        ]
+    ]
+}
+
+register_structs! {
+    #[allow(non_snake_case)]
+    RegisterBlock {
+        (0x00 => _reserved1),
+        (0x04 => GPFSEL1: ReadWrite<u32, GPFSEL1::Register>),
+        (0x08 => _reserved2),
+        (0x94 => GPPUD: ReadWrite<u32, GPPUD::Register>),
+        (0x98 => GPPUDCLK0: ReadWrite<u32, GPPUDCLK0::Register>),
+        (0x9C => _reserved3),
+        (0xE4 => GPIO_PUP_PDN_CNTRL_REG0: ReadWrite<u32, GPIO_PUP_PDN_CNTRL_REG0::Register>),
+        (0xE8 => @END),
+    }
+}
+
+/// Abstraction for the associated MMIO registers.
+type Registers = MMIODerefWrapper<RegisterBlock>;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct GPIOInner {
+    registers: Registers,
+}
+
+// Export the inner struct so that BSPs can use it for the panic handler.
+pub use GPIOInner as PanicGPIO;
+
+/// Representation of the GPIO HW.
+pub struct GPIO {
+    mmio_descriptor: memory::mmu::MMIODescriptor,
+    virt_mmio_start_addr: AtomicUsize,
+    inner: IRQSafeNullLock<GPIOInner>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl GPIOInner {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+        Self {
+            registers: Registers::new(mmio_start_addr),
+        }
+    }
+
+    /// Init code.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub unsafe fn init(&mut self, new_mmio_start_addr: Option<usize>) -> Result<(), &'static str> {
+        if let Some(addr) = new_mmio_start_addr {
+            self.registers = Registers::new(addr);
+        }
+
+        Ok(())
+    }
+
+    /// Disable pull-up/down on pins 14 and 15.
+    #[cfg(feature = "bsp_rpi3")]
+    fn disable_pud_14_15_bcm2837(&mut self) {
+        use crate::{time, time::interface::TimeManager};
+        use core::time::Duration;
+
+        // The Linux 2837 GPIO driver waits 1 µs between the steps.
+        const DELAY: Duration = Duration::from_micros(1);
+
+        self.registers.GPPUD.write(GPPUD::PUD::Off);
+        time::time_manager().spin_for(DELAY);
+
+        self.registers
+            .GPPUDCLK0
+            .write(GPPUDCLK0::PUDCLK15::AssertClock + GPPUDCLK0::PUDCLK14::AssertClock);
+        time::time_manager().spin_for(DELAY);
+
+        self.registers.GPPUD.write(GPPUD::PUD::Off);
+        self.registers.GPPUDCLK0.set(0);
+    }
+
+    /// Disable pull-up/down on pins 14 and 15.
+    #[cfg(feature = "bsp_rpi4")]
+    fn disable_pud_14_15_bcm2711(&mut self) {
+        self.registers.GPIO_PUP_PDN_CNTRL_REG0.write(
+            GPIO_PUP_PDN_CNTRL_REG0::GPIO_PUP_PDN_CNTRL15::PullUp
+                + GPIO_PUP_PDN_CNTRL_REG0::GPIO_PUP_PDN_CNTRL14::PullUp,
+        );
+    }
+
+    /// Map PL011 UART as standard output.
+    ///
+    /// TX to pin 14
+    /// RX to pin 15
+    pub fn map_pl011_uart(&mut self) {
+        // Select the UART on pins 14 and 15.
+        self.registers
+            .GPFSEL1
+            .modify(GPFSEL1::FSEL15::AltFunc0 + GPFSEL1::FSEL14::AltFunc0);
+
+        // Disable pull-up/down on pins 14 and 15.
+        #[cfg(feature = "bsp_rpi3")]
+        self.disable_pud_14_15_bcm2837();
+
+        #[cfg(feature = "bsp_rpi4")]
+        self.disable_pud_14_15_bcm2711();
+    }
+}
+
+impl GPIO {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide correct MMIO descriptors.
+    pub const unsafe fn new(mmio_descriptor: memory::mmu::MMIODescriptor) -> Self {
+        Self {
+            mmio_descriptor,
+            virt_mmio_start_addr: AtomicUsize::new(0),
+            inner: IRQSafeNullLock::new(GPIOInner::new(mmio_descriptor.start_addr().as_usize())),
+        }
+    }
+
+    /// Concurrency safe version of `GPIOInner.map_pl011_uart()`
+    pub fn map_pl011_uart(&self) {
+        self.inner.lock(|inner| inner.map_pl011_uart())
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use synchronization::interface::Mutex;
+
+impl driver::interface::DeviceDriver for GPIO {
+    fn compatible(&self) -> &'static str {
+        "BCM GPIO"
+    }
+
+    unsafe fn init(&self) -> Result<(), &'static str> {
+        let virt_addr = memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?;
+
+        self.inner
+            .lock(|inner| inner.init(Some(virt_addr.as_usize())))?;
+
+        self.virt_mmio_start_addr
+            .store(virt_addr.as_usize(), Ordering::Relaxed);
+
+        Ok(())
+    }
+
+    fn virt_mmio_start_addr(&self) -> Option<usize> {
+        let addr = self.virt_mmio_start_addr.load(Ordering::Relaxed);
+
+        if addr == 0 {
+            return None;
+        }
+
+        Some(addr)
+    }
+}
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
new file mode 100644
index 000000000..99961facb
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -0,0 +1,138 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Interrupt Controller Driver.
+
+mod peripheral_ic;
+
+use crate::{driver, exception, memory};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Wrapper struct for a bitmask indicating pending IRQ numbers.
+struct PendingIRQs {
+    bitmask: u64,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub type LocalIRQ =
+    exception::asynchronous::IRQNumber<{ InterruptController::MAX_LOCAL_IRQ_NUMBER }>;
+pub type PeripheralIRQ =
+    exception::asynchronous::IRQNumber<{ InterruptController::MAX_PERIPHERAL_IRQ_NUMBER }>;
+
+/// Used for the associated type of trait [`exception::asynchronous::interface::IRQManager`].
+#[derive(Copy, Clone)]
+pub enum IRQNumber {
+    Local(LocalIRQ),
+    Peripheral(PeripheralIRQ),
+}
+
+/// Representation of the Interrupt Controller.
+pub struct InterruptController {
+    periph: peripheral_ic::PeripheralIC,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl PendingIRQs {
+    pub fn new(bitmask: u64) -> Self {
+        Self { bitmask }
+    }
+}
+
+impl Iterator for PendingIRQs {
+    type Item = usize;
+
+    fn next(&mut self) -> Option<Self::Item> {
+        use core::intrinsics::cttz;
+
+        let next = cttz(self.bitmask);
+        if next == 64 {
+            return None;
+        }
+
+        self.bitmask &= !(1 << next);
+
+        Some(next as usize)
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl InterruptController {
+    const MAX_LOCAL_IRQ_NUMBER: usize = 11;
+    const MAX_PERIPHERAL_IRQ_NUMBER: usize = 63;
+    const NUM_PERIPHERAL_IRQS: usize = Self::MAX_PERIPHERAL_IRQ_NUMBER + 1;
+
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide correct MMIO descriptors.
+    pub const unsafe fn new(
+        _local_mmio_descriptor: memory::mmu::MMIODescriptor,
+        periph_mmio_descriptor: memory::mmu::MMIODescriptor,
+    ) -> Self {
+        Self {
+            periph: peripheral_ic::PeripheralIC::new(periph_mmio_descriptor),
+        }
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+
+impl driver::interface::DeviceDriver for InterruptController {
+    fn compatible(&self) -> &'static str {
+        "BCM Interrupt Controller"
+    }
+
+    unsafe fn init(&self) -> Result<(), &'static str> {
+        self.periph.init()
+    }
+}
+
+impl exception::asynchronous::interface::IRQManager for InterruptController {
+    type IRQNumberType = IRQNumber;
+
+    fn register_handler(
+        &self,
+        irq: Self::IRQNumberType,
+        descriptor: exception::asynchronous::IRQDescriptor,
+    ) -> Result<(), &'static str> {
+        match irq {
+            IRQNumber::Local(_) => unimplemented!("Local IRQ controller not implemented."),
+            IRQNumber::Peripheral(pirq) => self.periph.register_handler(pirq, descriptor),
+        }
+    }
+
+    fn enable(&self, irq: Self::IRQNumberType) {
+        match irq {
+            IRQNumber::Local(_) => unimplemented!("Local IRQ controller not implemented."),
+            IRQNumber::Peripheral(pirq) => self.periph.enable(pirq),
+        }
+    }
+
+    fn handle_pending_irqs<'irq_context>(
+        &'irq_context self,
+        ic: &exception::asynchronous::IRQContext<'irq_context>,
+    ) {
+        // It can only be a peripheral IRQ pending because enable() does not support local IRQs yet.
+        self.periph.handle_pending_irqs(ic)
+    }
+
+    fn print_handler(&self) {
+        self.periph.print_handler();
+    }
+}
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
new file mode 100644
index 000000000..f09da862f
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -0,0 +1,192 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Peripheral Interrupt Controller Driver.
+
+use super::{InterruptController, PendingIRQs, PeripheralIRQ};
+use crate::{
+    bsp::device_driver::common::MMIODerefWrapper,
+    driver, exception, memory, synchronization,
+    synchronization::{IRQSafeNullLock, InitStateLock},
+};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_structs,
+    registers::{ReadOnly, WriteOnly},
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+register_structs! {
+    #[allow(non_snake_case)]
+    WORegisterBlock {
+        (0x00 => _reserved1),
+        (0x10 => ENABLE_1: WriteOnly<u32>),
+        (0x14 => ENABLE_2: WriteOnly<u32>),
+        (0x24 => @END),
+    }
+}
+
+register_structs! {
+    #[allow(non_snake_case)]
+    RORegisterBlock {
+        (0x00 => _reserved1),
+        (0x04 => PENDING_1: ReadOnly<u32>),
+        (0x08 => PENDING_2: ReadOnly<u32>),
+        (0x0c => @END),
+    }
+}
+
+/// Abstraction for the WriteOnly parts of the associated MMIO registers.
+type WriteOnlyRegisters = MMIODerefWrapper<WORegisterBlock>;
+
+/// Abstraction for the ReadOnly parts of the associated MMIO registers.
+type ReadOnlyRegisters = MMIODerefWrapper<RORegisterBlock>;
+
+type HandlerTable =
+    [Option<exception::asynchronous::IRQDescriptor>; InterruptController::NUM_PERIPHERAL_IRQS];
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Representation of the peripheral interrupt controller.
+pub struct PeripheralIC {
+    mmio_descriptor: memory::mmu::MMIODescriptor,
+
+    /// Access to write registers is guarded with a lock.
+    wo_registers: IRQSafeNullLock<WriteOnlyRegisters>,
+
+    /// Register read access is unguarded.
+    ro_registers: InitStateLock<ReadOnlyRegisters>,
+
+    /// Stores registered IRQ handlers. Writable only during kernel init. RO afterwards.
+    handler_table: InitStateLock<HandlerTable>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl PeripheralIC {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide correct MMIO descriptors.
+    pub const unsafe fn new(mmio_descriptor: memory::mmu::MMIODescriptor) -> Self {
+        let addr = mmio_descriptor.start_addr().as_usize();
+
+        Self {
+            mmio_descriptor,
+            wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(addr)),
+            ro_registers: InitStateLock::new(ReadOnlyRegisters::new(addr)),
+            handler_table: InitStateLock::new([None; InterruptController::NUM_PERIPHERAL_IRQS]),
+        }
+    }
+
+    /// Query the list of pending IRQs.
+    fn pending_irqs(&self) -> PendingIRQs {
+        self.ro_registers.read(|regs| {
+            let pending_mask: u64 =
+                (u64::from(regs.PENDING_2.get()) << 32) | u64::from(regs.PENDING_1.get());
+
+            PendingIRQs::new(pending_mask)
+        })
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use synchronization::interface::{Mutex, ReadWriteEx};
+
+impl driver::interface::DeviceDriver for PeripheralIC {
+    fn compatible(&self) -> &'static str {
+        "BCM Peripheral Interrupt Controller"
+    }
+
+    unsafe fn init(&self) -> Result<(), &'static str> {
+        let virt_addr =
+            memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?.as_usize();
+
+        self.wo_registers
+            .lock(|regs| *regs = WriteOnlyRegisters::new(virt_addr));
+        self.ro_registers
+            .write(|regs| *regs = ReadOnlyRegisters::new(virt_addr));
+
+        Ok(())
+    }
+}
+
+impl exception::asynchronous::interface::IRQManager for PeripheralIC {
+    type IRQNumberType = PeripheralIRQ;
+
+    fn register_handler(
+        &self,
+        irq: Self::IRQNumberType,
+        descriptor: exception::asynchronous::IRQDescriptor,
+    ) -> Result<(), &'static str> {
+        self.handler_table.write(|table| {
+            let irq_number = irq.get();
+
+            if table[irq_number].is_some() {
+                return Err("IRQ handler already registered");
+            }
+
+            table[irq_number] = Some(descriptor);
+
+            Ok(())
+        })
+    }
+
+    fn enable(&self, irq: Self::IRQNumberType) {
+        self.wo_registers.lock(|regs| {
+            let enable_reg = if irq.get() <= 31 {
+                &regs.ENABLE_1
+            } else {
+                &regs.ENABLE_2
+            };
+
+            let enable_bit: u32 = 1 << (irq.get() % 32);
+
+            // Writing a 1 to a bit will set the corresponding IRQ enable bit. All other IRQ enable
+            // bits are unaffected. So we don't need read and OR'ing here.
+            enable_reg.set(enable_bit);
+        });
+    }
+
+    fn handle_pending_irqs<'irq_context>(
+        &'irq_context self,
+        _ic: &exception::asynchronous::IRQContext<'irq_context>,
+    ) {
+        self.handler_table.read(|table| {
+            for irq_number in self.pending_irqs() {
+                match table[irq_number] {
+                    None => panic!("No handler registered for IRQ {}", irq_number),
+                    Some(descriptor) => {
+                        // Call the IRQ handler. Panics on failure.
+                        descriptor.handler.handle().expect("Error handling IRQ");
+                    }
+                }
+            }
+        })
+    }
+
+    fn print_handler(&self) {
+        use crate::info;
+
+        info!("      Peripheral handler:");
+
+        self.handler_table.read(|table| {
+            for (i, opt) in table.iter().enumerate() {
+                if let Some(handler) = opt {
+                    info!("            {: >3}. {}", i, handler.name);
+                }
+            }
+        });
+    }
+}
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
new file mode 100644
index 000000000..23c09a7f2
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -0,0 +1,536 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! PL011 UART driver.
+//!
+//! # Resources
+//!
+//! - <https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf>
+//! - <https://developer.arm.com/documentation/ddi0183/latest>
+
+use crate::{
+    bsp, bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, exception, memory,
+    synchronization, synchronization::IRQSafeNullLock,
+};
+use core::{
+    fmt,
+    sync::atomic::{AtomicUsize, Ordering},
+};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields, register_structs,
+    registers::{ReadOnly, ReadWrite, WriteOnly},
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+// PL011 UART registers.
+//
+// Descriptions taken from "PrimeCell UART (PL011) Technical Reference Manual" r1p5.
+register_bitfields! {
+    u32,
+
+    /// Flag Register.
+    FR [
+        /// Transmit FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
+        /// Line Control Register, LCR_H.
+        ///
+        /// - If the FIFO is disabled, this bit is set when the transmit holding register is empty.
+        /// - If the FIFO is enabled, the TXFE bit is set when the transmit FIFO is empty.
+        /// - This bit does not indicate if there is data in the transmit shift register.
+        TXFE OFFSET(7) NUMBITS(1) [],
+
+        /// Transmit FIFO full. The meaning of this bit depends on the state of the FEN bit in the
+        /// LCR_H Register.
+        ///
+        /// - If the FIFO is disabled, this bit is set when the transmit holding register is full.
+        /// - If the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
+        TXFF OFFSET(5) NUMBITS(1) [],
+
+        /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
+        /// LCR_H Register.
+        ///
+        /// - If the FIFO is disabled, this bit is set when the receive holding register is empty.
+        /// - If the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
+        RXFE OFFSET(4) NUMBITS(1) [],
+
+        /// UART busy. If this bit is set to 1, the UART is busy transmitting data. This bit remains
+        /// set until the complete byte, including all the stop bits, has been sent from the shift
+        /// register.
+        ///
+        /// This bit is set as soon as the transmit FIFO becomes non-empty, regardless of whether
+        /// the UART is enabled or not.
+        BUSY OFFSET(3) NUMBITS(1) []
+    ],
+
+    /// Integer Baud Rate Divisor.
+    IBRD [
+        /// The integer baud rate divisor.
+        BAUD_DIVINT OFFSET(0) NUMBITS(16) []
+    ],
+
+    /// Fractional Baud Rate Divisor.
+    FBRD [
+        ///  The fractional baud rate divisor.
+        BAUD_DIVFRAC OFFSET(0) NUMBITS(6) []
+    ],
+
+    /// Line Control Register.
+    LCR_H [
+        /// Word length. These bits indicate the number of data bits transmitted or received in a
+        /// frame.
+        #[allow(clippy::enum_variant_names)]
+        WLEN OFFSET(5) NUMBITS(2) [
+            FiveBit = 0b00,
+            SixBit = 0b01,
+            SevenBit = 0b10,
+            EightBit = 0b11
+        ],
+
+        /// Enable FIFOs:
+        ///
+        /// 0 = FIFOs are disabled (character mode) that is, the FIFOs become 1-byte-deep holding
+        /// registers.
+        ///
+        /// 1 = Transmit and receive FIFO buffers are enabled (FIFO mode).
+        FEN  OFFSET(4) NUMBITS(1) [
+            FifosDisabled = 0,
+            FifosEnabled = 1
+        ]
+    ],
+
+    /// Control Register.
+    CR [
+        /// Receive enable. If this bit is set to 1, the receive section of the UART is enabled.
+        /// Data reception occurs for either UART signals or SIR signals depending on the setting of
+        /// the SIREN bit. When the UART is disabled in the middle of reception, it completes the
+        /// current character before stopping.
+        RXE OFFSET(9) NUMBITS(1) [
+            Disabled = 0,
+            Enabled = 1
+        ],
+
+        /// Transmit enable. If this bit is set to 1, the transmit section of the UART is enabled.
+        /// Data transmission occurs for either UART signals, or SIR signals depending on the
+        /// setting of the SIREN bit. When the UART is disabled in the middle of transmission, it
+        /// completes the current character before stopping.
+        TXE OFFSET(8) NUMBITS(1) [
+            Disabled = 0,
+            Enabled = 1
+        ],
+
+        /// UART enable:
+        ///
+        /// 0 = UART is disabled. If the UART is disabled in the middle of transmission or
+        /// reception, it completes the current character before stopping.
+        ///
+        /// 1 = The UART is enabled. Data transmission and reception occurs for either UART signals
+        /// or SIR signals depending on the setting of the SIREN bit
+        UARTEN OFFSET(0) NUMBITS(1) [
+            /// If the UART is disabled in the middle of transmission or reception, it completes the
+            /// current character before stopping.
+            Disabled = 0,
+            Enabled = 1
+        ]
+    ],
+
+    /// Interrupt FIFO Level Select Register.
+    IFLS [
+        /// Receive interrupt FIFO level select. The trigger points for the receive interrupt are as
+        /// follows.
+        RXIFLSEL OFFSET(3) NUMBITS(5) [
+            OneEigth = 0b000,
+            OneQuarter = 0b001,
+            OneHalf = 0b010,
+            ThreeQuarters = 0b011,
+            SevenEights = 0b100
+        ]
+    ],
+
+    /// Interrupt Mask Set/Clear Register.
+    IMSC [
+        /// Receive timeout interrupt mask. A read returns the current mask for the UARTRTINTR
+        /// interrupt.
+        ///
+        /// - On a write of 1, the mask of the UARTRTINTR interrupt is set.
+        /// - A write of 0 clears the mask.
+        RTIM OFFSET(6) NUMBITS(1) [
+            Disabled = 0,
+            Enabled = 1
+        ],
+
+        /// Receive interrupt mask. A read returns the current mask for the UARTRXINTR interrupt.
+        ///
+        /// - On a write of 1, the mask of the UARTRXINTR interrupt is set.
+        /// - A write of 0 clears the mask.
+        RXIM OFFSET(4) NUMBITS(1) [
+            Disabled = 0,
+            Enabled = 1
+        ]
+    ],
+
+    /// Masked Interrupt Status Register.
+    MIS [
+        /// Receive timeout masked interrupt status. Returns the masked interrupt state of the
+        /// UARTRTINTR interrupt.
+        RTMIS OFFSET(6) NUMBITS(1) [],
+
+        /// Receive masked interrupt status. Returns the masked interrupt state of the UARTRXINTR
+        /// interrupt.
+        RXMIS OFFSET(4) NUMBITS(1) []
+    ],
+
+    /// Interrupt Clear Register.
+    ICR [
+        /// Meta field for all pending interrupts.
+        ALL OFFSET(0) NUMBITS(11) []
+    ]
+}
+
+register_structs! {
+    #[allow(non_snake_case)]
+    pub RegisterBlock {
+        (0x00 => DR: ReadWrite<u32>),
+        (0x04 => _reserved1),
+        (0x18 => FR: ReadOnly<u32, FR::Register>),
+        (0x1c => _reserved2),
+        (0x24 => IBRD: WriteOnly<u32, IBRD::Register>),
+        (0x28 => FBRD: WriteOnly<u32, FBRD::Register>),
+        (0x2c => LCR_H: WriteOnly<u32, LCR_H::Register>),
+        (0x30 => CR: WriteOnly<u32, CR::Register>),
+        (0x34 => IFLS: ReadWrite<u32, IFLS::Register>),
+        (0x38 => IMSC: ReadWrite<u32, IMSC::Register>),
+        (0x3C => _reserved3),
+        (0x40 => MIS: ReadOnly<u32, MIS::Register>),
+        (0x44 => ICR: WriteOnly<u32, ICR::Register>),
+        (0x48 => @END),
+    }
+}
+
+/// Abstraction for the associated MMIO registers.
+type Registers = MMIODerefWrapper<RegisterBlock>;
+
+#[derive(PartialEq)]
+enum BlockingMode {
+    Blocking,
+    NonBlocking,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct PL011UartInner {
+    registers: Registers,
+    chars_written: usize,
+    chars_read: usize,
+}
+
+// Export the inner struct so that BSPs can use it for the panic handler.
+pub use PL011UartInner as PanicUart;
+
+/// Representation of the UART.
+pub struct PL011Uart {
+    mmio_descriptor: memory::mmu::MMIODescriptor,
+    virt_mmio_start_addr: AtomicUsize,
+    inner: IRQSafeNullLock<PL011UartInner>,
+    irq_number: bsp::device_driver::IRQNumber,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl PL011UartInner {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+        Self {
+            registers: Registers::new(mmio_start_addr),
+            chars_written: 0,
+            chars_read: 0,
+        }
+    }
+
+    /// Set up baud rate and characteristics.
+    ///
+    /// This results in 8N1 and 921_600 baud.
+    ///
+    /// The calculation for the BRD is (we set the clock to 48 MHz in config.txt):
+    /// `(48_000_000 / 16) / 921_600 = 3.2552083`.
+    ///
+    /// This means the integer part is `3` and goes into the `IBRD`.
+    /// The fractional part is `0.2552083`.
+    ///
+    /// `FBRD` calculation according to the PL011 Technical Reference Manual:
+    /// `INTEGER((0.2552083 * 64) + 0.5) = 16`.
+    ///
+    /// Therefore, the generated baud rate divider is: `3 + 16/64 = 3.25`. Which results in a
+    /// genrated baud rate of `48_000_000 / (16 * 3.25) = 923_077`.
+    ///
+    /// Error = `((923_077 - 921_600) / 921_600) * 100 = 0.16%`.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub unsafe fn init(&mut self, new_mmio_start_addr: Option<usize>) -> Result<(), &'static str> {
+        if let Some(addr) = new_mmio_start_addr {
+            self.registers = Registers::new(addr);
+        }
+
+        // Execution can arrive here while there are still characters queued in the TX FIFO and
+        // actively being sent out by the UART hardware. If the UART is turned off in this case,
+        // those queued characters would be lost.
+        //
+        // For example, this can happen during runtime on a call to panic!(), because panic!()
+        // initializes its own UART instance and calls init().
+        //
+        // Hence, flush first to ensure all pending characters are transmitted.
+        self.flush();
+
+        // Turn the UART off temporarily.
+        self.registers.CR.set(0);
+
+        // Clear all pending interrupts.
+        self.registers.ICR.write(ICR::ALL::CLEAR);
+
+        // From the PL011 Technical Reference Manual:
+        //
+        // The LCR_H, IBRD, and FBRD registers form the single 30-bit wide LCR Register that is
+        // updated on a single write strobe generated by a LCR_H write. So, to internally update the
+        // contents of IBRD or FBRD, a LCR_H write must always be performed at the end.
+        //
+        // Set the baud rate, 8N1 and FIFO enabled.
+        self.registers.IBRD.write(IBRD::BAUD_DIVINT.val(3));
+        self.registers.FBRD.write(FBRD::BAUD_DIVFRAC.val(16));
+        self.registers
+            .LCR_H
+            .write(LCR_H::WLEN::EightBit + LCR_H::FEN::FifosEnabled);
+
+        // Set RX FIFO fill level at 1/8.
+        self.registers.IFLS.write(IFLS::RXIFLSEL::OneEigth);
+
+        // Enable RX IRQ + RX timeout IRQ.
+        self.registers
+            .IMSC
+            .write(IMSC::RXIM::Enabled + IMSC::RTIM::Enabled);
+
+        // Turn the UART on.
+        self.registers
+            .CR
+            .write(CR::UARTEN::Enabled + CR::TXE::Enabled + CR::RXE::Enabled);
+
+        Ok(())
+    }
+
+    /// Send a character.
+    fn write_char(&mut self, c: char) {
+        // Spin while TX FIFO full is set, waiting for an empty slot.
+        while self.registers.FR.matches_all(FR::TXFF::SET) {
+            cpu::nop();
+        }
+
+        // Write the character to the buffer.
+        self.registers.DR.set(c as u32);
+
+        self.chars_written += 1;
+    }
+
+    /// Block execution until the last buffered character has been physically put on the TX wire.
+    fn flush(&self) {
+        // Spin until the busy bit is cleared.
+        while self.registers.FR.matches_all(FR::BUSY::SET) {
+            cpu::nop();
+        }
+    }
+
+    /// Retrieve a character.
+    fn read_char_converting(&mut self, blocking_mode: BlockingMode) -> Option<char> {
+        // If RX FIFO is empty,
+        if self.registers.FR.matches_all(FR::RXFE::SET) {
+            // immediately return in non-blocking mode.
+            if blocking_mode == BlockingMode::NonBlocking {
+                return None;
+            }
+
+            // Otherwise, wait until a char was received.
+            while self.registers.FR.matches_all(FR::RXFE::SET) {
+                cpu::nop();
+            }
+        }
+
+        // Read one character.
+        let mut ret = self.registers.DR.get() as u8 as char;
+
+        // Convert carrige return to newline.
+        if ret == '\r' {
+            ret = '\n'
+        }
+
+        // Update statistics.
+        self.chars_read += 1;
+
+        Some(ret)
+    }
+}
+
+/// Implementing `core::fmt::Write` enables usage of the `format_args!` macros, which in turn are
+/// used to implement the `kernel`'s `print!` and `println!` macros. By implementing `write_str()`,
+/// we get `write_fmt()` automatically.
+///
+/// The function takes an `&mut self`, so it must be implemented for the inner struct.
+///
+/// See [`src/print.rs`].
+///
+/// [`src/print.rs`]: ../../print/index.html
+impl fmt::Write for PL011UartInner {
+    fn write_str(&mut self, s: &str) -> fmt::Result {
+        for c in s.chars() {
+            self.write_char(c);
+        }
+
+        Ok(())
+    }
+}
+
+impl PL011Uart {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide correct MMIO descriptors.
+    /// - The user must ensure to provide correct IRQ numbers.
+    pub const unsafe fn new(
+        mmio_descriptor: memory::mmu::MMIODescriptor,
+        irq_number: bsp::device_driver::IRQNumber,
+    ) -> Self {
+        Self {
+            mmio_descriptor,
+            virt_mmio_start_addr: AtomicUsize::new(0),
+            inner: IRQSafeNullLock::new(PL011UartInner::new(
+                mmio_descriptor.start_addr().as_usize(),
+            )),
+            irq_number,
+        }
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use synchronization::interface::Mutex;
+
+impl driver::interface::DeviceDriver for PL011Uart {
+    fn compatible(&self) -> &'static str {
+        "BCM PL011 UART"
+    }
+
+    unsafe fn init(&self) -> Result<(), &'static str> {
+        let virt_addr = memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?;
+
+        self.inner
+            .lock(|inner| inner.init(Some(virt_addr.as_usize())))?;
+
+        self.virt_mmio_start_addr
+            .store(virt_addr.as_usize(), Ordering::Relaxed);
+
+        Ok(())
+    }
+
+    fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
+        use bsp::exception::asynchronous::irq_manager;
+        use exception::asynchronous::{interface::IRQManager, IRQDescriptor};
+
+        let descriptor = IRQDescriptor {
+            name: "BCM PL011 UART",
+            handler: self,
+        };
+
+        irq_manager().register_handler(self.irq_number, descriptor)?;
+        irq_manager().enable(self.irq_number);
+
+        Ok(())
+    }
+
+    fn virt_mmio_start_addr(&self) -> Option<usize> {
+        let addr = self.virt_mmio_start_addr.load(Ordering::Relaxed);
+
+        if addr == 0 {
+            return None;
+        }
+
+        Some(addr)
+    }
+}
+
+impl console::interface::Write for PL011Uart {
+    /// Passthrough of `args` to the `core::fmt::Write` implementation, but guarded by a Mutex to
+    /// serialize access.
+    fn write_char(&self, c: char) {
+        self.inner.lock(|inner| inner.write_char(c));
+    }
+
+    fn write_fmt(&self, args: core::fmt::Arguments) -> fmt::Result {
+        // Fully qualified syntax for the call to `core::fmt::Write::write:fmt()` to increase
+        // readability.
+        self.inner.lock(|inner| fmt::Write::write_fmt(inner, args))
+    }
+
+    fn flush(&self) {
+        // Spin until TX FIFO empty is set.
+        self.inner.lock(|inner| inner.flush());
+    }
+}
+
+impl console::interface::Read for PL011Uart {
+    fn read_char(&self) -> char {
+        self.inner
+            .lock(|inner| inner.read_char_converting(BlockingMode::Blocking).unwrap())
+    }
+
+    fn clear_rx(&self) {
+        // Read from the RX FIFO until it is indicating empty.
+        while self
+            .inner
+            .lock(|inner| inner.read_char_converting(BlockingMode::NonBlocking))
+            .is_some()
+        {}
+    }
+}
+
+impl console::interface::Statistics for PL011Uart {
+    fn chars_written(&self) -> usize {
+        self.inner.lock(|inner| inner.chars_written)
+    }
+
+    fn chars_read(&self) -> usize {
+        self.inner.lock(|inner| inner.chars_read)
+    }
+}
+
+impl exception::asynchronous::interface::IRQHandler for PL011Uart {
+    fn handle(&self) -> Result<(), &'static str> {
+        self.inner.lock(|inner| {
+            let pending = inner.registers.MIS.extract();
+
+            // Clear all pending IRQs.
+            inner.registers.ICR.write(ICR::ALL::CLEAR);
+
+            // Check for any kind of RX interrupt.
+            if pending.matches_any(MIS::RXMIS::SET + MIS::RTMIS::SET) {
+                // Echo any received characters.
+                while let Some(c) = inner.read_char_converting(BlockingMode::NonBlocking) {
+                    inner.write_char(c)
+                }
+            }
+        });
+
+        Ok(())
+    }
+}
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/common.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/common.rs
new file mode 100644
index 000000000..fd9e988ea
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/common.rs
@@ -0,0 +1,38 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Common device driver code.
+
+use core::{marker::PhantomData, ops};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct MMIODerefWrapper<T> {
+    start_addr: usize,
+    phantom: PhantomData<fn() -> T>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl<T> MMIODerefWrapper<T> {
+    /// Create an instance.
+    pub const unsafe fn new(start_addr: usize) -> Self {
+        Self {
+            start_addr,
+            phantom: PhantomData,
+        }
+    }
+}
+
+impl<T> ops::Deref for MMIODerefWrapper<T> {
+    type Target = T;
+
+    fn deref(&self) -> &Self::Target {
+        unsafe { &*(self.start_addr as *const _) }
+    }
+}
diff --git a/17_kernel_symbols/kernel/src/bsp/raspberrypi.rs b/17_kernel_symbols/kernel/src/bsp/raspberrypi.rs
new file mode 100644
index 000000000..fb9edf88d
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/bsp/raspberrypi.rs
@@ -0,0 +1,62 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Top-level BSP file for the Raspberry Pi 3 and 4.
+
+pub mod console;
+pub mod cpu;
+pub mod driver;
+pub mod exception;
+pub mod memory;
+
+use super::device_driver;
+use crate::memory::mmu::MMIODescriptor;
+use memory::map::mmio;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static GPIO: device_driver::GPIO =
+    unsafe { device_driver::GPIO::new(MMIODescriptor::new(mmio::GPIO_START, mmio::GPIO_SIZE)) };
+
+static PL011_UART: device_driver::PL011Uart = unsafe {
+    device_driver::PL011Uart::new(
+        MMIODescriptor::new(mmio::PL011_UART_START, mmio::PL011_UART_SIZE),
+        exception::asynchronous::irq_map::PL011_UART,
+    )
+};
+
+#[cfg(feature = "bsp_rpi3")]
+static INTERRUPT_CONTROLLER: device_driver::InterruptController = unsafe {
+    device_driver::InterruptController::new(
+        MMIODescriptor::new(mmio::LOCAL_IC_START, mmio::LOCAL_IC_SIZE),
+        MMIODescriptor::new(mmio::PERIPHERAL_IC_START, mmio::PERIPHERAL_IC_SIZE),
+    )
+};
+
+#[cfg(feature = "bsp_rpi4")]
+static INTERRUPT_CONTROLLER: device_driver::GICv2 = unsafe {
+    device_driver::GICv2::new(
+        MMIODescriptor::new(mmio::GICD_START, mmio::GICD_SIZE),
+        MMIODescriptor::new(mmio::GICC_START, mmio::GICC_SIZE),
+    )
+};
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Board identification.
+pub fn board_name() -> &'static str {
+    #[cfg(feature = "bsp_rpi3")]
+    {
+        "Raspberry Pi 3"
+    }
+
+    #[cfg(feature = "bsp_rpi4")]
+    {
+        "Raspberry Pi 4"
+    }
+}
diff --git a/17_kernel_symbols/kernel/src/bsp/raspberrypi/console.rs b/17_kernel_symbols/kernel/src/bsp/raspberrypi/console.rs
new file mode 100644
index 000000000..a0d2e687c
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/bsp/raspberrypi/console.rs
@@ -0,0 +1,98 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP console facilities.
+
+use crate::{bsp::device_driver, console, cpu, driver};
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// In case of a panic, the panic handler uses this function to take a last shot at printing
+/// something before the system is halted.
+///
+/// We try to init panic-versions of the GPIO and the UART. The panic versions are not protected
+/// with synchronization primitives, which increases chances that we get to print something, even
+/// when the kernel's default GPIO or UART instances happen to be locked at the time of the panic.
+///
+/// # Safety
+///
+/// - Use only for printing during a panic.
+#[cfg(not(feature = "test_build"))]
+pub unsafe fn panic_console_out() -> impl fmt::Write {
+    use driver::interface::DeviceDriver;
+
+    // If remapping of the driver's MMIO hasn't already happened, we won't be able to print. Just
+    // park the CPU core in this case.
+    let gpio_mmio_start_addr = match super::GPIO.virt_mmio_start_addr() {
+        None => cpu::wait_forever(),
+        Some(x) => x,
+    };
+
+    let uart_mmio_start_addr = match super::PL011_UART.virt_mmio_start_addr() {
+        None => cpu::wait_forever(),
+        Some(x) => x,
+    };
+
+    let mut panic_gpio = device_driver::PanicGPIO::new(gpio_mmio_start_addr);
+    let mut panic_uart = device_driver::PanicUart::new(uart_mmio_start_addr);
+
+    panic_gpio
+        .init(None)
+        .unwrap_or_else(|_| cpu::wait_forever());
+    panic_gpio.map_pl011_uart();
+    panic_uart
+        .init(None)
+        .unwrap_or_else(|_| cpu::wait_forever());
+
+    panic_uart
+}
+
+/// Reduced version for test builds.
+///
+/// # Safety
+///
+/// - Use only for printing during a panic.
+#[cfg(feature = "test_build")]
+pub unsafe fn panic_console_out() -> impl fmt::Write {
+    use driver::interface::DeviceDriver;
+
+    let uart_mmio_start_addr = match super::PL011_UART.virt_mmio_start_addr() {
+        None => cpu::wait_forever(),
+        Some(x) => x,
+    };
+    let mut panic_uart = device_driver::PanicUart::new(uart_mmio_start_addr);
+
+    panic_uart
+        .init(None)
+        .unwrap_or_else(|_| cpu::qemu_exit_failure());
+
+    panic_uart
+}
+
+/// Return a reference to the console.
+pub fn console() -> &'static impl console::interface::All {
+    &super::PL011_UART
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+/// Minimal code needed to bring up the console in QEMU (for testing only). This is often less steps
+/// than on real hardware due to QEMU's abstractions.
+#[cfg(feature = "test_build")]
+pub fn qemu_bring_up_console() {
+    use driver::interface::DeviceDriver;
+
+    // Calling the UART's init ensures that the BSP's instance of the UART does remap the MMIO
+    // addresses.
+    unsafe {
+        super::PL011_UART
+            .init()
+            .unwrap_or_else(|_| cpu::qemu_exit_failure());
+    }
+}
diff --git a/17_kernel_symbols/kernel/src/bsp/raspberrypi/cpu.rs b/17_kernel_symbols/kernel/src/bsp/raspberrypi/cpu.rs
new file mode 100644
index 000000000..85fb89e49
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/bsp/raspberrypi/cpu.rs
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP Processor code.
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Used by `arch` code to find the early boot core.
+#[no_mangle]
+#[link_section = ".text._start_arguments"]
+pub static BOOT_CORE_ID: u64 = 0;
diff --git a/17_kernel_symbols/kernel/src/bsp/raspberrypi/driver.rs b/17_kernel_symbols/kernel/src/bsp/raspberrypi/driver.rs
new file mode 100644
index 000000000..531687524
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/bsp/raspberrypi/driver.rs
@@ -0,0 +1,61 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP driver support.
+
+use crate::driver;
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Device Driver Manager type.
+struct BSPDriverManager {
+    device_drivers: [&'static (dyn DeviceDriver + Sync); 3],
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
+    device_drivers: [
+        &super::GPIO,
+        &super::PL011_UART,
+        &super::INTERRUPT_CONTROLLER,
+    ],
+};
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the driver manager.
+pub fn driver_manager() -> &'static impl driver::interface::DriverManager {
+    &BSP_DRIVER_MANAGER
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use driver::interface::DeviceDriver;
+
+impl driver::interface::DriverManager for BSPDriverManager {
+    fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
+        &self.device_drivers[..]
+    }
+
+    fn early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
+        &self.device_drivers[0..=1]
+    }
+
+    fn non_early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
+        &self.device_drivers[2..]
+    }
+
+    fn post_early_print_device_driver_init(&self) {
+        // Configure PL011Uart's output pins.
+        super::GPIO.map_pl011_uart();
+    }
+}
diff --git a/17_kernel_symbols/kernel/src/bsp/raspberrypi/exception.rs b/17_kernel_symbols/kernel/src/bsp/raspberrypi/exception.rs
new file mode 100644
index 000000000..aa6c5a63f
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/bsp/raspberrypi/exception.rs
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP synchronous and asynchronous exception handling.
+
+pub mod asynchronous;
diff --git a/17_kernel_symbols/kernel/src/bsp/raspberrypi/exception/asynchronous.rs b/17_kernel_symbols/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
new file mode 100644
index 000000000..dc5ab4215
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP asynchronous exception handling.
+
+use crate::{bsp, exception};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(feature = "bsp_rpi3")]
+pub(in crate::bsp) mod irq_map {
+    use super::bsp::device_driver::{IRQNumber, PeripheralIRQ};
+
+    pub const PL011_UART: IRQNumber = IRQNumber::Peripheral(PeripheralIRQ::new(57));
+}
+
+#[cfg(feature = "bsp_rpi4")]
+pub(in crate::bsp) mod irq_map {
+    use super::bsp::device_driver::IRQNumber;
+
+    pub const PL011_UART: IRQNumber = IRQNumber::new(153);
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the IRQ manager.
+pub fn irq_manager() -> &'static impl exception::asynchronous::interface::IRQManager<
+    IRQNumberType = bsp::device_driver::IRQNumber,
+> {
+    &super::super::INTERRUPT_CONTROLLER
+}
diff --git a/17_kernel_symbols/kernel/src/bsp/raspberrypi/kernel.ld b/17_kernel_symbols/kernel/src/bsp/raspberrypi/kernel.ld
new file mode 100644
index 000000000..6fcbf31cf
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/bsp/raspberrypi/kernel.ld
@@ -0,0 +1,114 @@
+/* SPDX-License-Identifier: MIT OR Apache-2.0
+ *
+ * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+ */
+
+INCLUDE kernel_virt_addr_space_size.ld;
+
+PAGE_SIZE = 64K;
+PAGE_MASK = PAGE_SIZE - 1;
+
+/* The kernel's virtual address range will be:
+ *
+ * [END_ADDRESS_INCLUSIVE, START_ADDRESS]
+ * [u64::MAX             , (u64::MAX - __kernel_virt_addr_space_size) + 1]
+ */
+__kernel_virt_start_addr = ((0xffffffffffffffff - __kernel_virt_addr_space_size) + 1);
+
+__rpi_phys_dram_start_addr = 0;
+
+/* The physical address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_phys_binary_load_addr = 0x80000;
+
+
+ENTRY(__rpi_phys_binary_load_addr)
+
+/* Flags:
+ *     4 == R
+ *     5 == RX
+ *     6 == RW
+ *
+ * Segments are marked PT_LOAD below so that the ELF file provides virtual and physical addresses.
+ * It doesn't mean all of them need actually be loaded.
+ */
+PHDRS
+{
+    segment_code            PT_LOAD FLAGS(5);
+    segment_data            PT_LOAD FLAGS(6);
+    segment_boot_core_stack PT_LOAD FLAGS(6);
+}
+
+SECTIONS
+{
+    . =  __kernel_virt_start_addr;
+
+    ASSERT((. & PAGE_MASK) == 0, "Start of address space is not page aligned")
+
+    /***********************************************************************************************
+    * Code + RO Data + Global Offset Table
+    ***********************************************************************************************/
+    __code_start = .;
+    .text : AT(__rpi_phys_binary_load_addr)
+    {
+        KEEP(*(.text._start))
+        *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
+        *(.text._start_rust)      /* The Rust entry point */
+        *(.text*)                 /* Everything else */
+    } :segment_code
+
+    .rodata         : ALIGN(8) { *(.rodata*) } :segment_code
+    .got            : ALIGN(8) { *(.got)     } :segment_code
+    .kernel_symbols : ALIGN(8) {
+        __kernel_symbols_start = .;
+        . += 32 * 1024;
+    } :segment_code
+
+    . = ALIGN(PAGE_SIZE);
+    __code_end_exclusive = .;
+
+    /***********************************************************************************************
+    * Data + BSS
+    ***********************************************************************************************/
+    __data_start = .;
+    .data : { *(.data*) } :segment_data
+
+    /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
+    .bss (NOLOAD) : ALIGN(16)
+    {
+        __bss_start = .;
+        *(.bss*);
+        . = ALIGN(16);
+        __bss_end_exclusive = .;
+    } :segment_data
+
+    . = ALIGN(PAGE_SIZE);
+    __data_end_exclusive = .;
+
+    /***********************************************************************************************
+    * MMIO Remap Reserved
+    ***********************************************************************************************/
+    __mmio_remap_start = .;
+    . += 8 * 1024 * 1024;
+    __mmio_remap_end_exclusive = .;
+
+    ASSERT((. & PAGE_MASK) == 0, "MMIO remap reservation is not page aligned")
+
+    /***********************************************************************************************
+    * Guard Page
+    ***********************************************************************************************/
+    . += PAGE_SIZE;
+
+    /***********************************************************************************************
+    * Boot Core Stack
+    ***********************************************************************************************/
+    .boot_core_stack (NOLOAD) : AT(__rpi_phys_dram_start_addr)
+    {
+        __boot_core_stack_start = .;         /*   ^             */
+                                             /*   | stack       */
+        . += __rpi_phys_binary_load_addr;    /*   | growth      */
+                                             /*   | direction   */
+        __boot_core_stack_end_exclusive = .; /*   |             */
+    } :segment_boot_core_stack
+
+    ASSERT((. & PAGE_MASK) == 0, "End of boot core stack is not page aligned")
+}
diff --git a/17_kernel_symbols/kernel/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld b/17_kernel_symbols/kernel/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
new file mode 100644
index 000000000..c5d58c30a
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
@@ -0,0 +1 @@
+__kernel_virt_addr_space_size = 1024 * 1024 * 1024
diff --git a/17_kernel_symbols/kernel/src/bsp/raspberrypi/memory.rs b/17_kernel_symbols/kernel/src/bsp/raspberrypi/memory.rs
new file mode 100644
index 000000000..01aa9441a
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/bsp/raspberrypi/memory.rs
@@ -0,0 +1,227 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP Memory Management.
+//!
+//! The physical memory layout.
+//!
+//! The Raspberry's firmware copies the kernel binary to 0x8_0000. The preceding region will be used
+//! as the boot core's stack.
+//!
+//! +---------------------------------------+
+//! |                                       | boot_core_stack_start @ 0x0
+//! |                                       |                                ^
+//! | Boot-core Stack                       |                                | stack
+//! |                                       |                                | growth
+//! |                                       |                                | direction
+//! +---------------------------------------+
+//! |                                       | code_start @ 0x8_0000 == boot_core_stack_end_exclusive
+//! | .text                                 |
+//! | .rodata                               |
+//! | .got                                  |
+//! | .kernel_symbols                       |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       | data_start == code_end_exclusive
+//! | .data                                 |
+//! | .bss                                  |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       | data_end_exclusive
+//! |                                       |
+//!
+//!
+//!
+//!
+//!
+//! The virtual memory layout is as follows:
+//!
+//! +---------------------------------------+
+//! |                                       | code_start @ __kernel_virt_start_addr
+//! | .text                                 |
+//! | .rodata                               |
+//! | .got                                  |
+//! | .kernel_symbols                       |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       | data_start == code_end_exclusive
+//! | .data                                 |
+//! | .bss                                  |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       |  mmio_remap_start == data_end_exclusive
+//! | VA region for MMIO remapping          |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       |  mmio_remap_end_exclusive
+//! | Unmapped guard page                   |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       | boot_core_stack_start
+//! |                                       |                                ^
+//! | Boot-core Stack                       |                                | stack
+//! |                                       |                                | growth
+//! |                                       |                                | direction
+//! +---------------------------------------+
+//! |                                       | boot_core_stack_end_exclusive
+//! |                                       |
+pub mod mmu;
+
+use crate::memory::{mmu::PageAddress, Address, Physical, Virtual};
+use core::cell::UnsafeCell;
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+// Symbols from the linker script.
+extern "Rust" {
+    static __code_start: UnsafeCell<()>;
+    static __code_end_exclusive: UnsafeCell<()>;
+
+    static __data_start: UnsafeCell<()>;
+    static __data_end_exclusive: UnsafeCell<()>;
+
+    static __mmio_remap_start: UnsafeCell<()>;
+    static __mmio_remap_end_exclusive: UnsafeCell<()>;
+
+    static __boot_core_stack_start: UnsafeCell<()>;
+    static __boot_core_stack_end_exclusive: UnsafeCell<()>;
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// The board's physical memory map.
+#[rustfmt::skip]
+pub(super) mod map {
+    use super::*;
+
+    /// Physical devices.
+    #[cfg(feature = "bsp_rpi3")]
+    pub mod mmio {
+        use super::*;
+
+        pub const PERIPHERAL_IC_START: Address<Physical> = Address::new(0x3F00_B200);
+        pub const PERIPHERAL_IC_SIZE:  usize             =              0x24;
+
+        pub const GPIO_START:          Address<Physical> = Address::new(0x3F20_0000);
+        pub const GPIO_SIZE:           usize             =              0xA0;
+
+        pub const PL011_UART_START:    Address<Physical> = Address::new(0x3F20_1000);
+        pub const PL011_UART_SIZE:     usize             =              0x48;
+
+        pub const LOCAL_IC_START:      Address<Physical> = Address::new(0x4000_0000);
+        pub const LOCAL_IC_SIZE:       usize             =              0x100;
+
+        pub const END:                 Address<Physical> = Address::new(0x4001_0000);
+    }
+
+    /// Physical devices.
+    #[cfg(feature = "bsp_rpi4")]
+    pub mod mmio {
+        use super::*;
+
+        pub const GPIO_START:       Address<Physical> = Address::new(0xFE20_0000);
+        pub const GPIO_SIZE:        usize             =              0xA0;
+
+        pub const PL011_UART_START: Address<Physical> = Address::new(0xFE20_1000);
+        pub const PL011_UART_SIZE:  usize             =              0x48;
+
+        pub const GICD_START:       Address<Physical> = Address::new(0xFF84_1000);
+        pub const GICD_SIZE:        usize             =              0x824;
+
+        pub const GICC_START:       Address<Physical> = Address::new(0xFF84_2000);
+        pub const GICC_SIZE:        usize             =              0x14;
+
+        pub const END:              Address<Physical> = Address::new(0xFF85_0000);
+    }
+
+    pub const END: Address<Physical> = mmio::END;
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// Start page address of the code segment.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn virt_code_start() -> PageAddress<Virtual> {
+    PageAddress::from(unsafe { __code_start.get() as usize })
+}
+
+/// Size of the code segment.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn code_size() -> usize {
+    unsafe { (__code_end_exclusive.get() as usize) - (__code_start.get() as usize) }
+}
+
+/// Start page address of the data segment.
+#[inline(always)]
+fn virt_data_start() -> PageAddress<Virtual> {
+    PageAddress::from(unsafe { __data_start.get() as usize })
+}
+
+/// Size of the data segment.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn data_size() -> usize {
+    unsafe { (__data_end_exclusive.get() as usize) - (__data_start.get() as usize) }
+}
+
+/// Start page address of the MMIO remap reservation.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn virt_mmio_remap_start() -> PageAddress<Virtual> {
+    PageAddress::from(unsafe { __mmio_remap_start.get() as usize })
+}
+
+/// Size of the MMIO remap reservation.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn mmio_remap_size() -> usize {
+    unsafe { (__mmio_remap_end_exclusive.get() as usize) - (__mmio_remap_start.get() as usize) }
+}
+
+/// Start page address of the boot core's stack.
+#[inline(always)]
+fn virt_boot_core_stack_start() -> PageAddress<Virtual> {
+    PageAddress::from(unsafe { __boot_core_stack_start.get() as usize })
+}
+
+/// Size of the boot core's stack.
+#[inline(always)]
+fn boot_core_stack_size() -> usize {
+    unsafe {
+        (__boot_core_stack_end_exclusive.get() as usize) - (__boot_core_stack_start.get() as usize)
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Exclusive end address of the physical address space.
+#[inline(always)]
+pub fn phys_addr_space_end_exclusive_addr() -> PageAddress<Physical> {
+    PageAddress::from(map::END)
+}
diff --git a/17_kernel_symbols/kernel/src/bsp/raspberrypi/memory/mmu.rs b/17_kernel_symbols/kernel/src/bsp/raspberrypi/memory/mmu.rs
new file mode 100644
index 000000000..bfebd8b29
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/bsp/raspberrypi/memory/mmu.rs
@@ -0,0 +1,179 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP Memory Management Unit.
+
+use crate::{
+    memory::{
+        mmu::{
+            self as generic_mmu, AddressSpace, AssociatedTranslationTable, AttributeFields,
+            MemoryRegion, PageAddress, TranslationGranule,
+        },
+        Physical, Virtual,
+    },
+    synchronization::InitStateLock,
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+type KernelTranslationTable =
+    <KernelVirtAddrSpace as AssociatedTranslationTable>::TableStartFromTop;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// The translation granule chosen by this BSP. This will be used everywhere else in the kernel to
+/// derive respective data structures and their sizes. For example, the `crate::memory::mmu::Page`.
+pub type KernelGranule = TranslationGranule<{ 64 * 1024 }>;
+
+/// The kernel's virtual address space defined by this BSP.
+pub type KernelVirtAddrSpace = AddressSpace<{ kernel_virt_addr_space_size() }>;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+/// The kernel translation tables.
+///
+/// It is mandatory that InitStateLock is transparent.
+///
+/// That is, `size_of(InitStateLock<KernelTranslationTable>) == size_of(KernelTranslationTable)`.
+/// There is a unit tests that checks this porperty.
+#[link_section = ".data"]
+#[no_mangle]
+static KERNEL_TABLES: InitStateLock<KernelTranslationTable> =
+    InitStateLock::new(KernelTranslationTable::new_for_precompute());
+
+/// This value is needed during early boot for MMU setup.
+///
+/// This will be patched to the correct value by the "translation table tool" after linking. This
+/// given value here is just a dummy.
+#[link_section = ".text._start_arguments"]
+#[no_mangle]
+static PHYS_KERNEL_TABLES_BASE_ADDR: u64 = 0xCCCCAAAAFFFFEEEE;
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// This is a hack for retrieving the value for the kernel's virtual address space size as a
+/// constant from a common place, since it is needed as a compile-time/link-time constant in both,
+/// the linker script and the Rust sources.
+#[allow(clippy::needless_late_init)]
+const fn kernel_virt_addr_space_size() -> usize {
+    let __kernel_virt_addr_space_size;
+
+    include!("../kernel_virt_addr_space_size.ld");
+
+    __kernel_virt_addr_space_size
+}
+
+/// Helper function for calculating the number of pages the given parameter spans.
+const fn size_to_num_pages(size: usize) -> usize {
+    assert!(size > 0);
+    assert!(size % KernelGranule::SIZE == 0);
+
+    size >> KernelGranule::SHIFT
+}
+
+/// The code pages of the kernel binary.
+fn virt_code_region() -> MemoryRegion<Virtual> {
+    let num_pages = size_to_num_pages(super::code_size());
+
+    let start_page_addr = super::virt_code_start();
+    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
+
+    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
+}
+
+/// The data pages of the kernel binary.
+fn virt_data_region() -> MemoryRegion<Virtual> {
+    let num_pages = size_to_num_pages(super::data_size());
+
+    let start_page_addr = super::virt_data_start();
+    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
+
+    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
+}
+
+/// The boot core stack pages.
+fn virt_boot_core_stack_region() -> MemoryRegion<Virtual> {
+    let num_pages = size_to_num_pages(super::boot_core_stack_size());
+
+    let start_page_addr = super::virt_boot_core_stack_start();
+    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
+
+    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
+}
+
+// There is no reason to expect the following conversions to fail, since they were generated offline
+// by the `translation table tool`. If it doesn't work, a panic due to the unwraps is justified.
+fn kernel_virt_to_phys_region(virt_region: MemoryRegion<Virtual>) -> MemoryRegion<Physical> {
+    let phys_start_page_addr =
+        generic_mmu::try_kernel_virt_page_addr_to_phys_page_addr(virt_region.start_page_addr())
+            .unwrap();
+
+    let phys_end_exclusive_page_addr = phys_start_page_addr
+        .checked_offset(virt_region.num_pages() as isize)
+        .unwrap();
+
+    MemoryRegion::new(phys_start_page_addr, phys_end_exclusive_page_addr)
+}
+
+fn kernel_page_attributes(virt_page_addr: PageAddress<Virtual>) -> AttributeFields {
+    generic_mmu::try_kernel_page_attributes(virt_page_addr).unwrap()
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the kernel's translation tables.
+pub fn kernel_translation_tables() -> &'static InitStateLock<KernelTranslationTable> {
+    &KERNEL_TABLES
+}
+
+/// The MMIO remap pages.
+pub fn virt_mmio_remap_region() -> MemoryRegion<Virtual> {
+    let num_pages = size_to_num_pages(super::mmio_remap_size());
+
+    let start_page_addr = super::virt_mmio_remap_start();
+    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
+
+    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
+}
+
+/// Add mapping records for the kernel binary.
+///
+/// The actual translation table entries for the kernel binary are generated using the offline
+/// `translation table tool` and patched into the kernel binary. This function just adds the mapping
+/// record entries.
+pub fn kernel_add_mapping_records_for_precomputed() {
+    let virt_code_region = virt_code_region();
+    generic_mmu::kernel_add_mapping_record(
+        "Kernel code and RO data",
+        &virt_code_region,
+        &kernel_virt_to_phys_region(virt_code_region),
+        &kernel_page_attributes(virt_code_region.start_page_addr()),
+    );
+
+    let virt_data_region = virt_data_region();
+    generic_mmu::kernel_add_mapping_record(
+        "Kernel data and bss",
+        &virt_data_region,
+        &kernel_virt_to_phys_region(virt_data_region),
+        &kernel_page_attributes(virt_data_region.start_page_addr()),
+    );
+
+    let virt_boot_core_stack_region = virt_boot_core_stack_region();
+    generic_mmu::kernel_add_mapping_record(
+        "Kernel boot-core stack",
+        &virt_boot_core_stack_region,
+        &kernel_virt_to_phys_region(virt_boot_core_stack_region),
+        &kernel_page_attributes(virt_boot_core_stack_region.start_page_addr()),
+    );
+}
diff --git a/17_kernel_symbols/kernel/src/common.rs b/17_kernel_symbols/kernel/src/common.rs
new file mode 100644
index 000000000..678f4a6c6
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/common.rs
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! General purpose code.
+
+/// Check if a value is aligned to a given size.
+#[inline(always)]
+pub const fn is_aligned(value: usize, alignment: usize) -> bool {
+    assert!(alignment.is_power_of_two());
+
+    (value & (alignment - 1)) == 0
+}
+
+/// Align down.
+#[inline(always)]
+pub const fn align_down(value: usize, alignment: usize) -> usize {
+    assert!(alignment.is_power_of_two());
+
+    value & !(alignment - 1)
+}
+
+/// Align up.
+#[inline(always)]
+pub const fn align_up(value: usize, alignment: usize) -> usize {
+    assert!(alignment.is_power_of_two());
+
+    (value + alignment - 1) & !(alignment - 1)
+}
diff --git a/17_kernel_symbols/kernel/src/console.rs b/17_kernel_symbols/kernel/src/console.rs
new file mode 100644
index 000000000..e49e241fe
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/console.rs
@@ -0,0 +1,53 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! System console.
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Console interfaces.
+pub mod interface {
+    use core::fmt;
+
+    /// Console write functions.
+    pub trait Write {
+        /// Write a single character.
+        fn write_char(&self, c: char);
+
+        /// Write a Rust format string.
+        fn write_fmt(&self, args: fmt::Arguments) -> fmt::Result;
+
+        /// Block until the last buffered character has been physically put on the TX wire.
+        fn flush(&self);
+    }
+
+    /// Console read functions.
+    pub trait Read {
+        /// Read a single character.
+        fn read_char(&self) -> char {
+            ' '
+        }
+
+        /// Clear RX buffers, if any.
+        fn clear_rx(&self);
+    }
+
+    /// Console statistics.
+    pub trait Statistics {
+        /// Return the number of characters written.
+        fn chars_written(&self) -> usize {
+            0
+        }
+
+        /// Return the number of characters read.
+        fn chars_read(&self) -> usize {
+            0
+        }
+    }
+
+    /// Trait alias for a full-fledged console.
+    pub trait All = Write + Read + Statistics;
+}
diff --git a/17_kernel_symbols/kernel/src/cpu.rs b/17_kernel_symbols/kernel/src/cpu.rs
new file mode 100644
index 000000000..e1493d1dd
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/cpu.rs
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Processor code.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "_arch/aarch64/cpu.rs"]
+mod arch_cpu;
+
+mod boot;
+
+pub mod smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_cpu::{nop, wait_forever};
+
+#[cfg(feature = "test_build")]
+pub use arch_cpu::{qemu_exit_failure, qemu_exit_success};
diff --git a/17_kernel_symbols/kernel/src/cpu/boot.rs b/17_kernel_symbols/kernel/src/cpu/boot.rs
new file mode 100644
index 000000000..8091dac36
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/cpu/boot.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Boot code.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/cpu/boot.rs"]
+mod arch_boot;
diff --git a/17_kernel_symbols/kernel/src/cpu/smp.rs b/17_kernel_symbols/kernel/src/cpu/smp.rs
new file mode 100644
index 000000000..57386f79b
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/cpu/smp.rs
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Symmetric multiprocessing.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/cpu/smp.rs"]
+mod arch_smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_smp::core_id;
diff --git a/17_kernel_symbols/kernel/src/driver.rs b/17_kernel_symbols/kernel/src/driver.rs
new file mode 100644
index 000000000..7b800dbc3
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/driver.rs
@@ -0,0 +1,62 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Driver support.
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Driver interfaces.
+pub mod interface {
+    /// Device Driver functions.
+    pub trait DeviceDriver {
+        /// Return a compatibility string for identifying the driver.
+        fn compatible(&self) -> &'static str;
+
+        /// Called by the kernel to bring up the device.
+        ///
+        /// # Safety
+        ///
+        /// - During init, drivers might do stuff with system-wide impact.
+        unsafe fn init(&self) -> Result<(), &'static str> {
+            Ok(())
+        }
+
+        /// Called by the kernel to register and enable the device's IRQ handlers, if any.
+        ///
+        /// Rust's type system will prevent a call to this function unless the calling instance
+        /// itself has static lifetime.
+        fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
+            Ok(())
+        }
+
+        /// After MMIO remapping, returns the new virtual start address.
+        ///
+        /// This API assumes a driver has only a single, contiguous MMIO aperture, which will not be
+        /// the case for more complex devices. This API will likely change in future tutorials.
+        fn virt_mmio_start_addr(&self) -> Option<usize> {
+            None
+        }
+    }
+
+    /// Device driver management functions.
+    ///
+    /// The `BSP` is supposed to supply one global instance.
+    pub trait DriverManager {
+        /// Return a slice of references to all `BSP`-instantiated drivers.
+        fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
+
+        /// Return only those drivers needed for the BSP's early printing functionality.
+        ///
+        /// For example, the default UART.
+        fn early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
+
+        /// Return all drivers minus early-print drivers.
+        fn non_early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
+
+        /// Initialization code that runs after the early print driver init.
+        fn post_early_print_device_driver_init(&self);
+    }
+}
diff --git a/17_kernel_symbols/kernel/src/exception.rs b/17_kernel_symbols/kernel/src/exception.rs
new file mode 100644
index 000000000..f4af81444
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/exception.rs
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Synchronous and asynchronous exception handling.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "_arch/aarch64/exception.rs"]
+mod arch_exception;
+
+pub mod asynchronous;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_exception::{current_privilege_level, handling_init};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Kernel privilege levels.
+#[allow(missing_docs)]
+#[derive(PartialEq)]
+pub enum PrivilegeLevel {
+    User,
+    Kernel,
+    Hypervisor,
+    Unknown,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// Libkernel unit tests must execute in kernel mode.
+    #[kernel_test]
+    fn test_runner_executes_in_kernel_mode() {
+        let (level, _) = current_privilege_level();
+
+        assert!(level == PrivilegeLevel::Kernel)
+    }
+}
diff --git a/17_kernel_symbols/kernel/src/exception/asynchronous.rs b/17_kernel_symbols/kernel/src/exception/asynchronous.rs
new file mode 100644
index 000000000..fb1785c23
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/exception/asynchronous.rs
@@ -0,0 +1,152 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Asynchronous exception handling.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/exception/asynchronous.rs"]
+mod arch_asynchronous;
+
+use core::{fmt, marker::PhantomData};
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_asynchronous::{
+    is_local_irq_masked, local_irq_mask, local_irq_mask_save, local_irq_restore, local_irq_unmask,
+    print_state,
+};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Interrupt descriptor.
+#[derive(Copy, Clone)]
+pub struct IRQDescriptor {
+    /// Descriptive name.
+    pub name: &'static str,
+
+    /// Reference to handler trait object.
+    pub handler: &'static (dyn interface::IRQHandler + Sync),
+}
+
+/// IRQContext token.
+///
+/// An instance of this type indicates that the local core is currently executing in IRQ
+/// context, aka executing an interrupt vector or subcalls of it.
+///
+/// Concept and implementation derived from the `CriticalSection` introduced in
+/// <https://github.com/rust-embedded/bare-metal>
+#[derive(Clone, Copy)]
+pub struct IRQContext<'irq_context> {
+    _0: PhantomData<&'irq_context ()>,
+}
+
+/// Asynchronous exception handling interfaces.
+pub mod interface {
+
+    /// Implemented by types that handle IRQs.
+    pub trait IRQHandler {
+        /// Called when the corresponding interrupt is asserted.
+        fn handle(&self) -> Result<(), &'static str>;
+    }
+
+    /// IRQ management functions.
+    ///
+    /// The `BSP` is supposed to supply one global instance. Typically implemented by the
+    /// platform's interrupt controller.
+    pub trait IRQManager {
+        /// The IRQ number type depends on the implementation.
+        type IRQNumberType;
+
+        /// Register a handler.
+        fn register_handler(
+            &self,
+            irq_number: Self::IRQNumberType,
+            descriptor: super::IRQDescriptor,
+        ) -> Result<(), &'static str>;
+
+        /// Enable an interrupt in the controller.
+        fn enable(&self, irq_number: Self::IRQNumberType);
+
+        /// Handle pending interrupts.
+        ///
+        /// This function is called directly from the CPU's IRQ exception vector. On AArch64,
+        /// this means that the respective CPU core has disabled exception handling.
+        /// This function can therefore not be preempted and runs start to finish.
+        ///
+        /// Takes an IRQContext token to ensure it can only be called from IRQ context.
+        #[allow(clippy::trivially_copy_pass_by_ref)]
+        fn handle_pending_irqs<'irq_context>(
+            &'irq_context self,
+            ic: &super::IRQContext<'irq_context>,
+        );
+
+        /// Print list of registered handlers.
+        fn print_handler(&self);
+    }
+}
+
+/// A wrapper type for IRQ numbers with integrated range sanity check.
+#[derive(Copy, Clone)]
+pub struct IRQNumber<const MAX_INCLUSIVE: usize>(usize);
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl<'irq_context> IRQContext<'irq_context> {
+    /// Creates an IRQContext token.
+    ///
+    /// # Safety
+    ///
+    /// - This must only be called when the current core is in an interrupt context and will not
+    ///   live beyond the end of it. That is, creation is allowed in interrupt vector functions. For
+    ///   example, in the ARMv8-A case, in `extern "C" fn current_elx_irq()`.
+    /// - Note that the lifetime `'irq_context` of the returned instance is unconstrained. User code
+    ///   must not be able to influence the lifetime picked for this type, since that might cause it
+    ///   to be inferred to `'static`.
+    #[inline(always)]
+    pub unsafe fn new() -> Self {
+        IRQContext { _0: PhantomData }
+    }
+}
+
+impl<const MAX_INCLUSIVE: usize> IRQNumber<{ MAX_INCLUSIVE }> {
+    /// Creates a new instance if number <= MAX_INCLUSIVE.
+    pub const fn new(number: usize) -> Self {
+        assert!(number <= MAX_INCLUSIVE);
+
+        Self(number)
+    }
+
+    /// Return the wrapped number.
+    pub const fn get(self) -> usize {
+        self.0
+    }
+}
+
+impl<const MAX_INCLUSIVE: usize> fmt::Display for IRQNumber<{ MAX_INCLUSIVE }> {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        write!(f, "{}", self.0)
+    }
+}
+
+/// Executes the provided closure while IRQs are masked on the executing core.
+///
+/// While the function temporarily changes the HW state of the executing core, it restores it to the
+/// previous state before returning, so this is deemed safe.
+#[inline(always)]
+pub fn exec_with_irq_masked<T>(f: impl FnOnce() -> T) -> T {
+    let ret: T;
+
+    unsafe {
+        let saved = local_irq_mask_save();
+        ret = f();
+        local_irq_restore(saved);
+    }
+
+    ret
+}
diff --git a/17_kernel_symbols/kernel/src/lib.rs b/17_kernel_symbols/kernel/src/lib.rs
new file mode 100644
index 000000000..0178b2729
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/lib.rs
@@ -0,0 +1,185 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+// Rust embedded logo for `make doc`.
+#![doc(html_logo_url = "https://git.io/JeGIp")]
+
+//! The `kernel` library.
+//!
+//! Used to compose the final kernel binary.
+//!
+//! # Code organization and architecture
+//!
+//! The code is divided into different *modules*, each representing a typical **subsystem** of the
+//! `kernel`. Top-level module files of subsystems reside directly in the `src` folder. For example,
+//! `src/memory.rs` contains code that is concerned with all things memory management.
+//!
+//! ## Visibility of processor architecture code
+//!
+//! Some of the `kernel`'s subsystems depend on low-level code that is specific to the target
+//! processor architecture. For each supported processor architecture, there exists a subfolder in
+//! `src/_arch`, for example, `src/_arch/aarch64`.
+//!
+//! The architecture folders mirror the subsystem modules laid out in `src`. For example,
+//! architectural code that belongs to the `kernel`'s MMU subsystem (`src/memory/mmu.rs`) would go
+//! into `src/_arch/aarch64/memory/mmu.rs`. The latter file is loaded as a module in
+//! `src/memory/mmu.rs` using the `path attribute`. Usually, the chosen module name is the generic
+//! module's name prefixed with `arch_`.
+//!
+//! For example, this is the top of `src/memory/mmu.rs`:
+//!
+//! ```
+//! #[cfg(target_arch = "aarch64")]
+//! #[path = "../_arch/aarch64/memory/mmu.rs"]
+//! mod arch_mmu;
+//! ```
+//!
+//! Often times, items from the `arch_ module` will be publicly reexported by the parent module.
+//! This way, each architecture specific module can provide its implementation of an item, while the
+//! caller must not be concerned which architecture has been conditionally compiled.
+//!
+//! ## BSP code
+//!
+//! `BSP` stands for Board Support Package. `BSP` code is organized under `src/bsp.rs` and contains
+//! target board specific definitions and functions. These are things such as the board's memory map
+//! or instances of drivers for devices that are featured on the respective board.
+//!
+//! Just like processor architecture code, the `BSP` code's module structure tries to mirror the
+//! `kernel`'s subsystem modules, but there is no reexporting this time. That means whatever is
+//! provided must be called starting from the `bsp` namespace, e.g. `bsp::driver::driver_manager()`.
+//!
+//! ## Kernel interfaces
+//!
+//! Both `arch` and `bsp` contain code that is conditionally compiled depending on the actual target
+//! and board for which the kernel is compiled. For example, the `interrupt controller` hardware of
+//! the `Raspberry Pi 3` and the `Raspberry Pi 4` is different, but we want the rest of the `kernel`
+//! code to play nicely with any of the two without much hassle.
+//!
+//! In order to provide a clean abstraction between `arch`, `bsp` and `generic kernel code`,
+//! `interface` traits are provided *whenever possible* and *where it makes sense*. They are defined
+//! in the respective subsystem module and help to enforce the idiom of *program to an interface,
+//! not an implementation*. For example, there will be a common IRQ handling interface which the two
+//! different interrupt controller `drivers` of both Raspberrys will implement, and only export the
+//! interface to the rest of the `kernel`.
+//!
+//! ```
+//!         +-------------------+
+//!         | Interface (Trait) |
+//!         |                   |
+//!         +--+-------------+--+
+//!            ^             ^
+//!            |             |
+//!            |             |
+//! +----------+--+       +--+----------+
+//! | kernel code |       |  bsp code   |
+//! |             |       |  arch code  |
+//! +-------------+       +-------------+
+//! ```
+//!
+//! # Summary
+//!
+//! For a logical `kernel` subsystem, corresponding code can be distributed over several physical
+//! locations. Here is an example for the **memory** subsystem:
+//!
+//! - `src/memory.rs` and `src/memory/**/*`
+//!   - Common code that is agnostic of target processor architecture and `BSP` characteristics.
+//!     - Example: A function to zero a chunk of memory.
+//!   - Interfaces for the memory subsystem that are implemented by `arch` or `BSP` code.
+//!     - Example: An `MMU` interface that defines `MMU` function prototypes.
+//! - `src/bsp/__board_name__/memory.rs` and `src/bsp/__board_name__/memory/**/*`
+//!   - `BSP` specific code.
+//!   - Example: The board's memory map (physical addresses of DRAM and MMIO devices).
+//! - `src/_arch/__arch_name__/memory.rs` and `src/_arch/__arch_name__/memory/**/*`
+//!   - Processor architecture specific code.
+//!   - Example: Implementation of the `MMU` interface for the `__arch_name__` processor
+//!     architecture.
+//!
+//! From a namespace perspective, **memory** subsystem code lives in:
+//!
+//! - `crate::memory::*`
+//! - `crate::bsp::memory::*`
+//!
+//! # Boot flow
+//!
+//! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
+//! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
+
+#![allow(clippy::upper_case_acronyms)]
+#![allow(incomplete_features)]
+#![feature(asm_const)]
+#![feature(core_intrinsics)]
+#![feature(format_args_nl)]
+#![feature(generic_const_exprs)]
+#![feature(linkage)]
+#![feature(panic_info_message)]
+#![feature(step_trait)]
+#![feature(trait_alias)]
+#![no_std]
+// Testing
+#![cfg_attr(test, no_main)]
+#![feature(custom_test_frameworks)]
+#![reexport_test_harness_main = "test_main"]
+#![test_runner(crate::test_runner)]
+
+mod panic_wait;
+mod synchronization;
+
+pub mod bsp;
+pub mod common;
+pub mod console;
+pub mod cpu;
+pub mod driver;
+pub mod exception;
+pub mod memory;
+pub mod print;
+pub mod state;
+pub mod symbols;
+pub mod time;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Version string.
+pub fn version() -> &'static str {
+    concat!(
+        env!("CARGO_PKG_NAME"),
+        " version ",
+        env!("CARGO_PKG_VERSION")
+    )
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+/// The default runner for unit tests.
+pub fn test_runner(tests: &[&test_types::UnitTest]) {
+    // This line will be printed as the test header.
+    println!("Running {} tests", tests.len());
+
+    for (i, test) in tests.iter().enumerate() {
+        print!("{:>3}. {:.<58}", i + 1, test.name);
+
+        // Run the actual test.
+        (test.test_func)();
+
+        // Failed tests call panic!(). Execution reaches here only if the test has passed.
+        println!("[ok]")
+    }
+}
+
+/// The `kernel_init()` for unit tests.
+#[cfg(test)]
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    exception::handling_init();
+    memory::mmu::post_enable_init();
+    bsp::console::qemu_bring_up_console();
+
+    test_main();
+
+    cpu::qemu_exit_success()
+}
diff --git a/17_kernel_symbols/kernel/src/main.rs b/17_kernel_symbols/kernel/src/main.rs
new file mode 100644
index 000000000..8bc808853
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/main.rs
@@ -0,0 +1,109 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+// Rust embedded logo for `make doc`.
+#![doc(html_logo_url = "https://git.io/JeGIp")]
+
+//! The `kernel` binary.
+
+#![feature(format_args_nl)]
+#![no_main]
+#![no_std]
+
+use libkernel::{bsp, cpu, driver, exception, info, memory, state, time, warn};
+
+/// Early init code.
+///
+/// When this code runs, virtual memory is already enabled.
+///
+/// # Safety
+///
+/// - Only a single core must be active and running this function.
+/// - Printing will not work until the respective driver's MMIO is remapped.
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
+    exception::handling_init();
+    memory::mmu::post_enable_init();
+
+    // Add the mapping records for the precomputed entries first, so that they appear on the top of
+    // the list.
+    bsp::memory::mmu::kernel_add_mapping_records_for_precomputed();
+
+    // Bring up the drivers needed for printing first.
+    for i in bsp::driver::driver_manager()
+        .early_print_device_drivers()
+        .iter()
+    {
+        // Any encountered errors cannot be printed yet, obviously, so just safely park the CPU.
+        i.init().unwrap_or_else(|_| cpu::wait_forever());
+    }
+    bsp::driver::driver_manager().post_early_print_device_driver_init();
+    // Printing available from here on.
+
+    // Now bring up the remaining drivers.
+    for i in bsp::driver::driver_manager()
+        .non_early_print_device_drivers()
+        .iter()
+    {
+        if let Err(x) = i.init() {
+            panic!("Error loading driver: {}: {}", i.compatible(), x);
+        }
+    }
+
+    // Let device drivers register and enable their handlers with the interrupt controller.
+    for i in bsp::driver::driver_manager().all_device_drivers() {
+        if let Err(msg) = i.register_and_enable_irq_handler() {
+            warn!("Error registering IRQ handler: {}", msg);
+        }
+    }
+
+    // Unmask interrupts on the boot CPU core.
+    exception::asynchronous::local_irq_unmask();
+
+    // Announce conclusion of the kernel_init() phase.
+    state::state_manager().transition_to_single_core_main();
+
+    // Transition from unsafe to safe.
+    kernel_main()
+}
+
+/// The main function running after the early init.
+fn kernel_main() -> ! {
+    use driver::interface::DriverManager;
+    use exception::asynchronous::interface::IRQManager;
+
+    info!("{}", libkernel::version());
+    info!("Booting on: {}", bsp::board_name());
+
+    info!("MMU online:");
+    memory::mmu::kernel_print_mappings();
+
+    let (_, privilege_level) = exception::current_privilege_level();
+    info!("Current privilege level: {}", privilege_level);
+
+    info!("Exception handling state:");
+    exception::asynchronous::print_state();
+
+    info!(
+        "Architectural timer resolution: {} ns",
+        time::time_manager().resolution().as_nanos()
+    );
+
+    info!("Drivers loaded:");
+    for (i, driver) in bsp::driver::driver_manager()
+        .all_device_drivers()
+        .iter()
+        .enumerate()
+    {
+        info!("      {}. {}", i + 1, driver.compatible());
+    }
+
+    info!("Registered IRQ handlers:");
+    bsp::exception::asynchronous::irq_manager().print_handler();
+
+    info!("Echoing input now");
+    cpu::wait_forever();
+}
diff --git a/17_kernel_symbols/kernel/src/memory.rs b/17_kernel_symbols/kernel/src/memory.rs
new file mode 100644
index 000000000..f20719bb7
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/memory.rs
@@ -0,0 +1,167 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Memory Management.
+
+pub mod mmu;
+
+use crate::{bsp, common};
+use core::{
+    fmt,
+    marker::PhantomData,
+    ops::{Add, Sub},
+};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Metadata trait for marking the type of an address.
+pub trait AddressType: Copy + Clone + PartialOrd + PartialEq {}
+
+/// Zero-sized type to mark a physical address.
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+pub enum Physical {}
+
+/// Zero-sized type to mark a virtual address.
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+pub enum Virtual {}
+
+/// Generic address type.
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+pub struct Address<ATYPE: AddressType> {
+    value: usize,
+    _address_type: PhantomData<fn() -> ATYPE>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl AddressType for Physical {}
+impl AddressType for Virtual {}
+
+impl<ATYPE: AddressType> Address<ATYPE> {
+    /// Create an instance.
+    pub const fn new(value: usize) -> Self {
+        Self {
+            value,
+            _address_type: PhantomData,
+        }
+    }
+
+    /// Convert to usize.
+    pub const fn as_usize(self) -> usize {
+        self.value
+    }
+
+    /// Align down to page size.
+    #[must_use]
+    pub const fn align_down_page(self) -> Self {
+        let aligned = common::align_down(self.value, bsp::memory::mmu::KernelGranule::SIZE);
+
+        Self::new(aligned)
+    }
+
+    /// Align up to page size.
+    #[must_use]
+    pub const fn align_up_page(self) -> Self {
+        let aligned = common::align_up(self.value, bsp::memory::mmu::KernelGranule::SIZE);
+
+        Self::new(aligned)
+    }
+
+    /// Checks if the address is page aligned.
+    pub const fn is_page_aligned(&self) -> bool {
+        common::is_aligned(self.value, bsp::memory::mmu::KernelGranule::SIZE)
+    }
+
+    /// Return the address' offset into the corresponding page.
+    pub const fn offset_into_page(&self) -> usize {
+        self.value & bsp::memory::mmu::KernelGranule::MASK
+    }
+}
+
+impl<ATYPE: AddressType> Add<usize> for Address<ATYPE> {
+    type Output = Self;
+
+    #[inline(always)]
+    fn add(self, rhs: usize) -> Self::Output {
+        match self.value.checked_add(rhs) {
+            None => panic!("Overflow on Address::add"),
+            Some(x) => Self::new(x),
+        }
+    }
+}
+
+impl<ATYPE: AddressType> Sub<Address<ATYPE>> for Address<ATYPE> {
+    type Output = Self;
+
+    #[inline(always)]
+    fn sub(self, rhs: Address<ATYPE>) -> Self::Output {
+        match self.value.checked_sub(rhs.value) {
+            None => panic!("Overflow on Address::sub"),
+            Some(x) => Self::new(x),
+        }
+    }
+}
+
+impl fmt::Display for Address<Physical> {
+    // Don't expect to see physical addresses greater than 40 bit.
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        let q3: u8 = ((self.value >> 32) & 0xff) as u8;
+        let q2: u16 = ((self.value >> 16) & 0xffff) as u16;
+        let q1: u16 = (self.value & 0xffff) as u16;
+
+        write!(f, "0x")?;
+        write!(f, "{:02x}_", q3)?;
+        write!(f, "{:04x}_", q2)?;
+        write!(f, "{:04x}", q1)
+    }
+}
+
+impl fmt::Display for Address<Virtual> {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        let q4: u16 = ((self.value >> 48) & 0xffff) as u16;
+        let q3: u16 = ((self.value >> 32) & 0xffff) as u16;
+        let q2: u16 = ((self.value >> 16) & 0xffff) as u16;
+        let q1: u16 = (self.value & 0xffff) as u16;
+
+        write!(f, "0x")?;
+        write!(f, "{:04x}_", q4)?;
+        write!(f, "{:04x}_", q3)?;
+        write!(f, "{:04x}_", q2)?;
+        write!(f, "{:04x}", q1)
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// Sanity of [Address] methods.
+    #[kernel_test]
+    fn address_type_method_sanity() {
+        let addr = Address::<Virtual>::new(bsp::memory::mmu::KernelGranule::SIZE + 100);
+
+        assert_eq!(
+            addr.align_down_page().as_usize(),
+            bsp::memory::mmu::KernelGranule::SIZE
+        );
+
+        assert_eq!(
+            addr.align_up_page().as_usize(),
+            bsp::memory::mmu::KernelGranule::SIZE * 2
+        );
+
+        assert!(!addr.is_page_aligned());
+
+        assert_eq!(addr.offset_into_page(), 100);
+    }
+}
diff --git a/17_kernel_symbols/kernel/src/memory/mmu.rs b/17_kernel_symbols/kernel/src/memory/mmu.rs
new file mode 100644
index 000000000..dfc299932
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/memory/mmu.rs
@@ -0,0 +1,270 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Memory Management Unit.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/memory/mmu.rs"]
+mod arch_mmu;
+
+mod alloc;
+mod mapping_record;
+mod translation_table;
+mod types;
+
+use crate::{
+    bsp,
+    memory::{Address, Physical, Virtual},
+    synchronization::{self, interface::Mutex},
+    warn,
+};
+use core::{fmt, num::NonZeroUsize};
+
+pub use types::*;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// MMU enable errors variants.
+#[allow(missing_docs)]
+#[derive(Debug)]
+pub enum MMUEnableError {
+    AlreadyEnabled,
+    Other(&'static str),
+}
+
+/// Memory Management interfaces.
+pub mod interface {
+    use super::*;
+
+    /// MMU functions.
+    pub trait MMU {
+        /// Turns on the MMU for the first time and enables data and instruction caching.
+        ///
+        /// # Safety
+        ///
+        /// - Changes the HW's global state.
+        unsafe fn enable_mmu_and_caching(
+            &self,
+            phys_tables_base_addr: Address<Physical>,
+        ) -> Result<(), MMUEnableError>;
+
+        /// Returns true if the MMU is enabled, false otherwise.
+        fn is_enabled(&self) -> bool;
+    }
+}
+
+/// Describes the characteristics of a translation granule.
+pub struct TranslationGranule<const GRANULE_SIZE: usize>;
+
+/// Describes properties of an address space.
+pub struct AddressSpace<const AS_SIZE: usize>;
+
+/// Intended to be implemented for [`AddressSpace`].
+pub trait AssociatedTranslationTable {
+    /// A translation table whose address range is:
+    ///
+    /// [u64::MAX, (u64::MAX - AS_SIZE) + 1]
+    type TableStartFromTop;
+
+    /// A translation table whose address range is:
+    ///
+    /// [AS_SIZE - 1, 0]
+    type TableStartFromBottom;
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+use interface::MMU;
+use synchronization::interface::ReadWriteEx;
+use translation_table::interface::TranslationTable;
+
+/// Query the BSP for the reserved virtual addresses for MMIO remapping and initialize the kernel's
+/// MMIO VA allocator with it.
+fn kernel_init_mmio_va_allocator() {
+    let region = bsp::memory::mmu::virt_mmio_remap_region();
+
+    alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.initialize(region));
+}
+
+/// Map a region in the kernel's translation tables.
+///
+/// No input checks done, input is passed through to the architectural implementation.
+///
+/// # Safety
+///
+/// - See `map_at()`.
+/// - Does not prevent aliasing.
+unsafe fn kernel_map_at_unchecked(
+    name: &'static str,
+    virt_region: &MemoryRegion<Virtual>,
+    phys_region: &MemoryRegion<Physical>,
+    attr: &AttributeFields,
+) -> Result<(), &'static str> {
+    bsp::memory::mmu::kernel_translation_tables()
+        .write(|tables| tables.map_at(virt_region, phys_region, attr))?;
+
+    kernel_add_mapping_record(name, virt_region, phys_region, attr);
+
+    Ok(())
+}
+
+/// Try to translate a kernel virtual address to a physical address.
+///
+/// Will only succeed if there exists a valid mapping for the input address.
+fn try_kernel_virt_addr_to_phys_addr(
+    virt_addr: Address<Virtual>,
+) -> Result<Address<Physical>, &'static str> {
+    bsp::memory::mmu::kernel_translation_tables()
+        .read(|tables| tables.try_virt_addr_to_phys_addr(virt_addr))
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl fmt::Display for MMUEnableError {
+    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+        match self {
+            MMUEnableError::AlreadyEnabled => write!(f, "MMU is already enabled"),
+            MMUEnableError::Other(x) => write!(f, "{}", x),
+        }
+    }
+}
+
+impl<const GRANULE_SIZE: usize> TranslationGranule<GRANULE_SIZE> {
+    /// The granule's size.
+    pub const SIZE: usize = Self::size_checked();
+
+    /// The granule's mask.
+    pub const MASK: usize = Self::SIZE - 1;
+
+    /// The granule's shift, aka log2(size).
+    pub const SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
+
+    const fn size_checked() -> usize {
+        assert!(GRANULE_SIZE.is_power_of_two());
+
+        GRANULE_SIZE
+    }
+}
+
+impl<const AS_SIZE: usize> AddressSpace<AS_SIZE> {
+    /// The address space size.
+    pub const SIZE: usize = Self::size_checked();
+
+    /// The address space shift, aka log2(size).
+    pub const SIZE_SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
+
+    const fn size_checked() -> usize {
+        assert!(AS_SIZE.is_power_of_two());
+
+        // Check for architectural restrictions as well.
+        Self::arch_address_space_size_sanity_checks();
+
+        AS_SIZE
+    }
+}
+
+/// Add an entry to the mapping info record.
+pub fn kernel_add_mapping_record(
+    name: &'static str,
+    virt_region: &MemoryRegion<Virtual>,
+    phys_region: &MemoryRegion<Physical>,
+    attr: &AttributeFields,
+) {
+    if let Err(x) = mapping_record::kernel_add(name, virt_region, phys_region, attr) {
+        warn!("{}", x);
+    }
+}
+
+/// MMIO remapping in the kernel translation tables.
+///
+/// Typically used by device drivers.
+///
+/// # Safety
+///
+/// - Same as `kernel_map_at_unchecked()`, minus the aliasing part.
+pub unsafe fn kernel_map_mmio(
+    name: &'static str,
+    mmio_descriptor: &MMIODescriptor,
+) -> Result<Address<Virtual>, &'static str> {
+    let phys_region = MemoryRegion::from(*mmio_descriptor);
+    let offset_into_start_page = mmio_descriptor.start_addr().offset_into_page();
+
+    // Check if an identical region has been mapped for another driver. If so, reuse it.
+    let virt_addr = if let Some(addr) =
+        mapping_record::kernel_find_and_insert_mmio_duplicate(mmio_descriptor, name)
+    {
+        addr
+    // Otherwise, allocate a new region and map it.
+    } else {
+        let num_pages = match NonZeroUsize::new(phys_region.num_pages()) {
+            None => return Err("Requested 0 pages"),
+            Some(x) => x,
+        };
+
+        let virt_region =
+            alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.alloc(num_pages))?;
+
+        kernel_map_at_unchecked(
+            name,
+            &virt_region,
+            &phys_region,
+            &AttributeFields {
+                mem_attributes: MemAttributes::Device,
+                acc_perms: AccessPermissions::ReadWrite,
+                execute_never: true,
+            },
+        )?;
+
+        virt_region.start_addr()
+    };
+
+    Ok(virt_addr + offset_into_start_page)
+}
+
+/// Try to translate a kernel virtual page address to a physical page address.
+///
+/// Will only succeed if there exists a valid mapping for the input page.
+pub fn try_kernel_virt_page_addr_to_phys_page_addr(
+    virt_page_addr: PageAddress<Virtual>,
+) -> Result<PageAddress<Physical>, &'static str> {
+    bsp::memory::mmu::kernel_translation_tables()
+        .read(|tables| tables.try_virt_page_addr_to_phys_page_addr(virt_page_addr))
+}
+
+/// Try to get the attributes of a kernel page.
+///
+/// Will only succeed if there exists a valid mapping for the input page.
+pub fn try_kernel_page_attributes(
+    virt_page_addr: PageAddress<Virtual>,
+) -> Result<AttributeFields, &'static str> {
+    bsp::memory::mmu::kernel_translation_tables()
+        .read(|tables| tables.try_page_attributes(virt_page_addr))
+}
+
+/// Enable the MMU and data + instruction caching.
+///
+/// # Safety
+///
+/// - Crucial function during kernel init. Changes the the complete memory view of the processor.
+#[inline(always)]
+pub unsafe fn enable_mmu_and_caching(
+    phys_tables_base_addr: Address<Physical>,
+) -> Result<(), MMUEnableError> {
+    arch_mmu::mmu().enable_mmu_and_caching(phys_tables_base_addr)
+}
+
+/// Finish initialization of the MMU subsystem.
+pub fn post_enable_init() {
+    kernel_init_mmio_va_allocator();
+}
+
+/// Human-readable print of all recorded kernel mappings.
+pub fn kernel_print_mappings() {
+    mapping_record::kernel_print()
+}
diff --git a/17_kernel_symbols/kernel/src/memory/mmu/alloc.rs b/17_kernel_symbols/kernel/src/memory/mmu/alloc.rs
new file mode 100644
index 000000000..aadb72ef2
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/memory/mmu/alloc.rs
@@ -0,0 +1,70 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Allocation.
+
+use super::MemoryRegion;
+use crate::{
+    memory::{AddressType, Virtual},
+    synchronization::IRQSafeNullLock,
+    warn,
+};
+use core::num::NonZeroUsize;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// A page allocator that can be lazyily initialized.
+pub struct PageAllocator<ATYPE: AddressType> {
+    pool: Option<MemoryRegion<ATYPE>>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static KERNEL_MMIO_VA_ALLOCATOR: IRQSafeNullLock<PageAllocator<Virtual>> =
+    IRQSafeNullLock::new(PageAllocator::new());
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the kernel's MMIO virtual address allocator.
+pub fn kernel_mmio_va_allocator() -> &'static IRQSafeNullLock<PageAllocator<Virtual>> {
+    &KERNEL_MMIO_VA_ALLOCATOR
+}
+
+impl<ATYPE: AddressType> PageAllocator<ATYPE> {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self { pool: None }
+    }
+
+    /// Initialize the allocator.
+    pub fn initialize(&mut self, pool: MemoryRegion<ATYPE>) {
+        if self.pool.is_some() {
+            warn!("Already initialized");
+            return;
+        }
+
+        self.pool = Some(pool);
+    }
+
+    /// Allocate a number of pages.
+    pub fn alloc(
+        &mut self,
+        num_requested_pages: NonZeroUsize,
+    ) -> Result<MemoryRegion<ATYPE>, &'static str> {
+        if self.pool.is_none() {
+            return Err("Allocator not initialized");
+        }
+
+        self.pool
+            .as_mut()
+            .unwrap()
+            .take_first_n_pages(num_requested_pages)
+    }
+}
diff --git a/17_kernel_symbols/kernel/src/memory/mmu/mapping_record.rs b/17_kernel_symbols/kernel/src/memory/mmu/mapping_record.rs
new file mode 100644
index 000000000..d171c6e67
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/memory/mmu/mapping_record.rs
@@ -0,0 +1,233 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! A record of mapped pages.
+
+use super::{
+    AccessPermissions, Address, AttributeFields, MMIODescriptor, MemAttributes, MemoryRegion,
+    Physical, Virtual,
+};
+use crate::{bsp, info, synchronization, synchronization::InitStateLock, warn};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Type describing a virtual memory mapping.
+#[allow(missing_docs)]
+#[derive(Copy, Clone)]
+struct MappingRecordEntry {
+    pub users: [Option<&'static str>; 5],
+    pub phys_start_addr: Address<Physical>,
+    pub virt_start_addr: Address<Virtual>,
+    pub num_pages: usize,
+    pub attribute_fields: AttributeFields,
+}
+
+struct MappingRecord {
+    inner: [Option<MappingRecordEntry>; 12],
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static KERNEL_MAPPING_RECORD: InitStateLock<MappingRecord> =
+    InitStateLock::new(MappingRecord::new());
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl MappingRecordEntry {
+    pub fn new(
+        name: &'static str,
+        virt_region: &MemoryRegion<Virtual>,
+        phys_region: &MemoryRegion<Physical>,
+        attr: &AttributeFields,
+    ) -> Self {
+        Self {
+            users: [Some(name), None, None, None, None],
+            phys_start_addr: phys_region.start_addr(),
+            virt_start_addr: virt_region.start_addr(),
+            num_pages: phys_region.num_pages(),
+            attribute_fields: *attr,
+        }
+    }
+
+    fn find_next_free_user(&mut self) -> Result<&mut Option<&'static str>, &'static str> {
+        if let Some(x) = self.users.iter_mut().find(|x| x.is_none()) {
+            return Ok(x);
+        };
+
+        Err("Storage for user info exhausted")
+    }
+
+    pub fn add_user(&mut self, user: &'static str) -> Result<(), &'static str> {
+        let x = self.find_next_free_user()?;
+        *x = Some(user);
+        Ok(())
+    }
+}
+
+impl MappingRecord {
+    pub const fn new() -> Self {
+        Self { inner: [None; 12] }
+    }
+
+    fn find_next_free(&mut self) -> Result<&mut Option<MappingRecordEntry>, &'static str> {
+        if let Some(x) = self.inner.iter_mut().find(|x| x.is_none()) {
+            return Ok(x);
+        }
+
+        Err("Storage for mapping info exhausted")
+    }
+
+    fn find_duplicate(
+        &mut self,
+        phys_region: &MemoryRegion<Physical>,
+    ) -> Option<&mut MappingRecordEntry> {
+        self.inner
+            .iter_mut()
+            .filter(|x| x.is_some())
+            .map(|x| x.as_mut().unwrap())
+            .filter(|x| x.attribute_fields.mem_attributes == MemAttributes::Device)
+            .find(|x| {
+                if x.phys_start_addr != phys_region.start_addr() {
+                    return false;
+                }
+
+                if x.num_pages != phys_region.num_pages() {
+                    return false;
+                }
+
+                true
+            })
+    }
+
+    pub fn add(
+        &mut self,
+        name: &'static str,
+        virt_region: &MemoryRegion<Virtual>,
+        phys_region: &MemoryRegion<Physical>,
+        attr: &AttributeFields,
+    ) -> Result<(), &'static str> {
+        let x = self.find_next_free()?;
+
+        *x = Some(MappingRecordEntry::new(
+            name,
+            virt_region,
+            phys_region,
+            attr,
+        ));
+        Ok(())
+    }
+
+    pub fn print(&self) {
+        const KIB_RSHIFT: u32 = 10; // log2(1024).
+        const MIB_RSHIFT: u32 = 20; // log2(1024 * 1024).
+
+        info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
+        info!(
+            "      {:^44}     {:^30}   {:^7}   {:^9}   {:^35}",
+            "Virtual", "Physical", "Size", "Attr", "Entity"
+        );
+        info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
+
+        for i in self.inner.iter().flatten() {
+            let size = i.num_pages * bsp::memory::mmu::KernelGranule::SIZE;
+            let virt_start = i.virt_start_addr;
+            let virt_end_inclusive = virt_start + (size - 1);
+            let phys_start = i.phys_start_addr;
+            let phys_end_inclusive = phys_start + (size - 1);
+
+            let (size, unit) = if (size >> MIB_RSHIFT) > 0 {
+                (size >> MIB_RSHIFT, "MiB")
+            } else if (size >> KIB_RSHIFT) > 0 {
+                (size >> KIB_RSHIFT, "KiB")
+            } else {
+                (size, "Byte")
+            };
+
+            let attr = match i.attribute_fields.mem_attributes {
+                MemAttributes::CacheableDRAM => "C",
+                MemAttributes::Device => "Dev",
+            };
+
+            let acc_p = match i.attribute_fields.acc_perms {
+                AccessPermissions::ReadOnly => "RO",
+                AccessPermissions::ReadWrite => "RW",
+            };
+
+            let xn = if i.attribute_fields.execute_never {
+                "XN"
+            } else {
+                "X"
+            };
+
+            info!(
+                "      {}..{} --> {}..{} | \
+                        {: >3} {} | {: <3} {} {: <2} | {}",
+                virt_start,
+                virt_end_inclusive,
+                phys_start,
+                phys_end_inclusive,
+                size,
+                unit,
+                attr,
+                acc_p,
+                xn,
+                i.users[0].unwrap()
+            );
+
+            for k in i.users[1..].iter() {
+                if let Some(additional_user) = *k {
+                    info!(
+                        "                                                                                                            | {}",
+                        additional_user
+                    );
+                }
+            }
+        }
+
+        info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+use synchronization::interface::ReadWriteEx;
+
+/// Add an entry to the mapping info record.
+pub fn kernel_add(
+    name: &'static str,
+    virt_region: &MemoryRegion<Virtual>,
+    phys_region: &MemoryRegion<Physical>,
+    attr: &AttributeFields,
+) -> Result<(), &'static str> {
+    KERNEL_MAPPING_RECORD.write(|mr| mr.add(name, virt_region, phys_region, attr))
+}
+
+pub fn kernel_find_and_insert_mmio_duplicate(
+    mmio_descriptor: &MMIODescriptor,
+    new_user: &'static str,
+) -> Option<Address<Virtual>> {
+    let phys_region: MemoryRegion<Physical> = (*mmio_descriptor).into();
+
+    KERNEL_MAPPING_RECORD.write(|mr| {
+        let dup = mr.find_duplicate(&phys_region)?;
+
+        if let Err(x) = dup.add_user(new_user) {
+            warn!("{}", x);
+        }
+
+        Some(dup.virt_start_addr)
+    })
+}
+
+/// Human-readable print of all recorded kernel mappings.
+pub fn kernel_print() {
+    KERNEL_MAPPING_RECORD.read(|mr| mr.print());
+}
diff --git a/17_kernel_symbols/kernel/src/memory/mmu/translation_table.rs b/17_kernel_symbols/kernel/src/memory/mmu/translation_table.rs
new file mode 100644
index 000000000..9d627f974
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/memory/mmu/translation_table.rs
@@ -0,0 +1,137 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Translation table.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../../_arch/aarch64/memory/mmu/translation_table.rs"]
+mod arch_translation_table;
+
+use super::{AttributeFields, MemoryRegion};
+use crate::memory::{Address, Physical, Virtual};
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+#[cfg(target_arch = "aarch64")]
+pub use arch_translation_table::FixedSizeTranslationTable;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Translation table interfaces.
+pub mod interface {
+    use crate::memory::mmu::PageAddress;
+
+    use super::*;
+
+    /// Translation table operations.
+    pub trait TranslationTable {
+        /// Anything that needs to run before any of the other provided functions can be used.
+        ///
+        /// # Safety
+        ///
+        /// - Implementor must ensure that this function can run only once or is harmless if invoked
+        ///   multiple times.
+        fn init(&mut self) -> Result<(), &'static str>;
+
+        /// Map the given virtual memory region to the given physical memory region.
+        ///
+        /// # Safety
+        ///
+        /// - Using wrong attributes can cause multiple issues of different nature in the system.
+        /// - It is not required that the architectural implementation prevents aliasing. That is,
+        ///   mapping to the same physical memory using multiple virtual addresses, which would
+        ///   break Rust's ownership assumptions. This should be protected against in the kernel's
+        ///   generic MMU code.
+        unsafe fn map_at(
+            &mut self,
+            virt_region: &MemoryRegion<Virtual>,
+            phys_region: &MemoryRegion<Physical>,
+            attr: &AttributeFields,
+        ) -> Result<(), &'static str>;
+
+        /// Try to translate a virtual page address to a physical page address.
+        ///
+        /// Will only succeed if there exists a valid mapping for the input page.
+        fn try_virt_page_addr_to_phys_page_addr(
+            &self,
+            virt_page_addr: PageAddress<Virtual>,
+        ) -> Result<PageAddress<Physical>, &'static str>;
+
+        /// Try to get the attributes of a page.
+        ///
+        /// Will only succeed if there exists a valid mapping for the input page.
+        fn try_page_attributes(
+            &self,
+            virt_page_addr: PageAddress<Virtual>,
+        ) -> Result<AttributeFields, &'static str>;
+
+        /// Try to translate a virtual address to a physical address.
+        ///
+        /// Will only succeed if there exists a valid mapping for the input address.
+        fn try_virt_addr_to_phys_addr(
+            &self,
+            virt_addr: Address<Virtual>,
+        ) -> Result<Address<Physical>, &'static str>;
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use crate::memory::mmu::{AccessPermissions, MemAttributes, PageAddress};
+    use arch_translation_table::MinSizeTranslationTable;
+    use interface::TranslationTable;
+    use test_macros::kernel_test;
+
+    /// Sanity checks for the TranslationTable implementation.
+    #[kernel_test]
+    fn translationtable_implementation_sanity() {
+        // This will occupy a lot of space on the stack.
+        let mut tables = MinSizeTranslationTable::new_for_runtime();
+
+        assert!(tables.init().is_ok());
+
+        let virt_end_exclusive_page_addr: PageAddress<Virtual> = PageAddress::MAX;
+        let virt_start_page_addr: PageAddress<Virtual> =
+            virt_end_exclusive_page_addr.checked_offset(-5).unwrap();
+
+        let phys_start_page_addr: PageAddress<Physical> = PageAddress::from(0);
+        let phys_end_exclusive_page_addr: PageAddress<Physical> =
+            phys_start_page_addr.checked_offset(5).unwrap();
+
+        let virt_region = MemoryRegion::new(virt_start_page_addr, virt_end_exclusive_page_addr);
+        let phys_region = MemoryRegion::new(phys_start_page_addr, phys_end_exclusive_page_addr);
+
+        let attr = AttributeFields {
+            mem_attributes: MemAttributes::CacheableDRAM,
+            acc_perms: AccessPermissions::ReadWrite,
+            execute_never: true,
+        };
+
+        unsafe { assert_eq!(tables.map_at(&virt_region, &phys_region, &attr), Ok(())) };
+
+        assert_eq!(
+            tables.try_virt_page_addr_to_phys_page_addr(virt_start_page_addr),
+            Ok(phys_start_page_addr)
+        );
+
+        assert_eq!(
+            tables.try_page_attributes(virt_start_page_addr.checked_offset(-1).unwrap()),
+            Err("Page marked invalid")
+        );
+
+        assert_eq!(tables.try_page_attributes(virt_start_page_addr), Ok(attr));
+
+        let virt_addr = virt_start_page_addr.into_inner() + 0x100;
+        let phys_addr = phys_start_page_addr.into_inner() + 0x100;
+        assert_eq!(tables.try_virt_addr_to_phys_addr(virt_addr), Ok(phys_addr));
+    }
+}
diff --git a/17_kernel_symbols/kernel/src/memory/mmu/types.rs b/17_kernel_symbols/kernel/src/memory/mmu/types.rs
new file mode 100644
index 000000000..85c852b34
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/memory/mmu/types.rs
@@ -0,0 +1,378 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Memory Management Unit types.
+
+use crate::{
+    bsp, common,
+    memory::{Address, AddressType, Physical},
+};
+use core::{convert::From, iter::Step, num::NonZeroUsize, ops::Range};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// A wrapper type around [Address] that ensures page alignment.
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+pub struct PageAddress<ATYPE: AddressType> {
+    inner: Address<ATYPE>,
+}
+
+/// A type that describes a region of memory in quantities of pages.
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+pub struct MemoryRegion<ATYPE: AddressType> {
+    start: PageAddress<ATYPE>,
+    end_exclusive: PageAddress<ATYPE>,
+}
+
+/// Architecture agnostic memory attributes.
+#[allow(missing_docs)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+pub enum MemAttributes {
+    CacheableDRAM,
+    Device,
+}
+
+/// Architecture agnostic access permissions.
+#[allow(missing_docs)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+pub enum AccessPermissions {
+    ReadOnly,
+    ReadWrite,
+}
+
+/// Collection of memory attributes.
+#[allow(missing_docs)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+pub struct AttributeFields {
+    pub mem_attributes: MemAttributes,
+    pub acc_perms: AccessPermissions,
+    pub execute_never: bool,
+}
+
+/// An MMIO descriptor for use in device drivers.
+#[derive(Copy, Clone)]
+pub struct MMIODescriptor {
+    start_addr: Address<Physical>,
+    end_addr_exclusive: Address<Physical>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+// PageAddress
+//------------------------------------------------------------------------------
+impl<ATYPE: AddressType> PageAddress<ATYPE> {
+    /// The largest value that can be represented by this type.
+    pub const MAX: Self = PageAddress {
+        inner: Address::new(usize::MAX).align_down_page(),
+    };
+
+    /// Unwraps the value.
+    pub fn into_inner(self) -> Address<ATYPE> {
+        self.inner
+    }
+
+    /// Calculates the offset from the page address.
+    ///
+    /// `count` is in units of [PageAddress]. For example, a count of 2 means `result = self + 2 *
+    /// page_size`.
+    pub fn checked_offset(self, count: isize) -> Option<Self> {
+        if count == 0 {
+            return Some(self);
+        }
+
+        let delta = count
+            .unsigned_abs()
+            .checked_mul(bsp::memory::mmu::KernelGranule::SIZE)?;
+        let result = if count.is_positive() {
+            self.inner.as_usize().checked_add(delta)?
+        } else {
+            self.inner.as_usize().checked_sub(delta)?
+        };
+
+        Some(Self {
+            inner: Address::new(result),
+        })
+    }
+}
+
+impl<ATYPE: AddressType> From<usize> for PageAddress<ATYPE> {
+    fn from(addr: usize) -> Self {
+        assert!(
+            common::is_aligned(addr, bsp::memory::mmu::KernelGranule::SIZE),
+            "Input usize not page aligned"
+        );
+
+        Self {
+            inner: Address::new(addr),
+        }
+    }
+}
+
+impl<ATYPE: AddressType> From<Address<ATYPE>> for PageAddress<ATYPE> {
+    fn from(addr: Address<ATYPE>) -> Self {
+        assert!(addr.is_page_aligned(), "Input Address not page aligned");
+
+        Self { inner: addr }
+    }
+}
+
+impl<ATYPE: AddressType> Step for PageAddress<ATYPE> {
+    fn steps_between(start: &Self, end: &Self) -> Option<usize> {
+        if start > end {
+            return None;
+        }
+
+        // Since start <= end, do unchecked arithmetic.
+        Some(
+            (end.inner.as_usize() - start.inner.as_usize())
+                >> bsp::memory::mmu::KernelGranule::SHIFT,
+        )
+    }
+
+    fn forward_checked(start: Self, count: usize) -> Option<Self> {
+        start.checked_offset(count as isize)
+    }
+
+    fn backward_checked(start: Self, count: usize) -> Option<Self> {
+        start.checked_offset(-(count as isize))
+    }
+}
+
+//------------------------------------------------------------------------------
+// MemoryRegion
+//------------------------------------------------------------------------------
+impl<ATYPE: AddressType> MemoryRegion<ATYPE> {
+    /// Create an instance.
+    pub fn new(start: PageAddress<ATYPE>, end_exclusive: PageAddress<ATYPE>) -> Self {
+        assert!(start <= end_exclusive);
+
+        Self {
+            start,
+            end_exclusive,
+        }
+    }
+
+    fn as_range(&self) -> Range<PageAddress<ATYPE>> {
+        self.into_iter()
+    }
+
+    /// Returns the start page address.
+    pub fn start_page_addr(&self) -> PageAddress<ATYPE> {
+        self.start
+    }
+
+    /// Returns the start address.
+    pub fn start_addr(&self) -> Address<ATYPE> {
+        self.start.into_inner()
+    }
+
+    /// Returns the exclusive end page address.
+    pub fn end_exclusive_page_addr(&self) -> PageAddress<ATYPE> {
+        self.end_exclusive
+    }
+
+    /// Returns the exclusive end page address.
+    pub fn end_inclusive_page_addr(&self) -> PageAddress<ATYPE> {
+        self.end_exclusive.checked_offset(-1).unwrap()
+    }
+
+    /// Checks if self contains an address.
+    pub fn contains(&self, addr: Address<ATYPE>) -> bool {
+        let page_addr = PageAddress::from(addr.align_down_page());
+        self.as_range().contains(&page_addr)
+    }
+
+    /// Checks if there is an overlap with another memory region.
+    pub fn overlaps(&self, other_region: &Self) -> bool {
+        let self_range = self.as_range();
+
+        self_range.contains(&other_region.start_page_addr())
+            || self_range.contains(&other_region.end_inclusive_page_addr())
+    }
+
+    /// Returns the number of pages contained in this region.
+    pub fn num_pages(&self) -> usize {
+        PageAddress::steps_between(&self.start, &self.end_exclusive).unwrap()
+    }
+
+    /// Returns the size in bytes of this region.
+    pub fn size(&self) -> usize {
+        // Invariant: start <= end_exclusive, so do unchecked arithmetic.
+        let end_exclusive = self.end_exclusive.into_inner().as_usize();
+        let start = self.start.into_inner().as_usize();
+
+        end_exclusive - start
+    }
+
+    /// Splits the MemoryRegion like:
+    ///
+    /// --------------------------------------------------------------------------------
+    /// |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |
+    /// --------------------------------------------------------------------------------
+    ///   ^                               ^                                       ^
+    ///   |                               |                                       |
+    ///   left_start     left_end_exclusive                                       |
+    ///                                                                           |
+    ///                                   ^                                       |
+    ///                                   |                                       |
+    ///                                   right_start           right_end_exclusive
+    ///
+    /// Left region is returned to the caller. Right region is the new region for this struct.
+    pub fn take_first_n_pages(&mut self, num_pages: NonZeroUsize) -> Result<Self, &'static str> {
+        let count: usize = num_pages.into();
+
+        let left_end_exclusive = self.start.checked_offset(count as isize);
+        let left_end_exclusive = match left_end_exclusive {
+            None => return Err("Overflow while calculating left_end_exclusive"),
+            Some(x) => x,
+        };
+
+        if left_end_exclusive > self.end_exclusive {
+            return Err("Not enough free pages");
+        }
+
+        let allocation = Self {
+            start: self.start,
+            end_exclusive: left_end_exclusive,
+        };
+        self.start = left_end_exclusive;
+
+        Ok(allocation)
+    }
+}
+
+impl<ATYPE: AddressType> IntoIterator for MemoryRegion<ATYPE> {
+    type Item = PageAddress<ATYPE>;
+    type IntoIter = Range<Self::Item>;
+
+    fn into_iter(self) -> Self::IntoIter {
+        Range {
+            start: self.start,
+            end: self.end_exclusive,
+        }
+    }
+}
+
+impl From<MMIODescriptor> for MemoryRegion<Physical> {
+    fn from(desc: MMIODescriptor) -> Self {
+        let start = PageAddress::from(desc.start_addr.align_down_page());
+        let end_exclusive = PageAddress::from(desc.end_addr_exclusive().align_up_page());
+
+        Self {
+            start,
+            end_exclusive,
+        }
+    }
+}
+
+//------------------------------------------------------------------------------
+// MMIODescriptor
+//------------------------------------------------------------------------------
+
+impl MMIODescriptor {
+    /// Create an instance.
+    pub const fn new(start_addr: Address<Physical>, size: usize) -> Self {
+        assert!(size > 0);
+        let end_addr_exclusive = Address::new(start_addr.as_usize() + size);
+
+        Self {
+            start_addr,
+            end_addr_exclusive,
+        }
+    }
+
+    /// Return the start address.
+    pub const fn start_addr(&self) -> Address<Physical> {
+        self.start_addr
+    }
+
+    /// Return the exclusive end address.
+    pub fn end_addr_exclusive(&self) -> Address<Physical> {
+        self.end_addr_exclusive
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use crate::memory::Virtual;
+    use test_macros::kernel_test;
+
+    /// Sanity of [PageAddress] methods.
+    #[kernel_test]
+    fn pageaddress_type_method_sanity() {
+        let page_addr: PageAddress<Virtual> =
+            PageAddress::from(bsp::memory::mmu::KernelGranule::SIZE * 2);
+
+        assert_eq!(
+            page_addr.checked_offset(-2),
+            Some(PageAddress::<Virtual>::from(0))
+        );
+
+        assert_eq!(
+            page_addr.checked_offset(2),
+            Some(PageAddress::<Virtual>::from(
+                bsp::memory::mmu::KernelGranule::SIZE * 4
+            ))
+        );
+
+        assert_eq!(
+            PageAddress::<Virtual>::from(0).checked_offset(0),
+            Some(PageAddress::<Virtual>::from(0))
+        );
+        assert_eq!(PageAddress::<Virtual>::from(0).checked_offset(-1), None);
+
+        let max_page_addr = Address::<Virtual>::new(usize::MAX).align_down_page();
+        assert_eq!(
+            PageAddress::<Virtual>::from(max_page_addr).checked_offset(1),
+            None
+        );
+
+        let zero = PageAddress::<Virtual>::from(0);
+        let three = PageAddress::<Virtual>::from(bsp::memory::mmu::KernelGranule::SIZE * 3);
+        assert_eq!(PageAddress::steps_between(&zero, &three), Some(3));
+    }
+
+    /// Sanity of [MemoryRegion] methods.
+    #[kernel_test]
+    fn memoryregion_type_method_sanity() {
+        let zero = PageAddress::<Virtual>::from(0);
+        let zero_region = MemoryRegion::new(zero, zero);
+        assert_eq!(zero_region.num_pages(), 0);
+        assert_eq!(zero_region.size(), 0);
+
+        let one = PageAddress::<Virtual>::from(bsp::memory::mmu::KernelGranule::SIZE);
+        let one_region = MemoryRegion::new(zero, one);
+        assert_eq!(one_region.num_pages(), 1);
+        assert_eq!(one_region.size(), bsp::memory::mmu::KernelGranule::SIZE);
+
+        let three = PageAddress::<Virtual>::from(bsp::memory::mmu::KernelGranule::SIZE * 3);
+        let mut three_region = MemoryRegion::new(zero, three);
+        assert!(three_region.contains(zero.into_inner()));
+        assert!(!three_region.contains(three.into_inner()));
+        assert!(three_region.overlaps(&one_region));
+
+        let allocation = three_region
+            .take_first_n_pages(NonZeroUsize::new(2).unwrap())
+            .unwrap();
+        assert_eq!(allocation.num_pages(), 2);
+        assert_eq!(three_region.num_pages(), 1);
+
+        for (i, alloc) in allocation.into_iter().enumerate() {
+            assert_eq!(
+                alloc.into_inner().as_usize(),
+                i * bsp::memory::mmu::KernelGranule::SIZE
+            );
+        }
+    }
+}
diff --git a/17_kernel_symbols/kernel/src/panic_wait.rs b/17_kernel_symbols/kernel/src/panic_wait.rs
new file mode 100644
index 000000000..08d7d4533
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/panic_wait.rs
@@ -0,0 +1,104 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! A panic handler that infinitely waits.
+
+use crate::{bsp, cpu, exception};
+use core::{fmt, panic::PanicInfo};
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+fn _panic_print(args: fmt::Arguments) {
+    use fmt::Write;
+
+    unsafe { bsp::console::panic_console_out().write_fmt(args).unwrap() };
+}
+
+/// The point of exit for `libkernel`.
+///
+/// It is linked weakly, so that the integration tests can overload its standard behavior.
+#[linkage = "weak"]
+#[no_mangle]
+fn _panic_exit() -> ! {
+    #[cfg(not(feature = "test_build"))]
+    {
+        cpu::wait_forever()
+    }
+
+    #[cfg(feature = "test_build")]
+    {
+        cpu::qemu_exit_failure()
+    }
+}
+
+/// Prints with a newline - only use from the panic handler.
+///
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
+#[macro_export]
+macro_rules! panic_println {
+    ($($arg:tt)*) => ({
+        _panic_print(format_args_nl!($($arg)*));
+    })
+}
+
+/// Stop immediately if called a second time.
+///
+/// # Note
+///
+/// Using atomics here relieves us from needing to use `unsafe` for the static variable.
+///
+/// On `AArch64`, which is the only implemented architecture at the time of writing this,
+/// [`AtomicBool::load`] and [`AtomicBool::store`] are lowered to ordinary load and store
+/// instructions. They are therefore safe to use even with MMU + caching deactivated.
+///
+/// [`AtomicBool::load`]: core::sync::atomic::AtomicBool::load
+/// [`AtomicBool::store`]: core::sync::atomic::AtomicBool::store
+fn panic_prevent_reenter() {
+    use core::sync::atomic::{AtomicBool, Ordering};
+
+    #[cfg(not(target_arch = "aarch64"))]
+    compile_error!("Add the target_arch to above's check if the following code is safe to use");
+
+    static PANIC_IN_PROGRESS: AtomicBool = AtomicBool::new(false);
+
+    if !PANIC_IN_PROGRESS.load(Ordering::Relaxed) {
+        PANIC_IN_PROGRESS.store(true, Ordering::Relaxed);
+
+        return;
+    }
+
+    _panic_exit()
+}
+
+#[panic_handler]
+fn panic(info: &PanicInfo) -> ! {
+    use crate::time::interface::TimeManager;
+
+    unsafe { exception::asynchronous::local_irq_mask() };
+
+    // Protect against panic infinite loops if any of the following code panics itself.
+    panic_prevent_reenter();
+
+    let timestamp = crate::time::time_manager().uptime();
+    let (location, line, column) = match info.location() {
+        Some(loc) => (loc.file(), loc.line(), loc.column()),
+        _ => ("???", 0, 0),
+    };
+
+    panic_println!(
+        "[  {:>3}.{:06}] Kernel panic!\n\n\
+        Panic location:\n      File '{}', line {}, column {}\n\n\
+        {}",
+        timestamp.as_secs(),
+        timestamp.subsec_micros(),
+        location,
+        line,
+        column,
+        info.message().unwrap_or(&format_args!("")),
+    );
+
+    _panic_exit()
+}
diff --git a/17_kernel_symbols/kernel/src/print.rs b/17_kernel_symbols/kernel/src/print.rs
new file mode 100644
index 000000000..9ec13a286
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/print.rs
@@ -0,0 +1,94 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Printing.
+
+use crate::{bsp, console};
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+#[doc(hidden)]
+pub fn _print(args: fmt::Arguments) {
+    use console::interface::Write;
+
+    bsp::console::console().write_fmt(args).unwrap();
+}
+
+/// Prints without a newline.
+///
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
+#[macro_export]
+macro_rules! print {
+    ($($arg:tt)*) => ($crate::print::_print(format_args!($($arg)*)));
+}
+
+/// Prints with a newline.
+///
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
+#[macro_export]
+macro_rules! println {
+    () => ($crate::print!("\n"));
+    ($($arg:tt)*) => ({
+        $crate::print::_print(format_args_nl!($($arg)*));
+    })
+}
+
+/// Prints an info, with a newline.
+#[macro_export]
+macro_rules! info {
+    ($string:expr) => ({
+        use $crate::time::interface::TimeManager;
+
+        let timestamp = $crate::time::time_manager().uptime();
+
+        $crate::print::_print(format_args_nl!(
+            concat!("[  {:>3}.{:06}] ", $string),
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+        ));
+    });
+    ($format_string:expr, $($arg:tt)*) => ({
+        use $crate::time::interface::TimeManager;
+
+        let timestamp = $crate::time::time_manager().uptime();
+
+        $crate::print::_print(format_args_nl!(
+            concat!("[  {:>3}.{:06}] ", $format_string),
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+            $($arg)*
+        ));
+    })
+}
+
+/// Prints a warning, with a newline.
+#[macro_export]
+macro_rules! warn {
+    ($string:expr) => ({
+        use $crate::time::interface::TimeManager;
+
+        let timestamp = $crate::time::time_manager().uptime();
+
+        $crate::print::_print(format_args_nl!(
+            concat!("[W {:>3}.{:06}] ", $string),
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+        ));
+    });
+    ($format_string:expr, $($arg:tt)*) => ({
+        use $crate::time::interface::TimeManager;
+
+        let timestamp = $crate::time::time_manager().uptime();
+
+        $crate::print::_print(format_args_nl!(
+            concat!("[W {:>3}.{:06}] ", $format_string),
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+            $($arg)*
+        ));
+    })
+}
diff --git a/17_kernel_symbols/kernel/src/state.rs b/17_kernel_symbols/kernel/src/state.rs
new file mode 100644
index 000000000..0af3688c2
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/state.rs
@@ -0,0 +1,92 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! State information about the kernel itself.
+
+use core::sync::atomic::{AtomicU8, Ordering};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Different stages in the kernel execution.
+#[derive(Copy, Clone, Eq, PartialEq)]
+enum State {
+    /// The kernel starts booting in this state.
+    Init,
+
+    /// The kernel transitions to this state when jumping to `kernel_main()` (at the end of
+    /// `kernel_init()`, after all init calls are done).
+    SingleCoreMain,
+
+    /// The kernel transitions to this state when it boots the secondary cores, aka switches
+    /// exectution mode to symmetric multiprocessing (SMP).
+    MultiCoreMain,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Maintains the kernel state and state transitions.
+pub struct StateManager(AtomicU8);
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static STATE_MANAGER: StateManager = StateManager::new();
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the global StateManager.
+pub fn state_manager() -> &'static StateManager {
+    &STATE_MANAGER
+}
+
+impl StateManager {
+    const INIT: u8 = 0;
+    const SINGLE_CORE_MAIN: u8 = 1;
+    const MULTI_CORE_MAIN: u8 = 2;
+
+    /// Create a new instance.
+    pub const fn new() -> Self {
+        Self(AtomicU8::new(Self::INIT))
+    }
+
+    /// Return the current state.
+    fn state(&self) -> State {
+        let state = self.0.load(Ordering::Acquire);
+
+        match state {
+            Self::INIT => State::Init,
+            Self::SINGLE_CORE_MAIN => State::SingleCoreMain,
+            Self::MULTI_CORE_MAIN => State::MultiCoreMain,
+            _ => panic!("Invalid KERNEL_STATE"),
+        }
+    }
+
+    /// Return if the kernel is init state.
+    pub fn is_init(&self) -> bool {
+        self.state() == State::Init
+    }
+
+    /// Transition from Init to SingleCoreMain.
+    pub fn transition_to_single_core_main(&self) {
+        if self
+            .0
+            .compare_exchange(
+                Self::INIT,
+                Self::SINGLE_CORE_MAIN,
+                Ordering::Acquire,
+                Ordering::Relaxed,
+            )
+            .is_err()
+        {
+            panic!("transition_to_single_core_main() called while state != Init");
+        }
+    }
+}
diff --git a/17_kernel_symbols/kernel/src/symbols.rs b/17_kernel_symbols/kernel/src/symbols.rs
new file mode 100644
index 000000000..bde40a604
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/symbols.rs
@@ -0,0 +1,85 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Debug symbol support.
+
+use crate::memory::{Address, Virtual};
+use core::{cell::UnsafeCell, slice};
+use debug_symbol_types::Symbol;
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+// Symbol from the linker script.
+extern "Rust" {
+    static __kernel_symbols_start: UnsafeCell<()>;
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+/// This will be patched to the correct value by the "kernel symbols tool" after linking. This given
+/// value here is just a (safe) dummy.
+#[no_mangle]
+static NUM_KERNEL_SYMBOLS: u64 = 0;
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+fn kernel_symbol_section_virt_start_addr() -> Address<Virtual> {
+    Address::new(unsafe { __kernel_symbols_start.get() as usize })
+}
+
+fn kernel_symbols_slice() -> &'static [Symbol] {
+    let ptr = kernel_symbol_section_virt_start_addr().as_usize() as *const Symbol;
+
+    unsafe {
+        let num = core::ptr::read_volatile(&NUM_KERNEL_SYMBOLS as *const u64) as usize;
+        slice::from_raw_parts(ptr, num)
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Retrieve the symbol name corresponding to a virtual address, if any.
+pub fn lookup_symbol(addr: Address<Virtual>) -> Option<&'static str> {
+    for i in kernel_symbols_slice() {
+        if i.contains(addr.as_usize()) {
+            return Some(i.name());
+        }
+    }
+
+    None
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// Sanity of symbols module.
+    #[kernel_test]
+    fn symbols_sanity() {
+        let first_sym = lookup_symbol(Address::new(
+            crate::common::is_aligned as *const usize as usize,
+        ))
+        .unwrap();
+
+        assert_eq!(first_sym, "libkernel::common::is_aligned");
+
+        let second_sym =
+            lookup_symbol(Address::new(crate::version as *const usize as usize)).unwrap();
+
+        assert_eq!(second_sym, "libkernel::version");
+    }
+}
diff --git a/17_kernel_symbols/kernel/src/synchronization.rs b/17_kernel_symbols/kernel/src/synchronization.rs
new file mode 100644
index 000000000..4b4c4c3fb
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/synchronization.rs
@@ -0,0 +1,159 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Synchronization primitives.
+//!
+//! # Resources
+//!
+//!   - <https://doc.rust-lang.org/book/ch16-04-extensible-concurrency-sync-and-send.html>
+//!   - <https://stackoverflow.com/questions/59428096/understanding-the-send-trait>
+//!   - <https://doc.rust-lang.org/std/cell/index.html>
+
+use core::cell::UnsafeCell;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Synchronization interfaces.
+pub mod interface {
+
+    /// Any object implementing this trait guarantees exclusive access to the data wrapped within
+    /// the Mutex for the duration of the provided closure.
+    pub trait Mutex {
+        /// The type of the data that is wrapped by this mutex.
+        type Data;
+
+        /// Locks the mutex and grants the closure temporary mutable access to the wrapped data.
+        fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R;
+    }
+
+    /// A reader-writer exclusion type.
+    ///
+    /// The implementing object allows either a number of readers or at most one writer at any point
+    /// in time.
+    pub trait ReadWriteEx {
+        /// The type of encapsulated data.
+        type Data;
+
+        /// Grants temporary mutable access to the encapsulated data.
+        fn write<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R;
+
+        /// Grants temporary immutable access to the encapsulated data.
+        fn read<R>(&self, f: impl FnOnce(&Self::Data) -> R) -> R;
+    }
+}
+
+/// A pseudo-lock for teaching purposes.
+///
+/// In contrast to a real Mutex implementation, does not protect against concurrent access from
+/// other cores to the contained data. This part is preserved for later lessons.
+///
+/// The lock will only be used as long as it is safe to do so, i.e. as long as the kernel is
+/// executing on a single core.
+pub struct IRQSafeNullLock<T>
+where
+    T: ?Sized,
+{
+    data: UnsafeCell<T>,
+}
+
+/// A pseudo-lock that is RW during the single-core kernel init phase and RO afterwards.
+///
+/// Intended to encapsulate data that is populated during kernel init when no concurrency exists.
+pub struct InitStateLock<T>
+where
+    T: ?Sized,
+{
+    data: UnsafeCell<T>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+unsafe impl<T> Send for IRQSafeNullLock<T> where T: ?Sized + Send {}
+unsafe impl<T> Sync for IRQSafeNullLock<T> where T: ?Sized + Send {}
+
+impl<T> IRQSafeNullLock<T> {
+    /// Create an instance.
+    pub const fn new(data: T) -> Self {
+        Self {
+            data: UnsafeCell::new(data),
+        }
+    }
+}
+
+unsafe impl<T> Send for InitStateLock<T> where T: ?Sized + Send {}
+unsafe impl<T> Sync for InitStateLock<T> where T: ?Sized + Send {}
+
+impl<T> InitStateLock<T> {
+    /// Create an instance.
+    pub const fn new(data: T) -> Self {
+        Self {
+            data: UnsafeCell::new(data),
+        }
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use crate::{exception, state};
+
+impl<T> interface::Mutex for IRQSafeNullLock<T> {
+    type Data = T;
+
+    fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
+        // In a real lock, there would be code encapsulating this line that ensures that this
+        // mutable reference will ever only be given out once at a time.
+        let data = unsafe { &mut *self.data.get() };
+
+        // Execute the closure while IRQs are masked.
+        exception::asynchronous::exec_with_irq_masked(|| f(data))
+    }
+}
+
+impl<T> interface::ReadWriteEx for InitStateLock<T> {
+    type Data = T;
+
+    fn write<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
+        assert!(
+            state::state_manager().is_init(),
+            "InitStateLock::write called after kernel init phase"
+        );
+        assert!(
+            !exception::asynchronous::is_local_irq_masked(),
+            "InitStateLock::write called with IRQs unmasked"
+        );
+
+        let data = unsafe { &mut *self.data.get() };
+
+        f(data)
+    }
+
+    fn read<R>(&self, f: impl FnOnce(&Self::Data) -> R) -> R {
+        let data = unsafe { &*self.data.get() };
+
+        f(data)
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// InitStateLock must be transparent.
+    #[kernel_test]
+    fn init_state_lock_is_transparent() {
+        use core::mem::size_of;
+
+        assert_eq!(size_of::<InitStateLock<u64>>(), size_of::<u64>());
+    }
+}
diff --git a/17_kernel_symbols/kernel/src/time.rs b/17_kernel_symbols/kernel/src/time.rs
new file mode 100644
index 000000000..6d92b1966
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/time.rs
@@ -0,0 +1,37 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Timer primitives.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "_arch/aarch64/time.rs"]
+mod arch_time;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_time::time_manager;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Timekeeping interfaces.
+pub mod interface {
+    use core::time::Duration;
+
+    /// Time management functions.
+    pub trait TimeManager {
+        /// The timer's resolution.
+        fn resolution(&self) -> Duration;
+
+        /// The uptime since power-on of the device.
+        ///
+        /// This includes time consumed by firmware and bootloaders.
+        fn uptime(&self) -> Duration;
+
+        /// Spin for a given duration.
+        fn spin_for(&self, duration: Duration);
+    }
+}
diff --git a/17_kernel_symbols/kernel/tests/00_console_sanity.rb b/17_kernel_symbols/kernel/tests/00_console_sanity.rb
new file mode 100644
index 000000000..4dde55762
--- /dev/null
+++ b/17_kernel_symbols/kernel/tests/00_console_sanity.rb
@@ -0,0 +1,48 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+
+require 'console_io_test'
+
+# Verify sending and receiving works as expected.
+class TxRxHandshakeTest < SubtestBase
+    def name
+        'Transmit and Receive handshake'
+    end
+
+    def run(qemu_out, qemu_in)
+        qemu_in.write_nonblock('ABC')
+        expect_or_raise(qemu_out, 'OK1234')
+    end
+end
+
+# Check for correct TX statistics implementation. Depends on test 1 being run first.
+class TxStatisticsTest < SubtestBase
+    def name
+        'Transmit statistics'
+    end
+
+    def run(qemu_out, _qemu_in)
+        expect_or_raise(qemu_out, '6')
+    end
+end
+
+# Check for correct RX statistics implementation. Depends on test 1 being run first.
+class RxStatisticsTest < SubtestBase
+    def name
+        'Receive statistics'
+    end
+
+    def run(qemu_out, _qemu_in)
+        expect_or_raise(qemu_out, '3')
+    end
+end
+
+##--------------------------------------------------------------------------------------------------
+## Test registration
+##--------------------------------------------------------------------------------------------------
+def subtest_collection
+    [TxRxHandshakeTest.new, TxStatisticsTest.new, RxStatisticsTest.new]
+end
diff --git a/17_kernel_symbols/kernel/tests/00_console_sanity.rs b/17_kernel_symbols/kernel/tests/00_console_sanity.rs
new file mode 100644
index 000000000..6595aac1b
--- /dev/null
+++ b/17_kernel_symbols/kernel/tests/00_console_sanity.rs
@@ -0,0 +1,39 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Console sanity tests - RX, TX and statistics.
+
+#![feature(format_args_nl)]
+#![no_main]
+#![no_std]
+
+/// Console tests should time out on the I/O harness in case of panic.
+mod panic_wait_forever;
+
+use libkernel::{bsp, console, cpu, exception, memory, print};
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    use bsp::console::console;
+    use console::interface::*;
+
+    exception::handling_init();
+    memory::mmu::post_enable_init();
+    bsp::console::qemu_bring_up_console();
+
+    // Handshake
+    assert_eq!(console().read_char(), 'A');
+    assert_eq!(console().read_char(), 'B');
+    assert_eq!(console().read_char(), 'C');
+    print!("OK1234");
+
+    // 6
+    print!("{}", console().chars_written());
+
+    // 3
+    print!("{}", console().chars_read());
+
+    // The QEMU process running this test will be closed by the I/O test harness.
+    cpu::wait_forever();
+}
diff --git a/17_kernel_symbols/kernel/tests/01_timer_sanity.rs b/17_kernel_symbols/kernel/tests/01_timer_sanity.rs
new file mode 100644
index 000000000..9b2b228d9
--- /dev/null
+++ b/17_kernel_symbols/kernel/tests/01_timer_sanity.rs
@@ -0,0 +1,50 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Timer sanity tests.
+
+#![feature(custom_test_frameworks)]
+#![no_main]
+#![no_std]
+#![reexport_test_harness_main = "test_main"]
+#![test_runner(libkernel::test_runner)]
+
+use core::time::Duration;
+use libkernel::{bsp, cpu, exception, memory, time, time::interface::TimeManager};
+use test_macros::kernel_test;
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    exception::handling_init();
+    memory::mmu::post_enable_init();
+    bsp::console::qemu_bring_up_console();
+
+    // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
+
+    test_main();
+
+    cpu::qemu_exit_success()
+}
+
+/// Simple check that the timer is running.
+#[kernel_test]
+fn timer_is_counting() {
+    assert!(time::time_manager().uptime().as_nanos() > 0)
+}
+
+/// Timer resolution must be sufficient.
+#[kernel_test]
+fn timer_resolution_is_sufficient() {
+    assert!(time::time_manager().resolution().as_nanos() < 100)
+}
+
+/// Sanity check spin_for() implementation.
+#[kernel_test]
+fn spin_accuracy_check_1_second() {
+    let t1 = time::time_manager().uptime();
+    time::time_manager().spin_for(Duration::from_secs(1));
+    let t2 = time::time_manager().uptime();
+
+    assert_eq!((t2 - t1).as_secs(), 1)
+}
diff --git a/17_kernel_symbols/kernel/tests/02_exception_sync_page_fault.rs b/17_kernel_symbols/kernel/tests/02_exception_sync_page_fault.rs
new file mode 100644
index 000000000..0d2a1e63c
--- /dev/null
+++ b/17_kernel_symbols/kernel/tests/02_exception_sync_page_fault.rs
@@ -0,0 +1,37 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Page faults must result in synchronous exceptions.
+
+#![feature(format_args_nl)]
+#![no_main]
+#![no_std]
+
+/// Overwrites libkernel's `panic_wait::_panic_exit()` so that it returns a "success" code.
+///
+/// In this test, reaching the panic is a success, because it is called from the synchronous
+/// exception handler, which is what this test wants to achieve.
+///
+/// It also means that this integration test can not use any other code that calls panic!() directly
+/// or indirectly.
+mod panic_exit_success;
+
+use libkernel::{bsp, cpu, exception, info, memory, println};
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    exception::handling_init();
+    memory::mmu::post_enable_init();
+    bsp::console::qemu_bring_up_console();
+
+    // This line will be printed as the test header.
+    println!("Testing synchronous exception handling by causing a page fault");
+
+    info!("Writing to bottom of address space to address 1 GiB...");
+    let big_addr: u64 = 1024 * 1024 * 1024;
+    core::ptr::read_volatile(big_addr as *mut u64);
+
+    // If execution reaches here, the memory access above did not cause a page fault exception.
+    cpu::qemu_exit_failure()
+}
diff --git a/17_kernel_symbols/kernel/tests/03_exception_restore_sanity.rb b/17_kernel_symbols/kernel/tests/03_exception_restore_sanity.rb
new file mode 100644
index 000000000..5f52e0c7c
--- /dev/null
+++ b/17_kernel_symbols/kernel/tests/03_exception_restore_sanity.rb
@@ -0,0 +1,25 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+require 'console_io_test'
+
+# Verify that exception restore works.
+class ExceptionRestoreTest < SubtestBase
+    def name
+        'Exception restore'
+    end
+
+    def run(qemu_out, _qemu_in)
+        expect_or_raise(qemu_out, 'Back from system call!')
+    end
+end
+
+##--------------------------------------------------------------------------------------------------
+## Test registration
+##--------------------------------------------------------------------------------------------------
+def subtest_collection
+    [ExceptionRestoreTest.new]
+end
diff --git a/17_kernel_symbols/kernel/tests/03_exception_restore_sanity.rs b/17_kernel_symbols/kernel/tests/03_exception_restore_sanity.rs
new file mode 100644
index 000000000..983d488f1
--- /dev/null
+++ b/17_kernel_symbols/kernel/tests/03_exception_restore_sanity.rs
@@ -0,0 +1,49 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! A simple sanity test to see if exception restore code works.
+
+#![feature(format_args_nl)]
+#![no_main]
+#![no_std]
+
+/// Console tests should time out on the I/O harness in case of panic.
+mod panic_wait_forever;
+
+use core::arch::asm;
+use libkernel::{bsp, cpu, exception, info, memory, println};
+
+#[inline(never)]
+fn nested_system_call() {
+    #[cfg(target_arch = "aarch64")]
+    unsafe {
+        asm!("svc #0x1337", options(nomem, nostack, preserves_flags));
+    }
+
+    #[cfg(not(target_arch = "aarch64"))]
+    {
+        info!("Not supported yet");
+        cpu::wait_forever();
+    }
+}
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    exception::handling_init();
+    memory::mmu::post_enable_init();
+    bsp::console::qemu_bring_up_console();
+
+    // This line will be printed as the test header.
+    println!("Testing exception restore");
+
+    info!("Making a dummy system call");
+
+    // Calling this inside a function indirectly tests if the link register is restored properly.
+    nested_system_call();
+
+    info!("Back from system call!");
+
+    // The QEMU process running this test will be closed by the I/O test harness.
+    cpu::wait_forever();
+}
diff --git a/17_kernel_symbols/kernel/tests/04_exception_irq_sanity.rs b/17_kernel_symbols/kernel/tests/04_exception_irq_sanity.rs
new file mode 100644
index 000000000..9030424d5
--- /dev/null
+++ b/17_kernel_symbols/kernel/tests/04_exception_irq_sanity.rs
@@ -0,0 +1,67 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! IRQ handling sanity tests.
+
+#![feature(custom_test_frameworks)]
+#![no_main]
+#![no_std]
+#![reexport_test_harness_main = "test_main"]
+#![test_runner(libkernel::test_runner)]
+
+use libkernel::{bsp, cpu, exception, memory};
+use test_macros::kernel_test;
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    memory::mmu::post_enable_init();
+    bsp::console::qemu_bring_up_console();
+
+    exception::handling_init();
+    exception::asynchronous::local_irq_unmask();
+
+    test_main();
+
+    cpu::qemu_exit_success()
+}
+
+/// Check that IRQ masking works.
+#[kernel_test]
+fn local_irq_mask_works() {
+    // Precondition: IRQs are unmasked.
+    assert!(exception::asynchronous::is_local_irq_masked());
+
+    unsafe { exception::asynchronous::local_irq_mask() };
+    assert!(!exception::asynchronous::is_local_irq_masked());
+
+    // Restore earlier state.
+    unsafe { exception::asynchronous::local_irq_unmask() };
+}
+
+/// Check that IRQ unmasking works.
+#[kernel_test]
+fn local_irq_unmask_works() {
+    // Precondition: IRQs are masked.
+    unsafe { exception::asynchronous::local_irq_mask() };
+    assert!(!exception::asynchronous::is_local_irq_masked());
+
+    unsafe { exception::asynchronous::local_irq_unmask() };
+    assert!(exception::asynchronous::is_local_irq_masked());
+}
+
+/// Check that IRQ mask save is saving "something".
+#[kernel_test]
+fn local_irq_mask_save_works() {
+    // Precondition: IRQs are unmasked.
+    assert!(exception::asynchronous::is_local_irq_masked());
+
+    let first = unsafe { exception::asynchronous::local_irq_mask_save() };
+    assert!(!exception::asynchronous::is_local_irq_masked());
+
+    let second = unsafe { exception::asynchronous::local_irq_mask_save() };
+    assert_ne!(first, second);
+
+    unsafe { exception::asynchronous::local_irq_restore(first) };
+    assert!(exception::asynchronous::is_local_irq_masked());
+}
diff --git a/17_kernel_symbols/kernel/tests/boot_test_string.rb b/17_kernel_symbols/kernel/tests/boot_test_string.rb
new file mode 100644
index 000000000..f778b3d8c
--- /dev/null
+++ b/17_kernel_symbols/kernel/tests/boot_test_string.rb
@@ -0,0 +1,3 @@
+# frozen_string_literal: true
+
+EXPECTED_PRINT = 'Echoing input now'
diff --git a/17_kernel_symbols/kernel/tests/panic_exit_success/mod.rs b/17_kernel_symbols/kernel/tests/panic_exit_success/mod.rs
new file mode 100644
index 000000000..908fac51c
--- /dev/null
+++ b/17_kernel_symbols/kernel/tests/panic_exit_success/mod.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+
+/// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
+#[no_mangle]
+fn _panic_exit() -> ! {
+    libkernel::cpu::qemu_exit_success()
+}
diff --git a/17_kernel_symbols/kernel/tests/panic_wait_forever/mod.rs b/17_kernel_symbols/kernel/tests/panic_wait_forever/mod.rs
new file mode 100644
index 000000000..7a4effa50
--- /dev/null
+++ b/17_kernel_symbols/kernel/tests/panic_wait_forever/mod.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+/// Overwrites libkernel's `panic_wait::_panic_exit()` with wait_forever.
+#[no_mangle]
+fn _panic_exit() -> ! {
+    libkernel::cpu::wait_forever()
+}
diff --git a/17_kernel_symbols/kernel_symbols.mk b/17_kernel_symbols/kernel_symbols.mk
new file mode 100644
index 000000000..5b51ccfed
--- /dev/null
+++ b/17_kernel_symbols/kernel_symbols.mk
@@ -0,0 +1,103 @@
+## SPDX-License-Identifier: MIT OR Apache-2.0
+##
+## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+include ../common/format.mk
+include ../common/docker.mk
+
+##--------------------------------------------------------------------------------------------------
+## Check for input variables that need be exported by the calling Makefile
+##--------------------------------------------------------------------------------------------------
+ifndef KERNEL_SYMBOLS_TOOL_PATH
+$(error KERNEL_SYMBOLS_TOOL_PATH is not set)
+endif
+
+ifndef TARGET
+$(error TARGET is not set)
+endif
+
+ifndef KERNEL_SYMBOLS_INPUT_ELF
+$(error KERNEL_SYMBOLS_INPUT_ELF is not set)
+endif
+
+ifndef KERNEL_SYMBOLS_OUTPUT_ELF
+$(error KERNEL_SYMBOLS_OUTPUT_ELF is not set)
+endif
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Targets and Prerequisites
+##--------------------------------------------------------------------------------------------------
+KERNEL_SYMBOLS_MANIFEST      = kernel_symbols/Cargo.toml
+KERNEL_SYMBOLS_LINKER_SCRIPT = kernel_symbols/kernel_symbols.ld
+
+KERNEL_SYMBOLS_RS           = $(KERNEL_SYMBOLS_INPUT_ELF)_symbols.rs
+KERNEL_SYMBOLS_DEMANGLED_RS = $(shell pwd)/$(KERNEL_SYMBOLS_INPUT_ELF)_symbols_demangled.rs
+
+KERNEL_SYMBOLS_ELF      = target/$(TARGET)/release/kernel_symbols
+KERNEL_SYMBOLS_STRIPPED = target/$(TARGET)/release/kernel_symbols_stripped
+
+# Export for build.rs of kernel_symbols crate.
+export KERNEL_SYMBOLS_DEMANGLED_RS
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Command building blocks
+##--------------------------------------------------------------------------------------------------
+GET_SYMBOLS_SECTION_VIRT_ADDR = $(DOCKER_TOOLS) $(EXEC_SYMBOLS_TOOL) \
+    --get_symbols_section_virt_addr $(KERNEL_SYMBOLS_OUTPUT_ELF)
+
+RUSTFLAGS = -C link-arg=--script=$(KERNEL_SYMBOLS_LINKER_SCRIPT) \
+    -C link-arg=--section-start=.rodata=$$($(GET_SYMBOLS_SECTION_VIRT_ADDR))
+
+RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) \
+    -D warnings                   \
+    -D missing_docs
+
+COMPILER_ARGS = --target=$(TARGET) \
+    --release
+
+RUSTC_CMD   = cargo rustc $(COMPILER_ARGS) --manifest-path $(KERNEL_SYMBOLS_MANIFEST)
+OBJCOPY_CMD = rust-objcopy \
+    --strip-all            \
+    -O binary
+
+EXEC_SYMBOLS_TOOL  = ruby $(KERNEL_SYMBOLS_TOOL_PATH)/main.rb
+
+##------------------------------------------------------------------------------
+## Dockerization
+##------------------------------------------------------------------------------
+DOCKER_CMD = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
+
+# DOCKER_IMAGE defined in include file (see top of this file).
+DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: all
+
+all:
+	@cp $(KERNEL_SYMBOLS_INPUT_ELF) $(KERNEL_SYMBOLS_OUTPUT_ELF)
+
+	@$(DOCKER_TOOLS) $(EXEC_SYMBOLS_TOOL) --gen_symbols $(KERNEL_SYMBOLS_OUTPUT_ELF) \
+                $(KERNEL_SYMBOLS_RS)
+
+	$(call color_progress_prefix, "Demangling")
+	@echo Symbol names
+	@cat $(KERNEL_SYMBOLS_RS) | rustfilt > $(KERNEL_SYMBOLS_DEMANGLED_RS)
+
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
+
+	$(call color_progress_prefix, "Stripping")
+	@echo Symbols ELF file
+	@$(OBJCOPY_CMD) $(KERNEL_SYMBOLS_ELF) $(KERNEL_SYMBOLS_STRIPPED)
+
+	@$(DOCKER_TOOLS) $(EXEC_SYMBOLS_TOOL) --patch_data $(KERNEL_SYMBOLS_OUTPUT_ELF) \
+                $(KERNEL_SYMBOLS_STRIPPED)
+
+	$(call color_progress_prefix, "Finished")
diff --git a/17_kernel_symbols/kernel_symbols/Cargo.toml b/17_kernel_symbols/kernel_symbols/Cargo.toml
new file mode 100644
index 000000000..3407aa7e1
--- /dev/null
+++ b/17_kernel_symbols/kernel_symbols/Cargo.toml
@@ -0,0 +1,15 @@
+[package]
+name = "kernel_symbols"
+version = "0.1.0"
+edition = "2021"
+
+[features]
+default = []
+generated_symbols_available = []
+
+##--------------------------------------------------------------------------------------------------
+## Dependencies
+##--------------------------------------------------------------------------------------------------
+
+[dependencies]
+debug-symbol-types = { path = "../libraries/debug-symbol-types" }
diff --git a/17_kernel_symbols/kernel_symbols/build.rs b/17_kernel_symbols/kernel_symbols/build.rs
new file mode 100644
index 000000000..5062df444
--- /dev/null
+++ b/17_kernel_symbols/kernel_symbols/build.rs
@@ -0,0 +1,14 @@
+use std::{env, path::Path};
+
+fn main() {
+    if let Ok(path) = env::var("KERNEL_SYMBOLS_DEMANGLED_RS") {
+        if Path::new(&path).exists() {
+            println!("cargo:rustc-cfg=feature=\"generated_symbols_available\"")
+        }
+    }
+
+    println!(
+        "cargo:rerun-if-changed={}",
+        Path::new("kernel_symbols.ld").display()
+    );
+}
diff --git a/17_kernel_symbols/kernel_symbols/kernel_symbols.ld b/17_kernel_symbols/kernel_symbols/kernel_symbols.ld
new file mode 100644
index 000000000..0625f0086
--- /dev/null
+++ b/17_kernel_symbols/kernel_symbols/kernel_symbols.ld
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: MIT OR Apache-2.0
+ *
+ * Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+ */
+
+SECTIONS
+{
+    .rodata : {
+        ASSERT(. > 0xffffffff00000000, "Expected higher half address")
+
+        KEEP(*(.rodata.symbol_desc*))
+        . = ALIGN(8);
+        *(.rodata*)
+    }
+}
diff --git a/17_kernel_symbols/kernel_symbols/src/main.rs b/17_kernel_symbols/kernel_symbols/src/main.rs
new file mode 100644
index 000000000..bd90b535d
--- /dev/null
+++ b/17_kernel_symbols/kernel_symbols/src/main.rs
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Generation of kernel symbols.
+
+#![no_std]
+#![no_main]
+
+#[cfg(feature = "generated_symbols_available")]
+include!(env!("KERNEL_SYMBOLS_DEMANGLED_RS"));
+
+#[panic_handler]
+fn panic(_info: &core::panic::PanicInfo) -> ! {
+    unimplemented!()
+}
diff --git a/17_kernel_symbols/libraries/debug-symbol-types/Cargo.toml b/17_kernel_symbols/libraries/debug-symbol-types/Cargo.toml
new file mode 100644
index 000000000..e5b1fd1f5
--- /dev/null
+++ b/17_kernel_symbols/libraries/debug-symbol-types/Cargo.toml
@@ -0,0 +1,4 @@
+[package]
+name = "debug-symbol-types"
+version = "0.1.0"
+edition = "2021"
diff --git a/17_kernel_symbols/libraries/debug-symbol-types/src/lib.rs b/17_kernel_symbols/libraries/debug-symbol-types/src/lib.rs
new file mode 100644
index 000000000..4c12e86fe
--- /dev/null
+++ b/17_kernel_symbols/libraries/debug-symbol-types/src/lib.rs
@@ -0,0 +1,39 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Types for implementing debug symbol support.
+
+#![no_std]
+
+use core::ops::Range;
+
+/// A symbol containing a size.
+#[repr(C)]
+pub struct Symbol {
+    addr_range: Range<usize>,
+    name: &'static str,
+}
+
+impl Symbol {
+    /// Create an instance.
+    pub const fn new(start: usize, size: usize, name: &'static str) -> Symbol {
+        Symbol {
+            addr_range: Range {
+                start,
+                end: start + size,
+            },
+            name,
+        }
+    }
+
+    /// Returns true if addr is contained in the range.
+    pub fn contains(&self, addr: usize) -> bool {
+        self.addr_range.contains(&addr)
+    }
+
+    /// Returns the symbol's name.
+    pub fn name(&self) -> &'static str {
+        self.name
+    }
+}
diff --git a/17_kernel_symbols/libraries/test-macros/Cargo.toml b/17_kernel_symbols/libraries/test-macros/Cargo.toml
new file mode 100644
index 000000000..fff98a1fc
--- /dev/null
+++ b/17_kernel_symbols/libraries/test-macros/Cargo.toml
@@ -0,0 +1,14 @@
+[package]
+name = "test-macros"
+version = "0.1.0"
+authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+edition = "2021"
+
+[lib]
+proc-macro = true
+
+[dependencies]
+proc-macro2 = "1.x"
+quote = "1.x"
+syn = { version = "1.x", features = ["full"] }
+test-types = { path = "../test-types" }
diff --git a/17_kernel_symbols/libraries/test-macros/src/lib.rs b/17_kernel_symbols/libraries/test-macros/src/lib.rs
new file mode 100644
index 000000000..9879677cf
--- /dev/null
+++ b/17_kernel_symbols/libraries/test-macros/src/lib.rs
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+
+use proc_macro::TokenStream;
+use proc_macro2::Span;
+use quote::quote;
+use syn::{parse_macro_input, Ident, ItemFn};
+
+#[proc_macro_attribute]
+pub fn kernel_test(_attr: TokenStream, input: TokenStream) -> TokenStream {
+    let f = parse_macro_input!(input as ItemFn);
+
+    let test_name = &format!("{}", f.sig.ident);
+    let test_ident = Ident::new(
+        &format!("{}_TEST_CONTAINER", f.sig.ident.to_string().to_uppercase()),
+        Span::call_site(),
+    );
+    let test_code_block = f.block;
+
+    quote!(
+        #[test_case]
+        const #test_ident: test_types::UnitTest = test_types::UnitTest {
+            name: #test_name,
+            test_func: || #test_code_block,
+        };
+    )
+    .into()
+}
diff --git a/17_kernel_symbols/libraries/test-types/Cargo.toml b/17_kernel_symbols/libraries/test-types/Cargo.toml
new file mode 100644
index 000000000..2f20f060e
--- /dev/null
+++ b/17_kernel_symbols/libraries/test-types/Cargo.toml
@@ -0,0 +1,5 @@
+[package]
+name = "test-types"
+version = "0.1.0"
+authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+edition = "2021"
diff --git a/17_kernel_symbols/libraries/test-types/src/lib.rs b/17_kernel_symbols/libraries/test-types/src/lib.rs
new file mode 100644
index 000000000..922c2a1c3
--- /dev/null
+++ b/17_kernel_symbols/libraries/test-types/src/lib.rs
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Types for the `custom_test_frameworks` implementation.
+
+#![no_std]
+
+/// Unit test container.
+pub struct UnitTest {
+    /// Name of the test.
+    pub name: &'static str,
+
+    /// Function pointer to the test.
+    pub test_func: fn(),
+}
diff --git a/17_kernel_symbols/tools/kernel_symbols_tool/cmds.rb b/17_kernel_symbols/tools/kernel_symbols_tool/cmds.rb
new file mode 100644
index 000000000..fe66ea71c
--- /dev/null
+++ b/17_kernel_symbols/tools/kernel_symbols_tool/cmds.rb
@@ -0,0 +1,45 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+def generate_symbols(kernel_elf, output_file)
+    File.open(output_file, 'w') do |file|
+        header = <<~HEREDOC
+            use debug_symbol_types::Symbol;
+
+            # [no_mangle]
+            # [link_section = ".rodata.symbol_desc"]
+            static KERNEL_SYMBOLS: [Symbol; #{kernel_elf.num_symbols}] = [
+        HEREDOC
+
+        file.write(header)
+        kernel_elf.symbols.each do |sym|
+            value = sym.header.st_value
+            size = sym.header.st_size
+            name = sym.name
+
+            file.write("    Symbol::new(#{value}, #{size}, \"#{name}\"),\n")
+        end
+        file.write("];\n")
+    end
+end
+
+def get_symbols_section_virt_addr(kernel_elf)
+    kernel_elf.kernel_symbols_section_virt_addr
+end
+
+def patch_symbol_data(kernel_elf, symbols_blob_path)
+    symbols_blob = File.binread(symbols_blob_path)
+
+    raise if symbols_blob.size > kernel_elf.kernel_symbols_section_size
+
+    File.binwrite(kernel_elf.path, File.binread(symbols_blob_path),
+                  kernel_elf.kernel_symbols_section_offset_in_file)
+end
+
+def patch_num_symbols(kernel_elf)
+    num_packed = [kernel_elf.num_symbols].pack('Q<*') # "Q" == uint64_t, "<" == little endian
+    File.binwrite(kernel_elf.path, num_packed, kernel_elf.num_kernel_symbols_offset_in_file)
+end
diff --git a/17_kernel_symbols/tools/kernel_symbols_tool/kernel_elf.rb b/17_kernel_symbols/tools/kernel_symbols_tool/kernel_elf.rb
new file mode 100644
index 000000000..b16497673
--- /dev/null
+++ b/17_kernel_symbols/tools/kernel_symbols_tool/kernel_elf.rb
@@ -0,0 +1,74 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+# KernelELF
+class KernelELF
+    attr_reader :path
+
+    def initialize(kernel_elf_path, kernel_symbols_section, num_kernel_symbols)
+        @elf = ELFTools::ELFFile.new(File.open(kernel_elf_path))
+        @symtab_section = @elf.section_by_name('.symtab')
+
+        @path = kernel_elf_path
+        fetch_values(kernel_symbols_section, num_kernel_symbols)
+    end
+
+    private
+
+    def fetch_values(kernel_symbols_section, num_kernel_symbols)
+        sym = @symtab_section.symbol_by_name(num_kernel_symbols)
+        raise "Symbol \"#{num_kernel_symbols}\" not found" if sym.nil?
+
+        @num_kernel_symbols = sym
+
+        section = @elf.section_by_name(kernel_symbols_section)
+        raise "Section \"#{kernel_symbols_section}\" not found" if section.nil?
+
+        @kernel_symbols_section = section
+    end
+
+    def num_kernel_symbols_virt_addr
+        @num_kernel_symbols.header.st_value
+    end
+
+    def segment_containing_virt_addr(virt_addr)
+        @elf.each_segments do |segment|
+            return segment if segment.vma_in?(virt_addr)
+        end
+    end
+
+    def virt_addr_to_file_offset(virt_addr)
+        segment = segment_containing_virt_addr(virt_addr)
+        segment.vma_to_offset(virt_addr)
+    end
+
+    public
+
+    def symbols
+        non_zero_symbols = @symtab_section.symbols.reject { |sym| sym.header.st_size.zero? }
+        non_zero_symbols.sort_by { |sym| sym.header.st_value }
+    end
+
+    def num_symbols
+        symbols.size
+    end
+
+    def kernel_symbols_section_virt_addr
+        @kernel_symbols_section.header.sh_addr.to_i
+    end
+
+    def kernel_symbols_section_size
+        @kernel_symbols_section.header.sh_size.to_i
+    end
+
+    def kernel_symbols_section_offset_in_file
+        virt_addr_to_file_offset(kernel_symbols_section_virt_addr)
+    end
+
+    def num_kernel_symbols_offset_in_file
+        virt_addr_to_file_offset(num_kernel_symbols_virt_addr)
+    end
+end
diff --git a/17_kernel_symbols/tools/kernel_symbols_tool/main.rb b/17_kernel_symbols/tools/kernel_symbols_tool/main.rb
new file mode 100755
index 000000000..30a8be6f5
--- /dev/null
+++ b/17_kernel_symbols/tools/kernel_symbols_tool/main.rb
@@ -0,0 +1,47 @@
+#!/usr/bin/env ruby
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+require 'rubygems'
+require 'bundler/setup'
+require 'colorize'
+require 'elftools'
+
+require_relative 'kernel_elf'
+require_relative 'cmds'
+
+KERNEL_SYMBOLS_SECTION = '.kernel_symbols'
+NUM_KERNEL_SYMBOLS = 'NUM_KERNEL_SYMBOLS'
+
+cmd = ARGV[0]
+
+kernel_elf_path = ARGV[1]
+kernel_elf = KernelELF.new(kernel_elf_path, KERNEL_SYMBOLS_SECTION, NUM_KERNEL_SYMBOLS)
+
+case cmd
+when '--gen_symbols'
+    output_file = ARGV[2]
+
+    print 'Generating'.rjust(12).green.bold
+    puts ' Symbols source file'
+
+    generate_symbols(kernel_elf, output_file)
+when '--get_symbols_section_virt_addr'
+    addr = get_symbols_section_virt_addr(kernel_elf)
+
+    puts "0x#{addr.to_s(16)}"
+when '--patch_data'
+    symbols_blob_path = ARGV[2]
+    num_symbols = kernel_elf.num_symbols
+
+    print 'Patching'.rjust(12).green.bold
+    puts " Symbols blob and number of symbols (#{num_symbols}) into ELF"
+
+    patch_symbol_data(kernel_elf, symbols_blob_path)
+    patch_num_symbols(kernel_elf)
+else
+    raise
+end
diff --git a/17_kernel_symbols/tools/translation_table_tool/arch.rb b/17_kernel_symbols/tools/translation_table_tool/arch.rb
new file mode 100644
index 000000000..deceb6d0c
--- /dev/null
+++ b/17_kernel_symbols/tools/translation_table_tool/arch.rb
@@ -0,0 +1,314 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+# Bitfield manipulation.
+class BitField
+    def initialize
+        @value = 0
+    end
+
+    def self.attr_bitfield(name, offset, num_bits)
+        define_method("#{name}=") do |bits|
+            mask = (2**num_bits) - 1
+
+            raise "Input out of range: #{name} = 0x#{bits.to_s(16)}" if (bits & ~mask).positive?
+
+            # Clear bitfield
+            @value &= ~(mask << offset)
+
+            # Set it
+            @value |= (bits << offset)
+        end
+    end
+
+    def to_i
+        @value
+    end
+
+    def size_in_byte
+        8
+    end
+end
+
+# An array class that knows its memory location.
+class CArray < Array
+    attr_reader :phys_start_addr
+
+    def initialize(phys_start_addr, size, &block)
+        @phys_start_addr = phys_start_addr
+
+        super(size, &block)
+    end
+
+    def size_in_byte
+        inject(0) { |sum, n| sum + n.size_in_byte }
+    end
+end
+
+#---------------------------------------------------------------------------------------------------
+# Arch::
+#---------------------------------------------------------------------------------------------------
+module Arch
+#---------------------------------------------------------------------------------------------------
+# Arch::ARMv8
+#---------------------------------------------------------------------------------------------------
+module ARMv8
+# ARMv8 Table Descriptor.
+class Stage1TableDescriptor < BitField
+    module NextLevelTableAddr
+        OFFSET = 16
+        NUMBITS = 32
+    end
+
+    module Type
+        OFFSET = 1
+        NUMBITS = 1
+
+        BLOCK = 0
+        TABLE = 1
+    end
+
+    module Valid
+        OFFSET = 0
+        NUMBITS = 1
+
+        FALSE = 0
+        TRUE = 1
+    end
+
+    attr_bitfield(:__next_level_table_addr, NextLevelTableAddr::OFFSET, NextLevelTableAddr::NUMBITS)
+    attr_bitfield(:type, Type::OFFSET, Type::NUMBITS)
+    attr_bitfield(:valid, Valid::OFFSET, Valid::NUMBITS)
+
+    def next_level_table_addr=(addr)
+        addr = addr >> Granule64KiB::SHIFT
+
+        self.__next_level_table_addr = addr
+    end
+
+    private :__next_level_table_addr=
+end
+
+# ARMv8 level 3 page descriptor.
+class Stage1PageDescriptor < BitField
+    module UXN
+        OFFSET = 54
+        NUMBITS = 1
+
+        FALSE = 0
+        TRUE = 1
+    end
+
+    module PXN
+        OFFSET = 53
+        NUMBITS = 1
+
+        FALSE = 0
+        TRUE = 1
+    end
+
+    module OutputAddr
+        OFFSET = 16
+        NUMBITS = 32
+    end
+
+    module AF
+        OFFSET = 10
+        NUMBITS = 1
+
+        FALSE = 0
+        TRUE = 1
+    end
+
+    module SH
+        OFFSET = 8
+        NUMBITS = 2
+
+        INNER_SHAREABLE = 0b11
+    end
+
+    module AP
+        OFFSET = 6
+        NUMBITS = 2
+
+        RW_EL1 = 0b00
+        RO_EL1 = 0b10
+    end
+
+    module AttrIndx
+        OFFSET = 2
+        NUMBITS = 3
+    end
+
+    module Type
+        OFFSET = 1
+        NUMBITS = 1
+
+        RESERVED_INVALID = 0
+        PAGE = 1
+    end
+
+    module Valid
+        OFFSET = 0
+        NUMBITS = 1
+
+        FALSE = 0
+        TRUE = 1
+    end
+
+    attr_bitfield(:uxn, UXN::OFFSET, UXN::NUMBITS)
+    attr_bitfield(:pxn, PXN::OFFSET, PXN::NUMBITS)
+    attr_bitfield(:__output_addr, OutputAddr::OFFSET, OutputAddr::NUMBITS)
+    attr_bitfield(:af, AF::OFFSET, AF::NUMBITS)
+    attr_bitfield(:sh, SH::OFFSET, SH::NUMBITS)
+    attr_bitfield(:ap, AP::OFFSET, AP::NUMBITS)
+    attr_bitfield(:attr_indx, AttrIndx::OFFSET, AttrIndx::NUMBITS)
+    attr_bitfield(:type, Type::OFFSET, Type::NUMBITS)
+    attr_bitfield(:valid, Valid::OFFSET, Valid::NUMBITS)
+
+    def output_addr=(addr)
+        addr = addr >> Granule64KiB::SHIFT
+
+        self.__output_addr = addr
+    end
+
+    private :__output_addr=
+end
+
+# Translation table representing the structure defined in translation_table.rs.
+class TranslationTable
+    module MAIR
+        NORMAL = 1
+    end
+
+    def initialize
+        do_sanity_checks
+
+        num_lvl2_tables = BSP.kernel_virt_addr_space_size >> Granule512MiB::SHIFT
+
+        @lvl3 = new_lvl3(num_lvl2_tables, BSP.phys_addr_of_kernel_tables)
+
+        @lvl2_phys_start_addr = @lvl3.phys_start_addr + @lvl3.size_in_byte
+        @lvl2 = new_lvl2(num_lvl2_tables, @lvl2_phys_start_addr)
+
+        populate_lvl2_entries
+    end
+
+    def map_at(virt_region, phys_region, attributes)
+        return if virt_region.empty?
+
+        raise if virt_region.size != phys_region.size
+        raise if phys_region.last > BSP.phys_addr_space_end_page
+
+        virt_region.zip(phys_region).each do |virt_page, phys_page|
+            desc = page_descriptor_from(virt_page)
+            set_lvl3_entry(desc, phys_page, attributes)
+        end
+    end
+
+    def to_binary
+        data = @lvl3.flatten.map(&:to_i) + @lvl2.map(&:to_i)
+        data.pack('Q<*') # "Q" == uint64_t, "<" == little endian
+    end
+
+    def phys_tables_base_addr_binary
+        [@lvl2_phys_start_addr].pack('Q<*') # "Q" == uint64_t, "<" == little endian
+    end
+
+    def phys_tables_base_addr
+        @lvl2_phys_start_addr
+    end
+
+    private
+
+    def do_sanity_checks
+        raise unless BSP.kernel_granule::SIZE == Granule64KiB::SIZE
+        raise unless (BSP.kernel_virt_addr_space_size % Granule512MiB::SIZE).zero?
+    end
+
+    def new_lvl3(num_lvl2_tables, start_addr)
+        CArray.new(start_addr, num_lvl2_tables) do
+            temp = CArray.new(start_addr, 8192) do
+                Stage1PageDescriptor.new
+            end
+            start_addr += temp.size_in_byte
+
+            temp
+        end
+    end
+
+    def new_lvl2(num_lvl2_tables, start_addr)
+        CArray.new(start_addr, num_lvl2_tables) do
+            Stage1TableDescriptor.new
+        end
+    end
+
+    def populate_lvl2_entries
+        @lvl2.each_with_index do |descriptor, i|
+            descriptor.next_level_table_addr = @lvl3[i].phys_start_addr
+            descriptor.type = Stage1TableDescriptor::Type::TABLE
+            descriptor.valid = Stage1TableDescriptor::Valid::TRUE
+        end
+    end
+
+    def lvl2_lvl3_index_from(addr)
+        addr -= BSP.kernel_virt_start_addr
+
+        lvl2_index = addr >> Granule512MiB::SHIFT
+        lvl3_index = (addr & Granule512MiB::MASK) >> Granule64KiB::SHIFT
+
+        raise unless lvl2_index < @lvl2.size
+
+        [lvl2_index, lvl3_index]
+    end
+
+    def page_descriptor_from(virt_addr)
+        lvl2_index, lvl3_index = lvl2_lvl3_index_from(virt_addr)
+
+        @lvl3[lvl2_index][lvl3_index]
+    end
+
+    # rubocop:disable Metrics/MethodLength
+    def set_attributes(desc, attributes)
+        case attributes.mem_attributes
+        when :CacheableDRAM
+            desc.sh = Stage1PageDescriptor::SH::INNER_SHAREABLE
+            desc.attr_indx = MAIR::NORMAL
+        else
+            raise 'Invalid input'
+        end
+
+        desc.ap = case attributes.acc_perms
+                  when :ReadOnly
+                      Stage1PageDescriptor::AP::RO_EL1
+                  when :ReadWrite
+                      Stage1PageDescriptor::AP::RW_EL1
+                  else
+                      raise 'Invalid input'
+
+                  end
+
+        desc.pxn = if attributes.execute_never
+                       Stage1PageDescriptor::PXN::TRUE
+                   else
+                       Stage1PageDescriptor::PXN::FALSE
+                   end
+
+        desc.uxn = Stage1PageDescriptor::UXN::TRUE
+    end
+    # rubocop:enable Metrics/MethodLength
+
+    def set_lvl3_entry(desc, output_addr, attributes)
+        desc.output_addr = output_addr
+        desc.af = Stage1PageDescriptor::AF::TRUE
+        desc.type = Stage1PageDescriptor::Type::PAGE
+        desc.valid = Stage1PageDescriptor::Valid::TRUE
+
+        set_attributes(desc, attributes)
+    end
+end
+end
+end
diff --git a/17_kernel_symbols/tools/translation_table_tool/bsp.rb b/17_kernel_symbols/tools/translation_table_tool/bsp.rb
new file mode 100644
index 000000000..536a2f21d
--- /dev/null
+++ b/17_kernel_symbols/tools/translation_table_tool/bsp.rb
@@ -0,0 +1,50 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+# Raspberry Pi 3 + 4
+class RaspberryPi
+    attr_reader :kernel_granule, :kernel_virt_addr_space_size, :kernel_virt_start_addr
+
+    MEMORY_SRC = File.read('kernel/src/bsp/raspberrypi/memory.rs').split("\n")
+
+    def initialize
+        @kernel_granule = Granule64KiB
+
+        @kernel_virt_addr_space_size = KERNEL_ELF.symbol_value('__kernel_virt_addr_space_size')
+        @kernel_virt_start_addr = KERNEL_ELF.symbol_value('__kernel_virt_start_addr')
+
+        @virt_addr_of_kernel_tables = KERNEL_ELF.symbol_value('KERNEL_TABLES')
+        @virt_addr_of_phys_kernel_tables_base_addr = KERNEL_ELF.symbol_value(
+            'PHYS_KERNEL_TABLES_BASE_ADDR'
+        )
+    end
+
+    def phys_addr_of_kernel_tables
+        KERNEL_ELF.virt_to_phys(@virt_addr_of_kernel_tables)
+    end
+
+    def kernel_tables_offset_in_file
+        KERNEL_ELF.virt_addr_to_file_offset(@virt_addr_of_kernel_tables)
+    end
+
+    def phys_kernel_tables_base_addr_offset_in_file
+        KERNEL_ELF.virt_addr_to_file_offset(@virt_addr_of_phys_kernel_tables_base_addr)
+    end
+
+    def phys_addr_space_end_page
+        x = MEMORY_SRC.grep(/pub const END/)
+        x = case BSP_TYPE
+            when :rpi3
+                x[0]
+            when :rpi4
+                x[1]
+            else
+                raise
+            end
+
+        x.scan(/\d+/).join.to_i(16)
+    end
+end
diff --git a/17_kernel_symbols/tools/translation_table_tool/generic.rb b/17_kernel_symbols/tools/translation_table_tool/generic.rb
new file mode 100644
index 000000000..13df06588
--- /dev/null
+++ b/17_kernel_symbols/tools/translation_table_tool/generic.rb
@@ -0,0 +1,179 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+module Granule64KiB
+    SIZE = 64 * 1024
+    SHIFT = Math.log2(SIZE).to_i
+end
+
+module Granule512MiB
+    SIZE = 512 * 1024 * 1024
+    SHIFT = Math.log2(SIZE).to_i
+    MASK = SIZE - 1
+end
+
+# Monkey-patch Integer with some helper functions.
+class Integer
+    def power_of_two?
+        self[0].zero?
+    end
+
+    def aligned?(alignment)
+        raise unless alignment.power_of_two?
+
+        (self & (alignment - 1)).zero?
+    end
+
+    def align_up(alignment)
+        raise unless alignment.power_of_two?
+
+        (self + alignment - 1) & ~(alignment - 1)
+    end
+
+    def to_hex_underscore(with_leading_zeros: false)
+        fmt = with_leading_zeros ? '%016x' : '%x'
+        value = format(fmt, self).to_s.reverse.scan(/.{4}|.+/).join('_').reverse
+
+        format('0x%s', value)
+    end
+end
+
+# An array where each value is the start address of a Page.
+class MemoryRegion < Array
+    def initialize(start_addr, size, granule_size)
+        raise unless start_addr.aligned?(granule_size)
+        raise unless size.positive?
+        raise unless (size % granule_size).zero?
+
+        num_pages = size / granule_size
+        super(num_pages) do |i|
+            (i * granule_size) + start_addr
+        end
+    end
+end
+
+# Collection of memory attributes.
+class AttributeFields
+    attr_reader :mem_attributes, :acc_perms, :execute_never
+
+    def initialize(mem_attributes, acc_perms, execute_never)
+        @mem_attributes = mem_attributes
+        @acc_perms = acc_perms
+        @execute_never = execute_never
+    end
+
+    def to_s
+        x = case @mem_attributes
+            when :CacheableDRAM
+                'C'
+            else
+                '?'
+            end
+
+        y = case @acc_perms
+            when :ReadWrite
+                'RW'
+            when :ReadOnly
+                'RO'
+            else
+                '??'
+            end
+
+        z = @execute_never ? 'XN' : 'X '
+
+        "#{x} #{y} #{z}"
+    end
+end
+
+# A container that describes a virt-to-phys region mapping.
+class MappingDescriptor
+    @max_section_name_length = 'Sections'.length
+
+    class << self
+        attr_accessor :max_section_name_length
+
+        def update_max_section_name_length(length)
+            @max_section_name_length = [@max_section_name_length, length].max
+        end
+    end
+
+    attr_reader :name, :virt_region, :phys_region, :attributes
+
+    def initialize(name, virt_region, phys_region, attributes)
+        @name = name
+        @virt_region = virt_region
+        @phys_region = phys_region
+        @attributes = attributes
+    end
+
+    def to_s
+        name = @name.ljust(self.class.max_section_name_length)
+        virt_start = @virt_region.first.to_hex_underscore(with_leading_zeros: true)
+        phys_start = @phys_region.first.to_hex_underscore(with_leading_zeros: true)
+        size = ((@virt_region.size * 65_536) / 1024).to_s.rjust(3)
+
+        "#{name} | #{virt_start} | #{phys_start} | #{size} KiB | #{@attributes}"
+    end
+
+    def self.print_divider
+        print '             '
+        print '-' * max_section_name_length
+        puts '--------------------------------------------------------------------'
+    end
+
+    def self.print_header
+        print_divider
+        print '             '
+        print 'Sections'.center(max_section_name_length)
+        print '   '
+        print 'Virt Start Addr'.center(21)
+        print '   '
+        print 'Phys Start Addr'.center(21)
+        print '   '
+        print 'Size'.center(7)
+        print '   '
+        print 'Attr'.center(7)
+        puts
+        print_divider
+    end
+end
+
+def kernel_map_binary
+    mapping_descriptors = KERNEL_ELF.generate_mapping_descriptors
+
+    # Generate_mapping_descriptors updates the header being printed with this call. So it must come
+    # afterwards.
+    MappingDescriptor.print_header
+
+    mapping_descriptors.each do |i|
+        print 'Generating'.rjust(12).green.bold
+        print ' '
+        puts i.to_s
+
+        TRANSLATION_TABLES.map_at(i.virt_region, i.phys_region, i.attributes)
+    end
+
+    MappingDescriptor.print_divider
+end
+
+def kernel_patch_tables(kernel_elf_path)
+    print 'Patching'.rjust(12).green.bold
+    print ' Kernel table struct at ELF file offset '
+    puts BSP.kernel_tables_offset_in_file.to_hex_underscore
+
+    File.binwrite(kernel_elf_path, TRANSLATION_TABLES.to_binary, BSP.kernel_tables_offset_in_file)
+end
+
+def kernel_patch_base_addr(kernel_elf_path)
+    print 'Patching'.rjust(12).green.bold
+    print ' Kernel tables physical base address start argument to value '
+    print TRANSLATION_TABLES.phys_tables_base_addr.to_hex_underscore
+    print ' at ELF file offset '
+    puts BSP.phys_kernel_tables_base_addr_offset_in_file.to_hex_underscore
+
+    File.binwrite(kernel_elf_path, TRANSLATION_TABLES.phys_tables_base_addr_binary,
+                  BSP.phys_kernel_tables_base_addr_offset_in_file)
+end
diff --git a/17_kernel_symbols/tools/translation_table_tool/kernel_elf.rb b/17_kernel_symbols/tools/translation_table_tool/kernel_elf.rb
new file mode 100644
index 000000000..f2d5b0b72
--- /dev/null
+++ b/17_kernel_symbols/tools/translation_table_tool/kernel_elf.rb
@@ -0,0 +1,96 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+# KernelELF
+class KernelELF
+    SECTION_FLAG_ALLOC = 2
+
+    def initialize(kernel_elf_path)
+        @elf = ELFTools::ELFFile.new(File.open(kernel_elf_path))
+        @symtab_section = @elf.section_by_name('.symtab')
+    end
+
+    def machine
+        @elf.machine.to_sym
+    end
+
+    def symbol_value(symbol_name)
+        @symtab_section.symbol_by_name(symbol_name).header.st_value
+    end
+
+    def segment_containing_virt_addr(virt_addr)
+        @elf.each_segments do |segment|
+            return segment if segment.vma_in?(virt_addr)
+        end
+    end
+
+    def virt_to_phys(virt_addr)
+        segment = segment_containing_virt_addr(virt_addr)
+        translation_offset = segment.header.p_vaddr - segment.header.p_paddr
+
+        virt_addr - translation_offset
+    end
+
+    def virt_addr_to_file_offset(virt_addr)
+        segment = segment_containing_virt_addr(virt_addr)
+        segment.vma_to_offset(virt_addr)
+    end
+
+    def sections_in_segment(segment)
+        head = segment.mem_head
+        tail = segment.mem_tail
+
+        sections = @elf.each_sections.select do |section|
+            file_offset = section.header.sh_addr
+            flags = section.header.sh_flags
+
+            file_offset >= head && file_offset < tail && (flags & SECTION_FLAG_ALLOC != 0)
+        end
+
+        sections.map(&:name).join(' ')
+    end
+
+    def select_load_segments
+        @elf.each_segments.select do |segment|
+            segment.instance_of?(ELFTools::Segments::LoadSegment)
+        end
+    end
+
+    def segment_get_acc_perms(segment)
+        if segment.readable? && segment.writable?
+            :ReadWrite
+        elsif segment.readable?
+            :ReadOnly
+        else
+            :Invalid
+        end
+    end
+
+    def update_max_section_name_length(descriptors)
+        MappingDescriptor.update_max_section_name_length(descriptors.map { |i| i.name.size }.max)
+    end
+
+    def generate_mapping_descriptors
+        descriptors = select_load_segments.map do |segment|
+            # Assume each segment is page aligned.
+            size = segment.mem_size.align_up(BSP.kernel_granule::SIZE)
+            virt_start_addr = segment.header.p_vaddr
+            phys_start_addr = segment.header.p_paddr
+            acc_perms = segment_get_acc_perms(segment)
+            execute_never = !segment.executable?
+            section_names = sections_in_segment(segment)
+
+            virt_region = MemoryRegion.new(virt_start_addr, size, BSP.kernel_granule::SIZE)
+            phys_region = MemoryRegion.new(phys_start_addr, size, BSP.kernel_granule::SIZE)
+            attributes = AttributeFields.new(:CacheableDRAM, acc_perms, execute_never)
+
+            MappingDescriptor.new(section_names, virt_region, phys_region, attributes)
+        end
+
+        update_max_section_name_length(descriptors)
+        descriptors
+    end
+end
diff --git a/17_kernel_symbols/tools/translation_table_tool/main.rb b/17_kernel_symbols/tools/translation_table_tool/main.rb
new file mode 100755
index 000000000..6419e364e
--- /dev/null
+++ b/17_kernel_symbols/tools/translation_table_tool/main.rb
@@ -0,0 +1,46 @@
+#!/usr/bin/env ruby
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+require 'rubygems'
+require 'bundler/setup'
+require 'colorize'
+require 'elftools'
+
+require_relative 'generic'
+require_relative 'kernel_elf'
+require_relative 'bsp'
+require_relative 'arch'
+
+BSP_TYPE = ARGV[0].to_sym
+kernel_elf_path = ARGV[1]
+
+start = Time.now
+
+KERNEL_ELF = KernelELF.new(kernel_elf_path)
+
+BSP = case BSP_TYPE
+      when :rpi3, :rpi4
+          RaspberryPi.new
+      else
+          raise
+      end
+
+TRANSLATION_TABLES = case KERNEL_ELF.machine
+                     when :AArch64
+                         Arch::ARMv8::TranslationTable.new
+                     else
+                         raise
+                     end
+
+kernel_map_binary
+kernel_patch_tables(kernel_elf_path)
+kernel_patch_base_addr(kernel_elf_path)
+
+elapsed = Time.now - start
+
+print 'Finished'.rjust(12).green.bold
+puts " in #{elapsed.round(2)}s"

From 73003ce8e6ec0a20e72eb9d8b51c6b947d67d9a1 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 25 Apr 2022 23:37:21 +0200
Subject: [PATCH 147/214] Actions: Add rustfilt and other fixes

---
 .github/workflows/build_rpi3.yml       | 2 +-
 .github/workflows/build_rpi4.yml       | 2 +-
 .github/workflows/test_integration.yml | 2 +-
 .github/workflows/test_unit.yml        | 2 +-
 .github/workflows/test_xtra.yml        | 2 +-
 utils/devtool.rb                       | 1 +
 6 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/.github/workflows/build_rpi3.yml b/.github/workflows/build_rpi3.yml
index d6dcfa3f5..d974eebf2 100644
--- a/.github/workflows/build_rpi3.yml
+++ b/.github/workflows/build_rpi3.yml
@@ -29,7 +29,7 @@ jobs:
         uses: ruby/setup-ruby@v1
       - name: Set up Rust nightly
         run: |
-          cargo install cargo-binutils
+          cargo install cargo-binutils rustfilt
       - name: Set up Ruby
         run: |
           gem install bundler
diff --git a/.github/workflows/build_rpi4.yml b/.github/workflows/build_rpi4.yml
index de47cc83d..68de1dc1e 100644
--- a/.github/workflows/build_rpi4.yml
+++ b/.github/workflows/build_rpi4.yml
@@ -29,7 +29,7 @@ jobs:
         uses: ruby/setup-ruby@v1
       - name: Set up Rust nightly
         run: |
-          cargo install cargo-binutils
+          cargo install cargo-binutils rustfilt
       - name: Set up Ruby
         run: |
           gem install bundler
diff --git a/.github/workflows/test_integration.yml b/.github/workflows/test_integration.yml
index 8c18c0a0d..954d64328 100644
--- a/.github/workflows/test_integration.yml
+++ b/.github/workflows/test_integration.yml
@@ -29,7 +29,7 @@ jobs:
         uses: ruby/setup-ruby@v1
       - name: Set up Rust nightly
         run: |
-          cargo install cargo-binutils
+          cargo install cargo-binutils rustfilt
       - name: Set up Ruby
         run: |
           gem install bundler
diff --git a/.github/workflows/test_unit.yml b/.github/workflows/test_unit.yml
index 624cf16d1..c9a888929 100644
--- a/.github/workflows/test_unit.yml
+++ b/.github/workflows/test_unit.yml
@@ -29,7 +29,7 @@ jobs:
         uses: ruby/setup-ruby@v1
       - name: Set up Rust nightly
         run: |
-          cargo install cargo-binutils
+          cargo install cargo-binutils rustfilt
       - name: Set up Ruby
         run: |
           gem install bundler
diff --git a/.github/workflows/test_xtra.yml b/.github/workflows/test_xtra.yml
index 97fa20817..a330ef74c 100644
--- a/.github/workflows/test_xtra.yml
+++ b/.github/workflows/test_xtra.yml
@@ -37,4 +37,4 @@ jobs:
           bundle install --retry 3
       - name: Make all
         run: |
-          bundle exec ruby utils/devtool.rb test_xtra
+          bundle exec ruby utils/devtool.rb make_xtra
diff --git a/utils/devtool.rb b/utils/devtool.rb
index 7c02e9bab..00417125b 100755
--- a/utils/devtool.rb
+++ b/utils/devtool.rb
@@ -343,4 +343,5 @@ def copyright_source_files
     puts
     puts 'Commands:'
     commands.each { |m| puts "  #{m}" }
+    exit(1)
 end

From 55499d0c61945d430dd2efebd11f847dcf08e9ae Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 25 Apr 2022 23:52:13 +0200
Subject: [PATCH 148/214] Actions: Add boot tests

---
 .github/workflows/test_unit.yml | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/.github/workflows/test_unit.yml b/.github/workflows/test_unit.yml
index c9a888929..02de1b843 100644
--- a/.github/workflows/test_unit.yml
+++ b/.github/workflows/test_unit.yml
@@ -1,4 +1,4 @@
-name: Unit-Tests
+name: Boot-and-Unit-Tests
 
 on:
   push:
@@ -20,7 +20,7 @@ on:
 
 jobs:
   build:
-    name: Run unit tests
+    name: Run boot and unit tests
     runs-on: ubuntu-20.04
 
     steps:
@@ -37,4 +37,5 @@ jobs:
           bundle install --retry 3
       - name: Make all
         run: |
+          bundle exec ruby utils/devtool.rb test_boot
           bundle exec ruby utils/devtool.rb test_unit

From 66c68e3eb9480ac94f1eb714ba91df8d8db31e6c Mon Sep 17 00:00:00 2001
From: paulnice <ru.pchel@gmail.com>
Date: Mon, 25 Apr 2022 23:18:22 -0700
Subject: [PATCH 149/214] Fix a typo

---
 04_safe_globals/README.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/04_safe_globals/README.md b/04_safe_globals/README.md
index b42be6421..bfb2b4faf 100644
--- a/04_safe_globals/README.md
+++ b/04_safe_globals/README.md
@@ -177,7 +177,7 @@ diff -uNr 03_hacky_hello_world/src/bsp/raspberrypi/console.rs 04_safe_globals/sr
 +/// serialize access.
 +impl console::interface::Write for QEMUOutput {
 +    fn write_fmt(&self, args: core::fmt::Arguments) -> fmt::Result {
-+        // Fully qualified syntax for the call to `core::fmt::Write::write:fmt()` to increase
++        // Fully qualified syntax for the call to `core::fmt::Write::write_fmt()` to increase
 +        // readability.
 +        self.inner.lock(|inner| fmt::Write::write_fmt(inner, args))
 +    }

From 9250099090c6028bb9f8bf43343330095e84ca3a Mon Sep 17 00:00:00 2001
From: Pavel Shirshov <pavel.shirshov@gmail.com>
Date: Mon, 25 Apr 2022 23:54:32 -0700
Subject: [PATCH 150/214] Fix even more typos s/write:fmt/write_fmt/

---
 04_safe_globals/src/bsp/raspberrypi/console.rs                | 2 +-
 05_drivers_gpio_uart/README.md                                | 4 ++--
 .../src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs           | 2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs           | 2 +-
 07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs | 2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs           | 2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs           | 2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs           | 2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs           | 2 +-
 .../kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs    | 2 +-
 .../kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs    | 2 +-
 .../kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs    | 2 +-
 .../kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs    | 2 +-
 .../kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs    | 2 +-
 .../kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs    | 2 +-
 X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs  | 2 +-
 16 files changed, 17 insertions(+), 17 deletions(-)

diff --git a/04_safe_globals/src/bsp/raspberrypi/console.rs b/04_safe_globals/src/bsp/raspberrypi/console.rs
index f471cebb9..774dbadbc 100644
--- a/04_safe_globals/src/bsp/raspberrypi/console.rs
+++ b/04_safe_globals/src/bsp/raspberrypi/console.rs
@@ -103,7 +103,7 @@ use synchronization::interface::Mutex;
 /// serialize access.
 impl console::interface::Write for QEMUOutput {
     fn write_fmt(&self, args: core::fmt::Arguments) -> fmt::Result {
-        // Fully qualified syntax for the call to `core::fmt::Write::write:fmt()` to increase
+        // Fully qualified syntax for the call to `core::fmt::Write::write_fmt()` to increase
         // readability.
         self.inner.lock(|inner| fmt::Write::write_fmt(inner, args))
     }
diff --git a/05_drivers_gpio_uart/README.md b/05_drivers_gpio_uart/README.md
index ccd4575e9..3b6f38f34 100644
--- a/05_drivers_gpio_uart/README.md
+++ b/05_drivers_gpio_uart/README.md
@@ -831,7 +831,7 @@ diff -uNr 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 05_dri
 +    }
 +
 +    fn write_fmt(&self, args: core::fmt::Arguments) -> fmt::Result {
-+        // Fully qualified syntax for the call to `core::fmt::Write::write:fmt()` to increase
++        // Fully qualified syntax for the call to `core::fmt::Write::write_fmt()` to increase
 +        // readability.
 +        self.inner.lock(|inner| fmt::Write::write_fmt(inner, args))
 +    }
@@ -1067,7 +1067,7 @@ diff -uNr 04_safe_globals/src/bsp/raspberrypi/console.rs 05_drivers_gpio_uart/sr
 -/// serialize access.
 -impl console::interface::Write for QEMUOutput {
 -    fn write_fmt(&self, args: core::fmt::Arguments) -> fmt::Result {
--        // Fully qualified syntax for the call to `core::fmt::Write::write:fmt()` to increase
+-        // Fully qualified syntax for the call to `core::fmt::Write::write_fmt()` to increase
 -        // readability.
 -        self.inner.lock(|inner| fmt::Write::write_fmt(inner, args))
 -    }
diff --git a/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 878ea567f..85cd31549 100644
--- a/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -364,7 +364,7 @@ impl console::interface::Write for PL011Uart {
     }
 
     fn write_fmt(&self, args: core::fmt::Arguments) -> fmt::Result {
-        // Fully qualified syntax for the call to `core::fmt::Write::write:fmt()` to increase
+        // Fully qualified syntax for the call to `core::fmt::Write::write_fmt()` to increase
         // readability.
         self.inner.lock(|inner| fmt::Write::write_fmt(inner, args))
     }
diff --git a/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index e6b4a952e..7d66484b7 100644
--- a/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -359,7 +359,7 @@ impl console::interface::Write for PL011Uart {
     }
 
     fn write_fmt(&self, args: core::fmt::Arguments) -> fmt::Result {
-        // Fully qualified syntax for the call to `core::fmt::Write::write:fmt()` to increase
+        // Fully qualified syntax for the call to `core::fmt::Write::write_fmt()` to increase
         // readability.
         self.inner.lock(|inner| fmt::Write::write_fmt(inner, args))
     }
diff --git a/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 878ea567f..85cd31549 100644
--- a/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -364,7 +364,7 @@ impl console::interface::Write for PL011Uart {
     }
 
     fn write_fmt(&self, args: core::fmt::Arguments) -> fmt::Result {
-        // Fully qualified syntax for the call to `core::fmt::Write::write:fmt()` to increase
+        // Fully qualified syntax for the call to `core::fmt::Write::write_fmt()` to increase
         // readability.
         self.inner.lock(|inner| fmt::Write::write_fmt(inner, args))
     }
diff --git a/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 878ea567f..85cd31549 100644
--- a/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -364,7 +364,7 @@ impl console::interface::Write for PL011Uart {
     }
 
     fn write_fmt(&self, args: core::fmt::Arguments) -> fmt::Result {
-        // Fully qualified syntax for the call to `core::fmt::Write::write:fmt()` to increase
+        // Fully qualified syntax for the call to `core::fmt::Write::write_fmt()` to increase
         // readability.
         self.inner.lock(|inner| fmt::Write::write_fmt(inner, args))
     }
diff --git a/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 878ea567f..85cd31549 100644
--- a/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -364,7 +364,7 @@ impl console::interface::Write for PL011Uart {
     }
 
     fn write_fmt(&self, args: core::fmt::Arguments) -> fmt::Result {
-        // Fully qualified syntax for the call to `core::fmt::Write::write:fmt()` to increase
+        // Fully qualified syntax for the call to `core::fmt::Write::write_fmt()` to increase
         // readability.
         self.inner.lock(|inner| fmt::Write::write_fmt(inner, args))
     }
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 878ea567f..85cd31549 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -364,7 +364,7 @@ impl console::interface::Write for PL011Uart {
     }
 
     fn write_fmt(&self, args: core::fmt::Arguments) -> fmt::Result {
-        // Fully qualified syntax for the call to `core::fmt::Write::write:fmt()` to increase
+        // Fully qualified syntax for the call to `core::fmt::Write::write_fmt()` to increase
         // readability.
         self.inner.lock(|inner| fmt::Write::write_fmt(inner, args))
     }
diff --git a/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 878ea567f..85cd31549 100644
--- a/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -364,7 +364,7 @@ impl console::interface::Write for PL011Uart {
     }
 
     fn write_fmt(&self, args: core::fmt::Arguments) -> fmt::Result {
-        // Fully qualified syntax for the call to `core::fmt::Write::write:fmt()` to increase
+        // Fully qualified syntax for the call to `core::fmt::Write::write_fmt()` to increase
         // readability.
         self.inner.lock(|inner| fmt::Write::write_fmt(inner, args))
     }
diff --git a/12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 878ea567f..85cd31549 100644
--- a/12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -364,7 +364,7 @@ impl console::interface::Write for PL011Uart {
     }
 
     fn write_fmt(&self, args: core::fmt::Arguments) -> fmt::Result {
-        // Fully qualified syntax for the call to `core::fmt::Write::write:fmt()` to increase
+        // Fully qualified syntax for the call to `core::fmt::Write::write_fmt()` to increase
         // readability.
         self.inner.lock(|inner| fmt::Write::write_fmt(inner, args))
     }
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index af573fd09..4d000ad50 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -441,7 +441,7 @@ impl console::interface::Write for PL011Uart {
     }
 
     fn write_fmt(&self, args: core::fmt::Arguments) -> fmt::Result {
-        // Fully qualified syntax for the call to `core::fmt::Write::write:fmt()` to increase
+        // Fully qualified syntax for the call to `core::fmt::Write::write_fmt()` to increase
         // readability.
         self.inner.lock(|inner| fmt::Write::write_fmt(inner, args))
     }
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 23c09a7f2..3133047b1 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -477,7 +477,7 @@ impl console::interface::Write for PL011Uart {
     }
 
     fn write_fmt(&self, args: core::fmt::Arguments) -> fmt::Result {
-        // Fully qualified syntax for the call to `core::fmt::Write::write:fmt()` to increase
+        // Fully qualified syntax for the call to `core::fmt::Write::write_fmt()` to increase
         // readability.
         self.inner.lock(|inner| fmt::Write::write_fmt(inner, args))
     }
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 23c09a7f2..3133047b1 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -477,7 +477,7 @@ impl console::interface::Write for PL011Uart {
     }
 
     fn write_fmt(&self, args: core::fmt::Arguments) -> fmt::Result {
-        // Fully qualified syntax for the call to `core::fmt::Write::write:fmt()` to increase
+        // Fully qualified syntax for the call to `core::fmt::Write::write_fmt()` to increase
         // readability.
         self.inner.lock(|inner| fmt::Write::write_fmt(inner, args))
     }
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 23c09a7f2..3133047b1 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -477,7 +477,7 @@ impl console::interface::Write for PL011Uart {
     }
 
     fn write_fmt(&self, args: core::fmt::Arguments) -> fmt::Result {
-        // Fully qualified syntax for the call to `core::fmt::Write::write:fmt()` to increase
+        // Fully qualified syntax for the call to `core::fmt::Write::write_fmt()` to increase
         // readability.
         self.inner.lock(|inner| fmt::Write::write_fmt(inner, args))
     }
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 23c09a7f2..3133047b1 100644
--- a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -477,7 +477,7 @@ impl console::interface::Write for PL011Uart {
     }
 
     fn write_fmt(&self, args: core::fmt::Arguments) -> fmt::Result {
-        // Fully qualified syntax for the call to `core::fmt::Write::write:fmt()` to increase
+        // Fully qualified syntax for the call to `core::fmt::Write::write_fmt()` to increase
         // readability.
         self.inner.lock(|inner| fmt::Write::write_fmt(inner, args))
     }
diff --git a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 878ea567f..85cd31549 100644
--- a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -364,7 +364,7 @@ impl console::interface::Write for PL011Uart {
     }
 
     fn write_fmt(&self, args: core::fmt::Arguments) -> fmt::Result {
-        // Fully qualified syntax for the call to `core::fmt::Write::write:fmt()` to increase
+        // Fully qualified syntax for the call to `core::fmt::Write::write_fmt()` to increase
         // readability.
         self.inner.lock(|inner| fmt::Write::write_fmt(inner, args))
     }

From f4f02da28ed34fa679cfb2efa2bb3ea0c89b2507 Mon Sep 17 00:00:00 2001
From: Bryan Lee <doslby@gmail.com>
Date: Wed, 27 Apr 2022 01:13:00 +0800
Subject: [PATCH 151/214] chore: replace `git.io` link with the original URL

---
 .github/workflows/sanity.yml                               | 2 +-
 01_wait_forever/src/main.rs                                | 2 +-
 02_runtime_init/src/main.rs                                | 2 +-
 03_hacky_hello_world/src/main.rs                           | 2 +-
 04_safe_globals/src/main.rs                                | 2 +-
 05_drivers_gpio_uart/src/main.rs                           | 2 +-
 06_uart_chainloader/src/main.rs                            | 2 +-
 07_timestamps/src/main.rs                                  | 2 +-
 08_hw_debug_JTAG/src/main.rs                               | 2 +-
 09_privilege_level/src/main.rs                             | 2 +-
 10_virtual_mem_part1_identity_mapping/src/main.rs          | 2 +-
 11_exceptions_part1_groundwork/src/main.rs                 | 2 +-
 12_integrated_testing/kernel/src/lib.rs                    | 2 +-
 12_integrated_testing/kernel/src/main.rs                   | 2 +-
 13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs      | 2 +-
 13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs     | 2 +-
 14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs          | 2 +-
 14_virtual_mem_part2_mmio_remap/kernel/src/main.rs         | 2 +-
 15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs  | 2 +-
 15_virtual_mem_part3_precomputed_tables/kernel/src/main.rs | 2 +-
 16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs  | 2 +-
 16_virtual_mem_part4_higher_half_kernel/kernel/src/main.rs | 2 +-
 17_kernel_symbols/kernel/src/lib.rs                        | 2 +-
 17_kernel_symbols/kernel/src/main.rs                       | 2 +-
 X1_JTAG_boot/src/main.rs                                   | 2 +-
 contributor_setup.sh                                       | 2 +-
 26 files changed, 26 insertions(+), 26 deletions(-)

diff --git a/.github/workflows/sanity.yml b/.github/workflows/sanity.yml
index 4f0589928..a42198d74 100644
--- a/.github/workflows/sanity.yml
+++ b/.github/workflows/sanity.yml
@@ -34,7 +34,7 @@ jobs:
           npm install prettier
       - name: Setup misspell
         run: |
-          curl -L -o ./install-misspell.sh https://git.io/misspell
+          curl -L -o ./install-misspell.sh https://raw.githubusercontent.com/client9/misspell/master/install-misspell.sh
           sh ./install-misspell.sh -b .vendor
       - name: Run checks
         run: |
diff --git a/01_wait_forever/src/main.rs b/01_wait_forever/src/main.rs
index 4f405becc..30dd45e73 100644
--- a/01_wait_forever/src/main.rs
+++ b/01_wait_forever/src/main.rs
@@ -3,7 +3,7 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://git.io/JeGIp")]
+#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
 
 //! The `kernel` binary.
 //!
diff --git a/02_runtime_init/src/main.rs b/02_runtime_init/src/main.rs
index 398c4a042..6b3b1efda 100644
--- a/02_runtime_init/src/main.rs
+++ b/02_runtime_init/src/main.rs
@@ -3,7 +3,7 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://git.io/JeGIp")]
+#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
 
 //! The `kernel` binary.
 //!
diff --git a/03_hacky_hello_world/src/main.rs b/03_hacky_hello_world/src/main.rs
index da4501393..ee9afd2a0 100644
--- a/03_hacky_hello_world/src/main.rs
+++ b/03_hacky_hello_world/src/main.rs
@@ -3,7 +3,7 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://git.io/JeGIp")]
+#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
 
 //! The `kernel` binary.
 //!
diff --git a/04_safe_globals/src/main.rs b/04_safe_globals/src/main.rs
index 450ae1ff5..422dcf91f 100644
--- a/04_safe_globals/src/main.rs
+++ b/04_safe_globals/src/main.rs
@@ -3,7 +3,7 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://git.io/JeGIp")]
+#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
 
 //! The `kernel` binary.
 //!
diff --git a/05_drivers_gpio_uart/src/main.rs b/05_drivers_gpio_uart/src/main.rs
index 70e6b1168..241d9498c 100644
--- a/05_drivers_gpio_uart/src/main.rs
+++ b/05_drivers_gpio_uart/src/main.rs
@@ -3,7 +3,7 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://git.io/JeGIp")]
+#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
 
 //! The `kernel` binary.
 //!
diff --git a/06_uart_chainloader/src/main.rs b/06_uart_chainloader/src/main.rs
index 32a56bda7..79f8b0b3a 100644
--- a/06_uart_chainloader/src/main.rs
+++ b/06_uart_chainloader/src/main.rs
@@ -3,7 +3,7 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://git.io/JeGIp")]
+#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
 
 //! The `kernel` binary.
 //!
diff --git a/07_timestamps/src/main.rs b/07_timestamps/src/main.rs
index 3d4ace4fc..c067d90c3 100644
--- a/07_timestamps/src/main.rs
+++ b/07_timestamps/src/main.rs
@@ -3,7 +3,7 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://git.io/JeGIp")]
+#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
 
 //! The `kernel` binary.
 //!
diff --git a/08_hw_debug_JTAG/src/main.rs b/08_hw_debug_JTAG/src/main.rs
index 3d4ace4fc..c067d90c3 100644
--- a/08_hw_debug_JTAG/src/main.rs
+++ b/08_hw_debug_JTAG/src/main.rs
@@ -3,7 +3,7 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://git.io/JeGIp")]
+#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
 
 //! The `kernel` binary.
 //!
diff --git a/09_privilege_level/src/main.rs b/09_privilege_level/src/main.rs
index b44497341..45dba34c7 100644
--- a/09_privilege_level/src/main.rs
+++ b/09_privilege_level/src/main.rs
@@ -3,7 +3,7 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://git.io/JeGIp")]
+#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
 
 //! The `kernel` binary.
 //!
diff --git a/10_virtual_mem_part1_identity_mapping/src/main.rs b/10_virtual_mem_part1_identity_mapping/src/main.rs
index faa81ee86..148cdfff4 100644
--- a/10_virtual_mem_part1_identity_mapping/src/main.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/main.rs
@@ -3,7 +3,7 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://git.io/JeGIp")]
+#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
 
 //! The `kernel` binary.
 //!
diff --git a/11_exceptions_part1_groundwork/src/main.rs b/11_exceptions_part1_groundwork/src/main.rs
index 77ffd9cda..5534750a3 100644
--- a/11_exceptions_part1_groundwork/src/main.rs
+++ b/11_exceptions_part1_groundwork/src/main.rs
@@ -3,7 +3,7 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://git.io/JeGIp")]
+#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
 
 //! The `kernel` binary.
 //!
diff --git a/12_integrated_testing/kernel/src/lib.rs b/12_integrated_testing/kernel/src/lib.rs
index 51f10d7c1..1218e30e3 100644
--- a/12_integrated_testing/kernel/src/lib.rs
+++ b/12_integrated_testing/kernel/src/lib.rs
@@ -3,7 +3,7 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://git.io/JeGIp")]
+#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
 
 //! The `kernel` library.
 //!
diff --git a/12_integrated_testing/kernel/src/main.rs b/12_integrated_testing/kernel/src/main.rs
index 2c1bf9ac0..dfbc11662 100644
--- a/12_integrated_testing/kernel/src/main.rs
+++ b/12_integrated_testing/kernel/src/main.rs
@@ -3,7 +3,7 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://git.io/JeGIp")]
+#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
 
 //! The `kernel` binary.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
index 6133f01ad..9bd360c08 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
@@ -3,7 +3,7 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://git.io/JeGIp")]
+#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
 
 //! The `kernel` library.
 //!
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs
index 6729d45c9..228b984ba 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs
@@ -3,7 +3,7 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://git.io/JeGIp")]
+#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
 
 //! The `kernel` binary.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
index 9ed0941cc..2c874f18e 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
@@ -3,7 +3,7 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://git.io/JeGIp")]
+#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
 
 //! The `kernel` library.
 //!
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/main.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/main.rs
index b891492a8..68d34e358 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/main.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/main.rs
@@ -3,7 +3,7 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://git.io/JeGIp")]
+#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
 
 //! The `kernel` binary.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs
index 9ed0941cc..2c874f18e 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs
@@ -3,7 +3,7 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://git.io/JeGIp")]
+#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
 
 //! The `kernel` library.
 //!
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/main.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/main.rs
index 8bc808853..c0c188181 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/main.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/main.rs
@@ -3,7 +3,7 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://git.io/JeGIp")]
+#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
 
 //! The `kernel` binary.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
index 76cd3792f..5ecc3a71e 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
@@ -3,7 +3,7 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://git.io/JeGIp")]
+#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
 
 //! The `kernel` library.
 //!
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/main.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/main.rs
index 8bc808853..c0c188181 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/main.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/main.rs
@@ -3,7 +3,7 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://git.io/JeGIp")]
+#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
 
 //! The `kernel` binary.
 
diff --git a/17_kernel_symbols/kernel/src/lib.rs b/17_kernel_symbols/kernel/src/lib.rs
index 0178b2729..68f7e8742 100644
--- a/17_kernel_symbols/kernel/src/lib.rs
+++ b/17_kernel_symbols/kernel/src/lib.rs
@@ -3,7 +3,7 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://git.io/JeGIp")]
+#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
 
 //! The `kernel` library.
 //!
diff --git a/17_kernel_symbols/kernel/src/main.rs b/17_kernel_symbols/kernel/src/main.rs
index 8bc808853..c0c188181 100644
--- a/17_kernel_symbols/kernel/src/main.rs
+++ b/17_kernel_symbols/kernel/src/main.rs
@@ -3,7 +3,7 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://git.io/JeGIp")]
+#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
 
 //! The `kernel` binary.
 
diff --git a/X1_JTAG_boot/src/main.rs b/X1_JTAG_boot/src/main.rs
index 6e6cf9098..d2f9dbde3 100644
--- a/X1_JTAG_boot/src/main.rs
+++ b/X1_JTAG_boot/src/main.rs
@@ -3,7 +3,7 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://git.io/JeGIp")]
+#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
 
 //! The `kernel` binary.
 //!
diff --git a/contributor_setup.sh b/contributor_setup.sh
index 8bad881fe..8348b4d7d 100755
--- a/contributor_setup.sh
+++ b/contributor_setup.sh
@@ -31,6 +31,6 @@ then
     echo "'curl' could not be found. Please install it."
     exit
 fi
-curl -L -o ./install-misspell.sh https://git.io/misspell
+curl -L -o ./install-misspell.sh https://raw.githubusercontent.com/client9/misspell/master/install-misspell.sh
 sh ./install-misspell.sh -b .vendor
 rm install-misspell.sh

From 358bb729d90d33726b507d9900abf87793100f1b Mon Sep 17 00:00:00 2001
From: Andre Richter <andre-richter@users.noreply.github.com>
Date: Tue, 26 Apr 2022 20:12:22 +0200
Subject: [PATCH 152/214] Update pull_request_template.md

---
 .github/pull_request_template.md | 1 +
 1 file changed, 1 insertion(+)

diff --git a/.github/pull_request_template.md b/.github/pull_request_template.md
index 983399703..c0c34d898 100644
--- a/.github/pull_request_template.md
+++ b/.github/pull_request_template.md
@@ -10,4 +10,5 @@ Related Issue: <Insert link here if applicable>
      - Not needed if it is just a README change or similar.
  - [ ] Ran `./contributor_setup.sh` followed by `./devtool ready_for_publish`
      - You'll need `Ruby` with `Bundler` and `NPM` installed locally.
+     - If no Rust files were changed, `./devtool ready_for_publish_no_rust` can be used instead (faster).
      - This step is optional, but much appreciated if done.

From a0cfe170a54508dfdc1a21e5234cda9721ae557e Mon Sep 17 00:00:00 2001
From: Andre Richter <andre-richter@users.noreply.github.com>
Date: Tue, 26 Apr 2022 20:13:00 +0200
Subject: [PATCH 153/214] Update pull_request_template.md

---
 .github/pull_request_template.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/.github/pull_request_template.md b/.github/pull_request_template.md
index c0c34d898..f6167fffd 100644
--- a/.github/pull_request_template.md
+++ b/.github/pull_request_template.md
@@ -10,5 +10,5 @@ Related Issue: <Insert link here if applicable>
      - Not needed if it is just a README change or similar.
  - [ ] Ran `./contributor_setup.sh` followed by `./devtool ready_for_publish`
      - You'll need `Ruby` with `Bundler` and `NPM` installed locally.
-     - If no Rust files were changed, `./devtool ready_for_publish_no_rust` can be used instead (faster).
+     - If no Rust-related files were changed, `./devtool ready_for_publish_no_rust` can be used instead (faster).
      - This step is optional, but much appreciated if done.

From 8513ccfd8dc83e76997c4f83252452e495fbc17b Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Wed, 27 Apr 2022 22:08:55 +0200
Subject: [PATCH 154/214] Various minor fixes

---
 01_wait_forever/Makefile                      |  1 -
 01_wait_forever/src/main.rs                   |  4 +-
 02_runtime_init/Makefile                      |  1 -
 02_runtime_init/README.md                     |  6 +-
 02_runtime_init/src/main.rs                   |  4 +-
 03_hacky_hello_world/Makefile                 |  1 -
 03_hacky_hello_world/README.md                |  8 +--
 03_hacky_hello_world/src/main.rs              |  4 +-
 04_safe_globals/Makefile                      |  1 -
 04_safe_globals/README.md                     |  6 +-
 04_safe_globals/src/main.rs                   |  4 +-
 05_drivers_gpio_uart/Makefile                 |  1 -
 05_drivers_gpio_uart/README.md                | 12 ++--
 05_drivers_gpio_uart/src/main.rs              |  4 +-
 06_uart_chainloader/Makefile                  |  1 -
 06_uart_chainloader/README.md                 | 14 ++---
 06_uart_chainloader/src/main.rs               |  4 +-
 07_timestamps/Makefile                        |  1 -
 07_timestamps/README.md                       | 12 ++--
 07_timestamps/src/main.rs                     |  4 +-
 08_hw_debug_JTAG/Makefile                     |  1 -
 08_hw_debug_JTAG/README.md                    |  4 +-
 08_hw_debug_JTAG/src/main.rs                  |  4 +-
 09_privilege_level/Makefile                   |  1 -
 09_privilege_level/README.md                  |  8 +--
 09_privilege_level/src/main.rs                |  4 +-
 .../Makefile                                  |  1 -
 .../README.md                                 | 10 ++--
 .../src/main.rs                               |  4 +-
 11_exceptions_part1_groundwork/Makefile       |  1 -
 11_exceptions_part1_groundwork/README.md      | 16 ++++--
 .../src/_arch/aarch64/exception.rs            |  2 +-
 .../src/_arch/aarch64/exception.s             |  4 ++
 11_exceptions_part1_groundwork/src/main.rs    |  4 +-
 12_integrated_testing/Makefile                |  1 -
 .../kernel/src/_arch/aarch64/exception.rs     |  2 +-
 .../kernel/src/_arch/aarch64/exception.s      |  4 ++
 12_integrated_testing/kernel/src/lib.rs       |  4 +-
 12_integrated_testing/kernel/src/main.rs      |  4 +-
 13_exceptions_part2_peripheral_IRQs/Makefile  |  1 -
 13_exceptions_part2_peripheral_IRQs/README.md | 12 ++--
 .../kernel/src/_arch/aarch64/exception.rs     |  2 +-
 .../kernel/src/_arch/aarch64/exception.s      |  4 ++
 .../kernel/src/lib.rs                         |  4 +-
 .../kernel/src/main.rs                        |  4 +-
 14_virtual_mem_part2_mmio_remap/Makefile      |  1 -
 14_virtual_mem_part2_mmio_remap/README.md     | 10 ++--
 .../kernel/src/_arch/aarch64/exception.rs     |  2 +-
 .../kernel/src/_arch/aarch64/exception.s      |  4 ++
 .../kernel/src/lib.rs                         |  4 +-
 .../kernel/src/main.rs                        |  4 +-
 .../Makefile                                  |  1 -
 .../README.md                                 | 10 ++--
 .../kernel/src/_arch/aarch64/exception.rs     |  2 +-
 .../kernel/src/_arch/aarch64/exception.s      |  4 ++
 .../kernel/src/lib.rs                         |  4 +-
 .../kernel/src/main.rs                        |  4 +-
 .../Makefile                                  |  1 -
 .../README.md                                 |  2 +-
 .../kernel/src/_arch/aarch64/exception.rs     |  2 +-
 .../kernel/src/_arch/aarch64/exception.s      |  4 ++
 .../kernel/src/lib.rs                         |  4 +-
 .../kernel/src/main.rs                        |  4 +-
 17_kernel_symbols/Makefile                    |  3 +-
 17_kernel_symbols/README.md                   | 56 +++++++++++--------
 .../kernel/src/_arch/aarch64/exception.rs     |  8 ++-
 .../kernel/src/_arch/aarch64/exception.s      |  4 ++
 17_kernel_symbols/kernel/src/lib.rs           |  4 +-
 17_kernel_symbols/kernel/src/main.rs          |  4 +-
 17_kernel_symbols/kernel/src/symbols.rs       | 14 +++--
 .../libraries/debug-symbol-types/src/lib.rs   |  6 ++
 X1_JTAG_boot/Makefile                         |  1 -
 X1_JTAG_boot/src/main.rs                      |  4 +-
 73 files changed, 228 insertions(+), 142 deletions(-)

diff --git a/01_wait_forever/Makefile b/01_wait_forever/Makefile
index 7699e5f4d..59884220c 100644
--- a/01_wait_forever/Makefile
+++ b/01_wait_forever/Makefile
@@ -81,7 +81,6 @@ COMPILER_ARGS = --target=$(TARGET) \
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
 DOC_CMD     = cargo doc $(COMPILER_ARGS)
 CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
-CHECK_CMD   = cargo check $(COMPILER_ARGS)
 OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
     -O binary
diff --git a/01_wait_forever/src/main.rs b/01_wait_forever/src/main.rs
index 30dd45e73..f7e08a59f 100644
--- a/01_wait_forever/src/main.rs
+++ b/01_wait_forever/src/main.rs
@@ -3,7 +3,9 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
+#![doc(
+    html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png"
+)]
 
 //! The `kernel` binary.
 //!
diff --git a/02_runtime_init/Makefile b/02_runtime_init/Makefile
index 0d877c154..ba5f0c795 100644
--- a/02_runtime_init/Makefile
+++ b/02_runtime_init/Makefile
@@ -81,7 +81,6 @@ COMPILER_ARGS = --target=$(TARGET) \
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
 DOC_CMD     = cargo doc $(COMPILER_ARGS)
 CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
-CHECK_CMD   = cargo check $(COMPILER_ARGS)
 OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
     -O binary
diff --git a/02_runtime_init/README.md b/02_runtime_init/README.md
index f2f0f0472..02ed0488b 100644
--- a/02_runtime_init/README.md
+++ b/02_runtime_init/README.md
@@ -52,7 +52,7 @@ diff -uNr 01_wait_forever/Cargo.toml 02_runtime_init/Cargo.toml
 diff -uNr 01_wait_forever/Makefile 02_runtime_init/Makefile
 --- 01_wait_forever/Makefile
 +++ 02_runtime_init/Makefile
-@@ -181,6 +181,8 @@
+@@ -180,6 +180,8 @@
  	$(call color_header, "Launching objdump")
  	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                  --section .text   \
@@ -302,7 +302,7 @@ diff -uNr 01_wait_forever/src/cpu.rs 02_runtime_init/src/cpu.rs
 diff -uNr 01_wait_forever/src/main.rs 02_runtime_init/src/main.rs
 --- 01_wait_forever/src/main.rs
 +++ 02_runtime_init/src/main.rs
-@@ -102,6 +102,7 @@
+@@ -104,6 +104,7 @@
  //!
  //! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
  //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
@@ -310,7 +310,7 @@ diff -uNr 01_wait_forever/src/main.rs 02_runtime_init/src/main.rs
 
  #![no_main]
  #![no_std]
-@@ -110,4 +111,11 @@
+@@ -112,4 +113,11 @@
  mod cpu;
  mod panic_wait;
 
diff --git a/02_runtime_init/src/main.rs b/02_runtime_init/src/main.rs
index 6b3b1efda..42653ac40 100644
--- a/02_runtime_init/src/main.rs
+++ b/02_runtime_init/src/main.rs
@@ -3,7 +3,9 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
+#![doc(
+    html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png"
+)]
 
 //! The `kernel` binary.
 //!
diff --git a/03_hacky_hello_world/Makefile b/03_hacky_hello_world/Makefile
index c3e75cce3..a90b2fd67 100644
--- a/03_hacky_hello_world/Makefile
+++ b/03_hacky_hello_world/Makefile
@@ -81,7 +81,6 @@ COMPILER_ARGS = --target=$(TARGET) \
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
 DOC_CMD     = cargo doc $(COMPILER_ARGS)
 CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
-CHECK_CMD   = cargo check $(COMPILER_ARGS)
 OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
     -O binary
diff --git a/03_hacky_hello_world/README.md b/03_hacky_hello_world/README.md
index 7263532cf..30a717e89 100644
--- a/03_hacky_hello_world/README.md
+++ b/03_hacky_hello_world/README.md
@@ -70,7 +70,7 @@ diff -uNr 02_runtime_init/Makefile 03_hacky_hello_world/Makefile
      OBJDUMP_BINARY    = aarch64-none-elf-objdump
      NM_BINARY         = aarch64-none-elf-nm
      READELF_BINARY    = aarch64-none-elf-readelf
-@@ -86,17 +86,20 @@
+@@ -85,17 +85,20 @@
      --strip-all            \
      -O binary
 
@@ -94,7 +94,7 @@ diff -uNr 02_runtime_init/Makefile 03_hacky_hello_world/Makefile
 
 
 
-@@ -192,3 +195,27 @@
+@@ -191,3 +194,27 @@
  	$(call color_header, "Launching nm")
  	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
@@ -212,7 +212,7 @@ diff -uNr 02_runtime_init/src/console.rs 03_hacky_hello_world/src/console.rs
 diff -uNr 02_runtime_init/src/main.rs 03_hacky_hello_world/src/main.rs
 --- 02_runtime_init/src/main.rs
 +++ 03_hacky_hello_world/src/main.rs
-@@ -104,12 +104,16 @@
+@@ -106,12 +106,16 @@
  //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
  //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
@@ -229,7 +229,7 @@ diff -uNr 02_runtime_init/src/main.rs 03_hacky_hello_world/src/main.rs
 
  /// Early init code.
  ///
-@@ -117,5 +121,7 @@
+@@ -119,5 +123,7 @@
  ///
  /// - Only a single core must be active and running this function.
  unsafe fn kernel_init() -> ! {
diff --git a/03_hacky_hello_world/src/main.rs b/03_hacky_hello_world/src/main.rs
index ee9afd2a0..67b0551bd 100644
--- a/03_hacky_hello_world/src/main.rs
+++ b/03_hacky_hello_world/src/main.rs
@@ -3,7 +3,9 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
+#![doc(
+    html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png"
+)]
 
 //! The `kernel` binary.
 //!
diff --git a/04_safe_globals/Makefile b/04_safe_globals/Makefile
index c3e75cce3..a90b2fd67 100644
--- a/04_safe_globals/Makefile
+++ b/04_safe_globals/Makefile
@@ -81,7 +81,6 @@ COMPILER_ARGS = --target=$(TARGET) \
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
 DOC_CMD     = cargo doc $(COMPILER_ARGS)
 CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
-CHECK_CMD   = cargo check $(COMPILER_ARGS)
 OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
     -O binary
diff --git a/04_safe_globals/README.md b/04_safe_globals/README.md
index bfb2b4faf..8eff4a678 100644
--- a/04_safe_globals/README.md
+++ b/04_safe_globals/README.md
@@ -224,7 +224,7 @@ diff -uNr 03_hacky_hello_world/src/console.rs 04_safe_globals/src/console.rs
 diff -uNr 03_hacky_hello_world/src/main.rs 04_safe_globals/src/main.rs
 --- 03_hacky_hello_world/src/main.rs
 +++ 04_safe_globals/src/main.rs
-@@ -106,6 +106,7 @@
+@@ -108,6 +108,7 @@
 
  #![feature(format_args_nl)]
  #![feature(panic_info_message)]
@@ -232,7 +232,7 @@ diff -uNr 03_hacky_hello_world/src/main.rs 04_safe_globals/src/main.rs
  #![no_main]
  #![no_std]
 
-@@ -114,6 +115,7 @@
+@@ -116,6 +117,7 @@
  mod cpu;
  mod panic_wait;
  mod print;
@@ -240,7 +240,7 @@ diff -uNr 03_hacky_hello_world/src/main.rs 04_safe_globals/src/main.rs
 
  /// Early init code.
  ///
-@@ -121,7 +123,15 @@
+@@ -123,7 +125,15 @@
  ///
  /// - Only a single core must be active and running this function.
  unsafe fn kernel_init() -> ! {
diff --git a/04_safe_globals/src/main.rs b/04_safe_globals/src/main.rs
index 422dcf91f..b45e3a350 100644
--- a/04_safe_globals/src/main.rs
+++ b/04_safe_globals/src/main.rs
@@ -3,7 +3,9 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
+#![doc(
+    html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png"
+)]
 
 //! The `kernel` binary.
 //!
diff --git a/05_drivers_gpio_uart/Makefile b/05_drivers_gpio_uart/Makefile
index 38afeef96..376892d87 100644
--- a/05_drivers_gpio_uart/Makefile
+++ b/05_drivers_gpio_uart/Makefile
@@ -84,7 +84,6 @@ COMPILER_ARGS = --target=$(TARGET) \
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
 DOC_CMD     = cargo doc $(COMPILER_ARGS)
 CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
-CHECK_CMD   = cargo check $(COMPILER_ARGS)
 OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
     -O binary
diff --git a/05_drivers_gpio_uart/README.md b/05_drivers_gpio_uart/README.md
index 3b6f38f34..5787ac124 100644
--- a/05_drivers_gpio_uart/README.md
+++ b/05_drivers_gpio_uart/README.md
@@ -155,7 +155,7 @@ diff -uNr 04_safe_globals/Makefile 05_drivers_gpio_uart/Makefile
 
 
  ##--------------------------------------------------------------------------------------------------
-@@ -88,6 +91,7 @@
+@@ -87,6 +90,7 @@
 
  EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
  EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
@@ -163,7 +163,7 @@ diff -uNr 04_safe_globals/Makefile 05_drivers_gpio_uart/Makefile
 
  ##------------------------------------------------------------------------------
  ## Dockerization
-@@ -95,18 +99,26 @@
+@@ -94,18 +98,26 @@
  DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
  DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
  DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
@@ -191,7 +191,7 @@ diff -uNr 04_safe_globals/Makefile 05_drivers_gpio_uart/Makefile
 
  all: $(KERNEL_BIN)
 
-@@ -156,9 +168,16 @@
+@@ -155,9 +167,16 @@
  qemu: $(KERNEL_BIN)
  	$(call color_header, "Launching QEMU")
  	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
@@ -1337,7 +1337,7 @@ diff -uNr 04_safe_globals/src/driver.rs 05_drivers_gpio_uart/src/driver.rs
 diff -uNr 04_safe_globals/src/main.rs 05_drivers_gpio_uart/src/main.rs
 --- 04_safe_globals/src/main.rs
 +++ 05_drivers_gpio_uart/src/main.rs
-@@ -104,6 +104,7 @@
+@@ -106,6 +106,7 @@
  //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
  //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
@@ -1345,7 +1345,7 @@ diff -uNr 04_safe_globals/src/main.rs 05_drivers_gpio_uart/src/main.rs
  #![feature(format_args_nl)]
  #![feature(panic_info_message)]
  #![feature(trait_alias)]
-@@ -113,6 +114,7 @@
+@@ -115,6 +116,7 @@
  mod bsp;
  mod console;
  mod cpu;
@@ -1353,7 +1353,7 @@ diff -uNr 04_safe_globals/src/main.rs 05_drivers_gpio_uart/src/main.rs
  mod panic_wait;
  mod print;
  mod synchronization;
-@@ -122,16 +124,54 @@
+@@ -124,16 +126,54 @@
  /// # Safety
  ///
  /// - Only a single core must be active and running this function.
diff --git a/05_drivers_gpio_uart/src/main.rs b/05_drivers_gpio_uart/src/main.rs
index 241d9498c..9ee5a43c9 100644
--- a/05_drivers_gpio_uart/src/main.rs
+++ b/05_drivers_gpio_uart/src/main.rs
@@ -3,7 +3,9 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
+#![doc(
+    html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png"
+)]
 
 //! The `kernel` binary.
 //!
diff --git a/06_uart_chainloader/Makefile b/06_uart_chainloader/Makefile
index 3cde6041e..812fdf4ee 100644
--- a/06_uart_chainloader/Makefile
+++ b/06_uart_chainloader/Makefile
@@ -86,7 +86,6 @@ COMPILER_ARGS = --target=$(TARGET) \
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
 DOC_CMD     = cargo doc $(COMPILER_ARGS)
 CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
-CHECK_CMD   = cargo check $(COMPILER_ARGS)
 OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
     -O binary
diff --git a/06_uart_chainloader/README.md b/06_uart_chainloader/README.md
index 04a21dff7..8c21ccfa8 100644
--- a/06_uart_chainloader/README.md
+++ b/06_uart_chainloader/README.md
@@ -189,7 +189,7 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
  endif
 
  # Export for build.rs.
-@@ -90,8 +92,8 @@
+@@ -89,8 +91,8 @@
      -O binary
 
  EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
@@ -200,7 +200,7 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
 
  ##------------------------------------------------------------------------------
  ## Dockerization
-@@ -110,7 +112,7 @@
+@@ -109,7 +111,7 @@
  ifeq ($(shell uname -s),Linux)
      DOCKER_CMD_DEV = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DEV)
 
@@ -209,7 +209,7 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
  endif
 
 
-@@ -118,7 +120,7 @@
+@@ -117,7 +119,7 @@
  ##--------------------------------------------------------------------------------------------------
  ## Targets
  ##--------------------------------------------------------------------------------------------------
@@ -218,7 +218,7 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
 
  all: $(KERNEL_BIN)
 
-@@ -160,7 +162,7 @@
+@@ -159,7 +161,7 @@
  ##------------------------------------------------------------------------------
  ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
@@ -227,7 +227,7 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
  	$(call color_header, "$(QEMU_MISSING_STRING)")
 
  else # QEMU is supported.
-@@ -169,13 +171,17 @@
+@@ -168,13 +170,17 @@
  	$(call color_header, "Launching QEMU")
  	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
@@ -248,7 +248,7 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
 
  ##------------------------------------------------------------------------------
  ## Run clippy
-@@ -233,7 +239,8 @@
+@@ -232,7 +238,8 @@
  ##------------------------------------------------------------------------------
  test_boot: $(KERNEL_BIN)
  	$(call color_header, "Boot test - $(BSP)")
@@ -457,7 +457,7 @@ diff -uNr 05_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs 06_uart_chainloader
 diff -uNr 05_drivers_gpio_uart/src/main.rs 06_uart_chainloader/src/main.rs
 --- 05_drivers_gpio_uart/src/main.rs
 +++ 06_uart_chainloader/src/main.rs
-@@ -140,38 +140,56 @@
+@@ -142,38 +142,56 @@
      kernel_main()
  }
 
diff --git a/06_uart_chainloader/src/main.rs b/06_uart_chainloader/src/main.rs
index 79f8b0b3a..21ee91a4e 100644
--- a/06_uart_chainloader/src/main.rs
+++ b/06_uart_chainloader/src/main.rs
@@ -3,7 +3,9 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
+#![doc(
+    html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png"
+)]
 
 //! The `kernel` binary.
 //!
diff --git a/07_timestamps/Makefile b/07_timestamps/Makefile
index d53950118..a497ad815 100644
--- a/07_timestamps/Makefile
+++ b/07_timestamps/Makefile
@@ -84,7 +84,6 @@ COMPILER_ARGS = --target=$(TARGET) \
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
 DOC_CMD     = cargo doc $(COMPILER_ARGS)
 CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
-CHECK_CMD   = cargo check $(COMPILER_ARGS)
 OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
     -O binary
diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index abdca3481..7bfa13dda 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -112,7 +112,7 @@ diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
  endif
 
  # Export for build.rs.
-@@ -92,7 +90,7 @@
+@@ -91,7 +89,7 @@
      -O binary
 
  EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
@@ -121,7 +121,7 @@ diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
  EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
 
  ##------------------------------------------------------------------------------
-@@ -162,7 +160,7 @@
+@@ -161,7 +159,7 @@
  ##------------------------------------------------------------------------------
  ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
@@ -130,7 +130,7 @@ diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
  	$(call color_header, "$(QEMU_MISSING_STRING)")
 
  else # QEMU is supported.
-@@ -171,17 +169,13 @@
+@@ -170,17 +168,13 @@
  	$(call color_header, "Launching QEMU")
  	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
@@ -149,7 +149,7 @@ diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
 
  ##------------------------------------------------------------------------------
  ## Run clippy
-@@ -239,8 +233,7 @@
+@@ -238,8 +232,7 @@
  ##------------------------------------------------------------------------------
  test_boot: $(KERNEL_BIN)
  	$(call color_header, "Boot test - $(BSP)")
@@ -538,7 +538,7 @@ diff -uNr 06_uart_chainloader/src/cpu.rs 07_timestamps/src/cpu.rs
 diff -uNr 06_uart_chainloader/src/main.rs 07_timestamps/src/main.rs
 --- 06_uart_chainloader/src/main.rs
 +++ 07_timestamps/src/main.rs
-@@ -118,6 +118,7 @@
+@@ -120,6 +120,7 @@
  mod panic_wait;
  mod print;
  mod synchronization;
@@ -546,7 +546,7 @@ diff -uNr 06_uart_chainloader/src/main.rs 07_timestamps/src/main.rs
 
  /// Early init code.
  ///
-@@ -140,56 +141,38 @@
+@@ -142,56 +143,38 @@
      kernel_main()
  }
 
diff --git a/07_timestamps/src/main.rs b/07_timestamps/src/main.rs
index c067d90c3..1805414b7 100644
--- a/07_timestamps/src/main.rs
+++ b/07_timestamps/src/main.rs
@@ -3,7 +3,9 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
+#![doc(
+    html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png"
+)]
 
 //! The `kernel` binary.
 //!
diff --git a/08_hw_debug_JTAG/Makefile b/08_hw_debug_JTAG/Makefile
index 4f6b01f98..9d76237cd 100644
--- a/08_hw_debug_JTAG/Makefile
+++ b/08_hw_debug_JTAG/Makefile
@@ -88,7 +88,6 @@ COMPILER_ARGS = --target=$(TARGET) \
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
 DOC_CMD     = cargo doc $(COMPILER_ARGS)
 CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
-CHECK_CMD   = cargo check $(COMPILER_ARGS)
 OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
     -O binary
diff --git a/08_hw_debug_JTAG/README.md b/08_hw_debug_JTAG/README.md
index b1f5d679c..7f8a1846c 100644
--- a/08_hw_debug_JTAG/README.md
+++ b/08_hw_debug_JTAG/README.md
@@ -338,7 +338,7 @@ diff -uNr 07_timestamps/Makefile 08_hw_debug_JTAG/Makefile
      LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
      RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
  endif
-@@ -99,18 +103,25 @@
+@@ -98,18 +102,25 @@
  DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
  DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
  DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
@@ -364,7 +364,7 @@ diff -uNr 07_timestamps/Makefile 08_hw_debug_JTAG/Makefile
  endif
 
 
-@@ -216,6 +227,35 @@
+@@ -215,6 +226,35 @@
 
 
 
diff --git a/08_hw_debug_JTAG/src/main.rs b/08_hw_debug_JTAG/src/main.rs
index c067d90c3..1805414b7 100644
--- a/08_hw_debug_JTAG/src/main.rs
+++ b/08_hw_debug_JTAG/src/main.rs
@@ -3,7 +3,9 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
+#![doc(
+    html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png"
+)]
 
 //! The `kernel` binary.
 //!
diff --git a/09_privilege_level/Makefile b/09_privilege_level/Makefile
index 4f6b01f98..9d76237cd 100644
--- a/09_privilege_level/Makefile
+++ b/09_privilege_level/Makefile
@@ -88,7 +88,6 @@ COMPILER_ARGS = --target=$(TARGET) \
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
 DOC_CMD     = cargo doc $(COMPILER_ARGS)
 CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
-CHECK_CMD   = cargo check $(COMPILER_ARGS)
 OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
     -O binary
diff --git a/09_privilege_level/README.md b/09_privilege_level/README.md
index 729634ac0..5b0f72c7f 100644
--- a/09_privilege_level/README.md
+++ b/09_privilege_level/README.md
@@ -502,7 +502,7 @@ diff -uNr 08_hw_debug_JTAG/src/exception.rs 09_privilege_level/src/exception.rs
 diff -uNr 08_hw_debug_JTAG/src/main.rs 09_privilege_level/src/main.rs
 --- 08_hw_debug_JTAG/src/main.rs
 +++ 09_privilege_level/src/main.rs
-@@ -115,6 +115,7 @@
+@@ -117,6 +117,7 @@
  mod console;
  mod cpu;
  mod driver;
@@ -510,7 +510,7 @@ diff -uNr 08_hw_debug_JTAG/src/main.rs 09_privilege_level/src/main.rs
  mod panic_wait;
  mod print;
  mod synchronization;
-@@ -143,6 +144,8 @@
+@@ -145,6 +146,8 @@
 
  /// The main function running after the early init.
  fn kernel_main() -> ! {
@@ -519,7 +519,7 @@ diff -uNr 08_hw_debug_JTAG/src/main.rs 09_privilege_level/src/main.rs
      use core::time::Duration;
      use driver::interface::DriverManager;
      use time::interface::TimeManager;
-@@ -154,6 +157,12 @@
+@@ -156,6 +159,12 @@
      );
      info!("Booting on: {}", bsp::board_name());
 
@@ -532,7 +532,7 @@ diff -uNr 08_hw_debug_JTAG/src/main.rs 09_privilege_level/src/main.rs
      info!(
          "Architectural timer resolution: {} ns",
          time::time_manager().resolution().as_nanos()
-@@ -168,11 +177,15 @@
+@@ -170,11 +179,15 @@
          info!("      {}. {}", i + 1, driver.compatible());
      }
 
diff --git a/09_privilege_level/src/main.rs b/09_privilege_level/src/main.rs
index 45dba34c7..b1b1bc27e 100644
--- a/09_privilege_level/src/main.rs
+++ b/09_privilege_level/src/main.rs
@@ -3,7 +3,9 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
+#![doc(
+    html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png"
+)]
 
 //! The `kernel` binary.
 //!
diff --git a/10_virtual_mem_part1_identity_mapping/Makefile b/10_virtual_mem_part1_identity_mapping/Makefile
index 4f6b01f98..9d76237cd 100644
--- a/10_virtual_mem_part1_identity_mapping/Makefile
+++ b/10_virtual_mem_part1_identity_mapping/Makefile
@@ -88,7 +88,6 @@ COMPILER_ARGS = --target=$(TARGET) \
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
 DOC_CMD     = cargo doc $(COMPILER_ARGS)
 CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
-CHECK_CMD   = cargo check $(COMPILER_ARGS)
 OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
     -O binary
diff --git a/10_virtual_mem_part1_identity_mapping/README.md b/10_virtual_mem_part1_identity_mapping/README.md
index 8c2de2067..3a5539c95 100644
--- a/10_virtual_mem_part1_identity_mapping/README.md
+++ b/10_virtual_mem_part1_identity_mapping/README.md
@@ -1081,7 +1081,7 @@ diff -uNr 09_privilege_level/src/bsp.rs 10_virtual_mem_part1_identity_mapping/sr
 diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/src/main.rs
 --- 09_privilege_level/src/main.rs
 +++ 10_virtual_mem_part1_identity_mapping/src/main.rs
-@@ -105,6 +105,8 @@
+@@ -107,6 +107,8 @@
  //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
  #![allow(clippy::upper_case_acronyms)]
@@ -1090,7 +1090,7 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
  #![feature(format_args_nl)]
  #![feature(panic_info_message)]
  #![feature(trait_alias)]
-@@ -116,6 +118,7 @@
+@@ -118,6 +120,7 @@
  mod cpu;
  mod driver;
  mod exception;
@@ -1098,7 +1098,7 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
  mod panic_wait;
  mod print;
  mod synchronization;
-@@ -126,9 +129,17 @@
+@@ -128,9 +131,17 @@
  /// # Safety
  ///
  /// - Only a single core must be active and running this function.
@@ -1117,7 +1117,7 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
 
      for i in bsp::driver::driver_manager().all_device_drivers().iter() {
          if let Err(x) = i.init() {
-@@ -157,6 +168,9 @@
+@@ -159,6 +170,9 @@
      );
      info!("Booting on: {}", bsp::board_name());
 
@@ -1127,7 +1127,7 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
      let (_, privilege_level) = exception::current_privilege_level();
      info!("Current privilege level: {}", privilege_level);
 
-@@ -180,6 +194,13 @@
+@@ -182,6 +196,13 @@
      info!("Timer test, spinning for 1 second");
      time::time_manager().spin_for(Duration::from_secs(1));
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/main.rs b/10_virtual_mem_part1_identity_mapping/src/main.rs
index 148cdfff4..327f3ce04 100644
--- a/10_virtual_mem_part1_identity_mapping/src/main.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/main.rs
@@ -3,7 +3,9 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
+#![doc(
+    html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png"
+)]
 
 //! The `kernel` binary.
 //!
diff --git a/11_exceptions_part1_groundwork/Makefile b/11_exceptions_part1_groundwork/Makefile
index 4f6b01f98..9d76237cd 100644
--- a/11_exceptions_part1_groundwork/Makefile
+++ b/11_exceptions_part1_groundwork/Makefile
@@ -88,7 +88,6 @@ COMPILER_ARGS = --target=$(TARGET) \
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
 DOC_CMD     = cargo doc $(COMPILER_ARGS)
 CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
-CHECK_CMD   = cargo check $(COMPILER_ARGS)
 OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
     -O binary
diff --git a/11_exceptions_part1_groundwork/README.md b/11_exceptions_part1_groundwork/README.md
index 2f90b7ff8..d0b86c555 100644
--- a/11_exceptions_part1_groundwork/README.md
+++ b/11_exceptions_part1_groundwork/README.md
@@ -183,6 +183,7 @@ some hand-crafted assembly. Introducing `exception.s`:
 /// Call the function provided by parameter `\handler` after saving the exception context. Provide
 /// the context as the first parameter to '\handler'.
 .macro CALL_WITH_CONTEXT handler
+__vector_\handler:
 	// Make room on the stack for the exception context.
 	sub	sp,  sp,  #16 * 17
 
@@ -221,6 +222,9 @@ some hand-crafted assembly. Introducing `exception.s`:
 	// After returning from exception handling code, replay the saved context and return via
 	// `eret`.
 	b	__exception_restore_context
+
+.size	__vector_\handler, . - __vector_\handler
+.type	__vector_\handler, function
 .endm
 ```
 
@@ -539,7 +543,7 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs 1
 +    /// Saved program status.
 +    spsr_el1: SpsrEL1,
 +
-+    // Exception syndrome register.
++    /// Exception syndrome register.
 +    esr_el1: EsrEL1,
 +}
 +
@@ -793,7 +797,7 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs 1
 diff -uNr 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.s 11_exceptions_part1_groundwork/src/_arch/aarch64/exception.s
 --- 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.s
 +++ 11_exceptions_part1_groundwork/src/_arch/aarch64/exception.s
-@@ -0,0 +1,150 @@
+@@ -0,0 +1,154 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
@@ -805,6 +809,7 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.s 11
 +/// Call the function provided by parameter `\handler` after saving the exception context. Provide
 +/// the context as the first parameter to '\handler'.
 +.macro CALL_WITH_CONTEXT handler
++__vector_\handler:
 +	// Make room on the stack for the exception context.
 +	sub	sp,  sp,  #16 * 17
 +
@@ -843,6 +848,9 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.s 11
 +	// After returning from exception handling code, replay the saved context and return via
 +	// `eret`.
 +	b	__exception_restore_context
++
++.size	__vector_\handler, . - __vector_\handler
++.type	__vector_\handler, function
 +.endm
 +
 +.macro FIQ_SUSPEND
@@ -1016,7 +1024,7 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/exception.rs 11_exceptions_p
 diff -uNr 10_virtual_mem_part1_identity_mapping/src/main.rs 11_exceptions_part1_groundwork/src/main.rs
 --- 10_virtual_mem_part1_identity_mapping/src/main.rs
 +++ 11_exceptions_part1_groundwork/src/main.rs
-@@ -137,6 +137,8 @@
+@@ -139,6 +139,8 @@
      use driver::interface::DriverManager;
      use memory::mmu::interface::MMU;
 
@@ -1025,7 +1033,7 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/main.rs 11_exceptions_part1_
      if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
          panic!("MMU: {}", string);
      }
-@@ -194,13 +196,28 @@
+@@ -196,13 +198,28 @@
      info!("Timer test, spinning for 1 second");
      time::time_manager().spin_for(Duration::from_secs(1));
 
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
index e84849380..7d3b45722 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
@@ -45,7 +45,7 @@ struct ExceptionContext {
     /// Saved program status.
     spsr_el1: SpsrEL1,
 
-    // Exception syndrome register.
+    /// Exception syndrome register.
     esr_el1: EsrEL1,
 }
 
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.s b/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.s
index 5aae30b9c..91805ee7c 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.s
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.s
@@ -9,6 +9,7 @@
 /// Call the function provided by parameter `\handler` after saving the exception context. Provide
 /// the context as the first parameter to '\handler'.
 .macro CALL_WITH_CONTEXT handler
+__vector_\handler:
 	// Make room on the stack for the exception context.
 	sub	sp,  sp,  #16 * 17
 
@@ -47,6 +48,9 @@
 	// After returning from exception handling code, replay the saved context and return via
 	// `eret`.
 	b	__exception_restore_context
+
+.size	__vector_\handler, . - __vector_\handler
+.type	__vector_\handler, function
 .endm
 
 .macro FIQ_SUSPEND
diff --git a/11_exceptions_part1_groundwork/src/main.rs b/11_exceptions_part1_groundwork/src/main.rs
index 5534750a3..0c88c58e4 100644
--- a/11_exceptions_part1_groundwork/src/main.rs
+++ b/11_exceptions_part1_groundwork/src/main.rs
@@ -3,7 +3,9 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
+#![doc(
+    html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png"
+)]
 
 //! The `kernel` binary.
 //!
diff --git a/12_integrated_testing/Makefile b/12_integrated_testing/Makefile
index 50986ce23..1a19e6018 100644
--- a/12_integrated_testing/Makefile
+++ b/12_integrated_testing/Makefile
@@ -97,7 +97,6 @@ COMPILER_ARGS = --target=$(TARGET) \
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS) --manifest-path $(KERNEL_MANIFEST)
 DOC_CMD     = cargo doc $(COMPILER_ARGS)
 CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
-CHECK_CMD   = cargo check $(COMPILER_ARGS)
 TEST_CMD    = cargo test $(COMPILER_ARGS) --manifest-path $(KERNEL_MANIFEST)
 OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
diff --git a/12_integrated_testing/kernel/src/_arch/aarch64/exception.rs b/12_integrated_testing/kernel/src/_arch/aarch64/exception.rs
index e84699e1e..0f83052c1 100644
--- a/12_integrated_testing/kernel/src/_arch/aarch64/exception.rs
+++ b/12_integrated_testing/kernel/src/_arch/aarch64/exception.rs
@@ -45,7 +45,7 @@ struct ExceptionContext {
     /// Saved program status.
     spsr_el1: SpsrEL1,
 
-    // Exception syndrome register.
+    /// Exception syndrome register.
     esr_el1: EsrEL1,
 }
 
diff --git a/12_integrated_testing/kernel/src/_arch/aarch64/exception.s b/12_integrated_testing/kernel/src/_arch/aarch64/exception.s
index 5aae30b9c..91805ee7c 100644
--- a/12_integrated_testing/kernel/src/_arch/aarch64/exception.s
+++ b/12_integrated_testing/kernel/src/_arch/aarch64/exception.s
@@ -9,6 +9,7 @@
 /// Call the function provided by parameter `\handler` after saving the exception context. Provide
 /// the context as the first parameter to '\handler'.
 .macro CALL_WITH_CONTEXT handler
+__vector_\handler:
 	// Make room on the stack for the exception context.
 	sub	sp,  sp,  #16 * 17
 
@@ -47,6 +48,9 @@
 	// After returning from exception handling code, replay the saved context and return via
 	// `eret`.
 	b	__exception_restore_context
+
+.size	__vector_\handler, . - __vector_\handler
+.type	__vector_\handler, function
 .endm
 
 .macro FIQ_SUSPEND
diff --git a/12_integrated_testing/kernel/src/lib.rs b/12_integrated_testing/kernel/src/lib.rs
index 1218e30e3..442de9e02 100644
--- a/12_integrated_testing/kernel/src/lib.rs
+++ b/12_integrated_testing/kernel/src/lib.rs
@@ -3,7 +3,9 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
+#![doc(
+    html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png"
+)]
 
 //! The `kernel` library.
 //!
diff --git a/12_integrated_testing/kernel/src/main.rs b/12_integrated_testing/kernel/src/main.rs
index dfbc11662..11b6547dc 100644
--- a/12_integrated_testing/kernel/src/main.rs
+++ b/12_integrated_testing/kernel/src/main.rs
@@ -3,7 +3,9 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
+#![doc(
+    html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png"
+)]
 
 //! The `kernel` binary.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/Makefile b/13_exceptions_part2_peripheral_IRQs/Makefile
index 50986ce23..1a19e6018 100644
--- a/13_exceptions_part2_peripheral_IRQs/Makefile
+++ b/13_exceptions_part2_peripheral_IRQs/Makefile
@@ -97,7 +97,6 @@ COMPILER_ARGS = --target=$(TARGET) \
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS) --manifest-path $(KERNEL_MANIFEST)
 DOC_CMD     = cargo doc $(COMPILER_ARGS)
 CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
-CHECK_CMD   = cargo check $(COMPILER_ARGS)
 TEST_CMD    = cargo test $(COMPILER_ARGS) --manifest-path $(KERNEL_MANIFEST)
 OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index 35e0307f8..5938da9e8 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -2398,7 +2398,7 @@ diff -uNr 12_integrated_testing/kernel/src/exception/asynchronous.rs 13_exceptio
 diff -uNr 12_integrated_testing/kernel/src/lib.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
 --- 12_integrated_testing/kernel/src/lib.rs
 +++ 13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
-@@ -108,6 +108,7 @@
+@@ -110,6 +110,7 @@
 
  #![allow(clippy::upper_case_acronyms)]
  #![allow(incomplete_features)]
@@ -2406,7 +2406,7 @@ diff -uNr 12_integrated_testing/kernel/src/lib.rs 13_exceptions_part2_peripheral
  #![feature(core_intrinsics)]
  #![feature(format_args_nl)]
  #![feature(linkage)]
-@@ -130,6 +131,7 @@
+@@ -132,6 +133,7 @@
  pub mod exception;
  pub mod memory;
  pub mod print;
@@ -2418,7 +2418,7 @@ diff -uNr 12_integrated_testing/kernel/src/lib.rs 13_exceptions_part2_peripheral
 diff -uNr 12_integrated_testing/kernel/src/main.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs
 --- 12_integrated_testing/kernel/src/main.rs
 +++ 13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs
-@@ -11,7 +11,7 @@
+@@ -13,7 +13,7 @@
  #![no_main]
  #![no_std]
 
@@ -2427,7 +2427,7 @@ diff -uNr 12_integrated_testing/kernel/src/main.rs 13_exceptions_part2_periphera
 
  /// Early init code.
  ///
-@@ -21,7 +21,7 @@
+@@ -23,7 +23,7 @@
  /// - The init calls in this function must appear in the correct order:
  ///     - MMU + Data caching must be activated at the earliest. Without it, any atomic operations,
  ///       e.g. the yet-to-be-introduced spinlocks in the device drivers (which currently employ
@@ -2436,7 +2436,7 @@ diff -uNr 12_integrated_testing/kernel/src/main.rs 13_exceptions_part2_periphera
  #[no_mangle]
  unsafe fn kernel_init() -> ! {
      use driver::interface::DriverManager;
-@@ -41,15 +41,27 @@
+@@ -43,15 +43,27 @@
      bsp::driver::driver_manager().post_device_driver_init();
      // println! is usable from here on.
 
@@ -2466,7 +2466,7 @@ diff -uNr 12_integrated_testing/kernel/src/main.rs 13_exceptions_part2_periphera
 
      info!("{}", libkernel::version());
      info!("Booting on: {}", bsp::board_name());
-@@ -77,12 +89,9 @@
+@@ -79,12 +91,9 @@
          info!("      {}. {}", i + 1, driver.compatible());
      }
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception.rs
index 495dba34f..662c91b94 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception.rs
@@ -46,7 +46,7 @@ struct ExceptionContext {
     /// Saved program status.
     spsr_el1: SpsrEL1,
 
-    // Exception syndrome register.
+    /// Exception syndrome register.
     esr_el1: EsrEL1,
 }
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception.s b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception.s
index 5aae30b9c..91805ee7c 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception.s
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception.s
@@ -9,6 +9,7 @@
 /// Call the function provided by parameter `\handler` after saving the exception context. Provide
 /// the context as the first parameter to '\handler'.
 .macro CALL_WITH_CONTEXT handler
+__vector_\handler:
 	// Make room on the stack for the exception context.
 	sub	sp,  sp,  #16 * 17
 
@@ -47,6 +48,9 @@
 	// After returning from exception handling code, replay the saved context and return via
 	// `eret`.
 	b	__exception_restore_context
+
+.size	__vector_\handler, . - __vector_\handler
+.type	__vector_\handler, function
 .endm
 
 .macro FIQ_SUSPEND
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
index 9bd360c08..58a939f10 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
@@ -3,7 +3,9 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
+#![doc(
+    html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png"
+)]
 
 //! The `kernel` library.
 //!
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs
index 228b984ba..0f72d17f5 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs
@@ -3,7 +3,9 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
+#![doc(
+    html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png"
+)]
 
 //! The `kernel` binary.
 
diff --git a/14_virtual_mem_part2_mmio_remap/Makefile b/14_virtual_mem_part2_mmio_remap/Makefile
index 50986ce23..1a19e6018 100644
--- a/14_virtual_mem_part2_mmio_remap/Makefile
+++ b/14_virtual_mem_part2_mmio_remap/Makefile
@@ -97,7 +97,6 @@ COMPILER_ARGS = --target=$(TARGET) \
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS) --manifest-path $(KERNEL_MANIFEST)
 DOC_CMD     = cargo doc $(COMPILER_ARGS)
 CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
-CHECK_CMD   = cargo check $(COMPILER_ARGS)
 TEST_CMD    = cargo test $(COMPILER_ARGS) --manifest-path $(KERNEL_MANIFEST)
 OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index e19cedb7a..329e2105e 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -2136,7 +2136,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/driver.rs 14_virtual_me
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs 14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
-@@ -111,8 +111,10 @@
+@@ -113,8 +113,10 @@
  #![feature(asm_const)]
  #![feature(core_intrinsics)]
  #![feature(format_args_nl)]
@@ -2147,7 +2147,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs 14_virtual_mem_p
  #![feature(trait_alias)]
  #![no_std]
  // Testing
-@@ -125,6 +127,7 @@
+@@ -127,6 +129,7 @@
  mod synchronization;
 
  pub mod bsp;
@@ -2155,7 +2155,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs 14_virtual_mem_p
  pub mod console;
  pub mod cpu;
  pub mod driver;
-@@ -177,6 +180,7 @@
+@@ -179,6 +182,7 @@
  #[no_mangle]
  unsafe fn kernel_init() -> ! {
      exception::handling_init();
@@ -2167,7 +2167,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs 14_virtual_mem_p
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs 14_virtual_mem_part2_mmio_remap/kernel/src/main.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/src/main.rs
-@@ -25,21 +25,41 @@
+@@ -27,21 +27,41 @@
  #[no_mangle]
  unsafe fn kernel_init() -> ! {
      use driver::interface::DriverManager;
@@ -2215,7 +2215,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs 14_virtual_mem_
 
      // Let device drivers register and enable their handlers with the interrupt controller.
      for i in bsp::driver::driver_manager().all_device_drivers() {
-@@ -66,8 +86,8 @@
+@@ -68,8 +88,8 @@
      info!("{}", libkernel::version());
      info!("Booting on: {}", bsp::board_name());
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception.rs
index 495dba34f..662c91b94 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception.rs
@@ -46,7 +46,7 @@ struct ExceptionContext {
     /// Saved program status.
     spsr_el1: SpsrEL1,
 
-    // Exception syndrome register.
+    /// Exception syndrome register.
     esr_el1: EsrEL1,
 }
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception.s b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception.s
index 5aae30b9c..91805ee7c 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception.s
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception.s
@@ -9,6 +9,7 @@
 /// Call the function provided by parameter `\handler` after saving the exception context. Provide
 /// the context as the first parameter to '\handler'.
 .macro CALL_WITH_CONTEXT handler
+__vector_\handler:
 	// Make room on the stack for the exception context.
 	sub	sp,  sp,  #16 * 17
 
@@ -47,6 +48,9 @@
 	// After returning from exception handling code, replay the saved context and return via
 	// `eret`.
 	b	__exception_restore_context
+
+.size	__vector_\handler, . - __vector_\handler
+.type	__vector_\handler, function
 .endm
 
 .macro FIQ_SUSPEND
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
index 2c874f18e..aeab8c22a 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
@@ -3,7 +3,9 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
+#![doc(
+    html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png"
+)]
 
 //! The `kernel` library.
 //!
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/main.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/main.rs
index 68d34e358..17edcfd97 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/main.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/main.rs
@@ -3,7 +3,9 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
+#![doc(
+    html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png"
+)]
 
 //! The `kernel` binary.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/Makefile b/15_virtual_mem_part3_precomputed_tables/Makefile
index 85b8ca385..0d34c181d 100644
--- a/15_virtual_mem_part3_precomputed_tables/Makefile
+++ b/15_virtual_mem_part3_precomputed_tables/Makefile
@@ -107,7 +107,6 @@ COMPILER_ARGS = --target=$(TARGET) \
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS) --manifest-path $(KERNEL_MANIFEST)
 DOC_CMD     = cargo doc $(COMPILER_ARGS)
 CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
-CHECK_CMD   = cargo check $(COMPILER_ARGS)
 TEST_CMD    = cargo test $(COMPILER_ARGS) --manifest-path $(KERNEL_MANIFEST)
 OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index b09b265bb..9ec33fc0f 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -1374,7 +1374,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/memory/mmu.
 diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/main.rs 15_virtual_mem_part3_precomputed_tables/kernel/src/main.rs
 --- 14_virtual_mem_part2_mmio_remap/kernel/src/main.rs
 +++ 15_virtual_mem_part3_precomputed_tables/kernel/src/main.rs
-@@ -15,31 +15,23 @@
+@@ -17,31 +17,23 @@
 
  /// Early init code.
  ///
@@ -1413,7 +1413,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/main.rs 15_virtual_mem_part
      // Bring up the drivers needed for printing first.
      for i in bsp::driver::driver_manager()
          .early_print_device_drivers()
-@@ -49,7 +41,7 @@
+@@ -51,7 +43,7 @@
          i.init().unwrap_or_else(|_| cpu::wait_forever());
      }
      bsp::driver::driver_manager().post_early_print_device_driver_init();
@@ -1860,7 +1860,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/Makefile 15_virtual_mem_part3_precompu
 
 
 
-@@ -104,6 +114,7 @@
+@@ -103,6 +113,7 @@
      -O binary
 
  EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
@@ -1868,7 +1868,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/Makefile 15_virtual_mem_part3_precompu
  EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
  EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
 
-@@ -154,16 +165,24 @@
+@@ -153,16 +164,24 @@
  ##------------------------------------------------------------------------------
  ## Compile the kernel ELF
  ##------------------------------------------------------------------------------
@@ -1896,7 +1896,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/Makefile 15_virtual_mem_part3_precompu
  	$(call color_progress_prefix, "Name")
  	@echo $(KERNEL_BIN)
  	$(call color_progress_prefix, "Size")
-@@ -302,6 +321,7 @@
+@@ -301,6 +320,7 @@
      TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
      TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception.rs
index 495dba34f..662c91b94 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception.rs
@@ -46,7 +46,7 @@ struct ExceptionContext {
     /// Saved program status.
     spsr_el1: SpsrEL1,
 
-    // Exception syndrome register.
+    /// Exception syndrome register.
     esr_el1: EsrEL1,
 }
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception.s b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception.s
index 5aae30b9c..91805ee7c 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception.s
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception.s
@@ -9,6 +9,7 @@
 /// Call the function provided by parameter `\handler` after saving the exception context. Provide
 /// the context as the first parameter to '\handler'.
 .macro CALL_WITH_CONTEXT handler
+__vector_\handler:
 	// Make room on the stack for the exception context.
 	sub	sp,  sp,  #16 * 17
 
@@ -47,6 +48,9 @@
 	// After returning from exception handling code, replay the saved context and return via
 	// `eret`.
 	b	__exception_restore_context
+
+.size	__vector_\handler, . - __vector_\handler
+.type	__vector_\handler, function
 .endm
 
 .macro FIQ_SUSPEND
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs
index 2c874f18e..aeab8c22a 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs
@@ -3,7 +3,9 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
+#![doc(
+    html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png"
+)]
 
 //! The `kernel` library.
 //!
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/main.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/main.rs
index c0c188181..5150f3afc 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/main.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/main.rs
@@ -3,7 +3,9 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
+#![doc(
+    html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png"
+)]
 
 //! The `kernel` binary.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/Makefile b/16_virtual_mem_part4_higher_half_kernel/Makefile
index 85b8ca385..0d34c181d 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Makefile
+++ b/16_virtual_mem_part4_higher_half_kernel/Makefile
@@ -107,7 +107,6 @@ COMPILER_ARGS = --target=$(TARGET) \
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS) --manifest-path $(KERNEL_MANIFEST)
 DOC_CMD     = cargo doc $(COMPILER_ARGS)
 CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
-CHECK_CMD   = cargo check $(COMPILER_ARGS)
 TEST_CMD    = cargo test $(COMPILER_ARGS) --manifest-path $(KERNEL_MANIFEST)
 OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
diff --git a/16_virtual_mem_part4_higher_half_kernel/README.md b/16_virtual_mem_part4_higher_half_kernel/README.md
index 89f650a37..32259671a 100644
--- a/16_virtual_mem_part4_higher_half_kernel/README.md
+++ b/16_virtual_mem_part4_higher_half_kernel/README.md
@@ -799,7 +799,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/mem
 diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs 16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
 --- 15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs
 +++ 16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
-@@ -150,11 +150,6 @@
+@@ -152,11 +152,6 @@
      )
  }
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception.rs
index 495dba34f..662c91b94 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception.rs
@@ -46,7 +46,7 @@ struct ExceptionContext {
     /// Saved program status.
     spsr_el1: SpsrEL1,
 
-    // Exception syndrome register.
+    /// Exception syndrome register.
     esr_el1: EsrEL1,
 }
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception.s b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception.s
index 5aae30b9c..91805ee7c 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception.s
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception.s
@@ -9,6 +9,7 @@
 /// Call the function provided by parameter `\handler` after saving the exception context. Provide
 /// the context as the first parameter to '\handler'.
 .macro CALL_WITH_CONTEXT handler
+__vector_\handler:
 	// Make room on the stack for the exception context.
 	sub	sp,  sp,  #16 * 17
 
@@ -47,6 +48,9 @@
 	// After returning from exception handling code, replay the saved context and return via
 	// `eret`.
 	b	__exception_restore_context
+
+.size	__vector_\handler, . - __vector_\handler
+.type	__vector_\handler, function
 .endm
 
 .macro FIQ_SUSPEND
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
index 5ecc3a71e..c9c037929 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
@@ -3,7 +3,9 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
+#![doc(
+    html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png"
+)]
 
 //! The `kernel` library.
 //!
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/main.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/main.rs
index c0c188181..5150f3afc 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/main.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/main.rs
@@ -3,7 +3,9 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
+#![doc(
+    html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png"
+)]
 
 //! The `kernel` binary.
 
diff --git a/17_kernel_symbols/Makefile b/17_kernel_symbols/Makefile
index 1e9282a28..41cecae37 100644
--- a/17_kernel_symbols/Makefile
+++ b/17_kernel_symbols/Makefile
@@ -124,7 +124,6 @@ COMPILER_ARGS = --target=$(TARGET) \
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS) --manifest-path $(KERNEL_MANIFEST)
 DOC_CMD     = cargo doc $(COMPILER_ARGS)
 CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
-CHECK_CMD   = cargo check $(COMPILER_ARGS)
 TEST_CMD    = cargo test $(COMPILER_ARGS) --manifest-path $(KERNEL_MANIFEST)
 OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
@@ -354,7 +353,7 @@ define KERNEL_TEST_RUNNER
     # started by the same.
     KERNEL_SYMBOLS_INPUT_ELF=$$TEST_ELF           \
         KERNEL_SYMBOLS_OUTPUT_ELF=$$TEST_ELF_SYMS \
-	$(MAKE) --no-print-directory -f kernel_symbols.mk > /dev/null 2>&1
+        $(MAKE) --no-print-directory -f kernel_symbols.mk > /dev/null 2>&1
 
     $(OBJCOPY_CMD) $$TEST_ELF_SYMS $$TEST_BINARY
     $(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
diff --git a/17_kernel_symbols/README.md b/17_kernel_symbols/README.md
index 72428c23f..897e38cdb 100644
--- a/17_kernel_symbols/README.md
+++ b/17_kernel_symbols/README.md
@@ -49,9 +49,6 @@ pub struct Symbol {
 }
 ```
 
-The implementation of the struct furthermore defines the two public functions `name()` and
-`contains()`, which will be used to query information.
-
 To enable the kernel to lookup symbol names, we will add an `array` to the kernel binary that
 contains all the kernel symbols. Because we can query the final symbol names and addresses only
 _after_ the kernel has been `linked`, the same approach as for the `translation tables` will be
@@ -184,11 +181,11 @@ fn kernel_symbols_slice() -> &'static [Symbol] {
 Lookup is done by just iterating over the slice:
 
 ```rust
-/// Retrieve the symbol name corresponding to a virtual address, if any.
-pub fn lookup_symbol(addr: Address<Virtual>) -> Option<&'static str> {
+/// Retrieve the symbol corresponding to a virtual address, if any.
+pub fn lookup_symbol(addr: Address<Virtual>) -> Option<&'static Symbol> {
     for i in kernel_symbols_slice() {
         if i.contains(addr.as_usize()) {
-            return Some(i.name());
+            return Some(i);
         }
     }
 
@@ -277,15 +274,17 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/excep
  use core::{arch::global_asm, cell::UnsafeCell, fmt};
  use cortex_a::{asm::barrier, registers::*};
  use tock_registers::{
-@@ -262,6 +262,12 @@
+@@ -262,6 +262,14 @@
 
          writeln!(f, "{}", self.spsr_el1)?;
          writeln!(f, "ELR_EL1: {:#018x}", self.elr_el1)?;
 +        writeln!(
 +            f,
 +            "      Symbol: {}",
-+            symbols::lookup_symbol(memory::Address::new(self.elr_el1 as usize))
-+                .unwrap_or("Symbol not found")
++            match symbols::lookup_symbol(memory::Address::new(self.elr_el1 as usize)) {
++                Some(sym) => sym.name(),
++                _ => "Symbol not found",
++            }
 +        )?;
          writeln!(f)?;
          writeln!(f, "General purpose register:")?;
@@ -333,7 +332,7 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/mem
 diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs 17_kernel_symbols/kernel/src/lib.rs
 --- 16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
 +++ 17_kernel_symbols/kernel/src/lib.rs
-@@ -135,6 +135,7 @@
+@@ -137,6 +137,7 @@
  pub mod memory;
  pub mod print;
  pub mod state;
@@ -345,7 +344,7 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs 17_kernel_sy
 diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel/src/symbols.rs 17_kernel_symbols/kernel/src/symbols.rs
 --- 16_virtual_mem_part4_higher_half_kernel/kernel/src/symbols.rs
 +++ 17_kernel_symbols/kernel/src/symbols.rs
-@@ -0,0 +1,85 @@
+@@ -0,0 +1,87 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
@@ -395,11 +394,11 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel/src/symbols.rs 17_kerne
 +// Public Code
 +//--------------------------------------------------------------------------------------------------
 +
-+/// Retrieve the symbol name corresponding to a virtual address, if any.
-+pub fn lookup_symbol(addr: Address<Virtual>) -> Option<&'static str> {
++/// Retrieve the symbol corresponding to a virtual address, if any.
++pub fn lookup_symbol(addr: Address<Virtual>) -> Option<&'static Symbol> {
 +    for i in kernel_symbols_slice() {
 +        if i.contains(addr.as_usize()) {
-+            return Some(i.name());
++            return Some(i);
 +        }
 +    }
 +
@@ -421,12 +420,14 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel/src/symbols.rs 17_kerne
 +        let first_sym = lookup_symbol(Address::new(
 +            crate::common::is_aligned as *const usize as usize,
 +        ))
-+        .unwrap();
++        .unwrap()
++        .name();
 +
 +        assert_eq!(first_sym, "libkernel::common::is_aligned");
 +
-+        let second_sym =
-+            lookup_symbol(Address::new(crate::version as *const usize as usize)).unwrap();
++        let second_sym = lookup_symbol(Address::new(crate::version as *const usize as usize))
++            .unwrap()
++            .name();
 +
 +        assert_eq!(second_sym, "libkernel::version");
 +    }
@@ -515,7 +516,7 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel_symbols/src/main.rs 17_
 diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel_symbols.mk 17_kernel_symbols/kernel_symbols.mk
 --- 16_virtual_mem_part4_higher_half_kernel/kernel_symbols.mk
 +++ 17_kernel_symbols/kernel_symbols.mk
-@@ -0,0 +1,101 @@
+@@ -0,0 +1,103 @@
 +## SPDX-License-Identifier: MIT OR Apache-2.0
 +##
 +## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
@@ -617,6 +618,8 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel_symbols.mk 17_kernel_sy
 +
 +	@$(DOCKER_TOOLS) $(EXEC_SYMBOLS_TOOL) --patch_data $(KERNEL_SYMBOLS_OUTPUT_ELF) \
 +                $(KERNEL_SYMBOLS_STRIPPED)
++
++	$(call color_progress_prefix, "Finished")
 
 diff -uNr 16_virtual_mem_part4_higher_half_kernel/libraries/debug-symbol-types/Cargo.toml 17_kernel_symbols/libraries/debug-symbol-types/Cargo.toml
 --- 16_virtual_mem_part4_higher_half_kernel/libraries/debug-symbol-types/Cargo.toml
@@ -630,7 +633,7 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/libraries/debug-symbol-types/C
 diff -uNr 16_virtual_mem_part4_higher_half_kernel/libraries/debug-symbol-types/src/lib.rs 17_kernel_symbols/libraries/debug-symbol-types/src/lib.rs
 --- 16_virtual_mem_part4_higher_half_kernel/libraries/debug-symbol-types/src/lib.rs
 +++ 17_kernel_symbols/libraries/debug-symbol-types/src/lib.rs
-@@ -0,0 +1,39 @@
+@@ -0,0 +1,45 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
@@ -643,6 +646,7 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/libraries/debug-symbol-types/s
 +
 +/// A symbol containing a size.
 +#[repr(C)]
++#[derive(Clone)]
 +pub struct Symbol {
 +    addr_range: Range<usize>,
 +    name: &'static str,
@@ -669,6 +673,11 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/libraries/debug-symbol-types/s
 +    pub fn name(&self) -> &'static str {
 +        self.name
 +    }
++
++    /// Returns the symbol's size.
++    pub fn size(&self) -> usize {
++        self.addr_range.end - self.addr_range.start
++    }
 +}
 
 diff -uNr 16_virtual_mem_part4_higher_half_kernel/Makefile 17_kernel_symbols/Makefile
@@ -700,7 +709,7 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/Makefile 17_kernel_symbols/Mak
 
 
 
-@@ -178,11 +195,18 @@
+@@ -177,11 +194,19 @@
  	@$(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(BSP) $(KERNEL_ELF_TTABLES)
 
  ##------------------------------------------------------------------------------
@@ -708,7 +717,8 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/Makefile 17_kernel_symbols/Mak
 +##------------------------------------------------------------------------------
 +$(KERNEL_ELF_TTABLES_SYMS): $(KERNEL_ELF_TTABLES_SYMS_DEPS)
 +	$(call color_header, "Generating kernel symbols and patching kernel ELF")
-+	@$(MAKE) --no-print-directory -f kernel_symbols.mk
++	@time -f "in moduloes" \
++                $(MAKE) --no-print-directory -f kernel_symbols.mk
 +
 +##------------------------------------------------------------------------------
  ## Generate the stripped kernel binary
@@ -721,7 +731,7 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/Makefile 17_kernel_symbols/Mak
  	$(call color_progress_prefix, "Name")
  	@echo $(KERNEL_BIN)
  	$(call color_progress_prefix, "Size")
-@@ -319,10 +343,19 @@
+@@ -318,10 +343,19 @@
      cd $(shell pwd)
 
      TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
@@ -736,7 +746,7 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/Makefile 17_kernel_symbols/Mak
 +    # started by the same.
 +    KERNEL_SYMBOLS_INPUT_ELF=$$TEST_ELF           \
 +        KERNEL_SYMBOLS_OUTPUT_ELF=$$TEST_ELF_SYMS \
-+	$(MAKE) --no-print-directory -f kernel_symbols.mk
++        $(MAKE) --no-print-directory -f kernel_symbols.mk > /dev/null 2>&1
 +
 +    $(OBJCOPY_CMD) $$TEST_ELF_SYMS $$TEST_BINARY
      $(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/exception.rs b/17_kernel_symbols/kernel/src/_arch/aarch64/exception.rs
index 3515d9560..6781758af 100644
--- a/17_kernel_symbols/kernel/src/_arch/aarch64/exception.rs
+++ b/17_kernel_symbols/kernel/src/_arch/aarch64/exception.rs
@@ -46,7 +46,7 @@ struct ExceptionContext {
     /// Saved program status.
     spsr_el1: SpsrEL1,
 
-    // Exception syndrome register.
+    /// Exception syndrome register.
     esr_el1: EsrEL1,
 }
 
@@ -265,8 +265,10 @@ impl fmt::Display for ExceptionContext {
         writeln!(
             f,
             "      Symbol: {}",
-            symbols::lookup_symbol(memory::Address::new(self.elr_el1 as usize))
-                .unwrap_or("Symbol not found")
+            match symbols::lookup_symbol(memory::Address::new(self.elr_el1 as usize)) {
+                Some(sym) => sym.name(),
+                _ => "Symbol not found",
+            }
         )?;
         writeln!(f)?;
         writeln!(f, "General purpose register:")?;
diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/exception.s b/17_kernel_symbols/kernel/src/_arch/aarch64/exception.s
index 5aae30b9c..91805ee7c 100644
--- a/17_kernel_symbols/kernel/src/_arch/aarch64/exception.s
+++ b/17_kernel_symbols/kernel/src/_arch/aarch64/exception.s
@@ -9,6 +9,7 @@
 /// Call the function provided by parameter `\handler` after saving the exception context. Provide
 /// the context as the first parameter to '\handler'.
 .macro CALL_WITH_CONTEXT handler
+__vector_\handler:
 	// Make room on the stack for the exception context.
 	sub	sp,  sp,  #16 * 17
 
@@ -47,6 +48,9 @@
 	// After returning from exception handling code, replay the saved context and return via
 	// `eret`.
 	b	__exception_restore_context
+
+.size	__vector_\handler, . - __vector_\handler
+.type	__vector_\handler, function
 .endm
 
 .macro FIQ_SUSPEND
diff --git a/17_kernel_symbols/kernel/src/lib.rs b/17_kernel_symbols/kernel/src/lib.rs
index 68f7e8742..8e38ad6fd 100644
--- a/17_kernel_symbols/kernel/src/lib.rs
+++ b/17_kernel_symbols/kernel/src/lib.rs
@@ -3,7 +3,9 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
+#![doc(
+    html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png"
+)]
 
 //! The `kernel` library.
 //!
diff --git a/17_kernel_symbols/kernel/src/main.rs b/17_kernel_symbols/kernel/src/main.rs
index c0c188181..5150f3afc 100644
--- a/17_kernel_symbols/kernel/src/main.rs
+++ b/17_kernel_symbols/kernel/src/main.rs
@@ -3,7 +3,9 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
+#![doc(
+    html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png"
+)]
 
 //! The `kernel` binary.
 
diff --git a/17_kernel_symbols/kernel/src/symbols.rs b/17_kernel_symbols/kernel/src/symbols.rs
index bde40a604..22001389f 100644
--- a/17_kernel_symbols/kernel/src/symbols.rs
+++ b/17_kernel_symbols/kernel/src/symbols.rs
@@ -47,11 +47,11 @@ fn kernel_symbols_slice() -> &'static [Symbol] {
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// Retrieve the symbol name corresponding to a virtual address, if any.
-pub fn lookup_symbol(addr: Address<Virtual>) -> Option<&'static str> {
+/// Retrieve the symbol corresponding to a virtual address, if any.
+pub fn lookup_symbol(addr: Address<Virtual>) -> Option<&'static Symbol> {
     for i in kernel_symbols_slice() {
         if i.contains(addr.as_usize()) {
-            return Some(i.name());
+            return Some(i);
         }
     }
 
@@ -73,12 +73,14 @@ mod tests {
         let first_sym = lookup_symbol(Address::new(
             crate::common::is_aligned as *const usize as usize,
         ))
-        .unwrap();
+        .unwrap()
+        .name();
 
         assert_eq!(first_sym, "libkernel::common::is_aligned");
 
-        let second_sym =
-            lookup_symbol(Address::new(crate::version as *const usize as usize)).unwrap();
+        let second_sym = lookup_symbol(Address::new(crate::version as *const usize as usize))
+            .unwrap()
+            .name();
 
         assert_eq!(second_sym, "libkernel::version");
     }
diff --git a/17_kernel_symbols/libraries/debug-symbol-types/src/lib.rs b/17_kernel_symbols/libraries/debug-symbol-types/src/lib.rs
index 4c12e86fe..b6dff082f 100644
--- a/17_kernel_symbols/libraries/debug-symbol-types/src/lib.rs
+++ b/17_kernel_symbols/libraries/debug-symbol-types/src/lib.rs
@@ -10,6 +10,7 @@ use core::ops::Range;
 
 /// A symbol containing a size.
 #[repr(C)]
+#[derive(Clone)]
 pub struct Symbol {
     addr_range: Range<usize>,
     name: &'static str,
@@ -36,4 +37,9 @@ impl Symbol {
     pub fn name(&self) -> &'static str {
         self.name
     }
+
+    /// Returns the symbol's size.
+    pub fn size(&self) -> usize {
+        self.addr_range.end - self.addr_range.start
+    }
 }
diff --git a/X1_JTAG_boot/Makefile b/X1_JTAG_boot/Makefile
index d53950118..a497ad815 100644
--- a/X1_JTAG_boot/Makefile
+++ b/X1_JTAG_boot/Makefile
@@ -84,7 +84,6 @@ COMPILER_ARGS = --target=$(TARGET) \
 RUSTC_CMD   = cargo rustc $(COMPILER_ARGS)
 DOC_CMD     = cargo doc $(COMPILER_ARGS)
 CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
-CHECK_CMD   = cargo check $(COMPILER_ARGS)
 OBJCOPY_CMD = rust-objcopy \
     --strip-all            \
     -O binary
diff --git a/X1_JTAG_boot/src/main.rs b/X1_JTAG_boot/src/main.rs
index d2f9dbde3..0502e1c98 100644
--- a/X1_JTAG_boot/src/main.rs
+++ b/X1_JTAG_boot/src/main.rs
@@ -3,7 +3,9 @@
 // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
-#![doc(html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png")]
+#![doc(
+    html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png"
+)]
 
 //! The `kernel` binary.
 //!

From cc09970b2d1d0dfa5517824b365c24a83e8dbae5 Mon Sep 17 00:00:00 2001
From: Zicklag <zicklag@katharostech.com>
Date: Wed, 27 Apr 2022 19:21:47 -0500
Subject: [PATCH 155/214] Add VSCode Rust Analyzer Settings

Fixes errors reported by rust analyzer due to differing target and a
missing cargo feature.
---
 .vscode/settings.json | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/.vscode/settings.json b/.vscode/settings.json
index d77cd3373..292bf2a93 100644
--- a/.vscode/settings.json
+++ b/.vscode/settings.json
@@ -1,4 +1,10 @@
 {
   "editor.formatOnSave": true,
-  "editor.rulers": [100]
+  "editor.rulers": [100],
+  "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
+  "rust-analyzer.cargo.features": ["bsp_rpi3"],
+  "rust-analyzer.checkOnSave.allTargets": false,
+  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
+  "rust-analyzer.lens.debug": false,
+  "rust-analyzer.lens.run": false
 }

From 8ff358a50b7b46217dff5c681371467d1af104f0 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 2 May 2022 23:24:29 +0200
Subject: [PATCH 156/214] Add tutorial 18

---
 18_backtrace/.cargo/config.toml               |    2 +
 18_backtrace/.vscode/settings.json            |   10 +
 18_backtrace/Cargo.lock                       |   96 ++
 18_backtrace/Cargo.toml                       |   11 +
 18_backtrace/Makefile                         |  389 ++++++
 18_backtrace/README.md                        | 1244 +++++++++++++++++
 18_backtrace/kernel/Cargo.toml                |   70 +
 18_backtrace/kernel/build.rs                  |   20 +
 .../kernel/src/_arch/aarch64/backtrace.rs     |  136 ++
 18_backtrace/kernel/src/_arch/aarch64/cpu.rs  |   49 +
 .../kernel/src/_arch/aarch64/cpu/boot.rs      |  113 ++
 .../kernel/src/_arch/aarch64/cpu/boot.s       |  100 ++
 .../kernel/src/_arch/aarch64/cpu/smp.rs       |   30 +
 .../kernel/src/_arch/aarch64/exception.rs     |  323 +++++
 .../kernel/src/_arch/aarch64/exception.s      |  190 +++
 .../_arch/aarch64/exception/asynchronous.rs   |  152 ++
 .../kernel/src/_arch/aarch64/memory/mmu.rs    |  158 +++
 .../aarch64/memory/mmu/translation_table.rs   |  521 +++++++
 18_backtrace/kernel/src/_arch/aarch64/time.rs |  121 ++
 18_backtrace/kernel/src/backtrace.rs          |  112 ++
 18_backtrace/kernel/src/bsp.rs                |   13 +
 18_backtrace/kernel/src/bsp/device_driver.rs  |   16 +
 .../kernel/src/bsp/device_driver/arm.rs       |    9 +
 .../kernel/src/bsp/device_driver/arm/gicv2.rs |  246 ++++
 .../src/bsp/device_driver/arm/gicv2/gicc.rs   |  156 +++
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |  209 +++
 .../kernel/src/bsp/device_driver/bcm.rs       |   15 +
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  259 ++++
 .../bcm/bcm2xxx_interrupt_controller.rs       |  138 ++
 .../peripheral_ic.rs                          |  192 +++
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  536 +++++++
 .../kernel/src/bsp/device_driver/common.rs    |   38 +
 18_backtrace/kernel/src/bsp/raspberrypi.rs    |   62 +
 .../kernel/src/bsp/raspberrypi/console.rs     |   98 ++
 .../kernel/src/bsp/raspberrypi/cpu.rs         |   14 +
 .../kernel/src/bsp/raspberrypi/driver.rs      |   61 +
 .../kernel/src/bsp/raspberrypi/exception.rs   |    7 +
 .../bsp/raspberrypi/exception/asynchronous.rs |   36 +
 .../kernel/src/bsp/raspberrypi/kernel.ld      |  114 ++
 .../kernel_virt_addr_space_size.ld            |    1 +
 .../kernel/src/bsp/raspberrypi/memory.rs      |  227 +++
 .../kernel/src/bsp/raspberrypi/memory/mmu.rs  |  179 +++
 18_backtrace/kernel/src/common.rs             |   29 +
 18_backtrace/kernel/src/console.rs            |   53 +
 18_backtrace/kernel/src/cpu.rs                |   21 +
 18_backtrace/kernel/src/cpu/boot.rs           |    9 +
 18_backtrace/kernel/src/cpu/smp.rs            |   14 +
 18_backtrace/kernel/src/driver.rs             |   62 +
 18_backtrace/kernel/src/exception.rs          |   48 +
 .../kernel/src/exception/asynchronous.rs      |  152 ++
 18_backtrace/kernel/src/lib.rs                |  188 +++
 18_backtrace/kernel/src/main.rs               |  111 ++
 18_backtrace/kernel/src/memory.rs             |  191 +++
 18_backtrace/kernel/src/memory/mmu.rs         |  270 ++++
 18_backtrace/kernel/src/memory/mmu/alloc.rs   |   70 +
 .../kernel/src/memory/mmu/mapping_record.rs   |  233 +++
 .../src/memory/mmu/translation_table.rs       |  137 ++
 18_backtrace/kernel/src/memory/mmu/types.rs   |  378 +++++
 18_backtrace/kernel/src/panic_wait.rs         |  106 ++
 18_backtrace/kernel/src/print.rs              |   94 ++
 18_backtrace/kernel/src/state.rs              |   92 ++
 18_backtrace/kernel/src/symbols.rs            |   87 ++
 18_backtrace/kernel/src/synchronization.rs    |  159 +++
 18_backtrace/kernel/src/time.rs               |   37 +
 .../kernel/tests/00_console_sanity.rb         |   48 +
 .../kernel/tests/00_console_sanity.rs         |   39 +
 18_backtrace/kernel/tests/01_timer_sanity.rs  |   50 +
 .../tests/02_exception_sync_page_fault.rs     |   37 +
 .../tests/03_exception_restore_sanity.rb      |   25 +
 .../tests/03_exception_restore_sanity.rs      |   49 +
 .../kernel/tests/04_exception_irq_sanity.rs   |   67 +
 .../kernel/tests/05_backtrace_sanity.rb       |   39 +
 .../kernel/tests/05_backtrace_sanity.rs       |   31 +
 .../tests/06_backtrace_invalid_frame.rb       |   26 +
 .../tests/06_backtrace_invalid_frame.rs       |   33 +
 .../kernel/tests/07_backtrace_invalid_link.rb |   25 +
 .../kernel/tests/07_backtrace_invalid_link.rs |   38 +
 18_backtrace/kernel/tests/boot_test_string.rb |    3 +
 .../kernel/tests/panic_exit_success/mod.rs    |    9 +
 .../kernel/tests/panic_wait_forever/mod.rs    |    9 +
 18_backtrace/kernel_symbols.mk                |  103 ++
 18_backtrace/kernel_symbols/Cargo.toml        |   15 +
 18_backtrace/kernel_symbols/build.rs          |   14 +
 18_backtrace/kernel_symbols/kernel_symbols.ld |   15 +
 18_backtrace/kernel_symbols/src/main.rs       |   16 +
 .../libraries/debug-symbol-types/Cargo.toml   |    4 +
 .../libraries/debug-symbol-types/src/lib.rs   |   45 +
 18_backtrace/libraries/test-macros/Cargo.toml |   14 +
 18_backtrace/libraries/test-macros/src/lib.rs |   29 +
 18_backtrace/libraries/test-types/Cargo.toml  |    5 +
 18_backtrace/libraries/test-types/src/lib.rs  |   16 +
 .../tools/kernel_symbols_tool/cmds.rb         |   45 +
 .../tools/kernel_symbols_tool/kernel_elf.rb   |   74 +
 .../tools/kernel_symbols_tool/main.rb         |   47 +
 .../tools/translation_table_tool/arch.rb      |  314 +++++
 .../tools/translation_table_tool/bsp.rb       |   50 +
 .../tools/translation_table_tool/generic.rb   |  179 +++
 .../translation_table_tool/kernel_elf.rb      |   96 ++
 .../tools/translation_table_tool/main.rb      |   46 +
 doc/18_stack_frames.png                       |  Bin 0 -> 47923 bytes
 100 files changed, 10669 insertions(+)
 create mode 100644 18_backtrace/.cargo/config.toml
 create mode 100644 18_backtrace/.vscode/settings.json
 create mode 100644 18_backtrace/Cargo.lock
 create mode 100644 18_backtrace/Cargo.toml
 create mode 100644 18_backtrace/Makefile
 create mode 100644 18_backtrace/README.md
 create mode 100644 18_backtrace/kernel/Cargo.toml
 create mode 100644 18_backtrace/kernel/build.rs
 create mode 100644 18_backtrace/kernel/src/_arch/aarch64/backtrace.rs
 create mode 100644 18_backtrace/kernel/src/_arch/aarch64/cpu.rs
 create mode 100644 18_backtrace/kernel/src/_arch/aarch64/cpu/boot.rs
 create mode 100644 18_backtrace/kernel/src/_arch/aarch64/cpu/boot.s
 create mode 100644 18_backtrace/kernel/src/_arch/aarch64/cpu/smp.rs
 create mode 100644 18_backtrace/kernel/src/_arch/aarch64/exception.rs
 create mode 100644 18_backtrace/kernel/src/_arch/aarch64/exception.s
 create mode 100644 18_backtrace/kernel/src/_arch/aarch64/exception/asynchronous.rs
 create mode 100644 18_backtrace/kernel/src/_arch/aarch64/memory/mmu.rs
 create mode 100644 18_backtrace/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
 create mode 100644 18_backtrace/kernel/src/_arch/aarch64/time.rs
 create mode 100644 18_backtrace/kernel/src/backtrace.rs
 create mode 100644 18_backtrace/kernel/src/bsp.rs
 create mode 100644 18_backtrace/kernel/src/bsp/device_driver.rs
 create mode 100644 18_backtrace/kernel/src/bsp/device_driver/arm.rs
 create mode 100644 18_backtrace/kernel/src/bsp/device_driver/arm/gicv2.rs
 create mode 100644 18_backtrace/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
 create mode 100644 18_backtrace/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
 create mode 100644 18_backtrace/kernel/src/bsp/device_driver/bcm.rs
 create mode 100644 18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 create mode 100644 18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
 create mode 100644 18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
 create mode 100644 18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 create mode 100644 18_backtrace/kernel/src/bsp/device_driver/common.rs
 create mode 100644 18_backtrace/kernel/src/bsp/raspberrypi.rs
 create mode 100644 18_backtrace/kernel/src/bsp/raspberrypi/console.rs
 create mode 100644 18_backtrace/kernel/src/bsp/raspberrypi/cpu.rs
 create mode 100644 18_backtrace/kernel/src/bsp/raspberrypi/driver.rs
 create mode 100644 18_backtrace/kernel/src/bsp/raspberrypi/exception.rs
 create mode 100644 18_backtrace/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
 create mode 100644 18_backtrace/kernel/src/bsp/raspberrypi/kernel.ld
 create mode 100644 18_backtrace/kernel/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
 create mode 100644 18_backtrace/kernel/src/bsp/raspberrypi/memory.rs
 create mode 100644 18_backtrace/kernel/src/bsp/raspberrypi/memory/mmu.rs
 create mode 100644 18_backtrace/kernel/src/common.rs
 create mode 100644 18_backtrace/kernel/src/console.rs
 create mode 100644 18_backtrace/kernel/src/cpu.rs
 create mode 100644 18_backtrace/kernel/src/cpu/boot.rs
 create mode 100644 18_backtrace/kernel/src/cpu/smp.rs
 create mode 100644 18_backtrace/kernel/src/driver.rs
 create mode 100644 18_backtrace/kernel/src/exception.rs
 create mode 100644 18_backtrace/kernel/src/exception/asynchronous.rs
 create mode 100644 18_backtrace/kernel/src/lib.rs
 create mode 100644 18_backtrace/kernel/src/main.rs
 create mode 100644 18_backtrace/kernel/src/memory.rs
 create mode 100644 18_backtrace/kernel/src/memory/mmu.rs
 create mode 100644 18_backtrace/kernel/src/memory/mmu/alloc.rs
 create mode 100644 18_backtrace/kernel/src/memory/mmu/mapping_record.rs
 create mode 100644 18_backtrace/kernel/src/memory/mmu/translation_table.rs
 create mode 100644 18_backtrace/kernel/src/memory/mmu/types.rs
 create mode 100644 18_backtrace/kernel/src/panic_wait.rs
 create mode 100644 18_backtrace/kernel/src/print.rs
 create mode 100644 18_backtrace/kernel/src/state.rs
 create mode 100644 18_backtrace/kernel/src/symbols.rs
 create mode 100644 18_backtrace/kernel/src/synchronization.rs
 create mode 100644 18_backtrace/kernel/src/time.rs
 create mode 100644 18_backtrace/kernel/tests/00_console_sanity.rb
 create mode 100644 18_backtrace/kernel/tests/00_console_sanity.rs
 create mode 100644 18_backtrace/kernel/tests/01_timer_sanity.rs
 create mode 100644 18_backtrace/kernel/tests/02_exception_sync_page_fault.rs
 create mode 100644 18_backtrace/kernel/tests/03_exception_restore_sanity.rb
 create mode 100644 18_backtrace/kernel/tests/03_exception_restore_sanity.rs
 create mode 100644 18_backtrace/kernel/tests/04_exception_irq_sanity.rs
 create mode 100644 18_backtrace/kernel/tests/05_backtrace_sanity.rb
 create mode 100644 18_backtrace/kernel/tests/05_backtrace_sanity.rs
 create mode 100644 18_backtrace/kernel/tests/06_backtrace_invalid_frame.rb
 create mode 100644 18_backtrace/kernel/tests/06_backtrace_invalid_frame.rs
 create mode 100644 18_backtrace/kernel/tests/07_backtrace_invalid_link.rb
 create mode 100644 18_backtrace/kernel/tests/07_backtrace_invalid_link.rs
 create mode 100644 18_backtrace/kernel/tests/boot_test_string.rb
 create mode 100644 18_backtrace/kernel/tests/panic_exit_success/mod.rs
 create mode 100644 18_backtrace/kernel/tests/panic_wait_forever/mod.rs
 create mode 100644 18_backtrace/kernel_symbols.mk
 create mode 100644 18_backtrace/kernel_symbols/Cargo.toml
 create mode 100644 18_backtrace/kernel_symbols/build.rs
 create mode 100644 18_backtrace/kernel_symbols/kernel_symbols.ld
 create mode 100644 18_backtrace/kernel_symbols/src/main.rs
 create mode 100644 18_backtrace/libraries/debug-symbol-types/Cargo.toml
 create mode 100644 18_backtrace/libraries/debug-symbol-types/src/lib.rs
 create mode 100644 18_backtrace/libraries/test-macros/Cargo.toml
 create mode 100644 18_backtrace/libraries/test-macros/src/lib.rs
 create mode 100644 18_backtrace/libraries/test-types/Cargo.toml
 create mode 100644 18_backtrace/libraries/test-types/src/lib.rs
 create mode 100644 18_backtrace/tools/kernel_symbols_tool/cmds.rb
 create mode 100644 18_backtrace/tools/kernel_symbols_tool/kernel_elf.rb
 create mode 100755 18_backtrace/tools/kernel_symbols_tool/main.rb
 create mode 100644 18_backtrace/tools/translation_table_tool/arch.rb
 create mode 100644 18_backtrace/tools/translation_table_tool/bsp.rb
 create mode 100644 18_backtrace/tools/translation_table_tool/generic.rb
 create mode 100644 18_backtrace/tools/translation_table_tool/kernel_elf.rb
 create mode 100755 18_backtrace/tools/translation_table_tool/main.rb
 create mode 100644 doc/18_stack_frames.png

diff --git a/18_backtrace/.cargo/config.toml b/18_backtrace/.cargo/config.toml
new file mode 100644
index 000000000..e34764853
--- /dev/null
+++ b/18_backtrace/.cargo/config.toml
@@ -0,0 +1,2 @@
+[target.'cfg(target_os = "none")']
+runner = "target/kernel_test_runner.sh"
diff --git a/18_backtrace/.vscode/settings.json b/18_backtrace/.vscode/settings.json
new file mode 100644
index 000000000..292bf2a93
--- /dev/null
+++ b/18_backtrace/.vscode/settings.json
@@ -0,0 +1,10 @@
+{
+  "editor.formatOnSave": true,
+  "editor.rulers": [100],
+  "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
+  "rust-analyzer.cargo.features": ["bsp_rpi3"],
+  "rust-analyzer.checkOnSave.allTargets": false,
+  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
+  "rust-analyzer.lens.debug": false,
+  "rust-analyzer.lens.run": false
+}
diff --git a/18_backtrace/Cargo.lock b/18_backtrace/Cargo.lock
new file mode 100644
index 000000000..b851d8e39
--- /dev/null
+++ b/18_backtrace/Cargo.lock
@@ -0,0 +1,96 @@
+# This file is automatically @generated by Cargo.
+# It is not intended for manual editing.
+version = 3
+
+[[package]]
+name = "cortex-a"
+version = "7.2.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
+dependencies = [
+ "tock-registers",
+]
+
+[[package]]
+name = "debug-symbol-types"
+version = "0.1.0"
+
+[[package]]
+name = "kernel_symbols"
+version = "0.1.0"
+dependencies = [
+ "debug-symbol-types",
+]
+
+[[package]]
+name = "mingo"
+version = "0.18.0"
+dependencies = [
+ "cortex-a",
+ "debug-symbol-types",
+ "qemu-exit",
+ "test-macros",
+ "test-types",
+ "tock-registers",
+]
+
+[[package]]
+name = "proc-macro2"
+version = "1.0.37"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "ec757218438d5fda206afc041538b2f6d889286160d649a86a24d37e1235afd1"
+dependencies = [
+ "unicode-xid",
+]
+
+[[package]]
+name = "qemu-exit"
+version = "3.0.1"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
+
+[[package]]
+name = "quote"
+version = "1.0.18"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "a1feb54ed693b93a84e14094943b84b7c4eae204c512b7ccb95ab0c66d278ad1"
+dependencies = [
+ "proc-macro2",
+]
+
+[[package]]
+name = "syn"
+version = "1.0.91"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "b683b2b825c8eef438b77c36a06dc262294da3d5a5813fac20da149241dcd44d"
+dependencies = [
+ "proc-macro2",
+ "quote",
+ "unicode-xid",
+]
+
+[[package]]
+name = "test-macros"
+version = "0.1.0"
+dependencies = [
+ "proc-macro2",
+ "quote",
+ "syn",
+ "test-types",
+]
+
+[[package]]
+name = "test-types"
+version = "0.1.0"
+
+[[package]]
+name = "tock-registers"
+version = "0.7.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
+
+[[package]]
+name = "unicode-xid"
+version = "0.2.2"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "8ccb82d61f80a663efe1f787a51b16b5a51e3314d6ac365b08639f52387b33f3"
diff --git a/18_backtrace/Cargo.toml b/18_backtrace/Cargo.toml
new file mode 100644
index 000000000..38eeb1165
--- /dev/null
+++ b/18_backtrace/Cargo.toml
@@ -0,0 +1,11 @@
+[workspace]
+
+members = [
+        "libraries/*",
+        "kernel",
+        "kernel_symbols"
+]
+
+[profile.release]
+lto = true
+debug = true
diff --git a/18_backtrace/Makefile b/18_backtrace/Makefile
new file mode 100644
index 000000000..85826c12f
--- /dev/null
+++ b/18_backtrace/Makefile
@@ -0,0 +1,389 @@
+## SPDX-License-Identifier: MIT OR Apache-2.0
+##
+## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+include ../common/format.mk
+include ../common/docker.mk
+
+##--------------------------------------------------------------------------------------------------
+## Optional, user-provided configuration values
+##--------------------------------------------------------------------------------------------------
+
+# Default to the RPi3.
+BSP ?= rpi3
+
+# Default to a serial device name that is common in Linux.
+DEV_SERIAL ?= /dev/ttyUSB0
+
+# Optional integration test name.
+ifdef TEST
+    TEST_ARG = --test $(TEST)
+else
+    TEST_ARG = --test '*'
+endif
+
+
+
+##--------------------------------------------------------------------------------------------------
+## BSP-specific configuration values
+##--------------------------------------------------------------------------------------------------
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+
+ifeq ($(BSP),rpi3)
+    TARGET            = aarch64-unknown-none-softfloat
+    KERNEL_BIN        = kernel8.img
+    QEMU_BINARY       = qemu-system-aarch64
+    QEMU_MACHINE_TYPE = raspi3
+    QEMU_RELEASE_ARGS = -serial stdio -display none
+    QEMU_TEST_ARGS    = $(QEMU_RELEASE_ARGS) -semihosting
+    OBJDUMP_BINARY    = aarch64-none-elf-objdump
+    NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
+    OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
+    JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
+    LD_SCRIPT_PATH    = $(shell pwd)/kernel/src/bsp/raspberrypi
+    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53 -C force-frame-pointers
+else ifeq ($(BSP),rpi4)
+    TARGET            = aarch64-unknown-none-softfloat
+    KERNEL_BIN        = kernel8.img
+    QEMU_BINARY       = qemu-system-aarch64
+    QEMU_MACHINE_TYPE =
+    QEMU_RELEASE_ARGS = -serial stdio -display none
+    QEMU_TEST_ARGS    = $(QEMU_RELEASE_ARGS) -semihosting
+    OBJDUMP_BINARY    = aarch64-none-elf-objdump
+    NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
+    OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
+    JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
+    LD_SCRIPT_PATH    = $(shell pwd)/kernel/src/bsp/raspberrypi
+    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72 -C force-frame-pointers
+endif
+
+# Export for build.rs.
+export LD_SCRIPT_PATH
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Targets and Prerequisites
+##--------------------------------------------------------------------------------------------------
+KERNEL_MANIFEST      = kernel/Cargo.toml
+KERNEL_LINKER_SCRIPT = kernel.ld
+LAST_BUILD_CONFIG    = target/$(BSP).build_config
+
+KERNEL_ELF_RAW      = target/$(TARGET)/release/kernel
+# This parses cargo's dep-info file.
+# https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
+KERNEL_ELF_RAW_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
+
+##------------------------------------------------------------------------------
+## Translation tables
+##------------------------------------------------------------------------------
+TT_TOOL_PATH = tools/translation_table_tool
+
+KERNEL_ELF_TTABLES      = target/$(TARGET)/release/kernel+ttables
+KERNEL_ELF_TTABLES_DEPS = $(KERNEL_ELF_RAW) $(wildcard $(TT_TOOL_PATH)/*)
+
+##------------------------------------------------------------------------------
+## Kernel symbols
+##------------------------------------------------------------------------------
+export KERNEL_SYMBOLS_TOOL_PATH = tools/kernel_symbols_tool
+
+KERNEL_ELF_TTABLES_SYMS = target/$(TARGET)/release/kernel+ttables+symbols
+
+# Unlike with KERNEL_ELF_RAW, we are not relying on dep-info here. One of the reasons being that the
+# name of the generated symbols file varies between runs, which can cause confusion.
+KERNEL_ELF_TTABLES_SYMS_DEPS = $(KERNEL_ELF_TTABLES) \
+    $(wildcard kernel_symbols/*)                     \
+    $(wildcard $(KERNEL_SYMBOLS_TOOL_PATH)/*)
+
+export TARGET
+export KERNEL_SYMBOLS_INPUT_ELF  = $(KERNEL_ELF_TTABLES)
+export KERNEL_SYMBOLS_OUTPUT_ELF = $(KERNEL_ELF_TTABLES_SYMS)
+
+KERNEL_ELF = $(KERNEL_ELF_TTABLES_SYMS)
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Command building blocks
+##--------------------------------------------------------------------------------------------------
+RUSTFLAGS = $(RUSTC_MISC_ARGS)                   \
+    -C link-arg=--library-path=$(LD_SCRIPT_PATH) \
+    -C link-arg=--script=$(KERNEL_LINKER_SCRIPT)
+
+RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) \
+    -D warnings                   \
+    -D missing_docs
+
+FEATURES      = --features bsp_$(BSP)
+COMPILER_ARGS = --target=$(TARGET) \
+    $(FEATURES)                    \
+    --release
+
+# build-std can be skipped for helper commands that do not rely on correct stack frames and other
+# custom compiler options. This results in a huge speedup.
+RUSTC_CMD   = cargo rustc $(COMPILER_ARGS) -Z build-std=core --manifest-path $(KERNEL_MANIFEST)
+DOC_CMD     = cargo doc $(COMPILER_ARGS)
+CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
+TEST_CMD    = cargo test $(COMPILER_ARGS) -Z build-std=core --manifest-path $(KERNEL_MANIFEST)
+OBJCOPY_CMD = rust-objcopy \
+    --strip-all            \
+    -O binary
+
+EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
+EXEC_TT_TOOL       = ruby $(TT_TOOL_PATH)/main.rb
+EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
+EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
+
+##------------------------------------------------------------------------------
+## Dockerization
+##------------------------------------------------------------------------------
+DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
+DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
+DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
+DOCKER_ARG_DIR_JTAG   = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
+DOCKER_ARG_DEV        = --privileged -v /dev:/dev
+DOCKER_ARG_NET        = --network host
+
+# DOCKER_IMAGE defined in include file (see top of this file).
+DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
+DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
+DOCKER_GDB   = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
+
+# Dockerize commands, which require USB device passthrough, only on Linux.
+ifeq ($(shell uname -s),Linux)
+    DOCKER_CMD_DEV = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DEV)
+
+    DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
+    DOCKER_JTAGBOOT  = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_ARG_DIR_JTAG) $(DOCKER_IMAGE)
+    DOCKER_OPENOCD   = $(DOCKER_CMD_DEV) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
+else
+    DOCKER_OPENOCD   = echo "Not yet supported on non-Linux systems."; \#
+endif
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: all doc qemu chainboot clippy clean readelf objdump nm check
+
+all: $(KERNEL_BIN)
+
+##------------------------------------------------------------------------------
+## Save the configuration as a file, so make understands if it changed.
+##------------------------------------------------------------------------------
+$(LAST_BUILD_CONFIG):
+	@rm -f target/*.build_config
+	@mkdir -p target
+	@touch $(LAST_BUILD_CONFIG)
+
+##------------------------------------------------------------------------------
+## Compile the kernel ELF
+##------------------------------------------------------------------------------
+$(KERNEL_ELF_RAW): $(KERNEL_ELF_RAW_DEPS)
+	$(call color_header, "Compiling kernel ELF - $(BSP)")
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
+
+##------------------------------------------------------------------------------
+## Precompute the kernel translation tables and patch them into the kernel ELF
+##------------------------------------------------------------------------------
+$(KERNEL_ELF_TTABLES): $(KERNEL_ELF_TTABLES_DEPS)
+	$(call color_header, "Precomputing kernel translation tables and patching kernel ELF")
+	@cp $(KERNEL_ELF_RAW) $(KERNEL_ELF_TTABLES)
+	@$(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(BSP) $(KERNEL_ELF_TTABLES)
+
+##------------------------------------------------------------------------------
+## Generate kernel symbols and patch them into the kernel ELF
+##------------------------------------------------------------------------------
+$(KERNEL_ELF_TTABLES_SYMS): $(KERNEL_ELF_TTABLES_SYMS_DEPS)
+	$(call color_header, "Generating kernel symbols and patching kernel ELF")
+	@time -f "in %es" \
+                $(MAKE) --no-print-directory -f kernel_symbols.mk
+
+##------------------------------------------------------------------------------
+## Generate the stripped kernel binary
+##------------------------------------------------------------------------------
+$(KERNEL_BIN): $(KERNEL_ELF_TTABLES_SYMS)
+	$(call color_header, "Generating stripped binary")
+	@$(OBJCOPY_CMD) $(KERNEL_ELF_TTABLES_SYMS) $(KERNEL_BIN)
+	$(call color_progress_prefix, "Name")
+	@echo $(KERNEL_BIN)
+	$(call color_progress_prefix, "Size")
+	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
+
+##------------------------------------------------------------------------------
+## Generate the documentation
+##------------------------------------------------------------------------------
+doc:
+	$(call color_header, "Generating docs")
+	@$(DOC_CMD) --document-private-items --open
+
+##------------------------------------------------------------------------------
+## Run the kernel in QEMU
+##------------------------------------------------------------------------------
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
+qemu:
+	$(call color_header, "$(QEMU_MISSING_STRING)")
+
+else # QEMU is supported.
+
+qemu: $(KERNEL_BIN)
+	$(call color_header, "Launching QEMU")
+	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
+
+endif
+
+##------------------------------------------------------------------------------
+## Push the kernel to the real HW target
+##------------------------------------------------------------------------------
+chainboot: $(KERNEL_BIN)
+	@$(DOCKER_CHAINBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(KERNEL_BIN)
+
+##------------------------------------------------------------------------------
+## Run clippy
+##------------------------------------------------------------------------------
+clippy:
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD) --features test_build --tests \
+                --manifest-path $(KERNEL_MANIFEST)
+
+##------------------------------------------------------------------------------
+## Clean
+##------------------------------------------------------------------------------
+clean:
+	rm -rf target $(KERNEL_BIN)
+
+##------------------------------------------------------------------------------
+## Run readelf
+##------------------------------------------------------------------------------
+readelf: $(KERNEL_ELF)
+	$(call color_header, "Launching readelf")
+	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
+
+##------------------------------------------------------------------------------
+## Run objdump
+##------------------------------------------------------------------------------
+objdump: $(KERNEL_ELF)
+	$(call color_header, "Launching objdump")
+	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
+                --section .text   \
+                --section .rodata \
+                --section .got    \
+                $(KERNEL_ELF) | rustfilt
+
+##------------------------------------------------------------------------------
+## Run nm
+##------------------------------------------------------------------------------
+nm: $(KERNEL_ELF)
+	$(call color_header, "Launching nm")
+	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Debugging targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: jtagboot openocd gdb gdb-opt0
+
+##------------------------------------------------------------------------------
+## Push the JTAG boot image to the real HW target
+##------------------------------------------------------------------------------
+jtagboot:
+	@$(DOCKER_JTAGBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(JTAG_BOOT_IMAGE)
+
+##------------------------------------------------------------------------------
+## Start OpenOCD session
+##------------------------------------------------------------------------------
+openocd:
+	$(call color_header, "Launching OpenOCD")
+	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
+
+##------------------------------------------------------------------------------
+## Start GDB session
+##------------------------------------------------------------------------------
+gdb-opt0: RUSTC_MISC_ARGS += -C opt-level=0
+gdb gdb-opt0: $(KERNEL_ELF)
+	$(call color_header, "Launching GDB")
+	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Testing targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: test test_boot test_unit test_integration
+
+test_unit test_integration: FEATURES += --features test_build
+
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
+test_boot test_unit test_integration test:
+	$(call color_header, "$(QEMU_MISSING_STRING)")
+
+else # QEMU is supported.
+
+##------------------------------------------------------------------------------
+## Run boot test
+##------------------------------------------------------------------------------
+test_boot: $(KERNEL_BIN)
+	$(call color_header, "Boot test - $(BSP)")
+	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
+
+##------------------------------------------------------------------------------
+## Helpers for unit and integration test targets
+##------------------------------------------------------------------------------
+define KERNEL_TEST_RUNNER
+    #!/usr/bin/env bash
+
+    # The cargo test runner seems to change into the crate under test's directory. Therefore, ensure
+    # this script executes from the root.
+    cd $(shell pwd)
+
+    TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
+    TEST_ELF_SYMS="$${TEST_ELF}_syms"
+    TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
+
+    $(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(BSP) $$TEST_ELF > /dev/null
+
+    # This overrides the two ENV variables. The other ENV variables that are required as input for
+    # the .mk file are set already because they are exported by this Makefile and this script is
+    # started by the same.
+    KERNEL_SYMBOLS_INPUT_ELF=$$TEST_ELF           \
+        KERNEL_SYMBOLS_OUTPUT_ELF=$$TEST_ELF_SYMS \
+        $(MAKE) --no-print-directory -f kernel_symbols.mk > /dev/null 2>&1
+
+    $(OBJCOPY_CMD) $$TEST_ELF_SYMS $$TEST_BINARY
+    $(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
+endef
+
+export KERNEL_TEST_RUNNER
+
+define test_prepare
+    @mkdir -p target
+    @echo "$$KERNEL_TEST_RUNNER" > target/kernel_test_runner.sh
+    @chmod +x target/kernel_test_runner.sh
+endef
+
+##------------------------------------------------------------------------------
+## Run unit test(s)
+##------------------------------------------------------------------------------
+test_unit:
+	$(call color_header, "Compiling unit test(s) - $(BSP)")
+	$(call test_prepare)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) --lib
+
+##------------------------------------------------------------------------------
+## Run integration test(s)
+##------------------------------------------------------------------------------
+test_integration:
+	$(call color_header, "Compiling integration test(s) - $(BSP)")
+	$(call test_prepare)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) $(TEST_ARG)
+
+test: test_boot test_unit test_integration
+
+endif
diff --git a/18_backtrace/README.md b/18_backtrace/README.md
new file mode 100644
index 000000000..0963df1d4
--- /dev/null
+++ b/18_backtrace/README.md
@@ -0,0 +1,1244 @@
+# Tutorial 18 - Backtracing
+
+## tl;dr
+
+- Support for [`backtracing`] is implemented into the kernel.
+
+```console
+[    0.002782] Writing to bottom of address space to address 1 GiB...
+[    0.004623] Kernel panic!
+
+Panic location:
+      File 'kernel/src/_arch/aarch64/exception.rs', line 59, column 5
+
+[...]
+
+Backtrace:
+      ----------------------------------------------------------------------------------------------
+          Address            Function containing address
+      ----------------------------------------------------------------------------------------------
+       1. ffffffffc0001294 | core::fmt::write
+       2. ffffffffc0005560 | libkernel::panic_wait::_panic_print
+       3. ffffffffc00054a0 | rust_begin_unwind
+       4. ffffffffc0002950 | core::panicking::panic_fmt
+       5. ffffffffc0004898 | current_elx_synchronous
+       6. ffffffffc0000a74 | __vector_current_elx_synchronous
+       7. ffffffffc000111c | kernel_init
+      ----------------------------------------------------------------------------------------------
+```
+
+[`backtracing`]: https://en.wikipedia.org/wiki/Stack_trace
+
+## Table of Contents
+
+- [Introduction](#introduction)
+- [Implementation](#implementation)
+  - [Chasing Frames](#chasing-frames)
+  - [Compiler Changes](#compiler-changes)
+  - [Supporting Changes](#supporting-changes)
+- [Test it](#test-it)
+- [Diff to previous](#diff-to-previous)
+
+## Introduction
+
+Since the kernel gained support for looking up `symbol names` in the previous tutorial, it is now
+possible to implement support for printing meaningful backtraces (also called `stack traces`). The
+primary use-case will be printing backtraces during a `panic`, which will ease debugging. This is a
+good time to add this feature, since some of the upcoming tutorials will cover complex topics and
+code changes, so that this will come in handy during development.
+
+## Implementation
+
+Since backtracing is a scheme that is usually defined in the [`calling-convention`], and therefore
+tightly coupled to the `processor architecture `, the heart of the backtracing code will live in the
+`_arch` folder. What can be shared between different architectures is the formatting and printing
+part. Hence, the code will be organized as follows:
+
+[`calling-convention`]: https://en.wikipedia.org/wiki/Calling_convention
+
+- `src/backtrace.rs` makes a generic definition of a `BacktraceItem`. It also provides code that
+  uses an `Iterator<Item = BacktraceItem>` to format and print the backtrace.
+- `src/__arch_name__/backtrace.rs` contains the code that generates the actual iterator.
+
+Here is the definition of `BacktraceItem`:
+
+```rust
+pub enum BacktraceItem {
+    InvalidFramePointer(Address<Virtual>),
+    InvalidLink(Address<Virtual>),
+    Link(Address<Virtual>),
+}
+```
+
+In summary, it has two error cases and one valid case. This will become clearer in a minute when we
+look at what a `stack frame` and a `frame pointer` is.
+
+### Chasing Frames
+
+For `AArch64`, we need to consult the [Procedure Call Standard for the Arm® 64-bit Architecture]
+(`AAPCS64`). It has the following to say:
+
+> Conforming code shall construct a *linked list* of stack-frames. Each frame shall link to the
+> frame of its caller by means of a frame record of two 64-bit values on the stack (independent of
+> the data model). The frame record for the innermost frame (belonging to the most recent routine
+> invocation) shall be pointed to by the frame pointer register (FP). The lowest addressed
+> double-word shall point to the previous frame record and the highest addressed double-word shall
+> contain the value passed in LR on entry to the current function [...]. The location of the frame
+> record within a stack frame is not specified.
+
+[Procedure Call Standard for the Arm® 64-bit Architecture]: https://github.com/ARM-software/abi-aa/blob/main/aapcs64/aapcs64.rst
+
+The nature of the `linked list` becomes a bit clearer when we look into the corresponding section in
+the [ARM Cortex-A Series Programmer’s Guide for ARMv8-A] as well. Here are text and picture
+snippets:
+
+> An AAPC64 stack frame shown in Figure 9-2. The frame pointer (X29) should point to the previous
+> frame pointer saved on stack, with the saved LR (X30) stored after it. The final frame pointer in
+> the chain should be set to 0. The Stack Pointer must always be aligned on a 16 byte boundary.
+
+[ARM Cortex-A Series Programmer’s Guide for ARMv8-A]: https://developer.arm.com/documentation/den0024/latest/
+
+<p align="center">
+    <img src="../doc/18_stack_frames.png" height="500" align="center">
+</p>
+
+Hence, we can define the following struct in `src/__arch_name__/backtrace.rs` for the stack frame
+record:
+
+```rust
+#[repr(C)]
+struct StackFrameRecord<'a> {
+    previous_record: Option<&'a StackFrameRecord<'a>>,
+    link: Address<Virtual>,
+}
+```
+
+The interesting part is the `previous_record` member. We learned from the two documents which we
+inspected above that the lowest addressed double-word is either:
+
+- Zero.
+- Or pointing to the previous stack frame record.
+
+Thanks to Rust's null pointer optimization [[1]][[2]], this allows us to conveniently type this as
+an `Option<&StackFrameRecord>`. So whenever we inspect `previous_record` and observe it to be
+`None`, we know that we've reached the end of the backtrace.
+
+[1]: https://doc.rust-lang.org/std/option/#representation
+[2]: https://stackoverflow.com/a/46557737
+
+The start of the backtrace is trivially accessed through `x29` (aka the `Frame Pointer Register`).
+This is used to generate a `StackFrameIterator`:
+
+```rust
+struct StackFrameRecordIterator<'a> {
+    cur: &'a StackFrameRecord<'a>,
+}
+
+/// [...]
+
+fn stack_frame_record_iterator<'a>() -> Option<StackFrameRecordIterator<'a>> {
+    let fp = Address::<Virtual>::new(FP.get() as usize);
+    if !fp.is_valid_stack_addr() {
+        return None;
+    }
+
+    Some(StackFrameRecordIterator {
+        cur: unsafe { &*(fp.as_usize() as *const _) },
+    })
+}
+```
+
+Although it should be guaranteed by the compiler (and any hand-written assembly) that `x29` points
+to a valid stack address, it makes sense to double-check this before generating a reference. There
+is always a chance that corruption happens. The implementation of the iterator itself does this
+sanity check as well whenever the iterator is advanced. Additionally, it is also checked whether the
+`link` address points to a valid `code` section in the kernel before the address is passed on to
+the caller of the iterator:
+
+```rust
+impl<'a> Iterator for StackFrameRecordIterator<'a> {
+    type Item = BacktraceItem;
+
+    fn next(&mut self) -> Option<Self::Item> {
+        static ABORT_FRAME: StackFrameRecord = StackFrameRecord {
+            previous_record: None,
+            link: Address::new(0),
+        };
+
+        // If previous is None, this is the root frame, so iteration will stop here.
+        let previous = self.cur.previous_record?;
+
+        // Need to abort if the pointer to the previous frame record is invalid.
+        let prev_addr = Address::<Virtual>::new(previous as *const _ as usize);
+        if !prev_addr.is_valid_stack_addr() {
+            // This allows to return the error and then stop on the next iteration.
+            self.cur = &ABORT_FRAME;
+            return Some(BacktraceItem::InvalidFramePointer(prev_addr));
+        }
+
+        let ret = if !self.cur.link.is_valid_code_addr() {
+            Some(BacktraceItem::InvalidLink(self.cur.link))
+        } else {
+            // The link points to the instruction to be executed _after_ returning from a branch.
+            // However, we want to show the instruction that caused the branch, so subtract by one
+            // instruction.
+            //
+            // This might be called from panic!, so it must not panic itself on the subtraction.
+            let link = if self.cur.link >= Address::new(4) {
+                self.cur.link - 4
+            } else {
+                self.cur.link
+            };
+
+            Some(BacktraceItem::Link(link))
+        };
+
+        // Advance the iterator.
+        self.cur = previous;
+
+        ret
+    }
+}
+```
+
+This already was the gist of the architectural part of the implementation! In the generic part,
+where the backtrace is printed, the address returned in `BacktraceItem::Link` is additionally used
+to look up the corresponding `symbol`, so that this is conveniently printed together:
+
+```rust
+match backtrace_res {
+
+    // omitted
+
+    BacktraceItem::Link(addr) => {
+        fmt_res = writeln!(
+            f,
+            "      {:>2}. {:016x} | {:<50}",
+            i + 1,
+            addr.as_usize(),
+            match symbols::lookup_symbol(addr) {
+                Some(sym) => sym.name(),
+                _ => "Symbol not found",
+            }
+        )
+    }
+};
+```
+
+Finally, we add printing of a backtrace to `panic!`:
+
+```
+panic_println!(
+    "[  {:>3}.{:06}] Kernel panic!\n\n\
+    Panic location:\n      File '{}', line {}, column {}\n\n\
+    {}\n\n\
+    {}",
+    timestamp.as_secs(),
+    timestamp.subsec_micros(),
+    location,
+    line,
+    column,
+    info.message().unwrap_or(&format_args!("")),
+    backtrace::Backtrace
+);
+```
+
+### Compiler Changes
+
+By default, the `aarch64-unknown-none*` targets *do not* guarantee that a stack frame record is
+generated on each function call. Without, the backtracing code will not work. Fortunately,
+generation can be forced by modifying the `rustc codegen options`. We add the following to the
+`Makefile`:
+
+```makefile
+ifeq ($(BSP),rpi3)
+
+    # omitted
+
+    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53 -C force-frame-pointers
+```
+
+But there is more! Until now, when we compiled the kernel, cargo was using a **precompiled** version
+of the `Rust core library` that comes with rustup whenever a target is added. This is usually very
+beneficial in terms of speeding up compilation. Unfortunately, the precompiled version was not
+compiled with `-C force-frame-pointers` either. This can be solved using cargo's [`build-std`
+feature]. We set it in the Makefile so that cargo also compiles the core library using our compiler
+settings, which means we get the frame records thanks to `-C force-frame-pointers` for any core
+library functions as well.
+
+```Makefile
+# build-std can be skipped for helper commands that do not rely on correct stack frames and other
+# custom compiler options. This results in a huge speedup.
+RUSTC_CMD   = cargo rustc $(COMPILER_ARGS) -Z build-std=core --manifest-path $(KERNEL_MANIFEST)
+DOC_CMD     = cargo doc $(COMPILER_ARGS)
+CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
+TEST_CMD    = cargo test $(COMPILER_ARGS) -Z build-std=core --manifest-path $(KERNEL_MANIFEST)
+```
+
+[`build-std` feature]: https://doc.rust-lang.org/cargo/reference/unstable.html#build-std
+
+### Supporting Changes
+
+There's a couple of changes not covered in this tutorial text, but the reader should ideally skim
+through them:
+
+- [`src/_arch/aarch64/exception.s`](`kernel/src/_arch/aarch64/exception.s`) adds some tricky code to
+  generate a stack frame record on exception entry. The file includes elaborate comments that can be
+  inspected.
+- [`src/_arch/aarch64/cpu/boot.rs`](`kernel/src/_arch/aarch64/cpu/boot.rs`) adds some code that
+  ensures that `kernel_init()` becomes the root of the backtrace (meaning its is ensured that
+  `previous_frame` will be zero for `kernel_init()`'s frame record).
+- In `$ROOT/Cargo.toml`, `debug = true` has been set, which ensures that the kernel ELF includes the
+  maximum amount of debug information. Please note that this does *not* change anything for the
+  kernel at runtime. However, it will allow to dig even deeper on an address that has been reported
+  by a kernel backtrace. For example, using the `addr2line` tool. The following two snippets show
+  what `addr2line` reports when the debug flag is not or is set, respectively.
+
+```console
+$ # debug = false
+$ addr2line -p -f -s -i -e target/aarch64-unknown-none-softfloat/release/kernel+ttables+symbols 0xffffffffc0001da8 | rustfilt
+kernel::kernel_main at kernel.c562062a-cgu.1:?
+```
+
+```console
+$ # debug = true
+$ addr2line -p -f -s -i -e target/aarch64-unknown-none-softfloat/release/kernel+ttables+symbols 0xffffffffc0001da8 | rustfilt
+libkernel::memory::mmu::mapping_record::MappingRecord::print at mapping_record.rs:136
+ (inlined by) libkernel::memory::mmu::mapping_record::kernel_print::{{closure}} at mapping_record.rs:232
+ (inlined by) <libkernel::synchronization::InitStateLock<T> as libkernel::synchronization::interface::ReadWriteEx>::read at synchronization.rs:139
+ (inlined by) libkernel::memory::mmu::mapping_record::kernel_print at mapping_record.rs:232
+ (inlined by) libkernel::memory::mmu::kernel_print_mappings at mmu.rs:269
+ (inlined by) kernel::kernel_main at main.rs:84
+```
+
+## Test it
+
+Three tests were added that check the sanity of the backtracing code. Also, any previous tests that
+print a `panic` will now also include a backtrace. For example, `02_exception_sync_page_fault.rs`:
+
+```console
+$ TEST=02_exception_sync_page_fault make test_integration
+[...]
+         -------------------------------------------------------------------
+         🦀 Testing synchronous exception handling by causing a page fault
+         -------------------------------------------------------------------
+
+         [    0.002782] Writing to bottom of address space to address 1 GiB...
+         [    0.004623] Kernel panic!
+
+         Panic location:
+               File 'kernel/src/_arch/aarch64/exception.rs', line 59, column 5
+
+         CPU Exception!
+
+         ESR_EL1: 0x96000004
+               Exception Class         (EC) : 0x25 - Data Abort, current EL
+               Instr Specific Syndrome (ISS): 0x4
+         FAR_EL1: 0x0000000040000000
+
+         [...]
+
+         Backtrace:
+               ----------------------------------------------------------------------------------------------
+                   Address            Function containing address
+               ----------------------------------------------------------------------------------------------
+                1. ffffffffc0001294 | core::fmt::write
+                2. ffffffffc0005560 | libkernel::panic_wait::_panic_print
+                3. ffffffffc00054a0 | rust_begin_unwind
+                4. ffffffffc0002950 | core::panicking::panic_fmt
+                5. ffffffffc0004898 | current_elx_synchronous
+                6. ffffffffc0000a74 | __vector_current_elx_synchronous
+                7. ffffffffc000111c | kernel_init
+               ----------------------------------------------------------------------------------------------
+
+         -------------------------------------------------------------------
+         ✅ Success: 02_exception_sync_page_fault.rs
+         -------------------------------------------------------------------
+```
+
+## Diff to previous
+```diff
+
+diff -uNr 17_kernel_symbols/Cargo.toml 18_backtrace/Cargo.toml
+--- 17_kernel_symbols/Cargo.toml
++++ 18_backtrace/Cargo.toml
+@@ -8,3 +8,4 @@
+
+ [profile.release]
+ lto = true
++debug = true
+
+diff -uNr 17_kernel_symbols/kernel/Cargo.toml 18_backtrace/kernel/Cargo.toml
+--- 17_kernel_symbols/kernel/Cargo.toml
++++ 18_backtrace/kernel/Cargo.toml
+@@ -1,6 +1,6 @@
+ [package]
+ name = "mingo"
+-version = "0.17.0"
++version = "0.18.0"
+ authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+ edition = "2021"
+
+@@ -56,3 +56,15 @@
+ [[test]]
+ name = "03_exception_restore_sanity"
+ harness = false
++
++[[test]]
++name = "05_backtrace_sanity"
++harness = false
++
++[[test]]
++name = "06_backtrace_invalid_frame"
++harness = false
++
++[[test]]
++name = "07_backtrace_invalid_link"
++harness = false
+
+diff -uNr 17_kernel_symbols/kernel/src/_arch/aarch64/backtrace.rs 18_backtrace/kernel/src/_arch/aarch64/backtrace.rs
+--- 17_kernel_symbols/kernel/src/_arch/aarch64/backtrace.rs
++++ 18_backtrace/kernel/src/_arch/aarch64/backtrace.rs
+@@ -0,0 +1,136 @@
++// SPDX-License-Identifier: MIT OR Apache-2.0
++//
++// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++
++//! Architectural backtracing support.
++//!
++//! # Orientation
++//!
++//! Since arch modules are imported into generic modules using the path attribute, the path of this
++//! file is:
++//!
++//! crate::backtrace::arch_backtrace
++
++use crate::{
++    backtrace::BacktraceItem,
++    memory::{Address, Virtual},
++};
++use cortex_a::registers::*;
++use tock_registers::interfaces::Readable;
++
++//--------------------------------------------------------------------------------------------------
++// Private Definitions
++//--------------------------------------------------------------------------------------------------
++
++/// A Stack frame record.
++///
++/// # Note
++///
++/// The convention is that `previous_record` is valid as long as it contains a non-null value.
++/// Therefore, it is possible to type the member as `Option<&StackFrameRecord>` because of Rust's
++/// `null-pointer optimization`.
++#[repr(C)]
++struct StackFrameRecord<'a> {
++    previous_record: Option<&'a StackFrameRecord<'a>>,
++    link: Address<Virtual>,
++}
++
++struct StackFrameRecordIterator<'a> {
++    cur: &'a StackFrameRecord<'a>,
++}
++
++//--------------------------------------------------------------------------------------------------
++// Private Code
++//--------------------------------------------------------------------------------------------------
++
++impl<'a> Iterator for StackFrameRecordIterator<'a> {
++    type Item = BacktraceItem;
++
++    fn next(&mut self) -> Option<Self::Item> {
++        static ABORT_FRAME: StackFrameRecord = StackFrameRecord {
++            previous_record: None,
++            link: Address::new(0),
++        };
++
++        // If previous is None, this is the root frame, so iteration will stop here.
++        let previous = self.cur.previous_record?;
++
++        // Need to abort if the pointer to the previous frame record is invalid.
++        let prev_addr = Address::<Virtual>::new(previous as *const _ as usize);
++        if !prev_addr.is_valid_stack_addr() {
++            // This allows to return the error and then stop on the next iteration.
++            self.cur = &ABORT_FRAME;
++            return Some(BacktraceItem::InvalidFramePointer(prev_addr));
++        }
++
++        let ret = if !self.cur.link.is_valid_code_addr() {
++            Some(BacktraceItem::InvalidLink(self.cur.link))
++        } else {
++            // The link points to the instruction to be executed _after_ returning from a branch.
++            // However, we want to show the instruction that caused the branch, so subtract by one
++            // instruction.
++            //
++            // This might be called from panic!, so it must not panic itself on the subtraction.
++            let link = if self.cur.link >= Address::new(4) {
++                self.cur.link - 4
++            } else {
++                self.cur.link
++            };
++
++            Some(BacktraceItem::Link(link))
++        };
++
++        // Advance the iterator.
++        self.cur = previous;
++
++        ret
++    }
++}
++
++fn stack_frame_record_iterator<'a>() -> Option<StackFrameRecordIterator<'a>> {
++    let fp = Address::<Virtual>::new(FP.get() as usize);
++    if !fp.is_valid_stack_addr() {
++        return None;
++    }
++
++    Some(StackFrameRecordIterator {
++        cur: unsafe { &*(fp.as_usize() as *const _) },
++    })
++}
++
++//--------------------------------------------------------------------------------------------------
++// Public Code
++//--------------------------------------------------------------------------------------------------
++
++/// Architectural implementation of the backtrace.
++pub fn backtrace(f: impl FnOnce(Option<&mut dyn Iterator<Item = BacktraceItem>>)) {
++    f(stack_frame_record_iterator().as_mut().map(|s| s as _))
++}
++
++//--------------------------------------------------------------------------------------------------
++// Testing
++//--------------------------------------------------------------------------------------------------
++
++#[cfg(feature = "test_build")]
++#[inline(always)]
++/// Hack for corrupting the previous frame address in the current stack frame.
++///
++/// # Safety
++///
++/// - To be used only by testing code.
++pub unsafe fn corrupt_previous_frame_addr() {
++    let sf = FP.get() as *mut usize;
++    *sf = 0x123;
++}
++
++#[cfg(feature = "test_build")]
++#[inline(always)]
++/// Hack for corrupting the link in the current stack frame.
++///
++/// # Safety
++///
++/// - To be used only by testing code.
++pub unsafe fn corrupt_link() {
++    let sf = FP.get() as *mut StackFrameRecord;
++    (*sf).link = Address::new(0x456);
++}
+
+diff -uNr 17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.rs 18_backtrace/kernel/src/_arch/aarch64/cpu/boot.rs
+--- 17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.rs
++++ 18_backtrace/kernel/src/_arch/aarch64/cpu/boot.rs
+@@ -12,7 +12,10 @@
+ //! crate::cpu::boot::arch_boot
+
+ use crate::{memory, memory::Address};
+-use core::arch::global_asm;
++use core::{
++    arch::global_asm,
++    sync::atomic::{compiler_fence, Ordering},
++};
+ use cortex_a::{asm, registers::*};
+ use tock_registers::interfaces::Writeable;
+
+@@ -63,6 +66,18 @@
+     SP_EL1.set(virt_boot_core_stack_end_exclusive_addr);
+ }
+
++/// Reset the backtrace by setting link register and frame pointer to zero.
++///
++/// # Safety
++///
++/// - This function must only be used immediately before entering EL1.
++#[inline(always)]
++unsafe fn prepare_backtrace_reset() {
++    compiler_fence(Ordering::SeqCst);
++    FP.set(0);
++    LR.set(0);
++}
++
+ //--------------------------------------------------------------------------------------------------
+ // Public Code
+ //--------------------------------------------------------------------------------------------------
+@@ -89,6 +104,9 @@
+     let addr = Address::new(phys_kernel_tables_base_addr as usize);
+     memory::mmu::enable_mmu_and_caching(addr).unwrap();
+
++    // Make the function we return to the root of a backtrace.
++    prepare_backtrace_reset();
++
+     // Use `eret` to "return" to EL1. Since virtual memory will already be enabled, this results in
+     // execution of kernel_init() in EL1 from its _virtual address_.
+     asm::eret()
+
+diff -uNr 17_kernel_symbols/kernel/src/_arch/aarch64/exception.s 18_backtrace/kernel/src/_arch/aarch64/exception.s
+--- 17_kernel_symbols/kernel/src/_arch/aarch64/exception.s
++++ 18_backtrace/kernel/src/_arch/aarch64/exception.s
+@@ -8,10 +8,10 @@
+
+ /// Call the function provided by parameter `\handler` after saving the exception context. Provide
+ /// the context as the first parameter to '\handler'.
+-.macro CALL_WITH_CONTEXT handler
++.macro CALL_WITH_CONTEXT handler is_lower_el is_sync
+ __vector_\handler:
+ 	// Make room on the stack for the exception context.
+-	sub	sp,  sp,  #16 * 17
++	sub	sp,  sp,  #16 * 18
+
+ 	// Store all general purpose registers on the stack.
+ 	stp	x0,  x1,  [sp, #16 * 0]
+@@ -39,6 +39,42 @@
+ 	stp	lr,  x1,  [sp, #16 * 15]
+ 	stp	x2,  x3,  [sp, #16 * 16]
+
++	// Build a stack frame for backtracing.
++.if \is_lower_el == 1
++	// If we came from a lower EL, make it a root frame (by storing zero) so that the kernel
++	// does not attempt to trace into userspace.
++	stp	xzr, xzr, [sp, #16 * 17]
++.else
++	// For normal branches, the link address points to the instruction to be executed _after_
++	// returning from a branch. In a backtrace, we want to show the instruction that caused the
++	// branch, though. That is why code in backtrace.rs subtracts 4 (length of one instruction)
++	// from the link address.
++	//
++	// Here we have a special case, though, because ELR_EL1 is used instead of LR to build the
++	// stack frame, so that it becomes possible to trace beyond an exception. Hence, it must be
++	// considered that semantics for ELR_EL1 differ from case to case.
++	//
++	// Unless an "exception generating instruction" was executed, ELR_EL1 already points to the
++	// the correct instruction, and hence the subtraction by 4 in backtrace.rs would yield wrong
++	// results. To cover for this, 4 is added to ELR_EL1 below unless the cause of exception was
++	// an SVC instruction. BRK and HLT are "exception generating instructions" as well, but they
++	// are not expected and therefore left out for now.
++	//
++	// For reference: Search for "preferred exception return address" in the Architecture
++	// Reference Manual for ARMv8-A.
++.if \is_sync == 1
++	lsr	w3,  w3, #26 // w3 = ESR_EL1.EC
++	cmp	w3,  #0x15   // w3 == SVC64 ?
++	b.eq	1f
++.endif
++	add	x1,  x1, #4
++1:
++	stp	x29, x1, [sp, #16 * 17]
++.endif
++
++	// Set the frame pointer to the stack frame record.
++	add	x29, sp, #16 * 17
++
+ 	// x0 is the first argument for the function called through `\handler`.
+ 	mov	x0,  sp
+
+@@ -81,43 +117,43 @@
+ //
+ // - It must be ensured that `CALL_WITH_CONTEXT` <= 0x80 bytes.
+ .org 0x000
+-	CALL_WITH_CONTEXT current_el0_synchronous
++	CALL_WITH_CONTEXT current_el0_synchronous, 0, 1
+ .org 0x080
+-	CALL_WITH_CONTEXT current_el0_irq
++	CALL_WITH_CONTEXT current_el0_irq, 0, 0
+ .org 0x100
+ 	FIQ_SUSPEND
+ .org 0x180
+-	CALL_WITH_CONTEXT current_el0_serror
++	CALL_WITH_CONTEXT current_el0_serror, 0, 0
+
+ // Current exception level with SP_ELx, x > 0.
+ .org 0x200
+-	CALL_WITH_CONTEXT current_elx_synchronous
++	CALL_WITH_CONTEXT current_elx_synchronous, 0, 1
+ .org 0x280
+-	CALL_WITH_CONTEXT current_elx_irq
++	CALL_WITH_CONTEXT current_elx_irq, 0, 0
+ .org 0x300
+ 	FIQ_SUSPEND
+ .org 0x380
+-	CALL_WITH_CONTEXT current_elx_serror
++	CALL_WITH_CONTEXT current_elx_serror, 0, 0
+
+ // Lower exception level, AArch64
+ .org 0x400
+-	CALL_WITH_CONTEXT lower_aarch64_synchronous
++	CALL_WITH_CONTEXT lower_aarch64_synchronous, 1, 1
+ .org 0x480
+-	CALL_WITH_CONTEXT lower_aarch64_irq
++	CALL_WITH_CONTEXT lower_aarch64_irq, 1, 0
+ .org 0x500
+ 	FIQ_SUSPEND
+ .org 0x580
+-	CALL_WITH_CONTEXT lower_aarch64_serror
++	CALL_WITH_CONTEXT lower_aarch64_serror, 1, 0
+
+ // Lower exception level, AArch32
+ .org 0x600
+-	CALL_WITH_CONTEXT lower_aarch32_synchronous
++	CALL_WITH_CONTEXT lower_aarch32_synchronous, 1, 0
+ .org 0x680
+-	CALL_WITH_CONTEXT lower_aarch32_irq
++	CALL_WITH_CONTEXT lower_aarch32_irq, 1, 0
+ .org 0x700
+ 	FIQ_SUSPEND
+ .org 0x780
+-	CALL_WITH_CONTEXT lower_aarch32_serror
++	CALL_WITH_CONTEXT lower_aarch32_serror, 1, 0
+ .org 0x800
+
+ //------------------------------------------------------------------------------
+@@ -146,7 +182,7 @@
+ 	ldp	x26, x27, [sp, #16 * 13]
+ 	ldp	x28, x29, [sp, #16 * 14]
+
+-	add	sp,  sp,  #16 * 17
++	add	sp,  sp,  #16 * 18
+
+ 	eret
+
+
+diff -uNr 17_kernel_symbols/kernel/src/backtrace.rs 18_backtrace/kernel/src/backtrace.rs
+--- 17_kernel_symbols/kernel/src/backtrace.rs
++++ 18_backtrace/kernel/src/backtrace.rs
+@@ -0,0 +1,112 @@
++// SPDX-License-Identifier: MIT OR Apache-2.0
++//
++// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++
++//! Backtracing support.
++
++#[cfg(target_arch = "aarch64")]
++#[path = "_arch/aarch64/backtrace.rs"]
++mod arch_backtrace;
++
++use crate::{
++    memory::{Address, Virtual},
++    symbols,
++};
++use core::fmt;
++
++//--------------------------------------------------------------------------------------------------
++// Architectural Public Reexports
++//--------------------------------------------------------------------------------------------------
++#[cfg(feature = "test_build")]
++pub use arch_backtrace::{corrupt_link, corrupt_previous_frame_addr};
++
++//--------------------------------------------------------------------------------------------------
++// Public Definitions
++//--------------------------------------------------------------------------------------------------
++
++/// A backtrace item.
++#[allow(missing_docs)]
++pub enum BacktraceItem {
++    InvalidFramePointer(Address<Virtual>),
++    InvalidLink(Address<Virtual>),
++    Link(Address<Virtual>),
++}
++
++/// Pseudo-struct for printing a backtrace using its fmt::Display implementation.
++pub struct Backtrace;
++
++//--------------------------------------------------------------------------------------------------
++// Public Code
++//--------------------------------------------------------------------------------------------------
++
++impl fmt::Display for Backtrace {
++    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
++        writeln!(f, "Backtrace:")?;
++        writeln!(
++            f,
++            "      ----------------------------------------------------------------------------------------------"
++        )?;
++        writeln!(
++            f,
++            "          Address            Function containing address"
++        )?;
++        writeln!(
++            f,
++            "      ----------------------------------------------------------------------------------------------"
++        )?;
++
++        let mut fmt_res: fmt::Result = Ok(());
++        let trace_formatter =
++            |maybe_iter: Option<&mut dyn Iterator<Item = BacktraceItem>>| match maybe_iter {
++                None => fmt_res = writeln!(f, "ERROR! No valid stack frame found"),
++                Some(iter) => {
++                    for (i, backtrace_res) in iter.enumerate() {
++                        match backtrace_res {
++                            BacktraceItem::InvalidFramePointer(addr) => {
++                                fmt_res = writeln!(
++                                    f,
++                                    "      {:>2}. ERROR! \
++                                    Encountered invalid frame pointer ({}) during backtrace",
++                                    i + 1,
++                                    addr
++                                );
++                            }
++                            BacktraceItem::InvalidLink(addr) => {
++                                fmt_res = writeln!(
++                                    f,
++                                    "      {:>2}. ERROR! \
++                                    Link address ({}) is not contained in kernel .text section",
++                                    i + 1,
++                                    addr
++                                );
++                            }
++                            BacktraceItem::Link(addr) => {
++                                fmt_res = writeln!(
++                                    f,
++                                    "      {:>2}. {:016x} | {:<50}",
++                                    i + 1,
++                                    addr.as_usize(),
++                                    match symbols::lookup_symbol(addr) {
++                                        Some(sym) => sym.name(),
++                                        _ => "Symbol not found",
++                                    }
++                                )
++                            }
++                        };
++
++                        if fmt_res.is_err() {
++                            break;
++                        }
++                    }
++                }
++            };
++
++        arch_backtrace::backtrace(trace_formatter);
++        fmt_res?;
++
++        writeln!(
++            f,
++            "      ----------------------------------------------------------------------------------------------"
++        )
++    }
++}
+
+diff -uNr 17_kernel_symbols/kernel/src/bsp/raspberrypi/memory/mmu.rs 18_backtrace/kernel/src/bsp/raspberrypi/memory/mmu.rs
+--- 17_kernel_symbols/kernel/src/bsp/raspberrypi/memory/mmu.rs
++++ 18_backtrace/kernel/src/bsp/raspberrypi/memory/mmu.rs
+@@ -80,16 +80,6 @@
+     size >> KernelGranule::SHIFT
+ }
+
+-/// The code pages of the kernel binary.
+-fn virt_code_region() -> MemoryRegion<Virtual> {
+-    let num_pages = size_to_num_pages(super::code_size());
+-
+-    let start_page_addr = super::virt_code_start();
+-    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
+-
+-    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
+-}
+-
+ /// The data pages of the kernel binary.
+ fn virt_data_region() -> MemoryRegion<Virtual> {
+     let num_pages = size_to_num_pages(super::data_size());
+@@ -100,16 +90,6 @@
+     MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
+ }
+
+-/// The boot core stack pages.
+-fn virt_boot_core_stack_region() -> MemoryRegion<Virtual> {
+-    let num_pages = size_to_num_pages(super::boot_core_stack_size());
+-
+-    let start_page_addr = super::virt_boot_core_stack_start();
+-    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
+-
+-    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
+-}
+-
+ // There is no reason to expect the following conversions to fail, since they were generated offline
+ // by the `translation table tool`. If it doesn't work, a panic due to the unwraps is justified.
+ fn kernel_virt_to_phys_region(virt_region: MemoryRegion<Virtual>) -> MemoryRegion<Physical> {
+@@ -132,6 +112,26 @@
+ // Public Code
+ //--------------------------------------------------------------------------------------------------
+
++/// The code pages of the kernel binary.
++pub fn virt_code_region() -> MemoryRegion<Virtual> {
++    let num_pages = size_to_num_pages(super::code_size());
++
++    let start_page_addr = super::virt_code_start();
++    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
++
++    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
++}
++
++/// The boot core stack pages.
++pub fn virt_boot_core_stack_region() -> MemoryRegion<Virtual> {
++    let num_pages = size_to_num_pages(super::boot_core_stack_size());
++
++    let start_page_addr = super::virt_boot_core_stack_start();
++    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
++
++    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
++}
++
+ /// Return a reference to the kernel's translation tables.
+ pub fn kernel_translation_tables() -> &'static InitStateLock<KernelTranslationTable> {
+     &KERNEL_TABLES
+
+diff -uNr 17_kernel_symbols/kernel/src/lib.rs 18_backtrace/kernel/src/lib.rs
+--- 17_kernel_symbols/kernel/src/lib.rs
++++ 18_backtrace/kernel/src/lib.rs
+@@ -128,6 +128,7 @@
+ mod panic_wait;
+ mod synchronization;
+
++pub mod backtrace;
+ pub mod bsp;
+ pub mod common;
+ pub mod console;
+
+diff -uNr 17_kernel_symbols/kernel/src/memory.rs 18_backtrace/kernel/src/memory.rs
+--- 17_kernel_symbols/kernel/src/memory.rs
++++ 18_backtrace/kernel/src/memory.rs
+@@ -95,6 +95,18 @@
+     }
+ }
+
++impl<ATYPE: AddressType> Sub<usize> for Address<ATYPE> {
++    type Output = Self;
++
++    #[inline(always)]
++    fn sub(self, rhs: usize) -> Self::Output {
++        match self.value.checked_sub(rhs) {
++            None => panic!("Overflow on Address::sub"),
++            Some(x) => Self::new(x),
++        }
++    }
++}
++
+ impl<ATYPE: AddressType> Sub<Address<ATYPE>> for Address<ATYPE> {
+     type Output = Self;
+
+@@ -107,6 +119,18 @@
+     }
+ }
+
++impl Address<Virtual> {
++    /// Checks if the address is part of the boot core stack region.
++    pub fn is_valid_stack_addr(&self) -> bool {
++        bsp::memory::mmu::virt_boot_core_stack_region().contains(*self)
++    }
++
++    /// Checks if the address is part of the kernel code region.
++    pub fn is_valid_code_addr(&self) -> bool {
++        bsp::memory::mmu::virt_code_region().contains(*self)
++    }
++}
++
+ impl fmt::Display for Address<Physical> {
+     // Don't expect to see physical addresses greater than 40 bit.
+     fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+
+diff -uNr 17_kernel_symbols/kernel/src/panic_wait.rs 18_backtrace/kernel/src/panic_wait.rs
+--- 17_kernel_symbols/kernel/src/panic_wait.rs
++++ 18_backtrace/kernel/src/panic_wait.rs
+@@ -4,7 +4,7 @@
+
+ //! A panic handler that infinitely waits.
+
+-use crate::{bsp, cpu, exception};
++use crate::{backtrace, bsp, cpu, exception};
+ use core::{fmt, panic::PanicInfo};
+
+ //--------------------------------------------------------------------------------------------------
+@@ -91,6 +91,7 @@
+     panic_println!(
+         "[  {:>3}.{:06}] Kernel panic!\n\n\
+         Panic location:\n      File '{}', line {}, column {}\n\n\
++        {}\n\n\
+         {}",
+         timestamp.as_secs(),
+         timestamp.subsec_micros(),
+@@ -98,6 +99,7 @@
+         line,
+         column,
+         info.message().unwrap_or(&format_args!("")),
++        backtrace::Backtrace
+     );
+
+     _panic_exit()
+
+diff -uNr 17_kernel_symbols/kernel/tests/05_backtrace_sanity.rb 18_backtrace/kernel/tests/05_backtrace_sanity.rb
+--- 17_kernel_symbols/kernel/tests/05_backtrace_sanity.rb
++++ 18_backtrace/kernel/tests/05_backtrace_sanity.rb
+@@ -0,0 +1,39 @@
++# frozen_string_literal: true
++
++# SPDX-License-Identifier: MIT OR Apache-2.0
++#
++# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++
++require 'console_io_test'
++
++# Verify that panic produces a backtrace.
++class PanicBacktraceTest < SubtestBase
++    def name
++        'Panic produces backtrace'
++    end
++
++    def run(qemu_out, _qemu_in)
++        expect_or_raise(qemu_out, 'Kernel panic!')
++        expect_or_raise(qemu_out, 'Backtrace:')
++    end
++end
++
++# Verify backtrace correctness.
++class BacktraceCorrectnessTest < SubtestBase
++    def name
++        'Backtrace is correct'
++    end
++
++    def run(qemu_out, _qemu_in)
++        expect_or_raise(qemu_out, '| core::panicking::panic')
++        expect_or_raise(qemu_out, '| _05_backtrace_sanity::nested')
++        expect_or_raise(qemu_out, '| kernel_init')
++    end
++end
++
++##--------------------------------------------------------------------------------------------------
++## Test registration
++##--------------------------------------------------------------------------------------------------
++def subtest_collection
++    [PanicBacktraceTest.new, BacktraceCorrectnessTest.new]
++end
+
+diff -uNr 17_kernel_symbols/kernel/tests/05_backtrace_sanity.rs 18_backtrace/kernel/tests/05_backtrace_sanity.rs
+--- 17_kernel_symbols/kernel/tests/05_backtrace_sanity.rs
++++ 18_backtrace/kernel/tests/05_backtrace_sanity.rs
+@@ -0,0 +1,31 @@
++// SPDX-License-Identifier: MIT OR Apache-2.0
++//
++// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++
++//! Test if backtracing code detects an invalid frame pointer.
++
++#![feature(format_args_nl)]
++#![no_main]
++#![no_std]
++
++/// Console tests should time out on the I/O harness in case of panic.
++mod panic_wait_forever;
++
++use libkernel::{bsp, cpu, exception, memory};
++
++#[inline(never)]
++fn nested() {
++    panic!()
++}
++
++#[no_mangle]
++unsafe fn kernel_init() -> ! {
++    exception::handling_init();
++    memory::mmu::post_enable_init();
++    bsp::console::qemu_bring_up_console();
++
++    nested();
++
++    // The QEMU process running this test will be closed by the I/O test harness.
++    cpu::wait_forever()
++}
+
+diff -uNr 17_kernel_symbols/kernel/tests/06_backtrace_invalid_frame.rb 18_backtrace/kernel/tests/06_backtrace_invalid_frame.rb
+--- 17_kernel_symbols/kernel/tests/06_backtrace_invalid_frame.rb
++++ 18_backtrace/kernel/tests/06_backtrace_invalid_frame.rb
+@@ -0,0 +1,26 @@
++# frozen_string_literal: true
++
++# SPDX-License-Identifier: MIT OR Apache-2.0
++#
++# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++
++require 'console_io_test'
++
++# Test detection of invalid frame pointers.
++class InvalidFramePointerTest < SubtestBase
++    def name
++        'Detect invalid frame pointer'
++    end
++
++    def run(qemu_out, _qemu_in)
++        expect_or_raise(qemu_out,
++                        /Encountered invalid frame pointer \(.*\) during backtrace/)
++    end
++end
++
++##--------------------------------------------------------------------------------------------------
++## Test registration
++##--------------------------------------------------------------------------------------------------
++def subtest_collection
++    [InvalidFramePointerTest.new]
++end
+
+diff -uNr 17_kernel_symbols/kernel/tests/06_backtrace_invalid_frame.rs 18_backtrace/kernel/tests/06_backtrace_invalid_frame.rs
+--- 17_kernel_symbols/kernel/tests/06_backtrace_invalid_frame.rs
++++ 18_backtrace/kernel/tests/06_backtrace_invalid_frame.rs
+@@ -0,0 +1,33 @@
++// SPDX-License-Identifier: MIT OR Apache-2.0
++//
++// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++
++//! Test if backtracing code detects an invalid frame pointer.
++
++#![feature(format_args_nl)]
++#![no_main]
++#![no_std]
++
++/// Console tests should time out on the I/O harness in case of panic.
++mod panic_wait_forever;
++
++use libkernel::{backtrace, bsp, cpu, exception, memory};
++
++#[inline(never)]
++fn nested() {
++    unsafe { backtrace::corrupt_previous_frame_addr() };
++
++    panic!()
++}
++
++#[no_mangle]
++unsafe fn kernel_init() -> ! {
++    exception::handling_init();
++    memory::mmu::post_enable_init();
++    bsp::console::qemu_bring_up_console();
++
++    nested();
++
++    // The QEMU process running this test will be closed by the I/O test harness.
++    cpu::wait_forever()
++}
+
+diff -uNr 17_kernel_symbols/kernel/tests/07_backtrace_invalid_link.rb 18_backtrace/kernel/tests/07_backtrace_invalid_link.rb
+--- 17_kernel_symbols/kernel/tests/07_backtrace_invalid_link.rb
++++ 18_backtrace/kernel/tests/07_backtrace_invalid_link.rb
+@@ -0,0 +1,25 @@
++# frozen_string_literal: true
++
++# SPDX-License-Identifier: MIT OR Apache-2.0
++#
++# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++
++require 'console_io_test'
++
++# Test detection of invalid link.
++class InvalidLinkTest < SubtestBase
++    def name
++        'Detect invalid link'
++    end
++
++    def run(qemu_out, _qemu_in)
++        expect_or_raise(qemu_out, /Link address \(.*\) is not contained in kernel .text section/)
++    end
++end
++
++##--------------------------------------------------------------------------------------------------
++## Test registration
++##--------------------------------------------------------------------------------------------------
++def subtest_collection
++    [InvalidLinkTest.new]
++end
+
+diff -uNr 17_kernel_symbols/kernel/tests/07_backtrace_invalid_link.rs 18_backtrace/kernel/tests/07_backtrace_invalid_link.rs
+--- 17_kernel_symbols/kernel/tests/07_backtrace_invalid_link.rs
++++ 18_backtrace/kernel/tests/07_backtrace_invalid_link.rs
+@@ -0,0 +1,38 @@
++// SPDX-License-Identifier: MIT OR Apache-2.0
++//
++// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++
++//! Test if backtracing code detects an invalid link.
++
++#![feature(format_args_nl)]
++#![no_main]
++#![no_std]
++
++/// Console tests should time out on the I/O harness in case of panic.
++mod panic_wait_forever;
++
++use libkernel::{backtrace, bsp, cpu, exception, memory};
++
++#[inline(never)]
++fn nested_2() -> &'static str {
++    unsafe { backtrace::corrupt_link() };
++    libkernel::println!("{}", libkernel::backtrace::Backtrace);
++    "foo"
++}
++
++#[inline(never)]
++fn nested_1() {
++    libkernel::println!("{}", nested_2())
++}
++
++#[no_mangle]
++unsafe fn kernel_init() -> ! {
++    exception::handling_init();
++    memory::mmu::post_enable_init();
++    bsp::console::qemu_bring_up_console();
++
++    nested_1();
++
++    // The QEMU process running this test will be closed by the I/O test harness.
++    cpu::wait_forever()
++}
+
+diff -uNr 17_kernel_symbols/Makefile 18_backtrace/Makefile
+--- 17_kernel_symbols/Makefile
++++ 18_backtrace/Makefile
+@@ -42,7 +42,7 @@
+     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
+     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
+     LD_SCRIPT_PATH    = $(shell pwd)/kernel/src/bsp/raspberrypi
+-    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
++    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53 -C force-frame-pointers
+ else ifeq ($(BSP),rpi4)
+     TARGET            = aarch64-unknown-none-softfloat
+     KERNEL_BIN        = kernel8.img
+@@ -56,7 +56,7 @@
+     OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
+     JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
+     LD_SCRIPT_PATH    = $(shell pwd)/kernel/src/bsp/raspberrypi
+-    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
++    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72 -C force-frame-pointers
+ endif
+
+ # Export for build.rs.
+@@ -121,10 +121,12 @@
+     $(FEATURES)                    \
+     --release
+
+-RUSTC_CMD   = cargo rustc $(COMPILER_ARGS) --manifest-path $(KERNEL_MANIFEST)
++# build-std can be skipped for helper commands that do not rely on correct stack frames and other
++# custom compiler options. This results in a huge speedup.
++RUSTC_CMD   = cargo rustc $(COMPILER_ARGS) -Z build-std=core --manifest-path $(KERNEL_MANIFEST)
+ DOC_CMD     = cargo doc $(COMPILER_ARGS)
+ CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
+-TEST_CMD    = cargo test $(COMPILER_ARGS) --manifest-path $(KERNEL_MANIFEST)
++TEST_CMD    = cargo test $(COMPILER_ARGS) -Z build-std=core --manifest-path $(KERNEL_MANIFEST)
+ OBJCOPY_CMD = rust-objcopy \
+     --strip-all            \
+     -O binary
+@@ -303,8 +305,7 @@
+ ##------------------------------------------------------------------------------
+ ## Start GDB session
+ ##------------------------------------------------------------------------------
+-gdb: RUSTC_MISC_ARGS += -C debuginfo=2
+-gdb-opt0: RUSTC_MISC_ARGS += -C debuginfo=2 -C opt-level=0
++gdb-opt0: RUSTC_MISC_ARGS += -C opt-level=0
+ gdb gdb-opt0: $(KERNEL_ELF)
+ 	$(call color_header, "Launching GDB")
+ 	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
+
+```
diff --git a/18_backtrace/kernel/Cargo.toml b/18_backtrace/kernel/Cargo.toml
new file mode 100644
index 000000000..9e5f55be4
--- /dev/null
+++ b/18_backtrace/kernel/Cargo.toml
@@ -0,0 +1,70 @@
+[package]
+name = "mingo"
+version = "0.18.0"
+authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+edition = "2021"
+
+[features]
+default = []
+bsp_rpi3 = ["tock-registers"]
+bsp_rpi4 = ["tock-registers"]
+test_build = ["qemu-exit"]
+
+##--------------------------------------------------------------------------------------------------
+## Dependencies
+##--------------------------------------------------------------------------------------------------
+
+[dependencies]
+test-types = { path = "../libraries/test-types" }
+debug-symbol-types = { path = "../libraries/debug-symbol-types" }
+
+# Optional dependencies
+tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
+qemu-exit = { version = "3.x.x", optional = true }
+
+# Platform specific dependencies
+[target.'cfg(target_arch = "aarch64")'.dependencies]
+cortex-a = { version = "7.x.x" }
+
+##--------------------------------------------------------------------------------------------------
+## Testing
+##--------------------------------------------------------------------------------------------------
+
+[dev-dependencies]
+test-macros = { path = "../libraries/test-macros" }
+
+# Unit tests are done in the library part of the kernel.
+[lib]
+name = "libkernel"
+test = true
+
+# Disable unit tests for the kernel binary.
+[[bin]]
+name = "kernel"
+path = "src/main.rs"
+test = false
+
+# List of tests without harness.
+[[test]]
+name = "00_console_sanity"
+harness = false
+
+[[test]]
+name = "02_exception_sync_page_fault"
+harness = false
+
+[[test]]
+name = "03_exception_restore_sanity"
+harness = false
+
+[[test]]
+name = "05_backtrace_sanity"
+harness = false
+
+[[test]]
+name = "06_backtrace_invalid_frame"
+harness = false
+
+[[test]]
+name = "07_backtrace_invalid_link"
+harness = false
diff --git a/18_backtrace/kernel/build.rs b/18_backtrace/kernel/build.rs
new file mode 100644
index 000000000..cab00bb37
--- /dev/null
+++ b/18_backtrace/kernel/build.rs
@@ -0,0 +1,20 @@
+use std::{env, fs, process};
+
+fn main() {
+    let ld_script_path = match env::var("LD_SCRIPT_PATH") {
+        Ok(var) => var,
+        _ => process::exit(0),
+    };
+
+    let files = fs::read_dir(ld_script_path).unwrap();
+    files
+        .filter_map(Result::ok)
+        .filter(|d| {
+            if let Some(e) = d.path().extension() {
+                e == "ld"
+            } else {
+                false
+            }
+        })
+        .for_each(|f| println!("cargo:rerun-if-changed={}", f.path().display()));
+}
diff --git a/18_backtrace/kernel/src/_arch/aarch64/backtrace.rs b/18_backtrace/kernel/src/_arch/aarch64/backtrace.rs
new file mode 100644
index 000000000..e8860984b
--- /dev/null
+++ b/18_backtrace/kernel/src/_arch/aarch64/backtrace.rs
@@ -0,0 +1,136 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural backtracing support.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::backtrace::arch_backtrace
+
+use crate::{
+    backtrace::BacktraceItem,
+    memory::{Address, Virtual},
+};
+use cortex_a::registers::*;
+use tock_registers::interfaces::Readable;
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// A Stack frame record.
+///
+/// # Note
+///
+/// The convention is that `previous_record` is valid as long as it contains a non-null value.
+/// Therefore, it is possible to type the member as `Option<&StackFrameRecord>` because of Rust's
+/// `null-pointer optimization`.
+#[repr(C)]
+struct StackFrameRecord<'a> {
+    previous_record: Option<&'a StackFrameRecord<'a>>,
+    link: Address<Virtual>,
+}
+
+struct StackFrameRecordIterator<'a> {
+    cur: &'a StackFrameRecord<'a>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl<'a> Iterator for StackFrameRecordIterator<'a> {
+    type Item = BacktraceItem;
+
+    fn next(&mut self) -> Option<Self::Item> {
+        static ABORT_FRAME: StackFrameRecord = StackFrameRecord {
+            previous_record: None,
+            link: Address::new(0),
+        };
+
+        // If previous is None, this is the root frame, so iteration will stop here.
+        let previous = self.cur.previous_record?;
+
+        // Need to abort if the pointer to the previous frame record is invalid.
+        let prev_addr = Address::<Virtual>::new(previous as *const _ as usize);
+        if !prev_addr.is_valid_stack_addr() {
+            // This allows to return the error and then stop on the next iteration.
+            self.cur = &ABORT_FRAME;
+            return Some(BacktraceItem::InvalidFramePointer(prev_addr));
+        }
+
+        let ret = if !self.cur.link.is_valid_code_addr() {
+            Some(BacktraceItem::InvalidLink(self.cur.link))
+        } else {
+            // The link points to the instruction to be executed _after_ returning from a branch.
+            // However, we want to show the instruction that caused the branch, so subtract by one
+            // instruction.
+            //
+            // This might be called from panic!, so it must not panic itself on the subtraction.
+            let link = if self.cur.link >= Address::new(4) {
+                self.cur.link - 4
+            } else {
+                self.cur.link
+            };
+
+            Some(BacktraceItem::Link(link))
+        };
+
+        // Advance the iterator.
+        self.cur = previous;
+
+        ret
+    }
+}
+
+fn stack_frame_record_iterator<'a>() -> Option<StackFrameRecordIterator<'a>> {
+    let fp = Address::<Virtual>::new(FP.get() as usize);
+    if !fp.is_valid_stack_addr() {
+        return None;
+    }
+
+    Some(StackFrameRecordIterator {
+        cur: unsafe { &*(fp.as_usize() as *const _) },
+    })
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Architectural implementation of the backtrace.
+pub fn backtrace(f: impl FnOnce(Option<&mut dyn Iterator<Item = BacktraceItem>>)) {
+    f(stack_frame_record_iterator().as_mut().map(|s| s as _))
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(feature = "test_build")]
+#[inline(always)]
+/// Hack for corrupting the previous frame address in the current stack frame.
+///
+/// # Safety
+///
+/// - To be used only by testing code.
+pub unsafe fn corrupt_previous_frame_addr() {
+    let sf = FP.get() as *mut usize;
+    *sf = 0x123;
+}
+
+#[cfg(feature = "test_build")]
+#[inline(always)]
+/// Hack for corrupting the link in the current stack frame.
+///
+/// # Safety
+///
+/// - To be used only by testing code.
+pub unsafe fn corrupt_link() {
+    let sf = FP.get() as *mut StackFrameRecord;
+    (*sf).link = Address::new(0x456);
+}
diff --git a/18_backtrace/kernel/src/_arch/aarch64/cpu.rs b/18_backtrace/kernel/src/_arch/aarch64/cpu.rs
new file mode 100644
index 000000000..66da661c7
--- /dev/null
+++ b/18_backtrace/kernel/src/_arch/aarch64/cpu.rs
@@ -0,0 +1,49 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural processor code.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::arch_cpu
+
+use cortex_a::asm;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+pub use asm::nop;
+
+/// Pause execution on the core.
+#[inline(always)]
+pub fn wait_forever() -> ! {
+    loop {
+        asm::wfe()
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+#[cfg(feature = "test_build")]
+use qemu_exit::QEMUExit;
+
+#[cfg(feature = "test_build")]
+const QEMU_EXIT_HANDLE: qemu_exit::AArch64 = qemu_exit::AArch64::new();
+
+/// Make the host QEMU binary execute `exit(1)`.
+#[cfg(feature = "test_build")]
+pub fn qemu_exit_failure() -> ! {
+    QEMU_EXIT_HANDLE.exit_failure()
+}
+
+/// Make the host QEMU binary execute `exit(0)`.
+#[cfg(feature = "test_build")]
+pub fn qemu_exit_success() -> ! {
+    QEMU_EXIT_HANDLE.exit_success()
+}
diff --git a/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.rs b/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.rs
new file mode 100644
index 000000000..c0bc86be2
--- /dev/null
+++ b/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.rs
@@ -0,0 +1,113 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural boot code.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::boot::arch_boot
+
+use crate::{memory, memory::Address};
+use core::{
+    arch::global_asm,
+    sync::atomic::{compiler_fence, Ordering},
+};
+use cortex_a::{asm, registers::*};
+use tock_registers::interfaces::Writeable;
+
+// Assembly counterpart to this file.
+global_asm!(include_str!("boot.s"));
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// Prepares the transition from EL2 to EL1.
+///
+/// # Safety
+///
+/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
+/// - The HW state of EL1 must be prepared in a sound way.
+#[inline(always)]
+unsafe fn prepare_el2_to_el1_transition(
+    virt_boot_core_stack_end_exclusive_addr: u64,
+    virt_kernel_init_addr: u64,
+) {
+    // Enable timer counter registers for EL1.
+    CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
+
+    // No offset for reading the counters.
+    CNTVOFF_EL2.set(0);
+
+    // Set EL1 execution state to AArch64.
+    HCR_EL2.write(HCR_EL2::RW::EL1IsAarch64);
+
+    // Set up a simulated exception return.
+    //
+    // First, fake a saved program status where all interrupts were masked and SP_EL1 was used as a
+    // stack pointer.
+    SPSR_EL2.write(
+        SPSR_EL2::D::Masked
+            + SPSR_EL2::A::Masked
+            + SPSR_EL2::I::Masked
+            + SPSR_EL2::F::Masked
+            + SPSR_EL2::M::EL1h,
+    );
+
+    // Second, let the link register point to kernel_init().
+    ELR_EL2.set(virt_kernel_init_addr);
+
+    // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it. Since there
+    // are no plans to ever return to EL2, just re-use the same stack.
+    SP_EL1.set(virt_boot_core_stack_end_exclusive_addr);
+}
+
+/// Reset the backtrace by setting link register and frame pointer to zero.
+///
+/// # Safety
+///
+/// - This function must only be used immediately before entering EL1.
+#[inline(always)]
+unsafe fn prepare_backtrace_reset() {
+    compiler_fence(Ordering::SeqCst);
+    FP.set(0);
+    LR.set(0);
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The Rust entry of the `kernel` binary.
+///
+/// The function is called from the assembly `_start` function.
+///
+/// # Safety
+///
+/// - Exception return from EL2 must must continue execution in EL1 with `kernel_init()`.
+#[no_mangle]
+pub unsafe extern "C" fn _start_rust(
+    phys_kernel_tables_base_addr: u64,
+    virt_boot_core_stack_end_exclusive_addr: u64,
+    virt_kernel_init_addr: u64,
+) -> ! {
+    prepare_el2_to_el1_transition(
+        virt_boot_core_stack_end_exclusive_addr,
+        virt_kernel_init_addr,
+    );
+
+    // Turn on the MMU for EL1.
+    let addr = Address::new(phys_kernel_tables_base_addr as usize);
+    memory::mmu::enable_mmu_and_caching(addr).unwrap();
+
+    // Make the function we return to the root of a backtrace.
+    prepare_backtrace_reset();
+
+    // Use `eret` to "return" to EL1. Since virtual memory will already be enabled, this results in
+    // execution of kernel_init() in EL1 from its _virtual address_.
+    asm::eret()
+}
diff --git a/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.s b/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.s
new file mode 100644
index 000000000..d2c9270d0
--- /dev/null
+++ b/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.s
@@ -0,0 +1,100 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//--------------------------------------------------------------------------------------------------
+// Definitions
+//--------------------------------------------------------------------------------------------------
+
+// Load the address of a symbol into a register, PC-relative.
+//
+// The symbol must lie within +/- 4 GiB of the Program Counter.
+//
+// # Resources
+//
+// - https://sourceware.org/binutils/docs-2.36/as/AArch64_002dRelocations.html
+.macro ADR_REL register, symbol
+	adrp	\register, \symbol
+	add	\register, \register, #:lo12:\symbol
+.endm
+
+// Load the address of a symbol into a register, absolute.
+//
+// # Resources
+//
+// - https://sourceware.org/binutils/docs-2.36/as/AArch64_002dRelocations.html
+.macro ADR_ABS register, symbol
+	movz	\register, #:abs_g3:\symbol
+	movk	\register, #:abs_g2_nc:\symbol
+	movk	\register, #:abs_g1_nc:\symbol
+	movk	\register, #:abs_g0_nc:\symbol
+.endm
+
+.equ _EL2, 0x8
+.equ _core_id_mask, 0b11
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+.section .text._start
+
+//------------------------------------------------------------------------------
+// fn _start()
+//------------------------------------------------------------------------------
+_start:
+	// Only proceed if the core executes in EL2. Park it otherwise.
+	mrs	x0, CurrentEL
+	cmp	x0, _EL2
+	b.ne	.L_parking_loop
+
+	// Only proceed on the boot core. Park it otherwise.
+	mrs	x1, MPIDR_EL1
+	and	x1, x1, _core_id_mask
+	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
+	cmp	x1, x2
+	b.ne	.L_parking_loop
+
+	// If execution reaches here, it is the boot core.
+
+	// Initialize DRAM.
+	ADR_REL	x0, __bss_start
+	ADR_REL x1, __bss_end_exclusive
+
+.L_bss_init_loop:
+	cmp	x0, x1
+	b.eq	.L_prepare_rust
+	stp	xzr, xzr, [x0], #16
+	b	.L_bss_init_loop
+
+	// Prepare the jump to Rust code.
+.L_prepare_rust:
+	// Load the base address of the kernel's translation tables.
+	ldr	x0, PHYS_KERNEL_TABLES_BASE_ADDR // provided by bsp/__board_name__/memory/mmu.rs
+
+	// Load the _absolute_ addresses of the following symbols. Since the kernel is linked at
+	// the top of the 64 bit address space, these are effectively virtual addresses.
+	ADR_ABS	x1, __boot_core_stack_end_exclusive
+	ADR_ABS	x2, kernel_init
+
+	// Load the PC-relative address of the stack and set the stack pointer.
+	//
+	// Since _start() is the first function that runs after the firmware has loaded the kernel
+	// into memory, retrieving this symbol PC-relative returns the "physical" address.
+	//
+	// Setting the stack pointer to this value ensures that anything that still runs in EL2,
+	// until the kernel returns to EL1 with the MMU enabled, works as well. After the return to
+	// EL1, the virtual address of the stack retrieved above will be used.
+	ADR_REL	x4, __boot_core_stack_end_exclusive
+	mov	sp, x4
+
+	// Jump to Rust code. x0, x1 and x2 hold the function arguments provided to _start_rust().
+	b	_start_rust
+
+	// Infinitely wait for events (aka "park the core").
+.L_parking_loop:
+	wfe
+	b	.L_parking_loop
+
+.size	_start, . - _start
+.type	_start, function
+.global	_start
diff --git a/18_backtrace/kernel/src/_arch/aarch64/cpu/smp.rs b/18_backtrace/kernel/src/_arch/aarch64/cpu/smp.rs
new file mode 100644
index 000000000..351fde62e
--- /dev/null
+++ b/18_backtrace/kernel/src/_arch/aarch64/cpu/smp.rs
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural symmetric multiprocessing.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::smp::arch_smp
+
+use cortex_a::registers::*;
+use tock_registers::interfaces::Readable;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return the executing core's id.
+#[inline(always)]
+pub fn core_id<T>() -> T
+where
+    T: From<u8>,
+{
+    const CORE_MASK: u64 = 0b11;
+
+    T::from((MPIDR_EL1.get() & CORE_MASK) as u8)
+}
diff --git a/18_backtrace/kernel/src/_arch/aarch64/exception.rs b/18_backtrace/kernel/src/_arch/aarch64/exception.rs
new file mode 100644
index 000000000..6781758af
--- /dev/null
+++ b/18_backtrace/kernel/src/_arch/aarch64/exception.rs
@@ -0,0 +1,323 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural synchronous and asynchronous exception handling.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::exception::arch_exception
+
+use crate::{bsp, exception, memory, symbols};
+use core::{arch::global_asm, cell::UnsafeCell, fmt};
+use cortex_a::{asm::barrier, registers::*};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    registers::InMemoryRegister,
+};
+
+// Assembly counterpart to this file.
+global_asm!(include_str!("exception.s"));
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Wrapper structs for memory copies of registers.
+#[repr(transparent)]
+struct SpsrEL1(InMemoryRegister<u64, SPSR_EL1::Register>);
+struct EsrEL1(InMemoryRegister<u64, ESR_EL1::Register>);
+
+/// The exception context as it is stored on the stack on exception entry.
+#[repr(C)]
+struct ExceptionContext {
+    /// General Purpose Registers.
+    gpr: [u64; 30],
+
+    /// The link register, aka x30.
+    lr: u64,
+
+    /// Exception link register. The program counter at the time the exception happened.
+    elr_el1: u64,
+
+    /// Saved program status.
+    spsr_el1: SpsrEL1,
+
+    /// Exception syndrome register.
+    esr_el1: EsrEL1,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// Prints verbose information about the exception and then panics.
+fn default_exception_handler(exc: &ExceptionContext) {
+    panic!(
+        "CPU Exception!\n\n\
+        {}",
+        exc
+    );
+}
+
+//------------------------------------------------------------------------------
+// Current, EL0
+//------------------------------------------------------------------------------
+
+#[no_mangle]
+unsafe extern "C" fn current_el0_synchronous(_e: &mut ExceptionContext) {
+    panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
+}
+
+#[no_mangle]
+unsafe extern "C" fn current_el0_irq(_e: &mut ExceptionContext) {
+    panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
+}
+
+#[no_mangle]
+unsafe extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
+    panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
+}
+
+//------------------------------------------------------------------------------
+// Current, ELx
+//------------------------------------------------------------------------------
+
+#[no_mangle]
+unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
+    #[cfg(feature = "test_build")]
+    {
+        const TEST_SVC_ID: u64 = 0x1337;
+
+        if let Some(ESR_EL1::EC::Value::SVC64) = e.esr_el1.exception_class() {
+            if e.esr_el1.iss() == TEST_SVC_ID {
+                return;
+            }
+        }
+    }
+
+    default_exception_handler(e);
+}
+
+#[no_mangle]
+unsafe extern "C" fn current_elx_irq(_e: &mut ExceptionContext) {
+    use exception::asynchronous::interface::IRQManager;
+
+    let token = &exception::asynchronous::IRQContext::new();
+    bsp::exception::asynchronous::irq_manager().handle_pending_irqs(token);
+}
+
+#[no_mangle]
+unsafe extern "C" fn current_elx_serror(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+//------------------------------------------------------------------------------
+// Lower, AArch64
+//------------------------------------------------------------------------------
+
+#[no_mangle]
+unsafe extern "C" fn lower_aarch64_synchronous(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+#[no_mangle]
+unsafe extern "C" fn lower_aarch64_irq(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+#[no_mangle]
+unsafe extern "C" fn lower_aarch64_serror(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+//------------------------------------------------------------------------------
+// Lower, AArch32
+//------------------------------------------------------------------------------
+
+#[no_mangle]
+unsafe extern "C" fn lower_aarch32_synchronous(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+#[no_mangle]
+unsafe extern "C" fn lower_aarch32_irq(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+#[no_mangle]
+unsafe extern "C" fn lower_aarch32_serror(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+//------------------------------------------------------------------------------
+// Misc
+//------------------------------------------------------------------------------
+
+/// Human readable SPSR_EL1.
+#[rustfmt::skip]
+impl fmt::Display for SpsrEL1 {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        // Raw value.
+        writeln!(f, "SPSR_EL1: {:#010x}", self.0.get())?;
+
+        let to_flag_str = |x| -> _ {
+            if x { "Set" } else { "Not set" }
+         };
+
+        writeln!(f, "      Flags:")?;
+        writeln!(f, "            Negative (N): {}", to_flag_str(self.0.is_set(SPSR_EL1::N)))?;
+        writeln!(f, "            Zero     (Z): {}", to_flag_str(self.0.is_set(SPSR_EL1::Z)))?;
+        writeln!(f, "            Carry    (C): {}", to_flag_str(self.0.is_set(SPSR_EL1::C)))?;
+        writeln!(f, "            Overflow (V): {}", to_flag_str(self.0.is_set(SPSR_EL1::V)))?;
+
+        let to_mask_str = |x| -> _ {
+            if x { "Masked" } else { "Unmasked" }
+        };
+
+        writeln!(f, "      Exception handling state:")?;
+        writeln!(f, "            Debug  (D): {}", to_mask_str(self.0.is_set(SPSR_EL1::D)))?;
+        writeln!(f, "            SError (A): {}", to_mask_str(self.0.is_set(SPSR_EL1::A)))?;
+        writeln!(f, "            IRQ    (I): {}", to_mask_str(self.0.is_set(SPSR_EL1::I)))?;
+        writeln!(f, "            FIQ    (F): {}", to_mask_str(self.0.is_set(SPSR_EL1::F)))?;
+
+        write!(f, "      Illegal Execution State (IL): {}",
+            to_flag_str(self.0.is_set(SPSR_EL1::IL))
+        )
+    }
+}
+
+impl EsrEL1 {
+    #[inline(always)]
+    fn exception_class(&self) -> Option<ESR_EL1::EC::Value> {
+        self.0.read_as_enum(ESR_EL1::EC)
+    }
+
+    #[cfg(feature = "test_build")]
+    #[inline(always)]
+    fn iss(&self) -> u64 {
+        self.0.read(ESR_EL1::ISS)
+    }
+}
+
+/// Human readable ESR_EL1.
+#[rustfmt::skip]
+impl fmt::Display for EsrEL1 {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        // Raw print of whole register.
+        writeln!(f, "ESR_EL1: {:#010x}", self.0.get())?;
+
+        // Raw print of exception class.
+        write!(f, "      Exception Class         (EC) : {:#x}", self.0.read(ESR_EL1::EC))?;
+
+        // Exception class.
+        let ec_translation = match self.exception_class() {
+            Some(ESR_EL1::EC::Value::DataAbortCurrentEL) => "Data Abort, current EL",
+            _ => "N/A",
+        };
+        writeln!(f, " - {}", ec_translation)?;
+
+        // Raw print of instruction specific syndrome.
+        write!(f, "      Instr Specific Syndrome (ISS): {:#x}", self.0.read(ESR_EL1::ISS))
+    }
+}
+
+impl ExceptionContext {
+    #[inline(always)]
+    fn exception_class(&self) -> Option<ESR_EL1::EC::Value> {
+        self.esr_el1.exception_class()
+    }
+
+    #[inline(always)]
+    fn fault_address_valid(&self) -> bool {
+        use ESR_EL1::EC::Value::*;
+
+        match self.exception_class() {
+            None => false,
+            Some(ec) => matches!(
+                ec,
+                InstrAbortLowerEL
+                    | InstrAbortCurrentEL
+                    | PCAlignmentFault
+                    | DataAbortLowerEL
+                    | DataAbortCurrentEL
+                    | WatchpointLowerEL
+                    | WatchpointCurrentEL
+            ),
+        }
+    }
+}
+
+/// Human readable print of the exception context.
+impl fmt::Display for ExceptionContext {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        writeln!(f, "{}", self.esr_el1)?;
+
+        if self.fault_address_valid() {
+            writeln!(f, "FAR_EL1: {:#018x}", FAR_EL1.get() as usize)?;
+        }
+
+        writeln!(f, "{}", self.spsr_el1)?;
+        writeln!(f, "ELR_EL1: {:#018x}", self.elr_el1)?;
+        writeln!(
+            f,
+            "      Symbol: {}",
+            match symbols::lookup_symbol(memory::Address::new(self.elr_el1 as usize)) {
+                Some(sym) => sym.name(),
+                _ => "Symbol not found",
+            }
+        )?;
+        writeln!(f)?;
+        writeln!(f, "General purpose register:")?;
+
+        #[rustfmt::skip]
+        let alternating = |x| -> _ {
+            if x % 2 == 0 { "   " } else { "\n" }
+        };
+
+        // Print two registers per line.
+        for (i, reg) in self.gpr.iter().enumerate() {
+            write!(f, "      x{: <2}: {: >#018x}{}", i, reg, alternating(i))?;
+        }
+        write!(f, "      lr : {:#018x}", self.lr)
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+use crate::exception::PrivilegeLevel;
+
+/// The processing element's current privilege level.
+pub fn current_privilege_level() -> (PrivilegeLevel, &'static str) {
+    let el = CurrentEL.read_as_enum(CurrentEL::EL);
+    match el {
+        Some(CurrentEL::EL::Value::EL2) => (PrivilegeLevel::Hypervisor, "EL2"),
+        Some(CurrentEL::EL::Value::EL1) => (PrivilegeLevel::Kernel, "EL1"),
+        Some(CurrentEL::EL::Value::EL0) => (PrivilegeLevel::User, "EL0"),
+        _ => (PrivilegeLevel::Unknown, "Unknown"),
+    }
+}
+
+/// Init exception handling by setting the exception vector base address register.
+///
+/// # Safety
+///
+/// - Changes the HW state of the executing core.
+/// - The vector table and the symbol `__exception_vector_table_start` from the linker script must
+///   adhere to the alignment and size constraints demanded by the ARMv8-A Architecture Reference
+///   Manual.
+pub unsafe fn handling_init() {
+    // Provided by exception.S.
+    extern "Rust" {
+        static __exception_vector_start: UnsafeCell<()>;
+    }
+
+    VBAR_EL1.set(__exception_vector_start.get() as u64);
+
+    // Force VBAR update to complete before next instruction.
+    barrier::isb(barrier::SY);
+}
diff --git a/18_backtrace/kernel/src/_arch/aarch64/exception.s b/18_backtrace/kernel/src/_arch/aarch64/exception.s
new file mode 100644
index 000000000..17acaf59f
--- /dev/null
+++ b/18_backtrace/kernel/src/_arch/aarch64/exception.s
@@ -0,0 +1,190 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//--------------------------------------------------------------------------------------------------
+// Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Call the function provided by parameter `\handler` after saving the exception context. Provide
+/// the context as the first parameter to '\handler'.
+.macro CALL_WITH_CONTEXT handler is_lower_el is_sync
+__vector_\handler:
+	// Make room on the stack for the exception context.
+	sub	sp,  sp,  #16 * 18
+
+	// Store all general purpose registers on the stack.
+	stp	x0,  x1,  [sp, #16 * 0]
+	stp	x2,  x3,  [sp, #16 * 1]
+	stp	x4,  x5,  [sp, #16 * 2]
+	stp	x6,  x7,  [sp, #16 * 3]
+	stp	x8,  x9,  [sp, #16 * 4]
+	stp	x10, x11, [sp, #16 * 5]
+	stp	x12, x13, [sp, #16 * 6]
+	stp	x14, x15, [sp, #16 * 7]
+	stp	x16, x17, [sp, #16 * 8]
+	stp	x18, x19, [sp, #16 * 9]
+	stp	x20, x21, [sp, #16 * 10]
+	stp	x22, x23, [sp, #16 * 11]
+	stp	x24, x25, [sp, #16 * 12]
+	stp	x26, x27, [sp, #16 * 13]
+	stp	x28, x29, [sp, #16 * 14]
+
+	// Add the exception link register (ELR_EL1), saved program status (SPSR_EL1) and exception
+	// syndrome register (ESR_EL1).
+	mrs	x1,  ELR_EL1
+	mrs	x2,  SPSR_EL1
+	mrs	x3,  ESR_EL1
+
+	stp	lr,  x1,  [sp, #16 * 15]
+	stp	x2,  x3,  [sp, #16 * 16]
+
+	// Build a stack frame for backtracing.
+.if \is_lower_el == 1
+	// If we came from a lower EL, make it a root frame (by storing zero) so that the kernel
+	// does not attempt to trace into userspace.
+	stp	xzr, xzr, [sp, #16 * 17]
+.else
+	// For normal branches, the link address points to the instruction to be executed _after_
+	// returning from a branch. In a backtrace, we want to show the instruction that caused the
+	// branch, though. That is why code in backtrace.rs subtracts 4 (length of one instruction)
+	// from the link address.
+	//
+	// Here we have a special case, though, because ELR_EL1 is used instead of LR to build the
+	// stack frame, so that it becomes possible to trace beyond an exception. Hence, it must be
+	// considered that semantics for ELR_EL1 differ from case to case.
+	//
+	// Unless an "exception generating instruction" was executed, ELR_EL1 already points to the
+	// the correct instruction, and hence the subtraction by 4 in backtrace.rs would yield wrong
+	// results. To cover for this, 4 is added to ELR_EL1 below unless the cause of exception was
+	// an SVC instruction. BRK and HLT are "exception generating instructions" as well, but they
+	// are not expected and therefore left out for now.
+	//
+	// For reference: Search for "preferred exception return address" in the Architecture
+	// Reference Manual for ARMv8-A.
+.if \is_sync == 1
+	lsr	w3,  w3, #26 // w3 = ESR_EL1.EC
+	cmp	w3,  #0x15   // w3 == SVC64 ?
+	b.eq	1f
+.endif
+	add	x1,  x1, #4
+1:
+	stp	x29, x1, [sp, #16 * 17]
+.endif
+
+	// Set the frame pointer to the stack frame record.
+	add	x29, sp, #16 * 17
+
+	// x0 is the first argument for the function called through `\handler`.
+	mov	x0,  sp
+
+	// Call `\handler`.
+	bl	\handler
+
+	// After returning from exception handling code, replay the saved context and return via
+	// `eret`.
+	b	__exception_restore_context
+
+.size	__vector_\handler, . - __vector_\handler
+.type	__vector_\handler, function
+.endm
+
+.macro FIQ_SUSPEND
+1:	wfe
+	b	1b
+.endm
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+.section .text
+
+//------------------------------------------------------------------------------
+// The exception vector table.
+//------------------------------------------------------------------------------
+
+// Align by 2^11 bytes, as demanded by ARMv8-A. Same as ALIGN(2048) in an ld script.
+.align 11
+
+// Export a symbol for the Rust code to use.
+__exception_vector_start:
+
+// Current exception level with SP_EL0.
+//
+// .org sets the offset relative to section start.
+//
+// # Safety
+//
+// - It must be ensured that `CALL_WITH_CONTEXT` <= 0x80 bytes.
+.org 0x000
+	CALL_WITH_CONTEXT current_el0_synchronous, 0, 1
+.org 0x080
+	CALL_WITH_CONTEXT current_el0_irq, 0, 0
+.org 0x100
+	FIQ_SUSPEND
+.org 0x180
+	CALL_WITH_CONTEXT current_el0_serror, 0, 0
+
+// Current exception level with SP_ELx, x > 0.
+.org 0x200
+	CALL_WITH_CONTEXT current_elx_synchronous, 0, 1
+.org 0x280
+	CALL_WITH_CONTEXT current_elx_irq, 0, 0
+.org 0x300
+	FIQ_SUSPEND
+.org 0x380
+	CALL_WITH_CONTEXT current_elx_serror, 0, 0
+
+// Lower exception level, AArch64
+.org 0x400
+	CALL_WITH_CONTEXT lower_aarch64_synchronous, 1, 1
+.org 0x480
+	CALL_WITH_CONTEXT lower_aarch64_irq, 1, 0
+.org 0x500
+	FIQ_SUSPEND
+.org 0x580
+	CALL_WITH_CONTEXT lower_aarch64_serror, 1, 0
+
+// Lower exception level, AArch32
+.org 0x600
+	CALL_WITH_CONTEXT lower_aarch32_synchronous, 1, 0
+.org 0x680
+	CALL_WITH_CONTEXT lower_aarch32_irq, 1, 0
+.org 0x700
+	FIQ_SUSPEND
+.org 0x780
+	CALL_WITH_CONTEXT lower_aarch32_serror, 1, 0
+.org 0x800
+
+//------------------------------------------------------------------------------
+// fn __exception_restore_context()
+//------------------------------------------------------------------------------
+__exception_restore_context:
+	ldr	w19,      [sp, #16 * 16]
+	ldp	lr,  x20, [sp, #16 * 15]
+
+	msr	SPSR_EL1, x19
+	msr	ELR_EL1,  x20
+
+	ldp	x0,  x1,  [sp, #16 * 0]
+	ldp	x2,  x3,  [sp, #16 * 1]
+	ldp	x4,  x5,  [sp, #16 * 2]
+	ldp	x6,  x7,  [sp, #16 * 3]
+	ldp	x8,  x9,  [sp, #16 * 4]
+	ldp	x10, x11, [sp, #16 * 5]
+	ldp	x12, x13, [sp, #16 * 6]
+	ldp	x14, x15, [sp, #16 * 7]
+	ldp	x16, x17, [sp, #16 * 8]
+	ldp	x18, x19, [sp, #16 * 9]
+	ldp	x20, x21, [sp, #16 * 10]
+	ldp	x22, x23, [sp, #16 * 11]
+	ldp	x24, x25, [sp, #16 * 12]
+	ldp	x26, x27, [sp, #16 * 13]
+	ldp	x28, x29, [sp, #16 * 14]
+
+	add	sp,  sp,  #16 * 18
+
+	eret
+
+.size	__exception_restore_context, . - __exception_restore_context
+.type	__exception_restore_context, function
diff --git a/18_backtrace/kernel/src/_arch/aarch64/exception/asynchronous.rs b/18_backtrace/kernel/src/_arch/aarch64/exception/asynchronous.rs
new file mode 100644
index 000000000..73b82e65d
--- /dev/null
+++ b/18_backtrace/kernel/src/_arch/aarch64/exception/asynchronous.rs
@@ -0,0 +1,152 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural asynchronous exception handling.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::exception::asynchronous::arch_asynchronous
+
+use core::arch::asm;
+use cortex_a::registers::*;
+use tock_registers::interfaces::{Readable, Writeable};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+mod daif_bits {
+    pub const IRQ: u8 = 0b0010;
+}
+
+trait DaifField {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register>;
+}
+
+struct Debug;
+struct SError;
+struct IRQ;
+struct FIQ;
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl DaifField for Debug {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
+        DAIF::D
+    }
+}
+
+impl DaifField for SError {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
+        DAIF::A
+    }
+}
+
+impl DaifField for IRQ {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
+        DAIF::I
+    }
+}
+
+impl DaifField for FIQ {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
+        DAIF::F
+    }
+}
+
+fn is_masked<T>() -> bool
+where
+    T: DaifField,
+{
+    DAIF.is_set(T::daif_field())
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Returns whether IRQs are masked on the executing core.
+pub fn is_local_irq_masked() -> bool {
+    !is_masked::<IRQ>()
+}
+
+/// Unmask IRQs on the executing core.
+///
+/// It is not needed to place an explicit instruction synchronization barrier after the `msr`.
+/// Quoting the Architecture Reference Manual for ARMv8-A, section C5.1.3:
+///
+/// "Writes to PSTATE.{PAN, D, A, I, F} occur in program order without the need for additional
+/// synchronization."
+///
+/// # Safety
+///
+/// - Changes the HW state of the executing core.
+#[inline(always)]
+pub unsafe fn local_irq_unmask() {
+    #[rustfmt::skip]
+    asm!(
+        "msr DAIFClr, {arg}",
+        arg = const daif_bits::IRQ,
+        options(nomem, nostack, preserves_flags)
+    );
+}
+
+/// Mask IRQs on the executing core.
+///
+/// # Safety
+///
+/// - Changes the HW state of the executing core.
+#[inline(always)]
+pub unsafe fn local_irq_mask() {
+    #[rustfmt::skip]
+    asm!(
+        "msr DAIFSet, {arg}",
+        arg = const daif_bits::IRQ,
+        options(nomem, nostack, preserves_flags)
+    );
+}
+
+/// Mask IRQs on the executing core and return the previously saved interrupt mask bits (DAIF).
+///
+/// # Safety
+///
+/// - Changes the HW state of the executing core.
+#[inline(always)]
+pub unsafe fn local_irq_mask_save() -> u64 {
+    let saved = DAIF.get();
+    local_irq_mask();
+
+    saved
+}
+
+/// Restore the interrupt mask bits (DAIF) using the callee's argument.
+///
+/// # Safety
+///
+/// - Changes the HW state of the executing core.
+/// - No sanity checks on the input.
+#[inline(always)]
+pub unsafe fn local_irq_restore(saved: u64) {
+    DAIF.set(saved);
+}
+
+/// Print the AArch64 exceptions status.
+#[rustfmt::skip]
+pub fn print_state() {
+    use crate::info;
+
+    let to_mask_str = |x| -> _ {
+        if x { "Masked" } else { "Unmasked" }
+    };
+
+    info!("      Debug:  {}", to_mask_str(is_masked::<Debug>()));
+    info!("      SError: {}", to_mask_str(is_masked::<SError>()));
+    info!("      IRQ:    {}", to_mask_str(is_masked::<IRQ>()));
+    info!("      FIQ:    {}", to_mask_str(is_masked::<FIQ>()));
+}
diff --git a/18_backtrace/kernel/src/_arch/aarch64/memory/mmu.rs b/18_backtrace/kernel/src/_arch/aarch64/memory/mmu.rs
new file mode 100644
index 000000000..3d6c18b74
--- /dev/null
+++ b/18_backtrace/kernel/src/_arch/aarch64/memory/mmu.rs
@@ -0,0 +1,158 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Memory Management Unit Driver.
+//!
+//! Only 64 KiB granule is supported.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::memory::mmu::arch_mmu
+
+use crate::{
+    bsp, memory,
+    memory::{mmu::TranslationGranule, Address, Physical},
+};
+use core::intrinsics::unlikely;
+use cortex_a::{asm::barrier, registers::*};
+use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Memory Management Unit type.
+struct MemoryManagementUnit;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub type Granule512MiB = TranslationGranule<{ 512 * 1024 * 1024 }>;
+pub type Granule64KiB = TranslationGranule<{ 64 * 1024 }>;
+
+/// Constants for indexing the MAIR_EL1.
+#[allow(dead_code)]
+pub mod mair {
+    pub const DEVICE: u64 = 0;
+    pub const NORMAL: u64 = 1;
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static MMU: MemoryManagementUnit = MemoryManagementUnit;
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl<const AS_SIZE: usize> memory::mmu::AddressSpace<AS_SIZE> {
+    /// Checks for architectural restrictions.
+    pub const fn arch_address_space_size_sanity_checks() {
+        // Size must be at least one full 512 MiB table.
+        assert!((AS_SIZE % Granule512MiB::SIZE) == 0);
+
+        // Check for 48 bit virtual address size as maximum, which is supported by any ARMv8
+        // version.
+        assert!(AS_SIZE <= (1 << 48));
+    }
+}
+
+impl MemoryManagementUnit {
+    /// Setup function for the MAIR_EL1 register.
+    #[inline(always)]
+    fn set_up_mair(&self) {
+        // Define the memory types being mapped.
+        MAIR_EL1.write(
+            // Attribute 1 - Cacheable normal DRAM.
+            MAIR_EL1::Attr1_Normal_Outer::WriteBack_NonTransient_ReadWriteAlloc +
+        MAIR_EL1::Attr1_Normal_Inner::WriteBack_NonTransient_ReadWriteAlloc +
+
+        // Attribute 0 - Device.
+        MAIR_EL1::Attr0_Device::nonGathering_nonReordering_EarlyWriteAck,
+        );
+    }
+
+    /// Configure various settings of stage 1 of the EL1 translation regime.
+    #[inline(always)]
+    fn configure_translation_control(&self) {
+        let t1sz = (64 - bsp::memory::mmu::KernelVirtAddrSpace::SIZE_SHIFT) as u64;
+
+        TCR_EL1.write(
+            TCR_EL1::TBI1::Used
+                + TCR_EL1::IPS::Bits_40
+                + TCR_EL1::TG1::KiB_64
+                + TCR_EL1::SH1::Inner
+                + TCR_EL1::ORGN1::WriteBack_ReadAlloc_WriteAlloc_Cacheable
+                + TCR_EL1::IRGN1::WriteBack_ReadAlloc_WriteAlloc_Cacheable
+                + TCR_EL1::EPD1::EnableTTBR1Walks
+                + TCR_EL1::A1::TTBR1
+                + TCR_EL1::T1SZ.val(t1sz)
+                + TCR_EL1::EPD0::DisableTTBR0Walks,
+        );
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the MMU instance.
+pub fn mmu() -> &'static impl memory::mmu::interface::MMU {
+    &MMU
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use memory::mmu::MMUEnableError;
+
+impl memory::mmu::interface::MMU for MemoryManagementUnit {
+    unsafe fn enable_mmu_and_caching(
+        &self,
+        phys_tables_base_addr: Address<Physical>,
+    ) -> Result<(), MMUEnableError> {
+        if unlikely(self.is_enabled()) {
+            return Err(MMUEnableError::AlreadyEnabled);
+        }
+
+        // Fail early if translation granule is not supported.
+        if unlikely(!ID_AA64MMFR0_EL1.matches_all(ID_AA64MMFR0_EL1::TGran64::Supported)) {
+            return Err(MMUEnableError::Other(
+                "Translation granule not supported in HW",
+            ));
+        }
+
+        // Prepare the memory attribute indirection register.
+        self.set_up_mair();
+
+        // Set the "Translation Table Base Register".
+        TTBR1_EL1.set_baddr(phys_tables_base_addr.as_usize() as u64);
+
+        self.configure_translation_control();
+
+        // Switch the MMU on.
+        //
+        // First, force all previous changes to be seen before the MMU is enabled.
+        barrier::isb(barrier::SY);
+
+        // Enable the MMU and turn on data and instruction caching.
+        SCTLR_EL1.modify(SCTLR_EL1::M::Enable + SCTLR_EL1::C::Cacheable + SCTLR_EL1::I::Cacheable);
+
+        // Force MMU init to complete before next instruction.
+        barrier::isb(barrier::SY);
+
+        Ok(())
+    }
+
+    #[inline(always)]
+    fn is_enabled(&self) -> bool {
+        SCTLR_EL1.matches_all(SCTLR_EL1::M::Enable)
+    }
+}
diff --git a/18_backtrace/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs b/18_backtrace/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
new file mode 100644
index 000000000..f0b4ac85f
--- /dev/null
+++ b/18_backtrace/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -0,0 +1,521 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural translation table.
+//!
+//! Only 64 KiB granule is supported.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::memory::mmu::translation_table::arch_translation_table
+
+use crate::{
+    bsp,
+    memory::{
+        self,
+        mmu::{
+            arch_mmu::{Granule512MiB, Granule64KiB},
+            AccessPermissions, AttributeFields, MemAttributes, MemoryRegion, PageAddress,
+        },
+        Address, Physical, Virtual,
+    },
+};
+use core::convert;
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields,
+    registers::InMemoryRegister,
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+// A table descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-15.
+register_bitfields! {u64,
+    STAGE1_TABLE_DESCRIPTOR [
+        /// Physical address of the next descriptor.
+        NEXT_LEVEL_TABLE_ADDR_64KiB OFFSET(16) NUMBITS(32) [], // [47:16]
+
+        TYPE  OFFSET(1) NUMBITS(1) [
+            Block = 0,
+            Table = 1
+        ],
+
+        VALID OFFSET(0) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ]
+    ]
+}
+
+// A level 3 page descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-17.
+register_bitfields! {u64,
+    STAGE1_PAGE_DESCRIPTOR [
+        /// Unprivileged execute-never.
+        UXN      OFFSET(54) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
+        /// Privileged execute-never.
+        PXN      OFFSET(53) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
+        /// Physical address of the next table descriptor (lvl2) or the page descriptor (lvl3).
+        OUTPUT_ADDR_64KiB OFFSET(16) NUMBITS(32) [], // [47:16]
+
+        /// Access flag.
+        AF       OFFSET(10) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
+        /// Shareability field.
+        SH       OFFSET(8) NUMBITS(2) [
+            OuterShareable = 0b10,
+            InnerShareable = 0b11
+        ],
+
+        /// Access Permissions.
+        AP       OFFSET(6) NUMBITS(2) [
+            RW_EL1 = 0b00,
+            RW_EL1_EL0 = 0b01,
+            RO_EL1 = 0b10,
+            RO_EL1_EL0 = 0b11
+        ],
+
+        /// Memory attributes index into the MAIR_EL1 register.
+        AttrIndx OFFSET(2) NUMBITS(3) [],
+
+        TYPE     OFFSET(1) NUMBITS(1) [
+            Reserved_Invalid = 0,
+            Page = 1
+        ],
+
+        VALID    OFFSET(0) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ]
+    ]
+}
+
+/// A table descriptor for 64 KiB aperture.
+///
+/// The output points to the next table.
+#[derive(Copy, Clone)]
+#[repr(C)]
+struct TableDescriptor {
+    value: u64,
+}
+
+/// A page descriptor with 64 KiB aperture.
+///
+/// The output points to physical memory.
+#[derive(Copy, Clone)]
+#[repr(C)]
+struct PageDescriptor {
+    value: u64,
+}
+
+trait StartAddr {
+    fn virt_start_addr(&self) -> Address<Virtual>;
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Big monolithic struct for storing the translation tables. Individual levels must be 64 KiB
+/// aligned, so the lvl3 is put first.
+#[repr(C)]
+#[repr(align(65536))]
+pub struct FixedSizeTranslationTable<const NUM_TABLES: usize, const START_FROM_TOP: bool> {
+    /// Page descriptors, covering 64 KiB windows per entry.
+    lvl3: [[PageDescriptor; 8192]; NUM_TABLES],
+
+    /// Table descriptors, covering 512 MiB windows.
+    lvl2: [TableDescriptor; NUM_TABLES],
+
+    /// Have the tables been initialized?
+    initialized: bool,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl<T, const N: usize> StartAddr for [T; N] {
+    fn virt_start_addr(&self) -> Address<Virtual> {
+        Address::new(self as *const _ as usize)
+    }
+}
+
+impl TableDescriptor {
+    /// Create an instance.
+    ///
+    /// Descriptor is invalid by default.
+    pub const fn new_zeroed() -> Self {
+        Self { value: 0 }
+    }
+
+    /// Create an instance pointing to the supplied address.
+    pub fn from_next_lvl_table_addr(phys_next_lvl_table_addr: Address<Physical>) -> Self {
+        let val = InMemoryRegister::<u64, STAGE1_TABLE_DESCRIPTOR::Register>::new(0);
+
+        let shifted = phys_next_lvl_table_addr.as_usize() >> Granule64KiB::SHIFT;
+        val.write(
+            STAGE1_TABLE_DESCRIPTOR::NEXT_LEVEL_TABLE_ADDR_64KiB.val(shifted as u64)
+                + STAGE1_TABLE_DESCRIPTOR::TYPE::Table
+                + STAGE1_TABLE_DESCRIPTOR::VALID::True,
+        );
+
+        TableDescriptor { value: val.get() }
+    }
+}
+
+/// Convert the kernel's generic memory attributes to HW-specific attributes of the MMU.
+impl convert::From<AttributeFields>
+    for tock_registers::fields::FieldValue<u64, STAGE1_PAGE_DESCRIPTOR::Register>
+{
+    fn from(attribute_fields: AttributeFields) -> Self {
+        // Memory attributes.
+        let mut desc = match attribute_fields.mem_attributes {
+            MemAttributes::CacheableDRAM => {
+                STAGE1_PAGE_DESCRIPTOR::SH::InnerShareable
+                    + STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(memory::mmu::arch_mmu::mair::NORMAL)
+            }
+            MemAttributes::Device => {
+                STAGE1_PAGE_DESCRIPTOR::SH::OuterShareable
+                    + STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(memory::mmu::arch_mmu::mair::DEVICE)
+            }
+        };
+
+        // Access Permissions.
+        desc += match attribute_fields.acc_perms {
+            AccessPermissions::ReadOnly => STAGE1_PAGE_DESCRIPTOR::AP::RO_EL1,
+            AccessPermissions::ReadWrite => STAGE1_PAGE_DESCRIPTOR::AP::RW_EL1,
+        };
+
+        // The execute-never attribute is mapped to PXN in AArch64.
+        desc += if attribute_fields.execute_never {
+            STAGE1_PAGE_DESCRIPTOR::PXN::True
+        } else {
+            STAGE1_PAGE_DESCRIPTOR::PXN::False
+        };
+
+        // Always set unprivileged exectue-never as long as userspace is not implemented yet.
+        desc += STAGE1_PAGE_DESCRIPTOR::UXN::True;
+
+        desc
+    }
+}
+
+/// Convert the HW-specific attributes of the MMU to kernel's generic memory attributes.
+impl convert::TryFrom<InMemoryRegister<u64, STAGE1_PAGE_DESCRIPTOR::Register>> for AttributeFields {
+    type Error = &'static str;
+
+    fn try_from(
+        desc: InMemoryRegister<u64, STAGE1_PAGE_DESCRIPTOR::Register>,
+    ) -> Result<AttributeFields, Self::Error> {
+        let mem_attributes = match desc.read(STAGE1_PAGE_DESCRIPTOR::AttrIndx) {
+            memory::mmu::arch_mmu::mair::NORMAL => MemAttributes::CacheableDRAM,
+            memory::mmu::arch_mmu::mair::DEVICE => MemAttributes::Device,
+            _ => return Err("Unexpected memory attribute"),
+        };
+
+        let acc_perms = match desc.read_as_enum(STAGE1_PAGE_DESCRIPTOR::AP) {
+            Some(STAGE1_PAGE_DESCRIPTOR::AP::Value::RO_EL1) => AccessPermissions::ReadOnly,
+            Some(STAGE1_PAGE_DESCRIPTOR::AP::Value::RW_EL1) => AccessPermissions::ReadWrite,
+            _ => return Err("Unexpected access permission"),
+        };
+
+        let execute_never = desc.read(STAGE1_PAGE_DESCRIPTOR::PXN) > 0;
+
+        Ok(AttributeFields {
+            mem_attributes,
+            acc_perms,
+            execute_never,
+        })
+    }
+}
+
+impl PageDescriptor {
+    /// Create an instance.
+    ///
+    /// Descriptor is invalid by default.
+    pub const fn new_zeroed() -> Self {
+        Self { value: 0 }
+    }
+
+    /// Create an instance.
+    pub fn from_output_page_addr(
+        phys_output_page_addr: PageAddress<Physical>,
+        attribute_fields: &AttributeFields,
+    ) -> Self {
+        let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
+
+        let shifted = phys_output_page_addr.into_inner().as_usize() >> Granule64KiB::SHIFT;
+        val.write(
+            STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted as u64)
+                + STAGE1_PAGE_DESCRIPTOR::AF::True
+                + STAGE1_PAGE_DESCRIPTOR::TYPE::Page
+                + STAGE1_PAGE_DESCRIPTOR::VALID::True
+                + (*attribute_fields).into(),
+        );
+
+        Self { value: val.get() }
+    }
+
+    /// Returns the valid bit.
+    fn is_valid(&self) -> bool {
+        InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(self.value)
+            .is_set(STAGE1_PAGE_DESCRIPTOR::VALID)
+    }
+
+    /// Returns the output page.
+    fn output_page_addr(&self) -> PageAddress<Physical> {
+        let shifted = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(self.value)
+            .read(STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB) as usize;
+
+        PageAddress::from(shifted << Granule64KiB::SHIFT)
+    }
+
+    /// Returns the attributes.
+    fn try_attributes(&self) -> Result<AttributeFields, &'static str> {
+        InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(self.value).try_into()
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl<const AS_SIZE: usize> memory::mmu::AssociatedTranslationTable
+    for memory::mmu::AddressSpace<AS_SIZE>
+where
+    [u8; Self::SIZE >> Granule512MiB::SHIFT]: Sized,
+{
+    type TableStartFromTop =
+        FixedSizeTranslationTable<{ Self::SIZE >> Granule512MiB::SHIFT }, true>;
+
+    type TableStartFromBottom =
+        FixedSizeTranslationTable<{ Self::SIZE >> Granule512MiB::SHIFT }, false>;
+}
+
+impl<const NUM_TABLES: usize, const START_FROM_TOP: bool>
+    FixedSizeTranslationTable<NUM_TABLES, START_FROM_TOP>
+{
+    const START_FROM_TOP_OFFSET: Address<Virtual> =
+        Address::new((usize::MAX - (Granule512MiB::SIZE * NUM_TABLES)) + 1);
+
+    /// Create an instance.
+    #[allow(clippy::assertions_on_constants)]
+    const fn _new(for_precompute: bool) -> Self {
+        assert!(bsp::memory::mmu::KernelGranule::SIZE == Granule64KiB::SIZE);
+
+        // Can't have a zero-sized address space.
+        assert!(NUM_TABLES > 0);
+
+        Self {
+            lvl3: [[PageDescriptor::new_zeroed(); 8192]; NUM_TABLES],
+            lvl2: [TableDescriptor::new_zeroed(); NUM_TABLES],
+            initialized: for_precompute,
+        }
+    }
+
+    pub const fn new_for_precompute() -> Self {
+        Self::_new(true)
+    }
+
+    #[cfg(test)]
+    pub fn new_for_runtime() -> Self {
+        Self::_new(false)
+    }
+
+    /// Helper to calculate the lvl2 and lvl3 indices from an address.
+    #[inline(always)]
+    fn lvl2_lvl3_index_from_page_addr(
+        &self,
+        virt_page_addr: PageAddress<Virtual>,
+    ) -> Result<(usize, usize), &'static str> {
+        let mut addr = virt_page_addr.into_inner();
+
+        if START_FROM_TOP {
+            addr = addr - Self::START_FROM_TOP_OFFSET;
+        }
+
+        let lvl2_index = addr.as_usize() >> Granule512MiB::SHIFT;
+        let lvl3_index = (addr.as_usize() & Granule512MiB::MASK) >> Granule64KiB::SHIFT;
+
+        if lvl2_index > (NUM_TABLES - 1) {
+            return Err("Virtual page is out of bounds of translation table");
+        }
+
+        Ok((lvl2_index, lvl3_index))
+    }
+
+    /// Returns the PageDescriptor corresponding to the supplied page address.
+    #[inline(always)]
+    fn page_descriptor_from_page_addr(
+        &self,
+        virt_page_addr: PageAddress<Virtual>,
+    ) -> Result<&PageDescriptor, &'static str> {
+        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page_addr(virt_page_addr)?;
+        let desc = &self.lvl3[lvl2_index][lvl3_index];
+
+        Ok(desc)
+    }
+
+    /// Sets the PageDescriptor corresponding to the supplied page address.
+    ///
+    /// Doesn't allow overriding an already valid page.
+    #[inline(always)]
+    fn set_page_descriptor_from_page_addr(
+        &mut self,
+        virt_page_addr: PageAddress<Virtual>,
+        new_desc: &PageDescriptor,
+    ) -> Result<(), &'static str> {
+        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page_addr(virt_page_addr)?;
+        let desc = &mut self.lvl3[lvl2_index][lvl3_index];
+
+        if desc.is_valid() {
+            return Err("Virtual page is already mapped");
+        }
+
+        *desc = *new_desc;
+        Ok(())
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+
+impl<const NUM_TABLES: usize, const START_FROM_TOP: bool>
+    memory::mmu::translation_table::interface::TranslationTable
+    for FixedSizeTranslationTable<NUM_TABLES, START_FROM_TOP>
+{
+    fn init(&mut self) -> Result<(), &'static str> {
+        if self.initialized {
+            return Ok(());
+        }
+
+        // Populate the l2 entries.
+        for (lvl2_nr, lvl2_entry) in self.lvl2.iter_mut().enumerate() {
+            let virt_table_addr = self.lvl3[lvl2_nr].virt_start_addr();
+            let phys_table_addr = memory::mmu::try_kernel_virt_addr_to_phys_addr(virt_table_addr)?;
+
+            let new_desc = TableDescriptor::from_next_lvl_table_addr(phys_table_addr);
+            *lvl2_entry = new_desc;
+        }
+
+        self.initialized = true;
+
+        Ok(())
+    }
+
+    unsafe fn map_at(
+        &mut self,
+        virt_region: &MemoryRegion<Virtual>,
+        phys_region: &MemoryRegion<Physical>,
+        attr: &AttributeFields,
+    ) -> Result<(), &'static str> {
+        assert!(self.initialized, "Translation tables not initialized");
+
+        if virt_region.size() != phys_region.size() {
+            return Err("Tried to map memory regions with unequal sizes");
+        }
+
+        if phys_region.end_exclusive_page_addr() > bsp::memory::phys_addr_space_end_exclusive_addr()
+        {
+            return Err("Tried to map outside of physical address space");
+        }
+
+        let iter = phys_region.into_iter().zip(virt_region.into_iter());
+        for (phys_page_addr, virt_page_addr) in iter {
+            let new_desc = PageDescriptor::from_output_page_addr(phys_page_addr, attr);
+            let virt_page = virt_page_addr;
+
+            self.set_page_descriptor_from_page_addr(virt_page, &new_desc)?;
+        }
+
+        Ok(())
+    }
+
+    fn try_virt_page_addr_to_phys_page_addr(
+        &self,
+        virt_page_addr: PageAddress<Virtual>,
+    ) -> Result<PageAddress<Physical>, &'static str> {
+        let page_desc = self.page_descriptor_from_page_addr(virt_page_addr)?;
+
+        if !page_desc.is_valid() {
+            return Err("Page marked invalid");
+        }
+
+        Ok(page_desc.output_page_addr())
+    }
+
+    fn try_page_attributes(
+        &self,
+        virt_page_addr: PageAddress<Virtual>,
+    ) -> Result<AttributeFields, &'static str> {
+        let page_desc = self.page_descriptor_from_page_addr(virt_page_addr)?;
+
+        if !page_desc.is_valid() {
+            return Err("Page marked invalid");
+        }
+
+        page_desc.try_attributes()
+    }
+
+    /// Try to translate a virtual address to a physical address.
+    ///
+    /// Will only succeed if there exists a valid mapping for the input address.
+    fn try_virt_addr_to_phys_addr(
+        &self,
+        virt_addr: Address<Virtual>,
+    ) -> Result<Address<Physical>, &'static str> {
+        let virt_page = PageAddress::from(virt_addr.align_down_page());
+        let phys_page = self.try_virt_page_addr_to_phys_page_addr(virt_page)?;
+
+        Ok(phys_page.into_inner() + virt_addr.offset_into_page())
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+pub type MinSizeTranslationTable = FixedSizeTranslationTable<1, true>;
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// Check if the size of `struct TableDescriptor` is as expected.
+    #[kernel_test]
+    fn size_of_tabledescriptor_equals_64_bit() {
+        assert_eq!(
+            core::mem::size_of::<TableDescriptor>(),
+            core::mem::size_of::<u64>()
+        );
+    }
+
+    /// Check if the size of `struct PageDescriptor` is as expected.
+    #[kernel_test]
+    fn size_of_pagedescriptor_equals_64_bit() {
+        assert_eq!(
+            core::mem::size_of::<PageDescriptor>(),
+            core::mem::size_of::<u64>()
+        );
+    }
+}
diff --git a/18_backtrace/kernel/src/_arch/aarch64/time.rs b/18_backtrace/kernel/src/_arch/aarch64/time.rs
new file mode 100644
index 000000000..c814219ca
--- /dev/null
+++ b/18_backtrace/kernel/src/_arch/aarch64/time.rs
@@ -0,0 +1,121 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural timer primitives.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::time::arch_time
+
+use crate::{time, warn};
+use core::time::Duration;
+use cortex_a::{asm::barrier, registers::*};
+use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+const NS_PER_S: u64 = 1_000_000_000;
+
+/// ARMv8 Generic Timer.
+struct GenericTimer;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static TIME_MANAGER: GenericTimer = GenericTimer;
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl GenericTimer {
+    #[inline(always)]
+    fn read_cntpct(&self) -> u64 {
+        // Prevent that the counter is read ahead of time due to out-of-order execution.
+        unsafe { barrier::isb(barrier::SY) };
+        CNTPCT_EL0.get()
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the time manager.
+pub fn time_manager() -> &'static impl time::interface::TimeManager {
+    &TIME_MANAGER
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+
+impl time::interface::TimeManager for GenericTimer {
+    fn resolution(&self) -> Duration {
+        Duration::from_nanos(NS_PER_S / (CNTFRQ_EL0.get() as u64))
+    }
+
+    fn uptime(&self) -> Duration {
+        let current_count: u64 = self.read_cntpct() * NS_PER_S;
+        let frq: u64 = CNTFRQ_EL0.get() as u64;
+
+        Duration::from_nanos(current_count / frq)
+    }
+
+    fn spin_for(&self, duration: Duration) {
+        // Instantly return on zero.
+        if duration.as_nanos() == 0 {
+            return;
+        }
+
+        // Calculate the register compare value.
+        let frq = CNTFRQ_EL0.get();
+        let x = match frq.checked_mul(duration.as_nanos() as u64) {
+            #[allow(unused_imports)]
+            None => {
+                warn!("Spin duration too long, skipping");
+                return;
+            }
+            Some(val) => val,
+        };
+        let tval = x / NS_PER_S;
+
+        // Check if it is within supported bounds.
+        let warn: Option<&str> = if tval == 0 {
+            Some("smaller")
+        // The upper 32 bits of CNTP_TVAL_EL0 are reserved.
+        } else if tval > u32::max_value().into() {
+            Some("bigger")
+        } else {
+            None
+        };
+
+        #[allow(unused_imports)]
+        if let Some(w) = warn {
+            warn!(
+                "Spin duration {} than architecturally supported, skipping",
+                w
+            );
+            return;
+        }
+
+        // Set the compare value register.
+        CNTP_TVAL_EL0.set(tval);
+
+        // Kick off the counting.                       // Disable timer interrupt.
+        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::SET + CNTP_CTL_EL0::IMASK::SET);
+
+        // ISTATUS will be '1' when cval ticks have passed. Busy-check it.
+        while !CNTP_CTL_EL0.matches_all(CNTP_CTL_EL0::ISTATUS::SET) {}
+
+        // Disable counting again.
+        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::CLEAR);
+    }
+}
diff --git a/18_backtrace/kernel/src/backtrace.rs b/18_backtrace/kernel/src/backtrace.rs
new file mode 100644
index 000000000..7dba2e4aa
--- /dev/null
+++ b/18_backtrace/kernel/src/backtrace.rs
@@ -0,0 +1,112 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Backtracing support.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "_arch/aarch64/backtrace.rs"]
+mod arch_backtrace;
+
+use crate::{
+    memory::{Address, Virtual},
+    symbols,
+};
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+#[cfg(feature = "test_build")]
+pub use arch_backtrace::{corrupt_link, corrupt_previous_frame_addr};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// A backtrace item.
+#[allow(missing_docs)]
+pub enum BacktraceItem {
+    InvalidFramePointer(Address<Virtual>),
+    InvalidLink(Address<Virtual>),
+    Link(Address<Virtual>),
+}
+
+/// Pseudo-struct for printing a backtrace using its fmt::Display implementation.
+pub struct Backtrace;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl fmt::Display for Backtrace {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        writeln!(f, "Backtrace:")?;
+        writeln!(
+            f,
+            "      ----------------------------------------------------------------------------------------------"
+        )?;
+        writeln!(
+            f,
+            "          Address            Function containing address"
+        )?;
+        writeln!(
+            f,
+            "      ----------------------------------------------------------------------------------------------"
+        )?;
+
+        let mut fmt_res: fmt::Result = Ok(());
+        let trace_formatter =
+            |maybe_iter: Option<&mut dyn Iterator<Item = BacktraceItem>>| match maybe_iter {
+                None => fmt_res = writeln!(f, "ERROR! No valid stack frame found"),
+                Some(iter) => {
+                    for (i, backtrace_res) in iter.enumerate() {
+                        match backtrace_res {
+                            BacktraceItem::InvalidFramePointer(addr) => {
+                                fmt_res = writeln!(
+                                    f,
+                                    "      {:>2}. ERROR! \
+                                    Encountered invalid frame pointer ({}) during backtrace",
+                                    i + 1,
+                                    addr
+                                );
+                            }
+                            BacktraceItem::InvalidLink(addr) => {
+                                fmt_res = writeln!(
+                                    f,
+                                    "      {:>2}. ERROR! \
+                                    Link address ({}) is not contained in kernel .text section",
+                                    i + 1,
+                                    addr
+                                );
+                            }
+                            BacktraceItem::Link(addr) => {
+                                fmt_res = writeln!(
+                                    f,
+                                    "      {:>2}. {:016x} | {:<50}",
+                                    i + 1,
+                                    addr.as_usize(),
+                                    match symbols::lookup_symbol(addr) {
+                                        Some(sym) => sym.name(),
+                                        _ => "Symbol not found",
+                                    }
+                                )
+                            }
+                        };
+
+                        if fmt_res.is_err() {
+                            break;
+                        }
+                    }
+                }
+            };
+
+        arch_backtrace::backtrace(trace_formatter);
+        fmt_res?;
+
+        writeln!(
+            f,
+            "      ----------------------------------------------------------------------------------------------"
+        )
+    }
+}
diff --git a/18_backtrace/kernel/src/bsp.rs b/18_backtrace/kernel/src/bsp.rs
new file mode 100644
index 000000000..824787f65
--- /dev/null
+++ b/18_backtrace/kernel/src/bsp.rs
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Conditional reexporting of Board Support Packages.
+
+mod device_driver;
+
+#[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
+mod raspberrypi;
+
+#[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
+pub use raspberrypi::*;
diff --git a/18_backtrace/kernel/src/bsp/device_driver.rs b/18_backtrace/kernel/src/bsp/device_driver.rs
new file mode 100644
index 000000000..eafaf7754
--- /dev/null
+++ b/18_backtrace/kernel/src/bsp/device_driver.rs
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Device driver.
+
+#[cfg(feature = "bsp_rpi4")]
+mod arm;
+#[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
+mod bcm;
+mod common;
+
+#[cfg(feature = "bsp_rpi4")]
+pub use arm::*;
+#[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
+pub use bcm::*;
diff --git a/18_backtrace/kernel/src/bsp/device_driver/arm.rs b/18_backtrace/kernel/src/bsp/device_driver/arm.rs
new file mode 100644
index 000000000..e83e24c92
--- /dev/null
+++ b/18_backtrace/kernel/src/bsp/device_driver/arm.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! ARM driver top level.
+
+pub mod gicv2;
+
+pub use gicv2::*;
diff --git a/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2.rs b/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2.rs
new file mode 100644
index 000000000..4c68a6929
--- /dev/null
+++ b/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2.rs
@@ -0,0 +1,246 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! GICv2 Driver - ARM Generic Interrupt Controller v2.
+//!
+//! The following is a collection of excerpts with useful information from
+//!   - `Programmer's Guide for ARMv8-A`
+//!   - `ARM Generic Interrupt Controller Architecture Specification`
+//!
+//! # Programmer's Guide - 10.6.1 Configuration
+//!
+//! The GIC is accessed as a memory-mapped peripheral.
+//!
+//! All cores can access the common Distributor, but the CPU interface is banked, that is, each core
+//! uses the same address to access its own private CPU interface.
+//!
+//! It is not possible for a core to access the CPU interface of another core.
+//!
+//! # Architecture Specification - 10.6.2 Initialization
+//!
+//! Both the Distributor and the CPU interfaces are disabled at reset. The GIC must be initialized
+//! after reset before it can deliver interrupts to the core.
+//!
+//! In the Distributor, software must configure the priority, target, security and enable individual
+//! interrupts. The Distributor must subsequently be enabled through its control register
+//! (GICD_CTLR). For each CPU interface, software must program the priority mask and preemption
+//! settings.
+//!
+//! Each CPU interface block itself must be enabled through its control register (GICD_CTLR). This
+//! prepares the GIC to deliver interrupts to the core.
+//!
+//! Before interrupts are expected in the core, software prepares the core to take interrupts by
+//! setting a valid interrupt vector in the vector table, and clearing interrupt mask bits in
+//! PSTATE, and setting the routing controls.
+//!
+//! The entire interrupt mechanism in the system can be disabled by disabling the Distributor.
+//! Interrupt delivery to an individual core can be disabled by disabling its CPU interface.
+//! Individual interrupts can also be disabled (or enabled) in the distributor.
+//!
+//! For an interrupt to reach the core, the individual interrupt, Distributor and CPU interface must
+//! all be enabled. The interrupt also needs to be of sufficient priority, that is, higher than the
+//! core's priority mask.
+//!
+//! # Architecture Specification - 1.4.2 Interrupt types
+//!
+//! - Peripheral interrupt
+//!     - Private Peripheral Interrupt (PPI)
+//!         - This is a peripheral interrupt that is specific to a single processor.
+//!     - Shared Peripheral Interrupt (SPI)
+//!         - This is a peripheral interrupt that the Distributor can route to any of a specified
+//!           combination of processors.
+//!
+//! - Software-generated interrupt (SGI)
+//!     - This is an interrupt generated by software writing to a GICD_SGIR register in the GIC. The
+//!       system uses SGIs for interprocessor communication.
+//!     - An SGI has edge-triggered properties. The software triggering of the interrupt is
+//!       equivalent to the edge transition of the interrupt request signal.
+//!     - When an SGI occurs in a multiprocessor implementation, the CPUID field in the Interrupt
+//!       Acknowledge Register, GICC_IAR, or the Aliased Interrupt Acknowledge Register, GICC_AIAR,
+//!       identifies the processor that requested the interrupt.
+//!
+//! # Architecture Specification - 2.2.1 Interrupt IDs
+//!
+//! Interrupts from sources are identified using ID numbers. Each CPU interface can see up to 1020
+//! interrupts. The banking of SPIs and PPIs increases the total number of interrupts supported by
+//! the Distributor.
+//!
+//! The GIC assigns interrupt ID numbers ID0-ID1019 as follows:
+//!   - Interrupt numbers 32..1019 are used for SPIs.
+//!   - Interrupt numbers 0..31 are used for interrupts that are private to a CPU interface. These
+//!     interrupts are banked in the Distributor.
+//!       - A banked interrupt is one where the Distributor can have multiple interrupts with the
+//!         same ID. A banked interrupt is identified uniquely by its ID number and its associated
+//!         CPU interface number. Of the banked interrupt IDs:
+//!           - 00..15 SGIs
+//!           - 16..31 PPIs
+
+mod gicc;
+mod gicd;
+
+use crate::{bsp, cpu, driver, exception, memory, synchronization, synchronization::InitStateLock};
+use core::sync::atomic::{AtomicBool, Ordering};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; GICv2::NUM_IRQS];
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Used for the associated type of trait [`exception::asynchronous::interface::IRQManager`].
+pub type IRQNumber = exception::asynchronous::IRQNumber<{ GICv2::MAX_IRQ_NUMBER }>;
+
+/// Representation of the GIC.
+pub struct GICv2 {
+    gicd_mmio_descriptor: memory::mmu::MMIODescriptor,
+    gicc_mmio_descriptor: memory::mmu::MMIODescriptor,
+
+    /// The Distributor.
+    gicd: gicd::GICD,
+
+    /// The CPU Interface.
+    gicc: gicc::GICC,
+
+    /// Have the MMIO regions been remapped yet?
+    is_mmio_remapped: AtomicBool,
+
+    /// Stores registered IRQ handlers. Writable only during kernel init. RO afterwards.
+    handler_table: InitStateLock<HandlerTable>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl GICv2 {
+    const MAX_IRQ_NUMBER: usize = 300; // Normally 1019, but keep it lower to save some space.
+    const NUM_IRQS: usize = Self::MAX_IRQ_NUMBER + 1;
+
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide correct MMIO descriptors.
+    pub const unsafe fn new(
+        gicd_mmio_descriptor: memory::mmu::MMIODescriptor,
+        gicc_mmio_descriptor: memory::mmu::MMIODescriptor,
+    ) -> Self {
+        Self {
+            gicd_mmio_descriptor,
+            gicc_mmio_descriptor,
+            gicd: gicd::GICD::new(gicd_mmio_descriptor.start_addr().as_usize()),
+            gicc: gicc::GICC::new(gicc_mmio_descriptor.start_addr().as_usize()),
+            is_mmio_remapped: AtomicBool::new(false),
+            handler_table: InitStateLock::new([None; Self::NUM_IRQS]),
+        }
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use synchronization::interface::ReadWriteEx;
+
+impl driver::interface::DeviceDriver for GICv2 {
+    fn compatible(&self) -> &'static str {
+        "GICv2 (ARM Generic Interrupt Controller v2)"
+    }
+
+    unsafe fn init(&self) -> Result<(), &'static str> {
+        let remapped = self.is_mmio_remapped.load(Ordering::Relaxed);
+        if !remapped {
+            // GICD
+            let mut virt_addr = memory::mmu::kernel_map_mmio("GICD", &self.gicd_mmio_descriptor)?;
+            self.gicd.set_mmio(virt_addr.as_usize());
+
+            // GICC
+            virt_addr = memory::mmu::kernel_map_mmio("GICC", &self.gicc_mmio_descriptor)?;
+            self.gicc.set_mmio(virt_addr.as_usize());
+
+            // Conclude remapping.
+            self.is_mmio_remapped.store(true, Ordering::Relaxed);
+        }
+
+        if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
+            self.gicd.boot_core_init();
+        }
+
+        self.gicc.priority_accept_all();
+        self.gicc.enable();
+
+        Ok(())
+    }
+}
+
+impl exception::asynchronous::interface::IRQManager for GICv2 {
+    type IRQNumberType = IRQNumber;
+
+    fn register_handler(
+        &self,
+        irq_number: Self::IRQNumberType,
+        descriptor: exception::asynchronous::IRQDescriptor,
+    ) -> Result<(), &'static str> {
+        self.handler_table.write(|table| {
+            let irq_number = irq_number.get();
+
+            if table[irq_number].is_some() {
+                return Err("IRQ handler already registered");
+            }
+
+            table[irq_number] = Some(descriptor);
+
+            Ok(())
+        })
+    }
+
+    fn enable(&self, irq_number: Self::IRQNumberType) {
+        self.gicd.enable(irq_number);
+    }
+
+    fn handle_pending_irqs<'irq_context>(
+        &'irq_context self,
+        ic: &exception::asynchronous::IRQContext<'irq_context>,
+    ) {
+        // Extract the highest priority pending IRQ number from the Interrupt Acknowledge Register
+        // (IAR).
+        let irq_number = self.gicc.pending_irq_number(ic);
+
+        // Guard against spurious interrupts.
+        if irq_number > GICv2::MAX_IRQ_NUMBER {
+            return;
+        }
+
+        // Call the IRQ handler. Panic if there is none.
+        self.handler_table.read(|table| {
+            match table[irq_number] {
+                None => panic!("No handler registered for IRQ {}", irq_number),
+                Some(descriptor) => {
+                    // Call the IRQ handler. Panics on failure.
+                    descriptor.handler.handle().expect("Error handling IRQ");
+                }
+            }
+        });
+
+        // Signal completion of handling.
+        self.gicc.mark_comleted(irq_number as u32, ic);
+    }
+
+    fn print_handler(&self) {
+        use crate::info;
+
+        info!("      Peripheral handler:");
+
+        self.handler_table.read(|table| {
+            for (i, opt) in table.iter().skip(32).enumerate() {
+                if let Some(handler) = opt {
+                    info!("            {: >3}. {}", i + 32, handler.name);
+                }
+            }
+        });
+    }
+}
diff --git a/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs b/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
new file mode 100644
index 000000000..1a151d246
--- /dev/null
+++ b/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
@@ -0,0 +1,156 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! GICC Driver - GIC CPU interface.
+
+use crate::{
+    bsp::device_driver::common::MMIODerefWrapper, exception, synchronization::InitStateLock,
+};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields, register_structs,
+    registers::ReadWrite,
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+register_bitfields! {
+    u32,
+
+    /// CPU Interface Control Register
+    CTLR [
+        Enable OFFSET(0) NUMBITS(1) []
+    ],
+
+    /// Interrupt Priority Mask Register
+    PMR [
+        Priority OFFSET(0) NUMBITS(8) []
+    ],
+
+    /// Interrupt Acknowledge Register
+    IAR [
+        InterruptID OFFSET(0) NUMBITS(10) []
+    ],
+
+    /// End of Interrupt Register
+    EOIR [
+        EOIINTID OFFSET(0) NUMBITS(10) []
+    ]
+}
+
+register_structs! {
+    #[allow(non_snake_case)]
+    pub RegisterBlock {
+        (0x000 => CTLR: ReadWrite<u32, CTLR::Register>),
+        (0x004 => PMR: ReadWrite<u32, PMR::Register>),
+        (0x008 => _reserved1),
+        (0x00C => IAR: ReadWrite<u32, IAR::Register>),
+        (0x010 => EOIR: ReadWrite<u32, EOIR::Register>),
+        (0x014  => @END),
+    }
+}
+
+/// Abstraction for the associated MMIO registers.
+type Registers = MMIODerefWrapper<RegisterBlock>;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Representation of the GIC CPU interface.
+pub struct GICC {
+    registers: InitStateLock<Registers>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+use crate::synchronization::interface::ReadWriteEx;
+
+impl GICC {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+        Self {
+            registers: InitStateLock::new(Registers::new(mmio_start_addr)),
+        }
+    }
+
+    pub unsafe fn set_mmio(&self, new_mmio_start_addr: usize) {
+        self.registers
+            .write(|regs| *regs = Registers::new(new_mmio_start_addr));
+    }
+
+    /// Accept interrupts of any priority.
+    ///
+    /// Quoting the GICv2 Architecture Specification:
+    ///
+    ///   "Writing 255 to the GICC_PMR always sets it to the largest supported priority field
+    ///    value."
+    ///
+    /// # Safety
+    ///
+    /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
+    ///   of `&mut self`.
+    pub fn priority_accept_all(&self) {
+        self.registers.read(|regs| {
+            regs.PMR.write(PMR::Priority.val(255)); // Comment in arch spec.
+        });
+    }
+
+    /// Enable the interface - start accepting IRQs.
+    ///
+    /// # Safety
+    ///
+    /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
+    ///   of `&mut self`.
+    pub fn enable(&self) {
+        self.registers.read(|regs| {
+            regs.CTLR.write(CTLR::Enable::SET);
+        });
+    }
+
+    /// Extract the number of the highest-priority pending IRQ.
+    ///
+    /// Can only be called from IRQ context, which is ensured by taking an `IRQContext` token.
+    ///
+    /// # Safety
+    ///
+    /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
+    ///   of `&mut self`.
+    #[allow(clippy::trivially_copy_pass_by_ref)]
+    pub fn pending_irq_number<'irq_context>(
+        &self,
+        _ic: &exception::asynchronous::IRQContext<'irq_context>,
+    ) -> usize {
+        self.registers
+            .read(|regs| regs.IAR.read(IAR::InterruptID) as usize)
+    }
+
+    /// Complete handling of the currently active IRQ.
+    ///
+    /// Can only be called from IRQ context, which is ensured by taking an `IRQContext` token.
+    ///
+    /// To be called after `pending_irq_number()`.
+    ///
+    /// # Safety
+    ///
+    /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
+    ///   of `&mut self`.
+    #[allow(clippy::trivially_copy_pass_by_ref)]
+    pub fn mark_comleted<'irq_context>(
+        &self,
+        irq_number: u32,
+        _ic: &exception::asynchronous::IRQContext<'irq_context>,
+    ) {
+        self.registers.read(|regs| {
+            regs.EOIR.write(EOIR::EOIINTID.val(irq_number));
+        });
+    }
+}
diff --git a/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs b/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
new file mode 100644
index 000000000..60bbc4689
--- /dev/null
+++ b/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -0,0 +1,209 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! GICD Driver - GIC Distributor.
+//!
+//! # Glossary
+//!   - SPI - Shared Peripheral Interrupt.
+
+use crate::{
+    bsp::device_driver::common::MMIODerefWrapper,
+    state, synchronization,
+    synchronization::{IRQSafeNullLock, InitStateLock},
+};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields, register_structs,
+    registers::{ReadOnly, ReadWrite},
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+register_bitfields! {
+    u32,
+
+    /// Distributor Control Register
+    CTLR [
+        Enable OFFSET(0) NUMBITS(1) []
+    ],
+
+    /// Interrupt Controller Type Register
+    TYPER [
+        ITLinesNumber OFFSET(0)  NUMBITS(5) []
+    ],
+
+    /// Interrupt Processor Targets Registers
+    ITARGETSR [
+        Offset3 OFFSET(24) NUMBITS(8) [],
+        Offset2 OFFSET(16) NUMBITS(8) [],
+        Offset1 OFFSET(8)  NUMBITS(8) [],
+        Offset0 OFFSET(0)  NUMBITS(8) []
+    ]
+}
+
+register_structs! {
+    #[allow(non_snake_case)]
+    SharedRegisterBlock {
+        (0x000 => CTLR: ReadWrite<u32, CTLR::Register>),
+        (0x004 => TYPER: ReadOnly<u32, TYPER::Register>),
+        (0x008 => _reserved1),
+        (0x104 => ISENABLER: [ReadWrite<u32>; 31]),
+        (0x108 => _reserved2),
+        (0x820 => ITARGETSR: [ReadWrite<u32, ITARGETSR::Register>; 248]),
+        (0x824 => @END),
+    }
+}
+
+register_structs! {
+    #[allow(non_snake_case)]
+    BankedRegisterBlock {
+        (0x000 => _reserved1),
+        (0x100 => ISENABLER: ReadWrite<u32>),
+        (0x104 => _reserved2),
+        (0x800 => ITARGETSR: [ReadOnly<u32, ITARGETSR::Register>; 8]),
+        (0x804 => @END),
+    }
+}
+
+/// Abstraction for the non-banked parts of the associated MMIO registers.
+type SharedRegisters = MMIODerefWrapper<SharedRegisterBlock>;
+
+/// Abstraction for the banked parts of the associated MMIO registers.
+type BankedRegisters = MMIODerefWrapper<BankedRegisterBlock>;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Representation of the GIC Distributor.
+pub struct GICD {
+    /// Access to shared registers is guarded with a lock.
+    shared_registers: IRQSafeNullLock<SharedRegisters>,
+
+    /// Access to banked registers is unguarded.
+    banked_registers: InitStateLock<BankedRegisters>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl SharedRegisters {
+    /// Return the number of IRQs that this HW implements.
+    #[inline(always)]
+    fn num_irqs(&mut self) -> usize {
+        // Query number of implemented IRQs.
+        //
+        // Refer to GICv2 Architecture Specification, Section 4.3.2.
+        ((self.TYPER.read(TYPER::ITLinesNumber) as usize) + 1) * 32
+    }
+
+    /// Return a slice of the implemented ITARGETSR.
+    #[inline(always)]
+    fn implemented_itargets_slice(&mut self) -> &[ReadWrite<u32, ITARGETSR::Register>] {
+        assert!(self.num_irqs() >= 36);
+
+        // Calculate the max index of the shared ITARGETSR array.
+        //
+        // The first 32 IRQs are private, so not included in `shared_registers`. Each ITARGETS
+        // register has four entries, so shift right by two. Subtract one because we start
+        // counting at zero.
+        let spi_itargetsr_max_index = ((self.num_irqs() - 32) >> 2) - 1;
+
+        // Rust automatically inserts slice range sanity check, i.e. max >= min.
+        &self.ITARGETSR[0..spi_itargetsr_max_index]
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+use crate::synchronization::interface::ReadWriteEx;
+use synchronization::interface::Mutex;
+
+impl GICD {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+        Self {
+            shared_registers: IRQSafeNullLock::new(SharedRegisters::new(mmio_start_addr)),
+            banked_registers: InitStateLock::new(BankedRegisters::new(mmio_start_addr)),
+        }
+    }
+
+    pub unsafe fn set_mmio(&self, new_mmio_start_addr: usize) {
+        self.shared_registers
+            .lock(|regs| *regs = SharedRegisters::new(new_mmio_start_addr));
+        self.banked_registers
+            .write(|regs| *regs = BankedRegisters::new(new_mmio_start_addr));
+    }
+
+    /// Use a banked ITARGETSR to retrieve the executing core's GIC target mask.
+    ///
+    /// Quoting the GICv2 Architecture Specification:
+    ///
+    ///   "GICD_ITARGETSR0 to GICD_ITARGETSR7 are read-only, and each field returns a value that
+    ///    corresponds only to the processor reading the register."
+    fn local_gic_target_mask(&self) -> u32 {
+        self.banked_registers
+            .read(|regs| regs.ITARGETSR[0].read(ITARGETSR::Offset0))
+    }
+
+    /// Route all SPIs to the boot core and enable the distributor.
+    pub fn boot_core_init(&self) {
+        assert!(
+            state::state_manager().is_init(),
+            "Only allowed during kernel init phase"
+        );
+
+        // Target all SPIs to the boot core only.
+        let mask = self.local_gic_target_mask();
+
+        self.shared_registers.lock(|regs| {
+            for i in regs.implemented_itargets_slice().iter() {
+                i.write(
+                    ITARGETSR::Offset3.val(mask)
+                        + ITARGETSR::Offset2.val(mask)
+                        + ITARGETSR::Offset1.val(mask)
+                        + ITARGETSR::Offset0.val(mask),
+                );
+            }
+
+            regs.CTLR.write(CTLR::Enable::SET);
+        });
+    }
+
+    /// Enable an interrupt.
+    pub fn enable(&self, irq_num: super::IRQNumber) {
+        let irq_num = irq_num.get();
+
+        // Each bit in the u32 enable register corresponds to one IRQ number. Shift right by 5
+        // (division by 32) and arrive at the index for the respective ISENABLER[i].
+        let enable_reg_index = irq_num >> 5;
+        let enable_bit: u32 = 1u32 << (irq_num % 32);
+
+        // Check if we are handling a private or shared IRQ.
+        match irq_num {
+            // Private.
+            0..=31 => self.banked_registers.read(|regs| {
+                let enable_reg = &regs.ISENABLER;
+                enable_reg.set(enable_reg.get() | enable_bit);
+            }),
+            // Shared.
+            _ => {
+                let enable_reg_index_shared = enable_reg_index - 1;
+
+                self.shared_registers.lock(|regs| {
+                    let enable_reg = &regs.ISENABLER[enable_reg_index_shared];
+                    enable_reg.set(enable_reg.get() | enable_bit);
+                });
+            }
+        }
+    }
+}
diff --git a/18_backtrace/kernel/src/bsp/device_driver/bcm.rs b/18_backtrace/kernel/src/bsp/device_driver/bcm.rs
new file mode 100644
index 000000000..5a7cc23be
--- /dev/null
+++ b/18_backtrace/kernel/src/bsp/device_driver/bcm.rs
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! BCM driver top level.
+
+mod bcm2xxx_gpio;
+#[cfg(feature = "bsp_rpi3")]
+mod bcm2xxx_interrupt_controller;
+mod bcm2xxx_pl011_uart;
+
+pub use bcm2xxx_gpio::*;
+#[cfg(feature = "bsp_rpi3")]
+pub use bcm2xxx_interrupt_controller::*;
+pub use bcm2xxx_pl011_uart::*;
diff --git a/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
new file mode 100644
index 000000000..eea07b755
--- /dev/null
+++ b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -0,0 +1,259 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! GPIO Driver.
+
+use crate::{
+    bsp::device_driver::common::MMIODerefWrapper, driver, memory, synchronization,
+    synchronization::IRQSafeNullLock,
+};
+use core::sync::atomic::{AtomicUsize, Ordering};
+use tock_registers::{
+    interfaces::{ReadWriteable, Writeable},
+    register_bitfields, register_structs,
+    registers::ReadWrite,
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+// GPIO registers.
+//
+// Descriptions taken from
+// - https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
+// - https://datasheets.raspberrypi.org/bcm2711/bcm2711-peripherals.pdf
+register_bitfields! {
+    u32,
+
+    /// GPIO Function Select 1
+    GPFSEL1 [
+        /// Pin 15
+        FSEL15 OFFSET(15) NUMBITS(3) [
+            Input = 0b000,
+            Output = 0b001,
+            AltFunc0 = 0b100  // PL011 UART RX
+
+        ],
+
+        /// Pin 14
+        FSEL14 OFFSET(12) NUMBITS(3) [
+            Input = 0b000,
+            Output = 0b001,
+            AltFunc0 = 0b100  // PL011 UART TX
+        ]
+    ],
+
+    /// GPIO Pull-up/down Register
+    ///
+    /// BCM2837 only.
+    GPPUD [
+        /// Controls the actuation of the internal pull-up/down control line to ALL the GPIO pins.
+        PUD OFFSET(0) NUMBITS(2) [
+            Off = 0b00,
+            PullDown = 0b01,
+            PullUp = 0b10
+        ]
+    ],
+
+    /// GPIO Pull-up/down Clock Register 0
+    ///
+    /// BCM2837 only.
+    GPPUDCLK0 [
+        /// Pin 15
+        PUDCLK15 OFFSET(15) NUMBITS(1) [
+            NoEffect = 0,
+            AssertClock = 1
+        ],
+
+        /// Pin 14
+        PUDCLK14 OFFSET(14) NUMBITS(1) [
+            NoEffect = 0,
+            AssertClock = 1
+        ]
+    ],
+
+    /// GPIO Pull-up / Pull-down Register 0
+    ///
+    /// BCM2711 only.
+    GPIO_PUP_PDN_CNTRL_REG0 [
+        /// Pin 15
+        GPIO_PUP_PDN_CNTRL15 OFFSET(30) NUMBITS(2) [
+            NoResistor = 0b00,
+            PullUp = 0b01
+        ],
+
+        /// Pin 14
+        GPIO_PUP_PDN_CNTRL14 OFFSET(28) NUMBITS(2) [
+            NoResistor = 0b00,
+            PullUp = 0b01
+        ]
+    ]
+}
+
+register_structs! {
+    #[allow(non_snake_case)]
+    RegisterBlock {
+        (0x00 => _reserved1),
+        (0x04 => GPFSEL1: ReadWrite<u32, GPFSEL1::Register>),
+        (0x08 => _reserved2),
+        (0x94 => GPPUD: ReadWrite<u32, GPPUD::Register>),
+        (0x98 => GPPUDCLK0: ReadWrite<u32, GPPUDCLK0::Register>),
+        (0x9C => _reserved3),
+        (0xE4 => GPIO_PUP_PDN_CNTRL_REG0: ReadWrite<u32, GPIO_PUP_PDN_CNTRL_REG0::Register>),
+        (0xE8 => @END),
+    }
+}
+
+/// Abstraction for the associated MMIO registers.
+type Registers = MMIODerefWrapper<RegisterBlock>;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct GPIOInner {
+    registers: Registers,
+}
+
+// Export the inner struct so that BSPs can use it for the panic handler.
+pub use GPIOInner as PanicGPIO;
+
+/// Representation of the GPIO HW.
+pub struct GPIO {
+    mmio_descriptor: memory::mmu::MMIODescriptor,
+    virt_mmio_start_addr: AtomicUsize,
+    inner: IRQSafeNullLock<GPIOInner>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl GPIOInner {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+        Self {
+            registers: Registers::new(mmio_start_addr),
+        }
+    }
+
+    /// Init code.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub unsafe fn init(&mut self, new_mmio_start_addr: Option<usize>) -> Result<(), &'static str> {
+        if let Some(addr) = new_mmio_start_addr {
+            self.registers = Registers::new(addr);
+        }
+
+        Ok(())
+    }
+
+    /// Disable pull-up/down on pins 14 and 15.
+    #[cfg(feature = "bsp_rpi3")]
+    fn disable_pud_14_15_bcm2837(&mut self) {
+        use crate::{time, time::interface::TimeManager};
+        use core::time::Duration;
+
+        // The Linux 2837 GPIO driver waits 1 µs between the steps.
+        const DELAY: Duration = Duration::from_micros(1);
+
+        self.registers.GPPUD.write(GPPUD::PUD::Off);
+        time::time_manager().spin_for(DELAY);
+
+        self.registers
+            .GPPUDCLK0
+            .write(GPPUDCLK0::PUDCLK15::AssertClock + GPPUDCLK0::PUDCLK14::AssertClock);
+        time::time_manager().spin_for(DELAY);
+
+        self.registers.GPPUD.write(GPPUD::PUD::Off);
+        self.registers.GPPUDCLK0.set(0);
+    }
+
+    /// Disable pull-up/down on pins 14 and 15.
+    #[cfg(feature = "bsp_rpi4")]
+    fn disable_pud_14_15_bcm2711(&mut self) {
+        self.registers.GPIO_PUP_PDN_CNTRL_REG0.write(
+            GPIO_PUP_PDN_CNTRL_REG0::GPIO_PUP_PDN_CNTRL15::PullUp
+                + GPIO_PUP_PDN_CNTRL_REG0::GPIO_PUP_PDN_CNTRL14::PullUp,
+        );
+    }
+
+    /// Map PL011 UART as standard output.
+    ///
+    /// TX to pin 14
+    /// RX to pin 15
+    pub fn map_pl011_uart(&mut self) {
+        // Select the UART on pins 14 and 15.
+        self.registers
+            .GPFSEL1
+            .modify(GPFSEL1::FSEL15::AltFunc0 + GPFSEL1::FSEL14::AltFunc0);
+
+        // Disable pull-up/down on pins 14 and 15.
+        #[cfg(feature = "bsp_rpi3")]
+        self.disable_pud_14_15_bcm2837();
+
+        #[cfg(feature = "bsp_rpi4")]
+        self.disable_pud_14_15_bcm2711();
+    }
+}
+
+impl GPIO {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide correct MMIO descriptors.
+    pub const unsafe fn new(mmio_descriptor: memory::mmu::MMIODescriptor) -> Self {
+        Self {
+            mmio_descriptor,
+            virt_mmio_start_addr: AtomicUsize::new(0),
+            inner: IRQSafeNullLock::new(GPIOInner::new(mmio_descriptor.start_addr().as_usize())),
+        }
+    }
+
+    /// Concurrency safe version of `GPIOInner.map_pl011_uart()`
+    pub fn map_pl011_uart(&self) {
+        self.inner.lock(|inner| inner.map_pl011_uart())
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use synchronization::interface::Mutex;
+
+impl driver::interface::DeviceDriver for GPIO {
+    fn compatible(&self) -> &'static str {
+        "BCM GPIO"
+    }
+
+    unsafe fn init(&self) -> Result<(), &'static str> {
+        let virt_addr = memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?;
+
+        self.inner
+            .lock(|inner| inner.init(Some(virt_addr.as_usize())))?;
+
+        self.virt_mmio_start_addr
+            .store(virt_addr.as_usize(), Ordering::Relaxed);
+
+        Ok(())
+    }
+
+    fn virt_mmio_start_addr(&self) -> Option<usize> {
+        let addr = self.virt_mmio_start_addr.load(Ordering::Relaxed);
+
+        if addr == 0 {
+            return None;
+        }
+
+        Some(addr)
+    }
+}
diff --git a/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
new file mode 100644
index 000000000..99961facb
--- /dev/null
+++ b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -0,0 +1,138 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Interrupt Controller Driver.
+
+mod peripheral_ic;
+
+use crate::{driver, exception, memory};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Wrapper struct for a bitmask indicating pending IRQ numbers.
+struct PendingIRQs {
+    bitmask: u64,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub type LocalIRQ =
+    exception::asynchronous::IRQNumber<{ InterruptController::MAX_LOCAL_IRQ_NUMBER }>;
+pub type PeripheralIRQ =
+    exception::asynchronous::IRQNumber<{ InterruptController::MAX_PERIPHERAL_IRQ_NUMBER }>;
+
+/// Used for the associated type of trait [`exception::asynchronous::interface::IRQManager`].
+#[derive(Copy, Clone)]
+pub enum IRQNumber {
+    Local(LocalIRQ),
+    Peripheral(PeripheralIRQ),
+}
+
+/// Representation of the Interrupt Controller.
+pub struct InterruptController {
+    periph: peripheral_ic::PeripheralIC,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl PendingIRQs {
+    pub fn new(bitmask: u64) -> Self {
+        Self { bitmask }
+    }
+}
+
+impl Iterator for PendingIRQs {
+    type Item = usize;
+
+    fn next(&mut self) -> Option<Self::Item> {
+        use core::intrinsics::cttz;
+
+        let next = cttz(self.bitmask);
+        if next == 64 {
+            return None;
+        }
+
+        self.bitmask &= !(1 << next);
+
+        Some(next as usize)
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl InterruptController {
+    const MAX_LOCAL_IRQ_NUMBER: usize = 11;
+    const MAX_PERIPHERAL_IRQ_NUMBER: usize = 63;
+    const NUM_PERIPHERAL_IRQS: usize = Self::MAX_PERIPHERAL_IRQ_NUMBER + 1;
+
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide correct MMIO descriptors.
+    pub const unsafe fn new(
+        _local_mmio_descriptor: memory::mmu::MMIODescriptor,
+        periph_mmio_descriptor: memory::mmu::MMIODescriptor,
+    ) -> Self {
+        Self {
+            periph: peripheral_ic::PeripheralIC::new(periph_mmio_descriptor),
+        }
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+
+impl driver::interface::DeviceDriver for InterruptController {
+    fn compatible(&self) -> &'static str {
+        "BCM Interrupt Controller"
+    }
+
+    unsafe fn init(&self) -> Result<(), &'static str> {
+        self.periph.init()
+    }
+}
+
+impl exception::asynchronous::interface::IRQManager for InterruptController {
+    type IRQNumberType = IRQNumber;
+
+    fn register_handler(
+        &self,
+        irq: Self::IRQNumberType,
+        descriptor: exception::asynchronous::IRQDescriptor,
+    ) -> Result<(), &'static str> {
+        match irq {
+            IRQNumber::Local(_) => unimplemented!("Local IRQ controller not implemented."),
+            IRQNumber::Peripheral(pirq) => self.periph.register_handler(pirq, descriptor),
+        }
+    }
+
+    fn enable(&self, irq: Self::IRQNumberType) {
+        match irq {
+            IRQNumber::Local(_) => unimplemented!("Local IRQ controller not implemented."),
+            IRQNumber::Peripheral(pirq) => self.periph.enable(pirq),
+        }
+    }
+
+    fn handle_pending_irqs<'irq_context>(
+        &'irq_context self,
+        ic: &exception::asynchronous::IRQContext<'irq_context>,
+    ) {
+        // It can only be a peripheral IRQ pending because enable() does not support local IRQs yet.
+        self.periph.handle_pending_irqs(ic)
+    }
+
+    fn print_handler(&self) {
+        self.periph.print_handler();
+    }
+}
diff --git a/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
new file mode 100644
index 000000000..f09da862f
--- /dev/null
+++ b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -0,0 +1,192 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Peripheral Interrupt Controller Driver.
+
+use super::{InterruptController, PendingIRQs, PeripheralIRQ};
+use crate::{
+    bsp::device_driver::common::MMIODerefWrapper,
+    driver, exception, memory, synchronization,
+    synchronization::{IRQSafeNullLock, InitStateLock},
+};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_structs,
+    registers::{ReadOnly, WriteOnly},
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+register_structs! {
+    #[allow(non_snake_case)]
+    WORegisterBlock {
+        (0x00 => _reserved1),
+        (0x10 => ENABLE_1: WriteOnly<u32>),
+        (0x14 => ENABLE_2: WriteOnly<u32>),
+        (0x24 => @END),
+    }
+}
+
+register_structs! {
+    #[allow(non_snake_case)]
+    RORegisterBlock {
+        (0x00 => _reserved1),
+        (0x04 => PENDING_1: ReadOnly<u32>),
+        (0x08 => PENDING_2: ReadOnly<u32>),
+        (0x0c => @END),
+    }
+}
+
+/// Abstraction for the WriteOnly parts of the associated MMIO registers.
+type WriteOnlyRegisters = MMIODerefWrapper<WORegisterBlock>;
+
+/// Abstraction for the ReadOnly parts of the associated MMIO registers.
+type ReadOnlyRegisters = MMIODerefWrapper<RORegisterBlock>;
+
+type HandlerTable =
+    [Option<exception::asynchronous::IRQDescriptor>; InterruptController::NUM_PERIPHERAL_IRQS];
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Representation of the peripheral interrupt controller.
+pub struct PeripheralIC {
+    mmio_descriptor: memory::mmu::MMIODescriptor,
+
+    /// Access to write registers is guarded with a lock.
+    wo_registers: IRQSafeNullLock<WriteOnlyRegisters>,
+
+    /// Register read access is unguarded.
+    ro_registers: InitStateLock<ReadOnlyRegisters>,
+
+    /// Stores registered IRQ handlers. Writable only during kernel init. RO afterwards.
+    handler_table: InitStateLock<HandlerTable>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl PeripheralIC {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide correct MMIO descriptors.
+    pub const unsafe fn new(mmio_descriptor: memory::mmu::MMIODescriptor) -> Self {
+        let addr = mmio_descriptor.start_addr().as_usize();
+
+        Self {
+            mmio_descriptor,
+            wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(addr)),
+            ro_registers: InitStateLock::new(ReadOnlyRegisters::new(addr)),
+            handler_table: InitStateLock::new([None; InterruptController::NUM_PERIPHERAL_IRQS]),
+        }
+    }
+
+    /// Query the list of pending IRQs.
+    fn pending_irqs(&self) -> PendingIRQs {
+        self.ro_registers.read(|regs| {
+            let pending_mask: u64 =
+                (u64::from(regs.PENDING_2.get()) << 32) | u64::from(regs.PENDING_1.get());
+
+            PendingIRQs::new(pending_mask)
+        })
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use synchronization::interface::{Mutex, ReadWriteEx};
+
+impl driver::interface::DeviceDriver for PeripheralIC {
+    fn compatible(&self) -> &'static str {
+        "BCM Peripheral Interrupt Controller"
+    }
+
+    unsafe fn init(&self) -> Result<(), &'static str> {
+        let virt_addr =
+            memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?.as_usize();
+
+        self.wo_registers
+            .lock(|regs| *regs = WriteOnlyRegisters::new(virt_addr));
+        self.ro_registers
+            .write(|regs| *regs = ReadOnlyRegisters::new(virt_addr));
+
+        Ok(())
+    }
+}
+
+impl exception::asynchronous::interface::IRQManager for PeripheralIC {
+    type IRQNumberType = PeripheralIRQ;
+
+    fn register_handler(
+        &self,
+        irq: Self::IRQNumberType,
+        descriptor: exception::asynchronous::IRQDescriptor,
+    ) -> Result<(), &'static str> {
+        self.handler_table.write(|table| {
+            let irq_number = irq.get();
+
+            if table[irq_number].is_some() {
+                return Err("IRQ handler already registered");
+            }
+
+            table[irq_number] = Some(descriptor);
+
+            Ok(())
+        })
+    }
+
+    fn enable(&self, irq: Self::IRQNumberType) {
+        self.wo_registers.lock(|regs| {
+            let enable_reg = if irq.get() <= 31 {
+                &regs.ENABLE_1
+            } else {
+                &regs.ENABLE_2
+            };
+
+            let enable_bit: u32 = 1 << (irq.get() % 32);
+
+            // Writing a 1 to a bit will set the corresponding IRQ enable bit. All other IRQ enable
+            // bits are unaffected. So we don't need read and OR'ing here.
+            enable_reg.set(enable_bit);
+        });
+    }
+
+    fn handle_pending_irqs<'irq_context>(
+        &'irq_context self,
+        _ic: &exception::asynchronous::IRQContext<'irq_context>,
+    ) {
+        self.handler_table.read(|table| {
+            for irq_number in self.pending_irqs() {
+                match table[irq_number] {
+                    None => panic!("No handler registered for IRQ {}", irq_number),
+                    Some(descriptor) => {
+                        // Call the IRQ handler. Panics on failure.
+                        descriptor.handler.handle().expect("Error handling IRQ");
+                    }
+                }
+            }
+        })
+    }
+
+    fn print_handler(&self) {
+        use crate::info;
+
+        info!("      Peripheral handler:");
+
+        self.handler_table.read(|table| {
+            for (i, opt) in table.iter().enumerate() {
+                if let Some(handler) = opt {
+                    info!("            {: >3}. {}", i, handler.name);
+                }
+            }
+        });
+    }
+}
diff --git a/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
new file mode 100644
index 000000000..3133047b1
--- /dev/null
+++ b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -0,0 +1,536 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! PL011 UART driver.
+//!
+//! # Resources
+//!
+//! - <https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf>
+//! - <https://developer.arm.com/documentation/ddi0183/latest>
+
+use crate::{
+    bsp, bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, exception, memory,
+    synchronization, synchronization::IRQSafeNullLock,
+};
+use core::{
+    fmt,
+    sync::atomic::{AtomicUsize, Ordering},
+};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields, register_structs,
+    registers::{ReadOnly, ReadWrite, WriteOnly},
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+// PL011 UART registers.
+//
+// Descriptions taken from "PrimeCell UART (PL011) Technical Reference Manual" r1p5.
+register_bitfields! {
+    u32,
+
+    /// Flag Register.
+    FR [
+        /// Transmit FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
+        /// Line Control Register, LCR_H.
+        ///
+        /// - If the FIFO is disabled, this bit is set when the transmit holding register is empty.
+        /// - If the FIFO is enabled, the TXFE bit is set when the transmit FIFO is empty.
+        /// - This bit does not indicate if there is data in the transmit shift register.
+        TXFE OFFSET(7) NUMBITS(1) [],
+
+        /// Transmit FIFO full. The meaning of this bit depends on the state of the FEN bit in the
+        /// LCR_H Register.
+        ///
+        /// - If the FIFO is disabled, this bit is set when the transmit holding register is full.
+        /// - If the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
+        TXFF OFFSET(5) NUMBITS(1) [],
+
+        /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
+        /// LCR_H Register.
+        ///
+        /// - If the FIFO is disabled, this bit is set when the receive holding register is empty.
+        /// - If the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
+        RXFE OFFSET(4) NUMBITS(1) [],
+
+        /// UART busy. If this bit is set to 1, the UART is busy transmitting data. This bit remains
+        /// set until the complete byte, including all the stop bits, has been sent from the shift
+        /// register.
+        ///
+        /// This bit is set as soon as the transmit FIFO becomes non-empty, regardless of whether
+        /// the UART is enabled or not.
+        BUSY OFFSET(3) NUMBITS(1) []
+    ],
+
+    /// Integer Baud Rate Divisor.
+    IBRD [
+        /// The integer baud rate divisor.
+        BAUD_DIVINT OFFSET(0) NUMBITS(16) []
+    ],
+
+    /// Fractional Baud Rate Divisor.
+    FBRD [
+        ///  The fractional baud rate divisor.
+        BAUD_DIVFRAC OFFSET(0) NUMBITS(6) []
+    ],
+
+    /// Line Control Register.
+    LCR_H [
+        /// Word length. These bits indicate the number of data bits transmitted or received in a
+        /// frame.
+        #[allow(clippy::enum_variant_names)]
+        WLEN OFFSET(5) NUMBITS(2) [
+            FiveBit = 0b00,
+            SixBit = 0b01,
+            SevenBit = 0b10,
+            EightBit = 0b11
+        ],
+
+        /// Enable FIFOs:
+        ///
+        /// 0 = FIFOs are disabled (character mode) that is, the FIFOs become 1-byte-deep holding
+        /// registers.
+        ///
+        /// 1 = Transmit and receive FIFO buffers are enabled (FIFO mode).
+        FEN  OFFSET(4) NUMBITS(1) [
+            FifosDisabled = 0,
+            FifosEnabled = 1
+        ]
+    ],
+
+    /// Control Register.
+    CR [
+        /// Receive enable. If this bit is set to 1, the receive section of the UART is enabled.
+        /// Data reception occurs for either UART signals or SIR signals depending on the setting of
+        /// the SIREN bit. When the UART is disabled in the middle of reception, it completes the
+        /// current character before stopping.
+        RXE OFFSET(9) NUMBITS(1) [
+            Disabled = 0,
+            Enabled = 1
+        ],
+
+        /// Transmit enable. If this bit is set to 1, the transmit section of the UART is enabled.
+        /// Data transmission occurs for either UART signals, or SIR signals depending on the
+        /// setting of the SIREN bit. When the UART is disabled in the middle of transmission, it
+        /// completes the current character before stopping.
+        TXE OFFSET(8) NUMBITS(1) [
+            Disabled = 0,
+            Enabled = 1
+        ],
+
+        /// UART enable:
+        ///
+        /// 0 = UART is disabled. If the UART is disabled in the middle of transmission or
+        /// reception, it completes the current character before stopping.
+        ///
+        /// 1 = The UART is enabled. Data transmission and reception occurs for either UART signals
+        /// or SIR signals depending on the setting of the SIREN bit
+        UARTEN OFFSET(0) NUMBITS(1) [
+            /// If the UART is disabled in the middle of transmission or reception, it completes the
+            /// current character before stopping.
+            Disabled = 0,
+            Enabled = 1
+        ]
+    ],
+
+    /// Interrupt FIFO Level Select Register.
+    IFLS [
+        /// Receive interrupt FIFO level select. The trigger points for the receive interrupt are as
+        /// follows.
+        RXIFLSEL OFFSET(3) NUMBITS(5) [
+            OneEigth = 0b000,
+            OneQuarter = 0b001,
+            OneHalf = 0b010,
+            ThreeQuarters = 0b011,
+            SevenEights = 0b100
+        ]
+    ],
+
+    /// Interrupt Mask Set/Clear Register.
+    IMSC [
+        /// Receive timeout interrupt mask. A read returns the current mask for the UARTRTINTR
+        /// interrupt.
+        ///
+        /// - On a write of 1, the mask of the UARTRTINTR interrupt is set.
+        /// - A write of 0 clears the mask.
+        RTIM OFFSET(6) NUMBITS(1) [
+            Disabled = 0,
+            Enabled = 1
+        ],
+
+        /// Receive interrupt mask. A read returns the current mask for the UARTRXINTR interrupt.
+        ///
+        /// - On a write of 1, the mask of the UARTRXINTR interrupt is set.
+        /// - A write of 0 clears the mask.
+        RXIM OFFSET(4) NUMBITS(1) [
+            Disabled = 0,
+            Enabled = 1
+        ]
+    ],
+
+    /// Masked Interrupt Status Register.
+    MIS [
+        /// Receive timeout masked interrupt status. Returns the masked interrupt state of the
+        /// UARTRTINTR interrupt.
+        RTMIS OFFSET(6) NUMBITS(1) [],
+
+        /// Receive masked interrupt status. Returns the masked interrupt state of the UARTRXINTR
+        /// interrupt.
+        RXMIS OFFSET(4) NUMBITS(1) []
+    ],
+
+    /// Interrupt Clear Register.
+    ICR [
+        /// Meta field for all pending interrupts.
+        ALL OFFSET(0) NUMBITS(11) []
+    ]
+}
+
+register_structs! {
+    #[allow(non_snake_case)]
+    pub RegisterBlock {
+        (0x00 => DR: ReadWrite<u32>),
+        (0x04 => _reserved1),
+        (0x18 => FR: ReadOnly<u32, FR::Register>),
+        (0x1c => _reserved2),
+        (0x24 => IBRD: WriteOnly<u32, IBRD::Register>),
+        (0x28 => FBRD: WriteOnly<u32, FBRD::Register>),
+        (0x2c => LCR_H: WriteOnly<u32, LCR_H::Register>),
+        (0x30 => CR: WriteOnly<u32, CR::Register>),
+        (0x34 => IFLS: ReadWrite<u32, IFLS::Register>),
+        (0x38 => IMSC: ReadWrite<u32, IMSC::Register>),
+        (0x3C => _reserved3),
+        (0x40 => MIS: ReadOnly<u32, MIS::Register>),
+        (0x44 => ICR: WriteOnly<u32, ICR::Register>),
+        (0x48 => @END),
+    }
+}
+
+/// Abstraction for the associated MMIO registers.
+type Registers = MMIODerefWrapper<RegisterBlock>;
+
+#[derive(PartialEq)]
+enum BlockingMode {
+    Blocking,
+    NonBlocking,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct PL011UartInner {
+    registers: Registers,
+    chars_written: usize,
+    chars_read: usize,
+}
+
+// Export the inner struct so that BSPs can use it for the panic handler.
+pub use PL011UartInner as PanicUart;
+
+/// Representation of the UART.
+pub struct PL011Uart {
+    mmio_descriptor: memory::mmu::MMIODescriptor,
+    virt_mmio_start_addr: AtomicUsize,
+    inner: IRQSafeNullLock<PL011UartInner>,
+    irq_number: bsp::device_driver::IRQNumber,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl PL011UartInner {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+        Self {
+            registers: Registers::new(mmio_start_addr),
+            chars_written: 0,
+            chars_read: 0,
+        }
+    }
+
+    /// Set up baud rate and characteristics.
+    ///
+    /// This results in 8N1 and 921_600 baud.
+    ///
+    /// The calculation for the BRD is (we set the clock to 48 MHz in config.txt):
+    /// `(48_000_000 / 16) / 921_600 = 3.2552083`.
+    ///
+    /// This means the integer part is `3` and goes into the `IBRD`.
+    /// The fractional part is `0.2552083`.
+    ///
+    /// `FBRD` calculation according to the PL011 Technical Reference Manual:
+    /// `INTEGER((0.2552083 * 64) + 0.5) = 16`.
+    ///
+    /// Therefore, the generated baud rate divider is: `3 + 16/64 = 3.25`. Which results in a
+    /// genrated baud rate of `48_000_000 / (16 * 3.25) = 923_077`.
+    ///
+    /// Error = `((923_077 - 921_600) / 921_600) * 100 = 0.16%`.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub unsafe fn init(&mut self, new_mmio_start_addr: Option<usize>) -> Result<(), &'static str> {
+        if let Some(addr) = new_mmio_start_addr {
+            self.registers = Registers::new(addr);
+        }
+
+        // Execution can arrive here while there are still characters queued in the TX FIFO and
+        // actively being sent out by the UART hardware. If the UART is turned off in this case,
+        // those queued characters would be lost.
+        //
+        // For example, this can happen during runtime on a call to panic!(), because panic!()
+        // initializes its own UART instance and calls init().
+        //
+        // Hence, flush first to ensure all pending characters are transmitted.
+        self.flush();
+
+        // Turn the UART off temporarily.
+        self.registers.CR.set(0);
+
+        // Clear all pending interrupts.
+        self.registers.ICR.write(ICR::ALL::CLEAR);
+
+        // From the PL011 Technical Reference Manual:
+        //
+        // The LCR_H, IBRD, and FBRD registers form the single 30-bit wide LCR Register that is
+        // updated on a single write strobe generated by a LCR_H write. So, to internally update the
+        // contents of IBRD or FBRD, a LCR_H write must always be performed at the end.
+        //
+        // Set the baud rate, 8N1 and FIFO enabled.
+        self.registers.IBRD.write(IBRD::BAUD_DIVINT.val(3));
+        self.registers.FBRD.write(FBRD::BAUD_DIVFRAC.val(16));
+        self.registers
+            .LCR_H
+            .write(LCR_H::WLEN::EightBit + LCR_H::FEN::FifosEnabled);
+
+        // Set RX FIFO fill level at 1/8.
+        self.registers.IFLS.write(IFLS::RXIFLSEL::OneEigth);
+
+        // Enable RX IRQ + RX timeout IRQ.
+        self.registers
+            .IMSC
+            .write(IMSC::RXIM::Enabled + IMSC::RTIM::Enabled);
+
+        // Turn the UART on.
+        self.registers
+            .CR
+            .write(CR::UARTEN::Enabled + CR::TXE::Enabled + CR::RXE::Enabled);
+
+        Ok(())
+    }
+
+    /// Send a character.
+    fn write_char(&mut self, c: char) {
+        // Spin while TX FIFO full is set, waiting for an empty slot.
+        while self.registers.FR.matches_all(FR::TXFF::SET) {
+            cpu::nop();
+        }
+
+        // Write the character to the buffer.
+        self.registers.DR.set(c as u32);
+
+        self.chars_written += 1;
+    }
+
+    /// Block execution until the last buffered character has been physically put on the TX wire.
+    fn flush(&self) {
+        // Spin until the busy bit is cleared.
+        while self.registers.FR.matches_all(FR::BUSY::SET) {
+            cpu::nop();
+        }
+    }
+
+    /// Retrieve a character.
+    fn read_char_converting(&mut self, blocking_mode: BlockingMode) -> Option<char> {
+        // If RX FIFO is empty,
+        if self.registers.FR.matches_all(FR::RXFE::SET) {
+            // immediately return in non-blocking mode.
+            if blocking_mode == BlockingMode::NonBlocking {
+                return None;
+            }
+
+            // Otherwise, wait until a char was received.
+            while self.registers.FR.matches_all(FR::RXFE::SET) {
+                cpu::nop();
+            }
+        }
+
+        // Read one character.
+        let mut ret = self.registers.DR.get() as u8 as char;
+
+        // Convert carrige return to newline.
+        if ret == '\r' {
+            ret = '\n'
+        }
+
+        // Update statistics.
+        self.chars_read += 1;
+
+        Some(ret)
+    }
+}
+
+/// Implementing `core::fmt::Write` enables usage of the `format_args!` macros, which in turn are
+/// used to implement the `kernel`'s `print!` and `println!` macros. By implementing `write_str()`,
+/// we get `write_fmt()` automatically.
+///
+/// The function takes an `&mut self`, so it must be implemented for the inner struct.
+///
+/// See [`src/print.rs`].
+///
+/// [`src/print.rs`]: ../../print/index.html
+impl fmt::Write for PL011UartInner {
+    fn write_str(&mut self, s: &str) -> fmt::Result {
+        for c in s.chars() {
+            self.write_char(c);
+        }
+
+        Ok(())
+    }
+}
+
+impl PL011Uart {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide correct MMIO descriptors.
+    /// - The user must ensure to provide correct IRQ numbers.
+    pub const unsafe fn new(
+        mmio_descriptor: memory::mmu::MMIODescriptor,
+        irq_number: bsp::device_driver::IRQNumber,
+    ) -> Self {
+        Self {
+            mmio_descriptor,
+            virt_mmio_start_addr: AtomicUsize::new(0),
+            inner: IRQSafeNullLock::new(PL011UartInner::new(
+                mmio_descriptor.start_addr().as_usize(),
+            )),
+            irq_number,
+        }
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use synchronization::interface::Mutex;
+
+impl driver::interface::DeviceDriver for PL011Uart {
+    fn compatible(&self) -> &'static str {
+        "BCM PL011 UART"
+    }
+
+    unsafe fn init(&self) -> Result<(), &'static str> {
+        let virt_addr = memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?;
+
+        self.inner
+            .lock(|inner| inner.init(Some(virt_addr.as_usize())))?;
+
+        self.virt_mmio_start_addr
+            .store(virt_addr.as_usize(), Ordering::Relaxed);
+
+        Ok(())
+    }
+
+    fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
+        use bsp::exception::asynchronous::irq_manager;
+        use exception::asynchronous::{interface::IRQManager, IRQDescriptor};
+
+        let descriptor = IRQDescriptor {
+            name: "BCM PL011 UART",
+            handler: self,
+        };
+
+        irq_manager().register_handler(self.irq_number, descriptor)?;
+        irq_manager().enable(self.irq_number);
+
+        Ok(())
+    }
+
+    fn virt_mmio_start_addr(&self) -> Option<usize> {
+        let addr = self.virt_mmio_start_addr.load(Ordering::Relaxed);
+
+        if addr == 0 {
+            return None;
+        }
+
+        Some(addr)
+    }
+}
+
+impl console::interface::Write for PL011Uart {
+    /// Passthrough of `args` to the `core::fmt::Write` implementation, but guarded by a Mutex to
+    /// serialize access.
+    fn write_char(&self, c: char) {
+        self.inner.lock(|inner| inner.write_char(c));
+    }
+
+    fn write_fmt(&self, args: core::fmt::Arguments) -> fmt::Result {
+        // Fully qualified syntax for the call to `core::fmt::Write::write_fmt()` to increase
+        // readability.
+        self.inner.lock(|inner| fmt::Write::write_fmt(inner, args))
+    }
+
+    fn flush(&self) {
+        // Spin until TX FIFO empty is set.
+        self.inner.lock(|inner| inner.flush());
+    }
+}
+
+impl console::interface::Read for PL011Uart {
+    fn read_char(&self) -> char {
+        self.inner
+            .lock(|inner| inner.read_char_converting(BlockingMode::Blocking).unwrap())
+    }
+
+    fn clear_rx(&self) {
+        // Read from the RX FIFO until it is indicating empty.
+        while self
+            .inner
+            .lock(|inner| inner.read_char_converting(BlockingMode::NonBlocking))
+            .is_some()
+        {}
+    }
+}
+
+impl console::interface::Statistics for PL011Uart {
+    fn chars_written(&self) -> usize {
+        self.inner.lock(|inner| inner.chars_written)
+    }
+
+    fn chars_read(&self) -> usize {
+        self.inner.lock(|inner| inner.chars_read)
+    }
+}
+
+impl exception::asynchronous::interface::IRQHandler for PL011Uart {
+    fn handle(&self) -> Result<(), &'static str> {
+        self.inner.lock(|inner| {
+            let pending = inner.registers.MIS.extract();
+
+            // Clear all pending IRQs.
+            inner.registers.ICR.write(ICR::ALL::CLEAR);
+
+            // Check for any kind of RX interrupt.
+            if pending.matches_any(MIS::RXMIS::SET + MIS::RTMIS::SET) {
+                // Echo any received characters.
+                while let Some(c) = inner.read_char_converting(BlockingMode::NonBlocking) {
+                    inner.write_char(c)
+                }
+            }
+        });
+
+        Ok(())
+    }
+}
diff --git a/18_backtrace/kernel/src/bsp/device_driver/common.rs b/18_backtrace/kernel/src/bsp/device_driver/common.rs
new file mode 100644
index 000000000..fd9e988ea
--- /dev/null
+++ b/18_backtrace/kernel/src/bsp/device_driver/common.rs
@@ -0,0 +1,38 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Common device driver code.
+
+use core::{marker::PhantomData, ops};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct MMIODerefWrapper<T> {
+    start_addr: usize,
+    phantom: PhantomData<fn() -> T>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl<T> MMIODerefWrapper<T> {
+    /// Create an instance.
+    pub const unsafe fn new(start_addr: usize) -> Self {
+        Self {
+            start_addr,
+            phantom: PhantomData,
+        }
+    }
+}
+
+impl<T> ops::Deref for MMIODerefWrapper<T> {
+    type Target = T;
+
+    fn deref(&self) -> &Self::Target {
+        unsafe { &*(self.start_addr as *const _) }
+    }
+}
diff --git a/18_backtrace/kernel/src/bsp/raspberrypi.rs b/18_backtrace/kernel/src/bsp/raspberrypi.rs
new file mode 100644
index 000000000..fb9edf88d
--- /dev/null
+++ b/18_backtrace/kernel/src/bsp/raspberrypi.rs
@@ -0,0 +1,62 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Top-level BSP file for the Raspberry Pi 3 and 4.
+
+pub mod console;
+pub mod cpu;
+pub mod driver;
+pub mod exception;
+pub mod memory;
+
+use super::device_driver;
+use crate::memory::mmu::MMIODescriptor;
+use memory::map::mmio;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static GPIO: device_driver::GPIO =
+    unsafe { device_driver::GPIO::new(MMIODescriptor::new(mmio::GPIO_START, mmio::GPIO_SIZE)) };
+
+static PL011_UART: device_driver::PL011Uart = unsafe {
+    device_driver::PL011Uart::new(
+        MMIODescriptor::new(mmio::PL011_UART_START, mmio::PL011_UART_SIZE),
+        exception::asynchronous::irq_map::PL011_UART,
+    )
+};
+
+#[cfg(feature = "bsp_rpi3")]
+static INTERRUPT_CONTROLLER: device_driver::InterruptController = unsafe {
+    device_driver::InterruptController::new(
+        MMIODescriptor::new(mmio::LOCAL_IC_START, mmio::LOCAL_IC_SIZE),
+        MMIODescriptor::new(mmio::PERIPHERAL_IC_START, mmio::PERIPHERAL_IC_SIZE),
+    )
+};
+
+#[cfg(feature = "bsp_rpi4")]
+static INTERRUPT_CONTROLLER: device_driver::GICv2 = unsafe {
+    device_driver::GICv2::new(
+        MMIODescriptor::new(mmio::GICD_START, mmio::GICD_SIZE),
+        MMIODescriptor::new(mmio::GICC_START, mmio::GICC_SIZE),
+    )
+};
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Board identification.
+pub fn board_name() -> &'static str {
+    #[cfg(feature = "bsp_rpi3")]
+    {
+        "Raspberry Pi 3"
+    }
+
+    #[cfg(feature = "bsp_rpi4")]
+    {
+        "Raspberry Pi 4"
+    }
+}
diff --git a/18_backtrace/kernel/src/bsp/raspberrypi/console.rs b/18_backtrace/kernel/src/bsp/raspberrypi/console.rs
new file mode 100644
index 000000000..a0d2e687c
--- /dev/null
+++ b/18_backtrace/kernel/src/bsp/raspberrypi/console.rs
@@ -0,0 +1,98 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP console facilities.
+
+use crate::{bsp::device_driver, console, cpu, driver};
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// In case of a panic, the panic handler uses this function to take a last shot at printing
+/// something before the system is halted.
+///
+/// We try to init panic-versions of the GPIO and the UART. The panic versions are not protected
+/// with synchronization primitives, which increases chances that we get to print something, even
+/// when the kernel's default GPIO or UART instances happen to be locked at the time of the panic.
+///
+/// # Safety
+///
+/// - Use only for printing during a panic.
+#[cfg(not(feature = "test_build"))]
+pub unsafe fn panic_console_out() -> impl fmt::Write {
+    use driver::interface::DeviceDriver;
+
+    // If remapping of the driver's MMIO hasn't already happened, we won't be able to print. Just
+    // park the CPU core in this case.
+    let gpio_mmio_start_addr = match super::GPIO.virt_mmio_start_addr() {
+        None => cpu::wait_forever(),
+        Some(x) => x,
+    };
+
+    let uart_mmio_start_addr = match super::PL011_UART.virt_mmio_start_addr() {
+        None => cpu::wait_forever(),
+        Some(x) => x,
+    };
+
+    let mut panic_gpio = device_driver::PanicGPIO::new(gpio_mmio_start_addr);
+    let mut panic_uart = device_driver::PanicUart::new(uart_mmio_start_addr);
+
+    panic_gpio
+        .init(None)
+        .unwrap_or_else(|_| cpu::wait_forever());
+    panic_gpio.map_pl011_uart();
+    panic_uart
+        .init(None)
+        .unwrap_or_else(|_| cpu::wait_forever());
+
+    panic_uart
+}
+
+/// Reduced version for test builds.
+///
+/// # Safety
+///
+/// - Use only for printing during a panic.
+#[cfg(feature = "test_build")]
+pub unsafe fn panic_console_out() -> impl fmt::Write {
+    use driver::interface::DeviceDriver;
+
+    let uart_mmio_start_addr = match super::PL011_UART.virt_mmio_start_addr() {
+        None => cpu::wait_forever(),
+        Some(x) => x,
+    };
+    let mut panic_uart = device_driver::PanicUart::new(uart_mmio_start_addr);
+
+    panic_uart
+        .init(None)
+        .unwrap_or_else(|_| cpu::qemu_exit_failure());
+
+    panic_uart
+}
+
+/// Return a reference to the console.
+pub fn console() -> &'static impl console::interface::All {
+    &super::PL011_UART
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+/// Minimal code needed to bring up the console in QEMU (for testing only). This is often less steps
+/// than on real hardware due to QEMU's abstractions.
+#[cfg(feature = "test_build")]
+pub fn qemu_bring_up_console() {
+    use driver::interface::DeviceDriver;
+
+    // Calling the UART's init ensures that the BSP's instance of the UART does remap the MMIO
+    // addresses.
+    unsafe {
+        super::PL011_UART
+            .init()
+            .unwrap_or_else(|_| cpu::qemu_exit_failure());
+    }
+}
diff --git a/18_backtrace/kernel/src/bsp/raspberrypi/cpu.rs b/18_backtrace/kernel/src/bsp/raspberrypi/cpu.rs
new file mode 100644
index 000000000..85fb89e49
--- /dev/null
+++ b/18_backtrace/kernel/src/bsp/raspberrypi/cpu.rs
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP Processor code.
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Used by `arch` code to find the early boot core.
+#[no_mangle]
+#[link_section = ".text._start_arguments"]
+pub static BOOT_CORE_ID: u64 = 0;
diff --git a/18_backtrace/kernel/src/bsp/raspberrypi/driver.rs b/18_backtrace/kernel/src/bsp/raspberrypi/driver.rs
new file mode 100644
index 000000000..531687524
--- /dev/null
+++ b/18_backtrace/kernel/src/bsp/raspberrypi/driver.rs
@@ -0,0 +1,61 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP driver support.
+
+use crate::driver;
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Device Driver Manager type.
+struct BSPDriverManager {
+    device_drivers: [&'static (dyn DeviceDriver + Sync); 3],
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
+    device_drivers: [
+        &super::GPIO,
+        &super::PL011_UART,
+        &super::INTERRUPT_CONTROLLER,
+    ],
+};
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the driver manager.
+pub fn driver_manager() -> &'static impl driver::interface::DriverManager {
+    &BSP_DRIVER_MANAGER
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use driver::interface::DeviceDriver;
+
+impl driver::interface::DriverManager for BSPDriverManager {
+    fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
+        &self.device_drivers[..]
+    }
+
+    fn early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
+        &self.device_drivers[0..=1]
+    }
+
+    fn non_early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
+        &self.device_drivers[2..]
+    }
+
+    fn post_early_print_device_driver_init(&self) {
+        // Configure PL011Uart's output pins.
+        super::GPIO.map_pl011_uart();
+    }
+}
diff --git a/18_backtrace/kernel/src/bsp/raspberrypi/exception.rs b/18_backtrace/kernel/src/bsp/raspberrypi/exception.rs
new file mode 100644
index 000000000..aa6c5a63f
--- /dev/null
+++ b/18_backtrace/kernel/src/bsp/raspberrypi/exception.rs
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP synchronous and asynchronous exception handling.
+
+pub mod asynchronous;
diff --git a/18_backtrace/kernel/src/bsp/raspberrypi/exception/asynchronous.rs b/18_backtrace/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
new file mode 100644
index 000000000..dc5ab4215
--- /dev/null
+++ b/18_backtrace/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP asynchronous exception handling.
+
+use crate::{bsp, exception};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(feature = "bsp_rpi3")]
+pub(in crate::bsp) mod irq_map {
+    use super::bsp::device_driver::{IRQNumber, PeripheralIRQ};
+
+    pub const PL011_UART: IRQNumber = IRQNumber::Peripheral(PeripheralIRQ::new(57));
+}
+
+#[cfg(feature = "bsp_rpi4")]
+pub(in crate::bsp) mod irq_map {
+    use super::bsp::device_driver::IRQNumber;
+
+    pub const PL011_UART: IRQNumber = IRQNumber::new(153);
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the IRQ manager.
+pub fn irq_manager() -> &'static impl exception::asynchronous::interface::IRQManager<
+    IRQNumberType = bsp::device_driver::IRQNumber,
+> {
+    &super::super::INTERRUPT_CONTROLLER
+}
diff --git a/18_backtrace/kernel/src/bsp/raspberrypi/kernel.ld b/18_backtrace/kernel/src/bsp/raspberrypi/kernel.ld
new file mode 100644
index 000000000..6fcbf31cf
--- /dev/null
+++ b/18_backtrace/kernel/src/bsp/raspberrypi/kernel.ld
@@ -0,0 +1,114 @@
+/* SPDX-License-Identifier: MIT OR Apache-2.0
+ *
+ * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+ */
+
+INCLUDE kernel_virt_addr_space_size.ld;
+
+PAGE_SIZE = 64K;
+PAGE_MASK = PAGE_SIZE - 1;
+
+/* The kernel's virtual address range will be:
+ *
+ * [END_ADDRESS_INCLUSIVE, START_ADDRESS]
+ * [u64::MAX             , (u64::MAX - __kernel_virt_addr_space_size) + 1]
+ */
+__kernel_virt_start_addr = ((0xffffffffffffffff - __kernel_virt_addr_space_size) + 1);
+
+__rpi_phys_dram_start_addr = 0;
+
+/* The physical address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_phys_binary_load_addr = 0x80000;
+
+
+ENTRY(__rpi_phys_binary_load_addr)
+
+/* Flags:
+ *     4 == R
+ *     5 == RX
+ *     6 == RW
+ *
+ * Segments are marked PT_LOAD below so that the ELF file provides virtual and physical addresses.
+ * It doesn't mean all of them need actually be loaded.
+ */
+PHDRS
+{
+    segment_code            PT_LOAD FLAGS(5);
+    segment_data            PT_LOAD FLAGS(6);
+    segment_boot_core_stack PT_LOAD FLAGS(6);
+}
+
+SECTIONS
+{
+    . =  __kernel_virt_start_addr;
+
+    ASSERT((. & PAGE_MASK) == 0, "Start of address space is not page aligned")
+
+    /***********************************************************************************************
+    * Code + RO Data + Global Offset Table
+    ***********************************************************************************************/
+    __code_start = .;
+    .text : AT(__rpi_phys_binary_load_addr)
+    {
+        KEEP(*(.text._start))
+        *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
+        *(.text._start_rust)      /* The Rust entry point */
+        *(.text*)                 /* Everything else */
+    } :segment_code
+
+    .rodata         : ALIGN(8) { *(.rodata*) } :segment_code
+    .got            : ALIGN(8) { *(.got)     } :segment_code
+    .kernel_symbols : ALIGN(8) {
+        __kernel_symbols_start = .;
+        . += 32 * 1024;
+    } :segment_code
+
+    . = ALIGN(PAGE_SIZE);
+    __code_end_exclusive = .;
+
+    /***********************************************************************************************
+    * Data + BSS
+    ***********************************************************************************************/
+    __data_start = .;
+    .data : { *(.data*) } :segment_data
+
+    /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
+    .bss (NOLOAD) : ALIGN(16)
+    {
+        __bss_start = .;
+        *(.bss*);
+        . = ALIGN(16);
+        __bss_end_exclusive = .;
+    } :segment_data
+
+    . = ALIGN(PAGE_SIZE);
+    __data_end_exclusive = .;
+
+    /***********************************************************************************************
+    * MMIO Remap Reserved
+    ***********************************************************************************************/
+    __mmio_remap_start = .;
+    . += 8 * 1024 * 1024;
+    __mmio_remap_end_exclusive = .;
+
+    ASSERT((. & PAGE_MASK) == 0, "MMIO remap reservation is not page aligned")
+
+    /***********************************************************************************************
+    * Guard Page
+    ***********************************************************************************************/
+    . += PAGE_SIZE;
+
+    /***********************************************************************************************
+    * Boot Core Stack
+    ***********************************************************************************************/
+    .boot_core_stack (NOLOAD) : AT(__rpi_phys_dram_start_addr)
+    {
+        __boot_core_stack_start = .;         /*   ^             */
+                                             /*   | stack       */
+        . += __rpi_phys_binary_load_addr;    /*   | growth      */
+                                             /*   | direction   */
+        __boot_core_stack_end_exclusive = .; /*   |             */
+    } :segment_boot_core_stack
+
+    ASSERT((. & PAGE_MASK) == 0, "End of boot core stack is not page aligned")
+}
diff --git a/18_backtrace/kernel/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld b/18_backtrace/kernel/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
new file mode 100644
index 000000000..c5d58c30a
--- /dev/null
+++ b/18_backtrace/kernel/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
@@ -0,0 +1 @@
+__kernel_virt_addr_space_size = 1024 * 1024 * 1024
diff --git a/18_backtrace/kernel/src/bsp/raspberrypi/memory.rs b/18_backtrace/kernel/src/bsp/raspberrypi/memory.rs
new file mode 100644
index 000000000..01aa9441a
--- /dev/null
+++ b/18_backtrace/kernel/src/bsp/raspberrypi/memory.rs
@@ -0,0 +1,227 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP Memory Management.
+//!
+//! The physical memory layout.
+//!
+//! The Raspberry's firmware copies the kernel binary to 0x8_0000. The preceding region will be used
+//! as the boot core's stack.
+//!
+//! +---------------------------------------+
+//! |                                       | boot_core_stack_start @ 0x0
+//! |                                       |                                ^
+//! | Boot-core Stack                       |                                | stack
+//! |                                       |                                | growth
+//! |                                       |                                | direction
+//! +---------------------------------------+
+//! |                                       | code_start @ 0x8_0000 == boot_core_stack_end_exclusive
+//! | .text                                 |
+//! | .rodata                               |
+//! | .got                                  |
+//! | .kernel_symbols                       |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       | data_start == code_end_exclusive
+//! | .data                                 |
+//! | .bss                                  |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       | data_end_exclusive
+//! |                                       |
+//!
+//!
+//!
+//!
+//!
+//! The virtual memory layout is as follows:
+//!
+//! +---------------------------------------+
+//! |                                       | code_start @ __kernel_virt_start_addr
+//! | .text                                 |
+//! | .rodata                               |
+//! | .got                                  |
+//! | .kernel_symbols                       |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       | data_start == code_end_exclusive
+//! | .data                                 |
+//! | .bss                                  |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       |  mmio_remap_start == data_end_exclusive
+//! | VA region for MMIO remapping          |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       |  mmio_remap_end_exclusive
+//! | Unmapped guard page                   |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       | boot_core_stack_start
+//! |                                       |                                ^
+//! | Boot-core Stack                       |                                | stack
+//! |                                       |                                | growth
+//! |                                       |                                | direction
+//! +---------------------------------------+
+//! |                                       | boot_core_stack_end_exclusive
+//! |                                       |
+pub mod mmu;
+
+use crate::memory::{mmu::PageAddress, Address, Physical, Virtual};
+use core::cell::UnsafeCell;
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+// Symbols from the linker script.
+extern "Rust" {
+    static __code_start: UnsafeCell<()>;
+    static __code_end_exclusive: UnsafeCell<()>;
+
+    static __data_start: UnsafeCell<()>;
+    static __data_end_exclusive: UnsafeCell<()>;
+
+    static __mmio_remap_start: UnsafeCell<()>;
+    static __mmio_remap_end_exclusive: UnsafeCell<()>;
+
+    static __boot_core_stack_start: UnsafeCell<()>;
+    static __boot_core_stack_end_exclusive: UnsafeCell<()>;
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// The board's physical memory map.
+#[rustfmt::skip]
+pub(super) mod map {
+    use super::*;
+
+    /// Physical devices.
+    #[cfg(feature = "bsp_rpi3")]
+    pub mod mmio {
+        use super::*;
+
+        pub const PERIPHERAL_IC_START: Address<Physical> = Address::new(0x3F00_B200);
+        pub const PERIPHERAL_IC_SIZE:  usize             =              0x24;
+
+        pub const GPIO_START:          Address<Physical> = Address::new(0x3F20_0000);
+        pub const GPIO_SIZE:           usize             =              0xA0;
+
+        pub const PL011_UART_START:    Address<Physical> = Address::new(0x3F20_1000);
+        pub const PL011_UART_SIZE:     usize             =              0x48;
+
+        pub const LOCAL_IC_START:      Address<Physical> = Address::new(0x4000_0000);
+        pub const LOCAL_IC_SIZE:       usize             =              0x100;
+
+        pub const END:                 Address<Physical> = Address::new(0x4001_0000);
+    }
+
+    /// Physical devices.
+    #[cfg(feature = "bsp_rpi4")]
+    pub mod mmio {
+        use super::*;
+
+        pub const GPIO_START:       Address<Physical> = Address::new(0xFE20_0000);
+        pub const GPIO_SIZE:        usize             =              0xA0;
+
+        pub const PL011_UART_START: Address<Physical> = Address::new(0xFE20_1000);
+        pub const PL011_UART_SIZE:  usize             =              0x48;
+
+        pub const GICD_START:       Address<Physical> = Address::new(0xFF84_1000);
+        pub const GICD_SIZE:        usize             =              0x824;
+
+        pub const GICC_START:       Address<Physical> = Address::new(0xFF84_2000);
+        pub const GICC_SIZE:        usize             =              0x14;
+
+        pub const END:              Address<Physical> = Address::new(0xFF85_0000);
+    }
+
+    pub const END: Address<Physical> = mmio::END;
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// Start page address of the code segment.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn virt_code_start() -> PageAddress<Virtual> {
+    PageAddress::from(unsafe { __code_start.get() as usize })
+}
+
+/// Size of the code segment.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn code_size() -> usize {
+    unsafe { (__code_end_exclusive.get() as usize) - (__code_start.get() as usize) }
+}
+
+/// Start page address of the data segment.
+#[inline(always)]
+fn virt_data_start() -> PageAddress<Virtual> {
+    PageAddress::from(unsafe { __data_start.get() as usize })
+}
+
+/// Size of the data segment.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn data_size() -> usize {
+    unsafe { (__data_end_exclusive.get() as usize) - (__data_start.get() as usize) }
+}
+
+/// Start page address of the MMIO remap reservation.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn virt_mmio_remap_start() -> PageAddress<Virtual> {
+    PageAddress::from(unsafe { __mmio_remap_start.get() as usize })
+}
+
+/// Size of the MMIO remap reservation.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn mmio_remap_size() -> usize {
+    unsafe { (__mmio_remap_end_exclusive.get() as usize) - (__mmio_remap_start.get() as usize) }
+}
+
+/// Start page address of the boot core's stack.
+#[inline(always)]
+fn virt_boot_core_stack_start() -> PageAddress<Virtual> {
+    PageAddress::from(unsafe { __boot_core_stack_start.get() as usize })
+}
+
+/// Size of the boot core's stack.
+#[inline(always)]
+fn boot_core_stack_size() -> usize {
+    unsafe {
+        (__boot_core_stack_end_exclusive.get() as usize) - (__boot_core_stack_start.get() as usize)
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Exclusive end address of the physical address space.
+#[inline(always)]
+pub fn phys_addr_space_end_exclusive_addr() -> PageAddress<Physical> {
+    PageAddress::from(map::END)
+}
diff --git a/18_backtrace/kernel/src/bsp/raspberrypi/memory/mmu.rs b/18_backtrace/kernel/src/bsp/raspberrypi/memory/mmu.rs
new file mode 100644
index 000000000..160c188f4
--- /dev/null
+++ b/18_backtrace/kernel/src/bsp/raspberrypi/memory/mmu.rs
@@ -0,0 +1,179 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP Memory Management Unit.
+
+use crate::{
+    memory::{
+        mmu::{
+            self as generic_mmu, AddressSpace, AssociatedTranslationTable, AttributeFields,
+            MemoryRegion, PageAddress, TranslationGranule,
+        },
+        Physical, Virtual,
+    },
+    synchronization::InitStateLock,
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+type KernelTranslationTable =
+    <KernelVirtAddrSpace as AssociatedTranslationTable>::TableStartFromTop;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// The translation granule chosen by this BSP. This will be used everywhere else in the kernel to
+/// derive respective data structures and their sizes. For example, the `crate::memory::mmu::Page`.
+pub type KernelGranule = TranslationGranule<{ 64 * 1024 }>;
+
+/// The kernel's virtual address space defined by this BSP.
+pub type KernelVirtAddrSpace = AddressSpace<{ kernel_virt_addr_space_size() }>;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+/// The kernel translation tables.
+///
+/// It is mandatory that InitStateLock is transparent.
+///
+/// That is, `size_of(InitStateLock<KernelTranslationTable>) == size_of(KernelTranslationTable)`.
+/// There is a unit tests that checks this porperty.
+#[link_section = ".data"]
+#[no_mangle]
+static KERNEL_TABLES: InitStateLock<KernelTranslationTable> =
+    InitStateLock::new(KernelTranslationTable::new_for_precompute());
+
+/// This value is needed during early boot for MMU setup.
+///
+/// This will be patched to the correct value by the "translation table tool" after linking. This
+/// given value here is just a dummy.
+#[link_section = ".text._start_arguments"]
+#[no_mangle]
+static PHYS_KERNEL_TABLES_BASE_ADDR: u64 = 0xCCCCAAAAFFFFEEEE;
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// This is a hack for retrieving the value for the kernel's virtual address space size as a
+/// constant from a common place, since it is needed as a compile-time/link-time constant in both,
+/// the linker script and the Rust sources.
+#[allow(clippy::needless_late_init)]
+const fn kernel_virt_addr_space_size() -> usize {
+    let __kernel_virt_addr_space_size;
+
+    include!("../kernel_virt_addr_space_size.ld");
+
+    __kernel_virt_addr_space_size
+}
+
+/// Helper function for calculating the number of pages the given parameter spans.
+const fn size_to_num_pages(size: usize) -> usize {
+    assert!(size > 0);
+    assert!(size % KernelGranule::SIZE == 0);
+
+    size >> KernelGranule::SHIFT
+}
+
+/// The data pages of the kernel binary.
+fn virt_data_region() -> MemoryRegion<Virtual> {
+    let num_pages = size_to_num_pages(super::data_size());
+
+    let start_page_addr = super::virt_data_start();
+    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
+
+    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
+}
+
+// There is no reason to expect the following conversions to fail, since they were generated offline
+// by the `translation table tool`. If it doesn't work, a panic due to the unwraps is justified.
+fn kernel_virt_to_phys_region(virt_region: MemoryRegion<Virtual>) -> MemoryRegion<Physical> {
+    let phys_start_page_addr =
+        generic_mmu::try_kernel_virt_page_addr_to_phys_page_addr(virt_region.start_page_addr())
+            .unwrap();
+
+    let phys_end_exclusive_page_addr = phys_start_page_addr
+        .checked_offset(virt_region.num_pages() as isize)
+        .unwrap();
+
+    MemoryRegion::new(phys_start_page_addr, phys_end_exclusive_page_addr)
+}
+
+fn kernel_page_attributes(virt_page_addr: PageAddress<Virtual>) -> AttributeFields {
+    generic_mmu::try_kernel_page_attributes(virt_page_addr).unwrap()
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The code pages of the kernel binary.
+pub fn virt_code_region() -> MemoryRegion<Virtual> {
+    let num_pages = size_to_num_pages(super::code_size());
+
+    let start_page_addr = super::virt_code_start();
+    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
+
+    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
+}
+
+/// The boot core stack pages.
+pub fn virt_boot_core_stack_region() -> MemoryRegion<Virtual> {
+    let num_pages = size_to_num_pages(super::boot_core_stack_size());
+
+    let start_page_addr = super::virt_boot_core_stack_start();
+    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
+
+    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
+}
+
+/// Return a reference to the kernel's translation tables.
+pub fn kernel_translation_tables() -> &'static InitStateLock<KernelTranslationTable> {
+    &KERNEL_TABLES
+}
+
+/// The MMIO remap pages.
+pub fn virt_mmio_remap_region() -> MemoryRegion<Virtual> {
+    let num_pages = size_to_num_pages(super::mmio_remap_size());
+
+    let start_page_addr = super::virt_mmio_remap_start();
+    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
+
+    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
+}
+
+/// Add mapping records for the kernel binary.
+///
+/// The actual translation table entries for the kernel binary are generated using the offline
+/// `translation table tool` and patched into the kernel binary. This function just adds the mapping
+/// record entries.
+pub fn kernel_add_mapping_records_for_precomputed() {
+    let virt_code_region = virt_code_region();
+    generic_mmu::kernel_add_mapping_record(
+        "Kernel code and RO data",
+        &virt_code_region,
+        &kernel_virt_to_phys_region(virt_code_region),
+        &kernel_page_attributes(virt_code_region.start_page_addr()),
+    );
+
+    let virt_data_region = virt_data_region();
+    generic_mmu::kernel_add_mapping_record(
+        "Kernel data and bss",
+        &virt_data_region,
+        &kernel_virt_to_phys_region(virt_data_region),
+        &kernel_page_attributes(virt_data_region.start_page_addr()),
+    );
+
+    let virt_boot_core_stack_region = virt_boot_core_stack_region();
+    generic_mmu::kernel_add_mapping_record(
+        "Kernel boot-core stack",
+        &virt_boot_core_stack_region,
+        &kernel_virt_to_phys_region(virt_boot_core_stack_region),
+        &kernel_page_attributes(virt_boot_core_stack_region.start_page_addr()),
+    );
+}
diff --git a/18_backtrace/kernel/src/common.rs b/18_backtrace/kernel/src/common.rs
new file mode 100644
index 000000000..678f4a6c6
--- /dev/null
+++ b/18_backtrace/kernel/src/common.rs
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! General purpose code.
+
+/// Check if a value is aligned to a given size.
+#[inline(always)]
+pub const fn is_aligned(value: usize, alignment: usize) -> bool {
+    assert!(alignment.is_power_of_two());
+
+    (value & (alignment - 1)) == 0
+}
+
+/// Align down.
+#[inline(always)]
+pub const fn align_down(value: usize, alignment: usize) -> usize {
+    assert!(alignment.is_power_of_two());
+
+    value & !(alignment - 1)
+}
+
+/// Align up.
+#[inline(always)]
+pub const fn align_up(value: usize, alignment: usize) -> usize {
+    assert!(alignment.is_power_of_two());
+
+    (value + alignment - 1) & !(alignment - 1)
+}
diff --git a/18_backtrace/kernel/src/console.rs b/18_backtrace/kernel/src/console.rs
new file mode 100644
index 000000000..e49e241fe
--- /dev/null
+++ b/18_backtrace/kernel/src/console.rs
@@ -0,0 +1,53 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! System console.
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Console interfaces.
+pub mod interface {
+    use core::fmt;
+
+    /// Console write functions.
+    pub trait Write {
+        /// Write a single character.
+        fn write_char(&self, c: char);
+
+        /// Write a Rust format string.
+        fn write_fmt(&self, args: fmt::Arguments) -> fmt::Result;
+
+        /// Block until the last buffered character has been physically put on the TX wire.
+        fn flush(&self);
+    }
+
+    /// Console read functions.
+    pub trait Read {
+        /// Read a single character.
+        fn read_char(&self) -> char {
+            ' '
+        }
+
+        /// Clear RX buffers, if any.
+        fn clear_rx(&self);
+    }
+
+    /// Console statistics.
+    pub trait Statistics {
+        /// Return the number of characters written.
+        fn chars_written(&self) -> usize {
+            0
+        }
+
+        /// Return the number of characters read.
+        fn chars_read(&self) -> usize {
+            0
+        }
+    }
+
+    /// Trait alias for a full-fledged console.
+    pub trait All = Write + Read + Statistics;
+}
diff --git a/18_backtrace/kernel/src/cpu.rs b/18_backtrace/kernel/src/cpu.rs
new file mode 100644
index 000000000..e1493d1dd
--- /dev/null
+++ b/18_backtrace/kernel/src/cpu.rs
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Processor code.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "_arch/aarch64/cpu.rs"]
+mod arch_cpu;
+
+mod boot;
+
+pub mod smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_cpu::{nop, wait_forever};
+
+#[cfg(feature = "test_build")]
+pub use arch_cpu::{qemu_exit_failure, qemu_exit_success};
diff --git a/18_backtrace/kernel/src/cpu/boot.rs b/18_backtrace/kernel/src/cpu/boot.rs
new file mode 100644
index 000000000..8091dac36
--- /dev/null
+++ b/18_backtrace/kernel/src/cpu/boot.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Boot code.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/cpu/boot.rs"]
+mod arch_boot;
diff --git a/18_backtrace/kernel/src/cpu/smp.rs b/18_backtrace/kernel/src/cpu/smp.rs
new file mode 100644
index 000000000..57386f79b
--- /dev/null
+++ b/18_backtrace/kernel/src/cpu/smp.rs
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Symmetric multiprocessing.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/cpu/smp.rs"]
+mod arch_smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_smp::core_id;
diff --git a/18_backtrace/kernel/src/driver.rs b/18_backtrace/kernel/src/driver.rs
new file mode 100644
index 000000000..7b800dbc3
--- /dev/null
+++ b/18_backtrace/kernel/src/driver.rs
@@ -0,0 +1,62 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Driver support.
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Driver interfaces.
+pub mod interface {
+    /// Device Driver functions.
+    pub trait DeviceDriver {
+        /// Return a compatibility string for identifying the driver.
+        fn compatible(&self) -> &'static str;
+
+        /// Called by the kernel to bring up the device.
+        ///
+        /// # Safety
+        ///
+        /// - During init, drivers might do stuff with system-wide impact.
+        unsafe fn init(&self) -> Result<(), &'static str> {
+            Ok(())
+        }
+
+        /// Called by the kernel to register and enable the device's IRQ handlers, if any.
+        ///
+        /// Rust's type system will prevent a call to this function unless the calling instance
+        /// itself has static lifetime.
+        fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
+            Ok(())
+        }
+
+        /// After MMIO remapping, returns the new virtual start address.
+        ///
+        /// This API assumes a driver has only a single, contiguous MMIO aperture, which will not be
+        /// the case for more complex devices. This API will likely change in future tutorials.
+        fn virt_mmio_start_addr(&self) -> Option<usize> {
+            None
+        }
+    }
+
+    /// Device driver management functions.
+    ///
+    /// The `BSP` is supposed to supply one global instance.
+    pub trait DriverManager {
+        /// Return a slice of references to all `BSP`-instantiated drivers.
+        fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
+
+        /// Return only those drivers needed for the BSP's early printing functionality.
+        ///
+        /// For example, the default UART.
+        fn early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
+
+        /// Return all drivers minus early-print drivers.
+        fn non_early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
+
+        /// Initialization code that runs after the early print driver init.
+        fn post_early_print_device_driver_init(&self);
+    }
+}
diff --git a/18_backtrace/kernel/src/exception.rs b/18_backtrace/kernel/src/exception.rs
new file mode 100644
index 000000000..f4af81444
--- /dev/null
+++ b/18_backtrace/kernel/src/exception.rs
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Synchronous and asynchronous exception handling.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "_arch/aarch64/exception.rs"]
+mod arch_exception;
+
+pub mod asynchronous;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_exception::{current_privilege_level, handling_init};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Kernel privilege levels.
+#[allow(missing_docs)]
+#[derive(PartialEq)]
+pub enum PrivilegeLevel {
+    User,
+    Kernel,
+    Hypervisor,
+    Unknown,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// Libkernel unit tests must execute in kernel mode.
+    #[kernel_test]
+    fn test_runner_executes_in_kernel_mode() {
+        let (level, _) = current_privilege_level();
+
+        assert!(level == PrivilegeLevel::Kernel)
+    }
+}
diff --git a/18_backtrace/kernel/src/exception/asynchronous.rs b/18_backtrace/kernel/src/exception/asynchronous.rs
new file mode 100644
index 000000000..fb1785c23
--- /dev/null
+++ b/18_backtrace/kernel/src/exception/asynchronous.rs
@@ -0,0 +1,152 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Asynchronous exception handling.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/exception/asynchronous.rs"]
+mod arch_asynchronous;
+
+use core::{fmt, marker::PhantomData};
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_asynchronous::{
+    is_local_irq_masked, local_irq_mask, local_irq_mask_save, local_irq_restore, local_irq_unmask,
+    print_state,
+};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Interrupt descriptor.
+#[derive(Copy, Clone)]
+pub struct IRQDescriptor {
+    /// Descriptive name.
+    pub name: &'static str,
+
+    /// Reference to handler trait object.
+    pub handler: &'static (dyn interface::IRQHandler + Sync),
+}
+
+/// IRQContext token.
+///
+/// An instance of this type indicates that the local core is currently executing in IRQ
+/// context, aka executing an interrupt vector or subcalls of it.
+///
+/// Concept and implementation derived from the `CriticalSection` introduced in
+/// <https://github.com/rust-embedded/bare-metal>
+#[derive(Clone, Copy)]
+pub struct IRQContext<'irq_context> {
+    _0: PhantomData<&'irq_context ()>,
+}
+
+/// Asynchronous exception handling interfaces.
+pub mod interface {
+
+    /// Implemented by types that handle IRQs.
+    pub trait IRQHandler {
+        /// Called when the corresponding interrupt is asserted.
+        fn handle(&self) -> Result<(), &'static str>;
+    }
+
+    /// IRQ management functions.
+    ///
+    /// The `BSP` is supposed to supply one global instance. Typically implemented by the
+    /// platform's interrupt controller.
+    pub trait IRQManager {
+        /// The IRQ number type depends on the implementation.
+        type IRQNumberType;
+
+        /// Register a handler.
+        fn register_handler(
+            &self,
+            irq_number: Self::IRQNumberType,
+            descriptor: super::IRQDescriptor,
+        ) -> Result<(), &'static str>;
+
+        /// Enable an interrupt in the controller.
+        fn enable(&self, irq_number: Self::IRQNumberType);
+
+        /// Handle pending interrupts.
+        ///
+        /// This function is called directly from the CPU's IRQ exception vector. On AArch64,
+        /// this means that the respective CPU core has disabled exception handling.
+        /// This function can therefore not be preempted and runs start to finish.
+        ///
+        /// Takes an IRQContext token to ensure it can only be called from IRQ context.
+        #[allow(clippy::trivially_copy_pass_by_ref)]
+        fn handle_pending_irqs<'irq_context>(
+            &'irq_context self,
+            ic: &super::IRQContext<'irq_context>,
+        );
+
+        /// Print list of registered handlers.
+        fn print_handler(&self);
+    }
+}
+
+/// A wrapper type for IRQ numbers with integrated range sanity check.
+#[derive(Copy, Clone)]
+pub struct IRQNumber<const MAX_INCLUSIVE: usize>(usize);
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl<'irq_context> IRQContext<'irq_context> {
+    /// Creates an IRQContext token.
+    ///
+    /// # Safety
+    ///
+    /// - This must only be called when the current core is in an interrupt context and will not
+    ///   live beyond the end of it. That is, creation is allowed in interrupt vector functions. For
+    ///   example, in the ARMv8-A case, in `extern "C" fn current_elx_irq()`.
+    /// - Note that the lifetime `'irq_context` of the returned instance is unconstrained. User code
+    ///   must not be able to influence the lifetime picked for this type, since that might cause it
+    ///   to be inferred to `'static`.
+    #[inline(always)]
+    pub unsafe fn new() -> Self {
+        IRQContext { _0: PhantomData }
+    }
+}
+
+impl<const MAX_INCLUSIVE: usize> IRQNumber<{ MAX_INCLUSIVE }> {
+    /// Creates a new instance if number <= MAX_INCLUSIVE.
+    pub const fn new(number: usize) -> Self {
+        assert!(number <= MAX_INCLUSIVE);
+
+        Self(number)
+    }
+
+    /// Return the wrapped number.
+    pub const fn get(self) -> usize {
+        self.0
+    }
+}
+
+impl<const MAX_INCLUSIVE: usize> fmt::Display for IRQNumber<{ MAX_INCLUSIVE }> {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        write!(f, "{}", self.0)
+    }
+}
+
+/// Executes the provided closure while IRQs are masked on the executing core.
+///
+/// While the function temporarily changes the HW state of the executing core, it restores it to the
+/// previous state before returning, so this is deemed safe.
+#[inline(always)]
+pub fn exec_with_irq_masked<T>(f: impl FnOnce() -> T) -> T {
+    let ret: T;
+
+    unsafe {
+        let saved = local_irq_mask_save();
+        ret = f();
+        local_irq_restore(saved);
+    }
+
+    ret
+}
diff --git a/18_backtrace/kernel/src/lib.rs b/18_backtrace/kernel/src/lib.rs
new file mode 100644
index 000000000..4d7a5f5de
--- /dev/null
+++ b/18_backtrace/kernel/src/lib.rs
@@ -0,0 +1,188 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+// Rust embedded logo for `make doc`.
+#![doc(
+    html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png"
+)]
+
+//! The `kernel` library.
+//!
+//! Used to compose the final kernel binary.
+//!
+//! # Code organization and architecture
+//!
+//! The code is divided into different *modules*, each representing a typical **subsystem** of the
+//! `kernel`. Top-level module files of subsystems reside directly in the `src` folder. For example,
+//! `src/memory.rs` contains code that is concerned with all things memory management.
+//!
+//! ## Visibility of processor architecture code
+//!
+//! Some of the `kernel`'s subsystems depend on low-level code that is specific to the target
+//! processor architecture. For each supported processor architecture, there exists a subfolder in
+//! `src/_arch`, for example, `src/_arch/aarch64`.
+//!
+//! The architecture folders mirror the subsystem modules laid out in `src`. For example,
+//! architectural code that belongs to the `kernel`'s MMU subsystem (`src/memory/mmu.rs`) would go
+//! into `src/_arch/aarch64/memory/mmu.rs`. The latter file is loaded as a module in
+//! `src/memory/mmu.rs` using the `path attribute`. Usually, the chosen module name is the generic
+//! module's name prefixed with `arch_`.
+//!
+//! For example, this is the top of `src/memory/mmu.rs`:
+//!
+//! ```
+//! #[cfg(target_arch = "aarch64")]
+//! #[path = "../_arch/aarch64/memory/mmu.rs"]
+//! mod arch_mmu;
+//! ```
+//!
+//! Often times, items from the `arch_ module` will be publicly reexported by the parent module.
+//! This way, each architecture specific module can provide its implementation of an item, while the
+//! caller must not be concerned which architecture has been conditionally compiled.
+//!
+//! ## BSP code
+//!
+//! `BSP` stands for Board Support Package. `BSP` code is organized under `src/bsp.rs` and contains
+//! target board specific definitions and functions. These are things such as the board's memory map
+//! or instances of drivers for devices that are featured on the respective board.
+//!
+//! Just like processor architecture code, the `BSP` code's module structure tries to mirror the
+//! `kernel`'s subsystem modules, but there is no reexporting this time. That means whatever is
+//! provided must be called starting from the `bsp` namespace, e.g. `bsp::driver::driver_manager()`.
+//!
+//! ## Kernel interfaces
+//!
+//! Both `arch` and `bsp` contain code that is conditionally compiled depending on the actual target
+//! and board for which the kernel is compiled. For example, the `interrupt controller` hardware of
+//! the `Raspberry Pi 3` and the `Raspberry Pi 4` is different, but we want the rest of the `kernel`
+//! code to play nicely with any of the two without much hassle.
+//!
+//! In order to provide a clean abstraction between `arch`, `bsp` and `generic kernel code`,
+//! `interface` traits are provided *whenever possible* and *where it makes sense*. They are defined
+//! in the respective subsystem module and help to enforce the idiom of *program to an interface,
+//! not an implementation*. For example, there will be a common IRQ handling interface which the two
+//! different interrupt controller `drivers` of both Raspberrys will implement, and only export the
+//! interface to the rest of the `kernel`.
+//!
+//! ```
+//!         +-------------------+
+//!         | Interface (Trait) |
+//!         |                   |
+//!         +--+-------------+--+
+//!            ^             ^
+//!            |             |
+//!            |             |
+//! +----------+--+       +--+----------+
+//! | kernel code |       |  bsp code   |
+//! |             |       |  arch code  |
+//! +-------------+       +-------------+
+//! ```
+//!
+//! # Summary
+//!
+//! For a logical `kernel` subsystem, corresponding code can be distributed over several physical
+//! locations. Here is an example for the **memory** subsystem:
+//!
+//! - `src/memory.rs` and `src/memory/**/*`
+//!   - Common code that is agnostic of target processor architecture and `BSP` characteristics.
+//!     - Example: A function to zero a chunk of memory.
+//!   - Interfaces for the memory subsystem that are implemented by `arch` or `BSP` code.
+//!     - Example: An `MMU` interface that defines `MMU` function prototypes.
+//! - `src/bsp/__board_name__/memory.rs` and `src/bsp/__board_name__/memory/**/*`
+//!   - `BSP` specific code.
+//!   - Example: The board's memory map (physical addresses of DRAM and MMIO devices).
+//! - `src/_arch/__arch_name__/memory.rs` and `src/_arch/__arch_name__/memory/**/*`
+//!   - Processor architecture specific code.
+//!   - Example: Implementation of the `MMU` interface for the `__arch_name__` processor
+//!     architecture.
+//!
+//! From a namespace perspective, **memory** subsystem code lives in:
+//!
+//! - `crate::memory::*`
+//! - `crate::bsp::memory::*`
+//!
+//! # Boot flow
+//!
+//! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
+//! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
+
+#![allow(clippy::upper_case_acronyms)]
+#![allow(incomplete_features)]
+#![feature(asm_const)]
+#![feature(core_intrinsics)]
+#![feature(format_args_nl)]
+#![feature(generic_const_exprs)]
+#![feature(linkage)]
+#![feature(panic_info_message)]
+#![feature(step_trait)]
+#![feature(trait_alias)]
+#![no_std]
+// Testing
+#![cfg_attr(test, no_main)]
+#![feature(custom_test_frameworks)]
+#![reexport_test_harness_main = "test_main"]
+#![test_runner(crate::test_runner)]
+
+mod panic_wait;
+mod synchronization;
+
+pub mod backtrace;
+pub mod bsp;
+pub mod common;
+pub mod console;
+pub mod cpu;
+pub mod driver;
+pub mod exception;
+pub mod memory;
+pub mod print;
+pub mod state;
+pub mod symbols;
+pub mod time;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Version string.
+pub fn version() -> &'static str {
+    concat!(
+        env!("CARGO_PKG_NAME"),
+        " version ",
+        env!("CARGO_PKG_VERSION")
+    )
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+/// The default runner for unit tests.
+pub fn test_runner(tests: &[&test_types::UnitTest]) {
+    // This line will be printed as the test header.
+    println!("Running {} tests", tests.len());
+
+    for (i, test) in tests.iter().enumerate() {
+        print!("{:>3}. {:.<58}", i + 1, test.name);
+
+        // Run the actual test.
+        (test.test_func)();
+
+        // Failed tests call panic!(). Execution reaches here only if the test has passed.
+        println!("[ok]")
+    }
+}
+
+/// The `kernel_init()` for unit tests.
+#[cfg(test)]
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    exception::handling_init();
+    memory::mmu::post_enable_init();
+    bsp::console::qemu_bring_up_console();
+
+    test_main();
+
+    cpu::qemu_exit_success()
+}
diff --git a/18_backtrace/kernel/src/main.rs b/18_backtrace/kernel/src/main.rs
new file mode 100644
index 000000000..5150f3afc
--- /dev/null
+++ b/18_backtrace/kernel/src/main.rs
@@ -0,0 +1,111 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+// Rust embedded logo for `make doc`.
+#![doc(
+    html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png"
+)]
+
+//! The `kernel` binary.
+
+#![feature(format_args_nl)]
+#![no_main]
+#![no_std]
+
+use libkernel::{bsp, cpu, driver, exception, info, memory, state, time, warn};
+
+/// Early init code.
+///
+/// When this code runs, virtual memory is already enabled.
+///
+/// # Safety
+///
+/// - Only a single core must be active and running this function.
+/// - Printing will not work until the respective driver's MMIO is remapped.
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
+    exception::handling_init();
+    memory::mmu::post_enable_init();
+
+    // Add the mapping records for the precomputed entries first, so that they appear on the top of
+    // the list.
+    bsp::memory::mmu::kernel_add_mapping_records_for_precomputed();
+
+    // Bring up the drivers needed for printing first.
+    for i in bsp::driver::driver_manager()
+        .early_print_device_drivers()
+        .iter()
+    {
+        // Any encountered errors cannot be printed yet, obviously, so just safely park the CPU.
+        i.init().unwrap_or_else(|_| cpu::wait_forever());
+    }
+    bsp::driver::driver_manager().post_early_print_device_driver_init();
+    // Printing available from here on.
+
+    // Now bring up the remaining drivers.
+    for i in bsp::driver::driver_manager()
+        .non_early_print_device_drivers()
+        .iter()
+    {
+        if let Err(x) = i.init() {
+            panic!("Error loading driver: {}: {}", i.compatible(), x);
+        }
+    }
+
+    // Let device drivers register and enable their handlers with the interrupt controller.
+    for i in bsp::driver::driver_manager().all_device_drivers() {
+        if let Err(msg) = i.register_and_enable_irq_handler() {
+            warn!("Error registering IRQ handler: {}", msg);
+        }
+    }
+
+    // Unmask interrupts on the boot CPU core.
+    exception::asynchronous::local_irq_unmask();
+
+    // Announce conclusion of the kernel_init() phase.
+    state::state_manager().transition_to_single_core_main();
+
+    // Transition from unsafe to safe.
+    kernel_main()
+}
+
+/// The main function running after the early init.
+fn kernel_main() -> ! {
+    use driver::interface::DriverManager;
+    use exception::asynchronous::interface::IRQManager;
+
+    info!("{}", libkernel::version());
+    info!("Booting on: {}", bsp::board_name());
+
+    info!("MMU online:");
+    memory::mmu::kernel_print_mappings();
+
+    let (_, privilege_level) = exception::current_privilege_level();
+    info!("Current privilege level: {}", privilege_level);
+
+    info!("Exception handling state:");
+    exception::asynchronous::print_state();
+
+    info!(
+        "Architectural timer resolution: {} ns",
+        time::time_manager().resolution().as_nanos()
+    );
+
+    info!("Drivers loaded:");
+    for (i, driver) in bsp::driver::driver_manager()
+        .all_device_drivers()
+        .iter()
+        .enumerate()
+    {
+        info!("      {}. {}", i + 1, driver.compatible());
+    }
+
+    info!("Registered IRQ handlers:");
+    bsp::exception::asynchronous::irq_manager().print_handler();
+
+    info!("Echoing input now");
+    cpu::wait_forever();
+}
diff --git a/18_backtrace/kernel/src/memory.rs b/18_backtrace/kernel/src/memory.rs
new file mode 100644
index 000000000..5e8cdbce8
--- /dev/null
+++ b/18_backtrace/kernel/src/memory.rs
@@ -0,0 +1,191 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Memory Management.
+
+pub mod mmu;
+
+use crate::{bsp, common};
+use core::{
+    fmt,
+    marker::PhantomData,
+    ops::{Add, Sub},
+};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Metadata trait for marking the type of an address.
+pub trait AddressType: Copy + Clone + PartialOrd + PartialEq {}
+
+/// Zero-sized type to mark a physical address.
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+pub enum Physical {}
+
+/// Zero-sized type to mark a virtual address.
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+pub enum Virtual {}
+
+/// Generic address type.
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+pub struct Address<ATYPE: AddressType> {
+    value: usize,
+    _address_type: PhantomData<fn() -> ATYPE>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl AddressType for Physical {}
+impl AddressType for Virtual {}
+
+impl<ATYPE: AddressType> Address<ATYPE> {
+    /// Create an instance.
+    pub const fn new(value: usize) -> Self {
+        Self {
+            value,
+            _address_type: PhantomData,
+        }
+    }
+
+    /// Convert to usize.
+    pub const fn as_usize(self) -> usize {
+        self.value
+    }
+
+    /// Align down to page size.
+    #[must_use]
+    pub const fn align_down_page(self) -> Self {
+        let aligned = common::align_down(self.value, bsp::memory::mmu::KernelGranule::SIZE);
+
+        Self::new(aligned)
+    }
+
+    /// Align up to page size.
+    #[must_use]
+    pub const fn align_up_page(self) -> Self {
+        let aligned = common::align_up(self.value, bsp::memory::mmu::KernelGranule::SIZE);
+
+        Self::new(aligned)
+    }
+
+    /// Checks if the address is page aligned.
+    pub const fn is_page_aligned(&self) -> bool {
+        common::is_aligned(self.value, bsp::memory::mmu::KernelGranule::SIZE)
+    }
+
+    /// Return the address' offset into the corresponding page.
+    pub const fn offset_into_page(&self) -> usize {
+        self.value & bsp::memory::mmu::KernelGranule::MASK
+    }
+}
+
+impl<ATYPE: AddressType> Add<usize> for Address<ATYPE> {
+    type Output = Self;
+
+    #[inline(always)]
+    fn add(self, rhs: usize) -> Self::Output {
+        match self.value.checked_add(rhs) {
+            None => panic!("Overflow on Address::add"),
+            Some(x) => Self::new(x),
+        }
+    }
+}
+
+impl<ATYPE: AddressType> Sub<usize> for Address<ATYPE> {
+    type Output = Self;
+
+    #[inline(always)]
+    fn sub(self, rhs: usize) -> Self::Output {
+        match self.value.checked_sub(rhs) {
+            None => panic!("Overflow on Address::sub"),
+            Some(x) => Self::new(x),
+        }
+    }
+}
+
+impl<ATYPE: AddressType> Sub<Address<ATYPE>> for Address<ATYPE> {
+    type Output = Self;
+
+    #[inline(always)]
+    fn sub(self, rhs: Address<ATYPE>) -> Self::Output {
+        match self.value.checked_sub(rhs.value) {
+            None => panic!("Overflow on Address::sub"),
+            Some(x) => Self::new(x),
+        }
+    }
+}
+
+impl Address<Virtual> {
+    /// Checks if the address is part of the boot core stack region.
+    pub fn is_valid_stack_addr(&self) -> bool {
+        bsp::memory::mmu::virt_boot_core_stack_region().contains(*self)
+    }
+
+    /// Checks if the address is part of the kernel code region.
+    pub fn is_valid_code_addr(&self) -> bool {
+        bsp::memory::mmu::virt_code_region().contains(*self)
+    }
+}
+
+impl fmt::Display for Address<Physical> {
+    // Don't expect to see physical addresses greater than 40 bit.
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        let q3: u8 = ((self.value >> 32) & 0xff) as u8;
+        let q2: u16 = ((self.value >> 16) & 0xffff) as u16;
+        let q1: u16 = (self.value & 0xffff) as u16;
+
+        write!(f, "0x")?;
+        write!(f, "{:02x}_", q3)?;
+        write!(f, "{:04x}_", q2)?;
+        write!(f, "{:04x}", q1)
+    }
+}
+
+impl fmt::Display for Address<Virtual> {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        let q4: u16 = ((self.value >> 48) & 0xffff) as u16;
+        let q3: u16 = ((self.value >> 32) & 0xffff) as u16;
+        let q2: u16 = ((self.value >> 16) & 0xffff) as u16;
+        let q1: u16 = (self.value & 0xffff) as u16;
+
+        write!(f, "0x")?;
+        write!(f, "{:04x}_", q4)?;
+        write!(f, "{:04x}_", q3)?;
+        write!(f, "{:04x}_", q2)?;
+        write!(f, "{:04x}", q1)
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// Sanity of [Address] methods.
+    #[kernel_test]
+    fn address_type_method_sanity() {
+        let addr = Address::<Virtual>::new(bsp::memory::mmu::KernelGranule::SIZE + 100);
+
+        assert_eq!(
+            addr.align_down_page().as_usize(),
+            bsp::memory::mmu::KernelGranule::SIZE
+        );
+
+        assert_eq!(
+            addr.align_up_page().as_usize(),
+            bsp::memory::mmu::KernelGranule::SIZE * 2
+        );
+
+        assert!(!addr.is_page_aligned());
+
+        assert_eq!(addr.offset_into_page(), 100);
+    }
+}
diff --git a/18_backtrace/kernel/src/memory/mmu.rs b/18_backtrace/kernel/src/memory/mmu.rs
new file mode 100644
index 000000000..dfc299932
--- /dev/null
+++ b/18_backtrace/kernel/src/memory/mmu.rs
@@ -0,0 +1,270 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Memory Management Unit.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/memory/mmu.rs"]
+mod arch_mmu;
+
+mod alloc;
+mod mapping_record;
+mod translation_table;
+mod types;
+
+use crate::{
+    bsp,
+    memory::{Address, Physical, Virtual},
+    synchronization::{self, interface::Mutex},
+    warn,
+};
+use core::{fmt, num::NonZeroUsize};
+
+pub use types::*;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// MMU enable errors variants.
+#[allow(missing_docs)]
+#[derive(Debug)]
+pub enum MMUEnableError {
+    AlreadyEnabled,
+    Other(&'static str),
+}
+
+/// Memory Management interfaces.
+pub mod interface {
+    use super::*;
+
+    /// MMU functions.
+    pub trait MMU {
+        /// Turns on the MMU for the first time and enables data and instruction caching.
+        ///
+        /// # Safety
+        ///
+        /// - Changes the HW's global state.
+        unsafe fn enable_mmu_and_caching(
+            &self,
+            phys_tables_base_addr: Address<Physical>,
+        ) -> Result<(), MMUEnableError>;
+
+        /// Returns true if the MMU is enabled, false otherwise.
+        fn is_enabled(&self) -> bool;
+    }
+}
+
+/// Describes the characteristics of a translation granule.
+pub struct TranslationGranule<const GRANULE_SIZE: usize>;
+
+/// Describes properties of an address space.
+pub struct AddressSpace<const AS_SIZE: usize>;
+
+/// Intended to be implemented for [`AddressSpace`].
+pub trait AssociatedTranslationTable {
+    /// A translation table whose address range is:
+    ///
+    /// [u64::MAX, (u64::MAX - AS_SIZE) + 1]
+    type TableStartFromTop;
+
+    /// A translation table whose address range is:
+    ///
+    /// [AS_SIZE - 1, 0]
+    type TableStartFromBottom;
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+use interface::MMU;
+use synchronization::interface::ReadWriteEx;
+use translation_table::interface::TranslationTable;
+
+/// Query the BSP for the reserved virtual addresses for MMIO remapping and initialize the kernel's
+/// MMIO VA allocator with it.
+fn kernel_init_mmio_va_allocator() {
+    let region = bsp::memory::mmu::virt_mmio_remap_region();
+
+    alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.initialize(region));
+}
+
+/// Map a region in the kernel's translation tables.
+///
+/// No input checks done, input is passed through to the architectural implementation.
+///
+/// # Safety
+///
+/// - See `map_at()`.
+/// - Does not prevent aliasing.
+unsafe fn kernel_map_at_unchecked(
+    name: &'static str,
+    virt_region: &MemoryRegion<Virtual>,
+    phys_region: &MemoryRegion<Physical>,
+    attr: &AttributeFields,
+) -> Result<(), &'static str> {
+    bsp::memory::mmu::kernel_translation_tables()
+        .write(|tables| tables.map_at(virt_region, phys_region, attr))?;
+
+    kernel_add_mapping_record(name, virt_region, phys_region, attr);
+
+    Ok(())
+}
+
+/// Try to translate a kernel virtual address to a physical address.
+///
+/// Will only succeed if there exists a valid mapping for the input address.
+fn try_kernel_virt_addr_to_phys_addr(
+    virt_addr: Address<Virtual>,
+) -> Result<Address<Physical>, &'static str> {
+    bsp::memory::mmu::kernel_translation_tables()
+        .read(|tables| tables.try_virt_addr_to_phys_addr(virt_addr))
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl fmt::Display for MMUEnableError {
+    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+        match self {
+            MMUEnableError::AlreadyEnabled => write!(f, "MMU is already enabled"),
+            MMUEnableError::Other(x) => write!(f, "{}", x),
+        }
+    }
+}
+
+impl<const GRANULE_SIZE: usize> TranslationGranule<GRANULE_SIZE> {
+    /// The granule's size.
+    pub const SIZE: usize = Self::size_checked();
+
+    /// The granule's mask.
+    pub const MASK: usize = Self::SIZE - 1;
+
+    /// The granule's shift, aka log2(size).
+    pub const SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
+
+    const fn size_checked() -> usize {
+        assert!(GRANULE_SIZE.is_power_of_two());
+
+        GRANULE_SIZE
+    }
+}
+
+impl<const AS_SIZE: usize> AddressSpace<AS_SIZE> {
+    /// The address space size.
+    pub const SIZE: usize = Self::size_checked();
+
+    /// The address space shift, aka log2(size).
+    pub const SIZE_SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
+
+    const fn size_checked() -> usize {
+        assert!(AS_SIZE.is_power_of_two());
+
+        // Check for architectural restrictions as well.
+        Self::arch_address_space_size_sanity_checks();
+
+        AS_SIZE
+    }
+}
+
+/// Add an entry to the mapping info record.
+pub fn kernel_add_mapping_record(
+    name: &'static str,
+    virt_region: &MemoryRegion<Virtual>,
+    phys_region: &MemoryRegion<Physical>,
+    attr: &AttributeFields,
+) {
+    if let Err(x) = mapping_record::kernel_add(name, virt_region, phys_region, attr) {
+        warn!("{}", x);
+    }
+}
+
+/// MMIO remapping in the kernel translation tables.
+///
+/// Typically used by device drivers.
+///
+/// # Safety
+///
+/// - Same as `kernel_map_at_unchecked()`, minus the aliasing part.
+pub unsafe fn kernel_map_mmio(
+    name: &'static str,
+    mmio_descriptor: &MMIODescriptor,
+) -> Result<Address<Virtual>, &'static str> {
+    let phys_region = MemoryRegion::from(*mmio_descriptor);
+    let offset_into_start_page = mmio_descriptor.start_addr().offset_into_page();
+
+    // Check if an identical region has been mapped for another driver. If so, reuse it.
+    let virt_addr = if let Some(addr) =
+        mapping_record::kernel_find_and_insert_mmio_duplicate(mmio_descriptor, name)
+    {
+        addr
+    // Otherwise, allocate a new region and map it.
+    } else {
+        let num_pages = match NonZeroUsize::new(phys_region.num_pages()) {
+            None => return Err("Requested 0 pages"),
+            Some(x) => x,
+        };
+
+        let virt_region =
+            alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.alloc(num_pages))?;
+
+        kernel_map_at_unchecked(
+            name,
+            &virt_region,
+            &phys_region,
+            &AttributeFields {
+                mem_attributes: MemAttributes::Device,
+                acc_perms: AccessPermissions::ReadWrite,
+                execute_never: true,
+            },
+        )?;
+
+        virt_region.start_addr()
+    };
+
+    Ok(virt_addr + offset_into_start_page)
+}
+
+/// Try to translate a kernel virtual page address to a physical page address.
+///
+/// Will only succeed if there exists a valid mapping for the input page.
+pub fn try_kernel_virt_page_addr_to_phys_page_addr(
+    virt_page_addr: PageAddress<Virtual>,
+) -> Result<PageAddress<Physical>, &'static str> {
+    bsp::memory::mmu::kernel_translation_tables()
+        .read(|tables| tables.try_virt_page_addr_to_phys_page_addr(virt_page_addr))
+}
+
+/// Try to get the attributes of a kernel page.
+///
+/// Will only succeed if there exists a valid mapping for the input page.
+pub fn try_kernel_page_attributes(
+    virt_page_addr: PageAddress<Virtual>,
+) -> Result<AttributeFields, &'static str> {
+    bsp::memory::mmu::kernel_translation_tables()
+        .read(|tables| tables.try_page_attributes(virt_page_addr))
+}
+
+/// Enable the MMU and data + instruction caching.
+///
+/// # Safety
+///
+/// - Crucial function during kernel init. Changes the the complete memory view of the processor.
+#[inline(always)]
+pub unsafe fn enable_mmu_and_caching(
+    phys_tables_base_addr: Address<Physical>,
+) -> Result<(), MMUEnableError> {
+    arch_mmu::mmu().enable_mmu_and_caching(phys_tables_base_addr)
+}
+
+/// Finish initialization of the MMU subsystem.
+pub fn post_enable_init() {
+    kernel_init_mmio_va_allocator();
+}
+
+/// Human-readable print of all recorded kernel mappings.
+pub fn kernel_print_mappings() {
+    mapping_record::kernel_print()
+}
diff --git a/18_backtrace/kernel/src/memory/mmu/alloc.rs b/18_backtrace/kernel/src/memory/mmu/alloc.rs
new file mode 100644
index 000000000..aadb72ef2
--- /dev/null
+++ b/18_backtrace/kernel/src/memory/mmu/alloc.rs
@@ -0,0 +1,70 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Allocation.
+
+use super::MemoryRegion;
+use crate::{
+    memory::{AddressType, Virtual},
+    synchronization::IRQSafeNullLock,
+    warn,
+};
+use core::num::NonZeroUsize;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// A page allocator that can be lazyily initialized.
+pub struct PageAllocator<ATYPE: AddressType> {
+    pool: Option<MemoryRegion<ATYPE>>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static KERNEL_MMIO_VA_ALLOCATOR: IRQSafeNullLock<PageAllocator<Virtual>> =
+    IRQSafeNullLock::new(PageAllocator::new());
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the kernel's MMIO virtual address allocator.
+pub fn kernel_mmio_va_allocator() -> &'static IRQSafeNullLock<PageAllocator<Virtual>> {
+    &KERNEL_MMIO_VA_ALLOCATOR
+}
+
+impl<ATYPE: AddressType> PageAllocator<ATYPE> {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self { pool: None }
+    }
+
+    /// Initialize the allocator.
+    pub fn initialize(&mut self, pool: MemoryRegion<ATYPE>) {
+        if self.pool.is_some() {
+            warn!("Already initialized");
+            return;
+        }
+
+        self.pool = Some(pool);
+    }
+
+    /// Allocate a number of pages.
+    pub fn alloc(
+        &mut self,
+        num_requested_pages: NonZeroUsize,
+    ) -> Result<MemoryRegion<ATYPE>, &'static str> {
+        if self.pool.is_none() {
+            return Err("Allocator not initialized");
+        }
+
+        self.pool
+            .as_mut()
+            .unwrap()
+            .take_first_n_pages(num_requested_pages)
+    }
+}
diff --git a/18_backtrace/kernel/src/memory/mmu/mapping_record.rs b/18_backtrace/kernel/src/memory/mmu/mapping_record.rs
new file mode 100644
index 000000000..d171c6e67
--- /dev/null
+++ b/18_backtrace/kernel/src/memory/mmu/mapping_record.rs
@@ -0,0 +1,233 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! A record of mapped pages.
+
+use super::{
+    AccessPermissions, Address, AttributeFields, MMIODescriptor, MemAttributes, MemoryRegion,
+    Physical, Virtual,
+};
+use crate::{bsp, info, synchronization, synchronization::InitStateLock, warn};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Type describing a virtual memory mapping.
+#[allow(missing_docs)]
+#[derive(Copy, Clone)]
+struct MappingRecordEntry {
+    pub users: [Option<&'static str>; 5],
+    pub phys_start_addr: Address<Physical>,
+    pub virt_start_addr: Address<Virtual>,
+    pub num_pages: usize,
+    pub attribute_fields: AttributeFields,
+}
+
+struct MappingRecord {
+    inner: [Option<MappingRecordEntry>; 12],
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static KERNEL_MAPPING_RECORD: InitStateLock<MappingRecord> =
+    InitStateLock::new(MappingRecord::new());
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl MappingRecordEntry {
+    pub fn new(
+        name: &'static str,
+        virt_region: &MemoryRegion<Virtual>,
+        phys_region: &MemoryRegion<Physical>,
+        attr: &AttributeFields,
+    ) -> Self {
+        Self {
+            users: [Some(name), None, None, None, None],
+            phys_start_addr: phys_region.start_addr(),
+            virt_start_addr: virt_region.start_addr(),
+            num_pages: phys_region.num_pages(),
+            attribute_fields: *attr,
+        }
+    }
+
+    fn find_next_free_user(&mut self) -> Result<&mut Option<&'static str>, &'static str> {
+        if let Some(x) = self.users.iter_mut().find(|x| x.is_none()) {
+            return Ok(x);
+        };
+
+        Err("Storage for user info exhausted")
+    }
+
+    pub fn add_user(&mut self, user: &'static str) -> Result<(), &'static str> {
+        let x = self.find_next_free_user()?;
+        *x = Some(user);
+        Ok(())
+    }
+}
+
+impl MappingRecord {
+    pub const fn new() -> Self {
+        Self { inner: [None; 12] }
+    }
+
+    fn find_next_free(&mut self) -> Result<&mut Option<MappingRecordEntry>, &'static str> {
+        if let Some(x) = self.inner.iter_mut().find(|x| x.is_none()) {
+            return Ok(x);
+        }
+
+        Err("Storage for mapping info exhausted")
+    }
+
+    fn find_duplicate(
+        &mut self,
+        phys_region: &MemoryRegion<Physical>,
+    ) -> Option<&mut MappingRecordEntry> {
+        self.inner
+            .iter_mut()
+            .filter(|x| x.is_some())
+            .map(|x| x.as_mut().unwrap())
+            .filter(|x| x.attribute_fields.mem_attributes == MemAttributes::Device)
+            .find(|x| {
+                if x.phys_start_addr != phys_region.start_addr() {
+                    return false;
+                }
+
+                if x.num_pages != phys_region.num_pages() {
+                    return false;
+                }
+
+                true
+            })
+    }
+
+    pub fn add(
+        &mut self,
+        name: &'static str,
+        virt_region: &MemoryRegion<Virtual>,
+        phys_region: &MemoryRegion<Physical>,
+        attr: &AttributeFields,
+    ) -> Result<(), &'static str> {
+        let x = self.find_next_free()?;
+
+        *x = Some(MappingRecordEntry::new(
+            name,
+            virt_region,
+            phys_region,
+            attr,
+        ));
+        Ok(())
+    }
+
+    pub fn print(&self) {
+        const KIB_RSHIFT: u32 = 10; // log2(1024).
+        const MIB_RSHIFT: u32 = 20; // log2(1024 * 1024).
+
+        info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
+        info!(
+            "      {:^44}     {:^30}   {:^7}   {:^9}   {:^35}",
+            "Virtual", "Physical", "Size", "Attr", "Entity"
+        );
+        info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
+
+        for i in self.inner.iter().flatten() {
+            let size = i.num_pages * bsp::memory::mmu::KernelGranule::SIZE;
+            let virt_start = i.virt_start_addr;
+            let virt_end_inclusive = virt_start + (size - 1);
+            let phys_start = i.phys_start_addr;
+            let phys_end_inclusive = phys_start + (size - 1);
+
+            let (size, unit) = if (size >> MIB_RSHIFT) > 0 {
+                (size >> MIB_RSHIFT, "MiB")
+            } else if (size >> KIB_RSHIFT) > 0 {
+                (size >> KIB_RSHIFT, "KiB")
+            } else {
+                (size, "Byte")
+            };
+
+            let attr = match i.attribute_fields.mem_attributes {
+                MemAttributes::CacheableDRAM => "C",
+                MemAttributes::Device => "Dev",
+            };
+
+            let acc_p = match i.attribute_fields.acc_perms {
+                AccessPermissions::ReadOnly => "RO",
+                AccessPermissions::ReadWrite => "RW",
+            };
+
+            let xn = if i.attribute_fields.execute_never {
+                "XN"
+            } else {
+                "X"
+            };
+
+            info!(
+                "      {}..{} --> {}..{} | \
+                        {: >3} {} | {: <3} {} {: <2} | {}",
+                virt_start,
+                virt_end_inclusive,
+                phys_start,
+                phys_end_inclusive,
+                size,
+                unit,
+                attr,
+                acc_p,
+                xn,
+                i.users[0].unwrap()
+            );
+
+            for k in i.users[1..].iter() {
+                if let Some(additional_user) = *k {
+                    info!(
+                        "                                                                                                            | {}",
+                        additional_user
+                    );
+                }
+            }
+        }
+
+        info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+use synchronization::interface::ReadWriteEx;
+
+/// Add an entry to the mapping info record.
+pub fn kernel_add(
+    name: &'static str,
+    virt_region: &MemoryRegion<Virtual>,
+    phys_region: &MemoryRegion<Physical>,
+    attr: &AttributeFields,
+) -> Result<(), &'static str> {
+    KERNEL_MAPPING_RECORD.write(|mr| mr.add(name, virt_region, phys_region, attr))
+}
+
+pub fn kernel_find_and_insert_mmio_duplicate(
+    mmio_descriptor: &MMIODescriptor,
+    new_user: &'static str,
+) -> Option<Address<Virtual>> {
+    let phys_region: MemoryRegion<Physical> = (*mmio_descriptor).into();
+
+    KERNEL_MAPPING_RECORD.write(|mr| {
+        let dup = mr.find_duplicate(&phys_region)?;
+
+        if let Err(x) = dup.add_user(new_user) {
+            warn!("{}", x);
+        }
+
+        Some(dup.virt_start_addr)
+    })
+}
+
+/// Human-readable print of all recorded kernel mappings.
+pub fn kernel_print() {
+    KERNEL_MAPPING_RECORD.read(|mr| mr.print());
+}
diff --git a/18_backtrace/kernel/src/memory/mmu/translation_table.rs b/18_backtrace/kernel/src/memory/mmu/translation_table.rs
new file mode 100644
index 000000000..9d627f974
--- /dev/null
+++ b/18_backtrace/kernel/src/memory/mmu/translation_table.rs
@@ -0,0 +1,137 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Translation table.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../../_arch/aarch64/memory/mmu/translation_table.rs"]
+mod arch_translation_table;
+
+use super::{AttributeFields, MemoryRegion};
+use crate::memory::{Address, Physical, Virtual};
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+#[cfg(target_arch = "aarch64")]
+pub use arch_translation_table::FixedSizeTranslationTable;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Translation table interfaces.
+pub mod interface {
+    use crate::memory::mmu::PageAddress;
+
+    use super::*;
+
+    /// Translation table operations.
+    pub trait TranslationTable {
+        /// Anything that needs to run before any of the other provided functions can be used.
+        ///
+        /// # Safety
+        ///
+        /// - Implementor must ensure that this function can run only once or is harmless if invoked
+        ///   multiple times.
+        fn init(&mut self) -> Result<(), &'static str>;
+
+        /// Map the given virtual memory region to the given physical memory region.
+        ///
+        /// # Safety
+        ///
+        /// - Using wrong attributes can cause multiple issues of different nature in the system.
+        /// - It is not required that the architectural implementation prevents aliasing. That is,
+        ///   mapping to the same physical memory using multiple virtual addresses, which would
+        ///   break Rust's ownership assumptions. This should be protected against in the kernel's
+        ///   generic MMU code.
+        unsafe fn map_at(
+            &mut self,
+            virt_region: &MemoryRegion<Virtual>,
+            phys_region: &MemoryRegion<Physical>,
+            attr: &AttributeFields,
+        ) -> Result<(), &'static str>;
+
+        /// Try to translate a virtual page address to a physical page address.
+        ///
+        /// Will only succeed if there exists a valid mapping for the input page.
+        fn try_virt_page_addr_to_phys_page_addr(
+            &self,
+            virt_page_addr: PageAddress<Virtual>,
+        ) -> Result<PageAddress<Physical>, &'static str>;
+
+        /// Try to get the attributes of a page.
+        ///
+        /// Will only succeed if there exists a valid mapping for the input page.
+        fn try_page_attributes(
+            &self,
+            virt_page_addr: PageAddress<Virtual>,
+        ) -> Result<AttributeFields, &'static str>;
+
+        /// Try to translate a virtual address to a physical address.
+        ///
+        /// Will only succeed if there exists a valid mapping for the input address.
+        fn try_virt_addr_to_phys_addr(
+            &self,
+            virt_addr: Address<Virtual>,
+        ) -> Result<Address<Physical>, &'static str>;
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use crate::memory::mmu::{AccessPermissions, MemAttributes, PageAddress};
+    use arch_translation_table::MinSizeTranslationTable;
+    use interface::TranslationTable;
+    use test_macros::kernel_test;
+
+    /// Sanity checks for the TranslationTable implementation.
+    #[kernel_test]
+    fn translationtable_implementation_sanity() {
+        // This will occupy a lot of space on the stack.
+        let mut tables = MinSizeTranslationTable::new_for_runtime();
+
+        assert!(tables.init().is_ok());
+
+        let virt_end_exclusive_page_addr: PageAddress<Virtual> = PageAddress::MAX;
+        let virt_start_page_addr: PageAddress<Virtual> =
+            virt_end_exclusive_page_addr.checked_offset(-5).unwrap();
+
+        let phys_start_page_addr: PageAddress<Physical> = PageAddress::from(0);
+        let phys_end_exclusive_page_addr: PageAddress<Physical> =
+            phys_start_page_addr.checked_offset(5).unwrap();
+
+        let virt_region = MemoryRegion::new(virt_start_page_addr, virt_end_exclusive_page_addr);
+        let phys_region = MemoryRegion::new(phys_start_page_addr, phys_end_exclusive_page_addr);
+
+        let attr = AttributeFields {
+            mem_attributes: MemAttributes::CacheableDRAM,
+            acc_perms: AccessPermissions::ReadWrite,
+            execute_never: true,
+        };
+
+        unsafe { assert_eq!(tables.map_at(&virt_region, &phys_region, &attr), Ok(())) };
+
+        assert_eq!(
+            tables.try_virt_page_addr_to_phys_page_addr(virt_start_page_addr),
+            Ok(phys_start_page_addr)
+        );
+
+        assert_eq!(
+            tables.try_page_attributes(virt_start_page_addr.checked_offset(-1).unwrap()),
+            Err("Page marked invalid")
+        );
+
+        assert_eq!(tables.try_page_attributes(virt_start_page_addr), Ok(attr));
+
+        let virt_addr = virt_start_page_addr.into_inner() + 0x100;
+        let phys_addr = phys_start_page_addr.into_inner() + 0x100;
+        assert_eq!(tables.try_virt_addr_to_phys_addr(virt_addr), Ok(phys_addr));
+    }
+}
diff --git a/18_backtrace/kernel/src/memory/mmu/types.rs b/18_backtrace/kernel/src/memory/mmu/types.rs
new file mode 100644
index 000000000..85c852b34
--- /dev/null
+++ b/18_backtrace/kernel/src/memory/mmu/types.rs
@@ -0,0 +1,378 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Memory Management Unit types.
+
+use crate::{
+    bsp, common,
+    memory::{Address, AddressType, Physical},
+};
+use core::{convert::From, iter::Step, num::NonZeroUsize, ops::Range};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// A wrapper type around [Address] that ensures page alignment.
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+pub struct PageAddress<ATYPE: AddressType> {
+    inner: Address<ATYPE>,
+}
+
+/// A type that describes a region of memory in quantities of pages.
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+pub struct MemoryRegion<ATYPE: AddressType> {
+    start: PageAddress<ATYPE>,
+    end_exclusive: PageAddress<ATYPE>,
+}
+
+/// Architecture agnostic memory attributes.
+#[allow(missing_docs)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+pub enum MemAttributes {
+    CacheableDRAM,
+    Device,
+}
+
+/// Architecture agnostic access permissions.
+#[allow(missing_docs)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+pub enum AccessPermissions {
+    ReadOnly,
+    ReadWrite,
+}
+
+/// Collection of memory attributes.
+#[allow(missing_docs)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+pub struct AttributeFields {
+    pub mem_attributes: MemAttributes,
+    pub acc_perms: AccessPermissions,
+    pub execute_never: bool,
+}
+
+/// An MMIO descriptor for use in device drivers.
+#[derive(Copy, Clone)]
+pub struct MMIODescriptor {
+    start_addr: Address<Physical>,
+    end_addr_exclusive: Address<Physical>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+// PageAddress
+//------------------------------------------------------------------------------
+impl<ATYPE: AddressType> PageAddress<ATYPE> {
+    /// The largest value that can be represented by this type.
+    pub const MAX: Self = PageAddress {
+        inner: Address::new(usize::MAX).align_down_page(),
+    };
+
+    /// Unwraps the value.
+    pub fn into_inner(self) -> Address<ATYPE> {
+        self.inner
+    }
+
+    /// Calculates the offset from the page address.
+    ///
+    /// `count` is in units of [PageAddress]. For example, a count of 2 means `result = self + 2 *
+    /// page_size`.
+    pub fn checked_offset(self, count: isize) -> Option<Self> {
+        if count == 0 {
+            return Some(self);
+        }
+
+        let delta = count
+            .unsigned_abs()
+            .checked_mul(bsp::memory::mmu::KernelGranule::SIZE)?;
+        let result = if count.is_positive() {
+            self.inner.as_usize().checked_add(delta)?
+        } else {
+            self.inner.as_usize().checked_sub(delta)?
+        };
+
+        Some(Self {
+            inner: Address::new(result),
+        })
+    }
+}
+
+impl<ATYPE: AddressType> From<usize> for PageAddress<ATYPE> {
+    fn from(addr: usize) -> Self {
+        assert!(
+            common::is_aligned(addr, bsp::memory::mmu::KernelGranule::SIZE),
+            "Input usize not page aligned"
+        );
+
+        Self {
+            inner: Address::new(addr),
+        }
+    }
+}
+
+impl<ATYPE: AddressType> From<Address<ATYPE>> for PageAddress<ATYPE> {
+    fn from(addr: Address<ATYPE>) -> Self {
+        assert!(addr.is_page_aligned(), "Input Address not page aligned");
+
+        Self { inner: addr }
+    }
+}
+
+impl<ATYPE: AddressType> Step for PageAddress<ATYPE> {
+    fn steps_between(start: &Self, end: &Self) -> Option<usize> {
+        if start > end {
+            return None;
+        }
+
+        // Since start <= end, do unchecked arithmetic.
+        Some(
+            (end.inner.as_usize() - start.inner.as_usize())
+                >> bsp::memory::mmu::KernelGranule::SHIFT,
+        )
+    }
+
+    fn forward_checked(start: Self, count: usize) -> Option<Self> {
+        start.checked_offset(count as isize)
+    }
+
+    fn backward_checked(start: Self, count: usize) -> Option<Self> {
+        start.checked_offset(-(count as isize))
+    }
+}
+
+//------------------------------------------------------------------------------
+// MemoryRegion
+//------------------------------------------------------------------------------
+impl<ATYPE: AddressType> MemoryRegion<ATYPE> {
+    /// Create an instance.
+    pub fn new(start: PageAddress<ATYPE>, end_exclusive: PageAddress<ATYPE>) -> Self {
+        assert!(start <= end_exclusive);
+
+        Self {
+            start,
+            end_exclusive,
+        }
+    }
+
+    fn as_range(&self) -> Range<PageAddress<ATYPE>> {
+        self.into_iter()
+    }
+
+    /// Returns the start page address.
+    pub fn start_page_addr(&self) -> PageAddress<ATYPE> {
+        self.start
+    }
+
+    /// Returns the start address.
+    pub fn start_addr(&self) -> Address<ATYPE> {
+        self.start.into_inner()
+    }
+
+    /// Returns the exclusive end page address.
+    pub fn end_exclusive_page_addr(&self) -> PageAddress<ATYPE> {
+        self.end_exclusive
+    }
+
+    /// Returns the exclusive end page address.
+    pub fn end_inclusive_page_addr(&self) -> PageAddress<ATYPE> {
+        self.end_exclusive.checked_offset(-1).unwrap()
+    }
+
+    /// Checks if self contains an address.
+    pub fn contains(&self, addr: Address<ATYPE>) -> bool {
+        let page_addr = PageAddress::from(addr.align_down_page());
+        self.as_range().contains(&page_addr)
+    }
+
+    /// Checks if there is an overlap with another memory region.
+    pub fn overlaps(&self, other_region: &Self) -> bool {
+        let self_range = self.as_range();
+
+        self_range.contains(&other_region.start_page_addr())
+            || self_range.contains(&other_region.end_inclusive_page_addr())
+    }
+
+    /// Returns the number of pages contained in this region.
+    pub fn num_pages(&self) -> usize {
+        PageAddress::steps_between(&self.start, &self.end_exclusive).unwrap()
+    }
+
+    /// Returns the size in bytes of this region.
+    pub fn size(&self) -> usize {
+        // Invariant: start <= end_exclusive, so do unchecked arithmetic.
+        let end_exclusive = self.end_exclusive.into_inner().as_usize();
+        let start = self.start.into_inner().as_usize();
+
+        end_exclusive - start
+    }
+
+    /// Splits the MemoryRegion like:
+    ///
+    /// --------------------------------------------------------------------------------
+    /// |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |
+    /// --------------------------------------------------------------------------------
+    ///   ^                               ^                                       ^
+    ///   |                               |                                       |
+    ///   left_start     left_end_exclusive                                       |
+    ///                                                                           |
+    ///                                   ^                                       |
+    ///                                   |                                       |
+    ///                                   right_start           right_end_exclusive
+    ///
+    /// Left region is returned to the caller. Right region is the new region for this struct.
+    pub fn take_first_n_pages(&mut self, num_pages: NonZeroUsize) -> Result<Self, &'static str> {
+        let count: usize = num_pages.into();
+
+        let left_end_exclusive = self.start.checked_offset(count as isize);
+        let left_end_exclusive = match left_end_exclusive {
+            None => return Err("Overflow while calculating left_end_exclusive"),
+            Some(x) => x,
+        };
+
+        if left_end_exclusive > self.end_exclusive {
+            return Err("Not enough free pages");
+        }
+
+        let allocation = Self {
+            start: self.start,
+            end_exclusive: left_end_exclusive,
+        };
+        self.start = left_end_exclusive;
+
+        Ok(allocation)
+    }
+}
+
+impl<ATYPE: AddressType> IntoIterator for MemoryRegion<ATYPE> {
+    type Item = PageAddress<ATYPE>;
+    type IntoIter = Range<Self::Item>;
+
+    fn into_iter(self) -> Self::IntoIter {
+        Range {
+            start: self.start,
+            end: self.end_exclusive,
+        }
+    }
+}
+
+impl From<MMIODescriptor> for MemoryRegion<Physical> {
+    fn from(desc: MMIODescriptor) -> Self {
+        let start = PageAddress::from(desc.start_addr.align_down_page());
+        let end_exclusive = PageAddress::from(desc.end_addr_exclusive().align_up_page());
+
+        Self {
+            start,
+            end_exclusive,
+        }
+    }
+}
+
+//------------------------------------------------------------------------------
+// MMIODescriptor
+//------------------------------------------------------------------------------
+
+impl MMIODescriptor {
+    /// Create an instance.
+    pub const fn new(start_addr: Address<Physical>, size: usize) -> Self {
+        assert!(size > 0);
+        let end_addr_exclusive = Address::new(start_addr.as_usize() + size);
+
+        Self {
+            start_addr,
+            end_addr_exclusive,
+        }
+    }
+
+    /// Return the start address.
+    pub const fn start_addr(&self) -> Address<Physical> {
+        self.start_addr
+    }
+
+    /// Return the exclusive end address.
+    pub fn end_addr_exclusive(&self) -> Address<Physical> {
+        self.end_addr_exclusive
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use crate::memory::Virtual;
+    use test_macros::kernel_test;
+
+    /// Sanity of [PageAddress] methods.
+    #[kernel_test]
+    fn pageaddress_type_method_sanity() {
+        let page_addr: PageAddress<Virtual> =
+            PageAddress::from(bsp::memory::mmu::KernelGranule::SIZE * 2);
+
+        assert_eq!(
+            page_addr.checked_offset(-2),
+            Some(PageAddress::<Virtual>::from(0))
+        );
+
+        assert_eq!(
+            page_addr.checked_offset(2),
+            Some(PageAddress::<Virtual>::from(
+                bsp::memory::mmu::KernelGranule::SIZE * 4
+            ))
+        );
+
+        assert_eq!(
+            PageAddress::<Virtual>::from(0).checked_offset(0),
+            Some(PageAddress::<Virtual>::from(0))
+        );
+        assert_eq!(PageAddress::<Virtual>::from(0).checked_offset(-1), None);
+
+        let max_page_addr = Address::<Virtual>::new(usize::MAX).align_down_page();
+        assert_eq!(
+            PageAddress::<Virtual>::from(max_page_addr).checked_offset(1),
+            None
+        );
+
+        let zero = PageAddress::<Virtual>::from(0);
+        let three = PageAddress::<Virtual>::from(bsp::memory::mmu::KernelGranule::SIZE * 3);
+        assert_eq!(PageAddress::steps_between(&zero, &three), Some(3));
+    }
+
+    /// Sanity of [MemoryRegion] methods.
+    #[kernel_test]
+    fn memoryregion_type_method_sanity() {
+        let zero = PageAddress::<Virtual>::from(0);
+        let zero_region = MemoryRegion::new(zero, zero);
+        assert_eq!(zero_region.num_pages(), 0);
+        assert_eq!(zero_region.size(), 0);
+
+        let one = PageAddress::<Virtual>::from(bsp::memory::mmu::KernelGranule::SIZE);
+        let one_region = MemoryRegion::new(zero, one);
+        assert_eq!(one_region.num_pages(), 1);
+        assert_eq!(one_region.size(), bsp::memory::mmu::KernelGranule::SIZE);
+
+        let three = PageAddress::<Virtual>::from(bsp::memory::mmu::KernelGranule::SIZE * 3);
+        let mut three_region = MemoryRegion::new(zero, three);
+        assert!(three_region.contains(zero.into_inner()));
+        assert!(!three_region.contains(three.into_inner()));
+        assert!(three_region.overlaps(&one_region));
+
+        let allocation = three_region
+            .take_first_n_pages(NonZeroUsize::new(2).unwrap())
+            .unwrap();
+        assert_eq!(allocation.num_pages(), 2);
+        assert_eq!(three_region.num_pages(), 1);
+
+        for (i, alloc) in allocation.into_iter().enumerate() {
+            assert_eq!(
+                alloc.into_inner().as_usize(),
+                i * bsp::memory::mmu::KernelGranule::SIZE
+            );
+        }
+    }
+}
diff --git a/18_backtrace/kernel/src/panic_wait.rs b/18_backtrace/kernel/src/panic_wait.rs
new file mode 100644
index 000000000..1b67c5331
--- /dev/null
+++ b/18_backtrace/kernel/src/panic_wait.rs
@@ -0,0 +1,106 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! A panic handler that infinitely waits.
+
+use crate::{backtrace, bsp, cpu, exception};
+use core::{fmt, panic::PanicInfo};
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+fn _panic_print(args: fmt::Arguments) {
+    use fmt::Write;
+
+    unsafe { bsp::console::panic_console_out().write_fmt(args).unwrap() };
+}
+
+/// The point of exit for `libkernel`.
+///
+/// It is linked weakly, so that the integration tests can overload its standard behavior.
+#[linkage = "weak"]
+#[no_mangle]
+fn _panic_exit() -> ! {
+    #[cfg(not(feature = "test_build"))]
+    {
+        cpu::wait_forever()
+    }
+
+    #[cfg(feature = "test_build")]
+    {
+        cpu::qemu_exit_failure()
+    }
+}
+
+/// Prints with a newline - only use from the panic handler.
+///
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
+#[macro_export]
+macro_rules! panic_println {
+    ($($arg:tt)*) => ({
+        _panic_print(format_args_nl!($($arg)*));
+    })
+}
+
+/// Stop immediately if called a second time.
+///
+/// # Note
+///
+/// Using atomics here relieves us from needing to use `unsafe` for the static variable.
+///
+/// On `AArch64`, which is the only implemented architecture at the time of writing this,
+/// [`AtomicBool::load`] and [`AtomicBool::store`] are lowered to ordinary load and store
+/// instructions. They are therefore safe to use even with MMU + caching deactivated.
+///
+/// [`AtomicBool::load`]: core::sync::atomic::AtomicBool::load
+/// [`AtomicBool::store`]: core::sync::atomic::AtomicBool::store
+fn panic_prevent_reenter() {
+    use core::sync::atomic::{AtomicBool, Ordering};
+
+    #[cfg(not(target_arch = "aarch64"))]
+    compile_error!("Add the target_arch to above's check if the following code is safe to use");
+
+    static PANIC_IN_PROGRESS: AtomicBool = AtomicBool::new(false);
+
+    if !PANIC_IN_PROGRESS.load(Ordering::Relaxed) {
+        PANIC_IN_PROGRESS.store(true, Ordering::Relaxed);
+
+        return;
+    }
+
+    _panic_exit()
+}
+
+#[panic_handler]
+fn panic(info: &PanicInfo) -> ! {
+    use crate::time::interface::TimeManager;
+
+    unsafe { exception::asynchronous::local_irq_mask() };
+
+    // Protect against panic infinite loops if any of the following code panics itself.
+    panic_prevent_reenter();
+
+    let timestamp = crate::time::time_manager().uptime();
+    let (location, line, column) = match info.location() {
+        Some(loc) => (loc.file(), loc.line(), loc.column()),
+        _ => ("???", 0, 0),
+    };
+
+    panic_println!(
+        "[  {:>3}.{:06}] Kernel panic!\n\n\
+        Panic location:\n      File '{}', line {}, column {}\n\n\
+        {}\n\n\
+        {}",
+        timestamp.as_secs(),
+        timestamp.subsec_micros(),
+        location,
+        line,
+        column,
+        info.message().unwrap_or(&format_args!("")),
+        backtrace::Backtrace
+    );
+
+    _panic_exit()
+}
diff --git a/18_backtrace/kernel/src/print.rs b/18_backtrace/kernel/src/print.rs
new file mode 100644
index 000000000..9ec13a286
--- /dev/null
+++ b/18_backtrace/kernel/src/print.rs
@@ -0,0 +1,94 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Printing.
+
+use crate::{bsp, console};
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+#[doc(hidden)]
+pub fn _print(args: fmt::Arguments) {
+    use console::interface::Write;
+
+    bsp::console::console().write_fmt(args).unwrap();
+}
+
+/// Prints without a newline.
+///
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
+#[macro_export]
+macro_rules! print {
+    ($($arg:tt)*) => ($crate::print::_print(format_args!($($arg)*)));
+}
+
+/// Prints with a newline.
+///
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
+#[macro_export]
+macro_rules! println {
+    () => ($crate::print!("\n"));
+    ($($arg:tt)*) => ({
+        $crate::print::_print(format_args_nl!($($arg)*));
+    })
+}
+
+/// Prints an info, with a newline.
+#[macro_export]
+macro_rules! info {
+    ($string:expr) => ({
+        use $crate::time::interface::TimeManager;
+
+        let timestamp = $crate::time::time_manager().uptime();
+
+        $crate::print::_print(format_args_nl!(
+            concat!("[  {:>3}.{:06}] ", $string),
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+        ));
+    });
+    ($format_string:expr, $($arg:tt)*) => ({
+        use $crate::time::interface::TimeManager;
+
+        let timestamp = $crate::time::time_manager().uptime();
+
+        $crate::print::_print(format_args_nl!(
+            concat!("[  {:>3}.{:06}] ", $format_string),
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+            $($arg)*
+        ));
+    })
+}
+
+/// Prints a warning, with a newline.
+#[macro_export]
+macro_rules! warn {
+    ($string:expr) => ({
+        use $crate::time::interface::TimeManager;
+
+        let timestamp = $crate::time::time_manager().uptime();
+
+        $crate::print::_print(format_args_nl!(
+            concat!("[W {:>3}.{:06}] ", $string),
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+        ));
+    });
+    ($format_string:expr, $($arg:tt)*) => ({
+        use $crate::time::interface::TimeManager;
+
+        let timestamp = $crate::time::time_manager().uptime();
+
+        $crate::print::_print(format_args_nl!(
+            concat!("[W {:>3}.{:06}] ", $format_string),
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+            $($arg)*
+        ));
+    })
+}
diff --git a/18_backtrace/kernel/src/state.rs b/18_backtrace/kernel/src/state.rs
new file mode 100644
index 000000000..0af3688c2
--- /dev/null
+++ b/18_backtrace/kernel/src/state.rs
@@ -0,0 +1,92 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! State information about the kernel itself.
+
+use core::sync::atomic::{AtomicU8, Ordering};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Different stages in the kernel execution.
+#[derive(Copy, Clone, Eq, PartialEq)]
+enum State {
+    /// The kernel starts booting in this state.
+    Init,
+
+    /// The kernel transitions to this state when jumping to `kernel_main()` (at the end of
+    /// `kernel_init()`, after all init calls are done).
+    SingleCoreMain,
+
+    /// The kernel transitions to this state when it boots the secondary cores, aka switches
+    /// exectution mode to symmetric multiprocessing (SMP).
+    MultiCoreMain,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Maintains the kernel state and state transitions.
+pub struct StateManager(AtomicU8);
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static STATE_MANAGER: StateManager = StateManager::new();
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the global StateManager.
+pub fn state_manager() -> &'static StateManager {
+    &STATE_MANAGER
+}
+
+impl StateManager {
+    const INIT: u8 = 0;
+    const SINGLE_CORE_MAIN: u8 = 1;
+    const MULTI_CORE_MAIN: u8 = 2;
+
+    /// Create a new instance.
+    pub const fn new() -> Self {
+        Self(AtomicU8::new(Self::INIT))
+    }
+
+    /// Return the current state.
+    fn state(&self) -> State {
+        let state = self.0.load(Ordering::Acquire);
+
+        match state {
+            Self::INIT => State::Init,
+            Self::SINGLE_CORE_MAIN => State::SingleCoreMain,
+            Self::MULTI_CORE_MAIN => State::MultiCoreMain,
+            _ => panic!("Invalid KERNEL_STATE"),
+        }
+    }
+
+    /// Return if the kernel is init state.
+    pub fn is_init(&self) -> bool {
+        self.state() == State::Init
+    }
+
+    /// Transition from Init to SingleCoreMain.
+    pub fn transition_to_single_core_main(&self) {
+        if self
+            .0
+            .compare_exchange(
+                Self::INIT,
+                Self::SINGLE_CORE_MAIN,
+                Ordering::Acquire,
+                Ordering::Relaxed,
+            )
+            .is_err()
+        {
+            panic!("transition_to_single_core_main() called while state != Init");
+        }
+    }
+}
diff --git a/18_backtrace/kernel/src/symbols.rs b/18_backtrace/kernel/src/symbols.rs
new file mode 100644
index 000000000..22001389f
--- /dev/null
+++ b/18_backtrace/kernel/src/symbols.rs
@@ -0,0 +1,87 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Debug symbol support.
+
+use crate::memory::{Address, Virtual};
+use core::{cell::UnsafeCell, slice};
+use debug_symbol_types::Symbol;
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+// Symbol from the linker script.
+extern "Rust" {
+    static __kernel_symbols_start: UnsafeCell<()>;
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+/// This will be patched to the correct value by the "kernel symbols tool" after linking. This given
+/// value here is just a (safe) dummy.
+#[no_mangle]
+static NUM_KERNEL_SYMBOLS: u64 = 0;
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+fn kernel_symbol_section_virt_start_addr() -> Address<Virtual> {
+    Address::new(unsafe { __kernel_symbols_start.get() as usize })
+}
+
+fn kernel_symbols_slice() -> &'static [Symbol] {
+    let ptr = kernel_symbol_section_virt_start_addr().as_usize() as *const Symbol;
+
+    unsafe {
+        let num = core::ptr::read_volatile(&NUM_KERNEL_SYMBOLS as *const u64) as usize;
+        slice::from_raw_parts(ptr, num)
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Retrieve the symbol corresponding to a virtual address, if any.
+pub fn lookup_symbol(addr: Address<Virtual>) -> Option<&'static Symbol> {
+    for i in kernel_symbols_slice() {
+        if i.contains(addr.as_usize()) {
+            return Some(i);
+        }
+    }
+
+    None
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// Sanity of symbols module.
+    #[kernel_test]
+    fn symbols_sanity() {
+        let first_sym = lookup_symbol(Address::new(
+            crate::common::is_aligned as *const usize as usize,
+        ))
+        .unwrap()
+        .name();
+
+        assert_eq!(first_sym, "libkernel::common::is_aligned");
+
+        let second_sym = lookup_symbol(Address::new(crate::version as *const usize as usize))
+            .unwrap()
+            .name();
+
+        assert_eq!(second_sym, "libkernel::version");
+    }
+}
diff --git a/18_backtrace/kernel/src/synchronization.rs b/18_backtrace/kernel/src/synchronization.rs
new file mode 100644
index 000000000..4b4c4c3fb
--- /dev/null
+++ b/18_backtrace/kernel/src/synchronization.rs
@@ -0,0 +1,159 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Synchronization primitives.
+//!
+//! # Resources
+//!
+//!   - <https://doc.rust-lang.org/book/ch16-04-extensible-concurrency-sync-and-send.html>
+//!   - <https://stackoverflow.com/questions/59428096/understanding-the-send-trait>
+//!   - <https://doc.rust-lang.org/std/cell/index.html>
+
+use core::cell::UnsafeCell;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Synchronization interfaces.
+pub mod interface {
+
+    /// Any object implementing this trait guarantees exclusive access to the data wrapped within
+    /// the Mutex for the duration of the provided closure.
+    pub trait Mutex {
+        /// The type of the data that is wrapped by this mutex.
+        type Data;
+
+        /// Locks the mutex and grants the closure temporary mutable access to the wrapped data.
+        fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R;
+    }
+
+    /// A reader-writer exclusion type.
+    ///
+    /// The implementing object allows either a number of readers or at most one writer at any point
+    /// in time.
+    pub trait ReadWriteEx {
+        /// The type of encapsulated data.
+        type Data;
+
+        /// Grants temporary mutable access to the encapsulated data.
+        fn write<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R;
+
+        /// Grants temporary immutable access to the encapsulated data.
+        fn read<R>(&self, f: impl FnOnce(&Self::Data) -> R) -> R;
+    }
+}
+
+/// A pseudo-lock for teaching purposes.
+///
+/// In contrast to a real Mutex implementation, does not protect against concurrent access from
+/// other cores to the contained data. This part is preserved for later lessons.
+///
+/// The lock will only be used as long as it is safe to do so, i.e. as long as the kernel is
+/// executing on a single core.
+pub struct IRQSafeNullLock<T>
+where
+    T: ?Sized,
+{
+    data: UnsafeCell<T>,
+}
+
+/// A pseudo-lock that is RW during the single-core kernel init phase and RO afterwards.
+///
+/// Intended to encapsulate data that is populated during kernel init when no concurrency exists.
+pub struct InitStateLock<T>
+where
+    T: ?Sized,
+{
+    data: UnsafeCell<T>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+unsafe impl<T> Send for IRQSafeNullLock<T> where T: ?Sized + Send {}
+unsafe impl<T> Sync for IRQSafeNullLock<T> where T: ?Sized + Send {}
+
+impl<T> IRQSafeNullLock<T> {
+    /// Create an instance.
+    pub const fn new(data: T) -> Self {
+        Self {
+            data: UnsafeCell::new(data),
+        }
+    }
+}
+
+unsafe impl<T> Send for InitStateLock<T> where T: ?Sized + Send {}
+unsafe impl<T> Sync for InitStateLock<T> where T: ?Sized + Send {}
+
+impl<T> InitStateLock<T> {
+    /// Create an instance.
+    pub const fn new(data: T) -> Self {
+        Self {
+            data: UnsafeCell::new(data),
+        }
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use crate::{exception, state};
+
+impl<T> interface::Mutex for IRQSafeNullLock<T> {
+    type Data = T;
+
+    fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
+        // In a real lock, there would be code encapsulating this line that ensures that this
+        // mutable reference will ever only be given out once at a time.
+        let data = unsafe { &mut *self.data.get() };
+
+        // Execute the closure while IRQs are masked.
+        exception::asynchronous::exec_with_irq_masked(|| f(data))
+    }
+}
+
+impl<T> interface::ReadWriteEx for InitStateLock<T> {
+    type Data = T;
+
+    fn write<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
+        assert!(
+            state::state_manager().is_init(),
+            "InitStateLock::write called after kernel init phase"
+        );
+        assert!(
+            !exception::asynchronous::is_local_irq_masked(),
+            "InitStateLock::write called with IRQs unmasked"
+        );
+
+        let data = unsafe { &mut *self.data.get() };
+
+        f(data)
+    }
+
+    fn read<R>(&self, f: impl FnOnce(&Self::Data) -> R) -> R {
+        let data = unsafe { &*self.data.get() };
+
+        f(data)
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// InitStateLock must be transparent.
+    #[kernel_test]
+    fn init_state_lock_is_transparent() {
+        use core::mem::size_of;
+
+        assert_eq!(size_of::<InitStateLock<u64>>(), size_of::<u64>());
+    }
+}
diff --git a/18_backtrace/kernel/src/time.rs b/18_backtrace/kernel/src/time.rs
new file mode 100644
index 000000000..6d92b1966
--- /dev/null
+++ b/18_backtrace/kernel/src/time.rs
@@ -0,0 +1,37 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Timer primitives.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "_arch/aarch64/time.rs"]
+mod arch_time;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_time::time_manager;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Timekeeping interfaces.
+pub mod interface {
+    use core::time::Duration;
+
+    /// Time management functions.
+    pub trait TimeManager {
+        /// The timer's resolution.
+        fn resolution(&self) -> Duration;
+
+        /// The uptime since power-on of the device.
+        ///
+        /// This includes time consumed by firmware and bootloaders.
+        fn uptime(&self) -> Duration;
+
+        /// Spin for a given duration.
+        fn spin_for(&self, duration: Duration);
+    }
+}
diff --git a/18_backtrace/kernel/tests/00_console_sanity.rb b/18_backtrace/kernel/tests/00_console_sanity.rb
new file mode 100644
index 000000000..4dde55762
--- /dev/null
+++ b/18_backtrace/kernel/tests/00_console_sanity.rb
@@ -0,0 +1,48 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+
+require 'console_io_test'
+
+# Verify sending and receiving works as expected.
+class TxRxHandshakeTest < SubtestBase
+    def name
+        'Transmit and Receive handshake'
+    end
+
+    def run(qemu_out, qemu_in)
+        qemu_in.write_nonblock('ABC')
+        expect_or_raise(qemu_out, 'OK1234')
+    end
+end
+
+# Check for correct TX statistics implementation. Depends on test 1 being run first.
+class TxStatisticsTest < SubtestBase
+    def name
+        'Transmit statistics'
+    end
+
+    def run(qemu_out, _qemu_in)
+        expect_or_raise(qemu_out, '6')
+    end
+end
+
+# Check for correct RX statistics implementation. Depends on test 1 being run first.
+class RxStatisticsTest < SubtestBase
+    def name
+        'Receive statistics'
+    end
+
+    def run(qemu_out, _qemu_in)
+        expect_or_raise(qemu_out, '3')
+    end
+end
+
+##--------------------------------------------------------------------------------------------------
+## Test registration
+##--------------------------------------------------------------------------------------------------
+def subtest_collection
+    [TxRxHandshakeTest.new, TxStatisticsTest.new, RxStatisticsTest.new]
+end
diff --git a/18_backtrace/kernel/tests/00_console_sanity.rs b/18_backtrace/kernel/tests/00_console_sanity.rs
new file mode 100644
index 000000000..6595aac1b
--- /dev/null
+++ b/18_backtrace/kernel/tests/00_console_sanity.rs
@@ -0,0 +1,39 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Console sanity tests - RX, TX and statistics.
+
+#![feature(format_args_nl)]
+#![no_main]
+#![no_std]
+
+/// Console tests should time out on the I/O harness in case of panic.
+mod panic_wait_forever;
+
+use libkernel::{bsp, console, cpu, exception, memory, print};
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    use bsp::console::console;
+    use console::interface::*;
+
+    exception::handling_init();
+    memory::mmu::post_enable_init();
+    bsp::console::qemu_bring_up_console();
+
+    // Handshake
+    assert_eq!(console().read_char(), 'A');
+    assert_eq!(console().read_char(), 'B');
+    assert_eq!(console().read_char(), 'C');
+    print!("OK1234");
+
+    // 6
+    print!("{}", console().chars_written());
+
+    // 3
+    print!("{}", console().chars_read());
+
+    // The QEMU process running this test will be closed by the I/O test harness.
+    cpu::wait_forever();
+}
diff --git a/18_backtrace/kernel/tests/01_timer_sanity.rs b/18_backtrace/kernel/tests/01_timer_sanity.rs
new file mode 100644
index 000000000..9b2b228d9
--- /dev/null
+++ b/18_backtrace/kernel/tests/01_timer_sanity.rs
@@ -0,0 +1,50 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Timer sanity tests.
+
+#![feature(custom_test_frameworks)]
+#![no_main]
+#![no_std]
+#![reexport_test_harness_main = "test_main"]
+#![test_runner(libkernel::test_runner)]
+
+use core::time::Duration;
+use libkernel::{bsp, cpu, exception, memory, time, time::interface::TimeManager};
+use test_macros::kernel_test;
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    exception::handling_init();
+    memory::mmu::post_enable_init();
+    bsp::console::qemu_bring_up_console();
+
+    // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
+
+    test_main();
+
+    cpu::qemu_exit_success()
+}
+
+/// Simple check that the timer is running.
+#[kernel_test]
+fn timer_is_counting() {
+    assert!(time::time_manager().uptime().as_nanos() > 0)
+}
+
+/// Timer resolution must be sufficient.
+#[kernel_test]
+fn timer_resolution_is_sufficient() {
+    assert!(time::time_manager().resolution().as_nanos() < 100)
+}
+
+/// Sanity check spin_for() implementation.
+#[kernel_test]
+fn spin_accuracy_check_1_second() {
+    let t1 = time::time_manager().uptime();
+    time::time_manager().spin_for(Duration::from_secs(1));
+    let t2 = time::time_manager().uptime();
+
+    assert_eq!((t2 - t1).as_secs(), 1)
+}
diff --git a/18_backtrace/kernel/tests/02_exception_sync_page_fault.rs b/18_backtrace/kernel/tests/02_exception_sync_page_fault.rs
new file mode 100644
index 000000000..0d2a1e63c
--- /dev/null
+++ b/18_backtrace/kernel/tests/02_exception_sync_page_fault.rs
@@ -0,0 +1,37 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Page faults must result in synchronous exceptions.
+
+#![feature(format_args_nl)]
+#![no_main]
+#![no_std]
+
+/// Overwrites libkernel's `panic_wait::_panic_exit()` so that it returns a "success" code.
+///
+/// In this test, reaching the panic is a success, because it is called from the synchronous
+/// exception handler, which is what this test wants to achieve.
+///
+/// It also means that this integration test can not use any other code that calls panic!() directly
+/// or indirectly.
+mod panic_exit_success;
+
+use libkernel::{bsp, cpu, exception, info, memory, println};
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    exception::handling_init();
+    memory::mmu::post_enable_init();
+    bsp::console::qemu_bring_up_console();
+
+    // This line will be printed as the test header.
+    println!("Testing synchronous exception handling by causing a page fault");
+
+    info!("Writing to bottom of address space to address 1 GiB...");
+    let big_addr: u64 = 1024 * 1024 * 1024;
+    core::ptr::read_volatile(big_addr as *mut u64);
+
+    // If execution reaches here, the memory access above did not cause a page fault exception.
+    cpu::qemu_exit_failure()
+}
diff --git a/18_backtrace/kernel/tests/03_exception_restore_sanity.rb b/18_backtrace/kernel/tests/03_exception_restore_sanity.rb
new file mode 100644
index 000000000..5f52e0c7c
--- /dev/null
+++ b/18_backtrace/kernel/tests/03_exception_restore_sanity.rb
@@ -0,0 +1,25 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+require 'console_io_test'
+
+# Verify that exception restore works.
+class ExceptionRestoreTest < SubtestBase
+    def name
+        'Exception restore'
+    end
+
+    def run(qemu_out, _qemu_in)
+        expect_or_raise(qemu_out, 'Back from system call!')
+    end
+end
+
+##--------------------------------------------------------------------------------------------------
+## Test registration
+##--------------------------------------------------------------------------------------------------
+def subtest_collection
+    [ExceptionRestoreTest.new]
+end
diff --git a/18_backtrace/kernel/tests/03_exception_restore_sanity.rs b/18_backtrace/kernel/tests/03_exception_restore_sanity.rs
new file mode 100644
index 000000000..983d488f1
--- /dev/null
+++ b/18_backtrace/kernel/tests/03_exception_restore_sanity.rs
@@ -0,0 +1,49 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! A simple sanity test to see if exception restore code works.
+
+#![feature(format_args_nl)]
+#![no_main]
+#![no_std]
+
+/// Console tests should time out on the I/O harness in case of panic.
+mod panic_wait_forever;
+
+use core::arch::asm;
+use libkernel::{bsp, cpu, exception, info, memory, println};
+
+#[inline(never)]
+fn nested_system_call() {
+    #[cfg(target_arch = "aarch64")]
+    unsafe {
+        asm!("svc #0x1337", options(nomem, nostack, preserves_flags));
+    }
+
+    #[cfg(not(target_arch = "aarch64"))]
+    {
+        info!("Not supported yet");
+        cpu::wait_forever();
+    }
+}
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    exception::handling_init();
+    memory::mmu::post_enable_init();
+    bsp::console::qemu_bring_up_console();
+
+    // This line will be printed as the test header.
+    println!("Testing exception restore");
+
+    info!("Making a dummy system call");
+
+    // Calling this inside a function indirectly tests if the link register is restored properly.
+    nested_system_call();
+
+    info!("Back from system call!");
+
+    // The QEMU process running this test will be closed by the I/O test harness.
+    cpu::wait_forever();
+}
diff --git a/18_backtrace/kernel/tests/04_exception_irq_sanity.rs b/18_backtrace/kernel/tests/04_exception_irq_sanity.rs
new file mode 100644
index 000000000..9030424d5
--- /dev/null
+++ b/18_backtrace/kernel/tests/04_exception_irq_sanity.rs
@@ -0,0 +1,67 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! IRQ handling sanity tests.
+
+#![feature(custom_test_frameworks)]
+#![no_main]
+#![no_std]
+#![reexport_test_harness_main = "test_main"]
+#![test_runner(libkernel::test_runner)]
+
+use libkernel::{bsp, cpu, exception, memory};
+use test_macros::kernel_test;
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    memory::mmu::post_enable_init();
+    bsp::console::qemu_bring_up_console();
+
+    exception::handling_init();
+    exception::asynchronous::local_irq_unmask();
+
+    test_main();
+
+    cpu::qemu_exit_success()
+}
+
+/// Check that IRQ masking works.
+#[kernel_test]
+fn local_irq_mask_works() {
+    // Precondition: IRQs are unmasked.
+    assert!(exception::asynchronous::is_local_irq_masked());
+
+    unsafe { exception::asynchronous::local_irq_mask() };
+    assert!(!exception::asynchronous::is_local_irq_masked());
+
+    // Restore earlier state.
+    unsafe { exception::asynchronous::local_irq_unmask() };
+}
+
+/// Check that IRQ unmasking works.
+#[kernel_test]
+fn local_irq_unmask_works() {
+    // Precondition: IRQs are masked.
+    unsafe { exception::asynchronous::local_irq_mask() };
+    assert!(!exception::asynchronous::is_local_irq_masked());
+
+    unsafe { exception::asynchronous::local_irq_unmask() };
+    assert!(exception::asynchronous::is_local_irq_masked());
+}
+
+/// Check that IRQ mask save is saving "something".
+#[kernel_test]
+fn local_irq_mask_save_works() {
+    // Precondition: IRQs are unmasked.
+    assert!(exception::asynchronous::is_local_irq_masked());
+
+    let first = unsafe { exception::asynchronous::local_irq_mask_save() };
+    assert!(!exception::asynchronous::is_local_irq_masked());
+
+    let second = unsafe { exception::asynchronous::local_irq_mask_save() };
+    assert_ne!(first, second);
+
+    unsafe { exception::asynchronous::local_irq_restore(first) };
+    assert!(exception::asynchronous::is_local_irq_masked());
+}
diff --git a/18_backtrace/kernel/tests/05_backtrace_sanity.rb b/18_backtrace/kernel/tests/05_backtrace_sanity.rb
new file mode 100644
index 000000000..5650f97c5
--- /dev/null
+++ b/18_backtrace/kernel/tests/05_backtrace_sanity.rb
@@ -0,0 +1,39 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+require 'console_io_test'
+
+# Verify that panic produces a backtrace.
+class PanicBacktraceTest < SubtestBase
+    def name
+        'Panic produces backtrace'
+    end
+
+    def run(qemu_out, _qemu_in)
+        expect_or_raise(qemu_out, 'Kernel panic!')
+        expect_or_raise(qemu_out, 'Backtrace:')
+    end
+end
+
+# Verify backtrace correctness.
+class BacktraceCorrectnessTest < SubtestBase
+    def name
+        'Backtrace is correct'
+    end
+
+    def run(qemu_out, _qemu_in)
+        expect_or_raise(qemu_out, '| core::panicking::panic')
+        expect_or_raise(qemu_out, '| _05_backtrace_sanity::nested')
+        expect_or_raise(qemu_out, '| kernel_init')
+    end
+end
+
+##--------------------------------------------------------------------------------------------------
+## Test registration
+##--------------------------------------------------------------------------------------------------
+def subtest_collection
+    [PanicBacktraceTest.new, BacktraceCorrectnessTest.new]
+end
diff --git a/18_backtrace/kernel/tests/05_backtrace_sanity.rs b/18_backtrace/kernel/tests/05_backtrace_sanity.rs
new file mode 100644
index 000000000..24229f957
--- /dev/null
+++ b/18_backtrace/kernel/tests/05_backtrace_sanity.rs
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Test if backtracing code detects an invalid frame pointer.
+
+#![feature(format_args_nl)]
+#![no_main]
+#![no_std]
+
+/// Console tests should time out on the I/O harness in case of panic.
+mod panic_wait_forever;
+
+use libkernel::{bsp, cpu, exception, memory};
+
+#[inline(never)]
+fn nested() {
+    panic!()
+}
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    exception::handling_init();
+    memory::mmu::post_enable_init();
+    bsp::console::qemu_bring_up_console();
+
+    nested();
+
+    // The QEMU process running this test will be closed by the I/O test harness.
+    cpu::wait_forever()
+}
diff --git a/18_backtrace/kernel/tests/06_backtrace_invalid_frame.rb b/18_backtrace/kernel/tests/06_backtrace_invalid_frame.rb
new file mode 100644
index 000000000..7601cf971
--- /dev/null
+++ b/18_backtrace/kernel/tests/06_backtrace_invalid_frame.rb
@@ -0,0 +1,26 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+require 'console_io_test'
+
+# Test detection of invalid frame pointers.
+class InvalidFramePointerTest < SubtestBase
+    def name
+        'Detect invalid frame pointer'
+    end
+
+    def run(qemu_out, _qemu_in)
+        expect_or_raise(qemu_out,
+                        /Encountered invalid frame pointer \(.*\) during backtrace/)
+    end
+end
+
+##--------------------------------------------------------------------------------------------------
+## Test registration
+##--------------------------------------------------------------------------------------------------
+def subtest_collection
+    [InvalidFramePointerTest.new]
+end
diff --git a/18_backtrace/kernel/tests/06_backtrace_invalid_frame.rs b/18_backtrace/kernel/tests/06_backtrace_invalid_frame.rs
new file mode 100644
index 000000000..a1874c4e4
--- /dev/null
+++ b/18_backtrace/kernel/tests/06_backtrace_invalid_frame.rs
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Test if backtracing code detects an invalid frame pointer.
+
+#![feature(format_args_nl)]
+#![no_main]
+#![no_std]
+
+/// Console tests should time out on the I/O harness in case of panic.
+mod panic_wait_forever;
+
+use libkernel::{backtrace, bsp, cpu, exception, memory};
+
+#[inline(never)]
+fn nested() {
+    unsafe { backtrace::corrupt_previous_frame_addr() };
+
+    panic!()
+}
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    exception::handling_init();
+    memory::mmu::post_enable_init();
+    bsp::console::qemu_bring_up_console();
+
+    nested();
+
+    // The QEMU process running this test will be closed by the I/O test harness.
+    cpu::wait_forever()
+}
diff --git a/18_backtrace/kernel/tests/07_backtrace_invalid_link.rb b/18_backtrace/kernel/tests/07_backtrace_invalid_link.rb
new file mode 100644
index 000000000..0fabcf4c4
--- /dev/null
+++ b/18_backtrace/kernel/tests/07_backtrace_invalid_link.rb
@@ -0,0 +1,25 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+require 'console_io_test'
+
+# Test detection of invalid link.
+class InvalidLinkTest < SubtestBase
+    def name
+        'Detect invalid link'
+    end
+
+    def run(qemu_out, _qemu_in)
+        expect_or_raise(qemu_out, /Link address \(.*\) is not contained in kernel .text section/)
+    end
+end
+
+##--------------------------------------------------------------------------------------------------
+## Test registration
+##--------------------------------------------------------------------------------------------------
+def subtest_collection
+    [InvalidLinkTest.new]
+end
diff --git a/18_backtrace/kernel/tests/07_backtrace_invalid_link.rs b/18_backtrace/kernel/tests/07_backtrace_invalid_link.rs
new file mode 100644
index 000000000..a0731091b
--- /dev/null
+++ b/18_backtrace/kernel/tests/07_backtrace_invalid_link.rs
@@ -0,0 +1,38 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Test if backtracing code detects an invalid link.
+
+#![feature(format_args_nl)]
+#![no_main]
+#![no_std]
+
+/// Console tests should time out on the I/O harness in case of panic.
+mod panic_wait_forever;
+
+use libkernel::{backtrace, bsp, cpu, exception, memory};
+
+#[inline(never)]
+fn nested_2() -> &'static str {
+    unsafe { backtrace::corrupt_link() };
+    libkernel::println!("{}", libkernel::backtrace::Backtrace);
+    "foo"
+}
+
+#[inline(never)]
+fn nested_1() {
+    libkernel::println!("{}", nested_2())
+}
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    exception::handling_init();
+    memory::mmu::post_enable_init();
+    bsp::console::qemu_bring_up_console();
+
+    nested_1();
+
+    // The QEMU process running this test will be closed by the I/O test harness.
+    cpu::wait_forever()
+}
diff --git a/18_backtrace/kernel/tests/boot_test_string.rb b/18_backtrace/kernel/tests/boot_test_string.rb
new file mode 100644
index 000000000..f778b3d8c
--- /dev/null
+++ b/18_backtrace/kernel/tests/boot_test_string.rb
@@ -0,0 +1,3 @@
+# frozen_string_literal: true
+
+EXPECTED_PRINT = 'Echoing input now'
diff --git a/18_backtrace/kernel/tests/panic_exit_success/mod.rs b/18_backtrace/kernel/tests/panic_exit_success/mod.rs
new file mode 100644
index 000000000..908fac51c
--- /dev/null
+++ b/18_backtrace/kernel/tests/panic_exit_success/mod.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+
+/// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
+#[no_mangle]
+fn _panic_exit() -> ! {
+    libkernel::cpu::qemu_exit_success()
+}
diff --git a/18_backtrace/kernel/tests/panic_wait_forever/mod.rs b/18_backtrace/kernel/tests/panic_wait_forever/mod.rs
new file mode 100644
index 000000000..7a4effa50
--- /dev/null
+++ b/18_backtrace/kernel/tests/panic_wait_forever/mod.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+/// Overwrites libkernel's `panic_wait::_panic_exit()` with wait_forever.
+#[no_mangle]
+fn _panic_exit() -> ! {
+    libkernel::cpu::wait_forever()
+}
diff --git a/18_backtrace/kernel_symbols.mk b/18_backtrace/kernel_symbols.mk
new file mode 100644
index 000000000..5b51ccfed
--- /dev/null
+++ b/18_backtrace/kernel_symbols.mk
@@ -0,0 +1,103 @@
+## SPDX-License-Identifier: MIT OR Apache-2.0
+##
+## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+include ../common/format.mk
+include ../common/docker.mk
+
+##--------------------------------------------------------------------------------------------------
+## Check for input variables that need be exported by the calling Makefile
+##--------------------------------------------------------------------------------------------------
+ifndef KERNEL_SYMBOLS_TOOL_PATH
+$(error KERNEL_SYMBOLS_TOOL_PATH is not set)
+endif
+
+ifndef TARGET
+$(error TARGET is not set)
+endif
+
+ifndef KERNEL_SYMBOLS_INPUT_ELF
+$(error KERNEL_SYMBOLS_INPUT_ELF is not set)
+endif
+
+ifndef KERNEL_SYMBOLS_OUTPUT_ELF
+$(error KERNEL_SYMBOLS_OUTPUT_ELF is not set)
+endif
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Targets and Prerequisites
+##--------------------------------------------------------------------------------------------------
+KERNEL_SYMBOLS_MANIFEST      = kernel_symbols/Cargo.toml
+KERNEL_SYMBOLS_LINKER_SCRIPT = kernel_symbols/kernel_symbols.ld
+
+KERNEL_SYMBOLS_RS           = $(KERNEL_SYMBOLS_INPUT_ELF)_symbols.rs
+KERNEL_SYMBOLS_DEMANGLED_RS = $(shell pwd)/$(KERNEL_SYMBOLS_INPUT_ELF)_symbols_demangled.rs
+
+KERNEL_SYMBOLS_ELF      = target/$(TARGET)/release/kernel_symbols
+KERNEL_SYMBOLS_STRIPPED = target/$(TARGET)/release/kernel_symbols_stripped
+
+# Export for build.rs of kernel_symbols crate.
+export KERNEL_SYMBOLS_DEMANGLED_RS
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Command building blocks
+##--------------------------------------------------------------------------------------------------
+GET_SYMBOLS_SECTION_VIRT_ADDR = $(DOCKER_TOOLS) $(EXEC_SYMBOLS_TOOL) \
+    --get_symbols_section_virt_addr $(KERNEL_SYMBOLS_OUTPUT_ELF)
+
+RUSTFLAGS = -C link-arg=--script=$(KERNEL_SYMBOLS_LINKER_SCRIPT) \
+    -C link-arg=--section-start=.rodata=$$($(GET_SYMBOLS_SECTION_VIRT_ADDR))
+
+RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) \
+    -D warnings                   \
+    -D missing_docs
+
+COMPILER_ARGS = --target=$(TARGET) \
+    --release
+
+RUSTC_CMD   = cargo rustc $(COMPILER_ARGS) --manifest-path $(KERNEL_SYMBOLS_MANIFEST)
+OBJCOPY_CMD = rust-objcopy \
+    --strip-all            \
+    -O binary
+
+EXEC_SYMBOLS_TOOL  = ruby $(KERNEL_SYMBOLS_TOOL_PATH)/main.rb
+
+##------------------------------------------------------------------------------
+## Dockerization
+##------------------------------------------------------------------------------
+DOCKER_CMD = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
+
+# DOCKER_IMAGE defined in include file (see top of this file).
+DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: all
+
+all:
+	@cp $(KERNEL_SYMBOLS_INPUT_ELF) $(KERNEL_SYMBOLS_OUTPUT_ELF)
+
+	@$(DOCKER_TOOLS) $(EXEC_SYMBOLS_TOOL) --gen_symbols $(KERNEL_SYMBOLS_OUTPUT_ELF) \
+                $(KERNEL_SYMBOLS_RS)
+
+	$(call color_progress_prefix, "Demangling")
+	@echo Symbol names
+	@cat $(KERNEL_SYMBOLS_RS) | rustfilt > $(KERNEL_SYMBOLS_DEMANGLED_RS)
+
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
+
+	$(call color_progress_prefix, "Stripping")
+	@echo Symbols ELF file
+	@$(OBJCOPY_CMD) $(KERNEL_SYMBOLS_ELF) $(KERNEL_SYMBOLS_STRIPPED)
+
+	@$(DOCKER_TOOLS) $(EXEC_SYMBOLS_TOOL) --patch_data $(KERNEL_SYMBOLS_OUTPUT_ELF) \
+                $(KERNEL_SYMBOLS_STRIPPED)
+
+	$(call color_progress_prefix, "Finished")
diff --git a/18_backtrace/kernel_symbols/Cargo.toml b/18_backtrace/kernel_symbols/Cargo.toml
new file mode 100644
index 000000000..3407aa7e1
--- /dev/null
+++ b/18_backtrace/kernel_symbols/Cargo.toml
@@ -0,0 +1,15 @@
+[package]
+name = "kernel_symbols"
+version = "0.1.0"
+edition = "2021"
+
+[features]
+default = []
+generated_symbols_available = []
+
+##--------------------------------------------------------------------------------------------------
+## Dependencies
+##--------------------------------------------------------------------------------------------------
+
+[dependencies]
+debug-symbol-types = { path = "../libraries/debug-symbol-types" }
diff --git a/18_backtrace/kernel_symbols/build.rs b/18_backtrace/kernel_symbols/build.rs
new file mode 100644
index 000000000..5062df444
--- /dev/null
+++ b/18_backtrace/kernel_symbols/build.rs
@@ -0,0 +1,14 @@
+use std::{env, path::Path};
+
+fn main() {
+    if let Ok(path) = env::var("KERNEL_SYMBOLS_DEMANGLED_RS") {
+        if Path::new(&path).exists() {
+            println!("cargo:rustc-cfg=feature=\"generated_symbols_available\"")
+        }
+    }
+
+    println!(
+        "cargo:rerun-if-changed={}",
+        Path::new("kernel_symbols.ld").display()
+    );
+}
diff --git a/18_backtrace/kernel_symbols/kernel_symbols.ld b/18_backtrace/kernel_symbols/kernel_symbols.ld
new file mode 100644
index 000000000..0625f0086
--- /dev/null
+++ b/18_backtrace/kernel_symbols/kernel_symbols.ld
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: MIT OR Apache-2.0
+ *
+ * Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+ */
+
+SECTIONS
+{
+    .rodata : {
+        ASSERT(. > 0xffffffff00000000, "Expected higher half address")
+
+        KEEP(*(.rodata.symbol_desc*))
+        . = ALIGN(8);
+        *(.rodata*)
+    }
+}
diff --git a/18_backtrace/kernel_symbols/src/main.rs b/18_backtrace/kernel_symbols/src/main.rs
new file mode 100644
index 000000000..bd90b535d
--- /dev/null
+++ b/18_backtrace/kernel_symbols/src/main.rs
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Generation of kernel symbols.
+
+#![no_std]
+#![no_main]
+
+#[cfg(feature = "generated_symbols_available")]
+include!(env!("KERNEL_SYMBOLS_DEMANGLED_RS"));
+
+#[panic_handler]
+fn panic(_info: &core::panic::PanicInfo) -> ! {
+    unimplemented!()
+}
diff --git a/18_backtrace/libraries/debug-symbol-types/Cargo.toml b/18_backtrace/libraries/debug-symbol-types/Cargo.toml
new file mode 100644
index 000000000..e5b1fd1f5
--- /dev/null
+++ b/18_backtrace/libraries/debug-symbol-types/Cargo.toml
@@ -0,0 +1,4 @@
+[package]
+name = "debug-symbol-types"
+version = "0.1.0"
+edition = "2021"
diff --git a/18_backtrace/libraries/debug-symbol-types/src/lib.rs b/18_backtrace/libraries/debug-symbol-types/src/lib.rs
new file mode 100644
index 000000000..b6dff082f
--- /dev/null
+++ b/18_backtrace/libraries/debug-symbol-types/src/lib.rs
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Types for implementing debug symbol support.
+
+#![no_std]
+
+use core::ops::Range;
+
+/// A symbol containing a size.
+#[repr(C)]
+#[derive(Clone)]
+pub struct Symbol {
+    addr_range: Range<usize>,
+    name: &'static str,
+}
+
+impl Symbol {
+    /// Create an instance.
+    pub const fn new(start: usize, size: usize, name: &'static str) -> Symbol {
+        Symbol {
+            addr_range: Range {
+                start,
+                end: start + size,
+            },
+            name,
+        }
+    }
+
+    /// Returns true if addr is contained in the range.
+    pub fn contains(&self, addr: usize) -> bool {
+        self.addr_range.contains(&addr)
+    }
+
+    /// Returns the symbol's name.
+    pub fn name(&self) -> &'static str {
+        self.name
+    }
+
+    /// Returns the symbol's size.
+    pub fn size(&self) -> usize {
+        self.addr_range.end - self.addr_range.start
+    }
+}
diff --git a/18_backtrace/libraries/test-macros/Cargo.toml b/18_backtrace/libraries/test-macros/Cargo.toml
new file mode 100644
index 000000000..fff98a1fc
--- /dev/null
+++ b/18_backtrace/libraries/test-macros/Cargo.toml
@@ -0,0 +1,14 @@
+[package]
+name = "test-macros"
+version = "0.1.0"
+authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+edition = "2021"
+
+[lib]
+proc-macro = true
+
+[dependencies]
+proc-macro2 = "1.x"
+quote = "1.x"
+syn = { version = "1.x", features = ["full"] }
+test-types = { path = "../test-types" }
diff --git a/18_backtrace/libraries/test-macros/src/lib.rs b/18_backtrace/libraries/test-macros/src/lib.rs
new file mode 100644
index 000000000..9879677cf
--- /dev/null
+++ b/18_backtrace/libraries/test-macros/src/lib.rs
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+
+use proc_macro::TokenStream;
+use proc_macro2::Span;
+use quote::quote;
+use syn::{parse_macro_input, Ident, ItemFn};
+
+#[proc_macro_attribute]
+pub fn kernel_test(_attr: TokenStream, input: TokenStream) -> TokenStream {
+    let f = parse_macro_input!(input as ItemFn);
+
+    let test_name = &format!("{}", f.sig.ident);
+    let test_ident = Ident::new(
+        &format!("{}_TEST_CONTAINER", f.sig.ident.to_string().to_uppercase()),
+        Span::call_site(),
+    );
+    let test_code_block = f.block;
+
+    quote!(
+        #[test_case]
+        const #test_ident: test_types::UnitTest = test_types::UnitTest {
+            name: #test_name,
+            test_func: || #test_code_block,
+        };
+    )
+    .into()
+}
diff --git a/18_backtrace/libraries/test-types/Cargo.toml b/18_backtrace/libraries/test-types/Cargo.toml
new file mode 100644
index 000000000..2f20f060e
--- /dev/null
+++ b/18_backtrace/libraries/test-types/Cargo.toml
@@ -0,0 +1,5 @@
+[package]
+name = "test-types"
+version = "0.1.0"
+authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+edition = "2021"
diff --git a/18_backtrace/libraries/test-types/src/lib.rs b/18_backtrace/libraries/test-types/src/lib.rs
new file mode 100644
index 000000000..922c2a1c3
--- /dev/null
+++ b/18_backtrace/libraries/test-types/src/lib.rs
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Types for the `custom_test_frameworks` implementation.
+
+#![no_std]
+
+/// Unit test container.
+pub struct UnitTest {
+    /// Name of the test.
+    pub name: &'static str,
+
+    /// Function pointer to the test.
+    pub test_func: fn(),
+}
diff --git a/18_backtrace/tools/kernel_symbols_tool/cmds.rb b/18_backtrace/tools/kernel_symbols_tool/cmds.rb
new file mode 100644
index 000000000..fe66ea71c
--- /dev/null
+++ b/18_backtrace/tools/kernel_symbols_tool/cmds.rb
@@ -0,0 +1,45 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+def generate_symbols(kernel_elf, output_file)
+    File.open(output_file, 'w') do |file|
+        header = <<~HEREDOC
+            use debug_symbol_types::Symbol;
+
+            # [no_mangle]
+            # [link_section = ".rodata.symbol_desc"]
+            static KERNEL_SYMBOLS: [Symbol; #{kernel_elf.num_symbols}] = [
+        HEREDOC
+
+        file.write(header)
+        kernel_elf.symbols.each do |sym|
+            value = sym.header.st_value
+            size = sym.header.st_size
+            name = sym.name
+
+            file.write("    Symbol::new(#{value}, #{size}, \"#{name}\"),\n")
+        end
+        file.write("];\n")
+    end
+end
+
+def get_symbols_section_virt_addr(kernel_elf)
+    kernel_elf.kernel_symbols_section_virt_addr
+end
+
+def patch_symbol_data(kernel_elf, symbols_blob_path)
+    symbols_blob = File.binread(symbols_blob_path)
+
+    raise if symbols_blob.size > kernel_elf.kernel_symbols_section_size
+
+    File.binwrite(kernel_elf.path, File.binread(symbols_blob_path),
+                  kernel_elf.kernel_symbols_section_offset_in_file)
+end
+
+def patch_num_symbols(kernel_elf)
+    num_packed = [kernel_elf.num_symbols].pack('Q<*') # "Q" == uint64_t, "<" == little endian
+    File.binwrite(kernel_elf.path, num_packed, kernel_elf.num_kernel_symbols_offset_in_file)
+end
diff --git a/18_backtrace/tools/kernel_symbols_tool/kernel_elf.rb b/18_backtrace/tools/kernel_symbols_tool/kernel_elf.rb
new file mode 100644
index 000000000..b16497673
--- /dev/null
+++ b/18_backtrace/tools/kernel_symbols_tool/kernel_elf.rb
@@ -0,0 +1,74 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+# KernelELF
+class KernelELF
+    attr_reader :path
+
+    def initialize(kernel_elf_path, kernel_symbols_section, num_kernel_symbols)
+        @elf = ELFTools::ELFFile.new(File.open(kernel_elf_path))
+        @symtab_section = @elf.section_by_name('.symtab')
+
+        @path = kernel_elf_path
+        fetch_values(kernel_symbols_section, num_kernel_symbols)
+    end
+
+    private
+
+    def fetch_values(kernel_symbols_section, num_kernel_symbols)
+        sym = @symtab_section.symbol_by_name(num_kernel_symbols)
+        raise "Symbol \"#{num_kernel_symbols}\" not found" if sym.nil?
+
+        @num_kernel_symbols = sym
+
+        section = @elf.section_by_name(kernel_symbols_section)
+        raise "Section \"#{kernel_symbols_section}\" not found" if section.nil?
+
+        @kernel_symbols_section = section
+    end
+
+    def num_kernel_symbols_virt_addr
+        @num_kernel_symbols.header.st_value
+    end
+
+    def segment_containing_virt_addr(virt_addr)
+        @elf.each_segments do |segment|
+            return segment if segment.vma_in?(virt_addr)
+        end
+    end
+
+    def virt_addr_to_file_offset(virt_addr)
+        segment = segment_containing_virt_addr(virt_addr)
+        segment.vma_to_offset(virt_addr)
+    end
+
+    public
+
+    def symbols
+        non_zero_symbols = @symtab_section.symbols.reject { |sym| sym.header.st_size.zero? }
+        non_zero_symbols.sort_by { |sym| sym.header.st_value }
+    end
+
+    def num_symbols
+        symbols.size
+    end
+
+    def kernel_symbols_section_virt_addr
+        @kernel_symbols_section.header.sh_addr.to_i
+    end
+
+    def kernel_symbols_section_size
+        @kernel_symbols_section.header.sh_size.to_i
+    end
+
+    def kernel_symbols_section_offset_in_file
+        virt_addr_to_file_offset(kernel_symbols_section_virt_addr)
+    end
+
+    def num_kernel_symbols_offset_in_file
+        virt_addr_to_file_offset(num_kernel_symbols_virt_addr)
+    end
+end
diff --git a/18_backtrace/tools/kernel_symbols_tool/main.rb b/18_backtrace/tools/kernel_symbols_tool/main.rb
new file mode 100755
index 000000000..30a8be6f5
--- /dev/null
+++ b/18_backtrace/tools/kernel_symbols_tool/main.rb
@@ -0,0 +1,47 @@
+#!/usr/bin/env ruby
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+require 'rubygems'
+require 'bundler/setup'
+require 'colorize'
+require 'elftools'
+
+require_relative 'kernel_elf'
+require_relative 'cmds'
+
+KERNEL_SYMBOLS_SECTION = '.kernel_symbols'
+NUM_KERNEL_SYMBOLS = 'NUM_KERNEL_SYMBOLS'
+
+cmd = ARGV[0]
+
+kernel_elf_path = ARGV[1]
+kernel_elf = KernelELF.new(kernel_elf_path, KERNEL_SYMBOLS_SECTION, NUM_KERNEL_SYMBOLS)
+
+case cmd
+when '--gen_symbols'
+    output_file = ARGV[2]
+
+    print 'Generating'.rjust(12).green.bold
+    puts ' Symbols source file'
+
+    generate_symbols(kernel_elf, output_file)
+when '--get_symbols_section_virt_addr'
+    addr = get_symbols_section_virt_addr(kernel_elf)
+
+    puts "0x#{addr.to_s(16)}"
+when '--patch_data'
+    symbols_blob_path = ARGV[2]
+    num_symbols = kernel_elf.num_symbols
+
+    print 'Patching'.rjust(12).green.bold
+    puts " Symbols blob and number of symbols (#{num_symbols}) into ELF"
+
+    patch_symbol_data(kernel_elf, symbols_blob_path)
+    patch_num_symbols(kernel_elf)
+else
+    raise
+end
diff --git a/18_backtrace/tools/translation_table_tool/arch.rb b/18_backtrace/tools/translation_table_tool/arch.rb
new file mode 100644
index 000000000..deceb6d0c
--- /dev/null
+++ b/18_backtrace/tools/translation_table_tool/arch.rb
@@ -0,0 +1,314 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+# Bitfield manipulation.
+class BitField
+    def initialize
+        @value = 0
+    end
+
+    def self.attr_bitfield(name, offset, num_bits)
+        define_method("#{name}=") do |bits|
+            mask = (2**num_bits) - 1
+
+            raise "Input out of range: #{name} = 0x#{bits.to_s(16)}" if (bits & ~mask).positive?
+
+            # Clear bitfield
+            @value &= ~(mask << offset)
+
+            # Set it
+            @value |= (bits << offset)
+        end
+    end
+
+    def to_i
+        @value
+    end
+
+    def size_in_byte
+        8
+    end
+end
+
+# An array class that knows its memory location.
+class CArray < Array
+    attr_reader :phys_start_addr
+
+    def initialize(phys_start_addr, size, &block)
+        @phys_start_addr = phys_start_addr
+
+        super(size, &block)
+    end
+
+    def size_in_byte
+        inject(0) { |sum, n| sum + n.size_in_byte }
+    end
+end
+
+#---------------------------------------------------------------------------------------------------
+# Arch::
+#---------------------------------------------------------------------------------------------------
+module Arch
+#---------------------------------------------------------------------------------------------------
+# Arch::ARMv8
+#---------------------------------------------------------------------------------------------------
+module ARMv8
+# ARMv8 Table Descriptor.
+class Stage1TableDescriptor < BitField
+    module NextLevelTableAddr
+        OFFSET = 16
+        NUMBITS = 32
+    end
+
+    module Type
+        OFFSET = 1
+        NUMBITS = 1
+
+        BLOCK = 0
+        TABLE = 1
+    end
+
+    module Valid
+        OFFSET = 0
+        NUMBITS = 1
+
+        FALSE = 0
+        TRUE = 1
+    end
+
+    attr_bitfield(:__next_level_table_addr, NextLevelTableAddr::OFFSET, NextLevelTableAddr::NUMBITS)
+    attr_bitfield(:type, Type::OFFSET, Type::NUMBITS)
+    attr_bitfield(:valid, Valid::OFFSET, Valid::NUMBITS)
+
+    def next_level_table_addr=(addr)
+        addr = addr >> Granule64KiB::SHIFT
+
+        self.__next_level_table_addr = addr
+    end
+
+    private :__next_level_table_addr=
+end
+
+# ARMv8 level 3 page descriptor.
+class Stage1PageDescriptor < BitField
+    module UXN
+        OFFSET = 54
+        NUMBITS = 1
+
+        FALSE = 0
+        TRUE = 1
+    end
+
+    module PXN
+        OFFSET = 53
+        NUMBITS = 1
+
+        FALSE = 0
+        TRUE = 1
+    end
+
+    module OutputAddr
+        OFFSET = 16
+        NUMBITS = 32
+    end
+
+    module AF
+        OFFSET = 10
+        NUMBITS = 1
+
+        FALSE = 0
+        TRUE = 1
+    end
+
+    module SH
+        OFFSET = 8
+        NUMBITS = 2
+
+        INNER_SHAREABLE = 0b11
+    end
+
+    module AP
+        OFFSET = 6
+        NUMBITS = 2
+
+        RW_EL1 = 0b00
+        RO_EL1 = 0b10
+    end
+
+    module AttrIndx
+        OFFSET = 2
+        NUMBITS = 3
+    end
+
+    module Type
+        OFFSET = 1
+        NUMBITS = 1
+
+        RESERVED_INVALID = 0
+        PAGE = 1
+    end
+
+    module Valid
+        OFFSET = 0
+        NUMBITS = 1
+
+        FALSE = 0
+        TRUE = 1
+    end
+
+    attr_bitfield(:uxn, UXN::OFFSET, UXN::NUMBITS)
+    attr_bitfield(:pxn, PXN::OFFSET, PXN::NUMBITS)
+    attr_bitfield(:__output_addr, OutputAddr::OFFSET, OutputAddr::NUMBITS)
+    attr_bitfield(:af, AF::OFFSET, AF::NUMBITS)
+    attr_bitfield(:sh, SH::OFFSET, SH::NUMBITS)
+    attr_bitfield(:ap, AP::OFFSET, AP::NUMBITS)
+    attr_bitfield(:attr_indx, AttrIndx::OFFSET, AttrIndx::NUMBITS)
+    attr_bitfield(:type, Type::OFFSET, Type::NUMBITS)
+    attr_bitfield(:valid, Valid::OFFSET, Valid::NUMBITS)
+
+    def output_addr=(addr)
+        addr = addr >> Granule64KiB::SHIFT
+
+        self.__output_addr = addr
+    end
+
+    private :__output_addr=
+end
+
+# Translation table representing the structure defined in translation_table.rs.
+class TranslationTable
+    module MAIR
+        NORMAL = 1
+    end
+
+    def initialize
+        do_sanity_checks
+
+        num_lvl2_tables = BSP.kernel_virt_addr_space_size >> Granule512MiB::SHIFT
+
+        @lvl3 = new_lvl3(num_lvl2_tables, BSP.phys_addr_of_kernel_tables)
+
+        @lvl2_phys_start_addr = @lvl3.phys_start_addr + @lvl3.size_in_byte
+        @lvl2 = new_lvl2(num_lvl2_tables, @lvl2_phys_start_addr)
+
+        populate_lvl2_entries
+    end
+
+    def map_at(virt_region, phys_region, attributes)
+        return if virt_region.empty?
+
+        raise if virt_region.size != phys_region.size
+        raise if phys_region.last > BSP.phys_addr_space_end_page
+
+        virt_region.zip(phys_region).each do |virt_page, phys_page|
+            desc = page_descriptor_from(virt_page)
+            set_lvl3_entry(desc, phys_page, attributes)
+        end
+    end
+
+    def to_binary
+        data = @lvl3.flatten.map(&:to_i) + @lvl2.map(&:to_i)
+        data.pack('Q<*') # "Q" == uint64_t, "<" == little endian
+    end
+
+    def phys_tables_base_addr_binary
+        [@lvl2_phys_start_addr].pack('Q<*') # "Q" == uint64_t, "<" == little endian
+    end
+
+    def phys_tables_base_addr
+        @lvl2_phys_start_addr
+    end
+
+    private
+
+    def do_sanity_checks
+        raise unless BSP.kernel_granule::SIZE == Granule64KiB::SIZE
+        raise unless (BSP.kernel_virt_addr_space_size % Granule512MiB::SIZE).zero?
+    end
+
+    def new_lvl3(num_lvl2_tables, start_addr)
+        CArray.new(start_addr, num_lvl2_tables) do
+            temp = CArray.new(start_addr, 8192) do
+                Stage1PageDescriptor.new
+            end
+            start_addr += temp.size_in_byte
+
+            temp
+        end
+    end
+
+    def new_lvl2(num_lvl2_tables, start_addr)
+        CArray.new(start_addr, num_lvl2_tables) do
+            Stage1TableDescriptor.new
+        end
+    end
+
+    def populate_lvl2_entries
+        @lvl2.each_with_index do |descriptor, i|
+            descriptor.next_level_table_addr = @lvl3[i].phys_start_addr
+            descriptor.type = Stage1TableDescriptor::Type::TABLE
+            descriptor.valid = Stage1TableDescriptor::Valid::TRUE
+        end
+    end
+
+    def lvl2_lvl3_index_from(addr)
+        addr -= BSP.kernel_virt_start_addr
+
+        lvl2_index = addr >> Granule512MiB::SHIFT
+        lvl3_index = (addr & Granule512MiB::MASK) >> Granule64KiB::SHIFT
+
+        raise unless lvl2_index < @lvl2.size
+
+        [lvl2_index, lvl3_index]
+    end
+
+    def page_descriptor_from(virt_addr)
+        lvl2_index, lvl3_index = lvl2_lvl3_index_from(virt_addr)
+
+        @lvl3[lvl2_index][lvl3_index]
+    end
+
+    # rubocop:disable Metrics/MethodLength
+    def set_attributes(desc, attributes)
+        case attributes.mem_attributes
+        when :CacheableDRAM
+            desc.sh = Stage1PageDescriptor::SH::INNER_SHAREABLE
+            desc.attr_indx = MAIR::NORMAL
+        else
+            raise 'Invalid input'
+        end
+
+        desc.ap = case attributes.acc_perms
+                  when :ReadOnly
+                      Stage1PageDescriptor::AP::RO_EL1
+                  when :ReadWrite
+                      Stage1PageDescriptor::AP::RW_EL1
+                  else
+                      raise 'Invalid input'
+
+                  end
+
+        desc.pxn = if attributes.execute_never
+                       Stage1PageDescriptor::PXN::TRUE
+                   else
+                       Stage1PageDescriptor::PXN::FALSE
+                   end
+
+        desc.uxn = Stage1PageDescriptor::UXN::TRUE
+    end
+    # rubocop:enable Metrics/MethodLength
+
+    def set_lvl3_entry(desc, output_addr, attributes)
+        desc.output_addr = output_addr
+        desc.af = Stage1PageDescriptor::AF::TRUE
+        desc.type = Stage1PageDescriptor::Type::PAGE
+        desc.valid = Stage1PageDescriptor::Valid::TRUE
+
+        set_attributes(desc, attributes)
+    end
+end
+end
+end
diff --git a/18_backtrace/tools/translation_table_tool/bsp.rb b/18_backtrace/tools/translation_table_tool/bsp.rb
new file mode 100644
index 000000000..536a2f21d
--- /dev/null
+++ b/18_backtrace/tools/translation_table_tool/bsp.rb
@@ -0,0 +1,50 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+# Raspberry Pi 3 + 4
+class RaspberryPi
+    attr_reader :kernel_granule, :kernel_virt_addr_space_size, :kernel_virt_start_addr
+
+    MEMORY_SRC = File.read('kernel/src/bsp/raspberrypi/memory.rs').split("\n")
+
+    def initialize
+        @kernel_granule = Granule64KiB
+
+        @kernel_virt_addr_space_size = KERNEL_ELF.symbol_value('__kernel_virt_addr_space_size')
+        @kernel_virt_start_addr = KERNEL_ELF.symbol_value('__kernel_virt_start_addr')
+
+        @virt_addr_of_kernel_tables = KERNEL_ELF.symbol_value('KERNEL_TABLES')
+        @virt_addr_of_phys_kernel_tables_base_addr = KERNEL_ELF.symbol_value(
+            'PHYS_KERNEL_TABLES_BASE_ADDR'
+        )
+    end
+
+    def phys_addr_of_kernel_tables
+        KERNEL_ELF.virt_to_phys(@virt_addr_of_kernel_tables)
+    end
+
+    def kernel_tables_offset_in_file
+        KERNEL_ELF.virt_addr_to_file_offset(@virt_addr_of_kernel_tables)
+    end
+
+    def phys_kernel_tables_base_addr_offset_in_file
+        KERNEL_ELF.virt_addr_to_file_offset(@virt_addr_of_phys_kernel_tables_base_addr)
+    end
+
+    def phys_addr_space_end_page
+        x = MEMORY_SRC.grep(/pub const END/)
+        x = case BSP_TYPE
+            when :rpi3
+                x[0]
+            when :rpi4
+                x[1]
+            else
+                raise
+            end
+
+        x.scan(/\d+/).join.to_i(16)
+    end
+end
diff --git a/18_backtrace/tools/translation_table_tool/generic.rb b/18_backtrace/tools/translation_table_tool/generic.rb
new file mode 100644
index 000000000..13df06588
--- /dev/null
+++ b/18_backtrace/tools/translation_table_tool/generic.rb
@@ -0,0 +1,179 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+module Granule64KiB
+    SIZE = 64 * 1024
+    SHIFT = Math.log2(SIZE).to_i
+end
+
+module Granule512MiB
+    SIZE = 512 * 1024 * 1024
+    SHIFT = Math.log2(SIZE).to_i
+    MASK = SIZE - 1
+end
+
+# Monkey-patch Integer with some helper functions.
+class Integer
+    def power_of_two?
+        self[0].zero?
+    end
+
+    def aligned?(alignment)
+        raise unless alignment.power_of_two?
+
+        (self & (alignment - 1)).zero?
+    end
+
+    def align_up(alignment)
+        raise unless alignment.power_of_two?
+
+        (self + alignment - 1) & ~(alignment - 1)
+    end
+
+    def to_hex_underscore(with_leading_zeros: false)
+        fmt = with_leading_zeros ? '%016x' : '%x'
+        value = format(fmt, self).to_s.reverse.scan(/.{4}|.+/).join('_').reverse
+
+        format('0x%s', value)
+    end
+end
+
+# An array where each value is the start address of a Page.
+class MemoryRegion < Array
+    def initialize(start_addr, size, granule_size)
+        raise unless start_addr.aligned?(granule_size)
+        raise unless size.positive?
+        raise unless (size % granule_size).zero?
+
+        num_pages = size / granule_size
+        super(num_pages) do |i|
+            (i * granule_size) + start_addr
+        end
+    end
+end
+
+# Collection of memory attributes.
+class AttributeFields
+    attr_reader :mem_attributes, :acc_perms, :execute_never
+
+    def initialize(mem_attributes, acc_perms, execute_never)
+        @mem_attributes = mem_attributes
+        @acc_perms = acc_perms
+        @execute_never = execute_never
+    end
+
+    def to_s
+        x = case @mem_attributes
+            when :CacheableDRAM
+                'C'
+            else
+                '?'
+            end
+
+        y = case @acc_perms
+            when :ReadWrite
+                'RW'
+            when :ReadOnly
+                'RO'
+            else
+                '??'
+            end
+
+        z = @execute_never ? 'XN' : 'X '
+
+        "#{x} #{y} #{z}"
+    end
+end
+
+# A container that describes a virt-to-phys region mapping.
+class MappingDescriptor
+    @max_section_name_length = 'Sections'.length
+
+    class << self
+        attr_accessor :max_section_name_length
+
+        def update_max_section_name_length(length)
+            @max_section_name_length = [@max_section_name_length, length].max
+        end
+    end
+
+    attr_reader :name, :virt_region, :phys_region, :attributes
+
+    def initialize(name, virt_region, phys_region, attributes)
+        @name = name
+        @virt_region = virt_region
+        @phys_region = phys_region
+        @attributes = attributes
+    end
+
+    def to_s
+        name = @name.ljust(self.class.max_section_name_length)
+        virt_start = @virt_region.first.to_hex_underscore(with_leading_zeros: true)
+        phys_start = @phys_region.first.to_hex_underscore(with_leading_zeros: true)
+        size = ((@virt_region.size * 65_536) / 1024).to_s.rjust(3)
+
+        "#{name} | #{virt_start} | #{phys_start} | #{size} KiB | #{@attributes}"
+    end
+
+    def self.print_divider
+        print '             '
+        print '-' * max_section_name_length
+        puts '--------------------------------------------------------------------'
+    end
+
+    def self.print_header
+        print_divider
+        print '             '
+        print 'Sections'.center(max_section_name_length)
+        print '   '
+        print 'Virt Start Addr'.center(21)
+        print '   '
+        print 'Phys Start Addr'.center(21)
+        print '   '
+        print 'Size'.center(7)
+        print '   '
+        print 'Attr'.center(7)
+        puts
+        print_divider
+    end
+end
+
+def kernel_map_binary
+    mapping_descriptors = KERNEL_ELF.generate_mapping_descriptors
+
+    # Generate_mapping_descriptors updates the header being printed with this call. So it must come
+    # afterwards.
+    MappingDescriptor.print_header
+
+    mapping_descriptors.each do |i|
+        print 'Generating'.rjust(12).green.bold
+        print ' '
+        puts i.to_s
+
+        TRANSLATION_TABLES.map_at(i.virt_region, i.phys_region, i.attributes)
+    end
+
+    MappingDescriptor.print_divider
+end
+
+def kernel_patch_tables(kernel_elf_path)
+    print 'Patching'.rjust(12).green.bold
+    print ' Kernel table struct at ELF file offset '
+    puts BSP.kernel_tables_offset_in_file.to_hex_underscore
+
+    File.binwrite(kernel_elf_path, TRANSLATION_TABLES.to_binary, BSP.kernel_tables_offset_in_file)
+end
+
+def kernel_patch_base_addr(kernel_elf_path)
+    print 'Patching'.rjust(12).green.bold
+    print ' Kernel tables physical base address start argument to value '
+    print TRANSLATION_TABLES.phys_tables_base_addr.to_hex_underscore
+    print ' at ELF file offset '
+    puts BSP.phys_kernel_tables_base_addr_offset_in_file.to_hex_underscore
+
+    File.binwrite(kernel_elf_path, TRANSLATION_TABLES.phys_tables_base_addr_binary,
+                  BSP.phys_kernel_tables_base_addr_offset_in_file)
+end
diff --git a/18_backtrace/tools/translation_table_tool/kernel_elf.rb b/18_backtrace/tools/translation_table_tool/kernel_elf.rb
new file mode 100644
index 000000000..f2d5b0b72
--- /dev/null
+++ b/18_backtrace/tools/translation_table_tool/kernel_elf.rb
@@ -0,0 +1,96 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+# KernelELF
+class KernelELF
+    SECTION_FLAG_ALLOC = 2
+
+    def initialize(kernel_elf_path)
+        @elf = ELFTools::ELFFile.new(File.open(kernel_elf_path))
+        @symtab_section = @elf.section_by_name('.symtab')
+    end
+
+    def machine
+        @elf.machine.to_sym
+    end
+
+    def symbol_value(symbol_name)
+        @symtab_section.symbol_by_name(symbol_name).header.st_value
+    end
+
+    def segment_containing_virt_addr(virt_addr)
+        @elf.each_segments do |segment|
+            return segment if segment.vma_in?(virt_addr)
+        end
+    end
+
+    def virt_to_phys(virt_addr)
+        segment = segment_containing_virt_addr(virt_addr)
+        translation_offset = segment.header.p_vaddr - segment.header.p_paddr
+
+        virt_addr - translation_offset
+    end
+
+    def virt_addr_to_file_offset(virt_addr)
+        segment = segment_containing_virt_addr(virt_addr)
+        segment.vma_to_offset(virt_addr)
+    end
+
+    def sections_in_segment(segment)
+        head = segment.mem_head
+        tail = segment.mem_tail
+
+        sections = @elf.each_sections.select do |section|
+            file_offset = section.header.sh_addr
+            flags = section.header.sh_flags
+
+            file_offset >= head && file_offset < tail && (flags & SECTION_FLAG_ALLOC != 0)
+        end
+
+        sections.map(&:name).join(' ')
+    end
+
+    def select_load_segments
+        @elf.each_segments.select do |segment|
+            segment.instance_of?(ELFTools::Segments::LoadSegment)
+        end
+    end
+
+    def segment_get_acc_perms(segment)
+        if segment.readable? && segment.writable?
+            :ReadWrite
+        elsif segment.readable?
+            :ReadOnly
+        else
+            :Invalid
+        end
+    end
+
+    def update_max_section_name_length(descriptors)
+        MappingDescriptor.update_max_section_name_length(descriptors.map { |i| i.name.size }.max)
+    end
+
+    def generate_mapping_descriptors
+        descriptors = select_load_segments.map do |segment|
+            # Assume each segment is page aligned.
+            size = segment.mem_size.align_up(BSP.kernel_granule::SIZE)
+            virt_start_addr = segment.header.p_vaddr
+            phys_start_addr = segment.header.p_paddr
+            acc_perms = segment_get_acc_perms(segment)
+            execute_never = !segment.executable?
+            section_names = sections_in_segment(segment)
+
+            virt_region = MemoryRegion.new(virt_start_addr, size, BSP.kernel_granule::SIZE)
+            phys_region = MemoryRegion.new(phys_start_addr, size, BSP.kernel_granule::SIZE)
+            attributes = AttributeFields.new(:CacheableDRAM, acc_perms, execute_never)
+
+            MappingDescriptor.new(section_names, virt_region, phys_region, attributes)
+        end
+
+        update_max_section_name_length(descriptors)
+        descriptors
+    end
+end
diff --git a/18_backtrace/tools/translation_table_tool/main.rb b/18_backtrace/tools/translation_table_tool/main.rb
new file mode 100755
index 000000000..6419e364e
--- /dev/null
+++ b/18_backtrace/tools/translation_table_tool/main.rb
@@ -0,0 +1,46 @@
+#!/usr/bin/env ruby
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+require 'rubygems'
+require 'bundler/setup'
+require 'colorize'
+require 'elftools'
+
+require_relative 'generic'
+require_relative 'kernel_elf'
+require_relative 'bsp'
+require_relative 'arch'
+
+BSP_TYPE = ARGV[0].to_sym
+kernel_elf_path = ARGV[1]
+
+start = Time.now
+
+KERNEL_ELF = KernelELF.new(kernel_elf_path)
+
+BSP = case BSP_TYPE
+      when :rpi3, :rpi4
+          RaspberryPi.new
+      else
+          raise
+      end
+
+TRANSLATION_TABLES = case KERNEL_ELF.machine
+                     when :AArch64
+                         Arch::ARMv8::TranslationTable.new
+                     else
+                         raise
+                     end
+
+kernel_map_binary
+kernel_patch_tables(kernel_elf_path)
+kernel_patch_base_addr(kernel_elf_path)
+
+elapsed = Time.now - start
+
+print 'Finished'.rjust(12).green.bold
+puts " in #{elapsed.round(2)}s"
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literal 0
HcmV?d00001


From 9afda2c5b72bfddb86fb9ce733d214b77b408cd6 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 2 May 2022 23:59:55 +0200
Subject: [PATCH 157/214] Add rust-src to toolchain components

---
 rust-toolchain.toml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rust-toolchain.toml b/rust-toolchain.toml
index a24afec20..9667a009c 100644
--- a/rust-toolchain.toml
+++ b/rust-toolchain.toml
@@ -1,4 +1,4 @@
 [toolchain]
 channel = "nightly-2022-04-10"
-components = ["llvm-tools-preview", "rustfmt"]
+components = ["rust-src", "llvm-tools-preview", "rustfmt"]
 targets = ["aarch64-unknown-none-softfloat"]

From f0b7f819af7dbd466fcc62e27eac356dd20ef03a Mon Sep 17 00:00:00 2001
From: Andre Richter <andre-richter@users.noreply.github.com>
Date: Tue, 3 May 2022 00:18:19 +0200
Subject: [PATCH 158/214] Update README.md

---
 18_backtrace/README.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/18_backtrace/README.md b/18_backtrace/README.md
index 0963df1d4..1ea270d87 100644
--- a/18_backtrace/README.md
+++ b/18_backtrace/README.md
@@ -227,7 +227,7 @@ match backtrace_res {
 
 Finally, we add printing of a backtrace to `panic!`:
 
-```
+```rust
 panic_println!(
     "[  {:>3}.{:06}] Kernel panic!\n\n\
     Panic location:\n      File '{}', line {}, column {}\n\n\

From f6190f85b7e1907d06cc79aa6c6b9afa45cae891 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Tue, 3 May 2022 23:53:45 +0200
Subject: [PATCH 159/214] ASM: Remove use of .equ

The LLVM assembler apparently causes the .equ directive to create symbols
instead of just a local and temporary variable.

Work around this by using const operands with global_asm!.
---
 01_wait_forever/src/_arch/aarch64/cpu/boot.rs |   4 +-
 02_runtime_init/README.md                     |  23 +++++---
 02_runtime_init/src/_arch/aarch64/cpu/boot.rs |   7 ++-
 02_runtime_init/src/_arch/aarch64/cpu/boot.s  |   4 +-
 02_runtime_init/src/main.rs                   |   1 +
 03_hacky_hello_world/README.md                |   6 +-
 .../src/_arch/aarch64/cpu/boot.rs             |   7 ++-
 .../src/_arch/aarch64/cpu/boot.s              |   4 +-
 03_hacky_hello_world/src/main.rs              |   1 +
 04_safe_globals/README.md                     |   8 +--
 04_safe_globals/src/_arch/aarch64/cpu/boot.rs |   7 ++-
 04_safe_globals/src/_arch/aarch64/cpu/boot.s  |   4 +-
 04_safe_globals/src/main.rs                   |   1 +
 05_drivers_gpio_uart/README.md                |   6 +-
 .../src/_arch/aarch64/cpu/boot.rs             |   7 ++-
 .../src/_arch/aarch64/cpu/boot.s              |   4 +-
 05_drivers_gpio_uart/src/main.rs              |   1 +
 06_uart_chainloader/README.md                 |   8 +--
 06_uart_chainloader/demo_payload_rpi3.img     | Bin 7960 -> 7960 bytes
 06_uart_chainloader/demo_payload_rpi4.img     | Bin 7872 -> 7872 bytes
 .../src/_arch/aarch64/cpu/boot.rs             |   7 ++-
 .../src/_arch/aarch64/cpu/boot.s              |   4 +-
 06_uart_chainloader/src/main.rs               |   1 +
 07_timestamps/README.md                       |  10 ++--
 07_timestamps/src/_arch/aarch64/cpu/boot.rs   |   7 ++-
 07_timestamps/src/_arch/aarch64/cpu/boot.s    |   4 +-
 07_timestamps/src/main.rs                     |   1 +
 .../src/_arch/aarch64/cpu/boot.rs             |   7 ++-
 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s |   4 +-
 08_hw_debug_JTAG/src/main.rs                  |   1 +
 09_privilege_level/README.md                  |  53 ++++++++----------
 .../src/_arch/aarch64/cpu/boot.rs             |   6 +-
 .../src/_arch/aarch64/cpu/boot.s              |   7 +--
 09_privilege_level/src/main.rs                |   1 +
 .../README.md                                 |  11 ++--
 .../src/_arch/aarch64/cpu/boot.rs             |   6 +-
 .../src/_arch/aarch64/cpu/boot.s              |   7 +--
 .../src/main.rs                               |   1 +
 11_exceptions_part1_groundwork/README.md      |   4 +-
 .../src/_arch/aarch64/cpu/boot.rs             |   6 +-
 .../src/_arch/aarch64/cpu/boot.s              |   7 +--
 11_exceptions_part1_groundwork/src/main.rs    |   1 +
 .../kernel/src/_arch/aarch64/cpu/boot.rs      |   6 +-
 .../kernel/src/_arch/aarch64/cpu/boot.s       |   7 +--
 12_integrated_testing/kernel/src/lib.rs       |   1 +
 13_exceptions_part2_peripheral_IRQs/README.md |  10 +---
 .../kernel/src/_arch/aarch64/cpu/boot.rs      |   6 +-
 .../kernel/src/_arch/aarch64/cpu/boot.s       |   7 +--
 .../kernel/src/_arch/aarch64/cpu/boot.rs      |   6 +-
 .../kernel/src/_arch/aarch64/cpu/boot.s       |   7 +--
 .../README.md                                 |   4 +-
 .../kernel/src/_arch/aarch64/cpu/boot.rs      |   6 +-
 .../kernel/src/_arch/aarch64/cpu/boot.s       |   7 +--
 .../README.md                                 |  14 ++---
 .../kernel/src/_arch/aarch64/cpu/boot.rs      |   6 +-
 .../kernel/src/_arch/aarch64/cpu/boot.s       |   7 +--
 .../kernel/src/_arch/aarch64/cpu/boot.rs      |   6 +-
 .../kernel/src/_arch/aarch64/cpu/boot.s       |   7 +--
 18_backtrace/README.md                        |  25 +++++++--
 .../kernel/src/_arch/aarch64/cpu/boot.rs      |   6 +-
 .../kernel/src/_arch/aarch64/cpu/boot.s       |   7 +--
 .../kernel/src/_arch/aarch64/exception.rs     |   6 +-
 .../kernel/src/_arch/aarch64/exception.s      |   4 +-
 X1_JTAG_boot/jtag_boot_rpi3.img               | Bin 9000 -> 9000 bytes
 X1_JTAG_boot/jtag_boot_rpi4.img               | Bin 7888 -> 7888 bytes
 X1_JTAG_boot/src/_arch/aarch64/cpu/boot.rs    |   7 ++-
 X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s     |   4 +-
 X1_JTAG_boot/src/main.rs                      |   1 +
 68 files changed, 244 insertions(+), 182 deletions(-)

diff --git a/01_wait_forever/src/_arch/aarch64/cpu/boot.rs b/01_wait_forever/src/_arch/aarch64/cpu/boot.rs
index b5cc68fcf..77d3d99fd 100644
--- a/01_wait_forever/src/_arch/aarch64/cpu/boot.rs
+++ b/01_wait_forever/src/_arch/aarch64/cpu/boot.rs
@@ -11,5 +11,7 @@
 //!
 //! crate::cpu::boot::arch_boot
 
+use core::arch::global_asm;
+
 // Assembly counterpart to this file.
-core::arch::global_asm!(include_str!("boot.s"));
+global_asm!(include_str!("boot.s"));
diff --git a/02_runtime_init/README.md b/02_runtime_init/README.md
index 02ed0488b..7e4f5c0a4 100644
--- a/02_runtime_init/README.md
+++ b/02_runtime_init/README.md
@@ -65,10 +65,15 @@ diff -uNr 01_wait_forever/Makefile 02_runtime_init/Makefile
 diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.rs 02_runtime_init/src/_arch/aarch64/cpu/boot.rs
 --- 01_wait_forever/src/_arch/aarch64/cpu/boot.rs
 +++ 02_runtime_init/src/_arch/aarch64/cpu/boot.rs
-@@ -13,3 +13,15 @@
+@@ -14,4 +14,19 @@
+ use core::arch::global_asm;
 
  // Assembly counterpart to this file.
- core::arch::global_asm!(include_str!("boot.s"));
+-global_asm!(include_str!("boot.s"));
++global_asm!(
++    include_str!("boot.s"),
++    CONST_CORE_ID_MASK = const 0b11
++);
 +
 +//--------------------------------------------------------------------------------------------------
 +// Public Code
@@ -85,7 +90,7 @@ diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.rs 02_runtime_init/src/_arc
 diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.s 02_runtime_init/src/_arch/aarch64/cpu/boot.s
 --- 01_wait_forever/src/_arch/aarch64/cpu/boot.s
 +++ 02_runtime_init/src/_arch/aarch64/cpu/boot.s
-@@ -3,6 +3,24 @@
+@@ -3,6 +3,22 @@
  // Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
  //--------------------------------------------------------------------------------------------------
@@ -104,19 +109,17 @@ diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.s 02_runtime_init/src/_arch
 +	add	\register, \register, #:lo12:\symbol
 +.endm
 +
-+.equ _core_id_mask, 0b11
-+
 +//--------------------------------------------------------------------------------------------------
  // Public Code
  //--------------------------------------------------------------------------------------------------
  .section .text._start
-@@ -11,6 +29,34 @@
+@@ -11,6 +27,34 @@
  // fn _start()
  //------------------------------------------------------------------------------
  _start:
 +	// Only proceed on the boot core. Park it otherwise.
 +	mrs	x1, MPIDR_EL1
-+	and	x1, x1, _core_id_mask
++	and	x1, x1, {CONST_CORE_ID_MASK}
 +	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 +	cmp	x1, x2
 +	b.ne	.L_parking_loop
@@ -302,15 +305,17 @@ diff -uNr 01_wait_forever/src/cpu.rs 02_runtime_init/src/cpu.rs
 diff -uNr 01_wait_forever/src/main.rs 02_runtime_init/src/main.rs
 --- 01_wait_forever/src/main.rs
 +++ 02_runtime_init/src/main.rs
-@@ -104,6 +104,7 @@
+@@ -104,7 +104,9 @@
  //!
  //! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
  //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
 +//! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
++#![feature(asm_const)]
  #![no_main]
  #![no_std]
-@@ -112,4 +113,11 @@
+
+@@ -112,4 +114,11 @@
  mod cpu;
  mod panic_wait;
 
diff --git a/02_runtime_init/src/_arch/aarch64/cpu/boot.rs b/02_runtime_init/src/_arch/aarch64/cpu/boot.rs
index 2f9654c7f..8390c0132 100644
--- a/02_runtime_init/src/_arch/aarch64/cpu/boot.rs
+++ b/02_runtime_init/src/_arch/aarch64/cpu/boot.rs
@@ -11,8 +11,13 @@
 //!
 //! crate::cpu::boot::arch_boot
 
+use core::arch::global_asm;
+
 // Assembly counterpart to this file.
-core::arch::global_asm!(include_str!("boot.s"));
+global_asm!(
+    include_str!("boot.s"),
+    CONST_CORE_ID_MASK = const 0b11
+);
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/02_runtime_init/src/_arch/aarch64/cpu/boot.s b/02_runtime_init/src/_arch/aarch64/cpu/boot.s
index 7d445a935..1f70169f9 100644
--- a/02_runtime_init/src/_arch/aarch64/cpu/boot.s
+++ b/02_runtime_init/src/_arch/aarch64/cpu/boot.s
@@ -18,8 +18,6 @@
 	add	\register, \register, #:lo12:\symbol
 .endm
 
-.equ _core_id_mask, 0b11
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -31,7 +29,7 @@
 _start:
 	// Only proceed on the boot core. Park it otherwise.
 	mrs	x1, MPIDR_EL1
-	and	x1, x1, _core_id_mask
+	and	x1, x1, {CONST_CORE_ID_MASK}
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
 	b.ne	.L_parking_loop
diff --git a/02_runtime_init/src/main.rs b/02_runtime_init/src/main.rs
index 42653ac40..e16354ed6 100644
--- a/02_runtime_init/src/main.rs
+++ b/02_runtime_init/src/main.rs
@@ -106,6 +106,7 @@
 //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
 //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
+#![feature(asm_const)]
 #![no_main]
 #![no_std]
 
diff --git a/03_hacky_hello_world/README.md b/03_hacky_hello_world/README.md
index 30a717e89..d868459ff 100644
--- a/03_hacky_hello_world/README.md
+++ b/03_hacky_hello_world/README.md
@@ -212,10 +212,10 @@ diff -uNr 02_runtime_init/src/console.rs 03_hacky_hello_world/src/console.rs
 diff -uNr 02_runtime_init/src/main.rs 03_hacky_hello_world/src/main.rs
 --- 02_runtime_init/src/main.rs
 +++ 03_hacky_hello_world/src/main.rs
-@@ -106,12 +106,16 @@
- //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
+@@ -107,12 +107,16 @@
  //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
+ #![feature(asm_const)]
 +#![feature(format_args_nl)]
 +#![feature(panic_info_message)]
  #![no_main]
@@ -229,7 +229,7 @@ diff -uNr 02_runtime_init/src/main.rs 03_hacky_hello_world/src/main.rs
 
  /// Early init code.
  ///
-@@ -119,5 +123,7 @@
+@@ -120,5 +124,7 @@
  ///
  /// - Only a single core must be active and running this function.
  unsafe fn kernel_init() -> ! {
diff --git a/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.rs b/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.rs
index 2f9654c7f..8390c0132 100644
--- a/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.rs
+++ b/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.rs
@@ -11,8 +11,13 @@
 //!
 //! crate::cpu::boot::arch_boot
 
+use core::arch::global_asm;
+
 // Assembly counterpart to this file.
-core::arch::global_asm!(include_str!("boot.s"));
+global_asm!(
+    include_str!("boot.s"),
+    CONST_CORE_ID_MASK = const 0b11
+);
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.s b/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.s
index 7d445a935..1f70169f9 100644
--- a/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.s
+++ b/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.s
@@ -18,8 +18,6 @@
 	add	\register, \register, #:lo12:\symbol
 .endm
 
-.equ _core_id_mask, 0b11
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -31,7 +29,7 @@
 _start:
 	// Only proceed on the boot core. Park it otherwise.
 	mrs	x1, MPIDR_EL1
-	and	x1, x1, _core_id_mask
+	and	x1, x1, {CONST_CORE_ID_MASK}
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
 	b.ne	.L_parking_loop
diff --git a/03_hacky_hello_world/src/main.rs b/03_hacky_hello_world/src/main.rs
index 67b0551bd..74b621de3 100644
--- a/03_hacky_hello_world/src/main.rs
+++ b/03_hacky_hello_world/src/main.rs
@@ -106,6 +106,7 @@
 //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
 //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
+#![feature(asm_const)]
 #![feature(format_args_nl)]
 #![feature(panic_info_message)]
 #![no_main]
diff --git a/04_safe_globals/README.md b/04_safe_globals/README.md
index 8eff4a678..18827b5c1 100644
--- a/04_safe_globals/README.md
+++ b/04_safe_globals/README.md
@@ -224,15 +224,15 @@ diff -uNr 03_hacky_hello_world/src/console.rs 04_safe_globals/src/console.rs
 diff -uNr 03_hacky_hello_world/src/main.rs 04_safe_globals/src/main.rs
 --- 03_hacky_hello_world/src/main.rs
 +++ 04_safe_globals/src/main.rs
-@@ -108,6 +108,7 @@
-
+@@ -109,6 +109,7 @@
+ #![feature(asm_const)]
  #![feature(format_args_nl)]
  #![feature(panic_info_message)]
 +#![feature(trait_alias)]
  #![no_main]
  #![no_std]
 
-@@ -116,6 +117,7 @@
+@@ -117,6 +118,7 @@
  mod cpu;
  mod panic_wait;
  mod print;
@@ -240,7 +240,7 @@ diff -uNr 03_hacky_hello_world/src/main.rs 04_safe_globals/src/main.rs
 
  /// Early init code.
  ///
-@@ -123,7 +125,15 @@
+@@ -124,7 +126,15 @@
  ///
  /// - Only a single core must be active and running this function.
  unsafe fn kernel_init() -> ! {
diff --git a/04_safe_globals/src/_arch/aarch64/cpu/boot.rs b/04_safe_globals/src/_arch/aarch64/cpu/boot.rs
index 2f9654c7f..8390c0132 100644
--- a/04_safe_globals/src/_arch/aarch64/cpu/boot.rs
+++ b/04_safe_globals/src/_arch/aarch64/cpu/boot.rs
@@ -11,8 +11,13 @@
 //!
 //! crate::cpu::boot::arch_boot
 
+use core::arch::global_asm;
+
 // Assembly counterpart to this file.
-core::arch::global_asm!(include_str!("boot.s"));
+global_asm!(
+    include_str!("boot.s"),
+    CONST_CORE_ID_MASK = const 0b11
+);
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/04_safe_globals/src/_arch/aarch64/cpu/boot.s b/04_safe_globals/src/_arch/aarch64/cpu/boot.s
index 7d445a935..1f70169f9 100644
--- a/04_safe_globals/src/_arch/aarch64/cpu/boot.s
+++ b/04_safe_globals/src/_arch/aarch64/cpu/boot.s
@@ -18,8 +18,6 @@
 	add	\register, \register, #:lo12:\symbol
 .endm
 
-.equ _core_id_mask, 0b11
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -31,7 +29,7 @@
 _start:
 	// Only proceed on the boot core. Park it otherwise.
 	mrs	x1, MPIDR_EL1
-	and	x1, x1, _core_id_mask
+	and	x1, x1, {CONST_CORE_ID_MASK}
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
 	b.ne	.L_parking_loop
diff --git a/04_safe_globals/src/main.rs b/04_safe_globals/src/main.rs
index b45e3a350..15db4a217 100644
--- a/04_safe_globals/src/main.rs
+++ b/04_safe_globals/src/main.rs
@@ -106,6 +106,7 @@
 //!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
 //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
+#![feature(asm_const)]
 #![feature(format_args_nl)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
diff --git a/05_drivers_gpio_uart/README.md b/05_drivers_gpio_uart/README.md
index 5787ac124..6f0057d60 100644
--- a/05_drivers_gpio_uart/README.md
+++ b/05_drivers_gpio_uart/README.md
@@ -1342,10 +1342,10 @@ diff -uNr 04_safe_globals/src/main.rs 05_drivers_gpio_uart/src/main.rs
  //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
 +#![allow(clippy::upper_case_acronyms)]
+ #![feature(asm_const)]
  #![feature(format_args_nl)]
  #![feature(panic_info_message)]
- #![feature(trait_alias)]
-@@ -115,6 +116,7 @@
+@@ -116,6 +117,7 @@
  mod bsp;
  mod console;
  mod cpu;
@@ -1353,7 +1353,7 @@ diff -uNr 04_safe_globals/src/main.rs 05_drivers_gpio_uart/src/main.rs
  mod panic_wait;
  mod print;
  mod synchronization;
-@@ -124,16 +126,54 @@
+@@ -125,16 +127,54 @@
  /// # Safety
  ///
  /// - Only a single core must be active and running this function.
diff --git a/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs b/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs
index 2f9654c7f..8390c0132 100644
--- a/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs
+++ b/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs
@@ -11,8 +11,13 @@
 //!
 //! crate::cpu::boot::arch_boot
 
+use core::arch::global_asm;
+
 // Assembly counterpart to this file.
-core::arch::global_asm!(include_str!("boot.s"));
+global_asm!(
+    include_str!("boot.s"),
+    CONST_CORE_ID_MASK = const 0b11
+);
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s b/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s
index 7d445a935..1f70169f9 100644
--- a/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s
+++ b/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s
@@ -18,8 +18,6 @@
 	add	\register, \register, #:lo12:\symbol
 .endm
 
-.equ _core_id_mask, 0b11
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -31,7 +29,7 @@
 _start:
 	// Only proceed on the boot core. Park it otherwise.
 	mrs	x1, MPIDR_EL1
-	and	x1, x1, _core_id_mask
+	and	x1, x1, {CONST_CORE_ID_MASK}
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
 	b.ne	.L_parking_loop
diff --git a/05_drivers_gpio_uart/src/main.rs b/05_drivers_gpio_uart/src/main.rs
index 9ee5a43c9..2e8bfeaab 100644
--- a/05_drivers_gpio_uart/src/main.rs
+++ b/05_drivers_gpio_uart/src/main.rs
@@ -107,6 +107,7 @@
 //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
 #![allow(clippy::upper_case_acronyms)]
+#![feature(asm_const)]
 #![feature(format_args_nl)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
diff --git a/06_uart_chainloader/README.md b/06_uart_chainloader/README.md
index 8c21ccfa8..20c120d42 100644
--- a/06_uart_chainloader/README.md
+++ b/06_uart_chainloader/README.md
@@ -277,10 +277,10 @@ diff -uNr 05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s 06_uart_chainloader/
 +	movk	\register, #:abs_g0_nc:\symbol
 +.endm
 +
- .equ _core_id_mask, 0b11
-
  //--------------------------------------------------------------------------------------------------
-@@ -39,23 +50,35 @@
+ // Public Code
+ //--------------------------------------------------------------------------------------------------
+@@ -37,23 +48,35 @@
  	// If execution reaches here, it is the boot core.
 
  	// Initialize DRAM.
@@ -457,7 +457,7 @@ diff -uNr 05_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs 06_uart_chainloader
 diff -uNr 05_drivers_gpio_uart/src/main.rs 06_uart_chainloader/src/main.rs
 --- 05_drivers_gpio_uart/src/main.rs
 +++ 06_uart_chainloader/src/main.rs
-@@ -142,38 +142,56 @@
+@@ -143,38 +143,56 @@
      kernel_main()
  }
 
diff --git a/06_uart_chainloader/demo_payload_rpi3.img b/06_uart_chainloader/demo_payload_rpi3.img
index b422ad25ac3df2dfa5f0d19917a13ebc15e3944a..1da3bec56b3f76bf826e7d2f7f8c513059965b8c 100755
GIT binary patch
delta 14
VcmbPXH^Xj&gbZWHW=Wa<OaLcT1p@#8

delta 14
VcmbPXH^Xj&gbZWrW=Wa<OaLcB1poj5

diff --git a/06_uart_chainloader/demo_payload_rpi4.img b/06_uart_chainloader/demo_payload_rpi4.img
index 173debe6238f9e92465a494719602bded0577b33..f76cbd1fa891b177444764c8d47c4fd43c13526d 100755
GIT binary patch
delta 14
VcmX?Ld%$*sg)C#oW=q+2MgS}Z1sVVV

delta 14
VcmX?Ld%$*sg)C$1W=q+2MgS}H1s4DS

diff --git a/06_uart_chainloader/src/_arch/aarch64/cpu/boot.rs b/06_uart_chainloader/src/_arch/aarch64/cpu/boot.rs
index 2f9654c7f..8390c0132 100644
--- a/06_uart_chainloader/src/_arch/aarch64/cpu/boot.rs
+++ b/06_uart_chainloader/src/_arch/aarch64/cpu/boot.rs
@@ -11,8 +11,13 @@
 //!
 //! crate::cpu::boot::arch_boot
 
+use core::arch::global_asm;
+
 // Assembly counterpart to this file.
-core::arch::global_asm!(include_str!("boot.s"));
+global_asm!(
+    include_str!("boot.s"),
+    CONST_CORE_ID_MASK = const 0b11
+);
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/06_uart_chainloader/src/_arch/aarch64/cpu/boot.s b/06_uart_chainloader/src/_arch/aarch64/cpu/boot.s
index 74dcdfbe6..322573cad 100644
--- a/06_uart_chainloader/src/_arch/aarch64/cpu/boot.s
+++ b/06_uart_chainloader/src/_arch/aarch64/cpu/boot.s
@@ -29,8 +29,6 @@
 	movk	\register, #:abs_g0_nc:\symbol
 .endm
 
-.equ _core_id_mask, 0b11
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -42,7 +40,7 @@
 _start:
 	// Only proceed on the boot core. Park it otherwise.
 	mrs	x1, MPIDR_EL1
-	and	x1, x1, _core_id_mask
+	and	x1, x1, {CONST_CORE_ID_MASK}
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
 	b.ne	.L_parking_loop
diff --git a/06_uart_chainloader/src/main.rs b/06_uart_chainloader/src/main.rs
index 21ee91a4e..b8e6fea49 100644
--- a/06_uart_chainloader/src/main.rs
+++ b/06_uart_chainloader/src/main.rs
@@ -107,6 +107,7 @@
 //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
 #![allow(clippy::upper_case_acronyms)]
+#![feature(asm_const)]
 #![feature(format_args_nl)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index 7bfa13dda..6b8dcbeb0 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -178,10 +178,10 @@ diff -uNr 06_uart_chainloader/src/_arch/aarch64/cpu/boot.s 07_timestamps/src/_ar
 -	movk	\register, #:abs_g0_nc:\symbol
 -.endm
 -
- .equ _core_id_mask, 0b11
-
  //--------------------------------------------------------------------------------------------------
-@@ -50,35 +39,23 @@
+ // Public Code
+ //--------------------------------------------------------------------------------------------------
+@@ -48,35 +37,23 @@
  	// If execution reaches here, it is the boot core.
 
  	// Initialize DRAM.
@@ -538,7 +538,7 @@ diff -uNr 06_uart_chainloader/src/cpu.rs 07_timestamps/src/cpu.rs
 diff -uNr 06_uart_chainloader/src/main.rs 07_timestamps/src/main.rs
 --- 06_uart_chainloader/src/main.rs
 +++ 07_timestamps/src/main.rs
-@@ -120,6 +120,7 @@
+@@ -121,6 +121,7 @@
  mod panic_wait;
  mod print;
  mod synchronization;
@@ -546,7 +546,7 @@ diff -uNr 06_uart_chainloader/src/main.rs 07_timestamps/src/main.rs
 
  /// Early init code.
  ///
-@@ -142,56 +143,38 @@
+@@ -143,56 +144,38 @@
      kernel_main()
  }
 
diff --git a/07_timestamps/src/_arch/aarch64/cpu/boot.rs b/07_timestamps/src/_arch/aarch64/cpu/boot.rs
index 2f9654c7f..8390c0132 100644
--- a/07_timestamps/src/_arch/aarch64/cpu/boot.rs
+++ b/07_timestamps/src/_arch/aarch64/cpu/boot.rs
@@ -11,8 +11,13 @@
 //!
 //! crate::cpu::boot::arch_boot
 
+use core::arch::global_asm;
+
 // Assembly counterpart to this file.
-core::arch::global_asm!(include_str!("boot.s"));
+global_asm!(
+    include_str!("boot.s"),
+    CONST_CORE_ID_MASK = const 0b11
+);
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/07_timestamps/src/_arch/aarch64/cpu/boot.s b/07_timestamps/src/_arch/aarch64/cpu/boot.s
index 7d445a935..1f70169f9 100644
--- a/07_timestamps/src/_arch/aarch64/cpu/boot.s
+++ b/07_timestamps/src/_arch/aarch64/cpu/boot.s
@@ -18,8 +18,6 @@
 	add	\register, \register, #:lo12:\symbol
 .endm
 
-.equ _core_id_mask, 0b11
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -31,7 +29,7 @@
 _start:
 	// Only proceed on the boot core. Park it otherwise.
 	mrs	x1, MPIDR_EL1
-	and	x1, x1, _core_id_mask
+	and	x1, x1, {CONST_CORE_ID_MASK}
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
 	b.ne	.L_parking_loop
diff --git a/07_timestamps/src/main.rs b/07_timestamps/src/main.rs
index 1805414b7..9ecf3f97a 100644
--- a/07_timestamps/src/main.rs
+++ b/07_timestamps/src/main.rs
@@ -107,6 +107,7 @@
 //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
 #![allow(clippy::upper_case_acronyms)]
+#![feature(asm_const)]
 #![feature(format_args_nl)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
diff --git a/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs b/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs
index 2f9654c7f..8390c0132 100644
--- a/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs
+++ b/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs
@@ -11,8 +11,13 @@
 //!
 //! crate::cpu::boot::arch_boot
 
+use core::arch::global_asm;
+
 // Assembly counterpart to this file.
-core::arch::global_asm!(include_str!("boot.s"));
+global_asm!(
+    include_str!("boot.s"),
+    CONST_CORE_ID_MASK = const 0b11
+);
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s b/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s
index 7d445a935..1f70169f9 100644
--- a/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s
+++ b/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s
@@ -18,8 +18,6 @@
 	add	\register, \register, #:lo12:\symbol
 .endm
 
-.equ _core_id_mask, 0b11
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -31,7 +29,7 @@
 _start:
 	// Only proceed on the boot core. Park it otherwise.
 	mrs	x1, MPIDR_EL1
-	and	x1, x1, _core_id_mask
+	and	x1, x1, {CONST_CORE_ID_MASK}
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
 	b.ne	.L_parking_loop
diff --git a/08_hw_debug_JTAG/src/main.rs b/08_hw_debug_JTAG/src/main.rs
index 1805414b7..9ecf3f97a 100644
--- a/08_hw_debug_JTAG/src/main.rs
+++ b/08_hw_debug_JTAG/src/main.rs
@@ -107,6 +107,7 @@
 //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
 #![allow(clippy::upper_case_acronyms)]
+#![feature(asm_const)]
 #![feature(format_args_nl)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
diff --git a/09_privilege_level/README.md b/09_privilege_level/README.md
index 5b0f72c7f..2320dfd79 100644
--- a/09_privilege_level/README.md
+++ b/09_privilege_level/README.md
@@ -50,8 +50,8 @@ core should it not be in `EL2`.
 ```
 // Only proceed if the core executes in EL2. Park it otherwise.
 mrs	x0, CurrentEL
-cmp	x0, _EL2
-b.ne	1f
+cmp	x0, {CONST_CURRENTEL_EL2}
+b.ne	.L_parking_loop
 ```
 
 Afterwards, we continue with preparing the `EL2` -> `EL1` transition by calling
@@ -211,19 +211,21 @@ diff -uNr 08_hw_debug_JTAG/Cargo.toml 09_privilege_level/Cargo.toml
 diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs 09_privilege_level/src/_arch/aarch64/cpu/boot.rs
 --- 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs
 +++ 09_privilege_level/src/_arch/aarch64/cpu/boot.rs
-@@ -11,8 +11,53 @@
- //!
+@@ -12,21 +12,72 @@
  //! crate::cpu::boot::arch_boot
 
-+use core::arch::global_asm;
+ use core::arch::global_asm;
 +use cortex_a::{asm, registers::*};
 +use tock_registers::interfaces::Writeable;
-+
+
  // Assembly counterpart to this file.
--core::arch::global_asm!(include_str!("boot.s"));
-+global_asm!(include_str!("boot.s"));
-+
-+//--------------------------------------------------------------------------------------------------
+ global_asm!(
+     include_str!("boot.s"),
++    CONST_CURRENTEL_EL2 = const 0x8,
+     CONST_CORE_ID_MASK = const 0b11
+ );
+
+ //--------------------------------------------------------------------------------------------------
 +// Private Code
 +//--------------------------------------------------------------------------------------------------
 +
@@ -263,10 +265,11 @@ diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs 09_privilege_level/src/
 +    // are no plans to ever return to EL2, just re-use the same stack.
 +    SP_EL1.set(phys_boot_core_stack_end_exclusive_addr);
 +}
-
- //--------------------------------------------------------------------------------------------------
++
++//--------------------------------------------------------------------------------------------------
  // Public Code
-@@ -21,7 +66,14 @@
+ //--------------------------------------------------------------------------------------------------
+
  /// The Rust entry of the `kernel` binary.
  ///
  /// The function is called from the assembly `_start` function.
@@ -287,27 +290,19 @@ diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs 09_privilege_level/src/
 diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s 09_privilege_level/src/_arch/aarch64/cpu/boot.s
 --- 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s
 +++ 09_privilege_level/src/_arch/aarch64/cpu/boot.s
-@@ -18,6 +18,7 @@
- 	add	\register, \register, #:lo12:\symbol
- .endm
-
-+.equ _EL2, 0x8
- .equ _core_id_mask, 0b11
-
- //--------------------------------------------------------------------------------------------------
-@@ -29,6 +30,11 @@
+@@ -27,6 +27,11 @@
  // fn _start()
  //------------------------------------------------------------------------------
  _start:
 +	// Only proceed if the core executes in EL2. Park it otherwise.
 +	mrs	x0, CurrentEL
-+	cmp	x0, _EL2
++	cmp	x0, {CONST_CURRENTEL_EL2}
 +	b.ne	.L_parking_loop
 +
  	// Only proceed on the boot core. Park it otherwise.
  	mrs	x1, MPIDR_EL1
- 	and	x1, x1, _core_id_mask
-@@ -50,11 +56,11 @@
+ 	and	x1, x1, {CONST_CORE_ID_MASK}
+@@ -48,11 +53,11 @@
 
  	// Prepare the jump to Rust code.
  .L_prepare_rust:
@@ -502,7 +497,7 @@ diff -uNr 08_hw_debug_JTAG/src/exception.rs 09_privilege_level/src/exception.rs
 diff -uNr 08_hw_debug_JTAG/src/main.rs 09_privilege_level/src/main.rs
 --- 08_hw_debug_JTAG/src/main.rs
 +++ 09_privilege_level/src/main.rs
-@@ -117,6 +117,7 @@
+@@ -118,6 +118,7 @@
  mod console;
  mod cpu;
  mod driver;
@@ -510,7 +505,7 @@ diff -uNr 08_hw_debug_JTAG/src/main.rs 09_privilege_level/src/main.rs
  mod panic_wait;
  mod print;
  mod synchronization;
-@@ -145,6 +146,8 @@
+@@ -146,6 +147,8 @@
 
  /// The main function running after the early init.
  fn kernel_main() -> ! {
@@ -519,7 +514,7 @@ diff -uNr 08_hw_debug_JTAG/src/main.rs 09_privilege_level/src/main.rs
      use core::time::Duration;
      use driver::interface::DriverManager;
      use time::interface::TimeManager;
-@@ -156,6 +159,12 @@
+@@ -157,6 +160,12 @@
      );
      info!("Booting on: {}", bsp::board_name());
 
@@ -532,7 +527,7 @@ diff -uNr 08_hw_debug_JTAG/src/main.rs 09_privilege_level/src/main.rs
      info!(
          "Architectural timer resolution: {} ns",
          time::time_manager().resolution().as_nanos()
-@@ -170,11 +179,15 @@
+@@ -171,11 +180,15 @@
          info!("      {}. {}", i + 1, driver.compatible());
      }
 
diff --git a/09_privilege_level/src/_arch/aarch64/cpu/boot.rs b/09_privilege_level/src/_arch/aarch64/cpu/boot.rs
index f677c9c4b..0bf45b837 100644
--- a/09_privilege_level/src/_arch/aarch64/cpu/boot.rs
+++ b/09_privilege_level/src/_arch/aarch64/cpu/boot.rs
@@ -16,7 +16,11 @@ use cortex_a::{asm, registers::*};
 use tock_registers::interfaces::Writeable;
 
 // Assembly counterpart to this file.
-global_asm!(include_str!("boot.s"));
+global_asm!(
+    include_str!("boot.s"),
+    CONST_CURRENTEL_EL2 = const 0x8,
+    CONST_CORE_ID_MASK = const 0b11
+);
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
diff --git a/09_privilege_level/src/_arch/aarch64/cpu/boot.s b/09_privilege_level/src/_arch/aarch64/cpu/boot.s
index 28b35087c..7576dc145 100644
--- a/09_privilege_level/src/_arch/aarch64/cpu/boot.s
+++ b/09_privilege_level/src/_arch/aarch64/cpu/boot.s
@@ -18,9 +18,6 @@
 	add	\register, \register, #:lo12:\symbol
 .endm
 
-.equ _EL2, 0x8
-.equ _core_id_mask, 0b11
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -32,12 +29,12 @@
 _start:
 	// Only proceed if the core executes in EL2. Park it otherwise.
 	mrs	x0, CurrentEL
-	cmp	x0, _EL2
+	cmp	x0, {CONST_CURRENTEL_EL2}
 	b.ne	.L_parking_loop
 
 	// Only proceed on the boot core. Park it otherwise.
 	mrs	x1, MPIDR_EL1
-	and	x1, x1, _core_id_mask
+	and	x1, x1, {CONST_CORE_ID_MASK}
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
 	b.ne	.L_parking_loop
diff --git a/09_privilege_level/src/main.rs b/09_privilege_level/src/main.rs
index b1b1bc27e..0c6a0decb 100644
--- a/09_privilege_level/src/main.rs
+++ b/09_privilege_level/src/main.rs
@@ -107,6 +107,7 @@
 //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
 #![allow(clippy::upper_case_acronyms)]
+#![feature(asm_const)]
 #![feature(format_args_nl)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
diff --git a/10_virtual_mem_part1_identity_mapping/README.md b/10_virtual_mem_part1_identity_mapping/README.md
index 3a5539c95..802243c8d 100644
--- a/10_virtual_mem_part1_identity_mapping/README.md
+++ b/10_virtual_mem_part1_identity_mapping/README.md
@@ -1081,16 +1081,17 @@ diff -uNr 09_privilege_level/src/bsp.rs 10_virtual_mem_part1_identity_mapping/sr
 diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/src/main.rs
 --- 09_privilege_level/src/main.rs
 +++ 10_virtual_mem_part1_identity_mapping/src/main.rs
-@@ -107,6 +107,8 @@
+@@ -107,7 +107,9 @@
  //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
  #![allow(clippy::upper_case_acronyms)]
 +#![allow(incomplete_features)]
+ #![feature(asm_const)]
 +#![feature(core_intrinsics)]
  #![feature(format_args_nl)]
  #![feature(panic_info_message)]
  #![feature(trait_alias)]
-@@ -118,6 +120,7 @@
+@@ -119,6 +121,7 @@
  mod cpu;
  mod driver;
  mod exception;
@@ -1098,7 +1099,7 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
  mod panic_wait;
  mod print;
  mod synchronization;
-@@ -128,9 +131,17 @@
+@@ -129,9 +132,17 @@
  /// # Safety
  ///
  /// - Only a single core must be active and running this function.
@@ -1117,7 +1118,7 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
 
      for i in bsp::driver::driver_manager().all_device_drivers().iter() {
          if let Err(x) = i.init() {
-@@ -159,6 +170,9 @@
+@@ -160,6 +171,9 @@
      );
      info!("Booting on: {}", bsp::board_name());
 
@@ -1127,7 +1128,7 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
      let (_, privilege_level) = exception::current_privilege_level();
      info!("Current privilege level: {}", privilege_level);
 
-@@ -182,6 +196,13 @@
+@@ -183,6 +197,13 @@
      info!("Timer test, spinning for 1 second");
      time::time_manager().spin_for(Duration::from_secs(1));
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs
index f677c9c4b..0bf45b837 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs
@@ -16,7 +16,11 @@ use cortex_a::{asm, registers::*};
 use tock_registers::interfaces::Writeable;
 
 // Assembly counterpart to this file.
-global_asm!(include_str!("boot.s"));
+global_asm!(
+    include_str!("boot.s"),
+    CONST_CURRENTEL_EL2 = const 0x8,
+    CONST_CORE_ID_MASK = const 0b11
+);
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.s b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.s
index 28b35087c..7576dc145 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.s
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.s
@@ -18,9 +18,6 @@
 	add	\register, \register, #:lo12:\symbol
 .endm
 
-.equ _EL2, 0x8
-.equ _core_id_mask, 0b11
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -32,12 +29,12 @@
 _start:
 	// Only proceed if the core executes in EL2. Park it otherwise.
 	mrs	x0, CurrentEL
-	cmp	x0, _EL2
+	cmp	x0, {CONST_CURRENTEL_EL2}
 	b.ne	.L_parking_loop
 
 	// Only proceed on the boot core. Park it otherwise.
 	mrs	x1, MPIDR_EL1
-	and	x1, x1, _core_id_mask
+	and	x1, x1, {CONST_CORE_ID_MASK}
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
 	b.ne	.L_parking_loop
diff --git a/10_virtual_mem_part1_identity_mapping/src/main.rs b/10_virtual_mem_part1_identity_mapping/src/main.rs
index 327f3ce04..dde224e7b 100644
--- a/10_virtual_mem_part1_identity_mapping/src/main.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/main.rs
@@ -108,6 +108,7 @@
 
 #![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
+#![feature(asm_const)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(panic_info_message)]
diff --git a/11_exceptions_part1_groundwork/README.md b/11_exceptions_part1_groundwork/README.md
index d0b86c555..81e633bef 100644
--- a/11_exceptions_part1_groundwork/README.md
+++ b/11_exceptions_part1_groundwork/README.md
@@ -1024,7 +1024,7 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/exception.rs 11_exceptions_p
 diff -uNr 10_virtual_mem_part1_identity_mapping/src/main.rs 11_exceptions_part1_groundwork/src/main.rs
 --- 10_virtual_mem_part1_identity_mapping/src/main.rs
 +++ 11_exceptions_part1_groundwork/src/main.rs
-@@ -139,6 +139,8 @@
+@@ -140,6 +140,8 @@
      use driver::interface::DriverManager;
      use memory::mmu::interface::MMU;
 
@@ -1033,7 +1033,7 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/main.rs 11_exceptions_part1_
      if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
          panic!("MMU: {}", string);
      }
-@@ -196,13 +198,28 @@
+@@ -197,13 +199,28 @@
      info!("Timer test, spinning for 1 second");
      time::time_manager().spin_for(Duration::from_secs(1));
 
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs
index f677c9c4b..0bf45b837 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs
@@ -16,7 +16,11 @@ use cortex_a::{asm, registers::*};
 use tock_registers::interfaces::Writeable;
 
 // Assembly counterpart to this file.
-global_asm!(include_str!("boot.s"));
+global_asm!(
+    include_str!("boot.s"),
+    CONST_CURRENTEL_EL2 = const 0x8,
+    CONST_CORE_ID_MASK = const 0b11
+);
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.s b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.s
index 28b35087c..7576dc145 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.s
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.s
@@ -18,9 +18,6 @@
 	add	\register, \register, #:lo12:\symbol
 .endm
 
-.equ _EL2, 0x8
-.equ _core_id_mask, 0b11
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -32,12 +29,12 @@
 _start:
 	// Only proceed if the core executes in EL2. Park it otherwise.
 	mrs	x0, CurrentEL
-	cmp	x0, _EL2
+	cmp	x0, {CONST_CURRENTEL_EL2}
 	b.ne	.L_parking_loop
 
 	// Only proceed on the boot core. Park it otherwise.
 	mrs	x1, MPIDR_EL1
-	and	x1, x1, _core_id_mask
+	and	x1, x1, {CONST_CORE_ID_MASK}
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
 	b.ne	.L_parking_loop
diff --git a/11_exceptions_part1_groundwork/src/main.rs b/11_exceptions_part1_groundwork/src/main.rs
index 0c88c58e4..967436014 100644
--- a/11_exceptions_part1_groundwork/src/main.rs
+++ b/11_exceptions_part1_groundwork/src/main.rs
@@ -108,6 +108,7 @@
 
 #![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
+#![feature(asm_const)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(panic_info_message)]
diff --git a/12_integrated_testing/kernel/src/_arch/aarch64/cpu/boot.rs b/12_integrated_testing/kernel/src/_arch/aarch64/cpu/boot.rs
index f677c9c4b..0bf45b837 100644
--- a/12_integrated_testing/kernel/src/_arch/aarch64/cpu/boot.rs
+++ b/12_integrated_testing/kernel/src/_arch/aarch64/cpu/boot.rs
@@ -16,7 +16,11 @@ use cortex_a::{asm, registers::*};
 use tock_registers::interfaces::Writeable;
 
 // Assembly counterpart to this file.
-global_asm!(include_str!("boot.s"));
+global_asm!(
+    include_str!("boot.s"),
+    CONST_CURRENTEL_EL2 = const 0x8,
+    CONST_CORE_ID_MASK = const 0b11
+);
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
diff --git a/12_integrated_testing/kernel/src/_arch/aarch64/cpu/boot.s b/12_integrated_testing/kernel/src/_arch/aarch64/cpu/boot.s
index 28b35087c..7576dc145 100644
--- a/12_integrated_testing/kernel/src/_arch/aarch64/cpu/boot.s
+++ b/12_integrated_testing/kernel/src/_arch/aarch64/cpu/boot.s
@@ -18,9 +18,6 @@
 	add	\register, \register, #:lo12:\symbol
 .endm
 
-.equ _EL2, 0x8
-.equ _core_id_mask, 0b11
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -32,12 +29,12 @@
 _start:
 	// Only proceed if the core executes in EL2. Park it otherwise.
 	mrs	x0, CurrentEL
-	cmp	x0, _EL2
+	cmp	x0, {CONST_CURRENTEL_EL2}
 	b.ne	.L_parking_loop
 
 	// Only proceed on the boot core. Park it otherwise.
 	mrs	x1, MPIDR_EL1
-	and	x1, x1, _core_id_mask
+	and	x1, x1, {CONST_CORE_ID_MASK}
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
 	b.ne	.L_parking_loop
diff --git a/12_integrated_testing/kernel/src/lib.rs b/12_integrated_testing/kernel/src/lib.rs
index 442de9e02..2de7d6cce 100644
--- a/12_integrated_testing/kernel/src/lib.rs
+++ b/12_integrated_testing/kernel/src/lib.rs
@@ -110,6 +110,7 @@
 
 #![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
+#![feature(asm_const)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(linkage)]
diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index 5938da9e8..d6c6a7e47 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -2398,15 +2398,7 @@ diff -uNr 12_integrated_testing/kernel/src/exception/asynchronous.rs 13_exceptio
 diff -uNr 12_integrated_testing/kernel/src/lib.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
 --- 12_integrated_testing/kernel/src/lib.rs
 +++ 13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
-@@ -110,6 +110,7 @@
-
- #![allow(clippy::upper_case_acronyms)]
- #![allow(incomplete_features)]
-+#![feature(asm_const)]
- #![feature(core_intrinsics)]
- #![feature(format_args_nl)]
- #![feature(linkage)]
-@@ -132,6 +133,7 @@
+@@ -133,6 +133,7 @@
  pub mod exception;
  pub mod memory;
  pub mod print;
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/boot.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/boot.rs
index f677c9c4b..0bf45b837 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/boot.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/boot.rs
@@ -16,7 +16,11 @@ use cortex_a::{asm, registers::*};
 use tock_registers::interfaces::Writeable;
 
 // Assembly counterpart to this file.
-global_asm!(include_str!("boot.s"));
+global_asm!(
+    include_str!("boot.s"),
+    CONST_CURRENTEL_EL2 = const 0x8,
+    CONST_CORE_ID_MASK = const 0b11
+);
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/boot.s b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/boot.s
index 28b35087c..7576dc145 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/boot.s
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/boot.s
@@ -18,9 +18,6 @@
 	add	\register, \register, #:lo12:\symbol
 .endm
 
-.equ _EL2, 0x8
-.equ _core_id_mask, 0b11
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -32,12 +29,12 @@
 _start:
 	// Only proceed if the core executes in EL2. Park it otherwise.
 	mrs	x0, CurrentEL
-	cmp	x0, _EL2
+	cmp	x0, {CONST_CURRENTEL_EL2}
 	b.ne	.L_parking_loop
 
 	// Only proceed on the boot core. Park it otherwise.
 	mrs	x1, MPIDR_EL1
-	and	x1, x1, _core_id_mask
+	and	x1, x1, {CONST_CORE_ID_MASK}
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
 	b.ne	.L_parking_loop
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.rs
index f677c9c4b..0bf45b837 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.rs
@@ -16,7 +16,11 @@ use cortex_a::{asm, registers::*};
 use tock_registers::interfaces::Writeable;
 
 // Assembly counterpart to this file.
-global_asm!(include_str!("boot.s"));
+global_asm!(
+    include_str!("boot.s"),
+    CONST_CURRENTEL_EL2 = const 0x8,
+    CONST_CORE_ID_MASK = const 0b11
+);
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.s b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.s
index 28b35087c..7576dc145 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.s
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.s
@@ -18,9 +18,6 @@
 	add	\register, \register, #:lo12:\symbol
 .endm
 
-.equ _EL2, 0x8
-.equ _core_id_mask, 0b11
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -32,12 +29,12 @@
 _start:
 	// Only proceed if the core executes in EL2. Park it otherwise.
 	mrs	x0, CurrentEL
-	cmp	x0, _EL2
+	cmp	x0, {CONST_CURRENTEL_EL2}
 	b.ne	.L_parking_loop
 
 	// Only proceed on the boot core. Park it otherwise.
 	mrs	x1, MPIDR_EL1
-	and	x1, x1, _core_id_mask
+	and	x1, x1, {CONST_CORE_ID_MASK}
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
 	b.ne	.L_parking_loop
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index 9ec33fc0f..5836e12fd 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -819,7 +819,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.rs 1
  use core::arch::global_asm;
  use cortex_a::{asm, registers::*};
  use tock_registers::interfaces::Writeable;
-@@ -71,9 +72,16 @@
+@@ -75,9 +76,16 @@
  ///
  /// - Exception return from EL2 must must continue execution in EL1 with `kernel_init()`.
  #[no_mangle]
@@ -841,7 +841,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.rs 1
 diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.s 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.s
 --- 14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.s
 +++ 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.s
-@@ -56,11 +56,14 @@
+@@ -53,11 +53,14 @@
 
  	// Prepare the jump to Rust code.
  .L_prepare_rust:
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.rs
index 0a606a484..a66c0cb32 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.rs
@@ -17,7 +17,11 @@ use cortex_a::{asm, registers::*};
 use tock_registers::interfaces::Writeable;
 
 // Assembly counterpart to this file.
-global_asm!(include_str!("boot.s"));
+global_asm!(
+    include_str!("boot.s"),
+    CONST_CURRENTEL_EL2 = const 0x8,
+    CONST_CORE_ID_MASK = const 0b11
+);
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.s b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.s
index dd2b50b88..dba8c88ee 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.s
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.s
@@ -18,9 +18,6 @@
 	add	\register, \register, #:lo12:\symbol
 .endm
 
-.equ _EL2, 0x8
-.equ _core_id_mask, 0b11
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -32,12 +29,12 @@
 _start:
 	// Only proceed if the core executes in EL2. Park it otherwise.
 	mrs	x0, CurrentEL
-	cmp	x0, _EL2
+	cmp	x0, {CONST_CURRENTEL_EL2}
 	b.ne	.L_parking_loop
 
 	// Only proceed on the boot core. Park it otherwise.
 	mrs	x1, MPIDR_EL1
-	and	x1, x1, _core_id_mask
+	and	x1, x1, {CONST_CORE_ID_MASK}
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
 	b.ne	.L_parking_loop
diff --git a/16_virtual_mem_part4_higher_half_kernel/README.md b/16_virtual_mem_part4_higher_half_kernel/README.md
index 32259671a..a9282d805 100644
--- a/16_virtual_mem_part4_higher_half_kernel/README.md
+++ b/16_virtual_mem_part4_higher_half_kernel/README.md
@@ -340,7 +340,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/Cargo.toml 16_virtual_m
 diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.rs 16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.rs
 --- 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.rs
 +++ 16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.rs
-@@ -30,7 +30,10 @@
+@@ -34,7 +34,10 @@
  /// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
  /// - The HW state of EL1 must be prepared in a sound way.
  #[inline(always)]
@@ -352,7 +352,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/b
      // Enable timer counter registers for EL1.
      CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
 
-@@ -53,11 +56,11 @@
+@@ -57,11 +60,11 @@
      );
 
      // Second, let the link register point to kernel_init().
@@ -366,7 +366,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/b
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -74,14 +77,19 @@
+@@ -78,14 +81,19 @@
  #[no_mangle]
  pub unsafe extern "C" fn _start_rust(
      phys_kernel_tables_base_addr: u64,
@@ -409,10 +409,10 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/b
 +	movk	\register, #:abs_g0_nc:\symbol
 +.endm
 +
- .equ _EL2, 0x8
- .equ _core_id_mask, 0b11
-
-@@ -59,11 +71,23 @@
+ //--------------------------------------------------------------------------------------------------
+ // Public Code
+ //--------------------------------------------------------------------------------------------------
+@@ -56,11 +68,23 @@
  	// Load the base address of the kernel's translation tables.
  	ldr	x0, PHYS_KERNEL_TABLES_BASE_ADDR // provided by bsp/__board_name__/memory/mmu.rs
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.rs
index 3d01b0dcc..293d46085 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.rs
@@ -17,7 +17,11 @@ use cortex_a::{asm, registers::*};
 use tock_registers::interfaces::Writeable;
 
 // Assembly counterpart to this file.
-global_asm!(include_str!("boot.s"));
+global_asm!(
+    include_str!("boot.s"),
+    CONST_CURRENTEL_EL2 = const 0x8,
+    CONST_CORE_ID_MASK = const 0b11
+);
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.s b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.s
index d2c9270d0..8c70d035e 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.s
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.s
@@ -30,9 +30,6 @@
 	movk	\register, #:abs_g0_nc:\symbol
 .endm
 
-.equ _EL2, 0x8
-.equ _core_id_mask, 0b11
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -44,12 +41,12 @@
 _start:
 	// Only proceed if the core executes in EL2. Park it otherwise.
 	mrs	x0, CurrentEL
-	cmp	x0, _EL2
+	cmp	x0, {CONST_CURRENTEL_EL2}
 	b.ne	.L_parking_loop
 
 	// Only proceed on the boot core. Park it otherwise.
 	mrs	x1, MPIDR_EL1
-	and	x1, x1, _core_id_mask
+	and	x1, x1, {CONST_CORE_ID_MASK}
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
 	b.ne	.L_parking_loop
diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.rs b/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.rs
index 3d01b0dcc..293d46085 100644
--- a/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.rs
+++ b/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.rs
@@ -17,7 +17,11 @@ use cortex_a::{asm, registers::*};
 use tock_registers::interfaces::Writeable;
 
 // Assembly counterpart to this file.
-global_asm!(include_str!("boot.s"));
+global_asm!(
+    include_str!("boot.s"),
+    CONST_CURRENTEL_EL2 = const 0x8,
+    CONST_CORE_ID_MASK = const 0b11
+);
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.s b/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.s
index d2c9270d0..8c70d035e 100644
--- a/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.s
+++ b/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.s
@@ -30,9 +30,6 @@
 	movk	\register, #:abs_g0_nc:\symbol
 .endm
 
-.equ _EL2, 0x8
-.equ _core_id_mask, 0b11
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -44,12 +41,12 @@
 _start:
 	// Only proceed if the core executes in EL2. Park it otherwise.
 	mrs	x0, CurrentEL
-	cmp	x0, _EL2
+	cmp	x0, {CONST_CURRENTEL_EL2}
 	b.ne	.L_parking_loop
 
 	// Only proceed on the boot core. Park it otherwise.
 	mrs	x1, MPIDR_EL1
-	and	x1, x1, _core_id_mask
+	and	x1, x1, {CONST_CORE_ID_MASK}
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
 	b.ne	.L_parking_loop
diff --git a/18_backtrace/README.md b/18_backtrace/README.md
index 1ea270d87..c3cc1cc8e 100644
--- a/18_backtrace/README.md
+++ b/18_backtrace/README.md
@@ -552,7 +552,7 @@ diff -uNr 17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.rs 18_backtrace/ke
  use cortex_a::{asm, registers::*};
  use tock_registers::interfaces::Writeable;
 
-@@ -63,6 +66,18 @@
+@@ -67,6 +70,18 @@
      SP_EL1.set(virt_boot_core_stack_end_exclusive_addr);
  }
 
@@ -571,7 +571,7 @@ diff -uNr 17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.rs 18_backtrace/ke
  //--------------------------------------------------------------------------------------------------
  // Public Code
  //--------------------------------------------------------------------------------------------------
-@@ -89,6 +104,9 @@
+@@ -93,6 +108,9 @@
      let addr = Address::new(phys_kernel_tables_base_addr as usize);
      memory::mmu::enable_mmu_and_caching(addr).unwrap();
 
@@ -582,6 +582,23 @@ diff -uNr 17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.rs 18_backtrace/ke
      // execution of kernel_init() in EL1 from its _virtual address_.
      asm::eret()
 
+diff -uNr 17_kernel_symbols/kernel/src/_arch/aarch64/exception.rs 18_backtrace/kernel/src/_arch/aarch64/exception.rs
+--- 17_kernel_symbols/kernel/src/_arch/aarch64/exception.rs
++++ 18_backtrace/kernel/src/_arch/aarch64/exception.rs
+@@ -20,7 +20,11 @@
+ };
+
+ // Assembly counterpart to this file.
+-global_asm!(include_str!("exception.s"));
++global_asm!(
++    include_str!("exception.s"),
++    CONST_ESR_EL1_EC_SHIFT = const 26,
++    CONST_ESR_EL1_EC_VALUE_SVC64 = const 0x15
++);
+
+ //--------------------------------------------------------------------------------------------------
+ // Private Definitions
+
 diff -uNr 17_kernel_symbols/kernel/src/_arch/aarch64/exception.s 18_backtrace/kernel/src/_arch/aarch64/exception.s
 --- 17_kernel_symbols/kernel/src/_arch/aarch64/exception.s
 +++ 18_backtrace/kernel/src/_arch/aarch64/exception.s
@@ -626,8 +643,8 @@ diff -uNr 17_kernel_symbols/kernel/src/_arch/aarch64/exception.s 18_backtrace/ke
 +	// For reference: Search for "preferred exception return address" in the Architecture
 +	// Reference Manual for ARMv8-A.
 +.if \is_sync == 1
-+	lsr	w3,  w3, #26 // w3 = ESR_EL1.EC
-+	cmp	w3,  #0x15   // w3 == SVC64 ?
++	lsr	w3,  w3, {CONST_ESR_EL1_EC_SHIFT}   // w3 = ESR_EL1.EC
++	cmp	w3,  {CONST_ESR_EL1_EC_VALUE_SVC64} // w3 == SVC64 ?
 +	b.eq	1f
 +.endif
 +	add	x1,  x1, #4
diff --git a/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.rs b/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.rs
index c0bc86be2..15ab92b60 100644
--- a/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.rs
+++ b/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.rs
@@ -20,7 +20,11 @@ use cortex_a::{asm, registers::*};
 use tock_registers::interfaces::Writeable;
 
 // Assembly counterpart to this file.
-global_asm!(include_str!("boot.s"));
+global_asm!(
+    include_str!("boot.s"),
+    CONST_CURRENTEL_EL2 = const 0x8,
+    CONST_CORE_ID_MASK = const 0b11
+);
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
diff --git a/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.s b/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.s
index d2c9270d0..8c70d035e 100644
--- a/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.s
+++ b/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.s
@@ -30,9 +30,6 @@
 	movk	\register, #:abs_g0_nc:\symbol
 .endm
 
-.equ _EL2, 0x8
-.equ _core_id_mask, 0b11
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -44,12 +41,12 @@
 _start:
 	// Only proceed if the core executes in EL2. Park it otherwise.
 	mrs	x0, CurrentEL
-	cmp	x0, _EL2
+	cmp	x0, {CONST_CURRENTEL_EL2}
 	b.ne	.L_parking_loop
 
 	// Only proceed on the boot core. Park it otherwise.
 	mrs	x1, MPIDR_EL1
-	and	x1, x1, _core_id_mask
+	and	x1, x1, {CONST_CORE_ID_MASK}
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
 	b.ne	.L_parking_loop
diff --git a/18_backtrace/kernel/src/_arch/aarch64/exception.rs b/18_backtrace/kernel/src/_arch/aarch64/exception.rs
index 6781758af..300906441 100644
--- a/18_backtrace/kernel/src/_arch/aarch64/exception.rs
+++ b/18_backtrace/kernel/src/_arch/aarch64/exception.rs
@@ -20,7 +20,11 @@ use tock_registers::{
 };
 
 // Assembly counterpart to this file.
-global_asm!(include_str!("exception.s"));
+global_asm!(
+    include_str!("exception.s"),
+    CONST_ESR_EL1_EC_SHIFT = const 26,
+    CONST_ESR_EL1_EC_VALUE_SVC64 = const 0x15
+);
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
diff --git a/18_backtrace/kernel/src/_arch/aarch64/exception.s b/18_backtrace/kernel/src/_arch/aarch64/exception.s
index 17acaf59f..cdef8c586 100644
--- a/18_backtrace/kernel/src/_arch/aarch64/exception.s
+++ b/18_backtrace/kernel/src/_arch/aarch64/exception.s
@@ -63,8 +63,8 @@ __vector_\handler:
 	// For reference: Search for "preferred exception return address" in the Architecture
 	// Reference Manual for ARMv8-A.
 .if \is_sync == 1
-	lsr	w3,  w3, #26 // w3 = ESR_EL1.EC
-	cmp	w3,  #0x15   // w3 == SVC64 ?
+	lsr	w3,  w3, {CONST_ESR_EL1_EC_SHIFT}   // w3 = ESR_EL1.EC
+	cmp	w3,  {CONST_ESR_EL1_EC_VALUE_SVC64} // w3 == SVC64 ?
 	b.eq	1f
 .endif
 	add	x1,  x1, #4
diff --git a/X1_JTAG_boot/jtag_boot_rpi3.img b/X1_JTAG_boot/jtag_boot_rpi3.img
index 584c5a6ef4c2141a22eafa3270aabe16b117ecef..f6afca6ccb677db69ee4628043d1039905542b1a 100755
GIT binary patch
delta 14
VcmZ4Cw!&?Lg92mcW=DnROaLps1#|!a

delta 14
VcmZ4Cw!&?Lg92mQW=DnROaLpa1#tiX

diff --git a/X1_JTAG_boot/jtag_boot_rpi4.img b/X1_JTAG_boot/jtag_boot_rpi4.img
index 4ebab5bfd8dac22484d5e9dafb48c6ecc5dd4722..b12e094ded48d939c71c87f3fb3fa66a2c309048 100755
GIT binary patch
delta 14
Wcmca$d%<?Y4=KjZ%|E5CGXnrO?FR<{

delta 14
Wcmca$d%<?Y4=KjB%|E5CGXnrO+Xn;y

diff --git a/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.rs b/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.rs
index 2f9654c7f..8390c0132 100644
--- a/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.rs
+++ b/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.rs
@@ -11,8 +11,13 @@
 //!
 //! crate::cpu::boot::arch_boot
 
+use core::arch::global_asm;
+
 // Assembly counterpart to this file.
-core::arch::global_asm!(include_str!("boot.s"));
+global_asm!(
+    include_str!("boot.s"),
+    CONST_CORE_ID_MASK = const 0b11
+);
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s b/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s
index 7d445a935..1f70169f9 100644
--- a/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s
+++ b/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s
@@ -18,8 +18,6 @@
 	add	\register, \register, #:lo12:\symbol
 .endm
 
-.equ _core_id_mask, 0b11
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -31,7 +29,7 @@
 _start:
 	// Only proceed on the boot core. Park it otherwise.
 	mrs	x1, MPIDR_EL1
-	and	x1, x1, _core_id_mask
+	and	x1, x1, {CONST_CORE_ID_MASK}
 	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
 	cmp	x1, x2
 	b.ne	.L_parking_loop
diff --git a/X1_JTAG_boot/src/main.rs b/X1_JTAG_boot/src/main.rs
index 0502e1c98..a985c679f 100644
--- a/X1_JTAG_boot/src/main.rs
+++ b/X1_JTAG_boot/src/main.rs
@@ -107,6 +107,7 @@
 //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
 #![allow(clippy::upper_case_acronyms)]
+#![feature(asm_const)]
 #![feature(format_args_nl)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]

From fa3d640b118eaec94ecffb2d08e2945c443afca6 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Fri, 6 May 2022 22:26:37 +0200
Subject: [PATCH 160/214] Rename PageAllocator module

---
 14_virtual_mem_part2_mmio_remap/README.md     | 171 +++++++++---------
 .../kernel/src/memory/mmu.rs                  |   8 +-
 .../memory/mmu/{alloc.rs => page_alloc.rs}    |   2 +-
 .../README.md                                 |   2 +-
 .../kernel/src/memory/mmu.rs                  |   6 +-
 .../memory/mmu/{alloc.rs => page_alloc.rs}    |   2 +-
 .../kernel/src/memory/mmu.rs                  |   6 +-
 .../memory/mmu/{alloc.rs => page_alloc.rs}    |   2 +-
 17_kernel_symbols/kernel/src/memory/mmu.rs    |   6 +-
 .../memory/mmu/{alloc.rs => page_alloc.rs}    |   2 +-
 18_backtrace/kernel/src/memory/mmu.rs         |   6 +-
 18_backtrace/kernel/src/memory/mmu/alloc.rs   |  70 -------
 .../kernel/src/memory/mmu/page_alloc.rs       |  70 +++++++
 13 files changed, 177 insertions(+), 176 deletions(-)
 rename 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/{alloc.rs => page_alloc.rs} (99%)
 rename 15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/{alloc.rs => page_alloc.rs} (99%)
 rename 16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/{alloc.rs => page_alloc.rs} (99%)
 rename 17_kernel_symbols/kernel/src/memory/mmu/{alloc.rs => page_alloc.rs} (99%)
 delete mode 100644 18_backtrace/kernel/src/memory/mmu/alloc.rs
 create mode 100644 18_backtrace/kernel/src/memory/mmu/page_alloc.rs

diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index 329e2105e..5d78e2378 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -279,7 +279,7 @@ pub unsafe fn kernel_map_mmio(
     // omitted
 
         let virt_region =
-            alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.alloc(num_pages))?;
+            page_alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.alloc(num_pages))?;
 
         kernel_map_at_unchecked(
             name,
@@ -296,10 +296,11 @@ pub unsafe fn kernel_map_mmio(
 }
 ```
 
-This allocator is defined and implemented in the added file `src/memory/mmu/alloc.rs`. Like other
-parts of the mapping code, its implementation makes use of the newly introduced `PageAddress<ATYPE>`
-and `MemoryRegion<ATYPE>` types (in [`src/memory/mmu/types.rs`](kernel/src/memory/mmu/types.rs)),
-but apart from that is rather straight forward. Therefore, it won't be covered in details here.
+This allocator is defined and implemented in the added file `src/memory/mmu/paeg_alloc.rs`. Like
+other parts of the mapping code, its implementation makes use of the newly introduced
+`PageAddress<ATYPE>` and `MemoryRegion<ATYPE>` types (in
+[`src/memory/mmu/types.rs`](kernel/src/memory/mmu/types.rs)), but apart from that is rather straight
+forward. Therefore, it won't be covered in details here.
 
 The more interesting question is: How does the allocator get to learn which VAs it can use?
 
@@ -313,7 +314,7 @@ been turned on.
 fn kernel_init_mmio_va_allocator() {
     let region = bsp::memory::mmu::virt_mmio_remap_region();
 
-    alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.initialize(region));
+    page_alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.initialize(region));
 }
 ```
 
@@ -2227,81 +2228,6 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs 14_virtual_mem_
      let (_, privilege_level) = exception::current_privilege_level();
      info!("Current privilege level: {}", privilege_level);
 
-diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/alloc.rs 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/alloc.rs
---- 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/alloc.rs
-+++ 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/alloc.rs
-@@ -0,0 +1,70 @@
-+// SPDX-License-Identifier: MIT OR Apache-2.0
-+//
-+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
-+
-+//! Allocation.
-+
-+use super::MemoryRegion;
-+use crate::{
-+    memory::{AddressType, Virtual},
-+    synchronization::IRQSafeNullLock,
-+    warn,
-+};
-+use core::num::NonZeroUsize;
-+
-+//--------------------------------------------------------------------------------------------------
-+// Public Definitions
-+//--------------------------------------------------------------------------------------------------
-+
-+/// A page allocator that can be lazyily initialized.
-+pub struct PageAllocator<ATYPE: AddressType> {
-+    pool: Option<MemoryRegion<ATYPE>>,
-+}
-+
-+//--------------------------------------------------------------------------------------------------
-+// Global instances
-+//--------------------------------------------------------------------------------------------------
-+
-+static KERNEL_MMIO_VA_ALLOCATOR: IRQSafeNullLock<PageAllocator<Virtual>> =
-+    IRQSafeNullLock::new(PageAllocator::new());
-+
-+//--------------------------------------------------------------------------------------------------
-+// Public Code
-+//--------------------------------------------------------------------------------------------------
-+
-+/// Return a reference to the kernel's MMIO virtual address allocator.
-+pub fn kernel_mmio_va_allocator() -> &'static IRQSafeNullLock<PageAllocator<Virtual>> {
-+    &KERNEL_MMIO_VA_ALLOCATOR
-+}
-+
-+impl<ATYPE: AddressType> PageAllocator<ATYPE> {
-+    /// Create an instance.
-+    pub const fn new() -> Self {
-+        Self { pool: None }
-+    }
-+
-+    /// Initialize the allocator.
-+    pub fn initialize(&mut self, pool: MemoryRegion<ATYPE>) {
-+        if self.pool.is_some() {
-+            warn!("Already initialized");
-+            return;
-+        }
-+
-+        self.pool = Some(pool);
-+    }
-+
-+    /// Allocate a number of pages.
-+    pub fn alloc(
-+        &mut self,
-+        num_requested_pages: NonZeroUsize,
-+    ) -> Result<MemoryRegion<ATYPE>, &'static str> {
-+        if self.pool.is_none() {
-+            return Err("Allocator not initialized");
-+        }
-+
-+        self.pool
-+            .as_mut()
-+            .unwrap()
-+            .take_first_n_pages(num_requested_pages)
-+    }
-+}
-
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/mapping_record.rs 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/mapping_record.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/mapping_record.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/mapping_record.rs
@@ -2540,6 +2466,81 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/mapping_reco
 +    KERNEL_MAPPING_RECORD.read(|mr| mr.print());
 +}
 
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/page_alloc.rs 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/page_alloc.rs
+--- 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/page_alloc.rs
++++ 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/page_alloc.rs
+@@ -0,0 +1,70 @@
++// SPDX-License-Identifier: MIT OR Apache-2.0
++//
++// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
++
++//! Page allocation.
++
++use super::MemoryRegion;
++use crate::{
++    memory::{AddressType, Virtual},
++    synchronization::IRQSafeNullLock,
++    warn,
++};
++use core::num::NonZeroUsize;
++
++//--------------------------------------------------------------------------------------------------
++// Public Definitions
++//--------------------------------------------------------------------------------------------------
++
++/// A page allocator that can be lazyily initialized.
++pub struct PageAllocator<ATYPE: AddressType> {
++    pool: Option<MemoryRegion<ATYPE>>,
++}
++
++//--------------------------------------------------------------------------------------------------
++// Global instances
++//--------------------------------------------------------------------------------------------------
++
++static KERNEL_MMIO_VA_ALLOCATOR: IRQSafeNullLock<PageAllocator<Virtual>> =
++    IRQSafeNullLock::new(PageAllocator::new());
++
++//--------------------------------------------------------------------------------------------------
++// Public Code
++//--------------------------------------------------------------------------------------------------
++
++/// Return a reference to the kernel's MMIO virtual address allocator.
++pub fn kernel_mmio_va_allocator() -> &'static IRQSafeNullLock<PageAllocator<Virtual>> {
++    &KERNEL_MMIO_VA_ALLOCATOR
++}
++
++impl<ATYPE: AddressType> PageAllocator<ATYPE> {
++    /// Create an instance.
++    pub const fn new() -> Self {
++        Self { pool: None }
++    }
++
++    /// Initialize the allocator.
++    pub fn initialize(&mut self, pool: MemoryRegion<ATYPE>) {
++        if self.pool.is_some() {
++            warn!("Already initialized");
++            return;
++        }
++
++        self.pool = Some(pool);
++    }
++
++    /// Allocate a number of pages.
++    pub fn alloc(
++        &mut self,
++        num_requested_pages: NonZeroUsize,
++    ) -> Result<MemoryRegion<ATYPE>, &'static str> {
++        if self.pool.is_none() {
++            return Err("Allocator not initialized");
++        }
++
++        self.pool
++            .as_mut()
++            .unwrap()
++            .take_first_n_pages(num_requested_pages)
++    }
++}
+
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/translation_table.rs 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/translation_table.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/translation_table.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/translation_table.rs
@@ -3037,8 +3038,8 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu.rs 14_virtua
  #[path = "../_arch/aarch64/memory/mmu.rs"]
  mod arch_mmu;
 
-+mod alloc;
 +mod mapping_record;
++mod page_alloc;
  mod translation_table;
 +mod types;
 
@@ -3140,7 +3141,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu.rs 14_virtua
 +fn kernel_init_mmio_va_allocator() {
 +    let region = bsp::memory::mmu::virt_mmio_remap_region();
 +
-+    alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.initialize(region));
++    page_alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.initialize(region));
 +}
 +
 +/// Map a region in the kernel's translation tables.
@@ -3280,7 +3281,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu.rs 14_virtua
 -            "PX"
 -        };
 +        let virt_region =
-+            alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.alloc(num_pages))?;
++            page_alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.alloc(num_pages))?;
 
 -        write!(
 -            f,
@@ -3399,7 +3400,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu.rs 14_virtua
 +        let phys_region = MemoryRegion::new(phys_start_page_addr, phys_end_exclusive_page_addr);
 +
 +        let num_pages = NonZeroUsize::new(phys_region.num_pages()).unwrap();
-+        let virt_region = alloc::kernel_mmio_va_allocator()
++        let virt_region = page_alloc::kernel_mmio_va_allocator()
 +            .lock(|allocator| allocator.alloc(num_pages))
 +            .unwrap();
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu.rs
index b0616f883..436024700 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu.rs
@@ -8,8 +8,8 @@
 #[path = "../_arch/aarch64/memory/mmu.rs"]
 mod arch_mmu;
 
-mod alloc;
 mod mapping_record;
+mod page_alloc;
 mod translation_table;
 mod types;
 
@@ -81,7 +81,7 @@ use translation_table::interface::TranslationTable;
 fn kernel_init_mmio_va_allocator() {
     let region = bsp::memory::mmu::virt_mmio_remap_region();
 
-    alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.initialize(region));
+    page_alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.initialize(region));
 }
 
 /// Map a region in the kernel's translation tables.
@@ -205,7 +205,7 @@ pub unsafe fn kernel_map_mmio(
         };
 
         let virt_region =
-            alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.alloc(num_pages))?;
+            page_alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.alloc(num_pages))?;
 
         kernel_map_at_unchecked(
             name,
@@ -281,7 +281,7 @@ mod tests {
         let phys_region = MemoryRegion::new(phys_start_page_addr, phys_end_exclusive_page_addr);
 
         let num_pages = NonZeroUsize::new(phys_region.num_pages()).unwrap();
-        let virt_region = alloc::kernel_mmio_va_allocator()
+        let virt_region = page_alloc::kernel_mmio_va_allocator()
             .lock(|allocator| allocator.alloc(num_pages))
             .unwrap();
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/alloc.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/page_alloc.rs
similarity index 99%
rename from 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/alloc.rs
rename to 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/page_alloc.rs
index aadb72ef2..b4c4232c9 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/alloc.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/page_alloc.rs
@@ -2,7 +2,7 @@
 //
 // Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
-//! Allocation.
+//! Page allocation.
 
 use super::MemoryRegion;
 use crate::{
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index 5836e12fd..d3ec21e2e 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -1663,7 +1663,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu.rs 15_virtual_me
 -        let phys_region = MemoryRegion::new(phys_start_page_addr, phys_end_exclusive_page_addr);
 -
 -        let num_pages = NonZeroUsize::new(phys_region.num_pages()).unwrap();
--        let virt_region = alloc::kernel_mmio_va_allocator()
+-        let virt_region = page_alloc::kernel_mmio_va_allocator()
 -            .lock(|allocator| allocator.alloc(num_pages))
 -            .unwrap();
 -
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu.rs
index 23dc7094b..c6461474c 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu.rs
@@ -8,8 +8,8 @@
 #[path = "../_arch/aarch64/memory/mmu.rs"]
 mod arch_mmu;
 
-mod alloc;
 mod mapping_record;
+mod page_alloc;
 mod translation_table;
 mod types;
 
@@ -82,7 +82,7 @@ use translation_table::interface::TranslationTable;
 fn kernel_init_mmio_va_allocator() {
     let region = bsp::memory::mmu::virt_mmio_remap_region();
 
-    alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.initialize(region));
+    page_alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.initialize(region));
 }
 
 /// Map a region in the kernel's translation tables.
@@ -203,7 +203,7 @@ pub unsafe fn kernel_map_mmio(
         };
 
         let virt_region =
-            alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.alloc(num_pages))?;
+            page_alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.alloc(num_pages))?;
 
         kernel_map_at_unchecked(
             name,
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/alloc.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/page_alloc.rs
similarity index 99%
rename from 15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/alloc.rs
rename to 15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/page_alloc.rs
index aadb72ef2..b4c4232c9 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/alloc.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/page_alloc.rs
@@ -2,7 +2,7 @@
 //
 // Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
-//! Allocation.
+//! Page allocation.
 
 use super::MemoryRegion;
 use crate::{
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu.rs
index dfc299932..8806a9935 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu.rs
@@ -8,8 +8,8 @@
 #[path = "../_arch/aarch64/memory/mmu.rs"]
 mod arch_mmu;
 
-mod alloc;
 mod mapping_record;
+mod page_alloc;
 mod translation_table;
 mod types;
 
@@ -87,7 +87,7 @@ use translation_table::interface::TranslationTable;
 fn kernel_init_mmio_va_allocator() {
     let region = bsp::memory::mmu::virt_mmio_remap_region();
 
-    alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.initialize(region));
+    page_alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.initialize(region));
 }
 
 /// Map a region in the kernel's translation tables.
@@ -208,7 +208,7 @@ pub unsafe fn kernel_map_mmio(
         };
 
         let virt_region =
-            alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.alloc(num_pages))?;
+            page_alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.alloc(num_pages))?;
 
         kernel_map_at_unchecked(
             name,
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/alloc.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/page_alloc.rs
similarity index 99%
rename from 16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/alloc.rs
rename to 16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/page_alloc.rs
index aadb72ef2..b4c4232c9 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/alloc.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/page_alloc.rs
@@ -2,7 +2,7 @@
 //
 // Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
-//! Allocation.
+//! Page allocation.
 
 use super::MemoryRegion;
 use crate::{
diff --git a/17_kernel_symbols/kernel/src/memory/mmu.rs b/17_kernel_symbols/kernel/src/memory/mmu.rs
index dfc299932..8806a9935 100644
--- a/17_kernel_symbols/kernel/src/memory/mmu.rs
+++ b/17_kernel_symbols/kernel/src/memory/mmu.rs
@@ -8,8 +8,8 @@
 #[path = "../_arch/aarch64/memory/mmu.rs"]
 mod arch_mmu;
 
-mod alloc;
 mod mapping_record;
+mod page_alloc;
 mod translation_table;
 mod types;
 
@@ -87,7 +87,7 @@ use translation_table::interface::TranslationTable;
 fn kernel_init_mmio_va_allocator() {
     let region = bsp::memory::mmu::virt_mmio_remap_region();
 
-    alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.initialize(region));
+    page_alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.initialize(region));
 }
 
 /// Map a region in the kernel's translation tables.
@@ -208,7 +208,7 @@ pub unsafe fn kernel_map_mmio(
         };
 
         let virt_region =
-            alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.alloc(num_pages))?;
+            page_alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.alloc(num_pages))?;
 
         kernel_map_at_unchecked(
             name,
diff --git a/17_kernel_symbols/kernel/src/memory/mmu/alloc.rs b/17_kernel_symbols/kernel/src/memory/mmu/page_alloc.rs
similarity index 99%
rename from 17_kernel_symbols/kernel/src/memory/mmu/alloc.rs
rename to 17_kernel_symbols/kernel/src/memory/mmu/page_alloc.rs
index aadb72ef2..b4c4232c9 100644
--- a/17_kernel_symbols/kernel/src/memory/mmu/alloc.rs
+++ b/17_kernel_symbols/kernel/src/memory/mmu/page_alloc.rs
@@ -2,7 +2,7 @@
 //
 // Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
 
-//! Allocation.
+//! Page allocation.
 
 use super::MemoryRegion;
 use crate::{
diff --git a/18_backtrace/kernel/src/memory/mmu.rs b/18_backtrace/kernel/src/memory/mmu.rs
index dfc299932..8806a9935 100644
--- a/18_backtrace/kernel/src/memory/mmu.rs
+++ b/18_backtrace/kernel/src/memory/mmu.rs
@@ -8,8 +8,8 @@
 #[path = "../_arch/aarch64/memory/mmu.rs"]
 mod arch_mmu;
 
-mod alloc;
 mod mapping_record;
+mod page_alloc;
 mod translation_table;
 mod types;
 
@@ -87,7 +87,7 @@ use translation_table::interface::TranslationTable;
 fn kernel_init_mmio_va_allocator() {
     let region = bsp::memory::mmu::virt_mmio_remap_region();
 
-    alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.initialize(region));
+    page_alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.initialize(region));
 }
 
 /// Map a region in the kernel's translation tables.
@@ -208,7 +208,7 @@ pub unsafe fn kernel_map_mmio(
         };
 
         let virt_region =
-            alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.alloc(num_pages))?;
+            page_alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.alloc(num_pages))?;
 
         kernel_map_at_unchecked(
             name,
diff --git a/18_backtrace/kernel/src/memory/mmu/alloc.rs b/18_backtrace/kernel/src/memory/mmu/alloc.rs
deleted file mode 100644
index aadb72ef2..000000000
--- a/18_backtrace/kernel/src/memory/mmu/alloc.rs
+++ /dev/null
@@ -1,70 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
-
-//! Allocation.
-
-use super::MemoryRegion;
-use crate::{
-    memory::{AddressType, Virtual},
-    synchronization::IRQSafeNullLock,
-    warn,
-};
-use core::num::NonZeroUsize;
-
-//--------------------------------------------------------------------------------------------------
-// Public Definitions
-//--------------------------------------------------------------------------------------------------
-
-/// A page allocator that can be lazyily initialized.
-pub struct PageAllocator<ATYPE: AddressType> {
-    pool: Option<MemoryRegion<ATYPE>>,
-}
-
-//--------------------------------------------------------------------------------------------------
-// Global instances
-//--------------------------------------------------------------------------------------------------
-
-static KERNEL_MMIO_VA_ALLOCATOR: IRQSafeNullLock<PageAllocator<Virtual>> =
-    IRQSafeNullLock::new(PageAllocator::new());
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return a reference to the kernel's MMIO virtual address allocator.
-pub fn kernel_mmio_va_allocator() -> &'static IRQSafeNullLock<PageAllocator<Virtual>> {
-    &KERNEL_MMIO_VA_ALLOCATOR
-}
-
-impl<ATYPE: AddressType> PageAllocator<ATYPE> {
-    /// Create an instance.
-    pub const fn new() -> Self {
-        Self { pool: None }
-    }
-
-    /// Initialize the allocator.
-    pub fn initialize(&mut self, pool: MemoryRegion<ATYPE>) {
-        if self.pool.is_some() {
-            warn!("Already initialized");
-            return;
-        }
-
-        self.pool = Some(pool);
-    }
-
-    /// Allocate a number of pages.
-    pub fn alloc(
-        &mut self,
-        num_requested_pages: NonZeroUsize,
-    ) -> Result<MemoryRegion<ATYPE>, &'static str> {
-        if self.pool.is_none() {
-            return Err("Allocator not initialized");
-        }
-
-        self.pool
-            .as_mut()
-            .unwrap()
-            .take_first_n_pages(num_requested_pages)
-    }
-}
diff --git a/18_backtrace/kernel/src/memory/mmu/page_alloc.rs b/18_backtrace/kernel/src/memory/mmu/page_alloc.rs
new file mode 100644
index 000000000..b4c4232c9
--- /dev/null
+++ b/18_backtrace/kernel/src/memory/mmu/page_alloc.rs
@@ -0,0 +1,70 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Page allocation.
+
+use super::MemoryRegion;
+use crate::{
+    memory::{AddressType, Virtual},
+    synchronization::IRQSafeNullLock,
+    warn,
+};
+use core::num::NonZeroUsize;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// A page allocator that can be lazyily initialized.
+pub struct PageAllocator<ATYPE: AddressType> {
+    pool: Option<MemoryRegion<ATYPE>>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static KERNEL_MMIO_VA_ALLOCATOR: IRQSafeNullLock<PageAllocator<Virtual>> =
+    IRQSafeNullLock::new(PageAllocator::new());
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the kernel's MMIO virtual address allocator.
+pub fn kernel_mmio_va_allocator() -> &'static IRQSafeNullLock<PageAllocator<Virtual>> {
+    &KERNEL_MMIO_VA_ALLOCATOR
+}
+
+impl<ATYPE: AddressType> PageAllocator<ATYPE> {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self { pool: None }
+    }
+
+    /// Initialize the allocator.
+    pub fn initialize(&mut self, pool: MemoryRegion<ATYPE>) {
+        if self.pool.is_some() {
+            warn!("Already initialized");
+            return;
+        }
+
+        self.pool = Some(pool);
+    }
+
+    /// Allocate a number of pages.
+    pub fn alloc(
+        &mut self,
+        num_requested_pages: NonZeroUsize,
+    ) -> Result<MemoryRegion<ATYPE>, &'static str> {
+        if self.pool.is_none() {
+            return Err("Allocator not initialized");
+        }
+
+        self.pool
+            .as_mut()
+            .unwrap()
+            .take_first_n_pages(num_requested_pages)
+    }
+}

From 821979be41b793854f5f857fc0aa7d70c5a9054d Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 9 May 2022 09:05:50 +0200
Subject: [PATCH 161/214] Fix wrong variable in Makefile

---
 01_wait_forever/Makefile                          | 2 +-
 02_runtime_init/Makefile                          | 2 +-
 03_hacky_hello_world/Makefile                     | 2 +-
 04_safe_globals/Makefile                          | 2 +-
 05_drivers_gpio_uart/Makefile                     | 2 +-
 06_uart_chainloader/Makefile                      | 2 +-
 07_timestamps/Makefile                            | 2 +-
 08_hw_debug_JTAG/Makefile                         | 2 +-
 09_privilege_level/Makefile                       | 2 +-
 10_virtual_mem_part1_identity_mapping/Makefile    | 2 +-
 11_exceptions_part1_groundwork/Makefile           | 2 +-
 12_integrated_testing/Makefile                    | 2 +-
 13_exceptions_part2_peripheral_IRQs/Makefile      | 2 +-
 14_virtual_mem_part2_mmio_remap/Makefile          | 2 +-
 15_virtual_mem_part3_precomputed_tables/README.md | 2 +-
 15 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/01_wait_forever/Makefile b/01_wait_forever/Makefile
index 59884220c..8ddb26cd5 100644
--- a/01_wait_forever/Makefile
+++ b/01_wait_forever/Makefile
@@ -58,7 +58,7 @@ LAST_BUILD_CONFIG = target/$(BSP).build_config
 KERNEL_ELF      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
 # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
-KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(LAST_BUILD_CONFIG)
 
 
 
diff --git a/02_runtime_init/Makefile b/02_runtime_init/Makefile
index ba5f0c795..49ca7b63b 100644
--- a/02_runtime_init/Makefile
+++ b/02_runtime_init/Makefile
@@ -58,7 +58,7 @@ LAST_BUILD_CONFIG = target/$(BSP).build_config
 KERNEL_ELF      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
 # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
-KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(LAST_BUILD_CONFIG)
 
 
 
diff --git a/03_hacky_hello_world/Makefile b/03_hacky_hello_world/Makefile
index a90b2fd67..6e5cf32d2 100644
--- a/03_hacky_hello_world/Makefile
+++ b/03_hacky_hello_world/Makefile
@@ -58,7 +58,7 @@ LAST_BUILD_CONFIG = target/$(BSP).build_config
 KERNEL_ELF      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
 # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
-KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(LAST_BUILD_CONFIG)
 
 
 
diff --git a/04_safe_globals/Makefile b/04_safe_globals/Makefile
index a90b2fd67..6e5cf32d2 100644
--- a/04_safe_globals/Makefile
+++ b/04_safe_globals/Makefile
@@ -58,7 +58,7 @@ LAST_BUILD_CONFIG = target/$(BSP).build_config
 KERNEL_ELF      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
 # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
-KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(LAST_BUILD_CONFIG)
 
 
 
diff --git a/05_drivers_gpio_uart/Makefile b/05_drivers_gpio_uart/Makefile
index 376892d87..cd8097c85 100644
--- a/05_drivers_gpio_uart/Makefile
+++ b/05_drivers_gpio_uart/Makefile
@@ -61,7 +61,7 @@ LAST_BUILD_CONFIG = target/$(BSP).build_config
 KERNEL_ELF      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
 # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
-KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(LAST_BUILD_CONFIG)
 
 
 
diff --git a/06_uart_chainloader/Makefile b/06_uart_chainloader/Makefile
index 812fdf4ee..6c60e8edd 100644
--- a/06_uart_chainloader/Makefile
+++ b/06_uart_chainloader/Makefile
@@ -63,7 +63,7 @@ LAST_BUILD_CONFIG = target/$(BSP).build_config
 KERNEL_ELF      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
 # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
-KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(LAST_BUILD_CONFIG)
 
 
 
diff --git a/07_timestamps/Makefile b/07_timestamps/Makefile
index a497ad815..b89cee8c5 100644
--- a/07_timestamps/Makefile
+++ b/07_timestamps/Makefile
@@ -61,7 +61,7 @@ LAST_BUILD_CONFIG = target/$(BSP).build_config
 KERNEL_ELF      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
 # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
-KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(LAST_BUILD_CONFIG)
 
 
 
diff --git a/08_hw_debug_JTAG/Makefile b/08_hw_debug_JTAG/Makefile
index 9d76237cd..138c55547 100644
--- a/08_hw_debug_JTAG/Makefile
+++ b/08_hw_debug_JTAG/Makefile
@@ -65,7 +65,7 @@ LAST_BUILD_CONFIG = target/$(BSP).build_config
 KERNEL_ELF      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
 # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
-KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(LAST_BUILD_CONFIG)
 
 
 
diff --git a/09_privilege_level/Makefile b/09_privilege_level/Makefile
index 9d76237cd..138c55547 100644
--- a/09_privilege_level/Makefile
+++ b/09_privilege_level/Makefile
@@ -65,7 +65,7 @@ LAST_BUILD_CONFIG = target/$(BSP).build_config
 KERNEL_ELF      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
 # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
-KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(LAST_BUILD_CONFIG)
 
 
 
diff --git a/10_virtual_mem_part1_identity_mapping/Makefile b/10_virtual_mem_part1_identity_mapping/Makefile
index 9d76237cd..138c55547 100644
--- a/10_virtual_mem_part1_identity_mapping/Makefile
+++ b/10_virtual_mem_part1_identity_mapping/Makefile
@@ -65,7 +65,7 @@ LAST_BUILD_CONFIG = target/$(BSP).build_config
 KERNEL_ELF      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
 # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
-KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(LAST_BUILD_CONFIG)
 
 
 
diff --git a/11_exceptions_part1_groundwork/Makefile b/11_exceptions_part1_groundwork/Makefile
index 9d76237cd..138c55547 100644
--- a/11_exceptions_part1_groundwork/Makefile
+++ b/11_exceptions_part1_groundwork/Makefile
@@ -65,7 +65,7 @@ LAST_BUILD_CONFIG = target/$(BSP).build_config
 KERNEL_ELF      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
 # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
-KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(LAST_BUILD_CONFIG)
 
 
 
diff --git a/12_integrated_testing/Makefile b/12_integrated_testing/Makefile
index 1a19e6018..20007cecb 100644
--- a/12_integrated_testing/Makefile
+++ b/12_integrated_testing/Makefile
@@ -74,7 +74,7 @@ LAST_BUILD_CONFIG    = target/$(BSP).build_config
 KERNEL_ELF      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
 # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
-KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(LAST_BUILD_CONFIG)
 
 
 
diff --git a/13_exceptions_part2_peripheral_IRQs/Makefile b/13_exceptions_part2_peripheral_IRQs/Makefile
index 1a19e6018..20007cecb 100644
--- a/13_exceptions_part2_peripheral_IRQs/Makefile
+++ b/13_exceptions_part2_peripheral_IRQs/Makefile
@@ -74,7 +74,7 @@ LAST_BUILD_CONFIG    = target/$(BSP).build_config
 KERNEL_ELF      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
 # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
-KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(LAST_BUILD_CONFIG)
 
 
 
diff --git a/14_virtual_mem_part2_mmio_remap/Makefile b/14_virtual_mem_part2_mmio_remap/Makefile
index 1a19e6018..20007cecb 100644
--- a/14_virtual_mem_part2_mmio_remap/Makefile
+++ b/14_virtual_mem_part2_mmio_remap/Makefile
@@ -74,7 +74,7 @@ LAST_BUILD_CONFIG    = target/$(BSP).build_config
 KERNEL_ELF      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
 # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
-KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(LAST_BUILD_CONFIG)
 
 
 
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index d3ec21e2e..b34c06b71 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -1845,7 +1845,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/Makefile 15_virtual_mem_part3_precompu
 +KERNEL_ELF_RAW      = target/$(TARGET)/release/kernel
  # This parses cargo's dep-info file.
  # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
--KERNEL_ELF_DEPS = $(filter-out modulo: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
+-KERNEL_ELF_DEPS = $(filter-out modulo: ,$(file < $(KERNEL_ELF).d)) $(LAST_BUILD_CONFIG)
 +KERNEL_ELF_RAW_DEPS = $(filter-out modulo: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
 +
 +##------------------------------------------------------------------------------

From dc4e69155ea6cdbf2107bfe25f84180ae27b0be5 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 9 May 2022 09:13:02 +0200
Subject: [PATCH 162/214] Fix rust-analyzer targets

---
 01_wait_forever/.vscode/settings.json                       | 2 +-
 02_runtime_init/.vscode/settings.json                       | 2 +-
 03_hacky_hello_world/.vscode/settings.json                  | 2 +-
 04_safe_globals/.vscode/settings.json                       | 2 +-
 05_drivers_gpio_uart/.vscode/settings.json                  | 2 +-
 06_uart_chainloader/.vscode/settings.json                   | 2 +-
 07_timestamps/.vscode/settings.json                         | 2 +-
 08_hw_debug_JTAG/.vscode/settings.json                      | 2 +-
 09_privilege_level/.vscode/settings.json                    | 2 +-
 10_virtual_mem_part1_identity_mapping/.vscode/settings.json | 2 +-
 11_exceptions_part1_groundwork/.vscode/settings.json        | 2 +-
 11 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/01_wait_forever/.vscode/settings.json b/01_wait_forever/.vscode/settings.json
index 292bf2a93..d1916456a 100644
--- a/01_wait_forever/.vscode/settings.json
+++ b/01_wait_forever/.vscode/settings.json
@@ -4,7 +4,7 @@
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
   "rust-analyzer.cargo.features": ["bsp_rpi3"],
   "rust-analyzer.checkOnSave.allTargets": false,
-  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
+  "rust-analyzer.checkOnSave.extraArgs": ["--bins"],
   "rust-analyzer.lens.debug": false,
   "rust-analyzer.lens.run": false
 }
diff --git a/02_runtime_init/.vscode/settings.json b/02_runtime_init/.vscode/settings.json
index 292bf2a93..d1916456a 100644
--- a/02_runtime_init/.vscode/settings.json
+++ b/02_runtime_init/.vscode/settings.json
@@ -4,7 +4,7 @@
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
   "rust-analyzer.cargo.features": ["bsp_rpi3"],
   "rust-analyzer.checkOnSave.allTargets": false,
-  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
+  "rust-analyzer.checkOnSave.extraArgs": ["--bins"],
   "rust-analyzer.lens.debug": false,
   "rust-analyzer.lens.run": false
 }
diff --git a/03_hacky_hello_world/.vscode/settings.json b/03_hacky_hello_world/.vscode/settings.json
index 292bf2a93..d1916456a 100644
--- a/03_hacky_hello_world/.vscode/settings.json
+++ b/03_hacky_hello_world/.vscode/settings.json
@@ -4,7 +4,7 @@
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
   "rust-analyzer.cargo.features": ["bsp_rpi3"],
   "rust-analyzer.checkOnSave.allTargets": false,
-  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
+  "rust-analyzer.checkOnSave.extraArgs": ["--bins"],
   "rust-analyzer.lens.debug": false,
   "rust-analyzer.lens.run": false
 }
diff --git a/04_safe_globals/.vscode/settings.json b/04_safe_globals/.vscode/settings.json
index 292bf2a93..d1916456a 100644
--- a/04_safe_globals/.vscode/settings.json
+++ b/04_safe_globals/.vscode/settings.json
@@ -4,7 +4,7 @@
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
   "rust-analyzer.cargo.features": ["bsp_rpi3"],
   "rust-analyzer.checkOnSave.allTargets": false,
-  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
+  "rust-analyzer.checkOnSave.extraArgs": ["--bins"],
   "rust-analyzer.lens.debug": false,
   "rust-analyzer.lens.run": false
 }
diff --git a/05_drivers_gpio_uart/.vscode/settings.json b/05_drivers_gpio_uart/.vscode/settings.json
index 292bf2a93..d1916456a 100644
--- a/05_drivers_gpio_uart/.vscode/settings.json
+++ b/05_drivers_gpio_uart/.vscode/settings.json
@@ -4,7 +4,7 @@
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
   "rust-analyzer.cargo.features": ["bsp_rpi3"],
   "rust-analyzer.checkOnSave.allTargets": false,
-  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
+  "rust-analyzer.checkOnSave.extraArgs": ["--bins"],
   "rust-analyzer.lens.debug": false,
   "rust-analyzer.lens.run": false
 }
diff --git a/06_uart_chainloader/.vscode/settings.json b/06_uart_chainloader/.vscode/settings.json
index 292bf2a93..d1916456a 100644
--- a/06_uart_chainloader/.vscode/settings.json
+++ b/06_uart_chainloader/.vscode/settings.json
@@ -4,7 +4,7 @@
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
   "rust-analyzer.cargo.features": ["bsp_rpi3"],
   "rust-analyzer.checkOnSave.allTargets": false,
-  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
+  "rust-analyzer.checkOnSave.extraArgs": ["--bins"],
   "rust-analyzer.lens.debug": false,
   "rust-analyzer.lens.run": false
 }
diff --git a/07_timestamps/.vscode/settings.json b/07_timestamps/.vscode/settings.json
index 292bf2a93..d1916456a 100644
--- a/07_timestamps/.vscode/settings.json
+++ b/07_timestamps/.vscode/settings.json
@@ -4,7 +4,7 @@
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
   "rust-analyzer.cargo.features": ["bsp_rpi3"],
   "rust-analyzer.checkOnSave.allTargets": false,
-  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
+  "rust-analyzer.checkOnSave.extraArgs": ["--bins"],
   "rust-analyzer.lens.debug": false,
   "rust-analyzer.lens.run": false
 }
diff --git a/08_hw_debug_JTAG/.vscode/settings.json b/08_hw_debug_JTAG/.vscode/settings.json
index 292bf2a93..d1916456a 100644
--- a/08_hw_debug_JTAG/.vscode/settings.json
+++ b/08_hw_debug_JTAG/.vscode/settings.json
@@ -4,7 +4,7 @@
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
   "rust-analyzer.cargo.features": ["bsp_rpi3"],
   "rust-analyzer.checkOnSave.allTargets": false,
-  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
+  "rust-analyzer.checkOnSave.extraArgs": ["--bins"],
   "rust-analyzer.lens.debug": false,
   "rust-analyzer.lens.run": false
 }
diff --git a/09_privilege_level/.vscode/settings.json b/09_privilege_level/.vscode/settings.json
index 292bf2a93..d1916456a 100644
--- a/09_privilege_level/.vscode/settings.json
+++ b/09_privilege_level/.vscode/settings.json
@@ -4,7 +4,7 @@
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
   "rust-analyzer.cargo.features": ["bsp_rpi3"],
   "rust-analyzer.checkOnSave.allTargets": false,
-  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
+  "rust-analyzer.checkOnSave.extraArgs": ["--bins"],
   "rust-analyzer.lens.debug": false,
   "rust-analyzer.lens.run": false
 }
diff --git a/10_virtual_mem_part1_identity_mapping/.vscode/settings.json b/10_virtual_mem_part1_identity_mapping/.vscode/settings.json
index 292bf2a93..d1916456a 100644
--- a/10_virtual_mem_part1_identity_mapping/.vscode/settings.json
+++ b/10_virtual_mem_part1_identity_mapping/.vscode/settings.json
@@ -4,7 +4,7 @@
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
   "rust-analyzer.cargo.features": ["bsp_rpi3"],
   "rust-analyzer.checkOnSave.allTargets": false,
-  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
+  "rust-analyzer.checkOnSave.extraArgs": ["--bins"],
   "rust-analyzer.lens.debug": false,
   "rust-analyzer.lens.run": false
 }
diff --git a/11_exceptions_part1_groundwork/.vscode/settings.json b/11_exceptions_part1_groundwork/.vscode/settings.json
index 292bf2a93..d1916456a 100644
--- a/11_exceptions_part1_groundwork/.vscode/settings.json
+++ b/11_exceptions_part1_groundwork/.vscode/settings.json
@@ -4,7 +4,7 @@
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
   "rust-analyzer.cargo.features": ["bsp_rpi3"],
   "rust-analyzer.checkOnSave.allTargets": false,
-  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
+  "rust-analyzer.checkOnSave.extraArgs": ["--bins"],
   "rust-analyzer.lens.debug": false,
   "rust-analyzer.lens.run": false
 }

From 4ab609ba3937876b90a55b82904cb121d0fb86ef Mon Sep 17 00:00:00 2001
From: Andre Richter <andre-richter@users.noreply.github.com>
Date: Mon, 9 May 2022 20:18:45 +0200
Subject: [PATCH 163/214] Update Makefile

---
 X1_JTAG_boot/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/X1_JTAG_boot/Makefile b/X1_JTAG_boot/Makefile
index a497ad815..b89cee8c5 100644
--- a/X1_JTAG_boot/Makefile
+++ b/X1_JTAG_boot/Makefile
@@ -61,7 +61,7 @@ LAST_BUILD_CONFIG = target/$(BSP).build_config
 KERNEL_ELF      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
 # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
-KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(LAST_BUILD_CONFIG)
 
 
 

From fec4f9b6f284e55f5b0d96e57eccbdaf358cc447 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 16 May 2022 21:55:17 +0200
Subject: [PATCH 164/214] Rework driver subsystem

- Remove the panic version of the GPIO and UART driver. While they were a neat
  idea, it proved tedious to drag them along different tutorials where the
  virtual memory situation kept on changing. Actually, not much is lost, since
  the benefit was only of theoretical nature until now, since everything is
  still single-threaded with NullLocks. It is still possible to re-introduce
  them later.

- Refactor driver bringup starting with tutorial 14. Instantiating the drivers
  only when we are already capable of using the remapped MMIO address makes the
  kernel a lot more robust, and the drivers need not care whether their MMIO
  addresses are good to use already or not.

- Use console and irq_manager references from the generic kernel code. This
  improves decoupling from the BSP, and is needed as a basis for tutorial 14.
---
 .gitignore                                    |    3 +-
 03_hacky_hello_world/README.md                |   19 +-
 03_hacky_hello_world/src/console.rs           |   13 +
 03_hacky_hello_world/src/print.rs             |    4 +-
 04_safe_globals/README.md                     |   46 +-
 .../src/bsp/raspberrypi/console.rs            |    4 +-
 04_safe_globals/src/console.rs                |   15 +-
 04_safe_globals/src/main.rs                   |    7 +-
 04_safe_globals/src/print.rs                  |    6 +-
 05_drivers_gpio_uart/README.md                |  234 +--
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |   23 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |   23 +-
 05_drivers_gpio_uart/src/bsp/raspberrypi.rs   |   11 -
 .../src/bsp/raspberrypi/console.rs            |   27 +-
 .../src/bsp/raspberrypi/driver.rs             |   12 +-
 05_drivers_gpio_uart/src/console.rs           |   15 +-
 05_drivers_gpio_uart/src/main.rs              |   12 +-
 05_drivers_gpio_uart/src/panic_wait.rs        |   22 +-
 05_drivers_gpio_uart/src/print.rs             |    6 +-
 06_uart_chainloader/README.md                 |   51 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |   21 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |   23 +-
 06_uart_chainloader/src/bsp/raspberrypi.rs    |   11 -
 .../src/bsp/raspberrypi/console.rs            |   27 +-
 .../src/bsp/raspberrypi/driver.rs             |   12 +-
 .../src/bsp/raspberrypi/memory.rs             |    4 +-
 06_uart_chainloader/src/console.rs            |   15 +-
 06_uart_chainloader/src/main.rs               |    3 +-
 06_uart_chainloader/src/panic_wait.rs         |   22 +-
 06_uart_chainloader/src/print.rs              |    6 +-
 07_timestamps/README.md                       |   51 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |   21 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |   23 +-
 07_timestamps/src/bsp/raspberrypi.rs          |   11 -
 07_timestamps/src/bsp/raspberrypi/console.rs  |   27 +-
 07_timestamps/src/bsp/raspberrypi/driver.rs   |   12 +-
 07_timestamps/src/console.rs                  |   15 +-
 07_timestamps/src/panic_wait.rs               |   22 +-
 07_timestamps/src/print.rs                    |    6 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |   21 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |   23 +-
 08_hw_debug_JTAG/src/bsp/raspberrypi.rs       |   11 -
 .../src/bsp/raspberrypi/console.rs            |   27 +-
 .../src/bsp/raspberrypi/driver.rs             |   12 +-
 08_hw_debug_JTAG/src/console.rs               |   15 +-
 08_hw_debug_JTAG/src/panic_wait.rs            |   22 +-
 08_hw_debug_JTAG/src/print.rs                 |    6 +-
 09_privilege_level/README.md                  |   42 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |   21 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |   23 +-
 09_privilege_level/src/bsp/raspberrypi.rs     |   11 -
 .../src/bsp/raspberrypi/console.rs            |   27 +-
 .../src/bsp/raspberrypi/driver.rs             |   12 +-
 09_privilege_level/src/console.rs             |   15 +-
 09_privilege_level/src/main.rs                |    7 +-
 09_privilege_level/src/panic_wait.rs          |   22 +-
 09_privilege_level/src/print.rs               |    6 +-
 .../README.md                                 |   50 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |   21 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |   23 +-
 .../src/bsp/raspberrypi.rs                    |   11 -
 .../src/bsp/raspberrypi/console.rs            |   27 +-
 .../src/bsp/raspberrypi/driver.rs             |   12 +-
 .../src/console.rs                            |   15 +-
 .../src/main.rs                               |    7 +-
 .../src/panic_wait.rs                         |   22 +-
 .../src/print.rs                              |    6 +-
 11_exceptions_part1_groundwork/README.md      |   85 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |   21 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |   23 +-
 .../src/bsp/raspberrypi.rs                    |   11 -
 .../src/bsp/raspberrypi/console.rs            |   27 +-
 .../src/bsp/raspberrypi/driver.rs             |   12 +-
 11_exceptions_part1_groundwork/src/console.rs |   15 +-
 11_exceptions_part1_groundwork/src/main.rs    |    7 +-
 .../src/panic_wait.rs                         |   22 +-
 11_exceptions_part1_groundwork/src/print.rs   |    6 +-
 12_integrated_testing/README.md               |   35 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |   21 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |   23 +-
 .../kernel/src/bsp/raspberrypi.rs             |   11 -
 .../kernel/src/bsp/raspberrypi/console.rs     |   38 +-
 .../kernel/src/bsp/raspberrypi/driver.rs      |   15 +-
 12_integrated_testing/kernel/src/console.rs   |   15 +-
 12_integrated_testing/kernel/src/driver.rs    |    5 +
 12_integrated_testing/kernel/src/lib.rs       |    4 +-
 12_integrated_testing/kernel/src/main.rs      |    7 +-
 .../kernel/src/panic_wait.rs                  |   22 +-
 12_integrated_testing/kernel/src/print.rs     |    6 +-
 .../kernel/tests/00_console_sanity.rs         |    8 +-
 .../kernel/tests/01_timer_sanity.rs           |    6 +-
 .../tests/02_exception_sync_page_fault.rs     |    5 +-
 .../tests/03_exception_restore_sanity.rs      |    5 +-
 13_exceptions_part2_peripheral_IRQs/README.md |  247 +--
 .../kernel/src/_arch/aarch64/exception.rs     |    6 +-
 .../kernel/src/bsp/device_driver/arm/gicv2.rs |    4 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |   21 +-
 .../bcm/bcm2xxx_interrupt_controller.rs       |    7 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |   28 +-
 .../kernel/src/bsp/raspberrypi.rs             |   28 -
 .../kernel/src/bsp/raspberrypi/console.rs     |   38 +-
 .../kernel/src/bsp/raspberrypi/driver.rs      |   33 +-
 .../bsp/raspberrypi/exception/asynchronous.rs |    4 +-
 .../kernel/src/bsp/raspberrypi/memory.rs      |    1 -
 .../kernel/src/console.rs                     |   15 +-
 .../kernel/src/driver.rs                      |    5 +
 .../kernel/src/exception/asynchronous.rs      |    8 +
 .../kernel/src/lib.rs                         |    4 +-
 .../kernel/src/panic_wait.rs                  |   22 +-
 .../kernel/src/print.rs                       |    6 +-
 .../kernel/tests/00_console_sanity.rs         |    8 +-
 .../kernel/tests/01_timer_sanity.rs           |    6 +-
 .../tests/02_exception_sync_page_fault.rs     |    5 +-
 .../tests/03_exception_restore_sanity.rs      |    5 +-
 .../kernel/tests/04_exception_irq_sanity.rs   |    5 +-
 14_virtual_mem_part2_mmio_remap/README.md     | 1626 ++++++++++-------
 .../kernel/src/_arch/aarch64/exception.rs     |    6 +-
 .../kernel/src/bsp/device_driver/arm/gicv2.rs |   52 +-
 .../src/bsp/device_driver/arm/gicv2/gicc.rs   |   31 +-
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |   26 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |   72 +-
 .../bcm/bcm2xxx_interrupt_controller.rs       |   24 +-
 .../peripheral_ic.rs                          |   45 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |   89 +-
 .../kernel/src/bsp/device_driver/common.rs    |    7 +-
 .../kernel/src/bsp/raspberrypi.rs             |   35 -
 .../kernel/src/bsp/raspberrypi/console.rs     |   62 -
 .../kernel/src/bsp/raspberrypi/driver.rs      |  171 +-
 .../bsp/raspberrypi/exception/asynchronous.rs |   13 +-
 .../kernel/src/bsp/raspberrypi/memory.rs      |    3 -
 .../kernel/src/console.rs                     |   30 +-
 .../kernel/src/console/null_console.rs        |   41 +
 .../kernel/src/driver.rs                      |   31 +-
 .../kernel/src/exception/asynchronous.rs      |   28 +-
 .../asynchronous/null_irq_manager.rs          |   44 +
 .../kernel/src/lib.rs                         |   17 +-
 .../kernel/src/main.rs                        |   23 +-
 .../kernel/src/memory.rs                      |    8 +-
 .../kernel/src/memory/mmu/mapping_record.rs   |   16 +
 .../kernel/src/panic_wait.rs                  |   22 +-
 .../kernel/src/print.rs                       |    6 +-
 .../kernel/tests/00_console_sanity.rs         |   21 +-
 .../kernel/tests/01_timer_sanity.rs           |   19 +-
 .../tests/02_exception_sync_page_fault.rs     |   16 +-
 .../tests/03_exception_restore_sanity.rs      |   16 +-
 .../kernel/tests/04_exception_irq_sanity.rs   |   19 +-
 .../README.md                                 |  304 ++-
 .../kernel/src/_arch/aarch64/exception.rs     |    6 +-
 .../kernel/src/bsp/device_driver/arm/gicv2.rs |   52 +-
 .../src/bsp/device_driver/arm/gicv2/gicc.rs   |   31 +-
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |   26 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |   72 +-
 .../bcm/bcm2xxx_interrupt_controller.rs       |   24 +-
 .../peripheral_ic.rs                          |   45 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |   89 +-
 .../kernel/src/bsp/device_driver/common.rs    |    7 +-
 .../kernel/src/bsp/raspberrypi.rs             |   35 -
 .../kernel/src/bsp/raspberrypi/console.rs     |   92 -
 .../kernel/src/bsp/raspberrypi/driver.rs      |  171 +-
 .../bsp/raspberrypi/exception/asynchronous.rs |   13 +-
 .../kernel/src/bsp/raspberrypi/memory.rs      |    3 -
 .../kernel/src/console.rs                     |   30 +-
 .../kernel/src/console/null_console.rs        |   41 +
 .../kernel/src/driver.rs                      |   31 +-
 .../kernel/src/exception/asynchronous.rs      |   28 +-
 .../asynchronous/null_irq_manager.rs          |   44 +
 .../kernel/src/lib.rs                         |    5 +-
 .../kernel/src/main.rs                        |   28 +-
 .../kernel/src/memory.rs                      |    8 +-
 .../kernel/src/memory/mmu/mapping_record.rs   |   16 +
 .../kernel/src/panic_wait.rs                  |   22 +-
 .../kernel/src/print.rs                       |    6 +-
 .../kernel/tests/00_console_sanity.rs         |    8 +-
 .../kernel/tests/01_timer_sanity.rs           |    6 +-
 .../tests/02_exception_sync_page_fault.rs     |    6 +-
 .../tests/03_exception_restore_sanity.rs      |    6 +-
 .../kernel/tests/04_exception_irq_sanity.rs   |    6 +-
 .../README.md                                 |  132 +-
 .../kernel/src/_arch/aarch64/exception.rs     |    6 +-
 .../kernel/src/bsp/device_driver/arm/gicv2.rs |   52 +-
 .../src/bsp/device_driver/arm/gicv2/gicc.rs   |   31 +-
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |   26 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |   72 +-
 .../bcm/bcm2xxx_interrupt_controller.rs       |   24 +-
 .../peripheral_ic.rs                          |   45 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |   89 +-
 .../kernel/src/bsp/device_driver/common.rs    |    7 +-
 .../kernel/src/bsp/raspberrypi.rs             |   35 -
 .../kernel/src/bsp/raspberrypi/console.rs     |   98 -
 .../kernel/src/bsp/raspberrypi/driver.rs      |  171 +-
 .../bsp/raspberrypi/exception/asynchronous.rs |   13 +-
 .../kernel/src/bsp/raspberrypi/memory.rs      |    3 -
 .../kernel/src/console.rs                     |   30 +-
 .../kernel/src/console/null_console.rs        |   41 +
 .../kernel/src/driver.rs                      |   31 +-
 .../kernel/src/exception/asynchronous.rs      |   28 +-
 .../asynchronous/null_irq_manager.rs          |   44 +
 .../kernel/src/lib.rs                         |    5 +-
 .../kernel/src/main.rs                        |   28 +-
 .../kernel/src/memory.rs                      |    8 +-
 .../kernel/src/memory/mmu/mapping_record.rs   |   16 +
 .../kernel/src/panic_wait.rs                  |   22 +-
 .../kernel/src/print.rs                       |    6 +-
 .../kernel/tests/00_console_sanity.rs         |    8 +-
 .../kernel/tests/01_timer_sanity.rs           |    6 +-
 .../tests/02_exception_sync_page_fault.rs     |    6 +-
 .../tests/03_exception_restore_sanity.rs      |    6 +-
 .../kernel/tests/04_exception_irq_sanity.rs   |    6 +-
 17_kernel_symbols/Makefile                    |    2 +-
 17_kernel_symbols/README.md                   |   17 +-
 .../kernel/src/_arch/aarch64/exception.rs     |    6 +-
 .../kernel/src/bsp/device_driver/arm/gicv2.rs |   52 +-
 .../src/bsp/device_driver/arm/gicv2/gicc.rs   |   31 +-
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |   26 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |   72 +-
 .../bcm/bcm2xxx_interrupt_controller.rs       |   24 +-
 .../peripheral_ic.rs                          |   45 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |   89 +-
 .../kernel/src/bsp/device_driver/common.rs    |    7 +-
 .../kernel/src/bsp/raspberrypi.rs             |   35 -
 .../kernel/src/bsp/raspberrypi/console.rs     |   98 -
 .../kernel/src/bsp/raspberrypi/driver.rs      |  171 +-
 .../bsp/raspberrypi/exception/asynchronous.rs |   13 +-
 .../kernel/src/bsp/raspberrypi/memory.rs      |    3 -
 17_kernel_symbols/kernel/src/console.rs       |   30 +-
 .../kernel/src/console/null_console.rs        |   41 +
 17_kernel_symbols/kernel/src/driver.rs        |   31 +-
 .../kernel/src/exception/asynchronous.rs      |   28 +-
 .../asynchronous/null_irq_manager.rs          |   44 +
 17_kernel_symbols/kernel/src/lib.rs           |    5 +-
 17_kernel_symbols/kernel/src/main.rs          |   28 +-
 17_kernel_symbols/kernel/src/memory.rs        |    8 +-
 .../kernel/src/memory/mmu/mapping_record.rs   |   16 +
 17_kernel_symbols/kernel/src/panic_wait.rs    |   22 +-
 17_kernel_symbols/kernel/src/print.rs         |    6 +-
 .../kernel/tests/00_console_sanity.rs         |    8 +-
 .../kernel/tests/01_timer_sanity.rs           |    6 +-
 .../tests/02_exception_sync_page_fault.rs     |    6 +-
 .../tests/03_exception_restore_sanity.rs      |    6 +-
 .../kernel/tests/04_exception_irq_sanity.rs   |    6 +-
 18_backtrace/Makefile                         |    2 +-
 18_backtrace/README.md                        |   40 +-
 .../kernel/src/_arch/aarch64/exception.rs     |    6 +-
 .../kernel/src/bsp/device_driver/arm/gicv2.rs |   52 +-
 .../src/bsp/device_driver/arm/gicv2/gicc.rs   |   31 +-
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |   26 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |   72 +-
 .../bcm/bcm2xxx_interrupt_controller.rs       |   24 +-
 .../peripheral_ic.rs                          |   45 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |   89 +-
 .../kernel/src/bsp/device_driver/common.rs    |    7 +-
 18_backtrace/kernel/src/bsp/raspberrypi.rs    |   35 -
 .../kernel/src/bsp/raspberrypi/console.rs     |   98 -
 .../kernel/src/bsp/raspberrypi/driver.rs      |  171 +-
 .../bsp/raspberrypi/exception/asynchronous.rs |   13 +-
 .../kernel/src/bsp/raspberrypi/memory.rs      |    3 -
 18_backtrace/kernel/src/console.rs            |   30 +-
 .../kernel/src/console/null_console.rs        |   41 +
 18_backtrace/kernel/src/driver.rs             |   31 +-
 .../kernel/src/exception/asynchronous.rs      |   28 +-
 .../asynchronous/null_irq_manager.rs          |   44 +
 18_backtrace/kernel/src/lib.rs                |    5 +-
 18_backtrace/kernel/src/main.rs               |   28 +-
 18_backtrace/kernel/src/memory.rs             |    8 +-
 .../kernel/src/memory/mmu/mapping_record.rs   |   16 +
 18_backtrace/kernel/src/panic_wait.rs         |   22 +-
 18_backtrace/kernel/src/print.rs              |    6 +-
 .../kernel/tests/00_console_sanity.rs         |    8 +-
 18_backtrace/kernel/tests/01_timer_sanity.rs  |    6 +-
 .../tests/02_exception_sync_page_fault.rs     |    6 +-
 .../tests/03_exception_restore_sanity.rs      |    6 +-
 .../kernel/tests/04_exception_irq_sanity.rs   |    6 +-
 .../kernel/tests/05_backtrace_sanity.rs       |    6 +-
 .../tests/06_backtrace_invalid_frame.rs       |    6 +-
 .../kernel/tests/07_backtrace_invalid_link.rs |    6 +-
 X1_JTAG_boot/.vscode/settings.json            |    2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |   21 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |   23 +-
 X1_JTAG_boot/src/bsp/raspberrypi.rs           |   11 -
 X1_JTAG_boot/src/bsp/raspberrypi/console.rs   |   27 +-
 X1_JTAG_boot/src/bsp/raspberrypi/driver.rs    |   12 +-
 X1_JTAG_boot/src/console.rs                   |   15 +-
 X1_JTAG_boot/src/panic_wait.rs                |   22 +-
 X1_JTAG_boot/src/print.rs                     |    6 +-
 284 files changed, 4839 insertions(+), 4643 deletions(-)
 delete mode 100644 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/console.rs
 create mode 100644 14_virtual_mem_part2_mmio_remap/kernel/src/console/null_console.rs
 create mode 100644 14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous/null_irq_manager.rs
 delete mode 100644 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/console.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/kernel/src/console/null_console.rs
 create mode 100644 15_virtual_mem_part3_precomputed_tables/kernel/src/exception/asynchronous/null_irq_manager.rs
 delete mode 100644 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/console.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/kernel/src/console/null_console.rs
 create mode 100644 16_virtual_mem_part4_higher_half_kernel/kernel/src/exception/asynchronous/null_irq_manager.rs
 delete mode 100644 17_kernel_symbols/kernel/src/bsp/raspberrypi/console.rs
 create mode 100644 17_kernel_symbols/kernel/src/console/null_console.rs
 create mode 100644 17_kernel_symbols/kernel/src/exception/asynchronous/null_irq_manager.rs
 delete mode 100644 18_backtrace/kernel/src/bsp/raspberrypi/console.rs
 create mode 100644 18_backtrace/kernel/src/console/null_console.rs
 create mode 100644 18_backtrace/kernel/src/exception/asynchronous/null_irq_manager.rs

diff --git a/.gitignore b/.gitignore
index 196600522..5bc8cd8dd 100644
--- a/.gitignore
+++ b/.gitignore
@@ -3,7 +3,8 @@
 **/kernel8.img
 
 node_modules
+.bundle
 .vendor
 
 Gemfile.lock
-package-lock.json
+package*.json
diff --git a/03_hacky_hello_world/README.md b/03_hacky_hello_world/README.md
index d868459ff..71293c567 100644
--- a/03_hacky_hello_world/README.md
+++ b/03_hacky_hello_world/README.md
@@ -188,13 +188,15 @@ diff -uNr 02_runtime_init/src/bsp/raspberrypi.rs 03_hacky_hello_world/src/bsp/ra
 diff -uNr 02_runtime_init/src/console.rs 03_hacky_hello_world/src/console.rs
 --- 02_runtime_init/src/console.rs
 +++ 03_hacky_hello_world/src/console.rs
-@@ -0,0 +1,19 @@
+@@ -0,0 +1,32 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! System console.
 +
++use crate::bsp;
++
 +//--------------------------------------------------------------------------------------------------
 +// Public Definitions
 +//--------------------------------------------------------------------------------------------------
@@ -208,6 +210,17 @@ diff -uNr 02_runtime_init/src/console.rs 03_hacky_hello_world/src/console.rs
 +    /// intention.
 +    pub use core::fmt::Write;
 +}
++
++//--------------------------------------------------------------------------------------------------
++// Public Code
++//--------------------------------------------------------------------------------------------------
++
++/// Return a reference to the console.
++///
++/// This is the global console used by all printing macros.
++pub fn console() -> impl interface::Write {
++    bsp::console::console()
++}
 
 diff -uNr 02_runtime_init/src/main.rs 03_hacky_hello_world/src/main.rs
 --- 02_runtime_init/src/main.rs
@@ -317,7 +330,7 @@ diff -uNr 02_runtime_init/src/print.rs 03_hacky_hello_world/src/print.rs
 +
 +//! Printing.
 +
-+use crate::{bsp, console};
++use crate::console;
 +use core::fmt;
 +
 +//--------------------------------------------------------------------------------------------------
@@ -328,7 +341,7 @@ diff -uNr 02_runtime_init/src/print.rs 03_hacky_hello_world/src/print.rs
 +pub fn _print(args: fmt::Arguments) {
 +    use console::interface::Write;
 +
-+    bsp::console::console().write_fmt(args).unwrap();
++    console::console().write_fmt(args).unwrap();
 +}
 +
 +/// Prints without a newline.
diff --git a/03_hacky_hello_world/src/console.rs b/03_hacky_hello_world/src/console.rs
index 5ab4cc455..7d940f293 100644
--- a/03_hacky_hello_world/src/console.rs
+++ b/03_hacky_hello_world/src/console.rs
@@ -4,6 +4,8 @@
 
 //! System console.
 
+use crate::bsp;
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -17,3 +19,14 @@ pub mod interface {
     /// intention.
     pub use core::fmt::Write;
 }
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the console.
+///
+/// This is the global console used by all printing macros.
+pub fn console() -> impl interface::Write {
+    bsp::console::console()
+}
diff --git a/03_hacky_hello_world/src/print.rs b/03_hacky_hello_world/src/print.rs
index 81c6d179a..05ef2aeaf 100644
--- a/03_hacky_hello_world/src/print.rs
+++ b/03_hacky_hello_world/src/print.rs
@@ -4,7 +4,7 @@
 
 //! Printing.
 
-use crate::{bsp, console};
+use crate::console;
 use core::fmt;
 
 //--------------------------------------------------------------------------------------------------
@@ -15,7 +15,7 @@ use core::fmt;
 pub fn _print(args: fmt::Arguments) {
     use console::interface::Write;
 
-    bsp::console::console().write_fmt(args).unwrap();
+    console::console().write_fmt(args).unwrap();
 }
 
 /// Prints without a newline.
diff --git a/04_safe_globals/README.md b/04_safe_globals/README.md
index 18827b5c1..58c14dc27 100644
--- a/04_safe_globals/README.md
+++ b/04_safe_globals/README.md
@@ -148,7 +148,7 @@ diff -uNr 03_hacky_hello_world/src/bsp/raspberrypi/console.rs 04_safe_globals/sr
          }
 
          Ok(())
-@@ -41,7 +80,37 @@
+@@ -41,7 +80,39 @@
  // Public Code
  //--------------------------------------------------------------------------------------------------
 
@@ -164,9 +164,9 @@ diff -uNr 03_hacky_hello_world/src/bsp/raspberrypi/console.rs 04_safe_globals/sr
  /// Return a reference to the console.
 -pub fn console() -> impl console::interface::Write {
 -    QEMUOutput {}
-+pub fn console() -> &'static impl console::interface::All {
++pub fn console() -> &'static dyn console::interface::All {
 +    &QEMU_OUTPUT
-+}
+ }
 +
 +//------------------------------------------------------------------------------
 +// OS Interface Code
@@ -187,12 +187,14 @@ diff -uNr 03_hacky_hello_world/src/bsp/raspberrypi/console.rs 04_safe_globals/sr
 +    fn chars_written(&self) -> usize {
 +        self.inner.lock(|inner| inner.chars_written)
 +    }
- }
++}
++
++impl console::interface::All for QEMUOutput {}
 
 diff -uNr 03_hacky_hello_world/src/console.rs 04_safe_globals/src/console.rs
 --- 03_hacky_hello_world/src/console.rs
 +++ 04_safe_globals/src/console.rs
-@@ -10,10 +10,22 @@
+@@ -12,12 +12,24 @@
 
  /// Console interfaces.
  pub mod interface {
@@ -218,7 +220,17 @@ diff -uNr 03_hacky_hello_world/src/console.rs 04_safe_globals/src/console.rs
 +    }
 +
 +    /// Trait alias for a full-fledged console.
-+    pub trait All = Write + Statistics;
++    pub trait All: Write + Statistics {}
+ }
+
+ //--------------------------------------------------------------------------------------------------
+@@ -27,6 +39,6 @@
+ /// Return a reference to the console.
+ ///
+ /// This is the global console used by all printing macros.
+-pub fn console() -> impl interface::Write {
++pub fn console() -> &'static dyn interface::All {
+     bsp::console::console()
  }
 
 diff -uNr 03_hacky_hello_world/src/main.rs 04_safe_globals/src/main.rs
@@ -240,25 +252,35 @@ diff -uNr 03_hacky_hello_world/src/main.rs 04_safe_globals/src/main.rs
 
  /// Early init code.
  ///
-@@ -124,7 +126,15 @@
+@@ -124,7 +126,12 @@
  ///
  /// - Only a single core must be active and running this function.
  unsafe fn kernel_init() -> ! {
 -    println!("Hello from Rust!");
-+    use console::interface::Statistics;
++    use console::console;
 
 -    panic!("Stopping here.")
 +    println!("[0] Hello from Rust!");
 +
-+    println!(
-+        "[1] Chars written: {}",
-+        bsp::console::console().chars_written()
-+    );
++    println!("[1] Chars written: {}", console().chars_written());
 +
 +    println!("[2] Stopping here.");
 +    cpu::wait_forever()
  }
 
+diff -uNr 03_hacky_hello_world/src/print.rs 04_safe_globals/src/print.rs
+--- 03_hacky_hello_world/src/print.rs
++++ 04_safe_globals/src/print.rs
+@@ -13,8 +13,6 @@
+
+ #[doc(hidden)]
+ pub fn _print(args: fmt::Arguments) {
+-    use console::interface::Write;
+-
+     console::console().write_fmt(args).unwrap();
+ }
+
+
 diff -uNr 03_hacky_hello_world/src/synchronization.rs 04_safe_globals/src/synchronization.rs
 --- 03_hacky_hello_world/src/synchronization.rs
 +++ 04_safe_globals/src/synchronization.rs
diff --git a/04_safe_globals/src/bsp/raspberrypi/console.rs b/04_safe_globals/src/bsp/raspberrypi/console.rs
index 774dbadbc..6427e0994 100644
--- a/04_safe_globals/src/bsp/raspberrypi/console.rs
+++ b/04_safe_globals/src/bsp/raspberrypi/console.rs
@@ -90,7 +90,7 @@ impl QEMUOutput {
 }
 
 /// Return a reference to the console.
-pub fn console() -> &'static impl console::interface::All {
+pub fn console() -> &'static dyn console::interface::All {
     &QEMU_OUTPUT
 }
 
@@ -114,3 +114,5 @@ impl console::interface::Statistics for QEMUOutput {
         self.inner.lock(|inner| inner.chars_written)
     }
 }
+
+impl console::interface::All for QEMUOutput {}
diff --git a/04_safe_globals/src/console.rs b/04_safe_globals/src/console.rs
index 3894c18d9..94e00f845 100644
--- a/04_safe_globals/src/console.rs
+++ b/04_safe_globals/src/console.rs
@@ -4,6 +4,8 @@
 
 //! System console.
 
+use crate::bsp;
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -27,5 +29,16 @@ pub mod interface {
     }
 
     /// Trait alias for a full-fledged console.
-    pub trait All = Write + Statistics;
+    pub trait All: Write + Statistics {}
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the console.
+///
+/// This is the global console used by all printing macros.
+pub fn console() -> &'static dyn interface::All {
+    bsp::console::console()
 }
diff --git a/04_safe_globals/src/main.rs b/04_safe_globals/src/main.rs
index 15db4a217..4726477d9 100644
--- a/04_safe_globals/src/main.rs
+++ b/04_safe_globals/src/main.rs
@@ -126,14 +126,11 @@ mod synchronization;
 ///
 /// - Only a single core must be active and running this function.
 unsafe fn kernel_init() -> ! {
-    use console::interface::Statistics;
+    use console::console;
 
     println!("[0] Hello from Rust!");
 
-    println!(
-        "[1] Chars written: {}",
-        bsp::console::console().chars_written()
-    );
+    println!("[1] Chars written: {}", console().chars_written());
 
     println!("[2] Stopping here.");
     cpu::wait_forever()
diff --git a/04_safe_globals/src/print.rs b/04_safe_globals/src/print.rs
index 81c6d179a..f69bad44d 100644
--- a/04_safe_globals/src/print.rs
+++ b/04_safe_globals/src/print.rs
@@ -4,7 +4,7 @@
 
 //! Printing.
 
-use crate::{bsp, console};
+use crate::console;
 use core::fmt;
 
 //--------------------------------------------------------------------------------------------------
@@ -13,9 +13,7 @@ use core::fmt;
 
 #[doc(hidden)]
 pub fn _print(args: fmt::Arguments) {
-    use console::interface::Write;
-
-    bsp::console::console().write_fmt(args).unwrap();
+    console::console().write_fmt(args).unwrap();
 }
 
 /// Prints without a newline.
diff --git a/05_drivers_gpio_uart/README.md b/05_drivers_gpio_uart/README.md
index 6f0057d60..555ac0316 100644
--- a/05_drivers_gpio_uart/README.md
+++ b/05_drivers_gpio_uart/README.md
@@ -27,12 +27,6 @@
 - `BSP`s now contain a memory map in `src/bsp/raspberrypi/memory.rs`. In the specific case, they
   contain the Raspberry's `MMIO` addresses which are used to instantiate the respective device
   drivers.
-- We also modify the `panic!` handler, so that it does not anymore rely on `println!`, which uses
-  the globally-shared instance of the `UART` that might be locked when an error is encountered (for
-  now, this can't happen due to the `NullLock`, but with a real lock it becomes an issue).
-    - Instead, it creates a new UART driver instance, re-initializes the device and uses that one to
-      print. This increases the chances that the system is able to print a final important message
-      before it suspends itself.
 
 ## Boot it from SD card
 
@@ -98,8 +92,8 @@ Miniterm 1.0
 [0] mingo version 0.5.0
 [1] Booting on: Raspberry Pi 3
 [2] Drivers loaded:
-      1. BCM GPIO
-      2. BCM PL011 UART
+      1. BCM PL011 UART
+      2. BCM GPIO
 [3] Chars written: 117
 [4] Echoing input now
 ```
@@ -234,7 +228,7 @@ diff -uNr 04_safe_globals/src/_arch/aarch64/cpu.rs 05_drivers_gpio_uart/src/_arc
 diff -uNr 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 --- 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 +++ 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
-@@ -0,0 +1,225 @@
+@@ -0,0 +1,228 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
@@ -345,16 +339,13 @@ diff -uNr 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 05_drivers_g
 +/// Abstraction for the associated MMIO registers.
 +type Registers = MMIODerefWrapper<RegisterBlock>;
 +
-+//--------------------------------------------------------------------------------------------------
-+// Public Definitions
-+//--------------------------------------------------------------------------------------------------
-+
-+pub struct GPIOInner {
++struct GPIOInner {
 +    registers: Registers,
 +}
 +
-+// Export the inner struct so that BSPs can use it for the panic handler.
-+pub use GPIOInner as PanicGPIO;
++//--------------------------------------------------------------------------------------------------
++// Public Definitions
++//--------------------------------------------------------------------------------------------------
 +
 +/// Representation of the GPIO HW.
 +pub struct GPIO {
@@ -362,7 +353,7 @@ diff -uNr 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 05_drivers_g
 +}
 +
 +//--------------------------------------------------------------------------------------------------
-+// Public Code
++// Private Code
 +//--------------------------------------------------------------------------------------------------
 +
 +impl GPIOInner {
@@ -385,7 +376,7 @@ diff -uNr 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 05_drivers_g
 +        // Make an educated guess for a good delay value (Sequence described in the BCM2837
 +        // peripherals PDF).
 +        //
-+        // - According to Wikipedia, the fastest Pi3 clocks around 1.4 GHz.
++        // - According to Wikipedia, the fastest RPi4 clocks around 1.5 GHz.
 +        // - The Linux 2837 GPIO driver waits 1 µs between the steps.
 +        //
 +        // So lets try to be on the safe side and default to 2000 cycles, which would equal 1 µs
@@ -432,7 +423,13 @@ diff -uNr 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 05_drivers_g
 +    }
 +}
 +
++//--------------------------------------------------------------------------------------------------
++// Public Code
++//--------------------------------------------------------------------------------------------------
++
 +impl GPIO {
++    pub const COMPATIBLE: &'static str = "BCM GPIO";
++
 +    /// Create an instance.
 +    ///
 +    /// # Safety
@@ -457,14 +454,14 @@ diff -uNr 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 05_drivers_g
 +
 +impl driver::interface::DeviceDriver for GPIO {
 +    fn compatible(&self) -> &'static str {
-+        "BCM GPIO"
++        Self::COMPATIBLE
 +    }
 +}
 
 diff -uNr 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 --- 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 +++ 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
-@@ -0,0 +1,402 @@
+@@ -0,0 +1,407 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
@@ -634,18 +631,15 @@ diff -uNr 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 05_dri
 +    NonBlocking,
 +}
 +
-+//--------------------------------------------------------------------------------------------------
-+// Public Definitions
-+//--------------------------------------------------------------------------------------------------
-+
-+pub struct PL011UartInner {
++struct PL011UartInner {
 +    registers: Registers,
 +    chars_written: usize,
 +    chars_read: usize,
 +}
 +
-+// Export the inner struct so that BSPs can use it for the panic handler.
-+pub use PL011UartInner as PanicUart;
++//--------------------------------------------------------------------------------------------------
++// Public Definitions
++//--------------------------------------------------------------------------------------------------
 +
 +/// Representation of the UART.
 +pub struct PL011Uart {
@@ -653,7 +647,7 @@ diff -uNr 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 05_dri
 +}
 +
 +//--------------------------------------------------------------------------------------------------
-+// Public Code
++// Private Code
 +//--------------------------------------------------------------------------------------------------
 +
 +impl PL011UartInner {
@@ -793,7 +787,13 @@ diff -uNr 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 05_dri
 +    }
 +}
 +
++//--------------------------------------------------------------------------------------------------
++// Public Code
++//--------------------------------------------------------------------------------------------------
++
 +impl PL011Uart {
++    pub const COMPATIBLE: &'static str = "BCM PL011 UART";
++
 +    /// Create an instance.
 +    ///
 +    /// # Safety
@@ -813,7 +813,7 @@ diff -uNr 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 05_dri
 +
 +impl driver::interface::DeviceDriver for PL011Uart {
 +    fn compatible(&self) -> &'static str {
-+        "BCM PL011 UART"
++        Self::COMPATIBLE
 +    }
 +
 +    unsafe fn init(&self) -> Result<(), &'static str> {
@@ -867,6 +867,8 @@ diff -uNr 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 05_dri
 +        self.inner.lock(|inner| inner.chars_read)
 +    }
 +}
++
++impl console::interface::All for PL011Uart {}
 
 diff -uNr 04_safe_globals/src/bsp/device_driver/bcm.rs 05_drivers_gpio_uart/src/bsp/device_driver/bcm.rs
 --- 04_safe_globals/src/bsp/device_driver/bcm.rs
@@ -947,24 +949,19 @@ diff -uNr 04_safe_globals/src/bsp/device_driver.rs 05_drivers_gpio_uart/src/bsp/
 diff -uNr 04_safe_globals/src/bsp/raspberrypi/console.rs 05_drivers_gpio_uart/src/bsp/raspberrypi/console.rs
 --- 04_safe_globals/src/bsp/raspberrypi/console.rs
 +++ 05_drivers_gpio_uart/src/bsp/raspberrypi/console.rs
-@@ -4,113 +4,34 @@
+@@ -4,115 +4,13 @@
 
  //! BSP console facilities.
 
 -use crate::{console, synchronization, synchronization::NullLock};
-+use super::memory;
-+use crate::{bsp::device_driver, console};
- use core::fmt;
-
- //--------------------------------------------------------------------------------------------------
+-use core::fmt;
+-
+-//--------------------------------------------------------------------------------------------------
 -// Private Definitions
-+// Public Code
- //--------------------------------------------------------------------------------------------------
-
+-//--------------------------------------------------------------------------------------------------
+-
 -/// A mystical, magical device for generating QEMU output out of the void.
-+/// In case of a panic, the panic handler uses this function to take a last shot at printing
-+/// something before the system is halted.
- ///
+-///
 -/// The mutex protected part.
 -struct QEMUOutputInner {
 -    chars_written: usize,
@@ -1007,13 +1004,9 @@ diff -uNr 04_safe_globals/src/bsp/raspberrypi/console.rs 05_drivers_gpio_uart/sr
 -/// Implementing `core::fmt::Write` enables usage of the `format_args!` macros, which in turn are
 -/// used to implement the `kernel`'s `print!` and `println!` macros. By implementing `write_str()`,
 -/// we get `write_fmt()` automatically.
-+/// We try to init panic-versions of the GPIO and the UART. The panic versions are not protected
-+/// with synchronization primitives, which increases chances that we get to print something, even
-+/// when the kernel's default GPIO or UART instances happen to be locked at the time of the panic.
- ///
+-///
 -/// The function takes an `&mut self`, so it must be implemented for the inner struct.
-+/// # Safety
- ///
+-///
 -/// See [`src/print.rs`].
 -///
 -/// [`src/print.rs`]: ../../print/index.html
@@ -1031,11 +1024,12 @@ diff -uNr 04_safe_globals/src/bsp/raspberrypi/console.rs 05_drivers_gpio_uart/sr
 -        Ok(())
 -    }
 -}
--
--//--------------------------------------------------------------------------------------------------
--// Public Code
--//--------------------------------------------------------------------------------------------------
--
++use crate::console;
+
+ //--------------------------------------------------------------------------------------------------
+ // Public Code
+ //--------------------------------------------------------------------------------------------------
+
 -impl QEMUOutput {
 -    /// Create a new instance.
 -    pub const fn new() -> QEMUOutput {
@@ -1043,18 +1037,10 @@ diff -uNr 04_safe_globals/src/bsp/raspberrypi/console.rs 05_drivers_gpio_uart/sr
 -            inner: NullLock::new(QEMUOutputInner::new()),
 -        }
 -    }
-+/// - Use only for printing during a panic.
-+pub unsafe fn panic_console_out() -> impl fmt::Write {
-+    let mut panic_gpio = device_driver::PanicGPIO::new(memory::map::mmio::GPIO_START);
-+    let mut panic_uart = device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START);
-+
-+    panic_gpio.map_pl011_uart();
-+    panic_uart.init();
-+    panic_uart
- }
-
+-}
+-
  /// Return a reference to the console.
- pub fn console() -> &'static impl console::interface::All {
+ pub fn console() -> &'static dyn console::interface::All {
 -    &QEMU_OUTPUT
 -}
 -
@@ -1077,20 +1063,23 @@ diff -uNr 04_safe_globals/src/bsp/raspberrypi/console.rs 05_drivers_gpio_uart/sr
 -    fn chars_written(&self) -> usize {
 -        self.inner.lock(|inner| inner.chars_written)
 -    }
-+    &super::PL011_UART
++    &super::driver::PL011_UART
  }
+-
+-impl console::interface::All for QEMUOutput {}
 
 diff -uNr 04_safe_globals/src/bsp/raspberrypi/driver.rs 05_drivers_gpio_uart/src/bsp/raspberrypi/driver.rs
 --- 04_safe_globals/src/bsp/raspberrypi/driver.rs
 +++ 05_drivers_gpio_uart/src/bsp/raspberrypi/driver.rs
-@@ -0,0 +1,49 @@
+@@ -0,0 +1,55 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! BSP driver support.
 +
-+use crate::driver;
++use super::memory::map::mmio;
++use crate::{bsp::device_driver, driver};
 +
 +//--------------------------------------------------------------------------------------------------
 +// Private Definitions
@@ -1105,8 +1094,13 @@ diff -uNr 04_safe_globals/src/bsp/raspberrypi/driver.rs 05_drivers_gpio_uart/src
 +// Global instances
 +//--------------------------------------------------------------------------------------------------
 +
++pub(super) static PL011_UART: device_driver::PL011Uart =
++    unsafe { device_driver::PL011Uart::new(mmio::PL011_UART_START) };
++
++static GPIO: device_driver::GPIO = unsafe { device_driver::GPIO::new(mmio::GPIO_START) };
++
 +static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
-+    device_drivers: [&super::GPIO, &super::PL011_UART],
++    device_drivers: [&PL011_UART, &GPIO],
 +};
 +
 +//--------------------------------------------------------------------------------------------------
@@ -1130,7 +1124,7 @@ diff -uNr 04_safe_globals/src/bsp/raspberrypi/driver.rs 05_drivers_gpio_uart/src
 +
 +    fn post_device_driver_init(&self) {
 +        // Configure PL011Uart's output pins.
-+        super::GPIO.map_pl011_uart();
++        GPIO.map_pl011_uart();
 +    }
 +}
 
@@ -1179,7 +1173,7 @@ diff -uNr 04_safe_globals/src/bsp/raspberrypi/memory.rs 05_drivers_gpio_uart/src
 diff -uNr 04_safe_globals/src/bsp/raspberrypi.rs 05_drivers_gpio_uart/src/bsp/raspberrypi.rs
 --- 04_safe_globals/src/bsp/raspberrypi.rs
 +++ 05_drivers_gpio_uart/src/bsp/raspberrypi.rs
-@@ -6,3 +6,33 @@
+@@ -6,3 +6,22 @@
 
  pub mod console;
  pub mod cpu;
@@ -1187,17 +1181,6 @@ diff -uNr 04_safe_globals/src/bsp/raspberrypi.rs 05_drivers_gpio_uart/src/bsp/ra
 +pub mod memory;
 +
 +//--------------------------------------------------------------------------------------------------
-+// Global instances
-+//--------------------------------------------------------------------------------------------------
-+use super::device_driver;
-+
-+static GPIO: device_driver::GPIO =
-+    unsafe { device_driver::GPIO::new(memory::map::mmio::GPIO_START) };
-+
-+static PL011_UART: device_driver::PL011Uart =
-+    unsafe { device_driver::PL011Uart::new(memory::map::mmio::PL011_UART_START) };
-+
-+//--------------------------------------------------------------------------------------------------
 +// Public Code
 +//--------------------------------------------------------------------------------------------------
 +
@@ -1230,7 +1213,7 @@ diff -uNr 04_safe_globals/src/bsp.rs 05_drivers_gpio_uart/src/bsp.rs
 diff -uNr 04_safe_globals/src/console.rs 05_drivers_gpio_uart/src/console.rs
 --- 04_safe_globals/src/console.rs
 +++ 05_drivers_gpio_uart/src/console.rs
-@@ -14,8 +14,25 @@
+@@ -16,8 +16,25 @@
 
      /// Console write functions.
      pub trait Write {
@@ -1256,7 +1239,7 @@ diff -uNr 04_safe_globals/src/console.rs 05_drivers_gpio_uart/src/console.rs
      }
 
      /// Console statistics.
-@@ -24,8 +41,13 @@
+@@ -26,10 +43,15 @@
          fn chars_written(&self) -> usize {
              0
          }
@@ -1268,10 +1251,12 @@ diff -uNr 04_safe_globals/src/console.rs 05_drivers_gpio_uart/src/console.rs
      }
 
      /// Trait alias for a full-fledged console.
--    pub trait All = Write + Statistics;
-+    pub trait All = Write + Read + Statistics;
+-    pub trait All: Write + Statistics {}
++    pub trait All: Write + Read + Statistics {}
  }
 
+ //--------------------------------------------------------------------------------------------------
+
 diff -uNr 04_safe_globals/src/cpu.rs 05_drivers_gpio_uart/src/cpu.rs
 --- 04_safe_globals/src/cpu.rs
 +++ 05_drivers_gpio_uart/src/cpu.rs
@@ -1353,16 +1338,15 @@ diff -uNr 04_safe_globals/src/main.rs 05_drivers_gpio_uart/src/main.rs
  mod panic_wait;
  mod print;
  mod synchronization;
-@@ -125,16 +127,54 @@
+@@ -125,13 +127,50 @@
  /// # Safety
  ///
  /// - Only a single core must be active and running this function.
 +/// - The init calls in this function must appear in the correct order.
  unsafe fn kernel_init() -> ! {
--    use console::interface::Statistics;
+-    use console::console;
 +    use driver::interface::DriverManager;
-
--    println!("[0] Hello from Rust!");
++
 +    for i in bsp::driver::driver_manager().all_device_drivers().iter() {
 +        if let Err(x) = i.init() {
 +            panic!("Error loading driver: {}: {}", i.compatible(), x);
@@ -1370,17 +1354,20 @@ diff -uNr 04_safe_globals/src/main.rs 05_drivers_gpio_uart/src/main.rs
 +    }
 +    bsp::driver::driver_manager().post_device_driver_init();
 +    // println! is usable from here on.
-+
+
+-    println!("[0] Hello from Rust!");
 +    // Transition from unsafe to safe.
 +    kernel_main()
 +}
-+
+
+-    println!("[1] Chars written: {}", console().chars_written());
 +/// The main function running after the early init.
 +fn kernel_main() -> ! {
-+    use bsp::console::console;
-+    use console::interface::All;
++    use console::console;
 +    use driver::interface::DriverManager;
-+
+
+-    println!("[2] Stopping here.");
+-    cpu::wait_forever()
 +    println!(
 +        "[0] {} version {}",
 +        env!("CARGO_PKG_NAME"),
@@ -1396,69 +1383,18 @@ diff -uNr 04_safe_globals/src/main.rs 05_drivers_gpio_uart/src/main.rs
 +    {
 +        println!("      {}. {}", i + 1, driver.compatible());
 +    }
-
-     println!(
--        "[1] Chars written: {}",
-+        "[3] Chars written: {}",
-         bsp::console::console().chars_written()
-     );
++
++    println!("[3] Chars written: {}", console().chars_written());
 +    println!("[4] Echoing input now");
-
--    println!("[2] Stopping here.");
--    cpu::wait_forever()
++
 +    // Discard any spurious received characters before going into echo mode.
 +    console().clear_rx();
 +    loop {
-+        let c = bsp::console::console().read_char();
-+        bsp::console::console().write_char(c);
++        let c = console().read_char();
++        console().write_char(c);
 +    }
  }
 
-diff -uNr 04_safe_globals/src/panic_wait.rs 05_drivers_gpio_uart/src/panic_wait.rs
---- 04_safe_globals/src/panic_wait.rs
-+++ 05_drivers_gpio_uart/src/panic_wait.rs
-@@ -4,13 +4,29 @@
-
- //! A panic handler that infinitely waits.
-
--use crate::{cpu, println};
--use core::panic::PanicInfo;
-+use crate::{bsp, cpu};
-+use core::{fmt, panic::PanicInfo};
-
- //--------------------------------------------------------------------------------------------------
- // Private Code
- //--------------------------------------------------------------------------------------------------
-
-+fn _panic_print(args: fmt::Arguments) {
-+    use fmt::Write;
-+
-+    unsafe { bsp::console::panic_console_out().write_fmt(args).unwrap() };
-+}
-+
-+/// Prints with a newline - only use from the panic handler.
-+///
-+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
-+#[macro_export]
-+macro_rules! panic_println {
-+    ($($arg:tt)*) => ({
-+        _panic_print(format_args_nl!($($arg)*));
-+    })
-+}
-+
- /// Stop immediately if called a second time.
- ///
- /// # Note
-@@ -50,7 +66,7 @@
-         _ => ("???", 0, 0),
-     };
-
--    println!(
-+    panic_println!(
-         "Kernel panic!\n\n\
-         Panic location:\n      File '{}', line {}, column {}\n\n\
-         {}",
-
 diff -uNr 04_safe_globals/tests/boot_test_string.rb 05_drivers_gpio_uart/tests/boot_test_string.rb
 --- 04_safe_globals/tests/boot_test_string.rb
 +++ 05_drivers_gpio_uart/tests/boot_test_string.rb
diff --git a/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 76ce3bd19..0601d58e6 100644
--- a/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -108,16 +108,13 @@ register_structs! {
 /// Abstraction for the associated MMIO registers.
 type Registers = MMIODerefWrapper<RegisterBlock>;
 
-//--------------------------------------------------------------------------------------------------
-// Public Definitions
-//--------------------------------------------------------------------------------------------------
-
-pub struct GPIOInner {
+struct GPIOInner {
     registers: Registers,
 }
 
-// Export the inner struct so that BSPs can use it for the panic handler.
-pub use GPIOInner as PanicGPIO;
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
 
 /// Representation of the GPIO HW.
 pub struct GPIO {
@@ -125,7 +122,7 @@ pub struct GPIO {
 }
 
 //--------------------------------------------------------------------------------------------------
-// Public Code
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
 impl GPIOInner {
@@ -148,7 +145,7 @@ impl GPIOInner {
         // Make an educated guess for a good delay value (Sequence described in the BCM2837
         // peripherals PDF).
         //
-        // - According to Wikipedia, the fastest Pi3 clocks around 1.4 GHz.
+        // - According to Wikipedia, the fastest RPi4 clocks around 1.5 GHz.
         // - The Linux 2837 GPIO driver waits 1 µs between the steps.
         //
         // So lets try to be on the safe side and default to 2000 cycles, which would equal 1 µs
@@ -195,7 +192,13 @@ impl GPIOInner {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
 impl GPIO {
+    pub const COMPATIBLE: &'static str = "BCM GPIO";
+
     /// Create an instance.
     ///
     /// # Safety
@@ -220,6 +223,6 @@ use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for GPIO {
     fn compatible(&self) -> &'static str {
-        "BCM GPIO"
+        Self::COMPATIBLE
     }
 }
diff --git a/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 85cd31549..b034e92e5 100644
--- a/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -167,18 +167,15 @@ enum BlockingMode {
     NonBlocking,
 }
 
-//--------------------------------------------------------------------------------------------------
-// Public Definitions
-//--------------------------------------------------------------------------------------------------
-
-pub struct PL011UartInner {
+struct PL011UartInner {
     registers: Registers,
     chars_written: usize,
     chars_read: usize,
 }
 
-// Export the inner struct so that BSPs can use it for the panic handler.
-pub use PL011UartInner as PanicUart;
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
 
 /// Representation of the UART.
 pub struct PL011Uart {
@@ -186,7 +183,7 @@ pub struct PL011Uart {
 }
 
 //--------------------------------------------------------------------------------------------------
-// Public Code
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
 impl PL011UartInner {
@@ -326,7 +323,13 @@ impl fmt::Write for PL011UartInner {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
 impl PL011Uart {
+    pub const COMPATIBLE: &'static str = "BCM PL011 UART";
+
     /// Create an instance.
     ///
     /// # Safety
@@ -346,7 +349,7 @@ use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for PL011Uart {
     fn compatible(&self) -> &'static str {
-        "BCM PL011 UART"
+        Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
@@ -400,3 +403,5 @@ impl console::interface::Statistics for PL011Uart {
         self.inner.lock(|inner| inner.chars_read)
     }
 }
+
+impl console::interface::All for PL011Uart {}
diff --git a/05_drivers_gpio_uart/src/bsp/raspberrypi.rs b/05_drivers_gpio_uart/src/bsp/raspberrypi.rs
index 22edb4fa6..a9a7261af 100644
--- a/05_drivers_gpio_uart/src/bsp/raspberrypi.rs
+++ b/05_drivers_gpio_uart/src/bsp/raspberrypi.rs
@@ -9,17 +9,6 @@ pub mod cpu;
 pub mod driver;
 pub mod memory;
 
-//--------------------------------------------------------------------------------------------------
-// Global instances
-//--------------------------------------------------------------------------------------------------
-use super::device_driver;
-
-static GPIO: device_driver::GPIO =
-    unsafe { device_driver::GPIO::new(memory::map::mmio::GPIO_START) };
-
-static PL011_UART: device_driver::PL011Uart =
-    unsafe { device_driver::PL011Uart::new(memory::map::mmio::PL011_UART_START) };
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
diff --git a/05_drivers_gpio_uart/src/bsp/raspberrypi/console.rs b/05_drivers_gpio_uart/src/bsp/raspberrypi/console.rs
index a247032fc..0a630eef4 100644
--- a/05_drivers_gpio_uart/src/bsp/raspberrypi/console.rs
+++ b/05_drivers_gpio_uart/src/bsp/raspberrypi/console.rs
@@ -4,34 +4,13 @@
 
 //! BSP console facilities.
 
-use super::memory;
-use crate::{bsp::device_driver, console};
-use core::fmt;
+use crate::console;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// In case of a panic, the panic handler uses this function to take a last shot at printing
-/// something before the system is halted.
-///
-/// We try to init panic-versions of the GPIO and the UART. The panic versions are not protected
-/// with synchronization primitives, which increases chances that we get to print something, even
-/// when the kernel's default GPIO or UART instances happen to be locked at the time of the panic.
-///
-/// # Safety
-///
-/// - Use only for printing during a panic.
-pub unsafe fn panic_console_out() -> impl fmt::Write {
-    let mut panic_gpio = device_driver::PanicGPIO::new(memory::map::mmio::GPIO_START);
-    let mut panic_uart = device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START);
-
-    panic_gpio.map_pl011_uart();
-    panic_uart.init();
-    panic_uart
-}
-
 /// Return a reference to the console.
-pub fn console() -> &'static impl console::interface::All {
-    &super::PL011_UART
+pub fn console() -> &'static dyn console::interface::All {
+    &super::driver::PL011_UART
 }
diff --git a/05_drivers_gpio_uart/src/bsp/raspberrypi/driver.rs b/05_drivers_gpio_uart/src/bsp/raspberrypi/driver.rs
index b5538baa3..8b683ed8b 100644
--- a/05_drivers_gpio_uart/src/bsp/raspberrypi/driver.rs
+++ b/05_drivers_gpio_uart/src/bsp/raspberrypi/driver.rs
@@ -4,7 +4,8 @@
 
 //! BSP driver support.
 
-use crate::driver;
+use super::memory::map::mmio;
+use crate::{bsp::device_driver, driver};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -19,8 +20,13 @@ struct BSPDriverManager {
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
+pub(super) static PL011_UART: device_driver::PL011Uart =
+    unsafe { device_driver::PL011Uart::new(mmio::PL011_UART_START) };
+
+static GPIO: device_driver::GPIO = unsafe { device_driver::GPIO::new(mmio::GPIO_START) };
+
 static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
-    device_drivers: [&super::GPIO, &super::PL011_UART],
+    device_drivers: [&PL011_UART, &GPIO],
 };
 
 //--------------------------------------------------------------------------------------------------
@@ -44,6 +50,6 @@ impl driver::interface::DriverManager for BSPDriverManager {
 
     fn post_device_driver_init(&self) {
         // Configure PL011Uart's output pins.
-        super::GPIO.map_pl011_uart();
+        GPIO.map_pl011_uart();
     }
 }
diff --git a/05_drivers_gpio_uart/src/console.rs b/05_drivers_gpio_uart/src/console.rs
index e49e241fe..c1fb0e53b 100644
--- a/05_drivers_gpio_uart/src/console.rs
+++ b/05_drivers_gpio_uart/src/console.rs
@@ -4,6 +4,8 @@
 
 //! System console.
 
+use crate::bsp;
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -49,5 +51,16 @@ pub mod interface {
     }
 
     /// Trait alias for a full-fledged console.
-    pub trait All = Write + Read + Statistics;
+    pub trait All: Write + Read + Statistics {}
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the console.
+///
+/// This is the global console used by all printing macros.
+pub fn console() -> &'static dyn interface::All {
+    bsp::console::console()
 }
diff --git a/05_drivers_gpio_uart/src/main.rs b/05_drivers_gpio_uart/src/main.rs
index 2e8bfeaab..c9b73382f 100644
--- a/05_drivers_gpio_uart/src/main.rs
+++ b/05_drivers_gpio_uart/src/main.rs
@@ -145,8 +145,7 @@ unsafe fn kernel_init() -> ! {
 
 /// The main function running after the early init.
 fn kernel_main() -> ! {
-    use bsp::console::console;
-    use console::interface::All;
+    use console::console;
     use driver::interface::DriverManager;
 
     println!(
@@ -165,16 +164,13 @@ fn kernel_main() -> ! {
         println!("      {}. {}", i + 1, driver.compatible());
     }
 
-    println!(
-        "[3] Chars written: {}",
-        bsp::console::console().chars_written()
-    );
+    println!("[3] Chars written: {}", console().chars_written());
     println!("[4] Echoing input now");
 
     // Discard any spurious received characters before going into echo mode.
     console().clear_rx();
     loop {
-        let c = bsp::console::console().read_char();
-        bsp::console::console().write_char(c);
+        let c = console().read_char();
+        console().write_char(c);
     }
 }
diff --git a/05_drivers_gpio_uart/src/panic_wait.rs b/05_drivers_gpio_uart/src/panic_wait.rs
index e546b06d1..fb30e8d4c 100644
--- a/05_drivers_gpio_uart/src/panic_wait.rs
+++ b/05_drivers_gpio_uart/src/panic_wait.rs
@@ -4,29 +4,13 @@
 
 //! A panic handler that infinitely waits.
 
-use crate::{bsp, cpu};
-use core::{fmt, panic::PanicInfo};
+use crate::{cpu, println};
+use core::panic::PanicInfo;
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-fn _panic_print(args: fmt::Arguments) {
-    use fmt::Write;
-
-    unsafe { bsp::console::panic_console_out().write_fmt(args).unwrap() };
-}
-
-/// Prints with a newline - only use from the panic handler.
-///
-/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
-#[macro_export]
-macro_rules! panic_println {
-    ($($arg:tt)*) => ({
-        _panic_print(format_args_nl!($($arg)*));
-    })
-}
-
 /// Stop immediately if called a second time.
 ///
 /// # Note
@@ -66,7 +50,7 @@ fn panic(info: &PanicInfo) -> ! {
         _ => ("???", 0, 0),
     };
 
-    panic_println!(
+    println!(
         "Kernel panic!\n\n\
         Panic location:\n      File '{}', line {}, column {}\n\n\
         {}",
diff --git a/05_drivers_gpio_uart/src/print.rs b/05_drivers_gpio_uart/src/print.rs
index 81c6d179a..f69bad44d 100644
--- a/05_drivers_gpio_uart/src/print.rs
+++ b/05_drivers_gpio_uart/src/print.rs
@@ -4,7 +4,7 @@
 
 //! Printing.
 
-use crate::{bsp, console};
+use crate::console;
 use core::fmt;
 
 //--------------------------------------------------------------------------------------------------
@@ -13,9 +13,7 @@ use core::fmt;
 
 #[doc(hidden)]
 pub fn _print(args: fmt::Arguments) {
-    use console::interface::Write;
-
-    bsp::console::console().write_fmt(args).unwrap();
+    console::console().write_fmt(args).unwrap();
 }
 
 /// Prints without a newline.
diff --git a/06_uart_chainloader/README.md b/06_uart_chainloader/README.md
index 20c120d42..38f9cc05c 100644
--- a/06_uart_chainloader/README.md
+++ b/06_uart_chainloader/README.md
@@ -66,6 +66,7 @@ Minipush 1.0
 [MP] ⏳ Waiting for /dev/ttyUSB0
 [MP] ✅ Serial connected
 [MP] 🔌 Please power the target now
+
  __  __ _      _ _                 _
 |  \/  (_)_ _ (_) |   ___  __ _ __| |
 | |\/| | | ' \| | |__/ _ \/ _` / _` |
@@ -74,14 +75,14 @@ Minipush 1.0
            Raspberry Pi 3
 
 [ML] Requesting binary
-[MP] ⏩ Pushing 6 KiB ==========================================🦀 100% 0 KiB/s Time: 00:00:00
+[MP] ⏩ Pushing 7 KiB ==========================================🦀 100% 0 KiB/s Time: 00:00:00
 [ML] Loaded! Executing the payload now
 
 [0] mingo version 0.5.0
 [1] Booting on: Raspberry Pi 3
 [2] Drivers loaded:
-      1. BCM GPIO
-      2. BCM PL011 UART
+      1. BCM PL011 UART
+      2. BCM GPIO
 [3] Chars written: 117
 [4] Echoing input now
 ```
@@ -324,23 +325,10 @@ diff -uNr 05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s 06_uart_chainloader/
  	// Infinitely wait for events (aka "park the core").
  .L_parking_loop:
 
-diff -uNr 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
---- 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
-+++ 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
-@@ -148,7 +148,7 @@
-         // Make an educated guess for a good delay value (Sequence described in the BCM2837
-         // peripherals PDF).
-         //
--        // - According to Wikipedia, the fastest Pi3 clocks around 1.4 GHz.
-+        // - According to Wikipedia, the fastest RPi4 clocks around 1.5 GHz.
-         // - The Linux 2837 GPIO driver waits 1 µs between the steps.
-         //
-         // So lets try to be on the safe side and default to 2000 cycles, which would equal 1 µs
-
 diff -uNr 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 --- 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 +++ 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
-@@ -278,7 +278,7 @@
+@@ -275,7 +275,7 @@
      }
 
      /// Retrieve a character.
@@ -349,7 +337,7 @@ diff -uNr 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 0
          // If RX FIFO is empty,
          if self.registers.FR.matches_all(FR::RXFE::SET) {
              // immediately return in non-blocking mode.
-@@ -293,12 +293,7 @@
+@@ -290,12 +290,7 @@
          }
 
          // Read one character.
@@ -363,7 +351,7 @@ diff -uNr 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 0
 
          // Update statistics.
          self.chars_read += 1;
-@@ -378,14 +373,14 @@
+@@ -381,14 +376,14 @@
  impl console::interface::Read for PL011Uart {
      fn read_char(&self) -> char {
          self.inner
@@ -426,19 +414,14 @@ diff -uNr 05_drivers_gpio_uart/src/bsp/raspberrypi/kernel.ld 06_uart_chainloader
 diff -uNr 05_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs 06_uart_chainloader/src/bsp/raspberrypi/memory.rs
 --- 05_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
 +++ 06_uart_chainloader/src/bsp/raspberrypi/memory.rs
-@@ -11,9 +11,10 @@
+@@ -11,6 +11,7 @@
  /// The board's physical memory map.
  #[rustfmt::skip]
  pub(super) mod map {
 +    pub const BOARD_DEFAULT_LOAD_ADDRESS: usize =        0x8_0000;
 
--    pub const GPIO_OFFSET:         usize = 0x0020_0000;
--    pub const UART_OFFSET:         usize = 0x0020_1000;
-+    pub const GPIO_OFFSET:                usize =        0x0020_0000;
-+    pub const UART_OFFSET:                usize =        0x0020_1000;
-
-     /// Physical devices.
-     #[cfg(feature = "bsp_rpi3")]
+     pub const GPIO_OFFSET:         usize = 0x0020_0000;
+     pub const UART_OFFSET:         usize = 0x0020_1000;
 @@ -35,3 +36,13 @@
          pub const PL011_UART_START: usize = START + UART_OFFSET;
      }
@@ -457,7 +440,7 @@ diff -uNr 05_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs 06_uart_chainloader
 diff -uNr 05_drivers_gpio_uart/src/main.rs 06_uart_chainloader/src/main.rs
 --- 05_drivers_gpio_uart/src/main.rs
 +++ 06_uart_chainloader/src/main.rs
-@@ -143,38 +143,56 @@
+@@ -143,34 +143,55 @@
      kernel_main()
  }
 
@@ -470,8 +453,7 @@ diff -uNr 05_drivers_gpio_uart/src/main.rs 06_uart_chainloader/src/main.rs
 +
  /// The main function running after the early init.
  fn kernel_main() -> ! {
-     use bsp::console::console;
-     use console::interface::All;
+     use console::console;
 -    use driver::interface::DriverManager;
 
 -    println!(
@@ -502,10 +484,7 @@ diff -uNr 05_drivers_gpio_uart/src/main.rs 06_uart_chainloader/src/main.rs
 +        console().write_char(3 as char);
      }
 
--    println!(
--        "[3] Chars written: {}",
--        bsp::console::console().chars_written()
--    );
+-    println!("[3] Chars written: {}", console().chars_written());
 -    println!("[4] Echoing input now");
 +    // Read the binary's size.
 +    let mut size: u32 = u32::from(console().read_char() as u8);
@@ -516,8 +495,8 @@ diff -uNr 05_drivers_gpio_uart/src/main.rs 06_uart_chainloader/src/main.rs
 -    // Discard any spurious received characters before going into echo mode.
 -    console().clear_rx();
 -    loop {
--        let c = bsp::console::console().read_char();
--        bsp::console::console().write_char(c);
+-        let c = console().read_char();
+-        console().write_char(c);
 +    // Trust it's not too big.
 +    console().write_char('O');
 +    console().write_char('K');
diff --git a/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 5c68107a9..0601d58e6 100644
--- a/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -108,16 +108,13 @@ register_structs! {
 /// Abstraction for the associated MMIO registers.
 type Registers = MMIODerefWrapper<RegisterBlock>;
 
-//--------------------------------------------------------------------------------------------------
-// Public Definitions
-//--------------------------------------------------------------------------------------------------
-
-pub struct GPIOInner {
+struct GPIOInner {
     registers: Registers,
 }
 
-// Export the inner struct so that BSPs can use it for the panic handler.
-pub use GPIOInner as PanicGPIO;
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
 
 /// Representation of the GPIO HW.
 pub struct GPIO {
@@ -125,7 +122,7 @@ pub struct GPIO {
 }
 
 //--------------------------------------------------------------------------------------------------
-// Public Code
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
 impl GPIOInner {
@@ -195,7 +192,13 @@ impl GPIOInner {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
 impl GPIO {
+    pub const COMPATIBLE: &'static str = "BCM GPIO";
+
     /// Create an instance.
     ///
     /// # Safety
@@ -220,6 +223,6 @@ use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for GPIO {
     fn compatible(&self) -> &'static str {
-        "BCM GPIO"
+        Self::COMPATIBLE
     }
 }
diff --git a/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 7d66484b7..df56d7c4d 100644
--- a/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -167,18 +167,15 @@ enum BlockingMode {
     NonBlocking,
 }
 
-//--------------------------------------------------------------------------------------------------
-// Public Definitions
-//--------------------------------------------------------------------------------------------------
-
-pub struct PL011UartInner {
+struct PL011UartInner {
     registers: Registers,
     chars_written: usize,
     chars_read: usize,
 }
 
-// Export the inner struct so that BSPs can use it for the panic handler.
-pub use PL011UartInner as PanicUart;
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
 
 /// Representation of the UART.
 pub struct PL011Uart {
@@ -186,7 +183,7 @@ pub struct PL011Uart {
 }
 
 //--------------------------------------------------------------------------------------------------
-// Public Code
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
 impl PL011UartInner {
@@ -321,7 +318,13 @@ impl fmt::Write for PL011UartInner {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
 impl PL011Uart {
+    pub const COMPATIBLE: &'static str = "BCM PL011 UART";
+
     /// Create an instance.
     ///
     /// # Safety
@@ -341,7 +344,7 @@ use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for PL011Uart {
     fn compatible(&self) -> &'static str {
-        "BCM PL011 UART"
+        Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
@@ -395,3 +398,5 @@ impl console::interface::Statistics for PL011Uart {
         self.inner.lock(|inner| inner.chars_read)
     }
 }
+
+impl console::interface::All for PL011Uart {}
diff --git a/06_uart_chainloader/src/bsp/raspberrypi.rs b/06_uart_chainloader/src/bsp/raspberrypi.rs
index 22edb4fa6..a9a7261af 100644
--- a/06_uart_chainloader/src/bsp/raspberrypi.rs
+++ b/06_uart_chainloader/src/bsp/raspberrypi.rs
@@ -9,17 +9,6 @@ pub mod cpu;
 pub mod driver;
 pub mod memory;
 
-//--------------------------------------------------------------------------------------------------
-// Global instances
-//--------------------------------------------------------------------------------------------------
-use super::device_driver;
-
-static GPIO: device_driver::GPIO =
-    unsafe { device_driver::GPIO::new(memory::map::mmio::GPIO_START) };
-
-static PL011_UART: device_driver::PL011Uart =
-    unsafe { device_driver::PL011Uart::new(memory::map::mmio::PL011_UART_START) };
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
diff --git a/06_uart_chainloader/src/bsp/raspberrypi/console.rs b/06_uart_chainloader/src/bsp/raspberrypi/console.rs
index a247032fc..0a630eef4 100644
--- a/06_uart_chainloader/src/bsp/raspberrypi/console.rs
+++ b/06_uart_chainloader/src/bsp/raspberrypi/console.rs
@@ -4,34 +4,13 @@
 
 //! BSP console facilities.
 
-use super::memory;
-use crate::{bsp::device_driver, console};
-use core::fmt;
+use crate::console;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// In case of a panic, the panic handler uses this function to take a last shot at printing
-/// something before the system is halted.
-///
-/// We try to init panic-versions of the GPIO and the UART. The panic versions are not protected
-/// with synchronization primitives, which increases chances that we get to print something, even
-/// when the kernel's default GPIO or UART instances happen to be locked at the time of the panic.
-///
-/// # Safety
-///
-/// - Use only for printing during a panic.
-pub unsafe fn panic_console_out() -> impl fmt::Write {
-    let mut panic_gpio = device_driver::PanicGPIO::new(memory::map::mmio::GPIO_START);
-    let mut panic_uart = device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START);
-
-    panic_gpio.map_pl011_uart();
-    panic_uart.init();
-    panic_uart
-}
-
 /// Return a reference to the console.
-pub fn console() -> &'static impl console::interface::All {
-    &super::PL011_UART
+pub fn console() -> &'static dyn console::interface::All {
+    &super::driver::PL011_UART
 }
diff --git a/06_uart_chainloader/src/bsp/raspberrypi/driver.rs b/06_uart_chainloader/src/bsp/raspberrypi/driver.rs
index b5538baa3..8b683ed8b 100644
--- a/06_uart_chainloader/src/bsp/raspberrypi/driver.rs
+++ b/06_uart_chainloader/src/bsp/raspberrypi/driver.rs
@@ -4,7 +4,8 @@
 
 //! BSP driver support.
 
-use crate::driver;
+use super::memory::map::mmio;
+use crate::{bsp::device_driver, driver};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -19,8 +20,13 @@ struct BSPDriverManager {
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
+pub(super) static PL011_UART: device_driver::PL011Uart =
+    unsafe { device_driver::PL011Uart::new(mmio::PL011_UART_START) };
+
+static GPIO: device_driver::GPIO = unsafe { device_driver::GPIO::new(mmio::GPIO_START) };
+
 static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
-    device_drivers: [&super::GPIO, &super::PL011_UART],
+    device_drivers: [&PL011_UART, &GPIO],
 };
 
 //--------------------------------------------------------------------------------------------------
@@ -44,6 +50,6 @@ impl driver::interface::DriverManager for BSPDriverManager {
 
     fn post_device_driver_init(&self) {
         // Configure PL011Uart's output pins.
-        super::GPIO.map_pl011_uart();
+        GPIO.map_pl011_uart();
     }
 }
diff --git a/06_uart_chainloader/src/bsp/raspberrypi/memory.rs b/06_uart_chainloader/src/bsp/raspberrypi/memory.rs
index 0959bdce7..6ef46c350 100644
--- a/06_uart_chainloader/src/bsp/raspberrypi/memory.rs
+++ b/06_uart_chainloader/src/bsp/raspberrypi/memory.rs
@@ -13,8 +13,8 @@
 pub(super) mod map {
     pub const BOARD_DEFAULT_LOAD_ADDRESS: usize =        0x8_0000;
 
-    pub const GPIO_OFFSET:                usize =        0x0020_0000;
-    pub const UART_OFFSET:                usize =        0x0020_1000;
+    pub const GPIO_OFFSET:         usize = 0x0020_0000;
+    pub const UART_OFFSET:         usize = 0x0020_1000;
 
     /// Physical devices.
     #[cfg(feature = "bsp_rpi3")]
diff --git a/06_uart_chainloader/src/console.rs b/06_uart_chainloader/src/console.rs
index e49e241fe..c1fb0e53b 100644
--- a/06_uart_chainloader/src/console.rs
+++ b/06_uart_chainloader/src/console.rs
@@ -4,6 +4,8 @@
 
 //! System console.
 
+use crate::bsp;
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -49,5 +51,16 @@ pub mod interface {
     }
 
     /// Trait alias for a full-fledged console.
-    pub trait All = Write + Read + Statistics;
+    pub trait All: Write + Read + Statistics {}
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the console.
+///
+/// This is the global console used by all printing macros.
+pub fn console() -> &'static dyn interface::All {
+    bsp::console::console()
 }
diff --git a/06_uart_chainloader/src/main.rs b/06_uart_chainloader/src/main.rs
index b8e6fea49..08bd9ad94 100644
--- a/06_uart_chainloader/src/main.rs
+++ b/06_uart_chainloader/src/main.rs
@@ -152,8 +152,7 @@ const MINILOAD_LOGO: &str = r#"
 
 /// The main function running after the early init.
 fn kernel_main() -> ! {
-    use bsp::console::console;
-    use console::interface::All;
+    use console::console;
 
     println!("{}", MINILOAD_LOGO);
     println!("{:^37}", bsp::board_name());
diff --git a/06_uart_chainloader/src/panic_wait.rs b/06_uart_chainloader/src/panic_wait.rs
index e546b06d1..fb30e8d4c 100644
--- a/06_uart_chainloader/src/panic_wait.rs
+++ b/06_uart_chainloader/src/panic_wait.rs
@@ -4,29 +4,13 @@
 
 //! A panic handler that infinitely waits.
 
-use crate::{bsp, cpu};
-use core::{fmt, panic::PanicInfo};
+use crate::{cpu, println};
+use core::panic::PanicInfo;
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-fn _panic_print(args: fmt::Arguments) {
-    use fmt::Write;
-
-    unsafe { bsp::console::panic_console_out().write_fmt(args).unwrap() };
-}
-
-/// Prints with a newline - only use from the panic handler.
-///
-/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
-#[macro_export]
-macro_rules! panic_println {
-    ($($arg:tt)*) => ({
-        _panic_print(format_args_nl!($($arg)*));
-    })
-}
-
 /// Stop immediately if called a second time.
 ///
 /// # Note
@@ -66,7 +50,7 @@ fn panic(info: &PanicInfo) -> ! {
         _ => ("???", 0, 0),
     };
 
-    panic_println!(
+    println!(
         "Kernel panic!\n\n\
         Panic location:\n      File '{}', line {}, column {}\n\n\
         {}",
diff --git a/06_uart_chainloader/src/print.rs b/06_uart_chainloader/src/print.rs
index 81c6d179a..f69bad44d 100644
--- a/06_uart_chainloader/src/print.rs
+++ b/06_uart_chainloader/src/print.rs
@@ -4,7 +4,7 @@
 
 //! Printing.
 
-use crate::{bsp, console};
+use crate::console;
 use core::fmt;
 
 //--------------------------------------------------------------------------------------------------
@@ -13,9 +13,7 @@ use core::fmt;
 
 #[doc(hidden)]
 pub fn _print(args: fmt::Arguments) {
-    use console::interface::Write;
-
-    bsp::console::console().write_fmt(args).unwrap();
+    console::console().write_fmt(args).unwrap();
 }
 
 /// Prints without a newline.
diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index 6b8dcbeb0..2f4ab3235 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -19,6 +19,7 @@ Minipush 1.0
 [MP] ⏳ Waiting for /dev/ttyUSB0
 [MP] ✅ Serial connected
 [MP] 🔌 Please power the target now
+
  __  __ _      _ _                 _
 |  \/  (_)_ _ (_) |   ___  __ _ __| |
 | |\/| | | ' \| | |__/ _ \/ _` / _` |
@@ -30,16 +31,16 @@ Minipush 1.0
 [MP] ⏩ Pushing 12 KiB =========================================🦀 100% 0 KiB/s Time: 00:00:00
 [ML] Loaded! Executing the payload now
 
-[    0.140431] mingo version 0.7.0
-[    0.140630] Booting on: Raspberry Pi 3
-[    0.141085] Architectural timer resolution: 52 ns
-[    0.141660] Drivers loaded:
-[    0.141995]       1. BCM GPIO
-[    0.142353]       2. BCM PL011 UART
-[W   0.142777] Spin duration smaller than architecturally supported, skipping
-[    0.143621] Spinning for 1 second
-[    1.144023] Spinning for 1 second
-[    2.144245] Spinning for 1 second
+[    0.143123] mingo version 0.7.0
+[    0.143323] Booting on: Raspberry Pi 3
+[    0.143778] Architectural timer resolution: 52 ns
+[    0.144352] Drivers loaded:
+[    0.144688]       1. BCM PL011 UART
+[    0.145110]       2. BCM GPIO
+[W   0.145469] Spin duration smaller than architecturally supported, skipping
+[    0.146313] Spinning for 1 second
+[    1.146715] Spinning for 1 second
+[    2.146938] Spinning for 1 second
 ```
 
 ## Diff to previous
@@ -374,7 +375,7 @@ diff -uNr 06_uart_chainloader/src/_arch/aarch64/time.rs 07_timestamps/src/_arch/
 diff -uNr 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 --- 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 +++ 07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
-@@ -143,25 +143,19 @@
+@@ -140,25 +140,19 @@
      /// Disable pull-up/down on pins 14 and 15.
      #[cfg(feature = "bsp_rpi3")]
      fn disable_pud_14_15_bcm2837(&mut self) {
@@ -410,7 +411,7 @@ diff -uNr 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 07_times
 diff -uNr 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 --- 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 +++ 07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
-@@ -278,7 +278,7 @@
+@@ -275,7 +275,7 @@
      }
 
      /// Retrieve a character.
@@ -419,7 +420,7 @@ diff -uNr 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 07
          // If RX FIFO is empty,
          if self.registers.FR.matches_all(FR::RXFE::SET) {
              // immediately return in non-blocking mode.
-@@ -293,7 +293,12 @@
+@@ -290,7 +290,12 @@
          }
 
          // Read one character.
@@ -433,7 +434,7 @@ diff -uNr 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 07
 
          // Update statistics.
          self.chars_read += 1;
-@@ -373,14 +378,14 @@
+@@ -376,14 +381,14 @@
  impl console::interface::Read for PL011Uart {
      fn read_char(&self) -> char {
          self.inner
@@ -496,19 +497,14 @@ diff -uNr 06_uart_chainloader/src/bsp/raspberrypi/kernel.ld 07_timestamps/src/bs
 diff -uNr 06_uart_chainloader/src/bsp/raspberrypi/memory.rs 07_timestamps/src/bsp/raspberrypi/memory.rs
 --- 06_uart_chainloader/src/bsp/raspberrypi/memory.rs
 +++ 07_timestamps/src/bsp/raspberrypi/memory.rs
-@@ -11,10 +11,9 @@
+@@ -11,7 +11,6 @@
  /// The board's physical memory map.
  #[rustfmt::skip]
  pub(super) mod map {
 -    pub const BOARD_DEFAULT_LOAD_ADDRESS: usize =        0x8_0000;
 
--    pub const GPIO_OFFSET:                usize =        0x0020_0000;
--    pub const UART_OFFSET:                usize =        0x0020_1000;
-+    pub const GPIO_OFFSET:         usize = 0x0020_0000;
-+    pub const UART_OFFSET:         usize = 0x0020_1000;
-
-     /// Physical devices.
-     #[cfg(feature = "bsp_rpi3")]
+     pub const GPIO_OFFSET:         usize = 0x0020_0000;
+     pub const UART_OFFSET:         usize = 0x0020_1000;
 @@ -36,13 +35,3 @@
          pub const PL011_UART_START: usize = START + UART_OFFSET;
      }
@@ -546,7 +542,7 @@ diff -uNr 06_uart_chainloader/src/main.rs 07_timestamps/src/main.rs
 
  /// Early init code.
  ///
-@@ -143,56 +144,38 @@
+@@ -143,55 +144,38 @@
      kernel_main()
  }
 
@@ -559,8 +555,7 @@ diff -uNr 06_uart_chainloader/src/main.rs 07_timestamps/src/main.rs
 -
  /// The main function running after the early init.
  fn kernel_main() -> ! {
--    use bsp::console::console;
--    use console::interface::All;
+-    use console::console;
 +    use core::time::Duration;
 +    use driver::interface::DriverManager;
 +    use time::interface::TimeManager;
@@ -635,7 +630,7 @@ diff -uNr 06_uart_chainloader/src/main.rs 07_timestamps/src/main.rs
 diff -uNr 06_uart_chainloader/src/panic_wait.rs 07_timestamps/src/panic_wait.rs
 --- 06_uart_chainloader/src/panic_wait.rs
 +++ 07_timestamps/src/panic_wait.rs
-@@ -58,18 +58,23 @@
+@@ -42,18 +42,23 @@
 
  #[panic_handler]
  fn panic(info: &PanicInfo) -> ! {
@@ -650,7 +645,7 @@ diff -uNr 06_uart_chainloader/src/panic_wait.rs 07_timestamps/src/panic_wait.rs
          _ => ("???", 0, 0),
      };
 
-     panic_println!(
+     println!(
 -        "Kernel panic!\n\n\
 +        "[  {:>3}.{:06}] Kernel panic!\n\n\
          Panic location:\n      File '{}', line {}, column {}\n\n\
@@ -664,7 +659,7 @@ diff -uNr 06_uart_chainloader/src/panic_wait.rs 07_timestamps/src/panic_wait.rs
 diff -uNr 06_uart_chainloader/src/print.rs 07_timestamps/src/print.rs
 --- 06_uart_chainloader/src/print.rs
 +++ 07_timestamps/src/print.rs
-@@ -36,3 +36,59 @@
+@@ -34,3 +34,59 @@
          $crate::print::_print(format_args_nl!($($arg)*));
      })
  }
diff --git a/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index dbb4beaa6..24958eb56 100644
--- a/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -108,16 +108,13 @@ register_structs! {
 /// Abstraction for the associated MMIO registers.
 type Registers = MMIODerefWrapper<RegisterBlock>;
 
-//--------------------------------------------------------------------------------------------------
-// Public Definitions
-//--------------------------------------------------------------------------------------------------
-
-pub struct GPIOInner {
+struct GPIOInner {
     registers: Registers,
 }
 
-// Export the inner struct so that BSPs can use it for the panic handler.
-pub use GPIOInner as PanicGPIO;
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
 
 /// Representation of the GPIO HW.
 pub struct GPIO {
@@ -125,7 +122,7 @@ pub struct GPIO {
 }
 
 //--------------------------------------------------------------------------------------------------
-// Public Code
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
 impl GPIOInner {
@@ -189,7 +186,13 @@ impl GPIOInner {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
 impl GPIO {
+    pub const COMPATIBLE: &'static str = "BCM GPIO";
+
     /// Create an instance.
     ///
     /// # Safety
@@ -214,6 +217,6 @@ use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for GPIO {
     fn compatible(&self) -> &'static str {
-        "BCM GPIO"
+        Self::COMPATIBLE
     }
 }
diff --git a/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 85cd31549..b034e92e5 100644
--- a/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -167,18 +167,15 @@ enum BlockingMode {
     NonBlocking,
 }
 
-//--------------------------------------------------------------------------------------------------
-// Public Definitions
-//--------------------------------------------------------------------------------------------------
-
-pub struct PL011UartInner {
+struct PL011UartInner {
     registers: Registers,
     chars_written: usize,
     chars_read: usize,
 }
 
-// Export the inner struct so that BSPs can use it for the panic handler.
-pub use PL011UartInner as PanicUart;
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
 
 /// Representation of the UART.
 pub struct PL011Uart {
@@ -186,7 +183,7 @@ pub struct PL011Uart {
 }
 
 //--------------------------------------------------------------------------------------------------
-// Public Code
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
 impl PL011UartInner {
@@ -326,7 +323,13 @@ impl fmt::Write for PL011UartInner {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
 impl PL011Uart {
+    pub const COMPATIBLE: &'static str = "BCM PL011 UART";
+
     /// Create an instance.
     ///
     /// # Safety
@@ -346,7 +349,7 @@ use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for PL011Uart {
     fn compatible(&self) -> &'static str {
-        "BCM PL011 UART"
+        Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
@@ -400,3 +403,5 @@ impl console::interface::Statistics for PL011Uart {
         self.inner.lock(|inner| inner.chars_read)
     }
 }
+
+impl console::interface::All for PL011Uart {}
diff --git a/07_timestamps/src/bsp/raspberrypi.rs b/07_timestamps/src/bsp/raspberrypi.rs
index 22edb4fa6..a9a7261af 100644
--- a/07_timestamps/src/bsp/raspberrypi.rs
+++ b/07_timestamps/src/bsp/raspberrypi.rs
@@ -9,17 +9,6 @@ pub mod cpu;
 pub mod driver;
 pub mod memory;
 
-//--------------------------------------------------------------------------------------------------
-// Global instances
-//--------------------------------------------------------------------------------------------------
-use super::device_driver;
-
-static GPIO: device_driver::GPIO =
-    unsafe { device_driver::GPIO::new(memory::map::mmio::GPIO_START) };
-
-static PL011_UART: device_driver::PL011Uart =
-    unsafe { device_driver::PL011Uart::new(memory::map::mmio::PL011_UART_START) };
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
diff --git a/07_timestamps/src/bsp/raspberrypi/console.rs b/07_timestamps/src/bsp/raspberrypi/console.rs
index a247032fc..0a630eef4 100644
--- a/07_timestamps/src/bsp/raspberrypi/console.rs
+++ b/07_timestamps/src/bsp/raspberrypi/console.rs
@@ -4,34 +4,13 @@
 
 //! BSP console facilities.
 
-use super::memory;
-use crate::{bsp::device_driver, console};
-use core::fmt;
+use crate::console;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// In case of a panic, the panic handler uses this function to take a last shot at printing
-/// something before the system is halted.
-///
-/// We try to init panic-versions of the GPIO and the UART. The panic versions are not protected
-/// with synchronization primitives, which increases chances that we get to print something, even
-/// when the kernel's default GPIO or UART instances happen to be locked at the time of the panic.
-///
-/// # Safety
-///
-/// - Use only for printing during a panic.
-pub unsafe fn panic_console_out() -> impl fmt::Write {
-    let mut panic_gpio = device_driver::PanicGPIO::new(memory::map::mmio::GPIO_START);
-    let mut panic_uart = device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START);
-
-    panic_gpio.map_pl011_uart();
-    panic_uart.init();
-    panic_uart
-}
-
 /// Return a reference to the console.
-pub fn console() -> &'static impl console::interface::All {
-    &super::PL011_UART
+pub fn console() -> &'static dyn console::interface::All {
+    &super::driver::PL011_UART
 }
diff --git a/07_timestamps/src/bsp/raspberrypi/driver.rs b/07_timestamps/src/bsp/raspberrypi/driver.rs
index b5538baa3..8b683ed8b 100644
--- a/07_timestamps/src/bsp/raspberrypi/driver.rs
+++ b/07_timestamps/src/bsp/raspberrypi/driver.rs
@@ -4,7 +4,8 @@
 
 //! BSP driver support.
 
-use crate::driver;
+use super::memory::map::mmio;
+use crate::{bsp::device_driver, driver};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -19,8 +20,13 @@ struct BSPDriverManager {
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
+pub(super) static PL011_UART: device_driver::PL011Uart =
+    unsafe { device_driver::PL011Uart::new(mmio::PL011_UART_START) };
+
+static GPIO: device_driver::GPIO = unsafe { device_driver::GPIO::new(mmio::GPIO_START) };
+
 static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
-    device_drivers: [&super::GPIO, &super::PL011_UART],
+    device_drivers: [&PL011_UART, &GPIO],
 };
 
 //--------------------------------------------------------------------------------------------------
@@ -44,6 +50,6 @@ impl driver::interface::DriverManager for BSPDriverManager {
 
     fn post_device_driver_init(&self) {
         // Configure PL011Uart's output pins.
-        super::GPIO.map_pl011_uart();
+        GPIO.map_pl011_uart();
     }
 }
diff --git a/07_timestamps/src/console.rs b/07_timestamps/src/console.rs
index e49e241fe..c1fb0e53b 100644
--- a/07_timestamps/src/console.rs
+++ b/07_timestamps/src/console.rs
@@ -4,6 +4,8 @@
 
 //! System console.
 
+use crate::bsp;
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -49,5 +51,16 @@ pub mod interface {
     }
 
     /// Trait alias for a full-fledged console.
-    pub trait All = Write + Read + Statistics;
+    pub trait All: Write + Read + Statistics {}
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the console.
+///
+/// This is the global console used by all printing macros.
+pub fn console() -> &'static dyn interface::All {
+    bsp::console::console()
 }
diff --git a/07_timestamps/src/panic_wait.rs b/07_timestamps/src/panic_wait.rs
index f851e0d8c..edd838855 100644
--- a/07_timestamps/src/panic_wait.rs
+++ b/07_timestamps/src/panic_wait.rs
@@ -4,29 +4,13 @@
 
 //! A panic handler that infinitely waits.
 
-use crate::{bsp, cpu};
-use core::{fmt, panic::PanicInfo};
+use crate::{cpu, println};
+use core::panic::PanicInfo;
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-fn _panic_print(args: fmt::Arguments) {
-    use fmt::Write;
-
-    unsafe { bsp::console::panic_console_out().write_fmt(args).unwrap() };
-}
-
-/// Prints with a newline - only use from the panic handler.
-///
-/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
-#[macro_export]
-macro_rules! panic_println {
-    ($($arg:tt)*) => ({
-        _panic_print(format_args_nl!($($arg)*));
-    })
-}
-
 /// Stop immediately if called a second time.
 ///
 /// # Note
@@ -69,7 +53,7 @@ fn panic(info: &PanicInfo) -> ! {
         _ => ("???", 0, 0),
     };
 
-    panic_println!(
+    println!(
         "[  {:>3}.{:06}] Kernel panic!\n\n\
         Panic location:\n      File '{}', line {}, column {}\n\n\
         {}",
diff --git a/07_timestamps/src/print.rs b/07_timestamps/src/print.rs
index 9ec13a286..8705eec0d 100644
--- a/07_timestamps/src/print.rs
+++ b/07_timestamps/src/print.rs
@@ -4,7 +4,7 @@
 
 //! Printing.
 
-use crate::{bsp, console};
+use crate::console;
 use core::fmt;
 
 //--------------------------------------------------------------------------------------------------
@@ -13,9 +13,7 @@ use core::fmt;
 
 #[doc(hidden)]
 pub fn _print(args: fmt::Arguments) {
-    use console::interface::Write;
-
-    bsp::console::console().write_fmt(args).unwrap();
+    console::console().write_fmt(args).unwrap();
 }
 
 /// Prints without a newline.
diff --git a/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index dbb4beaa6..24958eb56 100644
--- a/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -108,16 +108,13 @@ register_structs! {
 /// Abstraction for the associated MMIO registers.
 type Registers = MMIODerefWrapper<RegisterBlock>;
 
-//--------------------------------------------------------------------------------------------------
-// Public Definitions
-//--------------------------------------------------------------------------------------------------
-
-pub struct GPIOInner {
+struct GPIOInner {
     registers: Registers,
 }
 
-// Export the inner struct so that BSPs can use it for the panic handler.
-pub use GPIOInner as PanicGPIO;
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
 
 /// Representation of the GPIO HW.
 pub struct GPIO {
@@ -125,7 +122,7 @@ pub struct GPIO {
 }
 
 //--------------------------------------------------------------------------------------------------
-// Public Code
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
 impl GPIOInner {
@@ -189,7 +186,13 @@ impl GPIOInner {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
 impl GPIO {
+    pub const COMPATIBLE: &'static str = "BCM GPIO";
+
     /// Create an instance.
     ///
     /// # Safety
@@ -214,6 +217,6 @@ use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for GPIO {
     fn compatible(&self) -> &'static str {
-        "BCM GPIO"
+        Self::COMPATIBLE
     }
 }
diff --git a/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 85cd31549..b034e92e5 100644
--- a/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -167,18 +167,15 @@ enum BlockingMode {
     NonBlocking,
 }
 
-//--------------------------------------------------------------------------------------------------
-// Public Definitions
-//--------------------------------------------------------------------------------------------------
-
-pub struct PL011UartInner {
+struct PL011UartInner {
     registers: Registers,
     chars_written: usize,
     chars_read: usize,
 }
 
-// Export the inner struct so that BSPs can use it for the panic handler.
-pub use PL011UartInner as PanicUart;
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
 
 /// Representation of the UART.
 pub struct PL011Uart {
@@ -186,7 +183,7 @@ pub struct PL011Uart {
 }
 
 //--------------------------------------------------------------------------------------------------
-// Public Code
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
 impl PL011UartInner {
@@ -326,7 +323,13 @@ impl fmt::Write for PL011UartInner {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
 impl PL011Uart {
+    pub const COMPATIBLE: &'static str = "BCM PL011 UART";
+
     /// Create an instance.
     ///
     /// # Safety
@@ -346,7 +349,7 @@ use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for PL011Uart {
     fn compatible(&self) -> &'static str {
-        "BCM PL011 UART"
+        Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
@@ -400,3 +403,5 @@ impl console::interface::Statistics for PL011Uart {
         self.inner.lock(|inner| inner.chars_read)
     }
 }
+
+impl console::interface::All for PL011Uart {}
diff --git a/08_hw_debug_JTAG/src/bsp/raspberrypi.rs b/08_hw_debug_JTAG/src/bsp/raspberrypi.rs
index 22edb4fa6..a9a7261af 100644
--- a/08_hw_debug_JTAG/src/bsp/raspberrypi.rs
+++ b/08_hw_debug_JTAG/src/bsp/raspberrypi.rs
@@ -9,17 +9,6 @@ pub mod cpu;
 pub mod driver;
 pub mod memory;
 
-//--------------------------------------------------------------------------------------------------
-// Global instances
-//--------------------------------------------------------------------------------------------------
-use super::device_driver;
-
-static GPIO: device_driver::GPIO =
-    unsafe { device_driver::GPIO::new(memory::map::mmio::GPIO_START) };
-
-static PL011_UART: device_driver::PL011Uart =
-    unsafe { device_driver::PL011Uart::new(memory::map::mmio::PL011_UART_START) };
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
diff --git a/08_hw_debug_JTAG/src/bsp/raspberrypi/console.rs b/08_hw_debug_JTAG/src/bsp/raspberrypi/console.rs
index a247032fc..0a630eef4 100644
--- a/08_hw_debug_JTAG/src/bsp/raspberrypi/console.rs
+++ b/08_hw_debug_JTAG/src/bsp/raspberrypi/console.rs
@@ -4,34 +4,13 @@
 
 //! BSP console facilities.
 
-use super::memory;
-use crate::{bsp::device_driver, console};
-use core::fmt;
+use crate::console;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// In case of a panic, the panic handler uses this function to take a last shot at printing
-/// something before the system is halted.
-///
-/// We try to init panic-versions of the GPIO and the UART. The panic versions are not protected
-/// with synchronization primitives, which increases chances that we get to print something, even
-/// when the kernel's default GPIO or UART instances happen to be locked at the time of the panic.
-///
-/// # Safety
-///
-/// - Use only for printing during a panic.
-pub unsafe fn panic_console_out() -> impl fmt::Write {
-    let mut panic_gpio = device_driver::PanicGPIO::new(memory::map::mmio::GPIO_START);
-    let mut panic_uart = device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START);
-
-    panic_gpio.map_pl011_uart();
-    panic_uart.init();
-    panic_uart
-}
-
 /// Return a reference to the console.
-pub fn console() -> &'static impl console::interface::All {
-    &super::PL011_UART
+pub fn console() -> &'static dyn console::interface::All {
+    &super::driver::PL011_UART
 }
diff --git a/08_hw_debug_JTAG/src/bsp/raspberrypi/driver.rs b/08_hw_debug_JTAG/src/bsp/raspberrypi/driver.rs
index b5538baa3..8b683ed8b 100644
--- a/08_hw_debug_JTAG/src/bsp/raspberrypi/driver.rs
+++ b/08_hw_debug_JTAG/src/bsp/raspberrypi/driver.rs
@@ -4,7 +4,8 @@
 
 //! BSP driver support.
 
-use crate::driver;
+use super::memory::map::mmio;
+use crate::{bsp::device_driver, driver};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -19,8 +20,13 @@ struct BSPDriverManager {
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
+pub(super) static PL011_UART: device_driver::PL011Uart =
+    unsafe { device_driver::PL011Uart::new(mmio::PL011_UART_START) };
+
+static GPIO: device_driver::GPIO = unsafe { device_driver::GPIO::new(mmio::GPIO_START) };
+
 static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
-    device_drivers: [&super::GPIO, &super::PL011_UART],
+    device_drivers: [&PL011_UART, &GPIO],
 };
 
 //--------------------------------------------------------------------------------------------------
@@ -44,6 +50,6 @@ impl driver::interface::DriverManager for BSPDriverManager {
 
     fn post_device_driver_init(&self) {
         // Configure PL011Uart's output pins.
-        super::GPIO.map_pl011_uart();
+        GPIO.map_pl011_uart();
     }
 }
diff --git a/08_hw_debug_JTAG/src/console.rs b/08_hw_debug_JTAG/src/console.rs
index e49e241fe..c1fb0e53b 100644
--- a/08_hw_debug_JTAG/src/console.rs
+++ b/08_hw_debug_JTAG/src/console.rs
@@ -4,6 +4,8 @@
 
 //! System console.
 
+use crate::bsp;
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -49,5 +51,16 @@ pub mod interface {
     }
 
     /// Trait alias for a full-fledged console.
-    pub trait All = Write + Read + Statistics;
+    pub trait All: Write + Read + Statistics {}
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the console.
+///
+/// This is the global console used by all printing macros.
+pub fn console() -> &'static dyn interface::All {
+    bsp::console::console()
 }
diff --git a/08_hw_debug_JTAG/src/panic_wait.rs b/08_hw_debug_JTAG/src/panic_wait.rs
index f851e0d8c..edd838855 100644
--- a/08_hw_debug_JTAG/src/panic_wait.rs
+++ b/08_hw_debug_JTAG/src/panic_wait.rs
@@ -4,29 +4,13 @@
 
 //! A panic handler that infinitely waits.
 
-use crate::{bsp, cpu};
-use core::{fmt, panic::PanicInfo};
+use crate::{cpu, println};
+use core::panic::PanicInfo;
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-fn _panic_print(args: fmt::Arguments) {
-    use fmt::Write;
-
-    unsafe { bsp::console::panic_console_out().write_fmt(args).unwrap() };
-}
-
-/// Prints with a newline - only use from the panic handler.
-///
-/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
-#[macro_export]
-macro_rules! panic_println {
-    ($($arg:tt)*) => ({
-        _panic_print(format_args_nl!($($arg)*));
-    })
-}
-
 /// Stop immediately if called a second time.
 ///
 /// # Note
@@ -69,7 +53,7 @@ fn panic(info: &PanicInfo) -> ! {
         _ => ("???", 0, 0),
     };
 
-    panic_println!(
+    println!(
         "[  {:>3}.{:06}] Kernel panic!\n\n\
         Panic location:\n      File '{}', line {}, column {}\n\n\
         {}",
diff --git a/08_hw_debug_JTAG/src/print.rs b/08_hw_debug_JTAG/src/print.rs
index 9ec13a286..8705eec0d 100644
--- a/08_hw_debug_JTAG/src/print.rs
+++ b/08_hw_debug_JTAG/src/print.rs
@@ -4,7 +4,7 @@
 
 //! Printing.
 
-use crate::{bsp, console};
+use crate::console;
 use core::fmt;
 
 //--------------------------------------------------------------------------------------------------
@@ -13,9 +13,7 @@ use core::fmt;
 
 #[doc(hidden)]
 pub fn _print(args: fmt::Arguments) {
-    use console::interface::Write;
-
-    bsp::console::console().write_fmt(args).unwrap();
+    console::console().write_fmt(args).unwrap();
 }
 
 /// Prints without a newline.
diff --git a/09_privilege_level/README.md b/09_privilege_level/README.md
index 2320dfd79..63cbcb894 100644
--- a/09_privilege_level/README.md
+++ b/09_privilege_level/README.md
@@ -166,6 +166,7 @@ Minipush 1.0
 [MP] ⏳ Waiting for /dev/ttyUSB0
 [MP] ✅ Serial connected
 [MP] 🔌 Please power the target now
+
  __  __ _      _ _                 _
 |  \/  (_)_ _ (_) |   ___  __ _ __| |
 | |\/| | | ' \| | |__/ _ \/ _` / _` |
@@ -177,20 +178,20 @@ Minipush 1.0
 [MP] ⏩ Pushing 14 KiB =========================================🦀 100% 0 KiB/s Time: 00:00:00
 [ML] Loaded! Executing the payload now
 
-[    0.165757] mingo version 0.9.0
-[    0.165957] Booting on: Raspberry Pi 3
-[    0.166412] Current privilege level: EL1
-[    0.166888] Exception handling state:
-[    0.167333]       Debug:  Masked
-[    0.167723]       SError: Masked
-[    0.168112]       IRQ:    Masked
-[    0.168502]       FIQ:    Masked
-[    0.168893] Architectural timer resolution: 52 ns
-[    0.169467] Drivers loaded:
-[    0.169803]       1. BCM GPIO
-[    0.170160]       2. BCM PL011 UART
-[    0.170583] Timer test, spinning for 1 second
-[    1.171115] Echoing input now
+[    0.162546] mingo version 0.9.0
+[    0.162745] Booting on: Raspberry Pi 3
+[    0.163201] Current privilege level: EL1
+[    0.163677] Exception handling state:
+[    0.164122]       Debug:  Masked
+[    0.164511]       SError: Masked
+[    0.164901]       IRQ:    Masked
+[    0.165291]       FIQ:    Masked
+[    0.165681] Architectural timer resolution: 52 ns
+[    0.166255] Drivers loaded:
+[    0.166592]       1. BCM PL011 UART
+[    0.167014]       2. BCM GPIO
+[    0.167371] Timer test, spinning for 1 second
+[    1.167904] Echoing input now
 ```
 
 ## Diff to previous
@@ -505,16 +506,15 @@ diff -uNr 08_hw_debug_JTAG/src/main.rs 09_privilege_level/src/main.rs
  mod panic_wait;
  mod print;
  mod synchronization;
-@@ -146,6 +147,8 @@
+@@ -146,6 +147,7 @@
 
  /// The main function running after the early init.
  fn kernel_main() -> ! {
-+    use bsp::console::console;
-+    use console::interface::All;
++    use console::console;
      use core::time::Duration;
      use driver::interface::DriverManager;
      use time::interface::TimeManager;
-@@ -157,6 +160,12 @@
+@@ -157,6 +159,12 @@
      );
      info!("Booting on: {}", bsp::board_name());
 
@@ -527,7 +527,7 @@ diff -uNr 08_hw_debug_JTAG/src/main.rs 09_privilege_level/src/main.rs
      info!(
          "Architectural timer resolution: {} ns",
          time::time_manager().resolution().as_nanos()
-@@ -171,11 +180,15 @@
+@@ -171,11 +179,15 @@
          info!("      {}. {}", i + 1, driver.compatible());
      }
 
@@ -543,8 +543,8 @@ diff -uNr 08_hw_debug_JTAG/src/main.rs 09_privilege_level/src/main.rs
      loop {
 -        info!("Spinning for 1 second");
 -        time::time_manager().spin_for(Duration::from_secs(1));
-+        let c = bsp::console::console().read_char();
-+        bsp::console::console().write_char(c);
++        let c = console().read_char();
++        console().write_char(c);
      }
  }
 
diff --git a/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index dbb4beaa6..24958eb56 100644
--- a/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -108,16 +108,13 @@ register_structs! {
 /// Abstraction for the associated MMIO registers.
 type Registers = MMIODerefWrapper<RegisterBlock>;
 
-//--------------------------------------------------------------------------------------------------
-// Public Definitions
-//--------------------------------------------------------------------------------------------------
-
-pub struct GPIOInner {
+struct GPIOInner {
     registers: Registers,
 }
 
-// Export the inner struct so that BSPs can use it for the panic handler.
-pub use GPIOInner as PanicGPIO;
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
 
 /// Representation of the GPIO HW.
 pub struct GPIO {
@@ -125,7 +122,7 @@ pub struct GPIO {
 }
 
 //--------------------------------------------------------------------------------------------------
-// Public Code
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
 impl GPIOInner {
@@ -189,7 +186,13 @@ impl GPIOInner {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
 impl GPIO {
+    pub const COMPATIBLE: &'static str = "BCM GPIO";
+
     /// Create an instance.
     ///
     /// # Safety
@@ -214,6 +217,6 @@ use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for GPIO {
     fn compatible(&self) -> &'static str {
-        "BCM GPIO"
+        Self::COMPATIBLE
     }
 }
diff --git a/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 85cd31549..b034e92e5 100644
--- a/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -167,18 +167,15 @@ enum BlockingMode {
     NonBlocking,
 }
 
-//--------------------------------------------------------------------------------------------------
-// Public Definitions
-//--------------------------------------------------------------------------------------------------
-
-pub struct PL011UartInner {
+struct PL011UartInner {
     registers: Registers,
     chars_written: usize,
     chars_read: usize,
 }
 
-// Export the inner struct so that BSPs can use it for the panic handler.
-pub use PL011UartInner as PanicUart;
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
 
 /// Representation of the UART.
 pub struct PL011Uart {
@@ -186,7 +183,7 @@ pub struct PL011Uart {
 }
 
 //--------------------------------------------------------------------------------------------------
-// Public Code
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
 impl PL011UartInner {
@@ -326,7 +323,13 @@ impl fmt::Write for PL011UartInner {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
 impl PL011Uart {
+    pub const COMPATIBLE: &'static str = "BCM PL011 UART";
+
     /// Create an instance.
     ///
     /// # Safety
@@ -346,7 +349,7 @@ use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for PL011Uart {
     fn compatible(&self) -> &'static str {
-        "BCM PL011 UART"
+        Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
@@ -400,3 +403,5 @@ impl console::interface::Statistics for PL011Uart {
         self.inner.lock(|inner| inner.chars_read)
     }
 }
+
+impl console::interface::All for PL011Uart {}
diff --git a/09_privilege_level/src/bsp/raspberrypi.rs b/09_privilege_level/src/bsp/raspberrypi.rs
index 22edb4fa6..a9a7261af 100644
--- a/09_privilege_level/src/bsp/raspberrypi.rs
+++ b/09_privilege_level/src/bsp/raspberrypi.rs
@@ -9,17 +9,6 @@ pub mod cpu;
 pub mod driver;
 pub mod memory;
 
-//--------------------------------------------------------------------------------------------------
-// Global instances
-//--------------------------------------------------------------------------------------------------
-use super::device_driver;
-
-static GPIO: device_driver::GPIO =
-    unsafe { device_driver::GPIO::new(memory::map::mmio::GPIO_START) };
-
-static PL011_UART: device_driver::PL011Uart =
-    unsafe { device_driver::PL011Uart::new(memory::map::mmio::PL011_UART_START) };
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
diff --git a/09_privilege_level/src/bsp/raspberrypi/console.rs b/09_privilege_level/src/bsp/raspberrypi/console.rs
index a247032fc..0a630eef4 100644
--- a/09_privilege_level/src/bsp/raspberrypi/console.rs
+++ b/09_privilege_level/src/bsp/raspberrypi/console.rs
@@ -4,34 +4,13 @@
 
 //! BSP console facilities.
 
-use super::memory;
-use crate::{bsp::device_driver, console};
-use core::fmt;
+use crate::console;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// In case of a panic, the panic handler uses this function to take a last shot at printing
-/// something before the system is halted.
-///
-/// We try to init panic-versions of the GPIO and the UART. The panic versions are not protected
-/// with synchronization primitives, which increases chances that we get to print something, even
-/// when the kernel's default GPIO or UART instances happen to be locked at the time of the panic.
-///
-/// # Safety
-///
-/// - Use only for printing during a panic.
-pub unsafe fn panic_console_out() -> impl fmt::Write {
-    let mut panic_gpio = device_driver::PanicGPIO::new(memory::map::mmio::GPIO_START);
-    let mut panic_uart = device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START);
-
-    panic_gpio.map_pl011_uart();
-    panic_uart.init();
-    panic_uart
-}
-
 /// Return a reference to the console.
-pub fn console() -> &'static impl console::interface::All {
-    &super::PL011_UART
+pub fn console() -> &'static dyn console::interface::All {
+    &super::driver::PL011_UART
 }
diff --git a/09_privilege_level/src/bsp/raspberrypi/driver.rs b/09_privilege_level/src/bsp/raspberrypi/driver.rs
index b5538baa3..8b683ed8b 100644
--- a/09_privilege_level/src/bsp/raspberrypi/driver.rs
+++ b/09_privilege_level/src/bsp/raspberrypi/driver.rs
@@ -4,7 +4,8 @@
 
 //! BSP driver support.
 
-use crate::driver;
+use super::memory::map::mmio;
+use crate::{bsp::device_driver, driver};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -19,8 +20,13 @@ struct BSPDriverManager {
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
+pub(super) static PL011_UART: device_driver::PL011Uart =
+    unsafe { device_driver::PL011Uart::new(mmio::PL011_UART_START) };
+
+static GPIO: device_driver::GPIO = unsafe { device_driver::GPIO::new(mmio::GPIO_START) };
+
 static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
-    device_drivers: [&super::GPIO, &super::PL011_UART],
+    device_drivers: [&PL011_UART, &GPIO],
 };
 
 //--------------------------------------------------------------------------------------------------
@@ -44,6 +50,6 @@ impl driver::interface::DriverManager for BSPDriverManager {
 
     fn post_device_driver_init(&self) {
         // Configure PL011Uart's output pins.
-        super::GPIO.map_pl011_uart();
+        GPIO.map_pl011_uart();
     }
 }
diff --git a/09_privilege_level/src/console.rs b/09_privilege_level/src/console.rs
index e49e241fe..c1fb0e53b 100644
--- a/09_privilege_level/src/console.rs
+++ b/09_privilege_level/src/console.rs
@@ -4,6 +4,8 @@
 
 //! System console.
 
+use crate::bsp;
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -49,5 +51,16 @@ pub mod interface {
     }
 
     /// Trait alias for a full-fledged console.
-    pub trait All = Write + Read + Statistics;
+    pub trait All: Write + Read + Statistics {}
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the console.
+///
+/// This is the global console used by all printing macros.
+pub fn console() -> &'static dyn interface::All {
+    bsp::console::console()
 }
diff --git a/09_privilege_level/src/main.rs b/09_privilege_level/src/main.rs
index 0c6a0decb..6c1ab3100 100644
--- a/09_privilege_level/src/main.rs
+++ b/09_privilege_level/src/main.rs
@@ -147,8 +147,7 @@ unsafe fn kernel_init() -> ! {
 
 /// The main function running after the early init.
 fn kernel_main() -> ! {
-    use bsp::console::console;
-    use console::interface::All;
+    use console::console;
     use core::time::Duration;
     use driver::interface::DriverManager;
     use time::interface::TimeManager;
@@ -188,7 +187,7 @@ fn kernel_main() -> ! {
     // Discard any spurious received characters before going into echo mode.
     console().clear_rx();
     loop {
-        let c = bsp::console::console().read_char();
-        bsp::console::console().write_char(c);
+        let c = console().read_char();
+        console().write_char(c);
     }
 }
diff --git a/09_privilege_level/src/panic_wait.rs b/09_privilege_level/src/panic_wait.rs
index f851e0d8c..edd838855 100644
--- a/09_privilege_level/src/panic_wait.rs
+++ b/09_privilege_level/src/panic_wait.rs
@@ -4,29 +4,13 @@
 
 //! A panic handler that infinitely waits.
 
-use crate::{bsp, cpu};
-use core::{fmt, panic::PanicInfo};
+use crate::{cpu, println};
+use core::panic::PanicInfo;
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-fn _panic_print(args: fmt::Arguments) {
-    use fmt::Write;
-
-    unsafe { bsp::console::panic_console_out().write_fmt(args).unwrap() };
-}
-
-/// Prints with a newline - only use from the panic handler.
-///
-/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
-#[macro_export]
-macro_rules! panic_println {
-    ($($arg:tt)*) => ({
-        _panic_print(format_args_nl!($($arg)*));
-    })
-}
-
 /// Stop immediately if called a second time.
 ///
 /// # Note
@@ -69,7 +53,7 @@ fn panic(info: &PanicInfo) -> ! {
         _ => ("???", 0, 0),
     };
 
-    panic_println!(
+    println!(
         "[  {:>3}.{:06}] Kernel panic!\n\n\
         Panic location:\n      File '{}', line {}, column {}\n\n\
         {}",
diff --git a/09_privilege_level/src/print.rs b/09_privilege_level/src/print.rs
index 9ec13a286..8705eec0d 100644
--- a/09_privilege_level/src/print.rs
+++ b/09_privilege_level/src/print.rs
@@ -4,7 +4,7 @@
 
 //! Printing.
 
-use crate::{bsp, console};
+use crate::console;
 use core::fmt;
 
 //--------------------------------------------------------------------------------------------------
@@ -13,9 +13,7 @@ use core::fmt;
 
 #[doc(hidden)]
 pub fn _print(args: fmt::Arguments) {
-    use console::interface::Write;
-
-    bsp::console::console().write_fmt(args).unwrap();
+    console::console().write_fmt(args).unwrap();
 }
 
 /// Prints without a newline.
diff --git a/10_virtual_mem_part1_identity_mapping/README.md b/10_virtual_mem_part1_identity_mapping/README.md
index 802243c8d..04b82eca8 100644
--- a/10_virtual_mem_part1_identity_mapping/README.md
+++ b/10_virtual_mem_part1_identity_mapping/README.md
@@ -314,6 +314,7 @@ Minipush 1.0
 [MP] ⏳ Waiting for /dev/ttyUSB0
 [MP] ✅ Serial connected
 [MP] 🔌 Please power the target now
+
  __  __ _      _ _                 _
 |  \/  (_)_ _ (_) |   ___  __ _ __| |
 | |\/| | | ' \| | |__/ _ \/ _` / _` |
@@ -325,25 +326,25 @@ Minipush 1.0
 [MP] ⏩ Pushing 64 KiB =========================================🦀 100% 0 KiB/s Time: 00:00:00
 [ML] Loaded! Executing the payload now
 
-[    1.034062] mingo version 0.10.0
-[    1.034270] Booting on: Raspberry Pi 3
-[    1.034725] MMU online. Special regions:
-[    1.035201]       0x00080000 - 0x0008ffff |  64 KiB | C   RO PX  | Kernel code and RO data
-[    1.036220]       0x1fff0000 - 0x1fffffff |  64 KiB | Dev RW PXN | Remapped Device MMIO
-[    1.037205]       0x3f000000 - 0x4000ffff |  16 MiB | Dev RW PXN | Device MMIO
-[    1.038094] Current privilege level: EL1
-[    1.038570] Exception handling state:
-[    1.039015]       Debug:  Masked
-[    1.039405]       SError: Masked
-[    1.039794]       IRQ:    Masked
-[    1.040184]       FIQ:    Masked
-[    1.040575] Architectural timer resolution: 52 ns
-[    1.041148] Drivers loaded:
-[    1.041484]       1. BCM GPIO
-[    1.041842]       2. BCM PL011 UART
-[    1.042264] Timer test, spinning for 1 second
+[    0.811167] mingo version 0.10.0
+[    0.811374] Booting on: Raspberry Pi 3
+[    0.811829] MMU online. Special regions:
+[    0.812306]       0x00080000 - 0x0008ffff |  64 KiB | C   RO PX  | Kernel code and RO data
+[    0.813324]       0x1fff0000 - 0x1fffffff |  64 KiB | Dev RW PXN | Remapped Device MMIO
+[    0.814310]       0x3f000000 - 0x4000ffff |  16 MiB | Dev RW PXN | Device MMIO
+[    0.815198] Current privilege level: EL1
+[    0.815675] Exception handling state:
+[    0.816119]       Debug:  Masked
+[    0.816509]       SError: Masked
+[    0.816899]       IRQ:    Masked
+[    0.817289]       FIQ:    Masked
+[    0.817679] Architectural timer resolution: 52 ns
+[    0.818253] Drivers loaded:
+[    0.818589]       1. BCM PL011 UART
+[    0.819011]       2. BCM GPIO
+[    0.819369] Timer test, spinning for 1 second
 [     !!!    ] Writing through the remapped UART at 0x1FFF_1000
-[    2.043305] Echoing input now
+[    1.820409] Echoing input now
 ```
 
 ## Diff to previous
@@ -1118,7 +1119,16 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
 
      for i in bsp::driver::driver_manager().all_device_drivers().iter() {
          if let Err(x) = i.init() {
-@@ -160,6 +171,9 @@
+@@ -147,7 +158,7 @@
+
+ /// The main function running after the early init.
+ fn kernel_main() -> ! {
+-    use console::console;
++    use console::{console, interface::Write};
+     use core::time::Duration;
+     use driver::interface::DriverManager;
+     use time::interface::TimeManager;
+@@ -159,6 +170,9 @@
      );
      info!("Booting on: {}", bsp::board_name());
 
@@ -1128,7 +1138,7 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
      let (_, privilege_level) = exception::current_privilege_level();
      info!("Current privilege level: {}", privilege_level);
 
-@@ -183,6 +197,13 @@
+@@ -182,6 +196,13 @@
      info!("Timer test, spinning for 1 second");
      time::time_manager().spin_for(Duration::from_secs(1));
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index dbb4beaa6..24958eb56 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -108,16 +108,13 @@ register_structs! {
 /// Abstraction for the associated MMIO registers.
 type Registers = MMIODerefWrapper<RegisterBlock>;
 
-//--------------------------------------------------------------------------------------------------
-// Public Definitions
-//--------------------------------------------------------------------------------------------------
-
-pub struct GPIOInner {
+struct GPIOInner {
     registers: Registers,
 }
 
-// Export the inner struct so that BSPs can use it for the panic handler.
-pub use GPIOInner as PanicGPIO;
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
 
 /// Representation of the GPIO HW.
 pub struct GPIO {
@@ -125,7 +122,7 @@ pub struct GPIO {
 }
 
 //--------------------------------------------------------------------------------------------------
-// Public Code
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
 impl GPIOInner {
@@ -189,7 +186,13 @@ impl GPIOInner {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
 impl GPIO {
+    pub const COMPATIBLE: &'static str = "BCM GPIO";
+
     /// Create an instance.
     ///
     /// # Safety
@@ -214,6 +217,6 @@ use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for GPIO {
     fn compatible(&self) -> &'static str {
-        "BCM GPIO"
+        Self::COMPATIBLE
     }
 }
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 85cd31549..b034e92e5 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -167,18 +167,15 @@ enum BlockingMode {
     NonBlocking,
 }
 
-//--------------------------------------------------------------------------------------------------
-// Public Definitions
-//--------------------------------------------------------------------------------------------------
-
-pub struct PL011UartInner {
+struct PL011UartInner {
     registers: Registers,
     chars_written: usize,
     chars_read: usize,
 }
 
-// Export the inner struct so that BSPs can use it for the panic handler.
-pub use PL011UartInner as PanicUart;
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
 
 /// Representation of the UART.
 pub struct PL011Uart {
@@ -186,7 +183,7 @@ pub struct PL011Uart {
 }
 
 //--------------------------------------------------------------------------------------------------
-// Public Code
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
 impl PL011UartInner {
@@ -326,7 +323,13 @@ impl fmt::Write for PL011UartInner {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
 impl PL011Uart {
+    pub const COMPATIBLE: &'static str = "BCM PL011 UART";
+
     /// Create an instance.
     ///
     /// # Safety
@@ -346,7 +349,7 @@ use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for PL011Uart {
     fn compatible(&self) -> &'static str {
-        "BCM PL011 UART"
+        Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
@@ -400,3 +403,5 @@ impl console::interface::Statistics for PL011Uart {
         self.inner.lock(|inner| inner.chars_read)
     }
 }
+
+impl console::interface::All for PL011Uart {}
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi.rs
index 22edb4fa6..a9a7261af 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi.rs
@@ -9,17 +9,6 @@ pub mod cpu;
 pub mod driver;
 pub mod memory;
 
-//--------------------------------------------------------------------------------------------------
-// Global instances
-//--------------------------------------------------------------------------------------------------
-use super::device_driver;
-
-static GPIO: device_driver::GPIO =
-    unsafe { device_driver::GPIO::new(memory::map::mmio::GPIO_START) };
-
-static PL011_UART: device_driver::PL011Uart =
-    unsafe { device_driver::PL011Uart::new(memory::map::mmio::PL011_UART_START) };
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/console.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/console.rs
index a247032fc..0a630eef4 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/console.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/console.rs
@@ -4,34 +4,13 @@
 
 //! BSP console facilities.
 
-use super::memory;
-use crate::{bsp::device_driver, console};
-use core::fmt;
+use crate::console;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// In case of a panic, the panic handler uses this function to take a last shot at printing
-/// something before the system is halted.
-///
-/// We try to init panic-versions of the GPIO and the UART. The panic versions are not protected
-/// with synchronization primitives, which increases chances that we get to print something, even
-/// when the kernel's default GPIO or UART instances happen to be locked at the time of the panic.
-///
-/// # Safety
-///
-/// - Use only for printing during a panic.
-pub unsafe fn panic_console_out() -> impl fmt::Write {
-    let mut panic_gpio = device_driver::PanicGPIO::new(memory::map::mmio::GPIO_START);
-    let mut panic_uart = device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START);
-
-    panic_gpio.map_pl011_uart();
-    panic_uart.init();
-    panic_uart
-}
-
 /// Return a reference to the console.
-pub fn console() -> &'static impl console::interface::All {
-    &super::PL011_UART
+pub fn console() -> &'static dyn console::interface::All {
+    &super::driver::PL011_UART
 }
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/driver.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/driver.rs
index b5538baa3..8b683ed8b 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/driver.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/driver.rs
@@ -4,7 +4,8 @@
 
 //! BSP driver support.
 
-use crate::driver;
+use super::memory::map::mmio;
+use crate::{bsp::device_driver, driver};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -19,8 +20,13 @@ struct BSPDriverManager {
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
+pub(super) static PL011_UART: device_driver::PL011Uart =
+    unsafe { device_driver::PL011Uart::new(mmio::PL011_UART_START) };
+
+static GPIO: device_driver::GPIO = unsafe { device_driver::GPIO::new(mmio::GPIO_START) };
+
 static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
-    device_drivers: [&super::GPIO, &super::PL011_UART],
+    device_drivers: [&PL011_UART, &GPIO],
 };
 
 //--------------------------------------------------------------------------------------------------
@@ -44,6 +50,6 @@ impl driver::interface::DriverManager for BSPDriverManager {
 
     fn post_device_driver_init(&self) {
         // Configure PL011Uart's output pins.
-        super::GPIO.map_pl011_uart();
+        GPIO.map_pl011_uart();
     }
 }
diff --git a/10_virtual_mem_part1_identity_mapping/src/console.rs b/10_virtual_mem_part1_identity_mapping/src/console.rs
index e49e241fe..c1fb0e53b 100644
--- a/10_virtual_mem_part1_identity_mapping/src/console.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/console.rs
@@ -4,6 +4,8 @@
 
 //! System console.
 
+use crate::bsp;
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -49,5 +51,16 @@ pub mod interface {
     }
 
     /// Trait alias for a full-fledged console.
-    pub trait All = Write + Read + Statistics;
+    pub trait All: Write + Read + Statistics {}
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the console.
+///
+/// This is the global console used by all printing macros.
+pub fn console() -> &'static dyn interface::All {
+    bsp::console::console()
 }
diff --git a/10_virtual_mem_part1_identity_mapping/src/main.rs b/10_virtual_mem_part1_identity_mapping/src/main.rs
index dde224e7b..6f92c676b 100644
--- a/10_virtual_mem_part1_identity_mapping/src/main.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/main.rs
@@ -158,8 +158,7 @@ unsafe fn kernel_init() -> ! {
 
 /// The main function running after the early init.
 fn kernel_main() -> ! {
-    use bsp::console::console;
-    use console::interface::All;
+    use console::{console, interface::Write};
     use core::time::Duration;
     use driver::interface::DriverManager;
     use time::interface::TimeManager;
@@ -209,7 +208,7 @@ fn kernel_main() -> ! {
     // Discard any spurious received characters before going into echo mode.
     console().clear_rx();
     loop {
-        let c = bsp::console::console().read_char();
-        bsp::console::console().write_char(c);
+        let c = console().read_char();
+        console().write_char(c);
     }
 }
diff --git a/10_virtual_mem_part1_identity_mapping/src/panic_wait.rs b/10_virtual_mem_part1_identity_mapping/src/panic_wait.rs
index f851e0d8c..edd838855 100644
--- a/10_virtual_mem_part1_identity_mapping/src/panic_wait.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/panic_wait.rs
@@ -4,29 +4,13 @@
 
 //! A panic handler that infinitely waits.
 
-use crate::{bsp, cpu};
-use core::{fmt, panic::PanicInfo};
+use crate::{cpu, println};
+use core::panic::PanicInfo;
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-fn _panic_print(args: fmt::Arguments) {
-    use fmt::Write;
-
-    unsafe { bsp::console::panic_console_out().write_fmt(args).unwrap() };
-}
-
-/// Prints with a newline - only use from the panic handler.
-///
-/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
-#[macro_export]
-macro_rules! panic_println {
-    ($($arg:tt)*) => ({
-        _panic_print(format_args_nl!($($arg)*));
-    })
-}
-
 /// Stop immediately if called a second time.
 ///
 /// # Note
@@ -69,7 +53,7 @@ fn panic(info: &PanicInfo) -> ! {
         _ => ("???", 0, 0),
     };
 
-    panic_println!(
+    println!(
         "[  {:>3}.{:06}] Kernel panic!\n\n\
         Panic location:\n      File '{}', line {}, column {}\n\n\
         {}",
diff --git a/10_virtual_mem_part1_identity_mapping/src/print.rs b/10_virtual_mem_part1_identity_mapping/src/print.rs
index 9ec13a286..8705eec0d 100644
--- a/10_virtual_mem_part1_identity_mapping/src/print.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/print.rs
@@ -4,7 +4,7 @@
 
 //! Printing.
 
-use crate::{bsp, console};
+use crate::console;
 use core::fmt;
 
 //--------------------------------------------------------------------------------------------------
@@ -13,9 +13,7 @@ use core::fmt;
 
 #[doc(hidden)]
 pub fn _print(args: fmt::Arguments) {
-    use console::interface::Write;
-
-    bsp::console::console().write_fmt(args).unwrap();
+    console::console().write_fmt(args).unwrap();
 }
 
 /// Prints without a newline.
diff --git a/11_exceptions_part1_groundwork/README.md b/11_exceptions_part1_groundwork/README.md
index 81e633bef..355ea2978 100644
--- a/11_exceptions_part1_groundwork/README.md
+++ b/11_exceptions_part1_groundwork/README.md
@@ -417,31 +417,31 @@ Minipush 1.0
 [MP] ⏩ Pushing 64 KiB =========================================🦀 100% 0 KiB/s Time: 00:00:00
 [ML] Loaded! Executing the payload now
 
-[    0.787414] mingo version 0.11.0
-[    0.787621] Booting on: Raspberry Pi 3
-[    0.788076] MMU online. Special regions:
-[    0.788553]       0x00080000 - 0x0008ffff |  64 KiB | C   RO PX  | Kernel code and RO data
-[    0.789571]       0x3f000000 - 0x4000ffff |  16 MiB | Dev RW PXN | Device MMIO
-[    0.790460] Current privilege level: EL1
-[    0.790936] Exception handling state:
-[    0.791380]       Debug:  Masked
-[    0.791770]       SError: Masked
-[    0.792160]       IRQ:    Masked
-[    0.792550]       FIQ:    Masked
-[    0.792940] Architectural timer resolution: 52 ns
-[    0.793514] Drivers loaded:
-[    0.793850]       1. BCM GPIO
-[    0.794208]       2. BCM PL011 UART
-[    0.794630] Timer test, spinning for 1 second
-[    1.795161]
-[    1.795165] Trying to read from address 8 GiB...
-[    1.795715] ************************************************
-[    1.796407] Whoa! We recovered from a synchronous exception!
-[    1.797100] ************************************************
-[    1.797794]
-[    1.797967] Let's try again
-[    1.798303] Trying to read from address 9 GiB...
-[    1.798867] Kernel panic!
+[    0.798323] mingo version 0.11.0
+[    0.798530] Booting on: Raspberry Pi 3
+[    0.798985] MMU online. Special regions:
+[    0.799462]       0x00080000 - 0x0008ffff |  64 KiB | C   RO PX  | Kernel code and RO data
+[    0.800480]       0x3f000000 - 0x4000ffff |  16 MiB | Dev RW PXN | Device MMIO
+[    0.801369] Current privilege level: EL1
+[    0.801845] Exception handling state:
+[    0.802290]       Debug:  Masked
+[    0.802680]       SError: Masked
+[    0.803069]       IRQ:    Masked
+[    0.803459]       FIQ:    Masked
+[    0.803849] Architectural timer resolution: 52 ns
+[    0.804423] Drivers loaded:
+[    0.804759]       1. BCM PL011 UART
+[    0.805182]       2. BCM GPIO
+[    0.805539] Timer test, spinning for 1 second
+[    1.806070]
+[    1.806074] Trying to read from address 8 GiB...
+[    1.806624] ************************************************
+[    1.807316] Whoa! We recovered from a synchronous exception!
+[    1.808009] ************************************************
+[    1.808703]
+[    1.808876] Let's try again
+[    1.809212] Trying to read from address 9 GiB...
+[    1.809776] Kernel panic!
 
 Panic location:
       File 'src/_arch/aarch64/exception.rs', line 58, column 5
@@ -464,25 +464,25 @@ SPSR_EL1: 0x600003c5
             IRQ    (I): Masked
             FIQ    (F): Masked
       Illegal Execution State (IL): Not set
-ELR_EL1: 0x0000000000082194
+ELR_EL1: 0x00000000000845f8
 
 General purpose register:
-      x0 : 0x0000000000000000         x1 : 0x0000000000085517
-      x2 : 0x0000000000000027         x3 : 0x0000000000084380
-      x4 : 0x0000000000000006         x5 : 0xfb5f341800000000
-      x6 : 0x0000000000000000         x7 : 0x7f91bc012b2b0209
-      x8 : 0x0000000240000000         x9 : 0x0000000000085517
+      x0 : 0x0000000000000000         x1 : 0x0000000000086187
+      x2 : 0x0000000000000027         x3 : 0x0000000000081280
+      x4 : 0x0000000000000006         x5 : 0x1e27329c00000000
+      x6 : 0x0000000000000000         x7 : 0xd3d18908028f0243
+      x8 : 0x0000000240000000         x9 : 0x0000000000086187
       x10: 0x0000000000000443         x11: 0x000000003f201000
       x12: 0x0000000000000019         x13: 0x00000000ffffd8f0
       x14: 0x000000000000147b         x15: 0x00000000ffffff9c
       x16: 0x000000000007fd38         x17: 0x0000000005f5e0ff
-      x18: 0x0000000000000030         x19: 0x0000000000090008
-      x20: 0x0000000000085350         x21: 0x000000003b9aca00
-      x22: 0x0000000000082e4c         x23: 0x0000000000082308
+      x18: 0x00000000000c58fc         x19: 0x0000000000090008
+      x20: 0x0000000000085fc0         x21: 0x000000003b9aca00
+      x22: 0x0000000000082238         x23: 0x00000000000813d4
       x24: 0x0000000010624dd3         x25: 0xffffffffc4653600
-      x26: 0x0000000000086638         x27: 0x0000000000085410
-      x28: 0x0000000000084f90         x29: 0x0000000000086538
-      lr : 0x0000000000082188
+      x26: 0x0000000000086988         x27: 0x0000000000086080
+      x28: 0x0000000000085f10         x29: 0x0000000000085c00
+      lr : 0x00000000000845ec
 ```
 
 ## Diff to previous
@@ -1033,7 +1033,16 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/main.rs 11_exceptions_part1_
      if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
          panic!("MMU: {}", string);
      }
-@@ -197,13 +199,28 @@
+@@ -158,7 +160,7 @@
+
+ /// The main function running after the early init.
+ fn kernel_main() -> ! {
+-    use console::{console, interface::Write};
++    use console::console;
+     use core::time::Duration;
+     use driver::interface::DriverManager;
+     use time::interface::TimeManager;
+@@ -196,13 +198,28 @@
      info!("Timer test, spinning for 1 second");
      time::time_manager().spin_for(Duration::from_secs(1));
 
diff --git a/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index dbb4beaa6..24958eb56 100644
--- a/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -108,16 +108,13 @@ register_structs! {
 /// Abstraction for the associated MMIO registers.
 type Registers = MMIODerefWrapper<RegisterBlock>;
 
-//--------------------------------------------------------------------------------------------------
-// Public Definitions
-//--------------------------------------------------------------------------------------------------
-
-pub struct GPIOInner {
+struct GPIOInner {
     registers: Registers,
 }
 
-// Export the inner struct so that BSPs can use it for the panic handler.
-pub use GPIOInner as PanicGPIO;
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
 
 /// Representation of the GPIO HW.
 pub struct GPIO {
@@ -125,7 +122,7 @@ pub struct GPIO {
 }
 
 //--------------------------------------------------------------------------------------------------
-// Public Code
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
 impl GPIOInner {
@@ -189,7 +186,13 @@ impl GPIOInner {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
 impl GPIO {
+    pub const COMPATIBLE: &'static str = "BCM GPIO";
+
     /// Create an instance.
     ///
     /// # Safety
@@ -214,6 +217,6 @@ use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for GPIO {
     fn compatible(&self) -> &'static str {
-        "BCM GPIO"
+        Self::COMPATIBLE
     }
 }
diff --git a/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 85cd31549..b034e92e5 100644
--- a/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -167,18 +167,15 @@ enum BlockingMode {
     NonBlocking,
 }
 
-//--------------------------------------------------------------------------------------------------
-// Public Definitions
-//--------------------------------------------------------------------------------------------------
-
-pub struct PL011UartInner {
+struct PL011UartInner {
     registers: Registers,
     chars_written: usize,
     chars_read: usize,
 }
 
-// Export the inner struct so that BSPs can use it for the panic handler.
-pub use PL011UartInner as PanicUart;
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
 
 /// Representation of the UART.
 pub struct PL011Uart {
@@ -186,7 +183,7 @@ pub struct PL011Uart {
 }
 
 //--------------------------------------------------------------------------------------------------
-// Public Code
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
 impl PL011UartInner {
@@ -326,7 +323,13 @@ impl fmt::Write for PL011UartInner {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
 impl PL011Uart {
+    pub const COMPATIBLE: &'static str = "BCM PL011 UART";
+
     /// Create an instance.
     ///
     /// # Safety
@@ -346,7 +349,7 @@ use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for PL011Uart {
     fn compatible(&self) -> &'static str {
-        "BCM PL011 UART"
+        Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
@@ -400,3 +403,5 @@ impl console::interface::Statistics for PL011Uart {
         self.inner.lock(|inner| inner.chars_read)
     }
 }
+
+impl console::interface::All for PL011Uart {}
diff --git a/11_exceptions_part1_groundwork/src/bsp/raspberrypi.rs b/11_exceptions_part1_groundwork/src/bsp/raspberrypi.rs
index 22edb4fa6..a9a7261af 100644
--- a/11_exceptions_part1_groundwork/src/bsp/raspberrypi.rs
+++ b/11_exceptions_part1_groundwork/src/bsp/raspberrypi.rs
@@ -9,17 +9,6 @@ pub mod cpu;
 pub mod driver;
 pub mod memory;
 
-//--------------------------------------------------------------------------------------------------
-// Global instances
-//--------------------------------------------------------------------------------------------------
-use super::device_driver;
-
-static GPIO: device_driver::GPIO =
-    unsafe { device_driver::GPIO::new(memory::map::mmio::GPIO_START) };
-
-static PL011_UART: device_driver::PL011Uart =
-    unsafe { device_driver::PL011Uart::new(memory::map::mmio::PL011_UART_START) };
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
diff --git a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/console.rs b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/console.rs
index a247032fc..0a630eef4 100644
--- a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/console.rs
+++ b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/console.rs
@@ -4,34 +4,13 @@
 
 //! BSP console facilities.
 
-use super::memory;
-use crate::{bsp::device_driver, console};
-use core::fmt;
+use crate::console;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// In case of a panic, the panic handler uses this function to take a last shot at printing
-/// something before the system is halted.
-///
-/// We try to init panic-versions of the GPIO and the UART. The panic versions are not protected
-/// with synchronization primitives, which increases chances that we get to print something, even
-/// when the kernel's default GPIO or UART instances happen to be locked at the time of the panic.
-///
-/// # Safety
-///
-/// - Use only for printing during a panic.
-pub unsafe fn panic_console_out() -> impl fmt::Write {
-    let mut panic_gpio = device_driver::PanicGPIO::new(memory::map::mmio::GPIO_START);
-    let mut panic_uart = device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START);
-
-    panic_gpio.map_pl011_uart();
-    panic_uart.init();
-    panic_uart
-}
-
 /// Return a reference to the console.
-pub fn console() -> &'static impl console::interface::All {
-    &super::PL011_UART
+pub fn console() -> &'static dyn console::interface::All {
+    &super::driver::PL011_UART
 }
diff --git a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/driver.rs b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/driver.rs
index b5538baa3..8b683ed8b 100644
--- a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/driver.rs
+++ b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/driver.rs
@@ -4,7 +4,8 @@
 
 //! BSP driver support.
 
-use crate::driver;
+use super::memory::map::mmio;
+use crate::{bsp::device_driver, driver};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -19,8 +20,13 @@ struct BSPDriverManager {
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
+pub(super) static PL011_UART: device_driver::PL011Uart =
+    unsafe { device_driver::PL011Uart::new(mmio::PL011_UART_START) };
+
+static GPIO: device_driver::GPIO = unsafe { device_driver::GPIO::new(mmio::GPIO_START) };
+
 static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
-    device_drivers: [&super::GPIO, &super::PL011_UART],
+    device_drivers: [&PL011_UART, &GPIO],
 };
 
 //--------------------------------------------------------------------------------------------------
@@ -44,6 +50,6 @@ impl driver::interface::DriverManager for BSPDriverManager {
 
     fn post_device_driver_init(&self) {
         // Configure PL011Uart's output pins.
-        super::GPIO.map_pl011_uart();
+        GPIO.map_pl011_uart();
     }
 }
diff --git a/11_exceptions_part1_groundwork/src/console.rs b/11_exceptions_part1_groundwork/src/console.rs
index e49e241fe..c1fb0e53b 100644
--- a/11_exceptions_part1_groundwork/src/console.rs
+++ b/11_exceptions_part1_groundwork/src/console.rs
@@ -4,6 +4,8 @@
 
 //! System console.
 
+use crate::bsp;
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -49,5 +51,16 @@ pub mod interface {
     }
 
     /// Trait alias for a full-fledged console.
-    pub trait All = Write + Read + Statistics;
+    pub trait All: Write + Read + Statistics {}
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the console.
+///
+/// This is the global console used by all printing macros.
+pub fn console() -> &'static dyn interface::All {
+    bsp::console::console()
 }
diff --git a/11_exceptions_part1_groundwork/src/main.rs b/11_exceptions_part1_groundwork/src/main.rs
index 967436014..12386153f 100644
--- a/11_exceptions_part1_groundwork/src/main.rs
+++ b/11_exceptions_part1_groundwork/src/main.rs
@@ -160,8 +160,7 @@ unsafe fn kernel_init() -> ! {
 
 /// The main function running after the early init.
 fn kernel_main() -> ! {
-    use bsp::console::console;
-    use console::interface::All;
+    use console::console;
     use core::time::Duration;
     use driver::interface::DriverManager;
     use time::interface::TimeManager;
@@ -226,7 +225,7 @@ fn kernel_main() -> ! {
     // Discard any spurious received characters before going into echo mode.
     console().clear_rx();
     loop {
-        let c = bsp::console::console().read_char();
-        bsp::console::console().write_char(c);
+        let c = console().read_char();
+        console().write_char(c);
     }
 }
diff --git a/11_exceptions_part1_groundwork/src/panic_wait.rs b/11_exceptions_part1_groundwork/src/panic_wait.rs
index f851e0d8c..edd838855 100644
--- a/11_exceptions_part1_groundwork/src/panic_wait.rs
+++ b/11_exceptions_part1_groundwork/src/panic_wait.rs
@@ -4,29 +4,13 @@
 
 //! A panic handler that infinitely waits.
 
-use crate::{bsp, cpu};
-use core::{fmt, panic::PanicInfo};
+use crate::{cpu, println};
+use core::panic::PanicInfo;
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-fn _panic_print(args: fmt::Arguments) {
-    use fmt::Write;
-
-    unsafe { bsp::console::panic_console_out().write_fmt(args).unwrap() };
-}
-
-/// Prints with a newline - only use from the panic handler.
-///
-/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
-#[macro_export]
-macro_rules! panic_println {
-    ($($arg:tt)*) => ({
-        _panic_print(format_args_nl!($($arg)*));
-    })
-}
-
 /// Stop immediately if called a second time.
 ///
 /// # Note
@@ -69,7 +53,7 @@ fn panic(info: &PanicInfo) -> ! {
         _ => ("???", 0, 0),
     };
 
-    panic_println!(
+    println!(
         "[  {:>3}.{:06}] Kernel panic!\n\n\
         Panic location:\n      File '{}', line {}, column {}\n\n\
         {}",
diff --git a/11_exceptions_part1_groundwork/src/print.rs b/11_exceptions_part1_groundwork/src/print.rs
index 9ec13a286..8705eec0d 100644
--- a/11_exceptions_part1_groundwork/src/print.rs
+++ b/11_exceptions_part1_groundwork/src/print.rs
@@ -4,7 +4,7 @@
 
 //! Printing.
 
-use crate::{bsp, console};
+use crate::console;
 use core::fmt;
 
 //--------------------------------------------------------------------------------------------------
@@ -13,9 +13,7 @@ use core::fmt;
 
 #[doc(hidden)]
 pub fn _print(args: fmt::Arguments) {
-    use console::interface::Write;
-
-    bsp::console::console().write_fmt(args).unwrap();
+    console::console().write_fmt(args).unwrap();
 }
 
 /// Prints without a newline.
diff --git a/12_integrated_testing/README.md b/12_integrated_testing/README.md
index 14dc38788..e0d0dd1dc 100644
--- a/12_integrated_testing/README.md
+++ b/12_integrated_testing/README.md
@@ -266,8 +266,10 @@ implementation in `lib.rs`:
 #[cfg(test)]
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
     exception::handling_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     test_main();
 
@@ -275,12 +277,12 @@ unsafe fn kernel_init() -> ! {
 }
 ```
 
-Note the call to `bsp::console::qemu_bring_up_console()`. Since we are running all our tests inside
-`QEMU`, we need to ensure that whatever peripheral implements the kernel's `console` interface is
-initialized, so that we can print from our tests. If you recall [tutorial 03], bringing up
-peripherals in `QEMU` might not need the full initialization as is needed on real hardware (setting
-clocks, config registers, etc...) due to the abstractions in `QEMU`'s emulation code. So this is an
-opportunity to cut down on setup code.
+Note the call to `bsp::driver::driver_manager().qemu_bring_up_console()`. Since we are running all
+our tests inside `QEMU`, we need to ensure that whatever peripheral implements the kernel's
+`console` interface is initialized, so that we can print from our tests. If you recall [tutorial
+03], bringing up peripherals in `QEMU` might not need the full initialization as is needed on real
+hardware (setting clocks, config registers, etc...) due to the abstractions in `QEMU`'s emulation
+code. So this is an opportunity to cut down on setup code.
 
 [tutorial 03]: ../03_hacky_hello_world
 
@@ -620,13 +622,15 @@ your test code into individual chunks. For example, take a look at `tests/01_tim
 #![test_runner(libkernel::test_runner)]
 
 use core::time::Duration;
-use libkernel::{bsp, cpu, exception, time, time::interface::TimeManager};
+use libkernel::{bsp, cpu, driver, exception, time, time::interface::TimeManager};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
     exception::handling_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
 
@@ -714,14 +718,15 @@ so the wanted outcome is a `panic!`. Here is the whole test (minus some inline c
 
 mod panic_exit_success;
 
-use libkernel::{bsp, cpu, exception, memory, println};
+use libkernel::{bsp, cpu, driver, exception, info, memory, println};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
     use memory::mmu::interface::MMU;
 
     exception::handling_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     // This line will be printed as the test header.
     println!("Testing synchronous exception handling by causing a page fault");
@@ -788,15 +793,15 @@ The subtest first sends `"ABC"` over the console to the kernel, and then expects
 /// Console tests should time out on the I/O harness in case of panic.
 mod panic_wait_forever;
 
-use libkernel::{bsp, console, cpu, exception, print};
+use libkernel::{bsp, console, cpu, driver, exception, print};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use bsp::console::console;
-    use console::interface::*;
+    use console::console;
+    use driver::interface::DriverManager;
 
     exception::handling_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     // Handshake
     assert_eq!(console().read_char(), 'A');
diff --git a/12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index dbb4beaa6..24958eb56 100644
--- a/12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -108,16 +108,13 @@ register_structs! {
 /// Abstraction for the associated MMIO registers.
 type Registers = MMIODerefWrapper<RegisterBlock>;
 
-//--------------------------------------------------------------------------------------------------
-// Public Definitions
-//--------------------------------------------------------------------------------------------------
-
-pub struct GPIOInner {
+struct GPIOInner {
     registers: Registers,
 }
 
-// Export the inner struct so that BSPs can use it for the panic handler.
-pub use GPIOInner as PanicGPIO;
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
 
 /// Representation of the GPIO HW.
 pub struct GPIO {
@@ -125,7 +122,7 @@ pub struct GPIO {
 }
 
 //--------------------------------------------------------------------------------------------------
-// Public Code
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
 impl GPIOInner {
@@ -189,7 +186,13 @@ impl GPIOInner {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
 impl GPIO {
+    pub const COMPATIBLE: &'static str = "BCM GPIO";
+
     /// Create an instance.
     ///
     /// # Safety
@@ -214,6 +217,6 @@ use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for GPIO {
     fn compatible(&self) -> &'static str {
-        "BCM GPIO"
+        Self::COMPATIBLE
     }
 }
diff --git a/12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 85cd31549..b034e92e5 100644
--- a/12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -167,18 +167,15 @@ enum BlockingMode {
     NonBlocking,
 }
 
-//--------------------------------------------------------------------------------------------------
-// Public Definitions
-//--------------------------------------------------------------------------------------------------
-
-pub struct PL011UartInner {
+struct PL011UartInner {
     registers: Registers,
     chars_written: usize,
     chars_read: usize,
 }
 
-// Export the inner struct so that BSPs can use it for the panic handler.
-pub use PL011UartInner as PanicUart;
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
 
 /// Representation of the UART.
 pub struct PL011Uart {
@@ -186,7 +183,7 @@ pub struct PL011Uart {
 }
 
 //--------------------------------------------------------------------------------------------------
-// Public Code
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
 impl PL011UartInner {
@@ -326,7 +323,13 @@ impl fmt::Write for PL011UartInner {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
 impl PL011Uart {
+    pub const COMPATIBLE: &'static str = "BCM PL011 UART";
+
     /// Create an instance.
     ///
     /// # Safety
@@ -346,7 +349,7 @@ use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for PL011Uart {
     fn compatible(&self) -> &'static str {
-        "BCM PL011 UART"
+        Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
@@ -400,3 +403,5 @@ impl console::interface::Statistics for PL011Uart {
         self.inner.lock(|inner| inner.chars_read)
     }
 }
+
+impl console::interface::All for PL011Uart {}
diff --git a/12_integrated_testing/kernel/src/bsp/raspberrypi.rs b/12_integrated_testing/kernel/src/bsp/raspberrypi.rs
index 22edb4fa6..a9a7261af 100644
--- a/12_integrated_testing/kernel/src/bsp/raspberrypi.rs
+++ b/12_integrated_testing/kernel/src/bsp/raspberrypi.rs
@@ -9,17 +9,6 @@ pub mod cpu;
 pub mod driver;
 pub mod memory;
 
-//--------------------------------------------------------------------------------------------------
-// Global instances
-//--------------------------------------------------------------------------------------------------
-use super::device_driver;
-
-static GPIO: device_driver::GPIO =
-    unsafe { device_driver::GPIO::new(memory::map::mmio::GPIO_START) };
-
-static PL011_UART: device_driver::PL011Uart =
-    unsafe { device_driver::PL011Uart::new(memory::map::mmio::PL011_UART_START) };
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
diff --git a/12_integrated_testing/kernel/src/bsp/raspberrypi/console.rs b/12_integrated_testing/kernel/src/bsp/raspberrypi/console.rs
index eaef0b1fb..0a630eef4 100644
--- a/12_integrated_testing/kernel/src/bsp/raspberrypi/console.rs
+++ b/12_integrated_testing/kernel/src/bsp/raspberrypi/console.rs
@@ -4,45 +4,13 @@
 
 //! BSP console facilities.
 
-use super::memory;
-use crate::{bsp::device_driver, console};
-use core::fmt;
+use crate::console;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// In case of a panic, the panic handler uses this function to take a last shot at printing
-/// something before the system is halted.
-///
-/// We try to init panic-versions of the GPIO and the UART. The panic versions are not protected
-/// with synchronization primitives, which increases chances that we get to print something, even
-/// when the kernel's default GPIO or UART instances happen to be locked at the time of the panic.
-///
-/// # Safety
-///
-/// - Use only for printing during a panic.
-pub unsafe fn panic_console_out() -> impl fmt::Write {
-    let mut panic_gpio = device_driver::PanicGPIO::new(memory::map::mmio::GPIO_START);
-    let mut panic_uart = device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START);
-
-    panic_gpio.map_pl011_uart();
-    panic_uart.init();
-    panic_uart
-}
-
 /// Return a reference to the console.
-pub fn console() -> &'static impl console::interface::All {
-    &super::PL011_UART
+pub fn console() -> &'static dyn console::interface::All {
+    &super::driver::PL011_UART
 }
-
-//--------------------------------------------------------------------------------------------------
-// Testing
-//--------------------------------------------------------------------------------------------------
-
-/// Minimal code needed to bring up the console in QEMU (for testing only). This is often less steps
-/// than on real hardware due to QEMU's abstractions.
-///
-/// For the RPi, nothing needs to be done.
-#[cfg(feature = "test_build")]
-pub fn qemu_bring_up_console() {}
diff --git a/12_integrated_testing/kernel/src/bsp/raspberrypi/driver.rs b/12_integrated_testing/kernel/src/bsp/raspberrypi/driver.rs
index b5538baa3..f8acd335f 100644
--- a/12_integrated_testing/kernel/src/bsp/raspberrypi/driver.rs
+++ b/12_integrated_testing/kernel/src/bsp/raspberrypi/driver.rs
@@ -4,7 +4,8 @@
 
 //! BSP driver support.
 
-use crate::driver;
+use super::memory::map::mmio;
+use crate::{bsp::device_driver, driver};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -19,8 +20,13 @@ struct BSPDriverManager {
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
+pub(super) static PL011_UART: device_driver::PL011Uart =
+    unsafe { device_driver::PL011Uart::new(mmio::PL011_UART_START) };
+
+static GPIO: device_driver::GPIO = unsafe { device_driver::GPIO::new(mmio::GPIO_START) };
+
 static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
-    device_drivers: [&super::GPIO, &super::PL011_UART],
+    device_drivers: [&PL011_UART, &GPIO],
 };
 
 //--------------------------------------------------------------------------------------------------
@@ -44,6 +50,9 @@ impl driver::interface::DriverManager for BSPDriverManager {
 
     fn post_device_driver_init(&self) {
         // Configure PL011Uart's output pins.
-        super::GPIO.map_pl011_uart();
+        GPIO.map_pl011_uart();
     }
+
+    #[cfg(feature = "test_build")]
+    fn qemu_bring_up_console(&self) {}
 }
diff --git a/12_integrated_testing/kernel/src/console.rs b/12_integrated_testing/kernel/src/console.rs
index e49e241fe..c1fb0e53b 100644
--- a/12_integrated_testing/kernel/src/console.rs
+++ b/12_integrated_testing/kernel/src/console.rs
@@ -4,6 +4,8 @@
 
 //! System console.
 
+use crate::bsp;
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -49,5 +51,16 @@ pub mod interface {
     }
 
     /// Trait alias for a full-fledged console.
-    pub trait All = Write + Read + Statistics;
+    pub trait All: Write + Read + Statistics {}
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the console.
+///
+/// This is the global console used by all printing macros.
+pub fn console() -> &'static dyn interface::All {
+    bsp::console::console()
 }
diff --git a/12_integrated_testing/kernel/src/driver.rs b/12_integrated_testing/kernel/src/driver.rs
index 2fcc75629..12d60ad49 100644
--- a/12_integrated_testing/kernel/src/driver.rs
+++ b/12_integrated_testing/kernel/src/driver.rs
@@ -40,5 +40,10 @@ pub mod interface {
         ///
         /// For example, device driver code that depends on other drivers already being online.
         fn post_device_driver_init(&self);
+
+        /// Minimal code needed to bring up the console in QEMU (for testing only). This is often
+        /// less steps than on real hardware due to QEMU's abstractions.
+        #[cfg(feature = "test_build")]
+        fn qemu_bring_up_console(&self);
     }
 }
diff --git a/12_integrated_testing/kernel/src/lib.rs b/12_integrated_testing/kernel/src/lib.rs
index 2de7d6cce..eef112f09 100644
--- a/12_integrated_testing/kernel/src/lib.rs
+++ b/12_integrated_testing/kernel/src/lib.rs
@@ -177,8 +177,10 @@ pub fn test_runner(tests: &[&test_types::UnitTest]) {
 #[cfg(test)]
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
     exception::handling_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     test_main();
 
diff --git a/12_integrated_testing/kernel/src/main.rs b/12_integrated_testing/kernel/src/main.rs
index 11b6547dc..bf4d7fe3b 100644
--- a/12_integrated_testing/kernel/src/main.rs
+++ b/12_integrated_testing/kernel/src/main.rs
@@ -49,8 +49,7 @@ unsafe fn kernel_init() -> ! {
 
 /// The main function running after the early init.
 fn kernel_main() -> ! {
-    use bsp::console::console;
-    use console::interface::All;
+    use console::console;
     use driver::interface::DriverManager;
 
     info!("{}", libkernel::version());
@@ -84,7 +83,7 @@ fn kernel_main() -> ! {
     // Discard any spurious received characters before going into echo mode.
     console().clear_rx();
     loop {
-        let c = bsp::console::console().read_char();
-        bsp::console::console().write_char(c);
+        let c = console().read_char();
+        console().write_char(c);
     }
 }
diff --git a/12_integrated_testing/kernel/src/panic_wait.rs b/12_integrated_testing/kernel/src/panic_wait.rs
index 6f09f11c9..8bedfded0 100644
--- a/12_integrated_testing/kernel/src/panic_wait.rs
+++ b/12_integrated_testing/kernel/src/panic_wait.rs
@@ -4,19 +4,13 @@
 
 //! A panic handler that infinitely waits.
 
-use crate::{bsp, cpu};
-use core::{fmt, panic::PanicInfo};
+use crate::{cpu, println};
+use core::panic::PanicInfo;
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-fn _panic_print(args: fmt::Arguments) {
-    use fmt::Write;
-
-    unsafe { bsp::console::panic_console_out().write_fmt(args).unwrap() };
-}
-
 /// The point of exit for `libkernel`.
 ///
 /// It is linked weakly, so that the integration tests can overload its standard behavior.
@@ -34,16 +28,6 @@ fn _panic_exit() -> ! {
     }
 }
 
-/// Prints with a newline - only use from the panic handler.
-///
-/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
-#[macro_export]
-macro_rules! panic_println {
-    ($($arg:tt)*) => ({
-        _panic_print(format_args_nl!($($arg)*));
-    })
-}
-
 /// Stop immediately if called a second time.
 ///
 /// # Note
@@ -86,7 +70,7 @@ fn panic(info: &PanicInfo) -> ! {
         _ => ("???", 0, 0),
     };
 
-    panic_println!(
+    println!(
         "[  {:>3}.{:06}] Kernel panic!\n\n\
         Panic location:\n      File '{}', line {}, column {}\n\n\
         {}",
diff --git a/12_integrated_testing/kernel/src/print.rs b/12_integrated_testing/kernel/src/print.rs
index 9ec13a286..8705eec0d 100644
--- a/12_integrated_testing/kernel/src/print.rs
+++ b/12_integrated_testing/kernel/src/print.rs
@@ -4,7 +4,7 @@
 
 //! Printing.
 
-use crate::{bsp, console};
+use crate::console;
 use core::fmt;
 
 //--------------------------------------------------------------------------------------------------
@@ -13,9 +13,7 @@ use core::fmt;
 
 #[doc(hidden)]
 pub fn _print(args: fmt::Arguments) {
-    use console::interface::Write;
-
-    bsp::console::console().write_fmt(args).unwrap();
+    console::console().write_fmt(args).unwrap();
 }
 
 /// Prints without a newline.
diff --git a/12_integrated_testing/kernel/tests/00_console_sanity.rs b/12_integrated_testing/kernel/tests/00_console_sanity.rs
index dccb6cc2a..e12a711f7 100644
--- a/12_integrated_testing/kernel/tests/00_console_sanity.rs
+++ b/12_integrated_testing/kernel/tests/00_console_sanity.rs
@@ -11,15 +11,15 @@
 /// Console tests should time out on the I/O harness in case of panic.
 mod panic_wait_forever;
 
-use libkernel::{bsp, console, cpu, exception, print};
+use libkernel::{bsp, console, cpu, driver, exception, print};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use bsp::console::console;
-    use console::interface::*;
+    use console::console;
+    use driver::interface::DriverManager;
 
     exception::handling_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     // Handshake
     assert_eq!(console().read_char(), 'A');
diff --git a/12_integrated_testing/kernel/tests/01_timer_sanity.rs b/12_integrated_testing/kernel/tests/01_timer_sanity.rs
index 59ef4a7f7..390cdee53 100644
--- a/12_integrated_testing/kernel/tests/01_timer_sanity.rs
+++ b/12_integrated_testing/kernel/tests/01_timer_sanity.rs
@@ -11,13 +11,15 @@
 #![test_runner(libkernel::test_runner)]
 
 use core::time::Duration;
-use libkernel::{bsp, cpu, exception, time, time::interface::TimeManager};
+use libkernel::{bsp, cpu, driver, exception, time, time::interface::TimeManager};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
     exception::handling_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
 
diff --git a/12_integrated_testing/kernel/tests/02_exception_sync_page_fault.rs b/12_integrated_testing/kernel/tests/02_exception_sync_page_fault.rs
index 9be94acde..62908377a 100644
--- a/12_integrated_testing/kernel/tests/02_exception_sync_page_fault.rs
+++ b/12_integrated_testing/kernel/tests/02_exception_sync_page_fault.rs
@@ -17,14 +17,15 @@
 /// or indirectly.
 mod panic_exit_success;
 
-use libkernel::{bsp, cpu, exception, info, memory, println};
+use libkernel::{bsp, cpu, driver, exception, info, memory, println};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
     use memory::mmu::interface::MMU;
 
     exception::handling_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     // This line will be printed as the test header.
     println!("Testing synchronous exception handling by causing a page fault");
diff --git a/12_integrated_testing/kernel/tests/03_exception_restore_sanity.rs b/12_integrated_testing/kernel/tests/03_exception_restore_sanity.rs
index f25ed6453..3f4eae79a 100644
--- a/12_integrated_testing/kernel/tests/03_exception_restore_sanity.rs
+++ b/12_integrated_testing/kernel/tests/03_exception_restore_sanity.rs
@@ -12,7 +12,7 @@
 mod panic_wait_forever;
 
 use core::arch::asm;
-use libkernel::{bsp, cpu, exception, info, memory, println};
+use libkernel::{bsp, cpu, driver, exception, info, memory, println};
 
 #[inline(never)]
 fn nested_system_call() {
@@ -30,10 +30,11 @@ fn nested_system_call() {
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
     use memory::mmu::interface::MMU;
 
     exception::handling_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     // This line will be printed as the test header.
     println!("Testing exception restore");
diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index d6c6a7e47..bc468be8d 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -29,7 +29,6 @@
     + [The GICv2 Driver (Pi 4)](#the-gicv2-driver-pi-4)
       - [GICC Details](#gicc-details)
       - [GICD Details](#gicd-details)
-- [UART hack](#uart-hack)
 - [Test it](#test-it)
 - [Diff to previous](#diff-to-previous)
 
@@ -282,7 +281,7 @@ fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
     use exception::asynchronous::{interface::IRQManager, IRQDescriptor};
 
     let descriptor = IRQDescriptor {
-        name: "BCM PL011 UART",
+        name: Self::COMPATIBLE,
         handler: self,
     };
 
@@ -667,6 +666,7 @@ Minipush 1.0
 [MP] ⏳ Waiting for /dev/ttyUSB0
 [MP] ✅ Serial connected
 [MP] 🔌 Please power the target now
+
  __  __ _      _ _                 _
 |  \/  (_)_ _ (_) |   ___  __ _ __| |
 | |\/| | | ' \| | |__/ _ \/ _` / _` |
@@ -678,26 +678,26 @@ Minipush 1.0
 [MP] ⏩ Pushing 66 KiB =========================================🦀 100% 0 KiB/s Time: 00:00:00
 [ML] Loaded! Executing the payload now
 
-[    1.010579] mingo version 0.13.0
-[    1.010787] Booting on: Raspberry Pi 3
-[    1.011242] MMU online. Special regions:
-[    1.011718]       0x00080000 - 0x0008ffff |  64 KiB | C   RO PX  | Kernel code and RO data
-[    1.012737]       0x3f000000 - 0x4000ffff |  16 MiB | Dev RW PXN | Device MMIO
-[    1.013625] Current privilege level: EL1
-[    1.014102] Exception handling state:
-[    1.014546]       Debug:  Masked
-[    1.014936]       SError: Masked
-[    1.015326]       IRQ:    Unmasked
-[    1.015738]       FIQ:    Masked
-[    1.016127] Architectural timer resolution: 52 ns
-[    1.016702] Drivers loaded:
-[    1.017038]       1. BCM GPIO
-[    1.017395]       2. BCM PL011 UART
-[    1.017817]       3. BCM Interrupt Controller
-[    1.018348] Registered IRQ handlers:
-[    1.018782]       Peripheral handler:
-[    1.019228]              57. BCM PL011 UART
-[    1.019735] Echoing input now
+[    0.822492] mingo version 0.13.0
+[    0.822700] Booting on: Raspberry Pi 3
+[    0.823155] MMU online. Special regions:
+[    0.823632]       0x00080000 - 0x0008ffff |  64 KiB | C   RO PX  | Kernel code and RO data
+[    0.824650]       0x3f000000 - 0x4000ffff |  16 MiB | Dev RW PXN | Device MMIO
+[    0.825539] Current privilege level: EL1
+[    0.826015] Exception handling state:
+[    0.826459]       Debug:  Masked
+[    0.826849]       SError: Masked
+[    0.827239]       IRQ:    Unmasked
+[    0.827651]       FIQ:    Masked
+[    0.828041] Architectural timer resolution: 52 ns
+[    0.828615] Drivers loaded:
+[    0.828951]       1. BCM PL011 UART
+[    0.829373]       2. BCM GPIO
+[    0.829731]       3. BCM Interrupt Controller
+[    0.830262] Registered IRQ handlers:
+[    0.830695]       Peripheral handler:
+[    0.831141]              57. BCM PL011 UART
+[    0.831649] Echoing input now
 ```
 
 Raspberry Pi 4:
@@ -710,6 +710,7 @@ Minipush 1.0
 [MP] ⏳ Waiting for /dev/ttyUSB0
 [MP] ✅ Serial connected
 [MP] 🔌 Please power the target now
+
  __  __ _      _ _                 _
 |  \/  (_)_ _ (_) |   ___  __ _ __| |
 | |\/| | | ' \| | |__/ _ \/ _` / _` |
@@ -721,26 +722,26 @@ Minipush 1.0
 [MP] ⏩ Pushing 73 KiB =========================================🦀 100% 0 KiB/s Time: 00:00:00
 [ML] Loaded! Executing the payload now
 
-[    1.030536] mingo version 0.13.0
-[    1.030569] Booting on: Raspberry Pi 4
-[    1.031024] MMU online. Special regions:
-[    1.031501]       0x00080000 - 0x0008ffff |  64 KiB | C   RO PX  | Kernel code and RO data
-[    1.032519]       0xfe000000 - 0xff84ffff |  24 MiB | Dev RW PXN | Device MMIO
-[    1.033408] Current privilege level: EL1
-[    1.033884] Exception handling state:
-[    1.034328]       Debug:  Masked
-[    1.034718]       SError: Masked
-[    1.035108]       IRQ:    Unmasked
-[    1.035520]       FIQ:    Masked
-[    1.035910] Architectural timer resolution: 18 ns
-[    1.036484] Drivers loaded:
-[    1.036820]       1. BCM GPIO
-[    1.037178]       2. BCM PL011 UART
-[    1.037600]       3. GICv2 (ARM Generic Interrupt Controller v2)
-[    1.038337] Registered IRQ handlers:
-[    1.038770]       Peripheral handler:
-[    1.039217]             153. BCM PL011 UART
-[    1.039725] Echoing input now
+[    0.886853] mingo version 0.13.0
+[    0.886886] Booting on: Raspberry Pi 4
+[    0.887341] MMU online. Special regions:
+[    0.887818]       0x00080000 - 0x0008ffff |  64 KiB | C   RO PX  | Kernel code and RO data
+[    0.888836]       0xfe000000 - 0xff84ffff |  24 MiB | Dev RW PXN | Device MMIO
+[    0.889725] Current privilege level: EL1
+[    0.890201] Exception handling state:
+[    0.890645]       Debug:  Masked
+[    0.891035]       SError: Masked
+[    0.891425]       IRQ:    Unmasked
+[    0.891837]       FIQ:    Masked
+[    0.892227] Architectural timer resolution: 18 ns
+[    0.892801] Drivers loaded:
+[    0.893137]       1. BCM PL011 UART
+[    0.893560]       2. BCM GPIO
+[    0.893917]       3. GICv2 (ARM Generic Interrupt Controller v2)
+[    0.894654] Registered IRQ handlers:
+[    0.895087]       Peripheral handler:
+[    0.895534]             153. BCM PL011 UART
+[    0.896042] Echoing input now
 ```
 
 ## Diff to previous
@@ -896,21 +897,19 @@ diff -uNr 12_integrated_testing/kernel/src/_arch/aarch64/exception.rs 13_excepti
  //!
  //! crate::exception::arch_exception
 
-+use crate::{bsp, exception};
++use crate::exception;
  use core::{arch::global_asm, cell::UnsafeCell, fmt};
  use cortex_a::{asm::barrier, registers::*};
  use tock_registers::{
-@@ -102,8 +103,11 @@
+@@ -102,8 +103,9 @@
  }
 
  #[no_mangle]
 -unsafe extern "C" fn current_elx_irq(e: &mut ExceptionContext) {
 -    default_exception_handler(e);
 +unsafe extern "C" fn current_elx_irq(_e: &mut ExceptionContext) {
-+    use exception::asynchronous::interface::IRQManager;
-+
 +    let token = &exception::asynchronous::IRQContext::new();
-+    bsp::exception::asynchronous::irq_manager().handle_pending_irqs(token);
++    exception::asynchronous::irq_manager().handle_pending_irqs(token);
  }
 
  #[no_mangle]
@@ -1268,7 +1267,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs 1
 diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/arm/gicv2.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2.rs
 --- 12_integrated_testing/kernel/src/bsp/device_driver/arm/gicv2.rs
 +++ 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2.rs
-@@ -0,0 +1,219 @@
+@@ -0,0 +1,221 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
@@ -1385,6 +1384,8 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/arm/gicv2.rs 13_exc
 +    const MAX_IRQ_NUMBER: usize = 300; // Normally 1019, but keep it lower to save some space.
 +    const NUM_IRQS: usize = Self::MAX_IRQ_NUMBER + 1;
 +
++    pub const COMPATIBLE: &'static str = "GICv2 (ARM Generic Interrupt Controller v2)";
++
 +    /// Create an instance.
 +    ///
 +    /// # Safety
@@ -1406,7 +1407,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/arm/gicv2.rs 13_exc
 +
 +impl driver::interface::DeviceDriver for GICv2 {
 +    fn compatible(&self) -> &'static str {
-+        "GICv2 (ARM Generic Interrupt Controller v2)"
++        Self::COMPATIBLE
 +    }
 +
 +    unsafe fn init(&self) -> Result<(), &'static str> {
@@ -1515,7 +1516,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
  };
  use tock_registers::{
      interfaces::{ReadWriteable, Writeable},
-@@ -121,7 +121,7 @@
+@@ -118,7 +118,7 @@
 
  /// Representation of the GPIO HW.
  pub struct GPIO {
@@ -1524,7 +1525,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -197,7 +197,7 @@
+@@ -200,7 +200,7 @@
      /// - The user must ensure to provide a correct MMIO start address.
      pub const unsafe fn new(mmio_start_addr: usize) -> Self {
          Self {
@@ -1709,7 +1710,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interru
 diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
 --- 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
 +++ 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
-@@ -0,0 +1,131 @@
+@@ -0,0 +1,134 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
@@ -1740,6 +1741,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interru
 +
 +/// Used for the associated type of trait [`exception::asynchronous::interface::IRQManager`].
 +#[derive(Copy, Clone)]
++#[allow(missing_docs)]
 +pub enum IRQNumber {
 +    Local(LocalIRQ),
 +    Peripheral(PeripheralIRQ),
@@ -1786,12 +1788,14 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interru
 +    const MAX_PERIPHERAL_IRQ_NUMBER: usize = 63;
 +    const NUM_PERIPHERAL_IRQS: usize = Self::MAX_PERIPHERAL_IRQ_NUMBER + 1;
 +
++    pub const COMPATIBLE: &'static str = "BCM Interrupt Controller";
++
 +    /// Create an instance.
 +    ///
 +    /// # Safety
 +    ///
 +    /// - The user must ensure to provide a correct MMIO start address.
-+    pub const unsafe fn new(_local_mmio_start_addr: usize, periph_mmio_start_addr: usize) -> Self {
++    pub const unsafe fn new(periph_mmio_start_addr: usize) -> Self {
 +        Self {
 +            periph: peripheral_ic::PeripheralIC::new(periph_mmio_start_addr),
 +        }
@@ -1804,7 +1808,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interru
 +
 +impl driver::interface::DeviceDriver for InterruptController {
 +    fn compatible(&self) -> &'static str {
-+        "BCM Interrupt Controller"
++        Self::COMPATIBLE
 +    }
 +}
 +
@@ -1921,7 +1925,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_u
          (0x44 => ICR: WriteOnly<u32, ICR::Register>),
          (0x48 => @END),
      }
-@@ -182,7 +231,8 @@
+@@ -179,7 +228,8 @@
 
  /// Representation of the UART.
  pub struct PL011Uart {
@@ -1931,7 +1935,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_u
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -250,6 +300,14 @@
+@@ -247,6 +297,14 @@
              .LCR_H
              .write(LCR_H::WLEN::EightBit + LCR_H::FEN::FifosEnabled);
 
@@ -1946,7 +1950,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_u
          // Turn the UART on.
          self.registers
              .CR
-@@ -332,9 +390,13 @@
+@@ -335,9 +393,13 @@
      /// # Safety
      ///
      /// - The user must ensure to provide a correct MMIO start address.
@@ -1962,17 +1966,16 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_u
          }
      }
  }
-@@ -354,6 +416,21 @@
+@@ -357,6 +419,20 @@
 
          Ok(())
      }
 +
 +    fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
-+        use bsp::exception::asynchronous::irq_manager;
-+        use exception::asynchronous::{interface::IRQManager, IRQDescriptor};
++        use exception::asynchronous::{irq_manager, IRQDescriptor};
 +
 +        let descriptor = IRQDescriptor {
-+            name: "BCM PL011 UART",
++            name: Self::COMPATIBLE,
 +            handler: self,
 +        };
 +
@@ -1984,10 +1987,10 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_u
  }
 
  impl console::interface::Write for PL011Uart {
-@@ -400,3 +477,24 @@
-         self.inner.lock(|inner| inner.chars_read)
-     }
+@@ -405,3 +481,24 @@
  }
+
+ impl console::interface::All for PL011Uart {}
 +
 +impl exception::asynchronous::interface::IRQHandler for PL011Uart {
 +    fn handle(&self) -> Result<(), &'static str> {
@@ -2047,7 +2050,19 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver.rs 13_exceptions_pa
 diff -uNr 12_integrated_testing/kernel/src/bsp/raspberrypi/driver.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/driver.rs
 --- 12_integrated_testing/kernel/src/bsp/raspberrypi/driver.rs
 +++ 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/driver.rs
-@@ -12,7 +12,7 @@
+@@ -4,29 +4,43 @@
+
+ //! BSP driver support.
+
+-use super::memory::map::mmio;
++use super::{exception, memory::map::mmio};
+ use crate::{bsp::device_driver, driver};
+
++pub use device_driver::IRQNumber;
++
+ //--------------------------------------------------------------------------------------------------
+ // Private Definitions
+ //--------------------------------------------------------------------------------------------------
 
  /// Device Driver Manager type.
  struct BSPDriverManager {
@@ -2056,16 +2071,31 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/raspberrypi/driver.rs 13_exceptio
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -20,7 +20,11 @@
+ // Global instances
  //--------------------------------------------------------------------------------------------------
 
+-pub(super) static PL011_UART: device_driver::PL011Uart =
+-    unsafe { device_driver::PL011Uart::new(mmio::PL011_UART_START) };
++pub(super) static PL011_UART: device_driver::PL011Uart = unsafe {
++    device_driver::PL011Uart::new(
++        mmio::PL011_UART_START,
++        exception::asynchronous::irq_map::PL011_UART,
++    )
++};
+
+ static GPIO: device_driver::GPIO = unsafe { device_driver::GPIO::new(mmio::GPIO_START) };
+
++#[cfg(feature = "bsp_rpi3")]
++pub(super) static INTERRUPT_CONTROLLER: device_driver::InterruptController =
++    unsafe { device_driver::InterruptController::new(mmio::PERIPHERAL_INTERRUPT_CONTROLLER_START) };
++
++#[cfg(feature = "bsp_rpi4")]
++pub(super) static INTERRUPT_CONTROLLER: device_driver::GICv2 =
++    unsafe { device_driver::GICv2::new(mmio::GICD_START, mmio::GICC_START) };
++
  static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
--    device_drivers: [&super::GPIO, &super::PL011_UART],
-+    device_drivers: [
-+        &super::GPIO,
-+        &super::PL011_UART,
-+        &super::INTERRUPT_CONTROLLER,
-+    ],
+-    device_drivers: [&PL011_UART, &GPIO],
++    device_drivers: [&PL011_UART, &GPIO, &INTERRUPT_CONTROLLER],
  };
 
  //--------------------------------------------------------------------------------------------------
@@ -2080,7 +2110,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/raspberrypi/exception/asynchronou
 +
 +//! BSP asynchronous exception handling.
 +
-+use crate::{bsp, exception};
++use crate::{bsp, bsp::driver, exception};
 +
 +//--------------------------------------------------------------------------------------------------
 +// Public Definitions
@@ -2108,7 +2138,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/raspberrypi/exception/asynchronou
 +pub fn irq_manager() -> &'static impl exception::asynchronous::interface::IRQManager<
 +    IRQNumberType = bsp::device_driver::IRQNumber,
 +> {
-+    &super::super::INTERRUPT_CONTROLLER
++    &driver::INTERRUPT_CONTROLLER
 +}
 
 diff -uNr 12_integrated_testing/kernel/src/bsp/raspberrypi/exception.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/exception.rs
@@ -2126,7 +2156,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/raspberrypi/exception.rs 13_excep
 diff -uNr 12_integrated_testing/kernel/src/bsp/raspberrypi/memory.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory.rs
 --- 12_integrated_testing/kernel/src/bsp/raspberrypi/memory.rs
 +++ 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory.rs
-@@ -73,10 +73,12 @@
+@@ -73,10 +73,11 @@
      pub mod mmio {
          use super::*;
 
@@ -2138,12 +2168,11 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/raspberrypi/memory.rs 13_exceptio
 +        pub const PERIPHERAL_INTERRUPT_CONTROLLER_START: usize = START + 0x0000_B200;
 +        pub const GPIO_START:                            usize = START + GPIO_OFFSET;
 +        pub const PL011_UART_START:                      usize = START + UART_OFFSET;
-+        pub const LOCAL_INTERRUPT_CONTROLLER_START:      usize =         0x4000_0000;
 +        pub const END_INCLUSIVE:                         usize =         0x4000_FFFF;
      }
 
      /// Physical devices.
-@@ -87,6 +89,8 @@
+@@ -87,6 +88,8 @@
          pub const START:            usize =         0xFE00_0000;
          pub const GPIO_START:       usize = START + GPIO_OFFSET;
          pub const PL011_UART_START: usize = START + UART_OFFSET;
@@ -2164,34 +2193,6 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/raspberrypi.rs 13_exceptions_part
  pub mod memory;
 
  //--------------------------------------------------------------------------------------------------
-@@ -17,8 +18,25 @@
- static GPIO: device_driver::GPIO =
-     unsafe { device_driver::GPIO::new(memory::map::mmio::GPIO_START) };
-
--static PL011_UART: device_driver::PL011Uart =
--    unsafe { device_driver::PL011Uart::new(memory::map::mmio::PL011_UART_START) };
-+static PL011_UART: device_driver::PL011Uart = unsafe {
-+    device_driver::PL011Uart::new(
-+        memory::map::mmio::PL011_UART_START,
-+        exception::asynchronous::irq_map::PL011_UART,
-+    )
-+};
-+
-+#[cfg(feature = "bsp_rpi3")]
-+static INTERRUPT_CONTROLLER: device_driver::InterruptController = unsafe {
-+    device_driver::InterruptController::new(
-+        memory::map::mmio::LOCAL_INTERRUPT_CONTROLLER_START,
-+        memory::map::mmio::PERIPHERAL_INTERRUPT_CONTROLLER_START,
-+    )
-+};
-+
-+#[cfg(feature = "bsp_rpi4")]
-+static INTERRUPT_CONTROLLER: device_driver::GICv2 = unsafe {
-+    device_driver::GICv2::new(memory::map::mmio::GICD_START, memory::map::mmio::GICC_START)
-+};
-
- //--------------------------------------------------------------------------------------------------
- // Public Code
 
 diff -uNr 12_integrated_testing/kernel/src/cpu/smp.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/cpu/smp.rs
 --- 12_integrated_testing/kernel/src/cpu/smp.rs
@@ -2247,10 +2248,11 @@ diff -uNr 12_integrated_testing/kernel/src/driver.rs 13_exceptions_part2_periphe
 diff -uNr 12_integrated_testing/kernel/src/exception/asynchronous.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.rs
 --- 12_integrated_testing/kernel/src/exception/asynchronous.rs
 +++ 13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.rs
-@@ -8,7 +8,145 @@
+@@ -8,7 +8,153 @@
  #[path = "../_arch/aarch64/exception/asynchronous.rs"]
  mod arch_asynchronous;
 
++use crate::bsp;
 +use core::{fmt, marker::PhantomData};
 +
  //--------------------------------------------------------------------------------------------------
@@ -2394,6 +2396,13 @@ diff -uNr 12_integrated_testing/kernel/src/exception/asynchronous.rs 13_exceptio
 +
 +    ret
 +}
++
++/// Return a reference to the IRQ manager.
++///
++/// This is the IRQ manager used by the architectural interrupt handling code.
++pub fn irq_manager() -> &'static dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber> {
++    bsp::exception::asynchronous::irq_manager()
++}
 
 diff -uNr 12_integrated_testing/kernel/src/lib.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
 --- 12_integrated_testing/kernel/src/lib.rs
@@ -2428,7 +2437,7 @@ diff -uNr 12_integrated_testing/kernel/src/main.rs 13_exceptions_part2_periphera
  #[no_mangle]
  unsafe fn kernel_init() -> ! {
      use driver::interface::DriverManager;
-@@ -43,15 +43,27 @@
+@@ -43,14 +43,27 @@
      bsp::driver::driver_manager().post_device_driver_init();
      // println! is usable from here on.
 
@@ -2451,14 +2460,13 @@ diff -uNr 12_integrated_testing/kernel/src/main.rs 13_exceptions_part2_periphera
 
  /// The main function running after the early init.
  fn kernel_main() -> ! {
--    use bsp::console::console;
--    use console::interface::All;
+-    use console::console;
      use driver::interface::DriverManager;
 +    use exception::asynchronous::interface::IRQManager;
 
      info!("{}", libkernel::version());
      info!("Booting on: {}", bsp::board_name());
-@@ -79,12 +91,9 @@
+@@ -78,12 +91,9 @@
          info!("      {}. {}", i + 1, driver.compatible());
      }
 
@@ -2469,8 +2477,8 @@ diff -uNr 12_integrated_testing/kernel/src/main.rs 13_exceptions_part2_periphera
 -    // Discard any spurious received characters before going into echo mode.
 -    console().clear_rx();
 -    loop {
--        let c = bsp::console::console().read_char();
--        bsp::console::console().write_char(c);
+-        let c = console().read_char();
+-        console().write_char(c);
 -    }
 +    info!("Echoing input now");
 +    cpu::wait_forever();
@@ -2483,12 +2491,12 @@ diff -uNr 12_integrated_testing/kernel/src/panic_wait.rs 13_exceptions_part2_per
 
  //! A panic handler that infinitely waits.
 
--use crate::{bsp, cpu};
-+use crate::{bsp, cpu, exception};
- use core::{fmt, panic::PanicInfo};
+-use crate::{cpu, println};
++use crate::{cpu, exception, println};
+ use core::panic::PanicInfo;
 
  //--------------------------------------------------------------------------------------------------
-@@ -77,6 +77,8 @@
+@@ -61,6 +61,8 @@
  fn panic(info: &PanicInfo) -> ! {
      use crate::time::interface::TimeManager;
 
@@ -2733,7 +2741,7 @@ diff -uNr 12_integrated_testing/kernel/src/synchronization.rs 13_exceptions_part
 diff -uNr 12_integrated_testing/kernel/tests/04_exception_irq_sanity.rs 13_exceptions_part2_peripheral_IRQs/kernel/tests/04_exception_irq_sanity.rs
 --- 12_integrated_testing/kernel/tests/04_exception_irq_sanity.rs
 +++ 13_exceptions_part2_peripheral_IRQs/kernel/tests/04_exception_irq_sanity.rs
-@@ -0,0 +1,66 @@
+@@ -0,0 +1,67 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
@@ -2746,12 +2754,13 @@ diff -uNr 12_integrated_testing/kernel/tests/04_exception_irq_sanity.rs 13_excep
 +#![reexport_test_harness_main = "test_main"]
 +#![test_runner(libkernel::test_runner)]
 +
-+use libkernel::{bsp, cpu, exception};
++use libkernel::{bsp, cpu, driver, exception};
 +use test_macros::kernel_test;
 +
 +#[no_mangle]
 +unsafe fn kernel_init() -> ! {
-+    bsp::console::qemu_bring_up_console();
++    use driver::interface::DriverManager;
++    bsp::driver::driver_manager().qemu_bring_up_console();
 +
 +    exception::handling_init();
 +    exception::asynchronous::local_irq_unmask();
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception.rs
index 662c91b94..fa6748a6d 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::exception::arch_exception
 
-use crate::{bsp, exception};
+use crate::exception;
 use core::{arch::global_asm, cell::UnsafeCell, fmt};
 use cortex_a::{asm::barrier, registers::*};
 use tock_registers::{
@@ -104,10 +104,8 @@ unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
 
 #[no_mangle]
 unsafe extern "C" fn current_elx_irq(_e: &mut ExceptionContext) {
-    use exception::asynchronous::interface::IRQManager;
-
     let token = &exception::asynchronous::IRQContext::new();
-    bsp::exception::asynchronous::irq_manager().handle_pending_irqs(token);
+    exception::asynchronous::irq_manager().handle_pending_irqs(token);
 }
 
 #[no_mangle]
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2.rs
index 09a0cdf40..03c1fa0f3 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2.rs
@@ -114,6 +114,8 @@ impl GICv2 {
     const MAX_IRQ_NUMBER: usize = 300; // Normally 1019, but keep it lower to save some space.
     const NUM_IRQS: usize = Self::MAX_IRQ_NUMBER + 1;
 
+    pub const COMPATIBLE: &'static str = "GICv2 (ARM Generic Interrupt Controller v2)";
+
     /// Create an instance.
     ///
     /// # Safety
@@ -135,7 +137,7 @@ use synchronization::interface::ReadWriteEx;
 
 impl driver::interface::DeviceDriver for GICv2 {
     fn compatible(&self) -> &'static str {
-        "GICv2 (ARM Generic Interrupt Controller v2)"
+        Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index c0dc838a7..b5603b404 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -108,16 +108,13 @@ register_structs! {
 /// Abstraction for the associated MMIO registers.
 type Registers = MMIODerefWrapper<RegisterBlock>;
 
-//--------------------------------------------------------------------------------------------------
-// Public Definitions
-//--------------------------------------------------------------------------------------------------
-
-pub struct GPIOInner {
+struct GPIOInner {
     registers: Registers,
 }
 
-// Export the inner struct so that BSPs can use it for the panic handler.
-pub use GPIOInner as PanicGPIO;
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
 
 /// Representation of the GPIO HW.
 pub struct GPIO {
@@ -125,7 +122,7 @@ pub struct GPIO {
 }
 
 //--------------------------------------------------------------------------------------------------
-// Public Code
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
 impl GPIOInner {
@@ -189,7 +186,13 @@ impl GPIOInner {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
 impl GPIO {
+    pub const COMPATIBLE: &'static str = "BCM GPIO";
+
     /// Create an instance.
     ///
     /// # Safety
@@ -214,6 +217,6 @@ use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for GPIO {
     fn compatible(&self) -> &'static str {
-        "BCM GPIO"
+        Self::COMPATIBLE
     }
 }
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
index 577470d4a..d4acd2757 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -28,6 +28,7 @@ pub type PeripheralIRQ =
 
 /// Used for the associated type of trait [`exception::asynchronous::interface::IRQManager`].
 #[derive(Copy, Clone)]
+#[allow(missing_docs)]
 pub enum IRQNumber {
     Local(LocalIRQ),
     Peripheral(PeripheralIRQ),
@@ -74,12 +75,14 @@ impl InterruptController {
     const MAX_PERIPHERAL_IRQ_NUMBER: usize = 63;
     const NUM_PERIPHERAL_IRQS: usize = Self::MAX_PERIPHERAL_IRQ_NUMBER + 1;
 
+    pub const COMPATIBLE: &'static str = "BCM Interrupt Controller";
+
     /// Create an instance.
     ///
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    pub const unsafe fn new(_local_mmio_start_addr: usize, periph_mmio_start_addr: usize) -> Self {
+    pub const unsafe fn new(periph_mmio_start_addr: usize) -> Self {
         Self {
             periph: peripheral_ic::PeripheralIC::new(periph_mmio_start_addr),
         }
@@ -92,7 +95,7 @@ impl InterruptController {
 
 impl driver::interface::DeviceDriver for InterruptController {
     fn compatible(&self) -> &'static str {
-        "BCM Interrupt Controller"
+        Self::COMPATIBLE
     }
 }
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 4d000ad50..a96ebf7ee 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -216,18 +216,15 @@ enum BlockingMode {
     NonBlocking,
 }
 
-//--------------------------------------------------------------------------------------------------
-// Public Definitions
-//--------------------------------------------------------------------------------------------------
-
-pub struct PL011UartInner {
+struct PL011UartInner {
     registers: Registers,
     chars_written: usize,
     chars_read: usize,
 }
 
-// Export the inner struct so that BSPs can use it for the panic handler.
-pub use PL011UartInner as PanicUart;
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
 
 /// Representation of the UART.
 pub struct PL011Uart {
@@ -236,7 +233,7 @@ pub struct PL011Uart {
 }
 
 //--------------------------------------------------------------------------------------------------
-// Public Code
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
 impl PL011UartInner {
@@ -384,7 +381,13 @@ impl fmt::Write for PL011UartInner {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
 impl PL011Uart {
+    pub const COMPATIBLE: &'static str = "BCM PL011 UART";
+
     /// Create an instance.
     ///
     /// # Safety
@@ -408,7 +411,7 @@ use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for PL011Uart {
     fn compatible(&self) -> &'static str {
-        "BCM PL011 UART"
+        Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
@@ -418,11 +421,10 @@ impl driver::interface::DeviceDriver for PL011Uart {
     }
 
     fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
-        use bsp::exception::asynchronous::irq_manager;
-        use exception::asynchronous::{interface::IRQManager, IRQDescriptor};
+        use exception::asynchronous::{irq_manager, IRQDescriptor};
 
         let descriptor = IRQDescriptor {
-            name: "BCM PL011 UART",
+            name: Self::COMPATIBLE,
             handler: self,
         };
 
@@ -478,6 +480,8 @@ impl console::interface::Statistics for PL011Uart {
     }
 }
 
+impl console::interface::All for PL011Uart {}
+
 impl exception::asynchronous::interface::IRQHandler for PL011Uart {
     fn handle(&self) -> Result<(), &'static str> {
         self.inner.lock(|inner| {
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi.rs
index 97656a27e..50b36762e 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi.rs
@@ -10,34 +10,6 @@ pub mod driver;
 pub mod exception;
 pub mod memory;
 
-//--------------------------------------------------------------------------------------------------
-// Global instances
-//--------------------------------------------------------------------------------------------------
-use super::device_driver;
-
-static GPIO: device_driver::GPIO =
-    unsafe { device_driver::GPIO::new(memory::map::mmio::GPIO_START) };
-
-static PL011_UART: device_driver::PL011Uart = unsafe {
-    device_driver::PL011Uart::new(
-        memory::map::mmio::PL011_UART_START,
-        exception::asynchronous::irq_map::PL011_UART,
-    )
-};
-
-#[cfg(feature = "bsp_rpi3")]
-static INTERRUPT_CONTROLLER: device_driver::InterruptController = unsafe {
-    device_driver::InterruptController::new(
-        memory::map::mmio::LOCAL_INTERRUPT_CONTROLLER_START,
-        memory::map::mmio::PERIPHERAL_INTERRUPT_CONTROLLER_START,
-    )
-};
-
-#[cfg(feature = "bsp_rpi4")]
-static INTERRUPT_CONTROLLER: device_driver::GICv2 = unsafe {
-    device_driver::GICv2::new(memory::map::mmio::GICD_START, memory::map::mmio::GICC_START)
-};
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/console.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/console.rs
index eaef0b1fb..0a630eef4 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/console.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/console.rs
@@ -4,45 +4,13 @@
 
 //! BSP console facilities.
 
-use super::memory;
-use crate::{bsp::device_driver, console};
-use core::fmt;
+use crate::console;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// In case of a panic, the panic handler uses this function to take a last shot at printing
-/// something before the system is halted.
-///
-/// We try to init panic-versions of the GPIO and the UART. The panic versions are not protected
-/// with synchronization primitives, which increases chances that we get to print something, even
-/// when the kernel's default GPIO or UART instances happen to be locked at the time of the panic.
-///
-/// # Safety
-///
-/// - Use only for printing during a panic.
-pub unsafe fn panic_console_out() -> impl fmt::Write {
-    let mut panic_gpio = device_driver::PanicGPIO::new(memory::map::mmio::GPIO_START);
-    let mut panic_uart = device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START);
-
-    panic_gpio.map_pl011_uart();
-    panic_uart.init();
-    panic_uart
-}
-
 /// Return a reference to the console.
-pub fn console() -> &'static impl console::interface::All {
-    &super::PL011_UART
+pub fn console() -> &'static dyn console::interface::All {
+    &super::driver::PL011_UART
 }
-
-//--------------------------------------------------------------------------------------------------
-// Testing
-//--------------------------------------------------------------------------------------------------
-
-/// Minimal code needed to bring up the console in QEMU (for testing only). This is often less steps
-/// than on real hardware due to QEMU's abstractions.
-///
-/// For the RPi, nothing needs to be done.
-#[cfg(feature = "test_build")]
-pub fn qemu_bring_up_console() {}
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/driver.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/driver.rs
index 1cf6d23ce..568f1096d 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/driver.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/driver.rs
@@ -4,7 +4,10 @@
 
 //! BSP driver support.
 
-use crate::driver;
+use super::{exception, memory::map::mmio};
+use crate::{bsp::device_driver, driver};
+
+pub use device_driver::IRQNumber;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -19,12 +22,25 @@ struct BSPDriverManager {
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
+pub(super) static PL011_UART: device_driver::PL011Uart = unsafe {
+    device_driver::PL011Uart::new(
+        mmio::PL011_UART_START,
+        exception::asynchronous::irq_map::PL011_UART,
+    )
+};
+
+static GPIO: device_driver::GPIO = unsafe { device_driver::GPIO::new(mmio::GPIO_START) };
+
+#[cfg(feature = "bsp_rpi3")]
+pub(super) static INTERRUPT_CONTROLLER: device_driver::InterruptController =
+    unsafe { device_driver::InterruptController::new(mmio::PERIPHERAL_INTERRUPT_CONTROLLER_START) };
+
+#[cfg(feature = "bsp_rpi4")]
+pub(super) static INTERRUPT_CONTROLLER: device_driver::GICv2 =
+    unsafe { device_driver::GICv2::new(mmio::GICD_START, mmio::GICC_START) };
+
 static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
-    device_drivers: [
-        &super::GPIO,
-        &super::PL011_UART,
-        &super::INTERRUPT_CONTROLLER,
-    ],
+    device_drivers: [&PL011_UART, &GPIO, &INTERRUPT_CONTROLLER],
 };
 
 //--------------------------------------------------------------------------------------------------
@@ -48,6 +64,9 @@ impl driver::interface::DriverManager for BSPDriverManager {
 
     fn post_device_driver_init(&self) {
         // Configure PL011Uart's output pins.
-        super::GPIO.map_pl011_uart();
+        GPIO.map_pl011_uart();
     }
+
+    #[cfg(feature = "test_build")]
+    fn qemu_bring_up_console(&self) {}
 }
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/exception/asynchronous.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
index dc5ab4215..a13b24447 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
@@ -4,7 +4,7 @@
 
 //! BSP asynchronous exception handling.
 
-use crate::{bsp, exception};
+use crate::{bsp, bsp::driver, exception};
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -32,5 +32,5 @@ pub(in crate::bsp) mod irq_map {
 pub fn irq_manager() -> &'static impl exception::asynchronous::interface::IRQManager<
     IRQNumberType = bsp::device_driver::IRQNumber,
 > {
-    &super::super::INTERRUPT_CONTROLLER
+    &driver::INTERRUPT_CONTROLLER
 }
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory.rs
index 51b334c0e..a383c9fe9 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory.rs
@@ -77,7 +77,6 @@ pub(super) mod map {
         pub const PERIPHERAL_INTERRUPT_CONTROLLER_START: usize = START + 0x0000_B200;
         pub const GPIO_START:                            usize = START + GPIO_OFFSET;
         pub const PL011_UART_START:                      usize = START + UART_OFFSET;
-        pub const LOCAL_INTERRUPT_CONTROLLER_START:      usize =         0x4000_0000;
         pub const END_INCLUSIVE:                         usize =         0x4000_FFFF;
     }
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/console.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/console.rs
index e49e241fe..c1fb0e53b 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/console.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/console.rs
@@ -4,6 +4,8 @@
 
 //! System console.
 
+use crate::bsp;
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -49,5 +51,16 @@ pub mod interface {
     }
 
     /// Trait alias for a full-fledged console.
-    pub trait All = Write + Read + Statistics;
+    pub trait All: Write + Read + Statistics {}
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the console.
+///
+/// This is the global console used by all printing macros.
+pub fn console() -> &'static dyn interface::All {
+    bsp::console::console()
 }
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/driver.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/driver.rs
index 8c5c5e167..c39e5eaf3 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/driver.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/driver.rs
@@ -48,5 +48,10 @@ pub mod interface {
         ///
         /// For example, device driver code that depends on other drivers already being online.
         fn post_device_driver_init(&self);
+
+        /// Minimal code needed to bring up the console in QEMU (for testing only). This is often
+        /// less steps than on real hardware due to QEMU's abstractions.
+        #[cfg(feature = "test_build")]
+        fn qemu_bring_up_console(&self);
     }
 }
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.rs
index fb1785c23..17938692c 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.rs
@@ -8,6 +8,7 @@
 #[path = "../_arch/aarch64/exception/asynchronous.rs"]
 mod arch_asynchronous;
 
+use crate::bsp;
 use core::{fmt, marker::PhantomData};
 
 //--------------------------------------------------------------------------------------------------
@@ -150,3 +151,10 @@ pub fn exec_with_irq_masked<T>(f: impl FnOnce() -> T) -> T {
 
     ret
 }
+
+/// Return a reference to the IRQ manager.
+///
+/// This is the IRQ manager used by the architectural interrupt handling code.
+pub fn irq_manager() -> &'static dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber> {
+    bsp::exception::asynchronous::irq_manager()
+}
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
index 58a939f10..c4b078096 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
@@ -178,8 +178,10 @@ pub fn test_runner(tests: &[&test_types::UnitTest]) {
 #[cfg(test)]
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
     exception::handling_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     test_main();
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/panic_wait.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/panic_wait.rs
index 08d7d4533..e4256b616 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/panic_wait.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/panic_wait.rs
@@ -4,19 +4,13 @@
 
 //! A panic handler that infinitely waits.
 
-use crate::{bsp, cpu, exception};
-use core::{fmt, panic::PanicInfo};
+use crate::{cpu, exception, println};
+use core::panic::PanicInfo;
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-fn _panic_print(args: fmt::Arguments) {
-    use fmt::Write;
-
-    unsafe { bsp::console::panic_console_out().write_fmt(args).unwrap() };
-}
-
 /// The point of exit for `libkernel`.
 ///
 /// It is linked weakly, so that the integration tests can overload its standard behavior.
@@ -34,16 +28,6 @@ fn _panic_exit() -> ! {
     }
 }
 
-/// Prints with a newline - only use from the panic handler.
-///
-/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
-#[macro_export]
-macro_rules! panic_println {
-    ($($arg:tt)*) => ({
-        _panic_print(format_args_nl!($($arg)*));
-    })
-}
-
 /// Stop immediately if called a second time.
 ///
 /// # Note
@@ -88,7 +72,7 @@ fn panic(info: &PanicInfo) -> ! {
         _ => ("???", 0, 0),
     };
 
-    panic_println!(
+    println!(
         "[  {:>3}.{:06}] Kernel panic!\n\n\
         Panic location:\n      File '{}', line {}, column {}\n\n\
         {}",
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/print.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/print.rs
index 9ec13a286..8705eec0d 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/print.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/print.rs
@@ -4,7 +4,7 @@
 
 //! Printing.
 
-use crate::{bsp, console};
+use crate::console;
 use core::fmt;
 
 //--------------------------------------------------------------------------------------------------
@@ -13,9 +13,7 @@ use core::fmt;
 
 #[doc(hidden)]
 pub fn _print(args: fmt::Arguments) {
-    use console::interface::Write;
-
-    bsp::console::console().write_fmt(args).unwrap();
+    console::console().write_fmt(args).unwrap();
 }
 
 /// Prints without a newline.
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/tests/00_console_sanity.rs b/13_exceptions_part2_peripheral_IRQs/kernel/tests/00_console_sanity.rs
index dccb6cc2a..e12a711f7 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/tests/00_console_sanity.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/tests/00_console_sanity.rs
@@ -11,15 +11,15 @@
 /// Console tests should time out on the I/O harness in case of panic.
 mod panic_wait_forever;
 
-use libkernel::{bsp, console, cpu, exception, print};
+use libkernel::{bsp, console, cpu, driver, exception, print};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use bsp::console::console;
-    use console::interface::*;
+    use console::console;
+    use driver::interface::DriverManager;
 
     exception::handling_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     // Handshake
     assert_eq!(console().read_char(), 'A');
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/tests/01_timer_sanity.rs b/13_exceptions_part2_peripheral_IRQs/kernel/tests/01_timer_sanity.rs
index 59ef4a7f7..390cdee53 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/tests/01_timer_sanity.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/tests/01_timer_sanity.rs
@@ -11,13 +11,15 @@
 #![test_runner(libkernel::test_runner)]
 
 use core::time::Duration;
-use libkernel::{bsp, cpu, exception, time, time::interface::TimeManager};
+use libkernel::{bsp, cpu, driver, exception, time, time::interface::TimeManager};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
     exception::handling_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/tests/02_exception_sync_page_fault.rs b/13_exceptions_part2_peripheral_IRQs/kernel/tests/02_exception_sync_page_fault.rs
index 9be94acde..62908377a 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/tests/02_exception_sync_page_fault.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/tests/02_exception_sync_page_fault.rs
@@ -17,14 +17,15 @@
 /// or indirectly.
 mod panic_exit_success;
 
-use libkernel::{bsp, cpu, exception, info, memory, println};
+use libkernel::{bsp, cpu, driver, exception, info, memory, println};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
     use memory::mmu::interface::MMU;
 
     exception::handling_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     // This line will be printed as the test header.
     println!("Testing synchronous exception handling by causing a page fault");
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/tests/03_exception_restore_sanity.rs b/13_exceptions_part2_peripheral_IRQs/kernel/tests/03_exception_restore_sanity.rs
index f25ed6453..3f4eae79a 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/tests/03_exception_restore_sanity.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/tests/03_exception_restore_sanity.rs
@@ -12,7 +12,7 @@
 mod panic_wait_forever;
 
 use core::arch::asm;
-use libkernel::{bsp, cpu, exception, info, memory, println};
+use libkernel::{bsp, cpu, driver, exception, info, memory, println};
 
 #[inline(never)]
 fn nested_system_call() {
@@ -30,10 +30,11 @@ fn nested_system_call() {
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
     use memory::mmu::interface::MMU;
 
     exception::handling_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     // This line will be printed as the test header.
     println!("Testing exception restore");
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/tests/04_exception_irq_sanity.rs b/13_exceptions_part2_peripheral_IRQs/kernel/tests/04_exception_irq_sanity.rs
index e1e025548..1204dca46 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/tests/04_exception_irq_sanity.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/tests/04_exception_irq_sanity.rs
@@ -10,12 +10,13 @@
 #![reexport_test_harness_main = "test_main"]
 #![test_runner(libkernel::test_runner)]
 
-use libkernel::{bsp, cpu, exception};
+use libkernel::{bsp, cpu, driver, exception};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    bsp::console::qemu_bring_up_console();
+    use driver::interface::DriverManager;
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     exception::handling_init();
     exception::asynchronous::local_irq_unmask();
diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index 5d78e2378..b5caac520 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -8,8 +8,7 @@
   whole of the board's address space.
 - Instead, only ranges that are actually needed are mapped:
     - The `kernel binary` stays `identity mapped` for now.
-    - Device `MMIO regions` are remapped lazily (to a special reserved virtual address region)
-      during the device driver's `init()`.
+    - Device `MMIO regions` are remapped lazily (to a special reserved virtual address region).
 
 ## Table of Contents
 
@@ -59,7 +58,8 @@ separation, this tutorial makes a start by changing the following things:
    parts that are needed will be mapped.
 1. For now, the `kernel binary` stays identity mapped. This will be changed in the coming tutorials
    as it is a quite difficult and peculiar exercise to remap the kernel.
-1. Device `MMIO regions` are lazily remapped during a device driver's `init()`.
+1. Device `MMIO regions` are lazily remapped during device driver bringup (using the new
+   `DriverManage` function `instantiate_drivers()`).
    1. A dedicated region of virtual addresses that we reserve using `BSP` code and the `linker
       script` is used for this.
 1. We keep using `TTBR0` for the kernel translation tables for now. This will be changed when we
@@ -232,43 +232,111 @@ pub unsafe fn kernel_map_binary() -> Result<(), &'static str> {
 }
 ```
 
-Another user of the new APIs are device drivers, which now expect an `MMIODescriptor` type instead
-of a raw address. The following is an example for the `UART`:
+Another user of the new APIs is the **driver subsystem**. As has been said in the introduction, the
+goal is to remap the `MMIO` regions of the drivers. To achieve this in a seamless way, some changes
+to the architecture of the driver subsystem were needed.
+
+Until now, the drivers were `static instances` which had their `MMIO addresses` statically set in
+the constructor. This was fine, because even if virtual memory was activated, only `identity
+mapping` was used, so the hardcoded addresses would be valid with and without the MMU being active.
+
+With `remapped MMIO addresses`, this is not possible anymore, since the remapping will only happen
+at runtime. Therefore, the new approach is to defer the whole instantiation of the drivers until the
+remapped addresses are known. To achieve this, in `src/bsp/raspberrypi/drivers.rs`, the static
+driver instances are now wrapped into a `MaybeUninit` (and are also `mut` now):
 
 ```rust
-impl PL011Uart {
-    /// Create an instance.
-    pub const unsafe fn new(
-        mmio_descriptor: memory::mmu::MMIODescriptor,
-        irq_number: bsp::device_driver::IRQNumber,
-    ) -> Self {
-        Self {
-             // omitted for brevity.
-        }
+static mut PL011_UART: MaybeUninit<device_driver::PL011Uart> = MaybeUninit::uninit();
+static mut GPIO: MaybeUninit<device_driver::GPIO> = MaybeUninit::uninit();
+
+#[cfg(feature = "bsp_rpi3")]
+static mut INTERRUPT_CONTROLLER: MaybeUninit<device_driver::InterruptController> =
+    MaybeUninit::uninit();
+
+#[cfg(feature = "bsp_rpi4")]
+static mut INTERRUPT_CONTROLLER: MaybeUninit<device_driver::GICv2> = MaybeUninit::uninit();
+```
+
+`BSPDriverManager` implements the new `instantiate_drivers()` interface function, which will be
+called early during `kernel_init()`, short after virtual memory has been activated:
+
+```rust
+unsafe fn instantiate_drivers(&self) -> Result<(), &'static str> {
+    if self.init_done.load(Ordering::Relaxed) {
+        return Err("Drivers already instantiated");
     }
+
+    self.instantiate_uart()?;
+    self.instantiate_gpio()?;
+    self.instantiate_interrupt_controller()?;
+
+    self.register_drivers();
+
+    self.init_done.store(true, Ordering::Relaxed);
+    Ok(())
 }
 ```
 
-When the kernel calls the driver's implementation of `driver::interface::DeviceDriver::init()`
-during kernel boot, the MMIO Descriptor is used to remap the MMIO region on demand:
+As can be seen, for each driver, this `BSP` code calls a dedicated instantiation function. In this
+tutorial text, only the `UART` will be discussed in detail:
 
 ```rust
-unsafe fn init(&self) -> Result<(), &'static str> {
-    let virt_addr = memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?;
-
-    self.inner
-        .lock(|inner| inner.init(Some(virt_addr.as_usize())))?;
+unsafe fn instantiate_uart(&self) -> Result<(), &'static str> {
+    let mmio_descriptor = MMIODescriptor::new(mmio::PL011_UART_START, mmio::PL011_UART_SIZE);
+    let virt_addr =
+        memory::mmu::kernel_map_mmio(device_driver::PL011Uart::COMPATIBLE, &mmio_descriptor)?;
+
+    // This is safe to do, because it is only called from the init'ed instance itself.
+    fn uart_post_init() {
+        console::register_console(unsafe { PL011_UART.assume_init_ref() });
+    }
 
-     // omitted for brevity.
+    PL011_UART.write(device_driver::PL011Uart::new(
+        virt_addr,
+        exception::asynchronous::irq_map::PL011_UART,
+        uart_post_init,
+    ));
 
     Ok(())
 }
 ```
 
+A couple of things are happening here. First, an `MMIODescriptor` is created and then used to remap
+the MMIO region using `memory::mmu::kernel_map_mmio()`. This function will be discussed in detail in
+the next chapter. What's important for now is that it returns the new `Virtual Address` of the
+remapped MMIO region. The constructor of the `UART` driver now also expects a virtual address.
+
+Next, a new instance of the `PL011Uart` driver is created, and written into the `PL011_UART` global
+variable (remember, it is defined as `MaybeUninit<device_driver::PL011Uart> =
+MaybeUninit::uninit()`). Meaning, after this line of code, `PL011_UART` is properly initialized.
+
+Another new feature is the function `uart_post_init()`, which is supplied to the UART constructor.
+This is a callback that will be called by the UART driver when it concludes its `init()` function
+(remember that the driver's init functions are called from `kernel_init()`). This callback, in turn,
+registers the `PL011_UART` as the new console of the kernel.
+
+A look into `src/console.rs` should make clear what is happening. The classic `console::console()`
+now dynamically points to whoever registered itself using the `console::register_console()`
+function, instead of using a hardcoded static reference (from the `BSP`). This has been introduced
+to accommodate the run-time instantiation of the device drivers (the same feature has been
+implemented for the `IRQManager` as well). Until `console::register_console()` has been called for
+the first time, an instance of the newly introduced `NullConsole` is used as the default.
+`NullConsole` implements all the console traits, but does nothing. It discards outputs, and returns
+dummy input. For example, should one of the printing macros be called before the UART driver has
+been instantiated and registered, the kernel does not need to crash because the driver is not
+brought up yet. Instead, it can just discards the output. With this new scheme of things, it is
+possible to safely switch global references like the UART or the IRQ Manager at runtime.
+
+That all the post-driver-init work has now been moved to callbacks is motivated by the idea that
+this fully enables a driver once it has concluded its `init()` function, and not only after all the
+drivers have been init'ed and then the post-init code would be called, as earlier. In our example,
+printing through the UART will now be available already before the interrupt controller driver runs
+its init function.
+
 ### MMIO Virtual Address Allocation
 
-Peeking inside `memory::mmu::kernel_map_mmio()`, we can see that a `virtual address region` is
-obtained from an `allocator` before remapping:
+Getting back to the remapping part, let's peek inside `memory::mmu::kernel_map_mmio()`. We can see
+that a `virtual address region` is obtained from an `allocator` before remapping:
 
 ```rust
 pub unsafe fn kernel_map_mmio(
@@ -296,7 +364,7 @@ pub unsafe fn kernel_map_mmio(
 }
 ```
 
-This allocator is defined and implemented in the added file `src/memory/mmu/paeg_alloc.rs`. Like
+This allocator is defined and implemented in the added file `src/memory/mmu/page_alloc.rs`. Like
 other parts of the mapping code, its implementation makes use of the newly introduced
 `PageAddress<ATYPE>` and `MemoryRegion<ATYPE>` types (in
 [`src/memory/mmu/types.rs`](kernel/src/memory/mmu/types.rs)), but apart from that is rather straight
@@ -339,13 +407,13 @@ the VA range.
 
 ### Supporting Changes
 
-There's a couple of changes not covered in this tutorial text, but the reader should ideally skim
-through them:
+There's a couple of changes more not covered in this tutorial text, but the reader should ideally
+skim through them:
 
 - [`src/memory.rs`](kernel/src/memory.rs) and
-  [`src/memory/mmu/types.rs`](kernel/src/memory/mmu/types.rs) introduce a couple of supporting
-  types, like`Address<ATYPE>`, `PageAddress<ATYPE>` and `MemoryRegion<ATYPE>`. It is worth reading
-  their implementations.
+  [`src/memory/mmu/types.rs`](kernel/src/memory/mmu/types.rs) introduce supporting types,
+  like`Address<ATYPE>`, `PageAddress<ATYPE>` and `MemoryRegion<ATYPE>`. It is worth reading their
+  implementations.
 - [`src/memory/mmu/mapping_record.rs`](kernel/src/memory/mmu/mapping_record.rs) provides the generic
   kernel code's way of tracking previous memory mappings for use cases such as reusing existing
   mappings (in case of drivers that have their MMIO ranges in the same `64 KiB` page) or printing
@@ -375,22 +443,22 @@ Minipush 1.0
            Raspberry Pi 3
 
 [ML] Requesting binary
-[MP] ⏩ Pushing 67 KiB =========================================🦀 100% 0 KiB/s Time: 00:00:00
+[MP] ⏩ Pushing 65 KiB =========================================🦀 100% 0 KiB/s Time: 00:00:00
 [ML] Loaded! Executing the payload now
 
-[    0.758253] mingo version 0.14.0
-[    0.758460] Booting on: Raspberry Pi 3
-[    0.758915] MMU online:
-[    0.759208]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    0.760952]                         Virtual                                   Physical               Size       Attr                    Entity
-[    0.762696]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    0.764441]       0x0000_0000_0000_0000..0x0000_0000_0007_ffff --> 0x00_0000_0000..0x00_0007_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
-[    0.766044]       0x0000_0000_0008_0000..0x0000_0000_0008_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
-[    0.767658]       0x0000_0000_0009_0000..0x0000_0000_000d_ffff --> 0x00_0009_0000..0x00_000d_ffff | 320 KiB | C   RW XN | Kernel data and bss
-[    0.769229]       0x0000_0000_000e_0000..0x0000_0000_000e_ffff --> 0x00_3f20_0000..0x00_3f20_ffff |  64 KiB | Dev RW XN | BCM GPIO
-[    0.770680]                                                                                                             | BCM PL011 UART
-[    0.772197]       0x0000_0000_000f_0000..0x0000_0000_000f_ffff --> 0x00_3f00_0000..0x00_3f00_ffff |  64 KiB | Dev RW XN | BCM Peripheral Interrupt Controller
-[    0.773941]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    0.740694] mingo version 0.14.0
+[    0.740902] Booting on: Raspberry Pi 3
+[    0.741357] MMU online:
+[    0.741649]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    0.743393]                         Virtual                                   Physical               Size       Attr                    Entity
+[    0.745138]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    0.746883]       0x0000_0000_0000_0000..0x0000_0000_0007_ffff --> 0x00_0000_0000..0x00_0007_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
+[    0.748486]       0x0000_0000_0008_0000..0x0000_0000_0008_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
+[    0.750099]       0x0000_0000_0009_0000..0x0000_0000_000e_ffff --> 0x00_0009_0000..0x00_000e_ffff | 384 KiB | C   RW XN | Kernel data and bss
+[    0.751670]       0x0000_0000_000f_0000..0x0000_0000_000f_ffff --> 0x00_3f20_0000..0x00_3f20_ffff |  64 KiB | Dev RW XN | BCM PL011 UART
+[    0.753187]                                                                                                             | BCM GPIO
+[    0.754638]       0x0000_0000_0010_0000..0x0000_0000_0010_ffff --> 0x00_3f00_0000..0x00_3f00_ffff |  64 KiB | Dev RW XN | BCM Interrupt Controller
+[    0.756264]       -------------------------------------------------------------------------------------------------------------------------------------------
 ```
 
 Raspberry Pi 4:
@@ -412,24 +480,23 @@ Minipush 1.0
            Raspberry Pi 4
 
 [ML] Requesting binary
-[MP] ⏩ Pushing 74 KiB =========================================🦀 100% 0 KiB/s Time: 00:00:00
+[MP] ⏩ Pushing 65 KiB =========================================🦀 100% 0 KiB/s Time: 00:00:00
 [ML] Loaded! Executing the payload now
 
-[    0.842275] mingo version 0.14.0
-[    0.842308] Booting on: Raspberry Pi 4
-[    0.842763] MMU online:
-[    0.843055]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    0.844800]                         Virtual                                   Physical               Size       Attr                    Entity
-[    0.846544]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    0.848288]       0x0000_0000_0000_0000..0x0000_0000_0007_ffff --> 0x00_0000_0000..0x00_0007_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
-[    0.849892]       0x0000_0000_0008_0000..0x0000_0000_0008_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
-[    0.851505]       0x0000_0000_0009_0000..0x0000_0000_000d_ffff --> 0x00_0009_0000..0x00_000d_ffff | 320 KiB | C   RW XN | Kernel data and bss
-[    0.853076]       0x0000_0000_000e_0000..0x0000_0000_000e_ffff --> 0x00_fe20_0000..0x00_fe20_ffff |  64 KiB | Dev RW XN | BCM GPIO
-[    0.854528]                                                                                                             | BCM PL011 UART
-[    0.856045]       0x0000_0000_000f_0000..0x0000_0000_000f_ffff --> 0x00_ff84_0000..0x00_ff84_ffff |  64 KiB | Dev RW XN | GICD
-[    0.857453]                                                                                                             | GICC
-[    0.858862]       -------------------------------------------------------------------------------------------------------------------------------------------
-
+[    0.736136] mingo version 0.14.0
+[    0.736170] Booting on: Raspberry Pi 4
+[    0.736625] MMU online:
+[    0.736918]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    0.738662]                         Virtual                                   Physical               Size       Attr                    Entity
+[    0.740406]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    0.742151]       0x0000_0000_0000_0000..0x0000_0000_0007_ffff --> 0x00_0000_0000..0x00_0007_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
+[    0.743754]       0x0000_0000_0008_0000..0x0000_0000_0008_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
+[    0.745368]       0x0000_0000_0009_0000..0x0000_0000_000d_ffff --> 0x00_0009_0000..0x00_000d_ffff | 320 KiB | C   RW XN | Kernel data and bss
+[    0.746938]       0x0000_0000_000e_0000..0x0000_0000_000e_ffff --> 0x00_fe20_0000..0x00_fe20_ffff |  64 KiB | Dev RW XN | BCM PL011 UART
+[    0.748455]                                                                                                             | BCM GPIO
+[    0.749907]       0x0000_0000_000f_0000..0x0000_0000_000f_ffff --> 0x00_ff84_0000..0x00_ff84_ffff |  64 KiB | Dev RW XN | GICv2 GICD
+[    0.751380]                                                                                                             | GICV2 GICC
+[    0.752853]       -------------------------------------------------------------------------------------------------------------------------------------------
 ```
 
 ## Diff to previous
@@ -807,455 +874,235 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/memory/mm
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
-@@ -4,7 +4,9 @@
+@@ -4,7 +4,11 @@
 
  //! GICC Driver - GIC CPU interface.
 
 -use crate::{bsp::device_driver::common::MMIODerefWrapper, exception};
 +use crate::{
-+    bsp::device_driver::common::MMIODerefWrapper, exception, synchronization::InitStateLock,
++    bsp::device_driver::common::MMIODerefWrapper,
++    exception,
++    memory::{Address, Virtual},
 +};
  use tock_registers::{
      interfaces::{Readable, Writeable},
      register_bitfields, register_structs,
-@@ -60,12 +62,13 @@
-
- /// Representation of the GIC CPU interface.
- pub struct GICC {
--    registers: Registers,
-+    registers: InitStateLock<Registers>,
- }
-
- //--------------------------------------------------------------------------------------------------
- // Public Code
- //--------------------------------------------------------------------------------------------------
-+use crate::synchronization::interface::ReadWriteEx;
-
- impl GICC {
-     /// Create an instance.
-@@ -75,10 +78,15 @@
+@@ -73,7 +77,7 @@
+     /// # Safety
+     ///
      /// - The user must ensure to provide a correct MMIO start address.
-     pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+-    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
++    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
          Self {
--            registers: Registers::new(mmio_start_addr),
-+            registers: InitStateLock::new(Registers::new(mmio_start_addr)),
+             registers: Registers::new(mmio_start_addr),
          }
-     }
-
-+    pub unsafe fn set_mmio(&self, new_mmio_start_addr: usize) {
-+        self.registers
-+            .write(|regs| *regs = Registers::new(new_mmio_start_addr));
-+    }
-+
-     /// Accept interrupts of any priority.
-     ///
-     /// Quoting the GICv2 Architecture Specification:
-@@ -91,7 +99,9 @@
-     /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
-     ///   of `&mut self`.
-     pub fn priority_accept_all(&self) {
--        self.registers.PMR.write(PMR::Priority.val(255)); // Comment in arch spec.
-+        self.registers.read(|regs| {
-+            regs.PMR.write(PMR::Priority.val(255)); // Comment in arch spec.
-+        });
-     }
-
-     /// Enable the interface - start accepting IRQs.
-@@ -101,7 +111,9 @@
-     /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
-     ///   of `&mut self`.
-     pub fn enable(&self) {
--        self.registers.CTLR.write(CTLR::Enable::SET);
-+        self.registers.read(|regs| {
-+            regs.CTLR.write(CTLR::Enable::SET);
-+        });
-     }
-
-     /// Extract the number of the highest-priority pending IRQ.
-@@ -117,7 +129,8 @@
-         &self,
-         _ic: &exception::asynchronous::IRQContext<'irq_context>,
-     ) -> usize {
--        self.registers.IAR.read(IAR::InterruptID) as usize
-+        self.registers
-+            .read(|regs| regs.IAR.read(IAR::InterruptID) as usize)
-     }
-
-     /// Complete handling of the currently active IRQ.
-@@ -136,6 +149,8 @@
-         irq_number: u32,
-         _ic: &exception::asynchronous::IRQContext<'irq_context>,
-     ) {
--        self.registers.EOIR.write(EOIR::EOIINTID.val(irq_number));
-+        self.registers.read(|regs| {
-+            regs.EOIR.write(EOIR::EOIINTID.val(irq_number));
-+        });
-     }
- }
 
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
-@@ -8,8 +8,9 @@
+@@ -8,7 +8,9 @@
  //!   - SPI - Shared Peripheral Interrupt.
 
  use crate::{
 -    bsp::device_driver::common::MMIODerefWrapper, state, synchronization,
--    synchronization::IRQSafeNullLock,
 +    bsp::device_driver::common::MMIODerefWrapper,
++    memory::{Address, Virtual},
 +    state, synchronization,
-+    synchronization::{IRQSafeNullLock, InitStateLock},
+     synchronization::IRQSafeNullLock,
  };
  use tock_registers::{
-     interfaces::{Readable, Writeable},
-@@ -83,7 +84,7 @@
-     shared_registers: IRQSafeNullLock<SharedRegisters>,
-
-     /// Access to banked registers is unguarded.
--    banked_registers: BankedRegisters,
-+    banked_registers: InitStateLock<BankedRegisters>,
- }
-
- //--------------------------------------------------------------------------------------------------
-@@ -120,6 +121,7 @@
- //--------------------------------------------------------------------------------------------------
- // Public Code
- //--------------------------------------------------------------------------------------------------
-+use crate::synchronization::interface::ReadWriteEx;
- use synchronization::interface::Mutex;
-
- impl GICD {
-@@ -131,10 +133,17 @@
-     pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+@@ -128,7 +130,7 @@
+     /// # Safety
+     ///
+     /// - The user must ensure to provide a correct MMIO start address.
+-    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
++    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
          Self {
              shared_registers: IRQSafeNullLock::new(SharedRegisters::new(mmio_start_addr)),
--            banked_registers: BankedRegisters::new(mmio_start_addr),
-+            banked_registers: InitStateLock::new(BankedRegisters::new(mmio_start_addr)),
-         }
-     }
-
-+    pub unsafe fn set_mmio(&self, new_mmio_start_addr: usize) {
-+        self.shared_registers
-+            .lock(|regs| *regs = SharedRegisters::new(new_mmio_start_addr));
-+        self.banked_registers
-+            .write(|regs| *regs = BankedRegisters::new(new_mmio_start_addr));
-+    }
-+
-     /// Use a banked ITARGETSR to retrieve the executing core's GIC target mask.
-     ///
-     /// Quoting the GICv2 Architecture Specification:
-@@ -142,7 +151,8 @@
-     ///   "GICD_ITARGETSR0 to GICD_ITARGETSR7 are read-only, and each field returns a value that
-     ///    corresponds only to the processor reading the register."
-     fn local_gic_target_mask(&self) -> u32 {
--        self.banked_registers.ITARGETSR[0].read(ITARGETSR::Offset0)
-+        self.banked_registers
-+            .read(|regs| regs.ITARGETSR[0].read(ITARGETSR::Offset0))
-     }
-
-     /// Route all SPIs to the boot core and enable the distributor.
-@@ -181,10 +191,10 @@
-         // Check if we are handling a private or shared IRQ.
-         match irq_num {
-             // Private.
--            0..=31 => {
--                let enable_reg = &self.banked_registers.ISENABLER;
-+            0..=31 => self.banked_registers.read(|regs| {
-+                let enable_reg = &regs.ISENABLER;
-                 enable_reg.set(enable_reg.get() | enable_bit);
--            }
-+            }),
-             // Shared.
-             _ => {
-                 let enable_reg_index_shared = enable_reg_index - 1;
+             banked_registers: BankedRegisters::new(mmio_start_addr),
 
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2.rs 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2.rs
-@@ -79,7 +79,8 @@
+@@ -79,7 +79,12 @@
  mod gicc;
  mod gicd;
 
 -use crate::{bsp, cpu, driver, exception, synchronization, synchronization::InitStateLock};
-+use crate::{bsp, cpu, driver, exception, memory, synchronization, synchronization::InitStateLock};
-+use core::sync::atomic::{AtomicBool, Ordering};
++use crate::{
++    bsp, cpu, driver, exception,
++    memory::{Address, Virtual},
++    synchronization,
++    synchronization::InitStateLock,
++};
 
  //--------------------------------------------------------------------------------------------------
  // Private Definitions
-@@ -96,12 +97,18 @@
+@@ -104,6 +109,9 @@
 
- /// Representation of the GIC.
- pub struct GICv2 {
-+    gicd_mmio_descriptor: memory::mmu::MMIODescriptor,
-+    gicc_mmio_descriptor: memory::mmu::MMIODescriptor,
-+
-     /// The Distributor.
-     gicd: gicd::GICD,
-
-     /// The CPU Interface.
-     gicc: gicc::GICC,
-
-+    /// Have the MMIO regions been remapped yet?
-+    is_mmio_remapped: AtomicBool,
-+
      /// Stores registered IRQ handlers. Writable only during kernel init. RO afterwards.
      handler_table: InitStateLock<HandlerTable>,
++
++    /// Callback to be invoked after successful init.
++    post_init_callback: fn(),
  }
-@@ -118,11 +125,17 @@
-     ///
+
+ //--------------------------------------------------------------------------------------------------
+@@ -121,11 +129,16 @@
      /// # Safety
      ///
--    /// - The user must ensure to provide a correct MMIO start address.
+     /// - The user must ensure to provide a correct MMIO start address.
 -    pub const unsafe fn new(gicd_mmio_start_addr: usize, gicc_mmio_start_addr: usize) -> Self {
-+    /// - The user must ensure to provide correct MMIO descriptors.
 +    pub const unsafe fn new(
-+        gicd_mmio_descriptor: memory::mmu::MMIODescriptor,
-+        gicc_mmio_descriptor: memory::mmu::MMIODescriptor,
++        gicd_mmio_start_addr: Address<Virtual>,
++        gicc_mmio_start_addr: Address<Virtual>,
++        post_init_callback: fn(),
 +    ) -> Self {
          Self {
--            gicd: gicd::GICD::new(gicd_mmio_start_addr),
--            gicc: gicc::GICC::new(gicc_mmio_start_addr),
-+            gicd_mmio_descriptor,
-+            gicc_mmio_descriptor,
-+            gicd: gicd::GICD::new(gicd_mmio_descriptor.start_addr().as_usize()),
-+            gicc: gicc::GICC::new(gicc_mmio_descriptor.start_addr().as_usize()),
-+            is_mmio_remapped: AtomicBool::new(false),
+             gicd: gicd::GICD::new(gicd_mmio_start_addr),
+             gicc: gicc::GICC::new(gicc_mmio_start_addr),
              handler_table: InitStateLock::new([None; Self::NUM_IRQS]),
++            post_init_callback,
          }
      }
-@@ -139,6 +152,20 @@
-     }
+ }
+@@ -148,6 +161,8 @@
+         self.gicc.priority_accept_all();
+         self.gicc.enable();
 
-     unsafe fn init(&self) -> Result<(), &'static str> {
-+        let remapped = self.is_mmio_remapped.load(Ordering::Relaxed);
-+        if !remapped {
-+            // GICD
-+            let mut virt_addr = memory::mmu::kernel_map_mmio("GICD", &self.gicd_mmio_descriptor)?;
-+            self.gicd.set_mmio(virt_addr.as_usize());
-+
-+            // GICC
-+            virt_addr = memory::mmu::kernel_map_mmio("GICC", &self.gicc_mmio_descriptor)?;
-+            self.gicc.set_mmio(virt_addr.as_usize());
-+
-+            // Conclude remapping.
-+            self.is_mmio_remapped.store(true, Ordering::Relaxed);
-+        }
++        (self.post_init_callback)();
 +
-         if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
-             self.gicd.boot_core_init();
-         }
+         Ok(())
+     }
+ }
 
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
-@@ -5,9 +5,10 @@
+@@ -5,7 +5,10 @@
  //! GPIO Driver.
 
  use crate::{
 -    bsp::device_driver::common::MMIODerefWrapper, driver, synchronization,
-+    bsp::device_driver::common::MMIODerefWrapper, driver, memory, synchronization,
++    bsp::device_driver::common::MMIODerefWrapper,
++    driver,
++    memory::{Address, Virtual},
++    synchronization,
      synchronization::IRQSafeNullLock,
  };
-+use core::sync::atomic::{AtomicUsize, Ordering};
  use tock_registers::{
-     interfaces::{ReadWriteable, Writeable},
-     register_bitfields, register_structs,
-@@ -121,6 +122,8 @@
-
+@@ -119,6 +122,7 @@
  /// Representation of the GPIO HW.
  pub struct GPIO {
-+    mmio_descriptor: memory::mmu::MMIODescriptor,
-+    virt_mmio_start_addr: AtomicUsize,
      inner: IRQSafeNullLock<GPIOInner>,
++    post_init_callback: fn(),
  }
 
-@@ -140,6 +143,19 @@
-         }
-     }
-
-+    /// Init code.
-+    ///
-+    /// # Safety
-+    ///
-+    /// - The user must ensure to provide a correct MMIO start address.
-+    pub unsafe fn init(&mut self, new_mmio_start_addr: Option<usize>) -> Result<(), &'static str> {
-+        if let Some(addr) = new_mmio_start_addr {
-+            self.registers = Registers::new(addr);
-+        }
-+
-+        Ok(())
-+    }
-+
-     /// Disable pull-up/down on pins 14 and 15.
-     #[cfg(feature = "bsp_rpi3")]
-     fn disable_pud_14_15_bcm2837(&mut self) {
-@@ -194,10 +210,12 @@
+ //--------------------------------------------------------------------------------------------------
+@@ -131,7 +135,7 @@
+     /// # Safety
      ///
+     /// - The user must ensure to provide a correct MMIO start address.
+-    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
++    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
+         Self {
+             registers: Registers::new(mmio_start_addr),
+         }
+@@ -198,9 +202,10 @@
      /// # Safety
      ///
--    /// - The user must ensure to provide a correct MMIO start address.
+     /// - The user must ensure to provide a correct MMIO start address.
 -    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
-+    /// - The user must ensure to provide correct MMIO descriptors.
-+    pub const unsafe fn new(mmio_descriptor: memory::mmu::MMIODescriptor) -> Self {
++    pub const unsafe fn new(mmio_start_addr: Address<Virtual>, post_init_callback: fn()) -> Self {
          Self {
--            inner: IRQSafeNullLock::new(GPIOInner::new(mmio_start_addr)),
-+            mmio_descriptor,
-+            virt_mmio_start_addr: AtomicUsize::new(0),
-+            inner: IRQSafeNullLock::new(GPIOInner::new(mmio_descriptor.start_addr().as_usize())),
+             inner: IRQSafeNullLock::new(GPIOInner::new(mmio_start_addr)),
++            post_init_callback,
          }
      }
 
-@@ -216,4 +234,26 @@
+@@ -219,4 +224,10 @@
      fn compatible(&self) -> &'static str {
-         "BCM GPIO"
+         Self::COMPATIBLE
      }
 +
 +    unsafe fn init(&self) -> Result<(), &'static str> {
-+        let virt_addr = memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?;
-+
-+        self.inner
-+            .lock(|inner| inner.init(Some(virt_addr.as_usize())))?;
-+
-+        self.virt_mmio_start_addr
-+            .store(virt_addr.as_usize(), Ordering::Relaxed);
++        (self.post_init_callback)();
 +
 +        Ok(())
-+    }
-+
-+    fn virt_mmio_start_addr(&self) -> Option<usize> {
-+        let addr = self.virt_mmio_start_addr.load(Ordering::Relaxed);
-+
-+        if addr == 0 {
-+            return None;
-+        }
-+
-+        Some(addr)
 +    }
  }
 
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
-@@ -7,7 +7,7 @@
+@@ -7,7 +7,9 @@
  use super::{InterruptController, PendingIRQs, PeripheralIRQ};
  use crate::{
      bsp::device_driver::common::MMIODerefWrapper,
 -    exception, synchronization,
-+    driver, exception, memory, synchronization,
++    exception,
++    memory::{Address, Virtual},
++    synchronization,
      synchronization::{IRQSafeNullLock, InitStateLock},
  };
  use tock_registers::{
-@@ -55,11 +55,13 @@
-
- /// Representation of the peripheral interrupt controller.
- pub struct PeripheralIC {
-+    mmio_descriptor: memory::mmu::MMIODescriptor,
-+
-     /// Access to write registers is guarded with a lock.
-     wo_registers: IRQSafeNullLock<WriteOnlyRegisters>,
-
-     /// Register read access is unguarded.
--    ro_registers: ReadOnlyRegisters,
-+    ro_registers: InitStateLock<ReadOnlyRegisters>,
-
-     /// Stores registered IRQ handlers. Writable only during kernel init. RO afterwards.
-     handler_table: InitStateLock<HandlerTable>,
-@@ -74,21 +76,26 @@
-     ///
+@@ -75,7 +77,7 @@
      /// # Safety
      ///
--    /// - The user must ensure to provide a correct MMIO start address.
+     /// - The user must ensure to provide a correct MMIO start address.
 -    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
-+    /// - The user must ensure to provide correct MMIO descriptors.
-+    pub const unsafe fn new(mmio_descriptor: memory::mmu::MMIODescriptor) -> Self {
-+        let addr = mmio_descriptor.start_addr().as_usize();
-+
++    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
          Self {
--            wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(mmio_start_addr)),
--            ro_registers: ReadOnlyRegisters::new(mmio_start_addr),
-+            mmio_descriptor,
-+            wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(addr)),
-+            ro_registers: InitStateLock::new(ReadOnlyRegisters::new(addr)),
-             handler_table: InitStateLock::new([None; InterruptController::NUM_PERIPHERAL_IRQS]),
-         }
-     }
-
-     /// Query the list of pending IRQs.
-     fn pending_irqs(&self) -> PendingIRQs {
--        let pending_mask: u64 = (u64::from(self.ro_registers.PENDING_2.get()) << 32)
--            | u64::from(self.ro_registers.PENDING_1.get());
-+        self.ro_registers.read(|regs| {
-+            let pending_mask: u64 =
-+                (u64::from(regs.PENDING_2.get()) << 32) | u64::from(regs.PENDING_1.get());
-
--        PendingIRQs::new(pending_mask)
-+            PendingIRQs::new(pending_mask)
-+        })
-     }
- }
-
-@@ -97,6 +104,24 @@
- //------------------------------------------------------------------------------
- use synchronization::interface::{Mutex, ReadWriteEx};
-
-+impl driver::interface::DeviceDriver for PeripheralIC {
-+    fn compatible(&self) -> &'static str {
-+        "BCM Peripheral Interrupt Controller"
-+    }
-+
-+    unsafe fn init(&self) -> Result<(), &'static str> {
-+        let virt_addr =
-+            memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?.as_usize();
-+
-+        self.wo_registers
-+            .lock(|regs| *regs = WriteOnlyRegisters::new(virt_addr));
-+        self.ro_registers
-+            .write(|regs| *regs = ReadOnlyRegisters::new(virt_addr));
-+
-+        Ok(())
-+    }
-+}
-+
- impl exception::asynchronous::interface::IRQManager for PeripheralIC {
-     type IRQNumberType = PeripheralIRQ;
-
+             wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(mmio_start_addr)),
+             ro_registers: ReadOnlyRegisters::new(mmio_start_addr),
 
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
-@@ -6,7 +6,7 @@
+@@ -6,7 +6,10 @@
 
  mod peripheral_ic;
 
 -use crate::{driver, exception};
-+use crate::{driver, exception, memory};
++use crate::{
++    driver, exception,
++    memory::{Address, Virtual},
++};
 
  //--------------------------------------------------------------------------------------------------
  // Private Definitions
-@@ -78,10 +78,13 @@
-     ///
+@@ -37,6 +40,7 @@
+ /// Representation of the Interrupt Controller.
+ pub struct InterruptController {
+     periph: peripheral_ic::PeripheralIC,
++    post_init_callback: fn(),
+ }
+
+ //--------------------------------------------------------------------------------------------------
+@@ -82,9 +86,13 @@
      /// # Safety
      ///
--    /// - The user must ensure to provide a correct MMIO start address.
--    pub const unsafe fn new(_local_mmio_start_addr: usize, periph_mmio_start_addr: usize) -> Self {
-+    /// - The user must ensure to provide correct MMIO descriptors.
+     /// - The user must ensure to provide a correct MMIO start address.
+-    pub const unsafe fn new(periph_mmio_start_addr: usize) -> Self {
 +    pub const unsafe fn new(
-+        _local_mmio_descriptor: memory::mmu::MMIODescriptor,
-+        periph_mmio_descriptor: memory::mmu::MMIODescriptor,
++        periph_mmio_start_addr: Address<Virtual>,
++        post_init_callback: fn(),
 +    ) -> Self {
          Self {
--            periph: peripheral_ic::PeripheralIC::new(periph_mmio_start_addr),
-+            periph: peripheral_ic::PeripheralIC::new(periph_mmio_descriptor),
+             periph: peripheral_ic::PeripheralIC::new(periph_mmio_start_addr),
++            post_init_callback,
          }
      }
  }
-@@ -94,6 +97,10 @@
+@@ -97,6 +105,12 @@
      fn compatible(&self) -> &'static str {
-         "BCM Interrupt Controller"
+         Self::COMPATIBLE
      }
 +
 +    unsafe fn init(&self) -> Result<(), &'static str> {
-+        self.periph.init()
++        (self.post_init_callback)();
++
++        Ok(())
 +    }
  }
 
@@ -1264,175 +1111,363 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/b
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
-@@ -10,10 +10,13 @@
+@@ -10,8 +10,12 @@
  //! - <https://developer.arm.com/documentation/ddi0183/latest>
 
  use crate::{
 -    bsp, bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, exception,
-+    bsp, bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, exception, memory,
-     synchronization, synchronization::IRQSafeNullLock,
+-    synchronization, synchronization::IRQSafeNullLock,
++    bsp,
++    bsp::device_driver::common::MMIODerefWrapper,
++    console, cpu, driver, exception,
++    memory::{Address, Virtual},
++    synchronization,
++    synchronization::IRQSafeNullLock,
  };
--use core::fmt;
-+use core::{
-+    fmt,
-+    sync::atomic::{AtomicUsize, Ordering},
-+};
+ use core::fmt;
  use tock_registers::{
-     interfaces::{Readable, Writeable},
-     register_bitfields, register_structs,
-@@ -231,6 +234,8 @@
-
- /// Representation of the UART.
+@@ -230,6 +234,7 @@
  pub struct PL011Uart {
-+    mmio_descriptor: memory::mmu::MMIODescriptor,
-+    virt_mmio_start_addr: AtomicUsize,
      inner: IRQSafeNullLock<PL011UartInner>,
      irq_number: bsp::device_driver::IRQNumber,
++    post_init_callback: fn(),
  }
-@@ -270,7 +275,15 @@
-     /// genrated baud rate of `48_000_000 / (16 * 3.25) = 923_077`.
-     ///
-     /// Error = `((923_077 - 921_600) / 921_600) * 100 = 0.16modulo`.
--    pub fn init(&mut self) {
-+    ///
-+    /// # Safety
-+    ///
-+    /// - The user must ensure to provide a correct MMIO start address.
-+    pub unsafe fn init(&mut self, new_mmio_start_addr: Option<usize>) -> Result<(), &'static str> {
-+        if let Some(addr) = new_mmio_start_addr {
-+            self.registers = Registers::new(addr);
-+        }
-+
-         // Execution can arrive here while there are still characters queued in the TX FIFO and
-         // actively being sent out by the UART hardware. If the UART is turned off in this case,
-         // those queued characters would be lost.
-@@ -312,6 +325,8 @@
-         self.registers
-             .CR
-             .write(CR::UARTEN::Enabled + CR::TXE::Enabled + CR::RXE::Enabled);
-+
-+        Ok(())
-     }
 
-     /// Send a character.
-@@ -389,13 +404,18 @@
+ //--------------------------------------------------------------------------------------------------
+@@ -242,7 +247,7 @@
+     /// # Safety
      ///
+     /// - The user must ensure to provide a correct MMIO start address.
+-    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
++    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
+         Self {
+             registers: Registers::new(mmio_start_addr),
+             chars_written: 0,
+@@ -393,13 +398,16 @@
      /// # Safety
      ///
--    /// - The user must ensure to provide a correct MMIO start address.
-+    /// - The user must ensure to provide correct MMIO descriptors.
+     /// - The user must ensure to provide a correct MMIO start address.
 +    /// - The user must ensure to provide correct IRQ numbers.
      pub const unsafe fn new(
 -        mmio_start_addr: usize,
-+        mmio_descriptor: memory::mmu::MMIODescriptor,
++        mmio_start_addr: Address<Virtual>,
          irq_number: bsp::device_driver::IRQNumber,
++        post_init_callback: fn(),
      ) -> Self {
          Self {
--            inner: IRQSafeNullLock::new(PL011UartInner::new(mmio_start_addr)),
-+            mmio_descriptor,
-+            virt_mmio_start_addr: AtomicUsize::new(0),
-+            inner: IRQSafeNullLock::new(PL011UartInner::new(
-+                mmio_descriptor.start_addr().as_usize(),
-+            )),
+             inner: IRQSafeNullLock::new(PL011UartInner::new(mmio_start_addr)),
              irq_number,
++            post_init_callback,
          }
      }
-@@ -412,7 +432,13 @@
-     }
+ }
+@@ -416,6 +424,7 @@
 
      unsafe fn init(&self) -> Result<(), &'static str> {
--        self.inner.lock(|inner| inner.init());
-+        let virt_addr = memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?;
-+
-+        self.inner
-+            .lock(|inner| inner.init(Some(virt_addr.as_usize())))?;
-+
-+        self.virt_mmio_start_addr
-+            .store(virt_addr.as_usize(), Ordering::Relaxed);
+         self.inner.lock(|inner| inner.init());
++        (self.post_init_callback)();
 
          Ok(())
      }
-@@ -431,6 +457,16 @@
 
-         Ok(())
-     }
-+
-+    fn virt_mmio_start_addr(&self) -> Option<usize> {
-+        let addr = self.virt_mmio_start_addr.load(Ordering::Relaxed);
-+
-+        if addr == 0 {
-+            return None;
-+        }
-+
-+        Some(addr)
-+    }
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/common.rs 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/common.rs
+--- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/common.rs
++++ 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/common.rs
+@@ -4,6 +4,7 @@
+
+ //! Common device driver code.
+
++use crate::memory::{Address, Virtual};
+ use core::{marker::PhantomData, ops};
+
+ //--------------------------------------------------------------------------------------------------
+@@ -11,7 +12,7 @@
+ //--------------------------------------------------------------------------------------------------
+
+ pub struct MMIODerefWrapper<T> {
+-    start_addr: usize,
++    start_addr: Address<Virtual>,
+     phantom: PhantomData<fn() -> T>,
  }
 
- impl console::interface::Write for PL011Uart {
+@@ -21,7 +22,7 @@
+
+ impl<T> MMIODerefWrapper<T> {
+     /// Create an instance.
+-    pub const unsafe fn new(start_addr: usize) -> Self {
++    pub const unsafe fn new(start_addr: Address<Virtual>) -> Self {
+         Self {
+             start_addr,
+             phantom: PhantomData,
+@@ -33,6 +34,6 @@
+     type Target = T;
+
+     fn deref(&self) -> &Self::Target {
+-        unsafe { &*(self.start_addr as *const _) }
++        unsafe { &*(self.start_addr.as_usize() as *const _) }
+     }
+ }
 
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/console.rs 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/console.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/console.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/console.rs
-@@ -5,7 +5,7 @@
- //! BSP console facilities.
+@@ -1,16 +0,0 @@
+-// SPDX-License-Identifier: MIT OR Apache-2.0
+-//
+-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+-
+-//! BSP console facilities.
+-
+-use crate::console;
+-
+-//--------------------------------------------------------------------------------------------------
+-// Public Code
+-//--------------------------------------------------------------------------------------------------
+-
+-/// Return a reference to the console.
+-pub fn console() -> &'static dyn console::interface::All {
+-    &super::driver::PL011_UART
+-}
 
- use super::memory;
--use crate::{bsp::device_driver, console};
-+use crate::{bsp::device_driver, console, cpu, driver};
- use core::fmt;
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/driver.rs 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/driver.rs
+--- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/driver.rs
++++ 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/driver.rs
+@@ -5,7 +5,16 @@
+ //! BSP driver support.
 
- //--------------------------------------------------------------------------------------------------
-@@ -23,11 +23,25 @@
- ///
- /// - Use only for printing during a panic.
- pub unsafe fn panic_console_out() -> impl fmt::Write {
--    let mut panic_gpio = device_driver::PanicGPIO::new(memory::map::mmio::GPIO_START);
--    let mut panic_uart = device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START);
-+    use driver::interface::DeviceDriver;
-
-+    let mut panic_gpio = device_driver::PanicGPIO::new(memory::map::mmio::GPIO_START.as_usize());
-+    let mut panic_uart =
-+        device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START.as_usize());
-+
-+    // If remapping of the driver's MMIO already happened, take the remapped start address.
-+    // Otherwise, take a chance with the default physical address.
-+    let maybe_gpio_mmio_start_addr = super::GPIO.virt_mmio_start_addr();
-+    let maybe_uart_mmio_start_addr = super::PL011_UART.virt_mmio_start_addr();
-+
-+    panic_gpio
-+        .init(maybe_gpio_mmio_start_addr)
-+        .unwrap_or_else(|_| cpu::wait_forever());
-     panic_gpio.map_pl011_uart();
--    panic_uart.init();
-+    panic_uart
-+        .init(maybe_uart_mmio_start_addr)
-+        .unwrap_or_else(|_| cpu::wait_forever());
-+
-     panic_uart
+ use super::{exception, memory::map::mmio};
+-use crate::{bsp::device_driver, driver};
++use crate::{
++    bsp::device_driver,
++    console, driver, exception as generic_exception, memory,
++    memory::mmu::MMIODescriptor,
++    synchronization::{interface::ReadWriteEx, InitStateLock},
++};
++use core::{
++    mem::MaybeUninit,
++    sync::atomic::{AtomicBool, Ordering},
++};
+
+ pub use device_driver::IRQNumber;
+
+@@ -15,35 +24,133 @@
+
+ /// Device Driver Manager type.
+ struct BSPDriverManager {
+-    device_drivers: [&'static (dyn DeviceDriver + Sync); 3],
++    device_drivers: InitStateLock<[Option<&'static (dyn DeviceDriver + Sync)>; NUM_DRIVERS]>,
++    init_done: AtomicBool,
  }
 
+ //--------------------------------------------------------------------------------------------------
+-// Global instances
++// Public Definitions
+ //--------------------------------------------------------------------------------------------------
+
+-pub(super) static PL011_UART: device_driver::PL011Uart = unsafe {
+-    device_driver::PL011Uart::new(
+-        mmio::PL011_UART_START,
+-        exception::asynchronous::irq_map::PL011_UART,
+-    )
+-};
++/// The number of active drivers provided by this BSP.
++pub const NUM_DRIVERS: usize = 3;
++
++//--------------------------------------------------------------------------------------------------
++// Global instances
++//--------------------------------------------------------------------------------------------------
 
-diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/driver.rs 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/driver.rs
---- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/driver.rs
-+++ 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/driver.rs
-@@ -46,7 +46,15 @@
-         &self.device_drivers[..]
-     }
+-static GPIO: device_driver::GPIO = unsafe { device_driver::GPIO::new(mmio::GPIO_START) };
++static mut PL011_UART: MaybeUninit<device_driver::PL011Uart> = MaybeUninit::uninit();
++static mut GPIO: MaybeUninit<device_driver::GPIO> = MaybeUninit::uninit();
 
--    fn post_device_driver_init(&self) {
-+    fn early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
-+        &self.device_drivers[0..=1]
+ #[cfg(feature = "bsp_rpi3")]
+-pub(super) static INTERRUPT_CONTROLLER: device_driver::InterruptController =
+-    unsafe { device_driver::InterruptController::new(mmio::PERIPHERAL_INTERRUPT_CONTROLLER_START) };
++static mut INTERRUPT_CONTROLLER: MaybeUninit<device_driver::InterruptController> =
++    MaybeUninit::uninit();
+
+ #[cfg(feature = "bsp_rpi4")]
+-pub(super) static INTERRUPT_CONTROLLER: device_driver::GICv2 =
+-    unsafe { device_driver::GICv2::new(mmio::GICD_START, mmio::GICC_START) };
++static mut INTERRUPT_CONTROLLER: MaybeUninit<device_driver::GICv2> = MaybeUninit::uninit();
+
+ static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
+-    device_drivers: [&PL011_UART, &GPIO, &INTERRUPT_CONTROLLER],
++    device_drivers: InitStateLock::new([None; NUM_DRIVERS]),
++    init_done: AtomicBool::new(false),
+ };
+
+ //--------------------------------------------------------------------------------------------------
++// Private Code
++//--------------------------------------------------------------------------------------------------
++
++impl BSPDriverManager {
++    unsafe fn instantiate_uart(&self) -> Result<(), &'static str> {
++        let mmio_descriptor = MMIODescriptor::new(mmio::PL011_UART_START, mmio::PL011_UART_SIZE);
++        let virt_addr =
++            memory::mmu::kernel_map_mmio(device_driver::PL011Uart::COMPATIBLE, &mmio_descriptor)?;
++
++        // This is safe to do, because it is only called from the init'ed instance itself.
++        fn uart_post_init() {
++            console::register_console(unsafe { PL011_UART.assume_init_ref() });
++        }
++
++        PL011_UART.write(device_driver::PL011Uart::new(
++            virt_addr,
++            exception::asynchronous::irq_map::PL011_UART,
++            uart_post_init,
++        ));
++
++        Ok(())
 +    }
 +
-+    fn non_early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
-+        &self.device_drivers[2..]
++    unsafe fn instantiate_gpio(&self) -> Result<(), &'static str> {
++        let mmio_descriptor = MMIODescriptor::new(mmio::GPIO_START, mmio::GPIO_SIZE);
++        let virt_addr =
++            memory::mmu::kernel_map_mmio(device_driver::GPIO::COMPATIBLE, &mmio_descriptor)?;
++
++        // This is safe to do, because it is only called from the init'ed instance itself.
++        fn gpio_post_init() {
++            unsafe { GPIO.assume_init_ref().map_pl011_uart() };
++        }
++
++        GPIO.write(device_driver::GPIO::new(virt_addr, gpio_post_init));
++
++        Ok(())
++    }
++
++    #[cfg(feature = "bsp_rpi3")]
++    unsafe fn instantiate_interrupt_controller(&self) -> Result<(), &'static str> {
++        let periph_mmio_descriptor =
++            MMIODescriptor::new(mmio::PERIPHERAL_IC_START, mmio::PERIPHERAL_IC_SIZE);
++        let periph_virt_addr = memory::mmu::kernel_map_mmio(
++            device_driver::InterruptController::COMPATIBLE,
++            &periph_mmio_descriptor,
++        )?;
++
++        // This is safe to do, because it is only called from the init'ed instance itself.
++        fn interrupt_controller_post_init() {
++            generic_exception::asynchronous::register_irq_manager(unsafe {
++                INTERRUPT_CONTROLLER.assume_init_ref()
++            });
++        }
++
++        INTERRUPT_CONTROLLER.write(device_driver::InterruptController::new(
++            periph_virt_addr,
++            interrupt_controller_post_init,
++        ));
++
++        Ok(())
++    }
++
++    #[cfg(feature = "bsp_rpi4")]
++    unsafe fn instantiate_interrupt_controller(&self) -> Result<(), &'static str> {
++        let gicd_mmio_descriptor = MMIODescriptor::new(mmio::GICD_START, mmio::GICD_SIZE);
++        let gicd_virt_addr = memory::mmu::kernel_map_mmio("GICv2 GICD", &gicd_mmio_descriptor)?;
++
++        let gicc_mmio_descriptor = MMIODescriptor::new(mmio::GICC_START, mmio::GICC_SIZE);
++        let gicc_virt_addr = memory::mmu::kernel_map_mmio("GICV2 GICC", &gicc_mmio_descriptor)?;
++
++        // This is safe to do, because it is only called from the init'ed instance itself.
++        fn interrupt_controller_post_init() {
++            generic_exception::asynchronous::register_irq_manager(unsafe {
++                INTERRUPT_CONTROLLER.assume_init_ref()
++            });
++        }
++
++        INTERRUPT_CONTROLLER.write(device_driver::GICv2::new(
++            gicd_virt_addr,
++            gicc_virt_addr,
++            interrupt_controller_post_init,
++        ));
++
++        Ok(())
 +    }
 +
-+    fn post_early_print_device_driver_init(&self) {
-         // Configure PL011Uart's output pins.
-         super::GPIO.map_pl011_uart();
++    unsafe fn register_drivers(&self) {
++        self.device_drivers.write(|drivers| {
++            drivers[0] = Some(PL011_UART.assume_init_ref());
++            drivers[1] = Some(GPIO.assume_init_ref());
++            drivers[2] = Some(INTERRUPT_CONTROLLER.assume_init_ref());
++        });
++    }
++}
++
++//--------------------------------------------------------------------------------------------------
+ // Public Code
+ //--------------------------------------------------------------------------------------------------
+
+@@ -58,15 +165,34 @@
+ use driver::interface::DeviceDriver;
+
+ impl driver::interface::DriverManager for BSPDriverManager {
+-    fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
+-        &self.device_drivers[..]
++    unsafe fn instantiate_drivers(&self) -> Result<(), &'static str> {
++        if self.init_done.load(Ordering::Relaxed) {
++            return Err("Drivers already instantiated");
++        }
++
++        self.instantiate_uart()?;
++        self.instantiate_gpio()?;
++        self.instantiate_interrupt_controller()?;
++
++        self.register_drivers();
++
++        self.init_done.store(true, Ordering::Relaxed);
++        Ok(())
      }
 
+-    fn post_device_driver_init(&self) {
+-        // Configure PL011Uart's output pins.
+-        GPIO.map_pl011_uart();
++    fn all_device_drivers(&self) -> [&(dyn DeviceDriver + Sync); NUM_DRIVERS] {
++        self.device_drivers
++            .read(|drivers| drivers.map(|drivers| drivers.unwrap()))
+     }
+
+     #[cfg(feature = "test_build")]
+-    fn qemu_bring_up_console(&self) {}
++    fn qemu_bring_up_console(&self) {
++        use crate::cpu;
++
++        unsafe {
++            self.instantiate_uart()
++                .unwrap_or_else(|_| cpu::qemu_exit_failure());
++            console::register_console(PL011_UART.assume_init_ref());
++        };
++    }
+ }
+
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/exception/asynchronous.rs 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
+--- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
++++ 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
+@@ -4,7 +4,7 @@
+
+ //! BSP asynchronous exception handling.
+
+-use crate::{bsp, bsp::driver, exception};
++use crate::bsp;
+
+ //--------------------------------------------------------------------------------------------------
+ // Public Definitions
+@@ -23,14 +23,3 @@
+
+     pub const PL011_UART: IRQNumber = IRQNumber::new(153);
+ }
+-
+-//--------------------------------------------------------------------------------------------------
+-// Public Code
+-//--------------------------------------------------------------------------------------------------
+-
+-/// Return a reference to the IRQ manager.
+-pub fn irq_manager() -> &'static impl exception::asynchronous::interface::IRQManager<
+-    IRQNumberType = bsp::device_driver::IRQNumber,
+-> {
+-    &driver::INTERRUPT_CONTROLLER
+-}
+
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/kernel.ld 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/kernel.ld
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/kernel.ld
 +++ 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/kernel.ld
@@ -1845,7 +1880,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory.
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -50,35 +91,26 @@
+@@ -50,34 +91,23 @@
  /// The board's physical memory map.
  #[rustfmt::skip]
  pub(super) mod map {
@@ -1877,7 +1912,6 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory.
 -        pub const PERIPHERAL_INTERRUPT_CONTROLLER_START: usize = START + 0x0000_B200;
 -        pub const GPIO_START:                            usize = START + GPIO_OFFSET;
 -        pub const PL011_UART_START:                      usize = START + UART_OFFSET;
--        pub const LOCAL_INTERRUPT_CONTROLLER_START:      usize =         0x4000_0000;
 -        pub const END_INCLUSIVE:                         usize =         0x4000_FFFF;
 +        pub const PERIPHERAL_IC_START: Address<Physical> = Address::new(0x3F00_B200);
 +        pub const PERIPHERAL_IC_SIZE:  usize             =              0x24;
@@ -1888,14 +1922,11 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory.
 +        pub const PL011_UART_START:    Address<Physical> = Address::new(0x3F20_1000);
 +        pub const PL011_UART_SIZE:     usize             =              0x48;
 +
-+        pub const LOCAL_IC_START:      Address<Physical> = Address::new(0x4000_0000);
-+        pub const LOCAL_IC_SIZE:       usize             =              0x100;
-+
 +        pub const END:                 Address<Physical> = Address::new(0x4001_0000);
      }
 
      /// Physical devices.
-@@ -86,13 +118,22 @@
+@@ -85,13 +115,22 @@
      pub mod mmio {
          use super::*;
 
@@ -1924,7 +1955,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory.
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -105,15 +146,76 @@
+@@ -104,15 +143,76 @@
  ///
  /// - Value is provided by the linker script and must be trusted as-is.
  #[inline(always)]
@@ -1932,19 +1963,21 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory.
 -    unsafe { __code_start.get() as usize }
 +fn virt_code_start() -> PageAddress<Virtual> {
 +    PageAddress::from(unsafe { __code_start.get() as usize })
-+}
-+
+ }
+
+-/// Exclusive end page address of the code segment.
 +/// Size of the code segment.
 +///
-+/// # Safety
-+///
-+/// - Value is provided by the linker script and must be trusted as-is.
-+#[inline(always)]
+ /// # Safety
+ ///
+ /// - Value is provided by the linker script and must be trusted as-is.
+ #[inline(always)]
+-fn code_end_exclusive() -> usize {
+-    unsafe { __code_end_exclusive.get() as usize }
 +fn code_size() -> usize {
 +    unsafe { (__code_end_exclusive.get() as usize) - (__code_start.get() as usize) }
- }
-
--/// Exclusive end page address of the code segment.
++}
++
 +/// Start page address of the data segment.
 +#[inline(always)]
 +fn virt_data_start() -> PageAddress<Virtual> {
@@ -1953,12 +1986,10 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory.
 +
 +/// Size of the data segment.
 +///
- /// # Safety
- ///
- /// - Value is provided by the linker script and must be trusted as-is.
- #[inline(always)]
--fn code_end_exclusive() -> usize {
--    unsafe { __code_end_exclusive.get() as usize }
++/// # Safety
++///
++/// - Value is provided by the linker script and must be trusted as-is.
++#[inline(always)]
 +fn data_size() -> usize {
 +    unsafe { (__data_end_exclusive.get() as usize) - (__data_start.get() as usize) }
 +}
@@ -2010,51 +2041,14 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory.
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi.rs 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi.rs
-@@ -10,17 +10,20 @@
- pub mod exception;
- pub mod memory;
-
-+use super::device_driver;
-+use crate::memory::mmu::MMIODescriptor;
-+use memory::map::mmio;
-+
- //--------------------------------------------------------------------------------------------------
- // Global instances
- //--------------------------------------------------------------------------------------------------
--use super::device_driver;
-
- static GPIO: device_driver::GPIO =
--    unsafe { device_driver::GPIO::new(memory::map::mmio::GPIO_START) };
-+    unsafe { device_driver::GPIO::new(MMIODescriptor::new(mmio::GPIO_START, mmio::GPIO_SIZE)) };
-
- static PL011_UART: device_driver::PL011Uart = unsafe {
-     device_driver::PL011Uart::new(
--        memory::map::mmio::PL011_UART_START,
-+        MMIODescriptor::new(mmio::PL011_UART_START, mmio::PL011_UART_SIZE),
-         exception::asynchronous::irq_map::PL011_UART,
-     )
- };
-@@ -28,14 +31,17 @@
- #[cfg(feature = "bsp_rpi3")]
- static INTERRUPT_CONTROLLER: device_driver::InterruptController = unsafe {
-     device_driver::InterruptController::new(
--        memory::map::mmio::LOCAL_INTERRUPT_CONTROLLER_START,
--        memory::map::mmio::PERIPHERAL_INTERRUPT_CONTROLLER_START,
-+        MMIODescriptor::new(mmio::LOCAL_IC_START, mmio::LOCAL_IC_SIZE),
-+        MMIODescriptor::new(mmio::PERIPHERAL_IC_START, mmio::PERIPHERAL_IC_SIZE),
-     )
- };
+@@ -4,7 +4,6 @@
 
- #[cfg(feature = "bsp_rpi4")]
- static INTERRUPT_CONTROLLER: device_driver::GICv2 = unsafe {
--    device_driver::GICv2::new(memory::map::mmio::GICD_START, memory::map::mmio::GICC_START)
-+    device_driver::GICv2::new(
-+        MMIODescriptor::new(mmio::GICD_START, mmio::GICD_SIZE),
-+        MMIODescriptor::new(mmio::GICC_START, mmio::GICC_SIZE),
-+    )
- };
+ //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
- //--------------------------------------------------------------------------------------------------
+-pub mod console;
+ pub mod cpu;
+ pub mod driver;
+ pub mod exception;
 
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/common.rs 14_virtual_mem_part2_mmio_remap/kernel/src/common.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/common.rs
@@ -2090,65 +2084,258 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/common.rs 14_virtual_me
 +    (value + alignment - 1) & !(alignment - 1)
 +}
 
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/console/null_console.rs 14_virtual_mem_part2_mmio_remap/kernel/src/console/null_console.rs
+--- 13_exceptions_part2_peripheral_IRQs/kernel/src/console/null_console.rs
++++ 14_virtual_mem_part2_mmio_remap/kernel/src/console/null_console.rs
+@@ -0,0 +1,41 @@
++// SPDX-License-Identifier: MIT OR Apache-2.0
++//
++// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++
++//! Null console.
++
++use super::interface;
++use core::fmt;
++
++//--------------------------------------------------------------------------------------------------
++// Public Definitions
++//--------------------------------------------------------------------------------------------------
++
++pub struct NullConsole;
++
++//--------------------------------------------------------------------------------------------------
++// Global instances
++//--------------------------------------------------------------------------------------------------
++
++pub static NULL_CONSOLE: NullConsole = NullConsole {};
++
++//--------------------------------------------------------------------------------------------------
++// Private Code
++//--------------------------------------------------------------------------------------------------
++
++impl interface::Write for NullConsole {
++    fn write_char(&self, _c: char) {}
++
++    fn write_fmt(&self, _args: fmt::Arguments) -> fmt::Result {
++        fmt::Result::Ok(())
++    }
++
++    fn flush(&self) {}
++}
++
++impl interface::Read for NullConsole {
++    fn clear_rx(&self) {}
++}
++
++impl interface::Statistics for NullConsole {}
++impl interface::All for NullConsole {}
+
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/console.rs 14_virtual_mem_part2_mmio_remap/kernel/src/console.rs
+--- 13_exceptions_part2_peripheral_IRQs/kernel/src/console.rs
++++ 14_virtual_mem_part2_mmio_remap/kernel/src/console.rs
+@@ -4,7 +4,9 @@
+
+ //! System console.
+
+-use crate::bsp;
++mod null_console;
++
++use crate::synchronization;
+
+ //--------------------------------------------------------------------------------------------------
+ // Public Definitions
+@@ -55,12 +57,25 @@
+ }
+
+ //--------------------------------------------------------------------------------------------------
++// Global instances
++//--------------------------------------------------------------------------------------------------
++
++static CUR_CONSOLE: InitStateLock<&'static (dyn interface::All + Sync)> =
++    InitStateLock::new(&null_console::NULL_CONSOLE);
++
++//--------------------------------------------------------------------------------------------------
+ // Public Code
+ //--------------------------------------------------------------------------------------------------
++use synchronization::{interface::ReadWriteEx, InitStateLock};
++
++/// Register a new console.
++pub fn register_console(new_console: &'static (dyn interface::All + Sync)) {
++    CUR_CONSOLE.write(|con| *con = new_console);
++}
+
+-/// Return a reference to the console.
++/// Return a reference to the currently registered console.
+ ///
+ /// This is the global console used by all printing macros.
+ pub fn console() -> &'static dyn interface::All {
+-    bsp::console::console()
++    CUR_CONSOLE.read(|con| *con)
+ }
+
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/driver.rs 14_virtual_mem_part2_mmio_remap/kernel/src/driver.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/driver.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/src/driver.rs
-@@ -31,6 +31,14 @@
-         fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
-             Ok(())
-         }
-+
-+        /// After MMIO remapping, returns the new virtual start address.
-+        ///
-+        /// This API assumes a driver has only a single, contiguous MMIO aperture, which will not be
-+        /// the case for more complex devices. This API will likely change in future tutorials.
-+        fn virt_mmio_start_addr(&self) -> Option<usize> {
-+            None
-+        }
-     }
+@@ -10,6 +10,8 @@
 
-     /// Device driver management functions.
-@@ -38,15 +46,17 @@
+ /// Driver interfaces.
+ pub mod interface {
++    use crate::bsp;
++
+     /// Device Driver functions.
+     pub trait DeviceDriver {
+         /// Return a compatibility string for identifying the driver.
+@@ -37,17 +39,15 @@
+     ///
      /// The `BSP` is supposed to supply one global instance.
      pub trait DriverManager {
-         /// Return a slice of references to all `BSP`-instantiated drivers.
--        ///
--        /// # Safety
--        ///
+-        /// Return a slice of references to all `BSP`-instantiated drivers.
++        /// Instantiate all drivers.
+         ///
+         /// # Safety
+         ///
 -        /// - The order of devices is the order in which `DeviceDriver::init()` is called.
-         fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
+-        fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
++        /// Must be called before `all_device_drivers`.
++        unsafe fn instantiate_drivers(&self) -> Result<(), &'static str>;
 
 -        /// Initialization code that runs after driver init.
-+        /// Return only those drivers needed for the BSP's early printing functionality.
-         ///
+-        ///
 -        /// For example, device driver code that depends on other drivers already being online.
 -        fn post_device_driver_init(&self);
-+        /// For example, the default UART.
-+        fn early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
++        /// Return a slice of references to all `BSP`-instantiated drivers.
++        fn all_device_drivers(&self) -> [&(dyn DeviceDriver + Sync); bsp::driver::NUM_DRIVERS];
+
+         /// Minimal code needed to bring up the console in QEMU (for testing only). This is often
+         /// less steps than on real hardware due to QEMU's abstractions.
+
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous/null_irq_manager.rs 14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous/null_irq_manager.rs
+--- 13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous/null_irq_manager.rs
++++ 14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous/null_irq_manager.rs
+@@ -0,0 +1,44 @@
++// SPDX-License-Identifier: MIT OR Apache-2.0
++//
++// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++
++//! Null IRQ Manager.
++
++use super::{interface, IRQContext, IRQDescriptor};
++use crate::bsp;
++
++//--------------------------------------------------------------------------------------------------
++// Public Definitions
++//--------------------------------------------------------------------------------------------------
++
++pub struct NullIRQManager;
++
++//--------------------------------------------------------------------------------------------------
++// Global instances
++//--------------------------------------------------------------------------------------------------
++
++pub static NULL_IRQ_MANAGER: NullIRQManager = NullIRQManager {};
++
++//--------------------------------------------------------------------------------------------------
++// Public Code
++//--------------------------------------------------------------------------------------------------
++
++impl interface::IRQManager for NullIRQManager {
++    type IRQNumberType = bsp::driver::IRQNumber;
++
++    fn register_handler(
++        &self,
++        _irq_number: Self::IRQNumberType,
++        _descriptor: IRQDescriptor,
++    ) -> Result<(), &'static str> {
++        panic!("No IRQ Manager registered yet");
++    }
 +
-+        /// Return all drivers minus early-print drivers.
-+        fn non_early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
++    fn enable(&self, _irq_number: Self::IRQNumberType) {
++        panic!("No IRQ Manager registered yet");
++    }
 +
-+        /// Initialization code that runs after the early print driver init.
-+        fn post_early_print_device_driver_init(&self);
++    fn handle_pending_irqs<'irq_context>(&'irq_context self, _ic: &IRQContext<'irq_context>) {
++        panic!("No IRQ Manager registered yet");
++    }
++}
+
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.rs 14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous.rs
+--- 13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.rs
++++ 14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous.rs
+@@ -7,8 +7,9 @@
+ #[cfg(target_arch = "aarch64")]
+ #[path = "../_arch/aarch64/exception/asynchronous.rs"]
+ mod arch_asynchronous;
++mod null_irq_manager;
+
+-use crate::bsp;
++use crate::{bsp, synchronization};
+ use core::{fmt, marker::PhantomData};
+
+ //--------------------------------------------------------------------------------------------------
+@@ -86,7 +87,7 @@
+         );
+
+         /// Print list of registered handlers.
+-        fn print_handler(&self);
++        fn print_handler(&self) {}
      }
  }
 
+@@ -95,8 +96,17 @@
+ pub struct IRQNumber<const MAX_INCLUSIVE: usize>(usize);
+
+ //--------------------------------------------------------------------------------------------------
++// Global instances
++//--------------------------------------------------------------------------------------------------
++
++static CUR_IRQ_MANAGER: InitStateLock<
++    &'static (dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber> + Sync),
++> = InitStateLock::new(&null_irq_manager::NULL_IRQ_MANAGER);
++
++//--------------------------------------------------------------------------------------------------
+ // Public Code
+ //--------------------------------------------------------------------------------------------------
++use synchronization::{interface::ReadWriteEx, InitStateLock};
+
+ impl<'irq_context> IRQContext<'irq_context> {
+     /// Creates an IRQContext token.
+@@ -152,9 +162,17 @@
+     ret
+ }
+
+-/// Return a reference to the IRQ manager.
++/// Register a new IRQ manager.
++pub fn register_irq_manager(
++    new_manager: &'static (dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber>
++                  + Sync),
++) {
++    CUR_IRQ_MANAGER.write(|manager| *manager = new_manager);
++}
++
++/// Return a reference to the currently registered IRQ manager.
+ ///
+ /// This is the IRQ manager used by the architectural interrupt handling code.
+ pub fn irq_manager() -> &'static dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber> {
+-    bsp::exception::asynchronous::irq_manager()
++    CUR_IRQ_MANAGER.read(|manager| *manager)
+ }
+
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs 14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
-@@ -113,8 +113,10 @@
+@@ -113,8 +113,11 @@
  #![feature(asm_const)]
  #![feature(core_intrinsics)]
  #![feature(format_args_nl)]
 +#![feature(generic_const_exprs)]
++#![feature(is_sorted)]
  #![feature(linkage)]
  #![feature(panic_info_message)]
 +#![feature(step_trait)]
  #![feature(trait_alias)]
  #![no_std]
  // Testing
-@@ -127,6 +129,7 @@
+@@ -127,6 +130,7 @@
  mod synchronization;
 
  pub mod bsp;
@@ -2156,19 +2343,32 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs 14_virtual_mem_p
  pub mod console;
  pub mod cpu;
  pub mod driver;
-@@ -179,6 +182,7 @@
- #[no_mangle]
- unsafe fn kernel_init() -> ! {
+@@ -181,7 +185,20 @@
+     use driver::interface::DriverManager;
+
      exception::handling_init();
++
++    let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
++        Err(string) => panic!("Error mapping kernel binary: {}", string),
++        Ok(addr) => addr,
++    };
++
++    if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
++        panic!("Enabling MMU failed: {}", e);
++    }
++    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
++
 +    memory::mmu::post_enable_init();
-     bsp::console::qemu_bring_up_console();
+     bsp::driver::driver_manager().qemu_bring_up_console();
++    // Printing available again from here on.
 
      test_main();
 
+
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs 14_virtual_mem_part2_mmio_remap/kernel/src/main.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/src/main.rs
-@@ -27,21 +27,41 @@
+@@ -27,21 +27,31 @@
  #[no_mangle]
  unsafe fn kernel_init() -> ! {
      use driver::interface::DriverManager;
@@ -2185,38 +2385,32 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs 14_virtual_mem_
 +
 +    if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
 +        panic!("Enabling MMU failed: {}", e);
-+    }
+     }
 +    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
 +
 +    memory::mmu::post_enable_init();
-+
-+    // Bring up the drivers needed for printing first.
-+    for i in bsp::driver::driver_manager()
-+        .early_print_device_drivers()
-+        .iter()
-+    {
-+        // Any encountered errors cannot be printed yet, obviously, so just safely park the CPU.
-+        i.init().unwrap_or_else(|_| cpu::wait_forever());
-     }
-+    bsp::driver::driver_manager().post_early_print_device_driver_init();
-+    // Printing available again from here on.
 
--    for i in bsp::driver::driver_manager().all_device_drivers().iter() {
-+    // Now bring up the remaining drivers.
-+    for i in bsp::driver::driver_manager()
-+        .non_early_print_device_drivers()
-+        .iter()
-+    {
++    // Instantiate and init all device drivers.
++    if let Err(x) = bsp::driver::driver_manager().instantiate_drivers() {
++        panic!("Error instantiating drivers: {}", x);
++    }
+     for i in bsp::driver::driver_manager().all_device_drivers().iter() {
          if let Err(x) = i.init() {
              panic!("Error loading driver: {}: {}", i.compatible(), x);
          }
      }
 -    bsp::driver::driver_manager().post_device_driver_init();
 -    // println! is usable from here on.
++    // Printing available again from here on.
 
      // Let device drivers register and enable their handlers with the interrupt controller.
      for i in bsp::driver::driver_manager().all_device_drivers() {
-@@ -68,8 +88,8 @@
+@@ -63,13 +73,12 @@
+ /// The main function running after the early init.
+ fn kernel_main() -> ! {
+     use driver::interface::DriverManager;
+-    use exception::asynchronous::interface::IRQManager;
+
      info!("{}", libkernel::version());
      info!("Booting on: {}", bsp::board_name());
 
@@ -2227,11 +2421,20 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs 14_virtual_mem_
 
      let (_, privilege_level) = exception::current_privilege_level();
      info!("Current privilege level: {}", privilege_level);
+@@ -92,7 +101,7 @@
+     }
+
+     info!("Registered IRQ handlers:");
+-    bsp::exception::asynchronous::irq_manager().print_handler();
++    exception::asynchronous::irq_manager().print_handler();
+
+     info!("Echoing input now");
+     cpu::wait_forever();
 
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/mapping_record.rs 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/mapping_record.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/mapping_record.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/mapping_record.rs
-@@ -0,0 +1,233 @@
+@@ -0,0 +1,249 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
@@ -2310,6 +2513,19 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/mapping_reco
 +        Self { inner: [None; 12] }
 +    }
 +
++    fn size(&self) -> usize {
++        self.inner.iter().filter(|x| x.is_some()).count()
++    }
++
++    fn sort(&mut self) {
++        let upper_bound_exclusive = self.size();
++        let entries = &mut self.inner[0..upper_bound_exclusive];
++
++        if !entries.is_sorted_by_key(|item| item.unwrap().virt_start_addr) {
++            entries.sort_unstable_by_key(|item| item.unwrap().virt_start_addr)
++        }
++    }
++
 +    fn find_next_free(&mut self) -> Result<&mut Option<MappingRecordEntry>, &'static str> {
 +        if let Some(x) = self.inner.iter_mut().find(|x| x.is_none()) {
 +            return Ok(x);
@@ -2355,6 +2571,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/mapping_reco
 +            phys_region,
 +            attr,
 +        ));
++
++        self.sort();
++
 +        Ok(())
 +    }
 +
@@ -3446,18 +3665,18 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory.rs 14_virtual_me
 +//--------------------------------------------------------------------------------------------------
 +
 +/// Metadata trait for marking the type of an address.
-+pub trait AddressType: Copy + Clone + PartialOrd + PartialEq {}
++pub trait AddressType: Copy + Clone + PartialOrd + PartialEq + Ord + Eq {}
 +
 +/// Zero-sized type to mark a physical address.
-+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
++#[derive(Copy, Clone, Debug, PartialOrd, PartialEq, Ord, Eq)]
 +pub enum Physical {}
 +
 +/// Zero-sized type to mark a virtual address.
-+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
++#[derive(Copy, Clone, Debug, PartialOrd, PartialEq, Ord, Eq)]
 +pub enum Virtual {}
 +
 +/// Generic address type.
-+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
++#[derive(Copy, Clone, Debug, PartialOrd, PartialEq, Ord, Eq)]
 +pub struct Address<ATYPE: AddressType> {
 +    value: usize,
 +    _address_type: PhantomData<fn() -> ATYPE>,
@@ -3594,18 +3813,85 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory.rs 14_virtual_me
 +    }
 +}
 
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/tests/00_console_sanity.rs 14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rs
+--- 13_exceptions_part2_peripheral_IRQs/kernel/tests/00_console_sanity.rs
++++ 14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rs
+@@ -11,7 +11,7 @@
+ /// Console tests should time out on the I/O harness in case of panic.
+ mod panic_wait_forever;
+
+-use libkernel::{bsp, console, cpu, driver, exception, print};
++use libkernel::{bsp, console, cpu, driver, exception, memory, print};
+
+ #[no_mangle]
+ unsafe fn kernel_init() -> ! {
+@@ -19,7 +19,20 @@
+     use driver::interface::DriverManager;
+
+     exception::handling_init();
++
++    let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
++        Err(string) => panic!("Error mapping kernel binary: {}", string),
++        Ok(addr) => addr,
++    };
++
++    if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
++        panic!("Enabling MMU failed: {}", e);
++    }
++    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
++
++    memory::mmu::post_enable_init();
+     bsp::driver::driver_manager().qemu_bring_up_console();
++    // Printing available again from here on.
+
+     // Handshake
+     assert_eq!(console().read_char(), 'A');
+
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/tests/01_timer_sanity.rs 14_virtual_mem_part2_mmio_remap/kernel/tests/01_timer_sanity.rs
+--- 13_exceptions_part2_peripheral_IRQs/kernel/tests/01_timer_sanity.rs
++++ 14_virtual_mem_part2_mmio_remap/kernel/tests/01_timer_sanity.rs
+@@ -11,7 +11,7 @@
+ #![test_runner(libkernel::test_runner)]
+
+ use core::time::Duration;
+-use libkernel::{bsp, cpu, driver, exception, time, time::interface::TimeManager};
++use libkernel::{bsp, cpu, driver, exception, memory, time, time::interface::TimeManager};
+ use test_macros::kernel_test;
+
+ #[no_mangle]
+@@ -19,7 +19,20 @@
+     use driver::interface::DriverManager;
+
+     exception::handling_init();
++
++    let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
++        Err(string) => panic!("Error mapping kernel binary: {}", string),
++        Ok(addr) => addr,
++    };
++
++    if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
++        panic!("Enabling MMU failed: {}", e);
++    }
++    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
++
++    memory::mmu::post_enable_init();
+     bsp::driver::driver_manager().qemu_bring_up_console();
++    // Printing available again from here on.
+
+     // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
+
+
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/tests/02_exception_sync_page_fault.rs 14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fault.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/tests/02_exception_sync_page_fault.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fault.rs
-@@ -21,18 +21,40 @@
-
+@@ -22,18 +22,29 @@
  #[no_mangle]
  unsafe fn kernel_init() -> ! {
+     use driver::interface::DriverManager;
 -    use memory::mmu::interface::MMU;
-+    use libkernel::driver::interface::DriverManager;
 
      exception::handling_init();
--    bsp::console::qemu_bring_up_console();
+-    bsp::driver::driver_manager().qemu_bring_up_console();
 
      // This line will be printed as the test header.
      println!("Testing synchronous exception handling by causing a page fault");
@@ -3627,17 +3913,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/tests/02_exception_sync_pag
 +    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
 +
 +    memory::mmu::post_enable_init();
-+    bsp::console::qemu_bring_up_console();
-+
-+    // Bring up the drivers needed for printing first.
-+    for i in bsp::driver::driver_manager()
-+        .early_print_device_drivers()
-+        .iter()
-+    {
-+        // Any encountered errors cannot be printed yet, obviously, so just safely park the CPU.
-+        i.init().unwrap_or_else(|_| cpu::qemu_exit_failure());
-+    }
-+    bsp::driver::driver_manager().post_early_print_device_driver_init();
++    bsp::driver::driver_manager().qemu_bring_up_console();
 +    // Printing available again from here on.
 
      info!("Writing beyond mapped area to address 9 GiB...");
@@ -3646,15 +3922,14 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/tests/02_exception_sync_pag
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/tests/03_exception_restore_sanity.rs 14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/tests/03_exception_restore_sanity.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rs
-@@ -30,18 +30,40 @@
-
+@@ -31,18 +31,29 @@
  #[no_mangle]
  unsafe fn kernel_init() -> ! {
+     use driver::interface::DriverManager;
 -    use memory::mmu::interface::MMU;
-+    use libkernel::driver::interface::DriverManager;
 
      exception::handling_init();
--    bsp::console::qemu_bring_up_console();
+-    bsp::driver::driver_manager().qemu_bring_up_console();
 
      // This line will be printed as the test header.
      println!("Testing exception restore");
@@ -3676,19 +3951,46 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/tests/03_exception_restore_
 +    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
 +
 +    memory::mmu::post_enable_init();
-+    bsp::console::qemu_bring_up_console();
++    bsp::driver::driver_manager().qemu_bring_up_console();
++    // Printing available again from here on.
+
+     info!("Making a dummy system call");
+
+
+diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/tests/04_exception_irq_sanity.rs 14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.rs
+--- 13_exceptions_part2_peripheral_IRQs/kernel/tests/04_exception_irq_sanity.rs
++++ 14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.rs
+@@ -10,15 +10,29 @@
+ #![reexport_test_harness_main = "test_main"]
+ #![test_runner(libkernel::test_runner)]
+
+-use libkernel::{bsp, cpu, driver, exception};
++use libkernel::{bsp, cpu, driver, exception, memory};
+ use test_macros::kernel_test;
+
+ #[no_mangle]
+ unsafe fn kernel_init() -> ! {
+     use driver::interface::DriverManager;
+-    bsp::driver::driver_manager().qemu_bring_up_console();
+
+     exception::handling_init();
 +
-+    // Bring up the drivers needed for printing first.
-+    for i in bsp::driver::driver_manager()
-+        .early_print_device_drivers()
-+        .iter()
-+    {
-+        // Any encountered errors cannot be printed yet, obviously, so just safely park the CPU.
-+        i.init().unwrap_or_else(|_| cpu::qemu_exit_failure());
++    let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
++        Err(string) => panic!("Error mapping kernel binary: {}", string),
++        Ok(addr) => addr,
++    };
++
++    if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
++        panic!("Enabling MMU failed: {}", e);
 +    }
-+    bsp::driver::driver_manager().post_early_print_device_driver_init();
++    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
++
++    memory::mmu::post_enable_init();
++    bsp::driver::driver_manager().qemu_bring_up_console();
 +    // Printing available again from here on.
++
+     exception::asynchronous::local_irq_unmask();
 
-     info!("Making a dummy system call");
+     test_main();
 
 ```
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception.rs
index 662c91b94..fa6748a6d 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::exception::arch_exception
 
-use crate::{bsp, exception};
+use crate::exception;
 use core::{arch::global_asm, cell::UnsafeCell, fmt};
 use cortex_a::{asm::barrier, registers::*};
 use tock_registers::{
@@ -104,10 +104,8 @@ unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
 
 #[no_mangle]
 unsafe extern "C" fn current_elx_irq(_e: &mut ExceptionContext) {
-    use exception::asynchronous::interface::IRQManager;
-
     let token = &exception::asynchronous::IRQContext::new();
-    bsp::exception::asynchronous::irq_manager().handle_pending_irqs(token);
+    exception::asynchronous::irq_manager().handle_pending_irqs(token);
 }
 
 #[no_mangle]
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2.rs
index 4c68a6929..e72fde7be 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2.rs
@@ -79,8 +79,12 @@
 mod gicc;
 mod gicd;
 
-use crate::{bsp, cpu, driver, exception, memory, synchronization, synchronization::InitStateLock};
-use core::sync::atomic::{AtomicBool, Ordering};
+use crate::{
+    bsp, cpu, driver, exception,
+    memory::{Address, Virtual},
+    synchronization,
+    synchronization::InitStateLock,
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -97,20 +101,17 @@ pub type IRQNumber = exception::asynchronous::IRQNumber<{ GICv2::MAX_IRQ_NUMBER
 
 /// Representation of the GIC.
 pub struct GICv2 {
-    gicd_mmio_descriptor: memory::mmu::MMIODescriptor,
-    gicc_mmio_descriptor: memory::mmu::MMIODescriptor,
-
     /// The Distributor.
     gicd: gicd::GICD,
 
     /// The CPU Interface.
     gicc: gicc::GICC,
 
-    /// Have the MMIO regions been remapped yet?
-    is_mmio_remapped: AtomicBool,
-
     /// Stores registered IRQ handlers. Writable only during kernel init. RO afterwards.
     handler_table: InitStateLock<HandlerTable>,
+
+    /// Callback to be invoked after successful init.
+    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -121,22 +122,23 @@ impl GICv2 {
     const MAX_IRQ_NUMBER: usize = 300; // Normally 1019, but keep it lower to save some space.
     const NUM_IRQS: usize = Self::MAX_IRQ_NUMBER + 1;
 
+    pub const COMPATIBLE: &'static str = "GICv2 (ARM Generic Interrupt Controller v2)";
+
     /// Create an instance.
     ///
     /// # Safety
     ///
-    /// - The user must ensure to provide correct MMIO descriptors.
+    /// - The user must ensure to provide a correct MMIO start address.
     pub const unsafe fn new(
-        gicd_mmio_descriptor: memory::mmu::MMIODescriptor,
-        gicc_mmio_descriptor: memory::mmu::MMIODescriptor,
+        gicd_mmio_start_addr: Address<Virtual>,
+        gicc_mmio_start_addr: Address<Virtual>,
+        post_init_callback: fn(),
     ) -> Self {
         Self {
-            gicd_mmio_descriptor,
-            gicc_mmio_descriptor,
-            gicd: gicd::GICD::new(gicd_mmio_descriptor.start_addr().as_usize()),
-            gicc: gicc::GICC::new(gicc_mmio_descriptor.start_addr().as_usize()),
-            is_mmio_remapped: AtomicBool::new(false),
+            gicd: gicd::GICD::new(gicd_mmio_start_addr),
+            gicc: gicc::GICC::new(gicc_mmio_start_addr),
             handler_table: InitStateLock::new([None; Self::NUM_IRQS]),
+            post_init_callback,
         }
     }
 }
@@ -148,24 +150,10 @@ use synchronization::interface::ReadWriteEx;
 
 impl driver::interface::DeviceDriver for GICv2 {
     fn compatible(&self) -> &'static str {
-        "GICv2 (ARM Generic Interrupt Controller v2)"
+        Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
-        let remapped = self.is_mmio_remapped.load(Ordering::Relaxed);
-        if !remapped {
-            // GICD
-            let mut virt_addr = memory::mmu::kernel_map_mmio("GICD", &self.gicd_mmio_descriptor)?;
-            self.gicd.set_mmio(virt_addr.as_usize());
-
-            // GICC
-            virt_addr = memory::mmu::kernel_map_mmio("GICC", &self.gicc_mmio_descriptor)?;
-            self.gicc.set_mmio(virt_addr.as_usize());
-
-            // Conclude remapping.
-            self.is_mmio_remapped.store(true, Ordering::Relaxed);
-        }
-
         if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
             self.gicd.boot_core_init();
         }
@@ -173,6 +161,8 @@ impl driver::interface::DeviceDriver for GICv2 {
         self.gicc.priority_accept_all();
         self.gicc.enable();
 
+        (self.post_init_callback)();
+
         Ok(())
     }
 }
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
index 1a151d246..1a02fc650 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
@@ -5,7 +5,9 @@
 //! GICC Driver - GIC CPU interface.
 
 use crate::{
-    bsp::device_driver::common::MMIODerefWrapper, exception, synchronization::InitStateLock,
+    bsp::device_driver::common::MMIODerefWrapper,
+    exception,
+    memory::{Address, Virtual},
 };
 use tock_registers::{
     interfaces::{Readable, Writeable},
@@ -62,13 +64,12 @@ type Registers = MMIODerefWrapper<RegisterBlock>;
 
 /// Representation of the GIC CPU interface.
 pub struct GICC {
-    registers: InitStateLock<Registers>,
+    registers: Registers,
 }
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
-use crate::synchronization::interface::ReadWriteEx;
 
 impl GICC {
     /// Create an instance.
@@ -76,17 +77,12 @@ impl GICC {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
         Self {
-            registers: InitStateLock::new(Registers::new(mmio_start_addr)),
+            registers: Registers::new(mmio_start_addr),
         }
     }
 
-    pub unsafe fn set_mmio(&self, new_mmio_start_addr: usize) {
-        self.registers
-            .write(|regs| *regs = Registers::new(new_mmio_start_addr));
-    }
-
     /// Accept interrupts of any priority.
     ///
     /// Quoting the GICv2 Architecture Specification:
@@ -99,9 +95,7 @@ impl GICC {
     /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
     ///   of `&mut self`.
     pub fn priority_accept_all(&self) {
-        self.registers.read(|regs| {
-            regs.PMR.write(PMR::Priority.val(255)); // Comment in arch spec.
-        });
+        self.registers.PMR.write(PMR::Priority.val(255)); // Comment in arch spec.
     }
 
     /// Enable the interface - start accepting IRQs.
@@ -111,9 +105,7 @@ impl GICC {
     /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
     ///   of `&mut self`.
     pub fn enable(&self) {
-        self.registers.read(|regs| {
-            regs.CTLR.write(CTLR::Enable::SET);
-        });
+        self.registers.CTLR.write(CTLR::Enable::SET);
     }
 
     /// Extract the number of the highest-priority pending IRQ.
@@ -129,8 +121,7 @@ impl GICC {
         &self,
         _ic: &exception::asynchronous::IRQContext<'irq_context>,
     ) -> usize {
-        self.registers
-            .read(|regs| regs.IAR.read(IAR::InterruptID) as usize)
+        self.registers.IAR.read(IAR::InterruptID) as usize
     }
 
     /// Complete handling of the currently active IRQ.
@@ -149,8 +140,6 @@ impl GICC {
         irq_number: u32,
         _ic: &exception::asynchronous::IRQContext<'irq_context>,
     ) {
-        self.registers.read(|regs| {
-            regs.EOIR.write(EOIR::EOIINTID.val(irq_number));
-        });
+        self.registers.EOIR.write(EOIR::EOIINTID.val(irq_number));
     }
 }
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
index 60bbc4689..d9f63d1bb 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -9,8 +9,9 @@
 
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper,
+    memory::{Address, Virtual},
     state, synchronization,
-    synchronization::{IRQSafeNullLock, InitStateLock},
+    synchronization::IRQSafeNullLock,
 };
 use tock_registers::{
     interfaces::{Readable, Writeable},
@@ -84,7 +85,7 @@ pub struct GICD {
     shared_registers: IRQSafeNullLock<SharedRegisters>,
 
     /// Access to banked registers is unguarded.
-    banked_registers: InitStateLock<BankedRegisters>,
+    banked_registers: BankedRegisters,
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -121,7 +122,6 @@ impl SharedRegisters {
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
-use crate::synchronization::interface::ReadWriteEx;
 use synchronization::interface::Mutex;
 
 impl GICD {
@@ -130,20 +130,13 @@ impl GICD {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
         Self {
             shared_registers: IRQSafeNullLock::new(SharedRegisters::new(mmio_start_addr)),
-            banked_registers: InitStateLock::new(BankedRegisters::new(mmio_start_addr)),
+            banked_registers: BankedRegisters::new(mmio_start_addr),
         }
     }
 
-    pub unsafe fn set_mmio(&self, new_mmio_start_addr: usize) {
-        self.shared_registers
-            .lock(|regs| *regs = SharedRegisters::new(new_mmio_start_addr));
-        self.banked_registers
-            .write(|regs| *regs = BankedRegisters::new(new_mmio_start_addr));
-    }
-
     /// Use a banked ITARGETSR to retrieve the executing core's GIC target mask.
     ///
     /// Quoting the GICv2 Architecture Specification:
@@ -151,8 +144,7 @@ impl GICD {
     ///   "GICD_ITARGETSR0 to GICD_ITARGETSR7 are read-only, and each field returns a value that
     ///    corresponds only to the processor reading the register."
     fn local_gic_target_mask(&self) -> u32 {
-        self.banked_registers
-            .read(|regs| regs.ITARGETSR[0].read(ITARGETSR::Offset0))
+        self.banked_registers.ITARGETSR[0].read(ITARGETSR::Offset0)
     }
 
     /// Route all SPIs to the boot core and enable the distributor.
@@ -191,10 +183,10 @@ impl GICD {
         // Check if we are handling a private or shared IRQ.
         match irq_num {
             // Private.
-            0..=31 => self.banked_registers.read(|regs| {
-                let enable_reg = &regs.ISENABLER;
+            0..=31 => {
+                let enable_reg = &self.banked_registers.ISENABLER;
                 enable_reg.set(enable_reg.get() | enable_bit);
-            }),
+            }
             // Shared.
             _ => {
                 let enable_reg_index_shared = enable_reg_index - 1;
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index eea07b755..a3361c2cc 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -5,10 +5,12 @@
 //! GPIO Driver.
 
 use crate::{
-    bsp::device_driver::common::MMIODerefWrapper, driver, memory, synchronization,
+    bsp::device_driver::common::MMIODerefWrapper,
+    driver,
+    memory::{Address, Virtual},
+    synchronization,
     synchronization::IRQSafeNullLock,
 };
-use core::sync::atomic::{AtomicUsize, Ordering};
 use tock_registers::{
     interfaces::{ReadWriteable, Writeable},
     register_bitfields, register_structs,
@@ -109,26 +111,22 @@ register_structs! {
 /// Abstraction for the associated MMIO registers.
 type Registers = MMIODerefWrapper<RegisterBlock>;
 
-//--------------------------------------------------------------------------------------------------
-// Public Definitions
-//--------------------------------------------------------------------------------------------------
-
-pub struct GPIOInner {
+struct GPIOInner {
     registers: Registers,
 }
 
-// Export the inner struct so that BSPs can use it for the panic handler.
-pub use GPIOInner as PanicGPIO;
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
 
 /// Representation of the GPIO HW.
 pub struct GPIO {
-    mmio_descriptor: memory::mmu::MMIODescriptor,
-    virt_mmio_start_addr: AtomicUsize,
     inner: IRQSafeNullLock<GPIOInner>,
+    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
-// Public Code
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
 impl GPIOInner {
@@ -137,25 +135,12 @@ impl GPIOInner {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
         Self {
             registers: Registers::new(mmio_start_addr),
         }
     }
 
-    /// Init code.
-    ///
-    /// # Safety
-    ///
-    /// - The user must ensure to provide a correct MMIO start address.
-    pub unsafe fn init(&mut self, new_mmio_start_addr: Option<usize>) -> Result<(), &'static str> {
-        if let Some(addr) = new_mmio_start_addr {
-            self.registers = Registers::new(addr);
-        }
-
-        Ok(())
-    }
-
     /// Disable pull-up/down on pins 14 and 15.
     #[cfg(feature = "bsp_rpi3")]
     fn disable_pud_14_15_bcm2837(&mut self) {
@@ -205,17 +190,22 @@ impl GPIOInner {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
 impl GPIO {
+    pub const COMPATIBLE: &'static str = "BCM GPIO";
+
     /// Create an instance.
     ///
     /// # Safety
     ///
-    /// - The user must ensure to provide correct MMIO descriptors.
-    pub const unsafe fn new(mmio_descriptor: memory::mmu::MMIODescriptor) -> Self {
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>, post_init_callback: fn()) -> Self {
         Self {
-            mmio_descriptor,
-            virt_mmio_start_addr: AtomicUsize::new(0),
-            inner: IRQSafeNullLock::new(GPIOInner::new(mmio_descriptor.start_addr().as_usize())),
+            inner: IRQSafeNullLock::new(GPIOInner::new(mmio_start_addr)),
+            post_init_callback,
         }
     }
 
@@ -232,28 +222,12 @@ use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for GPIO {
     fn compatible(&self) -> &'static str {
-        "BCM GPIO"
+        Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
-        let virt_addr = memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?;
-
-        self.inner
-            .lock(|inner| inner.init(Some(virt_addr.as_usize())))?;
-
-        self.virt_mmio_start_addr
-            .store(virt_addr.as_usize(), Ordering::Relaxed);
+        (self.post_init_callback)();
 
         Ok(())
     }
-
-    fn virt_mmio_start_addr(&self) -> Option<usize> {
-        let addr = self.virt_mmio_start_addr.load(Ordering::Relaxed);
-
-        if addr == 0 {
-            return None;
-        }
-
-        Some(addr)
-    }
 }
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
index 99961facb..4908b8b67 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -6,7 +6,10 @@
 
 mod peripheral_ic;
 
-use crate::{driver, exception, memory};
+use crate::{
+    driver, exception,
+    memory::{Address, Virtual},
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -28,6 +31,7 @@ pub type PeripheralIRQ =
 
 /// Used for the associated type of trait [`exception::asynchronous::interface::IRQManager`].
 #[derive(Copy, Clone)]
+#[allow(missing_docs)]
 pub enum IRQNumber {
     Local(LocalIRQ),
     Peripheral(PeripheralIRQ),
@@ -36,6 +40,7 @@ pub enum IRQNumber {
 /// Representation of the Interrupt Controller.
 pub struct InterruptController {
     periph: peripheral_ic::PeripheralIC,
+    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -74,17 +79,20 @@ impl InterruptController {
     const MAX_PERIPHERAL_IRQ_NUMBER: usize = 63;
     const NUM_PERIPHERAL_IRQS: usize = Self::MAX_PERIPHERAL_IRQ_NUMBER + 1;
 
+    pub const COMPATIBLE: &'static str = "BCM Interrupt Controller";
+
     /// Create an instance.
     ///
     /// # Safety
     ///
-    /// - The user must ensure to provide correct MMIO descriptors.
+    /// - The user must ensure to provide a correct MMIO start address.
     pub const unsafe fn new(
-        _local_mmio_descriptor: memory::mmu::MMIODescriptor,
-        periph_mmio_descriptor: memory::mmu::MMIODescriptor,
+        periph_mmio_start_addr: Address<Virtual>,
+        post_init_callback: fn(),
     ) -> Self {
         Self {
-            periph: peripheral_ic::PeripheralIC::new(periph_mmio_descriptor),
+            periph: peripheral_ic::PeripheralIC::new(periph_mmio_start_addr),
+            post_init_callback,
         }
     }
 }
@@ -95,11 +103,13 @@ impl InterruptController {
 
 impl driver::interface::DeviceDriver for InterruptController {
     fn compatible(&self) -> &'static str {
-        "BCM Interrupt Controller"
+        Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
-        self.periph.init()
+        (self.post_init_callback)();
+
+        Ok(())
     }
 }
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index f09da862f..145d89612 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -7,7 +7,9 @@
 use super::{InterruptController, PendingIRQs, PeripheralIRQ};
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper,
-    driver, exception, memory, synchronization,
+    exception,
+    memory::{Address, Virtual},
+    synchronization,
     synchronization::{IRQSafeNullLock, InitStateLock},
 };
 use tock_registers::{
@@ -55,13 +57,11 @@ type HandlerTable =
 
 /// Representation of the peripheral interrupt controller.
 pub struct PeripheralIC {
-    mmio_descriptor: memory::mmu::MMIODescriptor,
-
     /// Access to write registers is guarded with a lock.
     wo_registers: IRQSafeNullLock<WriteOnlyRegisters>,
 
     /// Register read access is unguarded.
-    ro_registers: InitStateLock<ReadOnlyRegisters>,
+    ro_registers: ReadOnlyRegisters,
 
     /// Stores registered IRQ handlers. Writable only during kernel init. RO afterwards.
     handler_table: InitStateLock<HandlerTable>,
@@ -76,26 +76,21 @@ impl PeripheralIC {
     ///
     /// # Safety
     ///
-    /// - The user must ensure to provide correct MMIO descriptors.
-    pub const unsafe fn new(mmio_descriptor: memory::mmu::MMIODescriptor) -> Self {
-        let addr = mmio_descriptor.start_addr().as_usize();
-
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
         Self {
-            mmio_descriptor,
-            wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(addr)),
-            ro_registers: InitStateLock::new(ReadOnlyRegisters::new(addr)),
+            wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(mmio_start_addr)),
+            ro_registers: ReadOnlyRegisters::new(mmio_start_addr),
             handler_table: InitStateLock::new([None; InterruptController::NUM_PERIPHERAL_IRQS]),
         }
     }
 
     /// Query the list of pending IRQs.
     fn pending_irqs(&self) -> PendingIRQs {
-        self.ro_registers.read(|regs| {
-            let pending_mask: u64 =
-                (u64::from(regs.PENDING_2.get()) << 32) | u64::from(regs.PENDING_1.get());
+        let pending_mask: u64 = (u64::from(self.ro_registers.PENDING_2.get()) << 32)
+            | u64::from(self.ro_registers.PENDING_1.get());
 
-            PendingIRQs::new(pending_mask)
-        })
+        PendingIRQs::new(pending_mask)
     }
 }
 
@@ -104,24 +99,6 @@ impl PeripheralIC {
 //------------------------------------------------------------------------------
 use synchronization::interface::{Mutex, ReadWriteEx};
 
-impl driver::interface::DeviceDriver for PeripheralIC {
-    fn compatible(&self) -> &'static str {
-        "BCM Peripheral Interrupt Controller"
-    }
-
-    unsafe fn init(&self) -> Result<(), &'static str> {
-        let virt_addr =
-            memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?.as_usize();
-
-        self.wo_registers
-            .lock(|regs| *regs = WriteOnlyRegisters::new(virt_addr));
-        self.ro_registers
-            .write(|regs| *regs = ReadOnlyRegisters::new(virt_addr));
-
-        Ok(())
-    }
-}
-
 impl exception::asynchronous::interface::IRQManager for PeripheralIC {
     type IRQNumberType = PeripheralIRQ;
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 3133047b1..f67d70dfb 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -10,13 +10,14 @@
 //! - <https://developer.arm.com/documentation/ddi0183/latest>
 
 use crate::{
-    bsp, bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, exception, memory,
-    synchronization, synchronization::IRQSafeNullLock,
-};
-use core::{
-    fmt,
-    sync::atomic::{AtomicUsize, Ordering},
+    bsp,
+    bsp::device_driver::common::MMIODerefWrapper,
+    console, cpu, driver, exception,
+    memory::{Address, Virtual},
+    synchronization,
+    synchronization::IRQSafeNullLock,
 };
+use core::fmt;
 use tock_registers::{
     interfaces::{Readable, Writeable},
     register_bitfields, register_structs,
@@ -219,29 +220,25 @@ enum BlockingMode {
     NonBlocking,
 }
 
-//--------------------------------------------------------------------------------------------------
-// Public Definitions
-//--------------------------------------------------------------------------------------------------
-
-pub struct PL011UartInner {
+struct PL011UartInner {
     registers: Registers,
     chars_written: usize,
     chars_read: usize,
 }
 
-// Export the inner struct so that BSPs can use it for the panic handler.
-pub use PL011UartInner as PanicUart;
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
 
 /// Representation of the UART.
 pub struct PL011Uart {
-    mmio_descriptor: memory::mmu::MMIODescriptor,
-    virt_mmio_start_addr: AtomicUsize,
     inner: IRQSafeNullLock<PL011UartInner>,
     irq_number: bsp::device_driver::IRQNumber,
+    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
-// Public Code
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
 impl PL011UartInner {
@@ -250,7 +247,7 @@ impl PL011UartInner {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
         Self {
             registers: Registers::new(mmio_start_addr),
             chars_written: 0,
@@ -275,15 +272,7 @@ impl PL011UartInner {
     /// genrated baud rate of `48_000_000 / (16 * 3.25) = 923_077`.
     ///
     /// Error = `((923_077 - 921_600) / 921_600) * 100 = 0.16%`.
-    ///
-    /// # Safety
-    ///
-    /// - The user must ensure to provide a correct MMIO start address.
-    pub unsafe fn init(&mut self, new_mmio_start_addr: Option<usize>) -> Result<(), &'static str> {
-        if let Some(addr) = new_mmio_start_addr {
-            self.registers = Registers::new(addr);
-        }
-
+    pub fn init(&mut self) {
         // Execution can arrive here while there are still characters queued in the TX FIFO and
         // actively being sent out by the UART hardware. If the UART is turned off in this case,
         // those queued characters would be lost.
@@ -325,8 +314,6 @@ impl PL011UartInner {
         self.registers
             .CR
             .write(CR::UARTEN::Enabled + CR::TXE::Enabled + CR::RXE::Enabled);
-
-        Ok(())
     }
 
     /// Send a character.
@@ -399,24 +386,28 @@ impl fmt::Write for PL011UartInner {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
 impl PL011Uart {
+    pub const COMPATIBLE: &'static str = "BCM PL011 UART";
+
     /// Create an instance.
     ///
     /// # Safety
     ///
-    /// - The user must ensure to provide correct MMIO descriptors.
+    /// - The user must ensure to provide a correct MMIO start address.
     /// - The user must ensure to provide correct IRQ numbers.
     pub const unsafe fn new(
-        mmio_descriptor: memory::mmu::MMIODescriptor,
+        mmio_start_addr: Address<Virtual>,
         irq_number: bsp::device_driver::IRQNumber,
+        post_init_callback: fn(),
     ) -> Self {
         Self {
-            mmio_descriptor,
-            virt_mmio_start_addr: AtomicUsize::new(0),
-            inner: IRQSafeNullLock::new(PL011UartInner::new(
-                mmio_descriptor.start_addr().as_usize(),
-            )),
+            inner: IRQSafeNullLock::new(PL011UartInner::new(mmio_start_addr)),
             irq_number,
+            post_init_callback,
         }
     }
 }
@@ -428,27 +419,21 @@ use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for PL011Uart {
     fn compatible(&self) -> &'static str {
-        "BCM PL011 UART"
+        Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
-        let virt_addr = memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?;
-
-        self.inner
-            .lock(|inner| inner.init(Some(virt_addr.as_usize())))?;
-
-        self.virt_mmio_start_addr
-            .store(virt_addr.as_usize(), Ordering::Relaxed);
+        self.inner.lock(|inner| inner.init());
+        (self.post_init_callback)();
 
         Ok(())
     }
 
     fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
-        use bsp::exception::asynchronous::irq_manager;
-        use exception::asynchronous::{interface::IRQManager, IRQDescriptor};
+        use exception::asynchronous::{irq_manager, IRQDescriptor};
 
         let descriptor = IRQDescriptor {
-            name: "BCM PL011 UART",
+            name: Self::COMPATIBLE,
             handler: self,
         };
 
@@ -457,16 +442,6 @@ impl driver::interface::DeviceDriver for PL011Uart {
 
         Ok(())
     }
-
-    fn virt_mmio_start_addr(&self) -> Option<usize> {
-        let addr = self.virt_mmio_start_addr.load(Ordering::Relaxed);
-
-        if addr == 0 {
-            return None;
-        }
-
-        Some(addr)
-    }
 }
 
 impl console::interface::Write for PL011Uart {
@@ -514,6 +489,8 @@ impl console::interface::Statistics for PL011Uart {
     }
 }
 
+impl console::interface::All for PL011Uart {}
+
 impl exception::asynchronous::interface::IRQHandler for PL011Uart {
     fn handle(&self) -> Result<(), &'static str> {
         self.inner.lock(|inner| {
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/common.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/common.rs
index fd9e988ea..69f038d4d 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/common.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/common.rs
@@ -4,6 +4,7 @@
 
 //! Common device driver code.
 
+use crate::memory::{Address, Virtual};
 use core::{marker::PhantomData, ops};
 
 //--------------------------------------------------------------------------------------------------
@@ -11,7 +12,7 @@ use core::{marker::PhantomData, ops};
 //--------------------------------------------------------------------------------------------------
 
 pub struct MMIODerefWrapper<T> {
-    start_addr: usize,
+    start_addr: Address<Virtual>,
     phantom: PhantomData<fn() -> T>,
 }
 
@@ -21,7 +22,7 @@ pub struct MMIODerefWrapper<T> {
 
 impl<T> MMIODerefWrapper<T> {
     /// Create an instance.
-    pub const unsafe fn new(start_addr: usize) -> Self {
+    pub const unsafe fn new(start_addr: Address<Virtual>) -> Self {
         Self {
             start_addr,
             phantom: PhantomData,
@@ -33,6 +34,6 @@ impl<T> ops::Deref for MMIODerefWrapper<T> {
     type Target = T;
 
     fn deref(&self) -> &Self::Target {
-        unsafe { &*(self.start_addr as *const _) }
+        unsafe { &*(self.start_addr.as_usize() as *const _) }
     }
 }
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi.rs
index fb9edf88d..474419f4e 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi.rs
@@ -4,46 +4,11 @@
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
-pub mod console;
 pub mod cpu;
 pub mod driver;
 pub mod exception;
 pub mod memory;
 
-use super::device_driver;
-use crate::memory::mmu::MMIODescriptor;
-use memory::map::mmio;
-
-//--------------------------------------------------------------------------------------------------
-// Global instances
-//--------------------------------------------------------------------------------------------------
-
-static GPIO: device_driver::GPIO =
-    unsafe { device_driver::GPIO::new(MMIODescriptor::new(mmio::GPIO_START, mmio::GPIO_SIZE)) };
-
-static PL011_UART: device_driver::PL011Uart = unsafe {
-    device_driver::PL011Uart::new(
-        MMIODescriptor::new(mmio::PL011_UART_START, mmio::PL011_UART_SIZE),
-        exception::asynchronous::irq_map::PL011_UART,
-    )
-};
-
-#[cfg(feature = "bsp_rpi3")]
-static INTERRUPT_CONTROLLER: device_driver::InterruptController = unsafe {
-    device_driver::InterruptController::new(
-        MMIODescriptor::new(mmio::LOCAL_IC_START, mmio::LOCAL_IC_SIZE),
-        MMIODescriptor::new(mmio::PERIPHERAL_IC_START, mmio::PERIPHERAL_IC_SIZE),
-    )
-};
-
-#[cfg(feature = "bsp_rpi4")]
-static INTERRUPT_CONTROLLER: device_driver::GICv2 = unsafe {
-    device_driver::GICv2::new(
-        MMIODescriptor::new(mmio::GICD_START, mmio::GICD_SIZE),
-        MMIODescriptor::new(mmio::GICC_START, mmio::GICC_SIZE),
-    )
-};
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/console.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/console.rs
deleted file mode 100644
index c75bf9be4..000000000
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/console.rs
+++ /dev/null
@@ -1,62 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
-
-//! BSP console facilities.
-
-use super::memory;
-use crate::{bsp::device_driver, console, cpu, driver};
-use core::fmt;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// In case of a panic, the panic handler uses this function to take a last shot at printing
-/// something before the system is halted.
-///
-/// We try to init panic-versions of the GPIO and the UART. The panic versions are not protected
-/// with synchronization primitives, which increases chances that we get to print something, even
-/// when the kernel's default GPIO or UART instances happen to be locked at the time of the panic.
-///
-/// # Safety
-///
-/// - Use only for printing during a panic.
-pub unsafe fn panic_console_out() -> impl fmt::Write {
-    use driver::interface::DeviceDriver;
-
-    let mut panic_gpio = device_driver::PanicGPIO::new(memory::map::mmio::GPIO_START.as_usize());
-    let mut panic_uart =
-        device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START.as_usize());
-
-    // If remapping of the driver's MMIO already happened, take the remapped start address.
-    // Otherwise, take a chance with the default physical address.
-    let maybe_gpio_mmio_start_addr = super::GPIO.virt_mmio_start_addr();
-    let maybe_uart_mmio_start_addr = super::PL011_UART.virt_mmio_start_addr();
-
-    panic_gpio
-        .init(maybe_gpio_mmio_start_addr)
-        .unwrap_or_else(|_| cpu::wait_forever());
-    panic_gpio.map_pl011_uart();
-    panic_uart
-        .init(maybe_uart_mmio_start_addr)
-        .unwrap_or_else(|_| cpu::wait_forever());
-
-    panic_uart
-}
-
-/// Return a reference to the console.
-pub fn console() -> &'static impl console::interface::All {
-    &super::PL011_UART
-}
-
-//--------------------------------------------------------------------------------------------------
-// Testing
-//--------------------------------------------------------------------------------------------------
-
-/// Minimal code needed to bring up the console in QEMU (for testing only). This is often less steps
-/// than on real hardware due to QEMU's abstractions.
-///
-/// For the RPi, nothing needs to be done.
-#[cfg(feature = "test_build")]
-pub fn qemu_bring_up_console() {}
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/driver.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/driver.rs
index 531687524..e1db4a005 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/driver.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/driver.rs
@@ -4,7 +4,19 @@
 
 //! BSP driver support.
 
-use crate::driver;
+use super::{exception, memory::map::mmio};
+use crate::{
+    bsp::device_driver,
+    console, driver, exception as generic_exception, memory,
+    memory::mmu::MMIODescriptor,
+    synchronization::{interface::ReadWriteEx, InitStateLock},
+};
+use core::{
+    mem::MaybeUninit,
+    sync::atomic::{AtomicBool, Ordering},
+};
+
+pub use device_driver::IRQNumber;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -12,21 +24,132 @@ use crate::driver;
 
 /// Device Driver Manager type.
 struct BSPDriverManager {
-    device_drivers: [&'static (dyn DeviceDriver + Sync); 3],
+    device_drivers: InitStateLock<[Option<&'static (dyn DeviceDriver + Sync)>; NUM_DRIVERS]>,
+    init_done: AtomicBool,
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// The number of active drivers provided by this BSP.
+pub const NUM_DRIVERS: usize = 3;
+
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
+static mut PL011_UART: MaybeUninit<device_driver::PL011Uart> = MaybeUninit::uninit();
+static mut GPIO: MaybeUninit<device_driver::GPIO> = MaybeUninit::uninit();
+
+#[cfg(feature = "bsp_rpi3")]
+static mut INTERRUPT_CONTROLLER: MaybeUninit<device_driver::InterruptController> =
+    MaybeUninit::uninit();
+
+#[cfg(feature = "bsp_rpi4")]
+static mut INTERRUPT_CONTROLLER: MaybeUninit<device_driver::GICv2> = MaybeUninit::uninit();
+
 static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
-    device_drivers: [
-        &super::GPIO,
-        &super::PL011_UART,
-        &super::INTERRUPT_CONTROLLER,
-    ],
+    device_drivers: InitStateLock::new([None; NUM_DRIVERS]),
+    init_done: AtomicBool::new(false),
 };
 
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl BSPDriverManager {
+    unsafe fn instantiate_uart(&self) -> Result<(), &'static str> {
+        let mmio_descriptor = MMIODescriptor::new(mmio::PL011_UART_START, mmio::PL011_UART_SIZE);
+        let virt_addr =
+            memory::mmu::kernel_map_mmio(device_driver::PL011Uart::COMPATIBLE, &mmio_descriptor)?;
+
+        // This is safe to do, because it is only called from the init'ed instance itself.
+        fn uart_post_init() {
+            console::register_console(unsafe { PL011_UART.assume_init_ref() });
+        }
+
+        PL011_UART.write(device_driver::PL011Uart::new(
+            virt_addr,
+            exception::asynchronous::irq_map::PL011_UART,
+            uart_post_init,
+        ));
+
+        Ok(())
+    }
+
+    unsafe fn instantiate_gpio(&self) -> Result<(), &'static str> {
+        let mmio_descriptor = MMIODescriptor::new(mmio::GPIO_START, mmio::GPIO_SIZE);
+        let virt_addr =
+            memory::mmu::kernel_map_mmio(device_driver::GPIO::COMPATIBLE, &mmio_descriptor)?;
+
+        // This is safe to do, because it is only called from the init'ed instance itself.
+        fn gpio_post_init() {
+            unsafe { GPIO.assume_init_ref().map_pl011_uart() };
+        }
+
+        GPIO.write(device_driver::GPIO::new(virt_addr, gpio_post_init));
+
+        Ok(())
+    }
+
+    #[cfg(feature = "bsp_rpi3")]
+    unsafe fn instantiate_interrupt_controller(&self) -> Result<(), &'static str> {
+        let periph_mmio_descriptor =
+            MMIODescriptor::new(mmio::PERIPHERAL_IC_START, mmio::PERIPHERAL_IC_SIZE);
+        let periph_virt_addr = memory::mmu::kernel_map_mmio(
+            device_driver::InterruptController::COMPATIBLE,
+            &periph_mmio_descriptor,
+        )?;
+
+        // This is safe to do, because it is only called from the init'ed instance itself.
+        fn interrupt_controller_post_init() {
+            generic_exception::asynchronous::register_irq_manager(unsafe {
+                INTERRUPT_CONTROLLER.assume_init_ref()
+            });
+        }
+
+        INTERRUPT_CONTROLLER.write(device_driver::InterruptController::new(
+            periph_virt_addr,
+            interrupt_controller_post_init,
+        ));
+
+        Ok(())
+    }
+
+    #[cfg(feature = "bsp_rpi4")]
+    unsafe fn instantiate_interrupt_controller(&self) -> Result<(), &'static str> {
+        let gicd_mmio_descriptor = MMIODescriptor::new(mmio::GICD_START, mmio::GICD_SIZE);
+        let gicd_virt_addr = memory::mmu::kernel_map_mmio("GICv2 GICD", &gicd_mmio_descriptor)?;
+
+        let gicc_mmio_descriptor = MMIODescriptor::new(mmio::GICC_START, mmio::GICC_SIZE);
+        let gicc_virt_addr = memory::mmu::kernel_map_mmio("GICV2 GICC", &gicc_mmio_descriptor)?;
+
+        // This is safe to do, because it is only called from the init'ed instance itself.
+        fn interrupt_controller_post_init() {
+            generic_exception::asynchronous::register_irq_manager(unsafe {
+                INTERRUPT_CONTROLLER.assume_init_ref()
+            });
+        }
+
+        INTERRUPT_CONTROLLER.write(device_driver::GICv2::new(
+            gicd_virt_addr,
+            gicc_virt_addr,
+            interrupt_controller_post_init,
+        ));
+
+        Ok(())
+    }
+
+    unsafe fn register_drivers(&self) {
+        self.device_drivers.write(|drivers| {
+            drivers[0] = Some(PL011_UART.assume_init_ref());
+            drivers[1] = Some(GPIO.assume_init_ref());
+            drivers[2] = Some(INTERRUPT_CONTROLLER.assume_init_ref());
+        });
+    }
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -42,20 +165,34 @@ pub fn driver_manager() -> &'static impl driver::interface::DriverManager {
 use driver::interface::DeviceDriver;
 
 impl driver::interface::DriverManager for BSPDriverManager {
-    fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
-        &self.device_drivers[..]
-    }
+    unsafe fn instantiate_drivers(&self) -> Result<(), &'static str> {
+        if self.init_done.load(Ordering::Relaxed) {
+            return Err("Drivers already instantiated");
+        }
+
+        self.instantiate_uart()?;
+        self.instantiate_gpio()?;
+        self.instantiate_interrupt_controller()?;
 
-    fn early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
-        &self.device_drivers[0..=1]
+        self.register_drivers();
+
+        self.init_done.store(true, Ordering::Relaxed);
+        Ok(())
     }
 
-    fn non_early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
-        &self.device_drivers[2..]
+    fn all_device_drivers(&self) -> [&(dyn DeviceDriver + Sync); NUM_DRIVERS] {
+        self.device_drivers
+            .read(|drivers| drivers.map(|drivers| drivers.unwrap()))
     }
 
-    fn post_early_print_device_driver_init(&self) {
-        // Configure PL011Uart's output pins.
-        super::GPIO.map_pl011_uart();
+    #[cfg(feature = "test_build")]
+    fn qemu_bring_up_console(&self) {
+        use crate::cpu;
+
+        unsafe {
+            self.instantiate_uart()
+                .unwrap_or_else(|_| cpu::qemu_exit_failure());
+            console::register_console(PL011_UART.assume_init_ref());
+        };
     }
 }
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/exception/asynchronous.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
index dc5ab4215..ab20d86d3 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
@@ -4,7 +4,7 @@
 
 //! BSP asynchronous exception handling.
 
-use crate::{bsp, exception};
+use crate::bsp;
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -23,14 +23,3 @@ pub(in crate::bsp) mod irq_map {
 
     pub const PL011_UART: IRQNumber = IRQNumber::new(153);
 }
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return a reference to the IRQ manager.
-pub fn irq_manager() -> &'static impl exception::asynchronous::interface::IRQManager<
-    IRQNumberType = bsp::device_driver::IRQNumber,
-> {
-    &super::super::INTERRUPT_CONTROLLER
-}
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/memory.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/memory.rs
index 660409bbd..7d6e7911d 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/memory.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/memory.rs
@@ -107,9 +107,6 @@ pub(super) mod map {
         pub const PL011_UART_START:    Address<Physical> = Address::new(0x3F20_1000);
         pub const PL011_UART_SIZE:     usize             =              0x48;
 
-        pub const LOCAL_IC_START:      Address<Physical> = Address::new(0x4000_0000);
-        pub const LOCAL_IC_SIZE:       usize             =              0x100;
-
         pub const END:                 Address<Physical> = Address::new(0x4001_0000);
     }
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/console.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/console.rs
index e49e241fe..a85bcffe7 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/console.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/console.rs
@@ -4,6 +4,10 @@
 
 //! System console.
 
+mod null_console;
+
+use crate::synchronization;
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -49,5 +53,29 @@ pub mod interface {
     }
 
     /// Trait alias for a full-fledged console.
-    pub trait All = Write + Read + Statistics;
+    pub trait All: Write + Read + Statistics {}
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static CUR_CONSOLE: InitStateLock<&'static (dyn interface::All + Sync)> =
+    InitStateLock::new(&null_console::NULL_CONSOLE);
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+use synchronization::{interface::ReadWriteEx, InitStateLock};
+
+/// Register a new console.
+pub fn register_console(new_console: &'static (dyn interface::All + Sync)) {
+    CUR_CONSOLE.write(|con| *con = new_console);
+}
+
+/// Return a reference to the currently registered console.
+///
+/// This is the global console used by all printing macros.
+pub fn console() -> &'static dyn interface::All {
+    CUR_CONSOLE.read(|con| *con)
 }
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/console/null_console.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/console/null_console.rs
new file mode 100644
index 000000000..10c3bedc0
--- /dev/null
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/console/null_console.rs
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Null console.
+
+use super::interface;
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct NullConsole;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+pub static NULL_CONSOLE: NullConsole = NullConsole {};
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl interface::Write for NullConsole {
+    fn write_char(&self, _c: char) {}
+
+    fn write_fmt(&self, _args: fmt::Arguments) -> fmt::Result {
+        fmt::Result::Ok(())
+    }
+
+    fn flush(&self) {}
+}
+
+impl interface::Read for NullConsole {
+    fn clear_rx(&self) {}
+}
+
+impl interface::Statistics for NullConsole {}
+impl interface::All for NullConsole {}
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/driver.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/driver.rs
index 7b800dbc3..98197fef3 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/driver.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/driver.rs
@@ -10,6 +10,8 @@
 
 /// Driver interfaces.
 pub mod interface {
+    use crate::bsp;
+
     /// Device Driver functions.
     pub trait DeviceDriver {
         /// Return a compatibility string for identifying the driver.
@@ -31,32 +33,25 @@ pub mod interface {
         fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
             Ok(())
         }
-
-        /// After MMIO remapping, returns the new virtual start address.
-        ///
-        /// This API assumes a driver has only a single, contiguous MMIO aperture, which will not be
-        /// the case for more complex devices. This API will likely change in future tutorials.
-        fn virt_mmio_start_addr(&self) -> Option<usize> {
-            None
-        }
     }
 
     /// Device driver management functions.
     ///
     /// The `BSP` is supposed to supply one global instance.
     pub trait DriverManager {
-        /// Return a slice of references to all `BSP`-instantiated drivers.
-        fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
-
-        /// Return only those drivers needed for the BSP's early printing functionality.
+        /// Instantiate all drivers.
+        ///
+        /// # Safety
         ///
-        /// For example, the default UART.
-        fn early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
+        /// Must be called before `all_device_drivers`.
+        unsafe fn instantiate_drivers(&self) -> Result<(), &'static str>;
 
-        /// Return all drivers minus early-print drivers.
-        fn non_early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
+        /// Return a slice of references to all `BSP`-instantiated drivers.
+        fn all_device_drivers(&self) -> [&(dyn DeviceDriver + Sync); bsp::driver::NUM_DRIVERS];
 
-        /// Initialization code that runs after the early print driver init.
-        fn post_early_print_device_driver_init(&self);
+        /// Minimal code needed to bring up the console in QEMU (for testing only). This is often
+        /// less steps than on real hardware due to QEMU's abstractions.
+        #[cfg(feature = "test_build")]
+        fn qemu_bring_up_console(&self);
     }
 }
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous.rs
index fb1785c23..d9d2767cf 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous.rs
@@ -7,7 +7,9 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "../_arch/aarch64/exception/asynchronous.rs"]
 mod arch_asynchronous;
+mod null_irq_manager;
 
+use crate::{bsp, synchronization};
 use core::{fmt, marker::PhantomData};
 
 //--------------------------------------------------------------------------------------------------
@@ -85,7 +87,7 @@ pub mod interface {
         );
 
         /// Print list of registered handlers.
-        fn print_handler(&self);
+        fn print_handler(&self) {}
     }
 }
 
@@ -93,9 +95,18 @@ pub mod interface {
 #[derive(Copy, Clone)]
 pub struct IRQNumber<const MAX_INCLUSIVE: usize>(usize);
 
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static CUR_IRQ_MANAGER: InitStateLock<
+    &'static (dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber> + Sync),
+> = InitStateLock::new(&null_irq_manager::NULL_IRQ_MANAGER);
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
+use synchronization::{interface::ReadWriteEx, InitStateLock};
 
 impl<'irq_context> IRQContext<'irq_context> {
     /// Creates an IRQContext token.
@@ -150,3 +161,18 @@ pub fn exec_with_irq_masked<T>(f: impl FnOnce() -> T) -> T {
 
     ret
 }
+
+/// Register a new IRQ manager.
+pub fn register_irq_manager(
+    new_manager: &'static (dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber>
+                  + Sync),
+) {
+    CUR_IRQ_MANAGER.write(|manager| *manager = new_manager);
+}
+
+/// Return a reference to the currently registered IRQ manager.
+///
+/// This is the IRQ manager used by the architectural interrupt handling code.
+pub fn irq_manager() -> &'static dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber> {
+    CUR_IRQ_MANAGER.read(|manager| *manager)
+}
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous/null_irq_manager.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous/null_irq_manager.rs
new file mode 100644
index 000000000..560e3ce4b
--- /dev/null
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous/null_irq_manager.rs
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Null IRQ Manager.
+
+use super::{interface, IRQContext, IRQDescriptor};
+use crate::bsp;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct NullIRQManager;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+pub static NULL_IRQ_MANAGER: NullIRQManager = NullIRQManager {};
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl interface::IRQManager for NullIRQManager {
+    type IRQNumberType = bsp::driver::IRQNumber;
+
+    fn register_handler(
+        &self,
+        _irq_number: Self::IRQNumberType,
+        _descriptor: IRQDescriptor,
+    ) -> Result<(), &'static str> {
+        panic!("No IRQ Manager registered yet");
+    }
+
+    fn enable(&self, _irq_number: Self::IRQNumberType) {
+        panic!("No IRQ Manager registered yet");
+    }
+
+    fn handle_pending_irqs<'irq_context>(&'irq_context self, _ic: &IRQContext<'irq_context>) {
+        panic!("No IRQ Manager registered yet");
+    }
+}
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
index aeab8c22a..ac57da95f 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
@@ -114,6 +114,7 @@
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(generic_const_exprs)]
+#![feature(is_sorted)]
 #![feature(linkage)]
 #![feature(panic_info_message)]
 #![feature(step_trait)]
@@ -181,9 +182,23 @@ pub fn test_runner(tests: &[&test_types::UnitTest]) {
 #[cfg(test)]
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
     exception::handling_init();
+
+    let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
+        Err(string) => panic!("Error mapping kernel binary: {}", string),
+        Ok(addr) => addr,
+    };
+
+    if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
+        panic!("Enabling MMU failed: {}", e);
+    }
+    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
+
     memory::mmu::post_enable_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
+    // Printing available again from here on.
 
     test_main();
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/main.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/main.rs
index 17edcfd97..7574522c7 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/main.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/main.rs
@@ -42,26 +42,16 @@ unsafe fn kernel_init() -> ! {
 
     memory::mmu::post_enable_init();
 
-    // Bring up the drivers needed for printing first.
-    for i in bsp::driver::driver_manager()
-        .early_print_device_drivers()
-        .iter()
-    {
-        // Any encountered errors cannot be printed yet, obviously, so just safely park the CPU.
-        i.init().unwrap_or_else(|_| cpu::wait_forever());
+    // Instantiate and init all device drivers.
+    if let Err(x) = bsp::driver::driver_manager().instantiate_drivers() {
+        panic!("Error instantiating drivers: {}", x);
     }
-    bsp::driver::driver_manager().post_early_print_device_driver_init();
-    // Printing available again from here on.
-
-    // Now bring up the remaining drivers.
-    for i in bsp::driver::driver_manager()
-        .non_early_print_device_drivers()
-        .iter()
-    {
+    for i in bsp::driver::driver_manager().all_device_drivers().iter() {
         if let Err(x) = i.init() {
             panic!("Error loading driver: {}: {}", i.compatible(), x);
         }
     }
+    // Printing available again from here on.
 
     // Let device drivers register and enable their handlers with the interrupt controller.
     for i in bsp::driver::driver_manager().all_device_drivers() {
@@ -83,7 +73,6 @@ unsafe fn kernel_init() -> ! {
 /// The main function running after the early init.
 fn kernel_main() -> ! {
     use driver::interface::DriverManager;
-    use exception::asynchronous::interface::IRQManager;
 
     info!("{}", libkernel::version());
     info!("Booting on: {}", bsp::board_name());
@@ -112,7 +101,7 @@ fn kernel_main() -> ! {
     }
 
     info!("Registered IRQ handlers:");
-    bsp::exception::asynchronous::irq_manager().print_handler();
+    exception::asynchronous::irq_manager().print_handler();
 
     info!("Echoing input now");
     cpu::wait_forever();
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/memory.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/memory.rs
index f20719bb7..64d8cf64e 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/memory.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/memory.rs
@@ -18,18 +18,18 @@ use core::{
 //--------------------------------------------------------------------------------------------------
 
 /// Metadata trait for marking the type of an address.
-pub trait AddressType: Copy + Clone + PartialOrd + PartialEq {}
+pub trait AddressType: Copy + Clone + PartialOrd + PartialEq + Ord + Eq {}
 
 /// Zero-sized type to mark a physical address.
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq, Ord, Eq)]
 pub enum Physical {}
 
 /// Zero-sized type to mark a virtual address.
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq, Ord, Eq)]
 pub enum Virtual {}
 
 /// Generic address type.
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq, Ord, Eq)]
 pub struct Address<ATYPE: AddressType> {
     value: usize,
     _address_type: PhantomData<fn() -> ATYPE>,
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/mapping_record.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/mapping_record.rs
index d171c6e67..7d3a6c601 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/mapping_record.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/mapping_record.rs
@@ -76,6 +76,19 @@ impl MappingRecord {
         Self { inner: [None; 12] }
     }
 
+    fn size(&self) -> usize {
+        self.inner.iter().filter(|x| x.is_some()).count()
+    }
+
+    fn sort(&mut self) {
+        let upper_bound_exclusive = self.size();
+        let entries = &mut self.inner[0..upper_bound_exclusive];
+
+        if !entries.is_sorted_by_key(|item| item.unwrap().virt_start_addr) {
+            entries.sort_unstable_by_key(|item| item.unwrap().virt_start_addr)
+        }
+    }
+
     fn find_next_free(&mut self) -> Result<&mut Option<MappingRecordEntry>, &'static str> {
         if let Some(x) = self.inner.iter_mut().find(|x| x.is_none()) {
             return Ok(x);
@@ -121,6 +134,9 @@ impl MappingRecord {
             phys_region,
             attr,
         ));
+
+        self.sort();
+
         Ok(())
     }
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/panic_wait.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/panic_wait.rs
index 08d7d4533..e4256b616 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/panic_wait.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/panic_wait.rs
@@ -4,19 +4,13 @@
 
 //! A panic handler that infinitely waits.
 
-use crate::{bsp, cpu, exception};
-use core::{fmt, panic::PanicInfo};
+use crate::{cpu, exception, println};
+use core::panic::PanicInfo;
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-fn _panic_print(args: fmt::Arguments) {
-    use fmt::Write;
-
-    unsafe { bsp::console::panic_console_out().write_fmt(args).unwrap() };
-}
-
 /// The point of exit for `libkernel`.
 ///
 /// It is linked weakly, so that the integration tests can overload its standard behavior.
@@ -34,16 +28,6 @@ fn _panic_exit() -> ! {
     }
 }
 
-/// Prints with a newline - only use from the panic handler.
-///
-/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
-#[macro_export]
-macro_rules! panic_println {
-    ($($arg:tt)*) => ({
-        _panic_print(format_args_nl!($($arg)*));
-    })
-}
-
 /// Stop immediately if called a second time.
 ///
 /// # Note
@@ -88,7 +72,7 @@ fn panic(info: &PanicInfo) -> ! {
         _ => ("???", 0, 0),
     };
 
-    panic_println!(
+    println!(
         "[  {:>3}.{:06}] Kernel panic!\n\n\
         Panic location:\n      File '{}', line {}, column {}\n\n\
         {}",
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/print.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/print.rs
index 9ec13a286..8705eec0d 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/print.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/print.rs
@@ -4,7 +4,7 @@
 
 //! Printing.
 
-use crate::{bsp, console};
+use crate::console;
 use core::fmt;
 
 //--------------------------------------------------------------------------------------------------
@@ -13,9 +13,7 @@ use core::fmt;
 
 #[doc(hidden)]
 pub fn _print(args: fmt::Arguments) {
-    use console::interface::Write;
-
-    bsp::console::console().write_fmt(args).unwrap();
+    console::console().write_fmt(args).unwrap();
 }
 
 /// Prints without a newline.
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rs b/14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rs
index dccb6cc2a..a2338d2f7 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rs
@@ -11,15 +11,28 @@
 /// Console tests should time out on the I/O harness in case of panic.
 mod panic_wait_forever;
 
-use libkernel::{bsp, console, cpu, exception, print};
+use libkernel::{bsp, console, cpu, driver, exception, memory, print};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use bsp::console::console;
-    use console::interface::*;
+    use console::console;
+    use driver::interface::DriverManager;
 
     exception::handling_init();
-    bsp::console::qemu_bring_up_console();
+
+    let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
+        Err(string) => panic!("Error mapping kernel binary: {}", string),
+        Ok(addr) => addr,
+    };
+
+    if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
+        panic!("Enabling MMU failed: {}", e);
+    }
+    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
+
+    memory::mmu::post_enable_init();
+    bsp::driver::driver_manager().qemu_bring_up_console();
+    // Printing available again from here on.
 
     // Handshake
     assert_eq!(console().read_char(), 'A');
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/tests/01_timer_sanity.rs b/14_virtual_mem_part2_mmio_remap/kernel/tests/01_timer_sanity.rs
index 59ef4a7f7..4b4e90e46 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/tests/01_timer_sanity.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/tests/01_timer_sanity.rs
@@ -11,13 +11,28 @@
 #![test_runner(libkernel::test_runner)]
 
 use core::time::Duration;
-use libkernel::{bsp, cpu, exception, time, time::interface::TimeManager};
+use libkernel::{bsp, cpu, driver, exception, memory, time, time::interface::TimeManager};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
     exception::handling_init();
-    bsp::console::qemu_bring_up_console();
+
+    let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
+        Err(string) => panic!("Error mapping kernel binary: {}", string),
+        Ok(addr) => addr,
+    };
+
+    if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
+        panic!("Enabling MMU failed: {}", e);
+    }
+    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
+
+    memory::mmu::post_enable_init();
+    bsp::driver::driver_manager().qemu_bring_up_console();
+    // Printing available again from here on.
 
     // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fault.rs b/14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fault.rs
index e146aa3ee..209517ac6 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fault.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fault.rs
@@ -17,11 +17,11 @@
 /// or indirectly.
 mod panic_exit_success;
 
-use libkernel::{bsp, cpu, exception, info, memory, println};
+use libkernel::{bsp, cpu, driver, exception, info, memory, println};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use libkernel::driver::interface::DriverManager;
+    use driver::interface::DriverManager;
 
     exception::handling_init();
 
@@ -43,17 +43,7 @@ unsafe fn kernel_init() -> ! {
     // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
 
     memory::mmu::post_enable_init();
-    bsp::console::qemu_bring_up_console();
-
-    // Bring up the drivers needed for printing first.
-    for i in bsp::driver::driver_manager()
-        .early_print_device_drivers()
-        .iter()
-    {
-        // Any encountered errors cannot be printed yet, obviously, so just safely park the CPU.
-        i.init().unwrap_or_else(|_| cpu::qemu_exit_failure());
-    }
-    bsp::driver::driver_manager().post_early_print_device_driver_init();
+    bsp::driver::driver_manager().qemu_bring_up_console();
     // Printing available again from here on.
 
     info!("Writing beyond mapped area to address 9 GiB...");
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rs b/14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rs
index c6ff7b3d9..babc31e2a 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rs
@@ -12,7 +12,7 @@
 mod panic_wait_forever;
 
 use core::arch::asm;
-use libkernel::{bsp, cpu, exception, info, memory, println};
+use libkernel::{bsp, cpu, driver, exception, info, memory, println};
 
 #[inline(never)]
 fn nested_system_call() {
@@ -30,7 +30,7 @@ fn nested_system_call() {
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use libkernel::driver::interface::DriverManager;
+    use driver::interface::DriverManager;
 
     exception::handling_init();
 
@@ -52,17 +52,7 @@ unsafe fn kernel_init() -> ! {
     // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
 
     memory::mmu::post_enable_init();
-    bsp::console::qemu_bring_up_console();
-
-    // Bring up the drivers needed for printing first.
-    for i in bsp::driver::driver_manager()
-        .early_print_device_drivers()
-        .iter()
-    {
-        // Any encountered errors cannot be printed yet, obviously, so just safely park the CPU.
-        i.init().unwrap_or_else(|_| cpu::qemu_exit_failure());
-    }
-    bsp::driver::driver_manager().post_early_print_device_driver_init();
+    bsp::driver::driver_manager().qemu_bring_up_console();
     // Printing available again from here on.
 
     info!("Making a dummy system call");
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.rs b/14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.rs
index e1e025548..872cc0080 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.rs
@@ -10,14 +10,29 @@
 #![reexport_test_harness_main = "test_main"]
 #![test_runner(libkernel::test_runner)]
 
-use libkernel::{bsp, cpu, exception};
+use libkernel::{bsp, cpu, driver, exception, memory};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    bsp::console::qemu_bring_up_console();
+    use driver::interface::DriverManager;
 
     exception::handling_init();
+
+    let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
+        Err(string) => panic!("Error mapping kernel binary: {}", string),
+        Ok(addr) => addr,
+    };
+
+    if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
+        panic!("Enabling MMU failed: {}", e);
+    }
+    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
+
+    memory::mmu::post_enable_init();
+    bsp::driver::driver_manager().qemu_bring_up_console();
+    // Printing available again from here on.
+
     exception::asynchronous::local_irq_unmask();
 
     test_main();
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index b34c06b71..5a07f34b6 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -775,22 +775,22 @@ Minipush 1.0
            Raspberry Pi 3
 
 [ML] Requesting binary
-[MP] ⏩ Pushing 259 KiB ======================================🦀 100% 129 KiB/s Time: 00:00:02
+[MP] ⏩ Pushing 257 KiB ======================================🦀 100% 128 KiB/s Time: 00:00:02
 [ML] Loaded! Executing the payload now
 
-[    2.891133] mingo version 0.15.0
-[    2.891341] Booting on: Raspberry Pi 3
-[    2.891796] MMU online:
-[    2.892088]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    2.893833]                         Virtual                                   Physical               Size       Attr                    Entity
-[    2.895577]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    2.897322]       0x0000_0000_0000_0000..0x0000_0000_0007_ffff --> 0x00_0000_0000..0x00_0007_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
-[    2.898925]       0x0000_0000_0008_0000..0x0000_0000_0008_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
-[    2.900538]       0x0000_0000_0009_0000..0x0000_0000_000c_ffff --> 0x00_0009_0000..0x00_000c_ffff | 256 KiB | C   RW XN | Kernel data and bss
-[    2.902109]       0x0000_0000_000d_0000..0x0000_0000_000d_ffff --> 0x00_3f20_0000..0x00_3f20_ffff |  64 KiB | Dev RW XN | BCM GPIO
-[    2.903561]                                                                                                             | BCM PL011 UART
-[    2.905078]       0x0000_0000_000e_0000..0x0000_0000_000e_ffff --> 0x00_3f00_0000..0x00_3f00_ffff |  64 KiB | Dev RW XN | BCM Peripheral Interrupt Controller
-[    2.906822]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    2.866917] mingo version 0.15.0
+[    2.867125] Booting on: Raspberry Pi 3
+[    2.867580] MMU online:
+[    2.867872]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    2.869616]                         Virtual                                   Physical               Size       Attr                    Entity
+[    2.871360]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    2.873105]       0x0000_0000_0000_0000..0x0000_0000_0007_ffff --> 0x00_0000_0000..0x00_0007_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
+[    2.874709]       0x0000_0000_0008_0000..0x0000_0000_0008_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
+[    2.876322]       0x0000_0000_0009_0000..0x0000_0000_000c_ffff --> 0x00_0009_0000..0x00_000c_ffff | 256 KiB | C   RW XN | Kernel data and bss
+[    2.877893]       0x0000_0000_000d_0000..0x0000_0000_000d_ffff --> 0x00_3f20_0000..0x00_3f20_ffff |  64 KiB | Dev RW XN | BCM PL011 UART
+[    2.879410]                                                                                                             | BCM GPIO
+[    2.880861]       0x0000_0000_000e_0000..0x0000_0000_000e_ffff --> 0x00_3f00_0000..0x00_3f00_ffff |  64 KiB | Dev RW XN | BCM Interrupt Controller
+[    2.882487]       -------------------------------------------------------------------------------------------------------------------------------------------
 ```
 
 ## Diff to previous
@@ -1065,65 +1065,6 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/memory/mmu/tr
 
  //--------------------------------------------------------------------------------------------------
 
-diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/console.rs 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/console.rs
---- 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/console.rs
-+++ 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/console.rs
-@@ -22,6 +22,7 @@
- /// # Safety
- ///
- /// - Use only for printing during a panic.
-+#[cfg(not(feature = "test_build"))]
- pub unsafe fn panic_console_out() -> impl fmt::Write {
-     use driver::interface::DeviceDriver;
-
-@@ -45,6 +46,27 @@
-     panic_uart
- }
-
-+/// Reduced version for test builds.
-+///
-+/// # Safety
-+///
-+/// - Use only for printing during a panic.
-+#[cfg(feature = "test_build")]
-+pub unsafe fn panic_console_out() -> impl fmt::Write {
-+    use driver::interface::DeviceDriver;
-+
-+    let mut panic_uart =
-+        device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START.as_usize());
-+
-+    let maybe_uart_mmio_start_addr = super::PL011_UART.virt_mmio_start_addr();
-+
-+    panic_uart
-+        .init(maybe_uart_mmio_start_addr)
-+        .unwrap_or_else(|_| cpu::qemu_exit_failure());
-+
-+    panic_uart
-+}
-+
- /// Return a reference to the console.
- pub fn console() -> &'static impl console::interface::All {
-     &super::PL011_UART
-@@ -56,7 +78,15 @@
-
- /// Minimal code needed to bring up the console in QEMU (for testing only). This is often less steps
- /// than on real hardware due to QEMU's abstractions.
--///
--/// For the RPi, nothing needs to be done.
- #[cfg(feature = "test_build")]
--pub fn qemu_bring_up_console() {}
-+pub fn qemu_bring_up_console() {
-+    use driver::interface::DeviceDriver;
-+
-+    // Calling the UART's init ensures that the BSP's instance of the UART does remap the MMIO
-+    // addresses.
-+    unsafe {
-+        super::PL011_UART
-+            .init()
-+            .unwrap_or_else(|_| cpu::qemu_exit_failure());
-+    }
-+}
-
 diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/kernel.ld 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/kernel.ld
 --- 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/kernel.ld
 +++ 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/kernel.ld
@@ -1371,10 +1312,35 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/memory/mmu.
 +    );
  }
 
+diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs 15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs
+--- 14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
++++ 15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs
+@@ -185,20 +185,8 @@
+     use driver::interface::DriverManager;
+
+     exception::handling_init();
+-
+-    let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
+-        Err(string) => panic!("Error mapping kernel binary: {}", string),
+-        Ok(addr) => addr,
+-    };
+-
+-    if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
+-        panic!("Enabling MMU failed: {}", e);
+-    }
+-    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
+-
+     memory::mmu::post_enable_init();
+     bsp::driver::driver_manager().qemu_bring_up_console();
+-    // Printing available again from here on.
+
+     test_main();
+
+
 diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/main.rs 15_virtual_mem_part3_precomputed_tables/kernel/src/main.rs
 --- 14_virtual_mem_part2_mmio_remap/kernel/src/main.rs
 +++ 15_virtual_mem_part3_precomputed_tables/kernel/src/main.rs
-@@ -17,31 +17,23 @@
+@@ -17,29 +17,17 @@
 
  /// Early init code.
  ///
@@ -1406,22 +1372,24 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/main.rs 15_virtual_mem_part
 -
      memory::mmu::post_enable_init();
 
-+    // Add the mapping records for the precomputed entries first, so that they appear on the top of
-+    // the list.
-+    bsp::memory::mmu::kernel_add_mapping_records_for_precomputed();
-+
-     // Bring up the drivers needed for printing first.
-     for i in bsp::driver::driver_manager()
-         .early_print_device_drivers()
-@@ -51,7 +43,7 @@
-         i.init().unwrap_or_else(|_| cpu::wait_forever());
+     // Instantiate and init all device drivers.
+@@ -51,7 +39,6 @@
+             panic!("Error loading driver: {}: {}", i.compatible(), x);
+         }
      }
-     bsp::driver::driver_manager().post_early_print_device_driver_init();
 -    // Printing available again from here on.
-+    // Printing available from here on.
 
-     // Now bring up the remaining drivers.
-     for i in bsp::driver::driver_manager()
+     // Let device drivers register and enable their handlers with the interrupt controller.
+     for i in bsp::driver::driver_manager().all_device_drivers() {
+@@ -60,6 +47,8 @@
+         }
+     }
+
++    bsp::memory::mmu::kernel_add_mapping_records_for_precomputed();
++
+     // Unmask interrupts on the boot CPU core.
+     exception::asynchronous::local_irq_unmask();
+
 
 diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/translation_table.rs 15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/translation_table.rs
 --- 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/translation_table.rs
@@ -1685,57 +1653,66 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu.rs 15_virtual_me
 diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rs 15_virtual_mem_part3_precomputed_tables/kernel/tests/00_console_sanity.rs
 --- 14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rs
 +++ 15_virtual_mem_part3_precomputed_tables/kernel/tests/00_console_sanity.rs
-@@ -11,7 +11,7 @@
- /// Console tests should time out on the I/O harness in case of panic.
- mod panic_wait_forever;
-
--use libkernel::{bsp, console, cpu, exception, print};
-+use libkernel::{bsp, console, cpu, exception, memory, print};
-
- #[no_mangle]
- unsafe fn kernel_init() -> ! {
-@@ -19,6 +19,7 @@
-     use console::interface::*;
+@@ -19,20 +19,8 @@
+     use driver::interface::DriverManager;
 
      exception::handling_init();
-+    memory::mmu::post_enable_init();
-     bsp::console::qemu_bring_up_console();
+-
+-    let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
+-        Err(string) => panic!("Error mapping kernel binary: {}", string),
+-        Ok(addr) => addr,
+-    };
+-
+-    if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
+-        panic!("Enabling MMU failed: {}", e);
+-    }
+-    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
+-
+     memory::mmu::post_enable_init();
+     bsp::driver::driver_manager().qemu_bring_up_console();
+-    // Printing available again from here on.
 
      // Handshake
+     assert_eq!(console().read_char(), 'A');
 
 diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/01_timer_sanity.rs 15_virtual_mem_part3_precomputed_tables/kernel/tests/01_timer_sanity.rs
 --- 14_virtual_mem_part2_mmio_remap/kernel/tests/01_timer_sanity.rs
 +++ 15_virtual_mem_part3_precomputed_tables/kernel/tests/01_timer_sanity.rs
-@@ -11,12 +11,13 @@
- #![test_runner(libkernel::test_runner)]
-
- use core::time::Duration;
--use libkernel::{bsp, cpu, exception, time, time::interface::TimeManager};
-+use libkernel::{bsp, cpu, exception, memory, time, time::interface::TimeManager};
- use test_macros::kernel_test;
+@@ -19,20 +19,8 @@
+     use driver::interface::DriverManager;
 
- #[no_mangle]
- unsafe fn kernel_init() -> ! {
      exception::handling_init();
-+    memory::mmu::post_enable_init();
-     bsp::console::qemu_bring_up_console();
+-
+-    let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
+-        Err(string) => panic!("Error mapping kernel binary: {}", string),
+-        Ok(addr) => addr,
+-    };
+-
+-    if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
+-        panic!("Enabling MMU failed: {}", e);
+-    }
+-    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
+-
+     memory::mmu::post_enable_init();
+     bsp::driver::driver_manager().qemu_bring_up_console();
+-    // Printing available again from here on.
 
      // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
 
+
 diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fault.rs 15_virtual_mem_part3_precomputed_tables/kernel/tests/02_exception_sync_page_fault.rs
 --- 14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fault.rs
 +++ 15_virtual_mem_part3_precomputed_tables/kernel/tests/02_exception_sync_page_fault.rs
-@@ -21,40 +21,12 @@
+@@ -24,28 +24,12 @@
+     use driver::interface::DriverManager;
 
- #[no_mangle]
- unsafe fn kernel_init() -> ! {
--    use libkernel::driver::interface::DriverManager;
--
      exception::handling_init();
--
--    // This line will be printed as the test header.
--    println!("Testing synchronous exception handling by causing a page fault");
--
++    memory::mmu::post_enable_init();
++    bsp::driver::driver_manager().qemu_bring_up_console();
+
+     // This line will be printed as the test header.
+     println!("Testing synchronous exception handling by causing a page fault");
+
 -    let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
 -        Err(string) => {
 -            info!("Error mapping kernel binary: {}", string);
@@ -1750,39 +1727,27 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fa
 -    }
 -    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
 -
-     memory::mmu::post_enable_init();
-     bsp::console::qemu_bring_up_console();
-
--    // Bring up the drivers needed for printing first.
--    for i in bsp::driver::driver_manager()
--        .early_print_device_drivers()
--        .iter()
--    {
--        // Any encountered errors cannot be printed yet, obviously, so just safely park the CPU.
--        i.init().unwrap_or_else(|_| cpu::qemu_exit_failure());
--    }
--    bsp::driver::driver_manager().post_early_print_device_driver_init();
+-    memory::mmu::post_enable_init();
+-    bsp::driver::driver_manager().qemu_bring_up_console();
 -    // Printing available again from here on.
-+    // This line will be printed as the test header.
-+    println!("Testing synchronous exception handling by causing a page fault");
-
+-
      info!("Writing beyond mapped area to address 9 GiB...");
      let big_addr: u64 = 9 * 1024 * 1024 * 1024;
+     core::ptr::read_volatile(big_addr as *mut u64);
 
 diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rs 15_virtual_mem_part3_precomputed_tables/kernel/tests/03_exception_restore_sanity.rs
 --- 14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rs
 +++ 15_virtual_mem_part3_precomputed_tables/kernel/tests/03_exception_restore_sanity.rs
-@@ -30,40 +30,12 @@
+@@ -33,28 +33,12 @@
+     use driver::interface::DriverManager;
 
- #[no_mangle]
- unsafe fn kernel_init() -> ! {
--    use libkernel::driver::interface::DriverManager;
--
      exception::handling_init();
--
--    // This line will be printed as the test header.
--    println!("Testing exception restore");
--
++    memory::mmu::post_enable_init();
++    bsp::driver::driver_manager().qemu_bring_up_console();
+
+     // This line will be printed as the test header.
+     println!("Testing exception restore");
+
 -    let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
 -        Err(string) => {
 -            info!("Error mapping kernel binary: {}", string);
@@ -1797,42 +1762,41 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sani
 -    }
 -    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
 -
-     memory::mmu::post_enable_init();
-     bsp::console::qemu_bring_up_console();
-
--    // Bring up the drivers needed for printing first.
--    for i in bsp::driver::driver_manager()
--        .early_print_device_drivers()
--        .iter()
--    {
--        // Any encountered errors cannot be printed yet, obviously, so just safely park the CPU.
--        i.init().unwrap_or_else(|_| cpu::qemu_exit_failure());
--    }
--    bsp::driver::driver_manager().post_early_print_device_driver_init();
+-    memory::mmu::post_enable_init();
+-    bsp::driver::driver_manager().qemu_bring_up_console();
 -    // Printing available again from here on.
-+    // This line will be printed as the test header.
-+    println!("Testing exception restore");
-
+-
      info!("Making a dummy system call");
 
+     // Calling this inside a function indirectly tests if the link register is restored properly.
 
 diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.rs 15_virtual_mem_part3_precomputed_tables/kernel/tests/04_exception_irq_sanity.rs
 --- 14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.rs
 +++ 15_virtual_mem_part3_precomputed_tables/kernel/tests/04_exception_irq_sanity.rs
-@@ -10,11 +10,12 @@
- #![reexport_test_harness_main = "test_main"]
- #![test_runner(libkernel::test_runner)]
+@@ -17,22 +17,10 @@
+ unsafe fn kernel_init() -> ! {
+     use driver::interface::DriverManager;
 
--use libkernel::{bsp, cpu, exception};
-+use libkernel::{bsp, cpu, exception, memory};
- use test_macros::kernel_test;
+-    exception::handling_init();
+-
+-    let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
+-        Err(string) => panic!("Error mapping kernel binary: {}", string),
+-        Ok(addr) => addr,
+-    };
+-
+-    if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
+-        panic!("Enabling MMU failed: {}", e);
+-    }
+-    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
+-
+     memory::mmu::post_enable_init();
+     bsp::driver::driver_manager().qemu_bring_up_console();
+-    // Printing available again from here on.
 
- #[no_mangle]
- unsafe fn kernel_init() -> ! {
-+    memory::mmu::post_enable_init();
-     bsp::console::qemu_bring_up_console();
++    exception::handling_init();
+     exception::asynchronous::local_irq_unmask();
 
-     exception::handling_init();
+     test_main();
 
 diff -uNr 14_virtual_mem_part2_mmio_remap/Makefile 15_virtual_mem_part3_precomputed_tables/Makefile
 --- 14_virtual_mem_part2_mmio_remap/Makefile
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception.rs
index 662c91b94..fa6748a6d 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::exception::arch_exception
 
-use crate::{bsp, exception};
+use crate::exception;
 use core::{arch::global_asm, cell::UnsafeCell, fmt};
 use cortex_a::{asm::barrier, registers::*};
 use tock_registers::{
@@ -104,10 +104,8 @@ unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
 
 #[no_mangle]
 unsafe extern "C" fn current_elx_irq(_e: &mut ExceptionContext) {
-    use exception::asynchronous::interface::IRQManager;
-
     let token = &exception::asynchronous::IRQContext::new();
-    bsp::exception::asynchronous::irq_manager().handle_pending_irqs(token);
+    exception::asynchronous::irq_manager().handle_pending_irqs(token);
 }
 
 #[no_mangle]
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2.rs
index 4c68a6929..e72fde7be 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2.rs
@@ -79,8 +79,12 @@
 mod gicc;
 mod gicd;
 
-use crate::{bsp, cpu, driver, exception, memory, synchronization, synchronization::InitStateLock};
-use core::sync::atomic::{AtomicBool, Ordering};
+use crate::{
+    bsp, cpu, driver, exception,
+    memory::{Address, Virtual},
+    synchronization,
+    synchronization::InitStateLock,
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -97,20 +101,17 @@ pub type IRQNumber = exception::asynchronous::IRQNumber<{ GICv2::MAX_IRQ_NUMBER
 
 /// Representation of the GIC.
 pub struct GICv2 {
-    gicd_mmio_descriptor: memory::mmu::MMIODescriptor,
-    gicc_mmio_descriptor: memory::mmu::MMIODescriptor,
-
     /// The Distributor.
     gicd: gicd::GICD,
 
     /// The CPU Interface.
     gicc: gicc::GICC,
 
-    /// Have the MMIO regions been remapped yet?
-    is_mmio_remapped: AtomicBool,
-
     /// Stores registered IRQ handlers. Writable only during kernel init. RO afterwards.
     handler_table: InitStateLock<HandlerTable>,
+
+    /// Callback to be invoked after successful init.
+    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -121,22 +122,23 @@ impl GICv2 {
     const MAX_IRQ_NUMBER: usize = 300; // Normally 1019, but keep it lower to save some space.
     const NUM_IRQS: usize = Self::MAX_IRQ_NUMBER + 1;
 
+    pub const COMPATIBLE: &'static str = "GICv2 (ARM Generic Interrupt Controller v2)";
+
     /// Create an instance.
     ///
     /// # Safety
     ///
-    /// - The user must ensure to provide correct MMIO descriptors.
+    /// - The user must ensure to provide a correct MMIO start address.
     pub const unsafe fn new(
-        gicd_mmio_descriptor: memory::mmu::MMIODescriptor,
-        gicc_mmio_descriptor: memory::mmu::MMIODescriptor,
+        gicd_mmio_start_addr: Address<Virtual>,
+        gicc_mmio_start_addr: Address<Virtual>,
+        post_init_callback: fn(),
     ) -> Self {
         Self {
-            gicd_mmio_descriptor,
-            gicc_mmio_descriptor,
-            gicd: gicd::GICD::new(gicd_mmio_descriptor.start_addr().as_usize()),
-            gicc: gicc::GICC::new(gicc_mmio_descriptor.start_addr().as_usize()),
-            is_mmio_remapped: AtomicBool::new(false),
+            gicd: gicd::GICD::new(gicd_mmio_start_addr),
+            gicc: gicc::GICC::new(gicc_mmio_start_addr),
             handler_table: InitStateLock::new([None; Self::NUM_IRQS]),
+            post_init_callback,
         }
     }
 }
@@ -148,24 +150,10 @@ use synchronization::interface::ReadWriteEx;
 
 impl driver::interface::DeviceDriver for GICv2 {
     fn compatible(&self) -> &'static str {
-        "GICv2 (ARM Generic Interrupt Controller v2)"
+        Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
-        let remapped = self.is_mmio_remapped.load(Ordering::Relaxed);
-        if !remapped {
-            // GICD
-            let mut virt_addr = memory::mmu::kernel_map_mmio("GICD", &self.gicd_mmio_descriptor)?;
-            self.gicd.set_mmio(virt_addr.as_usize());
-
-            // GICC
-            virt_addr = memory::mmu::kernel_map_mmio("GICC", &self.gicc_mmio_descriptor)?;
-            self.gicc.set_mmio(virt_addr.as_usize());
-
-            // Conclude remapping.
-            self.is_mmio_remapped.store(true, Ordering::Relaxed);
-        }
-
         if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
             self.gicd.boot_core_init();
         }
@@ -173,6 +161,8 @@ impl driver::interface::DeviceDriver for GICv2 {
         self.gicc.priority_accept_all();
         self.gicc.enable();
 
+        (self.post_init_callback)();
+
         Ok(())
     }
 }
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
index 1a151d246..1a02fc650 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
@@ -5,7 +5,9 @@
 //! GICC Driver - GIC CPU interface.
 
 use crate::{
-    bsp::device_driver::common::MMIODerefWrapper, exception, synchronization::InitStateLock,
+    bsp::device_driver::common::MMIODerefWrapper,
+    exception,
+    memory::{Address, Virtual},
 };
 use tock_registers::{
     interfaces::{Readable, Writeable},
@@ -62,13 +64,12 @@ type Registers = MMIODerefWrapper<RegisterBlock>;
 
 /// Representation of the GIC CPU interface.
 pub struct GICC {
-    registers: InitStateLock<Registers>,
+    registers: Registers,
 }
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
-use crate::synchronization::interface::ReadWriteEx;
 
 impl GICC {
     /// Create an instance.
@@ -76,17 +77,12 @@ impl GICC {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
         Self {
-            registers: InitStateLock::new(Registers::new(mmio_start_addr)),
+            registers: Registers::new(mmio_start_addr),
         }
     }
 
-    pub unsafe fn set_mmio(&self, new_mmio_start_addr: usize) {
-        self.registers
-            .write(|regs| *regs = Registers::new(new_mmio_start_addr));
-    }
-
     /// Accept interrupts of any priority.
     ///
     /// Quoting the GICv2 Architecture Specification:
@@ -99,9 +95,7 @@ impl GICC {
     /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
     ///   of `&mut self`.
     pub fn priority_accept_all(&self) {
-        self.registers.read(|regs| {
-            regs.PMR.write(PMR::Priority.val(255)); // Comment in arch spec.
-        });
+        self.registers.PMR.write(PMR::Priority.val(255)); // Comment in arch spec.
     }
 
     /// Enable the interface - start accepting IRQs.
@@ -111,9 +105,7 @@ impl GICC {
     /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
     ///   of `&mut self`.
     pub fn enable(&self) {
-        self.registers.read(|regs| {
-            regs.CTLR.write(CTLR::Enable::SET);
-        });
+        self.registers.CTLR.write(CTLR::Enable::SET);
     }
 
     /// Extract the number of the highest-priority pending IRQ.
@@ -129,8 +121,7 @@ impl GICC {
         &self,
         _ic: &exception::asynchronous::IRQContext<'irq_context>,
     ) -> usize {
-        self.registers
-            .read(|regs| regs.IAR.read(IAR::InterruptID) as usize)
+        self.registers.IAR.read(IAR::InterruptID) as usize
     }
 
     /// Complete handling of the currently active IRQ.
@@ -149,8 +140,6 @@ impl GICC {
         irq_number: u32,
         _ic: &exception::asynchronous::IRQContext<'irq_context>,
     ) {
-        self.registers.read(|regs| {
-            regs.EOIR.write(EOIR::EOIINTID.val(irq_number));
-        });
+        self.registers.EOIR.write(EOIR::EOIINTID.val(irq_number));
     }
 }
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
index 60bbc4689..d9f63d1bb 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -9,8 +9,9 @@
 
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper,
+    memory::{Address, Virtual},
     state, synchronization,
-    synchronization::{IRQSafeNullLock, InitStateLock},
+    synchronization::IRQSafeNullLock,
 };
 use tock_registers::{
     interfaces::{Readable, Writeable},
@@ -84,7 +85,7 @@ pub struct GICD {
     shared_registers: IRQSafeNullLock<SharedRegisters>,
 
     /// Access to banked registers is unguarded.
-    banked_registers: InitStateLock<BankedRegisters>,
+    banked_registers: BankedRegisters,
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -121,7 +122,6 @@ impl SharedRegisters {
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
-use crate::synchronization::interface::ReadWriteEx;
 use synchronization::interface::Mutex;
 
 impl GICD {
@@ -130,20 +130,13 @@ impl GICD {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
         Self {
             shared_registers: IRQSafeNullLock::new(SharedRegisters::new(mmio_start_addr)),
-            banked_registers: InitStateLock::new(BankedRegisters::new(mmio_start_addr)),
+            banked_registers: BankedRegisters::new(mmio_start_addr),
         }
     }
 
-    pub unsafe fn set_mmio(&self, new_mmio_start_addr: usize) {
-        self.shared_registers
-            .lock(|regs| *regs = SharedRegisters::new(new_mmio_start_addr));
-        self.banked_registers
-            .write(|regs| *regs = BankedRegisters::new(new_mmio_start_addr));
-    }
-
     /// Use a banked ITARGETSR to retrieve the executing core's GIC target mask.
     ///
     /// Quoting the GICv2 Architecture Specification:
@@ -151,8 +144,7 @@ impl GICD {
     ///   "GICD_ITARGETSR0 to GICD_ITARGETSR7 are read-only, and each field returns a value that
     ///    corresponds only to the processor reading the register."
     fn local_gic_target_mask(&self) -> u32 {
-        self.banked_registers
-            .read(|regs| regs.ITARGETSR[0].read(ITARGETSR::Offset0))
+        self.banked_registers.ITARGETSR[0].read(ITARGETSR::Offset0)
     }
 
     /// Route all SPIs to the boot core and enable the distributor.
@@ -191,10 +183,10 @@ impl GICD {
         // Check if we are handling a private or shared IRQ.
         match irq_num {
             // Private.
-            0..=31 => self.banked_registers.read(|regs| {
-                let enable_reg = &regs.ISENABLER;
+            0..=31 => {
+                let enable_reg = &self.banked_registers.ISENABLER;
                 enable_reg.set(enable_reg.get() | enable_bit);
-            }),
+            }
             // Shared.
             _ => {
                 let enable_reg_index_shared = enable_reg_index - 1;
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index eea07b755..a3361c2cc 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -5,10 +5,12 @@
 //! GPIO Driver.
 
 use crate::{
-    bsp::device_driver::common::MMIODerefWrapper, driver, memory, synchronization,
+    bsp::device_driver::common::MMIODerefWrapper,
+    driver,
+    memory::{Address, Virtual},
+    synchronization,
     synchronization::IRQSafeNullLock,
 };
-use core::sync::atomic::{AtomicUsize, Ordering};
 use tock_registers::{
     interfaces::{ReadWriteable, Writeable},
     register_bitfields, register_structs,
@@ -109,26 +111,22 @@ register_structs! {
 /// Abstraction for the associated MMIO registers.
 type Registers = MMIODerefWrapper<RegisterBlock>;
 
-//--------------------------------------------------------------------------------------------------
-// Public Definitions
-//--------------------------------------------------------------------------------------------------
-
-pub struct GPIOInner {
+struct GPIOInner {
     registers: Registers,
 }
 
-// Export the inner struct so that BSPs can use it for the panic handler.
-pub use GPIOInner as PanicGPIO;
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
 
 /// Representation of the GPIO HW.
 pub struct GPIO {
-    mmio_descriptor: memory::mmu::MMIODescriptor,
-    virt_mmio_start_addr: AtomicUsize,
     inner: IRQSafeNullLock<GPIOInner>,
+    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
-// Public Code
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
 impl GPIOInner {
@@ -137,25 +135,12 @@ impl GPIOInner {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
         Self {
             registers: Registers::new(mmio_start_addr),
         }
     }
 
-    /// Init code.
-    ///
-    /// # Safety
-    ///
-    /// - The user must ensure to provide a correct MMIO start address.
-    pub unsafe fn init(&mut self, new_mmio_start_addr: Option<usize>) -> Result<(), &'static str> {
-        if let Some(addr) = new_mmio_start_addr {
-            self.registers = Registers::new(addr);
-        }
-
-        Ok(())
-    }
-
     /// Disable pull-up/down on pins 14 and 15.
     #[cfg(feature = "bsp_rpi3")]
     fn disable_pud_14_15_bcm2837(&mut self) {
@@ -205,17 +190,22 @@ impl GPIOInner {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
 impl GPIO {
+    pub const COMPATIBLE: &'static str = "BCM GPIO";
+
     /// Create an instance.
     ///
     /// # Safety
     ///
-    /// - The user must ensure to provide correct MMIO descriptors.
-    pub const unsafe fn new(mmio_descriptor: memory::mmu::MMIODescriptor) -> Self {
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>, post_init_callback: fn()) -> Self {
         Self {
-            mmio_descriptor,
-            virt_mmio_start_addr: AtomicUsize::new(0),
-            inner: IRQSafeNullLock::new(GPIOInner::new(mmio_descriptor.start_addr().as_usize())),
+            inner: IRQSafeNullLock::new(GPIOInner::new(mmio_start_addr)),
+            post_init_callback,
         }
     }
 
@@ -232,28 +222,12 @@ use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for GPIO {
     fn compatible(&self) -> &'static str {
-        "BCM GPIO"
+        Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
-        let virt_addr = memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?;
-
-        self.inner
-            .lock(|inner| inner.init(Some(virt_addr.as_usize())))?;
-
-        self.virt_mmio_start_addr
-            .store(virt_addr.as_usize(), Ordering::Relaxed);
+        (self.post_init_callback)();
 
         Ok(())
     }
-
-    fn virt_mmio_start_addr(&self) -> Option<usize> {
-        let addr = self.virt_mmio_start_addr.load(Ordering::Relaxed);
-
-        if addr == 0 {
-            return None;
-        }
-
-        Some(addr)
-    }
 }
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
index 99961facb..4908b8b67 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -6,7 +6,10 @@
 
 mod peripheral_ic;
 
-use crate::{driver, exception, memory};
+use crate::{
+    driver, exception,
+    memory::{Address, Virtual},
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -28,6 +31,7 @@ pub type PeripheralIRQ =
 
 /// Used for the associated type of trait [`exception::asynchronous::interface::IRQManager`].
 #[derive(Copy, Clone)]
+#[allow(missing_docs)]
 pub enum IRQNumber {
     Local(LocalIRQ),
     Peripheral(PeripheralIRQ),
@@ -36,6 +40,7 @@ pub enum IRQNumber {
 /// Representation of the Interrupt Controller.
 pub struct InterruptController {
     periph: peripheral_ic::PeripheralIC,
+    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -74,17 +79,20 @@ impl InterruptController {
     const MAX_PERIPHERAL_IRQ_NUMBER: usize = 63;
     const NUM_PERIPHERAL_IRQS: usize = Self::MAX_PERIPHERAL_IRQ_NUMBER + 1;
 
+    pub const COMPATIBLE: &'static str = "BCM Interrupt Controller";
+
     /// Create an instance.
     ///
     /// # Safety
     ///
-    /// - The user must ensure to provide correct MMIO descriptors.
+    /// - The user must ensure to provide a correct MMIO start address.
     pub const unsafe fn new(
-        _local_mmio_descriptor: memory::mmu::MMIODescriptor,
-        periph_mmio_descriptor: memory::mmu::MMIODescriptor,
+        periph_mmio_start_addr: Address<Virtual>,
+        post_init_callback: fn(),
     ) -> Self {
         Self {
-            periph: peripheral_ic::PeripheralIC::new(periph_mmio_descriptor),
+            periph: peripheral_ic::PeripheralIC::new(periph_mmio_start_addr),
+            post_init_callback,
         }
     }
 }
@@ -95,11 +103,13 @@ impl InterruptController {
 
 impl driver::interface::DeviceDriver for InterruptController {
     fn compatible(&self) -> &'static str {
-        "BCM Interrupt Controller"
+        Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
-        self.periph.init()
+        (self.post_init_callback)();
+
+        Ok(())
     }
 }
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index f09da862f..145d89612 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -7,7 +7,9 @@
 use super::{InterruptController, PendingIRQs, PeripheralIRQ};
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper,
-    driver, exception, memory, synchronization,
+    exception,
+    memory::{Address, Virtual},
+    synchronization,
     synchronization::{IRQSafeNullLock, InitStateLock},
 };
 use tock_registers::{
@@ -55,13 +57,11 @@ type HandlerTable =
 
 /// Representation of the peripheral interrupt controller.
 pub struct PeripheralIC {
-    mmio_descriptor: memory::mmu::MMIODescriptor,
-
     /// Access to write registers is guarded with a lock.
     wo_registers: IRQSafeNullLock<WriteOnlyRegisters>,
 
     /// Register read access is unguarded.
-    ro_registers: InitStateLock<ReadOnlyRegisters>,
+    ro_registers: ReadOnlyRegisters,
 
     /// Stores registered IRQ handlers. Writable only during kernel init. RO afterwards.
     handler_table: InitStateLock<HandlerTable>,
@@ -76,26 +76,21 @@ impl PeripheralIC {
     ///
     /// # Safety
     ///
-    /// - The user must ensure to provide correct MMIO descriptors.
-    pub const unsafe fn new(mmio_descriptor: memory::mmu::MMIODescriptor) -> Self {
-        let addr = mmio_descriptor.start_addr().as_usize();
-
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
         Self {
-            mmio_descriptor,
-            wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(addr)),
-            ro_registers: InitStateLock::new(ReadOnlyRegisters::new(addr)),
+            wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(mmio_start_addr)),
+            ro_registers: ReadOnlyRegisters::new(mmio_start_addr),
             handler_table: InitStateLock::new([None; InterruptController::NUM_PERIPHERAL_IRQS]),
         }
     }
 
     /// Query the list of pending IRQs.
     fn pending_irqs(&self) -> PendingIRQs {
-        self.ro_registers.read(|regs| {
-            let pending_mask: u64 =
-                (u64::from(regs.PENDING_2.get()) << 32) | u64::from(regs.PENDING_1.get());
+        let pending_mask: u64 = (u64::from(self.ro_registers.PENDING_2.get()) << 32)
+            | u64::from(self.ro_registers.PENDING_1.get());
 
-            PendingIRQs::new(pending_mask)
-        })
+        PendingIRQs::new(pending_mask)
     }
 }
 
@@ -104,24 +99,6 @@ impl PeripheralIC {
 //------------------------------------------------------------------------------
 use synchronization::interface::{Mutex, ReadWriteEx};
 
-impl driver::interface::DeviceDriver for PeripheralIC {
-    fn compatible(&self) -> &'static str {
-        "BCM Peripheral Interrupt Controller"
-    }
-
-    unsafe fn init(&self) -> Result<(), &'static str> {
-        let virt_addr =
-            memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?.as_usize();
-
-        self.wo_registers
-            .lock(|regs| *regs = WriteOnlyRegisters::new(virt_addr));
-        self.ro_registers
-            .write(|regs| *regs = ReadOnlyRegisters::new(virt_addr));
-
-        Ok(())
-    }
-}
-
 impl exception::asynchronous::interface::IRQManager for PeripheralIC {
     type IRQNumberType = PeripheralIRQ;
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 3133047b1..f67d70dfb 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -10,13 +10,14 @@
 //! - <https://developer.arm.com/documentation/ddi0183/latest>
 
 use crate::{
-    bsp, bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, exception, memory,
-    synchronization, synchronization::IRQSafeNullLock,
-};
-use core::{
-    fmt,
-    sync::atomic::{AtomicUsize, Ordering},
+    bsp,
+    bsp::device_driver::common::MMIODerefWrapper,
+    console, cpu, driver, exception,
+    memory::{Address, Virtual},
+    synchronization,
+    synchronization::IRQSafeNullLock,
 };
+use core::fmt;
 use tock_registers::{
     interfaces::{Readable, Writeable},
     register_bitfields, register_structs,
@@ -219,29 +220,25 @@ enum BlockingMode {
     NonBlocking,
 }
 
-//--------------------------------------------------------------------------------------------------
-// Public Definitions
-//--------------------------------------------------------------------------------------------------
-
-pub struct PL011UartInner {
+struct PL011UartInner {
     registers: Registers,
     chars_written: usize,
     chars_read: usize,
 }
 
-// Export the inner struct so that BSPs can use it for the panic handler.
-pub use PL011UartInner as PanicUart;
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
 
 /// Representation of the UART.
 pub struct PL011Uart {
-    mmio_descriptor: memory::mmu::MMIODescriptor,
-    virt_mmio_start_addr: AtomicUsize,
     inner: IRQSafeNullLock<PL011UartInner>,
     irq_number: bsp::device_driver::IRQNumber,
+    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
-// Public Code
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
 impl PL011UartInner {
@@ -250,7 +247,7 @@ impl PL011UartInner {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
         Self {
             registers: Registers::new(mmio_start_addr),
             chars_written: 0,
@@ -275,15 +272,7 @@ impl PL011UartInner {
     /// genrated baud rate of `48_000_000 / (16 * 3.25) = 923_077`.
     ///
     /// Error = `((923_077 - 921_600) / 921_600) * 100 = 0.16%`.
-    ///
-    /// # Safety
-    ///
-    /// - The user must ensure to provide a correct MMIO start address.
-    pub unsafe fn init(&mut self, new_mmio_start_addr: Option<usize>) -> Result<(), &'static str> {
-        if let Some(addr) = new_mmio_start_addr {
-            self.registers = Registers::new(addr);
-        }
-
+    pub fn init(&mut self) {
         // Execution can arrive here while there are still characters queued in the TX FIFO and
         // actively being sent out by the UART hardware. If the UART is turned off in this case,
         // those queued characters would be lost.
@@ -325,8 +314,6 @@ impl PL011UartInner {
         self.registers
             .CR
             .write(CR::UARTEN::Enabled + CR::TXE::Enabled + CR::RXE::Enabled);
-
-        Ok(())
     }
 
     /// Send a character.
@@ -399,24 +386,28 @@ impl fmt::Write for PL011UartInner {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
 impl PL011Uart {
+    pub const COMPATIBLE: &'static str = "BCM PL011 UART";
+
     /// Create an instance.
     ///
     /// # Safety
     ///
-    /// - The user must ensure to provide correct MMIO descriptors.
+    /// - The user must ensure to provide a correct MMIO start address.
     /// - The user must ensure to provide correct IRQ numbers.
     pub const unsafe fn new(
-        mmio_descriptor: memory::mmu::MMIODescriptor,
+        mmio_start_addr: Address<Virtual>,
         irq_number: bsp::device_driver::IRQNumber,
+        post_init_callback: fn(),
     ) -> Self {
         Self {
-            mmio_descriptor,
-            virt_mmio_start_addr: AtomicUsize::new(0),
-            inner: IRQSafeNullLock::new(PL011UartInner::new(
-                mmio_descriptor.start_addr().as_usize(),
-            )),
+            inner: IRQSafeNullLock::new(PL011UartInner::new(mmio_start_addr)),
             irq_number,
+            post_init_callback,
         }
     }
 }
@@ -428,27 +419,21 @@ use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for PL011Uart {
     fn compatible(&self) -> &'static str {
-        "BCM PL011 UART"
+        Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
-        let virt_addr = memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?;
-
-        self.inner
-            .lock(|inner| inner.init(Some(virt_addr.as_usize())))?;
-
-        self.virt_mmio_start_addr
-            .store(virt_addr.as_usize(), Ordering::Relaxed);
+        self.inner.lock(|inner| inner.init());
+        (self.post_init_callback)();
 
         Ok(())
     }
 
     fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
-        use bsp::exception::asynchronous::irq_manager;
-        use exception::asynchronous::{interface::IRQManager, IRQDescriptor};
+        use exception::asynchronous::{irq_manager, IRQDescriptor};
 
         let descriptor = IRQDescriptor {
-            name: "BCM PL011 UART",
+            name: Self::COMPATIBLE,
             handler: self,
         };
 
@@ -457,16 +442,6 @@ impl driver::interface::DeviceDriver for PL011Uart {
 
         Ok(())
     }
-
-    fn virt_mmio_start_addr(&self) -> Option<usize> {
-        let addr = self.virt_mmio_start_addr.load(Ordering::Relaxed);
-
-        if addr == 0 {
-            return None;
-        }
-
-        Some(addr)
-    }
 }
 
 impl console::interface::Write for PL011Uart {
@@ -514,6 +489,8 @@ impl console::interface::Statistics for PL011Uart {
     }
 }
 
+impl console::interface::All for PL011Uart {}
+
 impl exception::asynchronous::interface::IRQHandler for PL011Uart {
     fn handle(&self) -> Result<(), &'static str> {
         self.inner.lock(|inner| {
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/common.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/common.rs
index fd9e988ea..69f038d4d 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/common.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/common.rs
@@ -4,6 +4,7 @@
 
 //! Common device driver code.
 
+use crate::memory::{Address, Virtual};
 use core::{marker::PhantomData, ops};
 
 //--------------------------------------------------------------------------------------------------
@@ -11,7 +12,7 @@ use core::{marker::PhantomData, ops};
 //--------------------------------------------------------------------------------------------------
 
 pub struct MMIODerefWrapper<T> {
-    start_addr: usize,
+    start_addr: Address<Virtual>,
     phantom: PhantomData<fn() -> T>,
 }
 
@@ -21,7 +22,7 @@ pub struct MMIODerefWrapper<T> {
 
 impl<T> MMIODerefWrapper<T> {
     /// Create an instance.
-    pub const unsafe fn new(start_addr: usize) -> Self {
+    pub const unsafe fn new(start_addr: Address<Virtual>) -> Self {
         Self {
             start_addr,
             phantom: PhantomData,
@@ -33,6 +34,6 @@ impl<T> ops::Deref for MMIODerefWrapper<T> {
     type Target = T;
 
     fn deref(&self) -> &Self::Target {
-        unsafe { &*(self.start_addr as *const _) }
+        unsafe { &*(self.start_addr.as_usize() as *const _) }
     }
 }
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi.rs
index fb9edf88d..474419f4e 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi.rs
@@ -4,46 +4,11 @@
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
-pub mod console;
 pub mod cpu;
 pub mod driver;
 pub mod exception;
 pub mod memory;
 
-use super::device_driver;
-use crate::memory::mmu::MMIODescriptor;
-use memory::map::mmio;
-
-//--------------------------------------------------------------------------------------------------
-// Global instances
-//--------------------------------------------------------------------------------------------------
-
-static GPIO: device_driver::GPIO =
-    unsafe { device_driver::GPIO::new(MMIODescriptor::new(mmio::GPIO_START, mmio::GPIO_SIZE)) };
-
-static PL011_UART: device_driver::PL011Uart = unsafe {
-    device_driver::PL011Uart::new(
-        MMIODescriptor::new(mmio::PL011_UART_START, mmio::PL011_UART_SIZE),
-        exception::asynchronous::irq_map::PL011_UART,
-    )
-};
-
-#[cfg(feature = "bsp_rpi3")]
-static INTERRUPT_CONTROLLER: device_driver::InterruptController = unsafe {
-    device_driver::InterruptController::new(
-        MMIODescriptor::new(mmio::LOCAL_IC_START, mmio::LOCAL_IC_SIZE),
-        MMIODescriptor::new(mmio::PERIPHERAL_IC_START, mmio::PERIPHERAL_IC_SIZE),
-    )
-};
-
-#[cfg(feature = "bsp_rpi4")]
-static INTERRUPT_CONTROLLER: device_driver::GICv2 = unsafe {
-    device_driver::GICv2::new(
-        MMIODescriptor::new(mmio::GICD_START, mmio::GICD_SIZE),
-        MMIODescriptor::new(mmio::GICC_START, mmio::GICC_SIZE),
-    )
-};
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/console.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/console.rs
deleted file mode 100644
index f4105ed77..000000000
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/console.rs
+++ /dev/null
@@ -1,92 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
-
-//! BSP console facilities.
-
-use super::memory;
-use crate::{bsp::device_driver, console, cpu, driver};
-use core::fmt;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// In case of a panic, the panic handler uses this function to take a last shot at printing
-/// something before the system is halted.
-///
-/// We try to init panic-versions of the GPIO and the UART. The panic versions are not protected
-/// with synchronization primitives, which increases chances that we get to print something, even
-/// when the kernel's default GPIO or UART instances happen to be locked at the time of the panic.
-///
-/// # Safety
-///
-/// - Use only for printing during a panic.
-#[cfg(not(feature = "test_build"))]
-pub unsafe fn panic_console_out() -> impl fmt::Write {
-    use driver::interface::DeviceDriver;
-
-    let mut panic_gpio = device_driver::PanicGPIO::new(memory::map::mmio::GPIO_START.as_usize());
-    let mut panic_uart =
-        device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START.as_usize());
-
-    // If remapping of the driver's MMIO already happened, take the remapped start address.
-    // Otherwise, take a chance with the default physical address.
-    let maybe_gpio_mmio_start_addr = super::GPIO.virt_mmio_start_addr();
-    let maybe_uart_mmio_start_addr = super::PL011_UART.virt_mmio_start_addr();
-
-    panic_gpio
-        .init(maybe_gpio_mmio_start_addr)
-        .unwrap_or_else(|_| cpu::wait_forever());
-    panic_gpio.map_pl011_uart();
-    panic_uart
-        .init(maybe_uart_mmio_start_addr)
-        .unwrap_or_else(|_| cpu::wait_forever());
-
-    panic_uart
-}
-
-/// Reduced version for test builds.
-///
-/// # Safety
-///
-/// - Use only for printing during a panic.
-#[cfg(feature = "test_build")]
-pub unsafe fn panic_console_out() -> impl fmt::Write {
-    use driver::interface::DeviceDriver;
-
-    let mut panic_uart =
-        device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START.as_usize());
-
-    let maybe_uart_mmio_start_addr = super::PL011_UART.virt_mmio_start_addr();
-
-    panic_uart
-        .init(maybe_uart_mmio_start_addr)
-        .unwrap_or_else(|_| cpu::qemu_exit_failure());
-
-    panic_uart
-}
-
-/// Return a reference to the console.
-pub fn console() -> &'static impl console::interface::All {
-    &super::PL011_UART
-}
-
-//--------------------------------------------------------------------------------------------------
-// Testing
-//--------------------------------------------------------------------------------------------------
-
-/// Minimal code needed to bring up the console in QEMU (for testing only). This is often less steps
-/// than on real hardware due to QEMU's abstractions.
-#[cfg(feature = "test_build")]
-pub fn qemu_bring_up_console() {
-    use driver::interface::DeviceDriver;
-
-    // Calling the UART's init ensures that the BSP's instance of the UART does remap the MMIO
-    // addresses.
-    unsafe {
-        super::PL011_UART
-            .init()
-            .unwrap_or_else(|_| cpu::qemu_exit_failure());
-    }
-}
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/driver.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/driver.rs
index 531687524..e1db4a005 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/driver.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/driver.rs
@@ -4,7 +4,19 @@
 
 //! BSP driver support.
 
-use crate::driver;
+use super::{exception, memory::map::mmio};
+use crate::{
+    bsp::device_driver,
+    console, driver, exception as generic_exception, memory,
+    memory::mmu::MMIODescriptor,
+    synchronization::{interface::ReadWriteEx, InitStateLock},
+};
+use core::{
+    mem::MaybeUninit,
+    sync::atomic::{AtomicBool, Ordering},
+};
+
+pub use device_driver::IRQNumber;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -12,21 +24,132 @@ use crate::driver;
 
 /// Device Driver Manager type.
 struct BSPDriverManager {
-    device_drivers: [&'static (dyn DeviceDriver + Sync); 3],
+    device_drivers: InitStateLock<[Option<&'static (dyn DeviceDriver + Sync)>; NUM_DRIVERS]>,
+    init_done: AtomicBool,
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// The number of active drivers provided by this BSP.
+pub const NUM_DRIVERS: usize = 3;
+
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
+static mut PL011_UART: MaybeUninit<device_driver::PL011Uart> = MaybeUninit::uninit();
+static mut GPIO: MaybeUninit<device_driver::GPIO> = MaybeUninit::uninit();
+
+#[cfg(feature = "bsp_rpi3")]
+static mut INTERRUPT_CONTROLLER: MaybeUninit<device_driver::InterruptController> =
+    MaybeUninit::uninit();
+
+#[cfg(feature = "bsp_rpi4")]
+static mut INTERRUPT_CONTROLLER: MaybeUninit<device_driver::GICv2> = MaybeUninit::uninit();
+
 static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
-    device_drivers: [
-        &super::GPIO,
-        &super::PL011_UART,
-        &super::INTERRUPT_CONTROLLER,
-    ],
+    device_drivers: InitStateLock::new([None; NUM_DRIVERS]),
+    init_done: AtomicBool::new(false),
 };
 
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl BSPDriverManager {
+    unsafe fn instantiate_uart(&self) -> Result<(), &'static str> {
+        let mmio_descriptor = MMIODescriptor::new(mmio::PL011_UART_START, mmio::PL011_UART_SIZE);
+        let virt_addr =
+            memory::mmu::kernel_map_mmio(device_driver::PL011Uart::COMPATIBLE, &mmio_descriptor)?;
+
+        // This is safe to do, because it is only called from the init'ed instance itself.
+        fn uart_post_init() {
+            console::register_console(unsafe { PL011_UART.assume_init_ref() });
+        }
+
+        PL011_UART.write(device_driver::PL011Uart::new(
+            virt_addr,
+            exception::asynchronous::irq_map::PL011_UART,
+            uart_post_init,
+        ));
+
+        Ok(())
+    }
+
+    unsafe fn instantiate_gpio(&self) -> Result<(), &'static str> {
+        let mmio_descriptor = MMIODescriptor::new(mmio::GPIO_START, mmio::GPIO_SIZE);
+        let virt_addr =
+            memory::mmu::kernel_map_mmio(device_driver::GPIO::COMPATIBLE, &mmio_descriptor)?;
+
+        // This is safe to do, because it is only called from the init'ed instance itself.
+        fn gpio_post_init() {
+            unsafe { GPIO.assume_init_ref().map_pl011_uart() };
+        }
+
+        GPIO.write(device_driver::GPIO::new(virt_addr, gpio_post_init));
+
+        Ok(())
+    }
+
+    #[cfg(feature = "bsp_rpi3")]
+    unsafe fn instantiate_interrupt_controller(&self) -> Result<(), &'static str> {
+        let periph_mmio_descriptor =
+            MMIODescriptor::new(mmio::PERIPHERAL_IC_START, mmio::PERIPHERAL_IC_SIZE);
+        let periph_virt_addr = memory::mmu::kernel_map_mmio(
+            device_driver::InterruptController::COMPATIBLE,
+            &periph_mmio_descriptor,
+        )?;
+
+        // This is safe to do, because it is only called from the init'ed instance itself.
+        fn interrupt_controller_post_init() {
+            generic_exception::asynchronous::register_irq_manager(unsafe {
+                INTERRUPT_CONTROLLER.assume_init_ref()
+            });
+        }
+
+        INTERRUPT_CONTROLLER.write(device_driver::InterruptController::new(
+            periph_virt_addr,
+            interrupt_controller_post_init,
+        ));
+
+        Ok(())
+    }
+
+    #[cfg(feature = "bsp_rpi4")]
+    unsafe fn instantiate_interrupt_controller(&self) -> Result<(), &'static str> {
+        let gicd_mmio_descriptor = MMIODescriptor::new(mmio::GICD_START, mmio::GICD_SIZE);
+        let gicd_virt_addr = memory::mmu::kernel_map_mmio("GICv2 GICD", &gicd_mmio_descriptor)?;
+
+        let gicc_mmio_descriptor = MMIODescriptor::new(mmio::GICC_START, mmio::GICC_SIZE);
+        let gicc_virt_addr = memory::mmu::kernel_map_mmio("GICV2 GICC", &gicc_mmio_descriptor)?;
+
+        // This is safe to do, because it is only called from the init'ed instance itself.
+        fn interrupt_controller_post_init() {
+            generic_exception::asynchronous::register_irq_manager(unsafe {
+                INTERRUPT_CONTROLLER.assume_init_ref()
+            });
+        }
+
+        INTERRUPT_CONTROLLER.write(device_driver::GICv2::new(
+            gicd_virt_addr,
+            gicc_virt_addr,
+            interrupt_controller_post_init,
+        ));
+
+        Ok(())
+    }
+
+    unsafe fn register_drivers(&self) {
+        self.device_drivers.write(|drivers| {
+            drivers[0] = Some(PL011_UART.assume_init_ref());
+            drivers[1] = Some(GPIO.assume_init_ref());
+            drivers[2] = Some(INTERRUPT_CONTROLLER.assume_init_ref());
+        });
+    }
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -42,20 +165,34 @@ pub fn driver_manager() -> &'static impl driver::interface::DriverManager {
 use driver::interface::DeviceDriver;
 
 impl driver::interface::DriverManager for BSPDriverManager {
-    fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
-        &self.device_drivers[..]
-    }
+    unsafe fn instantiate_drivers(&self) -> Result<(), &'static str> {
+        if self.init_done.load(Ordering::Relaxed) {
+            return Err("Drivers already instantiated");
+        }
+
+        self.instantiate_uart()?;
+        self.instantiate_gpio()?;
+        self.instantiate_interrupt_controller()?;
 
-    fn early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
-        &self.device_drivers[0..=1]
+        self.register_drivers();
+
+        self.init_done.store(true, Ordering::Relaxed);
+        Ok(())
     }
 
-    fn non_early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
-        &self.device_drivers[2..]
+    fn all_device_drivers(&self) -> [&(dyn DeviceDriver + Sync); NUM_DRIVERS] {
+        self.device_drivers
+            .read(|drivers| drivers.map(|drivers| drivers.unwrap()))
     }
 
-    fn post_early_print_device_driver_init(&self) {
-        // Configure PL011Uart's output pins.
-        super::GPIO.map_pl011_uart();
+    #[cfg(feature = "test_build")]
+    fn qemu_bring_up_console(&self) {
+        use crate::cpu;
+
+        unsafe {
+            self.instantiate_uart()
+                .unwrap_or_else(|_| cpu::qemu_exit_failure());
+            console::register_console(PL011_UART.assume_init_ref());
+        };
     }
 }
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/exception/asynchronous.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
index dc5ab4215..ab20d86d3 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
@@ -4,7 +4,7 @@
 
 //! BSP asynchronous exception handling.
 
-use crate::{bsp, exception};
+use crate::bsp;
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -23,14 +23,3 @@ pub(in crate::bsp) mod irq_map {
 
     pub const PL011_UART: IRQNumber = IRQNumber::new(153);
 }
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return a reference to the IRQ manager.
-pub fn irq_manager() -> &'static impl exception::asynchronous::interface::IRQManager<
-    IRQNumberType = bsp::device_driver::IRQNumber,
-> {
-    &super::super::INTERRUPT_CONTROLLER
-}
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/memory.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/memory.rs
index 660409bbd..7d6e7911d 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/memory.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/memory.rs
@@ -107,9 +107,6 @@ pub(super) mod map {
         pub const PL011_UART_START:    Address<Physical> = Address::new(0x3F20_1000);
         pub const PL011_UART_SIZE:     usize             =              0x48;
 
-        pub const LOCAL_IC_START:      Address<Physical> = Address::new(0x4000_0000);
-        pub const LOCAL_IC_SIZE:       usize             =              0x100;
-
         pub const END:                 Address<Physical> = Address::new(0x4001_0000);
     }
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/console.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/console.rs
index e49e241fe..a85bcffe7 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/console.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/console.rs
@@ -4,6 +4,10 @@
 
 //! System console.
 
+mod null_console;
+
+use crate::synchronization;
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -49,5 +53,29 @@ pub mod interface {
     }
 
     /// Trait alias for a full-fledged console.
-    pub trait All = Write + Read + Statistics;
+    pub trait All: Write + Read + Statistics {}
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static CUR_CONSOLE: InitStateLock<&'static (dyn interface::All + Sync)> =
+    InitStateLock::new(&null_console::NULL_CONSOLE);
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+use synchronization::{interface::ReadWriteEx, InitStateLock};
+
+/// Register a new console.
+pub fn register_console(new_console: &'static (dyn interface::All + Sync)) {
+    CUR_CONSOLE.write(|con| *con = new_console);
+}
+
+/// Return a reference to the currently registered console.
+///
+/// This is the global console used by all printing macros.
+pub fn console() -> &'static dyn interface::All {
+    CUR_CONSOLE.read(|con| *con)
 }
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/console/null_console.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/console/null_console.rs
new file mode 100644
index 000000000..10c3bedc0
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/console/null_console.rs
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Null console.
+
+use super::interface;
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct NullConsole;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+pub static NULL_CONSOLE: NullConsole = NullConsole {};
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl interface::Write for NullConsole {
+    fn write_char(&self, _c: char) {}
+
+    fn write_fmt(&self, _args: fmt::Arguments) -> fmt::Result {
+        fmt::Result::Ok(())
+    }
+
+    fn flush(&self) {}
+}
+
+impl interface::Read for NullConsole {
+    fn clear_rx(&self) {}
+}
+
+impl interface::Statistics for NullConsole {}
+impl interface::All for NullConsole {}
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/driver.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/driver.rs
index 7b800dbc3..98197fef3 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/driver.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/driver.rs
@@ -10,6 +10,8 @@
 
 /// Driver interfaces.
 pub mod interface {
+    use crate::bsp;
+
     /// Device Driver functions.
     pub trait DeviceDriver {
         /// Return a compatibility string for identifying the driver.
@@ -31,32 +33,25 @@ pub mod interface {
         fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
             Ok(())
         }
-
-        /// After MMIO remapping, returns the new virtual start address.
-        ///
-        /// This API assumes a driver has only a single, contiguous MMIO aperture, which will not be
-        /// the case for more complex devices. This API will likely change in future tutorials.
-        fn virt_mmio_start_addr(&self) -> Option<usize> {
-            None
-        }
     }
 
     /// Device driver management functions.
     ///
     /// The `BSP` is supposed to supply one global instance.
     pub trait DriverManager {
-        /// Return a slice of references to all `BSP`-instantiated drivers.
-        fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
-
-        /// Return only those drivers needed for the BSP's early printing functionality.
+        /// Instantiate all drivers.
+        ///
+        /// # Safety
         ///
-        /// For example, the default UART.
-        fn early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
+        /// Must be called before `all_device_drivers`.
+        unsafe fn instantiate_drivers(&self) -> Result<(), &'static str>;
 
-        /// Return all drivers minus early-print drivers.
-        fn non_early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
+        /// Return a slice of references to all `BSP`-instantiated drivers.
+        fn all_device_drivers(&self) -> [&(dyn DeviceDriver + Sync); bsp::driver::NUM_DRIVERS];
 
-        /// Initialization code that runs after the early print driver init.
-        fn post_early_print_device_driver_init(&self);
+        /// Minimal code needed to bring up the console in QEMU (for testing only). This is often
+        /// less steps than on real hardware due to QEMU's abstractions.
+        #[cfg(feature = "test_build")]
+        fn qemu_bring_up_console(&self);
     }
 }
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/exception/asynchronous.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/exception/asynchronous.rs
index fb1785c23..d9d2767cf 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/exception/asynchronous.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/exception/asynchronous.rs
@@ -7,7 +7,9 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "../_arch/aarch64/exception/asynchronous.rs"]
 mod arch_asynchronous;
+mod null_irq_manager;
 
+use crate::{bsp, synchronization};
 use core::{fmt, marker::PhantomData};
 
 //--------------------------------------------------------------------------------------------------
@@ -85,7 +87,7 @@ pub mod interface {
         );
 
         /// Print list of registered handlers.
-        fn print_handler(&self);
+        fn print_handler(&self) {}
     }
 }
 
@@ -93,9 +95,18 @@ pub mod interface {
 #[derive(Copy, Clone)]
 pub struct IRQNumber<const MAX_INCLUSIVE: usize>(usize);
 
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static CUR_IRQ_MANAGER: InitStateLock<
+    &'static (dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber> + Sync),
+> = InitStateLock::new(&null_irq_manager::NULL_IRQ_MANAGER);
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
+use synchronization::{interface::ReadWriteEx, InitStateLock};
 
 impl<'irq_context> IRQContext<'irq_context> {
     /// Creates an IRQContext token.
@@ -150,3 +161,18 @@ pub fn exec_with_irq_masked<T>(f: impl FnOnce() -> T) -> T {
 
     ret
 }
+
+/// Register a new IRQ manager.
+pub fn register_irq_manager(
+    new_manager: &'static (dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber>
+                  + Sync),
+) {
+    CUR_IRQ_MANAGER.write(|manager| *manager = new_manager);
+}
+
+/// Return a reference to the currently registered IRQ manager.
+///
+/// This is the IRQ manager used by the architectural interrupt handling code.
+pub fn irq_manager() -> &'static dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber> {
+    CUR_IRQ_MANAGER.read(|manager| *manager)
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/exception/asynchronous/null_irq_manager.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/exception/asynchronous/null_irq_manager.rs
new file mode 100644
index 000000000..560e3ce4b
--- /dev/null
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/exception/asynchronous/null_irq_manager.rs
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Null IRQ Manager.
+
+use super::{interface, IRQContext, IRQDescriptor};
+use crate::bsp;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct NullIRQManager;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+pub static NULL_IRQ_MANAGER: NullIRQManager = NullIRQManager {};
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl interface::IRQManager for NullIRQManager {
+    type IRQNumberType = bsp::driver::IRQNumber;
+
+    fn register_handler(
+        &self,
+        _irq_number: Self::IRQNumberType,
+        _descriptor: IRQDescriptor,
+    ) -> Result<(), &'static str> {
+        panic!("No IRQ Manager registered yet");
+    }
+
+    fn enable(&self, _irq_number: Self::IRQNumberType) {
+        panic!("No IRQ Manager registered yet");
+    }
+
+    fn handle_pending_irqs<'irq_context>(&'irq_context self, _ic: &IRQContext<'irq_context>) {
+        panic!("No IRQ Manager registered yet");
+    }
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs
index aeab8c22a..1787ce02e 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs
@@ -114,6 +114,7 @@
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(generic_const_exprs)]
+#![feature(is_sorted)]
 #![feature(linkage)]
 #![feature(panic_info_message)]
 #![feature(step_trait)]
@@ -181,9 +182,11 @@ pub fn test_runner(tests: &[&test_types::UnitTest]) {
 #[cfg(test)]
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
     exception::handling_init();
     memory::mmu::post_enable_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     test_main();
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/main.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/main.rs
index 5150f3afc..928f12c2f 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/main.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/main.rs
@@ -30,26 +30,11 @@ unsafe fn kernel_init() -> ! {
     exception::handling_init();
     memory::mmu::post_enable_init();
 
-    // Add the mapping records for the precomputed entries first, so that they appear on the top of
-    // the list.
-    bsp::memory::mmu::kernel_add_mapping_records_for_precomputed();
-
-    // Bring up the drivers needed for printing first.
-    for i in bsp::driver::driver_manager()
-        .early_print_device_drivers()
-        .iter()
-    {
-        // Any encountered errors cannot be printed yet, obviously, so just safely park the CPU.
-        i.init().unwrap_or_else(|_| cpu::wait_forever());
+    // Instantiate and init all device drivers.
+    if let Err(x) = bsp::driver::driver_manager().instantiate_drivers() {
+        panic!("Error instantiating drivers: {}", x);
     }
-    bsp::driver::driver_manager().post_early_print_device_driver_init();
-    // Printing available from here on.
-
-    // Now bring up the remaining drivers.
-    for i in bsp::driver::driver_manager()
-        .non_early_print_device_drivers()
-        .iter()
-    {
+    for i in bsp::driver::driver_manager().all_device_drivers().iter() {
         if let Err(x) = i.init() {
             panic!("Error loading driver: {}: {}", i.compatible(), x);
         }
@@ -62,6 +47,8 @@ unsafe fn kernel_init() -> ! {
         }
     }
 
+    bsp::memory::mmu::kernel_add_mapping_records_for_precomputed();
+
     // Unmask interrupts on the boot CPU core.
     exception::asynchronous::local_irq_unmask();
 
@@ -75,7 +62,6 @@ unsafe fn kernel_init() -> ! {
 /// The main function running after the early init.
 fn kernel_main() -> ! {
     use driver::interface::DriverManager;
-    use exception::asynchronous::interface::IRQManager;
 
     info!("{}", libkernel::version());
     info!("Booting on: {}", bsp::board_name());
@@ -104,7 +90,7 @@ fn kernel_main() -> ! {
     }
 
     info!("Registered IRQ handlers:");
-    bsp::exception::asynchronous::irq_manager().print_handler();
+    exception::asynchronous::irq_manager().print_handler();
 
     info!("Echoing input now");
     cpu::wait_forever();
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/memory.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory.rs
index f20719bb7..64d8cf64e 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/memory.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory.rs
@@ -18,18 +18,18 @@ use core::{
 //--------------------------------------------------------------------------------------------------
 
 /// Metadata trait for marking the type of an address.
-pub trait AddressType: Copy + Clone + PartialOrd + PartialEq {}
+pub trait AddressType: Copy + Clone + PartialOrd + PartialEq + Ord + Eq {}
 
 /// Zero-sized type to mark a physical address.
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq, Ord, Eq)]
 pub enum Physical {}
 
 /// Zero-sized type to mark a virtual address.
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq, Ord, Eq)]
 pub enum Virtual {}
 
 /// Generic address type.
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq, Ord, Eq)]
 pub struct Address<ATYPE: AddressType> {
     value: usize,
     _address_type: PhantomData<fn() -> ATYPE>,
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/mapping_record.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/mapping_record.rs
index d171c6e67..7d3a6c601 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/mapping_record.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/mapping_record.rs
@@ -76,6 +76,19 @@ impl MappingRecord {
         Self { inner: [None; 12] }
     }
 
+    fn size(&self) -> usize {
+        self.inner.iter().filter(|x| x.is_some()).count()
+    }
+
+    fn sort(&mut self) {
+        let upper_bound_exclusive = self.size();
+        let entries = &mut self.inner[0..upper_bound_exclusive];
+
+        if !entries.is_sorted_by_key(|item| item.unwrap().virt_start_addr) {
+            entries.sort_unstable_by_key(|item| item.unwrap().virt_start_addr)
+        }
+    }
+
     fn find_next_free(&mut self) -> Result<&mut Option<MappingRecordEntry>, &'static str> {
         if let Some(x) = self.inner.iter_mut().find(|x| x.is_none()) {
             return Ok(x);
@@ -121,6 +134,9 @@ impl MappingRecord {
             phys_region,
             attr,
         ));
+
+        self.sort();
+
         Ok(())
     }
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/panic_wait.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/panic_wait.rs
index 08d7d4533..e4256b616 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/panic_wait.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/panic_wait.rs
@@ -4,19 +4,13 @@
 
 //! A panic handler that infinitely waits.
 
-use crate::{bsp, cpu, exception};
-use core::{fmt, panic::PanicInfo};
+use crate::{cpu, exception, println};
+use core::panic::PanicInfo;
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-fn _panic_print(args: fmt::Arguments) {
-    use fmt::Write;
-
-    unsafe { bsp::console::panic_console_out().write_fmt(args).unwrap() };
-}
-
 /// The point of exit for `libkernel`.
 ///
 /// It is linked weakly, so that the integration tests can overload its standard behavior.
@@ -34,16 +28,6 @@ fn _panic_exit() -> ! {
     }
 }
 
-/// Prints with a newline - only use from the panic handler.
-///
-/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
-#[macro_export]
-macro_rules! panic_println {
-    ($($arg:tt)*) => ({
-        _panic_print(format_args_nl!($($arg)*));
-    })
-}
-
 /// Stop immediately if called a second time.
 ///
 /// # Note
@@ -88,7 +72,7 @@ fn panic(info: &PanicInfo) -> ! {
         _ => ("???", 0, 0),
     };
 
-    panic_println!(
+    println!(
         "[  {:>3}.{:06}] Kernel panic!\n\n\
         Panic location:\n      File '{}', line {}, column {}\n\n\
         {}",
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/print.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/print.rs
index 9ec13a286..8705eec0d 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/print.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/print.rs
@@ -4,7 +4,7 @@
 
 //! Printing.
 
-use crate::{bsp, console};
+use crate::console;
 use core::fmt;
 
 //--------------------------------------------------------------------------------------------------
@@ -13,9 +13,7 @@ use core::fmt;
 
 #[doc(hidden)]
 pub fn _print(args: fmt::Arguments) {
-    use console::interface::Write;
-
-    bsp::console::console().write_fmt(args).unwrap();
+    console::console().write_fmt(args).unwrap();
 }
 
 /// Prints without a newline.
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/tests/00_console_sanity.rs b/15_virtual_mem_part3_precomputed_tables/kernel/tests/00_console_sanity.rs
index 6595aac1b..f2a1f3edf 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/tests/00_console_sanity.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/tests/00_console_sanity.rs
@@ -11,16 +11,16 @@
 /// Console tests should time out on the I/O harness in case of panic.
 mod panic_wait_forever;
 
-use libkernel::{bsp, console, cpu, exception, memory, print};
+use libkernel::{bsp, console, cpu, driver, exception, memory, print};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use bsp::console::console;
-    use console::interface::*;
+    use console::console;
+    use driver::interface::DriverManager;
 
     exception::handling_init();
     memory::mmu::post_enable_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     // Handshake
     assert_eq!(console().read_char(), 'A');
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/tests/01_timer_sanity.rs b/15_virtual_mem_part3_precomputed_tables/kernel/tests/01_timer_sanity.rs
index 9b2b228d9..caeca3cd4 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/tests/01_timer_sanity.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/tests/01_timer_sanity.rs
@@ -11,14 +11,16 @@
 #![test_runner(libkernel::test_runner)]
 
 use core::time::Duration;
-use libkernel::{bsp, cpu, exception, memory, time, time::interface::TimeManager};
+use libkernel::{bsp, cpu, driver, exception, memory, time, time::interface::TimeManager};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
     exception::handling_init();
     memory::mmu::post_enable_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/tests/02_exception_sync_page_fault.rs b/15_virtual_mem_part3_precomputed_tables/kernel/tests/02_exception_sync_page_fault.rs
index 2d4b0977f..feb84d9be 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/tests/02_exception_sync_page_fault.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/tests/02_exception_sync_page_fault.rs
@@ -17,13 +17,15 @@
 /// or indirectly.
 mod panic_exit_success;
 
-use libkernel::{bsp, cpu, exception, info, memory, println};
+use libkernel::{bsp, cpu, driver, exception, info, memory, println};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
     exception::handling_init();
     memory::mmu::post_enable_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     // This line will be printed as the test header.
     println!("Testing synchronous exception handling by causing a page fault");
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/tests/03_exception_restore_sanity.rs b/15_virtual_mem_part3_precomputed_tables/kernel/tests/03_exception_restore_sanity.rs
index 983d488f1..a521a8711 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/tests/03_exception_restore_sanity.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/tests/03_exception_restore_sanity.rs
@@ -12,7 +12,7 @@
 mod panic_wait_forever;
 
 use core::arch::asm;
-use libkernel::{bsp, cpu, exception, info, memory, println};
+use libkernel::{bsp, cpu, driver, exception, info, memory, println};
 
 #[inline(never)]
 fn nested_system_call() {
@@ -30,9 +30,11 @@ fn nested_system_call() {
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
     exception::handling_init();
     memory::mmu::post_enable_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     // This line will be printed as the test header.
     println!("Testing exception restore");
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/tests/04_exception_irq_sanity.rs b/15_virtual_mem_part3_precomputed_tables/kernel/tests/04_exception_irq_sanity.rs
index 9030424d5..cd2d29d6a 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/tests/04_exception_irq_sanity.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/tests/04_exception_irq_sanity.rs
@@ -10,13 +10,15 @@
 #![reexport_test_harness_main = "test_main"]
 #![test_runner(libkernel::test_runner)]
 
-use libkernel::{bsp, cpu, exception, memory};
+use libkernel::{bsp, cpu, driver, exception, memory};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
     memory::mmu::post_enable_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     exception::handling_init();
     exception::asynchronous::local_irq_unmask();
diff --git a/16_virtual_mem_part4_higher_half_kernel/README.md b/16_virtual_mem_part4_higher_half_kernel/README.md
index a9282d805..943273c03 100644
--- a/16_virtual_mem_part4_higher_half_kernel/README.md
+++ b/16_virtual_mem_part4_higher_half_kernel/README.md
@@ -253,22 +253,22 @@ Minipush 1.0
            Raspberry Pi 3
 
 [ML] Requesting binary
-[MP] ⏩ Pushing 259 KiB ======================================🦀 100% 129 KiB/s Time: 00:00:02
+[MP] ⏩ Pushing 257 KiB ======================================🦀 100% 128 KiB/s Time: 00:00:02
 [ML] Loaded! Executing the payload now
 
-[    2.893480] mingo version 0.16.0
-[    2.893687] Booting on: Raspberry Pi 3
-[    2.894142] MMU online:
-[    2.894434]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    2.896179]                         Virtual                                   Physical               Size       Attr                    Entity
-[    2.897923]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    2.899668]       0xffff_ffff_c000_0000..0xffff_ffff_c000_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
-[    2.901282]       0xffff_ffff_c001_0000..0xffff_ffff_c004_ffff --> 0x00_0009_0000..0x00_000c_ffff | 256 KiB | C   RW XN | Kernel data and bss
-[    2.902852]       0xffff_ffff_c086_0000..0xffff_ffff_c08d_ffff --> 0x00_0000_0000..0x00_0007_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
-[    2.904455]       0xffff_ffff_c005_0000..0xffff_ffff_c005_ffff --> 0x00_3f20_0000..0x00_3f20_ffff |  64 KiB | Dev RW XN | BCM GPIO
-[    2.905907]                                                                                                             | BCM PL011 UART
-[    2.907424]       0xffff_ffff_c006_0000..0xffff_ffff_c006_ffff --> 0x00_3f00_0000..0x00_3f00_ffff |  64 KiB | Dev RW XN | BCM Peripheral Interrupt Controller
-[    2.909168]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    2.870248] mingo version 0.16.0
+[    2.870456] Booting on: Raspberry Pi 3
+[    2.870911] MMU online:
+[    2.871203]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    2.872947]                         Virtual                                   Physical               Size       Attr                    Entity
+[    2.874691]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    2.876436]       0xffff_ffff_c000_0000..0xffff_ffff_c000_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
+[    2.878050]       0xffff_ffff_c001_0000..0xffff_ffff_c004_ffff --> 0x00_0009_0000..0x00_000c_ffff | 256 KiB | C   RW XN | Kernel data and bss
+[    2.879621]       0xffff_ffff_c005_0000..0xffff_ffff_c005_ffff --> 0x00_3f20_0000..0x00_3f20_ffff |  64 KiB | Dev RW XN | BCM PL011 UART
+[    2.881137]                                                                                                             | BCM GPIO
+[    2.882589]       0xffff_ffff_c006_0000..0xffff_ffff_c006_ffff --> 0x00_3f00_0000..0x00_3f00_ffff |  64 KiB | Dev RW XN | BCM Interrupt Controller
+[    2.884214]       0xffff_ffff_c086_0000..0xffff_ffff_c08d_ffff --> 0x00_0000_0000..0x00_0007_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
+[    2.885818]       -------------------------------------------------------------------------------------------------------------------------------------------
 ```
 
 Raspberry Pi 4:
@@ -303,23 +303,23 @@ Minipush 1.0
            Raspberry Pi 4
 
 [ML] Requesting binary
-[MP] ⏩ Pushing 266 KiB ======================================🦀 100% 133 KiB/s Time: 00:00:02
+[MP] ⏩ Pushing 257 KiB ======================================🦀 100% 128 KiB/s Time: 00:00:02
 [ML] Loaded! Executing the payload now
 
-[    2.973300] mingo version 0.16.0
-[    2.973334] Booting on: Raspberry Pi 4
-[    2.973789] MMU online:
-[    2.974081]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    2.975825]                         Virtual                                   Physical               Size       Attr                    Entity
-[    2.977569]       -------------------------------------------------------------------------------------------------------------------------------------------
-[    2.979314]       0xffff_ffff_c000_0000..0xffff_ffff_c000_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
-[    2.980929]       0xffff_ffff_c001_0000..0xffff_ffff_c004_ffff --> 0x00_0009_0000..0x00_000c_ffff | 256 KiB | C   RW XN | Kernel data and bss
-[    2.982499]       0xffff_ffff_c086_0000..0xffff_ffff_c08d_ffff --> 0x00_0000_0000..0x00_0007_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
-[    2.984102]       0xffff_ffff_c005_0000..0xffff_ffff_c005_ffff --> 0x00_fe20_0000..0x00_fe20_ffff |  64 KiB | Dev RW XN | BCM GPIO
-[    2.985554]                                                                                                             | BCM PL011 UART
-[    2.987070]       0xffff_ffff_c006_0000..0xffff_ffff_c006_ffff --> 0x00_ff84_0000..0x00_ff84_ffff |  64 KiB | Dev RW XN | GICD
-[    2.988479]                                                                                                             | GICC
-[    2.989887]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    2.871960] mingo version 0.16.0
+[    2.871994] Booting on: Raspberry Pi 4
+[    2.872449] MMU online:
+[    2.872742]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    2.874486]                         Virtual                                   Physical               Size       Attr                    Entity
+[    2.876230]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    2.877975]       0xffff_ffff_c000_0000..0xffff_ffff_c000_ffff --> 0x00_0008_0000..0x00_0008_ffff |  64 KiB | C   RO X  | Kernel code and RO data
+[    2.879589]       0xffff_ffff_c001_0000..0xffff_ffff_c004_ffff --> 0x00_0009_0000..0x00_000c_ffff | 256 KiB | C   RW XN | Kernel data and bss
+[    2.881159]       0xffff_ffff_c005_0000..0xffff_ffff_c005_ffff --> 0x00_fe20_0000..0x00_fe20_ffff |  64 KiB | Dev RW XN | BCM PL011 UART
+[    2.882676]                                                                                                             | BCM GPIO
+[    2.884128]       0xffff_ffff_c006_0000..0xffff_ffff_c006_ffff --> 0x00_ff84_0000..0x00_ff84_ffff |  64 KiB | Dev RW XN | GICv2 GICD
+[    2.885601]                                                                                                             | GICV2 GICC
+[    2.887074]       0xffff_ffff_c086_0000..0xffff_ffff_c08d_ffff --> 0x00_0000_0000..0x00_0007_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
+[    2.888678]       -------------------------------------------------------------------------------------------------------------------------------------------
 ```
 
 ## Diff to previous
@@ -568,76 +568,6 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/memor
          self.configure_translation_control();
 
 
-diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/console.rs 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/console.rs
---- 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/console.rs
-+++ 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/console.rs
-@@ -4,7 +4,6 @@
-
- //! BSP console facilities.
-
--use super::memory;
- use crate::{bsp::device_driver, console, cpu, driver};
- use core::fmt;
-
-@@ -26,21 +25,27 @@
- pub unsafe fn panic_console_out() -> impl fmt::Write {
-     use driver::interface::DeviceDriver;
-
--    let mut panic_gpio = device_driver::PanicGPIO::new(memory::map::mmio::GPIO_START.as_usize());
--    let mut panic_uart =
--        device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START.as_usize());
--
--    // If remapping of the driver's MMIO already happened, take the remapped start address.
--    // Otherwise, take a chance with the default physical address.
--    let maybe_gpio_mmio_start_addr = super::GPIO.virt_mmio_start_addr();
--    let maybe_uart_mmio_start_addr = super::PL011_UART.virt_mmio_start_addr();
-+    // If remapping of the driver's MMIO hasn't already happened, we won't be able to print. Just
-+    // park the CPU core in this case.
-+    let gpio_mmio_start_addr = match super::GPIO.virt_mmio_start_addr() {
-+        None => cpu::wait_forever(),
-+        Some(x) => x,
-+    };
-+
-+    let uart_mmio_start_addr = match super::PL011_UART.virt_mmio_start_addr() {
-+        None => cpu::wait_forever(),
-+        Some(x) => x,
-+    };
-+
-+    let mut panic_gpio = device_driver::PanicGPIO::new(gpio_mmio_start_addr);
-+    let mut panic_uart = device_driver::PanicUart::new(uart_mmio_start_addr);
-
-     panic_gpio
--        .init(maybe_gpio_mmio_start_addr)
-+        .init(None)
-         .unwrap_or_else(|_| cpu::wait_forever());
-     panic_gpio.map_pl011_uart();
-     panic_uart
--        .init(maybe_uart_mmio_start_addr)
-+        .init(None)
-         .unwrap_or_else(|_| cpu::wait_forever());
-
-     panic_uart
-@@ -55,13 +60,14 @@
- pub unsafe fn panic_console_out() -> impl fmt::Write {
-     use driver::interface::DeviceDriver;
-
--    let mut panic_uart =
--        device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START.as_usize());
--
--    let maybe_uart_mmio_start_addr = super::PL011_UART.virt_mmio_start_addr();
-+    let uart_mmio_start_addr = match super::PL011_UART.virt_mmio_start_addr() {
-+        None => cpu::wait_forever(),
-+        Some(x) => x,
-+    };
-+    let mut panic_uart = device_driver::PanicUart::new(uart_mmio_start_addr);
-
-     panic_uart
--        .init(maybe_uart_mmio_start_addr)
-+        .init(None)
-         .unwrap_or_else(|_| cpu::qemu_exit_failure());
-
-     panic_uart
-
 diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/kernel.ld 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/kernel.ld
 --- 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/kernel.ld
 +++ 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/kernel.ld
@@ -799,7 +729,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/mem
 diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs 16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
 --- 15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs
 +++ 16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
-@@ -152,11 +152,6 @@
+@@ -153,11 +153,6 @@
      )
  }
 
@@ -873,7 +803,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu.rs 16_vi
 diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/tests/02_exception_sync_page_fault.rs 16_virtual_mem_part4_higher_half_kernel/kernel/tests/02_exception_sync_page_fault.rs
 --- 15_virtual_mem_part3_precomputed_tables/kernel/tests/02_exception_sync_page_fault.rs
 +++ 16_virtual_mem_part4_higher_half_kernel/kernel/tests/02_exception_sync_page_fault.rs
-@@ -28,8 +28,8 @@
+@@ -30,8 +30,8 @@
      // This line will be printed as the test header.
      println!("Testing synchronous exception handling by causing a page fault");
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception.rs
index 662c91b94..fa6748a6d 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::exception::arch_exception
 
-use crate::{bsp, exception};
+use crate::exception;
 use core::{arch::global_asm, cell::UnsafeCell, fmt};
 use cortex_a::{asm::barrier, registers::*};
 use tock_registers::{
@@ -104,10 +104,8 @@ unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
 
 #[no_mangle]
 unsafe extern "C" fn current_elx_irq(_e: &mut ExceptionContext) {
-    use exception::asynchronous::interface::IRQManager;
-
     let token = &exception::asynchronous::IRQContext::new();
-    bsp::exception::asynchronous::irq_manager().handle_pending_irqs(token);
+    exception::asynchronous::irq_manager().handle_pending_irqs(token);
 }
 
 #[no_mangle]
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2.rs
index 4c68a6929..e72fde7be 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2.rs
@@ -79,8 +79,12 @@
 mod gicc;
 mod gicd;
 
-use crate::{bsp, cpu, driver, exception, memory, synchronization, synchronization::InitStateLock};
-use core::sync::atomic::{AtomicBool, Ordering};
+use crate::{
+    bsp, cpu, driver, exception,
+    memory::{Address, Virtual},
+    synchronization,
+    synchronization::InitStateLock,
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -97,20 +101,17 @@ pub type IRQNumber = exception::asynchronous::IRQNumber<{ GICv2::MAX_IRQ_NUMBER
 
 /// Representation of the GIC.
 pub struct GICv2 {
-    gicd_mmio_descriptor: memory::mmu::MMIODescriptor,
-    gicc_mmio_descriptor: memory::mmu::MMIODescriptor,
-
     /// The Distributor.
     gicd: gicd::GICD,
 
     /// The CPU Interface.
     gicc: gicc::GICC,
 
-    /// Have the MMIO regions been remapped yet?
-    is_mmio_remapped: AtomicBool,
-
     /// Stores registered IRQ handlers. Writable only during kernel init. RO afterwards.
     handler_table: InitStateLock<HandlerTable>,
+
+    /// Callback to be invoked after successful init.
+    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -121,22 +122,23 @@ impl GICv2 {
     const MAX_IRQ_NUMBER: usize = 300; // Normally 1019, but keep it lower to save some space.
     const NUM_IRQS: usize = Self::MAX_IRQ_NUMBER + 1;
 
+    pub const COMPATIBLE: &'static str = "GICv2 (ARM Generic Interrupt Controller v2)";
+
     /// Create an instance.
     ///
     /// # Safety
     ///
-    /// - The user must ensure to provide correct MMIO descriptors.
+    /// - The user must ensure to provide a correct MMIO start address.
     pub const unsafe fn new(
-        gicd_mmio_descriptor: memory::mmu::MMIODescriptor,
-        gicc_mmio_descriptor: memory::mmu::MMIODescriptor,
+        gicd_mmio_start_addr: Address<Virtual>,
+        gicc_mmio_start_addr: Address<Virtual>,
+        post_init_callback: fn(),
     ) -> Self {
         Self {
-            gicd_mmio_descriptor,
-            gicc_mmio_descriptor,
-            gicd: gicd::GICD::new(gicd_mmio_descriptor.start_addr().as_usize()),
-            gicc: gicc::GICC::new(gicc_mmio_descriptor.start_addr().as_usize()),
-            is_mmio_remapped: AtomicBool::new(false),
+            gicd: gicd::GICD::new(gicd_mmio_start_addr),
+            gicc: gicc::GICC::new(gicc_mmio_start_addr),
             handler_table: InitStateLock::new([None; Self::NUM_IRQS]),
+            post_init_callback,
         }
     }
 }
@@ -148,24 +150,10 @@ use synchronization::interface::ReadWriteEx;
 
 impl driver::interface::DeviceDriver for GICv2 {
     fn compatible(&self) -> &'static str {
-        "GICv2 (ARM Generic Interrupt Controller v2)"
+        Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
-        let remapped = self.is_mmio_remapped.load(Ordering::Relaxed);
-        if !remapped {
-            // GICD
-            let mut virt_addr = memory::mmu::kernel_map_mmio("GICD", &self.gicd_mmio_descriptor)?;
-            self.gicd.set_mmio(virt_addr.as_usize());
-
-            // GICC
-            virt_addr = memory::mmu::kernel_map_mmio("GICC", &self.gicc_mmio_descriptor)?;
-            self.gicc.set_mmio(virt_addr.as_usize());
-
-            // Conclude remapping.
-            self.is_mmio_remapped.store(true, Ordering::Relaxed);
-        }
-
         if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
             self.gicd.boot_core_init();
         }
@@ -173,6 +161,8 @@ impl driver::interface::DeviceDriver for GICv2 {
         self.gicc.priority_accept_all();
         self.gicc.enable();
 
+        (self.post_init_callback)();
+
         Ok(())
     }
 }
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
index 1a151d246..1a02fc650 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
@@ -5,7 +5,9 @@
 //! GICC Driver - GIC CPU interface.
 
 use crate::{
-    bsp::device_driver::common::MMIODerefWrapper, exception, synchronization::InitStateLock,
+    bsp::device_driver::common::MMIODerefWrapper,
+    exception,
+    memory::{Address, Virtual},
 };
 use tock_registers::{
     interfaces::{Readable, Writeable},
@@ -62,13 +64,12 @@ type Registers = MMIODerefWrapper<RegisterBlock>;
 
 /// Representation of the GIC CPU interface.
 pub struct GICC {
-    registers: InitStateLock<Registers>,
+    registers: Registers,
 }
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
-use crate::synchronization::interface::ReadWriteEx;
 
 impl GICC {
     /// Create an instance.
@@ -76,17 +77,12 @@ impl GICC {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
         Self {
-            registers: InitStateLock::new(Registers::new(mmio_start_addr)),
+            registers: Registers::new(mmio_start_addr),
         }
     }
 
-    pub unsafe fn set_mmio(&self, new_mmio_start_addr: usize) {
-        self.registers
-            .write(|regs| *regs = Registers::new(new_mmio_start_addr));
-    }
-
     /// Accept interrupts of any priority.
     ///
     /// Quoting the GICv2 Architecture Specification:
@@ -99,9 +95,7 @@ impl GICC {
     /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
     ///   of `&mut self`.
     pub fn priority_accept_all(&self) {
-        self.registers.read(|regs| {
-            regs.PMR.write(PMR::Priority.val(255)); // Comment in arch spec.
-        });
+        self.registers.PMR.write(PMR::Priority.val(255)); // Comment in arch spec.
     }
 
     /// Enable the interface - start accepting IRQs.
@@ -111,9 +105,7 @@ impl GICC {
     /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
     ///   of `&mut self`.
     pub fn enable(&self) {
-        self.registers.read(|regs| {
-            regs.CTLR.write(CTLR::Enable::SET);
-        });
+        self.registers.CTLR.write(CTLR::Enable::SET);
     }
 
     /// Extract the number of the highest-priority pending IRQ.
@@ -129,8 +121,7 @@ impl GICC {
         &self,
         _ic: &exception::asynchronous::IRQContext<'irq_context>,
     ) -> usize {
-        self.registers
-            .read(|regs| regs.IAR.read(IAR::InterruptID) as usize)
+        self.registers.IAR.read(IAR::InterruptID) as usize
     }
 
     /// Complete handling of the currently active IRQ.
@@ -149,8 +140,6 @@ impl GICC {
         irq_number: u32,
         _ic: &exception::asynchronous::IRQContext<'irq_context>,
     ) {
-        self.registers.read(|regs| {
-            regs.EOIR.write(EOIR::EOIINTID.val(irq_number));
-        });
+        self.registers.EOIR.write(EOIR::EOIINTID.val(irq_number));
     }
 }
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
index 60bbc4689..d9f63d1bb 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -9,8 +9,9 @@
 
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper,
+    memory::{Address, Virtual},
     state, synchronization,
-    synchronization::{IRQSafeNullLock, InitStateLock},
+    synchronization::IRQSafeNullLock,
 };
 use tock_registers::{
     interfaces::{Readable, Writeable},
@@ -84,7 +85,7 @@ pub struct GICD {
     shared_registers: IRQSafeNullLock<SharedRegisters>,
 
     /// Access to banked registers is unguarded.
-    banked_registers: InitStateLock<BankedRegisters>,
+    banked_registers: BankedRegisters,
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -121,7 +122,6 @@ impl SharedRegisters {
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
-use crate::synchronization::interface::ReadWriteEx;
 use synchronization::interface::Mutex;
 
 impl GICD {
@@ -130,20 +130,13 @@ impl GICD {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
         Self {
             shared_registers: IRQSafeNullLock::new(SharedRegisters::new(mmio_start_addr)),
-            banked_registers: InitStateLock::new(BankedRegisters::new(mmio_start_addr)),
+            banked_registers: BankedRegisters::new(mmio_start_addr),
         }
     }
 
-    pub unsafe fn set_mmio(&self, new_mmio_start_addr: usize) {
-        self.shared_registers
-            .lock(|regs| *regs = SharedRegisters::new(new_mmio_start_addr));
-        self.banked_registers
-            .write(|regs| *regs = BankedRegisters::new(new_mmio_start_addr));
-    }
-
     /// Use a banked ITARGETSR to retrieve the executing core's GIC target mask.
     ///
     /// Quoting the GICv2 Architecture Specification:
@@ -151,8 +144,7 @@ impl GICD {
     ///   "GICD_ITARGETSR0 to GICD_ITARGETSR7 are read-only, and each field returns a value that
     ///    corresponds only to the processor reading the register."
     fn local_gic_target_mask(&self) -> u32 {
-        self.banked_registers
-            .read(|regs| regs.ITARGETSR[0].read(ITARGETSR::Offset0))
+        self.banked_registers.ITARGETSR[0].read(ITARGETSR::Offset0)
     }
 
     /// Route all SPIs to the boot core and enable the distributor.
@@ -191,10 +183,10 @@ impl GICD {
         // Check if we are handling a private or shared IRQ.
         match irq_num {
             // Private.
-            0..=31 => self.banked_registers.read(|regs| {
-                let enable_reg = &regs.ISENABLER;
+            0..=31 => {
+                let enable_reg = &self.banked_registers.ISENABLER;
                 enable_reg.set(enable_reg.get() | enable_bit);
-            }),
+            }
             // Shared.
             _ => {
                 let enable_reg_index_shared = enable_reg_index - 1;
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index eea07b755..a3361c2cc 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -5,10 +5,12 @@
 //! GPIO Driver.
 
 use crate::{
-    bsp::device_driver::common::MMIODerefWrapper, driver, memory, synchronization,
+    bsp::device_driver::common::MMIODerefWrapper,
+    driver,
+    memory::{Address, Virtual},
+    synchronization,
     synchronization::IRQSafeNullLock,
 };
-use core::sync::atomic::{AtomicUsize, Ordering};
 use tock_registers::{
     interfaces::{ReadWriteable, Writeable},
     register_bitfields, register_structs,
@@ -109,26 +111,22 @@ register_structs! {
 /// Abstraction for the associated MMIO registers.
 type Registers = MMIODerefWrapper<RegisterBlock>;
 
-//--------------------------------------------------------------------------------------------------
-// Public Definitions
-//--------------------------------------------------------------------------------------------------
-
-pub struct GPIOInner {
+struct GPIOInner {
     registers: Registers,
 }
 
-// Export the inner struct so that BSPs can use it for the panic handler.
-pub use GPIOInner as PanicGPIO;
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
 
 /// Representation of the GPIO HW.
 pub struct GPIO {
-    mmio_descriptor: memory::mmu::MMIODescriptor,
-    virt_mmio_start_addr: AtomicUsize,
     inner: IRQSafeNullLock<GPIOInner>,
+    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
-// Public Code
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
 impl GPIOInner {
@@ -137,25 +135,12 @@ impl GPIOInner {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
         Self {
             registers: Registers::new(mmio_start_addr),
         }
     }
 
-    /// Init code.
-    ///
-    /// # Safety
-    ///
-    /// - The user must ensure to provide a correct MMIO start address.
-    pub unsafe fn init(&mut self, new_mmio_start_addr: Option<usize>) -> Result<(), &'static str> {
-        if let Some(addr) = new_mmio_start_addr {
-            self.registers = Registers::new(addr);
-        }
-
-        Ok(())
-    }
-
     /// Disable pull-up/down on pins 14 and 15.
     #[cfg(feature = "bsp_rpi3")]
     fn disable_pud_14_15_bcm2837(&mut self) {
@@ -205,17 +190,22 @@ impl GPIOInner {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
 impl GPIO {
+    pub const COMPATIBLE: &'static str = "BCM GPIO";
+
     /// Create an instance.
     ///
     /// # Safety
     ///
-    /// - The user must ensure to provide correct MMIO descriptors.
-    pub const unsafe fn new(mmio_descriptor: memory::mmu::MMIODescriptor) -> Self {
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>, post_init_callback: fn()) -> Self {
         Self {
-            mmio_descriptor,
-            virt_mmio_start_addr: AtomicUsize::new(0),
-            inner: IRQSafeNullLock::new(GPIOInner::new(mmio_descriptor.start_addr().as_usize())),
+            inner: IRQSafeNullLock::new(GPIOInner::new(mmio_start_addr)),
+            post_init_callback,
         }
     }
 
@@ -232,28 +222,12 @@ use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for GPIO {
     fn compatible(&self) -> &'static str {
-        "BCM GPIO"
+        Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
-        let virt_addr = memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?;
-
-        self.inner
-            .lock(|inner| inner.init(Some(virt_addr.as_usize())))?;
-
-        self.virt_mmio_start_addr
-            .store(virt_addr.as_usize(), Ordering::Relaxed);
+        (self.post_init_callback)();
 
         Ok(())
     }
-
-    fn virt_mmio_start_addr(&self) -> Option<usize> {
-        let addr = self.virt_mmio_start_addr.load(Ordering::Relaxed);
-
-        if addr == 0 {
-            return None;
-        }
-
-        Some(addr)
-    }
 }
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
index 99961facb..4908b8b67 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -6,7 +6,10 @@
 
 mod peripheral_ic;
 
-use crate::{driver, exception, memory};
+use crate::{
+    driver, exception,
+    memory::{Address, Virtual},
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -28,6 +31,7 @@ pub type PeripheralIRQ =
 
 /// Used for the associated type of trait [`exception::asynchronous::interface::IRQManager`].
 #[derive(Copy, Clone)]
+#[allow(missing_docs)]
 pub enum IRQNumber {
     Local(LocalIRQ),
     Peripheral(PeripheralIRQ),
@@ -36,6 +40,7 @@ pub enum IRQNumber {
 /// Representation of the Interrupt Controller.
 pub struct InterruptController {
     periph: peripheral_ic::PeripheralIC,
+    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -74,17 +79,20 @@ impl InterruptController {
     const MAX_PERIPHERAL_IRQ_NUMBER: usize = 63;
     const NUM_PERIPHERAL_IRQS: usize = Self::MAX_PERIPHERAL_IRQ_NUMBER + 1;
 
+    pub const COMPATIBLE: &'static str = "BCM Interrupt Controller";
+
     /// Create an instance.
     ///
     /// # Safety
     ///
-    /// - The user must ensure to provide correct MMIO descriptors.
+    /// - The user must ensure to provide a correct MMIO start address.
     pub const unsafe fn new(
-        _local_mmio_descriptor: memory::mmu::MMIODescriptor,
-        periph_mmio_descriptor: memory::mmu::MMIODescriptor,
+        periph_mmio_start_addr: Address<Virtual>,
+        post_init_callback: fn(),
     ) -> Self {
         Self {
-            periph: peripheral_ic::PeripheralIC::new(periph_mmio_descriptor),
+            periph: peripheral_ic::PeripheralIC::new(periph_mmio_start_addr),
+            post_init_callback,
         }
     }
 }
@@ -95,11 +103,13 @@ impl InterruptController {
 
 impl driver::interface::DeviceDriver for InterruptController {
     fn compatible(&self) -> &'static str {
-        "BCM Interrupt Controller"
+        Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
-        self.periph.init()
+        (self.post_init_callback)();
+
+        Ok(())
     }
 }
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index f09da862f..145d89612 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -7,7 +7,9 @@
 use super::{InterruptController, PendingIRQs, PeripheralIRQ};
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper,
-    driver, exception, memory, synchronization,
+    exception,
+    memory::{Address, Virtual},
+    synchronization,
     synchronization::{IRQSafeNullLock, InitStateLock},
 };
 use tock_registers::{
@@ -55,13 +57,11 @@ type HandlerTable =
 
 /// Representation of the peripheral interrupt controller.
 pub struct PeripheralIC {
-    mmio_descriptor: memory::mmu::MMIODescriptor,
-
     /// Access to write registers is guarded with a lock.
     wo_registers: IRQSafeNullLock<WriteOnlyRegisters>,
 
     /// Register read access is unguarded.
-    ro_registers: InitStateLock<ReadOnlyRegisters>,
+    ro_registers: ReadOnlyRegisters,
 
     /// Stores registered IRQ handlers. Writable only during kernel init. RO afterwards.
     handler_table: InitStateLock<HandlerTable>,
@@ -76,26 +76,21 @@ impl PeripheralIC {
     ///
     /// # Safety
     ///
-    /// - The user must ensure to provide correct MMIO descriptors.
-    pub const unsafe fn new(mmio_descriptor: memory::mmu::MMIODescriptor) -> Self {
-        let addr = mmio_descriptor.start_addr().as_usize();
-
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
         Self {
-            mmio_descriptor,
-            wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(addr)),
-            ro_registers: InitStateLock::new(ReadOnlyRegisters::new(addr)),
+            wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(mmio_start_addr)),
+            ro_registers: ReadOnlyRegisters::new(mmio_start_addr),
             handler_table: InitStateLock::new([None; InterruptController::NUM_PERIPHERAL_IRQS]),
         }
     }
 
     /// Query the list of pending IRQs.
     fn pending_irqs(&self) -> PendingIRQs {
-        self.ro_registers.read(|regs| {
-            let pending_mask: u64 =
-                (u64::from(regs.PENDING_2.get()) << 32) | u64::from(regs.PENDING_1.get());
+        let pending_mask: u64 = (u64::from(self.ro_registers.PENDING_2.get()) << 32)
+            | u64::from(self.ro_registers.PENDING_1.get());
 
-            PendingIRQs::new(pending_mask)
-        })
+        PendingIRQs::new(pending_mask)
     }
 }
 
@@ -104,24 +99,6 @@ impl PeripheralIC {
 //------------------------------------------------------------------------------
 use synchronization::interface::{Mutex, ReadWriteEx};
 
-impl driver::interface::DeviceDriver for PeripheralIC {
-    fn compatible(&self) -> &'static str {
-        "BCM Peripheral Interrupt Controller"
-    }
-
-    unsafe fn init(&self) -> Result<(), &'static str> {
-        let virt_addr =
-            memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?.as_usize();
-
-        self.wo_registers
-            .lock(|regs| *regs = WriteOnlyRegisters::new(virt_addr));
-        self.ro_registers
-            .write(|regs| *regs = ReadOnlyRegisters::new(virt_addr));
-
-        Ok(())
-    }
-}
-
 impl exception::asynchronous::interface::IRQManager for PeripheralIC {
     type IRQNumberType = PeripheralIRQ;
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 3133047b1..f67d70dfb 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -10,13 +10,14 @@
 //! - <https://developer.arm.com/documentation/ddi0183/latest>
 
 use crate::{
-    bsp, bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, exception, memory,
-    synchronization, synchronization::IRQSafeNullLock,
-};
-use core::{
-    fmt,
-    sync::atomic::{AtomicUsize, Ordering},
+    bsp,
+    bsp::device_driver::common::MMIODerefWrapper,
+    console, cpu, driver, exception,
+    memory::{Address, Virtual},
+    synchronization,
+    synchronization::IRQSafeNullLock,
 };
+use core::fmt;
 use tock_registers::{
     interfaces::{Readable, Writeable},
     register_bitfields, register_structs,
@@ -219,29 +220,25 @@ enum BlockingMode {
     NonBlocking,
 }
 
-//--------------------------------------------------------------------------------------------------
-// Public Definitions
-//--------------------------------------------------------------------------------------------------
-
-pub struct PL011UartInner {
+struct PL011UartInner {
     registers: Registers,
     chars_written: usize,
     chars_read: usize,
 }
 
-// Export the inner struct so that BSPs can use it for the panic handler.
-pub use PL011UartInner as PanicUart;
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
 
 /// Representation of the UART.
 pub struct PL011Uart {
-    mmio_descriptor: memory::mmu::MMIODescriptor,
-    virt_mmio_start_addr: AtomicUsize,
     inner: IRQSafeNullLock<PL011UartInner>,
     irq_number: bsp::device_driver::IRQNumber,
+    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
-// Public Code
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
 impl PL011UartInner {
@@ -250,7 +247,7 @@ impl PL011UartInner {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
         Self {
             registers: Registers::new(mmio_start_addr),
             chars_written: 0,
@@ -275,15 +272,7 @@ impl PL011UartInner {
     /// genrated baud rate of `48_000_000 / (16 * 3.25) = 923_077`.
     ///
     /// Error = `((923_077 - 921_600) / 921_600) * 100 = 0.16%`.
-    ///
-    /// # Safety
-    ///
-    /// - The user must ensure to provide a correct MMIO start address.
-    pub unsafe fn init(&mut self, new_mmio_start_addr: Option<usize>) -> Result<(), &'static str> {
-        if let Some(addr) = new_mmio_start_addr {
-            self.registers = Registers::new(addr);
-        }
-
+    pub fn init(&mut self) {
         // Execution can arrive here while there are still characters queued in the TX FIFO and
         // actively being sent out by the UART hardware. If the UART is turned off in this case,
         // those queued characters would be lost.
@@ -325,8 +314,6 @@ impl PL011UartInner {
         self.registers
             .CR
             .write(CR::UARTEN::Enabled + CR::TXE::Enabled + CR::RXE::Enabled);
-
-        Ok(())
     }
 
     /// Send a character.
@@ -399,24 +386,28 @@ impl fmt::Write for PL011UartInner {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
 impl PL011Uart {
+    pub const COMPATIBLE: &'static str = "BCM PL011 UART";
+
     /// Create an instance.
     ///
     /// # Safety
     ///
-    /// - The user must ensure to provide correct MMIO descriptors.
+    /// - The user must ensure to provide a correct MMIO start address.
     /// - The user must ensure to provide correct IRQ numbers.
     pub const unsafe fn new(
-        mmio_descriptor: memory::mmu::MMIODescriptor,
+        mmio_start_addr: Address<Virtual>,
         irq_number: bsp::device_driver::IRQNumber,
+        post_init_callback: fn(),
     ) -> Self {
         Self {
-            mmio_descriptor,
-            virt_mmio_start_addr: AtomicUsize::new(0),
-            inner: IRQSafeNullLock::new(PL011UartInner::new(
-                mmio_descriptor.start_addr().as_usize(),
-            )),
+            inner: IRQSafeNullLock::new(PL011UartInner::new(mmio_start_addr)),
             irq_number,
+            post_init_callback,
         }
     }
 }
@@ -428,27 +419,21 @@ use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for PL011Uart {
     fn compatible(&self) -> &'static str {
-        "BCM PL011 UART"
+        Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
-        let virt_addr = memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?;
-
-        self.inner
-            .lock(|inner| inner.init(Some(virt_addr.as_usize())))?;
-
-        self.virt_mmio_start_addr
-            .store(virt_addr.as_usize(), Ordering::Relaxed);
+        self.inner.lock(|inner| inner.init());
+        (self.post_init_callback)();
 
         Ok(())
     }
 
     fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
-        use bsp::exception::asynchronous::irq_manager;
-        use exception::asynchronous::{interface::IRQManager, IRQDescriptor};
+        use exception::asynchronous::{irq_manager, IRQDescriptor};
 
         let descriptor = IRQDescriptor {
-            name: "BCM PL011 UART",
+            name: Self::COMPATIBLE,
             handler: self,
         };
 
@@ -457,16 +442,6 @@ impl driver::interface::DeviceDriver for PL011Uart {
 
         Ok(())
     }
-
-    fn virt_mmio_start_addr(&self) -> Option<usize> {
-        let addr = self.virt_mmio_start_addr.load(Ordering::Relaxed);
-
-        if addr == 0 {
-            return None;
-        }
-
-        Some(addr)
-    }
 }
 
 impl console::interface::Write for PL011Uart {
@@ -514,6 +489,8 @@ impl console::interface::Statistics for PL011Uart {
     }
 }
 
+impl console::interface::All for PL011Uart {}
+
 impl exception::asynchronous::interface::IRQHandler for PL011Uart {
     fn handle(&self) -> Result<(), &'static str> {
         self.inner.lock(|inner| {
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/common.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/common.rs
index fd9e988ea..69f038d4d 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/common.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/common.rs
@@ -4,6 +4,7 @@
 
 //! Common device driver code.
 
+use crate::memory::{Address, Virtual};
 use core::{marker::PhantomData, ops};
 
 //--------------------------------------------------------------------------------------------------
@@ -11,7 +12,7 @@ use core::{marker::PhantomData, ops};
 //--------------------------------------------------------------------------------------------------
 
 pub struct MMIODerefWrapper<T> {
-    start_addr: usize,
+    start_addr: Address<Virtual>,
     phantom: PhantomData<fn() -> T>,
 }
 
@@ -21,7 +22,7 @@ pub struct MMIODerefWrapper<T> {
 
 impl<T> MMIODerefWrapper<T> {
     /// Create an instance.
-    pub const unsafe fn new(start_addr: usize) -> Self {
+    pub const unsafe fn new(start_addr: Address<Virtual>) -> Self {
         Self {
             start_addr,
             phantom: PhantomData,
@@ -33,6 +34,6 @@ impl<T> ops::Deref for MMIODerefWrapper<T> {
     type Target = T;
 
     fn deref(&self) -> &Self::Target {
-        unsafe { &*(self.start_addr as *const _) }
+        unsafe { &*(self.start_addr.as_usize() as *const _) }
     }
 }
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi.rs
index fb9edf88d..474419f4e 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi.rs
@@ -4,46 +4,11 @@
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
-pub mod console;
 pub mod cpu;
 pub mod driver;
 pub mod exception;
 pub mod memory;
 
-use super::device_driver;
-use crate::memory::mmu::MMIODescriptor;
-use memory::map::mmio;
-
-//--------------------------------------------------------------------------------------------------
-// Global instances
-//--------------------------------------------------------------------------------------------------
-
-static GPIO: device_driver::GPIO =
-    unsafe { device_driver::GPIO::new(MMIODescriptor::new(mmio::GPIO_START, mmio::GPIO_SIZE)) };
-
-static PL011_UART: device_driver::PL011Uart = unsafe {
-    device_driver::PL011Uart::new(
-        MMIODescriptor::new(mmio::PL011_UART_START, mmio::PL011_UART_SIZE),
-        exception::asynchronous::irq_map::PL011_UART,
-    )
-};
-
-#[cfg(feature = "bsp_rpi3")]
-static INTERRUPT_CONTROLLER: device_driver::InterruptController = unsafe {
-    device_driver::InterruptController::new(
-        MMIODescriptor::new(mmio::LOCAL_IC_START, mmio::LOCAL_IC_SIZE),
-        MMIODescriptor::new(mmio::PERIPHERAL_IC_START, mmio::PERIPHERAL_IC_SIZE),
-    )
-};
-
-#[cfg(feature = "bsp_rpi4")]
-static INTERRUPT_CONTROLLER: device_driver::GICv2 = unsafe {
-    device_driver::GICv2::new(
-        MMIODescriptor::new(mmio::GICD_START, mmio::GICD_SIZE),
-        MMIODescriptor::new(mmio::GICC_START, mmio::GICC_SIZE),
-    )
-};
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/console.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/console.rs
deleted file mode 100644
index a0d2e687c..000000000
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/console.rs
+++ /dev/null
@@ -1,98 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
-
-//! BSP console facilities.
-
-use crate::{bsp::device_driver, console, cpu, driver};
-use core::fmt;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// In case of a panic, the panic handler uses this function to take a last shot at printing
-/// something before the system is halted.
-///
-/// We try to init panic-versions of the GPIO and the UART. The panic versions are not protected
-/// with synchronization primitives, which increases chances that we get to print something, even
-/// when the kernel's default GPIO or UART instances happen to be locked at the time of the panic.
-///
-/// # Safety
-///
-/// - Use only for printing during a panic.
-#[cfg(not(feature = "test_build"))]
-pub unsafe fn panic_console_out() -> impl fmt::Write {
-    use driver::interface::DeviceDriver;
-
-    // If remapping of the driver's MMIO hasn't already happened, we won't be able to print. Just
-    // park the CPU core in this case.
-    let gpio_mmio_start_addr = match super::GPIO.virt_mmio_start_addr() {
-        None => cpu::wait_forever(),
-        Some(x) => x,
-    };
-
-    let uart_mmio_start_addr = match super::PL011_UART.virt_mmio_start_addr() {
-        None => cpu::wait_forever(),
-        Some(x) => x,
-    };
-
-    let mut panic_gpio = device_driver::PanicGPIO::new(gpio_mmio_start_addr);
-    let mut panic_uart = device_driver::PanicUart::new(uart_mmio_start_addr);
-
-    panic_gpio
-        .init(None)
-        .unwrap_or_else(|_| cpu::wait_forever());
-    panic_gpio.map_pl011_uart();
-    panic_uart
-        .init(None)
-        .unwrap_or_else(|_| cpu::wait_forever());
-
-    panic_uart
-}
-
-/// Reduced version for test builds.
-///
-/// # Safety
-///
-/// - Use only for printing during a panic.
-#[cfg(feature = "test_build")]
-pub unsafe fn panic_console_out() -> impl fmt::Write {
-    use driver::interface::DeviceDriver;
-
-    let uart_mmio_start_addr = match super::PL011_UART.virt_mmio_start_addr() {
-        None => cpu::wait_forever(),
-        Some(x) => x,
-    };
-    let mut panic_uart = device_driver::PanicUart::new(uart_mmio_start_addr);
-
-    panic_uart
-        .init(None)
-        .unwrap_or_else(|_| cpu::qemu_exit_failure());
-
-    panic_uart
-}
-
-/// Return a reference to the console.
-pub fn console() -> &'static impl console::interface::All {
-    &super::PL011_UART
-}
-
-//--------------------------------------------------------------------------------------------------
-// Testing
-//--------------------------------------------------------------------------------------------------
-
-/// Minimal code needed to bring up the console in QEMU (for testing only). This is often less steps
-/// than on real hardware due to QEMU's abstractions.
-#[cfg(feature = "test_build")]
-pub fn qemu_bring_up_console() {
-    use driver::interface::DeviceDriver;
-
-    // Calling the UART's init ensures that the BSP's instance of the UART does remap the MMIO
-    // addresses.
-    unsafe {
-        super::PL011_UART
-            .init()
-            .unwrap_or_else(|_| cpu::qemu_exit_failure());
-    }
-}
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/driver.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/driver.rs
index 531687524..e1db4a005 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/driver.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/driver.rs
@@ -4,7 +4,19 @@
 
 //! BSP driver support.
 
-use crate::driver;
+use super::{exception, memory::map::mmio};
+use crate::{
+    bsp::device_driver,
+    console, driver, exception as generic_exception, memory,
+    memory::mmu::MMIODescriptor,
+    synchronization::{interface::ReadWriteEx, InitStateLock},
+};
+use core::{
+    mem::MaybeUninit,
+    sync::atomic::{AtomicBool, Ordering},
+};
+
+pub use device_driver::IRQNumber;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -12,21 +24,132 @@ use crate::driver;
 
 /// Device Driver Manager type.
 struct BSPDriverManager {
-    device_drivers: [&'static (dyn DeviceDriver + Sync); 3],
+    device_drivers: InitStateLock<[Option<&'static (dyn DeviceDriver + Sync)>; NUM_DRIVERS]>,
+    init_done: AtomicBool,
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// The number of active drivers provided by this BSP.
+pub const NUM_DRIVERS: usize = 3;
+
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
+static mut PL011_UART: MaybeUninit<device_driver::PL011Uart> = MaybeUninit::uninit();
+static mut GPIO: MaybeUninit<device_driver::GPIO> = MaybeUninit::uninit();
+
+#[cfg(feature = "bsp_rpi3")]
+static mut INTERRUPT_CONTROLLER: MaybeUninit<device_driver::InterruptController> =
+    MaybeUninit::uninit();
+
+#[cfg(feature = "bsp_rpi4")]
+static mut INTERRUPT_CONTROLLER: MaybeUninit<device_driver::GICv2> = MaybeUninit::uninit();
+
 static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
-    device_drivers: [
-        &super::GPIO,
-        &super::PL011_UART,
-        &super::INTERRUPT_CONTROLLER,
-    ],
+    device_drivers: InitStateLock::new([None; NUM_DRIVERS]),
+    init_done: AtomicBool::new(false),
 };
 
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl BSPDriverManager {
+    unsafe fn instantiate_uart(&self) -> Result<(), &'static str> {
+        let mmio_descriptor = MMIODescriptor::new(mmio::PL011_UART_START, mmio::PL011_UART_SIZE);
+        let virt_addr =
+            memory::mmu::kernel_map_mmio(device_driver::PL011Uart::COMPATIBLE, &mmio_descriptor)?;
+
+        // This is safe to do, because it is only called from the init'ed instance itself.
+        fn uart_post_init() {
+            console::register_console(unsafe { PL011_UART.assume_init_ref() });
+        }
+
+        PL011_UART.write(device_driver::PL011Uart::new(
+            virt_addr,
+            exception::asynchronous::irq_map::PL011_UART,
+            uart_post_init,
+        ));
+
+        Ok(())
+    }
+
+    unsafe fn instantiate_gpio(&self) -> Result<(), &'static str> {
+        let mmio_descriptor = MMIODescriptor::new(mmio::GPIO_START, mmio::GPIO_SIZE);
+        let virt_addr =
+            memory::mmu::kernel_map_mmio(device_driver::GPIO::COMPATIBLE, &mmio_descriptor)?;
+
+        // This is safe to do, because it is only called from the init'ed instance itself.
+        fn gpio_post_init() {
+            unsafe { GPIO.assume_init_ref().map_pl011_uart() };
+        }
+
+        GPIO.write(device_driver::GPIO::new(virt_addr, gpio_post_init));
+
+        Ok(())
+    }
+
+    #[cfg(feature = "bsp_rpi3")]
+    unsafe fn instantiate_interrupt_controller(&self) -> Result<(), &'static str> {
+        let periph_mmio_descriptor =
+            MMIODescriptor::new(mmio::PERIPHERAL_IC_START, mmio::PERIPHERAL_IC_SIZE);
+        let periph_virt_addr = memory::mmu::kernel_map_mmio(
+            device_driver::InterruptController::COMPATIBLE,
+            &periph_mmio_descriptor,
+        )?;
+
+        // This is safe to do, because it is only called from the init'ed instance itself.
+        fn interrupt_controller_post_init() {
+            generic_exception::asynchronous::register_irq_manager(unsafe {
+                INTERRUPT_CONTROLLER.assume_init_ref()
+            });
+        }
+
+        INTERRUPT_CONTROLLER.write(device_driver::InterruptController::new(
+            periph_virt_addr,
+            interrupt_controller_post_init,
+        ));
+
+        Ok(())
+    }
+
+    #[cfg(feature = "bsp_rpi4")]
+    unsafe fn instantiate_interrupt_controller(&self) -> Result<(), &'static str> {
+        let gicd_mmio_descriptor = MMIODescriptor::new(mmio::GICD_START, mmio::GICD_SIZE);
+        let gicd_virt_addr = memory::mmu::kernel_map_mmio("GICv2 GICD", &gicd_mmio_descriptor)?;
+
+        let gicc_mmio_descriptor = MMIODescriptor::new(mmio::GICC_START, mmio::GICC_SIZE);
+        let gicc_virt_addr = memory::mmu::kernel_map_mmio("GICV2 GICC", &gicc_mmio_descriptor)?;
+
+        // This is safe to do, because it is only called from the init'ed instance itself.
+        fn interrupt_controller_post_init() {
+            generic_exception::asynchronous::register_irq_manager(unsafe {
+                INTERRUPT_CONTROLLER.assume_init_ref()
+            });
+        }
+
+        INTERRUPT_CONTROLLER.write(device_driver::GICv2::new(
+            gicd_virt_addr,
+            gicc_virt_addr,
+            interrupt_controller_post_init,
+        ));
+
+        Ok(())
+    }
+
+    unsafe fn register_drivers(&self) {
+        self.device_drivers.write(|drivers| {
+            drivers[0] = Some(PL011_UART.assume_init_ref());
+            drivers[1] = Some(GPIO.assume_init_ref());
+            drivers[2] = Some(INTERRUPT_CONTROLLER.assume_init_ref());
+        });
+    }
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -42,20 +165,34 @@ pub fn driver_manager() -> &'static impl driver::interface::DriverManager {
 use driver::interface::DeviceDriver;
 
 impl driver::interface::DriverManager for BSPDriverManager {
-    fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
-        &self.device_drivers[..]
-    }
+    unsafe fn instantiate_drivers(&self) -> Result<(), &'static str> {
+        if self.init_done.load(Ordering::Relaxed) {
+            return Err("Drivers already instantiated");
+        }
+
+        self.instantiate_uart()?;
+        self.instantiate_gpio()?;
+        self.instantiate_interrupt_controller()?;
 
-    fn early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
-        &self.device_drivers[0..=1]
+        self.register_drivers();
+
+        self.init_done.store(true, Ordering::Relaxed);
+        Ok(())
     }
 
-    fn non_early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
-        &self.device_drivers[2..]
+    fn all_device_drivers(&self) -> [&(dyn DeviceDriver + Sync); NUM_DRIVERS] {
+        self.device_drivers
+            .read(|drivers| drivers.map(|drivers| drivers.unwrap()))
     }
 
-    fn post_early_print_device_driver_init(&self) {
-        // Configure PL011Uart's output pins.
-        super::GPIO.map_pl011_uart();
+    #[cfg(feature = "test_build")]
+    fn qemu_bring_up_console(&self) {
+        use crate::cpu;
+
+        unsafe {
+            self.instantiate_uart()
+                .unwrap_or_else(|_| cpu::qemu_exit_failure());
+            console::register_console(PL011_UART.assume_init_ref());
+        };
     }
 }
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/exception/asynchronous.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
index dc5ab4215..ab20d86d3 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
@@ -4,7 +4,7 @@
 
 //! BSP asynchronous exception handling.
 
-use crate::{bsp, exception};
+use crate::bsp;
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -23,14 +23,3 @@ pub(in crate::bsp) mod irq_map {
 
     pub const PL011_UART: IRQNumber = IRQNumber::new(153);
 }
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return a reference to the IRQ manager.
-pub fn irq_manager() -> &'static impl exception::asynchronous::interface::IRQManager<
-    IRQNumberType = bsp::device_driver::IRQNumber,
-> {
-    &super::super::INTERRUPT_CONTROLLER
-}
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/memory.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/memory.rs
index 9e071726c..f34009dea 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/memory.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/memory.rs
@@ -111,9 +111,6 @@ pub(super) mod map {
         pub const PL011_UART_START:    Address<Physical> = Address::new(0x3F20_1000);
         pub const PL011_UART_SIZE:     usize             =              0x48;
 
-        pub const LOCAL_IC_START:      Address<Physical> = Address::new(0x4000_0000);
-        pub const LOCAL_IC_SIZE:       usize             =              0x100;
-
         pub const END:                 Address<Physical> = Address::new(0x4001_0000);
     }
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/console.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/console.rs
index e49e241fe..a85bcffe7 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/console.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/console.rs
@@ -4,6 +4,10 @@
 
 //! System console.
 
+mod null_console;
+
+use crate::synchronization;
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -49,5 +53,29 @@ pub mod interface {
     }
 
     /// Trait alias for a full-fledged console.
-    pub trait All = Write + Read + Statistics;
+    pub trait All: Write + Read + Statistics {}
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static CUR_CONSOLE: InitStateLock<&'static (dyn interface::All + Sync)> =
+    InitStateLock::new(&null_console::NULL_CONSOLE);
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+use synchronization::{interface::ReadWriteEx, InitStateLock};
+
+/// Register a new console.
+pub fn register_console(new_console: &'static (dyn interface::All + Sync)) {
+    CUR_CONSOLE.write(|con| *con = new_console);
+}
+
+/// Return a reference to the currently registered console.
+///
+/// This is the global console used by all printing macros.
+pub fn console() -> &'static dyn interface::All {
+    CUR_CONSOLE.read(|con| *con)
 }
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/console/null_console.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/console/null_console.rs
new file mode 100644
index 000000000..10c3bedc0
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/console/null_console.rs
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Null console.
+
+use super::interface;
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct NullConsole;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+pub static NULL_CONSOLE: NullConsole = NullConsole {};
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl interface::Write for NullConsole {
+    fn write_char(&self, _c: char) {}
+
+    fn write_fmt(&self, _args: fmt::Arguments) -> fmt::Result {
+        fmt::Result::Ok(())
+    }
+
+    fn flush(&self) {}
+}
+
+impl interface::Read for NullConsole {
+    fn clear_rx(&self) {}
+}
+
+impl interface::Statistics for NullConsole {}
+impl interface::All for NullConsole {}
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/driver.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/driver.rs
index 7b800dbc3..98197fef3 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/driver.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/driver.rs
@@ -10,6 +10,8 @@
 
 /// Driver interfaces.
 pub mod interface {
+    use crate::bsp;
+
     /// Device Driver functions.
     pub trait DeviceDriver {
         /// Return a compatibility string for identifying the driver.
@@ -31,32 +33,25 @@ pub mod interface {
         fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
             Ok(())
         }
-
-        /// After MMIO remapping, returns the new virtual start address.
-        ///
-        /// This API assumes a driver has only a single, contiguous MMIO aperture, which will not be
-        /// the case for more complex devices. This API will likely change in future tutorials.
-        fn virt_mmio_start_addr(&self) -> Option<usize> {
-            None
-        }
     }
 
     /// Device driver management functions.
     ///
     /// The `BSP` is supposed to supply one global instance.
     pub trait DriverManager {
-        /// Return a slice of references to all `BSP`-instantiated drivers.
-        fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
-
-        /// Return only those drivers needed for the BSP's early printing functionality.
+        /// Instantiate all drivers.
+        ///
+        /// # Safety
         ///
-        /// For example, the default UART.
-        fn early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
+        /// Must be called before `all_device_drivers`.
+        unsafe fn instantiate_drivers(&self) -> Result<(), &'static str>;
 
-        /// Return all drivers minus early-print drivers.
-        fn non_early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
+        /// Return a slice of references to all `BSP`-instantiated drivers.
+        fn all_device_drivers(&self) -> [&(dyn DeviceDriver + Sync); bsp::driver::NUM_DRIVERS];
 
-        /// Initialization code that runs after the early print driver init.
-        fn post_early_print_device_driver_init(&self);
+        /// Minimal code needed to bring up the console in QEMU (for testing only). This is often
+        /// less steps than on real hardware due to QEMU's abstractions.
+        #[cfg(feature = "test_build")]
+        fn qemu_bring_up_console(&self);
     }
 }
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception/asynchronous.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception/asynchronous.rs
index fb1785c23..d9d2767cf 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception/asynchronous.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception/asynchronous.rs
@@ -7,7 +7,9 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "../_arch/aarch64/exception/asynchronous.rs"]
 mod arch_asynchronous;
+mod null_irq_manager;
 
+use crate::{bsp, synchronization};
 use core::{fmt, marker::PhantomData};
 
 //--------------------------------------------------------------------------------------------------
@@ -85,7 +87,7 @@ pub mod interface {
         );
 
         /// Print list of registered handlers.
-        fn print_handler(&self);
+        fn print_handler(&self) {}
     }
 }
 
@@ -93,9 +95,18 @@ pub mod interface {
 #[derive(Copy, Clone)]
 pub struct IRQNumber<const MAX_INCLUSIVE: usize>(usize);
 
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static CUR_IRQ_MANAGER: InitStateLock<
+    &'static (dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber> + Sync),
+> = InitStateLock::new(&null_irq_manager::NULL_IRQ_MANAGER);
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
+use synchronization::{interface::ReadWriteEx, InitStateLock};
 
 impl<'irq_context> IRQContext<'irq_context> {
     /// Creates an IRQContext token.
@@ -150,3 +161,18 @@ pub fn exec_with_irq_masked<T>(f: impl FnOnce() -> T) -> T {
 
     ret
 }
+
+/// Register a new IRQ manager.
+pub fn register_irq_manager(
+    new_manager: &'static (dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber>
+                  + Sync),
+) {
+    CUR_IRQ_MANAGER.write(|manager| *manager = new_manager);
+}
+
+/// Return a reference to the currently registered IRQ manager.
+///
+/// This is the IRQ manager used by the architectural interrupt handling code.
+pub fn irq_manager() -> &'static dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber> {
+    CUR_IRQ_MANAGER.read(|manager| *manager)
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception/asynchronous/null_irq_manager.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception/asynchronous/null_irq_manager.rs
new file mode 100644
index 000000000..560e3ce4b
--- /dev/null
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception/asynchronous/null_irq_manager.rs
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Null IRQ Manager.
+
+use super::{interface, IRQContext, IRQDescriptor};
+use crate::bsp;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct NullIRQManager;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+pub static NULL_IRQ_MANAGER: NullIRQManager = NullIRQManager {};
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl interface::IRQManager for NullIRQManager {
+    type IRQNumberType = bsp::driver::IRQNumber;
+
+    fn register_handler(
+        &self,
+        _irq_number: Self::IRQNumberType,
+        _descriptor: IRQDescriptor,
+    ) -> Result<(), &'static str> {
+        panic!("No IRQ Manager registered yet");
+    }
+
+    fn enable(&self, _irq_number: Self::IRQNumberType) {
+        panic!("No IRQ Manager registered yet");
+    }
+
+    fn handle_pending_irqs<'irq_context>(&'irq_context self, _ic: &IRQContext<'irq_context>) {
+        panic!("No IRQ Manager registered yet");
+    }
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
index c9c037929..f023d6831 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
@@ -114,6 +114,7 @@
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(generic_const_exprs)]
+#![feature(is_sorted)]
 #![feature(linkage)]
 #![feature(panic_info_message)]
 #![feature(step_trait)]
@@ -176,9 +177,11 @@ pub fn test_runner(tests: &[&test_types::UnitTest]) {
 #[cfg(test)]
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
     exception::handling_init();
     memory::mmu::post_enable_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     test_main();
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/main.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/main.rs
index 5150f3afc..928f12c2f 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/main.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/main.rs
@@ -30,26 +30,11 @@ unsafe fn kernel_init() -> ! {
     exception::handling_init();
     memory::mmu::post_enable_init();
 
-    // Add the mapping records for the precomputed entries first, so that they appear on the top of
-    // the list.
-    bsp::memory::mmu::kernel_add_mapping_records_for_precomputed();
-
-    // Bring up the drivers needed for printing first.
-    for i in bsp::driver::driver_manager()
-        .early_print_device_drivers()
-        .iter()
-    {
-        // Any encountered errors cannot be printed yet, obviously, so just safely park the CPU.
-        i.init().unwrap_or_else(|_| cpu::wait_forever());
+    // Instantiate and init all device drivers.
+    if let Err(x) = bsp::driver::driver_manager().instantiate_drivers() {
+        panic!("Error instantiating drivers: {}", x);
     }
-    bsp::driver::driver_manager().post_early_print_device_driver_init();
-    // Printing available from here on.
-
-    // Now bring up the remaining drivers.
-    for i in bsp::driver::driver_manager()
-        .non_early_print_device_drivers()
-        .iter()
-    {
+    for i in bsp::driver::driver_manager().all_device_drivers().iter() {
         if let Err(x) = i.init() {
             panic!("Error loading driver: {}: {}", i.compatible(), x);
         }
@@ -62,6 +47,8 @@ unsafe fn kernel_init() -> ! {
         }
     }
 
+    bsp::memory::mmu::kernel_add_mapping_records_for_precomputed();
+
     // Unmask interrupts on the boot CPU core.
     exception::asynchronous::local_irq_unmask();
 
@@ -75,7 +62,6 @@ unsafe fn kernel_init() -> ! {
 /// The main function running after the early init.
 fn kernel_main() -> ! {
     use driver::interface::DriverManager;
-    use exception::asynchronous::interface::IRQManager;
 
     info!("{}", libkernel::version());
     info!("Booting on: {}", bsp::board_name());
@@ -104,7 +90,7 @@ fn kernel_main() -> ! {
     }
 
     info!("Registered IRQ handlers:");
-    bsp::exception::asynchronous::irq_manager().print_handler();
+    exception::asynchronous::irq_manager().print_handler();
 
     info!("Echoing input now");
     cpu::wait_forever();
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory.rs
index f20719bb7..64d8cf64e 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory.rs
@@ -18,18 +18,18 @@ use core::{
 //--------------------------------------------------------------------------------------------------
 
 /// Metadata trait for marking the type of an address.
-pub trait AddressType: Copy + Clone + PartialOrd + PartialEq {}
+pub trait AddressType: Copy + Clone + PartialOrd + PartialEq + Ord + Eq {}
 
 /// Zero-sized type to mark a physical address.
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq, Ord, Eq)]
 pub enum Physical {}
 
 /// Zero-sized type to mark a virtual address.
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq, Ord, Eq)]
 pub enum Virtual {}
 
 /// Generic address type.
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq, Ord, Eq)]
 pub struct Address<ATYPE: AddressType> {
     value: usize,
     _address_type: PhantomData<fn() -> ATYPE>,
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/mapping_record.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/mapping_record.rs
index d171c6e67..7d3a6c601 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/mapping_record.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/mapping_record.rs
@@ -76,6 +76,19 @@ impl MappingRecord {
         Self { inner: [None; 12] }
     }
 
+    fn size(&self) -> usize {
+        self.inner.iter().filter(|x| x.is_some()).count()
+    }
+
+    fn sort(&mut self) {
+        let upper_bound_exclusive = self.size();
+        let entries = &mut self.inner[0..upper_bound_exclusive];
+
+        if !entries.is_sorted_by_key(|item| item.unwrap().virt_start_addr) {
+            entries.sort_unstable_by_key(|item| item.unwrap().virt_start_addr)
+        }
+    }
+
     fn find_next_free(&mut self) -> Result<&mut Option<MappingRecordEntry>, &'static str> {
         if let Some(x) = self.inner.iter_mut().find(|x| x.is_none()) {
             return Ok(x);
@@ -121,6 +134,9 @@ impl MappingRecord {
             phys_region,
             attr,
         ));
+
+        self.sort();
+
         Ok(())
     }
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/panic_wait.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/panic_wait.rs
index 08d7d4533..e4256b616 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/panic_wait.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/panic_wait.rs
@@ -4,19 +4,13 @@
 
 //! A panic handler that infinitely waits.
 
-use crate::{bsp, cpu, exception};
-use core::{fmt, panic::PanicInfo};
+use crate::{cpu, exception, println};
+use core::panic::PanicInfo;
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-fn _panic_print(args: fmt::Arguments) {
-    use fmt::Write;
-
-    unsafe { bsp::console::panic_console_out().write_fmt(args).unwrap() };
-}
-
 /// The point of exit for `libkernel`.
 ///
 /// It is linked weakly, so that the integration tests can overload its standard behavior.
@@ -34,16 +28,6 @@ fn _panic_exit() -> ! {
     }
 }
 
-/// Prints with a newline - only use from the panic handler.
-///
-/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
-#[macro_export]
-macro_rules! panic_println {
-    ($($arg:tt)*) => ({
-        _panic_print(format_args_nl!($($arg)*));
-    })
-}
-
 /// Stop immediately if called a second time.
 ///
 /// # Note
@@ -88,7 +72,7 @@ fn panic(info: &PanicInfo) -> ! {
         _ => ("???", 0, 0),
     };
 
-    panic_println!(
+    println!(
         "[  {:>3}.{:06}] Kernel panic!\n\n\
         Panic location:\n      File '{}', line {}, column {}\n\n\
         {}",
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/print.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/print.rs
index 9ec13a286..8705eec0d 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/print.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/print.rs
@@ -4,7 +4,7 @@
 
 //! Printing.
 
-use crate::{bsp, console};
+use crate::console;
 use core::fmt;
 
 //--------------------------------------------------------------------------------------------------
@@ -13,9 +13,7 @@ use core::fmt;
 
 #[doc(hidden)]
 pub fn _print(args: fmt::Arguments) {
-    use console::interface::Write;
-
-    bsp::console::console().write_fmt(args).unwrap();
+    console::console().write_fmt(args).unwrap();
 }
 
 /// Prints without a newline.
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/00_console_sanity.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/00_console_sanity.rs
index 6595aac1b..f2a1f3edf 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/00_console_sanity.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/00_console_sanity.rs
@@ -11,16 +11,16 @@
 /// Console tests should time out on the I/O harness in case of panic.
 mod panic_wait_forever;
 
-use libkernel::{bsp, console, cpu, exception, memory, print};
+use libkernel::{bsp, console, cpu, driver, exception, memory, print};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use bsp::console::console;
-    use console::interface::*;
+    use console::console;
+    use driver::interface::DriverManager;
 
     exception::handling_init();
     memory::mmu::post_enable_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     // Handshake
     assert_eq!(console().read_char(), 'A');
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/01_timer_sanity.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/01_timer_sanity.rs
index 9b2b228d9..caeca3cd4 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/01_timer_sanity.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/01_timer_sanity.rs
@@ -11,14 +11,16 @@
 #![test_runner(libkernel::test_runner)]
 
 use core::time::Duration;
-use libkernel::{bsp, cpu, exception, memory, time, time::interface::TimeManager};
+use libkernel::{bsp, cpu, driver, exception, memory, time, time::interface::TimeManager};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
     exception::handling_init();
     memory::mmu::post_enable_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/02_exception_sync_page_fault.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/02_exception_sync_page_fault.rs
index 0d2a1e63c..33463e0a8 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/02_exception_sync_page_fault.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/02_exception_sync_page_fault.rs
@@ -17,13 +17,15 @@
 /// or indirectly.
 mod panic_exit_success;
 
-use libkernel::{bsp, cpu, exception, info, memory, println};
+use libkernel::{bsp, cpu, driver, exception, info, memory, println};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
     exception::handling_init();
     memory::mmu::post_enable_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     // This line will be printed as the test header.
     println!("Testing synchronous exception handling by causing a page fault");
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/03_exception_restore_sanity.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/03_exception_restore_sanity.rs
index 983d488f1..a521a8711 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/03_exception_restore_sanity.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/03_exception_restore_sanity.rs
@@ -12,7 +12,7 @@
 mod panic_wait_forever;
 
 use core::arch::asm;
-use libkernel::{bsp, cpu, exception, info, memory, println};
+use libkernel::{bsp, cpu, driver, exception, info, memory, println};
 
 #[inline(never)]
 fn nested_system_call() {
@@ -30,9 +30,11 @@ fn nested_system_call() {
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
     exception::handling_init();
     memory::mmu::post_enable_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     // This line will be printed as the test header.
     println!("Testing exception restore");
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/04_exception_irq_sanity.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/04_exception_irq_sanity.rs
index 9030424d5..cd2d29d6a 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/04_exception_irq_sanity.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/04_exception_irq_sanity.rs
@@ -10,13 +10,15 @@
 #![reexport_test_harness_main = "test_main"]
 #![test_runner(libkernel::test_runner)]
 
-use libkernel::{bsp, cpu, exception, memory};
+use libkernel::{bsp, cpu, driver, exception, memory};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
     memory::mmu::post_enable_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     exception::handling_init();
     exception::asynchronous::local_irq_unmask();
diff --git a/17_kernel_symbols/Makefile b/17_kernel_symbols/Makefile
index 41cecae37..ec71b493b 100644
--- a/17_kernel_symbols/Makefile
+++ b/17_kernel_symbols/Makefile
@@ -215,7 +215,7 @@ $(KERNEL_BIN): $(KERNEL_ELF_TTABLES_SYMS)
 ##------------------------------------------------------------------------------
 ## Generate the documentation
 ##------------------------------------------------------------------------------
-doc:
+doc: clean
 	$(call color_header, "Generating docs")
 	@$(DOC_CMD) --document-private-items --open
 
diff --git a/17_kernel_symbols/README.md b/17_kernel_symbols/README.md
index 897e38cdb..84378fff1 100644
--- a/17_kernel_symbols/README.md
+++ b/17_kernel_symbols/README.md
@@ -269,12 +269,12 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/excep
  //!
  //! crate::exception::arch_exception
 
--use crate::{bsp, exception};
-+use crate::{bsp, exception, memory, symbols};
+-use crate::exception;
++use crate::{exception, memory, symbols};
  use core::{arch::global_asm, cell::UnsafeCell, fmt};
  use cortex_a::{asm::barrier, registers::*};
  use tock_registers::{
-@@ -262,6 +262,14 @@
+@@ -260,6 +260,14 @@
 
          writeln!(f, "{}", self.spsr_el1)?;
          writeln!(f, "ELR_EL1: {:#018x}", self.elr_el1)?;
@@ -332,7 +332,7 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/mem
 diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs 17_kernel_symbols/kernel/src/lib.rs
 --- 16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
 +++ 17_kernel_symbols/kernel/src/lib.rs
-@@ -137,6 +137,7 @@
+@@ -138,6 +138,7 @@
  pub mod memory;
  pub mod print;
  pub mod state;
@@ -731,6 +731,15 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/Makefile 17_kernel_symbols/Mak
  	$(call color_progress_prefix, "Name")
  	@echo $(KERNEL_BIN)
  	$(call color_progress_prefix, "Size")
+@@ -190,7 +215,7 @@
+ ##------------------------------------------------------------------------------
+ ## Generate the documentation
+ ##------------------------------------------------------------------------------
+-doc:
++doc: clean
+ 	$(call color_header, "Generating docs")
+ 	@$(DOC_CMD) --document-private-items --open
+
 @@ -318,10 +343,19 @@
      cd $(shell pwd)
 
diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/exception.rs b/17_kernel_symbols/kernel/src/_arch/aarch64/exception.rs
index 6781758af..3672466ca 100644
--- a/17_kernel_symbols/kernel/src/_arch/aarch64/exception.rs
+++ b/17_kernel_symbols/kernel/src/_arch/aarch64/exception.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::exception::arch_exception
 
-use crate::{bsp, exception, memory, symbols};
+use crate::{exception, memory, symbols};
 use core::{arch::global_asm, cell::UnsafeCell, fmt};
 use cortex_a::{asm::barrier, registers::*};
 use tock_registers::{
@@ -104,10 +104,8 @@ unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
 
 #[no_mangle]
 unsafe extern "C" fn current_elx_irq(_e: &mut ExceptionContext) {
-    use exception::asynchronous::interface::IRQManager;
-
     let token = &exception::asynchronous::IRQContext::new();
-    bsp::exception::asynchronous::irq_manager().handle_pending_irqs(token);
+    exception::asynchronous::irq_manager().handle_pending_irqs(token);
 }
 
 #[no_mangle]
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2.rs
index 4c68a6929..e72fde7be 100644
--- a/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2.rs
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2.rs
@@ -79,8 +79,12 @@
 mod gicc;
 mod gicd;
 
-use crate::{bsp, cpu, driver, exception, memory, synchronization, synchronization::InitStateLock};
-use core::sync::atomic::{AtomicBool, Ordering};
+use crate::{
+    bsp, cpu, driver, exception,
+    memory::{Address, Virtual},
+    synchronization,
+    synchronization::InitStateLock,
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -97,20 +101,17 @@ pub type IRQNumber = exception::asynchronous::IRQNumber<{ GICv2::MAX_IRQ_NUMBER
 
 /// Representation of the GIC.
 pub struct GICv2 {
-    gicd_mmio_descriptor: memory::mmu::MMIODescriptor,
-    gicc_mmio_descriptor: memory::mmu::MMIODescriptor,
-
     /// The Distributor.
     gicd: gicd::GICD,
 
     /// The CPU Interface.
     gicc: gicc::GICC,
 
-    /// Have the MMIO regions been remapped yet?
-    is_mmio_remapped: AtomicBool,
-
     /// Stores registered IRQ handlers. Writable only during kernel init. RO afterwards.
     handler_table: InitStateLock<HandlerTable>,
+
+    /// Callback to be invoked after successful init.
+    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -121,22 +122,23 @@ impl GICv2 {
     const MAX_IRQ_NUMBER: usize = 300; // Normally 1019, but keep it lower to save some space.
     const NUM_IRQS: usize = Self::MAX_IRQ_NUMBER + 1;
 
+    pub const COMPATIBLE: &'static str = "GICv2 (ARM Generic Interrupt Controller v2)";
+
     /// Create an instance.
     ///
     /// # Safety
     ///
-    /// - The user must ensure to provide correct MMIO descriptors.
+    /// - The user must ensure to provide a correct MMIO start address.
     pub const unsafe fn new(
-        gicd_mmio_descriptor: memory::mmu::MMIODescriptor,
-        gicc_mmio_descriptor: memory::mmu::MMIODescriptor,
+        gicd_mmio_start_addr: Address<Virtual>,
+        gicc_mmio_start_addr: Address<Virtual>,
+        post_init_callback: fn(),
     ) -> Self {
         Self {
-            gicd_mmio_descriptor,
-            gicc_mmio_descriptor,
-            gicd: gicd::GICD::new(gicd_mmio_descriptor.start_addr().as_usize()),
-            gicc: gicc::GICC::new(gicc_mmio_descriptor.start_addr().as_usize()),
-            is_mmio_remapped: AtomicBool::new(false),
+            gicd: gicd::GICD::new(gicd_mmio_start_addr),
+            gicc: gicc::GICC::new(gicc_mmio_start_addr),
             handler_table: InitStateLock::new([None; Self::NUM_IRQS]),
+            post_init_callback,
         }
     }
 }
@@ -148,24 +150,10 @@ use synchronization::interface::ReadWriteEx;
 
 impl driver::interface::DeviceDriver for GICv2 {
     fn compatible(&self) -> &'static str {
-        "GICv2 (ARM Generic Interrupt Controller v2)"
+        Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
-        let remapped = self.is_mmio_remapped.load(Ordering::Relaxed);
-        if !remapped {
-            // GICD
-            let mut virt_addr = memory::mmu::kernel_map_mmio("GICD", &self.gicd_mmio_descriptor)?;
-            self.gicd.set_mmio(virt_addr.as_usize());
-
-            // GICC
-            virt_addr = memory::mmu::kernel_map_mmio("GICC", &self.gicc_mmio_descriptor)?;
-            self.gicc.set_mmio(virt_addr.as_usize());
-
-            // Conclude remapping.
-            self.is_mmio_remapped.store(true, Ordering::Relaxed);
-        }
-
         if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
             self.gicd.boot_core_init();
         }
@@ -173,6 +161,8 @@ impl driver::interface::DeviceDriver for GICv2 {
         self.gicc.priority_accept_all();
         self.gicc.enable();
 
+        (self.post_init_callback)();
+
         Ok(())
     }
 }
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
index 1a151d246..1a02fc650 100644
--- a/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
@@ -5,7 +5,9 @@
 //! GICC Driver - GIC CPU interface.
 
 use crate::{
-    bsp::device_driver::common::MMIODerefWrapper, exception, synchronization::InitStateLock,
+    bsp::device_driver::common::MMIODerefWrapper,
+    exception,
+    memory::{Address, Virtual},
 };
 use tock_registers::{
     interfaces::{Readable, Writeable},
@@ -62,13 +64,12 @@ type Registers = MMIODerefWrapper<RegisterBlock>;
 
 /// Representation of the GIC CPU interface.
 pub struct GICC {
-    registers: InitStateLock<Registers>,
+    registers: Registers,
 }
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
-use crate::synchronization::interface::ReadWriteEx;
 
 impl GICC {
     /// Create an instance.
@@ -76,17 +77,12 @@ impl GICC {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
         Self {
-            registers: InitStateLock::new(Registers::new(mmio_start_addr)),
+            registers: Registers::new(mmio_start_addr),
         }
     }
 
-    pub unsafe fn set_mmio(&self, new_mmio_start_addr: usize) {
-        self.registers
-            .write(|regs| *regs = Registers::new(new_mmio_start_addr));
-    }
-
     /// Accept interrupts of any priority.
     ///
     /// Quoting the GICv2 Architecture Specification:
@@ -99,9 +95,7 @@ impl GICC {
     /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
     ///   of `&mut self`.
     pub fn priority_accept_all(&self) {
-        self.registers.read(|regs| {
-            regs.PMR.write(PMR::Priority.val(255)); // Comment in arch spec.
-        });
+        self.registers.PMR.write(PMR::Priority.val(255)); // Comment in arch spec.
     }
 
     /// Enable the interface - start accepting IRQs.
@@ -111,9 +105,7 @@ impl GICC {
     /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
     ///   of `&mut self`.
     pub fn enable(&self) {
-        self.registers.read(|regs| {
-            regs.CTLR.write(CTLR::Enable::SET);
-        });
+        self.registers.CTLR.write(CTLR::Enable::SET);
     }
 
     /// Extract the number of the highest-priority pending IRQ.
@@ -129,8 +121,7 @@ impl GICC {
         &self,
         _ic: &exception::asynchronous::IRQContext<'irq_context>,
     ) -> usize {
-        self.registers
-            .read(|regs| regs.IAR.read(IAR::InterruptID) as usize)
+        self.registers.IAR.read(IAR::InterruptID) as usize
     }
 
     /// Complete handling of the currently active IRQ.
@@ -149,8 +140,6 @@ impl GICC {
         irq_number: u32,
         _ic: &exception::asynchronous::IRQContext<'irq_context>,
     ) {
-        self.registers.read(|regs| {
-            regs.EOIR.write(EOIR::EOIINTID.val(irq_number));
-        });
+        self.registers.EOIR.write(EOIR::EOIINTID.val(irq_number));
     }
 }
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
index 60bbc4689..d9f63d1bb 100644
--- a/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -9,8 +9,9 @@
 
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper,
+    memory::{Address, Virtual},
     state, synchronization,
-    synchronization::{IRQSafeNullLock, InitStateLock},
+    synchronization::IRQSafeNullLock,
 };
 use tock_registers::{
     interfaces::{Readable, Writeable},
@@ -84,7 +85,7 @@ pub struct GICD {
     shared_registers: IRQSafeNullLock<SharedRegisters>,
 
     /// Access to banked registers is unguarded.
-    banked_registers: InitStateLock<BankedRegisters>,
+    banked_registers: BankedRegisters,
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -121,7 +122,6 @@ impl SharedRegisters {
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
-use crate::synchronization::interface::ReadWriteEx;
 use synchronization::interface::Mutex;
 
 impl GICD {
@@ -130,20 +130,13 @@ impl GICD {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
         Self {
             shared_registers: IRQSafeNullLock::new(SharedRegisters::new(mmio_start_addr)),
-            banked_registers: InitStateLock::new(BankedRegisters::new(mmio_start_addr)),
+            banked_registers: BankedRegisters::new(mmio_start_addr),
         }
     }
 
-    pub unsafe fn set_mmio(&self, new_mmio_start_addr: usize) {
-        self.shared_registers
-            .lock(|regs| *regs = SharedRegisters::new(new_mmio_start_addr));
-        self.banked_registers
-            .write(|regs| *regs = BankedRegisters::new(new_mmio_start_addr));
-    }
-
     /// Use a banked ITARGETSR to retrieve the executing core's GIC target mask.
     ///
     /// Quoting the GICv2 Architecture Specification:
@@ -151,8 +144,7 @@ impl GICD {
     ///   "GICD_ITARGETSR0 to GICD_ITARGETSR7 are read-only, and each field returns a value that
     ///    corresponds only to the processor reading the register."
     fn local_gic_target_mask(&self) -> u32 {
-        self.banked_registers
-            .read(|regs| regs.ITARGETSR[0].read(ITARGETSR::Offset0))
+        self.banked_registers.ITARGETSR[0].read(ITARGETSR::Offset0)
     }
 
     /// Route all SPIs to the boot core and enable the distributor.
@@ -191,10 +183,10 @@ impl GICD {
         // Check if we are handling a private or shared IRQ.
         match irq_num {
             // Private.
-            0..=31 => self.banked_registers.read(|regs| {
-                let enable_reg = &regs.ISENABLER;
+            0..=31 => {
+                let enable_reg = &self.banked_registers.ISENABLER;
                 enable_reg.set(enable_reg.get() | enable_bit);
-            }),
+            }
             // Shared.
             _ => {
                 let enable_reg_index_shared = enable_reg_index - 1;
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index eea07b755..a3361c2cc 100644
--- a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -5,10 +5,12 @@
 //! GPIO Driver.
 
 use crate::{
-    bsp::device_driver::common::MMIODerefWrapper, driver, memory, synchronization,
+    bsp::device_driver::common::MMIODerefWrapper,
+    driver,
+    memory::{Address, Virtual},
+    synchronization,
     synchronization::IRQSafeNullLock,
 };
-use core::sync::atomic::{AtomicUsize, Ordering};
 use tock_registers::{
     interfaces::{ReadWriteable, Writeable},
     register_bitfields, register_structs,
@@ -109,26 +111,22 @@ register_structs! {
 /// Abstraction for the associated MMIO registers.
 type Registers = MMIODerefWrapper<RegisterBlock>;
 
-//--------------------------------------------------------------------------------------------------
-// Public Definitions
-//--------------------------------------------------------------------------------------------------
-
-pub struct GPIOInner {
+struct GPIOInner {
     registers: Registers,
 }
 
-// Export the inner struct so that BSPs can use it for the panic handler.
-pub use GPIOInner as PanicGPIO;
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
 
 /// Representation of the GPIO HW.
 pub struct GPIO {
-    mmio_descriptor: memory::mmu::MMIODescriptor,
-    virt_mmio_start_addr: AtomicUsize,
     inner: IRQSafeNullLock<GPIOInner>,
+    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
-// Public Code
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
 impl GPIOInner {
@@ -137,25 +135,12 @@ impl GPIOInner {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
         Self {
             registers: Registers::new(mmio_start_addr),
         }
     }
 
-    /// Init code.
-    ///
-    /// # Safety
-    ///
-    /// - The user must ensure to provide a correct MMIO start address.
-    pub unsafe fn init(&mut self, new_mmio_start_addr: Option<usize>) -> Result<(), &'static str> {
-        if let Some(addr) = new_mmio_start_addr {
-            self.registers = Registers::new(addr);
-        }
-
-        Ok(())
-    }
-
     /// Disable pull-up/down on pins 14 and 15.
     #[cfg(feature = "bsp_rpi3")]
     fn disable_pud_14_15_bcm2837(&mut self) {
@@ -205,17 +190,22 @@ impl GPIOInner {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
 impl GPIO {
+    pub const COMPATIBLE: &'static str = "BCM GPIO";
+
     /// Create an instance.
     ///
     /// # Safety
     ///
-    /// - The user must ensure to provide correct MMIO descriptors.
-    pub const unsafe fn new(mmio_descriptor: memory::mmu::MMIODescriptor) -> Self {
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>, post_init_callback: fn()) -> Self {
         Self {
-            mmio_descriptor,
-            virt_mmio_start_addr: AtomicUsize::new(0),
-            inner: IRQSafeNullLock::new(GPIOInner::new(mmio_descriptor.start_addr().as_usize())),
+            inner: IRQSafeNullLock::new(GPIOInner::new(mmio_start_addr)),
+            post_init_callback,
         }
     }
 
@@ -232,28 +222,12 @@ use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for GPIO {
     fn compatible(&self) -> &'static str {
-        "BCM GPIO"
+        Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
-        let virt_addr = memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?;
-
-        self.inner
-            .lock(|inner| inner.init(Some(virt_addr.as_usize())))?;
-
-        self.virt_mmio_start_addr
-            .store(virt_addr.as_usize(), Ordering::Relaxed);
+        (self.post_init_callback)();
 
         Ok(())
     }
-
-    fn virt_mmio_start_addr(&self) -> Option<usize> {
-        let addr = self.virt_mmio_start_addr.load(Ordering::Relaxed);
-
-        if addr == 0 {
-            return None;
-        }
-
-        Some(addr)
-    }
 }
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
index 99961facb..4908b8b67 100644
--- a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -6,7 +6,10 @@
 
 mod peripheral_ic;
 
-use crate::{driver, exception, memory};
+use crate::{
+    driver, exception,
+    memory::{Address, Virtual},
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -28,6 +31,7 @@ pub type PeripheralIRQ =
 
 /// Used for the associated type of trait [`exception::asynchronous::interface::IRQManager`].
 #[derive(Copy, Clone)]
+#[allow(missing_docs)]
 pub enum IRQNumber {
     Local(LocalIRQ),
     Peripheral(PeripheralIRQ),
@@ -36,6 +40,7 @@ pub enum IRQNumber {
 /// Representation of the Interrupt Controller.
 pub struct InterruptController {
     periph: peripheral_ic::PeripheralIC,
+    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -74,17 +79,20 @@ impl InterruptController {
     const MAX_PERIPHERAL_IRQ_NUMBER: usize = 63;
     const NUM_PERIPHERAL_IRQS: usize = Self::MAX_PERIPHERAL_IRQ_NUMBER + 1;
 
+    pub const COMPATIBLE: &'static str = "BCM Interrupt Controller";
+
     /// Create an instance.
     ///
     /// # Safety
     ///
-    /// - The user must ensure to provide correct MMIO descriptors.
+    /// - The user must ensure to provide a correct MMIO start address.
     pub const unsafe fn new(
-        _local_mmio_descriptor: memory::mmu::MMIODescriptor,
-        periph_mmio_descriptor: memory::mmu::MMIODescriptor,
+        periph_mmio_start_addr: Address<Virtual>,
+        post_init_callback: fn(),
     ) -> Self {
         Self {
-            periph: peripheral_ic::PeripheralIC::new(periph_mmio_descriptor),
+            periph: peripheral_ic::PeripheralIC::new(periph_mmio_start_addr),
+            post_init_callback,
         }
     }
 }
@@ -95,11 +103,13 @@ impl InterruptController {
 
 impl driver::interface::DeviceDriver for InterruptController {
     fn compatible(&self) -> &'static str {
-        "BCM Interrupt Controller"
+        Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
-        self.periph.init()
+        (self.post_init_callback)();
+
+        Ok(())
     }
 }
 
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index f09da862f..145d89612 100644
--- a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -7,7 +7,9 @@
 use super::{InterruptController, PendingIRQs, PeripheralIRQ};
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper,
-    driver, exception, memory, synchronization,
+    exception,
+    memory::{Address, Virtual},
+    synchronization,
     synchronization::{IRQSafeNullLock, InitStateLock},
 };
 use tock_registers::{
@@ -55,13 +57,11 @@ type HandlerTable =
 
 /// Representation of the peripheral interrupt controller.
 pub struct PeripheralIC {
-    mmio_descriptor: memory::mmu::MMIODescriptor,
-
     /// Access to write registers is guarded with a lock.
     wo_registers: IRQSafeNullLock<WriteOnlyRegisters>,
 
     /// Register read access is unguarded.
-    ro_registers: InitStateLock<ReadOnlyRegisters>,
+    ro_registers: ReadOnlyRegisters,
 
     /// Stores registered IRQ handlers. Writable only during kernel init. RO afterwards.
     handler_table: InitStateLock<HandlerTable>,
@@ -76,26 +76,21 @@ impl PeripheralIC {
     ///
     /// # Safety
     ///
-    /// - The user must ensure to provide correct MMIO descriptors.
-    pub const unsafe fn new(mmio_descriptor: memory::mmu::MMIODescriptor) -> Self {
-        let addr = mmio_descriptor.start_addr().as_usize();
-
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
         Self {
-            mmio_descriptor,
-            wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(addr)),
-            ro_registers: InitStateLock::new(ReadOnlyRegisters::new(addr)),
+            wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(mmio_start_addr)),
+            ro_registers: ReadOnlyRegisters::new(mmio_start_addr),
             handler_table: InitStateLock::new([None; InterruptController::NUM_PERIPHERAL_IRQS]),
         }
     }
 
     /// Query the list of pending IRQs.
     fn pending_irqs(&self) -> PendingIRQs {
-        self.ro_registers.read(|regs| {
-            let pending_mask: u64 =
-                (u64::from(regs.PENDING_2.get()) << 32) | u64::from(regs.PENDING_1.get());
+        let pending_mask: u64 = (u64::from(self.ro_registers.PENDING_2.get()) << 32)
+            | u64::from(self.ro_registers.PENDING_1.get());
 
-            PendingIRQs::new(pending_mask)
-        })
+        PendingIRQs::new(pending_mask)
     }
 }
 
@@ -104,24 +99,6 @@ impl PeripheralIC {
 //------------------------------------------------------------------------------
 use synchronization::interface::{Mutex, ReadWriteEx};
 
-impl driver::interface::DeviceDriver for PeripheralIC {
-    fn compatible(&self) -> &'static str {
-        "BCM Peripheral Interrupt Controller"
-    }
-
-    unsafe fn init(&self) -> Result<(), &'static str> {
-        let virt_addr =
-            memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?.as_usize();
-
-        self.wo_registers
-            .lock(|regs| *regs = WriteOnlyRegisters::new(virt_addr));
-        self.ro_registers
-            .write(|regs| *regs = ReadOnlyRegisters::new(virt_addr));
-
-        Ok(())
-    }
-}
-
 impl exception::asynchronous::interface::IRQManager for PeripheralIC {
     type IRQNumberType = PeripheralIRQ;
 
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 3133047b1..f67d70dfb 100644
--- a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -10,13 +10,14 @@
 //! - <https://developer.arm.com/documentation/ddi0183/latest>
 
 use crate::{
-    bsp, bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, exception, memory,
-    synchronization, synchronization::IRQSafeNullLock,
-};
-use core::{
-    fmt,
-    sync::atomic::{AtomicUsize, Ordering},
+    bsp,
+    bsp::device_driver::common::MMIODerefWrapper,
+    console, cpu, driver, exception,
+    memory::{Address, Virtual},
+    synchronization,
+    synchronization::IRQSafeNullLock,
 };
+use core::fmt;
 use tock_registers::{
     interfaces::{Readable, Writeable},
     register_bitfields, register_structs,
@@ -219,29 +220,25 @@ enum BlockingMode {
     NonBlocking,
 }
 
-//--------------------------------------------------------------------------------------------------
-// Public Definitions
-//--------------------------------------------------------------------------------------------------
-
-pub struct PL011UartInner {
+struct PL011UartInner {
     registers: Registers,
     chars_written: usize,
     chars_read: usize,
 }
 
-// Export the inner struct so that BSPs can use it for the panic handler.
-pub use PL011UartInner as PanicUart;
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
 
 /// Representation of the UART.
 pub struct PL011Uart {
-    mmio_descriptor: memory::mmu::MMIODescriptor,
-    virt_mmio_start_addr: AtomicUsize,
     inner: IRQSafeNullLock<PL011UartInner>,
     irq_number: bsp::device_driver::IRQNumber,
+    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
-// Public Code
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
 impl PL011UartInner {
@@ -250,7 +247,7 @@ impl PL011UartInner {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
         Self {
             registers: Registers::new(mmio_start_addr),
             chars_written: 0,
@@ -275,15 +272,7 @@ impl PL011UartInner {
     /// genrated baud rate of `48_000_000 / (16 * 3.25) = 923_077`.
     ///
     /// Error = `((923_077 - 921_600) / 921_600) * 100 = 0.16%`.
-    ///
-    /// # Safety
-    ///
-    /// - The user must ensure to provide a correct MMIO start address.
-    pub unsafe fn init(&mut self, new_mmio_start_addr: Option<usize>) -> Result<(), &'static str> {
-        if let Some(addr) = new_mmio_start_addr {
-            self.registers = Registers::new(addr);
-        }
-
+    pub fn init(&mut self) {
         // Execution can arrive here while there are still characters queued in the TX FIFO and
         // actively being sent out by the UART hardware. If the UART is turned off in this case,
         // those queued characters would be lost.
@@ -325,8 +314,6 @@ impl PL011UartInner {
         self.registers
             .CR
             .write(CR::UARTEN::Enabled + CR::TXE::Enabled + CR::RXE::Enabled);
-
-        Ok(())
     }
 
     /// Send a character.
@@ -399,24 +386,28 @@ impl fmt::Write for PL011UartInner {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
 impl PL011Uart {
+    pub const COMPATIBLE: &'static str = "BCM PL011 UART";
+
     /// Create an instance.
     ///
     /// # Safety
     ///
-    /// - The user must ensure to provide correct MMIO descriptors.
+    /// - The user must ensure to provide a correct MMIO start address.
     /// - The user must ensure to provide correct IRQ numbers.
     pub const unsafe fn new(
-        mmio_descriptor: memory::mmu::MMIODescriptor,
+        mmio_start_addr: Address<Virtual>,
         irq_number: bsp::device_driver::IRQNumber,
+        post_init_callback: fn(),
     ) -> Self {
         Self {
-            mmio_descriptor,
-            virt_mmio_start_addr: AtomicUsize::new(0),
-            inner: IRQSafeNullLock::new(PL011UartInner::new(
-                mmio_descriptor.start_addr().as_usize(),
-            )),
+            inner: IRQSafeNullLock::new(PL011UartInner::new(mmio_start_addr)),
             irq_number,
+            post_init_callback,
         }
     }
 }
@@ -428,27 +419,21 @@ use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for PL011Uart {
     fn compatible(&self) -> &'static str {
-        "BCM PL011 UART"
+        Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
-        let virt_addr = memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?;
-
-        self.inner
-            .lock(|inner| inner.init(Some(virt_addr.as_usize())))?;
-
-        self.virt_mmio_start_addr
-            .store(virt_addr.as_usize(), Ordering::Relaxed);
+        self.inner.lock(|inner| inner.init());
+        (self.post_init_callback)();
 
         Ok(())
     }
 
     fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
-        use bsp::exception::asynchronous::irq_manager;
-        use exception::asynchronous::{interface::IRQManager, IRQDescriptor};
+        use exception::asynchronous::{irq_manager, IRQDescriptor};
 
         let descriptor = IRQDescriptor {
-            name: "BCM PL011 UART",
+            name: Self::COMPATIBLE,
             handler: self,
         };
 
@@ -457,16 +442,6 @@ impl driver::interface::DeviceDriver for PL011Uart {
 
         Ok(())
     }
-
-    fn virt_mmio_start_addr(&self) -> Option<usize> {
-        let addr = self.virt_mmio_start_addr.load(Ordering::Relaxed);
-
-        if addr == 0 {
-            return None;
-        }
-
-        Some(addr)
-    }
 }
 
 impl console::interface::Write for PL011Uart {
@@ -514,6 +489,8 @@ impl console::interface::Statistics for PL011Uart {
     }
 }
 
+impl console::interface::All for PL011Uart {}
+
 impl exception::asynchronous::interface::IRQHandler for PL011Uart {
     fn handle(&self) -> Result<(), &'static str> {
         self.inner.lock(|inner| {
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/common.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/common.rs
index fd9e988ea..69f038d4d 100644
--- a/17_kernel_symbols/kernel/src/bsp/device_driver/common.rs
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/common.rs
@@ -4,6 +4,7 @@
 
 //! Common device driver code.
 
+use crate::memory::{Address, Virtual};
 use core::{marker::PhantomData, ops};
 
 //--------------------------------------------------------------------------------------------------
@@ -11,7 +12,7 @@ use core::{marker::PhantomData, ops};
 //--------------------------------------------------------------------------------------------------
 
 pub struct MMIODerefWrapper<T> {
-    start_addr: usize,
+    start_addr: Address<Virtual>,
     phantom: PhantomData<fn() -> T>,
 }
 
@@ -21,7 +22,7 @@ pub struct MMIODerefWrapper<T> {
 
 impl<T> MMIODerefWrapper<T> {
     /// Create an instance.
-    pub const unsafe fn new(start_addr: usize) -> Self {
+    pub const unsafe fn new(start_addr: Address<Virtual>) -> Self {
         Self {
             start_addr,
             phantom: PhantomData,
@@ -33,6 +34,6 @@ impl<T> ops::Deref for MMIODerefWrapper<T> {
     type Target = T;
 
     fn deref(&self) -> &Self::Target {
-        unsafe { &*(self.start_addr as *const _) }
+        unsafe { &*(self.start_addr.as_usize() as *const _) }
     }
 }
diff --git a/17_kernel_symbols/kernel/src/bsp/raspberrypi.rs b/17_kernel_symbols/kernel/src/bsp/raspberrypi.rs
index fb9edf88d..474419f4e 100644
--- a/17_kernel_symbols/kernel/src/bsp/raspberrypi.rs
+++ b/17_kernel_symbols/kernel/src/bsp/raspberrypi.rs
@@ -4,46 +4,11 @@
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
-pub mod console;
 pub mod cpu;
 pub mod driver;
 pub mod exception;
 pub mod memory;
 
-use super::device_driver;
-use crate::memory::mmu::MMIODescriptor;
-use memory::map::mmio;
-
-//--------------------------------------------------------------------------------------------------
-// Global instances
-//--------------------------------------------------------------------------------------------------
-
-static GPIO: device_driver::GPIO =
-    unsafe { device_driver::GPIO::new(MMIODescriptor::new(mmio::GPIO_START, mmio::GPIO_SIZE)) };
-
-static PL011_UART: device_driver::PL011Uart = unsafe {
-    device_driver::PL011Uart::new(
-        MMIODescriptor::new(mmio::PL011_UART_START, mmio::PL011_UART_SIZE),
-        exception::asynchronous::irq_map::PL011_UART,
-    )
-};
-
-#[cfg(feature = "bsp_rpi3")]
-static INTERRUPT_CONTROLLER: device_driver::InterruptController = unsafe {
-    device_driver::InterruptController::new(
-        MMIODescriptor::new(mmio::LOCAL_IC_START, mmio::LOCAL_IC_SIZE),
-        MMIODescriptor::new(mmio::PERIPHERAL_IC_START, mmio::PERIPHERAL_IC_SIZE),
-    )
-};
-
-#[cfg(feature = "bsp_rpi4")]
-static INTERRUPT_CONTROLLER: device_driver::GICv2 = unsafe {
-    device_driver::GICv2::new(
-        MMIODescriptor::new(mmio::GICD_START, mmio::GICD_SIZE),
-        MMIODescriptor::new(mmio::GICC_START, mmio::GICC_SIZE),
-    )
-};
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
diff --git a/17_kernel_symbols/kernel/src/bsp/raspberrypi/console.rs b/17_kernel_symbols/kernel/src/bsp/raspberrypi/console.rs
deleted file mode 100644
index a0d2e687c..000000000
--- a/17_kernel_symbols/kernel/src/bsp/raspberrypi/console.rs
+++ /dev/null
@@ -1,98 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
-
-//! BSP console facilities.
-
-use crate::{bsp::device_driver, console, cpu, driver};
-use core::fmt;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// In case of a panic, the panic handler uses this function to take a last shot at printing
-/// something before the system is halted.
-///
-/// We try to init panic-versions of the GPIO and the UART. The panic versions are not protected
-/// with synchronization primitives, which increases chances that we get to print something, even
-/// when the kernel's default GPIO or UART instances happen to be locked at the time of the panic.
-///
-/// # Safety
-///
-/// - Use only for printing during a panic.
-#[cfg(not(feature = "test_build"))]
-pub unsafe fn panic_console_out() -> impl fmt::Write {
-    use driver::interface::DeviceDriver;
-
-    // If remapping of the driver's MMIO hasn't already happened, we won't be able to print. Just
-    // park the CPU core in this case.
-    let gpio_mmio_start_addr = match super::GPIO.virt_mmio_start_addr() {
-        None => cpu::wait_forever(),
-        Some(x) => x,
-    };
-
-    let uart_mmio_start_addr = match super::PL011_UART.virt_mmio_start_addr() {
-        None => cpu::wait_forever(),
-        Some(x) => x,
-    };
-
-    let mut panic_gpio = device_driver::PanicGPIO::new(gpio_mmio_start_addr);
-    let mut panic_uart = device_driver::PanicUart::new(uart_mmio_start_addr);
-
-    panic_gpio
-        .init(None)
-        .unwrap_or_else(|_| cpu::wait_forever());
-    panic_gpio.map_pl011_uart();
-    panic_uart
-        .init(None)
-        .unwrap_or_else(|_| cpu::wait_forever());
-
-    panic_uart
-}
-
-/// Reduced version for test builds.
-///
-/// # Safety
-///
-/// - Use only for printing during a panic.
-#[cfg(feature = "test_build")]
-pub unsafe fn panic_console_out() -> impl fmt::Write {
-    use driver::interface::DeviceDriver;
-
-    let uart_mmio_start_addr = match super::PL011_UART.virt_mmio_start_addr() {
-        None => cpu::wait_forever(),
-        Some(x) => x,
-    };
-    let mut panic_uart = device_driver::PanicUart::new(uart_mmio_start_addr);
-
-    panic_uart
-        .init(None)
-        .unwrap_or_else(|_| cpu::qemu_exit_failure());
-
-    panic_uart
-}
-
-/// Return a reference to the console.
-pub fn console() -> &'static impl console::interface::All {
-    &super::PL011_UART
-}
-
-//--------------------------------------------------------------------------------------------------
-// Testing
-//--------------------------------------------------------------------------------------------------
-
-/// Minimal code needed to bring up the console in QEMU (for testing only). This is often less steps
-/// than on real hardware due to QEMU's abstractions.
-#[cfg(feature = "test_build")]
-pub fn qemu_bring_up_console() {
-    use driver::interface::DeviceDriver;
-
-    // Calling the UART's init ensures that the BSP's instance of the UART does remap the MMIO
-    // addresses.
-    unsafe {
-        super::PL011_UART
-            .init()
-            .unwrap_or_else(|_| cpu::qemu_exit_failure());
-    }
-}
diff --git a/17_kernel_symbols/kernel/src/bsp/raspberrypi/driver.rs b/17_kernel_symbols/kernel/src/bsp/raspberrypi/driver.rs
index 531687524..e1db4a005 100644
--- a/17_kernel_symbols/kernel/src/bsp/raspberrypi/driver.rs
+++ b/17_kernel_symbols/kernel/src/bsp/raspberrypi/driver.rs
@@ -4,7 +4,19 @@
 
 //! BSP driver support.
 
-use crate::driver;
+use super::{exception, memory::map::mmio};
+use crate::{
+    bsp::device_driver,
+    console, driver, exception as generic_exception, memory,
+    memory::mmu::MMIODescriptor,
+    synchronization::{interface::ReadWriteEx, InitStateLock},
+};
+use core::{
+    mem::MaybeUninit,
+    sync::atomic::{AtomicBool, Ordering},
+};
+
+pub use device_driver::IRQNumber;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -12,21 +24,132 @@ use crate::driver;
 
 /// Device Driver Manager type.
 struct BSPDriverManager {
-    device_drivers: [&'static (dyn DeviceDriver + Sync); 3],
+    device_drivers: InitStateLock<[Option<&'static (dyn DeviceDriver + Sync)>; NUM_DRIVERS]>,
+    init_done: AtomicBool,
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// The number of active drivers provided by this BSP.
+pub const NUM_DRIVERS: usize = 3;
+
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
+static mut PL011_UART: MaybeUninit<device_driver::PL011Uart> = MaybeUninit::uninit();
+static mut GPIO: MaybeUninit<device_driver::GPIO> = MaybeUninit::uninit();
+
+#[cfg(feature = "bsp_rpi3")]
+static mut INTERRUPT_CONTROLLER: MaybeUninit<device_driver::InterruptController> =
+    MaybeUninit::uninit();
+
+#[cfg(feature = "bsp_rpi4")]
+static mut INTERRUPT_CONTROLLER: MaybeUninit<device_driver::GICv2> = MaybeUninit::uninit();
+
 static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
-    device_drivers: [
-        &super::GPIO,
-        &super::PL011_UART,
-        &super::INTERRUPT_CONTROLLER,
-    ],
+    device_drivers: InitStateLock::new([None; NUM_DRIVERS]),
+    init_done: AtomicBool::new(false),
 };
 
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl BSPDriverManager {
+    unsafe fn instantiate_uart(&self) -> Result<(), &'static str> {
+        let mmio_descriptor = MMIODescriptor::new(mmio::PL011_UART_START, mmio::PL011_UART_SIZE);
+        let virt_addr =
+            memory::mmu::kernel_map_mmio(device_driver::PL011Uart::COMPATIBLE, &mmio_descriptor)?;
+
+        // This is safe to do, because it is only called from the init'ed instance itself.
+        fn uart_post_init() {
+            console::register_console(unsafe { PL011_UART.assume_init_ref() });
+        }
+
+        PL011_UART.write(device_driver::PL011Uart::new(
+            virt_addr,
+            exception::asynchronous::irq_map::PL011_UART,
+            uart_post_init,
+        ));
+
+        Ok(())
+    }
+
+    unsafe fn instantiate_gpio(&self) -> Result<(), &'static str> {
+        let mmio_descriptor = MMIODescriptor::new(mmio::GPIO_START, mmio::GPIO_SIZE);
+        let virt_addr =
+            memory::mmu::kernel_map_mmio(device_driver::GPIO::COMPATIBLE, &mmio_descriptor)?;
+
+        // This is safe to do, because it is only called from the init'ed instance itself.
+        fn gpio_post_init() {
+            unsafe { GPIO.assume_init_ref().map_pl011_uart() };
+        }
+
+        GPIO.write(device_driver::GPIO::new(virt_addr, gpio_post_init));
+
+        Ok(())
+    }
+
+    #[cfg(feature = "bsp_rpi3")]
+    unsafe fn instantiate_interrupt_controller(&self) -> Result<(), &'static str> {
+        let periph_mmio_descriptor =
+            MMIODescriptor::new(mmio::PERIPHERAL_IC_START, mmio::PERIPHERAL_IC_SIZE);
+        let periph_virt_addr = memory::mmu::kernel_map_mmio(
+            device_driver::InterruptController::COMPATIBLE,
+            &periph_mmio_descriptor,
+        )?;
+
+        // This is safe to do, because it is only called from the init'ed instance itself.
+        fn interrupt_controller_post_init() {
+            generic_exception::asynchronous::register_irq_manager(unsafe {
+                INTERRUPT_CONTROLLER.assume_init_ref()
+            });
+        }
+
+        INTERRUPT_CONTROLLER.write(device_driver::InterruptController::new(
+            periph_virt_addr,
+            interrupt_controller_post_init,
+        ));
+
+        Ok(())
+    }
+
+    #[cfg(feature = "bsp_rpi4")]
+    unsafe fn instantiate_interrupt_controller(&self) -> Result<(), &'static str> {
+        let gicd_mmio_descriptor = MMIODescriptor::new(mmio::GICD_START, mmio::GICD_SIZE);
+        let gicd_virt_addr = memory::mmu::kernel_map_mmio("GICv2 GICD", &gicd_mmio_descriptor)?;
+
+        let gicc_mmio_descriptor = MMIODescriptor::new(mmio::GICC_START, mmio::GICC_SIZE);
+        let gicc_virt_addr = memory::mmu::kernel_map_mmio("GICV2 GICC", &gicc_mmio_descriptor)?;
+
+        // This is safe to do, because it is only called from the init'ed instance itself.
+        fn interrupt_controller_post_init() {
+            generic_exception::asynchronous::register_irq_manager(unsafe {
+                INTERRUPT_CONTROLLER.assume_init_ref()
+            });
+        }
+
+        INTERRUPT_CONTROLLER.write(device_driver::GICv2::new(
+            gicd_virt_addr,
+            gicc_virt_addr,
+            interrupt_controller_post_init,
+        ));
+
+        Ok(())
+    }
+
+    unsafe fn register_drivers(&self) {
+        self.device_drivers.write(|drivers| {
+            drivers[0] = Some(PL011_UART.assume_init_ref());
+            drivers[1] = Some(GPIO.assume_init_ref());
+            drivers[2] = Some(INTERRUPT_CONTROLLER.assume_init_ref());
+        });
+    }
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -42,20 +165,34 @@ pub fn driver_manager() -> &'static impl driver::interface::DriverManager {
 use driver::interface::DeviceDriver;
 
 impl driver::interface::DriverManager for BSPDriverManager {
-    fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
-        &self.device_drivers[..]
-    }
+    unsafe fn instantiate_drivers(&self) -> Result<(), &'static str> {
+        if self.init_done.load(Ordering::Relaxed) {
+            return Err("Drivers already instantiated");
+        }
+
+        self.instantiate_uart()?;
+        self.instantiate_gpio()?;
+        self.instantiate_interrupt_controller()?;
 
-    fn early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
-        &self.device_drivers[0..=1]
+        self.register_drivers();
+
+        self.init_done.store(true, Ordering::Relaxed);
+        Ok(())
     }
 
-    fn non_early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
-        &self.device_drivers[2..]
+    fn all_device_drivers(&self) -> [&(dyn DeviceDriver + Sync); NUM_DRIVERS] {
+        self.device_drivers
+            .read(|drivers| drivers.map(|drivers| drivers.unwrap()))
     }
 
-    fn post_early_print_device_driver_init(&self) {
-        // Configure PL011Uart's output pins.
-        super::GPIO.map_pl011_uart();
+    #[cfg(feature = "test_build")]
+    fn qemu_bring_up_console(&self) {
+        use crate::cpu;
+
+        unsafe {
+            self.instantiate_uart()
+                .unwrap_or_else(|_| cpu::qemu_exit_failure());
+            console::register_console(PL011_UART.assume_init_ref());
+        };
     }
 }
diff --git a/17_kernel_symbols/kernel/src/bsp/raspberrypi/exception/asynchronous.rs b/17_kernel_symbols/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
index dc5ab4215..ab20d86d3 100644
--- a/17_kernel_symbols/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
+++ b/17_kernel_symbols/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
@@ -4,7 +4,7 @@
 
 //! BSP asynchronous exception handling.
 
-use crate::{bsp, exception};
+use crate::bsp;
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -23,14 +23,3 @@ pub(in crate::bsp) mod irq_map {
 
     pub const PL011_UART: IRQNumber = IRQNumber::new(153);
 }
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return a reference to the IRQ manager.
-pub fn irq_manager() -> &'static impl exception::asynchronous::interface::IRQManager<
-    IRQNumberType = bsp::device_driver::IRQNumber,
-> {
-    &super::super::INTERRUPT_CONTROLLER
-}
diff --git a/17_kernel_symbols/kernel/src/bsp/raspberrypi/memory.rs b/17_kernel_symbols/kernel/src/bsp/raspberrypi/memory.rs
index 01aa9441a..32416e6cf 100644
--- a/17_kernel_symbols/kernel/src/bsp/raspberrypi/memory.rs
+++ b/17_kernel_symbols/kernel/src/bsp/raspberrypi/memory.rs
@@ -113,9 +113,6 @@ pub(super) mod map {
         pub const PL011_UART_START:    Address<Physical> = Address::new(0x3F20_1000);
         pub const PL011_UART_SIZE:     usize             =              0x48;
 
-        pub const LOCAL_IC_START:      Address<Physical> = Address::new(0x4000_0000);
-        pub const LOCAL_IC_SIZE:       usize             =              0x100;
-
         pub const END:                 Address<Physical> = Address::new(0x4001_0000);
     }
 
diff --git a/17_kernel_symbols/kernel/src/console.rs b/17_kernel_symbols/kernel/src/console.rs
index e49e241fe..a85bcffe7 100644
--- a/17_kernel_symbols/kernel/src/console.rs
+++ b/17_kernel_symbols/kernel/src/console.rs
@@ -4,6 +4,10 @@
 
 //! System console.
 
+mod null_console;
+
+use crate::synchronization;
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -49,5 +53,29 @@ pub mod interface {
     }
 
     /// Trait alias for a full-fledged console.
-    pub trait All = Write + Read + Statistics;
+    pub trait All: Write + Read + Statistics {}
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static CUR_CONSOLE: InitStateLock<&'static (dyn interface::All + Sync)> =
+    InitStateLock::new(&null_console::NULL_CONSOLE);
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+use synchronization::{interface::ReadWriteEx, InitStateLock};
+
+/// Register a new console.
+pub fn register_console(new_console: &'static (dyn interface::All + Sync)) {
+    CUR_CONSOLE.write(|con| *con = new_console);
+}
+
+/// Return a reference to the currently registered console.
+///
+/// This is the global console used by all printing macros.
+pub fn console() -> &'static dyn interface::All {
+    CUR_CONSOLE.read(|con| *con)
 }
diff --git a/17_kernel_symbols/kernel/src/console/null_console.rs b/17_kernel_symbols/kernel/src/console/null_console.rs
new file mode 100644
index 000000000..10c3bedc0
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/console/null_console.rs
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Null console.
+
+use super::interface;
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct NullConsole;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+pub static NULL_CONSOLE: NullConsole = NullConsole {};
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl interface::Write for NullConsole {
+    fn write_char(&self, _c: char) {}
+
+    fn write_fmt(&self, _args: fmt::Arguments) -> fmt::Result {
+        fmt::Result::Ok(())
+    }
+
+    fn flush(&self) {}
+}
+
+impl interface::Read for NullConsole {
+    fn clear_rx(&self) {}
+}
+
+impl interface::Statistics for NullConsole {}
+impl interface::All for NullConsole {}
diff --git a/17_kernel_symbols/kernel/src/driver.rs b/17_kernel_symbols/kernel/src/driver.rs
index 7b800dbc3..98197fef3 100644
--- a/17_kernel_symbols/kernel/src/driver.rs
+++ b/17_kernel_symbols/kernel/src/driver.rs
@@ -10,6 +10,8 @@
 
 /// Driver interfaces.
 pub mod interface {
+    use crate::bsp;
+
     /// Device Driver functions.
     pub trait DeviceDriver {
         /// Return a compatibility string for identifying the driver.
@@ -31,32 +33,25 @@ pub mod interface {
         fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
             Ok(())
         }
-
-        /// After MMIO remapping, returns the new virtual start address.
-        ///
-        /// This API assumes a driver has only a single, contiguous MMIO aperture, which will not be
-        /// the case for more complex devices. This API will likely change in future tutorials.
-        fn virt_mmio_start_addr(&self) -> Option<usize> {
-            None
-        }
     }
 
     /// Device driver management functions.
     ///
     /// The `BSP` is supposed to supply one global instance.
     pub trait DriverManager {
-        /// Return a slice of references to all `BSP`-instantiated drivers.
-        fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
-
-        /// Return only those drivers needed for the BSP's early printing functionality.
+        /// Instantiate all drivers.
+        ///
+        /// # Safety
         ///
-        /// For example, the default UART.
-        fn early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
+        /// Must be called before `all_device_drivers`.
+        unsafe fn instantiate_drivers(&self) -> Result<(), &'static str>;
 
-        /// Return all drivers minus early-print drivers.
-        fn non_early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
+        /// Return a slice of references to all `BSP`-instantiated drivers.
+        fn all_device_drivers(&self) -> [&(dyn DeviceDriver + Sync); bsp::driver::NUM_DRIVERS];
 
-        /// Initialization code that runs after the early print driver init.
-        fn post_early_print_device_driver_init(&self);
+        /// Minimal code needed to bring up the console in QEMU (for testing only). This is often
+        /// less steps than on real hardware due to QEMU's abstractions.
+        #[cfg(feature = "test_build")]
+        fn qemu_bring_up_console(&self);
     }
 }
diff --git a/17_kernel_symbols/kernel/src/exception/asynchronous.rs b/17_kernel_symbols/kernel/src/exception/asynchronous.rs
index fb1785c23..d9d2767cf 100644
--- a/17_kernel_symbols/kernel/src/exception/asynchronous.rs
+++ b/17_kernel_symbols/kernel/src/exception/asynchronous.rs
@@ -7,7 +7,9 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "../_arch/aarch64/exception/asynchronous.rs"]
 mod arch_asynchronous;
+mod null_irq_manager;
 
+use crate::{bsp, synchronization};
 use core::{fmt, marker::PhantomData};
 
 //--------------------------------------------------------------------------------------------------
@@ -85,7 +87,7 @@ pub mod interface {
         );
 
         /// Print list of registered handlers.
-        fn print_handler(&self);
+        fn print_handler(&self) {}
     }
 }
 
@@ -93,9 +95,18 @@ pub mod interface {
 #[derive(Copy, Clone)]
 pub struct IRQNumber<const MAX_INCLUSIVE: usize>(usize);
 
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static CUR_IRQ_MANAGER: InitStateLock<
+    &'static (dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber> + Sync),
+> = InitStateLock::new(&null_irq_manager::NULL_IRQ_MANAGER);
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
+use synchronization::{interface::ReadWriteEx, InitStateLock};
 
 impl<'irq_context> IRQContext<'irq_context> {
     /// Creates an IRQContext token.
@@ -150,3 +161,18 @@ pub fn exec_with_irq_masked<T>(f: impl FnOnce() -> T) -> T {
 
     ret
 }
+
+/// Register a new IRQ manager.
+pub fn register_irq_manager(
+    new_manager: &'static (dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber>
+                  + Sync),
+) {
+    CUR_IRQ_MANAGER.write(|manager| *manager = new_manager);
+}
+
+/// Return a reference to the currently registered IRQ manager.
+///
+/// This is the IRQ manager used by the architectural interrupt handling code.
+pub fn irq_manager() -> &'static dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber> {
+    CUR_IRQ_MANAGER.read(|manager| *manager)
+}
diff --git a/17_kernel_symbols/kernel/src/exception/asynchronous/null_irq_manager.rs b/17_kernel_symbols/kernel/src/exception/asynchronous/null_irq_manager.rs
new file mode 100644
index 000000000..560e3ce4b
--- /dev/null
+++ b/17_kernel_symbols/kernel/src/exception/asynchronous/null_irq_manager.rs
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Null IRQ Manager.
+
+use super::{interface, IRQContext, IRQDescriptor};
+use crate::bsp;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct NullIRQManager;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+pub static NULL_IRQ_MANAGER: NullIRQManager = NullIRQManager {};
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl interface::IRQManager for NullIRQManager {
+    type IRQNumberType = bsp::driver::IRQNumber;
+
+    fn register_handler(
+        &self,
+        _irq_number: Self::IRQNumberType,
+        _descriptor: IRQDescriptor,
+    ) -> Result<(), &'static str> {
+        panic!("No IRQ Manager registered yet");
+    }
+
+    fn enable(&self, _irq_number: Self::IRQNumberType) {
+        panic!("No IRQ Manager registered yet");
+    }
+
+    fn handle_pending_irqs<'irq_context>(&'irq_context self, _ic: &IRQContext<'irq_context>) {
+        panic!("No IRQ Manager registered yet");
+    }
+}
diff --git a/17_kernel_symbols/kernel/src/lib.rs b/17_kernel_symbols/kernel/src/lib.rs
index 8e38ad6fd..e70468e57 100644
--- a/17_kernel_symbols/kernel/src/lib.rs
+++ b/17_kernel_symbols/kernel/src/lib.rs
@@ -114,6 +114,7 @@
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(generic_const_exprs)]
+#![feature(is_sorted)]
 #![feature(linkage)]
 #![feature(panic_info_message)]
 #![feature(step_trait)]
@@ -177,9 +178,11 @@ pub fn test_runner(tests: &[&test_types::UnitTest]) {
 #[cfg(test)]
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
     exception::handling_init();
     memory::mmu::post_enable_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     test_main();
 
diff --git a/17_kernel_symbols/kernel/src/main.rs b/17_kernel_symbols/kernel/src/main.rs
index 5150f3afc..928f12c2f 100644
--- a/17_kernel_symbols/kernel/src/main.rs
+++ b/17_kernel_symbols/kernel/src/main.rs
@@ -30,26 +30,11 @@ unsafe fn kernel_init() -> ! {
     exception::handling_init();
     memory::mmu::post_enable_init();
 
-    // Add the mapping records for the precomputed entries first, so that they appear on the top of
-    // the list.
-    bsp::memory::mmu::kernel_add_mapping_records_for_precomputed();
-
-    // Bring up the drivers needed for printing first.
-    for i in bsp::driver::driver_manager()
-        .early_print_device_drivers()
-        .iter()
-    {
-        // Any encountered errors cannot be printed yet, obviously, so just safely park the CPU.
-        i.init().unwrap_or_else(|_| cpu::wait_forever());
+    // Instantiate and init all device drivers.
+    if let Err(x) = bsp::driver::driver_manager().instantiate_drivers() {
+        panic!("Error instantiating drivers: {}", x);
     }
-    bsp::driver::driver_manager().post_early_print_device_driver_init();
-    // Printing available from here on.
-
-    // Now bring up the remaining drivers.
-    for i in bsp::driver::driver_manager()
-        .non_early_print_device_drivers()
-        .iter()
-    {
+    for i in bsp::driver::driver_manager().all_device_drivers().iter() {
         if let Err(x) = i.init() {
             panic!("Error loading driver: {}: {}", i.compatible(), x);
         }
@@ -62,6 +47,8 @@ unsafe fn kernel_init() -> ! {
         }
     }
 
+    bsp::memory::mmu::kernel_add_mapping_records_for_precomputed();
+
     // Unmask interrupts on the boot CPU core.
     exception::asynchronous::local_irq_unmask();
 
@@ -75,7 +62,6 @@ unsafe fn kernel_init() -> ! {
 /// The main function running after the early init.
 fn kernel_main() -> ! {
     use driver::interface::DriverManager;
-    use exception::asynchronous::interface::IRQManager;
 
     info!("{}", libkernel::version());
     info!("Booting on: {}", bsp::board_name());
@@ -104,7 +90,7 @@ fn kernel_main() -> ! {
     }
 
     info!("Registered IRQ handlers:");
-    bsp::exception::asynchronous::irq_manager().print_handler();
+    exception::asynchronous::irq_manager().print_handler();
 
     info!("Echoing input now");
     cpu::wait_forever();
diff --git a/17_kernel_symbols/kernel/src/memory.rs b/17_kernel_symbols/kernel/src/memory.rs
index f20719bb7..64d8cf64e 100644
--- a/17_kernel_symbols/kernel/src/memory.rs
+++ b/17_kernel_symbols/kernel/src/memory.rs
@@ -18,18 +18,18 @@ use core::{
 //--------------------------------------------------------------------------------------------------
 
 /// Metadata trait for marking the type of an address.
-pub trait AddressType: Copy + Clone + PartialOrd + PartialEq {}
+pub trait AddressType: Copy + Clone + PartialOrd + PartialEq + Ord + Eq {}
 
 /// Zero-sized type to mark a physical address.
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq, Ord, Eq)]
 pub enum Physical {}
 
 /// Zero-sized type to mark a virtual address.
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq, Ord, Eq)]
 pub enum Virtual {}
 
 /// Generic address type.
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq, Ord, Eq)]
 pub struct Address<ATYPE: AddressType> {
     value: usize,
     _address_type: PhantomData<fn() -> ATYPE>,
diff --git a/17_kernel_symbols/kernel/src/memory/mmu/mapping_record.rs b/17_kernel_symbols/kernel/src/memory/mmu/mapping_record.rs
index d171c6e67..7d3a6c601 100644
--- a/17_kernel_symbols/kernel/src/memory/mmu/mapping_record.rs
+++ b/17_kernel_symbols/kernel/src/memory/mmu/mapping_record.rs
@@ -76,6 +76,19 @@ impl MappingRecord {
         Self { inner: [None; 12] }
     }
 
+    fn size(&self) -> usize {
+        self.inner.iter().filter(|x| x.is_some()).count()
+    }
+
+    fn sort(&mut self) {
+        let upper_bound_exclusive = self.size();
+        let entries = &mut self.inner[0..upper_bound_exclusive];
+
+        if !entries.is_sorted_by_key(|item| item.unwrap().virt_start_addr) {
+            entries.sort_unstable_by_key(|item| item.unwrap().virt_start_addr)
+        }
+    }
+
     fn find_next_free(&mut self) -> Result<&mut Option<MappingRecordEntry>, &'static str> {
         if let Some(x) = self.inner.iter_mut().find(|x| x.is_none()) {
             return Ok(x);
@@ -121,6 +134,9 @@ impl MappingRecord {
             phys_region,
             attr,
         ));
+
+        self.sort();
+
         Ok(())
     }
 
diff --git a/17_kernel_symbols/kernel/src/panic_wait.rs b/17_kernel_symbols/kernel/src/panic_wait.rs
index 08d7d4533..e4256b616 100644
--- a/17_kernel_symbols/kernel/src/panic_wait.rs
+++ b/17_kernel_symbols/kernel/src/panic_wait.rs
@@ -4,19 +4,13 @@
 
 //! A panic handler that infinitely waits.
 
-use crate::{bsp, cpu, exception};
-use core::{fmt, panic::PanicInfo};
+use crate::{cpu, exception, println};
+use core::panic::PanicInfo;
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-fn _panic_print(args: fmt::Arguments) {
-    use fmt::Write;
-
-    unsafe { bsp::console::panic_console_out().write_fmt(args).unwrap() };
-}
-
 /// The point of exit for `libkernel`.
 ///
 /// It is linked weakly, so that the integration tests can overload its standard behavior.
@@ -34,16 +28,6 @@ fn _panic_exit() -> ! {
     }
 }
 
-/// Prints with a newline - only use from the panic handler.
-///
-/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
-#[macro_export]
-macro_rules! panic_println {
-    ($($arg:tt)*) => ({
-        _panic_print(format_args_nl!($($arg)*));
-    })
-}
-
 /// Stop immediately if called a second time.
 ///
 /// # Note
@@ -88,7 +72,7 @@ fn panic(info: &PanicInfo) -> ! {
         _ => ("???", 0, 0),
     };
 
-    panic_println!(
+    println!(
         "[  {:>3}.{:06}] Kernel panic!\n\n\
         Panic location:\n      File '{}', line {}, column {}\n\n\
         {}",
diff --git a/17_kernel_symbols/kernel/src/print.rs b/17_kernel_symbols/kernel/src/print.rs
index 9ec13a286..8705eec0d 100644
--- a/17_kernel_symbols/kernel/src/print.rs
+++ b/17_kernel_symbols/kernel/src/print.rs
@@ -4,7 +4,7 @@
 
 //! Printing.
 
-use crate::{bsp, console};
+use crate::console;
 use core::fmt;
 
 //--------------------------------------------------------------------------------------------------
@@ -13,9 +13,7 @@ use core::fmt;
 
 #[doc(hidden)]
 pub fn _print(args: fmt::Arguments) {
-    use console::interface::Write;
-
-    bsp::console::console().write_fmt(args).unwrap();
+    console::console().write_fmt(args).unwrap();
 }
 
 /// Prints without a newline.
diff --git a/17_kernel_symbols/kernel/tests/00_console_sanity.rs b/17_kernel_symbols/kernel/tests/00_console_sanity.rs
index 6595aac1b..f2a1f3edf 100644
--- a/17_kernel_symbols/kernel/tests/00_console_sanity.rs
+++ b/17_kernel_symbols/kernel/tests/00_console_sanity.rs
@@ -11,16 +11,16 @@
 /// Console tests should time out on the I/O harness in case of panic.
 mod panic_wait_forever;
 
-use libkernel::{bsp, console, cpu, exception, memory, print};
+use libkernel::{bsp, console, cpu, driver, exception, memory, print};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use bsp::console::console;
-    use console::interface::*;
+    use console::console;
+    use driver::interface::DriverManager;
 
     exception::handling_init();
     memory::mmu::post_enable_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     // Handshake
     assert_eq!(console().read_char(), 'A');
diff --git a/17_kernel_symbols/kernel/tests/01_timer_sanity.rs b/17_kernel_symbols/kernel/tests/01_timer_sanity.rs
index 9b2b228d9..caeca3cd4 100644
--- a/17_kernel_symbols/kernel/tests/01_timer_sanity.rs
+++ b/17_kernel_symbols/kernel/tests/01_timer_sanity.rs
@@ -11,14 +11,16 @@
 #![test_runner(libkernel::test_runner)]
 
 use core::time::Duration;
-use libkernel::{bsp, cpu, exception, memory, time, time::interface::TimeManager};
+use libkernel::{bsp, cpu, driver, exception, memory, time, time::interface::TimeManager};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
     exception::handling_init();
     memory::mmu::post_enable_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
 
diff --git a/17_kernel_symbols/kernel/tests/02_exception_sync_page_fault.rs b/17_kernel_symbols/kernel/tests/02_exception_sync_page_fault.rs
index 0d2a1e63c..33463e0a8 100644
--- a/17_kernel_symbols/kernel/tests/02_exception_sync_page_fault.rs
+++ b/17_kernel_symbols/kernel/tests/02_exception_sync_page_fault.rs
@@ -17,13 +17,15 @@
 /// or indirectly.
 mod panic_exit_success;
 
-use libkernel::{bsp, cpu, exception, info, memory, println};
+use libkernel::{bsp, cpu, driver, exception, info, memory, println};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
     exception::handling_init();
     memory::mmu::post_enable_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     // This line will be printed as the test header.
     println!("Testing synchronous exception handling by causing a page fault");
diff --git a/17_kernel_symbols/kernel/tests/03_exception_restore_sanity.rs b/17_kernel_symbols/kernel/tests/03_exception_restore_sanity.rs
index 983d488f1..a521a8711 100644
--- a/17_kernel_symbols/kernel/tests/03_exception_restore_sanity.rs
+++ b/17_kernel_symbols/kernel/tests/03_exception_restore_sanity.rs
@@ -12,7 +12,7 @@
 mod panic_wait_forever;
 
 use core::arch::asm;
-use libkernel::{bsp, cpu, exception, info, memory, println};
+use libkernel::{bsp, cpu, driver, exception, info, memory, println};
 
 #[inline(never)]
 fn nested_system_call() {
@@ -30,9 +30,11 @@ fn nested_system_call() {
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
     exception::handling_init();
     memory::mmu::post_enable_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     // This line will be printed as the test header.
     println!("Testing exception restore");
diff --git a/17_kernel_symbols/kernel/tests/04_exception_irq_sanity.rs b/17_kernel_symbols/kernel/tests/04_exception_irq_sanity.rs
index 9030424d5..cd2d29d6a 100644
--- a/17_kernel_symbols/kernel/tests/04_exception_irq_sanity.rs
+++ b/17_kernel_symbols/kernel/tests/04_exception_irq_sanity.rs
@@ -10,13 +10,15 @@
 #![reexport_test_harness_main = "test_main"]
 #![test_runner(libkernel::test_runner)]
 
-use libkernel::{bsp, cpu, exception, memory};
+use libkernel::{bsp, cpu, driver, exception, memory};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
     memory::mmu::post_enable_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     exception::handling_init();
     exception::asynchronous::local_irq_unmask();
diff --git a/18_backtrace/Makefile b/18_backtrace/Makefile
index 85826c12f..5d660332c 100644
--- a/18_backtrace/Makefile
+++ b/18_backtrace/Makefile
@@ -217,7 +217,7 @@ $(KERNEL_BIN): $(KERNEL_ELF_TTABLES_SYMS)
 ##------------------------------------------------------------------------------
 ## Generate the documentation
 ##------------------------------------------------------------------------------
-doc:
+doc: clean
 	$(call color_header, "Generating docs")
 	@$(DOC_CMD) --document-private-items --open
 
diff --git a/18_backtrace/README.md b/18_backtrace/README.md
index c3cc1cc8e..fd1737034 100644
--- a/18_backtrace/README.md
+++ b/18_backtrace/README.md
@@ -228,7 +228,7 @@ match backtrace_res {
 Finally, we add printing of a backtrace to `panic!`:
 
 ```rust
-panic_println!(
+println!(
     "[  {:>3}.{:06}] Kernel panic!\n\n\
     Panic location:\n      File '{}', line {}, column {}\n\n\
     {}\n\n\
@@ -909,7 +909,7 @@ diff -uNr 17_kernel_symbols/kernel/src/bsp/raspberrypi/memory/mmu.rs 18_backtrac
 diff -uNr 17_kernel_symbols/kernel/src/lib.rs 18_backtrace/kernel/src/lib.rs
 --- 17_kernel_symbols/kernel/src/lib.rs
 +++ 18_backtrace/kernel/src/lib.rs
-@@ -128,6 +128,7 @@
+@@ -129,6 +129,7 @@
  mod panic_wait;
  mod synchronization;
 
@@ -967,20 +967,20 @@ diff -uNr 17_kernel_symbols/kernel/src/panic_wait.rs 18_backtrace/kernel/src/pan
 
  //! A panic handler that infinitely waits.
 
--use crate::{bsp, cpu, exception};
-+use crate::{backtrace, bsp, cpu, exception};
- use core::{fmt, panic::PanicInfo};
+-use crate::{cpu, exception, println};
++use crate::{backtrace, cpu, exception, println};
+ use core::panic::PanicInfo;
 
  //--------------------------------------------------------------------------------------------------
-@@ -91,6 +91,7 @@
-     panic_println!(
+@@ -75,6 +75,7 @@
+     println!(
          "[  {:>3}.{:06}] Kernel panic!\n\n\
          Panic location:\n      File '{}', line {}, column {}\n\n\
 +        {}\n\n\
          {}",
          timestamp.as_secs(),
          timestamp.subsec_micros(),
-@@ -98,6 +99,7 @@
+@@ -82,6 +83,7 @@
          line,
          column,
          info.message().unwrap_or(&format_args!("")),
@@ -1036,7 +1036,7 @@ diff -uNr 17_kernel_symbols/kernel/tests/05_backtrace_sanity.rb 18_backtrace/ker
 diff -uNr 17_kernel_symbols/kernel/tests/05_backtrace_sanity.rs 18_backtrace/kernel/tests/05_backtrace_sanity.rs
 --- 17_kernel_symbols/kernel/tests/05_backtrace_sanity.rs
 +++ 18_backtrace/kernel/tests/05_backtrace_sanity.rs
-@@ -0,0 +1,31 @@
+@@ -0,0 +1,33 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
@@ -1050,7 +1050,7 @@ diff -uNr 17_kernel_symbols/kernel/tests/05_backtrace_sanity.rs 18_backtrace/ker
 +/// Console tests should time out on the I/O harness in case of panic.
 +mod panic_wait_forever;
 +
-+use libkernel::{bsp, cpu, exception, memory};
++use libkernel::{bsp, cpu, driver, exception, memory};
 +
 +#[inline(never)]
 +fn nested() {
@@ -1059,9 +1059,11 @@ diff -uNr 17_kernel_symbols/kernel/tests/05_backtrace_sanity.rs 18_backtrace/ker
 +
 +#[no_mangle]
 +unsafe fn kernel_init() -> ! {
++    use driver::interface::DriverManager;
++
 +    exception::handling_init();
 +    memory::mmu::post_enable_init();
-+    bsp::console::qemu_bring_up_console();
++    bsp::driver::driver_manager().qemu_bring_up_console();
 +
 +    nested();
 +
@@ -1103,7 +1105,7 @@ diff -uNr 17_kernel_symbols/kernel/tests/06_backtrace_invalid_frame.rb 18_backtr
 diff -uNr 17_kernel_symbols/kernel/tests/06_backtrace_invalid_frame.rs 18_backtrace/kernel/tests/06_backtrace_invalid_frame.rs
 --- 17_kernel_symbols/kernel/tests/06_backtrace_invalid_frame.rs
 +++ 18_backtrace/kernel/tests/06_backtrace_invalid_frame.rs
-@@ -0,0 +1,33 @@
+@@ -0,0 +1,35 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
@@ -1117,7 +1119,7 @@ diff -uNr 17_kernel_symbols/kernel/tests/06_backtrace_invalid_frame.rs 18_backtr
 +/// Console tests should time out on the I/O harness in case of panic.
 +mod panic_wait_forever;
 +
-+use libkernel::{backtrace, bsp, cpu, exception, memory};
++use libkernel::{backtrace, bsp, cpu, driver, exception, memory};
 +
 +#[inline(never)]
 +fn nested() {
@@ -1128,9 +1130,11 @@ diff -uNr 17_kernel_symbols/kernel/tests/06_backtrace_invalid_frame.rs 18_backtr
 +
 +#[no_mangle]
 +unsafe fn kernel_init() -> ! {
++    use driver::interface::DriverManager;
++
 +    exception::handling_init();
 +    memory::mmu::post_enable_init();
-+    bsp::console::qemu_bring_up_console();
++    bsp::driver::driver_manager().qemu_bring_up_console();
 +
 +    nested();
 +
@@ -1171,7 +1175,7 @@ diff -uNr 17_kernel_symbols/kernel/tests/07_backtrace_invalid_link.rb 18_backtra
 diff -uNr 17_kernel_symbols/kernel/tests/07_backtrace_invalid_link.rs 18_backtrace/kernel/tests/07_backtrace_invalid_link.rs
 --- 17_kernel_symbols/kernel/tests/07_backtrace_invalid_link.rs
 +++ 18_backtrace/kernel/tests/07_backtrace_invalid_link.rs
-@@ -0,0 +1,38 @@
+@@ -0,0 +1,40 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
@@ -1185,7 +1189,7 @@ diff -uNr 17_kernel_symbols/kernel/tests/07_backtrace_invalid_link.rs 18_backtra
 +/// Console tests should time out on the I/O harness in case of panic.
 +mod panic_wait_forever;
 +
-+use libkernel::{backtrace, bsp, cpu, exception, memory};
++use libkernel::{backtrace, bsp, cpu, driver, exception, memory};
 +
 +#[inline(never)]
 +fn nested_2() -> &'static str {
@@ -1201,9 +1205,11 @@ diff -uNr 17_kernel_symbols/kernel/tests/07_backtrace_invalid_link.rs 18_backtra
 +
 +#[no_mangle]
 +unsafe fn kernel_init() -> ! {
++    use driver::interface::DriverManager;
++
 +    exception::handling_init();
 +    memory::mmu::post_enable_init();
-+    bsp::console::qemu_bring_up_console();
++    bsp::driver::driver_manager().qemu_bring_up_console();
 +
 +    nested_1();
 +
diff --git a/18_backtrace/kernel/src/_arch/aarch64/exception.rs b/18_backtrace/kernel/src/_arch/aarch64/exception.rs
index 300906441..17ec30095 100644
--- a/18_backtrace/kernel/src/_arch/aarch64/exception.rs
+++ b/18_backtrace/kernel/src/_arch/aarch64/exception.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::exception::arch_exception
 
-use crate::{bsp, exception, memory, symbols};
+use crate::{exception, memory, symbols};
 use core::{arch::global_asm, cell::UnsafeCell, fmt};
 use cortex_a::{asm::barrier, registers::*};
 use tock_registers::{
@@ -108,10 +108,8 @@ unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
 
 #[no_mangle]
 unsafe extern "C" fn current_elx_irq(_e: &mut ExceptionContext) {
-    use exception::asynchronous::interface::IRQManager;
-
     let token = &exception::asynchronous::IRQContext::new();
-    bsp::exception::asynchronous::irq_manager().handle_pending_irqs(token);
+    exception::asynchronous::irq_manager().handle_pending_irqs(token);
 }
 
 #[no_mangle]
diff --git a/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2.rs b/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2.rs
index 4c68a6929..e72fde7be 100644
--- a/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2.rs
+++ b/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2.rs
@@ -79,8 +79,12 @@
 mod gicc;
 mod gicd;
 
-use crate::{bsp, cpu, driver, exception, memory, synchronization, synchronization::InitStateLock};
-use core::sync::atomic::{AtomicBool, Ordering};
+use crate::{
+    bsp, cpu, driver, exception,
+    memory::{Address, Virtual},
+    synchronization,
+    synchronization::InitStateLock,
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -97,20 +101,17 @@ pub type IRQNumber = exception::asynchronous::IRQNumber<{ GICv2::MAX_IRQ_NUMBER
 
 /// Representation of the GIC.
 pub struct GICv2 {
-    gicd_mmio_descriptor: memory::mmu::MMIODescriptor,
-    gicc_mmio_descriptor: memory::mmu::MMIODescriptor,
-
     /// The Distributor.
     gicd: gicd::GICD,
 
     /// The CPU Interface.
     gicc: gicc::GICC,
 
-    /// Have the MMIO regions been remapped yet?
-    is_mmio_remapped: AtomicBool,
-
     /// Stores registered IRQ handlers. Writable only during kernel init. RO afterwards.
     handler_table: InitStateLock<HandlerTable>,
+
+    /// Callback to be invoked after successful init.
+    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -121,22 +122,23 @@ impl GICv2 {
     const MAX_IRQ_NUMBER: usize = 300; // Normally 1019, but keep it lower to save some space.
     const NUM_IRQS: usize = Self::MAX_IRQ_NUMBER + 1;
 
+    pub const COMPATIBLE: &'static str = "GICv2 (ARM Generic Interrupt Controller v2)";
+
     /// Create an instance.
     ///
     /// # Safety
     ///
-    /// - The user must ensure to provide correct MMIO descriptors.
+    /// - The user must ensure to provide a correct MMIO start address.
     pub const unsafe fn new(
-        gicd_mmio_descriptor: memory::mmu::MMIODescriptor,
-        gicc_mmio_descriptor: memory::mmu::MMIODescriptor,
+        gicd_mmio_start_addr: Address<Virtual>,
+        gicc_mmio_start_addr: Address<Virtual>,
+        post_init_callback: fn(),
     ) -> Self {
         Self {
-            gicd_mmio_descriptor,
-            gicc_mmio_descriptor,
-            gicd: gicd::GICD::new(gicd_mmio_descriptor.start_addr().as_usize()),
-            gicc: gicc::GICC::new(gicc_mmio_descriptor.start_addr().as_usize()),
-            is_mmio_remapped: AtomicBool::new(false),
+            gicd: gicd::GICD::new(gicd_mmio_start_addr),
+            gicc: gicc::GICC::new(gicc_mmio_start_addr),
             handler_table: InitStateLock::new([None; Self::NUM_IRQS]),
+            post_init_callback,
         }
     }
 }
@@ -148,24 +150,10 @@ use synchronization::interface::ReadWriteEx;
 
 impl driver::interface::DeviceDriver for GICv2 {
     fn compatible(&self) -> &'static str {
-        "GICv2 (ARM Generic Interrupt Controller v2)"
+        Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
-        let remapped = self.is_mmio_remapped.load(Ordering::Relaxed);
-        if !remapped {
-            // GICD
-            let mut virt_addr = memory::mmu::kernel_map_mmio("GICD", &self.gicd_mmio_descriptor)?;
-            self.gicd.set_mmio(virt_addr.as_usize());
-
-            // GICC
-            virt_addr = memory::mmu::kernel_map_mmio("GICC", &self.gicc_mmio_descriptor)?;
-            self.gicc.set_mmio(virt_addr.as_usize());
-
-            // Conclude remapping.
-            self.is_mmio_remapped.store(true, Ordering::Relaxed);
-        }
-
         if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
             self.gicd.boot_core_init();
         }
@@ -173,6 +161,8 @@ impl driver::interface::DeviceDriver for GICv2 {
         self.gicc.priority_accept_all();
         self.gicc.enable();
 
+        (self.post_init_callback)();
+
         Ok(())
     }
 }
diff --git a/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs b/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
index 1a151d246..1a02fc650 100644
--- a/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
+++ b/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
@@ -5,7 +5,9 @@
 //! GICC Driver - GIC CPU interface.
 
 use crate::{
-    bsp::device_driver::common::MMIODerefWrapper, exception, synchronization::InitStateLock,
+    bsp::device_driver::common::MMIODerefWrapper,
+    exception,
+    memory::{Address, Virtual},
 };
 use tock_registers::{
     interfaces::{Readable, Writeable},
@@ -62,13 +64,12 @@ type Registers = MMIODerefWrapper<RegisterBlock>;
 
 /// Representation of the GIC CPU interface.
 pub struct GICC {
-    registers: InitStateLock<Registers>,
+    registers: Registers,
 }
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
-use crate::synchronization::interface::ReadWriteEx;
 
 impl GICC {
     /// Create an instance.
@@ -76,17 +77,12 @@ impl GICC {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
         Self {
-            registers: InitStateLock::new(Registers::new(mmio_start_addr)),
+            registers: Registers::new(mmio_start_addr),
         }
     }
 
-    pub unsafe fn set_mmio(&self, new_mmio_start_addr: usize) {
-        self.registers
-            .write(|regs| *regs = Registers::new(new_mmio_start_addr));
-    }
-
     /// Accept interrupts of any priority.
     ///
     /// Quoting the GICv2 Architecture Specification:
@@ -99,9 +95,7 @@ impl GICC {
     /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
     ///   of `&mut self`.
     pub fn priority_accept_all(&self) {
-        self.registers.read(|regs| {
-            regs.PMR.write(PMR::Priority.val(255)); // Comment in arch spec.
-        });
+        self.registers.PMR.write(PMR::Priority.val(255)); // Comment in arch spec.
     }
 
     /// Enable the interface - start accepting IRQs.
@@ -111,9 +105,7 @@ impl GICC {
     /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
     ///   of `&mut self`.
     pub fn enable(&self) {
-        self.registers.read(|regs| {
-            regs.CTLR.write(CTLR::Enable::SET);
-        });
+        self.registers.CTLR.write(CTLR::Enable::SET);
     }
 
     /// Extract the number of the highest-priority pending IRQ.
@@ -129,8 +121,7 @@ impl GICC {
         &self,
         _ic: &exception::asynchronous::IRQContext<'irq_context>,
     ) -> usize {
-        self.registers
-            .read(|regs| regs.IAR.read(IAR::InterruptID) as usize)
+        self.registers.IAR.read(IAR::InterruptID) as usize
     }
 
     /// Complete handling of the currently active IRQ.
@@ -149,8 +140,6 @@ impl GICC {
         irq_number: u32,
         _ic: &exception::asynchronous::IRQContext<'irq_context>,
     ) {
-        self.registers.read(|regs| {
-            regs.EOIR.write(EOIR::EOIINTID.val(irq_number));
-        });
+        self.registers.EOIR.write(EOIR::EOIINTID.val(irq_number));
     }
 }
diff --git a/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs b/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
index 60bbc4689..d9f63d1bb 100644
--- a/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
+++ b/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -9,8 +9,9 @@
 
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper,
+    memory::{Address, Virtual},
     state, synchronization,
-    synchronization::{IRQSafeNullLock, InitStateLock},
+    synchronization::IRQSafeNullLock,
 };
 use tock_registers::{
     interfaces::{Readable, Writeable},
@@ -84,7 +85,7 @@ pub struct GICD {
     shared_registers: IRQSafeNullLock<SharedRegisters>,
 
     /// Access to banked registers is unguarded.
-    banked_registers: InitStateLock<BankedRegisters>,
+    banked_registers: BankedRegisters,
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -121,7 +122,6 @@ impl SharedRegisters {
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
-use crate::synchronization::interface::ReadWriteEx;
 use synchronization::interface::Mutex;
 
 impl GICD {
@@ -130,20 +130,13 @@ impl GICD {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
         Self {
             shared_registers: IRQSafeNullLock::new(SharedRegisters::new(mmio_start_addr)),
-            banked_registers: InitStateLock::new(BankedRegisters::new(mmio_start_addr)),
+            banked_registers: BankedRegisters::new(mmio_start_addr),
         }
     }
 
-    pub unsafe fn set_mmio(&self, new_mmio_start_addr: usize) {
-        self.shared_registers
-            .lock(|regs| *regs = SharedRegisters::new(new_mmio_start_addr));
-        self.banked_registers
-            .write(|regs| *regs = BankedRegisters::new(new_mmio_start_addr));
-    }
-
     /// Use a banked ITARGETSR to retrieve the executing core's GIC target mask.
     ///
     /// Quoting the GICv2 Architecture Specification:
@@ -151,8 +144,7 @@ impl GICD {
     ///   "GICD_ITARGETSR0 to GICD_ITARGETSR7 are read-only, and each field returns a value that
     ///    corresponds only to the processor reading the register."
     fn local_gic_target_mask(&self) -> u32 {
-        self.banked_registers
-            .read(|regs| regs.ITARGETSR[0].read(ITARGETSR::Offset0))
+        self.banked_registers.ITARGETSR[0].read(ITARGETSR::Offset0)
     }
 
     /// Route all SPIs to the boot core and enable the distributor.
@@ -191,10 +183,10 @@ impl GICD {
         // Check if we are handling a private or shared IRQ.
         match irq_num {
             // Private.
-            0..=31 => self.banked_registers.read(|regs| {
-                let enable_reg = &regs.ISENABLER;
+            0..=31 => {
+                let enable_reg = &self.banked_registers.ISENABLER;
                 enable_reg.set(enable_reg.get() | enable_bit);
-            }),
+            }
             // Shared.
             _ => {
                 let enable_reg_index_shared = enable_reg_index - 1;
diff --git a/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index eea07b755..a3361c2cc 100644
--- a/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -5,10 +5,12 @@
 //! GPIO Driver.
 
 use crate::{
-    bsp::device_driver::common::MMIODerefWrapper, driver, memory, synchronization,
+    bsp::device_driver::common::MMIODerefWrapper,
+    driver,
+    memory::{Address, Virtual},
+    synchronization,
     synchronization::IRQSafeNullLock,
 };
-use core::sync::atomic::{AtomicUsize, Ordering};
 use tock_registers::{
     interfaces::{ReadWriteable, Writeable},
     register_bitfields, register_structs,
@@ -109,26 +111,22 @@ register_structs! {
 /// Abstraction for the associated MMIO registers.
 type Registers = MMIODerefWrapper<RegisterBlock>;
 
-//--------------------------------------------------------------------------------------------------
-// Public Definitions
-//--------------------------------------------------------------------------------------------------
-
-pub struct GPIOInner {
+struct GPIOInner {
     registers: Registers,
 }
 
-// Export the inner struct so that BSPs can use it for the panic handler.
-pub use GPIOInner as PanicGPIO;
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
 
 /// Representation of the GPIO HW.
 pub struct GPIO {
-    mmio_descriptor: memory::mmu::MMIODescriptor,
-    virt_mmio_start_addr: AtomicUsize,
     inner: IRQSafeNullLock<GPIOInner>,
+    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
-// Public Code
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
 impl GPIOInner {
@@ -137,25 +135,12 @@ impl GPIOInner {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
         Self {
             registers: Registers::new(mmio_start_addr),
         }
     }
 
-    /// Init code.
-    ///
-    /// # Safety
-    ///
-    /// - The user must ensure to provide a correct MMIO start address.
-    pub unsafe fn init(&mut self, new_mmio_start_addr: Option<usize>) -> Result<(), &'static str> {
-        if let Some(addr) = new_mmio_start_addr {
-            self.registers = Registers::new(addr);
-        }
-
-        Ok(())
-    }
-
     /// Disable pull-up/down on pins 14 and 15.
     #[cfg(feature = "bsp_rpi3")]
     fn disable_pud_14_15_bcm2837(&mut self) {
@@ -205,17 +190,22 @@ impl GPIOInner {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
 impl GPIO {
+    pub const COMPATIBLE: &'static str = "BCM GPIO";
+
     /// Create an instance.
     ///
     /// # Safety
     ///
-    /// - The user must ensure to provide correct MMIO descriptors.
-    pub const unsafe fn new(mmio_descriptor: memory::mmu::MMIODescriptor) -> Self {
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>, post_init_callback: fn()) -> Self {
         Self {
-            mmio_descriptor,
-            virt_mmio_start_addr: AtomicUsize::new(0),
-            inner: IRQSafeNullLock::new(GPIOInner::new(mmio_descriptor.start_addr().as_usize())),
+            inner: IRQSafeNullLock::new(GPIOInner::new(mmio_start_addr)),
+            post_init_callback,
         }
     }
 
@@ -232,28 +222,12 @@ use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for GPIO {
     fn compatible(&self) -> &'static str {
-        "BCM GPIO"
+        Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
-        let virt_addr = memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?;
-
-        self.inner
-            .lock(|inner| inner.init(Some(virt_addr.as_usize())))?;
-
-        self.virt_mmio_start_addr
-            .store(virt_addr.as_usize(), Ordering::Relaxed);
+        (self.post_init_callback)();
 
         Ok(())
     }
-
-    fn virt_mmio_start_addr(&self) -> Option<usize> {
-        let addr = self.virt_mmio_start_addr.load(Ordering::Relaxed);
-
-        if addr == 0 {
-            return None;
-        }
-
-        Some(addr)
-    }
 }
diff --git a/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
index 99961facb..4908b8b67 100644
--- a/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+++ b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -6,7 +6,10 @@
 
 mod peripheral_ic;
 
-use crate::{driver, exception, memory};
+use crate::{
+    driver, exception,
+    memory::{Address, Virtual},
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -28,6 +31,7 @@ pub type PeripheralIRQ =
 
 /// Used for the associated type of trait [`exception::asynchronous::interface::IRQManager`].
 #[derive(Copy, Clone)]
+#[allow(missing_docs)]
 pub enum IRQNumber {
     Local(LocalIRQ),
     Peripheral(PeripheralIRQ),
@@ -36,6 +40,7 @@ pub enum IRQNumber {
 /// Representation of the Interrupt Controller.
 pub struct InterruptController {
     periph: peripheral_ic::PeripheralIC,
+    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -74,17 +79,20 @@ impl InterruptController {
     const MAX_PERIPHERAL_IRQ_NUMBER: usize = 63;
     const NUM_PERIPHERAL_IRQS: usize = Self::MAX_PERIPHERAL_IRQ_NUMBER + 1;
 
+    pub const COMPATIBLE: &'static str = "BCM Interrupt Controller";
+
     /// Create an instance.
     ///
     /// # Safety
     ///
-    /// - The user must ensure to provide correct MMIO descriptors.
+    /// - The user must ensure to provide a correct MMIO start address.
     pub const unsafe fn new(
-        _local_mmio_descriptor: memory::mmu::MMIODescriptor,
-        periph_mmio_descriptor: memory::mmu::MMIODescriptor,
+        periph_mmio_start_addr: Address<Virtual>,
+        post_init_callback: fn(),
     ) -> Self {
         Self {
-            periph: peripheral_ic::PeripheralIC::new(periph_mmio_descriptor),
+            periph: peripheral_ic::PeripheralIC::new(periph_mmio_start_addr),
+            post_init_callback,
         }
     }
 }
@@ -95,11 +103,13 @@ impl InterruptController {
 
 impl driver::interface::DeviceDriver for InterruptController {
     fn compatible(&self) -> &'static str {
-        "BCM Interrupt Controller"
+        Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
-        self.periph.init()
+        (self.post_init_callback)();
+
+        Ok(())
     }
 }
 
diff --git a/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index f09da862f..145d89612 100644
--- a/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -7,7 +7,9 @@
 use super::{InterruptController, PendingIRQs, PeripheralIRQ};
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper,
-    driver, exception, memory, synchronization,
+    exception,
+    memory::{Address, Virtual},
+    synchronization,
     synchronization::{IRQSafeNullLock, InitStateLock},
 };
 use tock_registers::{
@@ -55,13 +57,11 @@ type HandlerTable =
 
 /// Representation of the peripheral interrupt controller.
 pub struct PeripheralIC {
-    mmio_descriptor: memory::mmu::MMIODescriptor,
-
     /// Access to write registers is guarded with a lock.
     wo_registers: IRQSafeNullLock<WriteOnlyRegisters>,
 
     /// Register read access is unguarded.
-    ro_registers: InitStateLock<ReadOnlyRegisters>,
+    ro_registers: ReadOnlyRegisters,
 
     /// Stores registered IRQ handlers. Writable only during kernel init. RO afterwards.
     handler_table: InitStateLock<HandlerTable>,
@@ -76,26 +76,21 @@ impl PeripheralIC {
     ///
     /// # Safety
     ///
-    /// - The user must ensure to provide correct MMIO descriptors.
-    pub const unsafe fn new(mmio_descriptor: memory::mmu::MMIODescriptor) -> Self {
-        let addr = mmio_descriptor.start_addr().as_usize();
-
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
         Self {
-            mmio_descriptor,
-            wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(addr)),
-            ro_registers: InitStateLock::new(ReadOnlyRegisters::new(addr)),
+            wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(mmio_start_addr)),
+            ro_registers: ReadOnlyRegisters::new(mmio_start_addr),
             handler_table: InitStateLock::new([None; InterruptController::NUM_PERIPHERAL_IRQS]),
         }
     }
 
     /// Query the list of pending IRQs.
     fn pending_irqs(&self) -> PendingIRQs {
-        self.ro_registers.read(|regs| {
-            let pending_mask: u64 =
-                (u64::from(regs.PENDING_2.get()) << 32) | u64::from(regs.PENDING_1.get());
+        let pending_mask: u64 = (u64::from(self.ro_registers.PENDING_2.get()) << 32)
+            | u64::from(self.ro_registers.PENDING_1.get());
 
-            PendingIRQs::new(pending_mask)
-        })
+        PendingIRQs::new(pending_mask)
     }
 }
 
@@ -104,24 +99,6 @@ impl PeripheralIC {
 //------------------------------------------------------------------------------
 use synchronization::interface::{Mutex, ReadWriteEx};
 
-impl driver::interface::DeviceDriver for PeripheralIC {
-    fn compatible(&self) -> &'static str {
-        "BCM Peripheral Interrupt Controller"
-    }
-
-    unsafe fn init(&self) -> Result<(), &'static str> {
-        let virt_addr =
-            memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?.as_usize();
-
-        self.wo_registers
-            .lock(|regs| *regs = WriteOnlyRegisters::new(virt_addr));
-        self.ro_registers
-            .write(|regs| *regs = ReadOnlyRegisters::new(virt_addr));
-
-        Ok(())
-    }
-}
-
 impl exception::asynchronous::interface::IRQManager for PeripheralIC {
     type IRQNumberType = PeripheralIRQ;
 
diff --git a/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 3133047b1..f67d70dfb 100644
--- a/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -10,13 +10,14 @@
 //! - <https://developer.arm.com/documentation/ddi0183/latest>
 
 use crate::{
-    bsp, bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, exception, memory,
-    synchronization, synchronization::IRQSafeNullLock,
-};
-use core::{
-    fmt,
-    sync::atomic::{AtomicUsize, Ordering},
+    bsp,
+    bsp::device_driver::common::MMIODerefWrapper,
+    console, cpu, driver, exception,
+    memory::{Address, Virtual},
+    synchronization,
+    synchronization::IRQSafeNullLock,
 };
+use core::fmt;
 use tock_registers::{
     interfaces::{Readable, Writeable},
     register_bitfields, register_structs,
@@ -219,29 +220,25 @@ enum BlockingMode {
     NonBlocking,
 }
 
-//--------------------------------------------------------------------------------------------------
-// Public Definitions
-//--------------------------------------------------------------------------------------------------
-
-pub struct PL011UartInner {
+struct PL011UartInner {
     registers: Registers,
     chars_written: usize,
     chars_read: usize,
 }
 
-// Export the inner struct so that BSPs can use it for the panic handler.
-pub use PL011UartInner as PanicUart;
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
 
 /// Representation of the UART.
 pub struct PL011Uart {
-    mmio_descriptor: memory::mmu::MMIODescriptor,
-    virt_mmio_start_addr: AtomicUsize,
     inner: IRQSafeNullLock<PL011UartInner>,
     irq_number: bsp::device_driver::IRQNumber,
+    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
-// Public Code
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
 impl PL011UartInner {
@@ -250,7 +247,7 @@ impl PL011UartInner {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
         Self {
             registers: Registers::new(mmio_start_addr),
             chars_written: 0,
@@ -275,15 +272,7 @@ impl PL011UartInner {
     /// genrated baud rate of `48_000_000 / (16 * 3.25) = 923_077`.
     ///
     /// Error = `((923_077 - 921_600) / 921_600) * 100 = 0.16%`.
-    ///
-    /// # Safety
-    ///
-    /// - The user must ensure to provide a correct MMIO start address.
-    pub unsafe fn init(&mut self, new_mmio_start_addr: Option<usize>) -> Result<(), &'static str> {
-        if let Some(addr) = new_mmio_start_addr {
-            self.registers = Registers::new(addr);
-        }
-
+    pub fn init(&mut self) {
         // Execution can arrive here while there are still characters queued in the TX FIFO and
         // actively being sent out by the UART hardware. If the UART is turned off in this case,
         // those queued characters would be lost.
@@ -325,8 +314,6 @@ impl PL011UartInner {
         self.registers
             .CR
             .write(CR::UARTEN::Enabled + CR::TXE::Enabled + CR::RXE::Enabled);
-
-        Ok(())
     }
 
     /// Send a character.
@@ -399,24 +386,28 @@ impl fmt::Write for PL011UartInner {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
 impl PL011Uart {
+    pub const COMPATIBLE: &'static str = "BCM PL011 UART";
+
     /// Create an instance.
     ///
     /// # Safety
     ///
-    /// - The user must ensure to provide correct MMIO descriptors.
+    /// - The user must ensure to provide a correct MMIO start address.
     /// - The user must ensure to provide correct IRQ numbers.
     pub const unsafe fn new(
-        mmio_descriptor: memory::mmu::MMIODescriptor,
+        mmio_start_addr: Address<Virtual>,
         irq_number: bsp::device_driver::IRQNumber,
+        post_init_callback: fn(),
     ) -> Self {
         Self {
-            mmio_descriptor,
-            virt_mmio_start_addr: AtomicUsize::new(0),
-            inner: IRQSafeNullLock::new(PL011UartInner::new(
-                mmio_descriptor.start_addr().as_usize(),
-            )),
+            inner: IRQSafeNullLock::new(PL011UartInner::new(mmio_start_addr)),
             irq_number,
+            post_init_callback,
         }
     }
 }
@@ -428,27 +419,21 @@ use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for PL011Uart {
     fn compatible(&self) -> &'static str {
-        "BCM PL011 UART"
+        Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
-        let virt_addr = memory::mmu::kernel_map_mmio(self.compatible(), &self.mmio_descriptor)?;
-
-        self.inner
-            .lock(|inner| inner.init(Some(virt_addr.as_usize())))?;
-
-        self.virt_mmio_start_addr
-            .store(virt_addr.as_usize(), Ordering::Relaxed);
+        self.inner.lock(|inner| inner.init());
+        (self.post_init_callback)();
 
         Ok(())
     }
 
     fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
-        use bsp::exception::asynchronous::irq_manager;
-        use exception::asynchronous::{interface::IRQManager, IRQDescriptor};
+        use exception::asynchronous::{irq_manager, IRQDescriptor};
 
         let descriptor = IRQDescriptor {
-            name: "BCM PL011 UART",
+            name: Self::COMPATIBLE,
             handler: self,
         };
 
@@ -457,16 +442,6 @@ impl driver::interface::DeviceDriver for PL011Uart {
 
         Ok(())
     }
-
-    fn virt_mmio_start_addr(&self) -> Option<usize> {
-        let addr = self.virt_mmio_start_addr.load(Ordering::Relaxed);
-
-        if addr == 0 {
-            return None;
-        }
-
-        Some(addr)
-    }
 }
 
 impl console::interface::Write for PL011Uart {
@@ -514,6 +489,8 @@ impl console::interface::Statistics for PL011Uart {
     }
 }
 
+impl console::interface::All for PL011Uart {}
+
 impl exception::asynchronous::interface::IRQHandler for PL011Uart {
     fn handle(&self) -> Result<(), &'static str> {
         self.inner.lock(|inner| {
diff --git a/18_backtrace/kernel/src/bsp/device_driver/common.rs b/18_backtrace/kernel/src/bsp/device_driver/common.rs
index fd9e988ea..69f038d4d 100644
--- a/18_backtrace/kernel/src/bsp/device_driver/common.rs
+++ b/18_backtrace/kernel/src/bsp/device_driver/common.rs
@@ -4,6 +4,7 @@
 
 //! Common device driver code.
 
+use crate::memory::{Address, Virtual};
 use core::{marker::PhantomData, ops};
 
 //--------------------------------------------------------------------------------------------------
@@ -11,7 +12,7 @@ use core::{marker::PhantomData, ops};
 //--------------------------------------------------------------------------------------------------
 
 pub struct MMIODerefWrapper<T> {
-    start_addr: usize,
+    start_addr: Address<Virtual>,
     phantom: PhantomData<fn() -> T>,
 }
 
@@ -21,7 +22,7 @@ pub struct MMIODerefWrapper<T> {
 
 impl<T> MMIODerefWrapper<T> {
     /// Create an instance.
-    pub const unsafe fn new(start_addr: usize) -> Self {
+    pub const unsafe fn new(start_addr: Address<Virtual>) -> Self {
         Self {
             start_addr,
             phantom: PhantomData,
@@ -33,6 +34,6 @@ impl<T> ops::Deref for MMIODerefWrapper<T> {
     type Target = T;
 
     fn deref(&self) -> &Self::Target {
-        unsafe { &*(self.start_addr as *const _) }
+        unsafe { &*(self.start_addr.as_usize() as *const _) }
     }
 }
diff --git a/18_backtrace/kernel/src/bsp/raspberrypi.rs b/18_backtrace/kernel/src/bsp/raspberrypi.rs
index fb9edf88d..474419f4e 100644
--- a/18_backtrace/kernel/src/bsp/raspberrypi.rs
+++ b/18_backtrace/kernel/src/bsp/raspberrypi.rs
@@ -4,46 +4,11 @@
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
-pub mod console;
 pub mod cpu;
 pub mod driver;
 pub mod exception;
 pub mod memory;
 
-use super::device_driver;
-use crate::memory::mmu::MMIODescriptor;
-use memory::map::mmio;
-
-//--------------------------------------------------------------------------------------------------
-// Global instances
-//--------------------------------------------------------------------------------------------------
-
-static GPIO: device_driver::GPIO =
-    unsafe { device_driver::GPIO::new(MMIODescriptor::new(mmio::GPIO_START, mmio::GPIO_SIZE)) };
-
-static PL011_UART: device_driver::PL011Uart = unsafe {
-    device_driver::PL011Uart::new(
-        MMIODescriptor::new(mmio::PL011_UART_START, mmio::PL011_UART_SIZE),
-        exception::asynchronous::irq_map::PL011_UART,
-    )
-};
-
-#[cfg(feature = "bsp_rpi3")]
-static INTERRUPT_CONTROLLER: device_driver::InterruptController = unsafe {
-    device_driver::InterruptController::new(
-        MMIODescriptor::new(mmio::LOCAL_IC_START, mmio::LOCAL_IC_SIZE),
-        MMIODescriptor::new(mmio::PERIPHERAL_IC_START, mmio::PERIPHERAL_IC_SIZE),
-    )
-};
-
-#[cfg(feature = "bsp_rpi4")]
-static INTERRUPT_CONTROLLER: device_driver::GICv2 = unsafe {
-    device_driver::GICv2::new(
-        MMIODescriptor::new(mmio::GICD_START, mmio::GICD_SIZE),
-        MMIODescriptor::new(mmio::GICC_START, mmio::GICC_SIZE),
-    )
-};
-
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
diff --git a/18_backtrace/kernel/src/bsp/raspberrypi/console.rs b/18_backtrace/kernel/src/bsp/raspberrypi/console.rs
deleted file mode 100644
index a0d2e687c..000000000
--- a/18_backtrace/kernel/src/bsp/raspberrypi/console.rs
+++ /dev/null
@@ -1,98 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
-
-//! BSP console facilities.
-
-use crate::{bsp::device_driver, console, cpu, driver};
-use core::fmt;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// In case of a panic, the panic handler uses this function to take a last shot at printing
-/// something before the system is halted.
-///
-/// We try to init panic-versions of the GPIO and the UART. The panic versions are not protected
-/// with synchronization primitives, which increases chances that we get to print something, even
-/// when the kernel's default GPIO or UART instances happen to be locked at the time of the panic.
-///
-/// # Safety
-///
-/// - Use only for printing during a panic.
-#[cfg(not(feature = "test_build"))]
-pub unsafe fn panic_console_out() -> impl fmt::Write {
-    use driver::interface::DeviceDriver;
-
-    // If remapping of the driver's MMIO hasn't already happened, we won't be able to print. Just
-    // park the CPU core in this case.
-    let gpio_mmio_start_addr = match super::GPIO.virt_mmio_start_addr() {
-        None => cpu::wait_forever(),
-        Some(x) => x,
-    };
-
-    let uart_mmio_start_addr = match super::PL011_UART.virt_mmio_start_addr() {
-        None => cpu::wait_forever(),
-        Some(x) => x,
-    };
-
-    let mut panic_gpio = device_driver::PanicGPIO::new(gpio_mmio_start_addr);
-    let mut panic_uart = device_driver::PanicUart::new(uart_mmio_start_addr);
-
-    panic_gpio
-        .init(None)
-        .unwrap_or_else(|_| cpu::wait_forever());
-    panic_gpio.map_pl011_uart();
-    panic_uart
-        .init(None)
-        .unwrap_or_else(|_| cpu::wait_forever());
-
-    panic_uart
-}
-
-/// Reduced version for test builds.
-///
-/// # Safety
-///
-/// - Use only for printing during a panic.
-#[cfg(feature = "test_build")]
-pub unsafe fn panic_console_out() -> impl fmt::Write {
-    use driver::interface::DeviceDriver;
-
-    let uart_mmio_start_addr = match super::PL011_UART.virt_mmio_start_addr() {
-        None => cpu::wait_forever(),
-        Some(x) => x,
-    };
-    let mut panic_uart = device_driver::PanicUart::new(uart_mmio_start_addr);
-
-    panic_uart
-        .init(None)
-        .unwrap_or_else(|_| cpu::qemu_exit_failure());
-
-    panic_uart
-}
-
-/// Return a reference to the console.
-pub fn console() -> &'static impl console::interface::All {
-    &super::PL011_UART
-}
-
-//--------------------------------------------------------------------------------------------------
-// Testing
-//--------------------------------------------------------------------------------------------------
-
-/// Minimal code needed to bring up the console in QEMU (for testing only). This is often less steps
-/// than on real hardware due to QEMU's abstractions.
-#[cfg(feature = "test_build")]
-pub fn qemu_bring_up_console() {
-    use driver::interface::DeviceDriver;
-
-    // Calling the UART's init ensures that the BSP's instance of the UART does remap the MMIO
-    // addresses.
-    unsafe {
-        super::PL011_UART
-            .init()
-            .unwrap_or_else(|_| cpu::qemu_exit_failure());
-    }
-}
diff --git a/18_backtrace/kernel/src/bsp/raspberrypi/driver.rs b/18_backtrace/kernel/src/bsp/raspberrypi/driver.rs
index 531687524..e1db4a005 100644
--- a/18_backtrace/kernel/src/bsp/raspberrypi/driver.rs
+++ b/18_backtrace/kernel/src/bsp/raspberrypi/driver.rs
@@ -4,7 +4,19 @@
 
 //! BSP driver support.
 
-use crate::driver;
+use super::{exception, memory::map::mmio};
+use crate::{
+    bsp::device_driver,
+    console, driver, exception as generic_exception, memory,
+    memory::mmu::MMIODescriptor,
+    synchronization::{interface::ReadWriteEx, InitStateLock},
+};
+use core::{
+    mem::MaybeUninit,
+    sync::atomic::{AtomicBool, Ordering},
+};
+
+pub use device_driver::IRQNumber;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -12,21 +24,132 @@ use crate::driver;
 
 /// Device Driver Manager type.
 struct BSPDriverManager {
-    device_drivers: [&'static (dyn DeviceDriver + Sync); 3],
+    device_drivers: InitStateLock<[Option<&'static (dyn DeviceDriver + Sync)>; NUM_DRIVERS]>,
+    init_done: AtomicBool,
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// The number of active drivers provided by this BSP.
+pub const NUM_DRIVERS: usize = 3;
+
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
+static mut PL011_UART: MaybeUninit<device_driver::PL011Uart> = MaybeUninit::uninit();
+static mut GPIO: MaybeUninit<device_driver::GPIO> = MaybeUninit::uninit();
+
+#[cfg(feature = "bsp_rpi3")]
+static mut INTERRUPT_CONTROLLER: MaybeUninit<device_driver::InterruptController> =
+    MaybeUninit::uninit();
+
+#[cfg(feature = "bsp_rpi4")]
+static mut INTERRUPT_CONTROLLER: MaybeUninit<device_driver::GICv2> = MaybeUninit::uninit();
+
 static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
-    device_drivers: [
-        &super::GPIO,
-        &super::PL011_UART,
-        &super::INTERRUPT_CONTROLLER,
-    ],
+    device_drivers: InitStateLock::new([None; NUM_DRIVERS]),
+    init_done: AtomicBool::new(false),
 };
 
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl BSPDriverManager {
+    unsafe fn instantiate_uart(&self) -> Result<(), &'static str> {
+        let mmio_descriptor = MMIODescriptor::new(mmio::PL011_UART_START, mmio::PL011_UART_SIZE);
+        let virt_addr =
+            memory::mmu::kernel_map_mmio(device_driver::PL011Uart::COMPATIBLE, &mmio_descriptor)?;
+
+        // This is safe to do, because it is only called from the init'ed instance itself.
+        fn uart_post_init() {
+            console::register_console(unsafe { PL011_UART.assume_init_ref() });
+        }
+
+        PL011_UART.write(device_driver::PL011Uart::new(
+            virt_addr,
+            exception::asynchronous::irq_map::PL011_UART,
+            uart_post_init,
+        ));
+
+        Ok(())
+    }
+
+    unsafe fn instantiate_gpio(&self) -> Result<(), &'static str> {
+        let mmio_descriptor = MMIODescriptor::new(mmio::GPIO_START, mmio::GPIO_SIZE);
+        let virt_addr =
+            memory::mmu::kernel_map_mmio(device_driver::GPIO::COMPATIBLE, &mmio_descriptor)?;
+
+        // This is safe to do, because it is only called from the init'ed instance itself.
+        fn gpio_post_init() {
+            unsafe { GPIO.assume_init_ref().map_pl011_uart() };
+        }
+
+        GPIO.write(device_driver::GPIO::new(virt_addr, gpio_post_init));
+
+        Ok(())
+    }
+
+    #[cfg(feature = "bsp_rpi3")]
+    unsafe fn instantiate_interrupt_controller(&self) -> Result<(), &'static str> {
+        let periph_mmio_descriptor =
+            MMIODescriptor::new(mmio::PERIPHERAL_IC_START, mmio::PERIPHERAL_IC_SIZE);
+        let periph_virt_addr = memory::mmu::kernel_map_mmio(
+            device_driver::InterruptController::COMPATIBLE,
+            &periph_mmio_descriptor,
+        )?;
+
+        // This is safe to do, because it is only called from the init'ed instance itself.
+        fn interrupt_controller_post_init() {
+            generic_exception::asynchronous::register_irq_manager(unsafe {
+                INTERRUPT_CONTROLLER.assume_init_ref()
+            });
+        }
+
+        INTERRUPT_CONTROLLER.write(device_driver::InterruptController::new(
+            periph_virt_addr,
+            interrupt_controller_post_init,
+        ));
+
+        Ok(())
+    }
+
+    #[cfg(feature = "bsp_rpi4")]
+    unsafe fn instantiate_interrupt_controller(&self) -> Result<(), &'static str> {
+        let gicd_mmio_descriptor = MMIODescriptor::new(mmio::GICD_START, mmio::GICD_SIZE);
+        let gicd_virt_addr = memory::mmu::kernel_map_mmio("GICv2 GICD", &gicd_mmio_descriptor)?;
+
+        let gicc_mmio_descriptor = MMIODescriptor::new(mmio::GICC_START, mmio::GICC_SIZE);
+        let gicc_virt_addr = memory::mmu::kernel_map_mmio("GICV2 GICC", &gicc_mmio_descriptor)?;
+
+        // This is safe to do, because it is only called from the init'ed instance itself.
+        fn interrupt_controller_post_init() {
+            generic_exception::asynchronous::register_irq_manager(unsafe {
+                INTERRUPT_CONTROLLER.assume_init_ref()
+            });
+        }
+
+        INTERRUPT_CONTROLLER.write(device_driver::GICv2::new(
+            gicd_virt_addr,
+            gicc_virt_addr,
+            interrupt_controller_post_init,
+        ));
+
+        Ok(())
+    }
+
+    unsafe fn register_drivers(&self) {
+        self.device_drivers.write(|drivers| {
+            drivers[0] = Some(PL011_UART.assume_init_ref());
+            drivers[1] = Some(GPIO.assume_init_ref());
+            drivers[2] = Some(INTERRUPT_CONTROLLER.assume_init_ref());
+        });
+    }
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -42,20 +165,34 @@ pub fn driver_manager() -> &'static impl driver::interface::DriverManager {
 use driver::interface::DeviceDriver;
 
 impl driver::interface::DriverManager for BSPDriverManager {
-    fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
-        &self.device_drivers[..]
-    }
+    unsafe fn instantiate_drivers(&self) -> Result<(), &'static str> {
+        if self.init_done.load(Ordering::Relaxed) {
+            return Err("Drivers already instantiated");
+        }
+
+        self.instantiate_uart()?;
+        self.instantiate_gpio()?;
+        self.instantiate_interrupt_controller()?;
 
-    fn early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
-        &self.device_drivers[0..=1]
+        self.register_drivers();
+
+        self.init_done.store(true, Ordering::Relaxed);
+        Ok(())
     }
 
-    fn non_early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
-        &self.device_drivers[2..]
+    fn all_device_drivers(&self) -> [&(dyn DeviceDriver + Sync); NUM_DRIVERS] {
+        self.device_drivers
+            .read(|drivers| drivers.map(|drivers| drivers.unwrap()))
     }
 
-    fn post_early_print_device_driver_init(&self) {
-        // Configure PL011Uart's output pins.
-        super::GPIO.map_pl011_uart();
+    #[cfg(feature = "test_build")]
+    fn qemu_bring_up_console(&self) {
+        use crate::cpu;
+
+        unsafe {
+            self.instantiate_uart()
+                .unwrap_or_else(|_| cpu::qemu_exit_failure());
+            console::register_console(PL011_UART.assume_init_ref());
+        };
     }
 }
diff --git a/18_backtrace/kernel/src/bsp/raspberrypi/exception/asynchronous.rs b/18_backtrace/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
index dc5ab4215..ab20d86d3 100644
--- a/18_backtrace/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
+++ b/18_backtrace/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
@@ -4,7 +4,7 @@
 
 //! BSP asynchronous exception handling.
 
-use crate::{bsp, exception};
+use crate::bsp;
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -23,14 +23,3 @@ pub(in crate::bsp) mod irq_map {
 
     pub const PL011_UART: IRQNumber = IRQNumber::new(153);
 }
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return a reference to the IRQ manager.
-pub fn irq_manager() -> &'static impl exception::asynchronous::interface::IRQManager<
-    IRQNumberType = bsp::device_driver::IRQNumber,
-> {
-    &super::super::INTERRUPT_CONTROLLER
-}
diff --git a/18_backtrace/kernel/src/bsp/raspberrypi/memory.rs b/18_backtrace/kernel/src/bsp/raspberrypi/memory.rs
index 01aa9441a..32416e6cf 100644
--- a/18_backtrace/kernel/src/bsp/raspberrypi/memory.rs
+++ b/18_backtrace/kernel/src/bsp/raspberrypi/memory.rs
@@ -113,9 +113,6 @@ pub(super) mod map {
         pub const PL011_UART_START:    Address<Physical> = Address::new(0x3F20_1000);
         pub const PL011_UART_SIZE:     usize             =              0x48;
 
-        pub const LOCAL_IC_START:      Address<Physical> = Address::new(0x4000_0000);
-        pub const LOCAL_IC_SIZE:       usize             =              0x100;
-
         pub const END:                 Address<Physical> = Address::new(0x4001_0000);
     }
 
diff --git a/18_backtrace/kernel/src/console.rs b/18_backtrace/kernel/src/console.rs
index e49e241fe..a85bcffe7 100644
--- a/18_backtrace/kernel/src/console.rs
+++ b/18_backtrace/kernel/src/console.rs
@@ -4,6 +4,10 @@
 
 //! System console.
 
+mod null_console;
+
+use crate::synchronization;
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -49,5 +53,29 @@ pub mod interface {
     }
 
     /// Trait alias for a full-fledged console.
-    pub trait All = Write + Read + Statistics;
+    pub trait All: Write + Read + Statistics {}
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static CUR_CONSOLE: InitStateLock<&'static (dyn interface::All + Sync)> =
+    InitStateLock::new(&null_console::NULL_CONSOLE);
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+use synchronization::{interface::ReadWriteEx, InitStateLock};
+
+/// Register a new console.
+pub fn register_console(new_console: &'static (dyn interface::All + Sync)) {
+    CUR_CONSOLE.write(|con| *con = new_console);
+}
+
+/// Return a reference to the currently registered console.
+///
+/// This is the global console used by all printing macros.
+pub fn console() -> &'static dyn interface::All {
+    CUR_CONSOLE.read(|con| *con)
 }
diff --git a/18_backtrace/kernel/src/console/null_console.rs b/18_backtrace/kernel/src/console/null_console.rs
new file mode 100644
index 000000000..10c3bedc0
--- /dev/null
+++ b/18_backtrace/kernel/src/console/null_console.rs
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Null console.
+
+use super::interface;
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct NullConsole;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+pub static NULL_CONSOLE: NullConsole = NullConsole {};
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl interface::Write for NullConsole {
+    fn write_char(&self, _c: char) {}
+
+    fn write_fmt(&self, _args: fmt::Arguments) -> fmt::Result {
+        fmt::Result::Ok(())
+    }
+
+    fn flush(&self) {}
+}
+
+impl interface::Read for NullConsole {
+    fn clear_rx(&self) {}
+}
+
+impl interface::Statistics for NullConsole {}
+impl interface::All for NullConsole {}
diff --git a/18_backtrace/kernel/src/driver.rs b/18_backtrace/kernel/src/driver.rs
index 7b800dbc3..98197fef3 100644
--- a/18_backtrace/kernel/src/driver.rs
+++ b/18_backtrace/kernel/src/driver.rs
@@ -10,6 +10,8 @@
 
 /// Driver interfaces.
 pub mod interface {
+    use crate::bsp;
+
     /// Device Driver functions.
     pub trait DeviceDriver {
         /// Return a compatibility string for identifying the driver.
@@ -31,32 +33,25 @@ pub mod interface {
         fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
             Ok(())
         }
-
-        /// After MMIO remapping, returns the new virtual start address.
-        ///
-        /// This API assumes a driver has only a single, contiguous MMIO aperture, which will not be
-        /// the case for more complex devices. This API will likely change in future tutorials.
-        fn virt_mmio_start_addr(&self) -> Option<usize> {
-            None
-        }
     }
 
     /// Device driver management functions.
     ///
     /// The `BSP` is supposed to supply one global instance.
     pub trait DriverManager {
-        /// Return a slice of references to all `BSP`-instantiated drivers.
-        fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
-
-        /// Return only those drivers needed for the BSP's early printing functionality.
+        /// Instantiate all drivers.
+        ///
+        /// # Safety
         ///
-        /// For example, the default UART.
-        fn early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
+        /// Must be called before `all_device_drivers`.
+        unsafe fn instantiate_drivers(&self) -> Result<(), &'static str>;
 
-        /// Return all drivers minus early-print drivers.
-        fn non_early_print_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
+        /// Return a slice of references to all `BSP`-instantiated drivers.
+        fn all_device_drivers(&self) -> [&(dyn DeviceDriver + Sync); bsp::driver::NUM_DRIVERS];
 
-        /// Initialization code that runs after the early print driver init.
-        fn post_early_print_device_driver_init(&self);
+        /// Minimal code needed to bring up the console in QEMU (for testing only). This is often
+        /// less steps than on real hardware due to QEMU's abstractions.
+        #[cfg(feature = "test_build")]
+        fn qemu_bring_up_console(&self);
     }
 }
diff --git a/18_backtrace/kernel/src/exception/asynchronous.rs b/18_backtrace/kernel/src/exception/asynchronous.rs
index fb1785c23..d9d2767cf 100644
--- a/18_backtrace/kernel/src/exception/asynchronous.rs
+++ b/18_backtrace/kernel/src/exception/asynchronous.rs
@@ -7,7 +7,9 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "../_arch/aarch64/exception/asynchronous.rs"]
 mod arch_asynchronous;
+mod null_irq_manager;
 
+use crate::{bsp, synchronization};
 use core::{fmt, marker::PhantomData};
 
 //--------------------------------------------------------------------------------------------------
@@ -85,7 +87,7 @@ pub mod interface {
         );
 
         /// Print list of registered handlers.
-        fn print_handler(&self);
+        fn print_handler(&self) {}
     }
 }
 
@@ -93,9 +95,18 @@ pub mod interface {
 #[derive(Copy, Clone)]
 pub struct IRQNumber<const MAX_INCLUSIVE: usize>(usize);
 
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static CUR_IRQ_MANAGER: InitStateLock<
+    &'static (dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber> + Sync),
+> = InitStateLock::new(&null_irq_manager::NULL_IRQ_MANAGER);
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
+use synchronization::{interface::ReadWriteEx, InitStateLock};
 
 impl<'irq_context> IRQContext<'irq_context> {
     /// Creates an IRQContext token.
@@ -150,3 +161,18 @@ pub fn exec_with_irq_masked<T>(f: impl FnOnce() -> T) -> T {
 
     ret
 }
+
+/// Register a new IRQ manager.
+pub fn register_irq_manager(
+    new_manager: &'static (dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber>
+                  + Sync),
+) {
+    CUR_IRQ_MANAGER.write(|manager| *manager = new_manager);
+}
+
+/// Return a reference to the currently registered IRQ manager.
+///
+/// This is the IRQ manager used by the architectural interrupt handling code.
+pub fn irq_manager() -> &'static dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber> {
+    CUR_IRQ_MANAGER.read(|manager| *manager)
+}
diff --git a/18_backtrace/kernel/src/exception/asynchronous/null_irq_manager.rs b/18_backtrace/kernel/src/exception/asynchronous/null_irq_manager.rs
new file mode 100644
index 000000000..560e3ce4b
--- /dev/null
+++ b/18_backtrace/kernel/src/exception/asynchronous/null_irq_manager.rs
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Null IRQ Manager.
+
+use super::{interface, IRQContext, IRQDescriptor};
+use crate::bsp;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct NullIRQManager;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+pub static NULL_IRQ_MANAGER: NullIRQManager = NullIRQManager {};
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl interface::IRQManager for NullIRQManager {
+    type IRQNumberType = bsp::driver::IRQNumber;
+
+    fn register_handler(
+        &self,
+        _irq_number: Self::IRQNumberType,
+        _descriptor: IRQDescriptor,
+    ) -> Result<(), &'static str> {
+        panic!("No IRQ Manager registered yet");
+    }
+
+    fn enable(&self, _irq_number: Self::IRQNumberType) {
+        panic!("No IRQ Manager registered yet");
+    }
+
+    fn handle_pending_irqs<'irq_context>(&'irq_context self, _ic: &IRQContext<'irq_context>) {
+        panic!("No IRQ Manager registered yet");
+    }
+}
diff --git a/18_backtrace/kernel/src/lib.rs b/18_backtrace/kernel/src/lib.rs
index 4d7a5f5de..688fc1a40 100644
--- a/18_backtrace/kernel/src/lib.rs
+++ b/18_backtrace/kernel/src/lib.rs
@@ -114,6 +114,7 @@
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(generic_const_exprs)]
+#![feature(is_sorted)]
 #![feature(linkage)]
 #![feature(panic_info_message)]
 #![feature(step_trait)]
@@ -178,9 +179,11 @@ pub fn test_runner(tests: &[&test_types::UnitTest]) {
 #[cfg(test)]
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
     exception::handling_init();
     memory::mmu::post_enable_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     test_main();
 
diff --git a/18_backtrace/kernel/src/main.rs b/18_backtrace/kernel/src/main.rs
index 5150f3afc..928f12c2f 100644
--- a/18_backtrace/kernel/src/main.rs
+++ b/18_backtrace/kernel/src/main.rs
@@ -30,26 +30,11 @@ unsafe fn kernel_init() -> ! {
     exception::handling_init();
     memory::mmu::post_enable_init();
 
-    // Add the mapping records for the precomputed entries first, so that they appear on the top of
-    // the list.
-    bsp::memory::mmu::kernel_add_mapping_records_for_precomputed();
-
-    // Bring up the drivers needed for printing first.
-    for i in bsp::driver::driver_manager()
-        .early_print_device_drivers()
-        .iter()
-    {
-        // Any encountered errors cannot be printed yet, obviously, so just safely park the CPU.
-        i.init().unwrap_or_else(|_| cpu::wait_forever());
+    // Instantiate and init all device drivers.
+    if let Err(x) = bsp::driver::driver_manager().instantiate_drivers() {
+        panic!("Error instantiating drivers: {}", x);
     }
-    bsp::driver::driver_manager().post_early_print_device_driver_init();
-    // Printing available from here on.
-
-    // Now bring up the remaining drivers.
-    for i in bsp::driver::driver_manager()
-        .non_early_print_device_drivers()
-        .iter()
-    {
+    for i in bsp::driver::driver_manager().all_device_drivers().iter() {
         if let Err(x) = i.init() {
             panic!("Error loading driver: {}: {}", i.compatible(), x);
         }
@@ -62,6 +47,8 @@ unsafe fn kernel_init() -> ! {
         }
     }
 
+    bsp::memory::mmu::kernel_add_mapping_records_for_precomputed();
+
     // Unmask interrupts on the boot CPU core.
     exception::asynchronous::local_irq_unmask();
 
@@ -75,7 +62,6 @@ unsafe fn kernel_init() -> ! {
 /// The main function running after the early init.
 fn kernel_main() -> ! {
     use driver::interface::DriverManager;
-    use exception::asynchronous::interface::IRQManager;
 
     info!("{}", libkernel::version());
     info!("Booting on: {}", bsp::board_name());
@@ -104,7 +90,7 @@ fn kernel_main() -> ! {
     }
 
     info!("Registered IRQ handlers:");
-    bsp::exception::asynchronous::irq_manager().print_handler();
+    exception::asynchronous::irq_manager().print_handler();
 
     info!("Echoing input now");
     cpu::wait_forever();
diff --git a/18_backtrace/kernel/src/memory.rs b/18_backtrace/kernel/src/memory.rs
index 5e8cdbce8..34c34429d 100644
--- a/18_backtrace/kernel/src/memory.rs
+++ b/18_backtrace/kernel/src/memory.rs
@@ -18,18 +18,18 @@ use core::{
 //--------------------------------------------------------------------------------------------------
 
 /// Metadata trait for marking the type of an address.
-pub trait AddressType: Copy + Clone + PartialOrd + PartialEq {}
+pub trait AddressType: Copy + Clone + PartialOrd + PartialEq + Ord + Eq {}
 
 /// Zero-sized type to mark a physical address.
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq, Ord, Eq)]
 pub enum Physical {}
 
 /// Zero-sized type to mark a virtual address.
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq, Ord, Eq)]
 pub enum Virtual {}
 
 /// Generic address type.
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq, Ord, Eq)]
 pub struct Address<ATYPE: AddressType> {
     value: usize,
     _address_type: PhantomData<fn() -> ATYPE>,
diff --git a/18_backtrace/kernel/src/memory/mmu/mapping_record.rs b/18_backtrace/kernel/src/memory/mmu/mapping_record.rs
index d171c6e67..7d3a6c601 100644
--- a/18_backtrace/kernel/src/memory/mmu/mapping_record.rs
+++ b/18_backtrace/kernel/src/memory/mmu/mapping_record.rs
@@ -76,6 +76,19 @@ impl MappingRecord {
         Self { inner: [None; 12] }
     }
 
+    fn size(&self) -> usize {
+        self.inner.iter().filter(|x| x.is_some()).count()
+    }
+
+    fn sort(&mut self) {
+        let upper_bound_exclusive = self.size();
+        let entries = &mut self.inner[0..upper_bound_exclusive];
+
+        if !entries.is_sorted_by_key(|item| item.unwrap().virt_start_addr) {
+            entries.sort_unstable_by_key(|item| item.unwrap().virt_start_addr)
+        }
+    }
+
     fn find_next_free(&mut self) -> Result<&mut Option<MappingRecordEntry>, &'static str> {
         if let Some(x) = self.inner.iter_mut().find(|x| x.is_none()) {
             return Ok(x);
@@ -121,6 +134,9 @@ impl MappingRecord {
             phys_region,
             attr,
         ));
+
+        self.sort();
+
         Ok(())
     }
 
diff --git a/18_backtrace/kernel/src/panic_wait.rs b/18_backtrace/kernel/src/panic_wait.rs
index 1b67c5331..c8e86fbde 100644
--- a/18_backtrace/kernel/src/panic_wait.rs
+++ b/18_backtrace/kernel/src/panic_wait.rs
@@ -4,19 +4,13 @@
 
 //! A panic handler that infinitely waits.
 
-use crate::{backtrace, bsp, cpu, exception};
-use core::{fmt, panic::PanicInfo};
+use crate::{backtrace, cpu, exception, println};
+use core::panic::PanicInfo;
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-fn _panic_print(args: fmt::Arguments) {
-    use fmt::Write;
-
-    unsafe { bsp::console::panic_console_out().write_fmt(args).unwrap() };
-}
-
 /// The point of exit for `libkernel`.
 ///
 /// It is linked weakly, so that the integration tests can overload its standard behavior.
@@ -34,16 +28,6 @@ fn _panic_exit() -> ! {
     }
 }
 
-/// Prints with a newline - only use from the panic handler.
-///
-/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
-#[macro_export]
-macro_rules! panic_println {
-    ($($arg:tt)*) => ({
-        _panic_print(format_args_nl!($($arg)*));
-    })
-}
-
 /// Stop immediately if called a second time.
 ///
 /// # Note
@@ -88,7 +72,7 @@ fn panic(info: &PanicInfo) -> ! {
         _ => ("???", 0, 0),
     };
 
-    panic_println!(
+    println!(
         "[  {:>3}.{:06}] Kernel panic!\n\n\
         Panic location:\n      File '{}', line {}, column {}\n\n\
         {}\n\n\
diff --git a/18_backtrace/kernel/src/print.rs b/18_backtrace/kernel/src/print.rs
index 9ec13a286..8705eec0d 100644
--- a/18_backtrace/kernel/src/print.rs
+++ b/18_backtrace/kernel/src/print.rs
@@ -4,7 +4,7 @@
 
 //! Printing.
 
-use crate::{bsp, console};
+use crate::console;
 use core::fmt;
 
 //--------------------------------------------------------------------------------------------------
@@ -13,9 +13,7 @@ use core::fmt;
 
 #[doc(hidden)]
 pub fn _print(args: fmt::Arguments) {
-    use console::interface::Write;
-
-    bsp::console::console().write_fmt(args).unwrap();
+    console::console().write_fmt(args).unwrap();
 }
 
 /// Prints without a newline.
diff --git a/18_backtrace/kernel/tests/00_console_sanity.rs b/18_backtrace/kernel/tests/00_console_sanity.rs
index 6595aac1b..f2a1f3edf 100644
--- a/18_backtrace/kernel/tests/00_console_sanity.rs
+++ b/18_backtrace/kernel/tests/00_console_sanity.rs
@@ -11,16 +11,16 @@
 /// Console tests should time out on the I/O harness in case of panic.
 mod panic_wait_forever;
 
-use libkernel::{bsp, console, cpu, exception, memory, print};
+use libkernel::{bsp, console, cpu, driver, exception, memory, print};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use bsp::console::console;
-    use console::interface::*;
+    use console::console;
+    use driver::interface::DriverManager;
 
     exception::handling_init();
     memory::mmu::post_enable_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     // Handshake
     assert_eq!(console().read_char(), 'A');
diff --git a/18_backtrace/kernel/tests/01_timer_sanity.rs b/18_backtrace/kernel/tests/01_timer_sanity.rs
index 9b2b228d9..caeca3cd4 100644
--- a/18_backtrace/kernel/tests/01_timer_sanity.rs
+++ b/18_backtrace/kernel/tests/01_timer_sanity.rs
@@ -11,14 +11,16 @@
 #![test_runner(libkernel::test_runner)]
 
 use core::time::Duration;
-use libkernel::{bsp, cpu, exception, memory, time, time::interface::TimeManager};
+use libkernel::{bsp, cpu, driver, exception, memory, time, time::interface::TimeManager};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
     exception::handling_init();
     memory::mmu::post_enable_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
 
diff --git a/18_backtrace/kernel/tests/02_exception_sync_page_fault.rs b/18_backtrace/kernel/tests/02_exception_sync_page_fault.rs
index 0d2a1e63c..33463e0a8 100644
--- a/18_backtrace/kernel/tests/02_exception_sync_page_fault.rs
+++ b/18_backtrace/kernel/tests/02_exception_sync_page_fault.rs
@@ -17,13 +17,15 @@
 /// or indirectly.
 mod panic_exit_success;
 
-use libkernel::{bsp, cpu, exception, info, memory, println};
+use libkernel::{bsp, cpu, driver, exception, info, memory, println};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
     exception::handling_init();
     memory::mmu::post_enable_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     // This line will be printed as the test header.
     println!("Testing synchronous exception handling by causing a page fault");
diff --git a/18_backtrace/kernel/tests/03_exception_restore_sanity.rs b/18_backtrace/kernel/tests/03_exception_restore_sanity.rs
index 983d488f1..a521a8711 100644
--- a/18_backtrace/kernel/tests/03_exception_restore_sanity.rs
+++ b/18_backtrace/kernel/tests/03_exception_restore_sanity.rs
@@ -12,7 +12,7 @@
 mod panic_wait_forever;
 
 use core::arch::asm;
-use libkernel::{bsp, cpu, exception, info, memory, println};
+use libkernel::{bsp, cpu, driver, exception, info, memory, println};
 
 #[inline(never)]
 fn nested_system_call() {
@@ -30,9 +30,11 @@ fn nested_system_call() {
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
     exception::handling_init();
     memory::mmu::post_enable_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     // This line will be printed as the test header.
     println!("Testing exception restore");
diff --git a/18_backtrace/kernel/tests/04_exception_irq_sanity.rs b/18_backtrace/kernel/tests/04_exception_irq_sanity.rs
index 9030424d5..cd2d29d6a 100644
--- a/18_backtrace/kernel/tests/04_exception_irq_sanity.rs
+++ b/18_backtrace/kernel/tests/04_exception_irq_sanity.rs
@@ -10,13 +10,15 @@
 #![reexport_test_harness_main = "test_main"]
 #![test_runner(libkernel::test_runner)]
 
-use libkernel::{bsp, cpu, exception, memory};
+use libkernel::{bsp, cpu, driver, exception, memory};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
     memory::mmu::post_enable_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     exception::handling_init();
     exception::asynchronous::local_irq_unmask();
diff --git a/18_backtrace/kernel/tests/05_backtrace_sanity.rs b/18_backtrace/kernel/tests/05_backtrace_sanity.rs
index 24229f957..4475fafd7 100644
--- a/18_backtrace/kernel/tests/05_backtrace_sanity.rs
+++ b/18_backtrace/kernel/tests/05_backtrace_sanity.rs
@@ -11,7 +11,7 @@
 /// Console tests should time out on the I/O harness in case of panic.
 mod panic_wait_forever;
 
-use libkernel::{bsp, cpu, exception, memory};
+use libkernel::{bsp, cpu, driver, exception, memory};
 
 #[inline(never)]
 fn nested() {
@@ -20,9 +20,11 @@ fn nested() {
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
     exception::handling_init();
     memory::mmu::post_enable_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     nested();
 
diff --git a/18_backtrace/kernel/tests/06_backtrace_invalid_frame.rs b/18_backtrace/kernel/tests/06_backtrace_invalid_frame.rs
index a1874c4e4..74dad8d8b 100644
--- a/18_backtrace/kernel/tests/06_backtrace_invalid_frame.rs
+++ b/18_backtrace/kernel/tests/06_backtrace_invalid_frame.rs
@@ -11,7 +11,7 @@
 /// Console tests should time out on the I/O harness in case of panic.
 mod panic_wait_forever;
 
-use libkernel::{backtrace, bsp, cpu, exception, memory};
+use libkernel::{backtrace, bsp, cpu, driver, exception, memory};
 
 #[inline(never)]
 fn nested() {
@@ -22,9 +22,11 @@ fn nested() {
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
     exception::handling_init();
     memory::mmu::post_enable_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     nested();
 
diff --git a/18_backtrace/kernel/tests/07_backtrace_invalid_link.rs b/18_backtrace/kernel/tests/07_backtrace_invalid_link.rs
index a0731091b..ba6c9f579 100644
--- a/18_backtrace/kernel/tests/07_backtrace_invalid_link.rs
+++ b/18_backtrace/kernel/tests/07_backtrace_invalid_link.rs
@@ -11,7 +11,7 @@
 /// Console tests should time out on the I/O harness in case of panic.
 mod panic_wait_forever;
 
-use libkernel::{backtrace, bsp, cpu, exception, memory};
+use libkernel::{backtrace, bsp, cpu, driver, exception, memory};
 
 #[inline(never)]
 fn nested_2() -> &'static str {
@@ -27,9 +27,11 @@ fn nested_1() {
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
     exception::handling_init();
     memory::mmu::post_enable_init();
-    bsp::console::qemu_bring_up_console();
+    bsp::driver::driver_manager().qemu_bring_up_console();
 
     nested_1();
 
diff --git a/X1_JTAG_boot/.vscode/settings.json b/X1_JTAG_boot/.vscode/settings.json
index 292bf2a93..d1916456a 100644
--- a/X1_JTAG_boot/.vscode/settings.json
+++ b/X1_JTAG_boot/.vscode/settings.json
@@ -4,7 +4,7 @@
   "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
   "rust-analyzer.cargo.features": ["bsp_rpi3"],
   "rust-analyzer.checkOnSave.allTargets": false,
-  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
+  "rust-analyzer.checkOnSave.extraArgs": ["--bins"],
   "rust-analyzer.lens.debug": false,
   "rust-analyzer.lens.run": false
 }
diff --git a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index dbb4beaa6..24958eb56 100644
--- a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -108,16 +108,13 @@ register_structs! {
 /// Abstraction for the associated MMIO registers.
 type Registers = MMIODerefWrapper<RegisterBlock>;
 
-//--------------------------------------------------------------------------------------------------
-// Public Definitions
-//--------------------------------------------------------------------------------------------------
-
-pub struct GPIOInner {
+struct GPIOInner {
     registers: Registers,
 }
 
-// Export the inner struct so that BSPs can use it for the panic handler.
-pub use GPIOInner as PanicGPIO;
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
 
 /// Representation of the GPIO HW.
 pub struct GPIO {
@@ -125,7 +122,7 @@ pub struct GPIO {
 }
 
 //--------------------------------------------------------------------------------------------------
-// Public Code
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
 impl GPIOInner {
@@ -189,7 +186,13 @@ impl GPIOInner {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
 impl GPIO {
+    pub const COMPATIBLE: &'static str = "BCM GPIO";
+
     /// Create an instance.
     ///
     /// # Safety
@@ -214,6 +217,6 @@ use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for GPIO {
     fn compatible(&self) -> &'static str {
-        "BCM GPIO"
+        Self::COMPATIBLE
     }
 }
diff --git a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 85cd31549..b034e92e5 100644
--- a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -167,18 +167,15 @@ enum BlockingMode {
     NonBlocking,
 }
 
-//--------------------------------------------------------------------------------------------------
-// Public Definitions
-//--------------------------------------------------------------------------------------------------
-
-pub struct PL011UartInner {
+struct PL011UartInner {
     registers: Registers,
     chars_written: usize,
     chars_read: usize,
 }
 
-// Export the inner struct so that BSPs can use it for the panic handler.
-pub use PL011UartInner as PanicUart;
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
 
 /// Representation of the UART.
 pub struct PL011Uart {
@@ -186,7 +183,7 @@ pub struct PL011Uart {
 }
 
 //--------------------------------------------------------------------------------------------------
-// Public Code
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
 impl PL011UartInner {
@@ -326,7 +323,13 @@ impl fmt::Write for PL011UartInner {
     }
 }
 
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
 impl PL011Uart {
+    pub const COMPATIBLE: &'static str = "BCM PL011 UART";
+
     /// Create an instance.
     ///
     /// # Safety
@@ -346,7 +349,7 @@ use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for PL011Uart {
     fn compatible(&self) -> &'static str {
-        "BCM PL011 UART"
+        Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
@@ -400,3 +403,5 @@ impl console::interface::Statistics for PL011Uart {
         self.inner.lock(|inner| inner.chars_read)
     }
 }
+
+impl console::interface::All for PL011Uart {}
diff --git a/X1_JTAG_boot/src/bsp/raspberrypi.rs b/X1_JTAG_boot/src/bsp/raspberrypi.rs
index f8dbc1f40..eb6be81ae 100644
--- a/X1_JTAG_boot/src/bsp/raspberrypi.rs
+++ b/X1_JTAG_boot/src/bsp/raspberrypi.rs
@@ -8,14 +8,3 @@ pub mod console;
 pub mod cpu;
 pub mod driver;
 pub mod memory;
-
-//--------------------------------------------------------------------------------------------------
-// Global instances
-//--------------------------------------------------------------------------------------------------
-use super::device_driver;
-
-static GPIO: device_driver::GPIO =
-    unsafe { device_driver::GPIO::new(memory::map::mmio::GPIO_START) };
-
-static PL011_UART: device_driver::PL011Uart =
-    unsafe { device_driver::PL011Uart::new(memory::map::mmio::PL011_UART_START) };
diff --git a/X1_JTAG_boot/src/bsp/raspberrypi/console.rs b/X1_JTAG_boot/src/bsp/raspberrypi/console.rs
index a247032fc..0a630eef4 100644
--- a/X1_JTAG_boot/src/bsp/raspberrypi/console.rs
+++ b/X1_JTAG_boot/src/bsp/raspberrypi/console.rs
@@ -4,34 +4,13 @@
 
 //! BSP console facilities.
 
-use super::memory;
-use crate::{bsp::device_driver, console};
-use core::fmt;
+use crate::console;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
-/// In case of a panic, the panic handler uses this function to take a last shot at printing
-/// something before the system is halted.
-///
-/// We try to init panic-versions of the GPIO and the UART. The panic versions are not protected
-/// with synchronization primitives, which increases chances that we get to print something, even
-/// when the kernel's default GPIO or UART instances happen to be locked at the time of the panic.
-///
-/// # Safety
-///
-/// - Use only for printing during a panic.
-pub unsafe fn panic_console_out() -> impl fmt::Write {
-    let mut panic_gpio = device_driver::PanicGPIO::new(memory::map::mmio::GPIO_START);
-    let mut panic_uart = device_driver::PanicUart::new(memory::map::mmio::PL011_UART_START);
-
-    panic_gpio.map_pl011_uart();
-    panic_uart.init();
-    panic_uart
-}
-
 /// Return a reference to the console.
-pub fn console() -> &'static impl console::interface::All {
-    &super::PL011_UART
+pub fn console() -> &'static dyn console::interface::All {
+    &super::driver::PL011_UART
 }
diff --git a/X1_JTAG_boot/src/bsp/raspberrypi/driver.rs b/X1_JTAG_boot/src/bsp/raspberrypi/driver.rs
index b5538baa3..8b683ed8b 100644
--- a/X1_JTAG_boot/src/bsp/raspberrypi/driver.rs
+++ b/X1_JTAG_boot/src/bsp/raspberrypi/driver.rs
@@ -4,7 +4,8 @@
 
 //! BSP driver support.
 
-use crate::driver;
+use super::memory::map::mmio;
+use crate::{bsp::device_driver, driver};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -19,8 +20,13 @@ struct BSPDriverManager {
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
+pub(super) static PL011_UART: device_driver::PL011Uart =
+    unsafe { device_driver::PL011Uart::new(mmio::PL011_UART_START) };
+
+static GPIO: device_driver::GPIO = unsafe { device_driver::GPIO::new(mmio::GPIO_START) };
+
 static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
-    device_drivers: [&super::GPIO, &super::PL011_UART],
+    device_drivers: [&PL011_UART, &GPIO],
 };
 
 //--------------------------------------------------------------------------------------------------
@@ -44,6 +50,6 @@ impl driver::interface::DriverManager for BSPDriverManager {
 
     fn post_device_driver_init(&self) {
         // Configure PL011Uart's output pins.
-        super::GPIO.map_pl011_uart();
+        GPIO.map_pl011_uart();
     }
 }
diff --git a/X1_JTAG_boot/src/console.rs b/X1_JTAG_boot/src/console.rs
index e49e241fe..c1fb0e53b 100644
--- a/X1_JTAG_boot/src/console.rs
+++ b/X1_JTAG_boot/src/console.rs
@@ -4,6 +4,8 @@
 
 //! System console.
 
+use crate::bsp;
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -49,5 +51,16 @@ pub mod interface {
     }
 
     /// Trait alias for a full-fledged console.
-    pub trait All = Write + Read + Statistics;
+    pub trait All: Write + Read + Statistics {}
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the console.
+///
+/// This is the global console used by all printing macros.
+pub fn console() -> &'static dyn interface::All {
+    bsp::console::console()
 }
diff --git a/X1_JTAG_boot/src/panic_wait.rs b/X1_JTAG_boot/src/panic_wait.rs
index f851e0d8c..edd838855 100644
--- a/X1_JTAG_boot/src/panic_wait.rs
+++ b/X1_JTAG_boot/src/panic_wait.rs
@@ -4,29 +4,13 @@
 
 //! A panic handler that infinitely waits.
 
-use crate::{bsp, cpu};
-use core::{fmt, panic::PanicInfo};
+use crate::{cpu, println};
+use core::panic::PanicInfo;
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-fn _panic_print(args: fmt::Arguments) {
-    use fmt::Write;
-
-    unsafe { bsp::console::panic_console_out().write_fmt(args).unwrap() };
-}
-
-/// Prints with a newline - only use from the panic handler.
-///
-/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
-#[macro_export]
-macro_rules! panic_println {
-    ($($arg:tt)*) => ({
-        _panic_print(format_args_nl!($($arg)*));
-    })
-}
-
 /// Stop immediately if called a second time.
 ///
 /// # Note
@@ -69,7 +53,7 @@ fn panic(info: &PanicInfo) -> ! {
         _ => ("???", 0, 0),
     };
 
-    panic_println!(
+    println!(
         "[  {:>3}.{:06}] Kernel panic!\n\n\
         Panic location:\n      File '{}', line {}, column {}\n\n\
         {}",
diff --git a/X1_JTAG_boot/src/print.rs b/X1_JTAG_boot/src/print.rs
index 9ec13a286..8705eec0d 100644
--- a/X1_JTAG_boot/src/print.rs
+++ b/X1_JTAG_boot/src/print.rs
@@ -4,7 +4,7 @@
 
 //! Printing.
 
-use crate::{bsp, console};
+use crate::console;
 use core::fmt;
 
 //--------------------------------------------------------------------------------------------------
@@ -13,9 +13,7 @@ use core::fmt;
 
 #[doc(hidden)]
 pub fn _print(args: fmt::Arguments) {
-    use console::interface::Write;
-
-    bsp::console::console().write_fmt(args).unwrap();
+    console::console().write_fmt(args).unwrap();
 }
 
 /// Prints without a newline.

From 7aa99d52c03b50c8c6137bd2e5ca0e3751157a81 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 16 May 2022 22:14:02 +0200
Subject: [PATCH 165/214] Misc fixes/streamlining

---
 .../README.md                                 |  64 ++++--
 .../src/common.rs                             |  22 ++
 .../src/main.rs                               |   2 +
 .../src/memory/mmu.rs                         |  15 +-
 11_exceptions_part1_groundwork/README.md      |   8 +-
 11_exceptions_part1_groundwork/src/common.rs  |  22 ++
 11_exceptions_part1_groundwork/src/main.rs    |   2 +
 .../src/memory/mmu.rs                         |  15 +-
 12_integrated_testing/kernel/src/common.rs    |  22 ++
 12_integrated_testing/kernel/src/lib.rs       |   2 +
 .../kernel/src/memory/mmu.rs                  |  15 +-
 13_exceptions_part2_peripheral_IRQs/README.md |   6 +-
 .../kernel/src/common.rs                      |  22 ++
 .../kernel/src/lib.rs                         |   2 +
 .../kernel/src/memory/mmu.rs                  |  15 +-
 14_virtual_mem_part2_mmio_remap/README.md     | 217 +++++++-----------
 .../kernel/src/common.rs                      |  17 ++
 .../kernel/src/console/null_console.rs        |   2 +-
 .../kernel/src/lib.rs                         |   3 +-
 .../kernel/src/main.rs                        |   2 -
 .../kernel/src/memory/mmu.rs                  |   2 +-
 .../kernel/src/memory/mmu/mapping_record.rs   |  16 +-
 .../kernel/src/memory/mmu/page_alloc.rs       |   2 +-
 .../kernel/tests/00_console_sanity.rs         |   2 -
 .../kernel/tests/01_timer_sanity.rs           |   2 -
 .../tests/02_exception_sync_page_fault.rs     |   2 -
 .../tests/03_exception_restore_sanity.rs      |   2 -
 .../kernel/tests/04_exception_irq_sanity.rs   |   2 -
 .../README.md                                 | 134 ++++++-----
 .../kernel/src/common.rs                      |  17 ++
 .../kernel/src/console/null_console.rs        |   2 +-
 .../kernel/src/lib.rs                         |   3 +-
 .../kernel/src/main.rs                        |   2 +-
 .../kernel/src/memory.rs                      |   5 +
 .../kernel/src/memory/mmu.rs                  |  31 ++-
 .../kernel/src/memory/mmu/mapping_record.rs   |  16 +-
 .../kernel/src/memory/mmu/page_alloc.rs       |   2 +-
 .../kernel/tests/00_console_sanity.rs         |   2 +-
 .../kernel/tests/01_timer_sanity.rs           |   2 +-
 .../tests/02_exception_sync_page_fault.rs     |   2 +-
 .../tests/03_exception_restore_sanity.rs      |   2 +-
 .../kernel/tests/04_exception_irq_sanity.rs   |   2 +-
 .../README.md                                 |   2 +-
 .../kernel/src/common.rs                      |  17 ++
 .../kernel/src/console/null_console.rs        |   2 +-
 .../kernel/src/lib.rs                         |   3 +-
 .../kernel/src/main.rs                        |   2 +-
 .../kernel/src/memory.rs                      |   5 +
 .../kernel/src/memory/mmu.rs                  |  31 ++-
 .../kernel/src/memory/mmu/mapping_record.rs   |  16 +-
 .../kernel/src/memory/mmu/page_alloc.rs       |   2 +-
 .../kernel/tests/00_console_sanity.rs         |   2 +-
 .../kernel/tests/01_timer_sanity.rs           |   2 +-
 .../tests/02_exception_sync_page_fault.rs     |   2 +-
 .../tests/03_exception_restore_sanity.rs      |   2 +-
 .../kernel/tests/04_exception_irq_sanity.rs   |   2 +-
 17_kernel_symbols/README.md                   |   2 +-
 17_kernel_symbols/kernel/src/common.rs        |  17 ++
 .../kernel/src/console/null_console.rs        |   2 +-
 17_kernel_symbols/kernel/src/lib.rs           |   3 +-
 17_kernel_symbols/kernel/src/main.rs          |   2 +-
 17_kernel_symbols/kernel/src/memory.rs        |   5 +
 17_kernel_symbols/kernel/src/memory/mmu.rs    |  31 ++-
 .../kernel/src/memory/mmu/mapping_record.rs   |  16 +-
 .../kernel/src/memory/mmu/page_alloc.rs       |   2 +-
 .../kernel/tests/00_console_sanity.rs         |   2 +-
 .../kernel/tests/01_timer_sanity.rs           |   2 +-
 .../tests/02_exception_sync_page_fault.rs     |   2 +-
 .../tests/03_exception_restore_sanity.rs      |   2 +-
 .../kernel/tests/04_exception_irq_sanity.rs   |   2 +-
 18_backtrace/README.md                        |  60 ++++-
 18_backtrace/kernel/src/backtrace.rs          |   4 +-
 18_backtrace/kernel/src/common.rs             |  17 ++
 .../kernel/src/console/null_console.rs        |   2 +-
 18_backtrace/kernel/src/lib.rs                |   3 +-
 18_backtrace/kernel/src/main.rs               |   2 +-
 18_backtrace/kernel/src/memory.rs             |   5 +
 18_backtrace/kernel/src/memory/mmu.rs         |  31 ++-
 .../kernel/src/memory/mmu/mapping_record.rs   |  16 +-
 .../kernel/src/memory/mmu/page_alloc.rs       |   2 +-
 .../kernel/tests/00_console_sanity.rs         |   2 +-
 18_backtrace/kernel/tests/01_timer_sanity.rs  |   2 +-
 .../tests/02_exception_sync_page_fault.rs     |   2 +-
 .../tests/03_exception_restore_sanity.rs      |   2 +-
 .../kernel/tests/04_exception_irq_sanity.rs   |   2 +-
 .../kernel/tests/05_backtrace_sanity.rs       |   2 +-
 .../tests/06_backtrace_invalid_frame.rs       |   2 +-
 .../kernel/tests/07_backtrace_invalid_link.rs |   2 +-
 .../tools/translation_table_tool/bsp.rb       |   6 +-
 .../tools/translation_table_tool/generic.rb   |  14 +-
 90 files changed, 618 insertions(+), 467 deletions(-)
 create mode 100644 10_virtual_mem_part1_identity_mapping/src/common.rs
 create mode 100644 11_exceptions_part1_groundwork/src/common.rs
 create mode 100644 12_integrated_testing/kernel/src/common.rs
 create mode 100644 13_exceptions_part2_peripheral_IRQs/kernel/src/common.rs

diff --git a/10_virtual_mem_part1_identity_mapping/README.md b/10_virtual_mem_part1_identity_mapping/README.md
index 04b82eca8..8bfd54fa5 100644
--- a/10_virtual_mem_part1_identity_mapping/README.md
+++ b/10_virtual_mem_part1_identity_mapping/README.md
@@ -331,7 +331,7 @@ Minipush 1.0
 [    0.811829] MMU online. Special regions:
 [    0.812306]       0x00080000 - 0x0008ffff |  64 KiB | C   RO PX  | Kernel code and RO data
 [    0.813324]       0x1fff0000 - 0x1fffffff |  64 KiB | Dev RW PXN | Remapped Device MMIO
-[    0.814310]       0x3f000000 - 0x4000ffff |  16 MiB | Dev RW PXN | Device MMIO
+[    0.814310]       0x3f000000 - 0x4000ffff |  17 MiB | Dev RW PXN | Device MMIO
 [    0.815198] Current privilege level: EL1
 [    0.815675] Exception handling state:
 [    0.816119]       Debug:  Masked
@@ -1079,10 +1079,37 @@ diff -uNr 09_privilege_level/src/bsp.rs 10_virtual_mem_part1_identity_mapping/sr
  #[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
  mod raspberrypi;
 
+diff -uNr 09_privilege_level/src/common.rs 10_virtual_mem_part1_identity_mapping/src/common.rs
+--- 09_privilege_level/src/common.rs
++++ 10_virtual_mem_part1_identity_mapping/src/common.rs
+@@ -0,0 +1,22 @@
++// SPDX-License-Identifier: MIT OR Apache-2.0
++//
++// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
++
++//! General purpose code.
++
++/// Convert a size into human readable format.
++pub const fn size_human_readable_ceil(size: usize) -> (usize, &'static str) {
++    const KIB: usize = 1024;
++    const MIB: usize = 1024 * 1024;
++    const GIB: usize = 1024 * 1024 * 1024;
++
++    if (size / GIB) > 0 {
++        (size.div_ceil(GIB), "GiB")
++    } else if (size / MIB) > 0 {
++        (size.div_ceil(MIB), "MiB")
++    } else if (size / KIB) > 0 {
++        (size.div_ceil(KIB), "KiB")
++    } else {
++        (size, "Byte")
++    }
++}
+
 diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/src/main.rs
 --- 09_privilege_level/src/main.rs
 +++ 10_virtual_mem_part1_identity_mapping/src/main.rs
-@@ -107,7 +107,9 @@
+@@ -107,18 +107,23 @@
  //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
  #![allow(clippy::upper_case_acronyms)]
@@ -1090,9 +1117,15 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
  #![feature(asm_const)]
 +#![feature(core_intrinsics)]
  #![feature(format_args_nl)]
++#![feature(int_roundings)]
  #![feature(panic_info_message)]
  #![feature(trait_alias)]
-@@ -119,6 +121,7 @@
+ #![no_main]
+ #![no_std]
+
+ mod bsp;
++mod common;
+ mod console;
  mod cpu;
  mod driver;
  mod exception;
@@ -1100,7 +1133,7 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
  mod panic_wait;
  mod print;
  mod synchronization;
-@@ -129,9 +132,17 @@
+@@ -129,9 +134,17 @@
  /// # Safety
  ///
  /// - Only a single core must be active and running this function.
@@ -1119,7 +1152,7 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
 
      for i in bsp::driver::driver_manager().all_device_drivers().iter() {
          if let Err(x) = i.init() {
-@@ -147,7 +158,7 @@
+@@ -147,7 +160,7 @@
 
  /// The main function running after the early init.
  fn kernel_main() -> ! {
@@ -1128,7 +1161,7 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
      use core::time::Duration;
      use driver::interface::DriverManager;
      use time::interface::TimeManager;
-@@ -159,6 +170,9 @@
+@@ -159,6 +172,9 @@
      );
      info!("Booting on: {}", bsp::board_name());
 
@@ -1138,7 +1171,7 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
      let (_, privilege_level) = exception::current_privilege_level();
      info!("Current privilege level: {}", privilege_level);
 
-@@ -182,6 +196,13 @@
+@@ -182,6 +198,13 @@
      info!("Timer test, spinning for 1 second");
      time::time_manager().spin_for(Duration::from_secs(1));
 
@@ -1175,7 +1208,7 @@ diff -uNr 09_privilege_level/src/memory/mmu/translation_table.rs 10_virtual_mem_
 diff -uNr 09_privilege_level/src/memory/mmu.rs 10_virtual_mem_part1_identity_mapping/src/memory/mmu.rs
 --- 09_privilege_level/src/memory/mmu.rs
 +++ 10_virtual_mem_part1_identity_mapping/src/memory/mmu.rs
-@@ -0,0 +1,264 @@
+@@ -0,0 +1,253 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
@@ -1198,6 +1231,7 @@ diff -uNr 09_privilege_level/src/memory/mmu.rs 10_virtual_mem_part1_identity_map
 +
 +mod translation_table;
 +
++use crate::common;
 +use core::{fmt, ops::RangeInclusive};
 +
 +//--------------------------------------------------------------------------------------------------
@@ -1357,19 +1391,7 @@ diff -uNr 09_privilege_level/src/memory/mmu.rs 10_virtual_mem_part1_identity_map
 +        let end = *(self.virtual_range)().end();
 +        let size = end - start + 1;
 +
-+        // log2(1024).
-+        const KIB_RSHIFT: u32 = 10;
-+
-+        // log2(1024 * 1024).
-+        const MIB_RSHIFT: u32 = 20;
-+
-+        let (size, unit) = if (size >> MIB_RSHIFT) > 0 {
-+            (size >> MIB_RSHIFT, "MiB")
-+        } else if (size >> KIB_RSHIFT) > 0 {
-+            (size >> KIB_RSHIFT, "KiB")
-+        } else {
-+            (size, "Byte")
-+        };
++        let (size, unit) = common::size_human_readable_ceil(size);
 +
 +        let attr = match self.attribute_fields.mem_attributes {
 +            MemAttributes::CacheableDRAM => "C",
diff --git a/10_virtual_mem_part1_identity_mapping/src/common.rs b/10_virtual_mem_part1_identity_mapping/src/common.rs
new file mode 100644
index 000000000..27679aead
--- /dev/null
+++ b/10_virtual_mem_part1_identity_mapping/src/common.rs
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! General purpose code.
+
+/// Convert a size into human readable format.
+pub const fn size_human_readable_ceil(size: usize) -> (usize, &'static str) {
+    const KIB: usize = 1024;
+    const MIB: usize = 1024 * 1024;
+    const GIB: usize = 1024 * 1024 * 1024;
+
+    if (size / GIB) > 0 {
+        (size.div_ceil(GIB), "GiB")
+    } else if (size / MIB) > 0 {
+        (size.div_ceil(MIB), "MiB")
+    } else if (size / KIB) > 0 {
+        (size.div_ceil(KIB), "KiB")
+    } else {
+        (size, "Byte")
+    }
+}
diff --git a/10_virtual_mem_part1_identity_mapping/src/main.rs b/10_virtual_mem_part1_identity_mapping/src/main.rs
index 6f92c676b..40b6d13b4 100644
--- a/10_virtual_mem_part1_identity_mapping/src/main.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/main.rs
@@ -111,12 +111,14 @@
 #![feature(asm_const)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
+#![feature(int_roundings)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
 #![no_main]
 #![no_std]
 
 mod bsp;
+mod common;
 mod console;
 mod cpu;
 mod driver;
diff --git a/10_virtual_mem_part1_identity_mapping/src/memory/mmu.rs b/10_virtual_mem_part1_identity_mapping/src/memory/mmu.rs
index 17a98274a..bef4c1d14 100644
--- a/10_virtual_mem_part1_identity_mapping/src/memory/mmu.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/memory/mmu.rs
@@ -20,6 +20,7 @@ mod arch_mmu;
 
 mod translation_table;
 
+use crate::common;
 use core::{fmt, ops::RangeInclusive};
 
 //--------------------------------------------------------------------------------------------------
@@ -179,19 +180,7 @@ impl fmt::Display for TranslationDescriptor {
         let end = *(self.virtual_range)().end();
         let size = end - start + 1;
 
-        // log2(1024).
-        const KIB_RSHIFT: u32 = 10;
-
-        // log2(1024 * 1024).
-        const MIB_RSHIFT: u32 = 20;
-
-        let (size, unit) = if (size >> MIB_RSHIFT) > 0 {
-            (size >> MIB_RSHIFT, "MiB")
-        } else if (size >> KIB_RSHIFT) > 0 {
-            (size >> KIB_RSHIFT, "KiB")
-        } else {
-            (size, "Byte")
-        };
+        let (size, unit) = common::size_human_readable_ceil(size);
 
         let attr = match self.attribute_fields.mem_attributes {
             MemAttributes::CacheableDRAM => "C",
diff --git a/11_exceptions_part1_groundwork/README.md b/11_exceptions_part1_groundwork/README.md
index 355ea2978..d0b4b7f72 100644
--- a/11_exceptions_part1_groundwork/README.md
+++ b/11_exceptions_part1_groundwork/README.md
@@ -421,7 +421,7 @@ Minipush 1.0
 [    0.798530] Booting on: Raspberry Pi 3
 [    0.798985] MMU online. Special regions:
 [    0.799462]       0x00080000 - 0x0008ffff |  64 KiB | C   RO PX  | Kernel code and RO data
-[    0.800480]       0x3f000000 - 0x4000ffff |  16 MiB | Dev RW PXN | Device MMIO
+[    0.800480]       0x3f000000 - 0x4000ffff |  17 MiB | Dev RW PXN | Device MMIO
 [    0.801369] Current privilege level: EL1
 [    0.801845] Exception handling state:
 [    0.802290]       Debug:  Masked
@@ -1024,7 +1024,7 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/exception.rs 11_exceptions_p
 diff -uNr 10_virtual_mem_part1_identity_mapping/src/main.rs 11_exceptions_part1_groundwork/src/main.rs
 --- 10_virtual_mem_part1_identity_mapping/src/main.rs
 +++ 11_exceptions_part1_groundwork/src/main.rs
-@@ -140,6 +140,8 @@
+@@ -142,6 +142,8 @@
      use driver::interface::DriverManager;
      use memory::mmu::interface::MMU;
 
@@ -1033,7 +1033,7 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/main.rs 11_exceptions_part1_
      if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
          panic!("MMU: {}", string);
      }
-@@ -158,7 +160,7 @@
+@@ -160,7 +162,7 @@
 
  /// The main function running after the early init.
  fn kernel_main() -> ! {
@@ -1042,7 +1042,7 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/main.rs 11_exceptions_part1_
      use core::time::Duration;
      use driver::interface::DriverManager;
      use time::interface::TimeManager;
-@@ -196,13 +198,28 @@
+@@ -198,13 +200,28 @@
      info!("Timer test, spinning for 1 second");
      time::time_manager().spin_for(Duration::from_secs(1));
 
diff --git a/11_exceptions_part1_groundwork/src/common.rs b/11_exceptions_part1_groundwork/src/common.rs
new file mode 100644
index 000000000..27679aead
--- /dev/null
+++ b/11_exceptions_part1_groundwork/src/common.rs
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! General purpose code.
+
+/// Convert a size into human readable format.
+pub const fn size_human_readable_ceil(size: usize) -> (usize, &'static str) {
+    const KIB: usize = 1024;
+    const MIB: usize = 1024 * 1024;
+    const GIB: usize = 1024 * 1024 * 1024;
+
+    if (size / GIB) > 0 {
+        (size.div_ceil(GIB), "GiB")
+    } else if (size / MIB) > 0 {
+        (size.div_ceil(MIB), "MiB")
+    } else if (size / KIB) > 0 {
+        (size.div_ceil(KIB), "KiB")
+    } else {
+        (size, "Byte")
+    }
+}
diff --git a/11_exceptions_part1_groundwork/src/main.rs b/11_exceptions_part1_groundwork/src/main.rs
index 12386153f..585382a56 100644
--- a/11_exceptions_part1_groundwork/src/main.rs
+++ b/11_exceptions_part1_groundwork/src/main.rs
@@ -111,12 +111,14 @@
 #![feature(asm_const)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
+#![feature(int_roundings)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
 #![no_main]
 #![no_std]
 
 mod bsp;
+mod common;
 mod console;
 mod cpu;
 mod driver;
diff --git a/11_exceptions_part1_groundwork/src/memory/mmu.rs b/11_exceptions_part1_groundwork/src/memory/mmu.rs
index 17a98274a..bef4c1d14 100644
--- a/11_exceptions_part1_groundwork/src/memory/mmu.rs
+++ b/11_exceptions_part1_groundwork/src/memory/mmu.rs
@@ -20,6 +20,7 @@ mod arch_mmu;
 
 mod translation_table;
 
+use crate::common;
 use core::{fmt, ops::RangeInclusive};
 
 //--------------------------------------------------------------------------------------------------
@@ -179,19 +180,7 @@ impl fmt::Display for TranslationDescriptor {
         let end = *(self.virtual_range)().end();
         let size = end - start + 1;
 
-        // log2(1024).
-        const KIB_RSHIFT: u32 = 10;
-
-        // log2(1024 * 1024).
-        const MIB_RSHIFT: u32 = 20;
-
-        let (size, unit) = if (size >> MIB_RSHIFT) > 0 {
-            (size >> MIB_RSHIFT, "MiB")
-        } else if (size >> KIB_RSHIFT) > 0 {
-            (size >> KIB_RSHIFT, "KiB")
-        } else {
-            (size, "Byte")
-        };
+        let (size, unit) = common::size_human_readable_ceil(size);
 
         let attr = match self.attribute_fields.mem_attributes {
             MemAttributes::CacheableDRAM => "C",
diff --git a/12_integrated_testing/kernel/src/common.rs b/12_integrated_testing/kernel/src/common.rs
new file mode 100644
index 000000000..27679aead
--- /dev/null
+++ b/12_integrated_testing/kernel/src/common.rs
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! General purpose code.
+
+/// Convert a size into human readable format.
+pub const fn size_human_readable_ceil(size: usize) -> (usize, &'static str) {
+    const KIB: usize = 1024;
+    const MIB: usize = 1024 * 1024;
+    const GIB: usize = 1024 * 1024 * 1024;
+
+    if (size / GIB) > 0 {
+        (size.div_ceil(GIB), "GiB")
+    } else if (size / MIB) > 0 {
+        (size.div_ceil(MIB), "MiB")
+    } else if (size / KIB) > 0 {
+        (size.div_ceil(KIB), "KiB")
+    } else {
+        (size, "Byte")
+    }
+}
diff --git a/12_integrated_testing/kernel/src/lib.rs b/12_integrated_testing/kernel/src/lib.rs
index eef112f09..4a41bbfe7 100644
--- a/12_integrated_testing/kernel/src/lib.rs
+++ b/12_integrated_testing/kernel/src/lib.rs
@@ -113,6 +113,7 @@
 #![feature(asm_const)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
+#![feature(int_roundings)]
 #![feature(linkage)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
@@ -127,6 +128,7 @@ mod panic_wait;
 mod synchronization;
 
 pub mod bsp;
+pub mod common;
 pub mod console;
 pub mod cpu;
 pub mod driver;
diff --git a/12_integrated_testing/kernel/src/memory/mmu.rs b/12_integrated_testing/kernel/src/memory/mmu.rs
index a68973e7e..b313d7d40 100644
--- a/12_integrated_testing/kernel/src/memory/mmu.rs
+++ b/12_integrated_testing/kernel/src/memory/mmu.rs
@@ -20,6 +20,7 @@ mod arch_mmu;
 
 mod translation_table;
 
+use crate::common;
 use core::{fmt, ops::RangeInclusive};
 
 //--------------------------------------------------------------------------------------------------
@@ -178,19 +179,7 @@ impl fmt::Display for TranslationDescriptor {
         let end = *(self.virtual_range)().end();
         let size = end - start + 1;
 
-        // log2(1024).
-        const KIB_RSHIFT: u32 = 10;
-
-        // log2(1024 * 1024).
-        const MIB_RSHIFT: u32 = 20;
-
-        let (size, unit) = if (size >> MIB_RSHIFT) > 0 {
-            (size >> MIB_RSHIFT, "MiB")
-        } else if (size >> KIB_RSHIFT) > 0 {
-            (size >> KIB_RSHIFT, "KiB")
-        } else {
-            (size, "Byte")
-        };
+        let (size, unit) = common::size_human_readable_ceil(size);
 
         let attr = match self.attribute_fields.mem_attributes {
             MemAttributes::CacheableDRAM => "C",
diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index bc468be8d..e2e2e1690 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -682,7 +682,7 @@ Minipush 1.0
 [    0.822700] Booting on: Raspberry Pi 3
 [    0.823155] MMU online. Special regions:
 [    0.823632]       0x00080000 - 0x0008ffff |  64 KiB | C   RO PX  | Kernel code and RO data
-[    0.824650]       0x3f000000 - 0x4000ffff |  16 MiB | Dev RW PXN | Device MMIO
+[    0.824650]       0x3f000000 - 0x4000ffff |  17 MiB | Dev RW PXN | Device MMIO
 [    0.825539] Current privilege level: EL1
 [    0.826015] Exception handling state:
 [    0.826459]       Debug:  Masked
@@ -726,7 +726,7 @@ Minipush 1.0
 [    0.886886] Booting on: Raspberry Pi 4
 [    0.887341] MMU online. Special regions:
 [    0.887818]       0x00080000 - 0x0008ffff |  64 KiB | C   RO PX  | Kernel code and RO data
-[    0.888836]       0xfe000000 - 0xff84ffff |  24 MiB | Dev RW PXN | Device MMIO
+[    0.888836]       0xfe000000 - 0xff84ffff |  25 MiB | Dev RW PXN | Device MMIO
 [    0.889725] Current privilege level: EL1
 [    0.890201] Exception handling state:
 [    0.890645]       Debug:  Masked
@@ -2407,7 +2407,7 @@ diff -uNr 12_integrated_testing/kernel/src/exception/asynchronous.rs 13_exceptio
 diff -uNr 12_integrated_testing/kernel/src/lib.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
 --- 12_integrated_testing/kernel/src/lib.rs
 +++ 13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
-@@ -133,6 +133,7 @@
+@@ -135,6 +135,7 @@
  pub mod exception;
  pub mod memory;
  pub mod print;
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/common.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/common.rs
new file mode 100644
index 000000000..27679aead
--- /dev/null
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/common.rs
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! General purpose code.
+
+/// Convert a size into human readable format.
+pub const fn size_human_readable_ceil(size: usize) -> (usize, &'static str) {
+    const KIB: usize = 1024;
+    const MIB: usize = 1024 * 1024;
+    const GIB: usize = 1024 * 1024 * 1024;
+
+    if (size / GIB) > 0 {
+        (size.div_ceil(GIB), "GiB")
+    } else if (size / MIB) > 0 {
+        (size.div_ceil(MIB), "MiB")
+    } else if (size / KIB) > 0 {
+        (size.div_ceil(KIB), "KiB")
+    } else {
+        (size, "Byte")
+    }
+}
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
index c4b078096..6c5bc6b32 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
@@ -113,6 +113,7 @@
 #![feature(asm_const)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
+#![feature(int_roundings)]
 #![feature(linkage)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
@@ -127,6 +128,7 @@ mod panic_wait;
 mod synchronization;
 
 pub mod bsp;
+pub mod common;
 pub mod console;
 pub mod cpu;
 pub mod driver;
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu.rs
index a68973e7e..b313d7d40 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu.rs
@@ -20,6 +20,7 @@ mod arch_mmu;
 
 mod translation_table;
 
+use crate::common;
 use core::{fmt, ops::RangeInclusive};
 
 //--------------------------------------------------------------------------------------------------
@@ -178,19 +179,7 @@ impl fmt::Display for TranslationDescriptor {
         let end = *(self.virtual_range)().end();
         let size = end - start + 1;
 
-        // log2(1024).
-        const KIB_RSHIFT: u32 = 10;
-
-        // log2(1024 * 1024).
-        const MIB_RSHIFT: u32 = 20;
-
-        let (size, unit) = if (size >> MIB_RSHIFT) > 0 {
-            (size >> MIB_RSHIFT, "MiB")
-        } else if (size >> KIB_RSHIFT) > 0 {
-            (size >> KIB_RSHIFT, "KiB")
-        } else {
-            (size, "Byte")
-        };
+        let (size, unit) = common::size_human_readable_ceil(size);
 
         let attr = match self.attribute_fields.mem_attributes {
             MemAttributes::CacheableDRAM => "C",
diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index b5caac520..be0997ac5 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -2053,13 +2053,10 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi.rs 14_v
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/common.rs 14_virtual_mem_part2_mmio_remap/kernel/src/common.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/common.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/src/common.rs
-@@ -0,0 +1,29 @@
-+// SPDX-License-Identifier: MIT OR Apache-2.0
-+//
-+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
-+
-+//! General purpose code.
-+
+@@ -4,6 +4,30 @@
+
+ //! General purpose code.
+
 +/// Check if a value is aligned to a given size.
 +#[inline(always)]
 +pub const fn is_aligned(value: usize, alignment: usize) -> bool {
@@ -2083,6 +2080,10 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/common.rs 14_virtual_me
 +
 +    (value + alignment - 1) & !(alignment - 1)
 +}
++
+ /// Convert a size into human readable format.
+ pub const fn size_human_readable_ceil(size: usize) -> (usize, &'static str) {
+     const KIB: usize = 1024;
 
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/console/null_console.rs 14_virtual_mem_part2_mmio_remap/kernel/src/console/null_console.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/console/null_console.rs
@@ -2110,7 +2111,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/console/null_console.rs
 +pub static NULL_CONSOLE: NullConsole = NullConsole {};
 +
 +//--------------------------------------------------------------------------------------------------
-+// Private Code
++// Public Code
 +//--------------------------------------------------------------------------------------------------
 +
 +impl interface::Write for NullConsole {
@@ -2323,11 +2324,12 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs 14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
-@@ -113,8 +113,11 @@
+@@ -113,9 +113,12 @@
  #![feature(asm_const)]
  #![feature(core_intrinsics)]
  #![feature(format_args_nl)]
 +#![feature(generic_const_exprs)]
+ #![feature(int_roundings)]
 +#![feature(is_sorted)]
  #![feature(linkage)]
  #![feature(panic_info_message)]
@@ -2335,15 +2337,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs 14_virtual_mem_p
  #![feature(trait_alias)]
  #![no_std]
  // Testing
-@@ -127,6 +130,7 @@
- mod synchronization;
-
- pub mod bsp;
-+pub mod common;
- pub mod console;
- pub mod cpu;
- pub mod driver;
-@@ -181,7 +185,20 @@
+@@ -183,6 +186,17 @@
      use driver::interface::DriverManager;
 
      exception::handling_init();
@@ -2356,19 +2350,16 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs 14_virtual_mem_p
 +    if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
 +        panic!("Enabling MMU failed: {}", e);
 +    }
-+    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
 +
 +    memory::mmu::post_enable_init();
      bsp::driver::driver_manager().qemu_bring_up_console();
-+    // Printing available again from here on.
 
      test_main();
 
-
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs 14_virtual_mem_part2_mmio_remap/kernel/src/main.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/src/main.rs
-@@ -27,21 +27,31 @@
+@@ -27,21 +27,29 @@
  #[no_mangle]
  unsafe fn kernel_init() -> ! {
      use driver::interface::DriverManager;
@@ -2386,10 +2377,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs 14_virtual_mem_
 +    if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
 +        panic!("Enabling MMU failed: {}", e);
      }
-+    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
-+
-+    memory::mmu::post_enable_init();
 
++    memory::mmu::post_enable_init();
++
 +    // Instantiate and init all device drivers.
 +    if let Err(x) = bsp::driver::driver_manager().instantiate_drivers() {
 +        panic!("Error instantiating drivers: {}", x);
@@ -2401,11 +2391,10 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs 14_virtual_mem_
      }
 -    bsp::driver::driver_manager().post_device_driver_init();
 -    // println! is usable from here on.
-+    // Printing available again from here on.
 
      // Let device drivers register and enable their handlers with the interrupt controller.
      for i in bsp::driver::driver_manager().all_device_drivers() {
-@@ -63,13 +73,12 @@
+@@ -63,13 +71,12 @@
  /// The main function running after the early init.
  fn kernel_main() -> ! {
      use driver::interface::DriverManager;
@@ -2421,7 +2410,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs 14_virtual_mem_
 
      let (_, privilege_level) = exception::current_privilege_level();
      info!("Current privilege level: {}", privilege_level);
-@@ -92,7 +101,7 @@
+@@ -92,7 +99,7 @@
      }
 
      info!("Registered IRQ handlers:");
@@ -2434,7 +2423,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs 14_virtual_mem_
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/mapping_record.rs 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/mapping_record.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/mapping_record.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/mapping_record.rs
-@@ -0,0 +1,249 @@
+@@ -0,0 +1,239 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
@@ -2445,7 +2434,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/mapping_reco
 +    AccessPermissions, Address, AttributeFields, MMIODescriptor, MemAttributes, MemoryRegion,
 +    Physical, Virtual,
 +};
-+use crate::{bsp, info, synchronization, synchronization::InitStateLock, warn};
++use crate::{bsp, common, info, synchronization, synchronization::InitStateLock, warn};
 +
 +//--------------------------------------------------------------------------------------------------
 +// Private Definitions
@@ -2578,9 +2567,6 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/mapping_reco
 +    }
 +
 +    pub fn print(&self) {
-+        const KIB_RSHIFT: u32 = 10; // log2(1024).
-+        const MIB_RSHIFT: u32 = 20; // log2(1024 * 1024).
-+
 +        info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
 +        info!(
 +            "      {:^44}     {:^30}   {:^7}   {:^9}   {:^35}",
@@ -2595,13 +2581,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/mapping_reco
 +            let phys_start = i.phys_start_addr;
 +            let phys_end_inclusive = phys_start + (size - 1);
 +
-+            let (size, unit) = if (size >> MIB_RSHIFT) > 0 {
-+                (size >> MIB_RSHIFT, "MiB")
-+            } else if (size >> KIB_RSHIFT) > 0 {
-+                (size >> KIB_RSHIFT, "KiB")
-+            } else {
-+                (size, "Byte")
-+            };
++            let (size, unit) = common::size_human_readable_ceil(size);
 +
 +            let attr = match i.attribute_fields.mem_attributes {
 +                MemAttributes::CacheableDRAM => "C",
@@ -2620,8 +2600,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/mapping_reco
 +            };
 +
 +            info!(
-+                "      {}..{} --> {}..{} | \
-+                        {: >3} {} | {: <3} {} {: <2} | {}",
++                "      {}..{} --> {}..{} | {:>3} {} | {:<3} {} {:<2} | {}",
 +                virt_start,
 +                virt_end_inclusive,
 +                phys_start,
@@ -2735,7 +2714,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/page_alloc.r
 +    }
 +
 +    /// Initialize the allocator.
-+    pub fn initialize(&mut self, pool: MemoryRegion<ATYPE>) {
++    pub fn init(&mut self, pool: MemoryRegion<ATYPE>) {
 +        if self.pool.is_some() {
 +            warn!("Already initialized");
 +            return;
@@ -3238,7 +3217,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/types.rs 14_
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu.rs 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu.rs
-@@ -3,29 +3,24 @@
+@@ -3,30 +3,24 @@
  // Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
  //! Memory Management Unit.
@@ -3262,6 +3241,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu.rs 14_virtua
  mod translation_table;
 +mod types;
 
+-use crate::common;
 -use core::{fmt, ops::RangeInclusive};
 +use crate::{
 +    bsp,
@@ -3278,7 +3258,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu.rs 14_virtua
 
  //--------------------------------------------------------------------------------------------------
  // Public Definitions
-@@ -45,13 +40,15 @@
+@@ -46,13 +40,15 @@
 
      /// MMU functions.
      pub trait MMU {
@@ -3297,7 +3277,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu.rs 14_virtua
 
          /// Returns true if the MMU is enabled, false otherwise.
          fn is_enabled(&self) -> bool;
-@@ -64,55 +61,51 @@
+@@ -65,55 +61,51 @@
  /// Describes properties of an address space.
  pub struct AddressSpace<const AS_SIZE: usize>;
 
@@ -3360,7 +3340,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu.rs 14_virtua
 +fn kernel_init_mmio_va_allocator() {
 +    let region = bsp::memory::mmu::virt_mmio_remap_region();
 +
-+    page_alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.initialize(region));
++    page_alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.init(region));
 +}
 +
 +/// Map a region in the kernel's translation tables.
@@ -3394,7 +3374,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu.rs 14_virtua
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -132,6 +125,9 @@
+@@ -133,6 +125,9 @@
      /// The granule's size.
      pub const SIZE: usize = Self::size_checked();
 
@@ -3404,7 +3384,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu.rs 14_virtua
      /// The granule's shift, aka log2(size).
      pub const SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
 
-@@ -159,110 +155,147 @@
+@@ -160,98 +155,147 @@
      }
  }
 
@@ -3443,31 +3423,42 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu.rs 14_virtua
 -        let end = *(self.virtual_range)().end();
 -        let size = end - start + 1;
 -
--        // log2(1024).
--        const KIB_RSHIFT: u32 = 10;
--
--        // log2(1024 * 1024).
--        const MIB_RSHIFT: u32 = 20;
+-        let (size, unit) = common::size_human_readable_ceil(size);
 -
--        let (size, unit) = if (size >> MIB_RSHIFT) > 0 {
--            (size >> MIB_RSHIFT, "MiB")
--        } else if (size >> KIB_RSHIFT) > 0 {
--            (size >> KIB_RSHIFT, "KiB")
--        } else {
--            (size, "Byte")
--        };
-+    kernel_map_at_unchecked(name, virt_region, phys_region, attr)?;
-
 -        let attr = match self.attribute_fields.mem_attributes {
 -            MemAttributes::CacheableDRAM => "C",
 -            MemAttributes::Device => "Dev",
 -        };
-+    Ok(())
-+}
-
+-
 -        let acc_p = match self.attribute_fields.acc_perms {
 -            AccessPermissions::ReadOnly => "RO",
 -            AccessPermissions::ReadWrite => "RW",
+-        };
++    kernel_map_at_unchecked(name, virt_region, phys_region, attr)?;
+
+-        let xn = if self.attribute_fields.execute_never {
+-            "PXN"
+-        } else {
+-            "PX"
+-        };
+-
+-        write!(
+-            f,
+-            "      {:#010x} - {:#010x} | {: >3} {} | {: <3} {} {: <3} | {}",
+-            start, end, size, unit, attr, acc_p, xn, self.name
+-        )
+-    }
++    Ok(())
+ }
+
+-impl<const NUM_SPECIAL_RANGES: usize> KernelVirtualLayout<{ NUM_SPECIAL_RANGES }> {
+-    /// Create a new instance.
+-    pub const fn new(max: usize, layout: [TranslationDescriptor; NUM_SPECIAL_RANGES]) -> Self {
+-        Self {
+-            max_virt_addr_inclusive: max,
+-            inner: layout,
+-        }
+-    }
 +/// MMIO remapping in the kernel translation tables.
 +///
 +/// Typically used by device drivers.
@@ -3492,22 +3483,29 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu.rs 14_virtua
 +        let num_pages = match NonZeroUsize::new(phys_region.num_pages()) {
 +            None => return Err("Requested 0 pages"),
 +            Some(x) => x,
-         };
++        };
 
--        let xn = if self.attribute_fields.execute_never {
--            "PXN"
--        } else {
--            "PX"
--        };
+-    /// For a virtual address, find and return the physical output address and corresponding
+-    /// attributes.
+-    ///
+-    /// If the address is not found in `inner`, return an identity mapped default with normal
+-    /// cacheable DRAM attributes.
+-    pub fn virt_addr_properties(
+-        &self,
+-        virt_addr: usize,
+-    ) -> Result<(usize, AttributeFields), &'static str> {
+-        if virt_addr > self.max_virt_addr_inclusive {
+-            return Err("Address out of range");
+-        }
 +        let virt_region =
 +            page_alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.alloc(num_pages))?;
 
--        write!(
--            f,
--            "      {:#010x} - {:#010x} | {: >3} {} | {: <3} {} {: <3} | {}",
--            start, end, size, unit, attr, acc_p, xn, self.name
--        )
--    }
+-        for i in self.inner.iter() {
+-            if (i.virtual_range)().contains(&virt_addr) {
+-                let output_addr = match i.physical_range_translation {
+-                    Translation::Identity => virt_addr,
+-                    Translation::Offset(a) => a + (virt_addr - (i.virtual_range)().start()),
+-                };
 +        kernel_map_at_unchecked(
 +            name,
 +            &virt_region,
@@ -3561,37 +3559,8 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu.rs 14_virtua
 +/// Human-readable print of all recorded kernel mappings.
 +pub fn kernel_print_mappings() {
 +    mapping_record::kernel_print()
- }
++}
 
--impl<const NUM_SPECIAL_RANGES: usize> KernelVirtualLayout<{ NUM_SPECIAL_RANGES }> {
--    /// Create a new instance.
--    pub const fn new(max: usize, layout: [TranslationDescriptor; NUM_SPECIAL_RANGES]) -> Self {
--        Self {
--            max_virt_addr_inclusive: max,
--            inner: layout,
--        }
--    }
--
--    /// For a virtual address, find and return the physical output address and corresponding
--    /// attributes.
--    ///
--    /// If the address is not found in `inner`, return an identity mapped default with normal
--    /// cacheable DRAM attributes.
--    pub fn virt_addr_properties(
--        &self,
--        virt_addr: usize,
--    ) -> Result<(usize, AttributeFields), &'static str> {
--        if virt_addr > self.max_virt_addr_inclusive {
--            return Err("Address out of range");
--        }
--
--        for i in self.inner.iter() {
--            if (i.virtual_range)().contains(&virt_addr) {
--                let output_addr = match i.physical_range_translation {
--                    Translation::Identity => virt_addr,
--                    Translation::Offset(a) => a + (virt_addr - (i.virtual_range)().start()),
--                };
--
 -                return Ok((output_addr, i.attribute_fields));
 -            }
 -        }
@@ -3825,7 +3794,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/tests/00_console_sanity.rs
 
  #[no_mangle]
  unsafe fn kernel_init() -> ! {
-@@ -19,7 +19,20 @@
+@@ -19,6 +19,17 @@
      use driver::interface::DriverManager;
 
      exception::handling_init();
@@ -3838,14 +3807,11 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/tests/00_console_sanity.rs
 +    if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
 +        panic!("Enabling MMU failed: {}", e);
 +    }
-+    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
 +
 +    memory::mmu::post_enable_init();
      bsp::driver::driver_manager().qemu_bring_up_console();
-+    // Printing available again from here on.
 
      // Handshake
-     assert_eq!(console().read_char(), 'A');
 
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/tests/01_timer_sanity.rs 14_virtual_mem_part2_mmio_remap/kernel/tests/01_timer_sanity.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/tests/01_timer_sanity.rs
@@ -3859,7 +3825,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/tests/01_timer_sanity.rs 14
  use test_macros::kernel_test;
 
  #[no_mangle]
-@@ -19,7 +19,20 @@
+@@ -19,6 +19,17 @@
      use driver::interface::DriverManager;
 
      exception::handling_init();
@@ -3872,19 +3838,16 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/tests/01_timer_sanity.rs 14
 +    if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
 +        panic!("Enabling MMU failed: {}", e);
 +    }
-+    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
 +
 +    memory::mmu::post_enable_init();
      bsp::driver::driver_manager().qemu_bring_up_console();
-+    // Printing available again from here on.
 
      // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
 
-
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/tests/02_exception_sync_page_fault.rs 14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fault.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/tests/02_exception_sync_page_fault.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fault.rs
-@@ -22,18 +22,29 @@
+@@ -22,19 +22,28 @@
  #[no_mangle]
  unsafe fn kernel_init() -> ! {
      use driver::interface::DriverManager;
@@ -3910,19 +3873,18 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/tests/02_exception_sync_pag
 +        info!("Enabling MMU failed: {}", e);
          cpu::qemu_exit_failure()
      }
-+    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
-+
+
 +    memory::mmu::post_enable_init();
 +    bsp::driver::driver_manager().qemu_bring_up_console();
-+    // Printing available again from here on.
-
++
      info!("Writing beyond mapped area to address 9 GiB...");
      let big_addr: u64 = 9 * 1024 * 1024 * 1024;
+     core::ptr::read_volatile(big_addr as *mut u64);
 
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/tests/03_exception_restore_sanity.rs 14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/tests/03_exception_restore_sanity.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rs
-@@ -31,18 +31,29 @@
+@@ -31,19 +31,28 @@
  #[no_mangle]
  unsafe fn kernel_init() -> ! {
      use driver::interface::DriverManager;
@@ -3948,19 +3910,18 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/tests/03_exception_restore_
 +        info!("Enabling MMU failed: {}", e);
          cpu::qemu_exit_failure()
      }
-+    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
-+
+
 +    memory::mmu::post_enable_init();
 +    bsp::driver::driver_manager().qemu_bring_up_console();
-+    // Printing available again from here on.
-
++
      info!("Making a dummy system call");
 
+     // Calling this inside a function indirectly tests if the link register is restored properly.
 
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/tests/04_exception_irq_sanity.rs 14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/tests/04_exception_irq_sanity.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.rs
-@@ -10,15 +10,29 @@
+@@ -10,15 +10,27 @@
  #![reexport_test_harness_main = "test_main"]
  #![test_runner(libkernel::test_runner)]
 
@@ -3983,11 +3944,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/tests/04_exception_irq_sani
 +    if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
 +        panic!("Enabling MMU failed: {}", e);
 +    }
-+    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
 +
 +    memory::mmu::post_enable_init();
 +    bsp::driver::driver_manager().qemu_bring_up_console();
-+    // Printing available again from here on.
 +
      exception::asynchronous::local_irq_unmask();
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/common.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/common.rs
index 678f4a6c6..f32f650fb 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/common.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/common.rs
@@ -27,3 +27,20 @@ pub const fn align_up(value: usize, alignment: usize) -> usize {
 
     (value + alignment - 1) & !(alignment - 1)
 }
+
+/// Convert a size into human readable format.
+pub const fn size_human_readable_ceil(size: usize) -> (usize, &'static str) {
+    const KIB: usize = 1024;
+    const MIB: usize = 1024 * 1024;
+    const GIB: usize = 1024 * 1024 * 1024;
+
+    if (size / GIB) > 0 {
+        (size.div_ceil(GIB), "GiB")
+    } else if (size / MIB) > 0 {
+        (size.div_ceil(MIB), "MiB")
+    } else if (size / KIB) > 0 {
+        (size.div_ceil(KIB), "KiB")
+    } else {
+        (size, "Byte")
+    }
+}
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/console/null_console.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/console/null_console.rs
index 10c3bedc0..2c64d499c 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/console/null_console.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/console/null_console.rs
@@ -20,7 +20,7 @@ pub struct NullConsole;
 pub static NULL_CONSOLE: NullConsole = NullConsole {};
 
 //--------------------------------------------------------------------------------------------------
-// Private Code
+// Public Code
 //--------------------------------------------------------------------------------------------------
 
 impl interface::Write for NullConsole {
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
index ac57da95f..c40cb4e7b 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
@@ -114,6 +114,7 @@
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(generic_const_exprs)]
+#![feature(int_roundings)]
 #![feature(is_sorted)]
 #![feature(linkage)]
 #![feature(panic_info_message)]
@@ -194,11 +195,9 @@ unsafe fn kernel_init() -> ! {
     if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
         panic!("Enabling MMU failed: {}", e);
     }
-    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
 
     memory::mmu::post_enable_init();
     bsp::driver::driver_manager().qemu_bring_up_console();
-    // Printing available again from here on.
 
     test_main();
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/main.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/main.rs
index 7574522c7..776b28fa6 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/main.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/main.rs
@@ -38,7 +38,6 @@ unsafe fn kernel_init() -> ! {
     if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
         panic!("Enabling MMU failed: {}", e);
     }
-    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
 
     memory::mmu::post_enable_init();
 
@@ -51,7 +50,6 @@ unsafe fn kernel_init() -> ! {
             panic!("Error loading driver: {}: {}", i.compatible(), x);
         }
     }
-    // Printing available again from here on.
 
     // Let device drivers register and enable their handlers with the interrupt controller.
     for i in bsp::driver::driver_manager().all_device_drivers() {
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu.rs
index 436024700..bd1f56ff2 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu.rs
@@ -81,7 +81,7 @@ use translation_table::interface::TranslationTable;
 fn kernel_init_mmio_va_allocator() {
     let region = bsp::memory::mmu::virt_mmio_remap_region();
 
-    page_alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.initialize(region));
+    page_alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.init(region));
 }
 
 /// Map a region in the kernel's translation tables.
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/mapping_record.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/mapping_record.rs
index 7d3a6c601..5bc32445b 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/mapping_record.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/mapping_record.rs
@@ -8,7 +8,7 @@ use super::{
     AccessPermissions, Address, AttributeFields, MMIODescriptor, MemAttributes, MemoryRegion,
     Physical, Virtual,
 };
-use crate::{bsp, info, synchronization, synchronization::InitStateLock, warn};
+use crate::{bsp, common, info, synchronization, synchronization::InitStateLock, warn};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -141,9 +141,6 @@ impl MappingRecord {
     }
 
     pub fn print(&self) {
-        const KIB_RSHIFT: u32 = 10; // log2(1024).
-        const MIB_RSHIFT: u32 = 20; // log2(1024 * 1024).
-
         info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
         info!(
             "      {:^44}     {:^30}   {:^7}   {:^9}   {:^35}",
@@ -158,13 +155,7 @@ impl MappingRecord {
             let phys_start = i.phys_start_addr;
             let phys_end_inclusive = phys_start + (size - 1);
 
-            let (size, unit) = if (size >> MIB_RSHIFT) > 0 {
-                (size >> MIB_RSHIFT, "MiB")
-            } else if (size >> KIB_RSHIFT) > 0 {
-                (size >> KIB_RSHIFT, "KiB")
-            } else {
-                (size, "Byte")
-            };
+            let (size, unit) = common::size_human_readable_ceil(size);
 
             let attr = match i.attribute_fields.mem_attributes {
                 MemAttributes::CacheableDRAM => "C",
@@ -183,8 +174,7 @@ impl MappingRecord {
             };
 
             info!(
-                "      {}..{} --> {}..{} | \
-                        {: >3} {} | {: <3} {} {: <2} | {}",
+                "      {}..{} --> {}..{} | {:>3} {} | {:<3} {} {:<2} | {}",
                 virt_start,
                 virt_end_inclusive,
                 phys_start,
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/page_alloc.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/page_alloc.rs
index b4c4232c9..347fcd343 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/page_alloc.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/page_alloc.rs
@@ -44,7 +44,7 @@ impl<ATYPE: AddressType> PageAllocator<ATYPE> {
     }
 
     /// Initialize the allocator.
-    pub fn initialize(&mut self, pool: MemoryRegion<ATYPE>) {
+    pub fn init(&mut self, pool: MemoryRegion<ATYPE>) {
         if self.pool.is_some() {
             warn!("Already initialized");
             return;
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rs b/14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rs
index a2338d2f7..9c6e9cefa 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rs
@@ -28,11 +28,9 @@ unsafe fn kernel_init() -> ! {
     if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
         panic!("Enabling MMU failed: {}", e);
     }
-    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
 
     memory::mmu::post_enable_init();
     bsp::driver::driver_manager().qemu_bring_up_console();
-    // Printing available again from here on.
 
     // Handshake
     assert_eq!(console().read_char(), 'A');
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/tests/01_timer_sanity.rs b/14_virtual_mem_part2_mmio_remap/kernel/tests/01_timer_sanity.rs
index 4b4e90e46..dc3337e29 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/tests/01_timer_sanity.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/tests/01_timer_sanity.rs
@@ -28,11 +28,9 @@ unsafe fn kernel_init() -> ! {
     if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
         panic!("Enabling MMU failed: {}", e);
     }
-    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
 
     memory::mmu::post_enable_init();
     bsp::driver::driver_manager().qemu_bring_up_console();
-    // Printing available again from here on.
 
     // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fault.rs b/14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fault.rs
index 209517ac6..594ffb401 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fault.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fault.rs
@@ -40,11 +40,9 @@ unsafe fn kernel_init() -> ! {
         info!("Enabling MMU failed: {}", e);
         cpu::qemu_exit_failure()
     }
-    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
 
     memory::mmu::post_enable_init();
     bsp::driver::driver_manager().qemu_bring_up_console();
-    // Printing available again from here on.
 
     info!("Writing beyond mapped area to address 9 GiB...");
     let big_addr: u64 = 9 * 1024 * 1024 * 1024;
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rs b/14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rs
index babc31e2a..32001b2a7 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rs
@@ -49,11 +49,9 @@ unsafe fn kernel_init() -> ! {
         info!("Enabling MMU failed: {}", e);
         cpu::qemu_exit_failure()
     }
-    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
 
     memory::mmu::post_enable_init();
     bsp::driver::driver_manager().qemu_bring_up_console();
-    // Printing available again from here on.
 
     info!("Making a dummy system call");
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.rs b/14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.rs
index 872cc0080..7a3448748 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.rs
@@ -27,11 +27,9 @@ unsafe fn kernel_init() -> ! {
     if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
         panic!("Enabling MMU failed: {}", e);
     }
-    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
 
     memory::mmu::post_enable_init();
     bsp::driver::driver_manager().qemu_bring_up_console();
-    // Printing available again from here on.
 
     exception::asynchronous::local_irq_unmask();
 
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index 5a07f34b6..186acc2a6 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -1315,7 +1315,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/memory/mmu.
 diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs 15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs
 --- 14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
 +++ 15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs
-@@ -185,20 +185,8 @@
+@@ -186,17 +186,7 @@
      use driver::interface::DriverManager;
 
      exception::handling_init();
@@ -1328,19 +1328,17 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs 15_virtual_mem_part3
 -    if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
 -        panic!("Enabling MMU failed: {}", e);
 -    }
--    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
 -
-     memory::mmu::post_enable_init();
+-    memory::mmu::post_enable_init();
++    memory::init();
      bsp::driver::driver_manager().qemu_bring_up_console();
--    // Printing available again from here on.
 
      test_main();
 
-
 diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/main.rs 15_virtual_mem_part3_precomputed_tables/kernel/src/main.rs
 --- 14_virtual_mem_part2_mmio_remap/kernel/src/main.rs
 +++ 15_virtual_mem_part3_precomputed_tables/kernel/src/main.rs
-@@ -17,29 +17,17 @@
+@@ -17,29 +17,18 @@
 
  /// Early init code.
  ///
@@ -1368,20 +1366,13 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/main.rs 15_virtual_mem_part
 -    if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
 -        panic!("Enabling MMU failed: {}", e);
 -    }
--    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
 -
-     memory::mmu::post_enable_init();
+-    memory::mmu::post_enable_init();
++    memory::init();
 
      // Instantiate and init all device drivers.
-@@ -51,7 +39,6 @@
-             panic!("Error loading driver: {}: {}", i.compatible(), x);
-         }
-     }
--    // Printing available again from here on.
-
-     // Let device drivers register and enable their handlers with the interrupt controller.
-     for i in bsp::driver::driver_manager().all_device_drivers() {
-@@ -60,6 +47,8 @@
+     if let Err(x) = bsp::driver::driver_manager().instantiate_drivers() {
+@@ -58,6 +47,8 @@
          }
      }
 
@@ -1494,7 +1485,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu.rs 15_virtual_me
  };
  use core::{fmt, num::NonZeroUsize};
 
-@@ -73,7 +74,7 @@
+@@ -73,17 +74,9 @@
  // Private Code
  //--------------------------------------------------------------------------------------------------
  use interface::MMU;
@@ -1502,8 +1493,18 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu.rs 15_virtual_me
 +use synchronization::interface::ReadWriteEx;
  use translation_table::interface::TranslationTable;
 
- /// Query the BSP for the reserved virtual addresses for MMIO remapping and initialize the kernel's
-@@ -101,13 +102,21 @@
+-/// Query the BSP for the reserved virtual addresses for MMIO remapping and initialize the kernel's
+-/// MMIO VA allocator with it.
+-fn kernel_init_mmio_va_allocator() {
+-    let region = bsp::memory::mmu::virt_mmio_remap_region();
+-
+-    page_alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.init(region));
+-}
+-
+ /// Map a region in the kernel's translation tables.
+ ///
+ /// No input checks done, input is passed through to the architectural implementation.
+@@ -101,13 +94,21 @@
      bsp::memory::mmu::kernel_translation_tables()
          .write(|tables| tables.map_at(virt_region, phys_region, attr))?;
 
@@ -1528,7 +1529,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu.rs 15_virtual_me
  //--------------------------------------------------------------------------------------------------
  // Public Code
  //--------------------------------------------------------------------------------------------------
-@@ -155,27 +164,16 @@
+@@ -155,27 +156,24 @@
      }
  }
 
@@ -1541,6 +1542,14 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu.rs 15_virtual_me
 -/// - See `kernel_map_at_unchecked()`.
 -/// - Does not prevent aliasing. Currently, the callers must be trusted.
 -pub unsafe fn kernel_map_at(
++/// Query the BSP for the reserved virtual addresses for MMIO remapping and initialize the kernel's
++/// MMIO VA allocator with it.
++pub fn kernel_init_mmio_va_allocator() {
++    let region = bsp::memory::mmu::virt_mmio_remap_region();
++
++    page_alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.init(region));
++}
++
 +/// Add an entry to the mapping info record.
 +pub fn kernel_add_mapping_record(
      name: &'static str,
@@ -1561,15 +1570,15 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu.rs 15_virtual_me
  }
 
  /// MMIO remapping in the kernel translation tables.
-@@ -224,21 +222,24 @@
+@@ -224,21 +222,29 @@
      Ok(virt_addr + offset_into_start_page)
  }
 
 -/// Map the kernel's binary. Returns the translation table's base address.
+-///
+-/// # Safety
 +/// Try to translate a kernel virtual page address to a physical page address.
  ///
--/// # Safety
--///
 -/// - See [`bsp::memory::mmu::kernel_map_binary()`].
 -pub unsafe fn kernel_map_binary() -> Result<Address<Physical>, &'static str> {
 -    let phys_kernel_tables_base_addr =
@@ -1577,8 +1586,6 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu.rs 15_virtual_me
 -            tables.init();
 -            tables.phys_base_address()
 -        });
--
--    bsp::memory::mmu::kernel_map_binary()?;
 +/// Will only succeed if there exists a valid mapping for the input page.
 +pub fn try_kernel_virt_page_addr_to_phys_page_addr(
 +    virt_page_addr: PageAddress<Virtual>,
@@ -1587,7 +1594,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu.rs 15_virtual_me
 +        .read(|tables| tables.try_virt_page_addr_to_phys_page_addr(virt_page_addr))
 +}
 
--    Ok(phys_kernel_tables_base_addr)
+-    bsp::memory::mmu::kernel_map_binary()?;
 +/// Try to get the attributes of a kernel page.
 +///
 +/// Will only succeed if there exists a valid mapping for the input page.
@@ -1596,10 +1603,16 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu.rs 15_virtual_me
 +) -> Result<AttributeFields, &'static str> {
 +    bsp::memory::mmu::kernel_translation_tables()
 +        .read(|tables| tables.try_page_attributes(virt_page_addr))
++}
+
+-    Ok(phys_kernel_tables_base_addr)
++/// Human-readable print of all recorded kernel mappings.
++pub fn kernel_print_mappings() {
++    mapping_record::kernel_print()
  }
 
  /// Enable the MMU and data + instruction caching.
-@@ -246,6 +247,7 @@
+@@ -246,56 +252,9 @@
  /// # Safety
  ///
  /// - Crucial function during kernel init. Changes the the complete memory view of the processor.
@@ -1607,11 +1620,19 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu.rs 15_virtual_me
  pub unsafe fn enable_mmu_and_caching(
      phys_tables_base_addr: Address<Physical>,
  ) -> Result<(), MMUEnableError> {
-@@ -261,41 +263,3 @@
- pub fn kernel_print_mappings() {
-     mapping_record::kernel_print()
+     arch_mmu::mmu().enable_mmu_and_caching(phys_tables_base_addr)
  }
 -
+-/// Finish initialization of the MMU subsystem.
+-pub fn post_enable_init() {
+-    kernel_init_mmio_va_allocator();
+-}
+-
+-/// Human-readable print of all recorded kernel mappings.
+-pub fn kernel_print_mappings() {
+-    mapping_record::kernel_print()
+-}
+-
 -//--------------------------------------------------------------------------------------------------
 -// Testing
 -//--------------------------------------------------------------------------------------------------
@@ -1650,10 +1671,26 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu.rs 15_virtual_me
 -    }
 -}
 
+diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/memory.rs 15_virtual_mem_part3_precomputed_tables/kernel/src/memory.rs
+--- 14_virtual_mem_part2_mmio_remap/kernel/src/memory.rs
++++ 15_virtual_mem_part3_precomputed_tables/kernel/src/memory.rs
+@@ -136,6 +136,11 @@
+     }
+ }
+
++/// Initialize the memory subsystem.
++pub fn init() {
++    mmu::kernel_init_mmio_va_allocator();
++}
++
+ //--------------------------------------------------------------------------------------------------
+ // Testing
+ //--------------------------------------------------------------------------------------------------
+
 diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rs 15_virtual_mem_part3_precomputed_tables/kernel/tests/00_console_sanity.rs
 --- 14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rs
 +++ 15_virtual_mem_part3_precomputed_tables/kernel/tests/00_console_sanity.rs
-@@ -19,20 +19,8 @@
+@@ -19,17 +19,7 @@
      use driver::interface::DriverManager;
 
      exception::handling_init();
@@ -1666,19 +1703,17 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rs 15_v
 -    if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
 -        panic!("Enabling MMU failed: {}", e);
 -    }
--    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
 -
-     memory::mmu::post_enable_init();
+-    memory::mmu::post_enable_init();
++    memory::init();
      bsp::driver::driver_manager().qemu_bring_up_console();
--    // Printing available again from here on.
 
      // Handshake
-     assert_eq!(console().read_char(), 'A');
 
 diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/01_timer_sanity.rs 15_virtual_mem_part3_precomputed_tables/kernel/tests/01_timer_sanity.rs
 --- 14_virtual_mem_part2_mmio_remap/kernel/tests/01_timer_sanity.rs
 +++ 15_virtual_mem_part3_precomputed_tables/kernel/tests/01_timer_sanity.rs
-@@ -19,20 +19,8 @@
+@@ -19,17 +19,7 @@
      use driver::interface::DriverManager;
 
      exception::handling_init();
@@ -1691,23 +1726,21 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/01_timer_sanity.rs 15_vir
 -    if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
 -        panic!("Enabling MMU failed: {}", e);
 -    }
--    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
 -
-     memory::mmu::post_enable_init();
+-    memory::mmu::post_enable_init();
++    memory::init();
      bsp::driver::driver_manager().qemu_bring_up_console();
--    // Printing available again from here on.
 
      // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
 
-
 diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fault.rs 15_virtual_mem_part3_precomputed_tables/kernel/tests/02_exception_sync_page_fault.rs
 --- 14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fault.rs
 +++ 15_virtual_mem_part3_precomputed_tables/kernel/tests/02_exception_sync_page_fault.rs
-@@ -24,28 +24,12 @@
+@@ -24,26 +24,12 @@
      use driver::interface::DriverManager;
 
      exception::handling_init();
-+    memory::mmu::post_enable_init();
++    memory::init();
 +    bsp::driver::driver_manager().qemu_bring_up_console();
 
      // This line will be printed as the test header.
@@ -1725,11 +1758,9 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fa
 -        info!("Enabling MMU failed: {}", e);
 -        cpu::qemu_exit_failure()
 -    }
--    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
 -
 -    memory::mmu::post_enable_init();
 -    bsp::driver::driver_manager().qemu_bring_up_console();
--    // Printing available again from here on.
 -
      info!("Writing beyond mapped area to address 9 GiB...");
      let big_addr: u64 = 9 * 1024 * 1024 * 1024;
@@ -1738,11 +1769,11 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fa
 diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rs 15_virtual_mem_part3_precomputed_tables/kernel/tests/03_exception_restore_sanity.rs
 --- 14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rs
 +++ 15_virtual_mem_part3_precomputed_tables/kernel/tests/03_exception_restore_sanity.rs
-@@ -33,28 +33,12 @@
+@@ -33,26 +33,12 @@
      use driver::interface::DriverManager;
 
      exception::handling_init();
-+    memory::mmu::post_enable_init();
++    memory::init();
 +    bsp::driver::driver_manager().qemu_bring_up_console();
 
      // This line will be printed as the test header.
@@ -1760,11 +1791,9 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sani
 -        info!("Enabling MMU failed: {}", e);
 -        cpu::qemu_exit_failure()
 -    }
--    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
 -
 -    memory::mmu::post_enable_init();
 -    bsp::driver::driver_manager().qemu_bring_up_console();
--    // Printing available again from here on.
 -
      info!("Making a dummy system call");
 
@@ -1773,7 +1802,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sani
 diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.rs 15_virtual_mem_part3_precomputed_tables/kernel/tests/04_exception_irq_sanity.rs
 --- 14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.rs
 +++ 15_virtual_mem_part3_precomputed_tables/kernel/tests/04_exception_irq_sanity.rs
-@@ -17,22 +17,10 @@
+@@ -17,20 +17,10 @@
  unsafe fn kernel_init() -> ! {
      use driver::interface::DriverManager;
 
@@ -1787,11 +1816,10 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.r
 -    if let Err(e) = memory::mmu::enable_mmu_and_caching(phys_kernel_tables_base_addr) {
 -        panic!("Enabling MMU failed: {}", e);
 -    }
--    // Printing will silently fail from here on, because the driver's MMIO is not remapped yet.
 -
-     memory::mmu::post_enable_init();
+-    memory::mmu::post_enable_init();
++    memory::init();
      bsp::driver::driver_manager().qemu_bring_up_console();
--    // Printing available again from here on.
 
 +    exception::handling_init();
      exception::asynchronous::local_irq_unmask();
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/common.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/common.rs
index 678f4a6c6..f32f650fb 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/common.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/common.rs
@@ -27,3 +27,20 @@ pub const fn align_up(value: usize, alignment: usize) -> usize {
 
     (value + alignment - 1) & !(alignment - 1)
 }
+
+/// Convert a size into human readable format.
+pub const fn size_human_readable_ceil(size: usize) -> (usize, &'static str) {
+    const KIB: usize = 1024;
+    const MIB: usize = 1024 * 1024;
+    const GIB: usize = 1024 * 1024 * 1024;
+
+    if (size / GIB) > 0 {
+        (size.div_ceil(GIB), "GiB")
+    } else if (size / MIB) > 0 {
+        (size.div_ceil(MIB), "MiB")
+    } else if (size / KIB) > 0 {
+        (size.div_ceil(KIB), "KiB")
+    } else {
+        (size, "Byte")
+    }
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/console/null_console.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/console/null_console.rs
index 10c3bedc0..2c64d499c 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/console/null_console.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/console/null_console.rs
@@ -20,7 +20,7 @@ pub struct NullConsole;
 pub static NULL_CONSOLE: NullConsole = NullConsole {};
 
 //--------------------------------------------------------------------------------------------------
-// Private Code
+// Public Code
 //--------------------------------------------------------------------------------------------------
 
 impl interface::Write for NullConsole {
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs
index 1787ce02e..a95778685 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs
@@ -114,6 +114,7 @@
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(generic_const_exprs)]
+#![feature(int_roundings)]
 #![feature(is_sorted)]
 #![feature(linkage)]
 #![feature(panic_info_message)]
@@ -185,7 +186,7 @@ unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
 
     exception::handling_init();
-    memory::mmu::post_enable_init();
+    memory::init();
     bsp::driver::driver_manager().qemu_bring_up_console();
 
     test_main();
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/main.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/main.rs
index 928f12c2f..9aeb44386 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/main.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/main.rs
@@ -28,7 +28,7 @@ unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
 
     exception::handling_init();
-    memory::mmu::post_enable_init();
+    memory::init();
 
     // Instantiate and init all device drivers.
     if let Err(x) = bsp::driver::driver_manager().instantiate_drivers() {
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/memory.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory.rs
index 64d8cf64e..3b6868e7a 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/memory.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory.rs
@@ -136,6 +136,11 @@ impl fmt::Display for Address<Virtual> {
     }
 }
 
+/// Initialize the memory subsystem.
+pub fn init() {
+    mmu::kernel_init_mmio_va_allocator();
+}
+
 //--------------------------------------------------------------------------------------------------
 // Testing
 //--------------------------------------------------------------------------------------------------
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu.rs
index c6461474c..698f2095e 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu.rs
@@ -77,14 +77,6 @@ use interface::MMU;
 use synchronization::interface::ReadWriteEx;
 use translation_table::interface::TranslationTable;
 
-/// Query the BSP for the reserved virtual addresses for MMIO remapping and initialize the kernel's
-/// MMIO VA allocator with it.
-fn kernel_init_mmio_va_allocator() {
-    let region = bsp::memory::mmu::virt_mmio_remap_region();
-
-    page_alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.initialize(region));
-}
-
 /// Map a region in the kernel's translation tables.
 ///
 /// No input checks done, input is passed through to the architectural implementation.
@@ -164,6 +156,14 @@ impl<const AS_SIZE: usize> AddressSpace<AS_SIZE> {
     }
 }
 
+/// Query the BSP for the reserved virtual addresses for MMIO remapping and initialize the kernel's
+/// MMIO VA allocator with it.
+pub fn kernel_init_mmio_va_allocator() {
+    let region = bsp::memory::mmu::virt_mmio_remap_region();
+
+    page_alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.init(region));
+}
+
 /// Add an entry to the mapping info record.
 pub fn kernel_add_mapping_record(
     name: &'static str,
@@ -242,6 +242,11 @@ pub fn try_kernel_page_attributes(
         .read(|tables| tables.try_page_attributes(virt_page_addr))
 }
 
+/// Human-readable print of all recorded kernel mappings.
+pub fn kernel_print_mappings() {
+    mapping_record::kernel_print()
+}
+
 /// Enable the MMU and data + instruction caching.
 ///
 /// # Safety
@@ -253,13 +258,3 @@ pub unsafe fn enable_mmu_and_caching(
 ) -> Result<(), MMUEnableError> {
     arch_mmu::mmu().enable_mmu_and_caching(phys_tables_base_addr)
 }
-
-/// Finish initialization of the MMU subsystem.
-pub fn post_enable_init() {
-    kernel_init_mmio_va_allocator();
-}
-
-/// Human-readable print of all recorded kernel mappings.
-pub fn kernel_print_mappings() {
-    mapping_record::kernel_print()
-}
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/mapping_record.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/mapping_record.rs
index 7d3a6c601..5bc32445b 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/mapping_record.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/mapping_record.rs
@@ -8,7 +8,7 @@ use super::{
     AccessPermissions, Address, AttributeFields, MMIODescriptor, MemAttributes, MemoryRegion,
     Physical, Virtual,
 };
-use crate::{bsp, info, synchronization, synchronization::InitStateLock, warn};
+use crate::{bsp, common, info, synchronization, synchronization::InitStateLock, warn};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -141,9 +141,6 @@ impl MappingRecord {
     }
 
     pub fn print(&self) {
-        const KIB_RSHIFT: u32 = 10; // log2(1024).
-        const MIB_RSHIFT: u32 = 20; // log2(1024 * 1024).
-
         info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
         info!(
             "      {:^44}     {:^30}   {:^7}   {:^9}   {:^35}",
@@ -158,13 +155,7 @@ impl MappingRecord {
             let phys_start = i.phys_start_addr;
             let phys_end_inclusive = phys_start + (size - 1);
 
-            let (size, unit) = if (size >> MIB_RSHIFT) > 0 {
-                (size >> MIB_RSHIFT, "MiB")
-            } else if (size >> KIB_RSHIFT) > 0 {
-                (size >> KIB_RSHIFT, "KiB")
-            } else {
-                (size, "Byte")
-            };
+            let (size, unit) = common::size_human_readable_ceil(size);
 
             let attr = match i.attribute_fields.mem_attributes {
                 MemAttributes::CacheableDRAM => "C",
@@ -183,8 +174,7 @@ impl MappingRecord {
             };
 
             info!(
-                "      {}..{} --> {}..{} | \
-                        {: >3} {} | {: <3} {} {: <2} | {}",
+                "      {}..{} --> {}..{} | {:>3} {} | {:<3} {} {:<2} | {}",
                 virt_start,
                 virt_end_inclusive,
                 phys_start,
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/page_alloc.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/page_alloc.rs
index b4c4232c9..347fcd343 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/page_alloc.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/page_alloc.rs
@@ -44,7 +44,7 @@ impl<ATYPE: AddressType> PageAllocator<ATYPE> {
     }
 
     /// Initialize the allocator.
-    pub fn initialize(&mut self, pool: MemoryRegion<ATYPE>) {
+    pub fn init(&mut self, pool: MemoryRegion<ATYPE>) {
         if self.pool.is_some() {
             warn!("Already initialized");
             return;
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/tests/00_console_sanity.rs b/15_virtual_mem_part3_precomputed_tables/kernel/tests/00_console_sanity.rs
index f2a1f3edf..305510cea 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/tests/00_console_sanity.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/tests/00_console_sanity.rs
@@ -19,7 +19,7 @@ unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
 
     exception::handling_init();
-    memory::mmu::post_enable_init();
+    memory::init();
     bsp::driver::driver_manager().qemu_bring_up_console();
 
     // Handshake
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/tests/01_timer_sanity.rs b/15_virtual_mem_part3_precomputed_tables/kernel/tests/01_timer_sanity.rs
index caeca3cd4..d5d76a5c1 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/tests/01_timer_sanity.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/tests/01_timer_sanity.rs
@@ -19,7 +19,7 @@ unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
 
     exception::handling_init();
-    memory::mmu::post_enable_init();
+    memory::init();
     bsp::driver::driver_manager().qemu_bring_up_console();
 
     // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/tests/02_exception_sync_page_fault.rs b/15_virtual_mem_part3_precomputed_tables/kernel/tests/02_exception_sync_page_fault.rs
index feb84d9be..ec7a365ac 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/tests/02_exception_sync_page_fault.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/tests/02_exception_sync_page_fault.rs
@@ -24,7 +24,7 @@ unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
 
     exception::handling_init();
-    memory::mmu::post_enable_init();
+    memory::init();
     bsp::driver::driver_manager().qemu_bring_up_console();
 
     // This line will be printed as the test header.
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/tests/03_exception_restore_sanity.rs b/15_virtual_mem_part3_precomputed_tables/kernel/tests/03_exception_restore_sanity.rs
index a521a8711..47dd27149 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/tests/03_exception_restore_sanity.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/tests/03_exception_restore_sanity.rs
@@ -33,7 +33,7 @@ unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
 
     exception::handling_init();
-    memory::mmu::post_enable_init();
+    memory::init();
     bsp::driver::driver_manager().qemu_bring_up_console();
 
     // This line will be printed as the test header.
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/tests/04_exception_irq_sanity.rs b/15_virtual_mem_part3_precomputed_tables/kernel/tests/04_exception_irq_sanity.rs
index cd2d29d6a..7b9628d57 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/tests/04_exception_irq_sanity.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/tests/04_exception_irq_sanity.rs
@@ -17,7 +17,7 @@ use test_macros::kernel_test;
 unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
 
-    memory::mmu::post_enable_init();
+    memory::init();
     bsp::driver::driver_manager().qemu_bring_up_console();
 
     exception::handling_init();
diff --git a/16_virtual_mem_part4_higher_half_kernel/README.md b/16_virtual_mem_part4_higher_half_kernel/README.md
index 943273c03..0a30a2aab 100644
--- a/16_virtual_mem_part4_higher_half_kernel/README.md
+++ b/16_virtual_mem_part4_higher_half_kernel/README.md
@@ -729,7 +729,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/mem
 diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs 16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
 --- 15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs
 +++ 16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
-@@ -153,11 +153,6 @@
+@@ -154,11 +154,6 @@
      )
  }
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/common.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/common.rs
index 678f4a6c6..f32f650fb 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/common.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/common.rs
@@ -27,3 +27,20 @@ pub const fn align_up(value: usize, alignment: usize) -> usize {
 
     (value + alignment - 1) & !(alignment - 1)
 }
+
+/// Convert a size into human readable format.
+pub const fn size_human_readable_ceil(size: usize) -> (usize, &'static str) {
+    const KIB: usize = 1024;
+    const MIB: usize = 1024 * 1024;
+    const GIB: usize = 1024 * 1024 * 1024;
+
+    if (size / GIB) > 0 {
+        (size.div_ceil(GIB), "GiB")
+    } else if (size / MIB) > 0 {
+        (size.div_ceil(MIB), "MiB")
+    } else if (size / KIB) > 0 {
+        (size.div_ceil(KIB), "KiB")
+    } else {
+        (size, "Byte")
+    }
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/console/null_console.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/console/null_console.rs
index 10c3bedc0..2c64d499c 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/console/null_console.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/console/null_console.rs
@@ -20,7 +20,7 @@ pub struct NullConsole;
 pub static NULL_CONSOLE: NullConsole = NullConsole {};
 
 //--------------------------------------------------------------------------------------------------
-// Private Code
+// Public Code
 //--------------------------------------------------------------------------------------------------
 
 impl interface::Write for NullConsole {
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
index f023d6831..1483c5a3a 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
@@ -114,6 +114,7 @@
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(generic_const_exprs)]
+#![feature(int_roundings)]
 #![feature(is_sorted)]
 #![feature(linkage)]
 #![feature(panic_info_message)]
@@ -180,7 +181,7 @@ unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
 
     exception::handling_init();
-    memory::mmu::post_enable_init();
+    memory::init();
     bsp::driver::driver_manager().qemu_bring_up_console();
 
     test_main();
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/main.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/main.rs
index 928f12c2f..9aeb44386 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/main.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/main.rs
@@ -28,7 +28,7 @@ unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
 
     exception::handling_init();
-    memory::mmu::post_enable_init();
+    memory::init();
 
     // Instantiate and init all device drivers.
     if let Err(x) = bsp::driver::driver_manager().instantiate_drivers() {
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory.rs
index 64d8cf64e..3b6868e7a 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory.rs
@@ -136,6 +136,11 @@ impl fmt::Display for Address<Virtual> {
     }
 }
 
+/// Initialize the memory subsystem.
+pub fn init() {
+    mmu::kernel_init_mmio_va_allocator();
+}
+
 //--------------------------------------------------------------------------------------------------
 // Testing
 //--------------------------------------------------------------------------------------------------
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu.rs
index 8806a9935..7f02dad91 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu.rs
@@ -82,14 +82,6 @@ use interface::MMU;
 use synchronization::interface::ReadWriteEx;
 use translation_table::interface::TranslationTable;
 
-/// Query the BSP for the reserved virtual addresses for MMIO remapping and initialize the kernel's
-/// MMIO VA allocator with it.
-fn kernel_init_mmio_va_allocator() {
-    let region = bsp::memory::mmu::virt_mmio_remap_region();
-
-    page_alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.initialize(region));
-}
-
 /// Map a region in the kernel's translation tables.
 ///
 /// No input checks done, input is passed through to the architectural implementation.
@@ -169,6 +161,14 @@ impl<const AS_SIZE: usize> AddressSpace<AS_SIZE> {
     }
 }
 
+/// Query the BSP for the reserved virtual addresses for MMIO remapping and initialize the kernel's
+/// MMIO VA allocator with it.
+pub fn kernel_init_mmio_va_allocator() {
+    let region = bsp::memory::mmu::virt_mmio_remap_region();
+
+    page_alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.init(region));
+}
+
 /// Add an entry to the mapping info record.
 pub fn kernel_add_mapping_record(
     name: &'static str,
@@ -247,6 +247,11 @@ pub fn try_kernel_page_attributes(
         .read(|tables| tables.try_page_attributes(virt_page_addr))
 }
 
+/// Human-readable print of all recorded kernel mappings.
+pub fn kernel_print_mappings() {
+    mapping_record::kernel_print()
+}
+
 /// Enable the MMU and data + instruction caching.
 ///
 /// # Safety
@@ -258,13 +263,3 @@ pub unsafe fn enable_mmu_and_caching(
 ) -> Result<(), MMUEnableError> {
     arch_mmu::mmu().enable_mmu_and_caching(phys_tables_base_addr)
 }
-
-/// Finish initialization of the MMU subsystem.
-pub fn post_enable_init() {
-    kernel_init_mmio_va_allocator();
-}
-
-/// Human-readable print of all recorded kernel mappings.
-pub fn kernel_print_mappings() {
-    mapping_record::kernel_print()
-}
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/mapping_record.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/mapping_record.rs
index 7d3a6c601..5bc32445b 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/mapping_record.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/mapping_record.rs
@@ -8,7 +8,7 @@ use super::{
     AccessPermissions, Address, AttributeFields, MMIODescriptor, MemAttributes, MemoryRegion,
     Physical, Virtual,
 };
-use crate::{bsp, info, synchronization, synchronization::InitStateLock, warn};
+use crate::{bsp, common, info, synchronization, synchronization::InitStateLock, warn};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -141,9 +141,6 @@ impl MappingRecord {
     }
 
     pub fn print(&self) {
-        const KIB_RSHIFT: u32 = 10; // log2(1024).
-        const MIB_RSHIFT: u32 = 20; // log2(1024 * 1024).
-
         info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
         info!(
             "      {:^44}     {:^30}   {:^7}   {:^9}   {:^35}",
@@ -158,13 +155,7 @@ impl MappingRecord {
             let phys_start = i.phys_start_addr;
             let phys_end_inclusive = phys_start + (size - 1);
 
-            let (size, unit) = if (size >> MIB_RSHIFT) > 0 {
-                (size >> MIB_RSHIFT, "MiB")
-            } else if (size >> KIB_RSHIFT) > 0 {
-                (size >> KIB_RSHIFT, "KiB")
-            } else {
-                (size, "Byte")
-            };
+            let (size, unit) = common::size_human_readable_ceil(size);
 
             let attr = match i.attribute_fields.mem_attributes {
                 MemAttributes::CacheableDRAM => "C",
@@ -183,8 +174,7 @@ impl MappingRecord {
             };
 
             info!(
-                "      {}..{} --> {}..{} | \
-                        {: >3} {} | {: <3} {} {: <2} | {}",
+                "      {}..{} --> {}..{} | {:>3} {} | {:<3} {} {:<2} | {}",
                 virt_start,
                 virt_end_inclusive,
                 phys_start,
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/page_alloc.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/page_alloc.rs
index b4c4232c9..347fcd343 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/page_alloc.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/page_alloc.rs
@@ -44,7 +44,7 @@ impl<ATYPE: AddressType> PageAllocator<ATYPE> {
     }
 
     /// Initialize the allocator.
-    pub fn initialize(&mut self, pool: MemoryRegion<ATYPE>) {
+    pub fn init(&mut self, pool: MemoryRegion<ATYPE>) {
         if self.pool.is_some() {
             warn!("Already initialized");
             return;
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/00_console_sanity.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/00_console_sanity.rs
index f2a1f3edf..305510cea 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/00_console_sanity.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/00_console_sanity.rs
@@ -19,7 +19,7 @@ unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
 
     exception::handling_init();
-    memory::mmu::post_enable_init();
+    memory::init();
     bsp::driver::driver_manager().qemu_bring_up_console();
 
     // Handshake
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/01_timer_sanity.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/01_timer_sanity.rs
index caeca3cd4..d5d76a5c1 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/01_timer_sanity.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/01_timer_sanity.rs
@@ -19,7 +19,7 @@ unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
 
     exception::handling_init();
-    memory::mmu::post_enable_init();
+    memory::init();
     bsp::driver::driver_manager().qemu_bring_up_console();
 
     // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/02_exception_sync_page_fault.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/02_exception_sync_page_fault.rs
index 33463e0a8..a6d15b697 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/02_exception_sync_page_fault.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/02_exception_sync_page_fault.rs
@@ -24,7 +24,7 @@ unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
 
     exception::handling_init();
-    memory::mmu::post_enable_init();
+    memory::init();
     bsp::driver::driver_manager().qemu_bring_up_console();
 
     // This line will be printed as the test header.
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/03_exception_restore_sanity.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/03_exception_restore_sanity.rs
index a521a8711..47dd27149 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/03_exception_restore_sanity.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/03_exception_restore_sanity.rs
@@ -33,7 +33,7 @@ unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
 
     exception::handling_init();
-    memory::mmu::post_enable_init();
+    memory::init();
     bsp::driver::driver_manager().qemu_bring_up_console();
 
     // This line will be printed as the test header.
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/04_exception_irq_sanity.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/04_exception_irq_sanity.rs
index cd2d29d6a..7b9628d57 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/04_exception_irq_sanity.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/04_exception_irq_sanity.rs
@@ -17,7 +17,7 @@ use test_macros::kernel_test;
 unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
 
-    memory::mmu::post_enable_init();
+    memory::init();
     bsp::driver::driver_manager().qemu_bring_up_console();
 
     exception::handling_init();
diff --git a/17_kernel_symbols/README.md b/17_kernel_symbols/README.md
index 84378fff1..d3b42b65a 100644
--- a/17_kernel_symbols/README.md
+++ b/17_kernel_symbols/README.md
@@ -332,7 +332,7 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/mem
 diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs 17_kernel_symbols/kernel/src/lib.rs
 --- 16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
 +++ 17_kernel_symbols/kernel/src/lib.rs
-@@ -138,6 +138,7 @@
+@@ -139,6 +139,7 @@
  pub mod memory;
  pub mod print;
  pub mod state;
diff --git a/17_kernel_symbols/kernel/src/common.rs b/17_kernel_symbols/kernel/src/common.rs
index 678f4a6c6..f32f650fb 100644
--- a/17_kernel_symbols/kernel/src/common.rs
+++ b/17_kernel_symbols/kernel/src/common.rs
@@ -27,3 +27,20 @@ pub const fn align_up(value: usize, alignment: usize) -> usize {
 
     (value + alignment - 1) & !(alignment - 1)
 }
+
+/// Convert a size into human readable format.
+pub const fn size_human_readable_ceil(size: usize) -> (usize, &'static str) {
+    const KIB: usize = 1024;
+    const MIB: usize = 1024 * 1024;
+    const GIB: usize = 1024 * 1024 * 1024;
+
+    if (size / GIB) > 0 {
+        (size.div_ceil(GIB), "GiB")
+    } else if (size / MIB) > 0 {
+        (size.div_ceil(MIB), "MiB")
+    } else if (size / KIB) > 0 {
+        (size.div_ceil(KIB), "KiB")
+    } else {
+        (size, "Byte")
+    }
+}
diff --git a/17_kernel_symbols/kernel/src/console/null_console.rs b/17_kernel_symbols/kernel/src/console/null_console.rs
index 10c3bedc0..2c64d499c 100644
--- a/17_kernel_symbols/kernel/src/console/null_console.rs
+++ b/17_kernel_symbols/kernel/src/console/null_console.rs
@@ -20,7 +20,7 @@ pub struct NullConsole;
 pub static NULL_CONSOLE: NullConsole = NullConsole {};
 
 //--------------------------------------------------------------------------------------------------
-// Private Code
+// Public Code
 //--------------------------------------------------------------------------------------------------
 
 impl interface::Write for NullConsole {
diff --git a/17_kernel_symbols/kernel/src/lib.rs b/17_kernel_symbols/kernel/src/lib.rs
index e70468e57..1f6d11b1a 100644
--- a/17_kernel_symbols/kernel/src/lib.rs
+++ b/17_kernel_symbols/kernel/src/lib.rs
@@ -114,6 +114,7 @@
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(generic_const_exprs)]
+#![feature(int_roundings)]
 #![feature(is_sorted)]
 #![feature(linkage)]
 #![feature(panic_info_message)]
@@ -181,7 +182,7 @@ unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
 
     exception::handling_init();
-    memory::mmu::post_enable_init();
+    memory::init();
     bsp::driver::driver_manager().qemu_bring_up_console();
 
     test_main();
diff --git a/17_kernel_symbols/kernel/src/main.rs b/17_kernel_symbols/kernel/src/main.rs
index 928f12c2f..9aeb44386 100644
--- a/17_kernel_symbols/kernel/src/main.rs
+++ b/17_kernel_symbols/kernel/src/main.rs
@@ -28,7 +28,7 @@ unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
 
     exception::handling_init();
-    memory::mmu::post_enable_init();
+    memory::init();
 
     // Instantiate and init all device drivers.
     if let Err(x) = bsp::driver::driver_manager().instantiate_drivers() {
diff --git a/17_kernel_symbols/kernel/src/memory.rs b/17_kernel_symbols/kernel/src/memory.rs
index 64d8cf64e..3b6868e7a 100644
--- a/17_kernel_symbols/kernel/src/memory.rs
+++ b/17_kernel_symbols/kernel/src/memory.rs
@@ -136,6 +136,11 @@ impl fmt::Display for Address<Virtual> {
     }
 }
 
+/// Initialize the memory subsystem.
+pub fn init() {
+    mmu::kernel_init_mmio_va_allocator();
+}
+
 //--------------------------------------------------------------------------------------------------
 // Testing
 //--------------------------------------------------------------------------------------------------
diff --git a/17_kernel_symbols/kernel/src/memory/mmu.rs b/17_kernel_symbols/kernel/src/memory/mmu.rs
index 8806a9935..7f02dad91 100644
--- a/17_kernel_symbols/kernel/src/memory/mmu.rs
+++ b/17_kernel_symbols/kernel/src/memory/mmu.rs
@@ -82,14 +82,6 @@ use interface::MMU;
 use synchronization::interface::ReadWriteEx;
 use translation_table::interface::TranslationTable;
 
-/// Query the BSP for the reserved virtual addresses for MMIO remapping and initialize the kernel's
-/// MMIO VA allocator with it.
-fn kernel_init_mmio_va_allocator() {
-    let region = bsp::memory::mmu::virt_mmio_remap_region();
-
-    page_alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.initialize(region));
-}
-
 /// Map a region in the kernel's translation tables.
 ///
 /// No input checks done, input is passed through to the architectural implementation.
@@ -169,6 +161,14 @@ impl<const AS_SIZE: usize> AddressSpace<AS_SIZE> {
     }
 }
 
+/// Query the BSP for the reserved virtual addresses for MMIO remapping and initialize the kernel's
+/// MMIO VA allocator with it.
+pub fn kernel_init_mmio_va_allocator() {
+    let region = bsp::memory::mmu::virt_mmio_remap_region();
+
+    page_alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.init(region));
+}
+
 /// Add an entry to the mapping info record.
 pub fn kernel_add_mapping_record(
     name: &'static str,
@@ -247,6 +247,11 @@ pub fn try_kernel_page_attributes(
         .read(|tables| tables.try_page_attributes(virt_page_addr))
 }
 
+/// Human-readable print of all recorded kernel mappings.
+pub fn kernel_print_mappings() {
+    mapping_record::kernel_print()
+}
+
 /// Enable the MMU and data + instruction caching.
 ///
 /// # Safety
@@ -258,13 +263,3 @@ pub unsafe fn enable_mmu_and_caching(
 ) -> Result<(), MMUEnableError> {
     arch_mmu::mmu().enable_mmu_and_caching(phys_tables_base_addr)
 }
-
-/// Finish initialization of the MMU subsystem.
-pub fn post_enable_init() {
-    kernel_init_mmio_va_allocator();
-}
-
-/// Human-readable print of all recorded kernel mappings.
-pub fn kernel_print_mappings() {
-    mapping_record::kernel_print()
-}
diff --git a/17_kernel_symbols/kernel/src/memory/mmu/mapping_record.rs b/17_kernel_symbols/kernel/src/memory/mmu/mapping_record.rs
index 7d3a6c601..5bc32445b 100644
--- a/17_kernel_symbols/kernel/src/memory/mmu/mapping_record.rs
+++ b/17_kernel_symbols/kernel/src/memory/mmu/mapping_record.rs
@@ -8,7 +8,7 @@ use super::{
     AccessPermissions, Address, AttributeFields, MMIODescriptor, MemAttributes, MemoryRegion,
     Physical, Virtual,
 };
-use crate::{bsp, info, synchronization, synchronization::InitStateLock, warn};
+use crate::{bsp, common, info, synchronization, synchronization::InitStateLock, warn};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -141,9 +141,6 @@ impl MappingRecord {
     }
 
     pub fn print(&self) {
-        const KIB_RSHIFT: u32 = 10; // log2(1024).
-        const MIB_RSHIFT: u32 = 20; // log2(1024 * 1024).
-
         info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
         info!(
             "      {:^44}     {:^30}   {:^7}   {:^9}   {:^35}",
@@ -158,13 +155,7 @@ impl MappingRecord {
             let phys_start = i.phys_start_addr;
             let phys_end_inclusive = phys_start + (size - 1);
 
-            let (size, unit) = if (size >> MIB_RSHIFT) > 0 {
-                (size >> MIB_RSHIFT, "MiB")
-            } else if (size >> KIB_RSHIFT) > 0 {
-                (size >> KIB_RSHIFT, "KiB")
-            } else {
-                (size, "Byte")
-            };
+            let (size, unit) = common::size_human_readable_ceil(size);
 
             let attr = match i.attribute_fields.mem_attributes {
                 MemAttributes::CacheableDRAM => "C",
@@ -183,8 +174,7 @@ impl MappingRecord {
             };
 
             info!(
-                "      {}..{} --> {}..{} | \
-                        {: >3} {} | {: <3} {} {: <2} | {}",
+                "      {}..{} --> {}..{} | {:>3} {} | {:<3} {} {:<2} | {}",
                 virt_start,
                 virt_end_inclusive,
                 phys_start,
diff --git a/17_kernel_symbols/kernel/src/memory/mmu/page_alloc.rs b/17_kernel_symbols/kernel/src/memory/mmu/page_alloc.rs
index b4c4232c9..347fcd343 100644
--- a/17_kernel_symbols/kernel/src/memory/mmu/page_alloc.rs
+++ b/17_kernel_symbols/kernel/src/memory/mmu/page_alloc.rs
@@ -44,7 +44,7 @@ impl<ATYPE: AddressType> PageAllocator<ATYPE> {
     }
 
     /// Initialize the allocator.
-    pub fn initialize(&mut self, pool: MemoryRegion<ATYPE>) {
+    pub fn init(&mut self, pool: MemoryRegion<ATYPE>) {
         if self.pool.is_some() {
             warn!("Already initialized");
             return;
diff --git a/17_kernel_symbols/kernel/tests/00_console_sanity.rs b/17_kernel_symbols/kernel/tests/00_console_sanity.rs
index f2a1f3edf..305510cea 100644
--- a/17_kernel_symbols/kernel/tests/00_console_sanity.rs
+++ b/17_kernel_symbols/kernel/tests/00_console_sanity.rs
@@ -19,7 +19,7 @@ unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
 
     exception::handling_init();
-    memory::mmu::post_enable_init();
+    memory::init();
     bsp::driver::driver_manager().qemu_bring_up_console();
 
     // Handshake
diff --git a/17_kernel_symbols/kernel/tests/01_timer_sanity.rs b/17_kernel_symbols/kernel/tests/01_timer_sanity.rs
index caeca3cd4..d5d76a5c1 100644
--- a/17_kernel_symbols/kernel/tests/01_timer_sanity.rs
+++ b/17_kernel_symbols/kernel/tests/01_timer_sanity.rs
@@ -19,7 +19,7 @@ unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
 
     exception::handling_init();
-    memory::mmu::post_enable_init();
+    memory::init();
     bsp::driver::driver_manager().qemu_bring_up_console();
 
     // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
diff --git a/17_kernel_symbols/kernel/tests/02_exception_sync_page_fault.rs b/17_kernel_symbols/kernel/tests/02_exception_sync_page_fault.rs
index 33463e0a8..a6d15b697 100644
--- a/17_kernel_symbols/kernel/tests/02_exception_sync_page_fault.rs
+++ b/17_kernel_symbols/kernel/tests/02_exception_sync_page_fault.rs
@@ -24,7 +24,7 @@ unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
 
     exception::handling_init();
-    memory::mmu::post_enable_init();
+    memory::init();
     bsp::driver::driver_manager().qemu_bring_up_console();
 
     // This line will be printed as the test header.
diff --git a/17_kernel_symbols/kernel/tests/03_exception_restore_sanity.rs b/17_kernel_symbols/kernel/tests/03_exception_restore_sanity.rs
index a521a8711..47dd27149 100644
--- a/17_kernel_symbols/kernel/tests/03_exception_restore_sanity.rs
+++ b/17_kernel_symbols/kernel/tests/03_exception_restore_sanity.rs
@@ -33,7 +33,7 @@ unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
 
     exception::handling_init();
-    memory::mmu::post_enable_init();
+    memory::init();
     bsp::driver::driver_manager().qemu_bring_up_console();
 
     // This line will be printed as the test header.
diff --git a/17_kernel_symbols/kernel/tests/04_exception_irq_sanity.rs b/17_kernel_symbols/kernel/tests/04_exception_irq_sanity.rs
index cd2d29d6a..7b9628d57 100644
--- a/17_kernel_symbols/kernel/tests/04_exception_irq_sanity.rs
+++ b/17_kernel_symbols/kernel/tests/04_exception_irq_sanity.rs
@@ -17,7 +17,7 @@ use test_macros::kernel_test;
 unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
 
-    memory::mmu::post_enable_init();
+    memory::init();
     bsp::driver::driver_manager().qemu_bring_up_console();
 
     exception::handling_init();
diff --git a/18_backtrace/README.md b/18_backtrace/README.md
index fd1737034..2c4dc127a 100644
--- a/18_backtrace/README.md
+++ b/18_backtrace/README.md
@@ -727,7 +727,7 @@ diff -uNr 17_kernel_symbols/kernel/src/_arch/aarch64/exception.s 18_backtrace/ke
 diff -uNr 17_kernel_symbols/kernel/src/backtrace.rs 18_backtrace/kernel/src/backtrace.rs
 --- 17_kernel_symbols/kernel/src/backtrace.rs
 +++ 18_backtrace/kernel/src/backtrace.rs
-@@ -0,0 +1,112 @@
+@@ -0,0 +1,114 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
@@ -790,7 +790,9 @@ diff -uNr 17_kernel_symbols/kernel/src/backtrace.rs 18_backtrace/kernel/src/back
 +            |maybe_iter: Option<&mut dyn Iterator<Item = BacktraceItem>>| match maybe_iter {
 +                None => fmt_res = writeln!(f, "ERROR! No valid stack frame found"),
 +                Some(iter) => {
-+                    for (i, backtrace_res) in iter.enumerate() {
++                    // Since the backtrace is printed, the first function is always
++                    // core::fmt::write. Skip 1 so it is excluded and doesn't bloat the output.
++                    for (i, backtrace_res) in iter.skip(1).enumerate() {
 +                        match backtrace_res {
 +                            BacktraceItem::InvalidFramePointer(addr) => {
 +                                fmt_res = writeln!(
@@ -909,7 +911,7 @@ diff -uNr 17_kernel_symbols/kernel/src/bsp/raspberrypi/memory/mmu.rs 18_backtrac
 diff -uNr 17_kernel_symbols/kernel/src/lib.rs 18_backtrace/kernel/src/lib.rs
 --- 17_kernel_symbols/kernel/src/lib.rs
 +++ 18_backtrace/kernel/src/lib.rs
-@@ -129,6 +129,7 @@
+@@ -130,6 +130,7 @@
  mod panic_wait;
  mod synchronization;
 
@@ -1062,7 +1064,7 @@ diff -uNr 17_kernel_symbols/kernel/tests/05_backtrace_sanity.rs 18_backtrace/ker
 +    use driver::interface::DriverManager;
 +
 +    exception::handling_init();
-+    memory::mmu::post_enable_init();
++    memory::init();
 +    bsp::driver::driver_manager().qemu_bring_up_console();
 +
 +    nested();
@@ -1133,7 +1135,7 @@ diff -uNr 17_kernel_symbols/kernel/tests/06_backtrace_invalid_frame.rs 18_backtr
 +    use driver::interface::DriverManager;
 +
 +    exception::handling_init();
-+    memory::mmu::post_enable_init();
++    memory::init();
 +    bsp::driver::driver_manager().qemu_bring_up_console();
 +
 +    nested();
@@ -1208,7 +1210,7 @@ diff -uNr 17_kernel_symbols/kernel/tests/07_backtrace_invalid_link.rs 18_backtra
 +    use driver::interface::DriverManager;
 +
 +    exception::handling_init();
-+    memory::mmu::post_enable_init();
++    memory::init();
 +    bsp::driver::driver_manager().qemu_bring_up_console();
 +
 +    nested_1();
@@ -1264,4 +1266,50 @@ diff -uNr 17_kernel_symbols/Makefile 18_backtrace/Makefile
  	$(call color_header, "Launching GDB")
  	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
 
+diff -uNr 17_kernel_symbols/tools/translation_table_tool/bsp.rb 18_backtrace/tools/translation_table_tool/bsp.rb
+--- 17_kernel_symbols/tools/translation_table_tool/bsp.rb
++++ 18_backtrace/tools/translation_table_tool/bsp.rb
+@@ -45,6 +45,10 @@
+                 raise
+             end
+
+-        x.scan(/\d+/).join.to_i(16)
++        # Extract the hex literal with underscores like 0x0123_abcd.
++        x = x.scan(/0x[\h_]*/)[0]
++
++        # Further remove x and _ and convert to int.
++        x.scan(/\h+/).join.to_i(16)
+     end
+ end
+
+diff -uNr 17_kernel_symbols/tools/translation_table_tool/generic.rb 18_backtrace/tools/translation_table_tool/generic.rb
+--- 17_kernel_symbols/tools/translation_table_tool/generic.rb
++++ 18_backtrace/tools/translation_table_tool/generic.rb
+@@ -109,13 +109,23 @@
+         @attributes = attributes
+     end
+
++    def size_human_readable(size)
++        if size >= (1024 * 1024)
++            "#{(size / (1024 * 1024)).to_s.rjust(3)} MiB"
++        elsif size >= 1024
++            "#{(size / 1024).to_s.rjust(3)} KiB"
++        else
++            raise
++        end
++    end
++
+     def to_s
+         name = @name.ljust(self.class.max_section_name_length)
+         virt_start = @virt_region.first.to_hex_underscore(with_leading_zeros: true)
+         phys_start = @phys_region.first.to_hex_underscore(with_leading_zeros: true)
+-        size = ((@virt_region.size * 65_536) / 1024).to_s.rjust(3)
++        size = size_human_readable(@virt_region.size * 65_536)
+
+-        "#{name} | #{virt_start} | #{phys_start} | #{size} KiB | #{@attributes}"
++        "#{name} | #{virt_start} | #{phys_start} | #{size} | #{@attributes}"
+     end
+
+     def self.print_divider
+
 ```
diff --git a/18_backtrace/kernel/src/backtrace.rs b/18_backtrace/kernel/src/backtrace.rs
index 7dba2e4aa..22de6c48e 100644
--- a/18_backtrace/kernel/src/backtrace.rs
+++ b/18_backtrace/kernel/src/backtrace.rs
@@ -60,7 +60,9 @@ impl fmt::Display for Backtrace {
             |maybe_iter: Option<&mut dyn Iterator<Item = BacktraceItem>>| match maybe_iter {
                 None => fmt_res = writeln!(f, "ERROR! No valid stack frame found"),
                 Some(iter) => {
-                    for (i, backtrace_res) in iter.enumerate() {
+                    // Since the backtrace is printed, the first function is always
+                    // core::fmt::write. Skip 1 so it is excluded and doesn't bloat the output.
+                    for (i, backtrace_res) in iter.skip(1).enumerate() {
                         match backtrace_res {
                             BacktraceItem::InvalidFramePointer(addr) => {
                                 fmt_res = writeln!(
diff --git a/18_backtrace/kernel/src/common.rs b/18_backtrace/kernel/src/common.rs
index 678f4a6c6..f32f650fb 100644
--- a/18_backtrace/kernel/src/common.rs
+++ b/18_backtrace/kernel/src/common.rs
@@ -27,3 +27,20 @@ pub const fn align_up(value: usize, alignment: usize) -> usize {
 
     (value + alignment - 1) & !(alignment - 1)
 }
+
+/// Convert a size into human readable format.
+pub const fn size_human_readable_ceil(size: usize) -> (usize, &'static str) {
+    const KIB: usize = 1024;
+    const MIB: usize = 1024 * 1024;
+    const GIB: usize = 1024 * 1024 * 1024;
+
+    if (size / GIB) > 0 {
+        (size.div_ceil(GIB), "GiB")
+    } else if (size / MIB) > 0 {
+        (size.div_ceil(MIB), "MiB")
+    } else if (size / KIB) > 0 {
+        (size.div_ceil(KIB), "KiB")
+    } else {
+        (size, "Byte")
+    }
+}
diff --git a/18_backtrace/kernel/src/console/null_console.rs b/18_backtrace/kernel/src/console/null_console.rs
index 10c3bedc0..2c64d499c 100644
--- a/18_backtrace/kernel/src/console/null_console.rs
+++ b/18_backtrace/kernel/src/console/null_console.rs
@@ -20,7 +20,7 @@ pub struct NullConsole;
 pub static NULL_CONSOLE: NullConsole = NullConsole {};
 
 //--------------------------------------------------------------------------------------------------
-// Private Code
+// Public Code
 //--------------------------------------------------------------------------------------------------
 
 impl interface::Write for NullConsole {
diff --git a/18_backtrace/kernel/src/lib.rs b/18_backtrace/kernel/src/lib.rs
index 688fc1a40..2c13a3426 100644
--- a/18_backtrace/kernel/src/lib.rs
+++ b/18_backtrace/kernel/src/lib.rs
@@ -114,6 +114,7 @@
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(generic_const_exprs)]
+#![feature(int_roundings)]
 #![feature(is_sorted)]
 #![feature(linkage)]
 #![feature(panic_info_message)]
@@ -182,7 +183,7 @@ unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
 
     exception::handling_init();
-    memory::mmu::post_enable_init();
+    memory::init();
     bsp::driver::driver_manager().qemu_bring_up_console();
 
     test_main();
diff --git a/18_backtrace/kernel/src/main.rs b/18_backtrace/kernel/src/main.rs
index 928f12c2f..9aeb44386 100644
--- a/18_backtrace/kernel/src/main.rs
+++ b/18_backtrace/kernel/src/main.rs
@@ -28,7 +28,7 @@ unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
 
     exception::handling_init();
-    memory::mmu::post_enable_init();
+    memory::init();
 
     // Instantiate and init all device drivers.
     if let Err(x) = bsp::driver::driver_manager().instantiate_drivers() {
diff --git a/18_backtrace/kernel/src/memory.rs b/18_backtrace/kernel/src/memory.rs
index 34c34429d..840db396b 100644
--- a/18_backtrace/kernel/src/memory.rs
+++ b/18_backtrace/kernel/src/memory.rs
@@ -160,6 +160,11 @@ impl fmt::Display for Address<Virtual> {
     }
 }
 
+/// Initialize the memory subsystem.
+pub fn init() {
+    mmu::kernel_init_mmio_va_allocator();
+}
+
 //--------------------------------------------------------------------------------------------------
 // Testing
 //--------------------------------------------------------------------------------------------------
diff --git a/18_backtrace/kernel/src/memory/mmu.rs b/18_backtrace/kernel/src/memory/mmu.rs
index 8806a9935..7f02dad91 100644
--- a/18_backtrace/kernel/src/memory/mmu.rs
+++ b/18_backtrace/kernel/src/memory/mmu.rs
@@ -82,14 +82,6 @@ use interface::MMU;
 use synchronization::interface::ReadWriteEx;
 use translation_table::interface::TranslationTable;
 
-/// Query the BSP for the reserved virtual addresses for MMIO remapping and initialize the kernel's
-/// MMIO VA allocator with it.
-fn kernel_init_mmio_va_allocator() {
-    let region = bsp::memory::mmu::virt_mmio_remap_region();
-
-    page_alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.initialize(region));
-}
-
 /// Map a region in the kernel's translation tables.
 ///
 /// No input checks done, input is passed through to the architectural implementation.
@@ -169,6 +161,14 @@ impl<const AS_SIZE: usize> AddressSpace<AS_SIZE> {
     }
 }
 
+/// Query the BSP for the reserved virtual addresses for MMIO remapping and initialize the kernel's
+/// MMIO VA allocator with it.
+pub fn kernel_init_mmio_va_allocator() {
+    let region = bsp::memory::mmu::virt_mmio_remap_region();
+
+    page_alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.init(region));
+}
+
 /// Add an entry to the mapping info record.
 pub fn kernel_add_mapping_record(
     name: &'static str,
@@ -247,6 +247,11 @@ pub fn try_kernel_page_attributes(
         .read(|tables| tables.try_page_attributes(virt_page_addr))
 }
 
+/// Human-readable print of all recorded kernel mappings.
+pub fn kernel_print_mappings() {
+    mapping_record::kernel_print()
+}
+
 /// Enable the MMU and data + instruction caching.
 ///
 /// # Safety
@@ -258,13 +263,3 @@ pub unsafe fn enable_mmu_and_caching(
 ) -> Result<(), MMUEnableError> {
     arch_mmu::mmu().enable_mmu_and_caching(phys_tables_base_addr)
 }
-
-/// Finish initialization of the MMU subsystem.
-pub fn post_enable_init() {
-    kernel_init_mmio_va_allocator();
-}
-
-/// Human-readable print of all recorded kernel mappings.
-pub fn kernel_print_mappings() {
-    mapping_record::kernel_print()
-}
diff --git a/18_backtrace/kernel/src/memory/mmu/mapping_record.rs b/18_backtrace/kernel/src/memory/mmu/mapping_record.rs
index 7d3a6c601..5bc32445b 100644
--- a/18_backtrace/kernel/src/memory/mmu/mapping_record.rs
+++ b/18_backtrace/kernel/src/memory/mmu/mapping_record.rs
@@ -8,7 +8,7 @@ use super::{
     AccessPermissions, Address, AttributeFields, MMIODescriptor, MemAttributes, MemoryRegion,
     Physical, Virtual,
 };
-use crate::{bsp, info, synchronization, synchronization::InitStateLock, warn};
+use crate::{bsp, common, info, synchronization, synchronization::InitStateLock, warn};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -141,9 +141,6 @@ impl MappingRecord {
     }
 
     pub fn print(&self) {
-        const KIB_RSHIFT: u32 = 10; // log2(1024).
-        const MIB_RSHIFT: u32 = 20; // log2(1024 * 1024).
-
         info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
         info!(
             "      {:^44}     {:^30}   {:^7}   {:^9}   {:^35}",
@@ -158,13 +155,7 @@ impl MappingRecord {
             let phys_start = i.phys_start_addr;
             let phys_end_inclusive = phys_start + (size - 1);
 
-            let (size, unit) = if (size >> MIB_RSHIFT) > 0 {
-                (size >> MIB_RSHIFT, "MiB")
-            } else if (size >> KIB_RSHIFT) > 0 {
-                (size >> KIB_RSHIFT, "KiB")
-            } else {
-                (size, "Byte")
-            };
+            let (size, unit) = common::size_human_readable_ceil(size);
 
             let attr = match i.attribute_fields.mem_attributes {
                 MemAttributes::CacheableDRAM => "C",
@@ -183,8 +174,7 @@ impl MappingRecord {
             };
 
             info!(
-                "      {}..{} --> {}..{} | \
-                        {: >3} {} | {: <3} {} {: <2} | {}",
+                "      {}..{} --> {}..{} | {:>3} {} | {:<3} {} {:<2} | {}",
                 virt_start,
                 virt_end_inclusive,
                 phys_start,
diff --git a/18_backtrace/kernel/src/memory/mmu/page_alloc.rs b/18_backtrace/kernel/src/memory/mmu/page_alloc.rs
index b4c4232c9..347fcd343 100644
--- a/18_backtrace/kernel/src/memory/mmu/page_alloc.rs
+++ b/18_backtrace/kernel/src/memory/mmu/page_alloc.rs
@@ -44,7 +44,7 @@ impl<ATYPE: AddressType> PageAllocator<ATYPE> {
     }
 
     /// Initialize the allocator.
-    pub fn initialize(&mut self, pool: MemoryRegion<ATYPE>) {
+    pub fn init(&mut self, pool: MemoryRegion<ATYPE>) {
         if self.pool.is_some() {
             warn!("Already initialized");
             return;
diff --git a/18_backtrace/kernel/tests/00_console_sanity.rs b/18_backtrace/kernel/tests/00_console_sanity.rs
index f2a1f3edf..305510cea 100644
--- a/18_backtrace/kernel/tests/00_console_sanity.rs
+++ b/18_backtrace/kernel/tests/00_console_sanity.rs
@@ -19,7 +19,7 @@ unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
 
     exception::handling_init();
-    memory::mmu::post_enable_init();
+    memory::init();
     bsp::driver::driver_manager().qemu_bring_up_console();
 
     // Handshake
diff --git a/18_backtrace/kernel/tests/01_timer_sanity.rs b/18_backtrace/kernel/tests/01_timer_sanity.rs
index caeca3cd4..d5d76a5c1 100644
--- a/18_backtrace/kernel/tests/01_timer_sanity.rs
+++ b/18_backtrace/kernel/tests/01_timer_sanity.rs
@@ -19,7 +19,7 @@ unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
 
     exception::handling_init();
-    memory::mmu::post_enable_init();
+    memory::init();
     bsp::driver::driver_manager().qemu_bring_up_console();
 
     // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
diff --git a/18_backtrace/kernel/tests/02_exception_sync_page_fault.rs b/18_backtrace/kernel/tests/02_exception_sync_page_fault.rs
index 33463e0a8..a6d15b697 100644
--- a/18_backtrace/kernel/tests/02_exception_sync_page_fault.rs
+++ b/18_backtrace/kernel/tests/02_exception_sync_page_fault.rs
@@ -24,7 +24,7 @@ unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
 
     exception::handling_init();
-    memory::mmu::post_enable_init();
+    memory::init();
     bsp::driver::driver_manager().qemu_bring_up_console();
 
     // This line will be printed as the test header.
diff --git a/18_backtrace/kernel/tests/03_exception_restore_sanity.rs b/18_backtrace/kernel/tests/03_exception_restore_sanity.rs
index a521a8711..47dd27149 100644
--- a/18_backtrace/kernel/tests/03_exception_restore_sanity.rs
+++ b/18_backtrace/kernel/tests/03_exception_restore_sanity.rs
@@ -33,7 +33,7 @@ unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
 
     exception::handling_init();
-    memory::mmu::post_enable_init();
+    memory::init();
     bsp::driver::driver_manager().qemu_bring_up_console();
 
     // This line will be printed as the test header.
diff --git a/18_backtrace/kernel/tests/04_exception_irq_sanity.rs b/18_backtrace/kernel/tests/04_exception_irq_sanity.rs
index cd2d29d6a..7b9628d57 100644
--- a/18_backtrace/kernel/tests/04_exception_irq_sanity.rs
+++ b/18_backtrace/kernel/tests/04_exception_irq_sanity.rs
@@ -17,7 +17,7 @@ use test_macros::kernel_test;
 unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
 
-    memory::mmu::post_enable_init();
+    memory::init();
     bsp::driver::driver_manager().qemu_bring_up_console();
 
     exception::handling_init();
diff --git a/18_backtrace/kernel/tests/05_backtrace_sanity.rs b/18_backtrace/kernel/tests/05_backtrace_sanity.rs
index 4475fafd7..ea425f687 100644
--- a/18_backtrace/kernel/tests/05_backtrace_sanity.rs
+++ b/18_backtrace/kernel/tests/05_backtrace_sanity.rs
@@ -23,7 +23,7 @@ unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
 
     exception::handling_init();
-    memory::mmu::post_enable_init();
+    memory::init();
     bsp::driver::driver_manager().qemu_bring_up_console();
 
     nested();
diff --git a/18_backtrace/kernel/tests/06_backtrace_invalid_frame.rs b/18_backtrace/kernel/tests/06_backtrace_invalid_frame.rs
index 74dad8d8b..8769c7b6e 100644
--- a/18_backtrace/kernel/tests/06_backtrace_invalid_frame.rs
+++ b/18_backtrace/kernel/tests/06_backtrace_invalid_frame.rs
@@ -25,7 +25,7 @@ unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
 
     exception::handling_init();
-    memory::mmu::post_enable_init();
+    memory::init();
     bsp::driver::driver_manager().qemu_bring_up_console();
 
     nested();
diff --git a/18_backtrace/kernel/tests/07_backtrace_invalid_link.rs b/18_backtrace/kernel/tests/07_backtrace_invalid_link.rs
index ba6c9f579..28f3cddab 100644
--- a/18_backtrace/kernel/tests/07_backtrace_invalid_link.rs
+++ b/18_backtrace/kernel/tests/07_backtrace_invalid_link.rs
@@ -30,7 +30,7 @@ unsafe fn kernel_init() -> ! {
     use driver::interface::DriverManager;
 
     exception::handling_init();
-    memory::mmu::post_enable_init();
+    memory::init();
     bsp::driver::driver_manager().qemu_bring_up_console();
 
     nested_1();
diff --git a/18_backtrace/tools/translation_table_tool/bsp.rb b/18_backtrace/tools/translation_table_tool/bsp.rb
index 536a2f21d..dbab5ab6a 100644
--- a/18_backtrace/tools/translation_table_tool/bsp.rb
+++ b/18_backtrace/tools/translation_table_tool/bsp.rb
@@ -45,6 +45,10 @@ def phys_addr_space_end_page
                 raise
             end
 
-        x.scan(/\d+/).join.to_i(16)
+        # Extract the hex literal with underscores like 0x0123_abcd.
+        x = x.scan(/0x[\h_]*/)[0]
+
+        # Further remove x and _ and convert to int.
+        x.scan(/\h+/).join.to_i(16)
     end
 end
diff --git a/18_backtrace/tools/translation_table_tool/generic.rb b/18_backtrace/tools/translation_table_tool/generic.rb
index 13df06588..eee8ccda2 100644
--- a/18_backtrace/tools/translation_table_tool/generic.rb
+++ b/18_backtrace/tools/translation_table_tool/generic.rb
@@ -109,13 +109,23 @@ def initialize(name, virt_region, phys_region, attributes)
         @attributes = attributes
     end
 
+    def size_human_readable(size)
+        if size >= (1024 * 1024)
+            "#{(size / (1024 * 1024)).to_s.rjust(3)} MiB"
+        elsif size >= 1024
+            "#{(size / 1024).to_s.rjust(3)} KiB"
+        else
+            raise
+        end
+    end
+
     def to_s
         name = @name.ljust(self.class.max_section_name_length)
         virt_start = @virt_region.first.to_hex_underscore(with_leading_zeros: true)
         phys_start = @phys_region.first.to_hex_underscore(with_leading_zeros: true)
-        size = ((@virt_region.size * 65_536) / 1024).to_s.rjust(3)
+        size = size_human_readable(@virt_region.size * 65_536)
 
-        "#{name} | #{virt_start} | #{phys_start} | #{size} KiB | #{@attributes}"
+        "#{name} | #{virt_start} | #{phys_start} | #{size} | #{@attributes}"
     end
 
     def self.print_divider

From 5f581cf86d60984d13e4752bf84dd66678342988 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre-richter@users.noreply.github.com>
Date: Mon, 16 May 2022 22:27:06 +0200
Subject: [PATCH 166/214] Update README.md

---
 03_hacky_hello_world/README.md | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/03_hacky_hello_world/README.md b/03_hacky_hello_world/README.md
index 71293c567..0f9e9c858 100644
--- a/03_hacky_hello_world/README.md
+++ b/03_hacky_hello_world/README.md
@@ -2,16 +2,17 @@
 
 ## tl;dr
 
-- Introducing global `print!()` macros to enable "printf debugging" at the earliest.
+- Introducing global `println!()` macros to enable "printf debugging" at the earliest.
 - To keep tutorial length reasonable, printing functions for now "abuse" a QEMU property that lets
   us use the Raspberry's `UART` without setting it up properly.
 - Using the real hardware `UART` is enabled step-by-step in following tutorials.
 
 ## Notable additions
 
-- `src/console.rs` introduces interface `Traits` for console commands.
+- `src/console.rs` introduces interface `Traits` for console commands and a global reference to the
+  kernel's console through `console::console()`.
 - `src/bsp/raspberrypi/console.rs` implements the interface for QEMU's emulated UART.
-- The panic handler makes use of the new `print!()` to display user error messages.
+- The panic handler makes use of the new `println!()` to display user error messages.
 - There is a new Makefile target, `make test`, intended for automated testing. It boots the compiled
   kernel in `QEMU`, and checks for an expected output string produced by the kernel.
   - In this tutorial, it checks for the string `Stopping here`, which is emitted by the `panic!()`

From 99e937c4de5a6be6de4f0b3c35104e5c77cb0069 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre-richter@users.noreply.github.com>
Date: Mon, 16 May 2022 22:28:34 +0200
Subject: [PATCH 167/214] Update README.md

---
 03_hacky_hello_world/README.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/03_hacky_hello_world/README.md b/03_hacky_hello_world/README.md
index 0f9e9c858..348e626a5 100644
--- a/03_hacky_hello_world/README.md
+++ b/03_hacky_hello_world/README.md
@@ -9,7 +9,7 @@
 
 ## Notable additions
 
-- `src/console.rs` introduces interface `Traits` for console commands and a global reference to the
+- `src/console.rs` introduces interface `Traits` for console commands and global access to the
   kernel's console through `console::console()`.
 - `src/bsp/raspberrypi/console.rs` implements the interface for QEMU's emulated UART.
 - The panic handler makes use of the new `println!()` to display user error messages.

From b0452e3a1fb7482911d88468de45307ae9b91e2c Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 16 May 2022 23:01:47 +0200
Subject: [PATCH 168/214] More README fixes

---
 13_exceptions_part2_peripheral_IRQs/README.md | 7 ++-----
 14_virtual_mem_part2_mmio_remap/README.md     | 4 ++--
 2 files changed, 4 insertions(+), 7 deletions(-)

diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index e2e2e1690..634686d66 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -277,8 +277,7 @@ Here is the implementation for the `PL011Uart`:
 
 ```rust
 fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
-    use bsp::exception::asynchronous::irq_manager;
-    use exception::asynchronous::{interface::IRQManager, IRQDescriptor};
+    use exception::asynchronous::{irq_manager, IRQDescriptor};
 
     let descriptor = IRQDescriptor {
         name: Self::COMPATIBLE,
@@ -369,10 +368,8 @@ the the implementation of the trait's handling function:
 ```rust
 #[no_mangle]
 unsafe extern "C" fn current_elx_irq(_e: &mut ExceptionContext) {
-    use exception::asynchronous::interface::IRQManager;
-
     let token = &exception::asynchronous::IRQContext::new();
-    bsp::exception::asynchronous::irq_manager().handle_pending_irqs(token);
+    exception::asynchronous::irq_manager().handle_pending_irqs(token);
 }
 ```
 
diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index be0997ac5..911a2d76e 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -324,7 +324,7 @@ the first time, an instance of the newly introduced `NullConsole` is used as the
 `NullConsole` implements all the console traits, but does nothing. It discards outputs, and returns
 dummy input. For example, should one of the printing macros be called before the UART driver has
 been instantiated and registered, the kernel does not need to crash because the driver is not
-brought up yet. Instead, it can just discards the output. With this new scheme of things, it is
+brought up yet. Instead, it can just discard the output. With this new scheme of things, it is
 possible to safely switch global references like the UART or the IRQ Manager at runtime.
 
 That all the post-driver-init work has now been moved to callbacks is motivated by the idea that
@@ -382,7 +382,7 @@ been turned on.
 fn kernel_init_mmio_va_allocator() {
     let region = bsp::memory::mmu::virt_mmio_remap_region();
 
-    page_alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.initialize(region));
+    page_alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.init(region));
 }
 ```
 

From 96ba61ace93edaa8979beb085a043c372f563a6c Mon Sep 17 00:00:00 2001
From: Andre Richter <andre-richter@users.noreply.github.com>
Date: Tue, 17 May 2022 00:32:05 +0200
Subject: [PATCH 169/214] Update README.md

---
 18_backtrace/README.md | 26 ++++++++++++--------------
 1 file changed, 12 insertions(+), 14 deletions(-)

diff --git a/18_backtrace/README.md b/18_backtrace/README.md
index 2c4dc127a..f98eafc7b 100644
--- a/18_backtrace/README.md
+++ b/18_backtrace/README.md
@@ -17,13 +17,12 @@ Backtrace:
       ----------------------------------------------------------------------------------------------
           Address            Function containing address
       ----------------------------------------------------------------------------------------------
-       1. ffffffffc0001294 | core::fmt::write
-       2. ffffffffc0005560 | libkernel::panic_wait::_panic_print
-       3. ffffffffc00054a0 | rust_begin_unwind
-       4. ffffffffc0002950 | core::panicking::panic_fmt
-       5. ffffffffc0004898 | current_elx_synchronous
-       6. ffffffffc0000a74 | __vector_current_elx_synchronous
-       7. ffffffffc000111c | kernel_init
+       1. ffffffffc0005560 | libkernel::panic_wait::_panic_print
+       2. ffffffffc00054a0 | rust_begin_unwind
+       3. ffffffffc0002950 | core::panicking::panic_fmt
+       4. ffffffffc0004898 | current_elx_synchronous
+       5. ffffffffc0000a74 | __vector_current_elx_synchronous
+       6. ffffffffc000111c | kernel_init
       ----------------------------------------------------------------------------------------------
 ```
 
@@ -342,13 +341,12 @@ $ TEST=02_exception_sync_page_fault make test_integration
                ----------------------------------------------------------------------------------------------
                    Address            Function containing address
                ----------------------------------------------------------------------------------------------
-                1. ffffffffc0001294 | core::fmt::write
-                2. ffffffffc0005560 | libkernel::panic_wait::_panic_print
-                3. ffffffffc00054a0 | rust_begin_unwind
-                4. ffffffffc0002950 | core::panicking::panic_fmt
-                5. ffffffffc0004898 | current_elx_synchronous
-                6. ffffffffc0000a74 | __vector_current_elx_synchronous
-                7. ffffffffc000111c | kernel_init
+                1. ffffffffc0005560 | libkernel::panic_wait::_panic_print
+                2. ffffffffc00054a0 | rust_begin_unwind
+                3. ffffffffc0002950 | core::panicking::panic_fmt
+                4. ffffffffc0004898 | current_elx_synchronous
+                5. ffffffffc0000a74 | __vector_current_elx_synchronous
+                6. ffffffffc000111c | kernel_init
                ----------------------------------------------------------------------------------------------
 
          -------------------------------------------------------------------

From f45275591963e34c6f7b93e8109ad0512f08587c Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Tue, 17 May 2022 23:24:33 +0200
Subject: [PATCH 170/214] Annotate sync functions

---
 04_safe_globals/README.md                            |  4 ++--
 04_safe_globals/src/synchronization.rs               |  4 ++--
 05_drivers_gpio_uart/src/synchronization.rs          |  4 ++--
 06_uart_chainloader/src/synchronization.rs           |  4 ++--
 07_timestamps/src/synchronization.rs                 |  4 ++--
 08_hw_debug_JTAG/src/synchronization.rs              |  4 ++--
 09_privilege_level/src/synchronization.rs            |  4 ++--
 .../src/synchronization.rs                           |  4 ++--
 .../src/synchronization.rs                           |  4 ++--
 12_integrated_testing/kernel/src/synchronization.rs  |  4 ++--
 13_exceptions_part2_peripheral_IRQs/README.md        | 12 ++++++------
 .../kernel/src/synchronization.rs                    | 12 ++++++------
 .../kernel/src/synchronization.rs                    | 12 ++++++------
 .../kernel/src/synchronization.rs                    | 12 ++++++------
 .../kernel/src/synchronization.rs                    | 12 ++++++------
 17_kernel_symbols/kernel/src/synchronization.rs      | 12 ++++++------
 18_backtrace/kernel/src/synchronization.rs           | 12 ++++++------
 X1_JTAG_boot/src/synchronization.rs                  |  4 ++--
 18 files changed, 64 insertions(+), 64 deletions(-)

diff --git a/04_safe_globals/README.md b/04_safe_globals/README.md
index 58c14dc27..b34c04f99 100644
--- a/04_safe_globals/README.md
+++ b/04_safe_globals/README.md
@@ -313,7 +313,7 @@ diff -uNr 03_hacky_hello_world/src/synchronization.rs 04_safe_globals/src/synchr
 +        type Data;
 +
 +        /// Locks the mutex and grants the closure temporary mutable access to the wrapped data.
-+        fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R;
++        fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R;
 +    }
 +}
 +
@@ -354,7 +354,7 @@ diff -uNr 03_hacky_hello_world/src/synchronization.rs 04_safe_globals/src/synchr
 +impl<T> interface::Mutex for NullLock<T> {
 +    type Data = T;
 +
-+    fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
++    fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R {
 +        // In a real lock, there would be code encapsulating this line that ensures that this
 +        // mutable reference will ever only be given out once at a time.
 +        let data = unsafe { &mut *self.data.get() };
diff --git a/04_safe_globals/src/synchronization.rs b/04_safe_globals/src/synchronization.rs
index d5653a19f..d3937b0de 100644
--- a/04_safe_globals/src/synchronization.rs
+++ b/04_safe_globals/src/synchronization.rs
@@ -26,7 +26,7 @@ pub mod interface {
         type Data;
 
         /// Locks the mutex and grants the closure temporary mutable access to the wrapped data.
-        fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R;
+        fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R;
     }
 }
 
@@ -67,7 +67,7 @@ impl<T> NullLock<T> {
 impl<T> interface::Mutex for NullLock<T> {
     type Data = T;
 
-    fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
+    fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R {
         // In a real lock, there would be code encapsulating this line that ensures that this
         // mutable reference will ever only be given out once at a time.
         let data = unsafe { &mut *self.data.get() };
diff --git a/05_drivers_gpio_uart/src/synchronization.rs b/05_drivers_gpio_uart/src/synchronization.rs
index d5653a19f..d3937b0de 100644
--- a/05_drivers_gpio_uart/src/synchronization.rs
+++ b/05_drivers_gpio_uart/src/synchronization.rs
@@ -26,7 +26,7 @@ pub mod interface {
         type Data;
 
         /// Locks the mutex and grants the closure temporary mutable access to the wrapped data.
-        fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R;
+        fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R;
     }
 }
 
@@ -67,7 +67,7 @@ impl<T> NullLock<T> {
 impl<T> interface::Mutex for NullLock<T> {
     type Data = T;
 
-    fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
+    fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R {
         // In a real lock, there would be code encapsulating this line that ensures that this
         // mutable reference will ever only be given out once at a time.
         let data = unsafe { &mut *self.data.get() };
diff --git a/06_uart_chainloader/src/synchronization.rs b/06_uart_chainloader/src/synchronization.rs
index d5653a19f..d3937b0de 100644
--- a/06_uart_chainloader/src/synchronization.rs
+++ b/06_uart_chainloader/src/synchronization.rs
@@ -26,7 +26,7 @@ pub mod interface {
         type Data;
 
         /// Locks the mutex and grants the closure temporary mutable access to the wrapped data.
-        fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R;
+        fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R;
     }
 }
 
@@ -67,7 +67,7 @@ impl<T> NullLock<T> {
 impl<T> interface::Mutex for NullLock<T> {
     type Data = T;
 
-    fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
+    fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R {
         // In a real lock, there would be code encapsulating this line that ensures that this
         // mutable reference will ever only be given out once at a time.
         let data = unsafe { &mut *self.data.get() };
diff --git a/07_timestamps/src/synchronization.rs b/07_timestamps/src/synchronization.rs
index d5653a19f..d3937b0de 100644
--- a/07_timestamps/src/synchronization.rs
+++ b/07_timestamps/src/synchronization.rs
@@ -26,7 +26,7 @@ pub mod interface {
         type Data;
 
         /// Locks the mutex and grants the closure temporary mutable access to the wrapped data.
-        fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R;
+        fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R;
     }
 }
 
@@ -67,7 +67,7 @@ impl<T> NullLock<T> {
 impl<T> interface::Mutex for NullLock<T> {
     type Data = T;
 
-    fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
+    fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R {
         // In a real lock, there would be code encapsulating this line that ensures that this
         // mutable reference will ever only be given out once at a time.
         let data = unsafe { &mut *self.data.get() };
diff --git a/08_hw_debug_JTAG/src/synchronization.rs b/08_hw_debug_JTAG/src/synchronization.rs
index d5653a19f..d3937b0de 100644
--- a/08_hw_debug_JTAG/src/synchronization.rs
+++ b/08_hw_debug_JTAG/src/synchronization.rs
@@ -26,7 +26,7 @@ pub mod interface {
         type Data;
 
         /// Locks the mutex and grants the closure temporary mutable access to the wrapped data.
-        fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R;
+        fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R;
     }
 }
 
@@ -67,7 +67,7 @@ impl<T> NullLock<T> {
 impl<T> interface::Mutex for NullLock<T> {
     type Data = T;
 
-    fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
+    fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R {
         // In a real lock, there would be code encapsulating this line that ensures that this
         // mutable reference will ever only be given out once at a time.
         let data = unsafe { &mut *self.data.get() };
diff --git a/09_privilege_level/src/synchronization.rs b/09_privilege_level/src/synchronization.rs
index d5653a19f..d3937b0de 100644
--- a/09_privilege_level/src/synchronization.rs
+++ b/09_privilege_level/src/synchronization.rs
@@ -26,7 +26,7 @@ pub mod interface {
         type Data;
 
         /// Locks the mutex and grants the closure temporary mutable access to the wrapped data.
-        fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R;
+        fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R;
     }
 }
 
@@ -67,7 +67,7 @@ impl<T> NullLock<T> {
 impl<T> interface::Mutex for NullLock<T> {
     type Data = T;
 
-    fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
+    fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R {
         // In a real lock, there would be code encapsulating this line that ensures that this
         // mutable reference will ever only be given out once at a time.
         let data = unsafe { &mut *self.data.get() };
diff --git a/10_virtual_mem_part1_identity_mapping/src/synchronization.rs b/10_virtual_mem_part1_identity_mapping/src/synchronization.rs
index d5653a19f..d3937b0de 100644
--- a/10_virtual_mem_part1_identity_mapping/src/synchronization.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/synchronization.rs
@@ -26,7 +26,7 @@ pub mod interface {
         type Data;
 
         /// Locks the mutex and grants the closure temporary mutable access to the wrapped data.
-        fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R;
+        fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R;
     }
 }
 
@@ -67,7 +67,7 @@ impl<T> NullLock<T> {
 impl<T> interface::Mutex for NullLock<T> {
     type Data = T;
 
-    fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
+    fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R {
         // In a real lock, there would be code encapsulating this line that ensures that this
         // mutable reference will ever only be given out once at a time.
         let data = unsafe { &mut *self.data.get() };
diff --git a/11_exceptions_part1_groundwork/src/synchronization.rs b/11_exceptions_part1_groundwork/src/synchronization.rs
index d5653a19f..d3937b0de 100644
--- a/11_exceptions_part1_groundwork/src/synchronization.rs
+++ b/11_exceptions_part1_groundwork/src/synchronization.rs
@@ -26,7 +26,7 @@ pub mod interface {
         type Data;
 
         /// Locks the mutex and grants the closure temporary mutable access to the wrapped data.
-        fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R;
+        fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R;
     }
 }
 
@@ -67,7 +67,7 @@ impl<T> NullLock<T> {
 impl<T> interface::Mutex for NullLock<T> {
     type Data = T;
 
-    fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
+    fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R {
         // In a real lock, there would be code encapsulating this line that ensures that this
         // mutable reference will ever only be given out once at a time.
         let data = unsafe { &mut *self.data.get() };
diff --git a/12_integrated_testing/kernel/src/synchronization.rs b/12_integrated_testing/kernel/src/synchronization.rs
index d5653a19f..d3937b0de 100644
--- a/12_integrated_testing/kernel/src/synchronization.rs
+++ b/12_integrated_testing/kernel/src/synchronization.rs
@@ -26,7 +26,7 @@ pub mod interface {
         type Data;
 
         /// Locks the mutex and grants the closure temporary mutable access to the wrapped data.
-        fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R;
+        fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R;
     }
 }
 
@@ -67,7 +67,7 @@ impl<T> NullLock<T> {
 impl<T> interface::Mutex for NullLock<T> {
     type Data = T;
 
-    fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
+    fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R {
         // In a real lock, there would be code encapsulating this line that ensures that this
         // mutable reference will ever only be given out once at a time.
         let data = unsafe { &mut *self.data.get() };
diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index 634686d66..9a5b7b4f8 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -2605,7 +2605,7 @@ diff -uNr 12_integrated_testing/kernel/src/synchronization.rs 13_exceptions_part
 +++ 13_exceptions_part2_peripheral_IRQs/kernel/src/synchronization.rs
 @@ -28,6 +28,21 @@
          /// Locks the mutex and grants the closure temporary mutable access to the wrapped data.
-         fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R;
+         fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R;
      }
 +
 +    /// A reader-writer exclusion type.
@@ -2617,10 +2617,10 @@ diff -uNr 12_integrated_testing/kernel/src/synchronization.rs 13_exceptions_part
 +        type Data;
 +
 +        /// Grants temporary mutable access to the encapsulated data.
-+        fn write<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R;
++        fn write<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R;
 +
 +        /// Grants temporary immutable access to the encapsulated data.
-+        fn read<R>(&self, f: impl FnOnce(&Self::Data) -> R) -> R;
++        fn read<'a, R>(&'a self, f: impl FnOnce(&'a Self::Data) -> R) -> R;
 +    }
  }
 
@@ -2682,7 +2682,7 @@ diff -uNr 12_integrated_testing/kernel/src/synchronization.rs 13_exceptions_part
 +impl<T> interface::Mutex for IRQSafeNullLock<T> {
      type Data = T;
 
-     fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
+     fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R {
 @@ -72,6 +110,50 @@
          // mutable reference will ever only be given out once at a time.
          let data = unsafe { &mut *self.data.get() };
@@ -2695,7 +2695,7 @@ diff -uNr 12_integrated_testing/kernel/src/synchronization.rs 13_exceptions_part
 +impl<T> interface::ReadWriteEx for InitStateLock<T> {
 +    type Data = T;
 +
-+    fn write<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
++    fn write<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R {
 +        assert!(
 +            state::state_manager().is_init(),
 +            "InitStateLock::write called after kernel init phase"
@@ -2710,7 +2710,7 @@ diff -uNr 12_integrated_testing/kernel/src/synchronization.rs 13_exceptions_part
          f(data)
      }
 +
-+    fn read<R>(&self, f: impl FnOnce(&Self::Data) -> R) -> R {
++    fn read<'a, R>(&'a self, f: impl FnOnce(&'a Self::Data) -> R) -> R {
 +        let data = unsafe { &*self.data.get() };
 +
 +        f(data)
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/synchronization.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/synchronization.rs
index 4b4c4c3fb..ab2b86e6f 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/synchronization.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/synchronization.rs
@@ -26,7 +26,7 @@ pub mod interface {
         type Data;
 
         /// Locks the mutex and grants the closure temporary mutable access to the wrapped data.
-        fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R;
+        fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R;
     }
 
     /// A reader-writer exclusion type.
@@ -38,10 +38,10 @@ pub mod interface {
         type Data;
 
         /// Grants temporary mutable access to the encapsulated data.
-        fn write<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R;
+        fn write<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R;
 
         /// Grants temporary immutable access to the encapsulated data.
-        fn read<R>(&self, f: impl FnOnce(&Self::Data) -> R) -> R;
+        fn read<'a, R>(&'a self, f: impl FnOnce(&'a Self::Data) -> R) -> R;
     }
 }
 
@@ -105,7 +105,7 @@ use crate::{exception, state};
 impl<T> interface::Mutex for IRQSafeNullLock<T> {
     type Data = T;
 
-    fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
+    fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R {
         // In a real lock, there would be code encapsulating this line that ensures that this
         // mutable reference will ever only be given out once at a time.
         let data = unsafe { &mut *self.data.get() };
@@ -118,7 +118,7 @@ impl<T> interface::Mutex for IRQSafeNullLock<T> {
 impl<T> interface::ReadWriteEx for InitStateLock<T> {
     type Data = T;
 
-    fn write<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
+    fn write<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R {
         assert!(
             state::state_manager().is_init(),
             "InitStateLock::write called after kernel init phase"
@@ -133,7 +133,7 @@ impl<T> interface::ReadWriteEx for InitStateLock<T> {
         f(data)
     }
 
-    fn read<R>(&self, f: impl FnOnce(&Self::Data) -> R) -> R {
+    fn read<'a, R>(&'a self, f: impl FnOnce(&'a Self::Data) -> R) -> R {
         let data = unsafe { &*self.data.get() };
 
         f(data)
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/synchronization.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/synchronization.rs
index 4b4c4c3fb..ab2b86e6f 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/synchronization.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/synchronization.rs
@@ -26,7 +26,7 @@ pub mod interface {
         type Data;
 
         /// Locks the mutex and grants the closure temporary mutable access to the wrapped data.
-        fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R;
+        fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R;
     }
 
     /// A reader-writer exclusion type.
@@ -38,10 +38,10 @@ pub mod interface {
         type Data;
 
         /// Grants temporary mutable access to the encapsulated data.
-        fn write<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R;
+        fn write<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R;
 
         /// Grants temporary immutable access to the encapsulated data.
-        fn read<R>(&self, f: impl FnOnce(&Self::Data) -> R) -> R;
+        fn read<'a, R>(&'a self, f: impl FnOnce(&'a Self::Data) -> R) -> R;
     }
 }
 
@@ -105,7 +105,7 @@ use crate::{exception, state};
 impl<T> interface::Mutex for IRQSafeNullLock<T> {
     type Data = T;
 
-    fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
+    fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R {
         // In a real lock, there would be code encapsulating this line that ensures that this
         // mutable reference will ever only be given out once at a time.
         let data = unsafe { &mut *self.data.get() };
@@ -118,7 +118,7 @@ impl<T> interface::Mutex for IRQSafeNullLock<T> {
 impl<T> interface::ReadWriteEx for InitStateLock<T> {
     type Data = T;
 
-    fn write<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
+    fn write<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R {
         assert!(
             state::state_manager().is_init(),
             "InitStateLock::write called after kernel init phase"
@@ -133,7 +133,7 @@ impl<T> interface::ReadWriteEx for InitStateLock<T> {
         f(data)
     }
 
-    fn read<R>(&self, f: impl FnOnce(&Self::Data) -> R) -> R {
+    fn read<'a, R>(&'a self, f: impl FnOnce(&'a Self::Data) -> R) -> R {
         let data = unsafe { &*self.data.get() };
 
         f(data)
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/synchronization.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/synchronization.rs
index 4b4c4c3fb..ab2b86e6f 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/synchronization.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/synchronization.rs
@@ -26,7 +26,7 @@ pub mod interface {
         type Data;
 
         /// Locks the mutex and grants the closure temporary mutable access to the wrapped data.
-        fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R;
+        fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R;
     }
 
     /// A reader-writer exclusion type.
@@ -38,10 +38,10 @@ pub mod interface {
         type Data;
 
         /// Grants temporary mutable access to the encapsulated data.
-        fn write<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R;
+        fn write<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R;
 
         /// Grants temporary immutable access to the encapsulated data.
-        fn read<R>(&self, f: impl FnOnce(&Self::Data) -> R) -> R;
+        fn read<'a, R>(&'a self, f: impl FnOnce(&'a Self::Data) -> R) -> R;
     }
 }
 
@@ -105,7 +105,7 @@ use crate::{exception, state};
 impl<T> interface::Mutex for IRQSafeNullLock<T> {
     type Data = T;
 
-    fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
+    fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R {
         // In a real lock, there would be code encapsulating this line that ensures that this
         // mutable reference will ever only be given out once at a time.
         let data = unsafe { &mut *self.data.get() };
@@ -118,7 +118,7 @@ impl<T> interface::Mutex for IRQSafeNullLock<T> {
 impl<T> interface::ReadWriteEx for InitStateLock<T> {
     type Data = T;
 
-    fn write<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
+    fn write<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R {
         assert!(
             state::state_manager().is_init(),
             "InitStateLock::write called after kernel init phase"
@@ -133,7 +133,7 @@ impl<T> interface::ReadWriteEx for InitStateLock<T> {
         f(data)
     }
 
-    fn read<R>(&self, f: impl FnOnce(&Self::Data) -> R) -> R {
+    fn read<'a, R>(&'a self, f: impl FnOnce(&'a Self::Data) -> R) -> R {
         let data = unsafe { &*self.data.get() };
 
         f(data)
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/synchronization.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/synchronization.rs
index 4b4c4c3fb..ab2b86e6f 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/synchronization.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/synchronization.rs
@@ -26,7 +26,7 @@ pub mod interface {
         type Data;
 
         /// Locks the mutex and grants the closure temporary mutable access to the wrapped data.
-        fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R;
+        fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R;
     }
 
     /// A reader-writer exclusion type.
@@ -38,10 +38,10 @@ pub mod interface {
         type Data;
 
         /// Grants temporary mutable access to the encapsulated data.
-        fn write<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R;
+        fn write<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R;
 
         /// Grants temporary immutable access to the encapsulated data.
-        fn read<R>(&self, f: impl FnOnce(&Self::Data) -> R) -> R;
+        fn read<'a, R>(&'a self, f: impl FnOnce(&'a Self::Data) -> R) -> R;
     }
 }
 
@@ -105,7 +105,7 @@ use crate::{exception, state};
 impl<T> interface::Mutex for IRQSafeNullLock<T> {
     type Data = T;
 
-    fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
+    fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R {
         // In a real lock, there would be code encapsulating this line that ensures that this
         // mutable reference will ever only be given out once at a time.
         let data = unsafe { &mut *self.data.get() };
@@ -118,7 +118,7 @@ impl<T> interface::Mutex for IRQSafeNullLock<T> {
 impl<T> interface::ReadWriteEx for InitStateLock<T> {
     type Data = T;
 
-    fn write<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
+    fn write<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R {
         assert!(
             state::state_manager().is_init(),
             "InitStateLock::write called after kernel init phase"
@@ -133,7 +133,7 @@ impl<T> interface::ReadWriteEx for InitStateLock<T> {
         f(data)
     }
 
-    fn read<R>(&self, f: impl FnOnce(&Self::Data) -> R) -> R {
+    fn read<'a, R>(&'a self, f: impl FnOnce(&'a Self::Data) -> R) -> R {
         let data = unsafe { &*self.data.get() };
 
         f(data)
diff --git a/17_kernel_symbols/kernel/src/synchronization.rs b/17_kernel_symbols/kernel/src/synchronization.rs
index 4b4c4c3fb..ab2b86e6f 100644
--- a/17_kernel_symbols/kernel/src/synchronization.rs
+++ b/17_kernel_symbols/kernel/src/synchronization.rs
@@ -26,7 +26,7 @@ pub mod interface {
         type Data;
 
         /// Locks the mutex and grants the closure temporary mutable access to the wrapped data.
-        fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R;
+        fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R;
     }
 
     /// A reader-writer exclusion type.
@@ -38,10 +38,10 @@ pub mod interface {
         type Data;
 
         /// Grants temporary mutable access to the encapsulated data.
-        fn write<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R;
+        fn write<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R;
 
         /// Grants temporary immutable access to the encapsulated data.
-        fn read<R>(&self, f: impl FnOnce(&Self::Data) -> R) -> R;
+        fn read<'a, R>(&'a self, f: impl FnOnce(&'a Self::Data) -> R) -> R;
     }
 }
 
@@ -105,7 +105,7 @@ use crate::{exception, state};
 impl<T> interface::Mutex for IRQSafeNullLock<T> {
     type Data = T;
 
-    fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
+    fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R {
         // In a real lock, there would be code encapsulating this line that ensures that this
         // mutable reference will ever only be given out once at a time.
         let data = unsafe { &mut *self.data.get() };
@@ -118,7 +118,7 @@ impl<T> interface::Mutex for IRQSafeNullLock<T> {
 impl<T> interface::ReadWriteEx for InitStateLock<T> {
     type Data = T;
 
-    fn write<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
+    fn write<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R {
         assert!(
             state::state_manager().is_init(),
             "InitStateLock::write called after kernel init phase"
@@ -133,7 +133,7 @@ impl<T> interface::ReadWriteEx for InitStateLock<T> {
         f(data)
     }
 
-    fn read<R>(&self, f: impl FnOnce(&Self::Data) -> R) -> R {
+    fn read<'a, R>(&'a self, f: impl FnOnce(&'a Self::Data) -> R) -> R {
         let data = unsafe { &*self.data.get() };
 
         f(data)
diff --git a/18_backtrace/kernel/src/synchronization.rs b/18_backtrace/kernel/src/synchronization.rs
index 4b4c4c3fb..ab2b86e6f 100644
--- a/18_backtrace/kernel/src/synchronization.rs
+++ b/18_backtrace/kernel/src/synchronization.rs
@@ -26,7 +26,7 @@ pub mod interface {
         type Data;
 
         /// Locks the mutex and grants the closure temporary mutable access to the wrapped data.
-        fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R;
+        fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R;
     }
 
     /// A reader-writer exclusion type.
@@ -38,10 +38,10 @@ pub mod interface {
         type Data;
 
         /// Grants temporary mutable access to the encapsulated data.
-        fn write<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R;
+        fn write<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R;
 
         /// Grants temporary immutable access to the encapsulated data.
-        fn read<R>(&self, f: impl FnOnce(&Self::Data) -> R) -> R;
+        fn read<'a, R>(&'a self, f: impl FnOnce(&'a Self::Data) -> R) -> R;
     }
 }
 
@@ -105,7 +105,7 @@ use crate::{exception, state};
 impl<T> interface::Mutex for IRQSafeNullLock<T> {
     type Data = T;
 
-    fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
+    fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R {
         // In a real lock, there would be code encapsulating this line that ensures that this
         // mutable reference will ever only be given out once at a time.
         let data = unsafe { &mut *self.data.get() };
@@ -118,7 +118,7 @@ impl<T> interface::Mutex for IRQSafeNullLock<T> {
 impl<T> interface::ReadWriteEx for InitStateLock<T> {
     type Data = T;
 
-    fn write<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
+    fn write<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R {
         assert!(
             state::state_manager().is_init(),
             "InitStateLock::write called after kernel init phase"
@@ -133,7 +133,7 @@ impl<T> interface::ReadWriteEx for InitStateLock<T> {
         f(data)
     }
 
-    fn read<R>(&self, f: impl FnOnce(&Self::Data) -> R) -> R {
+    fn read<'a, R>(&'a self, f: impl FnOnce(&'a Self::Data) -> R) -> R {
         let data = unsafe { &*self.data.get() };
 
         f(data)
diff --git a/X1_JTAG_boot/src/synchronization.rs b/X1_JTAG_boot/src/synchronization.rs
index d5653a19f..d3937b0de 100644
--- a/X1_JTAG_boot/src/synchronization.rs
+++ b/X1_JTAG_boot/src/synchronization.rs
@@ -26,7 +26,7 @@ pub mod interface {
         type Data;
 
         /// Locks the mutex and grants the closure temporary mutable access to the wrapped data.
-        fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R;
+        fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R;
     }
 }
 
@@ -67,7 +67,7 @@ impl<T> NullLock<T> {
 impl<T> interface::Mutex for NullLock<T> {
     type Data = T;
 
-    fn lock<R>(&self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
+    fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R {
         // In a real lock, there would be code encapsulating this line that ensures that this
         // mutable reference will ever only be given out once at a time.
         let data = unsafe { &mut *self.data.get() };

From 2cd44c3e7f3f6b829f351041a75053b9ca3795d8 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Tue, 17 May 2022 23:24:45 +0200
Subject: [PATCH 171/214] Add tutorial 19

---
 19_kernel_heap/.cargo/config.toml             |    2 +
 19_kernel_heap/.vscode/settings.json          |   10 +
 19_kernel_heap/Cargo.lock                     |  103 ++
 19_kernel_heap/Cargo.toml                     |   11 +
 19_kernel_heap/Makefile                       |  394 +++++
 19_kernel_heap/README.md                      | 1356 +++++++++++++++++
 19_kernel_heap/kernel/Cargo.lock              |   96 ++
 19_kernel_heap/kernel/Cargo.toml              |   72 +
 19_kernel_heap/kernel/build.rs                |   20 +
 .../kernel/src/_arch/aarch64/backtrace.rs     |  136 ++
 .../kernel/src/_arch/aarch64/cpu.rs           |   49 +
 .../kernel/src/_arch/aarch64/cpu/boot.rs      |  117 ++
 .../kernel/src/_arch/aarch64/cpu/boot.s       |   97 ++
 .../kernel/src/_arch/aarch64/cpu/smp.rs       |   30 +
 .../kernel/src/_arch/aarch64/exception.rs     |  325 ++++
 .../kernel/src/_arch/aarch64/exception.s      |  190 +++
 .../_arch/aarch64/exception/asynchronous.rs   |  152 ++
 .../kernel/src/_arch/aarch64/memory/mmu.rs    |  158 ++
 .../aarch64/memory/mmu/translation_table.rs   |  521 +++++++
 .../kernel/src/_arch/aarch64/time.rs          |  121 ++
 19_kernel_heap/kernel/src/backtrace.rs        |  114 ++
 19_kernel_heap/kernel/src/bsp.rs              |   13 +
 .../kernel/src/bsp/device_driver.rs           |   16 +
 .../kernel/src/bsp/device_driver/arm.rs       |    9 +
 .../kernel/src/bsp/device_driver/arm/gicv2.rs |  242 +++
 .../src/bsp/device_driver/arm/gicv2/gicc.rs   |  145 ++
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |  201 +++
 .../kernel/src/bsp/device_driver/bcm.rs       |   15 +
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  233 +++
 .../bcm/bcm2xxx_interrupt_controller.rs       |  147 ++
 .../peripheral_ic.rs                          |  175 +++
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  524 +++++++
 .../kernel/src/bsp/device_driver/common.rs    |   39 +
 19_kernel_heap/kernel/src/bsp/raspberrypi.rs  |   27 +
 .../kernel/src/bsp/raspberrypi/cpu.rs         |   14 +
 .../kernel/src/bsp/raspberrypi/driver.rs      |  190 +++
 .../kernel/src/bsp/raspberrypi/exception.rs   |    7 +
 .../bsp/raspberrypi/exception/asynchronous.rs |   25 +
 .../kernel/src/bsp/raspberrypi/kernel.ld      |  127 ++
 .../kernel_virt_addr_space_size.ld            |    1 +
 .../kernel/src/bsp/raspberrypi/memory.rs      |  251 +++
 .../kernel/src/bsp/raspberrypi/memory/mmu.rs  |  197 +++
 19_kernel_heap/kernel/src/common.rs           |   46 +
 19_kernel_heap/kernel/src/console.rs          |   93 ++
 .../kernel/src/console/buffer_console.rs      |  108 ++
 19_kernel_heap/kernel/src/cpu.rs              |   21 +
 19_kernel_heap/kernel/src/cpu/boot.rs         |    9 +
 19_kernel_heap/kernel/src/cpu/smp.rs          |   14 +
 19_kernel_heap/kernel/src/driver.rs           |   57 +
 19_kernel_heap/kernel/src/exception.rs        |   48 +
 .../kernel/src/exception/asynchronous.rs      |  178 +++
 .../asynchronous/null_irq_manager.rs          |   44 +
 19_kernel_heap/kernel/src/lib.rs              |  195 +++
 19_kernel_heap/kernel/src/main.rs             |  102 ++
 19_kernel_heap/kernel/src/memory.rs           |  198 +++
 .../kernel/src/memory/heap_alloc.rs           |  137 ++
 19_kernel_heap/kernel/src/memory/mmu.rs       |  262 ++++
 .../kernel/src/memory/mmu/mapping_record.rs   |  204 +++
 .../kernel/src/memory/mmu/page_alloc.rs       |   70 +
 .../src/memory/mmu/translation_table.rs       |  137 ++
 19_kernel_heap/kernel/src/memory/mmu/types.rs |  378 +++++
 19_kernel_heap/kernel/src/panic_wait.rs       |   90 ++
 19_kernel_heap/kernel/src/print.rs            |  124 ++
 19_kernel_heap/kernel/src/state.rs            |   92 ++
 19_kernel_heap/kernel/src/symbols.rs          |   87 ++
 19_kernel_heap/kernel/src/synchronization.rs  |  159 ++
 19_kernel_heap/kernel/src/time.rs             |   37 +
 .../kernel/tests/00_console_sanity.rb         |   48 +
 .../kernel/tests/00_console_sanity.rs         |   39 +
 .../kernel/tests/01_timer_sanity.rs           |   52 +
 .../tests/02_exception_sync_page_fault.rs     |   39 +
 .../tests/03_exception_restore_sanity.rb      |   25 +
 .../tests/03_exception_restore_sanity.rs      |   51 +
 .../kernel/tests/04_exception_irq_sanity.rs   |   69 +
 .../kernel/tests/05_backtrace_sanity.rb       |   39 +
 .../kernel/tests/05_backtrace_sanity.rs       |   33 +
 .../tests/06_backtrace_invalid_frame.rb       |   26 +
 .../tests/06_backtrace_invalid_frame.rs       |   35 +
 .../kernel/tests/07_backtrace_invalid_link.rb |   25 +
 .../kernel/tests/07_backtrace_invalid_link.rs |   40 +
 .../kernel/tests/boot_test_string.rb          |    3 +
 .../kernel/tests/panic_exit_success/mod.rs    |    9 +
 .../kernel/tests/panic_wait_forever/mod.rs    |    9 +
 19_kernel_heap/kernel_symbols.mk              |  103 ++
 19_kernel_heap/kernel_symbols/Cargo.lock      |   14 +
 19_kernel_heap/kernel_symbols/Cargo.toml      |   15 +
 19_kernel_heap/kernel_symbols/build.rs        |   14 +
 .../kernel_symbols/kernel_symbols.ld          |   15 +
 19_kernel_heap/kernel_symbols/src/main.rs     |   16 +
 .../libraries/debug-symbol-types/Cargo.toml   |    4 +
 .../libraries/debug-symbol-types/src/lib.rs   |   45 +
 .../libraries/test-macros/Cargo.toml          |   14 +
 .../libraries/test-macros/src/lib.rs          |   29 +
 .../libraries/test-types/Cargo.toml           |    5 +
 .../libraries/test-types/src/lib.rs           |   16 +
 .../tools/kernel_symbols_tool/cmds.rb         |   45 +
 .../tools/kernel_symbols_tool/kernel_elf.rb   |   74 +
 .../tools/kernel_symbols_tool/main.rb         |   47 +
 .../tools/translation_table_tool/arch.rb      |  314 ++++
 .../tools/translation_table_tool/bsp.rb       |   54 +
 .../tools/translation_table_tool/generic.rb   |  189 +++
 .../translation_table_tool/kernel_elf.rb      |   96 ++
 .../tools/translation_table_tool/main.rb      |   46 +
 103 files changed, 11259 insertions(+)
 create mode 100644 19_kernel_heap/.cargo/config.toml
 create mode 100644 19_kernel_heap/.vscode/settings.json
 create mode 100644 19_kernel_heap/Cargo.lock
 create mode 100644 19_kernel_heap/Cargo.toml
 create mode 100644 19_kernel_heap/Makefile
 create mode 100644 19_kernel_heap/README.md
 create mode 100644 19_kernel_heap/kernel/Cargo.lock
 create mode 100644 19_kernel_heap/kernel/Cargo.toml
 create mode 100644 19_kernel_heap/kernel/build.rs
 create mode 100644 19_kernel_heap/kernel/src/_arch/aarch64/backtrace.rs
 create mode 100644 19_kernel_heap/kernel/src/_arch/aarch64/cpu.rs
 create mode 100644 19_kernel_heap/kernel/src/_arch/aarch64/cpu/boot.rs
 create mode 100644 19_kernel_heap/kernel/src/_arch/aarch64/cpu/boot.s
 create mode 100644 19_kernel_heap/kernel/src/_arch/aarch64/cpu/smp.rs
 create mode 100644 19_kernel_heap/kernel/src/_arch/aarch64/exception.rs
 create mode 100644 19_kernel_heap/kernel/src/_arch/aarch64/exception.s
 create mode 100644 19_kernel_heap/kernel/src/_arch/aarch64/exception/asynchronous.rs
 create mode 100644 19_kernel_heap/kernel/src/_arch/aarch64/memory/mmu.rs
 create mode 100644 19_kernel_heap/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
 create mode 100644 19_kernel_heap/kernel/src/_arch/aarch64/time.rs
 create mode 100644 19_kernel_heap/kernel/src/backtrace.rs
 create mode 100644 19_kernel_heap/kernel/src/bsp.rs
 create mode 100644 19_kernel_heap/kernel/src/bsp/device_driver.rs
 create mode 100644 19_kernel_heap/kernel/src/bsp/device_driver/arm.rs
 create mode 100644 19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2.rs
 create mode 100644 19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
 create mode 100644 19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
 create mode 100644 19_kernel_heap/kernel/src/bsp/device_driver/bcm.rs
 create mode 100644 19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 create mode 100644 19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
 create mode 100644 19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
 create mode 100644 19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 create mode 100644 19_kernel_heap/kernel/src/bsp/device_driver/common.rs
 create mode 100644 19_kernel_heap/kernel/src/bsp/raspberrypi.rs
 create mode 100644 19_kernel_heap/kernel/src/bsp/raspberrypi/cpu.rs
 create mode 100644 19_kernel_heap/kernel/src/bsp/raspberrypi/driver.rs
 create mode 100644 19_kernel_heap/kernel/src/bsp/raspberrypi/exception.rs
 create mode 100644 19_kernel_heap/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
 create mode 100644 19_kernel_heap/kernel/src/bsp/raspberrypi/kernel.ld
 create mode 100644 19_kernel_heap/kernel/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
 create mode 100644 19_kernel_heap/kernel/src/bsp/raspberrypi/memory.rs
 create mode 100644 19_kernel_heap/kernel/src/bsp/raspberrypi/memory/mmu.rs
 create mode 100644 19_kernel_heap/kernel/src/common.rs
 create mode 100644 19_kernel_heap/kernel/src/console.rs
 create mode 100644 19_kernel_heap/kernel/src/console/buffer_console.rs
 create mode 100644 19_kernel_heap/kernel/src/cpu.rs
 create mode 100644 19_kernel_heap/kernel/src/cpu/boot.rs
 create mode 100644 19_kernel_heap/kernel/src/cpu/smp.rs
 create mode 100644 19_kernel_heap/kernel/src/driver.rs
 create mode 100644 19_kernel_heap/kernel/src/exception.rs
 create mode 100644 19_kernel_heap/kernel/src/exception/asynchronous.rs
 create mode 100644 19_kernel_heap/kernel/src/exception/asynchronous/null_irq_manager.rs
 create mode 100644 19_kernel_heap/kernel/src/lib.rs
 create mode 100644 19_kernel_heap/kernel/src/main.rs
 create mode 100644 19_kernel_heap/kernel/src/memory.rs
 create mode 100644 19_kernel_heap/kernel/src/memory/heap_alloc.rs
 create mode 100644 19_kernel_heap/kernel/src/memory/mmu.rs
 create mode 100644 19_kernel_heap/kernel/src/memory/mmu/mapping_record.rs
 create mode 100644 19_kernel_heap/kernel/src/memory/mmu/page_alloc.rs
 create mode 100644 19_kernel_heap/kernel/src/memory/mmu/translation_table.rs
 create mode 100644 19_kernel_heap/kernel/src/memory/mmu/types.rs
 create mode 100644 19_kernel_heap/kernel/src/panic_wait.rs
 create mode 100644 19_kernel_heap/kernel/src/print.rs
 create mode 100644 19_kernel_heap/kernel/src/state.rs
 create mode 100644 19_kernel_heap/kernel/src/symbols.rs
 create mode 100644 19_kernel_heap/kernel/src/synchronization.rs
 create mode 100644 19_kernel_heap/kernel/src/time.rs
 create mode 100644 19_kernel_heap/kernel/tests/00_console_sanity.rb
 create mode 100644 19_kernel_heap/kernel/tests/00_console_sanity.rs
 create mode 100644 19_kernel_heap/kernel/tests/01_timer_sanity.rs
 create mode 100644 19_kernel_heap/kernel/tests/02_exception_sync_page_fault.rs
 create mode 100644 19_kernel_heap/kernel/tests/03_exception_restore_sanity.rb
 create mode 100644 19_kernel_heap/kernel/tests/03_exception_restore_sanity.rs
 create mode 100644 19_kernel_heap/kernel/tests/04_exception_irq_sanity.rs
 create mode 100644 19_kernel_heap/kernel/tests/05_backtrace_sanity.rb
 create mode 100644 19_kernel_heap/kernel/tests/05_backtrace_sanity.rs
 create mode 100644 19_kernel_heap/kernel/tests/06_backtrace_invalid_frame.rb
 create mode 100644 19_kernel_heap/kernel/tests/06_backtrace_invalid_frame.rs
 create mode 100644 19_kernel_heap/kernel/tests/07_backtrace_invalid_link.rb
 create mode 100644 19_kernel_heap/kernel/tests/07_backtrace_invalid_link.rs
 create mode 100644 19_kernel_heap/kernel/tests/boot_test_string.rb
 create mode 100644 19_kernel_heap/kernel/tests/panic_exit_success/mod.rs
 create mode 100644 19_kernel_heap/kernel/tests/panic_wait_forever/mod.rs
 create mode 100644 19_kernel_heap/kernel_symbols.mk
 create mode 100644 19_kernel_heap/kernel_symbols/Cargo.lock
 create mode 100644 19_kernel_heap/kernel_symbols/Cargo.toml
 create mode 100644 19_kernel_heap/kernel_symbols/build.rs
 create mode 100644 19_kernel_heap/kernel_symbols/kernel_symbols.ld
 create mode 100644 19_kernel_heap/kernel_symbols/src/main.rs
 create mode 100644 19_kernel_heap/libraries/debug-symbol-types/Cargo.toml
 create mode 100644 19_kernel_heap/libraries/debug-symbol-types/src/lib.rs
 create mode 100644 19_kernel_heap/libraries/test-macros/Cargo.toml
 create mode 100644 19_kernel_heap/libraries/test-macros/src/lib.rs
 create mode 100644 19_kernel_heap/libraries/test-types/Cargo.toml
 create mode 100644 19_kernel_heap/libraries/test-types/src/lib.rs
 create mode 100644 19_kernel_heap/tools/kernel_symbols_tool/cmds.rb
 create mode 100644 19_kernel_heap/tools/kernel_symbols_tool/kernel_elf.rb
 create mode 100755 19_kernel_heap/tools/kernel_symbols_tool/main.rb
 create mode 100644 19_kernel_heap/tools/translation_table_tool/arch.rb
 create mode 100644 19_kernel_heap/tools/translation_table_tool/bsp.rb
 create mode 100644 19_kernel_heap/tools/translation_table_tool/generic.rb
 create mode 100644 19_kernel_heap/tools/translation_table_tool/kernel_elf.rb
 create mode 100755 19_kernel_heap/tools/translation_table_tool/main.rb

diff --git a/19_kernel_heap/.cargo/config.toml b/19_kernel_heap/.cargo/config.toml
new file mode 100644
index 000000000..e34764853
--- /dev/null
+++ b/19_kernel_heap/.cargo/config.toml
@@ -0,0 +1,2 @@
+[target.'cfg(target_os = "none")']
+runner = "target/kernel_test_runner.sh"
diff --git a/19_kernel_heap/.vscode/settings.json b/19_kernel_heap/.vscode/settings.json
new file mode 100644
index 000000000..292bf2a93
--- /dev/null
+++ b/19_kernel_heap/.vscode/settings.json
@@ -0,0 +1,10 @@
+{
+  "editor.formatOnSave": true,
+  "editor.rulers": [100],
+  "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
+  "rust-analyzer.cargo.features": ["bsp_rpi3"],
+  "rust-analyzer.checkOnSave.allTargets": false,
+  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
+  "rust-analyzer.lens.debug": false,
+  "rust-analyzer.lens.run": false
+}
diff --git a/19_kernel_heap/Cargo.lock b/19_kernel_heap/Cargo.lock
new file mode 100644
index 000000000..e1d354993
--- /dev/null
+++ b/19_kernel_heap/Cargo.lock
@@ -0,0 +1,103 @@
+# This file is automatically @generated by Cargo.
+# It is not intended for manual editing.
+version = 3
+
+[[package]]
+name = "cortex-a"
+version = "7.2.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
+dependencies = [
+ "tock-registers",
+]
+
+[[package]]
+name = "debug-symbol-types"
+version = "0.1.0"
+
+[[package]]
+name = "kernel_symbols"
+version = "0.1.0"
+dependencies = [
+ "debug-symbol-types",
+]
+
+[[package]]
+name = "linked_list_allocator"
+version = "0.9.1"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "549ce1740e46b291953c4340adcd74c59bcf4308f4cac050fd33ba91b7168f4a"
+
+[[package]]
+name = "mingo"
+version = "0.19.0"
+dependencies = [
+ "cortex-a",
+ "debug-symbol-types",
+ "linked_list_allocator",
+ "qemu-exit",
+ "test-macros",
+ "test-types",
+ "tock-registers",
+]
+
+[[package]]
+name = "proc-macro2"
+version = "1.0.37"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "ec757218438d5fda206afc041538b2f6d889286160d649a86a24d37e1235afd1"
+dependencies = [
+ "unicode-xid",
+]
+
+[[package]]
+name = "qemu-exit"
+version = "3.0.1"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
+
+[[package]]
+name = "quote"
+version = "1.0.18"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "a1feb54ed693b93a84e14094943b84b7c4eae204c512b7ccb95ab0c66d278ad1"
+dependencies = [
+ "proc-macro2",
+]
+
+[[package]]
+name = "syn"
+version = "1.0.91"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "b683b2b825c8eef438b77c36a06dc262294da3d5a5813fac20da149241dcd44d"
+dependencies = [
+ "proc-macro2",
+ "quote",
+ "unicode-xid",
+]
+
+[[package]]
+name = "test-macros"
+version = "0.1.0"
+dependencies = [
+ "proc-macro2",
+ "quote",
+ "syn",
+ "test-types",
+]
+
+[[package]]
+name = "test-types"
+version = "0.1.0"
+
+[[package]]
+name = "tock-registers"
+version = "0.7.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
+
+[[package]]
+name = "unicode-xid"
+version = "0.2.2"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "8ccb82d61f80a663efe1f787a51b16b5a51e3314d6ac365b08639f52387b33f3"
diff --git a/19_kernel_heap/Cargo.toml b/19_kernel_heap/Cargo.toml
new file mode 100644
index 000000000..38eeb1165
--- /dev/null
+++ b/19_kernel_heap/Cargo.toml
@@ -0,0 +1,11 @@
+[workspace]
+
+members = [
+        "libraries/*",
+        "kernel",
+        "kernel_symbols"
+]
+
+[profile.release]
+lto = true
+debug = true
diff --git a/19_kernel_heap/Makefile b/19_kernel_heap/Makefile
new file mode 100644
index 000000000..bd1bc8037
--- /dev/null
+++ b/19_kernel_heap/Makefile
@@ -0,0 +1,394 @@
+## SPDX-License-Identifier: MIT OR Apache-2.0
+##
+## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+include ../common/format.mk
+include ../common/docker.mk
+
+##--------------------------------------------------------------------------------------------------
+## Optional, user-provided configuration values
+##--------------------------------------------------------------------------------------------------
+
+# Default to the RPi3.
+BSP ?= rpi3
+
+# Default to a serial device name that is common in Linux.
+DEV_SERIAL ?= /dev/ttyUSB0
+
+# Optional debug prints.
+ifdef DEBUG_PRINTS
+    FEATURES = --features debug_prints
+endif
+
+# Optional integration test name.
+ifdef TEST
+    TEST_ARG = --test $(TEST)
+else
+    TEST_ARG = --test '*'
+endif
+
+
+
+##--------------------------------------------------------------------------------------------------
+## BSP-specific configuration values
+##--------------------------------------------------------------------------------------------------
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+
+ifeq ($(BSP),rpi3)
+    TARGET            = aarch64-unknown-none-softfloat
+    KERNEL_BIN        = kernel8.img
+    QEMU_BINARY       = qemu-system-aarch64
+    QEMU_MACHINE_TYPE = raspi3
+    QEMU_RELEASE_ARGS = -serial stdio -display none
+    QEMU_TEST_ARGS    = $(QEMU_RELEASE_ARGS) -semihosting
+    OBJDUMP_BINARY    = aarch64-none-elf-objdump
+    NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
+    OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
+    JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
+    LD_SCRIPT_PATH    = $(shell pwd)/kernel/src/bsp/raspberrypi
+    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53 -C force-frame-pointers
+else ifeq ($(BSP),rpi4)
+    TARGET            = aarch64-unknown-none-softfloat
+    KERNEL_BIN        = kernel8.img
+    QEMU_BINARY       = qemu-system-aarch64
+    QEMU_MACHINE_TYPE =
+    QEMU_RELEASE_ARGS = -serial stdio -display none
+    QEMU_TEST_ARGS    = $(QEMU_RELEASE_ARGS) -semihosting
+    OBJDUMP_BINARY    = aarch64-none-elf-objdump
+    NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
+    OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
+    JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
+    LD_SCRIPT_PATH    = $(shell pwd)/kernel/src/bsp/raspberrypi
+    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72 -C force-frame-pointers
+endif
+
+# Export for build.rs.
+export LD_SCRIPT_PATH
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Targets and Prerequisites
+##--------------------------------------------------------------------------------------------------
+KERNEL_MANIFEST      = kernel/Cargo.toml
+KERNEL_LINKER_SCRIPT = kernel.ld
+LAST_BUILD_CONFIG    = target/$(BSP)_$(DEBUG_PRINTS).build_config
+
+KERNEL_ELF_RAW      = target/$(TARGET)/release/kernel
+# This parses cargo's dep-info file.
+# https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
+KERNEL_ELF_RAW_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
+
+##------------------------------------------------------------------------------
+## Translation tables
+##------------------------------------------------------------------------------
+TT_TOOL_PATH = tools/translation_table_tool
+
+KERNEL_ELF_TTABLES      = target/$(TARGET)/release/kernel+ttables
+KERNEL_ELF_TTABLES_DEPS = $(KERNEL_ELF_RAW) $(wildcard $(TT_TOOL_PATH)/*)
+
+##------------------------------------------------------------------------------
+## Kernel symbols
+##------------------------------------------------------------------------------
+export KERNEL_SYMBOLS_TOOL_PATH = tools/kernel_symbols_tool
+
+KERNEL_ELF_TTABLES_SYMS = target/$(TARGET)/release/kernel+ttables+symbols
+
+# Unlike with KERNEL_ELF_RAW, we are not relying on dep-info here. One of the reasons being that the
+# name of the generated symbols file varies between runs, which can cause confusion.
+KERNEL_ELF_TTABLES_SYMS_DEPS = $(KERNEL_ELF_TTABLES) \
+    $(wildcard kernel_symbols/*)                     \
+    $(wildcard $(KERNEL_SYMBOLS_TOOL_PATH)/*)
+
+export TARGET
+export KERNEL_SYMBOLS_INPUT_ELF  = $(KERNEL_ELF_TTABLES)
+export KERNEL_SYMBOLS_OUTPUT_ELF = $(KERNEL_ELF_TTABLES_SYMS)
+
+KERNEL_ELF = $(KERNEL_ELF_TTABLES_SYMS)
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Command building blocks
+##--------------------------------------------------------------------------------------------------
+RUSTFLAGS = $(RUSTC_MISC_ARGS)                   \
+    -C link-arg=--library-path=$(LD_SCRIPT_PATH) \
+    -C link-arg=--script=$(KERNEL_LINKER_SCRIPT)
+
+RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) \
+    -D warnings                   \
+    -D missing_docs
+
+FEATURES     += --features bsp_$(BSP)
+COMPILER_ARGS = --target=$(TARGET) \
+    $(FEATURES)                    \
+    --release
+
+# build-std can be skipped for helper commands that do not rely on correct stack frames and other
+# custom compiler options. This results in a huge speedup.
+RUSTC_CMD   = cargo rustc $(COMPILER_ARGS) -Z build-std=core,alloc --manifest-path $(KERNEL_MANIFEST)
+DOC_CMD     = cargo doc $(COMPILER_ARGS)
+CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
+TEST_CMD    = cargo test $(COMPILER_ARGS) -Z build-std=core,alloc --manifest-path $(KERNEL_MANIFEST)
+OBJCOPY_CMD = rust-objcopy \
+    --strip-all            \
+    -O binary
+
+EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
+EXEC_TT_TOOL       = ruby $(TT_TOOL_PATH)/main.rb
+EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
+EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
+
+##------------------------------------------------------------------------------
+## Dockerization
+##------------------------------------------------------------------------------
+DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
+DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
+DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
+DOCKER_ARG_DIR_JTAG   = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
+DOCKER_ARG_DEV        = --privileged -v /dev:/dev
+DOCKER_ARG_NET        = --network host
+
+# DOCKER_IMAGE defined in include file (see top of this file).
+DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
+DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
+DOCKER_GDB   = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
+
+# Dockerize commands, which require USB device passthrough, only on Linux.
+ifeq ($(shell uname -s),Linux)
+    DOCKER_CMD_DEV = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DEV)
+
+    DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
+    DOCKER_JTAGBOOT  = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_ARG_DIR_JTAG) $(DOCKER_IMAGE)
+    DOCKER_OPENOCD   = $(DOCKER_CMD_DEV) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
+else
+    DOCKER_OPENOCD   = echo "Not yet supported on non-Linux systems."; \#
+endif
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: all doc qemu chainboot clippy clean readelf objdump nm check
+
+all: $(KERNEL_BIN)
+
+##------------------------------------------------------------------------------
+## Save the configuration as a file, so make understands if it changed.
+##------------------------------------------------------------------------------
+$(LAST_BUILD_CONFIG):
+	@rm -f target/*.build_config
+	@mkdir -p target
+	@touch $(LAST_BUILD_CONFIG)
+
+##------------------------------------------------------------------------------
+## Compile the kernel ELF
+##------------------------------------------------------------------------------
+$(KERNEL_ELF_RAW): $(KERNEL_ELF_RAW_DEPS)
+	$(call color_header, "Compiling kernel ELF - $(BSP)")
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
+
+##------------------------------------------------------------------------------
+## Precompute the kernel translation tables and patch them into the kernel ELF
+##------------------------------------------------------------------------------
+$(KERNEL_ELF_TTABLES): $(KERNEL_ELF_TTABLES_DEPS)
+	$(call color_header, "Precomputing kernel translation tables and patching kernel ELF")
+	@cp $(KERNEL_ELF_RAW) $(KERNEL_ELF_TTABLES)
+	@$(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(BSP) $(KERNEL_ELF_TTABLES)
+
+##------------------------------------------------------------------------------
+## Generate kernel symbols and patch them into the kernel ELF
+##------------------------------------------------------------------------------
+$(KERNEL_ELF_TTABLES_SYMS): $(KERNEL_ELF_TTABLES_SYMS_DEPS)
+	$(call color_header, "Generating kernel symbols and patching kernel ELF")
+	@time -f "in %es" \
+                $(MAKE) --no-print-directory -f kernel_symbols.mk
+
+##------------------------------------------------------------------------------
+## Generate the stripped kernel binary
+##------------------------------------------------------------------------------
+$(KERNEL_BIN): $(KERNEL_ELF_TTABLES_SYMS)
+	$(call color_header, "Generating stripped binary")
+	@$(OBJCOPY_CMD) $(KERNEL_ELF_TTABLES_SYMS) $(KERNEL_BIN)
+	$(call color_progress_prefix, "Name")
+	@echo $(KERNEL_BIN)
+	$(call color_progress_prefix, "Size")
+	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
+
+##------------------------------------------------------------------------------
+## Generate the documentation
+##------------------------------------------------------------------------------
+doc: clean
+	$(call color_header, "Generating docs")
+	@$(DOC_CMD) --document-private-items --open
+
+##------------------------------------------------------------------------------
+## Run the kernel in QEMU
+##------------------------------------------------------------------------------
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
+qemu:
+	$(call color_header, "$(QEMU_MISSING_STRING)")
+
+else # QEMU is supported.
+
+qemu: $(KERNEL_BIN)
+	$(call color_header, "Launching QEMU")
+	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
+
+endif
+
+##------------------------------------------------------------------------------
+## Push the kernel to the real HW target
+##------------------------------------------------------------------------------
+chainboot: $(KERNEL_BIN)
+	@$(DOCKER_CHAINBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(KERNEL_BIN)
+
+##------------------------------------------------------------------------------
+## Run clippy
+##------------------------------------------------------------------------------
+clippy:
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD) --features test_build --tests \
+                --manifest-path $(KERNEL_MANIFEST)
+
+##------------------------------------------------------------------------------
+## Clean
+##------------------------------------------------------------------------------
+clean:
+	rm -rf target $(KERNEL_BIN)
+
+##------------------------------------------------------------------------------
+## Run readelf
+##------------------------------------------------------------------------------
+readelf: $(KERNEL_ELF)
+	$(call color_header, "Launching readelf")
+	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
+
+##------------------------------------------------------------------------------
+## Run objdump
+##------------------------------------------------------------------------------
+objdump: $(KERNEL_ELF)
+	$(call color_header, "Launching objdump")
+	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
+                --section .text   \
+                --section .rodata \
+                --section .got    \
+                $(KERNEL_ELF) | rustfilt
+
+##------------------------------------------------------------------------------
+## Run nm
+##------------------------------------------------------------------------------
+nm: $(KERNEL_ELF)
+	$(call color_header, "Launching nm")
+	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Debugging targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: jtagboot openocd gdb gdb-opt0
+
+##------------------------------------------------------------------------------
+## Push the JTAG boot image to the real HW target
+##------------------------------------------------------------------------------
+jtagboot:
+	@$(DOCKER_JTAGBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(JTAG_BOOT_IMAGE)
+
+##------------------------------------------------------------------------------
+## Start OpenOCD session
+##------------------------------------------------------------------------------
+openocd:
+	$(call color_header, "Launching OpenOCD")
+	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
+
+##------------------------------------------------------------------------------
+## Start GDB session
+##------------------------------------------------------------------------------
+gdb-opt0: RUSTC_MISC_ARGS += -C opt-level=0
+gdb gdb-opt0: $(KERNEL_ELF)
+	$(call color_header, "Launching GDB")
+	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Testing targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: test test_boot test_unit test_integration
+
+test_unit test_integration: FEATURES += --features test_build
+
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
+test_boot test_unit test_integration test:
+	$(call color_header, "$(QEMU_MISSING_STRING)")
+
+else # QEMU is supported.
+
+##------------------------------------------------------------------------------
+## Run boot test
+##------------------------------------------------------------------------------
+test_boot: $(KERNEL_BIN)
+	$(call color_header, "Boot test - $(BSP)")
+	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
+
+##------------------------------------------------------------------------------
+## Helpers for unit and integration test targets
+##------------------------------------------------------------------------------
+define KERNEL_TEST_RUNNER
+    #!/usr/bin/env bash
+
+    # The cargo test runner seems to change into the crate under test's directory. Therefore, ensure
+    # this script executes from the root.
+    cd $(shell pwd)
+
+    TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
+    TEST_ELF_SYMS="$${TEST_ELF}_syms"
+    TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
+
+    $(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(BSP) $$TEST_ELF > /dev/null
+
+    # This overrides the two ENV variables. The other ENV variables that are required as input for
+    # the .mk file are set already because they are exported by this Makefile and this script is
+    # started by the same.
+    KERNEL_SYMBOLS_INPUT_ELF=$$TEST_ELF           \
+        KERNEL_SYMBOLS_OUTPUT_ELF=$$TEST_ELF_SYMS \
+        $(MAKE) --no-print-directory -f kernel_symbols.mk > /dev/null 2>&1
+
+    $(OBJCOPY_CMD) $$TEST_ELF_SYMS $$TEST_BINARY
+    $(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
+endef
+
+export KERNEL_TEST_RUNNER
+
+define test_prepare
+    @mkdir -p target
+    @echo "$$KERNEL_TEST_RUNNER" > target/kernel_test_runner.sh
+    @chmod +x target/kernel_test_runner.sh
+endef
+
+##------------------------------------------------------------------------------
+## Run unit test(s)
+##------------------------------------------------------------------------------
+test_unit:
+	$(call color_header, "Compiling unit test(s) - $(BSP)")
+	$(call test_prepare)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) --lib
+
+##------------------------------------------------------------------------------
+## Run integration test(s)
+##------------------------------------------------------------------------------
+test_integration:
+	$(call color_header, "Compiling integration test(s) - $(BSP)")
+	$(call test_prepare)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) $(TEST_ARG)
+
+test: test_boot test_unit test_integration
+
+endif
diff --git a/19_kernel_heap/README.md b/19_kernel_heap/README.md
new file mode 100644
index 000000000..430ff2fb9
--- /dev/null
+++ b/19_kernel_heap/README.md
@@ -0,0 +1,1356 @@
+# Tutorial 19 - Kernel Heap
+
+## tl;dr
+
+- A global heap for the kernel is added, which enables runtime dynamic memory allocation (`Box`,
+  `Vec`, etc.).
+- Heap memory management is using a `linked list allocator`.
+- A `debug!` printing macro is added that is only effective when `make` is invoked with
+  `DEBUG_PRINTS=y`.
+
+## Table of Contents
+
+- [Introduction](#introduction)
+- [Implementation](#implementation)
+  - [Debug Prints](#debug-prints)
+  - [Pre-UART Console Output](#pre-uart-console-output)
+- [Test it](#test-it)
+- [Diff to previous](#diff-to-previous)
+
+## Introduction
+
+The kernel is finally in a good place to add dynamic memory management. The entire kernel runs in
+the higher half of the address space by now, and it has decent backtracing support, which can be
+leveraged to get rich tracing/debugging support for heap allocations.
+
+Although it is a vital part of implementing a heap, this tutorial will **not** cover
+`allocation/deallocation` of heap memory. Instead, we will re-use [@phil-opp]'s excellent
+[`linked_list_allocator`]. The reason is that while dynamic memory allocation algorithms are an
+interesting topic, there would not be much added benefit in implementing a `linked list allocator`
+of our own, since it would turn out very similar to what Philipp and the other contributors have
+implemented already. So we might just re-use that, even more so because it can be plugged seamlessly
+into our kernel. [@phil-opp] has also written two great articles on [Heap Allocation] and [Allocator
+Designs]. I really recommend to read those now before continuing with this tutorial.
+
+[@phil-opp]: https://github.com/phil-opp
+[`linked_list_allocator`]: https://crates.io/crates/linked_list_allocator
+[Heap Allocation]: https://os.phil-opp.com/heap-allocation/
+[Allocator Designs]: https://os.phil-opp.com/allocator-designs/
+
+That being said, what this tutorial text will cover is supporting changes for _enabling_ the
+linked_list_allocator, and changes to kernel code leveraging the heap.
+
+## Implementation
+
+First of all, we need to reserve some DRAM for the heap. Traditionally, this is done in the `linker
+script`. We place it after the `.data` section and before the `MMIO remap` section.
+
+```ld.s
+    __data_end_exclusive = .;
+
+    /***********************************************************************************************
+    * Heap
+    ***********************************************************************************************/
+    __heap_start = .;
+    .heap (NOLOAD) :
+    {
+        . += 16 * 1024 * 1024;
+    } :segment_heap
+    __heap_end_exclusive = .;
+
+    ASSERT((. & PAGE_MASK) == 0, "Heap is not page aligned")
+
+    /***********************************************************************************************
+    * MMIO Remap Reserved
+    ***********************************************************************************************/
+    __mmio_remap_start = .;
+```
+
+In the Rust code, the heap properties can now be queried using the added BSP-function
+`bsp::memory::mmu::virt_heap_region()`. The heap allocator itself is added in
+`src/memory/heap_alloc.rs`. There, we add the `linked_list_allocator`, wrap it into an
+`IRQSafeNullock`, and instantiate it the wrapper in a `static`. This way, global access to the
+allocator becomes concurrency-safe:
+
+```rust
+use linked_list_allocator::Heap as LinkedListHeap;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// A heap allocator that can be lazyily initialized.
+pub struct HeapAllocator {
+    inner: IRQSafeNullLock<LinkedListHeap>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+#[global_allocator]
+static KERNEL_HEAP_ALLOCATOR: HeapAllocator = HeapAllocator::new();
+```
+
+All that is left to do now is to implement the [`GlobalAlloc`] trait for `HeapAllocator`:
+
+[`GlobalAlloc`]: https://doc.rust-lang.org/stable/core/alloc/trait.GlobalAlloc.html
+
+```rust
+unsafe impl GlobalAlloc for HeapAllocator {
+    unsafe fn alloc(&self, layout: Layout) -> *mut u8 {
+        let result = KERNEL_HEAP_ALLOCATOR
+            .inner
+            .lock(|inner| inner.allocate_first_fit(layout).ok());
+
+        match result {
+            None => core::ptr::null_mut(),
+            Some(allocation) => {
+                let ptr = allocation.as_ptr();
+
+                debug_print_alloc_dealloc("Allocation", ptr, layout);
+
+                ptr
+            }
+        }
+    }
+
+    unsafe fn dealloc(&self, ptr: *mut u8, layout: Layout) {
+        KERNEL_HEAP_ALLOCATOR
+            .inner
+            .lock(|inner| inner.deallocate(core::ptr::NonNull::new_unchecked(ptr), layout));
+
+        debug_print_alloc_dealloc("Free", ptr, layout);
+    }
+}
+```
+
+During kernel init, `kernel_init_heap_allocator()` will be called, which basically points the
+wrapped allocator to the heap that we defined earlier:
+
+```rust
+/// Query the BSP for the heap region and initialize the kernel's heap allocator with it.
+pub fn kernel_init_heap_allocator() {
+    let region = bsp::memory::mmu::virt_heap_region();
+
+    KERNEL_HEAP_ALLOCATOR
+        .inner
+        .lock(|inner| unsafe { inner.init(region.start_addr().as_usize(), region.size()) });
+}
+```
+
+That's it already! We can now use `Box`, `Vec` and friends 🥳.
+
+### Debug Prints
+
+You might have noticed the `debug_print_alloc_dealloc()` calls in above's snippet. Under the hood,
+this function makes use of the `debug!` macro that has been added in this tutorial. This macro will
+only print to the console when `make` is invoked with the `ENV` variable `DEBUG_PRINTS` set to
+"**y**". As you can see in the following snippet, this enables rich debug output for heap
+allocations and deallocations, containing information such as `size`, `start` and `end exclusive`
+addresses, as well as a backtrace that shows from where the (de)allocation originated.
+
+```console
+$ DEBUG_PRINTS=y make qemu
+
+[...]
+
+<D   0.040505> Kernel Heap: Allocation
+      Size:     0x10 (16 Byte)
+      Start:    0xffff_ffff_c00a_0010
+      End excl: 0xffff_ffff_c00a_0020
+
+      Backtrace:
+      ----------------------------------------------------------------------------------------------
+          Address            Function containing address
+      ----------------------------------------------------------------------------------------------
+       1. ffffffffc000cdf8 | <libkernel::bsp::device_driver::bcm::bcm2xxx_pl011_uart::PL011Uart as libkernel::console::interface::Write>::write_fmt
+       2. ffffffffc000b4f8 | <libkernel::memory::heap_alloc::HeapAllocator as core::alloc::global::GlobalAlloc>::alloc
+       3. ffffffffc000d940 | libkernel::memory::mmu::mapping_record::kernel_add
+       4. ffffffffc000adec | libkernel::bsp::raspberrypi::memory::mmu::kernel_add_mapping_records_for_precomputed
+       5. ffffffffc00016ac | kernel_init
+      ----------------------------------------------------------------------------------------------
+
+[    0.042872] mingo version 0.19.0
+[    0.043080] Booting on: Raspberry Pi 3
+```
+
+### Pre-UART Console Output
+
+Having a heap allows us to simplify a few modules by switching static-length arrays to the dynamic
+`Vec` data structure. Examples are the `interrupt controller drivers` for their handler tables,
+`src/memory/mmu/mapping_record.rs` for bookkeeping virtual memory mappings and the `BSP driver
+manager` for its instantiated device drivers.
+
+However, many of those allocations happen already **before** the UART driver comes online.
+Therefore, a lot of the (de)allocation debug prints would go into the void with the way pre-UART
+prints have been handled so far, which is undesirable. To solve this problem, the kernel's initial
+(aka pre-UART) console is now not a `NullConsole` anymore, but a `BufferConsole`. The latter owns a
+small static array of `chars`, that records any console prints before the actual UART driver comes
+online. Once the UART driver is registered in the kernel to become the default console, the first
+thing that is done is to print any buffered records of the `BufferConsole`:
+
+```rust
+pub fn register_console(new_console: &'static (dyn interface::All + Sync)) {
+    CUR_CONSOLE.write(|con| *con = new_console);
+
+    static FIRST_SWITCH: InitStateLock<bool> = InitStateLock::new(true);
+    FIRST_SWITCH.write(|first| {
+        if *first == true {
+            *first = false;
+
+            buffer_console::BUFFER_CONSOLE.dump();
+        }
+    });
+}
+```
+
+`BUFFER_CONSOLE.dump()` just drains its buffer to using the newly registered console.
+
+## Test it
+
+If compiled without `DEBUG_PRINTS`, the heap can be observed in the mapping overview and through the
+newly added usage statistics:
+
+```console
+$ make chainboot
+[...]
+Minipush 1.0
+
+[MP] ⏳ Waiting for /dev/ttyUSB0
+[MP] ✅ Serial connected
+[MP] 🔌 Please power the target now
+
+ __  __ _      _ _                 _
+|  \/  (_)_ _ (_) |   ___  __ _ __| |
+| |\/| | | ' \| | |__/ _ \/ _` / _` |
+|_|  |_|_|_||_|_|____\___/\__,_\__,_|
+
+           Raspberry Pi 3
+
+[ML] Requesting binary
+[MP] ⏩ Pushing 320 KiB ======================================🦀 100% 106 KiB/s Time: 00:00:03
+[ML] Loaded! Executing the payload now
+
+[    3.572716] mingo version 0.19.0
+[    3.572924] Booting on: Raspberry Pi 3
+[    3.573379] MMU online:
+[    3.573672]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    3.575416]                         Virtual                                   Physical               Size       Attr                    Entity
+[    3.577160]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    3.578905]       0xffff_ffff_c000_0000..0xffff_ffff_c001_ffff --> 0x00_0008_0000..0x00_0009_ffff | 128 KiB | C   RO X  | Kernel code and RO data
+[    3.580519]       0xffff_ffff_c002_0000..0xffff_ffff_c009_ffff --> 0x00_000a_0000..0x00_0011_ffff | 512 KiB | C   RW XN | Kernel data and bss
+[    3.582089]       0xffff_ffff_c00a_0000..0xffff_ffff_c109_ffff --> 0x00_0012_0000..0x00_0111_ffff |  16 MiB | C   RW XN | Kernel heap
+[    3.583573]       0xffff_ffff_c10a_0000..0xffff_ffff_c10a_ffff --> 0x00_3f20_0000..0x00_3f20_ffff |  64 KiB | Dev RW XN | BCM PL011 UART
+[    3.585090]                                                                                                             | BCM GPIO
+[    3.586542]       0xffff_ffff_c10b_0000..0xffff_ffff_c10b_ffff --> 0x00_3f00_0000..0x00_3f00_ffff |  64 KiB | Dev RW XN | BCM Interrupt Controller
+[    3.588167]       0xffff_ffff_c18b_0000..0xffff_ffff_c192_ffff --> 0x00_0000_0000..0x00_0007_ffff | 512 KiB | C   RW XN | Kernel boot-core stack
+[    3.589770]       -------------------------------------------------------------------------------------------------------------------------------------------
+[    3.591515] Current privilege level: EL1
+
+[...]
+
+[    3.597624] Kernel heap:
+[    3.597928]       Used: 2512 Byte (3 KiB)
+[    3.598415]       Free: 16774704 Byte (16 MiB)
+[    3.598957] Echoing input now
+```
+
+## Diff to previous
+```diff
+
+diff -uNr 18_backtrace/kernel/Cargo.toml 19_kernel_heap/kernel/Cargo.toml
+--- 18_backtrace/kernel/Cargo.toml
++++ 19_kernel_heap/kernel/Cargo.toml
+@@ -1,11 +1,12 @@
+ [package]
+ name = "mingo"
+-version = "0.18.0"
++version = "0.19.0"
+ authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+ edition = "2021"
+
+ [features]
+ default = []
++debug_prints = []
+ bsp_rpi3 = ["tock-registers"]
+ bsp_rpi4 = ["tock-registers"]
+ test_build = ["qemu-exit"]
+@@ -17,6 +18,7 @@
+ [dependencies]
+ test-types = { path = "../libraries/test-types" }
+ debug-symbol-types = { path = "../libraries/debug-symbol-types" }
++linked_list_allocator = { version = "0.9.x", default-features = false, features = ["const_mut_refs"] }
+
+ # Optional dependencies
+ tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
+
+diff -uNr 18_backtrace/kernel/src/bsp/device_driver/arm/gicv2.rs 19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2.rs
+--- 18_backtrace/kernel/src/bsp/device_driver/arm/gicv2.rs
++++ 19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2.rs
+@@ -85,12 +85,13 @@
+     synchronization,
+     synchronization::InitStateLock,
+ };
++use alloc::vec::Vec;
+
+ //--------------------------------------------------------------------------------------------------
+ // Private Definitions
+ //--------------------------------------------------------------------------------------------------
+
+-type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; GICv2::NUM_IRQS];
++type HandlerTable = Vec<Option<exception::asynchronous::IRQDescriptor>>;
+
+ //--------------------------------------------------------------------------------------------------
+ // Public Definitions
+@@ -119,8 +120,7 @@
+ //--------------------------------------------------------------------------------------------------
+
+ impl GICv2 {
+-    const MAX_IRQ_NUMBER: usize = 300; // Normally 1019, but keep it lower to save some space.
+-    const NUM_IRQS: usize = Self::MAX_IRQ_NUMBER + 1;
++    const MAX_IRQ_NUMBER: usize = 1019;
+
+     pub const COMPATIBLE: &'static str = "GICv2 (ARM Generic Interrupt Controller v2)";
+
+@@ -137,7 +137,7 @@
+         Self {
+             gicd: gicd::GICD::new(gicd_mmio_start_addr),
+             gicc: gicc::GICC::new(gicc_mmio_start_addr),
+-            handler_table: InitStateLock::new([None; Self::NUM_IRQS]),
++            handler_table: InitStateLock::new(Vec::new()),
+             post_init_callback,
+         }
+     }
+@@ -178,6 +178,12 @@
+         self.handler_table.write(|table| {
+             let irq_number = irq_number.get();
+
++            if table.len() < irq_number {
++                // IRQDescriptor has an integrated range sanity check on construction, so this
++                // vector can't grow arbitrarily big.
++                table.resize(irq_number + 1, None);
++            }
++
+             if table[irq_number].is_some() {
+                 return Err("IRQ handler already registered");
+             }
+
+diff -uNr 18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs 19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+--- 18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
++++ 19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+@@ -4,7 +4,7 @@
+
+ //! Peripheral Interrupt Controller Driver.
+
+-use super::{InterruptController, PendingIRQs, PeripheralIRQ};
++use super::{PendingIRQs, PeripheralIRQ};
+ use crate::{
+     bsp::device_driver::common::MMIODerefWrapper,
+     exception,
+@@ -12,6 +12,7 @@
+     synchronization,
+     synchronization::{IRQSafeNullLock, InitStateLock},
+ };
++use alloc::vec::Vec;
+ use tock_registers::{
+     interfaces::{Readable, Writeable},
+     register_structs,
+@@ -48,8 +49,7 @@
+ /// Abstraction for the ReadOnly parts of the associated MMIO registers.
+ type ReadOnlyRegisters = MMIODerefWrapper<RORegisterBlock>;
+
+-type HandlerTable =
+-    [Option<exception::asynchronous::IRQDescriptor>; InterruptController::NUM_PERIPHERAL_IRQS];
++type HandlerTable = Vec<Option<exception::asynchronous::IRQDescriptor>>;
+
+ //--------------------------------------------------------------------------------------------------
+ // Public Definitions
+@@ -81,7 +81,7 @@
+         Self {
+             wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(mmio_start_addr)),
+             ro_registers: ReadOnlyRegisters::new(mmio_start_addr),
+-            handler_table: InitStateLock::new([None; InterruptController::NUM_PERIPHERAL_IRQS]),
++            handler_table: InitStateLock::new(Vec::new()),
+         }
+     }
+
+@@ -110,6 +110,12 @@
+         self.handler_table.write(|table| {
+             let irq_number = irq.get();
+
++            if table.len() < irq_number {
++                // IRQDescriptor has an integrated range sanity check on construction, so this
++                // vector can't grow arbitrarily big.
++                table.resize(irq_number + 1, None);
++            }
++
+             if table[irq_number].is_some() {
+                 return Err("IRQ handler already registered");
+             }
+
+diff -uNr 18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs 19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+--- 18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
++++ 19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+@@ -77,7 +77,6 @@
+ impl InterruptController {
+     const MAX_LOCAL_IRQ_NUMBER: usize = 11;
+     const MAX_PERIPHERAL_IRQ_NUMBER: usize = 63;
+-    const NUM_PERIPHERAL_IRQS: usize = Self::MAX_PERIPHERAL_IRQ_NUMBER + 1;
+
+     pub const COMPATIBLE: &'static str = "BCM Interrupt Controller";
+
+
+diff -uNr 18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+--- 18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
++++ 19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+@@ -329,6 +329,13 @@
+         self.chars_written += 1;
+     }
+
++    /// Send a slice of characters.
++    fn write_array(&mut self, a: &[char]) {
++        for c in a {
++            self.write_char(*c);
++        }
++    }
++
+     /// Block execution until the last buffered character has been physically put on the TX wire.
+     fn flush(&self) {
+         // Spin until the busy bit is cleared.
+@@ -451,6 +458,10 @@
+         self.inner.lock(|inner| inner.write_char(c));
+     }
+
++    fn write_array(&self, a: &[char]) {
++        self.inner.lock(|inner| inner.write_array(a));
++    }
++
+     fn write_fmt(&self, args: core::fmt::Arguments) -> fmt::Result {
+         // Fully qualified syntax for the call to `core::fmt::Write::write_fmt()` to increase
+         // readability.
+
+diff -uNr 18_backtrace/kernel/src/bsp/raspberrypi/driver.rs 19_kernel_heap/kernel/src/bsp/raspberrypi/driver.rs
+--- 18_backtrace/kernel/src/bsp/raspberrypi/driver.rs
++++ 19_kernel_heap/kernel/src/bsp/raspberrypi/driver.rs
+@@ -11,11 +11,11 @@
+     memory::mmu::MMIODescriptor,
+     synchronization::{interface::ReadWriteEx, InitStateLock},
+ };
++use alloc::vec::Vec;
+ use core::{
+     mem::MaybeUninit,
+     sync::atomic::{AtomicBool, Ordering},
+ };
+-
+ pub use device_driver::IRQNumber;
+
+ //--------------------------------------------------------------------------------------------------
+@@ -24,18 +24,11 @@
+
+ /// Device Driver Manager type.
+ struct BSPDriverManager {
+-    device_drivers: InitStateLock<[Option<&'static (dyn DeviceDriver + Sync)>; NUM_DRIVERS]>,
++    device_drivers: InitStateLock<Vec<&'static (dyn DeviceDriver + Sync)>>,
+     init_done: AtomicBool,
+ }
+
+ //--------------------------------------------------------------------------------------------------
+-// Public Definitions
+-//--------------------------------------------------------------------------------------------------
+-
+-/// The number of active drivers provided by this BSP.
+-pub const NUM_DRIVERS: usize = 3;
+-
+-//--------------------------------------------------------------------------------------------------
+ // Global instances
+ //--------------------------------------------------------------------------------------------------
+
+@@ -50,7 +43,7 @@
+ static mut INTERRUPT_CONTROLLER: MaybeUninit<device_driver::GICv2> = MaybeUninit::uninit();
+
+ static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
+-    device_drivers: InitStateLock::new([None; NUM_DRIVERS]),
++    device_drivers: InitStateLock::new(Vec::new()),
+     init_done: AtomicBool::new(false),
+ };
+
+@@ -143,9 +136,9 @@
+
+     unsafe fn register_drivers(&self) {
+         self.device_drivers.write(|drivers| {
+-            drivers[0] = Some(PL011_UART.assume_init_ref());
+-            drivers[1] = Some(GPIO.assume_init_ref());
+-            drivers[2] = Some(INTERRUPT_CONTROLLER.assume_init_ref());
++            drivers.push(PL011_UART.assume_init_ref());
++            drivers.push(GPIO.assume_init_ref());
++            drivers.push(INTERRUPT_CONTROLLER.assume_init_ref());
+         });
+     }
+ }
+@@ -180,9 +173,8 @@
+         Ok(())
+     }
+
+-    fn all_device_drivers(&self) -> [&(dyn DeviceDriver + Sync); NUM_DRIVERS] {
+-        self.device_drivers
+-            .read(|drivers| drivers.map(|drivers| drivers.unwrap()))
++    fn all_device_drivers(&self) -> &Vec<&(dyn DeviceDriver + Sync)> {
++        self.device_drivers.read(|drivers| drivers)
+     }
+
+     #[cfg(feature = "test_build")]
+
+diff -uNr 18_backtrace/kernel/src/bsp/raspberrypi/kernel.ld 19_kernel_heap/kernel/src/bsp/raspberrypi/kernel.ld
+--- 18_backtrace/kernel/src/bsp/raspberrypi/kernel.ld
++++ 19_kernel_heap/kernel/src/bsp/raspberrypi/kernel.ld
+@@ -35,6 +35,7 @@
+ {
+     segment_code            PT_LOAD FLAGS(5);
+     segment_data            PT_LOAD FLAGS(6);
++    segment_heap            PT_LOAD FLAGS(6);
+     segment_boot_core_stack PT_LOAD FLAGS(6);
+ }
+
+@@ -85,6 +86,18 @@
+     __data_end_exclusive = .;
+
+     /***********************************************************************************************
++    * Heap
++    ***********************************************************************************************/
++    __heap_start = .;
++    .heap (NOLOAD) :
++    {
++        . += 16 * 1024 * 1024;
++    } :segment_heap
++    __heap_end_exclusive = .;
++
++    ASSERT((. & PAGE_MASK) == 0, "Heap is not page aligned")
++
++    /***********************************************************************************************
+     * MMIO Remap Reserved
+     ***********************************************************************************************/
+     __mmio_remap_start = .;
+
+diff -uNr 18_backtrace/kernel/src/bsp/raspberrypi/memory/mmu.rs 19_kernel_heap/kernel/src/bsp/raspberrypi/memory/mmu.rs
+--- 18_backtrace/kernel/src/bsp/raspberrypi/memory/mmu.rs
++++ 19_kernel_heap/kernel/src/bsp/raspberrypi/memory/mmu.rs
+@@ -122,6 +122,16 @@
+     MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
+ }
+
++/// The heap pages.
++pub fn virt_heap_region() -> MemoryRegion<Virtual> {
++    let num_pages = size_to_num_pages(super::heap_size());
++
++    let start_page_addr = super::virt_heap_start();
++    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
++
++    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
++}
++
+ /// The boot core stack pages.
+ pub fn virt_boot_core_stack_region() -> MemoryRegion<Virtual> {
+     let num_pages = size_to_num_pages(super::boot_core_stack_size());
+@@ -169,6 +179,14 @@
+         &kernel_page_attributes(virt_data_region.start_page_addr()),
+     );
+
++    let virt_heap_region = virt_heap_region();
++    generic_mmu::kernel_add_mapping_record(
++        "Kernel heap",
++        &virt_heap_region,
++        &kernel_virt_to_phys_region(virt_heap_region),
++        &kernel_page_attributes(virt_heap_region.start_page_addr()),
++    );
++
+     let virt_boot_core_stack_region = virt_boot_core_stack_region();
+     generic_mmu::kernel_add_mapping_record(
+         "Kernel boot-core stack",
+
+diff -uNr 18_backtrace/kernel/src/bsp/raspberrypi/memory.rs 19_kernel_heap/kernel/src/bsp/raspberrypi/memory.rs
+--- 18_backtrace/kernel/src/bsp/raspberrypi/memory.rs
++++ 19_kernel_heap/kernel/src/bsp/raspberrypi/memory.rs
+@@ -28,7 +28,11 @@
+ //! | .bss                                  |
+ //! |                                       |
+ //! +---------------------------------------+
+-//! |                                       | data_end_exclusive
++//! |                                       | heap_start == data_end_exclusive
++//! | .heap                                 |
++//! |                                       |
++//! +---------------------------------------+
++//! |                                       | heap_end_exclusive
+ //! |                                       |
+ //!
+ //!
+@@ -50,7 +54,11 @@
+ //! | .bss                                  |
+ //! |                                       |
+ //! +---------------------------------------+
+-//! |                                       |  mmio_remap_start == data_end_exclusive
++//! |                                       | heap_start == data_end_exclusive
++//! | .heap                                 |
++//! |                                       |
++//! +---------------------------------------+
++//! |                                       |  mmio_remap_start == heap_end_exclusive
+ //! | VA region for MMIO remapping          |
+ //! |                                       |
+ //! +---------------------------------------+
+@@ -83,6 +91,9 @@
+     static __data_start: UnsafeCell<()>;
+     static __data_end_exclusive: UnsafeCell<()>;
+
++    static __heap_start: UnsafeCell<()>;
++    static __heap_end_exclusive: UnsafeCell<()>;
++
+     static __mmio_remap_start: UnsafeCell<()>;
+     static __mmio_remap_end_exclusive: UnsafeCell<()>;
+
+@@ -179,6 +190,22 @@
+     unsafe { (__data_end_exclusive.get() as usize) - (__data_start.get() as usize) }
+ }
+
++/// Start page address of the heap segment.
++#[inline(always)]
++fn virt_heap_start() -> PageAddress<Virtual> {
++    PageAddress::from(unsafe { __heap_start.get() as usize })
++}
++
++/// Size of the heap segment.
++///
++/// # Safety
++///
++/// - Value is provided by the linker script and must be trusted as-is.
++#[inline(always)]
++fn heap_size() -> usize {
++    unsafe { (__heap_end_exclusive.get() as usize) - (__heap_start.get() as usize) }
++}
++
+ /// Start page address of the MMIO remap reservation.
+ ///
+ /// # Safety
+
+diff -uNr 18_backtrace/kernel/src/console/buffer_console.rs 19_kernel_heap/kernel/src/console/buffer_console.rs
+--- 18_backtrace/kernel/src/console/buffer_console.rs
++++ 19_kernel_heap/kernel/src/console/buffer_console.rs
+@@ -0,0 +1,108 @@
++// SPDX-License-Identifier: MIT OR Apache-2.0
++//
++// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++
++//! A console that buffers input during the init phase.
++
++use super::interface;
++use crate::{console, info, synchronization, synchronization::InitStateLock};
++use core::fmt;
++
++//--------------------------------------------------------------------------------------------------
++// Private Definitions
++//--------------------------------------------------------------------------------------------------
++
++const BUF_SIZE: usize = 1024 * 64;
++
++pub struct BufferConsoleInner {
++    buf: [char; BUF_SIZE],
++    write_ptr: usize,
++}
++
++//--------------------------------------------------------------------------------------------------
++// Public Definitions
++//--------------------------------------------------------------------------------------------------
++
++pub struct BufferConsole {
++    inner: InitStateLock<BufferConsoleInner>,
++}
++
++//--------------------------------------------------------------------------------------------------
++// Global instances
++//--------------------------------------------------------------------------------------------------
++
++pub static BUFFER_CONSOLE: BufferConsole = BufferConsole {
++    inner: InitStateLock::new(BufferConsoleInner {
++        // Use the null character, so this lands in .bss and does not waste space in the binary.
++        buf: ['\0'; BUF_SIZE],
++        write_ptr: 0,
++    }),
++};
++
++//--------------------------------------------------------------------------------------------------
++// Private Code
++//--------------------------------------------------------------------------------------------------
++
++impl BufferConsoleInner {
++    fn write_char(&mut self, c: char) {
++        if self.write_ptr < (BUF_SIZE - 1) {
++            self.buf[self.write_ptr] = c;
++            self.write_ptr += 1;
++        }
++    }
++}
++
++impl fmt::Write for BufferConsoleInner {
++    fn write_str(&mut self, s: &str) -> fmt::Result {
++        for c in s.chars() {
++            self.write_char(c);
++        }
++
++        Ok(())
++    }
++}
++
++//--------------------------------------------------------------------------------------------------
++// Public Code
++//--------------------------------------------------------------------------------------------------
++use synchronization::interface::ReadWriteEx;
++
++impl BufferConsole {
++    /// Dump the buffer.
++    ///
++    /// # Invariant
++    ///
++    /// It is expected that this is only called when self != crate::console::console().
++    pub fn dump(&self) {
++        self.inner.read(|inner| {
++            console::console().write_array(&inner.buf[0..inner.write_ptr]);
++
++            if inner.write_ptr == (BUF_SIZE - 1) {
++                info!("Pre-UART buffer overflowed");
++            } else if inner.write_ptr > 0 {
++                info!("End of pre-UART buffer")
++            }
++        });
++    }
++}
++
++impl interface::Write for BufferConsole {
++    fn write_char(&self, c: char) {
++        self.inner.write(|inner| inner.write_char(c));
++    }
++
++    fn write_array(&self, _a: &[char]) {}
++
++    fn write_fmt(&self, args: fmt::Arguments) -> fmt::Result {
++        self.inner.write(|inner| fmt::Write::write_fmt(inner, args))
++    }
++
++    fn flush(&self) {}
++}
++
++impl interface::Read for BufferConsole {
++    fn clear_rx(&self) {}
++}
++
++impl interface::Statistics for BufferConsole {}
++impl interface::All for BufferConsole {}
+
+diff -uNr 18_backtrace/kernel/src/console/null_console.rs 19_kernel_heap/kernel/src/console/null_console.rs
+--- 18_backtrace/kernel/src/console/null_console.rs
++++ 19_kernel_heap/kernel/src/console/null_console.rs
+@@ -1,41 +0,0 @@
+-// SPDX-License-Identifier: MIT OR Apache-2.0
+-//
+-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+-
+-//! Null console.
+-
+-use super::interface;
+-use core::fmt;
+-
+-//--------------------------------------------------------------------------------------------------
+-// Public Definitions
+-//--------------------------------------------------------------------------------------------------
+-
+-pub struct NullConsole;
+-
+-//--------------------------------------------------------------------------------------------------
+-// Global instances
+-//--------------------------------------------------------------------------------------------------
+-
+-pub static NULL_CONSOLE: NullConsole = NullConsole {};
+-
+-//--------------------------------------------------------------------------------------------------
+-// Public Code
+-//--------------------------------------------------------------------------------------------------
+-
+-impl interface::Write for NullConsole {
+-    fn write_char(&self, _c: char) {}
+-
+-    fn write_fmt(&self, _args: fmt::Arguments) -> fmt::Result {
+-        fmt::Result::Ok(())
+-    }
+-
+-    fn flush(&self) {}
+-}
+-
+-impl interface::Read for NullConsole {
+-    fn clear_rx(&self) {}
+-}
+-
+-impl interface::Statistics for NullConsole {}
+-impl interface::All for NullConsole {}
+
+diff -uNr 18_backtrace/kernel/src/console.rs 19_kernel_heap/kernel/src/console.rs
+--- 18_backtrace/kernel/src/console.rs
++++ 19_kernel_heap/kernel/src/console.rs
+@@ -4,7 +4,7 @@
+
+ //! System console.
+
+-mod null_console;
++mod buffer_console;
+
+ use crate::synchronization;
+
+@@ -21,6 +21,9 @@
+         /// Write a single character.
+         fn write_char(&self, c: char);
+
++        /// Write a slice of characters.
++        fn write_array(&self, a: &[char]);
++
+         /// Write a Rust format string.
+         fn write_fmt(&self, args: fmt::Arguments) -> fmt::Result;
+
+@@ -61,7 +64,7 @@
+ //--------------------------------------------------------------------------------------------------
+
+ static CUR_CONSOLE: InitStateLock<&'static (dyn interface::All + Sync)> =
+-    InitStateLock::new(&null_console::NULL_CONSOLE);
++    InitStateLock::new(&buffer_console::BUFFER_CONSOLE);
+
+ //--------------------------------------------------------------------------------------------------
+ // Public Code
+@@ -71,6 +74,15 @@
+ /// Register a new console.
+ pub fn register_console(new_console: &'static (dyn interface::All + Sync)) {
+     CUR_CONSOLE.write(|con| *con = new_console);
++
++    static FIRST_SWITCH: InitStateLock<bool> = InitStateLock::new(true);
++    FIRST_SWITCH.write(|first| {
++        if *first == true {
++            *first = false;
++
++            buffer_console::BUFFER_CONSOLE.dump();
++        }
++    });
+ }
+
+ /// Return a reference to the currently registered console.
+
+diff -uNr 18_backtrace/kernel/src/driver.rs 19_kernel_heap/kernel/src/driver.rs
+--- 18_backtrace/kernel/src/driver.rs
++++ 19_kernel_heap/kernel/src/driver.rs
+@@ -10,7 +10,7 @@
+
+ /// Driver interfaces.
+ pub mod interface {
+-    use crate::bsp;
++    use alloc::vec::Vec;
+
+     /// Device Driver functions.
+     pub trait DeviceDriver {
+@@ -46,8 +46,8 @@
+         /// Must be called before `all_device_drivers`.
+         unsafe fn instantiate_drivers(&self) -> Result<(), &'static str>;
+
+-        /// Return a slice of references to all `BSP`-instantiated drivers.
+-        fn all_device_drivers(&self) -> [&(dyn DeviceDriver + Sync); bsp::driver::NUM_DRIVERS];
++        /// Return a vector of references to all `BSP`-instantiated drivers.
++        fn all_device_drivers(&self) -> &Vec<&(dyn DeviceDriver + Sync)>;
+
+         /// Minimal code needed to bring up the console in QEMU (for testing only). This is often
+         /// less steps than on real hardware due to QEMU's abstractions.
+
+diff -uNr 18_backtrace/kernel/src/lib.rs 19_kernel_heap/kernel/src/lib.rs
+--- 18_backtrace/kernel/src/lib.rs
++++ 19_kernel_heap/kernel/src/lib.rs
+@@ -110,6 +110,7 @@
+
+ #![allow(clippy::upper_case_acronyms)]
+ #![allow(incomplete_features)]
++#![feature(alloc_error_handler)]
+ #![feature(asm_const)]
+ #![feature(core_intrinsics)]
+ #![feature(format_args_nl)]
+@@ -127,6 +128,8 @@
+ #![reexport_test_harness_main = "test_main"]
+ #![test_runner(crate::test_runner)]
+
++extern crate alloc;
++
+ mod panic_wait;
+ mod synchronization;
+
+
+diff -uNr 18_backtrace/kernel/src/main.rs 19_kernel_heap/kernel/src/main.rs
+--- 18_backtrace/kernel/src/main.rs
++++ 19_kernel_heap/kernel/src/main.rs
+@@ -13,6 +13,8 @@
+ #![no_main]
+ #![no_std]
+
++extern crate alloc;
++
+ use libkernel::{bsp, cpu, driver, exception, info, memory, state, time, warn};
+
+ /// Early init code.
+@@ -92,6 +94,9 @@
+     info!("Registered IRQ handlers:");
+     exception::asynchronous::irq_manager().print_handler();
+
++    info!("Kernel heap:");
++    memory::heap_alloc::kernel_heap_allocator().print_usage();
++
+     info!("Echoing input now");
+     cpu::wait_forever();
+ }
+
+diff -uNr 18_backtrace/kernel/src/memory/heap_alloc.rs 19_kernel_heap/kernel/src/memory/heap_alloc.rs
+--- 18_backtrace/kernel/src/memory/heap_alloc.rs
++++ 19_kernel_heap/kernel/src/memory/heap_alloc.rs
+@@ -0,0 +1,137 @@
++// SPDX-License-Identifier: MIT OR Apache-2.0
++//
++// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++
++//! Heap allocation.
++
++use crate::{
++    backtrace, bsp, common, debug, info,
++    memory::{Address, Virtual},
++    synchronization,
++    synchronization::IRQSafeNullLock,
++};
++use alloc::alloc::{GlobalAlloc, Layout};
++use linked_list_allocator::Heap as LinkedListHeap;
++
++//--------------------------------------------------------------------------------------------------
++// Public Definitions
++//--------------------------------------------------------------------------------------------------
++
++/// A heap allocator that can be lazyily initialized.
++pub struct HeapAllocator {
++    inner: IRQSafeNullLock<LinkedListHeap>,
++}
++
++//--------------------------------------------------------------------------------------------------
++// Global instances
++//--------------------------------------------------------------------------------------------------
++
++#[global_allocator]
++static KERNEL_HEAP_ALLOCATOR: HeapAllocator = HeapAllocator::new();
++
++//--------------------------------------------------------------------------------------------------
++// Private Code
++//--------------------------------------------------------------------------------------------------
++
++#[inline(always)]
++fn debug_print_alloc_dealloc(operation: &'static str, ptr: *mut u8, layout: Layout) {
++    let size = layout.size();
++    let (size_h, size_unit) = common::size_human_readable_ceil(size);
++    let addr = Address::<Virtual>::new(ptr as usize);
++
++    debug!(
++        "Kernel Heap: {}\n      \
++        Size:     {:#x} ({} {})\n      \
++        Start:    {}\n      \
++        End excl: {}\n\n      \
++        {}",
++        operation,
++        size,
++        size_h,
++        size_unit,
++        addr,
++        addr + size,
++        backtrace::Backtrace
++    );
++}
++
++//--------------------------------------------------------------------------------------------------
++// Public Code
++//--------------------------------------------------------------------------------------------------
++use synchronization::interface::Mutex;
++
++#[alloc_error_handler]
++fn alloc_error_handler(layout: Layout) -> ! {
++    panic!("Allocation error: {:?}", layout)
++}
++
++/// Return a reference to the kernel's heap allocator.
++pub fn kernel_heap_allocator() -> &'static HeapAllocator {
++    &KERNEL_HEAP_ALLOCATOR
++}
++
++impl HeapAllocator {
++    /// Create an instance.
++    pub const fn new() -> Self {
++        Self {
++            inner: IRQSafeNullLock::new(LinkedListHeap::empty()),
++        }
++    }
++
++    /// Print the current heap usage.
++    pub fn print_usage(&self) {
++        let (used, free) = KERNEL_HEAP_ALLOCATOR
++            .inner
++            .lock(|inner| (inner.used(), inner.free()));
++
++        if used >= 1024 {
++            let (used_h, used_unit) = common::size_human_readable_ceil(used);
++            info!("      Used: {} Byte ({} {})", used, used_h, used_unit);
++        } else {
++            info!("      Used: {} Byte", used);
++        }
++
++        if free >= 1024 {
++            let (free_h, free_unit) = common::size_human_readable_ceil(free);
++            info!("      Free: {} Byte ({} {})", free, free_h, free_unit);
++        } else {
++            info!("      Free: {} Byte", free);
++        }
++    }
++}
++
++unsafe impl GlobalAlloc for HeapAllocator {
++    unsafe fn alloc(&self, layout: Layout) -> *mut u8 {
++        let result = KERNEL_HEAP_ALLOCATOR
++            .inner
++            .lock(|inner| inner.allocate_first_fit(layout).ok());
++
++        match result {
++            None => core::ptr::null_mut(),
++            Some(allocation) => {
++                let ptr = allocation.as_ptr();
++
++                debug_print_alloc_dealloc("Allocation", ptr, layout);
++
++                ptr
++            }
++        }
++    }
++
++    unsafe fn dealloc(&self, ptr: *mut u8, layout: Layout) {
++        KERNEL_HEAP_ALLOCATOR
++            .inner
++            .lock(|inner| inner.deallocate(core::ptr::NonNull::new_unchecked(ptr), layout));
++
++        debug_print_alloc_dealloc("Free", ptr, layout);
++    }
++}
++
++/// Query the BSP for the heap region and initialize the kernel's heap allocator with it.
++pub fn kernel_init_heap_allocator() {
++    let region = bsp::memory::mmu::virt_heap_region();
++
++    KERNEL_HEAP_ALLOCATOR
++        .inner
++        .lock(|inner| unsafe { inner.init(region.start_addr().as_usize(), region.size()) });
++}
+
+diff -uNr 18_backtrace/kernel/src/memory/mmu/mapping_record.rs 19_kernel_heap/kernel/src/memory/mmu/mapping_record.rs
+--- 18_backtrace/kernel/src/memory/mmu/mapping_record.rs
++++ 19_kernel_heap/kernel/src/memory/mmu/mapping_record.rs
+@@ -8,7 +8,8 @@
+     AccessPermissions, Address, AttributeFields, MMIODescriptor, MemAttributes, MemoryRegion,
+     Physical, Virtual,
+ };
+-use crate::{bsp, common, info, synchronization, synchronization::InitStateLock, warn};
++use crate::{bsp, common, info, synchronization, synchronization::InitStateLock};
++use alloc::{vec, vec::Vec};
+
+ //--------------------------------------------------------------------------------------------------
+ // Private Definitions
+@@ -16,9 +17,8 @@
+
+ /// Type describing a virtual memory mapping.
+ #[allow(missing_docs)]
+-#[derive(Copy, Clone)]
+ struct MappingRecordEntry {
+-    pub users: [Option<&'static str>; 5],
++    pub users: Vec<&'static str>,
+     pub phys_start_addr: Address<Physical>,
+     pub virt_start_addr: Address<Virtual>,
+     pub num_pages: usize,
+@@ -26,7 +26,7 @@
+ }
+
+ struct MappingRecord {
+-    inner: [Option<MappingRecordEntry>; 12],
++    inner: Vec<MappingRecordEntry>,
+ }
+
+ //--------------------------------------------------------------------------------------------------
+@@ -48,7 +48,7 @@
+         attr: &AttributeFields,
+     ) -> Self {
+         Self {
+-            users: [Some(name), None, None, None, None],
++            users: vec![name],
+             phys_start_addr: phys_region.start_addr(),
+             virt_start_addr: virt_region.start_addr(),
+             num_pages: phys_region.num_pages(),
+@@ -56,55 +56,28 @@
+         }
+     }
+
+-    fn find_next_free_user(&mut self) -> Result<&mut Option<&'static str>, &'static str> {
+-        if let Some(x) = self.users.iter_mut().find(|x| x.is_none()) {
+-            return Ok(x);
+-        };
+-
+-        Err("Storage for user info exhausted")
+-    }
+-
+-    pub fn add_user(&mut self, user: &'static str) -> Result<(), &'static str> {
+-        let x = self.find_next_free_user()?;
+-        *x = Some(user);
+-        Ok(())
++    pub fn add_user(&mut self, user: &'static str) {
++        self.users.push(user);
+     }
+ }
+
+ impl MappingRecord {
+     pub const fn new() -> Self {
+-        Self { inner: [None; 12] }
+-    }
+-
+-    fn size(&self) -> usize {
+-        self.inner.iter().filter(|x| x.is_some()).count()
++        Self { inner: Vec::new() }
+     }
+
+     fn sort(&mut self) {
+-        let upper_bound_exclusive = self.size();
+-        let entries = &mut self.inner[0..upper_bound_exclusive];
+-
+-        if !entries.is_sorted_by_key(|item| item.unwrap().virt_start_addr) {
+-            entries.sort_unstable_by_key(|item| item.unwrap().virt_start_addr)
++        if !self.inner.is_sorted_by_key(|item| item.virt_start_addr) {
++            self.inner.sort_unstable_by_key(|item| item.virt_start_addr)
+         }
+     }
+
+-    fn find_next_free(&mut self) -> Result<&mut Option<MappingRecordEntry>, &'static str> {
+-        if let Some(x) = self.inner.iter_mut().find(|x| x.is_none()) {
+-            return Ok(x);
+-        }
+-
+-        Err("Storage for mapping info exhausted")
+-    }
+-
+     fn find_duplicate(
+         &mut self,
+         phys_region: &MemoryRegion<Physical>,
+     ) -> Option<&mut MappingRecordEntry> {
+         self.inner
+             .iter_mut()
+-            .filter(|x| x.is_some())
+-            .map(|x| x.as_mut().unwrap())
+             .filter(|x| x.attribute_fields.mem_attributes == MemAttributes::Device)
+             .find(|x| {
+                 if x.phys_start_addr != phys_region.start_addr() {
+@@ -125,10 +98,8 @@
+         virt_region: &MemoryRegion<Virtual>,
+         phys_region: &MemoryRegion<Physical>,
+         attr: &AttributeFields,
+-    ) -> Result<(), &'static str> {
+-        let x = self.find_next_free()?;
+-
+-        *x = Some(MappingRecordEntry::new(
++    ) {
++        self.inner.push(MappingRecordEntry::new(
+             name,
+             virt_region,
+             phys_region,
+@@ -136,8 +107,6 @@
+         ));
+
+         self.sort();
+-
+-        Ok(())
+     }
+
+     pub fn print(&self) {
+@@ -148,7 +117,7 @@
+         );
+         info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
+
+-        for i in self.inner.iter().flatten() {
++        for i in self.inner.iter() {
+             let size = i.num_pages * bsp::memory::mmu::KernelGranule::SIZE;
+             let virt_start = i.virt_start_addr;
+             let virt_end_inclusive = virt_start + (size - 1);
+@@ -184,16 +153,14 @@
+                 attr,
+                 acc_p,
+                 xn,
+-                i.users[0].unwrap()
++                i.users[0]
+             );
+
+-            for k in i.users[1..].iter() {
+-                if let Some(additional_user) = *k {
+-                    info!(
++            for k in &i.users[1..] {
++                info!(
+                         "                                                                                                            | {}",
+-                        additional_user
++                        k
+                     );
+-                }
+             }
+         }
+
+@@ -212,7 +179,7 @@
+     virt_region: &MemoryRegion<Virtual>,
+     phys_region: &MemoryRegion<Physical>,
+     attr: &AttributeFields,
+-) -> Result<(), &'static str> {
++) {
+     KERNEL_MAPPING_RECORD.write(|mr| mr.add(name, virt_region, phys_region, attr))
+ }
+
+@@ -225,9 +192,7 @@
+     KERNEL_MAPPING_RECORD.write(|mr| {
+         let dup = mr.find_duplicate(&phys_region)?;
+
+-        if let Err(x) = dup.add_user(new_user) {
+-            warn!("{}", x);
+-        }
++        dup.add_user(new_user);
+
+         Some(dup.virt_start_addr)
+     })
+
+diff -uNr 18_backtrace/kernel/src/memory/mmu.rs 19_kernel_heap/kernel/src/memory/mmu.rs
+--- 18_backtrace/kernel/src/memory/mmu.rs
++++ 19_kernel_heap/kernel/src/memory/mmu.rs
+@@ -17,7 +17,6 @@
+     bsp,
+     memory::{Address, Physical, Virtual},
+     synchronization::{self, interface::Mutex},
+-    warn,
+ };
+ use core::{fmt, num::NonZeroUsize};
+
+@@ -176,9 +175,7 @@
+     phys_region: &MemoryRegion<Physical>,
+     attr: &AttributeFields,
+ ) {
+-    if let Err(x) = mapping_record::kernel_add(name, virt_region, phys_region, attr) {
+-        warn!("{}", x);
+-    }
++    mapping_record::kernel_add(name, virt_region, phys_region, attr);
+ }
+
+ /// MMIO remapping in the kernel translation tables.
+
+diff -uNr 18_backtrace/kernel/src/memory.rs 19_kernel_heap/kernel/src/memory.rs
+--- 18_backtrace/kernel/src/memory.rs
++++ 19_kernel_heap/kernel/src/memory.rs
+@@ -4,6 +4,7 @@
+
+ //! Memory Management.
+
++pub mod heap_alloc;
+ pub mod mmu;
+
+ use crate::{bsp, common};
+@@ -163,6 +164,7 @@
+ /// Initialize the memory subsystem.
+ pub fn init() {
+     mmu::kernel_init_mmio_va_allocator();
++    heap_alloc::kernel_init_heap_allocator();
+ }
+
+ //--------------------------------------------------------------------------------------------------
+
+diff -uNr 18_backtrace/kernel/src/print.rs 19_kernel_heap/kernel/src/print.rs
+--- 18_backtrace/kernel/src/print.rs
++++ 19_kernel_heap/kernel/src/print.rs
+@@ -90,3 +90,35 @@
+         ));
+     })
+ }
++
++/// Debug print, with a newline.
++#[macro_export]
++macro_rules! debug {
++    ($string:expr) => ({
++        if cfg!(feature = "debug_prints") {
++            use $crate::time::interface::TimeManager;
++
++            let timestamp = $crate::time::time_manager().uptime();
++
++            $crate::print::_print(format_args_nl!(
++                concat!("<[>D {:>3}.{:06}> ", $string),
++                timestamp.as_secs(),
++                timestamp.subsec_micros(),
++            ));
++        }
++    });
++    ($format_string:expr, $($arg:tt)*) => ({
++        if cfg!(feature = "debug_prints") {
++            use $crate::time::interface::TimeManager;
++
++            let timestamp = $crate::time::time_manager().uptime();
++
++            $crate::print::_print(format_args_nl!(
++                concat!("<D {:>3}.{:06}> ", $format_string),
++                timestamp.as_secs(),
++                timestamp.subsec_micros(),
++                $($arg)*
++            ));
++        }
++    })
++}
+
+diff -uNr 18_backtrace/Makefile 19_kernel_heap/Makefile
+--- 18_backtrace/Makefile
++++ 19_kernel_heap/Makefile
+@@ -15,6 +15,11 @@
+ # Default to a serial device name that is common in Linux.
+ DEV_SERIAL ?= /dev/ttyUSB0
+
++# Optional debug prints.
++ifdef DEBUG_PRINTS
++    FEATURES = --features debug_prints
++endif
++
+ # Optional integration test name.
+ ifdef TEST
+     TEST_ARG = --test $(TEST)
+@@ -69,7 +74,7 @@
+ ##--------------------------------------------------------------------------------------------------
+ KERNEL_MANIFEST      = kernel/Cargo.toml
+ KERNEL_LINKER_SCRIPT = kernel.ld
+-LAST_BUILD_CONFIG    = target/$(BSP).build_config
++LAST_BUILD_CONFIG    = target/$(BSP)_$(DEBUG_PRINTS).build_config
+
+ KERNEL_ELF_RAW      = target/$(TARGET)/release/kernel
+ # This parses cargo's dep-info file.
+@@ -116,17 +121,17 @@
+     -D warnings                   \
+     -D missing_docs
+
+-FEATURES      = --features bsp_$(BSP)
++FEATURES     += --features bsp_$(BSP)
+ COMPILER_ARGS = --target=$(TARGET) \
+     $(FEATURES)                    \
+     --release
+
+ # build-std can be skipped for helper commands that do not rely on correct stack frames and other
+ # custom compiler options. This results in a huge speedup.
+-RUSTC_CMD   = cargo rustc $(COMPILER_ARGS) -Z build-std=core --manifest-path $(KERNEL_MANIFEST)
++RUSTC_CMD   = cargo rustc $(COMPILER_ARGS) -Z build-std=core,alloc --manifest-path $(KERNEL_MANIFEST)
+ DOC_CMD     = cargo doc $(COMPILER_ARGS)
+ CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
+-TEST_CMD    = cargo test $(COMPILER_ARGS) -Z build-std=core --manifest-path $(KERNEL_MANIFEST)
++TEST_CMD    = cargo test $(COMPILER_ARGS) -Z build-std=core,alloc --manifest-path $(KERNEL_MANIFEST)
+ OBJCOPY_CMD = rust-objcopy \
+     --strip-all            \
+     -O binary
+
+```
diff --git a/19_kernel_heap/kernel/Cargo.lock b/19_kernel_heap/kernel/Cargo.lock
new file mode 100644
index 000000000..9149faf0d
--- /dev/null
+++ b/19_kernel_heap/kernel/Cargo.lock
@@ -0,0 +1,96 @@
+# This file is automatically @generated by Cargo.
+# It is not intended for manual editing.
+version = 3
+
+[[package]]
+name = "cortex-a"
+version = "7.2.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
+dependencies = [
+ "tock-registers",
+]
+
+[[package]]
+name = "debug-symbol-types"
+version = "0.1.0"
+
+[[package]]
+name = "linked_list_allocator"
+version = "0.9.1"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "549ce1740e46b291953c4340adcd74c59bcf4308f4cac050fd33ba91b7168f4a"
+
+[[package]]
+name = "mingo"
+version = "0.19.0"
+dependencies = [
+ "cortex-a",
+ "debug-symbol-types",
+ "linked_list_allocator",
+ "qemu-exit",
+ "test-macros",
+ "test-types",
+ "tock-registers",
+]
+
+[[package]]
+name = "proc-macro2"
+version = "1.0.38"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "9027b48e9d4c9175fa2218adf3557f91c1137021739951d4932f5f8268ac48aa"
+dependencies = [
+ "unicode-xid",
+]
+
+[[package]]
+name = "qemu-exit"
+version = "3.0.1"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
+
+[[package]]
+name = "quote"
+version = "1.0.18"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "a1feb54ed693b93a84e14094943b84b7c4eae204c512b7ccb95ab0c66d278ad1"
+dependencies = [
+ "proc-macro2",
+]
+
+[[package]]
+name = "syn"
+version = "1.0.94"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "a07e33e919ebcd69113d5be0e4d70c5707004ff45188910106854f38b960df4a"
+dependencies = [
+ "proc-macro2",
+ "quote",
+ "unicode-xid",
+]
+
+[[package]]
+name = "test-macros"
+version = "0.1.0"
+dependencies = [
+ "proc-macro2",
+ "quote",
+ "syn",
+ "test-types",
+]
+
+[[package]]
+name = "test-types"
+version = "0.1.0"
+
+[[package]]
+name = "tock-registers"
+version = "0.7.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
+
+[[package]]
+name = "unicode-xid"
+version = "0.2.3"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "957e51f3646910546462e67d5f7599b9e4fb8acdd304b087a6494730f9eebf04"
diff --git a/19_kernel_heap/kernel/Cargo.toml b/19_kernel_heap/kernel/Cargo.toml
new file mode 100644
index 000000000..2f5d05920
--- /dev/null
+++ b/19_kernel_heap/kernel/Cargo.toml
@@ -0,0 +1,72 @@
+[package]
+name = "mingo"
+version = "0.19.0"
+authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+edition = "2021"
+
+[features]
+default = []
+debug_prints = []
+bsp_rpi3 = ["tock-registers"]
+bsp_rpi4 = ["tock-registers"]
+test_build = ["qemu-exit"]
+
+##--------------------------------------------------------------------------------------------------
+## Dependencies
+##--------------------------------------------------------------------------------------------------
+
+[dependencies]
+test-types = { path = "../libraries/test-types" }
+debug-symbol-types = { path = "../libraries/debug-symbol-types" }
+linked_list_allocator = { version = "0.9.x", default-features = false, features = ["const_mut_refs"] }
+
+# Optional dependencies
+tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
+qemu-exit = { version = "3.x.x", optional = true }
+
+# Platform specific dependencies
+[target.'cfg(target_arch = "aarch64")'.dependencies]
+cortex-a = { version = "7.x.x" }
+
+##--------------------------------------------------------------------------------------------------
+## Testing
+##--------------------------------------------------------------------------------------------------
+
+[dev-dependencies]
+test-macros = { path = "../libraries/test-macros" }
+
+# Unit tests are done in the library part of the kernel.
+[lib]
+name = "libkernel"
+test = true
+
+# Disable unit tests for the kernel binary.
+[[bin]]
+name = "kernel"
+path = "src/main.rs"
+test = false
+
+# List of tests without harness.
+[[test]]
+name = "00_console_sanity"
+harness = false
+
+[[test]]
+name = "02_exception_sync_page_fault"
+harness = false
+
+[[test]]
+name = "03_exception_restore_sanity"
+harness = false
+
+[[test]]
+name = "05_backtrace_sanity"
+harness = false
+
+[[test]]
+name = "06_backtrace_invalid_frame"
+harness = false
+
+[[test]]
+name = "07_backtrace_invalid_link"
+harness = false
diff --git a/19_kernel_heap/kernel/build.rs b/19_kernel_heap/kernel/build.rs
new file mode 100644
index 000000000..cab00bb37
--- /dev/null
+++ b/19_kernel_heap/kernel/build.rs
@@ -0,0 +1,20 @@
+use std::{env, fs, process};
+
+fn main() {
+    let ld_script_path = match env::var("LD_SCRIPT_PATH") {
+        Ok(var) => var,
+        _ => process::exit(0),
+    };
+
+    let files = fs::read_dir(ld_script_path).unwrap();
+    files
+        .filter_map(Result::ok)
+        .filter(|d| {
+            if let Some(e) = d.path().extension() {
+                e == "ld"
+            } else {
+                false
+            }
+        })
+        .for_each(|f| println!("cargo:rerun-if-changed={}", f.path().display()));
+}
diff --git a/19_kernel_heap/kernel/src/_arch/aarch64/backtrace.rs b/19_kernel_heap/kernel/src/_arch/aarch64/backtrace.rs
new file mode 100644
index 000000000..e8860984b
--- /dev/null
+++ b/19_kernel_heap/kernel/src/_arch/aarch64/backtrace.rs
@@ -0,0 +1,136 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural backtracing support.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::backtrace::arch_backtrace
+
+use crate::{
+    backtrace::BacktraceItem,
+    memory::{Address, Virtual},
+};
+use cortex_a::registers::*;
+use tock_registers::interfaces::Readable;
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// A Stack frame record.
+///
+/// # Note
+///
+/// The convention is that `previous_record` is valid as long as it contains a non-null value.
+/// Therefore, it is possible to type the member as `Option<&StackFrameRecord>` because of Rust's
+/// `null-pointer optimization`.
+#[repr(C)]
+struct StackFrameRecord<'a> {
+    previous_record: Option<&'a StackFrameRecord<'a>>,
+    link: Address<Virtual>,
+}
+
+struct StackFrameRecordIterator<'a> {
+    cur: &'a StackFrameRecord<'a>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl<'a> Iterator for StackFrameRecordIterator<'a> {
+    type Item = BacktraceItem;
+
+    fn next(&mut self) -> Option<Self::Item> {
+        static ABORT_FRAME: StackFrameRecord = StackFrameRecord {
+            previous_record: None,
+            link: Address::new(0),
+        };
+
+        // If previous is None, this is the root frame, so iteration will stop here.
+        let previous = self.cur.previous_record?;
+
+        // Need to abort if the pointer to the previous frame record is invalid.
+        let prev_addr = Address::<Virtual>::new(previous as *const _ as usize);
+        if !prev_addr.is_valid_stack_addr() {
+            // This allows to return the error and then stop on the next iteration.
+            self.cur = &ABORT_FRAME;
+            return Some(BacktraceItem::InvalidFramePointer(prev_addr));
+        }
+
+        let ret = if !self.cur.link.is_valid_code_addr() {
+            Some(BacktraceItem::InvalidLink(self.cur.link))
+        } else {
+            // The link points to the instruction to be executed _after_ returning from a branch.
+            // However, we want to show the instruction that caused the branch, so subtract by one
+            // instruction.
+            //
+            // This might be called from panic!, so it must not panic itself on the subtraction.
+            let link = if self.cur.link >= Address::new(4) {
+                self.cur.link - 4
+            } else {
+                self.cur.link
+            };
+
+            Some(BacktraceItem::Link(link))
+        };
+
+        // Advance the iterator.
+        self.cur = previous;
+
+        ret
+    }
+}
+
+fn stack_frame_record_iterator<'a>() -> Option<StackFrameRecordIterator<'a>> {
+    let fp = Address::<Virtual>::new(FP.get() as usize);
+    if !fp.is_valid_stack_addr() {
+        return None;
+    }
+
+    Some(StackFrameRecordIterator {
+        cur: unsafe { &*(fp.as_usize() as *const _) },
+    })
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Architectural implementation of the backtrace.
+pub fn backtrace(f: impl FnOnce(Option<&mut dyn Iterator<Item = BacktraceItem>>)) {
+    f(stack_frame_record_iterator().as_mut().map(|s| s as _))
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(feature = "test_build")]
+#[inline(always)]
+/// Hack for corrupting the previous frame address in the current stack frame.
+///
+/// # Safety
+///
+/// - To be used only by testing code.
+pub unsafe fn corrupt_previous_frame_addr() {
+    let sf = FP.get() as *mut usize;
+    *sf = 0x123;
+}
+
+#[cfg(feature = "test_build")]
+#[inline(always)]
+/// Hack for corrupting the link in the current stack frame.
+///
+/// # Safety
+///
+/// - To be used only by testing code.
+pub unsafe fn corrupt_link() {
+    let sf = FP.get() as *mut StackFrameRecord;
+    (*sf).link = Address::new(0x456);
+}
diff --git a/19_kernel_heap/kernel/src/_arch/aarch64/cpu.rs b/19_kernel_heap/kernel/src/_arch/aarch64/cpu.rs
new file mode 100644
index 000000000..66da661c7
--- /dev/null
+++ b/19_kernel_heap/kernel/src/_arch/aarch64/cpu.rs
@@ -0,0 +1,49 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural processor code.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::arch_cpu
+
+use cortex_a::asm;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+pub use asm::nop;
+
+/// Pause execution on the core.
+#[inline(always)]
+pub fn wait_forever() -> ! {
+    loop {
+        asm::wfe()
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+#[cfg(feature = "test_build")]
+use qemu_exit::QEMUExit;
+
+#[cfg(feature = "test_build")]
+const QEMU_EXIT_HANDLE: qemu_exit::AArch64 = qemu_exit::AArch64::new();
+
+/// Make the host QEMU binary execute `exit(1)`.
+#[cfg(feature = "test_build")]
+pub fn qemu_exit_failure() -> ! {
+    QEMU_EXIT_HANDLE.exit_failure()
+}
+
+/// Make the host QEMU binary execute `exit(0)`.
+#[cfg(feature = "test_build")]
+pub fn qemu_exit_success() -> ! {
+    QEMU_EXIT_HANDLE.exit_success()
+}
diff --git a/19_kernel_heap/kernel/src/_arch/aarch64/cpu/boot.rs b/19_kernel_heap/kernel/src/_arch/aarch64/cpu/boot.rs
new file mode 100644
index 000000000..15ab92b60
--- /dev/null
+++ b/19_kernel_heap/kernel/src/_arch/aarch64/cpu/boot.rs
@@ -0,0 +1,117 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural boot code.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::boot::arch_boot
+
+use crate::{memory, memory::Address};
+use core::{
+    arch::global_asm,
+    sync::atomic::{compiler_fence, Ordering},
+};
+use cortex_a::{asm, registers::*};
+use tock_registers::interfaces::Writeable;
+
+// Assembly counterpart to this file.
+global_asm!(
+    include_str!("boot.s"),
+    CONST_CURRENTEL_EL2 = const 0x8,
+    CONST_CORE_ID_MASK = const 0b11
+);
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// Prepares the transition from EL2 to EL1.
+///
+/// # Safety
+///
+/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
+/// - The HW state of EL1 must be prepared in a sound way.
+#[inline(always)]
+unsafe fn prepare_el2_to_el1_transition(
+    virt_boot_core_stack_end_exclusive_addr: u64,
+    virt_kernel_init_addr: u64,
+) {
+    // Enable timer counter registers for EL1.
+    CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
+
+    // No offset for reading the counters.
+    CNTVOFF_EL2.set(0);
+
+    // Set EL1 execution state to AArch64.
+    HCR_EL2.write(HCR_EL2::RW::EL1IsAarch64);
+
+    // Set up a simulated exception return.
+    //
+    // First, fake a saved program status where all interrupts were masked and SP_EL1 was used as a
+    // stack pointer.
+    SPSR_EL2.write(
+        SPSR_EL2::D::Masked
+            + SPSR_EL2::A::Masked
+            + SPSR_EL2::I::Masked
+            + SPSR_EL2::F::Masked
+            + SPSR_EL2::M::EL1h,
+    );
+
+    // Second, let the link register point to kernel_init().
+    ELR_EL2.set(virt_kernel_init_addr);
+
+    // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it. Since there
+    // are no plans to ever return to EL2, just re-use the same stack.
+    SP_EL1.set(virt_boot_core_stack_end_exclusive_addr);
+}
+
+/// Reset the backtrace by setting link register and frame pointer to zero.
+///
+/// # Safety
+///
+/// - This function must only be used immediately before entering EL1.
+#[inline(always)]
+unsafe fn prepare_backtrace_reset() {
+    compiler_fence(Ordering::SeqCst);
+    FP.set(0);
+    LR.set(0);
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The Rust entry of the `kernel` binary.
+///
+/// The function is called from the assembly `_start` function.
+///
+/// # Safety
+///
+/// - Exception return from EL2 must must continue execution in EL1 with `kernel_init()`.
+#[no_mangle]
+pub unsafe extern "C" fn _start_rust(
+    phys_kernel_tables_base_addr: u64,
+    virt_boot_core_stack_end_exclusive_addr: u64,
+    virt_kernel_init_addr: u64,
+) -> ! {
+    prepare_el2_to_el1_transition(
+        virt_boot_core_stack_end_exclusive_addr,
+        virt_kernel_init_addr,
+    );
+
+    // Turn on the MMU for EL1.
+    let addr = Address::new(phys_kernel_tables_base_addr as usize);
+    memory::mmu::enable_mmu_and_caching(addr).unwrap();
+
+    // Make the function we return to the root of a backtrace.
+    prepare_backtrace_reset();
+
+    // Use `eret` to "return" to EL1. Since virtual memory will already be enabled, this results in
+    // execution of kernel_init() in EL1 from its _virtual address_.
+    asm::eret()
+}
diff --git a/19_kernel_heap/kernel/src/_arch/aarch64/cpu/boot.s b/19_kernel_heap/kernel/src/_arch/aarch64/cpu/boot.s
new file mode 100644
index 000000000..8c70d035e
--- /dev/null
+++ b/19_kernel_heap/kernel/src/_arch/aarch64/cpu/boot.s
@@ -0,0 +1,97 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//--------------------------------------------------------------------------------------------------
+// Definitions
+//--------------------------------------------------------------------------------------------------
+
+// Load the address of a symbol into a register, PC-relative.
+//
+// The symbol must lie within +/- 4 GiB of the Program Counter.
+//
+// # Resources
+//
+// - https://sourceware.org/binutils/docs-2.36/as/AArch64_002dRelocations.html
+.macro ADR_REL register, symbol
+	adrp	\register, \symbol
+	add	\register, \register, #:lo12:\symbol
+.endm
+
+// Load the address of a symbol into a register, absolute.
+//
+// # Resources
+//
+// - https://sourceware.org/binutils/docs-2.36/as/AArch64_002dRelocations.html
+.macro ADR_ABS register, symbol
+	movz	\register, #:abs_g3:\symbol
+	movk	\register, #:abs_g2_nc:\symbol
+	movk	\register, #:abs_g1_nc:\symbol
+	movk	\register, #:abs_g0_nc:\symbol
+.endm
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+.section .text._start
+
+//------------------------------------------------------------------------------
+// fn _start()
+//------------------------------------------------------------------------------
+_start:
+	// Only proceed if the core executes in EL2. Park it otherwise.
+	mrs	x0, CurrentEL
+	cmp	x0, {CONST_CURRENTEL_EL2}
+	b.ne	.L_parking_loop
+
+	// Only proceed on the boot core. Park it otherwise.
+	mrs	x1, MPIDR_EL1
+	and	x1, x1, {CONST_CORE_ID_MASK}
+	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
+	cmp	x1, x2
+	b.ne	.L_parking_loop
+
+	// If execution reaches here, it is the boot core.
+
+	// Initialize DRAM.
+	ADR_REL	x0, __bss_start
+	ADR_REL x1, __bss_end_exclusive
+
+.L_bss_init_loop:
+	cmp	x0, x1
+	b.eq	.L_prepare_rust
+	stp	xzr, xzr, [x0], #16
+	b	.L_bss_init_loop
+
+	// Prepare the jump to Rust code.
+.L_prepare_rust:
+	// Load the base address of the kernel's translation tables.
+	ldr	x0, PHYS_KERNEL_TABLES_BASE_ADDR // provided by bsp/__board_name__/memory/mmu.rs
+
+	// Load the _absolute_ addresses of the following symbols. Since the kernel is linked at
+	// the top of the 64 bit address space, these are effectively virtual addresses.
+	ADR_ABS	x1, __boot_core_stack_end_exclusive
+	ADR_ABS	x2, kernel_init
+
+	// Load the PC-relative address of the stack and set the stack pointer.
+	//
+	// Since _start() is the first function that runs after the firmware has loaded the kernel
+	// into memory, retrieving this symbol PC-relative returns the "physical" address.
+	//
+	// Setting the stack pointer to this value ensures that anything that still runs in EL2,
+	// until the kernel returns to EL1 with the MMU enabled, works as well. After the return to
+	// EL1, the virtual address of the stack retrieved above will be used.
+	ADR_REL	x4, __boot_core_stack_end_exclusive
+	mov	sp, x4
+
+	// Jump to Rust code. x0, x1 and x2 hold the function arguments provided to _start_rust().
+	b	_start_rust
+
+	// Infinitely wait for events (aka "park the core").
+.L_parking_loop:
+	wfe
+	b	.L_parking_loop
+
+.size	_start, . - _start
+.type	_start, function
+.global	_start
diff --git a/19_kernel_heap/kernel/src/_arch/aarch64/cpu/smp.rs b/19_kernel_heap/kernel/src/_arch/aarch64/cpu/smp.rs
new file mode 100644
index 000000000..351fde62e
--- /dev/null
+++ b/19_kernel_heap/kernel/src/_arch/aarch64/cpu/smp.rs
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural symmetric multiprocessing.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::smp::arch_smp
+
+use cortex_a::registers::*;
+use tock_registers::interfaces::Readable;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return the executing core's id.
+#[inline(always)]
+pub fn core_id<T>() -> T
+where
+    T: From<u8>,
+{
+    const CORE_MASK: u64 = 0b11;
+
+    T::from((MPIDR_EL1.get() & CORE_MASK) as u8)
+}
diff --git a/19_kernel_heap/kernel/src/_arch/aarch64/exception.rs b/19_kernel_heap/kernel/src/_arch/aarch64/exception.rs
new file mode 100644
index 000000000..17ec30095
--- /dev/null
+++ b/19_kernel_heap/kernel/src/_arch/aarch64/exception.rs
@@ -0,0 +1,325 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural synchronous and asynchronous exception handling.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::exception::arch_exception
+
+use crate::{exception, memory, symbols};
+use core::{arch::global_asm, cell::UnsafeCell, fmt};
+use cortex_a::{asm::barrier, registers::*};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    registers::InMemoryRegister,
+};
+
+// Assembly counterpart to this file.
+global_asm!(
+    include_str!("exception.s"),
+    CONST_ESR_EL1_EC_SHIFT = const 26,
+    CONST_ESR_EL1_EC_VALUE_SVC64 = const 0x15
+);
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Wrapper structs for memory copies of registers.
+#[repr(transparent)]
+struct SpsrEL1(InMemoryRegister<u64, SPSR_EL1::Register>);
+struct EsrEL1(InMemoryRegister<u64, ESR_EL1::Register>);
+
+/// The exception context as it is stored on the stack on exception entry.
+#[repr(C)]
+struct ExceptionContext {
+    /// General Purpose Registers.
+    gpr: [u64; 30],
+
+    /// The link register, aka x30.
+    lr: u64,
+
+    /// Exception link register. The program counter at the time the exception happened.
+    elr_el1: u64,
+
+    /// Saved program status.
+    spsr_el1: SpsrEL1,
+
+    /// Exception syndrome register.
+    esr_el1: EsrEL1,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// Prints verbose information about the exception and then panics.
+fn default_exception_handler(exc: &ExceptionContext) {
+    panic!(
+        "CPU Exception!\n\n\
+        {}",
+        exc
+    );
+}
+
+//------------------------------------------------------------------------------
+// Current, EL0
+//------------------------------------------------------------------------------
+
+#[no_mangle]
+unsafe extern "C" fn current_el0_synchronous(_e: &mut ExceptionContext) {
+    panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
+}
+
+#[no_mangle]
+unsafe extern "C" fn current_el0_irq(_e: &mut ExceptionContext) {
+    panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
+}
+
+#[no_mangle]
+unsafe extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
+    panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
+}
+
+//------------------------------------------------------------------------------
+// Current, ELx
+//------------------------------------------------------------------------------
+
+#[no_mangle]
+unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
+    #[cfg(feature = "test_build")]
+    {
+        const TEST_SVC_ID: u64 = 0x1337;
+
+        if let Some(ESR_EL1::EC::Value::SVC64) = e.esr_el1.exception_class() {
+            if e.esr_el1.iss() == TEST_SVC_ID {
+                return;
+            }
+        }
+    }
+
+    default_exception_handler(e);
+}
+
+#[no_mangle]
+unsafe extern "C" fn current_elx_irq(_e: &mut ExceptionContext) {
+    let token = &exception::asynchronous::IRQContext::new();
+    exception::asynchronous::irq_manager().handle_pending_irqs(token);
+}
+
+#[no_mangle]
+unsafe extern "C" fn current_elx_serror(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+//------------------------------------------------------------------------------
+// Lower, AArch64
+//------------------------------------------------------------------------------
+
+#[no_mangle]
+unsafe extern "C" fn lower_aarch64_synchronous(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+#[no_mangle]
+unsafe extern "C" fn lower_aarch64_irq(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+#[no_mangle]
+unsafe extern "C" fn lower_aarch64_serror(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+//------------------------------------------------------------------------------
+// Lower, AArch32
+//------------------------------------------------------------------------------
+
+#[no_mangle]
+unsafe extern "C" fn lower_aarch32_synchronous(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+#[no_mangle]
+unsafe extern "C" fn lower_aarch32_irq(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+#[no_mangle]
+unsafe extern "C" fn lower_aarch32_serror(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+//------------------------------------------------------------------------------
+// Misc
+//------------------------------------------------------------------------------
+
+/// Human readable SPSR_EL1.
+#[rustfmt::skip]
+impl fmt::Display for SpsrEL1 {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        // Raw value.
+        writeln!(f, "SPSR_EL1: {:#010x}", self.0.get())?;
+
+        let to_flag_str = |x| -> _ {
+            if x { "Set" } else { "Not set" }
+         };
+
+        writeln!(f, "      Flags:")?;
+        writeln!(f, "            Negative (N): {}", to_flag_str(self.0.is_set(SPSR_EL1::N)))?;
+        writeln!(f, "            Zero     (Z): {}", to_flag_str(self.0.is_set(SPSR_EL1::Z)))?;
+        writeln!(f, "            Carry    (C): {}", to_flag_str(self.0.is_set(SPSR_EL1::C)))?;
+        writeln!(f, "            Overflow (V): {}", to_flag_str(self.0.is_set(SPSR_EL1::V)))?;
+
+        let to_mask_str = |x| -> _ {
+            if x { "Masked" } else { "Unmasked" }
+        };
+
+        writeln!(f, "      Exception handling state:")?;
+        writeln!(f, "            Debug  (D): {}", to_mask_str(self.0.is_set(SPSR_EL1::D)))?;
+        writeln!(f, "            SError (A): {}", to_mask_str(self.0.is_set(SPSR_EL1::A)))?;
+        writeln!(f, "            IRQ    (I): {}", to_mask_str(self.0.is_set(SPSR_EL1::I)))?;
+        writeln!(f, "            FIQ    (F): {}", to_mask_str(self.0.is_set(SPSR_EL1::F)))?;
+
+        write!(f, "      Illegal Execution State (IL): {}",
+            to_flag_str(self.0.is_set(SPSR_EL1::IL))
+        )
+    }
+}
+
+impl EsrEL1 {
+    #[inline(always)]
+    fn exception_class(&self) -> Option<ESR_EL1::EC::Value> {
+        self.0.read_as_enum(ESR_EL1::EC)
+    }
+
+    #[cfg(feature = "test_build")]
+    #[inline(always)]
+    fn iss(&self) -> u64 {
+        self.0.read(ESR_EL1::ISS)
+    }
+}
+
+/// Human readable ESR_EL1.
+#[rustfmt::skip]
+impl fmt::Display for EsrEL1 {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        // Raw print of whole register.
+        writeln!(f, "ESR_EL1: {:#010x}", self.0.get())?;
+
+        // Raw print of exception class.
+        write!(f, "      Exception Class         (EC) : {:#x}", self.0.read(ESR_EL1::EC))?;
+
+        // Exception class.
+        let ec_translation = match self.exception_class() {
+            Some(ESR_EL1::EC::Value::DataAbortCurrentEL) => "Data Abort, current EL",
+            _ => "N/A",
+        };
+        writeln!(f, " - {}", ec_translation)?;
+
+        // Raw print of instruction specific syndrome.
+        write!(f, "      Instr Specific Syndrome (ISS): {:#x}", self.0.read(ESR_EL1::ISS))
+    }
+}
+
+impl ExceptionContext {
+    #[inline(always)]
+    fn exception_class(&self) -> Option<ESR_EL1::EC::Value> {
+        self.esr_el1.exception_class()
+    }
+
+    #[inline(always)]
+    fn fault_address_valid(&self) -> bool {
+        use ESR_EL1::EC::Value::*;
+
+        match self.exception_class() {
+            None => false,
+            Some(ec) => matches!(
+                ec,
+                InstrAbortLowerEL
+                    | InstrAbortCurrentEL
+                    | PCAlignmentFault
+                    | DataAbortLowerEL
+                    | DataAbortCurrentEL
+                    | WatchpointLowerEL
+                    | WatchpointCurrentEL
+            ),
+        }
+    }
+}
+
+/// Human readable print of the exception context.
+impl fmt::Display for ExceptionContext {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        writeln!(f, "{}", self.esr_el1)?;
+
+        if self.fault_address_valid() {
+            writeln!(f, "FAR_EL1: {:#018x}", FAR_EL1.get() as usize)?;
+        }
+
+        writeln!(f, "{}", self.spsr_el1)?;
+        writeln!(f, "ELR_EL1: {:#018x}", self.elr_el1)?;
+        writeln!(
+            f,
+            "      Symbol: {}",
+            match symbols::lookup_symbol(memory::Address::new(self.elr_el1 as usize)) {
+                Some(sym) => sym.name(),
+                _ => "Symbol not found",
+            }
+        )?;
+        writeln!(f)?;
+        writeln!(f, "General purpose register:")?;
+
+        #[rustfmt::skip]
+        let alternating = |x| -> _ {
+            if x % 2 == 0 { "   " } else { "\n" }
+        };
+
+        // Print two registers per line.
+        for (i, reg) in self.gpr.iter().enumerate() {
+            write!(f, "      x{: <2}: {: >#018x}{}", i, reg, alternating(i))?;
+        }
+        write!(f, "      lr : {:#018x}", self.lr)
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+use crate::exception::PrivilegeLevel;
+
+/// The processing element's current privilege level.
+pub fn current_privilege_level() -> (PrivilegeLevel, &'static str) {
+    let el = CurrentEL.read_as_enum(CurrentEL::EL);
+    match el {
+        Some(CurrentEL::EL::Value::EL2) => (PrivilegeLevel::Hypervisor, "EL2"),
+        Some(CurrentEL::EL::Value::EL1) => (PrivilegeLevel::Kernel, "EL1"),
+        Some(CurrentEL::EL::Value::EL0) => (PrivilegeLevel::User, "EL0"),
+        _ => (PrivilegeLevel::Unknown, "Unknown"),
+    }
+}
+
+/// Init exception handling by setting the exception vector base address register.
+///
+/// # Safety
+///
+/// - Changes the HW state of the executing core.
+/// - The vector table and the symbol `__exception_vector_table_start` from the linker script must
+///   adhere to the alignment and size constraints demanded by the ARMv8-A Architecture Reference
+///   Manual.
+pub unsafe fn handling_init() {
+    // Provided by exception.S.
+    extern "Rust" {
+        static __exception_vector_start: UnsafeCell<()>;
+    }
+
+    VBAR_EL1.set(__exception_vector_start.get() as u64);
+
+    // Force VBAR update to complete before next instruction.
+    barrier::isb(barrier::SY);
+}
diff --git a/19_kernel_heap/kernel/src/_arch/aarch64/exception.s b/19_kernel_heap/kernel/src/_arch/aarch64/exception.s
new file mode 100644
index 000000000..cdef8c586
--- /dev/null
+++ b/19_kernel_heap/kernel/src/_arch/aarch64/exception.s
@@ -0,0 +1,190 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//--------------------------------------------------------------------------------------------------
+// Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Call the function provided by parameter `\handler` after saving the exception context. Provide
+/// the context as the first parameter to '\handler'.
+.macro CALL_WITH_CONTEXT handler is_lower_el is_sync
+__vector_\handler:
+	// Make room on the stack for the exception context.
+	sub	sp,  sp,  #16 * 18
+
+	// Store all general purpose registers on the stack.
+	stp	x0,  x1,  [sp, #16 * 0]
+	stp	x2,  x3,  [sp, #16 * 1]
+	stp	x4,  x5,  [sp, #16 * 2]
+	stp	x6,  x7,  [sp, #16 * 3]
+	stp	x8,  x9,  [sp, #16 * 4]
+	stp	x10, x11, [sp, #16 * 5]
+	stp	x12, x13, [sp, #16 * 6]
+	stp	x14, x15, [sp, #16 * 7]
+	stp	x16, x17, [sp, #16 * 8]
+	stp	x18, x19, [sp, #16 * 9]
+	stp	x20, x21, [sp, #16 * 10]
+	stp	x22, x23, [sp, #16 * 11]
+	stp	x24, x25, [sp, #16 * 12]
+	stp	x26, x27, [sp, #16 * 13]
+	stp	x28, x29, [sp, #16 * 14]
+
+	// Add the exception link register (ELR_EL1), saved program status (SPSR_EL1) and exception
+	// syndrome register (ESR_EL1).
+	mrs	x1,  ELR_EL1
+	mrs	x2,  SPSR_EL1
+	mrs	x3,  ESR_EL1
+
+	stp	lr,  x1,  [sp, #16 * 15]
+	stp	x2,  x3,  [sp, #16 * 16]
+
+	// Build a stack frame for backtracing.
+.if \is_lower_el == 1
+	// If we came from a lower EL, make it a root frame (by storing zero) so that the kernel
+	// does not attempt to trace into userspace.
+	stp	xzr, xzr, [sp, #16 * 17]
+.else
+	// For normal branches, the link address points to the instruction to be executed _after_
+	// returning from a branch. In a backtrace, we want to show the instruction that caused the
+	// branch, though. That is why code in backtrace.rs subtracts 4 (length of one instruction)
+	// from the link address.
+	//
+	// Here we have a special case, though, because ELR_EL1 is used instead of LR to build the
+	// stack frame, so that it becomes possible to trace beyond an exception. Hence, it must be
+	// considered that semantics for ELR_EL1 differ from case to case.
+	//
+	// Unless an "exception generating instruction" was executed, ELR_EL1 already points to the
+	// the correct instruction, and hence the subtraction by 4 in backtrace.rs would yield wrong
+	// results. To cover for this, 4 is added to ELR_EL1 below unless the cause of exception was
+	// an SVC instruction. BRK and HLT are "exception generating instructions" as well, but they
+	// are not expected and therefore left out for now.
+	//
+	// For reference: Search for "preferred exception return address" in the Architecture
+	// Reference Manual for ARMv8-A.
+.if \is_sync == 1
+	lsr	w3,  w3, {CONST_ESR_EL1_EC_SHIFT}   // w3 = ESR_EL1.EC
+	cmp	w3,  {CONST_ESR_EL1_EC_VALUE_SVC64} // w3 == SVC64 ?
+	b.eq	1f
+.endif
+	add	x1,  x1, #4
+1:
+	stp	x29, x1, [sp, #16 * 17]
+.endif
+
+	// Set the frame pointer to the stack frame record.
+	add	x29, sp, #16 * 17
+
+	// x0 is the first argument for the function called through `\handler`.
+	mov	x0,  sp
+
+	// Call `\handler`.
+	bl	\handler
+
+	// After returning from exception handling code, replay the saved context and return via
+	// `eret`.
+	b	__exception_restore_context
+
+.size	__vector_\handler, . - __vector_\handler
+.type	__vector_\handler, function
+.endm
+
+.macro FIQ_SUSPEND
+1:	wfe
+	b	1b
+.endm
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+.section .text
+
+//------------------------------------------------------------------------------
+// The exception vector table.
+//------------------------------------------------------------------------------
+
+// Align by 2^11 bytes, as demanded by ARMv8-A. Same as ALIGN(2048) in an ld script.
+.align 11
+
+// Export a symbol for the Rust code to use.
+__exception_vector_start:
+
+// Current exception level with SP_EL0.
+//
+// .org sets the offset relative to section start.
+//
+// # Safety
+//
+// - It must be ensured that `CALL_WITH_CONTEXT` <= 0x80 bytes.
+.org 0x000
+	CALL_WITH_CONTEXT current_el0_synchronous, 0, 1
+.org 0x080
+	CALL_WITH_CONTEXT current_el0_irq, 0, 0
+.org 0x100
+	FIQ_SUSPEND
+.org 0x180
+	CALL_WITH_CONTEXT current_el0_serror, 0, 0
+
+// Current exception level with SP_ELx, x > 0.
+.org 0x200
+	CALL_WITH_CONTEXT current_elx_synchronous, 0, 1
+.org 0x280
+	CALL_WITH_CONTEXT current_elx_irq, 0, 0
+.org 0x300
+	FIQ_SUSPEND
+.org 0x380
+	CALL_WITH_CONTEXT current_elx_serror, 0, 0
+
+// Lower exception level, AArch64
+.org 0x400
+	CALL_WITH_CONTEXT lower_aarch64_synchronous, 1, 1
+.org 0x480
+	CALL_WITH_CONTEXT lower_aarch64_irq, 1, 0
+.org 0x500
+	FIQ_SUSPEND
+.org 0x580
+	CALL_WITH_CONTEXT lower_aarch64_serror, 1, 0
+
+// Lower exception level, AArch32
+.org 0x600
+	CALL_WITH_CONTEXT lower_aarch32_synchronous, 1, 0
+.org 0x680
+	CALL_WITH_CONTEXT lower_aarch32_irq, 1, 0
+.org 0x700
+	FIQ_SUSPEND
+.org 0x780
+	CALL_WITH_CONTEXT lower_aarch32_serror, 1, 0
+.org 0x800
+
+//------------------------------------------------------------------------------
+// fn __exception_restore_context()
+//------------------------------------------------------------------------------
+__exception_restore_context:
+	ldr	w19,      [sp, #16 * 16]
+	ldp	lr,  x20, [sp, #16 * 15]
+
+	msr	SPSR_EL1, x19
+	msr	ELR_EL1,  x20
+
+	ldp	x0,  x1,  [sp, #16 * 0]
+	ldp	x2,  x3,  [sp, #16 * 1]
+	ldp	x4,  x5,  [sp, #16 * 2]
+	ldp	x6,  x7,  [sp, #16 * 3]
+	ldp	x8,  x9,  [sp, #16 * 4]
+	ldp	x10, x11, [sp, #16 * 5]
+	ldp	x12, x13, [sp, #16 * 6]
+	ldp	x14, x15, [sp, #16 * 7]
+	ldp	x16, x17, [sp, #16 * 8]
+	ldp	x18, x19, [sp, #16 * 9]
+	ldp	x20, x21, [sp, #16 * 10]
+	ldp	x22, x23, [sp, #16 * 11]
+	ldp	x24, x25, [sp, #16 * 12]
+	ldp	x26, x27, [sp, #16 * 13]
+	ldp	x28, x29, [sp, #16 * 14]
+
+	add	sp,  sp,  #16 * 18
+
+	eret
+
+.size	__exception_restore_context, . - __exception_restore_context
+.type	__exception_restore_context, function
diff --git a/19_kernel_heap/kernel/src/_arch/aarch64/exception/asynchronous.rs b/19_kernel_heap/kernel/src/_arch/aarch64/exception/asynchronous.rs
new file mode 100644
index 000000000..73b82e65d
--- /dev/null
+++ b/19_kernel_heap/kernel/src/_arch/aarch64/exception/asynchronous.rs
@@ -0,0 +1,152 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural asynchronous exception handling.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::exception::asynchronous::arch_asynchronous
+
+use core::arch::asm;
+use cortex_a::registers::*;
+use tock_registers::interfaces::{Readable, Writeable};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+mod daif_bits {
+    pub const IRQ: u8 = 0b0010;
+}
+
+trait DaifField {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register>;
+}
+
+struct Debug;
+struct SError;
+struct IRQ;
+struct FIQ;
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl DaifField for Debug {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
+        DAIF::D
+    }
+}
+
+impl DaifField for SError {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
+        DAIF::A
+    }
+}
+
+impl DaifField for IRQ {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
+        DAIF::I
+    }
+}
+
+impl DaifField for FIQ {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
+        DAIF::F
+    }
+}
+
+fn is_masked<T>() -> bool
+where
+    T: DaifField,
+{
+    DAIF.is_set(T::daif_field())
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Returns whether IRQs are masked on the executing core.
+pub fn is_local_irq_masked() -> bool {
+    !is_masked::<IRQ>()
+}
+
+/// Unmask IRQs on the executing core.
+///
+/// It is not needed to place an explicit instruction synchronization barrier after the `msr`.
+/// Quoting the Architecture Reference Manual for ARMv8-A, section C5.1.3:
+///
+/// "Writes to PSTATE.{PAN, D, A, I, F} occur in program order without the need for additional
+/// synchronization."
+///
+/// # Safety
+///
+/// - Changes the HW state of the executing core.
+#[inline(always)]
+pub unsafe fn local_irq_unmask() {
+    #[rustfmt::skip]
+    asm!(
+        "msr DAIFClr, {arg}",
+        arg = const daif_bits::IRQ,
+        options(nomem, nostack, preserves_flags)
+    );
+}
+
+/// Mask IRQs on the executing core.
+///
+/// # Safety
+///
+/// - Changes the HW state of the executing core.
+#[inline(always)]
+pub unsafe fn local_irq_mask() {
+    #[rustfmt::skip]
+    asm!(
+        "msr DAIFSet, {arg}",
+        arg = const daif_bits::IRQ,
+        options(nomem, nostack, preserves_flags)
+    );
+}
+
+/// Mask IRQs on the executing core and return the previously saved interrupt mask bits (DAIF).
+///
+/// # Safety
+///
+/// - Changes the HW state of the executing core.
+#[inline(always)]
+pub unsafe fn local_irq_mask_save() -> u64 {
+    let saved = DAIF.get();
+    local_irq_mask();
+
+    saved
+}
+
+/// Restore the interrupt mask bits (DAIF) using the callee's argument.
+///
+/// # Safety
+///
+/// - Changes the HW state of the executing core.
+/// - No sanity checks on the input.
+#[inline(always)]
+pub unsafe fn local_irq_restore(saved: u64) {
+    DAIF.set(saved);
+}
+
+/// Print the AArch64 exceptions status.
+#[rustfmt::skip]
+pub fn print_state() {
+    use crate::info;
+
+    let to_mask_str = |x| -> _ {
+        if x { "Masked" } else { "Unmasked" }
+    };
+
+    info!("      Debug:  {}", to_mask_str(is_masked::<Debug>()));
+    info!("      SError: {}", to_mask_str(is_masked::<SError>()));
+    info!("      IRQ:    {}", to_mask_str(is_masked::<IRQ>()));
+    info!("      FIQ:    {}", to_mask_str(is_masked::<FIQ>()));
+}
diff --git a/19_kernel_heap/kernel/src/_arch/aarch64/memory/mmu.rs b/19_kernel_heap/kernel/src/_arch/aarch64/memory/mmu.rs
new file mode 100644
index 000000000..3d6c18b74
--- /dev/null
+++ b/19_kernel_heap/kernel/src/_arch/aarch64/memory/mmu.rs
@@ -0,0 +1,158 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Memory Management Unit Driver.
+//!
+//! Only 64 KiB granule is supported.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::memory::mmu::arch_mmu
+
+use crate::{
+    bsp, memory,
+    memory::{mmu::TranslationGranule, Address, Physical},
+};
+use core::intrinsics::unlikely;
+use cortex_a::{asm::barrier, registers::*};
+use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Memory Management Unit type.
+struct MemoryManagementUnit;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub type Granule512MiB = TranslationGranule<{ 512 * 1024 * 1024 }>;
+pub type Granule64KiB = TranslationGranule<{ 64 * 1024 }>;
+
+/// Constants for indexing the MAIR_EL1.
+#[allow(dead_code)]
+pub mod mair {
+    pub const DEVICE: u64 = 0;
+    pub const NORMAL: u64 = 1;
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static MMU: MemoryManagementUnit = MemoryManagementUnit;
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl<const AS_SIZE: usize> memory::mmu::AddressSpace<AS_SIZE> {
+    /// Checks for architectural restrictions.
+    pub const fn arch_address_space_size_sanity_checks() {
+        // Size must be at least one full 512 MiB table.
+        assert!((AS_SIZE % Granule512MiB::SIZE) == 0);
+
+        // Check for 48 bit virtual address size as maximum, which is supported by any ARMv8
+        // version.
+        assert!(AS_SIZE <= (1 << 48));
+    }
+}
+
+impl MemoryManagementUnit {
+    /// Setup function for the MAIR_EL1 register.
+    #[inline(always)]
+    fn set_up_mair(&self) {
+        // Define the memory types being mapped.
+        MAIR_EL1.write(
+            // Attribute 1 - Cacheable normal DRAM.
+            MAIR_EL1::Attr1_Normal_Outer::WriteBack_NonTransient_ReadWriteAlloc +
+        MAIR_EL1::Attr1_Normal_Inner::WriteBack_NonTransient_ReadWriteAlloc +
+
+        // Attribute 0 - Device.
+        MAIR_EL1::Attr0_Device::nonGathering_nonReordering_EarlyWriteAck,
+        );
+    }
+
+    /// Configure various settings of stage 1 of the EL1 translation regime.
+    #[inline(always)]
+    fn configure_translation_control(&self) {
+        let t1sz = (64 - bsp::memory::mmu::KernelVirtAddrSpace::SIZE_SHIFT) as u64;
+
+        TCR_EL1.write(
+            TCR_EL1::TBI1::Used
+                + TCR_EL1::IPS::Bits_40
+                + TCR_EL1::TG1::KiB_64
+                + TCR_EL1::SH1::Inner
+                + TCR_EL1::ORGN1::WriteBack_ReadAlloc_WriteAlloc_Cacheable
+                + TCR_EL1::IRGN1::WriteBack_ReadAlloc_WriteAlloc_Cacheable
+                + TCR_EL1::EPD1::EnableTTBR1Walks
+                + TCR_EL1::A1::TTBR1
+                + TCR_EL1::T1SZ.val(t1sz)
+                + TCR_EL1::EPD0::DisableTTBR0Walks,
+        );
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the MMU instance.
+pub fn mmu() -> &'static impl memory::mmu::interface::MMU {
+    &MMU
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use memory::mmu::MMUEnableError;
+
+impl memory::mmu::interface::MMU for MemoryManagementUnit {
+    unsafe fn enable_mmu_and_caching(
+        &self,
+        phys_tables_base_addr: Address<Physical>,
+    ) -> Result<(), MMUEnableError> {
+        if unlikely(self.is_enabled()) {
+            return Err(MMUEnableError::AlreadyEnabled);
+        }
+
+        // Fail early if translation granule is not supported.
+        if unlikely(!ID_AA64MMFR0_EL1.matches_all(ID_AA64MMFR0_EL1::TGran64::Supported)) {
+            return Err(MMUEnableError::Other(
+                "Translation granule not supported in HW",
+            ));
+        }
+
+        // Prepare the memory attribute indirection register.
+        self.set_up_mair();
+
+        // Set the "Translation Table Base Register".
+        TTBR1_EL1.set_baddr(phys_tables_base_addr.as_usize() as u64);
+
+        self.configure_translation_control();
+
+        // Switch the MMU on.
+        //
+        // First, force all previous changes to be seen before the MMU is enabled.
+        barrier::isb(barrier::SY);
+
+        // Enable the MMU and turn on data and instruction caching.
+        SCTLR_EL1.modify(SCTLR_EL1::M::Enable + SCTLR_EL1::C::Cacheable + SCTLR_EL1::I::Cacheable);
+
+        // Force MMU init to complete before next instruction.
+        barrier::isb(barrier::SY);
+
+        Ok(())
+    }
+
+    #[inline(always)]
+    fn is_enabled(&self) -> bool {
+        SCTLR_EL1.matches_all(SCTLR_EL1::M::Enable)
+    }
+}
diff --git a/19_kernel_heap/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs b/19_kernel_heap/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
new file mode 100644
index 000000000..f0b4ac85f
--- /dev/null
+++ b/19_kernel_heap/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -0,0 +1,521 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural translation table.
+//!
+//! Only 64 KiB granule is supported.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::memory::mmu::translation_table::arch_translation_table
+
+use crate::{
+    bsp,
+    memory::{
+        self,
+        mmu::{
+            arch_mmu::{Granule512MiB, Granule64KiB},
+            AccessPermissions, AttributeFields, MemAttributes, MemoryRegion, PageAddress,
+        },
+        Address, Physical, Virtual,
+    },
+};
+use core::convert;
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields,
+    registers::InMemoryRegister,
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+// A table descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-15.
+register_bitfields! {u64,
+    STAGE1_TABLE_DESCRIPTOR [
+        /// Physical address of the next descriptor.
+        NEXT_LEVEL_TABLE_ADDR_64KiB OFFSET(16) NUMBITS(32) [], // [47:16]
+
+        TYPE  OFFSET(1) NUMBITS(1) [
+            Block = 0,
+            Table = 1
+        ],
+
+        VALID OFFSET(0) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ]
+    ]
+}
+
+// A level 3 page descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-17.
+register_bitfields! {u64,
+    STAGE1_PAGE_DESCRIPTOR [
+        /// Unprivileged execute-never.
+        UXN      OFFSET(54) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
+        /// Privileged execute-never.
+        PXN      OFFSET(53) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
+        /// Physical address of the next table descriptor (lvl2) or the page descriptor (lvl3).
+        OUTPUT_ADDR_64KiB OFFSET(16) NUMBITS(32) [], // [47:16]
+
+        /// Access flag.
+        AF       OFFSET(10) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
+        /// Shareability field.
+        SH       OFFSET(8) NUMBITS(2) [
+            OuterShareable = 0b10,
+            InnerShareable = 0b11
+        ],
+
+        /// Access Permissions.
+        AP       OFFSET(6) NUMBITS(2) [
+            RW_EL1 = 0b00,
+            RW_EL1_EL0 = 0b01,
+            RO_EL1 = 0b10,
+            RO_EL1_EL0 = 0b11
+        ],
+
+        /// Memory attributes index into the MAIR_EL1 register.
+        AttrIndx OFFSET(2) NUMBITS(3) [],
+
+        TYPE     OFFSET(1) NUMBITS(1) [
+            Reserved_Invalid = 0,
+            Page = 1
+        ],
+
+        VALID    OFFSET(0) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ]
+    ]
+}
+
+/// A table descriptor for 64 KiB aperture.
+///
+/// The output points to the next table.
+#[derive(Copy, Clone)]
+#[repr(C)]
+struct TableDescriptor {
+    value: u64,
+}
+
+/// A page descriptor with 64 KiB aperture.
+///
+/// The output points to physical memory.
+#[derive(Copy, Clone)]
+#[repr(C)]
+struct PageDescriptor {
+    value: u64,
+}
+
+trait StartAddr {
+    fn virt_start_addr(&self) -> Address<Virtual>;
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Big monolithic struct for storing the translation tables. Individual levels must be 64 KiB
+/// aligned, so the lvl3 is put first.
+#[repr(C)]
+#[repr(align(65536))]
+pub struct FixedSizeTranslationTable<const NUM_TABLES: usize, const START_FROM_TOP: bool> {
+    /// Page descriptors, covering 64 KiB windows per entry.
+    lvl3: [[PageDescriptor; 8192]; NUM_TABLES],
+
+    /// Table descriptors, covering 512 MiB windows.
+    lvl2: [TableDescriptor; NUM_TABLES],
+
+    /// Have the tables been initialized?
+    initialized: bool,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl<T, const N: usize> StartAddr for [T; N] {
+    fn virt_start_addr(&self) -> Address<Virtual> {
+        Address::new(self as *const _ as usize)
+    }
+}
+
+impl TableDescriptor {
+    /// Create an instance.
+    ///
+    /// Descriptor is invalid by default.
+    pub const fn new_zeroed() -> Self {
+        Self { value: 0 }
+    }
+
+    /// Create an instance pointing to the supplied address.
+    pub fn from_next_lvl_table_addr(phys_next_lvl_table_addr: Address<Physical>) -> Self {
+        let val = InMemoryRegister::<u64, STAGE1_TABLE_DESCRIPTOR::Register>::new(0);
+
+        let shifted = phys_next_lvl_table_addr.as_usize() >> Granule64KiB::SHIFT;
+        val.write(
+            STAGE1_TABLE_DESCRIPTOR::NEXT_LEVEL_TABLE_ADDR_64KiB.val(shifted as u64)
+                + STAGE1_TABLE_DESCRIPTOR::TYPE::Table
+                + STAGE1_TABLE_DESCRIPTOR::VALID::True,
+        );
+
+        TableDescriptor { value: val.get() }
+    }
+}
+
+/// Convert the kernel's generic memory attributes to HW-specific attributes of the MMU.
+impl convert::From<AttributeFields>
+    for tock_registers::fields::FieldValue<u64, STAGE1_PAGE_DESCRIPTOR::Register>
+{
+    fn from(attribute_fields: AttributeFields) -> Self {
+        // Memory attributes.
+        let mut desc = match attribute_fields.mem_attributes {
+            MemAttributes::CacheableDRAM => {
+                STAGE1_PAGE_DESCRIPTOR::SH::InnerShareable
+                    + STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(memory::mmu::arch_mmu::mair::NORMAL)
+            }
+            MemAttributes::Device => {
+                STAGE1_PAGE_DESCRIPTOR::SH::OuterShareable
+                    + STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(memory::mmu::arch_mmu::mair::DEVICE)
+            }
+        };
+
+        // Access Permissions.
+        desc += match attribute_fields.acc_perms {
+            AccessPermissions::ReadOnly => STAGE1_PAGE_DESCRIPTOR::AP::RO_EL1,
+            AccessPermissions::ReadWrite => STAGE1_PAGE_DESCRIPTOR::AP::RW_EL1,
+        };
+
+        // The execute-never attribute is mapped to PXN in AArch64.
+        desc += if attribute_fields.execute_never {
+            STAGE1_PAGE_DESCRIPTOR::PXN::True
+        } else {
+            STAGE1_PAGE_DESCRIPTOR::PXN::False
+        };
+
+        // Always set unprivileged exectue-never as long as userspace is not implemented yet.
+        desc += STAGE1_PAGE_DESCRIPTOR::UXN::True;
+
+        desc
+    }
+}
+
+/// Convert the HW-specific attributes of the MMU to kernel's generic memory attributes.
+impl convert::TryFrom<InMemoryRegister<u64, STAGE1_PAGE_DESCRIPTOR::Register>> for AttributeFields {
+    type Error = &'static str;
+
+    fn try_from(
+        desc: InMemoryRegister<u64, STAGE1_PAGE_DESCRIPTOR::Register>,
+    ) -> Result<AttributeFields, Self::Error> {
+        let mem_attributes = match desc.read(STAGE1_PAGE_DESCRIPTOR::AttrIndx) {
+            memory::mmu::arch_mmu::mair::NORMAL => MemAttributes::CacheableDRAM,
+            memory::mmu::arch_mmu::mair::DEVICE => MemAttributes::Device,
+            _ => return Err("Unexpected memory attribute"),
+        };
+
+        let acc_perms = match desc.read_as_enum(STAGE1_PAGE_DESCRIPTOR::AP) {
+            Some(STAGE1_PAGE_DESCRIPTOR::AP::Value::RO_EL1) => AccessPermissions::ReadOnly,
+            Some(STAGE1_PAGE_DESCRIPTOR::AP::Value::RW_EL1) => AccessPermissions::ReadWrite,
+            _ => return Err("Unexpected access permission"),
+        };
+
+        let execute_never = desc.read(STAGE1_PAGE_DESCRIPTOR::PXN) > 0;
+
+        Ok(AttributeFields {
+            mem_attributes,
+            acc_perms,
+            execute_never,
+        })
+    }
+}
+
+impl PageDescriptor {
+    /// Create an instance.
+    ///
+    /// Descriptor is invalid by default.
+    pub const fn new_zeroed() -> Self {
+        Self { value: 0 }
+    }
+
+    /// Create an instance.
+    pub fn from_output_page_addr(
+        phys_output_page_addr: PageAddress<Physical>,
+        attribute_fields: &AttributeFields,
+    ) -> Self {
+        let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
+
+        let shifted = phys_output_page_addr.into_inner().as_usize() >> Granule64KiB::SHIFT;
+        val.write(
+            STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted as u64)
+                + STAGE1_PAGE_DESCRIPTOR::AF::True
+                + STAGE1_PAGE_DESCRIPTOR::TYPE::Page
+                + STAGE1_PAGE_DESCRIPTOR::VALID::True
+                + (*attribute_fields).into(),
+        );
+
+        Self { value: val.get() }
+    }
+
+    /// Returns the valid bit.
+    fn is_valid(&self) -> bool {
+        InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(self.value)
+            .is_set(STAGE1_PAGE_DESCRIPTOR::VALID)
+    }
+
+    /// Returns the output page.
+    fn output_page_addr(&self) -> PageAddress<Physical> {
+        let shifted = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(self.value)
+            .read(STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB) as usize;
+
+        PageAddress::from(shifted << Granule64KiB::SHIFT)
+    }
+
+    /// Returns the attributes.
+    fn try_attributes(&self) -> Result<AttributeFields, &'static str> {
+        InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(self.value).try_into()
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl<const AS_SIZE: usize> memory::mmu::AssociatedTranslationTable
+    for memory::mmu::AddressSpace<AS_SIZE>
+where
+    [u8; Self::SIZE >> Granule512MiB::SHIFT]: Sized,
+{
+    type TableStartFromTop =
+        FixedSizeTranslationTable<{ Self::SIZE >> Granule512MiB::SHIFT }, true>;
+
+    type TableStartFromBottom =
+        FixedSizeTranslationTable<{ Self::SIZE >> Granule512MiB::SHIFT }, false>;
+}
+
+impl<const NUM_TABLES: usize, const START_FROM_TOP: bool>
+    FixedSizeTranslationTable<NUM_TABLES, START_FROM_TOP>
+{
+    const START_FROM_TOP_OFFSET: Address<Virtual> =
+        Address::new((usize::MAX - (Granule512MiB::SIZE * NUM_TABLES)) + 1);
+
+    /// Create an instance.
+    #[allow(clippy::assertions_on_constants)]
+    const fn _new(for_precompute: bool) -> Self {
+        assert!(bsp::memory::mmu::KernelGranule::SIZE == Granule64KiB::SIZE);
+
+        // Can't have a zero-sized address space.
+        assert!(NUM_TABLES > 0);
+
+        Self {
+            lvl3: [[PageDescriptor::new_zeroed(); 8192]; NUM_TABLES],
+            lvl2: [TableDescriptor::new_zeroed(); NUM_TABLES],
+            initialized: for_precompute,
+        }
+    }
+
+    pub const fn new_for_precompute() -> Self {
+        Self::_new(true)
+    }
+
+    #[cfg(test)]
+    pub fn new_for_runtime() -> Self {
+        Self::_new(false)
+    }
+
+    /// Helper to calculate the lvl2 and lvl3 indices from an address.
+    #[inline(always)]
+    fn lvl2_lvl3_index_from_page_addr(
+        &self,
+        virt_page_addr: PageAddress<Virtual>,
+    ) -> Result<(usize, usize), &'static str> {
+        let mut addr = virt_page_addr.into_inner();
+
+        if START_FROM_TOP {
+            addr = addr - Self::START_FROM_TOP_OFFSET;
+        }
+
+        let lvl2_index = addr.as_usize() >> Granule512MiB::SHIFT;
+        let lvl3_index = (addr.as_usize() & Granule512MiB::MASK) >> Granule64KiB::SHIFT;
+
+        if lvl2_index > (NUM_TABLES - 1) {
+            return Err("Virtual page is out of bounds of translation table");
+        }
+
+        Ok((lvl2_index, lvl3_index))
+    }
+
+    /// Returns the PageDescriptor corresponding to the supplied page address.
+    #[inline(always)]
+    fn page_descriptor_from_page_addr(
+        &self,
+        virt_page_addr: PageAddress<Virtual>,
+    ) -> Result<&PageDescriptor, &'static str> {
+        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page_addr(virt_page_addr)?;
+        let desc = &self.lvl3[lvl2_index][lvl3_index];
+
+        Ok(desc)
+    }
+
+    /// Sets the PageDescriptor corresponding to the supplied page address.
+    ///
+    /// Doesn't allow overriding an already valid page.
+    #[inline(always)]
+    fn set_page_descriptor_from_page_addr(
+        &mut self,
+        virt_page_addr: PageAddress<Virtual>,
+        new_desc: &PageDescriptor,
+    ) -> Result<(), &'static str> {
+        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page_addr(virt_page_addr)?;
+        let desc = &mut self.lvl3[lvl2_index][lvl3_index];
+
+        if desc.is_valid() {
+            return Err("Virtual page is already mapped");
+        }
+
+        *desc = *new_desc;
+        Ok(())
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+
+impl<const NUM_TABLES: usize, const START_FROM_TOP: bool>
+    memory::mmu::translation_table::interface::TranslationTable
+    for FixedSizeTranslationTable<NUM_TABLES, START_FROM_TOP>
+{
+    fn init(&mut self) -> Result<(), &'static str> {
+        if self.initialized {
+            return Ok(());
+        }
+
+        // Populate the l2 entries.
+        for (lvl2_nr, lvl2_entry) in self.lvl2.iter_mut().enumerate() {
+            let virt_table_addr = self.lvl3[lvl2_nr].virt_start_addr();
+            let phys_table_addr = memory::mmu::try_kernel_virt_addr_to_phys_addr(virt_table_addr)?;
+
+            let new_desc = TableDescriptor::from_next_lvl_table_addr(phys_table_addr);
+            *lvl2_entry = new_desc;
+        }
+
+        self.initialized = true;
+
+        Ok(())
+    }
+
+    unsafe fn map_at(
+        &mut self,
+        virt_region: &MemoryRegion<Virtual>,
+        phys_region: &MemoryRegion<Physical>,
+        attr: &AttributeFields,
+    ) -> Result<(), &'static str> {
+        assert!(self.initialized, "Translation tables not initialized");
+
+        if virt_region.size() != phys_region.size() {
+            return Err("Tried to map memory regions with unequal sizes");
+        }
+
+        if phys_region.end_exclusive_page_addr() > bsp::memory::phys_addr_space_end_exclusive_addr()
+        {
+            return Err("Tried to map outside of physical address space");
+        }
+
+        let iter = phys_region.into_iter().zip(virt_region.into_iter());
+        for (phys_page_addr, virt_page_addr) in iter {
+            let new_desc = PageDescriptor::from_output_page_addr(phys_page_addr, attr);
+            let virt_page = virt_page_addr;
+
+            self.set_page_descriptor_from_page_addr(virt_page, &new_desc)?;
+        }
+
+        Ok(())
+    }
+
+    fn try_virt_page_addr_to_phys_page_addr(
+        &self,
+        virt_page_addr: PageAddress<Virtual>,
+    ) -> Result<PageAddress<Physical>, &'static str> {
+        let page_desc = self.page_descriptor_from_page_addr(virt_page_addr)?;
+
+        if !page_desc.is_valid() {
+            return Err("Page marked invalid");
+        }
+
+        Ok(page_desc.output_page_addr())
+    }
+
+    fn try_page_attributes(
+        &self,
+        virt_page_addr: PageAddress<Virtual>,
+    ) -> Result<AttributeFields, &'static str> {
+        let page_desc = self.page_descriptor_from_page_addr(virt_page_addr)?;
+
+        if !page_desc.is_valid() {
+            return Err("Page marked invalid");
+        }
+
+        page_desc.try_attributes()
+    }
+
+    /// Try to translate a virtual address to a physical address.
+    ///
+    /// Will only succeed if there exists a valid mapping for the input address.
+    fn try_virt_addr_to_phys_addr(
+        &self,
+        virt_addr: Address<Virtual>,
+    ) -> Result<Address<Physical>, &'static str> {
+        let virt_page = PageAddress::from(virt_addr.align_down_page());
+        let phys_page = self.try_virt_page_addr_to_phys_page_addr(virt_page)?;
+
+        Ok(phys_page.into_inner() + virt_addr.offset_into_page())
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+pub type MinSizeTranslationTable = FixedSizeTranslationTable<1, true>;
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// Check if the size of `struct TableDescriptor` is as expected.
+    #[kernel_test]
+    fn size_of_tabledescriptor_equals_64_bit() {
+        assert_eq!(
+            core::mem::size_of::<TableDescriptor>(),
+            core::mem::size_of::<u64>()
+        );
+    }
+
+    /// Check if the size of `struct PageDescriptor` is as expected.
+    #[kernel_test]
+    fn size_of_pagedescriptor_equals_64_bit() {
+        assert_eq!(
+            core::mem::size_of::<PageDescriptor>(),
+            core::mem::size_of::<u64>()
+        );
+    }
+}
diff --git a/19_kernel_heap/kernel/src/_arch/aarch64/time.rs b/19_kernel_heap/kernel/src/_arch/aarch64/time.rs
new file mode 100644
index 000000000..c814219ca
--- /dev/null
+++ b/19_kernel_heap/kernel/src/_arch/aarch64/time.rs
@@ -0,0 +1,121 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural timer primitives.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::time::arch_time
+
+use crate::{time, warn};
+use core::time::Duration;
+use cortex_a::{asm::barrier, registers::*};
+use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+const NS_PER_S: u64 = 1_000_000_000;
+
+/// ARMv8 Generic Timer.
+struct GenericTimer;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static TIME_MANAGER: GenericTimer = GenericTimer;
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl GenericTimer {
+    #[inline(always)]
+    fn read_cntpct(&self) -> u64 {
+        // Prevent that the counter is read ahead of time due to out-of-order execution.
+        unsafe { barrier::isb(barrier::SY) };
+        CNTPCT_EL0.get()
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the time manager.
+pub fn time_manager() -> &'static impl time::interface::TimeManager {
+    &TIME_MANAGER
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+
+impl time::interface::TimeManager for GenericTimer {
+    fn resolution(&self) -> Duration {
+        Duration::from_nanos(NS_PER_S / (CNTFRQ_EL0.get() as u64))
+    }
+
+    fn uptime(&self) -> Duration {
+        let current_count: u64 = self.read_cntpct() * NS_PER_S;
+        let frq: u64 = CNTFRQ_EL0.get() as u64;
+
+        Duration::from_nanos(current_count / frq)
+    }
+
+    fn spin_for(&self, duration: Duration) {
+        // Instantly return on zero.
+        if duration.as_nanos() == 0 {
+            return;
+        }
+
+        // Calculate the register compare value.
+        let frq = CNTFRQ_EL0.get();
+        let x = match frq.checked_mul(duration.as_nanos() as u64) {
+            #[allow(unused_imports)]
+            None => {
+                warn!("Spin duration too long, skipping");
+                return;
+            }
+            Some(val) => val,
+        };
+        let tval = x / NS_PER_S;
+
+        // Check if it is within supported bounds.
+        let warn: Option<&str> = if tval == 0 {
+            Some("smaller")
+        // The upper 32 bits of CNTP_TVAL_EL0 are reserved.
+        } else if tval > u32::max_value().into() {
+            Some("bigger")
+        } else {
+            None
+        };
+
+        #[allow(unused_imports)]
+        if let Some(w) = warn {
+            warn!(
+                "Spin duration {} than architecturally supported, skipping",
+                w
+            );
+            return;
+        }
+
+        // Set the compare value register.
+        CNTP_TVAL_EL0.set(tval);
+
+        // Kick off the counting.                       // Disable timer interrupt.
+        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::SET + CNTP_CTL_EL0::IMASK::SET);
+
+        // ISTATUS will be '1' when cval ticks have passed. Busy-check it.
+        while !CNTP_CTL_EL0.matches_all(CNTP_CTL_EL0::ISTATUS::SET) {}
+
+        // Disable counting again.
+        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::CLEAR);
+    }
+}
diff --git a/19_kernel_heap/kernel/src/backtrace.rs b/19_kernel_heap/kernel/src/backtrace.rs
new file mode 100644
index 000000000..22de6c48e
--- /dev/null
+++ b/19_kernel_heap/kernel/src/backtrace.rs
@@ -0,0 +1,114 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Backtracing support.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "_arch/aarch64/backtrace.rs"]
+mod arch_backtrace;
+
+use crate::{
+    memory::{Address, Virtual},
+    symbols,
+};
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+#[cfg(feature = "test_build")]
+pub use arch_backtrace::{corrupt_link, corrupt_previous_frame_addr};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// A backtrace item.
+#[allow(missing_docs)]
+pub enum BacktraceItem {
+    InvalidFramePointer(Address<Virtual>),
+    InvalidLink(Address<Virtual>),
+    Link(Address<Virtual>),
+}
+
+/// Pseudo-struct for printing a backtrace using its fmt::Display implementation.
+pub struct Backtrace;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl fmt::Display for Backtrace {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        writeln!(f, "Backtrace:")?;
+        writeln!(
+            f,
+            "      ----------------------------------------------------------------------------------------------"
+        )?;
+        writeln!(
+            f,
+            "          Address            Function containing address"
+        )?;
+        writeln!(
+            f,
+            "      ----------------------------------------------------------------------------------------------"
+        )?;
+
+        let mut fmt_res: fmt::Result = Ok(());
+        let trace_formatter =
+            |maybe_iter: Option<&mut dyn Iterator<Item = BacktraceItem>>| match maybe_iter {
+                None => fmt_res = writeln!(f, "ERROR! No valid stack frame found"),
+                Some(iter) => {
+                    // Since the backtrace is printed, the first function is always
+                    // core::fmt::write. Skip 1 so it is excluded and doesn't bloat the output.
+                    for (i, backtrace_res) in iter.skip(1).enumerate() {
+                        match backtrace_res {
+                            BacktraceItem::InvalidFramePointer(addr) => {
+                                fmt_res = writeln!(
+                                    f,
+                                    "      {:>2}. ERROR! \
+                                    Encountered invalid frame pointer ({}) during backtrace",
+                                    i + 1,
+                                    addr
+                                );
+                            }
+                            BacktraceItem::InvalidLink(addr) => {
+                                fmt_res = writeln!(
+                                    f,
+                                    "      {:>2}. ERROR! \
+                                    Link address ({}) is not contained in kernel .text section",
+                                    i + 1,
+                                    addr
+                                );
+                            }
+                            BacktraceItem::Link(addr) => {
+                                fmt_res = writeln!(
+                                    f,
+                                    "      {:>2}. {:016x} | {:<50}",
+                                    i + 1,
+                                    addr.as_usize(),
+                                    match symbols::lookup_symbol(addr) {
+                                        Some(sym) => sym.name(),
+                                        _ => "Symbol not found",
+                                    }
+                                )
+                            }
+                        };
+
+                        if fmt_res.is_err() {
+                            break;
+                        }
+                    }
+                }
+            };
+
+        arch_backtrace::backtrace(trace_formatter);
+        fmt_res?;
+
+        writeln!(
+            f,
+            "      ----------------------------------------------------------------------------------------------"
+        )
+    }
+}
diff --git a/19_kernel_heap/kernel/src/bsp.rs b/19_kernel_heap/kernel/src/bsp.rs
new file mode 100644
index 000000000..824787f65
--- /dev/null
+++ b/19_kernel_heap/kernel/src/bsp.rs
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Conditional reexporting of Board Support Packages.
+
+mod device_driver;
+
+#[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
+mod raspberrypi;
+
+#[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
+pub use raspberrypi::*;
diff --git a/19_kernel_heap/kernel/src/bsp/device_driver.rs b/19_kernel_heap/kernel/src/bsp/device_driver.rs
new file mode 100644
index 000000000..eafaf7754
--- /dev/null
+++ b/19_kernel_heap/kernel/src/bsp/device_driver.rs
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Device driver.
+
+#[cfg(feature = "bsp_rpi4")]
+mod arm;
+#[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
+mod bcm;
+mod common;
+
+#[cfg(feature = "bsp_rpi4")]
+pub use arm::*;
+#[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
+pub use bcm::*;
diff --git a/19_kernel_heap/kernel/src/bsp/device_driver/arm.rs b/19_kernel_heap/kernel/src/bsp/device_driver/arm.rs
new file mode 100644
index 000000000..e83e24c92
--- /dev/null
+++ b/19_kernel_heap/kernel/src/bsp/device_driver/arm.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! ARM driver top level.
+
+pub mod gicv2;
+
+pub use gicv2::*;
diff --git a/19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2.rs b/19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2.rs
new file mode 100644
index 000000000..cb7c69ee2
--- /dev/null
+++ b/19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2.rs
@@ -0,0 +1,242 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! GICv2 Driver - ARM Generic Interrupt Controller v2.
+//!
+//! The following is a collection of excerpts with useful information from
+//!   - `Programmer's Guide for ARMv8-A`
+//!   - `ARM Generic Interrupt Controller Architecture Specification`
+//!
+//! # Programmer's Guide - 10.6.1 Configuration
+//!
+//! The GIC is accessed as a memory-mapped peripheral.
+//!
+//! All cores can access the common Distributor, but the CPU interface is banked, that is, each core
+//! uses the same address to access its own private CPU interface.
+//!
+//! It is not possible for a core to access the CPU interface of another core.
+//!
+//! # Architecture Specification - 10.6.2 Initialization
+//!
+//! Both the Distributor and the CPU interfaces are disabled at reset. The GIC must be initialized
+//! after reset before it can deliver interrupts to the core.
+//!
+//! In the Distributor, software must configure the priority, target, security and enable individual
+//! interrupts. The Distributor must subsequently be enabled through its control register
+//! (GICD_CTLR). For each CPU interface, software must program the priority mask and preemption
+//! settings.
+//!
+//! Each CPU interface block itself must be enabled through its control register (GICD_CTLR). This
+//! prepares the GIC to deliver interrupts to the core.
+//!
+//! Before interrupts are expected in the core, software prepares the core to take interrupts by
+//! setting a valid interrupt vector in the vector table, and clearing interrupt mask bits in
+//! PSTATE, and setting the routing controls.
+//!
+//! The entire interrupt mechanism in the system can be disabled by disabling the Distributor.
+//! Interrupt delivery to an individual core can be disabled by disabling its CPU interface.
+//! Individual interrupts can also be disabled (or enabled) in the distributor.
+//!
+//! For an interrupt to reach the core, the individual interrupt, Distributor and CPU interface must
+//! all be enabled. The interrupt also needs to be of sufficient priority, that is, higher than the
+//! core's priority mask.
+//!
+//! # Architecture Specification - 1.4.2 Interrupt types
+//!
+//! - Peripheral interrupt
+//!     - Private Peripheral Interrupt (PPI)
+//!         - This is a peripheral interrupt that is specific to a single processor.
+//!     - Shared Peripheral Interrupt (SPI)
+//!         - This is a peripheral interrupt that the Distributor can route to any of a specified
+//!           combination of processors.
+//!
+//! - Software-generated interrupt (SGI)
+//!     - This is an interrupt generated by software writing to a GICD_SGIR register in the GIC. The
+//!       system uses SGIs for interprocessor communication.
+//!     - An SGI has edge-triggered properties. The software triggering of the interrupt is
+//!       equivalent to the edge transition of the interrupt request signal.
+//!     - When an SGI occurs in a multiprocessor implementation, the CPUID field in the Interrupt
+//!       Acknowledge Register, GICC_IAR, or the Aliased Interrupt Acknowledge Register, GICC_AIAR,
+//!       identifies the processor that requested the interrupt.
+//!
+//! # Architecture Specification - 2.2.1 Interrupt IDs
+//!
+//! Interrupts from sources are identified using ID numbers. Each CPU interface can see up to 1020
+//! interrupts. The banking of SPIs and PPIs increases the total number of interrupts supported by
+//! the Distributor.
+//!
+//! The GIC assigns interrupt ID numbers ID0-ID1019 as follows:
+//!   - Interrupt numbers 32..1019 are used for SPIs.
+//!   - Interrupt numbers 0..31 are used for interrupts that are private to a CPU interface. These
+//!     interrupts are banked in the Distributor.
+//!       - A banked interrupt is one where the Distributor can have multiple interrupts with the
+//!         same ID. A banked interrupt is identified uniquely by its ID number and its associated
+//!         CPU interface number. Of the banked interrupt IDs:
+//!           - 00..15 SGIs
+//!           - 16..31 PPIs
+
+mod gicc;
+mod gicd;
+
+use crate::{
+    bsp, cpu, driver, exception,
+    memory::{Address, Virtual},
+    synchronization,
+    synchronization::InitStateLock,
+};
+use alloc::vec::Vec;
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+type HandlerTable = Vec<Option<exception::asynchronous::IRQDescriptor>>;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Used for the associated type of trait [`exception::asynchronous::interface::IRQManager`].
+pub type IRQNumber = exception::asynchronous::IRQNumber<{ GICv2::MAX_IRQ_NUMBER }>;
+
+/// Representation of the GIC.
+pub struct GICv2 {
+    /// The Distributor.
+    gicd: gicd::GICD,
+
+    /// The CPU Interface.
+    gicc: gicc::GICC,
+
+    /// Stores registered IRQ handlers. Writable only during kernel init. RO afterwards.
+    handler_table: InitStateLock<HandlerTable>,
+
+    /// Callback to be invoked after successful init.
+    post_init_callback: fn(),
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl GICv2 {
+    const MAX_IRQ_NUMBER: usize = 1019;
+
+    pub const COMPATIBLE: &'static str = "GICv2 (ARM Generic Interrupt Controller v2)";
+
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(
+        gicd_mmio_start_addr: Address<Virtual>,
+        gicc_mmio_start_addr: Address<Virtual>,
+        post_init_callback: fn(),
+    ) -> Self {
+        Self {
+            gicd: gicd::GICD::new(gicd_mmio_start_addr),
+            gicc: gicc::GICC::new(gicc_mmio_start_addr),
+            handler_table: InitStateLock::new(Vec::new()),
+            post_init_callback,
+        }
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use synchronization::interface::ReadWriteEx;
+
+impl driver::interface::DeviceDriver for GICv2 {
+    fn compatible(&self) -> &'static str {
+        Self::COMPATIBLE
+    }
+
+    unsafe fn init(&self) -> Result<(), &'static str> {
+        if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
+            self.gicd.boot_core_init();
+        }
+
+        self.gicc.priority_accept_all();
+        self.gicc.enable();
+
+        (self.post_init_callback)();
+
+        Ok(())
+    }
+}
+
+impl exception::asynchronous::interface::IRQManager for GICv2 {
+    type IRQNumberType = IRQNumber;
+
+    fn register_handler(
+        &self,
+        irq_number: Self::IRQNumberType,
+        descriptor: exception::asynchronous::IRQDescriptor,
+    ) -> Result<(), &'static str> {
+        self.handler_table.write(|table| {
+            let irq_number = irq_number.get();
+
+            if table.len() < irq_number {
+                // IRQDescriptor has an integrated range sanity check on construction, so this
+                // vector can't grow arbitrarily big.
+                table.resize(irq_number + 1, None);
+            }
+
+            if table[irq_number].is_some() {
+                return Err("IRQ handler already registered");
+            }
+
+            table[irq_number] = Some(descriptor);
+
+            Ok(())
+        })
+    }
+
+    fn enable(&self, irq_number: Self::IRQNumberType) {
+        self.gicd.enable(irq_number);
+    }
+
+    fn handle_pending_irqs<'irq_context>(
+        &'irq_context self,
+        ic: &exception::asynchronous::IRQContext<'irq_context>,
+    ) {
+        // Extract the highest priority pending IRQ number from the Interrupt Acknowledge Register
+        // (IAR).
+        let irq_number = self.gicc.pending_irq_number(ic);
+
+        // Guard against spurious interrupts.
+        if irq_number > GICv2::MAX_IRQ_NUMBER {
+            return;
+        }
+
+        // Call the IRQ handler. Panic if there is none.
+        self.handler_table.read(|table| {
+            match table[irq_number] {
+                None => panic!("No handler registered for IRQ {}", irq_number),
+                Some(descriptor) => {
+                    // Call the IRQ handler. Panics on failure.
+                    descriptor.handler.handle().expect("Error handling IRQ");
+                }
+            }
+        });
+
+        // Signal completion of handling.
+        self.gicc.mark_comleted(irq_number as u32, ic);
+    }
+
+    fn print_handler(&self) {
+        use crate::info;
+
+        info!("      Peripheral handler:");
+
+        self.handler_table.read(|table| {
+            for (i, opt) in table.iter().skip(32).enumerate() {
+                if let Some(handler) = opt {
+                    info!("            {: >3}. {}", i + 32, handler.name);
+                }
+            }
+        });
+    }
+}
diff --git a/19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs b/19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
new file mode 100644
index 000000000..1a02fc650
--- /dev/null
+++ b/19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
@@ -0,0 +1,145 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! GICC Driver - GIC CPU interface.
+
+use crate::{
+    bsp::device_driver::common::MMIODerefWrapper,
+    exception,
+    memory::{Address, Virtual},
+};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields, register_structs,
+    registers::ReadWrite,
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+register_bitfields! {
+    u32,
+
+    /// CPU Interface Control Register
+    CTLR [
+        Enable OFFSET(0) NUMBITS(1) []
+    ],
+
+    /// Interrupt Priority Mask Register
+    PMR [
+        Priority OFFSET(0) NUMBITS(8) []
+    ],
+
+    /// Interrupt Acknowledge Register
+    IAR [
+        InterruptID OFFSET(0) NUMBITS(10) []
+    ],
+
+    /// End of Interrupt Register
+    EOIR [
+        EOIINTID OFFSET(0) NUMBITS(10) []
+    ]
+}
+
+register_structs! {
+    #[allow(non_snake_case)]
+    pub RegisterBlock {
+        (0x000 => CTLR: ReadWrite<u32, CTLR::Register>),
+        (0x004 => PMR: ReadWrite<u32, PMR::Register>),
+        (0x008 => _reserved1),
+        (0x00C => IAR: ReadWrite<u32, IAR::Register>),
+        (0x010 => EOIR: ReadWrite<u32, EOIR::Register>),
+        (0x014  => @END),
+    }
+}
+
+/// Abstraction for the associated MMIO registers.
+type Registers = MMIODerefWrapper<RegisterBlock>;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Representation of the GIC CPU interface.
+pub struct GICC {
+    registers: Registers,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl GICC {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
+        Self {
+            registers: Registers::new(mmio_start_addr),
+        }
+    }
+
+    /// Accept interrupts of any priority.
+    ///
+    /// Quoting the GICv2 Architecture Specification:
+    ///
+    ///   "Writing 255 to the GICC_PMR always sets it to the largest supported priority field
+    ///    value."
+    ///
+    /// # Safety
+    ///
+    /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
+    ///   of `&mut self`.
+    pub fn priority_accept_all(&self) {
+        self.registers.PMR.write(PMR::Priority.val(255)); // Comment in arch spec.
+    }
+
+    /// Enable the interface - start accepting IRQs.
+    ///
+    /// # Safety
+    ///
+    /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
+    ///   of `&mut self`.
+    pub fn enable(&self) {
+        self.registers.CTLR.write(CTLR::Enable::SET);
+    }
+
+    /// Extract the number of the highest-priority pending IRQ.
+    ///
+    /// Can only be called from IRQ context, which is ensured by taking an `IRQContext` token.
+    ///
+    /// # Safety
+    ///
+    /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
+    ///   of `&mut self`.
+    #[allow(clippy::trivially_copy_pass_by_ref)]
+    pub fn pending_irq_number<'irq_context>(
+        &self,
+        _ic: &exception::asynchronous::IRQContext<'irq_context>,
+    ) -> usize {
+        self.registers.IAR.read(IAR::InterruptID) as usize
+    }
+
+    /// Complete handling of the currently active IRQ.
+    ///
+    /// Can only be called from IRQ context, which is ensured by taking an `IRQContext` token.
+    ///
+    /// To be called after `pending_irq_number()`.
+    ///
+    /// # Safety
+    ///
+    /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
+    ///   of `&mut self`.
+    #[allow(clippy::trivially_copy_pass_by_ref)]
+    pub fn mark_comleted<'irq_context>(
+        &self,
+        irq_number: u32,
+        _ic: &exception::asynchronous::IRQContext<'irq_context>,
+    ) {
+        self.registers.EOIR.write(EOIR::EOIINTID.val(irq_number));
+    }
+}
diff --git a/19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs b/19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
new file mode 100644
index 000000000..d9f63d1bb
--- /dev/null
+++ b/19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -0,0 +1,201 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! GICD Driver - GIC Distributor.
+//!
+//! # Glossary
+//!   - SPI - Shared Peripheral Interrupt.
+
+use crate::{
+    bsp::device_driver::common::MMIODerefWrapper,
+    memory::{Address, Virtual},
+    state, synchronization,
+    synchronization::IRQSafeNullLock,
+};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields, register_structs,
+    registers::{ReadOnly, ReadWrite},
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+register_bitfields! {
+    u32,
+
+    /// Distributor Control Register
+    CTLR [
+        Enable OFFSET(0) NUMBITS(1) []
+    ],
+
+    /// Interrupt Controller Type Register
+    TYPER [
+        ITLinesNumber OFFSET(0)  NUMBITS(5) []
+    ],
+
+    /// Interrupt Processor Targets Registers
+    ITARGETSR [
+        Offset3 OFFSET(24) NUMBITS(8) [],
+        Offset2 OFFSET(16) NUMBITS(8) [],
+        Offset1 OFFSET(8)  NUMBITS(8) [],
+        Offset0 OFFSET(0)  NUMBITS(8) []
+    ]
+}
+
+register_structs! {
+    #[allow(non_snake_case)]
+    SharedRegisterBlock {
+        (0x000 => CTLR: ReadWrite<u32, CTLR::Register>),
+        (0x004 => TYPER: ReadOnly<u32, TYPER::Register>),
+        (0x008 => _reserved1),
+        (0x104 => ISENABLER: [ReadWrite<u32>; 31]),
+        (0x108 => _reserved2),
+        (0x820 => ITARGETSR: [ReadWrite<u32, ITARGETSR::Register>; 248]),
+        (0x824 => @END),
+    }
+}
+
+register_structs! {
+    #[allow(non_snake_case)]
+    BankedRegisterBlock {
+        (0x000 => _reserved1),
+        (0x100 => ISENABLER: ReadWrite<u32>),
+        (0x104 => _reserved2),
+        (0x800 => ITARGETSR: [ReadOnly<u32, ITARGETSR::Register>; 8]),
+        (0x804 => @END),
+    }
+}
+
+/// Abstraction for the non-banked parts of the associated MMIO registers.
+type SharedRegisters = MMIODerefWrapper<SharedRegisterBlock>;
+
+/// Abstraction for the banked parts of the associated MMIO registers.
+type BankedRegisters = MMIODerefWrapper<BankedRegisterBlock>;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Representation of the GIC Distributor.
+pub struct GICD {
+    /// Access to shared registers is guarded with a lock.
+    shared_registers: IRQSafeNullLock<SharedRegisters>,
+
+    /// Access to banked registers is unguarded.
+    banked_registers: BankedRegisters,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl SharedRegisters {
+    /// Return the number of IRQs that this HW implements.
+    #[inline(always)]
+    fn num_irqs(&mut self) -> usize {
+        // Query number of implemented IRQs.
+        //
+        // Refer to GICv2 Architecture Specification, Section 4.3.2.
+        ((self.TYPER.read(TYPER::ITLinesNumber) as usize) + 1) * 32
+    }
+
+    /// Return a slice of the implemented ITARGETSR.
+    #[inline(always)]
+    fn implemented_itargets_slice(&mut self) -> &[ReadWrite<u32, ITARGETSR::Register>] {
+        assert!(self.num_irqs() >= 36);
+
+        // Calculate the max index of the shared ITARGETSR array.
+        //
+        // The first 32 IRQs are private, so not included in `shared_registers`. Each ITARGETS
+        // register has four entries, so shift right by two. Subtract one because we start
+        // counting at zero.
+        let spi_itargetsr_max_index = ((self.num_irqs() - 32) >> 2) - 1;
+
+        // Rust automatically inserts slice range sanity check, i.e. max >= min.
+        &self.ITARGETSR[0..spi_itargetsr_max_index]
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+use synchronization::interface::Mutex;
+
+impl GICD {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
+        Self {
+            shared_registers: IRQSafeNullLock::new(SharedRegisters::new(mmio_start_addr)),
+            banked_registers: BankedRegisters::new(mmio_start_addr),
+        }
+    }
+
+    /// Use a banked ITARGETSR to retrieve the executing core's GIC target mask.
+    ///
+    /// Quoting the GICv2 Architecture Specification:
+    ///
+    ///   "GICD_ITARGETSR0 to GICD_ITARGETSR7 are read-only, and each field returns a value that
+    ///    corresponds only to the processor reading the register."
+    fn local_gic_target_mask(&self) -> u32 {
+        self.banked_registers.ITARGETSR[0].read(ITARGETSR::Offset0)
+    }
+
+    /// Route all SPIs to the boot core and enable the distributor.
+    pub fn boot_core_init(&self) {
+        assert!(
+            state::state_manager().is_init(),
+            "Only allowed during kernel init phase"
+        );
+
+        // Target all SPIs to the boot core only.
+        let mask = self.local_gic_target_mask();
+
+        self.shared_registers.lock(|regs| {
+            for i in regs.implemented_itargets_slice().iter() {
+                i.write(
+                    ITARGETSR::Offset3.val(mask)
+                        + ITARGETSR::Offset2.val(mask)
+                        + ITARGETSR::Offset1.val(mask)
+                        + ITARGETSR::Offset0.val(mask),
+                );
+            }
+
+            regs.CTLR.write(CTLR::Enable::SET);
+        });
+    }
+
+    /// Enable an interrupt.
+    pub fn enable(&self, irq_num: super::IRQNumber) {
+        let irq_num = irq_num.get();
+
+        // Each bit in the u32 enable register corresponds to one IRQ number. Shift right by 5
+        // (division by 32) and arrive at the index for the respective ISENABLER[i].
+        let enable_reg_index = irq_num >> 5;
+        let enable_bit: u32 = 1u32 << (irq_num % 32);
+
+        // Check if we are handling a private or shared IRQ.
+        match irq_num {
+            // Private.
+            0..=31 => {
+                let enable_reg = &self.banked_registers.ISENABLER;
+                enable_reg.set(enable_reg.get() | enable_bit);
+            }
+            // Shared.
+            _ => {
+                let enable_reg_index_shared = enable_reg_index - 1;
+
+                self.shared_registers.lock(|regs| {
+                    let enable_reg = &regs.ISENABLER[enable_reg_index_shared];
+                    enable_reg.set(enable_reg.get() | enable_bit);
+                });
+            }
+        }
+    }
+}
diff --git a/19_kernel_heap/kernel/src/bsp/device_driver/bcm.rs b/19_kernel_heap/kernel/src/bsp/device_driver/bcm.rs
new file mode 100644
index 000000000..5a7cc23be
--- /dev/null
+++ b/19_kernel_heap/kernel/src/bsp/device_driver/bcm.rs
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! BCM driver top level.
+
+mod bcm2xxx_gpio;
+#[cfg(feature = "bsp_rpi3")]
+mod bcm2xxx_interrupt_controller;
+mod bcm2xxx_pl011_uart;
+
+pub use bcm2xxx_gpio::*;
+#[cfg(feature = "bsp_rpi3")]
+pub use bcm2xxx_interrupt_controller::*;
+pub use bcm2xxx_pl011_uart::*;
diff --git a/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
new file mode 100644
index 000000000..a3361c2cc
--- /dev/null
+++ b/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -0,0 +1,233 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! GPIO Driver.
+
+use crate::{
+    bsp::device_driver::common::MMIODerefWrapper,
+    driver,
+    memory::{Address, Virtual},
+    synchronization,
+    synchronization::IRQSafeNullLock,
+};
+use tock_registers::{
+    interfaces::{ReadWriteable, Writeable},
+    register_bitfields, register_structs,
+    registers::ReadWrite,
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+// GPIO registers.
+//
+// Descriptions taken from
+// - https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
+// - https://datasheets.raspberrypi.org/bcm2711/bcm2711-peripherals.pdf
+register_bitfields! {
+    u32,
+
+    /// GPIO Function Select 1
+    GPFSEL1 [
+        /// Pin 15
+        FSEL15 OFFSET(15) NUMBITS(3) [
+            Input = 0b000,
+            Output = 0b001,
+            AltFunc0 = 0b100  // PL011 UART RX
+
+        ],
+
+        /// Pin 14
+        FSEL14 OFFSET(12) NUMBITS(3) [
+            Input = 0b000,
+            Output = 0b001,
+            AltFunc0 = 0b100  // PL011 UART TX
+        ]
+    ],
+
+    /// GPIO Pull-up/down Register
+    ///
+    /// BCM2837 only.
+    GPPUD [
+        /// Controls the actuation of the internal pull-up/down control line to ALL the GPIO pins.
+        PUD OFFSET(0) NUMBITS(2) [
+            Off = 0b00,
+            PullDown = 0b01,
+            PullUp = 0b10
+        ]
+    ],
+
+    /// GPIO Pull-up/down Clock Register 0
+    ///
+    /// BCM2837 only.
+    GPPUDCLK0 [
+        /// Pin 15
+        PUDCLK15 OFFSET(15) NUMBITS(1) [
+            NoEffect = 0,
+            AssertClock = 1
+        ],
+
+        /// Pin 14
+        PUDCLK14 OFFSET(14) NUMBITS(1) [
+            NoEffect = 0,
+            AssertClock = 1
+        ]
+    ],
+
+    /// GPIO Pull-up / Pull-down Register 0
+    ///
+    /// BCM2711 only.
+    GPIO_PUP_PDN_CNTRL_REG0 [
+        /// Pin 15
+        GPIO_PUP_PDN_CNTRL15 OFFSET(30) NUMBITS(2) [
+            NoResistor = 0b00,
+            PullUp = 0b01
+        ],
+
+        /// Pin 14
+        GPIO_PUP_PDN_CNTRL14 OFFSET(28) NUMBITS(2) [
+            NoResistor = 0b00,
+            PullUp = 0b01
+        ]
+    ]
+}
+
+register_structs! {
+    #[allow(non_snake_case)]
+    RegisterBlock {
+        (0x00 => _reserved1),
+        (0x04 => GPFSEL1: ReadWrite<u32, GPFSEL1::Register>),
+        (0x08 => _reserved2),
+        (0x94 => GPPUD: ReadWrite<u32, GPPUD::Register>),
+        (0x98 => GPPUDCLK0: ReadWrite<u32, GPPUDCLK0::Register>),
+        (0x9C => _reserved3),
+        (0xE4 => GPIO_PUP_PDN_CNTRL_REG0: ReadWrite<u32, GPIO_PUP_PDN_CNTRL_REG0::Register>),
+        (0xE8 => @END),
+    }
+}
+
+/// Abstraction for the associated MMIO registers.
+type Registers = MMIODerefWrapper<RegisterBlock>;
+
+struct GPIOInner {
+    registers: Registers,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Representation of the GPIO HW.
+pub struct GPIO {
+    inner: IRQSafeNullLock<GPIOInner>,
+    post_init_callback: fn(),
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl GPIOInner {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
+        Self {
+            registers: Registers::new(mmio_start_addr),
+        }
+    }
+
+    /// Disable pull-up/down on pins 14 and 15.
+    #[cfg(feature = "bsp_rpi3")]
+    fn disable_pud_14_15_bcm2837(&mut self) {
+        use crate::{time, time::interface::TimeManager};
+        use core::time::Duration;
+
+        // The Linux 2837 GPIO driver waits 1 µs between the steps.
+        const DELAY: Duration = Duration::from_micros(1);
+
+        self.registers.GPPUD.write(GPPUD::PUD::Off);
+        time::time_manager().spin_for(DELAY);
+
+        self.registers
+            .GPPUDCLK0
+            .write(GPPUDCLK0::PUDCLK15::AssertClock + GPPUDCLK0::PUDCLK14::AssertClock);
+        time::time_manager().spin_for(DELAY);
+
+        self.registers.GPPUD.write(GPPUD::PUD::Off);
+        self.registers.GPPUDCLK0.set(0);
+    }
+
+    /// Disable pull-up/down on pins 14 and 15.
+    #[cfg(feature = "bsp_rpi4")]
+    fn disable_pud_14_15_bcm2711(&mut self) {
+        self.registers.GPIO_PUP_PDN_CNTRL_REG0.write(
+            GPIO_PUP_PDN_CNTRL_REG0::GPIO_PUP_PDN_CNTRL15::PullUp
+                + GPIO_PUP_PDN_CNTRL_REG0::GPIO_PUP_PDN_CNTRL14::PullUp,
+        );
+    }
+
+    /// Map PL011 UART as standard output.
+    ///
+    /// TX to pin 14
+    /// RX to pin 15
+    pub fn map_pl011_uart(&mut self) {
+        // Select the UART on pins 14 and 15.
+        self.registers
+            .GPFSEL1
+            .modify(GPFSEL1::FSEL15::AltFunc0 + GPFSEL1::FSEL14::AltFunc0);
+
+        // Disable pull-up/down on pins 14 and 15.
+        #[cfg(feature = "bsp_rpi3")]
+        self.disable_pud_14_15_bcm2837();
+
+        #[cfg(feature = "bsp_rpi4")]
+        self.disable_pud_14_15_bcm2711();
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl GPIO {
+    pub const COMPATIBLE: &'static str = "BCM GPIO";
+
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>, post_init_callback: fn()) -> Self {
+        Self {
+            inner: IRQSafeNullLock::new(GPIOInner::new(mmio_start_addr)),
+            post_init_callback,
+        }
+    }
+
+    /// Concurrency safe version of `GPIOInner.map_pl011_uart()`
+    pub fn map_pl011_uart(&self) {
+        self.inner.lock(|inner| inner.map_pl011_uart())
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use synchronization::interface::Mutex;
+
+impl driver::interface::DeviceDriver for GPIO {
+    fn compatible(&self) -> &'static str {
+        Self::COMPATIBLE
+    }
+
+    unsafe fn init(&self) -> Result<(), &'static str> {
+        (self.post_init_callback)();
+
+        Ok(())
+    }
+}
diff --git a/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
new file mode 100644
index 000000000..a93b0bc9e
--- /dev/null
+++ b/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -0,0 +1,147 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Interrupt Controller Driver.
+
+mod peripheral_ic;
+
+use crate::{
+    driver, exception,
+    memory::{Address, Virtual},
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Wrapper struct for a bitmask indicating pending IRQ numbers.
+struct PendingIRQs {
+    bitmask: u64,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub type LocalIRQ =
+    exception::asynchronous::IRQNumber<{ InterruptController::MAX_LOCAL_IRQ_NUMBER }>;
+pub type PeripheralIRQ =
+    exception::asynchronous::IRQNumber<{ InterruptController::MAX_PERIPHERAL_IRQ_NUMBER }>;
+
+/// Used for the associated type of trait [`exception::asynchronous::interface::IRQManager`].
+#[derive(Copy, Clone)]
+#[allow(missing_docs)]
+pub enum IRQNumber {
+    Local(LocalIRQ),
+    Peripheral(PeripheralIRQ),
+}
+
+/// Representation of the Interrupt Controller.
+pub struct InterruptController {
+    periph: peripheral_ic::PeripheralIC,
+    post_init_callback: fn(),
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl PendingIRQs {
+    pub fn new(bitmask: u64) -> Self {
+        Self { bitmask }
+    }
+}
+
+impl Iterator for PendingIRQs {
+    type Item = usize;
+
+    fn next(&mut self) -> Option<Self::Item> {
+        use core::intrinsics::cttz;
+
+        let next = cttz(self.bitmask);
+        if next == 64 {
+            return None;
+        }
+
+        self.bitmask &= !(1 << next);
+
+        Some(next as usize)
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl InterruptController {
+    const MAX_LOCAL_IRQ_NUMBER: usize = 11;
+    const MAX_PERIPHERAL_IRQ_NUMBER: usize = 63;
+
+    pub const COMPATIBLE: &'static str = "BCM Interrupt Controller";
+
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(
+        periph_mmio_start_addr: Address<Virtual>,
+        post_init_callback: fn(),
+    ) -> Self {
+        Self {
+            periph: peripheral_ic::PeripheralIC::new(periph_mmio_start_addr),
+            post_init_callback,
+        }
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+
+impl driver::interface::DeviceDriver for InterruptController {
+    fn compatible(&self) -> &'static str {
+        Self::COMPATIBLE
+    }
+
+    unsafe fn init(&self) -> Result<(), &'static str> {
+        (self.post_init_callback)();
+
+        Ok(())
+    }
+}
+
+impl exception::asynchronous::interface::IRQManager for InterruptController {
+    type IRQNumberType = IRQNumber;
+
+    fn register_handler(
+        &self,
+        irq: Self::IRQNumberType,
+        descriptor: exception::asynchronous::IRQDescriptor,
+    ) -> Result<(), &'static str> {
+        match irq {
+            IRQNumber::Local(_) => unimplemented!("Local IRQ controller not implemented."),
+            IRQNumber::Peripheral(pirq) => self.periph.register_handler(pirq, descriptor),
+        }
+    }
+
+    fn enable(&self, irq: Self::IRQNumberType) {
+        match irq {
+            IRQNumber::Local(_) => unimplemented!("Local IRQ controller not implemented."),
+            IRQNumber::Peripheral(pirq) => self.periph.enable(pirq),
+        }
+    }
+
+    fn handle_pending_irqs<'irq_context>(
+        &'irq_context self,
+        ic: &exception::asynchronous::IRQContext<'irq_context>,
+    ) {
+        // It can only be a peripheral IRQ pending because enable() does not support local IRQs yet.
+        self.periph.handle_pending_irqs(ic)
+    }
+
+    fn print_handler(&self) {
+        self.periph.print_handler();
+    }
+}
diff --git a/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
new file mode 100644
index 000000000..a2034e3ba
--- /dev/null
+++ b/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -0,0 +1,175 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Peripheral Interrupt Controller Driver.
+
+use super::{PendingIRQs, PeripheralIRQ};
+use crate::{
+    bsp::device_driver::common::MMIODerefWrapper,
+    exception,
+    memory::{Address, Virtual},
+    synchronization,
+    synchronization::{IRQSafeNullLock, InitStateLock},
+};
+use alloc::vec::Vec;
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_structs,
+    registers::{ReadOnly, WriteOnly},
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+register_structs! {
+    #[allow(non_snake_case)]
+    WORegisterBlock {
+        (0x00 => _reserved1),
+        (0x10 => ENABLE_1: WriteOnly<u32>),
+        (0x14 => ENABLE_2: WriteOnly<u32>),
+        (0x24 => @END),
+    }
+}
+
+register_structs! {
+    #[allow(non_snake_case)]
+    RORegisterBlock {
+        (0x00 => _reserved1),
+        (0x04 => PENDING_1: ReadOnly<u32>),
+        (0x08 => PENDING_2: ReadOnly<u32>),
+        (0x0c => @END),
+    }
+}
+
+/// Abstraction for the WriteOnly parts of the associated MMIO registers.
+type WriteOnlyRegisters = MMIODerefWrapper<WORegisterBlock>;
+
+/// Abstraction for the ReadOnly parts of the associated MMIO registers.
+type ReadOnlyRegisters = MMIODerefWrapper<RORegisterBlock>;
+
+type HandlerTable = Vec<Option<exception::asynchronous::IRQDescriptor>>;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Representation of the peripheral interrupt controller.
+pub struct PeripheralIC {
+    /// Access to write registers is guarded with a lock.
+    wo_registers: IRQSafeNullLock<WriteOnlyRegisters>,
+
+    /// Register read access is unguarded.
+    ro_registers: ReadOnlyRegisters,
+
+    /// Stores registered IRQ handlers. Writable only during kernel init. RO afterwards.
+    handler_table: InitStateLock<HandlerTable>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl PeripheralIC {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
+        Self {
+            wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(mmio_start_addr)),
+            ro_registers: ReadOnlyRegisters::new(mmio_start_addr),
+            handler_table: InitStateLock::new(Vec::new()),
+        }
+    }
+
+    /// Query the list of pending IRQs.
+    fn pending_irqs(&self) -> PendingIRQs {
+        let pending_mask: u64 = (u64::from(self.ro_registers.PENDING_2.get()) << 32)
+            | u64::from(self.ro_registers.PENDING_1.get());
+
+        PendingIRQs::new(pending_mask)
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use synchronization::interface::{Mutex, ReadWriteEx};
+
+impl exception::asynchronous::interface::IRQManager for PeripheralIC {
+    type IRQNumberType = PeripheralIRQ;
+
+    fn register_handler(
+        &self,
+        irq: Self::IRQNumberType,
+        descriptor: exception::asynchronous::IRQDescriptor,
+    ) -> Result<(), &'static str> {
+        self.handler_table.write(|table| {
+            let irq_number = irq.get();
+
+            if table.len() < irq_number {
+                // IRQDescriptor has an integrated range sanity check on construction, so this
+                // vector can't grow arbitrarily big.
+                table.resize(irq_number + 1, None);
+            }
+
+            if table[irq_number].is_some() {
+                return Err("IRQ handler already registered");
+            }
+
+            table[irq_number] = Some(descriptor);
+
+            Ok(())
+        })
+    }
+
+    fn enable(&self, irq: Self::IRQNumberType) {
+        self.wo_registers.lock(|regs| {
+            let enable_reg = if irq.get() <= 31 {
+                &regs.ENABLE_1
+            } else {
+                &regs.ENABLE_2
+            };
+
+            let enable_bit: u32 = 1 << (irq.get() % 32);
+
+            // Writing a 1 to a bit will set the corresponding IRQ enable bit. All other IRQ enable
+            // bits are unaffected. So we don't need read and OR'ing here.
+            enable_reg.set(enable_bit);
+        });
+    }
+
+    fn handle_pending_irqs<'irq_context>(
+        &'irq_context self,
+        _ic: &exception::asynchronous::IRQContext<'irq_context>,
+    ) {
+        self.handler_table.read(|table| {
+            for irq_number in self.pending_irqs() {
+                match table[irq_number] {
+                    None => panic!("No handler registered for IRQ {}", irq_number),
+                    Some(descriptor) => {
+                        // Call the IRQ handler. Panics on failure.
+                        descriptor.handler.handle().expect("Error handling IRQ");
+                    }
+                }
+            }
+        })
+    }
+
+    fn print_handler(&self) {
+        use crate::info;
+
+        info!("      Peripheral handler:");
+
+        self.handler_table.read(|table| {
+            for (i, opt) in table.iter().enumerate() {
+                if let Some(handler) = opt {
+                    info!("            {: >3}. {}", i, handler.name);
+                }
+            }
+        });
+    }
+}
diff --git a/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
new file mode 100644
index 000000000..265930398
--- /dev/null
+++ b/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -0,0 +1,524 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! PL011 UART driver.
+//!
+//! # Resources
+//!
+//! - <https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf>
+//! - <https://developer.arm.com/documentation/ddi0183/latest>
+
+use crate::{
+    bsp,
+    bsp::device_driver::common::MMIODerefWrapper,
+    console, cpu, driver, exception,
+    memory::{Address, Virtual},
+    synchronization,
+    synchronization::IRQSafeNullLock,
+};
+use core::fmt;
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields, register_structs,
+    registers::{ReadOnly, ReadWrite, WriteOnly},
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+// PL011 UART registers.
+//
+// Descriptions taken from "PrimeCell UART (PL011) Technical Reference Manual" r1p5.
+register_bitfields! {
+    u32,
+
+    /// Flag Register.
+    FR [
+        /// Transmit FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
+        /// Line Control Register, LCR_H.
+        ///
+        /// - If the FIFO is disabled, this bit is set when the transmit holding register is empty.
+        /// - If the FIFO is enabled, the TXFE bit is set when the transmit FIFO is empty.
+        /// - This bit does not indicate if there is data in the transmit shift register.
+        TXFE OFFSET(7) NUMBITS(1) [],
+
+        /// Transmit FIFO full. The meaning of this bit depends on the state of the FEN bit in the
+        /// LCR_H Register.
+        ///
+        /// - If the FIFO is disabled, this bit is set when the transmit holding register is full.
+        /// - If the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
+        TXFF OFFSET(5) NUMBITS(1) [],
+
+        /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
+        /// LCR_H Register.
+        ///
+        /// - If the FIFO is disabled, this bit is set when the receive holding register is empty.
+        /// - If the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
+        RXFE OFFSET(4) NUMBITS(1) [],
+
+        /// UART busy. If this bit is set to 1, the UART is busy transmitting data. This bit remains
+        /// set until the complete byte, including all the stop bits, has been sent from the shift
+        /// register.
+        ///
+        /// This bit is set as soon as the transmit FIFO becomes non-empty, regardless of whether
+        /// the UART is enabled or not.
+        BUSY OFFSET(3) NUMBITS(1) []
+    ],
+
+    /// Integer Baud Rate Divisor.
+    IBRD [
+        /// The integer baud rate divisor.
+        BAUD_DIVINT OFFSET(0) NUMBITS(16) []
+    ],
+
+    /// Fractional Baud Rate Divisor.
+    FBRD [
+        ///  The fractional baud rate divisor.
+        BAUD_DIVFRAC OFFSET(0) NUMBITS(6) []
+    ],
+
+    /// Line Control Register.
+    LCR_H [
+        /// Word length. These bits indicate the number of data bits transmitted or received in a
+        /// frame.
+        #[allow(clippy::enum_variant_names)]
+        WLEN OFFSET(5) NUMBITS(2) [
+            FiveBit = 0b00,
+            SixBit = 0b01,
+            SevenBit = 0b10,
+            EightBit = 0b11
+        ],
+
+        /// Enable FIFOs:
+        ///
+        /// 0 = FIFOs are disabled (character mode) that is, the FIFOs become 1-byte-deep holding
+        /// registers.
+        ///
+        /// 1 = Transmit and receive FIFO buffers are enabled (FIFO mode).
+        FEN  OFFSET(4) NUMBITS(1) [
+            FifosDisabled = 0,
+            FifosEnabled = 1
+        ]
+    ],
+
+    /// Control Register.
+    CR [
+        /// Receive enable. If this bit is set to 1, the receive section of the UART is enabled.
+        /// Data reception occurs for either UART signals or SIR signals depending on the setting of
+        /// the SIREN bit. When the UART is disabled in the middle of reception, it completes the
+        /// current character before stopping.
+        RXE OFFSET(9) NUMBITS(1) [
+            Disabled = 0,
+            Enabled = 1
+        ],
+
+        /// Transmit enable. If this bit is set to 1, the transmit section of the UART is enabled.
+        /// Data transmission occurs for either UART signals, or SIR signals depending on the
+        /// setting of the SIREN bit. When the UART is disabled in the middle of transmission, it
+        /// completes the current character before stopping.
+        TXE OFFSET(8) NUMBITS(1) [
+            Disabled = 0,
+            Enabled = 1
+        ],
+
+        /// UART enable:
+        ///
+        /// 0 = UART is disabled. If the UART is disabled in the middle of transmission or
+        /// reception, it completes the current character before stopping.
+        ///
+        /// 1 = The UART is enabled. Data transmission and reception occurs for either UART signals
+        /// or SIR signals depending on the setting of the SIREN bit
+        UARTEN OFFSET(0) NUMBITS(1) [
+            /// If the UART is disabled in the middle of transmission or reception, it completes the
+            /// current character before stopping.
+            Disabled = 0,
+            Enabled = 1
+        ]
+    ],
+
+    /// Interrupt FIFO Level Select Register.
+    IFLS [
+        /// Receive interrupt FIFO level select. The trigger points for the receive interrupt are as
+        /// follows.
+        RXIFLSEL OFFSET(3) NUMBITS(5) [
+            OneEigth = 0b000,
+            OneQuarter = 0b001,
+            OneHalf = 0b010,
+            ThreeQuarters = 0b011,
+            SevenEights = 0b100
+        ]
+    ],
+
+    /// Interrupt Mask Set/Clear Register.
+    IMSC [
+        /// Receive timeout interrupt mask. A read returns the current mask for the UARTRTINTR
+        /// interrupt.
+        ///
+        /// - On a write of 1, the mask of the UARTRTINTR interrupt is set.
+        /// - A write of 0 clears the mask.
+        RTIM OFFSET(6) NUMBITS(1) [
+            Disabled = 0,
+            Enabled = 1
+        ],
+
+        /// Receive interrupt mask. A read returns the current mask for the UARTRXINTR interrupt.
+        ///
+        /// - On a write of 1, the mask of the UARTRXINTR interrupt is set.
+        /// - A write of 0 clears the mask.
+        RXIM OFFSET(4) NUMBITS(1) [
+            Disabled = 0,
+            Enabled = 1
+        ]
+    ],
+
+    /// Masked Interrupt Status Register.
+    MIS [
+        /// Receive timeout masked interrupt status. Returns the masked interrupt state of the
+        /// UARTRTINTR interrupt.
+        RTMIS OFFSET(6) NUMBITS(1) [],
+
+        /// Receive masked interrupt status. Returns the masked interrupt state of the UARTRXINTR
+        /// interrupt.
+        RXMIS OFFSET(4) NUMBITS(1) []
+    ],
+
+    /// Interrupt Clear Register.
+    ICR [
+        /// Meta field for all pending interrupts.
+        ALL OFFSET(0) NUMBITS(11) []
+    ]
+}
+
+register_structs! {
+    #[allow(non_snake_case)]
+    pub RegisterBlock {
+        (0x00 => DR: ReadWrite<u32>),
+        (0x04 => _reserved1),
+        (0x18 => FR: ReadOnly<u32, FR::Register>),
+        (0x1c => _reserved2),
+        (0x24 => IBRD: WriteOnly<u32, IBRD::Register>),
+        (0x28 => FBRD: WriteOnly<u32, FBRD::Register>),
+        (0x2c => LCR_H: WriteOnly<u32, LCR_H::Register>),
+        (0x30 => CR: WriteOnly<u32, CR::Register>),
+        (0x34 => IFLS: ReadWrite<u32, IFLS::Register>),
+        (0x38 => IMSC: ReadWrite<u32, IMSC::Register>),
+        (0x3C => _reserved3),
+        (0x40 => MIS: ReadOnly<u32, MIS::Register>),
+        (0x44 => ICR: WriteOnly<u32, ICR::Register>),
+        (0x48 => @END),
+    }
+}
+
+/// Abstraction for the associated MMIO registers.
+type Registers = MMIODerefWrapper<RegisterBlock>;
+
+#[derive(PartialEq)]
+enum BlockingMode {
+    Blocking,
+    NonBlocking,
+}
+
+struct PL011UartInner {
+    registers: Registers,
+    chars_written: usize,
+    chars_read: usize,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Representation of the UART.
+pub struct PL011Uart {
+    inner: IRQSafeNullLock<PL011UartInner>,
+    irq_number: bsp::device_driver::IRQNumber,
+    post_init_callback: fn(),
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl PL011UartInner {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
+        Self {
+            registers: Registers::new(mmio_start_addr),
+            chars_written: 0,
+            chars_read: 0,
+        }
+    }
+
+    /// Set up baud rate and characteristics.
+    ///
+    /// This results in 8N1 and 921_600 baud.
+    ///
+    /// The calculation for the BRD is (we set the clock to 48 MHz in config.txt):
+    /// `(48_000_000 / 16) / 921_600 = 3.2552083`.
+    ///
+    /// This means the integer part is `3` and goes into the `IBRD`.
+    /// The fractional part is `0.2552083`.
+    ///
+    /// `FBRD` calculation according to the PL011 Technical Reference Manual:
+    /// `INTEGER((0.2552083 * 64) + 0.5) = 16`.
+    ///
+    /// Therefore, the generated baud rate divider is: `3 + 16/64 = 3.25`. Which results in a
+    /// genrated baud rate of `48_000_000 / (16 * 3.25) = 923_077`.
+    ///
+    /// Error = `((923_077 - 921_600) / 921_600) * 100 = 0.16%`.
+    pub fn init(&mut self) {
+        // Execution can arrive here while there are still characters queued in the TX FIFO and
+        // actively being sent out by the UART hardware. If the UART is turned off in this case,
+        // those queued characters would be lost.
+        //
+        // For example, this can happen during runtime on a call to panic!(), because panic!()
+        // initializes its own UART instance and calls init().
+        //
+        // Hence, flush first to ensure all pending characters are transmitted.
+        self.flush();
+
+        // Turn the UART off temporarily.
+        self.registers.CR.set(0);
+
+        // Clear all pending interrupts.
+        self.registers.ICR.write(ICR::ALL::CLEAR);
+
+        // From the PL011 Technical Reference Manual:
+        //
+        // The LCR_H, IBRD, and FBRD registers form the single 30-bit wide LCR Register that is
+        // updated on a single write strobe generated by a LCR_H write. So, to internally update the
+        // contents of IBRD or FBRD, a LCR_H write must always be performed at the end.
+        //
+        // Set the baud rate, 8N1 and FIFO enabled.
+        self.registers.IBRD.write(IBRD::BAUD_DIVINT.val(3));
+        self.registers.FBRD.write(FBRD::BAUD_DIVFRAC.val(16));
+        self.registers
+            .LCR_H
+            .write(LCR_H::WLEN::EightBit + LCR_H::FEN::FifosEnabled);
+
+        // Set RX FIFO fill level at 1/8.
+        self.registers.IFLS.write(IFLS::RXIFLSEL::OneEigth);
+
+        // Enable RX IRQ + RX timeout IRQ.
+        self.registers
+            .IMSC
+            .write(IMSC::RXIM::Enabled + IMSC::RTIM::Enabled);
+
+        // Turn the UART on.
+        self.registers
+            .CR
+            .write(CR::UARTEN::Enabled + CR::TXE::Enabled + CR::RXE::Enabled);
+    }
+
+    /// Send a character.
+    fn write_char(&mut self, c: char) {
+        // Spin while TX FIFO full is set, waiting for an empty slot.
+        while self.registers.FR.matches_all(FR::TXFF::SET) {
+            cpu::nop();
+        }
+
+        // Write the character to the buffer.
+        self.registers.DR.set(c as u32);
+
+        self.chars_written += 1;
+    }
+
+    /// Send a slice of characters.
+    fn write_array(&mut self, a: &[char]) {
+        for c in a {
+            self.write_char(*c);
+        }
+    }
+
+    /// Block execution until the last buffered character has been physically put on the TX wire.
+    fn flush(&self) {
+        // Spin until the busy bit is cleared.
+        while self.registers.FR.matches_all(FR::BUSY::SET) {
+            cpu::nop();
+        }
+    }
+
+    /// Retrieve a character.
+    fn read_char_converting(&mut self, blocking_mode: BlockingMode) -> Option<char> {
+        // If RX FIFO is empty,
+        if self.registers.FR.matches_all(FR::RXFE::SET) {
+            // immediately return in non-blocking mode.
+            if blocking_mode == BlockingMode::NonBlocking {
+                return None;
+            }
+
+            // Otherwise, wait until a char was received.
+            while self.registers.FR.matches_all(FR::RXFE::SET) {
+                cpu::nop();
+            }
+        }
+
+        // Read one character.
+        let mut ret = self.registers.DR.get() as u8 as char;
+
+        // Convert carrige return to newline.
+        if ret == '\r' {
+            ret = '\n'
+        }
+
+        // Update statistics.
+        self.chars_read += 1;
+
+        Some(ret)
+    }
+}
+
+/// Implementing `core::fmt::Write` enables usage of the `format_args!` macros, which in turn are
+/// used to implement the `kernel`'s `print!` and `println!` macros. By implementing `write_str()`,
+/// we get `write_fmt()` automatically.
+///
+/// The function takes an `&mut self`, so it must be implemented for the inner struct.
+///
+/// See [`src/print.rs`].
+///
+/// [`src/print.rs`]: ../../print/index.html
+impl fmt::Write for PL011UartInner {
+    fn write_str(&mut self, s: &str) -> fmt::Result {
+        for c in s.chars() {
+            self.write_char(c);
+        }
+
+        Ok(())
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl PL011Uart {
+    pub const COMPATIBLE: &'static str = "BCM PL011 UART";
+
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    /// - The user must ensure to provide correct IRQ numbers.
+    pub const unsafe fn new(
+        mmio_start_addr: Address<Virtual>,
+        irq_number: bsp::device_driver::IRQNumber,
+        post_init_callback: fn(),
+    ) -> Self {
+        Self {
+            inner: IRQSafeNullLock::new(PL011UartInner::new(mmio_start_addr)),
+            irq_number,
+            post_init_callback,
+        }
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use synchronization::interface::Mutex;
+
+impl driver::interface::DeviceDriver for PL011Uart {
+    fn compatible(&self) -> &'static str {
+        Self::COMPATIBLE
+    }
+
+    unsafe fn init(&self) -> Result<(), &'static str> {
+        self.inner.lock(|inner| inner.init());
+        (self.post_init_callback)();
+
+        Ok(())
+    }
+
+    fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
+        use exception::asynchronous::{irq_manager, IRQDescriptor};
+
+        let descriptor = IRQDescriptor {
+            name: Self::COMPATIBLE,
+            handler: self,
+        };
+
+        irq_manager().register_handler(self.irq_number, descriptor)?;
+        irq_manager().enable(self.irq_number);
+
+        Ok(())
+    }
+}
+
+impl console::interface::Write for PL011Uart {
+    /// Passthrough of `args` to the `core::fmt::Write` implementation, but guarded by a Mutex to
+    /// serialize access.
+    fn write_char(&self, c: char) {
+        self.inner.lock(|inner| inner.write_char(c));
+    }
+
+    fn write_array(&self, a: &[char]) {
+        self.inner.lock(|inner| inner.write_array(a));
+    }
+
+    fn write_fmt(&self, args: core::fmt::Arguments) -> fmt::Result {
+        // Fully qualified syntax for the call to `core::fmt::Write::write_fmt()` to increase
+        // readability.
+        self.inner.lock(|inner| fmt::Write::write_fmt(inner, args))
+    }
+
+    fn flush(&self) {
+        // Spin until TX FIFO empty is set.
+        self.inner.lock(|inner| inner.flush());
+    }
+}
+
+impl console::interface::Read for PL011Uart {
+    fn read_char(&self) -> char {
+        self.inner
+            .lock(|inner| inner.read_char_converting(BlockingMode::Blocking).unwrap())
+    }
+
+    fn clear_rx(&self) {
+        // Read from the RX FIFO until it is indicating empty.
+        while self
+            .inner
+            .lock(|inner| inner.read_char_converting(BlockingMode::NonBlocking))
+            .is_some()
+        {}
+    }
+}
+
+impl console::interface::Statistics for PL011Uart {
+    fn chars_written(&self) -> usize {
+        self.inner.lock(|inner| inner.chars_written)
+    }
+
+    fn chars_read(&self) -> usize {
+        self.inner.lock(|inner| inner.chars_read)
+    }
+}
+
+impl console::interface::All for PL011Uart {}
+
+impl exception::asynchronous::interface::IRQHandler for PL011Uart {
+    fn handle(&self) -> Result<(), &'static str> {
+        self.inner.lock(|inner| {
+            let pending = inner.registers.MIS.extract();
+
+            // Clear all pending IRQs.
+            inner.registers.ICR.write(ICR::ALL::CLEAR);
+
+            // Check for any kind of RX interrupt.
+            if pending.matches_any(MIS::RXMIS::SET + MIS::RTMIS::SET) {
+                // Echo any received characters.
+                while let Some(c) = inner.read_char_converting(BlockingMode::NonBlocking) {
+                    inner.write_char(c)
+                }
+            }
+        });
+
+        Ok(())
+    }
+}
diff --git a/19_kernel_heap/kernel/src/bsp/device_driver/common.rs b/19_kernel_heap/kernel/src/bsp/device_driver/common.rs
new file mode 100644
index 000000000..69f038d4d
--- /dev/null
+++ b/19_kernel_heap/kernel/src/bsp/device_driver/common.rs
@@ -0,0 +1,39 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Common device driver code.
+
+use crate::memory::{Address, Virtual};
+use core::{marker::PhantomData, ops};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct MMIODerefWrapper<T> {
+    start_addr: Address<Virtual>,
+    phantom: PhantomData<fn() -> T>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl<T> MMIODerefWrapper<T> {
+    /// Create an instance.
+    pub const unsafe fn new(start_addr: Address<Virtual>) -> Self {
+        Self {
+            start_addr,
+            phantom: PhantomData,
+        }
+    }
+}
+
+impl<T> ops::Deref for MMIODerefWrapper<T> {
+    type Target = T;
+
+    fn deref(&self) -> &Self::Target {
+        unsafe { &*(self.start_addr.as_usize() as *const _) }
+    }
+}
diff --git a/19_kernel_heap/kernel/src/bsp/raspberrypi.rs b/19_kernel_heap/kernel/src/bsp/raspberrypi.rs
new file mode 100644
index 000000000..474419f4e
--- /dev/null
+++ b/19_kernel_heap/kernel/src/bsp/raspberrypi.rs
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Top-level BSP file for the Raspberry Pi 3 and 4.
+
+pub mod cpu;
+pub mod driver;
+pub mod exception;
+pub mod memory;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Board identification.
+pub fn board_name() -> &'static str {
+    #[cfg(feature = "bsp_rpi3")]
+    {
+        "Raspberry Pi 3"
+    }
+
+    #[cfg(feature = "bsp_rpi4")]
+    {
+        "Raspberry Pi 4"
+    }
+}
diff --git a/19_kernel_heap/kernel/src/bsp/raspberrypi/cpu.rs b/19_kernel_heap/kernel/src/bsp/raspberrypi/cpu.rs
new file mode 100644
index 000000000..85fb89e49
--- /dev/null
+++ b/19_kernel_heap/kernel/src/bsp/raspberrypi/cpu.rs
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP Processor code.
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Used by `arch` code to find the early boot core.
+#[no_mangle]
+#[link_section = ".text._start_arguments"]
+pub static BOOT_CORE_ID: u64 = 0;
diff --git a/19_kernel_heap/kernel/src/bsp/raspberrypi/driver.rs b/19_kernel_heap/kernel/src/bsp/raspberrypi/driver.rs
new file mode 100644
index 000000000..3eb01f276
--- /dev/null
+++ b/19_kernel_heap/kernel/src/bsp/raspberrypi/driver.rs
@@ -0,0 +1,190 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP driver support.
+
+use super::{exception, memory::map::mmio};
+use crate::{
+    bsp::device_driver,
+    console, driver, exception as generic_exception, memory,
+    memory::mmu::MMIODescriptor,
+    synchronization::{interface::ReadWriteEx, InitStateLock},
+};
+use alloc::vec::Vec;
+use core::{
+    mem::MaybeUninit,
+    sync::atomic::{AtomicBool, Ordering},
+};
+pub use device_driver::IRQNumber;
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Device Driver Manager type.
+struct BSPDriverManager {
+    device_drivers: InitStateLock<Vec<&'static (dyn DeviceDriver + Sync)>>,
+    init_done: AtomicBool,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static mut PL011_UART: MaybeUninit<device_driver::PL011Uart> = MaybeUninit::uninit();
+static mut GPIO: MaybeUninit<device_driver::GPIO> = MaybeUninit::uninit();
+
+#[cfg(feature = "bsp_rpi3")]
+static mut INTERRUPT_CONTROLLER: MaybeUninit<device_driver::InterruptController> =
+    MaybeUninit::uninit();
+
+#[cfg(feature = "bsp_rpi4")]
+static mut INTERRUPT_CONTROLLER: MaybeUninit<device_driver::GICv2> = MaybeUninit::uninit();
+
+static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
+    device_drivers: InitStateLock::new(Vec::new()),
+    init_done: AtomicBool::new(false),
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl BSPDriverManager {
+    unsafe fn instantiate_uart(&self) -> Result<(), &'static str> {
+        let mmio_descriptor = MMIODescriptor::new(mmio::PL011_UART_START, mmio::PL011_UART_SIZE);
+        let virt_addr =
+            memory::mmu::kernel_map_mmio(device_driver::PL011Uart::COMPATIBLE, &mmio_descriptor)?;
+
+        // This is safe to do, because it is only called from the init'ed instance itself.
+        fn uart_post_init() {
+            console::register_console(unsafe { PL011_UART.assume_init_ref() });
+        }
+
+        PL011_UART.write(device_driver::PL011Uart::new(
+            virt_addr,
+            exception::asynchronous::irq_map::PL011_UART,
+            uart_post_init,
+        ));
+
+        Ok(())
+    }
+
+    unsafe fn instantiate_gpio(&self) -> Result<(), &'static str> {
+        let mmio_descriptor = MMIODescriptor::new(mmio::GPIO_START, mmio::GPIO_SIZE);
+        let virt_addr =
+            memory::mmu::kernel_map_mmio(device_driver::GPIO::COMPATIBLE, &mmio_descriptor)?;
+
+        // This is safe to do, because it is only called from the init'ed instance itself.
+        fn gpio_post_init() {
+            unsafe { GPIO.assume_init_ref().map_pl011_uart() };
+        }
+
+        GPIO.write(device_driver::GPIO::new(virt_addr, gpio_post_init));
+
+        Ok(())
+    }
+
+    #[cfg(feature = "bsp_rpi3")]
+    unsafe fn instantiate_interrupt_controller(&self) -> Result<(), &'static str> {
+        let periph_mmio_descriptor =
+            MMIODescriptor::new(mmio::PERIPHERAL_IC_START, mmio::PERIPHERAL_IC_SIZE);
+        let periph_virt_addr = memory::mmu::kernel_map_mmio(
+            device_driver::InterruptController::COMPATIBLE,
+            &periph_mmio_descriptor,
+        )?;
+
+        // This is safe to do, because it is only called from the init'ed instance itself.
+        fn interrupt_controller_post_init() {
+            generic_exception::asynchronous::register_irq_manager(unsafe {
+                INTERRUPT_CONTROLLER.assume_init_ref()
+            });
+        }
+
+        INTERRUPT_CONTROLLER.write(device_driver::InterruptController::new(
+            periph_virt_addr,
+            interrupt_controller_post_init,
+        ));
+
+        Ok(())
+    }
+
+    #[cfg(feature = "bsp_rpi4")]
+    unsafe fn instantiate_interrupt_controller(&self) -> Result<(), &'static str> {
+        let gicd_mmio_descriptor = MMIODescriptor::new(mmio::GICD_START, mmio::GICD_SIZE);
+        let gicd_virt_addr = memory::mmu::kernel_map_mmio("GICv2 GICD", &gicd_mmio_descriptor)?;
+
+        let gicc_mmio_descriptor = MMIODescriptor::new(mmio::GICC_START, mmio::GICC_SIZE);
+        let gicc_virt_addr = memory::mmu::kernel_map_mmio("GICV2 GICC", &gicc_mmio_descriptor)?;
+
+        // This is safe to do, because it is only called from the init'ed instance itself.
+        fn interrupt_controller_post_init() {
+            generic_exception::asynchronous::register_irq_manager(unsafe {
+                INTERRUPT_CONTROLLER.assume_init_ref()
+            });
+        }
+
+        INTERRUPT_CONTROLLER.write(device_driver::GICv2::new(
+            gicd_virt_addr,
+            gicc_virt_addr,
+            interrupt_controller_post_init,
+        ));
+
+        Ok(())
+    }
+
+    unsafe fn register_drivers(&self) {
+        self.device_drivers.write(|drivers| {
+            drivers.push(PL011_UART.assume_init_ref());
+            drivers.push(GPIO.assume_init_ref());
+            drivers.push(INTERRUPT_CONTROLLER.assume_init_ref());
+        });
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the driver manager.
+pub fn driver_manager() -> &'static impl driver::interface::DriverManager {
+    &BSP_DRIVER_MANAGER
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use driver::interface::DeviceDriver;
+
+impl driver::interface::DriverManager for BSPDriverManager {
+    unsafe fn instantiate_drivers(&self) -> Result<(), &'static str> {
+        if self.init_done.load(Ordering::Relaxed) {
+            return Err("Drivers already instantiated");
+        }
+
+        self.instantiate_uart()?;
+        self.instantiate_gpio()?;
+        self.instantiate_interrupt_controller()?;
+
+        self.register_drivers();
+
+        self.init_done.store(true, Ordering::Relaxed);
+        Ok(())
+    }
+
+    fn all_device_drivers(&self) -> &Vec<&(dyn DeviceDriver + Sync)> {
+        self.device_drivers.read(|drivers| drivers)
+    }
+
+    #[cfg(feature = "test_build")]
+    fn qemu_bring_up_console(&self) {
+        use crate::cpu;
+
+        unsafe {
+            self.instantiate_uart()
+                .unwrap_or_else(|_| cpu::qemu_exit_failure());
+            console::register_console(PL011_UART.assume_init_ref());
+        };
+    }
+}
diff --git a/19_kernel_heap/kernel/src/bsp/raspberrypi/exception.rs b/19_kernel_heap/kernel/src/bsp/raspberrypi/exception.rs
new file mode 100644
index 000000000..aa6c5a63f
--- /dev/null
+++ b/19_kernel_heap/kernel/src/bsp/raspberrypi/exception.rs
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP synchronous and asynchronous exception handling.
+
+pub mod asynchronous;
diff --git a/19_kernel_heap/kernel/src/bsp/raspberrypi/exception/asynchronous.rs b/19_kernel_heap/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
new file mode 100644
index 000000000..ab20d86d3
--- /dev/null
+++ b/19_kernel_heap/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP asynchronous exception handling.
+
+use crate::bsp;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(feature = "bsp_rpi3")]
+pub(in crate::bsp) mod irq_map {
+    use super::bsp::device_driver::{IRQNumber, PeripheralIRQ};
+
+    pub const PL011_UART: IRQNumber = IRQNumber::Peripheral(PeripheralIRQ::new(57));
+}
+
+#[cfg(feature = "bsp_rpi4")]
+pub(in crate::bsp) mod irq_map {
+    use super::bsp::device_driver::IRQNumber;
+
+    pub const PL011_UART: IRQNumber = IRQNumber::new(153);
+}
diff --git a/19_kernel_heap/kernel/src/bsp/raspberrypi/kernel.ld b/19_kernel_heap/kernel/src/bsp/raspberrypi/kernel.ld
new file mode 100644
index 000000000..cbfbb5b50
--- /dev/null
+++ b/19_kernel_heap/kernel/src/bsp/raspberrypi/kernel.ld
@@ -0,0 +1,127 @@
+/* SPDX-License-Identifier: MIT OR Apache-2.0
+ *
+ * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+ */
+
+INCLUDE kernel_virt_addr_space_size.ld;
+
+PAGE_SIZE = 64K;
+PAGE_MASK = PAGE_SIZE - 1;
+
+/* The kernel's virtual address range will be:
+ *
+ * [END_ADDRESS_INCLUSIVE, START_ADDRESS]
+ * [u64::MAX             , (u64::MAX - __kernel_virt_addr_space_size) + 1]
+ */
+__kernel_virt_start_addr = ((0xffffffffffffffff - __kernel_virt_addr_space_size) + 1);
+
+__rpi_phys_dram_start_addr = 0;
+
+/* The physical address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_phys_binary_load_addr = 0x80000;
+
+
+ENTRY(__rpi_phys_binary_load_addr)
+
+/* Flags:
+ *     4 == R
+ *     5 == RX
+ *     6 == RW
+ *
+ * Segments are marked PT_LOAD below so that the ELF file provides virtual and physical addresses.
+ * It doesn't mean all of them need actually be loaded.
+ */
+PHDRS
+{
+    segment_code            PT_LOAD FLAGS(5);
+    segment_data            PT_LOAD FLAGS(6);
+    segment_heap            PT_LOAD FLAGS(6);
+    segment_boot_core_stack PT_LOAD FLAGS(6);
+}
+
+SECTIONS
+{
+    . =  __kernel_virt_start_addr;
+
+    ASSERT((. & PAGE_MASK) == 0, "Start of address space is not page aligned")
+
+    /***********************************************************************************************
+    * Code + RO Data + Global Offset Table
+    ***********************************************************************************************/
+    __code_start = .;
+    .text : AT(__rpi_phys_binary_load_addr)
+    {
+        KEEP(*(.text._start))
+        *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
+        *(.text._start_rust)      /* The Rust entry point */
+        *(.text*)                 /* Everything else */
+    } :segment_code
+
+    .rodata         : ALIGN(8) { *(.rodata*) } :segment_code
+    .got            : ALIGN(8) { *(.got)     } :segment_code
+    .kernel_symbols : ALIGN(8) {
+        __kernel_symbols_start = .;
+        . += 32 * 1024;
+    } :segment_code
+
+    . = ALIGN(PAGE_SIZE);
+    __code_end_exclusive = .;
+
+    /***********************************************************************************************
+    * Data + BSS
+    ***********************************************************************************************/
+    __data_start = .;
+    .data : { *(.data*) } :segment_data
+
+    /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
+    .bss (NOLOAD) : ALIGN(16)
+    {
+        __bss_start = .;
+        *(.bss*);
+        . = ALIGN(16);
+        __bss_end_exclusive = .;
+    } :segment_data
+
+    . = ALIGN(PAGE_SIZE);
+    __data_end_exclusive = .;
+
+    /***********************************************************************************************
+    * Heap
+    ***********************************************************************************************/
+    __heap_start = .;
+    .heap (NOLOAD) :
+    {
+        . += 16 * 1024 * 1024;
+    } :segment_heap
+    __heap_end_exclusive = .;
+
+    ASSERT((. & PAGE_MASK) == 0, "Heap is not page aligned")
+
+    /***********************************************************************************************
+    * MMIO Remap Reserved
+    ***********************************************************************************************/
+    __mmio_remap_start = .;
+    . += 8 * 1024 * 1024;
+    __mmio_remap_end_exclusive = .;
+
+    ASSERT((. & PAGE_MASK) == 0, "MMIO remap reservation is not page aligned")
+
+    /***********************************************************************************************
+    * Guard Page
+    ***********************************************************************************************/
+    . += PAGE_SIZE;
+
+    /***********************************************************************************************
+    * Boot Core Stack
+    ***********************************************************************************************/
+    .boot_core_stack (NOLOAD) : AT(__rpi_phys_dram_start_addr)
+    {
+        __boot_core_stack_start = .;         /*   ^             */
+                                             /*   | stack       */
+        . += __rpi_phys_binary_load_addr;    /*   | growth      */
+                                             /*   | direction   */
+        __boot_core_stack_end_exclusive = .; /*   |             */
+    } :segment_boot_core_stack
+
+    ASSERT((. & PAGE_MASK) == 0, "End of boot core stack is not page aligned")
+}
diff --git a/19_kernel_heap/kernel/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld b/19_kernel_heap/kernel/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
new file mode 100644
index 000000000..c5d58c30a
--- /dev/null
+++ b/19_kernel_heap/kernel/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
@@ -0,0 +1 @@
+__kernel_virt_addr_space_size = 1024 * 1024 * 1024
diff --git a/19_kernel_heap/kernel/src/bsp/raspberrypi/memory.rs b/19_kernel_heap/kernel/src/bsp/raspberrypi/memory.rs
new file mode 100644
index 000000000..760128d37
--- /dev/null
+++ b/19_kernel_heap/kernel/src/bsp/raspberrypi/memory.rs
@@ -0,0 +1,251 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP Memory Management.
+//!
+//! The physical memory layout.
+//!
+//! The Raspberry's firmware copies the kernel binary to 0x8_0000. The preceding region will be used
+//! as the boot core's stack.
+//!
+//! +---------------------------------------+
+//! |                                       | boot_core_stack_start @ 0x0
+//! |                                       |                                ^
+//! | Boot-core Stack                       |                                | stack
+//! |                                       |                                | growth
+//! |                                       |                                | direction
+//! +---------------------------------------+
+//! |                                       | code_start @ 0x8_0000 == boot_core_stack_end_exclusive
+//! | .text                                 |
+//! | .rodata                               |
+//! | .got                                  |
+//! | .kernel_symbols                       |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       | data_start == code_end_exclusive
+//! | .data                                 |
+//! | .bss                                  |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       | heap_start == data_end_exclusive
+//! | .heap                                 |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       | heap_end_exclusive
+//! |                                       |
+//!
+//!
+//!
+//!
+//!
+//! The virtual memory layout is as follows:
+//!
+//! +---------------------------------------+
+//! |                                       | code_start @ __kernel_virt_start_addr
+//! | .text                                 |
+//! | .rodata                               |
+//! | .got                                  |
+//! | .kernel_symbols                       |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       | data_start == code_end_exclusive
+//! | .data                                 |
+//! | .bss                                  |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       | heap_start == data_end_exclusive
+//! | .heap                                 |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       |  mmio_remap_start == heap_end_exclusive
+//! | VA region for MMIO remapping          |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       |  mmio_remap_end_exclusive
+//! | Unmapped guard page                   |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       | boot_core_stack_start
+//! |                                       |                                ^
+//! | Boot-core Stack                       |                                | stack
+//! |                                       |                                | growth
+//! |                                       |                                | direction
+//! +---------------------------------------+
+//! |                                       | boot_core_stack_end_exclusive
+//! |                                       |
+pub mod mmu;
+
+use crate::memory::{mmu::PageAddress, Address, Physical, Virtual};
+use core::cell::UnsafeCell;
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+// Symbols from the linker script.
+extern "Rust" {
+    static __code_start: UnsafeCell<()>;
+    static __code_end_exclusive: UnsafeCell<()>;
+
+    static __data_start: UnsafeCell<()>;
+    static __data_end_exclusive: UnsafeCell<()>;
+
+    static __heap_start: UnsafeCell<()>;
+    static __heap_end_exclusive: UnsafeCell<()>;
+
+    static __mmio_remap_start: UnsafeCell<()>;
+    static __mmio_remap_end_exclusive: UnsafeCell<()>;
+
+    static __boot_core_stack_start: UnsafeCell<()>;
+    static __boot_core_stack_end_exclusive: UnsafeCell<()>;
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// The board's physical memory map.
+#[rustfmt::skip]
+pub(super) mod map {
+    use super::*;
+
+    /// Physical devices.
+    #[cfg(feature = "bsp_rpi3")]
+    pub mod mmio {
+        use super::*;
+
+        pub const PERIPHERAL_IC_START: Address<Physical> = Address::new(0x3F00_B200);
+        pub const PERIPHERAL_IC_SIZE:  usize             =              0x24;
+
+        pub const GPIO_START:          Address<Physical> = Address::new(0x3F20_0000);
+        pub const GPIO_SIZE:           usize             =              0xA0;
+
+        pub const PL011_UART_START:    Address<Physical> = Address::new(0x3F20_1000);
+        pub const PL011_UART_SIZE:     usize             =              0x48;
+
+        pub const END:                 Address<Physical> = Address::new(0x4001_0000);
+    }
+
+    /// Physical devices.
+    #[cfg(feature = "bsp_rpi4")]
+    pub mod mmio {
+        use super::*;
+
+        pub const GPIO_START:       Address<Physical> = Address::new(0xFE20_0000);
+        pub const GPIO_SIZE:        usize             =              0xA0;
+
+        pub const PL011_UART_START: Address<Physical> = Address::new(0xFE20_1000);
+        pub const PL011_UART_SIZE:  usize             =              0x48;
+
+        pub const GICD_START:       Address<Physical> = Address::new(0xFF84_1000);
+        pub const GICD_SIZE:        usize             =              0x824;
+
+        pub const GICC_START:       Address<Physical> = Address::new(0xFF84_2000);
+        pub const GICC_SIZE:        usize             =              0x14;
+
+        pub const END:              Address<Physical> = Address::new(0xFF85_0000);
+    }
+
+    pub const END: Address<Physical> = mmio::END;
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// Start page address of the code segment.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn virt_code_start() -> PageAddress<Virtual> {
+    PageAddress::from(unsafe { __code_start.get() as usize })
+}
+
+/// Size of the code segment.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn code_size() -> usize {
+    unsafe { (__code_end_exclusive.get() as usize) - (__code_start.get() as usize) }
+}
+
+/// Start page address of the data segment.
+#[inline(always)]
+fn virt_data_start() -> PageAddress<Virtual> {
+    PageAddress::from(unsafe { __data_start.get() as usize })
+}
+
+/// Size of the data segment.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn data_size() -> usize {
+    unsafe { (__data_end_exclusive.get() as usize) - (__data_start.get() as usize) }
+}
+
+/// Start page address of the heap segment.
+#[inline(always)]
+fn virt_heap_start() -> PageAddress<Virtual> {
+    PageAddress::from(unsafe { __heap_start.get() as usize })
+}
+
+/// Size of the heap segment.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn heap_size() -> usize {
+    unsafe { (__heap_end_exclusive.get() as usize) - (__heap_start.get() as usize) }
+}
+
+/// Start page address of the MMIO remap reservation.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn virt_mmio_remap_start() -> PageAddress<Virtual> {
+    PageAddress::from(unsafe { __mmio_remap_start.get() as usize })
+}
+
+/// Size of the MMIO remap reservation.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn mmio_remap_size() -> usize {
+    unsafe { (__mmio_remap_end_exclusive.get() as usize) - (__mmio_remap_start.get() as usize) }
+}
+
+/// Start page address of the boot core's stack.
+#[inline(always)]
+fn virt_boot_core_stack_start() -> PageAddress<Virtual> {
+    PageAddress::from(unsafe { __boot_core_stack_start.get() as usize })
+}
+
+/// Size of the boot core's stack.
+#[inline(always)]
+fn boot_core_stack_size() -> usize {
+    unsafe {
+        (__boot_core_stack_end_exclusive.get() as usize) - (__boot_core_stack_start.get() as usize)
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Exclusive end address of the physical address space.
+#[inline(always)]
+pub fn phys_addr_space_end_exclusive_addr() -> PageAddress<Physical> {
+    PageAddress::from(map::END)
+}
diff --git a/19_kernel_heap/kernel/src/bsp/raspberrypi/memory/mmu.rs b/19_kernel_heap/kernel/src/bsp/raspberrypi/memory/mmu.rs
new file mode 100644
index 000000000..bb2f82083
--- /dev/null
+++ b/19_kernel_heap/kernel/src/bsp/raspberrypi/memory/mmu.rs
@@ -0,0 +1,197 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP Memory Management Unit.
+
+use crate::{
+    memory::{
+        mmu::{
+            self as generic_mmu, AddressSpace, AssociatedTranslationTable, AttributeFields,
+            MemoryRegion, PageAddress, TranslationGranule,
+        },
+        Physical, Virtual,
+    },
+    synchronization::InitStateLock,
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+type KernelTranslationTable =
+    <KernelVirtAddrSpace as AssociatedTranslationTable>::TableStartFromTop;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// The translation granule chosen by this BSP. This will be used everywhere else in the kernel to
+/// derive respective data structures and their sizes. For example, the `crate::memory::mmu::Page`.
+pub type KernelGranule = TranslationGranule<{ 64 * 1024 }>;
+
+/// The kernel's virtual address space defined by this BSP.
+pub type KernelVirtAddrSpace = AddressSpace<{ kernel_virt_addr_space_size() }>;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+/// The kernel translation tables.
+///
+/// It is mandatory that InitStateLock is transparent.
+///
+/// That is, `size_of(InitStateLock<KernelTranslationTable>) == size_of(KernelTranslationTable)`.
+/// There is a unit tests that checks this porperty.
+#[link_section = ".data"]
+#[no_mangle]
+static KERNEL_TABLES: InitStateLock<KernelTranslationTable> =
+    InitStateLock::new(KernelTranslationTable::new_for_precompute());
+
+/// This value is needed during early boot for MMU setup.
+///
+/// This will be patched to the correct value by the "translation table tool" after linking. This
+/// given value here is just a dummy.
+#[link_section = ".text._start_arguments"]
+#[no_mangle]
+static PHYS_KERNEL_TABLES_BASE_ADDR: u64 = 0xCCCCAAAAFFFFEEEE;
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// This is a hack for retrieving the value for the kernel's virtual address space size as a
+/// constant from a common place, since it is needed as a compile-time/link-time constant in both,
+/// the linker script and the Rust sources.
+#[allow(clippy::needless_late_init)]
+const fn kernel_virt_addr_space_size() -> usize {
+    let __kernel_virt_addr_space_size;
+
+    include!("../kernel_virt_addr_space_size.ld");
+
+    __kernel_virt_addr_space_size
+}
+
+/// Helper function for calculating the number of pages the given parameter spans.
+const fn size_to_num_pages(size: usize) -> usize {
+    assert!(size > 0);
+    assert!(size % KernelGranule::SIZE == 0);
+
+    size >> KernelGranule::SHIFT
+}
+
+/// The data pages of the kernel binary.
+fn virt_data_region() -> MemoryRegion<Virtual> {
+    let num_pages = size_to_num_pages(super::data_size());
+
+    let start_page_addr = super::virt_data_start();
+    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
+
+    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
+}
+
+// There is no reason to expect the following conversions to fail, since they were generated offline
+// by the `translation table tool`. If it doesn't work, a panic due to the unwraps is justified.
+fn kernel_virt_to_phys_region(virt_region: MemoryRegion<Virtual>) -> MemoryRegion<Physical> {
+    let phys_start_page_addr =
+        generic_mmu::try_kernel_virt_page_addr_to_phys_page_addr(virt_region.start_page_addr())
+            .unwrap();
+
+    let phys_end_exclusive_page_addr = phys_start_page_addr
+        .checked_offset(virt_region.num_pages() as isize)
+        .unwrap();
+
+    MemoryRegion::new(phys_start_page_addr, phys_end_exclusive_page_addr)
+}
+
+fn kernel_page_attributes(virt_page_addr: PageAddress<Virtual>) -> AttributeFields {
+    generic_mmu::try_kernel_page_attributes(virt_page_addr).unwrap()
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The code pages of the kernel binary.
+pub fn virt_code_region() -> MemoryRegion<Virtual> {
+    let num_pages = size_to_num_pages(super::code_size());
+
+    let start_page_addr = super::virt_code_start();
+    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
+
+    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
+}
+
+/// The heap pages.
+pub fn virt_heap_region() -> MemoryRegion<Virtual> {
+    let num_pages = size_to_num_pages(super::heap_size());
+
+    let start_page_addr = super::virt_heap_start();
+    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
+
+    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
+}
+
+/// The boot core stack pages.
+pub fn virt_boot_core_stack_region() -> MemoryRegion<Virtual> {
+    let num_pages = size_to_num_pages(super::boot_core_stack_size());
+
+    let start_page_addr = super::virt_boot_core_stack_start();
+    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
+
+    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
+}
+
+/// Return a reference to the kernel's translation tables.
+pub fn kernel_translation_tables() -> &'static InitStateLock<KernelTranslationTable> {
+    &KERNEL_TABLES
+}
+
+/// The MMIO remap pages.
+pub fn virt_mmio_remap_region() -> MemoryRegion<Virtual> {
+    let num_pages = size_to_num_pages(super::mmio_remap_size());
+
+    let start_page_addr = super::virt_mmio_remap_start();
+    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
+
+    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
+}
+
+/// Add mapping records for the kernel binary.
+///
+/// The actual translation table entries for the kernel binary are generated using the offline
+/// `translation table tool` and patched into the kernel binary. This function just adds the mapping
+/// record entries.
+pub fn kernel_add_mapping_records_for_precomputed() {
+    let virt_code_region = virt_code_region();
+    generic_mmu::kernel_add_mapping_record(
+        "Kernel code and RO data",
+        &virt_code_region,
+        &kernel_virt_to_phys_region(virt_code_region),
+        &kernel_page_attributes(virt_code_region.start_page_addr()),
+    );
+
+    let virt_data_region = virt_data_region();
+    generic_mmu::kernel_add_mapping_record(
+        "Kernel data and bss",
+        &virt_data_region,
+        &kernel_virt_to_phys_region(virt_data_region),
+        &kernel_page_attributes(virt_data_region.start_page_addr()),
+    );
+
+    let virt_heap_region = virt_heap_region();
+    generic_mmu::kernel_add_mapping_record(
+        "Kernel heap",
+        &virt_heap_region,
+        &kernel_virt_to_phys_region(virt_heap_region),
+        &kernel_page_attributes(virt_heap_region.start_page_addr()),
+    );
+
+    let virt_boot_core_stack_region = virt_boot_core_stack_region();
+    generic_mmu::kernel_add_mapping_record(
+        "Kernel boot-core stack",
+        &virt_boot_core_stack_region,
+        &kernel_virt_to_phys_region(virt_boot_core_stack_region),
+        &kernel_page_attributes(virt_boot_core_stack_region.start_page_addr()),
+    );
+}
diff --git a/19_kernel_heap/kernel/src/common.rs b/19_kernel_heap/kernel/src/common.rs
new file mode 100644
index 000000000..f32f650fb
--- /dev/null
+++ b/19_kernel_heap/kernel/src/common.rs
@@ -0,0 +1,46 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! General purpose code.
+
+/// Check if a value is aligned to a given size.
+#[inline(always)]
+pub const fn is_aligned(value: usize, alignment: usize) -> bool {
+    assert!(alignment.is_power_of_two());
+
+    (value & (alignment - 1)) == 0
+}
+
+/// Align down.
+#[inline(always)]
+pub const fn align_down(value: usize, alignment: usize) -> usize {
+    assert!(alignment.is_power_of_two());
+
+    value & !(alignment - 1)
+}
+
+/// Align up.
+#[inline(always)]
+pub const fn align_up(value: usize, alignment: usize) -> usize {
+    assert!(alignment.is_power_of_two());
+
+    (value + alignment - 1) & !(alignment - 1)
+}
+
+/// Convert a size into human readable format.
+pub const fn size_human_readable_ceil(size: usize) -> (usize, &'static str) {
+    const KIB: usize = 1024;
+    const MIB: usize = 1024 * 1024;
+    const GIB: usize = 1024 * 1024 * 1024;
+
+    if (size / GIB) > 0 {
+        (size.div_ceil(GIB), "GiB")
+    } else if (size / MIB) > 0 {
+        (size.div_ceil(MIB), "MiB")
+    } else if (size / KIB) > 0 {
+        (size.div_ceil(KIB), "KiB")
+    } else {
+        (size, "Byte")
+    }
+}
diff --git a/19_kernel_heap/kernel/src/console.rs b/19_kernel_heap/kernel/src/console.rs
new file mode 100644
index 000000000..20a89cd7e
--- /dev/null
+++ b/19_kernel_heap/kernel/src/console.rs
@@ -0,0 +1,93 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! System console.
+
+mod buffer_console;
+
+use crate::synchronization;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Console interfaces.
+pub mod interface {
+    use core::fmt;
+
+    /// Console write functions.
+    pub trait Write {
+        /// Write a single character.
+        fn write_char(&self, c: char);
+
+        /// Write a slice of characters.
+        fn write_array(&self, a: &[char]);
+
+        /// Write a Rust format string.
+        fn write_fmt(&self, args: fmt::Arguments) -> fmt::Result;
+
+        /// Block until the last buffered character has been physically put on the TX wire.
+        fn flush(&self);
+    }
+
+    /// Console read functions.
+    pub trait Read {
+        /// Read a single character.
+        fn read_char(&self) -> char {
+            ' '
+        }
+
+        /// Clear RX buffers, if any.
+        fn clear_rx(&self);
+    }
+
+    /// Console statistics.
+    pub trait Statistics {
+        /// Return the number of characters written.
+        fn chars_written(&self) -> usize {
+            0
+        }
+
+        /// Return the number of characters read.
+        fn chars_read(&self) -> usize {
+            0
+        }
+    }
+
+    /// Trait alias for a full-fledged console.
+    pub trait All: Write + Read + Statistics {}
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static CUR_CONSOLE: InitStateLock<&'static (dyn interface::All + Sync)> =
+    InitStateLock::new(&buffer_console::BUFFER_CONSOLE);
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+use synchronization::{interface::ReadWriteEx, InitStateLock};
+
+/// Register a new console.
+pub fn register_console(new_console: &'static (dyn interface::All + Sync)) {
+    CUR_CONSOLE.write(|con| *con = new_console);
+
+    static FIRST_SWITCH: InitStateLock<bool> = InitStateLock::new(true);
+    FIRST_SWITCH.write(|first| {
+        if *first == true {
+            *first = false;
+
+            buffer_console::BUFFER_CONSOLE.dump();
+        }
+    });
+}
+
+/// Return a reference to the currently registered console.
+///
+/// This is the global console used by all printing macros.
+pub fn console() -> &'static dyn interface::All {
+    CUR_CONSOLE.read(|con| *con)
+}
diff --git a/19_kernel_heap/kernel/src/console/buffer_console.rs b/19_kernel_heap/kernel/src/console/buffer_console.rs
new file mode 100644
index 000000000..c3259f898
--- /dev/null
+++ b/19_kernel_heap/kernel/src/console/buffer_console.rs
@@ -0,0 +1,108 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! A console that buffers input during the init phase.
+
+use super::interface;
+use crate::{console, info, synchronization, synchronization::InitStateLock};
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+const BUF_SIZE: usize = 1024 * 64;
+
+pub struct BufferConsoleInner {
+    buf: [char; BUF_SIZE],
+    write_ptr: usize,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct BufferConsole {
+    inner: InitStateLock<BufferConsoleInner>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+pub static BUFFER_CONSOLE: BufferConsole = BufferConsole {
+    inner: InitStateLock::new(BufferConsoleInner {
+        // Use the null character, so this lands in .bss and does not waste space in the binary.
+        buf: ['\0'; BUF_SIZE],
+        write_ptr: 0,
+    }),
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl BufferConsoleInner {
+    fn write_char(&mut self, c: char) {
+        if self.write_ptr < (BUF_SIZE - 1) {
+            self.buf[self.write_ptr] = c;
+            self.write_ptr += 1;
+        }
+    }
+}
+
+impl fmt::Write for BufferConsoleInner {
+    fn write_str(&mut self, s: &str) -> fmt::Result {
+        for c in s.chars() {
+            self.write_char(c);
+        }
+
+        Ok(())
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+use synchronization::interface::ReadWriteEx;
+
+impl BufferConsole {
+    /// Dump the buffer.
+    ///
+    /// # Invariant
+    ///
+    /// It is expected that this is only called when self != crate::console::console().
+    pub fn dump(&self) {
+        self.inner.read(|inner| {
+            console::console().write_array(&inner.buf[0..inner.write_ptr]);
+
+            if inner.write_ptr == (BUF_SIZE - 1) {
+                info!("Pre-UART buffer overflowed");
+            } else if inner.write_ptr > 0 {
+                info!("End of pre-UART buffer")
+            }
+        });
+    }
+}
+
+impl interface::Write for BufferConsole {
+    fn write_char(&self, c: char) {
+        self.inner.write(|inner| inner.write_char(c));
+    }
+
+    fn write_array(&self, _a: &[char]) {}
+
+    fn write_fmt(&self, args: fmt::Arguments) -> fmt::Result {
+        self.inner.write(|inner| fmt::Write::write_fmt(inner, args))
+    }
+
+    fn flush(&self) {}
+}
+
+impl interface::Read for BufferConsole {
+    fn clear_rx(&self) {}
+}
+
+impl interface::Statistics for BufferConsole {}
+impl interface::All for BufferConsole {}
diff --git a/19_kernel_heap/kernel/src/cpu.rs b/19_kernel_heap/kernel/src/cpu.rs
new file mode 100644
index 000000000..e1493d1dd
--- /dev/null
+++ b/19_kernel_heap/kernel/src/cpu.rs
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Processor code.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "_arch/aarch64/cpu.rs"]
+mod arch_cpu;
+
+mod boot;
+
+pub mod smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_cpu::{nop, wait_forever};
+
+#[cfg(feature = "test_build")]
+pub use arch_cpu::{qemu_exit_failure, qemu_exit_success};
diff --git a/19_kernel_heap/kernel/src/cpu/boot.rs b/19_kernel_heap/kernel/src/cpu/boot.rs
new file mode 100644
index 000000000..8091dac36
--- /dev/null
+++ b/19_kernel_heap/kernel/src/cpu/boot.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Boot code.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/cpu/boot.rs"]
+mod arch_boot;
diff --git a/19_kernel_heap/kernel/src/cpu/smp.rs b/19_kernel_heap/kernel/src/cpu/smp.rs
new file mode 100644
index 000000000..57386f79b
--- /dev/null
+++ b/19_kernel_heap/kernel/src/cpu/smp.rs
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Symmetric multiprocessing.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/cpu/smp.rs"]
+mod arch_smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_smp::core_id;
diff --git a/19_kernel_heap/kernel/src/driver.rs b/19_kernel_heap/kernel/src/driver.rs
new file mode 100644
index 000000000..d884d4718
--- /dev/null
+++ b/19_kernel_heap/kernel/src/driver.rs
@@ -0,0 +1,57 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Driver support.
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Driver interfaces.
+pub mod interface {
+    use alloc::vec::Vec;
+
+    /// Device Driver functions.
+    pub trait DeviceDriver {
+        /// Return a compatibility string for identifying the driver.
+        fn compatible(&self) -> &'static str;
+
+        /// Called by the kernel to bring up the device.
+        ///
+        /// # Safety
+        ///
+        /// - During init, drivers might do stuff with system-wide impact.
+        unsafe fn init(&self) -> Result<(), &'static str> {
+            Ok(())
+        }
+
+        /// Called by the kernel to register and enable the device's IRQ handlers, if any.
+        ///
+        /// Rust's type system will prevent a call to this function unless the calling instance
+        /// itself has static lifetime.
+        fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
+            Ok(())
+        }
+    }
+
+    /// Device driver management functions.
+    ///
+    /// The `BSP` is supposed to supply one global instance.
+    pub trait DriverManager {
+        /// Instantiate all drivers.
+        ///
+        /// # Safety
+        ///
+        /// Must be called before `all_device_drivers`.
+        unsafe fn instantiate_drivers(&self) -> Result<(), &'static str>;
+
+        /// Return a vector of references to all `BSP`-instantiated drivers.
+        fn all_device_drivers(&self) -> &Vec<&(dyn DeviceDriver + Sync)>;
+
+        /// Minimal code needed to bring up the console in QEMU (for testing only). This is often
+        /// less steps than on real hardware due to QEMU's abstractions.
+        #[cfg(feature = "test_build")]
+        fn qemu_bring_up_console(&self);
+    }
+}
diff --git a/19_kernel_heap/kernel/src/exception.rs b/19_kernel_heap/kernel/src/exception.rs
new file mode 100644
index 000000000..f4af81444
--- /dev/null
+++ b/19_kernel_heap/kernel/src/exception.rs
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Synchronous and asynchronous exception handling.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "_arch/aarch64/exception.rs"]
+mod arch_exception;
+
+pub mod asynchronous;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_exception::{current_privilege_level, handling_init};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Kernel privilege levels.
+#[allow(missing_docs)]
+#[derive(PartialEq)]
+pub enum PrivilegeLevel {
+    User,
+    Kernel,
+    Hypervisor,
+    Unknown,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// Libkernel unit tests must execute in kernel mode.
+    #[kernel_test]
+    fn test_runner_executes_in_kernel_mode() {
+        let (level, _) = current_privilege_level();
+
+        assert!(level == PrivilegeLevel::Kernel)
+    }
+}
diff --git a/19_kernel_heap/kernel/src/exception/asynchronous.rs b/19_kernel_heap/kernel/src/exception/asynchronous.rs
new file mode 100644
index 000000000..d9d2767cf
--- /dev/null
+++ b/19_kernel_heap/kernel/src/exception/asynchronous.rs
@@ -0,0 +1,178 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Asynchronous exception handling.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/exception/asynchronous.rs"]
+mod arch_asynchronous;
+mod null_irq_manager;
+
+use crate::{bsp, synchronization};
+use core::{fmt, marker::PhantomData};
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_asynchronous::{
+    is_local_irq_masked, local_irq_mask, local_irq_mask_save, local_irq_restore, local_irq_unmask,
+    print_state,
+};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Interrupt descriptor.
+#[derive(Copy, Clone)]
+pub struct IRQDescriptor {
+    /// Descriptive name.
+    pub name: &'static str,
+
+    /// Reference to handler trait object.
+    pub handler: &'static (dyn interface::IRQHandler + Sync),
+}
+
+/// IRQContext token.
+///
+/// An instance of this type indicates that the local core is currently executing in IRQ
+/// context, aka executing an interrupt vector or subcalls of it.
+///
+/// Concept and implementation derived from the `CriticalSection` introduced in
+/// <https://github.com/rust-embedded/bare-metal>
+#[derive(Clone, Copy)]
+pub struct IRQContext<'irq_context> {
+    _0: PhantomData<&'irq_context ()>,
+}
+
+/// Asynchronous exception handling interfaces.
+pub mod interface {
+
+    /// Implemented by types that handle IRQs.
+    pub trait IRQHandler {
+        /// Called when the corresponding interrupt is asserted.
+        fn handle(&self) -> Result<(), &'static str>;
+    }
+
+    /// IRQ management functions.
+    ///
+    /// The `BSP` is supposed to supply one global instance. Typically implemented by the
+    /// platform's interrupt controller.
+    pub trait IRQManager {
+        /// The IRQ number type depends on the implementation.
+        type IRQNumberType;
+
+        /// Register a handler.
+        fn register_handler(
+            &self,
+            irq_number: Self::IRQNumberType,
+            descriptor: super::IRQDescriptor,
+        ) -> Result<(), &'static str>;
+
+        /// Enable an interrupt in the controller.
+        fn enable(&self, irq_number: Self::IRQNumberType);
+
+        /// Handle pending interrupts.
+        ///
+        /// This function is called directly from the CPU's IRQ exception vector. On AArch64,
+        /// this means that the respective CPU core has disabled exception handling.
+        /// This function can therefore not be preempted and runs start to finish.
+        ///
+        /// Takes an IRQContext token to ensure it can only be called from IRQ context.
+        #[allow(clippy::trivially_copy_pass_by_ref)]
+        fn handle_pending_irqs<'irq_context>(
+            &'irq_context self,
+            ic: &super::IRQContext<'irq_context>,
+        );
+
+        /// Print list of registered handlers.
+        fn print_handler(&self) {}
+    }
+}
+
+/// A wrapper type for IRQ numbers with integrated range sanity check.
+#[derive(Copy, Clone)]
+pub struct IRQNumber<const MAX_INCLUSIVE: usize>(usize);
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static CUR_IRQ_MANAGER: InitStateLock<
+    &'static (dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber> + Sync),
+> = InitStateLock::new(&null_irq_manager::NULL_IRQ_MANAGER);
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+use synchronization::{interface::ReadWriteEx, InitStateLock};
+
+impl<'irq_context> IRQContext<'irq_context> {
+    /// Creates an IRQContext token.
+    ///
+    /// # Safety
+    ///
+    /// - This must only be called when the current core is in an interrupt context and will not
+    ///   live beyond the end of it. That is, creation is allowed in interrupt vector functions. For
+    ///   example, in the ARMv8-A case, in `extern "C" fn current_elx_irq()`.
+    /// - Note that the lifetime `'irq_context` of the returned instance is unconstrained. User code
+    ///   must not be able to influence the lifetime picked for this type, since that might cause it
+    ///   to be inferred to `'static`.
+    #[inline(always)]
+    pub unsafe fn new() -> Self {
+        IRQContext { _0: PhantomData }
+    }
+}
+
+impl<const MAX_INCLUSIVE: usize> IRQNumber<{ MAX_INCLUSIVE }> {
+    /// Creates a new instance if number <= MAX_INCLUSIVE.
+    pub const fn new(number: usize) -> Self {
+        assert!(number <= MAX_INCLUSIVE);
+
+        Self(number)
+    }
+
+    /// Return the wrapped number.
+    pub const fn get(self) -> usize {
+        self.0
+    }
+}
+
+impl<const MAX_INCLUSIVE: usize> fmt::Display for IRQNumber<{ MAX_INCLUSIVE }> {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        write!(f, "{}", self.0)
+    }
+}
+
+/// Executes the provided closure while IRQs are masked on the executing core.
+///
+/// While the function temporarily changes the HW state of the executing core, it restores it to the
+/// previous state before returning, so this is deemed safe.
+#[inline(always)]
+pub fn exec_with_irq_masked<T>(f: impl FnOnce() -> T) -> T {
+    let ret: T;
+
+    unsafe {
+        let saved = local_irq_mask_save();
+        ret = f();
+        local_irq_restore(saved);
+    }
+
+    ret
+}
+
+/// Register a new IRQ manager.
+pub fn register_irq_manager(
+    new_manager: &'static (dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber>
+                  + Sync),
+) {
+    CUR_IRQ_MANAGER.write(|manager| *manager = new_manager);
+}
+
+/// Return a reference to the currently registered IRQ manager.
+///
+/// This is the IRQ manager used by the architectural interrupt handling code.
+pub fn irq_manager() -> &'static dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber> {
+    CUR_IRQ_MANAGER.read(|manager| *manager)
+}
diff --git a/19_kernel_heap/kernel/src/exception/asynchronous/null_irq_manager.rs b/19_kernel_heap/kernel/src/exception/asynchronous/null_irq_manager.rs
new file mode 100644
index 000000000..560e3ce4b
--- /dev/null
+++ b/19_kernel_heap/kernel/src/exception/asynchronous/null_irq_manager.rs
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Null IRQ Manager.
+
+use super::{interface, IRQContext, IRQDescriptor};
+use crate::bsp;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct NullIRQManager;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+pub static NULL_IRQ_MANAGER: NullIRQManager = NullIRQManager {};
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl interface::IRQManager for NullIRQManager {
+    type IRQNumberType = bsp::driver::IRQNumber;
+
+    fn register_handler(
+        &self,
+        _irq_number: Self::IRQNumberType,
+        _descriptor: IRQDescriptor,
+    ) -> Result<(), &'static str> {
+        panic!("No IRQ Manager registered yet");
+    }
+
+    fn enable(&self, _irq_number: Self::IRQNumberType) {
+        panic!("No IRQ Manager registered yet");
+    }
+
+    fn handle_pending_irqs<'irq_context>(&'irq_context self, _ic: &IRQContext<'irq_context>) {
+        panic!("No IRQ Manager registered yet");
+    }
+}
diff --git a/19_kernel_heap/kernel/src/lib.rs b/19_kernel_heap/kernel/src/lib.rs
new file mode 100644
index 000000000..20dc3bfde
--- /dev/null
+++ b/19_kernel_heap/kernel/src/lib.rs
@@ -0,0 +1,195 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+// Rust embedded logo for `make doc`.
+#![doc(
+    html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png"
+)]
+
+//! The `kernel` library.
+//!
+//! Used to compose the final kernel binary.
+//!
+//! # Code organization and architecture
+//!
+//! The code is divided into different *modules*, each representing a typical **subsystem** of the
+//! `kernel`. Top-level module files of subsystems reside directly in the `src` folder. For example,
+//! `src/memory.rs` contains code that is concerned with all things memory management.
+//!
+//! ## Visibility of processor architecture code
+//!
+//! Some of the `kernel`'s subsystems depend on low-level code that is specific to the target
+//! processor architecture. For each supported processor architecture, there exists a subfolder in
+//! `src/_arch`, for example, `src/_arch/aarch64`.
+//!
+//! The architecture folders mirror the subsystem modules laid out in `src`. For example,
+//! architectural code that belongs to the `kernel`'s MMU subsystem (`src/memory/mmu.rs`) would go
+//! into `src/_arch/aarch64/memory/mmu.rs`. The latter file is loaded as a module in
+//! `src/memory/mmu.rs` using the `path attribute`. Usually, the chosen module name is the generic
+//! module's name prefixed with `arch_`.
+//!
+//! For example, this is the top of `src/memory/mmu.rs`:
+//!
+//! ```
+//! #[cfg(target_arch = "aarch64")]
+//! #[path = "../_arch/aarch64/memory/mmu.rs"]
+//! mod arch_mmu;
+//! ```
+//!
+//! Often times, items from the `arch_ module` will be publicly reexported by the parent module.
+//! This way, each architecture specific module can provide its implementation of an item, while the
+//! caller must not be concerned which architecture has been conditionally compiled.
+//!
+//! ## BSP code
+//!
+//! `BSP` stands for Board Support Package. `BSP` code is organized under `src/bsp.rs` and contains
+//! target board specific definitions and functions. These are things such as the board's memory map
+//! or instances of drivers for devices that are featured on the respective board.
+//!
+//! Just like processor architecture code, the `BSP` code's module structure tries to mirror the
+//! `kernel`'s subsystem modules, but there is no reexporting this time. That means whatever is
+//! provided must be called starting from the `bsp` namespace, e.g. `bsp::driver::driver_manager()`.
+//!
+//! ## Kernel interfaces
+//!
+//! Both `arch` and `bsp` contain code that is conditionally compiled depending on the actual target
+//! and board for which the kernel is compiled. For example, the `interrupt controller` hardware of
+//! the `Raspberry Pi 3` and the `Raspberry Pi 4` is different, but we want the rest of the `kernel`
+//! code to play nicely with any of the two without much hassle.
+//!
+//! In order to provide a clean abstraction between `arch`, `bsp` and `generic kernel code`,
+//! `interface` traits are provided *whenever possible* and *where it makes sense*. They are defined
+//! in the respective subsystem module and help to enforce the idiom of *program to an interface,
+//! not an implementation*. For example, there will be a common IRQ handling interface which the two
+//! different interrupt controller `drivers` of both Raspberrys will implement, and only export the
+//! interface to the rest of the `kernel`.
+//!
+//! ```
+//!         +-------------------+
+//!         | Interface (Trait) |
+//!         |                   |
+//!         +--+-------------+--+
+//!            ^             ^
+//!            |             |
+//!            |             |
+//! +----------+--+       +--+----------+
+//! | kernel code |       |  bsp code   |
+//! |             |       |  arch code  |
+//! +-------------+       +-------------+
+//! ```
+//!
+//! # Summary
+//!
+//! For a logical `kernel` subsystem, corresponding code can be distributed over several physical
+//! locations. Here is an example for the **memory** subsystem:
+//!
+//! - `src/memory.rs` and `src/memory/**/*`
+//!   - Common code that is agnostic of target processor architecture and `BSP` characteristics.
+//!     - Example: A function to zero a chunk of memory.
+//!   - Interfaces for the memory subsystem that are implemented by `arch` or `BSP` code.
+//!     - Example: An `MMU` interface that defines `MMU` function prototypes.
+//! - `src/bsp/__board_name__/memory.rs` and `src/bsp/__board_name__/memory/**/*`
+//!   - `BSP` specific code.
+//!   - Example: The board's memory map (physical addresses of DRAM and MMIO devices).
+//! - `src/_arch/__arch_name__/memory.rs` and `src/_arch/__arch_name__/memory/**/*`
+//!   - Processor architecture specific code.
+//!   - Example: Implementation of the `MMU` interface for the `__arch_name__` processor
+//!     architecture.
+//!
+//! From a namespace perspective, **memory** subsystem code lives in:
+//!
+//! - `crate::memory::*`
+//! - `crate::bsp::memory::*`
+//!
+//! # Boot flow
+//!
+//! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
+//! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
+
+#![allow(clippy::upper_case_acronyms)]
+#![allow(incomplete_features)]
+#![feature(alloc_error_handler)]
+#![feature(asm_const)]
+#![feature(core_intrinsics)]
+#![feature(format_args_nl)]
+#![feature(generic_const_exprs)]
+#![feature(int_roundings)]
+#![feature(is_sorted)]
+#![feature(linkage)]
+#![feature(panic_info_message)]
+#![feature(step_trait)]
+#![feature(trait_alias)]
+#![no_std]
+// Testing
+#![cfg_attr(test, no_main)]
+#![feature(custom_test_frameworks)]
+#![reexport_test_harness_main = "test_main"]
+#![test_runner(crate::test_runner)]
+
+extern crate alloc;
+
+mod panic_wait;
+mod synchronization;
+
+pub mod backtrace;
+pub mod bsp;
+pub mod common;
+pub mod console;
+pub mod cpu;
+pub mod driver;
+pub mod exception;
+pub mod memory;
+pub mod print;
+pub mod state;
+pub mod symbols;
+pub mod time;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Version string.
+pub fn version() -> &'static str {
+    concat!(
+        env!("CARGO_PKG_NAME"),
+        " version ",
+        env!("CARGO_PKG_VERSION")
+    )
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+/// The default runner for unit tests.
+pub fn test_runner(tests: &[&test_types::UnitTest]) {
+    // This line will be printed as the test header.
+    println!("Running {} tests", tests.len());
+
+    for (i, test) in tests.iter().enumerate() {
+        print!("{:>3}. {:.<58}", i + 1, test.name);
+
+        // Run the actual test.
+        (test.test_func)();
+
+        // Failed tests call panic!(). Execution reaches here only if the test has passed.
+        println!("[ok]")
+    }
+}
+
+/// The `kernel_init()` for unit tests.
+#[cfg(test)]
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
+    exception::handling_init();
+    memory::init();
+    bsp::driver::driver_manager().qemu_bring_up_console();
+
+    test_main();
+
+    cpu::qemu_exit_success()
+}
diff --git a/19_kernel_heap/kernel/src/main.rs b/19_kernel_heap/kernel/src/main.rs
new file mode 100644
index 000000000..d2044c291
--- /dev/null
+++ b/19_kernel_heap/kernel/src/main.rs
@@ -0,0 +1,102 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+// Rust embedded logo for `make doc`.
+#![doc(
+    html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png"
+)]
+
+//! The `kernel` binary.
+
+#![feature(format_args_nl)]
+#![no_main]
+#![no_std]
+
+extern crate alloc;
+
+use libkernel::{bsp, cpu, driver, exception, info, memory, state, time, warn};
+
+/// Early init code.
+///
+/// When this code runs, virtual memory is already enabled.
+///
+/// # Safety
+///
+/// - Only a single core must be active and running this function.
+/// - Printing will not work until the respective driver's MMIO is remapped.
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
+    exception::handling_init();
+    memory::init();
+
+    // Instantiate and init all device drivers.
+    if let Err(x) = bsp::driver::driver_manager().instantiate_drivers() {
+        panic!("Error instantiating drivers: {}", x);
+    }
+    for i in bsp::driver::driver_manager().all_device_drivers().iter() {
+        if let Err(x) = i.init() {
+            panic!("Error loading driver: {}: {}", i.compatible(), x);
+        }
+    }
+
+    // Let device drivers register and enable their handlers with the interrupt controller.
+    for i in bsp::driver::driver_manager().all_device_drivers() {
+        if let Err(msg) = i.register_and_enable_irq_handler() {
+            warn!("Error registering IRQ handler: {}", msg);
+        }
+    }
+
+    bsp::memory::mmu::kernel_add_mapping_records_for_precomputed();
+
+    // Unmask interrupts on the boot CPU core.
+    exception::asynchronous::local_irq_unmask();
+
+    // Announce conclusion of the kernel_init() phase.
+    state::state_manager().transition_to_single_core_main();
+
+    // Transition from unsafe to safe.
+    kernel_main()
+}
+
+/// The main function running after the early init.
+fn kernel_main() -> ! {
+    use driver::interface::DriverManager;
+
+    info!("{}", libkernel::version());
+    info!("Booting on: {}", bsp::board_name());
+
+    info!("MMU online:");
+    memory::mmu::kernel_print_mappings();
+
+    let (_, privilege_level) = exception::current_privilege_level();
+    info!("Current privilege level: {}", privilege_level);
+
+    info!("Exception handling state:");
+    exception::asynchronous::print_state();
+
+    info!(
+        "Architectural timer resolution: {} ns",
+        time::time_manager().resolution().as_nanos()
+    );
+
+    info!("Drivers loaded:");
+    for (i, driver) in bsp::driver::driver_manager()
+        .all_device_drivers()
+        .iter()
+        .enumerate()
+    {
+        info!("      {}. {}", i + 1, driver.compatible());
+    }
+
+    info!("Registered IRQ handlers:");
+    exception::asynchronous::irq_manager().print_handler();
+
+    info!("Kernel heap:");
+    memory::heap_alloc::kernel_heap_allocator().print_usage();
+
+    info!("Echoing input now");
+    cpu::wait_forever();
+}
diff --git a/19_kernel_heap/kernel/src/memory.rs b/19_kernel_heap/kernel/src/memory.rs
new file mode 100644
index 000000000..a64bfbae8
--- /dev/null
+++ b/19_kernel_heap/kernel/src/memory.rs
@@ -0,0 +1,198 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Memory Management.
+
+pub mod heap_alloc;
+pub mod mmu;
+
+use crate::{bsp, common};
+use core::{
+    fmt,
+    marker::PhantomData,
+    ops::{Add, Sub},
+};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Metadata trait for marking the type of an address.
+pub trait AddressType: Copy + Clone + PartialOrd + PartialEq + Ord + Eq {}
+
+/// Zero-sized type to mark a physical address.
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq, Ord, Eq)]
+pub enum Physical {}
+
+/// Zero-sized type to mark a virtual address.
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq, Ord, Eq)]
+pub enum Virtual {}
+
+/// Generic address type.
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq, Ord, Eq)]
+pub struct Address<ATYPE: AddressType> {
+    value: usize,
+    _address_type: PhantomData<fn() -> ATYPE>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl AddressType for Physical {}
+impl AddressType for Virtual {}
+
+impl<ATYPE: AddressType> Address<ATYPE> {
+    /// Create an instance.
+    pub const fn new(value: usize) -> Self {
+        Self {
+            value,
+            _address_type: PhantomData,
+        }
+    }
+
+    /// Convert to usize.
+    pub const fn as_usize(self) -> usize {
+        self.value
+    }
+
+    /// Align down to page size.
+    #[must_use]
+    pub const fn align_down_page(self) -> Self {
+        let aligned = common::align_down(self.value, bsp::memory::mmu::KernelGranule::SIZE);
+
+        Self::new(aligned)
+    }
+
+    /// Align up to page size.
+    #[must_use]
+    pub const fn align_up_page(self) -> Self {
+        let aligned = common::align_up(self.value, bsp::memory::mmu::KernelGranule::SIZE);
+
+        Self::new(aligned)
+    }
+
+    /// Checks if the address is page aligned.
+    pub const fn is_page_aligned(&self) -> bool {
+        common::is_aligned(self.value, bsp::memory::mmu::KernelGranule::SIZE)
+    }
+
+    /// Return the address' offset into the corresponding page.
+    pub const fn offset_into_page(&self) -> usize {
+        self.value & bsp::memory::mmu::KernelGranule::MASK
+    }
+}
+
+impl<ATYPE: AddressType> Add<usize> for Address<ATYPE> {
+    type Output = Self;
+
+    #[inline(always)]
+    fn add(self, rhs: usize) -> Self::Output {
+        match self.value.checked_add(rhs) {
+            None => panic!("Overflow on Address::add"),
+            Some(x) => Self::new(x),
+        }
+    }
+}
+
+impl<ATYPE: AddressType> Sub<usize> for Address<ATYPE> {
+    type Output = Self;
+
+    #[inline(always)]
+    fn sub(self, rhs: usize) -> Self::Output {
+        match self.value.checked_sub(rhs) {
+            None => panic!("Overflow on Address::sub"),
+            Some(x) => Self::new(x),
+        }
+    }
+}
+
+impl<ATYPE: AddressType> Sub<Address<ATYPE>> for Address<ATYPE> {
+    type Output = Self;
+
+    #[inline(always)]
+    fn sub(self, rhs: Address<ATYPE>) -> Self::Output {
+        match self.value.checked_sub(rhs.value) {
+            None => panic!("Overflow on Address::sub"),
+            Some(x) => Self::new(x),
+        }
+    }
+}
+
+impl Address<Virtual> {
+    /// Checks if the address is part of the boot core stack region.
+    pub fn is_valid_stack_addr(&self) -> bool {
+        bsp::memory::mmu::virt_boot_core_stack_region().contains(*self)
+    }
+
+    /// Checks if the address is part of the kernel code region.
+    pub fn is_valid_code_addr(&self) -> bool {
+        bsp::memory::mmu::virt_code_region().contains(*self)
+    }
+}
+
+impl fmt::Display for Address<Physical> {
+    // Don't expect to see physical addresses greater than 40 bit.
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        let q3: u8 = ((self.value >> 32) & 0xff) as u8;
+        let q2: u16 = ((self.value >> 16) & 0xffff) as u16;
+        let q1: u16 = (self.value & 0xffff) as u16;
+
+        write!(f, "0x")?;
+        write!(f, "{:02x}_", q3)?;
+        write!(f, "{:04x}_", q2)?;
+        write!(f, "{:04x}", q1)
+    }
+}
+
+impl fmt::Display for Address<Virtual> {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        let q4: u16 = ((self.value >> 48) & 0xffff) as u16;
+        let q3: u16 = ((self.value >> 32) & 0xffff) as u16;
+        let q2: u16 = ((self.value >> 16) & 0xffff) as u16;
+        let q1: u16 = (self.value & 0xffff) as u16;
+
+        write!(f, "0x")?;
+        write!(f, "{:04x}_", q4)?;
+        write!(f, "{:04x}_", q3)?;
+        write!(f, "{:04x}_", q2)?;
+        write!(f, "{:04x}", q1)
+    }
+}
+
+/// Initialize the memory subsystem.
+pub fn init() {
+    mmu::kernel_init_mmio_va_allocator();
+    heap_alloc::kernel_init_heap_allocator();
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// Sanity of [Address] methods.
+    #[kernel_test]
+    fn address_type_method_sanity() {
+        let addr = Address::<Virtual>::new(bsp::memory::mmu::KernelGranule::SIZE + 100);
+
+        assert_eq!(
+            addr.align_down_page().as_usize(),
+            bsp::memory::mmu::KernelGranule::SIZE
+        );
+
+        assert_eq!(
+            addr.align_up_page().as_usize(),
+            bsp::memory::mmu::KernelGranule::SIZE * 2
+        );
+
+        assert!(!addr.is_page_aligned());
+
+        assert_eq!(addr.offset_into_page(), 100);
+    }
+}
diff --git a/19_kernel_heap/kernel/src/memory/heap_alloc.rs b/19_kernel_heap/kernel/src/memory/heap_alloc.rs
new file mode 100644
index 000000000..81a5009c4
--- /dev/null
+++ b/19_kernel_heap/kernel/src/memory/heap_alloc.rs
@@ -0,0 +1,137 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Heap allocation.
+
+use crate::{
+    backtrace, bsp, common, debug, info,
+    memory::{Address, Virtual},
+    synchronization,
+    synchronization::IRQSafeNullLock,
+};
+use alloc::alloc::{GlobalAlloc, Layout};
+use linked_list_allocator::Heap as LinkedListHeap;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// A heap allocator that can be lazyily initialized.
+pub struct HeapAllocator {
+    inner: IRQSafeNullLock<LinkedListHeap>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+#[global_allocator]
+static KERNEL_HEAP_ALLOCATOR: HeapAllocator = HeapAllocator::new();
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+#[inline(always)]
+fn debug_print_alloc_dealloc(operation: &'static str, ptr: *mut u8, layout: Layout) {
+    let size = layout.size();
+    let (size_h, size_unit) = common::size_human_readable_ceil(size);
+    let addr = Address::<Virtual>::new(ptr as usize);
+
+    debug!(
+        "Kernel Heap: {}\n      \
+        Size:     {:#x} ({} {})\n      \
+        Start:    {}\n      \
+        End excl: {}\n\n      \
+        {}",
+        operation,
+        size,
+        size_h,
+        size_unit,
+        addr,
+        addr + size,
+        backtrace::Backtrace
+    );
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+use synchronization::interface::Mutex;
+
+#[alloc_error_handler]
+fn alloc_error_handler(layout: Layout) -> ! {
+    panic!("Allocation error: {:?}", layout)
+}
+
+/// Return a reference to the kernel's heap allocator.
+pub fn kernel_heap_allocator() -> &'static HeapAllocator {
+    &KERNEL_HEAP_ALLOCATOR
+}
+
+impl HeapAllocator {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self {
+            inner: IRQSafeNullLock::new(LinkedListHeap::empty()),
+        }
+    }
+
+    /// Print the current heap usage.
+    pub fn print_usage(&self) {
+        let (used, free) = KERNEL_HEAP_ALLOCATOR
+            .inner
+            .lock(|inner| (inner.used(), inner.free()));
+
+        if used >= 1024 {
+            let (used_h, used_unit) = common::size_human_readable_ceil(used);
+            info!("      Used: {} Byte ({} {})", used, used_h, used_unit);
+        } else {
+            info!("      Used: {} Byte", used);
+        }
+
+        if free >= 1024 {
+            let (free_h, free_unit) = common::size_human_readable_ceil(free);
+            info!("      Free: {} Byte ({} {})", free, free_h, free_unit);
+        } else {
+            info!("      Free: {} Byte", free);
+        }
+    }
+}
+
+unsafe impl GlobalAlloc for HeapAllocator {
+    unsafe fn alloc(&self, layout: Layout) -> *mut u8 {
+        let result = KERNEL_HEAP_ALLOCATOR
+            .inner
+            .lock(|inner| inner.allocate_first_fit(layout).ok());
+
+        match result {
+            None => core::ptr::null_mut(),
+            Some(allocation) => {
+                let ptr = allocation.as_ptr();
+
+                debug_print_alloc_dealloc("Allocation", ptr, layout);
+
+                ptr
+            }
+        }
+    }
+
+    unsafe fn dealloc(&self, ptr: *mut u8, layout: Layout) {
+        KERNEL_HEAP_ALLOCATOR
+            .inner
+            .lock(|inner| inner.deallocate(core::ptr::NonNull::new_unchecked(ptr), layout));
+
+        debug_print_alloc_dealloc("Free", ptr, layout);
+    }
+}
+
+/// Query the BSP for the heap region and initialize the kernel's heap allocator with it.
+pub fn kernel_init_heap_allocator() {
+    let region = bsp::memory::mmu::virt_heap_region();
+
+    KERNEL_HEAP_ALLOCATOR
+        .inner
+        .lock(|inner| unsafe { inner.init(region.start_addr().as_usize(), region.size()) });
+}
diff --git a/19_kernel_heap/kernel/src/memory/mmu.rs b/19_kernel_heap/kernel/src/memory/mmu.rs
new file mode 100644
index 000000000..8d204a4ef
--- /dev/null
+++ b/19_kernel_heap/kernel/src/memory/mmu.rs
@@ -0,0 +1,262 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Memory Management Unit.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/memory/mmu.rs"]
+mod arch_mmu;
+
+mod mapping_record;
+mod page_alloc;
+mod translation_table;
+mod types;
+
+use crate::{
+    bsp,
+    memory::{Address, Physical, Virtual},
+    synchronization::{self, interface::Mutex},
+};
+use core::{fmt, num::NonZeroUsize};
+
+pub use types::*;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// MMU enable errors variants.
+#[allow(missing_docs)]
+#[derive(Debug)]
+pub enum MMUEnableError {
+    AlreadyEnabled,
+    Other(&'static str),
+}
+
+/// Memory Management interfaces.
+pub mod interface {
+    use super::*;
+
+    /// MMU functions.
+    pub trait MMU {
+        /// Turns on the MMU for the first time and enables data and instruction caching.
+        ///
+        /// # Safety
+        ///
+        /// - Changes the HW's global state.
+        unsafe fn enable_mmu_and_caching(
+            &self,
+            phys_tables_base_addr: Address<Physical>,
+        ) -> Result<(), MMUEnableError>;
+
+        /// Returns true if the MMU is enabled, false otherwise.
+        fn is_enabled(&self) -> bool;
+    }
+}
+
+/// Describes the characteristics of a translation granule.
+pub struct TranslationGranule<const GRANULE_SIZE: usize>;
+
+/// Describes properties of an address space.
+pub struct AddressSpace<const AS_SIZE: usize>;
+
+/// Intended to be implemented for [`AddressSpace`].
+pub trait AssociatedTranslationTable {
+    /// A translation table whose address range is:
+    ///
+    /// [u64::MAX, (u64::MAX - AS_SIZE) + 1]
+    type TableStartFromTop;
+
+    /// A translation table whose address range is:
+    ///
+    /// [AS_SIZE - 1, 0]
+    type TableStartFromBottom;
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+use interface::MMU;
+use synchronization::interface::ReadWriteEx;
+use translation_table::interface::TranslationTable;
+
+/// Map a region in the kernel's translation tables.
+///
+/// No input checks done, input is passed through to the architectural implementation.
+///
+/// # Safety
+///
+/// - See `map_at()`.
+/// - Does not prevent aliasing.
+unsafe fn kernel_map_at_unchecked(
+    name: &'static str,
+    virt_region: &MemoryRegion<Virtual>,
+    phys_region: &MemoryRegion<Physical>,
+    attr: &AttributeFields,
+) -> Result<(), &'static str> {
+    bsp::memory::mmu::kernel_translation_tables()
+        .write(|tables| tables.map_at(virt_region, phys_region, attr))?;
+
+    kernel_add_mapping_record(name, virt_region, phys_region, attr);
+
+    Ok(())
+}
+
+/// Try to translate a kernel virtual address to a physical address.
+///
+/// Will only succeed if there exists a valid mapping for the input address.
+fn try_kernel_virt_addr_to_phys_addr(
+    virt_addr: Address<Virtual>,
+) -> Result<Address<Physical>, &'static str> {
+    bsp::memory::mmu::kernel_translation_tables()
+        .read(|tables| tables.try_virt_addr_to_phys_addr(virt_addr))
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl fmt::Display for MMUEnableError {
+    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+        match self {
+            MMUEnableError::AlreadyEnabled => write!(f, "MMU is already enabled"),
+            MMUEnableError::Other(x) => write!(f, "{}", x),
+        }
+    }
+}
+
+impl<const GRANULE_SIZE: usize> TranslationGranule<GRANULE_SIZE> {
+    /// The granule's size.
+    pub const SIZE: usize = Self::size_checked();
+
+    /// The granule's mask.
+    pub const MASK: usize = Self::SIZE - 1;
+
+    /// The granule's shift, aka log2(size).
+    pub const SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
+
+    const fn size_checked() -> usize {
+        assert!(GRANULE_SIZE.is_power_of_two());
+
+        GRANULE_SIZE
+    }
+}
+
+impl<const AS_SIZE: usize> AddressSpace<AS_SIZE> {
+    /// The address space size.
+    pub const SIZE: usize = Self::size_checked();
+
+    /// The address space shift, aka log2(size).
+    pub const SIZE_SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
+
+    const fn size_checked() -> usize {
+        assert!(AS_SIZE.is_power_of_two());
+
+        // Check for architectural restrictions as well.
+        Self::arch_address_space_size_sanity_checks();
+
+        AS_SIZE
+    }
+}
+
+/// Query the BSP for the reserved virtual addresses for MMIO remapping and initialize the kernel's
+/// MMIO VA allocator with it.
+pub fn kernel_init_mmio_va_allocator() {
+    let region = bsp::memory::mmu::virt_mmio_remap_region();
+
+    page_alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.init(region));
+}
+
+/// Add an entry to the mapping info record.
+pub fn kernel_add_mapping_record(
+    name: &'static str,
+    virt_region: &MemoryRegion<Virtual>,
+    phys_region: &MemoryRegion<Physical>,
+    attr: &AttributeFields,
+) {
+    mapping_record::kernel_add(name, virt_region, phys_region, attr);
+}
+
+/// MMIO remapping in the kernel translation tables.
+///
+/// Typically used by device drivers.
+///
+/// # Safety
+///
+/// - Same as `kernel_map_at_unchecked()`, minus the aliasing part.
+pub unsafe fn kernel_map_mmio(
+    name: &'static str,
+    mmio_descriptor: &MMIODescriptor,
+) -> Result<Address<Virtual>, &'static str> {
+    let phys_region = MemoryRegion::from(*mmio_descriptor);
+    let offset_into_start_page = mmio_descriptor.start_addr().offset_into_page();
+
+    // Check if an identical region has been mapped for another driver. If so, reuse it.
+    let virt_addr = if let Some(addr) =
+        mapping_record::kernel_find_and_insert_mmio_duplicate(mmio_descriptor, name)
+    {
+        addr
+    // Otherwise, allocate a new region and map it.
+    } else {
+        let num_pages = match NonZeroUsize::new(phys_region.num_pages()) {
+            None => return Err("Requested 0 pages"),
+            Some(x) => x,
+        };
+
+        let virt_region =
+            page_alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.alloc(num_pages))?;
+
+        kernel_map_at_unchecked(
+            name,
+            &virt_region,
+            &phys_region,
+            &AttributeFields {
+                mem_attributes: MemAttributes::Device,
+                acc_perms: AccessPermissions::ReadWrite,
+                execute_never: true,
+            },
+        )?;
+
+        virt_region.start_addr()
+    };
+
+    Ok(virt_addr + offset_into_start_page)
+}
+
+/// Try to translate a kernel virtual page address to a physical page address.
+///
+/// Will only succeed if there exists a valid mapping for the input page.
+pub fn try_kernel_virt_page_addr_to_phys_page_addr(
+    virt_page_addr: PageAddress<Virtual>,
+) -> Result<PageAddress<Physical>, &'static str> {
+    bsp::memory::mmu::kernel_translation_tables()
+        .read(|tables| tables.try_virt_page_addr_to_phys_page_addr(virt_page_addr))
+}
+
+/// Try to get the attributes of a kernel page.
+///
+/// Will only succeed if there exists a valid mapping for the input page.
+pub fn try_kernel_page_attributes(
+    virt_page_addr: PageAddress<Virtual>,
+) -> Result<AttributeFields, &'static str> {
+    bsp::memory::mmu::kernel_translation_tables()
+        .read(|tables| tables.try_page_attributes(virt_page_addr))
+}
+
+/// Human-readable print of all recorded kernel mappings.
+pub fn kernel_print_mappings() {
+    mapping_record::kernel_print()
+}
+
+/// Enable the MMU and data + instruction caching.
+///
+/// # Safety
+///
+/// - Crucial function during kernel init. Changes the the complete memory view of the processor.
+#[inline(always)]
+pub unsafe fn enable_mmu_and_caching(
+    phys_tables_base_addr: Address<Physical>,
+) -> Result<(), MMUEnableError> {
+    arch_mmu::mmu().enable_mmu_and_caching(phys_tables_base_addr)
+}
diff --git a/19_kernel_heap/kernel/src/memory/mmu/mapping_record.rs b/19_kernel_heap/kernel/src/memory/mmu/mapping_record.rs
new file mode 100644
index 000000000..4e9395da4
--- /dev/null
+++ b/19_kernel_heap/kernel/src/memory/mmu/mapping_record.rs
@@ -0,0 +1,204 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! A record of mapped pages.
+
+use super::{
+    AccessPermissions, Address, AttributeFields, MMIODescriptor, MemAttributes, MemoryRegion,
+    Physical, Virtual,
+};
+use crate::{bsp, common, info, synchronization, synchronization::InitStateLock};
+use alloc::{vec, vec::Vec};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Type describing a virtual memory mapping.
+#[allow(missing_docs)]
+struct MappingRecordEntry {
+    pub users: Vec<&'static str>,
+    pub phys_start_addr: Address<Physical>,
+    pub virt_start_addr: Address<Virtual>,
+    pub num_pages: usize,
+    pub attribute_fields: AttributeFields,
+}
+
+struct MappingRecord {
+    inner: Vec<MappingRecordEntry>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static KERNEL_MAPPING_RECORD: InitStateLock<MappingRecord> =
+    InitStateLock::new(MappingRecord::new());
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl MappingRecordEntry {
+    pub fn new(
+        name: &'static str,
+        virt_region: &MemoryRegion<Virtual>,
+        phys_region: &MemoryRegion<Physical>,
+        attr: &AttributeFields,
+    ) -> Self {
+        Self {
+            users: vec![name],
+            phys_start_addr: phys_region.start_addr(),
+            virt_start_addr: virt_region.start_addr(),
+            num_pages: phys_region.num_pages(),
+            attribute_fields: *attr,
+        }
+    }
+
+    pub fn add_user(&mut self, user: &'static str) {
+        self.users.push(user);
+    }
+}
+
+impl MappingRecord {
+    pub const fn new() -> Self {
+        Self { inner: Vec::new() }
+    }
+
+    fn sort(&mut self) {
+        if !self.inner.is_sorted_by_key(|item| item.virt_start_addr) {
+            self.inner.sort_unstable_by_key(|item| item.virt_start_addr)
+        }
+    }
+
+    fn find_duplicate(
+        &mut self,
+        phys_region: &MemoryRegion<Physical>,
+    ) -> Option<&mut MappingRecordEntry> {
+        self.inner
+            .iter_mut()
+            .filter(|x| x.attribute_fields.mem_attributes == MemAttributes::Device)
+            .find(|x| {
+                if x.phys_start_addr != phys_region.start_addr() {
+                    return false;
+                }
+
+                if x.num_pages != phys_region.num_pages() {
+                    return false;
+                }
+
+                true
+            })
+    }
+
+    pub fn add(
+        &mut self,
+        name: &'static str,
+        virt_region: &MemoryRegion<Virtual>,
+        phys_region: &MemoryRegion<Physical>,
+        attr: &AttributeFields,
+    ) {
+        self.inner.push(MappingRecordEntry::new(
+            name,
+            virt_region,
+            phys_region,
+            attr,
+        ));
+
+        self.sort();
+    }
+
+    pub fn print(&self) {
+        info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
+        info!(
+            "      {:^44}     {:^30}   {:^7}   {:^9}   {:^35}",
+            "Virtual", "Physical", "Size", "Attr", "Entity"
+        );
+        info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
+
+        for i in self.inner.iter() {
+            let size = i.num_pages * bsp::memory::mmu::KernelGranule::SIZE;
+            let virt_start = i.virt_start_addr;
+            let virt_end_inclusive = virt_start + (size - 1);
+            let phys_start = i.phys_start_addr;
+            let phys_end_inclusive = phys_start + (size - 1);
+
+            let (size, unit) = common::size_human_readable_ceil(size);
+
+            let attr = match i.attribute_fields.mem_attributes {
+                MemAttributes::CacheableDRAM => "C",
+                MemAttributes::Device => "Dev",
+            };
+
+            let acc_p = match i.attribute_fields.acc_perms {
+                AccessPermissions::ReadOnly => "RO",
+                AccessPermissions::ReadWrite => "RW",
+            };
+
+            let xn = if i.attribute_fields.execute_never {
+                "XN"
+            } else {
+                "X"
+            };
+
+            info!(
+                "      {}..{} --> {}..{} | {:>3} {} | {:<3} {} {:<2} | {}",
+                virt_start,
+                virt_end_inclusive,
+                phys_start,
+                phys_end_inclusive,
+                size,
+                unit,
+                attr,
+                acc_p,
+                xn,
+                i.users[0]
+            );
+
+            for k in &i.users[1..] {
+                info!(
+                        "                                                                                                            | {}",
+                        k
+                    );
+            }
+        }
+
+        info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+use synchronization::interface::ReadWriteEx;
+
+/// Add an entry to the mapping info record.
+pub fn kernel_add(
+    name: &'static str,
+    virt_region: &MemoryRegion<Virtual>,
+    phys_region: &MemoryRegion<Physical>,
+    attr: &AttributeFields,
+) {
+    KERNEL_MAPPING_RECORD.write(|mr| mr.add(name, virt_region, phys_region, attr))
+}
+
+pub fn kernel_find_and_insert_mmio_duplicate(
+    mmio_descriptor: &MMIODescriptor,
+    new_user: &'static str,
+) -> Option<Address<Virtual>> {
+    let phys_region: MemoryRegion<Physical> = (*mmio_descriptor).into();
+
+    KERNEL_MAPPING_RECORD.write(|mr| {
+        let dup = mr.find_duplicate(&phys_region)?;
+
+        dup.add_user(new_user);
+
+        Some(dup.virt_start_addr)
+    })
+}
+
+/// Human-readable print of all recorded kernel mappings.
+pub fn kernel_print() {
+    KERNEL_MAPPING_RECORD.read(|mr| mr.print());
+}
diff --git a/19_kernel_heap/kernel/src/memory/mmu/page_alloc.rs b/19_kernel_heap/kernel/src/memory/mmu/page_alloc.rs
new file mode 100644
index 000000000..347fcd343
--- /dev/null
+++ b/19_kernel_heap/kernel/src/memory/mmu/page_alloc.rs
@@ -0,0 +1,70 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Page allocation.
+
+use super::MemoryRegion;
+use crate::{
+    memory::{AddressType, Virtual},
+    synchronization::IRQSafeNullLock,
+    warn,
+};
+use core::num::NonZeroUsize;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// A page allocator that can be lazyily initialized.
+pub struct PageAllocator<ATYPE: AddressType> {
+    pool: Option<MemoryRegion<ATYPE>>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static KERNEL_MMIO_VA_ALLOCATOR: IRQSafeNullLock<PageAllocator<Virtual>> =
+    IRQSafeNullLock::new(PageAllocator::new());
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the kernel's MMIO virtual address allocator.
+pub fn kernel_mmio_va_allocator() -> &'static IRQSafeNullLock<PageAllocator<Virtual>> {
+    &KERNEL_MMIO_VA_ALLOCATOR
+}
+
+impl<ATYPE: AddressType> PageAllocator<ATYPE> {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self { pool: None }
+    }
+
+    /// Initialize the allocator.
+    pub fn init(&mut self, pool: MemoryRegion<ATYPE>) {
+        if self.pool.is_some() {
+            warn!("Already initialized");
+            return;
+        }
+
+        self.pool = Some(pool);
+    }
+
+    /// Allocate a number of pages.
+    pub fn alloc(
+        &mut self,
+        num_requested_pages: NonZeroUsize,
+    ) -> Result<MemoryRegion<ATYPE>, &'static str> {
+        if self.pool.is_none() {
+            return Err("Allocator not initialized");
+        }
+
+        self.pool
+            .as_mut()
+            .unwrap()
+            .take_first_n_pages(num_requested_pages)
+    }
+}
diff --git a/19_kernel_heap/kernel/src/memory/mmu/translation_table.rs b/19_kernel_heap/kernel/src/memory/mmu/translation_table.rs
new file mode 100644
index 000000000..9d627f974
--- /dev/null
+++ b/19_kernel_heap/kernel/src/memory/mmu/translation_table.rs
@@ -0,0 +1,137 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Translation table.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../../_arch/aarch64/memory/mmu/translation_table.rs"]
+mod arch_translation_table;
+
+use super::{AttributeFields, MemoryRegion};
+use crate::memory::{Address, Physical, Virtual};
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+#[cfg(target_arch = "aarch64")]
+pub use arch_translation_table::FixedSizeTranslationTable;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Translation table interfaces.
+pub mod interface {
+    use crate::memory::mmu::PageAddress;
+
+    use super::*;
+
+    /// Translation table operations.
+    pub trait TranslationTable {
+        /// Anything that needs to run before any of the other provided functions can be used.
+        ///
+        /// # Safety
+        ///
+        /// - Implementor must ensure that this function can run only once or is harmless if invoked
+        ///   multiple times.
+        fn init(&mut self) -> Result<(), &'static str>;
+
+        /// Map the given virtual memory region to the given physical memory region.
+        ///
+        /// # Safety
+        ///
+        /// - Using wrong attributes can cause multiple issues of different nature in the system.
+        /// - It is not required that the architectural implementation prevents aliasing. That is,
+        ///   mapping to the same physical memory using multiple virtual addresses, which would
+        ///   break Rust's ownership assumptions. This should be protected against in the kernel's
+        ///   generic MMU code.
+        unsafe fn map_at(
+            &mut self,
+            virt_region: &MemoryRegion<Virtual>,
+            phys_region: &MemoryRegion<Physical>,
+            attr: &AttributeFields,
+        ) -> Result<(), &'static str>;
+
+        /// Try to translate a virtual page address to a physical page address.
+        ///
+        /// Will only succeed if there exists a valid mapping for the input page.
+        fn try_virt_page_addr_to_phys_page_addr(
+            &self,
+            virt_page_addr: PageAddress<Virtual>,
+        ) -> Result<PageAddress<Physical>, &'static str>;
+
+        /// Try to get the attributes of a page.
+        ///
+        /// Will only succeed if there exists a valid mapping for the input page.
+        fn try_page_attributes(
+            &self,
+            virt_page_addr: PageAddress<Virtual>,
+        ) -> Result<AttributeFields, &'static str>;
+
+        /// Try to translate a virtual address to a physical address.
+        ///
+        /// Will only succeed if there exists a valid mapping for the input address.
+        fn try_virt_addr_to_phys_addr(
+            &self,
+            virt_addr: Address<Virtual>,
+        ) -> Result<Address<Physical>, &'static str>;
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use crate::memory::mmu::{AccessPermissions, MemAttributes, PageAddress};
+    use arch_translation_table::MinSizeTranslationTable;
+    use interface::TranslationTable;
+    use test_macros::kernel_test;
+
+    /// Sanity checks for the TranslationTable implementation.
+    #[kernel_test]
+    fn translationtable_implementation_sanity() {
+        // This will occupy a lot of space on the stack.
+        let mut tables = MinSizeTranslationTable::new_for_runtime();
+
+        assert!(tables.init().is_ok());
+
+        let virt_end_exclusive_page_addr: PageAddress<Virtual> = PageAddress::MAX;
+        let virt_start_page_addr: PageAddress<Virtual> =
+            virt_end_exclusive_page_addr.checked_offset(-5).unwrap();
+
+        let phys_start_page_addr: PageAddress<Physical> = PageAddress::from(0);
+        let phys_end_exclusive_page_addr: PageAddress<Physical> =
+            phys_start_page_addr.checked_offset(5).unwrap();
+
+        let virt_region = MemoryRegion::new(virt_start_page_addr, virt_end_exclusive_page_addr);
+        let phys_region = MemoryRegion::new(phys_start_page_addr, phys_end_exclusive_page_addr);
+
+        let attr = AttributeFields {
+            mem_attributes: MemAttributes::CacheableDRAM,
+            acc_perms: AccessPermissions::ReadWrite,
+            execute_never: true,
+        };
+
+        unsafe { assert_eq!(tables.map_at(&virt_region, &phys_region, &attr), Ok(())) };
+
+        assert_eq!(
+            tables.try_virt_page_addr_to_phys_page_addr(virt_start_page_addr),
+            Ok(phys_start_page_addr)
+        );
+
+        assert_eq!(
+            tables.try_page_attributes(virt_start_page_addr.checked_offset(-1).unwrap()),
+            Err("Page marked invalid")
+        );
+
+        assert_eq!(tables.try_page_attributes(virt_start_page_addr), Ok(attr));
+
+        let virt_addr = virt_start_page_addr.into_inner() + 0x100;
+        let phys_addr = phys_start_page_addr.into_inner() + 0x100;
+        assert_eq!(tables.try_virt_addr_to_phys_addr(virt_addr), Ok(phys_addr));
+    }
+}
diff --git a/19_kernel_heap/kernel/src/memory/mmu/types.rs b/19_kernel_heap/kernel/src/memory/mmu/types.rs
new file mode 100644
index 000000000..85c852b34
--- /dev/null
+++ b/19_kernel_heap/kernel/src/memory/mmu/types.rs
@@ -0,0 +1,378 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Memory Management Unit types.
+
+use crate::{
+    bsp, common,
+    memory::{Address, AddressType, Physical},
+};
+use core::{convert::From, iter::Step, num::NonZeroUsize, ops::Range};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// A wrapper type around [Address] that ensures page alignment.
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+pub struct PageAddress<ATYPE: AddressType> {
+    inner: Address<ATYPE>,
+}
+
+/// A type that describes a region of memory in quantities of pages.
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+pub struct MemoryRegion<ATYPE: AddressType> {
+    start: PageAddress<ATYPE>,
+    end_exclusive: PageAddress<ATYPE>,
+}
+
+/// Architecture agnostic memory attributes.
+#[allow(missing_docs)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+pub enum MemAttributes {
+    CacheableDRAM,
+    Device,
+}
+
+/// Architecture agnostic access permissions.
+#[allow(missing_docs)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+pub enum AccessPermissions {
+    ReadOnly,
+    ReadWrite,
+}
+
+/// Collection of memory attributes.
+#[allow(missing_docs)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+pub struct AttributeFields {
+    pub mem_attributes: MemAttributes,
+    pub acc_perms: AccessPermissions,
+    pub execute_never: bool,
+}
+
+/// An MMIO descriptor for use in device drivers.
+#[derive(Copy, Clone)]
+pub struct MMIODescriptor {
+    start_addr: Address<Physical>,
+    end_addr_exclusive: Address<Physical>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+// PageAddress
+//------------------------------------------------------------------------------
+impl<ATYPE: AddressType> PageAddress<ATYPE> {
+    /// The largest value that can be represented by this type.
+    pub const MAX: Self = PageAddress {
+        inner: Address::new(usize::MAX).align_down_page(),
+    };
+
+    /// Unwraps the value.
+    pub fn into_inner(self) -> Address<ATYPE> {
+        self.inner
+    }
+
+    /// Calculates the offset from the page address.
+    ///
+    /// `count` is in units of [PageAddress]. For example, a count of 2 means `result = self + 2 *
+    /// page_size`.
+    pub fn checked_offset(self, count: isize) -> Option<Self> {
+        if count == 0 {
+            return Some(self);
+        }
+
+        let delta = count
+            .unsigned_abs()
+            .checked_mul(bsp::memory::mmu::KernelGranule::SIZE)?;
+        let result = if count.is_positive() {
+            self.inner.as_usize().checked_add(delta)?
+        } else {
+            self.inner.as_usize().checked_sub(delta)?
+        };
+
+        Some(Self {
+            inner: Address::new(result),
+        })
+    }
+}
+
+impl<ATYPE: AddressType> From<usize> for PageAddress<ATYPE> {
+    fn from(addr: usize) -> Self {
+        assert!(
+            common::is_aligned(addr, bsp::memory::mmu::KernelGranule::SIZE),
+            "Input usize not page aligned"
+        );
+
+        Self {
+            inner: Address::new(addr),
+        }
+    }
+}
+
+impl<ATYPE: AddressType> From<Address<ATYPE>> for PageAddress<ATYPE> {
+    fn from(addr: Address<ATYPE>) -> Self {
+        assert!(addr.is_page_aligned(), "Input Address not page aligned");
+
+        Self { inner: addr }
+    }
+}
+
+impl<ATYPE: AddressType> Step for PageAddress<ATYPE> {
+    fn steps_between(start: &Self, end: &Self) -> Option<usize> {
+        if start > end {
+            return None;
+        }
+
+        // Since start <= end, do unchecked arithmetic.
+        Some(
+            (end.inner.as_usize() - start.inner.as_usize())
+                >> bsp::memory::mmu::KernelGranule::SHIFT,
+        )
+    }
+
+    fn forward_checked(start: Self, count: usize) -> Option<Self> {
+        start.checked_offset(count as isize)
+    }
+
+    fn backward_checked(start: Self, count: usize) -> Option<Self> {
+        start.checked_offset(-(count as isize))
+    }
+}
+
+//------------------------------------------------------------------------------
+// MemoryRegion
+//------------------------------------------------------------------------------
+impl<ATYPE: AddressType> MemoryRegion<ATYPE> {
+    /// Create an instance.
+    pub fn new(start: PageAddress<ATYPE>, end_exclusive: PageAddress<ATYPE>) -> Self {
+        assert!(start <= end_exclusive);
+
+        Self {
+            start,
+            end_exclusive,
+        }
+    }
+
+    fn as_range(&self) -> Range<PageAddress<ATYPE>> {
+        self.into_iter()
+    }
+
+    /// Returns the start page address.
+    pub fn start_page_addr(&self) -> PageAddress<ATYPE> {
+        self.start
+    }
+
+    /// Returns the start address.
+    pub fn start_addr(&self) -> Address<ATYPE> {
+        self.start.into_inner()
+    }
+
+    /// Returns the exclusive end page address.
+    pub fn end_exclusive_page_addr(&self) -> PageAddress<ATYPE> {
+        self.end_exclusive
+    }
+
+    /// Returns the exclusive end page address.
+    pub fn end_inclusive_page_addr(&self) -> PageAddress<ATYPE> {
+        self.end_exclusive.checked_offset(-1).unwrap()
+    }
+
+    /// Checks if self contains an address.
+    pub fn contains(&self, addr: Address<ATYPE>) -> bool {
+        let page_addr = PageAddress::from(addr.align_down_page());
+        self.as_range().contains(&page_addr)
+    }
+
+    /// Checks if there is an overlap with another memory region.
+    pub fn overlaps(&self, other_region: &Self) -> bool {
+        let self_range = self.as_range();
+
+        self_range.contains(&other_region.start_page_addr())
+            || self_range.contains(&other_region.end_inclusive_page_addr())
+    }
+
+    /// Returns the number of pages contained in this region.
+    pub fn num_pages(&self) -> usize {
+        PageAddress::steps_between(&self.start, &self.end_exclusive).unwrap()
+    }
+
+    /// Returns the size in bytes of this region.
+    pub fn size(&self) -> usize {
+        // Invariant: start <= end_exclusive, so do unchecked arithmetic.
+        let end_exclusive = self.end_exclusive.into_inner().as_usize();
+        let start = self.start.into_inner().as_usize();
+
+        end_exclusive - start
+    }
+
+    /// Splits the MemoryRegion like:
+    ///
+    /// --------------------------------------------------------------------------------
+    /// |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |
+    /// --------------------------------------------------------------------------------
+    ///   ^                               ^                                       ^
+    ///   |                               |                                       |
+    ///   left_start     left_end_exclusive                                       |
+    ///                                                                           |
+    ///                                   ^                                       |
+    ///                                   |                                       |
+    ///                                   right_start           right_end_exclusive
+    ///
+    /// Left region is returned to the caller. Right region is the new region for this struct.
+    pub fn take_first_n_pages(&mut self, num_pages: NonZeroUsize) -> Result<Self, &'static str> {
+        let count: usize = num_pages.into();
+
+        let left_end_exclusive = self.start.checked_offset(count as isize);
+        let left_end_exclusive = match left_end_exclusive {
+            None => return Err("Overflow while calculating left_end_exclusive"),
+            Some(x) => x,
+        };
+
+        if left_end_exclusive > self.end_exclusive {
+            return Err("Not enough free pages");
+        }
+
+        let allocation = Self {
+            start: self.start,
+            end_exclusive: left_end_exclusive,
+        };
+        self.start = left_end_exclusive;
+
+        Ok(allocation)
+    }
+}
+
+impl<ATYPE: AddressType> IntoIterator for MemoryRegion<ATYPE> {
+    type Item = PageAddress<ATYPE>;
+    type IntoIter = Range<Self::Item>;
+
+    fn into_iter(self) -> Self::IntoIter {
+        Range {
+            start: self.start,
+            end: self.end_exclusive,
+        }
+    }
+}
+
+impl From<MMIODescriptor> for MemoryRegion<Physical> {
+    fn from(desc: MMIODescriptor) -> Self {
+        let start = PageAddress::from(desc.start_addr.align_down_page());
+        let end_exclusive = PageAddress::from(desc.end_addr_exclusive().align_up_page());
+
+        Self {
+            start,
+            end_exclusive,
+        }
+    }
+}
+
+//------------------------------------------------------------------------------
+// MMIODescriptor
+//------------------------------------------------------------------------------
+
+impl MMIODescriptor {
+    /// Create an instance.
+    pub const fn new(start_addr: Address<Physical>, size: usize) -> Self {
+        assert!(size > 0);
+        let end_addr_exclusive = Address::new(start_addr.as_usize() + size);
+
+        Self {
+            start_addr,
+            end_addr_exclusive,
+        }
+    }
+
+    /// Return the start address.
+    pub const fn start_addr(&self) -> Address<Physical> {
+        self.start_addr
+    }
+
+    /// Return the exclusive end address.
+    pub fn end_addr_exclusive(&self) -> Address<Physical> {
+        self.end_addr_exclusive
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use crate::memory::Virtual;
+    use test_macros::kernel_test;
+
+    /// Sanity of [PageAddress] methods.
+    #[kernel_test]
+    fn pageaddress_type_method_sanity() {
+        let page_addr: PageAddress<Virtual> =
+            PageAddress::from(bsp::memory::mmu::KernelGranule::SIZE * 2);
+
+        assert_eq!(
+            page_addr.checked_offset(-2),
+            Some(PageAddress::<Virtual>::from(0))
+        );
+
+        assert_eq!(
+            page_addr.checked_offset(2),
+            Some(PageAddress::<Virtual>::from(
+                bsp::memory::mmu::KernelGranule::SIZE * 4
+            ))
+        );
+
+        assert_eq!(
+            PageAddress::<Virtual>::from(0).checked_offset(0),
+            Some(PageAddress::<Virtual>::from(0))
+        );
+        assert_eq!(PageAddress::<Virtual>::from(0).checked_offset(-1), None);
+
+        let max_page_addr = Address::<Virtual>::new(usize::MAX).align_down_page();
+        assert_eq!(
+            PageAddress::<Virtual>::from(max_page_addr).checked_offset(1),
+            None
+        );
+
+        let zero = PageAddress::<Virtual>::from(0);
+        let three = PageAddress::<Virtual>::from(bsp::memory::mmu::KernelGranule::SIZE * 3);
+        assert_eq!(PageAddress::steps_between(&zero, &three), Some(3));
+    }
+
+    /// Sanity of [MemoryRegion] methods.
+    #[kernel_test]
+    fn memoryregion_type_method_sanity() {
+        let zero = PageAddress::<Virtual>::from(0);
+        let zero_region = MemoryRegion::new(zero, zero);
+        assert_eq!(zero_region.num_pages(), 0);
+        assert_eq!(zero_region.size(), 0);
+
+        let one = PageAddress::<Virtual>::from(bsp::memory::mmu::KernelGranule::SIZE);
+        let one_region = MemoryRegion::new(zero, one);
+        assert_eq!(one_region.num_pages(), 1);
+        assert_eq!(one_region.size(), bsp::memory::mmu::KernelGranule::SIZE);
+
+        let three = PageAddress::<Virtual>::from(bsp::memory::mmu::KernelGranule::SIZE * 3);
+        let mut three_region = MemoryRegion::new(zero, three);
+        assert!(three_region.contains(zero.into_inner()));
+        assert!(!three_region.contains(three.into_inner()));
+        assert!(three_region.overlaps(&one_region));
+
+        let allocation = three_region
+            .take_first_n_pages(NonZeroUsize::new(2).unwrap())
+            .unwrap();
+        assert_eq!(allocation.num_pages(), 2);
+        assert_eq!(three_region.num_pages(), 1);
+
+        for (i, alloc) in allocation.into_iter().enumerate() {
+            assert_eq!(
+                alloc.into_inner().as_usize(),
+                i * bsp::memory::mmu::KernelGranule::SIZE
+            );
+        }
+    }
+}
diff --git a/19_kernel_heap/kernel/src/panic_wait.rs b/19_kernel_heap/kernel/src/panic_wait.rs
new file mode 100644
index 000000000..c8e86fbde
--- /dev/null
+++ b/19_kernel_heap/kernel/src/panic_wait.rs
@@ -0,0 +1,90 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! A panic handler that infinitely waits.
+
+use crate::{backtrace, cpu, exception, println};
+use core::panic::PanicInfo;
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// The point of exit for `libkernel`.
+///
+/// It is linked weakly, so that the integration tests can overload its standard behavior.
+#[linkage = "weak"]
+#[no_mangle]
+fn _panic_exit() -> ! {
+    #[cfg(not(feature = "test_build"))]
+    {
+        cpu::wait_forever()
+    }
+
+    #[cfg(feature = "test_build")]
+    {
+        cpu::qemu_exit_failure()
+    }
+}
+
+/// Stop immediately if called a second time.
+///
+/// # Note
+///
+/// Using atomics here relieves us from needing to use `unsafe` for the static variable.
+///
+/// On `AArch64`, which is the only implemented architecture at the time of writing this,
+/// [`AtomicBool::load`] and [`AtomicBool::store`] are lowered to ordinary load and store
+/// instructions. They are therefore safe to use even with MMU + caching deactivated.
+///
+/// [`AtomicBool::load`]: core::sync::atomic::AtomicBool::load
+/// [`AtomicBool::store`]: core::sync::atomic::AtomicBool::store
+fn panic_prevent_reenter() {
+    use core::sync::atomic::{AtomicBool, Ordering};
+
+    #[cfg(not(target_arch = "aarch64"))]
+    compile_error!("Add the target_arch to above's check if the following code is safe to use");
+
+    static PANIC_IN_PROGRESS: AtomicBool = AtomicBool::new(false);
+
+    if !PANIC_IN_PROGRESS.load(Ordering::Relaxed) {
+        PANIC_IN_PROGRESS.store(true, Ordering::Relaxed);
+
+        return;
+    }
+
+    _panic_exit()
+}
+
+#[panic_handler]
+fn panic(info: &PanicInfo) -> ! {
+    use crate::time::interface::TimeManager;
+
+    unsafe { exception::asynchronous::local_irq_mask() };
+
+    // Protect against panic infinite loops if any of the following code panics itself.
+    panic_prevent_reenter();
+
+    let timestamp = crate::time::time_manager().uptime();
+    let (location, line, column) = match info.location() {
+        Some(loc) => (loc.file(), loc.line(), loc.column()),
+        _ => ("???", 0, 0),
+    };
+
+    println!(
+        "[  {:>3}.{:06}] Kernel panic!\n\n\
+        Panic location:\n      File '{}', line {}, column {}\n\n\
+        {}\n\n\
+        {}",
+        timestamp.as_secs(),
+        timestamp.subsec_micros(),
+        location,
+        line,
+        column,
+        info.message().unwrap_or(&format_args!("")),
+        backtrace::Backtrace
+    );
+
+    _panic_exit()
+}
diff --git a/19_kernel_heap/kernel/src/print.rs b/19_kernel_heap/kernel/src/print.rs
new file mode 100644
index 000000000..5e41ef9fd
--- /dev/null
+++ b/19_kernel_heap/kernel/src/print.rs
@@ -0,0 +1,124 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Printing.
+
+use crate::console;
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+#[doc(hidden)]
+pub fn _print(args: fmt::Arguments) {
+    console::console().write_fmt(args).unwrap();
+}
+
+/// Prints without a newline.
+///
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
+#[macro_export]
+macro_rules! print {
+    ($($arg:tt)*) => ($crate::print::_print(format_args!($($arg)*)));
+}
+
+/// Prints with a newline.
+///
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
+#[macro_export]
+macro_rules! println {
+    () => ($crate::print!("\n"));
+    ($($arg:tt)*) => ({
+        $crate::print::_print(format_args_nl!($($arg)*));
+    })
+}
+
+/// Prints an info, with a newline.
+#[macro_export]
+macro_rules! info {
+    ($string:expr) => ({
+        use $crate::time::interface::TimeManager;
+
+        let timestamp = $crate::time::time_manager().uptime();
+
+        $crate::print::_print(format_args_nl!(
+            concat!("[  {:>3}.{:06}] ", $string),
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+        ));
+    });
+    ($format_string:expr, $($arg:tt)*) => ({
+        use $crate::time::interface::TimeManager;
+
+        let timestamp = $crate::time::time_manager().uptime();
+
+        $crate::print::_print(format_args_nl!(
+            concat!("[  {:>3}.{:06}] ", $format_string),
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+            $($arg)*
+        ));
+    })
+}
+
+/// Prints a warning, with a newline.
+#[macro_export]
+macro_rules! warn {
+    ($string:expr) => ({
+        use $crate::time::interface::TimeManager;
+
+        let timestamp = $crate::time::time_manager().uptime();
+
+        $crate::print::_print(format_args_nl!(
+            concat!("[W {:>3}.{:06}] ", $string),
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+        ));
+    });
+    ($format_string:expr, $($arg:tt)*) => ({
+        use $crate::time::interface::TimeManager;
+
+        let timestamp = $crate::time::time_manager().uptime();
+
+        $crate::print::_print(format_args_nl!(
+            concat!("[W {:>3}.{:06}] ", $format_string),
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+            $($arg)*
+        ));
+    })
+}
+
+/// Debug print, with a newline.
+#[macro_export]
+macro_rules! debug {
+    ($string:expr) => ({
+        if cfg!(feature = "debug_prints") {
+            use $crate::time::interface::TimeManager;
+
+            let timestamp = $crate::time::time_manager().uptime();
+
+            $crate::print::_print(format_args_nl!(
+                concat!("<[>D {:>3}.{:06}> ", $string),
+                timestamp.as_secs(),
+                timestamp.subsec_micros(),
+            ));
+        }
+    });
+    ($format_string:expr, $($arg:tt)*) => ({
+        if cfg!(feature = "debug_prints") {
+            use $crate::time::interface::TimeManager;
+
+            let timestamp = $crate::time::time_manager().uptime();
+
+            $crate::print::_print(format_args_nl!(
+                concat!("<D {:>3}.{:06}> ", $format_string),
+                timestamp.as_secs(),
+                timestamp.subsec_micros(),
+                $($arg)*
+            ));
+        }
+    })
+}
diff --git a/19_kernel_heap/kernel/src/state.rs b/19_kernel_heap/kernel/src/state.rs
new file mode 100644
index 000000000..0af3688c2
--- /dev/null
+++ b/19_kernel_heap/kernel/src/state.rs
@@ -0,0 +1,92 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! State information about the kernel itself.
+
+use core::sync::atomic::{AtomicU8, Ordering};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Different stages in the kernel execution.
+#[derive(Copy, Clone, Eq, PartialEq)]
+enum State {
+    /// The kernel starts booting in this state.
+    Init,
+
+    /// The kernel transitions to this state when jumping to `kernel_main()` (at the end of
+    /// `kernel_init()`, after all init calls are done).
+    SingleCoreMain,
+
+    /// The kernel transitions to this state when it boots the secondary cores, aka switches
+    /// exectution mode to symmetric multiprocessing (SMP).
+    MultiCoreMain,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Maintains the kernel state and state transitions.
+pub struct StateManager(AtomicU8);
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static STATE_MANAGER: StateManager = StateManager::new();
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the global StateManager.
+pub fn state_manager() -> &'static StateManager {
+    &STATE_MANAGER
+}
+
+impl StateManager {
+    const INIT: u8 = 0;
+    const SINGLE_CORE_MAIN: u8 = 1;
+    const MULTI_CORE_MAIN: u8 = 2;
+
+    /// Create a new instance.
+    pub const fn new() -> Self {
+        Self(AtomicU8::new(Self::INIT))
+    }
+
+    /// Return the current state.
+    fn state(&self) -> State {
+        let state = self.0.load(Ordering::Acquire);
+
+        match state {
+            Self::INIT => State::Init,
+            Self::SINGLE_CORE_MAIN => State::SingleCoreMain,
+            Self::MULTI_CORE_MAIN => State::MultiCoreMain,
+            _ => panic!("Invalid KERNEL_STATE"),
+        }
+    }
+
+    /// Return if the kernel is init state.
+    pub fn is_init(&self) -> bool {
+        self.state() == State::Init
+    }
+
+    /// Transition from Init to SingleCoreMain.
+    pub fn transition_to_single_core_main(&self) {
+        if self
+            .0
+            .compare_exchange(
+                Self::INIT,
+                Self::SINGLE_CORE_MAIN,
+                Ordering::Acquire,
+                Ordering::Relaxed,
+            )
+            .is_err()
+        {
+            panic!("transition_to_single_core_main() called while state != Init");
+        }
+    }
+}
diff --git a/19_kernel_heap/kernel/src/symbols.rs b/19_kernel_heap/kernel/src/symbols.rs
new file mode 100644
index 000000000..22001389f
--- /dev/null
+++ b/19_kernel_heap/kernel/src/symbols.rs
@@ -0,0 +1,87 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Debug symbol support.
+
+use crate::memory::{Address, Virtual};
+use core::{cell::UnsafeCell, slice};
+use debug_symbol_types::Symbol;
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+// Symbol from the linker script.
+extern "Rust" {
+    static __kernel_symbols_start: UnsafeCell<()>;
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+/// This will be patched to the correct value by the "kernel symbols tool" after linking. This given
+/// value here is just a (safe) dummy.
+#[no_mangle]
+static NUM_KERNEL_SYMBOLS: u64 = 0;
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+fn kernel_symbol_section_virt_start_addr() -> Address<Virtual> {
+    Address::new(unsafe { __kernel_symbols_start.get() as usize })
+}
+
+fn kernel_symbols_slice() -> &'static [Symbol] {
+    let ptr = kernel_symbol_section_virt_start_addr().as_usize() as *const Symbol;
+
+    unsafe {
+        let num = core::ptr::read_volatile(&NUM_KERNEL_SYMBOLS as *const u64) as usize;
+        slice::from_raw_parts(ptr, num)
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Retrieve the symbol corresponding to a virtual address, if any.
+pub fn lookup_symbol(addr: Address<Virtual>) -> Option<&'static Symbol> {
+    for i in kernel_symbols_slice() {
+        if i.contains(addr.as_usize()) {
+            return Some(i);
+        }
+    }
+
+    None
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// Sanity of symbols module.
+    #[kernel_test]
+    fn symbols_sanity() {
+        let first_sym = lookup_symbol(Address::new(
+            crate::common::is_aligned as *const usize as usize,
+        ))
+        .unwrap()
+        .name();
+
+        assert_eq!(first_sym, "libkernel::common::is_aligned");
+
+        let second_sym = lookup_symbol(Address::new(crate::version as *const usize as usize))
+            .unwrap()
+            .name();
+
+        assert_eq!(second_sym, "libkernel::version");
+    }
+}
diff --git a/19_kernel_heap/kernel/src/synchronization.rs b/19_kernel_heap/kernel/src/synchronization.rs
new file mode 100644
index 000000000..ab2b86e6f
--- /dev/null
+++ b/19_kernel_heap/kernel/src/synchronization.rs
@@ -0,0 +1,159 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Synchronization primitives.
+//!
+//! # Resources
+//!
+//!   - <https://doc.rust-lang.org/book/ch16-04-extensible-concurrency-sync-and-send.html>
+//!   - <https://stackoverflow.com/questions/59428096/understanding-the-send-trait>
+//!   - <https://doc.rust-lang.org/std/cell/index.html>
+
+use core::cell::UnsafeCell;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Synchronization interfaces.
+pub mod interface {
+
+    /// Any object implementing this trait guarantees exclusive access to the data wrapped within
+    /// the Mutex for the duration of the provided closure.
+    pub trait Mutex {
+        /// The type of the data that is wrapped by this mutex.
+        type Data;
+
+        /// Locks the mutex and grants the closure temporary mutable access to the wrapped data.
+        fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R;
+    }
+
+    /// A reader-writer exclusion type.
+    ///
+    /// The implementing object allows either a number of readers or at most one writer at any point
+    /// in time.
+    pub trait ReadWriteEx {
+        /// The type of encapsulated data.
+        type Data;
+
+        /// Grants temporary mutable access to the encapsulated data.
+        fn write<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R;
+
+        /// Grants temporary immutable access to the encapsulated data.
+        fn read<'a, R>(&'a self, f: impl FnOnce(&'a Self::Data) -> R) -> R;
+    }
+}
+
+/// A pseudo-lock for teaching purposes.
+///
+/// In contrast to a real Mutex implementation, does not protect against concurrent access from
+/// other cores to the contained data. This part is preserved for later lessons.
+///
+/// The lock will only be used as long as it is safe to do so, i.e. as long as the kernel is
+/// executing on a single core.
+pub struct IRQSafeNullLock<T>
+where
+    T: ?Sized,
+{
+    data: UnsafeCell<T>,
+}
+
+/// A pseudo-lock that is RW during the single-core kernel init phase and RO afterwards.
+///
+/// Intended to encapsulate data that is populated during kernel init when no concurrency exists.
+pub struct InitStateLock<T>
+where
+    T: ?Sized,
+{
+    data: UnsafeCell<T>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+unsafe impl<T> Send for IRQSafeNullLock<T> where T: ?Sized + Send {}
+unsafe impl<T> Sync for IRQSafeNullLock<T> where T: ?Sized + Send {}
+
+impl<T> IRQSafeNullLock<T> {
+    /// Create an instance.
+    pub const fn new(data: T) -> Self {
+        Self {
+            data: UnsafeCell::new(data),
+        }
+    }
+}
+
+unsafe impl<T> Send for InitStateLock<T> where T: ?Sized + Send {}
+unsafe impl<T> Sync for InitStateLock<T> where T: ?Sized + Send {}
+
+impl<T> InitStateLock<T> {
+    /// Create an instance.
+    pub const fn new(data: T) -> Self {
+        Self {
+            data: UnsafeCell::new(data),
+        }
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use crate::{exception, state};
+
+impl<T> interface::Mutex for IRQSafeNullLock<T> {
+    type Data = T;
+
+    fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R {
+        // In a real lock, there would be code encapsulating this line that ensures that this
+        // mutable reference will ever only be given out once at a time.
+        let data = unsafe { &mut *self.data.get() };
+
+        // Execute the closure while IRQs are masked.
+        exception::asynchronous::exec_with_irq_masked(|| f(data))
+    }
+}
+
+impl<T> interface::ReadWriteEx for InitStateLock<T> {
+    type Data = T;
+
+    fn write<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R {
+        assert!(
+            state::state_manager().is_init(),
+            "InitStateLock::write called after kernel init phase"
+        );
+        assert!(
+            !exception::asynchronous::is_local_irq_masked(),
+            "InitStateLock::write called with IRQs unmasked"
+        );
+
+        let data = unsafe { &mut *self.data.get() };
+
+        f(data)
+    }
+
+    fn read<'a, R>(&'a self, f: impl FnOnce(&'a Self::Data) -> R) -> R {
+        let data = unsafe { &*self.data.get() };
+
+        f(data)
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// InitStateLock must be transparent.
+    #[kernel_test]
+    fn init_state_lock_is_transparent() {
+        use core::mem::size_of;
+
+        assert_eq!(size_of::<InitStateLock<u64>>(), size_of::<u64>());
+    }
+}
diff --git a/19_kernel_heap/kernel/src/time.rs b/19_kernel_heap/kernel/src/time.rs
new file mode 100644
index 000000000..6d92b1966
--- /dev/null
+++ b/19_kernel_heap/kernel/src/time.rs
@@ -0,0 +1,37 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Timer primitives.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "_arch/aarch64/time.rs"]
+mod arch_time;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_time::time_manager;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Timekeeping interfaces.
+pub mod interface {
+    use core::time::Duration;
+
+    /// Time management functions.
+    pub trait TimeManager {
+        /// The timer's resolution.
+        fn resolution(&self) -> Duration;
+
+        /// The uptime since power-on of the device.
+        ///
+        /// This includes time consumed by firmware and bootloaders.
+        fn uptime(&self) -> Duration;
+
+        /// Spin for a given duration.
+        fn spin_for(&self, duration: Duration);
+    }
+}
diff --git a/19_kernel_heap/kernel/tests/00_console_sanity.rb b/19_kernel_heap/kernel/tests/00_console_sanity.rb
new file mode 100644
index 000000000..4dde55762
--- /dev/null
+++ b/19_kernel_heap/kernel/tests/00_console_sanity.rb
@@ -0,0 +1,48 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+
+require 'console_io_test'
+
+# Verify sending and receiving works as expected.
+class TxRxHandshakeTest < SubtestBase
+    def name
+        'Transmit and Receive handshake'
+    end
+
+    def run(qemu_out, qemu_in)
+        qemu_in.write_nonblock('ABC')
+        expect_or_raise(qemu_out, 'OK1234')
+    end
+end
+
+# Check for correct TX statistics implementation. Depends on test 1 being run first.
+class TxStatisticsTest < SubtestBase
+    def name
+        'Transmit statistics'
+    end
+
+    def run(qemu_out, _qemu_in)
+        expect_or_raise(qemu_out, '6')
+    end
+end
+
+# Check for correct RX statistics implementation. Depends on test 1 being run first.
+class RxStatisticsTest < SubtestBase
+    def name
+        'Receive statistics'
+    end
+
+    def run(qemu_out, _qemu_in)
+        expect_or_raise(qemu_out, '3')
+    end
+end
+
+##--------------------------------------------------------------------------------------------------
+## Test registration
+##--------------------------------------------------------------------------------------------------
+def subtest_collection
+    [TxRxHandshakeTest.new, TxStatisticsTest.new, RxStatisticsTest.new]
+end
diff --git a/19_kernel_heap/kernel/tests/00_console_sanity.rs b/19_kernel_heap/kernel/tests/00_console_sanity.rs
new file mode 100644
index 000000000..305510cea
--- /dev/null
+++ b/19_kernel_heap/kernel/tests/00_console_sanity.rs
@@ -0,0 +1,39 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Console sanity tests - RX, TX and statistics.
+
+#![feature(format_args_nl)]
+#![no_main]
+#![no_std]
+
+/// Console tests should time out on the I/O harness in case of panic.
+mod panic_wait_forever;
+
+use libkernel::{bsp, console, cpu, driver, exception, memory, print};
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    use console::console;
+    use driver::interface::DriverManager;
+
+    exception::handling_init();
+    memory::init();
+    bsp::driver::driver_manager().qemu_bring_up_console();
+
+    // Handshake
+    assert_eq!(console().read_char(), 'A');
+    assert_eq!(console().read_char(), 'B');
+    assert_eq!(console().read_char(), 'C');
+    print!("OK1234");
+
+    // 6
+    print!("{}", console().chars_written());
+
+    // 3
+    print!("{}", console().chars_read());
+
+    // The QEMU process running this test will be closed by the I/O test harness.
+    cpu::wait_forever();
+}
diff --git a/19_kernel_heap/kernel/tests/01_timer_sanity.rs b/19_kernel_heap/kernel/tests/01_timer_sanity.rs
new file mode 100644
index 000000000..d5d76a5c1
--- /dev/null
+++ b/19_kernel_heap/kernel/tests/01_timer_sanity.rs
@@ -0,0 +1,52 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Timer sanity tests.
+
+#![feature(custom_test_frameworks)]
+#![no_main]
+#![no_std]
+#![reexport_test_harness_main = "test_main"]
+#![test_runner(libkernel::test_runner)]
+
+use core::time::Duration;
+use libkernel::{bsp, cpu, driver, exception, memory, time, time::interface::TimeManager};
+use test_macros::kernel_test;
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
+    exception::handling_init();
+    memory::init();
+    bsp::driver::driver_manager().qemu_bring_up_console();
+
+    // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
+
+    test_main();
+
+    cpu::qemu_exit_success()
+}
+
+/// Simple check that the timer is running.
+#[kernel_test]
+fn timer_is_counting() {
+    assert!(time::time_manager().uptime().as_nanos() > 0)
+}
+
+/// Timer resolution must be sufficient.
+#[kernel_test]
+fn timer_resolution_is_sufficient() {
+    assert!(time::time_manager().resolution().as_nanos() < 100)
+}
+
+/// Sanity check spin_for() implementation.
+#[kernel_test]
+fn spin_accuracy_check_1_second() {
+    let t1 = time::time_manager().uptime();
+    time::time_manager().spin_for(Duration::from_secs(1));
+    let t2 = time::time_manager().uptime();
+
+    assert_eq!((t2 - t1).as_secs(), 1)
+}
diff --git a/19_kernel_heap/kernel/tests/02_exception_sync_page_fault.rs b/19_kernel_heap/kernel/tests/02_exception_sync_page_fault.rs
new file mode 100644
index 000000000..a6d15b697
--- /dev/null
+++ b/19_kernel_heap/kernel/tests/02_exception_sync_page_fault.rs
@@ -0,0 +1,39 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Page faults must result in synchronous exceptions.
+
+#![feature(format_args_nl)]
+#![no_main]
+#![no_std]
+
+/// Overwrites libkernel's `panic_wait::_panic_exit()` so that it returns a "success" code.
+///
+/// In this test, reaching the panic is a success, because it is called from the synchronous
+/// exception handler, which is what this test wants to achieve.
+///
+/// It also means that this integration test can not use any other code that calls panic!() directly
+/// or indirectly.
+mod panic_exit_success;
+
+use libkernel::{bsp, cpu, driver, exception, info, memory, println};
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
+    exception::handling_init();
+    memory::init();
+    bsp::driver::driver_manager().qemu_bring_up_console();
+
+    // This line will be printed as the test header.
+    println!("Testing synchronous exception handling by causing a page fault");
+
+    info!("Writing to bottom of address space to address 1 GiB...");
+    let big_addr: u64 = 1024 * 1024 * 1024;
+    core::ptr::read_volatile(big_addr as *mut u64);
+
+    // If execution reaches here, the memory access above did not cause a page fault exception.
+    cpu::qemu_exit_failure()
+}
diff --git a/19_kernel_heap/kernel/tests/03_exception_restore_sanity.rb b/19_kernel_heap/kernel/tests/03_exception_restore_sanity.rb
new file mode 100644
index 000000000..5f52e0c7c
--- /dev/null
+++ b/19_kernel_heap/kernel/tests/03_exception_restore_sanity.rb
@@ -0,0 +1,25 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+require 'console_io_test'
+
+# Verify that exception restore works.
+class ExceptionRestoreTest < SubtestBase
+    def name
+        'Exception restore'
+    end
+
+    def run(qemu_out, _qemu_in)
+        expect_or_raise(qemu_out, 'Back from system call!')
+    end
+end
+
+##--------------------------------------------------------------------------------------------------
+## Test registration
+##--------------------------------------------------------------------------------------------------
+def subtest_collection
+    [ExceptionRestoreTest.new]
+end
diff --git a/19_kernel_heap/kernel/tests/03_exception_restore_sanity.rs b/19_kernel_heap/kernel/tests/03_exception_restore_sanity.rs
new file mode 100644
index 000000000..47dd27149
--- /dev/null
+++ b/19_kernel_heap/kernel/tests/03_exception_restore_sanity.rs
@@ -0,0 +1,51 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! A simple sanity test to see if exception restore code works.
+
+#![feature(format_args_nl)]
+#![no_main]
+#![no_std]
+
+/// Console tests should time out on the I/O harness in case of panic.
+mod panic_wait_forever;
+
+use core::arch::asm;
+use libkernel::{bsp, cpu, driver, exception, info, memory, println};
+
+#[inline(never)]
+fn nested_system_call() {
+    #[cfg(target_arch = "aarch64")]
+    unsafe {
+        asm!("svc #0x1337", options(nomem, nostack, preserves_flags));
+    }
+
+    #[cfg(not(target_arch = "aarch64"))]
+    {
+        info!("Not supported yet");
+        cpu::wait_forever();
+    }
+}
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
+    exception::handling_init();
+    memory::init();
+    bsp::driver::driver_manager().qemu_bring_up_console();
+
+    // This line will be printed as the test header.
+    println!("Testing exception restore");
+
+    info!("Making a dummy system call");
+
+    // Calling this inside a function indirectly tests if the link register is restored properly.
+    nested_system_call();
+
+    info!("Back from system call!");
+
+    // The QEMU process running this test will be closed by the I/O test harness.
+    cpu::wait_forever();
+}
diff --git a/19_kernel_heap/kernel/tests/04_exception_irq_sanity.rs b/19_kernel_heap/kernel/tests/04_exception_irq_sanity.rs
new file mode 100644
index 000000000..7b9628d57
--- /dev/null
+++ b/19_kernel_heap/kernel/tests/04_exception_irq_sanity.rs
@@ -0,0 +1,69 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! IRQ handling sanity tests.
+
+#![feature(custom_test_frameworks)]
+#![no_main]
+#![no_std]
+#![reexport_test_harness_main = "test_main"]
+#![test_runner(libkernel::test_runner)]
+
+use libkernel::{bsp, cpu, driver, exception, memory};
+use test_macros::kernel_test;
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
+    memory::init();
+    bsp::driver::driver_manager().qemu_bring_up_console();
+
+    exception::handling_init();
+    exception::asynchronous::local_irq_unmask();
+
+    test_main();
+
+    cpu::qemu_exit_success()
+}
+
+/// Check that IRQ masking works.
+#[kernel_test]
+fn local_irq_mask_works() {
+    // Precondition: IRQs are unmasked.
+    assert!(exception::asynchronous::is_local_irq_masked());
+
+    unsafe { exception::asynchronous::local_irq_mask() };
+    assert!(!exception::asynchronous::is_local_irq_masked());
+
+    // Restore earlier state.
+    unsafe { exception::asynchronous::local_irq_unmask() };
+}
+
+/// Check that IRQ unmasking works.
+#[kernel_test]
+fn local_irq_unmask_works() {
+    // Precondition: IRQs are masked.
+    unsafe { exception::asynchronous::local_irq_mask() };
+    assert!(!exception::asynchronous::is_local_irq_masked());
+
+    unsafe { exception::asynchronous::local_irq_unmask() };
+    assert!(exception::asynchronous::is_local_irq_masked());
+}
+
+/// Check that IRQ mask save is saving "something".
+#[kernel_test]
+fn local_irq_mask_save_works() {
+    // Precondition: IRQs are unmasked.
+    assert!(exception::asynchronous::is_local_irq_masked());
+
+    let first = unsafe { exception::asynchronous::local_irq_mask_save() };
+    assert!(!exception::asynchronous::is_local_irq_masked());
+
+    let second = unsafe { exception::asynchronous::local_irq_mask_save() };
+    assert_ne!(first, second);
+
+    unsafe { exception::asynchronous::local_irq_restore(first) };
+    assert!(exception::asynchronous::is_local_irq_masked());
+}
diff --git a/19_kernel_heap/kernel/tests/05_backtrace_sanity.rb b/19_kernel_heap/kernel/tests/05_backtrace_sanity.rb
new file mode 100644
index 000000000..5650f97c5
--- /dev/null
+++ b/19_kernel_heap/kernel/tests/05_backtrace_sanity.rb
@@ -0,0 +1,39 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+require 'console_io_test'
+
+# Verify that panic produces a backtrace.
+class PanicBacktraceTest < SubtestBase
+    def name
+        'Panic produces backtrace'
+    end
+
+    def run(qemu_out, _qemu_in)
+        expect_or_raise(qemu_out, 'Kernel panic!')
+        expect_or_raise(qemu_out, 'Backtrace:')
+    end
+end
+
+# Verify backtrace correctness.
+class BacktraceCorrectnessTest < SubtestBase
+    def name
+        'Backtrace is correct'
+    end
+
+    def run(qemu_out, _qemu_in)
+        expect_or_raise(qemu_out, '| core::panicking::panic')
+        expect_or_raise(qemu_out, '| _05_backtrace_sanity::nested')
+        expect_or_raise(qemu_out, '| kernel_init')
+    end
+end
+
+##--------------------------------------------------------------------------------------------------
+## Test registration
+##--------------------------------------------------------------------------------------------------
+def subtest_collection
+    [PanicBacktraceTest.new, BacktraceCorrectnessTest.new]
+end
diff --git a/19_kernel_heap/kernel/tests/05_backtrace_sanity.rs b/19_kernel_heap/kernel/tests/05_backtrace_sanity.rs
new file mode 100644
index 000000000..ea425f687
--- /dev/null
+++ b/19_kernel_heap/kernel/tests/05_backtrace_sanity.rs
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Test if backtracing code detects an invalid frame pointer.
+
+#![feature(format_args_nl)]
+#![no_main]
+#![no_std]
+
+/// Console tests should time out on the I/O harness in case of panic.
+mod panic_wait_forever;
+
+use libkernel::{bsp, cpu, driver, exception, memory};
+
+#[inline(never)]
+fn nested() {
+    panic!()
+}
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
+    exception::handling_init();
+    memory::init();
+    bsp::driver::driver_manager().qemu_bring_up_console();
+
+    nested();
+
+    // The QEMU process running this test will be closed by the I/O test harness.
+    cpu::wait_forever()
+}
diff --git a/19_kernel_heap/kernel/tests/06_backtrace_invalid_frame.rb b/19_kernel_heap/kernel/tests/06_backtrace_invalid_frame.rb
new file mode 100644
index 000000000..7601cf971
--- /dev/null
+++ b/19_kernel_heap/kernel/tests/06_backtrace_invalid_frame.rb
@@ -0,0 +1,26 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+require 'console_io_test'
+
+# Test detection of invalid frame pointers.
+class InvalidFramePointerTest < SubtestBase
+    def name
+        'Detect invalid frame pointer'
+    end
+
+    def run(qemu_out, _qemu_in)
+        expect_or_raise(qemu_out,
+                        /Encountered invalid frame pointer \(.*\) during backtrace/)
+    end
+end
+
+##--------------------------------------------------------------------------------------------------
+## Test registration
+##--------------------------------------------------------------------------------------------------
+def subtest_collection
+    [InvalidFramePointerTest.new]
+end
diff --git a/19_kernel_heap/kernel/tests/06_backtrace_invalid_frame.rs b/19_kernel_heap/kernel/tests/06_backtrace_invalid_frame.rs
new file mode 100644
index 000000000..8769c7b6e
--- /dev/null
+++ b/19_kernel_heap/kernel/tests/06_backtrace_invalid_frame.rs
@@ -0,0 +1,35 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Test if backtracing code detects an invalid frame pointer.
+
+#![feature(format_args_nl)]
+#![no_main]
+#![no_std]
+
+/// Console tests should time out on the I/O harness in case of panic.
+mod panic_wait_forever;
+
+use libkernel::{backtrace, bsp, cpu, driver, exception, memory};
+
+#[inline(never)]
+fn nested() {
+    unsafe { backtrace::corrupt_previous_frame_addr() };
+
+    panic!()
+}
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
+    exception::handling_init();
+    memory::init();
+    bsp::driver::driver_manager().qemu_bring_up_console();
+
+    nested();
+
+    // The QEMU process running this test will be closed by the I/O test harness.
+    cpu::wait_forever()
+}
diff --git a/19_kernel_heap/kernel/tests/07_backtrace_invalid_link.rb b/19_kernel_heap/kernel/tests/07_backtrace_invalid_link.rb
new file mode 100644
index 000000000..0fabcf4c4
--- /dev/null
+++ b/19_kernel_heap/kernel/tests/07_backtrace_invalid_link.rb
@@ -0,0 +1,25 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+require 'console_io_test'
+
+# Test detection of invalid link.
+class InvalidLinkTest < SubtestBase
+    def name
+        'Detect invalid link'
+    end
+
+    def run(qemu_out, _qemu_in)
+        expect_or_raise(qemu_out, /Link address \(.*\) is not contained in kernel .text section/)
+    end
+end
+
+##--------------------------------------------------------------------------------------------------
+## Test registration
+##--------------------------------------------------------------------------------------------------
+def subtest_collection
+    [InvalidLinkTest.new]
+end
diff --git a/19_kernel_heap/kernel/tests/07_backtrace_invalid_link.rs b/19_kernel_heap/kernel/tests/07_backtrace_invalid_link.rs
new file mode 100644
index 000000000..28f3cddab
--- /dev/null
+++ b/19_kernel_heap/kernel/tests/07_backtrace_invalid_link.rs
@@ -0,0 +1,40 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Test if backtracing code detects an invalid link.
+
+#![feature(format_args_nl)]
+#![no_main]
+#![no_std]
+
+/// Console tests should time out on the I/O harness in case of panic.
+mod panic_wait_forever;
+
+use libkernel::{backtrace, bsp, cpu, driver, exception, memory};
+
+#[inline(never)]
+fn nested_2() -> &'static str {
+    unsafe { backtrace::corrupt_link() };
+    libkernel::println!("{}", libkernel::backtrace::Backtrace);
+    "foo"
+}
+
+#[inline(never)]
+fn nested_1() {
+    libkernel::println!("{}", nested_2())
+}
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    use driver::interface::DriverManager;
+
+    exception::handling_init();
+    memory::init();
+    bsp::driver::driver_manager().qemu_bring_up_console();
+
+    nested_1();
+
+    // The QEMU process running this test will be closed by the I/O test harness.
+    cpu::wait_forever()
+}
diff --git a/19_kernel_heap/kernel/tests/boot_test_string.rb b/19_kernel_heap/kernel/tests/boot_test_string.rb
new file mode 100644
index 000000000..f778b3d8c
--- /dev/null
+++ b/19_kernel_heap/kernel/tests/boot_test_string.rb
@@ -0,0 +1,3 @@
+# frozen_string_literal: true
+
+EXPECTED_PRINT = 'Echoing input now'
diff --git a/19_kernel_heap/kernel/tests/panic_exit_success/mod.rs b/19_kernel_heap/kernel/tests/panic_exit_success/mod.rs
new file mode 100644
index 000000000..908fac51c
--- /dev/null
+++ b/19_kernel_heap/kernel/tests/panic_exit_success/mod.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+
+/// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
+#[no_mangle]
+fn _panic_exit() -> ! {
+    libkernel::cpu::qemu_exit_success()
+}
diff --git a/19_kernel_heap/kernel/tests/panic_wait_forever/mod.rs b/19_kernel_heap/kernel/tests/panic_wait_forever/mod.rs
new file mode 100644
index 000000000..7a4effa50
--- /dev/null
+++ b/19_kernel_heap/kernel/tests/panic_wait_forever/mod.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+/// Overwrites libkernel's `panic_wait::_panic_exit()` with wait_forever.
+#[no_mangle]
+fn _panic_exit() -> ! {
+    libkernel::cpu::wait_forever()
+}
diff --git a/19_kernel_heap/kernel_symbols.mk b/19_kernel_heap/kernel_symbols.mk
new file mode 100644
index 000000000..5b51ccfed
--- /dev/null
+++ b/19_kernel_heap/kernel_symbols.mk
@@ -0,0 +1,103 @@
+## SPDX-License-Identifier: MIT OR Apache-2.0
+##
+## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+include ../common/format.mk
+include ../common/docker.mk
+
+##--------------------------------------------------------------------------------------------------
+## Check for input variables that need be exported by the calling Makefile
+##--------------------------------------------------------------------------------------------------
+ifndef KERNEL_SYMBOLS_TOOL_PATH
+$(error KERNEL_SYMBOLS_TOOL_PATH is not set)
+endif
+
+ifndef TARGET
+$(error TARGET is not set)
+endif
+
+ifndef KERNEL_SYMBOLS_INPUT_ELF
+$(error KERNEL_SYMBOLS_INPUT_ELF is not set)
+endif
+
+ifndef KERNEL_SYMBOLS_OUTPUT_ELF
+$(error KERNEL_SYMBOLS_OUTPUT_ELF is not set)
+endif
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Targets and Prerequisites
+##--------------------------------------------------------------------------------------------------
+KERNEL_SYMBOLS_MANIFEST      = kernel_symbols/Cargo.toml
+KERNEL_SYMBOLS_LINKER_SCRIPT = kernel_symbols/kernel_symbols.ld
+
+KERNEL_SYMBOLS_RS           = $(KERNEL_SYMBOLS_INPUT_ELF)_symbols.rs
+KERNEL_SYMBOLS_DEMANGLED_RS = $(shell pwd)/$(KERNEL_SYMBOLS_INPUT_ELF)_symbols_demangled.rs
+
+KERNEL_SYMBOLS_ELF      = target/$(TARGET)/release/kernel_symbols
+KERNEL_SYMBOLS_STRIPPED = target/$(TARGET)/release/kernel_symbols_stripped
+
+# Export for build.rs of kernel_symbols crate.
+export KERNEL_SYMBOLS_DEMANGLED_RS
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Command building blocks
+##--------------------------------------------------------------------------------------------------
+GET_SYMBOLS_SECTION_VIRT_ADDR = $(DOCKER_TOOLS) $(EXEC_SYMBOLS_TOOL) \
+    --get_symbols_section_virt_addr $(KERNEL_SYMBOLS_OUTPUT_ELF)
+
+RUSTFLAGS = -C link-arg=--script=$(KERNEL_SYMBOLS_LINKER_SCRIPT) \
+    -C link-arg=--section-start=.rodata=$$($(GET_SYMBOLS_SECTION_VIRT_ADDR))
+
+RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) \
+    -D warnings                   \
+    -D missing_docs
+
+COMPILER_ARGS = --target=$(TARGET) \
+    --release
+
+RUSTC_CMD   = cargo rustc $(COMPILER_ARGS) --manifest-path $(KERNEL_SYMBOLS_MANIFEST)
+OBJCOPY_CMD = rust-objcopy \
+    --strip-all            \
+    -O binary
+
+EXEC_SYMBOLS_TOOL  = ruby $(KERNEL_SYMBOLS_TOOL_PATH)/main.rb
+
+##------------------------------------------------------------------------------
+## Dockerization
+##------------------------------------------------------------------------------
+DOCKER_CMD = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
+
+# DOCKER_IMAGE defined in include file (see top of this file).
+DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: all
+
+all:
+	@cp $(KERNEL_SYMBOLS_INPUT_ELF) $(KERNEL_SYMBOLS_OUTPUT_ELF)
+
+	@$(DOCKER_TOOLS) $(EXEC_SYMBOLS_TOOL) --gen_symbols $(KERNEL_SYMBOLS_OUTPUT_ELF) \
+                $(KERNEL_SYMBOLS_RS)
+
+	$(call color_progress_prefix, "Demangling")
+	@echo Symbol names
+	@cat $(KERNEL_SYMBOLS_RS) | rustfilt > $(KERNEL_SYMBOLS_DEMANGLED_RS)
+
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
+
+	$(call color_progress_prefix, "Stripping")
+	@echo Symbols ELF file
+	@$(OBJCOPY_CMD) $(KERNEL_SYMBOLS_ELF) $(KERNEL_SYMBOLS_STRIPPED)
+
+	@$(DOCKER_TOOLS) $(EXEC_SYMBOLS_TOOL) --patch_data $(KERNEL_SYMBOLS_OUTPUT_ELF) \
+                $(KERNEL_SYMBOLS_STRIPPED)
+
+	$(call color_progress_prefix, "Finished")
diff --git a/19_kernel_heap/kernel_symbols/Cargo.lock b/19_kernel_heap/kernel_symbols/Cargo.lock
new file mode 100644
index 000000000..70b7fa662
--- /dev/null
+++ b/19_kernel_heap/kernel_symbols/Cargo.lock
@@ -0,0 +1,14 @@
+# This file is automatically @generated by Cargo.
+# It is not intended for manual editing.
+version = 3
+
+[[package]]
+name = "debug-symbol-types"
+version = "0.1.0"
+
+[[package]]
+name = "kernel_symbols"
+version = "0.1.0"
+dependencies = [
+ "debug-symbol-types",
+]
diff --git a/19_kernel_heap/kernel_symbols/Cargo.toml b/19_kernel_heap/kernel_symbols/Cargo.toml
new file mode 100644
index 000000000..3407aa7e1
--- /dev/null
+++ b/19_kernel_heap/kernel_symbols/Cargo.toml
@@ -0,0 +1,15 @@
+[package]
+name = "kernel_symbols"
+version = "0.1.0"
+edition = "2021"
+
+[features]
+default = []
+generated_symbols_available = []
+
+##--------------------------------------------------------------------------------------------------
+## Dependencies
+##--------------------------------------------------------------------------------------------------
+
+[dependencies]
+debug-symbol-types = { path = "../libraries/debug-symbol-types" }
diff --git a/19_kernel_heap/kernel_symbols/build.rs b/19_kernel_heap/kernel_symbols/build.rs
new file mode 100644
index 000000000..5062df444
--- /dev/null
+++ b/19_kernel_heap/kernel_symbols/build.rs
@@ -0,0 +1,14 @@
+use std::{env, path::Path};
+
+fn main() {
+    if let Ok(path) = env::var("KERNEL_SYMBOLS_DEMANGLED_RS") {
+        if Path::new(&path).exists() {
+            println!("cargo:rustc-cfg=feature=\"generated_symbols_available\"")
+        }
+    }
+
+    println!(
+        "cargo:rerun-if-changed={}",
+        Path::new("kernel_symbols.ld").display()
+    );
+}
diff --git a/19_kernel_heap/kernel_symbols/kernel_symbols.ld b/19_kernel_heap/kernel_symbols/kernel_symbols.ld
new file mode 100644
index 000000000..0625f0086
--- /dev/null
+++ b/19_kernel_heap/kernel_symbols/kernel_symbols.ld
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: MIT OR Apache-2.0
+ *
+ * Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+ */
+
+SECTIONS
+{
+    .rodata : {
+        ASSERT(. > 0xffffffff00000000, "Expected higher half address")
+
+        KEEP(*(.rodata.symbol_desc*))
+        . = ALIGN(8);
+        *(.rodata*)
+    }
+}
diff --git a/19_kernel_heap/kernel_symbols/src/main.rs b/19_kernel_heap/kernel_symbols/src/main.rs
new file mode 100644
index 000000000..bd90b535d
--- /dev/null
+++ b/19_kernel_heap/kernel_symbols/src/main.rs
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Generation of kernel symbols.
+
+#![no_std]
+#![no_main]
+
+#[cfg(feature = "generated_symbols_available")]
+include!(env!("KERNEL_SYMBOLS_DEMANGLED_RS"));
+
+#[panic_handler]
+fn panic(_info: &core::panic::PanicInfo) -> ! {
+    unimplemented!()
+}
diff --git a/19_kernel_heap/libraries/debug-symbol-types/Cargo.toml b/19_kernel_heap/libraries/debug-symbol-types/Cargo.toml
new file mode 100644
index 000000000..e5b1fd1f5
--- /dev/null
+++ b/19_kernel_heap/libraries/debug-symbol-types/Cargo.toml
@@ -0,0 +1,4 @@
+[package]
+name = "debug-symbol-types"
+version = "0.1.0"
+edition = "2021"
diff --git a/19_kernel_heap/libraries/debug-symbol-types/src/lib.rs b/19_kernel_heap/libraries/debug-symbol-types/src/lib.rs
new file mode 100644
index 000000000..b6dff082f
--- /dev/null
+++ b/19_kernel_heap/libraries/debug-symbol-types/src/lib.rs
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Types for implementing debug symbol support.
+
+#![no_std]
+
+use core::ops::Range;
+
+/// A symbol containing a size.
+#[repr(C)]
+#[derive(Clone)]
+pub struct Symbol {
+    addr_range: Range<usize>,
+    name: &'static str,
+}
+
+impl Symbol {
+    /// Create an instance.
+    pub const fn new(start: usize, size: usize, name: &'static str) -> Symbol {
+        Symbol {
+            addr_range: Range {
+                start,
+                end: start + size,
+            },
+            name,
+        }
+    }
+
+    /// Returns true if addr is contained in the range.
+    pub fn contains(&self, addr: usize) -> bool {
+        self.addr_range.contains(&addr)
+    }
+
+    /// Returns the symbol's name.
+    pub fn name(&self) -> &'static str {
+        self.name
+    }
+
+    /// Returns the symbol's size.
+    pub fn size(&self) -> usize {
+        self.addr_range.end - self.addr_range.start
+    }
+}
diff --git a/19_kernel_heap/libraries/test-macros/Cargo.toml b/19_kernel_heap/libraries/test-macros/Cargo.toml
new file mode 100644
index 000000000..fff98a1fc
--- /dev/null
+++ b/19_kernel_heap/libraries/test-macros/Cargo.toml
@@ -0,0 +1,14 @@
+[package]
+name = "test-macros"
+version = "0.1.0"
+authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+edition = "2021"
+
+[lib]
+proc-macro = true
+
+[dependencies]
+proc-macro2 = "1.x"
+quote = "1.x"
+syn = { version = "1.x", features = ["full"] }
+test-types = { path = "../test-types" }
diff --git a/19_kernel_heap/libraries/test-macros/src/lib.rs b/19_kernel_heap/libraries/test-macros/src/lib.rs
new file mode 100644
index 000000000..9879677cf
--- /dev/null
+++ b/19_kernel_heap/libraries/test-macros/src/lib.rs
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+
+use proc_macro::TokenStream;
+use proc_macro2::Span;
+use quote::quote;
+use syn::{parse_macro_input, Ident, ItemFn};
+
+#[proc_macro_attribute]
+pub fn kernel_test(_attr: TokenStream, input: TokenStream) -> TokenStream {
+    let f = parse_macro_input!(input as ItemFn);
+
+    let test_name = &format!("{}", f.sig.ident);
+    let test_ident = Ident::new(
+        &format!("{}_TEST_CONTAINER", f.sig.ident.to_string().to_uppercase()),
+        Span::call_site(),
+    );
+    let test_code_block = f.block;
+
+    quote!(
+        #[test_case]
+        const #test_ident: test_types::UnitTest = test_types::UnitTest {
+            name: #test_name,
+            test_func: || #test_code_block,
+        };
+    )
+    .into()
+}
diff --git a/19_kernel_heap/libraries/test-types/Cargo.toml b/19_kernel_heap/libraries/test-types/Cargo.toml
new file mode 100644
index 000000000..2f20f060e
--- /dev/null
+++ b/19_kernel_heap/libraries/test-types/Cargo.toml
@@ -0,0 +1,5 @@
+[package]
+name = "test-types"
+version = "0.1.0"
+authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+edition = "2021"
diff --git a/19_kernel_heap/libraries/test-types/src/lib.rs b/19_kernel_heap/libraries/test-types/src/lib.rs
new file mode 100644
index 000000000..922c2a1c3
--- /dev/null
+++ b/19_kernel_heap/libraries/test-types/src/lib.rs
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Types for the `custom_test_frameworks` implementation.
+
+#![no_std]
+
+/// Unit test container.
+pub struct UnitTest {
+    /// Name of the test.
+    pub name: &'static str,
+
+    /// Function pointer to the test.
+    pub test_func: fn(),
+}
diff --git a/19_kernel_heap/tools/kernel_symbols_tool/cmds.rb b/19_kernel_heap/tools/kernel_symbols_tool/cmds.rb
new file mode 100644
index 000000000..fe66ea71c
--- /dev/null
+++ b/19_kernel_heap/tools/kernel_symbols_tool/cmds.rb
@@ -0,0 +1,45 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+def generate_symbols(kernel_elf, output_file)
+    File.open(output_file, 'w') do |file|
+        header = <<~HEREDOC
+            use debug_symbol_types::Symbol;
+
+            # [no_mangle]
+            # [link_section = ".rodata.symbol_desc"]
+            static KERNEL_SYMBOLS: [Symbol; #{kernel_elf.num_symbols}] = [
+        HEREDOC
+
+        file.write(header)
+        kernel_elf.symbols.each do |sym|
+            value = sym.header.st_value
+            size = sym.header.st_size
+            name = sym.name
+
+            file.write("    Symbol::new(#{value}, #{size}, \"#{name}\"),\n")
+        end
+        file.write("];\n")
+    end
+end
+
+def get_symbols_section_virt_addr(kernel_elf)
+    kernel_elf.kernel_symbols_section_virt_addr
+end
+
+def patch_symbol_data(kernel_elf, symbols_blob_path)
+    symbols_blob = File.binread(symbols_blob_path)
+
+    raise if symbols_blob.size > kernel_elf.kernel_symbols_section_size
+
+    File.binwrite(kernel_elf.path, File.binread(symbols_blob_path),
+                  kernel_elf.kernel_symbols_section_offset_in_file)
+end
+
+def patch_num_symbols(kernel_elf)
+    num_packed = [kernel_elf.num_symbols].pack('Q<*') # "Q" == uint64_t, "<" == little endian
+    File.binwrite(kernel_elf.path, num_packed, kernel_elf.num_kernel_symbols_offset_in_file)
+end
diff --git a/19_kernel_heap/tools/kernel_symbols_tool/kernel_elf.rb b/19_kernel_heap/tools/kernel_symbols_tool/kernel_elf.rb
new file mode 100644
index 000000000..b16497673
--- /dev/null
+++ b/19_kernel_heap/tools/kernel_symbols_tool/kernel_elf.rb
@@ -0,0 +1,74 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+# KernelELF
+class KernelELF
+    attr_reader :path
+
+    def initialize(kernel_elf_path, kernel_symbols_section, num_kernel_symbols)
+        @elf = ELFTools::ELFFile.new(File.open(kernel_elf_path))
+        @symtab_section = @elf.section_by_name('.symtab')
+
+        @path = kernel_elf_path
+        fetch_values(kernel_symbols_section, num_kernel_symbols)
+    end
+
+    private
+
+    def fetch_values(kernel_symbols_section, num_kernel_symbols)
+        sym = @symtab_section.symbol_by_name(num_kernel_symbols)
+        raise "Symbol \"#{num_kernel_symbols}\" not found" if sym.nil?
+
+        @num_kernel_symbols = sym
+
+        section = @elf.section_by_name(kernel_symbols_section)
+        raise "Section \"#{kernel_symbols_section}\" not found" if section.nil?
+
+        @kernel_symbols_section = section
+    end
+
+    def num_kernel_symbols_virt_addr
+        @num_kernel_symbols.header.st_value
+    end
+
+    def segment_containing_virt_addr(virt_addr)
+        @elf.each_segments do |segment|
+            return segment if segment.vma_in?(virt_addr)
+        end
+    end
+
+    def virt_addr_to_file_offset(virt_addr)
+        segment = segment_containing_virt_addr(virt_addr)
+        segment.vma_to_offset(virt_addr)
+    end
+
+    public
+
+    def symbols
+        non_zero_symbols = @symtab_section.symbols.reject { |sym| sym.header.st_size.zero? }
+        non_zero_symbols.sort_by { |sym| sym.header.st_value }
+    end
+
+    def num_symbols
+        symbols.size
+    end
+
+    def kernel_symbols_section_virt_addr
+        @kernel_symbols_section.header.sh_addr.to_i
+    end
+
+    def kernel_symbols_section_size
+        @kernel_symbols_section.header.sh_size.to_i
+    end
+
+    def kernel_symbols_section_offset_in_file
+        virt_addr_to_file_offset(kernel_symbols_section_virt_addr)
+    end
+
+    def num_kernel_symbols_offset_in_file
+        virt_addr_to_file_offset(num_kernel_symbols_virt_addr)
+    end
+end
diff --git a/19_kernel_heap/tools/kernel_symbols_tool/main.rb b/19_kernel_heap/tools/kernel_symbols_tool/main.rb
new file mode 100755
index 000000000..30a8be6f5
--- /dev/null
+++ b/19_kernel_heap/tools/kernel_symbols_tool/main.rb
@@ -0,0 +1,47 @@
+#!/usr/bin/env ruby
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+require 'rubygems'
+require 'bundler/setup'
+require 'colorize'
+require 'elftools'
+
+require_relative 'kernel_elf'
+require_relative 'cmds'
+
+KERNEL_SYMBOLS_SECTION = '.kernel_symbols'
+NUM_KERNEL_SYMBOLS = 'NUM_KERNEL_SYMBOLS'
+
+cmd = ARGV[0]
+
+kernel_elf_path = ARGV[1]
+kernel_elf = KernelELF.new(kernel_elf_path, KERNEL_SYMBOLS_SECTION, NUM_KERNEL_SYMBOLS)
+
+case cmd
+when '--gen_symbols'
+    output_file = ARGV[2]
+
+    print 'Generating'.rjust(12).green.bold
+    puts ' Symbols source file'
+
+    generate_symbols(kernel_elf, output_file)
+when '--get_symbols_section_virt_addr'
+    addr = get_symbols_section_virt_addr(kernel_elf)
+
+    puts "0x#{addr.to_s(16)}"
+when '--patch_data'
+    symbols_blob_path = ARGV[2]
+    num_symbols = kernel_elf.num_symbols
+
+    print 'Patching'.rjust(12).green.bold
+    puts " Symbols blob and number of symbols (#{num_symbols}) into ELF"
+
+    patch_symbol_data(kernel_elf, symbols_blob_path)
+    patch_num_symbols(kernel_elf)
+else
+    raise
+end
diff --git a/19_kernel_heap/tools/translation_table_tool/arch.rb b/19_kernel_heap/tools/translation_table_tool/arch.rb
new file mode 100644
index 000000000..deceb6d0c
--- /dev/null
+++ b/19_kernel_heap/tools/translation_table_tool/arch.rb
@@ -0,0 +1,314 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+# Bitfield manipulation.
+class BitField
+    def initialize
+        @value = 0
+    end
+
+    def self.attr_bitfield(name, offset, num_bits)
+        define_method("#{name}=") do |bits|
+            mask = (2**num_bits) - 1
+
+            raise "Input out of range: #{name} = 0x#{bits.to_s(16)}" if (bits & ~mask).positive?
+
+            # Clear bitfield
+            @value &= ~(mask << offset)
+
+            # Set it
+            @value |= (bits << offset)
+        end
+    end
+
+    def to_i
+        @value
+    end
+
+    def size_in_byte
+        8
+    end
+end
+
+# An array class that knows its memory location.
+class CArray < Array
+    attr_reader :phys_start_addr
+
+    def initialize(phys_start_addr, size, &block)
+        @phys_start_addr = phys_start_addr
+
+        super(size, &block)
+    end
+
+    def size_in_byte
+        inject(0) { |sum, n| sum + n.size_in_byte }
+    end
+end
+
+#---------------------------------------------------------------------------------------------------
+# Arch::
+#---------------------------------------------------------------------------------------------------
+module Arch
+#---------------------------------------------------------------------------------------------------
+# Arch::ARMv8
+#---------------------------------------------------------------------------------------------------
+module ARMv8
+# ARMv8 Table Descriptor.
+class Stage1TableDescriptor < BitField
+    module NextLevelTableAddr
+        OFFSET = 16
+        NUMBITS = 32
+    end
+
+    module Type
+        OFFSET = 1
+        NUMBITS = 1
+
+        BLOCK = 0
+        TABLE = 1
+    end
+
+    module Valid
+        OFFSET = 0
+        NUMBITS = 1
+
+        FALSE = 0
+        TRUE = 1
+    end
+
+    attr_bitfield(:__next_level_table_addr, NextLevelTableAddr::OFFSET, NextLevelTableAddr::NUMBITS)
+    attr_bitfield(:type, Type::OFFSET, Type::NUMBITS)
+    attr_bitfield(:valid, Valid::OFFSET, Valid::NUMBITS)
+
+    def next_level_table_addr=(addr)
+        addr = addr >> Granule64KiB::SHIFT
+
+        self.__next_level_table_addr = addr
+    end
+
+    private :__next_level_table_addr=
+end
+
+# ARMv8 level 3 page descriptor.
+class Stage1PageDescriptor < BitField
+    module UXN
+        OFFSET = 54
+        NUMBITS = 1
+
+        FALSE = 0
+        TRUE = 1
+    end
+
+    module PXN
+        OFFSET = 53
+        NUMBITS = 1
+
+        FALSE = 0
+        TRUE = 1
+    end
+
+    module OutputAddr
+        OFFSET = 16
+        NUMBITS = 32
+    end
+
+    module AF
+        OFFSET = 10
+        NUMBITS = 1
+
+        FALSE = 0
+        TRUE = 1
+    end
+
+    module SH
+        OFFSET = 8
+        NUMBITS = 2
+
+        INNER_SHAREABLE = 0b11
+    end
+
+    module AP
+        OFFSET = 6
+        NUMBITS = 2
+
+        RW_EL1 = 0b00
+        RO_EL1 = 0b10
+    end
+
+    module AttrIndx
+        OFFSET = 2
+        NUMBITS = 3
+    end
+
+    module Type
+        OFFSET = 1
+        NUMBITS = 1
+
+        RESERVED_INVALID = 0
+        PAGE = 1
+    end
+
+    module Valid
+        OFFSET = 0
+        NUMBITS = 1
+
+        FALSE = 0
+        TRUE = 1
+    end
+
+    attr_bitfield(:uxn, UXN::OFFSET, UXN::NUMBITS)
+    attr_bitfield(:pxn, PXN::OFFSET, PXN::NUMBITS)
+    attr_bitfield(:__output_addr, OutputAddr::OFFSET, OutputAddr::NUMBITS)
+    attr_bitfield(:af, AF::OFFSET, AF::NUMBITS)
+    attr_bitfield(:sh, SH::OFFSET, SH::NUMBITS)
+    attr_bitfield(:ap, AP::OFFSET, AP::NUMBITS)
+    attr_bitfield(:attr_indx, AttrIndx::OFFSET, AttrIndx::NUMBITS)
+    attr_bitfield(:type, Type::OFFSET, Type::NUMBITS)
+    attr_bitfield(:valid, Valid::OFFSET, Valid::NUMBITS)
+
+    def output_addr=(addr)
+        addr = addr >> Granule64KiB::SHIFT
+
+        self.__output_addr = addr
+    end
+
+    private :__output_addr=
+end
+
+# Translation table representing the structure defined in translation_table.rs.
+class TranslationTable
+    module MAIR
+        NORMAL = 1
+    end
+
+    def initialize
+        do_sanity_checks
+
+        num_lvl2_tables = BSP.kernel_virt_addr_space_size >> Granule512MiB::SHIFT
+
+        @lvl3 = new_lvl3(num_lvl2_tables, BSP.phys_addr_of_kernel_tables)
+
+        @lvl2_phys_start_addr = @lvl3.phys_start_addr + @lvl3.size_in_byte
+        @lvl2 = new_lvl2(num_lvl2_tables, @lvl2_phys_start_addr)
+
+        populate_lvl2_entries
+    end
+
+    def map_at(virt_region, phys_region, attributes)
+        return if virt_region.empty?
+
+        raise if virt_region.size != phys_region.size
+        raise if phys_region.last > BSP.phys_addr_space_end_page
+
+        virt_region.zip(phys_region).each do |virt_page, phys_page|
+            desc = page_descriptor_from(virt_page)
+            set_lvl3_entry(desc, phys_page, attributes)
+        end
+    end
+
+    def to_binary
+        data = @lvl3.flatten.map(&:to_i) + @lvl2.map(&:to_i)
+        data.pack('Q<*') # "Q" == uint64_t, "<" == little endian
+    end
+
+    def phys_tables_base_addr_binary
+        [@lvl2_phys_start_addr].pack('Q<*') # "Q" == uint64_t, "<" == little endian
+    end
+
+    def phys_tables_base_addr
+        @lvl2_phys_start_addr
+    end
+
+    private
+
+    def do_sanity_checks
+        raise unless BSP.kernel_granule::SIZE == Granule64KiB::SIZE
+        raise unless (BSP.kernel_virt_addr_space_size % Granule512MiB::SIZE).zero?
+    end
+
+    def new_lvl3(num_lvl2_tables, start_addr)
+        CArray.new(start_addr, num_lvl2_tables) do
+            temp = CArray.new(start_addr, 8192) do
+                Stage1PageDescriptor.new
+            end
+            start_addr += temp.size_in_byte
+
+            temp
+        end
+    end
+
+    def new_lvl2(num_lvl2_tables, start_addr)
+        CArray.new(start_addr, num_lvl2_tables) do
+            Stage1TableDescriptor.new
+        end
+    end
+
+    def populate_lvl2_entries
+        @lvl2.each_with_index do |descriptor, i|
+            descriptor.next_level_table_addr = @lvl3[i].phys_start_addr
+            descriptor.type = Stage1TableDescriptor::Type::TABLE
+            descriptor.valid = Stage1TableDescriptor::Valid::TRUE
+        end
+    end
+
+    def lvl2_lvl3_index_from(addr)
+        addr -= BSP.kernel_virt_start_addr
+
+        lvl2_index = addr >> Granule512MiB::SHIFT
+        lvl3_index = (addr & Granule512MiB::MASK) >> Granule64KiB::SHIFT
+
+        raise unless lvl2_index < @lvl2.size
+
+        [lvl2_index, lvl3_index]
+    end
+
+    def page_descriptor_from(virt_addr)
+        lvl2_index, lvl3_index = lvl2_lvl3_index_from(virt_addr)
+
+        @lvl3[lvl2_index][lvl3_index]
+    end
+
+    # rubocop:disable Metrics/MethodLength
+    def set_attributes(desc, attributes)
+        case attributes.mem_attributes
+        when :CacheableDRAM
+            desc.sh = Stage1PageDescriptor::SH::INNER_SHAREABLE
+            desc.attr_indx = MAIR::NORMAL
+        else
+            raise 'Invalid input'
+        end
+
+        desc.ap = case attributes.acc_perms
+                  when :ReadOnly
+                      Stage1PageDescriptor::AP::RO_EL1
+                  when :ReadWrite
+                      Stage1PageDescriptor::AP::RW_EL1
+                  else
+                      raise 'Invalid input'
+
+                  end
+
+        desc.pxn = if attributes.execute_never
+                       Stage1PageDescriptor::PXN::TRUE
+                   else
+                       Stage1PageDescriptor::PXN::FALSE
+                   end
+
+        desc.uxn = Stage1PageDescriptor::UXN::TRUE
+    end
+    # rubocop:enable Metrics/MethodLength
+
+    def set_lvl3_entry(desc, output_addr, attributes)
+        desc.output_addr = output_addr
+        desc.af = Stage1PageDescriptor::AF::TRUE
+        desc.type = Stage1PageDescriptor::Type::PAGE
+        desc.valid = Stage1PageDescriptor::Valid::TRUE
+
+        set_attributes(desc, attributes)
+    end
+end
+end
+end
diff --git a/19_kernel_heap/tools/translation_table_tool/bsp.rb b/19_kernel_heap/tools/translation_table_tool/bsp.rb
new file mode 100644
index 000000000..dbab5ab6a
--- /dev/null
+++ b/19_kernel_heap/tools/translation_table_tool/bsp.rb
@@ -0,0 +1,54 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+# Raspberry Pi 3 + 4
+class RaspberryPi
+    attr_reader :kernel_granule, :kernel_virt_addr_space_size, :kernel_virt_start_addr
+
+    MEMORY_SRC = File.read('kernel/src/bsp/raspberrypi/memory.rs').split("\n")
+
+    def initialize
+        @kernel_granule = Granule64KiB
+
+        @kernel_virt_addr_space_size = KERNEL_ELF.symbol_value('__kernel_virt_addr_space_size')
+        @kernel_virt_start_addr = KERNEL_ELF.symbol_value('__kernel_virt_start_addr')
+
+        @virt_addr_of_kernel_tables = KERNEL_ELF.symbol_value('KERNEL_TABLES')
+        @virt_addr_of_phys_kernel_tables_base_addr = KERNEL_ELF.symbol_value(
+            'PHYS_KERNEL_TABLES_BASE_ADDR'
+        )
+    end
+
+    def phys_addr_of_kernel_tables
+        KERNEL_ELF.virt_to_phys(@virt_addr_of_kernel_tables)
+    end
+
+    def kernel_tables_offset_in_file
+        KERNEL_ELF.virt_addr_to_file_offset(@virt_addr_of_kernel_tables)
+    end
+
+    def phys_kernel_tables_base_addr_offset_in_file
+        KERNEL_ELF.virt_addr_to_file_offset(@virt_addr_of_phys_kernel_tables_base_addr)
+    end
+
+    def phys_addr_space_end_page
+        x = MEMORY_SRC.grep(/pub const END/)
+        x = case BSP_TYPE
+            when :rpi3
+                x[0]
+            when :rpi4
+                x[1]
+            else
+                raise
+            end
+
+        # Extract the hex literal with underscores like 0x0123_abcd.
+        x = x.scan(/0x[\h_]*/)[0]
+
+        # Further remove x and _ and convert to int.
+        x.scan(/\h+/).join.to_i(16)
+    end
+end
diff --git a/19_kernel_heap/tools/translation_table_tool/generic.rb b/19_kernel_heap/tools/translation_table_tool/generic.rb
new file mode 100644
index 000000000..eee8ccda2
--- /dev/null
+++ b/19_kernel_heap/tools/translation_table_tool/generic.rb
@@ -0,0 +1,189 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+module Granule64KiB
+    SIZE = 64 * 1024
+    SHIFT = Math.log2(SIZE).to_i
+end
+
+module Granule512MiB
+    SIZE = 512 * 1024 * 1024
+    SHIFT = Math.log2(SIZE).to_i
+    MASK = SIZE - 1
+end
+
+# Monkey-patch Integer with some helper functions.
+class Integer
+    def power_of_two?
+        self[0].zero?
+    end
+
+    def aligned?(alignment)
+        raise unless alignment.power_of_two?
+
+        (self & (alignment - 1)).zero?
+    end
+
+    def align_up(alignment)
+        raise unless alignment.power_of_two?
+
+        (self + alignment - 1) & ~(alignment - 1)
+    end
+
+    def to_hex_underscore(with_leading_zeros: false)
+        fmt = with_leading_zeros ? '%016x' : '%x'
+        value = format(fmt, self).to_s.reverse.scan(/.{4}|.+/).join('_').reverse
+
+        format('0x%s', value)
+    end
+end
+
+# An array where each value is the start address of a Page.
+class MemoryRegion < Array
+    def initialize(start_addr, size, granule_size)
+        raise unless start_addr.aligned?(granule_size)
+        raise unless size.positive?
+        raise unless (size % granule_size).zero?
+
+        num_pages = size / granule_size
+        super(num_pages) do |i|
+            (i * granule_size) + start_addr
+        end
+    end
+end
+
+# Collection of memory attributes.
+class AttributeFields
+    attr_reader :mem_attributes, :acc_perms, :execute_never
+
+    def initialize(mem_attributes, acc_perms, execute_never)
+        @mem_attributes = mem_attributes
+        @acc_perms = acc_perms
+        @execute_never = execute_never
+    end
+
+    def to_s
+        x = case @mem_attributes
+            when :CacheableDRAM
+                'C'
+            else
+                '?'
+            end
+
+        y = case @acc_perms
+            when :ReadWrite
+                'RW'
+            when :ReadOnly
+                'RO'
+            else
+                '??'
+            end
+
+        z = @execute_never ? 'XN' : 'X '
+
+        "#{x} #{y} #{z}"
+    end
+end
+
+# A container that describes a virt-to-phys region mapping.
+class MappingDescriptor
+    @max_section_name_length = 'Sections'.length
+
+    class << self
+        attr_accessor :max_section_name_length
+
+        def update_max_section_name_length(length)
+            @max_section_name_length = [@max_section_name_length, length].max
+        end
+    end
+
+    attr_reader :name, :virt_region, :phys_region, :attributes
+
+    def initialize(name, virt_region, phys_region, attributes)
+        @name = name
+        @virt_region = virt_region
+        @phys_region = phys_region
+        @attributes = attributes
+    end
+
+    def size_human_readable(size)
+        if size >= (1024 * 1024)
+            "#{(size / (1024 * 1024)).to_s.rjust(3)} MiB"
+        elsif size >= 1024
+            "#{(size / 1024).to_s.rjust(3)} KiB"
+        else
+            raise
+        end
+    end
+
+    def to_s
+        name = @name.ljust(self.class.max_section_name_length)
+        virt_start = @virt_region.first.to_hex_underscore(with_leading_zeros: true)
+        phys_start = @phys_region.first.to_hex_underscore(with_leading_zeros: true)
+        size = size_human_readable(@virt_region.size * 65_536)
+
+        "#{name} | #{virt_start} | #{phys_start} | #{size} | #{@attributes}"
+    end
+
+    def self.print_divider
+        print '             '
+        print '-' * max_section_name_length
+        puts '--------------------------------------------------------------------'
+    end
+
+    def self.print_header
+        print_divider
+        print '             '
+        print 'Sections'.center(max_section_name_length)
+        print '   '
+        print 'Virt Start Addr'.center(21)
+        print '   '
+        print 'Phys Start Addr'.center(21)
+        print '   '
+        print 'Size'.center(7)
+        print '   '
+        print 'Attr'.center(7)
+        puts
+        print_divider
+    end
+end
+
+def kernel_map_binary
+    mapping_descriptors = KERNEL_ELF.generate_mapping_descriptors
+
+    # Generate_mapping_descriptors updates the header being printed with this call. So it must come
+    # afterwards.
+    MappingDescriptor.print_header
+
+    mapping_descriptors.each do |i|
+        print 'Generating'.rjust(12).green.bold
+        print ' '
+        puts i.to_s
+
+        TRANSLATION_TABLES.map_at(i.virt_region, i.phys_region, i.attributes)
+    end
+
+    MappingDescriptor.print_divider
+end
+
+def kernel_patch_tables(kernel_elf_path)
+    print 'Patching'.rjust(12).green.bold
+    print ' Kernel table struct at ELF file offset '
+    puts BSP.kernel_tables_offset_in_file.to_hex_underscore
+
+    File.binwrite(kernel_elf_path, TRANSLATION_TABLES.to_binary, BSP.kernel_tables_offset_in_file)
+end
+
+def kernel_patch_base_addr(kernel_elf_path)
+    print 'Patching'.rjust(12).green.bold
+    print ' Kernel tables physical base address start argument to value '
+    print TRANSLATION_TABLES.phys_tables_base_addr.to_hex_underscore
+    print ' at ELF file offset '
+    puts BSP.phys_kernel_tables_base_addr_offset_in_file.to_hex_underscore
+
+    File.binwrite(kernel_elf_path, TRANSLATION_TABLES.phys_tables_base_addr_binary,
+                  BSP.phys_kernel_tables_base_addr_offset_in_file)
+end
diff --git a/19_kernel_heap/tools/translation_table_tool/kernel_elf.rb b/19_kernel_heap/tools/translation_table_tool/kernel_elf.rb
new file mode 100644
index 000000000..f2d5b0b72
--- /dev/null
+++ b/19_kernel_heap/tools/translation_table_tool/kernel_elf.rb
@@ -0,0 +1,96 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+# KernelELF
+class KernelELF
+    SECTION_FLAG_ALLOC = 2
+
+    def initialize(kernel_elf_path)
+        @elf = ELFTools::ELFFile.new(File.open(kernel_elf_path))
+        @symtab_section = @elf.section_by_name('.symtab')
+    end
+
+    def machine
+        @elf.machine.to_sym
+    end
+
+    def symbol_value(symbol_name)
+        @symtab_section.symbol_by_name(symbol_name).header.st_value
+    end
+
+    def segment_containing_virt_addr(virt_addr)
+        @elf.each_segments do |segment|
+            return segment if segment.vma_in?(virt_addr)
+        end
+    end
+
+    def virt_to_phys(virt_addr)
+        segment = segment_containing_virt_addr(virt_addr)
+        translation_offset = segment.header.p_vaddr - segment.header.p_paddr
+
+        virt_addr - translation_offset
+    end
+
+    def virt_addr_to_file_offset(virt_addr)
+        segment = segment_containing_virt_addr(virt_addr)
+        segment.vma_to_offset(virt_addr)
+    end
+
+    def sections_in_segment(segment)
+        head = segment.mem_head
+        tail = segment.mem_tail
+
+        sections = @elf.each_sections.select do |section|
+            file_offset = section.header.sh_addr
+            flags = section.header.sh_flags
+
+            file_offset >= head && file_offset < tail && (flags & SECTION_FLAG_ALLOC != 0)
+        end
+
+        sections.map(&:name).join(' ')
+    end
+
+    def select_load_segments
+        @elf.each_segments.select do |segment|
+            segment.instance_of?(ELFTools::Segments::LoadSegment)
+        end
+    end
+
+    def segment_get_acc_perms(segment)
+        if segment.readable? && segment.writable?
+            :ReadWrite
+        elsif segment.readable?
+            :ReadOnly
+        else
+            :Invalid
+        end
+    end
+
+    def update_max_section_name_length(descriptors)
+        MappingDescriptor.update_max_section_name_length(descriptors.map { |i| i.name.size }.max)
+    end
+
+    def generate_mapping_descriptors
+        descriptors = select_load_segments.map do |segment|
+            # Assume each segment is page aligned.
+            size = segment.mem_size.align_up(BSP.kernel_granule::SIZE)
+            virt_start_addr = segment.header.p_vaddr
+            phys_start_addr = segment.header.p_paddr
+            acc_perms = segment_get_acc_perms(segment)
+            execute_never = !segment.executable?
+            section_names = sections_in_segment(segment)
+
+            virt_region = MemoryRegion.new(virt_start_addr, size, BSP.kernel_granule::SIZE)
+            phys_region = MemoryRegion.new(phys_start_addr, size, BSP.kernel_granule::SIZE)
+            attributes = AttributeFields.new(:CacheableDRAM, acc_perms, execute_never)
+
+            MappingDescriptor.new(section_names, virt_region, phys_region, attributes)
+        end
+
+        update_max_section_name_length(descriptors)
+        descriptors
+    end
+end
diff --git a/19_kernel_heap/tools/translation_table_tool/main.rb b/19_kernel_heap/tools/translation_table_tool/main.rb
new file mode 100755
index 000000000..6419e364e
--- /dev/null
+++ b/19_kernel_heap/tools/translation_table_tool/main.rb
@@ -0,0 +1,46 @@
+#!/usr/bin/env ruby
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+require 'rubygems'
+require 'bundler/setup'
+require 'colorize'
+require 'elftools'
+
+require_relative 'generic'
+require_relative 'kernel_elf'
+require_relative 'bsp'
+require_relative 'arch'
+
+BSP_TYPE = ARGV[0].to_sym
+kernel_elf_path = ARGV[1]
+
+start = Time.now
+
+KERNEL_ELF = KernelELF.new(kernel_elf_path)
+
+BSP = case BSP_TYPE
+      when :rpi3, :rpi4
+          RaspberryPi.new
+      else
+          raise
+      end
+
+TRANSLATION_TABLES = case KERNEL_ELF.machine
+                     when :AArch64
+                         Arch::ARMv8::TranslationTable.new
+                     else
+                         raise
+                     end
+
+kernel_map_binary
+kernel_patch_tables(kernel_elf_path)
+kernel_patch_base_addr(kernel_elf_path)
+
+elapsed = Time.now - start
+
+print 'Finished'.rjust(12).green.bold
+puts " in #{elapsed.round(2)}s"

From f222d73b90c2ff5c5359e608512408b4196a63e3 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Tue, 17 May 2022 23:36:25 +0200
Subject: [PATCH 172/214] Fix clippy

---
 19_kernel_heap/README.md             | 2 +-
 19_kernel_heap/kernel/src/console.rs | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/19_kernel_heap/README.md b/19_kernel_heap/README.md
index 430ff2fb9..0b4e23484 100644
--- a/19_kernel_heap/README.md
+++ b/19_kernel_heap/README.md
@@ -828,7 +828,7 @@ diff -uNr 18_backtrace/kernel/src/console.rs 19_kernel_heap/kernel/src/console.r
 +
 +    static FIRST_SWITCH: InitStateLock<bool> = InitStateLock::new(true);
 +    FIRST_SWITCH.write(|first| {
-+        if *first == true {
++        if *first {
 +            *first = false;
 +
 +            buffer_console::BUFFER_CONSOLE.dump();
diff --git a/19_kernel_heap/kernel/src/console.rs b/19_kernel_heap/kernel/src/console.rs
index 20a89cd7e..ff1d8ddc3 100644
--- a/19_kernel_heap/kernel/src/console.rs
+++ b/19_kernel_heap/kernel/src/console.rs
@@ -77,7 +77,7 @@ pub fn register_console(new_console: &'static (dyn interface::All + Sync)) {
 
     static FIRST_SWITCH: InitStateLock<bool> = InitStateLock::new(true);
     FIRST_SWITCH.write(|first| {
-        if *first == true {
+        if *first {
             *first = false;
 
             buffer_console::BUFFER_CONSOLE.dump();

From 5e1fdf8605e0c8f9052a26f41efbfb10f225c33a Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Thu, 19 May 2022 22:52:32 +0200
Subject: [PATCH 173/214] Remove unsafe from certain IRQ related code

While turning IRQs on or off is something that "sounds critical", it is not
unsafe in these sense of compromising memory safety. Rust's unsafe should be
about memory safety only, hence removing it from certain functions.
---
 13_exceptions_part2_peripheral_IRQs/README.md | 89 ++++++++-----------
 .../_arch/aarch64/exception/asynchronous.rs   | 49 ++++------
 .../kernel/src/exception/asynchronous.rs      | 10 +--
 .../kernel/src/panic_wait.rs                  |  2 +-
 .../kernel/tests/04_exception_irq_sanity.rs   | 14 +--
 14_virtual_mem_part2_mmio_remap/README.md     |  2 +-
 .../_arch/aarch64/exception/asynchronous.rs   | 49 ++++------
 .../kernel/src/exception/asynchronous.rs      | 10 +--
 .../kernel/src/panic_wait.rs                  |  2 +-
 .../kernel/tests/04_exception_irq_sanity.rs   | 14 +--
 .../_arch/aarch64/exception/asynchronous.rs   | 49 ++++------
 .../kernel/src/exception/asynchronous.rs      | 10 +--
 .../kernel/src/panic_wait.rs                  |  2 +-
 .../kernel/tests/04_exception_irq_sanity.rs   | 14 +--
 .../_arch/aarch64/exception/asynchronous.rs   | 49 ++++------
 .../kernel/src/exception/asynchronous.rs      | 10 +--
 .../kernel/src/panic_wait.rs                  |  2 +-
 .../kernel/tests/04_exception_irq_sanity.rs   | 14 +--
 .../_arch/aarch64/exception/asynchronous.rs   | 49 ++++------
 .../kernel/src/exception/asynchronous.rs      | 10 +--
 17_kernel_symbols/kernel/src/panic_wait.rs    |  2 +-
 .../kernel/tests/04_exception_irq_sanity.rs   | 14 +--
 .../_arch/aarch64/exception/asynchronous.rs   | 49 ++++------
 .../kernel/src/exception/asynchronous.rs      | 10 +--
 18_backtrace/kernel/src/panic_wait.rs         |  2 +-
 .../kernel/tests/04_exception_irq_sanity.rs   | 14 +--
 .../_arch/aarch64/exception/asynchronous.rs   | 49 ++++------
 .../kernel/src/exception/asynchronous.rs      | 10 +--
 19_kernel_heap/kernel/src/panic_wait.rs       |  2 +-
 .../kernel/tests/04_exception_irq_sanity.rs   | 14 +--
 30 files changed, 246 insertions(+), 370 deletions(-)

diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index 9a5b7b4f8..65be428aa 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -421,13 +421,9 @@ core are masked before the `f(data)` is being executed, and restored afterwards:
 /// previous state before returning, so this is deemed safe.
 #[inline(always)]
 pub fn exec_with_irq_masked<T>(f: impl FnOnce() -> T) -> T {
-    let ret: T;
-
-    unsafe {
-        let saved = local_irq_mask_save();
-        ret = f();
-        local_irq_restore(saved);
-    }
+    let saved = local_irq_mask_save();
+    let ret = f();
+    local_irq_restore(saved);
 
     ret
 }
@@ -814,7 +810,7 @@ diff -uNr 12_integrated_testing/kernel/src/_arch/aarch64/exception/asynchronous.
  trait DaifField {
      fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register>;
  }
-@@ -66,6 +71,71 @@
+@@ -66,6 +71,60 @@
  // Public Code
  //--------------------------------------------------------------------------------------------------
 
@@ -830,42 +826,32 @@ diff -uNr 12_integrated_testing/kernel/src/_arch/aarch64/exception/asynchronous.
 +///
 +/// "Writes to PSTATE.{PAN, D, A, I, F} occur in program order without the need for additional
 +/// synchronization."
-+///
-+/// # Safety
-+///
-+/// - Changes the HW state of the executing core.
 +#[inline(always)]
-+pub unsafe fn local_irq_unmask() {
-+    #[rustfmt::skip]
-+    asm!(
-+        "msr DAIFClr, {arg}",
-+        arg = const daif_bits::IRQ,
-+        options(nomem, nostack, preserves_flags)
-+    );
++pub fn local_irq_unmask() {
++    unsafe {
++        asm!(
++            "msr DAIFClr, {arg}",
++            arg = const daif_bits::IRQ,
++            options(nomem, nostack, preserves_flags)
++        );
++    }
 +}
 +
 +/// Mask IRQs on the executing core.
-+///
-+/// # Safety
-+///
-+/// - Changes the HW state of the executing core.
 +#[inline(always)]
-+pub unsafe fn local_irq_mask() {
-+    #[rustfmt::skip]
-+    asm!(
-+        "msr DAIFSet, {arg}",
-+        arg = const daif_bits::IRQ,
-+        options(nomem, nostack, preserves_flags)
-+    );
++pub fn local_irq_mask() {
++    unsafe {
++        asm!(
++            "msr DAIFSet, {arg}",
++            arg = const daif_bits::IRQ,
++            options(nomem, nostack, preserves_flags)
++        );
++    }
 +}
 +
 +/// Mask IRQs on the executing core and return the previously saved interrupt mask bits (DAIF).
-+///
-+/// # Safety
-+///
-+/// - Changes the HW state of the executing core.
 +#[inline(always)]
-+pub unsafe fn local_irq_mask_save() -> u64 {
++pub fn local_irq_mask_save() -> u64 {
 +    let saved = DAIF.get();
 +    local_irq_mask();
 +
@@ -874,12 +860,11 @@ diff -uNr 12_integrated_testing/kernel/src/_arch/aarch64/exception/asynchronous.
 +
 +/// Restore the interrupt mask bits (DAIF) using the callee's argument.
 +///
-+/// # Safety
++/// # Invariant
 +///
-+/// - Changes the HW state of the executing core.
 +/// - No sanity checks on the input.
 +#[inline(always)]
-+pub unsafe fn local_irq_restore(saved: u64) {
++pub fn local_irq_restore(saved: u64) {
 +    DAIF.set(saved);
 +}
 +
@@ -2245,7 +2230,7 @@ diff -uNr 12_integrated_testing/kernel/src/driver.rs 13_exceptions_part2_periphe
 diff -uNr 12_integrated_testing/kernel/src/exception/asynchronous.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.rs
 --- 12_integrated_testing/kernel/src/exception/asynchronous.rs
 +++ 13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.rs
-@@ -8,7 +8,153 @@
+@@ -8,7 +8,149 @@
  #[path = "../_arch/aarch64/exception/asynchronous.rs"]
  mod arch_asynchronous;
 
@@ -2383,13 +2368,9 @@ diff -uNr 12_integrated_testing/kernel/src/exception/asynchronous.rs 13_exceptio
 +/// previous state before returning, so this is deemed safe.
 +#[inline(always)]
 +pub fn exec_with_irq_masked<T>(f: impl FnOnce() -> T) -> T {
-+    let ret: T;
-+
-+    unsafe {
-+        let saved = local_irq_mask_save();
-+        ret = f();
-+        local_irq_restore(saved);
-+    }
++    let saved = local_irq_mask_save();
++    let ret = f();
++    local_irq_restore(saved);
 +
 +    ret
 +}
@@ -2497,7 +2478,7 @@ diff -uNr 12_integrated_testing/kernel/src/panic_wait.rs 13_exceptions_part2_per
  fn panic(info: &PanicInfo) -> ! {
      use crate::time::interface::TimeManager;
 
-+    unsafe { exception::asynchronous::local_irq_mask() };
++    exception::asynchronous::local_irq_mask();
 +
      // Protect against panic infinite loops if any of the following code panics itself.
      panic_prevent_reenter();
@@ -2773,21 +2754,21 @@ diff -uNr 12_integrated_testing/kernel/tests/04_exception_irq_sanity.rs 13_excep
 +    // Precondition: IRQs are unmasked.
 +    assert!(exception::asynchronous::is_local_irq_masked());
 +
-+    unsafe { exception::asynchronous::local_irq_mask() };
++    exception::asynchronous::local_irq_mask();
 +    assert!(!exception::asynchronous::is_local_irq_masked());
 +
 +    // Restore earlier state.
-+    unsafe { exception::asynchronous::local_irq_unmask() };
++    exception::asynchronous::local_irq_unmask();
 +}
 +
 +/// Check that IRQ unmasking works.
 +#[kernel_test]
 +fn local_irq_unmask_works() {
 +    // Precondition: IRQs are masked.
-+    unsafe { exception::asynchronous::local_irq_mask() };
++    exception::asynchronous::local_irq_mask();
 +    assert!(!exception::asynchronous::is_local_irq_masked());
 +
-+    unsafe { exception::asynchronous::local_irq_unmask() };
++    exception::asynchronous::local_irq_unmask();
 +    assert!(exception::asynchronous::is_local_irq_masked());
 +}
 +
@@ -2797,13 +2778,13 @@ diff -uNr 12_integrated_testing/kernel/tests/04_exception_irq_sanity.rs 13_excep
 +    // Precondition: IRQs are unmasked.
 +    assert!(exception::asynchronous::is_local_irq_masked());
 +
-+    let first = unsafe { exception::asynchronous::local_irq_mask_save() };
++    let first = exception::asynchronous::local_irq_mask_save();
 +    assert!(!exception::asynchronous::is_local_irq_masked());
 +
-+    let second = unsafe { exception::asynchronous::local_irq_mask_save() };
++    let second = exception::asynchronous::local_irq_mask_save();
 +    assert_ne!(first, second);
 +
-+    unsafe { exception::asynchronous::local_irq_restore(first) };
++    exception::asynchronous::local_irq_restore(first);
 +    assert!(exception::asynchronous::is_local_irq_masked());
 +}
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception/asynchronous.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception/asynchronous.rs
index 73b82e65d..cf6f97acc 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception/asynchronous.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception/asynchronous.rs
@@ -83,42 +83,32 @@ pub fn is_local_irq_masked() -> bool {
 ///
 /// "Writes to PSTATE.{PAN, D, A, I, F} occur in program order without the need for additional
 /// synchronization."
-///
-/// # Safety
-///
-/// - Changes the HW state of the executing core.
 #[inline(always)]
-pub unsafe fn local_irq_unmask() {
-    #[rustfmt::skip]
-    asm!(
-        "msr DAIFClr, {arg}",
-        arg = const daif_bits::IRQ,
-        options(nomem, nostack, preserves_flags)
-    );
+pub fn local_irq_unmask() {
+    unsafe {
+        asm!(
+            "msr DAIFClr, {arg}",
+            arg = const daif_bits::IRQ,
+            options(nomem, nostack, preserves_flags)
+        );
+    }
 }
 
 /// Mask IRQs on the executing core.
-///
-/// # Safety
-///
-/// - Changes the HW state of the executing core.
 #[inline(always)]
-pub unsafe fn local_irq_mask() {
-    #[rustfmt::skip]
-    asm!(
-        "msr DAIFSet, {arg}",
-        arg = const daif_bits::IRQ,
-        options(nomem, nostack, preserves_flags)
-    );
+pub fn local_irq_mask() {
+    unsafe {
+        asm!(
+            "msr DAIFSet, {arg}",
+            arg = const daif_bits::IRQ,
+            options(nomem, nostack, preserves_flags)
+        );
+    }
 }
 
 /// Mask IRQs on the executing core and return the previously saved interrupt mask bits (DAIF).
-///
-/// # Safety
-///
-/// - Changes the HW state of the executing core.
 #[inline(always)]
-pub unsafe fn local_irq_mask_save() -> u64 {
+pub fn local_irq_mask_save() -> u64 {
     let saved = DAIF.get();
     local_irq_mask();
 
@@ -127,12 +117,11 @@ pub unsafe fn local_irq_mask_save() -> u64 {
 
 /// Restore the interrupt mask bits (DAIF) using the callee's argument.
 ///
-/// # Safety
+/// # Invariant
 ///
-/// - Changes the HW state of the executing core.
 /// - No sanity checks on the input.
 #[inline(always)]
-pub unsafe fn local_irq_restore(saved: u64) {
+pub fn local_irq_restore(saved: u64) {
     DAIF.set(saved);
 }
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.rs
index 17938692c..31800ffeb 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.rs
@@ -141,13 +141,9 @@ impl<const MAX_INCLUSIVE: usize> fmt::Display for IRQNumber<{ MAX_INCLUSIVE }> {
 /// previous state before returning, so this is deemed safe.
 #[inline(always)]
 pub fn exec_with_irq_masked<T>(f: impl FnOnce() -> T) -> T {
-    let ret: T;
-
-    unsafe {
-        let saved = local_irq_mask_save();
-        ret = f();
-        local_irq_restore(saved);
-    }
+    let saved = local_irq_mask_save();
+    let ret = f();
+    local_irq_restore(saved);
 
     ret
 }
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/panic_wait.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/panic_wait.rs
index e4256b616..618312133 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/panic_wait.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/panic_wait.rs
@@ -61,7 +61,7 @@ fn panic_prevent_reenter() {
 fn panic(info: &PanicInfo) -> ! {
     use crate::time::interface::TimeManager;
 
-    unsafe { exception::asynchronous::local_irq_mask() };
+    exception::asynchronous::local_irq_mask();
 
     // Protect against panic infinite loops if any of the following code panics itself.
     panic_prevent_reenter();
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/tests/04_exception_irq_sanity.rs b/13_exceptions_part2_peripheral_IRQs/kernel/tests/04_exception_irq_sanity.rs
index 1204dca46..9deac6cc7 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/tests/04_exception_irq_sanity.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/tests/04_exception_irq_sanity.rs
@@ -32,21 +32,21 @@ fn local_irq_mask_works() {
     // Precondition: IRQs are unmasked.
     assert!(exception::asynchronous::is_local_irq_masked());
 
-    unsafe { exception::asynchronous::local_irq_mask() };
+    exception::asynchronous::local_irq_mask();
     assert!(!exception::asynchronous::is_local_irq_masked());
 
     // Restore earlier state.
-    unsafe { exception::asynchronous::local_irq_unmask() };
+    exception::asynchronous::local_irq_unmask();
 }
 
 /// Check that IRQ unmasking works.
 #[kernel_test]
 fn local_irq_unmask_works() {
     // Precondition: IRQs are masked.
-    unsafe { exception::asynchronous::local_irq_mask() };
+    exception::asynchronous::local_irq_mask();
     assert!(!exception::asynchronous::is_local_irq_masked());
 
-    unsafe { exception::asynchronous::local_irq_unmask() };
+    exception::asynchronous::local_irq_unmask();
     assert!(exception::asynchronous::is_local_irq_masked());
 }
 
@@ -56,12 +56,12 @@ fn local_irq_mask_save_works() {
     // Precondition: IRQs are unmasked.
     assert!(exception::asynchronous::is_local_irq_masked());
 
-    let first = unsafe { exception::asynchronous::local_irq_mask_save() };
+    let first = exception::asynchronous::local_irq_mask_save();
     assert!(!exception::asynchronous::is_local_irq_masked());
 
-    let second = unsafe { exception::asynchronous::local_irq_mask_save() };
+    let second = exception::asynchronous::local_irq_mask_save();
     assert_ne!(first, second);
 
-    unsafe { exception::asynchronous::local_irq_restore(first) };
+    exception::asynchronous::local_irq_restore(first);
     assert!(exception::asynchronous::is_local_irq_masked());
 }
diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index 911a2d76e..30aa848b5 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -2300,7 +2300,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.
 
  impl<'irq_context> IRQContext<'irq_context> {
      /// Creates an IRQContext token.
-@@ -152,9 +162,17 @@
+@@ -148,9 +158,17 @@
      ret
  }
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception/asynchronous.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception/asynchronous.rs
index 73b82e65d..cf6f97acc 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception/asynchronous.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception/asynchronous.rs
@@ -83,42 +83,32 @@ pub fn is_local_irq_masked() -> bool {
 ///
 /// "Writes to PSTATE.{PAN, D, A, I, F} occur in program order without the need for additional
 /// synchronization."
-///
-/// # Safety
-///
-/// - Changes the HW state of the executing core.
 #[inline(always)]
-pub unsafe fn local_irq_unmask() {
-    #[rustfmt::skip]
-    asm!(
-        "msr DAIFClr, {arg}",
-        arg = const daif_bits::IRQ,
-        options(nomem, nostack, preserves_flags)
-    );
+pub fn local_irq_unmask() {
+    unsafe {
+        asm!(
+            "msr DAIFClr, {arg}",
+            arg = const daif_bits::IRQ,
+            options(nomem, nostack, preserves_flags)
+        );
+    }
 }
 
 /// Mask IRQs on the executing core.
-///
-/// # Safety
-///
-/// - Changes the HW state of the executing core.
 #[inline(always)]
-pub unsafe fn local_irq_mask() {
-    #[rustfmt::skip]
-    asm!(
-        "msr DAIFSet, {arg}",
-        arg = const daif_bits::IRQ,
-        options(nomem, nostack, preserves_flags)
-    );
+pub fn local_irq_mask() {
+    unsafe {
+        asm!(
+            "msr DAIFSet, {arg}",
+            arg = const daif_bits::IRQ,
+            options(nomem, nostack, preserves_flags)
+        );
+    }
 }
 
 /// Mask IRQs on the executing core and return the previously saved interrupt mask bits (DAIF).
-///
-/// # Safety
-///
-/// - Changes the HW state of the executing core.
 #[inline(always)]
-pub unsafe fn local_irq_mask_save() -> u64 {
+pub fn local_irq_mask_save() -> u64 {
     let saved = DAIF.get();
     local_irq_mask();
 
@@ -127,12 +117,11 @@ pub unsafe fn local_irq_mask_save() -> u64 {
 
 /// Restore the interrupt mask bits (DAIF) using the callee's argument.
 ///
-/// # Safety
+/// # Invariant
 ///
-/// - Changes the HW state of the executing core.
 /// - No sanity checks on the input.
 #[inline(always)]
-pub unsafe fn local_irq_restore(saved: u64) {
+pub fn local_irq_restore(saved: u64) {
     DAIF.set(saved);
 }
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous.rs
index d9d2767cf..3544e621d 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous.rs
@@ -151,13 +151,9 @@ impl<const MAX_INCLUSIVE: usize> fmt::Display for IRQNumber<{ MAX_INCLUSIVE }> {
 /// previous state before returning, so this is deemed safe.
 #[inline(always)]
 pub fn exec_with_irq_masked<T>(f: impl FnOnce() -> T) -> T {
-    let ret: T;
-
-    unsafe {
-        let saved = local_irq_mask_save();
-        ret = f();
-        local_irq_restore(saved);
-    }
+    let saved = local_irq_mask_save();
+    let ret = f();
+    local_irq_restore(saved);
 
     ret
 }
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/panic_wait.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/panic_wait.rs
index e4256b616..618312133 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/panic_wait.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/panic_wait.rs
@@ -61,7 +61,7 @@ fn panic_prevent_reenter() {
 fn panic(info: &PanicInfo) -> ! {
     use crate::time::interface::TimeManager;
 
-    unsafe { exception::asynchronous::local_irq_mask() };
+    exception::asynchronous::local_irq_mask();
 
     // Protect against panic infinite loops if any of the following code panics itself.
     panic_prevent_reenter();
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.rs b/14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.rs
index 7a3448748..c9e244ce6 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.rs
@@ -44,21 +44,21 @@ fn local_irq_mask_works() {
     // Precondition: IRQs are unmasked.
     assert!(exception::asynchronous::is_local_irq_masked());
 
-    unsafe { exception::asynchronous::local_irq_mask() };
+    exception::asynchronous::local_irq_mask();
     assert!(!exception::asynchronous::is_local_irq_masked());
 
     // Restore earlier state.
-    unsafe { exception::asynchronous::local_irq_unmask() };
+    exception::asynchronous::local_irq_unmask();
 }
 
 /// Check that IRQ unmasking works.
 #[kernel_test]
 fn local_irq_unmask_works() {
     // Precondition: IRQs are masked.
-    unsafe { exception::asynchronous::local_irq_mask() };
+    exception::asynchronous::local_irq_mask();
     assert!(!exception::asynchronous::is_local_irq_masked());
 
-    unsafe { exception::asynchronous::local_irq_unmask() };
+    exception::asynchronous::local_irq_unmask();
     assert!(exception::asynchronous::is_local_irq_masked());
 }
 
@@ -68,12 +68,12 @@ fn local_irq_mask_save_works() {
     // Precondition: IRQs are unmasked.
     assert!(exception::asynchronous::is_local_irq_masked());
 
-    let first = unsafe { exception::asynchronous::local_irq_mask_save() };
+    let first = exception::asynchronous::local_irq_mask_save();
     assert!(!exception::asynchronous::is_local_irq_masked());
 
-    let second = unsafe { exception::asynchronous::local_irq_mask_save() };
+    let second = exception::asynchronous::local_irq_mask_save();
     assert_ne!(first, second);
 
-    unsafe { exception::asynchronous::local_irq_restore(first) };
+    exception::asynchronous::local_irq_restore(first);
     assert!(exception::asynchronous::is_local_irq_masked());
 }
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception/asynchronous.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception/asynchronous.rs
index 73b82e65d..cf6f97acc 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception/asynchronous.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception/asynchronous.rs
@@ -83,42 +83,32 @@ pub fn is_local_irq_masked() -> bool {
 ///
 /// "Writes to PSTATE.{PAN, D, A, I, F} occur in program order without the need for additional
 /// synchronization."
-///
-/// # Safety
-///
-/// - Changes the HW state of the executing core.
 #[inline(always)]
-pub unsafe fn local_irq_unmask() {
-    #[rustfmt::skip]
-    asm!(
-        "msr DAIFClr, {arg}",
-        arg = const daif_bits::IRQ,
-        options(nomem, nostack, preserves_flags)
-    );
+pub fn local_irq_unmask() {
+    unsafe {
+        asm!(
+            "msr DAIFClr, {arg}",
+            arg = const daif_bits::IRQ,
+            options(nomem, nostack, preserves_flags)
+        );
+    }
 }
 
 /// Mask IRQs on the executing core.
-///
-/// # Safety
-///
-/// - Changes the HW state of the executing core.
 #[inline(always)]
-pub unsafe fn local_irq_mask() {
-    #[rustfmt::skip]
-    asm!(
-        "msr DAIFSet, {arg}",
-        arg = const daif_bits::IRQ,
-        options(nomem, nostack, preserves_flags)
-    );
+pub fn local_irq_mask() {
+    unsafe {
+        asm!(
+            "msr DAIFSet, {arg}",
+            arg = const daif_bits::IRQ,
+            options(nomem, nostack, preserves_flags)
+        );
+    }
 }
 
 /// Mask IRQs on the executing core and return the previously saved interrupt mask bits (DAIF).
-///
-/// # Safety
-///
-/// - Changes the HW state of the executing core.
 #[inline(always)]
-pub unsafe fn local_irq_mask_save() -> u64 {
+pub fn local_irq_mask_save() -> u64 {
     let saved = DAIF.get();
     local_irq_mask();
 
@@ -127,12 +117,11 @@ pub unsafe fn local_irq_mask_save() -> u64 {
 
 /// Restore the interrupt mask bits (DAIF) using the callee's argument.
 ///
-/// # Safety
+/// # Invariant
 ///
-/// - Changes the HW state of the executing core.
 /// - No sanity checks on the input.
 #[inline(always)]
-pub unsafe fn local_irq_restore(saved: u64) {
+pub fn local_irq_restore(saved: u64) {
     DAIF.set(saved);
 }
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/exception/asynchronous.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/exception/asynchronous.rs
index d9d2767cf..3544e621d 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/exception/asynchronous.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/exception/asynchronous.rs
@@ -151,13 +151,9 @@ impl<const MAX_INCLUSIVE: usize> fmt::Display for IRQNumber<{ MAX_INCLUSIVE }> {
 /// previous state before returning, so this is deemed safe.
 #[inline(always)]
 pub fn exec_with_irq_masked<T>(f: impl FnOnce() -> T) -> T {
-    let ret: T;
-
-    unsafe {
-        let saved = local_irq_mask_save();
-        ret = f();
-        local_irq_restore(saved);
-    }
+    let saved = local_irq_mask_save();
+    let ret = f();
+    local_irq_restore(saved);
 
     ret
 }
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/panic_wait.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/panic_wait.rs
index e4256b616..618312133 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/panic_wait.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/panic_wait.rs
@@ -61,7 +61,7 @@ fn panic_prevent_reenter() {
 fn panic(info: &PanicInfo) -> ! {
     use crate::time::interface::TimeManager;
 
-    unsafe { exception::asynchronous::local_irq_mask() };
+    exception::asynchronous::local_irq_mask();
 
     // Protect against panic infinite loops if any of the following code panics itself.
     panic_prevent_reenter();
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/tests/04_exception_irq_sanity.rs b/15_virtual_mem_part3_precomputed_tables/kernel/tests/04_exception_irq_sanity.rs
index 7b9628d57..e93a4caf6 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/tests/04_exception_irq_sanity.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/tests/04_exception_irq_sanity.rs
@@ -34,21 +34,21 @@ fn local_irq_mask_works() {
     // Precondition: IRQs are unmasked.
     assert!(exception::asynchronous::is_local_irq_masked());
 
-    unsafe { exception::asynchronous::local_irq_mask() };
+    exception::asynchronous::local_irq_mask();
     assert!(!exception::asynchronous::is_local_irq_masked());
 
     // Restore earlier state.
-    unsafe { exception::asynchronous::local_irq_unmask() };
+    exception::asynchronous::local_irq_unmask();
 }
 
 /// Check that IRQ unmasking works.
 #[kernel_test]
 fn local_irq_unmask_works() {
     // Precondition: IRQs are masked.
-    unsafe { exception::asynchronous::local_irq_mask() };
+    exception::asynchronous::local_irq_mask();
     assert!(!exception::asynchronous::is_local_irq_masked());
 
-    unsafe { exception::asynchronous::local_irq_unmask() };
+    exception::asynchronous::local_irq_unmask();
     assert!(exception::asynchronous::is_local_irq_masked());
 }
 
@@ -58,12 +58,12 @@ fn local_irq_mask_save_works() {
     // Precondition: IRQs are unmasked.
     assert!(exception::asynchronous::is_local_irq_masked());
 
-    let first = unsafe { exception::asynchronous::local_irq_mask_save() };
+    let first = exception::asynchronous::local_irq_mask_save();
     assert!(!exception::asynchronous::is_local_irq_masked());
 
-    let second = unsafe { exception::asynchronous::local_irq_mask_save() };
+    let second = exception::asynchronous::local_irq_mask_save();
     assert_ne!(first, second);
 
-    unsafe { exception::asynchronous::local_irq_restore(first) };
+    exception::asynchronous::local_irq_restore(first);
     assert!(exception::asynchronous::is_local_irq_masked());
 }
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception/asynchronous.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception/asynchronous.rs
index 73b82e65d..cf6f97acc 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception/asynchronous.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception/asynchronous.rs
@@ -83,42 +83,32 @@ pub fn is_local_irq_masked() -> bool {
 ///
 /// "Writes to PSTATE.{PAN, D, A, I, F} occur in program order without the need for additional
 /// synchronization."
-///
-/// # Safety
-///
-/// - Changes the HW state of the executing core.
 #[inline(always)]
-pub unsafe fn local_irq_unmask() {
-    #[rustfmt::skip]
-    asm!(
-        "msr DAIFClr, {arg}",
-        arg = const daif_bits::IRQ,
-        options(nomem, nostack, preserves_flags)
-    );
+pub fn local_irq_unmask() {
+    unsafe {
+        asm!(
+            "msr DAIFClr, {arg}",
+            arg = const daif_bits::IRQ,
+            options(nomem, nostack, preserves_flags)
+        );
+    }
 }
 
 /// Mask IRQs on the executing core.
-///
-/// # Safety
-///
-/// - Changes the HW state of the executing core.
 #[inline(always)]
-pub unsafe fn local_irq_mask() {
-    #[rustfmt::skip]
-    asm!(
-        "msr DAIFSet, {arg}",
-        arg = const daif_bits::IRQ,
-        options(nomem, nostack, preserves_flags)
-    );
+pub fn local_irq_mask() {
+    unsafe {
+        asm!(
+            "msr DAIFSet, {arg}",
+            arg = const daif_bits::IRQ,
+            options(nomem, nostack, preserves_flags)
+        );
+    }
 }
 
 /// Mask IRQs on the executing core and return the previously saved interrupt mask bits (DAIF).
-///
-/// # Safety
-///
-/// - Changes the HW state of the executing core.
 #[inline(always)]
-pub unsafe fn local_irq_mask_save() -> u64 {
+pub fn local_irq_mask_save() -> u64 {
     let saved = DAIF.get();
     local_irq_mask();
 
@@ -127,12 +117,11 @@ pub unsafe fn local_irq_mask_save() -> u64 {
 
 /// Restore the interrupt mask bits (DAIF) using the callee's argument.
 ///
-/// # Safety
+/// # Invariant
 ///
-/// - Changes the HW state of the executing core.
 /// - No sanity checks on the input.
 #[inline(always)]
-pub unsafe fn local_irq_restore(saved: u64) {
+pub fn local_irq_restore(saved: u64) {
     DAIF.set(saved);
 }
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception/asynchronous.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception/asynchronous.rs
index d9d2767cf..3544e621d 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception/asynchronous.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception/asynchronous.rs
@@ -151,13 +151,9 @@ impl<const MAX_INCLUSIVE: usize> fmt::Display for IRQNumber<{ MAX_INCLUSIVE }> {
 /// previous state before returning, so this is deemed safe.
 #[inline(always)]
 pub fn exec_with_irq_masked<T>(f: impl FnOnce() -> T) -> T {
-    let ret: T;
-
-    unsafe {
-        let saved = local_irq_mask_save();
-        ret = f();
-        local_irq_restore(saved);
-    }
+    let saved = local_irq_mask_save();
+    let ret = f();
+    local_irq_restore(saved);
 
     ret
 }
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/panic_wait.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/panic_wait.rs
index e4256b616..618312133 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/panic_wait.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/panic_wait.rs
@@ -61,7 +61,7 @@ fn panic_prevent_reenter() {
 fn panic(info: &PanicInfo) -> ! {
     use crate::time::interface::TimeManager;
 
-    unsafe { exception::asynchronous::local_irq_mask() };
+    exception::asynchronous::local_irq_mask();
 
     // Protect against panic infinite loops if any of the following code panics itself.
     panic_prevent_reenter();
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/04_exception_irq_sanity.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/04_exception_irq_sanity.rs
index 7b9628d57..e93a4caf6 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/04_exception_irq_sanity.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/04_exception_irq_sanity.rs
@@ -34,21 +34,21 @@ fn local_irq_mask_works() {
     // Precondition: IRQs are unmasked.
     assert!(exception::asynchronous::is_local_irq_masked());
 
-    unsafe { exception::asynchronous::local_irq_mask() };
+    exception::asynchronous::local_irq_mask();
     assert!(!exception::asynchronous::is_local_irq_masked());
 
     // Restore earlier state.
-    unsafe { exception::asynchronous::local_irq_unmask() };
+    exception::asynchronous::local_irq_unmask();
 }
 
 /// Check that IRQ unmasking works.
 #[kernel_test]
 fn local_irq_unmask_works() {
     // Precondition: IRQs are masked.
-    unsafe { exception::asynchronous::local_irq_mask() };
+    exception::asynchronous::local_irq_mask();
     assert!(!exception::asynchronous::is_local_irq_masked());
 
-    unsafe { exception::asynchronous::local_irq_unmask() };
+    exception::asynchronous::local_irq_unmask();
     assert!(exception::asynchronous::is_local_irq_masked());
 }
 
@@ -58,12 +58,12 @@ fn local_irq_mask_save_works() {
     // Precondition: IRQs are unmasked.
     assert!(exception::asynchronous::is_local_irq_masked());
 
-    let first = unsafe { exception::asynchronous::local_irq_mask_save() };
+    let first = exception::asynchronous::local_irq_mask_save();
     assert!(!exception::asynchronous::is_local_irq_masked());
 
-    let second = unsafe { exception::asynchronous::local_irq_mask_save() };
+    let second = exception::asynchronous::local_irq_mask_save();
     assert_ne!(first, second);
 
-    unsafe { exception::asynchronous::local_irq_restore(first) };
+    exception::asynchronous::local_irq_restore(first);
     assert!(exception::asynchronous::is_local_irq_masked());
 }
diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/exception/asynchronous.rs b/17_kernel_symbols/kernel/src/_arch/aarch64/exception/asynchronous.rs
index 73b82e65d..cf6f97acc 100644
--- a/17_kernel_symbols/kernel/src/_arch/aarch64/exception/asynchronous.rs
+++ b/17_kernel_symbols/kernel/src/_arch/aarch64/exception/asynchronous.rs
@@ -83,42 +83,32 @@ pub fn is_local_irq_masked() -> bool {
 ///
 /// "Writes to PSTATE.{PAN, D, A, I, F} occur in program order without the need for additional
 /// synchronization."
-///
-/// # Safety
-///
-/// - Changes the HW state of the executing core.
 #[inline(always)]
-pub unsafe fn local_irq_unmask() {
-    #[rustfmt::skip]
-    asm!(
-        "msr DAIFClr, {arg}",
-        arg = const daif_bits::IRQ,
-        options(nomem, nostack, preserves_flags)
-    );
+pub fn local_irq_unmask() {
+    unsafe {
+        asm!(
+            "msr DAIFClr, {arg}",
+            arg = const daif_bits::IRQ,
+            options(nomem, nostack, preserves_flags)
+        );
+    }
 }
 
 /// Mask IRQs on the executing core.
-///
-/// # Safety
-///
-/// - Changes the HW state of the executing core.
 #[inline(always)]
-pub unsafe fn local_irq_mask() {
-    #[rustfmt::skip]
-    asm!(
-        "msr DAIFSet, {arg}",
-        arg = const daif_bits::IRQ,
-        options(nomem, nostack, preserves_flags)
-    );
+pub fn local_irq_mask() {
+    unsafe {
+        asm!(
+            "msr DAIFSet, {arg}",
+            arg = const daif_bits::IRQ,
+            options(nomem, nostack, preserves_flags)
+        );
+    }
 }
 
 /// Mask IRQs on the executing core and return the previously saved interrupt mask bits (DAIF).
-///
-/// # Safety
-///
-/// - Changes the HW state of the executing core.
 #[inline(always)]
-pub unsafe fn local_irq_mask_save() -> u64 {
+pub fn local_irq_mask_save() -> u64 {
     let saved = DAIF.get();
     local_irq_mask();
 
@@ -127,12 +117,11 @@ pub unsafe fn local_irq_mask_save() -> u64 {
 
 /// Restore the interrupt mask bits (DAIF) using the callee's argument.
 ///
-/// # Safety
+/// # Invariant
 ///
-/// - Changes the HW state of the executing core.
 /// - No sanity checks on the input.
 #[inline(always)]
-pub unsafe fn local_irq_restore(saved: u64) {
+pub fn local_irq_restore(saved: u64) {
     DAIF.set(saved);
 }
 
diff --git a/17_kernel_symbols/kernel/src/exception/asynchronous.rs b/17_kernel_symbols/kernel/src/exception/asynchronous.rs
index d9d2767cf..3544e621d 100644
--- a/17_kernel_symbols/kernel/src/exception/asynchronous.rs
+++ b/17_kernel_symbols/kernel/src/exception/asynchronous.rs
@@ -151,13 +151,9 @@ impl<const MAX_INCLUSIVE: usize> fmt::Display for IRQNumber<{ MAX_INCLUSIVE }> {
 /// previous state before returning, so this is deemed safe.
 #[inline(always)]
 pub fn exec_with_irq_masked<T>(f: impl FnOnce() -> T) -> T {
-    let ret: T;
-
-    unsafe {
-        let saved = local_irq_mask_save();
-        ret = f();
-        local_irq_restore(saved);
-    }
+    let saved = local_irq_mask_save();
+    let ret = f();
+    local_irq_restore(saved);
 
     ret
 }
diff --git a/17_kernel_symbols/kernel/src/panic_wait.rs b/17_kernel_symbols/kernel/src/panic_wait.rs
index e4256b616..618312133 100644
--- a/17_kernel_symbols/kernel/src/panic_wait.rs
+++ b/17_kernel_symbols/kernel/src/panic_wait.rs
@@ -61,7 +61,7 @@ fn panic_prevent_reenter() {
 fn panic(info: &PanicInfo) -> ! {
     use crate::time::interface::TimeManager;
 
-    unsafe { exception::asynchronous::local_irq_mask() };
+    exception::asynchronous::local_irq_mask();
 
     // Protect against panic infinite loops if any of the following code panics itself.
     panic_prevent_reenter();
diff --git a/17_kernel_symbols/kernel/tests/04_exception_irq_sanity.rs b/17_kernel_symbols/kernel/tests/04_exception_irq_sanity.rs
index 7b9628d57..e93a4caf6 100644
--- a/17_kernel_symbols/kernel/tests/04_exception_irq_sanity.rs
+++ b/17_kernel_symbols/kernel/tests/04_exception_irq_sanity.rs
@@ -34,21 +34,21 @@ fn local_irq_mask_works() {
     // Precondition: IRQs are unmasked.
     assert!(exception::asynchronous::is_local_irq_masked());
 
-    unsafe { exception::asynchronous::local_irq_mask() };
+    exception::asynchronous::local_irq_mask();
     assert!(!exception::asynchronous::is_local_irq_masked());
 
     // Restore earlier state.
-    unsafe { exception::asynchronous::local_irq_unmask() };
+    exception::asynchronous::local_irq_unmask();
 }
 
 /// Check that IRQ unmasking works.
 #[kernel_test]
 fn local_irq_unmask_works() {
     // Precondition: IRQs are masked.
-    unsafe { exception::asynchronous::local_irq_mask() };
+    exception::asynchronous::local_irq_mask();
     assert!(!exception::asynchronous::is_local_irq_masked());
 
-    unsafe { exception::asynchronous::local_irq_unmask() };
+    exception::asynchronous::local_irq_unmask();
     assert!(exception::asynchronous::is_local_irq_masked());
 }
 
@@ -58,12 +58,12 @@ fn local_irq_mask_save_works() {
     // Precondition: IRQs are unmasked.
     assert!(exception::asynchronous::is_local_irq_masked());
 
-    let first = unsafe { exception::asynchronous::local_irq_mask_save() };
+    let first = exception::asynchronous::local_irq_mask_save();
     assert!(!exception::asynchronous::is_local_irq_masked());
 
-    let second = unsafe { exception::asynchronous::local_irq_mask_save() };
+    let second = exception::asynchronous::local_irq_mask_save();
     assert_ne!(first, second);
 
-    unsafe { exception::asynchronous::local_irq_restore(first) };
+    exception::asynchronous::local_irq_restore(first);
     assert!(exception::asynchronous::is_local_irq_masked());
 }
diff --git a/18_backtrace/kernel/src/_arch/aarch64/exception/asynchronous.rs b/18_backtrace/kernel/src/_arch/aarch64/exception/asynchronous.rs
index 73b82e65d..cf6f97acc 100644
--- a/18_backtrace/kernel/src/_arch/aarch64/exception/asynchronous.rs
+++ b/18_backtrace/kernel/src/_arch/aarch64/exception/asynchronous.rs
@@ -83,42 +83,32 @@ pub fn is_local_irq_masked() -> bool {
 ///
 /// "Writes to PSTATE.{PAN, D, A, I, F} occur in program order without the need for additional
 /// synchronization."
-///
-/// # Safety
-///
-/// - Changes the HW state of the executing core.
 #[inline(always)]
-pub unsafe fn local_irq_unmask() {
-    #[rustfmt::skip]
-    asm!(
-        "msr DAIFClr, {arg}",
-        arg = const daif_bits::IRQ,
-        options(nomem, nostack, preserves_flags)
-    );
+pub fn local_irq_unmask() {
+    unsafe {
+        asm!(
+            "msr DAIFClr, {arg}",
+            arg = const daif_bits::IRQ,
+            options(nomem, nostack, preserves_flags)
+        );
+    }
 }
 
 /// Mask IRQs on the executing core.
-///
-/// # Safety
-///
-/// - Changes the HW state of the executing core.
 #[inline(always)]
-pub unsafe fn local_irq_mask() {
-    #[rustfmt::skip]
-    asm!(
-        "msr DAIFSet, {arg}",
-        arg = const daif_bits::IRQ,
-        options(nomem, nostack, preserves_flags)
-    );
+pub fn local_irq_mask() {
+    unsafe {
+        asm!(
+            "msr DAIFSet, {arg}",
+            arg = const daif_bits::IRQ,
+            options(nomem, nostack, preserves_flags)
+        );
+    }
 }
 
 /// Mask IRQs on the executing core and return the previously saved interrupt mask bits (DAIF).
-///
-/// # Safety
-///
-/// - Changes the HW state of the executing core.
 #[inline(always)]
-pub unsafe fn local_irq_mask_save() -> u64 {
+pub fn local_irq_mask_save() -> u64 {
     let saved = DAIF.get();
     local_irq_mask();
 
@@ -127,12 +117,11 @@ pub unsafe fn local_irq_mask_save() -> u64 {
 
 /// Restore the interrupt mask bits (DAIF) using the callee's argument.
 ///
-/// # Safety
+/// # Invariant
 ///
-/// - Changes the HW state of the executing core.
 /// - No sanity checks on the input.
 #[inline(always)]
-pub unsafe fn local_irq_restore(saved: u64) {
+pub fn local_irq_restore(saved: u64) {
     DAIF.set(saved);
 }
 
diff --git a/18_backtrace/kernel/src/exception/asynchronous.rs b/18_backtrace/kernel/src/exception/asynchronous.rs
index d9d2767cf..3544e621d 100644
--- a/18_backtrace/kernel/src/exception/asynchronous.rs
+++ b/18_backtrace/kernel/src/exception/asynchronous.rs
@@ -151,13 +151,9 @@ impl<const MAX_INCLUSIVE: usize> fmt::Display for IRQNumber<{ MAX_INCLUSIVE }> {
 /// previous state before returning, so this is deemed safe.
 #[inline(always)]
 pub fn exec_with_irq_masked<T>(f: impl FnOnce() -> T) -> T {
-    let ret: T;
-
-    unsafe {
-        let saved = local_irq_mask_save();
-        ret = f();
-        local_irq_restore(saved);
-    }
+    let saved = local_irq_mask_save();
+    let ret = f();
+    local_irq_restore(saved);
 
     ret
 }
diff --git a/18_backtrace/kernel/src/panic_wait.rs b/18_backtrace/kernel/src/panic_wait.rs
index c8e86fbde..c11ec67ec 100644
--- a/18_backtrace/kernel/src/panic_wait.rs
+++ b/18_backtrace/kernel/src/panic_wait.rs
@@ -61,7 +61,7 @@ fn panic_prevent_reenter() {
 fn panic(info: &PanicInfo) -> ! {
     use crate::time::interface::TimeManager;
 
-    unsafe { exception::asynchronous::local_irq_mask() };
+    exception::asynchronous::local_irq_mask();
 
     // Protect against panic infinite loops if any of the following code panics itself.
     panic_prevent_reenter();
diff --git a/18_backtrace/kernel/tests/04_exception_irq_sanity.rs b/18_backtrace/kernel/tests/04_exception_irq_sanity.rs
index 7b9628d57..e93a4caf6 100644
--- a/18_backtrace/kernel/tests/04_exception_irq_sanity.rs
+++ b/18_backtrace/kernel/tests/04_exception_irq_sanity.rs
@@ -34,21 +34,21 @@ fn local_irq_mask_works() {
     // Precondition: IRQs are unmasked.
     assert!(exception::asynchronous::is_local_irq_masked());
 
-    unsafe { exception::asynchronous::local_irq_mask() };
+    exception::asynchronous::local_irq_mask();
     assert!(!exception::asynchronous::is_local_irq_masked());
 
     // Restore earlier state.
-    unsafe { exception::asynchronous::local_irq_unmask() };
+    exception::asynchronous::local_irq_unmask();
 }
 
 /// Check that IRQ unmasking works.
 #[kernel_test]
 fn local_irq_unmask_works() {
     // Precondition: IRQs are masked.
-    unsafe { exception::asynchronous::local_irq_mask() };
+    exception::asynchronous::local_irq_mask();
     assert!(!exception::asynchronous::is_local_irq_masked());
 
-    unsafe { exception::asynchronous::local_irq_unmask() };
+    exception::asynchronous::local_irq_unmask();
     assert!(exception::asynchronous::is_local_irq_masked());
 }
 
@@ -58,12 +58,12 @@ fn local_irq_mask_save_works() {
     // Precondition: IRQs are unmasked.
     assert!(exception::asynchronous::is_local_irq_masked());
 
-    let first = unsafe { exception::asynchronous::local_irq_mask_save() };
+    let first = exception::asynchronous::local_irq_mask_save();
     assert!(!exception::asynchronous::is_local_irq_masked());
 
-    let second = unsafe { exception::asynchronous::local_irq_mask_save() };
+    let second = exception::asynchronous::local_irq_mask_save();
     assert_ne!(first, second);
 
-    unsafe { exception::asynchronous::local_irq_restore(first) };
+    exception::asynchronous::local_irq_restore(first);
     assert!(exception::asynchronous::is_local_irq_masked());
 }
diff --git a/19_kernel_heap/kernel/src/_arch/aarch64/exception/asynchronous.rs b/19_kernel_heap/kernel/src/_arch/aarch64/exception/asynchronous.rs
index 73b82e65d..cf6f97acc 100644
--- a/19_kernel_heap/kernel/src/_arch/aarch64/exception/asynchronous.rs
+++ b/19_kernel_heap/kernel/src/_arch/aarch64/exception/asynchronous.rs
@@ -83,42 +83,32 @@ pub fn is_local_irq_masked() -> bool {
 ///
 /// "Writes to PSTATE.{PAN, D, A, I, F} occur in program order without the need for additional
 /// synchronization."
-///
-/// # Safety
-///
-/// - Changes the HW state of the executing core.
 #[inline(always)]
-pub unsafe fn local_irq_unmask() {
-    #[rustfmt::skip]
-    asm!(
-        "msr DAIFClr, {arg}",
-        arg = const daif_bits::IRQ,
-        options(nomem, nostack, preserves_flags)
-    );
+pub fn local_irq_unmask() {
+    unsafe {
+        asm!(
+            "msr DAIFClr, {arg}",
+            arg = const daif_bits::IRQ,
+            options(nomem, nostack, preserves_flags)
+        );
+    }
 }
 
 /// Mask IRQs on the executing core.
-///
-/// # Safety
-///
-/// - Changes the HW state of the executing core.
 #[inline(always)]
-pub unsafe fn local_irq_mask() {
-    #[rustfmt::skip]
-    asm!(
-        "msr DAIFSet, {arg}",
-        arg = const daif_bits::IRQ,
-        options(nomem, nostack, preserves_flags)
-    );
+pub fn local_irq_mask() {
+    unsafe {
+        asm!(
+            "msr DAIFSet, {arg}",
+            arg = const daif_bits::IRQ,
+            options(nomem, nostack, preserves_flags)
+        );
+    }
 }
 
 /// Mask IRQs on the executing core and return the previously saved interrupt mask bits (DAIF).
-///
-/// # Safety
-///
-/// - Changes the HW state of the executing core.
 #[inline(always)]
-pub unsafe fn local_irq_mask_save() -> u64 {
+pub fn local_irq_mask_save() -> u64 {
     let saved = DAIF.get();
     local_irq_mask();
 
@@ -127,12 +117,11 @@ pub unsafe fn local_irq_mask_save() -> u64 {
 
 /// Restore the interrupt mask bits (DAIF) using the callee's argument.
 ///
-/// # Safety
+/// # Invariant
 ///
-/// - Changes the HW state of the executing core.
 /// - No sanity checks on the input.
 #[inline(always)]
-pub unsafe fn local_irq_restore(saved: u64) {
+pub fn local_irq_restore(saved: u64) {
     DAIF.set(saved);
 }
 
diff --git a/19_kernel_heap/kernel/src/exception/asynchronous.rs b/19_kernel_heap/kernel/src/exception/asynchronous.rs
index d9d2767cf..3544e621d 100644
--- a/19_kernel_heap/kernel/src/exception/asynchronous.rs
+++ b/19_kernel_heap/kernel/src/exception/asynchronous.rs
@@ -151,13 +151,9 @@ impl<const MAX_INCLUSIVE: usize> fmt::Display for IRQNumber<{ MAX_INCLUSIVE }> {
 /// previous state before returning, so this is deemed safe.
 #[inline(always)]
 pub fn exec_with_irq_masked<T>(f: impl FnOnce() -> T) -> T {
-    let ret: T;
-
-    unsafe {
-        let saved = local_irq_mask_save();
-        ret = f();
-        local_irq_restore(saved);
-    }
+    let saved = local_irq_mask_save();
+    let ret = f();
+    local_irq_restore(saved);
 
     ret
 }
diff --git a/19_kernel_heap/kernel/src/panic_wait.rs b/19_kernel_heap/kernel/src/panic_wait.rs
index c8e86fbde..c11ec67ec 100644
--- a/19_kernel_heap/kernel/src/panic_wait.rs
+++ b/19_kernel_heap/kernel/src/panic_wait.rs
@@ -61,7 +61,7 @@ fn panic_prevent_reenter() {
 fn panic(info: &PanicInfo) -> ! {
     use crate::time::interface::TimeManager;
 
-    unsafe { exception::asynchronous::local_irq_mask() };
+    exception::asynchronous::local_irq_mask();
 
     // Protect against panic infinite loops if any of the following code panics itself.
     panic_prevent_reenter();
diff --git a/19_kernel_heap/kernel/tests/04_exception_irq_sanity.rs b/19_kernel_heap/kernel/tests/04_exception_irq_sanity.rs
index 7b9628d57..e93a4caf6 100644
--- a/19_kernel_heap/kernel/tests/04_exception_irq_sanity.rs
+++ b/19_kernel_heap/kernel/tests/04_exception_irq_sanity.rs
@@ -34,21 +34,21 @@ fn local_irq_mask_works() {
     // Precondition: IRQs are unmasked.
     assert!(exception::asynchronous::is_local_irq_masked());
 
-    unsafe { exception::asynchronous::local_irq_mask() };
+    exception::asynchronous::local_irq_mask();
     assert!(!exception::asynchronous::is_local_irq_masked());
 
     // Restore earlier state.
-    unsafe { exception::asynchronous::local_irq_unmask() };
+    exception::asynchronous::local_irq_unmask();
 }
 
 /// Check that IRQ unmasking works.
 #[kernel_test]
 fn local_irq_unmask_works() {
     // Precondition: IRQs are masked.
-    unsafe { exception::asynchronous::local_irq_mask() };
+    exception::asynchronous::local_irq_mask();
     assert!(!exception::asynchronous::is_local_irq_masked());
 
-    unsafe { exception::asynchronous::local_irq_unmask() };
+    exception::asynchronous::local_irq_unmask();
     assert!(exception::asynchronous::is_local_irq_masked());
 }
 
@@ -58,12 +58,12 @@ fn local_irq_mask_save_works() {
     // Precondition: IRQs are unmasked.
     assert!(exception::asynchronous::is_local_irq_masked());
 
-    let first = unsafe { exception::asynchronous::local_irq_mask_save() };
+    let first = exception::asynchronous::local_irq_mask_save();
     assert!(!exception::asynchronous::is_local_irq_masked());
 
-    let second = unsafe { exception::asynchronous::local_irq_mask_save() };
+    let second = exception::asynchronous::local_irq_mask_save();
     assert_ne!(first, second);
 
-    unsafe { exception::asynchronous::local_irq_restore(first) };
+    exception::asynchronous::local_irq_restore(first);
     assert!(exception::asynchronous::is_local_irq_masked());
 }

From bb2f1c79b7cc61c528d0ed0bb40597e88cff814b Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Thu, 19 May 2022 23:19:25 +0200
Subject: [PATCH 174/214] Remove more unjustified unsafe

---
 11_exceptions_part1_groundwork/README.md      | 28 +++++++++----------
 .../src/_arch/aarch64/exception.rs            | 24 ++++++++--------
 .../kernel/src/_arch/aarch64/exception.rs     | 24 ++++++++--------
 13_exceptions_part2_peripheral_IRQs/README.md | 10 +++----
 .../kernel/src/_arch/aarch64/exception.rs     | 26 ++++++++---------
 .../kernel/src/_arch/aarch64/exception.rs     | 26 ++++++++---------
 .../kernel/src/_arch/aarch64/exception.rs     | 26 ++++++++---------
 .../kernel/src/_arch/aarch64/exception.rs     | 26 ++++++++---------
 .../kernel/src/_arch/aarch64/exception.rs     | 26 ++++++++---------
 .../kernel/src/_arch/aarch64/exception.rs     | 26 ++++++++---------
 .../kernel/src/_arch/aarch64/exception.rs     | 26 ++++++++---------
 11 files changed, 134 insertions(+), 134 deletions(-)

diff --git a/11_exceptions_part1_groundwork/README.md b/11_exceptions_part1_groundwork/README.md
index d0b4b7f72..4fc713a59 100644
--- a/11_exceptions_part1_groundwork/README.md
+++ b/11_exceptions_part1_groundwork/README.md
@@ -328,7 +328,7 @@ The actual handlers referenced from the assembly can now branch to it for the ti
 
 ```rust
 #[no_mangle]
-unsafe extern "C" fn current_elx_irq(e: &mut ExceptionContext) {
+extern "C" fn current_elx_irq(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 ```
@@ -367,7 +367,7 @@ To survive this exception, the respective handler has a special demo case:
 
 ```rust
 #[no_mangle]
-unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
+extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
     if e.fault_address_valid() {
         let far_el1 = FAR_EL1.get();
 
@@ -565,17 +565,17 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs 1
 +//------------------------------------------------------------------------------
 +
 +#[no_mangle]
-+unsafe extern "C" fn current_el0_synchronous(_e: &mut ExceptionContext) {
++extern "C" fn current_el0_synchronous(_e: &mut ExceptionContext) {
 +    panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 +}
 +
 +#[no_mangle]
-+unsafe extern "C" fn current_el0_irq(_e: &mut ExceptionContext) {
++extern "C" fn current_el0_irq(_e: &mut ExceptionContext) {
 +    panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 +}
 +
 +#[no_mangle]
-+unsafe extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
++extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
 +    panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 +}
 +
@@ -584,7 +584,7 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs 1
 +//------------------------------------------------------------------------------
 +
 +#[no_mangle]
-+unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
++extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
 +    if e.fault_address_valid() {
 +        let far_el1 = FAR_EL1.get();
 +
@@ -601,12 +601,12 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs 1
 +}
 +
 +#[no_mangle]
-+unsafe extern "C" fn current_elx_irq(e: &mut ExceptionContext) {
++extern "C" fn current_elx_irq(e: &mut ExceptionContext) {
 +    default_exception_handler(e);
 +}
 +
 +#[no_mangle]
-+unsafe extern "C" fn current_elx_serror(e: &mut ExceptionContext) {
++extern "C" fn current_elx_serror(e: &mut ExceptionContext) {
 +    default_exception_handler(e);
 +}
 +
@@ -615,17 +615,17 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs 1
 +//------------------------------------------------------------------------------
 +
 +#[no_mangle]
-+unsafe extern "C" fn lower_aarch64_synchronous(e: &mut ExceptionContext) {
++extern "C" fn lower_aarch64_synchronous(e: &mut ExceptionContext) {
 +    default_exception_handler(e);
 +}
 +
 +#[no_mangle]
-+unsafe extern "C" fn lower_aarch64_irq(e: &mut ExceptionContext) {
++extern "C" fn lower_aarch64_irq(e: &mut ExceptionContext) {
 +    default_exception_handler(e);
 +}
 +
 +#[no_mangle]
-+unsafe extern "C" fn lower_aarch64_serror(e: &mut ExceptionContext) {
++extern "C" fn lower_aarch64_serror(e: &mut ExceptionContext) {
 +    default_exception_handler(e);
 +}
 +
@@ -634,17 +634,17 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs 1
 +//------------------------------------------------------------------------------
 +
 +#[no_mangle]
-+unsafe extern "C" fn lower_aarch32_synchronous(e: &mut ExceptionContext) {
++extern "C" fn lower_aarch32_synchronous(e: &mut ExceptionContext) {
 +    default_exception_handler(e);
 +}
 +
 +#[no_mangle]
-+unsafe extern "C" fn lower_aarch32_irq(e: &mut ExceptionContext) {
++extern "C" fn lower_aarch32_irq(e: &mut ExceptionContext) {
 +    default_exception_handler(e);
 +}
 +
 +#[no_mangle]
-+unsafe extern "C" fn lower_aarch32_serror(e: &mut ExceptionContext) {
++extern "C" fn lower_aarch32_serror(e: &mut ExceptionContext) {
 +    default_exception_handler(e);
 +}
 +
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
index 7d3b45722..c72fb8855 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
@@ -67,17 +67,17 @@ fn default_exception_handler(exc: &ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_synchronous(_e: &mut ExceptionContext) {
+extern "C" fn current_el0_synchronous(_e: &mut ExceptionContext) {
     panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_irq(_e: &mut ExceptionContext) {
+extern "C" fn current_el0_irq(_e: &mut ExceptionContext) {
     panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
+extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
     panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
@@ -86,7 +86,7 @@ unsafe extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
+extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
     if e.fault_address_valid() {
         let far_el1 = FAR_EL1.get();
 
@@ -103,12 +103,12 @@ unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_elx_irq(e: &mut ExceptionContext) {
+extern "C" fn current_elx_irq(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_elx_serror(e: &mut ExceptionContext) {
+extern "C" fn current_elx_serror(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
@@ -117,17 +117,17 @@ unsafe extern "C" fn current_elx_serror(e: &mut ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch64_synchronous(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch64_synchronous(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch64_irq(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch64_irq(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch64_serror(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch64_serror(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
@@ -136,17 +136,17 @@ unsafe extern "C" fn lower_aarch64_serror(e: &mut ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch32_synchronous(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch32_synchronous(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch32_irq(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch32_irq(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch32_serror(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch32_serror(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
diff --git a/12_integrated_testing/kernel/src/_arch/aarch64/exception.rs b/12_integrated_testing/kernel/src/_arch/aarch64/exception.rs
index 0f83052c1..5664605e0 100644
--- a/12_integrated_testing/kernel/src/_arch/aarch64/exception.rs
+++ b/12_integrated_testing/kernel/src/_arch/aarch64/exception.rs
@@ -67,17 +67,17 @@ fn default_exception_handler(exc: &ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_synchronous(_e: &mut ExceptionContext) {
+extern "C" fn current_el0_synchronous(_e: &mut ExceptionContext) {
     panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_irq(_e: &mut ExceptionContext) {
+extern "C" fn current_el0_irq(_e: &mut ExceptionContext) {
     panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
+extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
     panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
@@ -86,7 +86,7 @@ unsafe extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
+extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
     #[cfg(feature = "test_build")]
     {
         const TEST_SVC_ID: u64 = 0x1337;
@@ -102,12 +102,12 @@ unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_elx_irq(e: &mut ExceptionContext) {
+extern "C" fn current_elx_irq(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_elx_serror(e: &mut ExceptionContext) {
+extern "C" fn current_elx_serror(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
@@ -116,17 +116,17 @@ unsafe extern "C" fn current_elx_serror(e: &mut ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch64_synchronous(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch64_synchronous(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch64_irq(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch64_irq(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch64_serror(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch64_serror(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
@@ -135,17 +135,17 @@ unsafe extern "C" fn lower_aarch64_serror(e: &mut ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch32_synchronous(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch32_synchronous(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch32_irq(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch32_irq(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch32_serror(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch32_serror(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index 65be428aa..74eb28c32 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -367,8 +367,8 @@ the the implementation of the trait's handling function:
 
 ```rust
 #[no_mangle]
-unsafe extern "C" fn current_elx_irq(_e: &mut ExceptionContext) {
-    let token = &exception::asynchronous::IRQContext::new();
+extern "C" fn current_elx_irq(_e: &mut ExceptionContext) {
+    let token = unsafe { &exception::asynchronous::IRQContext::new() };
     exception::asynchronous::irq_manager().handle_pending_irqs(token);
 }
 ```
@@ -887,10 +887,10 @@ diff -uNr 12_integrated_testing/kernel/src/_arch/aarch64/exception.rs 13_excepti
  }
 
  #[no_mangle]
--unsafe extern "C" fn current_elx_irq(e: &mut ExceptionContext) {
+-extern "C" fn current_elx_irq(e: &mut ExceptionContext) {
 -    default_exception_handler(e);
-+unsafe extern "C" fn current_elx_irq(_e: &mut ExceptionContext) {
-+    let token = &exception::asynchronous::IRQContext::new();
++extern "C" fn current_elx_irq(_e: &mut ExceptionContext) {
++    let token = unsafe { &exception::asynchronous::IRQContext::new() };
 +    exception::asynchronous::irq_manager().handle_pending_irqs(token);
  }
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception.rs
index fa6748a6d..3aa6fb242 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception.rs
@@ -68,17 +68,17 @@ fn default_exception_handler(exc: &ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_synchronous(_e: &mut ExceptionContext) {
+extern "C" fn current_el0_synchronous(_e: &mut ExceptionContext) {
     panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_irq(_e: &mut ExceptionContext) {
+extern "C" fn current_el0_irq(_e: &mut ExceptionContext) {
     panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
+extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
     panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
@@ -87,7 +87,7 @@ unsafe extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
+extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
     #[cfg(feature = "test_build")]
     {
         const TEST_SVC_ID: u64 = 0x1337;
@@ -103,13 +103,13 @@ unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_elx_irq(_e: &mut ExceptionContext) {
-    let token = &exception::asynchronous::IRQContext::new();
+extern "C" fn current_elx_irq(_e: &mut ExceptionContext) {
+    let token = unsafe { &exception::asynchronous::IRQContext::new() };
     exception::asynchronous::irq_manager().handle_pending_irqs(token);
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_elx_serror(e: &mut ExceptionContext) {
+extern "C" fn current_elx_serror(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
@@ -118,17 +118,17 @@ unsafe extern "C" fn current_elx_serror(e: &mut ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch64_synchronous(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch64_synchronous(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch64_irq(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch64_irq(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch64_serror(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch64_serror(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
@@ -137,17 +137,17 @@ unsafe extern "C" fn lower_aarch64_serror(e: &mut ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch32_synchronous(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch32_synchronous(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch32_irq(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch32_irq(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch32_serror(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch32_serror(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception.rs
index fa6748a6d..3aa6fb242 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception.rs
@@ -68,17 +68,17 @@ fn default_exception_handler(exc: &ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_synchronous(_e: &mut ExceptionContext) {
+extern "C" fn current_el0_synchronous(_e: &mut ExceptionContext) {
     panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_irq(_e: &mut ExceptionContext) {
+extern "C" fn current_el0_irq(_e: &mut ExceptionContext) {
     panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
+extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
     panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
@@ -87,7 +87,7 @@ unsafe extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
+extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
     #[cfg(feature = "test_build")]
     {
         const TEST_SVC_ID: u64 = 0x1337;
@@ -103,13 +103,13 @@ unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_elx_irq(_e: &mut ExceptionContext) {
-    let token = &exception::asynchronous::IRQContext::new();
+extern "C" fn current_elx_irq(_e: &mut ExceptionContext) {
+    let token = unsafe { &exception::asynchronous::IRQContext::new() };
     exception::asynchronous::irq_manager().handle_pending_irqs(token);
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_elx_serror(e: &mut ExceptionContext) {
+extern "C" fn current_elx_serror(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
@@ -118,17 +118,17 @@ unsafe extern "C" fn current_elx_serror(e: &mut ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch64_synchronous(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch64_synchronous(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch64_irq(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch64_irq(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch64_serror(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch64_serror(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
@@ -137,17 +137,17 @@ unsafe extern "C" fn lower_aarch64_serror(e: &mut ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch32_synchronous(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch32_synchronous(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch32_irq(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch32_irq(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch32_serror(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch32_serror(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception.rs
index fa6748a6d..3aa6fb242 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception.rs
@@ -68,17 +68,17 @@ fn default_exception_handler(exc: &ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_synchronous(_e: &mut ExceptionContext) {
+extern "C" fn current_el0_synchronous(_e: &mut ExceptionContext) {
     panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_irq(_e: &mut ExceptionContext) {
+extern "C" fn current_el0_irq(_e: &mut ExceptionContext) {
     panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
+extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
     panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
@@ -87,7 +87,7 @@ unsafe extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
+extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
     #[cfg(feature = "test_build")]
     {
         const TEST_SVC_ID: u64 = 0x1337;
@@ -103,13 +103,13 @@ unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_elx_irq(_e: &mut ExceptionContext) {
-    let token = &exception::asynchronous::IRQContext::new();
+extern "C" fn current_elx_irq(_e: &mut ExceptionContext) {
+    let token = unsafe { &exception::asynchronous::IRQContext::new() };
     exception::asynchronous::irq_manager().handle_pending_irqs(token);
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_elx_serror(e: &mut ExceptionContext) {
+extern "C" fn current_elx_serror(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
@@ -118,17 +118,17 @@ unsafe extern "C" fn current_elx_serror(e: &mut ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch64_synchronous(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch64_synchronous(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch64_irq(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch64_irq(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch64_serror(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch64_serror(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
@@ -137,17 +137,17 @@ unsafe extern "C" fn lower_aarch64_serror(e: &mut ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch32_synchronous(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch32_synchronous(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch32_irq(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch32_irq(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch32_serror(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch32_serror(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception.rs
index fa6748a6d..3aa6fb242 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception.rs
@@ -68,17 +68,17 @@ fn default_exception_handler(exc: &ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_synchronous(_e: &mut ExceptionContext) {
+extern "C" fn current_el0_synchronous(_e: &mut ExceptionContext) {
     panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_irq(_e: &mut ExceptionContext) {
+extern "C" fn current_el0_irq(_e: &mut ExceptionContext) {
     panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
+extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
     panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
@@ -87,7 +87,7 @@ unsafe extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
+extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
     #[cfg(feature = "test_build")]
     {
         const TEST_SVC_ID: u64 = 0x1337;
@@ -103,13 +103,13 @@ unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_elx_irq(_e: &mut ExceptionContext) {
-    let token = &exception::asynchronous::IRQContext::new();
+extern "C" fn current_elx_irq(_e: &mut ExceptionContext) {
+    let token = unsafe { &exception::asynchronous::IRQContext::new() };
     exception::asynchronous::irq_manager().handle_pending_irqs(token);
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_elx_serror(e: &mut ExceptionContext) {
+extern "C" fn current_elx_serror(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
@@ -118,17 +118,17 @@ unsafe extern "C" fn current_elx_serror(e: &mut ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch64_synchronous(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch64_synchronous(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch64_irq(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch64_irq(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch64_serror(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch64_serror(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
@@ -137,17 +137,17 @@ unsafe extern "C" fn lower_aarch64_serror(e: &mut ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch32_synchronous(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch32_synchronous(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch32_irq(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch32_irq(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch32_serror(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch32_serror(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/exception.rs b/17_kernel_symbols/kernel/src/_arch/aarch64/exception.rs
index 3672466ca..1d720f3ef 100644
--- a/17_kernel_symbols/kernel/src/_arch/aarch64/exception.rs
+++ b/17_kernel_symbols/kernel/src/_arch/aarch64/exception.rs
@@ -68,17 +68,17 @@ fn default_exception_handler(exc: &ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_synchronous(_e: &mut ExceptionContext) {
+extern "C" fn current_el0_synchronous(_e: &mut ExceptionContext) {
     panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_irq(_e: &mut ExceptionContext) {
+extern "C" fn current_el0_irq(_e: &mut ExceptionContext) {
     panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
+extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
     panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
@@ -87,7 +87,7 @@ unsafe extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
+extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
     #[cfg(feature = "test_build")]
     {
         const TEST_SVC_ID: u64 = 0x1337;
@@ -103,13 +103,13 @@ unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_elx_irq(_e: &mut ExceptionContext) {
-    let token = &exception::asynchronous::IRQContext::new();
+extern "C" fn current_elx_irq(_e: &mut ExceptionContext) {
+    let token = unsafe { &exception::asynchronous::IRQContext::new() };
     exception::asynchronous::irq_manager().handle_pending_irqs(token);
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_elx_serror(e: &mut ExceptionContext) {
+extern "C" fn current_elx_serror(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
@@ -118,17 +118,17 @@ unsafe extern "C" fn current_elx_serror(e: &mut ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch64_synchronous(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch64_synchronous(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch64_irq(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch64_irq(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch64_serror(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch64_serror(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
@@ -137,17 +137,17 @@ unsafe extern "C" fn lower_aarch64_serror(e: &mut ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch32_synchronous(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch32_synchronous(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch32_irq(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch32_irq(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch32_serror(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch32_serror(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
diff --git a/18_backtrace/kernel/src/_arch/aarch64/exception.rs b/18_backtrace/kernel/src/_arch/aarch64/exception.rs
index 17ec30095..e03e382f1 100644
--- a/18_backtrace/kernel/src/_arch/aarch64/exception.rs
+++ b/18_backtrace/kernel/src/_arch/aarch64/exception.rs
@@ -72,17 +72,17 @@ fn default_exception_handler(exc: &ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_synchronous(_e: &mut ExceptionContext) {
+extern "C" fn current_el0_synchronous(_e: &mut ExceptionContext) {
     panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_irq(_e: &mut ExceptionContext) {
+extern "C" fn current_el0_irq(_e: &mut ExceptionContext) {
     panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
+extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
     panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
@@ -91,7 +91,7 @@ unsafe extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
+extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
     #[cfg(feature = "test_build")]
     {
         const TEST_SVC_ID: u64 = 0x1337;
@@ -107,13 +107,13 @@ unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_elx_irq(_e: &mut ExceptionContext) {
-    let token = &exception::asynchronous::IRQContext::new();
+extern "C" fn current_elx_irq(_e: &mut ExceptionContext) {
+    let token = unsafe { &exception::asynchronous::IRQContext::new() };
     exception::asynchronous::irq_manager().handle_pending_irqs(token);
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_elx_serror(e: &mut ExceptionContext) {
+extern "C" fn current_elx_serror(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
@@ -122,17 +122,17 @@ unsafe extern "C" fn current_elx_serror(e: &mut ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch64_synchronous(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch64_synchronous(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch64_irq(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch64_irq(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch64_serror(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch64_serror(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
@@ -141,17 +141,17 @@ unsafe extern "C" fn lower_aarch64_serror(e: &mut ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch32_synchronous(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch32_synchronous(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch32_irq(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch32_irq(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch32_serror(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch32_serror(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
diff --git a/19_kernel_heap/kernel/src/_arch/aarch64/exception.rs b/19_kernel_heap/kernel/src/_arch/aarch64/exception.rs
index 17ec30095..e03e382f1 100644
--- a/19_kernel_heap/kernel/src/_arch/aarch64/exception.rs
+++ b/19_kernel_heap/kernel/src/_arch/aarch64/exception.rs
@@ -72,17 +72,17 @@ fn default_exception_handler(exc: &ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_synchronous(_e: &mut ExceptionContext) {
+extern "C" fn current_el0_synchronous(_e: &mut ExceptionContext) {
     panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_irq(_e: &mut ExceptionContext) {
+extern "C" fn current_el0_irq(_e: &mut ExceptionContext) {
     panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
+extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
     panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
 }
 
@@ -91,7 +91,7 @@ unsafe extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
+extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
     #[cfg(feature = "test_build")]
     {
         const TEST_SVC_ID: u64 = 0x1337;
@@ -107,13 +107,13 @@ unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_elx_irq(_e: &mut ExceptionContext) {
-    let token = &exception::asynchronous::IRQContext::new();
+extern "C" fn current_elx_irq(_e: &mut ExceptionContext) {
+    let token = unsafe { &exception::asynchronous::IRQContext::new() };
     exception::asynchronous::irq_manager().handle_pending_irqs(token);
 }
 
 #[no_mangle]
-unsafe extern "C" fn current_elx_serror(e: &mut ExceptionContext) {
+extern "C" fn current_elx_serror(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
@@ -122,17 +122,17 @@ unsafe extern "C" fn current_elx_serror(e: &mut ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch64_synchronous(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch64_synchronous(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch64_irq(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch64_irq(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch64_serror(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch64_serror(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
@@ -141,17 +141,17 @@ unsafe extern "C" fn lower_aarch64_serror(e: &mut ExceptionContext) {
 //------------------------------------------------------------------------------
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch32_synchronous(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch32_synchronous(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch32_irq(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch32_irq(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 
 #[no_mangle]
-unsafe extern "C" fn lower_aarch32_serror(e: &mut ExceptionContext) {
+extern "C" fn lower_aarch32_serror(e: &mut ExceptionContext) {
     default_exception_handler(e);
 }
 

From e6c3790cacc4edb7a0784cd9f7f615db0eb59b4a Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 23 May 2022 22:33:32 +0200
Subject: [PATCH 175/214] Remove .got section again

It seems that whatever bug or config mistake gave us .got entries back then has
since been resolved. Also add a sanity check to recognize should this happen
again.
---
 02_runtime_init/Makefile                         |  1 -
 02_runtime_init/README.md                        | 14 ++++++++++----
 02_runtime_init/src/bsp/raspberrypi/kernel.ld    |  9 ++++++++-
 03_hacky_hello_world/Makefile                    |  1 -
 03_hacky_hello_world/README.md                   |  2 +-
 .../src/bsp/raspberrypi/kernel.ld                |  9 ++++++++-
 04_safe_globals/Makefile                         |  1 -
 04_safe_globals/src/bsp/raspberrypi/kernel.ld    |  9 ++++++++-
 05_drivers_gpio_uart/Makefile                    |  1 -
 .../src/bsp/raspberrypi/kernel.ld                |  9 ++++++++-
 06_uart_chainloader/Makefile                     |  1 -
 06_uart_chainloader/README.md                    |  4 ++--
 .../src/bsp/raspberrypi/kernel.ld                |  9 ++++++++-
 07_timestamps/Makefile                           |  1 -
 07_timestamps/README.md                          |  4 ++--
 07_timestamps/src/bsp/raspberrypi/kernel.ld      |  9 ++++++++-
 08_hw_debug_JTAG/Makefile                        |  1 -
 08_hw_debug_JTAG/README.md                       |  2 +-
 08_hw_debug_JTAG/src/bsp/raspberrypi/kernel.ld   |  9 ++++++++-
 09_privilege_level/Makefile                      |  1 -
 09_privilege_level/src/bsp/raspberrypi/kernel.ld |  9 ++++++++-
 10_virtual_mem_part1_identity_mapping/Makefile   |  1 -
 10_virtual_mem_part1_identity_mapping/README.md  |  4 ++--
 .../src/bsp/raspberrypi/kernel.ld                |  9 ++++++++-
 11_exceptions_part1_groundwork/Makefile          |  1 -
 .../src/bsp/raspberrypi/kernel.ld                |  9 ++++++++-
 12_integrated_testing/Makefile                   |  1 -
 .../kernel/src/bsp/raspberrypi/kernel.ld         |  9 ++++++++-
 13_exceptions_part2_peripheral_IRQs/Makefile     |  1 -
 .../kernel/src/bsp/raspberrypi/kernel.ld         |  9 ++++++++-
 14_virtual_mem_part2_mmio_remap/Makefile         |  1 -
 14_virtual_mem_part2_mmio_remap/README.md        | 12 +++++++-----
 .../kernel/src/bsp/raspberrypi/kernel.ld         |  9 ++++++++-
 15_virtual_mem_part3_precomputed_tables/Makefile |  1 -
 .../README.md                                    | 11 ++++++++++-
 .../kernel/src/bsp/raspberrypi/kernel.ld         | 11 +++++++++--
 16_virtual_mem_part4_higher_half_kernel/Makefile |  1 -
 .../README.md                                    | 16 +++++++++-------
 .../kernel/src/bsp/raspberrypi/kernel.ld         |  9 ++++++++-
 17_kernel_symbols/Makefile                       |  1 -
 17_kernel_symbols/README.md                      |  6 ++----
 .../kernel/src/bsp/raspberrypi/kernel.ld         |  9 ++++++++-
 18_backtrace/Makefile                            |  1 -
 18_backtrace/README.md                           |  2 +-
 .../kernel/src/bsp/raspberrypi/kernel.ld         |  9 ++++++++-
 19_kernel_heap/Makefile                          |  1 -
 19_kernel_heap/README.md                         |  2 +-
 .../kernel/src/bsp/raspberrypi/kernel.ld         |  9 ++++++++-
 X1_JTAG_boot/Makefile                            |  1 -
 X1_JTAG_boot/src/bsp/raspberrypi/kernel.ld       |  9 ++++++++-
 50 files changed, 201 insertions(+), 70 deletions(-)

diff --git a/02_runtime_init/Makefile b/02_runtime_init/Makefile
index 49ca7b63b..af9bbc273 100644
--- a/02_runtime_init/Makefile
+++ b/02_runtime_init/Makefile
@@ -181,7 +181,6 @@ objdump: $(KERNEL_ELF)
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
-                --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
 ##------------------------------------------------------------------------------
diff --git a/02_runtime_init/README.md b/02_runtime_init/README.md
index 7e4f5c0a4..f9d59b301 100644
--- a/02_runtime_init/README.md
+++ b/02_runtime_init/README.md
@@ -52,12 +52,11 @@ diff -uNr 01_wait_forever/Cargo.toml 02_runtime_init/Cargo.toml
 diff -uNr 01_wait_forever/Makefile 02_runtime_init/Makefile
 --- 01_wait_forever/Makefile
 +++ 02_runtime_init/Makefile
-@@ -180,6 +180,8 @@
+@@ -180,6 +180,7 @@
  	$(call color_header, "Launching objdump")
  	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                  --section .text   \
 +                --section .rodata \
-+                --section .got    \
                  $(KERNEL_ELF) | rustfilt
 
  ##------------------------------------------------------------------------------
@@ -211,7 +210,7 @@ diff -uNr 01_wait_forever/src/bsp/raspberrypi/kernel.ld 02_runtime_init/src/bsp/
  /* The physical address at which the the kernel binary will be loaded by the Raspberry's firmware */
  __rpi_phys_binary_load_addr = 0x80000;
 
-@@ -13,21 +15,58 @@
+@@ -13,21 +15,65 @@
   *     4 == R
   *     5 == RX
   *     6 == RW
@@ -257,7 +256,6 @@ diff -uNr 01_wait_forever/src/bsp/raspberrypi/kernel.ld 02_runtime_init/src/bsp/
      } :segment_code
 +
 +    .rodata : ALIGN(8) { *(.rodata*) } :segment_code
-+    .got    : ALIGN(8) { *(.got)     } :segment_code
 +
 +    /***********************************************************************************************
 +    * Data + BSS
@@ -272,6 +270,14 @@ diff -uNr 01_wait_forever/src/bsp/raspberrypi/kernel.ld 02_runtime_init/src/bsp/
 +        . = ALIGN(16);
 +        __bss_end_exclusive = .;
 +    } :segment_data
++
++    /***********************************************************************************************
++    * Misc
++    ***********************************************************************************************/
++    .got : { *(.got*) }
++    ASSERT(SIZEOF(.got) == 0, "Relocation support not expected")
++
++    /DISCARD/ : { *(.comment*) }
  }
 
 diff -uNr 01_wait_forever/src/bsp/raspberrypi.rs 02_runtime_init/src/bsp/raspberrypi.rs
diff --git a/02_runtime_init/src/bsp/raspberrypi/kernel.ld b/02_runtime_init/src/bsp/raspberrypi/kernel.ld
index 007afd4a5..f6c188434 100644
--- a/02_runtime_init/src/bsp/raspberrypi/kernel.ld
+++ b/02_runtime_init/src/bsp/raspberrypi/kernel.ld
@@ -54,7 +54,6 @@ SECTIONS
     } :segment_code
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_code
-    .got    : ALIGN(8) { *(.got)     } :segment_code
 
     /***********************************************************************************************
     * Data + BSS
@@ -69,4 +68,12 @@ SECTIONS
         . = ALIGN(16);
         __bss_end_exclusive = .;
     } :segment_data
+
+    /***********************************************************************************************
+    * Misc
+    ***********************************************************************************************/
+    .got : { *(.got*) }
+    ASSERT(SIZEOF(.got) == 0, "Relocation support not expected")
+
+    /DISCARD/ : { *(.comment*) }
 }
diff --git a/03_hacky_hello_world/Makefile b/03_hacky_hello_world/Makefile
index 6e5cf32d2..8ddaf9e71 100644
--- a/03_hacky_hello_world/Makefile
+++ b/03_hacky_hello_world/Makefile
@@ -184,7 +184,6 @@ objdump: $(KERNEL_ELF)
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
-                --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
 ##------------------------------------------------------------------------------
diff --git a/03_hacky_hello_world/README.md b/03_hacky_hello_world/README.md
index 348e626a5..416cab024 100644
--- a/03_hacky_hello_world/README.md
+++ b/03_hacky_hello_world/README.md
@@ -95,7 +95,7 @@ diff -uNr 02_runtime_init/Makefile 03_hacky_hello_world/Makefile
 
 
 
-@@ -191,3 +194,27 @@
+@@ -190,3 +193,27 @@
  	$(call color_header, "Launching nm")
  	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
diff --git a/03_hacky_hello_world/src/bsp/raspberrypi/kernel.ld b/03_hacky_hello_world/src/bsp/raspberrypi/kernel.ld
index 007afd4a5..f6c188434 100644
--- a/03_hacky_hello_world/src/bsp/raspberrypi/kernel.ld
+++ b/03_hacky_hello_world/src/bsp/raspberrypi/kernel.ld
@@ -54,7 +54,6 @@ SECTIONS
     } :segment_code
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_code
-    .got    : ALIGN(8) { *(.got)     } :segment_code
 
     /***********************************************************************************************
     * Data + BSS
@@ -69,4 +68,12 @@ SECTIONS
         . = ALIGN(16);
         __bss_end_exclusive = .;
     } :segment_data
+
+    /***********************************************************************************************
+    * Misc
+    ***********************************************************************************************/
+    .got : { *(.got*) }
+    ASSERT(SIZEOF(.got) == 0, "Relocation support not expected")
+
+    /DISCARD/ : { *(.comment*) }
 }
diff --git a/04_safe_globals/Makefile b/04_safe_globals/Makefile
index 6e5cf32d2..8ddaf9e71 100644
--- a/04_safe_globals/Makefile
+++ b/04_safe_globals/Makefile
@@ -184,7 +184,6 @@ objdump: $(KERNEL_ELF)
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
-                --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
 ##------------------------------------------------------------------------------
diff --git a/04_safe_globals/src/bsp/raspberrypi/kernel.ld b/04_safe_globals/src/bsp/raspberrypi/kernel.ld
index 007afd4a5..f6c188434 100644
--- a/04_safe_globals/src/bsp/raspberrypi/kernel.ld
+++ b/04_safe_globals/src/bsp/raspberrypi/kernel.ld
@@ -54,7 +54,6 @@ SECTIONS
     } :segment_code
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_code
-    .got    : ALIGN(8) { *(.got)     } :segment_code
 
     /***********************************************************************************************
     * Data + BSS
@@ -69,4 +68,12 @@ SECTIONS
         . = ALIGN(16);
         __bss_end_exclusive = .;
     } :segment_data
+
+    /***********************************************************************************************
+    * Misc
+    ***********************************************************************************************/
+    .got : { *(.got*) }
+    ASSERT(SIZEOF(.got) == 0, "Relocation support not expected")
+
+    /DISCARD/ : { *(.comment*) }
 }
diff --git a/05_drivers_gpio_uart/Makefile b/05_drivers_gpio_uart/Makefile
index cd8097c85..183d7864c 100644
--- a/05_drivers_gpio_uart/Makefile
+++ b/05_drivers_gpio_uart/Makefile
@@ -203,7 +203,6 @@ objdump: $(KERNEL_ELF)
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
-                --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
 ##------------------------------------------------------------------------------
diff --git a/05_drivers_gpio_uart/src/bsp/raspberrypi/kernel.ld b/05_drivers_gpio_uart/src/bsp/raspberrypi/kernel.ld
index 007afd4a5..f6c188434 100644
--- a/05_drivers_gpio_uart/src/bsp/raspberrypi/kernel.ld
+++ b/05_drivers_gpio_uart/src/bsp/raspberrypi/kernel.ld
@@ -54,7 +54,6 @@ SECTIONS
     } :segment_code
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_code
-    .got    : ALIGN(8) { *(.got)     } :segment_code
 
     /***********************************************************************************************
     * Data + BSS
@@ -69,4 +68,12 @@ SECTIONS
         . = ALIGN(16);
         __bss_end_exclusive = .;
     } :segment_data
+
+    /***********************************************************************************************
+    * Misc
+    ***********************************************************************************************/
+    .got : { *(.got*) }
+    ASSERT(SIZEOF(.got) == 0, "Relocation support not expected")
+
+    /DISCARD/ : { *(.comment*) }
 }
diff --git a/06_uart_chainloader/Makefile b/06_uart_chainloader/Makefile
index 6c60e8edd..91245573d 100644
--- a/06_uart_chainloader/Makefile
+++ b/06_uart_chainloader/Makefile
@@ -209,7 +209,6 @@ objdump: $(KERNEL_ELF)
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
-                --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
 ##------------------------------------------------------------------------------
diff --git a/06_uart_chainloader/README.md b/06_uart_chainloader/README.md
index 38f9cc05c..6e4e45309 100644
--- a/06_uart_chainloader/README.md
+++ b/06_uart_chainloader/README.md
@@ -249,7 +249,7 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
 
  ##------------------------------------------------------------------------------
  ## Run clippy
-@@ -232,7 +238,8 @@
+@@ -231,7 +237,8 @@
  ##------------------------------------------------------------------------------
  test_boot: $(KERNEL_BIN)
  	$(call color_header, "Boot test - $(BSP)")
@@ -399,7 +399,7 @@ diff -uNr 05_drivers_gpio_uart/src/bsp/raspberrypi/kernel.ld 06_uart_chainloader
      .text :
      {
          KEEP(*(.text._start))
-@@ -61,6 +61,10 @@
+@@ -60,6 +60,10 @@
      ***********************************************************************************************/
      .data : { *(.data*) } :segment_data
 
diff --git a/06_uart_chainloader/src/bsp/raspberrypi/kernel.ld b/06_uart_chainloader/src/bsp/raspberrypi/kernel.ld
index 4fd5bf6af..c84b62381 100644
--- a/06_uart_chainloader/src/bsp/raspberrypi/kernel.ld
+++ b/06_uart_chainloader/src/bsp/raspberrypi/kernel.ld
@@ -54,7 +54,6 @@ SECTIONS
     } :segment_code
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_code
-    .got    : ALIGN(8) { *(.got)     } :segment_code
 
     /***********************************************************************************************
     * Data + BSS
@@ -73,4 +72,12 @@ SECTIONS
         . = ALIGN(16);
         __bss_end_exclusive = .;
     } :segment_data
+
+    /***********************************************************************************************
+    * Misc
+    ***********************************************************************************************/
+    .got : { *(.got*) }
+    ASSERT(SIZEOF(.got) == 0, "Relocation support not expected")
+
+    /DISCARD/ : { *(.comment*) }
 }
diff --git a/07_timestamps/Makefile b/07_timestamps/Makefile
index b89cee8c5..c183c6061 100644
--- a/07_timestamps/Makefile
+++ b/07_timestamps/Makefile
@@ -203,7 +203,6 @@ objdump: $(KERNEL_ELF)
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
-                --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
 ##------------------------------------------------------------------------------
diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index 2f4ab3235..1126d9b74 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -150,7 +150,7 @@ diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
 
  ##------------------------------------------------------------------------------
  ## Run clippy
-@@ -238,8 +232,7 @@
+@@ -237,8 +231,7 @@
  ##------------------------------------------------------------------------------
  test_boot: $(KERNEL_BIN)
  	$(call color_header, "Boot test - $(BSP)")
@@ -482,7 +482,7 @@ diff -uNr 06_uart_chainloader/src/bsp/raspberrypi/kernel.ld 07_timestamps/src/bs
      .text :
      {
          KEEP(*(.text._start))
-@@ -61,10 +61,6 @@
+@@ -60,10 +60,6 @@
      ***********************************************************************************************/
      .data : { *(.data*) } :segment_data
 
diff --git a/07_timestamps/src/bsp/raspberrypi/kernel.ld b/07_timestamps/src/bsp/raspberrypi/kernel.ld
index 007afd4a5..f6c188434 100644
--- a/07_timestamps/src/bsp/raspberrypi/kernel.ld
+++ b/07_timestamps/src/bsp/raspberrypi/kernel.ld
@@ -54,7 +54,6 @@ SECTIONS
     } :segment_code
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_code
-    .got    : ALIGN(8) { *(.got)     } :segment_code
 
     /***********************************************************************************************
     * Data + BSS
@@ -69,4 +68,12 @@ SECTIONS
         . = ALIGN(16);
         __bss_end_exclusive = .;
     } :segment_data
+
+    /***********************************************************************************************
+    * Misc
+    ***********************************************************************************************/
+    .got : { *(.got*) }
+    ASSERT(SIZEOF(.got) == 0, "Relocation support not expected")
+
+    /DISCARD/ : { *(.comment*) }
 }
diff --git a/08_hw_debug_JTAG/Makefile b/08_hw_debug_JTAG/Makefile
index 138c55547..3202f53ab 100644
--- a/08_hw_debug_JTAG/Makefile
+++ b/08_hw_debug_JTAG/Makefile
@@ -214,7 +214,6 @@ objdump: $(KERNEL_ELF)
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
-                --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
 ##------------------------------------------------------------------------------
diff --git a/08_hw_debug_JTAG/README.md b/08_hw_debug_JTAG/README.md
index 7f8a1846c..53f868072 100644
--- a/08_hw_debug_JTAG/README.md
+++ b/08_hw_debug_JTAG/README.md
@@ -364,7 +364,7 @@ diff -uNr 07_timestamps/Makefile 08_hw_debug_JTAG/Makefile
  endif
 
 
-@@ -215,6 +226,35 @@
+@@ -214,6 +225,35 @@
 
 
 
diff --git a/08_hw_debug_JTAG/src/bsp/raspberrypi/kernel.ld b/08_hw_debug_JTAG/src/bsp/raspberrypi/kernel.ld
index 007afd4a5..f6c188434 100644
--- a/08_hw_debug_JTAG/src/bsp/raspberrypi/kernel.ld
+++ b/08_hw_debug_JTAG/src/bsp/raspberrypi/kernel.ld
@@ -54,7 +54,6 @@ SECTIONS
     } :segment_code
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_code
-    .got    : ALIGN(8) { *(.got)     } :segment_code
 
     /***********************************************************************************************
     * Data + BSS
@@ -69,4 +68,12 @@ SECTIONS
         . = ALIGN(16);
         __bss_end_exclusive = .;
     } :segment_data
+
+    /***********************************************************************************************
+    * Misc
+    ***********************************************************************************************/
+    .got : { *(.got*) }
+    ASSERT(SIZEOF(.got) == 0, "Relocation support not expected")
+
+    /DISCARD/ : { *(.comment*) }
 }
diff --git a/09_privilege_level/Makefile b/09_privilege_level/Makefile
index 138c55547..3202f53ab 100644
--- a/09_privilege_level/Makefile
+++ b/09_privilege_level/Makefile
@@ -214,7 +214,6 @@ objdump: $(KERNEL_ELF)
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
-                --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
 ##------------------------------------------------------------------------------
diff --git a/09_privilege_level/src/bsp/raspberrypi/kernel.ld b/09_privilege_level/src/bsp/raspberrypi/kernel.ld
index 007afd4a5..f6c188434 100644
--- a/09_privilege_level/src/bsp/raspberrypi/kernel.ld
+++ b/09_privilege_level/src/bsp/raspberrypi/kernel.ld
@@ -54,7 +54,6 @@ SECTIONS
     } :segment_code
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_code
-    .got    : ALIGN(8) { *(.got)     } :segment_code
 
     /***********************************************************************************************
     * Data + BSS
@@ -69,4 +68,12 @@ SECTIONS
         . = ALIGN(16);
         __bss_end_exclusive = .;
     } :segment_data
+
+    /***********************************************************************************************
+    * Misc
+    ***********************************************************************************************/
+    .got : { *(.got*) }
+    ASSERT(SIZEOF(.got) == 0, "Relocation support not expected")
+
+    /DISCARD/ : { *(.comment*) }
 }
diff --git a/10_virtual_mem_part1_identity_mapping/Makefile b/10_virtual_mem_part1_identity_mapping/Makefile
index 138c55547..3202f53ab 100644
--- a/10_virtual_mem_part1_identity_mapping/Makefile
+++ b/10_virtual_mem_part1_identity_mapping/Makefile
@@ -214,7 +214,6 @@ objdump: $(KERNEL_ELF)
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
-                --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
 ##------------------------------------------------------------------------------
diff --git a/10_virtual_mem_part1_identity_mapping/README.md b/10_virtual_mem_part1_identity_mapping/README.md
index 8bfd54fa5..8345aef08 100644
--- a/10_virtual_mem_part1_identity_mapping/README.md
+++ b/10_virtual_mem_part1_identity_mapping/README.md
@@ -855,9 +855,9 @@ diff -uNr 09_privilege_level/src/bsp/raspberrypi/kernel.ld 10_virtual_mem_part1_
      .text :
      {
          KEEP(*(.text._start))
-@@ -56,6 +62,9 @@
+@@ -55,6 +61,9 @@
+
      .rodata : ALIGN(8) { *(.rodata*) } :segment_code
-     .got    : ALIGN(8) { *(.got)     } :segment_code
 
 +    . = ALIGN(PAGE_SIZE);
 +    __code_end_exclusive = .;
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/kernel.ld b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/kernel.ld
index 2ce4b44b9..6d939889b 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/kernel.ld
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/kernel.ld
@@ -60,7 +60,6 @@ SECTIONS
     } :segment_code
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_code
-    .got    : ALIGN(8) { *(.got)     } :segment_code
 
     . = ALIGN(PAGE_SIZE);
     __code_end_exclusive = .;
@@ -78,4 +77,12 @@ SECTIONS
         . = ALIGN(16);
         __bss_end_exclusive = .;
     } :segment_data
+
+    /***********************************************************************************************
+    * Misc
+    ***********************************************************************************************/
+    .got : { *(.got*) }
+    ASSERT(SIZEOF(.got) == 0, "Relocation support not expected")
+
+    /DISCARD/ : { *(.comment*) }
 }
diff --git a/11_exceptions_part1_groundwork/Makefile b/11_exceptions_part1_groundwork/Makefile
index 138c55547..3202f53ab 100644
--- a/11_exceptions_part1_groundwork/Makefile
+++ b/11_exceptions_part1_groundwork/Makefile
@@ -214,7 +214,6 @@ objdump: $(KERNEL_ELF)
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
-                --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
 ##------------------------------------------------------------------------------
diff --git a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/kernel.ld b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/kernel.ld
index 2ce4b44b9..6d939889b 100644
--- a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/kernel.ld
+++ b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/kernel.ld
@@ -60,7 +60,6 @@ SECTIONS
     } :segment_code
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_code
-    .got    : ALIGN(8) { *(.got)     } :segment_code
 
     . = ALIGN(PAGE_SIZE);
     __code_end_exclusive = .;
@@ -78,4 +77,12 @@ SECTIONS
         . = ALIGN(16);
         __bss_end_exclusive = .;
     } :segment_data
+
+    /***********************************************************************************************
+    * Misc
+    ***********************************************************************************************/
+    .got : { *(.got*) }
+    ASSERT(SIZEOF(.got) == 0, "Relocation support not expected")
+
+    /DISCARD/ : { *(.comment*) }
 }
diff --git a/12_integrated_testing/Makefile b/12_integrated_testing/Makefile
index 20007cecb..c75524618 100644
--- a/12_integrated_testing/Makefile
+++ b/12_integrated_testing/Makefile
@@ -226,7 +226,6 @@ objdump: $(KERNEL_ELF)
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
-                --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
 ##------------------------------------------------------------------------------
diff --git a/12_integrated_testing/kernel/src/bsp/raspberrypi/kernel.ld b/12_integrated_testing/kernel/src/bsp/raspberrypi/kernel.ld
index 2ce4b44b9..6d939889b 100644
--- a/12_integrated_testing/kernel/src/bsp/raspberrypi/kernel.ld
+++ b/12_integrated_testing/kernel/src/bsp/raspberrypi/kernel.ld
@@ -60,7 +60,6 @@ SECTIONS
     } :segment_code
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_code
-    .got    : ALIGN(8) { *(.got)     } :segment_code
 
     . = ALIGN(PAGE_SIZE);
     __code_end_exclusive = .;
@@ -78,4 +77,12 @@ SECTIONS
         . = ALIGN(16);
         __bss_end_exclusive = .;
     } :segment_data
+
+    /***********************************************************************************************
+    * Misc
+    ***********************************************************************************************/
+    .got : { *(.got*) }
+    ASSERT(SIZEOF(.got) == 0, "Relocation support not expected")
+
+    /DISCARD/ : { *(.comment*) }
 }
diff --git a/13_exceptions_part2_peripheral_IRQs/Makefile b/13_exceptions_part2_peripheral_IRQs/Makefile
index 20007cecb..c75524618 100644
--- a/13_exceptions_part2_peripheral_IRQs/Makefile
+++ b/13_exceptions_part2_peripheral_IRQs/Makefile
@@ -226,7 +226,6 @@ objdump: $(KERNEL_ELF)
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
-                --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
 ##------------------------------------------------------------------------------
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/kernel.ld b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/kernel.ld
index 2ce4b44b9..6d939889b 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/kernel.ld
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/kernel.ld
@@ -60,7 +60,6 @@ SECTIONS
     } :segment_code
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_code
-    .got    : ALIGN(8) { *(.got)     } :segment_code
 
     . = ALIGN(PAGE_SIZE);
     __code_end_exclusive = .;
@@ -78,4 +77,12 @@ SECTIONS
         . = ALIGN(16);
         __bss_end_exclusive = .;
     } :segment_data
+
+    /***********************************************************************************************
+    * Misc
+    ***********************************************************************************************/
+    .got : { *(.got*) }
+    ASSERT(SIZEOF(.got) == 0, "Relocation support not expected")
+
+    /DISCARD/ : { *(.comment*) }
 }
diff --git a/14_virtual_mem_part2_mmio_remap/Makefile b/14_virtual_mem_part2_mmio_remap/Makefile
index 20007cecb..c75524618 100644
--- a/14_virtual_mem_part2_mmio_remap/Makefile
+++ b/14_virtual_mem_part2_mmio_remap/Makefile
@@ -226,7 +226,6 @@ objdump: $(KERNEL_ELF)
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
-                --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
 ##------------------------------------------------------------------------------
diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index 30aa848b5..ff6e24168 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -1480,7 +1480,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/kernel.
                                               /*   | stack       */
          . += __rpi_phys_binary_load_addr;    /*   | growth      */
                                               /*   | direction   */
-@@ -68,6 +68,7 @@
+@@ -67,6 +67,7 @@
      /***********************************************************************************************
      * Data + BSS
      ***********************************************************************************************/
@@ -1488,11 +1488,10 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/kernel.
      .data : { *(.data*) } :segment_data
 
      /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
-@@ -78,4 +79,16 @@
-         . = ALIGN(16);
+@@ -78,6 +79,18 @@
          __bss_end_exclusive = .;
      } :segment_data
-+
+
 +    . = ALIGN(PAGE_SIZE);
 +    __data_end_exclusive = .;
 +
@@ -1504,7 +1503,10 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/kernel.
 +    __mmio_remap_end_exclusive = .;
 +
 +    ASSERT((. & PAGE_MASK) == 0, "MMIO remap reservation is not page aligned")
- }
++
+     /***********************************************************************************************
+     * Misc
+     ***********************************************************************************************/
 
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory/mmu.rs 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/memory/mmu.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory/mmu.rs
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/kernel.ld b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/kernel.ld
index c4a0b6a46..3f5f7043e 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/kernel.ld
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/kernel.ld
@@ -60,7 +60,6 @@ SECTIONS
     } :segment_code
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_code
-    .got    : ALIGN(8) { *(.got)     } :segment_code
 
     . = ALIGN(PAGE_SIZE);
     __code_end_exclusive = .;
@@ -91,4 +90,12 @@ SECTIONS
     __mmio_remap_end_exclusive = .;
 
     ASSERT((. & PAGE_MASK) == 0, "MMIO remap reservation is not page aligned")
+
+    /***********************************************************************************************
+    * Misc
+    ***********************************************************************************************/
+    .got : { *(.got*) }
+    ASSERT(SIZEOF(.got) == 0, "Relocation support not expected")
+
+    /DISCARD/ : { *(.comment*) }
 }
diff --git a/15_virtual_mem_part3_precomputed_tables/Makefile b/15_virtual_mem_part3_precomputed_tables/Makefile
index 0d34c181d..6edf29a49 100644
--- a/15_virtual_mem_part3_precomputed_tables/Makefile
+++ b/15_virtual_mem_part3_precomputed_tables/Makefile
@@ -245,7 +245,6 @@ objdump: $(KERNEL_ELF)
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
-                --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
 ##------------------------------------------------------------------------------
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index 186acc2a6..be59abb15 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -1077,6 +1077,15 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/kernel.ld 1
  PAGE_SIZE = 64K;
  PAGE_MASK = PAGE_SIZE - 1;
 
+@@ -89,7 +91,7 @@
+     . += 8 * 1024 * 1024;
+     __mmio_remap_end_exclusive = .;
+
+-    ASSERT((. & PAGE_MASK) == 0, "MMIO remap reservation is not page aligned")
++    ASSERT((. & PAGE_MASK) == 0, "End of boot core stack is not page aligned")
+
+     /***********************************************************************************************
+     * Misc
 
 diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
 --- 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
@@ -1888,7 +1897,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/Makefile 15_virtual_mem_part3_precompu
  	$(call color_progress_prefix, "Name")
  	@echo $(KERNEL_BIN)
  	$(call color_progress_prefix, "Size")
-@@ -301,6 +320,7 @@
+@@ -300,6 +319,7 @@
      TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
      TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/kernel.ld b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/kernel.ld
index 717d817e2..63393bae5 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/kernel.ld
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/kernel.ld
@@ -62,7 +62,6 @@ SECTIONS
     } :segment_code
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_code
-    .got    : ALIGN(8) { *(.got)     } :segment_code
 
     . = ALIGN(PAGE_SIZE);
     __code_end_exclusive = .;
@@ -92,5 +91,13 @@ SECTIONS
     . += 8 * 1024 * 1024;
     __mmio_remap_end_exclusive = .;
 
-    ASSERT((. & PAGE_MASK) == 0, "MMIO remap reservation is not page aligned")
+    ASSERT((. & PAGE_MASK) == 0, "End of boot core stack is not page aligned")
+
+    /***********************************************************************************************
+    * Misc
+    ***********************************************************************************************/
+    .got : { *(.got*) }
+    ASSERT(SIZEOF(.got) == 0, "Relocation support not expected")
+
+    /DISCARD/ : { *(.comment*) }
 }
diff --git a/16_virtual_mem_part4_higher_half_kernel/Makefile b/16_virtual_mem_part4_higher_half_kernel/Makefile
index 0d34c181d..6edf29a49 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Makefile
+++ b/16_virtual_mem_part4_higher_half_kernel/Makefile
@@ -245,7 +245,6 @@ objdump: $(KERNEL_ELF)
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
-                --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
 ##------------------------------------------------------------------------------
diff --git a/16_virtual_mem_part4_higher_half_kernel/README.md b/16_virtual_mem_part4_higher_half_kernel/README.md
index 0a30a2aab..cb50cab01 100644
--- a/16_virtual_mem_part4_higher_half_kernel/README.md
+++ b/16_virtual_mem_part4_higher_half_kernel/README.md
@@ -598,8 +598,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/ker
  SECTIONS
  {
 -    . =  __rpi_phys_dram_start_addr;
-+    . =  __kernel_virt_start_addr;
-
+-
 -    /***********************************************************************************************
 -    * Boot Core Stack
 -    ***********************************************************************************************/
@@ -611,7 +610,8 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/ker
 -                                             /*   | direction   */
 -        __boot_core_stack_end_exclusive = .; /*   |             */
 -    } :segment_boot_core_stack
--
++    . =  __kernel_virt_start_addr;
+
 -    ASSERT((. & PAGE_MASK) == 0, "End of boot core stack is not page aligned")
 +    ASSERT((. & PAGE_MASK) == 0, "Start of address space is not page aligned")
 
@@ -624,10 +624,11 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/ker
      {
          KEEP(*(.text._start))
          *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
-@@ -93,4 +88,23 @@
+@@ -91,6 +86,25 @@
+     . += 8 * 1024 * 1024;
      __mmio_remap_end_exclusive = .;
 
-     ASSERT((. & PAGE_MASK) == 0, "MMIO remap reservation is not page aligned")
++    ASSERT((. & PAGE_MASK) == 0, "MMIO remap reservation is not page aligned")
 +
 +    /***********************************************************************************************
 +    * Guard Page
@@ -646,8 +647,9 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/ker
 +        __boot_core_stack_end_exclusive = .; /*   |             */
 +    } :segment_boot_core_stack
 +
-+    ASSERT((. & PAGE_MASK) == 0, "End of boot core stack is not page aligned")
- }
+     ASSERT((. & PAGE_MASK) == 0, "End of boot core stack is not page aligned")
+
+     /***********************************************************************************************
 
 diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/memory/mmu.rs 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/memory/mmu.rs
 --- 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/memory/mmu.rs
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/kernel.ld b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/kernel.ld
index 146198297..c17b61f9e 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/kernel.ld
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/kernel.ld
@@ -57,7 +57,6 @@ SECTIONS
     } :segment_code
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_code
-    .got    : ALIGN(8) { *(.got)     } :segment_code
 
     . = ALIGN(PAGE_SIZE);
     __code_end_exclusive = .;
@@ -107,4 +106,12 @@ SECTIONS
     } :segment_boot_core_stack
 
     ASSERT((. & PAGE_MASK) == 0, "End of boot core stack is not page aligned")
+
+    /***********************************************************************************************
+    * Misc
+    ***********************************************************************************************/
+    .got : { *(.got*) }
+    ASSERT(SIZEOF(.got) == 0, "Relocation support not expected")
+
+    /DISCARD/ : { *(.comment*) }
 }
diff --git a/17_kernel_symbols/Makefile b/17_kernel_symbols/Makefile
index ec71b493b..3a7465a37 100644
--- a/17_kernel_symbols/Makefile
+++ b/17_kernel_symbols/Makefile
@@ -270,7 +270,6 @@ objdump: $(KERNEL_ELF)
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
-                --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
 ##------------------------------------------------------------------------------
diff --git a/17_kernel_symbols/README.md b/17_kernel_symbols/README.md
index d3b42b65a..b9d21aecd 100644
--- a/17_kernel_symbols/README.md
+++ b/17_kernel_symbols/README.md
@@ -293,14 +293,12 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/excep
 diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/kernel.ld 17_kernel_symbols/kernel/src/bsp/raspberrypi/kernel.ld
 --- 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/kernel.ld
 +++ 17_kernel_symbols/kernel/src/bsp/raspberrypi/kernel.ld
-@@ -56,8 +56,12 @@
+@@ -56,7 +56,11 @@
          *(.text*)                 /* Everything else */
      } :segment_code
 
 -    .rodata : ALIGN(8) { *(.rodata*) } :segment_code
--    .got    : ALIGN(8) { *(.got)     } :segment_code
 +    .rodata         : ALIGN(8) { *(.rodata*) } :segment_code
-+    .got            : ALIGN(8) { *(.got)     } :segment_code
 +    .kernel_symbols : ALIGN(8) {
 +        __kernel_symbols_start = .;
 +        . += 32 * 1024;
@@ -740,7 +738,7 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/Makefile 17_kernel_symbols/Mak
  	$(call color_header, "Generating docs")
  	@$(DOC_CMD) --document-private-items --open
 
-@@ -318,10 +343,19 @@
+@@ -317,10 +342,19 @@
      cd $(shell pwd)
 
      TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
diff --git a/17_kernel_symbols/kernel/src/bsp/raspberrypi/kernel.ld b/17_kernel_symbols/kernel/src/bsp/raspberrypi/kernel.ld
index 6fcbf31cf..193a5200b 100644
--- a/17_kernel_symbols/kernel/src/bsp/raspberrypi/kernel.ld
+++ b/17_kernel_symbols/kernel/src/bsp/raspberrypi/kernel.ld
@@ -57,7 +57,6 @@ SECTIONS
     } :segment_code
 
     .rodata         : ALIGN(8) { *(.rodata*) } :segment_code
-    .got            : ALIGN(8) { *(.got)     } :segment_code
     .kernel_symbols : ALIGN(8) {
         __kernel_symbols_start = .;
         . += 32 * 1024;
@@ -111,4 +110,12 @@ SECTIONS
     } :segment_boot_core_stack
 
     ASSERT((. & PAGE_MASK) == 0, "End of boot core stack is not page aligned")
+
+    /***********************************************************************************************
+    * Misc
+    ***********************************************************************************************/
+    .got : { *(.got*) }
+    ASSERT(SIZEOF(.got) == 0, "Relocation support not expected")
+
+    /DISCARD/ : { *(.comment*) }
 }
diff --git a/18_backtrace/Makefile b/18_backtrace/Makefile
index 5d660332c..eba659f0d 100644
--- a/18_backtrace/Makefile
+++ b/18_backtrace/Makefile
@@ -272,7 +272,6 @@ objdump: $(KERNEL_ELF)
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
-                --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
 ##------------------------------------------------------------------------------
diff --git a/18_backtrace/README.md b/18_backtrace/README.md
index f98eafc7b..c6417bdda 100644
--- a/18_backtrace/README.md
+++ b/18_backtrace/README.md
@@ -1253,7 +1253,7 @@ diff -uNr 17_kernel_symbols/Makefile 18_backtrace/Makefile
  OBJCOPY_CMD = rust-objcopy \
      --strip-all            \
      -O binary
-@@ -303,8 +305,7 @@
+@@ -302,8 +304,7 @@
  ##------------------------------------------------------------------------------
  ## Start GDB session
  ##------------------------------------------------------------------------------
diff --git a/18_backtrace/kernel/src/bsp/raspberrypi/kernel.ld b/18_backtrace/kernel/src/bsp/raspberrypi/kernel.ld
index 6fcbf31cf..193a5200b 100644
--- a/18_backtrace/kernel/src/bsp/raspberrypi/kernel.ld
+++ b/18_backtrace/kernel/src/bsp/raspberrypi/kernel.ld
@@ -57,7 +57,6 @@ SECTIONS
     } :segment_code
 
     .rodata         : ALIGN(8) { *(.rodata*) } :segment_code
-    .got            : ALIGN(8) { *(.got)     } :segment_code
     .kernel_symbols : ALIGN(8) {
         __kernel_symbols_start = .;
         . += 32 * 1024;
@@ -111,4 +110,12 @@ SECTIONS
     } :segment_boot_core_stack
 
     ASSERT((. & PAGE_MASK) == 0, "End of boot core stack is not page aligned")
+
+    /***********************************************************************************************
+    * Misc
+    ***********************************************************************************************/
+    .got : { *(.got*) }
+    ASSERT(SIZEOF(.got) == 0, "Relocation support not expected")
+
+    /DISCARD/ : { *(.comment*) }
 }
diff --git a/19_kernel_heap/Makefile b/19_kernel_heap/Makefile
index bd1bc8037..c9a7d593d 100644
--- a/19_kernel_heap/Makefile
+++ b/19_kernel_heap/Makefile
@@ -277,7 +277,6 @@ objdump: $(KERNEL_ELF)
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
-                --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
 ##------------------------------------------------------------------------------
diff --git a/19_kernel_heap/README.md b/19_kernel_heap/README.md
index 0b4e23484..8a39a2319 100644
--- a/19_kernel_heap/README.md
+++ b/19_kernel_heap/README.md
@@ -512,7 +512,7 @@ diff -uNr 18_backtrace/kernel/src/bsp/raspberrypi/kernel.ld 19_kernel_heap/kerne
      segment_boot_core_stack PT_LOAD FLAGS(6);
  }
 
-@@ -85,6 +86,18 @@
+@@ -84,6 +85,18 @@
      __data_end_exclusive = .;
 
      /***********************************************************************************************
diff --git a/19_kernel_heap/kernel/src/bsp/raspberrypi/kernel.ld b/19_kernel_heap/kernel/src/bsp/raspberrypi/kernel.ld
index cbfbb5b50..2408b63cd 100644
--- a/19_kernel_heap/kernel/src/bsp/raspberrypi/kernel.ld
+++ b/19_kernel_heap/kernel/src/bsp/raspberrypi/kernel.ld
@@ -58,7 +58,6 @@ SECTIONS
     } :segment_code
 
     .rodata         : ALIGN(8) { *(.rodata*) } :segment_code
-    .got            : ALIGN(8) { *(.got)     } :segment_code
     .kernel_symbols : ALIGN(8) {
         __kernel_symbols_start = .;
         . += 32 * 1024;
@@ -124,4 +123,12 @@ SECTIONS
     } :segment_boot_core_stack
 
     ASSERT((. & PAGE_MASK) == 0, "End of boot core stack is not page aligned")
+
+    /***********************************************************************************************
+    * Misc
+    ***********************************************************************************************/
+    .got : { *(.got*) }
+    ASSERT(SIZEOF(.got) == 0, "Relocation support not expected")
+
+    /DISCARD/ : { *(.comment*) }
 }
diff --git a/X1_JTAG_boot/Makefile b/X1_JTAG_boot/Makefile
index b89cee8c5..c183c6061 100644
--- a/X1_JTAG_boot/Makefile
+++ b/X1_JTAG_boot/Makefile
@@ -203,7 +203,6 @@ objdump: $(KERNEL_ELF)
 	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                 --section .text   \
                 --section .rodata \
-                --section .got    \
                 $(KERNEL_ELF) | rustfilt
 
 ##------------------------------------------------------------------------------
diff --git a/X1_JTAG_boot/src/bsp/raspberrypi/kernel.ld b/X1_JTAG_boot/src/bsp/raspberrypi/kernel.ld
index 007afd4a5..f6c188434 100644
--- a/X1_JTAG_boot/src/bsp/raspberrypi/kernel.ld
+++ b/X1_JTAG_boot/src/bsp/raspberrypi/kernel.ld
@@ -54,7 +54,6 @@ SECTIONS
     } :segment_code
 
     .rodata : ALIGN(8) { *(.rodata*) } :segment_code
-    .got    : ALIGN(8) { *(.got)     } :segment_code
 
     /***********************************************************************************************
     * Data + BSS
@@ -69,4 +68,12 @@ SECTIONS
         . = ALIGN(16);
         __bss_end_exclusive = .;
     } :segment_data
+
+    /***********************************************************************************************
+    * Misc
+    ***********************************************************************************************/
+    .got : { *(.got*) }
+    ASSERT(SIZEOF(.got) == 0, "Relocation support not expected")
+
+    /DISCARD/ : { *(.comment*) }
 }

From 728ca1b6addc29f0320b5e927a0f9737d62086a6 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 23 May 2022 23:25:00 +0200
Subject: [PATCH 176/214] Bump dependencies

---
 02_runtime_init/Cargo.lock                    |   4 ++--
 03_hacky_hello_world/Cargo.lock               |   4 ++--
 04_safe_globals/Cargo.lock                    |   4 ++--
 05_drivers_gpio_uart/Cargo.lock               |   4 ++--
 06_uart_chainloader/Cargo.lock                |   4 ++--
 06_uart_chainloader/demo_payload_rpi3.img     | Bin 7960 -> 7728 bytes
 06_uart_chainloader/demo_payload_rpi4.img     | Bin 7872 -> 7664 bytes
 07_timestamps/Cargo.lock                      |   4 ++--
 08_hw_debug_JTAG/Cargo.lock                   |   4 ++--
 09_privilege_level/Cargo.lock                 |   4 ++--
 .../Cargo.lock                                |   4 ++--
 11_exceptions_part1_groundwork/Cargo.lock     |   4 ++--
 12_integrated_testing/Cargo.lock              |  22 +++++++++---------
 .../Cargo.lock                                |  22 +++++++++---------
 14_virtual_mem_part2_mmio_remap/Cargo.lock    |  22 +++++++++---------
 .../Cargo.lock                                |  22 +++++++++---------
 .../Cargo.lock                                |  22 +++++++++---------
 17_kernel_symbols/Cargo.lock                  |  22 +++++++++---------
 18_backtrace/Cargo.lock                       |  22 +++++++++---------
 19_kernel_heap/Cargo.lock                     |  22 +++++++++---------
 X1_JTAG_boot/Cargo.lock                       |   4 ++--
 X1_JTAG_boot/jtag_boot_rpi3.img               | Bin 9000 -> 8792 bytes
 X1_JTAG_boot/jtag_boot_rpi4.img               | Bin 7888 -> 7704 bytes
 23 files changed, 110 insertions(+), 110 deletions(-)

diff --git a/02_runtime_init/Cargo.lock b/02_runtime_init/Cargo.lock
index 6e58e97aa..648c82bab 100644
--- a/02_runtime_init/Cargo.lock
+++ b/02_runtime_init/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.2.0"
+version = "7.3.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
+checksum = "342880ec3cd4f86ab0b7c42c7f51b0ff104de4311a53e01b97388971bb5b42a2"
 dependencies = [
  "tock-registers",
 ]
diff --git a/03_hacky_hello_world/Cargo.lock b/03_hacky_hello_world/Cargo.lock
index 9b44f7de2..dfb1e4416 100644
--- a/03_hacky_hello_world/Cargo.lock
+++ b/03_hacky_hello_world/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.2.0"
+version = "7.3.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
+checksum = "342880ec3cd4f86ab0b7c42c7f51b0ff104de4311a53e01b97388971bb5b42a2"
 dependencies = [
  "tock-registers",
 ]
diff --git a/04_safe_globals/Cargo.lock b/04_safe_globals/Cargo.lock
index c8a669d93..a8102471a 100644
--- a/04_safe_globals/Cargo.lock
+++ b/04_safe_globals/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.2.0"
+version = "7.3.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
+checksum = "342880ec3cd4f86ab0b7c42c7f51b0ff104de4311a53e01b97388971bb5b42a2"
 dependencies = [
  "tock-registers",
 ]
diff --git a/05_drivers_gpio_uart/Cargo.lock b/05_drivers_gpio_uart/Cargo.lock
index caf94f7c2..d8521864c 100644
--- a/05_drivers_gpio_uart/Cargo.lock
+++ b/05_drivers_gpio_uart/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.2.0"
+version = "7.3.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
+checksum = "342880ec3cd4f86ab0b7c42c7f51b0ff104de4311a53e01b97388971bb5b42a2"
 dependencies = [
  "tock-registers",
 ]
diff --git a/06_uart_chainloader/Cargo.lock b/06_uart_chainloader/Cargo.lock
index a92a3ab5a..0c2a9aca3 100644
--- a/06_uart_chainloader/Cargo.lock
+++ b/06_uart_chainloader/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.2.0"
+version = "7.3.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
+checksum = "342880ec3cd4f86ab0b7c42c7f51b0ff104de4311a53e01b97388971bb5b42a2"
 dependencies = [
  "tock-registers",
 ]
diff --git a/06_uart_chainloader/demo_payload_rpi3.img b/06_uart_chainloader/demo_payload_rpi3.img
index 1da3bec56b3f76bf826e7d2f7f8c513059965b8c..75bf414ecc24836e41b9a216a9670b10068fce17 100755
GIT binary patch
delta 2167
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delta 2361
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diff --git a/06_uart_chainloader/demo_payload_rpi4.img b/06_uart_chainloader/demo_payload_rpi4.img
index f76cbd1fa891b177444764c8d47c4fd43c13526d..0d66373c74c01beda4fb6de40142a3d3d7adbbe5 100755
GIT binary patch
delta 1952
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diff --git a/07_timestamps/Cargo.lock b/07_timestamps/Cargo.lock
index b14b49bb2..c85a88469 100644
--- a/07_timestamps/Cargo.lock
+++ b/07_timestamps/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.2.0"
+version = "7.3.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
+checksum = "342880ec3cd4f86ab0b7c42c7f51b0ff104de4311a53e01b97388971bb5b42a2"
 dependencies = [
  "tock-registers",
 ]
diff --git a/08_hw_debug_JTAG/Cargo.lock b/08_hw_debug_JTAG/Cargo.lock
index ef4ed8664..dfe5e8e3e 100644
--- a/08_hw_debug_JTAG/Cargo.lock
+++ b/08_hw_debug_JTAG/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.2.0"
+version = "7.3.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
+checksum = "342880ec3cd4f86ab0b7c42c7f51b0ff104de4311a53e01b97388971bb5b42a2"
 dependencies = [
  "tock-registers",
 ]
diff --git a/09_privilege_level/Cargo.lock b/09_privilege_level/Cargo.lock
index 49e377d2c..76f33c947 100644
--- a/09_privilege_level/Cargo.lock
+++ b/09_privilege_level/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.2.0"
+version = "7.3.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
+checksum = "342880ec3cd4f86ab0b7c42c7f51b0ff104de4311a53e01b97388971bb5b42a2"
 dependencies = [
  "tock-registers",
 ]
diff --git a/10_virtual_mem_part1_identity_mapping/Cargo.lock b/10_virtual_mem_part1_identity_mapping/Cargo.lock
index 615d5ad8e..c93cf0e12 100644
--- a/10_virtual_mem_part1_identity_mapping/Cargo.lock
+++ b/10_virtual_mem_part1_identity_mapping/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.2.0"
+version = "7.3.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
+checksum = "342880ec3cd4f86ab0b7c42c7f51b0ff104de4311a53e01b97388971bb5b42a2"
 dependencies = [
  "tock-registers",
 ]
diff --git a/11_exceptions_part1_groundwork/Cargo.lock b/11_exceptions_part1_groundwork/Cargo.lock
index 9eae6c69d..7fe1386d2 100644
--- a/11_exceptions_part1_groundwork/Cargo.lock
+++ b/11_exceptions_part1_groundwork/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.2.0"
+version = "7.3.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
+checksum = "342880ec3cd4f86ab0b7c42c7f51b0ff104de4311a53e01b97388971bb5b42a2"
 dependencies = [
  "tock-registers",
 ]
diff --git a/12_integrated_testing/Cargo.lock b/12_integrated_testing/Cargo.lock
index 46e096295..9c675b52d 100644
--- a/12_integrated_testing/Cargo.lock
+++ b/12_integrated_testing/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.2.0"
+version = "7.3.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
+checksum = "342880ec3cd4f86ab0b7c42c7f51b0ff104de4311a53e01b97388971bb5b42a2"
 dependencies = [
  "tock-registers",
 ]
@@ -24,11 +24,11 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.37"
+version = "1.0.39"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "ec757218438d5fda206afc041538b2f6d889286160d649a86a24d37e1235afd1"
+checksum = "c54b25569025b7fc9651de43004ae593a75ad88543b17178aa5e1b9c4f15f56f"
 dependencies = [
- "unicode-xid",
+ "unicode-ident",
 ]
 
 [[package]]
@@ -48,13 +48,13 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.91"
+version = "1.0.95"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "b683b2b825c8eef438b77c36a06dc262294da3d5a5813fac20da149241dcd44d"
+checksum = "fbaf6116ab8924f39d52792136fb74fd60a80194cf1b1c6ffa6453eef1c3f942"
 dependencies = [
  "proc-macro2",
  "quote",
- "unicode-xid",
+ "unicode-ident",
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 [[package]]
@@ -78,7 +78,7 @@ source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
-name = "unicode-xid"
-version = "0.2.2"
+name = "unicode-ident"
+version = "1.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "8ccb82d61f80a663efe1f787a51b16b5a51e3314d6ac365b08639f52387b33f3"
+checksum = "d22af068fba1eb5edcb4aea19d382b2a3deb4c8f9d475c589b6ada9e0fd493ee"
diff --git a/13_exceptions_part2_peripheral_IRQs/Cargo.lock b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
index 51d3ab82d..f69ea07ec 100644
--- a/13_exceptions_part2_peripheral_IRQs/Cargo.lock
+++ b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.2.0"
+version = "7.3.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
+checksum = "342880ec3cd4f86ab0b7c42c7f51b0ff104de4311a53e01b97388971bb5b42a2"
 dependencies = [
  "tock-registers",
 ]
@@ -24,11 +24,11 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.37"
+version = "1.0.39"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "ec757218438d5fda206afc041538b2f6d889286160d649a86a24d37e1235afd1"
+checksum = "c54b25569025b7fc9651de43004ae593a75ad88543b17178aa5e1b9c4f15f56f"
 dependencies = [
- "unicode-xid",
+ "unicode-ident",
 ]
 
 [[package]]
@@ -48,13 +48,13 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.91"
+version = "1.0.95"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "b683b2b825c8eef438b77c36a06dc262294da3d5a5813fac20da149241dcd44d"
+checksum = "fbaf6116ab8924f39d52792136fb74fd60a80194cf1b1c6ffa6453eef1c3f942"
 dependencies = [
  "proc-macro2",
  "quote",
- "unicode-xid",
+ "unicode-ident",
 ]
 
 [[package]]
@@ -78,7 +78,7 @@ source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
-name = "unicode-xid"
-version = "0.2.2"
+name = "unicode-ident"
+version = "1.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "8ccb82d61f80a663efe1f787a51b16b5a51e3314d6ac365b08639f52387b33f3"
+checksum = "d22af068fba1eb5edcb4aea19d382b2a3deb4c8f9d475c589b6ada9e0fd493ee"
diff --git a/14_virtual_mem_part2_mmio_remap/Cargo.lock b/14_virtual_mem_part2_mmio_remap/Cargo.lock
index 337a9ed80..e93b20989 100644
--- a/14_virtual_mem_part2_mmio_remap/Cargo.lock
+++ b/14_virtual_mem_part2_mmio_remap/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.2.0"
+version = "7.3.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
+checksum = "342880ec3cd4f86ab0b7c42c7f51b0ff104de4311a53e01b97388971bb5b42a2"
 dependencies = [
  "tock-registers",
 ]
@@ -24,11 +24,11 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.37"
+version = "1.0.39"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "ec757218438d5fda206afc041538b2f6d889286160d649a86a24d37e1235afd1"
+checksum = "c54b25569025b7fc9651de43004ae593a75ad88543b17178aa5e1b9c4f15f56f"
 dependencies = [
- "unicode-xid",
+ "unicode-ident",
 ]
 
 [[package]]
@@ -48,13 +48,13 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.91"
+version = "1.0.95"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "b683b2b825c8eef438b77c36a06dc262294da3d5a5813fac20da149241dcd44d"
+checksum = "fbaf6116ab8924f39d52792136fb74fd60a80194cf1b1c6ffa6453eef1c3f942"
 dependencies = [
  "proc-macro2",
  "quote",
- "unicode-xid",
+ "unicode-ident",
 ]
 
 [[package]]
@@ -78,7 +78,7 @@ source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
-name = "unicode-xid"
-version = "0.2.2"
+name = "unicode-ident"
+version = "1.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "8ccb82d61f80a663efe1f787a51b16b5a51e3314d6ac365b08639f52387b33f3"
+checksum = "d22af068fba1eb5edcb4aea19d382b2a3deb4c8f9d475c589b6ada9e0fd493ee"
diff --git a/15_virtual_mem_part3_precomputed_tables/Cargo.lock b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
index 1bac7e897..33d507a70 100644
--- a/15_virtual_mem_part3_precomputed_tables/Cargo.lock
+++ b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.2.0"
+version = "7.3.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
+checksum = "342880ec3cd4f86ab0b7c42c7f51b0ff104de4311a53e01b97388971bb5b42a2"
 dependencies = [
  "tock-registers",
 ]
@@ -24,11 +24,11 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.37"
+version = "1.0.39"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "ec757218438d5fda206afc041538b2f6d889286160d649a86a24d37e1235afd1"
+checksum = "c54b25569025b7fc9651de43004ae593a75ad88543b17178aa5e1b9c4f15f56f"
 dependencies = [
- "unicode-xid",
+ "unicode-ident",
 ]
 
 [[package]]
@@ -48,13 +48,13 @@ dependencies = [
 
 [[package]]
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-version = "1.0.91"
+version = "1.0.95"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "b683b2b825c8eef438b77c36a06dc262294da3d5a5813fac20da149241dcd44d"
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 dependencies = [
  "proc-macro2",
  "quote",
- "unicode-xid",
+ "unicode-ident",
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 [[package]]
@@ -78,7 +78,7 @@ source = "registry+https://github.com/rust-lang/crates.io-index"
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 [[package]]
-name = "unicode-xid"
-version = "0.2.2"
+name = "unicode-ident"
+version = "1.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "8ccb82d61f80a663efe1f787a51b16b5a51e3314d6ac365b08639f52387b33f3"
+checksum = "d22af068fba1eb5edcb4aea19d382b2a3deb4c8f9d475c589b6ada9e0fd493ee"
diff --git a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
index 7a24ae092..c31c4665c 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
+++ b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
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-version = "7.2.0"
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-checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
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 dependencies = [
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 ]
@@ -24,11 +24,11 @@ dependencies = [
 
 [[package]]
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 dependencies = [
- "unicode-xid",
+ "unicode-ident",
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 [[package]]
@@ -48,13 +48,13 @@ dependencies = [
 
 [[package]]
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 dependencies = [
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+ "unicode-ident",
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 [[package]]
@@ -78,7 +78,7 @@ source = "registry+https://github.com/rust-lang/crates.io-index"
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 [[package]]
-name = "unicode-xid"
-version = "0.2.2"
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 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "8ccb82d61f80a663efe1f787a51b16b5a51e3314d6ac365b08639f52387b33f3"
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diff --git a/17_kernel_symbols/Cargo.lock b/17_kernel_symbols/Cargo.lock
index 7648b5c1f..098cfbb5e 100644
--- a/17_kernel_symbols/Cargo.lock
+++ b/17_kernel_symbols/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.2.0"
+version = "7.3.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
+checksum = "342880ec3cd4f86ab0b7c42c7f51b0ff104de4311a53e01b97388971bb5b42a2"
 dependencies = [
  "tock-registers",
 ]
@@ -36,11 +36,11 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.37"
+version = "1.0.39"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "ec757218438d5fda206afc041538b2f6d889286160d649a86a24d37e1235afd1"
+checksum = "c54b25569025b7fc9651de43004ae593a75ad88543b17178aa5e1b9c4f15f56f"
 dependencies = [
- "unicode-xid",
+ "unicode-ident",
 ]
 
 [[package]]
@@ -60,13 +60,13 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.91"
+version = "1.0.95"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "b683b2b825c8eef438b77c36a06dc262294da3d5a5813fac20da149241dcd44d"
+checksum = "fbaf6116ab8924f39d52792136fb74fd60a80194cf1b1c6ffa6453eef1c3f942"
 dependencies = [
  "proc-macro2",
  "quote",
- "unicode-xid",
+ "unicode-ident",
 ]
 
 [[package]]
@@ -90,7 +90,7 @@ source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
-name = "unicode-xid"
-version = "0.2.2"
+name = "unicode-ident"
+version = "1.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "8ccb82d61f80a663efe1f787a51b16b5a51e3314d6ac365b08639f52387b33f3"
+checksum = "d22af068fba1eb5edcb4aea19d382b2a3deb4c8f9d475c589b6ada9e0fd493ee"
diff --git a/18_backtrace/Cargo.lock b/18_backtrace/Cargo.lock
index b851d8e39..e1cf54bc0 100644
--- a/18_backtrace/Cargo.lock
+++ b/18_backtrace/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.2.0"
+version = "7.3.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
+checksum = "342880ec3cd4f86ab0b7c42c7f51b0ff104de4311a53e01b97388971bb5b42a2"
 dependencies = [
  "tock-registers",
 ]
@@ -36,11 +36,11 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.37"
+version = "1.0.39"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "ec757218438d5fda206afc041538b2f6d889286160d649a86a24d37e1235afd1"
+checksum = "c54b25569025b7fc9651de43004ae593a75ad88543b17178aa5e1b9c4f15f56f"
 dependencies = [
- "unicode-xid",
+ "unicode-ident",
 ]
 
 [[package]]
@@ -60,13 +60,13 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.91"
+version = "1.0.95"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "b683b2b825c8eef438b77c36a06dc262294da3d5a5813fac20da149241dcd44d"
+checksum = "fbaf6116ab8924f39d52792136fb74fd60a80194cf1b1c6ffa6453eef1c3f942"
 dependencies = [
  "proc-macro2",
  "quote",
- "unicode-xid",
+ "unicode-ident",
 ]
 
 [[package]]
@@ -90,7 +90,7 @@ source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
-name = "unicode-xid"
-version = "0.2.2"
+name = "unicode-ident"
+version = "1.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "8ccb82d61f80a663efe1f787a51b16b5a51e3314d6ac365b08639f52387b33f3"
+checksum = "d22af068fba1eb5edcb4aea19d382b2a3deb4c8f9d475c589b6ada9e0fd493ee"
diff --git a/19_kernel_heap/Cargo.lock b/19_kernel_heap/Cargo.lock
index e1d354993..7fb790260 100644
--- a/19_kernel_heap/Cargo.lock
+++ b/19_kernel_heap/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.2.0"
+version = "7.3.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
+checksum = "342880ec3cd4f86ab0b7c42c7f51b0ff104de4311a53e01b97388971bb5b42a2"
 dependencies = [
  "tock-registers",
 ]
@@ -43,11 +43,11 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.37"
+version = "1.0.39"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "ec757218438d5fda206afc041538b2f6d889286160d649a86a24d37e1235afd1"
+checksum = "c54b25569025b7fc9651de43004ae593a75ad88543b17178aa5e1b9c4f15f56f"
 dependencies = [
- "unicode-xid",
+ "unicode-ident",
 ]
 
 [[package]]
@@ -67,13 +67,13 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.91"
+version = "1.0.95"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "b683b2b825c8eef438b77c36a06dc262294da3d5a5813fac20da149241dcd44d"
+checksum = "fbaf6116ab8924f39d52792136fb74fd60a80194cf1b1c6ffa6453eef1c3f942"
 dependencies = [
  "proc-macro2",
  "quote",
- "unicode-xid",
+ "unicode-ident",
 ]
 
 [[package]]
@@ -97,7 +97,7 @@ source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
-name = "unicode-xid"
-version = "0.2.2"
+name = "unicode-ident"
+version = "1.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "8ccb82d61f80a663efe1f787a51b16b5a51e3314d6ac365b08639f52387b33f3"
+checksum = "d22af068fba1eb5edcb4aea19d382b2a3deb4c8f9d475c589b6ada9e0fd493ee"
diff --git a/X1_JTAG_boot/Cargo.lock b/X1_JTAG_boot/Cargo.lock
index ef4ed8664..dfe5e8e3e 100644
--- a/X1_JTAG_boot/Cargo.lock
+++ b/X1_JTAG_boot/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.2.0"
+version = "7.3.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
+checksum = "342880ec3cd4f86ab0b7c42c7f51b0ff104de4311a53e01b97388971bb5b42a2"
 dependencies = [
  "tock-registers",
 ]
diff --git a/X1_JTAG_boot/jtag_boot_rpi3.img b/X1_JTAG_boot/jtag_boot_rpi3.img
index f6afca6ccb677db69ee4628043d1039905542b1a..f6d2df49fd719b98dd9f1ed641c087f99c32e336 100755
GIT binary patch
delta 2044
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diff --git a/X1_JTAG_boot/jtag_boot_rpi4.img b/X1_JTAG_boot/jtag_boot_rpi4.img
index b12e094ded48d939c71c87f3fb3fa66a2c309048..ea37301f05b97d1219a77b74eac3910f376f12f3 100755
GIT binary patch
delta 1478
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delta 1693
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zanYC3I8fIEP?N^5fJkXbY1~%#>rOIPu5X)Da98BQ$A95Xde$5XdA>g1$L0&l!*wgI
zmlbS<V=MIm#an|}moexPR(KQTExb0J6h?nQ{ci%B#Q9s{+XGy0mn)JxA=&-uP^dZk
zbYFA$%qi!}E0>L95YtIPR6{H=w(crWjj)2;%|z~IaSh;x(Iiu+6k*}Qobb@=cpc+X
zYQ)Z;O*LL1)A*Ro<HWk2#P4YPi12t5pgn`fpB2)<jewjQdk<cVF}{W$M>;yOG3CZi
z8V_f4vlo(zbPv5Gn_deLa}K^VeH=VnvA*z}P-ac-QH?-Mb3?3K05xgTP8sDO%3PEe
zwCVB=lo(?WVkNG`#>R7a0^?JSR)cyG&xx^IZghzvAK>w07G=N8L^^a4x;RK^eC1v`
z>@wY-p&`wOnXMKNjs$EzJcxY2kG``xlj8f!4^c^qgv1-siG~kUi;6Sb;9h2aPe=Z|
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z+j^VO+2=lQ{;2IKN_`1{$r8SGo_X7hFC?{w@HYoH+fY)oQCP}-79zgR)T*>~{A;n6
zmmMm3=ehl0g{7@&x39pmAL#1}?(ck~r>nicv*%!S-vK-DwmpM9TNknc_a48$n(4()
z_xxY}&2~LiHbAGXr_1TFb;b7g*}81&2W?$qhfDgI>eX3`FSr)|vmZu%Zr5>pyxBHL
LKFTU~vn22@*De5{


From bd5ee7d9cd10d4881f69a3b356f4306c3a6087b9 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre-richter@users.noreply.github.com>
Date: Mon, 27 Jun 2022 09:53:10 +0200
Subject: [PATCH 177/214] Update README.md

---
 README.md | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/README.md b/README.md
index 66e60d447..745dd3c5b 100644
--- a/README.md
+++ b/README.md
@@ -61,7 +61,7 @@ The tutorials are primarily targeted at **Linux**-based distributions. Most stuf
 
 ### 🚀 The tl;dr Version
 
-1. [Install Docker Desktop][install_docker].
+1. [Install Docker Engine][install_docker].
 1. (**Linux only**) Ensure your user account is in the [docker group].
 1. Prepare the `Rust` toolchain. Most of it will be handled on first use through the
    [rust-toolchain](rust-toolchain) file. What's left for us to do is:
@@ -113,7 +113,7 @@ accompanying container that has all the needed tools or dependencies pre-install
 pulled in automagically once it is needed. If you want to know more about Docker and peek at the
 provided container, please refer to the repository's [docker](docker) folder.
 
-[install_docker]: https://docs.docker.com/get-docker/
+[install_docker]: https://docs.docker.com/engine/install/#server
 
 ## 📟 USB Serial Output
 

From b48a89faf01d8e0ec8812346d89c90981cd8f9bb Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 27 Jun 2022 10:38:04 +0200
Subject: [PATCH 178/214] Bump dependencies

---
 02_runtime_init/Cargo.lock                    |   4 +--
 03_hacky_hello_world/Cargo.lock               |   4 +--
 04_safe_globals/Cargo.lock                    |   4 +--
 05_drivers_gpio_uart/Cargo.lock               |   4 +--
 06_uart_chainloader/Cargo.lock                |   4 +--
 06_uart_chainloader/demo_payload_rpi3.img     | Bin 7728 -> 7736 bytes
 06_uart_chainloader/demo_payload_rpi4.img     | Bin 7664 -> 7672 bytes
 07_timestamps/Cargo.lock                      |   4 +--
 08_hw_debug_JTAG/Cargo.lock                   |   4 +--
 09_privilege_level/Cargo.lock                 |   4 +--
 .../Cargo.lock                                |   4 +--
 11_exceptions_part1_groundwork/Cargo.lock     |   4 +--
 12_integrated_testing/Cargo.lock              |  20 +++++++--------
 .../Cargo.lock                                |  20 +++++++--------
 14_virtual_mem_part2_mmio_remap/Cargo.lock    |  20 +++++++--------
 .../Cargo.lock                                |  20 +++++++--------
 .../Cargo.lock                                |  20 +++++++--------
 17_kernel_symbols/Cargo.lock                  |  20 +++++++--------
 18_backtrace/Cargo.lock                       |  20 +++++++--------
 19_kernel_heap/Cargo.lock                     |  24 +++++++++---------
 19_kernel_heap/README.md                      |   8 +++---
 19_kernel_heap/kernel/Cargo.toml              |   2 +-
 .../kernel/src/memory/heap_alloc.rs           |   6 ++---
 X1_JTAG_boot/Cargo.lock                       |   4 +--
 X1_JTAG_boot/jtag_boot_rpi3.img               | Bin 8792 -> 8792 bytes
 X1_JTAG_boot/jtag_boot_rpi4.img               | Bin 7704 -> 7712 bytes
 26 files changed, 112 insertions(+), 112 deletions(-)

diff --git a/02_runtime_init/Cargo.lock b/02_runtime_init/Cargo.lock
index 648c82bab..d164c36ba 100644
--- a/02_runtime_init/Cargo.lock
+++ b/02_runtime_init/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.3.0"
+version = "7.4.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "342880ec3cd4f86ab0b7c42c7f51b0ff104de4311a53e01b97388971bb5b42a2"
+checksum = "f75db6964ed6748e88ff46f9aa209249a0aefe6b06d4b9e9ab820c867586d51a"
 dependencies = [
  "tock-registers",
 ]
diff --git a/03_hacky_hello_world/Cargo.lock b/03_hacky_hello_world/Cargo.lock
index dfb1e4416..0609efb6a 100644
--- a/03_hacky_hello_world/Cargo.lock
+++ b/03_hacky_hello_world/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.3.0"
+version = "7.4.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "342880ec3cd4f86ab0b7c42c7f51b0ff104de4311a53e01b97388971bb5b42a2"
+checksum = "f75db6964ed6748e88ff46f9aa209249a0aefe6b06d4b9e9ab820c867586d51a"
 dependencies = [
  "tock-registers",
 ]
diff --git a/04_safe_globals/Cargo.lock b/04_safe_globals/Cargo.lock
index a8102471a..d5be28614 100644
--- a/04_safe_globals/Cargo.lock
+++ b/04_safe_globals/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.3.0"
+version = "7.4.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "342880ec3cd4f86ab0b7c42c7f51b0ff104de4311a53e01b97388971bb5b42a2"
+checksum = "f75db6964ed6748e88ff46f9aa209249a0aefe6b06d4b9e9ab820c867586d51a"
 dependencies = [
  "tock-registers",
 ]
diff --git a/05_drivers_gpio_uart/Cargo.lock b/05_drivers_gpio_uart/Cargo.lock
index d8521864c..9958f13cd 100644
--- a/05_drivers_gpio_uart/Cargo.lock
+++ b/05_drivers_gpio_uart/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.3.0"
+version = "7.4.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "342880ec3cd4f86ab0b7c42c7f51b0ff104de4311a53e01b97388971bb5b42a2"
+checksum = "f75db6964ed6748e88ff46f9aa209249a0aefe6b06d4b9e9ab820c867586d51a"
 dependencies = [
  "tock-registers",
 ]
diff --git a/06_uart_chainloader/Cargo.lock b/06_uart_chainloader/Cargo.lock
index 0c2a9aca3..e0cea1785 100644
--- a/06_uart_chainloader/Cargo.lock
+++ b/06_uart_chainloader/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.3.0"
+version = "7.4.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "342880ec3cd4f86ab0b7c42c7f51b0ff104de4311a53e01b97388971bb5b42a2"
+checksum = "f75db6964ed6748e88ff46f9aa209249a0aefe6b06d4b9e9ab820c867586d51a"
 dependencies = [
  "tock-registers",
 ]
diff --git a/06_uart_chainloader/demo_payload_rpi3.img b/06_uart_chainloader/demo_payload_rpi3.img
index 75bf414ecc24836e41b9a216a9670b10068fce17..c0f226a7df2660c157a6e1360a4de8143631c965 100755
GIT binary patch
delta 1448
zcmZ8gT}&KR6h3!`g;@$@*k9OXVYXYL!?p_*7Feud0UNLli6O>Xi2<4tp(-S+X{x5#
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LCdePm2zCAoFSVEr

delta 1418
zcmZ8gUrbw782`?_E!?t<T%hH4rG<8#lor9lVEmDU0uCmN$;QicWc)Kmm<jkVi^dG<
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nLdWrDzj#hIM%{(TnAqL51--#n*j1sQ@hR*x-)khpNNvZzhhUAB

diff --git a/06_uart_chainloader/demo_payload_rpi4.img b/06_uart_chainloader/demo_payload_rpi4.img
index 0d66373c74c01beda4fb6de40142a3d3d7adbbe5..82f75d6aef373994ecde6e7c8236afcbe19e5107 100755
GIT binary patch
delta 747
zcmYjOPiWI{82$ayWwcT;Ym-KkcFitpt+O4iGi{2nDw`-cN4JZ3=*lKrhg%_qDF~wz
zDFZz;euCn`;judiV<`0EpM#=1h?hB!dg~5DVV4F5HEF-1-zo3C@8!LG`IBy@t0!Hf
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delta 768
zcmYjOPiWI%6#tSgBhe1CHf^-&pY&q2y0+-L+SI{Tan3_~s9t19t=m{D+X^Xc7l}Jg
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diff --git a/07_timestamps/Cargo.lock b/07_timestamps/Cargo.lock
index c85a88469..fcc1ddd23 100644
--- a/07_timestamps/Cargo.lock
+++ b/07_timestamps/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.3.0"
+version = "7.4.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "342880ec3cd4f86ab0b7c42c7f51b0ff104de4311a53e01b97388971bb5b42a2"
+checksum = "f75db6964ed6748e88ff46f9aa209249a0aefe6b06d4b9e9ab820c867586d51a"
 dependencies = [
  "tock-registers",
 ]
diff --git a/08_hw_debug_JTAG/Cargo.lock b/08_hw_debug_JTAG/Cargo.lock
index dfe5e8e3e..7c8e75a85 100644
--- a/08_hw_debug_JTAG/Cargo.lock
+++ b/08_hw_debug_JTAG/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.3.0"
+version = "7.4.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "342880ec3cd4f86ab0b7c42c7f51b0ff104de4311a53e01b97388971bb5b42a2"
+checksum = "f75db6964ed6748e88ff46f9aa209249a0aefe6b06d4b9e9ab820c867586d51a"
 dependencies = [
  "tock-registers",
 ]
diff --git a/09_privilege_level/Cargo.lock b/09_privilege_level/Cargo.lock
index 76f33c947..0f3104f50 100644
--- a/09_privilege_level/Cargo.lock
+++ b/09_privilege_level/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.3.0"
+version = "7.4.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "342880ec3cd4f86ab0b7c42c7f51b0ff104de4311a53e01b97388971bb5b42a2"
+checksum = "f75db6964ed6748e88ff46f9aa209249a0aefe6b06d4b9e9ab820c867586d51a"
 dependencies = [
  "tock-registers",
 ]
diff --git a/10_virtual_mem_part1_identity_mapping/Cargo.lock b/10_virtual_mem_part1_identity_mapping/Cargo.lock
index c93cf0e12..544f7715d 100644
--- a/10_virtual_mem_part1_identity_mapping/Cargo.lock
+++ b/10_virtual_mem_part1_identity_mapping/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.3.0"
+version = "7.4.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "342880ec3cd4f86ab0b7c42c7f51b0ff104de4311a53e01b97388971bb5b42a2"
+checksum = "f75db6964ed6748e88ff46f9aa209249a0aefe6b06d4b9e9ab820c867586d51a"
 dependencies = [
  "tock-registers",
 ]
diff --git a/11_exceptions_part1_groundwork/Cargo.lock b/11_exceptions_part1_groundwork/Cargo.lock
index 7fe1386d2..285a75b05 100644
--- a/11_exceptions_part1_groundwork/Cargo.lock
+++ b/11_exceptions_part1_groundwork/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
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diff --git a/12_integrated_testing/Cargo.lock b/12_integrated_testing/Cargo.lock
index 9c675b52d..ab04eab7c 100644
--- a/12_integrated_testing/Cargo.lock
+++ b/12_integrated_testing/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
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@@ -24,9 +24,9 @@ dependencies = [
 
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@@ -39,18 +39,18 @@ checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
 
 [[package]]
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 [[package]]
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@@ -79,6 +79,6 @@ checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
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diff --git a/13_exceptions_part2_peripheral_IRQs/Cargo.lock b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
index f69ea07ec..05e524aa3 100644
--- a/13_exceptions_part2_peripheral_IRQs/Cargo.lock
+++ b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
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 dependencies = [
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@@ -24,9 +24,9 @@ dependencies = [
 
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@@ -39,18 +39,18 @@ checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
 
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 [[package]]
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@@ -79,6 +79,6 @@ checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
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diff --git a/14_virtual_mem_part2_mmio_remap/Cargo.lock b/14_virtual_mem_part2_mmio_remap/Cargo.lock
index e93b20989..c732a7ab2 100644
--- a/14_virtual_mem_part2_mmio_remap/Cargo.lock
+++ b/14_virtual_mem_part2_mmio_remap/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
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@@ -24,9 +24,9 @@ dependencies = [
 
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@@ -39,18 +39,18 @@ checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
 
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 [[package]]
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@@ -79,6 +79,6 @@ checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
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diff --git a/15_virtual_mem_part3_precomputed_tables/Cargo.lock b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
index 33d507a70..8aa6b75de 100644
--- a/15_virtual_mem_part3_precomputed_tables/Cargo.lock
+++ b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
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@@ -24,9 +24,9 @@ dependencies = [
 
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@@ -39,18 +39,18 @@ checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
 
 [[package]]
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@@ -79,6 +79,6 @@ checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
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diff --git a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
index c31c4665c..66ac8733f 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
+++ b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
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@@ -39,18 +39,18 @@ checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
 
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 [[package]]
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diff --git a/17_kernel_symbols/Cargo.lock b/17_kernel_symbols/Cargo.lock
index 098cfbb5e..a0da4e21b 100644
--- a/17_kernel_symbols/Cargo.lock
+++ b/17_kernel_symbols/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
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@@ -36,9 +36,9 @@ dependencies = [
 
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@@ -51,18 +51,18 @@ checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
 
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 [[package]]
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@@ -91,6 +91,6 @@ checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
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diff --git a/18_backtrace/Cargo.lock b/18_backtrace/Cargo.lock
index e1cf54bc0..e0ab66b13 100644
--- a/18_backtrace/Cargo.lock
+++ b/18_backtrace/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
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@@ -36,9 +36,9 @@ dependencies = [
 
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@@ -51,18 +51,18 @@ checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
 
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 [[package]]
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@@ -91,6 +91,6 @@ checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
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diff --git a/19_kernel_heap/Cargo.lock b/19_kernel_heap/Cargo.lock
index 7fb790260..09f99f4a2 100644
--- a/19_kernel_heap/Cargo.lock
+++ b/19_kernel_heap/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
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+version = "0.10.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "549ce1740e46b291953c4340adcd74c59bcf4308f4cac050fd33ba91b7168f4a"
+checksum = "222d00bf23b303e0c82c7a4d5f04dc90f33a58b26a3adb1a09c6fbcf56cbd2a9"
 
 [[package]]
 name = "mingo"
@@ -43,9 +43,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.39"
+version = "1.0.40"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "c54b25569025b7fc9651de43004ae593a75ad88543b17178aa5e1b9c4f15f56f"
+checksum = "dd96a1e8ed2596c337f8eae5f24924ec83f5ad5ab21ea8e455d3566c69fbcaf7"
 dependencies = [
  "unicode-ident",
 ]
@@ -58,18 +58,18 @@ checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
 
 [[package]]
 name = "quote"
-version = "1.0.18"
+version = "1.0.20"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "a1feb54ed693b93a84e14094943b84b7c4eae204c512b7ccb95ab0c66d278ad1"
+checksum = "3bcdf212e9776fbcb2d23ab029360416bb1706b1aea2d1a5ba002727cbcab804"
 dependencies = [
  "proc-macro2",
 ]
 
 [[package]]
 name = "syn"
-version = "1.0.95"
+version = "1.0.98"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "fbaf6116ab8924f39d52792136fb74fd60a80194cf1b1c6ffa6453eef1c3f942"
+checksum = "c50aef8a904de4c23c788f104b7dddc7d6f79c647c7c8ce4cc8f73eb0ca773dd"
 dependencies = [
  "proc-macro2",
  "quote",
@@ -98,6 +98,6 @@ checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
 name = "unicode-ident"
-version = "1.0.0"
+version = "1.0.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d22af068fba1eb5edcb4aea19d382b2a3deb4c8f9d475c589b6ada9e0fd493ee"
+checksum = "5bd2fe26506023ed7b5e1e315add59d6f584c621d037f9368fea9cfb988f368c"
diff --git a/19_kernel_heap/README.md b/19_kernel_heap/README.md
index 8a39a2319..45f5f9e36 100644
--- a/19_kernel_heap/README.md
+++ b/19_kernel_heap/README.md
@@ -280,7 +280,7 @@ diff -uNr 18_backtrace/kernel/Cargo.toml 19_kernel_heap/kernel/Cargo.toml
  [dependencies]
  test-types = { path = "../libraries/test-types" }
  debug-symbol-types = { path = "../libraries/debug-symbol-types" }
-+linked_list_allocator = { version = "0.9.x", default-features = false, features = ["const_mut_refs"] }
++linked_list_allocator = { version = "0.10.x", default-features = false, features = ["const_mut_refs"] }
 
  # Optional dependencies
  tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
@@ -1043,9 +1043,9 @@ diff -uNr 18_backtrace/kernel/src/memory/heap_alloc.rs 19_kernel_heap/kernel/src
 +pub fn kernel_init_heap_allocator() {
 +    let region = bsp::memory::mmu::virt_heap_region();
 +
-+    KERNEL_HEAP_ALLOCATOR
-+        .inner
-+        .lock(|inner| unsafe { inner.init(region.start_addr().as_usize(), region.size()) });
++    KERNEL_HEAP_ALLOCATOR.inner.lock(|inner| unsafe {
++        inner.init(region.start_addr().as_usize() as *mut u8, region.size())
++    });
 +}
 
 diff -uNr 18_backtrace/kernel/src/memory/mmu/mapping_record.rs 19_kernel_heap/kernel/src/memory/mmu/mapping_record.rs
diff --git a/19_kernel_heap/kernel/Cargo.toml b/19_kernel_heap/kernel/Cargo.toml
index 2f5d05920..61a161581 100644
--- a/19_kernel_heap/kernel/Cargo.toml
+++ b/19_kernel_heap/kernel/Cargo.toml
@@ -18,7 +18,7 @@ test_build = ["qemu-exit"]
 [dependencies]
 test-types = { path = "../libraries/test-types" }
 debug-symbol-types = { path = "../libraries/debug-symbol-types" }
-linked_list_allocator = { version = "0.9.x", default-features = false, features = ["const_mut_refs"] }
+linked_list_allocator = { version = "0.10.x", default-features = false, features = ["const_mut_refs"] }
 
 # Optional dependencies
 tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
diff --git a/19_kernel_heap/kernel/src/memory/heap_alloc.rs b/19_kernel_heap/kernel/src/memory/heap_alloc.rs
index 81a5009c4..c290be4df 100644
--- a/19_kernel_heap/kernel/src/memory/heap_alloc.rs
+++ b/19_kernel_heap/kernel/src/memory/heap_alloc.rs
@@ -131,7 +131,7 @@ unsafe impl GlobalAlloc for HeapAllocator {
 pub fn kernel_init_heap_allocator() {
     let region = bsp::memory::mmu::virt_heap_region();
 
-    KERNEL_HEAP_ALLOCATOR
-        .inner
-        .lock(|inner| unsafe { inner.init(region.start_addr().as_usize(), region.size()) });
+    KERNEL_HEAP_ALLOCATOR.inner.lock(|inner| unsafe {
+        inner.init(region.start_addr().as_usize() as *mut u8, region.size())
+    });
 }
diff --git a/X1_JTAG_boot/Cargo.lock b/X1_JTAG_boot/Cargo.lock
index dfe5e8e3e..7c8e75a85 100644
--- a/X1_JTAG_boot/Cargo.lock
+++ b/X1_JTAG_boot/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.3.0"
+version = "7.4.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "342880ec3cd4f86ab0b7c42c7f51b0ff104de4311a53e01b97388971bb5b42a2"
+checksum = "f75db6964ed6748e88ff46f9aa209249a0aefe6b06d4b9e9ab820c867586d51a"
 dependencies = [
  "tock-registers",
 ]
diff --git a/X1_JTAG_boot/jtag_boot_rpi3.img b/X1_JTAG_boot/jtag_boot_rpi3.img
index f6d2df49fd719b98dd9f1ed641c087f99c32e336..4f2c13b0dc1a7ab85bbd5dcc18f7810c00c8b275 100755
GIT binary patch
delta 1269
zcma)4Z)jUp6hHUfbtb8n*yi8XH1B2Ex~A<QtsUD4ZIZUu8W@#sDk{3xuCp6mJCNZA
z!Db*--IrcYrRul35AFrTX{k~N(lHoXD9mZ+=Gc7I4>lP}CsSL-@;o=W6G3ENc<<cb
z`TINP+$)_|Iw$(Hma>mu)HHTuW>EV@3&un=)hMiSW?B&tD<6Pa2btcLQ?Tba$C0vb
z7MuC3>=Oq&ibpEaY++`$;x>;i$Axb2rG)`-=OS}v&bC)qIEd)-9$_^wGv5J4d+H!w
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z!N1Ejz2Wad<$)%47Fz@Lj)@%APPZm-H1I5~XCa__`$61HaPuS?>h2!;M)q>J6$^p-
zXEIcGe$8&NI+z$$<98*mUP{0G^KS{}y2&-z@1iw*C39{|i2Qaie@O79dMm!<q%XH-
z&l0JBt@2Skv1#9iBHwOr<JPBXn?s@0x)a{%b-oL8^6g2izYTLb;X=>3(|B>y8eZJo
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F{RJ~mUIzdG

delta 1279
zcmah|Z){Ul6hHS}7;P2ugm&%N`ra)yW9>%bhD(PduB@QaWFnJfG7@2$5in&gF}h^?
zK$n<o#xL9)&D2jCKEP|@GF=u}Fb3im)GsicK_&R6QPv>|;?yl+eV*5M<%=;p$;o-Y
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zigo0Ngg{ZV?PP;^`PJO(C;CJnK>Dpt@@F+~n_EnFSKaHe0MHHZ%kQP3N@4m#m91J~
zwKR4K3rC}8vELNTMrn>TJ*8y%Kbf*B?{4B+x4^8pnOLo@KjsmO<9;!KEnCDt^A%V=

diff --git a/X1_JTAG_boot/jtag_boot_rpi4.img b/X1_JTAG_boot/jtag_boot_rpi4.img
index ea37301f05b97d1219a77b74eac3910f376f12f3..ee1f6fc4c545edda38bc7b5ccb60381b0ebb4ad2 100755
GIT binary patch
delta 1017
zcmah{O-NKx6h8OeF=qVZHO`Dq&ge7CaYh}<%pVe($%Q|(8VHIOiY25rF4_o{IU*!c
z3t!hV2tsjTZ(50nx(TCA(jt{|Q7xVZ^%M;Q`x!7_=e@ati=YGdo%@}0-go})<GRth
zp;lqmGT9~wq++UF*c3eBpzQB2kkvt=sD&VF6QC4BETWA=ZGuHp8ijChY9?jUDl~Sm
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z=(7zV7SLGaBE}e1s~8{ElXvX)fP@lP_Vnz1!x|-Vt0knU)Ed8qoJNN>(vS$Ggy!y9
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zm9;yH4`0(oZGtFTmSA?Ntgxq!>U8W`n>b|7#mZJ4S$$e5hzrKzeHn^&86Sc#)AWv|
z;vha#d5uyT{xOKr>f|8Ws*;0P{=)}>@n85*u<0SNl*@#~BJ;FmMWy-iRXoO>;Cfr?
zfR$u#F)63jK9q~2I3NRV_8{jYoA=~6(HeCpy)GVs-VIM)&NFVtb((S)zZrPgF>hs&
zVcBQJ$7BlQSundPi*9zqdz&?R%2|)+g!A{2WSVsD7Eu?osJp&WG&Y4Iac#}xc)x6p
z8#%rtNkOK%&vpE-f?@tcnMn_@z;TiuV2NWJ_kZA6;P?~Ag!OxS#>HGBjCz^fQ_a46
GeSZN^Y#N&Y

delta 1010
zcmah`O-NKx6h8MoCuU6LHGj^GGy2qYe$-U58D)ef6)6dcS+o&yD2lKQaT5g9NRdfD
z_`HTvo6Lp1*@;NGiK#XU1r;hmo97fU<_In(Q$%0)zISWWq6_z(``vTS_s;j-r_JNd
z!!fSSFnyNeP~FUVF2lJ8ypn&QR8j_!tdxV4o&wni@o0Jynuc(%;W#(ooq1uHHgfY_
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zMxt|{Ov~=#3A^Ry#TpP6sA_M%oIXcf@D^y<2?q$uS6)i-ywta+jzth0=_Xw&nVEKr
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zRtSyK?HzRt5X@5ISStuwLZkr9_LEo&FiJ^jZe9d|2e4A}jK{oq&{AQR*N9+mj!fTz
z*7St%D@%zfL}ZW`dAEbVTRMVOmsKHi3#9cKkTSKPDP3Dqh4oq_pSZs8BsX~{nz;Y6
ze?K9<M7*Lz)j@p0>P12P&|21patYrgl2UI$+S&crmbhQHrNyV)@}AUawvhT2W)ZF~
z%#z9Vg+)iqtT_K-?RMFXM;u?Ur>M2=lub{?ScGC7_pz2OkB-L~#-l|idnt*?62vEM
zl{1VO{`1cohHWmLNdE$O7&ftdCBq!UK86vlcU_%Kx)HZggx`2V__?bVe|FV5#@#wq
z9%~Rt^pTBwoep!7CG9Lp6hC$rySLai@n2g*<eN`+mna^>ADj(k|5J6)g9EM`BgNux
DoqQqW


From 840f6d6f425e578708d660d7f424e3bb8ee4e3b5 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 27 Jun 2022 11:06:06 +0200
Subject: [PATCH 179/214] Add Cargo.toml to dependencies

---
 01_wait_forever/Makefile                          | 6 +++---
 02_runtime_init/Makefile                          | 6 +++---
 03_hacky_hello_world/Makefile                     | 6 +++---
 04_safe_globals/Makefile                          | 6 +++---
 05_drivers_gpio_uart/Makefile                     | 6 +++---
 06_uart_chainloader/Makefile                      | 6 +++---
 07_timestamps/Makefile                            | 6 +++---
 08_hw_debug_JTAG/Makefile                         | 6 +++---
 09_privilege_level/Makefile                       | 6 +++---
 10_virtual_mem_part1_identity_mapping/Makefile    | 6 +++---
 11_exceptions_part1_groundwork/Makefile           | 6 +++---
 12_integrated_testing/Makefile                    | 2 +-
 13_exceptions_part2_peripheral_IRQs/Makefile      | 2 +-
 14_virtual_mem_part2_mmio_remap/Makefile          | 2 +-
 15_virtual_mem_part3_precomputed_tables/Makefile  | 2 +-
 15_virtual_mem_part3_precomputed_tables/README.md | 4 ++--
 16_virtual_mem_part4_higher_half_kernel/Makefile  | 2 +-
 17_kernel_symbols/Makefile                        | 2 +-
 18_backtrace/Makefile                             | 2 +-
 19_kernel_heap/Makefile                           | 2 +-
 X1_JTAG_boot/Makefile                             | 6 +++---
 21 files changed, 46 insertions(+), 46 deletions(-)

diff --git a/01_wait_forever/Makefile b/01_wait_forever/Makefile
index 8ddb26cd5..679b23b4f 100644
--- a/01_wait_forever/Makefile
+++ b/01_wait_forever/Makefile
@@ -51,14 +51,14 @@ export LD_SCRIPT_PATH
 ##--------------------------------------------------------------------------------------------------
 ## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
+KERNEL_MANIFEST      = Cargo.toml
 KERNEL_LINKER_SCRIPT = kernel.ld
-
-LAST_BUILD_CONFIG = target/$(BSP).build_config
+LAST_BUILD_CONFIG    = target/$(BSP).build_config
 
 KERNEL_ELF      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
 # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
-KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(LAST_BUILD_CONFIG)
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(KERNEL_MANIFEST) $(LAST_BUILD_CONFIG)
 
 
 
diff --git a/02_runtime_init/Makefile b/02_runtime_init/Makefile
index af9bbc273..0abb67cc3 100644
--- a/02_runtime_init/Makefile
+++ b/02_runtime_init/Makefile
@@ -51,14 +51,14 @@ export LD_SCRIPT_PATH
 ##--------------------------------------------------------------------------------------------------
 ## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
+KERNEL_MANIFEST      = Cargo.toml
 KERNEL_LINKER_SCRIPT = kernel.ld
-
-LAST_BUILD_CONFIG = target/$(BSP).build_config
+LAST_BUILD_CONFIG    = target/$(BSP).build_config
 
 KERNEL_ELF      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
 # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
-KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(LAST_BUILD_CONFIG)
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(KERNEL_MANIFEST) $(LAST_BUILD_CONFIG)
 
 
 
diff --git a/03_hacky_hello_world/Makefile b/03_hacky_hello_world/Makefile
index 8ddaf9e71..cfd5dc6ed 100644
--- a/03_hacky_hello_world/Makefile
+++ b/03_hacky_hello_world/Makefile
@@ -51,14 +51,14 @@ export LD_SCRIPT_PATH
 ##--------------------------------------------------------------------------------------------------
 ## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
+KERNEL_MANIFEST      = Cargo.toml
 KERNEL_LINKER_SCRIPT = kernel.ld
-
-LAST_BUILD_CONFIG = target/$(BSP).build_config
+LAST_BUILD_CONFIG    = target/$(BSP).build_config
 
 KERNEL_ELF      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
 # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
-KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(LAST_BUILD_CONFIG)
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(KERNEL_MANIFEST) $(LAST_BUILD_CONFIG)
 
 
 
diff --git a/04_safe_globals/Makefile b/04_safe_globals/Makefile
index 8ddaf9e71..cfd5dc6ed 100644
--- a/04_safe_globals/Makefile
+++ b/04_safe_globals/Makefile
@@ -51,14 +51,14 @@ export LD_SCRIPT_PATH
 ##--------------------------------------------------------------------------------------------------
 ## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
+KERNEL_MANIFEST      = Cargo.toml
 KERNEL_LINKER_SCRIPT = kernel.ld
-
-LAST_BUILD_CONFIG = target/$(BSP).build_config
+LAST_BUILD_CONFIG    = target/$(BSP).build_config
 
 KERNEL_ELF      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
 # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
-KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(LAST_BUILD_CONFIG)
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(KERNEL_MANIFEST) $(LAST_BUILD_CONFIG)
 
 
 
diff --git a/05_drivers_gpio_uart/Makefile b/05_drivers_gpio_uart/Makefile
index 183d7864c..29d6729ff 100644
--- a/05_drivers_gpio_uart/Makefile
+++ b/05_drivers_gpio_uart/Makefile
@@ -54,14 +54,14 @@ export LD_SCRIPT_PATH
 ##--------------------------------------------------------------------------------------------------
 ## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
+KERNEL_MANIFEST      = Cargo.toml
 KERNEL_LINKER_SCRIPT = kernel.ld
-
-LAST_BUILD_CONFIG = target/$(BSP).build_config
+LAST_BUILD_CONFIG    = target/$(BSP).build_config
 
 KERNEL_ELF      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
 # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
-KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(LAST_BUILD_CONFIG)
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(KERNEL_MANIFEST) $(LAST_BUILD_CONFIG)
 
 
 
diff --git a/06_uart_chainloader/Makefile b/06_uart_chainloader/Makefile
index 91245573d..d7b102ae6 100644
--- a/06_uart_chainloader/Makefile
+++ b/06_uart_chainloader/Makefile
@@ -56,14 +56,14 @@ export LD_SCRIPT_PATH
 ##--------------------------------------------------------------------------------------------------
 ## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
+KERNEL_MANIFEST      = Cargo.toml
 KERNEL_LINKER_SCRIPT = kernel.ld
-
-LAST_BUILD_CONFIG = target/$(BSP).build_config
+LAST_BUILD_CONFIG    = target/$(BSP).build_config
 
 KERNEL_ELF      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
 # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
-KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(LAST_BUILD_CONFIG)
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(KERNEL_MANIFEST) $(LAST_BUILD_CONFIG)
 
 
 
diff --git a/07_timestamps/Makefile b/07_timestamps/Makefile
index c183c6061..76ddb186e 100644
--- a/07_timestamps/Makefile
+++ b/07_timestamps/Makefile
@@ -54,14 +54,14 @@ export LD_SCRIPT_PATH
 ##--------------------------------------------------------------------------------------------------
 ## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
+KERNEL_MANIFEST      = Cargo.toml
 KERNEL_LINKER_SCRIPT = kernel.ld
-
-LAST_BUILD_CONFIG = target/$(BSP).build_config
+LAST_BUILD_CONFIG    = target/$(BSP).build_config
 
 KERNEL_ELF      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
 # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
-KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(LAST_BUILD_CONFIG)
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(KERNEL_MANIFEST) $(LAST_BUILD_CONFIG)
 
 
 
diff --git a/08_hw_debug_JTAG/Makefile b/08_hw_debug_JTAG/Makefile
index 3202f53ab..ce0ebc314 100644
--- a/08_hw_debug_JTAG/Makefile
+++ b/08_hw_debug_JTAG/Makefile
@@ -58,14 +58,14 @@ export LD_SCRIPT_PATH
 ##--------------------------------------------------------------------------------------------------
 ## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
+KERNEL_MANIFEST      = Cargo.toml
 KERNEL_LINKER_SCRIPT = kernel.ld
-
-LAST_BUILD_CONFIG = target/$(BSP).build_config
+LAST_BUILD_CONFIG    = target/$(BSP).build_config
 
 KERNEL_ELF      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
 # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
-KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(LAST_BUILD_CONFIG)
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(KERNEL_MANIFEST) $(LAST_BUILD_CONFIG)
 
 
 
diff --git a/09_privilege_level/Makefile b/09_privilege_level/Makefile
index 3202f53ab..ce0ebc314 100644
--- a/09_privilege_level/Makefile
+++ b/09_privilege_level/Makefile
@@ -58,14 +58,14 @@ export LD_SCRIPT_PATH
 ##--------------------------------------------------------------------------------------------------
 ## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
+KERNEL_MANIFEST      = Cargo.toml
 KERNEL_LINKER_SCRIPT = kernel.ld
-
-LAST_BUILD_CONFIG = target/$(BSP).build_config
+LAST_BUILD_CONFIG    = target/$(BSP).build_config
 
 KERNEL_ELF      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
 # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
-KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(LAST_BUILD_CONFIG)
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(KERNEL_MANIFEST) $(LAST_BUILD_CONFIG)
 
 
 
diff --git a/10_virtual_mem_part1_identity_mapping/Makefile b/10_virtual_mem_part1_identity_mapping/Makefile
index 3202f53ab..ce0ebc314 100644
--- a/10_virtual_mem_part1_identity_mapping/Makefile
+++ b/10_virtual_mem_part1_identity_mapping/Makefile
@@ -58,14 +58,14 @@ export LD_SCRIPT_PATH
 ##--------------------------------------------------------------------------------------------------
 ## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
+KERNEL_MANIFEST      = Cargo.toml
 KERNEL_LINKER_SCRIPT = kernel.ld
-
-LAST_BUILD_CONFIG = target/$(BSP).build_config
+LAST_BUILD_CONFIG    = target/$(BSP).build_config
 
 KERNEL_ELF      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
 # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
-KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(LAST_BUILD_CONFIG)
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(KERNEL_MANIFEST) $(LAST_BUILD_CONFIG)
 
 
 
diff --git a/11_exceptions_part1_groundwork/Makefile b/11_exceptions_part1_groundwork/Makefile
index 3202f53ab..ce0ebc314 100644
--- a/11_exceptions_part1_groundwork/Makefile
+++ b/11_exceptions_part1_groundwork/Makefile
@@ -58,14 +58,14 @@ export LD_SCRIPT_PATH
 ##--------------------------------------------------------------------------------------------------
 ## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
+KERNEL_MANIFEST      = Cargo.toml
 KERNEL_LINKER_SCRIPT = kernel.ld
-
-LAST_BUILD_CONFIG = target/$(BSP).build_config
+LAST_BUILD_CONFIG    = target/$(BSP).build_config
 
 KERNEL_ELF      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
 # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
-KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(LAST_BUILD_CONFIG)
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(KERNEL_MANIFEST) $(LAST_BUILD_CONFIG)
 
 
 
diff --git a/12_integrated_testing/Makefile b/12_integrated_testing/Makefile
index c75524618..670c30c4e 100644
--- a/12_integrated_testing/Makefile
+++ b/12_integrated_testing/Makefile
@@ -74,7 +74,7 @@ LAST_BUILD_CONFIG    = target/$(BSP).build_config
 KERNEL_ELF      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
 # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
-KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(LAST_BUILD_CONFIG)
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(KERNEL_MANIFEST) $(LAST_BUILD_CONFIG)
 
 
 
diff --git a/13_exceptions_part2_peripheral_IRQs/Makefile b/13_exceptions_part2_peripheral_IRQs/Makefile
index c75524618..670c30c4e 100644
--- a/13_exceptions_part2_peripheral_IRQs/Makefile
+++ b/13_exceptions_part2_peripheral_IRQs/Makefile
@@ -74,7 +74,7 @@ LAST_BUILD_CONFIG    = target/$(BSP).build_config
 KERNEL_ELF      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
 # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
-KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(LAST_BUILD_CONFIG)
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(KERNEL_MANIFEST) $(LAST_BUILD_CONFIG)
 
 
 
diff --git a/14_virtual_mem_part2_mmio_remap/Makefile b/14_virtual_mem_part2_mmio_remap/Makefile
index c75524618..670c30c4e 100644
--- a/14_virtual_mem_part2_mmio_remap/Makefile
+++ b/14_virtual_mem_part2_mmio_remap/Makefile
@@ -74,7 +74,7 @@ LAST_BUILD_CONFIG    = target/$(BSP).build_config
 KERNEL_ELF      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
 # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
-KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(LAST_BUILD_CONFIG)
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(KERNEL_MANIFEST) $(LAST_BUILD_CONFIG)
 
 
 
diff --git a/15_virtual_mem_part3_precomputed_tables/Makefile b/15_virtual_mem_part3_precomputed_tables/Makefile
index 6edf29a49..2e0a34626 100644
--- a/15_virtual_mem_part3_precomputed_tables/Makefile
+++ b/15_virtual_mem_part3_precomputed_tables/Makefile
@@ -74,7 +74,7 @@ LAST_BUILD_CONFIG    = target/$(BSP).build_config
 KERNEL_ELF_RAW      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
 # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
-KERNEL_ELF_RAW_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
+KERNEL_ELF_RAW_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(KERNEL_MANIFEST) $(LAST_BUILD_CONFIG)
 
 ##------------------------------------------------------------------------------
 ## Translation tables
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index be59abb15..40f72ba7b 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -1846,8 +1846,8 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/Makefile 15_virtual_mem_part3_precompu
 +KERNEL_ELF_RAW      = target/$(TARGET)/release/kernel
  # This parses cargo's dep-info file.
  # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
--KERNEL_ELF_DEPS = $(filter-out modulo: ,$(file < $(KERNEL_ELF).d)) $(LAST_BUILD_CONFIG)
-+KERNEL_ELF_RAW_DEPS = $(filter-out modulo: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
+-KERNEL_ELF_DEPS = $(filter-out modulo: ,$(file < $(KERNEL_ELF).d)) $(KERNEL_MANIFEST) $(LAST_BUILD_CONFIG)
++KERNEL_ELF_RAW_DEPS = $(filter-out modulo: ,$(file < $(KERNEL_ELF_RAW).d)) $(KERNEL_MANIFEST) $(LAST_BUILD_CONFIG)
 +
 +##------------------------------------------------------------------------------
 +## Translation tables
diff --git a/16_virtual_mem_part4_higher_half_kernel/Makefile b/16_virtual_mem_part4_higher_half_kernel/Makefile
index 6edf29a49..2e0a34626 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Makefile
+++ b/16_virtual_mem_part4_higher_half_kernel/Makefile
@@ -74,7 +74,7 @@ LAST_BUILD_CONFIG    = target/$(BSP).build_config
 KERNEL_ELF_RAW      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
 # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
-KERNEL_ELF_RAW_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
+KERNEL_ELF_RAW_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(KERNEL_MANIFEST) $(LAST_BUILD_CONFIG)
 
 ##------------------------------------------------------------------------------
 ## Translation tables
diff --git a/17_kernel_symbols/Makefile b/17_kernel_symbols/Makefile
index 3a7465a37..9af331403 100644
--- a/17_kernel_symbols/Makefile
+++ b/17_kernel_symbols/Makefile
@@ -74,7 +74,7 @@ LAST_BUILD_CONFIG    = target/$(BSP).build_config
 KERNEL_ELF_RAW      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
 # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
-KERNEL_ELF_RAW_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
+KERNEL_ELF_RAW_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(KERNEL_MANIFEST) $(LAST_BUILD_CONFIG)
 
 ##------------------------------------------------------------------------------
 ## Translation tables
diff --git a/18_backtrace/Makefile b/18_backtrace/Makefile
index eba659f0d..1dda95a4f 100644
--- a/18_backtrace/Makefile
+++ b/18_backtrace/Makefile
@@ -74,7 +74,7 @@ LAST_BUILD_CONFIG    = target/$(BSP).build_config
 KERNEL_ELF_RAW      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
 # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
-KERNEL_ELF_RAW_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
+KERNEL_ELF_RAW_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(KERNEL_MANIFEST) $(LAST_BUILD_CONFIG)
 
 ##------------------------------------------------------------------------------
 ## Translation tables
diff --git a/19_kernel_heap/Makefile b/19_kernel_heap/Makefile
index c9a7d593d..7b1673f34 100644
--- a/19_kernel_heap/Makefile
+++ b/19_kernel_heap/Makefile
@@ -79,7 +79,7 @@ LAST_BUILD_CONFIG    = target/$(BSP)_$(DEBUG_PRINTS).build_config
 KERNEL_ELF_RAW      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
 # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
-KERNEL_ELF_RAW_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(LAST_BUILD_CONFIG)
+KERNEL_ELF_RAW_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(KERNEL_MANIFEST) $(LAST_BUILD_CONFIG)
 
 ##------------------------------------------------------------------------------
 ## Translation tables
diff --git a/X1_JTAG_boot/Makefile b/X1_JTAG_boot/Makefile
index c183c6061..76ddb186e 100644
--- a/X1_JTAG_boot/Makefile
+++ b/X1_JTAG_boot/Makefile
@@ -54,14 +54,14 @@ export LD_SCRIPT_PATH
 ##--------------------------------------------------------------------------------------------------
 ## Targets and Prerequisites
 ##--------------------------------------------------------------------------------------------------
+KERNEL_MANIFEST      = Cargo.toml
 KERNEL_LINKER_SCRIPT = kernel.ld
-
-LAST_BUILD_CONFIG = target/$(BSP).build_config
+LAST_BUILD_CONFIG    = target/$(BSP).build_config
 
 KERNEL_ELF      = target/$(TARGET)/release/kernel
 # This parses cargo's dep-info file.
 # https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
-KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(LAST_BUILD_CONFIG)
+KERNEL_ELF_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF).d)) $(KERNEL_MANIFEST) $(LAST_BUILD_CONFIG)
 
 
 

From f7d3645d88ace0272d5510266ec8c11fb34c3a81 Mon Sep 17 00:00:00 2001
From: Hamish Poole <hamishgcp@gmail.com>
Date: Sat, 30 Jul 2022 18:25:09 +1000
Subject: [PATCH 180/214] Copy editing and UART clarification.

---
 05_drivers_gpio_uart/README.md | 1 +
 common/serial/minipush.rb      | 4 ++--
 common/serial/miniterm.rb      | 8 ++++----
 3 files changed, 7 insertions(+), 6 deletions(-)

diff --git a/05_drivers_gpio_uart/README.md b/05_drivers_gpio_uart/README.md
index 555ac0316..85f53650a 100644
--- a/05_drivers_gpio_uart/README.md
+++ b/05_drivers_gpio_uart/README.md
@@ -81,6 +81,7 @@ $ DEV_SERIAL=/dev/tty.usbserial-0001 make miniterm
 
 7. Connect the USB serial to your host PC.
     - Wiring diagram at [top-level README](../README.md#-usb-serial-output).
+    - \## <u>**NOTE**</u> ## TX (transmit) wire connects to the RX (receive) pin.
     - Make sure that you **DID NOT** connect the power pin of the USB serial. Only RX/TX and GND.
 8. Connect the RPi to the (USB) power cable and observe the output:
 
diff --git a/common/serial/minipush.rb b/common/serial/minipush.rb
index 62feebf2a..262ce20a0 100755
--- a/common/serial/minipush.rb
+++ b/common/serial/minipush.rb
@@ -82,7 +82,7 @@ def send_payload
 
     # override
     def handle_reconnect(_error)
-        connetion_reset
+        connection_reset
 
         puts
         puts "[#{@name_short}] ⚡ " \
@@ -107,7 +107,7 @@ def run
     rescue StandardError => e
         handle_unexpected(e)
     ensure
-        connetion_reset
+        connection_reset
         puts
         puts "[#{@name_short}] Bye 👋"
     end
diff --git a/common/serial/miniterm.rb b/common/serial/miniterm.rb
index 996e1d3fe..038ed978f 100755
--- a/common/serial/miniterm.rb
+++ b/common/serial/miniterm.rb
@@ -88,7 +88,7 @@ def terminal
         end
     end
 
-    def connetion_reset
+    def connection_reset
         @target_serial&.close
         @target_serial = nil
         @host_console.cooked!
@@ -96,14 +96,14 @@ def connetion_reset
 
     # When the serial lost power or was removed during R/W operation.
     def handle_reconnect(_error)
-        connetion_reset
+        connection_reset
 
         puts
         puts "[#{@name_short}] ⚡ #{'Connection Error: Reinsert the USB serial again'.light_red}"
     end
 
     def handle_unexpected(error)
-        connetion_reset
+        connection_reset
 
         puts
         puts "[#{@name_short}] ⚡ #{"Unexpected Error: #{error.inspect}".light_red}"
@@ -120,7 +120,7 @@ def run
     rescue StandardError => e
         handle_unexpected(e)
     ensure
-        connetion_reset
+        connection_reset
         puts
         puts "[#{@name_short}] Bye 👋"
     end

From 2daf3ea7fd508dbceecb77eb01ab43917684a34b Mon Sep 17 00:00:00 2001
From: Andre Richter <andre-richter@users.noreply.github.com>
Date: Sun, 31 Jul 2022 16:55:48 +0200
Subject: [PATCH 181/214] Update README.md

---
 05_drivers_gpio_uart/README.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/05_drivers_gpio_uart/README.md b/05_drivers_gpio_uart/README.md
index 85f53650a..572cd1a8c 100644
--- a/05_drivers_gpio_uart/README.md
+++ b/05_drivers_gpio_uart/README.md
@@ -81,7 +81,7 @@ $ DEV_SERIAL=/dev/tty.usbserial-0001 make miniterm
 
 7. Connect the USB serial to your host PC.
     - Wiring diagram at [top-level README](../README.md#-usb-serial-output).
-    - \## <u>**NOTE**</u> ## TX (transmit) wire connects to the RX (receive) pin.
+    - **NOTE**: TX (transmit) wire connects to the RX (receive) pin.
     - Make sure that you **DID NOT** connect the power pin of the USB serial. Only RX/TX and GND.
 8. Connect the RPi to the (USB) power cable and observe the output:
 

From 08439f33d2bba2851dd0334cee6fe1114d235907 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 8 Aug 2022 00:05:25 +0200
Subject: [PATCH 182/214] Bump compiler and dependencies

---
 .rustfmt.toml                                 |   2 --
 06_uart_chainloader/demo_payload_rpi3.img     | Bin 7736 -> 7640 bytes
 06_uart_chainloader/demo_payload_rpi4.img     | Bin 7672 -> 7584 bytes
 09_privilege_level/README.md                  |   2 +-
 09_privilege_level/src/exception.rs           |   2 +-
 .../src/exception.rs                          |   2 +-
 .../src/exception.rs                          |   2 +-
 12_integrated_testing/Cargo.lock              |  16 ++++++-------
 12_integrated_testing/kernel/src/exception.rs |   2 +-
 .../Cargo.lock                                |  16 ++++++-------
 .../kernel/src/exception.rs                   |   2 +-
 14_virtual_mem_part2_mmio_remap/Cargo.lock    |  16 ++++++-------
 14_virtual_mem_part2_mmio_remap/README.md     |  15 ++++++------
 .../kernel/src/exception.rs                   |   2 +-
 .../kernel/src/memory/mmu/mapping_record.rs   |   3 +--
 .../kernel/src/memory/mmu/types.rs            |  10 ++++----
 .../Cargo.lock                                |  16 ++++++-------
 .../README.md                                 |   2 +-
 .../kernel/src/exception.rs                   |   2 +-
 .../kernel/src/memory/mmu/mapping_record.rs   |   3 +--
 .../src/memory/mmu/translation_table.rs       |   2 +-
 .../kernel/src/memory/mmu/types.rs            |  10 ++++----
 .../Cargo.lock                                |  16 ++++++-------
 .../README.md                                 |   2 +-
 .../kernel/src/exception.rs                   |   2 +-
 .../kernel/src/memory/mmu/mapping_record.rs   |   3 +--
 .../src/memory/mmu/translation_table.rs       |   2 +-
 .../kernel/src/memory/mmu/types.rs            |  10 ++++----
 17_kernel_symbols/Cargo.lock                  |  16 ++++++-------
 17_kernel_symbols/README.md                   |  22 ++++++------------
 17_kernel_symbols/kernel/src/exception.rs     |   2 +-
 .../kernel/src/memory/mmu/mapping_record.rs   |   3 +--
 .../src/memory/mmu/translation_table.rs       |   2 +-
 .../kernel/src/memory/mmu/types.rs            |  10 ++++----
 17_kernel_symbols/kernel/src/symbols.rs       |  10 +++-----
 18_backtrace/Cargo.lock                       |  16 ++++++-------
 18_backtrace/kernel/src/exception.rs          |   2 +-
 .../kernel/src/memory/mmu/mapping_record.rs   |   3 +--
 .../src/memory/mmu/translation_table.rs       |   2 +-
 18_backtrace/kernel/src/memory/mmu/types.rs   |  10 ++++----
 18_backtrace/kernel/src/symbols.rs            |  10 +++-----
 19_kernel_heap/Cargo.lock                     |  20 ++++++++--------
 19_kernel_heap/README.md                      |  17 +++++++-------
 19_kernel_heap/kernel/src/exception.rs        |   2 +-
 .../src/memory/mmu/translation_table.rs       |   2 +-
 19_kernel_heap/kernel/src/memory/mmu/types.rs |  10 ++++----
 19_kernel_heap/kernel/src/symbols.rs          |  10 +++-----
 X1_JTAG_boot/jtag_boot_rpi3.img               | Bin 8792 -> 8680 bytes
 X1_JTAG_boot/jtag_boot_rpi4.img               | Bin 7712 -> 7648 bytes
 rust-toolchain.toml                           |   2 +-
 50 files changed, 152 insertions(+), 181 deletions(-)

diff --git a/.rustfmt.toml b/.rustfmt.toml
index 33aca681f..c05f18179 100644
--- a/.rustfmt.toml
+++ b/.rustfmt.toml
@@ -5,5 +5,3 @@ format_code_in_doc_comments = true
 normalize_comments = true
 wrap_comments = true
 comment_width = 100
-report_fixme = "Always"
-report_todo = "Always"
diff --git a/06_uart_chainloader/demo_payload_rpi3.img b/06_uart_chainloader/demo_payload_rpi3.img
index c0f226a7df2660c157a6e1360a4de8143631c965..bcb46b6137cabbe4e9a0e4e1bb1bda93b04267d1 100755
GIT binary patch
delta 2223
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z^PTUUxnrAu-_*a_@eo{jqVQYqL$bDpAGDAo_11u`s<ML6ptZwNRp}>_wPlTbRplxG
zk7G@&+3AWkr{G+HGtiVCEZC9~+*o7_7I`3;2txG*h&3le(mw8?)WmyMzH5a64q#ZG
z0+JtFHxl7jaeR2abU`@K{yj|C(d58s?=2^R-t|O2!%^7>M7aud10pFyQ2nz721F2l
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delta 2234
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Dia42a

diff --git a/06_uart_chainloader/demo_payload_rpi4.img b/06_uart_chainloader/demo_payload_rpi4.img
index 82f75d6aef373994ecde6e7c8236afcbe19e5107..9299570333f80d8105d93af4cd7fd54112b6c208 100755
GIT binary patch
delta 2061
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delta 2143
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J_3kZN^B-5{kbwXI

diff --git a/09_privilege_level/README.md b/09_privilege_level/README.md
index 63cbcb894..dcf0f9291 100644
--- a/09_privilege_level/README.md
+++ b/09_privilege_level/README.md
@@ -487,7 +487,7 @@ diff -uNr 08_hw_debug_JTAG/src/exception.rs 09_privilege_level/src/exception.rs
 +
 +/// Kernel privilege levels.
 +#[allow(missing_docs)]
-+#[derive(PartialEq)]
++#[derive(Eq, PartialEq)]
 +pub enum PrivilegeLevel {
 +    User,
 +    Kernel,
diff --git a/09_privilege_level/src/exception.rs b/09_privilege_level/src/exception.rs
index b80248f7b..d5f2e68e1 100644
--- a/09_privilege_level/src/exception.rs
+++ b/09_privilege_level/src/exception.rs
@@ -21,7 +21,7 @@ pub use arch_exception::current_privilege_level;
 
 /// Kernel privilege levels.
 #[allow(missing_docs)]
-#[derive(PartialEq)]
+#[derive(Eq, PartialEq)]
 pub enum PrivilegeLevel {
     User,
     Kernel,
diff --git a/10_virtual_mem_part1_identity_mapping/src/exception.rs b/10_virtual_mem_part1_identity_mapping/src/exception.rs
index b80248f7b..d5f2e68e1 100644
--- a/10_virtual_mem_part1_identity_mapping/src/exception.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/exception.rs
@@ -21,7 +21,7 @@ pub use arch_exception::current_privilege_level;
 
 /// Kernel privilege levels.
 #[allow(missing_docs)]
-#[derive(PartialEq)]
+#[derive(Eq, PartialEq)]
 pub enum PrivilegeLevel {
     User,
     Kernel,
diff --git a/11_exceptions_part1_groundwork/src/exception.rs b/11_exceptions_part1_groundwork/src/exception.rs
index 696787c1e..97fbad6c2 100644
--- a/11_exceptions_part1_groundwork/src/exception.rs
+++ b/11_exceptions_part1_groundwork/src/exception.rs
@@ -21,7 +21,7 @@ pub use arch_exception::{current_privilege_level, handling_init};
 
 /// Kernel privilege levels.
 #[allow(missing_docs)]
-#[derive(PartialEq)]
+#[derive(Eq, PartialEq)]
 pub enum PrivilegeLevel {
     User,
     Kernel,
diff --git a/12_integrated_testing/Cargo.lock b/12_integrated_testing/Cargo.lock
index ab04eab7c..a4e82af32 100644
--- a/12_integrated_testing/Cargo.lock
+++ b/12_integrated_testing/Cargo.lock
@@ -24,9 +24,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.40"
+version = "1.0.43"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "dd96a1e8ed2596c337f8eae5f24924ec83f5ad5ab21ea8e455d3566c69fbcaf7"
+checksum = "0a2ca2c61bc9f3d74d2886294ab7b9853abd9c1ad903a3ac7815c58989bb7bab"
 dependencies = [
  "unicode-ident",
 ]
@@ -39,18 +39,18 @@ checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
 
 [[package]]
 name = "quote"
-version = "1.0.20"
+version = "1.0.21"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "3bcdf212e9776fbcb2d23ab029360416bb1706b1aea2d1a5ba002727cbcab804"
+checksum = "bbe448f377a7d6961e30f5955f9b8d106c3f5e449d493ee1b125c1d43c2b5179"
 dependencies = [
  "proc-macro2",
 ]
 
 [[package]]
 name = "syn"
-version = "1.0.98"
+version = "1.0.99"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "c50aef8a904de4c23c788f104b7dddc7d6f79c647c7c8ce4cc8f73eb0ca773dd"
+checksum = "58dbef6ec655055e20b86b15a8cc6d439cca19b667537ac6a1369572d151ab13"
 dependencies = [
  "proc-macro2",
  "quote",
@@ -79,6 +79,6 @@ checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
 name = "unicode-ident"
-version = "1.0.1"
+version = "1.0.3"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "5bd2fe26506023ed7b5e1e315add59d6f584c621d037f9368fea9cfb988f368c"
+checksum = "c4f5b37a154999a8f3f98cc23a628d850e154479cd94decf3414696e12e31aaf"
diff --git a/12_integrated_testing/kernel/src/exception.rs b/12_integrated_testing/kernel/src/exception.rs
index f4af81444..7ea7cd806 100644
--- a/12_integrated_testing/kernel/src/exception.rs
+++ b/12_integrated_testing/kernel/src/exception.rs
@@ -21,7 +21,7 @@ pub use arch_exception::{current_privilege_level, handling_init};
 
 /// Kernel privilege levels.
 #[allow(missing_docs)]
-#[derive(PartialEq)]
+#[derive(Eq, PartialEq)]
 pub enum PrivilegeLevel {
     User,
     Kernel,
diff --git a/13_exceptions_part2_peripheral_IRQs/Cargo.lock b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
index 05e524aa3..12cd705a4 100644
--- a/13_exceptions_part2_peripheral_IRQs/Cargo.lock
+++ b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
@@ -24,9 +24,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.40"
+version = "1.0.43"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "dd96a1e8ed2596c337f8eae5f24924ec83f5ad5ab21ea8e455d3566c69fbcaf7"
+checksum = "0a2ca2c61bc9f3d74d2886294ab7b9853abd9c1ad903a3ac7815c58989bb7bab"
 dependencies = [
  "unicode-ident",
 ]
@@ -39,18 +39,18 @@ checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
 
 [[package]]
 name = "quote"
-version = "1.0.20"
+version = "1.0.21"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "3bcdf212e9776fbcb2d23ab029360416bb1706b1aea2d1a5ba002727cbcab804"
+checksum = "bbe448f377a7d6961e30f5955f9b8d106c3f5e449d493ee1b125c1d43c2b5179"
 dependencies = [
  "proc-macro2",
 ]
 
 [[package]]
 name = "syn"
-version = "1.0.98"
+version = "1.0.99"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "c50aef8a904de4c23c788f104b7dddc7d6f79c647c7c8ce4cc8f73eb0ca773dd"
+checksum = "58dbef6ec655055e20b86b15a8cc6d439cca19b667537ac6a1369572d151ab13"
 dependencies = [
  "proc-macro2",
  "quote",
@@ -79,6 +79,6 @@ checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
 name = "unicode-ident"
-version = "1.0.1"
+version = "1.0.3"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "5bd2fe26506023ed7b5e1e315add59d6f584c621d037f9368fea9cfb988f368c"
+checksum = "c4f5b37a154999a8f3f98cc23a628d850e154479cd94decf3414696e12e31aaf"
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/exception.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/exception.rs
index f4af81444..7ea7cd806 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/exception.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/exception.rs
@@ -21,7 +21,7 @@ pub use arch_exception::{current_privilege_level, handling_init};
 
 /// Kernel privilege levels.
 #[allow(missing_docs)]
-#[derive(PartialEq)]
+#[derive(Eq, PartialEq)]
 pub enum PrivilegeLevel {
     User,
     Kernel,
diff --git a/14_virtual_mem_part2_mmio_remap/Cargo.lock b/14_virtual_mem_part2_mmio_remap/Cargo.lock
index c732a7ab2..c4b4f779b 100644
--- a/14_virtual_mem_part2_mmio_remap/Cargo.lock
+++ b/14_virtual_mem_part2_mmio_remap/Cargo.lock
@@ -24,9 +24,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.40"
+version = "1.0.43"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "dd96a1e8ed2596c337f8eae5f24924ec83f5ad5ab21ea8e455d3566c69fbcaf7"
+checksum = "0a2ca2c61bc9f3d74d2886294ab7b9853abd9c1ad903a3ac7815c58989bb7bab"
 dependencies = [
  "unicode-ident",
 ]
@@ -39,18 +39,18 @@ checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
 
 [[package]]
 name = "quote"
-version = "1.0.20"
+version = "1.0.21"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "3bcdf212e9776fbcb2d23ab029360416bb1706b1aea2d1a5ba002727cbcab804"
+checksum = "bbe448f377a7d6961e30f5955f9b8d106c3f5e449d493ee1b125c1d43c2b5179"
 dependencies = [
  "proc-macro2",
 ]
 
 [[package]]
 name = "syn"
-version = "1.0.98"
+version = "1.0.99"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "c50aef8a904de4c23c788f104b7dddc7d6f79c647c7c8ce4cc8f73eb0ca773dd"
+checksum = "58dbef6ec655055e20b86b15a8cc6d439cca19b667537ac6a1369572d151ab13"
 dependencies = [
  "proc-macro2",
  "quote",
@@ -79,6 +79,6 @@ checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
 name = "unicode-ident"
-version = "1.0.1"
+version = "1.0.3"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "5bd2fe26506023ed7b5e1e315add59d6f584c621d037f9368fea9cfb988f368c"
+checksum = "c4f5b37a154999a8f3f98cc23a628d850e154479cd94decf3414696e12e31aaf"
diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index ff6e24168..c6ef13f79 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -2425,7 +2425,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs 14_virtual_mem_
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/mapping_record.rs 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/mapping_record.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/mapping_record.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/mapping_record.rs
-@@ -0,0 +1,239 @@
+@@ -0,0 +1,238 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
@@ -2531,8 +2531,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/mapping_reco
 +    ) -> Option<&mut MappingRecordEntry> {
 +        self.inner
 +            .iter_mut()
-+            .filter(|x| x.is_some())
-+            .map(|x| x.as_mut().unwrap())
++            .filter_map(|x| x.as_mut())
 +            .filter(|x| x.attribute_fields.mem_attributes == MemAttributes::Device)
 +            .find(|x| {
 +                if x.phys_start_addr != phys_region.start_addr() {
@@ -2859,13 +2858,13 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/types.rs 14_
 +//--------------------------------------------------------------------------------------------------
 +
 +/// A wrapper type around [Address] that ensures page alignment.
-+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
++#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 +pub struct PageAddress<ATYPE: AddressType> {
 +    inner: Address<ATYPE>,
 +}
 +
 +/// A type that describes a region of memory in quantities of pages.
-+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
++#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 +pub struct MemoryRegion<ATYPE: AddressType> {
 +    start: PageAddress<ATYPE>,
 +    end_exclusive: PageAddress<ATYPE>,
@@ -2873,7 +2872,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/types.rs 14_
 +
 +/// Architecture agnostic memory attributes.
 +#[allow(missing_docs)]
-+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
++#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 +pub enum MemAttributes {
 +    CacheableDRAM,
 +    Device,
@@ -2881,7 +2880,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/types.rs 14_
 +
 +/// Architecture agnostic access permissions.
 +#[allow(missing_docs)]
-+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
++#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 +pub enum AccessPermissions {
 +    ReadOnly,
 +    ReadWrite,
@@ -2889,7 +2888,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/types.rs 14_
 +
 +/// Collection of memory attributes.
 +#[allow(missing_docs)]
-+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
++#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 +pub struct AttributeFields {
 +    pub mem_attributes: MemAttributes,
 +    pub acc_perms: AccessPermissions,
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/exception.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/exception.rs
index f4af81444..7ea7cd806 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/exception.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/exception.rs
@@ -21,7 +21,7 @@ pub use arch_exception::{current_privilege_level, handling_init};
 
 /// Kernel privilege levels.
 #[allow(missing_docs)]
-#[derive(PartialEq)]
+#[derive(Eq, PartialEq)]
 pub enum PrivilegeLevel {
     User,
     Kernel,
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/mapping_record.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/mapping_record.rs
index 5bc32445b..b893fee3f 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/mapping_record.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/mapping_record.rs
@@ -103,8 +103,7 @@ impl MappingRecord {
     ) -> Option<&mut MappingRecordEntry> {
         self.inner
             .iter_mut()
-            .filter(|x| x.is_some())
-            .map(|x| x.as_mut().unwrap())
+            .filter_map(|x| x.as_mut())
             .filter(|x| x.attribute_fields.mem_attributes == MemAttributes::Device)
             .find(|x| {
                 if x.phys_start_addr != phys_region.start_addr() {
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/types.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/types.rs
index 7a4fb0713..362438fd1 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/types.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/types.rs
@@ -15,13 +15,13 @@ use core::{convert::From, iter::Step, num::NonZeroUsize, ops::Range};
 //--------------------------------------------------------------------------------------------------
 
 /// A wrapper type around [Address] that ensures page alignment.
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 pub struct PageAddress<ATYPE: AddressType> {
     inner: Address<ATYPE>,
 }
 
 /// A type that describes a region of memory in quantities of pages.
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 pub struct MemoryRegion<ATYPE: AddressType> {
     start: PageAddress<ATYPE>,
     end_exclusive: PageAddress<ATYPE>,
@@ -29,7 +29,7 @@ pub struct MemoryRegion<ATYPE: AddressType> {
 
 /// Architecture agnostic memory attributes.
 #[allow(missing_docs)]
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 pub enum MemAttributes {
     CacheableDRAM,
     Device,
@@ -37,7 +37,7 @@ pub enum MemAttributes {
 
 /// Architecture agnostic access permissions.
 #[allow(missing_docs)]
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 pub enum AccessPermissions {
     ReadOnly,
     ReadWrite,
@@ -45,7 +45,7 @@ pub enum AccessPermissions {
 
 /// Collection of memory attributes.
 #[allow(missing_docs)]
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 pub struct AttributeFields {
     pub mem_attributes: MemAttributes,
     pub acc_perms: AccessPermissions,
diff --git a/15_virtual_mem_part3_precomputed_tables/Cargo.lock b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
index 8aa6b75de..72cc4866e 100644
--- a/15_virtual_mem_part3_precomputed_tables/Cargo.lock
+++ b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
@@ -24,9 +24,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.40"
+version = "1.0.43"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "dd96a1e8ed2596c337f8eae5f24924ec83f5ad5ab21ea8e455d3566c69fbcaf7"
+checksum = "0a2ca2c61bc9f3d74d2886294ab7b9853abd9c1ad903a3ac7815c58989bb7bab"
 dependencies = [
  "unicode-ident",
 ]
@@ -39,18 +39,18 @@ checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
 
 [[package]]
 name = "quote"
-version = "1.0.20"
+version = "1.0.21"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "3bcdf212e9776fbcb2d23ab029360416bb1706b1aea2d1a5ba002727cbcab804"
+checksum = "bbe448f377a7d6961e30f5955f9b8d106c3f5e449d493ee1b125c1d43c2b5179"
 dependencies = [
  "proc-macro2",
 ]
 
 [[package]]
 name = "syn"
-version = "1.0.98"
+version = "1.0.99"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "c50aef8a904de4c23c788f104b7dddc7d6f79c647c7c8ce4cc8f73eb0ca773dd"
+checksum = "58dbef6ec655055e20b86b15a8cc6d439cca19b667537ac6a1369572d151ab13"
 dependencies = [
  "proc-macro2",
  "quote",
@@ -79,6 +79,6 @@ checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
 name = "unicode-ident"
-version = "1.0.1"
+version = "1.0.3"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "5bd2fe26506023ed7b5e1e315add59d6f584c621d037f9368fea9cfb988f368c"
+checksum = "c4f5b37a154999a8f3f98cc23a628d850e154479cd94decf3414696e12e31aaf"
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index 40f72ba7b..25c26c0af 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -1454,7 +1454,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/translation_tabl
 +        let mut tables = MinSizeTranslationTable::new_for_runtime();
 
 -        tables.init();
-+        assert!(tables.init().is_ok());
++        assert_eq!(tables.init(), Ok(()));
 
          let virt_start_page_addr: PageAddress<Virtual> = PageAddress::from(0);
          let virt_end_exclusive_page_addr: PageAddress<Virtual> =
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/exception.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/exception.rs
index f4af81444..7ea7cd806 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/exception.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/exception.rs
@@ -21,7 +21,7 @@ pub use arch_exception::{current_privilege_level, handling_init};
 
 /// Kernel privilege levels.
 #[allow(missing_docs)]
-#[derive(PartialEq)]
+#[derive(Eq, PartialEq)]
 pub enum PrivilegeLevel {
     User,
     Kernel,
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/mapping_record.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/mapping_record.rs
index 5bc32445b..b893fee3f 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/mapping_record.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/mapping_record.rs
@@ -103,8 +103,7 @@ impl MappingRecord {
     ) -> Option<&mut MappingRecordEntry> {
         self.inner
             .iter_mut()
-            .filter(|x| x.is_some())
-            .map(|x| x.as_mut().unwrap())
+            .filter_map(|x| x.as_mut())
             .filter(|x| x.attribute_fields.mem_attributes == MemAttributes::Device)
             .find(|x| {
                 if x.phys_start_addr != phys_region.start_addr() {
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/translation_table.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/translation_table.rs
index 5a34a1e69..c36fb3d63 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/translation_table.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/translation_table.rs
@@ -97,7 +97,7 @@ mod tests {
         // This will occupy a lot of space on the stack.
         let mut tables = MinSizeTranslationTable::new_for_runtime();
 
-        assert!(tables.init().is_ok());
+        assert_eq!(tables.init(), Ok(()));
 
         let virt_start_page_addr: PageAddress<Virtual> = PageAddress::from(0);
         let virt_end_exclusive_page_addr: PageAddress<Virtual> =
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/types.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/types.rs
index 7a4fb0713..362438fd1 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/types.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/types.rs
@@ -15,13 +15,13 @@ use core::{convert::From, iter::Step, num::NonZeroUsize, ops::Range};
 //--------------------------------------------------------------------------------------------------
 
 /// A wrapper type around [Address] that ensures page alignment.
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 pub struct PageAddress<ATYPE: AddressType> {
     inner: Address<ATYPE>,
 }
 
 /// A type that describes a region of memory in quantities of pages.
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 pub struct MemoryRegion<ATYPE: AddressType> {
     start: PageAddress<ATYPE>,
     end_exclusive: PageAddress<ATYPE>,
@@ -29,7 +29,7 @@ pub struct MemoryRegion<ATYPE: AddressType> {
 
 /// Architecture agnostic memory attributes.
 #[allow(missing_docs)]
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 pub enum MemAttributes {
     CacheableDRAM,
     Device,
@@ -37,7 +37,7 @@ pub enum MemAttributes {
 
 /// Architecture agnostic access permissions.
 #[allow(missing_docs)]
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 pub enum AccessPermissions {
     ReadOnly,
     ReadWrite,
@@ -45,7 +45,7 @@ pub enum AccessPermissions {
 
 /// Collection of memory attributes.
 #[allow(missing_docs)]
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 pub struct AttributeFields {
     pub mem_attributes: MemAttributes,
     pub acc_perms: AccessPermissions,
diff --git a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
index 66ac8733f..ac4f39a22 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
+++ b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
@@ -24,9 +24,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.40"
+version = "1.0.43"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "dd96a1e8ed2596c337f8eae5f24924ec83f5ad5ab21ea8e455d3566c69fbcaf7"
+checksum = "0a2ca2c61bc9f3d74d2886294ab7b9853abd9c1ad903a3ac7815c58989bb7bab"
 dependencies = [
  "unicode-ident",
 ]
@@ -39,18 +39,18 @@ checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
 
 [[package]]
 name = "quote"
-version = "1.0.20"
+version = "1.0.21"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "3bcdf212e9776fbcb2d23ab029360416bb1706b1aea2d1a5ba002727cbcab804"
+checksum = "bbe448f377a7d6961e30f5955f9b8d106c3f5e449d493ee1b125c1d43c2b5179"
 dependencies = [
  "proc-macro2",
 ]
 
 [[package]]
 name = "syn"
-version = "1.0.98"
+version = "1.0.99"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "c50aef8a904de4c23c788f104b7dddc7d6f79c647c7c8ce4cc8f73eb0ca773dd"
+checksum = "58dbef6ec655055e20b86b15a8cc6d439cca19b667537ac6a1369572d151ab13"
 dependencies = [
  "proc-macro2",
  "quote",
@@ -79,6 +79,6 @@ checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
 name = "unicode-ident"
-version = "1.0.1"
+version = "1.0.3"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "5bd2fe26506023ed7b5e1e315add59d6f584c621d037f9368fea9cfb988f368c"
+checksum = "c4f5b37a154999a8f3f98cc23a628d850e154479cd94decf3414696e12e31aaf"
diff --git a/16_virtual_mem_part4_higher_half_kernel/README.md b/16_virtual_mem_part4_higher_half_kernel/README.md
index cb50cab01..443c72238 100644
--- a/16_virtual_mem_part4_higher_half_kernel/README.md
+++ b/16_virtual_mem_part4_higher_half_kernel/README.md
@@ -749,7 +749,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/translat
 +++ 16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/translation_table.rs
 @@ -99,9 +99,9 @@
 
-         assert!(tables.init().is_ok());
+         assert_eq!(tables.init(), Ok(()));
 
 -        let virt_start_page_addr: PageAddress<Virtual> = PageAddress::from(0);
 -        let virt_end_exclusive_page_addr: PageAddress<Virtual> =
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception.rs
index f4af81444..7ea7cd806 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception.rs
@@ -21,7 +21,7 @@ pub use arch_exception::{current_privilege_level, handling_init};
 
 /// Kernel privilege levels.
 #[allow(missing_docs)]
-#[derive(PartialEq)]
+#[derive(Eq, PartialEq)]
 pub enum PrivilegeLevel {
     User,
     Kernel,
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/mapping_record.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/mapping_record.rs
index 5bc32445b..b893fee3f 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/mapping_record.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/mapping_record.rs
@@ -103,8 +103,7 @@ impl MappingRecord {
     ) -> Option<&mut MappingRecordEntry> {
         self.inner
             .iter_mut()
-            .filter(|x| x.is_some())
-            .map(|x| x.as_mut().unwrap())
+            .filter_map(|x| x.as_mut())
             .filter(|x| x.attribute_fields.mem_attributes == MemAttributes::Device)
             .find(|x| {
                 if x.phys_start_addr != phys_region.start_addr() {
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/translation_table.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/translation_table.rs
index 9d627f974..9301bb0cd 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/translation_table.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/translation_table.rs
@@ -97,7 +97,7 @@ mod tests {
         // This will occupy a lot of space on the stack.
         let mut tables = MinSizeTranslationTable::new_for_runtime();
 
-        assert!(tables.init().is_ok());
+        assert_eq!(tables.init(), Ok(()));
 
         let virt_end_exclusive_page_addr: PageAddress<Virtual> = PageAddress::MAX;
         let virt_start_page_addr: PageAddress<Virtual> =
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/types.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/types.rs
index 85c852b34..62f3926ea 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/types.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/types.rs
@@ -15,13 +15,13 @@ use core::{convert::From, iter::Step, num::NonZeroUsize, ops::Range};
 //--------------------------------------------------------------------------------------------------
 
 /// A wrapper type around [Address] that ensures page alignment.
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 pub struct PageAddress<ATYPE: AddressType> {
     inner: Address<ATYPE>,
 }
 
 /// A type that describes a region of memory in quantities of pages.
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 pub struct MemoryRegion<ATYPE: AddressType> {
     start: PageAddress<ATYPE>,
     end_exclusive: PageAddress<ATYPE>,
@@ -29,7 +29,7 @@ pub struct MemoryRegion<ATYPE: AddressType> {
 
 /// Architecture agnostic memory attributes.
 #[allow(missing_docs)]
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 pub enum MemAttributes {
     CacheableDRAM,
     Device,
@@ -37,7 +37,7 @@ pub enum MemAttributes {
 
 /// Architecture agnostic access permissions.
 #[allow(missing_docs)]
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 pub enum AccessPermissions {
     ReadOnly,
     ReadWrite,
@@ -45,7 +45,7 @@ pub enum AccessPermissions {
 
 /// Collection of memory attributes.
 #[allow(missing_docs)]
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 pub struct AttributeFields {
     pub mem_attributes: MemAttributes,
     pub acc_perms: AccessPermissions,
diff --git a/17_kernel_symbols/Cargo.lock b/17_kernel_symbols/Cargo.lock
index a0da4e21b..cd3793ed8 100644
--- a/17_kernel_symbols/Cargo.lock
+++ b/17_kernel_symbols/Cargo.lock
@@ -36,9 +36,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.40"
+version = "1.0.43"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "dd96a1e8ed2596c337f8eae5f24924ec83f5ad5ab21ea8e455d3566c69fbcaf7"
+checksum = "0a2ca2c61bc9f3d74d2886294ab7b9853abd9c1ad903a3ac7815c58989bb7bab"
 dependencies = [
  "unicode-ident",
 ]
@@ -51,18 +51,18 @@ checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
 
 [[package]]
 name = "quote"
-version = "1.0.20"
+version = "1.0.21"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "3bcdf212e9776fbcb2d23ab029360416bb1706b1aea2d1a5ba002727cbcab804"
+checksum = "bbe448f377a7d6961e30f5955f9b8d106c3f5e449d493ee1b125c1d43c2b5179"
 dependencies = [
  "proc-macro2",
 ]
 
 [[package]]
 name = "syn"
-version = "1.0.98"
+version = "1.0.99"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "c50aef8a904de4c23c788f104b7dddc7d6f79c647c7c8ce4cc8f73eb0ca773dd"
+checksum = "58dbef6ec655055e20b86b15a8cc6d439cca19b667537ac6a1369572d151ab13"
 dependencies = [
  "proc-macro2",
  "quote",
@@ -91,6 +91,6 @@ checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
 name = "unicode-ident"
-version = "1.0.1"
+version = "1.0.3"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "5bd2fe26506023ed7b5e1e315add59d6f584c621d037f9368fea9cfb988f368c"
+checksum = "c4f5b37a154999a8f3f98cc23a628d850e154479cd94decf3414696e12e31aaf"
diff --git a/17_kernel_symbols/README.md b/17_kernel_symbols/README.md
index b9d21aecd..ace1ed6ea 100644
--- a/17_kernel_symbols/README.md
+++ b/17_kernel_symbols/README.md
@@ -183,13 +183,9 @@ Lookup is done by just iterating over the slice:
 ```rust
 /// Retrieve the symbol corresponding to a virtual address, if any.
 pub fn lookup_symbol(addr: Address<Virtual>) -> Option<&'static Symbol> {
-    for i in kernel_symbols_slice() {
-        if i.contains(addr.as_usize()) {
-            return Some(i);
-        }
-    }
-
-    None
+    kernel_symbols_slice()
+        .iter()
+        .find(|&i| i.contains(addr.as_usize()))
 }
 ```
 
@@ -342,7 +338,7 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs 17_kernel_sy
 diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel/src/symbols.rs 17_kernel_symbols/kernel/src/symbols.rs
 --- 16_virtual_mem_part4_higher_half_kernel/kernel/src/symbols.rs
 +++ 17_kernel_symbols/kernel/src/symbols.rs
-@@ -0,0 +1,87 @@
+@@ -0,0 +1,83 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
@@ -394,13 +390,9 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel/src/symbols.rs 17_kerne
 +
 +/// Retrieve the symbol corresponding to a virtual address, if any.
 +pub fn lookup_symbol(addr: Address<Virtual>) -> Option<&'static Symbol> {
-+    for i in kernel_symbols_slice() {
-+        if i.contains(addr.as_usize()) {
-+            return Some(i);
-+        }
-+    }
-+
-+    None
++    kernel_symbols_slice()
++        .iter()
++        .find(|&i| i.contains(addr.as_usize()))
 +}
 +
 +//--------------------------------------------------------------------------------------------------
diff --git a/17_kernel_symbols/kernel/src/exception.rs b/17_kernel_symbols/kernel/src/exception.rs
index f4af81444..7ea7cd806 100644
--- a/17_kernel_symbols/kernel/src/exception.rs
+++ b/17_kernel_symbols/kernel/src/exception.rs
@@ -21,7 +21,7 @@ pub use arch_exception::{current_privilege_level, handling_init};
 
 /// Kernel privilege levels.
 #[allow(missing_docs)]
-#[derive(PartialEq)]
+#[derive(Eq, PartialEq)]
 pub enum PrivilegeLevel {
     User,
     Kernel,
diff --git a/17_kernel_symbols/kernel/src/memory/mmu/mapping_record.rs b/17_kernel_symbols/kernel/src/memory/mmu/mapping_record.rs
index 5bc32445b..b893fee3f 100644
--- a/17_kernel_symbols/kernel/src/memory/mmu/mapping_record.rs
+++ b/17_kernel_symbols/kernel/src/memory/mmu/mapping_record.rs
@@ -103,8 +103,7 @@ impl MappingRecord {
     ) -> Option<&mut MappingRecordEntry> {
         self.inner
             .iter_mut()
-            .filter(|x| x.is_some())
-            .map(|x| x.as_mut().unwrap())
+            .filter_map(|x| x.as_mut())
             .filter(|x| x.attribute_fields.mem_attributes == MemAttributes::Device)
             .find(|x| {
                 if x.phys_start_addr != phys_region.start_addr() {
diff --git a/17_kernel_symbols/kernel/src/memory/mmu/translation_table.rs b/17_kernel_symbols/kernel/src/memory/mmu/translation_table.rs
index 9d627f974..9301bb0cd 100644
--- a/17_kernel_symbols/kernel/src/memory/mmu/translation_table.rs
+++ b/17_kernel_symbols/kernel/src/memory/mmu/translation_table.rs
@@ -97,7 +97,7 @@ mod tests {
         // This will occupy a lot of space on the stack.
         let mut tables = MinSizeTranslationTable::new_for_runtime();
 
-        assert!(tables.init().is_ok());
+        assert_eq!(tables.init(), Ok(()));
 
         let virt_end_exclusive_page_addr: PageAddress<Virtual> = PageAddress::MAX;
         let virt_start_page_addr: PageAddress<Virtual> =
diff --git a/17_kernel_symbols/kernel/src/memory/mmu/types.rs b/17_kernel_symbols/kernel/src/memory/mmu/types.rs
index 85c852b34..62f3926ea 100644
--- a/17_kernel_symbols/kernel/src/memory/mmu/types.rs
+++ b/17_kernel_symbols/kernel/src/memory/mmu/types.rs
@@ -15,13 +15,13 @@ use core::{convert::From, iter::Step, num::NonZeroUsize, ops::Range};
 //--------------------------------------------------------------------------------------------------
 
 /// A wrapper type around [Address] that ensures page alignment.
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 pub struct PageAddress<ATYPE: AddressType> {
     inner: Address<ATYPE>,
 }
 
 /// A type that describes a region of memory in quantities of pages.
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 pub struct MemoryRegion<ATYPE: AddressType> {
     start: PageAddress<ATYPE>,
     end_exclusive: PageAddress<ATYPE>,
@@ -29,7 +29,7 @@ pub struct MemoryRegion<ATYPE: AddressType> {
 
 /// Architecture agnostic memory attributes.
 #[allow(missing_docs)]
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 pub enum MemAttributes {
     CacheableDRAM,
     Device,
@@ -37,7 +37,7 @@ pub enum MemAttributes {
 
 /// Architecture agnostic access permissions.
 #[allow(missing_docs)]
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 pub enum AccessPermissions {
     ReadOnly,
     ReadWrite,
@@ -45,7 +45,7 @@ pub enum AccessPermissions {
 
 /// Collection of memory attributes.
 #[allow(missing_docs)]
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 pub struct AttributeFields {
     pub mem_attributes: MemAttributes,
     pub acc_perms: AccessPermissions,
diff --git a/17_kernel_symbols/kernel/src/symbols.rs b/17_kernel_symbols/kernel/src/symbols.rs
index 22001389f..7f439ce22 100644
--- a/17_kernel_symbols/kernel/src/symbols.rs
+++ b/17_kernel_symbols/kernel/src/symbols.rs
@@ -49,13 +49,9 @@ fn kernel_symbols_slice() -> &'static [Symbol] {
 
 /// Retrieve the symbol corresponding to a virtual address, if any.
 pub fn lookup_symbol(addr: Address<Virtual>) -> Option<&'static Symbol> {
-    for i in kernel_symbols_slice() {
-        if i.contains(addr.as_usize()) {
-            return Some(i);
-        }
-    }
-
-    None
+    kernel_symbols_slice()
+        .iter()
+        .find(|&i| i.contains(addr.as_usize()))
 }
 
 //--------------------------------------------------------------------------------------------------
diff --git a/18_backtrace/Cargo.lock b/18_backtrace/Cargo.lock
index e0ab66b13..3e5338e83 100644
--- a/18_backtrace/Cargo.lock
+++ b/18_backtrace/Cargo.lock
@@ -36,9 +36,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.40"
+version = "1.0.43"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "dd96a1e8ed2596c337f8eae5f24924ec83f5ad5ab21ea8e455d3566c69fbcaf7"
+checksum = "0a2ca2c61bc9f3d74d2886294ab7b9853abd9c1ad903a3ac7815c58989bb7bab"
 dependencies = [
  "unicode-ident",
 ]
@@ -51,18 +51,18 @@ checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
 
 [[package]]
 name = "quote"
-version = "1.0.20"
+version = "1.0.21"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "3bcdf212e9776fbcb2d23ab029360416bb1706b1aea2d1a5ba002727cbcab804"
+checksum = "bbe448f377a7d6961e30f5955f9b8d106c3f5e449d493ee1b125c1d43c2b5179"
 dependencies = [
  "proc-macro2",
 ]
 
 [[package]]
 name = "syn"
-version = "1.0.98"
+version = "1.0.99"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "c50aef8a904de4c23c788f104b7dddc7d6f79c647c7c8ce4cc8f73eb0ca773dd"
+checksum = "58dbef6ec655055e20b86b15a8cc6d439cca19b667537ac6a1369572d151ab13"
 dependencies = [
  "proc-macro2",
  "quote",
@@ -91,6 +91,6 @@ checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
 name = "unicode-ident"
-version = "1.0.1"
+version = "1.0.3"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "5bd2fe26506023ed7b5e1e315add59d6f584c621d037f9368fea9cfb988f368c"
+checksum = "c4f5b37a154999a8f3f98cc23a628d850e154479cd94decf3414696e12e31aaf"
diff --git a/18_backtrace/kernel/src/exception.rs b/18_backtrace/kernel/src/exception.rs
index f4af81444..7ea7cd806 100644
--- a/18_backtrace/kernel/src/exception.rs
+++ b/18_backtrace/kernel/src/exception.rs
@@ -21,7 +21,7 @@ pub use arch_exception::{current_privilege_level, handling_init};
 
 /// Kernel privilege levels.
 #[allow(missing_docs)]
-#[derive(PartialEq)]
+#[derive(Eq, PartialEq)]
 pub enum PrivilegeLevel {
     User,
     Kernel,
diff --git a/18_backtrace/kernel/src/memory/mmu/mapping_record.rs b/18_backtrace/kernel/src/memory/mmu/mapping_record.rs
index 5bc32445b..b893fee3f 100644
--- a/18_backtrace/kernel/src/memory/mmu/mapping_record.rs
+++ b/18_backtrace/kernel/src/memory/mmu/mapping_record.rs
@@ -103,8 +103,7 @@ impl MappingRecord {
     ) -> Option<&mut MappingRecordEntry> {
         self.inner
             .iter_mut()
-            .filter(|x| x.is_some())
-            .map(|x| x.as_mut().unwrap())
+            .filter_map(|x| x.as_mut())
             .filter(|x| x.attribute_fields.mem_attributes == MemAttributes::Device)
             .find(|x| {
                 if x.phys_start_addr != phys_region.start_addr() {
diff --git a/18_backtrace/kernel/src/memory/mmu/translation_table.rs b/18_backtrace/kernel/src/memory/mmu/translation_table.rs
index 9d627f974..9301bb0cd 100644
--- a/18_backtrace/kernel/src/memory/mmu/translation_table.rs
+++ b/18_backtrace/kernel/src/memory/mmu/translation_table.rs
@@ -97,7 +97,7 @@ mod tests {
         // This will occupy a lot of space on the stack.
         let mut tables = MinSizeTranslationTable::new_for_runtime();
 
-        assert!(tables.init().is_ok());
+        assert_eq!(tables.init(), Ok(()));
 
         let virt_end_exclusive_page_addr: PageAddress<Virtual> = PageAddress::MAX;
         let virt_start_page_addr: PageAddress<Virtual> =
diff --git a/18_backtrace/kernel/src/memory/mmu/types.rs b/18_backtrace/kernel/src/memory/mmu/types.rs
index 85c852b34..62f3926ea 100644
--- a/18_backtrace/kernel/src/memory/mmu/types.rs
+++ b/18_backtrace/kernel/src/memory/mmu/types.rs
@@ -15,13 +15,13 @@ use core::{convert::From, iter::Step, num::NonZeroUsize, ops::Range};
 //--------------------------------------------------------------------------------------------------
 
 /// A wrapper type around [Address] that ensures page alignment.
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 pub struct PageAddress<ATYPE: AddressType> {
     inner: Address<ATYPE>,
 }
 
 /// A type that describes a region of memory in quantities of pages.
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 pub struct MemoryRegion<ATYPE: AddressType> {
     start: PageAddress<ATYPE>,
     end_exclusive: PageAddress<ATYPE>,
@@ -29,7 +29,7 @@ pub struct MemoryRegion<ATYPE: AddressType> {
 
 /// Architecture agnostic memory attributes.
 #[allow(missing_docs)]
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 pub enum MemAttributes {
     CacheableDRAM,
     Device,
@@ -37,7 +37,7 @@ pub enum MemAttributes {
 
 /// Architecture agnostic access permissions.
 #[allow(missing_docs)]
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 pub enum AccessPermissions {
     ReadOnly,
     ReadWrite,
@@ -45,7 +45,7 @@ pub enum AccessPermissions {
 
 /// Collection of memory attributes.
 #[allow(missing_docs)]
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 pub struct AttributeFields {
     pub mem_attributes: MemAttributes,
     pub acc_perms: AccessPermissions,
diff --git a/18_backtrace/kernel/src/symbols.rs b/18_backtrace/kernel/src/symbols.rs
index 22001389f..7f439ce22 100644
--- a/18_backtrace/kernel/src/symbols.rs
+++ b/18_backtrace/kernel/src/symbols.rs
@@ -49,13 +49,9 @@ fn kernel_symbols_slice() -> &'static [Symbol] {
 
 /// Retrieve the symbol corresponding to a virtual address, if any.
 pub fn lookup_symbol(addr: Address<Virtual>) -> Option<&'static Symbol> {
-    for i in kernel_symbols_slice() {
-        if i.contains(addr.as_usize()) {
-            return Some(i);
-        }
-    }
-
-    None
+    kernel_symbols_slice()
+        .iter()
+        .find(|&i| i.contains(addr.as_usize()))
 }
 
 //--------------------------------------------------------------------------------------------------
diff --git a/19_kernel_heap/Cargo.lock b/19_kernel_heap/Cargo.lock
index 09f99f4a2..1739c78be 100644
--- a/19_kernel_heap/Cargo.lock
+++ b/19_kernel_heap/Cargo.lock
@@ -24,9 +24,9 @@ dependencies = [
 
 [[package]]
 name = "linked_list_allocator"
-version = "0.10.0"
+version = "0.10.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "222d00bf23b303e0c82c7a4d5f04dc90f33a58b26a3adb1a09c6fbcf56cbd2a9"
+checksum = "636c3bc929db632724303109c88d5d559a2a60f62243bb041387f03fa081d94a"
 
 [[package]]
 name = "mingo"
@@ -43,9 +43,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.40"
+version = "1.0.43"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "dd96a1e8ed2596c337f8eae5f24924ec83f5ad5ab21ea8e455d3566c69fbcaf7"
+checksum = "0a2ca2c61bc9f3d74d2886294ab7b9853abd9c1ad903a3ac7815c58989bb7bab"
 dependencies = [
  "unicode-ident",
 ]
@@ -58,18 +58,18 @@ checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
 
 [[package]]
 name = "quote"
-version = "1.0.20"
+version = "1.0.21"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "3bcdf212e9776fbcb2d23ab029360416bb1706b1aea2d1a5ba002727cbcab804"
+checksum = "bbe448f377a7d6961e30f5955f9b8d106c3f5e449d493ee1b125c1d43c2b5179"
 dependencies = [
  "proc-macro2",
 ]
 
 [[package]]
 name = "syn"
-version = "1.0.98"
+version = "1.0.99"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "c50aef8a904de4c23c788f104b7dddc7d6f79c647c7c8ce4cc8f73eb0ca773dd"
+checksum = "58dbef6ec655055e20b86b15a8cc6d439cca19b667537ac6a1369572d151ab13"
 dependencies = [
  "proc-macro2",
  "quote",
@@ -98,6 +98,6 @@ checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
 name = "unicode-ident"
-version = "1.0.1"
+version = "1.0.3"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "5bd2fe26506023ed7b5e1e315add59d6f584c621d037f9368fea9cfb988f368c"
+checksum = "c4f5b37a154999a8f3f98cc23a628d850e154479cd94decf3414696e12e31aaf"
diff --git a/19_kernel_heap/README.md b/19_kernel_heap/README.md
index 45f5f9e36..ecb3f8f7c 100644
--- a/19_kernel_heap/README.md
+++ b/19_kernel_heap/README.md
@@ -1090,7 +1090,7 @@ diff -uNr 18_backtrace/kernel/src/memory/mmu/mapping_record.rs 19_kernel_heap/ke
              phys_start_addr: phys_region.start_addr(),
              virt_start_addr: virt_region.start_addr(),
              num_pages: phys_region.num_pages(),
-@@ -56,55 +56,28 @@
+@@ -56,54 +56,28 @@
          }
      }
 
@@ -1146,12 +1146,11 @@ diff -uNr 18_backtrace/kernel/src/memory/mmu/mapping_record.rs 19_kernel_heap/ke
      ) -> Option<&mut MappingRecordEntry> {
          self.inner
              .iter_mut()
--            .filter(|x| x.is_some())
--            .map(|x| x.as_mut().unwrap())
+-            .filter_map(|x| x.as_mut())
              .filter(|x| x.attribute_fields.mem_attributes == MemAttributes::Device)
              .find(|x| {
                  if x.phys_start_addr != phys_region.start_addr() {
-@@ -125,10 +98,8 @@
+@@ -124,10 +98,8 @@
          virt_region: &MemoryRegion<Virtual>,
          phys_region: &MemoryRegion<Physical>,
          attr: &AttributeFields,
@@ -1164,7 +1163,7 @@ diff -uNr 18_backtrace/kernel/src/memory/mmu/mapping_record.rs 19_kernel_heap/ke
              name,
              virt_region,
              phys_region,
-@@ -136,8 +107,6 @@
+@@ -135,8 +107,6 @@
          ));
 
          self.sort();
@@ -1173,7 +1172,7 @@ diff -uNr 18_backtrace/kernel/src/memory/mmu/mapping_record.rs 19_kernel_heap/ke
      }
 
      pub fn print(&self) {
-@@ -148,7 +117,7 @@
+@@ -147,7 +117,7 @@
          );
          info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
 
@@ -1182,7 +1181,7 @@ diff -uNr 18_backtrace/kernel/src/memory/mmu/mapping_record.rs 19_kernel_heap/ke
              let size = i.num_pages * bsp::memory::mmu::KernelGranule::SIZE;
              let virt_start = i.virt_start_addr;
              let virt_end_inclusive = virt_start + (size - 1);
-@@ -184,16 +153,14 @@
+@@ -183,16 +153,14 @@
                  attr,
                  acc_p,
                  xn,
@@ -1203,7 +1202,7 @@ diff -uNr 18_backtrace/kernel/src/memory/mmu/mapping_record.rs 19_kernel_heap/ke
              }
          }
 
-@@ -212,7 +179,7 @@
+@@ -211,7 +179,7 @@
      virt_region: &MemoryRegion<Virtual>,
      phys_region: &MemoryRegion<Physical>,
      attr: &AttributeFields,
@@ -1212,7 +1211,7 @@ diff -uNr 18_backtrace/kernel/src/memory/mmu/mapping_record.rs 19_kernel_heap/ke
      KERNEL_MAPPING_RECORD.write(|mr| mr.add(name, virt_region, phys_region, attr))
  }
 
-@@ -225,9 +192,7 @@
+@@ -224,9 +192,7 @@
      KERNEL_MAPPING_RECORD.write(|mr| {
          let dup = mr.find_duplicate(&phys_region)?;
 
diff --git a/19_kernel_heap/kernel/src/exception.rs b/19_kernel_heap/kernel/src/exception.rs
index f4af81444..7ea7cd806 100644
--- a/19_kernel_heap/kernel/src/exception.rs
+++ b/19_kernel_heap/kernel/src/exception.rs
@@ -21,7 +21,7 @@ pub use arch_exception::{current_privilege_level, handling_init};
 
 /// Kernel privilege levels.
 #[allow(missing_docs)]
-#[derive(PartialEq)]
+#[derive(Eq, PartialEq)]
 pub enum PrivilegeLevel {
     User,
     Kernel,
diff --git a/19_kernel_heap/kernel/src/memory/mmu/translation_table.rs b/19_kernel_heap/kernel/src/memory/mmu/translation_table.rs
index 9d627f974..9301bb0cd 100644
--- a/19_kernel_heap/kernel/src/memory/mmu/translation_table.rs
+++ b/19_kernel_heap/kernel/src/memory/mmu/translation_table.rs
@@ -97,7 +97,7 @@ mod tests {
         // This will occupy a lot of space on the stack.
         let mut tables = MinSizeTranslationTable::new_for_runtime();
 
-        assert!(tables.init().is_ok());
+        assert_eq!(tables.init(), Ok(()));
 
         let virt_end_exclusive_page_addr: PageAddress<Virtual> = PageAddress::MAX;
         let virt_start_page_addr: PageAddress<Virtual> =
diff --git a/19_kernel_heap/kernel/src/memory/mmu/types.rs b/19_kernel_heap/kernel/src/memory/mmu/types.rs
index 85c852b34..62f3926ea 100644
--- a/19_kernel_heap/kernel/src/memory/mmu/types.rs
+++ b/19_kernel_heap/kernel/src/memory/mmu/types.rs
@@ -15,13 +15,13 @@ use core::{convert::From, iter::Step, num::NonZeroUsize, ops::Range};
 //--------------------------------------------------------------------------------------------------
 
 /// A wrapper type around [Address] that ensures page alignment.
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 pub struct PageAddress<ATYPE: AddressType> {
     inner: Address<ATYPE>,
 }
 
 /// A type that describes a region of memory in quantities of pages.
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 pub struct MemoryRegion<ATYPE: AddressType> {
     start: PageAddress<ATYPE>,
     end_exclusive: PageAddress<ATYPE>,
@@ -29,7 +29,7 @@ pub struct MemoryRegion<ATYPE: AddressType> {
 
 /// Architecture agnostic memory attributes.
 #[allow(missing_docs)]
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 pub enum MemAttributes {
     CacheableDRAM,
     Device,
@@ -37,7 +37,7 @@ pub enum MemAttributes {
 
 /// Architecture agnostic access permissions.
 #[allow(missing_docs)]
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 pub enum AccessPermissions {
     ReadOnly,
     ReadWrite,
@@ -45,7 +45,7 @@ pub enum AccessPermissions {
 
 /// Collection of memory attributes.
 #[allow(missing_docs)]
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
 pub struct AttributeFields {
     pub mem_attributes: MemAttributes,
     pub acc_perms: AccessPermissions,
diff --git a/19_kernel_heap/kernel/src/symbols.rs b/19_kernel_heap/kernel/src/symbols.rs
index 22001389f..7f439ce22 100644
--- a/19_kernel_heap/kernel/src/symbols.rs
+++ b/19_kernel_heap/kernel/src/symbols.rs
@@ -49,13 +49,9 @@ fn kernel_symbols_slice() -> &'static [Symbol] {
 
 /// Retrieve the symbol corresponding to a virtual address, if any.
 pub fn lookup_symbol(addr: Address<Virtual>) -> Option<&'static Symbol> {
-    for i in kernel_symbols_slice() {
-        if i.contains(addr.as_usize()) {
-            return Some(i);
-        }
-    }
-
-    None
+    kernel_symbols_slice()
+        .iter()
+        .find(|&i| i.contains(addr.as_usize()))
 }
 
 //--------------------------------------------------------------------------------------------------
diff --git a/X1_JTAG_boot/jtag_boot_rpi3.img b/X1_JTAG_boot/jtag_boot_rpi3.img
index 4f2c13b0dc1a7ab85bbd5dcc18f7810c00c8b275..0c43ac469d8e20830ad0043edcbda3c99edc87e8 100755
GIT binary patch
delta 2116
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delta 2247
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diff --git a/X1_JTAG_boot/jtag_boot_rpi4.img b/X1_JTAG_boot/jtag_boot_rpi4.img
index ee1f6fc4c545edda38bc7b5ccb60381b0ebb4ad2..83c4176a7b375931bf248cd0bf1b840093ffbed2 100755
GIT binary patch
delta 1644
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zo=Q@~-t(+Z_W3Z}IigIDfpTooI29xCSOSw7hEc|ordq6#-P8<HfTrR*(1%y8q5pov
zIv3Dedo1_LqJaZ!$uxGcz~5nvi3rmoY0g#KV<X3Hsa^3s%RTkgb{KKsr3jh0_$ych
z=K~njKC$pF<Q89-)cHh-`rrkZdT*OsH3Rh>YUl!Zv`}ymX%YLP4Zk$f$trFAq=;*r
z1((+*qYGQEir5Pkd*Q7ReRWv+JtX%BgmWMF2Uw<t^LZKdKPgo6^Y`5L5~x~22+lV`
zZugh{@s{GVJyppIXB-Q!UDc1lh(_HRKgQy%+P#)fu&5eIr>ZB5)N+73dXu0yNGfz%
zZ-$(HgO~)2?=vKQn5ep2Fm?4B*9B`9?;Gsq^3};d49SVD+Kim(!%Iw)qZ*{yB;;oJ
zTdXWL@AMEz<EFk;)jRn}FEj6loJi{ps!UU=0OI&Bt%HwSwC;*nv|d@r(~ADTp})*I
zMh4Pgt5pa|#rd1l@Ig=E;%BCn-eX$XiXCYInLtT_wYTN<O-)<nwr3t$w@z-~7~c+X
z&~DjHXZ*ouWXhrZecJbL`%(7nitFqtudigk*RtR@%ao(6%Uez^uzv5hK;d8bcuZmW
zD23>kS<d@yjqJ7}^!9YtzS+~&eK6e9%iZT!TK9!dsDyV_Y^&cVrl@5}vjcv)noli?
zoZlU*@_M1<yx!t-ur0nwl0$E9Yu#2ElJ|9Wzbc31&NueGwZB_-I+0WOznTZ~VQb8!
q0ONVxN(wNM*YR6z%1?P+$m`^K_Kq(>*xX8481yrjZvz|k%YOs8srR`6

diff --git a/rust-toolchain.toml b/rust-toolchain.toml
index 9667a009c..0a5255452 100644
--- a/rust-toolchain.toml
+++ b/rust-toolchain.toml
@@ -1,4 +1,4 @@
 [toolchain]
-channel = "nightly-2022-04-10"
+channel = "nightly-2022-08-01"
 components = ["rust-src", "llvm-tools-preview", "rustfmt"]
 targets = ["aarch64-unknown-none-softfloat"]

From 8ab5417c776ddf8bbab3f6d01f4b75f1864e2ed2 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 19 Sep 2022 08:45:36 +0200
Subject: [PATCH 183/214] Bump dependencies

---
 02_runtime_init/Cargo.lock                    |   4 ++--
 03_hacky_hello_world/Cargo.lock               |   4 ++--
 04_safe_globals/Cargo.lock                    |   4 ++--
 05_drivers_gpio_uart/Cargo.lock               |   4 ++--
 06_uart_chainloader/Cargo.lock                |   4 ++--
 06_uart_chainloader/demo_payload_rpi3.img     | Bin 7640 -> 7648 bytes
 06_uart_chainloader/demo_payload_rpi4.img     | Bin 7584 -> 7576 bytes
 07_timestamps/Cargo.lock                      |   4 ++--
 08_hw_debug_JTAG/Cargo.lock                   |   4 ++--
 09_privilege_level/Cargo.lock                 |   4 ++--
 .../Cargo.lock                                |   4 ++--
 11_exceptions_part1_groundwork/Cargo.lock     |   4 ++--
 12_integrated_testing/Cargo.lock              |  12 ++++++------
 .../Cargo.lock                                |  12 ++++++------
 14_virtual_mem_part2_mmio_remap/Cargo.lock    |  12 ++++++------
 .../Cargo.lock                                |  12 ++++++------
 .../Cargo.lock                                |  12 ++++++------
 17_kernel_symbols/Cargo.lock                  |  12 ++++++------
 18_backtrace/Cargo.lock                       |  12 ++++++------
 19_kernel_heap/Cargo.lock                     |  16 ++++++++--------
 X1_JTAG_boot/Cargo.lock                       |   4 ++--
 X1_JTAG_boot/jtag_boot_rpi3.img               | Bin 8680 -> 8712 bytes
 X1_JTAG_boot/jtag_boot_rpi4.img               | Bin 7648 -> 7616 bytes
 23 files changed, 72 insertions(+), 72 deletions(-)

diff --git a/02_runtime_init/Cargo.lock b/02_runtime_init/Cargo.lock
index d164c36ba..bae18da05 100644
--- a/02_runtime_init/Cargo.lock
+++ b/02_runtime_init/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.4.0"
+version = "7.5.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f75db6964ed6748e88ff46f9aa209249a0aefe6b06d4b9e9ab820c867586d51a"
+checksum = "bdecfbb28672ad3664e71ae05a398a52df430d86d660691501b28968cc4467e6"
 dependencies = [
  "tock-registers",
 ]
diff --git a/03_hacky_hello_world/Cargo.lock b/03_hacky_hello_world/Cargo.lock
index 0609efb6a..baa9f9c4b 100644
--- a/03_hacky_hello_world/Cargo.lock
+++ b/03_hacky_hello_world/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.4.0"
+version = "7.5.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f75db6964ed6748e88ff46f9aa209249a0aefe6b06d4b9e9ab820c867586d51a"
+checksum = "bdecfbb28672ad3664e71ae05a398a52df430d86d660691501b28968cc4467e6"
 dependencies = [
  "tock-registers",
 ]
diff --git a/04_safe_globals/Cargo.lock b/04_safe_globals/Cargo.lock
index d5be28614..72bdf6309 100644
--- a/04_safe_globals/Cargo.lock
+++ b/04_safe_globals/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.4.0"
+version = "7.5.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f75db6964ed6748e88ff46f9aa209249a0aefe6b06d4b9e9ab820c867586d51a"
+checksum = "bdecfbb28672ad3664e71ae05a398a52df430d86d660691501b28968cc4467e6"
 dependencies = [
  "tock-registers",
 ]
diff --git a/05_drivers_gpio_uart/Cargo.lock b/05_drivers_gpio_uart/Cargo.lock
index 9958f13cd..87686e393 100644
--- a/05_drivers_gpio_uart/Cargo.lock
+++ b/05_drivers_gpio_uart/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.4.0"
+version = "7.5.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f75db6964ed6748e88ff46f9aa209249a0aefe6b06d4b9e9ab820c867586d51a"
+checksum = "bdecfbb28672ad3664e71ae05a398a52df430d86d660691501b28968cc4467e6"
 dependencies = [
  "tock-registers",
 ]
diff --git a/06_uart_chainloader/Cargo.lock b/06_uart_chainloader/Cargo.lock
index e0cea1785..0936e7c6c 100644
--- a/06_uart_chainloader/Cargo.lock
+++ b/06_uart_chainloader/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.4.0"
+version = "7.5.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f75db6964ed6748e88ff46f9aa209249a0aefe6b06d4b9e9ab820c867586d51a"
+checksum = "bdecfbb28672ad3664e71ae05a398a52df430d86d660691501b28968cc4467e6"
 dependencies = [
  "tock-registers",
 ]
diff --git a/06_uart_chainloader/demo_payload_rpi3.img b/06_uart_chainloader/demo_payload_rpi3.img
index bcb46b6137cabbe4e9a0e4e1bb1bda93b04267d1..2016c14e26bd5edce571ca2424a5cfa9b916d826 100755
GIT binary patch
delta 1298
zcmZ8gZ)jUp6hH61rcJUrUh}u+&w9JGP1A&!rHkoW*lG$LlZvAV3PYDp$JV+eqf^9B
zY3T=XiuCRZE$F1$582CxGHS<)Ut0XK;TJ19$3%D)KO}{M=%-kg=eh4)=br<YbI-ZI
z^XGTYdk=>7;f1{1V!L&=tc0Z$jm`B?{T)fuBS32v(E4C@qP7A@x0KbUQjugSwOX-#
zwm-HWr=3Lk;mR1O^~kzbH;mtE3eecrAl2iNwlfOmyL5uhxQYku01NN6%uYDA#~S^%
zk@ab>XQ1B(>yAHXC+yqo6JL&{{C&|c4P(*XJ)$`ixtOlFtGt1or<B-D?#C2{(Wcp@
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z-&YeIFGwy3;Yj`^z7V_m<WKBcX!MxcVLcI{?}jb=Qozz1!d?>g#N_2mXV1;dyiHC`
zkpWf+#M?w-wiHNpj0CN){lclDw&7tU9G}jOK1WWRI{ADwK`u@e&yfUqwRG{#LXkL~
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zEQHv1!QLSdGxl&F3Na-~`h?%aqCY9@e<-tbsMnPjZu~n;!K~Av-UCa*ZP919!-xI?
DwMb9?

delta 1277
zcmZ8gO>7fK6n?vFC${;~%D<_9noXU=Z0tH|u<Mo}a2yH(M2W1F9#93Lit+=oQD~+1
z(m3US`lG^hD$zp^0S;z;3X0Mu7nI)M&;u$U)QW1;UUqXpD3vO?O}u@xp0rh;G@5ze
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diff --git a/06_uart_chainloader/demo_payload_rpi4.img b/06_uart_chainloader/demo_payload_rpi4.img
index 9299570333f80d8105d93af4cd7fd54112b6c208..7be0ece0ad39e99544280e4fe3d9f82d0d874875 100755
GIT binary patch
delta 1331
zcmZ8gU1%It6h3z+8)id^lkCsL-Kjh6ru*M@HQoGleb{!f8pWCf)Apf|jcwFOn#7IT
z_Qg%@L&Yj)xP^!hB^aU3J_r&b$%7CDA?rg)L0dr|#<t3?_)th%vI)(2?#^8*y)fK+
z&UeoDopbJ;x%B7hnH<^pc6gnTHx>qMpAsdZMJ}{!#wDT~0np0VKo7(8KzSZ|ei9aT
zgs%xnEL^jfL^8DSPV;X<WHGGyRpHl{G9Xm~%X-B$@0A76A~(7<BS!RpvQWc+$k2T2
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zQV9qVLvR+C(9dMWEcME1QlZD>fP-|_q*kA!AIgD32qfc_O}l;3rs+H8Yz`nbgc+u3
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zs+Dbe(;3^J28m&Vn;3f>baoD-uY8>7PNbT$b!zJ}RGGirMH4RnGYUu>^Pm~{VK>@Q
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zjWwGEyZ)fiSYtTU2GX_w+6Jl_xHHu#a?CYDs`g@>P-QoD5@)q}5i7f7DW9D*rOhGG
zx8^}>+QNpIKu;$Py8XLckIHGG{cd^J6)eIKT*VVORQj%af20+p`*)BGKPFgxXwFWH
z(Dhbhrg|Sq>qF`7pg+6)hn~P}lwpx&jLbDcSG~P(ht=NWZS84hidN3=4{6jBASHU#
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dEB#mrwzl#4;xATP$nm2Rbo6nzho0XZ`VZ?Ng6aSO

delta 1356
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diff --git a/07_timestamps/Cargo.lock b/07_timestamps/Cargo.lock
index fcc1ddd23..64174c539 100644
--- a/07_timestamps/Cargo.lock
+++ b/07_timestamps/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.4.0"
+version = "7.5.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f75db6964ed6748e88ff46f9aa209249a0aefe6b06d4b9e9ab820c867586d51a"
+checksum = "bdecfbb28672ad3664e71ae05a398a52df430d86d660691501b28968cc4467e6"
 dependencies = [
  "tock-registers",
 ]
diff --git a/08_hw_debug_JTAG/Cargo.lock b/08_hw_debug_JTAG/Cargo.lock
index 7c8e75a85..6e628b862 100644
--- a/08_hw_debug_JTAG/Cargo.lock
+++ b/08_hw_debug_JTAG/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.4.0"
+version = "7.5.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f75db6964ed6748e88ff46f9aa209249a0aefe6b06d4b9e9ab820c867586d51a"
+checksum = "bdecfbb28672ad3664e71ae05a398a52df430d86d660691501b28968cc4467e6"
 dependencies = [
  "tock-registers",
 ]
diff --git a/09_privilege_level/Cargo.lock b/09_privilege_level/Cargo.lock
index 0f3104f50..5dc791a2b 100644
--- a/09_privilege_level/Cargo.lock
+++ b/09_privilege_level/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.4.0"
+version = "7.5.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f75db6964ed6748e88ff46f9aa209249a0aefe6b06d4b9e9ab820c867586d51a"
+checksum = "bdecfbb28672ad3664e71ae05a398a52df430d86d660691501b28968cc4467e6"
 dependencies = [
  "tock-registers",
 ]
diff --git a/10_virtual_mem_part1_identity_mapping/Cargo.lock b/10_virtual_mem_part1_identity_mapping/Cargo.lock
index 544f7715d..1115edab5 100644
--- a/10_virtual_mem_part1_identity_mapping/Cargo.lock
+++ b/10_virtual_mem_part1_identity_mapping/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.4.0"
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diff --git a/11_exceptions_part1_groundwork/Cargo.lock b/11_exceptions_part1_groundwork/Cargo.lock
index 285a75b05..f1d4af579 100644
--- a/11_exceptions_part1_groundwork/Cargo.lock
+++ b/11_exceptions_part1_groundwork/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
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+checksum = "bdecfbb28672ad3664e71ae05a398a52df430d86d660691501b28968cc4467e6"
 dependencies = [
  "tock-registers",
 ]
diff --git a/12_integrated_testing/Cargo.lock b/12_integrated_testing/Cargo.lock
index a4e82af32..f188bfe0c 100644
--- a/12_integrated_testing/Cargo.lock
+++ b/12_integrated_testing/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.4.0"
+version = "7.5.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f75db6964ed6748e88ff46f9aa209249a0aefe6b06d4b9e9ab820c867586d51a"
+checksum = "bdecfbb28672ad3664e71ae05a398a52df430d86d660691501b28968cc4467e6"
 dependencies = [
  "tock-registers",
 ]
@@ -48,9 +48,9 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.99"
+version = "1.0.100"
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-checksum = "58dbef6ec655055e20b86b15a8cc6d439cca19b667537ac6a1369572d151ab13"
+checksum = "52205623b1b0f064a4e71182c3b18ae902267282930c6d5462c91b859668426e"
 dependencies = [
  "proc-macro2",
  "quote",
@@ -79,6 +79,6 @@ checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
 name = "unicode-ident"
-version = "1.0.3"
+version = "1.0.4"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "c4f5b37a154999a8f3f98cc23a628d850e154479cd94decf3414696e12e31aaf"
+checksum = "dcc811dc4066ac62f84f11307873c4850cb653bfa9b1719cee2bd2204a4bc5dd"
diff --git a/13_exceptions_part2_peripheral_IRQs/Cargo.lock b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
index 12cd705a4..e5a8e81cd 100644
--- a/13_exceptions_part2_peripheral_IRQs/Cargo.lock
+++ b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
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-version = "7.4.0"
+version = "7.5.0"
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-checksum = "f75db6964ed6748e88ff46f9aa209249a0aefe6b06d4b9e9ab820c867586d51a"
+checksum = "bdecfbb28672ad3664e71ae05a398a52df430d86d660691501b28968cc4467e6"
 dependencies = [
  "tock-registers",
 ]
@@ -48,9 +48,9 @@ dependencies = [
 
 [[package]]
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-version = "1.0.99"
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-checksum = "58dbef6ec655055e20b86b15a8cc6d439cca19b667537ac6a1369572d151ab13"
+checksum = "52205623b1b0f064a4e71182c3b18ae902267282930c6d5462c91b859668426e"
 dependencies = [
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@@ -79,6 +79,6 @@ checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
 name = "unicode-ident"
-version = "1.0.3"
+version = "1.0.4"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "c4f5b37a154999a8f3f98cc23a628d850e154479cd94decf3414696e12e31aaf"
+checksum = "dcc811dc4066ac62f84f11307873c4850cb653bfa9b1719cee2bd2204a4bc5dd"
diff --git a/14_virtual_mem_part2_mmio_remap/Cargo.lock b/14_virtual_mem_part2_mmio_remap/Cargo.lock
index c4b4f779b..163a65260 100644
--- a/14_virtual_mem_part2_mmio_remap/Cargo.lock
+++ b/14_virtual_mem_part2_mmio_remap/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.4.0"
+version = "7.5.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f75db6964ed6748e88ff46f9aa209249a0aefe6b06d4b9e9ab820c867586d51a"
+checksum = "bdecfbb28672ad3664e71ae05a398a52df430d86d660691501b28968cc4467e6"
 dependencies = [
  "tock-registers",
 ]
@@ -48,9 +48,9 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.99"
+version = "1.0.100"
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-checksum = "58dbef6ec655055e20b86b15a8cc6d439cca19b667537ac6a1369572d151ab13"
+checksum = "52205623b1b0f064a4e71182c3b18ae902267282930c6d5462c91b859668426e"
 dependencies = [
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  "quote",
@@ -79,6 +79,6 @@ checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
 name = "unicode-ident"
-version = "1.0.3"
+version = "1.0.4"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "c4f5b37a154999a8f3f98cc23a628d850e154479cd94decf3414696e12e31aaf"
+checksum = "dcc811dc4066ac62f84f11307873c4850cb653bfa9b1719cee2bd2204a4bc5dd"
diff --git a/15_virtual_mem_part3_precomputed_tables/Cargo.lock b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
index 72cc4866e..6cac9dcbf 100644
--- a/15_virtual_mem_part3_precomputed_tables/Cargo.lock
+++ b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
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-version = "7.4.0"
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-checksum = "f75db6964ed6748e88ff46f9aa209249a0aefe6b06d4b9e9ab820c867586d51a"
+checksum = "bdecfbb28672ad3664e71ae05a398a52df430d86d660691501b28968cc4467e6"
 dependencies = [
  "tock-registers",
 ]
@@ -48,9 +48,9 @@ dependencies = [
 
 [[package]]
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-version = "1.0.99"
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 dependencies = [
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@@ -79,6 +79,6 @@ checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
 name = "unicode-ident"
-version = "1.0.3"
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 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "c4f5b37a154999a8f3f98cc23a628d850e154479cd94decf3414696e12e31aaf"
+checksum = "dcc811dc4066ac62f84f11307873c4850cb653bfa9b1719cee2bd2204a4bc5dd"
diff --git a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
index ac4f39a22..a529e6738 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
+++ b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.4.0"
+version = "7.5.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f75db6964ed6748e88ff46f9aa209249a0aefe6b06d4b9e9ab820c867586d51a"
+checksum = "bdecfbb28672ad3664e71ae05a398a52df430d86d660691501b28968cc4467e6"
 dependencies = [
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 ]
@@ -48,9 +48,9 @@ dependencies = [
 
 [[package]]
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-version = "1.0.99"
+version = "1.0.100"
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-checksum = "58dbef6ec655055e20b86b15a8cc6d439cca19b667537ac6a1369572d151ab13"
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 dependencies = [
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@@ -79,6 +79,6 @@ checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
 name = "unicode-ident"
-version = "1.0.3"
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-checksum = "c4f5b37a154999a8f3f98cc23a628d850e154479cd94decf3414696e12e31aaf"
+checksum = "dcc811dc4066ac62f84f11307873c4850cb653bfa9b1719cee2bd2204a4bc5dd"
diff --git a/17_kernel_symbols/Cargo.lock b/17_kernel_symbols/Cargo.lock
index cd3793ed8..d52e3863c 100644
--- a/17_kernel_symbols/Cargo.lock
+++ b/17_kernel_symbols/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
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-version = "7.4.0"
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-checksum = "f75db6964ed6748e88ff46f9aa209249a0aefe6b06d4b9e9ab820c867586d51a"
+checksum = "bdecfbb28672ad3664e71ae05a398a52df430d86d660691501b28968cc4467e6"
 dependencies = [
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 ]
@@ -60,9 +60,9 @@ dependencies = [
 
 [[package]]
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-version = "1.0.99"
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-checksum = "58dbef6ec655055e20b86b15a8cc6d439cca19b667537ac6a1369572d151ab13"
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 dependencies = [
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@@ -91,6 +91,6 @@ checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
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-version = "1.0.3"
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-checksum = "c4f5b37a154999a8f3f98cc23a628d850e154479cd94decf3414696e12e31aaf"
+checksum = "dcc811dc4066ac62f84f11307873c4850cb653bfa9b1719cee2bd2204a4bc5dd"
diff --git a/18_backtrace/Cargo.lock b/18_backtrace/Cargo.lock
index 3e5338e83..82df825ab 100644
--- a/18_backtrace/Cargo.lock
+++ b/18_backtrace/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
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-checksum = "f75db6964ed6748e88ff46f9aa209249a0aefe6b06d4b9e9ab820c867586d51a"
+checksum = "bdecfbb28672ad3664e71ae05a398a52df430d86d660691501b28968cc4467e6"
 dependencies = [
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@@ -60,9 +60,9 @@ dependencies = [
 
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 dependencies = [
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@@ -91,6 +91,6 @@ checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
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diff --git a/19_kernel_heap/Cargo.lock b/19_kernel_heap/Cargo.lock
index 1739c78be..cc7a9c208 100644
--- a/19_kernel_heap/Cargo.lock
+++ b/19_kernel_heap/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
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 dependencies = [
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 [[package]]
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 dependencies = [
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@@ -98,6 +98,6 @@ checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
 
 [[package]]
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diff --git a/X1_JTAG_boot/Cargo.lock b/X1_JTAG_boot/Cargo.lock
index 7c8e75a85..6e628b862 100644
--- a/X1_JTAG_boot/Cargo.lock
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 [[package]]
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z(=A?I8D$zP5NC10Y(4RDu}EuAJ!#F+I%lL!;n?fBCdl9~mq08aCmtx{z`(T1v!@rV
zHvz_EfayiteYn*4s&AwltQ<h88Sj}F^63HF#z(OXDJ+3pkgv65p_QJt+3k`DRwc?x
zNk1bcIW;>@8hAjzv>jOK$Y1lcqO>-+rVHCwyI@<>1q8?WqC=&X?7vxhy3`R^lhC(W
zy*lzYKyF~wRHm4fCUmgOX`gG`)(_CwjqDXgafGm7{9FN@DBH_k%+XX?UGYbF4HJqh
zQHx~uHPe8-w%YQYVolpvqBcxk;&6l+iN|vS$%HWD^rx(p4(r6C_VsQPXmfb#DX=Eb
z<x5(9jLGY#SL`l!L}MOZ!@O&SImeO1tIXs0h$8S?GnwVOZ_Au_asiimR#P%>5T!+q
znUpy*+WE=Xa*9LGb>%B&4rW(vxz4X88}{l{UMzCtcQNxMZxUyAm6dMcO*n*T@O}U@
zLl|5=^Kd4@e+V-JhOYX&sOLK8F3=Osdo)(jQ_}9m+}6lO4_&VKg~q+EvMVm#<uu&S
z;O?Q<yfyT`cgGg6yLC6tk0!efBrLHePQ!0C^pKmrDBP)j*fp_IhxOxo=PLWk6NX-B
zz^HI0T=bf&yu|9!f3_P=WPjh~VcR{l!o4rFlH30=e95@oKwlQ#$a_u@>L{(OjkbpO
z3T@Bs>I~EfgZ;<)gc{+{(BSJwj|mnFK2dlW>K>yGwFalR3|(gmFly*Heww^*==iiX
p;l~UEgS0-U3C{(3#w}LM<vPGW#{QE}*AE)|_r@Ocndy?R>OaS#sRsZ6

diff --git a/X1_JTAG_boot/jtag_boot_rpi4.img b/X1_JTAG_boot/jtag_boot_rpi4.img
index 83c4176a7b375931bf248cd0bf1b840093ffbed2..195a9fa2897dec9ff58270824d17ee341181bd88 100755
GIT binary patch
delta 1014
zcmah{T}TvB6h3#xjamN~-JR9lRoC^Wb=OwKQZO-A#6Tm>H6nV@4WHB=DkzJ{9|A)R
zbU1+zy{t;;7zDBeE=dTz=wndQL&a!VYq=2FgNx~OXZ8v`1l^Z2=bZ0+_xtV{wSJ|3
z(r%7}=qlvjjl|`mGh})3>Mlujo8Yltn|>DQ;%tP3@D_h9Z^I{h8w+LiAyL#~kYjV8
zl)-Q?HVbvlc)-_lYvIW0lzzf(_#$(rMS&A~@JePY$%s77yvK24b+lVe@M5-4sFrnl
zUnh=cyX>7Hst+ii$E4`hvQL^JNGZox*-bT}5}D5kBtqa?2jc`19}cyg<Tt=3PZorf
zfTHrkLR`~wbcR4B+AN-|aIGx-)~0~K3%wfdz&49Bqa8#Zz$ySt3XOQ%ay;9+uZb~F
ziW1|&kkwa#&n+%<1(nqV^4>nKTh7%CYT^zR8IORxQwfI9@hwe^R}!V={@Rn&mC@kB
zqotc^l(v7m*5Ene$4gcZ@#CPis9_|R(#;Zi^EJprhuTztKutGQr7_J=l3W8<45FJK
z4t7vXAr!t<DZUFoTFWFdP}d7^>S)MIpWaN+A+?b@?3F50%QbCE_qpo98L7PB1~oND
zl$eDx#I(HEbIuUH8q@H*<R0>V)x=aPxRnZy%^gejN<sWK1c_~Zvz~OLHeUwfnvrKH
zu^xR>nMU26Mm>Gz<xQTKt^e>8wk18yNJ&p$4wxs3-#yg)hCzK1<~L^(K2sn%o-!Ql
zldLCwCWs2OW`>2Jc?+T|eD^x4wmnpHLRm`=I`Y?<z>eG<{NZp)etWWGXWeER3()V(
z!v?!k(u;Q)!p0C2*lTx@B^<N2yN`J3-(j4W>>k2$6%+O$yx<J<{tvm#CjD%(l-+uy
zdz<ymtpAhc9Ls+l-HgOBfY<X>yyFN-LVj{SouNb;O?W=P$y;Sfb^<KUGh`KuVHPiA
HG~e?F6(u0U

delta 1029
zcmah{Ur1A76hGg+TW#}C*ZtGGO}D8yH@6hcM8(*O{%BCP*+W8Vf9Q`!4?<-`Y$H%h
zAG~~#L=cL^xT6<Yfxg757lr7lqF!PxiWMqC5RII-@7{ev4?zbm=R4<j&hPu3@7!d2
zs(p&rt^sFvuy3PlLggOxWd76-q^nZHT{-7`oakfB2&M29_L42&6WmdUkQzf`stSZm
z48&T91T%Bc+JSRyJJUIvXj2U#Cg4lN)bko<={)W&?m{~fkBV<FjJA!SjR^PXJsP(l
z(|ZDVRBz`4z@=^xK9^dQv$Y>3MUdNzpXv9RW~v3Y$e$em`#T^eS0o$oZiB1D(IRjg
z(lj7=DraXx__D!TbPPBaz^DP3(mcoa3^jU@2QK4Mi5V7@YX^P!wZX3Sk!$yX02}zH
z;c#<U;#P==)dUDD^`Hou_$qO$^+@czx%@zv91X@N7lsQ6?U1uY;qiL$Rig`e@k3)}
z2eJ^lIV7ZCf-trzP5Tiv_Y+l;B$dkQB2D>c-rESAlZ^yVkQxU#-lRzVIh-@rnxfZQ
zF9Ph^YI2jO)kblf=?Dto+opP5lO#>cOyfTM!c<o=EOD6_5;F!y5!3lWju}Pxq3wVR
z%+9c=22Mu=cM-vv*fs?luLJIT7_#5w&AAGd+=ZRMEh}-6m^mYFqFBk#7Lu7hvqG9>
z1=~Mna@6E!N>}G+TFcRyNd50k>9{hWya?^516hySzc`_a1P4vVCXX5xH6*8ncu@NV
z7L#nhvRrw=0RHTHPAbix0n#jrYgB$Q#cJY+JSKi`{-u&Z{HpY9Nw<~o|79T@C|kkT
zd22}rpGV9T4PlYDqY=E!A9ZeZksn2|5M@C$p24k_FkY|?lr35EEQJ)|h*y&j`*>@m
zl3S-0JgwMId<8uNKFQngyyf8O|J~R_75HdpGgZGeU6kTlir=9zL*q$nqSxAoa6`G@
X%^C7t4(gZ6^Km!zN$N-N{c_hIeQ*@K


From d942e0f9535724ba9c323db60794074ec3915a82 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Tue, 20 Sep 2022 23:13:12 +0200
Subject: [PATCH 184/214] Fix bug in register_structs description

---
 13_exceptions_part2_peripheral_IRQs/README.md                   | 2 +-
 .../bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs           | 2 +-
 .../bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs           | 2 +-
 .../bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs           | 2 +-
 .../bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs           | 2 +-
 .../bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs           | 2 +-
 .../bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs           | 2 +-
 .../bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs           | 2 +-
 8 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index 74eb28c32..77bcc2f25 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -1549,7 +1549,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interru
 +        (0x00 => _reserved1),
 +        (0x10 => ENABLE_1: WriteOnly<u32>),
 +        (0x14 => ENABLE_2: WriteOnly<u32>),
-+        (0x24 => @END),
++        (0x18 => @END),
 +    }
 +}
 +
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index 3107d296f..0900635ef 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -26,7 +26,7 @@ register_structs! {
         (0x00 => _reserved1),
         (0x10 => ENABLE_1: WriteOnly<u32>),
         (0x14 => ENABLE_2: WriteOnly<u32>),
-        (0x24 => @END),
+        (0x18 => @END),
     }
 }
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index 145d89612..c9711049d 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -28,7 +28,7 @@ register_structs! {
         (0x00 => _reserved1),
         (0x10 => ENABLE_1: WriteOnly<u32>),
         (0x14 => ENABLE_2: WriteOnly<u32>),
-        (0x24 => @END),
+        (0x18 => @END),
     }
 }
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index 145d89612..c9711049d 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -28,7 +28,7 @@ register_structs! {
         (0x00 => _reserved1),
         (0x10 => ENABLE_1: WriteOnly<u32>),
         (0x14 => ENABLE_2: WriteOnly<u32>),
-        (0x24 => @END),
+        (0x18 => @END),
     }
 }
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index 145d89612..c9711049d 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -28,7 +28,7 @@ register_structs! {
         (0x00 => _reserved1),
         (0x10 => ENABLE_1: WriteOnly<u32>),
         (0x14 => ENABLE_2: WriteOnly<u32>),
-        (0x24 => @END),
+        (0x18 => @END),
     }
 }
 
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index 145d89612..c9711049d 100644
--- a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -28,7 +28,7 @@ register_structs! {
         (0x00 => _reserved1),
         (0x10 => ENABLE_1: WriteOnly<u32>),
         (0x14 => ENABLE_2: WriteOnly<u32>),
-        (0x24 => @END),
+        (0x18 => @END),
     }
 }
 
diff --git a/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index 145d89612..c9711049d 100644
--- a/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -28,7 +28,7 @@ register_structs! {
         (0x00 => _reserved1),
         (0x10 => ENABLE_1: WriteOnly<u32>),
         (0x14 => ENABLE_2: WriteOnly<u32>),
-        (0x24 => @END),
+        (0x18 => @END),
     }
 }
 
diff --git a/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index a2034e3ba..65a9e7a09 100644
--- a/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -29,7 +29,7 @@ register_structs! {
         (0x00 => _reserved1),
         (0x10 => ENABLE_1: WriteOnly<u32>),
         (0x14 => ENABLE_2: WriteOnly<u32>),
-        (0x24 => @END),
+        (0x18 => @END),
     }
 }
 

From c8c422e995017daf310d86f5b1bf2cf7ee5e54df Mon Sep 17 00:00:00 2001
From: James Zow <jameszow@163.com>
Date: Thu, 22 Sep 2022 15:37:26 +0800
Subject: [PATCH 185/214] Translation tutorial 3 (#167)

* Translation tutorial 3

* Update README.CN.md

* Update README.CN.md

* Update README.CN.md

* Update README.CN.md

* Translate Chapter 4 Safe Globals

* remove Chapter 4 Translation, modify the diff in Chapter 2 and Chapter 3

Co-authored-by: Fengqixian <570311238@qq.com>
---
 02_runtime_init/README.CN.md      |  2 +-
 03_hacky_hello_world/README.CN.md | 35 +++++++++++++++++++++++++++++++
 2 files changed, 36 insertions(+), 1 deletion(-)
 create mode 100644 03_hacky_hello_world/README.CN.md

diff --git a/02_runtime_init/README.CN.md b/02_runtime_init/README.CN.md
index 46c524672..f8d64f6f3 100644
--- a/02_runtime_init/README.CN.md
+++ b/02_runtime_init/README.CN.md
@@ -19,5 +19,5 @@
 [bss]: https://en.wikipedia.org/wiki/.bss
 
 ## 相比之前的变化（diff）
+请检查[英文版本](README.md#diff-to-previous)，这是最新的。
 
-Please check [the english version](README.md#diff-to-previous), which is kept up-to-date.
diff --git a/03_hacky_hello_world/README.CN.md b/03_hacky_hello_world/README.CN.md
new file mode 100644
index 000000000..ac08fae53
--- /dev/null
+++ b/03_hacky_hello_world/README.CN.md
@@ -0,0 +1,35 @@
+# 教程 03 - Hacky Hello World
+
+## tl;dr
+
+- 介绍全局的`println!()`宏以便尽早启用"printf debugging"。
+- 为了保持教程长度合理，打印函数目前 "滥用" 了 QEMU 属性，该属性允许我们在没有正确设置的情况下使用树莓派的`UART`。
+- 在接下来的教程中将逐步使用真实硬件的`UART`。
+
+## 值得注意的补充
+
+- `src/console.rs`为控制台命令和通过`console::console()`对内核控制台的全局访问引入了接口`Traits`。
+- `src/bsp/raspberrypi/console.rs` 实现QEMU仿真UART的接口。
+- 紧急处理程序使用新的`println!()`以显示用户错误消息。
+- 有一个新的Makefile目录`make test`，用于自动测试。它在`QEMU`中引导编译后的内核，并检查内核生成的预期输出字符串。
+  - 在本教程中，它检查字符串`Stopping here`，该字符串由`panic!()`在`main.rs`的末尾。
+
+## 测试一下
+
+QEMU不再以汇编模式运行。从现在起，它将显示`console`的输出。
+
+```console
+$ make qemu
+[...]
+
+Hello from Rust!
+Kernel panic!
+
+Panic location:
+      File 'src/main.rs', line 126, column 5
+
+Stopping here.
+```
+
+## 相比之前的变化（diff）
+请检查[英文版本](README.md#diff-to-previous)，这是最新的。

From b7b2d31c2457ec4ee153e3345a954f7582c40533 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Fri, 23 Sep 2022 22:38:10 +0200
Subject: [PATCH 186/214] Rewrite timer subsystem

---
 07_timestamps/README.md                       | 290 +++++++++++-------
 07_timestamps/src/_arch/aarch64/cpu/boot.s    |   8 +
 07_timestamps/src/_arch/aarch64/time.rs       | 187 ++++++-----
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |   2 +-
 07_timestamps/src/main.rs                     |   4 +-
 07_timestamps/src/panic_wait.rs               |   2 -
 07_timestamps/src/print.rs                    |   8 -
 07_timestamps/src/time.rs                     |  52 +++-
 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s |   8 +
 08_hw_debug_JTAG/src/_arch/aarch64/time.rs    | 187 ++++++-----
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |   2 +-
 08_hw_debug_JTAG/src/main.rs                  |   4 +-
 08_hw_debug_JTAG/src/panic_wait.rs            |   2 -
 08_hw_debug_JTAG/src/print.rs                 |   8 -
 08_hw_debug_JTAG/src/time.rs                  |  52 +++-
 09_privilege_level/README.md                  |  16 +-
 .../src/_arch/aarch64/cpu/boot.s              |   8 +
 09_privilege_level/src/_arch/aarch64/time.rs  | 187 ++++++-----
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |   2 +-
 09_privilege_level/src/main.rs                |   4 +-
 09_privilege_level/src/panic_wait.rs          |   2 -
 09_privilege_level/src/print.rs               |   8 -
 09_privilege_level/src/time.rs                |  52 +++-
 .../README.md                                 |  16 +-
 .../src/_arch/aarch64/cpu/boot.s              |   8 +
 .../src/_arch/aarch64/time.rs                 | 187 ++++++-----
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |   2 +-
 .../src/main.rs                               |   4 +-
 .../src/panic_wait.rs                         |   2 -
 .../src/print.rs                              |   8 -
 .../src/time.rs                               |  52 +++-
 11_exceptions_part1_groundwork/README.md      |   8 +-
 .../src/_arch/aarch64/cpu/boot.s              |   8 +
 .../src/_arch/aarch64/time.rs                 | 187 ++++++-----
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |   2 +-
 11_exceptions_part1_groundwork/src/main.rs    |   4 +-
 .../src/panic_wait.rs                         |   2 -
 11_exceptions_part1_groundwork/src/print.rs   |   8 -
 11_exceptions_part1_groundwork/src/time.rs    |  52 +++-
 12_integrated_testing/README.md               |   3 +-
 .../kernel/src/_arch/aarch64/cpu/boot.s       |   8 +
 .../kernel/src/_arch/aarch64/time.rs          | 187 ++++++-----
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |   2 +-
 12_integrated_testing/kernel/src/lib.rs       |   3 +
 .../kernel/src/panic_wait.rs                  |   2 -
 12_integrated_testing/kernel/src/print.rs     |   8 -
 12_integrated_testing/kernel/src/time.rs      |  52 +++-
 .../kernel/tests/01_timer_sanity.rs           |   3 +-
 13_exceptions_part2_peripheral_IRQs/README.md |   8 +-
 .../kernel/src/_arch/aarch64/cpu/boot.s       |   8 +
 .../kernel/src/_arch/aarch64/time.rs          | 187 ++++++-----
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |   2 +-
 .../kernel/src/lib.rs                         |   3 +
 .../kernel/src/panic_wait.rs                  |   2 -
 .../kernel/src/print.rs                       |   8 -
 .../kernel/src/time.rs                        |  52 +++-
 .../kernel/tests/01_timer_sanity.rs           |   3 +-
 14_virtual_mem_part2_mmio_remap/README.md     |  13 +-
 .../kernel/src/_arch/aarch64/cpu/boot.s       |   8 +
 .../kernel/src/_arch/aarch64/time.rs          | 187 ++++++-----
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |   2 +-
 .../kernel/src/lib.rs                         |   3 +
 .../kernel/src/panic_wait.rs                  |   2 -
 .../kernel/src/print.rs                       |   8 -
 .../kernel/src/time.rs                        |  52 +++-
 .../kernel/tests/01_timer_sanity.rs           |   3 +-
 .../README.md                                 |  16 +-
 .../kernel/src/_arch/aarch64/cpu/boot.s       |   8 +
 .../kernel/src/_arch/aarch64/time.rs          | 187 ++++++-----
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |   2 +-
 .../kernel/src/lib.rs                         |   3 +
 .../kernel/src/panic_wait.rs                  |   2 -
 .../kernel/src/print.rs                       |   8 -
 .../kernel/src/time.rs                        |  52 +++-
 .../kernel/tests/01_timer_sanity.rs           |   3 +-
 .../README.md                                 |  16 +-
 .../kernel/src/_arch/aarch64/cpu/boot.s       |   8 +
 .../kernel/src/_arch/aarch64/time.rs          | 187 ++++++-----
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |   2 +-
 .../kernel/src/lib.rs                         |   3 +
 .../kernel/src/panic_wait.rs                  |   2 -
 .../kernel/src/print.rs                       |   8 -
 .../kernel/src/time.rs                        |  52 +++-
 .../kernel/tests/01_timer_sanity.rs           |   3 +-
 17_kernel_symbols/README.md                   |   2 +-
 .../kernel/src/_arch/aarch64/cpu/boot.s       |   8 +
 .../kernel/src/_arch/aarch64/time.rs          | 187 ++++++-----
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |   2 +-
 17_kernel_symbols/kernel/src/lib.rs           |   3 +
 17_kernel_symbols/kernel/src/panic_wait.rs    |   2 -
 17_kernel_symbols/kernel/src/print.rs         |   8 -
 17_kernel_symbols/kernel/src/time.rs          |  52 +++-
 .../kernel/tests/01_timer_sanity.rs           |   3 +-
 18_backtrace/README.md                        |   6 +-
 .../kernel/src/_arch/aarch64/cpu/boot.s       |   8 +
 18_backtrace/kernel/src/_arch/aarch64/time.rs | 187 ++++++-----
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |   2 +-
 18_backtrace/kernel/src/lib.rs                |   3 +
 18_backtrace/kernel/src/panic_wait.rs         |   2 -
 18_backtrace/kernel/src/print.rs              |   8 -
 18_backtrace/kernel/src/time.rs               |  52 +++-
 18_backtrace/kernel/tests/01_timer_sanity.rs  |   3 +-
 19_kernel_heap/README.md                      |  25 +-
 .../kernel/src/_arch/aarch64/cpu/boot.s       |   8 +
 .../kernel/src/_arch/aarch64/time.rs          | 187 ++++++-----
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |   2 +-
 .../kernel/src/bsp/raspberrypi/driver.rs      |   1 +
 19_kernel_heap/kernel/src/lib.rs              |   3 +
 19_kernel_heap/kernel/src/panic_wait.rs       |   2 -
 19_kernel_heap/kernel/src/print.rs            |  12 -
 19_kernel_heap/kernel/src/time.rs             |  52 +++-
 .../kernel/tests/01_timer_sanity.rs           |   3 +-
 X1_JTAG_boot/jtag_boot_rpi3.img               | Bin 8712 -> 8656 bytes
 X1_JTAG_boot/jtag_boot_rpi4.img               | Bin 7616 -> 7752 bytes
 X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s     |   8 +
 X1_JTAG_boot/src/_arch/aarch64/time.rs        | 189 +++++++-----
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |   2 +-
 X1_JTAG_boot/src/main.rs                      |   3 +
 X1_JTAG_boot/src/panic_wait.rs                |   2 -
 X1_JTAG_boot/src/print.rs                     |   8 -
 X1_JTAG_boot/src/time.rs                      |  48 ++-
 121 files changed, 2538 insertions(+), 1581 deletions(-)

diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index 1126d9b74..a78e508b9 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -182,7 +182,7 @@ diff -uNr 06_uart_chainloader/src/_arch/aarch64/cpu/boot.s 07_timestamps/src/_ar
  //--------------------------------------------------------------------------------------------------
  // Public Code
  //--------------------------------------------------------------------------------------------------
-@@ -48,35 +37,23 @@
+@@ -48,35 +37,31 @@
  	// If execution reaches here, it is the boot core.
 
  	// Initialize DRAM.
@@ -220,6 +220,14 @@ diff -uNr 06_uart_chainloader/src/_arch/aarch64/cpu/boot.s 07_timestamps/src/_ar
 -	// Jump to the relocated Rust code.
 -	ADR_ABS	x1, _start_rust
 -	br	x1
++	// Read the CPU's timer counter frequency and store it in ARCH_TIMER_COUNTER_FREQUENCY.
++	// Abort if the frequency read back as 0.
++	ADR_REL	x1, ARCH_TIMER_COUNTER_FREQUENCY // provided by aarch64/time.rs
++	mrs	x2, CNTFRQ_EL0
++	cmp	x2, xzr
++	b.eq	.L_parking_loop
++	str	w2, [x1]
++
 +	// Jump to Rust code.
 +	b	_start_rust
 
@@ -249,7 +257,7 @@ diff -uNr 06_uart_chainloader/src/_arch/aarch64/cpu.rs 07_timestamps/src/_arch/a
 diff -uNr 06_uart_chainloader/src/_arch/aarch64/time.rs 07_timestamps/src/_arch/aarch64/time.rs
 --- 06_uart_chainloader/src/_arch/aarch64/time.rs
 +++ 07_timestamps/src/_arch/aarch64/time.rs
-@@ -0,0 +1,121 @@
+@@ -0,0 +1,162 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
@@ -263,114 +271,155 @@ diff -uNr 06_uart_chainloader/src/_arch/aarch64/time.rs 07_timestamps/src/_arch/
 +//!
 +//! crate::time::arch_time
 +
-+use crate::{time, warn};
-+use core::time::Duration;
++use crate::warn;
++use core::{
++    num::{NonZeroU128, NonZeroU32, NonZeroU64},
++    ops::{Add, Div},
++    time::Duration,
++};
 +use cortex_a::{asm::barrier, registers::*};
-+use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
++use tock_registers::interfaces::Readable;
 +
 +//--------------------------------------------------------------------------------------------------
 +// Private Definitions
 +//--------------------------------------------------------------------------------------------------
 +
-+const NS_PER_S: u64 = 1_000_000_000;
++const NANOSEC_PER_SEC: NonZeroU64 = NonZeroU64::new(1_000_000_000).unwrap();
 +
-+/// ARMv8 Generic Timer.
-+struct GenericTimer;
++#[derive(Copy, Clone, PartialOrd, PartialEq)]
++struct GenericTimerCounterValue(u64);
 +
 +//--------------------------------------------------------------------------------------------------
 +// Global instances
 +//--------------------------------------------------------------------------------------------------
 +
-+static TIME_MANAGER: GenericTimer = GenericTimer;
++/// Boot assembly code overwrites this value with the value of CNTFRQ_EL0 before any Rust code is
++/// executed. This given value here is just a (safe) dummy.
++#[no_mangle]
++static ARCH_TIMER_COUNTER_FREQUENCY: NonZeroU32 = NonZeroU32::MIN;
 +
 +//--------------------------------------------------------------------------------------------------
 +// Private Code
 +//--------------------------------------------------------------------------------------------------
 +
-+impl GenericTimer {
-+    #[inline(always)]
-+    fn read_cntpct(&self) -> u64 {
-+        // Prevent that the counter is read ahead of time due to out-of-order execution.
-+        unsafe { barrier::isb(barrier::SY) };
-+        CNTPCT_EL0.get()
-+    }
++impl GenericTimerCounterValue {
++    pub const MAX: Self = GenericTimerCounterValue(u64::MAX);
 +}
 +
-+//--------------------------------------------------------------------------------------------------
-+// Public Code
-+//--------------------------------------------------------------------------------------------------
++impl Add for GenericTimerCounterValue {
++    type Output = Self;
 +
-+/// Return a reference to the time manager.
-+pub fn time_manager() -> &'static impl time::interface::TimeManager {
-+    &TIME_MANAGER
++    fn add(self, other: Self) -> Self {
++        GenericTimerCounterValue(self.0.wrapping_add(other.0))
++    }
 +}
 +
-+//------------------------------------------------------------------------------
-+// OS Interface Code
-+//------------------------------------------------------------------------------
++impl From<GenericTimerCounterValue> for Duration {
++    fn from(counter_value: GenericTimerCounterValue) -> Self {
++        if counter_value.0 == 0 {
++            return Duration::ZERO;
++        }
 +
-+impl time::interface::TimeManager for GenericTimer {
-+    fn resolution(&self) -> Duration {
-+        Duration::from_nanos(NS_PER_S / (CNTFRQ_EL0.get() as u64))
++        // Read volatile is needed here to prevent the compiler from optimizing
++        // ARCH_TIMER_COUNTER_FREQUENCY away.
++        //
++        // This is safe, because all the safety requirements as stated in read_volatile()'s
++        // documentation are fulfilled.
++        let frequency: NonZeroU64 =
++            unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }.into();
++
++        // Div<NonZeroU64> implementation for u64 cannot panic.
++        let secs = counter_value.0.div(frequency);
++
++        // This is safe, because frequency can never be greater than u32::MAX, which means the
++        // largest theoretical value for sub_second_counter_value is (u32::MAX - 1). Therefore,
++        // (sub_second_counter_value * NANOSEC_PER_SEC) cannot overflow an u64.
++        //
++        // The subsequent division ensures the result fits into u32, since the max result is smaller
++        // than NANOSEC_PER_SEC. Therefore, just cast it to u32 using `as`.
++        let sub_second_counter_value = counter_value.0 modulo frequency;
++        let nanos = unsafe { sub_second_counter_value.unchecked_mul(u64::from(NANOSEC_PER_SEC)) }
++            .div(frequency) as u32;
++
++        Duration::new(secs, nanos)
 +    }
++}
 +
-+    fn uptime(&self) -> Duration {
-+        let current_count: u64 = self.read_cntpct() * NS_PER_S;
-+        let frq: u64 = CNTFRQ_EL0.get() as u64;
++fn max_duration() -> Duration {
++    Duration::from(GenericTimerCounterValue::MAX)
++}
 +
-+        Duration::from_nanos(current_count / frq)
-+    }
++impl TryFrom<Duration> for GenericTimerCounterValue {
++    type Error = &'static str;
 +
-+    fn spin_for(&self, duration: Duration) {
-+        // Instantly return on zero.
-+        if duration.as_nanos() == 0 {
-+            return;
++    fn try_from(duration: Duration) -> Result<Self, Self::Error> {
++        if duration < resolution() {
++            return Ok(GenericTimerCounterValue(0));
 +        }
 +
-+        // Calculate the register compare value.
-+        let frq = CNTFRQ_EL0.get();
-+        let x = match frq.checked_mul(duration.as_nanos() as u64) {
-+            #[allow(unused_imports)]
-+            None => {
-+                warn!("Spin duration too long, skipping");
-+                return;
-+            }
-+            Some(val) => val,
-+        };
-+        let tval = x / NS_PER_S;
-+
-+        // Check if it is within supported bounds.
-+        let warn: Option<&str> = if tval == 0 {
-+            Some("smaller")
-+        // The upper 32 bits of CNTP_TVAL_EL0 are reserved.
-+        } else if tval > u32::max_value().into() {
-+            Some("bigger")
-+        } else {
-+            None
-+        };
-+
-+        #[allow(unused_imports)]
-+        if let Some(w) = warn {
-+            warn!(
-+                "Spin duration {} than architecturally supported, skipping",
-+                w
-+            );
-+            return;
++        if duration > max_duration() {
++            return Err("Conversion error. Duration too big");
 +        }
 +
-+        // Set the compare value register.
-+        CNTP_TVAL_EL0.set(tval);
++        // This is safe, because all the safety requirements as stated in read_volatile()'s
++        // documentation are fulfilled.
++        let frequency: u128 =
++            unsafe { u32::from(core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY)) as u128 };
++        let duration: u128 = duration.as_nanos();
 +
-+        // Kick off the counting.                       // Disable timer interrupt.
-+        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::SET + CNTP_CTL_EL0::IMASK::SET);
++        // This is safe, because frequency can never be greater than u32::MAX, and
++        // (Duration::MAX.as_nanos() * u32::MAX) < u128::MAX.
++        let counter_value =
++            unsafe { duration.unchecked_mul(frequency) }.div(NonZeroU128::from(NANOSEC_PER_SEC));
 +
-+        // ISTATUS will be '1' when cval ticks have passed. Busy-check it.
-+        while !CNTP_CTL_EL0.matches_all(CNTP_CTL_EL0::ISTATUS::SET) {}
-+
-+        // Disable counting again.
-+        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::CLEAR);
++        // Since we checked above that we are <= max_duration(), just cast to u64.
++        Ok(GenericTimerCounterValue(counter_value as u64))
 +    }
 +}
++
++#[inline(always)]
++fn read_cntpct() -> GenericTimerCounterValue {
++    // Prevent that the counter is read ahead of time due to out-of-order execution.
++    unsafe { barrier::isb(barrier::SY) };
++    let cnt = CNTPCT_EL0.get();
++
++    GenericTimerCounterValue(cnt)
++}
++
++//--------------------------------------------------------------------------------------------------
++// Public Code
++//--------------------------------------------------------------------------------------------------
++
++/// The timer's resolution.
++pub fn resolution() -> Duration {
++    Duration::from(GenericTimerCounterValue(1))
++}
++
++/// The uptime since power-on of the device.
++///
++/// This includes time consumed by firmware and bootloaders.
++pub fn uptime() -> Duration {
++    read_cntpct().into()
++}
++
++/// Spin for a given duration.
++pub fn spin_for(duration: Duration) {
++    let curr_counter_value = read_cntpct();
++
++    let counter_value_delta: GenericTimerCounterValue = match duration.try_into() {
++        Err(msg) => {
++            warn!("spin_for: {}. Skipping", msg);
++            return;
++        }
++        Ok(val) => val,
++    };
++    let counter_value_target = curr_counter_value + counter_value_delta;
++
++    // Busy wait.
++    //
++    // Read CNTPCT_EL0 directly to avoid the ISB that is part of [`read_cntpct`].
++    while GenericTimerCounterValue(CNTPCT_EL0.get()) < counter_value_target {}
++}
 
 diff -uNr 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 --- 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -380,7 +429,7 @@ diff -uNr 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 07_times
      #[cfg(feature = "bsp_rpi3")]
      fn disable_pud_14_15_bcm2837(&mut self) {
 -        use crate::cpu;
-+        use crate::{time, time::interface::TimeManager};
++        use crate::time;
 +        use core::time::Duration;
 
 -        // Make an educated guess for a good delay value (Sequence described in the BCM2837
@@ -534,7 +583,20 @@ diff -uNr 06_uart_chainloader/src/cpu.rs 07_timestamps/src/cpu.rs
 diff -uNr 06_uart_chainloader/src/main.rs 07_timestamps/src/main.rs
 --- 06_uart_chainloader/src/main.rs
 +++ 07_timestamps/src/main.rs
-@@ -121,6 +121,7 @@
+@@ -108,9 +108,12 @@
+
+ #![allow(clippy::upper_case_acronyms)]
+ #![feature(asm_const)]
++#![feature(const_option)]
+ #![feature(format_args_nl)]
++#![feature(nonzero_min_max)]
+ #![feature(panic_info_message)]
+ #![feature(trait_alias)]
++#![feature(unchecked_math)]
+ #![no_main]
+ #![no_std]
+
+@@ -121,6 +124,7 @@
  mod panic_wait;
  mod print;
  mod synchronization;
@@ -542,7 +604,7 @@ diff -uNr 06_uart_chainloader/src/main.rs 07_timestamps/src/main.rs
 
  /// Early init code.
  ///
-@@ -143,55 +144,38 @@
+@@ -143,55 +147,37 @@
      kernel_main()
  }
 
@@ -558,7 +620,6 @@ diff -uNr 06_uart_chainloader/src/main.rs 07_timestamps/src/main.rs
 -    use console::console;
 +    use core::time::Duration;
 +    use driver::interface::DriverManager;
-+    use time::interface::TimeManager;
 
 -    println!("{}", MINILOAD_LOGO);
 -    println!("{:^37}", bsp::board_name());
@@ -630,12 +691,7 @@ diff -uNr 06_uart_chainloader/src/main.rs 07_timestamps/src/main.rs
 diff -uNr 06_uart_chainloader/src/panic_wait.rs 07_timestamps/src/panic_wait.rs
 --- 06_uart_chainloader/src/panic_wait.rs
 +++ 07_timestamps/src/panic_wait.rs
-@@ -42,18 +42,23 @@
-
- #[panic_handler]
- fn panic(info: &PanicInfo) -> ! {
-+    use crate::time::interface::TimeManager;
-+
+@@ -45,15 +45,18 @@
      // Protect against panic infinite loops if any of the following code panics itself.
      panic_prevent_reenter();
 
@@ -659,7 +715,7 @@ diff -uNr 06_uart_chainloader/src/panic_wait.rs 07_timestamps/src/panic_wait.rs
 diff -uNr 06_uart_chainloader/src/print.rs 07_timestamps/src/print.rs
 --- 06_uart_chainloader/src/print.rs
 +++ 07_timestamps/src/print.rs
-@@ -34,3 +34,59 @@
+@@ -34,3 +34,51 @@
          $crate::print::_print(format_args_nl!($($arg)*));
      })
  }
@@ -668,8 +724,6 @@ diff -uNr 06_uart_chainloader/src/print.rs 07_timestamps/src/print.rs
 +#[macro_export]
 +macro_rules! info {
 +    ($string:expr) => ({
-+        use $crate::time::interface::TimeManager;
-+
 +        let timestamp = $crate::time::time_manager().uptime();
 +
 +        $crate::print::_print(format_args_nl!(
@@ -679,8 +733,6 @@ diff -uNr 06_uart_chainloader/src/print.rs 07_timestamps/src/print.rs
 +        ));
 +    });
 +    ($format_string:expr, $($arg:tt)*) => ({
-+        use $crate::time::interface::TimeManager;
-+
 +        let timestamp = $crate::time::time_manager().uptime();
 +
 +        $crate::print::_print(format_args_nl!(
@@ -696,8 +748,6 @@ diff -uNr 06_uart_chainloader/src/print.rs 07_timestamps/src/print.rs
 +#[macro_export]
 +macro_rules! warn {
 +    ($string:expr) => ({
-+        use $crate::time::interface::TimeManager;
-+
 +        let timestamp = $crate::time::time_manager().uptime();
 +
 +        $crate::print::_print(format_args_nl!(
@@ -707,8 +757,6 @@ diff -uNr 06_uart_chainloader/src/print.rs 07_timestamps/src/print.rs
 +        ));
 +    });
 +    ($format_string:expr, $($arg:tt)*) => ({
-+        use $crate::time::interface::TimeManager;
-+
 +        let timestamp = $crate::time::time_manager().uptime();
 +
 +        $crate::print::_print(format_args_nl!(
@@ -723,7 +771,7 @@ diff -uNr 06_uart_chainloader/src/print.rs 07_timestamps/src/print.rs
 diff -uNr 06_uart_chainloader/src/time.rs 07_timestamps/src/time.rs
 --- 06_uart_chainloader/src/time.rs
 +++ 07_timestamps/src/time.rs
-@@ -0,0 +1,37 @@
+@@ -0,0 +1,57 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
@@ -734,31 +782,51 @@ diff -uNr 06_uart_chainloader/src/time.rs 07_timestamps/src/time.rs
 +#[path = "_arch/aarch64/time.rs"]
 +mod arch_time;
 +
++use core::time::Duration;
++
 +//--------------------------------------------------------------------------------------------------
-+// Architectural Public Reexports
++// Public Definitions
 +//--------------------------------------------------------------------------------------------------
-+pub use arch_time::time_manager;
++
++/// Provides time management functions.
++pub struct TimeManager;
 +
 +//--------------------------------------------------------------------------------------------------
-+// Public Definitions
++// Global instances
 +//--------------------------------------------------------------------------------------------------
 +
-+/// Timekeeping interfaces.
-+pub mod interface {
-+    use core::time::Duration;
++static TIME_MANAGER: TimeManager = TimeManager::new();
 +
-+    /// Time management functions.
-+    pub trait TimeManager {
-+        /// The timer's resolution.
-+        fn resolution(&self) -> Duration;
++//--------------------------------------------------------------------------------------------------
++// Public Code
++//--------------------------------------------------------------------------------------------------
 +
-+        /// The uptime since power-on of the device.
-+        ///
-+        /// This includes time consumed by firmware and bootloaders.
-+        fn uptime(&self) -> Duration;
++/// Return a reference to the global TimeManager.
++pub fn time_manager() -> &'static TimeManager {
++    &TIME_MANAGER
++}
++
++impl TimeManager {
++    /// Create an instance.
++    pub const fn new() -> Self {
++        Self
++    }
++
++    /// The timer's resolution.
++    pub fn resolution(&self) -> Duration {
++        arch_time::resolution()
++    }
++
++    /// The uptime since power-on of the device.
++    ///
++    /// This includes time consumed by firmware and bootloaders.
++    pub fn uptime(&self) -> Duration {
++        arch_time::uptime()
++    }
 +
-+        /// Spin for a given duration.
-+        fn spin_for(&self, duration: Duration);
++    /// Spin for a given duration.
++    pub fn spin_for(&self, duration: Duration) {
++        arch_time::spin_for(duration)
 +    }
 +}
 
diff --git a/07_timestamps/src/_arch/aarch64/cpu/boot.s b/07_timestamps/src/_arch/aarch64/cpu/boot.s
index 1f70169f9..aa701fd1b 100644
--- a/07_timestamps/src/_arch/aarch64/cpu/boot.s
+++ b/07_timestamps/src/_arch/aarch64/cpu/boot.s
@@ -52,6 +52,14 @@ _start:
 	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
 
+	// Read the CPU's timer counter frequency and store it in ARCH_TIMER_COUNTER_FREQUENCY.
+	// Abort if the frequency read back as 0.
+	ADR_REL	x1, ARCH_TIMER_COUNTER_FREQUENCY // provided by aarch64/time.rs
+	mrs	x2, CNTFRQ_EL0
+	cmp	x2, xzr
+	b.eq	.L_parking_loop
+	str	w2, [x1]
+
 	// Jump to Rust code.
 	b	_start_rust
 
diff --git a/07_timestamps/src/_arch/aarch64/time.rs b/07_timestamps/src/_arch/aarch64/time.rs
index c814219ca..255a5a45d 100644
--- a/07_timestamps/src/_arch/aarch64/time.rs
+++ b/07_timestamps/src/_arch/aarch64/time.rs
@@ -11,111 +11,152 @@
 //!
 //! crate::time::arch_time
 
-use crate::{time, warn};
-use core::time::Duration;
+use crate::warn;
+use core::{
+    num::{NonZeroU128, NonZeroU32, NonZeroU64},
+    ops::{Add, Div},
+    time::Duration,
+};
 use cortex_a::{asm::barrier, registers::*};
-use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
+use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
-const NS_PER_S: u64 = 1_000_000_000;
+const NANOSEC_PER_SEC: NonZeroU64 = NonZeroU64::new(1_000_000_000).unwrap();
 
-/// ARMv8 Generic Timer.
-struct GenericTimer;
+#[derive(Copy, Clone, PartialOrd, PartialEq)]
+struct GenericTimerCounterValue(u64);
 
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
-static TIME_MANAGER: GenericTimer = GenericTimer;
+/// Boot assembly code overwrites this value with the value of CNTFRQ_EL0 before any Rust code is
+/// executed. This given value here is just a (safe) dummy.
+#[no_mangle]
+static ARCH_TIMER_COUNTER_FREQUENCY: NonZeroU32 = NonZeroU32::MIN;
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-impl GenericTimer {
-    #[inline(always)]
-    fn read_cntpct(&self) -> u64 {
-        // Prevent that the counter is read ahead of time due to out-of-order execution.
-        unsafe { barrier::isb(barrier::SY) };
-        CNTPCT_EL0.get()
-    }
+impl GenericTimerCounterValue {
+    pub const MAX: Self = GenericTimerCounterValue(u64::MAX);
 }
 
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
+impl Add for GenericTimerCounterValue {
+    type Output = Self;
 
-/// Return a reference to the time manager.
-pub fn time_manager() -> &'static impl time::interface::TimeManager {
-    &TIME_MANAGER
+    fn add(self, other: Self) -> Self {
+        GenericTimerCounterValue(self.0.wrapping_add(other.0))
+    }
 }
 
-//------------------------------------------------------------------------------
-// OS Interface Code
-//------------------------------------------------------------------------------
+impl From<GenericTimerCounterValue> for Duration {
+    fn from(counter_value: GenericTimerCounterValue) -> Self {
+        if counter_value.0 == 0 {
+            return Duration::ZERO;
+        }
 
-impl time::interface::TimeManager for GenericTimer {
-    fn resolution(&self) -> Duration {
-        Duration::from_nanos(NS_PER_S / (CNTFRQ_EL0.get() as u64))
+        // Read volatile is needed here to prevent the compiler from optimizing
+        // ARCH_TIMER_COUNTER_FREQUENCY away.
+        //
+        // This is safe, because all the safety requirements as stated in read_volatile()'s
+        // documentation are fulfilled.
+        let frequency: NonZeroU64 =
+            unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }.into();
+
+        // Div<NonZeroU64> implementation for u64 cannot panic.
+        let secs = counter_value.0.div(frequency);
+
+        // This is safe, because frequency can never be greater than u32::MAX, which means the
+        // largest theoretical value for sub_second_counter_value is (u32::MAX - 1). Therefore,
+        // (sub_second_counter_value * NANOSEC_PER_SEC) cannot overflow an u64.
+        //
+        // The subsequent division ensures the result fits into u32, since the max result is smaller
+        // than NANOSEC_PER_SEC. Therefore, just cast it to u32 using `as`.
+        let sub_second_counter_value = counter_value.0 % frequency;
+        let nanos = unsafe { sub_second_counter_value.unchecked_mul(u64::from(NANOSEC_PER_SEC)) }
+            .div(frequency) as u32;
+
+        Duration::new(secs, nanos)
     }
+}
 
-    fn uptime(&self) -> Duration {
-        let current_count: u64 = self.read_cntpct() * NS_PER_S;
-        let frq: u64 = CNTFRQ_EL0.get() as u64;
+fn max_duration() -> Duration {
+    Duration::from(GenericTimerCounterValue::MAX)
+}
 
-        Duration::from_nanos(current_count / frq)
-    }
+impl TryFrom<Duration> for GenericTimerCounterValue {
+    type Error = &'static str;
 
-    fn spin_for(&self, duration: Duration) {
-        // Instantly return on zero.
-        if duration.as_nanos() == 0 {
-            return;
+    fn try_from(duration: Duration) -> Result<Self, Self::Error> {
+        if duration < resolution() {
+            return Ok(GenericTimerCounterValue(0));
         }
 
-        // Calculate the register compare value.
-        let frq = CNTFRQ_EL0.get();
-        let x = match frq.checked_mul(duration.as_nanos() as u64) {
-            #[allow(unused_imports)]
-            None => {
-                warn!("Spin duration too long, skipping");
-                return;
-            }
-            Some(val) => val,
-        };
-        let tval = x / NS_PER_S;
-
-        // Check if it is within supported bounds.
-        let warn: Option<&str> = if tval == 0 {
-            Some("smaller")
-        // The upper 32 bits of CNTP_TVAL_EL0 are reserved.
-        } else if tval > u32::max_value().into() {
-            Some("bigger")
-        } else {
-            None
-        };
-
-        #[allow(unused_imports)]
-        if let Some(w) = warn {
-            warn!(
-                "Spin duration {} than architecturally supported, skipping",
-                w
-            );
-            return;
+        if duration > max_duration() {
+            return Err("Conversion error. Duration too big");
         }
 
-        // Set the compare value register.
-        CNTP_TVAL_EL0.set(tval);
+        // This is safe, because all the safety requirements as stated in read_volatile()'s
+        // documentation are fulfilled.
+        let frequency: u128 =
+            unsafe { u32::from(core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY)) as u128 };
+        let duration: u128 = duration.as_nanos();
 
-        // Kick off the counting.                       // Disable timer interrupt.
-        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::SET + CNTP_CTL_EL0::IMASK::SET);
+        // This is safe, because frequency can never be greater than u32::MAX, and
+        // (Duration::MAX.as_nanos() * u32::MAX) < u128::MAX.
+        let counter_value =
+            unsafe { duration.unchecked_mul(frequency) }.div(NonZeroU128::from(NANOSEC_PER_SEC));
 
-        // ISTATUS will be '1' when cval ticks have passed. Busy-check it.
-        while !CNTP_CTL_EL0.matches_all(CNTP_CTL_EL0::ISTATUS::SET) {}
-
-        // Disable counting again.
-        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::CLEAR);
+        // Since we checked above that we are <= max_duration(), just cast to u64.
+        Ok(GenericTimerCounterValue(counter_value as u64))
     }
 }
+
+#[inline(always)]
+fn read_cntpct() -> GenericTimerCounterValue {
+    // Prevent that the counter is read ahead of time due to out-of-order execution.
+    unsafe { barrier::isb(barrier::SY) };
+    let cnt = CNTPCT_EL0.get();
+
+    GenericTimerCounterValue(cnt)
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The timer's resolution.
+pub fn resolution() -> Duration {
+    Duration::from(GenericTimerCounterValue(1))
+}
+
+/// The uptime since power-on of the device.
+///
+/// This includes time consumed by firmware and bootloaders.
+pub fn uptime() -> Duration {
+    read_cntpct().into()
+}
+
+/// Spin for a given duration.
+pub fn spin_for(duration: Duration) {
+    let curr_counter_value = read_cntpct();
+
+    let counter_value_delta: GenericTimerCounterValue = match duration.try_into() {
+        Err(msg) => {
+            warn!("spin_for: {}. Skipping", msg);
+            return;
+        }
+        Ok(val) => val,
+    };
+    let counter_value_target = curr_counter_value + counter_value_delta;
+
+    // Busy wait.
+    //
+    // Read CNTPCT_EL0 directly to avoid the ISB that is part of [`read_cntpct`].
+    while GenericTimerCounterValue(CNTPCT_EL0.get()) < counter_value_target {}
+}
diff --git a/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 24958eb56..24e537cff 100644
--- a/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -140,7 +140,7 @@ impl GPIOInner {
     /// Disable pull-up/down on pins 14 and 15.
     #[cfg(feature = "bsp_rpi3")]
     fn disable_pud_14_15_bcm2837(&mut self) {
-        use crate::{time, time::interface::TimeManager};
+        use crate::time;
         use core::time::Duration;
 
         // The Linux 2837 GPIO driver waits 1 µs between the steps.
diff --git a/07_timestamps/src/main.rs b/07_timestamps/src/main.rs
index 9ecf3f97a..90c39a37c 100644
--- a/07_timestamps/src/main.rs
+++ b/07_timestamps/src/main.rs
@@ -108,9 +108,12 @@
 
 #![allow(clippy::upper_case_acronyms)]
 #![feature(asm_const)]
+#![feature(const_option)]
 #![feature(format_args_nl)]
+#![feature(nonzero_min_max)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
+#![feature(unchecked_math)]
 #![no_main]
 #![no_std]
 
@@ -148,7 +151,6 @@ unsafe fn kernel_init() -> ! {
 fn kernel_main() -> ! {
     use core::time::Duration;
     use driver::interface::DriverManager;
-    use time::interface::TimeManager;
 
     info!(
         "{} version {}",
diff --git a/07_timestamps/src/panic_wait.rs b/07_timestamps/src/panic_wait.rs
index edd838855..ccf54f61f 100644
--- a/07_timestamps/src/panic_wait.rs
+++ b/07_timestamps/src/panic_wait.rs
@@ -42,8 +42,6 @@ fn panic_prevent_reenter() {
 
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
-    use crate::time::interface::TimeManager;
-
     // Protect against panic infinite loops if any of the following code panics itself.
     panic_prevent_reenter();
 
diff --git a/07_timestamps/src/print.rs b/07_timestamps/src/print.rs
index 8705eec0d..fe13b334c 100644
--- a/07_timestamps/src/print.rs
+++ b/07_timestamps/src/print.rs
@@ -39,8 +39,6 @@ macro_rules! println {
 #[macro_export]
 macro_rules! info {
     ($string:expr) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -50,8 +48,6 @@ macro_rules! info {
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -67,8 +63,6 @@ macro_rules! info {
 #[macro_export]
 macro_rules! warn {
     ($string:expr) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -78,8 +72,6 @@ macro_rules! warn {
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
diff --git a/07_timestamps/src/time.rs b/07_timestamps/src/time.rs
index 6d92b1966..a6c0c5b6b 100644
--- a/07_timestamps/src/time.rs
+++ b/07_timestamps/src/time.rs
@@ -8,30 +8,50 @@
 #[path = "_arch/aarch64/time.rs"]
 mod arch_time;
 
+use core::time::Duration;
+
 //--------------------------------------------------------------------------------------------------
-// Architectural Public Reexports
+// Public Definitions
 //--------------------------------------------------------------------------------------------------
-pub use arch_time::time_manager;
+
+/// Provides time management functions.
+pub struct TimeManager;
 
 //--------------------------------------------------------------------------------------------------
-// Public Definitions
+// Global instances
 //--------------------------------------------------------------------------------------------------
 
-/// Timekeeping interfaces.
-pub mod interface {
-    use core::time::Duration;
+static TIME_MANAGER: TimeManager = TimeManager::new();
 
-    /// Time management functions.
-    pub trait TimeManager {
-        /// The timer's resolution.
-        fn resolution(&self) -> Duration;
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
 
-        /// The uptime since power-on of the device.
-        ///
-        /// This includes time consumed by firmware and bootloaders.
-        fn uptime(&self) -> Duration;
+/// Return a reference to the global TimeManager.
+pub fn time_manager() -> &'static TimeManager {
+    &TIME_MANAGER
+}
+
+impl TimeManager {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self
+    }
+
+    /// The timer's resolution.
+    pub fn resolution(&self) -> Duration {
+        arch_time::resolution()
+    }
+
+    /// The uptime since power-on of the device.
+    ///
+    /// This includes time consumed by firmware and bootloaders.
+    pub fn uptime(&self) -> Duration {
+        arch_time::uptime()
+    }
 
-        /// Spin for a given duration.
-        fn spin_for(&self, duration: Duration);
+    /// Spin for a given duration.
+    pub fn spin_for(&self, duration: Duration) {
+        arch_time::spin_for(duration)
     }
 }
diff --git a/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s b/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s
index 1f70169f9..aa701fd1b 100644
--- a/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s
+++ b/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s
@@ -52,6 +52,14 @@ _start:
 	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
 
+	// Read the CPU's timer counter frequency and store it in ARCH_TIMER_COUNTER_FREQUENCY.
+	// Abort if the frequency read back as 0.
+	ADR_REL	x1, ARCH_TIMER_COUNTER_FREQUENCY // provided by aarch64/time.rs
+	mrs	x2, CNTFRQ_EL0
+	cmp	x2, xzr
+	b.eq	.L_parking_loop
+	str	w2, [x1]
+
 	// Jump to Rust code.
 	b	_start_rust
 
diff --git a/08_hw_debug_JTAG/src/_arch/aarch64/time.rs b/08_hw_debug_JTAG/src/_arch/aarch64/time.rs
index c814219ca..255a5a45d 100644
--- a/08_hw_debug_JTAG/src/_arch/aarch64/time.rs
+++ b/08_hw_debug_JTAG/src/_arch/aarch64/time.rs
@@ -11,111 +11,152 @@
 //!
 //! crate::time::arch_time
 
-use crate::{time, warn};
-use core::time::Duration;
+use crate::warn;
+use core::{
+    num::{NonZeroU128, NonZeroU32, NonZeroU64},
+    ops::{Add, Div},
+    time::Duration,
+};
 use cortex_a::{asm::barrier, registers::*};
-use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
+use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
-const NS_PER_S: u64 = 1_000_000_000;
+const NANOSEC_PER_SEC: NonZeroU64 = NonZeroU64::new(1_000_000_000).unwrap();
 
-/// ARMv8 Generic Timer.
-struct GenericTimer;
+#[derive(Copy, Clone, PartialOrd, PartialEq)]
+struct GenericTimerCounterValue(u64);
 
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
-static TIME_MANAGER: GenericTimer = GenericTimer;
+/// Boot assembly code overwrites this value with the value of CNTFRQ_EL0 before any Rust code is
+/// executed. This given value here is just a (safe) dummy.
+#[no_mangle]
+static ARCH_TIMER_COUNTER_FREQUENCY: NonZeroU32 = NonZeroU32::MIN;
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-impl GenericTimer {
-    #[inline(always)]
-    fn read_cntpct(&self) -> u64 {
-        // Prevent that the counter is read ahead of time due to out-of-order execution.
-        unsafe { barrier::isb(barrier::SY) };
-        CNTPCT_EL0.get()
-    }
+impl GenericTimerCounterValue {
+    pub const MAX: Self = GenericTimerCounterValue(u64::MAX);
 }
 
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
+impl Add for GenericTimerCounterValue {
+    type Output = Self;
 
-/// Return a reference to the time manager.
-pub fn time_manager() -> &'static impl time::interface::TimeManager {
-    &TIME_MANAGER
+    fn add(self, other: Self) -> Self {
+        GenericTimerCounterValue(self.0.wrapping_add(other.0))
+    }
 }
 
-//------------------------------------------------------------------------------
-// OS Interface Code
-//------------------------------------------------------------------------------
+impl From<GenericTimerCounterValue> for Duration {
+    fn from(counter_value: GenericTimerCounterValue) -> Self {
+        if counter_value.0 == 0 {
+            return Duration::ZERO;
+        }
 
-impl time::interface::TimeManager for GenericTimer {
-    fn resolution(&self) -> Duration {
-        Duration::from_nanos(NS_PER_S / (CNTFRQ_EL0.get() as u64))
+        // Read volatile is needed here to prevent the compiler from optimizing
+        // ARCH_TIMER_COUNTER_FREQUENCY away.
+        //
+        // This is safe, because all the safety requirements as stated in read_volatile()'s
+        // documentation are fulfilled.
+        let frequency: NonZeroU64 =
+            unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }.into();
+
+        // Div<NonZeroU64> implementation for u64 cannot panic.
+        let secs = counter_value.0.div(frequency);
+
+        // This is safe, because frequency can never be greater than u32::MAX, which means the
+        // largest theoretical value for sub_second_counter_value is (u32::MAX - 1). Therefore,
+        // (sub_second_counter_value * NANOSEC_PER_SEC) cannot overflow an u64.
+        //
+        // The subsequent division ensures the result fits into u32, since the max result is smaller
+        // than NANOSEC_PER_SEC. Therefore, just cast it to u32 using `as`.
+        let sub_second_counter_value = counter_value.0 % frequency;
+        let nanos = unsafe { sub_second_counter_value.unchecked_mul(u64::from(NANOSEC_PER_SEC)) }
+            .div(frequency) as u32;
+
+        Duration::new(secs, nanos)
     }
+}
 
-    fn uptime(&self) -> Duration {
-        let current_count: u64 = self.read_cntpct() * NS_PER_S;
-        let frq: u64 = CNTFRQ_EL0.get() as u64;
+fn max_duration() -> Duration {
+    Duration::from(GenericTimerCounterValue::MAX)
+}
 
-        Duration::from_nanos(current_count / frq)
-    }
+impl TryFrom<Duration> for GenericTimerCounterValue {
+    type Error = &'static str;
 
-    fn spin_for(&self, duration: Duration) {
-        // Instantly return on zero.
-        if duration.as_nanos() == 0 {
-            return;
+    fn try_from(duration: Duration) -> Result<Self, Self::Error> {
+        if duration < resolution() {
+            return Ok(GenericTimerCounterValue(0));
         }
 
-        // Calculate the register compare value.
-        let frq = CNTFRQ_EL0.get();
-        let x = match frq.checked_mul(duration.as_nanos() as u64) {
-            #[allow(unused_imports)]
-            None => {
-                warn!("Spin duration too long, skipping");
-                return;
-            }
-            Some(val) => val,
-        };
-        let tval = x / NS_PER_S;
-
-        // Check if it is within supported bounds.
-        let warn: Option<&str> = if tval == 0 {
-            Some("smaller")
-        // The upper 32 bits of CNTP_TVAL_EL0 are reserved.
-        } else if tval > u32::max_value().into() {
-            Some("bigger")
-        } else {
-            None
-        };
-
-        #[allow(unused_imports)]
-        if let Some(w) = warn {
-            warn!(
-                "Spin duration {} than architecturally supported, skipping",
-                w
-            );
-            return;
+        if duration > max_duration() {
+            return Err("Conversion error. Duration too big");
         }
 
-        // Set the compare value register.
-        CNTP_TVAL_EL0.set(tval);
+        // This is safe, because all the safety requirements as stated in read_volatile()'s
+        // documentation are fulfilled.
+        let frequency: u128 =
+            unsafe { u32::from(core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY)) as u128 };
+        let duration: u128 = duration.as_nanos();
 
-        // Kick off the counting.                       // Disable timer interrupt.
-        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::SET + CNTP_CTL_EL0::IMASK::SET);
+        // This is safe, because frequency can never be greater than u32::MAX, and
+        // (Duration::MAX.as_nanos() * u32::MAX) < u128::MAX.
+        let counter_value =
+            unsafe { duration.unchecked_mul(frequency) }.div(NonZeroU128::from(NANOSEC_PER_SEC));
 
-        // ISTATUS will be '1' when cval ticks have passed. Busy-check it.
-        while !CNTP_CTL_EL0.matches_all(CNTP_CTL_EL0::ISTATUS::SET) {}
-
-        // Disable counting again.
-        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::CLEAR);
+        // Since we checked above that we are <= max_duration(), just cast to u64.
+        Ok(GenericTimerCounterValue(counter_value as u64))
     }
 }
+
+#[inline(always)]
+fn read_cntpct() -> GenericTimerCounterValue {
+    // Prevent that the counter is read ahead of time due to out-of-order execution.
+    unsafe { barrier::isb(barrier::SY) };
+    let cnt = CNTPCT_EL0.get();
+
+    GenericTimerCounterValue(cnt)
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The timer's resolution.
+pub fn resolution() -> Duration {
+    Duration::from(GenericTimerCounterValue(1))
+}
+
+/// The uptime since power-on of the device.
+///
+/// This includes time consumed by firmware and bootloaders.
+pub fn uptime() -> Duration {
+    read_cntpct().into()
+}
+
+/// Spin for a given duration.
+pub fn spin_for(duration: Duration) {
+    let curr_counter_value = read_cntpct();
+
+    let counter_value_delta: GenericTimerCounterValue = match duration.try_into() {
+        Err(msg) => {
+            warn!("spin_for: {}. Skipping", msg);
+            return;
+        }
+        Ok(val) => val,
+    };
+    let counter_value_target = curr_counter_value + counter_value_delta;
+
+    // Busy wait.
+    //
+    // Read CNTPCT_EL0 directly to avoid the ISB that is part of [`read_cntpct`].
+    while GenericTimerCounterValue(CNTPCT_EL0.get()) < counter_value_target {}
+}
diff --git a/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 24958eb56..24e537cff 100644
--- a/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -140,7 +140,7 @@ impl GPIOInner {
     /// Disable pull-up/down on pins 14 and 15.
     #[cfg(feature = "bsp_rpi3")]
     fn disable_pud_14_15_bcm2837(&mut self) {
-        use crate::{time, time::interface::TimeManager};
+        use crate::time;
         use core::time::Duration;
 
         // The Linux 2837 GPIO driver waits 1 µs between the steps.
diff --git a/08_hw_debug_JTAG/src/main.rs b/08_hw_debug_JTAG/src/main.rs
index 9ecf3f97a..90c39a37c 100644
--- a/08_hw_debug_JTAG/src/main.rs
+++ b/08_hw_debug_JTAG/src/main.rs
@@ -108,9 +108,12 @@
 
 #![allow(clippy::upper_case_acronyms)]
 #![feature(asm_const)]
+#![feature(const_option)]
 #![feature(format_args_nl)]
+#![feature(nonzero_min_max)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
+#![feature(unchecked_math)]
 #![no_main]
 #![no_std]
 
@@ -148,7 +151,6 @@ unsafe fn kernel_init() -> ! {
 fn kernel_main() -> ! {
     use core::time::Duration;
     use driver::interface::DriverManager;
-    use time::interface::TimeManager;
 
     info!(
         "{} version {}",
diff --git a/08_hw_debug_JTAG/src/panic_wait.rs b/08_hw_debug_JTAG/src/panic_wait.rs
index edd838855..ccf54f61f 100644
--- a/08_hw_debug_JTAG/src/panic_wait.rs
+++ b/08_hw_debug_JTAG/src/panic_wait.rs
@@ -42,8 +42,6 @@ fn panic_prevent_reenter() {
 
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
-    use crate::time::interface::TimeManager;
-
     // Protect against panic infinite loops if any of the following code panics itself.
     panic_prevent_reenter();
 
diff --git a/08_hw_debug_JTAG/src/print.rs b/08_hw_debug_JTAG/src/print.rs
index 8705eec0d..fe13b334c 100644
--- a/08_hw_debug_JTAG/src/print.rs
+++ b/08_hw_debug_JTAG/src/print.rs
@@ -39,8 +39,6 @@ macro_rules! println {
 #[macro_export]
 macro_rules! info {
     ($string:expr) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -50,8 +48,6 @@ macro_rules! info {
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -67,8 +63,6 @@ macro_rules! info {
 #[macro_export]
 macro_rules! warn {
     ($string:expr) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -78,8 +72,6 @@ macro_rules! warn {
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
diff --git a/08_hw_debug_JTAG/src/time.rs b/08_hw_debug_JTAG/src/time.rs
index 6d92b1966..a6c0c5b6b 100644
--- a/08_hw_debug_JTAG/src/time.rs
+++ b/08_hw_debug_JTAG/src/time.rs
@@ -8,30 +8,50 @@
 #[path = "_arch/aarch64/time.rs"]
 mod arch_time;
 
+use core::time::Duration;
+
 //--------------------------------------------------------------------------------------------------
-// Architectural Public Reexports
+// Public Definitions
 //--------------------------------------------------------------------------------------------------
-pub use arch_time::time_manager;
+
+/// Provides time management functions.
+pub struct TimeManager;
 
 //--------------------------------------------------------------------------------------------------
-// Public Definitions
+// Global instances
 //--------------------------------------------------------------------------------------------------
 
-/// Timekeeping interfaces.
-pub mod interface {
-    use core::time::Duration;
+static TIME_MANAGER: TimeManager = TimeManager::new();
 
-    /// Time management functions.
-    pub trait TimeManager {
-        /// The timer's resolution.
-        fn resolution(&self) -> Duration;
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
 
-        /// The uptime since power-on of the device.
-        ///
-        /// This includes time consumed by firmware and bootloaders.
-        fn uptime(&self) -> Duration;
+/// Return a reference to the global TimeManager.
+pub fn time_manager() -> &'static TimeManager {
+    &TIME_MANAGER
+}
+
+impl TimeManager {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self
+    }
+
+    /// The timer's resolution.
+    pub fn resolution(&self) -> Duration {
+        arch_time::resolution()
+    }
+
+    /// The uptime since power-on of the device.
+    ///
+    /// This includes time consumed by firmware and bootloaders.
+    pub fn uptime(&self) -> Duration {
+        arch_time::uptime()
+    }
 
-        /// Spin for a given duration.
-        fn spin_for(&self, duration: Duration);
+    /// Spin for a given duration.
+    pub fn spin_for(&self, duration: Duration) {
+        arch_time::spin_for(duration)
     }
 }
diff --git a/09_privilege_level/README.md b/09_privilege_level/README.md
index dcf0f9291..afcfe8f6f 100644
--- a/09_privilege_level/README.md
+++ b/09_privilege_level/README.md
@@ -303,7 +303,7 @@ diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s 09_privilege_level/src/_
  	// Only proceed on the boot core. Park it otherwise.
  	mrs	x1, MPIDR_EL1
  	and	x1, x1, {CONST_CORE_ID_MASK}
-@@ -48,11 +53,11 @@
+@@ -48,7 +53,7 @@
 
  	// Prepare the jump to Rust code.
  .L_prepare_rust:
@@ -312,6 +312,10 @@ diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s 09_privilege_level/src/_
  	ADR_REL	x0, __boot_core_stack_end_exclusive
  	mov	sp, x0
 
+@@ -60,7 +65,7 @@
+ 	b.eq	.L_parking_loop
+ 	str	w2, [x1]
+
 -	// Jump to Rust code.
 +	// Jump to Rust code. x0 holds the function argument provided to _start_rust().
  	b	_start_rust
@@ -498,7 +502,7 @@ diff -uNr 08_hw_debug_JTAG/src/exception.rs 09_privilege_level/src/exception.rs
 diff -uNr 08_hw_debug_JTAG/src/main.rs 09_privilege_level/src/main.rs
 --- 08_hw_debug_JTAG/src/main.rs
 +++ 09_privilege_level/src/main.rs
-@@ -118,6 +118,7 @@
+@@ -121,6 +121,7 @@
  mod console;
  mod cpu;
  mod driver;
@@ -506,15 +510,15 @@ diff -uNr 08_hw_debug_JTAG/src/main.rs 09_privilege_level/src/main.rs
  mod panic_wait;
  mod print;
  mod synchronization;
-@@ -146,6 +147,7 @@
+@@ -149,6 +150,7 @@
 
  /// The main function running after the early init.
  fn kernel_main() -> ! {
 +    use console::console;
      use core::time::Duration;
      use driver::interface::DriverManager;
-     use time::interface::TimeManager;
-@@ -157,6 +159,12 @@
+
+@@ -159,6 +161,12 @@
      );
      info!("Booting on: {}", bsp::board_name());
 
@@ -527,7 +531,7 @@ diff -uNr 08_hw_debug_JTAG/src/main.rs 09_privilege_level/src/main.rs
      info!(
          "Architectural timer resolution: {} ns",
          time::time_manager().resolution().as_nanos()
-@@ -171,11 +179,15 @@
+@@ -173,11 +181,15 @@
          info!("      {}. {}", i + 1, driver.compatible());
      }
 
diff --git a/09_privilege_level/src/_arch/aarch64/cpu/boot.s b/09_privilege_level/src/_arch/aarch64/cpu/boot.s
index 7576dc145..f6df21236 100644
--- a/09_privilege_level/src/_arch/aarch64/cpu/boot.s
+++ b/09_privilege_level/src/_arch/aarch64/cpu/boot.s
@@ -57,6 +57,14 @@ _start:
 	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
 
+	// Read the CPU's timer counter frequency and store it in ARCH_TIMER_COUNTER_FREQUENCY.
+	// Abort if the frequency read back as 0.
+	ADR_REL	x1, ARCH_TIMER_COUNTER_FREQUENCY // provided by aarch64/time.rs
+	mrs	x2, CNTFRQ_EL0
+	cmp	x2, xzr
+	b.eq	.L_parking_loop
+	str	w2, [x1]
+
 	// Jump to Rust code. x0 holds the function argument provided to _start_rust().
 	b	_start_rust
 
diff --git a/09_privilege_level/src/_arch/aarch64/time.rs b/09_privilege_level/src/_arch/aarch64/time.rs
index c814219ca..255a5a45d 100644
--- a/09_privilege_level/src/_arch/aarch64/time.rs
+++ b/09_privilege_level/src/_arch/aarch64/time.rs
@@ -11,111 +11,152 @@
 //!
 //! crate::time::arch_time
 
-use crate::{time, warn};
-use core::time::Duration;
+use crate::warn;
+use core::{
+    num::{NonZeroU128, NonZeroU32, NonZeroU64},
+    ops::{Add, Div},
+    time::Duration,
+};
 use cortex_a::{asm::barrier, registers::*};
-use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
+use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
-const NS_PER_S: u64 = 1_000_000_000;
+const NANOSEC_PER_SEC: NonZeroU64 = NonZeroU64::new(1_000_000_000).unwrap();
 
-/// ARMv8 Generic Timer.
-struct GenericTimer;
+#[derive(Copy, Clone, PartialOrd, PartialEq)]
+struct GenericTimerCounterValue(u64);
 
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
-static TIME_MANAGER: GenericTimer = GenericTimer;
+/// Boot assembly code overwrites this value with the value of CNTFRQ_EL0 before any Rust code is
+/// executed. This given value here is just a (safe) dummy.
+#[no_mangle]
+static ARCH_TIMER_COUNTER_FREQUENCY: NonZeroU32 = NonZeroU32::MIN;
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-impl GenericTimer {
-    #[inline(always)]
-    fn read_cntpct(&self) -> u64 {
-        // Prevent that the counter is read ahead of time due to out-of-order execution.
-        unsafe { barrier::isb(barrier::SY) };
-        CNTPCT_EL0.get()
-    }
+impl GenericTimerCounterValue {
+    pub const MAX: Self = GenericTimerCounterValue(u64::MAX);
 }
 
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
+impl Add for GenericTimerCounterValue {
+    type Output = Self;
 
-/// Return a reference to the time manager.
-pub fn time_manager() -> &'static impl time::interface::TimeManager {
-    &TIME_MANAGER
+    fn add(self, other: Self) -> Self {
+        GenericTimerCounterValue(self.0.wrapping_add(other.0))
+    }
 }
 
-//------------------------------------------------------------------------------
-// OS Interface Code
-//------------------------------------------------------------------------------
+impl From<GenericTimerCounterValue> for Duration {
+    fn from(counter_value: GenericTimerCounterValue) -> Self {
+        if counter_value.0 == 0 {
+            return Duration::ZERO;
+        }
 
-impl time::interface::TimeManager for GenericTimer {
-    fn resolution(&self) -> Duration {
-        Duration::from_nanos(NS_PER_S / (CNTFRQ_EL0.get() as u64))
+        // Read volatile is needed here to prevent the compiler from optimizing
+        // ARCH_TIMER_COUNTER_FREQUENCY away.
+        //
+        // This is safe, because all the safety requirements as stated in read_volatile()'s
+        // documentation are fulfilled.
+        let frequency: NonZeroU64 =
+            unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }.into();
+
+        // Div<NonZeroU64> implementation for u64 cannot panic.
+        let secs = counter_value.0.div(frequency);
+
+        // This is safe, because frequency can never be greater than u32::MAX, which means the
+        // largest theoretical value for sub_second_counter_value is (u32::MAX - 1). Therefore,
+        // (sub_second_counter_value * NANOSEC_PER_SEC) cannot overflow an u64.
+        //
+        // The subsequent division ensures the result fits into u32, since the max result is smaller
+        // than NANOSEC_PER_SEC. Therefore, just cast it to u32 using `as`.
+        let sub_second_counter_value = counter_value.0 % frequency;
+        let nanos = unsafe { sub_second_counter_value.unchecked_mul(u64::from(NANOSEC_PER_SEC)) }
+            .div(frequency) as u32;
+
+        Duration::new(secs, nanos)
     }
+}
 
-    fn uptime(&self) -> Duration {
-        let current_count: u64 = self.read_cntpct() * NS_PER_S;
-        let frq: u64 = CNTFRQ_EL0.get() as u64;
+fn max_duration() -> Duration {
+    Duration::from(GenericTimerCounterValue::MAX)
+}
 
-        Duration::from_nanos(current_count / frq)
-    }
+impl TryFrom<Duration> for GenericTimerCounterValue {
+    type Error = &'static str;
 
-    fn spin_for(&self, duration: Duration) {
-        // Instantly return on zero.
-        if duration.as_nanos() == 0 {
-            return;
+    fn try_from(duration: Duration) -> Result<Self, Self::Error> {
+        if duration < resolution() {
+            return Ok(GenericTimerCounterValue(0));
         }
 
-        // Calculate the register compare value.
-        let frq = CNTFRQ_EL0.get();
-        let x = match frq.checked_mul(duration.as_nanos() as u64) {
-            #[allow(unused_imports)]
-            None => {
-                warn!("Spin duration too long, skipping");
-                return;
-            }
-            Some(val) => val,
-        };
-        let tval = x / NS_PER_S;
-
-        // Check if it is within supported bounds.
-        let warn: Option<&str> = if tval == 0 {
-            Some("smaller")
-        // The upper 32 bits of CNTP_TVAL_EL0 are reserved.
-        } else if tval > u32::max_value().into() {
-            Some("bigger")
-        } else {
-            None
-        };
-
-        #[allow(unused_imports)]
-        if let Some(w) = warn {
-            warn!(
-                "Spin duration {} than architecturally supported, skipping",
-                w
-            );
-            return;
+        if duration > max_duration() {
+            return Err("Conversion error. Duration too big");
         }
 
-        // Set the compare value register.
-        CNTP_TVAL_EL0.set(tval);
+        // This is safe, because all the safety requirements as stated in read_volatile()'s
+        // documentation are fulfilled.
+        let frequency: u128 =
+            unsafe { u32::from(core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY)) as u128 };
+        let duration: u128 = duration.as_nanos();
 
-        // Kick off the counting.                       // Disable timer interrupt.
-        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::SET + CNTP_CTL_EL0::IMASK::SET);
+        // This is safe, because frequency can never be greater than u32::MAX, and
+        // (Duration::MAX.as_nanos() * u32::MAX) < u128::MAX.
+        let counter_value =
+            unsafe { duration.unchecked_mul(frequency) }.div(NonZeroU128::from(NANOSEC_PER_SEC));
 
-        // ISTATUS will be '1' when cval ticks have passed. Busy-check it.
-        while !CNTP_CTL_EL0.matches_all(CNTP_CTL_EL0::ISTATUS::SET) {}
-
-        // Disable counting again.
-        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::CLEAR);
+        // Since we checked above that we are <= max_duration(), just cast to u64.
+        Ok(GenericTimerCounterValue(counter_value as u64))
     }
 }
+
+#[inline(always)]
+fn read_cntpct() -> GenericTimerCounterValue {
+    // Prevent that the counter is read ahead of time due to out-of-order execution.
+    unsafe { barrier::isb(barrier::SY) };
+    let cnt = CNTPCT_EL0.get();
+
+    GenericTimerCounterValue(cnt)
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The timer's resolution.
+pub fn resolution() -> Duration {
+    Duration::from(GenericTimerCounterValue(1))
+}
+
+/// The uptime since power-on of the device.
+///
+/// This includes time consumed by firmware and bootloaders.
+pub fn uptime() -> Duration {
+    read_cntpct().into()
+}
+
+/// Spin for a given duration.
+pub fn spin_for(duration: Duration) {
+    let curr_counter_value = read_cntpct();
+
+    let counter_value_delta: GenericTimerCounterValue = match duration.try_into() {
+        Err(msg) => {
+            warn!("spin_for: {}. Skipping", msg);
+            return;
+        }
+        Ok(val) => val,
+    };
+    let counter_value_target = curr_counter_value + counter_value_delta;
+
+    // Busy wait.
+    //
+    // Read CNTPCT_EL0 directly to avoid the ISB that is part of [`read_cntpct`].
+    while GenericTimerCounterValue(CNTPCT_EL0.get()) < counter_value_target {}
+}
diff --git a/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 24958eb56..24e537cff 100644
--- a/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -140,7 +140,7 @@ impl GPIOInner {
     /// Disable pull-up/down on pins 14 and 15.
     #[cfg(feature = "bsp_rpi3")]
     fn disable_pud_14_15_bcm2837(&mut self) {
-        use crate::{time, time::interface::TimeManager};
+        use crate::time;
         use core::time::Duration;
 
         // The Linux 2837 GPIO driver waits 1 µs between the steps.
diff --git a/09_privilege_level/src/main.rs b/09_privilege_level/src/main.rs
index 6c1ab3100..79a6716e4 100644
--- a/09_privilege_level/src/main.rs
+++ b/09_privilege_level/src/main.rs
@@ -108,9 +108,12 @@
 
 #![allow(clippy::upper_case_acronyms)]
 #![feature(asm_const)]
+#![feature(const_option)]
 #![feature(format_args_nl)]
+#![feature(nonzero_min_max)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
+#![feature(unchecked_math)]
 #![no_main]
 #![no_std]
 
@@ -150,7 +153,6 @@ fn kernel_main() -> ! {
     use console::console;
     use core::time::Duration;
     use driver::interface::DriverManager;
-    use time::interface::TimeManager;
 
     info!(
         "{} version {}",
diff --git a/09_privilege_level/src/panic_wait.rs b/09_privilege_level/src/panic_wait.rs
index edd838855..ccf54f61f 100644
--- a/09_privilege_level/src/panic_wait.rs
+++ b/09_privilege_level/src/panic_wait.rs
@@ -42,8 +42,6 @@ fn panic_prevent_reenter() {
 
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
-    use crate::time::interface::TimeManager;
-
     // Protect against panic infinite loops if any of the following code panics itself.
     panic_prevent_reenter();
 
diff --git a/09_privilege_level/src/print.rs b/09_privilege_level/src/print.rs
index 8705eec0d..fe13b334c 100644
--- a/09_privilege_level/src/print.rs
+++ b/09_privilege_level/src/print.rs
@@ -39,8 +39,6 @@ macro_rules! println {
 #[macro_export]
 macro_rules! info {
     ($string:expr) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -50,8 +48,6 @@ macro_rules! info {
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -67,8 +63,6 @@ macro_rules! info {
 #[macro_export]
 macro_rules! warn {
     ($string:expr) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -78,8 +72,6 @@ macro_rules! warn {
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
diff --git a/09_privilege_level/src/time.rs b/09_privilege_level/src/time.rs
index 6d92b1966..a6c0c5b6b 100644
--- a/09_privilege_level/src/time.rs
+++ b/09_privilege_level/src/time.rs
@@ -8,30 +8,50 @@
 #[path = "_arch/aarch64/time.rs"]
 mod arch_time;
 
+use core::time::Duration;
+
 //--------------------------------------------------------------------------------------------------
-// Architectural Public Reexports
+// Public Definitions
 //--------------------------------------------------------------------------------------------------
-pub use arch_time::time_manager;
+
+/// Provides time management functions.
+pub struct TimeManager;
 
 //--------------------------------------------------------------------------------------------------
-// Public Definitions
+// Global instances
 //--------------------------------------------------------------------------------------------------
 
-/// Timekeeping interfaces.
-pub mod interface {
-    use core::time::Duration;
+static TIME_MANAGER: TimeManager = TimeManager::new();
 
-    /// Time management functions.
-    pub trait TimeManager {
-        /// The timer's resolution.
-        fn resolution(&self) -> Duration;
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
 
-        /// The uptime since power-on of the device.
-        ///
-        /// This includes time consumed by firmware and bootloaders.
-        fn uptime(&self) -> Duration;
+/// Return a reference to the global TimeManager.
+pub fn time_manager() -> &'static TimeManager {
+    &TIME_MANAGER
+}
+
+impl TimeManager {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self
+    }
+
+    /// The timer's resolution.
+    pub fn resolution(&self) -> Duration {
+        arch_time::resolution()
+    }
+
+    /// The uptime since power-on of the device.
+    ///
+    /// This includes time consumed by firmware and bootloaders.
+    pub fn uptime(&self) -> Duration {
+        arch_time::uptime()
+    }
 
-        /// Spin for a given duration.
-        fn spin_for(&self, duration: Duration);
+    /// Spin for a given duration.
+    pub fn spin_for(&self, duration: Duration) {
+        arch_time::spin_for(duration)
     }
 }
diff --git a/10_virtual_mem_part1_identity_mapping/README.md b/10_virtual_mem_part1_identity_mapping/README.md
index 8345aef08..f1d22d98f 100644
--- a/10_virtual_mem_part1_identity_mapping/README.md
+++ b/10_virtual_mem_part1_identity_mapping/README.md
@@ -1109,18 +1109,20 @@ diff -uNr 09_privilege_level/src/common.rs 10_virtual_mem_part1_identity_mapping
 diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/src/main.rs
 --- 09_privilege_level/src/main.rs
 +++ 10_virtual_mem_part1_identity_mapping/src/main.rs
-@@ -107,18 +107,23 @@
+@@ -107,9 +107,12 @@
  //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
 
  #![allow(clippy::upper_case_acronyms)]
 +#![allow(incomplete_features)]
  #![feature(asm_const)]
+ #![feature(const_option)]
 +#![feature(core_intrinsics)]
  #![feature(format_args_nl)]
 +#![feature(int_roundings)]
+ #![feature(nonzero_min_max)]
  #![feature(panic_info_message)]
  #![feature(trait_alias)]
- #![no_main]
+@@ -118,10 +121,12 @@
  #![no_std]
 
  mod bsp;
@@ -1133,7 +1135,7 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
  mod panic_wait;
  mod print;
  mod synchronization;
-@@ -129,9 +134,17 @@
+@@ -132,9 +137,17 @@
  /// # Safety
  ///
  /// - Only a single core must be active and running this function.
@@ -1152,7 +1154,7 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
 
      for i in bsp::driver::driver_manager().all_device_drivers().iter() {
          if let Err(x) = i.init() {
-@@ -147,7 +160,7 @@
+@@ -150,7 +163,7 @@
 
  /// The main function running after the early init.
  fn kernel_main() -> ! {
@@ -1160,8 +1162,8 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
 +    use console::{console, interface::Write};
      use core::time::Duration;
      use driver::interface::DriverManager;
-     use time::interface::TimeManager;
-@@ -159,6 +172,9 @@
+
+@@ -161,6 +174,9 @@
      );
      info!("Booting on: {}", bsp::board_name());
 
@@ -1171,7 +1173,7 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
      let (_, privilege_level) = exception::current_privilege_level();
      info!("Current privilege level: {}", privilege_level);
 
-@@ -182,6 +198,13 @@
+@@ -184,6 +200,13 @@
      info!("Timer test, spinning for 1 second");
      time::time_manager().spin_for(Duration::from_secs(1));
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.s b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.s
index 7576dc145..f6df21236 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.s
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.s
@@ -57,6 +57,14 @@ _start:
 	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
 
+	// Read the CPU's timer counter frequency and store it in ARCH_TIMER_COUNTER_FREQUENCY.
+	// Abort if the frequency read back as 0.
+	ADR_REL	x1, ARCH_TIMER_COUNTER_FREQUENCY // provided by aarch64/time.rs
+	mrs	x2, CNTFRQ_EL0
+	cmp	x2, xzr
+	b.eq	.L_parking_loop
+	str	w2, [x1]
+
 	// Jump to Rust code. x0 holds the function argument provided to _start_rust().
 	b	_start_rust
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs
index c814219ca..255a5a45d 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs
@@ -11,111 +11,152 @@
 //!
 //! crate::time::arch_time
 
-use crate::{time, warn};
-use core::time::Duration;
+use crate::warn;
+use core::{
+    num::{NonZeroU128, NonZeroU32, NonZeroU64},
+    ops::{Add, Div},
+    time::Duration,
+};
 use cortex_a::{asm::barrier, registers::*};
-use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
+use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
-const NS_PER_S: u64 = 1_000_000_000;
+const NANOSEC_PER_SEC: NonZeroU64 = NonZeroU64::new(1_000_000_000).unwrap();
 
-/// ARMv8 Generic Timer.
-struct GenericTimer;
+#[derive(Copy, Clone, PartialOrd, PartialEq)]
+struct GenericTimerCounterValue(u64);
 
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
-static TIME_MANAGER: GenericTimer = GenericTimer;
+/// Boot assembly code overwrites this value with the value of CNTFRQ_EL0 before any Rust code is
+/// executed. This given value here is just a (safe) dummy.
+#[no_mangle]
+static ARCH_TIMER_COUNTER_FREQUENCY: NonZeroU32 = NonZeroU32::MIN;
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-impl GenericTimer {
-    #[inline(always)]
-    fn read_cntpct(&self) -> u64 {
-        // Prevent that the counter is read ahead of time due to out-of-order execution.
-        unsafe { barrier::isb(barrier::SY) };
-        CNTPCT_EL0.get()
-    }
+impl GenericTimerCounterValue {
+    pub const MAX: Self = GenericTimerCounterValue(u64::MAX);
 }
 
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
+impl Add for GenericTimerCounterValue {
+    type Output = Self;
 
-/// Return a reference to the time manager.
-pub fn time_manager() -> &'static impl time::interface::TimeManager {
-    &TIME_MANAGER
+    fn add(self, other: Self) -> Self {
+        GenericTimerCounterValue(self.0.wrapping_add(other.0))
+    }
 }
 
-//------------------------------------------------------------------------------
-// OS Interface Code
-//------------------------------------------------------------------------------
+impl From<GenericTimerCounterValue> for Duration {
+    fn from(counter_value: GenericTimerCounterValue) -> Self {
+        if counter_value.0 == 0 {
+            return Duration::ZERO;
+        }
 
-impl time::interface::TimeManager for GenericTimer {
-    fn resolution(&self) -> Duration {
-        Duration::from_nanos(NS_PER_S / (CNTFRQ_EL0.get() as u64))
+        // Read volatile is needed here to prevent the compiler from optimizing
+        // ARCH_TIMER_COUNTER_FREQUENCY away.
+        //
+        // This is safe, because all the safety requirements as stated in read_volatile()'s
+        // documentation are fulfilled.
+        let frequency: NonZeroU64 =
+            unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }.into();
+
+        // Div<NonZeroU64> implementation for u64 cannot panic.
+        let secs = counter_value.0.div(frequency);
+
+        // This is safe, because frequency can never be greater than u32::MAX, which means the
+        // largest theoretical value for sub_second_counter_value is (u32::MAX - 1). Therefore,
+        // (sub_second_counter_value * NANOSEC_PER_SEC) cannot overflow an u64.
+        //
+        // The subsequent division ensures the result fits into u32, since the max result is smaller
+        // than NANOSEC_PER_SEC. Therefore, just cast it to u32 using `as`.
+        let sub_second_counter_value = counter_value.0 % frequency;
+        let nanos = unsafe { sub_second_counter_value.unchecked_mul(u64::from(NANOSEC_PER_SEC)) }
+            .div(frequency) as u32;
+
+        Duration::new(secs, nanos)
     }
+}
 
-    fn uptime(&self) -> Duration {
-        let current_count: u64 = self.read_cntpct() * NS_PER_S;
-        let frq: u64 = CNTFRQ_EL0.get() as u64;
+fn max_duration() -> Duration {
+    Duration::from(GenericTimerCounterValue::MAX)
+}
 
-        Duration::from_nanos(current_count / frq)
-    }
+impl TryFrom<Duration> for GenericTimerCounterValue {
+    type Error = &'static str;
 
-    fn spin_for(&self, duration: Duration) {
-        // Instantly return on zero.
-        if duration.as_nanos() == 0 {
-            return;
+    fn try_from(duration: Duration) -> Result<Self, Self::Error> {
+        if duration < resolution() {
+            return Ok(GenericTimerCounterValue(0));
         }
 
-        // Calculate the register compare value.
-        let frq = CNTFRQ_EL0.get();
-        let x = match frq.checked_mul(duration.as_nanos() as u64) {
-            #[allow(unused_imports)]
-            None => {
-                warn!("Spin duration too long, skipping");
-                return;
-            }
-            Some(val) => val,
-        };
-        let tval = x / NS_PER_S;
-
-        // Check if it is within supported bounds.
-        let warn: Option<&str> = if tval == 0 {
-            Some("smaller")
-        // The upper 32 bits of CNTP_TVAL_EL0 are reserved.
-        } else if tval > u32::max_value().into() {
-            Some("bigger")
-        } else {
-            None
-        };
-
-        #[allow(unused_imports)]
-        if let Some(w) = warn {
-            warn!(
-                "Spin duration {} than architecturally supported, skipping",
-                w
-            );
-            return;
+        if duration > max_duration() {
+            return Err("Conversion error. Duration too big");
         }
 
-        // Set the compare value register.
-        CNTP_TVAL_EL0.set(tval);
+        // This is safe, because all the safety requirements as stated in read_volatile()'s
+        // documentation are fulfilled.
+        let frequency: u128 =
+            unsafe { u32::from(core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY)) as u128 };
+        let duration: u128 = duration.as_nanos();
 
-        // Kick off the counting.                       // Disable timer interrupt.
-        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::SET + CNTP_CTL_EL0::IMASK::SET);
+        // This is safe, because frequency can never be greater than u32::MAX, and
+        // (Duration::MAX.as_nanos() * u32::MAX) < u128::MAX.
+        let counter_value =
+            unsafe { duration.unchecked_mul(frequency) }.div(NonZeroU128::from(NANOSEC_PER_SEC));
 
-        // ISTATUS will be '1' when cval ticks have passed. Busy-check it.
-        while !CNTP_CTL_EL0.matches_all(CNTP_CTL_EL0::ISTATUS::SET) {}
-
-        // Disable counting again.
-        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::CLEAR);
+        // Since we checked above that we are <= max_duration(), just cast to u64.
+        Ok(GenericTimerCounterValue(counter_value as u64))
     }
 }
+
+#[inline(always)]
+fn read_cntpct() -> GenericTimerCounterValue {
+    // Prevent that the counter is read ahead of time due to out-of-order execution.
+    unsafe { barrier::isb(barrier::SY) };
+    let cnt = CNTPCT_EL0.get();
+
+    GenericTimerCounterValue(cnt)
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The timer's resolution.
+pub fn resolution() -> Duration {
+    Duration::from(GenericTimerCounterValue(1))
+}
+
+/// The uptime since power-on of the device.
+///
+/// This includes time consumed by firmware and bootloaders.
+pub fn uptime() -> Duration {
+    read_cntpct().into()
+}
+
+/// Spin for a given duration.
+pub fn spin_for(duration: Duration) {
+    let curr_counter_value = read_cntpct();
+
+    let counter_value_delta: GenericTimerCounterValue = match duration.try_into() {
+        Err(msg) => {
+            warn!("spin_for: {}. Skipping", msg);
+            return;
+        }
+        Ok(val) => val,
+    };
+    let counter_value_target = curr_counter_value + counter_value_delta;
+
+    // Busy wait.
+    //
+    // Read CNTPCT_EL0 directly to avoid the ISB that is part of [`read_cntpct`].
+    while GenericTimerCounterValue(CNTPCT_EL0.get()) < counter_value_target {}
+}
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 24958eb56..24e537cff 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -140,7 +140,7 @@ impl GPIOInner {
     /// Disable pull-up/down on pins 14 and 15.
     #[cfg(feature = "bsp_rpi3")]
     fn disable_pud_14_15_bcm2837(&mut self) {
-        use crate::{time, time::interface::TimeManager};
+        use crate::time;
         use core::time::Duration;
 
         // The Linux 2837 GPIO driver waits 1 µs between the steps.
diff --git a/10_virtual_mem_part1_identity_mapping/src/main.rs b/10_virtual_mem_part1_identity_mapping/src/main.rs
index 40b6d13b4..e038e093c 100644
--- a/10_virtual_mem_part1_identity_mapping/src/main.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/main.rs
@@ -109,11 +109,14 @@
 #![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
 #![feature(asm_const)]
+#![feature(const_option)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(int_roundings)]
+#![feature(nonzero_min_max)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
+#![feature(unchecked_math)]
 #![no_main]
 #![no_std]
 
@@ -163,7 +166,6 @@ fn kernel_main() -> ! {
     use console::{console, interface::Write};
     use core::time::Duration;
     use driver::interface::DriverManager;
-    use time::interface::TimeManager;
 
     info!(
         "{} version {}",
diff --git a/10_virtual_mem_part1_identity_mapping/src/panic_wait.rs b/10_virtual_mem_part1_identity_mapping/src/panic_wait.rs
index edd838855..ccf54f61f 100644
--- a/10_virtual_mem_part1_identity_mapping/src/panic_wait.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/panic_wait.rs
@@ -42,8 +42,6 @@ fn panic_prevent_reenter() {
 
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
-    use crate::time::interface::TimeManager;
-
     // Protect against panic infinite loops if any of the following code panics itself.
     panic_prevent_reenter();
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/print.rs b/10_virtual_mem_part1_identity_mapping/src/print.rs
index 8705eec0d..fe13b334c 100644
--- a/10_virtual_mem_part1_identity_mapping/src/print.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/print.rs
@@ -39,8 +39,6 @@ macro_rules! println {
 #[macro_export]
 macro_rules! info {
     ($string:expr) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -50,8 +48,6 @@ macro_rules! info {
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -67,8 +63,6 @@ macro_rules! info {
 #[macro_export]
 macro_rules! warn {
     ($string:expr) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -78,8 +72,6 @@ macro_rules! warn {
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
diff --git a/10_virtual_mem_part1_identity_mapping/src/time.rs b/10_virtual_mem_part1_identity_mapping/src/time.rs
index 6d92b1966..a6c0c5b6b 100644
--- a/10_virtual_mem_part1_identity_mapping/src/time.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/time.rs
@@ -8,30 +8,50 @@
 #[path = "_arch/aarch64/time.rs"]
 mod arch_time;
 
+use core::time::Duration;
+
 //--------------------------------------------------------------------------------------------------
-// Architectural Public Reexports
+// Public Definitions
 //--------------------------------------------------------------------------------------------------
-pub use arch_time::time_manager;
+
+/// Provides time management functions.
+pub struct TimeManager;
 
 //--------------------------------------------------------------------------------------------------
-// Public Definitions
+// Global instances
 //--------------------------------------------------------------------------------------------------
 
-/// Timekeeping interfaces.
-pub mod interface {
-    use core::time::Duration;
+static TIME_MANAGER: TimeManager = TimeManager::new();
 
-    /// Time management functions.
-    pub trait TimeManager {
-        /// The timer's resolution.
-        fn resolution(&self) -> Duration;
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
 
-        /// The uptime since power-on of the device.
-        ///
-        /// This includes time consumed by firmware and bootloaders.
-        fn uptime(&self) -> Duration;
+/// Return a reference to the global TimeManager.
+pub fn time_manager() -> &'static TimeManager {
+    &TIME_MANAGER
+}
+
+impl TimeManager {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self
+    }
+
+    /// The timer's resolution.
+    pub fn resolution(&self) -> Duration {
+        arch_time::resolution()
+    }
+
+    /// The uptime since power-on of the device.
+    ///
+    /// This includes time consumed by firmware and bootloaders.
+    pub fn uptime(&self) -> Duration {
+        arch_time::uptime()
+    }
 
-        /// Spin for a given duration.
-        fn spin_for(&self, duration: Duration);
+    /// Spin for a given duration.
+    pub fn spin_for(&self, duration: Duration) {
+        arch_time::spin_for(duration)
     }
 }
diff --git a/11_exceptions_part1_groundwork/README.md b/11_exceptions_part1_groundwork/README.md
index 4fc713a59..3e7ca05e8 100644
--- a/11_exceptions_part1_groundwork/README.md
+++ b/11_exceptions_part1_groundwork/README.md
@@ -1024,7 +1024,7 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/exception.rs 11_exceptions_p
 diff -uNr 10_virtual_mem_part1_identity_mapping/src/main.rs 11_exceptions_part1_groundwork/src/main.rs
 --- 10_virtual_mem_part1_identity_mapping/src/main.rs
 +++ 11_exceptions_part1_groundwork/src/main.rs
-@@ -142,6 +142,8 @@
+@@ -145,6 +145,8 @@
      use driver::interface::DriverManager;
      use memory::mmu::interface::MMU;
 
@@ -1033,7 +1033,7 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/main.rs 11_exceptions_part1_
      if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
          panic!("MMU: {}", string);
      }
-@@ -160,7 +162,7 @@
+@@ -163,7 +165,7 @@
 
  /// The main function running after the early init.
  fn kernel_main() -> ! {
@@ -1041,8 +1041,8 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/main.rs 11_exceptions_part1_
 +    use console::console;
      use core::time::Duration;
      use driver::interface::DriverManager;
-     use time::interface::TimeManager;
-@@ -198,13 +200,28 @@
+
+@@ -200,13 +202,28 @@
      info!("Timer test, spinning for 1 second");
      time::time_manager().spin_for(Duration::from_secs(1));
 
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.s b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.s
index 7576dc145..f6df21236 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.s
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.s
@@ -57,6 +57,14 @@ _start:
 	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
 
+	// Read the CPU's timer counter frequency and store it in ARCH_TIMER_COUNTER_FREQUENCY.
+	// Abort if the frequency read back as 0.
+	ADR_REL	x1, ARCH_TIMER_COUNTER_FREQUENCY // provided by aarch64/time.rs
+	mrs	x2, CNTFRQ_EL0
+	cmp	x2, xzr
+	b.eq	.L_parking_loop
+	str	w2, [x1]
+
 	// Jump to Rust code. x0 holds the function argument provided to _start_rust().
 	b	_start_rust
 
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/time.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/time.rs
index c814219ca..255a5a45d 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/time.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/time.rs
@@ -11,111 +11,152 @@
 //!
 //! crate::time::arch_time
 
-use crate::{time, warn};
-use core::time::Duration;
+use crate::warn;
+use core::{
+    num::{NonZeroU128, NonZeroU32, NonZeroU64},
+    ops::{Add, Div},
+    time::Duration,
+};
 use cortex_a::{asm::barrier, registers::*};
-use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
+use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
-const NS_PER_S: u64 = 1_000_000_000;
+const NANOSEC_PER_SEC: NonZeroU64 = NonZeroU64::new(1_000_000_000).unwrap();
 
-/// ARMv8 Generic Timer.
-struct GenericTimer;
+#[derive(Copy, Clone, PartialOrd, PartialEq)]
+struct GenericTimerCounterValue(u64);
 
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
-static TIME_MANAGER: GenericTimer = GenericTimer;
+/// Boot assembly code overwrites this value with the value of CNTFRQ_EL0 before any Rust code is
+/// executed. This given value here is just a (safe) dummy.
+#[no_mangle]
+static ARCH_TIMER_COUNTER_FREQUENCY: NonZeroU32 = NonZeroU32::MIN;
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-impl GenericTimer {
-    #[inline(always)]
-    fn read_cntpct(&self) -> u64 {
-        // Prevent that the counter is read ahead of time due to out-of-order execution.
-        unsafe { barrier::isb(barrier::SY) };
-        CNTPCT_EL0.get()
-    }
+impl GenericTimerCounterValue {
+    pub const MAX: Self = GenericTimerCounterValue(u64::MAX);
 }
 
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
+impl Add for GenericTimerCounterValue {
+    type Output = Self;
 
-/// Return a reference to the time manager.
-pub fn time_manager() -> &'static impl time::interface::TimeManager {
-    &TIME_MANAGER
+    fn add(self, other: Self) -> Self {
+        GenericTimerCounterValue(self.0.wrapping_add(other.0))
+    }
 }
 
-//------------------------------------------------------------------------------
-// OS Interface Code
-//------------------------------------------------------------------------------
+impl From<GenericTimerCounterValue> for Duration {
+    fn from(counter_value: GenericTimerCounterValue) -> Self {
+        if counter_value.0 == 0 {
+            return Duration::ZERO;
+        }
 
-impl time::interface::TimeManager for GenericTimer {
-    fn resolution(&self) -> Duration {
-        Duration::from_nanos(NS_PER_S / (CNTFRQ_EL0.get() as u64))
+        // Read volatile is needed here to prevent the compiler from optimizing
+        // ARCH_TIMER_COUNTER_FREQUENCY away.
+        //
+        // This is safe, because all the safety requirements as stated in read_volatile()'s
+        // documentation are fulfilled.
+        let frequency: NonZeroU64 =
+            unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }.into();
+
+        // Div<NonZeroU64> implementation for u64 cannot panic.
+        let secs = counter_value.0.div(frequency);
+
+        // This is safe, because frequency can never be greater than u32::MAX, which means the
+        // largest theoretical value for sub_second_counter_value is (u32::MAX - 1). Therefore,
+        // (sub_second_counter_value * NANOSEC_PER_SEC) cannot overflow an u64.
+        //
+        // The subsequent division ensures the result fits into u32, since the max result is smaller
+        // than NANOSEC_PER_SEC. Therefore, just cast it to u32 using `as`.
+        let sub_second_counter_value = counter_value.0 % frequency;
+        let nanos = unsafe { sub_second_counter_value.unchecked_mul(u64::from(NANOSEC_PER_SEC)) }
+            .div(frequency) as u32;
+
+        Duration::new(secs, nanos)
     }
+}
 
-    fn uptime(&self) -> Duration {
-        let current_count: u64 = self.read_cntpct() * NS_PER_S;
-        let frq: u64 = CNTFRQ_EL0.get() as u64;
+fn max_duration() -> Duration {
+    Duration::from(GenericTimerCounterValue::MAX)
+}
 
-        Duration::from_nanos(current_count / frq)
-    }
+impl TryFrom<Duration> for GenericTimerCounterValue {
+    type Error = &'static str;
 
-    fn spin_for(&self, duration: Duration) {
-        // Instantly return on zero.
-        if duration.as_nanos() == 0 {
-            return;
+    fn try_from(duration: Duration) -> Result<Self, Self::Error> {
+        if duration < resolution() {
+            return Ok(GenericTimerCounterValue(0));
         }
 
-        // Calculate the register compare value.
-        let frq = CNTFRQ_EL0.get();
-        let x = match frq.checked_mul(duration.as_nanos() as u64) {
-            #[allow(unused_imports)]
-            None => {
-                warn!("Spin duration too long, skipping");
-                return;
-            }
-            Some(val) => val,
-        };
-        let tval = x / NS_PER_S;
-
-        // Check if it is within supported bounds.
-        let warn: Option<&str> = if tval == 0 {
-            Some("smaller")
-        // The upper 32 bits of CNTP_TVAL_EL0 are reserved.
-        } else if tval > u32::max_value().into() {
-            Some("bigger")
-        } else {
-            None
-        };
-
-        #[allow(unused_imports)]
-        if let Some(w) = warn {
-            warn!(
-                "Spin duration {} than architecturally supported, skipping",
-                w
-            );
-            return;
+        if duration > max_duration() {
+            return Err("Conversion error. Duration too big");
         }
 
-        // Set the compare value register.
-        CNTP_TVAL_EL0.set(tval);
+        // This is safe, because all the safety requirements as stated in read_volatile()'s
+        // documentation are fulfilled.
+        let frequency: u128 =
+            unsafe { u32::from(core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY)) as u128 };
+        let duration: u128 = duration.as_nanos();
 
-        // Kick off the counting.                       // Disable timer interrupt.
-        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::SET + CNTP_CTL_EL0::IMASK::SET);
+        // This is safe, because frequency can never be greater than u32::MAX, and
+        // (Duration::MAX.as_nanos() * u32::MAX) < u128::MAX.
+        let counter_value =
+            unsafe { duration.unchecked_mul(frequency) }.div(NonZeroU128::from(NANOSEC_PER_SEC));
 
-        // ISTATUS will be '1' when cval ticks have passed. Busy-check it.
-        while !CNTP_CTL_EL0.matches_all(CNTP_CTL_EL0::ISTATUS::SET) {}
-
-        // Disable counting again.
-        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::CLEAR);
+        // Since we checked above that we are <= max_duration(), just cast to u64.
+        Ok(GenericTimerCounterValue(counter_value as u64))
     }
 }
+
+#[inline(always)]
+fn read_cntpct() -> GenericTimerCounterValue {
+    // Prevent that the counter is read ahead of time due to out-of-order execution.
+    unsafe { barrier::isb(barrier::SY) };
+    let cnt = CNTPCT_EL0.get();
+
+    GenericTimerCounterValue(cnt)
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The timer's resolution.
+pub fn resolution() -> Duration {
+    Duration::from(GenericTimerCounterValue(1))
+}
+
+/// The uptime since power-on of the device.
+///
+/// This includes time consumed by firmware and bootloaders.
+pub fn uptime() -> Duration {
+    read_cntpct().into()
+}
+
+/// Spin for a given duration.
+pub fn spin_for(duration: Duration) {
+    let curr_counter_value = read_cntpct();
+
+    let counter_value_delta: GenericTimerCounterValue = match duration.try_into() {
+        Err(msg) => {
+            warn!("spin_for: {}. Skipping", msg);
+            return;
+        }
+        Ok(val) => val,
+    };
+    let counter_value_target = curr_counter_value + counter_value_delta;
+
+    // Busy wait.
+    //
+    // Read CNTPCT_EL0 directly to avoid the ISB that is part of [`read_cntpct`].
+    while GenericTimerCounterValue(CNTPCT_EL0.get()) < counter_value_target {}
+}
diff --git a/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 24958eb56..24e537cff 100644
--- a/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -140,7 +140,7 @@ impl GPIOInner {
     /// Disable pull-up/down on pins 14 and 15.
     #[cfg(feature = "bsp_rpi3")]
     fn disable_pud_14_15_bcm2837(&mut self) {
-        use crate::{time, time::interface::TimeManager};
+        use crate::time;
         use core::time::Duration;
 
         // The Linux 2837 GPIO driver waits 1 µs between the steps.
diff --git a/11_exceptions_part1_groundwork/src/main.rs b/11_exceptions_part1_groundwork/src/main.rs
index 585382a56..8e632fa52 100644
--- a/11_exceptions_part1_groundwork/src/main.rs
+++ b/11_exceptions_part1_groundwork/src/main.rs
@@ -109,11 +109,14 @@
 #![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
 #![feature(asm_const)]
+#![feature(const_option)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(int_roundings)]
+#![feature(nonzero_min_max)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
+#![feature(unchecked_math)]
 #![no_main]
 #![no_std]
 
@@ -165,7 +168,6 @@ fn kernel_main() -> ! {
     use console::console;
     use core::time::Duration;
     use driver::interface::DriverManager;
-    use time::interface::TimeManager;
 
     info!(
         "{} version {}",
diff --git a/11_exceptions_part1_groundwork/src/panic_wait.rs b/11_exceptions_part1_groundwork/src/panic_wait.rs
index edd838855..ccf54f61f 100644
--- a/11_exceptions_part1_groundwork/src/panic_wait.rs
+++ b/11_exceptions_part1_groundwork/src/panic_wait.rs
@@ -42,8 +42,6 @@ fn panic_prevent_reenter() {
 
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
-    use crate::time::interface::TimeManager;
-
     // Protect against panic infinite loops if any of the following code panics itself.
     panic_prevent_reenter();
 
diff --git a/11_exceptions_part1_groundwork/src/print.rs b/11_exceptions_part1_groundwork/src/print.rs
index 8705eec0d..fe13b334c 100644
--- a/11_exceptions_part1_groundwork/src/print.rs
+++ b/11_exceptions_part1_groundwork/src/print.rs
@@ -39,8 +39,6 @@ macro_rules! println {
 #[macro_export]
 macro_rules! info {
     ($string:expr) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -50,8 +48,6 @@ macro_rules! info {
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -67,8 +63,6 @@ macro_rules! info {
 #[macro_export]
 macro_rules! warn {
     ($string:expr) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -78,8 +72,6 @@ macro_rules! warn {
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
diff --git a/11_exceptions_part1_groundwork/src/time.rs b/11_exceptions_part1_groundwork/src/time.rs
index 6d92b1966..a6c0c5b6b 100644
--- a/11_exceptions_part1_groundwork/src/time.rs
+++ b/11_exceptions_part1_groundwork/src/time.rs
@@ -8,30 +8,50 @@
 #[path = "_arch/aarch64/time.rs"]
 mod arch_time;
 
+use core::time::Duration;
+
 //--------------------------------------------------------------------------------------------------
-// Architectural Public Reexports
+// Public Definitions
 //--------------------------------------------------------------------------------------------------
-pub use arch_time::time_manager;
+
+/// Provides time management functions.
+pub struct TimeManager;
 
 //--------------------------------------------------------------------------------------------------
-// Public Definitions
+// Global instances
 //--------------------------------------------------------------------------------------------------
 
-/// Timekeeping interfaces.
-pub mod interface {
-    use core::time::Duration;
+static TIME_MANAGER: TimeManager = TimeManager::new();
 
-    /// Time management functions.
-    pub trait TimeManager {
-        /// The timer's resolution.
-        fn resolution(&self) -> Duration;
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
 
-        /// The uptime since power-on of the device.
-        ///
-        /// This includes time consumed by firmware and bootloaders.
-        fn uptime(&self) -> Duration;
+/// Return a reference to the global TimeManager.
+pub fn time_manager() -> &'static TimeManager {
+    &TIME_MANAGER
+}
+
+impl TimeManager {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self
+    }
+
+    /// The timer's resolution.
+    pub fn resolution(&self) -> Duration {
+        arch_time::resolution()
+    }
+
+    /// The uptime since power-on of the device.
+    ///
+    /// This includes time consumed by firmware and bootloaders.
+    pub fn uptime(&self) -> Duration {
+        arch_time::uptime()
+    }
 
-        /// Spin for a given duration.
-        fn spin_for(&self, duration: Duration);
+    /// Spin for a given duration.
+    pub fn spin_for(&self, duration: Duration) {
+        arch_time::spin_for(duration)
     }
 }
diff --git a/12_integrated_testing/README.md b/12_integrated_testing/README.md
index e0d0dd1dc..c5d032e8d 100644
--- a/12_integrated_testing/README.md
+++ b/12_integrated_testing/README.md
@@ -622,7 +622,7 @@ your test code into individual chunks. For example, take a look at `tests/01_tim
 #![test_runner(libkernel::test_runner)]
 
 use core::time::Duration;
-use libkernel::{bsp, cpu, driver, exception, time, time::interface::TimeManager};
+use libkernel::{bsp, cpu, driver, exception, time};
 use test_macros::kernel_test;
 
 #[no_mangle]
@@ -643,6 +643,7 @@ unsafe fn kernel_init() -> ! {
 #[kernel_test]
 fn timer_is_counting() {
     assert!(time::time_manager().uptime().as_nanos() > 0)
+    assert!(time::time_manager().resolution().as_nanos() < 100)
 }
 
 /// Timer resolution must be sufficient.
diff --git a/12_integrated_testing/kernel/src/_arch/aarch64/cpu/boot.s b/12_integrated_testing/kernel/src/_arch/aarch64/cpu/boot.s
index 7576dc145..f6df21236 100644
--- a/12_integrated_testing/kernel/src/_arch/aarch64/cpu/boot.s
+++ b/12_integrated_testing/kernel/src/_arch/aarch64/cpu/boot.s
@@ -57,6 +57,14 @@ _start:
 	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
 
+	// Read the CPU's timer counter frequency and store it in ARCH_TIMER_COUNTER_FREQUENCY.
+	// Abort if the frequency read back as 0.
+	ADR_REL	x1, ARCH_TIMER_COUNTER_FREQUENCY // provided by aarch64/time.rs
+	mrs	x2, CNTFRQ_EL0
+	cmp	x2, xzr
+	b.eq	.L_parking_loop
+	str	w2, [x1]
+
 	// Jump to Rust code. x0 holds the function argument provided to _start_rust().
 	b	_start_rust
 
diff --git a/12_integrated_testing/kernel/src/_arch/aarch64/time.rs b/12_integrated_testing/kernel/src/_arch/aarch64/time.rs
index c814219ca..255a5a45d 100644
--- a/12_integrated_testing/kernel/src/_arch/aarch64/time.rs
+++ b/12_integrated_testing/kernel/src/_arch/aarch64/time.rs
@@ -11,111 +11,152 @@
 //!
 //! crate::time::arch_time
 
-use crate::{time, warn};
-use core::time::Duration;
+use crate::warn;
+use core::{
+    num::{NonZeroU128, NonZeroU32, NonZeroU64},
+    ops::{Add, Div},
+    time::Duration,
+};
 use cortex_a::{asm::barrier, registers::*};
-use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
+use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
-const NS_PER_S: u64 = 1_000_000_000;
+const NANOSEC_PER_SEC: NonZeroU64 = NonZeroU64::new(1_000_000_000).unwrap();
 
-/// ARMv8 Generic Timer.
-struct GenericTimer;
+#[derive(Copy, Clone, PartialOrd, PartialEq)]
+struct GenericTimerCounterValue(u64);
 
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
-static TIME_MANAGER: GenericTimer = GenericTimer;
+/// Boot assembly code overwrites this value with the value of CNTFRQ_EL0 before any Rust code is
+/// executed. This given value here is just a (safe) dummy.
+#[no_mangle]
+static ARCH_TIMER_COUNTER_FREQUENCY: NonZeroU32 = NonZeroU32::MIN;
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-impl GenericTimer {
-    #[inline(always)]
-    fn read_cntpct(&self) -> u64 {
-        // Prevent that the counter is read ahead of time due to out-of-order execution.
-        unsafe { barrier::isb(barrier::SY) };
-        CNTPCT_EL0.get()
-    }
+impl GenericTimerCounterValue {
+    pub const MAX: Self = GenericTimerCounterValue(u64::MAX);
 }
 
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
+impl Add for GenericTimerCounterValue {
+    type Output = Self;
 
-/// Return a reference to the time manager.
-pub fn time_manager() -> &'static impl time::interface::TimeManager {
-    &TIME_MANAGER
+    fn add(self, other: Self) -> Self {
+        GenericTimerCounterValue(self.0.wrapping_add(other.0))
+    }
 }
 
-//------------------------------------------------------------------------------
-// OS Interface Code
-//------------------------------------------------------------------------------
+impl From<GenericTimerCounterValue> for Duration {
+    fn from(counter_value: GenericTimerCounterValue) -> Self {
+        if counter_value.0 == 0 {
+            return Duration::ZERO;
+        }
 
-impl time::interface::TimeManager for GenericTimer {
-    fn resolution(&self) -> Duration {
-        Duration::from_nanos(NS_PER_S / (CNTFRQ_EL0.get() as u64))
+        // Read volatile is needed here to prevent the compiler from optimizing
+        // ARCH_TIMER_COUNTER_FREQUENCY away.
+        //
+        // This is safe, because all the safety requirements as stated in read_volatile()'s
+        // documentation are fulfilled.
+        let frequency: NonZeroU64 =
+            unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }.into();
+
+        // Div<NonZeroU64> implementation for u64 cannot panic.
+        let secs = counter_value.0.div(frequency);
+
+        // This is safe, because frequency can never be greater than u32::MAX, which means the
+        // largest theoretical value for sub_second_counter_value is (u32::MAX - 1). Therefore,
+        // (sub_second_counter_value * NANOSEC_PER_SEC) cannot overflow an u64.
+        //
+        // The subsequent division ensures the result fits into u32, since the max result is smaller
+        // than NANOSEC_PER_SEC. Therefore, just cast it to u32 using `as`.
+        let sub_second_counter_value = counter_value.0 % frequency;
+        let nanos = unsafe { sub_second_counter_value.unchecked_mul(u64::from(NANOSEC_PER_SEC)) }
+            .div(frequency) as u32;
+
+        Duration::new(secs, nanos)
     }
+}
 
-    fn uptime(&self) -> Duration {
-        let current_count: u64 = self.read_cntpct() * NS_PER_S;
-        let frq: u64 = CNTFRQ_EL0.get() as u64;
+fn max_duration() -> Duration {
+    Duration::from(GenericTimerCounterValue::MAX)
+}
 
-        Duration::from_nanos(current_count / frq)
-    }
+impl TryFrom<Duration> for GenericTimerCounterValue {
+    type Error = &'static str;
 
-    fn spin_for(&self, duration: Duration) {
-        // Instantly return on zero.
-        if duration.as_nanos() == 0 {
-            return;
+    fn try_from(duration: Duration) -> Result<Self, Self::Error> {
+        if duration < resolution() {
+            return Ok(GenericTimerCounterValue(0));
         }
 
-        // Calculate the register compare value.
-        let frq = CNTFRQ_EL0.get();
-        let x = match frq.checked_mul(duration.as_nanos() as u64) {
-            #[allow(unused_imports)]
-            None => {
-                warn!("Spin duration too long, skipping");
-                return;
-            }
-            Some(val) => val,
-        };
-        let tval = x / NS_PER_S;
-
-        // Check if it is within supported bounds.
-        let warn: Option<&str> = if tval == 0 {
-            Some("smaller")
-        // The upper 32 bits of CNTP_TVAL_EL0 are reserved.
-        } else if tval > u32::max_value().into() {
-            Some("bigger")
-        } else {
-            None
-        };
-
-        #[allow(unused_imports)]
-        if let Some(w) = warn {
-            warn!(
-                "Spin duration {} than architecturally supported, skipping",
-                w
-            );
-            return;
+        if duration > max_duration() {
+            return Err("Conversion error. Duration too big");
         }
 
-        // Set the compare value register.
-        CNTP_TVAL_EL0.set(tval);
+        // This is safe, because all the safety requirements as stated in read_volatile()'s
+        // documentation are fulfilled.
+        let frequency: u128 =
+            unsafe { u32::from(core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY)) as u128 };
+        let duration: u128 = duration.as_nanos();
 
-        // Kick off the counting.                       // Disable timer interrupt.
-        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::SET + CNTP_CTL_EL0::IMASK::SET);
+        // This is safe, because frequency can never be greater than u32::MAX, and
+        // (Duration::MAX.as_nanos() * u32::MAX) < u128::MAX.
+        let counter_value =
+            unsafe { duration.unchecked_mul(frequency) }.div(NonZeroU128::from(NANOSEC_PER_SEC));
 
-        // ISTATUS will be '1' when cval ticks have passed. Busy-check it.
-        while !CNTP_CTL_EL0.matches_all(CNTP_CTL_EL0::ISTATUS::SET) {}
-
-        // Disable counting again.
-        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::CLEAR);
+        // Since we checked above that we are <= max_duration(), just cast to u64.
+        Ok(GenericTimerCounterValue(counter_value as u64))
     }
 }
+
+#[inline(always)]
+fn read_cntpct() -> GenericTimerCounterValue {
+    // Prevent that the counter is read ahead of time due to out-of-order execution.
+    unsafe { barrier::isb(barrier::SY) };
+    let cnt = CNTPCT_EL0.get();
+
+    GenericTimerCounterValue(cnt)
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The timer's resolution.
+pub fn resolution() -> Duration {
+    Duration::from(GenericTimerCounterValue(1))
+}
+
+/// The uptime since power-on of the device.
+///
+/// This includes time consumed by firmware and bootloaders.
+pub fn uptime() -> Duration {
+    read_cntpct().into()
+}
+
+/// Spin for a given duration.
+pub fn spin_for(duration: Duration) {
+    let curr_counter_value = read_cntpct();
+
+    let counter_value_delta: GenericTimerCounterValue = match duration.try_into() {
+        Err(msg) => {
+            warn!("spin_for: {}. Skipping", msg);
+            return;
+        }
+        Ok(val) => val,
+    };
+    let counter_value_target = curr_counter_value + counter_value_delta;
+
+    // Busy wait.
+    //
+    // Read CNTPCT_EL0 directly to avoid the ISB that is part of [`read_cntpct`].
+    while GenericTimerCounterValue(CNTPCT_EL0.get()) < counter_value_target {}
+}
diff --git a/12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 24958eb56..24e537cff 100644
--- a/12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -140,7 +140,7 @@ impl GPIOInner {
     /// Disable pull-up/down on pins 14 and 15.
     #[cfg(feature = "bsp_rpi3")]
     fn disable_pud_14_15_bcm2837(&mut self) {
-        use crate::{time, time::interface::TimeManager};
+        use crate::time;
         use core::time::Duration;
 
         // The Linux 2837 GPIO driver waits 1 µs between the steps.
diff --git a/12_integrated_testing/kernel/src/lib.rs b/12_integrated_testing/kernel/src/lib.rs
index 4a41bbfe7..35698c743 100644
--- a/12_integrated_testing/kernel/src/lib.rs
+++ b/12_integrated_testing/kernel/src/lib.rs
@@ -111,12 +111,15 @@
 #![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
 #![feature(asm_const)]
+#![feature(const_option)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(int_roundings)]
 #![feature(linkage)]
+#![feature(nonzero_min_max)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
+#![feature(unchecked_math)]
 #![no_std]
 // Testing
 #![cfg_attr(test, no_main)]
diff --git a/12_integrated_testing/kernel/src/panic_wait.rs b/12_integrated_testing/kernel/src/panic_wait.rs
index 8bedfded0..da779008b 100644
--- a/12_integrated_testing/kernel/src/panic_wait.rs
+++ b/12_integrated_testing/kernel/src/panic_wait.rs
@@ -59,8 +59,6 @@ fn panic_prevent_reenter() {
 
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
-    use crate::time::interface::TimeManager;
-
     // Protect against panic infinite loops if any of the following code panics itself.
     panic_prevent_reenter();
 
diff --git a/12_integrated_testing/kernel/src/print.rs b/12_integrated_testing/kernel/src/print.rs
index 8705eec0d..fe13b334c 100644
--- a/12_integrated_testing/kernel/src/print.rs
+++ b/12_integrated_testing/kernel/src/print.rs
@@ -39,8 +39,6 @@ macro_rules! println {
 #[macro_export]
 macro_rules! info {
     ($string:expr) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -50,8 +48,6 @@ macro_rules! info {
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -67,8 +63,6 @@ macro_rules! info {
 #[macro_export]
 macro_rules! warn {
     ($string:expr) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -78,8 +72,6 @@ macro_rules! warn {
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
diff --git a/12_integrated_testing/kernel/src/time.rs b/12_integrated_testing/kernel/src/time.rs
index 6d92b1966..a6c0c5b6b 100644
--- a/12_integrated_testing/kernel/src/time.rs
+++ b/12_integrated_testing/kernel/src/time.rs
@@ -8,30 +8,50 @@
 #[path = "_arch/aarch64/time.rs"]
 mod arch_time;
 
+use core::time::Duration;
+
 //--------------------------------------------------------------------------------------------------
-// Architectural Public Reexports
+// Public Definitions
 //--------------------------------------------------------------------------------------------------
-pub use arch_time::time_manager;
+
+/// Provides time management functions.
+pub struct TimeManager;
 
 //--------------------------------------------------------------------------------------------------
-// Public Definitions
+// Global instances
 //--------------------------------------------------------------------------------------------------
 
-/// Timekeeping interfaces.
-pub mod interface {
-    use core::time::Duration;
+static TIME_MANAGER: TimeManager = TimeManager::new();
 
-    /// Time management functions.
-    pub trait TimeManager {
-        /// The timer's resolution.
-        fn resolution(&self) -> Duration;
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
 
-        /// The uptime since power-on of the device.
-        ///
-        /// This includes time consumed by firmware and bootloaders.
-        fn uptime(&self) -> Duration;
+/// Return a reference to the global TimeManager.
+pub fn time_manager() -> &'static TimeManager {
+    &TIME_MANAGER
+}
+
+impl TimeManager {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self
+    }
+
+    /// The timer's resolution.
+    pub fn resolution(&self) -> Duration {
+        arch_time::resolution()
+    }
+
+    /// The uptime since power-on of the device.
+    ///
+    /// This includes time consumed by firmware and bootloaders.
+    pub fn uptime(&self) -> Duration {
+        arch_time::uptime()
+    }
 
-        /// Spin for a given duration.
-        fn spin_for(&self, duration: Duration);
+    /// Spin for a given duration.
+    pub fn spin_for(&self, duration: Duration) {
+        arch_time::spin_for(duration)
     }
 }
diff --git a/12_integrated_testing/kernel/tests/01_timer_sanity.rs b/12_integrated_testing/kernel/tests/01_timer_sanity.rs
index 390cdee53..a0eb732bb 100644
--- a/12_integrated_testing/kernel/tests/01_timer_sanity.rs
+++ b/12_integrated_testing/kernel/tests/01_timer_sanity.rs
@@ -11,7 +11,7 @@
 #![test_runner(libkernel::test_runner)]
 
 use core::time::Duration;
-use libkernel::{bsp, cpu, driver, exception, time, time::interface::TimeManager};
+use libkernel::{bsp, cpu, driver, exception, time};
 use test_macros::kernel_test;
 
 #[no_mangle]
@@ -37,6 +37,7 @@ fn timer_is_counting() {
 /// Timer resolution must be sufficient.
 #[kernel_test]
 fn timer_resolution_is_sufficient() {
+    assert!(time::time_manager().resolution().as_nanos() > 0);
     assert!(time::time_manager().resolution().as_nanos() < 100)
 }
 
diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index 77bcc2f25..3b7a8f64c 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -2385,7 +2385,7 @@ diff -uNr 12_integrated_testing/kernel/src/exception/asynchronous.rs 13_exceptio
 diff -uNr 12_integrated_testing/kernel/src/lib.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
 --- 12_integrated_testing/kernel/src/lib.rs
 +++ 13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
-@@ -135,6 +135,7 @@
+@@ -138,6 +138,7 @@
  pub mod exception;
  pub mod memory;
  pub mod print;
@@ -2474,10 +2474,10 @@ diff -uNr 12_integrated_testing/kernel/src/panic_wait.rs 13_exceptions_part2_per
  use core::panic::PanicInfo;
 
  //--------------------------------------------------------------------------------------------------
-@@ -61,6 +61,8 @@
- fn panic(info: &PanicInfo) -> ! {
-     use crate::time::interface::TimeManager;
+@@ -59,6 +59,8 @@
 
+ #[panic_handler]
+ fn panic(info: &PanicInfo) -> ! {
 +    exception::asynchronous::local_irq_mask();
 +
      // Protect against panic infinite loops if any of the following code panics itself.
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/boot.s b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/boot.s
index 7576dc145..f6df21236 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/boot.s
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/boot.s
@@ -57,6 +57,14 @@ _start:
 	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
 
+	// Read the CPU's timer counter frequency and store it in ARCH_TIMER_COUNTER_FREQUENCY.
+	// Abort if the frequency read back as 0.
+	ADR_REL	x1, ARCH_TIMER_COUNTER_FREQUENCY // provided by aarch64/time.rs
+	mrs	x2, CNTFRQ_EL0
+	cmp	x2, xzr
+	b.eq	.L_parking_loop
+	str	w2, [x1]
+
 	// Jump to Rust code. x0 holds the function argument provided to _start_rust().
 	b	_start_rust
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/time.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/time.rs
index c814219ca..255a5a45d 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/time.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/time.rs
@@ -11,111 +11,152 @@
 //!
 //! crate::time::arch_time
 
-use crate::{time, warn};
-use core::time::Duration;
+use crate::warn;
+use core::{
+    num::{NonZeroU128, NonZeroU32, NonZeroU64},
+    ops::{Add, Div},
+    time::Duration,
+};
 use cortex_a::{asm::barrier, registers::*};
-use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
+use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
-const NS_PER_S: u64 = 1_000_000_000;
+const NANOSEC_PER_SEC: NonZeroU64 = NonZeroU64::new(1_000_000_000).unwrap();
 
-/// ARMv8 Generic Timer.
-struct GenericTimer;
+#[derive(Copy, Clone, PartialOrd, PartialEq)]
+struct GenericTimerCounterValue(u64);
 
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
-static TIME_MANAGER: GenericTimer = GenericTimer;
+/// Boot assembly code overwrites this value with the value of CNTFRQ_EL0 before any Rust code is
+/// executed. This given value here is just a (safe) dummy.
+#[no_mangle]
+static ARCH_TIMER_COUNTER_FREQUENCY: NonZeroU32 = NonZeroU32::MIN;
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-impl GenericTimer {
-    #[inline(always)]
-    fn read_cntpct(&self) -> u64 {
-        // Prevent that the counter is read ahead of time due to out-of-order execution.
-        unsafe { barrier::isb(barrier::SY) };
-        CNTPCT_EL0.get()
-    }
+impl GenericTimerCounterValue {
+    pub const MAX: Self = GenericTimerCounterValue(u64::MAX);
 }
 
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
+impl Add for GenericTimerCounterValue {
+    type Output = Self;
 
-/// Return a reference to the time manager.
-pub fn time_manager() -> &'static impl time::interface::TimeManager {
-    &TIME_MANAGER
+    fn add(self, other: Self) -> Self {
+        GenericTimerCounterValue(self.0.wrapping_add(other.0))
+    }
 }
 
-//------------------------------------------------------------------------------
-// OS Interface Code
-//------------------------------------------------------------------------------
+impl From<GenericTimerCounterValue> for Duration {
+    fn from(counter_value: GenericTimerCounterValue) -> Self {
+        if counter_value.0 == 0 {
+            return Duration::ZERO;
+        }
 
-impl time::interface::TimeManager for GenericTimer {
-    fn resolution(&self) -> Duration {
-        Duration::from_nanos(NS_PER_S / (CNTFRQ_EL0.get() as u64))
+        // Read volatile is needed here to prevent the compiler from optimizing
+        // ARCH_TIMER_COUNTER_FREQUENCY away.
+        //
+        // This is safe, because all the safety requirements as stated in read_volatile()'s
+        // documentation are fulfilled.
+        let frequency: NonZeroU64 =
+            unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }.into();
+
+        // Div<NonZeroU64> implementation for u64 cannot panic.
+        let secs = counter_value.0.div(frequency);
+
+        // This is safe, because frequency can never be greater than u32::MAX, which means the
+        // largest theoretical value for sub_second_counter_value is (u32::MAX - 1). Therefore,
+        // (sub_second_counter_value * NANOSEC_PER_SEC) cannot overflow an u64.
+        //
+        // The subsequent division ensures the result fits into u32, since the max result is smaller
+        // than NANOSEC_PER_SEC. Therefore, just cast it to u32 using `as`.
+        let sub_second_counter_value = counter_value.0 % frequency;
+        let nanos = unsafe { sub_second_counter_value.unchecked_mul(u64::from(NANOSEC_PER_SEC)) }
+            .div(frequency) as u32;
+
+        Duration::new(secs, nanos)
     }
+}
 
-    fn uptime(&self) -> Duration {
-        let current_count: u64 = self.read_cntpct() * NS_PER_S;
-        let frq: u64 = CNTFRQ_EL0.get() as u64;
+fn max_duration() -> Duration {
+    Duration::from(GenericTimerCounterValue::MAX)
+}
 
-        Duration::from_nanos(current_count / frq)
-    }
+impl TryFrom<Duration> for GenericTimerCounterValue {
+    type Error = &'static str;
 
-    fn spin_for(&self, duration: Duration) {
-        // Instantly return on zero.
-        if duration.as_nanos() == 0 {
-            return;
+    fn try_from(duration: Duration) -> Result<Self, Self::Error> {
+        if duration < resolution() {
+            return Ok(GenericTimerCounterValue(0));
         }
 
-        // Calculate the register compare value.
-        let frq = CNTFRQ_EL0.get();
-        let x = match frq.checked_mul(duration.as_nanos() as u64) {
-            #[allow(unused_imports)]
-            None => {
-                warn!("Spin duration too long, skipping");
-                return;
-            }
-            Some(val) => val,
-        };
-        let tval = x / NS_PER_S;
-
-        // Check if it is within supported bounds.
-        let warn: Option<&str> = if tval == 0 {
-            Some("smaller")
-        // The upper 32 bits of CNTP_TVAL_EL0 are reserved.
-        } else if tval > u32::max_value().into() {
-            Some("bigger")
-        } else {
-            None
-        };
-
-        #[allow(unused_imports)]
-        if let Some(w) = warn {
-            warn!(
-                "Spin duration {} than architecturally supported, skipping",
-                w
-            );
-            return;
+        if duration > max_duration() {
+            return Err("Conversion error. Duration too big");
         }
 
-        // Set the compare value register.
-        CNTP_TVAL_EL0.set(tval);
+        // This is safe, because all the safety requirements as stated in read_volatile()'s
+        // documentation are fulfilled.
+        let frequency: u128 =
+            unsafe { u32::from(core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY)) as u128 };
+        let duration: u128 = duration.as_nanos();
 
-        // Kick off the counting.                       // Disable timer interrupt.
-        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::SET + CNTP_CTL_EL0::IMASK::SET);
+        // This is safe, because frequency can never be greater than u32::MAX, and
+        // (Duration::MAX.as_nanos() * u32::MAX) < u128::MAX.
+        let counter_value =
+            unsafe { duration.unchecked_mul(frequency) }.div(NonZeroU128::from(NANOSEC_PER_SEC));
 
-        // ISTATUS will be '1' when cval ticks have passed. Busy-check it.
-        while !CNTP_CTL_EL0.matches_all(CNTP_CTL_EL0::ISTATUS::SET) {}
-
-        // Disable counting again.
-        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::CLEAR);
+        // Since we checked above that we are <= max_duration(), just cast to u64.
+        Ok(GenericTimerCounterValue(counter_value as u64))
     }
 }
+
+#[inline(always)]
+fn read_cntpct() -> GenericTimerCounterValue {
+    // Prevent that the counter is read ahead of time due to out-of-order execution.
+    unsafe { barrier::isb(barrier::SY) };
+    let cnt = CNTPCT_EL0.get();
+
+    GenericTimerCounterValue(cnt)
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The timer's resolution.
+pub fn resolution() -> Duration {
+    Duration::from(GenericTimerCounterValue(1))
+}
+
+/// The uptime since power-on of the device.
+///
+/// This includes time consumed by firmware and bootloaders.
+pub fn uptime() -> Duration {
+    read_cntpct().into()
+}
+
+/// Spin for a given duration.
+pub fn spin_for(duration: Duration) {
+    let curr_counter_value = read_cntpct();
+
+    let counter_value_delta: GenericTimerCounterValue = match duration.try_into() {
+        Err(msg) => {
+            warn!("spin_for: {}. Skipping", msg);
+            return;
+        }
+        Ok(val) => val,
+    };
+    let counter_value_target = curr_counter_value + counter_value_delta;
+
+    // Busy wait.
+    //
+    // Read CNTPCT_EL0 directly to avoid the ISB that is part of [`read_cntpct`].
+    while GenericTimerCounterValue(CNTPCT_EL0.get()) < counter_value_target {}
+}
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index b5603b404..0f3e701fc 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -140,7 +140,7 @@ impl GPIOInner {
     /// Disable pull-up/down on pins 14 and 15.
     #[cfg(feature = "bsp_rpi3")]
     fn disable_pud_14_15_bcm2837(&mut self) {
-        use crate::{time, time::interface::TimeManager};
+        use crate::time;
         use core::time::Duration;
 
         // The Linux 2837 GPIO driver waits 1 µs between the steps.
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
index 6c5bc6b32..194e24558 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
@@ -111,12 +111,15 @@
 #![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
 #![feature(asm_const)]
+#![feature(const_option)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(int_roundings)]
 #![feature(linkage)]
+#![feature(nonzero_min_max)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
+#![feature(unchecked_math)]
 #![no_std]
 // Testing
 #![cfg_attr(test, no_main)]
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/panic_wait.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/panic_wait.rs
index 618312133..ae4651e7f 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/panic_wait.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/panic_wait.rs
@@ -59,8 +59,6 @@ fn panic_prevent_reenter() {
 
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
-    use crate::time::interface::TimeManager;
-
     exception::asynchronous::local_irq_mask();
 
     // Protect against panic infinite loops if any of the following code panics itself.
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/print.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/print.rs
index 8705eec0d..fe13b334c 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/print.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/print.rs
@@ -39,8 +39,6 @@ macro_rules! println {
 #[macro_export]
 macro_rules! info {
     ($string:expr) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -50,8 +48,6 @@ macro_rules! info {
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -67,8 +63,6 @@ macro_rules! info {
 #[macro_export]
 macro_rules! warn {
     ($string:expr) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -78,8 +72,6 @@ macro_rules! warn {
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/time.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/time.rs
index 6d92b1966..a6c0c5b6b 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/time.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/time.rs
@@ -8,30 +8,50 @@
 #[path = "_arch/aarch64/time.rs"]
 mod arch_time;
 
+use core::time::Duration;
+
 //--------------------------------------------------------------------------------------------------
-// Architectural Public Reexports
+// Public Definitions
 //--------------------------------------------------------------------------------------------------
-pub use arch_time::time_manager;
+
+/// Provides time management functions.
+pub struct TimeManager;
 
 //--------------------------------------------------------------------------------------------------
-// Public Definitions
+// Global instances
 //--------------------------------------------------------------------------------------------------
 
-/// Timekeeping interfaces.
-pub mod interface {
-    use core::time::Duration;
+static TIME_MANAGER: TimeManager = TimeManager::new();
 
-    /// Time management functions.
-    pub trait TimeManager {
-        /// The timer's resolution.
-        fn resolution(&self) -> Duration;
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
 
-        /// The uptime since power-on of the device.
-        ///
-        /// This includes time consumed by firmware and bootloaders.
-        fn uptime(&self) -> Duration;
+/// Return a reference to the global TimeManager.
+pub fn time_manager() -> &'static TimeManager {
+    &TIME_MANAGER
+}
+
+impl TimeManager {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self
+    }
+
+    /// The timer's resolution.
+    pub fn resolution(&self) -> Duration {
+        arch_time::resolution()
+    }
+
+    /// The uptime since power-on of the device.
+    ///
+    /// This includes time consumed by firmware and bootloaders.
+    pub fn uptime(&self) -> Duration {
+        arch_time::uptime()
+    }
 
-        /// Spin for a given duration.
-        fn spin_for(&self, duration: Duration);
+    /// Spin for a given duration.
+    pub fn spin_for(&self, duration: Duration) {
+        arch_time::spin_for(duration)
     }
 }
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/tests/01_timer_sanity.rs b/13_exceptions_part2_peripheral_IRQs/kernel/tests/01_timer_sanity.rs
index 390cdee53..a0eb732bb 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/tests/01_timer_sanity.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/tests/01_timer_sanity.rs
@@ -11,7 +11,7 @@
 #![test_runner(libkernel::test_runner)]
 
 use core::time::Duration;
-use libkernel::{bsp, cpu, driver, exception, time, time::interface::TimeManager};
+use libkernel::{bsp, cpu, driver, exception, time};
 use test_macros::kernel_test;
 
 #[no_mangle]
@@ -37,6 +37,7 @@ fn timer_is_counting() {
 /// Timer resolution must be sufficient.
 #[kernel_test]
 fn timer_resolution_is_sufficient() {
+    assert!(time::time_manager().resolution().as_nanos() > 0);
     assert!(time::time_manager().resolution().as_nanos() < 100)
 }
 
diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index c6ef13f79..7dc0c7a36 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -2326,20 +2326,21 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs 14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
-@@ -113,9 +113,12 @@
- #![feature(asm_const)]
+@@ -114,10 +114,13 @@
+ #![feature(const_option)]
  #![feature(core_intrinsics)]
  #![feature(format_args_nl)]
 +#![feature(generic_const_exprs)]
  #![feature(int_roundings)]
 +#![feature(is_sorted)]
  #![feature(linkage)]
+ #![feature(nonzero_min_max)]
  #![feature(panic_info_message)]
 +#![feature(step_trait)]
  #![feature(trait_alias)]
+ #![feature(unchecked_math)]
  #![no_std]
- // Testing
-@@ -183,6 +186,17 @@
+@@ -186,6 +189,17 @@
      use driver::interface::DriverManager;
 
      exception::handling_init();
@@ -3821,8 +3822,8 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/tests/01_timer_sanity.rs 14
  #![test_runner(libkernel::test_runner)]
 
  use core::time::Duration;
--use libkernel::{bsp, cpu, driver, exception, time, time::interface::TimeManager};
-+use libkernel::{bsp, cpu, driver, exception, memory, time, time::interface::TimeManager};
+-use libkernel::{bsp, cpu, driver, exception, time};
++use libkernel::{bsp, cpu, driver, exception, memory, time};
  use test_macros::kernel_test;
 
  #[no_mangle]
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.s b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.s
index 7576dc145..f6df21236 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.s
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.s
@@ -57,6 +57,14 @@ _start:
 	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
 
+	// Read the CPU's timer counter frequency and store it in ARCH_TIMER_COUNTER_FREQUENCY.
+	// Abort if the frequency read back as 0.
+	ADR_REL	x1, ARCH_TIMER_COUNTER_FREQUENCY // provided by aarch64/time.rs
+	mrs	x2, CNTFRQ_EL0
+	cmp	x2, xzr
+	b.eq	.L_parking_loop
+	str	w2, [x1]
+
 	// Jump to Rust code. x0 holds the function argument provided to _start_rust().
 	b	_start_rust
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/time.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/time.rs
index c814219ca..255a5a45d 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/time.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/time.rs
@@ -11,111 +11,152 @@
 //!
 //! crate::time::arch_time
 
-use crate::{time, warn};
-use core::time::Duration;
+use crate::warn;
+use core::{
+    num::{NonZeroU128, NonZeroU32, NonZeroU64},
+    ops::{Add, Div},
+    time::Duration,
+};
 use cortex_a::{asm::barrier, registers::*};
-use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
+use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
-const NS_PER_S: u64 = 1_000_000_000;
+const NANOSEC_PER_SEC: NonZeroU64 = NonZeroU64::new(1_000_000_000).unwrap();
 
-/// ARMv8 Generic Timer.
-struct GenericTimer;
+#[derive(Copy, Clone, PartialOrd, PartialEq)]
+struct GenericTimerCounterValue(u64);
 
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
-static TIME_MANAGER: GenericTimer = GenericTimer;
+/// Boot assembly code overwrites this value with the value of CNTFRQ_EL0 before any Rust code is
+/// executed. This given value here is just a (safe) dummy.
+#[no_mangle]
+static ARCH_TIMER_COUNTER_FREQUENCY: NonZeroU32 = NonZeroU32::MIN;
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-impl GenericTimer {
-    #[inline(always)]
-    fn read_cntpct(&self) -> u64 {
-        // Prevent that the counter is read ahead of time due to out-of-order execution.
-        unsafe { barrier::isb(barrier::SY) };
-        CNTPCT_EL0.get()
-    }
+impl GenericTimerCounterValue {
+    pub const MAX: Self = GenericTimerCounterValue(u64::MAX);
 }
 
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
+impl Add for GenericTimerCounterValue {
+    type Output = Self;
 
-/// Return a reference to the time manager.
-pub fn time_manager() -> &'static impl time::interface::TimeManager {
-    &TIME_MANAGER
+    fn add(self, other: Self) -> Self {
+        GenericTimerCounterValue(self.0.wrapping_add(other.0))
+    }
 }
 
-//------------------------------------------------------------------------------
-// OS Interface Code
-//------------------------------------------------------------------------------
+impl From<GenericTimerCounterValue> for Duration {
+    fn from(counter_value: GenericTimerCounterValue) -> Self {
+        if counter_value.0 == 0 {
+            return Duration::ZERO;
+        }
 
-impl time::interface::TimeManager for GenericTimer {
-    fn resolution(&self) -> Duration {
-        Duration::from_nanos(NS_PER_S / (CNTFRQ_EL0.get() as u64))
+        // Read volatile is needed here to prevent the compiler from optimizing
+        // ARCH_TIMER_COUNTER_FREQUENCY away.
+        //
+        // This is safe, because all the safety requirements as stated in read_volatile()'s
+        // documentation are fulfilled.
+        let frequency: NonZeroU64 =
+            unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }.into();
+
+        // Div<NonZeroU64> implementation for u64 cannot panic.
+        let secs = counter_value.0.div(frequency);
+
+        // This is safe, because frequency can never be greater than u32::MAX, which means the
+        // largest theoretical value for sub_second_counter_value is (u32::MAX - 1). Therefore,
+        // (sub_second_counter_value * NANOSEC_PER_SEC) cannot overflow an u64.
+        //
+        // The subsequent division ensures the result fits into u32, since the max result is smaller
+        // than NANOSEC_PER_SEC. Therefore, just cast it to u32 using `as`.
+        let sub_second_counter_value = counter_value.0 % frequency;
+        let nanos = unsafe { sub_second_counter_value.unchecked_mul(u64::from(NANOSEC_PER_SEC)) }
+            .div(frequency) as u32;
+
+        Duration::new(secs, nanos)
     }
+}
 
-    fn uptime(&self) -> Duration {
-        let current_count: u64 = self.read_cntpct() * NS_PER_S;
-        let frq: u64 = CNTFRQ_EL0.get() as u64;
+fn max_duration() -> Duration {
+    Duration::from(GenericTimerCounterValue::MAX)
+}
 
-        Duration::from_nanos(current_count / frq)
-    }
+impl TryFrom<Duration> for GenericTimerCounterValue {
+    type Error = &'static str;
 
-    fn spin_for(&self, duration: Duration) {
-        // Instantly return on zero.
-        if duration.as_nanos() == 0 {
-            return;
+    fn try_from(duration: Duration) -> Result<Self, Self::Error> {
+        if duration < resolution() {
+            return Ok(GenericTimerCounterValue(0));
         }
 
-        // Calculate the register compare value.
-        let frq = CNTFRQ_EL0.get();
-        let x = match frq.checked_mul(duration.as_nanos() as u64) {
-            #[allow(unused_imports)]
-            None => {
-                warn!("Spin duration too long, skipping");
-                return;
-            }
-            Some(val) => val,
-        };
-        let tval = x / NS_PER_S;
-
-        // Check if it is within supported bounds.
-        let warn: Option<&str> = if tval == 0 {
-            Some("smaller")
-        // The upper 32 bits of CNTP_TVAL_EL0 are reserved.
-        } else if tval > u32::max_value().into() {
-            Some("bigger")
-        } else {
-            None
-        };
-
-        #[allow(unused_imports)]
-        if let Some(w) = warn {
-            warn!(
-                "Spin duration {} than architecturally supported, skipping",
-                w
-            );
-            return;
+        if duration > max_duration() {
+            return Err("Conversion error. Duration too big");
         }
 
-        // Set the compare value register.
-        CNTP_TVAL_EL0.set(tval);
+        // This is safe, because all the safety requirements as stated in read_volatile()'s
+        // documentation are fulfilled.
+        let frequency: u128 =
+            unsafe { u32::from(core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY)) as u128 };
+        let duration: u128 = duration.as_nanos();
 
-        // Kick off the counting.                       // Disable timer interrupt.
-        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::SET + CNTP_CTL_EL0::IMASK::SET);
+        // This is safe, because frequency can never be greater than u32::MAX, and
+        // (Duration::MAX.as_nanos() * u32::MAX) < u128::MAX.
+        let counter_value =
+            unsafe { duration.unchecked_mul(frequency) }.div(NonZeroU128::from(NANOSEC_PER_SEC));
 
-        // ISTATUS will be '1' when cval ticks have passed. Busy-check it.
-        while !CNTP_CTL_EL0.matches_all(CNTP_CTL_EL0::ISTATUS::SET) {}
-
-        // Disable counting again.
-        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::CLEAR);
+        // Since we checked above that we are <= max_duration(), just cast to u64.
+        Ok(GenericTimerCounterValue(counter_value as u64))
     }
 }
+
+#[inline(always)]
+fn read_cntpct() -> GenericTimerCounterValue {
+    // Prevent that the counter is read ahead of time due to out-of-order execution.
+    unsafe { barrier::isb(barrier::SY) };
+    let cnt = CNTPCT_EL0.get();
+
+    GenericTimerCounterValue(cnt)
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The timer's resolution.
+pub fn resolution() -> Duration {
+    Duration::from(GenericTimerCounterValue(1))
+}
+
+/// The uptime since power-on of the device.
+///
+/// This includes time consumed by firmware and bootloaders.
+pub fn uptime() -> Duration {
+    read_cntpct().into()
+}
+
+/// Spin for a given duration.
+pub fn spin_for(duration: Duration) {
+    let curr_counter_value = read_cntpct();
+
+    let counter_value_delta: GenericTimerCounterValue = match duration.try_into() {
+        Err(msg) => {
+            warn!("spin_for: {}. Skipping", msg);
+            return;
+        }
+        Ok(val) => val,
+    };
+    let counter_value_target = curr_counter_value + counter_value_delta;
+
+    // Busy wait.
+    //
+    // Read CNTPCT_EL0 directly to avoid the ISB that is part of [`read_cntpct`].
+    while GenericTimerCounterValue(CNTPCT_EL0.get()) < counter_value_target {}
+}
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index a3361c2cc..2281e66a3 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -144,7 +144,7 @@ impl GPIOInner {
     /// Disable pull-up/down on pins 14 and 15.
     #[cfg(feature = "bsp_rpi3")]
     fn disable_pud_14_15_bcm2837(&mut self) {
-        use crate::{time, time::interface::TimeManager};
+        use crate::time;
         use core::time::Duration;
 
         // The Linux 2837 GPIO driver waits 1 µs between the steps.
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
index c40cb4e7b..22fb5fea0 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
@@ -111,15 +111,18 @@
 #![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
 #![feature(asm_const)]
+#![feature(const_option)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(generic_const_exprs)]
 #![feature(int_roundings)]
 #![feature(is_sorted)]
 #![feature(linkage)]
+#![feature(nonzero_min_max)]
 #![feature(panic_info_message)]
 #![feature(step_trait)]
 #![feature(trait_alias)]
+#![feature(unchecked_math)]
 #![no_std]
 // Testing
 #![cfg_attr(test, no_main)]
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/panic_wait.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/panic_wait.rs
index 618312133..ae4651e7f 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/panic_wait.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/panic_wait.rs
@@ -59,8 +59,6 @@ fn panic_prevent_reenter() {
 
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
-    use crate::time::interface::TimeManager;
-
     exception::asynchronous::local_irq_mask();
 
     // Protect against panic infinite loops if any of the following code panics itself.
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/print.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/print.rs
index 8705eec0d..fe13b334c 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/print.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/print.rs
@@ -39,8 +39,6 @@ macro_rules! println {
 #[macro_export]
 macro_rules! info {
     ($string:expr) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -50,8 +48,6 @@ macro_rules! info {
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -67,8 +63,6 @@ macro_rules! info {
 #[macro_export]
 macro_rules! warn {
     ($string:expr) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -78,8 +72,6 @@ macro_rules! warn {
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/time.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/time.rs
index 6d92b1966..a6c0c5b6b 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/time.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/time.rs
@@ -8,30 +8,50 @@
 #[path = "_arch/aarch64/time.rs"]
 mod arch_time;
 
+use core::time::Duration;
+
 //--------------------------------------------------------------------------------------------------
-// Architectural Public Reexports
+// Public Definitions
 //--------------------------------------------------------------------------------------------------
-pub use arch_time::time_manager;
+
+/// Provides time management functions.
+pub struct TimeManager;
 
 //--------------------------------------------------------------------------------------------------
-// Public Definitions
+// Global instances
 //--------------------------------------------------------------------------------------------------
 
-/// Timekeeping interfaces.
-pub mod interface {
-    use core::time::Duration;
+static TIME_MANAGER: TimeManager = TimeManager::new();
 
-    /// Time management functions.
-    pub trait TimeManager {
-        /// The timer's resolution.
-        fn resolution(&self) -> Duration;
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
 
-        /// The uptime since power-on of the device.
-        ///
-        /// This includes time consumed by firmware and bootloaders.
-        fn uptime(&self) -> Duration;
+/// Return a reference to the global TimeManager.
+pub fn time_manager() -> &'static TimeManager {
+    &TIME_MANAGER
+}
+
+impl TimeManager {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self
+    }
+
+    /// The timer's resolution.
+    pub fn resolution(&self) -> Duration {
+        arch_time::resolution()
+    }
+
+    /// The uptime since power-on of the device.
+    ///
+    /// This includes time consumed by firmware and bootloaders.
+    pub fn uptime(&self) -> Duration {
+        arch_time::uptime()
+    }
 
-        /// Spin for a given duration.
-        fn spin_for(&self, duration: Duration);
+    /// Spin for a given duration.
+    pub fn spin_for(&self, duration: Duration) {
+        arch_time::spin_for(duration)
     }
 }
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/tests/01_timer_sanity.rs b/14_virtual_mem_part2_mmio_remap/kernel/tests/01_timer_sanity.rs
index dc3337e29..dd34b06c7 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/tests/01_timer_sanity.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/tests/01_timer_sanity.rs
@@ -11,7 +11,7 @@
 #![test_runner(libkernel::test_runner)]
 
 use core::time::Duration;
-use libkernel::{bsp, cpu, driver, exception, memory, time, time::interface::TimeManager};
+use libkernel::{bsp, cpu, driver, exception, memory, time};
 use test_macros::kernel_test;
 
 #[no_mangle]
@@ -48,6 +48,7 @@ fn timer_is_counting() {
 /// Timer resolution must be sufficient.
 #[kernel_test]
 fn timer_resolution_is_sufficient() {
+    assert!(time::time_manager().resolution().as_nanos() > 0);
     assert!(time::time_manager().resolution().as_nanos() < 100)
 }
 
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index 25c26c0af..a6ebe3321 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -841,7 +841,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.rs 1
 diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.s 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.s
 --- 14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.s
 +++ 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.s
-@@ -53,11 +53,14 @@
+@@ -53,19 +53,22 @@
 
  	// Prepare the jump to Rust code.
  .L_prepare_rust:
@@ -854,6 +854,18 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.s 15
 +	ADR_REL	x1, __boot_core_stack_end_exclusive
 +	mov	sp, x1
 
+ 	// Read the CPU's timer counter frequency and store it in ARCH_TIMER_COUNTER_FREQUENCY.
+ 	// Abort if the frequency read back as 0.
+-	ADR_REL	x1, ARCH_TIMER_COUNTER_FREQUENCY // provided by aarch64/time.rs
+-	mrs	x2, CNTFRQ_EL0
+-	cmp	x2, xzr
++	ADR_REL	x2, ARCH_TIMER_COUNTER_FREQUENCY // provided by aarch64/time.rs
++	mrs	x3, CNTFRQ_EL0
++	cmp	x3, xzr
+ 	b.eq	.L_parking_loop
+-	str	w2, [x1]
++	str	w3, [x2]
+
 -	// Jump to Rust code. x0 holds the function argument provided to _start_rust().
 +	// Jump to Rust code. x0 and x1 hold the function arguments provided to _start_rust().
  	b	_start_rust
@@ -1324,7 +1336,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/memory/mmu.
 diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs 15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs
 --- 14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
 +++ 15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs
-@@ -186,17 +186,7 @@
+@@ -189,17 +189,7 @@
      use driver::interface::DriverManager;
 
      exception::handling_init();
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.s b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.s
index dba8c88ee..48c3f8a70 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.s
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.s
@@ -60,6 +60,14 @@ _start:
 	ADR_REL	x1, __boot_core_stack_end_exclusive
 	mov	sp, x1
 
+	// Read the CPU's timer counter frequency and store it in ARCH_TIMER_COUNTER_FREQUENCY.
+	// Abort if the frequency read back as 0.
+	ADR_REL	x2, ARCH_TIMER_COUNTER_FREQUENCY // provided by aarch64/time.rs
+	mrs	x3, CNTFRQ_EL0
+	cmp	x3, xzr
+	b.eq	.L_parking_loop
+	str	w3, [x2]
+
 	// Jump to Rust code. x0 and x1 hold the function arguments provided to _start_rust().
 	b	_start_rust
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/time.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/time.rs
index c814219ca..255a5a45d 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/time.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/time.rs
@@ -11,111 +11,152 @@
 //!
 //! crate::time::arch_time
 
-use crate::{time, warn};
-use core::time::Duration;
+use crate::warn;
+use core::{
+    num::{NonZeroU128, NonZeroU32, NonZeroU64},
+    ops::{Add, Div},
+    time::Duration,
+};
 use cortex_a::{asm::barrier, registers::*};
-use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
+use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
-const NS_PER_S: u64 = 1_000_000_000;
+const NANOSEC_PER_SEC: NonZeroU64 = NonZeroU64::new(1_000_000_000).unwrap();
 
-/// ARMv8 Generic Timer.
-struct GenericTimer;
+#[derive(Copy, Clone, PartialOrd, PartialEq)]
+struct GenericTimerCounterValue(u64);
 
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
-static TIME_MANAGER: GenericTimer = GenericTimer;
+/// Boot assembly code overwrites this value with the value of CNTFRQ_EL0 before any Rust code is
+/// executed. This given value here is just a (safe) dummy.
+#[no_mangle]
+static ARCH_TIMER_COUNTER_FREQUENCY: NonZeroU32 = NonZeroU32::MIN;
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-impl GenericTimer {
-    #[inline(always)]
-    fn read_cntpct(&self) -> u64 {
-        // Prevent that the counter is read ahead of time due to out-of-order execution.
-        unsafe { barrier::isb(barrier::SY) };
-        CNTPCT_EL0.get()
-    }
+impl GenericTimerCounterValue {
+    pub const MAX: Self = GenericTimerCounterValue(u64::MAX);
 }
 
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
+impl Add for GenericTimerCounterValue {
+    type Output = Self;
 
-/// Return a reference to the time manager.
-pub fn time_manager() -> &'static impl time::interface::TimeManager {
-    &TIME_MANAGER
+    fn add(self, other: Self) -> Self {
+        GenericTimerCounterValue(self.0.wrapping_add(other.0))
+    }
 }
 
-//------------------------------------------------------------------------------
-// OS Interface Code
-//------------------------------------------------------------------------------
+impl From<GenericTimerCounterValue> for Duration {
+    fn from(counter_value: GenericTimerCounterValue) -> Self {
+        if counter_value.0 == 0 {
+            return Duration::ZERO;
+        }
 
-impl time::interface::TimeManager for GenericTimer {
-    fn resolution(&self) -> Duration {
-        Duration::from_nanos(NS_PER_S / (CNTFRQ_EL0.get() as u64))
+        // Read volatile is needed here to prevent the compiler from optimizing
+        // ARCH_TIMER_COUNTER_FREQUENCY away.
+        //
+        // This is safe, because all the safety requirements as stated in read_volatile()'s
+        // documentation are fulfilled.
+        let frequency: NonZeroU64 =
+            unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }.into();
+
+        // Div<NonZeroU64> implementation for u64 cannot panic.
+        let secs = counter_value.0.div(frequency);
+
+        // This is safe, because frequency can never be greater than u32::MAX, which means the
+        // largest theoretical value for sub_second_counter_value is (u32::MAX - 1). Therefore,
+        // (sub_second_counter_value * NANOSEC_PER_SEC) cannot overflow an u64.
+        //
+        // The subsequent division ensures the result fits into u32, since the max result is smaller
+        // than NANOSEC_PER_SEC. Therefore, just cast it to u32 using `as`.
+        let sub_second_counter_value = counter_value.0 % frequency;
+        let nanos = unsafe { sub_second_counter_value.unchecked_mul(u64::from(NANOSEC_PER_SEC)) }
+            .div(frequency) as u32;
+
+        Duration::new(secs, nanos)
     }
+}
 
-    fn uptime(&self) -> Duration {
-        let current_count: u64 = self.read_cntpct() * NS_PER_S;
-        let frq: u64 = CNTFRQ_EL0.get() as u64;
+fn max_duration() -> Duration {
+    Duration::from(GenericTimerCounterValue::MAX)
+}
 
-        Duration::from_nanos(current_count / frq)
-    }
+impl TryFrom<Duration> for GenericTimerCounterValue {
+    type Error = &'static str;
 
-    fn spin_for(&self, duration: Duration) {
-        // Instantly return on zero.
-        if duration.as_nanos() == 0 {
-            return;
+    fn try_from(duration: Duration) -> Result<Self, Self::Error> {
+        if duration < resolution() {
+            return Ok(GenericTimerCounterValue(0));
         }
 
-        // Calculate the register compare value.
-        let frq = CNTFRQ_EL0.get();
-        let x = match frq.checked_mul(duration.as_nanos() as u64) {
-            #[allow(unused_imports)]
-            None => {
-                warn!("Spin duration too long, skipping");
-                return;
-            }
-            Some(val) => val,
-        };
-        let tval = x / NS_PER_S;
-
-        // Check if it is within supported bounds.
-        let warn: Option<&str> = if tval == 0 {
-            Some("smaller")
-        // The upper 32 bits of CNTP_TVAL_EL0 are reserved.
-        } else if tval > u32::max_value().into() {
-            Some("bigger")
-        } else {
-            None
-        };
-
-        #[allow(unused_imports)]
-        if let Some(w) = warn {
-            warn!(
-                "Spin duration {} than architecturally supported, skipping",
-                w
-            );
-            return;
+        if duration > max_duration() {
+            return Err("Conversion error. Duration too big");
         }
 
-        // Set the compare value register.
-        CNTP_TVAL_EL0.set(tval);
+        // This is safe, because all the safety requirements as stated in read_volatile()'s
+        // documentation are fulfilled.
+        let frequency: u128 =
+            unsafe { u32::from(core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY)) as u128 };
+        let duration: u128 = duration.as_nanos();
 
-        // Kick off the counting.                       // Disable timer interrupt.
-        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::SET + CNTP_CTL_EL0::IMASK::SET);
+        // This is safe, because frequency can never be greater than u32::MAX, and
+        // (Duration::MAX.as_nanos() * u32::MAX) < u128::MAX.
+        let counter_value =
+            unsafe { duration.unchecked_mul(frequency) }.div(NonZeroU128::from(NANOSEC_PER_SEC));
 
-        // ISTATUS will be '1' when cval ticks have passed. Busy-check it.
-        while !CNTP_CTL_EL0.matches_all(CNTP_CTL_EL0::ISTATUS::SET) {}
-
-        // Disable counting again.
-        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::CLEAR);
+        // Since we checked above that we are <= max_duration(), just cast to u64.
+        Ok(GenericTimerCounterValue(counter_value as u64))
     }
 }
+
+#[inline(always)]
+fn read_cntpct() -> GenericTimerCounterValue {
+    // Prevent that the counter is read ahead of time due to out-of-order execution.
+    unsafe { barrier::isb(barrier::SY) };
+    let cnt = CNTPCT_EL0.get();
+
+    GenericTimerCounterValue(cnt)
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The timer's resolution.
+pub fn resolution() -> Duration {
+    Duration::from(GenericTimerCounterValue(1))
+}
+
+/// The uptime since power-on of the device.
+///
+/// This includes time consumed by firmware and bootloaders.
+pub fn uptime() -> Duration {
+    read_cntpct().into()
+}
+
+/// Spin for a given duration.
+pub fn spin_for(duration: Duration) {
+    let curr_counter_value = read_cntpct();
+
+    let counter_value_delta: GenericTimerCounterValue = match duration.try_into() {
+        Err(msg) => {
+            warn!("spin_for: {}. Skipping", msg);
+            return;
+        }
+        Ok(val) => val,
+    };
+    let counter_value_target = curr_counter_value + counter_value_delta;
+
+    // Busy wait.
+    //
+    // Read CNTPCT_EL0 directly to avoid the ISB that is part of [`read_cntpct`].
+    while GenericTimerCounterValue(CNTPCT_EL0.get()) < counter_value_target {}
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index a3361c2cc..2281e66a3 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -144,7 +144,7 @@ impl GPIOInner {
     /// Disable pull-up/down on pins 14 and 15.
     #[cfg(feature = "bsp_rpi3")]
     fn disable_pud_14_15_bcm2837(&mut self) {
-        use crate::{time, time::interface::TimeManager};
+        use crate::time;
         use core::time::Duration;
 
         // The Linux 2837 GPIO driver waits 1 µs between the steps.
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs
index a95778685..26c147d6e 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs
@@ -111,15 +111,18 @@
 #![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
 #![feature(asm_const)]
+#![feature(const_option)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(generic_const_exprs)]
 #![feature(int_roundings)]
 #![feature(is_sorted)]
 #![feature(linkage)]
+#![feature(nonzero_min_max)]
 #![feature(panic_info_message)]
 #![feature(step_trait)]
 #![feature(trait_alias)]
+#![feature(unchecked_math)]
 #![no_std]
 // Testing
 #![cfg_attr(test, no_main)]
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/panic_wait.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/panic_wait.rs
index 618312133..ae4651e7f 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/panic_wait.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/panic_wait.rs
@@ -59,8 +59,6 @@ fn panic_prevent_reenter() {
 
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
-    use crate::time::interface::TimeManager;
-
     exception::asynchronous::local_irq_mask();
 
     // Protect against panic infinite loops if any of the following code panics itself.
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/print.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/print.rs
index 8705eec0d..fe13b334c 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/print.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/print.rs
@@ -39,8 +39,6 @@ macro_rules! println {
 #[macro_export]
 macro_rules! info {
     ($string:expr) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -50,8 +48,6 @@ macro_rules! info {
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -67,8 +63,6 @@ macro_rules! info {
 #[macro_export]
 macro_rules! warn {
     ($string:expr) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -78,8 +72,6 @@ macro_rules! warn {
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/time.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/time.rs
index 6d92b1966..a6c0c5b6b 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/time.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/time.rs
@@ -8,30 +8,50 @@
 #[path = "_arch/aarch64/time.rs"]
 mod arch_time;
 
+use core::time::Duration;
+
 //--------------------------------------------------------------------------------------------------
-// Architectural Public Reexports
+// Public Definitions
 //--------------------------------------------------------------------------------------------------
-pub use arch_time::time_manager;
+
+/// Provides time management functions.
+pub struct TimeManager;
 
 //--------------------------------------------------------------------------------------------------
-// Public Definitions
+// Global instances
 //--------------------------------------------------------------------------------------------------
 
-/// Timekeeping interfaces.
-pub mod interface {
-    use core::time::Duration;
+static TIME_MANAGER: TimeManager = TimeManager::new();
 
-    /// Time management functions.
-    pub trait TimeManager {
-        /// The timer's resolution.
-        fn resolution(&self) -> Duration;
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
 
-        /// The uptime since power-on of the device.
-        ///
-        /// This includes time consumed by firmware and bootloaders.
-        fn uptime(&self) -> Duration;
+/// Return a reference to the global TimeManager.
+pub fn time_manager() -> &'static TimeManager {
+    &TIME_MANAGER
+}
+
+impl TimeManager {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self
+    }
+
+    /// The timer's resolution.
+    pub fn resolution(&self) -> Duration {
+        arch_time::resolution()
+    }
+
+    /// The uptime since power-on of the device.
+    ///
+    /// This includes time consumed by firmware and bootloaders.
+    pub fn uptime(&self) -> Duration {
+        arch_time::uptime()
+    }
 
-        /// Spin for a given duration.
-        fn spin_for(&self, duration: Duration);
+    /// Spin for a given duration.
+    pub fn spin_for(&self, duration: Duration) {
+        arch_time::spin_for(duration)
     }
 }
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/tests/01_timer_sanity.rs b/15_virtual_mem_part3_precomputed_tables/kernel/tests/01_timer_sanity.rs
index d5d76a5c1..398993324 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/tests/01_timer_sanity.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/tests/01_timer_sanity.rs
@@ -11,7 +11,7 @@
 #![test_runner(libkernel::test_runner)]
 
 use core::time::Duration;
-use libkernel::{bsp, cpu, driver, exception, memory, time, time::interface::TimeManager};
+use libkernel::{bsp, cpu, driver, exception, memory, time};
 use test_macros::kernel_test;
 
 #[no_mangle]
@@ -38,6 +38,7 @@ fn timer_is_counting() {
 /// Timer resolution must be sufficient.
 #[kernel_test]
 fn timer_resolution_is_sufficient() {
+    assert!(time::time_manager().resolution().as_nanos() > 0);
     assert!(time::time_manager().resolution().as_nanos() < 100)
 }
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/README.md b/16_virtual_mem_part4_higher_half_kernel/README.md
index 443c72238..6918f8973 100644
--- a/16_virtual_mem_part4_higher_half_kernel/README.md
+++ b/16_virtual_mem_part4_higher_half_kernel/README.md
@@ -412,7 +412,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/b
  //--------------------------------------------------------------------------------------------------
  // Public Code
  //--------------------------------------------------------------------------------------------------
-@@ -56,11 +68,23 @@
+@@ -56,19 +68,31 @@
  	// Load the base address of the kernel's translation tables.
  	ldr	x0, PHYS_KERNEL_TABLES_BASE_ADDR // provided by bsp/__board_name__/memory/mmu.rs
 
@@ -435,6 +435,18 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/b
 +	ADR_REL	x4, __boot_core_stack_end_exclusive
 +	mov	sp, x4
 
+ 	// Read the CPU's timer counter frequency and store it in ARCH_TIMER_COUNTER_FREQUENCY.
+ 	// Abort if the frequency read back as 0.
+-	ADR_REL	x2, ARCH_TIMER_COUNTER_FREQUENCY // provided by aarch64/time.rs
+-	mrs	x3, CNTFRQ_EL0
+-	cmp	x3, xzr
++	ADR_REL	x5, ARCH_TIMER_COUNTER_FREQUENCY // provided by aarch64/time.rs
++	mrs	x6, CNTFRQ_EL0
++	cmp	x6, xzr
+ 	b.eq	.L_parking_loop
+-	str	w3, [x2]
++	str	w6, [x5]
+
 -	// Jump to Rust code. x0 and x1 hold the function arguments provided to _start_rust().
 +	// Jump to Rust code. x0, x1 and x2 hold the function arguments provided to _start_rust().
  	b	_start_rust
@@ -731,7 +743,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/mem
 diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs 16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
 --- 15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs
 +++ 16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
-@@ -154,11 +154,6 @@
+@@ -157,11 +157,6 @@
      )
  }
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.s b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.s
index 8c70d035e..bf6e32e42 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.s
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.s
@@ -84,6 +84,14 @@ _start:
 	ADR_REL	x4, __boot_core_stack_end_exclusive
 	mov	sp, x4
 
+	// Read the CPU's timer counter frequency and store it in ARCH_TIMER_COUNTER_FREQUENCY.
+	// Abort if the frequency read back as 0.
+	ADR_REL	x5, ARCH_TIMER_COUNTER_FREQUENCY // provided by aarch64/time.rs
+	mrs	x6, CNTFRQ_EL0
+	cmp	x6, xzr
+	b.eq	.L_parking_loop
+	str	w6, [x5]
+
 	// Jump to Rust code. x0, x1 and x2 hold the function arguments provided to _start_rust().
 	b	_start_rust
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/time.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/time.rs
index c814219ca..255a5a45d 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/time.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/time.rs
@@ -11,111 +11,152 @@
 //!
 //! crate::time::arch_time
 
-use crate::{time, warn};
-use core::time::Duration;
+use crate::warn;
+use core::{
+    num::{NonZeroU128, NonZeroU32, NonZeroU64},
+    ops::{Add, Div},
+    time::Duration,
+};
 use cortex_a::{asm::barrier, registers::*};
-use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
+use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
-const NS_PER_S: u64 = 1_000_000_000;
+const NANOSEC_PER_SEC: NonZeroU64 = NonZeroU64::new(1_000_000_000).unwrap();
 
-/// ARMv8 Generic Timer.
-struct GenericTimer;
+#[derive(Copy, Clone, PartialOrd, PartialEq)]
+struct GenericTimerCounterValue(u64);
 
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
-static TIME_MANAGER: GenericTimer = GenericTimer;
+/// Boot assembly code overwrites this value with the value of CNTFRQ_EL0 before any Rust code is
+/// executed. This given value here is just a (safe) dummy.
+#[no_mangle]
+static ARCH_TIMER_COUNTER_FREQUENCY: NonZeroU32 = NonZeroU32::MIN;
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-impl GenericTimer {
-    #[inline(always)]
-    fn read_cntpct(&self) -> u64 {
-        // Prevent that the counter is read ahead of time due to out-of-order execution.
-        unsafe { barrier::isb(barrier::SY) };
-        CNTPCT_EL0.get()
-    }
+impl GenericTimerCounterValue {
+    pub const MAX: Self = GenericTimerCounterValue(u64::MAX);
 }
 
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
+impl Add for GenericTimerCounterValue {
+    type Output = Self;
 
-/// Return a reference to the time manager.
-pub fn time_manager() -> &'static impl time::interface::TimeManager {
-    &TIME_MANAGER
+    fn add(self, other: Self) -> Self {
+        GenericTimerCounterValue(self.0.wrapping_add(other.0))
+    }
 }
 
-//------------------------------------------------------------------------------
-// OS Interface Code
-//------------------------------------------------------------------------------
+impl From<GenericTimerCounterValue> for Duration {
+    fn from(counter_value: GenericTimerCounterValue) -> Self {
+        if counter_value.0 == 0 {
+            return Duration::ZERO;
+        }
 
-impl time::interface::TimeManager for GenericTimer {
-    fn resolution(&self) -> Duration {
-        Duration::from_nanos(NS_PER_S / (CNTFRQ_EL0.get() as u64))
+        // Read volatile is needed here to prevent the compiler from optimizing
+        // ARCH_TIMER_COUNTER_FREQUENCY away.
+        //
+        // This is safe, because all the safety requirements as stated in read_volatile()'s
+        // documentation are fulfilled.
+        let frequency: NonZeroU64 =
+            unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }.into();
+
+        // Div<NonZeroU64> implementation for u64 cannot panic.
+        let secs = counter_value.0.div(frequency);
+
+        // This is safe, because frequency can never be greater than u32::MAX, which means the
+        // largest theoretical value for sub_second_counter_value is (u32::MAX - 1). Therefore,
+        // (sub_second_counter_value * NANOSEC_PER_SEC) cannot overflow an u64.
+        //
+        // The subsequent division ensures the result fits into u32, since the max result is smaller
+        // than NANOSEC_PER_SEC. Therefore, just cast it to u32 using `as`.
+        let sub_second_counter_value = counter_value.0 % frequency;
+        let nanos = unsafe { sub_second_counter_value.unchecked_mul(u64::from(NANOSEC_PER_SEC)) }
+            .div(frequency) as u32;
+
+        Duration::new(secs, nanos)
     }
+}
 
-    fn uptime(&self) -> Duration {
-        let current_count: u64 = self.read_cntpct() * NS_PER_S;
-        let frq: u64 = CNTFRQ_EL0.get() as u64;
+fn max_duration() -> Duration {
+    Duration::from(GenericTimerCounterValue::MAX)
+}
 
-        Duration::from_nanos(current_count / frq)
-    }
+impl TryFrom<Duration> for GenericTimerCounterValue {
+    type Error = &'static str;
 
-    fn spin_for(&self, duration: Duration) {
-        // Instantly return on zero.
-        if duration.as_nanos() == 0 {
-            return;
+    fn try_from(duration: Duration) -> Result<Self, Self::Error> {
+        if duration < resolution() {
+            return Ok(GenericTimerCounterValue(0));
         }
 
-        // Calculate the register compare value.
-        let frq = CNTFRQ_EL0.get();
-        let x = match frq.checked_mul(duration.as_nanos() as u64) {
-            #[allow(unused_imports)]
-            None => {
-                warn!("Spin duration too long, skipping");
-                return;
-            }
-            Some(val) => val,
-        };
-        let tval = x / NS_PER_S;
-
-        // Check if it is within supported bounds.
-        let warn: Option<&str> = if tval == 0 {
-            Some("smaller")
-        // The upper 32 bits of CNTP_TVAL_EL0 are reserved.
-        } else if tval > u32::max_value().into() {
-            Some("bigger")
-        } else {
-            None
-        };
-
-        #[allow(unused_imports)]
-        if let Some(w) = warn {
-            warn!(
-                "Spin duration {} than architecturally supported, skipping",
-                w
-            );
-            return;
+        if duration > max_duration() {
+            return Err("Conversion error. Duration too big");
         }
 
-        // Set the compare value register.
-        CNTP_TVAL_EL0.set(tval);
+        // This is safe, because all the safety requirements as stated in read_volatile()'s
+        // documentation are fulfilled.
+        let frequency: u128 =
+            unsafe { u32::from(core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY)) as u128 };
+        let duration: u128 = duration.as_nanos();
 
-        // Kick off the counting.                       // Disable timer interrupt.
-        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::SET + CNTP_CTL_EL0::IMASK::SET);
+        // This is safe, because frequency can never be greater than u32::MAX, and
+        // (Duration::MAX.as_nanos() * u32::MAX) < u128::MAX.
+        let counter_value =
+            unsafe { duration.unchecked_mul(frequency) }.div(NonZeroU128::from(NANOSEC_PER_SEC));
 
-        // ISTATUS will be '1' when cval ticks have passed. Busy-check it.
-        while !CNTP_CTL_EL0.matches_all(CNTP_CTL_EL0::ISTATUS::SET) {}
-
-        // Disable counting again.
-        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::CLEAR);
+        // Since we checked above that we are <= max_duration(), just cast to u64.
+        Ok(GenericTimerCounterValue(counter_value as u64))
     }
 }
+
+#[inline(always)]
+fn read_cntpct() -> GenericTimerCounterValue {
+    // Prevent that the counter is read ahead of time due to out-of-order execution.
+    unsafe { barrier::isb(barrier::SY) };
+    let cnt = CNTPCT_EL0.get();
+
+    GenericTimerCounterValue(cnt)
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The timer's resolution.
+pub fn resolution() -> Duration {
+    Duration::from(GenericTimerCounterValue(1))
+}
+
+/// The uptime since power-on of the device.
+///
+/// This includes time consumed by firmware and bootloaders.
+pub fn uptime() -> Duration {
+    read_cntpct().into()
+}
+
+/// Spin for a given duration.
+pub fn spin_for(duration: Duration) {
+    let curr_counter_value = read_cntpct();
+
+    let counter_value_delta: GenericTimerCounterValue = match duration.try_into() {
+        Err(msg) => {
+            warn!("spin_for: {}. Skipping", msg);
+            return;
+        }
+        Ok(val) => val,
+    };
+    let counter_value_target = curr_counter_value + counter_value_delta;
+
+    // Busy wait.
+    //
+    // Read CNTPCT_EL0 directly to avoid the ISB that is part of [`read_cntpct`].
+    while GenericTimerCounterValue(CNTPCT_EL0.get()) < counter_value_target {}
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index a3361c2cc..2281e66a3 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -144,7 +144,7 @@ impl GPIOInner {
     /// Disable pull-up/down on pins 14 and 15.
     #[cfg(feature = "bsp_rpi3")]
     fn disable_pud_14_15_bcm2837(&mut self) {
-        use crate::{time, time::interface::TimeManager};
+        use crate::time;
         use core::time::Duration;
 
         // The Linux 2837 GPIO driver waits 1 µs between the steps.
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
index 1483c5a3a..59ef14ac9 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
@@ -111,15 +111,18 @@
 #![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
 #![feature(asm_const)]
+#![feature(const_option)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(generic_const_exprs)]
 #![feature(int_roundings)]
 #![feature(is_sorted)]
 #![feature(linkage)]
+#![feature(nonzero_min_max)]
 #![feature(panic_info_message)]
 #![feature(step_trait)]
 #![feature(trait_alias)]
+#![feature(unchecked_math)]
 #![no_std]
 // Testing
 #![cfg_attr(test, no_main)]
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/panic_wait.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/panic_wait.rs
index 618312133..ae4651e7f 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/panic_wait.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/panic_wait.rs
@@ -59,8 +59,6 @@ fn panic_prevent_reenter() {
 
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
-    use crate::time::interface::TimeManager;
-
     exception::asynchronous::local_irq_mask();
 
     // Protect against panic infinite loops if any of the following code panics itself.
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/print.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/print.rs
index 8705eec0d..fe13b334c 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/print.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/print.rs
@@ -39,8 +39,6 @@ macro_rules! println {
 #[macro_export]
 macro_rules! info {
     ($string:expr) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -50,8 +48,6 @@ macro_rules! info {
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -67,8 +63,6 @@ macro_rules! info {
 #[macro_export]
 macro_rules! warn {
     ($string:expr) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -78,8 +72,6 @@ macro_rules! warn {
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/time.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/time.rs
index 6d92b1966..a6c0c5b6b 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/time.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/time.rs
@@ -8,30 +8,50 @@
 #[path = "_arch/aarch64/time.rs"]
 mod arch_time;
 
+use core::time::Duration;
+
 //--------------------------------------------------------------------------------------------------
-// Architectural Public Reexports
+// Public Definitions
 //--------------------------------------------------------------------------------------------------
-pub use arch_time::time_manager;
+
+/// Provides time management functions.
+pub struct TimeManager;
 
 //--------------------------------------------------------------------------------------------------
-// Public Definitions
+// Global instances
 //--------------------------------------------------------------------------------------------------
 
-/// Timekeeping interfaces.
-pub mod interface {
-    use core::time::Duration;
+static TIME_MANAGER: TimeManager = TimeManager::new();
 
-    /// Time management functions.
-    pub trait TimeManager {
-        /// The timer's resolution.
-        fn resolution(&self) -> Duration;
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
 
-        /// The uptime since power-on of the device.
-        ///
-        /// This includes time consumed by firmware and bootloaders.
-        fn uptime(&self) -> Duration;
+/// Return a reference to the global TimeManager.
+pub fn time_manager() -> &'static TimeManager {
+    &TIME_MANAGER
+}
+
+impl TimeManager {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self
+    }
+
+    /// The timer's resolution.
+    pub fn resolution(&self) -> Duration {
+        arch_time::resolution()
+    }
+
+    /// The uptime since power-on of the device.
+    ///
+    /// This includes time consumed by firmware and bootloaders.
+    pub fn uptime(&self) -> Duration {
+        arch_time::uptime()
+    }
 
-        /// Spin for a given duration.
-        fn spin_for(&self, duration: Duration);
+    /// Spin for a given duration.
+    pub fn spin_for(&self, duration: Duration) {
+        arch_time::spin_for(duration)
     }
 }
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/01_timer_sanity.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/01_timer_sanity.rs
index d5d76a5c1..398993324 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/01_timer_sanity.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/01_timer_sanity.rs
@@ -11,7 +11,7 @@
 #![test_runner(libkernel::test_runner)]
 
 use core::time::Duration;
-use libkernel::{bsp, cpu, driver, exception, memory, time, time::interface::TimeManager};
+use libkernel::{bsp, cpu, driver, exception, memory, time};
 use test_macros::kernel_test;
 
 #[no_mangle]
@@ -38,6 +38,7 @@ fn timer_is_counting() {
 /// Timer resolution must be sufficient.
 #[kernel_test]
 fn timer_resolution_is_sufficient() {
+    assert!(time::time_manager().resolution().as_nanos() > 0);
     assert!(time::time_manager().resolution().as_nanos() < 100)
 }
 
diff --git a/17_kernel_symbols/README.md b/17_kernel_symbols/README.md
index ace1ed6ea..699cfe2cf 100644
--- a/17_kernel_symbols/README.md
+++ b/17_kernel_symbols/README.md
@@ -326,7 +326,7 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/mem
 diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs 17_kernel_symbols/kernel/src/lib.rs
 --- 16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
 +++ 17_kernel_symbols/kernel/src/lib.rs
-@@ -139,6 +139,7 @@
+@@ -142,6 +142,7 @@
  pub mod memory;
  pub mod print;
  pub mod state;
diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.s b/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.s
index 8c70d035e..bf6e32e42 100644
--- a/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.s
+++ b/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.s
@@ -84,6 +84,14 @@ _start:
 	ADR_REL	x4, __boot_core_stack_end_exclusive
 	mov	sp, x4
 
+	// Read the CPU's timer counter frequency and store it in ARCH_TIMER_COUNTER_FREQUENCY.
+	// Abort if the frequency read back as 0.
+	ADR_REL	x5, ARCH_TIMER_COUNTER_FREQUENCY // provided by aarch64/time.rs
+	mrs	x6, CNTFRQ_EL0
+	cmp	x6, xzr
+	b.eq	.L_parking_loop
+	str	w6, [x5]
+
 	// Jump to Rust code. x0, x1 and x2 hold the function arguments provided to _start_rust().
 	b	_start_rust
 
diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/time.rs b/17_kernel_symbols/kernel/src/_arch/aarch64/time.rs
index c814219ca..255a5a45d 100644
--- a/17_kernel_symbols/kernel/src/_arch/aarch64/time.rs
+++ b/17_kernel_symbols/kernel/src/_arch/aarch64/time.rs
@@ -11,111 +11,152 @@
 //!
 //! crate::time::arch_time
 
-use crate::{time, warn};
-use core::time::Duration;
+use crate::warn;
+use core::{
+    num::{NonZeroU128, NonZeroU32, NonZeroU64},
+    ops::{Add, Div},
+    time::Duration,
+};
 use cortex_a::{asm::barrier, registers::*};
-use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
+use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
-const NS_PER_S: u64 = 1_000_000_000;
+const NANOSEC_PER_SEC: NonZeroU64 = NonZeroU64::new(1_000_000_000).unwrap();
 
-/// ARMv8 Generic Timer.
-struct GenericTimer;
+#[derive(Copy, Clone, PartialOrd, PartialEq)]
+struct GenericTimerCounterValue(u64);
 
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
-static TIME_MANAGER: GenericTimer = GenericTimer;
+/// Boot assembly code overwrites this value with the value of CNTFRQ_EL0 before any Rust code is
+/// executed. This given value here is just a (safe) dummy.
+#[no_mangle]
+static ARCH_TIMER_COUNTER_FREQUENCY: NonZeroU32 = NonZeroU32::MIN;
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-impl GenericTimer {
-    #[inline(always)]
-    fn read_cntpct(&self) -> u64 {
-        // Prevent that the counter is read ahead of time due to out-of-order execution.
-        unsafe { barrier::isb(barrier::SY) };
-        CNTPCT_EL0.get()
-    }
+impl GenericTimerCounterValue {
+    pub const MAX: Self = GenericTimerCounterValue(u64::MAX);
 }
 
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
+impl Add for GenericTimerCounterValue {
+    type Output = Self;
 
-/// Return a reference to the time manager.
-pub fn time_manager() -> &'static impl time::interface::TimeManager {
-    &TIME_MANAGER
+    fn add(self, other: Self) -> Self {
+        GenericTimerCounterValue(self.0.wrapping_add(other.0))
+    }
 }
 
-//------------------------------------------------------------------------------
-// OS Interface Code
-//------------------------------------------------------------------------------
+impl From<GenericTimerCounterValue> for Duration {
+    fn from(counter_value: GenericTimerCounterValue) -> Self {
+        if counter_value.0 == 0 {
+            return Duration::ZERO;
+        }
 
-impl time::interface::TimeManager for GenericTimer {
-    fn resolution(&self) -> Duration {
-        Duration::from_nanos(NS_PER_S / (CNTFRQ_EL0.get() as u64))
+        // Read volatile is needed here to prevent the compiler from optimizing
+        // ARCH_TIMER_COUNTER_FREQUENCY away.
+        //
+        // This is safe, because all the safety requirements as stated in read_volatile()'s
+        // documentation are fulfilled.
+        let frequency: NonZeroU64 =
+            unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }.into();
+
+        // Div<NonZeroU64> implementation for u64 cannot panic.
+        let secs = counter_value.0.div(frequency);
+
+        // This is safe, because frequency can never be greater than u32::MAX, which means the
+        // largest theoretical value for sub_second_counter_value is (u32::MAX - 1). Therefore,
+        // (sub_second_counter_value * NANOSEC_PER_SEC) cannot overflow an u64.
+        //
+        // The subsequent division ensures the result fits into u32, since the max result is smaller
+        // than NANOSEC_PER_SEC. Therefore, just cast it to u32 using `as`.
+        let sub_second_counter_value = counter_value.0 % frequency;
+        let nanos = unsafe { sub_second_counter_value.unchecked_mul(u64::from(NANOSEC_PER_SEC)) }
+            .div(frequency) as u32;
+
+        Duration::new(secs, nanos)
     }
+}
 
-    fn uptime(&self) -> Duration {
-        let current_count: u64 = self.read_cntpct() * NS_PER_S;
-        let frq: u64 = CNTFRQ_EL0.get() as u64;
+fn max_duration() -> Duration {
+    Duration::from(GenericTimerCounterValue::MAX)
+}
 
-        Duration::from_nanos(current_count / frq)
-    }
+impl TryFrom<Duration> for GenericTimerCounterValue {
+    type Error = &'static str;
 
-    fn spin_for(&self, duration: Duration) {
-        // Instantly return on zero.
-        if duration.as_nanos() == 0 {
-            return;
+    fn try_from(duration: Duration) -> Result<Self, Self::Error> {
+        if duration < resolution() {
+            return Ok(GenericTimerCounterValue(0));
         }
 
-        // Calculate the register compare value.
-        let frq = CNTFRQ_EL0.get();
-        let x = match frq.checked_mul(duration.as_nanos() as u64) {
-            #[allow(unused_imports)]
-            None => {
-                warn!("Spin duration too long, skipping");
-                return;
-            }
-            Some(val) => val,
-        };
-        let tval = x / NS_PER_S;
-
-        // Check if it is within supported bounds.
-        let warn: Option<&str> = if tval == 0 {
-            Some("smaller")
-        // The upper 32 bits of CNTP_TVAL_EL0 are reserved.
-        } else if tval > u32::max_value().into() {
-            Some("bigger")
-        } else {
-            None
-        };
-
-        #[allow(unused_imports)]
-        if let Some(w) = warn {
-            warn!(
-                "Spin duration {} than architecturally supported, skipping",
-                w
-            );
-            return;
+        if duration > max_duration() {
+            return Err("Conversion error. Duration too big");
         }
 
-        // Set the compare value register.
-        CNTP_TVAL_EL0.set(tval);
+        // This is safe, because all the safety requirements as stated in read_volatile()'s
+        // documentation are fulfilled.
+        let frequency: u128 =
+            unsafe { u32::from(core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY)) as u128 };
+        let duration: u128 = duration.as_nanos();
 
-        // Kick off the counting.                       // Disable timer interrupt.
-        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::SET + CNTP_CTL_EL0::IMASK::SET);
+        // This is safe, because frequency can never be greater than u32::MAX, and
+        // (Duration::MAX.as_nanos() * u32::MAX) < u128::MAX.
+        let counter_value =
+            unsafe { duration.unchecked_mul(frequency) }.div(NonZeroU128::from(NANOSEC_PER_SEC));
 
-        // ISTATUS will be '1' when cval ticks have passed. Busy-check it.
-        while !CNTP_CTL_EL0.matches_all(CNTP_CTL_EL0::ISTATUS::SET) {}
-
-        // Disable counting again.
-        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::CLEAR);
+        // Since we checked above that we are <= max_duration(), just cast to u64.
+        Ok(GenericTimerCounterValue(counter_value as u64))
     }
 }
+
+#[inline(always)]
+fn read_cntpct() -> GenericTimerCounterValue {
+    // Prevent that the counter is read ahead of time due to out-of-order execution.
+    unsafe { barrier::isb(barrier::SY) };
+    let cnt = CNTPCT_EL0.get();
+
+    GenericTimerCounterValue(cnt)
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The timer's resolution.
+pub fn resolution() -> Duration {
+    Duration::from(GenericTimerCounterValue(1))
+}
+
+/// The uptime since power-on of the device.
+///
+/// This includes time consumed by firmware and bootloaders.
+pub fn uptime() -> Duration {
+    read_cntpct().into()
+}
+
+/// Spin for a given duration.
+pub fn spin_for(duration: Duration) {
+    let curr_counter_value = read_cntpct();
+
+    let counter_value_delta: GenericTimerCounterValue = match duration.try_into() {
+        Err(msg) => {
+            warn!("spin_for: {}. Skipping", msg);
+            return;
+        }
+        Ok(val) => val,
+    };
+    let counter_value_target = curr_counter_value + counter_value_delta;
+
+    // Busy wait.
+    //
+    // Read CNTPCT_EL0 directly to avoid the ISB that is part of [`read_cntpct`].
+    while GenericTimerCounterValue(CNTPCT_EL0.get()) < counter_value_target {}
+}
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index a3361c2cc..2281e66a3 100644
--- a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -144,7 +144,7 @@ impl GPIOInner {
     /// Disable pull-up/down on pins 14 and 15.
     #[cfg(feature = "bsp_rpi3")]
     fn disable_pud_14_15_bcm2837(&mut self) {
-        use crate::{time, time::interface::TimeManager};
+        use crate::time;
         use core::time::Duration;
 
         // The Linux 2837 GPIO driver waits 1 µs between the steps.
diff --git a/17_kernel_symbols/kernel/src/lib.rs b/17_kernel_symbols/kernel/src/lib.rs
index 1f6d11b1a..975bad2ed 100644
--- a/17_kernel_symbols/kernel/src/lib.rs
+++ b/17_kernel_symbols/kernel/src/lib.rs
@@ -111,15 +111,18 @@
 #![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
 #![feature(asm_const)]
+#![feature(const_option)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(generic_const_exprs)]
 #![feature(int_roundings)]
 #![feature(is_sorted)]
 #![feature(linkage)]
+#![feature(nonzero_min_max)]
 #![feature(panic_info_message)]
 #![feature(step_trait)]
 #![feature(trait_alias)]
+#![feature(unchecked_math)]
 #![no_std]
 // Testing
 #![cfg_attr(test, no_main)]
diff --git a/17_kernel_symbols/kernel/src/panic_wait.rs b/17_kernel_symbols/kernel/src/panic_wait.rs
index 618312133..ae4651e7f 100644
--- a/17_kernel_symbols/kernel/src/panic_wait.rs
+++ b/17_kernel_symbols/kernel/src/panic_wait.rs
@@ -59,8 +59,6 @@ fn panic_prevent_reenter() {
 
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
-    use crate::time::interface::TimeManager;
-
     exception::asynchronous::local_irq_mask();
 
     // Protect against panic infinite loops if any of the following code panics itself.
diff --git a/17_kernel_symbols/kernel/src/print.rs b/17_kernel_symbols/kernel/src/print.rs
index 8705eec0d..fe13b334c 100644
--- a/17_kernel_symbols/kernel/src/print.rs
+++ b/17_kernel_symbols/kernel/src/print.rs
@@ -39,8 +39,6 @@ macro_rules! println {
 #[macro_export]
 macro_rules! info {
     ($string:expr) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -50,8 +48,6 @@ macro_rules! info {
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -67,8 +63,6 @@ macro_rules! info {
 #[macro_export]
 macro_rules! warn {
     ($string:expr) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -78,8 +72,6 @@ macro_rules! warn {
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
diff --git a/17_kernel_symbols/kernel/src/time.rs b/17_kernel_symbols/kernel/src/time.rs
index 6d92b1966..a6c0c5b6b 100644
--- a/17_kernel_symbols/kernel/src/time.rs
+++ b/17_kernel_symbols/kernel/src/time.rs
@@ -8,30 +8,50 @@
 #[path = "_arch/aarch64/time.rs"]
 mod arch_time;
 
+use core::time::Duration;
+
 //--------------------------------------------------------------------------------------------------
-// Architectural Public Reexports
+// Public Definitions
 //--------------------------------------------------------------------------------------------------
-pub use arch_time::time_manager;
+
+/// Provides time management functions.
+pub struct TimeManager;
 
 //--------------------------------------------------------------------------------------------------
-// Public Definitions
+// Global instances
 //--------------------------------------------------------------------------------------------------
 
-/// Timekeeping interfaces.
-pub mod interface {
-    use core::time::Duration;
+static TIME_MANAGER: TimeManager = TimeManager::new();
 
-    /// Time management functions.
-    pub trait TimeManager {
-        /// The timer's resolution.
-        fn resolution(&self) -> Duration;
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
 
-        /// The uptime since power-on of the device.
-        ///
-        /// This includes time consumed by firmware and bootloaders.
-        fn uptime(&self) -> Duration;
+/// Return a reference to the global TimeManager.
+pub fn time_manager() -> &'static TimeManager {
+    &TIME_MANAGER
+}
+
+impl TimeManager {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self
+    }
+
+    /// The timer's resolution.
+    pub fn resolution(&self) -> Duration {
+        arch_time::resolution()
+    }
+
+    /// The uptime since power-on of the device.
+    ///
+    /// This includes time consumed by firmware and bootloaders.
+    pub fn uptime(&self) -> Duration {
+        arch_time::uptime()
+    }
 
-        /// Spin for a given duration.
-        fn spin_for(&self, duration: Duration);
+    /// Spin for a given duration.
+    pub fn spin_for(&self, duration: Duration) {
+        arch_time::spin_for(duration)
     }
 }
diff --git a/17_kernel_symbols/kernel/tests/01_timer_sanity.rs b/17_kernel_symbols/kernel/tests/01_timer_sanity.rs
index d5d76a5c1..398993324 100644
--- a/17_kernel_symbols/kernel/tests/01_timer_sanity.rs
+++ b/17_kernel_symbols/kernel/tests/01_timer_sanity.rs
@@ -11,7 +11,7 @@
 #![test_runner(libkernel::test_runner)]
 
 use core::time::Duration;
-use libkernel::{bsp, cpu, driver, exception, memory, time, time::interface::TimeManager};
+use libkernel::{bsp, cpu, driver, exception, memory, time};
 use test_macros::kernel_test;
 
 #[no_mangle]
@@ -38,6 +38,7 @@ fn timer_is_counting() {
 /// Timer resolution must be sufficient.
 #[kernel_test]
 fn timer_resolution_is_sufficient() {
+    assert!(time::time_manager().resolution().as_nanos() > 0);
     assert!(time::time_manager().resolution().as_nanos() < 100)
 }
 
diff --git a/18_backtrace/README.md b/18_backtrace/README.md
index c6417bdda..77222e3af 100644
--- a/18_backtrace/README.md
+++ b/18_backtrace/README.md
@@ -909,7 +909,7 @@ diff -uNr 17_kernel_symbols/kernel/src/bsp/raspberrypi/memory/mmu.rs 18_backtrac
 diff -uNr 17_kernel_symbols/kernel/src/lib.rs 18_backtrace/kernel/src/lib.rs
 --- 17_kernel_symbols/kernel/src/lib.rs
 +++ 18_backtrace/kernel/src/lib.rs
-@@ -130,6 +130,7 @@
+@@ -133,6 +133,7 @@
  mod panic_wait;
  mod synchronization;
 
@@ -972,7 +972,7 @@ diff -uNr 17_kernel_symbols/kernel/src/panic_wait.rs 18_backtrace/kernel/src/pan
  use core::panic::PanicInfo;
 
  //--------------------------------------------------------------------------------------------------
-@@ -75,6 +75,7 @@
+@@ -73,6 +73,7 @@
      println!(
          "[  {:>3}.{:06}] Kernel panic!\n\n\
          Panic location:\n      File '{}', line {}, column {}\n\n\
@@ -980,7 +980,7 @@ diff -uNr 17_kernel_symbols/kernel/src/panic_wait.rs 18_backtrace/kernel/src/pan
          {}",
          timestamp.as_secs(),
          timestamp.subsec_micros(),
-@@ -82,6 +83,7 @@
+@@ -80,6 +81,7 @@
          line,
          column,
          info.message().unwrap_or(&format_args!("")),
diff --git a/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.s b/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.s
index 8c70d035e..bf6e32e42 100644
--- a/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.s
+++ b/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.s
@@ -84,6 +84,14 @@ _start:
 	ADR_REL	x4, __boot_core_stack_end_exclusive
 	mov	sp, x4
 
+	// Read the CPU's timer counter frequency and store it in ARCH_TIMER_COUNTER_FREQUENCY.
+	// Abort if the frequency read back as 0.
+	ADR_REL	x5, ARCH_TIMER_COUNTER_FREQUENCY // provided by aarch64/time.rs
+	mrs	x6, CNTFRQ_EL0
+	cmp	x6, xzr
+	b.eq	.L_parking_loop
+	str	w6, [x5]
+
 	// Jump to Rust code. x0, x1 and x2 hold the function arguments provided to _start_rust().
 	b	_start_rust
 
diff --git a/18_backtrace/kernel/src/_arch/aarch64/time.rs b/18_backtrace/kernel/src/_arch/aarch64/time.rs
index c814219ca..255a5a45d 100644
--- a/18_backtrace/kernel/src/_arch/aarch64/time.rs
+++ b/18_backtrace/kernel/src/_arch/aarch64/time.rs
@@ -11,111 +11,152 @@
 //!
 //! crate::time::arch_time
 
-use crate::{time, warn};
-use core::time::Duration;
+use crate::warn;
+use core::{
+    num::{NonZeroU128, NonZeroU32, NonZeroU64},
+    ops::{Add, Div},
+    time::Duration,
+};
 use cortex_a::{asm::barrier, registers::*};
-use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
+use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
-const NS_PER_S: u64 = 1_000_000_000;
+const NANOSEC_PER_SEC: NonZeroU64 = NonZeroU64::new(1_000_000_000).unwrap();
 
-/// ARMv8 Generic Timer.
-struct GenericTimer;
+#[derive(Copy, Clone, PartialOrd, PartialEq)]
+struct GenericTimerCounterValue(u64);
 
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
-static TIME_MANAGER: GenericTimer = GenericTimer;
+/// Boot assembly code overwrites this value with the value of CNTFRQ_EL0 before any Rust code is
+/// executed. This given value here is just a (safe) dummy.
+#[no_mangle]
+static ARCH_TIMER_COUNTER_FREQUENCY: NonZeroU32 = NonZeroU32::MIN;
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-impl GenericTimer {
-    #[inline(always)]
-    fn read_cntpct(&self) -> u64 {
-        // Prevent that the counter is read ahead of time due to out-of-order execution.
-        unsafe { barrier::isb(barrier::SY) };
-        CNTPCT_EL0.get()
-    }
+impl GenericTimerCounterValue {
+    pub const MAX: Self = GenericTimerCounterValue(u64::MAX);
 }
 
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
+impl Add for GenericTimerCounterValue {
+    type Output = Self;
 
-/// Return a reference to the time manager.
-pub fn time_manager() -> &'static impl time::interface::TimeManager {
-    &TIME_MANAGER
+    fn add(self, other: Self) -> Self {
+        GenericTimerCounterValue(self.0.wrapping_add(other.0))
+    }
 }
 
-//------------------------------------------------------------------------------
-// OS Interface Code
-//------------------------------------------------------------------------------
+impl From<GenericTimerCounterValue> for Duration {
+    fn from(counter_value: GenericTimerCounterValue) -> Self {
+        if counter_value.0 == 0 {
+            return Duration::ZERO;
+        }
 
-impl time::interface::TimeManager for GenericTimer {
-    fn resolution(&self) -> Duration {
-        Duration::from_nanos(NS_PER_S / (CNTFRQ_EL0.get() as u64))
+        // Read volatile is needed here to prevent the compiler from optimizing
+        // ARCH_TIMER_COUNTER_FREQUENCY away.
+        //
+        // This is safe, because all the safety requirements as stated in read_volatile()'s
+        // documentation are fulfilled.
+        let frequency: NonZeroU64 =
+            unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }.into();
+
+        // Div<NonZeroU64> implementation for u64 cannot panic.
+        let secs = counter_value.0.div(frequency);
+
+        // This is safe, because frequency can never be greater than u32::MAX, which means the
+        // largest theoretical value for sub_second_counter_value is (u32::MAX - 1). Therefore,
+        // (sub_second_counter_value * NANOSEC_PER_SEC) cannot overflow an u64.
+        //
+        // The subsequent division ensures the result fits into u32, since the max result is smaller
+        // than NANOSEC_PER_SEC. Therefore, just cast it to u32 using `as`.
+        let sub_second_counter_value = counter_value.0 % frequency;
+        let nanos = unsafe { sub_second_counter_value.unchecked_mul(u64::from(NANOSEC_PER_SEC)) }
+            .div(frequency) as u32;
+
+        Duration::new(secs, nanos)
     }
+}
 
-    fn uptime(&self) -> Duration {
-        let current_count: u64 = self.read_cntpct() * NS_PER_S;
-        let frq: u64 = CNTFRQ_EL0.get() as u64;
+fn max_duration() -> Duration {
+    Duration::from(GenericTimerCounterValue::MAX)
+}
 
-        Duration::from_nanos(current_count / frq)
-    }
+impl TryFrom<Duration> for GenericTimerCounterValue {
+    type Error = &'static str;
 
-    fn spin_for(&self, duration: Duration) {
-        // Instantly return on zero.
-        if duration.as_nanos() == 0 {
-            return;
+    fn try_from(duration: Duration) -> Result<Self, Self::Error> {
+        if duration < resolution() {
+            return Ok(GenericTimerCounterValue(0));
         }
 
-        // Calculate the register compare value.
-        let frq = CNTFRQ_EL0.get();
-        let x = match frq.checked_mul(duration.as_nanos() as u64) {
-            #[allow(unused_imports)]
-            None => {
-                warn!("Spin duration too long, skipping");
-                return;
-            }
-            Some(val) => val,
-        };
-        let tval = x / NS_PER_S;
-
-        // Check if it is within supported bounds.
-        let warn: Option<&str> = if tval == 0 {
-            Some("smaller")
-        // The upper 32 bits of CNTP_TVAL_EL0 are reserved.
-        } else if tval > u32::max_value().into() {
-            Some("bigger")
-        } else {
-            None
-        };
-
-        #[allow(unused_imports)]
-        if let Some(w) = warn {
-            warn!(
-                "Spin duration {} than architecturally supported, skipping",
-                w
-            );
-            return;
+        if duration > max_duration() {
+            return Err("Conversion error. Duration too big");
         }
 
-        // Set the compare value register.
-        CNTP_TVAL_EL0.set(tval);
+        // This is safe, because all the safety requirements as stated in read_volatile()'s
+        // documentation are fulfilled.
+        let frequency: u128 =
+            unsafe { u32::from(core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY)) as u128 };
+        let duration: u128 = duration.as_nanos();
 
-        // Kick off the counting.                       // Disable timer interrupt.
-        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::SET + CNTP_CTL_EL0::IMASK::SET);
+        // This is safe, because frequency can never be greater than u32::MAX, and
+        // (Duration::MAX.as_nanos() * u32::MAX) < u128::MAX.
+        let counter_value =
+            unsafe { duration.unchecked_mul(frequency) }.div(NonZeroU128::from(NANOSEC_PER_SEC));
 
-        // ISTATUS will be '1' when cval ticks have passed. Busy-check it.
-        while !CNTP_CTL_EL0.matches_all(CNTP_CTL_EL0::ISTATUS::SET) {}
-
-        // Disable counting again.
-        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::CLEAR);
+        // Since we checked above that we are <= max_duration(), just cast to u64.
+        Ok(GenericTimerCounterValue(counter_value as u64))
     }
 }
+
+#[inline(always)]
+fn read_cntpct() -> GenericTimerCounterValue {
+    // Prevent that the counter is read ahead of time due to out-of-order execution.
+    unsafe { barrier::isb(barrier::SY) };
+    let cnt = CNTPCT_EL0.get();
+
+    GenericTimerCounterValue(cnt)
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The timer's resolution.
+pub fn resolution() -> Duration {
+    Duration::from(GenericTimerCounterValue(1))
+}
+
+/// The uptime since power-on of the device.
+///
+/// This includes time consumed by firmware and bootloaders.
+pub fn uptime() -> Duration {
+    read_cntpct().into()
+}
+
+/// Spin for a given duration.
+pub fn spin_for(duration: Duration) {
+    let curr_counter_value = read_cntpct();
+
+    let counter_value_delta: GenericTimerCounterValue = match duration.try_into() {
+        Err(msg) => {
+            warn!("spin_for: {}. Skipping", msg);
+            return;
+        }
+        Ok(val) => val,
+    };
+    let counter_value_target = curr_counter_value + counter_value_delta;
+
+    // Busy wait.
+    //
+    // Read CNTPCT_EL0 directly to avoid the ISB that is part of [`read_cntpct`].
+    while GenericTimerCounterValue(CNTPCT_EL0.get()) < counter_value_target {}
+}
diff --git a/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index a3361c2cc..2281e66a3 100644
--- a/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -144,7 +144,7 @@ impl GPIOInner {
     /// Disable pull-up/down on pins 14 and 15.
     #[cfg(feature = "bsp_rpi3")]
     fn disable_pud_14_15_bcm2837(&mut self) {
-        use crate::{time, time::interface::TimeManager};
+        use crate::time;
         use core::time::Duration;
 
         // The Linux 2837 GPIO driver waits 1 µs between the steps.
diff --git a/18_backtrace/kernel/src/lib.rs b/18_backtrace/kernel/src/lib.rs
index 2c13a3426..2545b20bb 100644
--- a/18_backtrace/kernel/src/lib.rs
+++ b/18_backtrace/kernel/src/lib.rs
@@ -111,15 +111,18 @@
 #![allow(clippy::upper_case_acronyms)]
 #![allow(incomplete_features)]
 #![feature(asm_const)]
+#![feature(const_option)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(generic_const_exprs)]
 #![feature(int_roundings)]
 #![feature(is_sorted)]
 #![feature(linkage)]
+#![feature(nonzero_min_max)]
 #![feature(panic_info_message)]
 #![feature(step_trait)]
 #![feature(trait_alias)]
+#![feature(unchecked_math)]
 #![no_std]
 // Testing
 #![cfg_attr(test, no_main)]
diff --git a/18_backtrace/kernel/src/panic_wait.rs b/18_backtrace/kernel/src/panic_wait.rs
index c11ec67ec..bc95f77c4 100644
--- a/18_backtrace/kernel/src/panic_wait.rs
+++ b/18_backtrace/kernel/src/panic_wait.rs
@@ -59,8 +59,6 @@ fn panic_prevent_reenter() {
 
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
-    use crate::time::interface::TimeManager;
-
     exception::asynchronous::local_irq_mask();
 
     // Protect against panic infinite loops if any of the following code panics itself.
diff --git a/18_backtrace/kernel/src/print.rs b/18_backtrace/kernel/src/print.rs
index 8705eec0d..fe13b334c 100644
--- a/18_backtrace/kernel/src/print.rs
+++ b/18_backtrace/kernel/src/print.rs
@@ -39,8 +39,6 @@ macro_rules! println {
 #[macro_export]
 macro_rules! info {
     ($string:expr) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -50,8 +48,6 @@ macro_rules! info {
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -67,8 +63,6 @@ macro_rules! info {
 #[macro_export]
 macro_rules! warn {
     ($string:expr) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -78,8 +72,6 @@ macro_rules! warn {
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
diff --git a/18_backtrace/kernel/src/time.rs b/18_backtrace/kernel/src/time.rs
index 6d92b1966..a6c0c5b6b 100644
--- a/18_backtrace/kernel/src/time.rs
+++ b/18_backtrace/kernel/src/time.rs
@@ -8,30 +8,50 @@
 #[path = "_arch/aarch64/time.rs"]
 mod arch_time;
 
+use core::time::Duration;
+
 //--------------------------------------------------------------------------------------------------
-// Architectural Public Reexports
+// Public Definitions
 //--------------------------------------------------------------------------------------------------
-pub use arch_time::time_manager;
+
+/// Provides time management functions.
+pub struct TimeManager;
 
 //--------------------------------------------------------------------------------------------------
-// Public Definitions
+// Global instances
 //--------------------------------------------------------------------------------------------------
 
-/// Timekeeping interfaces.
-pub mod interface {
-    use core::time::Duration;
+static TIME_MANAGER: TimeManager = TimeManager::new();
 
-    /// Time management functions.
-    pub trait TimeManager {
-        /// The timer's resolution.
-        fn resolution(&self) -> Duration;
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
 
-        /// The uptime since power-on of the device.
-        ///
-        /// This includes time consumed by firmware and bootloaders.
-        fn uptime(&self) -> Duration;
+/// Return a reference to the global TimeManager.
+pub fn time_manager() -> &'static TimeManager {
+    &TIME_MANAGER
+}
+
+impl TimeManager {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self
+    }
+
+    /// The timer's resolution.
+    pub fn resolution(&self) -> Duration {
+        arch_time::resolution()
+    }
+
+    /// The uptime since power-on of the device.
+    ///
+    /// This includes time consumed by firmware and bootloaders.
+    pub fn uptime(&self) -> Duration {
+        arch_time::uptime()
+    }
 
-        /// Spin for a given duration.
-        fn spin_for(&self, duration: Duration);
+    /// Spin for a given duration.
+    pub fn spin_for(&self, duration: Duration) {
+        arch_time::spin_for(duration)
     }
 }
diff --git a/18_backtrace/kernel/tests/01_timer_sanity.rs b/18_backtrace/kernel/tests/01_timer_sanity.rs
index d5d76a5c1..398993324 100644
--- a/18_backtrace/kernel/tests/01_timer_sanity.rs
+++ b/18_backtrace/kernel/tests/01_timer_sanity.rs
@@ -11,7 +11,7 @@
 #![test_runner(libkernel::test_runner)]
 
 use core::time::Duration;
-use libkernel::{bsp, cpu, driver, exception, memory, time, time::interface::TimeManager};
+use libkernel::{bsp, cpu, driver, exception, memory, time};
 use test_macros::kernel_test;
 
 #[no_mangle]
@@ -38,6 +38,7 @@ fn timer_is_counting() {
 /// Timer resolution must be sufficient.
 #[kernel_test]
 fn timer_resolution_is_sufficient() {
+    assert!(time::time_manager().resolution().as_nanos() > 0);
     assert!(time::time_manager().resolution().as_nanos() < 100)
 }
 
diff --git a/19_kernel_heap/README.md b/19_kernel_heap/README.md
index ecb3f8f7c..11417c2f9 100644
--- a/19_kernel_heap/README.md
+++ b/19_kernel_heap/README.md
@@ -433,7 +433,7 @@ diff -uNr 18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 19
 diff -uNr 18_backtrace/kernel/src/bsp/raspberrypi/driver.rs 19_kernel_heap/kernel/src/bsp/raspberrypi/driver.rs
 --- 18_backtrace/kernel/src/bsp/raspberrypi/driver.rs
 +++ 19_kernel_heap/kernel/src/bsp/raspberrypi/driver.rs
-@@ -11,11 +11,11 @@
+@@ -11,6 +11,7 @@
      memory::mmu::MMIODescriptor,
      synchronization::{interface::ReadWriteEx, InitStateLock},
  };
@@ -441,12 +441,7 @@ diff -uNr 18_backtrace/kernel/src/bsp/raspberrypi/driver.rs 19_kernel_heap/kerne
  use core::{
      mem::MaybeUninit,
      sync::atomic::{AtomicBool, Ordering},
- };
--
- pub use device_driver::IRQNumber;
-
- //--------------------------------------------------------------------------------------------------
-@@ -24,18 +24,11 @@
+@@ -24,18 +25,11 @@
 
  /// Device Driver Manager type.
  struct BSPDriverManager {
@@ -466,7 +461,7 @@ diff -uNr 18_backtrace/kernel/src/bsp/raspberrypi/driver.rs 19_kernel_heap/kerne
  // Global instances
  //--------------------------------------------------------------------------------------------------
 
-@@ -50,7 +43,7 @@
+@@ -50,7 +44,7 @@
  static mut INTERRUPT_CONTROLLER: MaybeUninit<device_driver::GICv2> = MaybeUninit::uninit();
 
  static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
@@ -475,7 +470,7 @@ diff -uNr 18_backtrace/kernel/src/bsp/raspberrypi/driver.rs 19_kernel_heap/kerne
      init_done: AtomicBool::new(false),
  };
 
-@@ -143,9 +136,9 @@
+@@ -143,9 +137,9 @@
 
      unsafe fn register_drivers(&self) {
          self.device_drivers.write(|drivers| {
@@ -488,7 +483,7 @@ diff -uNr 18_backtrace/kernel/src/bsp/raspberrypi/driver.rs 19_kernel_heap/kerne
          });
      }
  }
-@@ -180,9 +173,8 @@
+@@ -180,9 +174,8 @@
          Ok(())
      }
 
@@ -871,9 +866,9 @@ diff -uNr 18_backtrace/kernel/src/lib.rs 19_kernel_heap/kernel/src/lib.rs
  #![allow(incomplete_features)]
 +#![feature(alloc_error_handler)]
  #![feature(asm_const)]
+ #![feature(const_option)]
  #![feature(core_intrinsics)]
- #![feature(format_args_nl)]
-@@ -127,6 +128,8 @@
+@@ -130,6 +131,8 @@
  #![reexport_test_harness_main = "test_main"]
  #![test_runner(crate::test_runner)]
 
@@ -1269,7 +1264,7 @@ diff -uNr 18_backtrace/kernel/src/memory.rs 19_kernel_heap/kernel/src/memory.rs
 diff -uNr 18_backtrace/kernel/src/print.rs 19_kernel_heap/kernel/src/print.rs
 --- 18_backtrace/kernel/src/print.rs
 +++ 19_kernel_heap/kernel/src/print.rs
-@@ -90,3 +90,35 @@
+@@ -82,3 +82,31 @@
          ));
      })
  }
@@ -1279,8 +1274,6 @@ diff -uNr 18_backtrace/kernel/src/print.rs 19_kernel_heap/kernel/src/print.rs
 +macro_rules! debug {
 +    ($string:expr) => ({
 +        if cfg!(feature = "debug_prints") {
-+            use $crate::time::interface::TimeManager;
-+
 +            let timestamp = $crate::time::time_manager().uptime();
 +
 +            $crate::print::_print(format_args_nl!(
@@ -1292,8 +1285,6 @@ diff -uNr 18_backtrace/kernel/src/print.rs 19_kernel_heap/kernel/src/print.rs
 +    });
 +    ($format_string:expr, $($arg:tt)*) => ({
 +        if cfg!(feature = "debug_prints") {
-+            use $crate::time::interface::TimeManager;
-+
 +            let timestamp = $crate::time::time_manager().uptime();
 +
 +            $crate::print::_print(format_args_nl!(
diff --git a/19_kernel_heap/kernel/src/_arch/aarch64/cpu/boot.s b/19_kernel_heap/kernel/src/_arch/aarch64/cpu/boot.s
index 8c70d035e..bf6e32e42 100644
--- a/19_kernel_heap/kernel/src/_arch/aarch64/cpu/boot.s
+++ b/19_kernel_heap/kernel/src/_arch/aarch64/cpu/boot.s
@@ -84,6 +84,14 @@ _start:
 	ADR_REL	x4, __boot_core_stack_end_exclusive
 	mov	sp, x4
 
+	// Read the CPU's timer counter frequency and store it in ARCH_TIMER_COUNTER_FREQUENCY.
+	// Abort if the frequency read back as 0.
+	ADR_REL	x5, ARCH_TIMER_COUNTER_FREQUENCY // provided by aarch64/time.rs
+	mrs	x6, CNTFRQ_EL0
+	cmp	x6, xzr
+	b.eq	.L_parking_loop
+	str	w6, [x5]
+
 	// Jump to Rust code. x0, x1 and x2 hold the function arguments provided to _start_rust().
 	b	_start_rust
 
diff --git a/19_kernel_heap/kernel/src/_arch/aarch64/time.rs b/19_kernel_heap/kernel/src/_arch/aarch64/time.rs
index c814219ca..255a5a45d 100644
--- a/19_kernel_heap/kernel/src/_arch/aarch64/time.rs
+++ b/19_kernel_heap/kernel/src/_arch/aarch64/time.rs
@@ -11,111 +11,152 @@
 //!
 //! crate::time::arch_time
 
-use crate::{time, warn};
-use core::time::Duration;
+use crate::warn;
+use core::{
+    num::{NonZeroU128, NonZeroU32, NonZeroU64},
+    ops::{Add, Div},
+    time::Duration,
+};
 use cortex_a::{asm::barrier, registers::*};
-use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
+use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
-const NS_PER_S: u64 = 1_000_000_000;
+const NANOSEC_PER_SEC: NonZeroU64 = NonZeroU64::new(1_000_000_000).unwrap();
 
-/// ARMv8 Generic Timer.
-struct GenericTimer;
+#[derive(Copy, Clone, PartialOrd, PartialEq)]
+struct GenericTimerCounterValue(u64);
 
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
-static TIME_MANAGER: GenericTimer = GenericTimer;
+/// Boot assembly code overwrites this value with the value of CNTFRQ_EL0 before any Rust code is
+/// executed. This given value here is just a (safe) dummy.
+#[no_mangle]
+static ARCH_TIMER_COUNTER_FREQUENCY: NonZeroU32 = NonZeroU32::MIN;
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-impl GenericTimer {
-    #[inline(always)]
-    fn read_cntpct(&self) -> u64 {
-        // Prevent that the counter is read ahead of time due to out-of-order execution.
-        unsafe { barrier::isb(barrier::SY) };
-        CNTPCT_EL0.get()
-    }
+impl GenericTimerCounterValue {
+    pub const MAX: Self = GenericTimerCounterValue(u64::MAX);
 }
 
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
+impl Add for GenericTimerCounterValue {
+    type Output = Self;
 
-/// Return a reference to the time manager.
-pub fn time_manager() -> &'static impl time::interface::TimeManager {
-    &TIME_MANAGER
+    fn add(self, other: Self) -> Self {
+        GenericTimerCounterValue(self.0.wrapping_add(other.0))
+    }
 }
 
-//------------------------------------------------------------------------------
-// OS Interface Code
-//------------------------------------------------------------------------------
+impl From<GenericTimerCounterValue> for Duration {
+    fn from(counter_value: GenericTimerCounterValue) -> Self {
+        if counter_value.0 == 0 {
+            return Duration::ZERO;
+        }
 
-impl time::interface::TimeManager for GenericTimer {
-    fn resolution(&self) -> Duration {
-        Duration::from_nanos(NS_PER_S / (CNTFRQ_EL0.get() as u64))
+        // Read volatile is needed here to prevent the compiler from optimizing
+        // ARCH_TIMER_COUNTER_FREQUENCY away.
+        //
+        // This is safe, because all the safety requirements as stated in read_volatile()'s
+        // documentation are fulfilled.
+        let frequency: NonZeroU64 =
+            unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }.into();
+
+        // Div<NonZeroU64> implementation for u64 cannot panic.
+        let secs = counter_value.0.div(frequency);
+
+        // This is safe, because frequency can never be greater than u32::MAX, which means the
+        // largest theoretical value for sub_second_counter_value is (u32::MAX - 1). Therefore,
+        // (sub_second_counter_value * NANOSEC_PER_SEC) cannot overflow an u64.
+        //
+        // The subsequent division ensures the result fits into u32, since the max result is smaller
+        // than NANOSEC_PER_SEC. Therefore, just cast it to u32 using `as`.
+        let sub_second_counter_value = counter_value.0 % frequency;
+        let nanos = unsafe { sub_second_counter_value.unchecked_mul(u64::from(NANOSEC_PER_SEC)) }
+            .div(frequency) as u32;
+
+        Duration::new(secs, nanos)
     }
+}
 
-    fn uptime(&self) -> Duration {
-        let current_count: u64 = self.read_cntpct() * NS_PER_S;
-        let frq: u64 = CNTFRQ_EL0.get() as u64;
+fn max_duration() -> Duration {
+    Duration::from(GenericTimerCounterValue::MAX)
+}
 
-        Duration::from_nanos(current_count / frq)
-    }
+impl TryFrom<Duration> for GenericTimerCounterValue {
+    type Error = &'static str;
 
-    fn spin_for(&self, duration: Duration) {
-        // Instantly return on zero.
-        if duration.as_nanos() == 0 {
-            return;
+    fn try_from(duration: Duration) -> Result<Self, Self::Error> {
+        if duration < resolution() {
+            return Ok(GenericTimerCounterValue(0));
         }
 
-        // Calculate the register compare value.
-        let frq = CNTFRQ_EL0.get();
-        let x = match frq.checked_mul(duration.as_nanos() as u64) {
-            #[allow(unused_imports)]
-            None => {
-                warn!("Spin duration too long, skipping");
-                return;
-            }
-            Some(val) => val,
-        };
-        let tval = x / NS_PER_S;
-
-        // Check if it is within supported bounds.
-        let warn: Option<&str> = if tval == 0 {
-            Some("smaller")
-        // The upper 32 bits of CNTP_TVAL_EL0 are reserved.
-        } else if tval > u32::max_value().into() {
-            Some("bigger")
-        } else {
-            None
-        };
-
-        #[allow(unused_imports)]
-        if let Some(w) = warn {
-            warn!(
-                "Spin duration {} than architecturally supported, skipping",
-                w
-            );
-            return;
+        if duration > max_duration() {
+            return Err("Conversion error. Duration too big");
         }
 
-        // Set the compare value register.
-        CNTP_TVAL_EL0.set(tval);
+        // This is safe, because all the safety requirements as stated in read_volatile()'s
+        // documentation are fulfilled.
+        let frequency: u128 =
+            unsafe { u32::from(core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY)) as u128 };
+        let duration: u128 = duration.as_nanos();
 
-        // Kick off the counting.                       // Disable timer interrupt.
-        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::SET + CNTP_CTL_EL0::IMASK::SET);
+        // This is safe, because frequency can never be greater than u32::MAX, and
+        // (Duration::MAX.as_nanos() * u32::MAX) < u128::MAX.
+        let counter_value =
+            unsafe { duration.unchecked_mul(frequency) }.div(NonZeroU128::from(NANOSEC_PER_SEC));
 
-        // ISTATUS will be '1' when cval ticks have passed. Busy-check it.
-        while !CNTP_CTL_EL0.matches_all(CNTP_CTL_EL0::ISTATUS::SET) {}
-
-        // Disable counting again.
-        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::CLEAR);
+        // Since we checked above that we are <= max_duration(), just cast to u64.
+        Ok(GenericTimerCounterValue(counter_value as u64))
     }
 }
+
+#[inline(always)]
+fn read_cntpct() -> GenericTimerCounterValue {
+    // Prevent that the counter is read ahead of time due to out-of-order execution.
+    unsafe { barrier::isb(barrier::SY) };
+    let cnt = CNTPCT_EL0.get();
+
+    GenericTimerCounterValue(cnt)
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The timer's resolution.
+pub fn resolution() -> Duration {
+    Duration::from(GenericTimerCounterValue(1))
+}
+
+/// The uptime since power-on of the device.
+///
+/// This includes time consumed by firmware and bootloaders.
+pub fn uptime() -> Duration {
+    read_cntpct().into()
+}
+
+/// Spin for a given duration.
+pub fn spin_for(duration: Duration) {
+    let curr_counter_value = read_cntpct();
+
+    let counter_value_delta: GenericTimerCounterValue = match duration.try_into() {
+        Err(msg) => {
+            warn!("spin_for: {}. Skipping", msg);
+            return;
+        }
+        Ok(val) => val,
+    };
+    let counter_value_target = curr_counter_value + counter_value_delta;
+
+    // Busy wait.
+    //
+    // Read CNTPCT_EL0 directly to avoid the ISB that is part of [`read_cntpct`].
+    while GenericTimerCounterValue(CNTPCT_EL0.get()) < counter_value_target {}
+}
diff --git a/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index a3361c2cc..2281e66a3 100644
--- a/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -144,7 +144,7 @@ impl GPIOInner {
     /// Disable pull-up/down on pins 14 and 15.
     #[cfg(feature = "bsp_rpi3")]
     fn disable_pud_14_15_bcm2837(&mut self) {
-        use crate::{time, time::interface::TimeManager};
+        use crate::time;
         use core::time::Duration;
 
         // The Linux 2837 GPIO driver waits 1 µs between the steps.
diff --git a/19_kernel_heap/kernel/src/bsp/raspberrypi/driver.rs b/19_kernel_heap/kernel/src/bsp/raspberrypi/driver.rs
index 3eb01f276..5571c3929 100644
--- a/19_kernel_heap/kernel/src/bsp/raspberrypi/driver.rs
+++ b/19_kernel_heap/kernel/src/bsp/raspberrypi/driver.rs
@@ -16,6 +16,7 @@ use core::{
     mem::MaybeUninit,
     sync::atomic::{AtomicBool, Ordering},
 };
+
 pub use device_driver::IRQNumber;
 
 //--------------------------------------------------------------------------------------------------
diff --git a/19_kernel_heap/kernel/src/lib.rs b/19_kernel_heap/kernel/src/lib.rs
index 20dc3bfde..8e4195e00 100644
--- a/19_kernel_heap/kernel/src/lib.rs
+++ b/19_kernel_heap/kernel/src/lib.rs
@@ -112,15 +112,18 @@
 #![allow(incomplete_features)]
 #![feature(alloc_error_handler)]
 #![feature(asm_const)]
+#![feature(const_option)]
 #![feature(core_intrinsics)]
 #![feature(format_args_nl)]
 #![feature(generic_const_exprs)]
 #![feature(int_roundings)]
 #![feature(is_sorted)]
 #![feature(linkage)]
+#![feature(nonzero_min_max)]
 #![feature(panic_info_message)]
 #![feature(step_trait)]
 #![feature(trait_alias)]
+#![feature(unchecked_math)]
 #![no_std]
 // Testing
 #![cfg_attr(test, no_main)]
diff --git a/19_kernel_heap/kernel/src/panic_wait.rs b/19_kernel_heap/kernel/src/panic_wait.rs
index c11ec67ec..bc95f77c4 100644
--- a/19_kernel_heap/kernel/src/panic_wait.rs
+++ b/19_kernel_heap/kernel/src/panic_wait.rs
@@ -59,8 +59,6 @@ fn panic_prevent_reenter() {
 
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
-    use crate::time::interface::TimeManager;
-
     exception::asynchronous::local_irq_mask();
 
     // Protect against panic infinite loops if any of the following code panics itself.
diff --git a/19_kernel_heap/kernel/src/print.rs b/19_kernel_heap/kernel/src/print.rs
index 5e41ef9fd..8d56d2e4a 100644
--- a/19_kernel_heap/kernel/src/print.rs
+++ b/19_kernel_heap/kernel/src/print.rs
@@ -39,8 +39,6 @@ macro_rules! println {
 #[macro_export]
 macro_rules! info {
     ($string:expr) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -50,8 +48,6 @@ macro_rules! info {
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -67,8 +63,6 @@ macro_rules! info {
 #[macro_export]
 macro_rules! warn {
     ($string:expr) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -78,8 +72,6 @@ macro_rules! warn {
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -96,8 +88,6 @@ macro_rules! warn {
 macro_rules! debug {
     ($string:expr) => ({
         if cfg!(feature = "debug_prints") {
-            use $crate::time::interface::TimeManager;
-
             let timestamp = $crate::time::time_manager().uptime();
 
             $crate::print::_print(format_args_nl!(
@@ -109,8 +99,6 @@ macro_rules! debug {
     });
     ($format_string:expr, $($arg:tt)*) => ({
         if cfg!(feature = "debug_prints") {
-            use $crate::time::interface::TimeManager;
-
             let timestamp = $crate::time::time_manager().uptime();
 
             $crate::print::_print(format_args_nl!(
diff --git a/19_kernel_heap/kernel/src/time.rs b/19_kernel_heap/kernel/src/time.rs
index 6d92b1966..a6c0c5b6b 100644
--- a/19_kernel_heap/kernel/src/time.rs
+++ b/19_kernel_heap/kernel/src/time.rs
@@ -8,30 +8,50 @@
 #[path = "_arch/aarch64/time.rs"]
 mod arch_time;
 
+use core::time::Duration;
+
 //--------------------------------------------------------------------------------------------------
-// Architectural Public Reexports
+// Public Definitions
 //--------------------------------------------------------------------------------------------------
-pub use arch_time::time_manager;
+
+/// Provides time management functions.
+pub struct TimeManager;
 
 //--------------------------------------------------------------------------------------------------
-// Public Definitions
+// Global instances
 //--------------------------------------------------------------------------------------------------
 
-/// Timekeeping interfaces.
-pub mod interface {
-    use core::time::Duration;
+static TIME_MANAGER: TimeManager = TimeManager::new();
 
-    /// Time management functions.
-    pub trait TimeManager {
-        /// The timer's resolution.
-        fn resolution(&self) -> Duration;
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
 
-        /// The uptime since power-on of the device.
-        ///
-        /// This includes time consumed by firmware and bootloaders.
-        fn uptime(&self) -> Duration;
+/// Return a reference to the global TimeManager.
+pub fn time_manager() -> &'static TimeManager {
+    &TIME_MANAGER
+}
+
+impl TimeManager {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self
+    }
+
+    /// The timer's resolution.
+    pub fn resolution(&self) -> Duration {
+        arch_time::resolution()
+    }
+
+    /// The uptime since power-on of the device.
+    ///
+    /// This includes time consumed by firmware and bootloaders.
+    pub fn uptime(&self) -> Duration {
+        arch_time::uptime()
+    }
 
-        /// Spin for a given duration.
-        fn spin_for(&self, duration: Duration);
+    /// Spin for a given duration.
+    pub fn spin_for(&self, duration: Duration) {
+        arch_time::spin_for(duration)
     }
 }
diff --git a/19_kernel_heap/kernel/tests/01_timer_sanity.rs b/19_kernel_heap/kernel/tests/01_timer_sanity.rs
index d5d76a5c1..398993324 100644
--- a/19_kernel_heap/kernel/tests/01_timer_sanity.rs
+++ b/19_kernel_heap/kernel/tests/01_timer_sanity.rs
@@ -11,7 +11,7 @@
 #![test_runner(libkernel::test_runner)]
 
 use core::time::Duration;
-use libkernel::{bsp, cpu, driver, exception, memory, time, time::interface::TimeManager};
+use libkernel::{bsp, cpu, driver, exception, memory, time};
 use test_macros::kernel_test;
 
 #[no_mangle]
@@ -38,6 +38,7 @@ fn timer_is_counting() {
 /// Timer resolution must be sufficient.
 #[kernel_test]
 fn timer_resolution_is_sufficient() {
+    assert!(time::time_manager().resolution().as_nanos() > 0);
     assert!(time::time_manager().resolution().as_nanos() < 100)
 }
 
diff --git a/X1_JTAG_boot/jtag_boot_rpi3.img b/X1_JTAG_boot/jtag_boot_rpi3.img
index 6b717dffa6c5b3ef5507a10f0b1e95bdcea9f241..844015333d4c9c99ddbb059320b89f37229f2328 100755
GIT binary patch
delta 2665
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diff --git a/X1_JTAG_boot/jtag_boot_rpi4.img b/X1_JTAG_boot/jtag_boot_rpi4.img
index 195a9fa2897dec9ff58270824d17ee341181bd88..90e8668b1951ee773dc86acaba14c1afe08781fc 100755
GIT binary patch
delta 1940
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zqFh|F;{O`ISt|NU-i`NQnP^wfAuiU<ZR+PkeX*WypRc>)kdb!*xMD;1@cq4g5l^%+
z5)Rd^tFNhR_eP`9hN`;iT5q^I9I6l3d+Wlr?KSO@sMqWDbj8Aah(GL!^za>?UOwXK
zi|y}N%lF>Z2`PbABk?7aHhdO<O^8(vdwzn}fgCoZHUq0ZFVwBmhV(Aib-zQGE<^8h
jn8m4OwZ#czR*X_lYg`wJ!)^n^d$F<2qBMygJIenB&B;1<

delta 1833
zcmah|Yitx%6h3!m7iO2XPWoW`pzW*$w!5_50u@*>>9z#1MMYLkNPM)ll(6NsE>(k}
z>^3Hl0>+LPL!^J&V$#m~M^lJYi6P-n%MX(ZMH7wA)}Ygt8dLg%4R*(KXJ&&EjW@aX
z+<V^VyXTBQb#3djgRo`FZ3}+b$ibd^;N}Jiyi_jnQ^9!<8SP;d$XqKR|9H>HlCHZ9
zd0Iz4$O1rq3+m~}r)|ag+*RA>(FIcAw!=B5H~1-t>MtNq^B@<F9^+OJuJsdol0Q(I
z^vT`^Nmfr0MXdl?8wRBk;vwxK1h(5~j_pZqVqi2aZXooyJ-{V>qhHwH7aDY)OlsFb
z_M)n~oL5xzo8-BK9wUn80fogB+CkJ}obuX|eqI9Umd29=5rU{IB=*tWIewB&dveZ_
zjiWh_{Z6>vfDwk=pzCuh8<HDj=EL_Qh%*&q%8ai6p<xW~U_e&a5oLB881g}stM6gj
z9=j2<@+ZUt?UZ%&LT+)a{?CV@lRP9;OmP~+?^x1ZlGLaWfW9Ft!QHxA=CgyTRw%y>
z#tNo>OzST54ls?W3pO+L`3&@as3jyGy2iKMR{8Qo5;wau8=dDS(_5iFh4(%f*dz;>
z2oSi;avRtU;-apfR{<`618~lbo8iM`<GVoQ@h|Z|`-BF%vS4kl_kk{I9-G3-XDXdF
z^!b9aSh5ByM-=WqFiSMTUMG|3jgb1eo}a2zw@x{5H!Xup&fv$P=A*+=q1)LnI3_NH
zo6me3&bzcQWB+cUS5Oz6OHDVK>$wxUco)%}9|ifY-~7chcXV;yPn4$aiGJs`lcB`f
zE727IvAzR?n~Z#_szIFF3@Pu@&YK4i%e#JFsdPI_X7V5v{<1gJlr<DJ@<zR#D4+G)
z6ro$`7nb(j)ci2U>eBq?_w^KFQ5T6keI4XjT0b8o@I(tH#@d?sfYs(Wa1~`By7_o$
zH!3mgR5W-UF=cm#1l4j&W8|Gc7@#iWfc2__Y!3V#9fuPx-NVLs6d?y9(upW_B1*G}
z(rHA=+kK<I4vTak3JRj|(c_Mi0LEObhtz&7^cgJFxw_GtRTWeidS$a7&O35q#H{ob
zjH!HHVjUW=O2$3(>pWk1@0<9!!#Fc}oB?Lj_w3CXy*#ezba}oz=KW0<o!Ae}2)H)9
z%#^JGaW)328LUb3WEs4XN)RWEcebLnvzf>-`0f>K_IaFrUe5m)PzP3;pbiz7nEq<b
ztBU&f(t5Q4Dr-o`<kKmiJves877uk6<ZtxZVN5`t0}>&}9T;QXPbJrVZv;>smw7&<
zan9t#ElH3z6uLIpY#BYn2yiHkC0P6`#s8FlP()7`{_tw!w&$cBFEs7)R7nTJhdZRB
z(RP1JTeN+@zm1)n>ik{dLmf5IqX5-KriUWS^LC_VxZAqAIu1p;q^={<-tgPuy&cjU
z$E0^VqDN??q%fm=%rahS8DsbhC1r(IEH=)9v3l{$#!YXP)U9QlOxifk#`?-CBU7GQ
zM18AH*j|yO8ro4*9jlVsj~smK&|%5x#NYm3^Q)G-YRml^E1wKjGnU+8$rr3QXT296
zNr!G(6`_5_D*ddqmPBZ>)U|#w*L22^jYPwTy9_Y#J4;P|mgP!BYR4U+4W+J^BfKe%
dTlBx0p*GLd3tDu<@>*-r0gLWol&&eO_zP&8Bsc&7

diff --git a/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s b/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s
index 1f70169f9..aa701fd1b 100644
--- a/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s
+++ b/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s
@@ -52,6 +52,14 @@ _start:
 	ADR_REL	x0, __boot_core_stack_end_exclusive
 	mov	sp, x0
 
+	// Read the CPU's timer counter frequency and store it in ARCH_TIMER_COUNTER_FREQUENCY.
+	// Abort if the frequency read back as 0.
+	ADR_REL	x1, ARCH_TIMER_COUNTER_FREQUENCY // provided by aarch64/time.rs
+	mrs	x2, CNTFRQ_EL0
+	cmp	x2, xzr
+	b.eq	.L_parking_loop
+	str	w2, [x1]
+
 	// Jump to Rust code.
 	b	_start_rust
 
diff --git a/X1_JTAG_boot/src/_arch/aarch64/time.rs b/X1_JTAG_boot/src/_arch/aarch64/time.rs
index c814219ca..3d3a20d71 100644
--- a/X1_JTAG_boot/src/_arch/aarch64/time.rs
+++ b/X1_JTAG_boot/src/_arch/aarch64/time.rs
@@ -11,111 +11,154 @@
 //!
 //! crate::time::arch_time
 
-use crate::{time, warn};
-use core::time::Duration;
+#[cfg(feature = "bsp_rpi3")]
+use crate::warn;
+use core::{
+    num::{NonZeroU128, NonZeroU32, NonZeroU64},
+    ops::{Add, Div},
+    time::Duration,
+};
 use cortex_a::{asm::barrier, registers::*};
-use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
+use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
-const NS_PER_S: u64 = 1_000_000_000;
+const NANOSEC_PER_SEC: NonZeroU64 = NonZeroU64::new(1_000_000_000).unwrap();
 
-/// ARMv8 Generic Timer.
-struct GenericTimer;
+#[derive(Copy, Clone, PartialOrd, PartialEq)]
+struct GenericTimerCounterValue(u64);
 
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
-static TIME_MANAGER: GenericTimer = GenericTimer;
+/// Boot assembly code overwrites this value with the value of CNTFRQ_EL0 before any Rust code is
+/// executed. This given value here is just a (safe) dummy.
+#[no_mangle]
+static ARCH_TIMER_COUNTER_FREQUENCY: NonZeroU32 = NonZeroU32::MIN;
 
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-impl GenericTimer {
-    #[inline(always)]
-    fn read_cntpct(&self) -> u64 {
-        // Prevent that the counter is read ahead of time due to out-of-order execution.
-        unsafe { barrier::isb(barrier::SY) };
-        CNTPCT_EL0.get()
-    }
+impl GenericTimerCounterValue {
+    pub const MAX: Self = GenericTimerCounterValue(u64::MAX);
 }
 
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
+impl Add for GenericTimerCounterValue {
+    type Output = Self;
 
-/// Return a reference to the time manager.
-pub fn time_manager() -> &'static impl time::interface::TimeManager {
-    &TIME_MANAGER
+    fn add(self, other: Self) -> Self {
+        GenericTimerCounterValue(self.0.wrapping_add(other.0))
+    }
 }
 
-//------------------------------------------------------------------------------
-// OS Interface Code
-//------------------------------------------------------------------------------
+impl From<GenericTimerCounterValue> for Duration {
+    fn from(counter_value: GenericTimerCounterValue) -> Self {
+        if counter_value.0 == 0 {
+            return Duration::ZERO;
+        }
 
-impl time::interface::TimeManager for GenericTimer {
-    fn resolution(&self) -> Duration {
-        Duration::from_nanos(NS_PER_S / (CNTFRQ_EL0.get() as u64))
+        // Read volatile is needed here to prevent the compiler from optimizing
+        // ARCH_TIMER_COUNTER_FREQUENCY away.
+        //
+        // This is safe, because all the safety requirements as stated in read_volatile()'s
+        // documentation are fulfilled.
+        let frequency: NonZeroU64 =
+            unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }.into();
+
+        // Div<NonZeroU64> implementation for u64 cannot panic.
+        let secs = counter_value.0.div(frequency);
+
+        // This is safe, because frequency can never be greater than u32::MAX, which means the
+        // largest theoretical value for sub_second_counter_value is (u32::MAX - 1). Therefore,
+        // (sub_second_counter_value * NANOSEC_PER_SEC) cannot overflow an u64.
+        //
+        // The subsequent division ensures the result fits into u32, since the max result is smaller
+        // than NANOSEC_PER_SEC. Therefore, just cast it to u32 using `as`.
+        let sub_second_counter_value = counter_value.0 % frequency;
+        let nanos = unsafe { sub_second_counter_value.unchecked_mul(u64::from(NANOSEC_PER_SEC)) }
+            .div(frequency) as u32;
+
+        Duration::new(secs, nanos)
     }
+}
 
-    fn uptime(&self) -> Duration {
-        let current_count: u64 = self.read_cntpct() * NS_PER_S;
-        let frq: u64 = CNTFRQ_EL0.get() as u64;
+fn max_duration() -> Duration {
+    Duration::from(GenericTimerCounterValue::MAX)
+}
 
-        Duration::from_nanos(current_count / frq)
-    }
+impl TryFrom<Duration> for GenericTimerCounterValue {
+    type Error = &'static str;
 
-    fn spin_for(&self, duration: Duration) {
-        // Instantly return on zero.
-        if duration.as_nanos() == 0 {
-            return;
+    fn try_from(duration: Duration) -> Result<Self, Self::Error> {
+        if duration < resolution() {
+            return Ok(GenericTimerCounterValue(0));
         }
 
-        // Calculate the register compare value.
-        let frq = CNTFRQ_EL0.get();
-        let x = match frq.checked_mul(duration.as_nanos() as u64) {
-            #[allow(unused_imports)]
-            None => {
-                warn!("Spin duration too long, skipping");
-                return;
-            }
-            Some(val) => val,
-        };
-        let tval = x / NS_PER_S;
-
-        // Check if it is within supported bounds.
-        let warn: Option<&str> = if tval == 0 {
-            Some("smaller")
-        // The upper 32 bits of CNTP_TVAL_EL0 are reserved.
-        } else if tval > u32::max_value().into() {
-            Some("bigger")
-        } else {
-            None
-        };
-
-        #[allow(unused_imports)]
-        if let Some(w) = warn {
-            warn!(
-                "Spin duration {} than architecturally supported, skipping",
-                w
-            );
-            return;
+        if duration > max_duration() {
+            return Err("Conversion error. Duration too big");
         }
 
-        // Set the compare value register.
-        CNTP_TVAL_EL0.set(tval);
+        // This is safe, because all the safety requirements as stated in read_volatile()'s
+        // documentation are fulfilled.
+        let frequency: u128 =
+            unsafe { u32::from(core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY)) as u128 };
+        let duration: u128 = duration.as_nanos();
 
-        // Kick off the counting.                       // Disable timer interrupt.
-        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::SET + CNTP_CTL_EL0::IMASK::SET);
+        // This is safe, because frequency can never be greater than u32::MAX, and
+        // (Duration::MAX.as_nanos() * u32::MAX) < u128::MAX.
+        let counter_value =
+            unsafe { duration.unchecked_mul(frequency) }.div(NonZeroU128::from(NANOSEC_PER_SEC));
 
-        // ISTATUS will be '1' when cval ticks have passed. Busy-check it.
-        while !CNTP_CTL_EL0.matches_all(CNTP_CTL_EL0::ISTATUS::SET) {}
-
-        // Disable counting again.
-        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::CLEAR);
+        // Since we checked above that we are <= max_duration(), just cast to u64.
+        Ok(GenericTimerCounterValue(counter_value as u64))
     }
 }
+
+#[inline(always)]
+fn read_cntpct() -> GenericTimerCounterValue {
+    // Prevent that the counter is read ahead of time due to out-of-order execution.
+    unsafe { barrier::isb(barrier::SY) };
+    let cnt = CNTPCT_EL0.get();
+
+    GenericTimerCounterValue(cnt)
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The timer's resolution.
+pub fn resolution() -> Duration {
+    Duration::from(GenericTimerCounterValue(1))
+}
+
+/// The uptime since power-on of the device.
+///
+/// This includes time consumed by firmware and bootloaders.
+pub fn uptime() -> Duration {
+    read_cntpct().into()
+}
+
+/// Spin for a given duration.
+#[cfg(feature = "bsp_rpi3")]
+pub fn spin_for(duration: Duration) {
+    let curr_counter_value = read_cntpct();
+
+    let counter_value_delta: GenericTimerCounterValue = match duration.try_into() {
+        Err(msg) => {
+            warn!("spin_for: {}. Skipping", msg);
+            return;
+        }
+        Ok(val) => val,
+    };
+    let counter_value_target = curr_counter_value + counter_value_delta;
+
+    // Busy wait.
+    //
+    // Read CNTPCT_EL0 directly to avoid the ISB that is part of [`read_cntpct`].
+    while GenericTimerCounterValue(CNTPCT_EL0.get()) < counter_value_target {}
+}
diff --git a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 24958eb56..24e537cff 100644
--- a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -140,7 +140,7 @@ impl GPIOInner {
     /// Disable pull-up/down on pins 14 and 15.
     #[cfg(feature = "bsp_rpi3")]
     fn disable_pud_14_15_bcm2837(&mut self) {
-        use crate::{time, time::interface::TimeManager};
+        use crate::time;
         use core::time::Duration;
 
         // The Linux 2837 GPIO driver waits 1 µs between the steps.
diff --git a/X1_JTAG_boot/src/main.rs b/X1_JTAG_boot/src/main.rs
index a985c679f..a38b1ef51 100644
--- a/X1_JTAG_boot/src/main.rs
+++ b/X1_JTAG_boot/src/main.rs
@@ -108,9 +108,12 @@
 
 #![allow(clippy::upper_case_acronyms)]
 #![feature(asm_const)]
+#![feature(const_option)]
 #![feature(format_args_nl)]
+#![feature(nonzero_min_max)]
 #![feature(panic_info_message)]
 #![feature(trait_alias)]
+#![feature(unchecked_math)]
 #![no_main]
 #![no_std]
 
diff --git a/X1_JTAG_boot/src/panic_wait.rs b/X1_JTAG_boot/src/panic_wait.rs
index edd838855..ccf54f61f 100644
--- a/X1_JTAG_boot/src/panic_wait.rs
+++ b/X1_JTAG_boot/src/panic_wait.rs
@@ -42,8 +42,6 @@ fn panic_prevent_reenter() {
 
 #[panic_handler]
 fn panic(info: &PanicInfo) -> ! {
-    use crate::time::interface::TimeManager;
-
     // Protect against panic infinite loops if any of the following code panics itself.
     panic_prevent_reenter();
 
diff --git a/X1_JTAG_boot/src/print.rs b/X1_JTAG_boot/src/print.rs
index 8705eec0d..fe13b334c 100644
--- a/X1_JTAG_boot/src/print.rs
+++ b/X1_JTAG_boot/src/print.rs
@@ -39,8 +39,6 @@ macro_rules! println {
 #[macro_export]
 macro_rules! info {
     ($string:expr) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -50,8 +48,6 @@ macro_rules! info {
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -67,8 +63,6 @@ macro_rules! info {
 #[macro_export]
 macro_rules! warn {
     ($string:expr) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
@@ -78,8 +72,6 @@ macro_rules! warn {
         ));
     });
     ($format_string:expr, $($arg:tt)*) => ({
-        use $crate::time::interface::TimeManager;
-
         let timestamp = $crate::time::time_manager().uptime();
 
         $crate::print::_print(format_args_nl!(
diff --git a/X1_JTAG_boot/src/time.rs b/X1_JTAG_boot/src/time.rs
index 6d92b1966..c6b40068c 100644
--- a/X1_JTAG_boot/src/time.rs
+++ b/X1_JTAG_boot/src/time.rs
@@ -8,30 +8,46 @@
 #[path = "_arch/aarch64/time.rs"]
 mod arch_time;
 
+use core::time::Duration;
+
 //--------------------------------------------------------------------------------------------------
-// Architectural Public Reexports
+// Public Definitions
 //--------------------------------------------------------------------------------------------------
-pub use arch_time::time_manager;
+
+/// Provides time management functions.
+pub struct TimeManager;
 
 //--------------------------------------------------------------------------------------------------
-// Public Definitions
+// Global instances
 //--------------------------------------------------------------------------------------------------
 
-/// Timekeeping interfaces.
-pub mod interface {
-    use core::time::Duration;
+static TIME_MANAGER: TimeManager = TimeManager::new();
 
-    /// Time management functions.
-    pub trait TimeManager {
-        /// The timer's resolution.
-        fn resolution(&self) -> Duration;
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
 
-        /// The uptime since power-on of the device.
-        ///
-        /// This includes time consumed by firmware and bootloaders.
-        fn uptime(&self) -> Duration;
+/// Return a reference to the global TimeManager.
+pub fn time_manager() -> &'static TimeManager {
+    &TIME_MANAGER
+}
+
+impl TimeManager {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self
+    }
+
+    /// The uptime since power-on of the device.
+    ///
+    /// This includes time consumed by firmware and bootloaders.
+    pub fn uptime(&self) -> Duration {
+        arch_time::uptime()
+    }
 
-        /// Spin for a given duration.
-        fn spin_for(&self, duration: Duration);
+    /// Spin for a given duration.
+    #[cfg(feature = "bsp_rpi3")]
+    pub fn spin_for(&self, duration: Duration) {
+        arch_time::spin_for(duration)
     }
 }

From c21641e9b551d4fc1b574720b97a74beaba883ee Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Fri, 23 Sep 2022 22:54:40 +0200
Subject: [PATCH 187/214] devtool: Fix boot test discovery

---
 utils/devtool.rb | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/utils/devtool.rb b/utils/devtool.rb
index 00417125b..47141c1d8 100755
--- a/utils/devtool.rb
+++ b/utils/devtool.rb
@@ -94,7 +94,7 @@ def test_integration(bsp)
     private
 
     def boot_test?
-        Dir.exist?("#{@folder}/kernel/tests")
+        Dir.exist?("#{@folder}/tests") || Dir.exist?("#{@folder}/kernel/tests")
     end
 
     def unit_integration_tests?

From b22b0b179217007b02a437f305c20443e1643f18 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Fri, 23 Sep 2022 22:56:32 +0200
Subject: [PATCH 188/214] Be more consistent in boot.rs GPR choices

---
 02_runtime_init/README.md                         |  8 ++++----
 02_runtime_init/src/_arch/aarch64/cpu/boot.s      |  8 ++++----
 03_hacky_hello_world/src/_arch/aarch64/cpu/boot.s |  8 ++++----
 04_safe_globals/src/_arch/aarch64/cpu/boot.s      |  8 ++++----
 05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s |  8 ++++----
 06_uart_chainloader/src/_arch/aarch64/cpu/boot.s  |  8 ++++----
 07_timestamps/src/_arch/aarch64/cpu/boot.s        |  8 ++++----
 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s     |  8 ++++----
 09_privilege_level/README.md                      | 15 ++++++++++++---
 16_virtual_mem_part4_higher_half_kernel/README.md | 12 ++++++------
 .../kernel/src/_arch/aarch64/cpu/boot.s           | 12 ++++++------
 .../kernel/src/_arch/aarch64/cpu/boot.s           | 12 ++++++------
 18_backtrace/kernel/src/_arch/aarch64/cpu/boot.s  | 12 ++++++------
 .../kernel/src/_arch/aarch64/cpu/boot.s           | 12 ++++++------
 14 files changed, 74 insertions(+), 65 deletions(-)

diff --git a/02_runtime_init/README.md b/02_runtime_init/README.md
index f9d59b301..f5b9355c5 100644
--- a/02_runtime_init/README.md
+++ b/02_runtime_init/README.md
@@ -117,10 +117,10 @@ diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.s 02_runtime_init/src/_arch
  //------------------------------------------------------------------------------
  _start:
 +	// Only proceed on the boot core. Park it otherwise.
-+	mrs	x1, MPIDR_EL1
-+	and	x1, x1, {CONST_CORE_ID_MASK}
-+	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
-+	cmp	x1, x2
++	mrs	x0, MPIDR_EL1
++	and	x0, x0, {CONST_CORE_ID_MASK}
++	ldr	x1, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
++	cmp	x0, x1
 +	b.ne	.L_parking_loop
 +
 +	// If execution reaches here, it is the boot core.
diff --git a/02_runtime_init/src/_arch/aarch64/cpu/boot.s b/02_runtime_init/src/_arch/aarch64/cpu/boot.s
index 1f70169f9..0011c6074 100644
--- a/02_runtime_init/src/_arch/aarch64/cpu/boot.s
+++ b/02_runtime_init/src/_arch/aarch64/cpu/boot.s
@@ -28,10 +28,10 @@
 //------------------------------------------------------------------------------
 _start:
 	// Only proceed on the boot core. Park it otherwise.
-	mrs	x1, MPIDR_EL1
-	and	x1, x1, {CONST_CORE_ID_MASK}
-	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
-	cmp	x1, x2
+	mrs	x0, MPIDR_EL1
+	and	x0, x0, {CONST_CORE_ID_MASK}
+	ldr	x1, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
+	cmp	x0, x1
 	b.ne	.L_parking_loop
 
 	// If execution reaches here, it is the boot core.
diff --git a/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.s b/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.s
index 1f70169f9..0011c6074 100644
--- a/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.s
+++ b/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.s
@@ -28,10 +28,10 @@
 //------------------------------------------------------------------------------
 _start:
 	// Only proceed on the boot core. Park it otherwise.
-	mrs	x1, MPIDR_EL1
-	and	x1, x1, {CONST_CORE_ID_MASK}
-	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
-	cmp	x1, x2
+	mrs	x0, MPIDR_EL1
+	and	x0, x0, {CONST_CORE_ID_MASK}
+	ldr	x1, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
+	cmp	x0, x1
 	b.ne	.L_parking_loop
 
 	// If execution reaches here, it is the boot core.
diff --git a/04_safe_globals/src/_arch/aarch64/cpu/boot.s b/04_safe_globals/src/_arch/aarch64/cpu/boot.s
index 1f70169f9..0011c6074 100644
--- a/04_safe_globals/src/_arch/aarch64/cpu/boot.s
+++ b/04_safe_globals/src/_arch/aarch64/cpu/boot.s
@@ -28,10 +28,10 @@
 //------------------------------------------------------------------------------
 _start:
 	// Only proceed on the boot core. Park it otherwise.
-	mrs	x1, MPIDR_EL1
-	and	x1, x1, {CONST_CORE_ID_MASK}
-	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
-	cmp	x1, x2
+	mrs	x0, MPIDR_EL1
+	and	x0, x0, {CONST_CORE_ID_MASK}
+	ldr	x1, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
+	cmp	x0, x1
 	b.ne	.L_parking_loop
 
 	// If execution reaches here, it is the boot core.
diff --git a/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s b/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s
index 1f70169f9..0011c6074 100644
--- a/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s
+++ b/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s
@@ -28,10 +28,10 @@
 //------------------------------------------------------------------------------
 _start:
 	// Only proceed on the boot core. Park it otherwise.
-	mrs	x1, MPIDR_EL1
-	and	x1, x1, {CONST_CORE_ID_MASK}
-	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
-	cmp	x1, x2
+	mrs	x0, MPIDR_EL1
+	and	x0, x0, {CONST_CORE_ID_MASK}
+	ldr	x1, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
+	cmp	x0, x1
 	b.ne	.L_parking_loop
 
 	// If execution reaches here, it is the boot core.
diff --git a/06_uart_chainloader/src/_arch/aarch64/cpu/boot.s b/06_uart_chainloader/src/_arch/aarch64/cpu/boot.s
index 322573cad..3ed0d4941 100644
--- a/06_uart_chainloader/src/_arch/aarch64/cpu/boot.s
+++ b/06_uart_chainloader/src/_arch/aarch64/cpu/boot.s
@@ -39,10 +39,10 @@
 //------------------------------------------------------------------------------
 _start:
 	// Only proceed on the boot core. Park it otherwise.
-	mrs	x1, MPIDR_EL1
-	and	x1, x1, {CONST_CORE_ID_MASK}
-	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
-	cmp	x1, x2
+	mrs	x0, MPIDR_EL1
+	and	x0, x0, {CONST_CORE_ID_MASK}
+	ldr	x1, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
+	cmp	x0, x1
 	b.ne	.L_parking_loop
 
 	// If execution reaches here, it is the boot core.
diff --git a/07_timestamps/src/_arch/aarch64/cpu/boot.s b/07_timestamps/src/_arch/aarch64/cpu/boot.s
index aa701fd1b..0b801b4bd 100644
--- a/07_timestamps/src/_arch/aarch64/cpu/boot.s
+++ b/07_timestamps/src/_arch/aarch64/cpu/boot.s
@@ -28,10 +28,10 @@
 //------------------------------------------------------------------------------
 _start:
 	// Only proceed on the boot core. Park it otherwise.
-	mrs	x1, MPIDR_EL1
-	and	x1, x1, {CONST_CORE_ID_MASK}
-	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
-	cmp	x1, x2
+	mrs	x0, MPIDR_EL1
+	and	x0, x0, {CONST_CORE_ID_MASK}
+	ldr	x1, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
+	cmp	x0, x1
 	b.ne	.L_parking_loop
 
 	// If execution reaches here, it is the boot core.
diff --git a/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s b/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s
index aa701fd1b..0b801b4bd 100644
--- a/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s
+++ b/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s
@@ -28,10 +28,10 @@
 //------------------------------------------------------------------------------
 _start:
 	// Only proceed on the boot core. Park it otherwise.
-	mrs	x1, MPIDR_EL1
-	and	x1, x1, {CONST_CORE_ID_MASK}
-	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
-	cmp	x1, x2
+	mrs	x0, MPIDR_EL1
+	and	x0, x0, {CONST_CORE_ID_MASK}
+	ldr	x1, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
+	cmp	x0, x1
 	b.ne	.L_parking_loop
 
 	// If execution reaches here, it is the boot core.
diff --git a/09_privilege_level/README.md b/09_privilege_level/README.md
index afcfe8f6f..7f7c58d18 100644
--- a/09_privilege_level/README.md
+++ b/09_privilege_level/README.md
@@ -291,7 +291,7 @@ diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs 09_privilege_level/src/
 diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s 09_privilege_level/src/_arch/aarch64/cpu/boot.s
 --- 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s
 +++ 09_privilege_level/src/_arch/aarch64/cpu/boot.s
-@@ -27,6 +27,11 @@
+@@ -27,11 +27,16 @@
  // fn _start()
  //------------------------------------------------------------------------------
  _start:
@@ -301,8 +301,17 @@ diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s 09_privilege_level/src/_
 +	b.ne	.L_parking_loop
 +
  	// Only proceed on the boot core. Park it otherwise.
- 	mrs	x1, MPIDR_EL1
- 	and	x1, x1, {CONST_CORE_ID_MASK}
+-	mrs	x0, MPIDR_EL1
+-	and	x0, x0, {CONST_CORE_ID_MASK}
+-	ldr	x1, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
+-	cmp	x0, x1
++	mrs	x1, MPIDR_EL1
++	and	x1, x1, {CONST_CORE_ID_MASK}
++	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
++	cmp	x1, x2
+ 	b.ne	.L_parking_loop
+
+ 	// If execution reaches here, it is the boot core.
 @@ -48,7 +53,7 @@
 
  	// Prepare the jump to Rust code.
diff --git a/16_virtual_mem_part4_higher_half_kernel/README.md b/16_virtual_mem_part4_higher_half_kernel/README.md
index 6918f8973..494506da3 100644
--- a/16_virtual_mem_part4_higher_half_kernel/README.md
+++ b/16_virtual_mem_part4_higher_half_kernel/README.md
@@ -432,20 +432,20 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/b
 +	// Setting the stack pointer to this value ensures that anything that still runs in EL2,
 +	// until the kernel returns to EL1 with the MMU enabled, works as well. After the return to
 +	// EL1, the virtual address of the stack retrieved above will be used.
-+	ADR_REL	x4, __boot_core_stack_end_exclusive
-+	mov	sp, x4
++	ADR_REL	x3, __boot_core_stack_end_exclusive
++	mov	sp, x3
 
  	// Read the CPU's timer counter frequency and store it in ARCH_TIMER_COUNTER_FREQUENCY.
  	// Abort if the frequency read back as 0.
 -	ADR_REL	x2, ARCH_TIMER_COUNTER_FREQUENCY // provided by aarch64/time.rs
 -	mrs	x3, CNTFRQ_EL0
 -	cmp	x3, xzr
-+	ADR_REL	x5, ARCH_TIMER_COUNTER_FREQUENCY // provided by aarch64/time.rs
-+	mrs	x6, CNTFRQ_EL0
-+	cmp	x6, xzr
++	ADR_REL	x4, ARCH_TIMER_COUNTER_FREQUENCY // provided by aarch64/time.rs
++	mrs	x5, CNTFRQ_EL0
++	cmp	x5, xzr
  	b.eq	.L_parking_loop
 -	str	w3, [x2]
-+	str	w6, [x5]
++	str	w5, [x4]
 
 -	// Jump to Rust code. x0 and x1 hold the function arguments provided to _start_rust().
 +	// Jump to Rust code. x0, x1 and x2 hold the function arguments provided to _start_rust().
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.s b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.s
index bf6e32e42..1a8c88010 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.s
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.s
@@ -81,16 +81,16 @@ _start:
 	// Setting the stack pointer to this value ensures that anything that still runs in EL2,
 	// until the kernel returns to EL1 with the MMU enabled, works as well. After the return to
 	// EL1, the virtual address of the stack retrieved above will be used.
-	ADR_REL	x4, __boot_core_stack_end_exclusive
-	mov	sp, x4
+	ADR_REL	x3, __boot_core_stack_end_exclusive
+	mov	sp, x3
 
 	// Read the CPU's timer counter frequency and store it in ARCH_TIMER_COUNTER_FREQUENCY.
 	// Abort if the frequency read back as 0.
-	ADR_REL	x5, ARCH_TIMER_COUNTER_FREQUENCY // provided by aarch64/time.rs
-	mrs	x6, CNTFRQ_EL0
-	cmp	x6, xzr
+	ADR_REL	x4, ARCH_TIMER_COUNTER_FREQUENCY // provided by aarch64/time.rs
+	mrs	x5, CNTFRQ_EL0
+	cmp	x5, xzr
 	b.eq	.L_parking_loop
-	str	w6, [x5]
+	str	w5, [x4]
 
 	// Jump to Rust code. x0, x1 and x2 hold the function arguments provided to _start_rust().
 	b	_start_rust
diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.s b/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.s
index bf6e32e42..1a8c88010 100644
--- a/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.s
+++ b/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.s
@@ -81,16 +81,16 @@ _start:
 	// Setting the stack pointer to this value ensures that anything that still runs in EL2,
 	// until the kernel returns to EL1 with the MMU enabled, works as well. After the return to
 	// EL1, the virtual address of the stack retrieved above will be used.
-	ADR_REL	x4, __boot_core_stack_end_exclusive
-	mov	sp, x4
+	ADR_REL	x3, __boot_core_stack_end_exclusive
+	mov	sp, x3
 
 	// Read the CPU's timer counter frequency and store it in ARCH_TIMER_COUNTER_FREQUENCY.
 	// Abort if the frequency read back as 0.
-	ADR_REL	x5, ARCH_TIMER_COUNTER_FREQUENCY // provided by aarch64/time.rs
-	mrs	x6, CNTFRQ_EL0
-	cmp	x6, xzr
+	ADR_REL	x4, ARCH_TIMER_COUNTER_FREQUENCY // provided by aarch64/time.rs
+	mrs	x5, CNTFRQ_EL0
+	cmp	x5, xzr
 	b.eq	.L_parking_loop
-	str	w6, [x5]
+	str	w5, [x4]
 
 	// Jump to Rust code. x0, x1 and x2 hold the function arguments provided to _start_rust().
 	b	_start_rust
diff --git a/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.s b/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.s
index bf6e32e42..1a8c88010 100644
--- a/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.s
+++ b/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.s
@@ -81,16 +81,16 @@ _start:
 	// Setting the stack pointer to this value ensures that anything that still runs in EL2,
 	// until the kernel returns to EL1 with the MMU enabled, works as well. After the return to
 	// EL1, the virtual address of the stack retrieved above will be used.
-	ADR_REL	x4, __boot_core_stack_end_exclusive
-	mov	sp, x4
+	ADR_REL	x3, __boot_core_stack_end_exclusive
+	mov	sp, x3
 
 	// Read the CPU's timer counter frequency and store it in ARCH_TIMER_COUNTER_FREQUENCY.
 	// Abort if the frequency read back as 0.
-	ADR_REL	x5, ARCH_TIMER_COUNTER_FREQUENCY // provided by aarch64/time.rs
-	mrs	x6, CNTFRQ_EL0
-	cmp	x6, xzr
+	ADR_REL	x4, ARCH_TIMER_COUNTER_FREQUENCY // provided by aarch64/time.rs
+	mrs	x5, CNTFRQ_EL0
+	cmp	x5, xzr
 	b.eq	.L_parking_loop
-	str	w6, [x5]
+	str	w5, [x4]
 
 	// Jump to Rust code. x0, x1 and x2 hold the function arguments provided to _start_rust().
 	b	_start_rust
diff --git a/19_kernel_heap/kernel/src/_arch/aarch64/cpu/boot.s b/19_kernel_heap/kernel/src/_arch/aarch64/cpu/boot.s
index bf6e32e42..1a8c88010 100644
--- a/19_kernel_heap/kernel/src/_arch/aarch64/cpu/boot.s
+++ b/19_kernel_heap/kernel/src/_arch/aarch64/cpu/boot.s
@@ -81,16 +81,16 @@ _start:
 	// Setting the stack pointer to this value ensures that anything that still runs in EL2,
 	// until the kernel returns to EL1 with the MMU enabled, works as well. After the return to
 	// EL1, the virtual address of the stack retrieved above will be used.
-	ADR_REL	x4, __boot_core_stack_end_exclusive
-	mov	sp, x4
+	ADR_REL	x3, __boot_core_stack_end_exclusive
+	mov	sp, x3
 
 	// Read the CPU's timer counter frequency and store it in ARCH_TIMER_COUNTER_FREQUENCY.
 	// Abort if the frequency read back as 0.
-	ADR_REL	x5, ARCH_TIMER_COUNTER_FREQUENCY // provided by aarch64/time.rs
-	mrs	x6, CNTFRQ_EL0
-	cmp	x6, xzr
+	ADR_REL	x4, ARCH_TIMER_COUNTER_FREQUENCY // provided by aarch64/time.rs
+	mrs	x5, CNTFRQ_EL0
+	cmp	x5, xzr
 	b.eq	.L_parking_loop
-	str	w6, [x5]
+	str	w5, [x4]
 
 	// Jump to Rust code. x0, x1 and x2 hold the function arguments provided to _start_rust().
 	b	_start_rust

From 2345214367cfc9a82dfdf39da257b3859e95da98 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 26 Sep 2022 22:38:55 +0200
Subject: [PATCH 189/214] Various minor improvements

---
 07_timestamps/README.md                       | 22 ++---
 07_timestamps/src/_arch/aarch64/time.rs       | 22 ++---
 08_hw_debug_JTAG/src/_arch/aarch64/time.rs    | 22 ++---
 09_privilege_level/src/_arch/aarch64/time.rs  | 22 ++---
 .../src/_arch/aarch64/time.rs                 | 22 ++---
 .../src/_arch/aarch64/time.rs                 | 22 ++---
 .../kernel/src/_arch/aarch64/time.rs          | 22 ++---
 13_exceptions_part2_peripheral_IRQs/README.md | 42 +++++-----
 .../kernel/src/_arch/aarch64/time.rs          | 22 ++---
 .../kernel/src/bsp/device_driver/arm/gicv2.rs |  5 +-
 .../bcm/bcm2xxx_interrupt_controller.rs       | 15 ++--
 .../peripheral_ic.rs                          | 11 ++-
 .../kernel/src/exception/asynchronous.rs      |  3 +
 14_virtual_mem_part2_mmio_remap/README.md     | 18 ++--
 .../kernel/src/_arch/aarch64/time.rs          | 22 ++---
 .../kernel/src/bsp/device_driver/arm/gicv2.rs |  5 +-
 .../bcm/bcm2xxx_interrupt_controller.rs       | 15 ++--
 .../peripheral_ic.rs                          | 11 ++-
 .../kernel/src/exception/asynchronous.rs      |  3 +
 .../kernel/src/_arch/aarch64/time.rs          | 22 ++---
 .../kernel/src/bsp/device_driver/arm/gicv2.rs |  5 +-
 .../bcm/bcm2xxx_interrupt_controller.rs       | 15 ++--
 .../peripheral_ic.rs                          | 11 ++-
 .../kernel/src/exception/asynchronous.rs      |  3 +
 .../kernel/src/_arch/aarch64/time.rs          | 22 ++---
 .../kernel/src/bsp/device_driver/arm/gicv2.rs |  5 +-
 .../bcm/bcm2xxx_interrupt_controller.rs       | 15 ++--
 .../peripheral_ic.rs                          | 11 ++-
 .../kernel/src/exception/asynchronous.rs      |  3 +
 17_kernel_symbols/README.md                   | 28 +++++--
 .../kernel/src/_arch/aarch64/time.rs          | 22 ++---
 .../kernel/src/bsp/device_driver/arm/gicv2.rs |  5 +-
 .../bcm/bcm2xxx_interrupt_controller.rs       | 15 ++--
 .../peripheral_ic.rs                          | 11 ++-
 .../kernel/src/exception/asynchronous.rs      |  3 +
 17_kernel_symbols/kernel/src/symbols.rs       | 13 ++-
 18_backtrace/kernel/src/_arch/aarch64/time.rs | 22 ++---
 .../kernel/src/bsp/device_driver/arm/gicv2.rs |  5 +-
 .../bcm/bcm2xxx_interrupt_controller.rs       | 15 ++--
 .../peripheral_ic.rs                          | 11 ++-
 .../kernel/src/exception/asynchronous.rs      |  3 +
 18_backtrace/kernel/src/symbols.rs            | 13 ++-
 19_kernel_heap/README.md                      | 83 ++++++++-----------
 .../kernel/src/_arch/aarch64/time.rs          | 22 ++---
 .../kernel/src/bsp/device_driver/arm/gicv2.rs |  9 +-
 .../bcm/bcm2xxx_interrupt_controller.rs       | 16 ++--
 .../peripheral_ic.rs                          | 16 ++--
 .../kernel/src/exception/asynchronous.rs      |  3 +
 19_kernel_heap/kernel/src/symbols.rs          | 13 ++-
 X1_JTAG_boot/src/_arch/aarch64/time.rs        | 22 ++---
 50 files changed, 407 insertions(+), 381 deletions(-)

diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index a78e508b9..c96a30e44 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -302,6 +302,15 @@ diff -uNr 06_uart_chainloader/src/_arch/aarch64/time.rs 07_timestamps/src/_arch/
 +// Private Code
 +//--------------------------------------------------------------------------------------------------
 +
++fn arch_timer_counter_frequency() -> NonZeroU32 {
++    // Read volatile is needed here to prevent the compiler from optimizing
++    // ARCH_TIMER_COUNTER_FREQUENCY away.
++    //
++    // This is safe, because all the safety requirements as stated in read_volatile()'s
++    // documentation are fulfilled.
++    unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }
++}
++
 +impl GenericTimerCounterValue {
 +    pub const MAX: Self = GenericTimerCounterValue(u64::MAX);
 +}
@@ -320,13 +329,7 @@ diff -uNr 06_uart_chainloader/src/_arch/aarch64/time.rs 07_timestamps/src/_arch/
 +            return Duration::ZERO;
 +        }
 +
-+        // Read volatile is needed here to prevent the compiler from optimizing
-+        // ARCH_TIMER_COUNTER_FREQUENCY away.
-+        //
-+        // This is safe, because all the safety requirements as stated in read_volatile()'s
-+        // documentation are fulfilled.
-+        let frequency: NonZeroU64 =
-+            unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }.into();
++        let frequency: NonZeroU64 = arch_timer_counter_frequency().into();
 +
 +        // Div<NonZeroU64> implementation for u64 cannot panic.
 +        let secs = counter_value.0.div(frequency);
@@ -361,10 +364,7 @@ diff -uNr 06_uart_chainloader/src/_arch/aarch64/time.rs 07_timestamps/src/_arch/
 +            return Err("Conversion error. Duration too big");
 +        }
 +
-+        // This is safe, because all the safety requirements as stated in read_volatile()'s
-+        // documentation are fulfilled.
-+        let frequency: u128 =
-+            unsafe { u32::from(core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY)) as u128 };
++        let frequency: u128 = u32::from(arch_timer_counter_frequency()) as u128;
 +        let duration: u128 = duration.as_nanos();
 +
 +        // This is safe, because frequency can never be greater than u32::MAX, and
diff --git a/07_timestamps/src/_arch/aarch64/time.rs b/07_timestamps/src/_arch/aarch64/time.rs
index 255a5a45d..ad8ba84dd 100644
--- a/07_timestamps/src/_arch/aarch64/time.rs
+++ b/07_timestamps/src/_arch/aarch64/time.rs
@@ -42,6 +42,15 @@ static ARCH_TIMER_COUNTER_FREQUENCY: NonZeroU32 = NonZeroU32::MIN;
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
+fn arch_timer_counter_frequency() -> NonZeroU32 {
+    // Read volatile is needed here to prevent the compiler from optimizing
+    // ARCH_TIMER_COUNTER_FREQUENCY away.
+    //
+    // This is safe, because all the safety requirements as stated in read_volatile()'s
+    // documentation are fulfilled.
+    unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }
+}
+
 impl GenericTimerCounterValue {
     pub const MAX: Self = GenericTimerCounterValue(u64::MAX);
 }
@@ -60,13 +69,7 @@ impl From<GenericTimerCounterValue> for Duration {
             return Duration::ZERO;
         }
 
-        // Read volatile is needed here to prevent the compiler from optimizing
-        // ARCH_TIMER_COUNTER_FREQUENCY away.
-        //
-        // This is safe, because all the safety requirements as stated in read_volatile()'s
-        // documentation are fulfilled.
-        let frequency: NonZeroU64 =
-            unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }.into();
+        let frequency: NonZeroU64 = arch_timer_counter_frequency().into();
 
         // Div<NonZeroU64> implementation for u64 cannot panic.
         let secs = counter_value.0.div(frequency);
@@ -101,10 +104,7 @@ impl TryFrom<Duration> for GenericTimerCounterValue {
             return Err("Conversion error. Duration too big");
         }
 
-        // This is safe, because all the safety requirements as stated in read_volatile()'s
-        // documentation are fulfilled.
-        let frequency: u128 =
-            unsafe { u32::from(core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY)) as u128 };
+        let frequency: u128 = u32::from(arch_timer_counter_frequency()) as u128;
         let duration: u128 = duration.as_nanos();
 
         // This is safe, because frequency can never be greater than u32::MAX, and
diff --git a/08_hw_debug_JTAG/src/_arch/aarch64/time.rs b/08_hw_debug_JTAG/src/_arch/aarch64/time.rs
index 255a5a45d..ad8ba84dd 100644
--- a/08_hw_debug_JTAG/src/_arch/aarch64/time.rs
+++ b/08_hw_debug_JTAG/src/_arch/aarch64/time.rs
@@ -42,6 +42,15 @@ static ARCH_TIMER_COUNTER_FREQUENCY: NonZeroU32 = NonZeroU32::MIN;
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
+fn arch_timer_counter_frequency() -> NonZeroU32 {
+    // Read volatile is needed here to prevent the compiler from optimizing
+    // ARCH_TIMER_COUNTER_FREQUENCY away.
+    //
+    // This is safe, because all the safety requirements as stated in read_volatile()'s
+    // documentation are fulfilled.
+    unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }
+}
+
 impl GenericTimerCounterValue {
     pub const MAX: Self = GenericTimerCounterValue(u64::MAX);
 }
@@ -60,13 +69,7 @@ impl From<GenericTimerCounterValue> for Duration {
             return Duration::ZERO;
         }
 
-        // Read volatile is needed here to prevent the compiler from optimizing
-        // ARCH_TIMER_COUNTER_FREQUENCY away.
-        //
-        // This is safe, because all the safety requirements as stated in read_volatile()'s
-        // documentation are fulfilled.
-        let frequency: NonZeroU64 =
-            unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }.into();
+        let frequency: NonZeroU64 = arch_timer_counter_frequency().into();
 
         // Div<NonZeroU64> implementation for u64 cannot panic.
         let secs = counter_value.0.div(frequency);
@@ -101,10 +104,7 @@ impl TryFrom<Duration> for GenericTimerCounterValue {
             return Err("Conversion error. Duration too big");
         }
 
-        // This is safe, because all the safety requirements as stated in read_volatile()'s
-        // documentation are fulfilled.
-        let frequency: u128 =
-            unsafe { u32::from(core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY)) as u128 };
+        let frequency: u128 = u32::from(arch_timer_counter_frequency()) as u128;
         let duration: u128 = duration.as_nanos();
 
         // This is safe, because frequency can never be greater than u32::MAX, and
diff --git a/09_privilege_level/src/_arch/aarch64/time.rs b/09_privilege_level/src/_arch/aarch64/time.rs
index 255a5a45d..ad8ba84dd 100644
--- a/09_privilege_level/src/_arch/aarch64/time.rs
+++ b/09_privilege_level/src/_arch/aarch64/time.rs
@@ -42,6 +42,15 @@ static ARCH_TIMER_COUNTER_FREQUENCY: NonZeroU32 = NonZeroU32::MIN;
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
+fn arch_timer_counter_frequency() -> NonZeroU32 {
+    // Read volatile is needed here to prevent the compiler from optimizing
+    // ARCH_TIMER_COUNTER_FREQUENCY away.
+    //
+    // This is safe, because all the safety requirements as stated in read_volatile()'s
+    // documentation are fulfilled.
+    unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }
+}
+
 impl GenericTimerCounterValue {
     pub const MAX: Self = GenericTimerCounterValue(u64::MAX);
 }
@@ -60,13 +69,7 @@ impl From<GenericTimerCounterValue> for Duration {
             return Duration::ZERO;
         }
 
-        // Read volatile is needed here to prevent the compiler from optimizing
-        // ARCH_TIMER_COUNTER_FREQUENCY away.
-        //
-        // This is safe, because all the safety requirements as stated in read_volatile()'s
-        // documentation are fulfilled.
-        let frequency: NonZeroU64 =
-            unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }.into();
+        let frequency: NonZeroU64 = arch_timer_counter_frequency().into();
 
         // Div<NonZeroU64> implementation for u64 cannot panic.
         let secs = counter_value.0.div(frequency);
@@ -101,10 +104,7 @@ impl TryFrom<Duration> for GenericTimerCounterValue {
             return Err("Conversion error. Duration too big");
         }
 
-        // This is safe, because all the safety requirements as stated in read_volatile()'s
-        // documentation are fulfilled.
-        let frequency: u128 =
-            unsafe { u32::from(core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY)) as u128 };
+        let frequency: u128 = u32::from(arch_timer_counter_frequency()) as u128;
         let duration: u128 = duration.as_nanos();
 
         // This is safe, because frequency can never be greater than u32::MAX, and
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs
index 255a5a45d..ad8ba84dd 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs
@@ -42,6 +42,15 @@ static ARCH_TIMER_COUNTER_FREQUENCY: NonZeroU32 = NonZeroU32::MIN;
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
+fn arch_timer_counter_frequency() -> NonZeroU32 {
+    // Read volatile is needed here to prevent the compiler from optimizing
+    // ARCH_TIMER_COUNTER_FREQUENCY away.
+    //
+    // This is safe, because all the safety requirements as stated in read_volatile()'s
+    // documentation are fulfilled.
+    unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }
+}
+
 impl GenericTimerCounterValue {
     pub const MAX: Self = GenericTimerCounterValue(u64::MAX);
 }
@@ -60,13 +69,7 @@ impl From<GenericTimerCounterValue> for Duration {
             return Duration::ZERO;
         }
 
-        // Read volatile is needed here to prevent the compiler from optimizing
-        // ARCH_TIMER_COUNTER_FREQUENCY away.
-        //
-        // This is safe, because all the safety requirements as stated in read_volatile()'s
-        // documentation are fulfilled.
-        let frequency: NonZeroU64 =
-            unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }.into();
+        let frequency: NonZeroU64 = arch_timer_counter_frequency().into();
 
         // Div<NonZeroU64> implementation for u64 cannot panic.
         let secs = counter_value.0.div(frequency);
@@ -101,10 +104,7 @@ impl TryFrom<Duration> for GenericTimerCounterValue {
             return Err("Conversion error. Duration too big");
         }
 
-        // This is safe, because all the safety requirements as stated in read_volatile()'s
-        // documentation are fulfilled.
-        let frequency: u128 =
-            unsafe { u32::from(core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY)) as u128 };
+        let frequency: u128 = u32::from(arch_timer_counter_frequency()) as u128;
         let duration: u128 = duration.as_nanos();
 
         // This is safe, because frequency can never be greater than u32::MAX, and
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/time.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/time.rs
index 255a5a45d..ad8ba84dd 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/time.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/time.rs
@@ -42,6 +42,15 @@ static ARCH_TIMER_COUNTER_FREQUENCY: NonZeroU32 = NonZeroU32::MIN;
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
+fn arch_timer_counter_frequency() -> NonZeroU32 {
+    // Read volatile is needed here to prevent the compiler from optimizing
+    // ARCH_TIMER_COUNTER_FREQUENCY away.
+    //
+    // This is safe, because all the safety requirements as stated in read_volatile()'s
+    // documentation are fulfilled.
+    unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }
+}
+
 impl GenericTimerCounterValue {
     pub const MAX: Self = GenericTimerCounterValue(u64::MAX);
 }
@@ -60,13 +69,7 @@ impl From<GenericTimerCounterValue> for Duration {
             return Duration::ZERO;
         }
 
-        // Read volatile is needed here to prevent the compiler from optimizing
-        // ARCH_TIMER_COUNTER_FREQUENCY away.
-        //
-        // This is safe, because all the safety requirements as stated in read_volatile()'s
-        // documentation are fulfilled.
-        let frequency: NonZeroU64 =
-            unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }.into();
+        let frequency: NonZeroU64 = arch_timer_counter_frequency().into();
 
         // Div<NonZeroU64> implementation for u64 cannot panic.
         let secs = counter_value.0.div(frequency);
@@ -101,10 +104,7 @@ impl TryFrom<Duration> for GenericTimerCounterValue {
             return Err("Conversion error. Duration too big");
         }
 
-        // This is safe, because all the safety requirements as stated in read_volatile()'s
-        // documentation are fulfilled.
-        let frequency: u128 =
-            unsafe { u32::from(core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY)) as u128 };
+        let frequency: u128 = u32::from(arch_timer_counter_frequency()) as u128;
         let duration: u128 = duration.as_nanos();
 
         // This is safe, because frequency can never be greater than u32::MAX, and
diff --git a/12_integrated_testing/kernel/src/_arch/aarch64/time.rs b/12_integrated_testing/kernel/src/_arch/aarch64/time.rs
index 255a5a45d..ad8ba84dd 100644
--- a/12_integrated_testing/kernel/src/_arch/aarch64/time.rs
+++ b/12_integrated_testing/kernel/src/_arch/aarch64/time.rs
@@ -42,6 +42,15 @@ static ARCH_TIMER_COUNTER_FREQUENCY: NonZeroU32 = NonZeroU32::MIN;
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
+fn arch_timer_counter_frequency() -> NonZeroU32 {
+    // Read volatile is needed here to prevent the compiler from optimizing
+    // ARCH_TIMER_COUNTER_FREQUENCY away.
+    //
+    // This is safe, because all the safety requirements as stated in read_volatile()'s
+    // documentation are fulfilled.
+    unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }
+}
+
 impl GenericTimerCounterValue {
     pub const MAX: Self = GenericTimerCounterValue(u64::MAX);
 }
@@ -60,13 +69,7 @@ impl From<GenericTimerCounterValue> for Duration {
             return Duration::ZERO;
         }
 
-        // Read volatile is needed here to prevent the compiler from optimizing
-        // ARCH_TIMER_COUNTER_FREQUENCY away.
-        //
-        // This is safe, because all the safety requirements as stated in read_volatile()'s
-        // documentation are fulfilled.
-        let frequency: NonZeroU64 =
-            unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }.into();
+        let frequency: NonZeroU64 = arch_timer_counter_frequency().into();
 
         // Div<NonZeroU64> implementation for u64 cannot panic.
         let secs = counter_value.0.div(frequency);
@@ -101,10 +104,7 @@ impl TryFrom<Duration> for GenericTimerCounterValue {
             return Err("Conversion error. Duration too big");
         }
 
-        // This is safe, because all the safety requirements as stated in read_volatile()'s
-        // documentation are fulfilled.
-        let frequency: u128 =
-            unsafe { u32::from(core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY)) as u128 };
+        let frequency: u128 = u32::from(arch_timer_counter_frequency()) as u128;
         let duration: u128 = duration.as_nanos();
 
         // This is safe, because frequency can never be greater than u32::MAX, and
diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index 3b7a8f64c..0bb676dbf 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -1249,7 +1249,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs 1
 diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/arm/gicv2.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2.rs
 --- 12_integrated_testing/kernel/src/bsp/device_driver/arm/gicv2.rs
 +++ 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2.rs
-@@ -0,0 +1,221 @@
+@@ -0,0 +1,220 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
@@ -1337,7 +1337,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/arm/gicv2.rs 13_exc
 +// Private Definitions
 +//--------------------------------------------------------------------------------------------------
 +
-+type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; GICv2::NUM_IRQS];
++type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; IRQNumber::NUM_TOTAL];
 +
 +//--------------------------------------------------------------------------------------------------
 +// Public Definitions
@@ -1364,7 +1364,6 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/arm/gicv2.rs 13_exc
 +
 +impl GICv2 {
 +    const MAX_IRQ_NUMBER: usize = 300; // Normally 1019, but keep it lower to save some space.
-+    const NUM_IRQS: usize = Self::MAX_IRQ_NUMBER + 1;
 +
 +    pub const COMPATIBLE: &'static str = "GICv2 (ARM Generic Interrupt Controller v2)";
 +
@@ -1377,7 +1376,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/arm/gicv2.rs 13_exc
 +        Self {
 +            gicd: gicd::GICD::new(gicd_mmio_start_addr),
 +            gicc: gicc::GICC::new(gicc_mmio_start_addr),
-+            handler_table: InitStateLock::new([None; Self::NUM_IRQS]),
++            handler_table: InitStateLock::new([None; IRQNumber::NUM_TOTAL]),
 +        }
 +    }
 +}
@@ -1520,14 +1519,18 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
 --- 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
 +++ 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
-@@ -0,0 +1,167 @@
+@@ -0,0 +1,170 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Peripheral Interrupt Controller Driver.
++//!
++//! # Resources
++//!
++//! - <https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf>
 +
-+use super::{InterruptController, PendingIRQs, PeripheralIRQ};
++use super::{PendingIRQs, PeripheralIRQ};
 +use crate::{
 +    bsp::device_driver::common::MMIODerefWrapper,
 +    exception, synchronization,
@@ -1569,8 +1572,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interru
 +/// Abstraction for the ReadOnly parts of the associated MMIO registers.
 +type ReadOnlyRegisters = MMIODerefWrapper<RORegisterBlock>;
 +
-+type HandlerTable =
-+    [Option<exception::asynchronous::IRQDescriptor>; InterruptController::NUM_PERIPHERAL_IRQS];
++type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; PeripheralIRQ::NUM_TOTAL];
 +
 +//--------------------------------------------------------------------------------------------------
 +// Public Definitions
@@ -1602,7 +1604,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interru
 +        Self {
 +            wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(mmio_start_addr)),
 +            ro_registers: ReadOnlyRegisters::new(mmio_start_addr),
-+            handler_table: InitStateLock::new([None; InterruptController::NUM_PERIPHERAL_IRQS]),
++            handler_table: InitStateLock::new([None; PeripheralIRQ::NUM_TOTAL]),
 +        }
 +    }
 +
@@ -1692,7 +1694,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interru
 diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
 --- 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
 +++ 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
-@@ -0,0 +1,134 @@
+@@ -0,0 +1,131 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
@@ -1748,16 +1750,13 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interru
 +    type Item = usize;
 +
 +    fn next(&mut self) -> Option<Self::Item> {
-+        use core::intrinsics::cttz;
-+
-+        let next = cttz(self.bitmask);
-+        if next == 64 {
++        if self.bitmask == 0 {
 +            return None;
 +        }
 +
-+        self.bitmask &= !(1 << next);
-+
-+        Some(next as usize)
++        let next = self.bitmask.trailing_zeros() as usize;
++        self.bitmask &= self.bitmask.wrapping_sub(1);
++        Some(next)
 +    }
 +}
 +
@@ -1766,9 +1765,9 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interru
 +//--------------------------------------------------------------------------------------------------
 +
 +impl InterruptController {
-+    const MAX_LOCAL_IRQ_NUMBER: usize = 11;
++    // Restrict to 3 for now. This makes future code for local_ic.rs more straight forward.
++    const MAX_LOCAL_IRQ_NUMBER: usize = 3;
 +    const MAX_PERIPHERAL_IRQ_NUMBER: usize = 63;
-+    const NUM_PERIPHERAL_IRQS: usize = Self::MAX_PERIPHERAL_IRQ_NUMBER + 1;
 +
 +    pub const COMPATIBLE: &'static str = "BCM Interrupt Controller";
 +
@@ -2230,7 +2229,7 @@ diff -uNr 12_integrated_testing/kernel/src/driver.rs 13_exceptions_part2_periphe
 diff -uNr 12_integrated_testing/kernel/src/exception/asynchronous.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.rs
 --- 12_integrated_testing/kernel/src/exception/asynchronous.rs
 +++ 13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.rs
-@@ -8,7 +8,149 @@
+@@ -8,7 +8,152 @@
  #[path = "../_arch/aarch64/exception/asynchronous.rs"]
  mod arch_asynchronous;
 
@@ -2343,6 +2342,9 @@ diff -uNr 12_integrated_testing/kernel/src/exception/asynchronous.rs 13_exceptio
 +}
 +
 +impl<const MAX_INCLUSIVE: usize> IRQNumber<{ MAX_INCLUSIVE }> {
++    /// The total number of IRQs this type supports.
++    pub const NUM_TOTAL: usize = MAX_INCLUSIVE + 1;
++
 +    /// Creates a new instance if number <= MAX_INCLUSIVE.
 +    pub const fn new(number: usize) -> Self {
 +        assert!(number <= MAX_INCLUSIVE);
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/time.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/time.rs
index 255a5a45d..ad8ba84dd 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/time.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/time.rs
@@ -42,6 +42,15 @@ static ARCH_TIMER_COUNTER_FREQUENCY: NonZeroU32 = NonZeroU32::MIN;
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
+fn arch_timer_counter_frequency() -> NonZeroU32 {
+    // Read volatile is needed here to prevent the compiler from optimizing
+    // ARCH_TIMER_COUNTER_FREQUENCY away.
+    //
+    // This is safe, because all the safety requirements as stated in read_volatile()'s
+    // documentation are fulfilled.
+    unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }
+}
+
 impl GenericTimerCounterValue {
     pub const MAX: Self = GenericTimerCounterValue(u64::MAX);
 }
@@ -60,13 +69,7 @@ impl From<GenericTimerCounterValue> for Duration {
             return Duration::ZERO;
         }
 
-        // Read volatile is needed here to prevent the compiler from optimizing
-        // ARCH_TIMER_COUNTER_FREQUENCY away.
-        //
-        // This is safe, because all the safety requirements as stated in read_volatile()'s
-        // documentation are fulfilled.
-        let frequency: NonZeroU64 =
-            unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }.into();
+        let frequency: NonZeroU64 = arch_timer_counter_frequency().into();
 
         // Div<NonZeroU64> implementation for u64 cannot panic.
         let secs = counter_value.0.div(frequency);
@@ -101,10 +104,7 @@ impl TryFrom<Duration> for GenericTimerCounterValue {
             return Err("Conversion error. Duration too big");
         }
 
-        // This is safe, because all the safety requirements as stated in read_volatile()'s
-        // documentation are fulfilled.
-        let frequency: u128 =
-            unsafe { u32::from(core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY)) as u128 };
+        let frequency: u128 = u32::from(arch_timer_counter_frequency()) as u128;
         let duration: u128 = duration.as_nanos();
 
         // This is safe, because frequency can never be greater than u32::MAX, and
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2.rs
index 03c1fa0f3..c810a59a8 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2.rs
@@ -85,7 +85,7 @@ use crate::{bsp, cpu, driver, exception, synchronization, synchronization::InitS
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
-type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; GICv2::NUM_IRQS];
+type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; IRQNumber::NUM_TOTAL];
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -112,7 +112,6 @@ pub struct GICv2 {
 
 impl GICv2 {
     const MAX_IRQ_NUMBER: usize = 300; // Normally 1019, but keep it lower to save some space.
-    const NUM_IRQS: usize = Self::MAX_IRQ_NUMBER + 1;
 
     pub const COMPATIBLE: &'static str = "GICv2 (ARM Generic Interrupt Controller v2)";
 
@@ -125,7 +124,7 @@ impl GICv2 {
         Self {
             gicd: gicd::GICD::new(gicd_mmio_start_addr),
             gicc: gicc::GICC::new(gicc_mmio_start_addr),
-            handler_table: InitStateLock::new([None; Self::NUM_IRQS]),
+            handler_table: InitStateLock::new([None; IRQNumber::NUM_TOTAL]),
         }
     }
 }
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
index d4acd2757..a88899c29 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -53,16 +53,13 @@ impl Iterator for PendingIRQs {
     type Item = usize;
 
     fn next(&mut self) -> Option<Self::Item> {
-        use core::intrinsics::cttz;
-
-        let next = cttz(self.bitmask);
-        if next == 64 {
+        if self.bitmask == 0 {
             return None;
         }
 
-        self.bitmask &= !(1 << next);
-
-        Some(next as usize)
+        let next = self.bitmask.trailing_zeros() as usize;
+        self.bitmask &= self.bitmask.wrapping_sub(1);
+        Some(next)
     }
 }
 
@@ -71,9 +68,9 @@ impl Iterator for PendingIRQs {
 //--------------------------------------------------------------------------------------------------
 
 impl InterruptController {
-    const MAX_LOCAL_IRQ_NUMBER: usize = 11;
+    // Restrict to 3 for now. This makes future code for local_ic.rs more straight forward.
+    const MAX_LOCAL_IRQ_NUMBER: usize = 3;
     const MAX_PERIPHERAL_IRQ_NUMBER: usize = 63;
-    const NUM_PERIPHERAL_IRQS: usize = Self::MAX_PERIPHERAL_IRQ_NUMBER + 1;
 
     pub const COMPATIBLE: &'static str = "BCM Interrupt Controller";
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index 0900635ef..90d9dd816 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -3,8 +3,12 @@
 // Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Peripheral Interrupt Controller Driver.
+//!
+//! # Resources
+//!
+//! - <https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf>
 
-use super::{InterruptController, PendingIRQs, PeripheralIRQ};
+use super::{PendingIRQs, PeripheralIRQ};
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper,
     exception, synchronization,
@@ -46,8 +50,7 @@ type WriteOnlyRegisters = MMIODerefWrapper<WORegisterBlock>;
 /// Abstraction for the ReadOnly parts of the associated MMIO registers.
 type ReadOnlyRegisters = MMIODerefWrapper<RORegisterBlock>;
 
-type HandlerTable =
-    [Option<exception::asynchronous::IRQDescriptor>; InterruptController::NUM_PERIPHERAL_IRQS];
+type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; PeripheralIRQ::NUM_TOTAL];
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -79,7 +82,7 @@ impl PeripheralIC {
         Self {
             wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(mmio_start_addr)),
             ro_registers: ReadOnlyRegisters::new(mmio_start_addr),
-            handler_table: InitStateLock::new([None; InterruptController::NUM_PERIPHERAL_IRQS]),
+            handler_table: InitStateLock::new([None; PeripheralIRQ::NUM_TOTAL]),
         }
     }
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.rs
index 31800ffeb..d55ce642d 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.rs
@@ -116,6 +116,9 @@ impl<'irq_context> IRQContext<'irq_context> {
 }
 
 impl<const MAX_INCLUSIVE: usize> IRQNumber<{ MAX_INCLUSIVE }> {
+    /// The total number of IRQs this type supports.
+    pub const NUM_TOTAL: usize = MAX_INCLUSIVE + 1;
+
     /// Creates a new instance if number <= MAX_INCLUSIVE.
     pub const fn new(number: usize) -> Self {
         assert!(number <= MAX_INCLUSIVE);
diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index 7dc0c7a36..c0db99384 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -948,7 +948,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/g
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -121,11 +129,16 @@
+@@ -120,11 +128,16 @@
      /// # Safety
      ///
      /// - The user must ensure to provide a correct MMIO start address.
@@ -961,12 +961,12 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/g
          Self {
              gicd: gicd::GICD::new(gicd_mmio_start_addr),
              gicc: gicc::GICC::new(gicc_mmio_start_addr),
-             handler_table: InitStateLock::new([None; Self::NUM_IRQS]),
+             handler_table: InitStateLock::new([None; IRQNumber::NUM_TOTAL]),
 +            post_init_callback,
          }
      }
  }
-@@ -148,6 +161,8 @@
+@@ -147,6 +160,8 @@
          self.gicc.priority_accept_all();
          self.gicc.enable();
 
@@ -1035,8 +1035,8 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/b
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
-@@ -7,7 +7,9 @@
- use super::{InterruptController, PendingIRQs, PeripheralIRQ};
+@@ -11,7 +11,9 @@
+ use super::{PendingIRQs, PeripheralIRQ};
  use crate::{
      bsp::device_driver::common::MMIODerefWrapper,
 -    exception, synchronization,
@@ -1046,7 +1046,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/b
      synchronization::{IRQSafeNullLock, InitStateLock},
  };
  use tock_registers::{
-@@ -75,7 +77,7 @@
+@@ -78,7 +80,7 @@
      /// # Safety
      ///
      /// - The user must ensure to provide a correct MMIO start address.
@@ -1079,7 +1079,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/b
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -82,9 +86,13 @@
+@@ -79,9 +83,13 @@
      /// # Safety
      ///
      /// - The user must ensure to provide a correct MMIO start address.
@@ -1094,7 +1094,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/b
          }
      }
  }
-@@ -97,6 +105,12 @@
+@@ -94,6 +102,12 @@
      fn compatible(&self) -> &'static str {
          Self::COMPATIBLE
      }
@@ -2302,7 +2302,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.
 
  impl<'irq_context> IRQContext<'irq_context> {
      /// Creates an IRQContext token.
-@@ -148,9 +158,17 @@
+@@ -151,9 +161,17 @@
      ret
  }
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/time.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/time.rs
index 255a5a45d..ad8ba84dd 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/time.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/time.rs
@@ -42,6 +42,15 @@ static ARCH_TIMER_COUNTER_FREQUENCY: NonZeroU32 = NonZeroU32::MIN;
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
+fn arch_timer_counter_frequency() -> NonZeroU32 {
+    // Read volatile is needed here to prevent the compiler from optimizing
+    // ARCH_TIMER_COUNTER_FREQUENCY away.
+    //
+    // This is safe, because all the safety requirements as stated in read_volatile()'s
+    // documentation are fulfilled.
+    unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }
+}
+
 impl GenericTimerCounterValue {
     pub const MAX: Self = GenericTimerCounterValue(u64::MAX);
 }
@@ -60,13 +69,7 @@ impl From<GenericTimerCounterValue> for Duration {
             return Duration::ZERO;
         }
 
-        // Read volatile is needed here to prevent the compiler from optimizing
-        // ARCH_TIMER_COUNTER_FREQUENCY away.
-        //
-        // This is safe, because all the safety requirements as stated in read_volatile()'s
-        // documentation are fulfilled.
-        let frequency: NonZeroU64 =
-            unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }.into();
+        let frequency: NonZeroU64 = arch_timer_counter_frequency().into();
 
         // Div<NonZeroU64> implementation for u64 cannot panic.
         let secs = counter_value.0.div(frequency);
@@ -101,10 +104,7 @@ impl TryFrom<Duration> for GenericTimerCounterValue {
             return Err("Conversion error. Duration too big");
         }
 
-        // This is safe, because all the safety requirements as stated in read_volatile()'s
-        // documentation are fulfilled.
-        let frequency: u128 =
-            unsafe { u32::from(core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY)) as u128 };
+        let frequency: u128 = u32::from(arch_timer_counter_frequency()) as u128;
         let duration: u128 = duration.as_nanos();
 
         // This is safe, because frequency can never be greater than u32::MAX, and
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2.rs
index e72fde7be..ec65f1b2a 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2.rs
@@ -90,7 +90,7 @@ use crate::{
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
-type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; GICv2::NUM_IRQS];
+type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; IRQNumber::NUM_TOTAL];
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -120,7 +120,6 @@ pub struct GICv2 {
 
 impl GICv2 {
     const MAX_IRQ_NUMBER: usize = 300; // Normally 1019, but keep it lower to save some space.
-    const NUM_IRQS: usize = Self::MAX_IRQ_NUMBER + 1;
 
     pub const COMPATIBLE: &'static str = "GICv2 (ARM Generic Interrupt Controller v2)";
 
@@ -137,7 +136,7 @@ impl GICv2 {
         Self {
             gicd: gicd::GICD::new(gicd_mmio_start_addr),
             gicc: gicc::GICC::new(gicc_mmio_start_addr),
-            handler_table: InitStateLock::new([None; Self::NUM_IRQS]),
+            handler_table: InitStateLock::new([None; IRQNumber::NUM_TOTAL]),
             post_init_callback,
         }
     }
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
index 4908b8b67..b4dd530da 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -57,16 +57,13 @@ impl Iterator for PendingIRQs {
     type Item = usize;
 
     fn next(&mut self) -> Option<Self::Item> {
-        use core::intrinsics::cttz;
-
-        let next = cttz(self.bitmask);
-        if next == 64 {
+        if self.bitmask == 0 {
             return None;
         }
 
-        self.bitmask &= !(1 << next);
-
-        Some(next as usize)
+        let next = self.bitmask.trailing_zeros() as usize;
+        self.bitmask &= self.bitmask.wrapping_sub(1);
+        Some(next)
     }
 }
 
@@ -75,9 +72,9 @@ impl Iterator for PendingIRQs {
 //--------------------------------------------------------------------------------------------------
 
 impl InterruptController {
-    const MAX_LOCAL_IRQ_NUMBER: usize = 11;
+    // Restrict to 3 for now. This makes future code for local_ic.rs more straight forward.
+    const MAX_LOCAL_IRQ_NUMBER: usize = 3;
     const MAX_PERIPHERAL_IRQ_NUMBER: usize = 63;
-    const NUM_PERIPHERAL_IRQS: usize = Self::MAX_PERIPHERAL_IRQ_NUMBER + 1;
 
     pub const COMPATIBLE: &'static str = "BCM Interrupt Controller";
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index c9711049d..06802d272 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -3,8 +3,12 @@
 // Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Peripheral Interrupt Controller Driver.
+//!
+//! # Resources
+//!
+//! - <https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf>
 
-use super::{InterruptController, PendingIRQs, PeripheralIRQ};
+use super::{PendingIRQs, PeripheralIRQ};
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper,
     exception,
@@ -48,8 +52,7 @@ type WriteOnlyRegisters = MMIODerefWrapper<WORegisterBlock>;
 /// Abstraction for the ReadOnly parts of the associated MMIO registers.
 type ReadOnlyRegisters = MMIODerefWrapper<RORegisterBlock>;
 
-type HandlerTable =
-    [Option<exception::asynchronous::IRQDescriptor>; InterruptController::NUM_PERIPHERAL_IRQS];
+type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; PeripheralIRQ::NUM_TOTAL];
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -81,7 +84,7 @@ impl PeripheralIC {
         Self {
             wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(mmio_start_addr)),
             ro_registers: ReadOnlyRegisters::new(mmio_start_addr),
-            handler_table: InitStateLock::new([None; InterruptController::NUM_PERIPHERAL_IRQS]),
+            handler_table: InitStateLock::new([None; PeripheralIRQ::NUM_TOTAL]),
         }
     }
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous.rs
index 3544e621d..83ca1aa6d 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous.rs
@@ -126,6 +126,9 @@ impl<'irq_context> IRQContext<'irq_context> {
 }
 
 impl<const MAX_INCLUSIVE: usize> IRQNumber<{ MAX_INCLUSIVE }> {
+    /// The total number of IRQs this type supports.
+    pub const NUM_TOTAL: usize = MAX_INCLUSIVE + 1;
+
     /// Creates a new instance if number <= MAX_INCLUSIVE.
     pub const fn new(number: usize) -> Self {
         assert!(number <= MAX_INCLUSIVE);
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/time.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/time.rs
index 255a5a45d..ad8ba84dd 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/time.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/time.rs
@@ -42,6 +42,15 @@ static ARCH_TIMER_COUNTER_FREQUENCY: NonZeroU32 = NonZeroU32::MIN;
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
+fn arch_timer_counter_frequency() -> NonZeroU32 {
+    // Read volatile is needed here to prevent the compiler from optimizing
+    // ARCH_TIMER_COUNTER_FREQUENCY away.
+    //
+    // This is safe, because all the safety requirements as stated in read_volatile()'s
+    // documentation are fulfilled.
+    unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }
+}
+
 impl GenericTimerCounterValue {
     pub const MAX: Self = GenericTimerCounterValue(u64::MAX);
 }
@@ -60,13 +69,7 @@ impl From<GenericTimerCounterValue> for Duration {
             return Duration::ZERO;
         }
 
-        // Read volatile is needed here to prevent the compiler from optimizing
-        // ARCH_TIMER_COUNTER_FREQUENCY away.
-        //
-        // This is safe, because all the safety requirements as stated in read_volatile()'s
-        // documentation are fulfilled.
-        let frequency: NonZeroU64 =
-            unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }.into();
+        let frequency: NonZeroU64 = arch_timer_counter_frequency().into();
 
         // Div<NonZeroU64> implementation for u64 cannot panic.
         let secs = counter_value.0.div(frequency);
@@ -101,10 +104,7 @@ impl TryFrom<Duration> for GenericTimerCounterValue {
             return Err("Conversion error. Duration too big");
         }
 
-        // This is safe, because all the safety requirements as stated in read_volatile()'s
-        // documentation are fulfilled.
-        let frequency: u128 =
-            unsafe { u32::from(core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY)) as u128 };
+        let frequency: u128 = u32::from(arch_timer_counter_frequency()) as u128;
         let duration: u128 = duration.as_nanos();
 
         // This is safe, because frequency can never be greater than u32::MAX, and
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2.rs
index e72fde7be..ec65f1b2a 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2.rs
@@ -90,7 +90,7 @@ use crate::{
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
-type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; GICv2::NUM_IRQS];
+type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; IRQNumber::NUM_TOTAL];
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -120,7 +120,6 @@ pub struct GICv2 {
 
 impl GICv2 {
     const MAX_IRQ_NUMBER: usize = 300; // Normally 1019, but keep it lower to save some space.
-    const NUM_IRQS: usize = Self::MAX_IRQ_NUMBER + 1;
 
     pub const COMPATIBLE: &'static str = "GICv2 (ARM Generic Interrupt Controller v2)";
 
@@ -137,7 +136,7 @@ impl GICv2 {
         Self {
             gicd: gicd::GICD::new(gicd_mmio_start_addr),
             gicc: gicc::GICC::new(gicc_mmio_start_addr),
-            handler_table: InitStateLock::new([None; Self::NUM_IRQS]),
+            handler_table: InitStateLock::new([None; IRQNumber::NUM_TOTAL]),
             post_init_callback,
         }
     }
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
index 4908b8b67..b4dd530da 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -57,16 +57,13 @@ impl Iterator for PendingIRQs {
     type Item = usize;
 
     fn next(&mut self) -> Option<Self::Item> {
-        use core::intrinsics::cttz;
-
-        let next = cttz(self.bitmask);
-        if next == 64 {
+        if self.bitmask == 0 {
             return None;
         }
 
-        self.bitmask &= !(1 << next);
-
-        Some(next as usize)
+        let next = self.bitmask.trailing_zeros() as usize;
+        self.bitmask &= self.bitmask.wrapping_sub(1);
+        Some(next)
     }
 }
 
@@ -75,9 +72,9 @@ impl Iterator for PendingIRQs {
 //--------------------------------------------------------------------------------------------------
 
 impl InterruptController {
-    const MAX_LOCAL_IRQ_NUMBER: usize = 11;
+    // Restrict to 3 for now. This makes future code for local_ic.rs more straight forward.
+    const MAX_LOCAL_IRQ_NUMBER: usize = 3;
     const MAX_PERIPHERAL_IRQ_NUMBER: usize = 63;
-    const NUM_PERIPHERAL_IRQS: usize = Self::MAX_PERIPHERAL_IRQ_NUMBER + 1;
 
     pub const COMPATIBLE: &'static str = "BCM Interrupt Controller";
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index c9711049d..06802d272 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -3,8 +3,12 @@
 // Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Peripheral Interrupt Controller Driver.
+//!
+//! # Resources
+//!
+//! - <https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf>
 
-use super::{InterruptController, PendingIRQs, PeripheralIRQ};
+use super::{PendingIRQs, PeripheralIRQ};
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper,
     exception,
@@ -48,8 +52,7 @@ type WriteOnlyRegisters = MMIODerefWrapper<WORegisterBlock>;
 /// Abstraction for the ReadOnly parts of the associated MMIO registers.
 type ReadOnlyRegisters = MMIODerefWrapper<RORegisterBlock>;
 
-type HandlerTable =
-    [Option<exception::asynchronous::IRQDescriptor>; InterruptController::NUM_PERIPHERAL_IRQS];
+type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; PeripheralIRQ::NUM_TOTAL];
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -81,7 +84,7 @@ impl PeripheralIC {
         Self {
             wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(mmio_start_addr)),
             ro_registers: ReadOnlyRegisters::new(mmio_start_addr),
-            handler_table: InitStateLock::new([None; InterruptController::NUM_PERIPHERAL_IRQS]),
+            handler_table: InitStateLock::new([None; PeripheralIRQ::NUM_TOTAL]),
         }
     }
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/exception/asynchronous.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/exception/asynchronous.rs
index 3544e621d..83ca1aa6d 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/exception/asynchronous.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/exception/asynchronous.rs
@@ -126,6 +126,9 @@ impl<'irq_context> IRQContext<'irq_context> {
 }
 
 impl<const MAX_INCLUSIVE: usize> IRQNumber<{ MAX_INCLUSIVE }> {
+    /// The total number of IRQs this type supports.
+    pub const NUM_TOTAL: usize = MAX_INCLUSIVE + 1;
+
     /// Creates a new instance if number <= MAX_INCLUSIVE.
     pub const fn new(number: usize) -> Self {
         assert!(number <= MAX_INCLUSIVE);
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/time.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/time.rs
index 255a5a45d..ad8ba84dd 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/time.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/time.rs
@@ -42,6 +42,15 @@ static ARCH_TIMER_COUNTER_FREQUENCY: NonZeroU32 = NonZeroU32::MIN;
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
+fn arch_timer_counter_frequency() -> NonZeroU32 {
+    // Read volatile is needed here to prevent the compiler from optimizing
+    // ARCH_TIMER_COUNTER_FREQUENCY away.
+    //
+    // This is safe, because all the safety requirements as stated in read_volatile()'s
+    // documentation are fulfilled.
+    unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }
+}
+
 impl GenericTimerCounterValue {
     pub const MAX: Self = GenericTimerCounterValue(u64::MAX);
 }
@@ -60,13 +69,7 @@ impl From<GenericTimerCounterValue> for Duration {
             return Duration::ZERO;
         }
 
-        // Read volatile is needed here to prevent the compiler from optimizing
-        // ARCH_TIMER_COUNTER_FREQUENCY away.
-        //
-        // This is safe, because all the safety requirements as stated in read_volatile()'s
-        // documentation are fulfilled.
-        let frequency: NonZeroU64 =
-            unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }.into();
+        let frequency: NonZeroU64 = arch_timer_counter_frequency().into();
 
         // Div<NonZeroU64> implementation for u64 cannot panic.
         let secs = counter_value.0.div(frequency);
@@ -101,10 +104,7 @@ impl TryFrom<Duration> for GenericTimerCounterValue {
             return Err("Conversion error. Duration too big");
         }
 
-        // This is safe, because all the safety requirements as stated in read_volatile()'s
-        // documentation are fulfilled.
-        let frequency: u128 =
-            unsafe { u32::from(core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY)) as u128 };
+        let frequency: u128 = u32::from(arch_timer_counter_frequency()) as u128;
         let duration: u128 = duration.as_nanos();
 
         // This is safe, because frequency can never be greater than u32::MAX, and
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2.rs
index e72fde7be..ec65f1b2a 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2.rs
@@ -90,7 +90,7 @@ use crate::{
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
-type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; GICv2::NUM_IRQS];
+type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; IRQNumber::NUM_TOTAL];
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -120,7 +120,6 @@ pub struct GICv2 {
 
 impl GICv2 {
     const MAX_IRQ_NUMBER: usize = 300; // Normally 1019, but keep it lower to save some space.
-    const NUM_IRQS: usize = Self::MAX_IRQ_NUMBER + 1;
 
     pub const COMPATIBLE: &'static str = "GICv2 (ARM Generic Interrupt Controller v2)";
 
@@ -137,7 +136,7 @@ impl GICv2 {
         Self {
             gicd: gicd::GICD::new(gicd_mmio_start_addr),
             gicc: gicc::GICC::new(gicc_mmio_start_addr),
-            handler_table: InitStateLock::new([None; Self::NUM_IRQS]),
+            handler_table: InitStateLock::new([None; IRQNumber::NUM_TOTAL]),
             post_init_callback,
         }
     }
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
index 4908b8b67..b4dd530da 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -57,16 +57,13 @@ impl Iterator for PendingIRQs {
     type Item = usize;
 
     fn next(&mut self) -> Option<Self::Item> {
-        use core::intrinsics::cttz;
-
-        let next = cttz(self.bitmask);
-        if next == 64 {
+        if self.bitmask == 0 {
             return None;
         }
 
-        self.bitmask &= !(1 << next);
-
-        Some(next as usize)
+        let next = self.bitmask.trailing_zeros() as usize;
+        self.bitmask &= self.bitmask.wrapping_sub(1);
+        Some(next)
     }
 }
 
@@ -75,9 +72,9 @@ impl Iterator for PendingIRQs {
 //--------------------------------------------------------------------------------------------------
 
 impl InterruptController {
-    const MAX_LOCAL_IRQ_NUMBER: usize = 11;
+    // Restrict to 3 for now. This makes future code for local_ic.rs more straight forward.
+    const MAX_LOCAL_IRQ_NUMBER: usize = 3;
     const MAX_PERIPHERAL_IRQ_NUMBER: usize = 63;
-    const NUM_PERIPHERAL_IRQS: usize = Self::MAX_PERIPHERAL_IRQ_NUMBER + 1;
 
     pub const COMPATIBLE: &'static str = "BCM Interrupt Controller";
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index c9711049d..06802d272 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -3,8 +3,12 @@
 // Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Peripheral Interrupt Controller Driver.
+//!
+//! # Resources
+//!
+//! - <https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf>
 
-use super::{InterruptController, PendingIRQs, PeripheralIRQ};
+use super::{PendingIRQs, PeripheralIRQ};
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper,
     exception,
@@ -48,8 +52,7 @@ type WriteOnlyRegisters = MMIODerefWrapper<WORegisterBlock>;
 /// Abstraction for the ReadOnly parts of the associated MMIO registers.
 type ReadOnlyRegisters = MMIODerefWrapper<RORegisterBlock>;
 
-type HandlerTable =
-    [Option<exception::asynchronous::IRQDescriptor>; InterruptController::NUM_PERIPHERAL_IRQS];
+type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; PeripheralIRQ::NUM_TOTAL];
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -81,7 +84,7 @@ impl PeripheralIC {
         Self {
             wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(mmio_start_addr)),
             ro_registers: ReadOnlyRegisters::new(mmio_start_addr),
-            handler_table: InitStateLock::new([None; InterruptController::NUM_PERIPHERAL_IRQS]),
+            handler_table: InitStateLock::new([None; PeripheralIRQ::NUM_TOTAL]),
         }
     }
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception/asynchronous.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception/asynchronous.rs
index 3544e621d..83ca1aa6d 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception/asynchronous.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception/asynchronous.rs
@@ -126,6 +126,9 @@ impl<'irq_context> IRQContext<'irq_context> {
 }
 
 impl<const MAX_INCLUSIVE: usize> IRQNumber<{ MAX_INCLUSIVE }> {
+    /// The total number of IRQs this type supports.
+    pub const NUM_TOTAL: usize = MAX_INCLUSIVE + 1;
+
     /// Creates a new instance if number <= MAX_INCLUSIVE.
     pub const fn new(number: usize) -> Self {
         assert!(number <= MAX_INCLUSIVE);
diff --git a/17_kernel_symbols/README.md b/17_kernel_symbols/README.md
index 699cfe2cf..e88795ab1 100644
--- a/17_kernel_symbols/README.md
+++ b/17_kernel_symbols/README.md
@@ -168,13 +168,18 @@ fn kernel_symbol_section_virt_start_addr() -> Address<Virtual> {
     Address::new(unsafe { __kernel_symbols_start.get() as usize })
 }
 
+fn num_kernel_symbols() -> usize {
+    unsafe {
+        // Read volatile is needed here to prevent the compiler from optimizing NUM_KERNEL_SYMBOLS
+        // away.
+        core::ptr::read_volatile(&NUM_KERNEL_SYMBOLS as *const u64) as usize
+    }
+}
+
 fn kernel_symbols_slice() -> &'static [Symbol] {
     let ptr = kernel_symbol_section_virt_start_addr().as_usize() as *const Symbol;
 
-    unsafe {
-        let num = core::ptr::read_volatile(&NUM_KERNEL_SYMBOLS as *const u64) as usize;
-        slice::from_raw_parts(ptr, num)
-    }
+    unsafe { slice::from_raw_parts(ptr, num_kernel_symbols()) }
 }
 ```
 
@@ -338,7 +343,7 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs 17_kernel_sy
 diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel/src/symbols.rs 17_kernel_symbols/kernel/src/symbols.rs
 --- 16_virtual_mem_part4_higher_half_kernel/kernel/src/symbols.rs
 +++ 17_kernel_symbols/kernel/src/symbols.rs
-@@ -0,0 +1,83 @@
+@@ -0,0 +1,88 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
@@ -375,13 +380,18 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel/src/symbols.rs 17_kerne
 +    Address::new(unsafe { __kernel_symbols_start.get() as usize })
 +}
 +
++fn num_kernel_symbols() -> usize {
++    unsafe {
++        // Read volatile is needed here to prevent the compiler from optimizing NUM_KERNEL_SYMBOLS
++        // away.
++        core::ptr::read_volatile(&NUM_KERNEL_SYMBOLS as *const u64) as usize
++    }
++}
++
 +fn kernel_symbols_slice() -> &'static [Symbol] {
 +    let ptr = kernel_symbol_section_virt_start_addr().as_usize() as *const Symbol;
 +
-+    unsafe {
-+        let num = core::ptr::read_volatile(&NUM_KERNEL_SYMBOLS as *const u64) as usize;
-+        slice::from_raw_parts(ptr, num)
-+    }
++    unsafe { slice::from_raw_parts(ptr, num_kernel_symbols()) }
 +}
 +
 +//--------------------------------------------------------------------------------------------------
diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/time.rs b/17_kernel_symbols/kernel/src/_arch/aarch64/time.rs
index 255a5a45d..ad8ba84dd 100644
--- a/17_kernel_symbols/kernel/src/_arch/aarch64/time.rs
+++ b/17_kernel_symbols/kernel/src/_arch/aarch64/time.rs
@@ -42,6 +42,15 @@ static ARCH_TIMER_COUNTER_FREQUENCY: NonZeroU32 = NonZeroU32::MIN;
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
+fn arch_timer_counter_frequency() -> NonZeroU32 {
+    // Read volatile is needed here to prevent the compiler from optimizing
+    // ARCH_TIMER_COUNTER_FREQUENCY away.
+    //
+    // This is safe, because all the safety requirements as stated in read_volatile()'s
+    // documentation are fulfilled.
+    unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }
+}
+
 impl GenericTimerCounterValue {
     pub const MAX: Self = GenericTimerCounterValue(u64::MAX);
 }
@@ -60,13 +69,7 @@ impl From<GenericTimerCounterValue> for Duration {
             return Duration::ZERO;
         }
 
-        // Read volatile is needed here to prevent the compiler from optimizing
-        // ARCH_TIMER_COUNTER_FREQUENCY away.
-        //
-        // This is safe, because all the safety requirements as stated in read_volatile()'s
-        // documentation are fulfilled.
-        let frequency: NonZeroU64 =
-            unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }.into();
+        let frequency: NonZeroU64 = arch_timer_counter_frequency().into();
 
         // Div<NonZeroU64> implementation for u64 cannot panic.
         let secs = counter_value.0.div(frequency);
@@ -101,10 +104,7 @@ impl TryFrom<Duration> for GenericTimerCounterValue {
             return Err("Conversion error. Duration too big");
         }
 
-        // This is safe, because all the safety requirements as stated in read_volatile()'s
-        // documentation are fulfilled.
-        let frequency: u128 =
-            unsafe { u32::from(core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY)) as u128 };
+        let frequency: u128 = u32::from(arch_timer_counter_frequency()) as u128;
         let duration: u128 = duration.as_nanos();
 
         // This is safe, because frequency can never be greater than u32::MAX, and
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2.rs
index e72fde7be..ec65f1b2a 100644
--- a/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2.rs
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2.rs
@@ -90,7 +90,7 @@ use crate::{
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
-type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; GICv2::NUM_IRQS];
+type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; IRQNumber::NUM_TOTAL];
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -120,7 +120,6 @@ pub struct GICv2 {
 
 impl GICv2 {
     const MAX_IRQ_NUMBER: usize = 300; // Normally 1019, but keep it lower to save some space.
-    const NUM_IRQS: usize = Self::MAX_IRQ_NUMBER + 1;
 
     pub const COMPATIBLE: &'static str = "GICv2 (ARM Generic Interrupt Controller v2)";
 
@@ -137,7 +136,7 @@ impl GICv2 {
         Self {
             gicd: gicd::GICD::new(gicd_mmio_start_addr),
             gicc: gicc::GICC::new(gicc_mmio_start_addr),
-            handler_table: InitStateLock::new([None; Self::NUM_IRQS]),
+            handler_table: InitStateLock::new([None; IRQNumber::NUM_TOTAL]),
             post_init_callback,
         }
     }
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
index 4908b8b67..b4dd530da 100644
--- a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -57,16 +57,13 @@ impl Iterator for PendingIRQs {
     type Item = usize;
 
     fn next(&mut self) -> Option<Self::Item> {
-        use core::intrinsics::cttz;
-
-        let next = cttz(self.bitmask);
-        if next == 64 {
+        if self.bitmask == 0 {
             return None;
         }
 
-        self.bitmask &= !(1 << next);
-
-        Some(next as usize)
+        let next = self.bitmask.trailing_zeros() as usize;
+        self.bitmask &= self.bitmask.wrapping_sub(1);
+        Some(next)
     }
 }
 
@@ -75,9 +72,9 @@ impl Iterator for PendingIRQs {
 //--------------------------------------------------------------------------------------------------
 
 impl InterruptController {
-    const MAX_LOCAL_IRQ_NUMBER: usize = 11;
+    // Restrict to 3 for now. This makes future code for local_ic.rs more straight forward.
+    const MAX_LOCAL_IRQ_NUMBER: usize = 3;
     const MAX_PERIPHERAL_IRQ_NUMBER: usize = 63;
-    const NUM_PERIPHERAL_IRQS: usize = Self::MAX_PERIPHERAL_IRQ_NUMBER + 1;
 
     pub const COMPATIBLE: &'static str = "BCM Interrupt Controller";
 
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index c9711049d..06802d272 100644
--- a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -3,8 +3,12 @@
 // Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Peripheral Interrupt Controller Driver.
+//!
+//! # Resources
+//!
+//! - <https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf>
 
-use super::{InterruptController, PendingIRQs, PeripheralIRQ};
+use super::{PendingIRQs, PeripheralIRQ};
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper,
     exception,
@@ -48,8 +52,7 @@ type WriteOnlyRegisters = MMIODerefWrapper<WORegisterBlock>;
 /// Abstraction for the ReadOnly parts of the associated MMIO registers.
 type ReadOnlyRegisters = MMIODerefWrapper<RORegisterBlock>;
 
-type HandlerTable =
-    [Option<exception::asynchronous::IRQDescriptor>; InterruptController::NUM_PERIPHERAL_IRQS];
+type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; PeripheralIRQ::NUM_TOTAL];
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -81,7 +84,7 @@ impl PeripheralIC {
         Self {
             wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(mmio_start_addr)),
             ro_registers: ReadOnlyRegisters::new(mmio_start_addr),
-            handler_table: InitStateLock::new([None; InterruptController::NUM_PERIPHERAL_IRQS]),
+            handler_table: InitStateLock::new([None; PeripheralIRQ::NUM_TOTAL]),
         }
     }
 
diff --git a/17_kernel_symbols/kernel/src/exception/asynchronous.rs b/17_kernel_symbols/kernel/src/exception/asynchronous.rs
index 3544e621d..83ca1aa6d 100644
--- a/17_kernel_symbols/kernel/src/exception/asynchronous.rs
+++ b/17_kernel_symbols/kernel/src/exception/asynchronous.rs
@@ -126,6 +126,9 @@ impl<'irq_context> IRQContext<'irq_context> {
 }
 
 impl<const MAX_INCLUSIVE: usize> IRQNumber<{ MAX_INCLUSIVE }> {
+    /// The total number of IRQs this type supports.
+    pub const NUM_TOTAL: usize = MAX_INCLUSIVE + 1;
+
     /// Creates a new instance if number <= MAX_INCLUSIVE.
     pub const fn new(number: usize) -> Self {
         assert!(number <= MAX_INCLUSIVE);
diff --git a/17_kernel_symbols/kernel/src/symbols.rs b/17_kernel_symbols/kernel/src/symbols.rs
index 7f439ce22..680b8eaf6 100644
--- a/17_kernel_symbols/kernel/src/symbols.rs
+++ b/17_kernel_symbols/kernel/src/symbols.rs
@@ -34,13 +34,18 @@ fn kernel_symbol_section_virt_start_addr() -> Address<Virtual> {
     Address::new(unsafe { __kernel_symbols_start.get() as usize })
 }
 
+fn num_kernel_symbols() -> usize {
+    unsafe {
+        // Read volatile is needed here to prevent the compiler from optimizing NUM_KERNEL_SYMBOLS
+        // away.
+        core::ptr::read_volatile(&NUM_KERNEL_SYMBOLS as *const u64) as usize
+    }
+}
+
 fn kernel_symbols_slice() -> &'static [Symbol] {
     let ptr = kernel_symbol_section_virt_start_addr().as_usize() as *const Symbol;
 
-    unsafe {
-        let num = core::ptr::read_volatile(&NUM_KERNEL_SYMBOLS as *const u64) as usize;
-        slice::from_raw_parts(ptr, num)
-    }
+    unsafe { slice::from_raw_parts(ptr, num_kernel_symbols()) }
 }
 
 //--------------------------------------------------------------------------------------------------
diff --git a/18_backtrace/kernel/src/_arch/aarch64/time.rs b/18_backtrace/kernel/src/_arch/aarch64/time.rs
index 255a5a45d..ad8ba84dd 100644
--- a/18_backtrace/kernel/src/_arch/aarch64/time.rs
+++ b/18_backtrace/kernel/src/_arch/aarch64/time.rs
@@ -42,6 +42,15 @@ static ARCH_TIMER_COUNTER_FREQUENCY: NonZeroU32 = NonZeroU32::MIN;
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
+fn arch_timer_counter_frequency() -> NonZeroU32 {
+    // Read volatile is needed here to prevent the compiler from optimizing
+    // ARCH_TIMER_COUNTER_FREQUENCY away.
+    //
+    // This is safe, because all the safety requirements as stated in read_volatile()'s
+    // documentation are fulfilled.
+    unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }
+}
+
 impl GenericTimerCounterValue {
     pub const MAX: Self = GenericTimerCounterValue(u64::MAX);
 }
@@ -60,13 +69,7 @@ impl From<GenericTimerCounterValue> for Duration {
             return Duration::ZERO;
         }
 
-        // Read volatile is needed here to prevent the compiler from optimizing
-        // ARCH_TIMER_COUNTER_FREQUENCY away.
-        //
-        // This is safe, because all the safety requirements as stated in read_volatile()'s
-        // documentation are fulfilled.
-        let frequency: NonZeroU64 =
-            unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }.into();
+        let frequency: NonZeroU64 = arch_timer_counter_frequency().into();
 
         // Div<NonZeroU64> implementation for u64 cannot panic.
         let secs = counter_value.0.div(frequency);
@@ -101,10 +104,7 @@ impl TryFrom<Duration> for GenericTimerCounterValue {
             return Err("Conversion error. Duration too big");
         }
 
-        // This is safe, because all the safety requirements as stated in read_volatile()'s
-        // documentation are fulfilled.
-        let frequency: u128 =
-            unsafe { u32::from(core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY)) as u128 };
+        let frequency: u128 = u32::from(arch_timer_counter_frequency()) as u128;
         let duration: u128 = duration.as_nanos();
 
         // This is safe, because frequency can never be greater than u32::MAX, and
diff --git a/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2.rs b/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2.rs
index e72fde7be..ec65f1b2a 100644
--- a/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2.rs
+++ b/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2.rs
@@ -90,7 +90,7 @@ use crate::{
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
-type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; GICv2::NUM_IRQS];
+type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; IRQNumber::NUM_TOTAL];
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -120,7 +120,6 @@ pub struct GICv2 {
 
 impl GICv2 {
     const MAX_IRQ_NUMBER: usize = 300; // Normally 1019, but keep it lower to save some space.
-    const NUM_IRQS: usize = Self::MAX_IRQ_NUMBER + 1;
 
     pub const COMPATIBLE: &'static str = "GICv2 (ARM Generic Interrupt Controller v2)";
 
@@ -137,7 +136,7 @@ impl GICv2 {
         Self {
             gicd: gicd::GICD::new(gicd_mmio_start_addr),
             gicc: gicc::GICC::new(gicc_mmio_start_addr),
-            handler_table: InitStateLock::new([None; Self::NUM_IRQS]),
+            handler_table: InitStateLock::new([None; IRQNumber::NUM_TOTAL]),
             post_init_callback,
         }
     }
diff --git a/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
index 4908b8b67..b4dd530da 100644
--- a/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+++ b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -57,16 +57,13 @@ impl Iterator for PendingIRQs {
     type Item = usize;
 
     fn next(&mut self) -> Option<Self::Item> {
-        use core::intrinsics::cttz;
-
-        let next = cttz(self.bitmask);
-        if next == 64 {
+        if self.bitmask == 0 {
             return None;
         }
 
-        self.bitmask &= !(1 << next);
-
-        Some(next as usize)
+        let next = self.bitmask.trailing_zeros() as usize;
+        self.bitmask &= self.bitmask.wrapping_sub(1);
+        Some(next)
     }
 }
 
@@ -75,9 +72,9 @@ impl Iterator for PendingIRQs {
 //--------------------------------------------------------------------------------------------------
 
 impl InterruptController {
-    const MAX_LOCAL_IRQ_NUMBER: usize = 11;
+    // Restrict to 3 for now. This makes future code for local_ic.rs more straight forward.
+    const MAX_LOCAL_IRQ_NUMBER: usize = 3;
     const MAX_PERIPHERAL_IRQ_NUMBER: usize = 63;
-    const NUM_PERIPHERAL_IRQS: usize = Self::MAX_PERIPHERAL_IRQ_NUMBER + 1;
 
     pub const COMPATIBLE: &'static str = "BCM Interrupt Controller";
 
diff --git a/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index c9711049d..06802d272 100644
--- a/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -3,8 +3,12 @@
 // Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Peripheral Interrupt Controller Driver.
+//!
+//! # Resources
+//!
+//! - <https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf>
 
-use super::{InterruptController, PendingIRQs, PeripheralIRQ};
+use super::{PendingIRQs, PeripheralIRQ};
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper,
     exception,
@@ -48,8 +52,7 @@ type WriteOnlyRegisters = MMIODerefWrapper<WORegisterBlock>;
 /// Abstraction for the ReadOnly parts of the associated MMIO registers.
 type ReadOnlyRegisters = MMIODerefWrapper<RORegisterBlock>;
 
-type HandlerTable =
-    [Option<exception::asynchronous::IRQDescriptor>; InterruptController::NUM_PERIPHERAL_IRQS];
+type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; PeripheralIRQ::NUM_TOTAL];
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -81,7 +84,7 @@ impl PeripheralIC {
         Self {
             wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(mmio_start_addr)),
             ro_registers: ReadOnlyRegisters::new(mmio_start_addr),
-            handler_table: InitStateLock::new([None; InterruptController::NUM_PERIPHERAL_IRQS]),
+            handler_table: InitStateLock::new([None; PeripheralIRQ::NUM_TOTAL]),
         }
     }
 
diff --git a/18_backtrace/kernel/src/exception/asynchronous.rs b/18_backtrace/kernel/src/exception/asynchronous.rs
index 3544e621d..83ca1aa6d 100644
--- a/18_backtrace/kernel/src/exception/asynchronous.rs
+++ b/18_backtrace/kernel/src/exception/asynchronous.rs
@@ -126,6 +126,9 @@ impl<'irq_context> IRQContext<'irq_context> {
 }
 
 impl<const MAX_INCLUSIVE: usize> IRQNumber<{ MAX_INCLUSIVE }> {
+    /// The total number of IRQs this type supports.
+    pub const NUM_TOTAL: usize = MAX_INCLUSIVE + 1;
+
     /// Creates a new instance if number <= MAX_INCLUSIVE.
     pub const fn new(number: usize) -> Self {
         assert!(number <= MAX_INCLUSIVE);
diff --git a/18_backtrace/kernel/src/symbols.rs b/18_backtrace/kernel/src/symbols.rs
index 7f439ce22..680b8eaf6 100644
--- a/18_backtrace/kernel/src/symbols.rs
+++ b/18_backtrace/kernel/src/symbols.rs
@@ -34,13 +34,18 @@ fn kernel_symbol_section_virt_start_addr() -> Address<Virtual> {
     Address::new(unsafe { __kernel_symbols_start.get() as usize })
 }
 
+fn num_kernel_symbols() -> usize {
+    unsafe {
+        // Read volatile is needed here to prevent the compiler from optimizing NUM_KERNEL_SYMBOLS
+        // away.
+        core::ptr::read_volatile(&NUM_KERNEL_SYMBOLS as *const u64) as usize
+    }
+}
+
 fn kernel_symbols_slice() -> &'static [Symbol] {
     let ptr = kernel_symbol_section_virt_start_addr().as_usize() as *const Symbol;
 
-    unsafe {
-        let num = core::ptr::read_volatile(&NUM_KERNEL_SYMBOLS as *const u64) as usize;
-        slice::from_raw_parts(ptr, num)
-    }
+    unsafe { slice::from_raw_parts(ptr, num_kernel_symbols()) }
 }
 
 //--------------------------------------------------------------------------------------------------
diff --git a/19_kernel_heap/README.md b/19_kernel_heap/README.md
index 11417c2f9..b1463fc50 100644
--- a/19_kernel_heap/README.md
+++ b/19_kernel_heap/README.md
@@ -298,57 +298,44 @@ diff -uNr 18_backtrace/kernel/src/bsp/device_driver/arm/gicv2.rs 19_kernel_heap/
  // Private Definitions
  //--------------------------------------------------------------------------------------------------
 
--type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; GICv2::NUM_IRQS];
+-type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; IRQNumber::NUM_TOTAL];
 +type HandlerTable = Vec<Option<exception::asynchronous::IRQDescriptor>>;
 
  //--------------------------------------------------------------------------------------------------
  // Public Definitions
-@@ -119,8 +120,7 @@
+@@ -119,7 +120,7 @@
  //--------------------------------------------------------------------------------------------------
 
  impl GICv2 {
 -    const MAX_IRQ_NUMBER: usize = 300; // Normally 1019, but keep it lower to save some space.
--    const NUM_IRQS: usize = Self::MAX_IRQ_NUMBER + 1;
 +    const MAX_IRQ_NUMBER: usize = 1019;
 
      pub const COMPATIBLE: &'static str = "GICv2 (ARM Generic Interrupt Controller v2)";
 
-@@ -137,7 +137,7 @@
+@@ -136,7 +137,7 @@
          Self {
              gicd: gicd::GICD::new(gicd_mmio_start_addr),
              gicc: gicc::GICC::new(gicc_mmio_start_addr),
--            handler_table: InitStateLock::new([None; Self::NUM_IRQS]),
+-            handler_table: InitStateLock::new([None; IRQNumber::NUM_TOTAL]),
 +            handler_table: InitStateLock::new(Vec::new()),
              post_init_callback,
          }
      }
-@@ -178,6 +178,12 @@
-         self.handler_table.write(|table| {
-             let irq_number = irq_number.get();
-
-+            if table.len() < irq_number {
-+                // IRQDescriptor has an integrated range sanity check on construction, so this
-+                // vector can't grow arbitrarily big.
-+                table.resize(irq_number + 1, None);
-+            }
+@@ -153,6 +154,9 @@
+     }
+
+     unsafe fn init(&self) -> Result<(), &'static str> {
++        self.handler_table
++            .write(|table| table.resize(IRQNumber::NUM_TOTAL, None));
 +
-             if table[irq_number].is_some() {
-                 return Err("IRQ handler already registered");
-             }
+         if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
+             self.gicd.boot_core_init();
+         }
 
 diff -uNr 18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs 19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
 --- 18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
 +++ 19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
-@@ -4,7 +4,7 @@
-
- //! Peripheral Interrupt Controller Driver.
-
--use super::{InterruptController, PendingIRQs, PeripheralIRQ};
-+use super::{PendingIRQs, PeripheralIRQ};
- use crate::{
-     bsp::device_driver::common::MMIODerefWrapper,
-     exception,
-@@ -12,6 +12,7 @@
+@@ -16,6 +16,7 @@
      synchronization,
      synchronization::{IRQSafeNullLock, InitStateLock},
  };
@@ -356,50 +343,46 @@ diff -uNr 18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_contro
  use tock_registers::{
      interfaces::{Readable, Writeable},
      register_structs,
-@@ -48,8 +49,7 @@
+@@ -52,7 +53,7 @@
  /// Abstraction for the ReadOnly parts of the associated MMIO registers.
  type ReadOnlyRegisters = MMIODerefWrapper<RORegisterBlock>;
 
--type HandlerTable =
--    [Option<exception::asynchronous::IRQDescriptor>; InterruptController::NUM_PERIPHERAL_IRQS];
+-type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; PeripheralIRQ::NUM_TOTAL];
 +type HandlerTable = Vec<Option<exception::asynchronous::IRQDescriptor>>;
 
  //--------------------------------------------------------------------------------------------------
  // Public Definitions
-@@ -81,7 +81,7 @@
+@@ -84,10 +85,16 @@
          Self {
              wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(mmio_start_addr)),
              ro_registers: ReadOnlyRegisters::new(mmio_start_addr),
--            handler_table: InitStateLock::new([None; InterruptController::NUM_PERIPHERAL_IRQS]),
+-            handler_table: InitStateLock::new([None; PeripheralIRQ::NUM_TOTAL]),
 +            handler_table: InitStateLock::new(Vec::new()),
          }
      }
 
-@@ -110,6 +110,12 @@
-         self.handler_table.write(|table| {
-             let irq_number = irq.get();
-
-+            if table.len() < irq_number {
-+                // IRQDescriptor has an integrated range sanity check on construction, so this
-+                // vector can't grow arbitrarily big.
-+                table.resize(irq_number + 1, None);
-+            }
++    /// Called by the kernel to bring up the device.
++    pub fn init(&self) {
++        self.handler_table
++            .write(|table| table.resize(PeripheralIRQ::NUM_TOTAL, None));
++    }
 +
-             if table[irq_number].is_some() {
-                 return Err("IRQ handler already registered");
-             }
+     /// Query the list of pending IRQs.
+     fn pending_irqs(&self) -> PendingIRQs {
+         let pending_mask: u64 = (u64::from(self.ro_registers.PENDING_2.get()) << 32)
 
 diff -uNr 18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs 19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
 --- 18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
 +++ 19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
-@@ -77,7 +77,6 @@
- impl InterruptController {
-     const MAX_LOCAL_IRQ_NUMBER: usize = 11;
-     const MAX_PERIPHERAL_IRQ_NUMBER: usize = 63;
--    const NUM_PERIPHERAL_IRQS: usize = Self::MAX_PERIPHERAL_IRQ_NUMBER + 1;
+@@ -104,6 +104,8 @@
+     }
 
-     pub const COMPATIBLE: &'static str = "BCM Interrupt Controller";
+     unsafe fn init(&self) -> Result<(), &'static str> {
++        self.periph.init();
++
+         (self.post_init_callback)();
 
+         Ok(())
 
 diff -uNr 18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 --- 18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
diff --git a/19_kernel_heap/kernel/src/_arch/aarch64/time.rs b/19_kernel_heap/kernel/src/_arch/aarch64/time.rs
index 255a5a45d..ad8ba84dd 100644
--- a/19_kernel_heap/kernel/src/_arch/aarch64/time.rs
+++ b/19_kernel_heap/kernel/src/_arch/aarch64/time.rs
@@ -42,6 +42,15 @@ static ARCH_TIMER_COUNTER_FREQUENCY: NonZeroU32 = NonZeroU32::MIN;
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
+fn arch_timer_counter_frequency() -> NonZeroU32 {
+    // Read volatile is needed here to prevent the compiler from optimizing
+    // ARCH_TIMER_COUNTER_FREQUENCY away.
+    //
+    // This is safe, because all the safety requirements as stated in read_volatile()'s
+    // documentation are fulfilled.
+    unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }
+}
+
 impl GenericTimerCounterValue {
     pub const MAX: Self = GenericTimerCounterValue(u64::MAX);
 }
@@ -60,13 +69,7 @@ impl From<GenericTimerCounterValue> for Duration {
             return Duration::ZERO;
         }
 
-        // Read volatile is needed here to prevent the compiler from optimizing
-        // ARCH_TIMER_COUNTER_FREQUENCY away.
-        //
-        // This is safe, because all the safety requirements as stated in read_volatile()'s
-        // documentation are fulfilled.
-        let frequency: NonZeroU64 =
-            unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }.into();
+        let frequency: NonZeroU64 = arch_timer_counter_frequency().into();
 
         // Div<NonZeroU64> implementation for u64 cannot panic.
         let secs = counter_value.0.div(frequency);
@@ -101,10 +104,7 @@ impl TryFrom<Duration> for GenericTimerCounterValue {
             return Err("Conversion error. Duration too big");
         }
 
-        // This is safe, because all the safety requirements as stated in read_volatile()'s
-        // documentation are fulfilled.
-        let frequency: u128 =
-            unsafe { u32::from(core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY)) as u128 };
+        let frequency: u128 = u32::from(arch_timer_counter_frequency()) as u128;
         let duration: u128 = duration.as_nanos();
 
         // This is safe, because frequency can never be greater than u32::MAX, and
diff --git a/19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2.rs b/19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2.rs
index cb7c69ee2..69ba8513c 100644
--- a/19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2.rs
+++ b/19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2.rs
@@ -154,6 +154,9 @@ impl driver::interface::DeviceDriver for GICv2 {
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
+        self.handler_table
+            .write(|table| table.resize(IRQNumber::NUM_TOTAL, None));
+
         if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
             self.gicd.boot_core_init();
         }
@@ -178,12 +181,6 @@ impl exception::asynchronous::interface::IRQManager for GICv2 {
         self.handler_table.write(|table| {
             let irq_number = irq_number.get();
 
-            if table.len() < irq_number {
-                // IRQDescriptor has an integrated range sanity check on construction, so this
-                // vector can't grow arbitrarily big.
-                table.resize(irq_number + 1, None);
-            }
-
             if table[irq_number].is_some() {
                 return Err("IRQ handler already registered");
             }
diff --git a/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
index a93b0bc9e..658d3705f 100644
--- a/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+++ b/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -57,16 +57,13 @@ impl Iterator for PendingIRQs {
     type Item = usize;
 
     fn next(&mut self) -> Option<Self::Item> {
-        use core::intrinsics::cttz;
-
-        let next = cttz(self.bitmask);
-        if next == 64 {
+        if self.bitmask == 0 {
             return None;
         }
 
-        self.bitmask &= !(1 << next);
-
-        Some(next as usize)
+        let next = self.bitmask.trailing_zeros() as usize;
+        self.bitmask &= self.bitmask.wrapping_sub(1);
+        Some(next)
     }
 }
 
@@ -75,7 +72,8 @@ impl Iterator for PendingIRQs {
 //--------------------------------------------------------------------------------------------------
 
 impl InterruptController {
-    const MAX_LOCAL_IRQ_NUMBER: usize = 11;
+    // Restrict to 3 for now. This makes future code for local_ic.rs more straight forward.
+    const MAX_LOCAL_IRQ_NUMBER: usize = 3;
     const MAX_PERIPHERAL_IRQ_NUMBER: usize = 63;
 
     pub const COMPATIBLE: &'static str = "BCM Interrupt Controller";
@@ -106,6 +104,8 @@ impl driver::interface::DeviceDriver for InterruptController {
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
+        self.periph.init();
+
         (self.post_init_callback)();
 
         Ok(())
diff --git a/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index 65a9e7a09..90b563788 100644
--- a/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -3,6 +3,10 @@
 // Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 
 //! Peripheral Interrupt Controller Driver.
+//!
+//! # Resources
+//!
+//! - <https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf>
 
 use super::{PendingIRQs, PeripheralIRQ};
 use crate::{
@@ -85,6 +89,12 @@ impl PeripheralIC {
         }
     }
 
+    /// Called by the kernel to bring up the device.
+    pub fn init(&self) {
+        self.handler_table
+            .write(|table| table.resize(PeripheralIRQ::NUM_TOTAL, None));
+    }
+
     /// Query the list of pending IRQs.
     fn pending_irqs(&self) -> PendingIRQs {
         let pending_mask: u64 = (u64::from(self.ro_registers.PENDING_2.get()) << 32)
@@ -110,12 +120,6 @@ impl exception::asynchronous::interface::IRQManager for PeripheralIC {
         self.handler_table.write(|table| {
             let irq_number = irq.get();
 
-            if table.len() < irq_number {
-                // IRQDescriptor has an integrated range sanity check on construction, so this
-                // vector can't grow arbitrarily big.
-                table.resize(irq_number + 1, None);
-            }
-
             if table[irq_number].is_some() {
                 return Err("IRQ handler already registered");
             }
diff --git a/19_kernel_heap/kernel/src/exception/asynchronous.rs b/19_kernel_heap/kernel/src/exception/asynchronous.rs
index 3544e621d..83ca1aa6d 100644
--- a/19_kernel_heap/kernel/src/exception/asynchronous.rs
+++ b/19_kernel_heap/kernel/src/exception/asynchronous.rs
@@ -126,6 +126,9 @@ impl<'irq_context> IRQContext<'irq_context> {
 }
 
 impl<const MAX_INCLUSIVE: usize> IRQNumber<{ MAX_INCLUSIVE }> {
+    /// The total number of IRQs this type supports.
+    pub const NUM_TOTAL: usize = MAX_INCLUSIVE + 1;
+
     /// Creates a new instance if number <= MAX_INCLUSIVE.
     pub const fn new(number: usize) -> Self {
         assert!(number <= MAX_INCLUSIVE);
diff --git a/19_kernel_heap/kernel/src/symbols.rs b/19_kernel_heap/kernel/src/symbols.rs
index 7f439ce22..680b8eaf6 100644
--- a/19_kernel_heap/kernel/src/symbols.rs
+++ b/19_kernel_heap/kernel/src/symbols.rs
@@ -34,13 +34,18 @@ fn kernel_symbol_section_virt_start_addr() -> Address<Virtual> {
     Address::new(unsafe { __kernel_symbols_start.get() as usize })
 }
 
+fn num_kernel_symbols() -> usize {
+    unsafe {
+        // Read volatile is needed here to prevent the compiler from optimizing NUM_KERNEL_SYMBOLS
+        // away.
+        core::ptr::read_volatile(&NUM_KERNEL_SYMBOLS as *const u64) as usize
+    }
+}
+
 fn kernel_symbols_slice() -> &'static [Symbol] {
     let ptr = kernel_symbol_section_virt_start_addr().as_usize() as *const Symbol;
 
-    unsafe {
-        let num = core::ptr::read_volatile(&NUM_KERNEL_SYMBOLS as *const u64) as usize;
-        slice::from_raw_parts(ptr, num)
-    }
+    unsafe { slice::from_raw_parts(ptr, num_kernel_symbols()) }
 }
 
 //--------------------------------------------------------------------------------------------------
diff --git a/X1_JTAG_boot/src/_arch/aarch64/time.rs b/X1_JTAG_boot/src/_arch/aarch64/time.rs
index 3d3a20d71..54db51c31 100644
--- a/X1_JTAG_boot/src/_arch/aarch64/time.rs
+++ b/X1_JTAG_boot/src/_arch/aarch64/time.rs
@@ -43,6 +43,15 @@ static ARCH_TIMER_COUNTER_FREQUENCY: NonZeroU32 = NonZeroU32::MIN;
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
+fn arch_timer_counter_frequency() -> NonZeroU32 {
+    // Read volatile is needed here to prevent the compiler from optimizing
+    // ARCH_TIMER_COUNTER_FREQUENCY away.
+    //
+    // This is safe, because all the safety requirements as stated in read_volatile()'s
+    // documentation are fulfilled.
+    unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }
+}
+
 impl GenericTimerCounterValue {
     pub const MAX: Self = GenericTimerCounterValue(u64::MAX);
 }
@@ -61,13 +70,7 @@ impl From<GenericTimerCounterValue> for Duration {
             return Duration::ZERO;
         }
 
-        // Read volatile is needed here to prevent the compiler from optimizing
-        // ARCH_TIMER_COUNTER_FREQUENCY away.
-        //
-        // This is safe, because all the safety requirements as stated in read_volatile()'s
-        // documentation are fulfilled.
-        let frequency: NonZeroU64 =
-            unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }.into();
+        let frequency: NonZeroU64 = arch_timer_counter_frequency().into();
 
         // Div<NonZeroU64> implementation for u64 cannot panic.
         let secs = counter_value.0.div(frequency);
@@ -102,10 +105,7 @@ impl TryFrom<Duration> for GenericTimerCounterValue {
             return Err("Conversion error. Duration too big");
         }
 
-        // This is safe, because all the safety requirements as stated in read_volatile()'s
-        // documentation are fulfilled.
-        let frequency: u128 =
-            unsafe { u32::from(core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY)) as u128 };
+        let frequency: u128 = u32::from(arch_timer_counter_frequency()) as u128;
         let duration: u128 = duration.as_nanos();
 
         // This is safe, because frequency can never be greater than u32::MAX, and

From 7014c0cdfd6c5bff4cb5a6267ae03e2186cf4467 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 26 Sep 2022 23:15:07 +0200
Subject: [PATCH 190/214] Bump dependencies

---
 02_runtime_init/Cargo.lock                    |   8 ++++----
 02_runtime_init/Cargo.toml                    |   2 +-
 02_runtime_init/README.md                     |   2 +-
 03_hacky_hello_world/Cargo.lock               |   8 ++++----
 03_hacky_hello_world/Cargo.toml               |   2 +-
 04_safe_globals/Cargo.lock                    |   8 ++++----
 04_safe_globals/Cargo.toml                    |   2 +-
 05_drivers_gpio_uart/Cargo.lock               |   8 ++++----
 05_drivers_gpio_uart/Cargo.toml               |   4 ++--
 05_drivers_gpio_uart/README.md                |   4 ++--
 06_uart_chainloader/Cargo.lock                |   8 ++++----
 06_uart_chainloader/Cargo.toml                |   4 ++--
 06_uart_chainloader/demo_payload_rpi3.img     | Bin 7648 -> 7648 bytes
 06_uart_chainloader/demo_payload_rpi4.img     | Bin 7576 -> 7584 bytes
 07_timestamps/Cargo.lock                      |   8 ++++----
 07_timestamps/Cargo.toml                      |   4 ++--
 07_timestamps/README.md                       |   2 +-
 07_timestamps/src/_arch/aarch64/time.rs       |   2 +-
 08_hw_debug_JTAG/Cargo.lock                   |   8 ++++----
 08_hw_debug_JTAG/Cargo.toml                   |   4 ++--
 08_hw_debug_JTAG/src/_arch/aarch64/time.rs    |   2 +-
 09_privilege_level/Cargo.lock                 |   8 ++++----
 09_privilege_level/Cargo.toml                 |   4 ++--
 09_privilege_level/src/_arch/aarch64/time.rs  |   2 +-
 .../Cargo.lock                                |   8 ++++----
 .../Cargo.toml                                |   4 ++--
 .../src/_arch/aarch64/time.rs                 |   2 +-
 11_exceptions_part1_groundwork/Cargo.lock     |   8 ++++----
 11_exceptions_part1_groundwork/Cargo.toml     |   4 ++--
 .../src/_arch/aarch64/time.rs                 |   2 +-
 12_integrated_testing/Cargo.lock              |  16 ++++++++--------
 12_integrated_testing/kernel/Cargo.toml       |   4 ++--
 .../kernel/src/_arch/aarch64/time.rs          |   2 +-
 .../Cargo.lock                                |  16 ++++++++--------
 13_exceptions_part2_peripheral_IRQs/README.md |  12 ++++++------
 .../kernel/Cargo.toml                         |   4 ++--
 .../kernel/src/_arch/aarch64/time.rs          |   2 +-
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |   6 +++---
 14_virtual_mem_part2_mmio_remap/Cargo.lock    |  16 ++++++++--------
 .../kernel/Cargo.toml                         |   4 ++--
 .../kernel/src/_arch/aarch64/time.rs          |   2 +-
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |   6 +++---
 .../Cargo.lock                                |  16 ++++++++--------
 .../kernel/Cargo.toml                         |   4 ++--
 .../kernel/src/_arch/aarch64/time.rs          |   2 +-
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |   6 +++---
 .../Cargo.lock                                |  16 ++++++++--------
 .../kernel/Cargo.toml                         |   4 ++--
 .../kernel/src/_arch/aarch64/time.rs          |   2 +-
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |   6 +++---
 17_kernel_symbols/Cargo.lock                  |  16 ++++++++--------
 17_kernel_symbols/README.md                   |   2 +-
 17_kernel_symbols/kernel/Cargo.toml           |   4 ++--
 .../kernel/src/_arch/aarch64/time.rs          |   2 +-
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |   6 +++---
 18_backtrace/Cargo.lock                       |  16 ++++++++--------
 18_backtrace/kernel/Cargo.toml                |   4 ++--
 18_backtrace/kernel/src/_arch/aarch64/time.rs |   2 +-
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |   6 +++---
 19_kernel_heap/Cargo.lock                     |  16 ++++++++--------
 19_kernel_heap/README.md                      |   2 +-
 19_kernel_heap/kernel/Cargo.toml              |   4 ++--
 .../kernel/src/_arch/aarch64/time.rs          |   2 +-
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |   6 +++---
 X1_JTAG_boot/Cargo.lock                       |   8 ++++----
 X1_JTAG_boot/Cargo.toml                       |   4 ++--
 X1_JTAG_boot/jtag_boot_rpi3.img               | Bin 8656 -> 8648 bytes
 X1_JTAG_boot/jtag_boot_rpi4.img               | Bin 7752 -> 7744 bytes
 X1_JTAG_boot/src/_arch/aarch64/time.rs        |   2 +-
 69 files changed, 190 insertions(+), 190 deletions(-)

diff --git a/02_runtime_init/Cargo.lock b/02_runtime_init/Cargo.lock
index bae18da05..17e641973 100644
--- a/02_runtime_init/Cargo.lock
+++ b/02_runtime_init/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.5.0"
+version = "8.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "bdecfbb28672ad3664e71ae05a398a52df430d86d660691501b28968cc4467e6"
+checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
 dependencies = [
  "tock-registers",
 ]
@@ -20,6 +20,6 @@ dependencies = [
 
 [[package]]
 name = "tock-registers"
-version = "0.7.0"
+version = "0.8.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
+checksum = "696941a0aee7e276a165a978b37918fd5d22c55c3d6bda197813070ca9c0f21c"
diff --git a/02_runtime_init/Cargo.toml b/02_runtime_init/Cargo.toml
index 52786a400..59566db09 100644
--- a/02_runtime_init/Cargo.toml
+++ b/02_runtime_init/Cargo.toml
@@ -24,4 +24,4 @@ path = "src/main.rs"
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "7.x.x" }
+cortex-a = { version = "8.x.x" }
diff --git a/02_runtime_init/README.md b/02_runtime_init/README.md
index f5b9355c5..80fd77a4e 100644
--- a/02_runtime_init/README.md
+++ b/02_runtime_init/README.md
@@ -47,7 +47,7 @@ diff -uNr 01_wait_forever/Cargo.toml 02_runtime_init/Cargo.toml
 +
 +# Platform specific dependencies
 +[target.'cfg(target_arch = "aarch64")'.dependencies]
-+cortex-a = { version = "7.x.x" }
++cortex-a = { version = "8.x.x" }
 
 diff -uNr 01_wait_forever/Makefile 02_runtime_init/Makefile
 --- 01_wait_forever/Makefile
diff --git a/03_hacky_hello_world/Cargo.lock b/03_hacky_hello_world/Cargo.lock
index baa9f9c4b..6b68a92ee 100644
--- a/03_hacky_hello_world/Cargo.lock
+++ b/03_hacky_hello_world/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.5.0"
+version = "8.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "bdecfbb28672ad3664e71ae05a398a52df430d86d660691501b28968cc4467e6"
+checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
 dependencies = [
  "tock-registers",
 ]
@@ -20,6 +20,6 @@ dependencies = [
 
 [[package]]
 name = "tock-registers"
-version = "0.7.0"
+version = "0.8.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
+checksum = "696941a0aee7e276a165a978b37918fd5d22c55c3d6bda197813070ca9c0f21c"
diff --git a/03_hacky_hello_world/Cargo.toml b/03_hacky_hello_world/Cargo.toml
index cca928349..e3e95003b 100644
--- a/03_hacky_hello_world/Cargo.toml
+++ b/03_hacky_hello_world/Cargo.toml
@@ -24,4 +24,4 @@ path = "src/main.rs"
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "7.x.x" }
+cortex-a = { version = "8.x.x" }
diff --git a/04_safe_globals/Cargo.lock b/04_safe_globals/Cargo.lock
index 72bdf6309..21c1ad6fd 100644
--- a/04_safe_globals/Cargo.lock
+++ b/04_safe_globals/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.5.0"
+version = "8.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "bdecfbb28672ad3664e71ae05a398a52df430d86d660691501b28968cc4467e6"
+checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
 dependencies = [
  "tock-registers",
 ]
@@ -20,6 +20,6 @@ dependencies = [
 
 [[package]]
 name = "tock-registers"
-version = "0.7.0"
+version = "0.8.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
+checksum = "696941a0aee7e276a165a978b37918fd5d22c55c3d6bda197813070ca9c0f21c"
diff --git a/04_safe_globals/Cargo.toml b/04_safe_globals/Cargo.toml
index cb51da559..51ddd52be 100644
--- a/04_safe_globals/Cargo.toml
+++ b/04_safe_globals/Cargo.toml
@@ -24,4 +24,4 @@ path = "src/main.rs"
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "7.x.x" }
+cortex-a = { version = "8.x.x" }
diff --git a/05_drivers_gpio_uart/Cargo.lock b/05_drivers_gpio_uart/Cargo.lock
index 87686e393..93873c454 100644
--- a/05_drivers_gpio_uart/Cargo.lock
+++ b/05_drivers_gpio_uart/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.5.0"
+version = "8.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "bdecfbb28672ad3664e71ae05a398a52df430d86d660691501b28968cc4467e6"
+checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
 dependencies = [
  "tock-registers",
 ]
@@ -21,6 +21,6 @@ dependencies = [
 
 [[package]]
 name = "tock-registers"
-version = "0.7.0"
+version = "0.8.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
+checksum = "696941a0aee7e276a165a978b37918fd5d22c55c3d6bda197813070ca9c0f21c"
diff --git a/05_drivers_gpio_uart/Cargo.toml b/05_drivers_gpio_uart/Cargo.toml
index b2f17d8d3..1f6db5de9 100644
--- a/05_drivers_gpio_uart/Cargo.toml
+++ b/05_drivers_gpio_uart/Cargo.toml
@@ -23,8 +23,8 @@ path = "src/main.rs"
 [dependencies]
 
 # Optional dependencies
-tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
+tock-registers = { version = "0.8.x", default-features = false, features = ["register_types"], optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "7.x.x" }
+cortex-a = { version = "8.x.x" }
diff --git a/05_drivers_gpio_uart/README.md b/05_drivers_gpio_uart/README.md
index 572cd1a8c..cbd43e718 100644
--- a/05_drivers_gpio_uart/README.md
+++ b/05_drivers_gpio_uart/README.md
@@ -131,11 +131,11 @@ diff -uNr 04_safe_globals/Cargo.toml 05_drivers_gpio_uart/Cargo.toml
  [dependencies]
 
 +# Optional dependencies
-+tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
++tock-registers = { version = "0.8.x", default-features = false, features = ["register_types"], optional = true }
 +
  # Platform specific dependencies
  [target.'cfg(target_arch = "aarch64")'.dependencies]
- cortex-a = { version = "7.x.x" }
+ cortex-a = { version = "8.x.x" }
 
 diff -uNr 04_safe_globals/Makefile 05_drivers_gpio_uart/Makefile
 --- 04_safe_globals/Makefile
diff --git a/06_uart_chainloader/Cargo.lock b/06_uart_chainloader/Cargo.lock
index 0936e7c6c..c26c68d1b 100644
--- a/06_uart_chainloader/Cargo.lock
+++ b/06_uart_chainloader/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.5.0"
+version = "8.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "bdecfbb28672ad3664e71ae05a398a52df430d86d660691501b28968cc4467e6"
+checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
 dependencies = [
  "tock-registers",
 ]
@@ -21,6 +21,6 @@ dependencies = [
 
 [[package]]
 name = "tock-registers"
-version = "0.7.0"
+version = "0.8.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
+checksum = "696941a0aee7e276a165a978b37918fd5d22c55c3d6bda197813070ca9c0f21c"
diff --git a/06_uart_chainloader/Cargo.toml b/06_uart_chainloader/Cargo.toml
index f00c87a84..8770d7a04 100644
--- a/06_uart_chainloader/Cargo.toml
+++ b/06_uart_chainloader/Cargo.toml
@@ -23,8 +23,8 @@ path = "src/main.rs"
 [dependencies]
 
 # Optional dependencies
-tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
+tock-registers = { version = "0.8.x", default-features = false, features = ["register_types"], optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "7.x.x" }
+cortex-a = { version = "8.x.x" }
diff --git a/06_uart_chainloader/demo_payload_rpi3.img b/06_uart_chainloader/demo_payload_rpi3.img
index 2016c14e26bd5edce571ca2424a5cfa9b916d826..20f13981c87fa20c518e3039149ff063beb0eb3d 100755
GIT binary patch
delta 1090
zcmYjPO-vI(6n?u?U@0O^w?9H#yQTcJ(iFs&s%TR1;9rbbO*GMng&?4S1fz);D8Yp2
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delta 1118
zcmZ8fU1$?o6h3!ut!b2+=C`&Jb8FkQp&`cpm^KwH5fMdMErLZK+GvZ0ZCaVK3qGZ#
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diff --git a/06_uart_chainloader/demo_payload_rpi4.img b/06_uart_chainloader/demo_payload_rpi4.img
index 7be0ece0ad39e99544280e4fe3d9f82d0d874875..779cc308d9b2decf926e6ea6a4e3f8764183ede1 100755
GIT binary patch
delta 908
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H<Ic9fo?qMx

delta 895
zcmYjPPe>GD6o22$PR)ketUJ4-`-j~nmfdx2ldNrZ1E-cm3oJ#^F6pU5r_2tXYU>mz
z<n#oqlSUA;&_Tq|gHb}@9ukGD4jsmdSfhhbM3dn3&F*LQ;N!jD@Av)=Go8JkJvalI
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diff --git a/07_timestamps/Cargo.lock b/07_timestamps/Cargo.lock
index 64174c539..5155fff21 100644
--- a/07_timestamps/Cargo.lock
+++ b/07_timestamps/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.5.0"
+version = "8.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "bdecfbb28672ad3664e71ae05a398a52df430d86d660691501b28968cc4467e6"
+checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
 dependencies = [
  "tock-registers",
 ]
@@ -21,6 +21,6 @@ dependencies = [
 
 [[package]]
 name = "tock-registers"
-version = "0.7.0"
+version = "0.8.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
+checksum = "696941a0aee7e276a165a978b37918fd5d22c55c3d6bda197813070ca9c0f21c"
diff --git a/07_timestamps/Cargo.toml b/07_timestamps/Cargo.toml
index 970def3b1..5997997ad 100644
--- a/07_timestamps/Cargo.toml
+++ b/07_timestamps/Cargo.toml
@@ -23,8 +23,8 @@ path = "src/main.rs"
 [dependencies]
 
 # Optional dependencies
-tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
+tock-registers = { version = "0.8.x", default-features = false, features = ["register_types"], optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "7.x.x" }
+cortex-a = { version = "8.x.x" }
diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index c96a30e44..2e8df3c25 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -380,7 +380,7 @@ diff -uNr 06_uart_chainloader/src/_arch/aarch64/time.rs 07_timestamps/src/_arch/
 +#[inline(always)]
 +fn read_cntpct() -> GenericTimerCounterValue {
 +    // Prevent that the counter is read ahead of time due to out-of-order execution.
-+    unsafe { barrier::isb(barrier::SY) };
++    barrier::isb(barrier::SY);
 +    let cnt = CNTPCT_EL0.get();
 +
 +    GenericTimerCounterValue(cnt)
diff --git a/07_timestamps/src/_arch/aarch64/time.rs b/07_timestamps/src/_arch/aarch64/time.rs
index ad8ba84dd..1e2efbec0 100644
--- a/07_timestamps/src/_arch/aarch64/time.rs
+++ b/07_timestamps/src/_arch/aarch64/time.rs
@@ -120,7 +120,7 @@ impl TryFrom<Duration> for GenericTimerCounterValue {
 #[inline(always)]
 fn read_cntpct() -> GenericTimerCounterValue {
     // Prevent that the counter is read ahead of time due to out-of-order execution.
-    unsafe { barrier::isb(barrier::SY) };
+    barrier::isb(barrier::SY);
     let cnt = CNTPCT_EL0.get();
 
     GenericTimerCounterValue(cnt)
diff --git a/08_hw_debug_JTAG/Cargo.lock b/08_hw_debug_JTAG/Cargo.lock
index 6e628b862..bcfb442af 100644
--- a/08_hw_debug_JTAG/Cargo.lock
+++ b/08_hw_debug_JTAG/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.5.0"
+version = "8.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "bdecfbb28672ad3664e71ae05a398a52df430d86d660691501b28968cc4467e6"
+checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
 dependencies = [
  "tock-registers",
 ]
@@ -21,6 +21,6 @@ dependencies = [
 
 [[package]]
 name = "tock-registers"
-version = "0.7.0"
+version = "0.8.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
+checksum = "696941a0aee7e276a165a978b37918fd5d22c55c3d6bda197813070ca9c0f21c"
diff --git a/08_hw_debug_JTAG/Cargo.toml b/08_hw_debug_JTAG/Cargo.toml
index 638d4de1e..55963c384 100644
--- a/08_hw_debug_JTAG/Cargo.toml
+++ b/08_hw_debug_JTAG/Cargo.toml
@@ -23,8 +23,8 @@ path = "src/main.rs"
 [dependencies]
 
 # Optional dependencies
-tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
+tock-registers = { version = "0.8.x", default-features = false, features = ["register_types"], optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "7.x.x" }
+cortex-a = { version = "8.x.x" }
diff --git a/08_hw_debug_JTAG/src/_arch/aarch64/time.rs b/08_hw_debug_JTAG/src/_arch/aarch64/time.rs
index ad8ba84dd..1e2efbec0 100644
--- a/08_hw_debug_JTAG/src/_arch/aarch64/time.rs
+++ b/08_hw_debug_JTAG/src/_arch/aarch64/time.rs
@@ -120,7 +120,7 @@ impl TryFrom<Duration> for GenericTimerCounterValue {
 #[inline(always)]
 fn read_cntpct() -> GenericTimerCounterValue {
     // Prevent that the counter is read ahead of time due to out-of-order execution.
-    unsafe { barrier::isb(barrier::SY) };
+    barrier::isb(barrier::SY);
     let cnt = CNTPCT_EL0.get();
 
     GenericTimerCounterValue(cnt)
diff --git a/09_privilege_level/Cargo.lock b/09_privilege_level/Cargo.lock
index 5dc791a2b..29c6ef543 100644
--- a/09_privilege_level/Cargo.lock
+++ b/09_privilege_level/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.5.0"
+version = "8.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "bdecfbb28672ad3664e71ae05a398a52df430d86d660691501b28968cc4467e6"
+checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
 dependencies = [
  "tock-registers",
 ]
@@ -21,6 +21,6 @@ dependencies = [
 
 [[package]]
 name = "tock-registers"
-version = "0.7.0"
+version = "0.8.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
+checksum = "696941a0aee7e276a165a978b37918fd5d22c55c3d6bda197813070ca9c0f21c"
diff --git a/09_privilege_level/Cargo.toml b/09_privilege_level/Cargo.toml
index dccb5622d..a89435bcc 100644
--- a/09_privilege_level/Cargo.toml
+++ b/09_privilege_level/Cargo.toml
@@ -23,8 +23,8 @@ path = "src/main.rs"
 [dependencies]
 
 # Optional dependencies
-tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
+tock-registers = { version = "0.8.x", default-features = false, features = ["register_types"], optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "7.x.x" }
+cortex-a = { version = "8.x.x" }
diff --git a/09_privilege_level/src/_arch/aarch64/time.rs b/09_privilege_level/src/_arch/aarch64/time.rs
index ad8ba84dd..1e2efbec0 100644
--- a/09_privilege_level/src/_arch/aarch64/time.rs
+++ b/09_privilege_level/src/_arch/aarch64/time.rs
@@ -120,7 +120,7 @@ impl TryFrom<Duration> for GenericTimerCounterValue {
 #[inline(always)]
 fn read_cntpct() -> GenericTimerCounterValue {
     // Prevent that the counter is read ahead of time due to out-of-order execution.
-    unsafe { barrier::isb(barrier::SY) };
+    barrier::isb(barrier::SY);
     let cnt = CNTPCT_EL0.get();
 
     GenericTimerCounterValue(cnt)
diff --git a/10_virtual_mem_part1_identity_mapping/Cargo.lock b/10_virtual_mem_part1_identity_mapping/Cargo.lock
index 1115edab5..4bfff9358 100644
--- a/10_virtual_mem_part1_identity_mapping/Cargo.lock
+++ b/10_virtual_mem_part1_identity_mapping/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.5.0"
+version = "8.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "bdecfbb28672ad3664e71ae05a398a52df430d86d660691501b28968cc4467e6"
+checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
 dependencies = [
  "tock-registers",
 ]
@@ -21,6 +21,6 @@ dependencies = [
 
 [[package]]
 name = "tock-registers"
-version = "0.7.0"
+version = "0.8.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
+checksum = "696941a0aee7e276a165a978b37918fd5d22c55c3d6bda197813070ca9c0f21c"
diff --git a/10_virtual_mem_part1_identity_mapping/Cargo.toml b/10_virtual_mem_part1_identity_mapping/Cargo.toml
index 144767d30..d3e2582da 100644
--- a/10_virtual_mem_part1_identity_mapping/Cargo.toml
+++ b/10_virtual_mem_part1_identity_mapping/Cargo.toml
@@ -23,8 +23,8 @@ path = "src/main.rs"
 [dependencies]
 
 # Optional dependencies
-tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
+tock-registers = { version = "0.8.x", default-features = false, features = ["register_types"], optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "7.x.x" }
+cortex-a = { version = "8.x.x" }
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs
index ad8ba84dd..1e2efbec0 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs
@@ -120,7 +120,7 @@ impl TryFrom<Duration> for GenericTimerCounterValue {
 #[inline(always)]
 fn read_cntpct() -> GenericTimerCounterValue {
     // Prevent that the counter is read ahead of time due to out-of-order execution.
-    unsafe { barrier::isb(barrier::SY) };
+    barrier::isb(barrier::SY);
     let cnt = CNTPCT_EL0.get();
 
     GenericTimerCounterValue(cnt)
diff --git a/11_exceptions_part1_groundwork/Cargo.lock b/11_exceptions_part1_groundwork/Cargo.lock
index f1d4af579..c7bfdaddf 100644
--- a/11_exceptions_part1_groundwork/Cargo.lock
+++ b/11_exceptions_part1_groundwork/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.5.0"
+version = "8.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "bdecfbb28672ad3664e71ae05a398a52df430d86d660691501b28968cc4467e6"
+checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
 dependencies = [
  "tock-registers",
 ]
@@ -21,6 +21,6 @@ dependencies = [
 
 [[package]]
 name = "tock-registers"
-version = "0.7.0"
+version = "0.8.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
+checksum = "696941a0aee7e276a165a978b37918fd5d22c55c3d6bda197813070ca9c0f21c"
diff --git a/11_exceptions_part1_groundwork/Cargo.toml b/11_exceptions_part1_groundwork/Cargo.toml
index aa8a870c5..c8d3613fa 100644
--- a/11_exceptions_part1_groundwork/Cargo.toml
+++ b/11_exceptions_part1_groundwork/Cargo.toml
@@ -23,8 +23,8 @@ path = "src/main.rs"
 [dependencies]
 
 # Optional dependencies
-tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
+tock-registers = { version = "0.8.x", default-features = false, features = ["register_types"], optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "7.x.x" }
+cortex-a = { version = "8.x.x" }
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/time.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/time.rs
index ad8ba84dd..1e2efbec0 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/time.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/time.rs
@@ -120,7 +120,7 @@ impl TryFrom<Duration> for GenericTimerCounterValue {
 #[inline(always)]
 fn read_cntpct() -> GenericTimerCounterValue {
     // Prevent that the counter is read ahead of time due to out-of-order execution.
-    unsafe { barrier::isb(barrier::SY) };
+    barrier::isb(barrier::SY);
     let cnt = CNTPCT_EL0.get();
 
     GenericTimerCounterValue(cnt)
diff --git a/12_integrated_testing/Cargo.lock b/12_integrated_testing/Cargo.lock
index f188bfe0c..7af740b13 100644
--- a/12_integrated_testing/Cargo.lock
+++ b/12_integrated_testing/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.5.0"
+version = "8.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "bdecfbb28672ad3664e71ae05a398a52df430d86d660691501b28968cc4467e6"
+checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
 dependencies = [
  "tock-registers",
 ]
@@ -24,9 +24,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.43"
+version = "1.0.44"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "0a2ca2c61bc9f3d74d2886294ab7b9853abd9c1ad903a3ac7815c58989bb7bab"
+checksum = "7bd7356a8122b6c4a24a82b278680c73357984ca2fc79a0f9fa6dea7dced7c58"
 dependencies = [
  "unicode-ident",
 ]
@@ -48,9 +48,9 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.100"
+version = "1.0.101"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "52205623b1b0f064a4e71182c3b18ae902267282930c6d5462c91b859668426e"
+checksum = "e90cde112c4b9690b8cbe810cba9ddd8bc1d7472e2cae317b69e9438c1cba7d2"
 dependencies = [
  "proc-macro2",
  "quote",
@@ -73,9 +73,9 @@ version = "0.1.0"
 
 [[package]]
 name = "tock-registers"
-version = "0.7.0"
+version = "0.8.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
+checksum = "696941a0aee7e276a165a978b37918fd5d22c55c3d6bda197813070ca9c0f21c"
 
 [[package]]
 name = "unicode-ident"
diff --git a/12_integrated_testing/kernel/Cargo.toml b/12_integrated_testing/kernel/Cargo.toml
index 864cfb614..7bbca0b4a 100644
--- a/12_integrated_testing/kernel/Cargo.toml
+++ b/12_integrated_testing/kernel/Cargo.toml
@@ -18,12 +18,12 @@ test_build = ["qemu-exit"]
 test-types = { path = "../libraries/test-types" }
 
 # Optional dependencies
-tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
+tock-registers = { version = "0.8.x", default-features = false, features = ["register_types"], optional = true }
 qemu-exit = { version = "3.x.x", optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "7.x.x" }
+cortex-a = { version = "8.x.x" }
 
 ##--------------------------------------------------------------------------------------------------
 ## Testing
diff --git a/12_integrated_testing/kernel/src/_arch/aarch64/time.rs b/12_integrated_testing/kernel/src/_arch/aarch64/time.rs
index ad8ba84dd..1e2efbec0 100644
--- a/12_integrated_testing/kernel/src/_arch/aarch64/time.rs
+++ b/12_integrated_testing/kernel/src/_arch/aarch64/time.rs
@@ -120,7 +120,7 @@ impl TryFrom<Duration> for GenericTimerCounterValue {
 #[inline(always)]
 fn read_cntpct() -> GenericTimerCounterValue {
     // Prevent that the counter is read ahead of time due to out-of-order execution.
-    unsafe { barrier::isb(barrier::SY) };
+    barrier::isb(barrier::SY);
     let cnt = CNTPCT_EL0.get();
 
     GenericTimerCounterValue(cnt)
diff --git a/13_exceptions_part2_peripheral_IRQs/Cargo.lock b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
index e5a8e81cd..59d40ee6d 100644
--- a/13_exceptions_part2_peripheral_IRQs/Cargo.lock
+++ b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.5.0"
+version = "8.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "bdecfbb28672ad3664e71ae05a398a52df430d86d660691501b28968cc4467e6"
+checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
 dependencies = [
  "tock-registers",
 ]
@@ -24,9 +24,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.43"
+version = "1.0.44"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "0a2ca2c61bc9f3d74d2886294ab7b9853abd9c1ad903a3ac7815c58989bb7bab"
+checksum = "7bd7356a8122b6c4a24a82b278680c73357984ca2fc79a0f9fa6dea7dced7c58"
 dependencies = [
  "unicode-ident",
 ]
@@ -48,9 +48,9 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.100"
+version = "1.0.101"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "52205623b1b0f064a4e71182c3b18ae902267282930c6d5462c91b859668426e"
+checksum = "e90cde112c4b9690b8cbe810cba9ddd8bc1d7472e2cae317b69e9438c1cba7d2"
 dependencies = [
  "proc-macro2",
  "quote",
@@ -73,9 +73,9 @@ version = "0.1.0"
 
 [[package]]
 name = "tock-registers"
-version = "0.7.0"
+version = "0.8.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
+checksum = "696941a0aee7e276a165a978b37918fd5d22c55c3d6bda197813070ca9c0f21c"
 
 [[package]]
 name = "unicode-ident"
diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index 0bb676dbf..3d6d5f165 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -609,9 +609,9 @@ register_structs! {
         (0x004 => TYPER: ReadOnly<u32, TYPER::Register>),
         (0x008 => _reserved1),
         (0x104 => ISENABLER: [ReadWrite<u32>; 31]),
-        (0x108 => _reserved2),
+        (0x180 => _reserved2),
         (0x820 => ITARGETSR: [ReadWrite<u32, ITARGETSR::Register>; 248]),
-        (0x824 => @END),
+        (0xC00 => @END),
     }
 }
 
@@ -622,7 +622,7 @@ register_structs! {
         (0x100 => ISENABLER: ReadWrite<u32>),
         (0x104 => _reserved2),
         (0x800 => ITARGETSR: [ReadOnly<u32, ITARGETSR::Register>; 8]),
-        (0x804 => @END),
+        (0x820 => @END),
     }
 }
 ```
@@ -1098,9 +1098,9 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs 1
 +        (0x004 => TYPER: ReadOnly<u32, TYPER::Register>),
 +        (0x008 => _reserved1),
 +        (0x104 => ISENABLER: [ReadWrite<u32>; 31]),
-+        (0x108 => _reserved2),
++        (0x180 => _reserved2),
 +        (0x820 => ITARGETSR: [ReadWrite<u32, ITARGETSR::Register>; 248]),
-+        (0x824 => @END),
++        (0xC00 => @END),
 +    }
 +}
 +
@@ -1111,7 +1111,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs 1
 +        (0x100 => ISENABLER: ReadWrite<u32>),
 +        (0x104 => _reserved2),
 +        (0x800 => ITARGETSR: [ReadOnly<u32, ITARGETSR::Register>; 8]),
-+        (0x804 => @END),
++        (0x820 => @END),
 +    }
 +}
 +
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/Cargo.toml b/13_exceptions_part2_peripheral_IRQs/kernel/Cargo.toml
index f45458f9b..5f371dda4 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/Cargo.toml
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/Cargo.toml
@@ -18,12 +18,12 @@ test_build = ["qemu-exit"]
 test-types = { path = "../libraries/test-types" }
 
 # Optional dependencies
-tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
+tock-registers = { version = "0.8.x", default-features = false, features = ["register_types"], optional = true }
 qemu-exit = { version = "3.x.x", optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "7.x.x" }
+cortex-a = { version = "8.x.x" }
 
 ##--------------------------------------------------------------------------------------------------
 ## Testing
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/time.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/time.rs
index ad8ba84dd..1e2efbec0 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/time.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/time.rs
@@ -120,7 +120,7 @@ impl TryFrom<Duration> for GenericTimerCounterValue {
 #[inline(always)]
 fn read_cntpct() -> GenericTimerCounterValue {
     // Prevent that the counter is read ahead of time due to out-of-order execution.
-    unsafe { barrier::isb(barrier::SY) };
+    barrier::isb(barrier::SY);
     let cnt = CNTPCT_EL0.get();
 
     GenericTimerCounterValue(cnt)
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
index bc7f7f236..54aab60c6 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -50,9 +50,9 @@ register_structs! {
         (0x004 => TYPER: ReadOnly<u32, TYPER::Register>),
         (0x008 => _reserved1),
         (0x104 => ISENABLER: [ReadWrite<u32>; 31]),
-        (0x108 => _reserved2),
+        (0x180 => _reserved2),
         (0x820 => ITARGETSR: [ReadWrite<u32, ITARGETSR::Register>; 248]),
-        (0x824 => @END),
+        (0xC00 => @END),
     }
 }
 
@@ -63,7 +63,7 @@ register_structs! {
         (0x100 => ISENABLER: ReadWrite<u32>),
         (0x104 => _reserved2),
         (0x800 => ITARGETSR: [ReadOnly<u32, ITARGETSR::Register>; 8]),
-        (0x804 => @END),
+        (0x820 => @END),
     }
 }
 
diff --git a/14_virtual_mem_part2_mmio_remap/Cargo.lock b/14_virtual_mem_part2_mmio_remap/Cargo.lock
index 163a65260..a66dec99c 100644
--- a/14_virtual_mem_part2_mmio_remap/Cargo.lock
+++ b/14_virtual_mem_part2_mmio_remap/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.5.0"
+version = "8.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "bdecfbb28672ad3664e71ae05a398a52df430d86d660691501b28968cc4467e6"
+checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
 dependencies = [
  "tock-registers",
 ]
@@ -24,9 +24,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.43"
+version = "1.0.44"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "0a2ca2c61bc9f3d74d2886294ab7b9853abd9c1ad903a3ac7815c58989bb7bab"
+checksum = "7bd7356a8122b6c4a24a82b278680c73357984ca2fc79a0f9fa6dea7dced7c58"
 dependencies = [
  "unicode-ident",
 ]
@@ -48,9 +48,9 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.100"
+version = "1.0.101"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "52205623b1b0f064a4e71182c3b18ae902267282930c6d5462c91b859668426e"
+checksum = "e90cde112c4b9690b8cbe810cba9ddd8bc1d7472e2cae317b69e9438c1cba7d2"
 dependencies = [
  "proc-macro2",
  "quote",
@@ -73,9 +73,9 @@ version = "0.1.0"
 
 [[package]]
 name = "tock-registers"
-version = "0.7.0"
+version = "0.8.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
+checksum = "696941a0aee7e276a165a978b37918fd5d22c55c3d6bda197813070ca9c0f21c"
 
 [[package]]
 name = "unicode-ident"
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/Cargo.toml b/14_virtual_mem_part2_mmio_remap/kernel/Cargo.toml
index f187a4671..fe4e48e70 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/Cargo.toml
+++ b/14_virtual_mem_part2_mmio_remap/kernel/Cargo.toml
@@ -18,12 +18,12 @@ test_build = ["qemu-exit"]
 test-types = { path = "../libraries/test-types" }
 
 # Optional dependencies
-tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
+tock-registers = { version = "0.8.x", default-features = false, features = ["register_types"], optional = true }
 qemu-exit = { version = "3.x.x", optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "7.x.x" }
+cortex-a = { version = "8.x.x" }
 
 ##--------------------------------------------------------------------------------------------------
 ## Testing
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/time.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/time.rs
index ad8ba84dd..1e2efbec0 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/time.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/time.rs
@@ -120,7 +120,7 @@ impl TryFrom<Duration> for GenericTimerCounterValue {
 #[inline(always)]
 fn read_cntpct() -> GenericTimerCounterValue {
     // Prevent that the counter is read ahead of time due to out-of-order execution.
-    unsafe { barrier::isb(barrier::SY) };
+    barrier::isb(barrier::SY);
     let cnt = CNTPCT_EL0.get();
 
     GenericTimerCounterValue(cnt)
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
index d9f63d1bb..a9c97a8e3 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -52,9 +52,9 @@ register_structs! {
         (0x004 => TYPER: ReadOnly<u32, TYPER::Register>),
         (0x008 => _reserved1),
         (0x104 => ISENABLER: [ReadWrite<u32>; 31]),
-        (0x108 => _reserved2),
+        (0x180 => _reserved2),
         (0x820 => ITARGETSR: [ReadWrite<u32, ITARGETSR::Register>; 248]),
-        (0x824 => @END),
+        (0xC00 => @END),
     }
 }
 
@@ -65,7 +65,7 @@ register_structs! {
         (0x100 => ISENABLER: ReadWrite<u32>),
         (0x104 => _reserved2),
         (0x800 => ITARGETSR: [ReadOnly<u32, ITARGETSR::Register>; 8]),
-        (0x804 => @END),
+        (0x820 => @END),
     }
 }
 
diff --git a/15_virtual_mem_part3_precomputed_tables/Cargo.lock b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
index 6cac9dcbf..e0c25535c 100644
--- a/15_virtual_mem_part3_precomputed_tables/Cargo.lock
+++ b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.5.0"
+version = "8.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "bdecfbb28672ad3664e71ae05a398a52df430d86d660691501b28968cc4467e6"
+checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
 dependencies = [
  "tock-registers",
 ]
@@ -24,9 +24,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.43"
+version = "1.0.44"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "0a2ca2c61bc9f3d74d2886294ab7b9853abd9c1ad903a3ac7815c58989bb7bab"
+checksum = "7bd7356a8122b6c4a24a82b278680c73357984ca2fc79a0f9fa6dea7dced7c58"
 dependencies = [
  "unicode-ident",
 ]
@@ -48,9 +48,9 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.100"
+version = "1.0.101"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "52205623b1b0f064a4e71182c3b18ae902267282930c6d5462c91b859668426e"
+checksum = "e90cde112c4b9690b8cbe810cba9ddd8bc1d7472e2cae317b69e9438c1cba7d2"
 dependencies = [
  "proc-macro2",
  "quote",
@@ -73,9 +73,9 @@ version = "0.1.0"
 
 [[package]]
 name = "tock-registers"
-version = "0.7.0"
+version = "0.8.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
+checksum = "696941a0aee7e276a165a978b37918fd5d22c55c3d6bda197813070ca9c0f21c"
 
 [[package]]
 name = "unicode-ident"
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/Cargo.toml b/15_virtual_mem_part3_precomputed_tables/kernel/Cargo.toml
index 4641b0e86..9a0408ade 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/Cargo.toml
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/Cargo.toml
@@ -18,12 +18,12 @@ test_build = ["qemu-exit"]
 test-types = { path = "../libraries/test-types" }
 
 # Optional dependencies
-tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
+tock-registers = { version = "0.8.x", default-features = false, features = ["register_types"], optional = true }
 qemu-exit = { version = "3.x.x", optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "7.x.x" }
+cortex-a = { version = "8.x.x" }
 
 ##--------------------------------------------------------------------------------------------------
 ## Testing
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/time.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/time.rs
index ad8ba84dd..1e2efbec0 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/time.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/time.rs
@@ -120,7 +120,7 @@ impl TryFrom<Duration> for GenericTimerCounterValue {
 #[inline(always)]
 fn read_cntpct() -> GenericTimerCounterValue {
     // Prevent that the counter is read ahead of time due to out-of-order execution.
-    unsafe { barrier::isb(barrier::SY) };
+    barrier::isb(barrier::SY);
     let cnt = CNTPCT_EL0.get();
 
     GenericTimerCounterValue(cnt)
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
index d9f63d1bb..a9c97a8e3 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -52,9 +52,9 @@ register_structs! {
         (0x004 => TYPER: ReadOnly<u32, TYPER::Register>),
         (0x008 => _reserved1),
         (0x104 => ISENABLER: [ReadWrite<u32>; 31]),
-        (0x108 => _reserved2),
+        (0x180 => _reserved2),
         (0x820 => ITARGETSR: [ReadWrite<u32, ITARGETSR::Register>; 248]),
-        (0x824 => @END),
+        (0xC00 => @END),
     }
 }
 
@@ -65,7 +65,7 @@ register_structs! {
         (0x100 => ISENABLER: ReadWrite<u32>),
         (0x104 => _reserved2),
         (0x800 => ITARGETSR: [ReadOnly<u32, ITARGETSR::Register>; 8]),
-        (0x804 => @END),
+        (0x820 => @END),
     }
 }
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
index a529e6738..95941be45 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
+++ b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.5.0"
+version = "8.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "bdecfbb28672ad3664e71ae05a398a52df430d86d660691501b28968cc4467e6"
+checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
 dependencies = [
  "tock-registers",
 ]
@@ -24,9 +24,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.43"
+version = "1.0.44"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "0a2ca2c61bc9f3d74d2886294ab7b9853abd9c1ad903a3ac7815c58989bb7bab"
+checksum = "7bd7356a8122b6c4a24a82b278680c73357984ca2fc79a0f9fa6dea7dced7c58"
 dependencies = [
  "unicode-ident",
 ]
@@ -48,9 +48,9 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.100"
+version = "1.0.101"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "52205623b1b0f064a4e71182c3b18ae902267282930c6d5462c91b859668426e"
+checksum = "e90cde112c4b9690b8cbe810cba9ddd8bc1d7472e2cae317b69e9438c1cba7d2"
 dependencies = [
  "proc-macro2",
  "quote",
@@ -73,9 +73,9 @@ version = "0.1.0"
 
 [[package]]
 name = "tock-registers"
-version = "0.7.0"
+version = "0.8.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
+checksum = "696941a0aee7e276a165a978b37918fd5d22c55c3d6bda197813070ca9c0f21c"
 
 [[package]]
 name = "unicode-ident"
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/Cargo.toml b/16_virtual_mem_part4_higher_half_kernel/kernel/Cargo.toml
index 28f87a506..06b2573c8 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/Cargo.toml
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/Cargo.toml
@@ -18,12 +18,12 @@ test_build = ["qemu-exit"]
 test-types = { path = "../libraries/test-types" }
 
 # Optional dependencies
-tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
+tock-registers = { version = "0.8.x", default-features = false, features = ["register_types"], optional = true }
 qemu-exit = { version = "3.x.x", optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "7.x.x" }
+cortex-a = { version = "8.x.x" }
 
 ##--------------------------------------------------------------------------------------------------
 ## Testing
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/time.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/time.rs
index ad8ba84dd..1e2efbec0 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/time.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/time.rs
@@ -120,7 +120,7 @@ impl TryFrom<Duration> for GenericTimerCounterValue {
 #[inline(always)]
 fn read_cntpct() -> GenericTimerCounterValue {
     // Prevent that the counter is read ahead of time due to out-of-order execution.
-    unsafe { barrier::isb(barrier::SY) };
+    barrier::isb(barrier::SY);
     let cnt = CNTPCT_EL0.get();
 
     GenericTimerCounterValue(cnt)
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
index d9f63d1bb..a9c97a8e3 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -52,9 +52,9 @@ register_structs! {
         (0x004 => TYPER: ReadOnly<u32, TYPER::Register>),
         (0x008 => _reserved1),
         (0x104 => ISENABLER: [ReadWrite<u32>; 31]),
-        (0x108 => _reserved2),
+        (0x180 => _reserved2),
         (0x820 => ITARGETSR: [ReadWrite<u32, ITARGETSR::Register>; 248]),
-        (0x824 => @END),
+        (0xC00 => @END),
     }
 }
 
@@ -65,7 +65,7 @@ register_structs! {
         (0x100 => ISENABLER: ReadWrite<u32>),
         (0x104 => _reserved2),
         (0x800 => ITARGETSR: [ReadOnly<u32, ITARGETSR::Register>; 8]),
-        (0x804 => @END),
+        (0x820 => @END),
     }
 }
 
diff --git a/17_kernel_symbols/Cargo.lock b/17_kernel_symbols/Cargo.lock
index d52e3863c..8c84705d7 100644
--- a/17_kernel_symbols/Cargo.lock
+++ b/17_kernel_symbols/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.5.0"
+version = "8.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "bdecfbb28672ad3664e71ae05a398a52df430d86d660691501b28968cc4467e6"
+checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
 dependencies = [
  "tock-registers",
 ]
@@ -36,9 +36,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.43"
+version = "1.0.44"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "0a2ca2c61bc9f3d74d2886294ab7b9853abd9c1ad903a3ac7815c58989bb7bab"
+checksum = "7bd7356a8122b6c4a24a82b278680c73357984ca2fc79a0f9fa6dea7dced7c58"
 dependencies = [
  "unicode-ident",
 ]
@@ -60,9 +60,9 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.100"
+version = "1.0.101"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "52205623b1b0f064a4e71182c3b18ae902267282930c6d5462c91b859668426e"
+checksum = "e90cde112c4b9690b8cbe810cba9ddd8bc1d7472e2cae317b69e9438c1cba7d2"
 dependencies = [
  "proc-macro2",
  "quote",
@@ -85,9 +85,9 @@ version = "0.1.0"
 
 [[package]]
 name = "tock-registers"
-version = "0.7.0"
+version = "0.8.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
+checksum = "696941a0aee7e276a165a978b37918fd5d22c55c3d6bda197813070ca9c0f21c"
 
 [[package]]
 name = "unicode-ident"
diff --git a/17_kernel_symbols/README.md b/17_kernel_symbols/README.md
index e88795ab1..87264162a 100644
--- a/17_kernel_symbols/README.md
+++ b/17_kernel_symbols/README.md
@@ -261,7 +261,7 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel/Cargo.toml 17_kernel_sy
 +debug-symbol-types = { path = "../libraries/debug-symbol-types" }
 
  # Optional dependencies
- tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
+ tock-registers = { version = "0.8.x", default-features = false, features = ["register_types"], optional = true }
 
 diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception.rs 17_kernel_symbols/kernel/src/_arch/aarch64/exception.rs
 --- 16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception.rs
diff --git a/17_kernel_symbols/kernel/Cargo.toml b/17_kernel_symbols/kernel/Cargo.toml
index c040d60c5..a2a83aade 100644
--- a/17_kernel_symbols/kernel/Cargo.toml
+++ b/17_kernel_symbols/kernel/Cargo.toml
@@ -19,12 +19,12 @@ test-types = { path = "../libraries/test-types" }
 debug-symbol-types = { path = "../libraries/debug-symbol-types" }
 
 # Optional dependencies
-tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
+tock-registers = { version = "0.8.x", default-features = false, features = ["register_types"], optional = true }
 qemu-exit = { version = "3.x.x", optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "7.x.x" }
+cortex-a = { version = "8.x.x" }
 
 ##--------------------------------------------------------------------------------------------------
 ## Testing
diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/time.rs b/17_kernel_symbols/kernel/src/_arch/aarch64/time.rs
index ad8ba84dd..1e2efbec0 100644
--- a/17_kernel_symbols/kernel/src/_arch/aarch64/time.rs
+++ b/17_kernel_symbols/kernel/src/_arch/aarch64/time.rs
@@ -120,7 +120,7 @@ impl TryFrom<Duration> for GenericTimerCounterValue {
 #[inline(always)]
 fn read_cntpct() -> GenericTimerCounterValue {
     // Prevent that the counter is read ahead of time due to out-of-order execution.
-    unsafe { barrier::isb(barrier::SY) };
+    barrier::isb(barrier::SY);
     let cnt = CNTPCT_EL0.get();
 
     GenericTimerCounterValue(cnt)
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
index d9f63d1bb..a9c97a8e3 100644
--- a/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -52,9 +52,9 @@ register_structs! {
         (0x004 => TYPER: ReadOnly<u32, TYPER::Register>),
         (0x008 => _reserved1),
         (0x104 => ISENABLER: [ReadWrite<u32>; 31]),
-        (0x108 => _reserved2),
+        (0x180 => _reserved2),
         (0x820 => ITARGETSR: [ReadWrite<u32, ITARGETSR::Register>; 248]),
-        (0x824 => @END),
+        (0xC00 => @END),
     }
 }
 
@@ -65,7 +65,7 @@ register_structs! {
         (0x100 => ISENABLER: ReadWrite<u32>),
         (0x104 => _reserved2),
         (0x800 => ITARGETSR: [ReadOnly<u32, ITARGETSR::Register>; 8]),
-        (0x804 => @END),
+        (0x820 => @END),
     }
 }
 
diff --git a/18_backtrace/Cargo.lock b/18_backtrace/Cargo.lock
index 82df825ab..f662e8a6a 100644
--- a/18_backtrace/Cargo.lock
+++ b/18_backtrace/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.5.0"
+version = "8.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "bdecfbb28672ad3664e71ae05a398a52df430d86d660691501b28968cc4467e6"
+checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
 dependencies = [
  "tock-registers",
 ]
@@ -36,9 +36,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.43"
+version = "1.0.44"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "0a2ca2c61bc9f3d74d2886294ab7b9853abd9c1ad903a3ac7815c58989bb7bab"
+checksum = "7bd7356a8122b6c4a24a82b278680c73357984ca2fc79a0f9fa6dea7dced7c58"
 dependencies = [
  "unicode-ident",
 ]
@@ -60,9 +60,9 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.100"
+version = "1.0.101"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "52205623b1b0f064a4e71182c3b18ae902267282930c6d5462c91b859668426e"
+checksum = "e90cde112c4b9690b8cbe810cba9ddd8bc1d7472e2cae317b69e9438c1cba7d2"
 dependencies = [
  "proc-macro2",
  "quote",
@@ -85,9 +85,9 @@ version = "0.1.0"
 
 [[package]]
 name = "tock-registers"
-version = "0.7.0"
+version = "0.8.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
+checksum = "696941a0aee7e276a165a978b37918fd5d22c55c3d6bda197813070ca9c0f21c"
 
 [[package]]
 name = "unicode-ident"
diff --git a/18_backtrace/kernel/Cargo.toml b/18_backtrace/kernel/Cargo.toml
index 9e5f55be4..5a4435382 100644
--- a/18_backtrace/kernel/Cargo.toml
+++ b/18_backtrace/kernel/Cargo.toml
@@ -19,12 +19,12 @@ test-types = { path = "../libraries/test-types" }
 debug-symbol-types = { path = "../libraries/debug-symbol-types" }
 
 # Optional dependencies
-tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
+tock-registers = { version = "0.8.x", default-features = false, features = ["register_types"], optional = true }
 qemu-exit = { version = "3.x.x", optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "7.x.x" }
+cortex-a = { version = "8.x.x" }
 
 ##--------------------------------------------------------------------------------------------------
 ## Testing
diff --git a/18_backtrace/kernel/src/_arch/aarch64/time.rs b/18_backtrace/kernel/src/_arch/aarch64/time.rs
index ad8ba84dd..1e2efbec0 100644
--- a/18_backtrace/kernel/src/_arch/aarch64/time.rs
+++ b/18_backtrace/kernel/src/_arch/aarch64/time.rs
@@ -120,7 +120,7 @@ impl TryFrom<Duration> for GenericTimerCounterValue {
 #[inline(always)]
 fn read_cntpct() -> GenericTimerCounterValue {
     // Prevent that the counter is read ahead of time due to out-of-order execution.
-    unsafe { barrier::isb(barrier::SY) };
+    barrier::isb(barrier::SY);
     let cnt = CNTPCT_EL0.get();
 
     GenericTimerCounterValue(cnt)
diff --git a/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs b/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
index d9f63d1bb..a9c97a8e3 100644
--- a/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
+++ b/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -52,9 +52,9 @@ register_structs! {
         (0x004 => TYPER: ReadOnly<u32, TYPER::Register>),
         (0x008 => _reserved1),
         (0x104 => ISENABLER: [ReadWrite<u32>; 31]),
-        (0x108 => _reserved2),
+        (0x180 => _reserved2),
         (0x820 => ITARGETSR: [ReadWrite<u32, ITARGETSR::Register>; 248]),
-        (0x824 => @END),
+        (0xC00 => @END),
     }
 }
 
@@ -65,7 +65,7 @@ register_structs! {
         (0x100 => ISENABLER: ReadWrite<u32>),
         (0x104 => _reserved2),
         (0x800 => ITARGETSR: [ReadOnly<u32, ITARGETSR::Register>; 8]),
-        (0x804 => @END),
+        (0x820 => @END),
     }
 }
 
diff --git a/19_kernel_heap/Cargo.lock b/19_kernel_heap/Cargo.lock
index cc7a9c208..f8d4b6f80 100644
--- a/19_kernel_heap/Cargo.lock
+++ b/19_kernel_heap/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.5.0"
+version = "8.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "bdecfbb28672ad3664e71ae05a398a52df430d86d660691501b28968cc4467e6"
+checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
 dependencies = [
  "tock-registers",
 ]
@@ -43,9 +43,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.43"
+version = "1.0.44"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "0a2ca2c61bc9f3d74d2886294ab7b9853abd9c1ad903a3ac7815c58989bb7bab"
+checksum = "7bd7356a8122b6c4a24a82b278680c73357984ca2fc79a0f9fa6dea7dced7c58"
 dependencies = [
  "unicode-ident",
 ]
@@ -67,9 +67,9 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.100"
+version = "1.0.101"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "52205623b1b0f064a4e71182c3b18ae902267282930c6d5462c91b859668426e"
+checksum = "e90cde112c4b9690b8cbe810cba9ddd8bc1d7472e2cae317b69e9438c1cba7d2"
 dependencies = [
  "proc-macro2",
  "quote",
@@ -92,9 +92,9 @@ version = "0.1.0"
 
 [[package]]
 name = "tock-registers"
-version = "0.7.0"
+version = "0.8.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
+checksum = "696941a0aee7e276a165a978b37918fd5d22c55c3d6bda197813070ca9c0f21c"
 
 [[package]]
 name = "unicode-ident"
diff --git a/19_kernel_heap/README.md b/19_kernel_heap/README.md
index b1463fc50..4eafd3448 100644
--- a/19_kernel_heap/README.md
+++ b/19_kernel_heap/README.md
@@ -283,7 +283,7 @@ diff -uNr 18_backtrace/kernel/Cargo.toml 19_kernel_heap/kernel/Cargo.toml
 +linked_list_allocator = { version = "0.10.x", default-features = false, features = ["const_mut_refs"] }
 
  # Optional dependencies
- tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
+ tock-registers = { version = "0.8.x", default-features = false, features = ["register_types"], optional = true }
 
 diff -uNr 18_backtrace/kernel/src/bsp/device_driver/arm/gicv2.rs 19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2.rs
 --- 18_backtrace/kernel/src/bsp/device_driver/arm/gicv2.rs
diff --git a/19_kernel_heap/kernel/Cargo.toml b/19_kernel_heap/kernel/Cargo.toml
index 61a161581..bccd08823 100644
--- a/19_kernel_heap/kernel/Cargo.toml
+++ b/19_kernel_heap/kernel/Cargo.toml
@@ -21,12 +21,12 @@ debug-symbol-types = { path = "../libraries/debug-symbol-types" }
 linked_list_allocator = { version = "0.10.x", default-features = false, features = ["const_mut_refs"] }
 
 # Optional dependencies
-tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
+tock-registers = { version = "0.8.x", default-features = false, features = ["register_types"], optional = true }
 qemu-exit = { version = "3.x.x", optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "7.x.x" }
+cortex-a = { version = "8.x.x" }
 
 ##--------------------------------------------------------------------------------------------------
 ## Testing
diff --git a/19_kernel_heap/kernel/src/_arch/aarch64/time.rs b/19_kernel_heap/kernel/src/_arch/aarch64/time.rs
index ad8ba84dd..1e2efbec0 100644
--- a/19_kernel_heap/kernel/src/_arch/aarch64/time.rs
+++ b/19_kernel_heap/kernel/src/_arch/aarch64/time.rs
@@ -120,7 +120,7 @@ impl TryFrom<Duration> for GenericTimerCounterValue {
 #[inline(always)]
 fn read_cntpct() -> GenericTimerCounterValue {
     // Prevent that the counter is read ahead of time due to out-of-order execution.
-    unsafe { barrier::isb(barrier::SY) };
+    barrier::isb(barrier::SY);
     let cnt = CNTPCT_EL0.get();
 
     GenericTimerCounterValue(cnt)
diff --git a/19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs b/19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
index d9f63d1bb..a9c97a8e3 100644
--- a/19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
+++ b/19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -52,9 +52,9 @@ register_structs! {
         (0x004 => TYPER: ReadOnly<u32, TYPER::Register>),
         (0x008 => _reserved1),
         (0x104 => ISENABLER: [ReadWrite<u32>; 31]),
-        (0x108 => _reserved2),
+        (0x180 => _reserved2),
         (0x820 => ITARGETSR: [ReadWrite<u32, ITARGETSR::Register>; 248]),
-        (0x824 => @END),
+        (0xC00 => @END),
     }
 }
 
@@ -65,7 +65,7 @@ register_structs! {
         (0x100 => ISENABLER: ReadWrite<u32>),
         (0x104 => _reserved2),
         (0x800 => ITARGETSR: [ReadOnly<u32, ITARGETSR::Register>; 8]),
-        (0x804 => @END),
+        (0x820 => @END),
     }
 }
 
diff --git a/X1_JTAG_boot/Cargo.lock b/X1_JTAG_boot/Cargo.lock
index 6e628b862..bcfb442af 100644
--- a/X1_JTAG_boot/Cargo.lock
+++ b/X1_JTAG_boot/Cargo.lock
@@ -4,9 +4,9 @@ version = 3
 
 [[package]]
 name = "cortex-a"
-version = "7.5.0"
+version = "8.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "bdecfbb28672ad3664e71ae05a398a52df430d86d660691501b28968cc4467e6"
+checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
 dependencies = [
  "tock-registers",
 ]
@@ -21,6 +21,6 @@ dependencies = [
 
 [[package]]
 name = "tock-registers"
-version = "0.7.0"
+version = "0.8.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
+checksum = "696941a0aee7e276a165a978b37918fd5d22c55c3d6bda197813070ca9c0f21c"
diff --git a/X1_JTAG_boot/Cargo.toml b/X1_JTAG_boot/Cargo.toml
index 638d4de1e..55963c384 100644
--- a/X1_JTAG_boot/Cargo.toml
+++ b/X1_JTAG_boot/Cargo.toml
@@ -23,8 +23,8 @@ path = "src/main.rs"
 [dependencies]
 
 # Optional dependencies
-tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
+tock-registers = { version = "0.8.x", default-features = false, features = ["register_types"], optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "7.x.x" }
+cortex-a = { version = "8.x.x" }
diff --git a/X1_JTAG_boot/jtag_boot_rpi3.img b/X1_JTAG_boot/jtag_boot_rpi3.img
index 844015333d4c9c99ddbb059320b89f37229f2328..8c67b2dd87ca95ac69ab1567d94595d9cb5bc53f 100755
GIT binary patch
delta 322
zcmccMe8PExE7NU;jqXB190yq@$}2Em<(ix*B+uA5xlw49$b|d$%vZG@SYPFIm>J|*
zyu2vmp!Z~Z;b=zh$+Lx%#02#xzSU+}2~(8C%&;XJs6bf69;hH#q>b_5<Xa+Jc_wfJ
zb$bJKYaaC8JX=(Z5h%V%Y_;G4wuwBy|4(ONWY`L__(9<0JaH*L4<7~rW(Eck4hDt|
z9F3Ewi8u00-~t-p1u<Z<vcxQ){(Tbly4M_ja<V$?^b{2_=455qnE~X>Pi5Fy{O|vC
z5Sx=>MiA#rhMoCf{^l&nU?z432B2*W43qat+b}+x%qSx-_);2Z5fJczNd|_mn+;|9
hStg%Q2$0;M2$4FV0HIev`7b6LDyB0wOrEJ|4gj%_YEA$E

delta 327
zcmX@%e8G8wD-$#0Mt310j)yE0<rSE(dQDCgl4m?Pxlw49$cFp&%vZG@SYPFIm>J|*
zyu2vmpu=Q);b=yO$+Lx%#J=iHe5=i{5~e7NnPE#dP=T<BJy1cgNE_qB$+twd@@(J+
z>h=ce);#F2dA6t+BT#&k*lNKCY!i8Y|DVpl$gmY;u|m+~JaH+$4j%>qW(Eck4hDt|
z91AB;6K~|%zy&nG3u3@zWr<lp{re>9b#FQR<YaZ&=_x8=%*o2IGXuz%pUSYa_}~BO
zAT}q%j3CaL3_J6|{LNXC!Az5nNZSC-1%vyO8D-=JA4x;_JW$bhn+;|9Sy&lC+{t?t
df+cq-LKK`(fY2MD{11~g71J3zCQno}2LOLTYfu0H

diff --git a/X1_JTAG_boot/jtag_boot_rpi4.img b/X1_JTAG_boot/jtag_boot_rpi4.img
index 90e8668b1951ee773dc86acaba14c1afe08781fc..ed65f3f65911298318a02ea8aba2f22efb575d83 100755
GIT binary patch
delta 913
zcmah{T}V@57=FKVJaUehoXzdb(&^@+vpHtD!W>#|NoZXZ?WUk&jxKaXP*7A9&JjdE
zH#>bo<V`aZJG+Zh!Y%}(8?`PBT9>ti;LMv6AsW(7-}wo>>%IAS-k;}v-iL3oZ=o;S
zR2N+bzRg1yGwV`&J4#ANgUIvh>IULM3{2<+uX34kA*wWk@6nf-OjruU@Gm+}9eb`+
z`7pwFm<Y-!bIdY}_9&T#+Z2+OKm0l5pX!$M`Q@{~mwg4ftZ6@08l-?NB9($jUK;?T
z9>W>Ci(2Z$llB2LjKA2$5V{pf0USt>X-(5y8#LqtFdpYnB=WVNF8WKoMV5xw96&bE
zg~N>xksr@D4xw6H>+ty*;Oj``_*9Ri&eqDhhS4DKYiX#I35zP$8@VBT%HcvWoN@%y
zqcPz14eBg1YHC05nnua0MjO~W0DS2JNXwhr6AySk!M0eXQJ$@d$|ai3-y~`QqLoBd
zf6dTn>SMJRDg<RA*CV|k9Dv}Bt}8bL{51f);czyvWCso4U`ZdF#DY__ZECzK*2ubR
zdUt*wKH+TTyj?^LF>eB2ckV`Ac+xp?=!(Xd?}AkJfvhTKcdDpu`5>BiEry5>2ceQO
zd@yf&*@+Je!j5nCgmoH8tM5SKa8hVI@}p`VtFLCsPQxJ49J;@k7?dW`(u`ry+c23X
zlY?6ZWx<c<gf^dTu+qUq3y*5X;}@Nd{T&PxSd!x)ALqV9VS!G3Ry?jV$d+p%r*Dff
z<w28(l8en|ns{TxdkZ5ApWkWLLl%B);eTY47AC*Nh-nK`7M@XTyKW%cs6{JS=`sAY
zxeeuTq4}iue-b|6K+7}IyVP<TtzfS^5m*t-^(E`|x0<-eZN4504`bOqLj87Qdu#V!
DWt{v!

delta 916
zcmah{T}V@57=FKVJaW#cai%-l{F_sQZ4Q|&F%KHeELwFT?WPDxMue^?@+zW0M<D&&
z?C=$V1Tll$RzY$qSRhQg5wD8Wx~d@rXI@o8F~WU)=STFe_vYhy-k;}vUcTbM(m>i{
zEB*wr)yJ-)UrKvB$|%P|$TL5&iG(l*5A;Mry~4N=<9mju*~?req68E8HydZ}&Z<>0
zg77U)Mj7=jx6Gq}nzG+yP+8p)M^Ip~SJC@zBOsPL3b`^NKQtDUphH$lA(Yz~0wbTo
zsX8|!gz-$>5SqeY>-=4VH{>Kh&nWFCgt#|Z$OmC6E)2@@x5Mmepwz$0v+!B~NC#yc
zslSKD@j`tJd2p?>Bj5tjMl&ZD`xI@iHmC294S~2Z36(OPqWSk2+#P({=|(A>bcW7l
z2SL;ov^iwt0#OhNVR9N_4V)MPv2+2H<-g>S4}2@ID+tSctoB2NQfVmmDKBUZAb6we
zmQG;1)M$?#1(5}C^0b6c;a<t_u!E@iYjXNQ^umq(_^RX;5)rCH@A4Qwl=dMRzmvue
zO%Sns8<cVf<TTZ+POgz1i+*!uK1?khgi6w|Xs)e=@p+ePZyOaWJw?j;dr%xW<*GmO
zr)v7prDIgn@a{L8mb$6;NxIr3XLv_Fw3~Jg?|4r`46nIbPf5osom{kVzh)|aNpc?O
z<e<P)PJnz|_zs04JG!=WsA%Q$7IAOmbr$9MnrN=X@_DUF+^WZY7CExb^hCR2T1|QU
zDDk1mr0ETf_+(*Z;foDszRSWh7Tz8<Yhn6fjCgKg#=<XEq47F$T(icyEP5I%O|2-4
z=bMJx{<p#kZfkx*YZsf(pf9+gWi<H8Wy%+=x7%ytXp8v<EIf`gEn^ILvCZ5258x^L
AO#lD@

diff --git a/X1_JTAG_boot/src/_arch/aarch64/time.rs b/X1_JTAG_boot/src/_arch/aarch64/time.rs
index 54db51c31..92e778e72 100644
--- a/X1_JTAG_boot/src/_arch/aarch64/time.rs
+++ b/X1_JTAG_boot/src/_arch/aarch64/time.rs
@@ -121,7 +121,7 @@ impl TryFrom<Duration> for GenericTimerCounterValue {
 #[inline(always)]
 fn read_cntpct() -> GenericTimerCounterValue {
     // Prevent that the counter is read ahead of time due to out-of-order execution.
-    unsafe { barrier::isb(barrier::SY) };
+    barrier::isb(barrier::SY);
     let cnt = CNTPCT_EL0.get();
 
     GenericTimerCounterValue(cnt)

From 2e72a8408f65f86fc4234d2bf0d76c0ae2cdb78d Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sun, 23 Oct 2022 17:34:28 +0200
Subject: [PATCH 191/214] Rework driver subsystem

This update significantly decouples the generic kernel code
from the BSP code.
Prior to this patch, the BSP had way too much business logic
that should have always been the generic kernel's concern.
---
 05_drivers_gpio_uart/README.md                | 442 ++++++--
 05_drivers_gpio_uart/src/bsp/raspberrypi.rs   |   1 -
 .../src/bsp/raspberrypi/driver.rs             |  76 +-
 05_drivers_gpio_uart/src/console.rs           |  21 +-
 .../src/console/null_console.rs               |  41 +
 05_drivers_gpio_uart/src/driver.rs            | 149 ++-
 05_drivers_gpio_uart/src/main.rs              |  22 +-
 06_uart_chainloader/README.md                 |  87 +-
 06_uart_chainloader/src/bsp/raspberrypi.rs    |   1 -
 .../src/bsp/raspberrypi/console.rs            |  16 -
 .../src/bsp/raspberrypi/driver.rs             |  76 +-
 06_uart_chainloader/src/console.rs            |  21 +-
 .../src/console/null_console.rs               |  41 +
 06_uart_chainloader/src/driver.rs             | 136 ++-
 06_uart_chainloader/src/main.rs               |  13 +-
 07_timestamps/README.md                       | 108 +-
 07_timestamps/src/bsp/raspberrypi.rs          |   1 -
 07_timestamps/src/bsp/raspberrypi/console.rs  |  16 -
 07_timestamps/src/bsp/raspberrypi/driver.rs   |  87 +-
 07_timestamps/src/console.rs                  |  21 +-
 07_timestamps/src/console/null_console.rs     |  41 +
 07_timestamps/src/driver.rs                   | 149 ++-
 07_timestamps/src/main.rs                     |  22 +-
 08_hw_debug_JTAG/README.md                    |  22 +
 08_hw_debug_JTAG/src/bsp/raspberrypi.rs       |   1 -
 .../src/bsp/raspberrypi/console.rs            |  16 -
 .../src/bsp/raspberrypi/driver.rs             |  76 +-
 08_hw_debug_JTAG/src/console.rs               |  21 +-
 08_hw_debug_JTAG/src/console/null_console.rs  |  41 +
 08_hw_debug_JTAG/src/driver.rs                | 149 ++-
 08_hw_debug_JTAG/src/main.rs                  |  22 +-
 09_privilege_level/README.md                  |  12 +-
 09_privilege_level/src/bsp/raspberrypi.rs     |   1 -
 .../src/bsp/raspberrypi/console.rs            |  16 -
 .../src/bsp/raspberrypi/driver.rs             |  76 +-
 09_privilege_level/src/console.rs             |  21 +-
 .../src/console/null_console.rs               |  41 +
 09_privilege_level/src/driver.rs              | 149 ++-
 09_privilege_level/src/main.rs                |  22 +-
 .../README.md                                 |  19 +-
 .../src/bsp/raspberrypi.rs                    |   1 -
 .../src/bsp/raspberrypi/console.rs            |  16 -
 .../src/bsp/raspberrypi/driver.rs             |  76 +-
 .../src/console.rs                            |  21 +-
 .../src/console/null_console.rs               |  41 +
 .../src/driver.rs                             | 149 ++-
 .../src/main.rs                               |  21 +-
 11_exceptions_part1_groundwork/README.md      |   8 +-
 .../src/bsp/raspberrypi.rs                    |   1 -
 .../src/bsp/raspberrypi/console.rs            |  16 -
 .../src/bsp/raspberrypi/driver.rs             |  76 +-
 11_exceptions_part1_groundwork/src/console.rs |  21 +-
 .../src/console/null_console.rs               |  41 +
 11_exceptions_part1_groundwork/src/driver.rs  | 149 ++-
 11_exceptions_part1_groundwork/src/main.rs    |  21 +-
 12_integrated_testing/Makefile                |   2 +-
 12_integrated_testing/README.md               |  34 +-
 .../kernel/src/bsp/raspberrypi.rs             |   1 -
 .../kernel/src/bsp/raspberrypi/console.rs     |  16 -
 .../kernel/src/bsp/raspberrypi/driver.rs      |  84 +-
 12_integrated_testing/kernel/src/console.rs   |  21 +-
 .../kernel/src/console/null_console.rs        |  41 +
 12_integrated_testing/kernel/src/driver.rs    | 152 ++-
 12_integrated_testing/kernel/src/lib.rs       |   4 +-
 12_integrated_testing/kernel/src/main.rs      |  21 +-
 .../kernel/tests/00_console_sanity.rs         |   5 +-
 .../kernel/tests/01_timer_sanity.rs           |   6 +-
 .../tests/02_exception_sync_page_fault.rs     |   5 +-
 .../tests/03_exception_restore_sanity.rs      |   5 +-
 13_exceptions_part2_peripheral_IRQs/Makefile  |   2 +-
 13_exceptions_part2_peripheral_IRQs/README.md | 916 ++++++++++++-----
 .../kernel/src/bsp/device_driver/arm/gicv2.rs |  28 +-
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |   2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |   6 +-
 .../bcm/bcm2xxx_interrupt_controller.rs       |  41 +-
 .../peripheral_ic.rs                          |  18 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  32 +-
 .../kernel/src/bsp/device_driver/common.rs    |  28 +-
 .../kernel/src/bsp/raspberrypi.rs             |   1 -
 .../kernel/src/bsp/raspberrypi/console.rs     |  16 -
 .../kernel/src/bsp/raspberrypi/driver.rs      | 127 ++-
 .../bsp/raspberrypi/exception/asynchronous.rs |  16 +-
 .../kernel/src/bsp/raspberrypi/memory.rs      |  10 +-
 .../kernel/src/console.rs                     |  21 +-
 .../kernel/src/console/null_console.rs        |  41 +
 .../kernel/src/driver.rs                      | 204 +++-
 .../kernel/src/exception/asynchronous.rs      | 109 +-
 .../asynchronous/null_irq_manager.rs          |  42 +
 .../kernel/src/lib.rs                         |   4 +-
 .../kernel/src/main.rs                        |  35 +-
 .../kernel/tests/00_console_sanity.rs         |   5 +-
 .../kernel/tests/01_timer_sanity.rs           |   6 +-
 .../tests/02_exception_sync_page_fault.rs     |   5 +-
 .../tests/03_exception_restore_sanity.rs      |   5 +-
 .../kernel/tests/04_exception_irq_sanity.rs   |   5 +-
 14_virtual_mem_part2_mmio_remap/Makefile      |   2 +-
 14_virtual_mem_part2_mmio_remap/README.md     | 968 +++++-------------
 .../kernel/src/bsp/device_driver/arm/gicv2.rs |  32 +-
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |   2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  13 +-
 .../bcm/bcm2xxx_interrupt_controller.rs       |  52 +-
 .../peripheral_ic.rs                          |  18 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  34 +-
 .../kernel/src/bsp/device_driver/common.rs    |  28 +-
 .../kernel/src/bsp/raspberrypi/driver.rs      | 258 +++--
 .../bsp/raspberrypi/exception/asynchronous.rs |   3 +
 .../kernel/src/driver.rs                      | 204 +++-
 .../kernel/src/exception/asynchronous.rs      |  91 +-
 .../asynchronous/null_irq_manager.rs          |  10 +-
 .../kernel/src/lib.rs                         |   4 +-
 .../kernel/src/main.rs                        |  33 +-
 .../kernel/tests/00_console_sanity.rs         |   5 +-
 .../kernel/tests/01_timer_sanity.rs           |   6 +-
 .../tests/02_exception_sync_page_fault.rs     |   6 +-
 .../tests/03_exception_restore_sanity.rs      |   6 +-
 .../kernel/tests/04_exception_irq_sanity.rs   |   6 +-
 .../Makefile                                  |   2 +-
 .../README.md                                 |  64 +-
 .../kernel/src/bsp/device_driver/arm/gicv2.rs |  32 +-
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |   2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  13 +-
 .../bcm/bcm2xxx_interrupt_controller.rs       |  52 +-
 .../peripheral_ic.rs                          |  18 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  34 +-
 .../kernel/src/bsp/device_driver/common.rs    |  28 +-
 .../kernel/src/bsp/raspberrypi/driver.rs      | 258 +++--
 .../bsp/raspberrypi/exception/asynchronous.rs |   3 +
 .../kernel/src/driver.rs                      | 204 +++-
 .../kernel/src/exception/asynchronous.rs      |  91 +-
 .../asynchronous/null_irq_manager.rs          |  10 +-
 .../kernel/src/lib.rs                         |   4 +-
 .../kernel/src/main.rs                        |  33 +-
 .../kernel/tests/00_console_sanity.rs         |   5 +-
 .../kernel/tests/01_timer_sanity.rs           |   6 +-
 .../tests/02_exception_sync_page_fault.rs     |   6 +-
 .../tests/03_exception_restore_sanity.rs      |   6 +-
 .../kernel/tests/04_exception_irq_sanity.rs   |   6 +-
 .../Makefile                                  |   2 +-
 .../README.md                                 |   2 +-
 .../kernel/src/bsp/device_driver/arm/gicv2.rs |  32 +-
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |   2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  13 +-
 .../bcm/bcm2xxx_interrupt_controller.rs       |  52 +-
 .../peripheral_ic.rs                          |  18 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  34 +-
 .../kernel/src/bsp/device_driver/common.rs    |  28 +-
 .../kernel/src/bsp/raspberrypi/driver.rs      | 258 +++--
 .../bsp/raspberrypi/exception/asynchronous.rs |   3 +
 .../kernel/src/driver.rs                      | 204 +++-
 .../kernel/src/exception/asynchronous.rs      |  91 +-
 .../asynchronous/null_irq_manager.rs          |  10 +-
 .../kernel/src/lib.rs                         |   4 +-
 .../kernel/src/main.rs                        |  33 +-
 .../kernel/tests/00_console_sanity.rs         |   5 +-
 .../kernel/tests/01_timer_sanity.rs           |   6 +-
 .../tests/02_exception_sync_page_fault.rs     |   6 +-
 .../tests/03_exception_restore_sanity.rs      |   6 +-
 .../kernel/tests/04_exception_irq_sanity.rs   |   6 +-
 17_kernel_symbols/Makefile                    |   2 +-
 .../kernel/src/bsp/device_driver/arm/gicv2.rs |  32 +-
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |   2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  13 +-
 .../bcm/bcm2xxx_interrupt_controller.rs       |  52 +-
 .../peripheral_ic.rs                          |  18 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  34 +-
 .../kernel/src/bsp/device_driver/common.rs    |  28 +-
 .../kernel/src/bsp/raspberrypi/driver.rs      | 258 +++--
 .../bsp/raspberrypi/exception/asynchronous.rs |   3 +
 17_kernel_symbols/kernel/src/driver.rs        | 204 +++-
 .../kernel/src/exception/asynchronous.rs      |  91 +-
 .../asynchronous/null_irq_manager.rs          |  10 +-
 17_kernel_symbols/kernel/src/lib.rs           |   4 +-
 17_kernel_symbols/kernel/src/main.rs          |  33 +-
 .../kernel/tests/00_console_sanity.rs         |   5 +-
 .../kernel/tests/01_timer_sanity.rs           |   6 +-
 .../tests/02_exception_sync_page_fault.rs     |   6 +-
 .../tests/03_exception_restore_sanity.rs      |   6 +-
 .../kernel/tests/04_exception_irq_sanity.rs   |   6 +-
 18_backtrace/Makefile                         |   2 +-
 18_backtrace/README.md                        |  37 +-
 .../kernel/src/bsp/device_driver/arm/gicv2.rs |  32 +-
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |   2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  13 +-
 .../bcm/bcm2xxx_interrupt_controller.rs       |  52 +-
 .../peripheral_ic.rs                          |  18 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  34 +-
 .../kernel/src/bsp/device_driver/common.rs    |  28 +-
 .../kernel/src/bsp/raspberrypi/driver.rs      | 258 +++--
 .../bsp/raspberrypi/exception/asynchronous.rs |   3 +
 18_backtrace/kernel/src/driver.rs             | 204 +++-
 .../kernel/src/exception/asynchronous.rs      |  91 +-
 .../asynchronous/null_irq_manager.rs          |  10 +-
 18_backtrace/kernel/src/lib.rs                |   4 +-
 18_backtrace/kernel/src/main.rs               |  33 +-
 18_backtrace/kernel/src/state.rs              |   2 +-
 .../kernel/tests/00_console_sanity.rs         |   5 +-
 18_backtrace/kernel/tests/01_timer_sanity.rs  |   6 +-
 .../tests/02_exception_sync_page_fault.rs     |   6 +-
 .../tests/03_exception_restore_sanity.rs      |   6 +-
 .../kernel/tests/04_exception_irq_sanity.rs   |   6 +-
 .../kernel/tests/05_backtrace_sanity.rs       |   6 +-
 .../tests/06_backtrace_invalid_frame.rs       |   6 +-
 .../kernel/tests/07_backtrace_invalid_link.rs |   6 +-
 19_kernel_heap/Makefile                       |   2 +-
 19_kernel_heap/README.md                      | 363 +++++--
 .../kernel/src/bsp/device_driver/arm/gicv2.rs |  31 +-
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |   2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  13 +-
 .../bcm/bcm2xxx_interrupt_controller.rs       |  48 +-
 .../peripheral_ic.rs                          |  17 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  34 +-
 .../kernel/src/bsp/device_driver/common.rs    |  28 +-
 .../kernel/src/bsp/raspberrypi/driver.rs      | 251 +++--
 .../bsp/raspberrypi/exception/asynchronous.rs |   3 +
 19_kernel_heap/kernel/src/driver.rs           | 161 ++-
 .../kernel/src/exception/asynchronous.rs      |  91 +-
 .../asynchronous/null_irq_manager.rs          |  10 +-
 19_kernel_heap/kernel/src/lib.rs              |   4 +-
 19_kernel_heap/kernel/src/main.rs             |  33 +-
 .../kernel/src/memory/heap_alloc.rs           |  10 +
 .../kernel/tests/00_console_sanity.rs         |   5 +-
 .../kernel/tests/01_timer_sanity.rs           |   6 +-
 .../tests/02_exception_sync_page_fault.rs     |   6 +-
 .../tests/03_exception_restore_sanity.rs      |   6 +-
 .../kernel/tests/04_exception_irq_sanity.rs   |   6 +-
 .../kernel/tests/05_backtrace_sanity.rs       |   6 +-
 .../tests/06_backtrace_invalid_frame.rs       |   6 +-
 .../kernel/tests/07_backtrace_invalid_link.rs |   6 +-
 X1_JTAG_boot/src/bsp/raspberrypi.rs           |   1 -
 X1_JTAG_boot/src/bsp/raspberrypi/console.rs   |  16 -
 X1_JTAG_boot/src/bsp/raspberrypi/driver.rs    |  76 +-
 X1_JTAG_boot/src/console.rs                   |  21 +-
 X1_JTAG_boot/src/console/null_console.rs      |  41 +
 X1_JTAG_boot/src/driver.rs                    | 136 ++-
 X1_JTAG_boot/src/main.rs                      |  13 +-
 rust-toolchain.toml                           |   2 +-
 236 files changed, 7448 insertions(+), 4235 deletions(-)
 create mode 100644 05_drivers_gpio_uart/src/console/null_console.rs
 delete mode 100644 06_uart_chainloader/src/bsp/raspberrypi/console.rs
 create mode 100644 06_uart_chainloader/src/console/null_console.rs
 delete mode 100644 07_timestamps/src/bsp/raspberrypi/console.rs
 create mode 100644 07_timestamps/src/console/null_console.rs
 delete mode 100644 08_hw_debug_JTAG/src/bsp/raspberrypi/console.rs
 create mode 100644 08_hw_debug_JTAG/src/console/null_console.rs
 delete mode 100644 09_privilege_level/src/bsp/raspberrypi/console.rs
 create mode 100644 09_privilege_level/src/console/null_console.rs
 delete mode 100644 10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/console.rs
 create mode 100644 10_virtual_mem_part1_identity_mapping/src/console/null_console.rs
 delete mode 100644 11_exceptions_part1_groundwork/src/bsp/raspberrypi/console.rs
 create mode 100644 11_exceptions_part1_groundwork/src/console/null_console.rs
 delete mode 100644 12_integrated_testing/kernel/src/bsp/raspberrypi/console.rs
 create mode 100644 12_integrated_testing/kernel/src/console/null_console.rs
 delete mode 100644 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/console.rs
 create mode 100644 13_exceptions_part2_peripheral_IRQs/kernel/src/console/null_console.rs
 create mode 100644 13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous/null_irq_manager.rs
 delete mode 100644 X1_JTAG_boot/src/bsp/raspberrypi/console.rs
 create mode 100644 X1_JTAG_boot/src/console/null_console.rs

diff --git a/05_drivers_gpio_uart/README.md b/05_drivers_gpio_uart/README.md
index cbd43e718..3fe5e7b29 100644
--- a/05_drivers_gpio_uart/README.md
+++ b/05_drivers_gpio_uart/README.md
@@ -2,35 +2,81 @@
 
 ## tl;dr
 
-- Now that we enabled safe globals in the previous tutorial, the infrastructure is laid for adding
-  the first real device drivers.
-- We throw out the magic QEMU console and use a real `UART` now. Like serious embedded hackers do!
-
-## Notable additions
-
-- For the first time, we will be able to run the code on the real hardware.
-  - Therefore, building is now differentiated between the **RPi 3** and the **RPi4**.
-  - By default, all `Makefile` targets will build for the **RPi 3**.
-  - In order to build for the the **RPi4**, prepend `BSP=rpi4` to each target. For example:
-    - `BSP=rpi4 make`
-    - `BSP=rpi4 make doc`
-  - Unfortunately, QEMU does not yet support the **RPi4**, so `BSP=rpi4 make qemu` won't work.
-- A `driver::interface::DeviceDriver` trait is added for abstracting `BSP` driver implementations
-  from kernel code.
-- Drivers are stored in `src/bsp/device_driver`, and can be reused between `BSP`s.
-    - We introduce the `GPIO` driver, which pinmuxes (that is, routing signals from inside the `SoC`
-      to actual HW pins) the RPi's PL011 UART.
-      - Note how this driver differentiates between **RPi 3** and **RPi4**. Their HW is different,
-        so we have to account for it in SW.
-    - Most importantly, the `PL011Uart` driver: It implements the `console::interface::*` traits and
-      is from now on used as the main system console output.
-- `BSP`s now contain a memory map in `src/bsp/raspberrypi/memory.rs`. In the specific case, they
-  contain the Raspberry's `MMIO` addresses which are used to instantiate the respective device
-  drivers.
+- Drivers for the real `UART` and the `GPIO` controller are added.
+- **For the first time, we will be able to run the code on the real hardware** (scroll down for
+  instructions).
+
+## Introduction
+
+Now that we enabled safe globals in the previous tutorial, the infrastructure is laid for adding the
+first real device drivers. We throw out the magic QEMU console and introduce a `driver manager`,
+which allows the `BSP` to register device drivers with the `kernel`.
+
+## Driver Manager
+
+The first step consists of adding a `driver subsystem` to the kernel. The corresponding code will
+live in `src/driver.rs`. The subsystem introduces `interface::DeviceDriver`, a common trait that
+every device driver will need to implement and that is known to the kernel. A global
+`DRIVER_MANAGER` instance (of type `DriverManager`) that is instantiated in the same file serves as
+the central entity that can be called to manage all things device drivers in the kernel. For
+example, by using the globally accessible `crate::driver::driver_manager().register_driver(...)`,
+any code can can register an object with static lifetime that implements the
+`interface::DeviceDriver` trait.
+
+During kernel init, a call to `crate::driver::driver_manager().init_drivers(...)` will let the
+driver manager loop over all registered drivers and kick off their initialization, and also execute
+an optional `post-init callback` that can be registered alongside the driver. For example, this
+mechanism is used to switch over to the `UART` driver as the main system console after the `UART`
+driver has been initialized.
+
+## BSP Driver Implementation
+
+In `src/bsp/raspberrypi/driver.rs`, the function `init()` takes care of registering the `UART` and
+`GPIO` drivers. It is therefore important that during kernel init, the correct order of (i) first
+initializing the BSP driver subsystem, and only then (ii) calling the `driver_manager()` is
+followed, like the following excerpt from `main.rs` shows:
+
+```rust
+unsafe fn kernel_init() -> ! {
+    // Initialize the BSP driver subsystem.
+    if let Err(x) = bsp::driver::init() {
+        panic!("Error initializing BSP driver subsystem: {}", x);
+    }
+
+    // Initialize all device drivers.
+    driver::driver_manager().init_drivers();
+    // println! is usable from here on.
+```
+
+
+
+The drivers themselves are stored in `src/bsp/device_driver`, and can be reused between `BSP`s. The
+first driver added in these tutorials is the `PL011Uart` driver: It implements the
+`console::interface::*` traits and is from now on used as the main system console. The second driver
+is the `GPIO` driver, which pinmuxes (that is, routing signals from inside the `SoC` to actual HW
+pins) the RPi's PL011 UART accordingly. Note how the `GPIO` driver differentiates between **RPi3**
+and **RPi4**. Their HW is different, so we have to account for it in SW.
+
+The `BSP`s now also contain a memory map in `src/bsp/raspberrypi/memory.rs`. It provides the
+Raspberry's `MMIO` addresses which are used by the `BSP` to instantiate the respective device
+drivers, so that the driver code knows where to find the device's registers in memory.
 
 ## Boot it from SD card
 
-Some steps for preparing the SD card differ between RPi3 and RPi4, so be careful.
+Since we have real `UART` output now, we can run the code on the real hardware. Building is
+differentiated between the **RPi 3** and the **RPi4** due to before mentioned differences in the
+`GPIO` driver. By default, all `Makefile` targets will build for the **RPi 3**. In order to build
+for the the **RPi4**, prepend `BSP=rpi4` to each target. For example:
+
+```console
+$ BSP=rpi4 make
+$ BSP=rpi4 make doc
+```
+
+Unfortunately, QEMU does not yet support the **RPi4**, so `BSP=rpi4 make qemu` won't work.
+
+**Some steps for preparing the SD card differ between RPi3 and RPi4, so be careful in the
+following.**
 
 ### Common for both
 
@@ -1072,7 +1118,7 @@ diff -uNr 04_safe_globals/src/bsp/raspberrypi/console.rs 05_drivers_gpio_uart/sr
 diff -uNr 04_safe_globals/src/bsp/raspberrypi/driver.rs 05_drivers_gpio_uart/src/bsp/raspberrypi/driver.rs
 --- 04_safe_globals/src/bsp/raspberrypi/driver.rs
 +++ 05_drivers_gpio_uart/src/bsp/raspberrypi/driver.rs
-@@ -0,0 +1,55 @@
+@@ -0,0 +1,71 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
@@ -1080,53 +1126,69 @@ diff -uNr 04_safe_globals/src/bsp/raspberrypi/driver.rs 05_drivers_gpio_uart/src
 +//! BSP driver support.
 +
 +use super::memory::map::mmio;
-+use crate::{bsp::device_driver, driver};
++use crate::{bsp::device_driver, console, driver as generic_driver};
++use core::sync::atomic::{AtomicBool, Ordering};
 +
 +//--------------------------------------------------------------------------------------------------
-+// Private Definitions
++// Global instances
 +//--------------------------------------------------------------------------------------------------
 +
-+/// Device Driver Manager type.
-+struct BSPDriverManager {
-+    device_drivers: [&'static (dyn DeviceDriver + Sync); 2],
-+}
++static PL011_UART: device_driver::PL011Uart =
++    unsafe { device_driver::PL011Uart::new(mmio::PL011_UART_START) };
++static GPIO: device_driver::GPIO = unsafe { device_driver::GPIO::new(mmio::GPIO_START) };
 +
 +//--------------------------------------------------------------------------------------------------
-+// Global instances
++// Private Code
 +//--------------------------------------------------------------------------------------------------
 +
-+pub(super) static PL011_UART: device_driver::PL011Uart =
-+    unsafe { device_driver::PL011Uart::new(mmio::PL011_UART_START) };
++/// This must be called only after successful init of the UART driver.
++fn post_init_uart() -> Result<(), &'static str> {
++    console::register_console(&PL011_UART);
 +
-+static GPIO: device_driver::GPIO = unsafe { device_driver::GPIO::new(mmio::GPIO_START) };
++    Ok(())
++}
 +
-+static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
-+    device_drivers: [&PL011_UART, &GPIO],
-+};
++/// This must be called only after successful init of the GPIO driver.
++fn post_init_gpio() -> Result<(), &'static str> {
++    GPIO.map_pl011_uart();
++    Ok(())
++}
 +
-+//--------------------------------------------------------------------------------------------------
-+// Public Code
-+//--------------------------------------------------------------------------------------------------
++fn driver_uart() -> Result<(), &'static str> {
++    let uart_descriptor =
++        generic_driver::DeviceDriverDescriptor::new(&PL011_UART, Some(post_init_uart));
++    generic_driver::driver_manager().register_driver(uart_descriptor);
 +
-+/// Return a reference to the driver manager.
-+pub fn driver_manager() -> &'static impl driver::interface::DriverManager {
-+    &BSP_DRIVER_MANAGER
++    Ok(())
 +}
 +
-+//------------------------------------------------------------------------------
-+// OS Interface Code
-+//------------------------------------------------------------------------------
-+use driver::interface::DeviceDriver;
++fn driver_gpio() -> Result<(), &'static str> {
++    let gpio_descriptor = generic_driver::DeviceDriverDescriptor::new(&GPIO, Some(post_init_gpio));
++    generic_driver::driver_manager().register_driver(gpio_descriptor);
 +
-+impl driver::interface::DriverManager for BSPDriverManager {
-+    fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
-+        &self.device_drivers[..]
-+    }
++    Ok(())
++}
 +
-+    fn post_device_driver_init(&self) {
-+        // Configure PL011Uart's output pins.
-+        GPIO.map_pl011_uart();
++//--------------------------------------------------------------------------------------------------
++// Public Code
++//--------------------------------------------------------------------------------------------------
++
++/// Initialize the driver subsystem.
++///
++/// # Safety
++///
++/// See child function calls.
++pub unsafe fn init() -> Result<(), &'static str> {
++    static INIT_DONE: AtomicBool = AtomicBool::new(false);
++    if INIT_DONE.load(Ordering::Relaxed) {
++        return Err("Init already done");
 +    }
++
++    driver_uart()?;
++    driver_gpio()?;
++
++    INIT_DONE.store(true, Ordering::Relaxed);
++    Ok(())
 +}
 
 diff -uNr 04_safe_globals/src/bsp/raspberrypi/memory.rs 05_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
@@ -1174,9 +1236,11 @@ diff -uNr 04_safe_globals/src/bsp/raspberrypi/memory.rs 05_drivers_gpio_uart/src
 diff -uNr 04_safe_globals/src/bsp/raspberrypi.rs 05_drivers_gpio_uart/src/bsp/raspberrypi.rs
 --- 04_safe_globals/src/bsp/raspberrypi.rs
 +++ 05_drivers_gpio_uart/src/bsp/raspberrypi.rs
-@@ -6,3 +6,22 @@
+@@ -4,5 +4,23 @@
+
+ //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
- pub mod console;
+-pub mod console;
  pub mod cpu;
 +pub mod driver;
 +pub mod memory;
@@ -1211,10 +1275,67 @@ diff -uNr 04_safe_globals/src/bsp.rs 05_drivers_gpio_uart/src/bsp.rs
  mod raspberrypi;
 
 
+diff -uNr 04_safe_globals/src/console/null_console.rs 05_drivers_gpio_uart/src/console/null_console.rs
+--- 04_safe_globals/src/console/null_console.rs
++++ 05_drivers_gpio_uart/src/console/null_console.rs
+@@ -0,0 +1,41 @@
++// SPDX-License-Identifier: MIT OR Apache-2.0
++//
++// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++
++//! Null console.
++
++use super::interface;
++use core::fmt;
++
++//--------------------------------------------------------------------------------------------------
++// Public Definitions
++//--------------------------------------------------------------------------------------------------
++
++pub struct NullConsole;
++
++//--------------------------------------------------------------------------------------------------
++// Global instances
++//--------------------------------------------------------------------------------------------------
++
++pub static NULL_CONSOLE: NullConsole = NullConsole {};
++
++//--------------------------------------------------------------------------------------------------
++// Public Code
++//--------------------------------------------------------------------------------------------------
++
++impl interface::Write for NullConsole {
++    fn write_char(&self, _c: char) {}
++
++    fn write_fmt(&self, _args: fmt::Arguments) -> fmt::Result {
++        fmt::Result::Ok(())
++    }
++
++    fn flush(&self) {}
++}
++
++impl interface::Read for NullConsole {
++    fn clear_rx(&self) {}
++}
++
++impl interface::Statistics for NullConsole {}
++impl interface::All for NullConsole {}
+
 diff -uNr 04_safe_globals/src/console.rs 05_drivers_gpio_uart/src/console.rs
 --- 04_safe_globals/src/console.rs
 +++ 05_drivers_gpio_uart/src/console.rs
-@@ -16,8 +16,25 @@
+@@ -4,7 +4,9 @@
+
+ //! System console.
+
+-use crate::bsp;
++mod null_console;
++
++use crate::synchronization::{self, NullLock};
+
+ //--------------------------------------------------------------------------------------------------
+ // Public Definitions
+@@ -16,8 +18,25 @@
 
      /// Console write functions.
      pub trait Write {
@@ -1240,7 +1361,7 @@ diff -uNr 04_safe_globals/src/console.rs 05_drivers_gpio_uart/src/console.rs
      }
 
      /// Console statistics.
-@@ -26,10 +43,15 @@
+@@ -26,19 +45,37 @@
          fn chars_written(&self) -> usize {
              0
          }
@@ -1257,6 +1378,30 @@ diff -uNr 04_safe_globals/src/console.rs 05_drivers_gpio_uart/src/console.rs
  }
 
  //--------------------------------------------------------------------------------------------------
++// Global instances
++//--------------------------------------------------------------------------------------------------
++
++static CUR_CONSOLE: NullLock<&'static (dyn interface::All + Sync)> =
++    NullLock::new(&null_console::NULL_CONSOLE);
++
++//--------------------------------------------------------------------------------------------------
+ // Public Code
+ //--------------------------------------------------------------------------------------------------
++use synchronization::interface::Mutex;
++
++/// Register a new console.
++pub fn register_console(new_console: &'static (dyn interface::All + Sync)) {
++    CUR_CONSOLE.lock(|con| *con = new_console);
++}
+
+-/// Return a reference to the console.
++/// Return a reference to the currently registered console.
+ ///
+ /// This is the global console used by all printing macros.
+ pub fn console() -> &'static dyn interface::All {
+-    bsp::console::console()
++    CUR_CONSOLE.lock(|con| *con)
+ }
 
 diff -uNr 04_safe_globals/src/cpu.rs 05_drivers_gpio_uart/src/cpu.rs
 --- 04_safe_globals/src/cpu.rs
@@ -1274,13 +1419,29 @@ diff -uNr 04_safe_globals/src/cpu.rs 05_drivers_gpio_uart/src/cpu.rs
 diff -uNr 04_safe_globals/src/driver.rs 05_drivers_gpio_uart/src/driver.rs
 --- 04_safe_globals/src/driver.rs
 +++ 05_drivers_gpio_uart/src/driver.rs
-@@ -0,0 +1,44 @@
+@@ -0,0 +1,167 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Driver support.
 +
++use crate::{
++    println,
++    synchronization::{interface::Mutex, NullLock},
++};
++
++//--------------------------------------------------------------------------------------------------
++// Private Definitions
++//--------------------------------------------------------------------------------------------------
++
++const NUM_DRIVERS: usize = 5;
++
++struct DriverManagerInner {
++    next_index: usize,
++    descriptors: [Option<DeviceDriverDescriptor>; NUM_DRIVERS],
++}
++
 +//--------------------------------------------------------------------------------------------------
 +// Public Definitions
 +//--------------------------------------------------------------------------------------------------
@@ -1301,22 +1462,129 @@ diff -uNr 04_safe_globals/src/driver.rs 05_drivers_gpio_uart/src/driver.rs
 +            Ok(())
 +        }
 +    }
++}
++
++/// Tpye to be used as an optional callback after a driver's init() has run.
++pub type DeviceDriverPostInitCallback = unsafe fn() -> Result<(), &'static str>;
++
++/// A descriptor for device drivers.
++#[derive(Copy, Clone)]
++pub struct DeviceDriverDescriptor {
++    device_driver: &'static (dyn interface::DeviceDriver + Sync),
++    post_init_callback: Option<DeviceDriverPostInitCallback>,
++}
++
++/// Provides device driver management functions.
++pub struct DriverManager {
++    inner: NullLock<DriverManagerInner>,
++}
++
++//--------------------------------------------------------------------------------------------------
++// Global instances
++//--------------------------------------------------------------------------------------------------
++
++static DRIVER_MANAGER: DriverManager = DriverManager::new();
++
++//--------------------------------------------------------------------------------------------------
++// Private Code
++//--------------------------------------------------------------------------------------------------
++
++impl DriverManagerInner {
++    /// Create an instance.
++    pub const fn new() -> Self {
++        Self {
++            next_index: 0,
++            descriptors: [None; NUM_DRIVERS],
++        }
++    }
++}
++
++//--------------------------------------------------------------------------------------------------
++// Public Code
++//--------------------------------------------------------------------------------------------------
++
++impl DeviceDriverDescriptor {
++    /// Create an instance.
++    pub fn new(
++        device_driver: &'static (dyn interface::DeviceDriver + Sync),
++        post_init_callback: Option<DeviceDriverPostInitCallback>,
++    ) -> Self {
++        Self {
++            device_driver,
++            post_init_callback,
++        }
++    }
++}
++
++/// Return a reference to the global DriverManager.
++pub fn driver_manager() -> &'static DriverManager {
++    &DRIVER_MANAGER
++}
++
++impl DriverManager {
++    /// Create an instance.
++    pub const fn new() -> Self {
++        Self {
++            inner: NullLock::new(DriverManagerInner::new()),
++        }
++    }
++
++    /// Register a device driver with the kernel.
++    pub fn register_driver(&self, descriptor: DeviceDriverDescriptor) {
++        self.inner.lock(|inner| {
++            inner.descriptors[inner.next_index] = Some(descriptor);
++            inner.next_index += 1;
++        })
++    }
++
++    /// Helper for iterating over registered drivers.
++    fn for_each_descriptor<'a>(&'a self, f: impl FnMut(&'a DeviceDriverDescriptor)) {
++        self.inner.lock(|inner| {
++            inner
++                .descriptors
++                .iter()
++                .filter_map(|x| x.as_ref())
++                .for_each(f)
++        })
++    }
 +
-+    /// Device driver management functions.
++    /// Fully initialize all drivers.
 +    ///
-+    /// The `BSP` is supposed to supply one global instance.
-+    pub trait DriverManager {
-+        /// Return a slice of references to all `BSP`-instantiated drivers.
-+        ///
-+        /// # Safety
-+        ///
-+        /// - The order of devices is the order in which `DeviceDriver::init()` is called.
-+        fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
++    /// # Safety
++    ///
++    /// - During init, drivers might do stuff with system-wide impact.
++    pub unsafe fn init_drivers(&self) {
++        self.for_each_descriptor(|descriptor| {
++            // 1. Initialize driver.
++            if let Err(x) = descriptor.device_driver.init() {
++                panic!(
++                    "Error initializing driver: {}: {}",
++                    descriptor.device_driver.compatible(),
++                    x
++                );
++            }
 +
-+        /// Initialization code that runs after driver init.
-+        ///
-+        /// For example, device driver code that depends on other drivers already being online.
-+        fn post_device_driver_init(&self);
++            // 2. Call corresponding post init callback.
++            if let Some(callback) = &descriptor.post_init_callback {
++                if let Err(x) = callback() {
++                    panic!(
++                        "Error during driver post-init callback: {}: {}",
++                        descriptor.device_driver.compatible(),
++                        x
++                    );
++                }
++            }
++        });
++    }
++
++    /// Enumerate all registered device drivers.
++    pub fn enumerate(&self) {
++        let mut i: usize = 1;
++        self.for_each_descriptor(|descriptor| {
++            println!("      {}. {}", i, descriptor.device_driver.compatible());
++
++            i += 1;
++        });
 +    }
 +}
 
@@ -1339,21 +1607,20 @@ diff -uNr 04_safe_globals/src/main.rs 05_drivers_gpio_uart/src/main.rs
  mod panic_wait;
  mod print;
  mod synchronization;
-@@ -125,13 +127,50 @@
+@@ -125,13 +127,42 @@
  /// # Safety
  ///
  /// - Only a single core must be active and running this function.
 +/// - The init calls in this function must appear in the correct order.
  unsafe fn kernel_init() -> ! {
 -    use console::console;
-+    use driver::interface::DriverManager;
-+
-+    for i in bsp::driver::driver_manager().all_device_drivers().iter() {
-+        if let Err(x) = i.init() {
-+            panic!("Error loading driver: {}: {}", i.compatible(), x);
-+        }
++    // Initialize the BSP driver subsystem.
++    if let Err(x) = bsp::driver::init() {
++        panic!("Error initializing BSP driver subsystem: {}", x);
 +    }
-+    bsp::driver::driver_manager().post_device_driver_init();
++
++    // Initialize all device drivers.
++    driver::driver_manager().init_drivers();
 +    // println! is usable from here on.
 
 -    println!("[0] Hello from Rust!");
@@ -1365,7 +1632,6 @@ diff -uNr 04_safe_globals/src/main.rs 05_drivers_gpio_uart/src/main.rs
 +/// The main function running after the early init.
 +fn kernel_main() -> ! {
 +    use console::console;
-+    use driver::interface::DriverManager;
 
 -    println!("[2] Stopping here.");
 -    cpu::wait_forever()
@@ -1377,13 +1643,7 @@ diff -uNr 04_safe_globals/src/main.rs 05_drivers_gpio_uart/src/main.rs
 +    println!("[1] Booting on: {}", bsp::board_name());
 +
 +    println!("[2] Drivers loaded:");
-+    for (i, driver) in bsp::driver::driver_manager()
-+        .all_device_drivers()
-+        .iter()
-+        .enumerate()
-+    {
-+        println!("      {}. {}", i + 1, driver.compatible());
-+    }
++    driver::driver_manager().enumerate();
 +
 +    println!("[3] Chars written: {}", console().chars_written());
 +    println!("[4] Echoing input now");
diff --git a/05_drivers_gpio_uart/src/bsp/raspberrypi.rs b/05_drivers_gpio_uart/src/bsp/raspberrypi.rs
index a9a7261af..fe9406779 100644
--- a/05_drivers_gpio_uart/src/bsp/raspberrypi.rs
+++ b/05_drivers_gpio_uart/src/bsp/raspberrypi.rs
@@ -4,7 +4,6 @@
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
-pub mod console;
 pub mod cpu;
 pub mod driver;
 pub mod memory;
diff --git a/05_drivers_gpio_uart/src/bsp/raspberrypi/driver.rs b/05_drivers_gpio_uart/src/bsp/raspberrypi/driver.rs
index 8b683ed8b..ea8430660 100644
--- a/05_drivers_gpio_uart/src/bsp/raspberrypi/driver.rs
+++ b/05_drivers_gpio_uart/src/bsp/raspberrypi/driver.rs
@@ -5,51 +5,67 @@
 //! BSP driver support.
 
 use super::memory::map::mmio;
-use crate::{bsp::device_driver, driver};
+use crate::{bsp::device_driver, console, driver as generic_driver};
+use core::sync::atomic::{AtomicBool, Ordering};
 
 //--------------------------------------------------------------------------------------------------
-// Private Definitions
+// Global instances
 //--------------------------------------------------------------------------------------------------
 
-/// Device Driver Manager type.
-struct BSPDriverManager {
-    device_drivers: [&'static (dyn DeviceDriver + Sync); 2],
-}
+static PL011_UART: device_driver::PL011Uart =
+    unsafe { device_driver::PL011Uart::new(mmio::PL011_UART_START) };
+static GPIO: device_driver::GPIO = unsafe { device_driver::GPIO::new(mmio::GPIO_START) };
 
 //--------------------------------------------------------------------------------------------------
-// Global instances
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
-pub(super) static PL011_UART: device_driver::PL011Uart =
-    unsafe { device_driver::PL011Uart::new(mmio::PL011_UART_START) };
+/// This must be called only after successful init of the UART driver.
+fn post_init_uart() -> Result<(), &'static str> {
+    console::register_console(&PL011_UART);
 
-static GPIO: device_driver::GPIO = unsafe { device_driver::GPIO::new(mmio::GPIO_START) };
+    Ok(())
+}
 
-static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
-    device_drivers: [&PL011_UART, &GPIO],
-};
+/// This must be called only after successful init of the GPIO driver.
+fn post_init_gpio() -> Result<(), &'static str> {
+    GPIO.map_pl011_uart();
+    Ok(())
+}
 
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
+fn driver_uart() -> Result<(), &'static str> {
+    let uart_descriptor =
+        generic_driver::DeviceDriverDescriptor::new(&PL011_UART, Some(post_init_uart));
+    generic_driver::driver_manager().register_driver(uart_descriptor);
 
-/// Return a reference to the driver manager.
-pub fn driver_manager() -> &'static impl driver::interface::DriverManager {
-    &BSP_DRIVER_MANAGER
+    Ok(())
 }
 
-//------------------------------------------------------------------------------
-// OS Interface Code
-//------------------------------------------------------------------------------
-use driver::interface::DeviceDriver;
+fn driver_gpio() -> Result<(), &'static str> {
+    let gpio_descriptor = generic_driver::DeviceDriverDescriptor::new(&GPIO, Some(post_init_gpio));
+    generic_driver::driver_manager().register_driver(gpio_descriptor);
 
-impl driver::interface::DriverManager for BSPDriverManager {
-    fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
-        &self.device_drivers[..]
-    }
+    Ok(())
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
 
-    fn post_device_driver_init(&self) {
-        // Configure PL011Uart's output pins.
-        GPIO.map_pl011_uart();
+/// Initialize the driver subsystem.
+///
+/// # Safety
+///
+/// See child function calls.
+pub unsafe fn init() -> Result<(), &'static str> {
+    static INIT_DONE: AtomicBool = AtomicBool::new(false);
+    if INIT_DONE.load(Ordering::Relaxed) {
+        return Err("Init already done");
     }
+
+    driver_uart()?;
+    driver_gpio()?;
+
+    INIT_DONE.store(true, Ordering::Relaxed);
+    Ok(())
 }
diff --git a/05_drivers_gpio_uart/src/console.rs b/05_drivers_gpio_uart/src/console.rs
index c1fb0e53b..02b43df9f 100644
--- a/05_drivers_gpio_uart/src/console.rs
+++ b/05_drivers_gpio_uart/src/console.rs
@@ -4,7 +4,9 @@
 
 //! System console.
 
-use crate::bsp;
+mod null_console;
+
+use crate::synchronization::{self, NullLock};
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -54,13 +56,26 @@ pub mod interface {
     pub trait All: Write + Read + Statistics {}
 }
 
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static CUR_CONSOLE: NullLock<&'static (dyn interface::All + Sync)> =
+    NullLock::new(&null_console::NULL_CONSOLE);
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
+use synchronization::interface::Mutex;
+
+/// Register a new console.
+pub fn register_console(new_console: &'static (dyn interface::All + Sync)) {
+    CUR_CONSOLE.lock(|con| *con = new_console);
+}
 
-/// Return a reference to the console.
+/// Return a reference to the currently registered console.
 ///
 /// This is the global console used by all printing macros.
 pub fn console() -> &'static dyn interface::All {
-    bsp::console::console()
+    CUR_CONSOLE.lock(|con| *con)
 }
diff --git a/05_drivers_gpio_uart/src/console/null_console.rs b/05_drivers_gpio_uart/src/console/null_console.rs
new file mode 100644
index 000000000..2c64d499c
--- /dev/null
+++ b/05_drivers_gpio_uart/src/console/null_console.rs
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Null console.
+
+use super::interface;
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct NullConsole;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+pub static NULL_CONSOLE: NullConsole = NullConsole {};
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl interface::Write for NullConsole {
+    fn write_char(&self, _c: char) {}
+
+    fn write_fmt(&self, _args: fmt::Arguments) -> fmt::Result {
+        fmt::Result::Ok(())
+    }
+
+    fn flush(&self) {}
+}
+
+impl interface::Read for NullConsole {
+    fn clear_rx(&self) {}
+}
+
+impl interface::Statistics for NullConsole {}
+impl interface::All for NullConsole {}
diff --git a/05_drivers_gpio_uart/src/driver.rs b/05_drivers_gpio_uart/src/driver.rs
index 2fcc75629..e324ecf8f 100644
--- a/05_drivers_gpio_uart/src/driver.rs
+++ b/05_drivers_gpio_uart/src/driver.rs
@@ -4,6 +4,22 @@
 
 //! Driver support.
 
+use crate::{
+    println,
+    synchronization::{interface::Mutex, NullLock},
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+const NUM_DRIVERS: usize = 5;
+
+struct DriverManagerInner {
+    next_index: usize,
+    descriptors: [Option<DeviceDriverDescriptor>; NUM_DRIVERS],
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -24,21 +40,128 @@ pub mod interface {
             Ok(())
         }
     }
+}
+
+/// Tpye to be used as an optional callback after a driver's init() has run.
+pub type DeviceDriverPostInitCallback = unsafe fn() -> Result<(), &'static str>;
+
+/// A descriptor for device drivers.
+#[derive(Copy, Clone)]
+pub struct DeviceDriverDescriptor {
+    device_driver: &'static (dyn interface::DeviceDriver + Sync),
+    post_init_callback: Option<DeviceDriverPostInitCallback>,
+}
+
+/// Provides device driver management functions.
+pub struct DriverManager {
+    inner: NullLock<DriverManagerInner>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static DRIVER_MANAGER: DriverManager = DriverManager::new();
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl DriverManagerInner {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self {
+            next_index: 0,
+            descriptors: [None; NUM_DRIVERS],
+        }
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl DeviceDriverDescriptor {
+    /// Create an instance.
+    pub fn new(
+        device_driver: &'static (dyn interface::DeviceDriver + Sync),
+        post_init_callback: Option<DeviceDriverPostInitCallback>,
+    ) -> Self {
+        Self {
+            device_driver,
+            post_init_callback,
+        }
+    }
+}
+
+/// Return a reference to the global DriverManager.
+pub fn driver_manager() -> &'static DriverManager {
+    &DRIVER_MANAGER
+}
+
+impl DriverManager {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self {
+            inner: NullLock::new(DriverManagerInner::new()),
+        }
+    }
 
-    /// Device driver management functions.
+    /// Register a device driver with the kernel.
+    pub fn register_driver(&self, descriptor: DeviceDriverDescriptor) {
+        self.inner.lock(|inner| {
+            inner.descriptors[inner.next_index] = Some(descriptor);
+            inner.next_index += 1;
+        })
+    }
+
+    /// Helper for iterating over registered drivers.
+    fn for_each_descriptor<'a>(&'a self, f: impl FnMut(&'a DeviceDriverDescriptor)) {
+        self.inner.lock(|inner| {
+            inner
+                .descriptors
+                .iter()
+                .filter_map(|x| x.as_ref())
+                .for_each(f)
+        })
+    }
+
+    /// Fully initialize all drivers.
     ///
-    /// The `BSP` is supposed to supply one global instance.
-    pub trait DriverManager {
-        /// Return a slice of references to all `BSP`-instantiated drivers.
-        ///
-        /// # Safety
-        ///
-        /// - The order of devices is the order in which `DeviceDriver::init()` is called.
-        fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
+    /// # Safety
+    ///
+    /// - During init, drivers might do stuff with system-wide impact.
+    pub unsafe fn init_drivers(&self) {
+        self.for_each_descriptor(|descriptor| {
+            // 1. Initialize driver.
+            if let Err(x) = descriptor.device_driver.init() {
+                panic!(
+                    "Error initializing driver: {}: {}",
+                    descriptor.device_driver.compatible(),
+                    x
+                );
+            }
 
-        /// Initialization code that runs after driver init.
-        ///
-        /// For example, device driver code that depends on other drivers already being online.
-        fn post_device_driver_init(&self);
+            // 2. Call corresponding post init callback.
+            if let Some(callback) = &descriptor.post_init_callback {
+                if let Err(x) = callback() {
+                    panic!(
+                        "Error during driver post-init callback: {}: {}",
+                        descriptor.device_driver.compatible(),
+                        x
+                    );
+                }
+            }
+        });
+    }
+
+    /// Enumerate all registered device drivers.
+    pub fn enumerate(&self) {
+        let mut i: usize = 1;
+        self.for_each_descriptor(|descriptor| {
+            println!("      {}. {}", i, descriptor.device_driver.compatible());
+
+            i += 1;
+        });
     }
 }
diff --git a/05_drivers_gpio_uart/src/main.rs b/05_drivers_gpio_uart/src/main.rs
index c9b73382f..9d1582380 100644
--- a/05_drivers_gpio_uart/src/main.rs
+++ b/05_drivers_gpio_uart/src/main.rs
@@ -129,14 +129,13 @@ mod synchronization;
 /// - Only a single core must be active and running this function.
 /// - The init calls in this function must appear in the correct order.
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
-    for i in bsp::driver::driver_manager().all_device_drivers().iter() {
-        if let Err(x) = i.init() {
-            panic!("Error loading driver: {}: {}", i.compatible(), x);
-        }
+    // Initialize the BSP driver subsystem.
+    if let Err(x) = bsp::driver::init() {
+        panic!("Error initializing BSP driver subsystem: {}", x);
     }
-    bsp::driver::driver_manager().post_device_driver_init();
+
+    // Initialize all device drivers.
+    driver::driver_manager().init_drivers();
     // println! is usable from here on.
 
     // Transition from unsafe to safe.
@@ -146,7 +145,6 @@ unsafe fn kernel_init() -> ! {
 /// The main function running after the early init.
 fn kernel_main() -> ! {
     use console::console;
-    use driver::interface::DriverManager;
 
     println!(
         "[0] {} version {}",
@@ -156,13 +154,7 @@ fn kernel_main() -> ! {
     println!("[1] Booting on: {}", bsp::board_name());
 
     println!("[2] Drivers loaded:");
-    for (i, driver) in bsp::driver::driver_manager()
-        .all_device_drivers()
-        .iter()
-        .enumerate()
-    {
-        println!("      {}. {}", i + 1, driver.compatible());
-    }
+    driver::driver_manager().enumerate();
 
     println!("[3] Chars written: {}", console().chars_written());
     println!("[4] Echoing input now");
diff --git a/06_uart_chainloader/README.md b/06_uart_chainloader/README.md
index 6e4e45309..e321e6031 100644
--- a/06_uart_chainloader/README.md
+++ b/06_uart_chainloader/README.md
@@ -369,6 +369,27 @@ diff -uNr 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 0
          {}
      }
 
+diff -uNr 05_drivers_gpio_uart/src/bsp/raspberrypi/console.rs 06_uart_chainloader/src/bsp/raspberrypi/console.rs
+--- 05_drivers_gpio_uart/src/bsp/raspberrypi/console.rs
++++ 06_uart_chainloader/src/bsp/raspberrypi/console.rs
+@@ -1,16 +0,0 @@
+-// SPDX-License-Identifier: MIT OR Apache-2.0
+-//
+-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+-
+-//! BSP console facilities.
+-
+-use crate::console;
+-
+-//--------------------------------------------------------------------------------------------------
+-// Public Code
+-//--------------------------------------------------------------------------------------------------
+-
+-/// Return a reference to the console.
+-pub fn console() -> &'static dyn console::interface::All {
+-    &super::driver::PL011_UART
+-}
+
 diff -uNr 05_drivers_gpio_uart/src/bsp/raspberrypi/kernel.ld 06_uart_chainloader/src/bsp/raspberrypi/kernel.ld
 --- 05_drivers_gpio_uart/src/bsp/raspberrypi/kernel.ld
 +++ 06_uart_chainloader/src/bsp/raspberrypi/kernel.ld
@@ -437,10 +458,41 @@ diff -uNr 05_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs 06_uart_chainloader
 +    map::BOARD_DEFAULT_LOAD_ADDRESS as _
 +}
 
+diff -uNr 05_drivers_gpio_uart/src/driver.rs 06_uart_chainloader/src/driver.rs
+--- 05_drivers_gpio_uart/src/driver.rs
++++ 06_uart_chainloader/src/driver.rs
+@@ -4,10 +4,7 @@
+
+ //! Driver support.
+
+-use crate::{
+-    println,
+-    synchronization::{interface::Mutex, NullLock},
+-};
++use crate::synchronization::{interface::Mutex, NullLock};
+
+ //--------------------------------------------------------------------------------------------------
+ // Private Definitions
+@@ -154,14 +151,4 @@
+             }
+         });
+     }
+-
+-    /// Enumerate all registered device drivers.
+-    pub fn enumerate(&self) {
+-        let mut i: usize = 1;
+-        self.for_each_descriptor(|descriptor| {
+-            println!("      {}. {}", i, descriptor.device_driver.compatible());
+-
+-            i += 1;
+-        });
+-    }
+ }
+
 diff -uNr 05_drivers_gpio_uart/src/main.rs 06_uart_chainloader/src/main.rs
 --- 05_drivers_gpio_uart/src/main.rs
 +++ 06_uart_chainloader/src/main.rs
-@@ -143,34 +143,55 @@
+@@ -142,27 +142,55 @@
      kernel_main()
  }
 
@@ -454,7 +506,6 @@ diff -uNr 05_drivers_gpio_uart/src/main.rs 06_uart_chainloader/src/main.rs
  /// The main function running after the early init.
  fn kernel_main() -> ! {
      use console::console;
--    use driver::interface::DriverManager;
 
 -    println!(
 -        "[0] {} version {}",
@@ -462,41 +513,35 @@ diff -uNr 05_drivers_gpio_uart/src/main.rs 06_uart_chainloader/src/main.rs
 -        env!("CARGO_PKG_VERSION")
 -    );
 -    println!("[1] Booting on: {}", bsp::board_name());
--
--    println!("[2] Drivers loaded:");
--    for (i, driver) in bsp::driver::driver_manager()
--        .all_device_drivers()
--        .iter()
--        .enumerate()
--    {
--        println!("      {}. {}", i + 1, driver.compatible());
 +    println!("{}", MINILOAD_LOGO);
 +    println!("{:^37}", bsp::board_name());
 +    println!();
 +    println!("[ML] Requesting binary");
 +    console().flush();
-+
+
+-    println!("[2] Drivers loaded:");
+-    driver::driver_manager().enumerate();
 +    // Discard any spurious received characters before starting with the loader protocol.
 +    console().clear_rx();
-+
-+    // Notify `Minipush` to send the binary.
-+    for _ in 0..3 {
-+        console().write_char(3 as char);
-     }
 
 -    println!("[3] Chars written: {}", console().chars_written());
 -    println!("[4] Echoing input now");
-+    // Read the binary's size.
-+    let mut size: u32 = u32::from(console().read_char() as u8);
-+    size |= u32::from(console().read_char() as u8) << 8;
-+    size |= u32::from(console().read_char() as u8) << 16;
-+    size |= u32::from(console().read_char() as u8) << 24;
++    // Notify `Minipush` to send the binary.
++    for _ in 0..3 {
++        console().write_char(3 as char);
++    }
 
 -    // Discard any spurious received characters before going into echo mode.
 -    console().clear_rx();
 -    loop {
 -        let c = console().read_char();
 -        console().write_char(c);
++    // Read the binary's size.
++    let mut size: u32 = u32::from(console().read_char() as u8);
++    size |= u32::from(console().read_char() as u8) << 8;
++    size |= u32::from(console().read_char() as u8) << 16;
++    size |= u32::from(console().read_char() as u8) << 24;
++
 +    // Trust it's not too big.
 +    console().write_char('O');
 +    console().write_char('K');
diff --git a/06_uart_chainloader/src/bsp/raspberrypi.rs b/06_uart_chainloader/src/bsp/raspberrypi.rs
index a9a7261af..fe9406779 100644
--- a/06_uart_chainloader/src/bsp/raspberrypi.rs
+++ b/06_uart_chainloader/src/bsp/raspberrypi.rs
@@ -4,7 +4,6 @@
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
-pub mod console;
 pub mod cpu;
 pub mod driver;
 pub mod memory;
diff --git a/06_uart_chainloader/src/bsp/raspberrypi/console.rs b/06_uart_chainloader/src/bsp/raspberrypi/console.rs
deleted file mode 100644
index 0a630eef4..000000000
--- a/06_uart_chainloader/src/bsp/raspberrypi/console.rs
+++ /dev/null
@@ -1,16 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
-
-//! BSP console facilities.
-
-use crate::console;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return a reference to the console.
-pub fn console() -> &'static dyn console::interface::All {
-    &super::driver::PL011_UART
-}
diff --git a/06_uart_chainloader/src/bsp/raspberrypi/driver.rs b/06_uart_chainloader/src/bsp/raspberrypi/driver.rs
index 8b683ed8b..ea8430660 100644
--- a/06_uart_chainloader/src/bsp/raspberrypi/driver.rs
+++ b/06_uart_chainloader/src/bsp/raspberrypi/driver.rs
@@ -5,51 +5,67 @@
 //! BSP driver support.
 
 use super::memory::map::mmio;
-use crate::{bsp::device_driver, driver};
+use crate::{bsp::device_driver, console, driver as generic_driver};
+use core::sync::atomic::{AtomicBool, Ordering};
 
 //--------------------------------------------------------------------------------------------------
-// Private Definitions
+// Global instances
 //--------------------------------------------------------------------------------------------------
 
-/// Device Driver Manager type.
-struct BSPDriverManager {
-    device_drivers: [&'static (dyn DeviceDriver + Sync); 2],
-}
+static PL011_UART: device_driver::PL011Uart =
+    unsafe { device_driver::PL011Uart::new(mmio::PL011_UART_START) };
+static GPIO: device_driver::GPIO = unsafe { device_driver::GPIO::new(mmio::GPIO_START) };
 
 //--------------------------------------------------------------------------------------------------
-// Global instances
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
-pub(super) static PL011_UART: device_driver::PL011Uart =
-    unsafe { device_driver::PL011Uart::new(mmio::PL011_UART_START) };
+/// This must be called only after successful init of the UART driver.
+fn post_init_uart() -> Result<(), &'static str> {
+    console::register_console(&PL011_UART);
 
-static GPIO: device_driver::GPIO = unsafe { device_driver::GPIO::new(mmio::GPIO_START) };
+    Ok(())
+}
 
-static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
-    device_drivers: [&PL011_UART, &GPIO],
-};
+/// This must be called only after successful init of the GPIO driver.
+fn post_init_gpio() -> Result<(), &'static str> {
+    GPIO.map_pl011_uart();
+    Ok(())
+}
 
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
+fn driver_uart() -> Result<(), &'static str> {
+    let uart_descriptor =
+        generic_driver::DeviceDriverDescriptor::new(&PL011_UART, Some(post_init_uart));
+    generic_driver::driver_manager().register_driver(uart_descriptor);
 
-/// Return a reference to the driver manager.
-pub fn driver_manager() -> &'static impl driver::interface::DriverManager {
-    &BSP_DRIVER_MANAGER
+    Ok(())
 }
 
-//------------------------------------------------------------------------------
-// OS Interface Code
-//------------------------------------------------------------------------------
-use driver::interface::DeviceDriver;
+fn driver_gpio() -> Result<(), &'static str> {
+    let gpio_descriptor = generic_driver::DeviceDriverDescriptor::new(&GPIO, Some(post_init_gpio));
+    generic_driver::driver_manager().register_driver(gpio_descriptor);
 
-impl driver::interface::DriverManager for BSPDriverManager {
-    fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
-        &self.device_drivers[..]
-    }
+    Ok(())
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
 
-    fn post_device_driver_init(&self) {
-        // Configure PL011Uart's output pins.
-        GPIO.map_pl011_uart();
+/// Initialize the driver subsystem.
+///
+/// # Safety
+///
+/// See child function calls.
+pub unsafe fn init() -> Result<(), &'static str> {
+    static INIT_DONE: AtomicBool = AtomicBool::new(false);
+    if INIT_DONE.load(Ordering::Relaxed) {
+        return Err("Init already done");
     }
+
+    driver_uart()?;
+    driver_gpio()?;
+
+    INIT_DONE.store(true, Ordering::Relaxed);
+    Ok(())
 }
diff --git a/06_uart_chainloader/src/console.rs b/06_uart_chainloader/src/console.rs
index c1fb0e53b..02b43df9f 100644
--- a/06_uart_chainloader/src/console.rs
+++ b/06_uart_chainloader/src/console.rs
@@ -4,7 +4,9 @@
 
 //! System console.
 
-use crate::bsp;
+mod null_console;
+
+use crate::synchronization::{self, NullLock};
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -54,13 +56,26 @@ pub mod interface {
     pub trait All: Write + Read + Statistics {}
 }
 
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static CUR_CONSOLE: NullLock<&'static (dyn interface::All + Sync)> =
+    NullLock::new(&null_console::NULL_CONSOLE);
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
+use synchronization::interface::Mutex;
+
+/// Register a new console.
+pub fn register_console(new_console: &'static (dyn interface::All + Sync)) {
+    CUR_CONSOLE.lock(|con| *con = new_console);
+}
 
-/// Return a reference to the console.
+/// Return a reference to the currently registered console.
 ///
 /// This is the global console used by all printing macros.
 pub fn console() -> &'static dyn interface::All {
-    bsp::console::console()
+    CUR_CONSOLE.lock(|con| *con)
 }
diff --git a/06_uart_chainloader/src/console/null_console.rs b/06_uart_chainloader/src/console/null_console.rs
new file mode 100644
index 000000000..2c64d499c
--- /dev/null
+++ b/06_uart_chainloader/src/console/null_console.rs
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Null console.
+
+use super::interface;
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct NullConsole;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+pub static NULL_CONSOLE: NullConsole = NullConsole {};
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl interface::Write for NullConsole {
+    fn write_char(&self, _c: char) {}
+
+    fn write_fmt(&self, _args: fmt::Arguments) -> fmt::Result {
+        fmt::Result::Ok(())
+    }
+
+    fn flush(&self) {}
+}
+
+impl interface::Read for NullConsole {
+    fn clear_rx(&self) {}
+}
+
+impl interface::Statistics for NullConsole {}
+impl interface::All for NullConsole {}
diff --git a/06_uart_chainloader/src/driver.rs b/06_uart_chainloader/src/driver.rs
index 2fcc75629..fb44bbd9d 100644
--- a/06_uart_chainloader/src/driver.rs
+++ b/06_uart_chainloader/src/driver.rs
@@ -4,6 +4,19 @@
 
 //! Driver support.
 
+use crate::synchronization::{interface::Mutex, NullLock};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+const NUM_DRIVERS: usize = 5;
+
+struct DriverManagerInner {
+    next_index: usize,
+    descriptors: [Option<DeviceDriverDescriptor>; NUM_DRIVERS],
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -24,21 +37,118 @@ pub mod interface {
             Ok(())
         }
     }
+}
+
+/// Tpye to be used as an optional callback after a driver's init() has run.
+pub type DeviceDriverPostInitCallback = unsafe fn() -> Result<(), &'static str>;
 
-    /// Device driver management functions.
+/// A descriptor for device drivers.
+#[derive(Copy, Clone)]
+pub struct DeviceDriverDescriptor {
+    device_driver: &'static (dyn interface::DeviceDriver + Sync),
+    post_init_callback: Option<DeviceDriverPostInitCallback>,
+}
+
+/// Provides device driver management functions.
+pub struct DriverManager {
+    inner: NullLock<DriverManagerInner>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static DRIVER_MANAGER: DriverManager = DriverManager::new();
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl DriverManagerInner {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self {
+            next_index: 0,
+            descriptors: [None; NUM_DRIVERS],
+        }
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl DeviceDriverDescriptor {
+    /// Create an instance.
+    pub fn new(
+        device_driver: &'static (dyn interface::DeviceDriver + Sync),
+        post_init_callback: Option<DeviceDriverPostInitCallback>,
+    ) -> Self {
+        Self {
+            device_driver,
+            post_init_callback,
+        }
+    }
+}
+
+/// Return a reference to the global DriverManager.
+pub fn driver_manager() -> &'static DriverManager {
+    &DRIVER_MANAGER
+}
+
+impl DriverManager {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self {
+            inner: NullLock::new(DriverManagerInner::new()),
+        }
+    }
+
+    /// Register a device driver with the kernel.
+    pub fn register_driver(&self, descriptor: DeviceDriverDescriptor) {
+        self.inner.lock(|inner| {
+            inner.descriptors[inner.next_index] = Some(descriptor);
+            inner.next_index += 1;
+        })
+    }
+
+    /// Helper for iterating over registered drivers.
+    fn for_each_descriptor<'a>(&'a self, f: impl FnMut(&'a DeviceDriverDescriptor)) {
+        self.inner.lock(|inner| {
+            inner
+                .descriptors
+                .iter()
+                .filter_map(|x| x.as_ref())
+                .for_each(f)
+        })
+    }
+
+    /// Fully initialize all drivers.
     ///
-    /// The `BSP` is supposed to supply one global instance.
-    pub trait DriverManager {
-        /// Return a slice of references to all `BSP`-instantiated drivers.
-        ///
-        /// # Safety
-        ///
-        /// - The order of devices is the order in which `DeviceDriver::init()` is called.
-        fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
+    /// # Safety
+    ///
+    /// - During init, drivers might do stuff with system-wide impact.
+    pub unsafe fn init_drivers(&self) {
+        self.for_each_descriptor(|descriptor| {
+            // 1. Initialize driver.
+            if let Err(x) = descriptor.device_driver.init() {
+                panic!(
+                    "Error initializing driver: {}: {}",
+                    descriptor.device_driver.compatible(),
+                    x
+                );
+            }
 
-        /// Initialization code that runs after driver init.
-        ///
-        /// For example, device driver code that depends on other drivers already being online.
-        fn post_device_driver_init(&self);
+            // 2. Call corresponding post init callback.
+            if let Some(callback) = &descriptor.post_init_callback {
+                if let Err(x) = callback() {
+                    panic!(
+                        "Error during driver post-init callback: {}: {}",
+                        descriptor.device_driver.compatible(),
+                        x
+                    );
+                }
+            }
+        });
     }
 }
diff --git a/06_uart_chainloader/src/main.rs b/06_uart_chainloader/src/main.rs
index 08bd9ad94..bef628225 100644
--- a/06_uart_chainloader/src/main.rs
+++ b/06_uart_chainloader/src/main.rs
@@ -129,14 +129,13 @@ mod synchronization;
 /// - Only a single core must be active and running this function.
 /// - The init calls in this function must appear in the correct order.
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
-    for i in bsp::driver::driver_manager().all_device_drivers().iter() {
-        if let Err(x) = i.init() {
-            panic!("Error loading driver: {}: {}", i.compatible(), x);
-        }
+    // Initialize the BSP driver subsystem.
+    if let Err(x) = bsp::driver::init() {
+        panic!("Error initializing BSP driver subsystem: {}", x);
     }
-    bsp::driver::driver_manager().post_device_driver_init();
+
+    // Initialize all device drivers.
+    driver::driver_manager().init_drivers();
     // println! is usable from here on.
 
     // Transition from unsafe to safe.
diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index 2e8df3c25..4a5905b41 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -501,6 +501,28 @@ diff -uNr 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 07
          {}
      }
 
+diff -uNr 06_uart_chainloader/src/bsp/raspberrypi/driver.rs 07_timestamps/src/bsp/raspberrypi/driver.rs
+--- 06_uart_chainloader/src/bsp/raspberrypi/driver.rs
++++ 07_timestamps/src/bsp/raspberrypi/driver.rs
+@@ -57,6 +57,17 @@
+ /// # Safety
+ ///
+ /// See child function calls.
++///
++/// # Note
++///
++/// Using atomics here relieves us from needing to use `unsafe` for the static variable.
++///
++/// On `AArch64`, which is the only implemented architecture at the time of writing this,
++/// [`AtomicBool::load`] and [`AtomicBool::store`] are lowered to ordinary load and store
++/// instructions. They are therefore safe to use even with MMU + caching deactivated.
++///
++/// [`AtomicBool::load`]: core::sync::atomic::AtomicBool::load
++/// [`AtomicBool::store`]: core::sync::atomic::AtomicBool::store
+ pub unsafe fn init() -> Result<(), &'static str> {
+     static INIT_DONE: AtomicBool = AtomicBool::new(false);
+     if INIT_DONE.load(Ordering::Relaxed) {
+
 diff -uNr 06_uart_chainloader/src/bsp/raspberrypi/kernel.ld 07_timestamps/src/bsp/raspberrypi/kernel.ld
 --- 06_uart_chainloader/src/bsp/raspberrypi/kernel.ld
 +++ 07_timestamps/src/bsp/raspberrypi/kernel.ld
@@ -580,6 +602,37 @@ diff -uNr 06_uart_chainloader/src/cpu.rs 07_timestamps/src/cpu.rs
 -#[cfg(feature = "bsp_rpi3")]
 -pub use arch_cpu::spin_for_cycles;
 
+diff -uNr 06_uart_chainloader/src/driver.rs 07_timestamps/src/driver.rs
+--- 06_uart_chainloader/src/driver.rs
++++ 07_timestamps/src/driver.rs
+@@ -4,7 +4,10 @@
+
+ //! Driver support.
+
+-use crate::synchronization::{interface::Mutex, NullLock};
++use crate::{
++    info,
++    synchronization::{interface::Mutex, NullLock},
++};
+
+ //--------------------------------------------------------------------------------------------------
+ // Private Definitions
+@@ -151,4 +154,14 @@
+             }
+         });
+     }
++
++    /// Enumerate all registered device drivers.
++    pub fn enumerate(&self) {
++        let mut i: usize = 1;
++        self.for_each_descriptor(|descriptor| {
++            info!("      {}. {}", i, descriptor.device_driver.compatible());
++
++            i += 1;
++        });
++    }
+ }
+
 diff -uNr 06_uart_chainloader/src/main.rs 07_timestamps/src/main.rs
 --- 06_uart_chainloader/src/main.rs
 +++ 07_timestamps/src/main.rs
@@ -604,7 +657,7 @@ diff -uNr 06_uart_chainloader/src/main.rs 07_timestamps/src/main.rs
 
  /// Early init code.
  ///
-@@ -143,55 +147,37 @@
+@@ -142,55 +146,30 @@
      kernel_main()
  }
 
@@ -618,9 +671,7 @@ diff -uNr 06_uart_chainloader/src/main.rs 07_timestamps/src/main.rs
  /// The main function running after the early init.
  fn kernel_main() -> ! {
 -    use console::console;
-+    use core::time::Duration;
-+    use driver::interface::DriverManager;
-
+-
 -    println!("{}", MINILOAD_LOGO);
 -    println!("{:^37}", bsp::board_name());
 -    println!();
@@ -633,26 +684,8 @@ diff -uNr 06_uart_chainloader/src/main.rs 07_timestamps/src/main.rs
 -    // Notify `Minipush` to send the binary.
 -    for _ in 0..3 {
 -        console().write_char(3 as char);
-+    info!(
-+        "{} version {}",
-+        env!("CARGO_PKG_NAME"),
-+        env!("CARGO_PKG_VERSION")
-+    );
-+    info!("Booting on: {}", bsp::board_name());
-+
-+    info!(
-+        "Architectural timer resolution: {} ns",
-+        time::time_manager().resolution().as_nanos()
-+    );
-+
-+    info!("Drivers loaded:");
-+    for (i, driver) in bsp::driver::driver_manager()
-+        .all_device_drivers()
-+        .iter()
-+        .enumerate()
-+    {
-+        info!("      {}. {}", i + 1, driver.compatible());
-     }
+-    }
++    use core::time::Duration;
 
 -    // Read the binary's size.
 -    let mut size: u32 = u32::from(console().read_char() as u8);
@@ -670,10 +703,29 @@ diff -uNr 06_uart_chainloader/src/main.rs 07_timestamps/src/main.rs
 -        for i in 0..size {
 -            core::ptr::write_volatile(kernel_addr.offset(i as isize), console().read_char() as u8)
 -        }
--    }
++    info!(
++        "{} version {}",
++        env!("CARGO_PKG_NAME"),
++        env!("CARGO_PKG_VERSION")
++    );
++    info!("Booting on: {}", bsp::board_name());
++
++    info!(
++        "Architectural timer resolution: {} ns",
++        time::time_manager().resolution().as_nanos()
++    );
++
++    info!("Drivers loaded:");
++    driver::driver_manager().enumerate();
++
 +    // Test a failing timer case.
 +    time::time_manager().spin_for(Duration::from_nanos(1));
-
++
++    loop {
++        info!("Spinning for 1 second");
++        time::time_manager().spin_for(Duration::from_secs(1));
+     }
+-
 -    println!("[ML] Loaded! Executing the payload now\n");
 -    console().flush();
 -
@@ -682,10 +734,6 @@ diff -uNr 06_uart_chainloader/src/main.rs 07_timestamps/src/main.rs
 -
 -    // Jump to loaded kernel!
 -    kernel()
-+    loop {
-+        info!("Spinning for 1 second");
-+        time::time_manager().spin_for(Duration::from_secs(1));
-+    }
  }
 
 diff -uNr 06_uart_chainloader/src/panic_wait.rs 07_timestamps/src/panic_wait.rs
diff --git a/07_timestamps/src/bsp/raspberrypi.rs b/07_timestamps/src/bsp/raspberrypi.rs
index a9a7261af..fe9406779 100644
--- a/07_timestamps/src/bsp/raspberrypi.rs
+++ b/07_timestamps/src/bsp/raspberrypi.rs
@@ -4,7 +4,6 @@
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
-pub mod console;
 pub mod cpu;
 pub mod driver;
 pub mod memory;
diff --git a/07_timestamps/src/bsp/raspberrypi/console.rs b/07_timestamps/src/bsp/raspberrypi/console.rs
deleted file mode 100644
index 0a630eef4..000000000
--- a/07_timestamps/src/bsp/raspberrypi/console.rs
+++ /dev/null
@@ -1,16 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
-
-//! BSP console facilities.
-
-use crate::console;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return a reference to the console.
-pub fn console() -> &'static dyn console::interface::All {
-    &super::driver::PL011_UART
-}
diff --git a/07_timestamps/src/bsp/raspberrypi/driver.rs b/07_timestamps/src/bsp/raspberrypi/driver.rs
index 8b683ed8b..4a42b84f7 100644
--- a/07_timestamps/src/bsp/raspberrypi/driver.rs
+++ b/07_timestamps/src/bsp/raspberrypi/driver.rs
@@ -5,51 +5,78 @@
 //! BSP driver support.
 
 use super::memory::map::mmio;
-use crate::{bsp::device_driver, driver};
+use crate::{bsp::device_driver, console, driver as generic_driver};
+use core::sync::atomic::{AtomicBool, Ordering};
 
 //--------------------------------------------------------------------------------------------------
-// Private Definitions
+// Global instances
 //--------------------------------------------------------------------------------------------------
 
-/// Device Driver Manager type.
-struct BSPDriverManager {
-    device_drivers: [&'static (dyn DeviceDriver + Sync); 2],
-}
+static PL011_UART: device_driver::PL011Uart =
+    unsafe { device_driver::PL011Uart::new(mmio::PL011_UART_START) };
+static GPIO: device_driver::GPIO = unsafe { device_driver::GPIO::new(mmio::GPIO_START) };
 
 //--------------------------------------------------------------------------------------------------
-// Global instances
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
-pub(super) static PL011_UART: device_driver::PL011Uart =
-    unsafe { device_driver::PL011Uart::new(mmio::PL011_UART_START) };
+/// This must be called only after successful init of the UART driver.
+fn post_init_uart() -> Result<(), &'static str> {
+    console::register_console(&PL011_UART);
 
-static GPIO: device_driver::GPIO = unsafe { device_driver::GPIO::new(mmio::GPIO_START) };
+    Ok(())
+}
 
-static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
-    device_drivers: [&PL011_UART, &GPIO],
-};
+/// This must be called only after successful init of the GPIO driver.
+fn post_init_gpio() -> Result<(), &'static str> {
+    GPIO.map_pl011_uart();
+    Ok(())
+}
 
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
+fn driver_uart() -> Result<(), &'static str> {
+    let uart_descriptor =
+        generic_driver::DeviceDriverDescriptor::new(&PL011_UART, Some(post_init_uart));
+    generic_driver::driver_manager().register_driver(uart_descriptor);
 
-/// Return a reference to the driver manager.
-pub fn driver_manager() -> &'static impl driver::interface::DriverManager {
-    &BSP_DRIVER_MANAGER
+    Ok(())
 }
 
-//------------------------------------------------------------------------------
-// OS Interface Code
-//------------------------------------------------------------------------------
-use driver::interface::DeviceDriver;
+fn driver_gpio() -> Result<(), &'static str> {
+    let gpio_descriptor = generic_driver::DeviceDriverDescriptor::new(&GPIO, Some(post_init_gpio));
+    generic_driver::driver_manager().register_driver(gpio_descriptor);
 
-impl driver::interface::DriverManager for BSPDriverManager {
-    fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
-        &self.device_drivers[..]
-    }
+    Ok(())
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
 
-    fn post_device_driver_init(&self) {
-        // Configure PL011Uart's output pins.
-        GPIO.map_pl011_uart();
+/// Initialize the driver subsystem.
+///
+/// # Safety
+///
+/// See child function calls.
+///
+/// # Note
+///
+/// Using atomics here relieves us from needing to use `unsafe` for the static variable.
+///
+/// On `AArch64`, which is the only implemented architecture at the time of writing this,
+/// [`AtomicBool::load`] and [`AtomicBool::store`] are lowered to ordinary load and store
+/// instructions. They are therefore safe to use even with MMU + caching deactivated.
+///
+/// [`AtomicBool::load`]: core::sync::atomic::AtomicBool::load
+/// [`AtomicBool::store`]: core::sync::atomic::AtomicBool::store
+pub unsafe fn init() -> Result<(), &'static str> {
+    static INIT_DONE: AtomicBool = AtomicBool::new(false);
+    if INIT_DONE.load(Ordering::Relaxed) {
+        return Err("Init already done");
     }
+
+    driver_uart()?;
+    driver_gpio()?;
+
+    INIT_DONE.store(true, Ordering::Relaxed);
+    Ok(())
 }
diff --git a/07_timestamps/src/console.rs b/07_timestamps/src/console.rs
index c1fb0e53b..02b43df9f 100644
--- a/07_timestamps/src/console.rs
+++ b/07_timestamps/src/console.rs
@@ -4,7 +4,9 @@
 
 //! System console.
 
-use crate::bsp;
+mod null_console;
+
+use crate::synchronization::{self, NullLock};
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -54,13 +56,26 @@ pub mod interface {
     pub trait All: Write + Read + Statistics {}
 }
 
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static CUR_CONSOLE: NullLock<&'static (dyn interface::All + Sync)> =
+    NullLock::new(&null_console::NULL_CONSOLE);
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
+use synchronization::interface::Mutex;
+
+/// Register a new console.
+pub fn register_console(new_console: &'static (dyn interface::All + Sync)) {
+    CUR_CONSOLE.lock(|con| *con = new_console);
+}
 
-/// Return a reference to the console.
+/// Return a reference to the currently registered console.
 ///
 /// This is the global console used by all printing macros.
 pub fn console() -> &'static dyn interface::All {
-    bsp::console::console()
+    CUR_CONSOLE.lock(|con| *con)
 }
diff --git a/07_timestamps/src/console/null_console.rs b/07_timestamps/src/console/null_console.rs
new file mode 100644
index 000000000..2c64d499c
--- /dev/null
+++ b/07_timestamps/src/console/null_console.rs
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Null console.
+
+use super::interface;
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct NullConsole;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+pub static NULL_CONSOLE: NullConsole = NullConsole {};
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl interface::Write for NullConsole {
+    fn write_char(&self, _c: char) {}
+
+    fn write_fmt(&self, _args: fmt::Arguments) -> fmt::Result {
+        fmt::Result::Ok(())
+    }
+
+    fn flush(&self) {}
+}
+
+impl interface::Read for NullConsole {
+    fn clear_rx(&self) {}
+}
+
+impl interface::Statistics for NullConsole {}
+impl interface::All for NullConsole {}
diff --git a/07_timestamps/src/driver.rs b/07_timestamps/src/driver.rs
index 2fcc75629..a798c86da 100644
--- a/07_timestamps/src/driver.rs
+++ b/07_timestamps/src/driver.rs
@@ -4,6 +4,22 @@
 
 //! Driver support.
 
+use crate::{
+    info,
+    synchronization::{interface::Mutex, NullLock},
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+const NUM_DRIVERS: usize = 5;
+
+struct DriverManagerInner {
+    next_index: usize,
+    descriptors: [Option<DeviceDriverDescriptor>; NUM_DRIVERS],
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -24,21 +40,128 @@ pub mod interface {
             Ok(())
         }
     }
+}
+
+/// Tpye to be used as an optional callback after a driver's init() has run.
+pub type DeviceDriverPostInitCallback = unsafe fn() -> Result<(), &'static str>;
+
+/// A descriptor for device drivers.
+#[derive(Copy, Clone)]
+pub struct DeviceDriverDescriptor {
+    device_driver: &'static (dyn interface::DeviceDriver + Sync),
+    post_init_callback: Option<DeviceDriverPostInitCallback>,
+}
+
+/// Provides device driver management functions.
+pub struct DriverManager {
+    inner: NullLock<DriverManagerInner>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static DRIVER_MANAGER: DriverManager = DriverManager::new();
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl DriverManagerInner {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self {
+            next_index: 0,
+            descriptors: [None; NUM_DRIVERS],
+        }
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl DeviceDriverDescriptor {
+    /// Create an instance.
+    pub fn new(
+        device_driver: &'static (dyn interface::DeviceDriver + Sync),
+        post_init_callback: Option<DeviceDriverPostInitCallback>,
+    ) -> Self {
+        Self {
+            device_driver,
+            post_init_callback,
+        }
+    }
+}
+
+/// Return a reference to the global DriverManager.
+pub fn driver_manager() -> &'static DriverManager {
+    &DRIVER_MANAGER
+}
+
+impl DriverManager {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self {
+            inner: NullLock::new(DriverManagerInner::new()),
+        }
+    }
 
-    /// Device driver management functions.
+    /// Register a device driver with the kernel.
+    pub fn register_driver(&self, descriptor: DeviceDriverDescriptor) {
+        self.inner.lock(|inner| {
+            inner.descriptors[inner.next_index] = Some(descriptor);
+            inner.next_index += 1;
+        })
+    }
+
+    /// Helper for iterating over registered drivers.
+    fn for_each_descriptor<'a>(&'a self, f: impl FnMut(&'a DeviceDriverDescriptor)) {
+        self.inner.lock(|inner| {
+            inner
+                .descriptors
+                .iter()
+                .filter_map(|x| x.as_ref())
+                .for_each(f)
+        })
+    }
+
+    /// Fully initialize all drivers.
     ///
-    /// The `BSP` is supposed to supply one global instance.
-    pub trait DriverManager {
-        /// Return a slice of references to all `BSP`-instantiated drivers.
-        ///
-        /// # Safety
-        ///
-        /// - The order of devices is the order in which `DeviceDriver::init()` is called.
-        fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
+    /// # Safety
+    ///
+    /// - During init, drivers might do stuff with system-wide impact.
+    pub unsafe fn init_drivers(&self) {
+        self.for_each_descriptor(|descriptor| {
+            // 1. Initialize driver.
+            if let Err(x) = descriptor.device_driver.init() {
+                panic!(
+                    "Error initializing driver: {}: {}",
+                    descriptor.device_driver.compatible(),
+                    x
+                );
+            }
 
-        /// Initialization code that runs after driver init.
-        ///
-        /// For example, device driver code that depends on other drivers already being online.
-        fn post_device_driver_init(&self);
+            // 2. Call corresponding post init callback.
+            if let Some(callback) = &descriptor.post_init_callback {
+                if let Err(x) = callback() {
+                    panic!(
+                        "Error during driver post-init callback: {}: {}",
+                        descriptor.device_driver.compatible(),
+                        x
+                    );
+                }
+            }
+        });
+    }
+
+    /// Enumerate all registered device drivers.
+    pub fn enumerate(&self) {
+        let mut i: usize = 1;
+        self.for_each_descriptor(|descriptor| {
+            info!("      {}. {}", i, descriptor.device_driver.compatible());
+
+            i += 1;
+        });
     }
 }
diff --git a/07_timestamps/src/main.rs b/07_timestamps/src/main.rs
index 90c39a37c..df863f324 100644
--- a/07_timestamps/src/main.rs
+++ b/07_timestamps/src/main.rs
@@ -133,14 +133,13 @@ mod time;
 /// - Only a single core must be active and running this function.
 /// - The init calls in this function must appear in the correct order.
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
-    for i in bsp::driver::driver_manager().all_device_drivers().iter() {
-        if let Err(x) = i.init() {
-            panic!("Error loading driver: {}: {}", i.compatible(), x);
-        }
+    // Initialize the BSP driver subsystem.
+    if let Err(x) = bsp::driver::init() {
+        panic!("Error initializing BSP driver subsystem: {}", x);
     }
-    bsp::driver::driver_manager().post_device_driver_init();
+
+    // Initialize all device drivers.
+    driver::driver_manager().init_drivers();
     // println! is usable from here on.
 
     // Transition from unsafe to safe.
@@ -150,7 +149,6 @@ unsafe fn kernel_init() -> ! {
 /// The main function running after the early init.
 fn kernel_main() -> ! {
     use core::time::Duration;
-    use driver::interface::DriverManager;
 
     info!(
         "{} version {}",
@@ -165,13 +163,7 @@ fn kernel_main() -> ! {
     );
 
     info!("Drivers loaded:");
-    for (i, driver) in bsp::driver::driver_manager()
-        .all_device_drivers()
-        .iter()
-        .enumerate()
-    {
-        info!("      {}. {}", i + 1, driver.compatible());
-    }
+    driver::driver_manager().enumerate();
 
     // Test a failing timer case.
     time::time_manager().spin_for(Duration::from_nanos(1));
diff --git a/08_hw_debug_JTAG/README.md b/08_hw_debug_JTAG/README.md
index 53f868072..69b6b82ef 100644
--- a/08_hw_debug_JTAG/README.md
+++ b/08_hw_debug_JTAG/README.md
@@ -401,4 +401,26 @@ diff -uNr 07_timestamps/Makefile 08_hw_debug_JTAG/Makefile
  ## Testing targets
  ##--------------------------------------------------------------------------------------------------
 
+diff -uNr 07_timestamps/src/bsp/raspberrypi/driver.rs 08_hw_debug_JTAG/src/bsp/raspberrypi/driver.rs
+--- 07_timestamps/src/bsp/raspberrypi/driver.rs
++++ 08_hw_debug_JTAG/src/bsp/raspberrypi/driver.rs
+@@ -57,17 +57,6 @@
+ /// # Safety
+ ///
+ /// See child function calls.
+-///
+-/// # Note
+-///
+-/// Using atomics here relieves us from needing to use `unsafe` for the static variable.
+-///
+-/// On `AArch64`, which is the only implemented architecture at the time of writing this,
+-/// [`AtomicBool::load`] and [`AtomicBool::store`] are lowered to ordinary load and store
+-/// instructions. They are therefore safe to use even with MMU + caching deactivated.
+-///
+-/// [`AtomicBool::load`]: core::sync::atomic::AtomicBool::load
+-/// [`AtomicBool::store`]: core::sync::atomic::AtomicBool::store
+ pub unsafe fn init() -> Result<(), &'static str> {
+     static INIT_DONE: AtomicBool = AtomicBool::new(false);
+     if INIT_DONE.load(Ordering::Relaxed) {
+
 ```
diff --git a/08_hw_debug_JTAG/src/bsp/raspberrypi.rs b/08_hw_debug_JTAG/src/bsp/raspberrypi.rs
index a9a7261af..fe9406779 100644
--- a/08_hw_debug_JTAG/src/bsp/raspberrypi.rs
+++ b/08_hw_debug_JTAG/src/bsp/raspberrypi.rs
@@ -4,7 +4,6 @@
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
-pub mod console;
 pub mod cpu;
 pub mod driver;
 pub mod memory;
diff --git a/08_hw_debug_JTAG/src/bsp/raspberrypi/console.rs b/08_hw_debug_JTAG/src/bsp/raspberrypi/console.rs
deleted file mode 100644
index 0a630eef4..000000000
--- a/08_hw_debug_JTAG/src/bsp/raspberrypi/console.rs
+++ /dev/null
@@ -1,16 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
-
-//! BSP console facilities.
-
-use crate::console;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return a reference to the console.
-pub fn console() -> &'static dyn console::interface::All {
-    &super::driver::PL011_UART
-}
diff --git a/08_hw_debug_JTAG/src/bsp/raspberrypi/driver.rs b/08_hw_debug_JTAG/src/bsp/raspberrypi/driver.rs
index 8b683ed8b..ea8430660 100644
--- a/08_hw_debug_JTAG/src/bsp/raspberrypi/driver.rs
+++ b/08_hw_debug_JTAG/src/bsp/raspberrypi/driver.rs
@@ -5,51 +5,67 @@
 //! BSP driver support.
 
 use super::memory::map::mmio;
-use crate::{bsp::device_driver, driver};
+use crate::{bsp::device_driver, console, driver as generic_driver};
+use core::sync::atomic::{AtomicBool, Ordering};
 
 //--------------------------------------------------------------------------------------------------
-// Private Definitions
+// Global instances
 //--------------------------------------------------------------------------------------------------
 
-/// Device Driver Manager type.
-struct BSPDriverManager {
-    device_drivers: [&'static (dyn DeviceDriver + Sync); 2],
-}
+static PL011_UART: device_driver::PL011Uart =
+    unsafe { device_driver::PL011Uart::new(mmio::PL011_UART_START) };
+static GPIO: device_driver::GPIO = unsafe { device_driver::GPIO::new(mmio::GPIO_START) };
 
 //--------------------------------------------------------------------------------------------------
-// Global instances
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
-pub(super) static PL011_UART: device_driver::PL011Uart =
-    unsafe { device_driver::PL011Uart::new(mmio::PL011_UART_START) };
+/// This must be called only after successful init of the UART driver.
+fn post_init_uart() -> Result<(), &'static str> {
+    console::register_console(&PL011_UART);
 
-static GPIO: device_driver::GPIO = unsafe { device_driver::GPIO::new(mmio::GPIO_START) };
+    Ok(())
+}
 
-static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
-    device_drivers: [&PL011_UART, &GPIO],
-};
+/// This must be called only after successful init of the GPIO driver.
+fn post_init_gpio() -> Result<(), &'static str> {
+    GPIO.map_pl011_uart();
+    Ok(())
+}
 
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
+fn driver_uart() -> Result<(), &'static str> {
+    let uart_descriptor =
+        generic_driver::DeviceDriverDescriptor::new(&PL011_UART, Some(post_init_uart));
+    generic_driver::driver_manager().register_driver(uart_descriptor);
 
-/// Return a reference to the driver manager.
-pub fn driver_manager() -> &'static impl driver::interface::DriverManager {
-    &BSP_DRIVER_MANAGER
+    Ok(())
 }
 
-//------------------------------------------------------------------------------
-// OS Interface Code
-//------------------------------------------------------------------------------
-use driver::interface::DeviceDriver;
+fn driver_gpio() -> Result<(), &'static str> {
+    let gpio_descriptor = generic_driver::DeviceDriverDescriptor::new(&GPIO, Some(post_init_gpio));
+    generic_driver::driver_manager().register_driver(gpio_descriptor);
 
-impl driver::interface::DriverManager for BSPDriverManager {
-    fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
-        &self.device_drivers[..]
-    }
+    Ok(())
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
 
-    fn post_device_driver_init(&self) {
-        // Configure PL011Uart's output pins.
-        GPIO.map_pl011_uart();
+/// Initialize the driver subsystem.
+///
+/// # Safety
+///
+/// See child function calls.
+pub unsafe fn init() -> Result<(), &'static str> {
+    static INIT_DONE: AtomicBool = AtomicBool::new(false);
+    if INIT_DONE.load(Ordering::Relaxed) {
+        return Err("Init already done");
     }
+
+    driver_uart()?;
+    driver_gpio()?;
+
+    INIT_DONE.store(true, Ordering::Relaxed);
+    Ok(())
 }
diff --git a/08_hw_debug_JTAG/src/console.rs b/08_hw_debug_JTAG/src/console.rs
index c1fb0e53b..02b43df9f 100644
--- a/08_hw_debug_JTAG/src/console.rs
+++ b/08_hw_debug_JTAG/src/console.rs
@@ -4,7 +4,9 @@
 
 //! System console.
 
-use crate::bsp;
+mod null_console;
+
+use crate::synchronization::{self, NullLock};
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -54,13 +56,26 @@ pub mod interface {
     pub trait All: Write + Read + Statistics {}
 }
 
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static CUR_CONSOLE: NullLock<&'static (dyn interface::All + Sync)> =
+    NullLock::new(&null_console::NULL_CONSOLE);
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
+use synchronization::interface::Mutex;
+
+/// Register a new console.
+pub fn register_console(new_console: &'static (dyn interface::All + Sync)) {
+    CUR_CONSOLE.lock(|con| *con = new_console);
+}
 
-/// Return a reference to the console.
+/// Return a reference to the currently registered console.
 ///
 /// This is the global console used by all printing macros.
 pub fn console() -> &'static dyn interface::All {
-    bsp::console::console()
+    CUR_CONSOLE.lock(|con| *con)
 }
diff --git a/08_hw_debug_JTAG/src/console/null_console.rs b/08_hw_debug_JTAG/src/console/null_console.rs
new file mode 100644
index 000000000..2c64d499c
--- /dev/null
+++ b/08_hw_debug_JTAG/src/console/null_console.rs
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Null console.
+
+use super::interface;
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct NullConsole;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+pub static NULL_CONSOLE: NullConsole = NullConsole {};
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl interface::Write for NullConsole {
+    fn write_char(&self, _c: char) {}
+
+    fn write_fmt(&self, _args: fmt::Arguments) -> fmt::Result {
+        fmt::Result::Ok(())
+    }
+
+    fn flush(&self) {}
+}
+
+impl interface::Read for NullConsole {
+    fn clear_rx(&self) {}
+}
+
+impl interface::Statistics for NullConsole {}
+impl interface::All for NullConsole {}
diff --git a/08_hw_debug_JTAG/src/driver.rs b/08_hw_debug_JTAG/src/driver.rs
index 2fcc75629..a798c86da 100644
--- a/08_hw_debug_JTAG/src/driver.rs
+++ b/08_hw_debug_JTAG/src/driver.rs
@@ -4,6 +4,22 @@
 
 //! Driver support.
 
+use crate::{
+    info,
+    synchronization::{interface::Mutex, NullLock},
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+const NUM_DRIVERS: usize = 5;
+
+struct DriverManagerInner {
+    next_index: usize,
+    descriptors: [Option<DeviceDriverDescriptor>; NUM_DRIVERS],
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -24,21 +40,128 @@ pub mod interface {
             Ok(())
         }
     }
+}
+
+/// Tpye to be used as an optional callback after a driver's init() has run.
+pub type DeviceDriverPostInitCallback = unsafe fn() -> Result<(), &'static str>;
+
+/// A descriptor for device drivers.
+#[derive(Copy, Clone)]
+pub struct DeviceDriverDescriptor {
+    device_driver: &'static (dyn interface::DeviceDriver + Sync),
+    post_init_callback: Option<DeviceDriverPostInitCallback>,
+}
+
+/// Provides device driver management functions.
+pub struct DriverManager {
+    inner: NullLock<DriverManagerInner>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static DRIVER_MANAGER: DriverManager = DriverManager::new();
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl DriverManagerInner {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self {
+            next_index: 0,
+            descriptors: [None; NUM_DRIVERS],
+        }
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl DeviceDriverDescriptor {
+    /// Create an instance.
+    pub fn new(
+        device_driver: &'static (dyn interface::DeviceDriver + Sync),
+        post_init_callback: Option<DeviceDriverPostInitCallback>,
+    ) -> Self {
+        Self {
+            device_driver,
+            post_init_callback,
+        }
+    }
+}
+
+/// Return a reference to the global DriverManager.
+pub fn driver_manager() -> &'static DriverManager {
+    &DRIVER_MANAGER
+}
+
+impl DriverManager {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self {
+            inner: NullLock::new(DriverManagerInner::new()),
+        }
+    }
 
-    /// Device driver management functions.
+    /// Register a device driver with the kernel.
+    pub fn register_driver(&self, descriptor: DeviceDriverDescriptor) {
+        self.inner.lock(|inner| {
+            inner.descriptors[inner.next_index] = Some(descriptor);
+            inner.next_index += 1;
+        })
+    }
+
+    /// Helper for iterating over registered drivers.
+    fn for_each_descriptor<'a>(&'a self, f: impl FnMut(&'a DeviceDriverDescriptor)) {
+        self.inner.lock(|inner| {
+            inner
+                .descriptors
+                .iter()
+                .filter_map(|x| x.as_ref())
+                .for_each(f)
+        })
+    }
+
+    /// Fully initialize all drivers.
     ///
-    /// The `BSP` is supposed to supply one global instance.
-    pub trait DriverManager {
-        /// Return a slice of references to all `BSP`-instantiated drivers.
-        ///
-        /// # Safety
-        ///
-        /// - The order of devices is the order in which `DeviceDriver::init()` is called.
-        fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
+    /// # Safety
+    ///
+    /// - During init, drivers might do stuff with system-wide impact.
+    pub unsafe fn init_drivers(&self) {
+        self.for_each_descriptor(|descriptor| {
+            // 1. Initialize driver.
+            if let Err(x) = descriptor.device_driver.init() {
+                panic!(
+                    "Error initializing driver: {}: {}",
+                    descriptor.device_driver.compatible(),
+                    x
+                );
+            }
 
-        /// Initialization code that runs after driver init.
-        ///
-        /// For example, device driver code that depends on other drivers already being online.
-        fn post_device_driver_init(&self);
+            // 2. Call corresponding post init callback.
+            if let Some(callback) = &descriptor.post_init_callback {
+                if let Err(x) = callback() {
+                    panic!(
+                        "Error during driver post-init callback: {}: {}",
+                        descriptor.device_driver.compatible(),
+                        x
+                    );
+                }
+            }
+        });
+    }
+
+    /// Enumerate all registered device drivers.
+    pub fn enumerate(&self) {
+        let mut i: usize = 1;
+        self.for_each_descriptor(|descriptor| {
+            info!("      {}. {}", i, descriptor.device_driver.compatible());
+
+            i += 1;
+        });
     }
 }
diff --git a/08_hw_debug_JTAG/src/main.rs b/08_hw_debug_JTAG/src/main.rs
index 90c39a37c..df863f324 100644
--- a/08_hw_debug_JTAG/src/main.rs
+++ b/08_hw_debug_JTAG/src/main.rs
@@ -133,14 +133,13 @@ mod time;
 /// - Only a single core must be active and running this function.
 /// - The init calls in this function must appear in the correct order.
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
-    for i in bsp::driver::driver_manager().all_device_drivers().iter() {
-        if let Err(x) = i.init() {
-            panic!("Error loading driver: {}: {}", i.compatible(), x);
-        }
+    // Initialize the BSP driver subsystem.
+    if let Err(x) = bsp::driver::init() {
+        panic!("Error initializing BSP driver subsystem: {}", x);
     }
-    bsp::driver::driver_manager().post_device_driver_init();
+
+    // Initialize all device drivers.
+    driver::driver_manager().init_drivers();
     // println! is usable from here on.
 
     // Transition from unsafe to safe.
@@ -150,7 +149,6 @@ unsafe fn kernel_init() -> ! {
 /// The main function running after the early init.
 fn kernel_main() -> ! {
     use core::time::Duration;
-    use driver::interface::DriverManager;
 
     info!(
         "{} version {}",
@@ -165,13 +163,7 @@ fn kernel_main() -> ! {
     );
 
     info!("Drivers loaded:");
-    for (i, driver) in bsp::driver::driver_manager()
-        .all_device_drivers()
-        .iter()
-        .enumerate()
-    {
-        info!("      {}. {}", i + 1, driver.compatible());
-    }
+    driver::driver_manager().enumerate();
 
     // Test a failing timer case.
     time::time_manager().spin_for(Duration::from_nanos(1));
diff --git a/09_privilege_level/README.md b/09_privilege_level/README.md
index 7f7c58d18..5710fdb8d 100644
--- a/09_privilege_level/README.md
+++ b/09_privilege_level/README.md
@@ -519,15 +519,15 @@ diff -uNr 08_hw_debug_JTAG/src/main.rs 09_privilege_level/src/main.rs
  mod panic_wait;
  mod print;
  mod synchronization;
-@@ -149,6 +150,7 @@
+@@ -148,6 +149,7 @@
 
  /// The main function running after the early init.
  fn kernel_main() -> ! {
 +    use console::console;
      use core::time::Duration;
-     use driver::interface::DriverManager;
 
-@@ -159,6 +161,12 @@
+     info!(
+@@ -157,6 +159,12 @@
      );
      info!("Booting on: {}", bsp::board_name());
 
@@ -540,9 +540,9 @@ diff -uNr 08_hw_debug_JTAG/src/main.rs 09_privilege_level/src/main.rs
      info!(
          "Architectural timer resolution: {} ns",
          time::time_manager().resolution().as_nanos()
-@@ -173,11 +181,15 @@
-         info!("      {}. {}", i + 1, driver.compatible());
-     }
+@@ -165,11 +173,15 @@
+     info!("Drivers loaded:");
+     driver::driver_manager().enumerate();
 
 -    // Test a failing timer case.
 -    time::time_manager().spin_for(Duration::from_nanos(1));
diff --git a/09_privilege_level/src/bsp/raspberrypi.rs b/09_privilege_level/src/bsp/raspberrypi.rs
index a9a7261af..fe9406779 100644
--- a/09_privilege_level/src/bsp/raspberrypi.rs
+++ b/09_privilege_level/src/bsp/raspberrypi.rs
@@ -4,7 +4,6 @@
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
-pub mod console;
 pub mod cpu;
 pub mod driver;
 pub mod memory;
diff --git a/09_privilege_level/src/bsp/raspberrypi/console.rs b/09_privilege_level/src/bsp/raspberrypi/console.rs
deleted file mode 100644
index 0a630eef4..000000000
--- a/09_privilege_level/src/bsp/raspberrypi/console.rs
+++ /dev/null
@@ -1,16 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
-
-//! BSP console facilities.
-
-use crate::console;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return a reference to the console.
-pub fn console() -> &'static dyn console::interface::All {
-    &super::driver::PL011_UART
-}
diff --git a/09_privilege_level/src/bsp/raspberrypi/driver.rs b/09_privilege_level/src/bsp/raspberrypi/driver.rs
index 8b683ed8b..ea8430660 100644
--- a/09_privilege_level/src/bsp/raspberrypi/driver.rs
+++ b/09_privilege_level/src/bsp/raspberrypi/driver.rs
@@ -5,51 +5,67 @@
 //! BSP driver support.
 
 use super::memory::map::mmio;
-use crate::{bsp::device_driver, driver};
+use crate::{bsp::device_driver, console, driver as generic_driver};
+use core::sync::atomic::{AtomicBool, Ordering};
 
 //--------------------------------------------------------------------------------------------------
-// Private Definitions
+// Global instances
 //--------------------------------------------------------------------------------------------------
 
-/// Device Driver Manager type.
-struct BSPDriverManager {
-    device_drivers: [&'static (dyn DeviceDriver + Sync); 2],
-}
+static PL011_UART: device_driver::PL011Uart =
+    unsafe { device_driver::PL011Uart::new(mmio::PL011_UART_START) };
+static GPIO: device_driver::GPIO = unsafe { device_driver::GPIO::new(mmio::GPIO_START) };
 
 //--------------------------------------------------------------------------------------------------
-// Global instances
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
-pub(super) static PL011_UART: device_driver::PL011Uart =
-    unsafe { device_driver::PL011Uart::new(mmio::PL011_UART_START) };
+/// This must be called only after successful init of the UART driver.
+fn post_init_uart() -> Result<(), &'static str> {
+    console::register_console(&PL011_UART);
 
-static GPIO: device_driver::GPIO = unsafe { device_driver::GPIO::new(mmio::GPIO_START) };
+    Ok(())
+}
 
-static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
-    device_drivers: [&PL011_UART, &GPIO],
-};
+/// This must be called only after successful init of the GPIO driver.
+fn post_init_gpio() -> Result<(), &'static str> {
+    GPIO.map_pl011_uart();
+    Ok(())
+}
 
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
+fn driver_uart() -> Result<(), &'static str> {
+    let uart_descriptor =
+        generic_driver::DeviceDriverDescriptor::new(&PL011_UART, Some(post_init_uart));
+    generic_driver::driver_manager().register_driver(uart_descriptor);
 
-/// Return a reference to the driver manager.
-pub fn driver_manager() -> &'static impl driver::interface::DriverManager {
-    &BSP_DRIVER_MANAGER
+    Ok(())
 }
 
-//------------------------------------------------------------------------------
-// OS Interface Code
-//------------------------------------------------------------------------------
-use driver::interface::DeviceDriver;
+fn driver_gpio() -> Result<(), &'static str> {
+    let gpio_descriptor = generic_driver::DeviceDriverDescriptor::new(&GPIO, Some(post_init_gpio));
+    generic_driver::driver_manager().register_driver(gpio_descriptor);
 
-impl driver::interface::DriverManager for BSPDriverManager {
-    fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
-        &self.device_drivers[..]
-    }
+    Ok(())
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
 
-    fn post_device_driver_init(&self) {
-        // Configure PL011Uart's output pins.
-        GPIO.map_pl011_uart();
+/// Initialize the driver subsystem.
+///
+/// # Safety
+///
+/// See child function calls.
+pub unsafe fn init() -> Result<(), &'static str> {
+    static INIT_DONE: AtomicBool = AtomicBool::new(false);
+    if INIT_DONE.load(Ordering::Relaxed) {
+        return Err("Init already done");
     }
+
+    driver_uart()?;
+    driver_gpio()?;
+
+    INIT_DONE.store(true, Ordering::Relaxed);
+    Ok(())
 }
diff --git a/09_privilege_level/src/console.rs b/09_privilege_level/src/console.rs
index c1fb0e53b..02b43df9f 100644
--- a/09_privilege_level/src/console.rs
+++ b/09_privilege_level/src/console.rs
@@ -4,7 +4,9 @@
 
 //! System console.
 
-use crate::bsp;
+mod null_console;
+
+use crate::synchronization::{self, NullLock};
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -54,13 +56,26 @@ pub mod interface {
     pub trait All: Write + Read + Statistics {}
 }
 
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static CUR_CONSOLE: NullLock<&'static (dyn interface::All + Sync)> =
+    NullLock::new(&null_console::NULL_CONSOLE);
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
+use synchronization::interface::Mutex;
+
+/// Register a new console.
+pub fn register_console(new_console: &'static (dyn interface::All + Sync)) {
+    CUR_CONSOLE.lock(|con| *con = new_console);
+}
 
-/// Return a reference to the console.
+/// Return a reference to the currently registered console.
 ///
 /// This is the global console used by all printing macros.
 pub fn console() -> &'static dyn interface::All {
-    bsp::console::console()
+    CUR_CONSOLE.lock(|con| *con)
 }
diff --git a/09_privilege_level/src/console/null_console.rs b/09_privilege_level/src/console/null_console.rs
new file mode 100644
index 000000000..2c64d499c
--- /dev/null
+++ b/09_privilege_level/src/console/null_console.rs
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Null console.
+
+use super::interface;
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct NullConsole;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+pub static NULL_CONSOLE: NullConsole = NullConsole {};
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl interface::Write for NullConsole {
+    fn write_char(&self, _c: char) {}
+
+    fn write_fmt(&self, _args: fmt::Arguments) -> fmt::Result {
+        fmt::Result::Ok(())
+    }
+
+    fn flush(&self) {}
+}
+
+impl interface::Read for NullConsole {
+    fn clear_rx(&self) {}
+}
+
+impl interface::Statistics for NullConsole {}
+impl interface::All for NullConsole {}
diff --git a/09_privilege_level/src/driver.rs b/09_privilege_level/src/driver.rs
index 2fcc75629..a798c86da 100644
--- a/09_privilege_level/src/driver.rs
+++ b/09_privilege_level/src/driver.rs
@@ -4,6 +4,22 @@
 
 //! Driver support.
 
+use crate::{
+    info,
+    synchronization::{interface::Mutex, NullLock},
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+const NUM_DRIVERS: usize = 5;
+
+struct DriverManagerInner {
+    next_index: usize,
+    descriptors: [Option<DeviceDriverDescriptor>; NUM_DRIVERS],
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -24,21 +40,128 @@ pub mod interface {
             Ok(())
         }
     }
+}
+
+/// Tpye to be used as an optional callback after a driver's init() has run.
+pub type DeviceDriverPostInitCallback = unsafe fn() -> Result<(), &'static str>;
+
+/// A descriptor for device drivers.
+#[derive(Copy, Clone)]
+pub struct DeviceDriverDescriptor {
+    device_driver: &'static (dyn interface::DeviceDriver + Sync),
+    post_init_callback: Option<DeviceDriverPostInitCallback>,
+}
+
+/// Provides device driver management functions.
+pub struct DriverManager {
+    inner: NullLock<DriverManagerInner>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static DRIVER_MANAGER: DriverManager = DriverManager::new();
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl DriverManagerInner {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self {
+            next_index: 0,
+            descriptors: [None; NUM_DRIVERS],
+        }
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl DeviceDriverDescriptor {
+    /// Create an instance.
+    pub fn new(
+        device_driver: &'static (dyn interface::DeviceDriver + Sync),
+        post_init_callback: Option<DeviceDriverPostInitCallback>,
+    ) -> Self {
+        Self {
+            device_driver,
+            post_init_callback,
+        }
+    }
+}
+
+/// Return a reference to the global DriverManager.
+pub fn driver_manager() -> &'static DriverManager {
+    &DRIVER_MANAGER
+}
+
+impl DriverManager {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self {
+            inner: NullLock::new(DriverManagerInner::new()),
+        }
+    }
 
-    /// Device driver management functions.
+    /// Register a device driver with the kernel.
+    pub fn register_driver(&self, descriptor: DeviceDriverDescriptor) {
+        self.inner.lock(|inner| {
+            inner.descriptors[inner.next_index] = Some(descriptor);
+            inner.next_index += 1;
+        })
+    }
+
+    /// Helper for iterating over registered drivers.
+    fn for_each_descriptor<'a>(&'a self, f: impl FnMut(&'a DeviceDriverDescriptor)) {
+        self.inner.lock(|inner| {
+            inner
+                .descriptors
+                .iter()
+                .filter_map(|x| x.as_ref())
+                .for_each(f)
+        })
+    }
+
+    /// Fully initialize all drivers.
     ///
-    /// The `BSP` is supposed to supply one global instance.
-    pub trait DriverManager {
-        /// Return a slice of references to all `BSP`-instantiated drivers.
-        ///
-        /// # Safety
-        ///
-        /// - The order of devices is the order in which `DeviceDriver::init()` is called.
-        fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
+    /// # Safety
+    ///
+    /// - During init, drivers might do stuff with system-wide impact.
+    pub unsafe fn init_drivers(&self) {
+        self.for_each_descriptor(|descriptor| {
+            // 1. Initialize driver.
+            if let Err(x) = descriptor.device_driver.init() {
+                panic!(
+                    "Error initializing driver: {}: {}",
+                    descriptor.device_driver.compatible(),
+                    x
+                );
+            }
 
-        /// Initialization code that runs after driver init.
-        ///
-        /// For example, device driver code that depends on other drivers already being online.
-        fn post_device_driver_init(&self);
+            // 2. Call corresponding post init callback.
+            if let Some(callback) = &descriptor.post_init_callback {
+                if let Err(x) = callback() {
+                    panic!(
+                        "Error during driver post-init callback: {}: {}",
+                        descriptor.device_driver.compatible(),
+                        x
+                    );
+                }
+            }
+        });
+    }
+
+    /// Enumerate all registered device drivers.
+    pub fn enumerate(&self) {
+        let mut i: usize = 1;
+        self.for_each_descriptor(|descriptor| {
+            info!("      {}. {}", i, descriptor.device_driver.compatible());
+
+            i += 1;
+        });
     }
 }
diff --git a/09_privilege_level/src/main.rs b/09_privilege_level/src/main.rs
index 79a6716e4..c60aee8e1 100644
--- a/09_privilege_level/src/main.rs
+++ b/09_privilege_level/src/main.rs
@@ -134,14 +134,13 @@ mod time;
 /// - Only a single core must be active and running this function.
 /// - The init calls in this function must appear in the correct order.
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
-    for i in bsp::driver::driver_manager().all_device_drivers().iter() {
-        if let Err(x) = i.init() {
-            panic!("Error loading driver: {}: {}", i.compatible(), x);
-        }
+    // Initialize the BSP driver subsystem.
+    if let Err(x) = bsp::driver::init() {
+        panic!("Error initializing BSP driver subsystem: {}", x);
     }
-    bsp::driver::driver_manager().post_device_driver_init();
+
+    // Initialize all device drivers.
+    driver::driver_manager().init_drivers();
     // println! is usable from here on.
 
     // Transition from unsafe to safe.
@@ -152,7 +151,6 @@ unsafe fn kernel_init() -> ! {
 fn kernel_main() -> ! {
     use console::console;
     use core::time::Duration;
-    use driver::interface::DriverManager;
 
     info!(
         "{} version {}",
@@ -173,13 +171,7 @@ fn kernel_main() -> ! {
     );
 
     info!("Drivers loaded:");
-    for (i, driver) in bsp::driver::driver_manager()
-        .all_device_drivers()
-        .iter()
-        .enumerate()
-    {
-        info!("      {}. {}", i + 1, driver.compatible());
-    }
+    driver::driver_manager().enumerate();
 
     info!("Timer test, spinning for 1 second");
     time::time_manager().spin_for(Duration::from_secs(1));
diff --git a/10_virtual_mem_part1_identity_mapping/README.md b/10_virtual_mem_part1_identity_mapping/README.md
index f1d22d98f..946500dc5 100644
--- a/10_virtual_mem_part1_identity_mapping/README.md
+++ b/10_virtual_mem_part1_identity_mapping/README.md
@@ -296,7 +296,6 @@ Turning on virtual memory is now the first thing we do during kernel init:
 
 ```rust
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
     use memory::mmu::interface::MMU;
 
     if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
@@ -1135,7 +1134,7 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
  mod panic_wait;
  mod print;
  mod synchronization;
-@@ -132,9 +137,17 @@
+@@ -132,8 +137,17 @@
  /// # Safety
  ///
  /// - Only a single core must be active and running this function.
@@ -1145,25 +1144,25 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
 +///       e.g. the yet-to-be-introduced spinlocks in the device drivers (which currently employ
 +///       NullLocks instead of spinlocks), will fail to work (properly) on the RPi SoCs.
  unsafe fn kernel_init() -> ! {
-     use driver::interface::DriverManager;
 +    use memory::mmu::interface::MMU;
 +
 +    if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
 +        panic!("MMU: {}", string);
 +    }
-
-     for i in bsp::driver::driver_manager().all_device_drivers().iter() {
-         if let Err(x) = i.init() {
-@@ -150,7 +163,7 @@
++
+     // Initialize the BSP driver subsystem.
+     if let Err(x) = bsp::driver::init() {
+         panic!("Error initializing BSP driver subsystem: {}", x);
+@@ -149,7 +163,7 @@
 
  /// The main function running after the early init.
  fn kernel_main() -> ! {
 -    use console::console;
 +    use console::{console, interface::Write};
      use core::time::Duration;
-     use driver::interface::DriverManager;
 
-@@ -161,6 +174,9 @@
+     info!(
+@@ -159,6 +173,9 @@
      );
      info!("Booting on: {}", bsp::board_name());
 
@@ -1173,7 +1172,7 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
      let (_, privilege_level) = exception::current_privilege_level();
      info!("Current privilege level: {}", privilege_level);
 
-@@ -184,6 +200,13 @@
+@@ -176,6 +193,13 @@
      info!("Timer test, spinning for 1 second");
      time::time_manager().spin_for(Duration::from_secs(1));
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi.rs
index a9a7261af..fe9406779 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi.rs
@@ -4,7 +4,6 @@
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
-pub mod console;
 pub mod cpu;
 pub mod driver;
 pub mod memory;
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/console.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/console.rs
deleted file mode 100644
index 0a630eef4..000000000
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/console.rs
+++ /dev/null
@@ -1,16 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
-
-//! BSP console facilities.
-
-use crate::console;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return a reference to the console.
-pub fn console() -> &'static dyn console::interface::All {
-    &super::driver::PL011_UART
-}
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/driver.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/driver.rs
index 8b683ed8b..ea8430660 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/driver.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/driver.rs
@@ -5,51 +5,67 @@
 //! BSP driver support.
 
 use super::memory::map::mmio;
-use crate::{bsp::device_driver, driver};
+use crate::{bsp::device_driver, console, driver as generic_driver};
+use core::sync::atomic::{AtomicBool, Ordering};
 
 //--------------------------------------------------------------------------------------------------
-// Private Definitions
+// Global instances
 //--------------------------------------------------------------------------------------------------
 
-/// Device Driver Manager type.
-struct BSPDriverManager {
-    device_drivers: [&'static (dyn DeviceDriver + Sync); 2],
-}
+static PL011_UART: device_driver::PL011Uart =
+    unsafe { device_driver::PL011Uart::new(mmio::PL011_UART_START) };
+static GPIO: device_driver::GPIO = unsafe { device_driver::GPIO::new(mmio::GPIO_START) };
 
 //--------------------------------------------------------------------------------------------------
-// Global instances
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
-pub(super) static PL011_UART: device_driver::PL011Uart =
-    unsafe { device_driver::PL011Uart::new(mmio::PL011_UART_START) };
+/// This must be called only after successful init of the UART driver.
+fn post_init_uart() -> Result<(), &'static str> {
+    console::register_console(&PL011_UART);
 
-static GPIO: device_driver::GPIO = unsafe { device_driver::GPIO::new(mmio::GPIO_START) };
+    Ok(())
+}
 
-static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
-    device_drivers: [&PL011_UART, &GPIO],
-};
+/// This must be called only after successful init of the GPIO driver.
+fn post_init_gpio() -> Result<(), &'static str> {
+    GPIO.map_pl011_uart();
+    Ok(())
+}
 
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
+fn driver_uart() -> Result<(), &'static str> {
+    let uart_descriptor =
+        generic_driver::DeviceDriverDescriptor::new(&PL011_UART, Some(post_init_uart));
+    generic_driver::driver_manager().register_driver(uart_descriptor);
 
-/// Return a reference to the driver manager.
-pub fn driver_manager() -> &'static impl driver::interface::DriverManager {
-    &BSP_DRIVER_MANAGER
+    Ok(())
 }
 
-//------------------------------------------------------------------------------
-// OS Interface Code
-//------------------------------------------------------------------------------
-use driver::interface::DeviceDriver;
+fn driver_gpio() -> Result<(), &'static str> {
+    let gpio_descriptor = generic_driver::DeviceDriverDescriptor::new(&GPIO, Some(post_init_gpio));
+    generic_driver::driver_manager().register_driver(gpio_descriptor);
 
-impl driver::interface::DriverManager for BSPDriverManager {
-    fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
-        &self.device_drivers[..]
-    }
+    Ok(())
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
 
-    fn post_device_driver_init(&self) {
-        // Configure PL011Uart's output pins.
-        GPIO.map_pl011_uart();
+/// Initialize the driver subsystem.
+///
+/// # Safety
+///
+/// See child function calls.
+pub unsafe fn init() -> Result<(), &'static str> {
+    static INIT_DONE: AtomicBool = AtomicBool::new(false);
+    if INIT_DONE.load(Ordering::Relaxed) {
+        return Err("Init already done");
     }
+
+    driver_uart()?;
+    driver_gpio()?;
+
+    INIT_DONE.store(true, Ordering::Relaxed);
+    Ok(())
 }
diff --git a/10_virtual_mem_part1_identity_mapping/src/console.rs b/10_virtual_mem_part1_identity_mapping/src/console.rs
index c1fb0e53b..02b43df9f 100644
--- a/10_virtual_mem_part1_identity_mapping/src/console.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/console.rs
@@ -4,7 +4,9 @@
 
 //! System console.
 
-use crate::bsp;
+mod null_console;
+
+use crate::synchronization::{self, NullLock};
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -54,13 +56,26 @@ pub mod interface {
     pub trait All: Write + Read + Statistics {}
 }
 
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static CUR_CONSOLE: NullLock<&'static (dyn interface::All + Sync)> =
+    NullLock::new(&null_console::NULL_CONSOLE);
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
+use synchronization::interface::Mutex;
+
+/// Register a new console.
+pub fn register_console(new_console: &'static (dyn interface::All + Sync)) {
+    CUR_CONSOLE.lock(|con| *con = new_console);
+}
 
-/// Return a reference to the console.
+/// Return a reference to the currently registered console.
 ///
 /// This is the global console used by all printing macros.
 pub fn console() -> &'static dyn interface::All {
-    bsp::console::console()
+    CUR_CONSOLE.lock(|con| *con)
 }
diff --git a/10_virtual_mem_part1_identity_mapping/src/console/null_console.rs b/10_virtual_mem_part1_identity_mapping/src/console/null_console.rs
new file mode 100644
index 000000000..2c64d499c
--- /dev/null
+++ b/10_virtual_mem_part1_identity_mapping/src/console/null_console.rs
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Null console.
+
+use super::interface;
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct NullConsole;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+pub static NULL_CONSOLE: NullConsole = NullConsole {};
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl interface::Write for NullConsole {
+    fn write_char(&self, _c: char) {}
+
+    fn write_fmt(&self, _args: fmt::Arguments) -> fmt::Result {
+        fmt::Result::Ok(())
+    }
+
+    fn flush(&self) {}
+}
+
+impl interface::Read for NullConsole {
+    fn clear_rx(&self) {}
+}
+
+impl interface::Statistics for NullConsole {}
+impl interface::All for NullConsole {}
diff --git a/10_virtual_mem_part1_identity_mapping/src/driver.rs b/10_virtual_mem_part1_identity_mapping/src/driver.rs
index 2fcc75629..a798c86da 100644
--- a/10_virtual_mem_part1_identity_mapping/src/driver.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/driver.rs
@@ -4,6 +4,22 @@
 
 //! Driver support.
 
+use crate::{
+    info,
+    synchronization::{interface::Mutex, NullLock},
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+const NUM_DRIVERS: usize = 5;
+
+struct DriverManagerInner {
+    next_index: usize,
+    descriptors: [Option<DeviceDriverDescriptor>; NUM_DRIVERS],
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -24,21 +40,128 @@ pub mod interface {
             Ok(())
         }
     }
+}
+
+/// Tpye to be used as an optional callback after a driver's init() has run.
+pub type DeviceDriverPostInitCallback = unsafe fn() -> Result<(), &'static str>;
+
+/// A descriptor for device drivers.
+#[derive(Copy, Clone)]
+pub struct DeviceDriverDescriptor {
+    device_driver: &'static (dyn interface::DeviceDriver + Sync),
+    post_init_callback: Option<DeviceDriverPostInitCallback>,
+}
+
+/// Provides device driver management functions.
+pub struct DriverManager {
+    inner: NullLock<DriverManagerInner>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static DRIVER_MANAGER: DriverManager = DriverManager::new();
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl DriverManagerInner {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self {
+            next_index: 0,
+            descriptors: [None; NUM_DRIVERS],
+        }
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl DeviceDriverDescriptor {
+    /// Create an instance.
+    pub fn new(
+        device_driver: &'static (dyn interface::DeviceDriver + Sync),
+        post_init_callback: Option<DeviceDriverPostInitCallback>,
+    ) -> Self {
+        Self {
+            device_driver,
+            post_init_callback,
+        }
+    }
+}
+
+/// Return a reference to the global DriverManager.
+pub fn driver_manager() -> &'static DriverManager {
+    &DRIVER_MANAGER
+}
+
+impl DriverManager {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self {
+            inner: NullLock::new(DriverManagerInner::new()),
+        }
+    }
 
-    /// Device driver management functions.
+    /// Register a device driver with the kernel.
+    pub fn register_driver(&self, descriptor: DeviceDriverDescriptor) {
+        self.inner.lock(|inner| {
+            inner.descriptors[inner.next_index] = Some(descriptor);
+            inner.next_index += 1;
+        })
+    }
+
+    /// Helper for iterating over registered drivers.
+    fn for_each_descriptor<'a>(&'a self, f: impl FnMut(&'a DeviceDriverDescriptor)) {
+        self.inner.lock(|inner| {
+            inner
+                .descriptors
+                .iter()
+                .filter_map(|x| x.as_ref())
+                .for_each(f)
+        })
+    }
+
+    /// Fully initialize all drivers.
     ///
-    /// The `BSP` is supposed to supply one global instance.
-    pub trait DriverManager {
-        /// Return a slice of references to all `BSP`-instantiated drivers.
-        ///
-        /// # Safety
-        ///
-        /// - The order of devices is the order in which `DeviceDriver::init()` is called.
-        fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
+    /// # Safety
+    ///
+    /// - During init, drivers might do stuff with system-wide impact.
+    pub unsafe fn init_drivers(&self) {
+        self.for_each_descriptor(|descriptor| {
+            // 1. Initialize driver.
+            if let Err(x) = descriptor.device_driver.init() {
+                panic!(
+                    "Error initializing driver: {}: {}",
+                    descriptor.device_driver.compatible(),
+                    x
+                );
+            }
 
-        /// Initialization code that runs after driver init.
-        ///
-        /// For example, device driver code that depends on other drivers already being online.
-        fn post_device_driver_init(&self);
+            // 2. Call corresponding post init callback.
+            if let Some(callback) = &descriptor.post_init_callback {
+                if let Err(x) = callback() {
+                    panic!(
+                        "Error during driver post-init callback: {}: {}",
+                        descriptor.device_driver.compatible(),
+                        x
+                    );
+                }
+            }
+        });
+    }
+
+    /// Enumerate all registered device drivers.
+    pub fn enumerate(&self) {
+        let mut i: usize = 1;
+        self.for_each_descriptor(|descriptor| {
+            info!("      {}. {}", i, descriptor.device_driver.compatible());
+
+            i += 1;
+        });
     }
 }
diff --git a/10_virtual_mem_part1_identity_mapping/src/main.rs b/10_virtual_mem_part1_identity_mapping/src/main.rs
index e038e093c..b40a37bf0 100644
--- a/10_virtual_mem_part1_identity_mapping/src/main.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/main.rs
@@ -142,19 +142,19 @@ mod time;
 ///       e.g. the yet-to-be-introduced spinlocks in the device drivers (which currently employ
 ///       NullLocks instead of spinlocks), will fail to work (properly) on the RPi SoCs.
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
     use memory::mmu::interface::MMU;
 
     if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
         panic!("MMU: {}", string);
     }
 
-    for i in bsp::driver::driver_manager().all_device_drivers().iter() {
-        if let Err(x) = i.init() {
-            panic!("Error loading driver: {}: {}", i.compatible(), x);
-        }
+    // Initialize the BSP driver subsystem.
+    if let Err(x) = bsp::driver::init() {
+        panic!("Error initializing BSP driver subsystem: {}", x);
     }
-    bsp::driver::driver_manager().post_device_driver_init();
+
+    // Initialize all device drivers.
+    driver::driver_manager().init_drivers();
     // println! is usable from here on.
 
     // Transition from unsafe to safe.
@@ -165,7 +165,6 @@ unsafe fn kernel_init() -> ! {
 fn kernel_main() -> ! {
     use console::{console, interface::Write};
     use core::time::Duration;
-    use driver::interface::DriverManager;
 
     info!(
         "{} version {}",
@@ -189,13 +188,7 @@ fn kernel_main() -> ! {
     );
 
     info!("Drivers loaded:");
-    for (i, driver) in bsp::driver::driver_manager()
-        .all_device_drivers()
-        .iter()
-        .enumerate()
-    {
-        info!("      {}. {}", i + 1, driver.compatible());
-    }
+    driver::driver_manager().enumerate();
 
     info!("Timer test, spinning for 1 second");
     time::time_manager().spin_for(Duration::from_secs(1));
diff --git a/11_exceptions_part1_groundwork/README.md b/11_exceptions_part1_groundwork/README.md
index 3e7ca05e8..12812acb0 100644
--- a/11_exceptions_part1_groundwork/README.md
+++ b/11_exceptions_part1_groundwork/README.md
@@ -1024,8 +1024,8 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/exception.rs 11_exceptions_p
 diff -uNr 10_virtual_mem_part1_identity_mapping/src/main.rs 11_exceptions_part1_groundwork/src/main.rs
 --- 10_virtual_mem_part1_identity_mapping/src/main.rs
 +++ 11_exceptions_part1_groundwork/src/main.rs
-@@ -145,6 +145,8 @@
-     use driver::interface::DriverManager;
+@@ -144,6 +144,8 @@
+ unsafe fn kernel_init() -> ! {
      use memory::mmu::interface::MMU;
 
 +    exception::handling_init();
@@ -1040,9 +1040,9 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/main.rs 11_exceptions_part1_
 -    use console::{console, interface::Write};
 +    use console::console;
      use core::time::Duration;
-     use driver::interface::DriverManager;
 
-@@ -200,13 +202,28 @@
+     info!(
+@@ -193,13 +195,28 @@
      info!("Timer test, spinning for 1 second");
      time::time_manager().spin_for(Duration::from_secs(1));
 
diff --git a/11_exceptions_part1_groundwork/src/bsp/raspberrypi.rs b/11_exceptions_part1_groundwork/src/bsp/raspberrypi.rs
index a9a7261af..fe9406779 100644
--- a/11_exceptions_part1_groundwork/src/bsp/raspberrypi.rs
+++ b/11_exceptions_part1_groundwork/src/bsp/raspberrypi.rs
@@ -4,7 +4,6 @@
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
-pub mod console;
 pub mod cpu;
 pub mod driver;
 pub mod memory;
diff --git a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/console.rs b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/console.rs
deleted file mode 100644
index 0a630eef4..000000000
--- a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/console.rs
+++ /dev/null
@@ -1,16 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
-
-//! BSP console facilities.
-
-use crate::console;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return a reference to the console.
-pub fn console() -> &'static dyn console::interface::All {
-    &super::driver::PL011_UART
-}
diff --git a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/driver.rs b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/driver.rs
index 8b683ed8b..ea8430660 100644
--- a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/driver.rs
+++ b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/driver.rs
@@ -5,51 +5,67 @@
 //! BSP driver support.
 
 use super::memory::map::mmio;
-use crate::{bsp::device_driver, driver};
+use crate::{bsp::device_driver, console, driver as generic_driver};
+use core::sync::atomic::{AtomicBool, Ordering};
 
 //--------------------------------------------------------------------------------------------------
-// Private Definitions
+// Global instances
 //--------------------------------------------------------------------------------------------------
 
-/// Device Driver Manager type.
-struct BSPDriverManager {
-    device_drivers: [&'static (dyn DeviceDriver + Sync); 2],
-}
+static PL011_UART: device_driver::PL011Uart =
+    unsafe { device_driver::PL011Uart::new(mmio::PL011_UART_START) };
+static GPIO: device_driver::GPIO = unsafe { device_driver::GPIO::new(mmio::GPIO_START) };
 
 //--------------------------------------------------------------------------------------------------
-// Global instances
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
-pub(super) static PL011_UART: device_driver::PL011Uart =
-    unsafe { device_driver::PL011Uart::new(mmio::PL011_UART_START) };
+/// This must be called only after successful init of the UART driver.
+fn post_init_uart() -> Result<(), &'static str> {
+    console::register_console(&PL011_UART);
 
-static GPIO: device_driver::GPIO = unsafe { device_driver::GPIO::new(mmio::GPIO_START) };
+    Ok(())
+}
 
-static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
-    device_drivers: [&PL011_UART, &GPIO],
-};
+/// This must be called only after successful init of the GPIO driver.
+fn post_init_gpio() -> Result<(), &'static str> {
+    GPIO.map_pl011_uart();
+    Ok(())
+}
 
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
+fn driver_uart() -> Result<(), &'static str> {
+    let uart_descriptor =
+        generic_driver::DeviceDriverDescriptor::new(&PL011_UART, Some(post_init_uart));
+    generic_driver::driver_manager().register_driver(uart_descriptor);
 
-/// Return a reference to the driver manager.
-pub fn driver_manager() -> &'static impl driver::interface::DriverManager {
-    &BSP_DRIVER_MANAGER
+    Ok(())
 }
 
-//------------------------------------------------------------------------------
-// OS Interface Code
-//------------------------------------------------------------------------------
-use driver::interface::DeviceDriver;
+fn driver_gpio() -> Result<(), &'static str> {
+    let gpio_descriptor = generic_driver::DeviceDriverDescriptor::new(&GPIO, Some(post_init_gpio));
+    generic_driver::driver_manager().register_driver(gpio_descriptor);
 
-impl driver::interface::DriverManager for BSPDriverManager {
-    fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
-        &self.device_drivers[..]
-    }
+    Ok(())
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
 
-    fn post_device_driver_init(&self) {
-        // Configure PL011Uart's output pins.
-        GPIO.map_pl011_uart();
+/// Initialize the driver subsystem.
+///
+/// # Safety
+///
+/// See child function calls.
+pub unsafe fn init() -> Result<(), &'static str> {
+    static INIT_DONE: AtomicBool = AtomicBool::new(false);
+    if INIT_DONE.load(Ordering::Relaxed) {
+        return Err("Init already done");
     }
+
+    driver_uart()?;
+    driver_gpio()?;
+
+    INIT_DONE.store(true, Ordering::Relaxed);
+    Ok(())
 }
diff --git a/11_exceptions_part1_groundwork/src/console.rs b/11_exceptions_part1_groundwork/src/console.rs
index c1fb0e53b..02b43df9f 100644
--- a/11_exceptions_part1_groundwork/src/console.rs
+++ b/11_exceptions_part1_groundwork/src/console.rs
@@ -4,7 +4,9 @@
 
 //! System console.
 
-use crate::bsp;
+mod null_console;
+
+use crate::synchronization::{self, NullLock};
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -54,13 +56,26 @@ pub mod interface {
     pub trait All: Write + Read + Statistics {}
 }
 
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static CUR_CONSOLE: NullLock<&'static (dyn interface::All + Sync)> =
+    NullLock::new(&null_console::NULL_CONSOLE);
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
+use synchronization::interface::Mutex;
+
+/// Register a new console.
+pub fn register_console(new_console: &'static (dyn interface::All + Sync)) {
+    CUR_CONSOLE.lock(|con| *con = new_console);
+}
 
-/// Return a reference to the console.
+/// Return a reference to the currently registered console.
 ///
 /// This is the global console used by all printing macros.
 pub fn console() -> &'static dyn interface::All {
-    bsp::console::console()
+    CUR_CONSOLE.lock(|con| *con)
 }
diff --git a/11_exceptions_part1_groundwork/src/console/null_console.rs b/11_exceptions_part1_groundwork/src/console/null_console.rs
new file mode 100644
index 000000000..2c64d499c
--- /dev/null
+++ b/11_exceptions_part1_groundwork/src/console/null_console.rs
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Null console.
+
+use super::interface;
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct NullConsole;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+pub static NULL_CONSOLE: NullConsole = NullConsole {};
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl interface::Write for NullConsole {
+    fn write_char(&self, _c: char) {}
+
+    fn write_fmt(&self, _args: fmt::Arguments) -> fmt::Result {
+        fmt::Result::Ok(())
+    }
+
+    fn flush(&self) {}
+}
+
+impl interface::Read for NullConsole {
+    fn clear_rx(&self) {}
+}
+
+impl interface::Statistics for NullConsole {}
+impl interface::All for NullConsole {}
diff --git a/11_exceptions_part1_groundwork/src/driver.rs b/11_exceptions_part1_groundwork/src/driver.rs
index 2fcc75629..a798c86da 100644
--- a/11_exceptions_part1_groundwork/src/driver.rs
+++ b/11_exceptions_part1_groundwork/src/driver.rs
@@ -4,6 +4,22 @@
 
 //! Driver support.
 
+use crate::{
+    info,
+    synchronization::{interface::Mutex, NullLock},
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+const NUM_DRIVERS: usize = 5;
+
+struct DriverManagerInner {
+    next_index: usize,
+    descriptors: [Option<DeviceDriverDescriptor>; NUM_DRIVERS],
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -24,21 +40,128 @@ pub mod interface {
             Ok(())
         }
     }
+}
+
+/// Tpye to be used as an optional callback after a driver's init() has run.
+pub type DeviceDriverPostInitCallback = unsafe fn() -> Result<(), &'static str>;
+
+/// A descriptor for device drivers.
+#[derive(Copy, Clone)]
+pub struct DeviceDriverDescriptor {
+    device_driver: &'static (dyn interface::DeviceDriver + Sync),
+    post_init_callback: Option<DeviceDriverPostInitCallback>,
+}
+
+/// Provides device driver management functions.
+pub struct DriverManager {
+    inner: NullLock<DriverManagerInner>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static DRIVER_MANAGER: DriverManager = DriverManager::new();
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl DriverManagerInner {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self {
+            next_index: 0,
+            descriptors: [None; NUM_DRIVERS],
+        }
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl DeviceDriverDescriptor {
+    /// Create an instance.
+    pub fn new(
+        device_driver: &'static (dyn interface::DeviceDriver + Sync),
+        post_init_callback: Option<DeviceDriverPostInitCallback>,
+    ) -> Self {
+        Self {
+            device_driver,
+            post_init_callback,
+        }
+    }
+}
+
+/// Return a reference to the global DriverManager.
+pub fn driver_manager() -> &'static DriverManager {
+    &DRIVER_MANAGER
+}
+
+impl DriverManager {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self {
+            inner: NullLock::new(DriverManagerInner::new()),
+        }
+    }
 
-    /// Device driver management functions.
+    /// Register a device driver with the kernel.
+    pub fn register_driver(&self, descriptor: DeviceDriverDescriptor) {
+        self.inner.lock(|inner| {
+            inner.descriptors[inner.next_index] = Some(descriptor);
+            inner.next_index += 1;
+        })
+    }
+
+    /// Helper for iterating over registered drivers.
+    fn for_each_descriptor<'a>(&'a self, f: impl FnMut(&'a DeviceDriverDescriptor)) {
+        self.inner.lock(|inner| {
+            inner
+                .descriptors
+                .iter()
+                .filter_map(|x| x.as_ref())
+                .for_each(f)
+        })
+    }
+
+    /// Fully initialize all drivers.
     ///
-    /// The `BSP` is supposed to supply one global instance.
-    pub trait DriverManager {
-        /// Return a slice of references to all `BSP`-instantiated drivers.
-        ///
-        /// # Safety
-        ///
-        /// - The order of devices is the order in which `DeviceDriver::init()` is called.
-        fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
+    /// # Safety
+    ///
+    /// - During init, drivers might do stuff with system-wide impact.
+    pub unsafe fn init_drivers(&self) {
+        self.for_each_descriptor(|descriptor| {
+            // 1. Initialize driver.
+            if let Err(x) = descriptor.device_driver.init() {
+                panic!(
+                    "Error initializing driver: {}: {}",
+                    descriptor.device_driver.compatible(),
+                    x
+                );
+            }
 
-        /// Initialization code that runs after driver init.
-        ///
-        /// For example, device driver code that depends on other drivers already being online.
-        fn post_device_driver_init(&self);
+            // 2. Call corresponding post init callback.
+            if let Some(callback) = &descriptor.post_init_callback {
+                if let Err(x) = callback() {
+                    panic!(
+                        "Error during driver post-init callback: {}: {}",
+                        descriptor.device_driver.compatible(),
+                        x
+                    );
+                }
+            }
+        });
+    }
+
+    /// Enumerate all registered device drivers.
+    pub fn enumerate(&self) {
+        let mut i: usize = 1;
+        self.for_each_descriptor(|descriptor| {
+            info!("      {}. {}", i, descriptor.device_driver.compatible());
+
+            i += 1;
+        });
     }
 }
diff --git a/11_exceptions_part1_groundwork/src/main.rs b/11_exceptions_part1_groundwork/src/main.rs
index 8e632fa52..9d300bf06 100644
--- a/11_exceptions_part1_groundwork/src/main.rs
+++ b/11_exceptions_part1_groundwork/src/main.rs
@@ -142,7 +142,6 @@ mod time;
 ///       e.g. the yet-to-be-introduced spinlocks in the device drivers (which currently employ
 ///       NullLocks instead of spinlocks), will fail to work (properly) on the RPi SoCs.
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
     use memory::mmu::interface::MMU;
 
     exception::handling_init();
@@ -151,12 +150,13 @@ unsafe fn kernel_init() -> ! {
         panic!("MMU: {}", string);
     }
 
-    for i in bsp::driver::driver_manager().all_device_drivers().iter() {
-        if let Err(x) = i.init() {
-            panic!("Error loading driver: {}: {}", i.compatible(), x);
-        }
+    // Initialize the BSP driver subsystem.
+    if let Err(x) = bsp::driver::init() {
+        panic!("Error initializing BSP driver subsystem: {}", x);
     }
-    bsp::driver::driver_manager().post_device_driver_init();
+
+    // Initialize all device drivers.
+    driver::driver_manager().init_drivers();
     // println! is usable from here on.
 
     // Transition from unsafe to safe.
@@ -167,7 +167,6 @@ unsafe fn kernel_init() -> ! {
 fn kernel_main() -> ! {
     use console::console;
     use core::time::Duration;
-    use driver::interface::DriverManager;
 
     info!(
         "{} version {}",
@@ -191,13 +190,7 @@ fn kernel_main() -> ! {
     );
 
     info!("Drivers loaded:");
-    for (i, driver) in bsp::driver::driver_manager()
-        .all_device_drivers()
-        .iter()
-        .enumerate()
-    {
-        info!("      {}. {}", i + 1, driver.compatible());
-    }
+    driver::driver_manager().enumerate();
 
     info!("Timer test, spinning for 1 second");
     time::time_manager().spin_for(Duration::from_secs(1));
diff --git a/12_integrated_testing/Makefile b/12_integrated_testing/Makefile
index 670c30c4e..2d4801190 100644
--- a/12_integrated_testing/Makefile
+++ b/12_integrated_testing/Makefile
@@ -291,7 +291,7 @@ test_boot: $(KERNEL_BIN)
 ## Helpers for unit and integration test targets
 ##------------------------------------------------------------------------------
 define KERNEL_TEST_RUNNER
-    #!/usr/bin/env bash
+#!/usr/bin/env bash
 
     # The cargo test runner seems to change into the crate under test's directory. Therefore, ensure
     # this script executes from the root.
diff --git a/12_integrated_testing/README.md b/12_integrated_testing/README.md
index c5d032e8d..ae68d2697 100644
--- a/12_integrated_testing/README.md
+++ b/12_integrated_testing/README.md
@@ -266,10 +266,8 @@ implementation in `lib.rs`:
 #[cfg(test)]
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     test_main();
 
@@ -277,12 +275,12 @@ unsafe fn kernel_init() -> ! {
 }
 ```
 
-Note the call to `bsp::driver::driver_manager().qemu_bring_up_console()`. Since we are running all
-our tests inside `QEMU`, we need to ensure that whatever peripheral implements the kernel's
-`console` interface is initialized, so that we can print from our tests. If you recall [tutorial
-03], bringing up peripherals in `QEMU` might not need the full initialization as is needed on real
-hardware (setting clocks, config registers, etc...) due to the abstractions in `QEMU`'s emulation
-code. So this is an opportunity to cut down on setup code.
+Note the call to `bsp::driver::qemu_bring_up_console()`. Since we are running all our tests inside
+`QEMU`, we need to ensure that whatever peripheral implements the kernel's `console` interface is
+initialized, so that we can print from our tests. If you recall [tutorial 03], bringing up
+peripherals in `QEMU` might not need the full initialization as is needed on real hardware (setting
+clocks, config registers, etc...) due to the abstractions in `QEMU`'s emulation code. So this is an
+opportunity to cut down on setup code.
 
 [tutorial 03]: ../03_hacky_hello_world
 
@@ -622,15 +620,13 @@ your test code into individual chunks. For example, take a look at `tests/01_tim
 #![test_runner(libkernel::test_runner)]
 
 use core::time::Duration;
-use libkernel::{bsp, cpu, driver, exception, time};
+use libkernel::{bsp, cpu, exception, time};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
 
@@ -643,12 +639,12 @@ unsafe fn kernel_init() -> ! {
 #[kernel_test]
 fn timer_is_counting() {
     assert!(time::time_manager().uptime().as_nanos() > 0)
-    assert!(time::time_manager().resolution().as_nanos() < 100)
 }
 
 /// Timer resolution must be sufficient.
 #[kernel_test]
 fn timer_resolution_is_sufficient() {
+    assert!(time::time_manager().resolution().as_nanos() > 0);
     assert!(time::time_manager().resolution().as_nanos() < 100)
 }
 ```
@@ -719,15 +715,14 @@ so the wanted outcome is a `panic!`. Here is the whole test (minus some inline c
 
 mod panic_exit_success;
 
-use libkernel::{bsp, cpu, driver, exception, info, memory, println};
+use libkernel::{bsp, cpu, exception, info, memory, println};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
     use memory::mmu::interface::MMU;
 
     exception::handling_init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     // This line will be printed as the test header.
     println!("Testing synchronous exception handling by causing a page fault");
@@ -794,15 +789,14 @@ The subtest first sends `"ABC"` over the console to the kernel, and then expects
 /// Console tests should time out on the I/O harness in case of panic.
 mod panic_wait_forever;
 
-use libkernel::{bsp, console, cpu, driver, exception, print};
+use libkernel::{bsp, console, cpu, exception, print};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
     use console::console;
-    use driver::interface::DriverManager;
 
     exception::handling_init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     // Handshake
     assert_eq!(console().read_char(), 'A');
diff --git a/12_integrated_testing/kernel/src/bsp/raspberrypi.rs b/12_integrated_testing/kernel/src/bsp/raspberrypi.rs
index a9a7261af..fe9406779 100644
--- a/12_integrated_testing/kernel/src/bsp/raspberrypi.rs
+++ b/12_integrated_testing/kernel/src/bsp/raspberrypi.rs
@@ -4,7 +4,6 @@
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
-pub mod console;
 pub mod cpu;
 pub mod driver;
 pub mod memory;
diff --git a/12_integrated_testing/kernel/src/bsp/raspberrypi/console.rs b/12_integrated_testing/kernel/src/bsp/raspberrypi/console.rs
deleted file mode 100644
index 0a630eef4..000000000
--- a/12_integrated_testing/kernel/src/bsp/raspberrypi/console.rs
+++ /dev/null
@@ -1,16 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
-
-//! BSP console facilities.
-
-use crate::console;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return a reference to the console.
-pub fn console() -> &'static dyn console::interface::All {
-    &super::driver::PL011_UART
-}
diff --git a/12_integrated_testing/kernel/src/bsp/raspberrypi/driver.rs b/12_integrated_testing/kernel/src/bsp/raspberrypi/driver.rs
index f8acd335f..beaee16be 100644
--- a/12_integrated_testing/kernel/src/bsp/raspberrypi/driver.rs
+++ b/12_integrated_testing/kernel/src/bsp/raspberrypi/driver.rs
@@ -5,54 +5,74 @@
 //! BSP driver support.
 
 use super::memory::map::mmio;
-use crate::{bsp::device_driver, driver};
+use crate::{bsp::device_driver, console, driver as generic_driver};
+use core::sync::atomic::{AtomicBool, Ordering};
 
 //--------------------------------------------------------------------------------------------------
-// Private Definitions
+// Global instances
 //--------------------------------------------------------------------------------------------------
 
-/// Device Driver Manager type.
-struct BSPDriverManager {
-    device_drivers: [&'static (dyn DeviceDriver + Sync); 2],
-}
+static PL011_UART: device_driver::PL011Uart =
+    unsafe { device_driver::PL011Uart::new(mmio::PL011_UART_START) };
+static GPIO: device_driver::GPIO = unsafe { device_driver::GPIO::new(mmio::GPIO_START) };
 
 //--------------------------------------------------------------------------------------------------
-// Global instances
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
-pub(super) static PL011_UART: device_driver::PL011Uart =
-    unsafe { device_driver::PL011Uart::new(mmio::PL011_UART_START) };
+/// This must be called only after successful init of the UART driver.
+fn post_init_uart() -> Result<(), &'static str> {
+    console::register_console(&PL011_UART);
 
-static GPIO: device_driver::GPIO = unsafe { device_driver::GPIO::new(mmio::GPIO_START) };
+    Ok(())
+}
 
-static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
-    device_drivers: [&PL011_UART, &GPIO],
-};
+/// This must be called only after successful init of the GPIO driver.
+fn post_init_gpio() -> Result<(), &'static str> {
+    GPIO.map_pl011_uart();
+    Ok(())
+}
 
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
+fn driver_uart() -> Result<(), &'static str> {
+    let uart_descriptor =
+        generic_driver::DeviceDriverDescriptor::new(&PL011_UART, Some(post_init_uart));
+    generic_driver::driver_manager().register_driver(uart_descriptor);
 
-/// Return a reference to the driver manager.
-pub fn driver_manager() -> &'static impl driver::interface::DriverManager {
-    &BSP_DRIVER_MANAGER
+    Ok(())
 }
 
-//------------------------------------------------------------------------------
-// OS Interface Code
-//------------------------------------------------------------------------------
-use driver::interface::DeviceDriver;
+fn driver_gpio() -> Result<(), &'static str> {
+    let gpio_descriptor = generic_driver::DeviceDriverDescriptor::new(&GPIO, Some(post_init_gpio));
+    generic_driver::driver_manager().register_driver(gpio_descriptor);
 
-impl driver::interface::DriverManager for BSPDriverManager {
-    fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
-        &self.device_drivers[..]
-    }
+    Ok(())
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
 
-    fn post_device_driver_init(&self) {
-        // Configure PL011Uart's output pins.
-        GPIO.map_pl011_uart();
+/// Initialize the driver subsystem.
+///
+/// # Safety
+///
+/// See child function calls.
+pub unsafe fn init() -> Result<(), &'static str> {
+    static INIT_DONE: AtomicBool = AtomicBool::new(false);
+    if INIT_DONE.load(Ordering::Relaxed) {
+        return Err("Init already done");
     }
 
-    #[cfg(feature = "test_build")]
-    fn qemu_bring_up_console(&self) {}
+    driver_uart()?;
+    driver_gpio()?;
+
+    INIT_DONE.store(true, Ordering::Relaxed);
+    Ok(())
+}
+
+/// Minimal code needed to bring up the console in QEMU (for testing only). This is often less steps
+/// than on real hardware due to QEMU's abstractions.
+#[cfg(feature = "test_build")]
+pub fn qemu_bring_up_console() {
+    console::register_console(&PL011_UART);
 }
diff --git a/12_integrated_testing/kernel/src/console.rs b/12_integrated_testing/kernel/src/console.rs
index c1fb0e53b..02b43df9f 100644
--- a/12_integrated_testing/kernel/src/console.rs
+++ b/12_integrated_testing/kernel/src/console.rs
@@ -4,7 +4,9 @@
 
 //! System console.
 
-use crate::bsp;
+mod null_console;
+
+use crate::synchronization::{self, NullLock};
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -54,13 +56,26 @@ pub mod interface {
     pub trait All: Write + Read + Statistics {}
 }
 
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static CUR_CONSOLE: NullLock<&'static (dyn interface::All + Sync)> =
+    NullLock::new(&null_console::NULL_CONSOLE);
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
+use synchronization::interface::Mutex;
+
+/// Register a new console.
+pub fn register_console(new_console: &'static (dyn interface::All + Sync)) {
+    CUR_CONSOLE.lock(|con| *con = new_console);
+}
 
-/// Return a reference to the console.
+/// Return a reference to the currently registered console.
 ///
 /// This is the global console used by all printing macros.
 pub fn console() -> &'static dyn interface::All {
-    bsp::console::console()
+    CUR_CONSOLE.lock(|con| *con)
 }
diff --git a/12_integrated_testing/kernel/src/console/null_console.rs b/12_integrated_testing/kernel/src/console/null_console.rs
new file mode 100644
index 000000000..2c64d499c
--- /dev/null
+++ b/12_integrated_testing/kernel/src/console/null_console.rs
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Null console.
+
+use super::interface;
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct NullConsole;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+pub static NULL_CONSOLE: NullConsole = NullConsole {};
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl interface::Write for NullConsole {
+    fn write_char(&self, _c: char) {}
+
+    fn write_fmt(&self, _args: fmt::Arguments) -> fmt::Result {
+        fmt::Result::Ok(())
+    }
+
+    fn flush(&self) {}
+}
+
+impl interface::Read for NullConsole {
+    fn clear_rx(&self) {}
+}
+
+impl interface::Statistics for NullConsole {}
+impl interface::All for NullConsole {}
diff --git a/12_integrated_testing/kernel/src/driver.rs b/12_integrated_testing/kernel/src/driver.rs
index 12d60ad49..a798c86da 100644
--- a/12_integrated_testing/kernel/src/driver.rs
+++ b/12_integrated_testing/kernel/src/driver.rs
@@ -4,6 +4,22 @@
 
 //! Driver support.
 
+use crate::{
+    info,
+    synchronization::{interface::Mutex, NullLock},
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+const NUM_DRIVERS: usize = 5;
+
+struct DriverManagerInner {
+    next_index: usize,
+    descriptors: [Option<DeviceDriverDescriptor>; NUM_DRIVERS],
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -24,26 +40,128 @@ pub mod interface {
             Ok(())
         }
     }
+}
+
+/// Tpye to be used as an optional callback after a driver's init() has run.
+pub type DeviceDriverPostInitCallback = unsafe fn() -> Result<(), &'static str>;
+
+/// A descriptor for device drivers.
+#[derive(Copy, Clone)]
+pub struct DeviceDriverDescriptor {
+    device_driver: &'static (dyn interface::DeviceDriver + Sync),
+    post_init_callback: Option<DeviceDriverPostInitCallback>,
+}
+
+/// Provides device driver management functions.
+pub struct DriverManager {
+    inner: NullLock<DriverManagerInner>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static DRIVER_MANAGER: DriverManager = DriverManager::new();
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl DriverManagerInner {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self {
+            next_index: 0,
+            descriptors: [None; NUM_DRIVERS],
+        }
+    }
+}
 
-    /// Device driver management functions.
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl DeviceDriverDescriptor {
+    /// Create an instance.
+    pub fn new(
+        device_driver: &'static (dyn interface::DeviceDriver + Sync),
+        post_init_callback: Option<DeviceDriverPostInitCallback>,
+    ) -> Self {
+        Self {
+            device_driver,
+            post_init_callback,
+        }
+    }
+}
+
+/// Return a reference to the global DriverManager.
+pub fn driver_manager() -> &'static DriverManager {
+    &DRIVER_MANAGER
+}
+
+impl DriverManager {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self {
+            inner: NullLock::new(DriverManagerInner::new()),
+        }
+    }
+
+    /// Register a device driver with the kernel.
+    pub fn register_driver(&self, descriptor: DeviceDriverDescriptor) {
+        self.inner.lock(|inner| {
+            inner.descriptors[inner.next_index] = Some(descriptor);
+            inner.next_index += 1;
+        })
+    }
+
+    /// Helper for iterating over registered drivers.
+    fn for_each_descriptor<'a>(&'a self, f: impl FnMut(&'a DeviceDriverDescriptor)) {
+        self.inner.lock(|inner| {
+            inner
+                .descriptors
+                .iter()
+                .filter_map(|x| x.as_ref())
+                .for_each(f)
+        })
+    }
+
+    /// Fully initialize all drivers.
     ///
-    /// The `BSP` is supposed to supply one global instance.
-    pub trait DriverManager {
-        /// Return a slice of references to all `BSP`-instantiated drivers.
-        ///
-        /// # Safety
-        ///
-        /// - The order of devices is the order in which `DeviceDriver::init()` is called.
-        fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
+    /// # Safety
+    ///
+    /// - During init, drivers might do stuff with system-wide impact.
+    pub unsafe fn init_drivers(&self) {
+        self.for_each_descriptor(|descriptor| {
+            // 1. Initialize driver.
+            if let Err(x) = descriptor.device_driver.init() {
+                panic!(
+                    "Error initializing driver: {}: {}",
+                    descriptor.device_driver.compatible(),
+                    x
+                );
+            }
 
-        /// Initialization code that runs after driver init.
-        ///
-        /// For example, device driver code that depends on other drivers already being online.
-        fn post_device_driver_init(&self);
+            // 2. Call corresponding post init callback.
+            if let Some(callback) = &descriptor.post_init_callback {
+                if let Err(x) = callback() {
+                    panic!(
+                        "Error during driver post-init callback: {}: {}",
+                        descriptor.device_driver.compatible(),
+                        x
+                    );
+                }
+            }
+        });
+    }
+
+    /// Enumerate all registered device drivers.
+    pub fn enumerate(&self) {
+        let mut i: usize = 1;
+        self.for_each_descriptor(|descriptor| {
+            info!("      {}. {}", i, descriptor.device_driver.compatible());
 
-        /// Minimal code needed to bring up the console in QEMU (for testing only). This is often
-        /// less steps than on real hardware due to QEMU's abstractions.
-        #[cfg(feature = "test_build")]
-        fn qemu_bring_up_console(&self);
+            i += 1;
+        });
     }
 }
diff --git a/12_integrated_testing/kernel/src/lib.rs b/12_integrated_testing/kernel/src/lib.rs
index 35698c743..3f5a846f4 100644
--- a/12_integrated_testing/kernel/src/lib.rs
+++ b/12_integrated_testing/kernel/src/lib.rs
@@ -182,10 +182,8 @@ pub fn test_runner(tests: &[&test_types::UnitTest]) {
 #[cfg(test)]
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     test_main();
 
diff --git a/12_integrated_testing/kernel/src/main.rs b/12_integrated_testing/kernel/src/main.rs
index bf4d7fe3b..9cfcf3155 100644
--- a/12_integrated_testing/kernel/src/main.rs
+++ b/12_integrated_testing/kernel/src/main.rs
@@ -26,7 +26,6 @@ use libkernel::{bsp, console, driver, exception, info, memory, time};
 ///       NullLocks instead of spinlocks), will fail to work (properly) on the RPi SoCs.
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
     use memory::mmu::interface::MMU;
 
     exception::handling_init();
@@ -35,12 +34,13 @@ unsafe fn kernel_init() -> ! {
         panic!("MMU: {}", string);
     }
 
-    for i in bsp::driver::driver_manager().all_device_drivers().iter() {
-        if let Err(x) = i.init() {
-            panic!("Error loading driver: {}: {}", i.compatible(), x);
-        }
+    // Initialize the BSP driver subsystem.
+    if let Err(x) = bsp::driver::init() {
+        panic!("Error initializing BSP driver subsystem: {}", x);
     }
-    bsp::driver::driver_manager().post_device_driver_init();
+
+    // Initialize all device drivers.
+    driver::driver_manager().init_drivers();
     // println! is usable from here on.
 
     // Transition from unsafe to safe.
@@ -50,7 +50,6 @@ unsafe fn kernel_init() -> ! {
 /// The main function running after the early init.
 fn kernel_main() -> ! {
     use console::console;
-    use driver::interface::DriverManager;
 
     info!("{}", libkernel::version());
     info!("Booting on: {}", bsp::board_name());
@@ -70,13 +69,7 @@ fn kernel_main() -> ! {
     );
 
     info!("Drivers loaded:");
-    for (i, driver) in bsp::driver::driver_manager()
-        .all_device_drivers()
-        .iter()
-        .enumerate()
-    {
-        info!("      {}. {}", i + 1, driver.compatible());
-    }
+    driver::driver_manager().enumerate();
 
     info!("Echoing input now");
 
diff --git a/12_integrated_testing/kernel/tests/00_console_sanity.rs b/12_integrated_testing/kernel/tests/00_console_sanity.rs
index e12a711f7..693134287 100644
--- a/12_integrated_testing/kernel/tests/00_console_sanity.rs
+++ b/12_integrated_testing/kernel/tests/00_console_sanity.rs
@@ -11,15 +11,14 @@
 /// Console tests should time out on the I/O harness in case of panic.
 mod panic_wait_forever;
 
-use libkernel::{bsp, console, cpu, driver, exception, print};
+use libkernel::{bsp, console, cpu, exception, print};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
     use console::console;
-    use driver::interface::DriverManager;
 
     exception::handling_init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     // Handshake
     assert_eq!(console().read_char(), 'A');
diff --git a/12_integrated_testing/kernel/tests/01_timer_sanity.rs b/12_integrated_testing/kernel/tests/01_timer_sanity.rs
index a0eb732bb..b86016b61 100644
--- a/12_integrated_testing/kernel/tests/01_timer_sanity.rs
+++ b/12_integrated_testing/kernel/tests/01_timer_sanity.rs
@@ -11,15 +11,13 @@
 #![test_runner(libkernel::test_runner)]
 
 use core::time::Duration;
-use libkernel::{bsp, cpu, driver, exception, time};
+use libkernel::{bsp, cpu, exception, time};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
 
diff --git a/12_integrated_testing/kernel/tests/02_exception_sync_page_fault.rs b/12_integrated_testing/kernel/tests/02_exception_sync_page_fault.rs
index 62908377a..465019604 100644
--- a/12_integrated_testing/kernel/tests/02_exception_sync_page_fault.rs
+++ b/12_integrated_testing/kernel/tests/02_exception_sync_page_fault.rs
@@ -17,15 +17,14 @@
 /// or indirectly.
 mod panic_exit_success;
 
-use libkernel::{bsp, cpu, driver, exception, info, memory, println};
+use libkernel::{bsp, cpu, exception, info, memory, println};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
     use memory::mmu::interface::MMU;
 
     exception::handling_init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     // This line will be printed as the test header.
     println!("Testing synchronous exception handling by causing a page fault");
diff --git a/12_integrated_testing/kernel/tests/03_exception_restore_sanity.rs b/12_integrated_testing/kernel/tests/03_exception_restore_sanity.rs
index 3f4eae79a..cba9285fc 100644
--- a/12_integrated_testing/kernel/tests/03_exception_restore_sanity.rs
+++ b/12_integrated_testing/kernel/tests/03_exception_restore_sanity.rs
@@ -12,7 +12,7 @@
 mod panic_wait_forever;
 
 use core::arch::asm;
-use libkernel::{bsp, cpu, driver, exception, info, memory, println};
+use libkernel::{bsp, cpu, exception, info, memory, println};
 
 #[inline(never)]
 fn nested_system_call() {
@@ -30,11 +30,10 @@ fn nested_system_call() {
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
     use memory::mmu::interface::MMU;
 
     exception::handling_init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     // This line will be printed as the test header.
     println!("Testing exception restore");
diff --git a/13_exceptions_part2_peripheral_IRQs/Makefile b/13_exceptions_part2_peripheral_IRQs/Makefile
index 670c30c4e..2d4801190 100644
--- a/13_exceptions_part2_peripheral_IRQs/Makefile
+++ b/13_exceptions_part2_peripheral_IRQs/Makefile
@@ -291,7 +291,7 @@ test_boot: $(KERNEL_BIN)
 ## Helpers for unit and integration test targets
 ##------------------------------------------------------------------------------
 define KERNEL_TEST_RUNNER
-    #!/usr/bin/env bash
+#!/usr/bin/env bash
 
     # The cargo test runner seems to change into the crate under test's directory. Therefore, ensure
     # this script executes from the root.
diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index 3d6d5f165..a8c503d59 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -110,17 +110,16 @@ The trait is defined as `exception::asynchronous::interface::IRQManager`:
 ```rust
 pub trait IRQManager {
     /// The IRQ number type depends on the implementation.
-    type IRQNumberType;
+    type IRQNumberType: Copy;
 
     /// Register a handler.
     fn register_handler(
         &self,
-        irq_number: Self::IRQNumberType,
-        descriptor: super::IRQDescriptor,
+        irq_handler_descriptor: super::IRQHandlerDescriptor<Self::IRQNumberType>,
     ) -> Result<(), &'static str>;
 
     /// Enable an interrupt in the controller.
-    fn enable(&self, irq_number: Self::IRQNumberType);
+    fn enable(&self, irq_number: &Self::IRQNumberType);
 
     /// Handle pending interrupts.
     ///
@@ -136,7 +135,7 @@ pub trait IRQManager {
     );
 
     /// Print list of registered handlers.
-    fn print_handler(&self);
+    fn print_handler(&self) {}
 }
 ```
 
@@ -175,22 +174,21 @@ sufficient to uniquely encode the IRQs, because their ranges overlap. In the dri
 controller, we therefore define the associated type as follows:
 
 ```rust
-pub type LocalIRQ =
-    exception::asynchronous::IRQNumber<{ InterruptController::MAX_LOCAL_IRQ_NUMBER }>;
-pub type PeripheralIRQ =
-    exception::asynchronous::IRQNumber<{ InterruptController::MAX_PERIPHERAL_IRQ_NUMBER }>;
+pub type LocalIRQ = BoundedUsize<{ InterruptController::MAX_LOCAL_IRQ_NUMBER }>;
+pub type PeripheralIRQ = BoundedUsize<{ InterruptController::MAX_PERIPHERAL_IRQ_NUMBER }>;
 
-/// Used for the associated type of trait  [`exception::asynchronous::interface::IRQManager`].
+/// Used for the associated type of trait [`exception::asynchronous::interface::IRQManager`].
 #[derive(Copy, Clone)]
+#[allow(missing_docs)]
 pub enum IRQNumber {
     Local(LocalIRQ),
     Peripheral(PeripheralIRQ),
 }
 ```
 
-The type `exception::asynchronous::IRQNumber` is a newtype around an `usize` that uses a [const
-generic] to ensure that the value of the encapsulated IRQ number is in the allowed range (e.g.
-`0..MAX_LOCAL_IRQ_NUMBER` for `LocalIRQ`, with `MAX_LOCAL_IRQ_NUMBER == 11`).
+The type `BoundedUsize` is a newtype around an `usize` that uses a [const generic] to ensure that
+the value of the encapsulated IRQ number is in the allowed range (e.g. `0..MAX_LOCAL_IRQ_NUMBER` for
+`LocalIRQ`, with `MAX_LOCAL_IRQ_NUMBER == 11`).
 
 [const generic]: https://github.com/rust-lang/rfcs/blob/master/text/2000-const-generics.md
 
@@ -206,7 +204,7 @@ identifier for the IRQs. We define the type as follows:
 
 ```rust
 /// Used for the associated type of trait [`exception::asynchronous::interface::IRQManager`].
-pub type IRQNumber = exception::asynchronous::IRQNumber<{ GICv2::MAX_IRQ_NUMBER }>;
+pub type IRQNumber = BoundedUsize<{ GICv2::MAX_IRQ_NUMBER }>;
 ```
 
 #### Registering IRQ Handlers
@@ -264,34 +262,41 @@ respective drivers themselves. Therefore, we added a new function to the standar
 trait in `driver::interface::DeviceDriver` that must be implemented if IRQ handling is supported:
 
 ```rust
-/// Called by the kernel to register and enable the device's IRQ handlers, if any.
+/// Called by the kernel to register and enable the device's IRQ handler.
 ///
 /// Rust's type system will prevent a call to this function unless the calling instance
 /// itself has static lifetime.
-fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
-    Ok(())
+fn register_and_enable_irq_handler(
+    &'static self,
+    irq_number: &Self::IRQNumberType,
+) -> Result<(), &'static str> {
+    panic!(
+        "Attempt to enable IRQ {} for device {}, but driver does not support this",
+        irq_number,
+        self.compatible()
+    )
 }
 ```
 
 Here is the implementation for the `PL011Uart`:
 
 ```rust
-fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
-    use exception::asynchronous::{irq_manager, IRQDescriptor};
+fn register_and_enable_irq_handler(
+    &'static self,
+    irq_number: &Self::IRQNumberType,
+) -> Result<(), &'static str> {
+    use exception::asynchronous::{irq_manager, IRQHandlerDescriptor};
 
-    let descriptor = IRQDescriptor {
-        name: Self::COMPATIBLE,
-        handler: self,
-    };
+    let descriptor = IRQHandlerDescriptor::new(*irq_number, Self::COMPATIBLE, self);
 
-    irq_manager().register_handler(self.irq_number, descriptor)?;
-    irq_manager().enable(self.irq_number);
+    irq_manager().register_handler(descriptor)?;
+    irq_manager().enable(irq_number);
 
     Ok(())
 }
 ```
 
-The `bsp::exception::asynchronous::irq_manager()` function used here returns a reference to an
+The `exception::asynchronous::irq_manager()` function used here returns a reference to an
 implementor of the `IRQManager` trait. Since the implementation is supposed to be done by the
 platform's interrupt controller, this call will redirect to the `kernel`'s instance of either the
 driver for the `BCM` controller (`Raspberry Pi 3`) or the driver for the `GICv2` (`Pi 4`). We will
@@ -300,33 +305,57 @@ later. The gist here is that the calls on `irq_manager()` will make the platform
 controller aware that the `UART` driver (i) wants to handle its interrupt and (ii) which function it
 provides to do so.
 
-Also note how `irq_number` is a member of the `PL011Uart` struct and not hardcoded. The reason is
-that the `UART` driver code is agnostic about the **IRQ numbers** that are associated to it. This is
+Also note how `irq_number` is supplied as a function argument and not hardcoded. The reason is that
+the `UART` driver code is agnostic about the **IRQ numbers** that are associated to it. This is
 vendor-supplied information and as such typically part of the Board Support Package (`BSP`). It can
 vary from `BSP` to `BSP`, same like the board's memory map, which provides the `UART`'s MMIO
-register addresses. Therefore, we extend the instantiation of the `UART` driver accordingly, so that
-the `BSP` now additionally provides the IRQ number as an argument:
+register addresses.
+
+With all this in place, we can finally let drivers register and enable their IRQ handlers with the
+interrupt controller, and unmask IRQ reception on the boot CPU core during the kernel init phase.
+The global `driver_manager` takes care of this in the function `init_drivers_and_irqs()` (before
+this tutorial, the function's name was `init_drivers()`), where this happens as the third and last
+step of initializing all registered device drivers:
 
 ```rust
-static PL011_UART: device_driver::PL011Uart = unsafe {
-    device_driver::PL011Uart::new(
-        memory::map::mmio::PL011_UART_BASE,
-        exception::asynchronous::irq_map::PL011_UART,
-    )
-};
+pub unsafe fn init_drivers_and_irqs(&self) {
+    self.for_each_descriptor(|descriptor| {
+        // 1. Initialize driver.
+        if let Err(x) = descriptor.device_driver.init() {
+            // omitted for brevity
+        }
+
+        // 2. Call corresponding post init callback.
+        if let Some(callback) = &descriptor.post_init_callback {
+            // omitted for brevity
+        }
+    });
+
+    // 3. After all post-init callbacks were done, the interrupt controller should be
+    //    registered and functional. So let drivers register with it now.
+    self.for_each_descriptor(|descriptor| {
+        if let Some(irq_number) = &descriptor.irq_number {
+            if let Err(x) = descriptor
+                .device_driver
+                .register_and_enable_irq_handler(irq_number)
+            {
+                panic!(
+                    "Error during driver interrupt handler registration: {}: {}",
+                    descriptor.device_driver.compatible(),
+                    x
+                );
+            }
+        }
+    });
+}
 ```
 
-With all this in place, we can finally let drivers register and enable their IRQ handlers with the
-interrupt controller, and unmask IRQ reception on the boot CPU core during the kernel init phase in
-`main.rs`. After unmasking, IRQ handling is live:
+
+In `main.rs`, IRQs are unmasked right afterwards, after which point IRQ handling is live:
 
 ```rust
-// Let device drivers register and enable their handlers with the interrupt controller.
-for i in bsp::driver::driver_manager().all_device_drivers() {
-    if let Err(msg) = i.register_and_enable_irq_handler() {
-        warn!("Error registering IRQ handler: {}", msg);
-    }
-}
+// Initialize all device drivers.
+driver::driver_manager().init_drivers_and_irqs();
 
 // Unmask interrupts on the boot CPU core.
 exception::asynchronous::local_irq_unmask();
@@ -489,8 +518,8 @@ Calls to `register_handler()` result in the driver inserting the provided handle
 specific table (the handler reference is a member of `IRQDescriptor`):
 
 ```rust
-type HandlerTable =
-    [Option<exception::asynchronous::IRQDescriptor>; InterruptController::NUM_PERIPHERAL_IRQS];
+type HandlerTable = [Option<exception::asynchronous::IRQHandlerDescriptor<PeripheralIRQ>>;
+    PeripheralIRQ::MAX_INCLUSIVE + 1];
 ```
 
 One of the requirements for safe operation of the `kernel` is that those handlers are not
@@ -547,6 +576,10 @@ only call is happening before the transition from `kernel_init()` to `kernel_mai
 state::state_manager().transition_to_single_core_main();
 ```
 
+P.S.: Since the use case for the `InitStateLock` also applies to a few other places in the kernel
+(for example, registering the system-wide console during early boot), `InitStateLock`s have been
+incorporated in those other places as well.
+
 #### The GICv2 Driver (Pi 4)
 
 As we learned earlier, the ARM `GICv2` in the `Raspberry Pi 4` features a continuous interrupt
@@ -1218,7 +1251,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs 1
 +    }
 +
 +    /// Enable an interrupt.
-+    pub fn enable(&self, irq_num: super::IRQNumber) {
++    pub fn enable(&self, irq_num: &super::IRQNumber) {
 +        let irq_num = irq_num.get();
 +
 +        // Each bit in the u32 enable register corresponds to one IRQ number. Shift right by 5
@@ -1249,7 +1282,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs 1
 diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/arm/gicv2.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2.rs
 --- 12_integrated_testing/kernel/src/bsp/device_driver/arm/gicv2.rs
 +++ 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2.rs
-@@ -0,0 +1,220 @@
+@@ -0,0 +1,226 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
@@ -1331,20 +1364,25 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/arm/gicv2.rs 13_exc
 +mod gicc;
 +mod gicd;
 +
-+use crate::{bsp, cpu, driver, exception, synchronization, synchronization::InitStateLock};
++use crate::{
++    bsp::{self, device_driver::common::BoundedUsize},
++    cpu, driver, exception, synchronization,
++    synchronization::InitStateLock,
++};
 +
 +//--------------------------------------------------------------------------------------------------
 +// Private Definitions
 +//--------------------------------------------------------------------------------------------------
 +
-+type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; IRQNumber::NUM_TOTAL];
++type HandlerTable = [Option<exception::asynchronous::IRQHandlerDescriptor<IRQNumber>>;
++    IRQNumber::MAX_INCLUSIVE + 1];
 +
 +//--------------------------------------------------------------------------------------------------
 +// Public Definitions
 +//--------------------------------------------------------------------------------------------------
 +
 +/// Used for the associated type of trait [`exception::asynchronous::interface::IRQManager`].
-+pub type IRQNumber = exception::asynchronous::IRQNumber<{ GICv2::MAX_IRQ_NUMBER }>;
++pub type IRQNumber = BoundedUsize<{ GICv2::MAX_IRQ_NUMBER }>;
 +
 +/// Representation of the GIC.
 +pub struct GICv2 {
@@ -1376,7 +1414,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/arm/gicv2.rs 13_exc
 +        Self {
 +            gicd: gicd::GICD::new(gicd_mmio_start_addr),
 +            gicc: gicc::GICC::new(gicc_mmio_start_addr),
-+            handler_table: InitStateLock::new([None; IRQNumber::NUM_TOTAL]),
++            handler_table: InitStateLock::new([None; IRQNumber::MAX_INCLUSIVE + 1]),
 +        }
 +    }
 +}
@@ -1387,6 +1425,8 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/arm/gicv2.rs 13_exc
 +use synchronization::interface::ReadWriteEx;
 +
 +impl driver::interface::DeviceDriver for GICv2 {
++    type IRQNumberType = IRQNumber;
++
 +    fn compatible(&self) -> &'static str {
 +        Self::COMPATIBLE
 +    }
@@ -1408,23 +1448,22 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/arm/gicv2.rs 13_exc
 +
 +    fn register_handler(
 +        &self,
-+        irq_number: Self::IRQNumberType,
-+        descriptor: exception::asynchronous::IRQDescriptor,
++        irq_handler_descriptor: exception::asynchronous::IRQHandlerDescriptor<Self::IRQNumberType>,
 +    ) -> Result<(), &'static str> {
 +        self.handler_table.write(|table| {
-+            let irq_number = irq_number.get();
++            let irq_number = irq_handler_descriptor.number().get();
 +
 +            if table[irq_number].is_some() {
 +                return Err("IRQ handler already registered");
 +            }
 +
-+            table[irq_number] = Some(descriptor);
++            table[irq_number] = Some(irq_handler_descriptor);
 +
 +            Ok(())
 +        })
 +    }
 +
-+    fn enable(&self, irq_number: Self::IRQNumberType) {
++    fn enable(&self, irq_number: &Self::IRQNumberType) {
 +        self.gicd.enable(irq_number);
 +    }
 +
@@ -1447,7 +1486,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/arm/gicv2.rs 13_exc
 +                None => panic!("No handler registered for IRQ {}", irq_number),
 +                Some(descriptor) => {
 +                    // Call the IRQ handler. Panics on failure.
-+                    descriptor.handler.handle().expect("Error handling IRQ");
++                    descriptor.handler().handle().expect("Error handling IRQ");
 +                }
 +            }
 +        });
@@ -1464,7 +1503,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/arm/gicv2.rs 13_exc
 +        self.handler_table.read(|table| {
 +            for (i, opt) in table.iter().skip(32).enumerate() {
 +                if let Some(handler) = opt {
-+                    info!("            {: >3}. {}", i + 32, handler.name);
++                    info!("            {: >3}. {}", i + 32, handler.name());
 +                }
 +            }
 +        });
@@ -1488,12 +1527,14 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/arm.rs 13_exception
 diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 --- 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 +++ 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
-@@ -6,7 +6,7 @@
+@@ -5,8 +5,8 @@
+ //! GPIO Driver.
 
  use crate::{
-     bsp::device_driver::common::MMIODerefWrapper, driver, synchronization,
+-    bsp::device_driver::common::MMIODerefWrapper, driver, synchronization,
 -    synchronization::NullLock,
-+    synchronization::IRQSafeNullLock,
++    bsp::device_driver::common::MMIODerefWrapper, driver, exception::asynchronous::IRQNumber,
++    synchronization, synchronization::IRQSafeNullLock,
  };
  use tock_registers::{
      interfaces::{ReadWriteable, Writeable},
@@ -1515,6 +1556,15 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
          }
      }
 
+@@ -216,6 +216,8 @@
+ use synchronization::interface::Mutex;
+
+ impl driver::interface::DeviceDriver for GPIO {
++    type IRQNumberType = IRQNumber;
++
+     fn compatible(&self) -> &'static str {
+         Self::COMPATIBLE
+     }
 
 diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
 --- 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -1572,7 +1622,8 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interru
 +/// Abstraction for the ReadOnly parts of the associated MMIO registers.
 +type ReadOnlyRegisters = MMIODerefWrapper<RORegisterBlock>;
 +
-+type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; PeripheralIRQ::NUM_TOTAL];
++type HandlerTable = [Option<exception::asynchronous::IRQHandlerDescriptor<PeripheralIRQ>>;
++    PeripheralIRQ::MAX_INCLUSIVE + 1];
 +
 +//--------------------------------------------------------------------------------------------------
 +// Public Definitions
@@ -1604,7 +1655,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interru
 +        Self {
 +            wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(mmio_start_addr)),
 +            ro_registers: ReadOnlyRegisters::new(mmio_start_addr),
-+            handler_table: InitStateLock::new([None; PeripheralIRQ::NUM_TOTAL]),
++            handler_table: InitStateLock::new([None; PeripheralIRQ::MAX_INCLUSIVE + 1]),
 +        }
 +    }
 +
@@ -1627,23 +1678,22 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interru
 +
 +    fn register_handler(
 +        &self,
-+        irq: Self::IRQNumberType,
-+        descriptor: exception::asynchronous::IRQDescriptor,
++        irq_handler_descriptor: exception::asynchronous::IRQHandlerDescriptor<Self::IRQNumberType>,
 +    ) -> Result<(), &'static str> {
 +        self.handler_table.write(|table| {
-+            let irq_number = irq.get();
++            let irq_number = irq_handler_descriptor.number().get();
 +
 +            if table[irq_number].is_some() {
 +                return Err("IRQ handler already registered");
 +            }
 +
-+            table[irq_number] = Some(descriptor);
++            table[irq_number] = Some(irq_handler_descriptor);
 +
 +            Ok(())
 +        })
 +    }
 +
-+    fn enable(&self, irq: Self::IRQNumberType) {
++    fn enable(&self, irq: &Self::IRQNumberType) {
 +        self.wo_registers.lock(|regs| {
 +            let enable_reg = if irq.get() <= 31 {
 +                &regs.ENABLE_1
@@ -1669,7 +1719,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interru
 +                    None => panic!("No handler registered for IRQ {}", irq_number),
 +                    Some(descriptor) => {
 +                        // Call the IRQ handler. Panics on failure.
-+                        descriptor.handler.handle().expect("Error handling IRQ");
++                        descriptor.handler().handle().expect("Error handling IRQ");
 +                    }
 +                }
 +            }
@@ -1684,7 +1734,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interru
 +        self.handler_table.read(|table| {
 +            for (i, opt) in table.iter().enumerate() {
 +                if let Some(handler) = opt {
-+                    info!("            {: >3}. {}", i, handler.name);
++                    info!("            {: >3}. {}", i, handler.name());
 +                }
 +            }
 +        });
@@ -1694,7 +1744,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interru
 diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
 --- 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
 +++ 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
-@@ -0,0 +1,131 @@
+@@ -0,0 +1,152 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
@@ -1703,7 +1753,12 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interru
 +
 +mod peripheral_ic;
 +
-+use crate::{driver, exception};
++use crate::{
++    bsp::device_driver::common::BoundedUsize,
++    driver,
++    exception::{self, asynchronous::IRQHandlerDescriptor},
++};
++use core::fmt;
 +
 +//--------------------------------------------------------------------------------------------------
 +// Private Definitions
@@ -1718,10 +1773,8 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interru
 +// Public Definitions
 +//--------------------------------------------------------------------------------------------------
 +
-+pub type LocalIRQ =
-+    exception::asynchronous::IRQNumber<{ InterruptController::MAX_LOCAL_IRQ_NUMBER }>;
-+pub type PeripheralIRQ =
-+    exception::asynchronous::IRQNumber<{ InterruptController::MAX_PERIPHERAL_IRQ_NUMBER }>;
++pub type LocalIRQ = BoundedUsize<{ InterruptController::MAX_LOCAL_IRQ_NUMBER }>;
++pub type PeripheralIRQ = BoundedUsize<{ InterruptController::MAX_PERIPHERAL_IRQ_NUMBER }>;
 +
 +/// Used for the associated type of trait [`exception::asynchronous::interface::IRQManager`].
 +#[derive(Copy, Clone)]
@@ -1764,6 +1817,15 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interru
 +// Public Code
 +//--------------------------------------------------------------------------------------------------
 +
++impl fmt::Display for IRQNumber {
++    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
++        match self {
++            Self::Local(number) => write!(f, "Local({})", number),
++            Self::Peripheral(number) => write!(f, "Peripheral({})", number),
++        }
++    }
++}
++
 +impl InterruptController {
 +    // Restrict to 3 for now. This makes future code for local_ic.rs more straight forward.
 +    const MAX_LOCAL_IRQ_NUMBER: usize = 3;
@@ -1788,6 +1850,8 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interru
 +//------------------------------------------------------------------------------
 +
 +impl driver::interface::DeviceDriver for InterruptController {
++    type IRQNumberType = IRQNumber;
++
 +    fn compatible(&self) -> &'static str {
 +        Self::COMPATIBLE
 +    }
@@ -1798,16 +1862,23 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interru
 +
 +    fn register_handler(
 +        &self,
-+        irq: Self::IRQNumberType,
-+        descriptor: exception::asynchronous::IRQDescriptor,
++        irq_handler_descriptor: exception::asynchronous::IRQHandlerDescriptor<Self::IRQNumberType>,
 +    ) -> Result<(), &'static str> {
-+        match irq {
++        match irq_handler_descriptor.number() {
 +            IRQNumber::Local(_) => unimplemented!("Local IRQ controller not implemented."),
-+            IRQNumber::Peripheral(pirq) => self.periph.register_handler(pirq, descriptor),
++            IRQNumber::Peripheral(pirq) => {
++                let periph_descriptor = IRQHandlerDescriptor::new(
++                    pirq,
++                    irq_handler_descriptor.name(),
++                    irq_handler_descriptor.handler(),
++                );
++
++                self.periph.register_handler(periph_descriptor)
++            }
 +        }
 +    }
 +
-+    fn enable(&self, irq: Self::IRQNumberType) {
++    fn enable(&self, irq: &Self::IRQNumberType) {
 +        match irq {
 +            IRQNumber::Local(_) => unimplemented!("Local IRQ controller not implemented."),
 +            IRQNumber::Peripheral(pirq) => self.periph.enable(pirq),
@@ -1830,18 +1901,21 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interru
 diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 --- 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 +++ 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
-@@ -10,8 +10,8 @@
+@@ -10,8 +10,11 @@
  //! - <https://developer.arm.com/documentation/ddi0183/latest>
 
  use crate::{
 -    bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, synchronization,
 -    synchronization::NullLock,
-+    bsp, bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, exception,
-+    synchronization, synchronization::IRQSafeNullLock,
++    bsp::device_driver::common::MMIODerefWrapper,
++    console, cpu, driver,
++    exception::{self, asynchronous::IRQNumber},
++    synchronization,
++    synchronization::IRQSafeNullLock,
  };
  use core::fmt;
  use tock_registers::{
-@@ -134,6 +134,52 @@
+@@ -134,6 +137,52 @@
          ]
      ],
 
@@ -1894,7 +1968,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_u
      /// Interrupt Clear Register.
      ICR [
          /// Meta field for all pending interrupts.
-@@ -152,7 +198,10 @@
+@@ -152,7 +201,10 @@
          (0x28 => FBRD: WriteOnly<u32, FBRD::Register>),
          (0x2c => LCR_H: WriteOnly<u32, LCR_H::Register>),
          (0x30 => CR: WriteOnly<u32, CR::Register>),
@@ -1906,17 +1980,16 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_u
          (0x44 => ICR: WriteOnly<u32, ICR::Register>),
          (0x48 => @END),
      }
-@@ -179,7 +228,8 @@
+@@ -179,7 +231,7 @@
 
  /// Representation of the UART.
  pub struct PL011Uart {
 -    inner: NullLock<PL011UartInner>,
 +    inner: IRQSafeNullLock<PL011UartInner>,
-+    irq_number: bsp::device_driver::IRQNumber,
  }
 
  //--------------------------------------------------------------------------------------------------
-@@ -247,6 +297,14 @@
+@@ -247,6 +299,14 @@
              .LCR_H
              .write(LCR_H::WLEN::EightBit + LCR_H::FEN::FifosEnabled);
 
@@ -1931,37 +2004,39 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_u
          // Turn the UART on.
          self.registers
              .CR
-@@ -335,9 +393,13 @@
-     /// # Safety
-     ///
+@@ -337,7 +397,7 @@
      /// - The user must ensure to provide a correct MMIO start address.
--    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
-+    pub const unsafe fn new(
-+        mmio_start_addr: usize,
-+        irq_number: bsp::device_driver::IRQNumber,
-+    ) -> Self {
+     pub const unsafe fn new(mmio_start_addr: usize) -> Self {
          Self {
 -            inner: NullLock::new(PL011UartInner::new(mmio_start_addr)),
 +            inner: IRQSafeNullLock::new(PL011UartInner::new(mmio_start_addr)),
-+            irq_number,
          }
      }
  }
+@@ -348,6 +408,8 @@
+ use synchronization::interface::Mutex;
+
+ impl driver::interface::DeviceDriver for PL011Uart {
++    type IRQNumberType = IRQNumber;
++
+     fn compatible(&self) -> &'static str {
+         Self::COMPATIBLE
+     }
 @@ -357,6 +419,20 @@
 
          Ok(())
      }
 +
-+    fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
-+        use exception::asynchronous::{irq_manager, IRQDescriptor};
++    fn register_and_enable_irq_handler(
++        &'static self,
++        irq_number: &Self::IRQNumberType,
++    ) -> Result<(), &'static str> {
++        use exception::asynchronous::{irq_manager, IRQHandlerDescriptor};
 +
-+        let descriptor = IRQDescriptor {
-+            name: Self::COMPATIBLE,
-+            handler: self,
-+        };
++        let descriptor = IRQHandlerDescriptor::new(*irq_number, Self::COMPATIBLE, self);
 +
-+        irq_manager().register_handler(self.irq_number, descriptor)?;
-+        irq_manager().enable(self.irq_number);
++        irq_manager().register_handler(descriptor)?;
++        irq_manager().enable(irq_number);
 +
 +        Ok(())
 +    }
@@ -2010,6 +2085,56 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm.rs 13_exception
 +pub use bcm2xxx_interrupt_controller::*;
  pub use bcm2xxx_pl011_uart::*;
 
+diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/common.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/common.rs
+--- 12_integrated_testing/kernel/src/bsp/device_driver/common.rs
++++ 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/common.rs
+@@ -4,7 +4,7 @@
+
+ //! Common device driver code.
+
+-use core::{marker::PhantomData, ops};
++use core::{fmt, marker::PhantomData, ops};
+
+ //--------------------------------------------------------------------------------------------------
+ // Public Definitions
+@@ -15,6 +15,10 @@
+     phantom: PhantomData<fn() -> T>,
+ }
+
++/// A wrapper type for usize with integrated range bound check.
++#[derive(Copy, Clone)]
++pub struct BoundedUsize<const MAX_INCLUSIVE: usize>(usize);
++
+ //--------------------------------------------------------------------------------------------------
+ // Public Code
+ //--------------------------------------------------------------------------------------------------
+@@ -36,3 +40,25 @@
+         unsafe { &*(self.start_addr as *const _) }
+     }
+ }
++
++impl<const MAX_INCLUSIVE: usize> BoundedUsize<{ MAX_INCLUSIVE }> {
++    pub const MAX_INCLUSIVE: usize = MAX_INCLUSIVE;
++
++    /// Creates a new instance if number <= MAX_INCLUSIVE.
++    pub const fn new(number: usize) -> Self {
++        assert!(number <= MAX_INCLUSIVE);
++
++        Self(number)
++    }
++
++    /// Return the wrapped number.
++    pub const fn get(self) -> usize {
++        self.0
++    }
++}
++
++impl<const MAX_INCLUSIVE: usize> fmt::Display for BoundedUsize<{ MAX_INCLUSIVE }> {
++    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
++        write!(f, "{}", self.0)
++    }
++}
+
 diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver.rs
 --- 12_integrated_testing/kernel/src/bsp/device_driver.rs
 +++ 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver.rs
@@ -2031,72 +2156,111 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver.rs 13_exceptions_pa
 diff -uNr 12_integrated_testing/kernel/src/bsp/raspberrypi/driver.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/driver.rs
 --- 12_integrated_testing/kernel/src/bsp/raspberrypi/driver.rs
 +++ 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/driver.rs
-@@ -4,29 +4,43 @@
+@@ -4,8 +4,12 @@
 
  //! BSP driver support.
 
 -use super::memory::map::mmio;
+-use crate::{bsp::device_driver, console, driver as generic_driver};
 +use super::{exception, memory::map::mmio};
- use crate::{bsp::device_driver, driver};
++use crate::{
++    bsp::device_driver,
++    console, driver as generic_driver,
++    exception::{self as generic_exception},
++};
+ use core::sync::atomic::{AtomicBool, Ordering};
 
-+pub use device_driver::IRQNumber;
+ //--------------------------------------------------------------------------------------------------
+@@ -16,6 +20,14 @@
+     unsafe { device_driver::PL011Uart::new(mmio::PL011_UART_START) };
+ static GPIO: device_driver::GPIO = unsafe { device_driver::GPIO::new(mmio::GPIO_START) };
+
++#[cfg(feature = "bsp_rpi3")]
++static INTERRUPT_CONTROLLER: device_driver::InterruptController =
++    unsafe { device_driver::InterruptController::new(mmio::PERIPHERAL_IC_START) };
++
++#[cfg(feature = "bsp_rpi4")]
++static INTERRUPT_CONTROLLER: device_driver::GICv2 =
++    unsafe { device_driver::GICv2::new(mmio::GICD_START, mmio::GICC_START) };
 +
  //--------------------------------------------------------------------------------------------------
- // Private Definitions
+ // Private Code
  //--------------------------------------------------------------------------------------------------
-
- /// Device Driver Manager type.
- struct BSPDriverManager {
--    device_drivers: [&'static (dyn DeviceDriver + Sync); 2],
-+    device_drivers: [&'static (dyn DeviceDriver + Sync); 3],
+@@ -33,21 +45,43 @@
+     Ok(())
  }
 
- //--------------------------------------------------------------------------------------------------
- // Global instances
- //--------------------------------------------------------------------------------------------------
++/// This must be called only after successful init of the interrupt controller driver.
++fn post_init_interrupt_controller() -> Result<(), &'static str> {
++    generic_exception::asynchronous::register_irq_manager(&INTERRUPT_CONTROLLER);
++
++    Ok(())
++}
++
+ fn driver_uart() -> Result<(), &'static str> {
+-    let uart_descriptor =
+-        generic_driver::DeviceDriverDescriptor::new(&PL011_UART, Some(post_init_uart));
++    let uart_descriptor = generic_driver::DeviceDriverDescriptor::new(
++        &PL011_UART,
++        Some(post_init_uart),
++        Some(exception::asynchronous::irq_map::PL011_UART),
++    );
+     generic_driver::driver_manager().register_driver(uart_descriptor);
+
+     Ok(())
+ }
 
--pub(super) static PL011_UART: device_driver::PL011Uart =
--    unsafe { device_driver::PL011Uart::new(mmio::PL011_UART_START) };
-+pub(super) static PL011_UART: device_driver::PL011Uart = unsafe {
-+    device_driver::PL011Uart::new(
-+        mmio::PL011_UART_START,
-+        exception::asynchronous::irq_map::PL011_UART,
-+    )
-+};
+ fn driver_gpio() -> Result<(), &'static str> {
+-    let gpio_descriptor = generic_driver::DeviceDriverDescriptor::new(&GPIO, Some(post_init_gpio));
++    let gpio_descriptor =
++        generic_driver::DeviceDriverDescriptor::new(&GPIO, Some(post_init_gpio), None);
+     generic_driver::driver_manager().register_driver(gpio_descriptor);
 
- static GPIO: device_driver::GPIO = unsafe { device_driver::GPIO::new(mmio::GPIO_START) };
+     Ok(())
+ }
 
-+#[cfg(feature = "bsp_rpi3")]
-+pub(super) static INTERRUPT_CONTROLLER: device_driver::InterruptController =
-+    unsafe { device_driver::InterruptController::new(mmio::PERIPHERAL_INTERRUPT_CONTROLLER_START) };
++fn driver_interrupt_controller() -> Result<(), &'static str> {
++    let interrupt_controller_descriptor = generic_driver::DeviceDriverDescriptor::new(
++        &INTERRUPT_CONTROLLER,
++        Some(post_init_interrupt_controller),
++        None,
++    );
++    generic_driver::driver_manager().register_driver(interrupt_controller_descriptor);
 +
-+#[cfg(feature = "bsp_rpi4")]
-+pub(super) static INTERRUPT_CONTROLLER: device_driver::GICv2 =
-+    unsafe { device_driver::GICv2::new(mmio::GICD_START, mmio::GICC_START) };
++    Ok(())
++}
 +
- static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
--    device_drivers: [&PL011_UART, &GPIO],
-+    device_drivers: [&PL011_UART, &GPIO, &INTERRUPT_CONTROLLER],
- };
-
  //--------------------------------------------------------------------------------------------------
+ // Public Code
+ //--------------------------------------------------------------------------------------------------
+@@ -65,6 +99,7 @@
+
+     driver_uart()?;
+     driver_gpio()?;
++    driver_interrupt_controller()?;
+
+     INIT_DONE.store(true, Ordering::Relaxed);
+     Ok(())
 
 diff -uNr 12_integrated_testing/kernel/src/bsp/raspberrypi/exception/asynchronous.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
 --- 12_integrated_testing/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
 +++ 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
-@@ -0,0 +1,36 @@
+@@ -0,0 +1,28 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! BSP asynchronous exception handling.
 +
-+use crate::{bsp, bsp::driver, exception};
++use crate::bsp;
 +
 +//--------------------------------------------------------------------------------------------------
 +// Public Definitions
 +//--------------------------------------------------------------------------------------------------
 +
++/// Export for reuse in generic asynchronous.rs.
++pub use bsp::device_driver::IRQNumber;
++
 +#[cfg(feature = "bsp_rpi3")]
 +pub(in crate::bsp) mod irq_map {
 +    use super::bsp::device_driver::{IRQNumber, PeripheralIRQ};
@@ -2110,17 +2274,6 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/raspberrypi/exception/asynchronou
 +
 +    pub const PL011_UART: IRQNumber = IRQNumber::new(153);
 +}
-+
-+//--------------------------------------------------------------------------------------------------
-+// Public Code
-+//--------------------------------------------------------------------------------------------------
-+
-+/// Return a reference to the IRQ manager.
-+pub fn irq_manager() -> &'static impl exception::asynchronous::interface::IRQManager<
-+    IRQNumberType = bsp::device_driver::IRQNumber,
-+> {
-+    &driver::INTERRUPT_CONTROLLER
-+}
 
 diff -uNr 12_integrated_testing/kernel/src/bsp/raspberrypi/exception.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/exception.rs
 --- 12_integrated_testing/kernel/src/bsp/raspberrypi/exception.rs
@@ -2145,11 +2298,11 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/raspberrypi/memory.rs 13_exceptio
 -        pub const GPIO_START:       usize = START + GPIO_OFFSET;
 -        pub const PL011_UART_START: usize = START + UART_OFFSET;
 -        pub const END_INCLUSIVE:    usize =         0x4000_FFFF;
-+        pub const START:                                 usize =         0x3F00_0000;
-+        pub const PERIPHERAL_INTERRUPT_CONTROLLER_START: usize = START + 0x0000_B200;
-+        pub const GPIO_START:                            usize = START + GPIO_OFFSET;
-+        pub const PL011_UART_START:                      usize = START + UART_OFFSET;
-+        pub const END_INCLUSIVE:                         usize =         0x4000_FFFF;
++        pub const START:               usize =         0x3F00_0000;
++        pub const PERIPHERAL_IC_START: usize = START + 0x0000_B200;
++        pub const GPIO_START:          usize = START + GPIO_OFFSET;
++        pub const PL011_UART_START:    usize = START + UART_OFFSET;
++        pub const END_INCLUSIVE:       usize =         0x4000_FFFF;
      }
 
      /// Physical devices.
@@ -2166,8 +2319,8 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/raspberrypi/memory.rs 13_exceptio
 diff -uNr 12_integrated_testing/kernel/src/bsp/raspberrypi.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi.rs
 --- 12_integrated_testing/kernel/src/bsp/raspberrypi.rs
 +++ 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi.rs
-@@ -7,6 +7,7 @@
- pub mod console;
+@@ -6,6 +6,7 @@
+
  pub mod cpu;
  pub mod driver;
 +pub mod exception;
@@ -2175,6 +2328,47 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/raspberrypi.rs 13_exceptions_part
 
  //--------------------------------------------------------------------------------------------------
 
+diff -uNr 12_integrated_testing/kernel/src/console.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/console.rs
+--- 12_integrated_testing/kernel/src/console.rs
++++ 13_exceptions_part2_peripheral_IRQs/kernel/src/console.rs
+@@ -6,7 +6,7 @@
+
+ mod null_console;
+
+-use crate::synchronization::{self, NullLock};
++use crate::synchronization;
+
+ //--------------------------------------------------------------------------------------------------
+ // Public Definitions
+@@ -60,22 +60,22 @@
+ // Global instances
+ //--------------------------------------------------------------------------------------------------
+
+-static CUR_CONSOLE: NullLock<&'static (dyn interface::All + Sync)> =
+-    NullLock::new(&null_console::NULL_CONSOLE);
++static CUR_CONSOLE: InitStateLock<&'static (dyn interface::All + Sync)> =
++    InitStateLock::new(&null_console::NULL_CONSOLE);
+
+ //--------------------------------------------------------------------------------------------------
+ // Public Code
+ //--------------------------------------------------------------------------------------------------
+-use synchronization::interface::Mutex;
++use synchronization::{interface::ReadWriteEx, InitStateLock};
+
+ /// Register a new console.
+ pub fn register_console(new_console: &'static (dyn interface::All + Sync)) {
+-    CUR_CONSOLE.lock(|con| *con = new_console);
++    CUR_CONSOLE.write(|con| *con = new_console);
+ }
+
+ /// Return a reference to the currently registered console.
+ ///
+ /// This is the global console used by all printing macros.
+ pub fn console() -> &'static dyn interface::All {
+-    CUR_CONSOLE.lock(|con| *con)
++    CUR_CONSOLE.read(|con| *con)
+ }
+
 diff -uNr 12_integrated_testing/kernel/src/cpu/smp.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/cpu/smp.rs
 --- 12_integrated_testing/kernel/src/cpu/smp.rs
 +++ 13_exceptions_part2_peripheral_IRQs/kernel/src/cpu/smp.rs
@@ -2210,32 +2404,267 @@ diff -uNr 12_integrated_testing/kernel/src/cpu.rs 13_exceptions_part2_peripheral
 diff -uNr 12_integrated_testing/kernel/src/driver.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/driver.rs
 --- 12_integrated_testing/kernel/src/driver.rs
 +++ 13_exceptions_part2_peripheral_IRQs/kernel/src/driver.rs
-@@ -23,6 +23,14 @@
+@@ -5,9 +5,10 @@
+ //! Driver support.
+
+ use crate::{
+-    info,
+-    synchronization::{interface::Mutex, NullLock},
++    exception, info,
++    synchronization::{interface::ReadWriteEx, InitStateLock},
+ };
++use core::fmt;
+
+ //--------------------------------------------------------------------------------------------------
+ // Private Definitions
+@@ -15,9 +16,12 @@
+
+ const NUM_DRIVERS: usize = 5;
+
+-struct DriverManagerInner {
++struct DriverManagerInner<T>
++where
++    T: 'static,
++{
+     next_index: usize,
+-    descriptors: [Option<DeviceDriverDescriptor>; NUM_DRIVERS],
++    descriptors: [Option<DeviceDriverDescriptor<T>>; NUM_DRIVERS],
+ }
+
+ //--------------------------------------------------------------------------------------------------
+@@ -28,6 +32,9 @@
+ pub mod interface {
+     /// Device Driver functions.
+     pub trait DeviceDriver {
++        /// Different interrupt controllers might use different types for IRQ number.
++        type IRQNumberType: super::fmt::Display;
++
+         /// Return a compatibility string for identifying the driver.
+         fn compatible(&self) -> &'static str;
+
+@@ -39,6 +46,21 @@
          unsafe fn init(&self) -> Result<(), &'static str> {
              Ok(())
          }
 +
-+        /// Called by the kernel to register and enable the device's IRQ handlers, if any.
++        /// Called by the kernel to register and enable the device's IRQ handler.
 +        ///
 +        /// Rust's type system will prevent a call to this function unless the calling instance
 +        /// itself has static lifetime.
-+        fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
-+            Ok(())
++        fn register_and_enable_irq_handler(
++            &'static self,
++            irq_number: &Self::IRQNumberType,
++        ) -> Result<(), &'static str> {
++            panic!(
++                "Attempt to enable IRQ {} for device {}, but driver does not support this",
++                irq_number,
++                self.compatible()
++            )
 +        }
      }
+ }
+
+@@ -47,27 +69,37 @@
+
+ /// A descriptor for device drivers.
+ #[derive(Copy, Clone)]
+-pub struct DeviceDriverDescriptor {
+-    device_driver: &'static (dyn interface::DeviceDriver + Sync),
++pub struct DeviceDriverDescriptor<T>
++where
++    T: 'static,
++{
++    device_driver: &'static (dyn interface::DeviceDriver<IRQNumberType = T> + Sync),
+     post_init_callback: Option<DeviceDriverPostInitCallback>,
++    irq_number: Option<T>,
+ }
+
+ /// Provides device driver management functions.
+-pub struct DriverManager {
+-    inner: NullLock<DriverManagerInner>,
++pub struct DriverManager<T>
++where
++    T: 'static,
++{
++    inner: InitStateLock<DriverManagerInner<T>>,
+ }
+
+ //--------------------------------------------------------------------------------------------------
+ // Global instances
+ //--------------------------------------------------------------------------------------------------
 
-     /// Device driver management functions.
+-static DRIVER_MANAGER: DriverManager = DriverManager::new();
++static DRIVER_MANAGER: DriverManager<exception::asynchronous::IRQNumber> = DriverManager::new();
+
+ //--------------------------------------------------------------------------------------------------
+ // Private Code
+ //--------------------------------------------------------------------------------------------------
+
+-impl DriverManagerInner {
++impl<T> DriverManagerInner<T>
++where
++    T: 'static + Copy,
++{
+     /// Create an instance.
+     pub const fn new() -> Self {
+         Self {
+@@ -81,43 +113,48 @@
+ // Public Code
+ //--------------------------------------------------------------------------------------------------
+
+-impl DeviceDriverDescriptor {
++impl<T> DeviceDriverDescriptor<T> {
+     /// Create an instance.
+     pub fn new(
+-        device_driver: &'static (dyn interface::DeviceDriver + Sync),
++        device_driver: &'static (dyn interface::DeviceDriver<IRQNumberType = T> + Sync),
+         post_init_callback: Option<DeviceDriverPostInitCallback>,
++        irq_number: Option<T>,
+     ) -> Self {
+         Self {
+             device_driver,
+             post_init_callback,
++            irq_number,
+         }
+     }
+ }
+
+ /// Return a reference to the global DriverManager.
+-pub fn driver_manager() -> &'static DriverManager {
++pub fn driver_manager() -> &'static DriverManager<exception::asynchronous::IRQNumber> {
+     &DRIVER_MANAGER
+ }
+
+-impl DriverManager {
++impl<T> DriverManager<T>
++where
++    T: fmt::Display + Copy,
++{
+     /// Create an instance.
+     pub const fn new() -> Self {
+         Self {
+-            inner: NullLock::new(DriverManagerInner::new()),
++            inner: InitStateLock::new(DriverManagerInner::new()),
+         }
+     }
+
+     /// Register a device driver with the kernel.
+-    pub fn register_driver(&self, descriptor: DeviceDriverDescriptor) {
+-        self.inner.lock(|inner| {
++    pub fn register_driver(&self, descriptor: DeviceDriverDescriptor<T>) {
++        self.inner.write(|inner| {
+             inner.descriptors[inner.next_index] = Some(descriptor);
+             inner.next_index += 1;
+         })
+     }
+
+     /// Helper for iterating over registered drivers.
+-    fn for_each_descriptor<'a>(&'a self, f: impl FnMut(&'a DeviceDriverDescriptor)) {
+-        self.inner.lock(|inner| {
++    fn for_each_descriptor<'a>(&'a self, f: impl FnMut(&'a DeviceDriverDescriptor<T>)) {
++        self.inner.read(|inner| {
+             inner
+                 .descriptors
+                 .iter()
+@@ -126,12 +163,12 @@
+         })
+     }
+
+-    /// Fully initialize all drivers.
++    /// Fully initialize all drivers and their interrupts handlers.
+     ///
+     /// # Safety
+     ///
+     /// - During init, drivers might do stuff with system-wide impact.
+-    pub unsafe fn init_drivers(&self) {
++    pub unsafe fn init_drivers_and_irqs(&self) {
+         self.for_each_descriptor(|descriptor| {
+             // 1. Initialize driver.
+             if let Err(x) = descriptor.device_driver.init() {
+@@ -150,6 +187,23 @@
+                         descriptor.device_driver.compatible(),
+                         x
+                     );
++                }
++            }
++        });
++
++        // 3. After all post-init callbacks were done, the interrupt controller should be
++        //    registered and functional. So let drivers register with it now.
++        self.for_each_descriptor(|descriptor| {
++            if let Some(irq_number) = &descriptor.irq_number {
++                if let Err(x) = descriptor
++                    .device_driver
++                    .register_and_enable_irq_handler(irq_number)
++                {
++                    panic!(
++                        "Error during driver interrupt handler registration: {}: {}",
++                        descriptor.device_driver.compatible(),
++                        x
++                    );
+                 }
+             }
+         });
+
+diff -uNr 12_integrated_testing/kernel/src/exception/asynchronous/null_irq_manager.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous/null_irq_manager.rs
+--- 12_integrated_testing/kernel/src/exception/asynchronous/null_irq_manager.rs
++++ 13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous/null_irq_manager.rs
+@@ -0,0 +1,42 @@
++// SPDX-License-Identifier: MIT OR Apache-2.0
++//
++// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++
++//! Null IRQ Manager.
++
++use super::{interface, IRQContext, IRQHandlerDescriptor};
++
++//--------------------------------------------------------------------------------------------------
++// Public Definitions
++//--------------------------------------------------------------------------------------------------
++
++pub struct NullIRQManager;
++
++//--------------------------------------------------------------------------------------------------
++// Global instances
++//--------------------------------------------------------------------------------------------------
++
++pub static NULL_IRQ_MANAGER: NullIRQManager = NullIRQManager {};
++
++//--------------------------------------------------------------------------------------------------
++// Public Code
++//--------------------------------------------------------------------------------------------------
++
++impl interface::IRQManager for NullIRQManager {
++    type IRQNumberType = super::IRQNumber;
++
++    fn register_handler(
++        &self,
++        _descriptor: IRQHandlerDescriptor<Self::IRQNumberType>,
++    ) -> Result<(), &'static str> {
++        panic!("No IRQ Manager registered yet");
++    }
++
++    fn enable(&self, _irq_number: &Self::IRQNumberType) {
++        panic!("No IRQ Manager registered yet");
++    }
++
++    fn handle_pending_irqs<'irq_context>(&'irq_context self, _ic: &IRQContext<'irq_context>) {
++        panic!("No IRQ Manager registered yet");
++    }
++}
 
 diff -uNr 12_integrated_testing/kernel/src/exception/asynchronous.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.rs
 --- 12_integrated_testing/kernel/src/exception/asynchronous.rs
 +++ 13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.rs
-@@ -8,7 +8,152 @@
+@@ -7,8 +7,184 @@
+ #[cfg(target_arch = "aarch64")]
  #[path = "../_arch/aarch64/exception/asynchronous.rs"]
  mod arch_asynchronous;
-
-+use crate::bsp;
-+use core::{fmt, marker::PhantomData};
++mod null_irq_manager;
 +
++use crate::{bsp, synchronization};
++use core::marker::PhantomData;
+
  //--------------------------------------------------------------------------------------------------
  // Architectural Public Reexports
  //--------------------------------------------------------------------------------------------------
@@ -2249,14 +2678,23 @@ diff -uNr 12_integrated_testing/kernel/src/exception/asynchronous.rs 13_exceptio
 +// Public Definitions
 +//--------------------------------------------------------------------------------------------------
 +
++/// Interrupt number as defined by the BSP.
++pub type IRQNumber = bsp::exception::asynchronous::IRQNumber;
++
 +/// Interrupt descriptor.
 +#[derive(Copy, Clone)]
-+pub struct IRQDescriptor {
++pub struct IRQHandlerDescriptor<T>
++where
++    T: Copy,
++{
++    /// The IRQ number.
++    number: T,
++
 +    /// Descriptive name.
-+    pub name: &'static str,
++    name: &'static str,
 +
 +    /// Reference to handler trait object.
-+    pub handler: &'static (dyn interface::IRQHandler + Sync),
++    handler: &'static (dyn interface::IRQHandler + Sync),
 +}
 +
 +/// IRQContext token.
@@ -2286,17 +2724,16 @@ diff -uNr 12_integrated_testing/kernel/src/exception/asynchronous.rs 13_exceptio
 +    /// platform's interrupt controller.
 +    pub trait IRQManager {
 +        /// The IRQ number type depends on the implementation.
-+        type IRQNumberType;
++        type IRQNumberType: Copy;
 +
 +        /// Register a handler.
 +        fn register_handler(
 +            &self,
-+            irq_number: Self::IRQNumberType,
-+            descriptor: super::IRQDescriptor,
++            irq_handler_descriptor: super::IRQHandlerDescriptor<Self::IRQNumberType>,
 +        ) -> Result<(), &'static str>;
 +
 +        /// Enable an interrupt in the controller.
-+        fn enable(&self, irq_number: Self::IRQNumberType);
++        fn enable(&self, irq_number: &Self::IRQNumberType);
 +
 +        /// Handle pending interrupts.
 +        ///
@@ -2312,17 +2749,55 @@ diff -uNr 12_integrated_testing/kernel/src/exception/asynchronous.rs 13_exceptio
 +        );
 +
 +        /// Print list of registered handlers.
-+        fn print_handler(&self);
++        fn print_handler(&self) {}
 +    }
 +}
 +
-+/// A wrapper type for IRQ numbers with integrated range sanity check.
-+#[derive(Copy, Clone)]
-+pub struct IRQNumber<const MAX_INCLUSIVE: usize>(usize);
++//--------------------------------------------------------------------------------------------------
++// Global instances
++//--------------------------------------------------------------------------------------------------
++
++static CUR_IRQ_MANAGER: InitStateLock<
++    &'static (dyn interface::IRQManager<IRQNumberType = IRQNumber> + Sync),
++> = InitStateLock::new(&null_irq_manager::NULL_IRQ_MANAGER);
 +
 +//--------------------------------------------------------------------------------------------------
 +// Public Code
 +//--------------------------------------------------------------------------------------------------
++use synchronization::{interface::ReadWriteEx, InitStateLock};
++
++impl<T> IRQHandlerDescriptor<T>
++where
++    T: Copy,
++{
++    /// Create an instance.
++    pub const fn new(
++        number: T,
++        name: &'static str,
++        handler: &'static (dyn interface::IRQHandler + Sync),
++    ) -> Self {
++        Self {
++            number,
++            name,
++            handler,
++        }
++    }
++
++    /// Return the number.
++    pub const fn number(&self) -> T {
++        self.number
++    }
++
++    /// Return the name.
++    pub const fn name(&self) -> &'static str {
++        self.name
++    }
++
++    /// Return the handler.
++    pub const fn handler(&self) -> &'static (dyn interface::IRQHandler + Sync) {
++        self.handler
++    }
++}
 +
 +impl<'irq_context> IRQContext<'irq_context> {
 +    /// Creates an IRQContext token.
@@ -2341,29 +2816,6 @@ diff -uNr 12_integrated_testing/kernel/src/exception/asynchronous.rs 13_exceptio
 +    }
 +}
 +
-+impl<const MAX_INCLUSIVE: usize> IRQNumber<{ MAX_INCLUSIVE }> {
-+    /// The total number of IRQs this type supports.
-+    pub const NUM_TOTAL: usize = MAX_INCLUSIVE + 1;
-+
-+    /// Creates a new instance if number <= MAX_INCLUSIVE.
-+    pub const fn new(number: usize) -> Self {
-+        assert!(number <= MAX_INCLUSIVE);
-+
-+        Self(number)
-+    }
-+
-+    /// Return the wrapped number.
-+    pub const fn get(self) -> usize {
-+        self.0
-+    }
-+}
-+
-+impl<const MAX_INCLUSIVE: usize> fmt::Display for IRQNumber<{ MAX_INCLUSIVE }> {
-+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
-+        write!(f, "{}", self.0)
-+    }
-+}
-+
 +/// Executes the provided closure while IRQs are masked on the executing core.
 +///
 +/// While the function temporarily changes the HW state of the executing core, it restores it to the
@@ -2377,11 +2829,18 @@ diff -uNr 12_integrated_testing/kernel/src/exception/asynchronous.rs 13_exceptio
 +    ret
 +}
 +
-+/// Return a reference to the IRQ manager.
++/// Register a new IRQ manager.
++pub fn register_irq_manager(
++    new_manager: &'static (dyn interface::IRQManager<IRQNumberType = IRQNumber> + Sync),
++) {
++    CUR_IRQ_MANAGER.write(|manager| *manager = new_manager);
++}
++
++/// Return a reference to the currently registered IRQ manager.
 +///
 +/// This is the IRQ manager used by the architectural interrupt handling code.
-+pub fn irq_manager() -> &'static dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber> {
-+    bsp::exception::asynchronous::irq_manager()
++pub fn irq_manager() -> &'static dyn interface::IRQManager<IRQNumberType = IRQNumber> {
++    CUR_IRQ_MANAGER.read(|manager| *manager)
 +}
 
 diff -uNr 12_integrated_testing/kernel/src/lib.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
@@ -2404,7 +2863,7 @@ diff -uNr 12_integrated_testing/kernel/src/main.rs 13_exceptions_part2_periphera
  #![no_std]
 
 -use libkernel::{bsp, console, driver, exception, info, memory, time};
-+use libkernel::{bsp, cpu, driver, exception, info, memory, state, time, warn};
++use libkernel::{bsp, cpu, driver, exception, info, memory, state, time};
 
  /// Early init code.
  ///
@@ -2416,43 +2875,39 @@ diff -uNr 12_integrated_testing/kernel/src/main.rs 13_exceptions_part2_periphera
 +///       IRQSafeNullLocks instead of spinlocks), will fail to work (properly) on the RPi SoCs.
  #[no_mangle]
  unsafe fn kernel_init() -> ! {
-     use driver::interface::DriverManager;
-@@ -43,14 +43,27 @@
-     bsp::driver::driver_manager().post_device_driver_init();
-     // println! is usable from here on.
-
-+    // Let device drivers register and enable their handlers with the interrupt controller.
-+    for i in bsp::driver::driver_manager().all_device_drivers() {
-+        if let Err(msg) = i.register_and_enable_irq_handler() {
-+            warn!("Error registering IRQ handler: {}", msg);
-+        }
-+    }
+     use memory::mmu::interface::MMU;
+@@ -40,8 +40,13 @@
+     }
+
+     // Initialize all device drivers.
+-    driver::driver_manager().init_drivers();
+-    // println! is usable from here on.
++    driver::driver_manager().init_drivers_and_irqs();
 +
 +    // Unmask interrupts on the boot CPU core.
 +    exception::asynchronous::local_irq_unmask();
 +
 +    // Announce conclusion of the kernel_init() phase.
 +    state::state_manager().transition_to_single_core_main();
-+
+
      // Transition from unsafe to safe.
      kernel_main()
- }
+@@ -49,8 +54,6 @@
 
  /// The main function running after the early init.
  fn kernel_main() -> ! {
 -    use console::console;
-     use driver::interface::DriverManager;
-+    use exception::asynchronous::interface::IRQManager;
-
+-
      info!("{}", libkernel::version());
      info!("Booting on: {}", bsp::board_name());
-@@ -78,12 +91,9 @@
-         info!("      {}. {}", i + 1, driver.compatible());
-     }
+
+@@ -71,12 +74,9 @@
+     info!("Drivers loaded:");
+     driver::driver_manager().enumerate();
 
 -    info!("Echoing input now");
 +    info!("Registered IRQ handlers:");
-+    bsp::exception::asynchronous::irq_manager().print_handler();
++    exception::asynchronous::irq_manager().print_handler();
 
 -    // Discard any spurious received characters before going into echo mode.
 -    console().clear_rx();
@@ -2721,7 +3176,7 @@ diff -uNr 12_integrated_testing/kernel/src/synchronization.rs 13_exceptions_part
 diff -uNr 12_integrated_testing/kernel/tests/04_exception_irq_sanity.rs 13_exceptions_part2_peripheral_IRQs/kernel/tests/04_exception_irq_sanity.rs
 --- 12_integrated_testing/kernel/tests/04_exception_irq_sanity.rs
 +++ 13_exceptions_part2_peripheral_IRQs/kernel/tests/04_exception_irq_sanity.rs
-@@ -0,0 +1,67 @@
+@@ -0,0 +1,66 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
@@ -2734,13 +3189,12 @@ diff -uNr 12_integrated_testing/kernel/tests/04_exception_irq_sanity.rs 13_excep
 +#![reexport_test_harness_main = "test_main"]
 +#![test_runner(libkernel::test_runner)]
 +
-+use libkernel::{bsp, cpu, driver, exception};
++use libkernel::{bsp, cpu, exception};
 +use test_macros::kernel_test;
 +
 +#[no_mangle]
 +unsafe fn kernel_init() -> ! {
-+    use driver::interface::DriverManager;
-+    bsp::driver::driver_manager().qemu_bring_up_console();
++    bsp::driver::qemu_bring_up_console();
 +
 +    exception::handling_init();
 +    exception::asynchronous::local_irq_unmask();
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2.rs
index c810a59a8..2623c305f 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2.rs
@@ -79,20 +79,25 @@
 mod gicc;
 mod gicd;
 
-use crate::{bsp, cpu, driver, exception, synchronization, synchronization::InitStateLock};
+use crate::{
+    bsp::{self, device_driver::common::BoundedUsize},
+    cpu, driver, exception, synchronization,
+    synchronization::InitStateLock,
+};
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
-type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; IRQNumber::NUM_TOTAL];
+type HandlerTable = [Option<exception::asynchronous::IRQHandlerDescriptor<IRQNumber>>;
+    IRQNumber::MAX_INCLUSIVE + 1];
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
 /// Used for the associated type of trait [`exception::asynchronous::interface::IRQManager`].
-pub type IRQNumber = exception::asynchronous::IRQNumber<{ GICv2::MAX_IRQ_NUMBER }>;
+pub type IRQNumber = BoundedUsize<{ GICv2::MAX_IRQ_NUMBER }>;
 
 /// Representation of the GIC.
 pub struct GICv2 {
@@ -124,7 +129,7 @@ impl GICv2 {
         Self {
             gicd: gicd::GICD::new(gicd_mmio_start_addr),
             gicc: gicc::GICC::new(gicc_mmio_start_addr),
-            handler_table: InitStateLock::new([None; IRQNumber::NUM_TOTAL]),
+            handler_table: InitStateLock::new([None; IRQNumber::MAX_INCLUSIVE + 1]),
         }
     }
 }
@@ -135,6 +140,8 @@ impl GICv2 {
 use synchronization::interface::ReadWriteEx;
 
 impl driver::interface::DeviceDriver for GICv2 {
+    type IRQNumberType = IRQNumber;
+
     fn compatible(&self) -> &'static str {
         Self::COMPATIBLE
     }
@@ -156,23 +163,22 @@ impl exception::asynchronous::interface::IRQManager for GICv2 {
 
     fn register_handler(
         &self,
-        irq_number: Self::IRQNumberType,
-        descriptor: exception::asynchronous::IRQDescriptor,
+        irq_handler_descriptor: exception::asynchronous::IRQHandlerDescriptor<Self::IRQNumberType>,
     ) -> Result<(), &'static str> {
         self.handler_table.write(|table| {
-            let irq_number = irq_number.get();
+            let irq_number = irq_handler_descriptor.number().get();
 
             if table[irq_number].is_some() {
                 return Err("IRQ handler already registered");
             }
 
-            table[irq_number] = Some(descriptor);
+            table[irq_number] = Some(irq_handler_descriptor);
 
             Ok(())
         })
     }
 
-    fn enable(&self, irq_number: Self::IRQNumberType) {
+    fn enable(&self, irq_number: &Self::IRQNumberType) {
         self.gicd.enable(irq_number);
     }
 
@@ -195,7 +201,7 @@ impl exception::asynchronous::interface::IRQManager for GICv2 {
                 None => panic!("No handler registered for IRQ {}", irq_number),
                 Some(descriptor) => {
                     // Call the IRQ handler. Panics on failure.
-                    descriptor.handler.handle().expect("Error handling IRQ");
+                    descriptor.handler().handle().expect("Error handling IRQ");
                 }
             }
         });
@@ -212,7 +218,7 @@ impl exception::asynchronous::interface::IRQManager for GICv2 {
         self.handler_table.read(|table| {
             for (i, opt) in table.iter().skip(32).enumerate() {
                 if let Some(handler) = opt {
-                    info!("            {: >3}. {}", i + 32, handler.name);
+                    info!("            {: >3}. {}", i + 32, handler.name());
                 }
             }
         });
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
index 54aab60c6..2d18be9c4 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -170,7 +170,7 @@ impl GICD {
     }
 
     /// Enable an interrupt.
-    pub fn enable(&self, irq_num: super::IRQNumber) {
+    pub fn enable(&self, irq_num: &super::IRQNumber) {
         let irq_num = irq_num.get();
 
         // Each bit in the u32 enable register corresponds to one IRQ number. Shift right by 5
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 0f3e701fc..336cc8f7a 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -5,8 +5,8 @@
 //! GPIO Driver.
 
 use crate::{
-    bsp::device_driver::common::MMIODerefWrapper, driver, synchronization,
-    synchronization::IRQSafeNullLock,
+    bsp::device_driver::common::MMIODerefWrapper, driver, exception::asynchronous::IRQNumber,
+    synchronization, synchronization::IRQSafeNullLock,
 };
 use tock_registers::{
     interfaces::{ReadWriteable, Writeable},
@@ -216,6 +216,8 @@ impl GPIO {
 use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for GPIO {
+    type IRQNumberType = IRQNumber;
+
     fn compatible(&self) -> &'static str {
         Self::COMPATIBLE
     }
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
index a88899c29..22298f1c1 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -6,7 +6,12 @@
 
 mod peripheral_ic;
 
-use crate::{driver, exception};
+use crate::{
+    bsp::device_driver::common::BoundedUsize,
+    driver,
+    exception::{self, asynchronous::IRQHandlerDescriptor},
+};
+use core::fmt;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -21,10 +26,8 @@ struct PendingIRQs {
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
-pub type LocalIRQ =
-    exception::asynchronous::IRQNumber<{ InterruptController::MAX_LOCAL_IRQ_NUMBER }>;
-pub type PeripheralIRQ =
-    exception::asynchronous::IRQNumber<{ InterruptController::MAX_PERIPHERAL_IRQ_NUMBER }>;
+pub type LocalIRQ = BoundedUsize<{ InterruptController::MAX_LOCAL_IRQ_NUMBER }>;
+pub type PeripheralIRQ = BoundedUsize<{ InterruptController::MAX_PERIPHERAL_IRQ_NUMBER }>;
 
 /// Used for the associated type of trait [`exception::asynchronous::interface::IRQManager`].
 #[derive(Copy, Clone)]
@@ -67,6 +70,15 @@ impl Iterator for PendingIRQs {
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
+impl fmt::Display for IRQNumber {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        match self {
+            Self::Local(number) => write!(f, "Local({})", number),
+            Self::Peripheral(number) => write!(f, "Peripheral({})", number),
+        }
+    }
+}
+
 impl InterruptController {
     // Restrict to 3 for now. This makes future code for local_ic.rs more straight forward.
     const MAX_LOCAL_IRQ_NUMBER: usize = 3;
@@ -91,6 +103,8 @@ impl InterruptController {
 //------------------------------------------------------------------------------
 
 impl driver::interface::DeviceDriver for InterruptController {
+    type IRQNumberType = IRQNumber;
+
     fn compatible(&self) -> &'static str {
         Self::COMPATIBLE
     }
@@ -101,16 +115,23 @@ impl exception::asynchronous::interface::IRQManager for InterruptController {
 
     fn register_handler(
         &self,
-        irq: Self::IRQNumberType,
-        descriptor: exception::asynchronous::IRQDescriptor,
+        irq_handler_descriptor: exception::asynchronous::IRQHandlerDescriptor<Self::IRQNumberType>,
     ) -> Result<(), &'static str> {
-        match irq {
+        match irq_handler_descriptor.number() {
             IRQNumber::Local(_) => unimplemented!("Local IRQ controller not implemented."),
-            IRQNumber::Peripheral(pirq) => self.periph.register_handler(pirq, descriptor),
+            IRQNumber::Peripheral(pirq) => {
+                let periph_descriptor = IRQHandlerDescriptor::new(
+                    pirq,
+                    irq_handler_descriptor.name(),
+                    irq_handler_descriptor.handler(),
+                );
+
+                self.periph.register_handler(periph_descriptor)
+            }
         }
     }
 
-    fn enable(&self, irq: Self::IRQNumberType) {
+    fn enable(&self, irq: &Self::IRQNumberType) {
         match irq {
             IRQNumber::Local(_) => unimplemented!("Local IRQ controller not implemented."),
             IRQNumber::Peripheral(pirq) => self.periph.enable(pirq),
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index 90d9dd816..1af6f22f2 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -50,7 +50,8 @@ type WriteOnlyRegisters = MMIODerefWrapper<WORegisterBlock>;
 /// Abstraction for the ReadOnly parts of the associated MMIO registers.
 type ReadOnlyRegisters = MMIODerefWrapper<RORegisterBlock>;
 
-type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; PeripheralIRQ::NUM_TOTAL];
+type HandlerTable = [Option<exception::asynchronous::IRQHandlerDescriptor<PeripheralIRQ>>;
+    PeripheralIRQ::MAX_INCLUSIVE + 1];
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -82,7 +83,7 @@ impl PeripheralIC {
         Self {
             wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(mmio_start_addr)),
             ro_registers: ReadOnlyRegisters::new(mmio_start_addr),
-            handler_table: InitStateLock::new([None; PeripheralIRQ::NUM_TOTAL]),
+            handler_table: InitStateLock::new([None; PeripheralIRQ::MAX_INCLUSIVE + 1]),
         }
     }
 
@@ -105,23 +106,22 @@ impl exception::asynchronous::interface::IRQManager for PeripheralIC {
 
     fn register_handler(
         &self,
-        irq: Self::IRQNumberType,
-        descriptor: exception::asynchronous::IRQDescriptor,
+        irq_handler_descriptor: exception::asynchronous::IRQHandlerDescriptor<Self::IRQNumberType>,
     ) -> Result<(), &'static str> {
         self.handler_table.write(|table| {
-            let irq_number = irq.get();
+            let irq_number = irq_handler_descriptor.number().get();
 
             if table[irq_number].is_some() {
                 return Err("IRQ handler already registered");
             }
 
-            table[irq_number] = Some(descriptor);
+            table[irq_number] = Some(irq_handler_descriptor);
 
             Ok(())
         })
     }
 
-    fn enable(&self, irq: Self::IRQNumberType) {
+    fn enable(&self, irq: &Self::IRQNumberType) {
         self.wo_registers.lock(|regs| {
             let enable_reg = if irq.get() <= 31 {
                 &regs.ENABLE_1
@@ -147,7 +147,7 @@ impl exception::asynchronous::interface::IRQManager for PeripheralIC {
                     None => panic!("No handler registered for IRQ {}", irq_number),
                     Some(descriptor) => {
                         // Call the IRQ handler. Panics on failure.
-                        descriptor.handler.handle().expect("Error handling IRQ");
+                        descriptor.handler().handle().expect("Error handling IRQ");
                     }
                 }
             }
@@ -162,7 +162,7 @@ impl exception::asynchronous::interface::IRQManager for PeripheralIC {
         self.handler_table.read(|table| {
             for (i, opt) in table.iter().enumerate() {
                 if let Some(handler) = opt {
-                    info!("            {: >3}. {}", i, handler.name);
+                    info!("            {: >3}. {}", i, handler.name());
                 }
             }
         });
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index a96ebf7ee..71b3e2545 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -10,8 +10,11 @@
 //! - <https://developer.arm.com/documentation/ddi0183/latest>
 
 use crate::{
-    bsp, bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, exception,
-    synchronization, synchronization::IRQSafeNullLock,
+    bsp::device_driver::common::MMIODerefWrapper,
+    console, cpu, driver,
+    exception::{self, asynchronous::IRQNumber},
+    synchronization,
+    synchronization::IRQSafeNullLock,
 };
 use core::fmt;
 use tock_registers::{
@@ -229,7 +232,6 @@ struct PL011UartInner {
 /// Representation of the UART.
 pub struct PL011Uart {
     inner: IRQSafeNullLock<PL011UartInner>,
-    irq_number: bsp::device_driver::IRQNumber,
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -393,13 +395,9 @@ impl PL011Uart {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    pub const unsafe fn new(
-        mmio_start_addr: usize,
-        irq_number: bsp::device_driver::IRQNumber,
-    ) -> Self {
+    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
         Self {
             inner: IRQSafeNullLock::new(PL011UartInner::new(mmio_start_addr)),
-            irq_number,
         }
     }
 }
@@ -410,6 +408,8 @@ impl PL011Uart {
 use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for PL011Uart {
+    type IRQNumberType = IRQNumber;
+
     fn compatible(&self) -> &'static str {
         Self::COMPATIBLE
     }
@@ -420,16 +420,16 @@ impl driver::interface::DeviceDriver for PL011Uart {
         Ok(())
     }
 
-    fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
-        use exception::asynchronous::{irq_manager, IRQDescriptor};
+    fn register_and_enable_irq_handler(
+        &'static self,
+        irq_number: &Self::IRQNumberType,
+    ) -> Result<(), &'static str> {
+        use exception::asynchronous::{irq_manager, IRQHandlerDescriptor};
 
-        let descriptor = IRQDescriptor {
-            name: Self::COMPATIBLE,
-            handler: self,
-        };
+        let descriptor = IRQHandlerDescriptor::new(*irq_number, Self::COMPATIBLE, self);
 
-        irq_manager().register_handler(self.irq_number, descriptor)?;
-        irq_manager().enable(self.irq_number);
+        irq_manager().register_handler(descriptor)?;
+        irq_manager().enable(irq_number);
 
         Ok(())
     }
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/common.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/common.rs
index fd9e988ea..c368534ab 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/common.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/common.rs
@@ -4,7 +4,7 @@
 
 //! Common device driver code.
 
-use core::{marker::PhantomData, ops};
+use core::{fmt, marker::PhantomData, ops};
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -15,6 +15,10 @@ pub struct MMIODerefWrapper<T> {
     phantom: PhantomData<fn() -> T>,
 }
 
+/// A wrapper type for usize with integrated range bound check.
+#[derive(Copy, Clone)]
+pub struct BoundedUsize<const MAX_INCLUSIVE: usize>(usize);
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -36,3 +40,25 @@ impl<T> ops::Deref for MMIODerefWrapper<T> {
         unsafe { &*(self.start_addr as *const _) }
     }
 }
+
+impl<const MAX_INCLUSIVE: usize> BoundedUsize<{ MAX_INCLUSIVE }> {
+    pub const MAX_INCLUSIVE: usize = MAX_INCLUSIVE;
+
+    /// Creates a new instance if number <= MAX_INCLUSIVE.
+    pub const fn new(number: usize) -> Self {
+        assert!(number <= MAX_INCLUSIVE);
+
+        Self(number)
+    }
+
+    /// Return the wrapped number.
+    pub const fn get(self) -> usize {
+        self.0
+    }
+}
+
+impl<const MAX_INCLUSIVE: usize> fmt::Display for BoundedUsize<{ MAX_INCLUSIVE }> {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        write!(f, "{}", self.0)
+    }
+}
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi.rs
index 50b36762e..474419f4e 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi.rs
@@ -4,7 +4,6 @@
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
-pub mod console;
 pub mod cpu;
 pub mod driver;
 pub mod exception;
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/console.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/console.rs
deleted file mode 100644
index 0a630eef4..000000000
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/console.rs
+++ /dev/null
@@ -1,16 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
-
-//! BSP console facilities.
-
-use crate::console;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return a reference to the console.
-pub fn console() -> &'static dyn console::interface::All {
-    &super::driver::PL011_UART
-}
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/driver.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/driver.rs
index 568f1096d..91dd61331 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/driver.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/driver.rs
@@ -5,68 +5,109 @@
 //! BSP driver support.
 
 use super::{exception, memory::map::mmio};
-use crate::{bsp::device_driver, driver};
-
-pub use device_driver::IRQNumber;
-
-//--------------------------------------------------------------------------------------------------
-// Private Definitions
-//--------------------------------------------------------------------------------------------------
-
-/// Device Driver Manager type.
-struct BSPDriverManager {
-    device_drivers: [&'static (dyn DeviceDriver + Sync); 3],
-}
+use crate::{
+    bsp::device_driver,
+    console, driver as generic_driver,
+    exception::{self as generic_exception},
+};
+use core::sync::atomic::{AtomicBool, Ordering};
 
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
-pub(super) static PL011_UART: device_driver::PL011Uart = unsafe {
-    device_driver::PL011Uart::new(
-        mmio::PL011_UART_START,
-        exception::asynchronous::irq_map::PL011_UART,
-    )
-};
-
+static PL011_UART: device_driver::PL011Uart =
+    unsafe { device_driver::PL011Uart::new(mmio::PL011_UART_START) };
 static GPIO: device_driver::GPIO = unsafe { device_driver::GPIO::new(mmio::GPIO_START) };
 
 #[cfg(feature = "bsp_rpi3")]
-pub(super) static INTERRUPT_CONTROLLER: device_driver::InterruptController =
-    unsafe { device_driver::InterruptController::new(mmio::PERIPHERAL_INTERRUPT_CONTROLLER_START) };
+static INTERRUPT_CONTROLLER: device_driver::InterruptController =
+    unsafe { device_driver::InterruptController::new(mmio::PERIPHERAL_IC_START) };
 
 #[cfg(feature = "bsp_rpi4")]
-pub(super) static INTERRUPT_CONTROLLER: device_driver::GICv2 =
+static INTERRUPT_CONTROLLER: device_driver::GICv2 =
     unsafe { device_driver::GICv2::new(mmio::GICD_START, mmio::GICC_START) };
 
-static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
-    device_drivers: [&PL011_UART, &GPIO, &INTERRUPT_CONTROLLER],
-};
-
 //--------------------------------------------------------------------------------------------------
-// Public Code
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
-/// Return a reference to the driver manager.
-pub fn driver_manager() -> &'static impl driver::interface::DriverManager {
-    &BSP_DRIVER_MANAGER
+/// This must be called only after successful init of the UART driver.
+fn post_init_uart() -> Result<(), &'static str> {
+    console::register_console(&PL011_UART);
+
+    Ok(())
 }
 
-//------------------------------------------------------------------------------
-// OS Interface Code
-//------------------------------------------------------------------------------
-use driver::interface::DeviceDriver;
+/// This must be called only after successful init of the GPIO driver.
+fn post_init_gpio() -> Result<(), &'static str> {
+    GPIO.map_pl011_uart();
+    Ok(())
+}
 
-impl driver::interface::DriverManager for BSPDriverManager {
-    fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
-        &self.device_drivers[..]
-    }
+/// This must be called only after successful init of the interrupt controller driver.
+fn post_init_interrupt_controller() -> Result<(), &'static str> {
+    generic_exception::asynchronous::register_irq_manager(&INTERRUPT_CONTROLLER);
+
+    Ok(())
+}
 
-    fn post_device_driver_init(&self) {
-        // Configure PL011Uart's output pins.
-        GPIO.map_pl011_uart();
+fn driver_uart() -> Result<(), &'static str> {
+    let uart_descriptor = generic_driver::DeviceDriverDescriptor::new(
+        &PL011_UART,
+        Some(post_init_uart),
+        Some(exception::asynchronous::irq_map::PL011_UART),
+    );
+    generic_driver::driver_manager().register_driver(uart_descriptor);
+
+    Ok(())
+}
+
+fn driver_gpio() -> Result<(), &'static str> {
+    let gpio_descriptor =
+        generic_driver::DeviceDriverDescriptor::new(&GPIO, Some(post_init_gpio), None);
+    generic_driver::driver_manager().register_driver(gpio_descriptor);
+
+    Ok(())
+}
+
+fn driver_interrupt_controller() -> Result<(), &'static str> {
+    let interrupt_controller_descriptor = generic_driver::DeviceDriverDescriptor::new(
+        &INTERRUPT_CONTROLLER,
+        Some(post_init_interrupt_controller),
+        None,
+    );
+    generic_driver::driver_manager().register_driver(interrupt_controller_descriptor);
+
+    Ok(())
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Initialize the driver subsystem.
+///
+/// # Safety
+///
+/// See child function calls.
+pub unsafe fn init() -> Result<(), &'static str> {
+    static INIT_DONE: AtomicBool = AtomicBool::new(false);
+    if INIT_DONE.load(Ordering::Relaxed) {
+        return Err("Init already done");
     }
 
-    #[cfg(feature = "test_build")]
-    fn qemu_bring_up_console(&self) {}
+    driver_uart()?;
+    driver_gpio()?;
+    driver_interrupt_controller()?;
+
+    INIT_DONE.store(true, Ordering::Relaxed);
+    Ok(())
+}
+
+/// Minimal code needed to bring up the console in QEMU (for testing only). This is often less steps
+/// than on real hardware due to QEMU's abstractions.
+#[cfg(feature = "test_build")]
+pub fn qemu_bring_up_console() {
+    console::register_console(&PL011_UART);
 }
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/exception/asynchronous.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
index a13b24447..06a675588 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
@@ -4,12 +4,15 @@
 
 //! BSP asynchronous exception handling.
 
-use crate::{bsp, bsp::driver, exception};
+use crate::bsp;
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
+/// Export for reuse in generic asynchronous.rs.
+pub use bsp::device_driver::IRQNumber;
+
 #[cfg(feature = "bsp_rpi3")]
 pub(in crate::bsp) mod irq_map {
     use super::bsp::device_driver::{IRQNumber, PeripheralIRQ};
@@ -23,14 +26,3 @@ pub(in crate::bsp) mod irq_map {
 
     pub const PL011_UART: IRQNumber = IRQNumber::new(153);
 }
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return a reference to the IRQ manager.
-pub fn irq_manager() -> &'static impl exception::asynchronous::interface::IRQManager<
-    IRQNumberType = bsp::device_driver::IRQNumber,
-> {
-    &driver::INTERRUPT_CONTROLLER
-}
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory.rs
index a383c9fe9..be13bb7a8 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory.rs
@@ -73,11 +73,11 @@ pub(super) mod map {
     pub mod mmio {
         use super::*;
 
-        pub const START:                                 usize =         0x3F00_0000;
-        pub const PERIPHERAL_INTERRUPT_CONTROLLER_START: usize = START + 0x0000_B200;
-        pub const GPIO_START:                            usize = START + GPIO_OFFSET;
-        pub const PL011_UART_START:                      usize = START + UART_OFFSET;
-        pub const END_INCLUSIVE:                         usize =         0x4000_FFFF;
+        pub const START:               usize =         0x3F00_0000;
+        pub const PERIPHERAL_IC_START: usize = START + 0x0000_B200;
+        pub const GPIO_START:          usize = START + GPIO_OFFSET;
+        pub const PL011_UART_START:    usize = START + UART_OFFSET;
+        pub const END_INCLUSIVE:       usize =         0x4000_FFFF;
     }
 
     /// Physical devices.
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/console.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/console.rs
index c1fb0e53b..a85bcffe7 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/console.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/console.rs
@@ -4,7 +4,9 @@
 
 //! System console.
 
-use crate::bsp;
+mod null_console;
+
+use crate::synchronization;
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -54,13 +56,26 @@ pub mod interface {
     pub trait All: Write + Read + Statistics {}
 }
 
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static CUR_CONSOLE: InitStateLock<&'static (dyn interface::All + Sync)> =
+    InitStateLock::new(&null_console::NULL_CONSOLE);
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
+use synchronization::{interface::ReadWriteEx, InitStateLock};
+
+/// Register a new console.
+pub fn register_console(new_console: &'static (dyn interface::All + Sync)) {
+    CUR_CONSOLE.write(|con| *con = new_console);
+}
 
-/// Return a reference to the console.
+/// Return a reference to the currently registered console.
 ///
 /// This is the global console used by all printing macros.
 pub fn console() -> &'static dyn interface::All {
-    bsp::console::console()
+    CUR_CONSOLE.read(|con| *con)
 }
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/console/null_console.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/console/null_console.rs
new file mode 100644
index 000000000..2c64d499c
--- /dev/null
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/console/null_console.rs
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Null console.
+
+use super::interface;
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct NullConsole;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+pub static NULL_CONSOLE: NullConsole = NullConsole {};
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl interface::Write for NullConsole {
+    fn write_char(&self, _c: char) {}
+
+    fn write_fmt(&self, _args: fmt::Arguments) -> fmt::Result {
+        fmt::Result::Ok(())
+    }
+
+    fn flush(&self) {}
+}
+
+impl interface::Read for NullConsole {
+    fn clear_rx(&self) {}
+}
+
+impl interface::Statistics for NullConsole {}
+impl interface::All for NullConsole {}
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/driver.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/driver.rs
index c39e5eaf3..18066c313 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/driver.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/driver.rs
@@ -4,6 +4,26 @@
 
 //! Driver support.
 
+use crate::{
+    exception, info,
+    synchronization::{interface::ReadWriteEx, InitStateLock},
+};
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+const NUM_DRIVERS: usize = 5;
+
+struct DriverManagerInner<T>
+where
+    T: 'static,
+{
+    next_index: usize,
+    descriptors: [Option<DeviceDriverDescriptor<T>>; NUM_DRIVERS],
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -12,6 +32,9 @@
 pub mod interface {
     /// Device Driver functions.
     pub trait DeviceDriver {
+        /// Different interrupt controllers might use different types for IRQ number.
+        type IRQNumberType: super::fmt::Display;
+
         /// Return a compatibility string for identifying the driver.
         fn compatible(&self) -> &'static str;
 
@@ -24,34 +47,175 @@ pub mod interface {
             Ok(())
         }
 
-        /// Called by the kernel to register and enable the device's IRQ handlers, if any.
+        /// Called by the kernel to register and enable the device's IRQ handler.
         ///
         /// Rust's type system will prevent a call to this function unless the calling instance
         /// itself has static lifetime.
-        fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
-            Ok(())
+        fn register_and_enable_irq_handler(
+            &'static self,
+            irq_number: &Self::IRQNumberType,
+        ) -> Result<(), &'static str> {
+            panic!(
+                "Attempt to enable IRQ {} for device {}, but driver does not support this",
+                irq_number,
+                self.compatible()
+            )
+        }
+    }
+}
+
+/// Tpye to be used as an optional callback after a driver's init() has run.
+pub type DeviceDriverPostInitCallback = unsafe fn() -> Result<(), &'static str>;
+
+/// A descriptor for device drivers.
+#[derive(Copy, Clone)]
+pub struct DeviceDriverDescriptor<T>
+where
+    T: 'static,
+{
+    device_driver: &'static (dyn interface::DeviceDriver<IRQNumberType = T> + Sync),
+    post_init_callback: Option<DeviceDriverPostInitCallback>,
+    irq_number: Option<T>,
+}
+
+/// Provides device driver management functions.
+pub struct DriverManager<T>
+where
+    T: 'static,
+{
+    inner: InitStateLock<DriverManagerInner<T>>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static DRIVER_MANAGER: DriverManager<exception::asynchronous::IRQNumber> = DriverManager::new();
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl<T> DriverManagerInner<T>
+where
+    T: 'static + Copy,
+{
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self {
+            next_index: 0,
+            descriptors: [None; NUM_DRIVERS],
+        }
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl<T> DeviceDriverDescriptor<T> {
+    /// Create an instance.
+    pub fn new(
+        device_driver: &'static (dyn interface::DeviceDriver<IRQNumberType = T> + Sync),
+        post_init_callback: Option<DeviceDriverPostInitCallback>,
+        irq_number: Option<T>,
+    ) -> Self {
+        Self {
+            device_driver,
+            post_init_callback,
+            irq_number,
+        }
+    }
+}
+
+/// Return a reference to the global DriverManager.
+pub fn driver_manager() -> &'static DriverManager<exception::asynchronous::IRQNumber> {
+    &DRIVER_MANAGER
+}
+
+impl<T> DriverManager<T>
+where
+    T: fmt::Display + Copy,
+{
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self {
+            inner: InitStateLock::new(DriverManagerInner::new()),
         }
     }
 
-    /// Device driver management functions.
+    /// Register a device driver with the kernel.
+    pub fn register_driver(&self, descriptor: DeviceDriverDescriptor<T>) {
+        self.inner.write(|inner| {
+            inner.descriptors[inner.next_index] = Some(descriptor);
+            inner.next_index += 1;
+        })
+    }
+
+    /// Helper for iterating over registered drivers.
+    fn for_each_descriptor<'a>(&'a self, f: impl FnMut(&'a DeviceDriverDescriptor<T>)) {
+        self.inner.read(|inner| {
+            inner
+                .descriptors
+                .iter()
+                .filter_map(|x| x.as_ref())
+                .for_each(f)
+        })
+    }
+
+    /// Fully initialize all drivers and their interrupts handlers.
     ///
-    /// The `BSP` is supposed to supply one global instance.
-    pub trait DriverManager {
-        /// Return a slice of references to all `BSP`-instantiated drivers.
-        ///
-        /// # Safety
-        ///
-        /// - The order of devices is the order in which `DeviceDriver::init()` is called.
-        fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
+    /// # Safety
+    ///
+    /// - During init, drivers might do stuff with system-wide impact.
+    pub unsafe fn init_drivers_and_irqs(&self) {
+        self.for_each_descriptor(|descriptor| {
+            // 1. Initialize driver.
+            if let Err(x) = descriptor.device_driver.init() {
+                panic!(
+                    "Error initializing driver: {}: {}",
+                    descriptor.device_driver.compatible(),
+                    x
+                );
+            }
 
-        /// Initialization code that runs after driver init.
-        ///
-        /// For example, device driver code that depends on other drivers already being online.
-        fn post_device_driver_init(&self);
+            // 2. Call corresponding post init callback.
+            if let Some(callback) = &descriptor.post_init_callback {
+                if let Err(x) = callback() {
+                    panic!(
+                        "Error during driver post-init callback: {}: {}",
+                        descriptor.device_driver.compatible(),
+                        x
+                    );
+                }
+            }
+        });
+
+        // 3. After all post-init callbacks were done, the interrupt controller should be
+        //    registered and functional. So let drivers register with it now.
+        self.for_each_descriptor(|descriptor| {
+            if let Some(irq_number) = &descriptor.irq_number {
+                if let Err(x) = descriptor
+                    .device_driver
+                    .register_and_enable_irq_handler(irq_number)
+                {
+                    panic!(
+                        "Error during driver interrupt handler registration: {}: {}",
+                        descriptor.device_driver.compatible(),
+                        x
+                    );
+                }
+            }
+        });
+    }
+
+    /// Enumerate all registered device drivers.
+    pub fn enumerate(&self) {
+        let mut i: usize = 1;
+        self.for_each_descriptor(|descriptor| {
+            info!("      {}. {}", i, descriptor.device_driver.compatible());
 
-        /// Minimal code needed to bring up the console in QEMU (for testing only). This is often
-        /// less steps than on real hardware due to QEMU's abstractions.
-        #[cfg(feature = "test_build")]
-        fn qemu_bring_up_console(&self);
+            i += 1;
+        });
     }
 }
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.rs
index d55ce642d..c1f2a27b3 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.rs
@@ -7,9 +7,10 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "../_arch/aarch64/exception/asynchronous.rs"]
 mod arch_asynchronous;
+mod null_irq_manager;
 
-use crate::bsp;
-use core::{fmt, marker::PhantomData};
+use crate::{bsp, synchronization};
+use core::marker::PhantomData;
 
 //--------------------------------------------------------------------------------------------------
 // Architectural Public Reexports
@@ -23,14 +24,23 @@ pub use arch_asynchronous::{
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
+/// Interrupt number as defined by the BSP.
+pub type IRQNumber = bsp::exception::asynchronous::IRQNumber;
+
 /// Interrupt descriptor.
 #[derive(Copy, Clone)]
-pub struct IRQDescriptor {
+pub struct IRQHandlerDescriptor<T>
+where
+    T: Copy,
+{
+    /// The IRQ number.
+    number: T,
+
     /// Descriptive name.
-    pub name: &'static str,
+    name: &'static str,
 
     /// Reference to handler trait object.
-    pub handler: &'static (dyn interface::IRQHandler + Sync),
+    handler: &'static (dyn interface::IRQHandler + Sync),
 }
 
 /// IRQContext token.
@@ -60,17 +70,16 @@ pub mod interface {
     /// platform's interrupt controller.
     pub trait IRQManager {
         /// The IRQ number type depends on the implementation.
-        type IRQNumberType;
+        type IRQNumberType: Copy;
 
         /// Register a handler.
         fn register_handler(
             &self,
-            irq_number: Self::IRQNumberType,
-            descriptor: super::IRQDescriptor,
+            irq_handler_descriptor: super::IRQHandlerDescriptor<Self::IRQNumberType>,
         ) -> Result<(), &'static str>;
 
         /// Enable an interrupt in the controller.
-        fn enable(&self, irq_number: Self::IRQNumberType);
+        fn enable(&self, irq_number: &Self::IRQNumberType);
 
         /// Handle pending interrupts.
         ///
@@ -86,17 +95,55 @@ pub mod interface {
         );
 
         /// Print list of registered handlers.
-        fn print_handler(&self);
+        fn print_handler(&self) {}
     }
 }
 
-/// A wrapper type for IRQ numbers with integrated range sanity check.
-#[derive(Copy, Clone)]
-pub struct IRQNumber<const MAX_INCLUSIVE: usize>(usize);
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static CUR_IRQ_MANAGER: InitStateLock<
+    &'static (dyn interface::IRQManager<IRQNumberType = IRQNumber> + Sync),
+> = InitStateLock::new(&null_irq_manager::NULL_IRQ_MANAGER);
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
+use synchronization::{interface::ReadWriteEx, InitStateLock};
+
+impl<T> IRQHandlerDescriptor<T>
+where
+    T: Copy,
+{
+    /// Create an instance.
+    pub const fn new(
+        number: T,
+        name: &'static str,
+        handler: &'static (dyn interface::IRQHandler + Sync),
+    ) -> Self {
+        Self {
+            number,
+            name,
+            handler,
+        }
+    }
+
+    /// Return the number.
+    pub const fn number(&self) -> T {
+        self.number
+    }
+
+    /// Return the name.
+    pub const fn name(&self) -> &'static str {
+        self.name
+    }
+
+    /// Return the handler.
+    pub const fn handler(&self) -> &'static (dyn interface::IRQHandler + Sync) {
+        self.handler
+    }
+}
 
 impl<'irq_context> IRQContext<'irq_context> {
     /// Creates an IRQContext token.
@@ -115,29 +162,6 @@ impl<'irq_context> IRQContext<'irq_context> {
     }
 }
 
-impl<const MAX_INCLUSIVE: usize> IRQNumber<{ MAX_INCLUSIVE }> {
-    /// The total number of IRQs this type supports.
-    pub const NUM_TOTAL: usize = MAX_INCLUSIVE + 1;
-
-    /// Creates a new instance if number <= MAX_INCLUSIVE.
-    pub const fn new(number: usize) -> Self {
-        assert!(number <= MAX_INCLUSIVE);
-
-        Self(number)
-    }
-
-    /// Return the wrapped number.
-    pub const fn get(self) -> usize {
-        self.0
-    }
-}
-
-impl<const MAX_INCLUSIVE: usize> fmt::Display for IRQNumber<{ MAX_INCLUSIVE }> {
-    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
-        write!(f, "{}", self.0)
-    }
-}
-
 /// Executes the provided closure while IRQs are masked on the executing core.
 ///
 /// While the function temporarily changes the HW state of the executing core, it restores it to the
@@ -151,9 +175,16 @@ pub fn exec_with_irq_masked<T>(f: impl FnOnce() -> T) -> T {
     ret
 }
 
-/// Return a reference to the IRQ manager.
+/// Register a new IRQ manager.
+pub fn register_irq_manager(
+    new_manager: &'static (dyn interface::IRQManager<IRQNumberType = IRQNumber> + Sync),
+) {
+    CUR_IRQ_MANAGER.write(|manager| *manager = new_manager);
+}
+
+/// Return a reference to the currently registered IRQ manager.
 ///
 /// This is the IRQ manager used by the architectural interrupt handling code.
-pub fn irq_manager() -> &'static dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber> {
-    bsp::exception::asynchronous::irq_manager()
+pub fn irq_manager() -> &'static dyn interface::IRQManager<IRQNumberType = IRQNumber> {
+    CUR_IRQ_MANAGER.read(|manager| *manager)
 }
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous/null_irq_manager.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous/null_irq_manager.rs
new file mode 100644
index 000000000..438f96496
--- /dev/null
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous/null_irq_manager.rs
@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Null IRQ Manager.
+
+use super::{interface, IRQContext, IRQHandlerDescriptor};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct NullIRQManager;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+pub static NULL_IRQ_MANAGER: NullIRQManager = NullIRQManager {};
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl interface::IRQManager for NullIRQManager {
+    type IRQNumberType = super::IRQNumber;
+
+    fn register_handler(
+        &self,
+        _descriptor: IRQHandlerDescriptor<Self::IRQNumberType>,
+    ) -> Result<(), &'static str> {
+        panic!("No IRQ Manager registered yet");
+    }
+
+    fn enable(&self, _irq_number: &Self::IRQNumberType) {
+        panic!("No IRQ Manager registered yet");
+    }
+
+    fn handle_pending_irqs<'irq_context>(&'irq_context self, _ic: &IRQContext<'irq_context>) {
+        panic!("No IRQ Manager registered yet");
+    }
+}
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
index 194e24558..93b863d73 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
@@ -183,10 +183,8 @@ pub fn test_runner(tests: &[&test_types::UnitTest]) {
 #[cfg(test)]
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     test_main();
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs
index 0f72d17f5..d3bdf394a 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs
@@ -13,7 +13,7 @@
 #![no_main]
 #![no_std]
 
-use libkernel::{bsp, cpu, driver, exception, info, memory, state, time, warn};
+use libkernel::{bsp, cpu, driver, exception, info, memory, state, time};
 
 /// Early init code.
 ///
@@ -26,7 +26,6 @@ use libkernel::{bsp, cpu, driver, exception, info, memory, state, time, warn};
 ///       IRQSafeNullLocks instead of spinlocks), will fail to work (properly) on the RPi SoCs.
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
     use memory::mmu::interface::MMU;
 
     exception::handling_init();
@@ -35,21 +34,14 @@ unsafe fn kernel_init() -> ! {
         panic!("MMU: {}", string);
     }
 
-    for i in bsp::driver::driver_manager().all_device_drivers().iter() {
-        if let Err(x) = i.init() {
-            panic!("Error loading driver: {}: {}", i.compatible(), x);
-        }
-    }
-    bsp::driver::driver_manager().post_device_driver_init();
-    // println! is usable from here on.
-
-    // Let device drivers register and enable their handlers with the interrupt controller.
-    for i in bsp::driver::driver_manager().all_device_drivers() {
-        if let Err(msg) = i.register_and_enable_irq_handler() {
-            warn!("Error registering IRQ handler: {}", msg);
-        }
+    // Initialize the BSP driver subsystem.
+    if let Err(x) = bsp::driver::init() {
+        panic!("Error initializing BSP driver subsystem: {}", x);
     }
 
+    // Initialize all device drivers.
+    driver::driver_manager().init_drivers_and_irqs();
+
     // Unmask interrupts on the boot CPU core.
     exception::asynchronous::local_irq_unmask();
 
@@ -62,9 +54,6 @@ unsafe fn kernel_init() -> ! {
 
 /// The main function running after the early init.
 fn kernel_main() -> ! {
-    use driver::interface::DriverManager;
-    use exception::asynchronous::interface::IRQManager;
-
     info!("{}", libkernel::version());
     info!("Booting on: {}", bsp::board_name());
 
@@ -83,16 +72,10 @@ fn kernel_main() -> ! {
     );
 
     info!("Drivers loaded:");
-    for (i, driver) in bsp::driver::driver_manager()
-        .all_device_drivers()
-        .iter()
-        .enumerate()
-    {
-        info!("      {}. {}", i + 1, driver.compatible());
-    }
+    driver::driver_manager().enumerate();
 
     info!("Registered IRQ handlers:");
-    bsp::exception::asynchronous::irq_manager().print_handler();
+    exception::asynchronous::irq_manager().print_handler();
 
     info!("Echoing input now");
     cpu::wait_forever();
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/tests/00_console_sanity.rs b/13_exceptions_part2_peripheral_IRQs/kernel/tests/00_console_sanity.rs
index e12a711f7..693134287 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/tests/00_console_sanity.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/tests/00_console_sanity.rs
@@ -11,15 +11,14 @@
 /// Console tests should time out on the I/O harness in case of panic.
 mod panic_wait_forever;
 
-use libkernel::{bsp, console, cpu, driver, exception, print};
+use libkernel::{bsp, console, cpu, exception, print};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
     use console::console;
-    use driver::interface::DriverManager;
 
     exception::handling_init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     // Handshake
     assert_eq!(console().read_char(), 'A');
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/tests/01_timer_sanity.rs b/13_exceptions_part2_peripheral_IRQs/kernel/tests/01_timer_sanity.rs
index a0eb732bb..b86016b61 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/tests/01_timer_sanity.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/tests/01_timer_sanity.rs
@@ -11,15 +11,13 @@
 #![test_runner(libkernel::test_runner)]
 
 use core::time::Duration;
-use libkernel::{bsp, cpu, driver, exception, time};
+use libkernel::{bsp, cpu, exception, time};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/tests/02_exception_sync_page_fault.rs b/13_exceptions_part2_peripheral_IRQs/kernel/tests/02_exception_sync_page_fault.rs
index 62908377a..465019604 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/tests/02_exception_sync_page_fault.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/tests/02_exception_sync_page_fault.rs
@@ -17,15 +17,14 @@
 /// or indirectly.
 mod panic_exit_success;
 
-use libkernel::{bsp, cpu, driver, exception, info, memory, println};
+use libkernel::{bsp, cpu, exception, info, memory, println};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
     use memory::mmu::interface::MMU;
 
     exception::handling_init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     // This line will be printed as the test header.
     println!("Testing synchronous exception handling by causing a page fault");
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/tests/03_exception_restore_sanity.rs b/13_exceptions_part2_peripheral_IRQs/kernel/tests/03_exception_restore_sanity.rs
index 3f4eae79a..cba9285fc 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/tests/03_exception_restore_sanity.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/tests/03_exception_restore_sanity.rs
@@ -12,7 +12,7 @@
 mod panic_wait_forever;
 
 use core::arch::asm;
-use libkernel::{bsp, cpu, driver, exception, info, memory, println};
+use libkernel::{bsp, cpu, exception, info, memory, println};
 
 #[inline(never)]
 fn nested_system_call() {
@@ -30,11 +30,10 @@ fn nested_system_call() {
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
     use memory::mmu::interface::MMU;
 
     exception::handling_init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     // This line will be printed as the test header.
     println!("Testing exception restore");
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/tests/04_exception_irq_sanity.rs b/13_exceptions_part2_peripheral_IRQs/kernel/tests/04_exception_irq_sanity.rs
index 9deac6cc7..8f2b924ee 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/tests/04_exception_irq_sanity.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/tests/04_exception_irq_sanity.rs
@@ -10,13 +10,12 @@
 #![reexport_test_harness_main = "test_main"]
 #![test_runner(libkernel::test_runner)]
 
-use libkernel::{bsp, cpu, driver, exception};
+use libkernel::{bsp, cpu, exception};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     exception::handling_init();
     exception::asynchronous::local_irq_unmask();
diff --git a/14_virtual_mem_part2_mmio_remap/Makefile b/14_virtual_mem_part2_mmio_remap/Makefile
index 670c30c4e..2d4801190 100644
--- a/14_virtual_mem_part2_mmio_remap/Makefile
+++ b/14_virtual_mem_part2_mmio_remap/Makefile
@@ -291,7 +291,7 @@ test_boot: $(KERNEL_BIN)
 ## Helpers for unit and integration test targets
 ##------------------------------------------------------------------------------
 define KERNEL_TEST_RUNNER
-    #!/usr/bin/env bash
+#!/usr/bin/env bash
 
     # The cargo test runner seems to change into the crate under test's directory. Therefore, ensure
     # this script executes from the root.
diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index c0db99384..61117358c 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -257,81 +257,48 @@ static mut INTERRUPT_CONTROLLER: MaybeUninit<device_driver::InterruptController>
 static mut INTERRUPT_CONTROLLER: MaybeUninit<device_driver::GICv2> = MaybeUninit::uninit();
 ```
 
-`BSPDriverManager` implements the new `instantiate_drivers()` interface function, which will be
-called early during `kernel_init()`, short after virtual memory has been activated:
+Accordingly, new dedicated `instantiate_xyz()` functions have been added, which will be called by
+the corresponding `driver_xyz()` functions. Here is an example for the `UART`:
 
 ```rust
-unsafe fn instantiate_drivers(&self) -> Result<(), &'static str> {
-    if self.init_done.load(Ordering::Relaxed) {
-        return Err("Drivers already instantiated");
-    }
-
-    self.instantiate_uart()?;
-    self.instantiate_gpio()?;
-    self.instantiate_interrupt_controller()?;
+/// This must be called only after successful init of the memory subsystem.
+unsafe fn instantiate_uart() -> Result<(), &'static str> {
+    let mmio_descriptor = MMIODescriptor::new(mmio::PL011_UART_START, mmio::PL011_UART_SIZE);
+    let virt_addr =
+        memory::mmu::kernel_map_mmio(device_driver::PL011Uart::COMPATIBLE, &mmio_descriptor)?;
 
-    self.register_drivers();
+    PL011_UART.write(device_driver::PL011Uart::new(virt_addr));
 
-    self.init_done.store(true, Ordering::Relaxed);
     Ok(())
 }
 ```
 
-As can be seen, for each driver, this `BSP` code calls a dedicated instantiation function. In this
-tutorial text, only the `UART` will be discussed in detail:
-
 ```rust
-unsafe fn instantiate_uart(&self) -> Result<(), &'static str> {
-    let mmio_descriptor = MMIODescriptor::new(mmio::PL011_UART_START, mmio::PL011_UART_SIZE);
-    let virt_addr =
-        memory::mmu::kernel_map_mmio(device_driver::PL011Uart::COMPATIBLE, &mmio_descriptor)?;
+/// Function needs to ensure that driver registration happens only after correct instantiation.
+unsafe fn driver_uart() -> Result<(), &'static str> {
+    instantiate_uart()?;
 
-    // This is safe to do, because it is only called from the init'ed instance itself.
-    fn uart_post_init() {
-        console::register_console(unsafe { PL011_UART.assume_init_ref() });
-    }
-
-    PL011_UART.write(device_driver::PL011Uart::new(
-        virt_addr,
-        exception::asynchronous::irq_map::PL011_UART,
-        uart_post_init,
-    ));
+    let uart_descriptor = generic_driver::DeviceDriverDescriptor::new(
+        PL011_UART.assume_init_ref(),
+        Some(post_init_uart),
+        Some(exception::asynchronous::irq_map::PL011_UART),
+    );
+    generic_driver::driver_manager().register_driver(uart_descriptor);
 
     Ok(())
 }
 ```
 
-A couple of things are happening here. First, an `MMIODescriptor` is created and then used to remap
-the MMIO region using `memory::mmu::kernel_map_mmio()`. This function will be discussed in detail in
-the next chapter. What's important for now is that it returns the new `Virtual Address` of the
-remapped MMIO region. The constructor of the `UART` driver now also expects a virtual address.
+The code shows that an `MMIODescriptor` is created first, and then used to remap the MMIO region
+using `memory::mmu::kernel_map_mmio()`. This function will be discussed in detail in the next
+chapter. What's important for now is that it returns the new `Virtual Address` of the remapped MMIO
+region. The constructor of the `UART` driver now also expects a virtual address.
 
 Next, a new instance of the `PL011Uart` driver is created, and written into the `PL011_UART` global
 variable (remember, it is defined as `MaybeUninit<device_driver::PL011Uart> =
 MaybeUninit::uninit()`). Meaning, after this line of code, `PL011_UART` is properly initialized.
-
-Another new feature is the function `uart_post_init()`, which is supplied to the UART constructor.
-This is a callback that will be called by the UART driver when it concludes its `init()` function
-(remember that the driver's init functions are called from `kernel_init()`). This callback, in turn,
-registers the `PL011_UART` as the new console of the kernel.
-
-A look into `src/console.rs` should make clear what is happening. The classic `console::console()`
-now dynamically points to whoever registered itself using the `console::register_console()`
-function, instead of using a hardcoded static reference (from the `BSP`). This has been introduced
-to accommodate the run-time instantiation of the device drivers (the same feature has been
-implemented for the `IRQManager` as well). Until `console::register_console()` has been called for
-the first time, an instance of the newly introduced `NullConsole` is used as the default.
-`NullConsole` implements all the console traits, but does nothing. It discards outputs, and returns
-dummy input. For example, should one of the printing macros be called before the UART driver has
-been instantiated and registered, the kernel does not need to crash because the driver is not
-brought up yet. Instead, it can just discard the output. With this new scheme of things, it is
-possible to safely switch global references like the UART or the IRQ Manager at runtime.
-
-That all the post-driver-init work has now been moved to callbacks is motivated by the idea that
-this fully enables a driver once it has concluded its `init()` function, and not only after all the
-drivers have been init'ed and then the post-init code would be called, as earlier. In our example,
-printing through the UART will now be available already before the interrupt controller driver runs
-its init function.
+Only then, the driver is registered with the kernel and thus becomes accessible for the first time.
+This ensures that nobody can use the UART before its memory has been initialized properly.
 
 ### MMIO Virtual Address Allocation
 
@@ -924,31 +891,18 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/g
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2.rs 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2.rs
-@@ -79,7 +79,12 @@
- mod gicc;
- mod gicd;
+@@ -81,7 +81,9 @@
 
--use crate::{bsp, cpu, driver, exception, synchronization, synchronization::InitStateLock};
-+use crate::{
-+    bsp, cpu, driver, exception,
+ use crate::{
+     bsp::{self, device_driver::common::BoundedUsize},
+-    cpu, driver, exception, synchronization,
++    cpu, driver, exception,
 +    memory::{Address, Virtual},
 +    synchronization,
-+    synchronization::InitStateLock,
-+};
-
- //--------------------------------------------------------------------------------------------------
- // Private Definitions
-@@ -104,6 +109,9 @@
-
-     /// Stores registered IRQ handlers. Writable only during kernel init. RO afterwards.
-     handler_table: InitStateLock<HandlerTable>,
-+
-+    /// Callback to be invoked after successful init.
-+    post_init_callback: fn(),
- }
+     synchronization::InitStateLock,
+ };
 
- //--------------------------------------------------------------------------------------------------
-@@ -120,11 +128,16 @@
+@@ -125,7 +127,10 @@
      /// # Safety
      ///
      /// - The user must ensure to provide a correct MMIO start address.
@@ -956,49 +910,29 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/g
 +    pub const unsafe fn new(
 +        gicd_mmio_start_addr: Address<Virtual>,
 +        gicc_mmio_start_addr: Address<Virtual>,
-+        post_init_callback: fn(),
 +    ) -> Self {
          Self {
              gicd: gicd::GICD::new(gicd_mmio_start_addr),
              gicc: gicc::GICC::new(gicc_mmio_start_addr),
-             handler_table: InitStateLock::new([None; IRQNumber::NUM_TOTAL]),
-+            post_init_callback,
-         }
-     }
- }
-@@ -147,6 +160,8 @@
-         self.gicc.priority_accept_all();
-         self.gicc.enable();
-
-+        (self.post_init_callback)();
-+
-         Ok(())
-     }
- }
 
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
-@@ -5,7 +5,10 @@
+@@ -5,8 +5,12 @@
  //! GPIO Driver.
 
  use crate::{
--    bsp::device_driver::common::MMIODerefWrapper, driver, synchronization,
+-    bsp::device_driver::common::MMIODerefWrapper, driver, exception::asynchronous::IRQNumber,
+-    synchronization, synchronization::IRQSafeNullLock,
 +    bsp::device_driver::common::MMIODerefWrapper,
 +    driver,
++    exception::asynchronous::IRQNumber,
 +    memory::{Address, Virtual},
 +    synchronization,
-     synchronization::IRQSafeNullLock,
++    synchronization::IRQSafeNullLock,
  };
  use tock_registers::{
-@@ -119,6 +122,7 @@
- /// Representation of the GPIO HW.
- pub struct GPIO {
-     inner: IRQSafeNullLock<GPIOInner>,
-+    post_init_callback: fn(),
- }
-
- //--------------------------------------------------------------------------------------------------
+     interfaces::{ReadWriteable, Writeable},
 @@ -131,7 +135,7 @@
      /// # Safety
      ///
@@ -1008,29 +942,15 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/b
          Self {
              registers: Registers::new(mmio_start_addr),
          }
-@@ -198,9 +202,10 @@
+@@ -198,7 +202,7 @@
      /// # Safety
      ///
      /// - The user must ensure to provide a correct MMIO start address.
 -    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
-+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>, post_init_callback: fn()) -> Self {
++    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
          Self {
              inner: IRQSafeNullLock::new(GPIOInner::new(mmio_start_addr)),
-+            post_init_callback,
          }
-     }
-
-@@ -219,4 +224,10 @@
-     fn compatible(&self) -> &'static str {
-         Self::COMPATIBLE
-     }
-+
-+    unsafe fn init(&self) -> Result<(), &'static str> {
-+        (self.post_init_callback)();
-+
-+        Ok(())
-+    }
- }
 
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -1046,7 +966,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/b
      synchronization::{IRQSafeNullLock, InitStateLock},
  };
  use tock_registers::{
-@@ -78,7 +80,7 @@
+@@ -79,7 +81,7 @@
      /// # Safety
      ///
      /// - The user must ensure to provide a correct MMIO start address.
@@ -1059,82 +979,36 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/b
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
-@@ -6,7 +6,10 @@
-
- mod peripheral_ic;
-
--use crate::{driver, exception};
-+use crate::{
-+    driver, exception,
+@@ -10,6 +10,7 @@
+     bsp::device_driver::common::BoundedUsize,
+     driver,
+     exception::{self, asynchronous::IRQHandlerDescriptor},
 +    memory::{Address, Virtual},
-+};
-
- //--------------------------------------------------------------------------------------------------
- // Private Definitions
-@@ -37,6 +40,7 @@
- /// Representation of the Interrupt Controller.
- pub struct InterruptController {
-     periph: peripheral_ic::PeripheralIC,
-+    post_init_callback: fn(),
- }
+ };
+ use core::fmt;
 
- //--------------------------------------------------------------------------------------------------
-@@ -79,9 +83,13 @@
+@@ -91,7 +92,7 @@
      /// # Safety
      ///
      /// - The user must ensure to provide a correct MMIO start address.
 -    pub const unsafe fn new(periph_mmio_start_addr: usize) -> Self {
-+    pub const unsafe fn new(
-+        periph_mmio_start_addr: Address<Virtual>,
-+        post_init_callback: fn(),
-+    ) -> Self {
++    pub const unsafe fn new(periph_mmio_start_addr: Address<Virtual>) -> Self {
          Self {
              periph: peripheral_ic::PeripheralIC::new(periph_mmio_start_addr),
-+            post_init_callback,
          }
-     }
- }
-@@ -94,6 +102,12 @@
-     fn compatible(&self) -> &'static str {
-         Self::COMPATIBLE
-     }
-+
-+    unsafe fn init(&self) -> Result<(), &'static str> {
-+        (self.post_init_callback)();
-+
-+        Ok(())
-+    }
- }
-
- impl exception::asynchronous::interface::IRQManager for InterruptController {
 
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
-@@ -10,8 +10,12 @@
- //! - <https://developer.arm.com/documentation/ddi0183/latest>
-
- use crate::{
--    bsp, bsp::device_driver::common::MMIODerefWrapper, console, cpu, driver, exception,
--    synchronization, synchronization::IRQSafeNullLock,
-+    bsp,
-+    bsp::device_driver::common::MMIODerefWrapper,
-+    console, cpu, driver, exception,
+@@ -13,6 +13,7 @@
+     bsp::device_driver::common::MMIODerefWrapper,
+     console, cpu, driver,
+     exception::{self, asynchronous::IRQNumber},
 +    memory::{Address, Virtual},
-+    synchronization,
-+    synchronization::IRQSafeNullLock,
+     synchronization,
+     synchronization::IRQSafeNullLock,
  };
- use core::fmt;
- use tock_registers::{
-@@ -230,6 +234,7 @@
- pub struct PL011Uart {
-     inner: IRQSafeNullLock<PL011UartInner>,
-     irq_number: bsp::device_driver::IRQNumber,
-+    post_init_callback: fn(),
- }
-
- //--------------------------------------------------------------------------------------------------
-@@ -242,7 +247,7 @@
+@@ -244,7 +245,7 @@
      /// # Safety
      ///
      /// - The user must ensure to provide a correct MMIO start address.
@@ -1143,32 +1017,15 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/b
          Self {
              registers: Registers::new(mmio_start_addr),
              chars_written: 0,
-@@ -393,13 +398,16 @@
+@@ -395,7 +396,7 @@
      /// # Safety
      ///
      /// - The user must ensure to provide a correct MMIO start address.
-+    /// - The user must ensure to provide correct IRQ numbers.
-     pub const unsafe fn new(
--        mmio_start_addr: usize,
-+        mmio_start_addr: Address<Virtual>,
-         irq_number: bsp::device_driver::IRQNumber,
-+        post_init_callback: fn(),
-     ) -> Self {
+-    pub const unsafe fn new(mmio_start_addr: usize) -> Self {
++    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
          Self {
              inner: IRQSafeNullLock::new(PL011UartInner::new(mmio_start_addr)),
-             irq_number,
-+            post_init_callback,
          }
-     }
- }
-@@ -416,6 +424,7 @@
-
-     unsafe fn init(&self) -> Result<(), &'static str> {
-         self.inner.lock(|inner| inner.init());
-+        (self.post_init_callback)();
-
-         Ok(())
-     }
 
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/common.rs 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/common.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/common.rs
@@ -1178,7 +1035,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/commo
  //! Common device driver code.
 
 +use crate::memory::{Address, Virtual};
- use core::{marker::PhantomData, ops};
+ use core::{fmt, marker::PhantomData, ops};
 
  //--------------------------------------------------------------------------------------------------
 @@ -11,7 +12,7 @@
@@ -1190,7 +1047,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/commo
      phantom: PhantomData<fn() -> T>,
  }
 
-@@ -21,7 +22,7 @@
+@@ -25,7 +26,7 @@
 
  impl<T> MMIODerefWrapper<T> {
      /// Create an instance.
@@ -1199,7 +1056,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/commo
          Self {
              start_addr,
              phantom: PhantomData,
-@@ -33,6 +34,6 @@
+@@ -37,7 +38,7 @@
      type Target = T;
 
      fn deref(&self) -> &Self::Target {
@@ -1208,265 +1065,180 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/commo
      }
  }
 
-diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/console.rs 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/console.rs
---- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/console.rs
-+++ 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/console.rs
-@@ -1,16 +0,0 @@
--// SPDX-License-Identifier: MIT OR Apache-2.0
--//
--// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
--
--//! BSP console facilities.
--
--use crate::console;
--
--//--------------------------------------------------------------------------------------------------
--// Public Code
--//--------------------------------------------------------------------------------------------------
--
--/// Return a reference to the console.
--pub fn console() -> &'static dyn console::interface::All {
--    &super::driver::PL011_UART
--}
 
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/driver.rs 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/driver.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/driver.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/driver.rs
-@@ -5,7 +5,16 @@
- //! BSP driver support.
-
- use super::{exception, memory::map::mmio};
--use crate::{bsp::device_driver, driver};
-+use crate::{
-+    bsp::device_driver,
-+    console, driver, exception as generic_exception, memory,
+@@ -9,52 +9,109 @@
+     bsp::device_driver,
+     console, driver as generic_driver,
+     exception::{self as generic_exception},
++    memory,
 +    memory::mmu::MMIODescriptor,
-+    synchronization::{interface::ReadWriteEx, InitStateLock},
 +};
 +use core::{
 +    mem::MaybeUninit,
 +    sync::atomic::{AtomicBool, Ordering},
-+};
-
- pub use device_driver::IRQNumber;
-
-@@ -15,35 +24,133 @@
-
- /// Device Driver Manager type.
- struct BSPDriverManager {
--    device_drivers: [&'static (dyn DeviceDriver + Sync); 3],
-+    device_drivers: InitStateLock<[Option<&'static (dyn DeviceDriver + Sync)>; NUM_DRIVERS]>,
-+    init_done: AtomicBool,
- }
+ };
+-use core::sync::atomic::{AtomicBool, Ordering};
 
  //--------------------------------------------------------------------------------------------------
--// Global instances
-+// Public Definitions
+ // Global instances
  //--------------------------------------------------------------------------------------------------
 
--pub(super) static PL011_UART: device_driver::PL011Uart = unsafe {
--    device_driver::PL011Uart::new(
--        mmio::PL011_UART_START,
--        exception::asynchronous::irq_map::PL011_UART,
--    )
--};
-+/// The number of active drivers provided by this BSP.
-+pub const NUM_DRIVERS: usize = 3;
-+
-+//--------------------------------------------------------------------------------------------------
-+// Global instances
-+//--------------------------------------------------------------------------------------------------
-
+-static PL011_UART: device_driver::PL011Uart =
+-    unsafe { device_driver::PL011Uart::new(mmio::PL011_UART_START) };
 -static GPIO: device_driver::GPIO = unsafe { device_driver::GPIO::new(mmio::GPIO_START) };
 +static mut PL011_UART: MaybeUninit<device_driver::PL011Uart> = MaybeUninit::uninit();
 +static mut GPIO: MaybeUninit<device_driver::GPIO> = MaybeUninit::uninit();
 
  #[cfg(feature = "bsp_rpi3")]
--pub(super) static INTERRUPT_CONTROLLER: device_driver::InterruptController =
--    unsafe { device_driver::InterruptController::new(mmio::PERIPHERAL_INTERRUPT_CONTROLLER_START) };
+-static INTERRUPT_CONTROLLER: device_driver::InterruptController =
+-    unsafe { device_driver::InterruptController::new(mmio::PERIPHERAL_IC_START) };
 +static mut INTERRUPT_CONTROLLER: MaybeUninit<device_driver::InterruptController> =
 +    MaybeUninit::uninit();
 
  #[cfg(feature = "bsp_rpi4")]
--pub(super) static INTERRUPT_CONTROLLER: device_driver::GICv2 =
+-static INTERRUPT_CONTROLLER: device_driver::GICv2 =
 -    unsafe { device_driver::GICv2::new(mmio::GICD_START, mmio::GICC_START) };
 +static mut INTERRUPT_CONTROLLER: MaybeUninit<device_driver::GICv2> = MaybeUninit::uninit();
 
- static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
--    device_drivers: [&PL011_UART, &GPIO, &INTERRUPT_CONTROLLER],
-+    device_drivers: InitStateLock::new([None; NUM_DRIVERS]),
-+    init_done: AtomicBool::new(false),
- };
-
  //--------------------------------------------------------------------------------------------------
-+// Private Code
-+//--------------------------------------------------------------------------------------------------
-+
-+impl BSPDriverManager {
-+    unsafe fn instantiate_uart(&self) -> Result<(), &'static str> {
-+        let mmio_descriptor = MMIODescriptor::new(mmio::PL011_UART_START, mmio::PL011_UART_SIZE);
-+        let virt_addr =
-+            memory::mmu::kernel_map_mmio(device_driver::PL011Uart::COMPATIBLE, &mmio_descriptor)?;
-+
-+        // This is safe to do, because it is only called from the init'ed instance itself.
-+        fn uart_post_init() {
-+            console::register_console(unsafe { PL011_UART.assume_init_ref() });
-+        }
-+
-+        PL011_UART.write(device_driver::PL011Uart::new(
-+            virt_addr,
-+            exception::asynchronous::irq_map::PL011_UART,
-+            uart_post_init,
-+        ));
-+
-+        Ok(())
-+    }
-+
-+    unsafe fn instantiate_gpio(&self) -> Result<(), &'static str> {
-+        let mmio_descriptor = MMIODescriptor::new(mmio::GPIO_START, mmio::GPIO_SIZE);
-+        let virt_addr =
-+            memory::mmu::kernel_map_mmio(device_driver::GPIO::COMPATIBLE, &mmio_descriptor)?;
-+
-+        // This is safe to do, because it is only called from the init'ed instance itself.
-+        fn gpio_post_init() {
-+            unsafe { GPIO.assume_init_ref().map_pl011_uart() };
-+        }
-+
-+        GPIO.write(device_driver::GPIO::new(virt_addr, gpio_post_init));
-+
-+        Ok(())
-+    }
-+
-+    #[cfg(feature = "bsp_rpi3")]
-+    unsafe fn instantiate_interrupt_controller(&self) -> Result<(), &'static str> {
-+        let periph_mmio_descriptor =
-+            MMIODescriptor::new(mmio::PERIPHERAL_IC_START, mmio::PERIPHERAL_IC_SIZE);
-+        let periph_virt_addr = memory::mmu::kernel_map_mmio(
-+            device_driver::InterruptController::COMPATIBLE,
-+            &periph_mmio_descriptor,
-+        )?;
+ // Private Code
+ //--------------------------------------------------------------------------------------------------
+
++/// This must be called only after successful init of the memory subsystem.
++unsafe fn instantiate_uart() -> Result<(), &'static str> {
++    let mmio_descriptor = MMIODescriptor::new(mmio::PL011_UART_START, mmio::PL011_UART_SIZE);
++    let virt_addr =
++        memory::mmu::kernel_map_mmio(device_driver::PL011Uart::COMPATIBLE, &mmio_descriptor)?;
 +
-+        // This is safe to do, because it is only called from the init'ed instance itself.
-+        fn interrupt_controller_post_init() {
-+            generic_exception::asynchronous::register_irq_manager(unsafe {
-+                INTERRUPT_CONTROLLER.assume_init_ref()
-+            });
-+        }
++    PL011_UART.write(device_driver::PL011Uart::new(virt_addr));
 +
-+        INTERRUPT_CONTROLLER.write(device_driver::InterruptController::new(
-+            periph_virt_addr,
-+            interrupt_controller_post_init,
-+        ));
++    Ok(())
++}
 +
-+        Ok(())
-+    }
+ /// This must be called only after successful init of the UART driver.
+-fn post_init_uart() -> Result<(), &'static str> {
+-    console::register_console(&PL011_UART);
++unsafe fn post_init_uart() -> Result<(), &'static str> {
++    console::register_console(PL011_UART.assume_init_ref());
 +
-+    #[cfg(feature = "bsp_rpi4")]
-+    unsafe fn instantiate_interrupt_controller(&self) -> Result<(), &'static str> {
-+        let gicd_mmio_descriptor = MMIODescriptor::new(mmio::GICD_START, mmio::GICD_SIZE);
-+        let gicd_virt_addr = memory::mmu::kernel_map_mmio("GICv2 GICD", &gicd_mmio_descriptor)?;
++    Ok(())
++}
 +
-+        let gicc_mmio_descriptor = MMIODescriptor::new(mmio::GICC_START, mmio::GICC_SIZE);
-+        let gicc_virt_addr = memory::mmu::kernel_map_mmio("GICV2 GICC", &gicc_mmio_descriptor)?;
++/// This must be called only after successful init of the memory subsystem.
++unsafe fn instantiate_gpio() -> Result<(), &'static str> {
++    let mmio_descriptor = MMIODescriptor::new(mmio::GPIO_START, mmio::GPIO_SIZE);
++    let virt_addr =
++        memory::mmu::kernel_map_mmio(device_driver::GPIO::COMPATIBLE, &mmio_descriptor)?;
 +
-+        // This is safe to do, because it is only called from the init'ed instance itself.
-+        fn interrupt_controller_post_init() {
-+            generic_exception::asynchronous::register_irq_manager(unsafe {
-+                INTERRUPT_CONTROLLER.assume_init_ref()
-+            });
-+        }
++    GPIO.write(device_driver::GPIO::new(virt_addr));
+
+     Ok(())
+ }
+
+ /// This must be called only after successful init of the GPIO driver.
+-fn post_init_gpio() -> Result<(), &'static str> {
+-    GPIO.map_pl011_uart();
++unsafe fn post_init_gpio() -> Result<(), &'static str> {
++    GPIO.assume_init_ref().map_pl011_uart();
++    Ok(())
++}
 +
-+        INTERRUPT_CONTROLLER.write(device_driver::GICv2::new(
-+            gicd_virt_addr,
-+            gicc_virt_addr,
-+            interrupt_controller_post_init,
-+        ));
++/// This must be called only after successful init of the memory subsystem.
++#[cfg(feature = "bsp_rpi3")]
++unsafe fn instantiate_interrupt_controller() -> Result<(), &'static str> {
++    let periph_mmio_descriptor =
++        MMIODescriptor::new(mmio::PERIPHERAL_IC_START, mmio::PERIPHERAL_IC_SIZE);
++    let periph_virt_addr = memory::mmu::kernel_map_mmio(
++        device_driver::InterruptController::COMPATIBLE,
++        &periph_mmio_descriptor,
++    )?;
 +
-+        Ok(())
-+    }
++    INTERRUPT_CONTROLLER.write(device_driver::InterruptController::new(periph_virt_addr));
 +
-+    unsafe fn register_drivers(&self) {
-+        self.device_drivers.write(|drivers| {
-+            drivers[0] = Some(PL011_UART.assume_init_ref());
-+            drivers[1] = Some(GPIO.assume_init_ref());
-+            drivers[2] = Some(INTERRUPT_CONTROLLER.assume_init_ref());
-+        });
-+    }
++    Ok(())
 +}
 +
-+//--------------------------------------------------------------------------------------------------
- // Public Code
- //--------------------------------------------------------------------------------------------------
-
-@@ -58,15 +165,34 @@
- use driver::interface::DeviceDriver;
-
- impl driver::interface::DriverManager for BSPDriverManager {
--    fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
--        &self.device_drivers[..]
-+    unsafe fn instantiate_drivers(&self) -> Result<(), &'static str> {
-+        if self.init_done.load(Ordering::Relaxed) {
-+            return Err("Drivers already instantiated");
-+        }
++/// This must be called only after successful init of the memory subsystem.
++#[cfg(feature = "bsp_rpi4")]
++unsafe fn instantiate_interrupt_controller() -> Result<(), &'static str> {
++    let gicd_mmio_descriptor = MMIODescriptor::new(mmio::GICD_START, mmio::GICD_SIZE);
++    let gicd_virt_addr = memory::mmu::kernel_map_mmio("GICv2 GICD", &gicd_mmio_descriptor)?;
 +
-+        self.instantiate_uart()?;
-+        self.instantiate_gpio()?;
-+        self.instantiate_interrupt_controller()?;
++    let gicc_mmio_descriptor = MMIODescriptor::new(mmio::GICC_START, mmio::GICC_SIZE);
++    let gicc_virt_addr = memory::mmu::kernel_map_mmio("GICV2 GICC", &gicc_mmio_descriptor)?;
 +
-+        self.register_drivers();
++    INTERRUPT_CONTROLLER.write(device_driver::GICv2::new(gicd_virt_addr, gicc_virt_addr));
 +
-+        self.init_done.store(true, Ordering::Relaxed);
-+        Ok(())
-     }
-
--    fn post_device_driver_init(&self) {
--        // Configure PL011Uart's output pins.
--        GPIO.map_pl011_uart();
-+    fn all_device_drivers(&self) -> [&(dyn DeviceDriver + Sync); NUM_DRIVERS] {
-+        self.device_drivers
-+            .read(|drivers| drivers.map(|drivers| drivers.unwrap()))
-     }
-
-     #[cfg(feature = "test_build")]
--    fn qemu_bring_up_console(&self) {}
-+    fn qemu_bring_up_console(&self) {
-+        use crate::cpu;
-+
-+        unsafe {
-+            self.instantiate_uart()
-+                .unwrap_or_else(|_| cpu::qemu_exit_failure());
-+            console::register_console(PL011_UART.assume_init_ref());
-+        };
-+    }
+     Ok(())
  }
 
-diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/exception/asynchronous.rs 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
---- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
-+++ 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
-@@ -4,7 +4,7 @@
+ /// This must be called only after successful init of the interrupt controller driver.
+-fn post_init_interrupt_controller() -> Result<(), &'static str> {
+-    generic_exception::asynchronous::register_irq_manager(&INTERRUPT_CONTROLLER);
++unsafe fn post_init_interrupt_controller() -> Result<(), &'static str> {
++    generic_exception::asynchronous::register_irq_manager(INTERRUPT_CONTROLLER.assume_init_ref());
 
- //! BSP asynchronous exception handling.
+     Ok(())
+ }
 
--use crate::{bsp, bsp::driver, exception};
-+use crate::bsp;
+-fn driver_uart() -> Result<(), &'static str> {
++/// Function needs to ensure that driver registration happens only after correct instantiation.
++unsafe fn driver_uart() -> Result<(), &'static str> {
++    instantiate_uart()?;
++
+     let uart_descriptor = generic_driver::DeviceDriverDescriptor::new(
+-        &PL011_UART,
++        PL011_UART.assume_init_ref(),
+         Some(post_init_uart),
+         Some(exception::asynchronous::irq_map::PL011_UART),
+     );
+@@ -63,17 +120,26 @@
+     Ok(())
+ }
 
- //--------------------------------------------------------------------------------------------------
- // Public Definitions
-@@ -23,14 +23,3 @@
+-fn driver_gpio() -> Result<(), &'static str> {
+-    let gpio_descriptor =
+-        generic_driver::DeviceDriverDescriptor::new(&GPIO, Some(post_init_gpio), None);
++/// Function needs to ensure that driver registration happens only after correct instantiation.
++unsafe fn driver_gpio() -> Result<(), &'static str> {
++    instantiate_gpio()?;
++
++    let gpio_descriptor = generic_driver::DeviceDriverDescriptor::new(
++        GPIO.assume_init_ref(),
++        Some(post_init_gpio),
++        None,
++    );
+     generic_driver::driver_manager().register_driver(gpio_descriptor);
+
+     Ok(())
+ }
 
-     pub const PL011_UART: IRQNumber = IRQNumber::new(153);
+-fn driver_interrupt_controller() -> Result<(), &'static str> {
++/// Function needs to ensure that driver registration happens only after correct instantiation.
++unsafe fn driver_interrupt_controller() -> Result<(), &'static str> {
++    instantiate_interrupt_controller()?;
++
+     let interrupt_controller_descriptor = generic_driver::DeviceDriverDescriptor::new(
+-        &INTERRUPT_CONTROLLER,
++        INTERRUPT_CONTROLLER.assume_init_ref(),
+         Some(post_init_interrupt_controller),
+         None,
+     );
+@@ -109,5 +175,10 @@
+ /// than on real hardware due to QEMU's abstractions.
+ #[cfg(feature = "test_build")]
+ pub fn qemu_bring_up_console() {
+-    console::register_console(&PL011_UART);
++    use crate::cpu;
++
++    unsafe {
++        instantiate_uart().unwrap_or_else(|_| cpu::qemu_exit_failure());
++        console::register_console(PL011_UART.assume_init_ref());
++    };
  }
--
--//--------------------------------------------------------------------------------------------------
--// Public Code
--//--------------------------------------------------------------------------------------------------
--
--/// Return a reference to the IRQ manager.
--pub fn irq_manager() -> &'static impl exception::asynchronous::interface::IRQManager<
--    IRQNumberType = bsp::device_driver::IRQNumber,
--> {
--    &driver::INTERRUPT_CONTROLLER
--}
 
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/kernel.ld 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/kernel.ld
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/kernel.ld
@@ -1910,11 +1682,11 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory.
      pub mod mmio {
          use super::*;
 
--        pub const START:                                 usize =         0x3F00_0000;
--        pub const PERIPHERAL_INTERRUPT_CONTROLLER_START: usize = START + 0x0000_B200;
--        pub const GPIO_START:                            usize = START + GPIO_OFFSET;
--        pub const PL011_UART_START:                      usize = START + UART_OFFSET;
--        pub const END_INCLUSIVE:                         usize =         0x4000_FFFF;
+-        pub const START:               usize =         0x3F00_0000;
+-        pub const PERIPHERAL_IC_START: usize = START + 0x0000_B200;
+-        pub const GPIO_START:          usize = START + GPIO_OFFSET;
+-        pub const PL011_UART_START:    usize = START + UART_OFFSET;
+-        pub const END_INCLUSIVE:       usize =         0x4000_FFFF;
 +        pub const PERIPHERAL_IC_START: Address<Physical> = Address::new(0x3F00_B200);
 +        pub const PERIPHERAL_IC_SIZE:  usize             =              0x24;
 +
@@ -2040,18 +1812,6 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory.
 +    PageAddress::from(map::END)
  }
 
-diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi.rs 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi.rs
---- 13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi.rs
-+++ 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi.rs
-@@ -4,7 +4,6 @@
-
- //! Top-level BSP file for the Raspberry Pi 3 and 4.
-
--pub mod console;
- pub mod cpu;
- pub mod driver;
- pub mod exception;
-
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/common.rs 14_virtual_mem_part2_mmio_remap/kernel/src/common.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/common.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/src/common.rs
@@ -2087,242 +1847,6 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/common.rs 14_virtual_me
  pub const fn size_human_readable_ceil(size: usize) -> (usize, &'static str) {
      const KIB: usize = 1024;
 
-diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/console/null_console.rs 14_virtual_mem_part2_mmio_remap/kernel/src/console/null_console.rs
---- 13_exceptions_part2_peripheral_IRQs/kernel/src/console/null_console.rs
-+++ 14_virtual_mem_part2_mmio_remap/kernel/src/console/null_console.rs
-@@ -0,0 +1,41 @@
-+// SPDX-License-Identifier: MIT OR Apache-2.0
-+//
-+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
-+
-+//! Null console.
-+
-+use super::interface;
-+use core::fmt;
-+
-+//--------------------------------------------------------------------------------------------------
-+// Public Definitions
-+//--------------------------------------------------------------------------------------------------
-+
-+pub struct NullConsole;
-+
-+//--------------------------------------------------------------------------------------------------
-+// Global instances
-+//--------------------------------------------------------------------------------------------------
-+
-+pub static NULL_CONSOLE: NullConsole = NullConsole {};
-+
-+//--------------------------------------------------------------------------------------------------
-+// Public Code
-+//--------------------------------------------------------------------------------------------------
-+
-+impl interface::Write for NullConsole {
-+    fn write_char(&self, _c: char) {}
-+
-+    fn write_fmt(&self, _args: fmt::Arguments) -> fmt::Result {
-+        fmt::Result::Ok(())
-+    }
-+
-+    fn flush(&self) {}
-+}
-+
-+impl interface::Read for NullConsole {
-+    fn clear_rx(&self) {}
-+}
-+
-+impl interface::Statistics for NullConsole {}
-+impl interface::All for NullConsole {}
-
-diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/console.rs 14_virtual_mem_part2_mmio_remap/kernel/src/console.rs
---- 13_exceptions_part2_peripheral_IRQs/kernel/src/console.rs
-+++ 14_virtual_mem_part2_mmio_remap/kernel/src/console.rs
-@@ -4,7 +4,9 @@
-
- //! System console.
-
--use crate::bsp;
-+mod null_console;
-+
-+use crate::synchronization;
-
- //--------------------------------------------------------------------------------------------------
- // Public Definitions
-@@ -55,12 +57,25 @@
- }
-
- //--------------------------------------------------------------------------------------------------
-+// Global instances
-+//--------------------------------------------------------------------------------------------------
-+
-+static CUR_CONSOLE: InitStateLock<&'static (dyn interface::All + Sync)> =
-+    InitStateLock::new(&null_console::NULL_CONSOLE);
-+
-+//--------------------------------------------------------------------------------------------------
- // Public Code
- //--------------------------------------------------------------------------------------------------
-+use synchronization::{interface::ReadWriteEx, InitStateLock};
-+
-+/// Register a new console.
-+pub fn register_console(new_console: &'static (dyn interface::All + Sync)) {
-+    CUR_CONSOLE.write(|con| *con = new_console);
-+}
-
--/// Return a reference to the console.
-+/// Return a reference to the currently registered console.
- ///
- /// This is the global console used by all printing macros.
- pub fn console() -> &'static dyn interface::All {
--    bsp::console::console()
-+    CUR_CONSOLE.read(|con| *con)
- }
-
-diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/driver.rs 14_virtual_mem_part2_mmio_remap/kernel/src/driver.rs
---- 13_exceptions_part2_peripheral_IRQs/kernel/src/driver.rs
-+++ 14_virtual_mem_part2_mmio_remap/kernel/src/driver.rs
-@@ -10,6 +10,8 @@
-
- /// Driver interfaces.
- pub mod interface {
-+    use crate::bsp;
-+
-     /// Device Driver functions.
-     pub trait DeviceDriver {
-         /// Return a compatibility string for identifying the driver.
-@@ -37,17 +39,15 @@
-     ///
-     /// The `BSP` is supposed to supply one global instance.
-     pub trait DriverManager {
--        /// Return a slice of references to all `BSP`-instantiated drivers.
-+        /// Instantiate all drivers.
-         ///
-         /// # Safety
-         ///
--        /// - The order of devices is the order in which `DeviceDriver::init()` is called.
--        fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
-+        /// Must be called before `all_device_drivers`.
-+        unsafe fn instantiate_drivers(&self) -> Result<(), &'static str>;
-
--        /// Initialization code that runs after driver init.
--        ///
--        /// For example, device driver code that depends on other drivers already being online.
--        fn post_device_driver_init(&self);
-+        /// Return a slice of references to all `BSP`-instantiated drivers.
-+        fn all_device_drivers(&self) -> [&(dyn DeviceDriver + Sync); bsp::driver::NUM_DRIVERS];
-
-         /// Minimal code needed to bring up the console in QEMU (for testing only). This is often
-         /// less steps than on real hardware due to QEMU's abstractions.
-
-diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous/null_irq_manager.rs 14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous/null_irq_manager.rs
---- 13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous/null_irq_manager.rs
-+++ 14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous/null_irq_manager.rs
-@@ -0,0 +1,44 @@
-+// SPDX-License-Identifier: MIT OR Apache-2.0
-+//
-+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
-+
-+//! Null IRQ Manager.
-+
-+use super::{interface, IRQContext, IRQDescriptor};
-+use crate::bsp;
-+
-+//--------------------------------------------------------------------------------------------------
-+// Public Definitions
-+//--------------------------------------------------------------------------------------------------
-+
-+pub struct NullIRQManager;
-+
-+//--------------------------------------------------------------------------------------------------
-+// Global instances
-+//--------------------------------------------------------------------------------------------------
-+
-+pub static NULL_IRQ_MANAGER: NullIRQManager = NullIRQManager {};
-+
-+//--------------------------------------------------------------------------------------------------
-+// Public Code
-+//--------------------------------------------------------------------------------------------------
-+
-+impl interface::IRQManager for NullIRQManager {
-+    type IRQNumberType = bsp::driver::IRQNumber;
-+
-+    fn register_handler(
-+        &self,
-+        _irq_number: Self::IRQNumberType,
-+        _descriptor: IRQDescriptor,
-+    ) -> Result<(), &'static str> {
-+        panic!("No IRQ Manager registered yet");
-+    }
-+
-+    fn enable(&self, _irq_number: Self::IRQNumberType) {
-+        panic!("No IRQ Manager registered yet");
-+    }
-+
-+    fn handle_pending_irqs<'irq_context>(&'irq_context self, _ic: &IRQContext<'irq_context>) {
-+        panic!("No IRQ Manager registered yet");
-+    }
-+}
-
-diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.rs 14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous.rs
---- 13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.rs
-+++ 14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous.rs
-@@ -7,8 +7,9 @@
- #[cfg(target_arch = "aarch64")]
- #[path = "../_arch/aarch64/exception/asynchronous.rs"]
- mod arch_asynchronous;
-+mod null_irq_manager;
-
--use crate::bsp;
-+use crate::{bsp, synchronization};
- use core::{fmt, marker::PhantomData};
-
- //--------------------------------------------------------------------------------------------------
-@@ -86,7 +87,7 @@
-         );
-
-         /// Print list of registered handlers.
--        fn print_handler(&self);
-+        fn print_handler(&self) {}
-     }
- }
-
-@@ -95,8 +96,17 @@
- pub struct IRQNumber<const MAX_INCLUSIVE: usize>(usize);
-
- //--------------------------------------------------------------------------------------------------
-+// Global instances
-+//--------------------------------------------------------------------------------------------------
-+
-+static CUR_IRQ_MANAGER: InitStateLock<
-+    &'static (dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber> + Sync),
-+> = InitStateLock::new(&null_irq_manager::NULL_IRQ_MANAGER);
-+
-+//--------------------------------------------------------------------------------------------------
- // Public Code
- //--------------------------------------------------------------------------------------------------
-+use synchronization::{interface::ReadWriteEx, InitStateLock};
-
- impl<'irq_context> IRQContext<'irq_context> {
-     /// Creates an IRQContext token.
-@@ -151,9 +161,17 @@
-     ret
- }
-
--/// Return a reference to the IRQ manager.
-+/// Register a new IRQ manager.
-+pub fn register_irq_manager(
-+    new_manager: &'static (dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber>
-+                  + Sync),
-+) {
-+    CUR_IRQ_MANAGER.write(|manager| *manager = new_manager);
-+}
-+
-+/// Return a reference to the currently registered IRQ manager.
- ///
- /// This is the IRQ manager used by the architectural interrupt handling code.
- pub fn irq_manager() -> &'static dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber> {
--    bsp::exception::asynchronous::irq_manager()
-+    CUR_IRQ_MANAGER.read(|manager| *manager)
- }
-
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs 14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
@@ -2340,9 +1864,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs 14_virtual_mem_p
  #![feature(trait_alias)]
  #![feature(unchecked_math)]
  #![no_std]
-@@ -186,6 +189,17 @@
-     use driver::interface::DriverManager;
-
+@@ -184,6 +187,17 @@
+ #[no_mangle]
+ unsafe fn kernel_init() -> ! {
      exception::handling_init();
 +
 +    let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
@@ -2355,19 +1879,19 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs 14_virtual_mem_p
 +    }
 +
 +    memory::mmu::post_enable_init();
-     bsp::driver::driver_manager().qemu_bring_up_console();
+     bsp::driver::qemu_bring_up_console();
 
      test_main();
 
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs 14_virtual_mem_part2_mmio_remap/kernel/src/main.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/src/main.rs
-@@ -27,21 +27,29 @@
+@@ -26,14 +26,19 @@
+ ///       IRQSafeNullLocks instead of spinlocks), will fail to work (properly) on the RPi SoCs.
  #[no_mangle]
  unsafe fn kernel_init() -> ! {
-     use driver::interface::DriverManager;
 -    use memory::mmu::interface::MMU;
-
+-
      exception::handling_init();
 
 -    if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
@@ -2383,26 +1907,10 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs 14_virtual_mem_
 
 +    memory::mmu::post_enable_init();
 +
-+    // Instantiate and init all device drivers.
-+    if let Err(x) = bsp::driver::driver_manager().instantiate_drivers() {
-+        panic!("Error instantiating drivers: {}", x);
-+    }
-     for i in bsp::driver::driver_manager().all_device_drivers().iter() {
-         if let Err(x) = i.init() {
-             panic!("Error loading driver: {}: {}", i.compatible(), x);
-         }
-     }
--    bsp::driver::driver_manager().post_device_driver_init();
--    // println! is usable from here on.
-
-     // Let device drivers register and enable their handlers with the interrupt controller.
-     for i in bsp::driver::driver_manager().all_device_drivers() {
-@@ -63,13 +71,12 @@
- /// The main function running after the early init.
- fn kernel_main() -> ! {
-     use driver::interface::DriverManager;
--    use exception::asynchronous::interface::IRQManager;
-
+     // Initialize the BSP driver subsystem.
+     if let Err(x) = bsp::driver::init() {
+         panic!("Error initializing BSP driver subsystem: {}", x);
+@@ -57,8 +62,8 @@
      info!("{}", libkernel::version());
      info!("Booting on: {}", bsp::board_name());
 
@@ -2413,15 +1921,6 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs 14_virtual_mem_
 
      let (_, privilege_level) = exception::current_privilege_level();
      info!("Current privilege level: {}", privilege_level);
-@@ -92,7 +99,7 @@
-     }
-
-     info!("Registered IRQ handlers:");
--    bsp::exception::asynchronous::irq_manager().print_handler();
-+    exception::asynchronous::irq_manager().print_handler();
-
-     info!("Echoing input now");
-     cpu::wait_forever();
 
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/mapping_record.rs 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/mapping_record.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/mapping_record.rs
@@ -3787,17 +3286,16 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory.rs 14_virtual_me
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/tests/00_console_sanity.rs 14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/tests/00_console_sanity.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rs
-@@ -11,7 +11,7 @@
+@@ -11,13 +11,24 @@
  /// Console tests should time out on the I/O harness in case of panic.
  mod panic_wait_forever;
 
--use libkernel::{bsp, console, cpu, driver, exception, print};
-+use libkernel::{bsp, console, cpu, driver, exception, memory, print};
+-use libkernel::{bsp, console, cpu, exception, print};
++use libkernel::{bsp, console, cpu, exception, memory, print};
 
  #[no_mangle]
  unsafe fn kernel_init() -> ! {
-@@ -19,6 +19,17 @@
-     use driver::interface::DriverManager;
+     use console::console;
 
      exception::handling_init();
 +
@@ -3811,25 +3309,23 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/tests/00_console_sanity.rs
 +    }
 +
 +    memory::mmu::post_enable_init();
-     bsp::driver::driver_manager().qemu_bring_up_console();
+     bsp::driver::qemu_bring_up_console();
 
      // Handshake
 
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/tests/01_timer_sanity.rs 14_virtual_mem_part2_mmio_remap/kernel/tests/01_timer_sanity.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/tests/01_timer_sanity.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/tests/01_timer_sanity.rs
-@@ -11,7 +11,7 @@
+@@ -11,12 +11,23 @@
  #![test_runner(libkernel::test_runner)]
 
  use core::time::Duration;
--use libkernel::{bsp, cpu, driver, exception, time};
-+use libkernel::{bsp, cpu, driver, exception, memory, time};
+-use libkernel::{bsp, cpu, exception, time};
++use libkernel::{bsp, cpu, exception, memory, time};
  use test_macros::kernel_test;
 
  #[no_mangle]
-@@ -19,6 +19,17 @@
-     use driver::interface::DriverManager;
-
+ unsafe fn kernel_init() -> ! {
      exception::handling_init();
 +
 +    let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
@@ -3842,21 +3338,21 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/tests/01_timer_sanity.rs 14
 +    }
 +
 +    memory::mmu::post_enable_init();
-     bsp::driver::driver_manager().qemu_bring_up_console();
+     bsp::driver::qemu_bring_up_console();
 
      // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
 
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/tests/02_exception_sync_page_fault.rs 14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fault.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/tests/02_exception_sync_page_fault.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fault.rs
-@@ -22,19 +22,28 @@
+@@ -21,19 +21,27 @@
+
  #[no_mangle]
  unsafe fn kernel_init() -> ! {
-     use driver::interface::DriverManager;
 -    use memory::mmu::interface::MMU;
-
+-
      exception::handling_init();
--    bsp::driver::driver_manager().qemu_bring_up_console();
+-    bsp::driver::qemu_bring_up_console();
 
      // This line will be printed as the test header.
      println!("Testing synchronous exception handling by causing a page fault");
@@ -3877,7 +3373,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/tests/02_exception_sync_pag
      }
 
 +    memory::mmu::post_enable_init();
-+    bsp::driver::driver_manager().qemu_bring_up_console();
++    bsp::driver::qemu_bring_up_console();
 +
      info!("Writing beyond mapped area to address 9 GiB...");
      let big_addr: u64 = 9 * 1024 * 1024 * 1024;
@@ -3886,14 +3382,14 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/tests/02_exception_sync_pag
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/tests/03_exception_restore_sanity.rs 14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/tests/03_exception_restore_sanity.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rs
-@@ -31,19 +31,28 @@
+@@ -30,19 +30,27 @@
+
  #[no_mangle]
  unsafe fn kernel_init() -> ! {
-     use driver::interface::DriverManager;
 -    use memory::mmu::interface::MMU;
-
+-
      exception::handling_init();
--    bsp::driver::driver_manager().qemu_bring_up_console();
+-    bsp::driver::qemu_bring_up_console();
 
      // This line will be printed as the test header.
      println!("Testing exception restore");
@@ -3914,7 +3410,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/tests/03_exception_restore_
      }
 
 +    memory::mmu::post_enable_init();
-+    bsp::driver::driver_manager().qemu_bring_up_console();
++    bsp::driver::qemu_bring_up_console();
 +
      info!("Making a dummy system call");
 
@@ -3923,20 +3419,17 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/tests/03_exception_restore_
 diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/tests/04_exception_irq_sanity.rs 14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.rs
 --- 13_exceptions_part2_peripheral_IRQs/kernel/tests/04_exception_irq_sanity.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.rs
-@@ -10,15 +10,27 @@
+@@ -10,14 +10,25 @@
  #![reexport_test_harness_main = "test_main"]
  #![test_runner(libkernel::test_runner)]
 
--use libkernel::{bsp, cpu, driver, exception};
-+use libkernel::{bsp, cpu, driver, exception, memory};
+-use libkernel::{bsp, cpu, exception};
++use libkernel::{bsp, cpu, exception, memory};
  use test_macros::kernel_test;
 
  #[no_mangle]
  unsafe fn kernel_init() -> ! {
-     use driver::interface::DriverManager;
--    bsp::driver::driver_manager().qemu_bring_up_console();
-
-     exception::handling_init();
++    exception::handling_init();
 +
 +    let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
 +        Err(string) => panic!("Error mapping kernel binary: {}", string),
@@ -3948,8 +3441,9 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/tests/04_exception_irq_sani
 +    }
 +
 +    memory::mmu::post_enable_init();
-+    bsp::driver::driver_manager().qemu_bring_up_console();
-+
+     bsp::driver::qemu_bring_up_console();
+
+-    exception::handling_init();
      exception::asynchronous::local_irq_unmask();
 
      test_main();
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2.rs
index ec65f1b2a..3cc35b5ee 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2.rs
@@ -80,7 +80,8 @@ mod gicc;
 mod gicd;
 
 use crate::{
-    bsp, cpu, driver, exception,
+    bsp::{self, device_driver::common::BoundedUsize},
+    cpu, driver, exception,
     memory::{Address, Virtual},
     synchronization,
     synchronization::InitStateLock,
@@ -90,14 +91,15 @@ use crate::{
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
-type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; IRQNumber::NUM_TOTAL];
+type HandlerTable = [Option<exception::asynchronous::IRQHandlerDescriptor<IRQNumber>>;
+    IRQNumber::MAX_INCLUSIVE + 1];
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
 /// Used for the associated type of trait [`exception::asynchronous::interface::IRQManager`].
-pub type IRQNumber = exception::asynchronous::IRQNumber<{ GICv2::MAX_IRQ_NUMBER }>;
+pub type IRQNumber = BoundedUsize<{ GICv2::MAX_IRQ_NUMBER }>;
 
 /// Representation of the GIC.
 pub struct GICv2 {
@@ -109,9 +111,6 @@ pub struct GICv2 {
 
     /// Stores registered IRQ handlers. Writable only during kernel init. RO afterwards.
     handler_table: InitStateLock<HandlerTable>,
-
-    /// Callback to be invoked after successful init.
-    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -131,13 +130,11 @@ impl GICv2 {
     pub const unsafe fn new(
         gicd_mmio_start_addr: Address<Virtual>,
         gicc_mmio_start_addr: Address<Virtual>,
-        post_init_callback: fn(),
     ) -> Self {
         Self {
             gicd: gicd::GICD::new(gicd_mmio_start_addr),
             gicc: gicc::GICC::new(gicc_mmio_start_addr),
-            handler_table: InitStateLock::new([None; IRQNumber::NUM_TOTAL]),
-            post_init_callback,
+            handler_table: InitStateLock::new([None; IRQNumber::MAX_INCLUSIVE + 1]),
         }
     }
 }
@@ -148,6 +145,8 @@ impl GICv2 {
 use synchronization::interface::ReadWriteEx;
 
 impl driver::interface::DeviceDriver for GICv2 {
+    type IRQNumberType = IRQNumber;
+
     fn compatible(&self) -> &'static str {
         Self::COMPATIBLE
     }
@@ -160,8 +159,6 @@ impl driver::interface::DeviceDriver for GICv2 {
         self.gicc.priority_accept_all();
         self.gicc.enable();
 
-        (self.post_init_callback)();
-
         Ok(())
     }
 }
@@ -171,23 +168,22 @@ impl exception::asynchronous::interface::IRQManager for GICv2 {
 
     fn register_handler(
         &self,
-        irq_number: Self::IRQNumberType,
-        descriptor: exception::asynchronous::IRQDescriptor,
+        irq_handler_descriptor: exception::asynchronous::IRQHandlerDescriptor<Self::IRQNumberType>,
     ) -> Result<(), &'static str> {
         self.handler_table.write(|table| {
-            let irq_number = irq_number.get();
+            let irq_number = irq_handler_descriptor.number().get();
 
             if table[irq_number].is_some() {
                 return Err("IRQ handler already registered");
             }
 
-            table[irq_number] = Some(descriptor);
+            table[irq_number] = Some(irq_handler_descriptor);
 
             Ok(())
         })
     }
 
-    fn enable(&self, irq_number: Self::IRQNumberType) {
+    fn enable(&self, irq_number: &Self::IRQNumberType) {
         self.gicd.enable(irq_number);
     }
 
@@ -210,7 +206,7 @@ impl exception::asynchronous::interface::IRQManager for GICv2 {
                 None => panic!("No handler registered for IRQ {}", irq_number),
                 Some(descriptor) => {
                     // Call the IRQ handler. Panics on failure.
-                    descriptor.handler.handle().expect("Error handling IRQ");
+                    descriptor.handler().handle().expect("Error handling IRQ");
                 }
             }
         });
@@ -227,7 +223,7 @@ impl exception::asynchronous::interface::IRQManager for GICv2 {
         self.handler_table.read(|table| {
             for (i, opt) in table.iter().skip(32).enumerate() {
                 if let Some(handler) = opt {
-                    info!("            {: >3}. {}", i + 32, handler.name);
+                    info!("            {: >3}. {}", i + 32, handler.name());
                 }
             }
         });
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
index a9c97a8e3..8aebcf2b6 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -172,7 +172,7 @@ impl GICD {
     }
 
     /// Enable an interrupt.
-    pub fn enable(&self, irq_num: super::IRQNumber) {
+    pub fn enable(&self, irq_num: &super::IRQNumber) {
         let irq_num = irq_num.get();
 
         // Each bit in the u32 enable register corresponds to one IRQ number. Shift right by 5
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 2281e66a3..fb61a6510 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -7,6 +7,7 @@
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper,
     driver,
+    exception::asynchronous::IRQNumber,
     memory::{Address, Virtual},
     synchronization,
     synchronization::IRQSafeNullLock,
@@ -122,7 +123,6 @@ struct GPIOInner {
 /// Representation of the GPIO HW.
 pub struct GPIO {
     inner: IRQSafeNullLock<GPIOInner>,
-    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -202,10 +202,9 @@ impl GPIO {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    pub const unsafe fn new(mmio_start_addr: Address<Virtual>, post_init_callback: fn()) -> Self {
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
         Self {
             inner: IRQSafeNullLock::new(GPIOInner::new(mmio_start_addr)),
-            post_init_callback,
         }
     }
 
@@ -221,13 +220,9 @@ impl GPIO {
 use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for GPIO {
+    type IRQNumberType = IRQNumber;
+
     fn compatible(&self) -> &'static str {
         Self::COMPATIBLE
     }
-
-    unsafe fn init(&self) -> Result<(), &'static str> {
-        (self.post_init_callback)();
-
-        Ok(())
-    }
 }
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
index b4dd530da..c93a9fa1f 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -7,9 +7,12 @@
 mod peripheral_ic;
 
 use crate::{
-    driver, exception,
+    bsp::device_driver::common::BoundedUsize,
+    driver,
+    exception::{self, asynchronous::IRQHandlerDescriptor},
     memory::{Address, Virtual},
 };
+use core::fmt;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -24,10 +27,8 @@ struct PendingIRQs {
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
-pub type LocalIRQ =
-    exception::asynchronous::IRQNumber<{ InterruptController::MAX_LOCAL_IRQ_NUMBER }>;
-pub type PeripheralIRQ =
-    exception::asynchronous::IRQNumber<{ InterruptController::MAX_PERIPHERAL_IRQ_NUMBER }>;
+pub type LocalIRQ = BoundedUsize<{ InterruptController::MAX_LOCAL_IRQ_NUMBER }>;
+pub type PeripheralIRQ = BoundedUsize<{ InterruptController::MAX_PERIPHERAL_IRQ_NUMBER }>;
 
 /// Used for the associated type of trait [`exception::asynchronous::interface::IRQManager`].
 #[derive(Copy, Clone)]
@@ -40,7 +41,6 @@ pub enum IRQNumber {
 /// Representation of the Interrupt Controller.
 pub struct InterruptController {
     periph: peripheral_ic::PeripheralIC,
-    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -71,6 +71,15 @@ impl Iterator for PendingIRQs {
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
+impl fmt::Display for IRQNumber {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        match self {
+            Self::Local(number) => write!(f, "Local({})", number),
+            Self::Peripheral(number) => write!(f, "Peripheral({})", number),
+        }
+    }
+}
+
 impl InterruptController {
     // Restrict to 3 for now. This makes future code for local_ic.rs more straight forward.
     const MAX_LOCAL_IRQ_NUMBER: usize = 3;
@@ -83,13 +92,9 @@ impl InterruptController {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    pub const unsafe fn new(
-        periph_mmio_start_addr: Address<Virtual>,
-        post_init_callback: fn(),
-    ) -> Self {
+    pub const unsafe fn new(periph_mmio_start_addr: Address<Virtual>) -> Self {
         Self {
             periph: peripheral_ic::PeripheralIC::new(periph_mmio_start_addr),
-            post_init_callback,
         }
     }
 }
@@ -99,15 +104,11 @@ impl InterruptController {
 //------------------------------------------------------------------------------
 
 impl driver::interface::DeviceDriver for InterruptController {
+    type IRQNumberType = IRQNumber;
+
     fn compatible(&self) -> &'static str {
         Self::COMPATIBLE
     }
-
-    unsafe fn init(&self) -> Result<(), &'static str> {
-        (self.post_init_callback)();
-
-        Ok(())
-    }
 }
 
 impl exception::asynchronous::interface::IRQManager for InterruptController {
@@ -115,16 +116,23 @@ impl exception::asynchronous::interface::IRQManager for InterruptController {
 
     fn register_handler(
         &self,
-        irq: Self::IRQNumberType,
-        descriptor: exception::asynchronous::IRQDescriptor,
+        irq_handler_descriptor: exception::asynchronous::IRQHandlerDescriptor<Self::IRQNumberType>,
     ) -> Result<(), &'static str> {
-        match irq {
+        match irq_handler_descriptor.number() {
             IRQNumber::Local(_) => unimplemented!("Local IRQ controller not implemented."),
-            IRQNumber::Peripheral(pirq) => self.periph.register_handler(pirq, descriptor),
+            IRQNumber::Peripheral(pirq) => {
+                let periph_descriptor = IRQHandlerDescriptor::new(
+                    pirq,
+                    irq_handler_descriptor.name(),
+                    irq_handler_descriptor.handler(),
+                );
+
+                self.periph.register_handler(periph_descriptor)
+            }
         }
     }
 
-    fn enable(&self, irq: Self::IRQNumberType) {
+    fn enable(&self, irq: &Self::IRQNumberType) {
         match irq {
             IRQNumber::Local(_) => unimplemented!("Local IRQ controller not implemented."),
             IRQNumber::Peripheral(pirq) => self.periph.enable(pirq),
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index 06802d272..0a20bd874 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -52,7 +52,8 @@ type WriteOnlyRegisters = MMIODerefWrapper<WORegisterBlock>;
 /// Abstraction for the ReadOnly parts of the associated MMIO registers.
 type ReadOnlyRegisters = MMIODerefWrapper<RORegisterBlock>;
 
-type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; PeripheralIRQ::NUM_TOTAL];
+type HandlerTable = [Option<exception::asynchronous::IRQHandlerDescriptor<PeripheralIRQ>>;
+    PeripheralIRQ::MAX_INCLUSIVE + 1];
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -84,7 +85,7 @@ impl PeripheralIC {
         Self {
             wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(mmio_start_addr)),
             ro_registers: ReadOnlyRegisters::new(mmio_start_addr),
-            handler_table: InitStateLock::new([None; PeripheralIRQ::NUM_TOTAL]),
+            handler_table: InitStateLock::new([None; PeripheralIRQ::MAX_INCLUSIVE + 1]),
         }
     }
 
@@ -107,23 +108,22 @@ impl exception::asynchronous::interface::IRQManager for PeripheralIC {
 
     fn register_handler(
         &self,
-        irq: Self::IRQNumberType,
-        descriptor: exception::asynchronous::IRQDescriptor,
+        irq_handler_descriptor: exception::asynchronous::IRQHandlerDescriptor<Self::IRQNumberType>,
     ) -> Result<(), &'static str> {
         self.handler_table.write(|table| {
-            let irq_number = irq.get();
+            let irq_number = irq_handler_descriptor.number().get();
 
             if table[irq_number].is_some() {
                 return Err("IRQ handler already registered");
             }
 
-            table[irq_number] = Some(descriptor);
+            table[irq_number] = Some(irq_handler_descriptor);
 
             Ok(())
         })
     }
 
-    fn enable(&self, irq: Self::IRQNumberType) {
+    fn enable(&self, irq: &Self::IRQNumberType) {
         self.wo_registers.lock(|regs| {
             let enable_reg = if irq.get() <= 31 {
                 &regs.ENABLE_1
@@ -149,7 +149,7 @@ impl exception::asynchronous::interface::IRQManager for PeripheralIC {
                     None => panic!("No handler registered for IRQ {}", irq_number),
                     Some(descriptor) => {
                         // Call the IRQ handler. Panics on failure.
-                        descriptor.handler.handle().expect("Error handling IRQ");
+                        descriptor.handler().handle().expect("Error handling IRQ");
                     }
                 }
             }
@@ -164,7 +164,7 @@ impl exception::asynchronous::interface::IRQManager for PeripheralIC {
         self.handler_table.read(|table| {
             for (i, opt) in table.iter().enumerate() {
                 if let Some(handler) = opt {
-                    info!("            {: >3}. {}", i, handler.name);
+                    info!("            {: >3}. {}", i, handler.name());
                 }
             }
         });
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index f67d70dfb..0ee7feb78 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -10,9 +10,9 @@
 //! - <https://developer.arm.com/documentation/ddi0183/latest>
 
 use crate::{
-    bsp,
     bsp::device_driver::common::MMIODerefWrapper,
-    console, cpu, driver, exception,
+    console, cpu, driver,
+    exception::{self, asynchronous::IRQNumber},
     memory::{Address, Virtual},
     synchronization,
     synchronization::IRQSafeNullLock,
@@ -233,8 +233,6 @@ struct PL011UartInner {
 /// Representation of the UART.
 pub struct PL011Uart {
     inner: IRQSafeNullLock<PL011UartInner>,
-    irq_number: bsp::device_driver::IRQNumber,
-    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -398,16 +396,9 @@ impl PL011Uart {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    /// - The user must ensure to provide correct IRQ numbers.
-    pub const unsafe fn new(
-        mmio_start_addr: Address<Virtual>,
-        irq_number: bsp::device_driver::IRQNumber,
-        post_init_callback: fn(),
-    ) -> Self {
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
         Self {
             inner: IRQSafeNullLock::new(PL011UartInner::new(mmio_start_addr)),
-            irq_number,
-            post_init_callback,
         }
     }
 }
@@ -418,27 +409,28 @@ impl PL011Uart {
 use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for PL011Uart {
+    type IRQNumberType = IRQNumber;
+
     fn compatible(&self) -> &'static str {
         Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
         self.inner.lock(|inner| inner.init());
-        (self.post_init_callback)();
 
         Ok(())
     }
 
-    fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
-        use exception::asynchronous::{irq_manager, IRQDescriptor};
+    fn register_and_enable_irq_handler(
+        &'static self,
+        irq_number: &Self::IRQNumberType,
+    ) -> Result<(), &'static str> {
+        use exception::asynchronous::{irq_manager, IRQHandlerDescriptor};
 
-        let descriptor = IRQDescriptor {
-            name: Self::COMPATIBLE,
-            handler: self,
-        };
+        let descriptor = IRQHandlerDescriptor::new(*irq_number, Self::COMPATIBLE, self);
 
-        irq_manager().register_handler(self.irq_number, descriptor)?;
-        irq_manager().enable(self.irq_number);
+        irq_manager().register_handler(descriptor)?;
+        irq_manager().enable(irq_number);
 
         Ok(())
     }
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/common.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/common.rs
index 69f038d4d..ca7aeb76a 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/common.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/common.rs
@@ -5,7 +5,7 @@
 //! Common device driver code.
 
 use crate::memory::{Address, Virtual};
-use core::{marker::PhantomData, ops};
+use core::{fmt, marker::PhantomData, ops};
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -16,6 +16,10 @@ pub struct MMIODerefWrapper<T> {
     phantom: PhantomData<fn() -> T>,
 }
 
+/// A wrapper type for usize with integrated range bound check.
+#[derive(Copy, Clone)]
+pub struct BoundedUsize<const MAX_INCLUSIVE: usize>(usize);
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -37,3 +41,25 @@ impl<T> ops::Deref for MMIODerefWrapper<T> {
         unsafe { &*(self.start_addr.as_usize() as *const _) }
     }
 }
+
+impl<const MAX_INCLUSIVE: usize> BoundedUsize<{ MAX_INCLUSIVE }> {
+    pub const MAX_INCLUSIVE: usize = MAX_INCLUSIVE;
+
+    /// Creates a new instance if number <= MAX_INCLUSIVE.
+    pub const fn new(number: usize) -> Self {
+        assert!(number <= MAX_INCLUSIVE);
+
+        Self(number)
+    }
+
+    /// Return the wrapped number.
+    pub const fn get(self) -> usize {
+        self.0
+    }
+}
+
+impl<const MAX_INCLUSIVE: usize> fmt::Display for BoundedUsize<{ MAX_INCLUSIVE }> {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        write!(f, "{}", self.0)
+    }
+}
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/driver.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/driver.rs
index e1db4a005..ca3435aae 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/driver.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/driver.rs
@@ -7,34 +7,16 @@
 use super::{exception, memory::map::mmio};
 use crate::{
     bsp::device_driver,
-    console, driver, exception as generic_exception, memory,
+    console, driver as generic_driver,
+    exception::{self as generic_exception},
+    memory,
     memory::mmu::MMIODescriptor,
-    synchronization::{interface::ReadWriteEx, InitStateLock},
 };
 use core::{
     mem::MaybeUninit,
     sync::atomic::{AtomicBool, Ordering},
 };
 
-pub use device_driver::IRQNumber;
-
-//--------------------------------------------------------------------------------------------------
-// Private Definitions
-//--------------------------------------------------------------------------------------------------
-
-/// Device Driver Manager type.
-struct BSPDriverManager {
-    device_drivers: InitStateLock<[Option<&'static (dyn DeviceDriver + Sync)>; NUM_DRIVERS]>,
-    init_done: AtomicBool,
-}
-
-//--------------------------------------------------------------------------------------------------
-// Public Definitions
-//--------------------------------------------------------------------------------------------------
-
-/// The number of active drivers provided by this BSP.
-pub const NUM_DRIVERS: usize = 3;
-
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
@@ -49,150 +31,154 @@ static mut INTERRUPT_CONTROLLER: MaybeUninit<device_driver::InterruptController>
 #[cfg(feature = "bsp_rpi4")]
 static mut INTERRUPT_CONTROLLER: MaybeUninit<device_driver::GICv2> = MaybeUninit::uninit();
 
-static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
-    device_drivers: InitStateLock::new([None; NUM_DRIVERS]),
-    init_done: AtomicBool::new(false),
-};
-
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-impl BSPDriverManager {
-    unsafe fn instantiate_uart(&self) -> Result<(), &'static str> {
-        let mmio_descriptor = MMIODescriptor::new(mmio::PL011_UART_START, mmio::PL011_UART_SIZE);
-        let virt_addr =
-            memory::mmu::kernel_map_mmio(device_driver::PL011Uart::COMPATIBLE, &mmio_descriptor)?;
+/// This must be called only after successful init of the memory subsystem.
+unsafe fn instantiate_uart() -> Result<(), &'static str> {
+    let mmio_descriptor = MMIODescriptor::new(mmio::PL011_UART_START, mmio::PL011_UART_SIZE);
+    let virt_addr =
+        memory::mmu::kernel_map_mmio(device_driver::PL011Uart::COMPATIBLE, &mmio_descriptor)?;
 
-        // This is safe to do, because it is only called from the init'ed instance itself.
-        fn uart_post_init() {
-            console::register_console(unsafe { PL011_UART.assume_init_ref() });
-        }
+    PL011_UART.write(device_driver::PL011Uart::new(virt_addr));
 
-        PL011_UART.write(device_driver::PL011Uart::new(
-            virt_addr,
-            exception::asynchronous::irq_map::PL011_UART,
-            uart_post_init,
-        ));
+    Ok(())
+}
 
-        Ok(())
-    }
+/// This must be called only after successful init of the UART driver.
+unsafe fn post_init_uart() -> Result<(), &'static str> {
+    console::register_console(PL011_UART.assume_init_ref());
 
-    unsafe fn instantiate_gpio(&self) -> Result<(), &'static str> {
-        let mmio_descriptor = MMIODescriptor::new(mmio::GPIO_START, mmio::GPIO_SIZE);
-        let virt_addr =
-            memory::mmu::kernel_map_mmio(device_driver::GPIO::COMPATIBLE, &mmio_descriptor)?;
+    Ok(())
+}
 
-        // This is safe to do, because it is only called from the init'ed instance itself.
-        fn gpio_post_init() {
-            unsafe { GPIO.assume_init_ref().map_pl011_uart() };
-        }
+/// This must be called only after successful init of the memory subsystem.
+unsafe fn instantiate_gpio() -> Result<(), &'static str> {
+    let mmio_descriptor = MMIODescriptor::new(mmio::GPIO_START, mmio::GPIO_SIZE);
+    let virt_addr =
+        memory::mmu::kernel_map_mmio(device_driver::GPIO::COMPATIBLE, &mmio_descriptor)?;
 
-        GPIO.write(device_driver::GPIO::new(virt_addr, gpio_post_init));
+    GPIO.write(device_driver::GPIO::new(virt_addr));
 
-        Ok(())
-    }
+    Ok(())
+}
 
-    #[cfg(feature = "bsp_rpi3")]
-    unsafe fn instantiate_interrupt_controller(&self) -> Result<(), &'static str> {
-        let periph_mmio_descriptor =
-            MMIODescriptor::new(mmio::PERIPHERAL_IC_START, mmio::PERIPHERAL_IC_SIZE);
-        let periph_virt_addr = memory::mmu::kernel_map_mmio(
-            device_driver::InterruptController::COMPATIBLE,
-            &periph_mmio_descriptor,
-        )?;
-
-        // This is safe to do, because it is only called from the init'ed instance itself.
-        fn interrupt_controller_post_init() {
-            generic_exception::asynchronous::register_irq_manager(unsafe {
-                INTERRUPT_CONTROLLER.assume_init_ref()
-            });
-        }
-
-        INTERRUPT_CONTROLLER.write(device_driver::InterruptController::new(
-            periph_virt_addr,
-            interrupt_controller_post_init,
-        ));
-
-        Ok(())
-    }
+/// This must be called only after successful init of the GPIO driver.
+unsafe fn post_init_gpio() -> Result<(), &'static str> {
+    GPIO.assume_init_ref().map_pl011_uart();
+    Ok(())
+}
+
+/// This must be called only after successful init of the memory subsystem.
+#[cfg(feature = "bsp_rpi3")]
+unsafe fn instantiate_interrupt_controller() -> Result<(), &'static str> {
+    let periph_mmio_descriptor =
+        MMIODescriptor::new(mmio::PERIPHERAL_IC_START, mmio::PERIPHERAL_IC_SIZE);
+    let periph_virt_addr = memory::mmu::kernel_map_mmio(
+        device_driver::InterruptController::COMPATIBLE,
+        &periph_mmio_descriptor,
+    )?;
+
+    INTERRUPT_CONTROLLER.write(device_driver::InterruptController::new(periph_virt_addr));
 
-    #[cfg(feature = "bsp_rpi4")]
-    unsafe fn instantiate_interrupt_controller(&self) -> Result<(), &'static str> {
-        let gicd_mmio_descriptor = MMIODescriptor::new(mmio::GICD_START, mmio::GICD_SIZE);
-        let gicd_virt_addr = memory::mmu::kernel_map_mmio("GICv2 GICD", &gicd_mmio_descriptor)?;
+    Ok(())
+}
 
-        let gicc_mmio_descriptor = MMIODescriptor::new(mmio::GICC_START, mmio::GICC_SIZE);
-        let gicc_virt_addr = memory::mmu::kernel_map_mmio("GICV2 GICC", &gicc_mmio_descriptor)?;
+/// This must be called only after successful init of the memory subsystem.
+#[cfg(feature = "bsp_rpi4")]
+unsafe fn instantiate_interrupt_controller() -> Result<(), &'static str> {
+    let gicd_mmio_descriptor = MMIODescriptor::new(mmio::GICD_START, mmio::GICD_SIZE);
+    let gicd_virt_addr = memory::mmu::kernel_map_mmio("GICv2 GICD", &gicd_mmio_descriptor)?;
 
-        // This is safe to do, because it is only called from the init'ed instance itself.
-        fn interrupt_controller_post_init() {
-            generic_exception::asynchronous::register_irq_manager(unsafe {
-                INTERRUPT_CONTROLLER.assume_init_ref()
-            });
-        }
+    let gicc_mmio_descriptor = MMIODescriptor::new(mmio::GICC_START, mmio::GICC_SIZE);
+    let gicc_virt_addr = memory::mmu::kernel_map_mmio("GICV2 GICC", &gicc_mmio_descriptor)?;
 
-        INTERRUPT_CONTROLLER.write(device_driver::GICv2::new(
-            gicd_virt_addr,
-            gicc_virt_addr,
-            interrupt_controller_post_init,
-        ));
+    INTERRUPT_CONTROLLER.write(device_driver::GICv2::new(gicd_virt_addr, gicc_virt_addr));
 
-        Ok(())
-    }
+    Ok(())
+}
 
-    unsafe fn register_drivers(&self) {
-        self.device_drivers.write(|drivers| {
-            drivers[0] = Some(PL011_UART.assume_init_ref());
-            drivers[1] = Some(GPIO.assume_init_ref());
-            drivers[2] = Some(INTERRUPT_CONTROLLER.assume_init_ref());
-        });
-    }
+/// This must be called only after successful init of the interrupt controller driver.
+unsafe fn post_init_interrupt_controller() -> Result<(), &'static str> {
+    generic_exception::asynchronous::register_irq_manager(INTERRUPT_CONTROLLER.assume_init_ref());
+
+    Ok(())
 }
 
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
+/// Function needs to ensure that driver registration happens only after correct instantiation.
+unsafe fn driver_uart() -> Result<(), &'static str> {
+    instantiate_uart()?;
+
+    let uart_descriptor = generic_driver::DeviceDriverDescriptor::new(
+        PL011_UART.assume_init_ref(),
+        Some(post_init_uart),
+        Some(exception::asynchronous::irq_map::PL011_UART),
+    );
+    generic_driver::driver_manager().register_driver(uart_descriptor);
+
+    Ok(())
+}
+
+/// Function needs to ensure that driver registration happens only after correct instantiation.
+unsafe fn driver_gpio() -> Result<(), &'static str> {
+    instantiate_gpio()?;
+
+    let gpio_descriptor = generic_driver::DeviceDriverDescriptor::new(
+        GPIO.assume_init_ref(),
+        Some(post_init_gpio),
+        None,
+    );
+    generic_driver::driver_manager().register_driver(gpio_descriptor);
 
-/// Return a reference to the driver manager.
-pub fn driver_manager() -> &'static impl driver::interface::DriverManager {
-    &BSP_DRIVER_MANAGER
+    Ok(())
 }
 
-//------------------------------------------------------------------------------
-// OS Interface Code
-//------------------------------------------------------------------------------
-use driver::interface::DeviceDriver;
+/// Function needs to ensure that driver registration happens only after correct instantiation.
+unsafe fn driver_interrupt_controller() -> Result<(), &'static str> {
+    instantiate_interrupt_controller()?;
 
-impl driver::interface::DriverManager for BSPDriverManager {
-    unsafe fn instantiate_drivers(&self) -> Result<(), &'static str> {
-        if self.init_done.load(Ordering::Relaxed) {
-            return Err("Drivers already instantiated");
-        }
+    let interrupt_controller_descriptor = generic_driver::DeviceDriverDescriptor::new(
+        INTERRUPT_CONTROLLER.assume_init_ref(),
+        Some(post_init_interrupt_controller),
+        None,
+    );
+    generic_driver::driver_manager().register_driver(interrupt_controller_descriptor);
 
-        self.instantiate_uart()?;
-        self.instantiate_gpio()?;
-        self.instantiate_interrupt_controller()?;
+    Ok(())
+}
 
-        self.register_drivers();
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
 
-        self.init_done.store(true, Ordering::Relaxed);
-        Ok(())
+/// Initialize the driver subsystem.
+///
+/// # Safety
+///
+/// See child function calls.
+pub unsafe fn init() -> Result<(), &'static str> {
+    static INIT_DONE: AtomicBool = AtomicBool::new(false);
+    if INIT_DONE.load(Ordering::Relaxed) {
+        return Err("Init already done");
     }
 
-    fn all_device_drivers(&self) -> [&(dyn DeviceDriver + Sync); NUM_DRIVERS] {
-        self.device_drivers
-            .read(|drivers| drivers.map(|drivers| drivers.unwrap()))
-    }
+    driver_uart()?;
+    driver_gpio()?;
+    driver_interrupt_controller()?;
 
-    #[cfg(feature = "test_build")]
-    fn qemu_bring_up_console(&self) {
-        use crate::cpu;
+    INIT_DONE.store(true, Ordering::Relaxed);
+    Ok(())
+}
 
-        unsafe {
-            self.instantiate_uart()
-                .unwrap_or_else(|_| cpu::qemu_exit_failure());
-            console::register_console(PL011_UART.assume_init_ref());
-        };
-    }
+/// Minimal code needed to bring up the console in QEMU (for testing only). This is often less steps
+/// than on real hardware due to QEMU's abstractions.
+#[cfg(feature = "test_build")]
+pub fn qemu_bring_up_console() {
+    use crate::cpu;
+
+    unsafe {
+        instantiate_uart().unwrap_or_else(|_| cpu::qemu_exit_failure());
+        console::register_console(PL011_UART.assume_init_ref());
+    };
 }
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/exception/asynchronous.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
index ab20d86d3..06a675588 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
@@ -10,6 +10,9 @@ use crate::bsp;
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
+/// Export for reuse in generic asynchronous.rs.
+pub use bsp::device_driver::IRQNumber;
+
 #[cfg(feature = "bsp_rpi3")]
 pub(in crate::bsp) mod irq_map {
     use super::bsp::device_driver::{IRQNumber, PeripheralIRQ};
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/driver.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/driver.rs
index 98197fef3..18066c313 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/driver.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/driver.rs
@@ -4,16 +4,37 @@
 
 //! Driver support.
 
+use crate::{
+    exception, info,
+    synchronization::{interface::ReadWriteEx, InitStateLock},
+};
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+const NUM_DRIVERS: usize = 5;
+
+struct DriverManagerInner<T>
+where
+    T: 'static,
+{
+    next_index: usize,
+    descriptors: [Option<DeviceDriverDescriptor<T>>; NUM_DRIVERS],
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
 /// Driver interfaces.
 pub mod interface {
-    use crate::bsp;
-
     /// Device Driver functions.
     pub trait DeviceDriver {
+        /// Different interrupt controllers might use different types for IRQ number.
+        type IRQNumberType: super::fmt::Display;
+
         /// Return a compatibility string for identifying the driver.
         fn compatible(&self) -> &'static str;
 
@@ -26,32 +47,175 @@ pub mod interface {
             Ok(())
         }
 
-        /// Called by the kernel to register and enable the device's IRQ handlers, if any.
+        /// Called by the kernel to register and enable the device's IRQ handler.
         ///
         /// Rust's type system will prevent a call to this function unless the calling instance
         /// itself has static lifetime.
-        fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
-            Ok(())
+        fn register_and_enable_irq_handler(
+            &'static self,
+            irq_number: &Self::IRQNumberType,
+        ) -> Result<(), &'static str> {
+            panic!(
+                "Attempt to enable IRQ {} for device {}, but driver does not support this",
+                irq_number,
+                self.compatible()
+            )
+        }
+    }
+}
+
+/// Tpye to be used as an optional callback after a driver's init() has run.
+pub type DeviceDriverPostInitCallback = unsafe fn() -> Result<(), &'static str>;
+
+/// A descriptor for device drivers.
+#[derive(Copy, Clone)]
+pub struct DeviceDriverDescriptor<T>
+where
+    T: 'static,
+{
+    device_driver: &'static (dyn interface::DeviceDriver<IRQNumberType = T> + Sync),
+    post_init_callback: Option<DeviceDriverPostInitCallback>,
+    irq_number: Option<T>,
+}
+
+/// Provides device driver management functions.
+pub struct DriverManager<T>
+where
+    T: 'static,
+{
+    inner: InitStateLock<DriverManagerInner<T>>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static DRIVER_MANAGER: DriverManager<exception::asynchronous::IRQNumber> = DriverManager::new();
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl<T> DriverManagerInner<T>
+where
+    T: 'static + Copy,
+{
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self {
+            next_index: 0,
+            descriptors: [None; NUM_DRIVERS],
         }
     }
+}
 
-    /// Device driver management functions.
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl<T> DeviceDriverDescriptor<T> {
+    /// Create an instance.
+    pub fn new(
+        device_driver: &'static (dyn interface::DeviceDriver<IRQNumberType = T> + Sync),
+        post_init_callback: Option<DeviceDriverPostInitCallback>,
+        irq_number: Option<T>,
+    ) -> Self {
+        Self {
+            device_driver,
+            post_init_callback,
+            irq_number,
+        }
+    }
+}
+
+/// Return a reference to the global DriverManager.
+pub fn driver_manager() -> &'static DriverManager<exception::asynchronous::IRQNumber> {
+    &DRIVER_MANAGER
+}
+
+impl<T> DriverManager<T>
+where
+    T: fmt::Display + Copy,
+{
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self {
+            inner: InitStateLock::new(DriverManagerInner::new()),
+        }
+    }
+
+    /// Register a device driver with the kernel.
+    pub fn register_driver(&self, descriptor: DeviceDriverDescriptor<T>) {
+        self.inner.write(|inner| {
+            inner.descriptors[inner.next_index] = Some(descriptor);
+            inner.next_index += 1;
+        })
+    }
+
+    /// Helper for iterating over registered drivers.
+    fn for_each_descriptor<'a>(&'a self, f: impl FnMut(&'a DeviceDriverDescriptor<T>)) {
+        self.inner.read(|inner| {
+            inner
+                .descriptors
+                .iter()
+                .filter_map(|x| x.as_ref())
+                .for_each(f)
+        })
+    }
+
+    /// Fully initialize all drivers and their interrupts handlers.
     ///
-    /// The `BSP` is supposed to supply one global instance.
-    pub trait DriverManager {
-        /// Instantiate all drivers.
-        ///
-        /// # Safety
-        ///
-        /// Must be called before `all_device_drivers`.
-        unsafe fn instantiate_drivers(&self) -> Result<(), &'static str>;
+    /// # Safety
+    ///
+    /// - During init, drivers might do stuff with system-wide impact.
+    pub unsafe fn init_drivers_and_irqs(&self) {
+        self.for_each_descriptor(|descriptor| {
+            // 1. Initialize driver.
+            if let Err(x) = descriptor.device_driver.init() {
+                panic!(
+                    "Error initializing driver: {}: {}",
+                    descriptor.device_driver.compatible(),
+                    x
+                );
+            }
+
+            // 2. Call corresponding post init callback.
+            if let Some(callback) = &descriptor.post_init_callback {
+                if let Err(x) = callback() {
+                    panic!(
+                        "Error during driver post-init callback: {}: {}",
+                        descriptor.device_driver.compatible(),
+                        x
+                    );
+                }
+            }
+        });
+
+        // 3. After all post-init callbacks were done, the interrupt controller should be
+        //    registered and functional. So let drivers register with it now.
+        self.for_each_descriptor(|descriptor| {
+            if let Some(irq_number) = &descriptor.irq_number {
+                if let Err(x) = descriptor
+                    .device_driver
+                    .register_and_enable_irq_handler(irq_number)
+                {
+                    panic!(
+                        "Error during driver interrupt handler registration: {}: {}",
+                        descriptor.device_driver.compatible(),
+                        x
+                    );
+                }
+            }
+        });
+    }
 
-        /// Return a slice of references to all `BSP`-instantiated drivers.
-        fn all_device_drivers(&self) -> [&(dyn DeviceDriver + Sync); bsp::driver::NUM_DRIVERS];
+    /// Enumerate all registered device drivers.
+    pub fn enumerate(&self) {
+        let mut i: usize = 1;
+        self.for_each_descriptor(|descriptor| {
+            info!("      {}. {}", i, descriptor.device_driver.compatible());
 
-        /// Minimal code needed to bring up the console in QEMU (for testing only). This is often
-        /// less steps than on real hardware due to QEMU's abstractions.
-        #[cfg(feature = "test_build")]
-        fn qemu_bring_up_console(&self);
+            i += 1;
+        });
     }
 }
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous.rs
index 83ca1aa6d..c1f2a27b3 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous.rs
@@ -10,7 +10,7 @@ mod arch_asynchronous;
 mod null_irq_manager;
 
 use crate::{bsp, synchronization};
-use core::{fmt, marker::PhantomData};
+use core::marker::PhantomData;
 
 //--------------------------------------------------------------------------------------------------
 // Architectural Public Reexports
@@ -24,14 +24,23 @@ pub use arch_asynchronous::{
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
+/// Interrupt number as defined by the BSP.
+pub type IRQNumber = bsp::exception::asynchronous::IRQNumber;
+
 /// Interrupt descriptor.
 #[derive(Copy, Clone)]
-pub struct IRQDescriptor {
+pub struct IRQHandlerDescriptor<T>
+where
+    T: Copy,
+{
+    /// The IRQ number.
+    number: T,
+
     /// Descriptive name.
-    pub name: &'static str,
+    name: &'static str,
 
     /// Reference to handler trait object.
-    pub handler: &'static (dyn interface::IRQHandler + Sync),
+    handler: &'static (dyn interface::IRQHandler + Sync),
 }
 
 /// IRQContext token.
@@ -61,17 +70,16 @@ pub mod interface {
     /// platform's interrupt controller.
     pub trait IRQManager {
         /// The IRQ number type depends on the implementation.
-        type IRQNumberType;
+        type IRQNumberType: Copy;
 
         /// Register a handler.
         fn register_handler(
             &self,
-            irq_number: Self::IRQNumberType,
-            descriptor: super::IRQDescriptor,
+            irq_handler_descriptor: super::IRQHandlerDescriptor<Self::IRQNumberType>,
         ) -> Result<(), &'static str>;
 
         /// Enable an interrupt in the controller.
-        fn enable(&self, irq_number: Self::IRQNumberType);
+        fn enable(&self, irq_number: &Self::IRQNumberType);
 
         /// Handle pending interrupts.
         ///
@@ -91,16 +99,12 @@ pub mod interface {
     }
 }
 
-/// A wrapper type for IRQ numbers with integrated range sanity check.
-#[derive(Copy, Clone)]
-pub struct IRQNumber<const MAX_INCLUSIVE: usize>(usize);
-
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
 static CUR_IRQ_MANAGER: InitStateLock<
-    &'static (dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber> + Sync),
+    &'static (dyn interface::IRQManager<IRQNumberType = IRQNumber> + Sync),
 > = InitStateLock::new(&null_irq_manager::NULL_IRQ_MANAGER);
 
 //--------------------------------------------------------------------------------------------------
@@ -108,6 +112,39 @@ static CUR_IRQ_MANAGER: InitStateLock<
 //--------------------------------------------------------------------------------------------------
 use synchronization::{interface::ReadWriteEx, InitStateLock};
 
+impl<T> IRQHandlerDescriptor<T>
+where
+    T: Copy,
+{
+    /// Create an instance.
+    pub const fn new(
+        number: T,
+        name: &'static str,
+        handler: &'static (dyn interface::IRQHandler + Sync),
+    ) -> Self {
+        Self {
+            number,
+            name,
+            handler,
+        }
+    }
+
+    /// Return the number.
+    pub const fn number(&self) -> T {
+        self.number
+    }
+
+    /// Return the name.
+    pub const fn name(&self) -> &'static str {
+        self.name
+    }
+
+    /// Return the handler.
+    pub const fn handler(&self) -> &'static (dyn interface::IRQHandler + Sync) {
+        self.handler
+    }
+}
+
 impl<'irq_context> IRQContext<'irq_context> {
     /// Creates an IRQContext token.
     ///
@@ -125,29 +162,6 @@ impl<'irq_context> IRQContext<'irq_context> {
     }
 }
 
-impl<const MAX_INCLUSIVE: usize> IRQNumber<{ MAX_INCLUSIVE }> {
-    /// The total number of IRQs this type supports.
-    pub const NUM_TOTAL: usize = MAX_INCLUSIVE + 1;
-
-    /// Creates a new instance if number <= MAX_INCLUSIVE.
-    pub const fn new(number: usize) -> Self {
-        assert!(number <= MAX_INCLUSIVE);
-
-        Self(number)
-    }
-
-    /// Return the wrapped number.
-    pub const fn get(self) -> usize {
-        self.0
-    }
-}
-
-impl<const MAX_INCLUSIVE: usize> fmt::Display for IRQNumber<{ MAX_INCLUSIVE }> {
-    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
-        write!(f, "{}", self.0)
-    }
-}
-
 /// Executes the provided closure while IRQs are masked on the executing core.
 ///
 /// While the function temporarily changes the HW state of the executing core, it restores it to the
@@ -163,8 +177,7 @@ pub fn exec_with_irq_masked<T>(f: impl FnOnce() -> T) -> T {
 
 /// Register a new IRQ manager.
 pub fn register_irq_manager(
-    new_manager: &'static (dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber>
-                  + Sync),
+    new_manager: &'static (dyn interface::IRQManager<IRQNumberType = IRQNumber> + Sync),
 ) {
     CUR_IRQ_MANAGER.write(|manager| *manager = new_manager);
 }
@@ -172,6 +185,6 @@ pub fn register_irq_manager(
 /// Return a reference to the currently registered IRQ manager.
 ///
 /// This is the IRQ manager used by the architectural interrupt handling code.
-pub fn irq_manager() -> &'static dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber> {
+pub fn irq_manager() -> &'static dyn interface::IRQManager<IRQNumberType = IRQNumber> {
     CUR_IRQ_MANAGER.read(|manager| *manager)
 }
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous/null_irq_manager.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous/null_irq_manager.rs
index 560e3ce4b..438f96496 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous/null_irq_manager.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous/null_irq_manager.rs
@@ -4,8 +4,7 @@
 
 //! Null IRQ Manager.
 
-use super::{interface, IRQContext, IRQDescriptor};
-use crate::bsp;
+use super::{interface, IRQContext, IRQHandlerDescriptor};
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -24,17 +23,16 @@ pub static NULL_IRQ_MANAGER: NullIRQManager = NullIRQManager {};
 //--------------------------------------------------------------------------------------------------
 
 impl interface::IRQManager for NullIRQManager {
-    type IRQNumberType = bsp::driver::IRQNumber;
+    type IRQNumberType = super::IRQNumber;
 
     fn register_handler(
         &self,
-        _irq_number: Self::IRQNumberType,
-        _descriptor: IRQDescriptor,
+        _descriptor: IRQHandlerDescriptor<Self::IRQNumberType>,
     ) -> Result<(), &'static str> {
         panic!("No IRQ Manager registered yet");
     }
 
-    fn enable(&self, _irq_number: Self::IRQNumberType) {
+    fn enable(&self, _irq_number: &Self::IRQNumberType) {
         panic!("No IRQ Manager registered yet");
     }
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
index 22fb5fea0..25f66be31 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
@@ -186,8 +186,6 @@ pub fn test_runner(tests: &[&test_types::UnitTest]) {
 #[cfg(test)]
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
 
     let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
@@ -200,7 +198,7 @@ unsafe fn kernel_init() -> ! {
     }
 
     memory::mmu::post_enable_init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     test_main();
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/main.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/main.rs
index 776b28fa6..045d1200e 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/main.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/main.rs
@@ -13,7 +13,7 @@
 #![no_main]
 #![no_std]
 
-use libkernel::{bsp, cpu, driver, exception, info, memory, state, time, warn};
+use libkernel::{bsp, cpu, driver, exception, info, memory, state, time};
 
 /// Early init code.
 ///
@@ -26,8 +26,6 @@ use libkernel::{bsp, cpu, driver, exception, info, memory, state, time, warn};
 ///       IRQSafeNullLocks instead of spinlocks), will fail to work (properly) on the RPi SoCs.
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
 
     let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
@@ -41,22 +39,13 @@ unsafe fn kernel_init() -> ! {
 
     memory::mmu::post_enable_init();
 
-    // Instantiate and init all device drivers.
-    if let Err(x) = bsp::driver::driver_manager().instantiate_drivers() {
-        panic!("Error instantiating drivers: {}", x);
-    }
-    for i in bsp::driver::driver_manager().all_device_drivers().iter() {
-        if let Err(x) = i.init() {
-            panic!("Error loading driver: {}: {}", i.compatible(), x);
-        }
+    // Initialize the BSP driver subsystem.
+    if let Err(x) = bsp::driver::init() {
+        panic!("Error initializing BSP driver subsystem: {}", x);
     }
 
-    // Let device drivers register and enable their handlers with the interrupt controller.
-    for i in bsp::driver::driver_manager().all_device_drivers() {
-        if let Err(msg) = i.register_and_enable_irq_handler() {
-            warn!("Error registering IRQ handler: {}", msg);
-        }
-    }
+    // Initialize all device drivers.
+    driver::driver_manager().init_drivers_and_irqs();
 
     // Unmask interrupts on the boot CPU core.
     exception::asynchronous::local_irq_unmask();
@@ -70,8 +59,6 @@ unsafe fn kernel_init() -> ! {
 
 /// The main function running after the early init.
 fn kernel_main() -> ! {
-    use driver::interface::DriverManager;
-
     info!("{}", libkernel::version());
     info!("Booting on: {}", bsp::board_name());
 
@@ -90,13 +77,7 @@ fn kernel_main() -> ! {
     );
 
     info!("Drivers loaded:");
-    for (i, driver) in bsp::driver::driver_manager()
-        .all_device_drivers()
-        .iter()
-        .enumerate()
-    {
-        info!("      {}. {}", i + 1, driver.compatible());
-    }
+    driver::driver_manager().enumerate();
 
     info!("Registered IRQ handlers:");
     exception::asynchronous::irq_manager().print_handler();
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rs b/14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rs
index 9c6e9cefa..b27822d57 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rs
@@ -11,12 +11,11 @@
 /// Console tests should time out on the I/O harness in case of panic.
 mod panic_wait_forever;
 
-use libkernel::{bsp, console, cpu, driver, exception, memory, print};
+use libkernel::{bsp, console, cpu, exception, memory, print};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
     use console::console;
-    use driver::interface::DriverManager;
 
     exception::handling_init();
 
@@ -30,7 +29,7 @@ unsafe fn kernel_init() -> ! {
     }
 
     memory::mmu::post_enable_init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     // Handshake
     assert_eq!(console().read_char(), 'A');
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/tests/01_timer_sanity.rs b/14_virtual_mem_part2_mmio_remap/kernel/tests/01_timer_sanity.rs
index dd34b06c7..691b511d1 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/tests/01_timer_sanity.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/tests/01_timer_sanity.rs
@@ -11,13 +11,11 @@
 #![test_runner(libkernel::test_runner)]
 
 use core::time::Duration;
-use libkernel::{bsp, cpu, driver, exception, memory, time};
+use libkernel::{bsp, cpu, exception, memory, time};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
 
     let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
@@ -30,7 +28,7 @@ unsafe fn kernel_init() -> ! {
     }
 
     memory::mmu::post_enable_init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fault.rs b/14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fault.rs
index 594ffb401..c30539614 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fault.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fault.rs
@@ -17,12 +17,10 @@
 /// or indirectly.
 mod panic_exit_success;
 
-use libkernel::{bsp, cpu, driver, exception, info, memory, println};
+use libkernel::{bsp, cpu, exception, info, memory, println};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
 
     // This line will be printed as the test header.
@@ -42,7 +40,7 @@ unsafe fn kernel_init() -> ! {
     }
 
     memory::mmu::post_enable_init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     info!("Writing beyond mapped area to address 9 GiB...");
     let big_addr: u64 = 9 * 1024 * 1024 * 1024;
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rs b/14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rs
index 32001b2a7..6351e80c6 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rs
@@ -12,7 +12,7 @@
 mod panic_wait_forever;
 
 use core::arch::asm;
-use libkernel::{bsp, cpu, driver, exception, info, memory, println};
+use libkernel::{bsp, cpu, exception, info, memory, println};
 
 #[inline(never)]
 fn nested_system_call() {
@@ -30,8 +30,6 @@ fn nested_system_call() {
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
 
     // This line will be printed as the test header.
@@ -51,7 +49,7 @@ unsafe fn kernel_init() -> ! {
     }
 
     memory::mmu::post_enable_init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     info!("Making a dummy system call");
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.rs b/14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.rs
index c9e244ce6..35bf51b69 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.rs
@@ -10,13 +10,11 @@
 #![reexport_test_harness_main = "test_main"]
 #![test_runner(libkernel::test_runner)]
 
-use libkernel::{bsp, cpu, driver, exception, memory};
+use libkernel::{bsp, cpu, exception, memory};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
 
     let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
@@ -29,7 +27,7 @@ unsafe fn kernel_init() -> ! {
     }
 
     memory::mmu::post_enable_init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     exception::asynchronous::local_irq_unmask();
 
diff --git a/15_virtual_mem_part3_precomputed_tables/Makefile b/15_virtual_mem_part3_precomputed_tables/Makefile
index 2e0a34626..4092ec8fe 100644
--- a/15_virtual_mem_part3_precomputed_tables/Makefile
+++ b/15_virtual_mem_part3_precomputed_tables/Makefile
@@ -310,7 +310,7 @@ test_boot: $(KERNEL_BIN)
 ## Helpers for unit and integration test targets
 ##------------------------------------------------------------------------------
 define KERNEL_TEST_RUNNER
-    #!/usr/bin/env bash
+#!/usr/bin/env bash
 
     # The cargo test runner seems to change into the crate under test's directory. Therefore, ensure
     # this script executes from the root.
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index a6ebe3321..00586235e 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -1336,9 +1336,9 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/memory/mmu.
 diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs 15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs
 --- 14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
 +++ 15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs
-@@ -189,17 +189,7 @@
-     use driver::interface::DriverManager;
-
+@@ -187,17 +187,7 @@
+ #[no_mangle]
+ unsafe fn kernel_init() -> ! {
      exception::handling_init();
 -
 -    let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
@@ -1352,14 +1352,14 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs 15_virtual_mem_part3
 -
 -    memory::mmu::post_enable_init();
 +    memory::init();
-     bsp::driver::driver_manager().qemu_bring_up_console();
+     bsp::driver::qemu_bring_up_console();
 
      test_main();
 
 diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/main.rs 15_virtual_mem_part3_precomputed_tables/kernel/src/main.rs
 --- 14_virtual_mem_part2_mmio_remap/kernel/src/main.rs
 +++ 15_virtual_mem_part3_precomputed_tables/kernel/src/main.rs
-@@ -17,29 +17,18 @@
+@@ -17,27 +17,16 @@
 
  /// Early init code.
  ///
@@ -1375,8 +1375,6 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/main.rs 15_virtual_mem_part
 +/// - Printing will not work until the respective driver's MMIO is remapped.
  #[no_mangle]
  unsafe fn kernel_init() -> ! {
-     use driver::interface::DriverManager;
-
      exception::handling_init();
 -
 -    let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
@@ -1391,11 +1389,11 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/main.rs 15_virtual_mem_part
 -    memory::mmu::post_enable_init();
 +    memory::init();
 
-     // Instantiate and init all device drivers.
-     if let Err(x) = bsp::driver::driver_manager().instantiate_drivers() {
-@@ -58,6 +47,8 @@
-         }
-     }
+     // Initialize the BSP driver subsystem.
+     if let Err(x) = bsp::driver::init() {
+@@ -47,6 +36,8 @@
+     // Initialize all device drivers.
+     driver::driver_manager().init_drivers_and_irqs();
 
 +    bsp::memory::mmu::kernel_add_mapping_records_for_precomputed();
 +
@@ -1711,8 +1709,8 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/memory.rs 15_virtual_mem_pa
 diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rs 15_virtual_mem_part3_precomputed_tables/kernel/tests/00_console_sanity.rs
 --- 14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rs
 +++ 15_virtual_mem_part3_precomputed_tables/kernel/tests/00_console_sanity.rs
-@@ -19,17 +19,7 @@
-     use driver::interface::DriverManager;
+@@ -18,17 +18,7 @@
+     use console::console;
 
      exception::handling_init();
 -
@@ -1727,16 +1725,16 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rs 15_v
 -
 -    memory::mmu::post_enable_init();
 +    memory::init();
-     bsp::driver::driver_manager().qemu_bring_up_console();
+     bsp::driver::qemu_bring_up_console();
 
      // Handshake
 
 diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/01_timer_sanity.rs 15_virtual_mem_part3_precomputed_tables/kernel/tests/01_timer_sanity.rs
 --- 14_virtual_mem_part2_mmio_remap/kernel/tests/01_timer_sanity.rs
 +++ 15_virtual_mem_part3_precomputed_tables/kernel/tests/01_timer_sanity.rs
-@@ -19,17 +19,7 @@
-     use driver::interface::DriverManager;
-
+@@ -17,17 +17,7 @@
+ #[no_mangle]
+ unsafe fn kernel_init() -> ! {
      exception::handling_init();
 -
 -    let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
@@ -1750,19 +1748,19 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/01_timer_sanity.rs 15_vir
 -
 -    memory::mmu::post_enable_init();
 +    memory::init();
-     bsp::driver::driver_manager().qemu_bring_up_console();
+     bsp::driver::qemu_bring_up_console();
 
      // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
 
 diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fault.rs 15_virtual_mem_part3_precomputed_tables/kernel/tests/02_exception_sync_page_fault.rs
 --- 14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fault.rs
 +++ 15_virtual_mem_part3_precomputed_tables/kernel/tests/02_exception_sync_page_fault.rs
-@@ -24,26 +24,12 @@
-     use driver::interface::DriverManager;
-
+@@ -22,26 +22,12 @@
+ #[no_mangle]
+ unsafe fn kernel_init() -> ! {
      exception::handling_init();
 +    memory::init();
-+    bsp::driver::driver_manager().qemu_bring_up_console();
++    bsp::driver::qemu_bring_up_console();
 
      // This line will be printed as the test header.
      println!("Testing synchronous exception handling by causing a page fault");
@@ -1781,7 +1779,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fa
 -    }
 -
 -    memory::mmu::post_enable_init();
--    bsp::driver::driver_manager().qemu_bring_up_console();
+-    bsp::driver::qemu_bring_up_console();
 -
      info!("Writing beyond mapped area to address 9 GiB...");
      let big_addr: u64 = 9 * 1024 * 1024 * 1024;
@@ -1790,12 +1788,12 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fa
 diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rs 15_virtual_mem_part3_precomputed_tables/kernel/tests/03_exception_restore_sanity.rs
 --- 14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rs
 +++ 15_virtual_mem_part3_precomputed_tables/kernel/tests/03_exception_restore_sanity.rs
-@@ -33,26 +33,12 @@
-     use driver::interface::DriverManager;
-
+@@ -31,26 +31,12 @@
+ #[no_mangle]
+ unsafe fn kernel_init() -> ! {
      exception::handling_init();
 +    memory::init();
-+    bsp::driver::driver_manager().qemu_bring_up_console();
++    bsp::driver::qemu_bring_up_console();
 
      // This line will be printed as the test header.
      println!("Testing exception restore");
@@ -1814,7 +1812,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sani
 -    }
 -
 -    memory::mmu::post_enable_init();
--    bsp::driver::driver_manager().qemu_bring_up_console();
+-    bsp::driver::qemu_bring_up_console();
 -
      info!("Making a dummy system call");
 
@@ -1823,10 +1821,10 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sani
 diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.rs 15_virtual_mem_part3_precomputed_tables/kernel/tests/04_exception_irq_sanity.rs
 --- 14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.rs
 +++ 15_virtual_mem_part3_precomputed_tables/kernel/tests/04_exception_irq_sanity.rs
-@@ -17,20 +17,10 @@
- unsafe fn kernel_init() -> ! {
-     use driver::interface::DriverManager;
+@@ -15,20 +15,10 @@
 
+ #[no_mangle]
+ unsafe fn kernel_init() -> ! {
 -    exception::handling_init();
 -
 -    let phys_kernel_tables_base_addr = match memory::mmu::kernel_map_binary() {
@@ -1840,7 +1838,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.r
 -
 -    memory::mmu::post_enable_init();
 +    memory::init();
-     bsp::driver::driver_manager().qemu_bring_up_console();
+     bsp::driver::qemu_bring_up_console();
 
 +    exception::handling_init();
      exception::asynchronous::local_irq_unmask();
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2.rs
index ec65f1b2a..3cc35b5ee 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2.rs
@@ -80,7 +80,8 @@ mod gicc;
 mod gicd;
 
 use crate::{
-    bsp, cpu, driver, exception,
+    bsp::{self, device_driver::common::BoundedUsize},
+    cpu, driver, exception,
     memory::{Address, Virtual},
     synchronization,
     synchronization::InitStateLock,
@@ -90,14 +91,15 @@ use crate::{
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
-type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; IRQNumber::NUM_TOTAL];
+type HandlerTable = [Option<exception::asynchronous::IRQHandlerDescriptor<IRQNumber>>;
+    IRQNumber::MAX_INCLUSIVE + 1];
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
 /// Used for the associated type of trait [`exception::asynchronous::interface::IRQManager`].
-pub type IRQNumber = exception::asynchronous::IRQNumber<{ GICv2::MAX_IRQ_NUMBER }>;
+pub type IRQNumber = BoundedUsize<{ GICv2::MAX_IRQ_NUMBER }>;
 
 /// Representation of the GIC.
 pub struct GICv2 {
@@ -109,9 +111,6 @@ pub struct GICv2 {
 
     /// Stores registered IRQ handlers. Writable only during kernel init. RO afterwards.
     handler_table: InitStateLock<HandlerTable>,
-
-    /// Callback to be invoked after successful init.
-    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -131,13 +130,11 @@ impl GICv2 {
     pub const unsafe fn new(
         gicd_mmio_start_addr: Address<Virtual>,
         gicc_mmio_start_addr: Address<Virtual>,
-        post_init_callback: fn(),
     ) -> Self {
         Self {
             gicd: gicd::GICD::new(gicd_mmio_start_addr),
             gicc: gicc::GICC::new(gicc_mmio_start_addr),
-            handler_table: InitStateLock::new([None; IRQNumber::NUM_TOTAL]),
-            post_init_callback,
+            handler_table: InitStateLock::new([None; IRQNumber::MAX_INCLUSIVE + 1]),
         }
     }
 }
@@ -148,6 +145,8 @@ impl GICv2 {
 use synchronization::interface::ReadWriteEx;
 
 impl driver::interface::DeviceDriver for GICv2 {
+    type IRQNumberType = IRQNumber;
+
     fn compatible(&self) -> &'static str {
         Self::COMPATIBLE
     }
@@ -160,8 +159,6 @@ impl driver::interface::DeviceDriver for GICv2 {
         self.gicc.priority_accept_all();
         self.gicc.enable();
 
-        (self.post_init_callback)();
-
         Ok(())
     }
 }
@@ -171,23 +168,22 @@ impl exception::asynchronous::interface::IRQManager for GICv2 {
 
     fn register_handler(
         &self,
-        irq_number: Self::IRQNumberType,
-        descriptor: exception::asynchronous::IRQDescriptor,
+        irq_handler_descriptor: exception::asynchronous::IRQHandlerDescriptor<Self::IRQNumberType>,
     ) -> Result<(), &'static str> {
         self.handler_table.write(|table| {
-            let irq_number = irq_number.get();
+            let irq_number = irq_handler_descriptor.number().get();
 
             if table[irq_number].is_some() {
                 return Err("IRQ handler already registered");
             }
 
-            table[irq_number] = Some(descriptor);
+            table[irq_number] = Some(irq_handler_descriptor);
 
             Ok(())
         })
     }
 
-    fn enable(&self, irq_number: Self::IRQNumberType) {
+    fn enable(&self, irq_number: &Self::IRQNumberType) {
         self.gicd.enable(irq_number);
     }
 
@@ -210,7 +206,7 @@ impl exception::asynchronous::interface::IRQManager for GICv2 {
                 None => panic!("No handler registered for IRQ {}", irq_number),
                 Some(descriptor) => {
                     // Call the IRQ handler. Panics on failure.
-                    descriptor.handler.handle().expect("Error handling IRQ");
+                    descriptor.handler().handle().expect("Error handling IRQ");
                 }
             }
         });
@@ -227,7 +223,7 @@ impl exception::asynchronous::interface::IRQManager for GICv2 {
         self.handler_table.read(|table| {
             for (i, opt) in table.iter().skip(32).enumerate() {
                 if let Some(handler) = opt {
-                    info!("            {: >3}. {}", i + 32, handler.name);
+                    info!("            {: >3}. {}", i + 32, handler.name());
                 }
             }
         });
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
index a9c97a8e3..8aebcf2b6 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -172,7 +172,7 @@ impl GICD {
     }
 
     /// Enable an interrupt.
-    pub fn enable(&self, irq_num: super::IRQNumber) {
+    pub fn enable(&self, irq_num: &super::IRQNumber) {
         let irq_num = irq_num.get();
 
         // Each bit in the u32 enable register corresponds to one IRQ number. Shift right by 5
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 2281e66a3..fb61a6510 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -7,6 +7,7 @@
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper,
     driver,
+    exception::asynchronous::IRQNumber,
     memory::{Address, Virtual},
     synchronization,
     synchronization::IRQSafeNullLock,
@@ -122,7 +123,6 @@ struct GPIOInner {
 /// Representation of the GPIO HW.
 pub struct GPIO {
     inner: IRQSafeNullLock<GPIOInner>,
-    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -202,10 +202,9 @@ impl GPIO {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    pub const unsafe fn new(mmio_start_addr: Address<Virtual>, post_init_callback: fn()) -> Self {
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
         Self {
             inner: IRQSafeNullLock::new(GPIOInner::new(mmio_start_addr)),
-            post_init_callback,
         }
     }
 
@@ -221,13 +220,9 @@ impl GPIO {
 use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for GPIO {
+    type IRQNumberType = IRQNumber;
+
     fn compatible(&self) -> &'static str {
         Self::COMPATIBLE
     }
-
-    unsafe fn init(&self) -> Result<(), &'static str> {
-        (self.post_init_callback)();
-
-        Ok(())
-    }
 }
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
index b4dd530da..c93a9fa1f 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -7,9 +7,12 @@
 mod peripheral_ic;
 
 use crate::{
-    driver, exception,
+    bsp::device_driver::common::BoundedUsize,
+    driver,
+    exception::{self, asynchronous::IRQHandlerDescriptor},
     memory::{Address, Virtual},
 };
+use core::fmt;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -24,10 +27,8 @@ struct PendingIRQs {
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
-pub type LocalIRQ =
-    exception::asynchronous::IRQNumber<{ InterruptController::MAX_LOCAL_IRQ_NUMBER }>;
-pub type PeripheralIRQ =
-    exception::asynchronous::IRQNumber<{ InterruptController::MAX_PERIPHERAL_IRQ_NUMBER }>;
+pub type LocalIRQ = BoundedUsize<{ InterruptController::MAX_LOCAL_IRQ_NUMBER }>;
+pub type PeripheralIRQ = BoundedUsize<{ InterruptController::MAX_PERIPHERAL_IRQ_NUMBER }>;
 
 /// Used for the associated type of trait [`exception::asynchronous::interface::IRQManager`].
 #[derive(Copy, Clone)]
@@ -40,7 +41,6 @@ pub enum IRQNumber {
 /// Representation of the Interrupt Controller.
 pub struct InterruptController {
     periph: peripheral_ic::PeripheralIC,
-    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -71,6 +71,15 @@ impl Iterator for PendingIRQs {
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
+impl fmt::Display for IRQNumber {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        match self {
+            Self::Local(number) => write!(f, "Local({})", number),
+            Self::Peripheral(number) => write!(f, "Peripheral({})", number),
+        }
+    }
+}
+
 impl InterruptController {
     // Restrict to 3 for now. This makes future code for local_ic.rs more straight forward.
     const MAX_LOCAL_IRQ_NUMBER: usize = 3;
@@ -83,13 +92,9 @@ impl InterruptController {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    pub const unsafe fn new(
-        periph_mmio_start_addr: Address<Virtual>,
-        post_init_callback: fn(),
-    ) -> Self {
+    pub const unsafe fn new(periph_mmio_start_addr: Address<Virtual>) -> Self {
         Self {
             periph: peripheral_ic::PeripheralIC::new(periph_mmio_start_addr),
-            post_init_callback,
         }
     }
 }
@@ -99,15 +104,11 @@ impl InterruptController {
 //------------------------------------------------------------------------------
 
 impl driver::interface::DeviceDriver for InterruptController {
+    type IRQNumberType = IRQNumber;
+
     fn compatible(&self) -> &'static str {
         Self::COMPATIBLE
     }
-
-    unsafe fn init(&self) -> Result<(), &'static str> {
-        (self.post_init_callback)();
-
-        Ok(())
-    }
 }
 
 impl exception::asynchronous::interface::IRQManager for InterruptController {
@@ -115,16 +116,23 @@ impl exception::asynchronous::interface::IRQManager for InterruptController {
 
     fn register_handler(
         &self,
-        irq: Self::IRQNumberType,
-        descriptor: exception::asynchronous::IRQDescriptor,
+        irq_handler_descriptor: exception::asynchronous::IRQHandlerDescriptor<Self::IRQNumberType>,
     ) -> Result<(), &'static str> {
-        match irq {
+        match irq_handler_descriptor.number() {
             IRQNumber::Local(_) => unimplemented!("Local IRQ controller not implemented."),
-            IRQNumber::Peripheral(pirq) => self.periph.register_handler(pirq, descriptor),
+            IRQNumber::Peripheral(pirq) => {
+                let periph_descriptor = IRQHandlerDescriptor::new(
+                    pirq,
+                    irq_handler_descriptor.name(),
+                    irq_handler_descriptor.handler(),
+                );
+
+                self.periph.register_handler(periph_descriptor)
+            }
         }
     }
 
-    fn enable(&self, irq: Self::IRQNumberType) {
+    fn enable(&self, irq: &Self::IRQNumberType) {
         match irq {
             IRQNumber::Local(_) => unimplemented!("Local IRQ controller not implemented."),
             IRQNumber::Peripheral(pirq) => self.periph.enable(pirq),
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index 06802d272..0a20bd874 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -52,7 +52,8 @@ type WriteOnlyRegisters = MMIODerefWrapper<WORegisterBlock>;
 /// Abstraction for the ReadOnly parts of the associated MMIO registers.
 type ReadOnlyRegisters = MMIODerefWrapper<RORegisterBlock>;
 
-type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; PeripheralIRQ::NUM_TOTAL];
+type HandlerTable = [Option<exception::asynchronous::IRQHandlerDescriptor<PeripheralIRQ>>;
+    PeripheralIRQ::MAX_INCLUSIVE + 1];
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -84,7 +85,7 @@ impl PeripheralIC {
         Self {
             wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(mmio_start_addr)),
             ro_registers: ReadOnlyRegisters::new(mmio_start_addr),
-            handler_table: InitStateLock::new([None; PeripheralIRQ::NUM_TOTAL]),
+            handler_table: InitStateLock::new([None; PeripheralIRQ::MAX_INCLUSIVE + 1]),
         }
     }
 
@@ -107,23 +108,22 @@ impl exception::asynchronous::interface::IRQManager for PeripheralIC {
 
     fn register_handler(
         &self,
-        irq: Self::IRQNumberType,
-        descriptor: exception::asynchronous::IRQDescriptor,
+        irq_handler_descriptor: exception::asynchronous::IRQHandlerDescriptor<Self::IRQNumberType>,
     ) -> Result<(), &'static str> {
         self.handler_table.write(|table| {
-            let irq_number = irq.get();
+            let irq_number = irq_handler_descriptor.number().get();
 
             if table[irq_number].is_some() {
                 return Err("IRQ handler already registered");
             }
 
-            table[irq_number] = Some(descriptor);
+            table[irq_number] = Some(irq_handler_descriptor);
 
             Ok(())
         })
     }
 
-    fn enable(&self, irq: Self::IRQNumberType) {
+    fn enable(&self, irq: &Self::IRQNumberType) {
         self.wo_registers.lock(|regs| {
             let enable_reg = if irq.get() <= 31 {
                 &regs.ENABLE_1
@@ -149,7 +149,7 @@ impl exception::asynchronous::interface::IRQManager for PeripheralIC {
                     None => panic!("No handler registered for IRQ {}", irq_number),
                     Some(descriptor) => {
                         // Call the IRQ handler. Panics on failure.
-                        descriptor.handler.handle().expect("Error handling IRQ");
+                        descriptor.handler().handle().expect("Error handling IRQ");
                     }
                 }
             }
@@ -164,7 +164,7 @@ impl exception::asynchronous::interface::IRQManager for PeripheralIC {
         self.handler_table.read(|table| {
             for (i, opt) in table.iter().enumerate() {
                 if let Some(handler) = opt {
-                    info!("            {: >3}. {}", i, handler.name);
+                    info!("            {: >3}. {}", i, handler.name());
                 }
             }
         });
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index f67d70dfb..0ee7feb78 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -10,9 +10,9 @@
 //! - <https://developer.arm.com/documentation/ddi0183/latest>
 
 use crate::{
-    bsp,
     bsp::device_driver::common::MMIODerefWrapper,
-    console, cpu, driver, exception,
+    console, cpu, driver,
+    exception::{self, asynchronous::IRQNumber},
     memory::{Address, Virtual},
     synchronization,
     synchronization::IRQSafeNullLock,
@@ -233,8 +233,6 @@ struct PL011UartInner {
 /// Representation of the UART.
 pub struct PL011Uart {
     inner: IRQSafeNullLock<PL011UartInner>,
-    irq_number: bsp::device_driver::IRQNumber,
-    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -398,16 +396,9 @@ impl PL011Uart {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    /// - The user must ensure to provide correct IRQ numbers.
-    pub const unsafe fn new(
-        mmio_start_addr: Address<Virtual>,
-        irq_number: bsp::device_driver::IRQNumber,
-        post_init_callback: fn(),
-    ) -> Self {
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
         Self {
             inner: IRQSafeNullLock::new(PL011UartInner::new(mmio_start_addr)),
-            irq_number,
-            post_init_callback,
         }
     }
 }
@@ -418,27 +409,28 @@ impl PL011Uart {
 use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for PL011Uart {
+    type IRQNumberType = IRQNumber;
+
     fn compatible(&self) -> &'static str {
         Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
         self.inner.lock(|inner| inner.init());
-        (self.post_init_callback)();
 
         Ok(())
     }
 
-    fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
-        use exception::asynchronous::{irq_manager, IRQDescriptor};
+    fn register_and_enable_irq_handler(
+        &'static self,
+        irq_number: &Self::IRQNumberType,
+    ) -> Result<(), &'static str> {
+        use exception::asynchronous::{irq_manager, IRQHandlerDescriptor};
 
-        let descriptor = IRQDescriptor {
-            name: Self::COMPATIBLE,
-            handler: self,
-        };
+        let descriptor = IRQHandlerDescriptor::new(*irq_number, Self::COMPATIBLE, self);
 
-        irq_manager().register_handler(self.irq_number, descriptor)?;
-        irq_manager().enable(self.irq_number);
+        irq_manager().register_handler(descriptor)?;
+        irq_manager().enable(irq_number);
 
         Ok(())
     }
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/common.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/common.rs
index 69f038d4d..ca7aeb76a 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/common.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/common.rs
@@ -5,7 +5,7 @@
 //! Common device driver code.
 
 use crate::memory::{Address, Virtual};
-use core::{marker::PhantomData, ops};
+use core::{fmt, marker::PhantomData, ops};
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -16,6 +16,10 @@ pub struct MMIODerefWrapper<T> {
     phantom: PhantomData<fn() -> T>,
 }
 
+/// A wrapper type for usize with integrated range bound check.
+#[derive(Copy, Clone)]
+pub struct BoundedUsize<const MAX_INCLUSIVE: usize>(usize);
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -37,3 +41,25 @@ impl<T> ops::Deref for MMIODerefWrapper<T> {
         unsafe { &*(self.start_addr.as_usize() as *const _) }
     }
 }
+
+impl<const MAX_INCLUSIVE: usize> BoundedUsize<{ MAX_INCLUSIVE }> {
+    pub const MAX_INCLUSIVE: usize = MAX_INCLUSIVE;
+
+    /// Creates a new instance if number <= MAX_INCLUSIVE.
+    pub const fn new(number: usize) -> Self {
+        assert!(number <= MAX_INCLUSIVE);
+
+        Self(number)
+    }
+
+    /// Return the wrapped number.
+    pub const fn get(self) -> usize {
+        self.0
+    }
+}
+
+impl<const MAX_INCLUSIVE: usize> fmt::Display for BoundedUsize<{ MAX_INCLUSIVE }> {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        write!(f, "{}", self.0)
+    }
+}
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/driver.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/driver.rs
index e1db4a005..ca3435aae 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/driver.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/driver.rs
@@ -7,34 +7,16 @@
 use super::{exception, memory::map::mmio};
 use crate::{
     bsp::device_driver,
-    console, driver, exception as generic_exception, memory,
+    console, driver as generic_driver,
+    exception::{self as generic_exception},
+    memory,
     memory::mmu::MMIODescriptor,
-    synchronization::{interface::ReadWriteEx, InitStateLock},
 };
 use core::{
     mem::MaybeUninit,
     sync::atomic::{AtomicBool, Ordering},
 };
 
-pub use device_driver::IRQNumber;
-
-//--------------------------------------------------------------------------------------------------
-// Private Definitions
-//--------------------------------------------------------------------------------------------------
-
-/// Device Driver Manager type.
-struct BSPDriverManager {
-    device_drivers: InitStateLock<[Option<&'static (dyn DeviceDriver + Sync)>; NUM_DRIVERS]>,
-    init_done: AtomicBool,
-}
-
-//--------------------------------------------------------------------------------------------------
-// Public Definitions
-//--------------------------------------------------------------------------------------------------
-
-/// The number of active drivers provided by this BSP.
-pub const NUM_DRIVERS: usize = 3;
-
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
@@ -49,150 +31,154 @@ static mut INTERRUPT_CONTROLLER: MaybeUninit<device_driver::InterruptController>
 #[cfg(feature = "bsp_rpi4")]
 static mut INTERRUPT_CONTROLLER: MaybeUninit<device_driver::GICv2> = MaybeUninit::uninit();
 
-static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
-    device_drivers: InitStateLock::new([None; NUM_DRIVERS]),
-    init_done: AtomicBool::new(false),
-};
-
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-impl BSPDriverManager {
-    unsafe fn instantiate_uart(&self) -> Result<(), &'static str> {
-        let mmio_descriptor = MMIODescriptor::new(mmio::PL011_UART_START, mmio::PL011_UART_SIZE);
-        let virt_addr =
-            memory::mmu::kernel_map_mmio(device_driver::PL011Uart::COMPATIBLE, &mmio_descriptor)?;
+/// This must be called only after successful init of the memory subsystem.
+unsafe fn instantiate_uart() -> Result<(), &'static str> {
+    let mmio_descriptor = MMIODescriptor::new(mmio::PL011_UART_START, mmio::PL011_UART_SIZE);
+    let virt_addr =
+        memory::mmu::kernel_map_mmio(device_driver::PL011Uart::COMPATIBLE, &mmio_descriptor)?;
 
-        // This is safe to do, because it is only called from the init'ed instance itself.
-        fn uart_post_init() {
-            console::register_console(unsafe { PL011_UART.assume_init_ref() });
-        }
+    PL011_UART.write(device_driver::PL011Uart::new(virt_addr));
 
-        PL011_UART.write(device_driver::PL011Uart::new(
-            virt_addr,
-            exception::asynchronous::irq_map::PL011_UART,
-            uart_post_init,
-        ));
+    Ok(())
+}
 
-        Ok(())
-    }
+/// This must be called only after successful init of the UART driver.
+unsafe fn post_init_uart() -> Result<(), &'static str> {
+    console::register_console(PL011_UART.assume_init_ref());
 
-    unsafe fn instantiate_gpio(&self) -> Result<(), &'static str> {
-        let mmio_descriptor = MMIODescriptor::new(mmio::GPIO_START, mmio::GPIO_SIZE);
-        let virt_addr =
-            memory::mmu::kernel_map_mmio(device_driver::GPIO::COMPATIBLE, &mmio_descriptor)?;
+    Ok(())
+}
 
-        // This is safe to do, because it is only called from the init'ed instance itself.
-        fn gpio_post_init() {
-            unsafe { GPIO.assume_init_ref().map_pl011_uart() };
-        }
+/// This must be called only after successful init of the memory subsystem.
+unsafe fn instantiate_gpio() -> Result<(), &'static str> {
+    let mmio_descriptor = MMIODescriptor::new(mmio::GPIO_START, mmio::GPIO_SIZE);
+    let virt_addr =
+        memory::mmu::kernel_map_mmio(device_driver::GPIO::COMPATIBLE, &mmio_descriptor)?;
 
-        GPIO.write(device_driver::GPIO::new(virt_addr, gpio_post_init));
+    GPIO.write(device_driver::GPIO::new(virt_addr));
 
-        Ok(())
-    }
+    Ok(())
+}
 
-    #[cfg(feature = "bsp_rpi3")]
-    unsafe fn instantiate_interrupt_controller(&self) -> Result<(), &'static str> {
-        let periph_mmio_descriptor =
-            MMIODescriptor::new(mmio::PERIPHERAL_IC_START, mmio::PERIPHERAL_IC_SIZE);
-        let periph_virt_addr = memory::mmu::kernel_map_mmio(
-            device_driver::InterruptController::COMPATIBLE,
-            &periph_mmio_descriptor,
-        )?;
-
-        // This is safe to do, because it is only called from the init'ed instance itself.
-        fn interrupt_controller_post_init() {
-            generic_exception::asynchronous::register_irq_manager(unsafe {
-                INTERRUPT_CONTROLLER.assume_init_ref()
-            });
-        }
-
-        INTERRUPT_CONTROLLER.write(device_driver::InterruptController::new(
-            periph_virt_addr,
-            interrupt_controller_post_init,
-        ));
-
-        Ok(())
-    }
+/// This must be called only after successful init of the GPIO driver.
+unsafe fn post_init_gpio() -> Result<(), &'static str> {
+    GPIO.assume_init_ref().map_pl011_uart();
+    Ok(())
+}
+
+/// This must be called only after successful init of the memory subsystem.
+#[cfg(feature = "bsp_rpi3")]
+unsafe fn instantiate_interrupt_controller() -> Result<(), &'static str> {
+    let periph_mmio_descriptor =
+        MMIODescriptor::new(mmio::PERIPHERAL_IC_START, mmio::PERIPHERAL_IC_SIZE);
+    let periph_virt_addr = memory::mmu::kernel_map_mmio(
+        device_driver::InterruptController::COMPATIBLE,
+        &periph_mmio_descriptor,
+    )?;
+
+    INTERRUPT_CONTROLLER.write(device_driver::InterruptController::new(periph_virt_addr));
 
-    #[cfg(feature = "bsp_rpi4")]
-    unsafe fn instantiate_interrupt_controller(&self) -> Result<(), &'static str> {
-        let gicd_mmio_descriptor = MMIODescriptor::new(mmio::GICD_START, mmio::GICD_SIZE);
-        let gicd_virt_addr = memory::mmu::kernel_map_mmio("GICv2 GICD", &gicd_mmio_descriptor)?;
+    Ok(())
+}
 
-        let gicc_mmio_descriptor = MMIODescriptor::new(mmio::GICC_START, mmio::GICC_SIZE);
-        let gicc_virt_addr = memory::mmu::kernel_map_mmio("GICV2 GICC", &gicc_mmio_descriptor)?;
+/// This must be called only after successful init of the memory subsystem.
+#[cfg(feature = "bsp_rpi4")]
+unsafe fn instantiate_interrupt_controller() -> Result<(), &'static str> {
+    let gicd_mmio_descriptor = MMIODescriptor::new(mmio::GICD_START, mmio::GICD_SIZE);
+    let gicd_virt_addr = memory::mmu::kernel_map_mmio("GICv2 GICD", &gicd_mmio_descriptor)?;
 
-        // This is safe to do, because it is only called from the init'ed instance itself.
-        fn interrupt_controller_post_init() {
-            generic_exception::asynchronous::register_irq_manager(unsafe {
-                INTERRUPT_CONTROLLER.assume_init_ref()
-            });
-        }
+    let gicc_mmio_descriptor = MMIODescriptor::new(mmio::GICC_START, mmio::GICC_SIZE);
+    let gicc_virt_addr = memory::mmu::kernel_map_mmio("GICV2 GICC", &gicc_mmio_descriptor)?;
 
-        INTERRUPT_CONTROLLER.write(device_driver::GICv2::new(
-            gicd_virt_addr,
-            gicc_virt_addr,
-            interrupt_controller_post_init,
-        ));
+    INTERRUPT_CONTROLLER.write(device_driver::GICv2::new(gicd_virt_addr, gicc_virt_addr));
 
-        Ok(())
-    }
+    Ok(())
+}
 
-    unsafe fn register_drivers(&self) {
-        self.device_drivers.write(|drivers| {
-            drivers[0] = Some(PL011_UART.assume_init_ref());
-            drivers[1] = Some(GPIO.assume_init_ref());
-            drivers[2] = Some(INTERRUPT_CONTROLLER.assume_init_ref());
-        });
-    }
+/// This must be called only after successful init of the interrupt controller driver.
+unsafe fn post_init_interrupt_controller() -> Result<(), &'static str> {
+    generic_exception::asynchronous::register_irq_manager(INTERRUPT_CONTROLLER.assume_init_ref());
+
+    Ok(())
 }
 
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
+/// Function needs to ensure that driver registration happens only after correct instantiation.
+unsafe fn driver_uart() -> Result<(), &'static str> {
+    instantiate_uart()?;
+
+    let uart_descriptor = generic_driver::DeviceDriverDescriptor::new(
+        PL011_UART.assume_init_ref(),
+        Some(post_init_uart),
+        Some(exception::asynchronous::irq_map::PL011_UART),
+    );
+    generic_driver::driver_manager().register_driver(uart_descriptor);
+
+    Ok(())
+}
+
+/// Function needs to ensure that driver registration happens only after correct instantiation.
+unsafe fn driver_gpio() -> Result<(), &'static str> {
+    instantiate_gpio()?;
+
+    let gpio_descriptor = generic_driver::DeviceDriverDescriptor::new(
+        GPIO.assume_init_ref(),
+        Some(post_init_gpio),
+        None,
+    );
+    generic_driver::driver_manager().register_driver(gpio_descriptor);
 
-/// Return a reference to the driver manager.
-pub fn driver_manager() -> &'static impl driver::interface::DriverManager {
-    &BSP_DRIVER_MANAGER
+    Ok(())
 }
 
-//------------------------------------------------------------------------------
-// OS Interface Code
-//------------------------------------------------------------------------------
-use driver::interface::DeviceDriver;
+/// Function needs to ensure that driver registration happens only after correct instantiation.
+unsafe fn driver_interrupt_controller() -> Result<(), &'static str> {
+    instantiate_interrupt_controller()?;
 
-impl driver::interface::DriverManager for BSPDriverManager {
-    unsafe fn instantiate_drivers(&self) -> Result<(), &'static str> {
-        if self.init_done.load(Ordering::Relaxed) {
-            return Err("Drivers already instantiated");
-        }
+    let interrupt_controller_descriptor = generic_driver::DeviceDriverDescriptor::new(
+        INTERRUPT_CONTROLLER.assume_init_ref(),
+        Some(post_init_interrupt_controller),
+        None,
+    );
+    generic_driver::driver_manager().register_driver(interrupt_controller_descriptor);
 
-        self.instantiate_uart()?;
-        self.instantiate_gpio()?;
-        self.instantiate_interrupt_controller()?;
+    Ok(())
+}
 
-        self.register_drivers();
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
 
-        self.init_done.store(true, Ordering::Relaxed);
-        Ok(())
+/// Initialize the driver subsystem.
+///
+/// # Safety
+///
+/// See child function calls.
+pub unsafe fn init() -> Result<(), &'static str> {
+    static INIT_DONE: AtomicBool = AtomicBool::new(false);
+    if INIT_DONE.load(Ordering::Relaxed) {
+        return Err("Init already done");
     }
 
-    fn all_device_drivers(&self) -> [&(dyn DeviceDriver + Sync); NUM_DRIVERS] {
-        self.device_drivers
-            .read(|drivers| drivers.map(|drivers| drivers.unwrap()))
-    }
+    driver_uart()?;
+    driver_gpio()?;
+    driver_interrupt_controller()?;
 
-    #[cfg(feature = "test_build")]
-    fn qemu_bring_up_console(&self) {
-        use crate::cpu;
+    INIT_DONE.store(true, Ordering::Relaxed);
+    Ok(())
+}
 
-        unsafe {
-            self.instantiate_uart()
-                .unwrap_or_else(|_| cpu::qemu_exit_failure());
-            console::register_console(PL011_UART.assume_init_ref());
-        };
-    }
+/// Minimal code needed to bring up the console in QEMU (for testing only). This is often less steps
+/// than on real hardware due to QEMU's abstractions.
+#[cfg(feature = "test_build")]
+pub fn qemu_bring_up_console() {
+    use crate::cpu;
+
+    unsafe {
+        instantiate_uart().unwrap_or_else(|_| cpu::qemu_exit_failure());
+        console::register_console(PL011_UART.assume_init_ref());
+    };
 }
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/exception/asynchronous.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
index ab20d86d3..06a675588 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
@@ -10,6 +10,9 @@ use crate::bsp;
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
+/// Export for reuse in generic asynchronous.rs.
+pub use bsp::device_driver::IRQNumber;
+
 #[cfg(feature = "bsp_rpi3")]
 pub(in crate::bsp) mod irq_map {
     use super::bsp::device_driver::{IRQNumber, PeripheralIRQ};
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/driver.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/driver.rs
index 98197fef3..18066c313 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/driver.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/driver.rs
@@ -4,16 +4,37 @@
 
 //! Driver support.
 
+use crate::{
+    exception, info,
+    synchronization::{interface::ReadWriteEx, InitStateLock},
+};
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+const NUM_DRIVERS: usize = 5;
+
+struct DriverManagerInner<T>
+where
+    T: 'static,
+{
+    next_index: usize,
+    descriptors: [Option<DeviceDriverDescriptor<T>>; NUM_DRIVERS],
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
 /// Driver interfaces.
 pub mod interface {
-    use crate::bsp;
-
     /// Device Driver functions.
     pub trait DeviceDriver {
+        /// Different interrupt controllers might use different types for IRQ number.
+        type IRQNumberType: super::fmt::Display;
+
         /// Return a compatibility string for identifying the driver.
         fn compatible(&self) -> &'static str;
 
@@ -26,32 +47,175 @@ pub mod interface {
             Ok(())
         }
 
-        /// Called by the kernel to register and enable the device's IRQ handlers, if any.
+        /// Called by the kernel to register and enable the device's IRQ handler.
         ///
         /// Rust's type system will prevent a call to this function unless the calling instance
         /// itself has static lifetime.
-        fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
-            Ok(())
+        fn register_and_enable_irq_handler(
+            &'static self,
+            irq_number: &Self::IRQNumberType,
+        ) -> Result<(), &'static str> {
+            panic!(
+                "Attempt to enable IRQ {} for device {}, but driver does not support this",
+                irq_number,
+                self.compatible()
+            )
+        }
+    }
+}
+
+/// Tpye to be used as an optional callback after a driver's init() has run.
+pub type DeviceDriverPostInitCallback = unsafe fn() -> Result<(), &'static str>;
+
+/// A descriptor for device drivers.
+#[derive(Copy, Clone)]
+pub struct DeviceDriverDescriptor<T>
+where
+    T: 'static,
+{
+    device_driver: &'static (dyn interface::DeviceDriver<IRQNumberType = T> + Sync),
+    post_init_callback: Option<DeviceDriverPostInitCallback>,
+    irq_number: Option<T>,
+}
+
+/// Provides device driver management functions.
+pub struct DriverManager<T>
+where
+    T: 'static,
+{
+    inner: InitStateLock<DriverManagerInner<T>>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static DRIVER_MANAGER: DriverManager<exception::asynchronous::IRQNumber> = DriverManager::new();
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl<T> DriverManagerInner<T>
+where
+    T: 'static + Copy,
+{
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self {
+            next_index: 0,
+            descriptors: [None; NUM_DRIVERS],
         }
     }
+}
 
-    /// Device driver management functions.
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl<T> DeviceDriverDescriptor<T> {
+    /// Create an instance.
+    pub fn new(
+        device_driver: &'static (dyn interface::DeviceDriver<IRQNumberType = T> + Sync),
+        post_init_callback: Option<DeviceDriverPostInitCallback>,
+        irq_number: Option<T>,
+    ) -> Self {
+        Self {
+            device_driver,
+            post_init_callback,
+            irq_number,
+        }
+    }
+}
+
+/// Return a reference to the global DriverManager.
+pub fn driver_manager() -> &'static DriverManager<exception::asynchronous::IRQNumber> {
+    &DRIVER_MANAGER
+}
+
+impl<T> DriverManager<T>
+where
+    T: fmt::Display + Copy,
+{
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self {
+            inner: InitStateLock::new(DriverManagerInner::new()),
+        }
+    }
+
+    /// Register a device driver with the kernel.
+    pub fn register_driver(&self, descriptor: DeviceDriverDescriptor<T>) {
+        self.inner.write(|inner| {
+            inner.descriptors[inner.next_index] = Some(descriptor);
+            inner.next_index += 1;
+        })
+    }
+
+    /// Helper for iterating over registered drivers.
+    fn for_each_descriptor<'a>(&'a self, f: impl FnMut(&'a DeviceDriverDescriptor<T>)) {
+        self.inner.read(|inner| {
+            inner
+                .descriptors
+                .iter()
+                .filter_map(|x| x.as_ref())
+                .for_each(f)
+        })
+    }
+
+    /// Fully initialize all drivers and their interrupts handlers.
     ///
-    /// The `BSP` is supposed to supply one global instance.
-    pub trait DriverManager {
-        /// Instantiate all drivers.
-        ///
-        /// # Safety
-        ///
-        /// Must be called before `all_device_drivers`.
-        unsafe fn instantiate_drivers(&self) -> Result<(), &'static str>;
+    /// # Safety
+    ///
+    /// - During init, drivers might do stuff with system-wide impact.
+    pub unsafe fn init_drivers_and_irqs(&self) {
+        self.for_each_descriptor(|descriptor| {
+            // 1. Initialize driver.
+            if let Err(x) = descriptor.device_driver.init() {
+                panic!(
+                    "Error initializing driver: {}: {}",
+                    descriptor.device_driver.compatible(),
+                    x
+                );
+            }
+
+            // 2. Call corresponding post init callback.
+            if let Some(callback) = &descriptor.post_init_callback {
+                if let Err(x) = callback() {
+                    panic!(
+                        "Error during driver post-init callback: {}: {}",
+                        descriptor.device_driver.compatible(),
+                        x
+                    );
+                }
+            }
+        });
+
+        // 3. After all post-init callbacks were done, the interrupt controller should be
+        //    registered and functional. So let drivers register with it now.
+        self.for_each_descriptor(|descriptor| {
+            if let Some(irq_number) = &descriptor.irq_number {
+                if let Err(x) = descriptor
+                    .device_driver
+                    .register_and_enable_irq_handler(irq_number)
+                {
+                    panic!(
+                        "Error during driver interrupt handler registration: {}: {}",
+                        descriptor.device_driver.compatible(),
+                        x
+                    );
+                }
+            }
+        });
+    }
 
-        /// Return a slice of references to all `BSP`-instantiated drivers.
-        fn all_device_drivers(&self) -> [&(dyn DeviceDriver + Sync); bsp::driver::NUM_DRIVERS];
+    /// Enumerate all registered device drivers.
+    pub fn enumerate(&self) {
+        let mut i: usize = 1;
+        self.for_each_descriptor(|descriptor| {
+            info!("      {}. {}", i, descriptor.device_driver.compatible());
 
-        /// Minimal code needed to bring up the console in QEMU (for testing only). This is often
-        /// less steps than on real hardware due to QEMU's abstractions.
-        #[cfg(feature = "test_build")]
-        fn qemu_bring_up_console(&self);
+            i += 1;
+        });
     }
 }
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/exception/asynchronous.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/exception/asynchronous.rs
index 83ca1aa6d..c1f2a27b3 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/exception/asynchronous.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/exception/asynchronous.rs
@@ -10,7 +10,7 @@ mod arch_asynchronous;
 mod null_irq_manager;
 
 use crate::{bsp, synchronization};
-use core::{fmt, marker::PhantomData};
+use core::marker::PhantomData;
 
 //--------------------------------------------------------------------------------------------------
 // Architectural Public Reexports
@@ -24,14 +24,23 @@ pub use arch_asynchronous::{
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
+/// Interrupt number as defined by the BSP.
+pub type IRQNumber = bsp::exception::asynchronous::IRQNumber;
+
 /// Interrupt descriptor.
 #[derive(Copy, Clone)]
-pub struct IRQDescriptor {
+pub struct IRQHandlerDescriptor<T>
+where
+    T: Copy,
+{
+    /// The IRQ number.
+    number: T,
+
     /// Descriptive name.
-    pub name: &'static str,
+    name: &'static str,
 
     /// Reference to handler trait object.
-    pub handler: &'static (dyn interface::IRQHandler + Sync),
+    handler: &'static (dyn interface::IRQHandler + Sync),
 }
 
 /// IRQContext token.
@@ -61,17 +70,16 @@ pub mod interface {
     /// platform's interrupt controller.
     pub trait IRQManager {
         /// The IRQ number type depends on the implementation.
-        type IRQNumberType;
+        type IRQNumberType: Copy;
 
         /// Register a handler.
         fn register_handler(
             &self,
-            irq_number: Self::IRQNumberType,
-            descriptor: super::IRQDescriptor,
+            irq_handler_descriptor: super::IRQHandlerDescriptor<Self::IRQNumberType>,
         ) -> Result<(), &'static str>;
 
         /// Enable an interrupt in the controller.
-        fn enable(&self, irq_number: Self::IRQNumberType);
+        fn enable(&self, irq_number: &Self::IRQNumberType);
 
         /// Handle pending interrupts.
         ///
@@ -91,16 +99,12 @@ pub mod interface {
     }
 }
 
-/// A wrapper type for IRQ numbers with integrated range sanity check.
-#[derive(Copy, Clone)]
-pub struct IRQNumber<const MAX_INCLUSIVE: usize>(usize);
-
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
 static CUR_IRQ_MANAGER: InitStateLock<
-    &'static (dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber> + Sync),
+    &'static (dyn interface::IRQManager<IRQNumberType = IRQNumber> + Sync),
 > = InitStateLock::new(&null_irq_manager::NULL_IRQ_MANAGER);
 
 //--------------------------------------------------------------------------------------------------
@@ -108,6 +112,39 @@ static CUR_IRQ_MANAGER: InitStateLock<
 //--------------------------------------------------------------------------------------------------
 use synchronization::{interface::ReadWriteEx, InitStateLock};
 
+impl<T> IRQHandlerDescriptor<T>
+where
+    T: Copy,
+{
+    /// Create an instance.
+    pub const fn new(
+        number: T,
+        name: &'static str,
+        handler: &'static (dyn interface::IRQHandler + Sync),
+    ) -> Self {
+        Self {
+            number,
+            name,
+            handler,
+        }
+    }
+
+    /// Return the number.
+    pub const fn number(&self) -> T {
+        self.number
+    }
+
+    /// Return the name.
+    pub const fn name(&self) -> &'static str {
+        self.name
+    }
+
+    /// Return the handler.
+    pub const fn handler(&self) -> &'static (dyn interface::IRQHandler + Sync) {
+        self.handler
+    }
+}
+
 impl<'irq_context> IRQContext<'irq_context> {
     /// Creates an IRQContext token.
     ///
@@ -125,29 +162,6 @@ impl<'irq_context> IRQContext<'irq_context> {
     }
 }
 
-impl<const MAX_INCLUSIVE: usize> IRQNumber<{ MAX_INCLUSIVE }> {
-    /// The total number of IRQs this type supports.
-    pub const NUM_TOTAL: usize = MAX_INCLUSIVE + 1;
-
-    /// Creates a new instance if number <= MAX_INCLUSIVE.
-    pub const fn new(number: usize) -> Self {
-        assert!(number <= MAX_INCLUSIVE);
-
-        Self(number)
-    }
-
-    /// Return the wrapped number.
-    pub const fn get(self) -> usize {
-        self.0
-    }
-}
-
-impl<const MAX_INCLUSIVE: usize> fmt::Display for IRQNumber<{ MAX_INCLUSIVE }> {
-    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
-        write!(f, "{}", self.0)
-    }
-}
-
 /// Executes the provided closure while IRQs are masked on the executing core.
 ///
 /// While the function temporarily changes the HW state of the executing core, it restores it to the
@@ -163,8 +177,7 @@ pub fn exec_with_irq_masked<T>(f: impl FnOnce() -> T) -> T {
 
 /// Register a new IRQ manager.
 pub fn register_irq_manager(
-    new_manager: &'static (dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber>
-                  + Sync),
+    new_manager: &'static (dyn interface::IRQManager<IRQNumberType = IRQNumber> + Sync),
 ) {
     CUR_IRQ_MANAGER.write(|manager| *manager = new_manager);
 }
@@ -172,6 +185,6 @@ pub fn register_irq_manager(
 /// Return a reference to the currently registered IRQ manager.
 ///
 /// This is the IRQ manager used by the architectural interrupt handling code.
-pub fn irq_manager() -> &'static dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber> {
+pub fn irq_manager() -> &'static dyn interface::IRQManager<IRQNumberType = IRQNumber> {
     CUR_IRQ_MANAGER.read(|manager| *manager)
 }
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/exception/asynchronous/null_irq_manager.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/exception/asynchronous/null_irq_manager.rs
index 560e3ce4b..438f96496 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/exception/asynchronous/null_irq_manager.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/exception/asynchronous/null_irq_manager.rs
@@ -4,8 +4,7 @@
 
 //! Null IRQ Manager.
 
-use super::{interface, IRQContext, IRQDescriptor};
-use crate::bsp;
+use super::{interface, IRQContext, IRQHandlerDescriptor};
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -24,17 +23,16 @@ pub static NULL_IRQ_MANAGER: NullIRQManager = NullIRQManager {};
 //--------------------------------------------------------------------------------------------------
 
 impl interface::IRQManager for NullIRQManager {
-    type IRQNumberType = bsp::driver::IRQNumber;
+    type IRQNumberType = super::IRQNumber;
 
     fn register_handler(
         &self,
-        _irq_number: Self::IRQNumberType,
-        _descriptor: IRQDescriptor,
+        _descriptor: IRQHandlerDescriptor<Self::IRQNumberType>,
     ) -> Result<(), &'static str> {
         panic!("No IRQ Manager registered yet");
     }
 
-    fn enable(&self, _irq_number: Self::IRQNumberType) {
+    fn enable(&self, _irq_number: &Self::IRQNumberType) {
         panic!("No IRQ Manager registered yet");
     }
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs
index 26c147d6e..197b1f419 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs
@@ -186,11 +186,9 @@ pub fn test_runner(tests: &[&test_types::UnitTest]) {
 #[cfg(test)]
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
     memory::init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     test_main();
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/main.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/main.rs
index 9aeb44386..659052588 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/main.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/main.rs
@@ -13,7 +13,7 @@
 #![no_main]
 #![no_std]
 
-use libkernel::{bsp, cpu, driver, exception, info, memory, state, time, warn};
+use libkernel::{bsp, cpu, driver, exception, info, memory, state, time};
 
 /// Early init code.
 ///
@@ -25,27 +25,16 @@ use libkernel::{bsp, cpu, driver, exception, info, memory, state, time, warn};
 /// - Printing will not work until the respective driver's MMIO is remapped.
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
     memory::init();
 
-    // Instantiate and init all device drivers.
-    if let Err(x) = bsp::driver::driver_manager().instantiate_drivers() {
-        panic!("Error instantiating drivers: {}", x);
-    }
-    for i in bsp::driver::driver_manager().all_device_drivers().iter() {
-        if let Err(x) = i.init() {
-            panic!("Error loading driver: {}: {}", i.compatible(), x);
-        }
+    // Initialize the BSP driver subsystem.
+    if let Err(x) = bsp::driver::init() {
+        panic!("Error initializing BSP driver subsystem: {}", x);
     }
 
-    // Let device drivers register and enable their handlers with the interrupt controller.
-    for i in bsp::driver::driver_manager().all_device_drivers() {
-        if let Err(msg) = i.register_and_enable_irq_handler() {
-            warn!("Error registering IRQ handler: {}", msg);
-        }
-    }
+    // Initialize all device drivers.
+    driver::driver_manager().init_drivers_and_irqs();
 
     bsp::memory::mmu::kernel_add_mapping_records_for_precomputed();
 
@@ -61,8 +50,6 @@ unsafe fn kernel_init() -> ! {
 
 /// The main function running after the early init.
 fn kernel_main() -> ! {
-    use driver::interface::DriverManager;
-
     info!("{}", libkernel::version());
     info!("Booting on: {}", bsp::board_name());
 
@@ -81,13 +68,7 @@ fn kernel_main() -> ! {
     );
 
     info!("Drivers loaded:");
-    for (i, driver) in bsp::driver::driver_manager()
-        .all_device_drivers()
-        .iter()
-        .enumerate()
-    {
-        info!("      {}. {}", i + 1, driver.compatible());
-    }
+    driver::driver_manager().enumerate();
 
     info!("Registered IRQ handlers:");
     exception::asynchronous::irq_manager().print_handler();
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/tests/00_console_sanity.rs b/15_virtual_mem_part3_precomputed_tables/kernel/tests/00_console_sanity.rs
index 305510cea..2c0225b7a 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/tests/00_console_sanity.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/tests/00_console_sanity.rs
@@ -11,16 +11,15 @@
 /// Console tests should time out on the I/O harness in case of panic.
 mod panic_wait_forever;
 
-use libkernel::{bsp, console, cpu, driver, exception, memory, print};
+use libkernel::{bsp, console, cpu, exception, memory, print};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
     use console::console;
-    use driver::interface::DriverManager;
 
     exception::handling_init();
     memory::init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     // Handshake
     assert_eq!(console().read_char(), 'A');
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/tests/01_timer_sanity.rs b/15_virtual_mem_part3_precomputed_tables/kernel/tests/01_timer_sanity.rs
index 398993324..8188b9424 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/tests/01_timer_sanity.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/tests/01_timer_sanity.rs
@@ -11,16 +11,14 @@
 #![test_runner(libkernel::test_runner)]
 
 use core::time::Duration;
-use libkernel::{bsp, cpu, driver, exception, memory, time};
+use libkernel::{bsp, cpu, exception, memory, time};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
     memory::init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/tests/02_exception_sync_page_fault.rs b/15_virtual_mem_part3_precomputed_tables/kernel/tests/02_exception_sync_page_fault.rs
index ec7a365ac..c4b801ce3 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/tests/02_exception_sync_page_fault.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/tests/02_exception_sync_page_fault.rs
@@ -17,15 +17,13 @@
 /// or indirectly.
 mod panic_exit_success;
 
-use libkernel::{bsp, cpu, driver, exception, info, memory, println};
+use libkernel::{bsp, cpu, exception, info, memory, println};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
     memory::init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     // This line will be printed as the test header.
     println!("Testing synchronous exception handling by causing a page fault");
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/tests/03_exception_restore_sanity.rs b/15_virtual_mem_part3_precomputed_tables/kernel/tests/03_exception_restore_sanity.rs
index 47dd27149..f176c6a67 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/tests/03_exception_restore_sanity.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/tests/03_exception_restore_sanity.rs
@@ -12,7 +12,7 @@
 mod panic_wait_forever;
 
 use core::arch::asm;
-use libkernel::{bsp, cpu, driver, exception, info, memory, println};
+use libkernel::{bsp, cpu, exception, info, memory, println};
 
 #[inline(never)]
 fn nested_system_call() {
@@ -30,11 +30,9 @@ fn nested_system_call() {
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
     memory::init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     // This line will be printed as the test header.
     println!("Testing exception restore");
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/tests/04_exception_irq_sanity.rs b/15_virtual_mem_part3_precomputed_tables/kernel/tests/04_exception_irq_sanity.rs
index e93a4caf6..e6f94c91f 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/tests/04_exception_irq_sanity.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/tests/04_exception_irq_sanity.rs
@@ -10,15 +10,13 @@
 #![reexport_test_harness_main = "test_main"]
 #![test_runner(libkernel::test_runner)]
 
-use libkernel::{bsp, cpu, driver, exception, memory};
+use libkernel::{bsp, cpu, exception, memory};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     memory::init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     exception::handling_init();
     exception::asynchronous::local_irq_unmask();
diff --git a/16_virtual_mem_part4_higher_half_kernel/Makefile b/16_virtual_mem_part4_higher_half_kernel/Makefile
index 2e0a34626..4092ec8fe 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Makefile
+++ b/16_virtual_mem_part4_higher_half_kernel/Makefile
@@ -310,7 +310,7 @@ test_boot: $(KERNEL_BIN)
 ## Helpers for unit and integration test targets
 ##------------------------------------------------------------------------------
 define KERNEL_TEST_RUNNER
-    #!/usr/bin/env bash
+#!/usr/bin/env bash
 
     # The cargo test runner seems to change into the crate under test's directory. Therefore, ensure
     # this script executes from the root.
diff --git a/16_virtual_mem_part4_higher_half_kernel/README.md b/16_virtual_mem_part4_higher_half_kernel/README.md
index 494506da3..8082ab455 100644
--- a/16_virtual_mem_part4_higher_half_kernel/README.md
+++ b/16_virtual_mem_part4_higher_half_kernel/README.md
@@ -817,7 +817,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu.rs 16_vi
 diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/tests/02_exception_sync_page_fault.rs 16_virtual_mem_part4_higher_half_kernel/kernel/tests/02_exception_sync_page_fault.rs
 --- 15_virtual_mem_part3_precomputed_tables/kernel/tests/02_exception_sync_page_fault.rs
 +++ 16_virtual_mem_part4_higher_half_kernel/kernel/tests/02_exception_sync_page_fault.rs
-@@ -30,8 +30,8 @@
+@@ -28,8 +28,8 @@
      // This line will be printed as the test header.
      println!("Testing synchronous exception handling by causing a page fault");
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2.rs
index ec65f1b2a..3cc35b5ee 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2.rs
@@ -80,7 +80,8 @@ mod gicc;
 mod gicd;
 
 use crate::{
-    bsp, cpu, driver, exception,
+    bsp::{self, device_driver::common::BoundedUsize},
+    cpu, driver, exception,
     memory::{Address, Virtual},
     synchronization,
     synchronization::InitStateLock,
@@ -90,14 +91,15 @@ use crate::{
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
-type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; IRQNumber::NUM_TOTAL];
+type HandlerTable = [Option<exception::asynchronous::IRQHandlerDescriptor<IRQNumber>>;
+    IRQNumber::MAX_INCLUSIVE + 1];
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
 /// Used for the associated type of trait [`exception::asynchronous::interface::IRQManager`].
-pub type IRQNumber = exception::asynchronous::IRQNumber<{ GICv2::MAX_IRQ_NUMBER }>;
+pub type IRQNumber = BoundedUsize<{ GICv2::MAX_IRQ_NUMBER }>;
 
 /// Representation of the GIC.
 pub struct GICv2 {
@@ -109,9 +111,6 @@ pub struct GICv2 {
 
     /// Stores registered IRQ handlers. Writable only during kernel init. RO afterwards.
     handler_table: InitStateLock<HandlerTable>,
-
-    /// Callback to be invoked after successful init.
-    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -131,13 +130,11 @@ impl GICv2 {
     pub const unsafe fn new(
         gicd_mmio_start_addr: Address<Virtual>,
         gicc_mmio_start_addr: Address<Virtual>,
-        post_init_callback: fn(),
     ) -> Self {
         Self {
             gicd: gicd::GICD::new(gicd_mmio_start_addr),
             gicc: gicc::GICC::new(gicc_mmio_start_addr),
-            handler_table: InitStateLock::new([None; IRQNumber::NUM_TOTAL]),
-            post_init_callback,
+            handler_table: InitStateLock::new([None; IRQNumber::MAX_INCLUSIVE + 1]),
         }
     }
 }
@@ -148,6 +145,8 @@ impl GICv2 {
 use synchronization::interface::ReadWriteEx;
 
 impl driver::interface::DeviceDriver for GICv2 {
+    type IRQNumberType = IRQNumber;
+
     fn compatible(&self) -> &'static str {
         Self::COMPATIBLE
     }
@@ -160,8 +159,6 @@ impl driver::interface::DeviceDriver for GICv2 {
         self.gicc.priority_accept_all();
         self.gicc.enable();
 
-        (self.post_init_callback)();
-
         Ok(())
     }
 }
@@ -171,23 +168,22 @@ impl exception::asynchronous::interface::IRQManager for GICv2 {
 
     fn register_handler(
         &self,
-        irq_number: Self::IRQNumberType,
-        descriptor: exception::asynchronous::IRQDescriptor,
+        irq_handler_descriptor: exception::asynchronous::IRQHandlerDescriptor<Self::IRQNumberType>,
     ) -> Result<(), &'static str> {
         self.handler_table.write(|table| {
-            let irq_number = irq_number.get();
+            let irq_number = irq_handler_descriptor.number().get();
 
             if table[irq_number].is_some() {
                 return Err("IRQ handler already registered");
             }
 
-            table[irq_number] = Some(descriptor);
+            table[irq_number] = Some(irq_handler_descriptor);
 
             Ok(())
         })
     }
 
-    fn enable(&self, irq_number: Self::IRQNumberType) {
+    fn enable(&self, irq_number: &Self::IRQNumberType) {
         self.gicd.enable(irq_number);
     }
 
@@ -210,7 +206,7 @@ impl exception::asynchronous::interface::IRQManager for GICv2 {
                 None => panic!("No handler registered for IRQ {}", irq_number),
                 Some(descriptor) => {
                     // Call the IRQ handler. Panics on failure.
-                    descriptor.handler.handle().expect("Error handling IRQ");
+                    descriptor.handler().handle().expect("Error handling IRQ");
                 }
             }
         });
@@ -227,7 +223,7 @@ impl exception::asynchronous::interface::IRQManager for GICv2 {
         self.handler_table.read(|table| {
             for (i, opt) in table.iter().skip(32).enumerate() {
                 if let Some(handler) = opt {
-                    info!("            {: >3}. {}", i + 32, handler.name);
+                    info!("            {: >3}. {}", i + 32, handler.name());
                 }
             }
         });
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
index a9c97a8e3..8aebcf2b6 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -172,7 +172,7 @@ impl GICD {
     }
 
     /// Enable an interrupt.
-    pub fn enable(&self, irq_num: super::IRQNumber) {
+    pub fn enable(&self, irq_num: &super::IRQNumber) {
         let irq_num = irq_num.get();
 
         // Each bit in the u32 enable register corresponds to one IRQ number. Shift right by 5
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 2281e66a3..fb61a6510 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -7,6 +7,7 @@
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper,
     driver,
+    exception::asynchronous::IRQNumber,
     memory::{Address, Virtual},
     synchronization,
     synchronization::IRQSafeNullLock,
@@ -122,7 +123,6 @@ struct GPIOInner {
 /// Representation of the GPIO HW.
 pub struct GPIO {
     inner: IRQSafeNullLock<GPIOInner>,
-    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -202,10 +202,9 @@ impl GPIO {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    pub const unsafe fn new(mmio_start_addr: Address<Virtual>, post_init_callback: fn()) -> Self {
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
         Self {
             inner: IRQSafeNullLock::new(GPIOInner::new(mmio_start_addr)),
-            post_init_callback,
         }
     }
 
@@ -221,13 +220,9 @@ impl GPIO {
 use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for GPIO {
+    type IRQNumberType = IRQNumber;
+
     fn compatible(&self) -> &'static str {
         Self::COMPATIBLE
     }
-
-    unsafe fn init(&self) -> Result<(), &'static str> {
-        (self.post_init_callback)();
-
-        Ok(())
-    }
 }
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
index b4dd530da..c93a9fa1f 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -7,9 +7,12 @@
 mod peripheral_ic;
 
 use crate::{
-    driver, exception,
+    bsp::device_driver::common::BoundedUsize,
+    driver,
+    exception::{self, asynchronous::IRQHandlerDescriptor},
     memory::{Address, Virtual},
 };
+use core::fmt;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -24,10 +27,8 @@ struct PendingIRQs {
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
-pub type LocalIRQ =
-    exception::asynchronous::IRQNumber<{ InterruptController::MAX_LOCAL_IRQ_NUMBER }>;
-pub type PeripheralIRQ =
-    exception::asynchronous::IRQNumber<{ InterruptController::MAX_PERIPHERAL_IRQ_NUMBER }>;
+pub type LocalIRQ = BoundedUsize<{ InterruptController::MAX_LOCAL_IRQ_NUMBER }>;
+pub type PeripheralIRQ = BoundedUsize<{ InterruptController::MAX_PERIPHERAL_IRQ_NUMBER }>;
 
 /// Used for the associated type of trait [`exception::asynchronous::interface::IRQManager`].
 #[derive(Copy, Clone)]
@@ -40,7 +41,6 @@ pub enum IRQNumber {
 /// Representation of the Interrupt Controller.
 pub struct InterruptController {
     periph: peripheral_ic::PeripheralIC,
-    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -71,6 +71,15 @@ impl Iterator for PendingIRQs {
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
+impl fmt::Display for IRQNumber {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        match self {
+            Self::Local(number) => write!(f, "Local({})", number),
+            Self::Peripheral(number) => write!(f, "Peripheral({})", number),
+        }
+    }
+}
+
 impl InterruptController {
     // Restrict to 3 for now. This makes future code for local_ic.rs more straight forward.
     const MAX_LOCAL_IRQ_NUMBER: usize = 3;
@@ -83,13 +92,9 @@ impl InterruptController {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    pub const unsafe fn new(
-        periph_mmio_start_addr: Address<Virtual>,
-        post_init_callback: fn(),
-    ) -> Self {
+    pub const unsafe fn new(periph_mmio_start_addr: Address<Virtual>) -> Self {
         Self {
             periph: peripheral_ic::PeripheralIC::new(periph_mmio_start_addr),
-            post_init_callback,
         }
     }
 }
@@ -99,15 +104,11 @@ impl InterruptController {
 //------------------------------------------------------------------------------
 
 impl driver::interface::DeviceDriver for InterruptController {
+    type IRQNumberType = IRQNumber;
+
     fn compatible(&self) -> &'static str {
         Self::COMPATIBLE
     }
-
-    unsafe fn init(&self) -> Result<(), &'static str> {
-        (self.post_init_callback)();
-
-        Ok(())
-    }
 }
 
 impl exception::asynchronous::interface::IRQManager for InterruptController {
@@ -115,16 +116,23 @@ impl exception::asynchronous::interface::IRQManager for InterruptController {
 
     fn register_handler(
         &self,
-        irq: Self::IRQNumberType,
-        descriptor: exception::asynchronous::IRQDescriptor,
+        irq_handler_descriptor: exception::asynchronous::IRQHandlerDescriptor<Self::IRQNumberType>,
     ) -> Result<(), &'static str> {
-        match irq {
+        match irq_handler_descriptor.number() {
             IRQNumber::Local(_) => unimplemented!("Local IRQ controller not implemented."),
-            IRQNumber::Peripheral(pirq) => self.periph.register_handler(pirq, descriptor),
+            IRQNumber::Peripheral(pirq) => {
+                let periph_descriptor = IRQHandlerDescriptor::new(
+                    pirq,
+                    irq_handler_descriptor.name(),
+                    irq_handler_descriptor.handler(),
+                );
+
+                self.periph.register_handler(periph_descriptor)
+            }
         }
     }
 
-    fn enable(&self, irq: Self::IRQNumberType) {
+    fn enable(&self, irq: &Self::IRQNumberType) {
         match irq {
             IRQNumber::Local(_) => unimplemented!("Local IRQ controller not implemented."),
             IRQNumber::Peripheral(pirq) => self.periph.enable(pirq),
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index 06802d272..0a20bd874 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -52,7 +52,8 @@ type WriteOnlyRegisters = MMIODerefWrapper<WORegisterBlock>;
 /// Abstraction for the ReadOnly parts of the associated MMIO registers.
 type ReadOnlyRegisters = MMIODerefWrapper<RORegisterBlock>;
 
-type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; PeripheralIRQ::NUM_TOTAL];
+type HandlerTable = [Option<exception::asynchronous::IRQHandlerDescriptor<PeripheralIRQ>>;
+    PeripheralIRQ::MAX_INCLUSIVE + 1];
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -84,7 +85,7 @@ impl PeripheralIC {
         Self {
             wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(mmio_start_addr)),
             ro_registers: ReadOnlyRegisters::new(mmio_start_addr),
-            handler_table: InitStateLock::new([None; PeripheralIRQ::NUM_TOTAL]),
+            handler_table: InitStateLock::new([None; PeripheralIRQ::MAX_INCLUSIVE + 1]),
         }
     }
 
@@ -107,23 +108,22 @@ impl exception::asynchronous::interface::IRQManager for PeripheralIC {
 
     fn register_handler(
         &self,
-        irq: Self::IRQNumberType,
-        descriptor: exception::asynchronous::IRQDescriptor,
+        irq_handler_descriptor: exception::asynchronous::IRQHandlerDescriptor<Self::IRQNumberType>,
     ) -> Result<(), &'static str> {
         self.handler_table.write(|table| {
-            let irq_number = irq.get();
+            let irq_number = irq_handler_descriptor.number().get();
 
             if table[irq_number].is_some() {
                 return Err("IRQ handler already registered");
             }
 
-            table[irq_number] = Some(descriptor);
+            table[irq_number] = Some(irq_handler_descriptor);
 
             Ok(())
         })
     }
 
-    fn enable(&self, irq: Self::IRQNumberType) {
+    fn enable(&self, irq: &Self::IRQNumberType) {
         self.wo_registers.lock(|regs| {
             let enable_reg = if irq.get() <= 31 {
                 &regs.ENABLE_1
@@ -149,7 +149,7 @@ impl exception::asynchronous::interface::IRQManager for PeripheralIC {
                     None => panic!("No handler registered for IRQ {}", irq_number),
                     Some(descriptor) => {
                         // Call the IRQ handler. Panics on failure.
-                        descriptor.handler.handle().expect("Error handling IRQ");
+                        descriptor.handler().handle().expect("Error handling IRQ");
                     }
                 }
             }
@@ -164,7 +164,7 @@ impl exception::asynchronous::interface::IRQManager for PeripheralIC {
         self.handler_table.read(|table| {
             for (i, opt) in table.iter().enumerate() {
                 if let Some(handler) = opt {
-                    info!("            {: >3}. {}", i, handler.name);
+                    info!("            {: >3}. {}", i, handler.name());
                 }
             }
         });
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index f67d70dfb..0ee7feb78 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -10,9 +10,9 @@
 //! - <https://developer.arm.com/documentation/ddi0183/latest>
 
 use crate::{
-    bsp,
     bsp::device_driver::common::MMIODerefWrapper,
-    console, cpu, driver, exception,
+    console, cpu, driver,
+    exception::{self, asynchronous::IRQNumber},
     memory::{Address, Virtual},
     synchronization,
     synchronization::IRQSafeNullLock,
@@ -233,8 +233,6 @@ struct PL011UartInner {
 /// Representation of the UART.
 pub struct PL011Uart {
     inner: IRQSafeNullLock<PL011UartInner>,
-    irq_number: bsp::device_driver::IRQNumber,
-    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -398,16 +396,9 @@ impl PL011Uart {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    /// - The user must ensure to provide correct IRQ numbers.
-    pub const unsafe fn new(
-        mmio_start_addr: Address<Virtual>,
-        irq_number: bsp::device_driver::IRQNumber,
-        post_init_callback: fn(),
-    ) -> Self {
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
         Self {
             inner: IRQSafeNullLock::new(PL011UartInner::new(mmio_start_addr)),
-            irq_number,
-            post_init_callback,
         }
     }
 }
@@ -418,27 +409,28 @@ impl PL011Uart {
 use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for PL011Uart {
+    type IRQNumberType = IRQNumber;
+
     fn compatible(&self) -> &'static str {
         Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
         self.inner.lock(|inner| inner.init());
-        (self.post_init_callback)();
 
         Ok(())
     }
 
-    fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
-        use exception::asynchronous::{irq_manager, IRQDescriptor};
+    fn register_and_enable_irq_handler(
+        &'static self,
+        irq_number: &Self::IRQNumberType,
+    ) -> Result<(), &'static str> {
+        use exception::asynchronous::{irq_manager, IRQHandlerDescriptor};
 
-        let descriptor = IRQDescriptor {
-            name: Self::COMPATIBLE,
-            handler: self,
-        };
+        let descriptor = IRQHandlerDescriptor::new(*irq_number, Self::COMPATIBLE, self);
 
-        irq_manager().register_handler(self.irq_number, descriptor)?;
-        irq_manager().enable(self.irq_number);
+        irq_manager().register_handler(descriptor)?;
+        irq_manager().enable(irq_number);
 
         Ok(())
     }
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/common.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/common.rs
index 69f038d4d..ca7aeb76a 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/common.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/common.rs
@@ -5,7 +5,7 @@
 //! Common device driver code.
 
 use crate::memory::{Address, Virtual};
-use core::{marker::PhantomData, ops};
+use core::{fmt, marker::PhantomData, ops};
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -16,6 +16,10 @@ pub struct MMIODerefWrapper<T> {
     phantom: PhantomData<fn() -> T>,
 }
 
+/// A wrapper type for usize with integrated range bound check.
+#[derive(Copy, Clone)]
+pub struct BoundedUsize<const MAX_INCLUSIVE: usize>(usize);
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -37,3 +41,25 @@ impl<T> ops::Deref for MMIODerefWrapper<T> {
         unsafe { &*(self.start_addr.as_usize() as *const _) }
     }
 }
+
+impl<const MAX_INCLUSIVE: usize> BoundedUsize<{ MAX_INCLUSIVE }> {
+    pub const MAX_INCLUSIVE: usize = MAX_INCLUSIVE;
+
+    /// Creates a new instance if number <= MAX_INCLUSIVE.
+    pub const fn new(number: usize) -> Self {
+        assert!(number <= MAX_INCLUSIVE);
+
+        Self(number)
+    }
+
+    /// Return the wrapped number.
+    pub const fn get(self) -> usize {
+        self.0
+    }
+}
+
+impl<const MAX_INCLUSIVE: usize> fmt::Display for BoundedUsize<{ MAX_INCLUSIVE }> {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        write!(f, "{}", self.0)
+    }
+}
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/driver.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/driver.rs
index e1db4a005..ca3435aae 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/driver.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/driver.rs
@@ -7,34 +7,16 @@
 use super::{exception, memory::map::mmio};
 use crate::{
     bsp::device_driver,
-    console, driver, exception as generic_exception, memory,
+    console, driver as generic_driver,
+    exception::{self as generic_exception},
+    memory,
     memory::mmu::MMIODescriptor,
-    synchronization::{interface::ReadWriteEx, InitStateLock},
 };
 use core::{
     mem::MaybeUninit,
     sync::atomic::{AtomicBool, Ordering},
 };
 
-pub use device_driver::IRQNumber;
-
-//--------------------------------------------------------------------------------------------------
-// Private Definitions
-//--------------------------------------------------------------------------------------------------
-
-/// Device Driver Manager type.
-struct BSPDriverManager {
-    device_drivers: InitStateLock<[Option<&'static (dyn DeviceDriver + Sync)>; NUM_DRIVERS]>,
-    init_done: AtomicBool,
-}
-
-//--------------------------------------------------------------------------------------------------
-// Public Definitions
-//--------------------------------------------------------------------------------------------------
-
-/// The number of active drivers provided by this BSP.
-pub const NUM_DRIVERS: usize = 3;
-
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
@@ -49,150 +31,154 @@ static mut INTERRUPT_CONTROLLER: MaybeUninit<device_driver::InterruptController>
 #[cfg(feature = "bsp_rpi4")]
 static mut INTERRUPT_CONTROLLER: MaybeUninit<device_driver::GICv2> = MaybeUninit::uninit();
 
-static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
-    device_drivers: InitStateLock::new([None; NUM_DRIVERS]),
-    init_done: AtomicBool::new(false),
-};
-
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-impl BSPDriverManager {
-    unsafe fn instantiate_uart(&self) -> Result<(), &'static str> {
-        let mmio_descriptor = MMIODescriptor::new(mmio::PL011_UART_START, mmio::PL011_UART_SIZE);
-        let virt_addr =
-            memory::mmu::kernel_map_mmio(device_driver::PL011Uart::COMPATIBLE, &mmio_descriptor)?;
+/// This must be called only after successful init of the memory subsystem.
+unsafe fn instantiate_uart() -> Result<(), &'static str> {
+    let mmio_descriptor = MMIODescriptor::new(mmio::PL011_UART_START, mmio::PL011_UART_SIZE);
+    let virt_addr =
+        memory::mmu::kernel_map_mmio(device_driver::PL011Uart::COMPATIBLE, &mmio_descriptor)?;
 
-        // This is safe to do, because it is only called from the init'ed instance itself.
-        fn uart_post_init() {
-            console::register_console(unsafe { PL011_UART.assume_init_ref() });
-        }
+    PL011_UART.write(device_driver::PL011Uart::new(virt_addr));
 
-        PL011_UART.write(device_driver::PL011Uart::new(
-            virt_addr,
-            exception::asynchronous::irq_map::PL011_UART,
-            uart_post_init,
-        ));
+    Ok(())
+}
 
-        Ok(())
-    }
+/// This must be called only after successful init of the UART driver.
+unsafe fn post_init_uart() -> Result<(), &'static str> {
+    console::register_console(PL011_UART.assume_init_ref());
 
-    unsafe fn instantiate_gpio(&self) -> Result<(), &'static str> {
-        let mmio_descriptor = MMIODescriptor::new(mmio::GPIO_START, mmio::GPIO_SIZE);
-        let virt_addr =
-            memory::mmu::kernel_map_mmio(device_driver::GPIO::COMPATIBLE, &mmio_descriptor)?;
+    Ok(())
+}
 
-        // This is safe to do, because it is only called from the init'ed instance itself.
-        fn gpio_post_init() {
-            unsafe { GPIO.assume_init_ref().map_pl011_uart() };
-        }
+/// This must be called only after successful init of the memory subsystem.
+unsafe fn instantiate_gpio() -> Result<(), &'static str> {
+    let mmio_descriptor = MMIODescriptor::new(mmio::GPIO_START, mmio::GPIO_SIZE);
+    let virt_addr =
+        memory::mmu::kernel_map_mmio(device_driver::GPIO::COMPATIBLE, &mmio_descriptor)?;
 
-        GPIO.write(device_driver::GPIO::new(virt_addr, gpio_post_init));
+    GPIO.write(device_driver::GPIO::new(virt_addr));
 
-        Ok(())
-    }
+    Ok(())
+}
 
-    #[cfg(feature = "bsp_rpi3")]
-    unsafe fn instantiate_interrupt_controller(&self) -> Result<(), &'static str> {
-        let periph_mmio_descriptor =
-            MMIODescriptor::new(mmio::PERIPHERAL_IC_START, mmio::PERIPHERAL_IC_SIZE);
-        let periph_virt_addr = memory::mmu::kernel_map_mmio(
-            device_driver::InterruptController::COMPATIBLE,
-            &periph_mmio_descriptor,
-        )?;
-
-        // This is safe to do, because it is only called from the init'ed instance itself.
-        fn interrupt_controller_post_init() {
-            generic_exception::asynchronous::register_irq_manager(unsafe {
-                INTERRUPT_CONTROLLER.assume_init_ref()
-            });
-        }
-
-        INTERRUPT_CONTROLLER.write(device_driver::InterruptController::new(
-            periph_virt_addr,
-            interrupt_controller_post_init,
-        ));
-
-        Ok(())
-    }
+/// This must be called only after successful init of the GPIO driver.
+unsafe fn post_init_gpio() -> Result<(), &'static str> {
+    GPIO.assume_init_ref().map_pl011_uart();
+    Ok(())
+}
+
+/// This must be called only after successful init of the memory subsystem.
+#[cfg(feature = "bsp_rpi3")]
+unsafe fn instantiate_interrupt_controller() -> Result<(), &'static str> {
+    let periph_mmio_descriptor =
+        MMIODescriptor::new(mmio::PERIPHERAL_IC_START, mmio::PERIPHERAL_IC_SIZE);
+    let periph_virt_addr = memory::mmu::kernel_map_mmio(
+        device_driver::InterruptController::COMPATIBLE,
+        &periph_mmio_descriptor,
+    )?;
+
+    INTERRUPT_CONTROLLER.write(device_driver::InterruptController::new(periph_virt_addr));
 
-    #[cfg(feature = "bsp_rpi4")]
-    unsafe fn instantiate_interrupt_controller(&self) -> Result<(), &'static str> {
-        let gicd_mmio_descriptor = MMIODescriptor::new(mmio::GICD_START, mmio::GICD_SIZE);
-        let gicd_virt_addr = memory::mmu::kernel_map_mmio("GICv2 GICD", &gicd_mmio_descriptor)?;
+    Ok(())
+}
 
-        let gicc_mmio_descriptor = MMIODescriptor::new(mmio::GICC_START, mmio::GICC_SIZE);
-        let gicc_virt_addr = memory::mmu::kernel_map_mmio("GICV2 GICC", &gicc_mmio_descriptor)?;
+/// This must be called only after successful init of the memory subsystem.
+#[cfg(feature = "bsp_rpi4")]
+unsafe fn instantiate_interrupt_controller() -> Result<(), &'static str> {
+    let gicd_mmio_descriptor = MMIODescriptor::new(mmio::GICD_START, mmio::GICD_SIZE);
+    let gicd_virt_addr = memory::mmu::kernel_map_mmio("GICv2 GICD", &gicd_mmio_descriptor)?;
 
-        // This is safe to do, because it is only called from the init'ed instance itself.
-        fn interrupt_controller_post_init() {
-            generic_exception::asynchronous::register_irq_manager(unsafe {
-                INTERRUPT_CONTROLLER.assume_init_ref()
-            });
-        }
+    let gicc_mmio_descriptor = MMIODescriptor::new(mmio::GICC_START, mmio::GICC_SIZE);
+    let gicc_virt_addr = memory::mmu::kernel_map_mmio("GICV2 GICC", &gicc_mmio_descriptor)?;
 
-        INTERRUPT_CONTROLLER.write(device_driver::GICv2::new(
-            gicd_virt_addr,
-            gicc_virt_addr,
-            interrupt_controller_post_init,
-        ));
+    INTERRUPT_CONTROLLER.write(device_driver::GICv2::new(gicd_virt_addr, gicc_virt_addr));
 
-        Ok(())
-    }
+    Ok(())
+}
 
-    unsafe fn register_drivers(&self) {
-        self.device_drivers.write(|drivers| {
-            drivers[0] = Some(PL011_UART.assume_init_ref());
-            drivers[1] = Some(GPIO.assume_init_ref());
-            drivers[2] = Some(INTERRUPT_CONTROLLER.assume_init_ref());
-        });
-    }
+/// This must be called only after successful init of the interrupt controller driver.
+unsafe fn post_init_interrupt_controller() -> Result<(), &'static str> {
+    generic_exception::asynchronous::register_irq_manager(INTERRUPT_CONTROLLER.assume_init_ref());
+
+    Ok(())
 }
 
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
+/// Function needs to ensure that driver registration happens only after correct instantiation.
+unsafe fn driver_uart() -> Result<(), &'static str> {
+    instantiate_uart()?;
+
+    let uart_descriptor = generic_driver::DeviceDriverDescriptor::new(
+        PL011_UART.assume_init_ref(),
+        Some(post_init_uart),
+        Some(exception::asynchronous::irq_map::PL011_UART),
+    );
+    generic_driver::driver_manager().register_driver(uart_descriptor);
+
+    Ok(())
+}
+
+/// Function needs to ensure that driver registration happens only after correct instantiation.
+unsafe fn driver_gpio() -> Result<(), &'static str> {
+    instantiate_gpio()?;
+
+    let gpio_descriptor = generic_driver::DeviceDriverDescriptor::new(
+        GPIO.assume_init_ref(),
+        Some(post_init_gpio),
+        None,
+    );
+    generic_driver::driver_manager().register_driver(gpio_descriptor);
 
-/// Return a reference to the driver manager.
-pub fn driver_manager() -> &'static impl driver::interface::DriverManager {
-    &BSP_DRIVER_MANAGER
+    Ok(())
 }
 
-//------------------------------------------------------------------------------
-// OS Interface Code
-//------------------------------------------------------------------------------
-use driver::interface::DeviceDriver;
+/// Function needs to ensure that driver registration happens only after correct instantiation.
+unsafe fn driver_interrupt_controller() -> Result<(), &'static str> {
+    instantiate_interrupt_controller()?;
 
-impl driver::interface::DriverManager for BSPDriverManager {
-    unsafe fn instantiate_drivers(&self) -> Result<(), &'static str> {
-        if self.init_done.load(Ordering::Relaxed) {
-            return Err("Drivers already instantiated");
-        }
+    let interrupt_controller_descriptor = generic_driver::DeviceDriverDescriptor::new(
+        INTERRUPT_CONTROLLER.assume_init_ref(),
+        Some(post_init_interrupt_controller),
+        None,
+    );
+    generic_driver::driver_manager().register_driver(interrupt_controller_descriptor);
 
-        self.instantiate_uart()?;
-        self.instantiate_gpio()?;
-        self.instantiate_interrupt_controller()?;
+    Ok(())
+}
 
-        self.register_drivers();
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
 
-        self.init_done.store(true, Ordering::Relaxed);
-        Ok(())
+/// Initialize the driver subsystem.
+///
+/// # Safety
+///
+/// See child function calls.
+pub unsafe fn init() -> Result<(), &'static str> {
+    static INIT_DONE: AtomicBool = AtomicBool::new(false);
+    if INIT_DONE.load(Ordering::Relaxed) {
+        return Err("Init already done");
     }
 
-    fn all_device_drivers(&self) -> [&(dyn DeviceDriver + Sync); NUM_DRIVERS] {
-        self.device_drivers
-            .read(|drivers| drivers.map(|drivers| drivers.unwrap()))
-    }
+    driver_uart()?;
+    driver_gpio()?;
+    driver_interrupt_controller()?;
 
-    #[cfg(feature = "test_build")]
-    fn qemu_bring_up_console(&self) {
-        use crate::cpu;
+    INIT_DONE.store(true, Ordering::Relaxed);
+    Ok(())
+}
 
-        unsafe {
-            self.instantiate_uart()
-                .unwrap_or_else(|_| cpu::qemu_exit_failure());
-            console::register_console(PL011_UART.assume_init_ref());
-        };
-    }
+/// Minimal code needed to bring up the console in QEMU (for testing only). This is often less steps
+/// than on real hardware due to QEMU's abstractions.
+#[cfg(feature = "test_build")]
+pub fn qemu_bring_up_console() {
+    use crate::cpu;
+
+    unsafe {
+        instantiate_uart().unwrap_or_else(|_| cpu::qemu_exit_failure());
+        console::register_console(PL011_UART.assume_init_ref());
+    };
 }
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/exception/asynchronous.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
index ab20d86d3..06a675588 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
@@ -10,6 +10,9 @@ use crate::bsp;
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
+/// Export for reuse in generic asynchronous.rs.
+pub use bsp::device_driver::IRQNumber;
+
 #[cfg(feature = "bsp_rpi3")]
 pub(in crate::bsp) mod irq_map {
     use super::bsp::device_driver::{IRQNumber, PeripheralIRQ};
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/driver.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/driver.rs
index 98197fef3..18066c313 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/driver.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/driver.rs
@@ -4,16 +4,37 @@
 
 //! Driver support.
 
+use crate::{
+    exception, info,
+    synchronization::{interface::ReadWriteEx, InitStateLock},
+};
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+const NUM_DRIVERS: usize = 5;
+
+struct DriverManagerInner<T>
+where
+    T: 'static,
+{
+    next_index: usize,
+    descriptors: [Option<DeviceDriverDescriptor<T>>; NUM_DRIVERS],
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
 /// Driver interfaces.
 pub mod interface {
-    use crate::bsp;
-
     /// Device Driver functions.
     pub trait DeviceDriver {
+        /// Different interrupt controllers might use different types for IRQ number.
+        type IRQNumberType: super::fmt::Display;
+
         /// Return a compatibility string for identifying the driver.
         fn compatible(&self) -> &'static str;
 
@@ -26,32 +47,175 @@ pub mod interface {
             Ok(())
         }
 
-        /// Called by the kernel to register and enable the device's IRQ handlers, if any.
+        /// Called by the kernel to register and enable the device's IRQ handler.
         ///
         /// Rust's type system will prevent a call to this function unless the calling instance
         /// itself has static lifetime.
-        fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
-            Ok(())
+        fn register_and_enable_irq_handler(
+            &'static self,
+            irq_number: &Self::IRQNumberType,
+        ) -> Result<(), &'static str> {
+            panic!(
+                "Attempt to enable IRQ {} for device {}, but driver does not support this",
+                irq_number,
+                self.compatible()
+            )
+        }
+    }
+}
+
+/// Tpye to be used as an optional callback after a driver's init() has run.
+pub type DeviceDriverPostInitCallback = unsafe fn() -> Result<(), &'static str>;
+
+/// A descriptor for device drivers.
+#[derive(Copy, Clone)]
+pub struct DeviceDriverDescriptor<T>
+where
+    T: 'static,
+{
+    device_driver: &'static (dyn interface::DeviceDriver<IRQNumberType = T> + Sync),
+    post_init_callback: Option<DeviceDriverPostInitCallback>,
+    irq_number: Option<T>,
+}
+
+/// Provides device driver management functions.
+pub struct DriverManager<T>
+where
+    T: 'static,
+{
+    inner: InitStateLock<DriverManagerInner<T>>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static DRIVER_MANAGER: DriverManager<exception::asynchronous::IRQNumber> = DriverManager::new();
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl<T> DriverManagerInner<T>
+where
+    T: 'static + Copy,
+{
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self {
+            next_index: 0,
+            descriptors: [None; NUM_DRIVERS],
         }
     }
+}
 
-    /// Device driver management functions.
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl<T> DeviceDriverDescriptor<T> {
+    /// Create an instance.
+    pub fn new(
+        device_driver: &'static (dyn interface::DeviceDriver<IRQNumberType = T> + Sync),
+        post_init_callback: Option<DeviceDriverPostInitCallback>,
+        irq_number: Option<T>,
+    ) -> Self {
+        Self {
+            device_driver,
+            post_init_callback,
+            irq_number,
+        }
+    }
+}
+
+/// Return a reference to the global DriverManager.
+pub fn driver_manager() -> &'static DriverManager<exception::asynchronous::IRQNumber> {
+    &DRIVER_MANAGER
+}
+
+impl<T> DriverManager<T>
+where
+    T: fmt::Display + Copy,
+{
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self {
+            inner: InitStateLock::new(DriverManagerInner::new()),
+        }
+    }
+
+    /// Register a device driver with the kernel.
+    pub fn register_driver(&self, descriptor: DeviceDriverDescriptor<T>) {
+        self.inner.write(|inner| {
+            inner.descriptors[inner.next_index] = Some(descriptor);
+            inner.next_index += 1;
+        })
+    }
+
+    /// Helper for iterating over registered drivers.
+    fn for_each_descriptor<'a>(&'a self, f: impl FnMut(&'a DeviceDriverDescriptor<T>)) {
+        self.inner.read(|inner| {
+            inner
+                .descriptors
+                .iter()
+                .filter_map(|x| x.as_ref())
+                .for_each(f)
+        })
+    }
+
+    /// Fully initialize all drivers and their interrupts handlers.
     ///
-    /// The `BSP` is supposed to supply one global instance.
-    pub trait DriverManager {
-        /// Instantiate all drivers.
-        ///
-        /// # Safety
-        ///
-        /// Must be called before `all_device_drivers`.
-        unsafe fn instantiate_drivers(&self) -> Result<(), &'static str>;
+    /// # Safety
+    ///
+    /// - During init, drivers might do stuff with system-wide impact.
+    pub unsafe fn init_drivers_and_irqs(&self) {
+        self.for_each_descriptor(|descriptor| {
+            // 1. Initialize driver.
+            if let Err(x) = descriptor.device_driver.init() {
+                panic!(
+                    "Error initializing driver: {}: {}",
+                    descriptor.device_driver.compatible(),
+                    x
+                );
+            }
+
+            // 2. Call corresponding post init callback.
+            if let Some(callback) = &descriptor.post_init_callback {
+                if let Err(x) = callback() {
+                    panic!(
+                        "Error during driver post-init callback: {}: {}",
+                        descriptor.device_driver.compatible(),
+                        x
+                    );
+                }
+            }
+        });
+
+        // 3. After all post-init callbacks were done, the interrupt controller should be
+        //    registered and functional. So let drivers register with it now.
+        self.for_each_descriptor(|descriptor| {
+            if let Some(irq_number) = &descriptor.irq_number {
+                if let Err(x) = descriptor
+                    .device_driver
+                    .register_and_enable_irq_handler(irq_number)
+                {
+                    panic!(
+                        "Error during driver interrupt handler registration: {}: {}",
+                        descriptor.device_driver.compatible(),
+                        x
+                    );
+                }
+            }
+        });
+    }
 
-        /// Return a slice of references to all `BSP`-instantiated drivers.
-        fn all_device_drivers(&self) -> [&(dyn DeviceDriver + Sync); bsp::driver::NUM_DRIVERS];
+    /// Enumerate all registered device drivers.
+    pub fn enumerate(&self) {
+        let mut i: usize = 1;
+        self.for_each_descriptor(|descriptor| {
+            info!("      {}. {}", i, descriptor.device_driver.compatible());
 
-        /// Minimal code needed to bring up the console in QEMU (for testing only). This is often
-        /// less steps than on real hardware due to QEMU's abstractions.
-        #[cfg(feature = "test_build")]
-        fn qemu_bring_up_console(&self);
+            i += 1;
+        });
     }
 }
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception/asynchronous.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception/asynchronous.rs
index 83ca1aa6d..c1f2a27b3 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception/asynchronous.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception/asynchronous.rs
@@ -10,7 +10,7 @@ mod arch_asynchronous;
 mod null_irq_manager;
 
 use crate::{bsp, synchronization};
-use core::{fmt, marker::PhantomData};
+use core::marker::PhantomData;
 
 //--------------------------------------------------------------------------------------------------
 // Architectural Public Reexports
@@ -24,14 +24,23 @@ pub use arch_asynchronous::{
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
+/// Interrupt number as defined by the BSP.
+pub type IRQNumber = bsp::exception::asynchronous::IRQNumber;
+
 /// Interrupt descriptor.
 #[derive(Copy, Clone)]
-pub struct IRQDescriptor {
+pub struct IRQHandlerDescriptor<T>
+where
+    T: Copy,
+{
+    /// The IRQ number.
+    number: T,
+
     /// Descriptive name.
-    pub name: &'static str,
+    name: &'static str,
 
     /// Reference to handler trait object.
-    pub handler: &'static (dyn interface::IRQHandler + Sync),
+    handler: &'static (dyn interface::IRQHandler + Sync),
 }
 
 /// IRQContext token.
@@ -61,17 +70,16 @@ pub mod interface {
     /// platform's interrupt controller.
     pub trait IRQManager {
         /// The IRQ number type depends on the implementation.
-        type IRQNumberType;
+        type IRQNumberType: Copy;
 
         /// Register a handler.
         fn register_handler(
             &self,
-            irq_number: Self::IRQNumberType,
-            descriptor: super::IRQDescriptor,
+            irq_handler_descriptor: super::IRQHandlerDescriptor<Self::IRQNumberType>,
         ) -> Result<(), &'static str>;
 
         /// Enable an interrupt in the controller.
-        fn enable(&self, irq_number: Self::IRQNumberType);
+        fn enable(&self, irq_number: &Self::IRQNumberType);
 
         /// Handle pending interrupts.
         ///
@@ -91,16 +99,12 @@ pub mod interface {
     }
 }
 
-/// A wrapper type for IRQ numbers with integrated range sanity check.
-#[derive(Copy, Clone)]
-pub struct IRQNumber<const MAX_INCLUSIVE: usize>(usize);
-
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
 static CUR_IRQ_MANAGER: InitStateLock<
-    &'static (dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber> + Sync),
+    &'static (dyn interface::IRQManager<IRQNumberType = IRQNumber> + Sync),
 > = InitStateLock::new(&null_irq_manager::NULL_IRQ_MANAGER);
 
 //--------------------------------------------------------------------------------------------------
@@ -108,6 +112,39 @@ static CUR_IRQ_MANAGER: InitStateLock<
 //--------------------------------------------------------------------------------------------------
 use synchronization::{interface::ReadWriteEx, InitStateLock};
 
+impl<T> IRQHandlerDescriptor<T>
+where
+    T: Copy,
+{
+    /// Create an instance.
+    pub const fn new(
+        number: T,
+        name: &'static str,
+        handler: &'static (dyn interface::IRQHandler + Sync),
+    ) -> Self {
+        Self {
+            number,
+            name,
+            handler,
+        }
+    }
+
+    /// Return the number.
+    pub const fn number(&self) -> T {
+        self.number
+    }
+
+    /// Return the name.
+    pub const fn name(&self) -> &'static str {
+        self.name
+    }
+
+    /// Return the handler.
+    pub const fn handler(&self) -> &'static (dyn interface::IRQHandler + Sync) {
+        self.handler
+    }
+}
+
 impl<'irq_context> IRQContext<'irq_context> {
     /// Creates an IRQContext token.
     ///
@@ -125,29 +162,6 @@ impl<'irq_context> IRQContext<'irq_context> {
     }
 }
 
-impl<const MAX_INCLUSIVE: usize> IRQNumber<{ MAX_INCLUSIVE }> {
-    /// The total number of IRQs this type supports.
-    pub const NUM_TOTAL: usize = MAX_INCLUSIVE + 1;
-
-    /// Creates a new instance if number <= MAX_INCLUSIVE.
-    pub const fn new(number: usize) -> Self {
-        assert!(number <= MAX_INCLUSIVE);
-
-        Self(number)
-    }
-
-    /// Return the wrapped number.
-    pub const fn get(self) -> usize {
-        self.0
-    }
-}
-
-impl<const MAX_INCLUSIVE: usize> fmt::Display for IRQNumber<{ MAX_INCLUSIVE }> {
-    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
-        write!(f, "{}", self.0)
-    }
-}
-
 /// Executes the provided closure while IRQs are masked on the executing core.
 ///
 /// While the function temporarily changes the HW state of the executing core, it restores it to the
@@ -163,8 +177,7 @@ pub fn exec_with_irq_masked<T>(f: impl FnOnce() -> T) -> T {
 
 /// Register a new IRQ manager.
 pub fn register_irq_manager(
-    new_manager: &'static (dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber>
-                  + Sync),
+    new_manager: &'static (dyn interface::IRQManager<IRQNumberType = IRQNumber> + Sync),
 ) {
     CUR_IRQ_MANAGER.write(|manager| *manager = new_manager);
 }
@@ -172,6 +185,6 @@ pub fn register_irq_manager(
 /// Return a reference to the currently registered IRQ manager.
 ///
 /// This is the IRQ manager used by the architectural interrupt handling code.
-pub fn irq_manager() -> &'static dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber> {
+pub fn irq_manager() -> &'static dyn interface::IRQManager<IRQNumberType = IRQNumber> {
     CUR_IRQ_MANAGER.read(|manager| *manager)
 }
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception/asynchronous/null_irq_manager.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception/asynchronous/null_irq_manager.rs
index 560e3ce4b..438f96496 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception/asynchronous/null_irq_manager.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception/asynchronous/null_irq_manager.rs
@@ -4,8 +4,7 @@
 
 //! Null IRQ Manager.
 
-use super::{interface, IRQContext, IRQDescriptor};
-use crate::bsp;
+use super::{interface, IRQContext, IRQHandlerDescriptor};
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -24,17 +23,16 @@ pub static NULL_IRQ_MANAGER: NullIRQManager = NullIRQManager {};
 //--------------------------------------------------------------------------------------------------
 
 impl interface::IRQManager for NullIRQManager {
-    type IRQNumberType = bsp::driver::IRQNumber;
+    type IRQNumberType = super::IRQNumber;
 
     fn register_handler(
         &self,
-        _irq_number: Self::IRQNumberType,
-        _descriptor: IRQDescriptor,
+        _descriptor: IRQHandlerDescriptor<Self::IRQNumberType>,
     ) -> Result<(), &'static str> {
         panic!("No IRQ Manager registered yet");
     }
 
-    fn enable(&self, _irq_number: Self::IRQNumberType) {
+    fn enable(&self, _irq_number: &Self::IRQNumberType) {
         panic!("No IRQ Manager registered yet");
     }
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
index 59ef14ac9..f595b587d 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
@@ -181,11 +181,9 @@ pub fn test_runner(tests: &[&test_types::UnitTest]) {
 #[cfg(test)]
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
     memory::init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     test_main();
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/main.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/main.rs
index 9aeb44386..659052588 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/main.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/main.rs
@@ -13,7 +13,7 @@
 #![no_main]
 #![no_std]
 
-use libkernel::{bsp, cpu, driver, exception, info, memory, state, time, warn};
+use libkernel::{bsp, cpu, driver, exception, info, memory, state, time};
 
 /// Early init code.
 ///
@@ -25,27 +25,16 @@ use libkernel::{bsp, cpu, driver, exception, info, memory, state, time, warn};
 /// - Printing will not work until the respective driver's MMIO is remapped.
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
     memory::init();
 
-    // Instantiate and init all device drivers.
-    if let Err(x) = bsp::driver::driver_manager().instantiate_drivers() {
-        panic!("Error instantiating drivers: {}", x);
-    }
-    for i in bsp::driver::driver_manager().all_device_drivers().iter() {
-        if let Err(x) = i.init() {
-            panic!("Error loading driver: {}: {}", i.compatible(), x);
-        }
+    // Initialize the BSP driver subsystem.
+    if let Err(x) = bsp::driver::init() {
+        panic!("Error initializing BSP driver subsystem: {}", x);
     }
 
-    // Let device drivers register and enable their handlers with the interrupt controller.
-    for i in bsp::driver::driver_manager().all_device_drivers() {
-        if let Err(msg) = i.register_and_enable_irq_handler() {
-            warn!("Error registering IRQ handler: {}", msg);
-        }
-    }
+    // Initialize all device drivers.
+    driver::driver_manager().init_drivers_and_irqs();
 
     bsp::memory::mmu::kernel_add_mapping_records_for_precomputed();
 
@@ -61,8 +50,6 @@ unsafe fn kernel_init() -> ! {
 
 /// The main function running after the early init.
 fn kernel_main() -> ! {
-    use driver::interface::DriverManager;
-
     info!("{}", libkernel::version());
     info!("Booting on: {}", bsp::board_name());
 
@@ -81,13 +68,7 @@ fn kernel_main() -> ! {
     );
 
     info!("Drivers loaded:");
-    for (i, driver) in bsp::driver::driver_manager()
-        .all_device_drivers()
-        .iter()
-        .enumerate()
-    {
-        info!("      {}. {}", i + 1, driver.compatible());
-    }
+    driver::driver_manager().enumerate();
 
     info!("Registered IRQ handlers:");
     exception::asynchronous::irq_manager().print_handler();
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/00_console_sanity.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/00_console_sanity.rs
index 305510cea..2c0225b7a 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/00_console_sanity.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/00_console_sanity.rs
@@ -11,16 +11,15 @@
 /// Console tests should time out on the I/O harness in case of panic.
 mod panic_wait_forever;
 
-use libkernel::{bsp, console, cpu, driver, exception, memory, print};
+use libkernel::{bsp, console, cpu, exception, memory, print};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
     use console::console;
-    use driver::interface::DriverManager;
 
     exception::handling_init();
     memory::init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     // Handshake
     assert_eq!(console().read_char(), 'A');
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/01_timer_sanity.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/01_timer_sanity.rs
index 398993324..8188b9424 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/01_timer_sanity.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/01_timer_sanity.rs
@@ -11,16 +11,14 @@
 #![test_runner(libkernel::test_runner)]
 
 use core::time::Duration;
-use libkernel::{bsp, cpu, driver, exception, memory, time};
+use libkernel::{bsp, cpu, exception, memory, time};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
     memory::init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/02_exception_sync_page_fault.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/02_exception_sync_page_fault.rs
index a6d15b697..fab44c8f0 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/02_exception_sync_page_fault.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/02_exception_sync_page_fault.rs
@@ -17,15 +17,13 @@
 /// or indirectly.
 mod panic_exit_success;
 
-use libkernel::{bsp, cpu, driver, exception, info, memory, println};
+use libkernel::{bsp, cpu, exception, info, memory, println};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
     memory::init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     // This line will be printed as the test header.
     println!("Testing synchronous exception handling by causing a page fault");
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/03_exception_restore_sanity.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/03_exception_restore_sanity.rs
index 47dd27149..f176c6a67 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/03_exception_restore_sanity.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/03_exception_restore_sanity.rs
@@ -12,7 +12,7 @@
 mod panic_wait_forever;
 
 use core::arch::asm;
-use libkernel::{bsp, cpu, driver, exception, info, memory, println};
+use libkernel::{bsp, cpu, exception, info, memory, println};
 
 #[inline(never)]
 fn nested_system_call() {
@@ -30,11 +30,9 @@ fn nested_system_call() {
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
     memory::init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     // This line will be printed as the test header.
     println!("Testing exception restore");
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/04_exception_irq_sanity.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/04_exception_irq_sanity.rs
index e93a4caf6..e6f94c91f 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/04_exception_irq_sanity.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/04_exception_irq_sanity.rs
@@ -10,15 +10,13 @@
 #![reexport_test_harness_main = "test_main"]
 #![test_runner(libkernel::test_runner)]
 
-use libkernel::{bsp, cpu, driver, exception, memory};
+use libkernel::{bsp, cpu, exception, memory};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     memory::init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     exception::handling_init();
     exception::asynchronous::local_irq_unmask();
diff --git a/17_kernel_symbols/Makefile b/17_kernel_symbols/Makefile
index 9af331403..7bed51da7 100644
--- a/17_kernel_symbols/Makefile
+++ b/17_kernel_symbols/Makefile
@@ -335,7 +335,7 @@ test_boot: $(KERNEL_BIN)
 ## Helpers for unit and integration test targets
 ##------------------------------------------------------------------------------
 define KERNEL_TEST_RUNNER
-    #!/usr/bin/env bash
+#!/usr/bin/env bash
 
     # The cargo test runner seems to change into the crate under test's directory. Therefore, ensure
     # this script executes from the root.
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2.rs
index ec65f1b2a..3cc35b5ee 100644
--- a/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2.rs
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2.rs
@@ -80,7 +80,8 @@ mod gicc;
 mod gicd;
 
 use crate::{
-    bsp, cpu, driver, exception,
+    bsp::{self, device_driver::common::BoundedUsize},
+    cpu, driver, exception,
     memory::{Address, Virtual},
     synchronization,
     synchronization::InitStateLock,
@@ -90,14 +91,15 @@ use crate::{
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
-type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; IRQNumber::NUM_TOTAL];
+type HandlerTable = [Option<exception::asynchronous::IRQHandlerDescriptor<IRQNumber>>;
+    IRQNumber::MAX_INCLUSIVE + 1];
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
 /// Used for the associated type of trait [`exception::asynchronous::interface::IRQManager`].
-pub type IRQNumber = exception::asynchronous::IRQNumber<{ GICv2::MAX_IRQ_NUMBER }>;
+pub type IRQNumber = BoundedUsize<{ GICv2::MAX_IRQ_NUMBER }>;
 
 /// Representation of the GIC.
 pub struct GICv2 {
@@ -109,9 +111,6 @@ pub struct GICv2 {
 
     /// Stores registered IRQ handlers. Writable only during kernel init. RO afterwards.
     handler_table: InitStateLock<HandlerTable>,
-
-    /// Callback to be invoked after successful init.
-    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -131,13 +130,11 @@ impl GICv2 {
     pub const unsafe fn new(
         gicd_mmio_start_addr: Address<Virtual>,
         gicc_mmio_start_addr: Address<Virtual>,
-        post_init_callback: fn(),
     ) -> Self {
         Self {
             gicd: gicd::GICD::new(gicd_mmio_start_addr),
             gicc: gicc::GICC::new(gicc_mmio_start_addr),
-            handler_table: InitStateLock::new([None; IRQNumber::NUM_TOTAL]),
-            post_init_callback,
+            handler_table: InitStateLock::new([None; IRQNumber::MAX_INCLUSIVE + 1]),
         }
     }
 }
@@ -148,6 +145,8 @@ impl GICv2 {
 use synchronization::interface::ReadWriteEx;
 
 impl driver::interface::DeviceDriver for GICv2 {
+    type IRQNumberType = IRQNumber;
+
     fn compatible(&self) -> &'static str {
         Self::COMPATIBLE
     }
@@ -160,8 +159,6 @@ impl driver::interface::DeviceDriver for GICv2 {
         self.gicc.priority_accept_all();
         self.gicc.enable();
 
-        (self.post_init_callback)();
-
         Ok(())
     }
 }
@@ -171,23 +168,22 @@ impl exception::asynchronous::interface::IRQManager for GICv2 {
 
     fn register_handler(
         &self,
-        irq_number: Self::IRQNumberType,
-        descriptor: exception::asynchronous::IRQDescriptor,
+        irq_handler_descriptor: exception::asynchronous::IRQHandlerDescriptor<Self::IRQNumberType>,
     ) -> Result<(), &'static str> {
         self.handler_table.write(|table| {
-            let irq_number = irq_number.get();
+            let irq_number = irq_handler_descriptor.number().get();
 
             if table[irq_number].is_some() {
                 return Err("IRQ handler already registered");
             }
 
-            table[irq_number] = Some(descriptor);
+            table[irq_number] = Some(irq_handler_descriptor);
 
             Ok(())
         })
     }
 
-    fn enable(&self, irq_number: Self::IRQNumberType) {
+    fn enable(&self, irq_number: &Self::IRQNumberType) {
         self.gicd.enable(irq_number);
     }
 
@@ -210,7 +206,7 @@ impl exception::asynchronous::interface::IRQManager for GICv2 {
                 None => panic!("No handler registered for IRQ {}", irq_number),
                 Some(descriptor) => {
                     // Call the IRQ handler. Panics on failure.
-                    descriptor.handler.handle().expect("Error handling IRQ");
+                    descriptor.handler().handle().expect("Error handling IRQ");
                 }
             }
         });
@@ -227,7 +223,7 @@ impl exception::asynchronous::interface::IRQManager for GICv2 {
         self.handler_table.read(|table| {
             for (i, opt) in table.iter().skip(32).enumerate() {
                 if let Some(handler) = opt {
-                    info!("            {: >3}. {}", i + 32, handler.name);
+                    info!("            {: >3}. {}", i + 32, handler.name());
                 }
             }
         });
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
index a9c97a8e3..8aebcf2b6 100644
--- a/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -172,7 +172,7 @@ impl GICD {
     }
 
     /// Enable an interrupt.
-    pub fn enable(&self, irq_num: super::IRQNumber) {
+    pub fn enable(&self, irq_num: &super::IRQNumber) {
         let irq_num = irq_num.get();
 
         // Each bit in the u32 enable register corresponds to one IRQ number. Shift right by 5
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 2281e66a3..fb61a6510 100644
--- a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -7,6 +7,7 @@
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper,
     driver,
+    exception::asynchronous::IRQNumber,
     memory::{Address, Virtual},
     synchronization,
     synchronization::IRQSafeNullLock,
@@ -122,7 +123,6 @@ struct GPIOInner {
 /// Representation of the GPIO HW.
 pub struct GPIO {
     inner: IRQSafeNullLock<GPIOInner>,
-    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -202,10 +202,9 @@ impl GPIO {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    pub const unsafe fn new(mmio_start_addr: Address<Virtual>, post_init_callback: fn()) -> Self {
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
         Self {
             inner: IRQSafeNullLock::new(GPIOInner::new(mmio_start_addr)),
-            post_init_callback,
         }
     }
 
@@ -221,13 +220,9 @@ impl GPIO {
 use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for GPIO {
+    type IRQNumberType = IRQNumber;
+
     fn compatible(&self) -> &'static str {
         Self::COMPATIBLE
     }
-
-    unsafe fn init(&self) -> Result<(), &'static str> {
-        (self.post_init_callback)();
-
-        Ok(())
-    }
 }
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
index b4dd530da..c93a9fa1f 100644
--- a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -7,9 +7,12 @@
 mod peripheral_ic;
 
 use crate::{
-    driver, exception,
+    bsp::device_driver::common::BoundedUsize,
+    driver,
+    exception::{self, asynchronous::IRQHandlerDescriptor},
     memory::{Address, Virtual},
 };
+use core::fmt;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -24,10 +27,8 @@ struct PendingIRQs {
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
-pub type LocalIRQ =
-    exception::asynchronous::IRQNumber<{ InterruptController::MAX_LOCAL_IRQ_NUMBER }>;
-pub type PeripheralIRQ =
-    exception::asynchronous::IRQNumber<{ InterruptController::MAX_PERIPHERAL_IRQ_NUMBER }>;
+pub type LocalIRQ = BoundedUsize<{ InterruptController::MAX_LOCAL_IRQ_NUMBER }>;
+pub type PeripheralIRQ = BoundedUsize<{ InterruptController::MAX_PERIPHERAL_IRQ_NUMBER }>;
 
 /// Used for the associated type of trait [`exception::asynchronous::interface::IRQManager`].
 #[derive(Copy, Clone)]
@@ -40,7 +41,6 @@ pub enum IRQNumber {
 /// Representation of the Interrupt Controller.
 pub struct InterruptController {
     periph: peripheral_ic::PeripheralIC,
-    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -71,6 +71,15 @@ impl Iterator for PendingIRQs {
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
+impl fmt::Display for IRQNumber {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        match self {
+            Self::Local(number) => write!(f, "Local({})", number),
+            Self::Peripheral(number) => write!(f, "Peripheral({})", number),
+        }
+    }
+}
+
 impl InterruptController {
     // Restrict to 3 for now. This makes future code for local_ic.rs more straight forward.
     const MAX_LOCAL_IRQ_NUMBER: usize = 3;
@@ -83,13 +92,9 @@ impl InterruptController {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    pub const unsafe fn new(
-        periph_mmio_start_addr: Address<Virtual>,
-        post_init_callback: fn(),
-    ) -> Self {
+    pub const unsafe fn new(periph_mmio_start_addr: Address<Virtual>) -> Self {
         Self {
             periph: peripheral_ic::PeripheralIC::new(periph_mmio_start_addr),
-            post_init_callback,
         }
     }
 }
@@ -99,15 +104,11 @@ impl InterruptController {
 //------------------------------------------------------------------------------
 
 impl driver::interface::DeviceDriver for InterruptController {
+    type IRQNumberType = IRQNumber;
+
     fn compatible(&self) -> &'static str {
         Self::COMPATIBLE
     }
-
-    unsafe fn init(&self) -> Result<(), &'static str> {
-        (self.post_init_callback)();
-
-        Ok(())
-    }
 }
 
 impl exception::asynchronous::interface::IRQManager for InterruptController {
@@ -115,16 +116,23 @@ impl exception::asynchronous::interface::IRQManager for InterruptController {
 
     fn register_handler(
         &self,
-        irq: Self::IRQNumberType,
-        descriptor: exception::asynchronous::IRQDescriptor,
+        irq_handler_descriptor: exception::asynchronous::IRQHandlerDescriptor<Self::IRQNumberType>,
     ) -> Result<(), &'static str> {
-        match irq {
+        match irq_handler_descriptor.number() {
             IRQNumber::Local(_) => unimplemented!("Local IRQ controller not implemented."),
-            IRQNumber::Peripheral(pirq) => self.periph.register_handler(pirq, descriptor),
+            IRQNumber::Peripheral(pirq) => {
+                let periph_descriptor = IRQHandlerDescriptor::new(
+                    pirq,
+                    irq_handler_descriptor.name(),
+                    irq_handler_descriptor.handler(),
+                );
+
+                self.periph.register_handler(periph_descriptor)
+            }
         }
     }
 
-    fn enable(&self, irq: Self::IRQNumberType) {
+    fn enable(&self, irq: &Self::IRQNumberType) {
         match irq {
             IRQNumber::Local(_) => unimplemented!("Local IRQ controller not implemented."),
             IRQNumber::Peripheral(pirq) => self.periph.enable(pirq),
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index 06802d272..0a20bd874 100644
--- a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -52,7 +52,8 @@ type WriteOnlyRegisters = MMIODerefWrapper<WORegisterBlock>;
 /// Abstraction for the ReadOnly parts of the associated MMIO registers.
 type ReadOnlyRegisters = MMIODerefWrapper<RORegisterBlock>;
 
-type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; PeripheralIRQ::NUM_TOTAL];
+type HandlerTable = [Option<exception::asynchronous::IRQHandlerDescriptor<PeripheralIRQ>>;
+    PeripheralIRQ::MAX_INCLUSIVE + 1];
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -84,7 +85,7 @@ impl PeripheralIC {
         Self {
             wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(mmio_start_addr)),
             ro_registers: ReadOnlyRegisters::new(mmio_start_addr),
-            handler_table: InitStateLock::new([None; PeripheralIRQ::NUM_TOTAL]),
+            handler_table: InitStateLock::new([None; PeripheralIRQ::MAX_INCLUSIVE + 1]),
         }
     }
 
@@ -107,23 +108,22 @@ impl exception::asynchronous::interface::IRQManager for PeripheralIC {
 
     fn register_handler(
         &self,
-        irq: Self::IRQNumberType,
-        descriptor: exception::asynchronous::IRQDescriptor,
+        irq_handler_descriptor: exception::asynchronous::IRQHandlerDescriptor<Self::IRQNumberType>,
     ) -> Result<(), &'static str> {
         self.handler_table.write(|table| {
-            let irq_number = irq.get();
+            let irq_number = irq_handler_descriptor.number().get();
 
             if table[irq_number].is_some() {
                 return Err("IRQ handler already registered");
             }
 
-            table[irq_number] = Some(descriptor);
+            table[irq_number] = Some(irq_handler_descriptor);
 
             Ok(())
         })
     }
 
-    fn enable(&self, irq: Self::IRQNumberType) {
+    fn enable(&self, irq: &Self::IRQNumberType) {
         self.wo_registers.lock(|regs| {
             let enable_reg = if irq.get() <= 31 {
                 &regs.ENABLE_1
@@ -149,7 +149,7 @@ impl exception::asynchronous::interface::IRQManager for PeripheralIC {
                     None => panic!("No handler registered for IRQ {}", irq_number),
                     Some(descriptor) => {
                         // Call the IRQ handler. Panics on failure.
-                        descriptor.handler.handle().expect("Error handling IRQ");
+                        descriptor.handler().handle().expect("Error handling IRQ");
                     }
                 }
             }
@@ -164,7 +164,7 @@ impl exception::asynchronous::interface::IRQManager for PeripheralIC {
         self.handler_table.read(|table| {
             for (i, opt) in table.iter().enumerate() {
                 if let Some(handler) = opt {
-                    info!("            {: >3}. {}", i, handler.name);
+                    info!("            {: >3}. {}", i, handler.name());
                 }
             }
         });
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index f67d70dfb..0ee7feb78 100644
--- a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -10,9 +10,9 @@
 //! - <https://developer.arm.com/documentation/ddi0183/latest>
 
 use crate::{
-    bsp,
     bsp::device_driver::common::MMIODerefWrapper,
-    console, cpu, driver, exception,
+    console, cpu, driver,
+    exception::{self, asynchronous::IRQNumber},
     memory::{Address, Virtual},
     synchronization,
     synchronization::IRQSafeNullLock,
@@ -233,8 +233,6 @@ struct PL011UartInner {
 /// Representation of the UART.
 pub struct PL011Uart {
     inner: IRQSafeNullLock<PL011UartInner>,
-    irq_number: bsp::device_driver::IRQNumber,
-    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -398,16 +396,9 @@ impl PL011Uart {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    /// - The user must ensure to provide correct IRQ numbers.
-    pub const unsafe fn new(
-        mmio_start_addr: Address<Virtual>,
-        irq_number: bsp::device_driver::IRQNumber,
-        post_init_callback: fn(),
-    ) -> Self {
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
         Self {
             inner: IRQSafeNullLock::new(PL011UartInner::new(mmio_start_addr)),
-            irq_number,
-            post_init_callback,
         }
     }
 }
@@ -418,27 +409,28 @@ impl PL011Uart {
 use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for PL011Uart {
+    type IRQNumberType = IRQNumber;
+
     fn compatible(&self) -> &'static str {
         Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
         self.inner.lock(|inner| inner.init());
-        (self.post_init_callback)();
 
         Ok(())
     }
 
-    fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
-        use exception::asynchronous::{irq_manager, IRQDescriptor};
+    fn register_and_enable_irq_handler(
+        &'static self,
+        irq_number: &Self::IRQNumberType,
+    ) -> Result<(), &'static str> {
+        use exception::asynchronous::{irq_manager, IRQHandlerDescriptor};
 
-        let descriptor = IRQDescriptor {
-            name: Self::COMPATIBLE,
-            handler: self,
-        };
+        let descriptor = IRQHandlerDescriptor::new(*irq_number, Self::COMPATIBLE, self);
 
-        irq_manager().register_handler(self.irq_number, descriptor)?;
-        irq_manager().enable(self.irq_number);
+        irq_manager().register_handler(descriptor)?;
+        irq_manager().enable(irq_number);
 
         Ok(())
     }
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/common.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/common.rs
index 69f038d4d..ca7aeb76a 100644
--- a/17_kernel_symbols/kernel/src/bsp/device_driver/common.rs
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/common.rs
@@ -5,7 +5,7 @@
 //! Common device driver code.
 
 use crate::memory::{Address, Virtual};
-use core::{marker::PhantomData, ops};
+use core::{fmt, marker::PhantomData, ops};
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -16,6 +16,10 @@ pub struct MMIODerefWrapper<T> {
     phantom: PhantomData<fn() -> T>,
 }
 
+/// A wrapper type for usize with integrated range bound check.
+#[derive(Copy, Clone)]
+pub struct BoundedUsize<const MAX_INCLUSIVE: usize>(usize);
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -37,3 +41,25 @@ impl<T> ops::Deref for MMIODerefWrapper<T> {
         unsafe { &*(self.start_addr.as_usize() as *const _) }
     }
 }
+
+impl<const MAX_INCLUSIVE: usize> BoundedUsize<{ MAX_INCLUSIVE }> {
+    pub const MAX_INCLUSIVE: usize = MAX_INCLUSIVE;
+
+    /// Creates a new instance if number <= MAX_INCLUSIVE.
+    pub const fn new(number: usize) -> Self {
+        assert!(number <= MAX_INCLUSIVE);
+
+        Self(number)
+    }
+
+    /// Return the wrapped number.
+    pub const fn get(self) -> usize {
+        self.0
+    }
+}
+
+impl<const MAX_INCLUSIVE: usize> fmt::Display for BoundedUsize<{ MAX_INCLUSIVE }> {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        write!(f, "{}", self.0)
+    }
+}
diff --git a/17_kernel_symbols/kernel/src/bsp/raspberrypi/driver.rs b/17_kernel_symbols/kernel/src/bsp/raspberrypi/driver.rs
index e1db4a005..ca3435aae 100644
--- a/17_kernel_symbols/kernel/src/bsp/raspberrypi/driver.rs
+++ b/17_kernel_symbols/kernel/src/bsp/raspberrypi/driver.rs
@@ -7,34 +7,16 @@
 use super::{exception, memory::map::mmio};
 use crate::{
     bsp::device_driver,
-    console, driver, exception as generic_exception, memory,
+    console, driver as generic_driver,
+    exception::{self as generic_exception},
+    memory,
     memory::mmu::MMIODescriptor,
-    synchronization::{interface::ReadWriteEx, InitStateLock},
 };
 use core::{
     mem::MaybeUninit,
     sync::atomic::{AtomicBool, Ordering},
 };
 
-pub use device_driver::IRQNumber;
-
-//--------------------------------------------------------------------------------------------------
-// Private Definitions
-//--------------------------------------------------------------------------------------------------
-
-/// Device Driver Manager type.
-struct BSPDriverManager {
-    device_drivers: InitStateLock<[Option<&'static (dyn DeviceDriver + Sync)>; NUM_DRIVERS]>,
-    init_done: AtomicBool,
-}
-
-//--------------------------------------------------------------------------------------------------
-// Public Definitions
-//--------------------------------------------------------------------------------------------------
-
-/// The number of active drivers provided by this BSP.
-pub const NUM_DRIVERS: usize = 3;
-
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
@@ -49,150 +31,154 @@ static mut INTERRUPT_CONTROLLER: MaybeUninit<device_driver::InterruptController>
 #[cfg(feature = "bsp_rpi4")]
 static mut INTERRUPT_CONTROLLER: MaybeUninit<device_driver::GICv2> = MaybeUninit::uninit();
 
-static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
-    device_drivers: InitStateLock::new([None; NUM_DRIVERS]),
-    init_done: AtomicBool::new(false),
-};
-
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-impl BSPDriverManager {
-    unsafe fn instantiate_uart(&self) -> Result<(), &'static str> {
-        let mmio_descriptor = MMIODescriptor::new(mmio::PL011_UART_START, mmio::PL011_UART_SIZE);
-        let virt_addr =
-            memory::mmu::kernel_map_mmio(device_driver::PL011Uart::COMPATIBLE, &mmio_descriptor)?;
+/// This must be called only after successful init of the memory subsystem.
+unsafe fn instantiate_uart() -> Result<(), &'static str> {
+    let mmio_descriptor = MMIODescriptor::new(mmio::PL011_UART_START, mmio::PL011_UART_SIZE);
+    let virt_addr =
+        memory::mmu::kernel_map_mmio(device_driver::PL011Uart::COMPATIBLE, &mmio_descriptor)?;
 
-        // This is safe to do, because it is only called from the init'ed instance itself.
-        fn uart_post_init() {
-            console::register_console(unsafe { PL011_UART.assume_init_ref() });
-        }
+    PL011_UART.write(device_driver::PL011Uart::new(virt_addr));
 
-        PL011_UART.write(device_driver::PL011Uart::new(
-            virt_addr,
-            exception::asynchronous::irq_map::PL011_UART,
-            uart_post_init,
-        ));
+    Ok(())
+}
 
-        Ok(())
-    }
+/// This must be called only after successful init of the UART driver.
+unsafe fn post_init_uart() -> Result<(), &'static str> {
+    console::register_console(PL011_UART.assume_init_ref());
 
-    unsafe fn instantiate_gpio(&self) -> Result<(), &'static str> {
-        let mmio_descriptor = MMIODescriptor::new(mmio::GPIO_START, mmio::GPIO_SIZE);
-        let virt_addr =
-            memory::mmu::kernel_map_mmio(device_driver::GPIO::COMPATIBLE, &mmio_descriptor)?;
+    Ok(())
+}
 
-        // This is safe to do, because it is only called from the init'ed instance itself.
-        fn gpio_post_init() {
-            unsafe { GPIO.assume_init_ref().map_pl011_uart() };
-        }
+/// This must be called only after successful init of the memory subsystem.
+unsafe fn instantiate_gpio() -> Result<(), &'static str> {
+    let mmio_descriptor = MMIODescriptor::new(mmio::GPIO_START, mmio::GPIO_SIZE);
+    let virt_addr =
+        memory::mmu::kernel_map_mmio(device_driver::GPIO::COMPATIBLE, &mmio_descriptor)?;
 
-        GPIO.write(device_driver::GPIO::new(virt_addr, gpio_post_init));
+    GPIO.write(device_driver::GPIO::new(virt_addr));
 
-        Ok(())
-    }
+    Ok(())
+}
 
-    #[cfg(feature = "bsp_rpi3")]
-    unsafe fn instantiate_interrupt_controller(&self) -> Result<(), &'static str> {
-        let periph_mmio_descriptor =
-            MMIODescriptor::new(mmio::PERIPHERAL_IC_START, mmio::PERIPHERAL_IC_SIZE);
-        let periph_virt_addr = memory::mmu::kernel_map_mmio(
-            device_driver::InterruptController::COMPATIBLE,
-            &periph_mmio_descriptor,
-        )?;
-
-        // This is safe to do, because it is only called from the init'ed instance itself.
-        fn interrupt_controller_post_init() {
-            generic_exception::asynchronous::register_irq_manager(unsafe {
-                INTERRUPT_CONTROLLER.assume_init_ref()
-            });
-        }
-
-        INTERRUPT_CONTROLLER.write(device_driver::InterruptController::new(
-            periph_virt_addr,
-            interrupt_controller_post_init,
-        ));
-
-        Ok(())
-    }
+/// This must be called only after successful init of the GPIO driver.
+unsafe fn post_init_gpio() -> Result<(), &'static str> {
+    GPIO.assume_init_ref().map_pl011_uart();
+    Ok(())
+}
+
+/// This must be called only after successful init of the memory subsystem.
+#[cfg(feature = "bsp_rpi3")]
+unsafe fn instantiate_interrupt_controller() -> Result<(), &'static str> {
+    let periph_mmio_descriptor =
+        MMIODescriptor::new(mmio::PERIPHERAL_IC_START, mmio::PERIPHERAL_IC_SIZE);
+    let periph_virt_addr = memory::mmu::kernel_map_mmio(
+        device_driver::InterruptController::COMPATIBLE,
+        &periph_mmio_descriptor,
+    )?;
+
+    INTERRUPT_CONTROLLER.write(device_driver::InterruptController::new(periph_virt_addr));
 
-    #[cfg(feature = "bsp_rpi4")]
-    unsafe fn instantiate_interrupt_controller(&self) -> Result<(), &'static str> {
-        let gicd_mmio_descriptor = MMIODescriptor::new(mmio::GICD_START, mmio::GICD_SIZE);
-        let gicd_virt_addr = memory::mmu::kernel_map_mmio("GICv2 GICD", &gicd_mmio_descriptor)?;
+    Ok(())
+}
 
-        let gicc_mmio_descriptor = MMIODescriptor::new(mmio::GICC_START, mmio::GICC_SIZE);
-        let gicc_virt_addr = memory::mmu::kernel_map_mmio("GICV2 GICC", &gicc_mmio_descriptor)?;
+/// This must be called only after successful init of the memory subsystem.
+#[cfg(feature = "bsp_rpi4")]
+unsafe fn instantiate_interrupt_controller() -> Result<(), &'static str> {
+    let gicd_mmio_descriptor = MMIODescriptor::new(mmio::GICD_START, mmio::GICD_SIZE);
+    let gicd_virt_addr = memory::mmu::kernel_map_mmio("GICv2 GICD", &gicd_mmio_descriptor)?;
 
-        // This is safe to do, because it is only called from the init'ed instance itself.
-        fn interrupt_controller_post_init() {
-            generic_exception::asynchronous::register_irq_manager(unsafe {
-                INTERRUPT_CONTROLLER.assume_init_ref()
-            });
-        }
+    let gicc_mmio_descriptor = MMIODescriptor::new(mmio::GICC_START, mmio::GICC_SIZE);
+    let gicc_virt_addr = memory::mmu::kernel_map_mmio("GICV2 GICC", &gicc_mmio_descriptor)?;
 
-        INTERRUPT_CONTROLLER.write(device_driver::GICv2::new(
-            gicd_virt_addr,
-            gicc_virt_addr,
-            interrupt_controller_post_init,
-        ));
+    INTERRUPT_CONTROLLER.write(device_driver::GICv2::new(gicd_virt_addr, gicc_virt_addr));
 
-        Ok(())
-    }
+    Ok(())
+}
 
-    unsafe fn register_drivers(&self) {
-        self.device_drivers.write(|drivers| {
-            drivers[0] = Some(PL011_UART.assume_init_ref());
-            drivers[1] = Some(GPIO.assume_init_ref());
-            drivers[2] = Some(INTERRUPT_CONTROLLER.assume_init_ref());
-        });
-    }
+/// This must be called only after successful init of the interrupt controller driver.
+unsafe fn post_init_interrupt_controller() -> Result<(), &'static str> {
+    generic_exception::asynchronous::register_irq_manager(INTERRUPT_CONTROLLER.assume_init_ref());
+
+    Ok(())
 }
 
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
+/// Function needs to ensure that driver registration happens only after correct instantiation.
+unsafe fn driver_uart() -> Result<(), &'static str> {
+    instantiate_uart()?;
+
+    let uart_descriptor = generic_driver::DeviceDriverDescriptor::new(
+        PL011_UART.assume_init_ref(),
+        Some(post_init_uart),
+        Some(exception::asynchronous::irq_map::PL011_UART),
+    );
+    generic_driver::driver_manager().register_driver(uart_descriptor);
+
+    Ok(())
+}
+
+/// Function needs to ensure that driver registration happens only after correct instantiation.
+unsafe fn driver_gpio() -> Result<(), &'static str> {
+    instantiate_gpio()?;
+
+    let gpio_descriptor = generic_driver::DeviceDriverDescriptor::new(
+        GPIO.assume_init_ref(),
+        Some(post_init_gpio),
+        None,
+    );
+    generic_driver::driver_manager().register_driver(gpio_descriptor);
 
-/// Return a reference to the driver manager.
-pub fn driver_manager() -> &'static impl driver::interface::DriverManager {
-    &BSP_DRIVER_MANAGER
+    Ok(())
 }
 
-//------------------------------------------------------------------------------
-// OS Interface Code
-//------------------------------------------------------------------------------
-use driver::interface::DeviceDriver;
+/// Function needs to ensure that driver registration happens only after correct instantiation.
+unsafe fn driver_interrupt_controller() -> Result<(), &'static str> {
+    instantiate_interrupt_controller()?;
 
-impl driver::interface::DriverManager for BSPDriverManager {
-    unsafe fn instantiate_drivers(&self) -> Result<(), &'static str> {
-        if self.init_done.load(Ordering::Relaxed) {
-            return Err("Drivers already instantiated");
-        }
+    let interrupt_controller_descriptor = generic_driver::DeviceDriverDescriptor::new(
+        INTERRUPT_CONTROLLER.assume_init_ref(),
+        Some(post_init_interrupt_controller),
+        None,
+    );
+    generic_driver::driver_manager().register_driver(interrupt_controller_descriptor);
 
-        self.instantiate_uart()?;
-        self.instantiate_gpio()?;
-        self.instantiate_interrupt_controller()?;
+    Ok(())
+}
 
-        self.register_drivers();
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
 
-        self.init_done.store(true, Ordering::Relaxed);
-        Ok(())
+/// Initialize the driver subsystem.
+///
+/// # Safety
+///
+/// See child function calls.
+pub unsafe fn init() -> Result<(), &'static str> {
+    static INIT_DONE: AtomicBool = AtomicBool::new(false);
+    if INIT_DONE.load(Ordering::Relaxed) {
+        return Err("Init already done");
     }
 
-    fn all_device_drivers(&self) -> [&(dyn DeviceDriver + Sync); NUM_DRIVERS] {
-        self.device_drivers
-            .read(|drivers| drivers.map(|drivers| drivers.unwrap()))
-    }
+    driver_uart()?;
+    driver_gpio()?;
+    driver_interrupt_controller()?;
 
-    #[cfg(feature = "test_build")]
-    fn qemu_bring_up_console(&self) {
-        use crate::cpu;
+    INIT_DONE.store(true, Ordering::Relaxed);
+    Ok(())
+}
 
-        unsafe {
-            self.instantiate_uart()
-                .unwrap_or_else(|_| cpu::qemu_exit_failure());
-            console::register_console(PL011_UART.assume_init_ref());
-        };
-    }
+/// Minimal code needed to bring up the console in QEMU (for testing only). This is often less steps
+/// than on real hardware due to QEMU's abstractions.
+#[cfg(feature = "test_build")]
+pub fn qemu_bring_up_console() {
+    use crate::cpu;
+
+    unsafe {
+        instantiate_uart().unwrap_or_else(|_| cpu::qemu_exit_failure());
+        console::register_console(PL011_UART.assume_init_ref());
+    };
 }
diff --git a/17_kernel_symbols/kernel/src/bsp/raspberrypi/exception/asynchronous.rs b/17_kernel_symbols/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
index ab20d86d3..06a675588 100644
--- a/17_kernel_symbols/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
+++ b/17_kernel_symbols/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
@@ -10,6 +10,9 @@ use crate::bsp;
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
+/// Export for reuse in generic asynchronous.rs.
+pub use bsp::device_driver::IRQNumber;
+
 #[cfg(feature = "bsp_rpi3")]
 pub(in crate::bsp) mod irq_map {
     use super::bsp::device_driver::{IRQNumber, PeripheralIRQ};
diff --git a/17_kernel_symbols/kernel/src/driver.rs b/17_kernel_symbols/kernel/src/driver.rs
index 98197fef3..18066c313 100644
--- a/17_kernel_symbols/kernel/src/driver.rs
+++ b/17_kernel_symbols/kernel/src/driver.rs
@@ -4,16 +4,37 @@
 
 //! Driver support.
 
+use crate::{
+    exception, info,
+    synchronization::{interface::ReadWriteEx, InitStateLock},
+};
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+const NUM_DRIVERS: usize = 5;
+
+struct DriverManagerInner<T>
+where
+    T: 'static,
+{
+    next_index: usize,
+    descriptors: [Option<DeviceDriverDescriptor<T>>; NUM_DRIVERS],
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
 /// Driver interfaces.
 pub mod interface {
-    use crate::bsp;
-
     /// Device Driver functions.
     pub trait DeviceDriver {
+        /// Different interrupt controllers might use different types for IRQ number.
+        type IRQNumberType: super::fmt::Display;
+
         /// Return a compatibility string for identifying the driver.
         fn compatible(&self) -> &'static str;
 
@@ -26,32 +47,175 @@ pub mod interface {
             Ok(())
         }
 
-        /// Called by the kernel to register and enable the device's IRQ handlers, if any.
+        /// Called by the kernel to register and enable the device's IRQ handler.
         ///
         /// Rust's type system will prevent a call to this function unless the calling instance
         /// itself has static lifetime.
-        fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
-            Ok(())
+        fn register_and_enable_irq_handler(
+            &'static self,
+            irq_number: &Self::IRQNumberType,
+        ) -> Result<(), &'static str> {
+            panic!(
+                "Attempt to enable IRQ {} for device {}, but driver does not support this",
+                irq_number,
+                self.compatible()
+            )
+        }
+    }
+}
+
+/// Tpye to be used as an optional callback after a driver's init() has run.
+pub type DeviceDriverPostInitCallback = unsafe fn() -> Result<(), &'static str>;
+
+/// A descriptor for device drivers.
+#[derive(Copy, Clone)]
+pub struct DeviceDriverDescriptor<T>
+where
+    T: 'static,
+{
+    device_driver: &'static (dyn interface::DeviceDriver<IRQNumberType = T> + Sync),
+    post_init_callback: Option<DeviceDriverPostInitCallback>,
+    irq_number: Option<T>,
+}
+
+/// Provides device driver management functions.
+pub struct DriverManager<T>
+where
+    T: 'static,
+{
+    inner: InitStateLock<DriverManagerInner<T>>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static DRIVER_MANAGER: DriverManager<exception::asynchronous::IRQNumber> = DriverManager::new();
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl<T> DriverManagerInner<T>
+where
+    T: 'static + Copy,
+{
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self {
+            next_index: 0,
+            descriptors: [None; NUM_DRIVERS],
         }
     }
+}
 
-    /// Device driver management functions.
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl<T> DeviceDriverDescriptor<T> {
+    /// Create an instance.
+    pub fn new(
+        device_driver: &'static (dyn interface::DeviceDriver<IRQNumberType = T> + Sync),
+        post_init_callback: Option<DeviceDriverPostInitCallback>,
+        irq_number: Option<T>,
+    ) -> Self {
+        Self {
+            device_driver,
+            post_init_callback,
+            irq_number,
+        }
+    }
+}
+
+/// Return a reference to the global DriverManager.
+pub fn driver_manager() -> &'static DriverManager<exception::asynchronous::IRQNumber> {
+    &DRIVER_MANAGER
+}
+
+impl<T> DriverManager<T>
+where
+    T: fmt::Display + Copy,
+{
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self {
+            inner: InitStateLock::new(DriverManagerInner::new()),
+        }
+    }
+
+    /// Register a device driver with the kernel.
+    pub fn register_driver(&self, descriptor: DeviceDriverDescriptor<T>) {
+        self.inner.write(|inner| {
+            inner.descriptors[inner.next_index] = Some(descriptor);
+            inner.next_index += 1;
+        })
+    }
+
+    /// Helper for iterating over registered drivers.
+    fn for_each_descriptor<'a>(&'a self, f: impl FnMut(&'a DeviceDriverDescriptor<T>)) {
+        self.inner.read(|inner| {
+            inner
+                .descriptors
+                .iter()
+                .filter_map(|x| x.as_ref())
+                .for_each(f)
+        })
+    }
+
+    /// Fully initialize all drivers and their interrupts handlers.
     ///
-    /// The `BSP` is supposed to supply one global instance.
-    pub trait DriverManager {
-        /// Instantiate all drivers.
-        ///
-        /// # Safety
-        ///
-        /// Must be called before `all_device_drivers`.
-        unsafe fn instantiate_drivers(&self) -> Result<(), &'static str>;
+    /// # Safety
+    ///
+    /// - During init, drivers might do stuff with system-wide impact.
+    pub unsafe fn init_drivers_and_irqs(&self) {
+        self.for_each_descriptor(|descriptor| {
+            // 1. Initialize driver.
+            if let Err(x) = descriptor.device_driver.init() {
+                panic!(
+                    "Error initializing driver: {}: {}",
+                    descriptor.device_driver.compatible(),
+                    x
+                );
+            }
+
+            // 2. Call corresponding post init callback.
+            if let Some(callback) = &descriptor.post_init_callback {
+                if let Err(x) = callback() {
+                    panic!(
+                        "Error during driver post-init callback: {}: {}",
+                        descriptor.device_driver.compatible(),
+                        x
+                    );
+                }
+            }
+        });
+
+        // 3. After all post-init callbacks were done, the interrupt controller should be
+        //    registered and functional. So let drivers register with it now.
+        self.for_each_descriptor(|descriptor| {
+            if let Some(irq_number) = &descriptor.irq_number {
+                if let Err(x) = descriptor
+                    .device_driver
+                    .register_and_enable_irq_handler(irq_number)
+                {
+                    panic!(
+                        "Error during driver interrupt handler registration: {}: {}",
+                        descriptor.device_driver.compatible(),
+                        x
+                    );
+                }
+            }
+        });
+    }
 
-        /// Return a slice of references to all `BSP`-instantiated drivers.
-        fn all_device_drivers(&self) -> [&(dyn DeviceDriver + Sync); bsp::driver::NUM_DRIVERS];
+    /// Enumerate all registered device drivers.
+    pub fn enumerate(&self) {
+        let mut i: usize = 1;
+        self.for_each_descriptor(|descriptor| {
+            info!("      {}. {}", i, descriptor.device_driver.compatible());
 
-        /// Minimal code needed to bring up the console in QEMU (for testing only). This is often
-        /// less steps than on real hardware due to QEMU's abstractions.
-        #[cfg(feature = "test_build")]
-        fn qemu_bring_up_console(&self);
+            i += 1;
+        });
     }
 }
diff --git a/17_kernel_symbols/kernel/src/exception/asynchronous.rs b/17_kernel_symbols/kernel/src/exception/asynchronous.rs
index 83ca1aa6d..c1f2a27b3 100644
--- a/17_kernel_symbols/kernel/src/exception/asynchronous.rs
+++ b/17_kernel_symbols/kernel/src/exception/asynchronous.rs
@@ -10,7 +10,7 @@ mod arch_asynchronous;
 mod null_irq_manager;
 
 use crate::{bsp, synchronization};
-use core::{fmt, marker::PhantomData};
+use core::marker::PhantomData;
 
 //--------------------------------------------------------------------------------------------------
 // Architectural Public Reexports
@@ -24,14 +24,23 @@ pub use arch_asynchronous::{
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
+/// Interrupt number as defined by the BSP.
+pub type IRQNumber = bsp::exception::asynchronous::IRQNumber;
+
 /// Interrupt descriptor.
 #[derive(Copy, Clone)]
-pub struct IRQDescriptor {
+pub struct IRQHandlerDescriptor<T>
+where
+    T: Copy,
+{
+    /// The IRQ number.
+    number: T,
+
     /// Descriptive name.
-    pub name: &'static str,
+    name: &'static str,
 
     /// Reference to handler trait object.
-    pub handler: &'static (dyn interface::IRQHandler + Sync),
+    handler: &'static (dyn interface::IRQHandler + Sync),
 }
 
 /// IRQContext token.
@@ -61,17 +70,16 @@ pub mod interface {
     /// platform's interrupt controller.
     pub trait IRQManager {
         /// The IRQ number type depends on the implementation.
-        type IRQNumberType;
+        type IRQNumberType: Copy;
 
         /// Register a handler.
         fn register_handler(
             &self,
-            irq_number: Self::IRQNumberType,
-            descriptor: super::IRQDescriptor,
+            irq_handler_descriptor: super::IRQHandlerDescriptor<Self::IRQNumberType>,
         ) -> Result<(), &'static str>;
 
         /// Enable an interrupt in the controller.
-        fn enable(&self, irq_number: Self::IRQNumberType);
+        fn enable(&self, irq_number: &Self::IRQNumberType);
 
         /// Handle pending interrupts.
         ///
@@ -91,16 +99,12 @@ pub mod interface {
     }
 }
 
-/// A wrapper type for IRQ numbers with integrated range sanity check.
-#[derive(Copy, Clone)]
-pub struct IRQNumber<const MAX_INCLUSIVE: usize>(usize);
-
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
 static CUR_IRQ_MANAGER: InitStateLock<
-    &'static (dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber> + Sync),
+    &'static (dyn interface::IRQManager<IRQNumberType = IRQNumber> + Sync),
 > = InitStateLock::new(&null_irq_manager::NULL_IRQ_MANAGER);
 
 //--------------------------------------------------------------------------------------------------
@@ -108,6 +112,39 @@ static CUR_IRQ_MANAGER: InitStateLock<
 //--------------------------------------------------------------------------------------------------
 use synchronization::{interface::ReadWriteEx, InitStateLock};
 
+impl<T> IRQHandlerDescriptor<T>
+where
+    T: Copy,
+{
+    /// Create an instance.
+    pub const fn new(
+        number: T,
+        name: &'static str,
+        handler: &'static (dyn interface::IRQHandler + Sync),
+    ) -> Self {
+        Self {
+            number,
+            name,
+            handler,
+        }
+    }
+
+    /// Return the number.
+    pub const fn number(&self) -> T {
+        self.number
+    }
+
+    /// Return the name.
+    pub const fn name(&self) -> &'static str {
+        self.name
+    }
+
+    /// Return the handler.
+    pub const fn handler(&self) -> &'static (dyn interface::IRQHandler + Sync) {
+        self.handler
+    }
+}
+
 impl<'irq_context> IRQContext<'irq_context> {
     /// Creates an IRQContext token.
     ///
@@ -125,29 +162,6 @@ impl<'irq_context> IRQContext<'irq_context> {
     }
 }
 
-impl<const MAX_INCLUSIVE: usize> IRQNumber<{ MAX_INCLUSIVE }> {
-    /// The total number of IRQs this type supports.
-    pub const NUM_TOTAL: usize = MAX_INCLUSIVE + 1;
-
-    /// Creates a new instance if number <= MAX_INCLUSIVE.
-    pub const fn new(number: usize) -> Self {
-        assert!(number <= MAX_INCLUSIVE);
-
-        Self(number)
-    }
-
-    /// Return the wrapped number.
-    pub const fn get(self) -> usize {
-        self.0
-    }
-}
-
-impl<const MAX_INCLUSIVE: usize> fmt::Display for IRQNumber<{ MAX_INCLUSIVE }> {
-    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
-        write!(f, "{}", self.0)
-    }
-}
-
 /// Executes the provided closure while IRQs are masked on the executing core.
 ///
 /// While the function temporarily changes the HW state of the executing core, it restores it to the
@@ -163,8 +177,7 @@ pub fn exec_with_irq_masked<T>(f: impl FnOnce() -> T) -> T {
 
 /// Register a new IRQ manager.
 pub fn register_irq_manager(
-    new_manager: &'static (dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber>
-                  + Sync),
+    new_manager: &'static (dyn interface::IRQManager<IRQNumberType = IRQNumber> + Sync),
 ) {
     CUR_IRQ_MANAGER.write(|manager| *manager = new_manager);
 }
@@ -172,6 +185,6 @@ pub fn register_irq_manager(
 /// Return a reference to the currently registered IRQ manager.
 ///
 /// This is the IRQ manager used by the architectural interrupt handling code.
-pub fn irq_manager() -> &'static dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber> {
+pub fn irq_manager() -> &'static dyn interface::IRQManager<IRQNumberType = IRQNumber> {
     CUR_IRQ_MANAGER.read(|manager| *manager)
 }
diff --git a/17_kernel_symbols/kernel/src/exception/asynchronous/null_irq_manager.rs b/17_kernel_symbols/kernel/src/exception/asynchronous/null_irq_manager.rs
index 560e3ce4b..438f96496 100644
--- a/17_kernel_symbols/kernel/src/exception/asynchronous/null_irq_manager.rs
+++ b/17_kernel_symbols/kernel/src/exception/asynchronous/null_irq_manager.rs
@@ -4,8 +4,7 @@
 
 //! Null IRQ Manager.
 
-use super::{interface, IRQContext, IRQDescriptor};
-use crate::bsp;
+use super::{interface, IRQContext, IRQHandlerDescriptor};
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -24,17 +23,16 @@ pub static NULL_IRQ_MANAGER: NullIRQManager = NullIRQManager {};
 //--------------------------------------------------------------------------------------------------
 
 impl interface::IRQManager for NullIRQManager {
-    type IRQNumberType = bsp::driver::IRQNumber;
+    type IRQNumberType = super::IRQNumber;
 
     fn register_handler(
         &self,
-        _irq_number: Self::IRQNumberType,
-        _descriptor: IRQDescriptor,
+        _descriptor: IRQHandlerDescriptor<Self::IRQNumberType>,
     ) -> Result<(), &'static str> {
         panic!("No IRQ Manager registered yet");
     }
 
-    fn enable(&self, _irq_number: Self::IRQNumberType) {
+    fn enable(&self, _irq_number: &Self::IRQNumberType) {
         panic!("No IRQ Manager registered yet");
     }
 
diff --git a/17_kernel_symbols/kernel/src/lib.rs b/17_kernel_symbols/kernel/src/lib.rs
index 975bad2ed..225727098 100644
--- a/17_kernel_symbols/kernel/src/lib.rs
+++ b/17_kernel_symbols/kernel/src/lib.rs
@@ -182,11 +182,9 @@ pub fn test_runner(tests: &[&test_types::UnitTest]) {
 #[cfg(test)]
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
     memory::init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     test_main();
 
diff --git a/17_kernel_symbols/kernel/src/main.rs b/17_kernel_symbols/kernel/src/main.rs
index 9aeb44386..659052588 100644
--- a/17_kernel_symbols/kernel/src/main.rs
+++ b/17_kernel_symbols/kernel/src/main.rs
@@ -13,7 +13,7 @@
 #![no_main]
 #![no_std]
 
-use libkernel::{bsp, cpu, driver, exception, info, memory, state, time, warn};
+use libkernel::{bsp, cpu, driver, exception, info, memory, state, time};
 
 /// Early init code.
 ///
@@ -25,27 +25,16 @@ use libkernel::{bsp, cpu, driver, exception, info, memory, state, time, warn};
 /// - Printing will not work until the respective driver's MMIO is remapped.
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
     memory::init();
 
-    // Instantiate and init all device drivers.
-    if let Err(x) = bsp::driver::driver_manager().instantiate_drivers() {
-        panic!("Error instantiating drivers: {}", x);
-    }
-    for i in bsp::driver::driver_manager().all_device_drivers().iter() {
-        if let Err(x) = i.init() {
-            panic!("Error loading driver: {}: {}", i.compatible(), x);
-        }
+    // Initialize the BSP driver subsystem.
+    if let Err(x) = bsp::driver::init() {
+        panic!("Error initializing BSP driver subsystem: {}", x);
     }
 
-    // Let device drivers register and enable their handlers with the interrupt controller.
-    for i in bsp::driver::driver_manager().all_device_drivers() {
-        if let Err(msg) = i.register_and_enable_irq_handler() {
-            warn!("Error registering IRQ handler: {}", msg);
-        }
-    }
+    // Initialize all device drivers.
+    driver::driver_manager().init_drivers_and_irqs();
 
     bsp::memory::mmu::kernel_add_mapping_records_for_precomputed();
 
@@ -61,8 +50,6 @@ unsafe fn kernel_init() -> ! {
 
 /// The main function running after the early init.
 fn kernel_main() -> ! {
-    use driver::interface::DriverManager;
-
     info!("{}", libkernel::version());
     info!("Booting on: {}", bsp::board_name());
 
@@ -81,13 +68,7 @@ fn kernel_main() -> ! {
     );
 
     info!("Drivers loaded:");
-    for (i, driver) in bsp::driver::driver_manager()
-        .all_device_drivers()
-        .iter()
-        .enumerate()
-    {
-        info!("      {}. {}", i + 1, driver.compatible());
-    }
+    driver::driver_manager().enumerate();
 
     info!("Registered IRQ handlers:");
     exception::asynchronous::irq_manager().print_handler();
diff --git a/17_kernel_symbols/kernel/tests/00_console_sanity.rs b/17_kernel_symbols/kernel/tests/00_console_sanity.rs
index 305510cea..2c0225b7a 100644
--- a/17_kernel_symbols/kernel/tests/00_console_sanity.rs
+++ b/17_kernel_symbols/kernel/tests/00_console_sanity.rs
@@ -11,16 +11,15 @@
 /// Console tests should time out on the I/O harness in case of panic.
 mod panic_wait_forever;
 
-use libkernel::{bsp, console, cpu, driver, exception, memory, print};
+use libkernel::{bsp, console, cpu, exception, memory, print};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
     use console::console;
-    use driver::interface::DriverManager;
 
     exception::handling_init();
     memory::init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     // Handshake
     assert_eq!(console().read_char(), 'A');
diff --git a/17_kernel_symbols/kernel/tests/01_timer_sanity.rs b/17_kernel_symbols/kernel/tests/01_timer_sanity.rs
index 398993324..8188b9424 100644
--- a/17_kernel_symbols/kernel/tests/01_timer_sanity.rs
+++ b/17_kernel_symbols/kernel/tests/01_timer_sanity.rs
@@ -11,16 +11,14 @@
 #![test_runner(libkernel::test_runner)]
 
 use core::time::Duration;
-use libkernel::{bsp, cpu, driver, exception, memory, time};
+use libkernel::{bsp, cpu, exception, memory, time};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
     memory::init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
 
diff --git a/17_kernel_symbols/kernel/tests/02_exception_sync_page_fault.rs b/17_kernel_symbols/kernel/tests/02_exception_sync_page_fault.rs
index a6d15b697..fab44c8f0 100644
--- a/17_kernel_symbols/kernel/tests/02_exception_sync_page_fault.rs
+++ b/17_kernel_symbols/kernel/tests/02_exception_sync_page_fault.rs
@@ -17,15 +17,13 @@
 /// or indirectly.
 mod panic_exit_success;
 
-use libkernel::{bsp, cpu, driver, exception, info, memory, println};
+use libkernel::{bsp, cpu, exception, info, memory, println};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
     memory::init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     // This line will be printed as the test header.
     println!("Testing synchronous exception handling by causing a page fault");
diff --git a/17_kernel_symbols/kernel/tests/03_exception_restore_sanity.rs b/17_kernel_symbols/kernel/tests/03_exception_restore_sanity.rs
index 47dd27149..f176c6a67 100644
--- a/17_kernel_symbols/kernel/tests/03_exception_restore_sanity.rs
+++ b/17_kernel_symbols/kernel/tests/03_exception_restore_sanity.rs
@@ -12,7 +12,7 @@
 mod panic_wait_forever;
 
 use core::arch::asm;
-use libkernel::{bsp, cpu, driver, exception, info, memory, println};
+use libkernel::{bsp, cpu, exception, info, memory, println};
 
 #[inline(never)]
 fn nested_system_call() {
@@ -30,11 +30,9 @@ fn nested_system_call() {
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
     memory::init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     // This line will be printed as the test header.
     println!("Testing exception restore");
diff --git a/17_kernel_symbols/kernel/tests/04_exception_irq_sanity.rs b/17_kernel_symbols/kernel/tests/04_exception_irq_sanity.rs
index e93a4caf6..e6f94c91f 100644
--- a/17_kernel_symbols/kernel/tests/04_exception_irq_sanity.rs
+++ b/17_kernel_symbols/kernel/tests/04_exception_irq_sanity.rs
@@ -10,15 +10,13 @@
 #![reexport_test_harness_main = "test_main"]
 #![test_runner(libkernel::test_runner)]
 
-use libkernel::{bsp, cpu, driver, exception, memory};
+use libkernel::{bsp, cpu, exception, memory};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     memory::init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     exception::handling_init();
     exception::asynchronous::local_irq_unmask();
diff --git a/18_backtrace/Makefile b/18_backtrace/Makefile
index 1dda95a4f..789ed5cde 100644
--- a/18_backtrace/Makefile
+++ b/18_backtrace/Makefile
@@ -336,7 +336,7 @@ test_boot: $(KERNEL_BIN)
 ## Helpers for unit and integration test targets
 ##------------------------------------------------------------------------------
 define KERNEL_TEST_RUNNER
-    #!/usr/bin/env bash
+#!/usr/bin/env bash
 
     # The cargo test runner seems to change into the crate under test's directory. Therefore, ensure
     # this script executes from the root.
diff --git a/18_backtrace/README.md b/18_backtrace/README.md
index 77222e3af..021b84357 100644
--- a/18_backtrace/README.md
+++ b/18_backtrace/README.md
@@ -989,6 +989,19 @@ diff -uNr 17_kernel_symbols/kernel/src/panic_wait.rs 18_backtrace/kernel/src/pan
 
      _panic_exit()
 
+diff -uNr 17_kernel_symbols/kernel/src/state.rs 18_backtrace/kernel/src/state.rs
+--- 17_kernel_symbols/kernel/src/state.rs
++++ 18_backtrace/kernel/src/state.rs
+@@ -52,7 +52,7 @@
+     const SINGLE_CORE_MAIN: u8 = 1;
+     const MULTI_CORE_MAIN: u8 = 2;
+
+-    /// Create a new instance.
++    /// Create an instance.
+     pub const fn new() -> Self {
+         Self(AtomicU8::new(Self::INIT))
+     }
+
 diff -uNr 17_kernel_symbols/kernel/tests/05_backtrace_sanity.rb 18_backtrace/kernel/tests/05_backtrace_sanity.rb
 --- 17_kernel_symbols/kernel/tests/05_backtrace_sanity.rb
 +++ 18_backtrace/kernel/tests/05_backtrace_sanity.rb
@@ -1036,7 +1049,7 @@ diff -uNr 17_kernel_symbols/kernel/tests/05_backtrace_sanity.rb 18_backtrace/ker
 diff -uNr 17_kernel_symbols/kernel/tests/05_backtrace_sanity.rs 18_backtrace/kernel/tests/05_backtrace_sanity.rs
 --- 17_kernel_symbols/kernel/tests/05_backtrace_sanity.rs
 +++ 18_backtrace/kernel/tests/05_backtrace_sanity.rs
-@@ -0,0 +1,33 @@
+@@ -0,0 +1,31 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
@@ -1050,7 +1063,7 @@ diff -uNr 17_kernel_symbols/kernel/tests/05_backtrace_sanity.rs 18_backtrace/ker
 +/// Console tests should time out on the I/O harness in case of panic.
 +mod panic_wait_forever;
 +
-+use libkernel::{bsp, cpu, driver, exception, memory};
++use libkernel::{bsp, cpu, exception, memory};
 +
 +#[inline(never)]
 +fn nested() {
@@ -1059,11 +1072,9 @@ diff -uNr 17_kernel_symbols/kernel/tests/05_backtrace_sanity.rs 18_backtrace/ker
 +
 +#[no_mangle]
 +unsafe fn kernel_init() -> ! {
-+    use driver::interface::DriverManager;
-+
 +    exception::handling_init();
 +    memory::init();
-+    bsp::driver::driver_manager().qemu_bring_up_console();
++    bsp::driver::qemu_bring_up_console();
 +
 +    nested();
 +
@@ -1105,7 +1116,7 @@ diff -uNr 17_kernel_symbols/kernel/tests/06_backtrace_invalid_frame.rb 18_backtr
 diff -uNr 17_kernel_symbols/kernel/tests/06_backtrace_invalid_frame.rs 18_backtrace/kernel/tests/06_backtrace_invalid_frame.rs
 --- 17_kernel_symbols/kernel/tests/06_backtrace_invalid_frame.rs
 +++ 18_backtrace/kernel/tests/06_backtrace_invalid_frame.rs
-@@ -0,0 +1,35 @@
+@@ -0,0 +1,33 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
@@ -1119,7 +1130,7 @@ diff -uNr 17_kernel_symbols/kernel/tests/06_backtrace_invalid_frame.rs 18_backtr
 +/// Console tests should time out on the I/O harness in case of panic.
 +mod panic_wait_forever;
 +
-+use libkernel::{backtrace, bsp, cpu, driver, exception, memory};
++use libkernel::{backtrace, bsp, cpu, exception, memory};
 +
 +#[inline(never)]
 +fn nested() {
@@ -1130,11 +1141,9 @@ diff -uNr 17_kernel_symbols/kernel/tests/06_backtrace_invalid_frame.rs 18_backtr
 +
 +#[no_mangle]
 +unsafe fn kernel_init() -> ! {
-+    use driver::interface::DriverManager;
-+
 +    exception::handling_init();
 +    memory::init();
-+    bsp::driver::driver_manager().qemu_bring_up_console();
++    bsp::driver::qemu_bring_up_console();
 +
 +    nested();
 +
@@ -1175,7 +1184,7 @@ diff -uNr 17_kernel_symbols/kernel/tests/07_backtrace_invalid_link.rb 18_backtra
 diff -uNr 17_kernel_symbols/kernel/tests/07_backtrace_invalid_link.rs 18_backtrace/kernel/tests/07_backtrace_invalid_link.rs
 --- 17_kernel_symbols/kernel/tests/07_backtrace_invalid_link.rs
 +++ 18_backtrace/kernel/tests/07_backtrace_invalid_link.rs
-@@ -0,0 +1,40 @@
+@@ -0,0 +1,38 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
@@ -1189,7 +1198,7 @@ diff -uNr 17_kernel_symbols/kernel/tests/07_backtrace_invalid_link.rs 18_backtra
 +/// Console tests should time out on the I/O harness in case of panic.
 +mod panic_wait_forever;
 +
-+use libkernel::{backtrace, bsp, cpu, driver, exception, memory};
++use libkernel::{backtrace, bsp, cpu, exception, memory};
 +
 +#[inline(never)]
 +fn nested_2() -> &'static str {
@@ -1205,11 +1214,9 @@ diff -uNr 17_kernel_symbols/kernel/tests/07_backtrace_invalid_link.rs 18_backtra
 +
 +#[no_mangle]
 +unsafe fn kernel_init() -> ! {
-+    use driver::interface::DriverManager;
-+
 +    exception::handling_init();
 +    memory::init();
-+    bsp::driver::driver_manager().qemu_bring_up_console();
++    bsp::driver::qemu_bring_up_console();
 +
 +    nested_1();
 +
diff --git a/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2.rs b/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2.rs
index ec65f1b2a..3cc35b5ee 100644
--- a/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2.rs
+++ b/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2.rs
@@ -80,7 +80,8 @@ mod gicc;
 mod gicd;
 
 use crate::{
-    bsp, cpu, driver, exception,
+    bsp::{self, device_driver::common::BoundedUsize},
+    cpu, driver, exception,
     memory::{Address, Virtual},
     synchronization,
     synchronization::InitStateLock,
@@ -90,14 +91,15 @@ use crate::{
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
-type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; IRQNumber::NUM_TOTAL];
+type HandlerTable = [Option<exception::asynchronous::IRQHandlerDescriptor<IRQNumber>>;
+    IRQNumber::MAX_INCLUSIVE + 1];
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
 /// Used for the associated type of trait [`exception::asynchronous::interface::IRQManager`].
-pub type IRQNumber = exception::asynchronous::IRQNumber<{ GICv2::MAX_IRQ_NUMBER }>;
+pub type IRQNumber = BoundedUsize<{ GICv2::MAX_IRQ_NUMBER }>;
 
 /// Representation of the GIC.
 pub struct GICv2 {
@@ -109,9 +111,6 @@ pub struct GICv2 {
 
     /// Stores registered IRQ handlers. Writable only during kernel init. RO afterwards.
     handler_table: InitStateLock<HandlerTable>,
-
-    /// Callback to be invoked after successful init.
-    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -131,13 +130,11 @@ impl GICv2 {
     pub const unsafe fn new(
         gicd_mmio_start_addr: Address<Virtual>,
         gicc_mmio_start_addr: Address<Virtual>,
-        post_init_callback: fn(),
     ) -> Self {
         Self {
             gicd: gicd::GICD::new(gicd_mmio_start_addr),
             gicc: gicc::GICC::new(gicc_mmio_start_addr),
-            handler_table: InitStateLock::new([None; IRQNumber::NUM_TOTAL]),
-            post_init_callback,
+            handler_table: InitStateLock::new([None; IRQNumber::MAX_INCLUSIVE + 1]),
         }
     }
 }
@@ -148,6 +145,8 @@ impl GICv2 {
 use synchronization::interface::ReadWriteEx;
 
 impl driver::interface::DeviceDriver for GICv2 {
+    type IRQNumberType = IRQNumber;
+
     fn compatible(&self) -> &'static str {
         Self::COMPATIBLE
     }
@@ -160,8 +159,6 @@ impl driver::interface::DeviceDriver for GICv2 {
         self.gicc.priority_accept_all();
         self.gicc.enable();
 
-        (self.post_init_callback)();
-
         Ok(())
     }
 }
@@ -171,23 +168,22 @@ impl exception::asynchronous::interface::IRQManager for GICv2 {
 
     fn register_handler(
         &self,
-        irq_number: Self::IRQNumberType,
-        descriptor: exception::asynchronous::IRQDescriptor,
+        irq_handler_descriptor: exception::asynchronous::IRQHandlerDescriptor<Self::IRQNumberType>,
     ) -> Result<(), &'static str> {
         self.handler_table.write(|table| {
-            let irq_number = irq_number.get();
+            let irq_number = irq_handler_descriptor.number().get();
 
             if table[irq_number].is_some() {
                 return Err("IRQ handler already registered");
             }
 
-            table[irq_number] = Some(descriptor);
+            table[irq_number] = Some(irq_handler_descriptor);
 
             Ok(())
         })
     }
 
-    fn enable(&self, irq_number: Self::IRQNumberType) {
+    fn enable(&self, irq_number: &Self::IRQNumberType) {
         self.gicd.enable(irq_number);
     }
 
@@ -210,7 +206,7 @@ impl exception::asynchronous::interface::IRQManager for GICv2 {
                 None => panic!("No handler registered for IRQ {}", irq_number),
                 Some(descriptor) => {
                     // Call the IRQ handler. Panics on failure.
-                    descriptor.handler.handle().expect("Error handling IRQ");
+                    descriptor.handler().handle().expect("Error handling IRQ");
                 }
             }
         });
@@ -227,7 +223,7 @@ impl exception::asynchronous::interface::IRQManager for GICv2 {
         self.handler_table.read(|table| {
             for (i, opt) in table.iter().skip(32).enumerate() {
                 if let Some(handler) = opt {
-                    info!("            {: >3}. {}", i + 32, handler.name);
+                    info!("            {: >3}. {}", i + 32, handler.name());
                 }
             }
         });
diff --git a/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs b/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
index a9c97a8e3..8aebcf2b6 100644
--- a/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
+++ b/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -172,7 +172,7 @@ impl GICD {
     }
 
     /// Enable an interrupt.
-    pub fn enable(&self, irq_num: super::IRQNumber) {
+    pub fn enable(&self, irq_num: &super::IRQNumber) {
         let irq_num = irq_num.get();
 
         // Each bit in the u32 enable register corresponds to one IRQ number. Shift right by 5
diff --git a/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 2281e66a3..fb61a6510 100644
--- a/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -7,6 +7,7 @@
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper,
     driver,
+    exception::asynchronous::IRQNumber,
     memory::{Address, Virtual},
     synchronization,
     synchronization::IRQSafeNullLock,
@@ -122,7 +123,6 @@ struct GPIOInner {
 /// Representation of the GPIO HW.
 pub struct GPIO {
     inner: IRQSafeNullLock<GPIOInner>,
-    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -202,10 +202,9 @@ impl GPIO {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    pub const unsafe fn new(mmio_start_addr: Address<Virtual>, post_init_callback: fn()) -> Self {
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
         Self {
             inner: IRQSafeNullLock::new(GPIOInner::new(mmio_start_addr)),
-            post_init_callback,
         }
     }
 
@@ -221,13 +220,9 @@ impl GPIO {
 use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for GPIO {
+    type IRQNumberType = IRQNumber;
+
     fn compatible(&self) -> &'static str {
         Self::COMPATIBLE
     }
-
-    unsafe fn init(&self) -> Result<(), &'static str> {
-        (self.post_init_callback)();
-
-        Ok(())
-    }
 }
diff --git a/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
index b4dd530da..c93a9fa1f 100644
--- a/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+++ b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -7,9 +7,12 @@
 mod peripheral_ic;
 
 use crate::{
-    driver, exception,
+    bsp::device_driver::common::BoundedUsize,
+    driver,
+    exception::{self, asynchronous::IRQHandlerDescriptor},
     memory::{Address, Virtual},
 };
+use core::fmt;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -24,10 +27,8 @@ struct PendingIRQs {
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
-pub type LocalIRQ =
-    exception::asynchronous::IRQNumber<{ InterruptController::MAX_LOCAL_IRQ_NUMBER }>;
-pub type PeripheralIRQ =
-    exception::asynchronous::IRQNumber<{ InterruptController::MAX_PERIPHERAL_IRQ_NUMBER }>;
+pub type LocalIRQ = BoundedUsize<{ InterruptController::MAX_LOCAL_IRQ_NUMBER }>;
+pub type PeripheralIRQ = BoundedUsize<{ InterruptController::MAX_PERIPHERAL_IRQ_NUMBER }>;
 
 /// Used for the associated type of trait [`exception::asynchronous::interface::IRQManager`].
 #[derive(Copy, Clone)]
@@ -40,7 +41,6 @@ pub enum IRQNumber {
 /// Representation of the Interrupt Controller.
 pub struct InterruptController {
     periph: peripheral_ic::PeripheralIC,
-    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -71,6 +71,15 @@ impl Iterator for PendingIRQs {
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
+impl fmt::Display for IRQNumber {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        match self {
+            Self::Local(number) => write!(f, "Local({})", number),
+            Self::Peripheral(number) => write!(f, "Peripheral({})", number),
+        }
+    }
+}
+
 impl InterruptController {
     // Restrict to 3 for now. This makes future code for local_ic.rs more straight forward.
     const MAX_LOCAL_IRQ_NUMBER: usize = 3;
@@ -83,13 +92,9 @@ impl InterruptController {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    pub const unsafe fn new(
-        periph_mmio_start_addr: Address<Virtual>,
-        post_init_callback: fn(),
-    ) -> Self {
+    pub const unsafe fn new(periph_mmio_start_addr: Address<Virtual>) -> Self {
         Self {
             periph: peripheral_ic::PeripheralIC::new(periph_mmio_start_addr),
-            post_init_callback,
         }
     }
 }
@@ -99,15 +104,11 @@ impl InterruptController {
 //------------------------------------------------------------------------------
 
 impl driver::interface::DeviceDriver for InterruptController {
+    type IRQNumberType = IRQNumber;
+
     fn compatible(&self) -> &'static str {
         Self::COMPATIBLE
     }
-
-    unsafe fn init(&self) -> Result<(), &'static str> {
-        (self.post_init_callback)();
-
-        Ok(())
-    }
 }
 
 impl exception::asynchronous::interface::IRQManager for InterruptController {
@@ -115,16 +116,23 @@ impl exception::asynchronous::interface::IRQManager for InterruptController {
 
     fn register_handler(
         &self,
-        irq: Self::IRQNumberType,
-        descriptor: exception::asynchronous::IRQDescriptor,
+        irq_handler_descriptor: exception::asynchronous::IRQHandlerDescriptor<Self::IRQNumberType>,
     ) -> Result<(), &'static str> {
-        match irq {
+        match irq_handler_descriptor.number() {
             IRQNumber::Local(_) => unimplemented!("Local IRQ controller not implemented."),
-            IRQNumber::Peripheral(pirq) => self.periph.register_handler(pirq, descriptor),
+            IRQNumber::Peripheral(pirq) => {
+                let periph_descriptor = IRQHandlerDescriptor::new(
+                    pirq,
+                    irq_handler_descriptor.name(),
+                    irq_handler_descriptor.handler(),
+                );
+
+                self.periph.register_handler(periph_descriptor)
+            }
         }
     }
 
-    fn enable(&self, irq: Self::IRQNumberType) {
+    fn enable(&self, irq: &Self::IRQNumberType) {
         match irq {
             IRQNumber::Local(_) => unimplemented!("Local IRQ controller not implemented."),
             IRQNumber::Peripheral(pirq) => self.periph.enable(pirq),
diff --git a/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index 06802d272..0a20bd874 100644
--- a/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -52,7 +52,8 @@ type WriteOnlyRegisters = MMIODerefWrapper<WORegisterBlock>;
 /// Abstraction for the ReadOnly parts of the associated MMIO registers.
 type ReadOnlyRegisters = MMIODerefWrapper<RORegisterBlock>;
 
-type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; PeripheralIRQ::NUM_TOTAL];
+type HandlerTable = [Option<exception::asynchronous::IRQHandlerDescriptor<PeripheralIRQ>>;
+    PeripheralIRQ::MAX_INCLUSIVE + 1];
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -84,7 +85,7 @@ impl PeripheralIC {
         Self {
             wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(mmio_start_addr)),
             ro_registers: ReadOnlyRegisters::new(mmio_start_addr),
-            handler_table: InitStateLock::new([None; PeripheralIRQ::NUM_TOTAL]),
+            handler_table: InitStateLock::new([None; PeripheralIRQ::MAX_INCLUSIVE + 1]),
         }
     }
 
@@ -107,23 +108,22 @@ impl exception::asynchronous::interface::IRQManager for PeripheralIC {
 
     fn register_handler(
         &self,
-        irq: Self::IRQNumberType,
-        descriptor: exception::asynchronous::IRQDescriptor,
+        irq_handler_descriptor: exception::asynchronous::IRQHandlerDescriptor<Self::IRQNumberType>,
     ) -> Result<(), &'static str> {
         self.handler_table.write(|table| {
-            let irq_number = irq.get();
+            let irq_number = irq_handler_descriptor.number().get();
 
             if table[irq_number].is_some() {
                 return Err("IRQ handler already registered");
             }
 
-            table[irq_number] = Some(descriptor);
+            table[irq_number] = Some(irq_handler_descriptor);
 
             Ok(())
         })
     }
 
-    fn enable(&self, irq: Self::IRQNumberType) {
+    fn enable(&self, irq: &Self::IRQNumberType) {
         self.wo_registers.lock(|regs| {
             let enable_reg = if irq.get() <= 31 {
                 &regs.ENABLE_1
@@ -149,7 +149,7 @@ impl exception::asynchronous::interface::IRQManager for PeripheralIC {
                     None => panic!("No handler registered for IRQ {}", irq_number),
                     Some(descriptor) => {
                         // Call the IRQ handler. Panics on failure.
-                        descriptor.handler.handle().expect("Error handling IRQ");
+                        descriptor.handler().handle().expect("Error handling IRQ");
                     }
                 }
             }
@@ -164,7 +164,7 @@ impl exception::asynchronous::interface::IRQManager for PeripheralIC {
         self.handler_table.read(|table| {
             for (i, opt) in table.iter().enumerate() {
                 if let Some(handler) = opt {
-                    info!("            {: >3}. {}", i, handler.name);
+                    info!("            {: >3}. {}", i, handler.name());
                 }
             }
         });
diff --git a/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index f67d70dfb..0ee7feb78 100644
--- a/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -10,9 +10,9 @@
 //! - <https://developer.arm.com/documentation/ddi0183/latest>
 
 use crate::{
-    bsp,
     bsp::device_driver::common::MMIODerefWrapper,
-    console, cpu, driver, exception,
+    console, cpu, driver,
+    exception::{self, asynchronous::IRQNumber},
     memory::{Address, Virtual},
     synchronization,
     synchronization::IRQSafeNullLock,
@@ -233,8 +233,6 @@ struct PL011UartInner {
 /// Representation of the UART.
 pub struct PL011Uart {
     inner: IRQSafeNullLock<PL011UartInner>,
-    irq_number: bsp::device_driver::IRQNumber,
-    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -398,16 +396,9 @@ impl PL011Uart {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    /// - The user must ensure to provide correct IRQ numbers.
-    pub const unsafe fn new(
-        mmio_start_addr: Address<Virtual>,
-        irq_number: bsp::device_driver::IRQNumber,
-        post_init_callback: fn(),
-    ) -> Self {
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
         Self {
             inner: IRQSafeNullLock::new(PL011UartInner::new(mmio_start_addr)),
-            irq_number,
-            post_init_callback,
         }
     }
 }
@@ -418,27 +409,28 @@ impl PL011Uart {
 use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for PL011Uart {
+    type IRQNumberType = IRQNumber;
+
     fn compatible(&self) -> &'static str {
         Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
         self.inner.lock(|inner| inner.init());
-        (self.post_init_callback)();
 
         Ok(())
     }
 
-    fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
-        use exception::asynchronous::{irq_manager, IRQDescriptor};
+    fn register_and_enable_irq_handler(
+        &'static self,
+        irq_number: &Self::IRQNumberType,
+    ) -> Result<(), &'static str> {
+        use exception::asynchronous::{irq_manager, IRQHandlerDescriptor};
 
-        let descriptor = IRQDescriptor {
-            name: Self::COMPATIBLE,
-            handler: self,
-        };
+        let descriptor = IRQHandlerDescriptor::new(*irq_number, Self::COMPATIBLE, self);
 
-        irq_manager().register_handler(self.irq_number, descriptor)?;
-        irq_manager().enable(self.irq_number);
+        irq_manager().register_handler(descriptor)?;
+        irq_manager().enable(irq_number);
 
         Ok(())
     }
diff --git a/18_backtrace/kernel/src/bsp/device_driver/common.rs b/18_backtrace/kernel/src/bsp/device_driver/common.rs
index 69f038d4d..ca7aeb76a 100644
--- a/18_backtrace/kernel/src/bsp/device_driver/common.rs
+++ b/18_backtrace/kernel/src/bsp/device_driver/common.rs
@@ -5,7 +5,7 @@
 //! Common device driver code.
 
 use crate::memory::{Address, Virtual};
-use core::{marker::PhantomData, ops};
+use core::{fmt, marker::PhantomData, ops};
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -16,6 +16,10 @@ pub struct MMIODerefWrapper<T> {
     phantom: PhantomData<fn() -> T>,
 }
 
+/// A wrapper type for usize with integrated range bound check.
+#[derive(Copy, Clone)]
+pub struct BoundedUsize<const MAX_INCLUSIVE: usize>(usize);
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -37,3 +41,25 @@ impl<T> ops::Deref for MMIODerefWrapper<T> {
         unsafe { &*(self.start_addr.as_usize() as *const _) }
     }
 }
+
+impl<const MAX_INCLUSIVE: usize> BoundedUsize<{ MAX_INCLUSIVE }> {
+    pub const MAX_INCLUSIVE: usize = MAX_INCLUSIVE;
+
+    /// Creates a new instance if number <= MAX_INCLUSIVE.
+    pub const fn new(number: usize) -> Self {
+        assert!(number <= MAX_INCLUSIVE);
+
+        Self(number)
+    }
+
+    /// Return the wrapped number.
+    pub const fn get(self) -> usize {
+        self.0
+    }
+}
+
+impl<const MAX_INCLUSIVE: usize> fmt::Display for BoundedUsize<{ MAX_INCLUSIVE }> {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        write!(f, "{}", self.0)
+    }
+}
diff --git a/18_backtrace/kernel/src/bsp/raspberrypi/driver.rs b/18_backtrace/kernel/src/bsp/raspberrypi/driver.rs
index e1db4a005..ca3435aae 100644
--- a/18_backtrace/kernel/src/bsp/raspberrypi/driver.rs
+++ b/18_backtrace/kernel/src/bsp/raspberrypi/driver.rs
@@ -7,34 +7,16 @@
 use super::{exception, memory::map::mmio};
 use crate::{
     bsp::device_driver,
-    console, driver, exception as generic_exception, memory,
+    console, driver as generic_driver,
+    exception::{self as generic_exception},
+    memory,
     memory::mmu::MMIODescriptor,
-    synchronization::{interface::ReadWriteEx, InitStateLock},
 };
 use core::{
     mem::MaybeUninit,
     sync::atomic::{AtomicBool, Ordering},
 };
 
-pub use device_driver::IRQNumber;
-
-//--------------------------------------------------------------------------------------------------
-// Private Definitions
-//--------------------------------------------------------------------------------------------------
-
-/// Device Driver Manager type.
-struct BSPDriverManager {
-    device_drivers: InitStateLock<[Option<&'static (dyn DeviceDriver + Sync)>; NUM_DRIVERS]>,
-    init_done: AtomicBool,
-}
-
-//--------------------------------------------------------------------------------------------------
-// Public Definitions
-//--------------------------------------------------------------------------------------------------
-
-/// The number of active drivers provided by this BSP.
-pub const NUM_DRIVERS: usize = 3;
-
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
@@ -49,150 +31,154 @@ static mut INTERRUPT_CONTROLLER: MaybeUninit<device_driver::InterruptController>
 #[cfg(feature = "bsp_rpi4")]
 static mut INTERRUPT_CONTROLLER: MaybeUninit<device_driver::GICv2> = MaybeUninit::uninit();
 
-static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
-    device_drivers: InitStateLock::new([None; NUM_DRIVERS]),
-    init_done: AtomicBool::new(false),
-};
-
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-impl BSPDriverManager {
-    unsafe fn instantiate_uart(&self) -> Result<(), &'static str> {
-        let mmio_descriptor = MMIODescriptor::new(mmio::PL011_UART_START, mmio::PL011_UART_SIZE);
-        let virt_addr =
-            memory::mmu::kernel_map_mmio(device_driver::PL011Uart::COMPATIBLE, &mmio_descriptor)?;
+/// This must be called only after successful init of the memory subsystem.
+unsafe fn instantiate_uart() -> Result<(), &'static str> {
+    let mmio_descriptor = MMIODescriptor::new(mmio::PL011_UART_START, mmio::PL011_UART_SIZE);
+    let virt_addr =
+        memory::mmu::kernel_map_mmio(device_driver::PL011Uart::COMPATIBLE, &mmio_descriptor)?;
 
-        // This is safe to do, because it is only called from the init'ed instance itself.
-        fn uart_post_init() {
-            console::register_console(unsafe { PL011_UART.assume_init_ref() });
-        }
+    PL011_UART.write(device_driver::PL011Uart::new(virt_addr));
 
-        PL011_UART.write(device_driver::PL011Uart::new(
-            virt_addr,
-            exception::asynchronous::irq_map::PL011_UART,
-            uart_post_init,
-        ));
+    Ok(())
+}
 
-        Ok(())
-    }
+/// This must be called only after successful init of the UART driver.
+unsafe fn post_init_uart() -> Result<(), &'static str> {
+    console::register_console(PL011_UART.assume_init_ref());
 
-    unsafe fn instantiate_gpio(&self) -> Result<(), &'static str> {
-        let mmio_descriptor = MMIODescriptor::new(mmio::GPIO_START, mmio::GPIO_SIZE);
-        let virt_addr =
-            memory::mmu::kernel_map_mmio(device_driver::GPIO::COMPATIBLE, &mmio_descriptor)?;
+    Ok(())
+}
 
-        // This is safe to do, because it is only called from the init'ed instance itself.
-        fn gpio_post_init() {
-            unsafe { GPIO.assume_init_ref().map_pl011_uart() };
-        }
+/// This must be called only after successful init of the memory subsystem.
+unsafe fn instantiate_gpio() -> Result<(), &'static str> {
+    let mmio_descriptor = MMIODescriptor::new(mmio::GPIO_START, mmio::GPIO_SIZE);
+    let virt_addr =
+        memory::mmu::kernel_map_mmio(device_driver::GPIO::COMPATIBLE, &mmio_descriptor)?;
 
-        GPIO.write(device_driver::GPIO::new(virt_addr, gpio_post_init));
+    GPIO.write(device_driver::GPIO::new(virt_addr));
 
-        Ok(())
-    }
+    Ok(())
+}
 
-    #[cfg(feature = "bsp_rpi3")]
-    unsafe fn instantiate_interrupt_controller(&self) -> Result<(), &'static str> {
-        let periph_mmio_descriptor =
-            MMIODescriptor::new(mmio::PERIPHERAL_IC_START, mmio::PERIPHERAL_IC_SIZE);
-        let periph_virt_addr = memory::mmu::kernel_map_mmio(
-            device_driver::InterruptController::COMPATIBLE,
-            &periph_mmio_descriptor,
-        )?;
-
-        // This is safe to do, because it is only called from the init'ed instance itself.
-        fn interrupt_controller_post_init() {
-            generic_exception::asynchronous::register_irq_manager(unsafe {
-                INTERRUPT_CONTROLLER.assume_init_ref()
-            });
-        }
-
-        INTERRUPT_CONTROLLER.write(device_driver::InterruptController::new(
-            periph_virt_addr,
-            interrupt_controller_post_init,
-        ));
-
-        Ok(())
-    }
+/// This must be called only after successful init of the GPIO driver.
+unsafe fn post_init_gpio() -> Result<(), &'static str> {
+    GPIO.assume_init_ref().map_pl011_uart();
+    Ok(())
+}
+
+/// This must be called only after successful init of the memory subsystem.
+#[cfg(feature = "bsp_rpi3")]
+unsafe fn instantiate_interrupt_controller() -> Result<(), &'static str> {
+    let periph_mmio_descriptor =
+        MMIODescriptor::new(mmio::PERIPHERAL_IC_START, mmio::PERIPHERAL_IC_SIZE);
+    let periph_virt_addr = memory::mmu::kernel_map_mmio(
+        device_driver::InterruptController::COMPATIBLE,
+        &periph_mmio_descriptor,
+    )?;
+
+    INTERRUPT_CONTROLLER.write(device_driver::InterruptController::new(periph_virt_addr));
 
-    #[cfg(feature = "bsp_rpi4")]
-    unsafe fn instantiate_interrupt_controller(&self) -> Result<(), &'static str> {
-        let gicd_mmio_descriptor = MMIODescriptor::new(mmio::GICD_START, mmio::GICD_SIZE);
-        let gicd_virt_addr = memory::mmu::kernel_map_mmio("GICv2 GICD", &gicd_mmio_descriptor)?;
+    Ok(())
+}
 
-        let gicc_mmio_descriptor = MMIODescriptor::new(mmio::GICC_START, mmio::GICC_SIZE);
-        let gicc_virt_addr = memory::mmu::kernel_map_mmio("GICV2 GICC", &gicc_mmio_descriptor)?;
+/// This must be called only after successful init of the memory subsystem.
+#[cfg(feature = "bsp_rpi4")]
+unsafe fn instantiate_interrupt_controller() -> Result<(), &'static str> {
+    let gicd_mmio_descriptor = MMIODescriptor::new(mmio::GICD_START, mmio::GICD_SIZE);
+    let gicd_virt_addr = memory::mmu::kernel_map_mmio("GICv2 GICD", &gicd_mmio_descriptor)?;
 
-        // This is safe to do, because it is only called from the init'ed instance itself.
-        fn interrupt_controller_post_init() {
-            generic_exception::asynchronous::register_irq_manager(unsafe {
-                INTERRUPT_CONTROLLER.assume_init_ref()
-            });
-        }
+    let gicc_mmio_descriptor = MMIODescriptor::new(mmio::GICC_START, mmio::GICC_SIZE);
+    let gicc_virt_addr = memory::mmu::kernel_map_mmio("GICV2 GICC", &gicc_mmio_descriptor)?;
 
-        INTERRUPT_CONTROLLER.write(device_driver::GICv2::new(
-            gicd_virt_addr,
-            gicc_virt_addr,
-            interrupt_controller_post_init,
-        ));
+    INTERRUPT_CONTROLLER.write(device_driver::GICv2::new(gicd_virt_addr, gicc_virt_addr));
 
-        Ok(())
-    }
+    Ok(())
+}
 
-    unsafe fn register_drivers(&self) {
-        self.device_drivers.write(|drivers| {
-            drivers[0] = Some(PL011_UART.assume_init_ref());
-            drivers[1] = Some(GPIO.assume_init_ref());
-            drivers[2] = Some(INTERRUPT_CONTROLLER.assume_init_ref());
-        });
-    }
+/// This must be called only after successful init of the interrupt controller driver.
+unsafe fn post_init_interrupt_controller() -> Result<(), &'static str> {
+    generic_exception::asynchronous::register_irq_manager(INTERRUPT_CONTROLLER.assume_init_ref());
+
+    Ok(())
 }
 
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
+/// Function needs to ensure that driver registration happens only after correct instantiation.
+unsafe fn driver_uart() -> Result<(), &'static str> {
+    instantiate_uart()?;
+
+    let uart_descriptor = generic_driver::DeviceDriverDescriptor::new(
+        PL011_UART.assume_init_ref(),
+        Some(post_init_uart),
+        Some(exception::asynchronous::irq_map::PL011_UART),
+    );
+    generic_driver::driver_manager().register_driver(uart_descriptor);
+
+    Ok(())
+}
+
+/// Function needs to ensure that driver registration happens only after correct instantiation.
+unsafe fn driver_gpio() -> Result<(), &'static str> {
+    instantiate_gpio()?;
+
+    let gpio_descriptor = generic_driver::DeviceDriverDescriptor::new(
+        GPIO.assume_init_ref(),
+        Some(post_init_gpio),
+        None,
+    );
+    generic_driver::driver_manager().register_driver(gpio_descriptor);
 
-/// Return a reference to the driver manager.
-pub fn driver_manager() -> &'static impl driver::interface::DriverManager {
-    &BSP_DRIVER_MANAGER
+    Ok(())
 }
 
-//------------------------------------------------------------------------------
-// OS Interface Code
-//------------------------------------------------------------------------------
-use driver::interface::DeviceDriver;
+/// Function needs to ensure that driver registration happens only after correct instantiation.
+unsafe fn driver_interrupt_controller() -> Result<(), &'static str> {
+    instantiate_interrupt_controller()?;
 
-impl driver::interface::DriverManager for BSPDriverManager {
-    unsafe fn instantiate_drivers(&self) -> Result<(), &'static str> {
-        if self.init_done.load(Ordering::Relaxed) {
-            return Err("Drivers already instantiated");
-        }
+    let interrupt_controller_descriptor = generic_driver::DeviceDriverDescriptor::new(
+        INTERRUPT_CONTROLLER.assume_init_ref(),
+        Some(post_init_interrupt_controller),
+        None,
+    );
+    generic_driver::driver_manager().register_driver(interrupt_controller_descriptor);
 
-        self.instantiate_uart()?;
-        self.instantiate_gpio()?;
-        self.instantiate_interrupt_controller()?;
+    Ok(())
+}
 
-        self.register_drivers();
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
 
-        self.init_done.store(true, Ordering::Relaxed);
-        Ok(())
+/// Initialize the driver subsystem.
+///
+/// # Safety
+///
+/// See child function calls.
+pub unsafe fn init() -> Result<(), &'static str> {
+    static INIT_DONE: AtomicBool = AtomicBool::new(false);
+    if INIT_DONE.load(Ordering::Relaxed) {
+        return Err("Init already done");
     }
 
-    fn all_device_drivers(&self) -> [&(dyn DeviceDriver + Sync); NUM_DRIVERS] {
-        self.device_drivers
-            .read(|drivers| drivers.map(|drivers| drivers.unwrap()))
-    }
+    driver_uart()?;
+    driver_gpio()?;
+    driver_interrupt_controller()?;
 
-    #[cfg(feature = "test_build")]
-    fn qemu_bring_up_console(&self) {
-        use crate::cpu;
+    INIT_DONE.store(true, Ordering::Relaxed);
+    Ok(())
+}
 
-        unsafe {
-            self.instantiate_uart()
-                .unwrap_or_else(|_| cpu::qemu_exit_failure());
-            console::register_console(PL011_UART.assume_init_ref());
-        };
-    }
+/// Minimal code needed to bring up the console in QEMU (for testing only). This is often less steps
+/// than on real hardware due to QEMU's abstractions.
+#[cfg(feature = "test_build")]
+pub fn qemu_bring_up_console() {
+    use crate::cpu;
+
+    unsafe {
+        instantiate_uart().unwrap_or_else(|_| cpu::qemu_exit_failure());
+        console::register_console(PL011_UART.assume_init_ref());
+    };
 }
diff --git a/18_backtrace/kernel/src/bsp/raspberrypi/exception/asynchronous.rs b/18_backtrace/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
index ab20d86d3..06a675588 100644
--- a/18_backtrace/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
+++ b/18_backtrace/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
@@ -10,6 +10,9 @@ use crate::bsp;
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
+/// Export for reuse in generic asynchronous.rs.
+pub use bsp::device_driver::IRQNumber;
+
 #[cfg(feature = "bsp_rpi3")]
 pub(in crate::bsp) mod irq_map {
     use super::bsp::device_driver::{IRQNumber, PeripheralIRQ};
diff --git a/18_backtrace/kernel/src/driver.rs b/18_backtrace/kernel/src/driver.rs
index 98197fef3..18066c313 100644
--- a/18_backtrace/kernel/src/driver.rs
+++ b/18_backtrace/kernel/src/driver.rs
@@ -4,16 +4,37 @@
 
 //! Driver support.
 
+use crate::{
+    exception, info,
+    synchronization::{interface::ReadWriteEx, InitStateLock},
+};
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+const NUM_DRIVERS: usize = 5;
+
+struct DriverManagerInner<T>
+where
+    T: 'static,
+{
+    next_index: usize,
+    descriptors: [Option<DeviceDriverDescriptor<T>>; NUM_DRIVERS],
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
 /// Driver interfaces.
 pub mod interface {
-    use crate::bsp;
-
     /// Device Driver functions.
     pub trait DeviceDriver {
+        /// Different interrupt controllers might use different types for IRQ number.
+        type IRQNumberType: super::fmt::Display;
+
         /// Return a compatibility string for identifying the driver.
         fn compatible(&self) -> &'static str;
 
@@ -26,32 +47,175 @@ pub mod interface {
             Ok(())
         }
 
-        /// Called by the kernel to register and enable the device's IRQ handlers, if any.
+        /// Called by the kernel to register and enable the device's IRQ handler.
         ///
         /// Rust's type system will prevent a call to this function unless the calling instance
         /// itself has static lifetime.
-        fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
-            Ok(())
+        fn register_and_enable_irq_handler(
+            &'static self,
+            irq_number: &Self::IRQNumberType,
+        ) -> Result<(), &'static str> {
+            panic!(
+                "Attempt to enable IRQ {} for device {}, but driver does not support this",
+                irq_number,
+                self.compatible()
+            )
+        }
+    }
+}
+
+/// Tpye to be used as an optional callback after a driver's init() has run.
+pub type DeviceDriverPostInitCallback = unsafe fn() -> Result<(), &'static str>;
+
+/// A descriptor for device drivers.
+#[derive(Copy, Clone)]
+pub struct DeviceDriverDescriptor<T>
+where
+    T: 'static,
+{
+    device_driver: &'static (dyn interface::DeviceDriver<IRQNumberType = T> + Sync),
+    post_init_callback: Option<DeviceDriverPostInitCallback>,
+    irq_number: Option<T>,
+}
+
+/// Provides device driver management functions.
+pub struct DriverManager<T>
+where
+    T: 'static,
+{
+    inner: InitStateLock<DriverManagerInner<T>>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static DRIVER_MANAGER: DriverManager<exception::asynchronous::IRQNumber> = DriverManager::new();
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl<T> DriverManagerInner<T>
+where
+    T: 'static + Copy,
+{
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self {
+            next_index: 0,
+            descriptors: [None; NUM_DRIVERS],
         }
     }
+}
 
-    /// Device driver management functions.
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl<T> DeviceDriverDescriptor<T> {
+    /// Create an instance.
+    pub fn new(
+        device_driver: &'static (dyn interface::DeviceDriver<IRQNumberType = T> + Sync),
+        post_init_callback: Option<DeviceDriverPostInitCallback>,
+        irq_number: Option<T>,
+    ) -> Self {
+        Self {
+            device_driver,
+            post_init_callback,
+            irq_number,
+        }
+    }
+}
+
+/// Return a reference to the global DriverManager.
+pub fn driver_manager() -> &'static DriverManager<exception::asynchronous::IRQNumber> {
+    &DRIVER_MANAGER
+}
+
+impl<T> DriverManager<T>
+where
+    T: fmt::Display + Copy,
+{
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self {
+            inner: InitStateLock::new(DriverManagerInner::new()),
+        }
+    }
+
+    /// Register a device driver with the kernel.
+    pub fn register_driver(&self, descriptor: DeviceDriverDescriptor<T>) {
+        self.inner.write(|inner| {
+            inner.descriptors[inner.next_index] = Some(descriptor);
+            inner.next_index += 1;
+        })
+    }
+
+    /// Helper for iterating over registered drivers.
+    fn for_each_descriptor<'a>(&'a self, f: impl FnMut(&'a DeviceDriverDescriptor<T>)) {
+        self.inner.read(|inner| {
+            inner
+                .descriptors
+                .iter()
+                .filter_map(|x| x.as_ref())
+                .for_each(f)
+        })
+    }
+
+    /// Fully initialize all drivers and their interrupts handlers.
     ///
-    /// The `BSP` is supposed to supply one global instance.
-    pub trait DriverManager {
-        /// Instantiate all drivers.
-        ///
-        /// # Safety
-        ///
-        /// Must be called before `all_device_drivers`.
-        unsafe fn instantiate_drivers(&self) -> Result<(), &'static str>;
+    /// # Safety
+    ///
+    /// - During init, drivers might do stuff with system-wide impact.
+    pub unsafe fn init_drivers_and_irqs(&self) {
+        self.for_each_descriptor(|descriptor| {
+            // 1. Initialize driver.
+            if let Err(x) = descriptor.device_driver.init() {
+                panic!(
+                    "Error initializing driver: {}: {}",
+                    descriptor.device_driver.compatible(),
+                    x
+                );
+            }
+
+            // 2. Call corresponding post init callback.
+            if let Some(callback) = &descriptor.post_init_callback {
+                if let Err(x) = callback() {
+                    panic!(
+                        "Error during driver post-init callback: {}: {}",
+                        descriptor.device_driver.compatible(),
+                        x
+                    );
+                }
+            }
+        });
+
+        // 3. After all post-init callbacks were done, the interrupt controller should be
+        //    registered and functional. So let drivers register with it now.
+        self.for_each_descriptor(|descriptor| {
+            if let Some(irq_number) = &descriptor.irq_number {
+                if let Err(x) = descriptor
+                    .device_driver
+                    .register_and_enable_irq_handler(irq_number)
+                {
+                    panic!(
+                        "Error during driver interrupt handler registration: {}: {}",
+                        descriptor.device_driver.compatible(),
+                        x
+                    );
+                }
+            }
+        });
+    }
 
-        /// Return a slice of references to all `BSP`-instantiated drivers.
-        fn all_device_drivers(&self) -> [&(dyn DeviceDriver + Sync); bsp::driver::NUM_DRIVERS];
+    /// Enumerate all registered device drivers.
+    pub fn enumerate(&self) {
+        let mut i: usize = 1;
+        self.for_each_descriptor(|descriptor| {
+            info!("      {}. {}", i, descriptor.device_driver.compatible());
 
-        /// Minimal code needed to bring up the console in QEMU (for testing only). This is often
-        /// less steps than on real hardware due to QEMU's abstractions.
-        #[cfg(feature = "test_build")]
-        fn qemu_bring_up_console(&self);
+            i += 1;
+        });
     }
 }
diff --git a/18_backtrace/kernel/src/exception/asynchronous.rs b/18_backtrace/kernel/src/exception/asynchronous.rs
index 83ca1aa6d..c1f2a27b3 100644
--- a/18_backtrace/kernel/src/exception/asynchronous.rs
+++ b/18_backtrace/kernel/src/exception/asynchronous.rs
@@ -10,7 +10,7 @@ mod arch_asynchronous;
 mod null_irq_manager;
 
 use crate::{bsp, synchronization};
-use core::{fmt, marker::PhantomData};
+use core::marker::PhantomData;
 
 //--------------------------------------------------------------------------------------------------
 // Architectural Public Reexports
@@ -24,14 +24,23 @@ pub use arch_asynchronous::{
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
+/// Interrupt number as defined by the BSP.
+pub type IRQNumber = bsp::exception::asynchronous::IRQNumber;
+
 /// Interrupt descriptor.
 #[derive(Copy, Clone)]
-pub struct IRQDescriptor {
+pub struct IRQHandlerDescriptor<T>
+where
+    T: Copy,
+{
+    /// The IRQ number.
+    number: T,
+
     /// Descriptive name.
-    pub name: &'static str,
+    name: &'static str,
 
     /// Reference to handler trait object.
-    pub handler: &'static (dyn interface::IRQHandler + Sync),
+    handler: &'static (dyn interface::IRQHandler + Sync),
 }
 
 /// IRQContext token.
@@ -61,17 +70,16 @@ pub mod interface {
     /// platform's interrupt controller.
     pub trait IRQManager {
         /// The IRQ number type depends on the implementation.
-        type IRQNumberType;
+        type IRQNumberType: Copy;
 
         /// Register a handler.
         fn register_handler(
             &self,
-            irq_number: Self::IRQNumberType,
-            descriptor: super::IRQDescriptor,
+            irq_handler_descriptor: super::IRQHandlerDescriptor<Self::IRQNumberType>,
         ) -> Result<(), &'static str>;
 
         /// Enable an interrupt in the controller.
-        fn enable(&self, irq_number: Self::IRQNumberType);
+        fn enable(&self, irq_number: &Self::IRQNumberType);
 
         /// Handle pending interrupts.
         ///
@@ -91,16 +99,12 @@ pub mod interface {
     }
 }
 
-/// A wrapper type for IRQ numbers with integrated range sanity check.
-#[derive(Copy, Clone)]
-pub struct IRQNumber<const MAX_INCLUSIVE: usize>(usize);
-
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
 static CUR_IRQ_MANAGER: InitStateLock<
-    &'static (dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber> + Sync),
+    &'static (dyn interface::IRQManager<IRQNumberType = IRQNumber> + Sync),
 > = InitStateLock::new(&null_irq_manager::NULL_IRQ_MANAGER);
 
 //--------------------------------------------------------------------------------------------------
@@ -108,6 +112,39 @@ static CUR_IRQ_MANAGER: InitStateLock<
 //--------------------------------------------------------------------------------------------------
 use synchronization::{interface::ReadWriteEx, InitStateLock};
 
+impl<T> IRQHandlerDescriptor<T>
+where
+    T: Copy,
+{
+    /// Create an instance.
+    pub const fn new(
+        number: T,
+        name: &'static str,
+        handler: &'static (dyn interface::IRQHandler + Sync),
+    ) -> Self {
+        Self {
+            number,
+            name,
+            handler,
+        }
+    }
+
+    /// Return the number.
+    pub const fn number(&self) -> T {
+        self.number
+    }
+
+    /// Return the name.
+    pub const fn name(&self) -> &'static str {
+        self.name
+    }
+
+    /// Return the handler.
+    pub const fn handler(&self) -> &'static (dyn interface::IRQHandler + Sync) {
+        self.handler
+    }
+}
+
 impl<'irq_context> IRQContext<'irq_context> {
     /// Creates an IRQContext token.
     ///
@@ -125,29 +162,6 @@ impl<'irq_context> IRQContext<'irq_context> {
     }
 }
 
-impl<const MAX_INCLUSIVE: usize> IRQNumber<{ MAX_INCLUSIVE }> {
-    /// The total number of IRQs this type supports.
-    pub const NUM_TOTAL: usize = MAX_INCLUSIVE + 1;
-
-    /// Creates a new instance if number <= MAX_INCLUSIVE.
-    pub const fn new(number: usize) -> Self {
-        assert!(number <= MAX_INCLUSIVE);
-
-        Self(number)
-    }
-
-    /// Return the wrapped number.
-    pub const fn get(self) -> usize {
-        self.0
-    }
-}
-
-impl<const MAX_INCLUSIVE: usize> fmt::Display for IRQNumber<{ MAX_INCLUSIVE }> {
-    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
-        write!(f, "{}", self.0)
-    }
-}
-
 /// Executes the provided closure while IRQs are masked on the executing core.
 ///
 /// While the function temporarily changes the HW state of the executing core, it restores it to the
@@ -163,8 +177,7 @@ pub fn exec_with_irq_masked<T>(f: impl FnOnce() -> T) -> T {
 
 /// Register a new IRQ manager.
 pub fn register_irq_manager(
-    new_manager: &'static (dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber>
-                  + Sync),
+    new_manager: &'static (dyn interface::IRQManager<IRQNumberType = IRQNumber> + Sync),
 ) {
     CUR_IRQ_MANAGER.write(|manager| *manager = new_manager);
 }
@@ -172,6 +185,6 @@ pub fn register_irq_manager(
 /// Return a reference to the currently registered IRQ manager.
 ///
 /// This is the IRQ manager used by the architectural interrupt handling code.
-pub fn irq_manager() -> &'static dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber> {
+pub fn irq_manager() -> &'static dyn interface::IRQManager<IRQNumberType = IRQNumber> {
     CUR_IRQ_MANAGER.read(|manager| *manager)
 }
diff --git a/18_backtrace/kernel/src/exception/asynchronous/null_irq_manager.rs b/18_backtrace/kernel/src/exception/asynchronous/null_irq_manager.rs
index 560e3ce4b..438f96496 100644
--- a/18_backtrace/kernel/src/exception/asynchronous/null_irq_manager.rs
+++ b/18_backtrace/kernel/src/exception/asynchronous/null_irq_manager.rs
@@ -4,8 +4,7 @@
 
 //! Null IRQ Manager.
 
-use super::{interface, IRQContext, IRQDescriptor};
-use crate::bsp;
+use super::{interface, IRQContext, IRQHandlerDescriptor};
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -24,17 +23,16 @@ pub static NULL_IRQ_MANAGER: NullIRQManager = NullIRQManager {};
 //--------------------------------------------------------------------------------------------------
 
 impl interface::IRQManager for NullIRQManager {
-    type IRQNumberType = bsp::driver::IRQNumber;
+    type IRQNumberType = super::IRQNumber;
 
     fn register_handler(
         &self,
-        _irq_number: Self::IRQNumberType,
-        _descriptor: IRQDescriptor,
+        _descriptor: IRQHandlerDescriptor<Self::IRQNumberType>,
     ) -> Result<(), &'static str> {
         panic!("No IRQ Manager registered yet");
     }
 
-    fn enable(&self, _irq_number: Self::IRQNumberType) {
+    fn enable(&self, _irq_number: &Self::IRQNumberType) {
         panic!("No IRQ Manager registered yet");
     }
 
diff --git a/18_backtrace/kernel/src/lib.rs b/18_backtrace/kernel/src/lib.rs
index 2545b20bb..5b79ebfe8 100644
--- a/18_backtrace/kernel/src/lib.rs
+++ b/18_backtrace/kernel/src/lib.rs
@@ -183,11 +183,9 @@ pub fn test_runner(tests: &[&test_types::UnitTest]) {
 #[cfg(test)]
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
     memory::init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     test_main();
 
diff --git a/18_backtrace/kernel/src/main.rs b/18_backtrace/kernel/src/main.rs
index 9aeb44386..659052588 100644
--- a/18_backtrace/kernel/src/main.rs
+++ b/18_backtrace/kernel/src/main.rs
@@ -13,7 +13,7 @@
 #![no_main]
 #![no_std]
 
-use libkernel::{bsp, cpu, driver, exception, info, memory, state, time, warn};
+use libkernel::{bsp, cpu, driver, exception, info, memory, state, time};
 
 /// Early init code.
 ///
@@ -25,27 +25,16 @@ use libkernel::{bsp, cpu, driver, exception, info, memory, state, time, warn};
 /// - Printing will not work until the respective driver's MMIO is remapped.
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
     memory::init();
 
-    // Instantiate and init all device drivers.
-    if let Err(x) = bsp::driver::driver_manager().instantiate_drivers() {
-        panic!("Error instantiating drivers: {}", x);
-    }
-    for i in bsp::driver::driver_manager().all_device_drivers().iter() {
-        if let Err(x) = i.init() {
-            panic!("Error loading driver: {}: {}", i.compatible(), x);
-        }
+    // Initialize the BSP driver subsystem.
+    if let Err(x) = bsp::driver::init() {
+        panic!("Error initializing BSP driver subsystem: {}", x);
     }
 
-    // Let device drivers register and enable their handlers with the interrupt controller.
-    for i in bsp::driver::driver_manager().all_device_drivers() {
-        if let Err(msg) = i.register_and_enable_irq_handler() {
-            warn!("Error registering IRQ handler: {}", msg);
-        }
-    }
+    // Initialize all device drivers.
+    driver::driver_manager().init_drivers_and_irqs();
 
     bsp::memory::mmu::kernel_add_mapping_records_for_precomputed();
 
@@ -61,8 +50,6 @@ unsafe fn kernel_init() -> ! {
 
 /// The main function running after the early init.
 fn kernel_main() -> ! {
-    use driver::interface::DriverManager;
-
     info!("{}", libkernel::version());
     info!("Booting on: {}", bsp::board_name());
 
@@ -81,13 +68,7 @@ fn kernel_main() -> ! {
     );
 
     info!("Drivers loaded:");
-    for (i, driver) in bsp::driver::driver_manager()
-        .all_device_drivers()
-        .iter()
-        .enumerate()
-    {
-        info!("      {}. {}", i + 1, driver.compatible());
-    }
+    driver::driver_manager().enumerate();
 
     info!("Registered IRQ handlers:");
     exception::asynchronous::irq_manager().print_handler();
diff --git a/18_backtrace/kernel/src/state.rs b/18_backtrace/kernel/src/state.rs
index 0af3688c2..6a261b34f 100644
--- a/18_backtrace/kernel/src/state.rs
+++ b/18_backtrace/kernel/src/state.rs
@@ -52,7 +52,7 @@ impl StateManager {
     const SINGLE_CORE_MAIN: u8 = 1;
     const MULTI_CORE_MAIN: u8 = 2;
 
-    /// Create a new instance.
+    /// Create an instance.
     pub const fn new() -> Self {
         Self(AtomicU8::new(Self::INIT))
     }
diff --git a/18_backtrace/kernel/tests/00_console_sanity.rs b/18_backtrace/kernel/tests/00_console_sanity.rs
index 305510cea..2c0225b7a 100644
--- a/18_backtrace/kernel/tests/00_console_sanity.rs
+++ b/18_backtrace/kernel/tests/00_console_sanity.rs
@@ -11,16 +11,15 @@
 /// Console tests should time out on the I/O harness in case of panic.
 mod panic_wait_forever;
 
-use libkernel::{bsp, console, cpu, driver, exception, memory, print};
+use libkernel::{bsp, console, cpu, exception, memory, print};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
     use console::console;
-    use driver::interface::DriverManager;
 
     exception::handling_init();
     memory::init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     // Handshake
     assert_eq!(console().read_char(), 'A');
diff --git a/18_backtrace/kernel/tests/01_timer_sanity.rs b/18_backtrace/kernel/tests/01_timer_sanity.rs
index 398993324..8188b9424 100644
--- a/18_backtrace/kernel/tests/01_timer_sanity.rs
+++ b/18_backtrace/kernel/tests/01_timer_sanity.rs
@@ -11,16 +11,14 @@
 #![test_runner(libkernel::test_runner)]
 
 use core::time::Duration;
-use libkernel::{bsp, cpu, driver, exception, memory, time};
+use libkernel::{bsp, cpu, exception, memory, time};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
     memory::init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
 
diff --git a/18_backtrace/kernel/tests/02_exception_sync_page_fault.rs b/18_backtrace/kernel/tests/02_exception_sync_page_fault.rs
index a6d15b697..fab44c8f0 100644
--- a/18_backtrace/kernel/tests/02_exception_sync_page_fault.rs
+++ b/18_backtrace/kernel/tests/02_exception_sync_page_fault.rs
@@ -17,15 +17,13 @@
 /// or indirectly.
 mod panic_exit_success;
 
-use libkernel::{bsp, cpu, driver, exception, info, memory, println};
+use libkernel::{bsp, cpu, exception, info, memory, println};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
     memory::init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     // This line will be printed as the test header.
     println!("Testing synchronous exception handling by causing a page fault");
diff --git a/18_backtrace/kernel/tests/03_exception_restore_sanity.rs b/18_backtrace/kernel/tests/03_exception_restore_sanity.rs
index 47dd27149..f176c6a67 100644
--- a/18_backtrace/kernel/tests/03_exception_restore_sanity.rs
+++ b/18_backtrace/kernel/tests/03_exception_restore_sanity.rs
@@ -12,7 +12,7 @@
 mod panic_wait_forever;
 
 use core::arch::asm;
-use libkernel::{bsp, cpu, driver, exception, info, memory, println};
+use libkernel::{bsp, cpu, exception, info, memory, println};
 
 #[inline(never)]
 fn nested_system_call() {
@@ -30,11 +30,9 @@ fn nested_system_call() {
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
     memory::init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     // This line will be printed as the test header.
     println!("Testing exception restore");
diff --git a/18_backtrace/kernel/tests/04_exception_irq_sanity.rs b/18_backtrace/kernel/tests/04_exception_irq_sanity.rs
index e93a4caf6..e6f94c91f 100644
--- a/18_backtrace/kernel/tests/04_exception_irq_sanity.rs
+++ b/18_backtrace/kernel/tests/04_exception_irq_sanity.rs
@@ -10,15 +10,13 @@
 #![reexport_test_harness_main = "test_main"]
 #![test_runner(libkernel::test_runner)]
 
-use libkernel::{bsp, cpu, driver, exception, memory};
+use libkernel::{bsp, cpu, exception, memory};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     memory::init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     exception::handling_init();
     exception::asynchronous::local_irq_unmask();
diff --git a/18_backtrace/kernel/tests/05_backtrace_sanity.rs b/18_backtrace/kernel/tests/05_backtrace_sanity.rs
index ea425f687..f75c0ea3e 100644
--- a/18_backtrace/kernel/tests/05_backtrace_sanity.rs
+++ b/18_backtrace/kernel/tests/05_backtrace_sanity.rs
@@ -11,7 +11,7 @@
 /// Console tests should time out on the I/O harness in case of panic.
 mod panic_wait_forever;
 
-use libkernel::{bsp, cpu, driver, exception, memory};
+use libkernel::{bsp, cpu, exception, memory};
 
 #[inline(never)]
 fn nested() {
@@ -20,11 +20,9 @@ fn nested() {
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
     memory::init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     nested();
 
diff --git a/18_backtrace/kernel/tests/06_backtrace_invalid_frame.rs b/18_backtrace/kernel/tests/06_backtrace_invalid_frame.rs
index 8769c7b6e..33d3c02df 100644
--- a/18_backtrace/kernel/tests/06_backtrace_invalid_frame.rs
+++ b/18_backtrace/kernel/tests/06_backtrace_invalid_frame.rs
@@ -11,7 +11,7 @@
 /// Console tests should time out on the I/O harness in case of panic.
 mod panic_wait_forever;
 
-use libkernel::{backtrace, bsp, cpu, driver, exception, memory};
+use libkernel::{backtrace, bsp, cpu, exception, memory};
 
 #[inline(never)]
 fn nested() {
@@ -22,11 +22,9 @@ fn nested() {
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
     memory::init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     nested();
 
diff --git a/18_backtrace/kernel/tests/07_backtrace_invalid_link.rs b/18_backtrace/kernel/tests/07_backtrace_invalid_link.rs
index 28f3cddab..bcb0538a6 100644
--- a/18_backtrace/kernel/tests/07_backtrace_invalid_link.rs
+++ b/18_backtrace/kernel/tests/07_backtrace_invalid_link.rs
@@ -11,7 +11,7 @@
 /// Console tests should time out on the I/O harness in case of panic.
 mod panic_wait_forever;
 
-use libkernel::{backtrace, bsp, cpu, driver, exception, memory};
+use libkernel::{backtrace, bsp, cpu, exception, memory};
 
 #[inline(never)]
 fn nested_2() -> &'static str {
@@ -27,11 +27,9 @@ fn nested_1() {
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
     memory::init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     nested_1();
 
diff --git a/19_kernel_heap/Makefile b/19_kernel_heap/Makefile
index 7b1673f34..be41c136c 100644
--- a/19_kernel_heap/Makefile
+++ b/19_kernel_heap/Makefile
@@ -341,7 +341,7 @@ test_boot: $(KERNEL_BIN)
 ## Helpers for unit and integration test targets
 ##------------------------------------------------------------------------------
 define KERNEL_TEST_RUNNER
-    #!/usr/bin/env bash
+#!/usr/bin/env bash
 
     # The cargo test runner seems to change into the crate under test's directory. Therefore, ensure
     # this script executes from the root.
diff --git a/19_kernel_heap/README.md b/19_kernel_heap/README.md
index 4eafd3448..a40d203d9 100644
--- a/19_kernel_heap/README.md
+++ b/19_kernel_heap/README.md
@@ -131,11 +131,19 @@ wrapped allocator to the heap that we defined earlier:
 ```rust
 /// Query the BSP for the heap region and initialize the kernel's heap allocator with it.
 pub fn kernel_init_heap_allocator() {
+    static INIT_DONE: AtomicBool = AtomicBool::new(false);
+    if INIT_DONE.load(Ordering::Relaxed) {
+        warn!("Already initialized");
+        return;
+    }
+
     let region = bsp::memory::mmu::virt_heap_region();
 
-    KERNEL_HEAP_ALLOCATOR
-        .inner
-        .lock(|inner| unsafe { inner.init(region.start_addr().as_usize(), region.size()) });
+    KERNEL_HEAP_ALLOCATOR.inner.lock(|inner| unsafe {
+        inner.init(region.start_addr().as_usize() as *mut u8, region.size())
+    });
+
+    INIT_DONE.store(true, Ordering::Relaxed);
 }
 ```
 
@@ -288,7 +296,7 @@ diff -uNr 18_backtrace/kernel/Cargo.toml 19_kernel_heap/kernel/Cargo.toml
 diff -uNr 18_backtrace/kernel/src/bsp/device_driver/arm/gicv2.rs 19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2.rs
 --- 18_backtrace/kernel/src/bsp/device_driver/arm/gicv2.rs
 +++ 19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2.rs
-@@ -85,12 +85,13 @@
+@@ -86,13 +86,13 @@
      synchronization,
      synchronization::InitStateLock,
  };
@@ -298,12 +306,13 @@ diff -uNr 18_backtrace/kernel/src/bsp/device_driver/arm/gicv2.rs 19_kernel_heap/
  // Private Definitions
  //--------------------------------------------------------------------------------------------------
 
--type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; IRQNumber::NUM_TOTAL];
-+type HandlerTable = Vec<Option<exception::asynchronous::IRQDescriptor>>;
+-type HandlerTable = [Option<exception::asynchronous::IRQHandlerDescriptor<IRQNumber>>;
+-    IRQNumber::MAX_INCLUSIVE + 1];
++type HandlerTable = Vec<Option<exception::asynchronous::IRQHandlerDescriptor<IRQNumber>>>;
 
  //--------------------------------------------------------------------------------------------------
  // Public Definitions
-@@ -119,7 +120,7 @@
+@@ -118,7 +118,7 @@
  //--------------------------------------------------------------------------------------------------
 
  impl GICv2 {
@@ -312,21 +321,21 @@ diff -uNr 18_backtrace/kernel/src/bsp/device_driver/arm/gicv2.rs 19_kernel_heap/
 
      pub const COMPATIBLE: &'static str = "GICv2 (ARM Generic Interrupt Controller v2)";
 
-@@ -136,7 +137,7 @@
+@@ -134,7 +134,7 @@
          Self {
              gicd: gicd::GICD::new(gicd_mmio_start_addr),
              gicc: gicc::GICC::new(gicc_mmio_start_addr),
--            handler_table: InitStateLock::new([None; IRQNumber::NUM_TOTAL]),
+-            handler_table: InitStateLock::new([None; IRQNumber::MAX_INCLUSIVE + 1]),
 +            handler_table: InitStateLock::new(Vec::new()),
-             post_init_callback,
          }
      }
-@@ -153,6 +154,9 @@
+ }
+@@ -152,6 +152,9 @@
      }
 
      unsafe fn init(&self) -> Result<(), &'static str> {
 +        self.handler_table
-+            .write(|table| table.resize(IRQNumber::NUM_TOTAL, None));
++            .write(|table| table.resize(IRQNumber::MAX_INCLUSIVE + 1, None));
 +
          if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
              self.gicd.boot_core_init();
@@ -343,20 +352,21 @@ diff -uNr 18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_contro
  use tock_registers::{
      interfaces::{Readable, Writeable},
      register_structs,
-@@ -52,7 +53,7 @@
+@@ -52,8 +53,7 @@
  /// Abstraction for the ReadOnly parts of the associated MMIO registers.
  type ReadOnlyRegisters = MMIODerefWrapper<RORegisterBlock>;
 
--type HandlerTable = [Option<exception::asynchronous::IRQDescriptor>; PeripheralIRQ::NUM_TOTAL];
-+type HandlerTable = Vec<Option<exception::asynchronous::IRQDescriptor>>;
+-type HandlerTable = [Option<exception::asynchronous::IRQHandlerDescriptor<PeripheralIRQ>>;
+-    PeripheralIRQ::MAX_INCLUSIVE + 1];
++type HandlerTable = Vec<Option<exception::asynchronous::IRQHandlerDescriptor<PeripheralIRQ>>>;
 
  //--------------------------------------------------------------------------------------------------
  // Public Definitions
-@@ -84,10 +85,16 @@
+@@ -85,10 +85,16 @@
          Self {
              wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(mmio_start_addr)),
              ro_registers: ReadOnlyRegisters::new(mmio_start_addr),
--            handler_table: InitStateLock::new([None; PeripheralIRQ::NUM_TOTAL]),
+-            handler_table: InitStateLock::new([None; PeripheralIRQ::MAX_INCLUSIVE + 1]),
 +            handler_table: InitStateLock::new(Vec::new()),
          }
      }
@@ -364,7 +374,7 @@ diff -uNr 18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_contro
 +    /// Called by the kernel to bring up the device.
 +    pub fn init(&self) {
 +        self.handler_table
-+            .write(|table| table.resize(PeripheralIRQ::NUM_TOTAL, None));
++            .write(|table| table.resize(PeripheralIRQ::MAX_INCLUSIVE + 1, None));
 +    }
 +
      /// Query the list of pending IRQs.
@@ -374,20 +384,24 @@ diff -uNr 18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_contro
 diff -uNr 18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs 19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
 --- 18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
 +++ 19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
-@@ -104,6 +104,8 @@
+@@ -109,6 +109,12 @@
+     fn compatible(&self) -> &'static str {
+         Self::COMPATIBLE
      }
-
-     unsafe fn init(&self) -> Result<(), &'static str> {
++
++    unsafe fn init(&self) -> Result<(), &'static str> {
 +        self.periph.init();
 +
-         (self.post_init_callback)();
++        Ok(())
++    }
+ }
 
-         Ok(())
+ impl exception::asynchronous::interface::IRQManager for InterruptController {
 
 diff -uNr 18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 --- 18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 +++ 19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
-@@ -329,6 +329,13 @@
+@@ -327,6 +327,13 @@
          self.chars_written += 1;
      }
 
@@ -401,7 +415,7 @@ diff -uNr 18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 19
      /// Block execution until the last buffered character has been physically put on the TX wire.
      fn flush(&self) {
          // Spin until the busy bit is cleared.
-@@ -451,6 +458,10 @@
+@@ -443,6 +450,10 @@
          self.inner.lock(|inner| inner.write_char(c));
      }
 
@@ -413,72 +427,6 @@ diff -uNr 18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 19
          // Fully qualified syntax for the call to `core::fmt::Write::write_fmt()` to increase
          // readability.
 
-diff -uNr 18_backtrace/kernel/src/bsp/raspberrypi/driver.rs 19_kernel_heap/kernel/src/bsp/raspberrypi/driver.rs
---- 18_backtrace/kernel/src/bsp/raspberrypi/driver.rs
-+++ 19_kernel_heap/kernel/src/bsp/raspberrypi/driver.rs
-@@ -11,6 +11,7 @@
-     memory::mmu::MMIODescriptor,
-     synchronization::{interface::ReadWriteEx, InitStateLock},
- };
-+use alloc::vec::Vec;
- use core::{
-     mem::MaybeUninit,
-     sync::atomic::{AtomicBool, Ordering},
-@@ -24,18 +25,11 @@
-
- /// Device Driver Manager type.
- struct BSPDriverManager {
--    device_drivers: InitStateLock<[Option<&'static (dyn DeviceDriver + Sync)>; NUM_DRIVERS]>,
-+    device_drivers: InitStateLock<Vec<&'static (dyn DeviceDriver + Sync)>>,
-     init_done: AtomicBool,
- }
-
- //--------------------------------------------------------------------------------------------------
--// Public Definitions
--//--------------------------------------------------------------------------------------------------
--
--/// The number of active drivers provided by this BSP.
--pub const NUM_DRIVERS: usize = 3;
--
--//--------------------------------------------------------------------------------------------------
- // Global instances
- //--------------------------------------------------------------------------------------------------
-
-@@ -50,7 +44,7 @@
- static mut INTERRUPT_CONTROLLER: MaybeUninit<device_driver::GICv2> = MaybeUninit::uninit();
-
- static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
--    device_drivers: InitStateLock::new([None; NUM_DRIVERS]),
-+    device_drivers: InitStateLock::new(Vec::new()),
-     init_done: AtomicBool::new(false),
- };
-
-@@ -143,9 +137,9 @@
-
-     unsafe fn register_drivers(&self) {
-         self.device_drivers.write(|drivers| {
--            drivers[0] = Some(PL011_UART.assume_init_ref());
--            drivers[1] = Some(GPIO.assume_init_ref());
--            drivers[2] = Some(INTERRUPT_CONTROLLER.assume_init_ref());
-+            drivers.push(PL011_UART.assume_init_ref());
-+            drivers.push(GPIO.assume_init_ref());
-+            drivers.push(INTERRUPT_CONTROLLER.assume_init_ref());
-         });
-     }
- }
-@@ -180,9 +174,8 @@
-         Ok(())
-     }
-
--    fn all_device_drivers(&self) -> [&(dyn DeviceDriver + Sync); NUM_DRIVERS] {
--        self.device_drivers
--            .read(|drivers| drivers.map(|drivers| drivers.unwrap()))
-+    fn all_device_drivers(&self) -> &Vec<&(dyn DeviceDriver + Sync)> {
-+        self.device_drivers.read(|drivers| drivers)
-     }
-
-     #[cfg(feature = "test_build")]
-
 diff -uNr 18_backtrace/kernel/src/bsp/raspberrypi/kernel.ld 19_kernel_heap/kernel/src/bsp/raspberrypi/kernel.ld
 --- 18_backtrace/kernel/src/bsp/raspberrypi/kernel.ld
 +++ 19_kernel_heap/kernel/src/bsp/raspberrypi/kernel.ld
@@ -819,26 +767,198 @@ diff -uNr 18_backtrace/kernel/src/console.rs 19_kernel_heap/kernel/src/console.r
 diff -uNr 18_backtrace/kernel/src/driver.rs 19_kernel_heap/kernel/src/driver.rs
 --- 18_backtrace/kernel/src/driver.rs
 +++ 19_kernel_heap/kernel/src/driver.rs
-@@ -10,7 +10,7 @@
+@@ -8,23 +8,10 @@
+     exception, info,
+     synchronization::{interface::ReadWriteEx, InitStateLock},
+ };
++use alloc::vec::Vec;
+ use core::fmt;
 
- /// Driver interfaces.
- pub mod interface {
--    use crate::bsp;
-+    use alloc::vec::Vec;
+ //--------------------------------------------------------------------------------------------------
+-// Private Definitions
+-//--------------------------------------------------------------------------------------------------
+-
+-const NUM_DRIVERS: usize = 5;
+-
+-struct DriverManagerInner<T>
+-where
+-    T: 'static,
+-{
+-    next_index: usize,
+-    descriptors: [Option<DeviceDriverDescriptor<T>>; NUM_DRIVERS],
+-}
+-
+-//--------------------------------------------------------------------------------------------------
+ // Public Definitions
+ //--------------------------------------------------------------------------------------------------
+
+@@ -68,7 +55,6 @@
+ pub type DeviceDriverPostInitCallback = unsafe fn() -> Result<(), &'static str>;
+
+ /// A descriptor for device drivers.
+-#[derive(Copy, Clone)]
+ pub struct DeviceDriverDescriptor<T>
+ where
+     T: 'static,
+@@ -83,7 +69,7 @@
+ where
+     T: 'static,
+ {
+-    inner: InitStateLock<DriverManagerInner<T>>,
++    descriptors: InitStateLock<Vec<DeviceDriverDescriptor<T>>>,
+ }
+
+ //--------------------------------------------------------------------------------------------------
+@@ -93,23 +79,6 @@
+ static DRIVER_MANAGER: DriverManager<exception::asynchronous::IRQNumber> = DriverManager::new();
+
+ //--------------------------------------------------------------------------------------------------
+-// Private Code
+-//--------------------------------------------------------------------------------------------------
+-
+-impl<T> DriverManagerInner<T>
+-where
+-    T: 'static + Copy,
+-{
+-    /// Create an instance.
+-    pub const fn new() -> Self {
+-        Self {
+-            next_index: 0,
+-            descriptors: [None; NUM_DRIVERS],
+-        }
+-    }
+-}
+-
+-//--------------------------------------------------------------------------------------------------
+ // Public Code
+ //--------------------------------------------------------------------------------------------------
+
+@@ -135,32 +104,19 @@
+
+ impl<T> DriverManager<T>
+ where
+-    T: fmt::Display + Copy,
++    T: fmt::Display,
+ {
+     /// Create an instance.
+     pub const fn new() -> Self {
+         Self {
+-            inner: InitStateLock::new(DriverManagerInner::new()),
++            descriptors: InitStateLock::new(Vec::new()),
+         }
+     }
 
-     /// Device Driver functions.
-     pub trait DeviceDriver {
-@@ -46,8 +46,8 @@
-         /// Must be called before `all_device_drivers`.
-         unsafe fn instantiate_drivers(&self) -> Result<(), &'static str>;
+     /// Register a device driver with the kernel.
+     pub fn register_driver(&self, descriptor: DeviceDriverDescriptor<T>) {
+-        self.inner.write(|inner| {
+-            inner.descriptors[inner.next_index] = Some(descriptor);
+-            inner.next_index += 1;
+-        })
+-    }
+-
+-    /// Helper for iterating over registered drivers.
+-    fn for_each_descriptor<'a>(&'a self, f: impl FnMut(&'a DeviceDriverDescriptor<T>)) {
+-        self.inner.read(|inner| {
+-            inner
+-                .descriptors
+-                .iter()
+-                .filter_map(|x| x.as_ref())
+-                .for_each(f)
+-        })
++        self.descriptors
++            .write(|descriptors| descriptors.push(descriptor));
+     }
 
--        /// Return a slice of references to all `BSP`-instantiated drivers.
--        fn all_device_drivers(&self) -> [&(dyn DeviceDriver + Sync); bsp::driver::NUM_DRIVERS];
-+        /// Return a vector of references to all `BSP`-instantiated drivers.
-+        fn all_device_drivers(&self) -> &Vec<&(dyn DeviceDriver + Sync)>;
+     /// Fully initialize all drivers and their interrupts handlers.
+@@ -169,53 +125,54 @@
+     ///
+     /// - During init, drivers might do stuff with system-wide impact.
+     pub unsafe fn init_drivers_and_irqs(&self) {
+-        self.for_each_descriptor(|descriptor| {
+-            // 1. Initialize driver.
+-            if let Err(x) = descriptor.device_driver.init() {
+-                panic!(
+-                    "Error initializing driver: {}: {}",
+-                    descriptor.device_driver.compatible(),
+-                    x
+-                );
+-            }
+-
+-            // 2. Call corresponding post init callback.
+-            if let Some(callback) = &descriptor.post_init_callback {
+-                if let Err(x) = callback() {
++        self.descriptors.read(|descriptors| {
++            for descriptor in descriptors {
++                // 1. Initialize driver.
++                if let Err(x) = descriptor.device_driver.init() {
+                     panic!(
+-                        "Error during driver post-init callback: {}: {}",
++                        "Error initializing driver: {}: {}",
+                         descriptor.device_driver.compatible(),
+                         x
+                     );
+                 }
++
++                // 2. Call corresponding post init callback.
++                if let Some(callback) = &descriptor.post_init_callback {
++                    if let Err(x) = callback() {
++                        panic!(
++                            "Error during driver post-init callback: {}: {}",
++                            descriptor.device_driver.compatible(),
++                            x
++                        );
++                    }
++                }
+             }
+-        });
+
+-        // 3. After all post-init callbacks were done, the interrupt controller should be
+-        //    registered and functional. So let drivers register with it now.
+-        self.for_each_descriptor(|descriptor| {
+-            if let Some(irq_number) = &descriptor.irq_number {
+-                if let Err(x) = descriptor
+-                    .device_driver
+-                    .register_and_enable_irq_handler(irq_number)
+-                {
+-                    panic!(
+-                        "Error during driver interrupt handler registration: {}: {}",
+-                        descriptor.device_driver.compatible(),
+-                        x
+-                    );
++            // 3. After all post-init callbacks were done, the interrupt controller should be
++            //    registered and functional. So let drivers register with it now.
++            for descriptor in descriptors {
++                if let Some(irq_number) = &descriptor.irq_number {
++                    if let Err(x) = descriptor
++                        .device_driver
++                        .register_and_enable_irq_handler(irq_number)
++                    {
++                        panic!(
++                            "Error during driver interrupt handler registration: {}: {}",
++                            descriptor.device_driver.compatible(),
++                            x
++                        );
++                    }
+                 }
+             }
+-        });
++        })
+     }
 
-         /// Minimal code needed to bring up the console in QEMU (for testing only). This is often
-         /// less steps than on real hardware due to QEMU's abstractions.
+     /// Enumerate all registered device drivers.
+     pub fn enumerate(&self) {
+-        let mut i: usize = 1;
+-        self.for_each_descriptor(|descriptor| {
+-            info!("      {}. {}", i, descriptor.device_driver.compatible());
+-
+-            i += 1;
++        self.descriptors.read(|descriptors| {
++            for (i, desc) in descriptors.iter().enumerate() {
++                info!("      {}. {}", i + 1, desc.device_driver.compatible());
++            }
+         });
+     }
+ }
 
 diff -uNr 18_backtrace/kernel/src/lib.rs 19_kernel_heap/kernel/src/lib.rs
 --- 18_backtrace/kernel/src/lib.rs
@@ -870,10 +990,10 @@ diff -uNr 18_backtrace/kernel/src/main.rs 19_kernel_heap/kernel/src/main.rs
 
 +extern crate alloc;
 +
- use libkernel::{bsp, cpu, driver, exception, info, memory, state, time, warn};
+ use libkernel::{bsp, cpu, driver, exception, info, memory, state, time};
 
  /// Early init code.
-@@ -92,6 +94,9 @@
+@@ -73,6 +75,9 @@
      info!("Registered IRQ handlers:");
      exception::asynchronous::irq_manager().print_handler();
 
@@ -887,7 +1007,7 @@ diff -uNr 18_backtrace/kernel/src/main.rs 19_kernel_heap/kernel/src/main.rs
 diff -uNr 18_backtrace/kernel/src/memory/heap_alloc.rs 19_kernel_heap/kernel/src/memory/heap_alloc.rs
 --- 18_backtrace/kernel/src/memory/heap_alloc.rs
 +++ 19_kernel_heap/kernel/src/memory/heap_alloc.rs
-@@ -0,0 +1,137 @@
+@@ -0,0 +1,147 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
@@ -899,8 +1019,10 @@ diff -uNr 18_backtrace/kernel/src/memory/heap_alloc.rs 19_kernel_heap/kernel/src
 +    memory::{Address, Virtual},
 +    synchronization,
 +    synchronization::IRQSafeNullLock,
++    warn,
 +};
 +use alloc::alloc::{GlobalAlloc, Layout};
++use core::sync::atomic::{AtomicBool, Ordering};
 +use linked_list_allocator::Heap as LinkedListHeap;
 +
 +//--------------------------------------------------------------------------------------------------
@@ -1019,11 +1141,19 @@ diff -uNr 18_backtrace/kernel/src/memory/heap_alloc.rs 19_kernel_heap/kernel/src
 +
 +/// Query the BSP for the heap region and initialize the kernel's heap allocator with it.
 +pub fn kernel_init_heap_allocator() {
++    static INIT_DONE: AtomicBool = AtomicBool::new(false);
++    if INIT_DONE.load(Ordering::Relaxed) {
++        warn!("Already initialized");
++        return;
++    }
++
 +    let region = bsp::memory::mmu::virt_heap_region();
 +
 +    KERNEL_HEAP_ALLOCATOR.inner.lock(|inner| unsafe {
 +        inner.init(region.start_addr().as_usize() as *mut u8, region.size())
 +    });
++
++    INIT_DONE.store(true, Ordering::Relaxed);
 +}
 
 diff -uNr 18_backtrace/kernel/src/memory/mmu/mapping_record.rs 19_kernel_heap/kernel/src/memory/mmu/mapping_record.rs
@@ -1280,6 +1410,19 @@ diff -uNr 18_backtrace/kernel/src/print.rs 19_kernel_heap/kernel/src/print.rs
 +    })
 +}
 
+diff -uNr 18_backtrace/kernel/src/state.rs 19_kernel_heap/kernel/src/state.rs
+--- 18_backtrace/kernel/src/state.rs
++++ 19_kernel_heap/kernel/src/state.rs
+@@ -52,7 +52,7 @@
+     const SINGLE_CORE_MAIN: u8 = 1;
+     const MULTI_CORE_MAIN: u8 = 2;
+
+-    /// Create an instance.
++    /// Create a new instance.
+     pub const fn new() -> Self {
+         Self(AtomicU8::new(Self::INIT))
+     }
+
 diff -uNr 18_backtrace/Makefile 19_kernel_heap/Makefile
 --- 18_backtrace/Makefile
 +++ 19_kernel_heap/Makefile
diff --git a/19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2.rs b/19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2.rs
index 69ba8513c..fee8bb4cc 100644
--- a/19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2.rs
+++ b/19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2.rs
@@ -80,7 +80,8 @@ mod gicc;
 mod gicd;
 
 use crate::{
-    bsp, cpu, driver, exception,
+    bsp::{self, device_driver::common::BoundedUsize},
+    cpu, driver, exception,
     memory::{Address, Virtual},
     synchronization,
     synchronization::InitStateLock,
@@ -91,14 +92,14 @@ use alloc::vec::Vec;
 // Private Definitions
 //--------------------------------------------------------------------------------------------------
 
-type HandlerTable = Vec<Option<exception::asynchronous::IRQDescriptor>>;
+type HandlerTable = Vec<Option<exception::asynchronous::IRQHandlerDescriptor<IRQNumber>>>;
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
 /// Used for the associated type of trait [`exception::asynchronous::interface::IRQManager`].
-pub type IRQNumber = exception::asynchronous::IRQNumber<{ GICv2::MAX_IRQ_NUMBER }>;
+pub type IRQNumber = BoundedUsize<{ GICv2::MAX_IRQ_NUMBER }>;
 
 /// Representation of the GIC.
 pub struct GICv2 {
@@ -110,9 +111,6 @@ pub struct GICv2 {
 
     /// Stores registered IRQ handlers. Writable only during kernel init. RO afterwards.
     handler_table: InitStateLock<HandlerTable>,
-
-    /// Callback to be invoked after successful init.
-    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -132,13 +130,11 @@ impl GICv2 {
     pub const unsafe fn new(
         gicd_mmio_start_addr: Address<Virtual>,
         gicc_mmio_start_addr: Address<Virtual>,
-        post_init_callback: fn(),
     ) -> Self {
         Self {
             gicd: gicd::GICD::new(gicd_mmio_start_addr),
             gicc: gicc::GICC::new(gicc_mmio_start_addr),
             handler_table: InitStateLock::new(Vec::new()),
-            post_init_callback,
         }
     }
 }
@@ -149,13 +145,15 @@ impl GICv2 {
 use synchronization::interface::ReadWriteEx;
 
 impl driver::interface::DeviceDriver for GICv2 {
+    type IRQNumberType = IRQNumber;
+
     fn compatible(&self) -> &'static str {
         Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
         self.handler_table
-            .write(|table| table.resize(IRQNumber::NUM_TOTAL, None));
+            .write(|table| table.resize(IRQNumber::MAX_INCLUSIVE + 1, None));
 
         if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
             self.gicd.boot_core_init();
@@ -164,8 +162,6 @@ impl driver::interface::DeviceDriver for GICv2 {
         self.gicc.priority_accept_all();
         self.gicc.enable();
 
-        (self.post_init_callback)();
-
         Ok(())
     }
 }
@@ -175,23 +171,22 @@ impl exception::asynchronous::interface::IRQManager for GICv2 {
 
     fn register_handler(
         &self,
-        irq_number: Self::IRQNumberType,
-        descriptor: exception::asynchronous::IRQDescriptor,
+        irq_handler_descriptor: exception::asynchronous::IRQHandlerDescriptor<Self::IRQNumberType>,
     ) -> Result<(), &'static str> {
         self.handler_table.write(|table| {
-            let irq_number = irq_number.get();
+            let irq_number = irq_handler_descriptor.number().get();
 
             if table[irq_number].is_some() {
                 return Err("IRQ handler already registered");
             }
 
-            table[irq_number] = Some(descriptor);
+            table[irq_number] = Some(irq_handler_descriptor);
 
             Ok(())
         })
     }
 
-    fn enable(&self, irq_number: Self::IRQNumberType) {
+    fn enable(&self, irq_number: &Self::IRQNumberType) {
         self.gicd.enable(irq_number);
     }
 
@@ -214,7 +209,7 @@ impl exception::asynchronous::interface::IRQManager for GICv2 {
                 None => panic!("No handler registered for IRQ {}", irq_number),
                 Some(descriptor) => {
                     // Call the IRQ handler. Panics on failure.
-                    descriptor.handler.handle().expect("Error handling IRQ");
+                    descriptor.handler().handle().expect("Error handling IRQ");
                 }
             }
         });
@@ -231,7 +226,7 @@ impl exception::asynchronous::interface::IRQManager for GICv2 {
         self.handler_table.read(|table| {
             for (i, opt) in table.iter().skip(32).enumerate() {
                 if let Some(handler) = opt {
-                    info!("            {: >3}. {}", i + 32, handler.name);
+                    info!("            {: >3}. {}", i + 32, handler.name());
                 }
             }
         });
diff --git a/19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs b/19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
index a9c97a8e3..8aebcf2b6 100644
--- a/19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
+++ b/19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -172,7 +172,7 @@ impl GICD {
     }
 
     /// Enable an interrupt.
-    pub fn enable(&self, irq_num: super::IRQNumber) {
+    pub fn enable(&self, irq_num: &super::IRQNumber) {
         let irq_num = irq_num.get();
 
         // Each bit in the u32 enable register corresponds to one IRQ number. Shift right by 5
diff --git a/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 2281e66a3..fb61a6510 100644
--- a/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -7,6 +7,7 @@
 use crate::{
     bsp::device_driver::common::MMIODerefWrapper,
     driver,
+    exception::asynchronous::IRQNumber,
     memory::{Address, Virtual},
     synchronization,
     synchronization::IRQSafeNullLock,
@@ -122,7 +123,6 @@ struct GPIOInner {
 /// Representation of the GPIO HW.
 pub struct GPIO {
     inner: IRQSafeNullLock<GPIOInner>,
-    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -202,10 +202,9 @@ impl GPIO {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    pub const unsafe fn new(mmio_start_addr: Address<Virtual>, post_init_callback: fn()) -> Self {
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
         Self {
             inner: IRQSafeNullLock::new(GPIOInner::new(mmio_start_addr)),
-            post_init_callback,
         }
     }
 
@@ -221,13 +220,9 @@ impl GPIO {
 use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for GPIO {
+    type IRQNumberType = IRQNumber;
+
     fn compatible(&self) -> &'static str {
         Self::COMPATIBLE
     }
-
-    unsafe fn init(&self) -> Result<(), &'static str> {
-        (self.post_init_callback)();
-
-        Ok(())
-    }
 }
diff --git a/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
index 658d3705f..a03b472ae 100644
--- a/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+++ b/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -7,9 +7,12 @@
 mod peripheral_ic;
 
 use crate::{
-    driver, exception,
+    bsp::device_driver::common::BoundedUsize,
+    driver,
+    exception::{self, asynchronous::IRQHandlerDescriptor},
     memory::{Address, Virtual},
 };
+use core::fmt;
 
 //--------------------------------------------------------------------------------------------------
 // Private Definitions
@@ -24,10 +27,8 @@ struct PendingIRQs {
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
-pub type LocalIRQ =
-    exception::asynchronous::IRQNumber<{ InterruptController::MAX_LOCAL_IRQ_NUMBER }>;
-pub type PeripheralIRQ =
-    exception::asynchronous::IRQNumber<{ InterruptController::MAX_PERIPHERAL_IRQ_NUMBER }>;
+pub type LocalIRQ = BoundedUsize<{ InterruptController::MAX_LOCAL_IRQ_NUMBER }>;
+pub type PeripheralIRQ = BoundedUsize<{ InterruptController::MAX_PERIPHERAL_IRQ_NUMBER }>;
 
 /// Used for the associated type of trait [`exception::asynchronous::interface::IRQManager`].
 #[derive(Copy, Clone)]
@@ -40,7 +41,6 @@ pub enum IRQNumber {
 /// Representation of the Interrupt Controller.
 pub struct InterruptController {
     periph: peripheral_ic::PeripheralIC,
-    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -71,6 +71,15 @@ impl Iterator for PendingIRQs {
 // Public Code
 //--------------------------------------------------------------------------------------------------
 
+impl fmt::Display for IRQNumber {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        match self {
+            Self::Local(number) => write!(f, "Local({})", number),
+            Self::Peripheral(number) => write!(f, "Peripheral({})", number),
+        }
+    }
+}
+
 impl InterruptController {
     // Restrict to 3 for now. This makes future code for local_ic.rs more straight forward.
     const MAX_LOCAL_IRQ_NUMBER: usize = 3;
@@ -83,13 +92,9 @@ impl InterruptController {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    pub const unsafe fn new(
-        periph_mmio_start_addr: Address<Virtual>,
-        post_init_callback: fn(),
-    ) -> Self {
+    pub const unsafe fn new(periph_mmio_start_addr: Address<Virtual>) -> Self {
         Self {
             periph: peripheral_ic::PeripheralIC::new(periph_mmio_start_addr),
-            post_init_callback,
         }
     }
 }
@@ -99,6 +104,8 @@ impl InterruptController {
 //------------------------------------------------------------------------------
 
 impl driver::interface::DeviceDriver for InterruptController {
+    type IRQNumberType = IRQNumber;
+
     fn compatible(&self) -> &'static str {
         Self::COMPATIBLE
     }
@@ -106,8 +113,6 @@ impl driver::interface::DeviceDriver for InterruptController {
     unsafe fn init(&self) -> Result<(), &'static str> {
         self.periph.init();
 
-        (self.post_init_callback)();
-
         Ok(())
     }
 }
@@ -117,16 +122,23 @@ impl exception::asynchronous::interface::IRQManager for InterruptController {
 
     fn register_handler(
         &self,
-        irq: Self::IRQNumberType,
-        descriptor: exception::asynchronous::IRQDescriptor,
+        irq_handler_descriptor: exception::asynchronous::IRQHandlerDescriptor<Self::IRQNumberType>,
     ) -> Result<(), &'static str> {
-        match irq {
+        match irq_handler_descriptor.number() {
             IRQNumber::Local(_) => unimplemented!("Local IRQ controller not implemented."),
-            IRQNumber::Peripheral(pirq) => self.periph.register_handler(pirq, descriptor),
+            IRQNumber::Peripheral(pirq) => {
+                let periph_descriptor = IRQHandlerDescriptor::new(
+                    pirq,
+                    irq_handler_descriptor.name(),
+                    irq_handler_descriptor.handler(),
+                );
+
+                self.periph.register_handler(periph_descriptor)
+            }
         }
     }
 
-    fn enable(&self, irq: Self::IRQNumberType) {
+    fn enable(&self, irq: &Self::IRQNumberType) {
         match irq {
             IRQNumber::Local(_) => unimplemented!("Local IRQ controller not implemented."),
             IRQNumber::Peripheral(pirq) => self.periph.enable(pirq),
diff --git a/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index 90b563788..238088a8c 100644
--- a/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -53,7 +53,7 @@ type WriteOnlyRegisters = MMIODerefWrapper<WORegisterBlock>;
 /// Abstraction for the ReadOnly parts of the associated MMIO registers.
 type ReadOnlyRegisters = MMIODerefWrapper<RORegisterBlock>;
 
-type HandlerTable = Vec<Option<exception::asynchronous::IRQDescriptor>>;
+type HandlerTable = Vec<Option<exception::asynchronous::IRQHandlerDescriptor<PeripheralIRQ>>>;
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -92,7 +92,7 @@ impl PeripheralIC {
     /// Called by the kernel to bring up the device.
     pub fn init(&self) {
         self.handler_table
-            .write(|table| table.resize(PeripheralIRQ::NUM_TOTAL, None));
+            .write(|table| table.resize(PeripheralIRQ::MAX_INCLUSIVE + 1, None));
     }
 
     /// Query the list of pending IRQs.
@@ -114,23 +114,22 @@ impl exception::asynchronous::interface::IRQManager for PeripheralIC {
 
     fn register_handler(
         &self,
-        irq: Self::IRQNumberType,
-        descriptor: exception::asynchronous::IRQDescriptor,
+        irq_handler_descriptor: exception::asynchronous::IRQHandlerDescriptor<Self::IRQNumberType>,
     ) -> Result<(), &'static str> {
         self.handler_table.write(|table| {
-            let irq_number = irq.get();
+            let irq_number = irq_handler_descriptor.number().get();
 
             if table[irq_number].is_some() {
                 return Err("IRQ handler already registered");
             }
 
-            table[irq_number] = Some(descriptor);
+            table[irq_number] = Some(irq_handler_descriptor);
 
             Ok(())
         })
     }
 
-    fn enable(&self, irq: Self::IRQNumberType) {
+    fn enable(&self, irq: &Self::IRQNumberType) {
         self.wo_registers.lock(|regs| {
             let enable_reg = if irq.get() <= 31 {
                 &regs.ENABLE_1
@@ -156,7 +155,7 @@ impl exception::asynchronous::interface::IRQManager for PeripheralIC {
                     None => panic!("No handler registered for IRQ {}", irq_number),
                     Some(descriptor) => {
                         // Call the IRQ handler. Panics on failure.
-                        descriptor.handler.handle().expect("Error handling IRQ");
+                        descriptor.handler().handle().expect("Error handling IRQ");
                     }
                 }
             }
@@ -171,7 +170,7 @@ impl exception::asynchronous::interface::IRQManager for PeripheralIC {
         self.handler_table.read(|table| {
             for (i, opt) in table.iter().enumerate() {
                 if let Some(handler) = opt {
-                    info!("            {: >3}. {}", i, handler.name);
+                    info!("            {: >3}. {}", i, handler.name());
                 }
             }
         });
diff --git a/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 265930398..3e7e1812c 100644
--- a/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -10,9 +10,9 @@
 //! - <https://developer.arm.com/documentation/ddi0183/latest>
 
 use crate::{
-    bsp,
     bsp::device_driver::common::MMIODerefWrapper,
-    console, cpu, driver, exception,
+    console, cpu, driver,
+    exception::{self, asynchronous::IRQNumber},
     memory::{Address, Virtual},
     synchronization,
     synchronization::IRQSafeNullLock,
@@ -233,8 +233,6 @@ struct PL011UartInner {
 /// Representation of the UART.
 pub struct PL011Uart {
     inner: IRQSafeNullLock<PL011UartInner>,
-    irq_number: bsp::device_driver::IRQNumber,
-    post_init_callback: fn(),
 }
 
 //--------------------------------------------------------------------------------------------------
@@ -405,16 +403,9 @@ impl PL011Uart {
     /// # Safety
     ///
     /// - The user must ensure to provide a correct MMIO start address.
-    /// - The user must ensure to provide correct IRQ numbers.
-    pub const unsafe fn new(
-        mmio_start_addr: Address<Virtual>,
-        irq_number: bsp::device_driver::IRQNumber,
-        post_init_callback: fn(),
-    ) -> Self {
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
         Self {
             inner: IRQSafeNullLock::new(PL011UartInner::new(mmio_start_addr)),
-            irq_number,
-            post_init_callback,
         }
     }
 }
@@ -425,27 +416,28 @@ impl PL011Uart {
 use synchronization::interface::Mutex;
 
 impl driver::interface::DeviceDriver for PL011Uart {
+    type IRQNumberType = IRQNumber;
+
     fn compatible(&self) -> &'static str {
         Self::COMPATIBLE
     }
 
     unsafe fn init(&self) -> Result<(), &'static str> {
         self.inner.lock(|inner| inner.init());
-        (self.post_init_callback)();
 
         Ok(())
     }
 
-    fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
-        use exception::asynchronous::{irq_manager, IRQDescriptor};
+    fn register_and_enable_irq_handler(
+        &'static self,
+        irq_number: &Self::IRQNumberType,
+    ) -> Result<(), &'static str> {
+        use exception::asynchronous::{irq_manager, IRQHandlerDescriptor};
 
-        let descriptor = IRQDescriptor {
-            name: Self::COMPATIBLE,
-            handler: self,
-        };
+        let descriptor = IRQHandlerDescriptor::new(*irq_number, Self::COMPATIBLE, self);
 
-        irq_manager().register_handler(self.irq_number, descriptor)?;
-        irq_manager().enable(self.irq_number);
+        irq_manager().register_handler(descriptor)?;
+        irq_manager().enable(irq_number);
 
         Ok(())
     }
diff --git a/19_kernel_heap/kernel/src/bsp/device_driver/common.rs b/19_kernel_heap/kernel/src/bsp/device_driver/common.rs
index 69f038d4d..ca7aeb76a 100644
--- a/19_kernel_heap/kernel/src/bsp/device_driver/common.rs
+++ b/19_kernel_heap/kernel/src/bsp/device_driver/common.rs
@@ -5,7 +5,7 @@
 //! Common device driver code.
 
 use crate::memory::{Address, Virtual};
-use core::{marker::PhantomData, ops};
+use core::{fmt, marker::PhantomData, ops};
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -16,6 +16,10 @@ pub struct MMIODerefWrapper<T> {
     phantom: PhantomData<fn() -> T>,
 }
 
+/// A wrapper type for usize with integrated range bound check.
+#[derive(Copy, Clone)]
+pub struct BoundedUsize<const MAX_INCLUSIVE: usize>(usize);
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
@@ -37,3 +41,25 @@ impl<T> ops::Deref for MMIODerefWrapper<T> {
         unsafe { &*(self.start_addr.as_usize() as *const _) }
     }
 }
+
+impl<const MAX_INCLUSIVE: usize> BoundedUsize<{ MAX_INCLUSIVE }> {
+    pub const MAX_INCLUSIVE: usize = MAX_INCLUSIVE;
+
+    /// Creates a new instance if number <= MAX_INCLUSIVE.
+    pub const fn new(number: usize) -> Self {
+        assert!(number <= MAX_INCLUSIVE);
+
+        Self(number)
+    }
+
+    /// Return the wrapped number.
+    pub const fn get(self) -> usize {
+        self.0
+    }
+}
+
+impl<const MAX_INCLUSIVE: usize> fmt::Display for BoundedUsize<{ MAX_INCLUSIVE }> {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        write!(f, "{}", self.0)
+    }
+}
diff --git a/19_kernel_heap/kernel/src/bsp/raspberrypi/driver.rs b/19_kernel_heap/kernel/src/bsp/raspberrypi/driver.rs
index 5571c3929..ca3435aae 100644
--- a/19_kernel_heap/kernel/src/bsp/raspberrypi/driver.rs
+++ b/19_kernel_heap/kernel/src/bsp/raspberrypi/driver.rs
@@ -7,28 +7,16 @@
 use super::{exception, memory::map::mmio};
 use crate::{
     bsp::device_driver,
-    console, driver, exception as generic_exception, memory,
+    console, driver as generic_driver,
+    exception::{self as generic_exception},
+    memory,
     memory::mmu::MMIODescriptor,
-    synchronization::{interface::ReadWriteEx, InitStateLock},
 };
-use alloc::vec::Vec;
 use core::{
     mem::MaybeUninit,
     sync::atomic::{AtomicBool, Ordering},
 };
 
-pub use device_driver::IRQNumber;
-
-//--------------------------------------------------------------------------------------------------
-// Private Definitions
-//--------------------------------------------------------------------------------------------------
-
-/// Device Driver Manager type.
-struct BSPDriverManager {
-    device_drivers: InitStateLock<Vec<&'static (dyn DeviceDriver + Sync)>>,
-    init_done: AtomicBool,
-}
-
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
@@ -43,149 +31,154 @@ static mut INTERRUPT_CONTROLLER: MaybeUninit<device_driver::InterruptController>
 #[cfg(feature = "bsp_rpi4")]
 static mut INTERRUPT_CONTROLLER: MaybeUninit<device_driver::GICv2> = MaybeUninit::uninit();
 
-static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
-    device_drivers: InitStateLock::new(Vec::new()),
-    init_done: AtomicBool::new(false),
-};
-
 //--------------------------------------------------------------------------------------------------
 // Private Code
 //--------------------------------------------------------------------------------------------------
 
-impl BSPDriverManager {
-    unsafe fn instantiate_uart(&self) -> Result<(), &'static str> {
-        let mmio_descriptor = MMIODescriptor::new(mmio::PL011_UART_START, mmio::PL011_UART_SIZE);
-        let virt_addr =
-            memory::mmu::kernel_map_mmio(device_driver::PL011Uart::COMPATIBLE, &mmio_descriptor)?;
+/// This must be called only after successful init of the memory subsystem.
+unsafe fn instantiate_uart() -> Result<(), &'static str> {
+    let mmio_descriptor = MMIODescriptor::new(mmio::PL011_UART_START, mmio::PL011_UART_SIZE);
+    let virt_addr =
+        memory::mmu::kernel_map_mmio(device_driver::PL011Uart::COMPATIBLE, &mmio_descriptor)?;
 
-        // This is safe to do, because it is only called from the init'ed instance itself.
-        fn uart_post_init() {
-            console::register_console(unsafe { PL011_UART.assume_init_ref() });
-        }
+    PL011_UART.write(device_driver::PL011Uart::new(virt_addr));
 
-        PL011_UART.write(device_driver::PL011Uart::new(
-            virt_addr,
-            exception::asynchronous::irq_map::PL011_UART,
-            uart_post_init,
-        ));
+    Ok(())
+}
 
-        Ok(())
-    }
+/// This must be called only after successful init of the UART driver.
+unsafe fn post_init_uart() -> Result<(), &'static str> {
+    console::register_console(PL011_UART.assume_init_ref());
 
-    unsafe fn instantiate_gpio(&self) -> Result<(), &'static str> {
-        let mmio_descriptor = MMIODescriptor::new(mmio::GPIO_START, mmio::GPIO_SIZE);
-        let virt_addr =
-            memory::mmu::kernel_map_mmio(device_driver::GPIO::COMPATIBLE, &mmio_descriptor)?;
+    Ok(())
+}
 
-        // This is safe to do, because it is only called from the init'ed instance itself.
-        fn gpio_post_init() {
-            unsafe { GPIO.assume_init_ref().map_pl011_uart() };
-        }
+/// This must be called only after successful init of the memory subsystem.
+unsafe fn instantiate_gpio() -> Result<(), &'static str> {
+    let mmio_descriptor = MMIODescriptor::new(mmio::GPIO_START, mmio::GPIO_SIZE);
+    let virt_addr =
+        memory::mmu::kernel_map_mmio(device_driver::GPIO::COMPATIBLE, &mmio_descriptor)?;
 
-        GPIO.write(device_driver::GPIO::new(virt_addr, gpio_post_init));
+    GPIO.write(device_driver::GPIO::new(virt_addr));
 
-        Ok(())
-    }
+    Ok(())
+}
 
-    #[cfg(feature = "bsp_rpi3")]
-    unsafe fn instantiate_interrupt_controller(&self) -> Result<(), &'static str> {
-        let periph_mmio_descriptor =
-            MMIODescriptor::new(mmio::PERIPHERAL_IC_START, mmio::PERIPHERAL_IC_SIZE);
-        let periph_virt_addr = memory::mmu::kernel_map_mmio(
-            device_driver::InterruptController::COMPATIBLE,
-            &periph_mmio_descriptor,
-        )?;
-
-        // This is safe to do, because it is only called from the init'ed instance itself.
-        fn interrupt_controller_post_init() {
-            generic_exception::asynchronous::register_irq_manager(unsafe {
-                INTERRUPT_CONTROLLER.assume_init_ref()
-            });
-        }
-
-        INTERRUPT_CONTROLLER.write(device_driver::InterruptController::new(
-            periph_virt_addr,
-            interrupt_controller_post_init,
-        ));
-
-        Ok(())
-    }
+/// This must be called only after successful init of the GPIO driver.
+unsafe fn post_init_gpio() -> Result<(), &'static str> {
+    GPIO.assume_init_ref().map_pl011_uart();
+    Ok(())
+}
 
-    #[cfg(feature = "bsp_rpi4")]
-    unsafe fn instantiate_interrupt_controller(&self) -> Result<(), &'static str> {
-        let gicd_mmio_descriptor = MMIODescriptor::new(mmio::GICD_START, mmio::GICD_SIZE);
-        let gicd_virt_addr = memory::mmu::kernel_map_mmio("GICv2 GICD", &gicd_mmio_descriptor)?;
+/// This must be called only after successful init of the memory subsystem.
+#[cfg(feature = "bsp_rpi3")]
+unsafe fn instantiate_interrupt_controller() -> Result<(), &'static str> {
+    let periph_mmio_descriptor =
+        MMIODescriptor::new(mmio::PERIPHERAL_IC_START, mmio::PERIPHERAL_IC_SIZE);
+    let periph_virt_addr = memory::mmu::kernel_map_mmio(
+        device_driver::InterruptController::COMPATIBLE,
+        &periph_mmio_descriptor,
+    )?;
 
-        let gicc_mmio_descriptor = MMIODescriptor::new(mmio::GICC_START, mmio::GICC_SIZE);
-        let gicc_virt_addr = memory::mmu::kernel_map_mmio("GICV2 GICC", &gicc_mmio_descriptor)?;
+    INTERRUPT_CONTROLLER.write(device_driver::InterruptController::new(periph_virt_addr));
 
-        // This is safe to do, because it is only called from the init'ed instance itself.
-        fn interrupt_controller_post_init() {
-            generic_exception::asynchronous::register_irq_manager(unsafe {
-                INTERRUPT_CONTROLLER.assume_init_ref()
-            });
-        }
+    Ok(())
+}
 
-        INTERRUPT_CONTROLLER.write(device_driver::GICv2::new(
-            gicd_virt_addr,
-            gicc_virt_addr,
-            interrupt_controller_post_init,
-        ));
+/// This must be called only after successful init of the memory subsystem.
+#[cfg(feature = "bsp_rpi4")]
+unsafe fn instantiate_interrupt_controller() -> Result<(), &'static str> {
+    let gicd_mmio_descriptor = MMIODescriptor::new(mmio::GICD_START, mmio::GICD_SIZE);
+    let gicd_virt_addr = memory::mmu::kernel_map_mmio("GICv2 GICD", &gicd_mmio_descriptor)?;
 
-        Ok(())
-    }
+    let gicc_mmio_descriptor = MMIODescriptor::new(mmio::GICC_START, mmio::GICC_SIZE);
+    let gicc_virt_addr = memory::mmu::kernel_map_mmio("GICV2 GICC", &gicc_mmio_descriptor)?;
 
-    unsafe fn register_drivers(&self) {
-        self.device_drivers.write(|drivers| {
-            drivers.push(PL011_UART.assume_init_ref());
-            drivers.push(GPIO.assume_init_ref());
-            drivers.push(INTERRUPT_CONTROLLER.assume_init_ref());
-        });
-    }
+    INTERRUPT_CONTROLLER.write(device_driver::GICv2::new(gicd_virt_addr, gicc_virt_addr));
+
+    Ok(())
 }
 
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
+/// This must be called only after successful init of the interrupt controller driver.
+unsafe fn post_init_interrupt_controller() -> Result<(), &'static str> {
+    generic_exception::asynchronous::register_irq_manager(INTERRUPT_CONTROLLER.assume_init_ref());
 
-/// Return a reference to the driver manager.
-pub fn driver_manager() -> &'static impl driver::interface::DriverManager {
-    &BSP_DRIVER_MANAGER
+    Ok(())
 }
 
-//------------------------------------------------------------------------------
-// OS Interface Code
-//------------------------------------------------------------------------------
-use driver::interface::DeviceDriver;
+/// Function needs to ensure that driver registration happens only after correct instantiation.
+unsafe fn driver_uart() -> Result<(), &'static str> {
+    instantiate_uart()?;
+
+    let uart_descriptor = generic_driver::DeviceDriverDescriptor::new(
+        PL011_UART.assume_init_ref(),
+        Some(post_init_uart),
+        Some(exception::asynchronous::irq_map::PL011_UART),
+    );
+    generic_driver::driver_manager().register_driver(uart_descriptor);
 
-impl driver::interface::DriverManager for BSPDriverManager {
-    unsafe fn instantiate_drivers(&self) -> Result<(), &'static str> {
-        if self.init_done.load(Ordering::Relaxed) {
-            return Err("Drivers already instantiated");
-        }
+    Ok(())
+}
 
-        self.instantiate_uart()?;
-        self.instantiate_gpio()?;
-        self.instantiate_interrupt_controller()?;
+/// Function needs to ensure that driver registration happens only after correct instantiation.
+unsafe fn driver_gpio() -> Result<(), &'static str> {
+    instantiate_gpio()?;
 
-        self.register_drivers();
+    let gpio_descriptor = generic_driver::DeviceDriverDescriptor::new(
+        GPIO.assume_init_ref(),
+        Some(post_init_gpio),
+        None,
+    );
+    generic_driver::driver_manager().register_driver(gpio_descriptor);
 
-        self.init_done.store(true, Ordering::Relaxed);
-        Ok(())
-    }
+    Ok(())
+}
 
-    fn all_device_drivers(&self) -> &Vec<&(dyn DeviceDriver + Sync)> {
-        self.device_drivers.read(|drivers| drivers)
-    }
+/// Function needs to ensure that driver registration happens only after correct instantiation.
+unsafe fn driver_interrupt_controller() -> Result<(), &'static str> {
+    instantiate_interrupt_controller()?;
+
+    let interrupt_controller_descriptor = generic_driver::DeviceDriverDescriptor::new(
+        INTERRUPT_CONTROLLER.assume_init_ref(),
+        Some(post_init_interrupt_controller),
+        None,
+    );
+    generic_driver::driver_manager().register_driver(interrupt_controller_descriptor);
 
-    #[cfg(feature = "test_build")]
-    fn qemu_bring_up_console(&self) {
-        use crate::cpu;
+    Ok(())
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
 
-        unsafe {
-            self.instantiate_uart()
-                .unwrap_or_else(|_| cpu::qemu_exit_failure());
-            console::register_console(PL011_UART.assume_init_ref());
-        };
+/// Initialize the driver subsystem.
+///
+/// # Safety
+///
+/// See child function calls.
+pub unsafe fn init() -> Result<(), &'static str> {
+    static INIT_DONE: AtomicBool = AtomicBool::new(false);
+    if INIT_DONE.load(Ordering::Relaxed) {
+        return Err("Init already done");
     }
+
+    driver_uart()?;
+    driver_gpio()?;
+    driver_interrupt_controller()?;
+
+    INIT_DONE.store(true, Ordering::Relaxed);
+    Ok(())
+}
+
+/// Minimal code needed to bring up the console in QEMU (for testing only). This is often less steps
+/// than on real hardware due to QEMU's abstractions.
+#[cfg(feature = "test_build")]
+pub fn qemu_bring_up_console() {
+    use crate::cpu;
+
+    unsafe {
+        instantiate_uart().unwrap_or_else(|_| cpu::qemu_exit_failure());
+        console::register_console(PL011_UART.assume_init_ref());
+    };
 }
diff --git a/19_kernel_heap/kernel/src/bsp/raspberrypi/exception/asynchronous.rs b/19_kernel_heap/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
index ab20d86d3..06a675588 100644
--- a/19_kernel_heap/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
+++ b/19_kernel_heap/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
@@ -10,6 +10,9 @@ use crate::bsp;
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
+/// Export for reuse in generic asynchronous.rs.
+pub use bsp::device_driver::IRQNumber;
+
 #[cfg(feature = "bsp_rpi3")]
 pub(in crate::bsp) mod irq_map {
     use super::bsp::device_driver::{IRQNumber, PeripheralIRQ};
diff --git a/19_kernel_heap/kernel/src/driver.rs b/19_kernel_heap/kernel/src/driver.rs
index d884d4718..2f22fd205 100644
--- a/19_kernel_heap/kernel/src/driver.rs
+++ b/19_kernel_heap/kernel/src/driver.rs
@@ -4,16 +4,24 @@
 
 //! Driver support.
 
+use crate::{
+    exception, info,
+    synchronization::{interface::ReadWriteEx, InitStateLock},
+};
+use alloc::vec::Vec;
+use core::fmt;
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
 /// Driver interfaces.
 pub mod interface {
-    use alloc::vec::Vec;
-
     /// Device Driver functions.
     pub trait DeviceDriver {
+        /// Different interrupt controllers might use different types for IRQ number.
+        type IRQNumberType: super::fmt::Display;
+
         /// Return a compatibility string for identifying the driver.
         fn compatible(&self) -> &'static str;
 
@@ -26,32 +34,145 @@ pub mod interface {
             Ok(())
         }
 
-        /// Called by the kernel to register and enable the device's IRQ handlers, if any.
+        /// Called by the kernel to register and enable the device's IRQ handler.
         ///
         /// Rust's type system will prevent a call to this function unless the calling instance
         /// itself has static lifetime.
-        fn register_and_enable_irq_handler(&'static self) -> Result<(), &'static str> {
-            Ok(())
+        fn register_and_enable_irq_handler(
+            &'static self,
+            irq_number: &Self::IRQNumberType,
+        ) -> Result<(), &'static str> {
+            panic!(
+                "Attempt to enable IRQ {} for device {}, but driver does not support this",
+                irq_number,
+                self.compatible()
+            )
+        }
+    }
+}
+
+/// Tpye to be used as an optional callback after a driver's init() has run.
+pub type DeviceDriverPostInitCallback = unsafe fn() -> Result<(), &'static str>;
+
+/// A descriptor for device drivers.
+pub struct DeviceDriverDescriptor<T>
+where
+    T: 'static,
+{
+    device_driver: &'static (dyn interface::DeviceDriver<IRQNumberType = T> + Sync),
+    post_init_callback: Option<DeviceDriverPostInitCallback>,
+    irq_number: Option<T>,
+}
+
+/// Provides device driver management functions.
+pub struct DriverManager<T>
+where
+    T: 'static,
+{
+    descriptors: InitStateLock<Vec<DeviceDriverDescriptor<T>>>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static DRIVER_MANAGER: DriverManager<exception::asynchronous::IRQNumber> = DriverManager::new();
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl<T> DeviceDriverDescriptor<T> {
+    /// Create an instance.
+    pub fn new(
+        device_driver: &'static (dyn interface::DeviceDriver<IRQNumberType = T> + Sync),
+        post_init_callback: Option<DeviceDriverPostInitCallback>,
+        irq_number: Option<T>,
+    ) -> Self {
+        Self {
+            device_driver,
+            post_init_callback,
+            irq_number,
+        }
+    }
+}
+
+/// Return a reference to the global DriverManager.
+pub fn driver_manager() -> &'static DriverManager<exception::asynchronous::IRQNumber> {
+    &DRIVER_MANAGER
+}
+
+impl<T> DriverManager<T>
+where
+    T: fmt::Display,
+{
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self {
+            descriptors: InitStateLock::new(Vec::new()),
         }
     }
 
-    /// Device driver management functions.
+    /// Register a device driver with the kernel.
+    pub fn register_driver(&self, descriptor: DeviceDriverDescriptor<T>) {
+        self.descriptors
+            .write(|descriptors| descriptors.push(descriptor));
+    }
+
+    /// Fully initialize all drivers and their interrupts handlers.
     ///
-    /// The `BSP` is supposed to supply one global instance.
-    pub trait DriverManager {
-        /// Instantiate all drivers.
-        ///
-        /// # Safety
-        ///
-        /// Must be called before `all_device_drivers`.
-        unsafe fn instantiate_drivers(&self) -> Result<(), &'static str>;
+    /// # Safety
+    ///
+    /// - During init, drivers might do stuff with system-wide impact.
+    pub unsafe fn init_drivers_and_irqs(&self) {
+        self.descriptors.read(|descriptors| {
+            for descriptor in descriptors {
+                // 1. Initialize driver.
+                if let Err(x) = descriptor.device_driver.init() {
+                    panic!(
+                        "Error initializing driver: {}: {}",
+                        descriptor.device_driver.compatible(),
+                        x
+                    );
+                }
 
-        /// Return a vector of references to all `BSP`-instantiated drivers.
-        fn all_device_drivers(&self) -> &Vec<&(dyn DeviceDriver + Sync)>;
+                // 2. Call corresponding post init callback.
+                if let Some(callback) = &descriptor.post_init_callback {
+                    if let Err(x) = callback() {
+                        panic!(
+                            "Error during driver post-init callback: {}: {}",
+                            descriptor.device_driver.compatible(),
+                            x
+                        );
+                    }
+                }
+            }
+
+            // 3. After all post-init callbacks were done, the interrupt controller should be
+            //    registered and functional. So let drivers register with it now.
+            for descriptor in descriptors {
+                if let Some(irq_number) = &descriptor.irq_number {
+                    if let Err(x) = descriptor
+                        .device_driver
+                        .register_and_enable_irq_handler(irq_number)
+                    {
+                        panic!(
+                            "Error during driver interrupt handler registration: {}: {}",
+                            descriptor.device_driver.compatible(),
+                            x
+                        );
+                    }
+                }
+            }
+        })
+    }
 
-        /// Minimal code needed to bring up the console in QEMU (for testing only). This is often
-        /// less steps than on real hardware due to QEMU's abstractions.
-        #[cfg(feature = "test_build")]
-        fn qemu_bring_up_console(&self);
+    /// Enumerate all registered device drivers.
+    pub fn enumerate(&self) {
+        self.descriptors.read(|descriptors| {
+            for (i, desc) in descriptors.iter().enumerate() {
+                info!("      {}. {}", i + 1, desc.device_driver.compatible());
+            }
+        });
     }
 }
diff --git a/19_kernel_heap/kernel/src/exception/asynchronous.rs b/19_kernel_heap/kernel/src/exception/asynchronous.rs
index 83ca1aa6d..c1f2a27b3 100644
--- a/19_kernel_heap/kernel/src/exception/asynchronous.rs
+++ b/19_kernel_heap/kernel/src/exception/asynchronous.rs
@@ -10,7 +10,7 @@ mod arch_asynchronous;
 mod null_irq_manager;
 
 use crate::{bsp, synchronization};
-use core::{fmt, marker::PhantomData};
+use core::marker::PhantomData;
 
 //--------------------------------------------------------------------------------------------------
 // Architectural Public Reexports
@@ -24,14 +24,23 @@ pub use arch_asynchronous::{
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
 
+/// Interrupt number as defined by the BSP.
+pub type IRQNumber = bsp::exception::asynchronous::IRQNumber;
+
 /// Interrupt descriptor.
 #[derive(Copy, Clone)]
-pub struct IRQDescriptor {
+pub struct IRQHandlerDescriptor<T>
+where
+    T: Copy,
+{
+    /// The IRQ number.
+    number: T,
+
     /// Descriptive name.
-    pub name: &'static str,
+    name: &'static str,
 
     /// Reference to handler trait object.
-    pub handler: &'static (dyn interface::IRQHandler + Sync),
+    handler: &'static (dyn interface::IRQHandler + Sync),
 }
 
 /// IRQContext token.
@@ -61,17 +70,16 @@ pub mod interface {
     /// platform's interrupt controller.
     pub trait IRQManager {
         /// The IRQ number type depends on the implementation.
-        type IRQNumberType;
+        type IRQNumberType: Copy;
 
         /// Register a handler.
         fn register_handler(
             &self,
-            irq_number: Self::IRQNumberType,
-            descriptor: super::IRQDescriptor,
+            irq_handler_descriptor: super::IRQHandlerDescriptor<Self::IRQNumberType>,
         ) -> Result<(), &'static str>;
 
         /// Enable an interrupt in the controller.
-        fn enable(&self, irq_number: Self::IRQNumberType);
+        fn enable(&self, irq_number: &Self::IRQNumberType);
 
         /// Handle pending interrupts.
         ///
@@ -91,16 +99,12 @@ pub mod interface {
     }
 }
 
-/// A wrapper type for IRQ numbers with integrated range sanity check.
-#[derive(Copy, Clone)]
-pub struct IRQNumber<const MAX_INCLUSIVE: usize>(usize);
-
 //--------------------------------------------------------------------------------------------------
 // Global instances
 //--------------------------------------------------------------------------------------------------
 
 static CUR_IRQ_MANAGER: InitStateLock<
-    &'static (dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber> + Sync),
+    &'static (dyn interface::IRQManager<IRQNumberType = IRQNumber> + Sync),
 > = InitStateLock::new(&null_irq_manager::NULL_IRQ_MANAGER);
 
 //--------------------------------------------------------------------------------------------------
@@ -108,6 +112,39 @@ static CUR_IRQ_MANAGER: InitStateLock<
 //--------------------------------------------------------------------------------------------------
 use synchronization::{interface::ReadWriteEx, InitStateLock};
 
+impl<T> IRQHandlerDescriptor<T>
+where
+    T: Copy,
+{
+    /// Create an instance.
+    pub const fn new(
+        number: T,
+        name: &'static str,
+        handler: &'static (dyn interface::IRQHandler + Sync),
+    ) -> Self {
+        Self {
+            number,
+            name,
+            handler,
+        }
+    }
+
+    /// Return the number.
+    pub const fn number(&self) -> T {
+        self.number
+    }
+
+    /// Return the name.
+    pub const fn name(&self) -> &'static str {
+        self.name
+    }
+
+    /// Return the handler.
+    pub const fn handler(&self) -> &'static (dyn interface::IRQHandler + Sync) {
+        self.handler
+    }
+}
+
 impl<'irq_context> IRQContext<'irq_context> {
     /// Creates an IRQContext token.
     ///
@@ -125,29 +162,6 @@ impl<'irq_context> IRQContext<'irq_context> {
     }
 }
 
-impl<const MAX_INCLUSIVE: usize> IRQNumber<{ MAX_INCLUSIVE }> {
-    /// The total number of IRQs this type supports.
-    pub const NUM_TOTAL: usize = MAX_INCLUSIVE + 1;
-
-    /// Creates a new instance if number <= MAX_INCLUSIVE.
-    pub const fn new(number: usize) -> Self {
-        assert!(number <= MAX_INCLUSIVE);
-
-        Self(number)
-    }
-
-    /// Return the wrapped number.
-    pub const fn get(self) -> usize {
-        self.0
-    }
-}
-
-impl<const MAX_INCLUSIVE: usize> fmt::Display for IRQNumber<{ MAX_INCLUSIVE }> {
-    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
-        write!(f, "{}", self.0)
-    }
-}
-
 /// Executes the provided closure while IRQs are masked on the executing core.
 ///
 /// While the function temporarily changes the HW state of the executing core, it restores it to the
@@ -163,8 +177,7 @@ pub fn exec_with_irq_masked<T>(f: impl FnOnce() -> T) -> T {
 
 /// Register a new IRQ manager.
 pub fn register_irq_manager(
-    new_manager: &'static (dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber>
-                  + Sync),
+    new_manager: &'static (dyn interface::IRQManager<IRQNumberType = IRQNumber> + Sync),
 ) {
     CUR_IRQ_MANAGER.write(|manager| *manager = new_manager);
 }
@@ -172,6 +185,6 @@ pub fn register_irq_manager(
 /// Return a reference to the currently registered IRQ manager.
 ///
 /// This is the IRQ manager used by the architectural interrupt handling code.
-pub fn irq_manager() -> &'static dyn interface::IRQManager<IRQNumberType = bsp::driver::IRQNumber> {
+pub fn irq_manager() -> &'static dyn interface::IRQManager<IRQNumberType = IRQNumber> {
     CUR_IRQ_MANAGER.read(|manager| *manager)
 }
diff --git a/19_kernel_heap/kernel/src/exception/asynchronous/null_irq_manager.rs b/19_kernel_heap/kernel/src/exception/asynchronous/null_irq_manager.rs
index 560e3ce4b..438f96496 100644
--- a/19_kernel_heap/kernel/src/exception/asynchronous/null_irq_manager.rs
+++ b/19_kernel_heap/kernel/src/exception/asynchronous/null_irq_manager.rs
@@ -4,8 +4,7 @@
 
 //! Null IRQ Manager.
 
-use super::{interface, IRQContext, IRQDescriptor};
-use crate::bsp;
+use super::{interface, IRQContext, IRQHandlerDescriptor};
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -24,17 +23,16 @@ pub static NULL_IRQ_MANAGER: NullIRQManager = NullIRQManager {};
 //--------------------------------------------------------------------------------------------------
 
 impl interface::IRQManager for NullIRQManager {
-    type IRQNumberType = bsp::driver::IRQNumber;
+    type IRQNumberType = super::IRQNumber;
 
     fn register_handler(
         &self,
-        _irq_number: Self::IRQNumberType,
-        _descriptor: IRQDescriptor,
+        _descriptor: IRQHandlerDescriptor<Self::IRQNumberType>,
     ) -> Result<(), &'static str> {
         panic!("No IRQ Manager registered yet");
     }
 
-    fn enable(&self, _irq_number: Self::IRQNumberType) {
+    fn enable(&self, _irq_number: &Self::IRQNumberType) {
         panic!("No IRQ Manager registered yet");
     }
 
diff --git a/19_kernel_heap/kernel/src/lib.rs b/19_kernel_heap/kernel/src/lib.rs
index 8e4195e00..bba0fcc7d 100644
--- a/19_kernel_heap/kernel/src/lib.rs
+++ b/19_kernel_heap/kernel/src/lib.rs
@@ -186,11 +186,9 @@ pub fn test_runner(tests: &[&test_types::UnitTest]) {
 #[cfg(test)]
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
     memory::init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     test_main();
 
diff --git a/19_kernel_heap/kernel/src/main.rs b/19_kernel_heap/kernel/src/main.rs
index d2044c291..9a5fd58a0 100644
--- a/19_kernel_heap/kernel/src/main.rs
+++ b/19_kernel_heap/kernel/src/main.rs
@@ -15,7 +15,7 @@
 
 extern crate alloc;
 
-use libkernel::{bsp, cpu, driver, exception, info, memory, state, time, warn};
+use libkernel::{bsp, cpu, driver, exception, info, memory, state, time};
 
 /// Early init code.
 ///
@@ -27,27 +27,16 @@ use libkernel::{bsp, cpu, driver, exception, info, memory, state, time, warn};
 /// - Printing will not work until the respective driver's MMIO is remapped.
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
     memory::init();
 
-    // Instantiate and init all device drivers.
-    if let Err(x) = bsp::driver::driver_manager().instantiate_drivers() {
-        panic!("Error instantiating drivers: {}", x);
-    }
-    for i in bsp::driver::driver_manager().all_device_drivers().iter() {
-        if let Err(x) = i.init() {
-            panic!("Error loading driver: {}: {}", i.compatible(), x);
-        }
+    // Initialize the BSP driver subsystem.
+    if let Err(x) = bsp::driver::init() {
+        panic!("Error initializing BSP driver subsystem: {}", x);
     }
 
-    // Let device drivers register and enable their handlers with the interrupt controller.
-    for i in bsp::driver::driver_manager().all_device_drivers() {
-        if let Err(msg) = i.register_and_enable_irq_handler() {
-            warn!("Error registering IRQ handler: {}", msg);
-        }
-    }
+    // Initialize all device drivers.
+    driver::driver_manager().init_drivers_and_irqs();
 
     bsp::memory::mmu::kernel_add_mapping_records_for_precomputed();
 
@@ -63,8 +52,6 @@ unsafe fn kernel_init() -> ! {
 
 /// The main function running after the early init.
 fn kernel_main() -> ! {
-    use driver::interface::DriverManager;
-
     info!("{}", libkernel::version());
     info!("Booting on: {}", bsp::board_name());
 
@@ -83,13 +70,7 @@ fn kernel_main() -> ! {
     );
 
     info!("Drivers loaded:");
-    for (i, driver) in bsp::driver::driver_manager()
-        .all_device_drivers()
-        .iter()
-        .enumerate()
-    {
-        info!("      {}. {}", i + 1, driver.compatible());
-    }
+    driver::driver_manager().enumerate();
 
     info!("Registered IRQ handlers:");
     exception::asynchronous::irq_manager().print_handler();
diff --git a/19_kernel_heap/kernel/src/memory/heap_alloc.rs b/19_kernel_heap/kernel/src/memory/heap_alloc.rs
index c290be4df..c0f56d8d6 100644
--- a/19_kernel_heap/kernel/src/memory/heap_alloc.rs
+++ b/19_kernel_heap/kernel/src/memory/heap_alloc.rs
@@ -9,8 +9,10 @@ use crate::{
     memory::{Address, Virtual},
     synchronization,
     synchronization::IRQSafeNullLock,
+    warn,
 };
 use alloc::alloc::{GlobalAlloc, Layout};
+use core::sync::atomic::{AtomicBool, Ordering};
 use linked_list_allocator::Heap as LinkedListHeap;
 
 //--------------------------------------------------------------------------------------------------
@@ -129,9 +131,17 @@ unsafe impl GlobalAlloc for HeapAllocator {
 
 /// Query the BSP for the heap region and initialize the kernel's heap allocator with it.
 pub fn kernel_init_heap_allocator() {
+    static INIT_DONE: AtomicBool = AtomicBool::new(false);
+    if INIT_DONE.load(Ordering::Relaxed) {
+        warn!("Already initialized");
+        return;
+    }
+
     let region = bsp::memory::mmu::virt_heap_region();
 
     KERNEL_HEAP_ALLOCATOR.inner.lock(|inner| unsafe {
         inner.init(region.start_addr().as_usize() as *mut u8, region.size())
     });
+
+    INIT_DONE.store(true, Ordering::Relaxed);
 }
diff --git a/19_kernel_heap/kernel/tests/00_console_sanity.rs b/19_kernel_heap/kernel/tests/00_console_sanity.rs
index 305510cea..2c0225b7a 100644
--- a/19_kernel_heap/kernel/tests/00_console_sanity.rs
+++ b/19_kernel_heap/kernel/tests/00_console_sanity.rs
@@ -11,16 +11,15 @@
 /// Console tests should time out on the I/O harness in case of panic.
 mod panic_wait_forever;
 
-use libkernel::{bsp, console, cpu, driver, exception, memory, print};
+use libkernel::{bsp, console, cpu, exception, memory, print};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
     use console::console;
-    use driver::interface::DriverManager;
 
     exception::handling_init();
     memory::init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     // Handshake
     assert_eq!(console().read_char(), 'A');
diff --git a/19_kernel_heap/kernel/tests/01_timer_sanity.rs b/19_kernel_heap/kernel/tests/01_timer_sanity.rs
index 398993324..8188b9424 100644
--- a/19_kernel_heap/kernel/tests/01_timer_sanity.rs
+++ b/19_kernel_heap/kernel/tests/01_timer_sanity.rs
@@ -11,16 +11,14 @@
 #![test_runner(libkernel::test_runner)]
 
 use core::time::Duration;
-use libkernel::{bsp, cpu, driver, exception, memory, time};
+use libkernel::{bsp, cpu, exception, memory, time};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
     memory::init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
 
diff --git a/19_kernel_heap/kernel/tests/02_exception_sync_page_fault.rs b/19_kernel_heap/kernel/tests/02_exception_sync_page_fault.rs
index a6d15b697..fab44c8f0 100644
--- a/19_kernel_heap/kernel/tests/02_exception_sync_page_fault.rs
+++ b/19_kernel_heap/kernel/tests/02_exception_sync_page_fault.rs
@@ -17,15 +17,13 @@
 /// or indirectly.
 mod panic_exit_success;
 
-use libkernel::{bsp, cpu, driver, exception, info, memory, println};
+use libkernel::{bsp, cpu, exception, info, memory, println};
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
     memory::init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     // This line will be printed as the test header.
     println!("Testing synchronous exception handling by causing a page fault");
diff --git a/19_kernel_heap/kernel/tests/03_exception_restore_sanity.rs b/19_kernel_heap/kernel/tests/03_exception_restore_sanity.rs
index 47dd27149..f176c6a67 100644
--- a/19_kernel_heap/kernel/tests/03_exception_restore_sanity.rs
+++ b/19_kernel_heap/kernel/tests/03_exception_restore_sanity.rs
@@ -12,7 +12,7 @@
 mod panic_wait_forever;
 
 use core::arch::asm;
-use libkernel::{bsp, cpu, driver, exception, info, memory, println};
+use libkernel::{bsp, cpu, exception, info, memory, println};
 
 #[inline(never)]
 fn nested_system_call() {
@@ -30,11 +30,9 @@ fn nested_system_call() {
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
     memory::init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     // This line will be printed as the test header.
     println!("Testing exception restore");
diff --git a/19_kernel_heap/kernel/tests/04_exception_irq_sanity.rs b/19_kernel_heap/kernel/tests/04_exception_irq_sanity.rs
index e93a4caf6..e6f94c91f 100644
--- a/19_kernel_heap/kernel/tests/04_exception_irq_sanity.rs
+++ b/19_kernel_heap/kernel/tests/04_exception_irq_sanity.rs
@@ -10,15 +10,13 @@
 #![reexport_test_harness_main = "test_main"]
 #![test_runner(libkernel::test_runner)]
 
-use libkernel::{bsp, cpu, driver, exception, memory};
+use libkernel::{bsp, cpu, exception, memory};
 use test_macros::kernel_test;
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     memory::init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     exception::handling_init();
     exception::asynchronous::local_irq_unmask();
diff --git a/19_kernel_heap/kernel/tests/05_backtrace_sanity.rs b/19_kernel_heap/kernel/tests/05_backtrace_sanity.rs
index ea425f687..f75c0ea3e 100644
--- a/19_kernel_heap/kernel/tests/05_backtrace_sanity.rs
+++ b/19_kernel_heap/kernel/tests/05_backtrace_sanity.rs
@@ -11,7 +11,7 @@
 /// Console tests should time out on the I/O harness in case of panic.
 mod panic_wait_forever;
 
-use libkernel::{bsp, cpu, driver, exception, memory};
+use libkernel::{bsp, cpu, exception, memory};
 
 #[inline(never)]
 fn nested() {
@@ -20,11 +20,9 @@ fn nested() {
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
     memory::init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     nested();
 
diff --git a/19_kernel_heap/kernel/tests/06_backtrace_invalid_frame.rs b/19_kernel_heap/kernel/tests/06_backtrace_invalid_frame.rs
index 8769c7b6e..33d3c02df 100644
--- a/19_kernel_heap/kernel/tests/06_backtrace_invalid_frame.rs
+++ b/19_kernel_heap/kernel/tests/06_backtrace_invalid_frame.rs
@@ -11,7 +11,7 @@
 /// Console tests should time out on the I/O harness in case of panic.
 mod panic_wait_forever;
 
-use libkernel::{backtrace, bsp, cpu, driver, exception, memory};
+use libkernel::{backtrace, bsp, cpu, exception, memory};
 
 #[inline(never)]
 fn nested() {
@@ -22,11 +22,9 @@ fn nested() {
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
     memory::init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     nested();
 
diff --git a/19_kernel_heap/kernel/tests/07_backtrace_invalid_link.rs b/19_kernel_heap/kernel/tests/07_backtrace_invalid_link.rs
index 28f3cddab..bcb0538a6 100644
--- a/19_kernel_heap/kernel/tests/07_backtrace_invalid_link.rs
+++ b/19_kernel_heap/kernel/tests/07_backtrace_invalid_link.rs
@@ -11,7 +11,7 @@
 /// Console tests should time out on the I/O harness in case of panic.
 mod panic_wait_forever;
 
-use libkernel::{backtrace, bsp, cpu, driver, exception, memory};
+use libkernel::{backtrace, bsp, cpu, exception, memory};
 
 #[inline(never)]
 fn nested_2() -> &'static str {
@@ -27,11 +27,9 @@ fn nested_1() {
 
 #[no_mangle]
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
     exception::handling_init();
     memory::init();
-    bsp::driver::driver_manager().qemu_bring_up_console();
+    bsp::driver::qemu_bring_up_console();
 
     nested_1();
 
diff --git a/X1_JTAG_boot/src/bsp/raspberrypi.rs b/X1_JTAG_boot/src/bsp/raspberrypi.rs
index eb6be81ae..7bda8a4da 100644
--- a/X1_JTAG_boot/src/bsp/raspberrypi.rs
+++ b/X1_JTAG_boot/src/bsp/raspberrypi.rs
@@ -4,7 +4,6 @@
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
-pub mod console;
 pub mod cpu;
 pub mod driver;
 pub mod memory;
diff --git a/X1_JTAG_boot/src/bsp/raspberrypi/console.rs b/X1_JTAG_boot/src/bsp/raspberrypi/console.rs
deleted file mode 100644
index 0a630eef4..000000000
--- a/X1_JTAG_boot/src/bsp/raspberrypi/console.rs
+++ /dev/null
@@ -1,16 +0,0 @@
-// SPDX-License-Identifier: MIT OR Apache-2.0
-//
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
-
-//! BSP console facilities.
-
-use crate::console;
-
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
-
-/// Return a reference to the console.
-pub fn console() -> &'static dyn console::interface::All {
-    &super::driver::PL011_UART
-}
diff --git a/X1_JTAG_boot/src/bsp/raspberrypi/driver.rs b/X1_JTAG_boot/src/bsp/raspberrypi/driver.rs
index 8b683ed8b..ea8430660 100644
--- a/X1_JTAG_boot/src/bsp/raspberrypi/driver.rs
+++ b/X1_JTAG_boot/src/bsp/raspberrypi/driver.rs
@@ -5,51 +5,67 @@
 //! BSP driver support.
 
 use super::memory::map::mmio;
-use crate::{bsp::device_driver, driver};
+use crate::{bsp::device_driver, console, driver as generic_driver};
+use core::sync::atomic::{AtomicBool, Ordering};
 
 //--------------------------------------------------------------------------------------------------
-// Private Definitions
+// Global instances
 //--------------------------------------------------------------------------------------------------
 
-/// Device Driver Manager type.
-struct BSPDriverManager {
-    device_drivers: [&'static (dyn DeviceDriver + Sync); 2],
-}
+static PL011_UART: device_driver::PL011Uart =
+    unsafe { device_driver::PL011Uart::new(mmio::PL011_UART_START) };
+static GPIO: device_driver::GPIO = unsafe { device_driver::GPIO::new(mmio::GPIO_START) };
 
 //--------------------------------------------------------------------------------------------------
-// Global instances
+// Private Code
 //--------------------------------------------------------------------------------------------------
 
-pub(super) static PL011_UART: device_driver::PL011Uart =
-    unsafe { device_driver::PL011Uart::new(mmio::PL011_UART_START) };
+/// This must be called only after successful init of the UART driver.
+fn post_init_uart() -> Result<(), &'static str> {
+    console::register_console(&PL011_UART);
 
-static GPIO: device_driver::GPIO = unsafe { device_driver::GPIO::new(mmio::GPIO_START) };
+    Ok(())
+}
 
-static BSP_DRIVER_MANAGER: BSPDriverManager = BSPDriverManager {
-    device_drivers: [&PL011_UART, &GPIO],
-};
+/// This must be called only after successful init of the GPIO driver.
+fn post_init_gpio() -> Result<(), &'static str> {
+    GPIO.map_pl011_uart();
+    Ok(())
+}
 
-//--------------------------------------------------------------------------------------------------
-// Public Code
-//--------------------------------------------------------------------------------------------------
+fn driver_uart() -> Result<(), &'static str> {
+    let uart_descriptor =
+        generic_driver::DeviceDriverDescriptor::new(&PL011_UART, Some(post_init_uart));
+    generic_driver::driver_manager().register_driver(uart_descriptor);
 
-/// Return a reference to the driver manager.
-pub fn driver_manager() -> &'static impl driver::interface::DriverManager {
-    &BSP_DRIVER_MANAGER
+    Ok(())
 }
 
-//------------------------------------------------------------------------------
-// OS Interface Code
-//------------------------------------------------------------------------------
-use driver::interface::DeviceDriver;
+fn driver_gpio() -> Result<(), &'static str> {
+    let gpio_descriptor = generic_driver::DeviceDriverDescriptor::new(&GPIO, Some(post_init_gpio));
+    generic_driver::driver_manager().register_driver(gpio_descriptor);
 
-impl driver::interface::DriverManager for BSPDriverManager {
-    fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)] {
-        &self.device_drivers[..]
-    }
+    Ok(())
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
 
-    fn post_device_driver_init(&self) {
-        // Configure PL011Uart's output pins.
-        GPIO.map_pl011_uart();
+/// Initialize the driver subsystem.
+///
+/// # Safety
+///
+/// See child function calls.
+pub unsafe fn init() -> Result<(), &'static str> {
+    static INIT_DONE: AtomicBool = AtomicBool::new(false);
+    if INIT_DONE.load(Ordering::Relaxed) {
+        return Err("Init already done");
     }
+
+    driver_uart()?;
+    driver_gpio()?;
+
+    INIT_DONE.store(true, Ordering::Relaxed);
+    Ok(())
 }
diff --git a/X1_JTAG_boot/src/console.rs b/X1_JTAG_boot/src/console.rs
index c1fb0e53b..02b43df9f 100644
--- a/X1_JTAG_boot/src/console.rs
+++ b/X1_JTAG_boot/src/console.rs
@@ -4,7 +4,9 @@
 
 //! System console.
 
-use crate::bsp;
+mod null_console;
+
+use crate::synchronization::{self, NullLock};
 
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
@@ -54,13 +56,26 @@ pub mod interface {
     pub trait All: Write + Read + Statistics {}
 }
 
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static CUR_CONSOLE: NullLock<&'static (dyn interface::All + Sync)> =
+    NullLock::new(&null_console::NULL_CONSOLE);
+
 //--------------------------------------------------------------------------------------------------
 // Public Code
 //--------------------------------------------------------------------------------------------------
+use synchronization::interface::Mutex;
+
+/// Register a new console.
+pub fn register_console(new_console: &'static (dyn interface::All + Sync)) {
+    CUR_CONSOLE.lock(|con| *con = new_console);
+}
 
-/// Return a reference to the console.
+/// Return a reference to the currently registered console.
 ///
 /// This is the global console used by all printing macros.
 pub fn console() -> &'static dyn interface::All {
-    bsp::console::console()
+    CUR_CONSOLE.lock(|con| *con)
 }
diff --git a/X1_JTAG_boot/src/console/null_console.rs b/X1_JTAG_boot/src/console/null_console.rs
new file mode 100644
index 000000000..2c64d499c
--- /dev/null
+++ b/X1_JTAG_boot/src/console/null_console.rs
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Null console.
+
+use super::interface;
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct NullConsole;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+pub static NULL_CONSOLE: NullConsole = NullConsole {};
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl interface::Write for NullConsole {
+    fn write_char(&self, _c: char) {}
+
+    fn write_fmt(&self, _args: fmt::Arguments) -> fmt::Result {
+        fmt::Result::Ok(())
+    }
+
+    fn flush(&self) {}
+}
+
+impl interface::Read for NullConsole {
+    fn clear_rx(&self) {}
+}
+
+impl interface::Statistics for NullConsole {}
+impl interface::All for NullConsole {}
diff --git a/X1_JTAG_boot/src/driver.rs b/X1_JTAG_boot/src/driver.rs
index 2fcc75629..fb44bbd9d 100644
--- a/X1_JTAG_boot/src/driver.rs
+++ b/X1_JTAG_boot/src/driver.rs
@@ -4,6 +4,19 @@
 
 //! Driver support.
 
+use crate::synchronization::{interface::Mutex, NullLock};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+const NUM_DRIVERS: usize = 5;
+
+struct DriverManagerInner {
+    next_index: usize,
+    descriptors: [Option<DeviceDriverDescriptor>; NUM_DRIVERS],
+}
+
 //--------------------------------------------------------------------------------------------------
 // Public Definitions
 //--------------------------------------------------------------------------------------------------
@@ -24,21 +37,118 @@ pub mod interface {
             Ok(())
         }
     }
+}
+
+/// Tpye to be used as an optional callback after a driver's init() has run.
+pub type DeviceDriverPostInitCallback = unsafe fn() -> Result<(), &'static str>;
 
-    /// Device driver management functions.
+/// A descriptor for device drivers.
+#[derive(Copy, Clone)]
+pub struct DeviceDriverDescriptor {
+    device_driver: &'static (dyn interface::DeviceDriver + Sync),
+    post_init_callback: Option<DeviceDriverPostInitCallback>,
+}
+
+/// Provides device driver management functions.
+pub struct DriverManager {
+    inner: NullLock<DriverManagerInner>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static DRIVER_MANAGER: DriverManager = DriverManager::new();
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl DriverManagerInner {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self {
+            next_index: 0,
+            descriptors: [None; NUM_DRIVERS],
+        }
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl DeviceDriverDescriptor {
+    /// Create an instance.
+    pub fn new(
+        device_driver: &'static (dyn interface::DeviceDriver + Sync),
+        post_init_callback: Option<DeviceDriverPostInitCallback>,
+    ) -> Self {
+        Self {
+            device_driver,
+            post_init_callback,
+        }
+    }
+}
+
+/// Return a reference to the global DriverManager.
+pub fn driver_manager() -> &'static DriverManager {
+    &DRIVER_MANAGER
+}
+
+impl DriverManager {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self {
+            inner: NullLock::new(DriverManagerInner::new()),
+        }
+    }
+
+    /// Register a device driver with the kernel.
+    pub fn register_driver(&self, descriptor: DeviceDriverDescriptor) {
+        self.inner.lock(|inner| {
+            inner.descriptors[inner.next_index] = Some(descriptor);
+            inner.next_index += 1;
+        })
+    }
+
+    /// Helper for iterating over registered drivers.
+    fn for_each_descriptor<'a>(&'a self, f: impl FnMut(&'a DeviceDriverDescriptor)) {
+        self.inner.lock(|inner| {
+            inner
+                .descriptors
+                .iter()
+                .filter_map(|x| x.as_ref())
+                .for_each(f)
+        })
+    }
+
+    /// Fully initialize all drivers.
     ///
-    /// The `BSP` is supposed to supply one global instance.
-    pub trait DriverManager {
-        /// Return a slice of references to all `BSP`-instantiated drivers.
-        ///
-        /// # Safety
-        ///
-        /// - The order of devices is the order in which `DeviceDriver::init()` is called.
-        fn all_device_drivers(&self) -> &[&'static (dyn DeviceDriver + Sync)];
+    /// # Safety
+    ///
+    /// - During init, drivers might do stuff with system-wide impact.
+    pub unsafe fn init_drivers(&self) {
+        self.for_each_descriptor(|descriptor| {
+            // 1. Initialize driver.
+            if let Err(x) = descriptor.device_driver.init() {
+                panic!(
+                    "Error initializing driver: {}: {}",
+                    descriptor.device_driver.compatible(),
+                    x
+                );
+            }
 
-        /// Initialization code that runs after driver init.
-        ///
-        /// For example, device driver code that depends on other drivers already being online.
-        fn post_device_driver_init(&self);
+            // 2. Call corresponding post init callback.
+            if let Some(callback) = &descriptor.post_init_callback {
+                if let Err(x) = callback() {
+                    panic!(
+                        "Error during driver post-init callback: {}: {}",
+                        descriptor.device_driver.compatible(),
+                        x
+                    );
+                }
+            }
+        });
     }
 }
diff --git a/X1_JTAG_boot/src/main.rs b/X1_JTAG_boot/src/main.rs
index a38b1ef51..8d244c77e 100644
--- a/X1_JTAG_boot/src/main.rs
+++ b/X1_JTAG_boot/src/main.rs
@@ -133,14 +133,13 @@ mod time;
 /// - Only a single core must be active and running this function.
 /// - The init calls in this function must appear in the correct order.
 unsafe fn kernel_init() -> ! {
-    use driver::interface::DriverManager;
-
-    for i in bsp::driver::driver_manager().all_device_drivers().iter() {
-        if let Err(x) = i.init() {
-            panic!("Error loading driver: {}: {}", i.compatible(), x);
-        }
+    // Initialize the BSP driver subsystem.
+    if let Err(x) = bsp::driver::init() {
+        panic!("Error initializing BSP driver subsystem: {}", x);
     }
-    bsp::driver::driver_manager().post_device_driver_init();
+
+    // Initialize all device drivers.
+    driver::driver_manager().init_drivers();
     // println! is usable from here on.
 
     // Transition from unsafe to safe.
diff --git a/rust-toolchain.toml b/rust-toolchain.toml
index 0a5255452..a554c0a98 100644
--- a/rust-toolchain.toml
+++ b/rust-toolchain.toml
@@ -1,4 +1,4 @@
 [toolchain]
-channel = "nightly-2022-08-01"
+channel = "nightly-2022-10-13"
 components = ["rust-src", "llvm-tools-preview", "rustfmt"]
 targets = ["aarch64-unknown-none-softfloat"]

From ec842133d9f61e2be2f9a7c2ef8a1e8fba6931f5 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Mon, 24 Oct 2022 22:15:48 +0200
Subject: [PATCH 192/214] Improve macOS support

macOS support is still not great, but this patch at least
fixes some import Makefile subtargets.
---
 .ruby-version                                 |  2 +-
 01_wait_forever/Makefile                      |  5 +--
 02_runtime_init/Makefile                      |  5 +--
 02_runtime_init/README.md                     |  2 +-
 03_hacky_hello_world/Makefile                 |  5 +--
 03_hacky_hello_world/README.md                |  8 ++---
 04_safe_globals/Makefile                      |  5 +--
 05_drivers_gpio_uart/Makefile                 |  5 +--
 05_drivers_gpio_uart/README.md                |  8 ++---
 06_uart_chainloader/Makefile                  |  5 +--
 06_uart_chainloader/README.md                 | 14 ++++-----
 07_timestamps/Makefile                        |  5 +--
 07_timestamps/README.md                       | 10 +++---
 08_hw_debug_JTAG/Makefile                     |  5 +--
 08_hw_debug_JTAG/README.md                    |  8 ++---
 09_privilege_level/Makefile                   |  5 +--
 .../Makefile                                  |  5 +--
 11_exceptions_part1_groundwork/Makefile       |  5 +--
 12_integrated_testing/Makefile                |  5 +--
 13_exceptions_part2_peripheral_IRQs/Makefile  |  5 +--
 14_virtual_mem_part2_mmio_remap/Makefile      |  5 +--
 .../Makefile                                  |  5 +--
 .../README.md                                 |  8 ++---
 .../Makefile                                  |  5 +--
 17_kernel_symbols/Makefile                    |  8 ++---
 17_kernel_symbols/README.md                   | 31 +++++++++++++------
 17_kernel_symbols/kernel_symbols.mk           | 18 +++++++++--
 18_backtrace/Makefile                         |  8 ++---
 18_backtrace/README.md                        |  6 ++--
 18_backtrace/kernel_symbols.mk                | 18 +++++++++--
 19_kernel_heap/Makefile                       |  8 ++---
 19_kernel_heap/README.md                      |  6 ++--
 19_kernel_heap/kernel_symbols.mk              | 18 +++++++++--
 README.md                                     |  8 ++++-
 X1_JTAG_boot/Makefile                         |  5 +--
 common/operating_system.mk                    |  9 ++++++
 36 files changed, 185 insertions(+), 98 deletions(-)
 create mode 100644 common/operating_system.mk

diff --git a/.ruby-version b/.ruby-version
index 1effb0034..b50214693 100644
--- a/.ruby-version
+++ b/.ruby-version
@@ -1 +1 @@
-2.7
+3.0.2
diff --git a/01_wait_forever/Makefile b/01_wait_forever/Makefile
index 679b23b4f..c87546fd3 100644
--- a/01_wait_forever/Makefile
+++ b/01_wait_forever/Makefile
@@ -2,8 +2,9 @@
 ##
 ## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/format.mk
 include ../common/docker.mk
+include ../common/format.mk
+include ../common/operating_system.mk
 
 ##--------------------------------------------------------------------------------------------------
 ## Optional, user-provided configuration values
@@ -130,7 +131,7 @@ $(KERNEL_BIN): $(KERNEL_ELF)
 	$(call color_progress_prefix, "Name")
 	@echo $(KERNEL_BIN)
 	$(call color_progress_prefix, "Size")
-	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
+	$(call disk_usage_KiB, $(KERNEL_BIN))
 
 ##------------------------------------------------------------------------------
 ## Generate the documentation
diff --git a/02_runtime_init/Makefile b/02_runtime_init/Makefile
index 0abb67cc3..807a935e4 100644
--- a/02_runtime_init/Makefile
+++ b/02_runtime_init/Makefile
@@ -2,8 +2,9 @@
 ##
 ## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/format.mk
 include ../common/docker.mk
+include ../common/format.mk
+include ../common/operating_system.mk
 
 ##--------------------------------------------------------------------------------------------------
 ## Optional, user-provided configuration values
@@ -130,7 +131,7 @@ $(KERNEL_BIN): $(KERNEL_ELF)
 	$(call color_progress_prefix, "Name")
 	@echo $(KERNEL_BIN)
 	$(call color_progress_prefix, "Size")
-	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
+	$(call disk_usage_KiB, $(KERNEL_BIN))
 
 ##------------------------------------------------------------------------------
 ## Generate the documentation
diff --git a/02_runtime_init/README.md b/02_runtime_init/README.md
index 80fd77a4e..7b3fcd82b 100644
--- a/02_runtime_init/README.md
+++ b/02_runtime_init/README.md
@@ -52,7 +52,7 @@ diff -uNr 01_wait_forever/Cargo.toml 02_runtime_init/Cargo.toml
 diff -uNr 01_wait_forever/Makefile 02_runtime_init/Makefile
 --- 01_wait_forever/Makefile
 +++ 02_runtime_init/Makefile
-@@ -180,6 +180,7 @@
+@@ -181,6 +181,7 @@
  	$(call color_header, "Launching objdump")
  	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
                  --section .text   \
diff --git a/03_hacky_hello_world/Makefile b/03_hacky_hello_world/Makefile
index cfd5dc6ed..13dba46ce 100644
--- a/03_hacky_hello_world/Makefile
+++ b/03_hacky_hello_world/Makefile
@@ -2,8 +2,9 @@
 ##
 ## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/format.mk
 include ../common/docker.mk
+include ../common/format.mk
+include ../common/operating_system.mk
 
 ##--------------------------------------------------------------------------------------------------
 ## Optional, user-provided configuration values
@@ -133,7 +134,7 @@ $(KERNEL_BIN): $(KERNEL_ELF)
 	$(call color_progress_prefix, "Name")
 	@echo $(KERNEL_BIN)
 	$(call color_progress_prefix, "Size")
-	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
+	$(call disk_usage_KiB, $(KERNEL_BIN))
 
 ##------------------------------------------------------------------------------
 ## Generate the documentation
diff --git a/03_hacky_hello_world/README.md b/03_hacky_hello_world/README.md
index 416cab024..b0ad3ff25 100644
--- a/03_hacky_hello_world/README.md
+++ b/03_hacky_hello_world/README.md
@@ -53,7 +53,7 @@ diff -uNr 02_runtime_init/Cargo.toml 03_hacky_hello_world/Cargo.toml
 diff -uNr 02_runtime_init/Makefile 03_hacky_hello_world/Makefile
 --- 02_runtime_init/Makefile
 +++ 03_hacky_hello_world/Makefile
-@@ -24,7 +24,7 @@
+@@ -25,7 +25,7 @@
      KERNEL_BIN        = kernel8.img
      QEMU_BINARY       = qemu-system-aarch64
      QEMU_MACHINE_TYPE = raspi3
@@ -62,7 +62,7 @@ diff -uNr 02_runtime_init/Makefile 03_hacky_hello_world/Makefile
      OBJDUMP_BINARY    = aarch64-none-elf-objdump
      NM_BINARY         = aarch64-none-elf-nm
      READELF_BINARY    = aarch64-none-elf-readelf
-@@ -35,7 +35,7 @@
+@@ -36,7 +36,7 @@
      KERNEL_BIN        = kernel8.img
      QEMU_BINARY       = qemu-system-aarch64
      QEMU_MACHINE_TYPE =
@@ -71,7 +71,7 @@ diff -uNr 02_runtime_init/Makefile 03_hacky_hello_world/Makefile
      OBJDUMP_BINARY    = aarch64-none-elf-objdump
      NM_BINARY         = aarch64-none-elf-nm
      READELF_BINARY    = aarch64-none-elf-readelf
-@@ -85,17 +85,20 @@
+@@ -86,17 +86,20 @@
      --strip-all            \
      -O binary
 
@@ -95,7 +95,7 @@ diff -uNr 02_runtime_init/Makefile 03_hacky_hello_world/Makefile
 
 
 
-@@ -190,3 +193,27 @@
+@@ -191,3 +194,27 @@
  	$(call color_header, "Launching nm")
  	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
 
diff --git a/04_safe_globals/Makefile b/04_safe_globals/Makefile
index cfd5dc6ed..13dba46ce 100644
--- a/04_safe_globals/Makefile
+++ b/04_safe_globals/Makefile
@@ -2,8 +2,9 @@
 ##
 ## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/format.mk
 include ../common/docker.mk
+include ../common/format.mk
+include ../common/operating_system.mk
 
 ##--------------------------------------------------------------------------------------------------
 ## Optional, user-provided configuration values
@@ -133,7 +134,7 @@ $(KERNEL_BIN): $(KERNEL_ELF)
 	$(call color_progress_prefix, "Name")
 	@echo $(KERNEL_BIN)
 	$(call color_progress_prefix, "Size")
-	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
+	$(call disk_usage_KiB, $(KERNEL_BIN))
 
 ##------------------------------------------------------------------------------
 ## Generate the documentation
diff --git a/05_drivers_gpio_uart/Makefile b/05_drivers_gpio_uart/Makefile
index 29d6729ff..a8c4821af 100644
--- a/05_drivers_gpio_uart/Makefile
+++ b/05_drivers_gpio_uart/Makefile
@@ -2,8 +2,9 @@
 ##
 ## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/format.mk
 include ../common/docker.mk
+include ../common/format.mk
+include ../common/operating_system.mk
 
 ##--------------------------------------------------------------------------------------------------
 ## Optional, user-provided configuration values
@@ -145,7 +146,7 @@ $(KERNEL_BIN): $(KERNEL_ELF)
 	$(call color_progress_prefix, "Name")
 	@echo $(KERNEL_BIN)
 	$(call color_progress_prefix, "Size")
-	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
+	$(call disk_usage_KiB, $(KERNEL_BIN))
 
 ##------------------------------------------------------------------------------
 ## Generate the documentation
diff --git a/05_drivers_gpio_uart/README.md b/05_drivers_gpio_uart/README.md
index 3fe5e7b29..f53a330ba 100644
--- a/05_drivers_gpio_uart/README.md
+++ b/05_drivers_gpio_uart/README.md
@@ -186,7 +186,7 @@ diff -uNr 04_safe_globals/Cargo.toml 05_drivers_gpio_uart/Cargo.toml
 diff -uNr 04_safe_globals/Makefile 05_drivers_gpio_uart/Makefile
 --- 04_safe_globals/Makefile
 +++ 05_drivers_gpio_uart/Makefile
-@@ -12,6 +12,9 @@
+@@ -13,6 +13,9 @@
  # Default to the RPi3.
  BSP ?= rpi3
 
@@ -196,7 +196,7 @@ diff -uNr 04_safe_globals/Makefile 05_drivers_gpio_uart/Makefile
 
 
  ##--------------------------------------------------------------------------------------------------
-@@ -87,6 +90,7 @@
+@@ -88,6 +91,7 @@
 
  EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
  EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
@@ -204,7 +204,7 @@ diff -uNr 04_safe_globals/Makefile 05_drivers_gpio_uart/Makefile
 
  ##------------------------------------------------------------------------------
  ## Dockerization
-@@ -94,18 +98,26 @@
+@@ -95,18 +99,26 @@
  DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
  DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
  DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
@@ -232,7 +232,7 @@ diff -uNr 04_safe_globals/Makefile 05_drivers_gpio_uart/Makefile
 
  all: $(KERNEL_BIN)
 
-@@ -155,9 +167,16 @@
+@@ -156,9 +168,16 @@
  qemu: $(KERNEL_BIN)
  	$(call color_header, "Launching QEMU")
  	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
diff --git a/06_uart_chainloader/Makefile b/06_uart_chainloader/Makefile
index d7b102ae6..b619b4ca3 100644
--- a/06_uart_chainloader/Makefile
+++ b/06_uart_chainloader/Makefile
@@ -2,8 +2,9 @@
 ##
 ## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/format.mk
 include ../common/docker.mk
+include ../common/format.mk
+include ../common/operating_system.mk
 
 ##--------------------------------------------------------------------------------------------------
 ## Optional, user-provided configuration values
@@ -147,7 +148,7 @@ $(KERNEL_BIN): $(KERNEL_ELF)
 	$(call color_progress_prefix, "Name")
 	@echo $(KERNEL_BIN)
 	$(call color_progress_prefix, "Size")
-	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
+	$(call disk_usage_KiB, $(KERNEL_BIN))
 
 ##------------------------------------------------------------------------------
 ## Generate the documentation
diff --git a/06_uart_chainloader/README.md b/06_uart_chainloader/README.md
index e321e6031..95b951492 100644
--- a/06_uart_chainloader/README.md
+++ b/06_uart_chainloader/README.md
@@ -140,7 +140,7 @@ Binary files 05_drivers_gpio_uart/demo_payload_rpi4.img and 06_uart_chainloader/
 diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
 --- 05_drivers_gpio_uart/Makefile
 +++ 06_uart_chainloader/Makefile
-@@ -23,27 +23,29 @@
+@@ -24,27 +24,29 @@
  QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
 
  ifeq ($(BSP),rpi3)
@@ -190,7 +190,7 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
  endif
 
  # Export for build.rs.
-@@ -89,8 +91,8 @@
+@@ -90,8 +92,8 @@
      -O binary
 
  EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
@@ -201,7 +201,7 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
 
  ##------------------------------------------------------------------------------
  ## Dockerization
-@@ -109,7 +111,7 @@
+@@ -110,7 +112,7 @@
  ifeq ($(shell uname -s),Linux)
      DOCKER_CMD_DEV = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DEV)
 
@@ -210,7 +210,7 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
  endif
 
 
-@@ -117,7 +119,7 @@
+@@ -118,7 +120,7 @@
  ##--------------------------------------------------------------------------------------------------
  ## Targets
  ##--------------------------------------------------------------------------------------------------
@@ -219,7 +219,7 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
 
  all: $(KERNEL_BIN)
 
-@@ -159,7 +161,7 @@
+@@ -160,7 +162,7 @@
  ##------------------------------------------------------------------------------
  ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
@@ -228,7 +228,7 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
  	$(call color_header, "$(QEMU_MISSING_STRING)")
 
  else # QEMU is supported.
-@@ -168,13 +170,17 @@
+@@ -169,13 +171,17 @@
  	$(call color_header, "Launching QEMU")
  	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
@@ -249,7 +249,7 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
 
  ##------------------------------------------------------------------------------
  ## Run clippy
-@@ -231,7 +237,8 @@
+@@ -232,7 +238,8 @@
  ##------------------------------------------------------------------------------
  test_boot: $(KERNEL_BIN)
  	$(call color_header, "Boot test - $(BSP)")
diff --git a/07_timestamps/Makefile b/07_timestamps/Makefile
index 76ddb186e..23de6557b 100644
--- a/07_timestamps/Makefile
+++ b/07_timestamps/Makefile
@@ -2,8 +2,9 @@
 ##
 ## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/format.mk
 include ../common/docker.mk
+include ../common/format.mk
+include ../common/operating_system.mk
 
 ##--------------------------------------------------------------------------------------------------
 ## Optional, user-provided configuration values
@@ -145,7 +146,7 @@ $(KERNEL_BIN): $(KERNEL_ELF)
 	$(call color_progress_prefix, "Name")
 	@echo $(KERNEL_BIN)
 	$(call color_progress_prefix, "Size")
-	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
+	$(call disk_usage_KiB, $(KERNEL_BIN))
 
 ##------------------------------------------------------------------------------
 ## Generate the documentation
diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index 4a5905b41..236def5b5 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -63,7 +63,7 @@ Binary files 06_uart_chainloader/demo_payload_rpi4.img and 07_timestamps/demo_pa
 diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
 --- 06_uart_chainloader/Makefile
 +++ 07_timestamps/Makefile
-@@ -23,29 +23,27 @@
+@@ -24,29 +24,27 @@
  QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
 
  ifeq ($(BSP),rpi3)
@@ -113,7 +113,7 @@ diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
  endif
 
  # Export for build.rs.
-@@ -91,7 +89,7 @@
+@@ -92,7 +90,7 @@
      -O binary
 
  EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
@@ -122,7 +122,7 @@ diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
  EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
 
  ##------------------------------------------------------------------------------
-@@ -161,7 +159,7 @@
+@@ -162,7 +160,7 @@
  ##------------------------------------------------------------------------------
  ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
 
@@ -131,7 +131,7 @@ diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
  	$(call color_header, "$(QEMU_MISSING_STRING)")
 
  else # QEMU is supported.
-@@ -170,17 +168,13 @@
+@@ -171,17 +169,13 @@
  	$(call color_header, "Launching QEMU")
  	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
 
@@ -150,7 +150,7 @@ diff -uNr 06_uart_chainloader/Makefile 07_timestamps/Makefile
 
  ##------------------------------------------------------------------------------
  ## Run clippy
-@@ -237,8 +231,7 @@
+@@ -238,8 +232,7 @@
  ##------------------------------------------------------------------------------
  test_boot: $(KERNEL_BIN)
  	$(call color_header, "Boot test - $(BSP)")
diff --git a/08_hw_debug_JTAG/Makefile b/08_hw_debug_JTAG/Makefile
index ce0ebc314..125f75cb0 100644
--- a/08_hw_debug_JTAG/Makefile
+++ b/08_hw_debug_JTAG/Makefile
@@ -2,8 +2,9 @@
 ##
 ## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/format.mk
 include ../common/docker.mk
+include ../common/format.mk
+include ../common/operating_system.mk
 
 ##--------------------------------------------------------------------------------------------------
 ## Optional, user-provided configuration values
@@ -156,7 +157,7 @@ $(KERNEL_BIN): $(KERNEL_ELF)
 	$(call color_progress_prefix, "Name")
 	@echo $(KERNEL_BIN)
 	$(call color_progress_prefix, "Size")
-	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
+	$(call disk_usage_KiB, $(KERNEL_BIN))
 
 ##------------------------------------------------------------------------------
 ## Generate the documentation
diff --git a/08_hw_debug_JTAG/README.md b/08_hw_debug_JTAG/README.md
index 69b6b82ef..149282531 100644
--- a/08_hw_debug_JTAG/README.md
+++ b/08_hw_debug_JTAG/README.md
@@ -320,7 +320,7 @@ diff -uNr 07_timestamps/Cargo.toml 08_hw_debug_JTAG/Cargo.toml
 diff -uNr 07_timestamps/Makefile 08_hw_debug_JTAG/Makefile
 --- 07_timestamps/Makefile
 +++ 08_hw_debug_JTAG/Makefile
-@@ -31,6 +31,8 @@
+@@ -32,6 +32,8 @@
      OBJDUMP_BINARY    = aarch64-none-elf-objdump
      NM_BINARY         = aarch64-none-elf-nm
      READELF_BINARY    = aarch64-none-elf-readelf
@@ -329,7 +329,7 @@ diff -uNr 07_timestamps/Makefile 08_hw_debug_JTAG/Makefile
      LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
      RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
  else ifeq ($(BSP),rpi4)
-@@ -42,6 +44,8 @@
+@@ -43,6 +45,8 @@
      OBJDUMP_BINARY    = aarch64-none-elf-objdump
      NM_BINARY         = aarch64-none-elf-nm
      READELF_BINARY    = aarch64-none-elf-readelf
@@ -338,7 +338,7 @@ diff -uNr 07_timestamps/Makefile 08_hw_debug_JTAG/Makefile
      LD_SCRIPT_PATH    = $(shell pwd)/src/bsp/raspberrypi
      RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
  endif
-@@ -98,18 +102,25 @@
+@@ -99,18 +103,25 @@
  DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
  DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
  DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
@@ -364,7 +364,7 @@ diff -uNr 07_timestamps/Makefile 08_hw_debug_JTAG/Makefile
  endif
 
 
-@@ -214,6 +225,35 @@
+@@ -215,6 +226,35 @@
 
 
 
diff --git a/09_privilege_level/Makefile b/09_privilege_level/Makefile
index ce0ebc314..125f75cb0 100644
--- a/09_privilege_level/Makefile
+++ b/09_privilege_level/Makefile
@@ -2,8 +2,9 @@
 ##
 ## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/format.mk
 include ../common/docker.mk
+include ../common/format.mk
+include ../common/operating_system.mk
 
 ##--------------------------------------------------------------------------------------------------
 ## Optional, user-provided configuration values
@@ -156,7 +157,7 @@ $(KERNEL_BIN): $(KERNEL_ELF)
 	$(call color_progress_prefix, "Name")
 	@echo $(KERNEL_BIN)
 	$(call color_progress_prefix, "Size")
-	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
+	$(call disk_usage_KiB, $(KERNEL_BIN))
 
 ##------------------------------------------------------------------------------
 ## Generate the documentation
diff --git a/10_virtual_mem_part1_identity_mapping/Makefile b/10_virtual_mem_part1_identity_mapping/Makefile
index ce0ebc314..125f75cb0 100644
--- a/10_virtual_mem_part1_identity_mapping/Makefile
+++ b/10_virtual_mem_part1_identity_mapping/Makefile
@@ -2,8 +2,9 @@
 ##
 ## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/format.mk
 include ../common/docker.mk
+include ../common/format.mk
+include ../common/operating_system.mk
 
 ##--------------------------------------------------------------------------------------------------
 ## Optional, user-provided configuration values
@@ -156,7 +157,7 @@ $(KERNEL_BIN): $(KERNEL_ELF)
 	$(call color_progress_prefix, "Name")
 	@echo $(KERNEL_BIN)
 	$(call color_progress_prefix, "Size")
-	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
+	$(call disk_usage_KiB, $(KERNEL_BIN))
 
 ##------------------------------------------------------------------------------
 ## Generate the documentation
diff --git a/11_exceptions_part1_groundwork/Makefile b/11_exceptions_part1_groundwork/Makefile
index ce0ebc314..125f75cb0 100644
--- a/11_exceptions_part1_groundwork/Makefile
+++ b/11_exceptions_part1_groundwork/Makefile
@@ -2,8 +2,9 @@
 ##
 ## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/format.mk
 include ../common/docker.mk
+include ../common/format.mk
+include ../common/operating_system.mk
 
 ##--------------------------------------------------------------------------------------------------
 ## Optional, user-provided configuration values
@@ -156,7 +157,7 @@ $(KERNEL_BIN): $(KERNEL_ELF)
 	$(call color_progress_prefix, "Name")
 	@echo $(KERNEL_BIN)
 	$(call color_progress_prefix, "Size")
-	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
+	$(call disk_usage_KiB, $(KERNEL_BIN))
 
 ##------------------------------------------------------------------------------
 ## Generate the documentation
diff --git a/12_integrated_testing/Makefile b/12_integrated_testing/Makefile
index 2d4801190..88d106f89 100644
--- a/12_integrated_testing/Makefile
+++ b/12_integrated_testing/Makefile
@@ -2,8 +2,9 @@
 ##
 ## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/format.mk
 include ../common/docker.mk
+include ../common/format.mk
+include ../common/operating_system.mk
 
 ##--------------------------------------------------------------------------------------------------
 ## Optional, user-provided configuration values
@@ -166,7 +167,7 @@ $(KERNEL_BIN): $(KERNEL_ELF)
 	$(call color_progress_prefix, "Name")
 	@echo $(KERNEL_BIN)
 	$(call color_progress_prefix, "Size")
-	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
+	$(call disk_usage_KiB, $(KERNEL_BIN))
 
 ##------------------------------------------------------------------------------
 ## Generate the documentation
diff --git a/13_exceptions_part2_peripheral_IRQs/Makefile b/13_exceptions_part2_peripheral_IRQs/Makefile
index 2d4801190..88d106f89 100644
--- a/13_exceptions_part2_peripheral_IRQs/Makefile
+++ b/13_exceptions_part2_peripheral_IRQs/Makefile
@@ -2,8 +2,9 @@
 ##
 ## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/format.mk
 include ../common/docker.mk
+include ../common/format.mk
+include ../common/operating_system.mk
 
 ##--------------------------------------------------------------------------------------------------
 ## Optional, user-provided configuration values
@@ -166,7 +167,7 @@ $(KERNEL_BIN): $(KERNEL_ELF)
 	$(call color_progress_prefix, "Name")
 	@echo $(KERNEL_BIN)
 	$(call color_progress_prefix, "Size")
-	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
+	$(call disk_usage_KiB, $(KERNEL_BIN))
 
 ##------------------------------------------------------------------------------
 ## Generate the documentation
diff --git a/14_virtual_mem_part2_mmio_remap/Makefile b/14_virtual_mem_part2_mmio_remap/Makefile
index 2d4801190..88d106f89 100644
--- a/14_virtual_mem_part2_mmio_remap/Makefile
+++ b/14_virtual_mem_part2_mmio_remap/Makefile
@@ -2,8 +2,9 @@
 ##
 ## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/format.mk
 include ../common/docker.mk
+include ../common/format.mk
+include ../common/operating_system.mk
 
 ##--------------------------------------------------------------------------------------------------
 ## Optional, user-provided configuration values
@@ -166,7 +167,7 @@ $(KERNEL_BIN): $(KERNEL_ELF)
 	$(call color_progress_prefix, "Name")
 	@echo $(KERNEL_BIN)
 	$(call color_progress_prefix, "Size")
-	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
+	$(call disk_usage_KiB, $(KERNEL_BIN))
 
 ##------------------------------------------------------------------------------
 ## Generate the documentation
diff --git a/15_virtual_mem_part3_precomputed_tables/Makefile b/15_virtual_mem_part3_precomputed_tables/Makefile
index 4092ec8fe..0f5c4870a 100644
--- a/15_virtual_mem_part3_precomputed_tables/Makefile
+++ b/15_virtual_mem_part3_precomputed_tables/Makefile
@@ -2,8 +2,9 @@
 ##
 ## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/format.mk
 include ../common/docker.mk
+include ../common/format.mk
+include ../common/operating_system.mk
 
 ##--------------------------------------------------------------------------------------------------
 ## Optional, user-provided configuration values
@@ -185,7 +186,7 @@ $(KERNEL_BIN): $(KERNEL_ELF_TTABLES)
 	$(call color_progress_prefix, "Name")
 	@echo $(KERNEL_BIN)
 	$(call color_progress_prefix, "Size")
-	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
+	$(call disk_usage_KiB, $(KERNEL_BIN))
 
 ##------------------------------------------------------------------------------
 ## Generate the documentation
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index 00586235e..c850992e1 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -1848,7 +1848,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.r
 diff -uNr 14_virtual_mem_part2_mmio_remap/Makefile 15_virtual_mem_part3_precomputed_tables/Makefile
 --- 14_virtual_mem_part2_mmio_remap/Makefile
 +++ 15_virtual_mem_part3_precomputed_tables/Makefile
-@@ -71,10 +71,20 @@
+@@ -72,10 +72,20 @@
  KERNEL_LINKER_SCRIPT = kernel.ld
  LAST_BUILD_CONFIG    = target/$(BSP).build_config
 
@@ -1871,7 +1871,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/Makefile 15_virtual_mem_part3_precompu
 
 
 
-@@ -103,6 +113,7 @@
+@@ -104,6 +114,7 @@
      -O binary
 
  EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
@@ -1879,7 +1879,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/Makefile 15_virtual_mem_part3_precompu
  EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
  EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
 
-@@ -153,16 +164,24 @@
+@@ -154,16 +165,24 @@
  ##------------------------------------------------------------------------------
  ## Compile the kernel ELF
  ##------------------------------------------------------------------------------
@@ -1907,7 +1907,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/Makefile 15_virtual_mem_part3_precompu
  	$(call color_progress_prefix, "Name")
  	@echo $(KERNEL_BIN)
  	$(call color_progress_prefix, "Size")
-@@ -300,6 +319,7 @@
+@@ -301,6 +320,7 @@
      TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
      TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/Makefile b/16_virtual_mem_part4_higher_half_kernel/Makefile
index 4092ec8fe..0f5c4870a 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Makefile
+++ b/16_virtual_mem_part4_higher_half_kernel/Makefile
@@ -2,8 +2,9 @@
 ##
 ## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/format.mk
 include ../common/docker.mk
+include ../common/format.mk
+include ../common/operating_system.mk
 
 ##--------------------------------------------------------------------------------------------------
 ## Optional, user-provided configuration values
@@ -185,7 +186,7 @@ $(KERNEL_BIN): $(KERNEL_ELF_TTABLES)
 	$(call color_progress_prefix, "Name")
 	@echo $(KERNEL_BIN)
 	$(call color_progress_prefix, "Size")
-	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
+	$(call disk_usage_KiB, $(KERNEL_BIN))
 
 ##------------------------------------------------------------------------------
 ## Generate the documentation
diff --git a/17_kernel_symbols/Makefile b/17_kernel_symbols/Makefile
index 7bed51da7..ce1d165b6 100644
--- a/17_kernel_symbols/Makefile
+++ b/17_kernel_symbols/Makefile
@@ -2,8 +2,9 @@
 ##
 ## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/format.mk
 include ../common/docker.mk
+include ../common/format.mk
+include ../common/operating_system.mk
 
 ##--------------------------------------------------------------------------------------------------
 ## Optional, user-provided configuration values
@@ -198,8 +199,7 @@ $(KERNEL_ELF_TTABLES): $(KERNEL_ELF_TTABLES_DEPS)
 ##------------------------------------------------------------------------------
 $(KERNEL_ELF_TTABLES_SYMS): $(KERNEL_ELF_TTABLES_SYMS_DEPS)
 	$(call color_header, "Generating kernel symbols and patching kernel ELF")
-	@time -f "in %es" \
-                $(MAKE) --no-print-directory -f kernel_symbols.mk
+	@$(MAKE) --no-print-directory -f kernel_symbols.mk
 
 ##------------------------------------------------------------------------------
 ## Generate the stripped kernel binary
@@ -210,7 +210,7 @@ $(KERNEL_BIN): $(KERNEL_ELF_TTABLES_SYMS)
 	$(call color_progress_prefix, "Name")
 	@echo $(KERNEL_BIN)
 	$(call color_progress_prefix, "Size")
-	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
+	$(call disk_usage_KiB, $(KERNEL_BIN))
 
 ##------------------------------------------------------------------------------
 ## Generate the documentation
diff --git a/17_kernel_symbols/README.md b/17_kernel_symbols/README.md
index 87264162a..925ed689f 100644
--- a/17_kernel_symbols/README.md
+++ b/17_kernel_symbols/README.md
@@ -516,7 +516,7 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel_symbols/src/main.rs 17_
 diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel_symbols.mk 17_kernel_symbols/kernel_symbols.mk
 --- 16_virtual_mem_part4_higher_half_kernel/kernel_symbols.mk
 +++ 17_kernel_symbols/kernel_symbols.mk
-@@ -0,0 +1,103 @@
+@@ -0,0 +1,117 @@
 +## SPDX-License-Identifier: MIT OR Apache-2.0
 +##
 +## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
@@ -598,9 +598,11 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel_symbols.mk 17_kernel_sy
 +##--------------------------------------------------------------------------------------------------
 +## Targets
 +##--------------------------------------------------------------------------------------------------
-+.PHONY: all
++.PHONY: all symbols measure_time_start measure_time_finish
 +
-+all:
++all: measure_time_start symbols measure_time_finish
++
++symbols:
 +	@cp $(KERNEL_SYMBOLS_INPUT_ELF) $(KERNEL_SYMBOLS_OUTPUT_ELF)
 +
 +	@$(DOCKER_TOOLS) $(EXEC_SYMBOLS_TOOL) --gen_symbols $(KERNEL_SYMBOLS_OUTPUT_ELF) \
@@ -619,7 +621,19 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel_symbols.mk 17_kernel_sy
 +	@$(DOCKER_TOOLS) $(EXEC_SYMBOLS_TOOL) --patch_data $(KERNEL_SYMBOLS_OUTPUT_ELF) \
 +                $(KERNEL_SYMBOLS_STRIPPED)
 +
++# Note: The following is the only _trivial_ way I could think of that works out of the box on both
++# Linux and macOS. Since macOS does not have the moduloN nanosecond format string option, the
++# resolution is restricted to whole seconds.
++measure_time_start:
++	@date +modulos > /tmp/kernel_symbols_start.date
++
++measure_time_finish:
++	@date +modulos > /tmp/kernel_symbols_end.date
++
 +	$(call color_progress_prefix, "Finished")
++	@echo "in $$((`cat /tmp/kernel_symbols_end.date` - `cat /tmp/kernel_symbols_start.date`)).0s"
++
++	@rm /tmp/kernel_symbols_end.date /tmp/kernel_symbols_start.date
 
 diff -uNr 16_virtual_mem_part4_higher_half_kernel/libraries/debug-symbol-types/Cargo.toml 17_kernel_symbols/libraries/debug-symbol-types/Cargo.toml
 --- 16_virtual_mem_part4_higher_half_kernel/libraries/debug-symbol-types/Cargo.toml
@@ -683,7 +697,7 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/libraries/debug-symbol-types/s
 diff -uNr 16_virtual_mem_part4_higher_half_kernel/Makefile 17_kernel_symbols/Makefile
 --- 16_virtual_mem_part4_higher_half_kernel/Makefile
 +++ 17_kernel_symbols/Makefile
-@@ -84,7 +84,24 @@
+@@ -85,7 +85,24 @@
  KERNEL_ELF_TTABLES      = target/$(TARGET)/release/kernel+ttables
  KERNEL_ELF_TTABLES_DEPS = $(KERNEL_ELF_RAW) $(wildcard $(TT_TOOL_PATH)/*)
 
@@ -709,7 +723,7 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/Makefile 17_kernel_symbols/Mak
 
 
 
-@@ -177,11 +194,19 @@
+@@ -178,11 +195,18 @@
  	@$(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(BSP) $(KERNEL_ELF_TTABLES)
 
  ##------------------------------------------------------------------------------
@@ -717,8 +731,7 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/Makefile 17_kernel_symbols/Mak
 +##------------------------------------------------------------------------------
 +$(KERNEL_ELF_TTABLES_SYMS): $(KERNEL_ELF_TTABLES_SYMS_DEPS)
 +	$(call color_header, "Generating kernel symbols and patching kernel ELF")
-+	@time -f "in moduloes" \
-+                $(MAKE) --no-print-directory -f kernel_symbols.mk
++	@$(MAKE) --no-print-directory -f kernel_symbols.mk
 +
 +##------------------------------------------------------------------------------
  ## Generate the stripped kernel binary
@@ -731,7 +744,7 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/Makefile 17_kernel_symbols/Mak
  	$(call color_progress_prefix, "Name")
  	@echo $(KERNEL_BIN)
  	$(call color_progress_prefix, "Size")
-@@ -190,7 +215,7 @@
+@@ -191,7 +215,7 @@
  ##------------------------------------------------------------------------------
  ## Generate the documentation
  ##------------------------------------------------------------------------------
@@ -740,7 +753,7 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/Makefile 17_kernel_symbols/Mak
  	$(call color_header, "Generating docs")
  	@$(DOC_CMD) --document-private-items --open
 
-@@ -317,10 +342,19 @@
+@@ -318,10 +342,19 @@
      cd $(shell pwd)
 
      TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
diff --git a/17_kernel_symbols/kernel_symbols.mk b/17_kernel_symbols/kernel_symbols.mk
index 5b51ccfed..d496ea8ae 100644
--- a/17_kernel_symbols/kernel_symbols.mk
+++ b/17_kernel_symbols/kernel_symbols.mk
@@ -79,9 +79,11 @@ DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 ##--------------------------------------------------------------------------------------------------
 ## Targets
 ##--------------------------------------------------------------------------------------------------
-.PHONY: all
+.PHONY: all symbols measure_time_start measure_time_finish
 
-all:
+all: measure_time_start symbols measure_time_finish
+
+symbols:
 	@cp $(KERNEL_SYMBOLS_INPUT_ELF) $(KERNEL_SYMBOLS_OUTPUT_ELF)
 
 	@$(DOCKER_TOOLS) $(EXEC_SYMBOLS_TOOL) --gen_symbols $(KERNEL_SYMBOLS_OUTPUT_ELF) \
@@ -100,4 +102,16 @@ all:
 	@$(DOCKER_TOOLS) $(EXEC_SYMBOLS_TOOL) --patch_data $(KERNEL_SYMBOLS_OUTPUT_ELF) \
                 $(KERNEL_SYMBOLS_STRIPPED)
 
+# Note: The following is the only _trivial_ way I could think of that works out of the box on both
+# Linux and macOS. Since macOS does not have the %N nanosecond format string option, the
+# resolution is restricted to whole seconds.
+measure_time_start:
+	@date +%s > /tmp/kernel_symbols_start.date
+
+measure_time_finish:
+	@date +%s > /tmp/kernel_symbols_end.date
+
 	$(call color_progress_prefix, "Finished")
+	@echo "in $$((`cat /tmp/kernel_symbols_end.date` - `cat /tmp/kernel_symbols_start.date`)).0s"
+
+	@rm /tmp/kernel_symbols_end.date /tmp/kernel_symbols_start.date
diff --git a/18_backtrace/Makefile b/18_backtrace/Makefile
index 789ed5cde..fbd96e64e 100644
--- a/18_backtrace/Makefile
+++ b/18_backtrace/Makefile
@@ -2,8 +2,9 @@
 ##
 ## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/format.mk
 include ../common/docker.mk
+include ../common/format.mk
+include ../common/operating_system.mk
 
 ##--------------------------------------------------------------------------------------------------
 ## Optional, user-provided configuration values
@@ -200,8 +201,7 @@ $(KERNEL_ELF_TTABLES): $(KERNEL_ELF_TTABLES_DEPS)
 ##------------------------------------------------------------------------------
 $(KERNEL_ELF_TTABLES_SYMS): $(KERNEL_ELF_TTABLES_SYMS_DEPS)
 	$(call color_header, "Generating kernel symbols and patching kernel ELF")
-	@time -f "in %es" \
-                $(MAKE) --no-print-directory -f kernel_symbols.mk
+	@$(MAKE) --no-print-directory -f kernel_symbols.mk
 
 ##------------------------------------------------------------------------------
 ## Generate the stripped kernel binary
@@ -212,7 +212,7 @@ $(KERNEL_BIN): $(KERNEL_ELF_TTABLES_SYMS)
 	$(call color_progress_prefix, "Name")
 	@echo $(KERNEL_BIN)
 	$(call color_progress_prefix, "Size")
-	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
+	$(call disk_usage_KiB, $(KERNEL_BIN))
 
 ##------------------------------------------------------------------------------
 ## Generate the documentation
diff --git a/18_backtrace/README.md b/18_backtrace/README.md
index 021b84357..837d01617 100644
--- a/18_backtrace/README.md
+++ b/18_backtrace/README.md
@@ -1227,7 +1227,7 @@ diff -uNr 17_kernel_symbols/kernel/tests/07_backtrace_invalid_link.rs 18_backtra
 diff -uNr 17_kernel_symbols/Makefile 18_backtrace/Makefile
 --- 17_kernel_symbols/Makefile
 +++ 18_backtrace/Makefile
-@@ -42,7 +42,7 @@
+@@ -43,7 +43,7 @@
      OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
      JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
      LD_SCRIPT_PATH    = $(shell pwd)/kernel/src/bsp/raspberrypi
@@ -1236,7 +1236,7 @@ diff -uNr 17_kernel_symbols/Makefile 18_backtrace/Makefile
  else ifeq ($(BSP),rpi4)
      TARGET            = aarch64-unknown-none-softfloat
      KERNEL_BIN        = kernel8.img
-@@ -56,7 +56,7 @@
+@@ -57,7 +57,7 @@
      OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
      JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
      LD_SCRIPT_PATH    = $(shell pwd)/kernel/src/bsp/raspberrypi
@@ -1245,7 +1245,7 @@ diff -uNr 17_kernel_symbols/Makefile 18_backtrace/Makefile
  endif
 
  # Export for build.rs.
-@@ -121,10 +121,12 @@
+@@ -122,10 +122,12 @@
      $(FEATURES)                    \
      --release
 
diff --git a/18_backtrace/kernel_symbols.mk b/18_backtrace/kernel_symbols.mk
index 5b51ccfed..d496ea8ae 100644
--- a/18_backtrace/kernel_symbols.mk
+++ b/18_backtrace/kernel_symbols.mk
@@ -79,9 +79,11 @@ DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 ##--------------------------------------------------------------------------------------------------
 ## Targets
 ##--------------------------------------------------------------------------------------------------
-.PHONY: all
+.PHONY: all symbols measure_time_start measure_time_finish
 
-all:
+all: measure_time_start symbols measure_time_finish
+
+symbols:
 	@cp $(KERNEL_SYMBOLS_INPUT_ELF) $(KERNEL_SYMBOLS_OUTPUT_ELF)
 
 	@$(DOCKER_TOOLS) $(EXEC_SYMBOLS_TOOL) --gen_symbols $(KERNEL_SYMBOLS_OUTPUT_ELF) \
@@ -100,4 +102,16 @@ all:
 	@$(DOCKER_TOOLS) $(EXEC_SYMBOLS_TOOL) --patch_data $(KERNEL_SYMBOLS_OUTPUT_ELF) \
                 $(KERNEL_SYMBOLS_STRIPPED)
 
+# Note: The following is the only _trivial_ way I could think of that works out of the box on both
+# Linux and macOS. Since macOS does not have the %N nanosecond format string option, the
+# resolution is restricted to whole seconds.
+measure_time_start:
+	@date +%s > /tmp/kernel_symbols_start.date
+
+measure_time_finish:
+	@date +%s > /tmp/kernel_symbols_end.date
+
 	$(call color_progress_prefix, "Finished")
+	@echo "in $$((`cat /tmp/kernel_symbols_end.date` - `cat /tmp/kernel_symbols_start.date`)).0s"
+
+	@rm /tmp/kernel_symbols_end.date /tmp/kernel_symbols_start.date
diff --git a/19_kernel_heap/Makefile b/19_kernel_heap/Makefile
index be41c136c..43f5ad1f3 100644
--- a/19_kernel_heap/Makefile
+++ b/19_kernel_heap/Makefile
@@ -2,8 +2,9 @@
 ##
 ## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/format.mk
 include ../common/docker.mk
+include ../common/format.mk
+include ../common/operating_system.mk
 
 ##--------------------------------------------------------------------------------------------------
 ## Optional, user-provided configuration values
@@ -205,8 +206,7 @@ $(KERNEL_ELF_TTABLES): $(KERNEL_ELF_TTABLES_DEPS)
 ##------------------------------------------------------------------------------
 $(KERNEL_ELF_TTABLES_SYMS): $(KERNEL_ELF_TTABLES_SYMS_DEPS)
 	$(call color_header, "Generating kernel symbols and patching kernel ELF")
-	@time -f "in %es" \
-                $(MAKE) --no-print-directory -f kernel_symbols.mk
+	@$(MAKE) --no-print-directory -f kernel_symbols.mk
 
 ##------------------------------------------------------------------------------
 ## Generate the stripped kernel binary
@@ -217,7 +217,7 @@ $(KERNEL_BIN): $(KERNEL_ELF_TTABLES_SYMS)
 	$(call color_progress_prefix, "Name")
 	@echo $(KERNEL_BIN)
 	$(call color_progress_prefix, "Size")
-	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
+	$(call disk_usage_KiB, $(KERNEL_BIN))
 
 ##------------------------------------------------------------------------------
 ## Generate the documentation
diff --git a/19_kernel_heap/README.md b/19_kernel_heap/README.md
index a40d203d9..54bca4ef6 100644
--- a/19_kernel_heap/README.md
+++ b/19_kernel_heap/README.md
@@ -1426,7 +1426,7 @@ diff -uNr 18_backtrace/kernel/src/state.rs 19_kernel_heap/kernel/src/state.rs
 diff -uNr 18_backtrace/Makefile 19_kernel_heap/Makefile
 --- 18_backtrace/Makefile
 +++ 19_kernel_heap/Makefile
-@@ -15,6 +15,11 @@
+@@ -16,6 +16,11 @@
  # Default to a serial device name that is common in Linux.
  DEV_SERIAL ?= /dev/ttyUSB0
 
@@ -1438,7 +1438,7 @@ diff -uNr 18_backtrace/Makefile 19_kernel_heap/Makefile
  # Optional integration test name.
  ifdef TEST
      TEST_ARG = --test $(TEST)
-@@ -69,7 +74,7 @@
+@@ -70,7 +75,7 @@
  ##--------------------------------------------------------------------------------------------------
  KERNEL_MANIFEST      = kernel/Cargo.toml
  KERNEL_LINKER_SCRIPT = kernel.ld
@@ -1447,7 +1447,7 @@ diff -uNr 18_backtrace/Makefile 19_kernel_heap/Makefile
 
  KERNEL_ELF_RAW      = target/$(TARGET)/release/kernel
  # This parses cargo's dep-info file.
-@@ -116,17 +121,17 @@
+@@ -117,17 +122,17 @@
      -D warnings                   \
      -D missing_docs
 
diff --git a/19_kernel_heap/kernel_symbols.mk b/19_kernel_heap/kernel_symbols.mk
index 5b51ccfed..d496ea8ae 100644
--- a/19_kernel_heap/kernel_symbols.mk
+++ b/19_kernel_heap/kernel_symbols.mk
@@ -79,9 +79,11 @@ DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
 ##--------------------------------------------------------------------------------------------------
 ## Targets
 ##--------------------------------------------------------------------------------------------------
-.PHONY: all
+.PHONY: all symbols measure_time_start measure_time_finish
 
-all:
+all: measure_time_start symbols measure_time_finish
+
+symbols:
 	@cp $(KERNEL_SYMBOLS_INPUT_ELF) $(KERNEL_SYMBOLS_OUTPUT_ELF)
 
 	@$(DOCKER_TOOLS) $(EXEC_SYMBOLS_TOOL) --gen_symbols $(KERNEL_SYMBOLS_OUTPUT_ELF) \
@@ -100,4 +102,16 @@ all:
 	@$(DOCKER_TOOLS) $(EXEC_SYMBOLS_TOOL) --patch_data $(KERNEL_SYMBOLS_OUTPUT_ELF) \
                 $(KERNEL_SYMBOLS_STRIPPED)
 
+# Note: The following is the only _trivial_ way I could think of that works out of the box on both
+# Linux and macOS. Since macOS does not have the %N nanosecond format string option, the
+# resolution is restricted to whole seconds.
+measure_time_start:
+	@date +%s > /tmp/kernel_symbols_start.date
+
+measure_time_finish:
+	@date +%s > /tmp/kernel_symbols_end.date
+
 	$(call color_progress_prefix, "Finished")
+	@echo "in $$((`cat /tmp/kernel_symbols_end.date` - `cat /tmp/kernel_symbols_start.date`)).0s"
+
+	@rm /tmp/kernel_symbols_end.date /tmp/kernel_symbols_start.date
diff --git a/README.md b/README.md
index 745dd3c5b..7267f4405 100644
--- a/README.md
+++ b/README.md
@@ -81,10 +81,16 @@ The tutorials are primarily targeted at **Linux**-based distributions. Most stuf
 1. In case you use `Visual Studio Code`, I strongly recommend installing the [Rust Analyzer extension].
 1. (**macOS only**) Install a few `Ruby` gems.
 
+  This was last tested by the author with Ruby version `3.0.2` on `macOS Monterey`. If you are using
+  `rbenv`, the respective `.ruby-version` file is already in place. If you never heard of `rbenv`,
+  try using [this little guide](https://stackoverflow.com/a/68118750).
+
    Run this in the repository root folder:
 
    ```bash
-   bundle install --path .vendor/bundle --without development
+   bundle config set --local path '.vendor/bundle'
+   bundle config set --local without 'development'
+   bundle install
    ```
 
 [docker group]: https://docs.docker.com/engine/install/linux-postinstall/
diff --git a/X1_JTAG_boot/Makefile b/X1_JTAG_boot/Makefile
index 76ddb186e..23de6557b 100644
--- a/X1_JTAG_boot/Makefile
+++ b/X1_JTAG_boot/Makefile
@@ -2,8 +2,9 @@
 ##
 ## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
 
-include ../common/format.mk
 include ../common/docker.mk
+include ../common/format.mk
+include ../common/operating_system.mk
 
 ##--------------------------------------------------------------------------------------------------
 ## Optional, user-provided configuration values
@@ -145,7 +146,7 @@ $(KERNEL_BIN): $(KERNEL_ELF)
 	$(call color_progress_prefix, "Name")
 	@echo $(KERNEL_BIN)
 	$(call color_progress_prefix, "Size")
-	@printf '%s KiB\n' `du -k $(KERNEL_BIN) | cut -f1`
+	$(call disk_usage_KiB, $(KERNEL_BIN))
 
 ##------------------------------------------------------------------------------
 ## Generate the documentation
diff --git a/common/operating_system.mk b/common/operating_system.mk
new file mode 100644
index 000000000..90172f775
--- /dev/null
+++ b/common/operating_system.mk
@@ -0,0 +1,9 @@
+ifeq ($(shell uname -s),Linux)
+    DU_ARGUMENTS = --block-size=1024 --apparent-size
+else ifeq ($(shell uname -s),Darwin)
+    DU_ARGUMENTS = -k -A
+endif
+
+define disk_usage_KiB
+    @printf '%s KiB\n' `du $(DU_ARGUMENTS) $(1) | cut -f1`
+endef

From 203fe318d4985ef139900175b5ff2ddffa6a6387 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Tue, 25 Oct 2022 08:37:35 +0200
Subject: [PATCH 193/214] Fix rubocop complaint; Bump actions Ubuntu version

---
 .github/workflows/build_rpi3.yml       | 6 +++---
 .github/workflows/build_rpi4.yml       | 6 +++---
 .github/workflows/sanity.yml           | 6 +++---
 .github/workflows/test_integration.yml | 6 +++---
 .github/workflows/test_unit.yml        | 6 +++---
 .github/workflows/test_xtra.yml        | 6 +++---
 Gemfile                                | 2 +-
 contributor_setup.sh                   | 2 +-
 utils/devtool.rb                       | 2 +-
 9 files changed, 21 insertions(+), 21 deletions(-)

diff --git a/.github/workflows/build_rpi3.yml b/.github/workflows/build_rpi3.yml
index d974eebf2..acdea068f 100644
--- a/.github/workflows/build_rpi3.yml
+++ b/.github/workflows/build_rpi3.yml
@@ -21,11 +21,11 @@ on:
 jobs:
   build:
     name: Build kernels
-    runs-on: ubuntu-20.04
+    runs-on: ubuntu-22.04
 
     steps:
-      - uses: actions/checkout@v2
-      - name: Set up Ruby 2.x
+      - uses: actions/checkout@v3
+      - name: Set up Ruby
         uses: ruby/setup-ruby@v1
       - name: Set up Rust nightly
         run: |
diff --git a/.github/workflows/build_rpi4.yml b/.github/workflows/build_rpi4.yml
index 68de1dc1e..c511f7bc5 100644
--- a/.github/workflows/build_rpi4.yml
+++ b/.github/workflows/build_rpi4.yml
@@ -21,11 +21,11 @@ on:
 jobs:
   build:
     name: Build kernels
-    runs-on: ubuntu-20.04
+    runs-on: ubuntu-22.04
 
     steps:
-      - uses: actions/checkout@v2
-      - name: Set up Ruby 2.x
+      - uses: actions/checkout@v3
+      - name: Set up Ruby
         uses: ruby/setup-ruby@v1
       - name: Set up Rust nightly
         run: |
diff --git a/.github/workflows/sanity.yml b/.github/workflows/sanity.yml
index a42198d74..9441e3c92 100644
--- a/.github/workflows/sanity.yml
+++ b/.github/workflows/sanity.yml
@@ -11,15 +11,15 @@ on:
 jobs:
   build:
     name: Various Sanity Checks
-    runs-on: ubuntu-20.04
+    runs-on: ubuntu-22.04
 
     steps:
-      - uses: actions/checkout@v2
+      - uses: actions/checkout@v3
       - name: Set up Node
         uses: actions/setup-node@v1
         with:
           node-version: "12"
-      - name: Set up Ruby 2.x
+      - name: Set up Ruby
         uses: ruby/setup-ruby@v1
       - name: Set up Rust nightly
         run: |
diff --git a/.github/workflows/test_integration.yml b/.github/workflows/test_integration.yml
index 954d64328..f2980039e 100644
--- a/.github/workflows/test_integration.yml
+++ b/.github/workflows/test_integration.yml
@@ -21,11 +21,11 @@ on:
 jobs:
   build:
     name: Run integration tests
-    runs-on: ubuntu-20.04
+    runs-on: ubuntu-22.04
 
     steps:
-      - uses: actions/checkout@v2
-      - name: Set up Ruby 2.x
+      - uses: actions/checkout@v3
+      - name: Set up Ruby
         uses: ruby/setup-ruby@v1
       - name: Set up Rust nightly
         run: |
diff --git a/.github/workflows/test_unit.yml b/.github/workflows/test_unit.yml
index 02de1b843..909bde35f 100644
--- a/.github/workflows/test_unit.yml
+++ b/.github/workflows/test_unit.yml
@@ -21,11 +21,11 @@ on:
 jobs:
   build:
     name: Run boot and unit tests
-    runs-on: ubuntu-20.04
+    runs-on: ubuntu-22.04
 
     steps:
-      - uses: actions/checkout@v2
-      - name: Set up Ruby 2.x
+      - uses: actions/checkout@v3
+      - name: Set up Ruby
         uses: ruby/setup-ruby@v1
       - name: Set up Rust nightly
         run: |
diff --git a/.github/workflows/test_xtra.yml b/.github/workflows/test_xtra.yml
index a330ef74c..f77c8da10 100644
--- a/.github/workflows/test_xtra.yml
+++ b/.github/workflows/test_xtra.yml
@@ -21,11 +21,11 @@ on:
 jobs:
   build:
     name: Run xtra tests
-    runs-on: ubuntu-20.04
+    runs-on: ubuntu-22.04
 
     steps:
-      - uses: actions/checkout@v2
-      - name: Set up Ruby 2.x
+      - uses: actions/checkout@v3
+      - name: Set up Ruby
         uses: ruby/setup-ruby@v1
       - name: Set up Rust nightly
         run: |
diff --git a/Gemfile b/Gemfile
index 7ac3b89ec..482564845 100644
--- a/Gemfile
+++ b/Gemfile
@@ -11,5 +11,5 @@ group :uart do
 end
 
 group :development do
-    gem 'rubocop', '>= 1.4.1', require: false
+    gem 'rubocop', '>= 1.37.1', require: false
 end
diff --git a/contributor_setup.sh b/contributor_setup.sh
index 8348b4d7d..26a4059e4 100755
--- a/contributor_setup.sh
+++ b/contributor_setup.sh
@@ -10,7 +10,7 @@ then
     echo "'bundle' could not be found. Please install Ruby and Bundler."
     exit
 fi
-bundle config set path '.vendor/bundle'
+bundle config set --local path '.vendor/bundle'
 bundle install
 
 #
diff --git a/utils/devtool.rb b/utils/devtool.rb
index 47141c1d8..fdbcf3a5d 100755
--- a/utils/devtool.rb
+++ b/utils/devtool.rb
@@ -108,7 +108,7 @@ def initialize
         @user_has_supplied_crates = false
         @bsp = bsp_from_env || SUPPORTED_BSPS.first
 
-        cl = user_supplied_crate_list || Dir['*/Cargo.toml'].sort
+        cl = user_supplied_crate_list || Dir['*/Cargo.toml']
         @crates = cl.map { |c| TutorialCrate.new(c.delete_suffix('/Cargo.toml')) }
     end
 

From e04022a9eff2d49912c186aacde5ba1a7524a9fd Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Tue, 25 Oct 2022 08:46:05 +0200
Subject: [PATCH 194/214] actions: Bump node to 16

---
 .github/workflows/build_rpi3.yml       | 2 +-
 .github/workflows/build_rpi4.yml       | 2 +-
 .github/workflows/sanity.yml           | 2 +-
 .github/workflows/test_integration.yml | 2 +-
 .github/workflows/test_unit.yml        | 2 +-
 .github/workflows/test_xtra.yml        | 2 +-
 6 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/.github/workflows/build_rpi3.yml b/.github/workflows/build_rpi3.yml
index acdea068f..179752b73 100644
--- a/.github/workflows/build_rpi3.yml
+++ b/.github/workflows/build_rpi3.yml
@@ -35,6 +35,6 @@ jobs:
           gem install bundler
           bundle config set without 'uart'
           bundle install --retry 3
-      - name: Make
+      - name: Run
         run: |
           BSP=rpi3 bundle exec ruby utils/devtool.rb make
diff --git a/.github/workflows/build_rpi4.yml b/.github/workflows/build_rpi4.yml
index c511f7bc5..88d698853 100644
--- a/.github/workflows/build_rpi4.yml
+++ b/.github/workflows/build_rpi4.yml
@@ -35,6 +35,6 @@ jobs:
           gem install bundler
           bundle config set without 'uart'
           bundle install --retry 3
-      - name: Make
+      - name: Run
         run: |
           BSP=rpi4 bundle exec ruby utils/devtool.rb make
diff --git a/.github/workflows/sanity.yml b/.github/workflows/sanity.yml
index 9441e3c92..fc14b2421 100644
--- a/.github/workflows/sanity.yml
+++ b/.github/workflows/sanity.yml
@@ -18,7 +18,7 @@ jobs:
       - name: Set up Node
         uses: actions/setup-node@v1
         with:
-          node-version: "12"
+          node-version: "16"
       - name: Set up Ruby
         uses: ruby/setup-ruby@v1
       - name: Set up Rust nightly
diff --git a/.github/workflows/test_integration.yml b/.github/workflows/test_integration.yml
index f2980039e..affc97934 100644
--- a/.github/workflows/test_integration.yml
+++ b/.github/workflows/test_integration.yml
@@ -35,6 +35,6 @@ jobs:
           gem install bundler
           bundle config set without 'uart'
           bundle install --retry 3
-      - name: Make all
+      - name: Run
         run: |
           bundle exec ruby utils/devtool.rb test_integration
diff --git a/.github/workflows/test_unit.yml b/.github/workflows/test_unit.yml
index 909bde35f..7518b08cb 100644
--- a/.github/workflows/test_unit.yml
+++ b/.github/workflows/test_unit.yml
@@ -35,7 +35,7 @@ jobs:
           gem install bundler
           bundle config set without 'uart'
           bundle install --retry 3
-      - name: Make all
+      - name: Run
         run: |
           bundle exec ruby utils/devtool.rb test_boot
           bundle exec ruby utils/devtool.rb test_unit
diff --git a/.github/workflows/test_xtra.yml b/.github/workflows/test_xtra.yml
index f77c8da10..a2a6c1e0a 100644
--- a/.github/workflows/test_xtra.yml
+++ b/.github/workflows/test_xtra.yml
@@ -35,6 +35,6 @@ jobs:
           gem install bundler
           bundle config set without 'uart'
           bundle install --retry 3
-      - name: Make all
+      - name: Run
         run: |
           bundle exec ruby utils/devtool.rb make_xtra

From c0fb7f536a44a9e8e4f1060b719f66c76fef87bd Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Wed, 26 Oct 2022 21:48:14 +0200
Subject: [PATCH 195/214] Bump dependencies

---
 12_integrated_testing/Cargo.lock                 | 12 ++++++------
 13_exceptions_part2_peripheral_IRQs/Cargo.lock   | 12 ++++++------
 14_virtual_mem_part2_mmio_remap/Cargo.lock       | 12 ++++++------
 .../Cargo.lock                                   | 12 ++++++------
 .../Cargo.lock                                   | 12 ++++++------
 17_kernel_symbols/Cargo.lock                     | 12 ++++++------
 18_backtrace/Cargo.lock                          | 12 ++++++------
 19_kernel_heap/Cargo.lock                        | 16 ++++++++--------
 8 files changed, 50 insertions(+), 50 deletions(-)

diff --git a/12_integrated_testing/Cargo.lock b/12_integrated_testing/Cargo.lock
index 7af740b13..abe5ab828 100644
--- a/12_integrated_testing/Cargo.lock
+++ b/12_integrated_testing/Cargo.lock
@@ -24,9 +24,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.44"
+version = "1.0.47"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "7bd7356a8122b6c4a24a82b278680c73357984ca2fc79a0f9fa6dea7dced7c58"
+checksum = "5ea3d908b0e36316caf9e9e2c4625cdde190a7e6f440d794667ed17a1855e725"
 dependencies = [
  "unicode-ident",
 ]
@@ -48,9 +48,9 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.101"
+version = "1.0.103"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "e90cde112c4b9690b8cbe810cba9ddd8bc1d7472e2cae317b69e9438c1cba7d2"
+checksum = "a864042229133ada95abf3b54fdc62ef5ccabe9515b64717bcb9a1919e59445d"
 dependencies = [
  "proc-macro2",
  "quote",
@@ -79,6 +79,6 @@ checksum = "696941a0aee7e276a165a978b37918fd5d22c55c3d6bda197813070ca9c0f21c"
 
 [[package]]
 name = "unicode-ident"
-version = "1.0.4"
+version = "1.0.5"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "dcc811dc4066ac62f84f11307873c4850cb653bfa9b1719cee2bd2204a4bc5dd"
+checksum = "6ceab39d59e4c9499d4e5a8ee0e2735b891bb7308ac83dfb4e80cad195c9f6f3"
diff --git a/13_exceptions_part2_peripheral_IRQs/Cargo.lock b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
index 59d40ee6d..d893a0afb 100644
--- a/13_exceptions_part2_peripheral_IRQs/Cargo.lock
+++ b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
@@ -24,9 +24,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.44"
+version = "1.0.47"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "7bd7356a8122b6c4a24a82b278680c73357984ca2fc79a0f9fa6dea7dced7c58"
+checksum = "5ea3d908b0e36316caf9e9e2c4625cdde190a7e6f440d794667ed17a1855e725"
 dependencies = [
  "unicode-ident",
 ]
@@ -48,9 +48,9 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.101"
+version = "1.0.103"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "e90cde112c4b9690b8cbe810cba9ddd8bc1d7472e2cae317b69e9438c1cba7d2"
+checksum = "a864042229133ada95abf3b54fdc62ef5ccabe9515b64717bcb9a1919e59445d"
 dependencies = [
  "proc-macro2",
  "quote",
@@ -79,6 +79,6 @@ checksum = "696941a0aee7e276a165a978b37918fd5d22c55c3d6bda197813070ca9c0f21c"
 
 [[package]]
 name = "unicode-ident"
-version = "1.0.4"
+version = "1.0.5"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "dcc811dc4066ac62f84f11307873c4850cb653bfa9b1719cee2bd2204a4bc5dd"
+checksum = "6ceab39d59e4c9499d4e5a8ee0e2735b891bb7308ac83dfb4e80cad195c9f6f3"
diff --git a/14_virtual_mem_part2_mmio_remap/Cargo.lock b/14_virtual_mem_part2_mmio_remap/Cargo.lock
index a66dec99c..dd14a9d79 100644
--- a/14_virtual_mem_part2_mmio_remap/Cargo.lock
+++ b/14_virtual_mem_part2_mmio_remap/Cargo.lock
@@ -24,9 +24,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.44"
+version = "1.0.47"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "7bd7356a8122b6c4a24a82b278680c73357984ca2fc79a0f9fa6dea7dced7c58"
+checksum = "5ea3d908b0e36316caf9e9e2c4625cdde190a7e6f440d794667ed17a1855e725"
 dependencies = [
  "unicode-ident",
 ]
@@ -48,9 +48,9 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.101"
+version = "1.0.103"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "e90cde112c4b9690b8cbe810cba9ddd8bc1d7472e2cae317b69e9438c1cba7d2"
+checksum = "a864042229133ada95abf3b54fdc62ef5ccabe9515b64717bcb9a1919e59445d"
 dependencies = [
  "proc-macro2",
  "quote",
@@ -79,6 +79,6 @@ checksum = "696941a0aee7e276a165a978b37918fd5d22c55c3d6bda197813070ca9c0f21c"
 
 [[package]]
 name = "unicode-ident"
-version = "1.0.4"
+version = "1.0.5"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "dcc811dc4066ac62f84f11307873c4850cb653bfa9b1719cee2bd2204a4bc5dd"
+checksum = "6ceab39d59e4c9499d4e5a8ee0e2735b891bb7308ac83dfb4e80cad195c9f6f3"
diff --git a/15_virtual_mem_part3_precomputed_tables/Cargo.lock b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
index e0c25535c..6863764a8 100644
--- a/15_virtual_mem_part3_precomputed_tables/Cargo.lock
+++ b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
@@ -24,9 +24,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.44"
+version = "1.0.47"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "7bd7356a8122b6c4a24a82b278680c73357984ca2fc79a0f9fa6dea7dced7c58"
+checksum = "5ea3d908b0e36316caf9e9e2c4625cdde190a7e6f440d794667ed17a1855e725"
 dependencies = [
  "unicode-ident",
 ]
@@ -48,9 +48,9 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.101"
+version = "1.0.103"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "e90cde112c4b9690b8cbe810cba9ddd8bc1d7472e2cae317b69e9438c1cba7d2"
+checksum = "a864042229133ada95abf3b54fdc62ef5ccabe9515b64717bcb9a1919e59445d"
 dependencies = [
  "proc-macro2",
  "quote",
@@ -79,6 +79,6 @@ checksum = "696941a0aee7e276a165a978b37918fd5d22c55c3d6bda197813070ca9c0f21c"
 
 [[package]]
 name = "unicode-ident"
-version = "1.0.4"
+version = "1.0.5"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "dcc811dc4066ac62f84f11307873c4850cb653bfa9b1719cee2bd2204a4bc5dd"
+checksum = "6ceab39d59e4c9499d4e5a8ee0e2735b891bb7308ac83dfb4e80cad195c9f6f3"
diff --git a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
index 95941be45..1cd1bc744 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
+++ b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
@@ -24,9 +24,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.44"
+version = "1.0.47"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "7bd7356a8122b6c4a24a82b278680c73357984ca2fc79a0f9fa6dea7dced7c58"
+checksum = "5ea3d908b0e36316caf9e9e2c4625cdde190a7e6f440d794667ed17a1855e725"
 dependencies = [
  "unicode-ident",
 ]
@@ -48,9 +48,9 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.101"
+version = "1.0.103"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "e90cde112c4b9690b8cbe810cba9ddd8bc1d7472e2cae317b69e9438c1cba7d2"
+checksum = "a864042229133ada95abf3b54fdc62ef5ccabe9515b64717bcb9a1919e59445d"
 dependencies = [
  "proc-macro2",
  "quote",
@@ -79,6 +79,6 @@ checksum = "696941a0aee7e276a165a978b37918fd5d22c55c3d6bda197813070ca9c0f21c"
 
 [[package]]
 name = "unicode-ident"
-version = "1.0.4"
+version = "1.0.5"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "dcc811dc4066ac62f84f11307873c4850cb653bfa9b1719cee2bd2204a4bc5dd"
+checksum = "6ceab39d59e4c9499d4e5a8ee0e2735b891bb7308ac83dfb4e80cad195c9f6f3"
diff --git a/17_kernel_symbols/Cargo.lock b/17_kernel_symbols/Cargo.lock
index 8c84705d7..af229efe8 100644
--- a/17_kernel_symbols/Cargo.lock
+++ b/17_kernel_symbols/Cargo.lock
@@ -36,9 +36,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.44"
+version = "1.0.47"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "7bd7356a8122b6c4a24a82b278680c73357984ca2fc79a0f9fa6dea7dced7c58"
+checksum = "5ea3d908b0e36316caf9e9e2c4625cdde190a7e6f440d794667ed17a1855e725"
 dependencies = [
  "unicode-ident",
 ]
@@ -60,9 +60,9 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.101"
+version = "1.0.103"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "e90cde112c4b9690b8cbe810cba9ddd8bc1d7472e2cae317b69e9438c1cba7d2"
+checksum = "a864042229133ada95abf3b54fdc62ef5ccabe9515b64717bcb9a1919e59445d"
 dependencies = [
  "proc-macro2",
  "quote",
@@ -91,6 +91,6 @@ checksum = "696941a0aee7e276a165a978b37918fd5d22c55c3d6bda197813070ca9c0f21c"
 
 [[package]]
 name = "unicode-ident"
-version = "1.0.4"
+version = "1.0.5"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "dcc811dc4066ac62f84f11307873c4850cb653bfa9b1719cee2bd2204a4bc5dd"
+checksum = "6ceab39d59e4c9499d4e5a8ee0e2735b891bb7308ac83dfb4e80cad195c9f6f3"
diff --git a/18_backtrace/Cargo.lock b/18_backtrace/Cargo.lock
index f662e8a6a..2b51ab722 100644
--- a/18_backtrace/Cargo.lock
+++ b/18_backtrace/Cargo.lock
@@ -36,9 +36,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.44"
+version = "1.0.47"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "7bd7356a8122b6c4a24a82b278680c73357984ca2fc79a0f9fa6dea7dced7c58"
+checksum = "5ea3d908b0e36316caf9e9e2c4625cdde190a7e6f440d794667ed17a1855e725"
 dependencies = [
  "unicode-ident",
 ]
@@ -60,9 +60,9 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.101"
+version = "1.0.103"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "e90cde112c4b9690b8cbe810cba9ddd8bc1d7472e2cae317b69e9438c1cba7d2"
+checksum = "a864042229133ada95abf3b54fdc62ef5ccabe9515b64717bcb9a1919e59445d"
 dependencies = [
  "proc-macro2",
  "quote",
@@ -91,6 +91,6 @@ checksum = "696941a0aee7e276a165a978b37918fd5d22c55c3d6bda197813070ca9c0f21c"
 
 [[package]]
 name = "unicode-ident"
-version = "1.0.4"
+version = "1.0.5"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "dcc811dc4066ac62f84f11307873c4850cb653bfa9b1719cee2bd2204a4bc5dd"
+checksum = "6ceab39d59e4c9499d4e5a8ee0e2735b891bb7308ac83dfb4e80cad195c9f6f3"
diff --git a/19_kernel_heap/Cargo.lock b/19_kernel_heap/Cargo.lock
index f8d4b6f80..eb80ffead 100644
--- a/19_kernel_heap/Cargo.lock
+++ b/19_kernel_heap/Cargo.lock
@@ -24,9 +24,9 @@ dependencies = [
 
 [[package]]
 name = "linked_list_allocator"
-version = "0.10.3"
+version = "0.10.4"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "2e8da0e6283aace40e4e0395fe5ad7a147fac6ff47bda1f038b5044fb11683c2"
+checksum = "e322f259d225fbae43a1b053b2dc6a5968a6bdf8b205f5de684dab485b95030e"
 
 [[package]]
 name = "mingo"
@@ -43,9 +43,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.44"
+version = "1.0.47"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "7bd7356a8122b6c4a24a82b278680c73357984ca2fc79a0f9fa6dea7dced7c58"
+checksum = "5ea3d908b0e36316caf9e9e2c4625cdde190a7e6f440d794667ed17a1855e725"
 dependencies = [
  "unicode-ident",
 ]
@@ -67,9 +67,9 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "1.0.101"
+version = "1.0.103"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "e90cde112c4b9690b8cbe810cba9ddd8bc1d7472e2cae317b69e9438c1cba7d2"
+checksum = "a864042229133ada95abf3b54fdc62ef5ccabe9515b64717bcb9a1919e59445d"
 dependencies = [
  "proc-macro2",
  "quote",
@@ -98,6 +98,6 @@ checksum = "696941a0aee7e276a165a978b37918fd5d22c55c3d6bda197813070ca9c0f21c"
 
 [[package]]
 name = "unicode-ident"
-version = "1.0.4"
+version = "1.0.5"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "dcc811dc4066ac62f84f11307873c4850cb653bfa9b1719cee2bd2204a4bc5dd"
+checksum = "6ceab39d59e4c9499d4e5a8ee0e2735b891bb7308ac83dfb4e80cad195c9f6f3"

From 2035ae1a51b7ce1ad48aa001acff9923013154b0 Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Wed, 26 Oct 2022 22:02:12 +0200
Subject: [PATCH 196/214] Add tutorial 20

---
 20_timer_callbacks/.cargo/config.toml         |   2 +
 20_timer_callbacks/.vscode/settings.json      |  10 +
 20_timer_callbacks/Cargo.lock                 | 103 +++
 20_timer_callbacks/Cargo.toml                 |  11 +
 20_timer_callbacks/Makefile                   | 393 ++++++++++
 20_timer_callbacks/README.md                  | 735 ++++++++++++++++++
 20_timer_callbacks/kernel/Cargo.lock          |  96 +++
 20_timer_callbacks/kernel/Cargo.toml          |  72 ++
 20_timer_callbacks/kernel/build.rs            |  20 +
 .../kernel/src/_arch/aarch64/backtrace.rs     | 136 ++++
 .../kernel/src/_arch/aarch64/cpu.rs           |  49 ++
 .../kernel/src/_arch/aarch64/cpu/boot.rs      | 117 +++
 .../kernel/src/_arch/aarch64/cpu/boot.s       | 105 +++
 .../kernel/src/_arch/aarch64/cpu/smp.rs       |  30 +
 .../kernel/src/_arch/aarch64/exception.rs     | 325 ++++++++
 .../kernel/src/_arch/aarch64/exception.s      | 190 +++++
 .../_arch/aarch64/exception/asynchronous.rs   | 141 ++++
 .../kernel/src/_arch/aarch64/memory/mmu.rs    | 158 ++++
 .../aarch64/memory/mmu/translation_table.rs   | 521 +++++++++++++
 .../kernel/src/_arch/aarch64/time.rs          | 193 +++++
 20_timer_callbacks/kernel/src/backtrace.rs    | 114 +++
 20_timer_callbacks/kernel/src/bsp.rs          |  13 +
 .../kernel/src/bsp/device_driver.rs           |  16 +
 .../kernel/src/bsp/device_driver/arm.rs       |   9 +
 .../kernel/src/bsp/device_driver/arm/gicv2.rs | 234 ++++++
 .../src/bsp/device_driver/arm/gicv2/gicc.rs   | 145 ++++
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   | 201 +++++
 .../kernel/src/bsp/device_driver/bcm.rs       |  15 +
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs | 228 ++++++
 .../bcm/bcm2xxx_interrupt_controller.rs       | 175 +++++
 .../bcm2xxx_interrupt_controller/local_ic.rs  | 173 +++++
 .../peripheral_ic.rs                          | 178 +++++
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   | 516 ++++++++++++
 .../kernel/src/bsp/device_driver/common.rs    |  65 ++
 .../kernel/src/bsp/raspberrypi.rs             |  27 +
 .../kernel/src/bsp/raspberrypi/cpu.rs         |  14 +
 .../kernel/src/bsp/raspberrypi/driver.rs      | 193 +++++
 .../kernel/src/bsp/raspberrypi/exception.rs   |   7 +
 .../bsp/raspberrypi/exception/asynchronous.rs |  36 +
 .../kernel/src/bsp/raspberrypi/kernel.ld      | 134 ++++
 .../kernel_virt_addr_space_size.ld            |   1 +
 .../kernel/src/bsp/raspberrypi/memory.rs      | 254 ++++++
 .../kernel/src/bsp/raspberrypi/memory/mmu.rs  | 197 +++++
 20_timer_callbacks/kernel/src/common.rs       |  46 ++
 20_timer_callbacks/kernel/src/console.rs      |  93 +++
 .../kernel/src/console/buffer_console.rs      | 108 +++
 20_timer_callbacks/kernel/src/cpu.rs          |  21 +
 20_timer_callbacks/kernel/src/cpu/boot.rs     |   9 +
 20_timer_callbacks/kernel/src/cpu/smp.rs      |  14 +
 20_timer_callbacks/kernel/src/driver.rs       | 178 +++++
 20_timer_callbacks/kernel/src/exception.rs    |  48 ++
 .../kernel/src/exception/asynchronous.rs      | 190 +++++
 .../asynchronous/null_irq_manager.rs          |  42 +
 20_timer_callbacks/kernel/src/lib.rs          | 196 +++++
 20_timer_callbacks/kernel/src/main.rs         |  96 +++
 20_timer_callbacks/kernel/src/memory.rs       | 198 +++++
 .../kernel/src/memory/heap_alloc.rs           | 147 ++++
 20_timer_callbacks/kernel/src/memory/mmu.rs   | 262 +++++++
 .../kernel/src/memory/mmu/mapping_record.rs   | 204 +++++
 .../kernel/src/memory/mmu/page_alloc.rs       |  70 ++
 .../src/memory/mmu/translation_table.rs       | 137 ++++
 .../kernel/src/memory/mmu/types.rs            | 378 +++++++++
 20_timer_callbacks/kernel/src/panic_wait.rs   |  88 +++
 20_timer_callbacks/kernel/src/print.rs        | 112 +++
 20_timer_callbacks/kernel/src/state.rs        |  92 +++
 20_timer_callbacks/kernel/src/symbols.rs      |  88 +++
 .../kernel/src/synchronization.rs             | 159 ++++
 20_timer_callbacks/kernel/src/time.rs         | 263 +++++++
 .../kernel/tests/00_console_sanity.rb         |  48 ++
 .../kernel/tests/00_console_sanity.rs         |  38 +
 .../kernel/tests/01_timer_sanity.rs           |  51 ++
 .../tests/02_exception_sync_page_fault.rs     |  37 +
 .../tests/03_exception_restore_sanity.rb      |  25 +
 .../tests/03_exception_restore_sanity.rs      |  49 ++
 .../kernel/tests/04_exception_irq_sanity.rs   |  67 ++
 .../kernel/tests/05_backtrace_sanity.rb       |  39 +
 .../kernel/tests/05_backtrace_sanity.rs       |  31 +
 .../tests/06_backtrace_invalid_frame.rb       |  26 +
 .../tests/06_backtrace_invalid_frame.rs       |  33 +
 .../kernel/tests/07_backtrace_invalid_link.rb |  25 +
 .../kernel/tests/07_backtrace_invalid_link.rs |  38 +
 .../kernel/tests/boot_test_string.rb          |   3 +
 .../kernel/tests/panic_exit_success/mod.rs    |   9 +
 .../kernel/tests/panic_wait_forever/mod.rs    |   9 +
 20_timer_callbacks/kernel_symbols.mk          | 117 +++
 20_timer_callbacks/kernel_symbols/Cargo.lock  |  14 +
 20_timer_callbacks/kernel_symbols/Cargo.toml  |  15 +
 20_timer_callbacks/kernel_symbols/build.rs    |  14 +
 .../kernel_symbols/kernel_symbols.ld          |  15 +
 20_timer_callbacks/kernel_symbols/src/main.rs |  16 +
 .../libraries/debug-symbol-types/Cargo.toml   |   4 +
 .../libraries/debug-symbol-types/src/lib.rs   |  45 ++
 .../libraries/test-macros/Cargo.toml          |  14 +
 .../libraries/test-macros/src/lib.rs          |  29 +
 .../libraries/test-types/Cargo.toml           |   5 +
 .../libraries/test-types/src/lib.rs           |  16 +
 .../tools/kernel_symbols_tool/cmds.rb         |  45 ++
 .../tools/kernel_symbols_tool/kernel_elf.rb   |  74 ++
 .../tools/kernel_symbols_tool/main.rb         |  47 ++
 .../tools/translation_table_tool/arch.rb      | 314 ++++++++
 .../tools/translation_table_tool/bsp.rb       |  54 ++
 .../tools/translation_table_tool/generic.rb   | 189 +++++
 .../translation_table_tool/kernel_elf.rb      |  96 +++
 .../tools/translation_table_tool/main.rb      |  46 ++
 104 files changed, 11288 insertions(+)
 create mode 100644 20_timer_callbacks/.cargo/config.toml
 create mode 100644 20_timer_callbacks/.vscode/settings.json
 create mode 100644 20_timer_callbacks/Cargo.lock
 create mode 100644 20_timer_callbacks/Cargo.toml
 create mode 100644 20_timer_callbacks/Makefile
 create mode 100644 20_timer_callbacks/README.md
 create mode 100644 20_timer_callbacks/kernel/Cargo.lock
 create mode 100644 20_timer_callbacks/kernel/Cargo.toml
 create mode 100644 20_timer_callbacks/kernel/build.rs
 create mode 100644 20_timer_callbacks/kernel/src/_arch/aarch64/backtrace.rs
 create mode 100644 20_timer_callbacks/kernel/src/_arch/aarch64/cpu.rs
 create mode 100644 20_timer_callbacks/kernel/src/_arch/aarch64/cpu/boot.rs
 create mode 100644 20_timer_callbacks/kernel/src/_arch/aarch64/cpu/boot.s
 create mode 100644 20_timer_callbacks/kernel/src/_arch/aarch64/cpu/smp.rs
 create mode 100644 20_timer_callbacks/kernel/src/_arch/aarch64/exception.rs
 create mode 100644 20_timer_callbacks/kernel/src/_arch/aarch64/exception.s
 create mode 100644 20_timer_callbacks/kernel/src/_arch/aarch64/exception/asynchronous.rs
 create mode 100644 20_timer_callbacks/kernel/src/_arch/aarch64/memory/mmu.rs
 create mode 100644 20_timer_callbacks/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
 create mode 100644 20_timer_callbacks/kernel/src/_arch/aarch64/time.rs
 create mode 100644 20_timer_callbacks/kernel/src/backtrace.rs
 create mode 100644 20_timer_callbacks/kernel/src/bsp.rs
 create mode 100644 20_timer_callbacks/kernel/src/bsp/device_driver.rs
 create mode 100644 20_timer_callbacks/kernel/src/bsp/device_driver/arm.rs
 create mode 100644 20_timer_callbacks/kernel/src/bsp/device_driver/arm/gicv2.rs
 create mode 100644 20_timer_callbacks/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
 create mode 100644 20_timer_callbacks/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
 create mode 100644 20_timer_callbacks/kernel/src/bsp/device_driver/bcm.rs
 create mode 100644 20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 create mode 100644 20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
 create mode 100644 20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/local_ic.rs
 create mode 100644 20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
 create mode 100644 20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 create mode 100644 20_timer_callbacks/kernel/src/bsp/device_driver/common.rs
 create mode 100644 20_timer_callbacks/kernel/src/bsp/raspberrypi.rs
 create mode 100644 20_timer_callbacks/kernel/src/bsp/raspberrypi/cpu.rs
 create mode 100644 20_timer_callbacks/kernel/src/bsp/raspberrypi/driver.rs
 create mode 100644 20_timer_callbacks/kernel/src/bsp/raspberrypi/exception.rs
 create mode 100644 20_timer_callbacks/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
 create mode 100644 20_timer_callbacks/kernel/src/bsp/raspberrypi/kernel.ld
 create mode 100644 20_timer_callbacks/kernel/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
 create mode 100644 20_timer_callbacks/kernel/src/bsp/raspberrypi/memory.rs
 create mode 100644 20_timer_callbacks/kernel/src/bsp/raspberrypi/memory/mmu.rs
 create mode 100644 20_timer_callbacks/kernel/src/common.rs
 create mode 100644 20_timer_callbacks/kernel/src/console.rs
 create mode 100644 20_timer_callbacks/kernel/src/console/buffer_console.rs
 create mode 100644 20_timer_callbacks/kernel/src/cpu.rs
 create mode 100644 20_timer_callbacks/kernel/src/cpu/boot.rs
 create mode 100644 20_timer_callbacks/kernel/src/cpu/smp.rs
 create mode 100644 20_timer_callbacks/kernel/src/driver.rs
 create mode 100644 20_timer_callbacks/kernel/src/exception.rs
 create mode 100644 20_timer_callbacks/kernel/src/exception/asynchronous.rs
 create mode 100644 20_timer_callbacks/kernel/src/exception/asynchronous/null_irq_manager.rs
 create mode 100644 20_timer_callbacks/kernel/src/lib.rs
 create mode 100644 20_timer_callbacks/kernel/src/main.rs
 create mode 100644 20_timer_callbacks/kernel/src/memory.rs
 create mode 100644 20_timer_callbacks/kernel/src/memory/heap_alloc.rs
 create mode 100644 20_timer_callbacks/kernel/src/memory/mmu.rs
 create mode 100644 20_timer_callbacks/kernel/src/memory/mmu/mapping_record.rs
 create mode 100644 20_timer_callbacks/kernel/src/memory/mmu/page_alloc.rs
 create mode 100644 20_timer_callbacks/kernel/src/memory/mmu/translation_table.rs
 create mode 100644 20_timer_callbacks/kernel/src/memory/mmu/types.rs
 create mode 100644 20_timer_callbacks/kernel/src/panic_wait.rs
 create mode 100644 20_timer_callbacks/kernel/src/print.rs
 create mode 100644 20_timer_callbacks/kernel/src/state.rs
 create mode 100644 20_timer_callbacks/kernel/src/symbols.rs
 create mode 100644 20_timer_callbacks/kernel/src/synchronization.rs
 create mode 100644 20_timer_callbacks/kernel/src/time.rs
 create mode 100644 20_timer_callbacks/kernel/tests/00_console_sanity.rb
 create mode 100644 20_timer_callbacks/kernel/tests/00_console_sanity.rs
 create mode 100644 20_timer_callbacks/kernel/tests/01_timer_sanity.rs
 create mode 100644 20_timer_callbacks/kernel/tests/02_exception_sync_page_fault.rs
 create mode 100644 20_timer_callbacks/kernel/tests/03_exception_restore_sanity.rb
 create mode 100644 20_timer_callbacks/kernel/tests/03_exception_restore_sanity.rs
 create mode 100644 20_timer_callbacks/kernel/tests/04_exception_irq_sanity.rs
 create mode 100644 20_timer_callbacks/kernel/tests/05_backtrace_sanity.rb
 create mode 100644 20_timer_callbacks/kernel/tests/05_backtrace_sanity.rs
 create mode 100644 20_timer_callbacks/kernel/tests/06_backtrace_invalid_frame.rb
 create mode 100644 20_timer_callbacks/kernel/tests/06_backtrace_invalid_frame.rs
 create mode 100644 20_timer_callbacks/kernel/tests/07_backtrace_invalid_link.rb
 create mode 100644 20_timer_callbacks/kernel/tests/07_backtrace_invalid_link.rs
 create mode 100644 20_timer_callbacks/kernel/tests/boot_test_string.rb
 create mode 100644 20_timer_callbacks/kernel/tests/panic_exit_success/mod.rs
 create mode 100644 20_timer_callbacks/kernel/tests/panic_wait_forever/mod.rs
 create mode 100644 20_timer_callbacks/kernel_symbols.mk
 create mode 100644 20_timer_callbacks/kernel_symbols/Cargo.lock
 create mode 100644 20_timer_callbacks/kernel_symbols/Cargo.toml
 create mode 100644 20_timer_callbacks/kernel_symbols/build.rs
 create mode 100644 20_timer_callbacks/kernel_symbols/kernel_symbols.ld
 create mode 100644 20_timer_callbacks/kernel_symbols/src/main.rs
 create mode 100644 20_timer_callbacks/libraries/debug-symbol-types/Cargo.toml
 create mode 100644 20_timer_callbacks/libraries/debug-symbol-types/src/lib.rs
 create mode 100644 20_timer_callbacks/libraries/test-macros/Cargo.toml
 create mode 100644 20_timer_callbacks/libraries/test-macros/src/lib.rs
 create mode 100644 20_timer_callbacks/libraries/test-types/Cargo.toml
 create mode 100644 20_timer_callbacks/libraries/test-types/src/lib.rs
 create mode 100644 20_timer_callbacks/tools/kernel_symbols_tool/cmds.rb
 create mode 100644 20_timer_callbacks/tools/kernel_symbols_tool/kernel_elf.rb
 create mode 100755 20_timer_callbacks/tools/kernel_symbols_tool/main.rb
 create mode 100644 20_timer_callbacks/tools/translation_table_tool/arch.rb
 create mode 100644 20_timer_callbacks/tools/translation_table_tool/bsp.rb
 create mode 100644 20_timer_callbacks/tools/translation_table_tool/generic.rb
 create mode 100644 20_timer_callbacks/tools/translation_table_tool/kernel_elf.rb
 create mode 100755 20_timer_callbacks/tools/translation_table_tool/main.rb

diff --git a/20_timer_callbacks/.cargo/config.toml b/20_timer_callbacks/.cargo/config.toml
new file mode 100644
index 000000000..e34764853
--- /dev/null
+++ b/20_timer_callbacks/.cargo/config.toml
@@ -0,0 +1,2 @@
+[target.'cfg(target_os = "none")']
+runner = "target/kernel_test_runner.sh"
diff --git a/20_timer_callbacks/.vscode/settings.json b/20_timer_callbacks/.vscode/settings.json
new file mode 100644
index 000000000..292bf2a93
--- /dev/null
+++ b/20_timer_callbacks/.vscode/settings.json
@@ -0,0 +1,10 @@
+{
+  "editor.formatOnSave": true,
+  "editor.rulers": [100],
+  "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
+  "rust-analyzer.cargo.features": ["bsp_rpi3"],
+  "rust-analyzer.checkOnSave.allTargets": false,
+  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
+  "rust-analyzer.lens.debug": false,
+  "rust-analyzer.lens.run": false
+}
diff --git a/20_timer_callbacks/Cargo.lock b/20_timer_callbacks/Cargo.lock
new file mode 100644
index 000000000..8f9eae58d
--- /dev/null
+++ b/20_timer_callbacks/Cargo.lock
@@ -0,0 +1,103 @@
+# This file is automatically @generated by Cargo.
+# It is not intended for manual editing.
+version = 3
+
+[[package]]
+name = "cortex-a"
+version = "8.0.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
+dependencies = [
+ "tock-registers",
+]
+
+[[package]]
+name = "debug-symbol-types"
+version = "0.1.0"
+
+[[package]]
+name = "kernel_symbols"
+version = "0.1.0"
+dependencies = [
+ "debug-symbol-types",
+]
+
+[[package]]
+name = "linked_list_allocator"
+version = "0.10.4"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "e322f259d225fbae43a1b053b2dc6a5968a6bdf8b205f5de684dab485b95030e"
+
+[[package]]
+name = "mingo"
+version = "0.20.0"
+dependencies = [
+ "cortex-a",
+ "debug-symbol-types",
+ "linked_list_allocator",
+ "qemu-exit",
+ "test-macros",
+ "test-types",
+ "tock-registers",
+]
+
+[[package]]
+name = "proc-macro2"
+version = "1.0.47"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "5ea3d908b0e36316caf9e9e2c4625cdde190a7e6f440d794667ed17a1855e725"
+dependencies = [
+ "unicode-ident",
+]
+
+[[package]]
+name = "qemu-exit"
+version = "3.0.1"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
+
+[[package]]
+name = "quote"
+version = "1.0.21"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "bbe448f377a7d6961e30f5955f9b8d106c3f5e449d493ee1b125c1d43c2b5179"
+dependencies = [
+ "proc-macro2",
+]
+
+[[package]]
+name = "syn"
+version = "1.0.103"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "a864042229133ada95abf3b54fdc62ef5ccabe9515b64717bcb9a1919e59445d"
+dependencies = [
+ "proc-macro2",
+ "quote",
+ "unicode-ident",
+]
+
+[[package]]
+name = "test-macros"
+version = "0.1.0"
+dependencies = [
+ "proc-macro2",
+ "quote",
+ "syn",
+ "test-types",
+]
+
+[[package]]
+name = "test-types"
+version = "0.1.0"
+
+[[package]]
+name = "tock-registers"
+version = "0.8.1"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "696941a0aee7e276a165a978b37918fd5d22c55c3d6bda197813070ca9c0f21c"
+
+[[package]]
+name = "unicode-ident"
+version = "1.0.5"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "6ceab39d59e4c9499d4e5a8ee0e2735b891bb7308ac83dfb4e80cad195c9f6f3"
diff --git a/20_timer_callbacks/Cargo.toml b/20_timer_callbacks/Cargo.toml
new file mode 100644
index 000000000..38eeb1165
--- /dev/null
+++ b/20_timer_callbacks/Cargo.toml
@@ -0,0 +1,11 @@
+[workspace]
+
+members = [
+        "libraries/*",
+        "kernel",
+        "kernel_symbols"
+]
+
+[profile.release]
+lto = true
+debug = true
diff --git a/20_timer_callbacks/Makefile b/20_timer_callbacks/Makefile
new file mode 100644
index 000000000..43f5ad1f3
--- /dev/null
+++ b/20_timer_callbacks/Makefile
@@ -0,0 +1,393 @@
+## SPDX-License-Identifier: MIT OR Apache-2.0
+##
+## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+include ../common/docker.mk
+include ../common/format.mk
+include ../common/operating_system.mk
+
+##--------------------------------------------------------------------------------------------------
+## Optional, user-provided configuration values
+##--------------------------------------------------------------------------------------------------
+
+# Default to the RPi3.
+BSP ?= rpi3
+
+# Default to a serial device name that is common in Linux.
+DEV_SERIAL ?= /dev/ttyUSB0
+
+# Optional debug prints.
+ifdef DEBUG_PRINTS
+    FEATURES = --features debug_prints
+endif
+
+# Optional integration test name.
+ifdef TEST
+    TEST_ARG = --test $(TEST)
+else
+    TEST_ARG = --test '*'
+endif
+
+
+
+##--------------------------------------------------------------------------------------------------
+## BSP-specific configuration values
+##--------------------------------------------------------------------------------------------------
+QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
+
+ifeq ($(BSP),rpi3)
+    TARGET            = aarch64-unknown-none-softfloat
+    KERNEL_BIN        = kernel8.img
+    QEMU_BINARY       = qemu-system-aarch64
+    QEMU_MACHINE_TYPE = raspi3
+    QEMU_RELEASE_ARGS = -serial stdio -display none
+    QEMU_TEST_ARGS    = $(QEMU_RELEASE_ARGS) -semihosting
+    OBJDUMP_BINARY    = aarch64-none-elf-objdump
+    NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
+    OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
+    JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi3.img
+    LD_SCRIPT_PATH    = $(shell pwd)/kernel/src/bsp/raspberrypi
+    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53 -C force-frame-pointers
+else ifeq ($(BSP),rpi4)
+    TARGET            = aarch64-unknown-none-softfloat
+    KERNEL_BIN        = kernel8.img
+    QEMU_BINARY       = qemu-system-aarch64
+    QEMU_MACHINE_TYPE =
+    QEMU_RELEASE_ARGS = -serial stdio -display none
+    QEMU_TEST_ARGS    = $(QEMU_RELEASE_ARGS) -semihosting
+    OBJDUMP_BINARY    = aarch64-none-elf-objdump
+    NM_BINARY         = aarch64-none-elf-nm
+    READELF_BINARY    = aarch64-none-elf-readelf
+    OPENOCD_ARG       = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
+    JTAG_BOOT_IMAGE   = ../X1_JTAG_boot/jtag_boot_rpi4.img
+    LD_SCRIPT_PATH    = $(shell pwd)/kernel/src/bsp/raspberrypi
+    RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72 -C force-frame-pointers
+endif
+
+# Export for build.rs.
+export LD_SCRIPT_PATH
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Targets and Prerequisites
+##--------------------------------------------------------------------------------------------------
+KERNEL_MANIFEST      = kernel/Cargo.toml
+KERNEL_LINKER_SCRIPT = kernel.ld
+LAST_BUILD_CONFIG    = target/$(BSP)_$(DEBUG_PRINTS).build_config
+
+KERNEL_ELF_RAW      = target/$(TARGET)/release/kernel
+# This parses cargo's dep-info file.
+# https://doc.rust-lang.org/cargo/guide/build-cache.html#dep-info-files
+KERNEL_ELF_RAW_DEPS = $(filter-out %: ,$(file < $(KERNEL_ELF_RAW).d)) $(KERNEL_MANIFEST) $(LAST_BUILD_CONFIG)
+
+##------------------------------------------------------------------------------
+## Translation tables
+##------------------------------------------------------------------------------
+TT_TOOL_PATH = tools/translation_table_tool
+
+KERNEL_ELF_TTABLES      = target/$(TARGET)/release/kernel+ttables
+KERNEL_ELF_TTABLES_DEPS = $(KERNEL_ELF_RAW) $(wildcard $(TT_TOOL_PATH)/*)
+
+##------------------------------------------------------------------------------
+## Kernel symbols
+##------------------------------------------------------------------------------
+export KERNEL_SYMBOLS_TOOL_PATH = tools/kernel_symbols_tool
+
+KERNEL_ELF_TTABLES_SYMS = target/$(TARGET)/release/kernel+ttables+symbols
+
+# Unlike with KERNEL_ELF_RAW, we are not relying on dep-info here. One of the reasons being that the
+# name of the generated symbols file varies between runs, which can cause confusion.
+KERNEL_ELF_TTABLES_SYMS_DEPS = $(KERNEL_ELF_TTABLES) \
+    $(wildcard kernel_symbols/*)                     \
+    $(wildcard $(KERNEL_SYMBOLS_TOOL_PATH)/*)
+
+export TARGET
+export KERNEL_SYMBOLS_INPUT_ELF  = $(KERNEL_ELF_TTABLES)
+export KERNEL_SYMBOLS_OUTPUT_ELF = $(KERNEL_ELF_TTABLES_SYMS)
+
+KERNEL_ELF = $(KERNEL_ELF_TTABLES_SYMS)
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Command building blocks
+##--------------------------------------------------------------------------------------------------
+RUSTFLAGS = $(RUSTC_MISC_ARGS)                   \
+    -C link-arg=--library-path=$(LD_SCRIPT_PATH) \
+    -C link-arg=--script=$(KERNEL_LINKER_SCRIPT)
+
+RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) \
+    -D warnings                   \
+    -D missing_docs
+
+FEATURES     += --features bsp_$(BSP)
+COMPILER_ARGS = --target=$(TARGET) \
+    $(FEATURES)                    \
+    --release
+
+# build-std can be skipped for helper commands that do not rely on correct stack frames and other
+# custom compiler options. This results in a huge speedup.
+RUSTC_CMD   = cargo rustc $(COMPILER_ARGS) -Z build-std=core,alloc --manifest-path $(KERNEL_MANIFEST)
+DOC_CMD     = cargo doc $(COMPILER_ARGS)
+CLIPPY_CMD  = cargo clippy $(COMPILER_ARGS)
+TEST_CMD    = cargo test $(COMPILER_ARGS) -Z build-std=core,alloc --manifest-path $(KERNEL_MANIFEST)
+OBJCOPY_CMD = rust-objcopy \
+    --strip-all            \
+    -O binary
+
+EXEC_QEMU          = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
+EXEC_TT_TOOL       = ruby $(TT_TOOL_PATH)/main.rb
+EXEC_TEST_DISPATCH = ruby ../common/tests/dispatch.rb
+EXEC_MINIPUSH      = ruby ../common/serial/minipush.rb
+
+##------------------------------------------------------------------------------
+## Dockerization
+##------------------------------------------------------------------------------
+DOCKER_CMD            = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
+DOCKER_CMD_INTERACT   = $(DOCKER_CMD) -i
+DOCKER_ARG_DIR_COMMON = -v $(shell pwd)/../common:/work/common
+DOCKER_ARG_DIR_JTAG   = -v $(shell pwd)/../X1_JTAG_boot:/work/X1_JTAG_boot
+DOCKER_ARG_DEV        = --privileged -v /dev:/dev
+DOCKER_ARG_NET        = --network host
+
+# DOCKER_IMAGE defined in include file (see top of this file).
+DOCKER_QEMU  = $(DOCKER_CMD_INTERACT) $(DOCKER_IMAGE)
+DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+DOCKER_TEST  = $(DOCKER_CMD) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
+DOCKER_GDB   = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
+
+# Dockerize commands, which require USB device passthrough, only on Linux.
+ifeq ($(shell uname -s),Linux)
+    DOCKER_CMD_DEV = $(DOCKER_CMD_INTERACT) $(DOCKER_ARG_DEV)
+
+    DOCKER_CHAINBOOT = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_IMAGE)
+    DOCKER_JTAGBOOT  = $(DOCKER_CMD_DEV) $(DOCKER_ARG_DIR_COMMON) $(DOCKER_ARG_DIR_JTAG) $(DOCKER_IMAGE)
+    DOCKER_OPENOCD   = $(DOCKER_CMD_DEV) $(DOCKER_ARG_NET) $(DOCKER_IMAGE)
+else
+    DOCKER_OPENOCD   = echo "Not yet supported on non-Linux systems."; \#
+endif
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: all doc qemu chainboot clippy clean readelf objdump nm check
+
+all: $(KERNEL_BIN)
+
+##------------------------------------------------------------------------------
+## Save the configuration as a file, so make understands if it changed.
+##------------------------------------------------------------------------------
+$(LAST_BUILD_CONFIG):
+	@rm -f target/*.build_config
+	@mkdir -p target
+	@touch $(LAST_BUILD_CONFIG)
+
+##------------------------------------------------------------------------------
+## Compile the kernel ELF
+##------------------------------------------------------------------------------
+$(KERNEL_ELF_RAW): $(KERNEL_ELF_RAW_DEPS)
+	$(call color_header, "Compiling kernel ELF - $(BSP)")
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
+
+##------------------------------------------------------------------------------
+## Precompute the kernel translation tables and patch them into the kernel ELF
+##------------------------------------------------------------------------------
+$(KERNEL_ELF_TTABLES): $(KERNEL_ELF_TTABLES_DEPS)
+	$(call color_header, "Precomputing kernel translation tables and patching kernel ELF")
+	@cp $(KERNEL_ELF_RAW) $(KERNEL_ELF_TTABLES)
+	@$(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(BSP) $(KERNEL_ELF_TTABLES)
+
+##------------------------------------------------------------------------------
+## Generate kernel symbols and patch them into the kernel ELF
+##------------------------------------------------------------------------------
+$(KERNEL_ELF_TTABLES_SYMS): $(KERNEL_ELF_TTABLES_SYMS_DEPS)
+	$(call color_header, "Generating kernel symbols and patching kernel ELF")
+	@$(MAKE) --no-print-directory -f kernel_symbols.mk
+
+##------------------------------------------------------------------------------
+## Generate the stripped kernel binary
+##------------------------------------------------------------------------------
+$(KERNEL_BIN): $(KERNEL_ELF_TTABLES_SYMS)
+	$(call color_header, "Generating stripped binary")
+	@$(OBJCOPY_CMD) $(KERNEL_ELF_TTABLES_SYMS) $(KERNEL_BIN)
+	$(call color_progress_prefix, "Name")
+	@echo $(KERNEL_BIN)
+	$(call color_progress_prefix, "Size")
+	$(call disk_usage_KiB, $(KERNEL_BIN))
+
+##------------------------------------------------------------------------------
+## Generate the documentation
+##------------------------------------------------------------------------------
+doc: clean
+	$(call color_header, "Generating docs")
+	@$(DOC_CMD) --document-private-items --open
+
+##------------------------------------------------------------------------------
+## Run the kernel in QEMU
+##------------------------------------------------------------------------------
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
+qemu:
+	$(call color_header, "$(QEMU_MISSING_STRING)")
+
+else # QEMU is supported.
+
+qemu: $(KERNEL_BIN)
+	$(call color_header, "Launching QEMU")
+	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
+
+endif
+
+##------------------------------------------------------------------------------
+## Push the kernel to the real HW target
+##------------------------------------------------------------------------------
+chainboot: $(KERNEL_BIN)
+	@$(DOCKER_CHAINBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(KERNEL_BIN)
+
+##------------------------------------------------------------------------------
+## Run clippy
+##------------------------------------------------------------------------------
+clippy:
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(CLIPPY_CMD) --features test_build --tests \
+                --manifest-path $(KERNEL_MANIFEST)
+
+##------------------------------------------------------------------------------
+## Clean
+##------------------------------------------------------------------------------
+clean:
+	rm -rf target $(KERNEL_BIN)
+
+##------------------------------------------------------------------------------
+## Run readelf
+##------------------------------------------------------------------------------
+readelf: $(KERNEL_ELF)
+	$(call color_header, "Launching readelf")
+	@$(DOCKER_TOOLS) $(READELF_BINARY) --headers $(KERNEL_ELF)
+
+##------------------------------------------------------------------------------
+## Run objdump
+##------------------------------------------------------------------------------
+objdump: $(KERNEL_ELF)
+	$(call color_header, "Launching objdump")
+	@$(DOCKER_TOOLS) $(OBJDUMP_BINARY) --disassemble --demangle \
+                --section .text   \
+                --section .rodata \
+                $(KERNEL_ELF) | rustfilt
+
+##------------------------------------------------------------------------------
+## Run nm
+##------------------------------------------------------------------------------
+nm: $(KERNEL_ELF)
+	$(call color_header, "Launching nm")
+	@$(DOCKER_TOOLS) $(NM_BINARY) --demangle --print-size $(KERNEL_ELF) | sort | rustfilt
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Debugging targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: jtagboot openocd gdb gdb-opt0
+
+##------------------------------------------------------------------------------
+## Push the JTAG boot image to the real HW target
+##------------------------------------------------------------------------------
+jtagboot:
+	@$(DOCKER_JTAGBOOT) $(EXEC_MINIPUSH) $(DEV_SERIAL) $(JTAG_BOOT_IMAGE)
+
+##------------------------------------------------------------------------------
+## Start OpenOCD session
+##------------------------------------------------------------------------------
+openocd:
+	$(call color_header, "Launching OpenOCD")
+	@$(DOCKER_OPENOCD) openocd $(OPENOCD_ARG)
+
+##------------------------------------------------------------------------------
+## Start GDB session
+##------------------------------------------------------------------------------
+gdb-opt0: RUSTC_MISC_ARGS += -C opt-level=0
+gdb gdb-opt0: $(KERNEL_ELF)
+	$(call color_header, "Launching GDB")
+	@$(DOCKER_GDB) gdb-multiarch -q $(KERNEL_ELF)
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Testing targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: test test_boot test_unit test_integration
+
+test_unit test_integration: FEATURES += --features test_build
+
+ifeq ($(QEMU_MACHINE_TYPE),) # QEMU is not supported for the board.
+
+test_boot test_unit test_integration test:
+	$(call color_header, "$(QEMU_MISSING_STRING)")
+
+else # QEMU is supported.
+
+##------------------------------------------------------------------------------
+## Run boot test
+##------------------------------------------------------------------------------
+test_boot: $(KERNEL_BIN)
+	$(call color_header, "Boot test - $(BSP)")
+	@$(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
+
+##------------------------------------------------------------------------------
+## Helpers for unit and integration test targets
+##------------------------------------------------------------------------------
+define KERNEL_TEST_RUNNER
+#!/usr/bin/env bash
+
+    # The cargo test runner seems to change into the crate under test's directory. Therefore, ensure
+    # this script executes from the root.
+    cd $(shell pwd)
+
+    TEST_ELF=$$(echo $$1 | sed -e 's/.*target/target/g')
+    TEST_ELF_SYMS="$${TEST_ELF}_syms"
+    TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
+
+    $(DOCKER_TOOLS) $(EXEC_TT_TOOL) $(BSP) $$TEST_ELF > /dev/null
+
+    # This overrides the two ENV variables. The other ENV variables that are required as input for
+    # the .mk file are set already because they are exported by this Makefile and this script is
+    # started by the same.
+    KERNEL_SYMBOLS_INPUT_ELF=$$TEST_ELF           \
+        KERNEL_SYMBOLS_OUTPUT_ELF=$$TEST_ELF_SYMS \
+        $(MAKE) --no-print-directory -f kernel_symbols.mk > /dev/null 2>&1
+
+    $(OBJCOPY_CMD) $$TEST_ELF_SYMS $$TEST_BINARY
+    $(DOCKER_TEST) $(EXEC_TEST_DISPATCH) $(EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
+endef
+
+export KERNEL_TEST_RUNNER
+
+define test_prepare
+    @mkdir -p target
+    @echo "$$KERNEL_TEST_RUNNER" > target/kernel_test_runner.sh
+    @chmod +x target/kernel_test_runner.sh
+endef
+
+##------------------------------------------------------------------------------
+## Run unit test(s)
+##------------------------------------------------------------------------------
+test_unit:
+	$(call color_header, "Compiling unit test(s) - $(BSP)")
+	$(call test_prepare)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) --lib
+
+##------------------------------------------------------------------------------
+## Run integration test(s)
+##------------------------------------------------------------------------------
+test_integration:
+	$(call color_header, "Compiling integration test(s) - $(BSP)")
+	$(call test_prepare)
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(TEST_CMD) $(TEST_ARG)
+
+test: test_boot test_unit test_integration
+
+endif
diff --git a/20_timer_callbacks/README.md b/20_timer_callbacks/README.md
new file mode 100644
index 000000000..3647fb389
--- /dev/null
+++ b/20_timer_callbacks/README.md
@@ -0,0 +1,735 @@
+# Tutorial 20 - Timer Callbacks
+
+## tl;dr
+
+- The timer subsystem is extended so that it can be used to execute timeout callbacks in IRQ
+  context.
+
+## Note
+
+This chapter's code will be tightly coupled to follow-up tutorials which are yet to be developed. It
+is therefore expected that this chapter's code is subject to change depending upon findings that are
+yet to be made.
+
+Therefore, content for this README will be provided sometime later when all the pieces fit together.
+
+## Diff to previous
+```diff
+
+diff -uNr 19_kernel_heap/kernel/Cargo.toml 20_timer_callbacks/kernel/Cargo.toml
+--- 19_kernel_heap/kernel/Cargo.toml
++++ 20_timer_callbacks/kernel/Cargo.toml
+@@ -1,6 +1,6 @@
+ [package]
+ name = "mingo"
+-version = "0.19.0"
++version = "0.20.0"
+ authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+ edition = "2021"
+
+
+diff -uNr 19_kernel_heap/kernel/src/_arch/aarch64/time.rs 20_timer_callbacks/kernel/src/_arch/aarch64/time.rs
+--- 19_kernel_heap/kernel/src/_arch/aarch64/time.rs
++++ 20_timer_callbacks/kernel/src/_arch/aarch64/time.rs
+@@ -11,14 +11,17 @@
+ //!
+ //! crate::time::arch_time
+
+-use crate::warn;
++use crate::{
++    bsp::{self, exception},
++    warn,
++};
+ use core::{
+     num::{NonZeroU128, NonZeroU32, NonZeroU64},
+     ops::{Add, Div},
+     time::Duration,
+ };
+ use cortex_a::{asm::barrier, registers::*};
+-use tock_registers::interfaces::Readable;
++use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
+
+ //--------------------------------------------------------------------------------------------------
+ // Private Definitions
+@@ -160,3 +163,31 @@
+     // Read CNTPCT_EL0 directly to avoid the ISB that is part of [`read_cntpct`].
+     while GenericTimerCounterValue(CNTPCT_EL0.get()) < counter_value_target {}
+ }
++
++/// The associated IRQ number.
++pub const fn timeout_irq() -> exception::asynchronous::IRQNumber {
++    bsp::exception::asynchronous::irq_map::ARM_NS_PHYISCAL_TIMER
++}
++
++/// Program a timer IRQ to be fired after `delay` has passed.
++pub fn set_timeout_irq(due_time: Duration) {
++    let counter_value_target: GenericTimerCounterValue = match due_time.try_into() {
++        Err(msg) => {
++            warn!("set_timeout: {}. Skipping", msg);
++            return;
++        }
++        Ok(val) => val,
++    };
++
++    // Set the compare value register.
++    CNTP_CVAL_EL0.set(counter_value_target.0);
++
++    // Kick off the timer.
++    CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::SET + CNTP_CTL_EL0::IMASK::CLEAR);
++}
++
++/// Conclude a pending timeout IRQ.
++pub fn conclude_timeout_irq() {
++    // Disable counting. De-asserts the IRQ.
++    CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::CLEAR);
++}
+
+diff -uNr 19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/local_ic.rs 20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/local_ic.rs
+--- 19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/local_ic.rs
++++ 20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/local_ic.rs
+@@ -0,0 +1,173 @@
++// SPDX-License-Identifier: MIT OR Apache-2.0
++//
++// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++
++//! Local Interrupt Controller Driver.
++//!
++//! # Resources
++//!
++//! - <https://datasheets.raspberrypi.com/bcm2836/bcm2836-peripherals.pdf>
++
++use super::{LocalIRQ, PendingIRQs};
++use crate::{
++    bsp::device_driver::common::MMIODerefWrapper,
++    exception,
++    memory::{Address, Virtual},
++    synchronization,
++    synchronization::{IRQSafeNullLock, InitStateLock},
++};
++use alloc::vec::Vec;
++use tock_registers::{
++    interfaces::{Readable, Writeable},
++    register_structs,
++    registers::{ReadOnly, WriteOnly},
++};
++
++//--------------------------------------------------------------------------------------------------
++// Private Definitions
++//--------------------------------------------------------------------------------------------------
++
++register_structs! {
++    #[allow(non_snake_case)]
++    WORegisterBlock {
++        (0x00 => _reserved1),
++        (0x40 => CORE0_TIMER_INTERRUPT_CONTROL: WriteOnly<u32>),
++        (0x44 => @END),
++    }
++}
++
++register_structs! {
++    #[allow(non_snake_case)]
++    RORegisterBlock {
++        (0x00 => _reserved1),
++        (0x60 => CORE0_INTERRUPT_SOURCE: ReadOnly<u32>),
++        (0x64 => @END),
++    }
++}
++
++/// Abstraction for the WriteOnly parts of the associated MMIO registers.
++type WriteOnlyRegisters = MMIODerefWrapper<WORegisterBlock>;
++
++/// Abstraction for the ReadOnly parts of the associated MMIO registers.
++type ReadOnlyRegisters = MMIODerefWrapper<RORegisterBlock>;
++
++type HandlerTable = Vec<Option<exception::asynchronous::IRQHandlerDescriptor<LocalIRQ>>>;
++
++//--------------------------------------------------------------------------------------------------
++// Public Definitions
++//--------------------------------------------------------------------------------------------------
++
++/// Representation of the peripheral interrupt controller.
++pub struct LocalIC {
++    /// Access to write registers is guarded with a lock.
++    wo_registers: IRQSafeNullLock<WriteOnlyRegisters>,
++
++    /// Register read access is unguarded.
++    ro_registers: ReadOnlyRegisters,
++
++    /// Stores registered IRQ handlers. Writable only during kernel init. RO afterwards.
++    handler_table: InitStateLock<HandlerTable>,
++}
++
++//--------------------------------------------------------------------------------------------------
++// Public Code
++//--------------------------------------------------------------------------------------------------
++
++impl LocalIC {
++    // See datasheet.
++    const PERIPH_IRQ_MASK: u32 = (1 << 8);
++
++    /// Create an instance.
++    ///
++    /// # Safety
++    ///
++    /// - The user must ensure to provide a correct MMIO start address.
++    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
++        Self {
++            wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(mmio_start_addr)),
++            ro_registers: ReadOnlyRegisters::new(mmio_start_addr),
++            handler_table: InitStateLock::new(Vec::new()),
++        }
++    }
++
++    /// Called by the kernel to bring up the device.
++    pub fn init(&self) {
++        self.handler_table
++            .write(|table| table.resize(LocalIRQ::MAX_INCLUSIVE + 1, None));
++    }
++
++    /// Query the list of pending IRQs.
++    fn pending_irqs(&self) -> PendingIRQs {
++        // Ignore the indicator bit for a peripheral IRQ.
++        PendingIRQs::new(
++            (self.ro_registers.CORE0_INTERRUPT_SOURCE.get() & !Self::PERIPH_IRQ_MASK).into(),
++        )
++    }
++}
++
++//------------------------------------------------------------------------------
++// OS Interface Code
++//------------------------------------------------------------------------------
++use synchronization::interface::{Mutex, ReadWriteEx};
++
++impl exception::asynchronous::interface::IRQManager for LocalIC {
++    type IRQNumberType = LocalIRQ;
++
++    fn register_handler(
++        &self,
++        irq_handler_descriptor: exception::asynchronous::IRQHandlerDescriptor<Self::IRQNumberType>,
++    ) -> Result<(), &'static str> {
++        self.handler_table.write(|table| {
++            let irq_number = irq_handler_descriptor.number().get();
++
++            if table[irq_number].is_some() {
++                return Err("IRQ handler already registered");
++            }
++
++            table[irq_number] = Some(irq_handler_descriptor);
++
++            Ok(())
++        })
++    }
++
++    fn enable(&self, irq: &Self::IRQNumberType) {
++        self.wo_registers.lock(|regs| {
++            let enable_bit: u32 = 1 << (irq.get());
++
++            // Writing a 1 to a bit will set the corresponding IRQ enable bit. All other IRQ enable
++            // bits are unaffected. So we don't need read and OR'ing here.
++            regs.CORE0_TIMER_INTERRUPT_CONTROL.set(enable_bit);
++        });
++    }
++
++    fn handle_pending_irqs<'irq_context>(
++        &'irq_context self,
++        _ic: &exception::asynchronous::IRQContext<'irq_context>,
++    ) {
++        self.handler_table.read(|table| {
++            for irq_number in self.pending_irqs() {
++                match table[irq_number] {
++                    None => panic!("No handler registered for IRQ {}", irq_number),
++                    Some(descriptor) => {
++                        // Call the IRQ handler. Panics on failure.
++                        descriptor.handler().handle().expect("Error handling IRQ");
++                    }
++                }
++            }
++        })
++    }
++
++    fn print_handler(&self) {
++        use crate::info;
++
++        info!("      Local handler:");
++
++        self.handler_table.read(|table| {
++            for (i, opt) in table.iter().enumerate() {
++                if let Some(handler) = opt {
++                    info!("            {: >3}. {}", i, handler.name());
++                }
++            }
++        });
++    }
++}
+
+diff -uNr 19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs 20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+--- 19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
++++ 20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+@@ -4,6 +4,7 @@
+
+ //! Interrupt Controller Driver.
+
++mod local_ic;
+ mod peripheral_ic;
+
+ use crate::{
+@@ -40,6 +41,7 @@
+
+ /// Representation of the Interrupt Controller.
+ pub struct InterruptController {
++    local: local_ic::LocalIC,
+     periph: peripheral_ic::PeripheralIC,
+ }
+
+@@ -81,7 +83,7 @@
+ }
+
+ impl InterruptController {
+-    // Restrict to 3 for now. This makes future code for local_ic.rs more straight forward.
++    // Restrict to 3 for now. This makes the code for local_ic.rs more straight forward.
+     const MAX_LOCAL_IRQ_NUMBER: usize = 3;
+     const MAX_PERIPHERAL_IRQ_NUMBER: usize = 63;
+
+@@ -92,8 +94,12 @@
+     /// # Safety
+     ///
+     /// - The user must ensure to provide a correct MMIO start address.
+-    pub const unsafe fn new(periph_mmio_start_addr: Address<Virtual>) -> Self {
++    pub const unsafe fn new(
++        local_mmio_start_addr: Address<Virtual>,
++        periph_mmio_start_addr: Address<Virtual>,
++    ) -> Self {
+         Self {
++            local: local_ic::LocalIC::new(local_mmio_start_addr),
+             periph: peripheral_ic::PeripheralIC::new(periph_mmio_start_addr),
+         }
+     }
+@@ -111,6 +117,7 @@
+     }
+
+     unsafe fn init(&self) -> Result<(), &'static str> {
++        self.local.init();
+         self.periph.init();
+
+         Ok(())
+@@ -125,7 +132,15 @@
+         irq_handler_descriptor: exception::asynchronous::IRQHandlerDescriptor<Self::IRQNumberType>,
+     ) -> Result<(), &'static str> {
+         match irq_handler_descriptor.number() {
+-            IRQNumber::Local(_) => unimplemented!("Local IRQ controller not implemented."),
++            IRQNumber::Local(lirq) => {
++                let local_descriptor = IRQHandlerDescriptor::new(
++                    lirq,
++                    irq_handler_descriptor.name(),
++                    irq_handler_descriptor.handler(),
++                );
++
++                self.local.register_handler(local_descriptor)
++            }
+             IRQNumber::Peripheral(pirq) => {
+                 let periph_descriptor = IRQHandlerDescriptor::new(
+                     pirq,
+@@ -140,7 +155,7 @@
+
+     fn enable(&self, irq: &Self::IRQNumberType) {
+         match irq {
+-            IRQNumber::Local(_) => unimplemented!("Local IRQ controller not implemented."),
++            IRQNumber::Local(lirq) => self.local.enable(lirq),
+             IRQNumber::Peripheral(pirq) => self.periph.enable(pirq),
+         }
+     }
+@@ -149,11 +164,12 @@
+         &'irq_context self,
+         ic: &exception::asynchronous::IRQContext<'irq_context>,
+     ) {
+-        // It can only be a peripheral IRQ pending because enable() does not support local IRQs yet.
++        self.local.handle_pending_irqs(ic);
+         self.periph.handle_pending_irqs(ic)
+     }
+
+     fn print_handler(&self) {
++        self.local.print_handler();
+         self.periph.print_handler();
+     }
+ }
+
+diff -uNr 19_kernel_heap/kernel/src/bsp/raspberrypi/driver.rs 20_timer_callbacks/kernel/src/bsp/raspberrypi/driver.rs
+--- 19_kernel_heap/kernel/src/bsp/raspberrypi/driver.rs
++++ 20_timer_callbacks/kernel/src/bsp/raspberrypi/driver.rs
+@@ -73,6 +73,12 @@
+ /// This must be called only after successful init of the memory subsystem.
+ #[cfg(feature = "bsp_rpi3")]
+ unsafe fn instantiate_interrupt_controller() -> Result<(), &'static str> {
++    let local_mmio_descriptor = MMIODescriptor::new(mmio::LOCAL_IC_START, mmio::LOCAL_IC_SIZE);
++    let local_virt_addr = memory::mmu::kernel_map_mmio(
++        device_driver::InterruptController::COMPATIBLE,
++        &local_mmio_descriptor,
++    )?;
++
+     let periph_mmio_descriptor =
+         MMIODescriptor::new(mmio::PERIPHERAL_IC_START, mmio::PERIPHERAL_IC_SIZE);
+     let periph_virt_addr = memory::mmu::kernel_map_mmio(
+@@ -80,7 +86,10 @@
+         &periph_mmio_descriptor,
+     )?;
+
+-    INTERRUPT_CONTROLLER.write(device_driver::InterruptController::new(periph_virt_addr));
++    INTERRUPT_CONTROLLER.write(device_driver::InterruptController::new(
++        local_virt_addr,
++        periph_virt_addr,
++    ));
+
+     Ok(())
+ }
+
+diff -uNr 19_kernel_heap/kernel/src/bsp/raspberrypi/exception/asynchronous.rs 20_timer_callbacks/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
+--- 19_kernel_heap/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
++++ 20_timer_callbacks/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
+@@ -13,16 +13,24 @@
+ /// Export for reuse in generic asynchronous.rs.
+ pub use bsp::device_driver::IRQNumber;
+
++/// The IRQ map.
+ #[cfg(feature = "bsp_rpi3")]
+-pub(in crate::bsp) mod irq_map {
+-    use super::bsp::device_driver::{IRQNumber, PeripheralIRQ};
++pub mod irq_map {
++    use super::bsp::device_driver::{IRQNumber, LocalIRQ, PeripheralIRQ};
+
+-    pub const PL011_UART: IRQNumber = IRQNumber::Peripheral(PeripheralIRQ::new(57));
++    /// The non-secure physical timer IRQ number.
++    pub const ARM_NS_PHYISCAL_TIMER: IRQNumber = IRQNumber::Local(LocalIRQ::new(1));
++
++    pub(in crate::bsp) const PL011_UART: IRQNumber = IRQNumber::Peripheral(PeripheralIRQ::new(57));
+ }
+
++/// The IRQ map.
+ #[cfg(feature = "bsp_rpi4")]
+-pub(in crate::bsp) mod irq_map {
++pub mod irq_map {
+     use super::bsp::device_driver::IRQNumber;
+
+-    pub const PL011_UART: IRQNumber = IRQNumber::new(153);
++    /// The non-secure physical timer IRQ number.
++    pub const ARM_NS_PHYISCAL_TIMER: IRQNumber = IRQNumber::new(30);
++
++    pub(in crate::bsp) const PL011_UART: IRQNumber = IRQNumber::new(153);
+ }
+
+diff -uNr 19_kernel_heap/kernel/src/bsp/raspberrypi/memory.rs 20_timer_callbacks/kernel/src/bsp/raspberrypi/memory.rs
+--- 19_kernel_heap/kernel/src/bsp/raspberrypi/memory.rs
++++ 20_timer_callbacks/kernel/src/bsp/raspberrypi/memory.rs
+@@ -124,6 +124,9 @@
+         pub const PL011_UART_START:    Address<Physical> = Address::new(0x3F20_1000);
+         pub const PL011_UART_SIZE:     usize             =              0x48;
+
++        pub const LOCAL_IC_START:      Address<Physical> = Address::new(0x4000_0000);
++        pub const LOCAL_IC_SIZE:       usize             =              0x100;
++
+         pub const END:                 Address<Physical> = Address::new(0x4001_0000);
+     }
+
+
+diff -uNr 19_kernel_heap/kernel/src/main.rs 20_timer_callbacks/kernel/src/main.rs
+--- 19_kernel_heap/kernel/src/main.rs
++++ 20_timer_callbacks/kernel/src/main.rs
+@@ -30,6 +30,11 @@
+     exception::handling_init();
+     memory::init();
+
++    // Initialize the timer subsystem.
++    if let Err(x) = time::init() {
++        panic!("Error initializing timer subsystem: {}", x);
++    }
++
+     // Initialize the BSP driver subsystem.
+     if let Err(x) = bsp::driver::init() {
+         panic!("Error initializing BSP driver subsystem: {}", x);
+@@ -52,6 +57,9 @@
+
+ /// The main function running after the early init.
+ fn kernel_main() -> ! {
++    use alloc::boxed::Box;
++    use core::time::Duration;
++
+     info!("{}", libkernel::version());
+     info!("Booting on: {}", bsp::board_name());
+
+@@ -78,6 +86,11 @@
+     info!("Kernel heap:");
+     memory::heap_alloc::kernel_heap_allocator().print_usage();
+
++    time::time_manager().set_timeout_once(Duration::from_secs(5), Box::new(|| info!("Once 5")));
++    time::time_manager().set_timeout_once(Duration::from_secs(3), Box::new(|| info!("Once 2")));
++    time::time_manager()
++        .set_timeout_periodic(Duration::from_secs(1), Box::new(|| info!("Periodic 1 sec")));
++
+     info!("Echoing input now");
+     cpu::wait_forever();
+ }
+
+diff -uNr 19_kernel_heap/kernel/src/time.rs 20_timer_callbacks/kernel/src/time.rs
+--- 19_kernel_heap/kernel/src/time.rs
++++ 20_timer_callbacks/kernel/src/time.rs
+@@ -3,19 +3,54 @@
+ // Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+ //! Timer primitives.
++//!
++//! # Resources
++//!
++//! - <https://stackoverflow.com/questions/41081240/idiomatic-callbacks-in-rust>
++//! - <https://doc.rust-lang.org/stable/std/panic/fn.set_hook.html>
+
+ #[cfg(target_arch = "aarch64")]
+ #[path = "_arch/aarch64/time.rs"]
+ mod arch_time;
+
+-use core::time::Duration;
++use crate::{
++    driver, exception,
++    exception::asynchronous::IRQNumber,
++    synchronization::{interface::Mutex, IRQSafeNullLock},
++    warn,
++};
++use alloc::{boxed::Box, vec::Vec};
++use core::{
++    sync::atomic::{AtomicBool, Ordering},
++    time::Duration,
++};
++
++//--------------------------------------------------------------------------------------------------
++// Private Definitions
++//--------------------------------------------------------------------------------------------------
++
++struct Timeout {
++    due_time: Duration,
++    period: Option<Duration>,
++    callback: TimeoutCallback,
++}
++
++struct OrderedTimeoutQueue {
++    // Can be replaced with a BinaryHeap once it's new() becomes const.
++    inner: Vec<Timeout>,
++}
+
+ //--------------------------------------------------------------------------------------------------
+ // Public Definitions
+ //--------------------------------------------------------------------------------------------------
+
++/// The callback type used by timer IRQs.
++pub type TimeoutCallback = Box<dyn Fn() + Send>;
++
+ /// Provides time management functions.
+-pub struct TimeManager;
++pub struct TimeManager {
++    queue: IRQSafeNullLock<OrderedTimeoutQueue>,
++}
+
+ //--------------------------------------------------------------------------------------------------
+ // Global instances
+@@ -24,6 +59,46 @@
+ static TIME_MANAGER: TimeManager = TimeManager::new();
+
+ //--------------------------------------------------------------------------------------------------
++// Private Code
++//--------------------------------------------------------------------------------------------------
++
++impl Timeout {
++    pub fn is_periodic(&self) -> bool {
++        self.period.is_some()
++    }
++
++    pub fn refresh(&mut self) {
++        if let Some(delay) = self.period {
++            self.due_time += delay;
++        }
++    }
++}
++
++impl OrderedTimeoutQueue {
++    pub const fn new() -> Self {
++        Self { inner: Vec::new() }
++    }
++
++    pub fn push(&mut self, timeout: Timeout) {
++        self.inner.push(timeout);
++
++        // Note reverse compare order so that earliest expiring item is at end of vec. We do this so
++        // that we can use Vec::pop below to retrieve the item that is next due.
++        self.inner.sort_by(|a, b| b.due_time.cmp(&a.due_time));
++    }
++
++    pub fn peek_next_due_time(&self) -> Option<Duration> {
++        let timeout = self.inner.last()?;
++
++        Some(timeout.due_time)
++    }
++
++    pub fn pop(&mut self) -> Option<Timeout> {
++        self.inner.pop()
++    }
++}
++
++//--------------------------------------------------------------------------------------------------
+ // Public Code
+ //--------------------------------------------------------------------------------------------------
+
+@@ -33,9 +108,14 @@
+ }
+
+ impl TimeManager {
++    /// Compatibility string.
++    pub const COMPATIBLE: &'static str = "ARM Architectural Timer";
++
+     /// Create an instance.
+     pub const fn new() -> Self {
+-        Self
++        Self {
++            queue: IRQSafeNullLock::new(OrderedTimeoutQueue::new()),
++        }
+     }
+
+     /// The timer's resolution.
+@@ -54,4 +134,130 @@
+     pub fn spin_for(&self, duration: Duration) {
+         arch_time::spin_for(duration)
+     }
++
++    /// Set a timeout.
++    fn set_timeout(&self, timeout: Timeout) {
++        self.queue.lock(|queue| {
++            queue.push(timeout);
++
++            arch_time::set_timeout_irq(queue.peek_next_due_time().unwrap());
++        });
++    }
++
++    /// Set a one-shot timeout.
++    pub fn set_timeout_once(&self, delay: Duration, callback: TimeoutCallback) {
++        let timeout = Timeout {
++            due_time: self.uptime() + delay,
++            period: None,
++            callback,
++        };
++
++        self.set_timeout(timeout);
++    }
++
++    /// Set a periodic timeout.
++    pub fn set_timeout_periodic(&self, delay: Duration, callback: TimeoutCallback) {
++        let timeout = Timeout {
++            due_time: self.uptime() + delay,
++            period: Some(delay),
++            callback,
++        };
++
++        self.set_timeout(timeout);
++    }
++}
++
++/// Initialize the timer subsystem.
++pub fn init() -> Result<(), &'static str> {
++    static INIT_DONE: AtomicBool = AtomicBool::new(false);
++    if INIT_DONE.load(Ordering::Relaxed) {
++        return Err("Init already done");
++    }
++
++    let timer_descriptor =
++        driver::DeviceDriverDescriptor::new(time_manager(), None, Some(arch_time::timeout_irq()));
++    driver::driver_manager().register_driver(timer_descriptor);
++
++    INIT_DONE.store(true, Ordering::Relaxed);
++    Ok(())
++}
++
++//------------------------------------------------------------------------------
++// OS Interface Code
++//------------------------------------------------------------------------------
++
++impl driver::interface::DeviceDriver for TimeManager {
++    type IRQNumberType = IRQNumber;
++
++    fn compatible(&self) -> &'static str {
++        Self::COMPATIBLE
++    }
++
++    fn register_and_enable_irq_handler(
++        &'static self,
++        irq_number: &Self::IRQNumberType,
++    ) -> Result<(), &'static str> {
++        use exception::asynchronous::{irq_manager, IRQHandlerDescriptor};
++
++        let descriptor = IRQHandlerDescriptor::new(*irq_number, Self::COMPATIBLE, self);
++
++        irq_manager().register_handler(descriptor)?;
++        irq_manager().enable(irq_number);
++
++        Ok(())
++    }
++}
++
++impl exception::asynchronous::interface::IRQHandler for TimeManager {
++    fn handle(&self) -> Result<(), &'static str> {
++        arch_time::conclude_timeout_irq();
++
++        let maybe_timeout: Option<Timeout> = self.queue.lock(|queue| {
++            let next_due_time = queue.peek_next_due_time()?;
++            if next_due_time > self.uptime() {
++                return None;
++            }
++
++            let mut timeout = queue.pop().unwrap();
++
++            // Refresh as early as possible to prevent drift.
++            if timeout.is_periodic() {
++                timeout.refresh();
++            }
++
++            Some(timeout)
++        });
++
++        let timeout = match maybe_timeout {
++            None => {
++                warn!("Spurious timeout IRQ");
++                return Ok(());
++            }
++            Some(t) => t,
++        };
++
++        // Important: Call the callback while not holding any lock, because the callback might
++        // attempt to modify data that is protected by a lock (in particular, the timeout queue
++        // itself).
++        (timeout.callback)();
++
++        self.queue.lock(|queue| {
++            if timeout.is_periodic() {
++                // There might be some overhead involved in the periodic path, because the timeout
++                // item is first popped from the underlying Vec and then pushed back again. It could
++                // be faster to keep the item in the queue and find a way to work with a reference
++                // to it.
++                //
++                // We are not going this route on purpose, though. It allows to keep the code simple
++                // and the focus on the high-level concepts.
++                queue.push(timeout);
++            };
++
++            if let Some(due_time) = queue.peek_next_due_time() {
++                arch_time::set_timeout_irq(due_time);
++            }
++        });
++
++        Ok(())
++    }
+ }
+
+diff -uNr 19_kernel_heap/kernel/tests/boot_test_string.rb 20_timer_callbacks/kernel/tests/boot_test_string.rb
+--- 19_kernel_heap/kernel/tests/boot_test_string.rb
++++ 20_timer_callbacks/kernel/tests/boot_test_string.rb
+@@ -1,3 +1,3 @@
+ # frozen_string_literal: true
+
+-EXPECTED_PRINT = 'Echoing input now'
++EXPECTED_PRINT = 'Once 5'
+
+```
diff --git a/20_timer_callbacks/kernel/Cargo.lock b/20_timer_callbacks/kernel/Cargo.lock
new file mode 100644
index 000000000..740209d0e
--- /dev/null
+++ b/20_timer_callbacks/kernel/Cargo.lock
@@ -0,0 +1,96 @@
+# This file is automatically @generated by Cargo.
+# It is not intended for manual editing.
+version = 3
+
+[[package]]
+name = "cortex-a"
+version = "8.0.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
+dependencies = [
+ "tock-registers",
+]
+
+[[package]]
+name = "debug-symbol-types"
+version = "0.1.0"
+
+[[package]]
+name = "linked_list_allocator"
+version = "0.10.4"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "e322f259d225fbae43a1b053b2dc6a5968a6bdf8b205f5de684dab485b95030e"
+
+[[package]]
+name = "mingo"
+version = "0.20.0"
+dependencies = [
+ "cortex-a",
+ "debug-symbol-types",
+ "linked_list_allocator",
+ "qemu-exit",
+ "test-macros",
+ "test-types",
+ "tock-registers",
+]
+
+[[package]]
+name = "proc-macro2"
+version = "1.0.38"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "9027b48e9d4c9175fa2218adf3557f91c1137021739951d4932f5f8268ac48aa"
+dependencies = [
+ "unicode-xid",
+]
+
+[[package]]
+name = "qemu-exit"
+version = "3.0.1"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
+
+[[package]]
+name = "quote"
+version = "1.0.18"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "a1feb54ed693b93a84e14094943b84b7c4eae204c512b7ccb95ab0c66d278ad1"
+dependencies = [
+ "proc-macro2",
+]
+
+[[package]]
+name = "syn"
+version = "1.0.94"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "a07e33e919ebcd69113d5be0e4d70c5707004ff45188910106854f38b960df4a"
+dependencies = [
+ "proc-macro2",
+ "quote",
+ "unicode-xid",
+]
+
+[[package]]
+name = "test-macros"
+version = "0.1.0"
+dependencies = [
+ "proc-macro2",
+ "quote",
+ "syn",
+ "test-types",
+]
+
+[[package]]
+name = "test-types"
+version = "0.1.0"
+
+[[package]]
+name = "tock-registers"
+version = "0.8.1"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "696941a0aee7e276a165a978b37918fd5d22c55c3d6bda197813070ca9c0f21c"
+
+[[package]]
+name = "unicode-xid"
+version = "0.2.3"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "957e51f3646910546462e67d5f7599b9e4fb8acdd304b087a6494730f9eebf04"
diff --git a/20_timer_callbacks/kernel/Cargo.toml b/20_timer_callbacks/kernel/Cargo.toml
new file mode 100644
index 000000000..e127a857f
--- /dev/null
+++ b/20_timer_callbacks/kernel/Cargo.toml
@@ -0,0 +1,72 @@
+[package]
+name = "mingo"
+version = "0.20.0"
+authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+edition = "2021"
+
+[features]
+default = []
+debug_prints = []
+bsp_rpi3 = ["tock-registers"]
+bsp_rpi4 = ["tock-registers"]
+test_build = ["qemu-exit"]
+
+##--------------------------------------------------------------------------------------------------
+## Dependencies
+##--------------------------------------------------------------------------------------------------
+
+[dependencies]
+test-types = { path = "../libraries/test-types" }
+debug-symbol-types = { path = "../libraries/debug-symbol-types" }
+linked_list_allocator = { version = "0.10.x", default-features = false, features = ["const_mut_refs"] }
+
+# Optional dependencies
+tock-registers = { version = "0.8.x", default-features = false, features = ["register_types"], optional = true }
+qemu-exit = { version = "3.x.x", optional = true }
+
+# Platform specific dependencies
+[target.'cfg(target_arch = "aarch64")'.dependencies]
+cortex-a = { version = "8.x.x" }
+
+##--------------------------------------------------------------------------------------------------
+## Testing
+##--------------------------------------------------------------------------------------------------
+
+[dev-dependencies]
+test-macros = { path = "../libraries/test-macros" }
+
+# Unit tests are done in the library part of the kernel.
+[lib]
+name = "libkernel"
+test = true
+
+# Disable unit tests for the kernel binary.
+[[bin]]
+name = "kernel"
+path = "src/main.rs"
+test = false
+
+# List of tests without harness.
+[[test]]
+name = "00_console_sanity"
+harness = false
+
+[[test]]
+name = "02_exception_sync_page_fault"
+harness = false
+
+[[test]]
+name = "03_exception_restore_sanity"
+harness = false
+
+[[test]]
+name = "05_backtrace_sanity"
+harness = false
+
+[[test]]
+name = "06_backtrace_invalid_frame"
+harness = false
+
+[[test]]
+name = "07_backtrace_invalid_link"
+harness = false
diff --git a/20_timer_callbacks/kernel/build.rs b/20_timer_callbacks/kernel/build.rs
new file mode 100644
index 000000000..cab00bb37
--- /dev/null
+++ b/20_timer_callbacks/kernel/build.rs
@@ -0,0 +1,20 @@
+use std::{env, fs, process};
+
+fn main() {
+    let ld_script_path = match env::var("LD_SCRIPT_PATH") {
+        Ok(var) => var,
+        _ => process::exit(0),
+    };
+
+    let files = fs::read_dir(ld_script_path).unwrap();
+    files
+        .filter_map(Result::ok)
+        .filter(|d| {
+            if let Some(e) = d.path().extension() {
+                e == "ld"
+            } else {
+                false
+            }
+        })
+        .for_each(|f| println!("cargo:rerun-if-changed={}", f.path().display()));
+}
diff --git a/20_timer_callbacks/kernel/src/_arch/aarch64/backtrace.rs b/20_timer_callbacks/kernel/src/_arch/aarch64/backtrace.rs
new file mode 100644
index 000000000..e8860984b
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/_arch/aarch64/backtrace.rs
@@ -0,0 +1,136 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural backtracing support.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::backtrace::arch_backtrace
+
+use crate::{
+    backtrace::BacktraceItem,
+    memory::{Address, Virtual},
+};
+use cortex_a::registers::*;
+use tock_registers::interfaces::Readable;
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// A Stack frame record.
+///
+/// # Note
+///
+/// The convention is that `previous_record` is valid as long as it contains a non-null value.
+/// Therefore, it is possible to type the member as `Option<&StackFrameRecord>` because of Rust's
+/// `null-pointer optimization`.
+#[repr(C)]
+struct StackFrameRecord<'a> {
+    previous_record: Option<&'a StackFrameRecord<'a>>,
+    link: Address<Virtual>,
+}
+
+struct StackFrameRecordIterator<'a> {
+    cur: &'a StackFrameRecord<'a>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl<'a> Iterator for StackFrameRecordIterator<'a> {
+    type Item = BacktraceItem;
+
+    fn next(&mut self) -> Option<Self::Item> {
+        static ABORT_FRAME: StackFrameRecord = StackFrameRecord {
+            previous_record: None,
+            link: Address::new(0),
+        };
+
+        // If previous is None, this is the root frame, so iteration will stop here.
+        let previous = self.cur.previous_record?;
+
+        // Need to abort if the pointer to the previous frame record is invalid.
+        let prev_addr = Address::<Virtual>::new(previous as *const _ as usize);
+        if !prev_addr.is_valid_stack_addr() {
+            // This allows to return the error and then stop on the next iteration.
+            self.cur = &ABORT_FRAME;
+            return Some(BacktraceItem::InvalidFramePointer(prev_addr));
+        }
+
+        let ret = if !self.cur.link.is_valid_code_addr() {
+            Some(BacktraceItem::InvalidLink(self.cur.link))
+        } else {
+            // The link points to the instruction to be executed _after_ returning from a branch.
+            // However, we want to show the instruction that caused the branch, so subtract by one
+            // instruction.
+            //
+            // This might be called from panic!, so it must not panic itself on the subtraction.
+            let link = if self.cur.link >= Address::new(4) {
+                self.cur.link - 4
+            } else {
+                self.cur.link
+            };
+
+            Some(BacktraceItem::Link(link))
+        };
+
+        // Advance the iterator.
+        self.cur = previous;
+
+        ret
+    }
+}
+
+fn stack_frame_record_iterator<'a>() -> Option<StackFrameRecordIterator<'a>> {
+    let fp = Address::<Virtual>::new(FP.get() as usize);
+    if !fp.is_valid_stack_addr() {
+        return None;
+    }
+
+    Some(StackFrameRecordIterator {
+        cur: unsafe { &*(fp.as_usize() as *const _) },
+    })
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Architectural implementation of the backtrace.
+pub fn backtrace(f: impl FnOnce(Option<&mut dyn Iterator<Item = BacktraceItem>>)) {
+    f(stack_frame_record_iterator().as_mut().map(|s| s as _))
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(feature = "test_build")]
+#[inline(always)]
+/// Hack for corrupting the previous frame address in the current stack frame.
+///
+/// # Safety
+///
+/// - To be used only by testing code.
+pub unsafe fn corrupt_previous_frame_addr() {
+    let sf = FP.get() as *mut usize;
+    *sf = 0x123;
+}
+
+#[cfg(feature = "test_build")]
+#[inline(always)]
+/// Hack for corrupting the link in the current stack frame.
+///
+/// # Safety
+///
+/// - To be used only by testing code.
+pub unsafe fn corrupt_link() {
+    let sf = FP.get() as *mut StackFrameRecord;
+    (*sf).link = Address::new(0x456);
+}
diff --git a/20_timer_callbacks/kernel/src/_arch/aarch64/cpu.rs b/20_timer_callbacks/kernel/src/_arch/aarch64/cpu.rs
new file mode 100644
index 000000000..66da661c7
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/_arch/aarch64/cpu.rs
@@ -0,0 +1,49 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural processor code.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::arch_cpu
+
+use cortex_a::asm;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+pub use asm::nop;
+
+/// Pause execution on the core.
+#[inline(always)]
+pub fn wait_forever() -> ! {
+    loop {
+        asm::wfe()
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+#[cfg(feature = "test_build")]
+use qemu_exit::QEMUExit;
+
+#[cfg(feature = "test_build")]
+const QEMU_EXIT_HANDLE: qemu_exit::AArch64 = qemu_exit::AArch64::new();
+
+/// Make the host QEMU binary execute `exit(1)`.
+#[cfg(feature = "test_build")]
+pub fn qemu_exit_failure() -> ! {
+    QEMU_EXIT_HANDLE.exit_failure()
+}
+
+/// Make the host QEMU binary execute `exit(0)`.
+#[cfg(feature = "test_build")]
+pub fn qemu_exit_success() -> ! {
+    QEMU_EXIT_HANDLE.exit_success()
+}
diff --git a/20_timer_callbacks/kernel/src/_arch/aarch64/cpu/boot.rs b/20_timer_callbacks/kernel/src/_arch/aarch64/cpu/boot.rs
new file mode 100644
index 000000000..15ab92b60
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/_arch/aarch64/cpu/boot.rs
@@ -0,0 +1,117 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural boot code.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::boot::arch_boot
+
+use crate::{memory, memory::Address};
+use core::{
+    arch::global_asm,
+    sync::atomic::{compiler_fence, Ordering},
+};
+use cortex_a::{asm, registers::*};
+use tock_registers::interfaces::Writeable;
+
+// Assembly counterpart to this file.
+global_asm!(
+    include_str!("boot.s"),
+    CONST_CURRENTEL_EL2 = const 0x8,
+    CONST_CORE_ID_MASK = const 0b11
+);
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// Prepares the transition from EL2 to EL1.
+///
+/// # Safety
+///
+/// - The `bss` section is not initialized yet. The code must not use or reference it in any way.
+/// - The HW state of EL1 must be prepared in a sound way.
+#[inline(always)]
+unsafe fn prepare_el2_to_el1_transition(
+    virt_boot_core_stack_end_exclusive_addr: u64,
+    virt_kernel_init_addr: u64,
+) {
+    // Enable timer counter registers for EL1.
+    CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
+
+    // No offset for reading the counters.
+    CNTVOFF_EL2.set(0);
+
+    // Set EL1 execution state to AArch64.
+    HCR_EL2.write(HCR_EL2::RW::EL1IsAarch64);
+
+    // Set up a simulated exception return.
+    //
+    // First, fake a saved program status where all interrupts were masked and SP_EL1 was used as a
+    // stack pointer.
+    SPSR_EL2.write(
+        SPSR_EL2::D::Masked
+            + SPSR_EL2::A::Masked
+            + SPSR_EL2::I::Masked
+            + SPSR_EL2::F::Masked
+            + SPSR_EL2::M::EL1h,
+    );
+
+    // Second, let the link register point to kernel_init().
+    ELR_EL2.set(virt_kernel_init_addr);
+
+    // Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it. Since there
+    // are no plans to ever return to EL2, just re-use the same stack.
+    SP_EL1.set(virt_boot_core_stack_end_exclusive_addr);
+}
+
+/// Reset the backtrace by setting link register and frame pointer to zero.
+///
+/// # Safety
+///
+/// - This function must only be used immediately before entering EL1.
+#[inline(always)]
+unsafe fn prepare_backtrace_reset() {
+    compiler_fence(Ordering::SeqCst);
+    FP.set(0);
+    LR.set(0);
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The Rust entry of the `kernel` binary.
+///
+/// The function is called from the assembly `_start` function.
+///
+/// # Safety
+///
+/// - Exception return from EL2 must must continue execution in EL1 with `kernel_init()`.
+#[no_mangle]
+pub unsafe extern "C" fn _start_rust(
+    phys_kernel_tables_base_addr: u64,
+    virt_boot_core_stack_end_exclusive_addr: u64,
+    virt_kernel_init_addr: u64,
+) -> ! {
+    prepare_el2_to_el1_transition(
+        virt_boot_core_stack_end_exclusive_addr,
+        virt_kernel_init_addr,
+    );
+
+    // Turn on the MMU for EL1.
+    let addr = Address::new(phys_kernel_tables_base_addr as usize);
+    memory::mmu::enable_mmu_and_caching(addr).unwrap();
+
+    // Make the function we return to the root of a backtrace.
+    prepare_backtrace_reset();
+
+    // Use `eret` to "return" to EL1. Since virtual memory will already be enabled, this results in
+    // execution of kernel_init() in EL1 from its _virtual address_.
+    asm::eret()
+}
diff --git a/20_timer_callbacks/kernel/src/_arch/aarch64/cpu/boot.s b/20_timer_callbacks/kernel/src/_arch/aarch64/cpu/boot.s
new file mode 100644
index 000000000..1a8c88010
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/_arch/aarch64/cpu/boot.s
@@ -0,0 +1,105 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//--------------------------------------------------------------------------------------------------
+// Definitions
+//--------------------------------------------------------------------------------------------------
+
+// Load the address of a symbol into a register, PC-relative.
+//
+// The symbol must lie within +/- 4 GiB of the Program Counter.
+//
+// # Resources
+//
+// - https://sourceware.org/binutils/docs-2.36/as/AArch64_002dRelocations.html
+.macro ADR_REL register, symbol
+	adrp	\register, \symbol
+	add	\register, \register, #:lo12:\symbol
+.endm
+
+// Load the address of a symbol into a register, absolute.
+//
+// # Resources
+//
+// - https://sourceware.org/binutils/docs-2.36/as/AArch64_002dRelocations.html
+.macro ADR_ABS register, symbol
+	movz	\register, #:abs_g3:\symbol
+	movk	\register, #:abs_g2_nc:\symbol
+	movk	\register, #:abs_g1_nc:\symbol
+	movk	\register, #:abs_g0_nc:\symbol
+.endm
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+.section .text._start
+
+//------------------------------------------------------------------------------
+// fn _start()
+//------------------------------------------------------------------------------
+_start:
+	// Only proceed if the core executes in EL2. Park it otherwise.
+	mrs	x0, CurrentEL
+	cmp	x0, {CONST_CURRENTEL_EL2}
+	b.ne	.L_parking_loop
+
+	// Only proceed on the boot core. Park it otherwise.
+	mrs	x1, MPIDR_EL1
+	and	x1, x1, {CONST_CORE_ID_MASK}
+	ldr	x2, BOOT_CORE_ID      // provided by bsp/__board_name__/cpu.rs
+	cmp	x1, x2
+	b.ne	.L_parking_loop
+
+	// If execution reaches here, it is the boot core.
+
+	// Initialize DRAM.
+	ADR_REL	x0, __bss_start
+	ADR_REL x1, __bss_end_exclusive
+
+.L_bss_init_loop:
+	cmp	x0, x1
+	b.eq	.L_prepare_rust
+	stp	xzr, xzr, [x0], #16
+	b	.L_bss_init_loop
+
+	// Prepare the jump to Rust code.
+.L_prepare_rust:
+	// Load the base address of the kernel's translation tables.
+	ldr	x0, PHYS_KERNEL_TABLES_BASE_ADDR // provided by bsp/__board_name__/memory/mmu.rs
+
+	// Load the _absolute_ addresses of the following symbols. Since the kernel is linked at
+	// the top of the 64 bit address space, these are effectively virtual addresses.
+	ADR_ABS	x1, __boot_core_stack_end_exclusive
+	ADR_ABS	x2, kernel_init
+
+	// Load the PC-relative address of the stack and set the stack pointer.
+	//
+	// Since _start() is the first function that runs after the firmware has loaded the kernel
+	// into memory, retrieving this symbol PC-relative returns the "physical" address.
+	//
+	// Setting the stack pointer to this value ensures that anything that still runs in EL2,
+	// until the kernel returns to EL1 with the MMU enabled, works as well. After the return to
+	// EL1, the virtual address of the stack retrieved above will be used.
+	ADR_REL	x3, __boot_core_stack_end_exclusive
+	mov	sp, x3
+
+	// Read the CPU's timer counter frequency and store it in ARCH_TIMER_COUNTER_FREQUENCY.
+	// Abort if the frequency read back as 0.
+	ADR_REL	x4, ARCH_TIMER_COUNTER_FREQUENCY // provided by aarch64/time.rs
+	mrs	x5, CNTFRQ_EL0
+	cmp	x5, xzr
+	b.eq	.L_parking_loop
+	str	w5, [x4]
+
+	// Jump to Rust code. x0, x1 and x2 hold the function arguments provided to _start_rust().
+	b	_start_rust
+
+	// Infinitely wait for events (aka "park the core").
+.L_parking_loop:
+	wfe
+	b	.L_parking_loop
+
+.size	_start, . - _start
+.type	_start, function
+.global	_start
diff --git a/20_timer_callbacks/kernel/src/_arch/aarch64/cpu/smp.rs b/20_timer_callbacks/kernel/src/_arch/aarch64/cpu/smp.rs
new file mode 100644
index 000000000..351fde62e
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/_arch/aarch64/cpu/smp.rs
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural symmetric multiprocessing.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::cpu::smp::arch_smp
+
+use cortex_a::registers::*;
+use tock_registers::interfaces::Readable;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return the executing core's id.
+#[inline(always)]
+pub fn core_id<T>() -> T
+where
+    T: From<u8>,
+{
+    const CORE_MASK: u64 = 0b11;
+
+    T::from((MPIDR_EL1.get() & CORE_MASK) as u8)
+}
diff --git a/20_timer_callbacks/kernel/src/_arch/aarch64/exception.rs b/20_timer_callbacks/kernel/src/_arch/aarch64/exception.rs
new file mode 100644
index 000000000..e03e382f1
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/_arch/aarch64/exception.rs
@@ -0,0 +1,325 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural synchronous and asynchronous exception handling.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::exception::arch_exception
+
+use crate::{exception, memory, symbols};
+use core::{arch::global_asm, cell::UnsafeCell, fmt};
+use cortex_a::{asm::barrier, registers::*};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    registers::InMemoryRegister,
+};
+
+// Assembly counterpart to this file.
+global_asm!(
+    include_str!("exception.s"),
+    CONST_ESR_EL1_EC_SHIFT = const 26,
+    CONST_ESR_EL1_EC_VALUE_SVC64 = const 0x15
+);
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Wrapper structs for memory copies of registers.
+#[repr(transparent)]
+struct SpsrEL1(InMemoryRegister<u64, SPSR_EL1::Register>);
+struct EsrEL1(InMemoryRegister<u64, ESR_EL1::Register>);
+
+/// The exception context as it is stored on the stack on exception entry.
+#[repr(C)]
+struct ExceptionContext {
+    /// General Purpose Registers.
+    gpr: [u64; 30],
+
+    /// The link register, aka x30.
+    lr: u64,
+
+    /// Exception link register. The program counter at the time the exception happened.
+    elr_el1: u64,
+
+    /// Saved program status.
+    spsr_el1: SpsrEL1,
+
+    /// Exception syndrome register.
+    esr_el1: EsrEL1,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// Prints verbose information about the exception and then panics.
+fn default_exception_handler(exc: &ExceptionContext) {
+    panic!(
+        "CPU Exception!\n\n\
+        {}",
+        exc
+    );
+}
+
+//------------------------------------------------------------------------------
+// Current, EL0
+//------------------------------------------------------------------------------
+
+#[no_mangle]
+extern "C" fn current_el0_synchronous(_e: &mut ExceptionContext) {
+    panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
+}
+
+#[no_mangle]
+extern "C" fn current_el0_irq(_e: &mut ExceptionContext) {
+    panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
+}
+
+#[no_mangle]
+extern "C" fn current_el0_serror(_e: &mut ExceptionContext) {
+    panic!("Should not be here. Use of SP_EL0 in EL1 is not supported.")
+}
+
+//------------------------------------------------------------------------------
+// Current, ELx
+//------------------------------------------------------------------------------
+
+#[no_mangle]
+extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
+    #[cfg(feature = "test_build")]
+    {
+        const TEST_SVC_ID: u64 = 0x1337;
+
+        if let Some(ESR_EL1::EC::Value::SVC64) = e.esr_el1.exception_class() {
+            if e.esr_el1.iss() == TEST_SVC_ID {
+                return;
+            }
+        }
+    }
+
+    default_exception_handler(e);
+}
+
+#[no_mangle]
+extern "C" fn current_elx_irq(_e: &mut ExceptionContext) {
+    let token = unsafe { &exception::asynchronous::IRQContext::new() };
+    exception::asynchronous::irq_manager().handle_pending_irqs(token);
+}
+
+#[no_mangle]
+extern "C" fn current_elx_serror(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+//------------------------------------------------------------------------------
+// Lower, AArch64
+//------------------------------------------------------------------------------
+
+#[no_mangle]
+extern "C" fn lower_aarch64_synchronous(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+#[no_mangle]
+extern "C" fn lower_aarch64_irq(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+#[no_mangle]
+extern "C" fn lower_aarch64_serror(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+//------------------------------------------------------------------------------
+// Lower, AArch32
+//------------------------------------------------------------------------------
+
+#[no_mangle]
+extern "C" fn lower_aarch32_synchronous(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+#[no_mangle]
+extern "C" fn lower_aarch32_irq(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+#[no_mangle]
+extern "C" fn lower_aarch32_serror(e: &mut ExceptionContext) {
+    default_exception_handler(e);
+}
+
+//------------------------------------------------------------------------------
+// Misc
+//------------------------------------------------------------------------------
+
+/// Human readable SPSR_EL1.
+#[rustfmt::skip]
+impl fmt::Display for SpsrEL1 {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        // Raw value.
+        writeln!(f, "SPSR_EL1: {:#010x}", self.0.get())?;
+
+        let to_flag_str = |x| -> _ {
+            if x { "Set" } else { "Not set" }
+         };
+
+        writeln!(f, "      Flags:")?;
+        writeln!(f, "            Negative (N): {}", to_flag_str(self.0.is_set(SPSR_EL1::N)))?;
+        writeln!(f, "            Zero     (Z): {}", to_flag_str(self.0.is_set(SPSR_EL1::Z)))?;
+        writeln!(f, "            Carry    (C): {}", to_flag_str(self.0.is_set(SPSR_EL1::C)))?;
+        writeln!(f, "            Overflow (V): {}", to_flag_str(self.0.is_set(SPSR_EL1::V)))?;
+
+        let to_mask_str = |x| -> _ {
+            if x { "Masked" } else { "Unmasked" }
+        };
+
+        writeln!(f, "      Exception handling state:")?;
+        writeln!(f, "            Debug  (D): {}", to_mask_str(self.0.is_set(SPSR_EL1::D)))?;
+        writeln!(f, "            SError (A): {}", to_mask_str(self.0.is_set(SPSR_EL1::A)))?;
+        writeln!(f, "            IRQ    (I): {}", to_mask_str(self.0.is_set(SPSR_EL1::I)))?;
+        writeln!(f, "            FIQ    (F): {}", to_mask_str(self.0.is_set(SPSR_EL1::F)))?;
+
+        write!(f, "      Illegal Execution State (IL): {}",
+            to_flag_str(self.0.is_set(SPSR_EL1::IL))
+        )
+    }
+}
+
+impl EsrEL1 {
+    #[inline(always)]
+    fn exception_class(&self) -> Option<ESR_EL1::EC::Value> {
+        self.0.read_as_enum(ESR_EL1::EC)
+    }
+
+    #[cfg(feature = "test_build")]
+    #[inline(always)]
+    fn iss(&self) -> u64 {
+        self.0.read(ESR_EL1::ISS)
+    }
+}
+
+/// Human readable ESR_EL1.
+#[rustfmt::skip]
+impl fmt::Display for EsrEL1 {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        // Raw print of whole register.
+        writeln!(f, "ESR_EL1: {:#010x}", self.0.get())?;
+
+        // Raw print of exception class.
+        write!(f, "      Exception Class         (EC) : {:#x}", self.0.read(ESR_EL1::EC))?;
+
+        // Exception class.
+        let ec_translation = match self.exception_class() {
+            Some(ESR_EL1::EC::Value::DataAbortCurrentEL) => "Data Abort, current EL",
+            _ => "N/A",
+        };
+        writeln!(f, " - {}", ec_translation)?;
+
+        // Raw print of instruction specific syndrome.
+        write!(f, "      Instr Specific Syndrome (ISS): {:#x}", self.0.read(ESR_EL1::ISS))
+    }
+}
+
+impl ExceptionContext {
+    #[inline(always)]
+    fn exception_class(&self) -> Option<ESR_EL1::EC::Value> {
+        self.esr_el1.exception_class()
+    }
+
+    #[inline(always)]
+    fn fault_address_valid(&self) -> bool {
+        use ESR_EL1::EC::Value::*;
+
+        match self.exception_class() {
+            None => false,
+            Some(ec) => matches!(
+                ec,
+                InstrAbortLowerEL
+                    | InstrAbortCurrentEL
+                    | PCAlignmentFault
+                    | DataAbortLowerEL
+                    | DataAbortCurrentEL
+                    | WatchpointLowerEL
+                    | WatchpointCurrentEL
+            ),
+        }
+    }
+}
+
+/// Human readable print of the exception context.
+impl fmt::Display for ExceptionContext {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        writeln!(f, "{}", self.esr_el1)?;
+
+        if self.fault_address_valid() {
+            writeln!(f, "FAR_EL1: {:#018x}", FAR_EL1.get() as usize)?;
+        }
+
+        writeln!(f, "{}", self.spsr_el1)?;
+        writeln!(f, "ELR_EL1: {:#018x}", self.elr_el1)?;
+        writeln!(
+            f,
+            "      Symbol: {}",
+            match symbols::lookup_symbol(memory::Address::new(self.elr_el1 as usize)) {
+                Some(sym) => sym.name(),
+                _ => "Symbol not found",
+            }
+        )?;
+        writeln!(f)?;
+        writeln!(f, "General purpose register:")?;
+
+        #[rustfmt::skip]
+        let alternating = |x| -> _ {
+            if x % 2 == 0 { "   " } else { "\n" }
+        };
+
+        // Print two registers per line.
+        for (i, reg) in self.gpr.iter().enumerate() {
+            write!(f, "      x{: <2}: {: >#018x}{}", i, reg, alternating(i))?;
+        }
+        write!(f, "      lr : {:#018x}", self.lr)
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+use crate::exception::PrivilegeLevel;
+
+/// The processing element's current privilege level.
+pub fn current_privilege_level() -> (PrivilegeLevel, &'static str) {
+    let el = CurrentEL.read_as_enum(CurrentEL::EL);
+    match el {
+        Some(CurrentEL::EL::Value::EL2) => (PrivilegeLevel::Hypervisor, "EL2"),
+        Some(CurrentEL::EL::Value::EL1) => (PrivilegeLevel::Kernel, "EL1"),
+        Some(CurrentEL::EL::Value::EL0) => (PrivilegeLevel::User, "EL0"),
+        _ => (PrivilegeLevel::Unknown, "Unknown"),
+    }
+}
+
+/// Init exception handling by setting the exception vector base address register.
+///
+/// # Safety
+///
+/// - Changes the HW state of the executing core.
+/// - The vector table and the symbol `__exception_vector_table_start` from the linker script must
+///   adhere to the alignment and size constraints demanded by the ARMv8-A Architecture Reference
+///   Manual.
+pub unsafe fn handling_init() {
+    // Provided by exception.S.
+    extern "Rust" {
+        static __exception_vector_start: UnsafeCell<()>;
+    }
+
+    VBAR_EL1.set(__exception_vector_start.get() as u64);
+
+    // Force VBAR update to complete before next instruction.
+    barrier::isb(barrier::SY);
+}
diff --git a/20_timer_callbacks/kernel/src/_arch/aarch64/exception.s b/20_timer_callbacks/kernel/src/_arch/aarch64/exception.s
new file mode 100644
index 000000000..cdef8c586
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/_arch/aarch64/exception.s
@@ -0,0 +1,190 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//--------------------------------------------------------------------------------------------------
+// Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Call the function provided by parameter `\handler` after saving the exception context. Provide
+/// the context as the first parameter to '\handler'.
+.macro CALL_WITH_CONTEXT handler is_lower_el is_sync
+__vector_\handler:
+	// Make room on the stack for the exception context.
+	sub	sp,  sp,  #16 * 18
+
+	// Store all general purpose registers on the stack.
+	stp	x0,  x1,  [sp, #16 * 0]
+	stp	x2,  x3,  [sp, #16 * 1]
+	stp	x4,  x5,  [sp, #16 * 2]
+	stp	x6,  x7,  [sp, #16 * 3]
+	stp	x8,  x9,  [sp, #16 * 4]
+	stp	x10, x11, [sp, #16 * 5]
+	stp	x12, x13, [sp, #16 * 6]
+	stp	x14, x15, [sp, #16 * 7]
+	stp	x16, x17, [sp, #16 * 8]
+	stp	x18, x19, [sp, #16 * 9]
+	stp	x20, x21, [sp, #16 * 10]
+	stp	x22, x23, [sp, #16 * 11]
+	stp	x24, x25, [sp, #16 * 12]
+	stp	x26, x27, [sp, #16 * 13]
+	stp	x28, x29, [sp, #16 * 14]
+
+	// Add the exception link register (ELR_EL1), saved program status (SPSR_EL1) and exception
+	// syndrome register (ESR_EL1).
+	mrs	x1,  ELR_EL1
+	mrs	x2,  SPSR_EL1
+	mrs	x3,  ESR_EL1
+
+	stp	lr,  x1,  [sp, #16 * 15]
+	stp	x2,  x3,  [sp, #16 * 16]
+
+	// Build a stack frame for backtracing.
+.if \is_lower_el == 1
+	// If we came from a lower EL, make it a root frame (by storing zero) so that the kernel
+	// does not attempt to trace into userspace.
+	stp	xzr, xzr, [sp, #16 * 17]
+.else
+	// For normal branches, the link address points to the instruction to be executed _after_
+	// returning from a branch. In a backtrace, we want to show the instruction that caused the
+	// branch, though. That is why code in backtrace.rs subtracts 4 (length of one instruction)
+	// from the link address.
+	//
+	// Here we have a special case, though, because ELR_EL1 is used instead of LR to build the
+	// stack frame, so that it becomes possible to trace beyond an exception. Hence, it must be
+	// considered that semantics for ELR_EL1 differ from case to case.
+	//
+	// Unless an "exception generating instruction" was executed, ELR_EL1 already points to the
+	// the correct instruction, and hence the subtraction by 4 in backtrace.rs would yield wrong
+	// results. To cover for this, 4 is added to ELR_EL1 below unless the cause of exception was
+	// an SVC instruction. BRK and HLT are "exception generating instructions" as well, but they
+	// are not expected and therefore left out for now.
+	//
+	// For reference: Search for "preferred exception return address" in the Architecture
+	// Reference Manual for ARMv8-A.
+.if \is_sync == 1
+	lsr	w3,  w3, {CONST_ESR_EL1_EC_SHIFT}   // w3 = ESR_EL1.EC
+	cmp	w3,  {CONST_ESR_EL1_EC_VALUE_SVC64} // w3 == SVC64 ?
+	b.eq	1f
+.endif
+	add	x1,  x1, #4
+1:
+	stp	x29, x1, [sp, #16 * 17]
+.endif
+
+	// Set the frame pointer to the stack frame record.
+	add	x29, sp, #16 * 17
+
+	// x0 is the first argument for the function called through `\handler`.
+	mov	x0,  sp
+
+	// Call `\handler`.
+	bl	\handler
+
+	// After returning from exception handling code, replay the saved context and return via
+	// `eret`.
+	b	__exception_restore_context
+
+.size	__vector_\handler, . - __vector_\handler
+.type	__vector_\handler, function
+.endm
+
+.macro FIQ_SUSPEND
+1:	wfe
+	b	1b
+.endm
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+.section .text
+
+//------------------------------------------------------------------------------
+// The exception vector table.
+//------------------------------------------------------------------------------
+
+// Align by 2^11 bytes, as demanded by ARMv8-A. Same as ALIGN(2048) in an ld script.
+.align 11
+
+// Export a symbol for the Rust code to use.
+__exception_vector_start:
+
+// Current exception level with SP_EL0.
+//
+// .org sets the offset relative to section start.
+//
+// # Safety
+//
+// - It must be ensured that `CALL_WITH_CONTEXT` <= 0x80 bytes.
+.org 0x000
+	CALL_WITH_CONTEXT current_el0_synchronous, 0, 1
+.org 0x080
+	CALL_WITH_CONTEXT current_el0_irq, 0, 0
+.org 0x100
+	FIQ_SUSPEND
+.org 0x180
+	CALL_WITH_CONTEXT current_el0_serror, 0, 0
+
+// Current exception level with SP_ELx, x > 0.
+.org 0x200
+	CALL_WITH_CONTEXT current_elx_synchronous, 0, 1
+.org 0x280
+	CALL_WITH_CONTEXT current_elx_irq, 0, 0
+.org 0x300
+	FIQ_SUSPEND
+.org 0x380
+	CALL_WITH_CONTEXT current_elx_serror, 0, 0
+
+// Lower exception level, AArch64
+.org 0x400
+	CALL_WITH_CONTEXT lower_aarch64_synchronous, 1, 1
+.org 0x480
+	CALL_WITH_CONTEXT lower_aarch64_irq, 1, 0
+.org 0x500
+	FIQ_SUSPEND
+.org 0x580
+	CALL_WITH_CONTEXT lower_aarch64_serror, 1, 0
+
+// Lower exception level, AArch32
+.org 0x600
+	CALL_WITH_CONTEXT lower_aarch32_synchronous, 1, 0
+.org 0x680
+	CALL_WITH_CONTEXT lower_aarch32_irq, 1, 0
+.org 0x700
+	FIQ_SUSPEND
+.org 0x780
+	CALL_WITH_CONTEXT lower_aarch32_serror, 1, 0
+.org 0x800
+
+//------------------------------------------------------------------------------
+// fn __exception_restore_context()
+//------------------------------------------------------------------------------
+__exception_restore_context:
+	ldr	w19,      [sp, #16 * 16]
+	ldp	lr,  x20, [sp, #16 * 15]
+
+	msr	SPSR_EL1, x19
+	msr	ELR_EL1,  x20
+
+	ldp	x0,  x1,  [sp, #16 * 0]
+	ldp	x2,  x3,  [sp, #16 * 1]
+	ldp	x4,  x5,  [sp, #16 * 2]
+	ldp	x6,  x7,  [sp, #16 * 3]
+	ldp	x8,  x9,  [sp, #16 * 4]
+	ldp	x10, x11, [sp, #16 * 5]
+	ldp	x12, x13, [sp, #16 * 6]
+	ldp	x14, x15, [sp, #16 * 7]
+	ldp	x16, x17, [sp, #16 * 8]
+	ldp	x18, x19, [sp, #16 * 9]
+	ldp	x20, x21, [sp, #16 * 10]
+	ldp	x22, x23, [sp, #16 * 11]
+	ldp	x24, x25, [sp, #16 * 12]
+	ldp	x26, x27, [sp, #16 * 13]
+	ldp	x28, x29, [sp, #16 * 14]
+
+	add	sp,  sp,  #16 * 18
+
+	eret
+
+.size	__exception_restore_context, . - __exception_restore_context
+.type	__exception_restore_context, function
diff --git a/20_timer_callbacks/kernel/src/_arch/aarch64/exception/asynchronous.rs b/20_timer_callbacks/kernel/src/_arch/aarch64/exception/asynchronous.rs
new file mode 100644
index 000000000..cf6f97acc
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/_arch/aarch64/exception/asynchronous.rs
@@ -0,0 +1,141 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural asynchronous exception handling.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::exception::asynchronous::arch_asynchronous
+
+use core::arch::asm;
+use cortex_a::registers::*;
+use tock_registers::interfaces::{Readable, Writeable};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+mod daif_bits {
+    pub const IRQ: u8 = 0b0010;
+}
+
+trait DaifField {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register>;
+}
+
+struct Debug;
+struct SError;
+struct IRQ;
+struct FIQ;
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl DaifField for Debug {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
+        DAIF::D
+    }
+}
+
+impl DaifField for SError {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
+        DAIF::A
+    }
+}
+
+impl DaifField for IRQ {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
+        DAIF::I
+    }
+}
+
+impl DaifField for FIQ {
+    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
+        DAIF::F
+    }
+}
+
+fn is_masked<T>() -> bool
+where
+    T: DaifField,
+{
+    DAIF.is_set(T::daif_field())
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Returns whether IRQs are masked on the executing core.
+pub fn is_local_irq_masked() -> bool {
+    !is_masked::<IRQ>()
+}
+
+/// Unmask IRQs on the executing core.
+///
+/// It is not needed to place an explicit instruction synchronization barrier after the `msr`.
+/// Quoting the Architecture Reference Manual for ARMv8-A, section C5.1.3:
+///
+/// "Writes to PSTATE.{PAN, D, A, I, F} occur in program order without the need for additional
+/// synchronization."
+#[inline(always)]
+pub fn local_irq_unmask() {
+    unsafe {
+        asm!(
+            "msr DAIFClr, {arg}",
+            arg = const daif_bits::IRQ,
+            options(nomem, nostack, preserves_flags)
+        );
+    }
+}
+
+/// Mask IRQs on the executing core.
+#[inline(always)]
+pub fn local_irq_mask() {
+    unsafe {
+        asm!(
+            "msr DAIFSet, {arg}",
+            arg = const daif_bits::IRQ,
+            options(nomem, nostack, preserves_flags)
+        );
+    }
+}
+
+/// Mask IRQs on the executing core and return the previously saved interrupt mask bits (DAIF).
+#[inline(always)]
+pub fn local_irq_mask_save() -> u64 {
+    let saved = DAIF.get();
+    local_irq_mask();
+
+    saved
+}
+
+/// Restore the interrupt mask bits (DAIF) using the callee's argument.
+///
+/// # Invariant
+///
+/// - No sanity checks on the input.
+#[inline(always)]
+pub fn local_irq_restore(saved: u64) {
+    DAIF.set(saved);
+}
+
+/// Print the AArch64 exceptions status.
+#[rustfmt::skip]
+pub fn print_state() {
+    use crate::info;
+
+    let to_mask_str = |x| -> _ {
+        if x { "Masked" } else { "Unmasked" }
+    };
+
+    info!("      Debug:  {}", to_mask_str(is_masked::<Debug>()));
+    info!("      SError: {}", to_mask_str(is_masked::<SError>()));
+    info!("      IRQ:    {}", to_mask_str(is_masked::<IRQ>()));
+    info!("      FIQ:    {}", to_mask_str(is_masked::<FIQ>()));
+}
diff --git a/20_timer_callbacks/kernel/src/_arch/aarch64/memory/mmu.rs b/20_timer_callbacks/kernel/src/_arch/aarch64/memory/mmu.rs
new file mode 100644
index 000000000..3d6c18b74
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/_arch/aarch64/memory/mmu.rs
@@ -0,0 +1,158 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Memory Management Unit Driver.
+//!
+//! Only 64 KiB granule is supported.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::memory::mmu::arch_mmu
+
+use crate::{
+    bsp, memory,
+    memory::{mmu::TranslationGranule, Address, Physical},
+};
+use core::intrinsics::unlikely;
+use cortex_a::{asm::barrier, registers::*};
+use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Memory Management Unit type.
+struct MemoryManagementUnit;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub type Granule512MiB = TranslationGranule<{ 512 * 1024 * 1024 }>;
+pub type Granule64KiB = TranslationGranule<{ 64 * 1024 }>;
+
+/// Constants for indexing the MAIR_EL1.
+#[allow(dead_code)]
+pub mod mair {
+    pub const DEVICE: u64 = 0;
+    pub const NORMAL: u64 = 1;
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static MMU: MemoryManagementUnit = MemoryManagementUnit;
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl<const AS_SIZE: usize> memory::mmu::AddressSpace<AS_SIZE> {
+    /// Checks for architectural restrictions.
+    pub const fn arch_address_space_size_sanity_checks() {
+        // Size must be at least one full 512 MiB table.
+        assert!((AS_SIZE % Granule512MiB::SIZE) == 0);
+
+        // Check for 48 bit virtual address size as maximum, which is supported by any ARMv8
+        // version.
+        assert!(AS_SIZE <= (1 << 48));
+    }
+}
+
+impl MemoryManagementUnit {
+    /// Setup function for the MAIR_EL1 register.
+    #[inline(always)]
+    fn set_up_mair(&self) {
+        // Define the memory types being mapped.
+        MAIR_EL1.write(
+            // Attribute 1 - Cacheable normal DRAM.
+            MAIR_EL1::Attr1_Normal_Outer::WriteBack_NonTransient_ReadWriteAlloc +
+        MAIR_EL1::Attr1_Normal_Inner::WriteBack_NonTransient_ReadWriteAlloc +
+
+        // Attribute 0 - Device.
+        MAIR_EL1::Attr0_Device::nonGathering_nonReordering_EarlyWriteAck,
+        );
+    }
+
+    /// Configure various settings of stage 1 of the EL1 translation regime.
+    #[inline(always)]
+    fn configure_translation_control(&self) {
+        let t1sz = (64 - bsp::memory::mmu::KernelVirtAddrSpace::SIZE_SHIFT) as u64;
+
+        TCR_EL1.write(
+            TCR_EL1::TBI1::Used
+                + TCR_EL1::IPS::Bits_40
+                + TCR_EL1::TG1::KiB_64
+                + TCR_EL1::SH1::Inner
+                + TCR_EL1::ORGN1::WriteBack_ReadAlloc_WriteAlloc_Cacheable
+                + TCR_EL1::IRGN1::WriteBack_ReadAlloc_WriteAlloc_Cacheable
+                + TCR_EL1::EPD1::EnableTTBR1Walks
+                + TCR_EL1::A1::TTBR1
+                + TCR_EL1::T1SZ.val(t1sz)
+                + TCR_EL1::EPD0::DisableTTBR0Walks,
+        );
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the MMU instance.
+pub fn mmu() -> &'static impl memory::mmu::interface::MMU {
+    &MMU
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use memory::mmu::MMUEnableError;
+
+impl memory::mmu::interface::MMU for MemoryManagementUnit {
+    unsafe fn enable_mmu_and_caching(
+        &self,
+        phys_tables_base_addr: Address<Physical>,
+    ) -> Result<(), MMUEnableError> {
+        if unlikely(self.is_enabled()) {
+            return Err(MMUEnableError::AlreadyEnabled);
+        }
+
+        // Fail early if translation granule is not supported.
+        if unlikely(!ID_AA64MMFR0_EL1.matches_all(ID_AA64MMFR0_EL1::TGran64::Supported)) {
+            return Err(MMUEnableError::Other(
+                "Translation granule not supported in HW",
+            ));
+        }
+
+        // Prepare the memory attribute indirection register.
+        self.set_up_mair();
+
+        // Set the "Translation Table Base Register".
+        TTBR1_EL1.set_baddr(phys_tables_base_addr.as_usize() as u64);
+
+        self.configure_translation_control();
+
+        // Switch the MMU on.
+        //
+        // First, force all previous changes to be seen before the MMU is enabled.
+        barrier::isb(barrier::SY);
+
+        // Enable the MMU and turn on data and instruction caching.
+        SCTLR_EL1.modify(SCTLR_EL1::M::Enable + SCTLR_EL1::C::Cacheable + SCTLR_EL1::I::Cacheable);
+
+        // Force MMU init to complete before next instruction.
+        barrier::isb(barrier::SY);
+
+        Ok(())
+    }
+
+    #[inline(always)]
+    fn is_enabled(&self) -> bool {
+        SCTLR_EL1.matches_all(SCTLR_EL1::M::Enable)
+    }
+}
diff --git a/20_timer_callbacks/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs b/20_timer_callbacks/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
new file mode 100644
index 000000000..f0b4ac85f
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -0,0 +1,521 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural translation table.
+//!
+//! Only 64 KiB granule is supported.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::memory::mmu::translation_table::arch_translation_table
+
+use crate::{
+    bsp,
+    memory::{
+        self,
+        mmu::{
+            arch_mmu::{Granule512MiB, Granule64KiB},
+            AccessPermissions, AttributeFields, MemAttributes, MemoryRegion, PageAddress,
+        },
+        Address, Physical, Virtual,
+    },
+};
+use core::convert;
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields,
+    registers::InMemoryRegister,
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+// A table descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-15.
+register_bitfields! {u64,
+    STAGE1_TABLE_DESCRIPTOR [
+        /// Physical address of the next descriptor.
+        NEXT_LEVEL_TABLE_ADDR_64KiB OFFSET(16) NUMBITS(32) [], // [47:16]
+
+        TYPE  OFFSET(1) NUMBITS(1) [
+            Block = 0,
+            Table = 1
+        ],
+
+        VALID OFFSET(0) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ]
+    ]
+}
+
+// A level 3 page descriptor, as per ARMv8-A Architecture Reference Manual Figure D5-17.
+register_bitfields! {u64,
+    STAGE1_PAGE_DESCRIPTOR [
+        /// Unprivileged execute-never.
+        UXN      OFFSET(54) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
+        /// Privileged execute-never.
+        PXN      OFFSET(53) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
+        /// Physical address of the next table descriptor (lvl2) or the page descriptor (lvl3).
+        OUTPUT_ADDR_64KiB OFFSET(16) NUMBITS(32) [], // [47:16]
+
+        /// Access flag.
+        AF       OFFSET(10) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ],
+
+        /// Shareability field.
+        SH       OFFSET(8) NUMBITS(2) [
+            OuterShareable = 0b10,
+            InnerShareable = 0b11
+        ],
+
+        /// Access Permissions.
+        AP       OFFSET(6) NUMBITS(2) [
+            RW_EL1 = 0b00,
+            RW_EL1_EL0 = 0b01,
+            RO_EL1 = 0b10,
+            RO_EL1_EL0 = 0b11
+        ],
+
+        /// Memory attributes index into the MAIR_EL1 register.
+        AttrIndx OFFSET(2) NUMBITS(3) [],
+
+        TYPE     OFFSET(1) NUMBITS(1) [
+            Reserved_Invalid = 0,
+            Page = 1
+        ],
+
+        VALID    OFFSET(0) NUMBITS(1) [
+            False = 0,
+            True = 1
+        ]
+    ]
+}
+
+/// A table descriptor for 64 KiB aperture.
+///
+/// The output points to the next table.
+#[derive(Copy, Clone)]
+#[repr(C)]
+struct TableDescriptor {
+    value: u64,
+}
+
+/// A page descriptor with 64 KiB aperture.
+///
+/// The output points to physical memory.
+#[derive(Copy, Clone)]
+#[repr(C)]
+struct PageDescriptor {
+    value: u64,
+}
+
+trait StartAddr {
+    fn virt_start_addr(&self) -> Address<Virtual>;
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Big monolithic struct for storing the translation tables. Individual levels must be 64 KiB
+/// aligned, so the lvl3 is put first.
+#[repr(C)]
+#[repr(align(65536))]
+pub struct FixedSizeTranslationTable<const NUM_TABLES: usize, const START_FROM_TOP: bool> {
+    /// Page descriptors, covering 64 KiB windows per entry.
+    lvl3: [[PageDescriptor; 8192]; NUM_TABLES],
+
+    /// Table descriptors, covering 512 MiB windows.
+    lvl2: [TableDescriptor; NUM_TABLES],
+
+    /// Have the tables been initialized?
+    initialized: bool,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl<T, const N: usize> StartAddr for [T; N] {
+    fn virt_start_addr(&self) -> Address<Virtual> {
+        Address::new(self as *const _ as usize)
+    }
+}
+
+impl TableDescriptor {
+    /// Create an instance.
+    ///
+    /// Descriptor is invalid by default.
+    pub const fn new_zeroed() -> Self {
+        Self { value: 0 }
+    }
+
+    /// Create an instance pointing to the supplied address.
+    pub fn from_next_lvl_table_addr(phys_next_lvl_table_addr: Address<Physical>) -> Self {
+        let val = InMemoryRegister::<u64, STAGE1_TABLE_DESCRIPTOR::Register>::new(0);
+
+        let shifted = phys_next_lvl_table_addr.as_usize() >> Granule64KiB::SHIFT;
+        val.write(
+            STAGE1_TABLE_DESCRIPTOR::NEXT_LEVEL_TABLE_ADDR_64KiB.val(shifted as u64)
+                + STAGE1_TABLE_DESCRIPTOR::TYPE::Table
+                + STAGE1_TABLE_DESCRIPTOR::VALID::True,
+        );
+
+        TableDescriptor { value: val.get() }
+    }
+}
+
+/// Convert the kernel's generic memory attributes to HW-specific attributes of the MMU.
+impl convert::From<AttributeFields>
+    for tock_registers::fields::FieldValue<u64, STAGE1_PAGE_DESCRIPTOR::Register>
+{
+    fn from(attribute_fields: AttributeFields) -> Self {
+        // Memory attributes.
+        let mut desc = match attribute_fields.mem_attributes {
+            MemAttributes::CacheableDRAM => {
+                STAGE1_PAGE_DESCRIPTOR::SH::InnerShareable
+                    + STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(memory::mmu::arch_mmu::mair::NORMAL)
+            }
+            MemAttributes::Device => {
+                STAGE1_PAGE_DESCRIPTOR::SH::OuterShareable
+                    + STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(memory::mmu::arch_mmu::mair::DEVICE)
+            }
+        };
+
+        // Access Permissions.
+        desc += match attribute_fields.acc_perms {
+            AccessPermissions::ReadOnly => STAGE1_PAGE_DESCRIPTOR::AP::RO_EL1,
+            AccessPermissions::ReadWrite => STAGE1_PAGE_DESCRIPTOR::AP::RW_EL1,
+        };
+
+        // The execute-never attribute is mapped to PXN in AArch64.
+        desc += if attribute_fields.execute_never {
+            STAGE1_PAGE_DESCRIPTOR::PXN::True
+        } else {
+            STAGE1_PAGE_DESCRIPTOR::PXN::False
+        };
+
+        // Always set unprivileged exectue-never as long as userspace is not implemented yet.
+        desc += STAGE1_PAGE_DESCRIPTOR::UXN::True;
+
+        desc
+    }
+}
+
+/// Convert the HW-specific attributes of the MMU to kernel's generic memory attributes.
+impl convert::TryFrom<InMemoryRegister<u64, STAGE1_PAGE_DESCRIPTOR::Register>> for AttributeFields {
+    type Error = &'static str;
+
+    fn try_from(
+        desc: InMemoryRegister<u64, STAGE1_PAGE_DESCRIPTOR::Register>,
+    ) -> Result<AttributeFields, Self::Error> {
+        let mem_attributes = match desc.read(STAGE1_PAGE_DESCRIPTOR::AttrIndx) {
+            memory::mmu::arch_mmu::mair::NORMAL => MemAttributes::CacheableDRAM,
+            memory::mmu::arch_mmu::mair::DEVICE => MemAttributes::Device,
+            _ => return Err("Unexpected memory attribute"),
+        };
+
+        let acc_perms = match desc.read_as_enum(STAGE1_PAGE_DESCRIPTOR::AP) {
+            Some(STAGE1_PAGE_DESCRIPTOR::AP::Value::RO_EL1) => AccessPermissions::ReadOnly,
+            Some(STAGE1_PAGE_DESCRIPTOR::AP::Value::RW_EL1) => AccessPermissions::ReadWrite,
+            _ => return Err("Unexpected access permission"),
+        };
+
+        let execute_never = desc.read(STAGE1_PAGE_DESCRIPTOR::PXN) > 0;
+
+        Ok(AttributeFields {
+            mem_attributes,
+            acc_perms,
+            execute_never,
+        })
+    }
+}
+
+impl PageDescriptor {
+    /// Create an instance.
+    ///
+    /// Descriptor is invalid by default.
+    pub const fn new_zeroed() -> Self {
+        Self { value: 0 }
+    }
+
+    /// Create an instance.
+    pub fn from_output_page_addr(
+        phys_output_page_addr: PageAddress<Physical>,
+        attribute_fields: &AttributeFields,
+    ) -> Self {
+        let val = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(0);
+
+        let shifted = phys_output_page_addr.into_inner().as_usize() >> Granule64KiB::SHIFT;
+        val.write(
+            STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted as u64)
+                + STAGE1_PAGE_DESCRIPTOR::AF::True
+                + STAGE1_PAGE_DESCRIPTOR::TYPE::Page
+                + STAGE1_PAGE_DESCRIPTOR::VALID::True
+                + (*attribute_fields).into(),
+        );
+
+        Self { value: val.get() }
+    }
+
+    /// Returns the valid bit.
+    fn is_valid(&self) -> bool {
+        InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(self.value)
+            .is_set(STAGE1_PAGE_DESCRIPTOR::VALID)
+    }
+
+    /// Returns the output page.
+    fn output_page_addr(&self) -> PageAddress<Physical> {
+        let shifted = InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(self.value)
+            .read(STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB) as usize;
+
+        PageAddress::from(shifted << Granule64KiB::SHIFT)
+    }
+
+    /// Returns the attributes.
+    fn try_attributes(&self) -> Result<AttributeFields, &'static str> {
+        InMemoryRegister::<u64, STAGE1_PAGE_DESCRIPTOR::Register>::new(self.value).try_into()
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl<const AS_SIZE: usize> memory::mmu::AssociatedTranslationTable
+    for memory::mmu::AddressSpace<AS_SIZE>
+where
+    [u8; Self::SIZE >> Granule512MiB::SHIFT]: Sized,
+{
+    type TableStartFromTop =
+        FixedSizeTranslationTable<{ Self::SIZE >> Granule512MiB::SHIFT }, true>;
+
+    type TableStartFromBottom =
+        FixedSizeTranslationTable<{ Self::SIZE >> Granule512MiB::SHIFT }, false>;
+}
+
+impl<const NUM_TABLES: usize, const START_FROM_TOP: bool>
+    FixedSizeTranslationTable<NUM_TABLES, START_FROM_TOP>
+{
+    const START_FROM_TOP_OFFSET: Address<Virtual> =
+        Address::new((usize::MAX - (Granule512MiB::SIZE * NUM_TABLES)) + 1);
+
+    /// Create an instance.
+    #[allow(clippy::assertions_on_constants)]
+    const fn _new(for_precompute: bool) -> Self {
+        assert!(bsp::memory::mmu::KernelGranule::SIZE == Granule64KiB::SIZE);
+
+        // Can't have a zero-sized address space.
+        assert!(NUM_TABLES > 0);
+
+        Self {
+            lvl3: [[PageDescriptor::new_zeroed(); 8192]; NUM_TABLES],
+            lvl2: [TableDescriptor::new_zeroed(); NUM_TABLES],
+            initialized: for_precompute,
+        }
+    }
+
+    pub const fn new_for_precompute() -> Self {
+        Self::_new(true)
+    }
+
+    #[cfg(test)]
+    pub fn new_for_runtime() -> Self {
+        Self::_new(false)
+    }
+
+    /// Helper to calculate the lvl2 and lvl3 indices from an address.
+    #[inline(always)]
+    fn lvl2_lvl3_index_from_page_addr(
+        &self,
+        virt_page_addr: PageAddress<Virtual>,
+    ) -> Result<(usize, usize), &'static str> {
+        let mut addr = virt_page_addr.into_inner();
+
+        if START_FROM_TOP {
+            addr = addr - Self::START_FROM_TOP_OFFSET;
+        }
+
+        let lvl2_index = addr.as_usize() >> Granule512MiB::SHIFT;
+        let lvl3_index = (addr.as_usize() & Granule512MiB::MASK) >> Granule64KiB::SHIFT;
+
+        if lvl2_index > (NUM_TABLES - 1) {
+            return Err("Virtual page is out of bounds of translation table");
+        }
+
+        Ok((lvl2_index, lvl3_index))
+    }
+
+    /// Returns the PageDescriptor corresponding to the supplied page address.
+    #[inline(always)]
+    fn page_descriptor_from_page_addr(
+        &self,
+        virt_page_addr: PageAddress<Virtual>,
+    ) -> Result<&PageDescriptor, &'static str> {
+        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page_addr(virt_page_addr)?;
+        let desc = &self.lvl3[lvl2_index][lvl3_index];
+
+        Ok(desc)
+    }
+
+    /// Sets the PageDescriptor corresponding to the supplied page address.
+    ///
+    /// Doesn't allow overriding an already valid page.
+    #[inline(always)]
+    fn set_page_descriptor_from_page_addr(
+        &mut self,
+        virt_page_addr: PageAddress<Virtual>,
+        new_desc: &PageDescriptor,
+    ) -> Result<(), &'static str> {
+        let (lvl2_index, lvl3_index) = self.lvl2_lvl3_index_from_page_addr(virt_page_addr)?;
+        let desc = &mut self.lvl3[lvl2_index][lvl3_index];
+
+        if desc.is_valid() {
+            return Err("Virtual page is already mapped");
+        }
+
+        *desc = *new_desc;
+        Ok(())
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+
+impl<const NUM_TABLES: usize, const START_FROM_TOP: bool>
+    memory::mmu::translation_table::interface::TranslationTable
+    for FixedSizeTranslationTable<NUM_TABLES, START_FROM_TOP>
+{
+    fn init(&mut self) -> Result<(), &'static str> {
+        if self.initialized {
+            return Ok(());
+        }
+
+        // Populate the l2 entries.
+        for (lvl2_nr, lvl2_entry) in self.lvl2.iter_mut().enumerate() {
+            let virt_table_addr = self.lvl3[lvl2_nr].virt_start_addr();
+            let phys_table_addr = memory::mmu::try_kernel_virt_addr_to_phys_addr(virt_table_addr)?;
+
+            let new_desc = TableDescriptor::from_next_lvl_table_addr(phys_table_addr);
+            *lvl2_entry = new_desc;
+        }
+
+        self.initialized = true;
+
+        Ok(())
+    }
+
+    unsafe fn map_at(
+        &mut self,
+        virt_region: &MemoryRegion<Virtual>,
+        phys_region: &MemoryRegion<Physical>,
+        attr: &AttributeFields,
+    ) -> Result<(), &'static str> {
+        assert!(self.initialized, "Translation tables not initialized");
+
+        if virt_region.size() != phys_region.size() {
+            return Err("Tried to map memory regions with unequal sizes");
+        }
+
+        if phys_region.end_exclusive_page_addr() > bsp::memory::phys_addr_space_end_exclusive_addr()
+        {
+            return Err("Tried to map outside of physical address space");
+        }
+
+        let iter = phys_region.into_iter().zip(virt_region.into_iter());
+        for (phys_page_addr, virt_page_addr) in iter {
+            let new_desc = PageDescriptor::from_output_page_addr(phys_page_addr, attr);
+            let virt_page = virt_page_addr;
+
+            self.set_page_descriptor_from_page_addr(virt_page, &new_desc)?;
+        }
+
+        Ok(())
+    }
+
+    fn try_virt_page_addr_to_phys_page_addr(
+        &self,
+        virt_page_addr: PageAddress<Virtual>,
+    ) -> Result<PageAddress<Physical>, &'static str> {
+        let page_desc = self.page_descriptor_from_page_addr(virt_page_addr)?;
+
+        if !page_desc.is_valid() {
+            return Err("Page marked invalid");
+        }
+
+        Ok(page_desc.output_page_addr())
+    }
+
+    fn try_page_attributes(
+        &self,
+        virt_page_addr: PageAddress<Virtual>,
+    ) -> Result<AttributeFields, &'static str> {
+        let page_desc = self.page_descriptor_from_page_addr(virt_page_addr)?;
+
+        if !page_desc.is_valid() {
+            return Err("Page marked invalid");
+        }
+
+        page_desc.try_attributes()
+    }
+
+    /// Try to translate a virtual address to a physical address.
+    ///
+    /// Will only succeed if there exists a valid mapping for the input address.
+    fn try_virt_addr_to_phys_addr(
+        &self,
+        virt_addr: Address<Virtual>,
+    ) -> Result<Address<Physical>, &'static str> {
+        let virt_page = PageAddress::from(virt_addr.align_down_page());
+        let phys_page = self.try_virt_page_addr_to_phys_page_addr(virt_page)?;
+
+        Ok(phys_page.into_inner() + virt_addr.offset_into_page())
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+pub type MinSizeTranslationTable = FixedSizeTranslationTable<1, true>;
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// Check if the size of `struct TableDescriptor` is as expected.
+    #[kernel_test]
+    fn size_of_tabledescriptor_equals_64_bit() {
+        assert_eq!(
+            core::mem::size_of::<TableDescriptor>(),
+            core::mem::size_of::<u64>()
+        );
+    }
+
+    /// Check if the size of `struct PageDescriptor` is as expected.
+    #[kernel_test]
+    fn size_of_pagedescriptor_equals_64_bit() {
+        assert_eq!(
+            core::mem::size_of::<PageDescriptor>(),
+            core::mem::size_of::<u64>()
+        );
+    }
+}
diff --git a/20_timer_callbacks/kernel/src/_arch/aarch64/time.rs b/20_timer_callbacks/kernel/src/_arch/aarch64/time.rs
new file mode 100644
index 000000000..568363fc3
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/_arch/aarch64/time.rs
@@ -0,0 +1,193 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Architectural timer primitives.
+//!
+//! # Orientation
+//!
+//! Since arch modules are imported into generic modules using the path attribute, the path of this
+//! file is:
+//!
+//! crate::time::arch_time
+
+use crate::{
+    bsp::{self, exception},
+    warn,
+};
+use core::{
+    num::{NonZeroU128, NonZeroU32, NonZeroU64},
+    ops::{Add, Div},
+    time::Duration,
+};
+use cortex_a::{asm::barrier, registers::*};
+use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+const NANOSEC_PER_SEC: NonZeroU64 = NonZeroU64::new(1_000_000_000).unwrap();
+
+#[derive(Copy, Clone, PartialOrd, PartialEq)]
+struct GenericTimerCounterValue(u64);
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+/// Boot assembly code overwrites this value with the value of CNTFRQ_EL0 before any Rust code is
+/// executed. This given value here is just a (safe) dummy.
+#[no_mangle]
+static ARCH_TIMER_COUNTER_FREQUENCY: NonZeroU32 = NonZeroU32::MIN;
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+fn arch_timer_counter_frequency() -> NonZeroU32 {
+    // Read volatile is needed here to prevent the compiler from optimizing
+    // ARCH_TIMER_COUNTER_FREQUENCY away.
+    //
+    // This is safe, because all the safety requirements as stated in read_volatile()'s
+    // documentation are fulfilled.
+    unsafe { core::ptr::read_volatile(&ARCH_TIMER_COUNTER_FREQUENCY) }
+}
+
+impl GenericTimerCounterValue {
+    pub const MAX: Self = GenericTimerCounterValue(u64::MAX);
+}
+
+impl Add for GenericTimerCounterValue {
+    type Output = Self;
+
+    fn add(self, other: Self) -> Self {
+        GenericTimerCounterValue(self.0.wrapping_add(other.0))
+    }
+}
+
+impl From<GenericTimerCounterValue> for Duration {
+    fn from(counter_value: GenericTimerCounterValue) -> Self {
+        if counter_value.0 == 0 {
+            return Duration::ZERO;
+        }
+
+        let frequency: NonZeroU64 = arch_timer_counter_frequency().into();
+
+        // Div<NonZeroU64> implementation for u64 cannot panic.
+        let secs = counter_value.0.div(frequency);
+
+        // This is safe, because frequency can never be greater than u32::MAX, which means the
+        // largest theoretical value for sub_second_counter_value is (u32::MAX - 1). Therefore,
+        // (sub_second_counter_value * NANOSEC_PER_SEC) cannot overflow an u64.
+        //
+        // The subsequent division ensures the result fits into u32, since the max result is smaller
+        // than NANOSEC_PER_SEC. Therefore, just cast it to u32 using `as`.
+        let sub_second_counter_value = counter_value.0 % frequency;
+        let nanos = unsafe { sub_second_counter_value.unchecked_mul(u64::from(NANOSEC_PER_SEC)) }
+            .div(frequency) as u32;
+
+        Duration::new(secs, nanos)
+    }
+}
+
+fn max_duration() -> Duration {
+    Duration::from(GenericTimerCounterValue::MAX)
+}
+
+impl TryFrom<Duration> for GenericTimerCounterValue {
+    type Error = &'static str;
+
+    fn try_from(duration: Duration) -> Result<Self, Self::Error> {
+        if duration < resolution() {
+            return Ok(GenericTimerCounterValue(0));
+        }
+
+        if duration > max_duration() {
+            return Err("Conversion error. Duration too big");
+        }
+
+        let frequency: u128 = u32::from(arch_timer_counter_frequency()) as u128;
+        let duration: u128 = duration.as_nanos();
+
+        // This is safe, because frequency can never be greater than u32::MAX, and
+        // (Duration::MAX.as_nanos() * u32::MAX) < u128::MAX.
+        let counter_value =
+            unsafe { duration.unchecked_mul(frequency) }.div(NonZeroU128::from(NANOSEC_PER_SEC));
+
+        // Since we checked above that we are <= max_duration(), just cast to u64.
+        Ok(GenericTimerCounterValue(counter_value as u64))
+    }
+}
+
+#[inline(always)]
+fn read_cntpct() -> GenericTimerCounterValue {
+    // Prevent that the counter is read ahead of time due to out-of-order execution.
+    barrier::isb(barrier::SY);
+    let cnt = CNTPCT_EL0.get();
+
+    GenericTimerCounterValue(cnt)
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The timer's resolution.
+pub fn resolution() -> Duration {
+    Duration::from(GenericTimerCounterValue(1))
+}
+
+/// The uptime since power-on of the device.
+///
+/// This includes time consumed by firmware and bootloaders.
+pub fn uptime() -> Duration {
+    read_cntpct().into()
+}
+
+/// Spin for a given duration.
+pub fn spin_for(duration: Duration) {
+    let curr_counter_value = read_cntpct();
+
+    let counter_value_delta: GenericTimerCounterValue = match duration.try_into() {
+        Err(msg) => {
+            warn!("spin_for: {}. Skipping", msg);
+            return;
+        }
+        Ok(val) => val,
+    };
+    let counter_value_target = curr_counter_value + counter_value_delta;
+
+    // Busy wait.
+    //
+    // Read CNTPCT_EL0 directly to avoid the ISB that is part of [`read_cntpct`].
+    while GenericTimerCounterValue(CNTPCT_EL0.get()) < counter_value_target {}
+}
+
+/// The associated IRQ number.
+pub const fn timeout_irq() -> exception::asynchronous::IRQNumber {
+    bsp::exception::asynchronous::irq_map::ARM_NS_PHYISCAL_TIMER
+}
+
+/// Program a timer IRQ to be fired after `delay` has passed.
+pub fn set_timeout_irq(due_time: Duration) {
+    let counter_value_target: GenericTimerCounterValue = match due_time.try_into() {
+        Err(msg) => {
+            warn!("set_timeout: {}. Skipping", msg);
+            return;
+        }
+        Ok(val) => val,
+    };
+
+    // Set the compare value register.
+    CNTP_CVAL_EL0.set(counter_value_target.0);
+
+    // Kick off the timer.
+    CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::SET + CNTP_CTL_EL0::IMASK::CLEAR);
+}
+
+/// Conclude a pending timeout IRQ.
+pub fn conclude_timeout_irq() {
+    // Disable counting. De-asserts the IRQ.
+    CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::CLEAR);
+}
diff --git a/20_timer_callbacks/kernel/src/backtrace.rs b/20_timer_callbacks/kernel/src/backtrace.rs
new file mode 100644
index 000000000..22de6c48e
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/backtrace.rs
@@ -0,0 +1,114 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Backtracing support.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "_arch/aarch64/backtrace.rs"]
+mod arch_backtrace;
+
+use crate::{
+    memory::{Address, Virtual},
+    symbols,
+};
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+#[cfg(feature = "test_build")]
+pub use arch_backtrace::{corrupt_link, corrupt_previous_frame_addr};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// A backtrace item.
+#[allow(missing_docs)]
+pub enum BacktraceItem {
+    InvalidFramePointer(Address<Virtual>),
+    InvalidLink(Address<Virtual>),
+    Link(Address<Virtual>),
+}
+
+/// Pseudo-struct for printing a backtrace using its fmt::Display implementation.
+pub struct Backtrace;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl fmt::Display for Backtrace {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        writeln!(f, "Backtrace:")?;
+        writeln!(
+            f,
+            "      ----------------------------------------------------------------------------------------------"
+        )?;
+        writeln!(
+            f,
+            "          Address            Function containing address"
+        )?;
+        writeln!(
+            f,
+            "      ----------------------------------------------------------------------------------------------"
+        )?;
+
+        let mut fmt_res: fmt::Result = Ok(());
+        let trace_formatter =
+            |maybe_iter: Option<&mut dyn Iterator<Item = BacktraceItem>>| match maybe_iter {
+                None => fmt_res = writeln!(f, "ERROR! No valid stack frame found"),
+                Some(iter) => {
+                    // Since the backtrace is printed, the first function is always
+                    // core::fmt::write. Skip 1 so it is excluded and doesn't bloat the output.
+                    for (i, backtrace_res) in iter.skip(1).enumerate() {
+                        match backtrace_res {
+                            BacktraceItem::InvalidFramePointer(addr) => {
+                                fmt_res = writeln!(
+                                    f,
+                                    "      {:>2}. ERROR! \
+                                    Encountered invalid frame pointer ({}) during backtrace",
+                                    i + 1,
+                                    addr
+                                );
+                            }
+                            BacktraceItem::InvalidLink(addr) => {
+                                fmt_res = writeln!(
+                                    f,
+                                    "      {:>2}. ERROR! \
+                                    Link address ({}) is not contained in kernel .text section",
+                                    i + 1,
+                                    addr
+                                );
+                            }
+                            BacktraceItem::Link(addr) => {
+                                fmt_res = writeln!(
+                                    f,
+                                    "      {:>2}. {:016x} | {:<50}",
+                                    i + 1,
+                                    addr.as_usize(),
+                                    match symbols::lookup_symbol(addr) {
+                                        Some(sym) => sym.name(),
+                                        _ => "Symbol not found",
+                                    }
+                                )
+                            }
+                        };
+
+                        if fmt_res.is_err() {
+                            break;
+                        }
+                    }
+                }
+            };
+
+        arch_backtrace::backtrace(trace_formatter);
+        fmt_res?;
+
+        writeln!(
+            f,
+            "      ----------------------------------------------------------------------------------------------"
+        )
+    }
+}
diff --git a/20_timer_callbacks/kernel/src/bsp.rs b/20_timer_callbacks/kernel/src/bsp.rs
new file mode 100644
index 000000000..824787f65
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/bsp.rs
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Conditional reexporting of Board Support Packages.
+
+mod device_driver;
+
+#[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
+mod raspberrypi;
+
+#[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
+pub use raspberrypi::*;
diff --git a/20_timer_callbacks/kernel/src/bsp/device_driver.rs b/20_timer_callbacks/kernel/src/bsp/device_driver.rs
new file mode 100644
index 000000000..eafaf7754
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/bsp/device_driver.rs
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Device driver.
+
+#[cfg(feature = "bsp_rpi4")]
+mod arm;
+#[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
+mod bcm;
+mod common;
+
+#[cfg(feature = "bsp_rpi4")]
+pub use arm::*;
+#[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
+pub use bcm::*;
diff --git a/20_timer_callbacks/kernel/src/bsp/device_driver/arm.rs b/20_timer_callbacks/kernel/src/bsp/device_driver/arm.rs
new file mode 100644
index 000000000..e83e24c92
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/bsp/device_driver/arm.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! ARM driver top level.
+
+pub mod gicv2;
+
+pub use gicv2::*;
diff --git a/20_timer_callbacks/kernel/src/bsp/device_driver/arm/gicv2.rs b/20_timer_callbacks/kernel/src/bsp/device_driver/arm/gicv2.rs
new file mode 100644
index 000000000..fee8bb4cc
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/bsp/device_driver/arm/gicv2.rs
@@ -0,0 +1,234 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! GICv2 Driver - ARM Generic Interrupt Controller v2.
+//!
+//! The following is a collection of excerpts with useful information from
+//!   - `Programmer's Guide for ARMv8-A`
+//!   - `ARM Generic Interrupt Controller Architecture Specification`
+//!
+//! # Programmer's Guide - 10.6.1 Configuration
+//!
+//! The GIC is accessed as a memory-mapped peripheral.
+//!
+//! All cores can access the common Distributor, but the CPU interface is banked, that is, each core
+//! uses the same address to access its own private CPU interface.
+//!
+//! It is not possible for a core to access the CPU interface of another core.
+//!
+//! # Architecture Specification - 10.6.2 Initialization
+//!
+//! Both the Distributor and the CPU interfaces are disabled at reset. The GIC must be initialized
+//! after reset before it can deliver interrupts to the core.
+//!
+//! In the Distributor, software must configure the priority, target, security and enable individual
+//! interrupts. The Distributor must subsequently be enabled through its control register
+//! (GICD_CTLR). For each CPU interface, software must program the priority mask and preemption
+//! settings.
+//!
+//! Each CPU interface block itself must be enabled through its control register (GICD_CTLR). This
+//! prepares the GIC to deliver interrupts to the core.
+//!
+//! Before interrupts are expected in the core, software prepares the core to take interrupts by
+//! setting a valid interrupt vector in the vector table, and clearing interrupt mask bits in
+//! PSTATE, and setting the routing controls.
+//!
+//! The entire interrupt mechanism in the system can be disabled by disabling the Distributor.
+//! Interrupt delivery to an individual core can be disabled by disabling its CPU interface.
+//! Individual interrupts can also be disabled (or enabled) in the distributor.
+//!
+//! For an interrupt to reach the core, the individual interrupt, Distributor and CPU interface must
+//! all be enabled. The interrupt also needs to be of sufficient priority, that is, higher than the
+//! core's priority mask.
+//!
+//! # Architecture Specification - 1.4.2 Interrupt types
+//!
+//! - Peripheral interrupt
+//!     - Private Peripheral Interrupt (PPI)
+//!         - This is a peripheral interrupt that is specific to a single processor.
+//!     - Shared Peripheral Interrupt (SPI)
+//!         - This is a peripheral interrupt that the Distributor can route to any of a specified
+//!           combination of processors.
+//!
+//! - Software-generated interrupt (SGI)
+//!     - This is an interrupt generated by software writing to a GICD_SGIR register in the GIC. The
+//!       system uses SGIs for interprocessor communication.
+//!     - An SGI has edge-triggered properties. The software triggering of the interrupt is
+//!       equivalent to the edge transition of the interrupt request signal.
+//!     - When an SGI occurs in a multiprocessor implementation, the CPUID field in the Interrupt
+//!       Acknowledge Register, GICC_IAR, or the Aliased Interrupt Acknowledge Register, GICC_AIAR,
+//!       identifies the processor that requested the interrupt.
+//!
+//! # Architecture Specification - 2.2.1 Interrupt IDs
+//!
+//! Interrupts from sources are identified using ID numbers. Each CPU interface can see up to 1020
+//! interrupts. The banking of SPIs and PPIs increases the total number of interrupts supported by
+//! the Distributor.
+//!
+//! The GIC assigns interrupt ID numbers ID0-ID1019 as follows:
+//!   - Interrupt numbers 32..1019 are used for SPIs.
+//!   - Interrupt numbers 0..31 are used for interrupts that are private to a CPU interface. These
+//!     interrupts are banked in the Distributor.
+//!       - A banked interrupt is one where the Distributor can have multiple interrupts with the
+//!         same ID. A banked interrupt is identified uniquely by its ID number and its associated
+//!         CPU interface number. Of the banked interrupt IDs:
+//!           - 00..15 SGIs
+//!           - 16..31 PPIs
+
+mod gicc;
+mod gicd;
+
+use crate::{
+    bsp::{self, device_driver::common::BoundedUsize},
+    cpu, driver, exception,
+    memory::{Address, Virtual},
+    synchronization,
+    synchronization::InitStateLock,
+};
+use alloc::vec::Vec;
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+type HandlerTable = Vec<Option<exception::asynchronous::IRQHandlerDescriptor<IRQNumber>>>;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Used for the associated type of trait [`exception::asynchronous::interface::IRQManager`].
+pub type IRQNumber = BoundedUsize<{ GICv2::MAX_IRQ_NUMBER }>;
+
+/// Representation of the GIC.
+pub struct GICv2 {
+    /// The Distributor.
+    gicd: gicd::GICD,
+
+    /// The CPU Interface.
+    gicc: gicc::GICC,
+
+    /// Stores registered IRQ handlers. Writable only during kernel init. RO afterwards.
+    handler_table: InitStateLock<HandlerTable>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl GICv2 {
+    const MAX_IRQ_NUMBER: usize = 1019;
+
+    pub const COMPATIBLE: &'static str = "GICv2 (ARM Generic Interrupt Controller v2)";
+
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(
+        gicd_mmio_start_addr: Address<Virtual>,
+        gicc_mmio_start_addr: Address<Virtual>,
+    ) -> Self {
+        Self {
+            gicd: gicd::GICD::new(gicd_mmio_start_addr),
+            gicc: gicc::GICC::new(gicc_mmio_start_addr),
+            handler_table: InitStateLock::new(Vec::new()),
+        }
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use synchronization::interface::ReadWriteEx;
+
+impl driver::interface::DeviceDriver for GICv2 {
+    type IRQNumberType = IRQNumber;
+
+    fn compatible(&self) -> &'static str {
+        Self::COMPATIBLE
+    }
+
+    unsafe fn init(&self) -> Result<(), &'static str> {
+        self.handler_table
+            .write(|table| table.resize(IRQNumber::MAX_INCLUSIVE + 1, None));
+
+        if bsp::cpu::BOOT_CORE_ID == cpu::smp::core_id() {
+            self.gicd.boot_core_init();
+        }
+
+        self.gicc.priority_accept_all();
+        self.gicc.enable();
+
+        Ok(())
+    }
+}
+
+impl exception::asynchronous::interface::IRQManager for GICv2 {
+    type IRQNumberType = IRQNumber;
+
+    fn register_handler(
+        &self,
+        irq_handler_descriptor: exception::asynchronous::IRQHandlerDescriptor<Self::IRQNumberType>,
+    ) -> Result<(), &'static str> {
+        self.handler_table.write(|table| {
+            let irq_number = irq_handler_descriptor.number().get();
+
+            if table[irq_number].is_some() {
+                return Err("IRQ handler already registered");
+            }
+
+            table[irq_number] = Some(irq_handler_descriptor);
+
+            Ok(())
+        })
+    }
+
+    fn enable(&self, irq_number: &Self::IRQNumberType) {
+        self.gicd.enable(irq_number);
+    }
+
+    fn handle_pending_irqs<'irq_context>(
+        &'irq_context self,
+        ic: &exception::asynchronous::IRQContext<'irq_context>,
+    ) {
+        // Extract the highest priority pending IRQ number from the Interrupt Acknowledge Register
+        // (IAR).
+        let irq_number = self.gicc.pending_irq_number(ic);
+
+        // Guard against spurious interrupts.
+        if irq_number > GICv2::MAX_IRQ_NUMBER {
+            return;
+        }
+
+        // Call the IRQ handler. Panic if there is none.
+        self.handler_table.read(|table| {
+            match table[irq_number] {
+                None => panic!("No handler registered for IRQ {}", irq_number),
+                Some(descriptor) => {
+                    // Call the IRQ handler. Panics on failure.
+                    descriptor.handler().handle().expect("Error handling IRQ");
+                }
+            }
+        });
+
+        // Signal completion of handling.
+        self.gicc.mark_comleted(irq_number as u32, ic);
+    }
+
+    fn print_handler(&self) {
+        use crate::info;
+
+        info!("      Peripheral handler:");
+
+        self.handler_table.read(|table| {
+            for (i, opt) in table.iter().skip(32).enumerate() {
+                if let Some(handler) = opt {
+                    info!("            {: >3}. {}", i + 32, handler.name());
+                }
+            }
+        });
+    }
+}
diff --git a/20_timer_callbacks/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs b/20_timer_callbacks/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
new file mode 100644
index 000000000..1a02fc650
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
@@ -0,0 +1,145 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! GICC Driver - GIC CPU interface.
+
+use crate::{
+    bsp::device_driver::common::MMIODerefWrapper,
+    exception,
+    memory::{Address, Virtual},
+};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields, register_structs,
+    registers::ReadWrite,
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+register_bitfields! {
+    u32,
+
+    /// CPU Interface Control Register
+    CTLR [
+        Enable OFFSET(0) NUMBITS(1) []
+    ],
+
+    /// Interrupt Priority Mask Register
+    PMR [
+        Priority OFFSET(0) NUMBITS(8) []
+    ],
+
+    /// Interrupt Acknowledge Register
+    IAR [
+        InterruptID OFFSET(0) NUMBITS(10) []
+    ],
+
+    /// End of Interrupt Register
+    EOIR [
+        EOIINTID OFFSET(0) NUMBITS(10) []
+    ]
+}
+
+register_structs! {
+    #[allow(non_snake_case)]
+    pub RegisterBlock {
+        (0x000 => CTLR: ReadWrite<u32, CTLR::Register>),
+        (0x004 => PMR: ReadWrite<u32, PMR::Register>),
+        (0x008 => _reserved1),
+        (0x00C => IAR: ReadWrite<u32, IAR::Register>),
+        (0x010 => EOIR: ReadWrite<u32, EOIR::Register>),
+        (0x014  => @END),
+    }
+}
+
+/// Abstraction for the associated MMIO registers.
+type Registers = MMIODerefWrapper<RegisterBlock>;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Representation of the GIC CPU interface.
+pub struct GICC {
+    registers: Registers,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl GICC {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
+        Self {
+            registers: Registers::new(mmio_start_addr),
+        }
+    }
+
+    /// Accept interrupts of any priority.
+    ///
+    /// Quoting the GICv2 Architecture Specification:
+    ///
+    ///   "Writing 255 to the GICC_PMR always sets it to the largest supported priority field
+    ///    value."
+    ///
+    /// # Safety
+    ///
+    /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
+    ///   of `&mut self`.
+    pub fn priority_accept_all(&self) {
+        self.registers.PMR.write(PMR::Priority.val(255)); // Comment in arch spec.
+    }
+
+    /// Enable the interface - start accepting IRQs.
+    ///
+    /// # Safety
+    ///
+    /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
+    ///   of `&mut self`.
+    pub fn enable(&self) {
+        self.registers.CTLR.write(CTLR::Enable::SET);
+    }
+
+    /// Extract the number of the highest-priority pending IRQ.
+    ///
+    /// Can only be called from IRQ context, which is ensured by taking an `IRQContext` token.
+    ///
+    /// # Safety
+    ///
+    /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
+    ///   of `&mut self`.
+    #[allow(clippy::trivially_copy_pass_by_ref)]
+    pub fn pending_irq_number<'irq_context>(
+        &self,
+        _ic: &exception::asynchronous::IRQContext<'irq_context>,
+    ) -> usize {
+        self.registers.IAR.read(IAR::InterruptID) as usize
+    }
+
+    /// Complete handling of the currently active IRQ.
+    ///
+    /// Can only be called from IRQ context, which is ensured by taking an `IRQContext` token.
+    ///
+    /// To be called after `pending_irq_number()`.
+    ///
+    /// # Safety
+    ///
+    /// - GICC MMIO registers are banked per CPU core. It is therefore safe to have `&self` instead
+    ///   of `&mut self`.
+    #[allow(clippy::trivially_copy_pass_by_ref)]
+    pub fn mark_comleted<'irq_context>(
+        &self,
+        irq_number: u32,
+        _ic: &exception::asynchronous::IRQContext<'irq_context>,
+    ) {
+        self.registers.EOIR.write(EOIR::EOIINTID.val(irq_number));
+    }
+}
diff --git a/20_timer_callbacks/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs b/20_timer_callbacks/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
new file mode 100644
index 000000000..8aebcf2b6
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -0,0 +1,201 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! GICD Driver - GIC Distributor.
+//!
+//! # Glossary
+//!   - SPI - Shared Peripheral Interrupt.
+
+use crate::{
+    bsp::device_driver::common::MMIODerefWrapper,
+    memory::{Address, Virtual},
+    state, synchronization,
+    synchronization::IRQSafeNullLock,
+};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields, register_structs,
+    registers::{ReadOnly, ReadWrite},
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+register_bitfields! {
+    u32,
+
+    /// Distributor Control Register
+    CTLR [
+        Enable OFFSET(0) NUMBITS(1) []
+    ],
+
+    /// Interrupt Controller Type Register
+    TYPER [
+        ITLinesNumber OFFSET(0)  NUMBITS(5) []
+    ],
+
+    /// Interrupt Processor Targets Registers
+    ITARGETSR [
+        Offset3 OFFSET(24) NUMBITS(8) [],
+        Offset2 OFFSET(16) NUMBITS(8) [],
+        Offset1 OFFSET(8)  NUMBITS(8) [],
+        Offset0 OFFSET(0)  NUMBITS(8) []
+    ]
+}
+
+register_structs! {
+    #[allow(non_snake_case)]
+    SharedRegisterBlock {
+        (0x000 => CTLR: ReadWrite<u32, CTLR::Register>),
+        (0x004 => TYPER: ReadOnly<u32, TYPER::Register>),
+        (0x008 => _reserved1),
+        (0x104 => ISENABLER: [ReadWrite<u32>; 31]),
+        (0x180 => _reserved2),
+        (0x820 => ITARGETSR: [ReadWrite<u32, ITARGETSR::Register>; 248]),
+        (0xC00 => @END),
+    }
+}
+
+register_structs! {
+    #[allow(non_snake_case)]
+    BankedRegisterBlock {
+        (0x000 => _reserved1),
+        (0x100 => ISENABLER: ReadWrite<u32>),
+        (0x104 => _reserved2),
+        (0x800 => ITARGETSR: [ReadOnly<u32, ITARGETSR::Register>; 8]),
+        (0x820 => @END),
+    }
+}
+
+/// Abstraction for the non-banked parts of the associated MMIO registers.
+type SharedRegisters = MMIODerefWrapper<SharedRegisterBlock>;
+
+/// Abstraction for the banked parts of the associated MMIO registers.
+type BankedRegisters = MMIODerefWrapper<BankedRegisterBlock>;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Representation of the GIC Distributor.
+pub struct GICD {
+    /// Access to shared registers is guarded with a lock.
+    shared_registers: IRQSafeNullLock<SharedRegisters>,
+
+    /// Access to banked registers is unguarded.
+    banked_registers: BankedRegisters,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl SharedRegisters {
+    /// Return the number of IRQs that this HW implements.
+    #[inline(always)]
+    fn num_irqs(&mut self) -> usize {
+        // Query number of implemented IRQs.
+        //
+        // Refer to GICv2 Architecture Specification, Section 4.3.2.
+        ((self.TYPER.read(TYPER::ITLinesNumber) as usize) + 1) * 32
+    }
+
+    /// Return a slice of the implemented ITARGETSR.
+    #[inline(always)]
+    fn implemented_itargets_slice(&mut self) -> &[ReadWrite<u32, ITARGETSR::Register>] {
+        assert!(self.num_irqs() >= 36);
+
+        // Calculate the max index of the shared ITARGETSR array.
+        //
+        // The first 32 IRQs are private, so not included in `shared_registers`. Each ITARGETS
+        // register has four entries, so shift right by two. Subtract one because we start
+        // counting at zero.
+        let spi_itargetsr_max_index = ((self.num_irqs() - 32) >> 2) - 1;
+
+        // Rust automatically inserts slice range sanity check, i.e. max >= min.
+        &self.ITARGETSR[0..spi_itargetsr_max_index]
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+use synchronization::interface::Mutex;
+
+impl GICD {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
+        Self {
+            shared_registers: IRQSafeNullLock::new(SharedRegisters::new(mmio_start_addr)),
+            banked_registers: BankedRegisters::new(mmio_start_addr),
+        }
+    }
+
+    /// Use a banked ITARGETSR to retrieve the executing core's GIC target mask.
+    ///
+    /// Quoting the GICv2 Architecture Specification:
+    ///
+    ///   "GICD_ITARGETSR0 to GICD_ITARGETSR7 are read-only, and each field returns a value that
+    ///    corresponds only to the processor reading the register."
+    fn local_gic_target_mask(&self) -> u32 {
+        self.banked_registers.ITARGETSR[0].read(ITARGETSR::Offset0)
+    }
+
+    /// Route all SPIs to the boot core and enable the distributor.
+    pub fn boot_core_init(&self) {
+        assert!(
+            state::state_manager().is_init(),
+            "Only allowed during kernel init phase"
+        );
+
+        // Target all SPIs to the boot core only.
+        let mask = self.local_gic_target_mask();
+
+        self.shared_registers.lock(|regs| {
+            for i in regs.implemented_itargets_slice().iter() {
+                i.write(
+                    ITARGETSR::Offset3.val(mask)
+                        + ITARGETSR::Offset2.val(mask)
+                        + ITARGETSR::Offset1.val(mask)
+                        + ITARGETSR::Offset0.val(mask),
+                );
+            }
+
+            regs.CTLR.write(CTLR::Enable::SET);
+        });
+    }
+
+    /// Enable an interrupt.
+    pub fn enable(&self, irq_num: &super::IRQNumber) {
+        let irq_num = irq_num.get();
+
+        // Each bit in the u32 enable register corresponds to one IRQ number. Shift right by 5
+        // (division by 32) and arrive at the index for the respective ISENABLER[i].
+        let enable_reg_index = irq_num >> 5;
+        let enable_bit: u32 = 1u32 << (irq_num % 32);
+
+        // Check if we are handling a private or shared IRQ.
+        match irq_num {
+            // Private.
+            0..=31 => {
+                let enable_reg = &self.banked_registers.ISENABLER;
+                enable_reg.set(enable_reg.get() | enable_bit);
+            }
+            // Shared.
+            _ => {
+                let enable_reg_index_shared = enable_reg_index - 1;
+
+                self.shared_registers.lock(|regs| {
+                    let enable_reg = &regs.ISENABLER[enable_reg_index_shared];
+                    enable_reg.set(enable_reg.get() | enable_bit);
+                });
+            }
+        }
+    }
+}
diff --git a/20_timer_callbacks/kernel/src/bsp/device_driver/bcm.rs b/20_timer_callbacks/kernel/src/bsp/device_driver/bcm.rs
new file mode 100644
index 000000000..5a7cc23be
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/bsp/device_driver/bcm.rs
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! BCM driver top level.
+
+mod bcm2xxx_gpio;
+#[cfg(feature = "bsp_rpi3")]
+mod bcm2xxx_interrupt_controller;
+mod bcm2xxx_pl011_uart;
+
+pub use bcm2xxx_gpio::*;
+#[cfg(feature = "bsp_rpi3")]
+pub use bcm2xxx_interrupt_controller::*;
+pub use bcm2xxx_pl011_uart::*;
diff --git a/20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
new file mode 100644
index 000000000..fb61a6510
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -0,0 +1,228 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! GPIO Driver.
+
+use crate::{
+    bsp::device_driver::common::MMIODerefWrapper,
+    driver,
+    exception::asynchronous::IRQNumber,
+    memory::{Address, Virtual},
+    synchronization,
+    synchronization::IRQSafeNullLock,
+};
+use tock_registers::{
+    interfaces::{ReadWriteable, Writeable},
+    register_bitfields, register_structs,
+    registers::ReadWrite,
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+// GPIO registers.
+//
+// Descriptions taken from
+// - https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
+// - https://datasheets.raspberrypi.org/bcm2711/bcm2711-peripherals.pdf
+register_bitfields! {
+    u32,
+
+    /// GPIO Function Select 1
+    GPFSEL1 [
+        /// Pin 15
+        FSEL15 OFFSET(15) NUMBITS(3) [
+            Input = 0b000,
+            Output = 0b001,
+            AltFunc0 = 0b100  // PL011 UART RX
+
+        ],
+
+        /// Pin 14
+        FSEL14 OFFSET(12) NUMBITS(3) [
+            Input = 0b000,
+            Output = 0b001,
+            AltFunc0 = 0b100  // PL011 UART TX
+        ]
+    ],
+
+    /// GPIO Pull-up/down Register
+    ///
+    /// BCM2837 only.
+    GPPUD [
+        /// Controls the actuation of the internal pull-up/down control line to ALL the GPIO pins.
+        PUD OFFSET(0) NUMBITS(2) [
+            Off = 0b00,
+            PullDown = 0b01,
+            PullUp = 0b10
+        ]
+    ],
+
+    /// GPIO Pull-up/down Clock Register 0
+    ///
+    /// BCM2837 only.
+    GPPUDCLK0 [
+        /// Pin 15
+        PUDCLK15 OFFSET(15) NUMBITS(1) [
+            NoEffect = 0,
+            AssertClock = 1
+        ],
+
+        /// Pin 14
+        PUDCLK14 OFFSET(14) NUMBITS(1) [
+            NoEffect = 0,
+            AssertClock = 1
+        ]
+    ],
+
+    /// GPIO Pull-up / Pull-down Register 0
+    ///
+    /// BCM2711 only.
+    GPIO_PUP_PDN_CNTRL_REG0 [
+        /// Pin 15
+        GPIO_PUP_PDN_CNTRL15 OFFSET(30) NUMBITS(2) [
+            NoResistor = 0b00,
+            PullUp = 0b01
+        ],
+
+        /// Pin 14
+        GPIO_PUP_PDN_CNTRL14 OFFSET(28) NUMBITS(2) [
+            NoResistor = 0b00,
+            PullUp = 0b01
+        ]
+    ]
+}
+
+register_structs! {
+    #[allow(non_snake_case)]
+    RegisterBlock {
+        (0x00 => _reserved1),
+        (0x04 => GPFSEL1: ReadWrite<u32, GPFSEL1::Register>),
+        (0x08 => _reserved2),
+        (0x94 => GPPUD: ReadWrite<u32, GPPUD::Register>),
+        (0x98 => GPPUDCLK0: ReadWrite<u32, GPPUDCLK0::Register>),
+        (0x9C => _reserved3),
+        (0xE4 => GPIO_PUP_PDN_CNTRL_REG0: ReadWrite<u32, GPIO_PUP_PDN_CNTRL_REG0::Register>),
+        (0xE8 => @END),
+    }
+}
+
+/// Abstraction for the associated MMIO registers.
+type Registers = MMIODerefWrapper<RegisterBlock>;
+
+struct GPIOInner {
+    registers: Registers,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Representation of the GPIO HW.
+pub struct GPIO {
+    inner: IRQSafeNullLock<GPIOInner>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl GPIOInner {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
+        Self {
+            registers: Registers::new(mmio_start_addr),
+        }
+    }
+
+    /// Disable pull-up/down on pins 14 and 15.
+    #[cfg(feature = "bsp_rpi3")]
+    fn disable_pud_14_15_bcm2837(&mut self) {
+        use crate::time;
+        use core::time::Duration;
+
+        // The Linux 2837 GPIO driver waits 1 µs between the steps.
+        const DELAY: Duration = Duration::from_micros(1);
+
+        self.registers.GPPUD.write(GPPUD::PUD::Off);
+        time::time_manager().spin_for(DELAY);
+
+        self.registers
+            .GPPUDCLK0
+            .write(GPPUDCLK0::PUDCLK15::AssertClock + GPPUDCLK0::PUDCLK14::AssertClock);
+        time::time_manager().spin_for(DELAY);
+
+        self.registers.GPPUD.write(GPPUD::PUD::Off);
+        self.registers.GPPUDCLK0.set(0);
+    }
+
+    /// Disable pull-up/down on pins 14 and 15.
+    #[cfg(feature = "bsp_rpi4")]
+    fn disable_pud_14_15_bcm2711(&mut self) {
+        self.registers.GPIO_PUP_PDN_CNTRL_REG0.write(
+            GPIO_PUP_PDN_CNTRL_REG0::GPIO_PUP_PDN_CNTRL15::PullUp
+                + GPIO_PUP_PDN_CNTRL_REG0::GPIO_PUP_PDN_CNTRL14::PullUp,
+        );
+    }
+
+    /// Map PL011 UART as standard output.
+    ///
+    /// TX to pin 14
+    /// RX to pin 15
+    pub fn map_pl011_uart(&mut self) {
+        // Select the UART on pins 14 and 15.
+        self.registers
+            .GPFSEL1
+            .modify(GPFSEL1::FSEL15::AltFunc0 + GPFSEL1::FSEL14::AltFunc0);
+
+        // Disable pull-up/down on pins 14 and 15.
+        #[cfg(feature = "bsp_rpi3")]
+        self.disable_pud_14_15_bcm2837();
+
+        #[cfg(feature = "bsp_rpi4")]
+        self.disable_pud_14_15_bcm2711();
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl GPIO {
+    pub const COMPATIBLE: &'static str = "BCM GPIO";
+
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
+        Self {
+            inner: IRQSafeNullLock::new(GPIOInner::new(mmio_start_addr)),
+        }
+    }
+
+    /// Concurrency safe version of `GPIOInner.map_pl011_uart()`
+    pub fn map_pl011_uart(&self) {
+        self.inner.lock(|inner| inner.map_pl011_uart())
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use synchronization::interface::Mutex;
+
+impl driver::interface::DeviceDriver for GPIO {
+    type IRQNumberType = IRQNumber;
+
+    fn compatible(&self) -> &'static str {
+        Self::COMPATIBLE
+    }
+}
diff --git a/20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
new file mode 100644
index 000000000..6c2cd451b
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -0,0 +1,175 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Interrupt Controller Driver.
+
+mod local_ic;
+mod peripheral_ic;
+
+use crate::{
+    bsp::device_driver::common::BoundedUsize,
+    driver,
+    exception::{self, asynchronous::IRQHandlerDescriptor},
+    memory::{Address, Virtual},
+};
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Wrapper struct for a bitmask indicating pending IRQ numbers.
+struct PendingIRQs {
+    bitmask: u64,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub type LocalIRQ = BoundedUsize<{ InterruptController::MAX_LOCAL_IRQ_NUMBER }>;
+pub type PeripheralIRQ = BoundedUsize<{ InterruptController::MAX_PERIPHERAL_IRQ_NUMBER }>;
+
+/// Used for the associated type of trait [`exception::asynchronous::interface::IRQManager`].
+#[derive(Copy, Clone)]
+#[allow(missing_docs)]
+pub enum IRQNumber {
+    Local(LocalIRQ),
+    Peripheral(PeripheralIRQ),
+}
+
+/// Representation of the Interrupt Controller.
+pub struct InterruptController {
+    local: local_ic::LocalIC,
+    periph: peripheral_ic::PeripheralIC,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl PendingIRQs {
+    pub fn new(bitmask: u64) -> Self {
+        Self { bitmask }
+    }
+}
+
+impl Iterator for PendingIRQs {
+    type Item = usize;
+
+    fn next(&mut self) -> Option<Self::Item> {
+        if self.bitmask == 0 {
+            return None;
+        }
+
+        let next = self.bitmask.trailing_zeros() as usize;
+        self.bitmask &= self.bitmask.wrapping_sub(1);
+        Some(next)
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl fmt::Display for IRQNumber {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        match self {
+            Self::Local(number) => write!(f, "Local({})", number),
+            Self::Peripheral(number) => write!(f, "Peripheral({})", number),
+        }
+    }
+}
+
+impl InterruptController {
+    // Restrict to 3 for now. This makes the code for local_ic.rs more straight forward.
+    const MAX_LOCAL_IRQ_NUMBER: usize = 3;
+    const MAX_PERIPHERAL_IRQ_NUMBER: usize = 63;
+
+    pub const COMPATIBLE: &'static str = "BCM Interrupt Controller";
+
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(
+        local_mmio_start_addr: Address<Virtual>,
+        periph_mmio_start_addr: Address<Virtual>,
+    ) -> Self {
+        Self {
+            local: local_ic::LocalIC::new(local_mmio_start_addr),
+            periph: peripheral_ic::PeripheralIC::new(periph_mmio_start_addr),
+        }
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+
+impl driver::interface::DeviceDriver for InterruptController {
+    type IRQNumberType = IRQNumber;
+
+    fn compatible(&self) -> &'static str {
+        Self::COMPATIBLE
+    }
+
+    unsafe fn init(&self) -> Result<(), &'static str> {
+        self.local.init();
+        self.periph.init();
+
+        Ok(())
+    }
+}
+
+impl exception::asynchronous::interface::IRQManager for InterruptController {
+    type IRQNumberType = IRQNumber;
+
+    fn register_handler(
+        &self,
+        irq_handler_descriptor: exception::asynchronous::IRQHandlerDescriptor<Self::IRQNumberType>,
+    ) -> Result<(), &'static str> {
+        match irq_handler_descriptor.number() {
+            IRQNumber::Local(lirq) => {
+                let local_descriptor = IRQHandlerDescriptor::new(
+                    lirq,
+                    irq_handler_descriptor.name(),
+                    irq_handler_descriptor.handler(),
+                );
+
+                self.local.register_handler(local_descriptor)
+            }
+            IRQNumber::Peripheral(pirq) => {
+                let periph_descriptor = IRQHandlerDescriptor::new(
+                    pirq,
+                    irq_handler_descriptor.name(),
+                    irq_handler_descriptor.handler(),
+                );
+
+                self.periph.register_handler(periph_descriptor)
+            }
+        }
+    }
+
+    fn enable(&self, irq: &Self::IRQNumberType) {
+        match irq {
+            IRQNumber::Local(lirq) => self.local.enable(lirq),
+            IRQNumber::Peripheral(pirq) => self.periph.enable(pirq),
+        }
+    }
+
+    fn handle_pending_irqs<'irq_context>(
+        &'irq_context self,
+        ic: &exception::asynchronous::IRQContext<'irq_context>,
+    ) {
+        self.local.handle_pending_irqs(ic);
+        self.periph.handle_pending_irqs(ic)
+    }
+
+    fn print_handler(&self) {
+        self.local.print_handler();
+        self.periph.print_handler();
+    }
+}
diff --git a/20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/local_ic.rs b/20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/local_ic.rs
new file mode 100644
index 000000000..ac382e953
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/local_ic.rs
@@ -0,0 +1,173 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Local Interrupt Controller Driver.
+//!
+//! # Resources
+//!
+//! - <https://datasheets.raspberrypi.com/bcm2836/bcm2836-peripherals.pdf>
+
+use super::{LocalIRQ, PendingIRQs};
+use crate::{
+    bsp::device_driver::common::MMIODerefWrapper,
+    exception,
+    memory::{Address, Virtual},
+    synchronization,
+    synchronization::{IRQSafeNullLock, InitStateLock},
+};
+use alloc::vec::Vec;
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_structs,
+    registers::{ReadOnly, WriteOnly},
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+register_structs! {
+    #[allow(non_snake_case)]
+    WORegisterBlock {
+        (0x00 => _reserved1),
+        (0x40 => CORE0_TIMER_INTERRUPT_CONTROL: WriteOnly<u32>),
+        (0x44 => @END),
+    }
+}
+
+register_structs! {
+    #[allow(non_snake_case)]
+    RORegisterBlock {
+        (0x00 => _reserved1),
+        (0x60 => CORE0_INTERRUPT_SOURCE: ReadOnly<u32>),
+        (0x64 => @END),
+    }
+}
+
+/// Abstraction for the WriteOnly parts of the associated MMIO registers.
+type WriteOnlyRegisters = MMIODerefWrapper<WORegisterBlock>;
+
+/// Abstraction for the ReadOnly parts of the associated MMIO registers.
+type ReadOnlyRegisters = MMIODerefWrapper<RORegisterBlock>;
+
+type HandlerTable = Vec<Option<exception::asynchronous::IRQHandlerDescriptor<LocalIRQ>>>;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Representation of the peripheral interrupt controller.
+pub struct LocalIC {
+    /// Access to write registers is guarded with a lock.
+    wo_registers: IRQSafeNullLock<WriteOnlyRegisters>,
+
+    /// Register read access is unguarded.
+    ro_registers: ReadOnlyRegisters,
+
+    /// Stores registered IRQ handlers. Writable only during kernel init. RO afterwards.
+    handler_table: InitStateLock<HandlerTable>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl LocalIC {
+    // See datasheet.
+    const PERIPH_IRQ_MASK: u32 = (1 << 8);
+
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
+        Self {
+            wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(mmio_start_addr)),
+            ro_registers: ReadOnlyRegisters::new(mmio_start_addr),
+            handler_table: InitStateLock::new(Vec::new()),
+        }
+    }
+
+    /// Called by the kernel to bring up the device.
+    pub fn init(&self) {
+        self.handler_table
+            .write(|table| table.resize(LocalIRQ::MAX_INCLUSIVE + 1, None));
+    }
+
+    /// Query the list of pending IRQs.
+    fn pending_irqs(&self) -> PendingIRQs {
+        // Ignore the indicator bit for a peripheral IRQ.
+        PendingIRQs::new(
+            (self.ro_registers.CORE0_INTERRUPT_SOURCE.get() & !Self::PERIPH_IRQ_MASK).into(),
+        )
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use synchronization::interface::{Mutex, ReadWriteEx};
+
+impl exception::asynchronous::interface::IRQManager for LocalIC {
+    type IRQNumberType = LocalIRQ;
+
+    fn register_handler(
+        &self,
+        irq_handler_descriptor: exception::asynchronous::IRQHandlerDescriptor<Self::IRQNumberType>,
+    ) -> Result<(), &'static str> {
+        self.handler_table.write(|table| {
+            let irq_number = irq_handler_descriptor.number().get();
+
+            if table[irq_number].is_some() {
+                return Err("IRQ handler already registered");
+            }
+
+            table[irq_number] = Some(irq_handler_descriptor);
+
+            Ok(())
+        })
+    }
+
+    fn enable(&self, irq: &Self::IRQNumberType) {
+        self.wo_registers.lock(|regs| {
+            let enable_bit: u32 = 1 << (irq.get());
+
+            // Writing a 1 to a bit will set the corresponding IRQ enable bit. All other IRQ enable
+            // bits are unaffected. So we don't need read and OR'ing here.
+            regs.CORE0_TIMER_INTERRUPT_CONTROL.set(enable_bit);
+        });
+    }
+
+    fn handle_pending_irqs<'irq_context>(
+        &'irq_context self,
+        _ic: &exception::asynchronous::IRQContext<'irq_context>,
+    ) {
+        self.handler_table.read(|table| {
+            for irq_number in self.pending_irqs() {
+                match table[irq_number] {
+                    None => panic!("No handler registered for IRQ {}", irq_number),
+                    Some(descriptor) => {
+                        // Call the IRQ handler. Panics on failure.
+                        descriptor.handler().handle().expect("Error handling IRQ");
+                    }
+                }
+            }
+        })
+    }
+
+    fn print_handler(&self) {
+        use crate::info;
+
+        info!("      Local handler:");
+
+        self.handler_table.read(|table| {
+            for (i, opt) in table.iter().enumerate() {
+                if let Some(handler) = opt {
+                    info!("            {: >3}. {}", i, handler.name());
+                }
+            }
+        });
+    }
+}
diff --git a/20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
new file mode 100644
index 000000000..238088a8c
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -0,0 +1,178 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Peripheral Interrupt Controller Driver.
+//!
+//! # Resources
+//!
+//! - <https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf>
+
+use super::{PendingIRQs, PeripheralIRQ};
+use crate::{
+    bsp::device_driver::common::MMIODerefWrapper,
+    exception,
+    memory::{Address, Virtual},
+    synchronization,
+    synchronization::{IRQSafeNullLock, InitStateLock},
+};
+use alloc::vec::Vec;
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_structs,
+    registers::{ReadOnly, WriteOnly},
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+register_structs! {
+    #[allow(non_snake_case)]
+    WORegisterBlock {
+        (0x00 => _reserved1),
+        (0x10 => ENABLE_1: WriteOnly<u32>),
+        (0x14 => ENABLE_2: WriteOnly<u32>),
+        (0x18 => @END),
+    }
+}
+
+register_structs! {
+    #[allow(non_snake_case)]
+    RORegisterBlock {
+        (0x00 => _reserved1),
+        (0x04 => PENDING_1: ReadOnly<u32>),
+        (0x08 => PENDING_2: ReadOnly<u32>),
+        (0x0c => @END),
+    }
+}
+
+/// Abstraction for the WriteOnly parts of the associated MMIO registers.
+type WriteOnlyRegisters = MMIODerefWrapper<WORegisterBlock>;
+
+/// Abstraction for the ReadOnly parts of the associated MMIO registers.
+type ReadOnlyRegisters = MMIODerefWrapper<RORegisterBlock>;
+
+type HandlerTable = Vec<Option<exception::asynchronous::IRQHandlerDescriptor<PeripheralIRQ>>>;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Representation of the peripheral interrupt controller.
+pub struct PeripheralIC {
+    /// Access to write registers is guarded with a lock.
+    wo_registers: IRQSafeNullLock<WriteOnlyRegisters>,
+
+    /// Register read access is unguarded.
+    ro_registers: ReadOnlyRegisters,
+
+    /// Stores registered IRQ handlers. Writable only during kernel init. RO afterwards.
+    handler_table: InitStateLock<HandlerTable>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl PeripheralIC {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
+        Self {
+            wo_registers: IRQSafeNullLock::new(WriteOnlyRegisters::new(mmio_start_addr)),
+            ro_registers: ReadOnlyRegisters::new(mmio_start_addr),
+            handler_table: InitStateLock::new(Vec::new()),
+        }
+    }
+
+    /// Called by the kernel to bring up the device.
+    pub fn init(&self) {
+        self.handler_table
+            .write(|table| table.resize(PeripheralIRQ::MAX_INCLUSIVE + 1, None));
+    }
+
+    /// Query the list of pending IRQs.
+    fn pending_irqs(&self) -> PendingIRQs {
+        let pending_mask: u64 = (u64::from(self.ro_registers.PENDING_2.get()) << 32)
+            | u64::from(self.ro_registers.PENDING_1.get());
+
+        PendingIRQs::new(pending_mask)
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use synchronization::interface::{Mutex, ReadWriteEx};
+
+impl exception::asynchronous::interface::IRQManager for PeripheralIC {
+    type IRQNumberType = PeripheralIRQ;
+
+    fn register_handler(
+        &self,
+        irq_handler_descriptor: exception::asynchronous::IRQHandlerDescriptor<Self::IRQNumberType>,
+    ) -> Result<(), &'static str> {
+        self.handler_table.write(|table| {
+            let irq_number = irq_handler_descriptor.number().get();
+
+            if table[irq_number].is_some() {
+                return Err("IRQ handler already registered");
+            }
+
+            table[irq_number] = Some(irq_handler_descriptor);
+
+            Ok(())
+        })
+    }
+
+    fn enable(&self, irq: &Self::IRQNumberType) {
+        self.wo_registers.lock(|regs| {
+            let enable_reg = if irq.get() <= 31 {
+                &regs.ENABLE_1
+            } else {
+                &regs.ENABLE_2
+            };
+
+            let enable_bit: u32 = 1 << (irq.get() % 32);
+
+            // Writing a 1 to a bit will set the corresponding IRQ enable bit. All other IRQ enable
+            // bits are unaffected. So we don't need read and OR'ing here.
+            enable_reg.set(enable_bit);
+        });
+    }
+
+    fn handle_pending_irqs<'irq_context>(
+        &'irq_context self,
+        _ic: &exception::asynchronous::IRQContext<'irq_context>,
+    ) {
+        self.handler_table.read(|table| {
+            for irq_number in self.pending_irqs() {
+                match table[irq_number] {
+                    None => panic!("No handler registered for IRQ {}", irq_number),
+                    Some(descriptor) => {
+                        // Call the IRQ handler. Panics on failure.
+                        descriptor.handler().handle().expect("Error handling IRQ");
+                    }
+                }
+            }
+        })
+    }
+
+    fn print_handler(&self) {
+        use crate::info;
+
+        info!("      Peripheral handler:");
+
+        self.handler_table.read(|table| {
+            for (i, opt) in table.iter().enumerate() {
+                if let Some(handler) = opt {
+                    info!("            {: >3}. {}", i, handler.name());
+                }
+            }
+        });
+    }
+}
diff --git a/20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
new file mode 100644
index 000000000..3e7e1812c
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -0,0 +1,516 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! PL011 UART driver.
+//!
+//! # Resources
+//!
+//! - <https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf>
+//! - <https://developer.arm.com/documentation/ddi0183/latest>
+
+use crate::{
+    bsp::device_driver::common::MMIODerefWrapper,
+    console, cpu, driver,
+    exception::{self, asynchronous::IRQNumber},
+    memory::{Address, Virtual},
+    synchronization,
+    synchronization::IRQSafeNullLock,
+};
+use core::fmt;
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields, register_structs,
+    registers::{ReadOnly, ReadWrite, WriteOnly},
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+// PL011 UART registers.
+//
+// Descriptions taken from "PrimeCell UART (PL011) Technical Reference Manual" r1p5.
+register_bitfields! {
+    u32,
+
+    /// Flag Register.
+    FR [
+        /// Transmit FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
+        /// Line Control Register, LCR_H.
+        ///
+        /// - If the FIFO is disabled, this bit is set when the transmit holding register is empty.
+        /// - If the FIFO is enabled, the TXFE bit is set when the transmit FIFO is empty.
+        /// - This bit does not indicate if there is data in the transmit shift register.
+        TXFE OFFSET(7) NUMBITS(1) [],
+
+        /// Transmit FIFO full. The meaning of this bit depends on the state of the FEN bit in the
+        /// LCR_H Register.
+        ///
+        /// - If the FIFO is disabled, this bit is set when the transmit holding register is full.
+        /// - If the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
+        TXFF OFFSET(5) NUMBITS(1) [],
+
+        /// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
+        /// LCR_H Register.
+        ///
+        /// - If the FIFO is disabled, this bit is set when the receive holding register is empty.
+        /// - If the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
+        RXFE OFFSET(4) NUMBITS(1) [],
+
+        /// UART busy. If this bit is set to 1, the UART is busy transmitting data. This bit remains
+        /// set until the complete byte, including all the stop bits, has been sent from the shift
+        /// register.
+        ///
+        /// This bit is set as soon as the transmit FIFO becomes non-empty, regardless of whether
+        /// the UART is enabled or not.
+        BUSY OFFSET(3) NUMBITS(1) []
+    ],
+
+    /// Integer Baud Rate Divisor.
+    IBRD [
+        /// The integer baud rate divisor.
+        BAUD_DIVINT OFFSET(0) NUMBITS(16) []
+    ],
+
+    /// Fractional Baud Rate Divisor.
+    FBRD [
+        ///  The fractional baud rate divisor.
+        BAUD_DIVFRAC OFFSET(0) NUMBITS(6) []
+    ],
+
+    /// Line Control Register.
+    LCR_H [
+        /// Word length. These bits indicate the number of data bits transmitted or received in a
+        /// frame.
+        #[allow(clippy::enum_variant_names)]
+        WLEN OFFSET(5) NUMBITS(2) [
+            FiveBit = 0b00,
+            SixBit = 0b01,
+            SevenBit = 0b10,
+            EightBit = 0b11
+        ],
+
+        /// Enable FIFOs:
+        ///
+        /// 0 = FIFOs are disabled (character mode) that is, the FIFOs become 1-byte-deep holding
+        /// registers.
+        ///
+        /// 1 = Transmit and receive FIFO buffers are enabled (FIFO mode).
+        FEN  OFFSET(4) NUMBITS(1) [
+            FifosDisabled = 0,
+            FifosEnabled = 1
+        ]
+    ],
+
+    /// Control Register.
+    CR [
+        /// Receive enable. If this bit is set to 1, the receive section of the UART is enabled.
+        /// Data reception occurs for either UART signals or SIR signals depending on the setting of
+        /// the SIREN bit. When the UART is disabled in the middle of reception, it completes the
+        /// current character before stopping.
+        RXE OFFSET(9) NUMBITS(1) [
+            Disabled = 0,
+            Enabled = 1
+        ],
+
+        /// Transmit enable. If this bit is set to 1, the transmit section of the UART is enabled.
+        /// Data transmission occurs for either UART signals, or SIR signals depending on the
+        /// setting of the SIREN bit. When the UART is disabled in the middle of transmission, it
+        /// completes the current character before stopping.
+        TXE OFFSET(8) NUMBITS(1) [
+            Disabled = 0,
+            Enabled = 1
+        ],
+
+        /// UART enable:
+        ///
+        /// 0 = UART is disabled. If the UART is disabled in the middle of transmission or
+        /// reception, it completes the current character before stopping.
+        ///
+        /// 1 = The UART is enabled. Data transmission and reception occurs for either UART signals
+        /// or SIR signals depending on the setting of the SIREN bit
+        UARTEN OFFSET(0) NUMBITS(1) [
+            /// If the UART is disabled in the middle of transmission or reception, it completes the
+            /// current character before stopping.
+            Disabled = 0,
+            Enabled = 1
+        ]
+    ],
+
+    /// Interrupt FIFO Level Select Register.
+    IFLS [
+        /// Receive interrupt FIFO level select. The trigger points for the receive interrupt are as
+        /// follows.
+        RXIFLSEL OFFSET(3) NUMBITS(5) [
+            OneEigth = 0b000,
+            OneQuarter = 0b001,
+            OneHalf = 0b010,
+            ThreeQuarters = 0b011,
+            SevenEights = 0b100
+        ]
+    ],
+
+    /// Interrupt Mask Set/Clear Register.
+    IMSC [
+        /// Receive timeout interrupt mask. A read returns the current mask for the UARTRTINTR
+        /// interrupt.
+        ///
+        /// - On a write of 1, the mask of the UARTRTINTR interrupt is set.
+        /// - A write of 0 clears the mask.
+        RTIM OFFSET(6) NUMBITS(1) [
+            Disabled = 0,
+            Enabled = 1
+        ],
+
+        /// Receive interrupt mask. A read returns the current mask for the UARTRXINTR interrupt.
+        ///
+        /// - On a write of 1, the mask of the UARTRXINTR interrupt is set.
+        /// - A write of 0 clears the mask.
+        RXIM OFFSET(4) NUMBITS(1) [
+            Disabled = 0,
+            Enabled = 1
+        ]
+    ],
+
+    /// Masked Interrupt Status Register.
+    MIS [
+        /// Receive timeout masked interrupt status. Returns the masked interrupt state of the
+        /// UARTRTINTR interrupt.
+        RTMIS OFFSET(6) NUMBITS(1) [],
+
+        /// Receive masked interrupt status. Returns the masked interrupt state of the UARTRXINTR
+        /// interrupt.
+        RXMIS OFFSET(4) NUMBITS(1) []
+    ],
+
+    /// Interrupt Clear Register.
+    ICR [
+        /// Meta field for all pending interrupts.
+        ALL OFFSET(0) NUMBITS(11) []
+    ]
+}
+
+register_structs! {
+    #[allow(non_snake_case)]
+    pub RegisterBlock {
+        (0x00 => DR: ReadWrite<u32>),
+        (0x04 => _reserved1),
+        (0x18 => FR: ReadOnly<u32, FR::Register>),
+        (0x1c => _reserved2),
+        (0x24 => IBRD: WriteOnly<u32, IBRD::Register>),
+        (0x28 => FBRD: WriteOnly<u32, FBRD::Register>),
+        (0x2c => LCR_H: WriteOnly<u32, LCR_H::Register>),
+        (0x30 => CR: WriteOnly<u32, CR::Register>),
+        (0x34 => IFLS: ReadWrite<u32, IFLS::Register>),
+        (0x38 => IMSC: ReadWrite<u32, IMSC::Register>),
+        (0x3C => _reserved3),
+        (0x40 => MIS: ReadOnly<u32, MIS::Register>),
+        (0x44 => ICR: WriteOnly<u32, ICR::Register>),
+        (0x48 => @END),
+    }
+}
+
+/// Abstraction for the associated MMIO registers.
+type Registers = MMIODerefWrapper<RegisterBlock>;
+
+#[derive(PartialEq)]
+enum BlockingMode {
+    Blocking,
+    NonBlocking,
+}
+
+struct PL011UartInner {
+    registers: Registers,
+    chars_written: usize,
+    chars_read: usize,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Representation of the UART.
+pub struct PL011Uart {
+    inner: IRQSafeNullLock<PL011UartInner>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl PL011UartInner {
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
+        Self {
+            registers: Registers::new(mmio_start_addr),
+            chars_written: 0,
+            chars_read: 0,
+        }
+    }
+
+    /// Set up baud rate and characteristics.
+    ///
+    /// This results in 8N1 and 921_600 baud.
+    ///
+    /// The calculation for the BRD is (we set the clock to 48 MHz in config.txt):
+    /// `(48_000_000 / 16) / 921_600 = 3.2552083`.
+    ///
+    /// This means the integer part is `3` and goes into the `IBRD`.
+    /// The fractional part is `0.2552083`.
+    ///
+    /// `FBRD` calculation according to the PL011 Technical Reference Manual:
+    /// `INTEGER((0.2552083 * 64) + 0.5) = 16`.
+    ///
+    /// Therefore, the generated baud rate divider is: `3 + 16/64 = 3.25`. Which results in a
+    /// genrated baud rate of `48_000_000 / (16 * 3.25) = 923_077`.
+    ///
+    /// Error = `((923_077 - 921_600) / 921_600) * 100 = 0.16%`.
+    pub fn init(&mut self) {
+        // Execution can arrive here while there are still characters queued in the TX FIFO and
+        // actively being sent out by the UART hardware. If the UART is turned off in this case,
+        // those queued characters would be lost.
+        //
+        // For example, this can happen during runtime on a call to panic!(), because panic!()
+        // initializes its own UART instance and calls init().
+        //
+        // Hence, flush first to ensure all pending characters are transmitted.
+        self.flush();
+
+        // Turn the UART off temporarily.
+        self.registers.CR.set(0);
+
+        // Clear all pending interrupts.
+        self.registers.ICR.write(ICR::ALL::CLEAR);
+
+        // From the PL011 Technical Reference Manual:
+        //
+        // The LCR_H, IBRD, and FBRD registers form the single 30-bit wide LCR Register that is
+        // updated on a single write strobe generated by a LCR_H write. So, to internally update the
+        // contents of IBRD or FBRD, a LCR_H write must always be performed at the end.
+        //
+        // Set the baud rate, 8N1 and FIFO enabled.
+        self.registers.IBRD.write(IBRD::BAUD_DIVINT.val(3));
+        self.registers.FBRD.write(FBRD::BAUD_DIVFRAC.val(16));
+        self.registers
+            .LCR_H
+            .write(LCR_H::WLEN::EightBit + LCR_H::FEN::FifosEnabled);
+
+        // Set RX FIFO fill level at 1/8.
+        self.registers.IFLS.write(IFLS::RXIFLSEL::OneEigth);
+
+        // Enable RX IRQ + RX timeout IRQ.
+        self.registers
+            .IMSC
+            .write(IMSC::RXIM::Enabled + IMSC::RTIM::Enabled);
+
+        // Turn the UART on.
+        self.registers
+            .CR
+            .write(CR::UARTEN::Enabled + CR::TXE::Enabled + CR::RXE::Enabled);
+    }
+
+    /// Send a character.
+    fn write_char(&mut self, c: char) {
+        // Spin while TX FIFO full is set, waiting for an empty slot.
+        while self.registers.FR.matches_all(FR::TXFF::SET) {
+            cpu::nop();
+        }
+
+        // Write the character to the buffer.
+        self.registers.DR.set(c as u32);
+
+        self.chars_written += 1;
+    }
+
+    /// Send a slice of characters.
+    fn write_array(&mut self, a: &[char]) {
+        for c in a {
+            self.write_char(*c);
+        }
+    }
+
+    /// Block execution until the last buffered character has been physically put on the TX wire.
+    fn flush(&self) {
+        // Spin until the busy bit is cleared.
+        while self.registers.FR.matches_all(FR::BUSY::SET) {
+            cpu::nop();
+        }
+    }
+
+    /// Retrieve a character.
+    fn read_char_converting(&mut self, blocking_mode: BlockingMode) -> Option<char> {
+        // If RX FIFO is empty,
+        if self.registers.FR.matches_all(FR::RXFE::SET) {
+            // immediately return in non-blocking mode.
+            if blocking_mode == BlockingMode::NonBlocking {
+                return None;
+            }
+
+            // Otherwise, wait until a char was received.
+            while self.registers.FR.matches_all(FR::RXFE::SET) {
+                cpu::nop();
+            }
+        }
+
+        // Read one character.
+        let mut ret = self.registers.DR.get() as u8 as char;
+
+        // Convert carrige return to newline.
+        if ret == '\r' {
+            ret = '\n'
+        }
+
+        // Update statistics.
+        self.chars_read += 1;
+
+        Some(ret)
+    }
+}
+
+/// Implementing `core::fmt::Write` enables usage of the `format_args!` macros, which in turn are
+/// used to implement the `kernel`'s `print!` and `println!` macros. By implementing `write_str()`,
+/// we get `write_fmt()` automatically.
+///
+/// The function takes an `&mut self`, so it must be implemented for the inner struct.
+///
+/// See [`src/print.rs`].
+///
+/// [`src/print.rs`]: ../../print/index.html
+impl fmt::Write for PL011UartInner {
+    fn write_str(&mut self, s: &str) -> fmt::Result {
+        for c in s.chars() {
+            self.write_char(c);
+        }
+
+        Ok(())
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl PL011Uart {
+    pub const COMPATIBLE: &'static str = "BCM PL011 UART";
+
+    /// Create an instance.
+    ///
+    /// # Safety
+    ///
+    /// - The user must ensure to provide a correct MMIO start address.
+    pub const unsafe fn new(mmio_start_addr: Address<Virtual>) -> Self {
+        Self {
+            inner: IRQSafeNullLock::new(PL011UartInner::new(mmio_start_addr)),
+        }
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use synchronization::interface::Mutex;
+
+impl driver::interface::DeviceDriver for PL011Uart {
+    type IRQNumberType = IRQNumber;
+
+    fn compatible(&self) -> &'static str {
+        Self::COMPATIBLE
+    }
+
+    unsafe fn init(&self) -> Result<(), &'static str> {
+        self.inner.lock(|inner| inner.init());
+
+        Ok(())
+    }
+
+    fn register_and_enable_irq_handler(
+        &'static self,
+        irq_number: &Self::IRQNumberType,
+    ) -> Result<(), &'static str> {
+        use exception::asynchronous::{irq_manager, IRQHandlerDescriptor};
+
+        let descriptor = IRQHandlerDescriptor::new(*irq_number, Self::COMPATIBLE, self);
+
+        irq_manager().register_handler(descriptor)?;
+        irq_manager().enable(irq_number);
+
+        Ok(())
+    }
+}
+
+impl console::interface::Write for PL011Uart {
+    /// Passthrough of `args` to the `core::fmt::Write` implementation, but guarded by a Mutex to
+    /// serialize access.
+    fn write_char(&self, c: char) {
+        self.inner.lock(|inner| inner.write_char(c));
+    }
+
+    fn write_array(&self, a: &[char]) {
+        self.inner.lock(|inner| inner.write_array(a));
+    }
+
+    fn write_fmt(&self, args: core::fmt::Arguments) -> fmt::Result {
+        // Fully qualified syntax for the call to `core::fmt::Write::write_fmt()` to increase
+        // readability.
+        self.inner.lock(|inner| fmt::Write::write_fmt(inner, args))
+    }
+
+    fn flush(&self) {
+        // Spin until TX FIFO empty is set.
+        self.inner.lock(|inner| inner.flush());
+    }
+}
+
+impl console::interface::Read for PL011Uart {
+    fn read_char(&self) -> char {
+        self.inner
+            .lock(|inner| inner.read_char_converting(BlockingMode::Blocking).unwrap())
+    }
+
+    fn clear_rx(&self) {
+        // Read from the RX FIFO until it is indicating empty.
+        while self
+            .inner
+            .lock(|inner| inner.read_char_converting(BlockingMode::NonBlocking))
+            .is_some()
+        {}
+    }
+}
+
+impl console::interface::Statistics for PL011Uart {
+    fn chars_written(&self) -> usize {
+        self.inner.lock(|inner| inner.chars_written)
+    }
+
+    fn chars_read(&self) -> usize {
+        self.inner.lock(|inner| inner.chars_read)
+    }
+}
+
+impl console::interface::All for PL011Uart {}
+
+impl exception::asynchronous::interface::IRQHandler for PL011Uart {
+    fn handle(&self) -> Result<(), &'static str> {
+        self.inner.lock(|inner| {
+            let pending = inner.registers.MIS.extract();
+
+            // Clear all pending IRQs.
+            inner.registers.ICR.write(ICR::ALL::CLEAR);
+
+            // Check for any kind of RX interrupt.
+            if pending.matches_any(MIS::RXMIS::SET + MIS::RTMIS::SET) {
+                // Echo any received characters.
+                while let Some(c) = inner.read_char_converting(BlockingMode::NonBlocking) {
+                    inner.write_char(c)
+                }
+            }
+        });
+
+        Ok(())
+    }
+}
diff --git a/20_timer_callbacks/kernel/src/bsp/device_driver/common.rs b/20_timer_callbacks/kernel/src/bsp/device_driver/common.rs
new file mode 100644
index 000000000..ca7aeb76a
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/bsp/device_driver/common.rs
@@ -0,0 +1,65 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Common device driver code.
+
+use crate::memory::{Address, Virtual};
+use core::{fmt, marker::PhantomData, ops};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct MMIODerefWrapper<T> {
+    start_addr: Address<Virtual>,
+    phantom: PhantomData<fn() -> T>,
+}
+
+/// A wrapper type for usize with integrated range bound check.
+#[derive(Copy, Clone)]
+pub struct BoundedUsize<const MAX_INCLUSIVE: usize>(usize);
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl<T> MMIODerefWrapper<T> {
+    /// Create an instance.
+    pub const unsafe fn new(start_addr: Address<Virtual>) -> Self {
+        Self {
+            start_addr,
+            phantom: PhantomData,
+        }
+    }
+}
+
+impl<T> ops::Deref for MMIODerefWrapper<T> {
+    type Target = T;
+
+    fn deref(&self) -> &Self::Target {
+        unsafe { &*(self.start_addr.as_usize() as *const _) }
+    }
+}
+
+impl<const MAX_INCLUSIVE: usize> BoundedUsize<{ MAX_INCLUSIVE }> {
+    pub const MAX_INCLUSIVE: usize = MAX_INCLUSIVE;
+
+    /// Creates a new instance if number <= MAX_INCLUSIVE.
+    pub const fn new(number: usize) -> Self {
+        assert!(number <= MAX_INCLUSIVE);
+
+        Self(number)
+    }
+
+    /// Return the wrapped number.
+    pub const fn get(self) -> usize {
+        self.0
+    }
+}
+
+impl<const MAX_INCLUSIVE: usize> fmt::Display for BoundedUsize<{ MAX_INCLUSIVE }> {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        write!(f, "{}", self.0)
+    }
+}
diff --git a/20_timer_callbacks/kernel/src/bsp/raspberrypi.rs b/20_timer_callbacks/kernel/src/bsp/raspberrypi.rs
new file mode 100644
index 000000000..474419f4e
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/bsp/raspberrypi.rs
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Top-level BSP file for the Raspberry Pi 3 and 4.
+
+pub mod cpu;
+pub mod driver;
+pub mod exception;
+pub mod memory;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Board identification.
+pub fn board_name() -> &'static str {
+    #[cfg(feature = "bsp_rpi3")]
+    {
+        "Raspberry Pi 3"
+    }
+
+    #[cfg(feature = "bsp_rpi4")]
+    {
+        "Raspberry Pi 4"
+    }
+}
diff --git a/20_timer_callbacks/kernel/src/bsp/raspberrypi/cpu.rs b/20_timer_callbacks/kernel/src/bsp/raspberrypi/cpu.rs
new file mode 100644
index 000000000..85fb89e49
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/bsp/raspberrypi/cpu.rs
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP Processor code.
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Used by `arch` code to find the early boot core.
+#[no_mangle]
+#[link_section = ".text._start_arguments"]
+pub static BOOT_CORE_ID: u64 = 0;
diff --git a/20_timer_callbacks/kernel/src/bsp/raspberrypi/driver.rs b/20_timer_callbacks/kernel/src/bsp/raspberrypi/driver.rs
new file mode 100644
index 000000000..a23b08c07
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/bsp/raspberrypi/driver.rs
@@ -0,0 +1,193 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP driver support.
+
+use super::{exception, memory::map::mmio};
+use crate::{
+    bsp::device_driver,
+    console, driver as generic_driver,
+    exception::{self as generic_exception},
+    memory,
+    memory::mmu::MMIODescriptor,
+};
+use core::{
+    mem::MaybeUninit,
+    sync::atomic::{AtomicBool, Ordering},
+};
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static mut PL011_UART: MaybeUninit<device_driver::PL011Uart> = MaybeUninit::uninit();
+static mut GPIO: MaybeUninit<device_driver::GPIO> = MaybeUninit::uninit();
+
+#[cfg(feature = "bsp_rpi3")]
+static mut INTERRUPT_CONTROLLER: MaybeUninit<device_driver::InterruptController> =
+    MaybeUninit::uninit();
+
+#[cfg(feature = "bsp_rpi4")]
+static mut INTERRUPT_CONTROLLER: MaybeUninit<device_driver::GICv2> = MaybeUninit::uninit();
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// This must be called only after successful init of the memory subsystem.
+unsafe fn instantiate_uart() -> Result<(), &'static str> {
+    let mmio_descriptor = MMIODescriptor::new(mmio::PL011_UART_START, mmio::PL011_UART_SIZE);
+    let virt_addr =
+        memory::mmu::kernel_map_mmio(device_driver::PL011Uart::COMPATIBLE, &mmio_descriptor)?;
+
+    PL011_UART.write(device_driver::PL011Uart::new(virt_addr));
+
+    Ok(())
+}
+
+/// This must be called only after successful init of the UART driver.
+unsafe fn post_init_uart() -> Result<(), &'static str> {
+    console::register_console(PL011_UART.assume_init_ref());
+
+    Ok(())
+}
+
+/// This must be called only after successful init of the memory subsystem.
+unsafe fn instantiate_gpio() -> Result<(), &'static str> {
+    let mmio_descriptor = MMIODescriptor::new(mmio::GPIO_START, mmio::GPIO_SIZE);
+    let virt_addr =
+        memory::mmu::kernel_map_mmio(device_driver::GPIO::COMPATIBLE, &mmio_descriptor)?;
+
+    GPIO.write(device_driver::GPIO::new(virt_addr));
+
+    Ok(())
+}
+
+/// This must be called only after successful init of the GPIO driver.
+unsafe fn post_init_gpio() -> Result<(), &'static str> {
+    GPIO.assume_init_ref().map_pl011_uart();
+    Ok(())
+}
+
+/// This must be called only after successful init of the memory subsystem.
+#[cfg(feature = "bsp_rpi3")]
+unsafe fn instantiate_interrupt_controller() -> Result<(), &'static str> {
+    let local_mmio_descriptor = MMIODescriptor::new(mmio::LOCAL_IC_START, mmio::LOCAL_IC_SIZE);
+    let local_virt_addr = memory::mmu::kernel_map_mmio(
+        device_driver::InterruptController::COMPATIBLE,
+        &local_mmio_descriptor,
+    )?;
+
+    let periph_mmio_descriptor =
+        MMIODescriptor::new(mmio::PERIPHERAL_IC_START, mmio::PERIPHERAL_IC_SIZE);
+    let periph_virt_addr = memory::mmu::kernel_map_mmio(
+        device_driver::InterruptController::COMPATIBLE,
+        &periph_mmio_descriptor,
+    )?;
+
+    INTERRUPT_CONTROLLER.write(device_driver::InterruptController::new(
+        local_virt_addr,
+        periph_virt_addr,
+    ));
+
+    Ok(())
+}
+
+/// This must be called only after successful init of the memory subsystem.
+#[cfg(feature = "bsp_rpi4")]
+unsafe fn instantiate_interrupt_controller() -> Result<(), &'static str> {
+    let gicd_mmio_descriptor = MMIODescriptor::new(mmio::GICD_START, mmio::GICD_SIZE);
+    let gicd_virt_addr = memory::mmu::kernel_map_mmio("GICv2 GICD", &gicd_mmio_descriptor)?;
+
+    let gicc_mmio_descriptor = MMIODescriptor::new(mmio::GICC_START, mmio::GICC_SIZE);
+    let gicc_virt_addr = memory::mmu::kernel_map_mmio("GICV2 GICC", &gicc_mmio_descriptor)?;
+
+    INTERRUPT_CONTROLLER.write(device_driver::GICv2::new(gicd_virt_addr, gicc_virt_addr));
+
+    Ok(())
+}
+
+/// This must be called only after successful init of the interrupt controller driver.
+unsafe fn post_init_interrupt_controller() -> Result<(), &'static str> {
+    generic_exception::asynchronous::register_irq_manager(INTERRUPT_CONTROLLER.assume_init_ref());
+
+    Ok(())
+}
+
+/// Function needs to ensure that driver registration happens only after correct instantiation.
+unsafe fn driver_uart() -> Result<(), &'static str> {
+    instantiate_uart()?;
+
+    let uart_descriptor = generic_driver::DeviceDriverDescriptor::new(
+        PL011_UART.assume_init_ref(),
+        Some(post_init_uart),
+        Some(exception::asynchronous::irq_map::PL011_UART),
+    );
+    generic_driver::driver_manager().register_driver(uart_descriptor);
+
+    Ok(())
+}
+
+/// Function needs to ensure that driver registration happens only after correct instantiation.
+unsafe fn driver_gpio() -> Result<(), &'static str> {
+    instantiate_gpio()?;
+
+    let gpio_descriptor = generic_driver::DeviceDriverDescriptor::new(
+        GPIO.assume_init_ref(),
+        Some(post_init_gpio),
+        None,
+    );
+    generic_driver::driver_manager().register_driver(gpio_descriptor);
+
+    Ok(())
+}
+
+/// Function needs to ensure that driver registration happens only after correct instantiation.
+unsafe fn driver_interrupt_controller() -> Result<(), &'static str> {
+    instantiate_interrupt_controller()?;
+
+    let interrupt_controller_descriptor = generic_driver::DeviceDriverDescriptor::new(
+        INTERRUPT_CONTROLLER.assume_init_ref(),
+        Some(post_init_interrupt_controller),
+        None,
+    );
+    generic_driver::driver_manager().register_driver(interrupt_controller_descriptor);
+
+    Ok(())
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Initialize the driver subsystem.
+///
+/// # Safety
+///
+/// See child function calls.
+pub unsafe fn init() -> Result<(), &'static str> {
+    static INIT_DONE: AtomicBool = AtomicBool::new(false);
+    if INIT_DONE.load(Ordering::Relaxed) {
+        return Err("Init already done");
+    }
+
+    driver_uart()?;
+    driver_gpio()?;
+    driver_interrupt_controller()?;
+
+    INIT_DONE.store(true, Ordering::Relaxed);
+    Ok(())
+}
+
+/// Minimal code needed to bring up the console in QEMU (for testing only). This is often less steps
+/// than on real hardware due to QEMU's abstractions.
+#[cfg(feature = "test_build")]
+pub fn qemu_bring_up_console() {
+    use crate::cpu;
+
+    unsafe {
+        instantiate_uart().unwrap_or_else(|_| cpu::qemu_exit_failure());
+        console::register_console(PL011_UART.assume_init_ref());
+    };
+}
diff --git a/20_timer_callbacks/kernel/src/bsp/raspberrypi/exception.rs b/20_timer_callbacks/kernel/src/bsp/raspberrypi/exception.rs
new file mode 100644
index 000000000..aa6c5a63f
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/bsp/raspberrypi/exception.rs
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP synchronous and asynchronous exception handling.
+
+pub mod asynchronous;
diff --git a/20_timer_callbacks/kernel/src/bsp/raspberrypi/exception/asynchronous.rs b/20_timer_callbacks/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
new file mode 100644
index 000000000..a6fd27fb4
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP asynchronous exception handling.
+
+use crate::bsp;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Export for reuse in generic asynchronous.rs.
+pub use bsp::device_driver::IRQNumber;
+
+/// The IRQ map.
+#[cfg(feature = "bsp_rpi3")]
+pub mod irq_map {
+    use super::bsp::device_driver::{IRQNumber, LocalIRQ, PeripheralIRQ};
+
+    /// The non-secure physical timer IRQ number.
+    pub const ARM_NS_PHYISCAL_TIMER: IRQNumber = IRQNumber::Local(LocalIRQ::new(1));
+
+    pub(in crate::bsp) const PL011_UART: IRQNumber = IRQNumber::Peripheral(PeripheralIRQ::new(57));
+}
+
+/// The IRQ map.
+#[cfg(feature = "bsp_rpi4")]
+pub mod irq_map {
+    use super::bsp::device_driver::IRQNumber;
+
+    /// The non-secure physical timer IRQ number.
+    pub const ARM_NS_PHYISCAL_TIMER: IRQNumber = IRQNumber::new(30);
+
+    pub(in crate::bsp) const PL011_UART: IRQNumber = IRQNumber::new(153);
+}
diff --git a/20_timer_callbacks/kernel/src/bsp/raspberrypi/kernel.ld b/20_timer_callbacks/kernel/src/bsp/raspberrypi/kernel.ld
new file mode 100644
index 000000000..2408b63cd
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/bsp/raspberrypi/kernel.ld
@@ -0,0 +1,134 @@
+/* SPDX-License-Identifier: MIT OR Apache-2.0
+ *
+ * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+ */
+
+INCLUDE kernel_virt_addr_space_size.ld;
+
+PAGE_SIZE = 64K;
+PAGE_MASK = PAGE_SIZE - 1;
+
+/* The kernel's virtual address range will be:
+ *
+ * [END_ADDRESS_INCLUSIVE, START_ADDRESS]
+ * [u64::MAX             , (u64::MAX - __kernel_virt_addr_space_size) + 1]
+ */
+__kernel_virt_start_addr = ((0xffffffffffffffff - __kernel_virt_addr_space_size) + 1);
+
+__rpi_phys_dram_start_addr = 0;
+
+/* The physical address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_phys_binary_load_addr = 0x80000;
+
+
+ENTRY(__rpi_phys_binary_load_addr)
+
+/* Flags:
+ *     4 == R
+ *     5 == RX
+ *     6 == RW
+ *
+ * Segments are marked PT_LOAD below so that the ELF file provides virtual and physical addresses.
+ * It doesn't mean all of them need actually be loaded.
+ */
+PHDRS
+{
+    segment_code            PT_LOAD FLAGS(5);
+    segment_data            PT_LOAD FLAGS(6);
+    segment_heap            PT_LOAD FLAGS(6);
+    segment_boot_core_stack PT_LOAD FLAGS(6);
+}
+
+SECTIONS
+{
+    . =  __kernel_virt_start_addr;
+
+    ASSERT((. & PAGE_MASK) == 0, "Start of address space is not page aligned")
+
+    /***********************************************************************************************
+    * Code + RO Data + Global Offset Table
+    ***********************************************************************************************/
+    __code_start = .;
+    .text : AT(__rpi_phys_binary_load_addr)
+    {
+        KEEP(*(.text._start))
+        *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
+        *(.text._start_rust)      /* The Rust entry point */
+        *(.text*)                 /* Everything else */
+    } :segment_code
+
+    .rodata         : ALIGN(8) { *(.rodata*) } :segment_code
+    .kernel_symbols : ALIGN(8) {
+        __kernel_symbols_start = .;
+        . += 32 * 1024;
+    } :segment_code
+
+    . = ALIGN(PAGE_SIZE);
+    __code_end_exclusive = .;
+
+    /***********************************************************************************************
+    * Data + BSS
+    ***********************************************************************************************/
+    __data_start = .;
+    .data : { *(.data*) } :segment_data
+
+    /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
+    .bss (NOLOAD) : ALIGN(16)
+    {
+        __bss_start = .;
+        *(.bss*);
+        . = ALIGN(16);
+        __bss_end_exclusive = .;
+    } :segment_data
+
+    . = ALIGN(PAGE_SIZE);
+    __data_end_exclusive = .;
+
+    /***********************************************************************************************
+    * Heap
+    ***********************************************************************************************/
+    __heap_start = .;
+    .heap (NOLOAD) :
+    {
+        . += 16 * 1024 * 1024;
+    } :segment_heap
+    __heap_end_exclusive = .;
+
+    ASSERT((. & PAGE_MASK) == 0, "Heap is not page aligned")
+
+    /***********************************************************************************************
+    * MMIO Remap Reserved
+    ***********************************************************************************************/
+    __mmio_remap_start = .;
+    . += 8 * 1024 * 1024;
+    __mmio_remap_end_exclusive = .;
+
+    ASSERT((. & PAGE_MASK) == 0, "MMIO remap reservation is not page aligned")
+
+    /***********************************************************************************************
+    * Guard Page
+    ***********************************************************************************************/
+    . += PAGE_SIZE;
+
+    /***********************************************************************************************
+    * Boot Core Stack
+    ***********************************************************************************************/
+    .boot_core_stack (NOLOAD) : AT(__rpi_phys_dram_start_addr)
+    {
+        __boot_core_stack_start = .;         /*   ^             */
+                                             /*   | stack       */
+        . += __rpi_phys_binary_load_addr;    /*   | growth      */
+                                             /*   | direction   */
+        __boot_core_stack_end_exclusive = .; /*   |             */
+    } :segment_boot_core_stack
+
+    ASSERT((. & PAGE_MASK) == 0, "End of boot core stack is not page aligned")
+
+    /***********************************************************************************************
+    * Misc
+    ***********************************************************************************************/
+    .got : { *(.got*) }
+    ASSERT(SIZEOF(.got) == 0, "Relocation support not expected")
+
+    /DISCARD/ : { *(.comment*) }
+}
diff --git a/20_timer_callbacks/kernel/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld b/20_timer_callbacks/kernel/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
new file mode 100644
index 000000000..c5d58c30a
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/bsp/raspberrypi/kernel_virt_addr_space_size.ld
@@ -0,0 +1 @@
+__kernel_virt_addr_space_size = 1024 * 1024 * 1024
diff --git a/20_timer_callbacks/kernel/src/bsp/raspberrypi/memory.rs b/20_timer_callbacks/kernel/src/bsp/raspberrypi/memory.rs
new file mode 100644
index 000000000..d07c9695c
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/bsp/raspberrypi/memory.rs
@@ -0,0 +1,254 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP Memory Management.
+//!
+//! The physical memory layout.
+//!
+//! The Raspberry's firmware copies the kernel binary to 0x8_0000. The preceding region will be used
+//! as the boot core's stack.
+//!
+//! +---------------------------------------+
+//! |                                       | boot_core_stack_start @ 0x0
+//! |                                       |                                ^
+//! | Boot-core Stack                       |                                | stack
+//! |                                       |                                | growth
+//! |                                       |                                | direction
+//! +---------------------------------------+
+//! |                                       | code_start @ 0x8_0000 == boot_core_stack_end_exclusive
+//! | .text                                 |
+//! | .rodata                               |
+//! | .got                                  |
+//! | .kernel_symbols                       |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       | data_start == code_end_exclusive
+//! | .data                                 |
+//! | .bss                                  |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       | heap_start == data_end_exclusive
+//! | .heap                                 |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       | heap_end_exclusive
+//! |                                       |
+//!
+//!
+//!
+//!
+//!
+//! The virtual memory layout is as follows:
+//!
+//! +---------------------------------------+
+//! |                                       | code_start @ __kernel_virt_start_addr
+//! | .text                                 |
+//! | .rodata                               |
+//! | .got                                  |
+//! | .kernel_symbols                       |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       | data_start == code_end_exclusive
+//! | .data                                 |
+//! | .bss                                  |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       | heap_start == data_end_exclusive
+//! | .heap                                 |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       |  mmio_remap_start == heap_end_exclusive
+//! | VA region for MMIO remapping          |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       |  mmio_remap_end_exclusive
+//! | Unmapped guard page                   |
+//! |                                       |
+//! +---------------------------------------+
+//! |                                       | boot_core_stack_start
+//! |                                       |                                ^
+//! | Boot-core Stack                       |                                | stack
+//! |                                       |                                | growth
+//! |                                       |                                | direction
+//! +---------------------------------------+
+//! |                                       | boot_core_stack_end_exclusive
+//! |                                       |
+pub mod mmu;
+
+use crate::memory::{mmu::PageAddress, Address, Physical, Virtual};
+use core::cell::UnsafeCell;
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+// Symbols from the linker script.
+extern "Rust" {
+    static __code_start: UnsafeCell<()>;
+    static __code_end_exclusive: UnsafeCell<()>;
+
+    static __data_start: UnsafeCell<()>;
+    static __data_end_exclusive: UnsafeCell<()>;
+
+    static __heap_start: UnsafeCell<()>;
+    static __heap_end_exclusive: UnsafeCell<()>;
+
+    static __mmio_remap_start: UnsafeCell<()>;
+    static __mmio_remap_end_exclusive: UnsafeCell<()>;
+
+    static __boot_core_stack_start: UnsafeCell<()>;
+    static __boot_core_stack_end_exclusive: UnsafeCell<()>;
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// The board's physical memory map.
+#[rustfmt::skip]
+pub(super) mod map {
+    use super::*;
+
+    /// Physical devices.
+    #[cfg(feature = "bsp_rpi3")]
+    pub mod mmio {
+        use super::*;
+
+        pub const PERIPHERAL_IC_START: Address<Physical> = Address::new(0x3F00_B200);
+        pub const PERIPHERAL_IC_SIZE:  usize             =              0x24;
+
+        pub const GPIO_START:          Address<Physical> = Address::new(0x3F20_0000);
+        pub const GPIO_SIZE:           usize             =              0xA0;
+
+        pub const PL011_UART_START:    Address<Physical> = Address::new(0x3F20_1000);
+        pub const PL011_UART_SIZE:     usize             =              0x48;
+
+        pub const LOCAL_IC_START:      Address<Physical> = Address::new(0x4000_0000);
+        pub const LOCAL_IC_SIZE:       usize             =              0x100;
+
+        pub const END:                 Address<Physical> = Address::new(0x4001_0000);
+    }
+
+    /// Physical devices.
+    #[cfg(feature = "bsp_rpi4")]
+    pub mod mmio {
+        use super::*;
+
+        pub const GPIO_START:       Address<Physical> = Address::new(0xFE20_0000);
+        pub const GPIO_SIZE:        usize             =              0xA0;
+
+        pub const PL011_UART_START: Address<Physical> = Address::new(0xFE20_1000);
+        pub const PL011_UART_SIZE:  usize             =              0x48;
+
+        pub const GICD_START:       Address<Physical> = Address::new(0xFF84_1000);
+        pub const GICD_SIZE:        usize             =              0x824;
+
+        pub const GICC_START:       Address<Physical> = Address::new(0xFF84_2000);
+        pub const GICC_SIZE:        usize             =              0x14;
+
+        pub const END:              Address<Physical> = Address::new(0xFF85_0000);
+    }
+
+    pub const END: Address<Physical> = mmio::END;
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// Start page address of the code segment.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn virt_code_start() -> PageAddress<Virtual> {
+    PageAddress::from(unsafe { __code_start.get() as usize })
+}
+
+/// Size of the code segment.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn code_size() -> usize {
+    unsafe { (__code_end_exclusive.get() as usize) - (__code_start.get() as usize) }
+}
+
+/// Start page address of the data segment.
+#[inline(always)]
+fn virt_data_start() -> PageAddress<Virtual> {
+    PageAddress::from(unsafe { __data_start.get() as usize })
+}
+
+/// Size of the data segment.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn data_size() -> usize {
+    unsafe { (__data_end_exclusive.get() as usize) - (__data_start.get() as usize) }
+}
+
+/// Start page address of the heap segment.
+#[inline(always)]
+fn virt_heap_start() -> PageAddress<Virtual> {
+    PageAddress::from(unsafe { __heap_start.get() as usize })
+}
+
+/// Size of the heap segment.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn heap_size() -> usize {
+    unsafe { (__heap_end_exclusive.get() as usize) - (__heap_start.get() as usize) }
+}
+
+/// Start page address of the MMIO remap reservation.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn virt_mmio_remap_start() -> PageAddress<Virtual> {
+    PageAddress::from(unsafe { __mmio_remap_start.get() as usize })
+}
+
+/// Size of the MMIO remap reservation.
+///
+/// # Safety
+///
+/// - Value is provided by the linker script and must be trusted as-is.
+#[inline(always)]
+fn mmio_remap_size() -> usize {
+    unsafe { (__mmio_remap_end_exclusive.get() as usize) - (__mmio_remap_start.get() as usize) }
+}
+
+/// Start page address of the boot core's stack.
+#[inline(always)]
+fn virt_boot_core_stack_start() -> PageAddress<Virtual> {
+    PageAddress::from(unsafe { __boot_core_stack_start.get() as usize })
+}
+
+/// Size of the boot core's stack.
+#[inline(always)]
+fn boot_core_stack_size() -> usize {
+    unsafe {
+        (__boot_core_stack_end_exclusive.get() as usize) - (__boot_core_stack_start.get() as usize)
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Exclusive end address of the physical address space.
+#[inline(always)]
+pub fn phys_addr_space_end_exclusive_addr() -> PageAddress<Physical> {
+    PageAddress::from(map::END)
+}
diff --git a/20_timer_callbacks/kernel/src/bsp/raspberrypi/memory/mmu.rs b/20_timer_callbacks/kernel/src/bsp/raspberrypi/memory/mmu.rs
new file mode 100644
index 000000000..bb2f82083
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/bsp/raspberrypi/memory/mmu.rs
@@ -0,0 +1,197 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! BSP Memory Management Unit.
+
+use crate::{
+    memory::{
+        mmu::{
+            self as generic_mmu, AddressSpace, AssociatedTranslationTable, AttributeFields,
+            MemoryRegion, PageAddress, TranslationGranule,
+        },
+        Physical, Virtual,
+    },
+    synchronization::InitStateLock,
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+type KernelTranslationTable =
+    <KernelVirtAddrSpace as AssociatedTranslationTable>::TableStartFromTop;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// The translation granule chosen by this BSP. This will be used everywhere else in the kernel to
+/// derive respective data structures and their sizes. For example, the `crate::memory::mmu::Page`.
+pub type KernelGranule = TranslationGranule<{ 64 * 1024 }>;
+
+/// The kernel's virtual address space defined by this BSP.
+pub type KernelVirtAddrSpace = AddressSpace<{ kernel_virt_addr_space_size() }>;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+/// The kernel translation tables.
+///
+/// It is mandatory that InitStateLock is transparent.
+///
+/// That is, `size_of(InitStateLock<KernelTranslationTable>) == size_of(KernelTranslationTable)`.
+/// There is a unit tests that checks this porperty.
+#[link_section = ".data"]
+#[no_mangle]
+static KERNEL_TABLES: InitStateLock<KernelTranslationTable> =
+    InitStateLock::new(KernelTranslationTable::new_for_precompute());
+
+/// This value is needed during early boot for MMU setup.
+///
+/// This will be patched to the correct value by the "translation table tool" after linking. This
+/// given value here is just a dummy.
+#[link_section = ".text._start_arguments"]
+#[no_mangle]
+static PHYS_KERNEL_TABLES_BASE_ADDR: u64 = 0xCCCCAAAAFFFFEEEE;
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// This is a hack for retrieving the value for the kernel's virtual address space size as a
+/// constant from a common place, since it is needed as a compile-time/link-time constant in both,
+/// the linker script and the Rust sources.
+#[allow(clippy::needless_late_init)]
+const fn kernel_virt_addr_space_size() -> usize {
+    let __kernel_virt_addr_space_size;
+
+    include!("../kernel_virt_addr_space_size.ld");
+
+    __kernel_virt_addr_space_size
+}
+
+/// Helper function for calculating the number of pages the given parameter spans.
+const fn size_to_num_pages(size: usize) -> usize {
+    assert!(size > 0);
+    assert!(size % KernelGranule::SIZE == 0);
+
+    size >> KernelGranule::SHIFT
+}
+
+/// The data pages of the kernel binary.
+fn virt_data_region() -> MemoryRegion<Virtual> {
+    let num_pages = size_to_num_pages(super::data_size());
+
+    let start_page_addr = super::virt_data_start();
+    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
+
+    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
+}
+
+// There is no reason to expect the following conversions to fail, since they were generated offline
+// by the `translation table tool`. If it doesn't work, a panic due to the unwraps is justified.
+fn kernel_virt_to_phys_region(virt_region: MemoryRegion<Virtual>) -> MemoryRegion<Physical> {
+    let phys_start_page_addr =
+        generic_mmu::try_kernel_virt_page_addr_to_phys_page_addr(virt_region.start_page_addr())
+            .unwrap();
+
+    let phys_end_exclusive_page_addr = phys_start_page_addr
+        .checked_offset(virt_region.num_pages() as isize)
+        .unwrap();
+
+    MemoryRegion::new(phys_start_page_addr, phys_end_exclusive_page_addr)
+}
+
+fn kernel_page_attributes(virt_page_addr: PageAddress<Virtual>) -> AttributeFields {
+    generic_mmu::try_kernel_page_attributes(virt_page_addr).unwrap()
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// The code pages of the kernel binary.
+pub fn virt_code_region() -> MemoryRegion<Virtual> {
+    let num_pages = size_to_num_pages(super::code_size());
+
+    let start_page_addr = super::virt_code_start();
+    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
+
+    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
+}
+
+/// The heap pages.
+pub fn virt_heap_region() -> MemoryRegion<Virtual> {
+    let num_pages = size_to_num_pages(super::heap_size());
+
+    let start_page_addr = super::virt_heap_start();
+    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
+
+    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
+}
+
+/// The boot core stack pages.
+pub fn virt_boot_core_stack_region() -> MemoryRegion<Virtual> {
+    let num_pages = size_to_num_pages(super::boot_core_stack_size());
+
+    let start_page_addr = super::virt_boot_core_stack_start();
+    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
+
+    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
+}
+
+/// Return a reference to the kernel's translation tables.
+pub fn kernel_translation_tables() -> &'static InitStateLock<KernelTranslationTable> {
+    &KERNEL_TABLES
+}
+
+/// The MMIO remap pages.
+pub fn virt_mmio_remap_region() -> MemoryRegion<Virtual> {
+    let num_pages = size_to_num_pages(super::mmio_remap_size());
+
+    let start_page_addr = super::virt_mmio_remap_start();
+    let end_exclusive_page_addr = start_page_addr.checked_offset(num_pages as isize).unwrap();
+
+    MemoryRegion::new(start_page_addr, end_exclusive_page_addr)
+}
+
+/// Add mapping records for the kernel binary.
+///
+/// The actual translation table entries for the kernel binary are generated using the offline
+/// `translation table tool` and patched into the kernel binary. This function just adds the mapping
+/// record entries.
+pub fn kernel_add_mapping_records_for_precomputed() {
+    let virt_code_region = virt_code_region();
+    generic_mmu::kernel_add_mapping_record(
+        "Kernel code and RO data",
+        &virt_code_region,
+        &kernel_virt_to_phys_region(virt_code_region),
+        &kernel_page_attributes(virt_code_region.start_page_addr()),
+    );
+
+    let virt_data_region = virt_data_region();
+    generic_mmu::kernel_add_mapping_record(
+        "Kernel data and bss",
+        &virt_data_region,
+        &kernel_virt_to_phys_region(virt_data_region),
+        &kernel_page_attributes(virt_data_region.start_page_addr()),
+    );
+
+    let virt_heap_region = virt_heap_region();
+    generic_mmu::kernel_add_mapping_record(
+        "Kernel heap",
+        &virt_heap_region,
+        &kernel_virt_to_phys_region(virt_heap_region),
+        &kernel_page_attributes(virt_heap_region.start_page_addr()),
+    );
+
+    let virt_boot_core_stack_region = virt_boot_core_stack_region();
+    generic_mmu::kernel_add_mapping_record(
+        "Kernel boot-core stack",
+        &virt_boot_core_stack_region,
+        &kernel_virt_to_phys_region(virt_boot_core_stack_region),
+        &kernel_page_attributes(virt_boot_core_stack_region.start_page_addr()),
+    );
+}
diff --git a/20_timer_callbacks/kernel/src/common.rs b/20_timer_callbacks/kernel/src/common.rs
new file mode 100644
index 000000000..f32f650fb
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/common.rs
@@ -0,0 +1,46 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! General purpose code.
+
+/// Check if a value is aligned to a given size.
+#[inline(always)]
+pub const fn is_aligned(value: usize, alignment: usize) -> bool {
+    assert!(alignment.is_power_of_two());
+
+    (value & (alignment - 1)) == 0
+}
+
+/// Align down.
+#[inline(always)]
+pub const fn align_down(value: usize, alignment: usize) -> usize {
+    assert!(alignment.is_power_of_two());
+
+    value & !(alignment - 1)
+}
+
+/// Align up.
+#[inline(always)]
+pub const fn align_up(value: usize, alignment: usize) -> usize {
+    assert!(alignment.is_power_of_two());
+
+    (value + alignment - 1) & !(alignment - 1)
+}
+
+/// Convert a size into human readable format.
+pub const fn size_human_readable_ceil(size: usize) -> (usize, &'static str) {
+    const KIB: usize = 1024;
+    const MIB: usize = 1024 * 1024;
+    const GIB: usize = 1024 * 1024 * 1024;
+
+    if (size / GIB) > 0 {
+        (size.div_ceil(GIB), "GiB")
+    } else if (size / MIB) > 0 {
+        (size.div_ceil(MIB), "MiB")
+    } else if (size / KIB) > 0 {
+        (size.div_ceil(KIB), "KiB")
+    } else {
+        (size, "Byte")
+    }
+}
diff --git a/20_timer_callbacks/kernel/src/console.rs b/20_timer_callbacks/kernel/src/console.rs
new file mode 100644
index 000000000..ff1d8ddc3
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/console.rs
@@ -0,0 +1,93 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! System console.
+
+mod buffer_console;
+
+use crate::synchronization;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Console interfaces.
+pub mod interface {
+    use core::fmt;
+
+    /// Console write functions.
+    pub trait Write {
+        /// Write a single character.
+        fn write_char(&self, c: char);
+
+        /// Write a slice of characters.
+        fn write_array(&self, a: &[char]);
+
+        /// Write a Rust format string.
+        fn write_fmt(&self, args: fmt::Arguments) -> fmt::Result;
+
+        /// Block until the last buffered character has been physically put on the TX wire.
+        fn flush(&self);
+    }
+
+    /// Console read functions.
+    pub trait Read {
+        /// Read a single character.
+        fn read_char(&self) -> char {
+            ' '
+        }
+
+        /// Clear RX buffers, if any.
+        fn clear_rx(&self);
+    }
+
+    /// Console statistics.
+    pub trait Statistics {
+        /// Return the number of characters written.
+        fn chars_written(&self) -> usize {
+            0
+        }
+
+        /// Return the number of characters read.
+        fn chars_read(&self) -> usize {
+            0
+        }
+    }
+
+    /// Trait alias for a full-fledged console.
+    pub trait All: Write + Read + Statistics {}
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static CUR_CONSOLE: InitStateLock<&'static (dyn interface::All + Sync)> =
+    InitStateLock::new(&buffer_console::BUFFER_CONSOLE);
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+use synchronization::{interface::ReadWriteEx, InitStateLock};
+
+/// Register a new console.
+pub fn register_console(new_console: &'static (dyn interface::All + Sync)) {
+    CUR_CONSOLE.write(|con| *con = new_console);
+
+    static FIRST_SWITCH: InitStateLock<bool> = InitStateLock::new(true);
+    FIRST_SWITCH.write(|first| {
+        if *first {
+            *first = false;
+
+            buffer_console::BUFFER_CONSOLE.dump();
+        }
+    });
+}
+
+/// Return a reference to the currently registered console.
+///
+/// This is the global console used by all printing macros.
+pub fn console() -> &'static dyn interface::All {
+    CUR_CONSOLE.read(|con| *con)
+}
diff --git a/20_timer_callbacks/kernel/src/console/buffer_console.rs b/20_timer_callbacks/kernel/src/console/buffer_console.rs
new file mode 100644
index 000000000..c3259f898
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/console/buffer_console.rs
@@ -0,0 +1,108 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! A console that buffers input during the init phase.
+
+use super::interface;
+use crate::{console, info, synchronization, synchronization::InitStateLock};
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+const BUF_SIZE: usize = 1024 * 64;
+
+pub struct BufferConsoleInner {
+    buf: [char; BUF_SIZE],
+    write_ptr: usize,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct BufferConsole {
+    inner: InitStateLock<BufferConsoleInner>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+pub static BUFFER_CONSOLE: BufferConsole = BufferConsole {
+    inner: InitStateLock::new(BufferConsoleInner {
+        // Use the null character, so this lands in .bss and does not waste space in the binary.
+        buf: ['\0'; BUF_SIZE],
+        write_ptr: 0,
+    }),
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl BufferConsoleInner {
+    fn write_char(&mut self, c: char) {
+        if self.write_ptr < (BUF_SIZE - 1) {
+            self.buf[self.write_ptr] = c;
+            self.write_ptr += 1;
+        }
+    }
+}
+
+impl fmt::Write for BufferConsoleInner {
+    fn write_str(&mut self, s: &str) -> fmt::Result {
+        for c in s.chars() {
+            self.write_char(c);
+        }
+
+        Ok(())
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+use synchronization::interface::ReadWriteEx;
+
+impl BufferConsole {
+    /// Dump the buffer.
+    ///
+    /// # Invariant
+    ///
+    /// It is expected that this is only called when self != crate::console::console().
+    pub fn dump(&self) {
+        self.inner.read(|inner| {
+            console::console().write_array(&inner.buf[0..inner.write_ptr]);
+
+            if inner.write_ptr == (BUF_SIZE - 1) {
+                info!("Pre-UART buffer overflowed");
+            } else if inner.write_ptr > 0 {
+                info!("End of pre-UART buffer")
+            }
+        });
+    }
+}
+
+impl interface::Write for BufferConsole {
+    fn write_char(&self, c: char) {
+        self.inner.write(|inner| inner.write_char(c));
+    }
+
+    fn write_array(&self, _a: &[char]) {}
+
+    fn write_fmt(&self, args: fmt::Arguments) -> fmt::Result {
+        self.inner.write(|inner| fmt::Write::write_fmt(inner, args))
+    }
+
+    fn flush(&self) {}
+}
+
+impl interface::Read for BufferConsole {
+    fn clear_rx(&self) {}
+}
+
+impl interface::Statistics for BufferConsole {}
+impl interface::All for BufferConsole {}
diff --git a/20_timer_callbacks/kernel/src/cpu.rs b/20_timer_callbacks/kernel/src/cpu.rs
new file mode 100644
index 000000000..e1493d1dd
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/cpu.rs
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Processor code.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "_arch/aarch64/cpu.rs"]
+mod arch_cpu;
+
+mod boot;
+
+pub mod smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_cpu::{nop, wait_forever};
+
+#[cfg(feature = "test_build")]
+pub use arch_cpu::{qemu_exit_failure, qemu_exit_success};
diff --git a/20_timer_callbacks/kernel/src/cpu/boot.rs b/20_timer_callbacks/kernel/src/cpu/boot.rs
new file mode 100644
index 000000000..8091dac36
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/cpu/boot.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Boot code.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/cpu/boot.rs"]
+mod arch_boot;
diff --git a/20_timer_callbacks/kernel/src/cpu/smp.rs b/20_timer_callbacks/kernel/src/cpu/smp.rs
new file mode 100644
index 000000000..57386f79b
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/cpu/smp.rs
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Symmetric multiprocessing.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/cpu/smp.rs"]
+mod arch_smp;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_smp::core_id;
diff --git a/20_timer_callbacks/kernel/src/driver.rs b/20_timer_callbacks/kernel/src/driver.rs
new file mode 100644
index 000000000..2f22fd205
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/driver.rs
@@ -0,0 +1,178 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Driver support.
+
+use crate::{
+    exception, info,
+    synchronization::{interface::ReadWriteEx, InitStateLock},
+};
+use alloc::vec::Vec;
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Driver interfaces.
+pub mod interface {
+    /// Device Driver functions.
+    pub trait DeviceDriver {
+        /// Different interrupt controllers might use different types for IRQ number.
+        type IRQNumberType: super::fmt::Display;
+
+        /// Return a compatibility string for identifying the driver.
+        fn compatible(&self) -> &'static str;
+
+        /// Called by the kernel to bring up the device.
+        ///
+        /// # Safety
+        ///
+        /// - During init, drivers might do stuff with system-wide impact.
+        unsafe fn init(&self) -> Result<(), &'static str> {
+            Ok(())
+        }
+
+        /// Called by the kernel to register and enable the device's IRQ handler.
+        ///
+        /// Rust's type system will prevent a call to this function unless the calling instance
+        /// itself has static lifetime.
+        fn register_and_enable_irq_handler(
+            &'static self,
+            irq_number: &Self::IRQNumberType,
+        ) -> Result<(), &'static str> {
+            panic!(
+                "Attempt to enable IRQ {} for device {}, but driver does not support this",
+                irq_number,
+                self.compatible()
+            )
+        }
+    }
+}
+
+/// Tpye to be used as an optional callback after a driver's init() has run.
+pub type DeviceDriverPostInitCallback = unsafe fn() -> Result<(), &'static str>;
+
+/// A descriptor for device drivers.
+pub struct DeviceDriverDescriptor<T>
+where
+    T: 'static,
+{
+    device_driver: &'static (dyn interface::DeviceDriver<IRQNumberType = T> + Sync),
+    post_init_callback: Option<DeviceDriverPostInitCallback>,
+    irq_number: Option<T>,
+}
+
+/// Provides device driver management functions.
+pub struct DriverManager<T>
+where
+    T: 'static,
+{
+    descriptors: InitStateLock<Vec<DeviceDriverDescriptor<T>>>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static DRIVER_MANAGER: DriverManager<exception::asynchronous::IRQNumber> = DriverManager::new();
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl<T> DeviceDriverDescriptor<T> {
+    /// Create an instance.
+    pub fn new(
+        device_driver: &'static (dyn interface::DeviceDriver<IRQNumberType = T> + Sync),
+        post_init_callback: Option<DeviceDriverPostInitCallback>,
+        irq_number: Option<T>,
+    ) -> Self {
+        Self {
+            device_driver,
+            post_init_callback,
+            irq_number,
+        }
+    }
+}
+
+/// Return a reference to the global DriverManager.
+pub fn driver_manager() -> &'static DriverManager<exception::asynchronous::IRQNumber> {
+    &DRIVER_MANAGER
+}
+
+impl<T> DriverManager<T>
+where
+    T: fmt::Display,
+{
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self {
+            descriptors: InitStateLock::new(Vec::new()),
+        }
+    }
+
+    /// Register a device driver with the kernel.
+    pub fn register_driver(&self, descriptor: DeviceDriverDescriptor<T>) {
+        self.descriptors
+            .write(|descriptors| descriptors.push(descriptor));
+    }
+
+    /// Fully initialize all drivers and their interrupts handlers.
+    ///
+    /// # Safety
+    ///
+    /// - During init, drivers might do stuff with system-wide impact.
+    pub unsafe fn init_drivers_and_irqs(&self) {
+        self.descriptors.read(|descriptors| {
+            for descriptor in descriptors {
+                // 1. Initialize driver.
+                if let Err(x) = descriptor.device_driver.init() {
+                    panic!(
+                        "Error initializing driver: {}: {}",
+                        descriptor.device_driver.compatible(),
+                        x
+                    );
+                }
+
+                // 2. Call corresponding post init callback.
+                if let Some(callback) = &descriptor.post_init_callback {
+                    if let Err(x) = callback() {
+                        panic!(
+                            "Error during driver post-init callback: {}: {}",
+                            descriptor.device_driver.compatible(),
+                            x
+                        );
+                    }
+                }
+            }
+
+            // 3. After all post-init callbacks were done, the interrupt controller should be
+            //    registered and functional. So let drivers register with it now.
+            for descriptor in descriptors {
+                if let Some(irq_number) = &descriptor.irq_number {
+                    if let Err(x) = descriptor
+                        .device_driver
+                        .register_and_enable_irq_handler(irq_number)
+                    {
+                        panic!(
+                            "Error during driver interrupt handler registration: {}: {}",
+                            descriptor.device_driver.compatible(),
+                            x
+                        );
+                    }
+                }
+            }
+        })
+    }
+
+    /// Enumerate all registered device drivers.
+    pub fn enumerate(&self) {
+        self.descriptors.read(|descriptors| {
+            for (i, desc) in descriptors.iter().enumerate() {
+                info!("      {}. {}", i + 1, desc.device_driver.compatible());
+            }
+        });
+    }
+}
diff --git a/20_timer_callbacks/kernel/src/exception.rs b/20_timer_callbacks/kernel/src/exception.rs
new file mode 100644
index 000000000..7ea7cd806
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/exception.rs
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Synchronous and asynchronous exception handling.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "_arch/aarch64/exception.rs"]
+mod arch_exception;
+
+pub mod asynchronous;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_exception::{current_privilege_level, handling_init};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Kernel privilege levels.
+#[allow(missing_docs)]
+#[derive(Eq, PartialEq)]
+pub enum PrivilegeLevel {
+    User,
+    Kernel,
+    Hypervisor,
+    Unknown,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// Libkernel unit tests must execute in kernel mode.
+    #[kernel_test]
+    fn test_runner_executes_in_kernel_mode() {
+        let (level, _) = current_privilege_level();
+
+        assert!(level == PrivilegeLevel::Kernel)
+    }
+}
diff --git a/20_timer_callbacks/kernel/src/exception/asynchronous.rs b/20_timer_callbacks/kernel/src/exception/asynchronous.rs
new file mode 100644
index 000000000..c1f2a27b3
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/exception/asynchronous.rs
@@ -0,0 +1,190 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Asynchronous exception handling.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/exception/asynchronous.rs"]
+mod arch_asynchronous;
+mod null_irq_manager;
+
+use crate::{bsp, synchronization};
+use core::marker::PhantomData;
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+pub use arch_asynchronous::{
+    is_local_irq_masked, local_irq_mask, local_irq_mask_save, local_irq_restore, local_irq_unmask,
+    print_state,
+};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Interrupt number as defined by the BSP.
+pub type IRQNumber = bsp::exception::asynchronous::IRQNumber;
+
+/// Interrupt descriptor.
+#[derive(Copy, Clone)]
+pub struct IRQHandlerDescriptor<T>
+where
+    T: Copy,
+{
+    /// The IRQ number.
+    number: T,
+
+    /// Descriptive name.
+    name: &'static str,
+
+    /// Reference to handler trait object.
+    handler: &'static (dyn interface::IRQHandler + Sync),
+}
+
+/// IRQContext token.
+///
+/// An instance of this type indicates that the local core is currently executing in IRQ
+/// context, aka executing an interrupt vector or subcalls of it.
+///
+/// Concept and implementation derived from the `CriticalSection` introduced in
+/// <https://github.com/rust-embedded/bare-metal>
+#[derive(Clone, Copy)]
+pub struct IRQContext<'irq_context> {
+    _0: PhantomData<&'irq_context ()>,
+}
+
+/// Asynchronous exception handling interfaces.
+pub mod interface {
+
+    /// Implemented by types that handle IRQs.
+    pub trait IRQHandler {
+        /// Called when the corresponding interrupt is asserted.
+        fn handle(&self) -> Result<(), &'static str>;
+    }
+
+    /// IRQ management functions.
+    ///
+    /// The `BSP` is supposed to supply one global instance. Typically implemented by the
+    /// platform's interrupt controller.
+    pub trait IRQManager {
+        /// The IRQ number type depends on the implementation.
+        type IRQNumberType: Copy;
+
+        /// Register a handler.
+        fn register_handler(
+            &self,
+            irq_handler_descriptor: super::IRQHandlerDescriptor<Self::IRQNumberType>,
+        ) -> Result<(), &'static str>;
+
+        /// Enable an interrupt in the controller.
+        fn enable(&self, irq_number: &Self::IRQNumberType);
+
+        /// Handle pending interrupts.
+        ///
+        /// This function is called directly from the CPU's IRQ exception vector. On AArch64,
+        /// this means that the respective CPU core has disabled exception handling.
+        /// This function can therefore not be preempted and runs start to finish.
+        ///
+        /// Takes an IRQContext token to ensure it can only be called from IRQ context.
+        #[allow(clippy::trivially_copy_pass_by_ref)]
+        fn handle_pending_irqs<'irq_context>(
+            &'irq_context self,
+            ic: &super::IRQContext<'irq_context>,
+        );
+
+        /// Print list of registered handlers.
+        fn print_handler(&self) {}
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static CUR_IRQ_MANAGER: InitStateLock<
+    &'static (dyn interface::IRQManager<IRQNumberType = IRQNumber> + Sync),
+> = InitStateLock::new(&null_irq_manager::NULL_IRQ_MANAGER);
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+use synchronization::{interface::ReadWriteEx, InitStateLock};
+
+impl<T> IRQHandlerDescriptor<T>
+where
+    T: Copy,
+{
+    /// Create an instance.
+    pub const fn new(
+        number: T,
+        name: &'static str,
+        handler: &'static (dyn interface::IRQHandler + Sync),
+    ) -> Self {
+        Self {
+            number,
+            name,
+            handler,
+        }
+    }
+
+    /// Return the number.
+    pub const fn number(&self) -> T {
+        self.number
+    }
+
+    /// Return the name.
+    pub const fn name(&self) -> &'static str {
+        self.name
+    }
+
+    /// Return the handler.
+    pub const fn handler(&self) -> &'static (dyn interface::IRQHandler + Sync) {
+        self.handler
+    }
+}
+
+impl<'irq_context> IRQContext<'irq_context> {
+    /// Creates an IRQContext token.
+    ///
+    /// # Safety
+    ///
+    /// - This must only be called when the current core is in an interrupt context and will not
+    ///   live beyond the end of it. That is, creation is allowed in interrupt vector functions. For
+    ///   example, in the ARMv8-A case, in `extern "C" fn current_elx_irq()`.
+    /// - Note that the lifetime `'irq_context` of the returned instance is unconstrained. User code
+    ///   must not be able to influence the lifetime picked for this type, since that might cause it
+    ///   to be inferred to `'static`.
+    #[inline(always)]
+    pub unsafe fn new() -> Self {
+        IRQContext { _0: PhantomData }
+    }
+}
+
+/// Executes the provided closure while IRQs are masked on the executing core.
+///
+/// While the function temporarily changes the HW state of the executing core, it restores it to the
+/// previous state before returning, so this is deemed safe.
+#[inline(always)]
+pub fn exec_with_irq_masked<T>(f: impl FnOnce() -> T) -> T {
+    let saved = local_irq_mask_save();
+    let ret = f();
+    local_irq_restore(saved);
+
+    ret
+}
+
+/// Register a new IRQ manager.
+pub fn register_irq_manager(
+    new_manager: &'static (dyn interface::IRQManager<IRQNumberType = IRQNumber> + Sync),
+) {
+    CUR_IRQ_MANAGER.write(|manager| *manager = new_manager);
+}
+
+/// Return a reference to the currently registered IRQ manager.
+///
+/// This is the IRQ manager used by the architectural interrupt handling code.
+pub fn irq_manager() -> &'static dyn interface::IRQManager<IRQNumberType = IRQNumber> {
+    CUR_IRQ_MANAGER.read(|manager| *manager)
+}
diff --git a/20_timer_callbacks/kernel/src/exception/asynchronous/null_irq_manager.rs b/20_timer_callbacks/kernel/src/exception/asynchronous/null_irq_manager.rs
new file mode 100644
index 000000000..438f96496
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/exception/asynchronous/null_irq_manager.rs
@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Null IRQ Manager.
+
+use super::{interface, IRQContext, IRQHandlerDescriptor};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+pub struct NullIRQManager;
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+pub static NULL_IRQ_MANAGER: NullIRQManager = NullIRQManager {};
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl interface::IRQManager for NullIRQManager {
+    type IRQNumberType = super::IRQNumber;
+
+    fn register_handler(
+        &self,
+        _descriptor: IRQHandlerDescriptor<Self::IRQNumberType>,
+    ) -> Result<(), &'static str> {
+        panic!("No IRQ Manager registered yet");
+    }
+
+    fn enable(&self, _irq_number: &Self::IRQNumberType) {
+        panic!("No IRQ Manager registered yet");
+    }
+
+    fn handle_pending_irqs<'irq_context>(&'irq_context self, _ic: &IRQContext<'irq_context>) {
+        panic!("No IRQ Manager registered yet");
+    }
+}
diff --git a/20_timer_callbacks/kernel/src/lib.rs b/20_timer_callbacks/kernel/src/lib.rs
new file mode 100644
index 000000000..bba0fcc7d
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/lib.rs
@@ -0,0 +1,196 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+// Rust embedded logo for `make doc`.
+#![doc(
+    html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png"
+)]
+
+//! The `kernel` library.
+//!
+//! Used to compose the final kernel binary.
+//!
+//! # Code organization and architecture
+//!
+//! The code is divided into different *modules*, each representing a typical **subsystem** of the
+//! `kernel`. Top-level module files of subsystems reside directly in the `src` folder. For example,
+//! `src/memory.rs` contains code that is concerned with all things memory management.
+//!
+//! ## Visibility of processor architecture code
+//!
+//! Some of the `kernel`'s subsystems depend on low-level code that is specific to the target
+//! processor architecture. For each supported processor architecture, there exists a subfolder in
+//! `src/_arch`, for example, `src/_arch/aarch64`.
+//!
+//! The architecture folders mirror the subsystem modules laid out in `src`. For example,
+//! architectural code that belongs to the `kernel`'s MMU subsystem (`src/memory/mmu.rs`) would go
+//! into `src/_arch/aarch64/memory/mmu.rs`. The latter file is loaded as a module in
+//! `src/memory/mmu.rs` using the `path attribute`. Usually, the chosen module name is the generic
+//! module's name prefixed with `arch_`.
+//!
+//! For example, this is the top of `src/memory/mmu.rs`:
+//!
+//! ```
+//! #[cfg(target_arch = "aarch64")]
+//! #[path = "../_arch/aarch64/memory/mmu.rs"]
+//! mod arch_mmu;
+//! ```
+//!
+//! Often times, items from the `arch_ module` will be publicly reexported by the parent module.
+//! This way, each architecture specific module can provide its implementation of an item, while the
+//! caller must not be concerned which architecture has been conditionally compiled.
+//!
+//! ## BSP code
+//!
+//! `BSP` stands for Board Support Package. `BSP` code is organized under `src/bsp.rs` and contains
+//! target board specific definitions and functions. These are things such as the board's memory map
+//! or instances of drivers for devices that are featured on the respective board.
+//!
+//! Just like processor architecture code, the `BSP` code's module structure tries to mirror the
+//! `kernel`'s subsystem modules, but there is no reexporting this time. That means whatever is
+//! provided must be called starting from the `bsp` namespace, e.g. `bsp::driver::driver_manager()`.
+//!
+//! ## Kernel interfaces
+//!
+//! Both `arch` and `bsp` contain code that is conditionally compiled depending on the actual target
+//! and board for which the kernel is compiled. For example, the `interrupt controller` hardware of
+//! the `Raspberry Pi 3` and the `Raspberry Pi 4` is different, but we want the rest of the `kernel`
+//! code to play nicely with any of the two without much hassle.
+//!
+//! In order to provide a clean abstraction between `arch`, `bsp` and `generic kernel code`,
+//! `interface` traits are provided *whenever possible* and *where it makes sense*. They are defined
+//! in the respective subsystem module and help to enforce the idiom of *program to an interface,
+//! not an implementation*. For example, there will be a common IRQ handling interface which the two
+//! different interrupt controller `drivers` of both Raspberrys will implement, and only export the
+//! interface to the rest of the `kernel`.
+//!
+//! ```
+//!         +-------------------+
+//!         | Interface (Trait) |
+//!         |                   |
+//!         +--+-------------+--+
+//!            ^             ^
+//!            |             |
+//!            |             |
+//! +----------+--+       +--+----------+
+//! | kernel code |       |  bsp code   |
+//! |             |       |  arch code  |
+//! +-------------+       +-------------+
+//! ```
+//!
+//! # Summary
+//!
+//! For a logical `kernel` subsystem, corresponding code can be distributed over several physical
+//! locations. Here is an example for the **memory** subsystem:
+//!
+//! - `src/memory.rs` and `src/memory/**/*`
+//!   - Common code that is agnostic of target processor architecture and `BSP` characteristics.
+//!     - Example: A function to zero a chunk of memory.
+//!   - Interfaces for the memory subsystem that are implemented by `arch` or `BSP` code.
+//!     - Example: An `MMU` interface that defines `MMU` function prototypes.
+//! - `src/bsp/__board_name__/memory.rs` and `src/bsp/__board_name__/memory/**/*`
+//!   - `BSP` specific code.
+//!   - Example: The board's memory map (physical addresses of DRAM and MMIO devices).
+//! - `src/_arch/__arch_name__/memory.rs` and `src/_arch/__arch_name__/memory/**/*`
+//!   - Processor architecture specific code.
+//!   - Example: Implementation of the `MMU` interface for the `__arch_name__` processor
+//!     architecture.
+//!
+//! From a namespace perspective, **memory** subsystem code lives in:
+//!
+//! - `crate::memory::*`
+//! - `crate::bsp::memory::*`
+//!
+//! # Boot flow
+//!
+//! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`.
+//!     - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`.
+//! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
+
+#![allow(clippy::upper_case_acronyms)]
+#![allow(incomplete_features)]
+#![feature(alloc_error_handler)]
+#![feature(asm_const)]
+#![feature(const_option)]
+#![feature(core_intrinsics)]
+#![feature(format_args_nl)]
+#![feature(generic_const_exprs)]
+#![feature(int_roundings)]
+#![feature(is_sorted)]
+#![feature(linkage)]
+#![feature(nonzero_min_max)]
+#![feature(panic_info_message)]
+#![feature(step_trait)]
+#![feature(trait_alias)]
+#![feature(unchecked_math)]
+#![no_std]
+// Testing
+#![cfg_attr(test, no_main)]
+#![feature(custom_test_frameworks)]
+#![reexport_test_harness_main = "test_main"]
+#![test_runner(crate::test_runner)]
+
+extern crate alloc;
+
+mod panic_wait;
+mod synchronization;
+
+pub mod backtrace;
+pub mod bsp;
+pub mod common;
+pub mod console;
+pub mod cpu;
+pub mod driver;
+pub mod exception;
+pub mod memory;
+pub mod print;
+pub mod state;
+pub mod symbols;
+pub mod time;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Version string.
+pub fn version() -> &'static str {
+    concat!(
+        env!("CARGO_PKG_NAME"),
+        " version ",
+        env!("CARGO_PKG_VERSION")
+    )
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+/// The default runner for unit tests.
+pub fn test_runner(tests: &[&test_types::UnitTest]) {
+    // This line will be printed as the test header.
+    println!("Running {} tests", tests.len());
+
+    for (i, test) in tests.iter().enumerate() {
+        print!("{:>3}. {:.<58}", i + 1, test.name);
+
+        // Run the actual test.
+        (test.test_func)();
+
+        // Failed tests call panic!(). Execution reaches here only if the test has passed.
+        println!("[ok]")
+    }
+}
+
+/// The `kernel_init()` for unit tests.
+#[cfg(test)]
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    exception::handling_init();
+    memory::init();
+    bsp::driver::qemu_bring_up_console();
+
+    test_main();
+
+    cpu::qemu_exit_success()
+}
diff --git a/20_timer_callbacks/kernel/src/main.rs b/20_timer_callbacks/kernel/src/main.rs
new file mode 100644
index 000000000..28b75340e
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/main.rs
@@ -0,0 +1,96 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+// Rust embedded logo for `make doc`.
+#![doc(
+    html_logo_url = "https://raw.githubusercontent.com/rust-embedded/wg/master/assets/logo/ewg-logo-blue-white-on-transparent.png"
+)]
+
+//! The `kernel` binary.
+
+#![feature(format_args_nl)]
+#![no_main]
+#![no_std]
+
+extern crate alloc;
+
+use libkernel::{bsp, cpu, driver, exception, info, memory, state, time};
+
+/// Early init code.
+///
+/// When this code runs, virtual memory is already enabled.
+///
+/// # Safety
+///
+/// - Only a single core must be active and running this function.
+/// - Printing will not work until the respective driver's MMIO is remapped.
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    exception::handling_init();
+    memory::init();
+
+    // Initialize the timer subsystem.
+    if let Err(x) = time::init() {
+        panic!("Error initializing timer subsystem: {}", x);
+    }
+
+    // Initialize the BSP driver subsystem.
+    if let Err(x) = bsp::driver::init() {
+        panic!("Error initializing BSP driver subsystem: {}", x);
+    }
+
+    // Initialize all device drivers.
+    driver::driver_manager().init_drivers_and_irqs();
+
+    bsp::memory::mmu::kernel_add_mapping_records_for_precomputed();
+
+    // Unmask interrupts on the boot CPU core.
+    exception::asynchronous::local_irq_unmask();
+
+    // Announce conclusion of the kernel_init() phase.
+    state::state_manager().transition_to_single_core_main();
+
+    // Transition from unsafe to safe.
+    kernel_main()
+}
+
+/// The main function running after the early init.
+fn kernel_main() -> ! {
+    use alloc::boxed::Box;
+    use core::time::Duration;
+
+    info!("{}", libkernel::version());
+    info!("Booting on: {}", bsp::board_name());
+
+    info!("MMU online:");
+    memory::mmu::kernel_print_mappings();
+
+    let (_, privilege_level) = exception::current_privilege_level();
+    info!("Current privilege level: {}", privilege_level);
+
+    info!("Exception handling state:");
+    exception::asynchronous::print_state();
+
+    info!(
+        "Architectural timer resolution: {} ns",
+        time::time_manager().resolution().as_nanos()
+    );
+
+    info!("Drivers loaded:");
+    driver::driver_manager().enumerate();
+
+    info!("Registered IRQ handlers:");
+    exception::asynchronous::irq_manager().print_handler();
+
+    info!("Kernel heap:");
+    memory::heap_alloc::kernel_heap_allocator().print_usage();
+
+    time::time_manager().set_timeout_once(Duration::from_secs(5), Box::new(|| info!("Once 5")));
+    time::time_manager().set_timeout_once(Duration::from_secs(3), Box::new(|| info!("Once 2")));
+    time::time_manager()
+        .set_timeout_periodic(Duration::from_secs(1), Box::new(|| info!("Periodic 1 sec")));
+
+    info!("Echoing input now");
+    cpu::wait_forever();
+}
diff --git a/20_timer_callbacks/kernel/src/memory.rs b/20_timer_callbacks/kernel/src/memory.rs
new file mode 100644
index 000000000..a64bfbae8
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/memory.rs
@@ -0,0 +1,198 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Memory Management.
+
+pub mod heap_alloc;
+pub mod mmu;
+
+use crate::{bsp, common};
+use core::{
+    fmt,
+    marker::PhantomData,
+    ops::{Add, Sub},
+};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Metadata trait for marking the type of an address.
+pub trait AddressType: Copy + Clone + PartialOrd + PartialEq + Ord + Eq {}
+
+/// Zero-sized type to mark a physical address.
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq, Ord, Eq)]
+pub enum Physical {}
+
+/// Zero-sized type to mark a virtual address.
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq, Ord, Eq)]
+pub enum Virtual {}
+
+/// Generic address type.
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq, Ord, Eq)]
+pub struct Address<ATYPE: AddressType> {
+    value: usize,
+    _address_type: PhantomData<fn() -> ATYPE>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl AddressType for Physical {}
+impl AddressType for Virtual {}
+
+impl<ATYPE: AddressType> Address<ATYPE> {
+    /// Create an instance.
+    pub const fn new(value: usize) -> Self {
+        Self {
+            value,
+            _address_type: PhantomData,
+        }
+    }
+
+    /// Convert to usize.
+    pub const fn as_usize(self) -> usize {
+        self.value
+    }
+
+    /// Align down to page size.
+    #[must_use]
+    pub const fn align_down_page(self) -> Self {
+        let aligned = common::align_down(self.value, bsp::memory::mmu::KernelGranule::SIZE);
+
+        Self::new(aligned)
+    }
+
+    /// Align up to page size.
+    #[must_use]
+    pub const fn align_up_page(self) -> Self {
+        let aligned = common::align_up(self.value, bsp::memory::mmu::KernelGranule::SIZE);
+
+        Self::new(aligned)
+    }
+
+    /// Checks if the address is page aligned.
+    pub const fn is_page_aligned(&self) -> bool {
+        common::is_aligned(self.value, bsp::memory::mmu::KernelGranule::SIZE)
+    }
+
+    /// Return the address' offset into the corresponding page.
+    pub const fn offset_into_page(&self) -> usize {
+        self.value & bsp::memory::mmu::KernelGranule::MASK
+    }
+}
+
+impl<ATYPE: AddressType> Add<usize> for Address<ATYPE> {
+    type Output = Self;
+
+    #[inline(always)]
+    fn add(self, rhs: usize) -> Self::Output {
+        match self.value.checked_add(rhs) {
+            None => panic!("Overflow on Address::add"),
+            Some(x) => Self::new(x),
+        }
+    }
+}
+
+impl<ATYPE: AddressType> Sub<usize> for Address<ATYPE> {
+    type Output = Self;
+
+    #[inline(always)]
+    fn sub(self, rhs: usize) -> Self::Output {
+        match self.value.checked_sub(rhs) {
+            None => panic!("Overflow on Address::sub"),
+            Some(x) => Self::new(x),
+        }
+    }
+}
+
+impl<ATYPE: AddressType> Sub<Address<ATYPE>> for Address<ATYPE> {
+    type Output = Self;
+
+    #[inline(always)]
+    fn sub(self, rhs: Address<ATYPE>) -> Self::Output {
+        match self.value.checked_sub(rhs.value) {
+            None => panic!("Overflow on Address::sub"),
+            Some(x) => Self::new(x),
+        }
+    }
+}
+
+impl Address<Virtual> {
+    /// Checks if the address is part of the boot core stack region.
+    pub fn is_valid_stack_addr(&self) -> bool {
+        bsp::memory::mmu::virt_boot_core_stack_region().contains(*self)
+    }
+
+    /// Checks if the address is part of the kernel code region.
+    pub fn is_valid_code_addr(&self) -> bool {
+        bsp::memory::mmu::virt_code_region().contains(*self)
+    }
+}
+
+impl fmt::Display for Address<Physical> {
+    // Don't expect to see physical addresses greater than 40 bit.
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        let q3: u8 = ((self.value >> 32) & 0xff) as u8;
+        let q2: u16 = ((self.value >> 16) & 0xffff) as u16;
+        let q1: u16 = (self.value & 0xffff) as u16;
+
+        write!(f, "0x")?;
+        write!(f, "{:02x}_", q3)?;
+        write!(f, "{:04x}_", q2)?;
+        write!(f, "{:04x}", q1)
+    }
+}
+
+impl fmt::Display for Address<Virtual> {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        let q4: u16 = ((self.value >> 48) & 0xffff) as u16;
+        let q3: u16 = ((self.value >> 32) & 0xffff) as u16;
+        let q2: u16 = ((self.value >> 16) & 0xffff) as u16;
+        let q1: u16 = (self.value & 0xffff) as u16;
+
+        write!(f, "0x")?;
+        write!(f, "{:04x}_", q4)?;
+        write!(f, "{:04x}_", q3)?;
+        write!(f, "{:04x}_", q2)?;
+        write!(f, "{:04x}", q1)
+    }
+}
+
+/// Initialize the memory subsystem.
+pub fn init() {
+    mmu::kernel_init_mmio_va_allocator();
+    heap_alloc::kernel_init_heap_allocator();
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// Sanity of [Address] methods.
+    #[kernel_test]
+    fn address_type_method_sanity() {
+        let addr = Address::<Virtual>::new(bsp::memory::mmu::KernelGranule::SIZE + 100);
+
+        assert_eq!(
+            addr.align_down_page().as_usize(),
+            bsp::memory::mmu::KernelGranule::SIZE
+        );
+
+        assert_eq!(
+            addr.align_up_page().as_usize(),
+            bsp::memory::mmu::KernelGranule::SIZE * 2
+        );
+
+        assert!(!addr.is_page_aligned());
+
+        assert_eq!(addr.offset_into_page(), 100);
+    }
+}
diff --git a/20_timer_callbacks/kernel/src/memory/heap_alloc.rs b/20_timer_callbacks/kernel/src/memory/heap_alloc.rs
new file mode 100644
index 000000000..c0f56d8d6
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/memory/heap_alloc.rs
@@ -0,0 +1,147 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Heap allocation.
+
+use crate::{
+    backtrace, bsp, common, debug, info,
+    memory::{Address, Virtual},
+    synchronization,
+    synchronization::IRQSafeNullLock,
+    warn,
+};
+use alloc::alloc::{GlobalAlloc, Layout};
+use core::sync::atomic::{AtomicBool, Ordering};
+use linked_list_allocator::Heap as LinkedListHeap;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// A heap allocator that can be lazyily initialized.
+pub struct HeapAllocator {
+    inner: IRQSafeNullLock<LinkedListHeap>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+#[global_allocator]
+static KERNEL_HEAP_ALLOCATOR: HeapAllocator = HeapAllocator::new();
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+#[inline(always)]
+fn debug_print_alloc_dealloc(operation: &'static str, ptr: *mut u8, layout: Layout) {
+    let size = layout.size();
+    let (size_h, size_unit) = common::size_human_readable_ceil(size);
+    let addr = Address::<Virtual>::new(ptr as usize);
+
+    debug!(
+        "Kernel Heap: {}\n      \
+        Size:     {:#x} ({} {})\n      \
+        Start:    {}\n      \
+        End excl: {}\n\n      \
+        {}",
+        operation,
+        size,
+        size_h,
+        size_unit,
+        addr,
+        addr + size,
+        backtrace::Backtrace
+    );
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+use synchronization::interface::Mutex;
+
+#[alloc_error_handler]
+fn alloc_error_handler(layout: Layout) -> ! {
+    panic!("Allocation error: {:?}", layout)
+}
+
+/// Return a reference to the kernel's heap allocator.
+pub fn kernel_heap_allocator() -> &'static HeapAllocator {
+    &KERNEL_HEAP_ALLOCATOR
+}
+
+impl HeapAllocator {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self {
+            inner: IRQSafeNullLock::new(LinkedListHeap::empty()),
+        }
+    }
+
+    /// Print the current heap usage.
+    pub fn print_usage(&self) {
+        let (used, free) = KERNEL_HEAP_ALLOCATOR
+            .inner
+            .lock(|inner| (inner.used(), inner.free()));
+
+        if used >= 1024 {
+            let (used_h, used_unit) = common::size_human_readable_ceil(used);
+            info!("      Used: {} Byte ({} {})", used, used_h, used_unit);
+        } else {
+            info!("      Used: {} Byte", used);
+        }
+
+        if free >= 1024 {
+            let (free_h, free_unit) = common::size_human_readable_ceil(free);
+            info!("      Free: {} Byte ({} {})", free, free_h, free_unit);
+        } else {
+            info!("      Free: {} Byte", free);
+        }
+    }
+}
+
+unsafe impl GlobalAlloc for HeapAllocator {
+    unsafe fn alloc(&self, layout: Layout) -> *mut u8 {
+        let result = KERNEL_HEAP_ALLOCATOR
+            .inner
+            .lock(|inner| inner.allocate_first_fit(layout).ok());
+
+        match result {
+            None => core::ptr::null_mut(),
+            Some(allocation) => {
+                let ptr = allocation.as_ptr();
+
+                debug_print_alloc_dealloc("Allocation", ptr, layout);
+
+                ptr
+            }
+        }
+    }
+
+    unsafe fn dealloc(&self, ptr: *mut u8, layout: Layout) {
+        KERNEL_HEAP_ALLOCATOR
+            .inner
+            .lock(|inner| inner.deallocate(core::ptr::NonNull::new_unchecked(ptr), layout));
+
+        debug_print_alloc_dealloc("Free", ptr, layout);
+    }
+}
+
+/// Query the BSP for the heap region and initialize the kernel's heap allocator with it.
+pub fn kernel_init_heap_allocator() {
+    static INIT_DONE: AtomicBool = AtomicBool::new(false);
+    if INIT_DONE.load(Ordering::Relaxed) {
+        warn!("Already initialized");
+        return;
+    }
+
+    let region = bsp::memory::mmu::virt_heap_region();
+
+    KERNEL_HEAP_ALLOCATOR.inner.lock(|inner| unsafe {
+        inner.init(region.start_addr().as_usize() as *mut u8, region.size())
+    });
+
+    INIT_DONE.store(true, Ordering::Relaxed);
+}
diff --git a/20_timer_callbacks/kernel/src/memory/mmu.rs b/20_timer_callbacks/kernel/src/memory/mmu.rs
new file mode 100644
index 000000000..8d204a4ef
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/memory/mmu.rs
@@ -0,0 +1,262 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Memory Management Unit.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../_arch/aarch64/memory/mmu.rs"]
+mod arch_mmu;
+
+mod mapping_record;
+mod page_alloc;
+mod translation_table;
+mod types;
+
+use crate::{
+    bsp,
+    memory::{Address, Physical, Virtual},
+    synchronization::{self, interface::Mutex},
+};
+use core::{fmt, num::NonZeroUsize};
+
+pub use types::*;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// MMU enable errors variants.
+#[allow(missing_docs)]
+#[derive(Debug)]
+pub enum MMUEnableError {
+    AlreadyEnabled,
+    Other(&'static str),
+}
+
+/// Memory Management interfaces.
+pub mod interface {
+    use super::*;
+
+    /// MMU functions.
+    pub trait MMU {
+        /// Turns on the MMU for the first time and enables data and instruction caching.
+        ///
+        /// # Safety
+        ///
+        /// - Changes the HW's global state.
+        unsafe fn enable_mmu_and_caching(
+            &self,
+            phys_tables_base_addr: Address<Physical>,
+        ) -> Result<(), MMUEnableError>;
+
+        /// Returns true if the MMU is enabled, false otherwise.
+        fn is_enabled(&self) -> bool;
+    }
+}
+
+/// Describes the characteristics of a translation granule.
+pub struct TranslationGranule<const GRANULE_SIZE: usize>;
+
+/// Describes properties of an address space.
+pub struct AddressSpace<const AS_SIZE: usize>;
+
+/// Intended to be implemented for [`AddressSpace`].
+pub trait AssociatedTranslationTable {
+    /// A translation table whose address range is:
+    ///
+    /// [u64::MAX, (u64::MAX - AS_SIZE) + 1]
+    type TableStartFromTop;
+
+    /// A translation table whose address range is:
+    ///
+    /// [AS_SIZE - 1, 0]
+    type TableStartFromBottom;
+}
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+use interface::MMU;
+use synchronization::interface::ReadWriteEx;
+use translation_table::interface::TranslationTable;
+
+/// Map a region in the kernel's translation tables.
+///
+/// No input checks done, input is passed through to the architectural implementation.
+///
+/// # Safety
+///
+/// - See `map_at()`.
+/// - Does not prevent aliasing.
+unsafe fn kernel_map_at_unchecked(
+    name: &'static str,
+    virt_region: &MemoryRegion<Virtual>,
+    phys_region: &MemoryRegion<Physical>,
+    attr: &AttributeFields,
+) -> Result<(), &'static str> {
+    bsp::memory::mmu::kernel_translation_tables()
+        .write(|tables| tables.map_at(virt_region, phys_region, attr))?;
+
+    kernel_add_mapping_record(name, virt_region, phys_region, attr);
+
+    Ok(())
+}
+
+/// Try to translate a kernel virtual address to a physical address.
+///
+/// Will only succeed if there exists a valid mapping for the input address.
+fn try_kernel_virt_addr_to_phys_addr(
+    virt_addr: Address<Virtual>,
+) -> Result<Address<Physical>, &'static str> {
+    bsp::memory::mmu::kernel_translation_tables()
+        .read(|tables| tables.try_virt_addr_to_phys_addr(virt_addr))
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+impl fmt::Display for MMUEnableError {
+    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+        match self {
+            MMUEnableError::AlreadyEnabled => write!(f, "MMU is already enabled"),
+            MMUEnableError::Other(x) => write!(f, "{}", x),
+        }
+    }
+}
+
+impl<const GRANULE_SIZE: usize> TranslationGranule<GRANULE_SIZE> {
+    /// The granule's size.
+    pub const SIZE: usize = Self::size_checked();
+
+    /// The granule's mask.
+    pub const MASK: usize = Self::SIZE - 1;
+
+    /// The granule's shift, aka log2(size).
+    pub const SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
+
+    const fn size_checked() -> usize {
+        assert!(GRANULE_SIZE.is_power_of_two());
+
+        GRANULE_SIZE
+    }
+}
+
+impl<const AS_SIZE: usize> AddressSpace<AS_SIZE> {
+    /// The address space size.
+    pub const SIZE: usize = Self::size_checked();
+
+    /// The address space shift, aka log2(size).
+    pub const SIZE_SHIFT: usize = Self::SIZE.trailing_zeros() as usize;
+
+    const fn size_checked() -> usize {
+        assert!(AS_SIZE.is_power_of_two());
+
+        // Check for architectural restrictions as well.
+        Self::arch_address_space_size_sanity_checks();
+
+        AS_SIZE
+    }
+}
+
+/// Query the BSP for the reserved virtual addresses for MMIO remapping and initialize the kernel's
+/// MMIO VA allocator with it.
+pub fn kernel_init_mmio_va_allocator() {
+    let region = bsp::memory::mmu::virt_mmio_remap_region();
+
+    page_alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.init(region));
+}
+
+/// Add an entry to the mapping info record.
+pub fn kernel_add_mapping_record(
+    name: &'static str,
+    virt_region: &MemoryRegion<Virtual>,
+    phys_region: &MemoryRegion<Physical>,
+    attr: &AttributeFields,
+) {
+    mapping_record::kernel_add(name, virt_region, phys_region, attr);
+}
+
+/// MMIO remapping in the kernel translation tables.
+///
+/// Typically used by device drivers.
+///
+/// # Safety
+///
+/// - Same as `kernel_map_at_unchecked()`, minus the aliasing part.
+pub unsafe fn kernel_map_mmio(
+    name: &'static str,
+    mmio_descriptor: &MMIODescriptor,
+) -> Result<Address<Virtual>, &'static str> {
+    let phys_region = MemoryRegion::from(*mmio_descriptor);
+    let offset_into_start_page = mmio_descriptor.start_addr().offset_into_page();
+
+    // Check if an identical region has been mapped for another driver. If so, reuse it.
+    let virt_addr = if let Some(addr) =
+        mapping_record::kernel_find_and_insert_mmio_duplicate(mmio_descriptor, name)
+    {
+        addr
+    // Otherwise, allocate a new region and map it.
+    } else {
+        let num_pages = match NonZeroUsize::new(phys_region.num_pages()) {
+            None => return Err("Requested 0 pages"),
+            Some(x) => x,
+        };
+
+        let virt_region =
+            page_alloc::kernel_mmio_va_allocator().lock(|allocator| allocator.alloc(num_pages))?;
+
+        kernel_map_at_unchecked(
+            name,
+            &virt_region,
+            &phys_region,
+            &AttributeFields {
+                mem_attributes: MemAttributes::Device,
+                acc_perms: AccessPermissions::ReadWrite,
+                execute_never: true,
+            },
+        )?;
+
+        virt_region.start_addr()
+    };
+
+    Ok(virt_addr + offset_into_start_page)
+}
+
+/// Try to translate a kernel virtual page address to a physical page address.
+///
+/// Will only succeed if there exists a valid mapping for the input page.
+pub fn try_kernel_virt_page_addr_to_phys_page_addr(
+    virt_page_addr: PageAddress<Virtual>,
+) -> Result<PageAddress<Physical>, &'static str> {
+    bsp::memory::mmu::kernel_translation_tables()
+        .read(|tables| tables.try_virt_page_addr_to_phys_page_addr(virt_page_addr))
+}
+
+/// Try to get the attributes of a kernel page.
+///
+/// Will only succeed if there exists a valid mapping for the input page.
+pub fn try_kernel_page_attributes(
+    virt_page_addr: PageAddress<Virtual>,
+) -> Result<AttributeFields, &'static str> {
+    bsp::memory::mmu::kernel_translation_tables()
+        .read(|tables| tables.try_page_attributes(virt_page_addr))
+}
+
+/// Human-readable print of all recorded kernel mappings.
+pub fn kernel_print_mappings() {
+    mapping_record::kernel_print()
+}
+
+/// Enable the MMU and data + instruction caching.
+///
+/// # Safety
+///
+/// - Crucial function during kernel init. Changes the the complete memory view of the processor.
+#[inline(always)]
+pub unsafe fn enable_mmu_and_caching(
+    phys_tables_base_addr: Address<Physical>,
+) -> Result<(), MMUEnableError> {
+    arch_mmu::mmu().enable_mmu_and_caching(phys_tables_base_addr)
+}
diff --git a/20_timer_callbacks/kernel/src/memory/mmu/mapping_record.rs b/20_timer_callbacks/kernel/src/memory/mmu/mapping_record.rs
new file mode 100644
index 000000000..4e9395da4
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/memory/mmu/mapping_record.rs
@@ -0,0 +1,204 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! A record of mapped pages.
+
+use super::{
+    AccessPermissions, Address, AttributeFields, MMIODescriptor, MemAttributes, MemoryRegion,
+    Physical, Virtual,
+};
+use crate::{bsp, common, info, synchronization, synchronization::InitStateLock};
+use alloc::{vec, vec::Vec};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Type describing a virtual memory mapping.
+#[allow(missing_docs)]
+struct MappingRecordEntry {
+    pub users: Vec<&'static str>,
+    pub phys_start_addr: Address<Physical>,
+    pub virt_start_addr: Address<Virtual>,
+    pub num_pages: usize,
+    pub attribute_fields: AttributeFields,
+}
+
+struct MappingRecord {
+    inner: Vec<MappingRecordEntry>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static KERNEL_MAPPING_RECORD: InitStateLock<MappingRecord> =
+    InitStateLock::new(MappingRecord::new());
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl MappingRecordEntry {
+    pub fn new(
+        name: &'static str,
+        virt_region: &MemoryRegion<Virtual>,
+        phys_region: &MemoryRegion<Physical>,
+        attr: &AttributeFields,
+    ) -> Self {
+        Self {
+            users: vec![name],
+            phys_start_addr: phys_region.start_addr(),
+            virt_start_addr: virt_region.start_addr(),
+            num_pages: phys_region.num_pages(),
+            attribute_fields: *attr,
+        }
+    }
+
+    pub fn add_user(&mut self, user: &'static str) {
+        self.users.push(user);
+    }
+}
+
+impl MappingRecord {
+    pub const fn new() -> Self {
+        Self { inner: Vec::new() }
+    }
+
+    fn sort(&mut self) {
+        if !self.inner.is_sorted_by_key(|item| item.virt_start_addr) {
+            self.inner.sort_unstable_by_key(|item| item.virt_start_addr)
+        }
+    }
+
+    fn find_duplicate(
+        &mut self,
+        phys_region: &MemoryRegion<Physical>,
+    ) -> Option<&mut MappingRecordEntry> {
+        self.inner
+            .iter_mut()
+            .filter(|x| x.attribute_fields.mem_attributes == MemAttributes::Device)
+            .find(|x| {
+                if x.phys_start_addr != phys_region.start_addr() {
+                    return false;
+                }
+
+                if x.num_pages != phys_region.num_pages() {
+                    return false;
+                }
+
+                true
+            })
+    }
+
+    pub fn add(
+        &mut self,
+        name: &'static str,
+        virt_region: &MemoryRegion<Virtual>,
+        phys_region: &MemoryRegion<Physical>,
+        attr: &AttributeFields,
+    ) {
+        self.inner.push(MappingRecordEntry::new(
+            name,
+            virt_region,
+            phys_region,
+            attr,
+        ));
+
+        self.sort();
+    }
+
+    pub fn print(&self) {
+        info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
+        info!(
+            "      {:^44}     {:^30}   {:^7}   {:^9}   {:^35}",
+            "Virtual", "Physical", "Size", "Attr", "Entity"
+        );
+        info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
+
+        for i in self.inner.iter() {
+            let size = i.num_pages * bsp::memory::mmu::KernelGranule::SIZE;
+            let virt_start = i.virt_start_addr;
+            let virt_end_inclusive = virt_start + (size - 1);
+            let phys_start = i.phys_start_addr;
+            let phys_end_inclusive = phys_start + (size - 1);
+
+            let (size, unit) = common::size_human_readable_ceil(size);
+
+            let attr = match i.attribute_fields.mem_attributes {
+                MemAttributes::CacheableDRAM => "C",
+                MemAttributes::Device => "Dev",
+            };
+
+            let acc_p = match i.attribute_fields.acc_perms {
+                AccessPermissions::ReadOnly => "RO",
+                AccessPermissions::ReadWrite => "RW",
+            };
+
+            let xn = if i.attribute_fields.execute_never {
+                "XN"
+            } else {
+                "X"
+            };
+
+            info!(
+                "      {}..{} --> {}..{} | {:>3} {} | {:<3} {} {:<2} | {}",
+                virt_start,
+                virt_end_inclusive,
+                phys_start,
+                phys_end_inclusive,
+                size,
+                unit,
+                attr,
+                acc_p,
+                xn,
+                i.users[0]
+            );
+
+            for k in &i.users[1..] {
+                info!(
+                        "                                                                                                            | {}",
+                        k
+                    );
+            }
+        }
+
+        info!("      -------------------------------------------------------------------------------------------------------------------------------------------");
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+use synchronization::interface::ReadWriteEx;
+
+/// Add an entry to the mapping info record.
+pub fn kernel_add(
+    name: &'static str,
+    virt_region: &MemoryRegion<Virtual>,
+    phys_region: &MemoryRegion<Physical>,
+    attr: &AttributeFields,
+) {
+    KERNEL_MAPPING_RECORD.write(|mr| mr.add(name, virt_region, phys_region, attr))
+}
+
+pub fn kernel_find_and_insert_mmio_duplicate(
+    mmio_descriptor: &MMIODescriptor,
+    new_user: &'static str,
+) -> Option<Address<Virtual>> {
+    let phys_region: MemoryRegion<Physical> = (*mmio_descriptor).into();
+
+    KERNEL_MAPPING_RECORD.write(|mr| {
+        let dup = mr.find_duplicate(&phys_region)?;
+
+        dup.add_user(new_user);
+
+        Some(dup.virt_start_addr)
+    })
+}
+
+/// Human-readable print of all recorded kernel mappings.
+pub fn kernel_print() {
+    KERNEL_MAPPING_RECORD.read(|mr| mr.print());
+}
diff --git a/20_timer_callbacks/kernel/src/memory/mmu/page_alloc.rs b/20_timer_callbacks/kernel/src/memory/mmu/page_alloc.rs
new file mode 100644
index 000000000..347fcd343
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/memory/mmu/page_alloc.rs
@@ -0,0 +1,70 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Page allocation.
+
+use super::MemoryRegion;
+use crate::{
+    memory::{AddressType, Virtual},
+    synchronization::IRQSafeNullLock,
+    warn,
+};
+use core::num::NonZeroUsize;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// A page allocator that can be lazyily initialized.
+pub struct PageAllocator<ATYPE: AddressType> {
+    pool: Option<MemoryRegion<ATYPE>>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static KERNEL_MMIO_VA_ALLOCATOR: IRQSafeNullLock<PageAllocator<Virtual>> =
+    IRQSafeNullLock::new(PageAllocator::new());
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the kernel's MMIO virtual address allocator.
+pub fn kernel_mmio_va_allocator() -> &'static IRQSafeNullLock<PageAllocator<Virtual>> {
+    &KERNEL_MMIO_VA_ALLOCATOR
+}
+
+impl<ATYPE: AddressType> PageAllocator<ATYPE> {
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self { pool: None }
+    }
+
+    /// Initialize the allocator.
+    pub fn init(&mut self, pool: MemoryRegion<ATYPE>) {
+        if self.pool.is_some() {
+            warn!("Already initialized");
+            return;
+        }
+
+        self.pool = Some(pool);
+    }
+
+    /// Allocate a number of pages.
+    pub fn alloc(
+        &mut self,
+        num_requested_pages: NonZeroUsize,
+    ) -> Result<MemoryRegion<ATYPE>, &'static str> {
+        if self.pool.is_none() {
+            return Err("Allocator not initialized");
+        }
+
+        self.pool
+            .as_mut()
+            .unwrap()
+            .take_first_n_pages(num_requested_pages)
+    }
+}
diff --git a/20_timer_callbacks/kernel/src/memory/mmu/translation_table.rs b/20_timer_callbacks/kernel/src/memory/mmu/translation_table.rs
new file mode 100644
index 000000000..9301bb0cd
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/memory/mmu/translation_table.rs
@@ -0,0 +1,137 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Translation table.
+
+#[cfg(target_arch = "aarch64")]
+#[path = "../../_arch/aarch64/memory/mmu/translation_table.rs"]
+mod arch_translation_table;
+
+use super::{AttributeFields, MemoryRegion};
+use crate::memory::{Address, Physical, Virtual};
+
+//--------------------------------------------------------------------------------------------------
+// Architectural Public Reexports
+//--------------------------------------------------------------------------------------------------
+#[cfg(target_arch = "aarch64")]
+pub use arch_translation_table::FixedSizeTranslationTable;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Translation table interfaces.
+pub mod interface {
+    use crate::memory::mmu::PageAddress;
+
+    use super::*;
+
+    /// Translation table operations.
+    pub trait TranslationTable {
+        /// Anything that needs to run before any of the other provided functions can be used.
+        ///
+        /// # Safety
+        ///
+        /// - Implementor must ensure that this function can run only once or is harmless if invoked
+        ///   multiple times.
+        fn init(&mut self) -> Result<(), &'static str>;
+
+        /// Map the given virtual memory region to the given physical memory region.
+        ///
+        /// # Safety
+        ///
+        /// - Using wrong attributes can cause multiple issues of different nature in the system.
+        /// - It is not required that the architectural implementation prevents aliasing. That is,
+        ///   mapping to the same physical memory using multiple virtual addresses, which would
+        ///   break Rust's ownership assumptions. This should be protected against in the kernel's
+        ///   generic MMU code.
+        unsafe fn map_at(
+            &mut self,
+            virt_region: &MemoryRegion<Virtual>,
+            phys_region: &MemoryRegion<Physical>,
+            attr: &AttributeFields,
+        ) -> Result<(), &'static str>;
+
+        /// Try to translate a virtual page address to a physical page address.
+        ///
+        /// Will only succeed if there exists a valid mapping for the input page.
+        fn try_virt_page_addr_to_phys_page_addr(
+            &self,
+            virt_page_addr: PageAddress<Virtual>,
+        ) -> Result<PageAddress<Physical>, &'static str>;
+
+        /// Try to get the attributes of a page.
+        ///
+        /// Will only succeed if there exists a valid mapping for the input page.
+        fn try_page_attributes(
+            &self,
+            virt_page_addr: PageAddress<Virtual>,
+        ) -> Result<AttributeFields, &'static str>;
+
+        /// Try to translate a virtual address to a physical address.
+        ///
+        /// Will only succeed if there exists a valid mapping for the input address.
+        fn try_virt_addr_to_phys_addr(
+            &self,
+            virt_addr: Address<Virtual>,
+        ) -> Result<Address<Physical>, &'static str>;
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use crate::memory::mmu::{AccessPermissions, MemAttributes, PageAddress};
+    use arch_translation_table::MinSizeTranslationTable;
+    use interface::TranslationTable;
+    use test_macros::kernel_test;
+
+    /// Sanity checks for the TranslationTable implementation.
+    #[kernel_test]
+    fn translationtable_implementation_sanity() {
+        // This will occupy a lot of space on the stack.
+        let mut tables = MinSizeTranslationTable::new_for_runtime();
+
+        assert_eq!(tables.init(), Ok(()));
+
+        let virt_end_exclusive_page_addr: PageAddress<Virtual> = PageAddress::MAX;
+        let virt_start_page_addr: PageAddress<Virtual> =
+            virt_end_exclusive_page_addr.checked_offset(-5).unwrap();
+
+        let phys_start_page_addr: PageAddress<Physical> = PageAddress::from(0);
+        let phys_end_exclusive_page_addr: PageAddress<Physical> =
+            phys_start_page_addr.checked_offset(5).unwrap();
+
+        let virt_region = MemoryRegion::new(virt_start_page_addr, virt_end_exclusive_page_addr);
+        let phys_region = MemoryRegion::new(phys_start_page_addr, phys_end_exclusive_page_addr);
+
+        let attr = AttributeFields {
+            mem_attributes: MemAttributes::CacheableDRAM,
+            acc_perms: AccessPermissions::ReadWrite,
+            execute_never: true,
+        };
+
+        unsafe { assert_eq!(tables.map_at(&virt_region, &phys_region, &attr), Ok(())) };
+
+        assert_eq!(
+            tables.try_virt_page_addr_to_phys_page_addr(virt_start_page_addr),
+            Ok(phys_start_page_addr)
+        );
+
+        assert_eq!(
+            tables.try_page_attributes(virt_start_page_addr.checked_offset(-1).unwrap()),
+            Err("Page marked invalid")
+        );
+
+        assert_eq!(tables.try_page_attributes(virt_start_page_addr), Ok(attr));
+
+        let virt_addr = virt_start_page_addr.into_inner() + 0x100;
+        let phys_addr = phys_start_page_addr.into_inner() + 0x100;
+        assert_eq!(tables.try_virt_addr_to_phys_addr(virt_addr), Ok(phys_addr));
+    }
+}
diff --git a/20_timer_callbacks/kernel/src/memory/mmu/types.rs b/20_timer_callbacks/kernel/src/memory/mmu/types.rs
new file mode 100644
index 000000000..62f3926ea
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/memory/mmu/types.rs
@@ -0,0 +1,378 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Memory Management Unit types.
+
+use crate::{
+    bsp, common,
+    memory::{Address, AddressType, Physical},
+};
+use core::{convert::From, iter::Step, num::NonZeroUsize, ops::Range};
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// A wrapper type around [Address] that ensures page alignment.
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
+pub struct PageAddress<ATYPE: AddressType> {
+    inner: Address<ATYPE>,
+}
+
+/// A type that describes a region of memory in quantities of pages.
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
+pub struct MemoryRegion<ATYPE: AddressType> {
+    start: PageAddress<ATYPE>,
+    end_exclusive: PageAddress<ATYPE>,
+}
+
+/// Architecture agnostic memory attributes.
+#[allow(missing_docs)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
+pub enum MemAttributes {
+    CacheableDRAM,
+    Device,
+}
+
+/// Architecture agnostic access permissions.
+#[allow(missing_docs)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
+pub enum AccessPermissions {
+    ReadOnly,
+    ReadWrite,
+}
+
+/// Collection of memory attributes.
+#[allow(missing_docs)]
+#[derive(Copy, Clone, Debug, Eq, PartialOrd, PartialEq)]
+pub struct AttributeFields {
+    pub mem_attributes: MemAttributes,
+    pub acc_perms: AccessPermissions,
+    pub execute_never: bool,
+}
+
+/// An MMIO descriptor for use in device drivers.
+#[derive(Copy, Clone)]
+pub struct MMIODescriptor {
+    start_addr: Address<Physical>,
+    end_addr_exclusive: Address<Physical>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+// PageAddress
+//------------------------------------------------------------------------------
+impl<ATYPE: AddressType> PageAddress<ATYPE> {
+    /// The largest value that can be represented by this type.
+    pub const MAX: Self = PageAddress {
+        inner: Address::new(usize::MAX).align_down_page(),
+    };
+
+    /// Unwraps the value.
+    pub fn into_inner(self) -> Address<ATYPE> {
+        self.inner
+    }
+
+    /// Calculates the offset from the page address.
+    ///
+    /// `count` is in units of [PageAddress]. For example, a count of 2 means `result = self + 2 *
+    /// page_size`.
+    pub fn checked_offset(self, count: isize) -> Option<Self> {
+        if count == 0 {
+            return Some(self);
+        }
+
+        let delta = count
+            .unsigned_abs()
+            .checked_mul(bsp::memory::mmu::KernelGranule::SIZE)?;
+        let result = if count.is_positive() {
+            self.inner.as_usize().checked_add(delta)?
+        } else {
+            self.inner.as_usize().checked_sub(delta)?
+        };
+
+        Some(Self {
+            inner: Address::new(result),
+        })
+    }
+}
+
+impl<ATYPE: AddressType> From<usize> for PageAddress<ATYPE> {
+    fn from(addr: usize) -> Self {
+        assert!(
+            common::is_aligned(addr, bsp::memory::mmu::KernelGranule::SIZE),
+            "Input usize not page aligned"
+        );
+
+        Self {
+            inner: Address::new(addr),
+        }
+    }
+}
+
+impl<ATYPE: AddressType> From<Address<ATYPE>> for PageAddress<ATYPE> {
+    fn from(addr: Address<ATYPE>) -> Self {
+        assert!(addr.is_page_aligned(), "Input Address not page aligned");
+
+        Self { inner: addr }
+    }
+}
+
+impl<ATYPE: AddressType> Step for PageAddress<ATYPE> {
+    fn steps_between(start: &Self, end: &Self) -> Option<usize> {
+        if start > end {
+            return None;
+        }
+
+        // Since start <= end, do unchecked arithmetic.
+        Some(
+            (end.inner.as_usize() - start.inner.as_usize())
+                >> bsp::memory::mmu::KernelGranule::SHIFT,
+        )
+    }
+
+    fn forward_checked(start: Self, count: usize) -> Option<Self> {
+        start.checked_offset(count as isize)
+    }
+
+    fn backward_checked(start: Self, count: usize) -> Option<Self> {
+        start.checked_offset(-(count as isize))
+    }
+}
+
+//------------------------------------------------------------------------------
+// MemoryRegion
+//------------------------------------------------------------------------------
+impl<ATYPE: AddressType> MemoryRegion<ATYPE> {
+    /// Create an instance.
+    pub fn new(start: PageAddress<ATYPE>, end_exclusive: PageAddress<ATYPE>) -> Self {
+        assert!(start <= end_exclusive);
+
+        Self {
+            start,
+            end_exclusive,
+        }
+    }
+
+    fn as_range(&self) -> Range<PageAddress<ATYPE>> {
+        self.into_iter()
+    }
+
+    /// Returns the start page address.
+    pub fn start_page_addr(&self) -> PageAddress<ATYPE> {
+        self.start
+    }
+
+    /// Returns the start address.
+    pub fn start_addr(&self) -> Address<ATYPE> {
+        self.start.into_inner()
+    }
+
+    /// Returns the exclusive end page address.
+    pub fn end_exclusive_page_addr(&self) -> PageAddress<ATYPE> {
+        self.end_exclusive
+    }
+
+    /// Returns the exclusive end page address.
+    pub fn end_inclusive_page_addr(&self) -> PageAddress<ATYPE> {
+        self.end_exclusive.checked_offset(-1).unwrap()
+    }
+
+    /// Checks if self contains an address.
+    pub fn contains(&self, addr: Address<ATYPE>) -> bool {
+        let page_addr = PageAddress::from(addr.align_down_page());
+        self.as_range().contains(&page_addr)
+    }
+
+    /// Checks if there is an overlap with another memory region.
+    pub fn overlaps(&self, other_region: &Self) -> bool {
+        let self_range = self.as_range();
+
+        self_range.contains(&other_region.start_page_addr())
+            || self_range.contains(&other_region.end_inclusive_page_addr())
+    }
+
+    /// Returns the number of pages contained in this region.
+    pub fn num_pages(&self) -> usize {
+        PageAddress::steps_between(&self.start, &self.end_exclusive).unwrap()
+    }
+
+    /// Returns the size in bytes of this region.
+    pub fn size(&self) -> usize {
+        // Invariant: start <= end_exclusive, so do unchecked arithmetic.
+        let end_exclusive = self.end_exclusive.into_inner().as_usize();
+        let start = self.start.into_inner().as_usize();
+
+        end_exclusive - start
+    }
+
+    /// Splits the MemoryRegion like:
+    ///
+    /// --------------------------------------------------------------------------------
+    /// |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |
+    /// --------------------------------------------------------------------------------
+    ///   ^                               ^                                       ^
+    ///   |                               |                                       |
+    ///   left_start     left_end_exclusive                                       |
+    ///                                                                           |
+    ///                                   ^                                       |
+    ///                                   |                                       |
+    ///                                   right_start           right_end_exclusive
+    ///
+    /// Left region is returned to the caller. Right region is the new region for this struct.
+    pub fn take_first_n_pages(&mut self, num_pages: NonZeroUsize) -> Result<Self, &'static str> {
+        let count: usize = num_pages.into();
+
+        let left_end_exclusive = self.start.checked_offset(count as isize);
+        let left_end_exclusive = match left_end_exclusive {
+            None => return Err("Overflow while calculating left_end_exclusive"),
+            Some(x) => x,
+        };
+
+        if left_end_exclusive > self.end_exclusive {
+            return Err("Not enough free pages");
+        }
+
+        let allocation = Self {
+            start: self.start,
+            end_exclusive: left_end_exclusive,
+        };
+        self.start = left_end_exclusive;
+
+        Ok(allocation)
+    }
+}
+
+impl<ATYPE: AddressType> IntoIterator for MemoryRegion<ATYPE> {
+    type Item = PageAddress<ATYPE>;
+    type IntoIter = Range<Self::Item>;
+
+    fn into_iter(self) -> Self::IntoIter {
+        Range {
+            start: self.start,
+            end: self.end_exclusive,
+        }
+    }
+}
+
+impl From<MMIODescriptor> for MemoryRegion<Physical> {
+    fn from(desc: MMIODescriptor) -> Self {
+        let start = PageAddress::from(desc.start_addr.align_down_page());
+        let end_exclusive = PageAddress::from(desc.end_addr_exclusive().align_up_page());
+
+        Self {
+            start,
+            end_exclusive,
+        }
+    }
+}
+
+//------------------------------------------------------------------------------
+// MMIODescriptor
+//------------------------------------------------------------------------------
+
+impl MMIODescriptor {
+    /// Create an instance.
+    pub const fn new(start_addr: Address<Physical>, size: usize) -> Self {
+        assert!(size > 0);
+        let end_addr_exclusive = Address::new(start_addr.as_usize() + size);
+
+        Self {
+            start_addr,
+            end_addr_exclusive,
+        }
+    }
+
+    /// Return the start address.
+    pub const fn start_addr(&self) -> Address<Physical> {
+        self.start_addr
+    }
+
+    /// Return the exclusive end address.
+    pub fn end_addr_exclusive(&self) -> Address<Physical> {
+        self.end_addr_exclusive
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use crate::memory::Virtual;
+    use test_macros::kernel_test;
+
+    /// Sanity of [PageAddress] methods.
+    #[kernel_test]
+    fn pageaddress_type_method_sanity() {
+        let page_addr: PageAddress<Virtual> =
+            PageAddress::from(bsp::memory::mmu::KernelGranule::SIZE * 2);
+
+        assert_eq!(
+            page_addr.checked_offset(-2),
+            Some(PageAddress::<Virtual>::from(0))
+        );
+
+        assert_eq!(
+            page_addr.checked_offset(2),
+            Some(PageAddress::<Virtual>::from(
+                bsp::memory::mmu::KernelGranule::SIZE * 4
+            ))
+        );
+
+        assert_eq!(
+            PageAddress::<Virtual>::from(0).checked_offset(0),
+            Some(PageAddress::<Virtual>::from(0))
+        );
+        assert_eq!(PageAddress::<Virtual>::from(0).checked_offset(-1), None);
+
+        let max_page_addr = Address::<Virtual>::new(usize::MAX).align_down_page();
+        assert_eq!(
+            PageAddress::<Virtual>::from(max_page_addr).checked_offset(1),
+            None
+        );
+
+        let zero = PageAddress::<Virtual>::from(0);
+        let three = PageAddress::<Virtual>::from(bsp::memory::mmu::KernelGranule::SIZE * 3);
+        assert_eq!(PageAddress::steps_between(&zero, &three), Some(3));
+    }
+
+    /// Sanity of [MemoryRegion] methods.
+    #[kernel_test]
+    fn memoryregion_type_method_sanity() {
+        let zero = PageAddress::<Virtual>::from(0);
+        let zero_region = MemoryRegion::new(zero, zero);
+        assert_eq!(zero_region.num_pages(), 0);
+        assert_eq!(zero_region.size(), 0);
+
+        let one = PageAddress::<Virtual>::from(bsp::memory::mmu::KernelGranule::SIZE);
+        let one_region = MemoryRegion::new(zero, one);
+        assert_eq!(one_region.num_pages(), 1);
+        assert_eq!(one_region.size(), bsp::memory::mmu::KernelGranule::SIZE);
+
+        let three = PageAddress::<Virtual>::from(bsp::memory::mmu::KernelGranule::SIZE * 3);
+        let mut three_region = MemoryRegion::new(zero, three);
+        assert!(three_region.contains(zero.into_inner()));
+        assert!(!three_region.contains(three.into_inner()));
+        assert!(three_region.overlaps(&one_region));
+
+        let allocation = three_region
+            .take_first_n_pages(NonZeroUsize::new(2).unwrap())
+            .unwrap();
+        assert_eq!(allocation.num_pages(), 2);
+        assert_eq!(three_region.num_pages(), 1);
+
+        for (i, alloc) in allocation.into_iter().enumerate() {
+            assert_eq!(
+                alloc.into_inner().as_usize(),
+                i * bsp::memory::mmu::KernelGranule::SIZE
+            );
+        }
+    }
+}
diff --git a/20_timer_callbacks/kernel/src/panic_wait.rs b/20_timer_callbacks/kernel/src/panic_wait.rs
new file mode 100644
index 000000000..bc95f77c4
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/panic_wait.rs
@@ -0,0 +1,88 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! A panic handler that infinitely waits.
+
+use crate::{backtrace, cpu, exception, println};
+use core::panic::PanicInfo;
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// The point of exit for `libkernel`.
+///
+/// It is linked weakly, so that the integration tests can overload its standard behavior.
+#[linkage = "weak"]
+#[no_mangle]
+fn _panic_exit() -> ! {
+    #[cfg(not(feature = "test_build"))]
+    {
+        cpu::wait_forever()
+    }
+
+    #[cfg(feature = "test_build")]
+    {
+        cpu::qemu_exit_failure()
+    }
+}
+
+/// Stop immediately if called a second time.
+///
+/// # Note
+///
+/// Using atomics here relieves us from needing to use `unsafe` for the static variable.
+///
+/// On `AArch64`, which is the only implemented architecture at the time of writing this,
+/// [`AtomicBool::load`] and [`AtomicBool::store`] are lowered to ordinary load and store
+/// instructions. They are therefore safe to use even with MMU + caching deactivated.
+///
+/// [`AtomicBool::load`]: core::sync::atomic::AtomicBool::load
+/// [`AtomicBool::store`]: core::sync::atomic::AtomicBool::store
+fn panic_prevent_reenter() {
+    use core::sync::atomic::{AtomicBool, Ordering};
+
+    #[cfg(not(target_arch = "aarch64"))]
+    compile_error!("Add the target_arch to above's check if the following code is safe to use");
+
+    static PANIC_IN_PROGRESS: AtomicBool = AtomicBool::new(false);
+
+    if !PANIC_IN_PROGRESS.load(Ordering::Relaxed) {
+        PANIC_IN_PROGRESS.store(true, Ordering::Relaxed);
+
+        return;
+    }
+
+    _panic_exit()
+}
+
+#[panic_handler]
+fn panic(info: &PanicInfo) -> ! {
+    exception::asynchronous::local_irq_mask();
+
+    // Protect against panic infinite loops if any of the following code panics itself.
+    panic_prevent_reenter();
+
+    let timestamp = crate::time::time_manager().uptime();
+    let (location, line, column) = match info.location() {
+        Some(loc) => (loc.file(), loc.line(), loc.column()),
+        _ => ("???", 0, 0),
+    };
+
+    println!(
+        "[  {:>3}.{:06}] Kernel panic!\n\n\
+        Panic location:\n      File '{}', line {}, column {}\n\n\
+        {}\n\n\
+        {}",
+        timestamp.as_secs(),
+        timestamp.subsec_micros(),
+        location,
+        line,
+        column,
+        info.message().unwrap_or(&format_args!("")),
+        backtrace::Backtrace
+    );
+
+    _panic_exit()
+}
diff --git a/20_timer_callbacks/kernel/src/print.rs b/20_timer_callbacks/kernel/src/print.rs
new file mode 100644
index 000000000..8d56d2e4a
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/print.rs
@@ -0,0 +1,112 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Printing.
+
+use crate::console;
+use core::fmt;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+#[doc(hidden)]
+pub fn _print(args: fmt::Arguments) {
+    console::console().write_fmt(args).unwrap();
+}
+
+/// Prints without a newline.
+///
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
+#[macro_export]
+macro_rules! print {
+    ($($arg:tt)*) => ($crate::print::_print(format_args!($($arg)*)));
+}
+
+/// Prints with a newline.
+///
+/// Carbon copy from <https://doc.rust-lang.org/src/std/macros.rs.html>
+#[macro_export]
+macro_rules! println {
+    () => ($crate::print!("\n"));
+    ($($arg:tt)*) => ({
+        $crate::print::_print(format_args_nl!($($arg)*));
+    })
+}
+
+/// Prints an info, with a newline.
+#[macro_export]
+macro_rules! info {
+    ($string:expr) => ({
+        let timestamp = $crate::time::time_manager().uptime();
+
+        $crate::print::_print(format_args_nl!(
+            concat!("[  {:>3}.{:06}] ", $string),
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+        ));
+    });
+    ($format_string:expr, $($arg:tt)*) => ({
+        let timestamp = $crate::time::time_manager().uptime();
+
+        $crate::print::_print(format_args_nl!(
+            concat!("[  {:>3}.{:06}] ", $format_string),
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+            $($arg)*
+        ));
+    })
+}
+
+/// Prints a warning, with a newline.
+#[macro_export]
+macro_rules! warn {
+    ($string:expr) => ({
+        let timestamp = $crate::time::time_manager().uptime();
+
+        $crate::print::_print(format_args_nl!(
+            concat!("[W {:>3}.{:06}] ", $string),
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+        ));
+    });
+    ($format_string:expr, $($arg:tt)*) => ({
+        let timestamp = $crate::time::time_manager().uptime();
+
+        $crate::print::_print(format_args_nl!(
+            concat!("[W {:>3}.{:06}] ", $format_string),
+            timestamp.as_secs(),
+            timestamp.subsec_micros(),
+            $($arg)*
+        ));
+    })
+}
+
+/// Debug print, with a newline.
+#[macro_export]
+macro_rules! debug {
+    ($string:expr) => ({
+        if cfg!(feature = "debug_prints") {
+            let timestamp = $crate::time::time_manager().uptime();
+
+            $crate::print::_print(format_args_nl!(
+                concat!("<[>D {:>3}.{:06}> ", $string),
+                timestamp.as_secs(),
+                timestamp.subsec_micros(),
+            ));
+        }
+    });
+    ($format_string:expr, $($arg:tt)*) => ({
+        if cfg!(feature = "debug_prints") {
+            let timestamp = $crate::time::time_manager().uptime();
+
+            $crate::print::_print(format_args_nl!(
+                concat!("<D {:>3}.{:06}> ", $format_string),
+                timestamp.as_secs(),
+                timestamp.subsec_micros(),
+                $($arg)*
+            ));
+        }
+    })
+}
diff --git a/20_timer_callbacks/kernel/src/state.rs b/20_timer_callbacks/kernel/src/state.rs
new file mode 100644
index 000000000..0af3688c2
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/state.rs
@@ -0,0 +1,92 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! State information about the kernel itself.
+
+use core::sync::atomic::{AtomicU8, Ordering};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Different stages in the kernel execution.
+#[derive(Copy, Clone, Eq, PartialEq)]
+enum State {
+    /// The kernel starts booting in this state.
+    Init,
+
+    /// The kernel transitions to this state when jumping to `kernel_main()` (at the end of
+    /// `kernel_init()`, after all init calls are done).
+    SingleCoreMain,
+
+    /// The kernel transitions to this state when it boots the secondary cores, aka switches
+    /// exectution mode to symmetric multiprocessing (SMP).
+    MultiCoreMain,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Maintains the kernel state and state transitions.
+pub struct StateManager(AtomicU8);
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static STATE_MANAGER: StateManager = StateManager::new();
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the global StateManager.
+pub fn state_manager() -> &'static StateManager {
+    &STATE_MANAGER
+}
+
+impl StateManager {
+    const INIT: u8 = 0;
+    const SINGLE_CORE_MAIN: u8 = 1;
+    const MULTI_CORE_MAIN: u8 = 2;
+
+    /// Create a new instance.
+    pub const fn new() -> Self {
+        Self(AtomicU8::new(Self::INIT))
+    }
+
+    /// Return the current state.
+    fn state(&self) -> State {
+        let state = self.0.load(Ordering::Acquire);
+
+        match state {
+            Self::INIT => State::Init,
+            Self::SINGLE_CORE_MAIN => State::SingleCoreMain,
+            Self::MULTI_CORE_MAIN => State::MultiCoreMain,
+            _ => panic!("Invalid KERNEL_STATE"),
+        }
+    }
+
+    /// Return if the kernel is init state.
+    pub fn is_init(&self) -> bool {
+        self.state() == State::Init
+    }
+
+    /// Transition from Init to SingleCoreMain.
+    pub fn transition_to_single_core_main(&self) {
+        if self
+            .0
+            .compare_exchange(
+                Self::INIT,
+                Self::SINGLE_CORE_MAIN,
+                Ordering::Acquire,
+                Ordering::Relaxed,
+            )
+            .is_err()
+        {
+            panic!("transition_to_single_core_main() called while state != Init");
+        }
+    }
+}
diff --git a/20_timer_callbacks/kernel/src/symbols.rs b/20_timer_callbacks/kernel/src/symbols.rs
new file mode 100644
index 000000000..680b8eaf6
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/symbols.rs
@@ -0,0 +1,88 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Debug symbol support.
+
+use crate::memory::{Address, Virtual};
+use core::{cell::UnsafeCell, slice};
+use debug_symbol_types::Symbol;
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+// Symbol from the linker script.
+extern "Rust" {
+    static __kernel_symbols_start: UnsafeCell<()>;
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+/// This will be patched to the correct value by the "kernel symbols tool" after linking. This given
+/// value here is just a (safe) dummy.
+#[no_mangle]
+static NUM_KERNEL_SYMBOLS: u64 = 0;
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+fn kernel_symbol_section_virt_start_addr() -> Address<Virtual> {
+    Address::new(unsafe { __kernel_symbols_start.get() as usize })
+}
+
+fn num_kernel_symbols() -> usize {
+    unsafe {
+        // Read volatile is needed here to prevent the compiler from optimizing NUM_KERNEL_SYMBOLS
+        // away.
+        core::ptr::read_volatile(&NUM_KERNEL_SYMBOLS as *const u64) as usize
+    }
+}
+
+fn kernel_symbols_slice() -> &'static [Symbol] {
+    let ptr = kernel_symbol_section_virt_start_addr().as_usize() as *const Symbol;
+
+    unsafe { slice::from_raw_parts(ptr, num_kernel_symbols()) }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Retrieve the symbol corresponding to a virtual address, if any.
+pub fn lookup_symbol(addr: Address<Virtual>) -> Option<&'static Symbol> {
+    kernel_symbols_slice()
+        .iter()
+        .find(|&i| i.contains(addr.as_usize()))
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// Sanity of symbols module.
+    #[kernel_test]
+    fn symbols_sanity() {
+        let first_sym = lookup_symbol(Address::new(
+            crate::common::is_aligned as *const usize as usize,
+        ))
+        .unwrap()
+        .name();
+
+        assert_eq!(first_sym, "libkernel::common::is_aligned");
+
+        let second_sym = lookup_symbol(Address::new(crate::version as *const usize as usize))
+            .unwrap()
+            .name();
+
+        assert_eq!(second_sym, "libkernel::version");
+    }
+}
diff --git a/20_timer_callbacks/kernel/src/synchronization.rs b/20_timer_callbacks/kernel/src/synchronization.rs
new file mode 100644
index 000000000..ab2b86e6f
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/synchronization.rs
@@ -0,0 +1,159 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Synchronization primitives.
+//!
+//! # Resources
+//!
+//!   - <https://doc.rust-lang.org/book/ch16-04-extensible-concurrency-sync-and-send.html>
+//!   - <https://stackoverflow.com/questions/59428096/understanding-the-send-trait>
+//!   - <https://doc.rust-lang.org/std/cell/index.html>
+
+use core::cell::UnsafeCell;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Synchronization interfaces.
+pub mod interface {
+
+    /// Any object implementing this trait guarantees exclusive access to the data wrapped within
+    /// the Mutex for the duration of the provided closure.
+    pub trait Mutex {
+        /// The type of the data that is wrapped by this mutex.
+        type Data;
+
+        /// Locks the mutex and grants the closure temporary mutable access to the wrapped data.
+        fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R;
+    }
+
+    /// A reader-writer exclusion type.
+    ///
+    /// The implementing object allows either a number of readers or at most one writer at any point
+    /// in time.
+    pub trait ReadWriteEx {
+        /// The type of encapsulated data.
+        type Data;
+
+        /// Grants temporary mutable access to the encapsulated data.
+        fn write<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R;
+
+        /// Grants temporary immutable access to the encapsulated data.
+        fn read<'a, R>(&'a self, f: impl FnOnce(&'a Self::Data) -> R) -> R;
+    }
+}
+
+/// A pseudo-lock for teaching purposes.
+///
+/// In contrast to a real Mutex implementation, does not protect against concurrent access from
+/// other cores to the contained data. This part is preserved for later lessons.
+///
+/// The lock will only be used as long as it is safe to do so, i.e. as long as the kernel is
+/// executing on a single core.
+pub struct IRQSafeNullLock<T>
+where
+    T: ?Sized,
+{
+    data: UnsafeCell<T>,
+}
+
+/// A pseudo-lock that is RW during the single-core kernel init phase and RO afterwards.
+///
+/// Intended to encapsulate data that is populated during kernel init when no concurrency exists.
+pub struct InitStateLock<T>
+where
+    T: ?Sized,
+{
+    data: UnsafeCell<T>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+unsafe impl<T> Send for IRQSafeNullLock<T> where T: ?Sized + Send {}
+unsafe impl<T> Sync for IRQSafeNullLock<T> where T: ?Sized + Send {}
+
+impl<T> IRQSafeNullLock<T> {
+    /// Create an instance.
+    pub const fn new(data: T) -> Self {
+        Self {
+            data: UnsafeCell::new(data),
+        }
+    }
+}
+
+unsafe impl<T> Send for InitStateLock<T> where T: ?Sized + Send {}
+unsafe impl<T> Sync for InitStateLock<T> where T: ?Sized + Send {}
+
+impl<T> InitStateLock<T> {
+    /// Create an instance.
+    pub const fn new(data: T) -> Self {
+        Self {
+            data: UnsafeCell::new(data),
+        }
+    }
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+use crate::{exception, state};
+
+impl<T> interface::Mutex for IRQSafeNullLock<T> {
+    type Data = T;
+
+    fn lock<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R {
+        // In a real lock, there would be code encapsulating this line that ensures that this
+        // mutable reference will ever only be given out once at a time.
+        let data = unsafe { &mut *self.data.get() };
+
+        // Execute the closure while IRQs are masked.
+        exception::asynchronous::exec_with_irq_masked(|| f(data))
+    }
+}
+
+impl<T> interface::ReadWriteEx for InitStateLock<T> {
+    type Data = T;
+
+    fn write<'a, R>(&'a self, f: impl FnOnce(&'a mut Self::Data) -> R) -> R {
+        assert!(
+            state::state_manager().is_init(),
+            "InitStateLock::write called after kernel init phase"
+        );
+        assert!(
+            !exception::asynchronous::is_local_irq_masked(),
+            "InitStateLock::write called with IRQs unmasked"
+        );
+
+        let data = unsafe { &mut *self.data.get() };
+
+        f(data)
+    }
+
+    fn read<'a, R>(&'a self, f: impl FnOnce(&'a Self::Data) -> R) -> R {
+        let data = unsafe { &*self.data.get() };
+
+        f(data)
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Testing
+//--------------------------------------------------------------------------------------------------
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+    use test_macros::kernel_test;
+
+    /// InitStateLock must be transparent.
+    #[kernel_test]
+    fn init_state_lock_is_transparent() {
+        use core::mem::size_of;
+
+        assert_eq!(size_of::<InitStateLock<u64>>(), size_of::<u64>());
+    }
+}
diff --git a/20_timer_callbacks/kernel/src/time.rs b/20_timer_callbacks/kernel/src/time.rs
new file mode 100644
index 000000000..801941827
--- /dev/null
+++ b/20_timer_callbacks/kernel/src/time.rs
@@ -0,0 +1,263 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Timer primitives.
+//!
+//! # Resources
+//!
+//! - <https://stackoverflow.com/questions/41081240/idiomatic-callbacks-in-rust>
+//! - <https://doc.rust-lang.org/stable/std/panic/fn.set_hook.html>
+
+#[cfg(target_arch = "aarch64")]
+#[path = "_arch/aarch64/time.rs"]
+mod arch_time;
+
+use crate::{
+    driver, exception,
+    exception::asynchronous::IRQNumber,
+    synchronization::{interface::Mutex, IRQSafeNullLock},
+    warn,
+};
+use alloc::{boxed::Box, vec::Vec};
+use core::{
+    sync::atomic::{AtomicBool, Ordering},
+    time::Duration,
+};
+
+//--------------------------------------------------------------------------------------------------
+// Private Definitions
+//--------------------------------------------------------------------------------------------------
+
+struct Timeout {
+    due_time: Duration,
+    period: Option<Duration>,
+    callback: TimeoutCallback,
+}
+
+struct OrderedTimeoutQueue {
+    // Can be replaced with a BinaryHeap once it's new() becomes const.
+    inner: Vec<Timeout>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// The callback type used by timer IRQs.
+pub type TimeoutCallback = Box<dyn Fn() + Send>;
+
+/// Provides time management functions.
+pub struct TimeManager {
+    queue: IRQSafeNullLock<OrderedTimeoutQueue>,
+}
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static TIME_MANAGER: TimeManager = TimeManager::new();
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+impl Timeout {
+    pub fn is_periodic(&self) -> bool {
+        self.period.is_some()
+    }
+
+    pub fn refresh(&mut self) {
+        if let Some(delay) = self.period {
+            self.due_time += delay;
+        }
+    }
+}
+
+impl OrderedTimeoutQueue {
+    pub const fn new() -> Self {
+        Self { inner: Vec::new() }
+    }
+
+    pub fn push(&mut self, timeout: Timeout) {
+        self.inner.push(timeout);
+
+        // Note reverse compare order so that earliest expiring item is at end of vec. We do this so
+        // that we can use Vec::pop below to retrieve the item that is next due.
+        self.inner.sort_by(|a, b| b.due_time.cmp(&a.due_time));
+    }
+
+    pub fn peek_next_due_time(&self) -> Option<Duration> {
+        let timeout = self.inner.last()?;
+
+        Some(timeout.due_time)
+    }
+
+    pub fn pop(&mut self) -> Option<Timeout> {
+        self.inner.pop()
+    }
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Return a reference to the global TimeManager.
+pub fn time_manager() -> &'static TimeManager {
+    &TIME_MANAGER
+}
+
+impl TimeManager {
+    /// Compatibility string.
+    pub const COMPATIBLE: &'static str = "ARM Architectural Timer";
+
+    /// Create an instance.
+    pub const fn new() -> Self {
+        Self {
+            queue: IRQSafeNullLock::new(OrderedTimeoutQueue::new()),
+        }
+    }
+
+    /// The timer's resolution.
+    pub fn resolution(&self) -> Duration {
+        arch_time::resolution()
+    }
+
+    /// The uptime since power-on of the device.
+    ///
+    /// This includes time consumed by firmware and bootloaders.
+    pub fn uptime(&self) -> Duration {
+        arch_time::uptime()
+    }
+
+    /// Spin for a given duration.
+    pub fn spin_for(&self, duration: Duration) {
+        arch_time::spin_for(duration)
+    }
+
+    /// Set a timeout.
+    fn set_timeout(&self, timeout: Timeout) {
+        self.queue.lock(|queue| {
+            queue.push(timeout);
+
+            arch_time::set_timeout_irq(queue.peek_next_due_time().unwrap());
+        });
+    }
+
+    /// Set a one-shot timeout.
+    pub fn set_timeout_once(&self, delay: Duration, callback: TimeoutCallback) {
+        let timeout = Timeout {
+            due_time: self.uptime() + delay,
+            period: None,
+            callback,
+        };
+
+        self.set_timeout(timeout);
+    }
+
+    /// Set a periodic timeout.
+    pub fn set_timeout_periodic(&self, delay: Duration, callback: TimeoutCallback) {
+        let timeout = Timeout {
+            due_time: self.uptime() + delay,
+            period: Some(delay),
+            callback,
+        };
+
+        self.set_timeout(timeout);
+    }
+}
+
+/// Initialize the timer subsystem.
+pub fn init() -> Result<(), &'static str> {
+    static INIT_DONE: AtomicBool = AtomicBool::new(false);
+    if INIT_DONE.load(Ordering::Relaxed) {
+        return Err("Init already done");
+    }
+
+    let timer_descriptor =
+        driver::DeviceDriverDescriptor::new(time_manager(), None, Some(arch_time::timeout_irq()));
+    driver::driver_manager().register_driver(timer_descriptor);
+
+    INIT_DONE.store(true, Ordering::Relaxed);
+    Ok(())
+}
+
+//------------------------------------------------------------------------------
+// OS Interface Code
+//------------------------------------------------------------------------------
+
+impl driver::interface::DeviceDriver for TimeManager {
+    type IRQNumberType = IRQNumber;
+
+    fn compatible(&self) -> &'static str {
+        Self::COMPATIBLE
+    }
+
+    fn register_and_enable_irq_handler(
+        &'static self,
+        irq_number: &Self::IRQNumberType,
+    ) -> Result<(), &'static str> {
+        use exception::asynchronous::{irq_manager, IRQHandlerDescriptor};
+
+        let descriptor = IRQHandlerDescriptor::new(*irq_number, Self::COMPATIBLE, self);
+
+        irq_manager().register_handler(descriptor)?;
+        irq_manager().enable(irq_number);
+
+        Ok(())
+    }
+}
+
+impl exception::asynchronous::interface::IRQHandler for TimeManager {
+    fn handle(&self) -> Result<(), &'static str> {
+        arch_time::conclude_timeout_irq();
+
+        let maybe_timeout: Option<Timeout> = self.queue.lock(|queue| {
+            let next_due_time = queue.peek_next_due_time()?;
+            if next_due_time > self.uptime() {
+                return None;
+            }
+
+            let mut timeout = queue.pop().unwrap();
+
+            // Refresh as early as possible to prevent drift.
+            if timeout.is_periodic() {
+                timeout.refresh();
+            }
+
+            Some(timeout)
+        });
+
+        let timeout = match maybe_timeout {
+            None => {
+                warn!("Spurious timeout IRQ");
+                return Ok(());
+            }
+            Some(t) => t,
+        };
+
+        // Important: Call the callback while not holding any lock, because the callback might
+        // attempt to modify data that is protected by a lock (in particular, the timeout queue
+        // itself).
+        (timeout.callback)();
+
+        self.queue.lock(|queue| {
+            if timeout.is_periodic() {
+                // There might be some overhead involved in the periodic path, because the timeout
+                // item is first popped from the underlying Vec and then pushed back again. It could
+                // be faster to keep the item in the queue and find a way to work with a reference
+                // to it.
+                //
+                // We are not going this route on purpose, though. It allows to keep the code simple
+                // and the focus on the high-level concepts.
+                queue.push(timeout);
+            };
+
+            if let Some(due_time) = queue.peek_next_due_time() {
+                arch_time::set_timeout_irq(due_time);
+            }
+        });
+
+        Ok(())
+    }
+}
diff --git a/20_timer_callbacks/kernel/tests/00_console_sanity.rb b/20_timer_callbacks/kernel/tests/00_console_sanity.rb
new file mode 100644
index 000000000..4dde55762
--- /dev/null
+++ b/20_timer_callbacks/kernel/tests/00_console_sanity.rb
@@ -0,0 +1,48 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+
+require 'console_io_test'
+
+# Verify sending and receiving works as expected.
+class TxRxHandshakeTest < SubtestBase
+    def name
+        'Transmit and Receive handshake'
+    end
+
+    def run(qemu_out, qemu_in)
+        qemu_in.write_nonblock('ABC')
+        expect_or_raise(qemu_out, 'OK1234')
+    end
+end
+
+# Check for correct TX statistics implementation. Depends on test 1 being run first.
+class TxStatisticsTest < SubtestBase
+    def name
+        'Transmit statistics'
+    end
+
+    def run(qemu_out, _qemu_in)
+        expect_or_raise(qemu_out, '6')
+    end
+end
+
+# Check for correct RX statistics implementation. Depends on test 1 being run first.
+class RxStatisticsTest < SubtestBase
+    def name
+        'Receive statistics'
+    end
+
+    def run(qemu_out, _qemu_in)
+        expect_or_raise(qemu_out, '3')
+    end
+end
+
+##--------------------------------------------------------------------------------------------------
+## Test registration
+##--------------------------------------------------------------------------------------------------
+def subtest_collection
+    [TxRxHandshakeTest.new, TxStatisticsTest.new, RxStatisticsTest.new]
+end
diff --git a/20_timer_callbacks/kernel/tests/00_console_sanity.rs b/20_timer_callbacks/kernel/tests/00_console_sanity.rs
new file mode 100644
index 000000000..2c0225b7a
--- /dev/null
+++ b/20_timer_callbacks/kernel/tests/00_console_sanity.rs
@@ -0,0 +1,38 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Console sanity tests - RX, TX and statistics.
+
+#![feature(format_args_nl)]
+#![no_main]
+#![no_std]
+
+/// Console tests should time out on the I/O harness in case of panic.
+mod panic_wait_forever;
+
+use libkernel::{bsp, console, cpu, exception, memory, print};
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    use console::console;
+
+    exception::handling_init();
+    memory::init();
+    bsp::driver::qemu_bring_up_console();
+
+    // Handshake
+    assert_eq!(console().read_char(), 'A');
+    assert_eq!(console().read_char(), 'B');
+    assert_eq!(console().read_char(), 'C');
+    print!("OK1234");
+
+    // 6
+    print!("{}", console().chars_written());
+
+    // 3
+    print!("{}", console().chars_read());
+
+    // The QEMU process running this test will be closed by the I/O test harness.
+    cpu::wait_forever();
+}
diff --git a/20_timer_callbacks/kernel/tests/01_timer_sanity.rs b/20_timer_callbacks/kernel/tests/01_timer_sanity.rs
new file mode 100644
index 000000000..8188b9424
--- /dev/null
+++ b/20_timer_callbacks/kernel/tests/01_timer_sanity.rs
@@ -0,0 +1,51 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Timer sanity tests.
+
+#![feature(custom_test_frameworks)]
+#![no_main]
+#![no_std]
+#![reexport_test_harness_main = "test_main"]
+#![test_runner(libkernel::test_runner)]
+
+use core::time::Duration;
+use libkernel::{bsp, cpu, exception, memory, time};
+use test_macros::kernel_test;
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    exception::handling_init();
+    memory::init();
+    bsp::driver::qemu_bring_up_console();
+
+    // Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
+
+    test_main();
+
+    cpu::qemu_exit_success()
+}
+
+/// Simple check that the timer is running.
+#[kernel_test]
+fn timer_is_counting() {
+    assert!(time::time_manager().uptime().as_nanos() > 0)
+}
+
+/// Timer resolution must be sufficient.
+#[kernel_test]
+fn timer_resolution_is_sufficient() {
+    assert!(time::time_manager().resolution().as_nanos() > 0);
+    assert!(time::time_manager().resolution().as_nanos() < 100)
+}
+
+/// Sanity check spin_for() implementation.
+#[kernel_test]
+fn spin_accuracy_check_1_second() {
+    let t1 = time::time_manager().uptime();
+    time::time_manager().spin_for(Duration::from_secs(1));
+    let t2 = time::time_manager().uptime();
+
+    assert_eq!((t2 - t1).as_secs(), 1)
+}
diff --git a/20_timer_callbacks/kernel/tests/02_exception_sync_page_fault.rs b/20_timer_callbacks/kernel/tests/02_exception_sync_page_fault.rs
new file mode 100644
index 000000000..fab44c8f0
--- /dev/null
+++ b/20_timer_callbacks/kernel/tests/02_exception_sync_page_fault.rs
@@ -0,0 +1,37 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Page faults must result in synchronous exceptions.
+
+#![feature(format_args_nl)]
+#![no_main]
+#![no_std]
+
+/// Overwrites libkernel's `panic_wait::_panic_exit()` so that it returns a "success" code.
+///
+/// In this test, reaching the panic is a success, because it is called from the synchronous
+/// exception handler, which is what this test wants to achieve.
+///
+/// It also means that this integration test can not use any other code that calls panic!() directly
+/// or indirectly.
+mod panic_exit_success;
+
+use libkernel::{bsp, cpu, exception, info, memory, println};
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    exception::handling_init();
+    memory::init();
+    bsp::driver::qemu_bring_up_console();
+
+    // This line will be printed as the test header.
+    println!("Testing synchronous exception handling by causing a page fault");
+
+    info!("Writing to bottom of address space to address 1 GiB...");
+    let big_addr: u64 = 1024 * 1024 * 1024;
+    core::ptr::read_volatile(big_addr as *mut u64);
+
+    // If execution reaches here, the memory access above did not cause a page fault exception.
+    cpu::qemu_exit_failure()
+}
diff --git a/20_timer_callbacks/kernel/tests/03_exception_restore_sanity.rb b/20_timer_callbacks/kernel/tests/03_exception_restore_sanity.rb
new file mode 100644
index 000000000..5f52e0c7c
--- /dev/null
+++ b/20_timer_callbacks/kernel/tests/03_exception_restore_sanity.rb
@@ -0,0 +1,25 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+require 'console_io_test'
+
+# Verify that exception restore works.
+class ExceptionRestoreTest < SubtestBase
+    def name
+        'Exception restore'
+    end
+
+    def run(qemu_out, _qemu_in)
+        expect_or_raise(qemu_out, 'Back from system call!')
+    end
+end
+
+##--------------------------------------------------------------------------------------------------
+## Test registration
+##--------------------------------------------------------------------------------------------------
+def subtest_collection
+    [ExceptionRestoreTest.new]
+end
diff --git a/20_timer_callbacks/kernel/tests/03_exception_restore_sanity.rs b/20_timer_callbacks/kernel/tests/03_exception_restore_sanity.rs
new file mode 100644
index 000000000..f176c6a67
--- /dev/null
+++ b/20_timer_callbacks/kernel/tests/03_exception_restore_sanity.rs
@@ -0,0 +1,49 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! A simple sanity test to see if exception restore code works.
+
+#![feature(format_args_nl)]
+#![no_main]
+#![no_std]
+
+/// Console tests should time out on the I/O harness in case of panic.
+mod panic_wait_forever;
+
+use core::arch::asm;
+use libkernel::{bsp, cpu, exception, info, memory, println};
+
+#[inline(never)]
+fn nested_system_call() {
+    #[cfg(target_arch = "aarch64")]
+    unsafe {
+        asm!("svc #0x1337", options(nomem, nostack, preserves_flags));
+    }
+
+    #[cfg(not(target_arch = "aarch64"))]
+    {
+        info!("Not supported yet");
+        cpu::wait_forever();
+    }
+}
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    exception::handling_init();
+    memory::init();
+    bsp::driver::qemu_bring_up_console();
+
+    // This line will be printed as the test header.
+    println!("Testing exception restore");
+
+    info!("Making a dummy system call");
+
+    // Calling this inside a function indirectly tests if the link register is restored properly.
+    nested_system_call();
+
+    info!("Back from system call!");
+
+    // The QEMU process running this test will be closed by the I/O test harness.
+    cpu::wait_forever();
+}
diff --git a/20_timer_callbacks/kernel/tests/04_exception_irq_sanity.rs b/20_timer_callbacks/kernel/tests/04_exception_irq_sanity.rs
new file mode 100644
index 000000000..e6f94c91f
--- /dev/null
+++ b/20_timer_callbacks/kernel/tests/04_exception_irq_sanity.rs
@@ -0,0 +1,67 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! IRQ handling sanity tests.
+
+#![feature(custom_test_frameworks)]
+#![no_main]
+#![no_std]
+#![reexport_test_harness_main = "test_main"]
+#![test_runner(libkernel::test_runner)]
+
+use libkernel::{bsp, cpu, exception, memory};
+use test_macros::kernel_test;
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    memory::init();
+    bsp::driver::qemu_bring_up_console();
+
+    exception::handling_init();
+    exception::asynchronous::local_irq_unmask();
+
+    test_main();
+
+    cpu::qemu_exit_success()
+}
+
+/// Check that IRQ masking works.
+#[kernel_test]
+fn local_irq_mask_works() {
+    // Precondition: IRQs are unmasked.
+    assert!(exception::asynchronous::is_local_irq_masked());
+
+    exception::asynchronous::local_irq_mask();
+    assert!(!exception::asynchronous::is_local_irq_masked());
+
+    // Restore earlier state.
+    exception::asynchronous::local_irq_unmask();
+}
+
+/// Check that IRQ unmasking works.
+#[kernel_test]
+fn local_irq_unmask_works() {
+    // Precondition: IRQs are masked.
+    exception::asynchronous::local_irq_mask();
+    assert!(!exception::asynchronous::is_local_irq_masked());
+
+    exception::asynchronous::local_irq_unmask();
+    assert!(exception::asynchronous::is_local_irq_masked());
+}
+
+/// Check that IRQ mask save is saving "something".
+#[kernel_test]
+fn local_irq_mask_save_works() {
+    // Precondition: IRQs are unmasked.
+    assert!(exception::asynchronous::is_local_irq_masked());
+
+    let first = exception::asynchronous::local_irq_mask_save();
+    assert!(!exception::asynchronous::is_local_irq_masked());
+
+    let second = exception::asynchronous::local_irq_mask_save();
+    assert_ne!(first, second);
+
+    exception::asynchronous::local_irq_restore(first);
+    assert!(exception::asynchronous::is_local_irq_masked());
+}
diff --git a/20_timer_callbacks/kernel/tests/05_backtrace_sanity.rb b/20_timer_callbacks/kernel/tests/05_backtrace_sanity.rb
new file mode 100644
index 000000000..5650f97c5
--- /dev/null
+++ b/20_timer_callbacks/kernel/tests/05_backtrace_sanity.rb
@@ -0,0 +1,39 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+require 'console_io_test'
+
+# Verify that panic produces a backtrace.
+class PanicBacktraceTest < SubtestBase
+    def name
+        'Panic produces backtrace'
+    end
+
+    def run(qemu_out, _qemu_in)
+        expect_or_raise(qemu_out, 'Kernel panic!')
+        expect_or_raise(qemu_out, 'Backtrace:')
+    end
+end
+
+# Verify backtrace correctness.
+class BacktraceCorrectnessTest < SubtestBase
+    def name
+        'Backtrace is correct'
+    end
+
+    def run(qemu_out, _qemu_in)
+        expect_or_raise(qemu_out, '| core::panicking::panic')
+        expect_or_raise(qemu_out, '| _05_backtrace_sanity::nested')
+        expect_or_raise(qemu_out, '| kernel_init')
+    end
+end
+
+##--------------------------------------------------------------------------------------------------
+## Test registration
+##--------------------------------------------------------------------------------------------------
+def subtest_collection
+    [PanicBacktraceTest.new, BacktraceCorrectnessTest.new]
+end
diff --git a/20_timer_callbacks/kernel/tests/05_backtrace_sanity.rs b/20_timer_callbacks/kernel/tests/05_backtrace_sanity.rs
new file mode 100644
index 000000000..f75c0ea3e
--- /dev/null
+++ b/20_timer_callbacks/kernel/tests/05_backtrace_sanity.rs
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Test if backtracing code detects an invalid frame pointer.
+
+#![feature(format_args_nl)]
+#![no_main]
+#![no_std]
+
+/// Console tests should time out on the I/O harness in case of panic.
+mod panic_wait_forever;
+
+use libkernel::{bsp, cpu, exception, memory};
+
+#[inline(never)]
+fn nested() {
+    panic!()
+}
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    exception::handling_init();
+    memory::init();
+    bsp::driver::qemu_bring_up_console();
+
+    nested();
+
+    // The QEMU process running this test will be closed by the I/O test harness.
+    cpu::wait_forever()
+}
diff --git a/20_timer_callbacks/kernel/tests/06_backtrace_invalid_frame.rb b/20_timer_callbacks/kernel/tests/06_backtrace_invalid_frame.rb
new file mode 100644
index 000000000..7601cf971
--- /dev/null
+++ b/20_timer_callbacks/kernel/tests/06_backtrace_invalid_frame.rb
@@ -0,0 +1,26 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+require 'console_io_test'
+
+# Test detection of invalid frame pointers.
+class InvalidFramePointerTest < SubtestBase
+    def name
+        'Detect invalid frame pointer'
+    end
+
+    def run(qemu_out, _qemu_in)
+        expect_or_raise(qemu_out,
+                        /Encountered invalid frame pointer \(.*\) during backtrace/)
+    end
+end
+
+##--------------------------------------------------------------------------------------------------
+## Test registration
+##--------------------------------------------------------------------------------------------------
+def subtest_collection
+    [InvalidFramePointerTest.new]
+end
diff --git a/20_timer_callbacks/kernel/tests/06_backtrace_invalid_frame.rs b/20_timer_callbacks/kernel/tests/06_backtrace_invalid_frame.rs
new file mode 100644
index 000000000..33d3c02df
--- /dev/null
+++ b/20_timer_callbacks/kernel/tests/06_backtrace_invalid_frame.rs
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Test if backtracing code detects an invalid frame pointer.
+
+#![feature(format_args_nl)]
+#![no_main]
+#![no_std]
+
+/// Console tests should time out on the I/O harness in case of panic.
+mod panic_wait_forever;
+
+use libkernel::{backtrace, bsp, cpu, exception, memory};
+
+#[inline(never)]
+fn nested() {
+    unsafe { backtrace::corrupt_previous_frame_addr() };
+
+    panic!()
+}
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    exception::handling_init();
+    memory::init();
+    bsp::driver::qemu_bring_up_console();
+
+    nested();
+
+    // The QEMU process running this test will be closed by the I/O test harness.
+    cpu::wait_forever()
+}
diff --git a/20_timer_callbacks/kernel/tests/07_backtrace_invalid_link.rb b/20_timer_callbacks/kernel/tests/07_backtrace_invalid_link.rb
new file mode 100644
index 000000000..0fabcf4c4
--- /dev/null
+++ b/20_timer_callbacks/kernel/tests/07_backtrace_invalid_link.rb
@@ -0,0 +1,25 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+require 'console_io_test'
+
+# Test detection of invalid link.
+class InvalidLinkTest < SubtestBase
+    def name
+        'Detect invalid link'
+    end
+
+    def run(qemu_out, _qemu_in)
+        expect_or_raise(qemu_out, /Link address \(.*\) is not contained in kernel .text section/)
+    end
+end
+
+##--------------------------------------------------------------------------------------------------
+## Test registration
+##--------------------------------------------------------------------------------------------------
+def subtest_collection
+    [InvalidLinkTest.new]
+end
diff --git a/20_timer_callbacks/kernel/tests/07_backtrace_invalid_link.rs b/20_timer_callbacks/kernel/tests/07_backtrace_invalid_link.rs
new file mode 100644
index 000000000..bcb0538a6
--- /dev/null
+++ b/20_timer_callbacks/kernel/tests/07_backtrace_invalid_link.rs
@@ -0,0 +1,38 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Test if backtracing code detects an invalid link.
+
+#![feature(format_args_nl)]
+#![no_main]
+#![no_std]
+
+/// Console tests should time out on the I/O harness in case of panic.
+mod panic_wait_forever;
+
+use libkernel::{backtrace, bsp, cpu, exception, memory};
+
+#[inline(never)]
+fn nested_2() -> &'static str {
+    unsafe { backtrace::corrupt_link() };
+    libkernel::println!("{}", libkernel::backtrace::Backtrace);
+    "foo"
+}
+
+#[inline(never)]
+fn nested_1() {
+    libkernel::println!("{}", nested_2())
+}
+
+#[no_mangle]
+unsafe fn kernel_init() -> ! {
+    exception::handling_init();
+    memory::init();
+    bsp::driver::qemu_bring_up_console();
+
+    nested_1();
+
+    // The QEMU process running this test will be closed by the I/O test harness.
+    cpu::wait_forever()
+}
diff --git a/20_timer_callbacks/kernel/tests/boot_test_string.rb b/20_timer_callbacks/kernel/tests/boot_test_string.rb
new file mode 100644
index 000000000..d65f1a92e
--- /dev/null
+++ b/20_timer_callbacks/kernel/tests/boot_test_string.rb
@@ -0,0 +1,3 @@
+# frozen_string_literal: true
+
+EXPECTED_PRINT = 'Once 5'
diff --git a/20_timer_callbacks/kernel/tests/panic_exit_success/mod.rs b/20_timer_callbacks/kernel/tests/panic_exit_success/mod.rs
new file mode 100644
index 000000000..908fac51c
--- /dev/null
+++ b/20_timer_callbacks/kernel/tests/panic_exit_success/mod.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+
+/// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
+#[no_mangle]
+fn _panic_exit() -> ! {
+    libkernel::cpu::qemu_exit_success()
+}
diff --git a/20_timer_callbacks/kernel/tests/panic_wait_forever/mod.rs b/20_timer_callbacks/kernel/tests/panic_wait_forever/mod.rs
new file mode 100644
index 000000000..7a4effa50
--- /dev/null
+++ b/20_timer_callbacks/kernel/tests/panic_wait_forever/mod.rs
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+/// Overwrites libkernel's `panic_wait::_panic_exit()` with wait_forever.
+#[no_mangle]
+fn _panic_exit() -> ! {
+    libkernel::cpu::wait_forever()
+}
diff --git a/20_timer_callbacks/kernel_symbols.mk b/20_timer_callbacks/kernel_symbols.mk
new file mode 100644
index 000000000..d496ea8ae
--- /dev/null
+++ b/20_timer_callbacks/kernel_symbols.mk
@@ -0,0 +1,117 @@
+## SPDX-License-Identifier: MIT OR Apache-2.0
+##
+## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+
+include ../common/format.mk
+include ../common/docker.mk
+
+##--------------------------------------------------------------------------------------------------
+## Check for input variables that need be exported by the calling Makefile
+##--------------------------------------------------------------------------------------------------
+ifndef KERNEL_SYMBOLS_TOOL_PATH
+$(error KERNEL_SYMBOLS_TOOL_PATH is not set)
+endif
+
+ifndef TARGET
+$(error TARGET is not set)
+endif
+
+ifndef KERNEL_SYMBOLS_INPUT_ELF
+$(error KERNEL_SYMBOLS_INPUT_ELF is not set)
+endif
+
+ifndef KERNEL_SYMBOLS_OUTPUT_ELF
+$(error KERNEL_SYMBOLS_OUTPUT_ELF is not set)
+endif
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Targets and Prerequisites
+##--------------------------------------------------------------------------------------------------
+KERNEL_SYMBOLS_MANIFEST      = kernel_symbols/Cargo.toml
+KERNEL_SYMBOLS_LINKER_SCRIPT = kernel_symbols/kernel_symbols.ld
+
+KERNEL_SYMBOLS_RS           = $(KERNEL_SYMBOLS_INPUT_ELF)_symbols.rs
+KERNEL_SYMBOLS_DEMANGLED_RS = $(shell pwd)/$(KERNEL_SYMBOLS_INPUT_ELF)_symbols_demangled.rs
+
+KERNEL_SYMBOLS_ELF      = target/$(TARGET)/release/kernel_symbols
+KERNEL_SYMBOLS_STRIPPED = target/$(TARGET)/release/kernel_symbols_stripped
+
+# Export for build.rs of kernel_symbols crate.
+export KERNEL_SYMBOLS_DEMANGLED_RS
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Command building blocks
+##--------------------------------------------------------------------------------------------------
+GET_SYMBOLS_SECTION_VIRT_ADDR = $(DOCKER_TOOLS) $(EXEC_SYMBOLS_TOOL) \
+    --get_symbols_section_virt_addr $(KERNEL_SYMBOLS_OUTPUT_ELF)
+
+RUSTFLAGS = -C link-arg=--script=$(KERNEL_SYMBOLS_LINKER_SCRIPT) \
+    -C link-arg=--section-start=.rodata=$$($(GET_SYMBOLS_SECTION_VIRT_ADDR))
+
+RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) \
+    -D warnings                   \
+    -D missing_docs
+
+COMPILER_ARGS = --target=$(TARGET) \
+    --release
+
+RUSTC_CMD   = cargo rustc $(COMPILER_ARGS) --manifest-path $(KERNEL_SYMBOLS_MANIFEST)
+OBJCOPY_CMD = rust-objcopy \
+    --strip-all            \
+    -O binary
+
+EXEC_SYMBOLS_TOOL  = ruby $(KERNEL_SYMBOLS_TOOL_PATH)/main.rb
+
+##------------------------------------------------------------------------------
+## Dockerization
+##------------------------------------------------------------------------------
+DOCKER_CMD = docker run -t --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
+
+# DOCKER_IMAGE defined in include file (see top of this file).
+DOCKER_TOOLS = $(DOCKER_CMD) $(DOCKER_IMAGE)
+
+
+
+##--------------------------------------------------------------------------------------------------
+## Targets
+##--------------------------------------------------------------------------------------------------
+.PHONY: all symbols measure_time_start measure_time_finish
+
+all: measure_time_start symbols measure_time_finish
+
+symbols:
+	@cp $(KERNEL_SYMBOLS_INPUT_ELF) $(KERNEL_SYMBOLS_OUTPUT_ELF)
+
+	@$(DOCKER_TOOLS) $(EXEC_SYMBOLS_TOOL) --gen_symbols $(KERNEL_SYMBOLS_OUTPUT_ELF) \
+                $(KERNEL_SYMBOLS_RS)
+
+	$(call color_progress_prefix, "Demangling")
+	@echo Symbol names
+	@cat $(KERNEL_SYMBOLS_RS) | rustfilt > $(KERNEL_SYMBOLS_DEMANGLED_RS)
+
+	@RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(RUSTC_CMD)
+
+	$(call color_progress_prefix, "Stripping")
+	@echo Symbols ELF file
+	@$(OBJCOPY_CMD) $(KERNEL_SYMBOLS_ELF) $(KERNEL_SYMBOLS_STRIPPED)
+
+	@$(DOCKER_TOOLS) $(EXEC_SYMBOLS_TOOL) --patch_data $(KERNEL_SYMBOLS_OUTPUT_ELF) \
+                $(KERNEL_SYMBOLS_STRIPPED)
+
+# Note: The following is the only _trivial_ way I could think of that works out of the box on both
+# Linux and macOS. Since macOS does not have the %N nanosecond format string option, the
+# resolution is restricted to whole seconds.
+measure_time_start:
+	@date +%s > /tmp/kernel_symbols_start.date
+
+measure_time_finish:
+	@date +%s > /tmp/kernel_symbols_end.date
+
+	$(call color_progress_prefix, "Finished")
+	@echo "in $$((`cat /tmp/kernel_symbols_end.date` - `cat /tmp/kernel_symbols_start.date`)).0s"
+
+	@rm /tmp/kernel_symbols_end.date /tmp/kernel_symbols_start.date
diff --git a/20_timer_callbacks/kernel_symbols/Cargo.lock b/20_timer_callbacks/kernel_symbols/Cargo.lock
new file mode 100644
index 000000000..70b7fa662
--- /dev/null
+++ b/20_timer_callbacks/kernel_symbols/Cargo.lock
@@ -0,0 +1,14 @@
+# This file is automatically @generated by Cargo.
+# It is not intended for manual editing.
+version = 3
+
+[[package]]
+name = "debug-symbol-types"
+version = "0.1.0"
+
+[[package]]
+name = "kernel_symbols"
+version = "0.1.0"
+dependencies = [
+ "debug-symbol-types",
+]
diff --git a/20_timer_callbacks/kernel_symbols/Cargo.toml b/20_timer_callbacks/kernel_symbols/Cargo.toml
new file mode 100644
index 000000000..3407aa7e1
--- /dev/null
+++ b/20_timer_callbacks/kernel_symbols/Cargo.toml
@@ -0,0 +1,15 @@
+[package]
+name = "kernel_symbols"
+version = "0.1.0"
+edition = "2021"
+
+[features]
+default = []
+generated_symbols_available = []
+
+##--------------------------------------------------------------------------------------------------
+## Dependencies
+##--------------------------------------------------------------------------------------------------
+
+[dependencies]
+debug-symbol-types = { path = "../libraries/debug-symbol-types" }
diff --git a/20_timer_callbacks/kernel_symbols/build.rs b/20_timer_callbacks/kernel_symbols/build.rs
new file mode 100644
index 000000000..5062df444
--- /dev/null
+++ b/20_timer_callbacks/kernel_symbols/build.rs
@@ -0,0 +1,14 @@
+use std::{env, path::Path};
+
+fn main() {
+    if let Ok(path) = env::var("KERNEL_SYMBOLS_DEMANGLED_RS") {
+        if Path::new(&path).exists() {
+            println!("cargo:rustc-cfg=feature=\"generated_symbols_available\"")
+        }
+    }
+
+    println!(
+        "cargo:rerun-if-changed={}",
+        Path::new("kernel_symbols.ld").display()
+    );
+}
diff --git a/20_timer_callbacks/kernel_symbols/kernel_symbols.ld b/20_timer_callbacks/kernel_symbols/kernel_symbols.ld
new file mode 100644
index 000000000..0625f0086
--- /dev/null
+++ b/20_timer_callbacks/kernel_symbols/kernel_symbols.ld
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: MIT OR Apache-2.0
+ *
+ * Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+ */
+
+SECTIONS
+{
+    .rodata : {
+        ASSERT(. > 0xffffffff00000000, "Expected higher half address")
+
+        KEEP(*(.rodata.symbol_desc*))
+        . = ALIGN(8);
+        *(.rodata*)
+    }
+}
diff --git a/20_timer_callbacks/kernel_symbols/src/main.rs b/20_timer_callbacks/kernel_symbols/src/main.rs
new file mode 100644
index 000000000..bd90b535d
--- /dev/null
+++ b/20_timer_callbacks/kernel_symbols/src/main.rs
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Generation of kernel symbols.
+
+#![no_std]
+#![no_main]
+
+#[cfg(feature = "generated_symbols_available")]
+include!(env!("KERNEL_SYMBOLS_DEMANGLED_RS"));
+
+#[panic_handler]
+fn panic(_info: &core::panic::PanicInfo) -> ! {
+    unimplemented!()
+}
diff --git a/20_timer_callbacks/libraries/debug-symbol-types/Cargo.toml b/20_timer_callbacks/libraries/debug-symbol-types/Cargo.toml
new file mode 100644
index 000000000..e5b1fd1f5
--- /dev/null
+++ b/20_timer_callbacks/libraries/debug-symbol-types/Cargo.toml
@@ -0,0 +1,4 @@
+[package]
+name = "debug-symbol-types"
+version = "0.1.0"
+edition = "2021"
diff --git a/20_timer_callbacks/libraries/debug-symbol-types/src/lib.rs b/20_timer_callbacks/libraries/debug-symbol-types/src/lib.rs
new file mode 100644
index 000000000..b6dff082f
--- /dev/null
+++ b/20_timer_callbacks/libraries/debug-symbol-types/src/lib.rs
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Types for implementing debug symbol support.
+
+#![no_std]
+
+use core::ops::Range;
+
+/// A symbol containing a size.
+#[repr(C)]
+#[derive(Clone)]
+pub struct Symbol {
+    addr_range: Range<usize>,
+    name: &'static str,
+}
+
+impl Symbol {
+    /// Create an instance.
+    pub const fn new(start: usize, size: usize, name: &'static str) -> Symbol {
+        Symbol {
+            addr_range: Range {
+                start,
+                end: start + size,
+            },
+            name,
+        }
+    }
+
+    /// Returns true if addr is contained in the range.
+    pub fn contains(&self, addr: usize) -> bool {
+        self.addr_range.contains(&addr)
+    }
+
+    /// Returns the symbol's name.
+    pub fn name(&self) -> &'static str {
+        self.name
+    }
+
+    /// Returns the symbol's size.
+    pub fn size(&self) -> usize {
+        self.addr_range.end - self.addr_range.start
+    }
+}
diff --git a/20_timer_callbacks/libraries/test-macros/Cargo.toml b/20_timer_callbacks/libraries/test-macros/Cargo.toml
new file mode 100644
index 000000000..fff98a1fc
--- /dev/null
+++ b/20_timer_callbacks/libraries/test-macros/Cargo.toml
@@ -0,0 +1,14 @@
+[package]
+name = "test-macros"
+version = "0.1.0"
+authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+edition = "2021"
+
+[lib]
+proc-macro = true
+
+[dependencies]
+proc-macro2 = "1.x"
+quote = "1.x"
+syn = { version = "1.x", features = ["full"] }
+test-types = { path = "../test-types" }
diff --git a/20_timer_callbacks/libraries/test-macros/src/lib.rs b/20_timer_callbacks/libraries/test-macros/src/lib.rs
new file mode 100644
index 000000000..9879677cf
--- /dev/null
+++ b/20_timer_callbacks/libraries/test-macros/src/lib.rs
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+
+use proc_macro::TokenStream;
+use proc_macro2::Span;
+use quote::quote;
+use syn::{parse_macro_input, Ident, ItemFn};
+
+#[proc_macro_attribute]
+pub fn kernel_test(_attr: TokenStream, input: TokenStream) -> TokenStream {
+    let f = parse_macro_input!(input as ItemFn);
+
+    let test_name = &format!("{}", f.sig.ident);
+    let test_ident = Ident::new(
+        &format!("{}_TEST_CONTAINER", f.sig.ident.to_string().to_uppercase()),
+        Span::call_site(),
+    );
+    let test_code_block = f.block;
+
+    quote!(
+        #[test_case]
+        const #test_ident: test_types::UnitTest = test_types::UnitTest {
+            name: #test_name,
+            test_func: || #test_code_block,
+        };
+    )
+    .into()
+}
diff --git a/20_timer_callbacks/libraries/test-types/Cargo.toml b/20_timer_callbacks/libraries/test-types/Cargo.toml
new file mode 100644
index 000000000..2f20f060e
--- /dev/null
+++ b/20_timer_callbacks/libraries/test-types/Cargo.toml
@@ -0,0 +1,5 @@
+[package]
+name = "test-types"
+version = "0.1.0"
+authors = ["Andre Richter <andre.o.richter@gmail.com>"]
+edition = "2021"
diff --git a/20_timer_callbacks/libraries/test-types/src/lib.rs b/20_timer_callbacks/libraries/test-types/src/lib.rs
new file mode 100644
index 000000000..922c2a1c3
--- /dev/null
+++ b/20_timer_callbacks/libraries/test-types/src/lib.rs
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+
+//! Types for the `custom_test_frameworks` implementation.
+
+#![no_std]
+
+/// Unit test container.
+pub struct UnitTest {
+    /// Name of the test.
+    pub name: &'static str,
+
+    /// Function pointer to the test.
+    pub test_func: fn(),
+}
diff --git a/20_timer_callbacks/tools/kernel_symbols_tool/cmds.rb b/20_timer_callbacks/tools/kernel_symbols_tool/cmds.rb
new file mode 100644
index 000000000..fe66ea71c
--- /dev/null
+++ b/20_timer_callbacks/tools/kernel_symbols_tool/cmds.rb
@@ -0,0 +1,45 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+def generate_symbols(kernel_elf, output_file)
+    File.open(output_file, 'w') do |file|
+        header = <<~HEREDOC
+            use debug_symbol_types::Symbol;
+
+            # [no_mangle]
+            # [link_section = ".rodata.symbol_desc"]
+            static KERNEL_SYMBOLS: [Symbol; #{kernel_elf.num_symbols}] = [
+        HEREDOC
+
+        file.write(header)
+        kernel_elf.symbols.each do |sym|
+            value = sym.header.st_value
+            size = sym.header.st_size
+            name = sym.name
+
+            file.write("    Symbol::new(#{value}, #{size}, \"#{name}\"),\n")
+        end
+        file.write("];\n")
+    end
+end
+
+def get_symbols_section_virt_addr(kernel_elf)
+    kernel_elf.kernel_symbols_section_virt_addr
+end
+
+def patch_symbol_data(kernel_elf, symbols_blob_path)
+    symbols_blob = File.binread(symbols_blob_path)
+
+    raise if symbols_blob.size > kernel_elf.kernel_symbols_section_size
+
+    File.binwrite(kernel_elf.path, File.binread(symbols_blob_path),
+                  kernel_elf.kernel_symbols_section_offset_in_file)
+end
+
+def patch_num_symbols(kernel_elf)
+    num_packed = [kernel_elf.num_symbols].pack('Q<*') # "Q" == uint64_t, "<" == little endian
+    File.binwrite(kernel_elf.path, num_packed, kernel_elf.num_kernel_symbols_offset_in_file)
+end
diff --git a/20_timer_callbacks/tools/kernel_symbols_tool/kernel_elf.rb b/20_timer_callbacks/tools/kernel_symbols_tool/kernel_elf.rb
new file mode 100644
index 000000000..b16497673
--- /dev/null
+++ b/20_timer_callbacks/tools/kernel_symbols_tool/kernel_elf.rb
@@ -0,0 +1,74 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+# KernelELF
+class KernelELF
+    attr_reader :path
+
+    def initialize(kernel_elf_path, kernel_symbols_section, num_kernel_symbols)
+        @elf = ELFTools::ELFFile.new(File.open(kernel_elf_path))
+        @symtab_section = @elf.section_by_name('.symtab')
+
+        @path = kernel_elf_path
+        fetch_values(kernel_symbols_section, num_kernel_symbols)
+    end
+
+    private
+
+    def fetch_values(kernel_symbols_section, num_kernel_symbols)
+        sym = @symtab_section.symbol_by_name(num_kernel_symbols)
+        raise "Symbol \"#{num_kernel_symbols}\" not found" if sym.nil?
+
+        @num_kernel_symbols = sym
+
+        section = @elf.section_by_name(kernel_symbols_section)
+        raise "Section \"#{kernel_symbols_section}\" not found" if section.nil?
+
+        @kernel_symbols_section = section
+    end
+
+    def num_kernel_symbols_virt_addr
+        @num_kernel_symbols.header.st_value
+    end
+
+    def segment_containing_virt_addr(virt_addr)
+        @elf.each_segments do |segment|
+            return segment if segment.vma_in?(virt_addr)
+        end
+    end
+
+    def virt_addr_to_file_offset(virt_addr)
+        segment = segment_containing_virt_addr(virt_addr)
+        segment.vma_to_offset(virt_addr)
+    end
+
+    public
+
+    def symbols
+        non_zero_symbols = @symtab_section.symbols.reject { |sym| sym.header.st_size.zero? }
+        non_zero_symbols.sort_by { |sym| sym.header.st_value }
+    end
+
+    def num_symbols
+        symbols.size
+    end
+
+    def kernel_symbols_section_virt_addr
+        @kernel_symbols_section.header.sh_addr.to_i
+    end
+
+    def kernel_symbols_section_size
+        @kernel_symbols_section.header.sh_size.to_i
+    end
+
+    def kernel_symbols_section_offset_in_file
+        virt_addr_to_file_offset(kernel_symbols_section_virt_addr)
+    end
+
+    def num_kernel_symbols_offset_in_file
+        virt_addr_to_file_offset(num_kernel_symbols_virt_addr)
+    end
+end
diff --git a/20_timer_callbacks/tools/kernel_symbols_tool/main.rb b/20_timer_callbacks/tools/kernel_symbols_tool/main.rb
new file mode 100755
index 000000000..30a8be6f5
--- /dev/null
+++ b/20_timer_callbacks/tools/kernel_symbols_tool/main.rb
@@ -0,0 +1,47 @@
+#!/usr/bin/env ruby
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+
+require 'rubygems'
+require 'bundler/setup'
+require 'colorize'
+require 'elftools'
+
+require_relative 'kernel_elf'
+require_relative 'cmds'
+
+KERNEL_SYMBOLS_SECTION = '.kernel_symbols'
+NUM_KERNEL_SYMBOLS = 'NUM_KERNEL_SYMBOLS'
+
+cmd = ARGV[0]
+
+kernel_elf_path = ARGV[1]
+kernel_elf = KernelELF.new(kernel_elf_path, KERNEL_SYMBOLS_SECTION, NUM_KERNEL_SYMBOLS)
+
+case cmd
+when '--gen_symbols'
+    output_file = ARGV[2]
+
+    print 'Generating'.rjust(12).green.bold
+    puts ' Symbols source file'
+
+    generate_symbols(kernel_elf, output_file)
+when '--get_symbols_section_virt_addr'
+    addr = get_symbols_section_virt_addr(kernel_elf)
+
+    puts "0x#{addr.to_s(16)}"
+when '--patch_data'
+    symbols_blob_path = ARGV[2]
+    num_symbols = kernel_elf.num_symbols
+
+    print 'Patching'.rjust(12).green.bold
+    puts " Symbols blob and number of symbols (#{num_symbols}) into ELF"
+
+    patch_symbol_data(kernel_elf, symbols_blob_path)
+    patch_num_symbols(kernel_elf)
+else
+    raise
+end
diff --git a/20_timer_callbacks/tools/translation_table_tool/arch.rb b/20_timer_callbacks/tools/translation_table_tool/arch.rb
new file mode 100644
index 000000000..deceb6d0c
--- /dev/null
+++ b/20_timer_callbacks/tools/translation_table_tool/arch.rb
@@ -0,0 +1,314 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+# Bitfield manipulation.
+class BitField
+    def initialize
+        @value = 0
+    end
+
+    def self.attr_bitfield(name, offset, num_bits)
+        define_method("#{name}=") do |bits|
+            mask = (2**num_bits) - 1
+
+            raise "Input out of range: #{name} = 0x#{bits.to_s(16)}" if (bits & ~mask).positive?
+
+            # Clear bitfield
+            @value &= ~(mask << offset)
+
+            # Set it
+            @value |= (bits << offset)
+        end
+    end
+
+    def to_i
+        @value
+    end
+
+    def size_in_byte
+        8
+    end
+end
+
+# An array class that knows its memory location.
+class CArray < Array
+    attr_reader :phys_start_addr
+
+    def initialize(phys_start_addr, size, &block)
+        @phys_start_addr = phys_start_addr
+
+        super(size, &block)
+    end
+
+    def size_in_byte
+        inject(0) { |sum, n| sum + n.size_in_byte }
+    end
+end
+
+#---------------------------------------------------------------------------------------------------
+# Arch::
+#---------------------------------------------------------------------------------------------------
+module Arch
+#---------------------------------------------------------------------------------------------------
+# Arch::ARMv8
+#---------------------------------------------------------------------------------------------------
+module ARMv8
+# ARMv8 Table Descriptor.
+class Stage1TableDescriptor < BitField
+    module NextLevelTableAddr
+        OFFSET = 16
+        NUMBITS = 32
+    end
+
+    module Type
+        OFFSET = 1
+        NUMBITS = 1
+
+        BLOCK = 0
+        TABLE = 1
+    end
+
+    module Valid
+        OFFSET = 0
+        NUMBITS = 1
+
+        FALSE = 0
+        TRUE = 1
+    end
+
+    attr_bitfield(:__next_level_table_addr, NextLevelTableAddr::OFFSET, NextLevelTableAddr::NUMBITS)
+    attr_bitfield(:type, Type::OFFSET, Type::NUMBITS)
+    attr_bitfield(:valid, Valid::OFFSET, Valid::NUMBITS)
+
+    def next_level_table_addr=(addr)
+        addr = addr >> Granule64KiB::SHIFT
+
+        self.__next_level_table_addr = addr
+    end
+
+    private :__next_level_table_addr=
+end
+
+# ARMv8 level 3 page descriptor.
+class Stage1PageDescriptor < BitField
+    module UXN
+        OFFSET = 54
+        NUMBITS = 1
+
+        FALSE = 0
+        TRUE = 1
+    end
+
+    module PXN
+        OFFSET = 53
+        NUMBITS = 1
+
+        FALSE = 0
+        TRUE = 1
+    end
+
+    module OutputAddr
+        OFFSET = 16
+        NUMBITS = 32
+    end
+
+    module AF
+        OFFSET = 10
+        NUMBITS = 1
+
+        FALSE = 0
+        TRUE = 1
+    end
+
+    module SH
+        OFFSET = 8
+        NUMBITS = 2
+
+        INNER_SHAREABLE = 0b11
+    end
+
+    module AP
+        OFFSET = 6
+        NUMBITS = 2
+
+        RW_EL1 = 0b00
+        RO_EL1 = 0b10
+    end
+
+    module AttrIndx
+        OFFSET = 2
+        NUMBITS = 3
+    end
+
+    module Type
+        OFFSET = 1
+        NUMBITS = 1
+
+        RESERVED_INVALID = 0
+        PAGE = 1
+    end
+
+    module Valid
+        OFFSET = 0
+        NUMBITS = 1
+
+        FALSE = 0
+        TRUE = 1
+    end
+
+    attr_bitfield(:uxn, UXN::OFFSET, UXN::NUMBITS)
+    attr_bitfield(:pxn, PXN::OFFSET, PXN::NUMBITS)
+    attr_bitfield(:__output_addr, OutputAddr::OFFSET, OutputAddr::NUMBITS)
+    attr_bitfield(:af, AF::OFFSET, AF::NUMBITS)
+    attr_bitfield(:sh, SH::OFFSET, SH::NUMBITS)
+    attr_bitfield(:ap, AP::OFFSET, AP::NUMBITS)
+    attr_bitfield(:attr_indx, AttrIndx::OFFSET, AttrIndx::NUMBITS)
+    attr_bitfield(:type, Type::OFFSET, Type::NUMBITS)
+    attr_bitfield(:valid, Valid::OFFSET, Valid::NUMBITS)
+
+    def output_addr=(addr)
+        addr = addr >> Granule64KiB::SHIFT
+
+        self.__output_addr = addr
+    end
+
+    private :__output_addr=
+end
+
+# Translation table representing the structure defined in translation_table.rs.
+class TranslationTable
+    module MAIR
+        NORMAL = 1
+    end
+
+    def initialize
+        do_sanity_checks
+
+        num_lvl2_tables = BSP.kernel_virt_addr_space_size >> Granule512MiB::SHIFT
+
+        @lvl3 = new_lvl3(num_lvl2_tables, BSP.phys_addr_of_kernel_tables)
+
+        @lvl2_phys_start_addr = @lvl3.phys_start_addr + @lvl3.size_in_byte
+        @lvl2 = new_lvl2(num_lvl2_tables, @lvl2_phys_start_addr)
+
+        populate_lvl2_entries
+    end
+
+    def map_at(virt_region, phys_region, attributes)
+        return if virt_region.empty?
+
+        raise if virt_region.size != phys_region.size
+        raise if phys_region.last > BSP.phys_addr_space_end_page
+
+        virt_region.zip(phys_region).each do |virt_page, phys_page|
+            desc = page_descriptor_from(virt_page)
+            set_lvl3_entry(desc, phys_page, attributes)
+        end
+    end
+
+    def to_binary
+        data = @lvl3.flatten.map(&:to_i) + @lvl2.map(&:to_i)
+        data.pack('Q<*') # "Q" == uint64_t, "<" == little endian
+    end
+
+    def phys_tables_base_addr_binary
+        [@lvl2_phys_start_addr].pack('Q<*') # "Q" == uint64_t, "<" == little endian
+    end
+
+    def phys_tables_base_addr
+        @lvl2_phys_start_addr
+    end
+
+    private
+
+    def do_sanity_checks
+        raise unless BSP.kernel_granule::SIZE == Granule64KiB::SIZE
+        raise unless (BSP.kernel_virt_addr_space_size % Granule512MiB::SIZE).zero?
+    end
+
+    def new_lvl3(num_lvl2_tables, start_addr)
+        CArray.new(start_addr, num_lvl2_tables) do
+            temp = CArray.new(start_addr, 8192) do
+                Stage1PageDescriptor.new
+            end
+            start_addr += temp.size_in_byte
+
+            temp
+        end
+    end
+
+    def new_lvl2(num_lvl2_tables, start_addr)
+        CArray.new(start_addr, num_lvl2_tables) do
+            Stage1TableDescriptor.new
+        end
+    end
+
+    def populate_lvl2_entries
+        @lvl2.each_with_index do |descriptor, i|
+            descriptor.next_level_table_addr = @lvl3[i].phys_start_addr
+            descriptor.type = Stage1TableDescriptor::Type::TABLE
+            descriptor.valid = Stage1TableDescriptor::Valid::TRUE
+        end
+    end
+
+    def lvl2_lvl3_index_from(addr)
+        addr -= BSP.kernel_virt_start_addr
+
+        lvl2_index = addr >> Granule512MiB::SHIFT
+        lvl3_index = (addr & Granule512MiB::MASK) >> Granule64KiB::SHIFT
+
+        raise unless lvl2_index < @lvl2.size
+
+        [lvl2_index, lvl3_index]
+    end
+
+    def page_descriptor_from(virt_addr)
+        lvl2_index, lvl3_index = lvl2_lvl3_index_from(virt_addr)
+
+        @lvl3[lvl2_index][lvl3_index]
+    end
+
+    # rubocop:disable Metrics/MethodLength
+    def set_attributes(desc, attributes)
+        case attributes.mem_attributes
+        when :CacheableDRAM
+            desc.sh = Stage1PageDescriptor::SH::INNER_SHAREABLE
+            desc.attr_indx = MAIR::NORMAL
+        else
+            raise 'Invalid input'
+        end
+
+        desc.ap = case attributes.acc_perms
+                  when :ReadOnly
+                      Stage1PageDescriptor::AP::RO_EL1
+                  when :ReadWrite
+                      Stage1PageDescriptor::AP::RW_EL1
+                  else
+                      raise 'Invalid input'
+
+                  end
+
+        desc.pxn = if attributes.execute_never
+                       Stage1PageDescriptor::PXN::TRUE
+                   else
+                       Stage1PageDescriptor::PXN::FALSE
+                   end
+
+        desc.uxn = Stage1PageDescriptor::UXN::TRUE
+    end
+    # rubocop:enable Metrics/MethodLength
+
+    def set_lvl3_entry(desc, output_addr, attributes)
+        desc.output_addr = output_addr
+        desc.af = Stage1PageDescriptor::AF::TRUE
+        desc.type = Stage1PageDescriptor::Type::PAGE
+        desc.valid = Stage1PageDescriptor::Valid::TRUE
+
+        set_attributes(desc, attributes)
+    end
+end
+end
+end
diff --git a/20_timer_callbacks/tools/translation_table_tool/bsp.rb b/20_timer_callbacks/tools/translation_table_tool/bsp.rb
new file mode 100644
index 000000000..dbab5ab6a
--- /dev/null
+++ b/20_timer_callbacks/tools/translation_table_tool/bsp.rb
@@ -0,0 +1,54 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+# Raspberry Pi 3 + 4
+class RaspberryPi
+    attr_reader :kernel_granule, :kernel_virt_addr_space_size, :kernel_virt_start_addr
+
+    MEMORY_SRC = File.read('kernel/src/bsp/raspberrypi/memory.rs').split("\n")
+
+    def initialize
+        @kernel_granule = Granule64KiB
+
+        @kernel_virt_addr_space_size = KERNEL_ELF.symbol_value('__kernel_virt_addr_space_size')
+        @kernel_virt_start_addr = KERNEL_ELF.symbol_value('__kernel_virt_start_addr')
+
+        @virt_addr_of_kernel_tables = KERNEL_ELF.symbol_value('KERNEL_TABLES')
+        @virt_addr_of_phys_kernel_tables_base_addr = KERNEL_ELF.symbol_value(
+            'PHYS_KERNEL_TABLES_BASE_ADDR'
+        )
+    end
+
+    def phys_addr_of_kernel_tables
+        KERNEL_ELF.virt_to_phys(@virt_addr_of_kernel_tables)
+    end
+
+    def kernel_tables_offset_in_file
+        KERNEL_ELF.virt_addr_to_file_offset(@virt_addr_of_kernel_tables)
+    end
+
+    def phys_kernel_tables_base_addr_offset_in_file
+        KERNEL_ELF.virt_addr_to_file_offset(@virt_addr_of_phys_kernel_tables_base_addr)
+    end
+
+    def phys_addr_space_end_page
+        x = MEMORY_SRC.grep(/pub const END/)
+        x = case BSP_TYPE
+            when :rpi3
+                x[0]
+            when :rpi4
+                x[1]
+            else
+                raise
+            end
+
+        # Extract the hex literal with underscores like 0x0123_abcd.
+        x = x.scan(/0x[\h_]*/)[0]
+
+        # Further remove x and _ and convert to int.
+        x.scan(/\h+/).join.to_i(16)
+    end
+end
diff --git a/20_timer_callbacks/tools/translation_table_tool/generic.rb b/20_timer_callbacks/tools/translation_table_tool/generic.rb
new file mode 100644
index 000000000..eee8ccda2
--- /dev/null
+++ b/20_timer_callbacks/tools/translation_table_tool/generic.rb
@@ -0,0 +1,189 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+module Granule64KiB
+    SIZE = 64 * 1024
+    SHIFT = Math.log2(SIZE).to_i
+end
+
+module Granule512MiB
+    SIZE = 512 * 1024 * 1024
+    SHIFT = Math.log2(SIZE).to_i
+    MASK = SIZE - 1
+end
+
+# Monkey-patch Integer with some helper functions.
+class Integer
+    def power_of_two?
+        self[0].zero?
+    end
+
+    def aligned?(alignment)
+        raise unless alignment.power_of_two?
+
+        (self & (alignment - 1)).zero?
+    end
+
+    def align_up(alignment)
+        raise unless alignment.power_of_two?
+
+        (self + alignment - 1) & ~(alignment - 1)
+    end
+
+    def to_hex_underscore(with_leading_zeros: false)
+        fmt = with_leading_zeros ? '%016x' : '%x'
+        value = format(fmt, self).to_s.reverse.scan(/.{4}|.+/).join('_').reverse
+
+        format('0x%s', value)
+    end
+end
+
+# An array where each value is the start address of a Page.
+class MemoryRegion < Array
+    def initialize(start_addr, size, granule_size)
+        raise unless start_addr.aligned?(granule_size)
+        raise unless size.positive?
+        raise unless (size % granule_size).zero?
+
+        num_pages = size / granule_size
+        super(num_pages) do |i|
+            (i * granule_size) + start_addr
+        end
+    end
+end
+
+# Collection of memory attributes.
+class AttributeFields
+    attr_reader :mem_attributes, :acc_perms, :execute_never
+
+    def initialize(mem_attributes, acc_perms, execute_never)
+        @mem_attributes = mem_attributes
+        @acc_perms = acc_perms
+        @execute_never = execute_never
+    end
+
+    def to_s
+        x = case @mem_attributes
+            when :CacheableDRAM
+                'C'
+            else
+                '?'
+            end
+
+        y = case @acc_perms
+            when :ReadWrite
+                'RW'
+            when :ReadOnly
+                'RO'
+            else
+                '??'
+            end
+
+        z = @execute_never ? 'XN' : 'X '
+
+        "#{x} #{y} #{z}"
+    end
+end
+
+# A container that describes a virt-to-phys region mapping.
+class MappingDescriptor
+    @max_section_name_length = 'Sections'.length
+
+    class << self
+        attr_accessor :max_section_name_length
+
+        def update_max_section_name_length(length)
+            @max_section_name_length = [@max_section_name_length, length].max
+        end
+    end
+
+    attr_reader :name, :virt_region, :phys_region, :attributes
+
+    def initialize(name, virt_region, phys_region, attributes)
+        @name = name
+        @virt_region = virt_region
+        @phys_region = phys_region
+        @attributes = attributes
+    end
+
+    def size_human_readable(size)
+        if size >= (1024 * 1024)
+            "#{(size / (1024 * 1024)).to_s.rjust(3)} MiB"
+        elsif size >= 1024
+            "#{(size / 1024).to_s.rjust(3)} KiB"
+        else
+            raise
+        end
+    end
+
+    def to_s
+        name = @name.ljust(self.class.max_section_name_length)
+        virt_start = @virt_region.first.to_hex_underscore(with_leading_zeros: true)
+        phys_start = @phys_region.first.to_hex_underscore(with_leading_zeros: true)
+        size = size_human_readable(@virt_region.size * 65_536)
+
+        "#{name} | #{virt_start} | #{phys_start} | #{size} | #{@attributes}"
+    end
+
+    def self.print_divider
+        print '             '
+        print '-' * max_section_name_length
+        puts '--------------------------------------------------------------------'
+    end
+
+    def self.print_header
+        print_divider
+        print '             '
+        print 'Sections'.center(max_section_name_length)
+        print '   '
+        print 'Virt Start Addr'.center(21)
+        print '   '
+        print 'Phys Start Addr'.center(21)
+        print '   '
+        print 'Size'.center(7)
+        print '   '
+        print 'Attr'.center(7)
+        puts
+        print_divider
+    end
+end
+
+def kernel_map_binary
+    mapping_descriptors = KERNEL_ELF.generate_mapping_descriptors
+
+    # Generate_mapping_descriptors updates the header being printed with this call. So it must come
+    # afterwards.
+    MappingDescriptor.print_header
+
+    mapping_descriptors.each do |i|
+        print 'Generating'.rjust(12).green.bold
+        print ' '
+        puts i.to_s
+
+        TRANSLATION_TABLES.map_at(i.virt_region, i.phys_region, i.attributes)
+    end
+
+    MappingDescriptor.print_divider
+end
+
+def kernel_patch_tables(kernel_elf_path)
+    print 'Patching'.rjust(12).green.bold
+    print ' Kernel table struct at ELF file offset '
+    puts BSP.kernel_tables_offset_in_file.to_hex_underscore
+
+    File.binwrite(kernel_elf_path, TRANSLATION_TABLES.to_binary, BSP.kernel_tables_offset_in_file)
+end
+
+def kernel_patch_base_addr(kernel_elf_path)
+    print 'Patching'.rjust(12).green.bold
+    print ' Kernel tables physical base address start argument to value '
+    print TRANSLATION_TABLES.phys_tables_base_addr.to_hex_underscore
+    print ' at ELF file offset '
+    puts BSP.phys_kernel_tables_base_addr_offset_in_file.to_hex_underscore
+
+    File.binwrite(kernel_elf_path, TRANSLATION_TABLES.phys_tables_base_addr_binary,
+                  BSP.phys_kernel_tables_base_addr_offset_in_file)
+end
diff --git a/20_timer_callbacks/tools/translation_table_tool/kernel_elf.rb b/20_timer_callbacks/tools/translation_table_tool/kernel_elf.rb
new file mode 100644
index 000000000..f2d5b0b72
--- /dev/null
+++ b/20_timer_callbacks/tools/translation_table_tool/kernel_elf.rb
@@ -0,0 +1,96 @@
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+# KernelELF
+class KernelELF
+    SECTION_FLAG_ALLOC = 2
+
+    def initialize(kernel_elf_path)
+        @elf = ELFTools::ELFFile.new(File.open(kernel_elf_path))
+        @symtab_section = @elf.section_by_name('.symtab')
+    end
+
+    def machine
+        @elf.machine.to_sym
+    end
+
+    def symbol_value(symbol_name)
+        @symtab_section.symbol_by_name(symbol_name).header.st_value
+    end
+
+    def segment_containing_virt_addr(virt_addr)
+        @elf.each_segments do |segment|
+            return segment if segment.vma_in?(virt_addr)
+        end
+    end
+
+    def virt_to_phys(virt_addr)
+        segment = segment_containing_virt_addr(virt_addr)
+        translation_offset = segment.header.p_vaddr - segment.header.p_paddr
+
+        virt_addr - translation_offset
+    end
+
+    def virt_addr_to_file_offset(virt_addr)
+        segment = segment_containing_virt_addr(virt_addr)
+        segment.vma_to_offset(virt_addr)
+    end
+
+    def sections_in_segment(segment)
+        head = segment.mem_head
+        tail = segment.mem_tail
+
+        sections = @elf.each_sections.select do |section|
+            file_offset = section.header.sh_addr
+            flags = section.header.sh_flags
+
+            file_offset >= head && file_offset < tail && (flags & SECTION_FLAG_ALLOC != 0)
+        end
+
+        sections.map(&:name).join(' ')
+    end
+
+    def select_load_segments
+        @elf.each_segments.select do |segment|
+            segment.instance_of?(ELFTools::Segments::LoadSegment)
+        end
+    end
+
+    def segment_get_acc_perms(segment)
+        if segment.readable? && segment.writable?
+            :ReadWrite
+        elsif segment.readable?
+            :ReadOnly
+        else
+            :Invalid
+        end
+    end
+
+    def update_max_section_name_length(descriptors)
+        MappingDescriptor.update_max_section_name_length(descriptors.map { |i| i.name.size }.max)
+    end
+
+    def generate_mapping_descriptors
+        descriptors = select_load_segments.map do |segment|
+            # Assume each segment is page aligned.
+            size = segment.mem_size.align_up(BSP.kernel_granule::SIZE)
+            virt_start_addr = segment.header.p_vaddr
+            phys_start_addr = segment.header.p_paddr
+            acc_perms = segment_get_acc_perms(segment)
+            execute_never = !segment.executable?
+            section_names = sections_in_segment(segment)
+
+            virt_region = MemoryRegion.new(virt_start_addr, size, BSP.kernel_granule::SIZE)
+            phys_region = MemoryRegion.new(phys_start_addr, size, BSP.kernel_granule::SIZE)
+            attributes = AttributeFields.new(:CacheableDRAM, acc_perms, execute_never)
+
+            MappingDescriptor.new(section_names, virt_region, phys_region, attributes)
+        end
+
+        update_max_section_name_length(descriptors)
+        descriptors
+    end
+end
diff --git a/20_timer_callbacks/tools/translation_table_tool/main.rb b/20_timer_callbacks/tools/translation_table_tool/main.rb
new file mode 100755
index 000000000..6419e364e
--- /dev/null
+++ b/20_timer_callbacks/tools/translation_table_tool/main.rb
@@ -0,0 +1,46 @@
+#!/usr/bin/env ruby
+# frozen_string_literal: true
+
+# SPDX-License-Identifier: MIT OR Apache-2.0
+#
+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+require 'rubygems'
+require 'bundler/setup'
+require 'colorize'
+require 'elftools'
+
+require_relative 'generic'
+require_relative 'kernel_elf'
+require_relative 'bsp'
+require_relative 'arch'
+
+BSP_TYPE = ARGV[0].to_sym
+kernel_elf_path = ARGV[1]
+
+start = Time.now
+
+KERNEL_ELF = KernelELF.new(kernel_elf_path)
+
+BSP = case BSP_TYPE
+      when :rpi3, :rpi4
+          RaspberryPi.new
+      else
+          raise
+      end
+
+TRANSLATION_TABLES = case KERNEL_ELF.machine
+                     when :AArch64
+                         Arch::ARMv8::TranslationTable.new
+                     else
+                         raise
+                     end
+
+kernel_map_binary
+kernel_patch_tables(kernel_elf_path)
+kernel_patch_base_addr(kernel_elf_path)
+
+elapsed = Time.now - start
+
+print 'Finished'.rjust(12).green.bold
+puts " in #{elapsed.round(2)}s"

From 60ae47032ba1253265f5eabf2bb1520d1200e4df Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Wed, 26 Oct 2022 22:36:35 +0200
Subject: [PATCH 197/214] typo

---
 20_timer_callbacks/README.md                                | 6 +++---
 20_timer_callbacks/kernel/src/_arch/aarch64/time.rs         | 2 +-
 .../kernel/src/bsp/raspberrypi/exception/asynchronous.rs    | 4 ++--
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/20_timer_callbacks/README.md b/20_timer_callbacks/README.md
index 3647fb389..7d944b991 100644
--- a/20_timer_callbacks/README.md
+++ b/20_timer_callbacks/README.md
@@ -58,7 +58,7 @@ diff -uNr 19_kernel_heap/kernel/src/_arch/aarch64/time.rs 20_timer_callbacks/ker
 +
 +/// The associated IRQ number.
 +pub const fn timeout_irq() -> exception::asynchronous::IRQNumber {
-+    bsp::exception::asynchronous::irq_map::ARM_NS_PHYISCAL_TIMER
++    bsp::exception::asynchronous::irq_map::ARM_NS_PHYSICAL_TIMER
 +}
 +
 +/// Program a timer IRQ to be fired after `delay` has passed.
@@ -398,7 +398,7 @@ diff -uNr 19_kernel_heap/kernel/src/bsp/raspberrypi/exception/asynchronous.rs 20
 
 -    pub const PL011_UART: IRQNumber = IRQNumber::Peripheral(PeripheralIRQ::new(57));
 +    /// The non-secure physical timer IRQ number.
-+    pub const ARM_NS_PHYISCAL_TIMER: IRQNumber = IRQNumber::Local(LocalIRQ::new(1));
++    pub const ARM_NS_PHYSICAL_TIMER: IRQNumber = IRQNumber::Local(LocalIRQ::new(1));
 +
 +    pub(in crate::bsp) const PL011_UART: IRQNumber = IRQNumber::Peripheral(PeripheralIRQ::new(57));
  }
@@ -411,7 +411,7 @@ diff -uNr 19_kernel_heap/kernel/src/bsp/raspberrypi/exception/asynchronous.rs 20
 
 -    pub const PL011_UART: IRQNumber = IRQNumber::new(153);
 +    /// The non-secure physical timer IRQ number.
-+    pub const ARM_NS_PHYISCAL_TIMER: IRQNumber = IRQNumber::new(30);
++    pub const ARM_NS_PHYSICAL_TIMER: IRQNumber = IRQNumber::new(30);
 +
 +    pub(in crate::bsp) const PL011_UART: IRQNumber = IRQNumber::new(153);
  }
diff --git a/20_timer_callbacks/kernel/src/_arch/aarch64/time.rs b/20_timer_callbacks/kernel/src/_arch/aarch64/time.rs
index 568363fc3..5479deb48 100644
--- a/20_timer_callbacks/kernel/src/_arch/aarch64/time.rs
+++ b/20_timer_callbacks/kernel/src/_arch/aarch64/time.rs
@@ -166,7 +166,7 @@ pub fn spin_for(duration: Duration) {
 
 /// The associated IRQ number.
 pub const fn timeout_irq() -> exception::asynchronous::IRQNumber {
-    bsp::exception::asynchronous::irq_map::ARM_NS_PHYISCAL_TIMER
+    bsp::exception::asynchronous::irq_map::ARM_NS_PHYSICAL_TIMER
 }
 
 /// Program a timer IRQ to be fired after `delay` has passed.
diff --git a/20_timer_callbacks/kernel/src/bsp/raspberrypi/exception/asynchronous.rs b/20_timer_callbacks/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
index a6fd27fb4..b2cb955ef 100644
--- a/20_timer_callbacks/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
+++ b/20_timer_callbacks/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
@@ -19,7 +19,7 @@ pub mod irq_map {
     use super::bsp::device_driver::{IRQNumber, LocalIRQ, PeripheralIRQ};
 
     /// The non-secure physical timer IRQ number.
-    pub const ARM_NS_PHYISCAL_TIMER: IRQNumber = IRQNumber::Local(LocalIRQ::new(1));
+    pub const ARM_NS_PHYSICAL_TIMER: IRQNumber = IRQNumber::Local(LocalIRQ::new(1));
 
     pub(in crate::bsp) const PL011_UART: IRQNumber = IRQNumber::Peripheral(PeripheralIRQ::new(57));
 }
@@ -30,7 +30,7 @@ pub mod irq_map {
     use super::bsp::device_driver::IRQNumber;
 
     /// The non-secure physical timer IRQ number.
-    pub const ARM_NS_PHYISCAL_TIMER: IRQNumber = IRQNumber::new(30);
+    pub const ARM_NS_PHYSICAL_TIMER: IRQNumber = IRQNumber::new(30);
 
     pub(in crate::bsp) const PL011_UART: IRQNumber = IRQNumber::new(153);
 }

From 5e3af39bdc58da3e9b31995b7b30d6fd6392801a Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sun, 6 Nov 2022 22:02:03 +0100
Subject: [PATCH 198/214] Change to aarch64-cpu crate

---
 02_runtime_init/Cargo.lock                    |   8 +-
 02_runtime_init/Cargo.toml                    |   2 +-
 02_runtime_init/README.ES.md                  |   2 +-
 02_runtime_init/README.md                     |   8 +-
 02_runtime_init/src/_arch/aarch64/cpu.rs      |   2 +-
 03_hacky_hello_world/Cargo.lock               |   8 +-
 03_hacky_hello_world/Cargo.toml               |   2 +-
 03_hacky_hello_world/src/_arch/aarch64/cpu.rs |   2 +-
 04_safe_globals/Cargo.lock                    |   8 +-
 04_safe_globals/Cargo.toml                    |   2 +-
 04_safe_globals/src/_arch/aarch64/cpu.rs      |   2 +-
 05_drivers_gpio_uart/Cargo.lock               |   8 +-
 05_drivers_gpio_uart/Cargo.toml               |   2 +-
 05_drivers_gpio_uart/README.md                |   2 +-
 05_drivers_gpio_uart/src/_arch/aarch64/cpu.rs |   2 +-
 06_uart_chainloader/Cargo.lock                |   8 +-
 06_uart_chainloader/Cargo.toml                |   2 +-
 06_uart_chainloader/demo_payload_rpi3.img     | Bin 7648 -> 9496 bytes
 06_uart_chainloader/demo_payload_rpi4.img     | Bin 7584 -> 9472 bytes
 06_uart_chainloader/src/_arch/aarch64/cpu.rs  |   2 +-
 07_timestamps/Cargo.lock                      |   8 +-
 07_timestamps/Cargo.toml                      |   2 +-
 07_timestamps/README.md                       |   2 +-
 07_timestamps/src/_arch/aarch64/cpu.rs        |   2 +-
 07_timestamps/src/_arch/aarch64/time.rs       |   2 +-
 08_hw_debug_JTAG/Cargo.lock                   |   8 +-
 08_hw_debug_JTAG/Cargo.toml                   |   2 +-
 08_hw_debug_JTAG/src/_arch/aarch64/cpu.rs     |   2 +-
 08_hw_debug_JTAG/src/_arch/aarch64/time.rs    |   2 +-
 09_privilege_level/Cargo.lock                 |   8 +-
 09_privilege_level/Cargo.toml                 |   2 +-
 09_privilege_level/README.md                  |  19 ++--
 09_privilege_level/src/_arch/aarch64/cpu.rs   |   2 +-
 .../src/_arch/aarch64/cpu/boot.rs             |   2 +-
 .../src/_arch/aarch64/exception.rs            |   2 +-
 .../_arch/aarch64/exception/asynchronous.rs   |   2 +-
 09_privilege_level/src/_arch/aarch64/time.rs  |   2 +-
 .../Cargo.lock                                |   8 +-
 .../Cargo.toml                                |   2 +-
 .../README.md                                 |  12 +--
 .../src/_arch/aarch64/cpu.rs                  |   2 +-
 .../src/_arch/aarch64/cpu/boot.rs             |   2 +-
 .../src/_arch/aarch64/exception.rs            |   2 +-
 .../_arch/aarch64/exception/asynchronous.rs   |   2 +-
 .../src/_arch/aarch64/memory/mmu.rs           |   2 +-
 .../src/_arch/aarch64/time.rs                 |   2 +-
 11_exceptions_part1_groundwork/Cargo.lock     |   8 +-
 11_exceptions_part1_groundwork/Cargo.toml     |   2 +-
 11_exceptions_part1_groundwork/README.md      |   4 +-
 .../src/_arch/aarch64/cpu.rs                  |   2 +-
 .../src/_arch/aarch64/cpu/boot.rs             |   2 +-
 .../src/_arch/aarch64/exception.rs            |   2 +-
 .../_arch/aarch64/exception/asynchronous.rs   |   2 +-
 .../src/_arch/aarch64/memory/mmu.rs           |   2 +-
 .../src/_arch/aarch64/time.rs                 |   2 +-
 12_integrated_testing/Cargo.lock              |   8 +-
 12_integrated_testing/kernel/Cargo.toml       |   2 +-
 .../kernel/src/_arch/aarch64/cpu.rs           |   2 +-
 .../kernel/src/_arch/aarch64/cpu/boot.rs      |   2 +-
 .../kernel/src/_arch/aarch64/exception.rs     |   2 +-
 .../_arch/aarch64/exception/asynchronous.rs   |   2 +-
 .../kernel/src/_arch/aarch64/memory/mmu.rs    |   2 +-
 .../kernel/src/_arch/aarch64/time.rs          |   2 +-
 .../Cargo.lock                                |   8 +-
 13_exceptions_part2_peripheral_IRQs/README.md |  11 +-
 .../kernel/Cargo.toml                         |   2 +-
 .../kernel/src/_arch/aarch64/cpu.rs           |   2 +-
 .../kernel/src/_arch/aarch64/cpu/boot.rs      |   2 +-
 .../kernel/src/_arch/aarch64/cpu/smp.rs       |   2 +-
 .../kernel/src/_arch/aarch64/exception.rs     |   2 +-
 .../_arch/aarch64/exception/asynchronous.rs   |   2 +-
 .../kernel/src/_arch/aarch64/memory/mmu.rs    |   2 +-
 .../kernel/src/_arch/aarch64/time.rs          |   2 +-
 14_virtual_mem_part2_mmio_remap/Cargo.lock    |   8 +-
 14_virtual_mem_part2_mmio_remap/README.md     |   2 +-
 .../kernel/Cargo.toml                         |   2 +-
 .../kernel/src/_arch/aarch64/cpu.rs           |   2 +-
 .../kernel/src/_arch/aarch64/cpu/boot.rs      |   2 +-
 .../kernel/src/_arch/aarch64/cpu/smp.rs       |   2 +-
 .../kernel/src/_arch/aarch64/exception.rs     |   2 +-
 .../_arch/aarch64/exception/asynchronous.rs   |   2 +-
 .../kernel/src/_arch/aarch64/memory/mmu.rs    |   2 +-
 .../kernel/src/_arch/aarch64/time.rs          |   2 +-
 .../Cargo.lock                                |   8 +-
 .../README.md                                 |   2 +-
 .../kernel/Cargo.toml                         |   2 +-
 .../kernel/src/_arch/aarch64/cpu.rs           |   2 +-
 .../kernel/src/_arch/aarch64/cpu/boot.rs      |   2 +-
 .../kernel/src/_arch/aarch64/cpu/smp.rs       |   2 +-
 .../kernel/src/_arch/aarch64/exception.rs     |   2 +-
 .../_arch/aarch64/exception/asynchronous.rs   |   2 +-
 .../kernel/src/_arch/aarch64/memory/mmu.rs    |   2 +-
 .../kernel/src/_arch/aarch64/time.rs          |   2 +-
 .../Cargo.lock                                |   8 +-
 .../kernel/Cargo.toml                         |   2 +-
 .../kernel/src/_arch/aarch64/cpu.rs           |   2 +-
 .../kernel/src/_arch/aarch64/cpu/boot.rs      |   2 +-
 .../kernel/src/_arch/aarch64/cpu/smp.rs       |   2 +-
 .../kernel/src/_arch/aarch64/exception.rs     |   2 +-
 .../_arch/aarch64/exception/asynchronous.rs   |   2 +-
 .../kernel/src/_arch/aarch64/memory/mmu.rs    |   2 +-
 .../kernel/src/_arch/aarch64/time.rs          |   2 +-
 17_kernel_symbols/Cargo.lock                  |   8 +-
 17_kernel_symbols/README.md                   |   2 +-
 17_kernel_symbols/kernel/Cargo.toml           |   2 +-
 .../kernel/src/_arch/aarch64/cpu.rs           |   2 +-
 .../kernel/src/_arch/aarch64/cpu/boot.rs      |   2 +-
 .../kernel/src/_arch/aarch64/cpu/smp.rs       |   2 +-
 .../kernel/src/_arch/aarch64/exception.rs     |   2 +-
 .../_arch/aarch64/exception/asynchronous.rs   |   2 +-
 .../kernel/src/_arch/aarch64/memory/mmu.rs    |   2 +-
 .../kernel/src/_arch/aarch64/time.rs          |   2 +-
 18_backtrace/Cargo.lock                       |   8 +-
 18_backtrace/README.md                        |   8 +-
 18_backtrace/kernel/Cargo.toml                |   2 +-
 .../kernel/src/_arch/aarch64/backtrace.rs     |   2 +-
 18_backtrace/kernel/src/_arch/aarch64/cpu.rs  |   2 +-
 .../kernel/src/_arch/aarch64/cpu/boot.rs      |   2 +-
 .../kernel/src/_arch/aarch64/cpu/smp.rs       |   2 +-
 .../kernel/src/_arch/aarch64/exception.rs     |   2 +-
 .../_arch/aarch64/exception/asynchronous.rs   |   2 +-
 .../kernel/src/_arch/aarch64/memory/mmu.rs    |   2 +-
 18_backtrace/kernel/src/_arch/aarch64/time.rs |   2 +-
 19_kernel_heap/Cargo.lock                     |   8 +-
 19_kernel_heap/kernel/Cargo.lock              |  96 ------------------
 19_kernel_heap/kernel/Cargo.toml              |   2 +-
 .../kernel/src/_arch/aarch64/backtrace.rs     |   2 +-
 .../kernel/src/_arch/aarch64/cpu.rs           |   2 +-
 .../kernel/src/_arch/aarch64/cpu/boot.rs      |   2 +-
 .../kernel/src/_arch/aarch64/cpu/smp.rs       |   2 +-
 .../kernel/src/_arch/aarch64/exception.rs     |   2 +-
 .../_arch/aarch64/exception/asynchronous.rs   |   2 +-
 .../kernel/src/_arch/aarch64/memory/mmu.rs    |   2 +-
 .../kernel/src/_arch/aarch64/time.rs          |   2 +-
 20_timer_callbacks/Cargo.lock                 |   8 +-
 20_timer_callbacks/README.md                  |   2 +-
 20_timer_callbacks/kernel/Cargo.lock          |  96 ------------------
 20_timer_callbacks/kernel/Cargo.toml          |   2 +-
 .../kernel/src/_arch/aarch64/backtrace.rs     |   2 +-
 .../kernel/src/_arch/aarch64/cpu.rs           |   2 +-
 .../kernel/src/_arch/aarch64/cpu/boot.rs      |   2 +-
 .../kernel/src/_arch/aarch64/cpu/smp.rs       |   2 +-
 .../kernel/src/_arch/aarch64/exception.rs     |   2 +-
 .../_arch/aarch64/exception/asynchronous.rs   |   2 +-
 .../kernel/src/_arch/aarch64/memory/mmu.rs    |   2 +-
 .../kernel/src/_arch/aarch64/time.rs          |   2 +-
 X1_JTAG_boot/Cargo.lock                       |   8 +-
 X1_JTAG_boot/Cargo.toml                       |   2 +-
 X1_JTAG_boot/jtag_boot_rpi3.img               | Bin 8648 -> 10216 bytes
 X1_JTAG_boot/jtag_boot_rpi4.img               | Bin 7744 -> 9368 bytes
 X1_JTAG_boot/src/_arch/aarch64/cpu.rs         |   2 +-
 X1_JTAG_boot/src/_arch/aarch64/time.rs        |   2 +-
 152 files changed, 231 insertions(+), 423 deletions(-)
 delete mode 100644 19_kernel_heap/kernel/Cargo.lock
 delete mode 100644 20_timer_callbacks/kernel/Cargo.lock

diff --git a/02_runtime_init/Cargo.lock b/02_runtime_init/Cargo.lock
index 17e641973..e52e7fdf1 100644
--- a/02_runtime_init/Cargo.lock
+++ b/02_runtime_init/Cargo.lock
@@ -3,10 +3,10 @@
 version = 3
 
 [[package]]
-name = "cortex-a"
-version = "8.0.0"
+name = "aarch64-cpu"
+version = "9.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
+checksum = "3aceb88e55ba626a5479279268d009a92d9d00eacce0de1b8c236c7ad31b7225"
 dependencies = [
  "tock-registers",
 ]
@@ -15,7 +15,7 @@ dependencies = [
 name = "mingo"
 version = "0.2.0"
 dependencies = [
- "cortex-a",
+ "aarch64-cpu",
 ]
 
 [[package]]
diff --git a/02_runtime_init/Cargo.toml b/02_runtime_init/Cargo.toml
index 59566db09..5946f43ca 100644
--- a/02_runtime_init/Cargo.toml
+++ b/02_runtime_init/Cargo.toml
@@ -24,4 +24,4 @@ path = "src/main.rs"
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "8.x.x" }
+aarch64-cpu = { version = "9.x.x" }
diff --git a/02_runtime_init/README.ES.md b/02_runtime_init/README.ES.md
index e1210e9b9..2f93586f9 100644
--- a/02_runtime_init/README.ES.md
+++ b/02_runtime_init/README.ES.md
@@ -28,7 +28,7 @@
 
   * Llama a `kernel_init()`, que llama a `panic!()`, que al final también pone al núcleo 0 en pausa.
 
-* La librería ahora usa el crate [cortex-a](https://github.com/rust-embedded/cortex-a), que nos da abstracciones sin coste y envuelve las partes que hacen uso de un `unsafe` (partes con código que no es seguro y podría causar errores) cuando se trabaja directamente con los recursos del procesador.
+* La librería ahora usa el crate [aarch64-cpu](https://github.com/rust-embedded/aarch64-cpu), que nos da abstracciones sin coste y envuelve las partes que hacen uso de un `unsafe` (partes con código que no es seguro y podría causar errores) cuando se trabaja directamente con los recursos del procesador.
 
   * Lo puedes ver en acción en `_arch/__arch_name__/cpu.rs`.
 
diff --git a/02_runtime_init/README.md b/02_runtime_init/README.md
index 7b3fcd82b..76fc07ddb 100644
--- a/02_runtime_init/README.md
+++ b/02_runtime_init/README.md
@@ -19,12 +19,12 @@
      1. Jumps to the `_start_rust()` function, defined in `arch/__arch_name__/cpu/boot.rs`.
 - `_start_rust()`:
      - Calls `kernel_init()`, which calls `panic!()`, which eventually halts core0 as well.
-- The library now uses the [cortex-a] crate, which provides zero-overhead abstractions and wraps
+- The library now uses the [aarch64-cpu] crate, which provides zero-overhead abstractions and wraps
   `unsafe` parts when dealing with the CPU's resources.
     - See it in action in `_arch/__arch_name__/cpu.rs`.
 
 [bss]: https://en.wikipedia.org/wiki/.bss
-[cortex-a]: https://github.com/rust-embedded/cortex-a
+[aarch64-cpu]: https://github.com/rust-embedded/aarch64-cpu
 
 ## Diff to previous
 ```diff
@@ -47,7 +47,7 @@ diff -uNr 01_wait_forever/Cargo.toml 02_runtime_init/Cargo.toml
 +
 +# Platform specific dependencies
 +[target.'cfg(target_arch = "aarch64")'.dependencies]
-+cortex-a = { version = "8.x.x" }
++aarch64-cpu = { version = "9.x.x" }
 
 diff -uNr 01_wait_forever/Makefile 02_runtime_init/Makefile
 --- 01_wait_forever/Makefile
@@ -165,7 +165,7 @@ diff -uNr 01_wait_forever/src/_arch/aarch64/cpu.rs 02_runtime_init/src/_arch/aar
 +//!
 +//! crate::cpu::arch_cpu
 +
-+use cortex_a::asm;
++use aarch64_cpu::asm;
 +
 +//--------------------------------------------------------------------------------------------------
 +// Public Code
diff --git a/02_runtime_init/src/_arch/aarch64/cpu.rs b/02_runtime_init/src/_arch/aarch64/cpu.rs
index 3b52e3a36..7872f85fc 100644
--- a/02_runtime_init/src/_arch/aarch64/cpu.rs
+++ b/02_runtime_init/src/_arch/aarch64/cpu.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::cpu::arch_cpu
 
-use cortex_a::asm;
+use aarch64_cpu::asm;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/03_hacky_hello_world/Cargo.lock b/03_hacky_hello_world/Cargo.lock
index 6b68a92ee..6e5873dfb 100644
--- a/03_hacky_hello_world/Cargo.lock
+++ b/03_hacky_hello_world/Cargo.lock
@@ -3,10 +3,10 @@
 version = 3
 
 [[package]]
-name = "cortex-a"
-version = "8.0.0"
+name = "aarch64-cpu"
+version = "9.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
+checksum = "3aceb88e55ba626a5479279268d009a92d9d00eacce0de1b8c236c7ad31b7225"
 dependencies = [
  "tock-registers",
 ]
@@ -15,7 +15,7 @@ dependencies = [
 name = "mingo"
 version = "0.3.0"
 dependencies = [
- "cortex-a",
+ "aarch64-cpu",
 ]
 
 [[package]]
diff --git a/03_hacky_hello_world/Cargo.toml b/03_hacky_hello_world/Cargo.toml
index e3e95003b..a6d527c1a 100644
--- a/03_hacky_hello_world/Cargo.toml
+++ b/03_hacky_hello_world/Cargo.toml
@@ -24,4 +24,4 @@ path = "src/main.rs"
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "8.x.x" }
+aarch64-cpu = { version = "9.x.x" }
diff --git a/03_hacky_hello_world/src/_arch/aarch64/cpu.rs b/03_hacky_hello_world/src/_arch/aarch64/cpu.rs
index 3b52e3a36..7872f85fc 100644
--- a/03_hacky_hello_world/src/_arch/aarch64/cpu.rs
+++ b/03_hacky_hello_world/src/_arch/aarch64/cpu.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::cpu::arch_cpu
 
-use cortex_a::asm;
+use aarch64_cpu::asm;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/04_safe_globals/Cargo.lock b/04_safe_globals/Cargo.lock
index 21c1ad6fd..3d196407b 100644
--- a/04_safe_globals/Cargo.lock
+++ b/04_safe_globals/Cargo.lock
@@ -3,10 +3,10 @@
 version = 3
 
 [[package]]
-name = "cortex-a"
-version = "8.0.0"
+name = "aarch64-cpu"
+version = "9.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
+checksum = "3aceb88e55ba626a5479279268d009a92d9d00eacce0de1b8c236c7ad31b7225"
 dependencies = [
  "tock-registers",
 ]
@@ -15,7 +15,7 @@ dependencies = [
 name = "mingo"
 version = "0.4.0"
 dependencies = [
- "cortex-a",
+ "aarch64-cpu",
 ]
 
 [[package]]
diff --git a/04_safe_globals/Cargo.toml b/04_safe_globals/Cargo.toml
index 51ddd52be..1d8ee6a79 100644
--- a/04_safe_globals/Cargo.toml
+++ b/04_safe_globals/Cargo.toml
@@ -24,4 +24,4 @@ path = "src/main.rs"
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "8.x.x" }
+aarch64-cpu = { version = "9.x.x" }
diff --git a/04_safe_globals/src/_arch/aarch64/cpu.rs b/04_safe_globals/src/_arch/aarch64/cpu.rs
index 3b52e3a36..7872f85fc 100644
--- a/04_safe_globals/src/_arch/aarch64/cpu.rs
+++ b/04_safe_globals/src/_arch/aarch64/cpu.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::cpu::arch_cpu
 
-use cortex_a::asm;
+use aarch64_cpu::asm;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/05_drivers_gpio_uart/Cargo.lock b/05_drivers_gpio_uart/Cargo.lock
index 93873c454..4514e8825 100644
--- a/05_drivers_gpio_uart/Cargo.lock
+++ b/05_drivers_gpio_uart/Cargo.lock
@@ -3,10 +3,10 @@
 version = 3
 
 [[package]]
-name = "cortex-a"
-version = "8.0.0"
+name = "aarch64-cpu"
+version = "9.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
+checksum = "3aceb88e55ba626a5479279268d009a92d9d00eacce0de1b8c236c7ad31b7225"
 dependencies = [
  "tock-registers",
 ]
@@ -15,7 +15,7 @@ dependencies = [
 name = "mingo"
 version = "0.5.0"
 dependencies = [
- "cortex-a",
+ "aarch64-cpu",
  "tock-registers",
 ]
 
diff --git a/05_drivers_gpio_uart/Cargo.toml b/05_drivers_gpio_uart/Cargo.toml
index 1f6db5de9..c431e4381 100644
--- a/05_drivers_gpio_uart/Cargo.toml
+++ b/05_drivers_gpio_uart/Cargo.toml
@@ -27,4 +27,4 @@ tock-registers = { version = "0.8.x", default-features = false, features = ["reg
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "8.x.x" }
+aarch64-cpu = { version = "9.x.x" }
diff --git a/05_drivers_gpio_uart/README.md b/05_drivers_gpio_uart/README.md
index f53a330ba..563af1a73 100644
--- a/05_drivers_gpio_uart/README.md
+++ b/05_drivers_gpio_uart/README.md
@@ -181,7 +181,7 @@ diff -uNr 04_safe_globals/Cargo.toml 05_drivers_gpio_uart/Cargo.toml
 +
  # Platform specific dependencies
  [target.'cfg(target_arch = "aarch64")'.dependencies]
- cortex-a = { version = "8.x.x" }
+ aarch64-cpu = { version = "9.x.x" }
 
 diff -uNr 04_safe_globals/Makefile 05_drivers_gpio_uart/Makefile
 --- 04_safe_globals/Makefile
diff --git a/05_drivers_gpio_uart/src/_arch/aarch64/cpu.rs b/05_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
index 2ef860d23..2431d2d25 100644
--- a/05_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
+++ b/05_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::cpu::arch_cpu
 
-use cortex_a::asm;
+use aarch64_cpu::asm;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/06_uart_chainloader/Cargo.lock b/06_uart_chainloader/Cargo.lock
index c26c68d1b..047875fe5 100644
--- a/06_uart_chainloader/Cargo.lock
+++ b/06_uart_chainloader/Cargo.lock
@@ -3,10 +3,10 @@
 version = 3
 
 [[package]]
-name = "cortex-a"
-version = "8.0.0"
+name = "aarch64-cpu"
+version = "9.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
+checksum = "3aceb88e55ba626a5479279268d009a92d9d00eacce0de1b8c236c7ad31b7225"
 dependencies = [
  "tock-registers",
 ]
@@ -15,7 +15,7 @@ dependencies = [
 name = "mingo"
 version = "0.6.0"
 dependencies = [
- "cortex-a",
+ "aarch64-cpu",
  "tock-registers",
 ]
 
diff --git a/06_uart_chainloader/Cargo.toml b/06_uart_chainloader/Cargo.toml
index 8770d7a04..27b413a28 100644
--- a/06_uart_chainloader/Cargo.toml
+++ b/06_uart_chainloader/Cargo.toml
@@ -27,4 +27,4 @@ tock-registers = { version = "0.8.x", default-features = false, features = ["reg
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "8.x.x" }
+aarch64-cpu = { version = "9.x.x" }
diff --git a/06_uart_chainloader/demo_payload_rpi3.img b/06_uart_chainloader/demo_payload_rpi3.img
index 20f13981c87fa20c518e3039149ff063beb0eb3d..8109de38e1ee46ee668b5b5fcaa068e973753192 100755
GIT binary patch
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diff --git a/06_uart_chainloader/demo_payload_rpi4.img b/06_uart_chainloader/demo_payload_rpi4.img
index 779cc308d9b2decf926e6ea6a4e3f8764183ede1..807da95b3f6830cbe50553586b3422d143680a19 100755
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diff --git a/06_uart_chainloader/src/_arch/aarch64/cpu.rs b/06_uart_chainloader/src/_arch/aarch64/cpu.rs
index 2ef860d23..2431d2d25 100644
--- a/06_uart_chainloader/src/_arch/aarch64/cpu.rs
+++ b/06_uart_chainloader/src/_arch/aarch64/cpu.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::cpu::arch_cpu
 
-use cortex_a::asm;
+use aarch64_cpu::asm;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/07_timestamps/Cargo.lock b/07_timestamps/Cargo.lock
index 5155fff21..be8e7c137 100644
--- a/07_timestamps/Cargo.lock
+++ b/07_timestamps/Cargo.lock
@@ -3,10 +3,10 @@
 version = 3
 
 [[package]]
-name = "cortex-a"
-version = "8.0.0"
+name = "aarch64-cpu"
+version = "9.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
+checksum = "3aceb88e55ba626a5479279268d009a92d9d00eacce0de1b8c236c7ad31b7225"
 dependencies = [
  "tock-registers",
 ]
@@ -15,7 +15,7 @@ dependencies = [
 name = "mingo"
 version = "0.7.0"
 dependencies = [
- "cortex-a",
+ "aarch64-cpu",
  "tock-registers",
 ]
 
diff --git a/07_timestamps/Cargo.toml b/07_timestamps/Cargo.toml
index 5997997ad..f4e4bcf69 100644
--- a/07_timestamps/Cargo.toml
+++ b/07_timestamps/Cargo.toml
@@ -27,4 +27,4 @@ tock-registers = { version = "0.8.x", default-features = false, features = ["reg
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "8.x.x" }
+aarch64-cpu = { version = "9.x.x" }
diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index 236def5b5..afa75ad9d 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -272,12 +272,12 @@ diff -uNr 06_uart_chainloader/src/_arch/aarch64/time.rs 07_timestamps/src/_arch/
 +//! crate::time::arch_time
 +
 +use crate::warn;
++use aarch64_cpu::{asm::barrier, registers::*};
 +use core::{
 +    num::{NonZeroU128, NonZeroU32, NonZeroU64},
 +    ops::{Add, Div},
 +    time::Duration,
 +};
-+use cortex_a::{asm::barrier, registers::*};
 +use tock_registers::interfaces::Readable;
 +
 +//--------------------------------------------------------------------------------------------------
diff --git a/07_timestamps/src/_arch/aarch64/cpu.rs b/07_timestamps/src/_arch/aarch64/cpu.rs
index 4414ac6ad..bbe7687ae 100644
--- a/07_timestamps/src/_arch/aarch64/cpu.rs
+++ b/07_timestamps/src/_arch/aarch64/cpu.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::cpu::arch_cpu
 
-use cortex_a::asm;
+use aarch64_cpu::asm;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/07_timestamps/src/_arch/aarch64/time.rs b/07_timestamps/src/_arch/aarch64/time.rs
index 1e2efbec0..94d023795 100644
--- a/07_timestamps/src/_arch/aarch64/time.rs
+++ b/07_timestamps/src/_arch/aarch64/time.rs
@@ -12,12 +12,12 @@
 //! crate::time::arch_time
 
 use crate::warn;
+use aarch64_cpu::{asm::barrier, registers::*};
 use core::{
     num::{NonZeroU128, NonZeroU32, NonZeroU64},
     ops::{Add, Div},
     time::Duration,
 };
-use cortex_a::{asm::barrier, registers::*};
 use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
diff --git a/08_hw_debug_JTAG/Cargo.lock b/08_hw_debug_JTAG/Cargo.lock
index bcfb442af..9020b4f99 100644
--- a/08_hw_debug_JTAG/Cargo.lock
+++ b/08_hw_debug_JTAG/Cargo.lock
@@ -3,10 +3,10 @@
 version = 3
 
 [[package]]
-name = "cortex-a"
-version = "8.0.0"
+name = "aarch64-cpu"
+version = "9.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
+checksum = "3aceb88e55ba626a5479279268d009a92d9d00eacce0de1b8c236c7ad31b7225"
 dependencies = [
  "tock-registers",
 ]
@@ -15,7 +15,7 @@ dependencies = [
 name = "mingo"
 version = "0.8.0"
 dependencies = [
- "cortex-a",
+ "aarch64-cpu",
  "tock-registers",
 ]
 
diff --git a/08_hw_debug_JTAG/Cargo.toml b/08_hw_debug_JTAG/Cargo.toml
index 55963c384..e310c371e 100644
--- a/08_hw_debug_JTAG/Cargo.toml
+++ b/08_hw_debug_JTAG/Cargo.toml
@@ -27,4 +27,4 @@ tock-registers = { version = "0.8.x", default-features = false, features = ["reg
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "8.x.x" }
+aarch64-cpu = { version = "9.x.x" }
diff --git a/08_hw_debug_JTAG/src/_arch/aarch64/cpu.rs b/08_hw_debug_JTAG/src/_arch/aarch64/cpu.rs
index 4414ac6ad..bbe7687ae 100644
--- a/08_hw_debug_JTAG/src/_arch/aarch64/cpu.rs
+++ b/08_hw_debug_JTAG/src/_arch/aarch64/cpu.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::cpu::arch_cpu
 
-use cortex_a::asm;
+use aarch64_cpu::asm;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/08_hw_debug_JTAG/src/_arch/aarch64/time.rs b/08_hw_debug_JTAG/src/_arch/aarch64/time.rs
index 1e2efbec0..94d023795 100644
--- a/08_hw_debug_JTAG/src/_arch/aarch64/time.rs
+++ b/08_hw_debug_JTAG/src/_arch/aarch64/time.rs
@@ -12,12 +12,12 @@
 //! crate::time::arch_time
 
 use crate::warn;
+use aarch64_cpu::{asm::barrier, registers::*};
 use core::{
     num::{NonZeroU128, NonZeroU32, NonZeroU64},
     ops::{Add, Div},
     time::Duration,
 };
-use cortex_a::{asm::barrier, registers::*};
 use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
diff --git a/09_privilege_level/Cargo.lock b/09_privilege_level/Cargo.lock
index 29c6ef543..12b210428 100644
--- a/09_privilege_level/Cargo.lock
+++ b/09_privilege_level/Cargo.lock
@@ -3,10 +3,10 @@
 version = 3
 
 [[package]]
-name = "cortex-a"
-version = "8.0.0"
+name = "aarch64-cpu"
+version = "9.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
+checksum = "3aceb88e55ba626a5479279268d009a92d9d00eacce0de1b8c236c7ad31b7225"
 dependencies = [
  "tock-registers",
 ]
@@ -15,7 +15,7 @@ dependencies = [
 name = "mingo"
 version = "0.9.0"
 dependencies = [
- "cortex-a",
+ "aarch64-cpu",
  "tock-registers",
 ]
 
diff --git a/09_privilege_level/Cargo.toml b/09_privilege_level/Cargo.toml
index a89435bcc..480508b53 100644
--- a/09_privilege_level/Cargo.toml
+++ b/09_privilege_level/Cargo.toml
@@ -27,4 +27,4 @@ tock-registers = { version = "0.8.x", default-features = false, features = ["reg
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "8.x.x" }
+aarch64-cpu = { version = "9.x.x" }
diff --git a/09_privilege_level/README.md b/09_privilege_level/README.md
index 5710fdb8d..e0f73b630 100644
--- a/09_privilege_level/README.md
+++ b/09_privilege_level/README.md
@@ -75,7 +75,7 @@ We are already using them since [tutorial 07](../07_timestamps/), so of course w
 Therefore we set the respective flags in the [Counter-timer Hypervisor Control register] and
 additionally set the virtual offset to zero so that we get the real physical value everytime:
 
-[Counter-timer Hypervisor Control register]:  https://docs.rs/cortex-a/5.1.2/src/cortex_a/regs/cnthctl_el2.rs.html
+[Counter-timer Hypervisor Control register]:  https://docs.rs/aarch64-cpu/9.0.0/src/aarch64_cpu/registers/cnthctl_el2.rs.html
 
 ```rust
 // Enable timer counter registers for EL1.
@@ -88,7 +88,7 @@ CNTVOFF_EL2.set(0);
 Next, we configure the [Hypervisor Configuration Register] such that `EL1` runs in `AArch64` mode,
 and not in `AArch32`, which would also be possible.
 
-[Hypervisor Configuration Register]: https://docs.rs/cortex-a/5.1.2/src/cortex_a/regs/hcr_el2.rs.html
+[Hypervisor Configuration Register]: https://docs.rs/aarch64-cpu/9.0.0/src/aarch64_cpu/registers/hcr_el2.rs.html
 
 ```rust
 // Set EL1 execution state to AArch64.
@@ -100,7 +100,7 @@ HCR_EL2.write(HCR_EL2::RW::EL1IsAarch64);
 There is actually only one way to transition from a higher EL to a lower EL, which is by way of
 executing the [ERET] instruction.
 
-[ERET]: https://docs.rs/cortex-a/5.1.2/src/cortex_a/asm.rs.html#87-96
+[ERET]: https://docs.rs/aarch64-cpu/9.0.0/src/aarch64_cpu/asm.rs.html#92-101
 
 This instruction will copy the contents of the [Saved Program Status Register - EL2] to `Current
 Program Status Register - EL1` and jump to the instruction address that is stored in the [Exception
@@ -109,8 +109,8 @@ Link Register - EL2].
 This is basically the reverse of what is happening when an exception is taken. You'll learn about
 that in an upcoming tutorial.
 
-[Saved Program Status Register - EL2]: https://docs.rs/cortex-a/5.1.2/src/cortex_a/regs/spsr_el2.rs.html
-[Exception Link Register - EL2]: https://docs.rs/cortex-a/5.1.2/src/cortex_a/regs/elr_el2.rs.html
+[Saved Program Status Register - EL2]: https://docs.rs/aarch64-cpu/9.0.0/src/aarch64_cpu/registers/spsr_el2.rs.html
+[Exception Link Register - EL2]: https://docs.rs/aarch64-cpu/9.0.0/src/aarch64_cpu/registers/elr_el2.rs.html
 
 ```rust
 // Set up a simulated exception return.
@@ -212,11 +212,12 @@ diff -uNr 08_hw_debug_JTAG/Cargo.toml 09_privilege_level/Cargo.toml
 diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs 09_privilege_level/src/_arch/aarch64/cpu/boot.rs
 --- 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs
 +++ 09_privilege_level/src/_arch/aarch64/cpu/boot.rs
-@@ -12,21 +12,72 @@
+@@ -11,22 +11,73 @@
+ //!
  //! crate::cpu::boot::arch_boot
 
++use aarch64_cpu::{asm, registers::*};
  use core::arch::global_asm;
-+use cortex_a::{asm, registers::*};
 +use tock_registers::interfaces::Writeable;
 
  // Assembly counterpart to this file.
@@ -348,7 +349,7 @@ diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/exception/asynchronous.rs 09_privil
 +//!
 +//! crate::exception::asynchronous::arch_asynchronous
 +
-+use cortex_a::registers::*;
++use aarch64_cpu::registers::*;
 +use tock_registers::interfaces::Readable;
 +
 +//--------------------------------------------------------------------------------------------------
@@ -435,7 +436,7 @@ diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/exception.rs 09_privilege_level/src
 +//!
 +//! crate::exception::arch_exception
 +
-+use cortex_a::registers::*;
++use aarch64_cpu::registers::*;
 +use tock_registers::interfaces::Readable;
 +
 +//--------------------------------------------------------------------------------------------------
diff --git a/09_privilege_level/src/_arch/aarch64/cpu.rs b/09_privilege_level/src/_arch/aarch64/cpu.rs
index 4414ac6ad..bbe7687ae 100644
--- a/09_privilege_level/src/_arch/aarch64/cpu.rs
+++ b/09_privilege_level/src/_arch/aarch64/cpu.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::cpu::arch_cpu
 
-use cortex_a::asm;
+use aarch64_cpu::asm;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/09_privilege_level/src/_arch/aarch64/cpu/boot.rs b/09_privilege_level/src/_arch/aarch64/cpu/boot.rs
index 0bf45b837..b458f0db5 100644
--- a/09_privilege_level/src/_arch/aarch64/cpu/boot.rs
+++ b/09_privilege_level/src/_arch/aarch64/cpu/boot.rs
@@ -11,8 +11,8 @@
 //!
 //! crate::cpu::boot::arch_boot
 
+use aarch64_cpu::{asm, registers::*};
 use core::arch::global_asm;
-use cortex_a::{asm, registers::*};
 use tock_registers::interfaces::Writeable;
 
 // Assembly counterpart to this file.
diff --git a/09_privilege_level/src/_arch/aarch64/exception.rs b/09_privilege_level/src/_arch/aarch64/exception.rs
index c8eac4f02..c2b7cea8c 100644
--- a/09_privilege_level/src/_arch/aarch64/exception.rs
+++ b/09_privilege_level/src/_arch/aarch64/exception.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::exception::arch_exception
 
-use cortex_a::registers::*;
+use aarch64_cpu::registers::*;
 use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
diff --git a/09_privilege_level/src/_arch/aarch64/exception/asynchronous.rs b/09_privilege_level/src/_arch/aarch64/exception/asynchronous.rs
index e3e3672e4..0347dc3f6 100644
--- a/09_privilege_level/src/_arch/aarch64/exception/asynchronous.rs
+++ b/09_privilege_level/src/_arch/aarch64/exception/asynchronous.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::exception::asynchronous::arch_asynchronous
 
-use cortex_a::registers::*;
+use aarch64_cpu::registers::*;
 use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
diff --git a/09_privilege_level/src/_arch/aarch64/time.rs b/09_privilege_level/src/_arch/aarch64/time.rs
index 1e2efbec0..94d023795 100644
--- a/09_privilege_level/src/_arch/aarch64/time.rs
+++ b/09_privilege_level/src/_arch/aarch64/time.rs
@@ -12,12 +12,12 @@
 //! crate::time::arch_time
 
 use crate::warn;
+use aarch64_cpu::{asm::barrier, registers::*};
 use core::{
     num::{NonZeroU128, NonZeroU32, NonZeroU64},
     ops::{Add, Div},
     time::Duration,
 };
-use cortex_a::{asm::barrier, registers::*};
 use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
diff --git a/10_virtual_mem_part1_identity_mapping/Cargo.lock b/10_virtual_mem_part1_identity_mapping/Cargo.lock
index 4bfff9358..af2a0a5d5 100644
--- a/10_virtual_mem_part1_identity_mapping/Cargo.lock
+++ b/10_virtual_mem_part1_identity_mapping/Cargo.lock
@@ -3,10 +3,10 @@
 version = 3
 
 [[package]]
-name = "cortex-a"
-version = "8.0.0"
+name = "aarch64-cpu"
+version = "9.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
+checksum = "3aceb88e55ba626a5479279268d009a92d9d00eacce0de1b8c236c7ad31b7225"
 dependencies = [
  "tock-registers",
 ]
@@ -15,7 +15,7 @@ dependencies = [
 name = "mingo"
 version = "0.10.0"
 dependencies = [
- "cortex-a",
+ "aarch64-cpu",
  "tock-registers",
 ]
 
diff --git a/10_virtual_mem_part1_identity_mapping/Cargo.toml b/10_virtual_mem_part1_identity_mapping/Cargo.toml
index d3e2582da..6f12f98e8 100644
--- a/10_virtual_mem_part1_identity_mapping/Cargo.toml
+++ b/10_virtual_mem_part1_identity_mapping/Cargo.toml
@@ -27,4 +27,4 @@ tock-registers = { version = "0.8.x", default-features = false, features = ["reg
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "8.x.x" }
+aarch64-cpu = { version = "9.x.x" }
diff --git a/10_virtual_mem_part1_identity_mapping/README.md b/10_virtual_mem_part1_identity_mapping/README.md
index 946500dc5..36c37c79c 100644
--- a/10_virtual_mem_part1_identity_mapping/README.md
+++ b/10_virtual_mem_part1_identity_mapping/README.md
@@ -218,9 +218,9 @@ self.configure_translation_control();
 Finally, the `MMU` is turned on through the [System Control Register - EL1]. The last step also
 enables caching for data and instructions.
 
-[Translation Table Base Register 0 - EL1]: https://docs.rs/crate/cortex-a/5.1.2/source/src/regs/ttbr0_el1.rs
-[Translation Control Register - EL1]: https://docs.rs/crate/cortex-a/5.1.2/source/src/regs/tcr_el1.rs
-[System Control Register - EL1]: https://docs.rs/crate/cortex-a/5.1.2/source/src/regs/sctlr_el1.rs
+[Translation Table Base Register 0 - EL1]: https://docs.rs/aarch64-cpu/9.0.0/src/aarch64_cpu/registers/ttbr0_el1.rs.html
+[Translation Control Register - EL1]: https://docs.rs/aarch64-cpu/9.0.0/src/aarch64_cpu/registers/tcr_el1.rs.html
+[System Control Register - EL1]: https://docs.rs/aarch64-cpu/9.0.0/src/aarch64_cpu/registers/sctlr_el1.rs.html
 
 ### `kernel.ld`
 
@@ -257,11 +257,11 @@ The MMU init code is again a good example to see the great potential of Rust's z
 abstractions[[1]][[2]] for embedded programming.
 
 Let's take a look again at the piece of code for setting up the `MAIR_EL1` register using the
-[cortex-a] crate:
+[aarch64-cpu] crate:
 
 [1]: https://blog.rust-lang.org/2015/05/11/traits.html
 [2]: https://ruudvanasseldonk.com/2016/11/30/zero-cost-abstractions
-[cortex-a]: https://crates.io/crates/cortex-a
+[aarch64-cpu]: https://crates.io/crates/aarch64-cpu
 
 ```rust
 /// Setup function for the MAIR_EL1 register.
@@ -681,8 +681,8 @@ diff -uNr 09_privilege_level/src/_arch/aarch64/memory/mmu.rs 10_virtual_mem_part
 +    bsp, memory,
 +    memory::mmu::{translation_table::KernelTranslationTable, TranslationGranule},
 +};
++use aarch64_cpu::{asm::barrier, registers::*};
 +use core::intrinsics::unlikely;
-+use cortex_a::{asm::barrier, registers::*};
 +use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 +
 +//--------------------------------------------------------------------------------------------------
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu.rs
index 4414ac6ad..bbe7687ae 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::cpu::arch_cpu
 
-use cortex_a::asm;
+use aarch64_cpu::asm;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs
index 0bf45b837..b458f0db5 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs
@@ -11,8 +11,8 @@
 //!
 //! crate::cpu::boot::arch_boot
 
+use aarch64_cpu::{asm, registers::*};
 use core::arch::global_asm;
-use cortex_a::{asm, registers::*};
 use tock_registers::interfaces::Writeable;
 
 // Assembly counterpart to this file.
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs
index c8eac4f02..c2b7cea8c 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::exception::arch_exception
 
-use cortex_a::registers::*;
+use aarch64_cpu::registers::*;
 use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception/asynchronous.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception/asynchronous.rs
index e3e3672e4..0347dc3f6 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception/asynchronous.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception/asynchronous.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::exception::asynchronous::arch_asynchronous
 
-use cortex_a::registers::*;
+use aarch64_cpu::registers::*;
 use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
index 3a965f710..e5e2653a2 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
@@ -17,8 +17,8 @@ use crate::{
     bsp, memory,
     memory::mmu::{translation_table::KernelTranslationTable, TranslationGranule},
 };
+use aarch64_cpu::{asm::barrier, registers::*};
 use core::intrinsics::unlikely;
-use cortex_a::{asm::barrier, registers::*};
 use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs
index 1e2efbec0..94d023795 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs
@@ -12,12 +12,12 @@
 //! crate::time::arch_time
 
 use crate::warn;
+use aarch64_cpu::{asm::barrier, registers::*};
 use core::{
     num::{NonZeroU128, NonZeroU32, NonZeroU64},
     ops::{Add, Div},
     time::Duration,
 };
-use cortex_a::{asm::barrier, registers::*};
 use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
diff --git a/11_exceptions_part1_groundwork/Cargo.lock b/11_exceptions_part1_groundwork/Cargo.lock
index c7bfdaddf..dd741b8d0 100644
--- a/11_exceptions_part1_groundwork/Cargo.lock
+++ b/11_exceptions_part1_groundwork/Cargo.lock
@@ -3,10 +3,10 @@
 version = 3
 
 [[package]]
-name = "cortex-a"
-version = "8.0.0"
+name = "aarch64-cpu"
+version = "9.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
+checksum = "3aceb88e55ba626a5479279268d009a92d9d00eacce0de1b8c236c7ad31b7225"
 dependencies = [
  "tock-registers",
 ]
@@ -15,7 +15,7 @@ dependencies = [
 name = "mingo"
 version = "0.11.0"
 dependencies = [
- "cortex-a",
+ "aarch64-cpu",
  "tock-registers",
 ]
 
diff --git a/11_exceptions_part1_groundwork/Cargo.toml b/11_exceptions_part1_groundwork/Cargo.toml
index c8d3613fa..22343d4c5 100644
--- a/11_exceptions_part1_groundwork/Cargo.toml
+++ b/11_exceptions_part1_groundwork/Cargo.toml
@@ -27,4 +27,4 @@ tock-registers = { version = "0.8.x", default-features = false, features = ["reg
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "8.x.x" }
+aarch64-cpu = { version = "9.x.x" }
diff --git a/11_exceptions_part1_groundwork/README.md b/11_exceptions_part1_groundwork/README.md
index 12812acb0..0a9cc9fc8 100644
--- a/11_exceptions_part1_groundwork/README.md
+++ b/11_exceptions_part1_groundwork/README.md
@@ -507,10 +507,10 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs 1
  //!
  //! crate::exception::arch_exception
 
--use cortex_a::registers::*;
+-use aarch64_cpu::registers::*;
 -use tock_registers::interfaces::Readable;
++use aarch64_cpu::{asm::barrier, registers::*};
 +use core::{arch::global_asm, cell::UnsafeCell, fmt};
-+use cortex_a::{asm::barrier, registers::*};
 +use tock_registers::{
 +    interfaces::{Readable, Writeable},
 +    registers::InMemoryRegister,
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs
index 4414ac6ad..bbe7687ae 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::cpu::arch_cpu
 
-use cortex_a::asm;
+use aarch64_cpu::asm;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs
index 0bf45b837..b458f0db5 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs
@@ -11,8 +11,8 @@
 //!
 //! crate::cpu::boot::arch_boot
 
+use aarch64_cpu::{asm, registers::*};
 use core::arch::global_asm;
-use cortex_a::{asm, registers::*};
 use tock_registers::interfaces::Writeable;
 
 // Assembly counterpart to this file.
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
index c72fb8855..165e0730b 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
@@ -11,8 +11,8 @@
 //!
 //! crate::exception::arch_exception
 
+use aarch64_cpu::{asm::barrier, registers::*};
 use core::{arch::global_asm, cell::UnsafeCell, fmt};
-use cortex_a::{asm::barrier, registers::*};
 use tock_registers::{
     interfaces::{Readable, Writeable},
     registers::InMemoryRegister,
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/exception/asynchronous.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/exception/asynchronous.rs
index e3e3672e4..0347dc3f6 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/exception/asynchronous.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/exception/asynchronous.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::exception::asynchronous::arch_asynchronous
 
-use cortex_a::registers::*;
+use aarch64_cpu::registers::*;
 use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
index 3a965f710..e5e2653a2 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
@@ -17,8 +17,8 @@ use crate::{
     bsp, memory,
     memory::mmu::{translation_table::KernelTranslationTable, TranslationGranule},
 };
+use aarch64_cpu::{asm::barrier, registers::*};
 use core::intrinsics::unlikely;
-use cortex_a::{asm::barrier, registers::*};
 use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/time.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/time.rs
index 1e2efbec0..94d023795 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/time.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/time.rs
@@ -12,12 +12,12 @@
 //! crate::time::arch_time
 
 use crate::warn;
+use aarch64_cpu::{asm::barrier, registers::*};
 use core::{
     num::{NonZeroU128, NonZeroU32, NonZeroU64},
     ops::{Add, Div},
     time::Duration,
 };
-use cortex_a::{asm::barrier, registers::*};
 use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
diff --git a/12_integrated_testing/Cargo.lock b/12_integrated_testing/Cargo.lock
index abe5ab828..8db3db876 100644
--- a/12_integrated_testing/Cargo.lock
+++ b/12_integrated_testing/Cargo.lock
@@ -3,10 +3,10 @@
 version = 3
 
 [[package]]
-name = "cortex-a"
-version = "8.0.0"
+name = "aarch64-cpu"
+version = "9.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
+checksum = "3aceb88e55ba626a5479279268d009a92d9d00eacce0de1b8c236c7ad31b7225"
 dependencies = [
  "tock-registers",
 ]
@@ -15,7 +15,7 @@ dependencies = [
 name = "mingo"
 version = "0.12.0"
 dependencies = [
- "cortex-a",
+ "aarch64-cpu",
  "qemu-exit",
  "test-macros",
  "test-types",
diff --git a/12_integrated_testing/kernel/Cargo.toml b/12_integrated_testing/kernel/Cargo.toml
index 7bbca0b4a..97dd972e0 100644
--- a/12_integrated_testing/kernel/Cargo.toml
+++ b/12_integrated_testing/kernel/Cargo.toml
@@ -23,7 +23,7 @@ qemu-exit = { version = "3.x.x", optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "8.x.x" }
+aarch64-cpu = { version = "9.x.x" }
 
 ##--------------------------------------------------------------------------------------------------
 ## Testing
diff --git a/12_integrated_testing/kernel/src/_arch/aarch64/cpu.rs b/12_integrated_testing/kernel/src/_arch/aarch64/cpu.rs
index 66da661c7..7eb7f010c 100644
--- a/12_integrated_testing/kernel/src/_arch/aarch64/cpu.rs
+++ b/12_integrated_testing/kernel/src/_arch/aarch64/cpu.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::cpu::arch_cpu
 
-use cortex_a::asm;
+use aarch64_cpu::asm;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/12_integrated_testing/kernel/src/_arch/aarch64/cpu/boot.rs b/12_integrated_testing/kernel/src/_arch/aarch64/cpu/boot.rs
index 0bf45b837..b458f0db5 100644
--- a/12_integrated_testing/kernel/src/_arch/aarch64/cpu/boot.rs
+++ b/12_integrated_testing/kernel/src/_arch/aarch64/cpu/boot.rs
@@ -11,8 +11,8 @@
 //!
 //! crate::cpu::boot::arch_boot
 
+use aarch64_cpu::{asm, registers::*};
 use core::arch::global_asm;
-use cortex_a::{asm, registers::*};
 use tock_registers::interfaces::Writeable;
 
 // Assembly counterpart to this file.
diff --git a/12_integrated_testing/kernel/src/_arch/aarch64/exception.rs b/12_integrated_testing/kernel/src/_arch/aarch64/exception.rs
index 5664605e0..84681bc79 100644
--- a/12_integrated_testing/kernel/src/_arch/aarch64/exception.rs
+++ b/12_integrated_testing/kernel/src/_arch/aarch64/exception.rs
@@ -11,8 +11,8 @@
 //!
 //! crate::exception::arch_exception
 
+use aarch64_cpu::{asm::barrier, registers::*};
 use core::{arch::global_asm, cell::UnsafeCell, fmt};
-use cortex_a::{asm::barrier, registers::*};
 use tock_registers::{
     interfaces::{Readable, Writeable},
     registers::InMemoryRegister,
diff --git a/12_integrated_testing/kernel/src/_arch/aarch64/exception/asynchronous.rs b/12_integrated_testing/kernel/src/_arch/aarch64/exception/asynchronous.rs
index e3e3672e4..0347dc3f6 100644
--- a/12_integrated_testing/kernel/src/_arch/aarch64/exception/asynchronous.rs
+++ b/12_integrated_testing/kernel/src/_arch/aarch64/exception/asynchronous.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::exception::asynchronous::arch_asynchronous
 
-use cortex_a::registers::*;
+use aarch64_cpu::registers::*;
 use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
diff --git a/12_integrated_testing/kernel/src/_arch/aarch64/memory/mmu.rs b/12_integrated_testing/kernel/src/_arch/aarch64/memory/mmu.rs
index 15a7faeb2..fbd4992f1 100644
--- a/12_integrated_testing/kernel/src/_arch/aarch64/memory/mmu.rs
+++ b/12_integrated_testing/kernel/src/_arch/aarch64/memory/mmu.rs
@@ -17,8 +17,8 @@ use crate::{
     bsp, memory,
     memory::mmu::{translation_table::KernelTranslationTable, TranslationGranule},
 };
+use aarch64_cpu::{asm::barrier, registers::*};
 use core::intrinsics::unlikely;
-use cortex_a::{asm::barrier, registers::*};
 use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
diff --git a/12_integrated_testing/kernel/src/_arch/aarch64/time.rs b/12_integrated_testing/kernel/src/_arch/aarch64/time.rs
index 1e2efbec0..94d023795 100644
--- a/12_integrated_testing/kernel/src/_arch/aarch64/time.rs
+++ b/12_integrated_testing/kernel/src/_arch/aarch64/time.rs
@@ -12,12 +12,12 @@
 //! crate::time::arch_time
 
 use crate::warn;
+use aarch64_cpu::{asm::barrier, registers::*};
 use core::{
     num::{NonZeroU128, NonZeroU32, NonZeroU64},
     ops::{Add, Div},
     time::Duration,
 };
-use cortex_a::{asm::barrier, registers::*};
 use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
diff --git a/13_exceptions_part2_peripheral_IRQs/Cargo.lock b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
index d893a0afb..ad1e8660e 100644
--- a/13_exceptions_part2_peripheral_IRQs/Cargo.lock
+++ b/13_exceptions_part2_peripheral_IRQs/Cargo.lock
@@ -3,10 +3,10 @@
 version = 3
 
 [[package]]
-name = "cortex-a"
-version = "8.0.0"
+name = "aarch64-cpu"
+version = "9.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
+checksum = "3aceb88e55ba626a5479279268d009a92d9d00eacce0de1b8c236c7ad31b7225"
 dependencies = [
  "tock-registers",
 ]
@@ -15,7 +15,7 @@ dependencies = [
 name = "mingo"
 version = "0.13.0"
 dependencies = [
- "cortex-a",
+ "aarch64-cpu",
  "qemu-exit",
  "test-macros",
  "test-types",
diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index a8c503d59..944001e7a 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -802,7 +802,7 @@ diff -uNr 12_integrated_testing/kernel/src/_arch/aarch64/cpu/smp.rs 13_exception
 +//!
 +//! crate::cpu::smp::arch_smp
 +
-+use cortex_a::registers::*;
++use aarch64_cpu::registers::*;
 +use tock_registers::interfaces::Readable;
 +
 +//--------------------------------------------------------------------------------------------------
@@ -823,13 +823,12 @@ diff -uNr 12_integrated_testing/kernel/src/_arch/aarch64/cpu/smp.rs 13_exception
 diff -uNr 12_integrated_testing/kernel/src/_arch/aarch64/exception/asynchronous.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception/asynchronous.rs
 --- 12_integrated_testing/kernel/src/_arch/aarch64/exception/asynchronous.rs
 +++ 13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception/asynchronous.rs
-@@ -11,13 +11,18 @@
- //!
+@@ -12,12 +12,17 @@
  //! crate::exception::asynchronous::arch_asynchronous
 
-+use core::arch::asm;
- use cortex_a::registers::*;
+ use aarch64_cpu::registers::*;
 -use tock_registers::interfaces::Readable;
++use core::arch::asm;
 +use tock_registers::interfaces::{Readable, Writeable};
 
  //--------------------------------------------------------------------------------------------------
@@ -913,8 +912,8 @@ diff -uNr 12_integrated_testing/kernel/src/_arch/aarch64/exception.rs 13_excepti
  //! crate::exception::arch_exception
 
 +use crate::exception;
+ use aarch64_cpu::{asm::barrier, registers::*};
  use core::{arch::global_asm, cell::UnsafeCell, fmt};
- use cortex_a::{asm::barrier, registers::*};
  use tock_registers::{
 @@ -102,8 +103,9 @@
  }
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/Cargo.toml b/13_exceptions_part2_peripheral_IRQs/kernel/Cargo.toml
index 5f371dda4..3b04b97b6 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/Cargo.toml
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/Cargo.toml
@@ -23,7 +23,7 @@ qemu-exit = { version = "3.x.x", optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "8.x.x" }
+aarch64-cpu = { version = "9.x.x" }
 
 ##--------------------------------------------------------------------------------------------------
 ## Testing
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu.rs
index 66da661c7..7eb7f010c 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::cpu::arch_cpu
 
-use cortex_a::asm;
+use aarch64_cpu::asm;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/boot.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/boot.rs
index 0bf45b837..b458f0db5 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/boot.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/boot.rs
@@ -11,8 +11,8 @@
 //!
 //! crate::cpu::boot::arch_boot
 
+use aarch64_cpu::{asm, registers::*};
 use core::arch::global_asm;
-use cortex_a::{asm, registers::*};
 use tock_registers::interfaces::Writeable;
 
 // Assembly counterpart to this file.
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/smp.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/smp.rs
index 351fde62e..9d304d657 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/smp.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/smp.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::cpu::smp::arch_smp
 
-use cortex_a::registers::*;
+use aarch64_cpu::registers::*;
 use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception.rs
index 3aa6fb242..71831178e 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception.rs
@@ -12,8 +12,8 @@
 //! crate::exception::arch_exception
 
 use crate::exception;
+use aarch64_cpu::{asm::barrier, registers::*};
 use core::{arch::global_asm, cell::UnsafeCell, fmt};
-use cortex_a::{asm::barrier, registers::*};
 use tock_registers::{
     interfaces::{Readable, Writeable},
     registers::InMemoryRegister,
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception/asynchronous.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception/asynchronous.rs
index cf6f97acc..f545a3e19 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception/asynchronous.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception/asynchronous.rs
@@ -11,8 +11,8 @@
 //!
 //! crate::exception::asynchronous::arch_asynchronous
 
+use aarch64_cpu::registers::*;
 use core::arch::asm;
-use cortex_a::registers::*;
 use tock_registers::interfaces::{Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/memory/mmu.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/memory/mmu.rs
index 15a7faeb2..fbd4992f1 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/memory/mmu.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/memory/mmu.rs
@@ -17,8 +17,8 @@ use crate::{
     bsp, memory,
     memory::mmu::{translation_table::KernelTranslationTable, TranslationGranule},
 };
+use aarch64_cpu::{asm::barrier, registers::*};
 use core::intrinsics::unlikely;
-use cortex_a::{asm::barrier, registers::*};
 use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/time.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/time.rs
index 1e2efbec0..94d023795 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/time.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/time.rs
@@ -12,12 +12,12 @@
 //! crate::time::arch_time
 
 use crate::warn;
+use aarch64_cpu::{asm::barrier, registers::*};
 use core::{
     num::{NonZeroU128, NonZeroU32, NonZeroU64},
     ops::{Add, Div},
     time::Duration,
 };
-use cortex_a::{asm::barrier, registers::*};
 use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
diff --git a/14_virtual_mem_part2_mmio_remap/Cargo.lock b/14_virtual_mem_part2_mmio_remap/Cargo.lock
index dd14a9d79..eea037346 100644
--- a/14_virtual_mem_part2_mmio_remap/Cargo.lock
+++ b/14_virtual_mem_part2_mmio_remap/Cargo.lock
@@ -3,10 +3,10 @@
 version = 3
 
 [[package]]
-name = "cortex-a"
-version = "8.0.0"
+name = "aarch64-cpu"
+version = "9.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
+checksum = "3aceb88e55ba626a5479279268d009a92d9d00eacce0de1b8c236c7ad31b7225"
 dependencies = [
  "tock-registers",
 ]
@@ -15,7 +15,7 @@ dependencies = [
 name = "mingo"
 version = "0.14.0"
 dependencies = [
- "cortex-a",
+ "aarch64-cpu",
  "qemu-exit",
  "test-macros",
  "test-types",
diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index 61117358c..7d16e69c1 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -751,8 +751,8 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/memory/mm
 -    memory::mmu::{translation_table::KernelTranslationTable, TranslationGranule},
 +    memory::{mmu::TranslationGranule, Address, Physical},
  };
+ use aarch64_cpu::{asm::barrier, registers::*};
  use core::intrinsics::unlikely;
- use cortex_a::{asm::barrier, registers::*};
 @@ -46,13 +46,6 @@
  // Global instances
  //--------------------------------------------------------------------------------------------------
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/Cargo.toml b/14_virtual_mem_part2_mmio_remap/kernel/Cargo.toml
index fe4e48e70..b85ecbede 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/Cargo.toml
+++ b/14_virtual_mem_part2_mmio_remap/kernel/Cargo.toml
@@ -23,7 +23,7 @@ qemu-exit = { version = "3.x.x", optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "8.x.x" }
+aarch64-cpu = { version = "9.x.x" }
 
 ##--------------------------------------------------------------------------------------------------
 ## Testing
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu.rs
index 66da661c7..7eb7f010c 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::cpu::arch_cpu
 
-use cortex_a::asm;
+use aarch64_cpu::asm;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.rs
index 0bf45b837..b458f0db5 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.rs
@@ -11,8 +11,8 @@
 //!
 //! crate::cpu::boot::arch_boot
 
+use aarch64_cpu::{asm, registers::*};
 use core::arch::global_asm;
-use cortex_a::{asm, registers::*};
 use tock_registers::interfaces::Writeable;
 
 // Assembly counterpart to this file.
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/smp.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/smp.rs
index 351fde62e..9d304d657 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/smp.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/smp.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::cpu::smp::arch_smp
 
-use cortex_a::registers::*;
+use aarch64_cpu::registers::*;
 use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception.rs
index 3aa6fb242..71831178e 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception.rs
@@ -12,8 +12,8 @@
 //! crate::exception::arch_exception
 
 use crate::exception;
+use aarch64_cpu::{asm::barrier, registers::*};
 use core::{arch::global_asm, cell::UnsafeCell, fmt};
-use cortex_a::{asm::barrier, registers::*};
 use tock_registers::{
     interfaces::{Readable, Writeable},
     registers::InMemoryRegister,
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception/asynchronous.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception/asynchronous.rs
index cf6f97acc..f545a3e19 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception/asynchronous.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception/asynchronous.rs
@@ -11,8 +11,8 @@
 //!
 //! crate::exception::asynchronous::arch_asynchronous
 
+use aarch64_cpu::registers::*;
 use core::arch::asm;
-use cortex_a::registers::*;
 use tock_registers::interfaces::{Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/memory/mmu.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/memory/mmu.rs
index e2db2d236..aaec19252 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/memory/mmu.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/memory/mmu.rs
@@ -17,8 +17,8 @@ use crate::{
     bsp, memory,
     memory::{mmu::TranslationGranule, Address, Physical},
 };
+use aarch64_cpu::{asm::barrier, registers::*};
 use core::intrinsics::unlikely;
-use cortex_a::{asm::barrier, registers::*};
 use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/time.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/time.rs
index 1e2efbec0..94d023795 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/time.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/time.rs
@@ -12,12 +12,12 @@
 //! crate::time::arch_time
 
 use crate::warn;
+use aarch64_cpu::{asm::barrier, registers::*};
 use core::{
     num::{NonZeroU128, NonZeroU32, NonZeroU64},
     ops::{Add, Div},
     time::Duration,
 };
-use cortex_a::{asm::barrier, registers::*};
 use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
diff --git a/15_virtual_mem_part3_precomputed_tables/Cargo.lock b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
index 6863764a8..1bef088b6 100644
--- a/15_virtual_mem_part3_precomputed_tables/Cargo.lock
+++ b/15_virtual_mem_part3_precomputed_tables/Cargo.lock
@@ -3,10 +3,10 @@
 version = 3
 
 [[package]]
-name = "cortex-a"
-version = "8.0.0"
+name = "aarch64-cpu"
+version = "9.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
+checksum = "3aceb88e55ba626a5479279268d009a92d9d00eacce0de1b8c236c7ad31b7225"
 dependencies = [
  "tock-registers",
 ]
@@ -15,7 +15,7 @@ dependencies = [
 name = "mingo"
 version = "0.15.0"
 dependencies = [
- "cortex-a",
+ "aarch64-cpu",
  "qemu-exit",
  "test-macros",
  "test-types",
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index c850992e1..23210265c 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -816,8 +816,8 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.rs 1
  //! crate::cpu::boot::arch_boot
 
 +use crate::{memory, memory::Address};
+ use aarch64_cpu::{asm, registers::*};
  use core::arch::global_asm;
- use cortex_a::{asm, registers::*};
  use tock_registers::interfaces::Writeable;
 @@ -75,9 +76,16 @@
  ///
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/Cargo.toml b/15_virtual_mem_part3_precomputed_tables/kernel/Cargo.toml
index 9a0408ade..73b6feef1 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/Cargo.toml
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/Cargo.toml
@@ -23,7 +23,7 @@ qemu-exit = { version = "3.x.x", optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "8.x.x" }
+aarch64-cpu = { version = "9.x.x" }
 
 ##--------------------------------------------------------------------------------------------------
 ## Testing
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu.rs
index 66da661c7..7eb7f010c 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::cpu::arch_cpu
 
-use cortex_a::asm;
+use aarch64_cpu::asm;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.rs
index a66c0cb32..fc70fe7f3 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.rs
@@ -12,8 +12,8 @@
 //! crate::cpu::boot::arch_boot
 
 use crate::{memory, memory::Address};
+use aarch64_cpu::{asm, registers::*};
 use core::arch::global_asm;
-use cortex_a::{asm, registers::*};
 use tock_registers::interfaces::Writeable;
 
 // Assembly counterpart to this file.
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/smp.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/smp.rs
index 351fde62e..9d304d657 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/smp.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/smp.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::cpu::smp::arch_smp
 
-use cortex_a::registers::*;
+use aarch64_cpu::registers::*;
 use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception.rs
index 3aa6fb242..71831178e 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception.rs
@@ -12,8 +12,8 @@
 //! crate::exception::arch_exception
 
 use crate::exception;
+use aarch64_cpu::{asm::barrier, registers::*};
 use core::{arch::global_asm, cell::UnsafeCell, fmt};
-use cortex_a::{asm::barrier, registers::*};
 use tock_registers::{
     interfaces::{Readable, Writeable},
     registers::InMemoryRegister,
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception/asynchronous.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception/asynchronous.rs
index cf6f97acc..f545a3e19 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception/asynchronous.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception/asynchronous.rs
@@ -11,8 +11,8 @@
 //!
 //! crate::exception::asynchronous::arch_asynchronous
 
+use aarch64_cpu::registers::*;
 use core::arch::asm;
-use cortex_a::registers::*;
 use tock_registers::interfaces::{Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/memory/mmu.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/memory/mmu.rs
index e2db2d236..aaec19252 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/memory/mmu.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/memory/mmu.rs
@@ -17,8 +17,8 @@ use crate::{
     bsp, memory,
     memory::{mmu::TranslationGranule, Address, Physical},
 };
+use aarch64_cpu::{asm::barrier, registers::*};
 use core::intrinsics::unlikely;
-use cortex_a::{asm::barrier, registers::*};
 use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/time.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/time.rs
index 1e2efbec0..94d023795 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/time.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/time.rs
@@ -12,12 +12,12 @@
 //! crate::time::arch_time
 
 use crate::warn;
+use aarch64_cpu::{asm::barrier, registers::*};
 use core::{
     num::{NonZeroU128, NonZeroU32, NonZeroU64},
     ops::{Add, Div},
     time::Duration,
 };
-use cortex_a::{asm::barrier, registers::*};
 use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
diff --git a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
index 1cd1bc744..52d5b3fb5 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
+++ b/16_virtual_mem_part4_higher_half_kernel/Cargo.lock
@@ -3,10 +3,10 @@
 version = 3
 
 [[package]]
-name = "cortex-a"
-version = "8.0.0"
+name = "aarch64-cpu"
+version = "9.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
+checksum = "3aceb88e55ba626a5479279268d009a92d9d00eacce0de1b8c236c7ad31b7225"
 dependencies = [
  "tock-registers",
 ]
@@ -15,7 +15,7 @@ dependencies = [
 name = "mingo"
 version = "0.16.0"
 dependencies = [
- "cortex-a",
+ "aarch64-cpu",
  "qemu-exit",
  "test-macros",
  "test-types",
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/Cargo.toml b/16_virtual_mem_part4_higher_half_kernel/kernel/Cargo.toml
index 06b2573c8..857256cb6 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/Cargo.toml
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/Cargo.toml
@@ -23,7 +23,7 @@ qemu-exit = { version = "3.x.x", optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "8.x.x" }
+aarch64-cpu = { version = "9.x.x" }
 
 ##--------------------------------------------------------------------------------------------------
 ## Testing
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu.rs
index 66da661c7..7eb7f010c 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::cpu::arch_cpu
 
-use cortex_a::asm;
+use aarch64_cpu::asm;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.rs
index 293d46085..2cad1ab61 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.rs
@@ -12,8 +12,8 @@
 //! crate::cpu::boot::arch_boot
 
 use crate::{memory, memory::Address};
+use aarch64_cpu::{asm, registers::*};
 use core::arch::global_asm;
-use cortex_a::{asm, registers::*};
 use tock_registers::interfaces::Writeable;
 
 // Assembly counterpart to this file.
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/smp.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/smp.rs
index 351fde62e..9d304d657 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/smp.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/smp.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::cpu::smp::arch_smp
 
-use cortex_a::registers::*;
+use aarch64_cpu::registers::*;
 use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception.rs
index 3aa6fb242..71831178e 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception.rs
@@ -12,8 +12,8 @@
 //! crate::exception::arch_exception
 
 use crate::exception;
+use aarch64_cpu::{asm::barrier, registers::*};
 use core::{arch::global_asm, cell::UnsafeCell, fmt};
-use cortex_a::{asm::barrier, registers::*};
 use tock_registers::{
     interfaces::{Readable, Writeable},
     registers::InMemoryRegister,
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception/asynchronous.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception/asynchronous.rs
index cf6f97acc..f545a3e19 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception/asynchronous.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception/asynchronous.rs
@@ -11,8 +11,8 @@
 //!
 //! crate::exception::asynchronous::arch_asynchronous
 
+use aarch64_cpu::registers::*;
 use core::arch::asm;
-use cortex_a::registers::*;
 use tock_registers::interfaces::{Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/memory/mmu.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/memory/mmu.rs
index 3d6c18b74..74a71d114 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/memory/mmu.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/memory/mmu.rs
@@ -17,8 +17,8 @@ use crate::{
     bsp, memory,
     memory::{mmu::TranslationGranule, Address, Physical},
 };
+use aarch64_cpu::{asm::barrier, registers::*};
 use core::intrinsics::unlikely;
-use cortex_a::{asm::barrier, registers::*};
 use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/time.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/time.rs
index 1e2efbec0..94d023795 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/time.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/time.rs
@@ -12,12 +12,12 @@
 //! crate::time::arch_time
 
 use crate::warn;
+use aarch64_cpu::{asm::barrier, registers::*};
 use core::{
     num::{NonZeroU128, NonZeroU32, NonZeroU64},
     ops::{Add, Div},
     time::Duration,
 };
-use cortex_a::{asm::barrier, registers::*};
 use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
diff --git a/17_kernel_symbols/Cargo.lock b/17_kernel_symbols/Cargo.lock
index af229efe8..382a3bda5 100644
--- a/17_kernel_symbols/Cargo.lock
+++ b/17_kernel_symbols/Cargo.lock
@@ -3,10 +3,10 @@
 version = 3
 
 [[package]]
-name = "cortex-a"
-version = "8.0.0"
+name = "aarch64-cpu"
+version = "9.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
+checksum = "3aceb88e55ba626a5479279268d009a92d9d00eacce0de1b8c236c7ad31b7225"
 dependencies = [
  "tock-registers",
 ]
@@ -26,7 +26,7 @@ dependencies = [
 name = "mingo"
 version = "0.17.0"
 dependencies = [
- "cortex-a",
+ "aarch64-cpu",
  "debug-symbol-types",
  "qemu-exit",
  "test-macros",
diff --git a/17_kernel_symbols/README.md b/17_kernel_symbols/README.md
index 925ed689f..aec53437d 100644
--- a/17_kernel_symbols/README.md
+++ b/17_kernel_symbols/README.md
@@ -272,8 +272,8 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/excep
 
 -use crate::exception;
 +use crate::{exception, memory, symbols};
+ use aarch64_cpu::{asm::barrier, registers::*};
  use core::{arch::global_asm, cell::UnsafeCell, fmt};
- use cortex_a::{asm::barrier, registers::*};
  use tock_registers::{
 @@ -260,6 +260,14 @@
 
diff --git a/17_kernel_symbols/kernel/Cargo.toml b/17_kernel_symbols/kernel/Cargo.toml
index a2a83aade..58bf54d25 100644
--- a/17_kernel_symbols/kernel/Cargo.toml
+++ b/17_kernel_symbols/kernel/Cargo.toml
@@ -24,7 +24,7 @@ qemu-exit = { version = "3.x.x", optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "8.x.x" }
+aarch64-cpu = { version = "9.x.x" }
 
 ##--------------------------------------------------------------------------------------------------
 ## Testing
diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/cpu.rs b/17_kernel_symbols/kernel/src/_arch/aarch64/cpu.rs
index 66da661c7..7eb7f010c 100644
--- a/17_kernel_symbols/kernel/src/_arch/aarch64/cpu.rs
+++ b/17_kernel_symbols/kernel/src/_arch/aarch64/cpu.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::cpu::arch_cpu
 
-use cortex_a::asm;
+use aarch64_cpu::asm;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.rs b/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.rs
index 293d46085..2cad1ab61 100644
--- a/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.rs
+++ b/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.rs
@@ -12,8 +12,8 @@
 //! crate::cpu::boot::arch_boot
 
 use crate::{memory, memory::Address};
+use aarch64_cpu::{asm, registers::*};
 use core::arch::global_asm;
-use cortex_a::{asm, registers::*};
 use tock_registers::interfaces::Writeable;
 
 // Assembly counterpart to this file.
diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/smp.rs b/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/smp.rs
index 351fde62e..9d304d657 100644
--- a/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/smp.rs
+++ b/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/smp.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::cpu::smp::arch_smp
 
-use cortex_a::registers::*;
+use aarch64_cpu::registers::*;
 use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/exception.rs b/17_kernel_symbols/kernel/src/_arch/aarch64/exception.rs
index 1d720f3ef..926d6d38b 100644
--- a/17_kernel_symbols/kernel/src/_arch/aarch64/exception.rs
+++ b/17_kernel_symbols/kernel/src/_arch/aarch64/exception.rs
@@ -12,8 +12,8 @@
 //! crate::exception::arch_exception
 
 use crate::{exception, memory, symbols};
+use aarch64_cpu::{asm::barrier, registers::*};
 use core::{arch::global_asm, cell::UnsafeCell, fmt};
-use cortex_a::{asm::barrier, registers::*};
 use tock_registers::{
     interfaces::{Readable, Writeable},
     registers::InMemoryRegister,
diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/exception/asynchronous.rs b/17_kernel_symbols/kernel/src/_arch/aarch64/exception/asynchronous.rs
index cf6f97acc..f545a3e19 100644
--- a/17_kernel_symbols/kernel/src/_arch/aarch64/exception/asynchronous.rs
+++ b/17_kernel_symbols/kernel/src/_arch/aarch64/exception/asynchronous.rs
@@ -11,8 +11,8 @@
 //!
 //! crate::exception::asynchronous::arch_asynchronous
 
+use aarch64_cpu::registers::*;
 use core::arch::asm;
-use cortex_a::registers::*;
 use tock_registers::interfaces::{Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/memory/mmu.rs b/17_kernel_symbols/kernel/src/_arch/aarch64/memory/mmu.rs
index 3d6c18b74..74a71d114 100644
--- a/17_kernel_symbols/kernel/src/_arch/aarch64/memory/mmu.rs
+++ b/17_kernel_symbols/kernel/src/_arch/aarch64/memory/mmu.rs
@@ -17,8 +17,8 @@ use crate::{
     bsp, memory,
     memory::{mmu::TranslationGranule, Address, Physical},
 };
+use aarch64_cpu::{asm::barrier, registers::*};
 use core::intrinsics::unlikely;
-use cortex_a::{asm::barrier, registers::*};
 use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/time.rs b/17_kernel_symbols/kernel/src/_arch/aarch64/time.rs
index 1e2efbec0..94d023795 100644
--- a/17_kernel_symbols/kernel/src/_arch/aarch64/time.rs
+++ b/17_kernel_symbols/kernel/src/_arch/aarch64/time.rs
@@ -12,12 +12,12 @@
 //! crate::time::arch_time
 
 use crate::warn;
+use aarch64_cpu::{asm::barrier, registers::*};
 use core::{
     num::{NonZeroU128, NonZeroU32, NonZeroU64},
     ops::{Add, Div},
     time::Duration,
 };
-use cortex_a::{asm::barrier, registers::*};
 use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
diff --git a/18_backtrace/Cargo.lock b/18_backtrace/Cargo.lock
index 2b51ab722..701f10f18 100644
--- a/18_backtrace/Cargo.lock
+++ b/18_backtrace/Cargo.lock
@@ -3,10 +3,10 @@
 version = 3
 
 [[package]]
-name = "cortex-a"
-version = "8.0.0"
+name = "aarch64-cpu"
+version = "9.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
+checksum = "3aceb88e55ba626a5479279268d009a92d9d00eacce0de1b8c236c7ad31b7225"
 dependencies = [
  "tock-registers",
 ]
@@ -26,7 +26,7 @@ dependencies = [
 name = "mingo"
 version = "0.18.0"
 dependencies = [
- "cortex-a",
+ "aarch64-cpu",
  "debug-symbol-types",
  "qemu-exit",
  "test-macros",
diff --git a/18_backtrace/README.md b/18_backtrace/README.md
index 837d01617..542fdfbb2 100644
--- a/18_backtrace/README.md
+++ b/18_backtrace/README.md
@@ -415,7 +415,7 @@ diff -uNr 17_kernel_symbols/kernel/src/_arch/aarch64/backtrace.rs 18_backtrace/k
 +    backtrace::BacktraceItem,
 +    memory::{Address, Virtual},
 +};
-+use cortex_a::registers::*;
++use aarch64_cpu::registers::*;
 +use tock_registers::interfaces::Readable;
 +
 +//--------------------------------------------------------------------------------------------------
@@ -538,18 +538,18 @@ diff -uNr 17_kernel_symbols/kernel/src/_arch/aarch64/backtrace.rs 18_backtrace/k
 diff -uNr 17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.rs 18_backtrace/kernel/src/_arch/aarch64/cpu/boot.rs
 --- 17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.rs
 +++ 18_backtrace/kernel/src/_arch/aarch64/cpu/boot.rs
-@@ -12,7 +12,10 @@
- //! crate::cpu::boot::arch_boot
+@@ -13,7 +13,10 @@
 
  use crate::{memory, memory::Address};
+ use aarch64_cpu::{asm, registers::*};
 -use core::arch::global_asm;
 +use core::{
 +    arch::global_asm,
 +    sync::atomic::{compiler_fence, Ordering},
 +};
- use cortex_a::{asm, registers::*};
  use tock_registers::interfaces::Writeable;
 
+ // Assembly counterpart to this file.
 @@ -67,6 +70,18 @@
      SP_EL1.set(virt_boot_core_stack_end_exclusive_addr);
  }
diff --git a/18_backtrace/kernel/Cargo.toml b/18_backtrace/kernel/Cargo.toml
index 5a4435382..bba97b8dd 100644
--- a/18_backtrace/kernel/Cargo.toml
+++ b/18_backtrace/kernel/Cargo.toml
@@ -24,7 +24,7 @@ qemu-exit = { version = "3.x.x", optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "8.x.x" }
+aarch64-cpu = { version = "9.x.x" }
 
 ##--------------------------------------------------------------------------------------------------
 ## Testing
diff --git a/18_backtrace/kernel/src/_arch/aarch64/backtrace.rs b/18_backtrace/kernel/src/_arch/aarch64/backtrace.rs
index e8860984b..3511c9184 100644
--- a/18_backtrace/kernel/src/_arch/aarch64/backtrace.rs
+++ b/18_backtrace/kernel/src/_arch/aarch64/backtrace.rs
@@ -15,7 +15,7 @@ use crate::{
     backtrace::BacktraceItem,
     memory::{Address, Virtual},
 };
-use cortex_a::registers::*;
+use aarch64_cpu::registers::*;
 use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
diff --git a/18_backtrace/kernel/src/_arch/aarch64/cpu.rs b/18_backtrace/kernel/src/_arch/aarch64/cpu.rs
index 66da661c7..7eb7f010c 100644
--- a/18_backtrace/kernel/src/_arch/aarch64/cpu.rs
+++ b/18_backtrace/kernel/src/_arch/aarch64/cpu.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::cpu::arch_cpu
 
-use cortex_a::asm;
+use aarch64_cpu::asm;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.rs b/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.rs
index 15ab92b60..d9662d3ac 100644
--- a/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.rs
+++ b/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.rs
@@ -12,11 +12,11 @@
 //! crate::cpu::boot::arch_boot
 
 use crate::{memory, memory::Address};
+use aarch64_cpu::{asm, registers::*};
 use core::{
     arch::global_asm,
     sync::atomic::{compiler_fence, Ordering},
 };
-use cortex_a::{asm, registers::*};
 use tock_registers::interfaces::Writeable;
 
 // Assembly counterpart to this file.
diff --git a/18_backtrace/kernel/src/_arch/aarch64/cpu/smp.rs b/18_backtrace/kernel/src/_arch/aarch64/cpu/smp.rs
index 351fde62e..9d304d657 100644
--- a/18_backtrace/kernel/src/_arch/aarch64/cpu/smp.rs
+++ b/18_backtrace/kernel/src/_arch/aarch64/cpu/smp.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::cpu::smp::arch_smp
 
-use cortex_a::registers::*;
+use aarch64_cpu::registers::*;
 use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
diff --git a/18_backtrace/kernel/src/_arch/aarch64/exception.rs b/18_backtrace/kernel/src/_arch/aarch64/exception.rs
index e03e382f1..a8bc0d2f3 100644
--- a/18_backtrace/kernel/src/_arch/aarch64/exception.rs
+++ b/18_backtrace/kernel/src/_arch/aarch64/exception.rs
@@ -12,8 +12,8 @@
 //! crate::exception::arch_exception
 
 use crate::{exception, memory, symbols};
+use aarch64_cpu::{asm::barrier, registers::*};
 use core::{arch::global_asm, cell::UnsafeCell, fmt};
-use cortex_a::{asm::barrier, registers::*};
 use tock_registers::{
     interfaces::{Readable, Writeable},
     registers::InMemoryRegister,
diff --git a/18_backtrace/kernel/src/_arch/aarch64/exception/asynchronous.rs b/18_backtrace/kernel/src/_arch/aarch64/exception/asynchronous.rs
index cf6f97acc..f545a3e19 100644
--- a/18_backtrace/kernel/src/_arch/aarch64/exception/asynchronous.rs
+++ b/18_backtrace/kernel/src/_arch/aarch64/exception/asynchronous.rs
@@ -11,8 +11,8 @@
 //!
 //! crate::exception::asynchronous::arch_asynchronous
 
+use aarch64_cpu::registers::*;
 use core::arch::asm;
-use cortex_a::registers::*;
 use tock_registers::interfaces::{Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
diff --git a/18_backtrace/kernel/src/_arch/aarch64/memory/mmu.rs b/18_backtrace/kernel/src/_arch/aarch64/memory/mmu.rs
index 3d6c18b74..74a71d114 100644
--- a/18_backtrace/kernel/src/_arch/aarch64/memory/mmu.rs
+++ b/18_backtrace/kernel/src/_arch/aarch64/memory/mmu.rs
@@ -17,8 +17,8 @@ use crate::{
     bsp, memory,
     memory::{mmu::TranslationGranule, Address, Physical},
 };
+use aarch64_cpu::{asm::barrier, registers::*};
 use core::intrinsics::unlikely;
-use cortex_a::{asm::barrier, registers::*};
 use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
diff --git a/18_backtrace/kernel/src/_arch/aarch64/time.rs b/18_backtrace/kernel/src/_arch/aarch64/time.rs
index 1e2efbec0..94d023795 100644
--- a/18_backtrace/kernel/src/_arch/aarch64/time.rs
+++ b/18_backtrace/kernel/src/_arch/aarch64/time.rs
@@ -12,12 +12,12 @@
 //! crate::time::arch_time
 
 use crate::warn;
+use aarch64_cpu::{asm::barrier, registers::*};
 use core::{
     num::{NonZeroU128, NonZeroU32, NonZeroU64},
     ops::{Add, Div},
     time::Duration,
 };
-use cortex_a::{asm::barrier, registers::*};
 use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
diff --git a/19_kernel_heap/Cargo.lock b/19_kernel_heap/Cargo.lock
index eb80ffead..0f642903d 100644
--- a/19_kernel_heap/Cargo.lock
+++ b/19_kernel_heap/Cargo.lock
@@ -3,10 +3,10 @@
 version = 3
 
 [[package]]
-name = "cortex-a"
-version = "8.0.0"
+name = "aarch64-cpu"
+version = "9.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
+checksum = "3aceb88e55ba626a5479279268d009a92d9d00eacce0de1b8c236c7ad31b7225"
 dependencies = [
  "tock-registers",
 ]
@@ -32,7 +32,7 @@ checksum = "e322f259d225fbae43a1b053b2dc6a5968a6bdf8b205f5de684dab485b95030e"
 name = "mingo"
 version = "0.19.0"
 dependencies = [
- "cortex-a",
+ "aarch64-cpu",
  "debug-symbol-types",
  "linked_list_allocator",
  "qemu-exit",
diff --git a/19_kernel_heap/kernel/Cargo.lock b/19_kernel_heap/kernel/Cargo.lock
deleted file mode 100644
index 9149faf0d..000000000
--- a/19_kernel_heap/kernel/Cargo.lock
+++ /dev/null
@@ -1,96 +0,0 @@
-# This file is automatically @generated by Cargo.
-# It is not intended for manual editing.
-version = 3
-
-[[package]]
-name = "cortex-a"
-version = "7.2.0"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "27bd91f65ccd348bb2d043d98c5b34af141ecef7f102147f59bf5898f6e734ad"
-dependencies = [
- "tock-registers",
-]
-
-[[package]]
-name = "debug-symbol-types"
-version = "0.1.0"
-
-[[package]]
-name = "linked_list_allocator"
-version = "0.9.1"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "549ce1740e46b291953c4340adcd74c59bcf4308f4cac050fd33ba91b7168f4a"
-
-[[package]]
-name = "mingo"
-version = "0.19.0"
-dependencies = [
- "cortex-a",
- "debug-symbol-types",
- "linked_list_allocator",
- "qemu-exit",
- "test-macros",
- "test-types",
- "tock-registers",
-]
-
-[[package]]
-name = "proc-macro2"
-version = "1.0.38"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "9027b48e9d4c9175fa2218adf3557f91c1137021739951d4932f5f8268ac48aa"
-dependencies = [
- "unicode-xid",
-]
-
-[[package]]
-name = "qemu-exit"
-version = "3.0.1"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
-
-[[package]]
-name = "quote"
-version = "1.0.18"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "a1feb54ed693b93a84e14094943b84b7c4eae204c512b7ccb95ab0c66d278ad1"
-dependencies = [
- "proc-macro2",
-]
-
-[[package]]
-name = "syn"
-version = "1.0.94"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "a07e33e919ebcd69113d5be0e4d70c5707004ff45188910106854f38b960df4a"
-dependencies = [
- "proc-macro2",
- "quote",
- "unicode-xid",
-]
-
-[[package]]
-name = "test-macros"
-version = "0.1.0"
-dependencies = [
- "proc-macro2",
- "quote",
- "syn",
- "test-types",
-]
-
-[[package]]
-name = "test-types"
-version = "0.1.0"
-
-[[package]]
-name = "tock-registers"
-version = "0.7.0"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "4ee8fba06c1f4d0b396ef61a54530bb6b28f0dc61c38bc8bc5a5a48161e6282e"
-
-[[package]]
-name = "unicode-xid"
-version = "0.2.3"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "957e51f3646910546462e67d5f7599b9e4fb8acdd304b087a6494730f9eebf04"
diff --git a/19_kernel_heap/kernel/Cargo.toml b/19_kernel_heap/kernel/Cargo.toml
index bccd08823..03ebfc020 100644
--- a/19_kernel_heap/kernel/Cargo.toml
+++ b/19_kernel_heap/kernel/Cargo.toml
@@ -26,7 +26,7 @@ qemu-exit = { version = "3.x.x", optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "8.x.x" }
+aarch64-cpu = { version = "9.x.x" }
 
 ##--------------------------------------------------------------------------------------------------
 ## Testing
diff --git a/19_kernel_heap/kernel/src/_arch/aarch64/backtrace.rs b/19_kernel_heap/kernel/src/_arch/aarch64/backtrace.rs
index e8860984b..3511c9184 100644
--- a/19_kernel_heap/kernel/src/_arch/aarch64/backtrace.rs
+++ b/19_kernel_heap/kernel/src/_arch/aarch64/backtrace.rs
@@ -15,7 +15,7 @@ use crate::{
     backtrace::BacktraceItem,
     memory::{Address, Virtual},
 };
-use cortex_a::registers::*;
+use aarch64_cpu::registers::*;
 use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
diff --git a/19_kernel_heap/kernel/src/_arch/aarch64/cpu.rs b/19_kernel_heap/kernel/src/_arch/aarch64/cpu.rs
index 66da661c7..7eb7f010c 100644
--- a/19_kernel_heap/kernel/src/_arch/aarch64/cpu.rs
+++ b/19_kernel_heap/kernel/src/_arch/aarch64/cpu.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::cpu::arch_cpu
 
-use cortex_a::asm;
+use aarch64_cpu::asm;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/19_kernel_heap/kernel/src/_arch/aarch64/cpu/boot.rs b/19_kernel_heap/kernel/src/_arch/aarch64/cpu/boot.rs
index 15ab92b60..d9662d3ac 100644
--- a/19_kernel_heap/kernel/src/_arch/aarch64/cpu/boot.rs
+++ b/19_kernel_heap/kernel/src/_arch/aarch64/cpu/boot.rs
@@ -12,11 +12,11 @@
 //! crate::cpu::boot::arch_boot
 
 use crate::{memory, memory::Address};
+use aarch64_cpu::{asm, registers::*};
 use core::{
     arch::global_asm,
     sync::atomic::{compiler_fence, Ordering},
 };
-use cortex_a::{asm, registers::*};
 use tock_registers::interfaces::Writeable;
 
 // Assembly counterpart to this file.
diff --git a/19_kernel_heap/kernel/src/_arch/aarch64/cpu/smp.rs b/19_kernel_heap/kernel/src/_arch/aarch64/cpu/smp.rs
index 351fde62e..9d304d657 100644
--- a/19_kernel_heap/kernel/src/_arch/aarch64/cpu/smp.rs
+++ b/19_kernel_heap/kernel/src/_arch/aarch64/cpu/smp.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::cpu::smp::arch_smp
 
-use cortex_a::registers::*;
+use aarch64_cpu::registers::*;
 use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
diff --git a/19_kernel_heap/kernel/src/_arch/aarch64/exception.rs b/19_kernel_heap/kernel/src/_arch/aarch64/exception.rs
index e03e382f1..a8bc0d2f3 100644
--- a/19_kernel_heap/kernel/src/_arch/aarch64/exception.rs
+++ b/19_kernel_heap/kernel/src/_arch/aarch64/exception.rs
@@ -12,8 +12,8 @@
 //! crate::exception::arch_exception
 
 use crate::{exception, memory, symbols};
+use aarch64_cpu::{asm::barrier, registers::*};
 use core::{arch::global_asm, cell::UnsafeCell, fmt};
-use cortex_a::{asm::barrier, registers::*};
 use tock_registers::{
     interfaces::{Readable, Writeable},
     registers::InMemoryRegister,
diff --git a/19_kernel_heap/kernel/src/_arch/aarch64/exception/asynchronous.rs b/19_kernel_heap/kernel/src/_arch/aarch64/exception/asynchronous.rs
index cf6f97acc..f545a3e19 100644
--- a/19_kernel_heap/kernel/src/_arch/aarch64/exception/asynchronous.rs
+++ b/19_kernel_heap/kernel/src/_arch/aarch64/exception/asynchronous.rs
@@ -11,8 +11,8 @@
 //!
 //! crate::exception::asynchronous::arch_asynchronous
 
+use aarch64_cpu::registers::*;
 use core::arch::asm;
-use cortex_a::registers::*;
 use tock_registers::interfaces::{Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
diff --git a/19_kernel_heap/kernel/src/_arch/aarch64/memory/mmu.rs b/19_kernel_heap/kernel/src/_arch/aarch64/memory/mmu.rs
index 3d6c18b74..74a71d114 100644
--- a/19_kernel_heap/kernel/src/_arch/aarch64/memory/mmu.rs
+++ b/19_kernel_heap/kernel/src/_arch/aarch64/memory/mmu.rs
@@ -17,8 +17,8 @@ use crate::{
     bsp, memory,
     memory::{mmu::TranslationGranule, Address, Physical},
 };
+use aarch64_cpu::{asm::barrier, registers::*};
 use core::intrinsics::unlikely;
-use cortex_a::{asm::barrier, registers::*};
 use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
diff --git a/19_kernel_heap/kernel/src/_arch/aarch64/time.rs b/19_kernel_heap/kernel/src/_arch/aarch64/time.rs
index 1e2efbec0..94d023795 100644
--- a/19_kernel_heap/kernel/src/_arch/aarch64/time.rs
+++ b/19_kernel_heap/kernel/src/_arch/aarch64/time.rs
@@ -12,12 +12,12 @@
 //! crate::time::arch_time
 
 use crate::warn;
+use aarch64_cpu::{asm::barrier, registers::*};
 use core::{
     num::{NonZeroU128, NonZeroU32, NonZeroU64},
     ops::{Add, Div},
     time::Duration,
 };
-use cortex_a::{asm::barrier, registers::*};
 use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
diff --git a/20_timer_callbacks/Cargo.lock b/20_timer_callbacks/Cargo.lock
index 8f9eae58d..754ed74db 100644
--- a/20_timer_callbacks/Cargo.lock
+++ b/20_timer_callbacks/Cargo.lock
@@ -3,10 +3,10 @@
 version = 3
 
 [[package]]
-name = "cortex-a"
-version = "8.0.0"
+name = "aarch64-cpu"
+version = "9.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
+checksum = "3aceb88e55ba626a5479279268d009a92d9d00eacce0de1b8c236c7ad31b7225"
 dependencies = [
  "tock-registers",
 ]
@@ -32,7 +32,7 @@ checksum = "e322f259d225fbae43a1b053b2dc6a5968a6bdf8b205f5de684dab485b95030e"
 name = "mingo"
 version = "0.20.0"
 dependencies = [
- "cortex-a",
+ "aarch64-cpu",
  "debug-symbol-types",
  "linked_list_allocator",
  "qemu-exit",
diff --git a/20_timer_callbacks/README.md b/20_timer_callbacks/README.md
index 7d944b991..da5a5510f 100644
--- a/20_timer_callbacks/README.md
+++ b/20_timer_callbacks/README.md
@@ -40,12 +40,12 @@ diff -uNr 19_kernel_heap/kernel/src/_arch/aarch64/time.rs 20_timer_callbacks/ker
 +    bsp::{self, exception},
 +    warn,
 +};
+ use aarch64_cpu::{asm::barrier, registers::*};
  use core::{
      num::{NonZeroU128, NonZeroU32, NonZeroU64},
      ops::{Add, Div},
      time::Duration,
  };
- use cortex_a::{asm::barrier, registers::*};
 -use tock_registers::interfaces::Readable;
 +use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 
diff --git a/20_timer_callbacks/kernel/Cargo.lock b/20_timer_callbacks/kernel/Cargo.lock
deleted file mode 100644
index 740209d0e..000000000
--- a/20_timer_callbacks/kernel/Cargo.lock
+++ /dev/null
@@ -1,96 +0,0 @@
-# This file is automatically @generated by Cargo.
-# It is not intended for manual editing.
-version = 3
-
-[[package]]
-name = "cortex-a"
-version = "8.0.0"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
-dependencies = [
- "tock-registers",
-]
-
-[[package]]
-name = "debug-symbol-types"
-version = "0.1.0"
-
-[[package]]
-name = "linked_list_allocator"
-version = "0.10.4"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "e322f259d225fbae43a1b053b2dc6a5968a6bdf8b205f5de684dab485b95030e"
-
-[[package]]
-name = "mingo"
-version = "0.20.0"
-dependencies = [
- "cortex-a",
- "debug-symbol-types",
- "linked_list_allocator",
- "qemu-exit",
- "test-macros",
- "test-types",
- "tock-registers",
-]
-
-[[package]]
-name = "proc-macro2"
-version = "1.0.38"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "9027b48e9d4c9175fa2218adf3557f91c1137021739951d4932f5f8268ac48aa"
-dependencies = [
- "unicode-xid",
-]
-
-[[package]]
-name = "qemu-exit"
-version = "3.0.1"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "9ff023245bfcc73fb890e1f8d5383825b3131cc920020a5c487d6f113dfc428a"
-
-[[package]]
-name = "quote"
-version = "1.0.18"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "a1feb54ed693b93a84e14094943b84b7c4eae204c512b7ccb95ab0c66d278ad1"
-dependencies = [
- "proc-macro2",
-]
-
-[[package]]
-name = "syn"
-version = "1.0.94"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "a07e33e919ebcd69113d5be0e4d70c5707004ff45188910106854f38b960df4a"
-dependencies = [
- "proc-macro2",
- "quote",
- "unicode-xid",
-]
-
-[[package]]
-name = "test-macros"
-version = "0.1.0"
-dependencies = [
- "proc-macro2",
- "quote",
- "syn",
- "test-types",
-]
-
-[[package]]
-name = "test-types"
-version = "0.1.0"
-
-[[package]]
-name = "tock-registers"
-version = "0.8.1"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "696941a0aee7e276a165a978b37918fd5d22c55c3d6bda197813070ca9c0f21c"
-
-[[package]]
-name = "unicode-xid"
-version = "0.2.3"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "957e51f3646910546462e67d5f7599b9e4fb8acdd304b087a6494730f9eebf04"
diff --git a/20_timer_callbacks/kernel/Cargo.toml b/20_timer_callbacks/kernel/Cargo.toml
index e127a857f..87c9cbb6b 100644
--- a/20_timer_callbacks/kernel/Cargo.toml
+++ b/20_timer_callbacks/kernel/Cargo.toml
@@ -26,7 +26,7 @@ qemu-exit = { version = "3.x.x", optional = true }
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "8.x.x" }
+aarch64-cpu = { version = "9.x.x" }
 
 ##--------------------------------------------------------------------------------------------------
 ## Testing
diff --git a/20_timer_callbacks/kernel/src/_arch/aarch64/backtrace.rs b/20_timer_callbacks/kernel/src/_arch/aarch64/backtrace.rs
index e8860984b..3511c9184 100644
--- a/20_timer_callbacks/kernel/src/_arch/aarch64/backtrace.rs
+++ b/20_timer_callbacks/kernel/src/_arch/aarch64/backtrace.rs
@@ -15,7 +15,7 @@ use crate::{
     backtrace::BacktraceItem,
     memory::{Address, Virtual},
 };
-use cortex_a::registers::*;
+use aarch64_cpu::registers::*;
 use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
diff --git a/20_timer_callbacks/kernel/src/_arch/aarch64/cpu.rs b/20_timer_callbacks/kernel/src/_arch/aarch64/cpu.rs
index 66da661c7..7eb7f010c 100644
--- a/20_timer_callbacks/kernel/src/_arch/aarch64/cpu.rs
+++ b/20_timer_callbacks/kernel/src/_arch/aarch64/cpu.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::cpu::arch_cpu
 
-use cortex_a::asm;
+use aarch64_cpu::asm;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/20_timer_callbacks/kernel/src/_arch/aarch64/cpu/boot.rs b/20_timer_callbacks/kernel/src/_arch/aarch64/cpu/boot.rs
index 15ab92b60..d9662d3ac 100644
--- a/20_timer_callbacks/kernel/src/_arch/aarch64/cpu/boot.rs
+++ b/20_timer_callbacks/kernel/src/_arch/aarch64/cpu/boot.rs
@@ -12,11 +12,11 @@
 //! crate::cpu::boot::arch_boot
 
 use crate::{memory, memory::Address};
+use aarch64_cpu::{asm, registers::*};
 use core::{
     arch::global_asm,
     sync::atomic::{compiler_fence, Ordering},
 };
-use cortex_a::{asm, registers::*};
 use tock_registers::interfaces::Writeable;
 
 // Assembly counterpart to this file.
diff --git a/20_timer_callbacks/kernel/src/_arch/aarch64/cpu/smp.rs b/20_timer_callbacks/kernel/src/_arch/aarch64/cpu/smp.rs
index 351fde62e..9d304d657 100644
--- a/20_timer_callbacks/kernel/src/_arch/aarch64/cpu/smp.rs
+++ b/20_timer_callbacks/kernel/src/_arch/aarch64/cpu/smp.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::cpu::smp::arch_smp
 
-use cortex_a::registers::*;
+use aarch64_cpu::registers::*;
 use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------
diff --git a/20_timer_callbacks/kernel/src/_arch/aarch64/exception.rs b/20_timer_callbacks/kernel/src/_arch/aarch64/exception.rs
index e03e382f1..a8bc0d2f3 100644
--- a/20_timer_callbacks/kernel/src/_arch/aarch64/exception.rs
+++ b/20_timer_callbacks/kernel/src/_arch/aarch64/exception.rs
@@ -12,8 +12,8 @@
 //! crate::exception::arch_exception
 
 use crate::{exception, memory, symbols};
+use aarch64_cpu::{asm::barrier, registers::*};
 use core::{arch::global_asm, cell::UnsafeCell, fmt};
-use cortex_a::{asm::barrier, registers::*};
 use tock_registers::{
     interfaces::{Readable, Writeable},
     registers::InMemoryRegister,
diff --git a/20_timer_callbacks/kernel/src/_arch/aarch64/exception/asynchronous.rs b/20_timer_callbacks/kernel/src/_arch/aarch64/exception/asynchronous.rs
index cf6f97acc..f545a3e19 100644
--- a/20_timer_callbacks/kernel/src/_arch/aarch64/exception/asynchronous.rs
+++ b/20_timer_callbacks/kernel/src/_arch/aarch64/exception/asynchronous.rs
@@ -11,8 +11,8 @@
 //!
 //! crate::exception::asynchronous::arch_asynchronous
 
+use aarch64_cpu::registers::*;
 use core::arch::asm;
-use cortex_a::registers::*;
 use tock_registers::interfaces::{Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
diff --git a/20_timer_callbacks/kernel/src/_arch/aarch64/memory/mmu.rs b/20_timer_callbacks/kernel/src/_arch/aarch64/memory/mmu.rs
index 3d6c18b74..74a71d114 100644
--- a/20_timer_callbacks/kernel/src/_arch/aarch64/memory/mmu.rs
+++ b/20_timer_callbacks/kernel/src/_arch/aarch64/memory/mmu.rs
@@ -17,8 +17,8 @@ use crate::{
     bsp, memory,
     memory::{mmu::TranslationGranule, Address, Physical},
 };
+use aarch64_cpu::{asm::barrier, registers::*};
 use core::intrinsics::unlikely;
-use cortex_a::{asm::barrier, registers::*};
 use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
diff --git a/20_timer_callbacks/kernel/src/_arch/aarch64/time.rs b/20_timer_callbacks/kernel/src/_arch/aarch64/time.rs
index 5479deb48..2807bc322 100644
--- a/20_timer_callbacks/kernel/src/_arch/aarch64/time.rs
+++ b/20_timer_callbacks/kernel/src/_arch/aarch64/time.rs
@@ -15,12 +15,12 @@ use crate::{
     bsp::{self, exception},
     warn,
 };
+use aarch64_cpu::{asm::barrier, registers::*};
 use core::{
     num::{NonZeroU128, NonZeroU32, NonZeroU64},
     ops::{Add, Div},
     time::Duration,
 };
-use cortex_a::{asm::barrier, registers::*};
 use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 
 //--------------------------------------------------------------------------------------------------
diff --git a/X1_JTAG_boot/Cargo.lock b/X1_JTAG_boot/Cargo.lock
index bcfb442af..9020b4f99 100644
--- a/X1_JTAG_boot/Cargo.lock
+++ b/X1_JTAG_boot/Cargo.lock
@@ -3,10 +3,10 @@
 version = 3
 
 [[package]]
-name = "cortex-a"
-version = "8.0.0"
+name = "aarch64-cpu"
+version = "9.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
+checksum = "3aceb88e55ba626a5479279268d009a92d9d00eacce0de1b8c236c7ad31b7225"
 dependencies = [
  "tock-registers",
 ]
@@ -15,7 +15,7 @@ dependencies = [
 name = "mingo"
 version = "0.8.0"
 dependencies = [
- "cortex-a",
+ "aarch64-cpu",
  "tock-registers",
 ]
 
diff --git a/X1_JTAG_boot/Cargo.toml b/X1_JTAG_boot/Cargo.toml
index 55963c384..e310c371e 100644
--- a/X1_JTAG_boot/Cargo.toml
+++ b/X1_JTAG_boot/Cargo.toml
@@ -27,4 +27,4 @@ tock-registers = { version = "0.8.x", default-features = false, features = ["reg
 
 # Platform specific dependencies
 [target.'cfg(target_arch = "aarch64")'.dependencies]
-cortex-a = { version = "8.x.x" }
+aarch64-cpu = { version = "9.x.x" }
diff --git a/X1_JTAG_boot/jtag_boot_rpi3.img b/X1_JTAG_boot/jtag_boot_rpi3.img
index 8c67b2dd87ca95ac69ab1567d94595d9cb5bc53f..f472e76666034632af74963b83585ad4e6ebcece 100755
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diff --git a/X1_JTAG_boot/src/_arch/aarch64/cpu.rs b/X1_JTAG_boot/src/_arch/aarch64/cpu.rs
index 4414ac6ad..bbe7687ae 100644
--- a/X1_JTAG_boot/src/_arch/aarch64/cpu.rs
+++ b/X1_JTAG_boot/src/_arch/aarch64/cpu.rs
@@ -11,7 +11,7 @@
 //!
 //! crate::cpu::arch_cpu
 
-use cortex_a::asm;
+use aarch64_cpu::asm;
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/X1_JTAG_boot/src/_arch/aarch64/time.rs b/X1_JTAG_boot/src/_arch/aarch64/time.rs
index 92e778e72..400b3dcca 100644
--- a/X1_JTAG_boot/src/_arch/aarch64/time.rs
+++ b/X1_JTAG_boot/src/_arch/aarch64/time.rs
@@ -13,12 +13,12 @@
 
 #[cfg(feature = "bsp_rpi3")]
 use crate::warn;
+use aarch64_cpu::{asm::barrier, registers::*};
 use core::{
     num::{NonZeroU128, NonZeroU32, NonZeroU64},
     ops::{Add, Div},
     time::Duration,
 };
-use cortex_a::{asm::barrier, registers::*};
 use tock_registers::interfaces::Readable;
 
 //--------------------------------------------------------------------------------------------------

From c7f00c9395ceccc34c94bc91ffd82d7ebe0cbd8d Mon Sep 17 00:00:00 2001
From: Andre Richter <andre.o.richter@gmail.com>
Date: Sun, 6 Nov 2022 22:21:05 +0100
Subject: [PATCH 199/214] Fix newest rubocop complaint

---
 Gemfile                         | 2 +-
 common/tests/console_io_test.rb | 8 ++++----
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/Gemfile b/Gemfile
index 482564845..7460e0481 100644
--- a/Gemfile
+++ b/Gemfile
@@ -11,5 +11,5 @@ group :uart do
 end
 
 group :development do
-    gem 'rubocop', '>= 1.37.1', require: false
+    gem 'rubocop', '>= 1.38.0', require: false
 end
diff --git a/common/tests/console_io_test.rb b/common/tests/console_io_test.rb
index cfb45a2b5..002fb895d 100644
--- a/common/tests/console_io_test.rb
+++ b/common/tests/console_io_test.rb
@@ -27,9 +27,9 @@ def expect_or_raise(io, string, timeout = TIMEOUT_SECONDS)
 
 # Monkey-patch IO so that we get access to the buffer of a previously unsuccessful expect().
 class IO
-    # rubocop:disable Naming:MethodName
-    attr_reader :unusedBuf
-    # rubocop:enable Naming:MethodName
+    def unused_buf
+        @unusedBuf
+    end
 end
 
 # A wrapper class that records characters that have been received from a PTY.
@@ -43,7 +43,7 @@ def initialize(pty, linebreak = "\n")
     def expect(pattern, timeout)
         result = @pty.expect(pattern, timeout)
         @log << if result.nil?
-                    @pty.unusedBuf
+                    @pty.unused_buf
                 else
                     result
                 end

From a952d6d9ee62622af5cdf72fa0450dcbff51414d Mon Sep 17 00:00:00 2001
From: Andre Richter <andre-richter@users.noreply.github.com>
Date: Sat, 19 Nov 2022 23:47:11 +0100
Subject: [PATCH 200/214] Update README.md

---
 09_privilege_level/README.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/09_privilege_level/README.md b/09_privilege_level/README.md
index e0f73b630..bb7047003 100644
--- a/09_privilege_level/README.md
+++ b/09_privilege_level/README.md
@@ -34,7 +34,7 @@ architectures, please have a look at the following links:
 At this point, I strongly recommend that you glimpse over `Chapter 3` of the [Programmer’s Guide for
 ARMv8-A] before you continue. It gives a concise overview about the topic.
 
-[Programmer’s Guide forARMv8-A]: http://infocenter.arm.com/help/topic/com.arm.doc.den0024a/DEN0024A_v8_architecture_PG.pdf
+[Programmer’s Guide for ARMv8-A]: http://infocenter.arm.com/help/topic/com.arm.doc.den0024a/DEN0024A_v8_architecture_PG.pdf
 
 ## Scope of this tutorial
 

From ac3ea0e616ccf1da6ac83206490e50034ee35072 Mon Sep 17 00:00:00 2001
From: fei long <feilongphone@gmail.com>
Date: Sat, 31 Dec 2022 04:30:34 +0800
Subject: [PATCH 201/214] Tutorial 02: update chinese translate. (#175)

---
 02_runtime_init/README.CN.md | 27 +++++++++++++++++----------
 1 file changed, 17 insertions(+), 10 deletions(-)

diff --git a/02_runtime_init/README.CN.md b/02_runtime_init/README.CN.md
index f8d64f6f3..0272e057c 100644
--- a/02_runtime_init/README.CN.md
+++ b/02_runtime_init/README.CN.md
@@ -2,21 +2,28 @@
 
 ## tl;dr
 
-我们拓展了`boot.S`，在第一次启动的时候调用Rust代码。在Rust的代码中先清零了[bss] section，然后通过调用`panic()`挂起CPU。再次运行`make qemu`看看新增加的代码是怎么运行的。
+- 我们拓展了`boot.S`，在第一次启动的时候调用Rust代码。
+  在跳转到rust代码前，对运行时进行了一些初始化工作。
+- Rust通过调用`panic()`挂起CPU。
+- 再次运行`make qemu`看看新增加的代码是怎么运行的。
 
 ## 值得注意的变化
 
-- 链接脚本（linker script）中有了更多的section。
-     - `.rodata`, `.data`
-     - `.bss`
-- `_start()`:
-     - 当核心不是`core0`第0号核心的时候，挂起该CPU核心。
-     - `core0`会调用Rust的函数`runtime_init()`。
-- `runtime_init.rs`内的`runtime_init()`
-     - 清零了`.bss` section.
-     - 它调用了`kernel_init()`, 这个函数又调用了`panic!()`, panic函数最终把`core0`和其他核心一样挂起了。
+- 链接脚本（linker script）中的变化:
+     - 新程序段（sections）: `.rodata`, `.got`, `.data`, `.bss`.
+     - 使用一个独立的位置（`.text._start_arguments`）来保存`_start()`引导函数所使用的参数。
+- `_start()` in `_arch/__arch_name__/cpu/boot.s`:
+     1. 当核心不是`core0`第0号核心的时候，挂起该CPU核心。
+     1. 通过清零`.bss`程序段来初始化`DRAM`.
+     1. 初始化堆栈指针（`stack pointer`）.
+     1. 跳转到`arch/__arch_name__/cpu/boot.rs`文件中定义的`_start_rust()`函数
+- `_start_rust()`:
+     1. 它调用了`kernel_init()`, 这个函数又调用了`panic!()`, panic函数最终把`core0`和其他核心一样挂起了。
+- 目前依赖 [aarch64-cpu] 程序库, 这个库零成本的包装了处理 CPU 资源时的“不安全”部分。
+    - 详细请参考 `_arch/__arch_name__/cpu.rs`.
 
 [bss]: https://en.wikipedia.org/wiki/.bss
+[aarch64-cpu]: https://github.com/rust-embedded/aarch64-cpu
 
 ## 相比之前的变化（diff）
 请检查[英文版本](README.md#diff-to-previous)，这是最新的。

From 49a25275e66ab0dcacfcbbbb666311df7a9650c9 Mon Sep 17 00:00:00 2001
From: James Zow <jameszow@163.com>
Date: Thu, 9 Mar 2023 19:19:03 +0800
Subject: [PATCH 202/214] Translation Chapter 4 (#171)

* Translation Chapter 4

* Update README.CN.md
---
 04_safe_globals/README.CN.md | 50 ++++++++++++++++++++++++++++++++++++
 1 file changed, 50 insertions(+)
 create mode 100644 04_safe_globals/README.CN.md

diff --git a/04_safe_globals/README.CN.md b/04_safe_globals/README.CN.md
new file mode 100644
index 000000000..eb35c006d
--- /dev/null
+++ b/04_safe_globals/README.CN.md
@@ -0,0 +1,50 @@
+# 教程 04 - 全局安全
+
+## tl;dr
+
+- 引入了假的锁。
+- 这是第一次展示原始操作系统同步，并支持安全访问全局数据结构。
+
+## Rust中的全局可变
+
+当我们引入全局可用的`print!`宏在 [教程03]，我门有一点作弊。 调用
+`core::fmt`的`write_fmt()`函数，接受`&mut self`的方法之所以有效，
+是因为在每次调用时都会创建一个新的`QEMUOutput`实例。
+
+如果我们想保留一些状态，例如关于写入字符数的统计数据，
+我们需要创建`QEMUOutput`的一个全局实例 (在Rust中，使用`static`关键字).
+
+然而`static QEMU_OUTPUT`不允许调用具有`&mut self`的函数。
+为此，我们需要`static mut`，但是调用改变`static mut`状态的函数是不安全的。
+这个是Rust编译器对此的推理，它无法再阻止核心/线程同时改变数据（它是全局的，所以每个人都可以从任何地方引用它，检查程序借用在这里帮不上忙）。
+
+
+这个问题的解决方案是将全局封装到原始同步中。在我们的例子中，是一个*MUTual EXclusion*原语的变体。
+`Mutex`是`synchronization.rs`中引入的一个特性，并由同一文件中的`NullLock`实现。
+为了使代码更易于教学，它省略了用于防止并发访问的实际体系结构特定逻辑，因为只要内核仅在单个内核上执行并禁用中断，我们就不需要它。
+
+`NullLock`侧重于展示Rust内部可变性的核心概念。请务必阅读它。
+我们还建议您阅读这篇关于[Rust的引用类型的精确心智模型]文章
+
+如果要将`NullLock`与一些真实的互斥实现进行比较，可以查看
+[spin crate]或者[parking lot crate]。
+
+[教程03]: ../03_hacky_hello_world
+[内部可变性]: https://doc.rust-lang.org/std/cell/index.html
+[Rust的引用类型的精确心智模型]: https://docs.rs/dtolnay/0.0.6/dtolnay/macro._02__reference_types.html
+[spin crate]: https://github.com/mvdnes/spin-rs
+[parking lot crate]: https://github.com/Amanieu/parking_lot
+
+## 测试
+
+```console
+$ make qemu
+[...]
+
+[0] Hello from Rust!
+[1] Chars written: 22
+[2] Stopping here.
+```
+
+## 相比之前的变化（diff）
+请检查[英文版本](README.md#diff-to-previous)，这是最新的。

From 52b7ac9b2f1a980ed408e06f57a44f1562433986 Mon Sep 17 00:00:00 2001
From: James Zow <jameszow@163.com>
Date: Fri, 15 Sep 2023 20:22:15 +0800
Subject: [PATCH 203/214] fix ci/cd error (#195)

* fix ci/cd error

* update copyright year

* Modify remaining years

* solve ci report settings.json code style

* update .prettierrc.json

* prettierrc fix code style

* fix rb file i.to_s and code style

* fix error Line is too long. [101/100]

* Modify the Ruby file format and restore other file formats

* update makefile and readme file space
---
 .githooks/pre-commit                          |  6 +-
 .github/workflows/build_rpi3.yml              | 68 ++++++++--------
 .github/workflows/build_rpi4.yml              | 68 ++++++++--------
 .github/workflows/sanity.yml                  | 80 +++++++++----------
 .github/workflows/test_integration.yml        | 68 ++++++++--------
 .github/workflows/test_unit.yml               | 70 ++++++++--------
 .github/workflows/test_xtra.yml               | 68 ++++++++--------
 .prettierrc.json                              | 36 ++++++++-
 .rubocop.yml                                  | 16 ++--
 .vscode/settings.json                         | 16 ++--
 01_wait_forever/.vscode/settings.json         | 16 ++--
 01_wait_forever/Cargo.toml                    |  2 +-
 01_wait_forever/Makefile                      |  2 +-
 01_wait_forever/src/_arch/aarch64/cpu/boot.rs |  2 +-
 01_wait_forever/src/_arch/aarch64/cpu/boot.s  |  2 +-
 01_wait_forever/src/bsp.rs                    |  2 +-
 01_wait_forever/src/bsp/raspberrypi.rs        |  2 +-
 01_wait_forever/src/cpu.rs                    |  2 +-
 01_wait_forever/src/cpu/boot.rs               |  2 +-
 01_wait_forever/src/main.rs                   |  2 +-
 01_wait_forever/src/panic_wait.rs             |  2 +-
 02_runtime_init/.vscode/settings.json         | 16 ++--
 02_runtime_init/Makefile                      |  2 +-
 02_runtime_init/README.md                     |  9 +--
 02_runtime_init/src/_arch/aarch64/cpu.rs      |  2 +-
 02_runtime_init/src/_arch/aarch64/cpu/boot.rs |  2 +-
 02_runtime_init/src/bsp.rs                    |  2 +-
 02_runtime_init/src/bsp/raspberrypi.rs        |  2 +-
 02_runtime_init/src/bsp/raspberrypi/cpu.rs    |  2 +-
 02_runtime_init/src/cpu.rs                    |  2 +-
 02_runtime_init/src/cpu/boot.rs               |  2 +-
 02_runtime_init/src/main.rs                   |  2 +-
 02_runtime_init/src/panic_wait.rs             |  2 +-
 03_hacky_hello_world/.vscode/settings.json    | 16 ++--
 03_hacky_hello_world/Makefile                 |  2 +-
 03_hacky_hello_world/README.md                |  6 +-
 03_hacky_hello_world/src/_arch/aarch64/cpu.rs |  2 +-
 .../src/_arch/aarch64/cpu/boot.rs             |  2 +-
 03_hacky_hello_world/src/bsp.rs               |  2 +-
 03_hacky_hello_world/src/bsp/raspberrypi.rs   |  2 +-
 .../src/bsp/raspberrypi/console.rs            |  2 +-
 .../src/bsp/raspberrypi/cpu.rs                |  2 +-
 03_hacky_hello_world/src/console.rs           |  2 +-
 03_hacky_hello_world/src/cpu.rs               |  2 +-
 03_hacky_hello_world/src/cpu/boot.rs          |  2 +-
 03_hacky_hello_world/src/main.rs              |  2 +-
 03_hacky_hello_world/src/panic_wait.rs        |  2 +-
 03_hacky_hello_world/src/print.rs             |  2 +-
 04_safe_globals/.vscode/settings.json         | 16 ++--
 04_safe_globals/Makefile                      |  2 +-
 04_safe_globals/README.md                     |  2 +-
 04_safe_globals/src/_arch/aarch64/cpu.rs      |  2 +-
 04_safe_globals/src/_arch/aarch64/cpu/boot.rs |  2 +-
 04_safe_globals/src/bsp.rs                    |  2 +-
 04_safe_globals/src/bsp/raspberrypi.rs        |  2 +-
 .../src/bsp/raspberrypi/console.rs            |  2 +-
 04_safe_globals/src/bsp/raspberrypi/cpu.rs    |  2 +-
 04_safe_globals/src/console.rs                |  2 +-
 04_safe_globals/src/cpu.rs                    |  2 +-
 04_safe_globals/src/cpu/boot.rs               |  2 +-
 04_safe_globals/src/main.rs                   |  2 +-
 04_safe_globals/src/panic_wait.rs             |  2 +-
 04_safe_globals/src/print.rs                  |  2 +-
 04_safe_globals/src/synchronization.rs        |  2 +-
 05_drivers_gpio_uart/.vscode/settings.json    | 16 ++--
 05_drivers_gpio_uart/Makefile                 |  4 +-
 05_drivers_gpio_uart/README.md                | 18 ++---
 05_drivers_gpio_uart/src/_arch/aarch64/cpu.rs |  2 +-
 .../src/_arch/aarch64/cpu/boot.rs             |  2 +-
 05_drivers_gpio_uart/src/bsp.rs               |  2 +-
 05_drivers_gpio_uart/src/bsp/device_driver.rs |  2 +-
 .../src/bsp/device_driver/bcm.rs              |  2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  2 +-
 .../src/bsp/device_driver/common.rs           |  2 +-
 05_drivers_gpio_uart/src/bsp/raspberrypi.rs   |  2 +-
 .../src/bsp/raspberrypi/console.rs            |  2 +-
 .../src/bsp/raspberrypi/cpu.rs                |  2 +-
 .../src/bsp/raspberrypi/driver.rs             |  2 +-
 .../src/bsp/raspberrypi/memory.rs             |  2 +-
 05_drivers_gpio_uart/src/console.rs           |  2 +-
 .../src/console/null_console.rs               |  2 +-
 05_drivers_gpio_uart/src/cpu.rs               |  2 +-
 05_drivers_gpio_uart/src/cpu/boot.rs          |  2 +-
 05_drivers_gpio_uart/src/driver.rs            |  2 +-
 05_drivers_gpio_uart/src/main.rs              |  2 +-
 05_drivers_gpio_uart/src/panic_wait.rs        |  2 +-
 05_drivers_gpio_uart/src/print.rs             |  2 +-
 05_drivers_gpio_uart/src/synchronization.rs   |  2 +-
 06_uart_chainloader/.vscode/settings.json     | 16 ++--
 06_uart_chainloader/Makefile                  |  2 +-
 06_uart_chainloader/README.md                 |  7 +-
 06_uart_chainloader/src/_arch/aarch64/cpu.rs  |  2 +-
 .../src/_arch/aarch64/cpu/boot.rs             |  2 +-
 06_uart_chainloader/src/bsp.rs                |  2 +-
 06_uart_chainloader/src/bsp/device_driver.rs  |  2 +-
 .../src/bsp/device_driver/bcm.rs              |  2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  2 +-
 .../src/bsp/device_driver/common.rs           |  2 +-
 06_uart_chainloader/src/bsp/raspberrypi.rs    |  2 +-
 .../src/bsp/raspberrypi/cpu.rs                |  2 +-
 .../src/bsp/raspberrypi/driver.rs             |  2 +-
 .../src/bsp/raspberrypi/memory.rs             |  2 +-
 06_uart_chainloader/src/console.rs            |  2 +-
 .../src/console/null_console.rs               |  2 +-
 06_uart_chainloader/src/cpu.rs                |  2 +-
 06_uart_chainloader/src/cpu/boot.rs           |  2 +-
 06_uart_chainloader/src/driver.rs             |  2 +-
 06_uart_chainloader/src/main.rs               |  2 +-
 06_uart_chainloader/src/panic_wait.rs         |  2 +-
 06_uart_chainloader/src/print.rs              |  2 +-
 06_uart_chainloader/src/synchronization.rs    |  2 +-
 06_uart_chainloader/tests/chainboot_test.rb   |  6 +-
 07_timestamps/.vscode/settings.json           | 16 ++--
 07_timestamps/Makefile                        |  2 +-
 07_timestamps/README.md                       |  8 +-
 07_timestamps/src/_arch/aarch64/cpu.rs        |  2 +-
 07_timestamps/src/_arch/aarch64/cpu/boot.rs   |  2 +-
 07_timestamps/src/_arch/aarch64/time.rs       |  2 +-
 07_timestamps/src/bsp.rs                      |  2 +-
 07_timestamps/src/bsp/device_driver.rs        |  2 +-
 07_timestamps/src/bsp/device_driver/bcm.rs    |  2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  2 +-
 07_timestamps/src/bsp/device_driver/common.rs |  2 +-
 07_timestamps/src/bsp/raspberrypi.rs          |  2 +-
 07_timestamps/src/bsp/raspberrypi/cpu.rs      |  2 +-
 07_timestamps/src/bsp/raspberrypi/driver.rs   |  2 +-
 07_timestamps/src/bsp/raspberrypi/memory.rs   |  2 +-
 07_timestamps/src/console.rs                  |  2 +-
 07_timestamps/src/console/null_console.rs     |  2 +-
 07_timestamps/src/cpu.rs                      |  2 +-
 07_timestamps/src/cpu/boot.rs                 |  2 +-
 07_timestamps/src/driver.rs                   |  2 +-
 07_timestamps/src/main.rs                     |  2 +-
 07_timestamps/src/panic_wait.rs               |  2 +-
 07_timestamps/src/print.rs                    |  2 +-
 07_timestamps/src/synchronization.rs          |  2 +-
 07_timestamps/src/time.rs                     |  2 +-
 08_hw_debug_JTAG/.vscode/settings.json        | 16 ++--
 08_hw_debug_JTAG/Makefile                     |  2 +-
 08_hw_debug_JTAG/src/_arch/aarch64/cpu.rs     |  2 +-
 .../src/_arch/aarch64/cpu/boot.rs             |  2 +-
 08_hw_debug_JTAG/src/_arch/aarch64/time.rs    |  2 +-
 08_hw_debug_JTAG/src/bsp.rs                   |  2 +-
 08_hw_debug_JTAG/src/bsp/device_driver.rs     |  2 +-
 08_hw_debug_JTAG/src/bsp/device_driver/bcm.rs |  2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  2 +-
 .../src/bsp/device_driver/common.rs           |  2 +-
 08_hw_debug_JTAG/src/bsp/raspberrypi.rs       |  2 +-
 08_hw_debug_JTAG/src/bsp/raspberrypi/cpu.rs   |  2 +-
 .../src/bsp/raspberrypi/driver.rs             |  2 +-
 .../src/bsp/raspberrypi/memory.rs             |  2 +-
 08_hw_debug_JTAG/src/console.rs               |  2 +-
 08_hw_debug_JTAG/src/console/null_console.rs  |  2 +-
 08_hw_debug_JTAG/src/cpu.rs                   |  2 +-
 08_hw_debug_JTAG/src/cpu/boot.rs              |  2 +-
 08_hw_debug_JTAG/src/driver.rs                |  2 +-
 08_hw_debug_JTAG/src/main.rs                  |  2 +-
 08_hw_debug_JTAG/src/panic_wait.rs            |  2 +-
 08_hw_debug_JTAG/src/print.rs                 |  2 +-
 08_hw_debug_JTAG/src/synchronization.rs       |  2 +-
 08_hw_debug_JTAG/src/time.rs                  |  2 +-
 09_privilege_level/.vscode/settings.json      | 16 ++--
 09_privilege_level/Makefile                   |  2 +-
 09_privilege_level/README.md                  |  8 +-
 09_privilege_level/src/_arch/aarch64/cpu.rs   |  2 +-
 .../src/_arch/aarch64/cpu/boot.rs             |  2 +-
 .../src/_arch/aarch64/exception.rs            |  2 +-
 .../_arch/aarch64/exception/asynchronous.rs   |  2 +-
 09_privilege_level/src/_arch/aarch64/time.rs  |  2 +-
 09_privilege_level/src/bsp.rs                 |  2 +-
 09_privilege_level/src/bsp/device_driver.rs   |  2 +-
 .../src/bsp/device_driver/bcm.rs              |  2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  2 +-
 .../src/bsp/device_driver/common.rs           |  2 +-
 09_privilege_level/src/bsp/raspberrypi.rs     |  2 +-
 09_privilege_level/src/bsp/raspberrypi/cpu.rs |  2 +-
 .../src/bsp/raspberrypi/driver.rs             |  2 +-
 .../src/bsp/raspberrypi/memory.rs             |  2 +-
 09_privilege_level/src/console.rs             |  2 +-
 .../src/console/null_console.rs               |  2 +-
 09_privilege_level/src/cpu.rs                 |  2 +-
 09_privilege_level/src/cpu/boot.rs            |  2 +-
 09_privilege_level/src/driver.rs              |  2 +-
 09_privilege_level/src/exception.rs           |  2 +-
 .../src/exception/asynchronous.rs             |  2 +-
 09_privilege_level/src/main.rs                |  2 +-
 09_privilege_level/src/panic_wait.rs          |  2 +-
 09_privilege_level/src/print.rs               |  2 +-
 09_privilege_level/src/synchronization.rs     |  2 +-
 09_privilege_level/src/time.rs                |  2 +-
 .../.vscode/settings.json                     | 16 ++--
 .../Makefile                                  |  2 +-
 .../README.md                                 | 18 ++---
 .../src/_arch/aarch64/cpu.rs                  |  2 +-
 .../src/_arch/aarch64/cpu/boot.rs             |  2 +-
 .../src/_arch/aarch64/exception.rs            |  2 +-
 .../_arch/aarch64/exception/asynchronous.rs   |  2 +-
 .../src/_arch/aarch64/memory/mmu.rs           |  2 +-
 .../aarch64/memory/mmu/translation_table.rs   |  2 +-
 .../src/_arch/aarch64/time.rs                 |  2 +-
 .../src/bsp.rs                                |  2 +-
 .../src/bsp/device_driver.rs                  |  2 +-
 .../src/bsp/device_driver/bcm.rs              |  2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  2 +-
 .../src/bsp/device_driver/common.rs           |  2 +-
 .../src/bsp/raspberrypi.rs                    |  2 +-
 .../src/bsp/raspberrypi/cpu.rs                |  2 +-
 .../src/bsp/raspberrypi/driver.rs             |  2 +-
 .../src/bsp/raspberrypi/kernel.ld             |  2 +-
 .../src/bsp/raspberrypi/memory.rs             |  2 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |  2 +-
 .../src/common.rs                             |  2 +-
 .../src/console.rs                            |  2 +-
 .../src/console/null_console.rs               |  2 +-
 .../src/cpu.rs                                |  2 +-
 .../src/cpu/boot.rs                           |  2 +-
 .../src/driver.rs                             |  2 +-
 .../src/exception.rs                          |  2 +-
 .../src/exception/asynchronous.rs             |  2 +-
 .../src/main.rs                               |  2 +-
 .../src/memory.rs                             |  2 +-
 .../src/memory/mmu.rs                         |  2 +-
 .../src/memory/mmu/translation_table.rs       |  2 +-
 .../src/panic_wait.rs                         |  2 +-
 .../src/print.rs                              |  2 +-
 .../src/synchronization.rs                    |  2 +-
 .../src/time.rs                               |  2 +-
 .../.vscode/settings.json                     | 16 ++--
 11_exceptions_part1_groundwork/Makefile       |  2 +-
 11_exceptions_part1_groundwork/README.md      |  2 +-
 .../src/_arch/aarch64/cpu.rs                  |  2 +-
 .../src/_arch/aarch64/cpu/boot.rs             |  2 +-
 .../src/_arch/aarch64/exception.rs            |  2 +-
 .../_arch/aarch64/exception/asynchronous.rs   |  2 +-
 .../src/_arch/aarch64/memory/mmu.rs           |  2 +-
 .../aarch64/memory/mmu/translation_table.rs   |  2 +-
 .../src/_arch/aarch64/time.rs                 |  2 +-
 11_exceptions_part1_groundwork/src/bsp.rs     |  2 +-
 .../src/bsp/device_driver.rs                  |  2 +-
 .../src/bsp/device_driver/bcm.rs              |  2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  2 +-
 .../src/bsp/device_driver/common.rs           |  2 +-
 .../src/bsp/raspberrypi.rs                    |  2 +-
 .../src/bsp/raspberrypi/cpu.rs                |  2 +-
 .../src/bsp/raspberrypi/driver.rs             |  2 +-
 .../src/bsp/raspberrypi/memory.rs             |  2 +-
 .../src/bsp/raspberrypi/memory/mmu.rs         |  2 +-
 11_exceptions_part1_groundwork/src/common.rs  |  2 +-
 11_exceptions_part1_groundwork/src/console.rs |  2 +-
 .../src/console/null_console.rs               |  2 +-
 11_exceptions_part1_groundwork/src/cpu.rs     |  2 +-
 .../src/cpu/boot.rs                           |  2 +-
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 .../src/memory/mmu/translation_table.rs       |  2 +-
 .../kernel/src/memory/mmu/types.rs            |  2 +-
 17_kernel_symbols/kernel/src/panic_wait.rs    |  2 +-
 17_kernel_symbols/kernel/src/print.rs         |  2 +-
 17_kernel_symbols/kernel/src/state.rs         |  2 +-
 17_kernel_symbols/kernel/src/symbols.rs       |  2 +-
 .../kernel/src/synchronization.rs             |  2 +-
 17_kernel_symbols/kernel/src/time.rs          |  2 +-
 .../kernel/tests/00_console_sanity.rb         |  6 +-
 .../kernel/tests/00_console_sanity.rs         |  2 +-
 .../kernel/tests/01_timer_sanity.rs           |  2 +-
 .../tests/02_exception_sync_page_fault.rs     |  2 +-
 .../tests/03_exception_restore_sanity.rb      |  6 +-
 .../tests/03_exception_restore_sanity.rs      |  2 +-
 .../kernel/tests/04_exception_irq_sanity.rs   |  2 +-
 .../kernel/tests/panic_exit_success/mod.rs    |  2 +-
 .../kernel/tests/panic_wait_forever/mod.rs    |  2 +-
 17_kernel_symbols/kernel_symbols.mk           |  2 +-
 17_kernel_symbols/kernel_symbols/src/main.rs  |  2 +-
 .../libraries/debug-symbol-types/src/lib.rs   |  2 +-
 .../libraries/test-macros/src/lib.rs          |  2 +-
 .../libraries/test-types/src/lib.rs           |  2 +-
 .../tools/kernel_symbols_tool/cmds.rb         |  2 +-
 .../tools/kernel_symbols_tool/kernel_elf.rb   |  2 +-
 .../tools/kernel_symbols_tool/main.rb         |  2 +-
 .../tools/translation_table_tool/arch.rb      |  2 +-
 .../tools/translation_table_tool/bsp.rb       |  2 +-
 .../tools/translation_table_tool/generic.rb   |  4 +-
 .../translation_table_tool/kernel_elf.rb      |  2 +-
 .../tools/translation_table_tool/main.rb      |  2 +-
 18_backtrace/.vscode/settings.json            | 16 ++--
 18_backtrace/Makefile                         |  2 +-
 18_backtrace/README.md                        | 16 ++--
 .../kernel/src/_arch/aarch64/backtrace.rs     |  2 +-
 18_backtrace/kernel/src/_arch/aarch64/cpu.rs  |  2 +-
 .../kernel/src/_arch/aarch64/cpu/boot.rs      |  2 +-
 .../kernel/src/_arch/aarch64/cpu/boot.s       |  2 +-
 .../kernel/src/_arch/aarch64/cpu/smp.rs       |  2 +-
 .../kernel/src/_arch/aarch64/exception.rs     |  2 +-
 .../_arch/aarch64/exception/asynchronous.rs   |  2 +-
 .../kernel/src/_arch/aarch64/memory/mmu.rs    |  2 +-
 .../aarch64/memory/mmu/translation_table.rs   |  2 +-
 18_backtrace/kernel/src/_arch/aarch64/time.rs |  2 +-
 18_backtrace/kernel/src/backtrace.rs          |  2 +-
 18_backtrace/kernel/src/bsp.rs                |  2 +-
 18_backtrace/kernel/src/bsp/device_driver.rs  |  2 +-
 .../kernel/src/bsp/device_driver/arm.rs       |  2 +-
 .../kernel/src/bsp/device_driver/arm/gicv2.rs |  2 +-
 .../src/bsp/device_driver/arm/gicv2/gicc.rs   |  2 +-
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |  2 +-
 .../kernel/src/bsp/device_driver/bcm.rs       |  2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  2 +-
 .../bcm/bcm2xxx_interrupt_controller.rs       |  2 +-
 .../peripheral_ic.rs                          |  2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  2 +-
 .../kernel/src/bsp/device_driver/common.rs    |  2 +-
 18_backtrace/kernel/src/bsp/raspberrypi.rs    |  2 +-
 .../kernel/src/bsp/raspberrypi/cpu.rs         |  2 +-
 .../kernel/src/bsp/raspberrypi/driver.rs      |  2 +-
 .../kernel/src/bsp/raspberrypi/exception.rs   |  2 +-
 .../bsp/raspberrypi/exception/asynchronous.rs |  2 +-
 .../kernel/src/bsp/raspberrypi/memory.rs      |  2 +-
 .../kernel/src/bsp/raspberrypi/memory/mmu.rs  |  2 +-
 18_backtrace/kernel/src/common.rs             |  2 +-
 18_backtrace/kernel/src/console.rs            |  2 +-
 .../kernel/src/console/null_console.rs        |  2 +-
 18_backtrace/kernel/src/cpu.rs                |  2 +-
 18_backtrace/kernel/src/cpu/boot.rs           |  2 +-
 18_backtrace/kernel/src/cpu/smp.rs            |  2 +-
 18_backtrace/kernel/src/driver.rs             |  2 +-
 18_backtrace/kernel/src/exception.rs          |  2 +-
 .../kernel/src/exception/asynchronous.rs      |  2 +-
 .../asynchronous/null_irq_manager.rs          |  2 +-
 18_backtrace/kernel/src/lib.rs                |  2 +-
 18_backtrace/kernel/src/main.rs               |  2 +-
 18_backtrace/kernel/src/memory.rs             |  2 +-
 18_backtrace/kernel/src/memory/mmu.rs         |  2 +-
 .../kernel/src/memory/mmu/mapping_record.rs   |  2 +-
 .../kernel/src/memory/mmu/page_alloc.rs       |  2 +-
 .../src/memory/mmu/translation_table.rs       |  2 +-
 18_backtrace/kernel/src/memory/mmu/types.rs   |  2 +-
 18_backtrace/kernel/src/panic_wait.rs         |  2 +-
 18_backtrace/kernel/src/print.rs              |  2 +-
 18_backtrace/kernel/src/state.rs              |  2 +-
 18_backtrace/kernel/src/symbols.rs            |  2 +-
 18_backtrace/kernel/src/synchronization.rs    |  2 +-
 18_backtrace/kernel/src/time.rs               |  2 +-
 .../kernel/tests/00_console_sanity.rb         |  6 +-
 .../kernel/tests/00_console_sanity.rs         |  2 +-
 18_backtrace/kernel/tests/01_timer_sanity.rs  |  2 +-
 .../tests/02_exception_sync_page_fault.rs     |  2 +-
 .../tests/03_exception_restore_sanity.rb      |  6 +-
 .../tests/03_exception_restore_sanity.rs      |  2 +-
 .../kernel/tests/04_exception_irq_sanity.rs   |  2 +-
 .../kernel/tests/05_backtrace_sanity.rb       |  6 +-
 .../kernel/tests/05_backtrace_sanity.rs       |  2 +-
 .../tests/06_backtrace_invalid_frame.rb       |  6 +-
 .../tests/06_backtrace_invalid_frame.rs       |  2 +-
 .../kernel/tests/07_backtrace_invalid_link.rb |  6 +-
 .../kernel/tests/07_backtrace_invalid_link.rs |  2 +-
 .../kernel/tests/panic_exit_success/mod.rs    |  2 +-
 .../kernel/tests/panic_wait_forever/mod.rs    |  2 +-
 18_backtrace/kernel_symbols.mk                |  2 +-
 18_backtrace/kernel_symbols/src/main.rs       |  2 +-
 .../libraries/debug-symbol-types/src/lib.rs   |  2 +-
 18_backtrace/libraries/test-macros/src/lib.rs |  2 +-
 18_backtrace/libraries/test-types/src/lib.rs  |  2 +-
 .../tools/kernel_symbols_tool/cmds.rb         |  2 +-
 .../tools/kernel_symbols_tool/kernel_elf.rb   |  2 +-
 .../tools/kernel_symbols_tool/main.rb         |  2 +-
 .../tools/translation_table_tool/arch.rb      |  2 +-
 .../tools/translation_table_tool/bsp.rb       |  2 +-
 .../tools/translation_table_tool/generic.rb   |  4 +-
 .../translation_table_tool/kernel_elf.rb      |  2 +-
 .../tools/translation_table_tool/main.rb      |  2 +-
 19_kernel_heap/.vscode/settings.json          | 16 ++--
 19_kernel_heap/Makefile                       |  2 +-
 19_kernel_heap/README.md                      |  6 +-
 .../kernel/src/_arch/aarch64/backtrace.rs     |  2 +-
 .../kernel/src/_arch/aarch64/cpu.rs           |  2 +-
 .../kernel/src/_arch/aarch64/cpu/boot.rs      |  2 +-
 .../kernel/src/_arch/aarch64/cpu/smp.rs       |  2 +-
 .../kernel/src/_arch/aarch64/exception.rs     |  2 +-
 .../_arch/aarch64/exception/asynchronous.rs   |  2 +-
 .../kernel/src/_arch/aarch64/memory/mmu.rs    |  2 +-
 .../aarch64/memory/mmu/translation_table.rs   |  2 +-
 .../kernel/src/_arch/aarch64/time.rs          |  2 +-
 19_kernel_heap/kernel/src/backtrace.rs        |  2 +-
 19_kernel_heap/kernel/src/bsp.rs              |  2 +-
 .../kernel/src/bsp/device_driver.rs           |  2 +-
 .../kernel/src/bsp/device_driver/arm.rs       |  2 +-
 .../kernel/src/bsp/device_driver/arm/gicv2.rs |  2 +-
 .../src/bsp/device_driver/arm/gicv2/gicc.rs   |  2 +-
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |  2 +-
 .../kernel/src/bsp/device_driver/bcm.rs       |  2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  2 +-
 .../bcm/bcm2xxx_interrupt_controller.rs       |  2 +-
 .../peripheral_ic.rs                          |  2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  2 +-
 .../kernel/src/bsp/device_driver/common.rs    |  2 +-
 19_kernel_heap/kernel/src/bsp/raspberrypi.rs  |  2 +-
 .../kernel/src/bsp/raspberrypi/cpu.rs         |  2 +-
 .../kernel/src/bsp/raspberrypi/driver.rs      |  2 +-
 .../kernel/src/bsp/raspberrypi/exception.rs   |  2 +-
 .../bsp/raspberrypi/exception/asynchronous.rs |  2 +-
 .../kernel/src/bsp/raspberrypi/memory.rs      |  2 +-
 .../kernel/src/bsp/raspberrypi/memory/mmu.rs  |  2 +-
 19_kernel_heap/kernel/src/common.rs           |  2 +-
 19_kernel_heap/kernel/src/console.rs          |  2 +-
 .../kernel/src/console/buffer_console.rs      |  2 +-
 19_kernel_heap/kernel/src/cpu.rs              |  2 +-
 19_kernel_heap/kernel/src/cpu/boot.rs         |  2 +-
 19_kernel_heap/kernel/src/cpu/smp.rs          |  2 +-
 19_kernel_heap/kernel/src/driver.rs           |  2 +-
 19_kernel_heap/kernel/src/exception.rs        |  2 +-
 .../kernel/src/exception/asynchronous.rs      |  2 +-
 .../asynchronous/null_irq_manager.rs          |  2 +-
 19_kernel_heap/kernel/src/lib.rs              |  2 +-
 19_kernel_heap/kernel/src/main.rs             |  2 +-
 19_kernel_heap/kernel/src/memory.rs           |  2 +-
 .../kernel/src/memory/heap_alloc.rs           |  2 +-
 19_kernel_heap/kernel/src/memory/mmu.rs       |  2 +-
 .../kernel/src/memory/mmu/mapping_record.rs   |  2 +-
 .../kernel/src/memory/mmu/page_alloc.rs       |  2 +-
 .../src/memory/mmu/translation_table.rs       |  2 +-
 19_kernel_heap/kernel/src/memory/mmu/types.rs |  2 +-
 19_kernel_heap/kernel/src/panic_wait.rs       |  2 +-
 19_kernel_heap/kernel/src/print.rs            |  2 +-
 19_kernel_heap/kernel/src/state.rs            |  2 +-
 19_kernel_heap/kernel/src/symbols.rs          |  2 +-
 19_kernel_heap/kernel/src/synchronization.rs  |  2 +-
 19_kernel_heap/kernel/src/time.rs             |  2 +-
 .../kernel/tests/00_console_sanity.rb         |  6 +-
 .../kernel/tests/00_console_sanity.rs         |  2 +-
 .../kernel/tests/01_timer_sanity.rs           |  2 +-
 .../tests/02_exception_sync_page_fault.rs     |  2 +-
 .../tests/03_exception_restore_sanity.rb      |  6 +-
 .../tests/03_exception_restore_sanity.rs      |  2 +-
 .../kernel/tests/04_exception_irq_sanity.rs   |  2 +-
 .../kernel/tests/05_backtrace_sanity.rb       |  6 +-
 .../kernel/tests/05_backtrace_sanity.rs       |  2 +-
 .../tests/06_backtrace_invalid_frame.rb       |  6 +-
 .../tests/06_backtrace_invalid_frame.rs       |  2 +-
 .../kernel/tests/07_backtrace_invalid_link.rb |  6 +-
 .../kernel/tests/07_backtrace_invalid_link.rs |  2 +-
 .../kernel/tests/panic_exit_success/mod.rs    |  2 +-
 .../kernel/tests/panic_wait_forever/mod.rs    |  2 +-
 19_kernel_heap/kernel_symbols.mk              |  2 +-
 19_kernel_heap/kernel_symbols/src/main.rs     |  2 +-
 .../libraries/debug-symbol-types/src/lib.rs   |  2 +-
 .../libraries/test-macros/src/lib.rs          |  2 +-
 .../libraries/test-types/src/lib.rs           |  2 +-
 .../tools/kernel_symbols_tool/cmds.rb         |  2 +-
 .../tools/kernel_symbols_tool/kernel_elf.rb   |  2 +-
 .../tools/kernel_symbols_tool/main.rb         |  2 +-
 .../tools/translation_table_tool/arch.rb      |  2 +-
 .../tools/translation_table_tool/bsp.rb       |  2 +-
 .../tools/translation_table_tool/generic.rb   |  4 +-
 .../translation_table_tool/kernel_elf.rb      |  2 +-
 .../tools/translation_table_tool/main.rb      |  2 +-
 20_timer_callbacks/.vscode/settings.json      | 16 ++--
 20_timer_callbacks/Makefile                   |  2 +-
 20_timer_callbacks/README.md                  |  4 +-
 20_timer_callbacks/kernel/Cargo.toml          |  8 +-
 .../kernel/src/_arch/aarch64/backtrace.rs     |  2 +-
 .../kernel/src/_arch/aarch64/cpu.rs           |  2 +-
 .../kernel/src/_arch/aarch64/cpu/boot.rs      |  2 +-
 .../kernel/src/_arch/aarch64/cpu/boot.s       |  2 +-
 .../kernel/src/_arch/aarch64/cpu/smp.rs       |  2 +-
 .../kernel/src/_arch/aarch64/exception.rs     |  2 +-
 .../kernel/src/_arch/aarch64/exception.s      |  2 +-
 .../_arch/aarch64/exception/asynchronous.rs   |  2 +-
 .../kernel/src/_arch/aarch64/memory/mmu.rs    |  2 +-
 .../aarch64/memory/mmu/translation_table.rs   |  2 +-
 .../kernel/src/_arch/aarch64/time.rs          |  2 +-
 20_timer_callbacks/kernel/src/backtrace.rs    |  2 +-
 20_timer_callbacks/kernel/src/bsp.rs          |  2 +-
 .../kernel/src/bsp/device_driver.rs           |  2 +-
 .../kernel/src/bsp/device_driver/arm.rs       |  2 +-
 .../kernel/src/bsp/device_driver/arm/gicv2.rs |  2 +-
 .../src/bsp/device_driver/arm/gicv2/gicc.rs   |  2 +-
 .../src/bsp/device_driver/arm/gicv2/gicd.rs   |  2 +-
 .../kernel/src/bsp/device_driver/bcm.rs       |  2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  2 +-
 .../bcm/bcm2xxx_interrupt_controller.rs       |  2 +-
 .../bcm2xxx_interrupt_controller/local_ic.rs  |  2 +-
 .../peripheral_ic.rs                          |  2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  2 +-
 .../kernel/src/bsp/device_driver/common.rs    |  2 +-
 .../kernel/src/bsp/raspberrypi.rs             |  2 +-
 .../kernel/src/bsp/raspberrypi/cpu.rs         |  2 +-
 .../kernel/src/bsp/raspberrypi/driver.rs      |  2 +-
 .../kernel/src/bsp/raspberrypi/exception.rs   |  2 +-
 .../bsp/raspberrypi/exception/asynchronous.rs |  2 +-
 .../kernel/src/bsp/raspberrypi/memory.rs      |  2 +-
 .../kernel/src/bsp/raspberrypi/memory/mmu.rs  |  2 +-
 20_timer_callbacks/kernel/src/common.rs       |  2 +-
 20_timer_callbacks/kernel/src/console.rs      |  2 +-
 .../kernel/src/console/buffer_console.rs      |  2 +-
 20_timer_callbacks/kernel/src/cpu.rs          |  2 +-
 20_timer_callbacks/kernel/src/cpu/boot.rs     |  2 +-
 20_timer_callbacks/kernel/src/cpu/smp.rs      |  2 +-
 20_timer_callbacks/kernel/src/driver.rs       |  2 +-
 20_timer_callbacks/kernel/src/exception.rs    |  2 +-
 .../kernel/src/exception/asynchronous.rs      |  2 +-
 .../asynchronous/null_irq_manager.rs          |  2 +-
 20_timer_callbacks/kernel/src/lib.rs          |  2 +-
 20_timer_callbacks/kernel/src/main.rs         |  2 +-
 20_timer_callbacks/kernel/src/memory.rs       |  2 +-
 .../kernel/src/memory/heap_alloc.rs           |  2 +-
 20_timer_callbacks/kernel/src/memory/mmu.rs   |  2 +-
 .../kernel/src/memory/mmu/mapping_record.rs   |  2 +-
 .../kernel/src/memory/mmu/page_alloc.rs       |  2 +-
 .../src/memory/mmu/translation_table.rs       |  2 +-
 .../kernel/src/memory/mmu/types.rs            |  2 +-
 20_timer_callbacks/kernel/src/panic_wait.rs   |  2 +-
 20_timer_callbacks/kernel/src/print.rs        |  2 +-
 20_timer_callbacks/kernel/src/state.rs        |  2 +-
 20_timer_callbacks/kernel/src/symbols.rs      |  2 +-
 .../kernel/src/synchronization.rs             |  2 +-
 20_timer_callbacks/kernel/src/time.rs         |  2 +-
 .../kernel/tests/00_console_sanity.rb         |  6 +-
 .../kernel/tests/00_console_sanity.rs         |  2 +-
 .../kernel/tests/01_timer_sanity.rs           |  2 +-
 .../tests/02_exception_sync_page_fault.rs     |  2 +-
 .../tests/03_exception_restore_sanity.rb      |  6 +-
 .../tests/03_exception_restore_sanity.rs      |  2 +-
 .../kernel/tests/04_exception_irq_sanity.rs   |  2 +-
 .../kernel/tests/05_backtrace_sanity.rb       |  6 +-
 .../kernel/tests/05_backtrace_sanity.rs       |  2 +-
 .../tests/06_backtrace_invalid_frame.rb       |  6 +-
 .../tests/06_backtrace_invalid_frame.rs       |  2 +-
 .../kernel/tests/07_backtrace_invalid_link.rb |  6 +-
 .../kernel/tests/07_backtrace_invalid_link.rs |  2 +-
 .../kernel/tests/panic_exit_success/mod.rs    |  2 +-
 .../kernel/tests/panic_wait_forever/mod.rs    |  2 +-
 20_timer_callbacks/kernel_symbols.mk          |  2 +-
 .../kernel_symbols/kernel_symbols.ld          |  2 +-
 20_timer_callbacks/kernel_symbols/src/main.rs |  2 +-
 .../libraries/debug-symbol-types/src/lib.rs   |  2 +-
 .../libraries/test-macros/src/lib.rs          |  2 +-
 .../libraries/test-types/src/lib.rs           |  2 +-
 .../tools/kernel_symbols_tool/cmds.rb         |  2 +-
 .../tools/kernel_symbols_tool/kernel_elf.rb   |  2 +-
 .../tools/kernel_symbols_tool/main.rb         |  2 +-
 .../tools/translation_table_tool/arch.rb      |  2 +-
 .../tools/translation_table_tool/bsp.rb       |  2 +-
 .../tools/translation_table_tool/generic.rb   |  4 +-
 .../translation_table_tool/kernel_elf.rb      |  2 +-
 .../tools/translation_table_tool/main.rb      |  2 +-
 LICENSE-MIT                                   |  2 +-
 X1_JTAG_boot/.vscode/settings.json            | 16 ++--
 X1_JTAG_boot/Makefile                         |  2 +-
 X1_JTAG_boot/src/_arch/aarch64/cpu.rs         |  2 +-
 X1_JTAG_boot/src/_arch/aarch64/cpu/boot.rs    |  2 +-
 X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s     |  2 +-
 X1_JTAG_boot/src/_arch/aarch64/time.rs        |  2 +-
 X1_JTAG_boot/src/bsp.rs                       |  2 +-
 X1_JTAG_boot/src/bsp/device_driver.rs         |  2 +-
 X1_JTAG_boot/src/bsp/device_driver/bcm.rs     |  2 +-
 .../src/bsp/device_driver/bcm/bcm2xxx_gpio.rs |  2 +-
 .../device_driver/bcm/bcm2xxx_pl011_uart.rs   |  2 +-
 X1_JTAG_boot/src/bsp/device_driver/common.rs  |  2 +-
 X1_JTAG_boot/src/bsp/raspberrypi.rs           |  2 +-
 X1_JTAG_boot/src/bsp/raspberrypi/cpu.rs       |  2 +-
 X1_JTAG_boot/src/bsp/raspberrypi/driver.rs    |  2 +-
 X1_JTAG_boot/src/bsp/raspberrypi/kernel.ld    |  2 +-
 X1_JTAG_boot/src/bsp/raspberrypi/memory.rs    |  2 +-
 X1_JTAG_boot/src/console.rs                   |  2 +-
 X1_JTAG_boot/src/console/null_console.rs      |  2 +-
 X1_JTAG_boot/src/cpu.rs                       |  2 +-
 X1_JTAG_boot/src/cpu/boot.rs                  |  2 +-
 X1_JTAG_boot/src/driver.rs                    |  2 +-
 X1_JTAG_boot/src/main.rs                      |  2 +-
 X1_JTAG_boot/src/panic_wait.rs                |  2 +-
 X1_JTAG_boot/src/print.rs                     |  2 +-
 X1_JTAG_boot/src/synchronization.rs           |  2 +-
 X1_JTAG_boot/src/time.rs                      |  2 +-
 common/serial/minipush.rb                     |  6 +-
 common/serial/minipush/progressbar_patch.rb   |  2 +-
 common/serial/miniterm.rb                     |  6 +-
 common/tests/boot_test.rb                     |  2 +-
 common/tests/console_io_test.rb               |  2 +-
 common/tests/dispatch.rb                      |  2 +-
 common/tests/exit_code_test.rb                |  2 +-
 common/tests/test.rb                          |  2 +-
 docker/rustembedded-osdev-utils/Dockerfile    |  4 +-
 docker/rustembedded-osdev-utils/Makefile      |  2 +-
 utils/devtool.rb                              |  6 +-
 utils/devtool/copyright.rb                    |  2 +-
 utils/diff_tut_folders.bash                   |  2 +-
 utils/update_copyright.rb                     |  2 +-
 958 files changed, 1504 insertions(+), 1472 deletions(-)

diff --git a/.githooks/pre-commit b/.githooks/pre-commit
index e9570651f..713818924 100755
--- a/.githooks/pre-commit
+++ b/.githooks/pre-commit
@@ -3,7 +3,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require_relative '../utils/devtool/copyright'
 
@@ -23,9 +23,9 @@ def copyright_check(staged_files)
     copyright_check_files(staged_files)
 end
 
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 ## Execution starts here
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 staged_files = `git --no-pager diff --name-only --cached --diff-filter=d`.split(/\n/)
 root_dir = `git rev-parse --show-toplevel`.strip
 
diff --git a/.github/workflows/build_rpi3.yml b/.github/workflows/build_rpi3.yml
index 179752b73..b3b997b3e 100644
--- a/.github/workflows/build_rpi3.yml
+++ b/.github/workflows/build_rpi3.yml
@@ -1,40 +1,40 @@
 name: BSP-RPi3
 
 on:
-  push:
-    branches:
-      - master
-    paths-ignore:
-      - "utils/**"
-      - "doc/**"
-      - "docker/**"
-  pull_request:
-    branches:
-      - master
-    paths-ignore:
-      - "utils/**"
-      - "doc/**"
-      - "docker/**"
-  schedule:
-    - cron: "0 5 * * *"
+    push:
+        branches:
+            - master
+        paths-ignore:
+            - "utils/**"
+            - "doc/**"
+            - "docker/**"
+    pull_request:
+        branches:
+            - master
+        paths-ignore:
+            - "utils/**"
+            - "doc/**"
+            - "docker/**"
+    schedule:
+        - cron: "0 5 * * *"
 
 jobs:
-  build:
-    name: Build kernels
-    runs-on: ubuntu-22.04
+    build:
+        name: Build kernels
+        runs-on: ubuntu-22.04
 
-    steps:
-      - uses: actions/checkout@v3
-      - name: Set up Ruby
-        uses: ruby/setup-ruby@v1
-      - name: Set up Rust nightly
-        run: |
-          cargo install cargo-binutils rustfilt
-      - name: Set up Ruby
-        run: |
-          gem install bundler
-          bundle config set without 'uart'
-          bundle install --retry 3
-      - name: Run
-        run: |
-          BSP=rpi3 bundle exec ruby utils/devtool.rb make
+        steps:
+            - uses: actions/checkout@v3
+            - name: Set up Ruby
+              uses: ruby/setup-ruby@v1
+            - name: Set up Rust nightly
+              run: |
+                  cargo install cargo-binutils rustfilt
+            - name: Set up Ruby
+              run: |
+                  gem install bundler
+                  bundle config set without 'uart'
+                  bundle install --retry 3
+            - name: Run
+              run: |
+                  BSP=rpi3 bundle exec ruby utils/devtool.rb make
diff --git a/.github/workflows/build_rpi4.yml b/.github/workflows/build_rpi4.yml
index 88d698853..ca15786ed 100644
--- a/.github/workflows/build_rpi4.yml
+++ b/.github/workflows/build_rpi4.yml
@@ -1,40 +1,40 @@
 name: BSP-RPi4
 
 on:
-  push:
-    branches:
-      - master
-    paths-ignore:
-      - "utils/**"
-      - "doc/**"
-      - "docker/**"
-  pull_request:
-    branches:
-      - master
-    paths-ignore:
-      - "utils/**"
-      - "doc/**"
-      - "docker/**"
-  schedule:
-    - cron: "0 5 * * *"
+    push:
+        branches:
+            - master
+        paths-ignore:
+            - "utils/**"
+            - "doc/**"
+            - "docker/**"
+    pull_request:
+        branches:
+            - master
+        paths-ignore:
+            - "utils/**"
+            - "doc/**"
+            - "docker/**"
+    schedule:
+        - cron: "0 5 * * *"
 
 jobs:
-  build:
-    name: Build kernels
-    runs-on: ubuntu-22.04
+    build:
+        name: Build kernels
+        runs-on: ubuntu-22.04
 
-    steps:
-      - uses: actions/checkout@v3
-      - name: Set up Ruby
-        uses: ruby/setup-ruby@v1
-      - name: Set up Rust nightly
-        run: |
-          cargo install cargo-binutils rustfilt
-      - name: Set up Ruby
-        run: |
-          gem install bundler
-          bundle config set without 'uart'
-          bundle install --retry 3
-      - name: Run
-        run: |
-          BSP=rpi4 bundle exec ruby utils/devtool.rb make
+        steps:
+            - uses: actions/checkout@v3
+            - name: Set up Ruby
+              uses: ruby/setup-ruby@v1
+            - name: Set up Rust nightly
+              run: |
+                  cargo install cargo-binutils rustfilt
+            - name: Set up Ruby
+              run: |
+                  gem install bundler
+                  bundle config set without 'uart'
+                  bundle install --retry 3
+            - name: Run
+              run: |
+                  BSP=rpi4 bundle exec ruby utils/devtool.rb make
diff --git a/.github/workflows/sanity.yml b/.github/workflows/sanity.yml
index fc14b2421..3eb0f0888 100644
--- a/.github/workflows/sanity.yml
+++ b/.github/workflows/sanity.yml
@@ -1,46 +1,46 @@
 name: Various Sanity Checks
 
 on:
-  push:
-    branches:
-      - master
-  pull_request:
-    branches:
-      - master
+    push:
+        branches:
+            - master
+    pull_request:
+        branches:
+            - master
 
 jobs:
-  build:
-    name: Various Sanity Checks
-    runs-on: ubuntu-22.04
+    build:
+        name: Various Sanity Checks
+        runs-on: ubuntu-22.04
 
-    steps:
-      - uses: actions/checkout@v3
-      - name: Set up Node
-        uses: actions/setup-node@v1
-        with:
-          node-version: "16"
-      - name: Set up Ruby
-        uses: ruby/setup-ruby@v1
-      - name: Set up Rust nightly
-        run: |
-          rustup component add clippy
-      - name: Set up Bundler
-        run: |
-          gem install bundler
-          bundle config set without 'uart'
-          bundle install --retry 3
-      - name: Set up Prettier
-        run: |
-          npm install prettier
-      - name: Setup misspell
-        run: |
-          curl -L -o ./install-misspell.sh https://raw.githubusercontent.com/client9/misspell/master/install-misspell.sh
-          sh ./install-misspell.sh -b .vendor
-      - name: Run checks
-        run: |
-          BSP=rpi3 bundle exec ruby utils/devtool.rb clippy
-          BSP=rpi4 bundle exec ruby utils/devtool.rb clippy
-          bundle exec ruby utils/devtool.rb copyright
-          bundle exec ruby utils/devtool.rb fmt_check
-          bundle exec ruby utils/devtool.rb misspell
-          bundle exec ruby utils/devtool.rb rubocop
+        steps:
+            - uses: actions/checkout@v3
+            - name: Set up Node
+              uses: actions/setup-node@v1
+              with:
+                  node-version: "16"
+            - name: Set up Ruby
+              uses: ruby/setup-ruby@v1
+            - name: Set up Rust nightly
+              run: |
+                  rustup component add clippy
+            - name: Set up Bundler
+              run: |
+                  gem install bundler
+                  bundle config set without 'uart'
+                  bundle install --retry 3
+            - name: Set up Prettier
+              run: |
+                  npm install prettier
+            - name: Setup misspell
+              run: |
+                  curl -L -o ./install-misspell.sh https://raw.githubusercontent.com/client9/misspell/master/install-misspell.sh
+                  sh ./install-misspell.sh -b .vendor
+            - name: Run checks
+              run: |
+                  BSP=rpi3 bundle exec ruby utils/devtool.rb clippy
+                  BSP=rpi4 bundle exec ruby utils/devtool.rb clippy
+                  bundle exec ruby utils/devtool.rb copyright
+                  bundle exec ruby utils/devtool.rb fmt_check
+                  bundle exec ruby utils/devtool.rb misspell
+                  bundle exec ruby utils/devtool.rb rubocop
diff --git a/.github/workflows/test_integration.yml b/.github/workflows/test_integration.yml
index affc97934..7e3ab0764 100644
--- a/.github/workflows/test_integration.yml
+++ b/.github/workflows/test_integration.yml
@@ -1,40 +1,40 @@
 name: Integration-Tests
 
 on:
-  push:
-    branches:
-      - master
-    paths-ignore:
-      - "utils/**"
-      - "doc/**"
-      - "docker/**"
-  pull_request:
-    branches:
-      - master
-    paths-ignore:
-      - "utils/**"
-      - "doc/**"
-      - "docker/**"
-  schedule:
-    - cron: "0 5 * * *"
+    push:
+        branches:
+            - master
+        paths-ignore:
+            - "utils/**"
+            - "doc/**"
+            - "docker/**"
+    pull_request:
+        branches:
+            - master
+        paths-ignore:
+            - "utils/**"
+            - "doc/**"
+            - "docker/**"
+    schedule:
+        - cron: "0 5 * * *"
 
 jobs:
-  build:
-    name: Run integration tests
-    runs-on: ubuntu-22.04
+    build:
+        name: Run integration tests
+        runs-on: ubuntu-22.04
 
-    steps:
-      - uses: actions/checkout@v3
-      - name: Set up Ruby
-        uses: ruby/setup-ruby@v1
-      - name: Set up Rust nightly
-        run: |
-          cargo install cargo-binutils rustfilt
-      - name: Set up Ruby
-        run: |
-          gem install bundler
-          bundle config set without 'uart'
-          bundle install --retry 3
-      - name: Run
-        run: |
-          bundle exec ruby utils/devtool.rb test_integration
+        steps:
+            - uses: actions/checkout@v3
+            - name: Set up Ruby
+              uses: ruby/setup-ruby@v1
+            - name: Set up Rust nightly
+              run: |
+                  cargo install cargo-binutils rustfilt
+            - name: Set up Ruby
+              run: |
+                  gem install bundler
+                  bundle config set without 'uart'
+                  bundle install --retry 3
+            - name: Run
+              run: |
+                  bundle exec ruby utils/devtool.rb test_integration
diff --git a/.github/workflows/test_unit.yml b/.github/workflows/test_unit.yml
index 7518b08cb..9ac564322 100644
--- a/.github/workflows/test_unit.yml
+++ b/.github/workflows/test_unit.yml
@@ -1,41 +1,41 @@
 name: Boot-and-Unit-Tests
 
 on:
-  push:
-    branches:
-      - master
-    paths-ignore:
-      - "utils/**"
-      - "doc/**"
-      - "docker/**"
-  pull_request:
-    branches:
-      - master
-    paths-ignore:
-      - "utils/**"
-      - "doc/**"
-      - "docker/**"
-  schedule:
-    - cron: "0 5 * * *"
+    push:
+        branches:
+            - master
+        paths-ignore:
+            - "utils/**"
+            - "doc/**"
+            - "docker/**"
+    pull_request:
+        branches:
+            - master
+        paths-ignore:
+            - "utils/**"
+            - "doc/**"
+            - "docker/**"
+    schedule:
+        - cron: "0 5 * * *"
 
 jobs:
-  build:
-    name: Run boot and unit tests
-    runs-on: ubuntu-22.04
+    build:
+        name: Run boot and unit tests
+        runs-on: ubuntu-22.04
 
-    steps:
-      - uses: actions/checkout@v3
-      - name: Set up Ruby
-        uses: ruby/setup-ruby@v1
-      - name: Set up Rust nightly
-        run: |
-          cargo install cargo-binutils rustfilt
-      - name: Set up Ruby
-        run: |
-          gem install bundler
-          bundle config set without 'uart'
-          bundle install --retry 3
-      - name: Run
-        run: |
-          bundle exec ruby utils/devtool.rb test_boot
-          bundle exec ruby utils/devtool.rb test_unit
+        steps:
+            - uses: actions/checkout@v3
+            - name: Set up Ruby
+              uses: ruby/setup-ruby@v1
+            - name: Set up Rust nightly
+              run: |
+                  cargo install cargo-binutils rustfilt
+            - name: Set up Ruby
+              run: |
+                  gem install bundler
+                  bundle config set without 'uart'
+                  bundle install --retry 3
+            - name: Run
+              run: |
+                  bundle exec ruby utils/devtool.rb test_boot
+                  bundle exec ruby utils/devtool.rb test_unit
diff --git a/.github/workflows/test_xtra.yml b/.github/workflows/test_xtra.yml
index a2a6c1e0a..cdc705f9e 100644
--- a/.github/workflows/test_xtra.yml
+++ b/.github/workflows/test_xtra.yml
@@ -1,40 +1,40 @@
 name: Xtra-Tests
 
 on:
-  push:
-    branches:
-      - master
-    paths-ignore:
-      - "utils/**"
-      - "doc/**"
-      - "docker/**"
-  pull_request:
-    branches:
-      - master
-    paths-ignore:
-      - "utils/**"
-      - "doc/**"
-      - "docker/**"
-  schedule:
-    - cron: "0 5 * * *"
+    push:
+        branches:
+            - master
+        paths-ignore:
+            - "utils/**"
+            - "doc/**"
+            - "docker/**"
+    pull_request:
+        branches:
+            - master
+        paths-ignore:
+            - "utils/**"
+            - "doc/**"
+            - "docker/**"
+    schedule:
+        - cron: "0 5 * * *"
 
 jobs:
-  build:
-    name: Run xtra tests
-    runs-on: ubuntu-22.04
+    build:
+        name: Run xtra tests
+        runs-on: ubuntu-22.04
 
-    steps:
-      - uses: actions/checkout@v3
-      - name: Set up Ruby
-        uses: ruby/setup-ruby@v1
-      - name: Set up Rust nightly
-        run: |
-          cargo install cargo-binutils
-      - name: Set up Ruby
-        run: |
-          gem install bundler
-          bundle config set without 'uart'
-          bundle install --retry 3
-      - name: Run
-        run: |
-          bundle exec ruby utils/devtool.rb make_xtra
+        steps:
+            - uses: actions/checkout@v3
+            - name: Set up Ruby
+              uses: ruby/setup-ruby@v1
+            - name: Set up Rust nightly
+              run: |
+                  cargo install cargo-binutils
+            - name: Set up Ruby
+              run: |
+                  gem install bundler
+                  bundle config set without 'uart'
+                  bundle install --retry 3
+            - name: Run
+              run: |
+                  bundle exec ruby utils/devtool.rb make_xtra
diff --git a/.prettierrc.json b/.prettierrc.json
index 0967ef424..864ccc367 100644
--- a/.prettierrc.json
+++ b/.prettierrc.json
@@ -1 +1,35 @@
-{}
+{
+    "printWidth": 100,
+    "tabWidth": 4,
+    "useTabs": false,
+    "semi": true,
+    "singleQuote": false,
+    "trailingComma": "es5",
+    "bracketSpacing": true,
+    "jsxBracketSameLine": false,
+    "arrowParens": "always",
+    "requirePragma": false,
+    "insertPragma": false,
+    "proseWrap": "preserve",
+    "endOfLine": "auto",
+    "overrides": [
+        {
+            "files": "*.rs",
+            "options": {
+                "printWidth": 100,
+                "tabWidth": 4,
+                "useTabs": false,
+                "semi": true,
+                "singleQuote": false,
+                "trailingComma": "es5",
+                "bracketSpacing": true,
+                "jsxBracketSameLine": false,
+                "arrowParens": "always",
+                "requirePragma": false,
+                "insertPragma": false,
+                "proseWrap": "preserve",
+                "endOfLine": "auto"
+            }
+        }
+    ]
+}
diff --git a/.rubocop.yml b/.rubocop.yml
index 1de61528e..059ba16e2 100644
--- a/.rubocop.yml
+++ b/.rubocop.yml
@@ -10,23 +10,23 @@
 # See https://github.com/rubocop-hq/rubocop/blob/master/manual/configuration.md
 
 Layout/IndentationWidth:
-  Width: 4
-  AllowedPatterns: ['^\s*module']
+    Width: 4
+    AllowedPatterns: ['^\s*module']
 
 Layout/LineLength:
-  Max: 100
+    Max: 100
 
 Lint/UnusedMethodArgument:
-  AutoCorrect: False
+    AutoCorrect: False
 
 Metrics/AbcSize:
-  Max: 25
+    Max: 25
 
 Metrics/ClassLength:
-  Enabled: false
+    Enabled: false
 
 Metrics/MethodLength:
-  Max: 20
+    Max: 20
 
 AllCops:
-  NewCops: enable
+    NewCops: enable
diff --git a/.vscode/settings.json b/.vscode/settings.json
index 292bf2a93..9ef30cd06 100644
--- a/.vscode/settings.json
+++ b/.vscode/settings.json
@@ -1,10 +1,10 @@
 {
-  "editor.formatOnSave": true,
-  "editor.rulers": [100],
-  "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.allTargets": false,
-  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
-  "rust-analyzer.lens.debug": false,
-  "rust-analyzer.lens.run": false
+    "editor.formatOnSave": true,
+    "editor.rulers": [100],
+    "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
+    "rust-analyzer.cargo.features": ["bsp_rpi3"],
+    "rust-analyzer.checkOnSave.allTargets": false,
+    "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
+    "rust-analyzer.lens.debug": false,
+    "rust-analyzer.lens.run": false
 }
diff --git a/01_wait_forever/.vscode/settings.json b/01_wait_forever/.vscode/settings.json
index d1916456a..bfa278e9a 100644
--- a/01_wait_forever/.vscode/settings.json
+++ b/01_wait_forever/.vscode/settings.json
@@ -1,10 +1,10 @@
 {
-  "editor.formatOnSave": true,
-  "editor.rulers": [100],
-  "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.allTargets": false,
-  "rust-analyzer.checkOnSave.extraArgs": ["--bins"],
-  "rust-analyzer.lens.debug": false,
-  "rust-analyzer.lens.run": false
+    "editor.formatOnSave": true,
+    "editor.rulers": [100],
+    "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
+    "rust-analyzer.cargo.features": ["bsp_rpi3"],
+    "rust-analyzer.checkOnSave.allTargets": false,
+    "rust-analyzer.checkOnSave.extraArgs": ["--bins"],
+    "rust-analyzer.lens.debug": false,
+    "rust-analyzer.lens.run": false
 }
diff --git a/01_wait_forever/Cargo.toml b/01_wait_forever/Cargo.toml
index 459866f8e..c2815c329 100644
--- a/01_wait_forever/Cargo.toml
+++ b/01_wait_forever/Cargo.toml
@@ -20,4 +20,4 @@ path = "src/main.rs"
 ## Dependencies
 ##--------------------------------------------------------------------------------------------------
 
-[dependencies]
+[dependencies]
\ No newline at end of file
diff --git a/01_wait_forever/Makefile b/01_wait_forever/Makefile
index c87546fd3..51c128f7c 100644
--- a/01_wait_forever/Makefile
+++ b/01_wait_forever/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/docker.mk
 include ../common/format.mk
diff --git a/01_wait_forever/src/_arch/aarch64/cpu/boot.rs b/01_wait_forever/src/_arch/aarch64/cpu/boot.rs
index 77d3d99fd..3cf9b08fb 100644
--- a/01_wait_forever/src/_arch/aarch64/cpu/boot.rs
+++ b/01_wait_forever/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/01_wait_forever/src/_arch/aarch64/cpu/boot.s b/01_wait_forever/src/_arch/aarch64/cpu/boot.s
index d5b5bc9ce..8f33b483d 100644
--- a/01_wait_forever/src/_arch/aarch64/cpu/boot.s
+++ b/01_wait_forever/src/_arch/aarch64/cpu/boot.s
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //--------------------------------------------------------------------------------------------------
 // Public Code
diff --git a/01_wait_forever/src/bsp.rs b/01_wait_forever/src/bsp.rs
index a09ba8a45..b128add9b 100644
--- a/01_wait_forever/src/bsp.rs
+++ b/01_wait_forever/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/01_wait_forever/src/bsp/raspberrypi.rs b/01_wait_forever/src/bsp/raspberrypi.rs
index 26b678a00..3253ee5e9 100644
--- a/01_wait_forever/src/bsp/raspberrypi.rs
+++ b/01_wait_forever/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/01_wait_forever/src/cpu.rs b/01_wait_forever/src/cpu.rs
index 8f50133f5..9f399de24 100644
--- a/01_wait_forever/src/cpu.rs
+++ b/01_wait_forever/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/01_wait_forever/src/cpu/boot.rs b/01_wait_forever/src/cpu/boot.rs
index 8091dac36..b1e98328a 100644
--- a/01_wait_forever/src/cpu/boot.rs
+++ b/01_wait_forever/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/01_wait_forever/src/main.rs b/01_wait_forever/src/main.rs
index f7e08a59f..10fdb3f43 100644
--- a/01_wait_forever/src/main.rs
+++ b/01_wait_forever/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(
diff --git a/01_wait_forever/src/panic_wait.rs b/01_wait_forever/src/panic_wait.rs
index c9a8f5e43..714bf2963 100644
--- a/01_wait_forever/src/panic_wait.rs
+++ b/01_wait_forever/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/02_runtime_init/.vscode/settings.json b/02_runtime_init/.vscode/settings.json
index d1916456a..bfa278e9a 100644
--- a/02_runtime_init/.vscode/settings.json
+++ b/02_runtime_init/.vscode/settings.json
@@ -1,10 +1,10 @@
 {
-  "editor.formatOnSave": true,
-  "editor.rulers": [100],
-  "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.allTargets": false,
-  "rust-analyzer.checkOnSave.extraArgs": ["--bins"],
-  "rust-analyzer.lens.debug": false,
-  "rust-analyzer.lens.run": false
+    "editor.formatOnSave": true,
+    "editor.rulers": [100],
+    "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
+    "rust-analyzer.cargo.features": ["bsp_rpi3"],
+    "rust-analyzer.checkOnSave.allTargets": false,
+    "rust-analyzer.checkOnSave.extraArgs": ["--bins"],
+    "rust-analyzer.lens.debug": false,
+    "rust-analyzer.lens.run": false
 }
diff --git a/02_runtime_init/Makefile b/02_runtime_init/Makefile
index 807a935e4..893564e2d 100644
--- a/02_runtime_init/Makefile
+++ b/02_runtime_init/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/docker.mk
 include ../common/format.mk
diff --git a/02_runtime_init/README.md b/02_runtime_init/README.md
index 76fc07ddb..1082f18c6 100644
--- a/02_runtime_init/README.md
+++ b/02_runtime_init/README.md
@@ -58,7 +58,6 @@ diff -uNr 01_wait_forever/Makefile 02_runtime_init/Makefile
                  --section .text   \
 +                --section .rodata \
                  $(KERNEL_ELF) | rustfilt
-
  ##------------------------------------------------------------------------------
 
 diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.rs 02_runtime_init/src/_arch/aarch64/cpu/boot.rs
@@ -90,7 +89,7 @@ diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.s 02_runtime_init/src/_arch
 --- 01_wait_forever/src/_arch/aarch64/cpu/boot.s
 +++ 02_runtime_init/src/_arch/aarch64/cpu/boot.s
 @@ -3,6 +3,22 @@
- // Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+ // Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
  //--------------------------------------------------------------------------------------------------
 +// Definitions
@@ -154,7 +153,7 @@ diff -uNr 01_wait_forever/src/_arch/aarch64/cpu.rs 02_runtime_init/src/_arch/aar
 @@ -0,0 +1,26 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Architectural processor code.
 +//!
@@ -185,7 +184,7 @@ diff -uNr 01_wait_forever/src/bsp/raspberrypi/cpu.rs 02_runtime_init/src/bsp/ras
 @@ -0,0 +1,14 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! BSP Processor code.
 +
@@ -202,7 +201,7 @@ diff -uNr 01_wait_forever/src/bsp/raspberrypi/kernel.ld 02_runtime_init/src/bsp/
 --- 01_wait_forever/src/bsp/raspberrypi/kernel.ld
 +++ 02_runtime_init/src/bsp/raspberrypi/kernel.ld
 @@ -3,6 +3,8 @@
-  * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+  * Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
   */
 
 +__rpi_phys_dram_start_addr = 0;
diff --git a/02_runtime_init/src/_arch/aarch64/cpu.rs b/02_runtime_init/src/_arch/aarch64/cpu.rs
index 7872f85fc..11d5024e8 100644
--- a/02_runtime_init/src/_arch/aarch64/cpu.rs
+++ b/02_runtime_init/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 //!
diff --git a/02_runtime_init/src/_arch/aarch64/cpu/boot.rs b/02_runtime_init/src/_arch/aarch64/cpu/boot.rs
index 8390c0132..2a6c46492 100644
--- a/02_runtime_init/src/_arch/aarch64/cpu/boot.rs
+++ b/02_runtime_init/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/02_runtime_init/src/bsp.rs b/02_runtime_init/src/bsp.rs
index a09ba8a45..b128add9b 100644
--- a/02_runtime_init/src/bsp.rs
+++ b/02_runtime_init/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/02_runtime_init/src/bsp/raspberrypi.rs b/02_runtime_init/src/bsp/raspberrypi.rs
index 5ab6cb345..c3abe0a69 100644
--- a/02_runtime_init/src/bsp/raspberrypi.rs
+++ b/02_runtime_init/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/02_runtime_init/src/bsp/raspberrypi/cpu.rs b/02_runtime_init/src/bsp/raspberrypi/cpu.rs
index 85fb89e49..65cf5abbe 100644
--- a/02_runtime_init/src/bsp/raspberrypi/cpu.rs
+++ b/02_runtime_init/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/02_runtime_init/src/cpu.rs b/02_runtime_init/src/cpu.rs
index b2a960103..13b89581f 100644
--- a/02_runtime_init/src/cpu.rs
+++ b/02_runtime_init/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/02_runtime_init/src/cpu/boot.rs b/02_runtime_init/src/cpu/boot.rs
index 8091dac36..b1e98328a 100644
--- a/02_runtime_init/src/cpu/boot.rs
+++ b/02_runtime_init/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/02_runtime_init/src/main.rs b/02_runtime_init/src/main.rs
index e16354ed6..152d7544f 100644
--- a/02_runtime_init/src/main.rs
+++ b/02_runtime_init/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(
diff --git a/02_runtime_init/src/panic_wait.rs b/02_runtime_init/src/panic_wait.rs
index 7e9adfcea..34a98173f 100644
--- a/02_runtime_init/src/panic_wait.rs
+++ b/02_runtime_init/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/03_hacky_hello_world/.vscode/settings.json b/03_hacky_hello_world/.vscode/settings.json
index d1916456a..bfa278e9a 100644
--- a/03_hacky_hello_world/.vscode/settings.json
+++ b/03_hacky_hello_world/.vscode/settings.json
@@ -1,10 +1,10 @@
 {
-  "editor.formatOnSave": true,
-  "editor.rulers": [100],
-  "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.allTargets": false,
-  "rust-analyzer.checkOnSave.extraArgs": ["--bins"],
-  "rust-analyzer.lens.debug": false,
-  "rust-analyzer.lens.run": false
+    "editor.formatOnSave": true,
+    "editor.rulers": [100],
+    "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
+    "rust-analyzer.cargo.features": ["bsp_rpi3"],
+    "rust-analyzer.checkOnSave.allTargets": false,
+    "rust-analyzer.checkOnSave.extraArgs": ["--bins"],
+    "rust-analyzer.lens.debug": false,
+    "rust-analyzer.lens.run": false
 }
diff --git a/03_hacky_hello_world/Makefile b/03_hacky_hello_world/Makefile
index 13dba46ce..ce5aff099 100644
--- a/03_hacky_hello_world/Makefile
+++ b/03_hacky_hello_world/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/docker.mk
 include ../common/format.mk
diff --git a/03_hacky_hello_world/README.md b/03_hacky_hello_world/README.md
index b0ad3ff25..07bf45032 100644
--- a/03_hacky_hello_world/README.md
+++ b/03_hacky_hello_world/README.md
@@ -130,7 +130,7 @@ diff -uNr 02_runtime_init/src/bsp/raspberrypi/console.rs 03_hacky_hello_world/sr
 @@ -0,0 +1,47 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! BSP console facilities.
 +
@@ -192,7 +192,7 @@ diff -uNr 02_runtime_init/src/console.rs 03_hacky_hello_world/src/console.rs
 @@ -0,0 +1,32 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! System console.
 +
@@ -327,7 +327,7 @@ diff -uNr 02_runtime_init/src/print.rs 03_hacky_hello_world/src/print.rs
 @@ -0,0 +1,38 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Printing.
 +
diff --git a/03_hacky_hello_world/src/_arch/aarch64/cpu.rs b/03_hacky_hello_world/src/_arch/aarch64/cpu.rs
index 7872f85fc..11d5024e8 100644
--- a/03_hacky_hello_world/src/_arch/aarch64/cpu.rs
+++ b/03_hacky_hello_world/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 //!
diff --git a/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.rs b/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.rs
index 8390c0132..2a6c46492 100644
--- a/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.rs
+++ b/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/03_hacky_hello_world/src/bsp.rs b/03_hacky_hello_world/src/bsp.rs
index a09ba8a45..b128add9b 100644
--- a/03_hacky_hello_world/src/bsp.rs
+++ b/03_hacky_hello_world/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/03_hacky_hello_world/src/bsp/raspberrypi.rs b/03_hacky_hello_world/src/bsp/raspberrypi.rs
index 6688a5146..919d7e793 100644
--- a/03_hacky_hello_world/src/bsp/raspberrypi.rs
+++ b/03_hacky_hello_world/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/03_hacky_hello_world/src/bsp/raspberrypi/console.rs b/03_hacky_hello_world/src/bsp/raspberrypi/console.rs
index 4cdf53ee6..49d293703 100644
--- a/03_hacky_hello_world/src/bsp/raspberrypi/console.rs
+++ b/03_hacky_hello_world/src/bsp/raspberrypi/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP console facilities.
 
diff --git a/03_hacky_hello_world/src/bsp/raspberrypi/cpu.rs b/03_hacky_hello_world/src/bsp/raspberrypi/cpu.rs
index 85fb89e49..65cf5abbe 100644
--- a/03_hacky_hello_world/src/bsp/raspberrypi/cpu.rs
+++ b/03_hacky_hello_world/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/03_hacky_hello_world/src/console.rs b/03_hacky_hello_world/src/console.rs
index 7d940f293..8b094dda6 100644
--- a/03_hacky_hello_world/src/console.rs
+++ b/03_hacky_hello_world/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/03_hacky_hello_world/src/cpu.rs b/03_hacky_hello_world/src/cpu.rs
index b2a960103..13b89581f 100644
--- a/03_hacky_hello_world/src/cpu.rs
+++ b/03_hacky_hello_world/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/03_hacky_hello_world/src/cpu/boot.rs b/03_hacky_hello_world/src/cpu/boot.rs
index 8091dac36..b1e98328a 100644
--- a/03_hacky_hello_world/src/cpu/boot.rs
+++ b/03_hacky_hello_world/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/03_hacky_hello_world/src/main.rs b/03_hacky_hello_world/src/main.rs
index 74b621de3..a38495a2b 100644
--- a/03_hacky_hello_world/src/main.rs
+++ b/03_hacky_hello_world/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(
diff --git a/03_hacky_hello_world/src/panic_wait.rs b/03_hacky_hello_world/src/panic_wait.rs
index fb30e8d4c..5bb0896e4 100644
--- a/03_hacky_hello_world/src/panic_wait.rs
+++ b/03_hacky_hello_world/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/03_hacky_hello_world/src/print.rs b/03_hacky_hello_world/src/print.rs
index 05ef2aeaf..4e8c9b375 100644
--- a/03_hacky_hello_world/src/print.rs
+++ b/03_hacky_hello_world/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing.
 
diff --git a/04_safe_globals/.vscode/settings.json b/04_safe_globals/.vscode/settings.json
index d1916456a..bfa278e9a 100644
--- a/04_safe_globals/.vscode/settings.json
+++ b/04_safe_globals/.vscode/settings.json
@@ -1,10 +1,10 @@
 {
-  "editor.formatOnSave": true,
-  "editor.rulers": [100],
-  "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.allTargets": false,
-  "rust-analyzer.checkOnSave.extraArgs": ["--bins"],
-  "rust-analyzer.lens.debug": false,
-  "rust-analyzer.lens.run": false
+    "editor.formatOnSave": true,
+    "editor.rulers": [100],
+    "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
+    "rust-analyzer.cargo.features": ["bsp_rpi3"],
+    "rust-analyzer.checkOnSave.allTargets": false,
+    "rust-analyzer.checkOnSave.extraArgs": ["--bins"],
+    "rust-analyzer.lens.debug": false,
+    "rust-analyzer.lens.run": false
 }
diff --git a/04_safe_globals/Makefile b/04_safe_globals/Makefile
index 13dba46ce..ce5aff099 100644
--- a/04_safe_globals/Makefile
+++ b/04_safe_globals/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/docker.mk
 include ../common/format.mk
diff --git a/04_safe_globals/README.md b/04_safe_globals/README.md
index b34c04f99..6418ef5bc 100644
--- a/04_safe_globals/README.md
+++ b/04_safe_globals/README.md
@@ -287,7 +287,7 @@ diff -uNr 03_hacky_hello_world/src/synchronization.rs 04_safe_globals/src/synchr
 @@ -0,0 +1,77 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Synchronization primitives.
 +//!
diff --git a/04_safe_globals/src/_arch/aarch64/cpu.rs b/04_safe_globals/src/_arch/aarch64/cpu.rs
index 7872f85fc..11d5024e8 100644
--- a/04_safe_globals/src/_arch/aarch64/cpu.rs
+++ b/04_safe_globals/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 //!
diff --git a/04_safe_globals/src/_arch/aarch64/cpu/boot.rs b/04_safe_globals/src/_arch/aarch64/cpu/boot.rs
index 8390c0132..2a6c46492 100644
--- a/04_safe_globals/src/_arch/aarch64/cpu/boot.rs
+++ b/04_safe_globals/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/04_safe_globals/src/bsp.rs b/04_safe_globals/src/bsp.rs
index a09ba8a45..b128add9b 100644
--- a/04_safe_globals/src/bsp.rs
+++ b/04_safe_globals/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/04_safe_globals/src/bsp/raspberrypi.rs b/04_safe_globals/src/bsp/raspberrypi.rs
index 6688a5146..919d7e793 100644
--- a/04_safe_globals/src/bsp/raspberrypi.rs
+++ b/04_safe_globals/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/04_safe_globals/src/bsp/raspberrypi/console.rs b/04_safe_globals/src/bsp/raspberrypi/console.rs
index 6427e0994..753cbcb6f 100644
--- a/04_safe_globals/src/bsp/raspberrypi/console.rs
+++ b/04_safe_globals/src/bsp/raspberrypi/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP console facilities.
 
diff --git a/04_safe_globals/src/bsp/raspberrypi/cpu.rs b/04_safe_globals/src/bsp/raspberrypi/cpu.rs
index 85fb89e49..65cf5abbe 100644
--- a/04_safe_globals/src/bsp/raspberrypi/cpu.rs
+++ b/04_safe_globals/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/04_safe_globals/src/console.rs b/04_safe_globals/src/console.rs
index 94e00f845..d41c95a16 100644
--- a/04_safe_globals/src/console.rs
+++ b/04_safe_globals/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/04_safe_globals/src/cpu.rs b/04_safe_globals/src/cpu.rs
index b2a960103..13b89581f 100644
--- a/04_safe_globals/src/cpu.rs
+++ b/04_safe_globals/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/04_safe_globals/src/cpu/boot.rs b/04_safe_globals/src/cpu/boot.rs
index 8091dac36..b1e98328a 100644
--- a/04_safe_globals/src/cpu/boot.rs
+++ b/04_safe_globals/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/04_safe_globals/src/main.rs b/04_safe_globals/src/main.rs
index 4726477d9..4c5a7e0d5 100644
--- a/04_safe_globals/src/main.rs
+++ b/04_safe_globals/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(
diff --git a/04_safe_globals/src/panic_wait.rs b/04_safe_globals/src/panic_wait.rs
index fb30e8d4c..5bb0896e4 100644
--- a/04_safe_globals/src/panic_wait.rs
+++ b/04_safe_globals/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/04_safe_globals/src/print.rs b/04_safe_globals/src/print.rs
index f69bad44d..6de99572d 100644
--- a/04_safe_globals/src/print.rs
+++ b/04_safe_globals/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing.
 
diff --git a/04_safe_globals/src/synchronization.rs b/04_safe_globals/src/synchronization.rs
index d3937b0de..94c83de1c 100644
--- a/04_safe_globals/src/synchronization.rs
+++ b/04_safe_globals/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/05_drivers_gpio_uart/.vscode/settings.json b/05_drivers_gpio_uart/.vscode/settings.json
index d1916456a..bfa278e9a 100644
--- a/05_drivers_gpio_uart/.vscode/settings.json
+++ b/05_drivers_gpio_uart/.vscode/settings.json
@@ -1,10 +1,10 @@
 {
-  "editor.formatOnSave": true,
-  "editor.rulers": [100],
-  "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.allTargets": false,
-  "rust-analyzer.checkOnSave.extraArgs": ["--bins"],
-  "rust-analyzer.lens.debug": false,
-  "rust-analyzer.lens.run": false
+    "editor.formatOnSave": true,
+    "editor.rulers": [100],
+    "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
+    "rust-analyzer.cargo.features": ["bsp_rpi3"],
+    "rust-analyzer.checkOnSave.allTargets": false,
+    "rust-analyzer.checkOnSave.extraArgs": ["--bins"],
+    "rust-analyzer.lens.debug": false,
+    "rust-analyzer.lens.run": false
 }
diff --git a/05_drivers_gpio_uart/Makefile b/05_drivers_gpio_uart/Makefile
index a8c4821af..f5135d1ed 100644
--- a/05_drivers_gpio_uart/Makefile
+++ b/05_drivers_gpio_uart/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/docker.mk
 include ../common/format.mk
@@ -150,7 +150,7 @@ $(KERNEL_BIN): $(KERNEL_ELF)
 
 ##------------------------------------------------------------------------------
 ## Generate the documentation
-##------------------------------------------------------------------------------
+##-----------------------------------------------------------------------------
 doc:
 	$(call color_header, "Generating docs")
 	@$(DOC_CMD) --document-private-items --open
diff --git a/05_drivers_gpio_uart/README.md b/05_drivers_gpio_uart/README.md
index 563af1a73..e6e5dd648 100644
--- a/05_drivers_gpio_uart/README.md
+++ b/05_drivers_gpio_uart/README.md
@@ -278,7 +278,7 @@ diff -uNr 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 05_drivers_g
 @@ -0,0 +1,228 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! GPIO Driver.
 +
@@ -511,7 +511,7 @@ diff -uNr 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 05_dri
 @@ -0,0 +1,407 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! PL011 UART driver.
 +//!
@@ -923,7 +923,7 @@ diff -uNr 04_safe_globals/src/bsp/device_driver/bcm.rs 05_drivers_gpio_uart/src/
 @@ -0,0 +1,11 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! BCM driver top level.
 +
@@ -939,7 +939,7 @@ diff -uNr 04_safe_globals/src/bsp/device_driver/common.rs 05_drivers_gpio_uart/s
 @@ -0,0 +1,38 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Common device driver code.
 +
@@ -982,7 +982,7 @@ diff -uNr 04_safe_globals/src/bsp/device_driver.rs 05_drivers_gpio_uart/src/bsp/
 @@ -0,0 +1,12 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Device driver.
 +
@@ -1121,7 +1121,7 @@ diff -uNr 04_safe_globals/src/bsp/raspberrypi/driver.rs 05_drivers_gpio_uart/src
 @@ -0,0 +1,71 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! BSP driver support.
 +
@@ -1197,7 +1197,7 @@ diff -uNr 04_safe_globals/src/bsp/raspberrypi/memory.rs 05_drivers_gpio_uart/src
 @@ -0,0 +1,37 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! BSP Memory Management.
 +
@@ -1281,7 +1281,7 @@ diff -uNr 04_safe_globals/src/console/null_console.rs 05_drivers_gpio_uart/src/c
 @@ -0,0 +1,41 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Null console.
 +
@@ -1422,7 +1422,7 @@ diff -uNr 04_safe_globals/src/driver.rs 05_drivers_gpio_uart/src/driver.rs
 @@ -0,0 +1,167 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Driver support.
 +
diff --git a/05_drivers_gpio_uart/src/_arch/aarch64/cpu.rs b/05_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
index 2431d2d25..f1f1e9aff 100644
--- a/05_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
+++ b/05_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 //!
diff --git a/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs b/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs
index 8390c0132..2a6c46492 100644
--- a/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs
+++ b/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/05_drivers_gpio_uart/src/bsp.rs b/05_drivers_gpio_uart/src/bsp.rs
index 824787f65..246973bc0 100644
--- a/05_drivers_gpio_uart/src/bsp.rs
+++ b/05_drivers_gpio_uart/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/05_drivers_gpio_uart/src/bsp/device_driver.rs b/05_drivers_gpio_uart/src/bsp/device_driver.rs
index 6e9bf8f39..64049a4cf 100644
--- a/05_drivers_gpio_uart/src/bsp/device_driver.rs
+++ b/05_drivers_gpio_uart/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/05_drivers_gpio_uart/src/bsp/device_driver/bcm.rs b/05_drivers_gpio_uart/src/bsp/device_driver/bcm.rs
index b4b7906e5..1c343d1d7 100644
--- a/05_drivers_gpio_uart/src/bsp/device_driver/bcm.rs
+++ b/05_drivers_gpio_uart/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 0601d58e6..920b4c00c 100644
--- a/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index b034e92e5..d92612ea8 100644
--- a/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 //!
diff --git a/05_drivers_gpio_uart/src/bsp/device_driver/common.rs b/05_drivers_gpio_uart/src/bsp/device_driver/common.rs
index fd9e988ea..dfe7d8ef3 100644
--- a/05_drivers_gpio_uart/src/bsp/device_driver/common.rs
+++ b/05_drivers_gpio_uart/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/05_drivers_gpio_uart/src/bsp/raspberrypi.rs b/05_drivers_gpio_uart/src/bsp/raspberrypi.rs
index fe9406779..3ea864dc7 100644
--- a/05_drivers_gpio_uart/src/bsp/raspberrypi.rs
+++ b/05_drivers_gpio_uart/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/05_drivers_gpio_uart/src/bsp/raspberrypi/console.rs b/05_drivers_gpio_uart/src/bsp/raspberrypi/console.rs
index 0a630eef4..0d585229e 100644
--- a/05_drivers_gpio_uart/src/bsp/raspberrypi/console.rs
+++ b/05_drivers_gpio_uart/src/bsp/raspberrypi/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP console facilities.
 
diff --git a/05_drivers_gpio_uart/src/bsp/raspberrypi/cpu.rs b/05_drivers_gpio_uart/src/bsp/raspberrypi/cpu.rs
index 85fb89e49..65cf5abbe 100644
--- a/05_drivers_gpio_uart/src/bsp/raspberrypi/cpu.rs
+++ b/05_drivers_gpio_uart/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/05_drivers_gpio_uart/src/bsp/raspberrypi/driver.rs b/05_drivers_gpio_uart/src/bsp/raspberrypi/driver.rs
index ea8430660..2a80ee2c5 100644
--- a/05_drivers_gpio_uart/src/bsp/raspberrypi/driver.rs
+++ b/05_drivers_gpio_uart/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/05_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs b/05_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
index 27be8590e..cdca14b8a 100644
--- a/05_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
+++ b/05_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 
diff --git a/05_drivers_gpio_uart/src/console.rs b/05_drivers_gpio_uart/src/console.rs
index 02b43df9f..a83f86fe0 100644
--- a/05_drivers_gpio_uart/src/console.rs
+++ b/05_drivers_gpio_uart/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/05_drivers_gpio_uart/src/console/null_console.rs b/05_drivers_gpio_uart/src/console/null_console.rs
index 2c64d499c..e92a022b6 100644
--- a/05_drivers_gpio_uart/src/console/null_console.rs
+++ b/05_drivers_gpio_uart/src/console/null_console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Null console.
 
diff --git a/05_drivers_gpio_uart/src/cpu.rs b/05_drivers_gpio_uart/src/cpu.rs
index 6ccee4562..eacb8924a 100644
--- a/05_drivers_gpio_uart/src/cpu.rs
+++ b/05_drivers_gpio_uart/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/05_drivers_gpio_uart/src/cpu/boot.rs b/05_drivers_gpio_uart/src/cpu/boot.rs
index 8091dac36..b1e98328a 100644
--- a/05_drivers_gpio_uart/src/cpu/boot.rs
+++ b/05_drivers_gpio_uart/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/05_drivers_gpio_uart/src/driver.rs b/05_drivers_gpio_uart/src/driver.rs
index e324ecf8f..feef34e20 100644
--- a/05_drivers_gpio_uart/src/driver.rs
+++ b/05_drivers_gpio_uart/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/05_drivers_gpio_uart/src/main.rs b/05_drivers_gpio_uart/src/main.rs
index 9d1582380..11d342ce4 100644
--- a/05_drivers_gpio_uart/src/main.rs
+++ b/05_drivers_gpio_uart/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(
diff --git a/05_drivers_gpio_uart/src/panic_wait.rs b/05_drivers_gpio_uart/src/panic_wait.rs
index fb30e8d4c..5bb0896e4 100644
--- a/05_drivers_gpio_uart/src/panic_wait.rs
+++ b/05_drivers_gpio_uart/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/05_drivers_gpio_uart/src/print.rs b/05_drivers_gpio_uart/src/print.rs
index f69bad44d..6de99572d 100644
--- a/05_drivers_gpio_uart/src/print.rs
+++ b/05_drivers_gpio_uart/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing.
 
diff --git a/05_drivers_gpio_uart/src/synchronization.rs b/05_drivers_gpio_uart/src/synchronization.rs
index d3937b0de..94c83de1c 100644
--- a/05_drivers_gpio_uart/src/synchronization.rs
+++ b/05_drivers_gpio_uart/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/06_uart_chainloader/.vscode/settings.json b/06_uart_chainloader/.vscode/settings.json
index d1916456a..bfa278e9a 100644
--- a/06_uart_chainloader/.vscode/settings.json
+++ b/06_uart_chainloader/.vscode/settings.json
@@ -1,10 +1,10 @@
 {
-  "editor.formatOnSave": true,
-  "editor.rulers": [100],
-  "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.allTargets": false,
-  "rust-analyzer.checkOnSave.extraArgs": ["--bins"],
-  "rust-analyzer.lens.debug": false,
-  "rust-analyzer.lens.run": false
+    "editor.formatOnSave": true,
+    "editor.rulers": [100],
+    "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
+    "rust-analyzer.cargo.features": ["bsp_rpi3"],
+    "rust-analyzer.checkOnSave.allTargets": false,
+    "rust-analyzer.checkOnSave.extraArgs": ["--bins"],
+    "rust-analyzer.lens.debug": false,
+    "rust-analyzer.lens.run": false
 }
diff --git a/06_uart_chainloader/Makefile b/06_uart_chainloader/Makefile
index b619b4ca3..3366de31d 100644
--- a/06_uart_chainloader/Makefile
+++ b/06_uart_chainloader/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/docker.mk
 include ../common/format.mk
diff --git a/06_uart_chainloader/README.md b/06_uart_chainloader/README.md
index 95b951492..5e4efe25d 100644
--- a/06_uart_chainloader/README.md
+++ b/06_uart_chainloader/README.md
@@ -237,7 +237,6 @@ diff -uNr 05_drivers_gpio_uart/Makefile 06_uart_chainloader/Makefile
 +	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN) -d in_asm
 +
  endif
-
  ##------------------------------------------------------------------------------
 -## Connect to the target's serial
 +## Push the kernel to the real HW target
@@ -375,7 +374,7 @@ diff -uNr 05_drivers_gpio_uart/src/bsp/raspberrypi/console.rs 06_uart_chainloade
 @@ -1,16 +0,0 @@
 -// SPDX-License-Identifier: MIT OR Apache-2.0
 -//
--// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+-// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 -
 -//! BSP console facilities.
 -
@@ -394,7 +393,7 @@ diff -uNr 05_drivers_gpio_uart/src/bsp/raspberrypi/kernel.ld 06_uart_chainloader
 --- 05_drivers_gpio_uart/src/bsp/raspberrypi/kernel.ld
 +++ 06_uart_chainloader/src/bsp/raspberrypi/kernel.ld
 @@ -3,8 +3,6 @@
-  * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+  * Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
   */
 
 -__rpi_phys_dram_start_addr = 0;
@@ -580,7 +579,7 @@ diff -uNr 05_drivers_gpio_uart/tests/chainboot_test.rb 06_uart_chainloader/tests
 +
 +# SPDX-License-Identifier: MIT OR Apache-2.0
 +#
-+# Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
++# Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +require_relative '../../common/serial/minipush'
 +require_relative '../../common/tests/boot_test'
diff --git a/06_uart_chainloader/src/_arch/aarch64/cpu.rs b/06_uart_chainloader/src/_arch/aarch64/cpu.rs
index 2431d2d25..f1f1e9aff 100644
--- a/06_uart_chainloader/src/_arch/aarch64/cpu.rs
+++ b/06_uart_chainloader/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 //!
diff --git a/06_uart_chainloader/src/_arch/aarch64/cpu/boot.rs b/06_uart_chainloader/src/_arch/aarch64/cpu/boot.rs
index 8390c0132..2a6c46492 100644
--- a/06_uart_chainloader/src/_arch/aarch64/cpu/boot.rs
+++ b/06_uart_chainloader/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/06_uart_chainloader/src/bsp.rs b/06_uart_chainloader/src/bsp.rs
index 824787f65..246973bc0 100644
--- a/06_uart_chainloader/src/bsp.rs
+++ b/06_uart_chainloader/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/06_uart_chainloader/src/bsp/device_driver.rs b/06_uart_chainloader/src/bsp/device_driver.rs
index 6e9bf8f39..64049a4cf 100644
--- a/06_uart_chainloader/src/bsp/device_driver.rs
+++ b/06_uart_chainloader/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/06_uart_chainloader/src/bsp/device_driver/bcm.rs b/06_uart_chainloader/src/bsp/device_driver/bcm.rs
index b4b7906e5..1c343d1d7 100644
--- a/06_uart_chainloader/src/bsp/device_driver/bcm.rs
+++ b/06_uart_chainloader/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 0601d58e6..920b4c00c 100644
--- a/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index df56d7c4d..50a069ea1 100644
--- a/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 //!
diff --git a/06_uart_chainloader/src/bsp/device_driver/common.rs b/06_uart_chainloader/src/bsp/device_driver/common.rs
index fd9e988ea..dfe7d8ef3 100644
--- a/06_uart_chainloader/src/bsp/device_driver/common.rs
+++ b/06_uart_chainloader/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/06_uart_chainloader/src/bsp/raspberrypi.rs b/06_uart_chainloader/src/bsp/raspberrypi.rs
index fe9406779..3ea864dc7 100644
--- a/06_uart_chainloader/src/bsp/raspberrypi.rs
+++ b/06_uart_chainloader/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/06_uart_chainloader/src/bsp/raspberrypi/cpu.rs b/06_uart_chainloader/src/bsp/raspberrypi/cpu.rs
index 85fb89e49..65cf5abbe 100644
--- a/06_uart_chainloader/src/bsp/raspberrypi/cpu.rs
+++ b/06_uart_chainloader/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/06_uart_chainloader/src/bsp/raspberrypi/driver.rs b/06_uart_chainloader/src/bsp/raspberrypi/driver.rs
index ea8430660..2a80ee2c5 100644
--- a/06_uart_chainloader/src/bsp/raspberrypi/driver.rs
+++ b/06_uart_chainloader/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/06_uart_chainloader/src/bsp/raspberrypi/memory.rs b/06_uart_chainloader/src/bsp/raspberrypi/memory.rs
index 6ef46c350..ee72b27a0 100644
--- a/06_uart_chainloader/src/bsp/raspberrypi/memory.rs
+++ b/06_uart_chainloader/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 
diff --git a/06_uart_chainloader/src/console.rs b/06_uart_chainloader/src/console.rs
index 02b43df9f..a83f86fe0 100644
--- a/06_uart_chainloader/src/console.rs
+++ b/06_uart_chainloader/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/06_uart_chainloader/src/console/null_console.rs b/06_uart_chainloader/src/console/null_console.rs
index 2c64d499c..e92a022b6 100644
--- a/06_uart_chainloader/src/console/null_console.rs
+++ b/06_uart_chainloader/src/console/null_console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Null console.
 
diff --git a/06_uart_chainloader/src/cpu.rs b/06_uart_chainloader/src/cpu.rs
index 6ccee4562..eacb8924a 100644
--- a/06_uart_chainloader/src/cpu.rs
+++ b/06_uart_chainloader/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/06_uart_chainloader/src/cpu/boot.rs b/06_uart_chainloader/src/cpu/boot.rs
index 8091dac36..b1e98328a 100644
--- a/06_uart_chainloader/src/cpu/boot.rs
+++ b/06_uart_chainloader/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/06_uart_chainloader/src/driver.rs b/06_uart_chainloader/src/driver.rs
index fb44bbd9d..53592c66b 100644
--- a/06_uart_chainloader/src/driver.rs
+++ b/06_uart_chainloader/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/06_uart_chainloader/src/main.rs b/06_uart_chainloader/src/main.rs
index bef628225..dd82ec3fd 100644
--- a/06_uart_chainloader/src/main.rs
+++ b/06_uart_chainloader/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(
diff --git a/06_uart_chainloader/src/panic_wait.rs b/06_uart_chainloader/src/panic_wait.rs
index fb30e8d4c..5bb0896e4 100644
--- a/06_uart_chainloader/src/panic_wait.rs
+++ b/06_uart_chainloader/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/06_uart_chainloader/src/print.rs b/06_uart_chainloader/src/print.rs
index f69bad44d..6de99572d 100644
--- a/06_uart_chainloader/src/print.rs
+++ b/06_uart_chainloader/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing.
 
diff --git a/06_uart_chainloader/src/synchronization.rs b/06_uart_chainloader/src/synchronization.rs
index d3937b0de..94c83de1c 100644
--- a/06_uart_chainloader/src/synchronization.rs
+++ b/06_uart_chainloader/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/06_uart_chainloader/tests/chainboot_test.rb b/06_uart_chainloader/tests/chainboot_test.rb
index 560997404..00de42a36 100644
--- a/06_uart_chainloader/tests/chainboot_test.rb
+++ b/06_uart_chainloader/tests/chainboot_test.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require_relative '../../common/serial/minipush'
 require_relative '../../common/tests/boot_test'
@@ -69,9 +69,9 @@ def finish
     end
 end
 
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 ## Execution starts here
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 payload_path = ARGV.pop
 qemu_cmd = ARGV.join(' ')
 
diff --git a/07_timestamps/.vscode/settings.json b/07_timestamps/.vscode/settings.json
index d1916456a..bfa278e9a 100644
--- a/07_timestamps/.vscode/settings.json
+++ b/07_timestamps/.vscode/settings.json
@@ -1,10 +1,10 @@
 {
-  "editor.formatOnSave": true,
-  "editor.rulers": [100],
-  "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.allTargets": false,
-  "rust-analyzer.checkOnSave.extraArgs": ["--bins"],
-  "rust-analyzer.lens.debug": false,
-  "rust-analyzer.lens.run": false
+    "editor.formatOnSave": true,
+    "editor.rulers": [100],
+    "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
+    "rust-analyzer.cargo.features": ["bsp_rpi3"],
+    "rust-analyzer.checkOnSave.allTargets": false,
+    "rust-analyzer.checkOnSave.extraArgs": ["--bins"],
+    "rust-analyzer.lens.debug": false,
+    "rust-analyzer.lens.run": false
 }
diff --git a/07_timestamps/Makefile b/07_timestamps/Makefile
index 23de6557b..b13f0dfb7 100644
--- a/07_timestamps/Makefile
+++ b/07_timestamps/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/docker.mk
 include ../common/format.mk
diff --git a/07_timestamps/README.md b/07_timestamps/README.md
index afa75ad9d..af44e8cc2 100644
--- a/07_timestamps/README.md
+++ b/07_timestamps/README.md
@@ -260,7 +260,7 @@ diff -uNr 06_uart_chainloader/src/_arch/aarch64/time.rs 07_timestamps/src/_arch/
 @@ -0,0 +1,162 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Architectural timer primitives.
 +//!
@@ -527,7 +527,7 @@ diff -uNr 06_uart_chainloader/src/bsp/raspberrypi/kernel.ld 07_timestamps/src/bs
 --- 06_uart_chainloader/src/bsp/raspberrypi/kernel.ld
 +++ 07_timestamps/src/bsp/raspberrypi/kernel.ld
 @@ -3,6 +3,8 @@
-  * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+  * Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
   */
 
 +__rpi_phys_dram_start_addr = 0;
@@ -822,7 +822,7 @@ diff -uNr 06_uart_chainloader/src/time.rs 07_timestamps/src/time.rs
 @@ -0,0 +1,57 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Timer primitives.
 +
@@ -894,7 +894,7 @@ diff -uNr 06_uart_chainloader/tests/chainboot_test.rb 07_timestamps/tests/chainb
 -
 -# SPDX-License-Identifier: MIT OR Apache-2.0
 -#
--# Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+-# Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 -
 -require_relative '../../common/serial/minipush'
 -require_relative '../../common/tests/boot_test'
diff --git a/07_timestamps/src/_arch/aarch64/cpu.rs b/07_timestamps/src/_arch/aarch64/cpu.rs
index bbe7687ae..602c9789c 100644
--- a/07_timestamps/src/_arch/aarch64/cpu.rs
+++ b/07_timestamps/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 //!
diff --git a/07_timestamps/src/_arch/aarch64/cpu/boot.rs b/07_timestamps/src/_arch/aarch64/cpu/boot.rs
index 8390c0132..2a6c46492 100644
--- a/07_timestamps/src/_arch/aarch64/cpu/boot.rs
+++ b/07_timestamps/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/07_timestamps/src/_arch/aarch64/time.rs b/07_timestamps/src/_arch/aarch64/time.rs
index 94d023795..ee1c3ef72 100644
--- a/07_timestamps/src/_arch/aarch64/time.rs
+++ b/07_timestamps/src/_arch/aarch64/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
 //!
diff --git a/07_timestamps/src/bsp.rs b/07_timestamps/src/bsp.rs
index 824787f65..246973bc0 100644
--- a/07_timestamps/src/bsp.rs
+++ b/07_timestamps/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/07_timestamps/src/bsp/device_driver.rs b/07_timestamps/src/bsp/device_driver.rs
index 6e9bf8f39..64049a4cf 100644
--- a/07_timestamps/src/bsp/device_driver.rs
+++ b/07_timestamps/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/07_timestamps/src/bsp/device_driver/bcm.rs b/07_timestamps/src/bsp/device_driver/bcm.rs
index b4b7906e5..1c343d1d7 100644
--- a/07_timestamps/src/bsp/device_driver/bcm.rs
+++ b/07_timestamps/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 24e537cff..8e57dfedb 100644
--- a/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index b034e92e5..d92612ea8 100644
--- a/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 //!
diff --git a/07_timestamps/src/bsp/device_driver/common.rs b/07_timestamps/src/bsp/device_driver/common.rs
index fd9e988ea..dfe7d8ef3 100644
--- a/07_timestamps/src/bsp/device_driver/common.rs
+++ b/07_timestamps/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/07_timestamps/src/bsp/raspberrypi.rs b/07_timestamps/src/bsp/raspberrypi.rs
index fe9406779..3ea864dc7 100644
--- a/07_timestamps/src/bsp/raspberrypi.rs
+++ b/07_timestamps/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/07_timestamps/src/bsp/raspberrypi/cpu.rs b/07_timestamps/src/bsp/raspberrypi/cpu.rs
index 85fb89e49..65cf5abbe 100644
--- a/07_timestamps/src/bsp/raspberrypi/cpu.rs
+++ b/07_timestamps/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/07_timestamps/src/bsp/raspberrypi/driver.rs b/07_timestamps/src/bsp/raspberrypi/driver.rs
index 4a42b84f7..7716fe3f7 100644
--- a/07_timestamps/src/bsp/raspberrypi/driver.rs
+++ b/07_timestamps/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/07_timestamps/src/bsp/raspberrypi/memory.rs b/07_timestamps/src/bsp/raspberrypi/memory.rs
index 27be8590e..cdca14b8a 100644
--- a/07_timestamps/src/bsp/raspberrypi/memory.rs
+++ b/07_timestamps/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 
diff --git a/07_timestamps/src/console.rs b/07_timestamps/src/console.rs
index 02b43df9f..a83f86fe0 100644
--- a/07_timestamps/src/console.rs
+++ b/07_timestamps/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/07_timestamps/src/console/null_console.rs b/07_timestamps/src/console/null_console.rs
index 2c64d499c..e92a022b6 100644
--- a/07_timestamps/src/console/null_console.rs
+++ b/07_timestamps/src/console/null_console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Null console.
 
diff --git a/07_timestamps/src/cpu.rs b/07_timestamps/src/cpu.rs
index 62503fb40..67ab79c08 100644
--- a/07_timestamps/src/cpu.rs
+++ b/07_timestamps/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/07_timestamps/src/cpu/boot.rs b/07_timestamps/src/cpu/boot.rs
index 8091dac36..b1e98328a 100644
--- a/07_timestamps/src/cpu/boot.rs
+++ b/07_timestamps/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/07_timestamps/src/driver.rs b/07_timestamps/src/driver.rs
index a798c86da..050e7022f 100644
--- a/07_timestamps/src/driver.rs
+++ b/07_timestamps/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/07_timestamps/src/main.rs b/07_timestamps/src/main.rs
index df863f324..b094dacc5 100644
--- a/07_timestamps/src/main.rs
+++ b/07_timestamps/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(
diff --git a/07_timestamps/src/panic_wait.rs b/07_timestamps/src/panic_wait.rs
index ccf54f61f..5776aca87 100644
--- a/07_timestamps/src/panic_wait.rs
+++ b/07_timestamps/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/07_timestamps/src/print.rs b/07_timestamps/src/print.rs
index fe13b334c..8e3030466 100644
--- a/07_timestamps/src/print.rs
+++ b/07_timestamps/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing.
 
diff --git a/07_timestamps/src/synchronization.rs b/07_timestamps/src/synchronization.rs
index d3937b0de..94c83de1c 100644
--- a/07_timestamps/src/synchronization.rs
+++ b/07_timestamps/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/07_timestamps/src/time.rs b/07_timestamps/src/time.rs
index a6c0c5b6b..a9d501204 100644
--- a/07_timestamps/src/time.rs
+++ b/07_timestamps/src/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer primitives.
 
diff --git a/08_hw_debug_JTAG/.vscode/settings.json b/08_hw_debug_JTAG/.vscode/settings.json
index d1916456a..bfa278e9a 100644
--- a/08_hw_debug_JTAG/.vscode/settings.json
+++ b/08_hw_debug_JTAG/.vscode/settings.json
@@ -1,10 +1,10 @@
 {
-  "editor.formatOnSave": true,
-  "editor.rulers": [100],
-  "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.allTargets": false,
-  "rust-analyzer.checkOnSave.extraArgs": ["--bins"],
-  "rust-analyzer.lens.debug": false,
-  "rust-analyzer.lens.run": false
+    "editor.formatOnSave": true,
+    "editor.rulers": [100],
+    "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
+    "rust-analyzer.cargo.features": ["bsp_rpi3"],
+    "rust-analyzer.checkOnSave.allTargets": false,
+    "rust-analyzer.checkOnSave.extraArgs": ["--bins"],
+    "rust-analyzer.lens.debug": false,
+    "rust-analyzer.lens.run": false
 }
diff --git a/08_hw_debug_JTAG/Makefile b/08_hw_debug_JTAG/Makefile
index 125f75cb0..9549f0920 100644
--- a/08_hw_debug_JTAG/Makefile
+++ b/08_hw_debug_JTAG/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/docker.mk
 include ../common/format.mk
diff --git a/08_hw_debug_JTAG/src/_arch/aarch64/cpu.rs b/08_hw_debug_JTAG/src/_arch/aarch64/cpu.rs
index bbe7687ae..602c9789c 100644
--- a/08_hw_debug_JTAG/src/_arch/aarch64/cpu.rs
+++ b/08_hw_debug_JTAG/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 //!
diff --git a/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs b/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs
index 8390c0132..2a6c46492 100644
--- a/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs
+++ b/08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/08_hw_debug_JTAG/src/_arch/aarch64/time.rs b/08_hw_debug_JTAG/src/_arch/aarch64/time.rs
index 94d023795..ee1c3ef72 100644
--- a/08_hw_debug_JTAG/src/_arch/aarch64/time.rs
+++ b/08_hw_debug_JTAG/src/_arch/aarch64/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
 //!
diff --git a/08_hw_debug_JTAG/src/bsp.rs b/08_hw_debug_JTAG/src/bsp.rs
index 824787f65..246973bc0 100644
--- a/08_hw_debug_JTAG/src/bsp.rs
+++ b/08_hw_debug_JTAG/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/08_hw_debug_JTAG/src/bsp/device_driver.rs b/08_hw_debug_JTAG/src/bsp/device_driver.rs
index 6e9bf8f39..64049a4cf 100644
--- a/08_hw_debug_JTAG/src/bsp/device_driver.rs
+++ b/08_hw_debug_JTAG/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/08_hw_debug_JTAG/src/bsp/device_driver/bcm.rs b/08_hw_debug_JTAG/src/bsp/device_driver/bcm.rs
index b4b7906e5..1c343d1d7 100644
--- a/08_hw_debug_JTAG/src/bsp/device_driver/bcm.rs
+++ b/08_hw_debug_JTAG/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 24e537cff..8e57dfedb 100644
--- a/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index b034e92e5..d92612ea8 100644
--- a/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/08_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 //!
diff --git a/08_hw_debug_JTAG/src/bsp/device_driver/common.rs b/08_hw_debug_JTAG/src/bsp/device_driver/common.rs
index fd9e988ea..dfe7d8ef3 100644
--- a/08_hw_debug_JTAG/src/bsp/device_driver/common.rs
+++ b/08_hw_debug_JTAG/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/08_hw_debug_JTAG/src/bsp/raspberrypi.rs b/08_hw_debug_JTAG/src/bsp/raspberrypi.rs
index fe9406779..3ea864dc7 100644
--- a/08_hw_debug_JTAG/src/bsp/raspberrypi.rs
+++ b/08_hw_debug_JTAG/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/08_hw_debug_JTAG/src/bsp/raspberrypi/cpu.rs b/08_hw_debug_JTAG/src/bsp/raspberrypi/cpu.rs
index 85fb89e49..65cf5abbe 100644
--- a/08_hw_debug_JTAG/src/bsp/raspberrypi/cpu.rs
+++ b/08_hw_debug_JTAG/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/08_hw_debug_JTAG/src/bsp/raspberrypi/driver.rs b/08_hw_debug_JTAG/src/bsp/raspberrypi/driver.rs
index ea8430660..2a80ee2c5 100644
--- a/08_hw_debug_JTAG/src/bsp/raspberrypi/driver.rs
+++ b/08_hw_debug_JTAG/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/08_hw_debug_JTAG/src/bsp/raspberrypi/memory.rs b/08_hw_debug_JTAG/src/bsp/raspberrypi/memory.rs
index 27be8590e..cdca14b8a 100644
--- a/08_hw_debug_JTAG/src/bsp/raspberrypi/memory.rs
+++ b/08_hw_debug_JTAG/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 
diff --git a/08_hw_debug_JTAG/src/console.rs b/08_hw_debug_JTAG/src/console.rs
index 02b43df9f..a83f86fe0 100644
--- a/08_hw_debug_JTAG/src/console.rs
+++ b/08_hw_debug_JTAG/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/08_hw_debug_JTAG/src/console/null_console.rs b/08_hw_debug_JTAG/src/console/null_console.rs
index 2c64d499c..e92a022b6 100644
--- a/08_hw_debug_JTAG/src/console/null_console.rs
+++ b/08_hw_debug_JTAG/src/console/null_console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Null console.
 
diff --git a/08_hw_debug_JTAG/src/cpu.rs b/08_hw_debug_JTAG/src/cpu.rs
index 62503fb40..67ab79c08 100644
--- a/08_hw_debug_JTAG/src/cpu.rs
+++ b/08_hw_debug_JTAG/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/08_hw_debug_JTAG/src/cpu/boot.rs b/08_hw_debug_JTAG/src/cpu/boot.rs
index 8091dac36..b1e98328a 100644
--- a/08_hw_debug_JTAG/src/cpu/boot.rs
+++ b/08_hw_debug_JTAG/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/08_hw_debug_JTAG/src/driver.rs b/08_hw_debug_JTAG/src/driver.rs
index a798c86da..050e7022f 100644
--- a/08_hw_debug_JTAG/src/driver.rs
+++ b/08_hw_debug_JTAG/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/08_hw_debug_JTAG/src/main.rs b/08_hw_debug_JTAG/src/main.rs
index df863f324..b094dacc5 100644
--- a/08_hw_debug_JTAG/src/main.rs
+++ b/08_hw_debug_JTAG/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(
diff --git a/08_hw_debug_JTAG/src/panic_wait.rs b/08_hw_debug_JTAG/src/panic_wait.rs
index ccf54f61f..5776aca87 100644
--- a/08_hw_debug_JTAG/src/panic_wait.rs
+++ b/08_hw_debug_JTAG/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/08_hw_debug_JTAG/src/print.rs b/08_hw_debug_JTAG/src/print.rs
index fe13b334c..8e3030466 100644
--- a/08_hw_debug_JTAG/src/print.rs
+++ b/08_hw_debug_JTAG/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing.
 
diff --git a/08_hw_debug_JTAG/src/synchronization.rs b/08_hw_debug_JTAG/src/synchronization.rs
index d3937b0de..94c83de1c 100644
--- a/08_hw_debug_JTAG/src/synchronization.rs
+++ b/08_hw_debug_JTAG/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/08_hw_debug_JTAG/src/time.rs b/08_hw_debug_JTAG/src/time.rs
index a6c0c5b6b..a9d501204 100644
--- a/08_hw_debug_JTAG/src/time.rs
+++ b/08_hw_debug_JTAG/src/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer primitives.
 
diff --git a/09_privilege_level/.vscode/settings.json b/09_privilege_level/.vscode/settings.json
index d1916456a..bfa278e9a 100644
--- a/09_privilege_level/.vscode/settings.json
+++ b/09_privilege_level/.vscode/settings.json
@@ -1,10 +1,10 @@
 {
-  "editor.formatOnSave": true,
-  "editor.rulers": [100],
-  "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.allTargets": false,
-  "rust-analyzer.checkOnSave.extraArgs": ["--bins"],
-  "rust-analyzer.lens.debug": false,
-  "rust-analyzer.lens.run": false
+    "editor.formatOnSave": true,
+    "editor.rulers": [100],
+    "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
+    "rust-analyzer.cargo.features": ["bsp_rpi3"],
+    "rust-analyzer.checkOnSave.allTargets": false,
+    "rust-analyzer.checkOnSave.extraArgs": ["--bins"],
+    "rust-analyzer.lens.debug": false,
+    "rust-analyzer.lens.run": false
 }
diff --git a/09_privilege_level/Makefile b/09_privilege_level/Makefile
index 125f75cb0..9549f0920 100644
--- a/09_privilege_level/Makefile
+++ b/09_privilege_level/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/docker.mk
 include ../common/format.mk
diff --git a/09_privilege_level/README.md b/09_privilege_level/README.md
index bb7047003..ca2b920f1 100644
--- a/09_privilege_level/README.md
+++ b/09_privilege_level/README.md
@@ -338,7 +338,7 @@ diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/exception/asynchronous.rs 09_privil
 @@ -0,0 +1,82 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Architectural asynchronous exception handling.
 +//!
@@ -425,7 +425,7 @@ diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/exception.rs 09_privilege_level/src
 @@ -0,0 +1,31 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Architectural synchronous and asynchronous exception handling.
 +//!
@@ -461,7 +461,7 @@ diff -uNr 08_hw_debug_JTAG/src/exception/asynchronous.rs 09_privilege_level/src/
 @@ -0,0 +1,14 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Asynchronous exception handling.
 +
@@ -480,7 +480,7 @@ diff -uNr 08_hw_debug_JTAG/src/exception.rs 09_privilege_level/src/exception.rs
 @@ -0,0 +1,30 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Synchronous and asynchronous exception handling.
 +
diff --git a/09_privilege_level/src/_arch/aarch64/cpu.rs b/09_privilege_level/src/_arch/aarch64/cpu.rs
index bbe7687ae..602c9789c 100644
--- a/09_privilege_level/src/_arch/aarch64/cpu.rs
+++ b/09_privilege_level/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 //!
diff --git a/09_privilege_level/src/_arch/aarch64/cpu/boot.rs b/09_privilege_level/src/_arch/aarch64/cpu/boot.rs
index b458f0db5..c80f3ebbc 100644
--- a/09_privilege_level/src/_arch/aarch64/cpu/boot.rs
+++ b/09_privilege_level/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/09_privilege_level/src/_arch/aarch64/exception.rs b/09_privilege_level/src/_arch/aarch64/exception.rs
index c2b7cea8c..1051af6aa 100644
--- a/09_privilege_level/src/_arch/aarch64/exception.rs
+++ b/09_privilege_level/src/_arch/aarch64/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural synchronous and asynchronous exception handling.
 //!
diff --git a/09_privilege_level/src/_arch/aarch64/exception/asynchronous.rs b/09_privilege_level/src/_arch/aarch64/exception/asynchronous.rs
index 0347dc3f6..65fcad25d 100644
--- a/09_privilege_level/src/_arch/aarch64/exception/asynchronous.rs
+++ b/09_privilege_level/src/_arch/aarch64/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural asynchronous exception handling.
 //!
diff --git a/09_privilege_level/src/_arch/aarch64/time.rs b/09_privilege_level/src/_arch/aarch64/time.rs
index 94d023795..ee1c3ef72 100644
--- a/09_privilege_level/src/_arch/aarch64/time.rs
+++ b/09_privilege_level/src/_arch/aarch64/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
 //!
diff --git a/09_privilege_level/src/bsp.rs b/09_privilege_level/src/bsp.rs
index 824787f65..246973bc0 100644
--- a/09_privilege_level/src/bsp.rs
+++ b/09_privilege_level/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/09_privilege_level/src/bsp/device_driver.rs b/09_privilege_level/src/bsp/device_driver.rs
index 6e9bf8f39..64049a4cf 100644
--- a/09_privilege_level/src/bsp/device_driver.rs
+++ b/09_privilege_level/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/09_privilege_level/src/bsp/device_driver/bcm.rs b/09_privilege_level/src/bsp/device_driver/bcm.rs
index b4b7906e5..1c343d1d7 100644
--- a/09_privilege_level/src/bsp/device_driver/bcm.rs
+++ b/09_privilege_level/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 24e537cff..8e57dfedb 100644
--- a/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index b034e92e5..d92612ea8 100644
--- a/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/09_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 //!
diff --git a/09_privilege_level/src/bsp/device_driver/common.rs b/09_privilege_level/src/bsp/device_driver/common.rs
index fd9e988ea..dfe7d8ef3 100644
--- a/09_privilege_level/src/bsp/device_driver/common.rs
+++ b/09_privilege_level/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/09_privilege_level/src/bsp/raspberrypi.rs b/09_privilege_level/src/bsp/raspberrypi.rs
index fe9406779..3ea864dc7 100644
--- a/09_privilege_level/src/bsp/raspberrypi.rs
+++ b/09_privilege_level/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/09_privilege_level/src/bsp/raspberrypi/cpu.rs b/09_privilege_level/src/bsp/raspberrypi/cpu.rs
index 85fb89e49..65cf5abbe 100644
--- a/09_privilege_level/src/bsp/raspberrypi/cpu.rs
+++ b/09_privilege_level/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/09_privilege_level/src/bsp/raspberrypi/driver.rs b/09_privilege_level/src/bsp/raspberrypi/driver.rs
index ea8430660..2a80ee2c5 100644
--- a/09_privilege_level/src/bsp/raspberrypi/driver.rs
+++ b/09_privilege_level/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/09_privilege_level/src/bsp/raspberrypi/memory.rs b/09_privilege_level/src/bsp/raspberrypi/memory.rs
index 27be8590e..cdca14b8a 100644
--- a/09_privilege_level/src/bsp/raspberrypi/memory.rs
+++ b/09_privilege_level/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 
diff --git a/09_privilege_level/src/console.rs b/09_privilege_level/src/console.rs
index 02b43df9f..a83f86fe0 100644
--- a/09_privilege_level/src/console.rs
+++ b/09_privilege_level/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/09_privilege_level/src/console/null_console.rs b/09_privilege_level/src/console/null_console.rs
index 2c64d499c..e92a022b6 100644
--- a/09_privilege_level/src/console/null_console.rs
+++ b/09_privilege_level/src/console/null_console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Null console.
 
diff --git a/09_privilege_level/src/cpu.rs b/09_privilege_level/src/cpu.rs
index 62503fb40..67ab79c08 100644
--- a/09_privilege_level/src/cpu.rs
+++ b/09_privilege_level/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/09_privilege_level/src/cpu/boot.rs b/09_privilege_level/src/cpu/boot.rs
index 8091dac36..b1e98328a 100644
--- a/09_privilege_level/src/cpu/boot.rs
+++ b/09_privilege_level/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/09_privilege_level/src/driver.rs b/09_privilege_level/src/driver.rs
index a798c86da..050e7022f 100644
--- a/09_privilege_level/src/driver.rs
+++ b/09_privilege_level/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/09_privilege_level/src/exception.rs b/09_privilege_level/src/exception.rs
index d5f2e68e1..45760391e 100644
--- a/09_privilege_level/src/exception.rs
+++ b/09_privilege_level/src/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronous and asynchronous exception handling.
 
diff --git a/09_privilege_level/src/exception/asynchronous.rs b/09_privilege_level/src/exception/asynchronous.rs
index bad857790..fd059326e 100644
--- a/09_privilege_level/src/exception/asynchronous.rs
+++ b/09_privilege_level/src/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Asynchronous exception handling.
 
diff --git a/09_privilege_level/src/main.rs b/09_privilege_level/src/main.rs
index c60aee8e1..cc0e1dfd7 100644
--- a/09_privilege_level/src/main.rs
+++ b/09_privilege_level/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(
diff --git a/09_privilege_level/src/panic_wait.rs b/09_privilege_level/src/panic_wait.rs
index ccf54f61f..5776aca87 100644
--- a/09_privilege_level/src/panic_wait.rs
+++ b/09_privilege_level/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/09_privilege_level/src/print.rs b/09_privilege_level/src/print.rs
index fe13b334c..8e3030466 100644
--- a/09_privilege_level/src/print.rs
+++ b/09_privilege_level/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing.
 
diff --git a/09_privilege_level/src/synchronization.rs b/09_privilege_level/src/synchronization.rs
index d3937b0de..94c83de1c 100644
--- a/09_privilege_level/src/synchronization.rs
+++ b/09_privilege_level/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/09_privilege_level/src/time.rs b/09_privilege_level/src/time.rs
index a6c0c5b6b..a9d501204 100644
--- a/09_privilege_level/src/time.rs
+++ b/09_privilege_level/src/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer primitives.
 
diff --git a/10_virtual_mem_part1_identity_mapping/.vscode/settings.json b/10_virtual_mem_part1_identity_mapping/.vscode/settings.json
index d1916456a..bfa278e9a 100644
--- a/10_virtual_mem_part1_identity_mapping/.vscode/settings.json
+++ b/10_virtual_mem_part1_identity_mapping/.vscode/settings.json
@@ -1,10 +1,10 @@
 {
-  "editor.formatOnSave": true,
-  "editor.rulers": [100],
-  "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.allTargets": false,
-  "rust-analyzer.checkOnSave.extraArgs": ["--bins"],
-  "rust-analyzer.lens.debug": false,
-  "rust-analyzer.lens.run": false
+    "editor.formatOnSave": true,
+    "editor.rulers": [100],
+    "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
+    "rust-analyzer.cargo.features": ["bsp_rpi3"],
+    "rust-analyzer.checkOnSave.allTargets": false,
+    "rust-analyzer.checkOnSave.extraArgs": ["--bins"],
+    "rust-analyzer.lens.debug": false,
+    "rust-analyzer.lens.run": false
 }
diff --git a/10_virtual_mem_part1_identity_mapping/Makefile b/10_virtual_mem_part1_identity_mapping/Makefile
index 125f75cb0..9549f0920 100644
--- a/10_virtual_mem_part1_identity_mapping/Makefile
+++ b/10_virtual_mem_part1_identity_mapping/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/docker.mk
 include ../common/format.mk
diff --git a/10_virtual_mem_part1_identity_mapping/README.md b/10_virtual_mem_part1_identity_mapping/README.md
index 36c37c79c..498ef1116 100644
--- a/10_virtual_mem_part1_identity_mapping/README.md
+++ b/10_virtual_mem_part1_identity_mapping/README.md
@@ -367,7 +367,7 @@ diff -uNr 09_privilege_level/src/_arch/aarch64/memory/mmu/translation_table.rs 1
 @@ -0,0 +1,292 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Architectural translation table.
 +//!
@@ -664,7 +664,7 @@ diff -uNr 09_privilege_level/src/_arch/aarch64/memory/mmu.rs 10_virtual_mem_part
 @@ -0,0 +1,165 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Memory Management Unit Driver.
 +//!
@@ -832,7 +832,7 @@ diff -uNr 09_privilege_level/src/bsp/raspberrypi/kernel.ld 10_virtual_mem_part1_
 --- 09_privilege_level/src/bsp/raspberrypi/kernel.ld
 +++ 10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/kernel.ld
 @@ -3,6 +3,9 @@
-  * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+  * Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
   */
 
 +PAGE_SIZE = 64K;
@@ -871,7 +871,7 @@ diff -uNr 09_privilege_level/src/bsp/raspberrypi/memory/mmu.rs 10_virtual_mem_pa
 @@ -0,0 +1,86 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! BSP Memory Management Unit.
 +
@@ -960,7 +960,7 @@ diff -uNr 09_privilege_level/src/bsp/raspberrypi/memory.rs 10_virtual_mem_part1_
 --- 09_privilege_level/src/bsp/raspberrypi/memory.rs
 +++ 10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs
 @@ -3,6 +3,45 @@
- // Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+ // Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
  //! BSP Memory Management.
 +//!
@@ -1084,7 +1084,7 @@ diff -uNr 09_privilege_level/src/common.rs 10_virtual_mem_part1_identity_mapping
 @@ -0,0 +1,22 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! General purpose code.
 +
@@ -1193,7 +1193,7 @@ diff -uNr 09_privilege_level/src/memory/mmu/translation_table.rs 10_virtual_mem_
 @@ -0,0 +1,14 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Translation table.
 +
@@ -1212,7 +1212,7 @@ diff -uNr 09_privilege_level/src/memory/mmu.rs 10_virtual_mem_part1_identity_map
 @@ -0,0 +1,253 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Memory Management Unit.
 +//!
@@ -1470,7 +1470,7 @@ diff -uNr 09_privilege_level/src/memory.rs 10_virtual_mem_part1_identity_mapping
 @@ -0,0 +1,7 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Memory Management.
 +
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu.rs
index bbe7687ae..602c9789c 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 //!
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs
index b458f0db5..c80f3ebbc 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs
index c2b7cea8c..1051af6aa 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural synchronous and asynchronous exception handling.
 //!
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception/asynchronous.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception/asynchronous.rs
index 0347dc3f6..65fcad25d 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception/asynchronous.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural asynchronous exception handling.
 //!
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
index e5e2653a2..eea4465c4 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit Driver.
 //!
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs
index 057335c46..f3d8f6192 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural translation table.
 //!
diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs
index 94d023795..ee1c3ef72 100644
--- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
 //!
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp.rs b/10_virtual_mem_part1_identity_mapping/src/bsp.rs
index 2e860ecbf..7a3c804bd 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver.rs
index 6e9bf8f39..64049a4cf 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm.rs
index b4b7906e5..1c343d1d7 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 24e537cff..8e57dfedb 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index b034e92e5..d92612ea8 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 //!
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/common.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/common.rs
index fd9e988ea..dfe7d8ef3 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/common.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi.rs
index fe9406779..3ea864dc7 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/cpu.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/cpu.rs
index 85fb89e49..65cf5abbe 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/cpu.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/driver.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/driver.rs
index ea8430660..2a80ee2c5 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/driver.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/kernel.ld b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/kernel.ld
index 6d939889b..3ce16ccea 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/kernel.ld
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/kernel.ld
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT OR Apache-2.0
  *
- * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+ * Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
  */
 
 PAGE_SIZE = 64K;
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs
index 7a57b6188..661476f4a 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 //!
diff --git a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
index ea43f899a..6c2414f79 100644
--- a/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/bsp/raspberrypi/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management Unit.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/common.rs b/10_virtual_mem_part1_identity_mapping/src/common.rs
index 27679aead..782a5da15 100644
--- a/10_virtual_mem_part1_identity_mapping/src/common.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! General purpose code.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/console.rs b/10_virtual_mem_part1_identity_mapping/src/console.rs
index 02b43df9f..a83f86fe0 100644
--- a/10_virtual_mem_part1_identity_mapping/src/console.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/console/null_console.rs b/10_virtual_mem_part1_identity_mapping/src/console/null_console.rs
index 2c64d499c..e92a022b6 100644
--- a/10_virtual_mem_part1_identity_mapping/src/console/null_console.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/console/null_console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Null console.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/cpu.rs b/10_virtual_mem_part1_identity_mapping/src/cpu.rs
index 62503fb40..67ab79c08 100644
--- a/10_virtual_mem_part1_identity_mapping/src/cpu.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/cpu/boot.rs b/10_virtual_mem_part1_identity_mapping/src/cpu/boot.rs
index 8091dac36..b1e98328a 100644
--- a/10_virtual_mem_part1_identity_mapping/src/cpu/boot.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/driver.rs b/10_virtual_mem_part1_identity_mapping/src/driver.rs
index a798c86da..050e7022f 100644
--- a/10_virtual_mem_part1_identity_mapping/src/driver.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/exception.rs b/10_virtual_mem_part1_identity_mapping/src/exception.rs
index d5f2e68e1..45760391e 100644
--- a/10_virtual_mem_part1_identity_mapping/src/exception.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronous and asynchronous exception handling.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/exception/asynchronous.rs b/10_virtual_mem_part1_identity_mapping/src/exception/asynchronous.rs
index bad857790..fd059326e 100644
--- a/10_virtual_mem_part1_identity_mapping/src/exception/asynchronous.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Asynchronous exception handling.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/main.rs b/10_virtual_mem_part1_identity_mapping/src/main.rs
index b40a37bf0..52ce7d985 100644
--- a/10_virtual_mem_part1_identity_mapping/src/main.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(
diff --git a/10_virtual_mem_part1_identity_mapping/src/memory.rs b/10_virtual_mem_part1_identity_mapping/src/memory.rs
index ac6663b36..6dd8f186b 100644
--- a/10_virtual_mem_part1_identity_mapping/src/memory.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/memory/mmu.rs b/10_virtual_mem_part1_identity_mapping/src/memory/mmu.rs
index bef4c1d14..87ed1efb2 100644
--- a/10_virtual_mem_part1_identity_mapping/src/memory/mmu.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit.
 //!
diff --git a/10_virtual_mem_part1_identity_mapping/src/memory/mmu/translation_table.rs b/10_virtual_mem_part1_identity_mapping/src/memory/mmu/translation_table.rs
index 88e3fe48d..1a2581aac 100644
--- a/10_virtual_mem_part1_identity_mapping/src/memory/mmu/translation_table.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/memory/mmu/translation_table.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Translation table.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/panic_wait.rs b/10_virtual_mem_part1_identity_mapping/src/panic_wait.rs
index ccf54f61f..5776aca87 100644
--- a/10_virtual_mem_part1_identity_mapping/src/panic_wait.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/print.rs b/10_virtual_mem_part1_identity_mapping/src/print.rs
index fe13b334c..8e3030466 100644
--- a/10_virtual_mem_part1_identity_mapping/src/print.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing.
 
diff --git a/10_virtual_mem_part1_identity_mapping/src/synchronization.rs b/10_virtual_mem_part1_identity_mapping/src/synchronization.rs
index d3937b0de..94c83de1c 100644
--- a/10_virtual_mem_part1_identity_mapping/src/synchronization.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/10_virtual_mem_part1_identity_mapping/src/time.rs b/10_virtual_mem_part1_identity_mapping/src/time.rs
index a6c0c5b6b..a9d501204 100644
--- a/10_virtual_mem_part1_identity_mapping/src/time.rs
+++ b/10_virtual_mem_part1_identity_mapping/src/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer primitives.
 
diff --git a/11_exceptions_part1_groundwork/.vscode/settings.json b/11_exceptions_part1_groundwork/.vscode/settings.json
index d1916456a..bfa278e9a 100644
--- a/11_exceptions_part1_groundwork/.vscode/settings.json
+++ b/11_exceptions_part1_groundwork/.vscode/settings.json
@@ -1,10 +1,10 @@
 {
-  "editor.formatOnSave": true,
-  "editor.rulers": [100],
-  "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.allTargets": false,
-  "rust-analyzer.checkOnSave.extraArgs": ["--bins"],
-  "rust-analyzer.lens.debug": false,
-  "rust-analyzer.lens.run": false
+    "editor.formatOnSave": true,
+    "editor.rulers": [100],
+    "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
+    "rust-analyzer.cargo.features": ["bsp_rpi3"],
+    "rust-analyzer.checkOnSave.allTargets": false,
+    "rust-analyzer.checkOnSave.extraArgs": ["--bins"],
+    "rust-analyzer.lens.debug": false,
+    "rust-analyzer.lens.run": false
 }
diff --git a/11_exceptions_part1_groundwork/Makefile b/11_exceptions_part1_groundwork/Makefile
index 125f75cb0..9549f0920 100644
--- a/11_exceptions_part1_groundwork/Makefile
+++ b/11_exceptions_part1_groundwork/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/docker.mk
 include ../common/format.mk
diff --git a/11_exceptions_part1_groundwork/README.md b/11_exceptions_part1_groundwork/README.md
index 0a9cc9fc8..7de4e306c 100644
--- a/11_exceptions_part1_groundwork/README.md
+++ b/11_exceptions_part1_groundwork/README.md
@@ -800,7 +800,7 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.s 11
 @@ -0,0 +1,154 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//--------------------------------------------------------------------------------------------------
 +// Definitions
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs
index bbe7687ae..602c9789c 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 //!
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs
index b458f0db5..c80f3ebbc 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
index 165e0730b..9d2ed5b76 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural synchronous and asynchronous exception handling.
 //!
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/exception/asynchronous.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/exception/asynchronous.rs
index 0347dc3f6..65fcad25d 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/exception/asynchronous.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural asynchronous exception handling.
 //!
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
index e5e2653a2..eea4465c4 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit Driver.
 //!
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs
index 057335c46..f3d8f6192 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural translation table.
 //!
diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/time.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/time.rs
index 94d023795..ee1c3ef72 100644
--- a/11_exceptions_part1_groundwork/src/_arch/aarch64/time.rs
+++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
 //!
diff --git a/11_exceptions_part1_groundwork/src/bsp.rs b/11_exceptions_part1_groundwork/src/bsp.rs
index 824787f65..246973bc0 100644
--- a/11_exceptions_part1_groundwork/src/bsp.rs
+++ b/11_exceptions_part1_groundwork/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/11_exceptions_part1_groundwork/src/bsp/device_driver.rs b/11_exceptions_part1_groundwork/src/bsp/device_driver.rs
index 6e9bf8f39..64049a4cf 100644
--- a/11_exceptions_part1_groundwork/src/bsp/device_driver.rs
+++ b/11_exceptions_part1_groundwork/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm.rs b/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm.rs
index b4b7906e5..1c343d1d7 100644
--- a/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm.rs
+++ b/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 24e537cff..8e57dfedb 100644
--- a/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index b034e92e5..d92612ea8 100644
--- a/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/11_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 //!
diff --git a/11_exceptions_part1_groundwork/src/bsp/device_driver/common.rs b/11_exceptions_part1_groundwork/src/bsp/device_driver/common.rs
index fd9e988ea..dfe7d8ef3 100644
--- a/11_exceptions_part1_groundwork/src/bsp/device_driver/common.rs
+++ b/11_exceptions_part1_groundwork/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/11_exceptions_part1_groundwork/src/bsp/raspberrypi.rs b/11_exceptions_part1_groundwork/src/bsp/raspberrypi.rs
index fe9406779..3ea864dc7 100644
--- a/11_exceptions_part1_groundwork/src/bsp/raspberrypi.rs
+++ b/11_exceptions_part1_groundwork/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/cpu.rs b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/cpu.rs
index 85fb89e49..65cf5abbe 100644
--- a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/cpu.rs
+++ b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/driver.rs b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/driver.rs
index ea8430660..2a80ee2c5 100644
--- a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/driver.rs
+++ b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory.rs b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory.rs
index 7a57b6188..661476f4a 100644
--- a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory.rs
+++ b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 //!
diff --git a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
index 2b3a609ba..6009ace48 100644
--- a/11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
+++ b/11_exceptions_part1_groundwork/src/bsp/raspberrypi/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management Unit.
 
diff --git a/11_exceptions_part1_groundwork/src/common.rs b/11_exceptions_part1_groundwork/src/common.rs
index 27679aead..782a5da15 100644
--- a/11_exceptions_part1_groundwork/src/common.rs
+++ b/11_exceptions_part1_groundwork/src/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! General purpose code.
 
diff --git a/11_exceptions_part1_groundwork/src/console.rs b/11_exceptions_part1_groundwork/src/console.rs
index 02b43df9f..a83f86fe0 100644
--- a/11_exceptions_part1_groundwork/src/console.rs
+++ b/11_exceptions_part1_groundwork/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/11_exceptions_part1_groundwork/src/console/null_console.rs b/11_exceptions_part1_groundwork/src/console/null_console.rs
index 2c64d499c..e92a022b6 100644
--- a/11_exceptions_part1_groundwork/src/console/null_console.rs
+++ b/11_exceptions_part1_groundwork/src/console/null_console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Null console.
 
diff --git a/11_exceptions_part1_groundwork/src/cpu.rs b/11_exceptions_part1_groundwork/src/cpu.rs
index 62503fb40..67ab79c08 100644
--- a/11_exceptions_part1_groundwork/src/cpu.rs
+++ b/11_exceptions_part1_groundwork/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/11_exceptions_part1_groundwork/src/cpu/boot.rs b/11_exceptions_part1_groundwork/src/cpu/boot.rs
index 8091dac36..b1e98328a 100644
--- a/11_exceptions_part1_groundwork/src/cpu/boot.rs
+++ b/11_exceptions_part1_groundwork/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/11_exceptions_part1_groundwork/src/driver.rs b/11_exceptions_part1_groundwork/src/driver.rs
index a798c86da..050e7022f 100644
--- a/11_exceptions_part1_groundwork/src/driver.rs
+++ b/11_exceptions_part1_groundwork/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/11_exceptions_part1_groundwork/src/exception.rs b/11_exceptions_part1_groundwork/src/exception.rs
index 97fbad6c2..77b582482 100644
--- a/11_exceptions_part1_groundwork/src/exception.rs
+++ b/11_exceptions_part1_groundwork/src/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronous and asynchronous exception handling.
 
diff --git a/11_exceptions_part1_groundwork/src/exception/asynchronous.rs b/11_exceptions_part1_groundwork/src/exception/asynchronous.rs
index bad857790..fd059326e 100644
--- a/11_exceptions_part1_groundwork/src/exception/asynchronous.rs
+++ b/11_exceptions_part1_groundwork/src/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Asynchronous exception handling.
 
diff --git a/11_exceptions_part1_groundwork/src/main.rs b/11_exceptions_part1_groundwork/src/main.rs
index 9d300bf06..fc01bb3b9 100644
--- a/11_exceptions_part1_groundwork/src/main.rs
+++ b/11_exceptions_part1_groundwork/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(
diff --git a/11_exceptions_part1_groundwork/src/memory.rs b/11_exceptions_part1_groundwork/src/memory.rs
index ac6663b36..6dd8f186b 100644
--- a/11_exceptions_part1_groundwork/src/memory.rs
+++ b/11_exceptions_part1_groundwork/src/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management.
 
diff --git a/11_exceptions_part1_groundwork/src/memory/mmu.rs b/11_exceptions_part1_groundwork/src/memory/mmu.rs
index bef4c1d14..87ed1efb2 100644
--- a/11_exceptions_part1_groundwork/src/memory/mmu.rs
+++ b/11_exceptions_part1_groundwork/src/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit.
 //!
diff --git a/11_exceptions_part1_groundwork/src/memory/mmu/translation_table.rs b/11_exceptions_part1_groundwork/src/memory/mmu/translation_table.rs
index 88e3fe48d..1a2581aac 100644
--- a/11_exceptions_part1_groundwork/src/memory/mmu/translation_table.rs
+++ b/11_exceptions_part1_groundwork/src/memory/mmu/translation_table.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Translation table.
 
diff --git a/11_exceptions_part1_groundwork/src/panic_wait.rs b/11_exceptions_part1_groundwork/src/panic_wait.rs
index ccf54f61f..5776aca87 100644
--- a/11_exceptions_part1_groundwork/src/panic_wait.rs
+++ b/11_exceptions_part1_groundwork/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/11_exceptions_part1_groundwork/src/print.rs b/11_exceptions_part1_groundwork/src/print.rs
index fe13b334c..8e3030466 100644
--- a/11_exceptions_part1_groundwork/src/print.rs
+++ b/11_exceptions_part1_groundwork/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing.
 
diff --git a/11_exceptions_part1_groundwork/src/synchronization.rs b/11_exceptions_part1_groundwork/src/synchronization.rs
index d3937b0de..94c83de1c 100644
--- a/11_exceptions_part1_groundwork/src/synchronization.rs
+++ b/11_exceptions_part1_groundwork/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/11_exceptions_part1_groundwork/src/time.rs b/11_exceptions_part1_groundwork/src/time.rs
index a6c0c5b6b..a9d501204 100644
--- a/11_exceptions_part1_groundwork/src/time.rs
+++ b/11_exceptions_part1_groundwork/src/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer primitives.
 
diff --git a/12_integrated_testing/.vscode/settings.json b/12_integrated_testing/.vscode/settings.json
index 292bf2a93..9ef30cd06 100644
--- a/12_integrated_testing/.vscode/settings.json
+++ b/12_integrated_testing/.vscode/settings.json
@@ -1,10 +1,10 @@
 {
-  "editor.formatOnSave": true,
-  "editor.rulers": [100],
-  "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.allTargets": false,
-  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
-  "rust-analyzer.lens.debug": false,
-  "rust-analyzer.lens.run": false
+    "editor.formatOnSave": true,
+    "editor.rulers": [100],
+    "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
+    "rust-analyzer.cargo.features": ["bsp_rpi3"],
+    "rust-analyzer.checkOnSave.allTargets": false,
+    "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
+    "rust-analyzer.lens.debug": false,
+    "rust-analyzer.lens.run": false
 }
diff --git a/12_integrated_testing/Makefile b/12_integrated_testing/Makefile
index 88d106f89..4e2efeff3 100644
--- a/12_integrated_testing/Makefile
+++ b/12_integrated_testing/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/docker.mk
 include ../common/format.mk
diff --git a/12_integrated_testing/kernel/src/_arch/aarch64/cpu.rs b/12_integrated_testing/kernel/src/_arch/aarch64/cpu.rs
index 7eb7f010c..2d0104736 100644
--- a/12_integrated_testing/kernel/src/_arch/aarch64/cpu.rs
+++ b/12_integrated_testing/kernel/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 //!
diff --git a/12_integrated_testing/kernel/src/_arch/aarch64/cpu/boot.rs b/12_integrated_testing/kernel/src/_arch/aarch64/cpu/boot.rs
index b458f0db5..c80f3ebbc 100644
--- a/12_integrated_testing/kernel/src/_arch/aarch64/cpu/boot.rs
+++ b/12_integrated_testing/kernel/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/12_integrated_testing/kernel/src/_arch/aarch64/exception.rs b/12_integrated_testing/kernel/src/_arch/aarch64/exception.rs
index 84681bc79..4df4adab4 100644
--- a/12_integrated_testing/kernel/src/_arch/aarch64/exception.rs
+++ b/12_integrated_testing/kernel/src/_arch/aarch64/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural synchronous and asynchronous exception handling.
 //!
diff --git a/12_integrated_testing/kernel/src/_arch/aarch64/exception/asynchronous.rs b/12_integrated_testing/kernel/src/_arch/aarch64/exception/asynchronous.rs
index 0347dc3f6..65fcad25d 100644
--- a/12_integrated_testing/kernel/src/_arch/aarch64/exception/asynchronous.rs
+++ b/12_integrated_testing/kernel/src/_arch/aarch64/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural asynchronous exception handling.
 //!
diff --git a/12_integrated_testing/kernel/src/_arch/aarch64/memory/mmu.rs b/12_integrated_testing/kernel/src/_arch/aarch64/memory/mmu.rs
index fbd4992f1..99ecaa2bf 100644
--- a/12_integrated_testing/kernel/src/_arch/aarch64/memory/mmu.rs
+++ b/12_integrated_testing/kernel/src/_arch/aarch64/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit Driver.
 //!
diff --git a/12_integrated_testing/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs b/12_integrated_testing/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
index 78776126b..5e45a5fdf 100644
--- a/12_integrated_testing/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/12_integrated_testing/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural translation table.
 //!
diff --git a/12_integrated_testing/kernel/src/_arch/aarch64/time.rs b/12_integrated_testing/kernel/src/_arch/aarch64/time.rs
index 94d023795..ee1c3ef72 100644
--- a/12_integrated_testing/kernel/src/_arch/aarch64/time.rs
+++ b/12_integrated_testing/kernel/src/_arch/aarch64/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
 //!
diff --git a/12_integrated_testing/kernel/src/bsp.rs b/12_integrated_testing/kernel/src/bsp.rs
index 824787f65..246973bc0 100644
--- a/12_integrated_testing/kernel/src/bsp.rs
+++ b/12_integrated_testing/kernel/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/12_integrated_testing/kernel/src/bsp/device_driver.rs b/12_integrated_testing/kernel/src/bsp/device_driver.rs
index 6e9bf8f39..64049a4cf 100644
--- a/12_integrated_testing/kernel/src/bsp/device_driver.rs
+++ b/12_integrated_testing/kernel/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/12_integrated_testing/kernel/src/bsp/device_driver/bcm.rs b/12_integrated_testing/kernel/src/bsp/device_driver/bcm.rs
index b4b7906e5..1c343d1d7 100644
--- a/12_integrated_testing/kernel/src/bsp/device_driver/bcm.rs
+++ b/12_integrated_testing/kernel/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 24e537cff..8e57dfedb 100644
--- a/12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index b034e92e5..d92612ea8 100644
--- a/12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 //!
diff --git a/12_integrated_testing/kernel/src/bsp/device_driver/common.rs b/12_integrated_testing/kernel/src/bsp/device_driver/common.rs
index fd9e988ea..dfe7d8ef3 100644
--- a/12_integrated_testing/kernel/src/bsp/device_driver/common.rs
+++ b/12_integrated_testing/kernel/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/12_integrated_testing/kernel/src/bsp/raspberrypi.rs b/12_integrated_testing/kernel/src/bsp/raspberrypi.rs
index fe9406779..3ea864dc7 100644
--- a/12_integrated_testing/kernel/src/bsp/raspberrypi.rs
+++ b/12_integrated_testing/kernel/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/12_integrated_testing/kernel/src/bsp/raspberrypi/cpu.rs b/12_integrated_testing/kernel/src/bsp/raspberrypi/cpu.rs
index 85fb89e49..65cf5abbe 100644
--- a/12_integrated_testing/kernel/src/bsp/raspberrypi/cpu.rs
+++ b/12_integrated_testing/kernel/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/12_integrated_testing/kernel/src/bsp/raspberrypi/driver.rs b/12_integrated_testing/kernel/src/bsp/raspberrypi/driver.rs
index beaee16be..7ecb48c8d 100644
--- a/12_integrated_testing/kernel/src/bsp/raspberrypi/driver.rs
+++ b/12_integrated_testing/kernel/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/12_integrated_testing/kernel/src/bsp/raspberrypi/memory.rs b/12_integrated_testing/kernel/src/bsp/raspberrypi/memory.rs
index 7a57b6188..661476f4a 100644
--- a/12_integrated_testing/kernel/src/bsp/raspberrypi/memory.rs
+++ b/12_integrated_testing/kernel/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 //!
diff --git a/12_integrated_testing/kernel/src/bsp/raspberrypi/memory/mmu.rs b/12_integrated_testing/kernel/src/bsp/raspberrypi/memory/mmu.rs
index f8cdc82f9..563c8ba9b 100644
--- a/12_integrated_testing/kernel/src/bsp/raspberrypi/memory/mmu.rs
+++ b/12_integrated_testing/kernel/src/bsp/raspberrypi/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management Unit.
 
diff --git a/12_integrated_testing/kernel/src/common.rs b/12_integrated_testing/kernel/src/common.rs
index 27679aead..782a5da15 100644
--- a/12_integrated_testing/kernel/src/common.rs
+++ b/12_integrated_testing/kernel/src/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! General purpose code.
 
diff --git a/12_integrated_testing/kernel/src/console.rs b/12_integrated_testing/kernel/src/console.rs
index 02b43df9f..a83f86fe0 100644
--- a/12_integrated_testing/kernel/src/console.rs
+++ b/12_integrated_testing/kernel/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/12_integrated_testing/kernel/src/console/null_console.rs b/12_integrated_testing/kernel/src/console/null_console.rs
index 2c64d499c..cbb7ec7d8 100644
--- a/12_integrated_testing/kernel/src/console/null_console.rs
+++ b/12_integrated_testing/kernel/src/console/null_console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Null console.
 
diff --git a/12_integrated_testing/kernel/src/cpu.rs b/12_integrated_testing/kernel/src/cpu.rs
index 6d3e9f085..1f6b57f3d 100644
--- a/12_integrated_testing/kernel/src/cpu.rs
+++ b/12_integrated_testing/kernel/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/12_integrated_testing/kernel/src/cpu/boot.rs b/12_integrated_testing/kernel/src/cpu/boot.rs
index 8091dac36..b1e98328a 100644
--- a/12_integrated_testing/kernel/src/cpu/boot.rs
+++ b/12_integrated_testing/kernel/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/12_integrated_testing/kernel/src/driver.rs b/12_integrated_testing/kernel/src/driver.rs
index a798c86da..050e7022f 100644
--- a/12_integrated_testing/kernel/src/driver.rs
+++ b/12_integrated_testing/kernel/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/12_integrated_testing/kernel/src/exception.rs b/12_integrated_testing/kernel/src/exception.rs
index 7ea7cd806..3d5f219f3 100644
--- a/12_integrated_testing/kernel/src/exception.rs
+++ b/12_integrated_testing/kernel/src/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronous and asynchronous exception handling.
 
diff --git a/12_integrated_testing/kernel/src/exception/asynchronous.rs b/12_integrated_testing/kernel/src/exception/asynchronous.rs
index bad857790..fd059326e 100644
--- a/12_integrated_testing/kernel/src/exception/asynchronous.rs
+++ b/12_integrated_testing/kernel/src/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Asynchronous exception handling.
 
diff --git a/12_integrated_testing/kernel/src/lib.rs b/12_integrated_testing/kernel/src/lib.rs
index 3f5a846f4..16e0b1d08 100644
--- a/12_integrated_testing/kernel/src/lib.rs
+++ b/12_integrated_testing/kernel/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(
diff --git a/12_integrated_testing/kernel/src/main.rs b/12_integrated_testing/kernel/src/main.rs
index 9cfcf3155..9a8df1d7c 100644
--- a/12_integrated_testing/kernel/src/main.rs
+++ b/12_integrated_testing/kernel/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(
diff --git a/12_integrated_testing/kernel/src/memory.rs b/12_integrated_testing/kernel/src/memory.rs
index ac6663b36..6dd8f186b 100644
--- a/12_integrated_testing/kernel/src/memory.rs
+++ b/12_integrated_testing/kernel/src/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management.
 
diff --git a/12_integrated_testing/kernel/src/memory/mmu.rs b/12_integrated_testing/kernel/src/memory/mmu.rs
index b313d7d40..7c7fc3974 100644
--- a/12_integrated_testing/kernel/src/memory/mmu.rs
+++ b/12_integrated_testing/kernel/src/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit.
 //!
diff --git a/12_integrated_testing/kernel/src/memory/mmu/translation_table.rs b/12_integrated_testing/kernel/src/memory/mmu/translation_table.rs
index 88e3fe48d..1a2581aac 100644
--- a/12_integrated_testing/kernel/src/memory/mmu/translation_table.rs
+++ b/12_integrated_testing/kernel/src/memory/mmu/translation_table.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Translation table.
 
diff --git a/12_integrated_testing/kernel/src/panic_wait.rs b/12_integrated_testing/kernel/src/panic_wait.rs
index da779008b..a896ad5e3 100644
--- a/12_integrated_testing/kernel/src/panic_wait.rs
+++ b/12_integrated_testing/kernel/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/12_integrated_testing/kernel/src/print.rs b/12_integrated_testing/kernel/src/print.rs
index fe13b334c..8e3030466 100644
--- a/12_integrated_testing/kernel/src/print.rs
+++ b/12_integrated_testing/kernel/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing.
 
diff --git a/12_integrated_testing/kernel/src/synchronization.rs b/12_integrated_testing/kernel/src/synchronization.rs
index d3937b0de..94c83de1c 100644
--- a/12_integrated_testing/kernel/src/synchronization.rs
+++ b/12_integrated_testing/kernel/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/12_integrated_testing/kernel/src/time.rs b/12_integrated_testing/kernel/src/time.rs
index a6c0c5b6b..a9d501204 100644
--- a/12_integrated_testing/kernel/src/time.rs
+++ b/12_integrated_testing/kernel/src/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer primitives.
 
diff --git a/12_integrated_testing/kernel/tests/00_console_sanity.rb b/12_integrated_testing/kernel/tests/00_console_sanity.rb
index 4dde55762..8be7a2f14 100644
--- a/12_integrated_testing/kernel/tests/00_console_sanity.rb
+++ b/12_integrated_testing/kernel/tests/00_console_sanity.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'console_io_test'
 
@@ -40,9 +40,9 @@ def run(qemu_out, _qemu_in)
     end
 end
 
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 ## Test registration
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 def subtest_collection
     [TxRxHandshakeTest.new, TxStatisticsTest.new, RxStatisticsTest.new]
 end
diff --git a/12_integrated_testing/kernel/tests/00_console_sanity.rs b/12_integrated_testing/kernel/tests/00_console_sanity.rs
index 693134287..982c61708 100644
--- a/12_integrated_testing/kernel/tests/00_console_sanity.rs
+++ b/12_integrated_testing/kernel/tests/00_console_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Console sanity tests - RX, TX and statistics.
 
diff --git a/12_integrated_testing/kernel/tests/01_timer_sanity.rs b/12_integrated_testing/kernel/tests/01_timer_sanity.rs
index b86016b61..3b065f13f 100644
--- a/12_integrated_testing/kernel/tests/01_timer_sanity.rs
+++ b/12_integrated_testing/kernel/tests/01_timer_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer sanity tests.
 
diff --git a/12_integrated_testing/kernel/tests/02_exception_sync_page_fault.rs b/12_integrated_testing/kernel/tests/02_exception_sync_page_fault.rs
index 465019604..bf5b7d711 100644
--- a/12_integrated_testing/kernel/tests/02_exception_sync_page_fault.rs
+++ b/12_integrated_testing/kernel/tests/02_exception_sync_page_fault.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Page faults must result in synchronous exceptions.
 
diff --git a/12_integrated_testing/kernel/tests/03_exception_restore_sanity.rb b/12_integrated_testing/kernel/tests/03_exception_restore_sanity.rb
index 5f52e0c7c..02f51f741 100644
--- a/12_integrated_testing/kernel/tests/03_exception_restore_sanity.rb
+++ b/12_integrated_testing/kernel/tests/03_exception_restore_sanity.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'console_io_test'
 
@@ -17,9 +17,9 @@ def run(qemu_out, _qemu_in)
     end
 end
 
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 ## Test registration
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 def subtest_collection
     [ExceptionRestoreTest.new]
 end
diff --git a/12_integrated_testing/kernel/tests/03_exception_restore_sanity.rs b/12_integrated_testing/kernel/tests/03_exception_restore_sanity.rs
index cba9285fc..e22f49775 100644
--- a/12_integrated_testing/kernel/tests/03_exception_restore_sanity.rs
+++ b/12_integrated_testing/kernel/tests/03_exception_restore_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A simple sanity test to see if exception restore code works.
 
diff --git a/12_integrated_testing/kernel/tests/panic_exit_success/mod.rs b/12_integrated_testing/kernel/tests/panic_exit_success/mod.rs
index 908fac51c..449ad6f9f 100644
--- a/12_integrated_testing/kernel/tests/panic_exit_success/mod.rs
+++ b/12_integrated_testing/kernel/tests/panic_exit_success/mod.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 /// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
 #[no_mangle]
diff --git a/12_integrated_testing/kernel/tests/panic_wait_forever/mod.rs b/12_integrated_testing/kernel/tests/panic_wait_forever/mod.rs
index 7a4effa50..9ac191446 100644
--- a/12_integrated_testing/kernel/tests/panic_wait_forever/mod.rs
+++ b/12_integrated_testing/kernel/tests/panic_wait_forever/mod.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 /// Overwrites libkernel's `panic_wait::_panic_exit()` with wait_forever.
 #[no_mangle]
diff --git a/12_integrated_testing/libraries/test-macros/src/lib.rs b/12_integrated_testing/libraries/test-macros/src/lib.rs
index 9879677cf..52cf893dd 100644
--- a/12_integrated_testing/libraries/test-macros/src/lib.rs
+++ b/12_integrated_testing/libraries/test-macros/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 use proc_macro::TokenStream;
 use proc_macro2::Span;
diff --git a/12_integrated_testing/libraries/test-types/src/lib.rs b/12_integrated_testing/libraries/test-types/src/lib.rs
index 922c2a1c3..38961a9ce 100644
--- a/12_integrated_testing/libraries/test-types/src/lib.rs
+++ b/12_integrated_testing/libraries/test-types/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Types for the `custom_test_frameworks` implementation.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/.vscode/settings.json b/13_exceptions_part2_peripheral_IRQs/.vscode/settings.json
index 292bf2a93..9ef30cd06 100644
--- a/13_exceptions_part2_peripheral_IRQs/.vscode/settings.json
+++ b/13_exceptions_part2_peripheral_IRQs/.vscode/settings.json
@@ -1,10 +1,10 @@
 {
-  "editor.formatOnSave": true,
-  "editor.rulers": [100],
-  "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.allTargets": false,
-  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
-  "rust-analyzer.lens.debug": false,
-  "rust-analyzer.lens.run": false
+    "editor.formatOnSave": true,
+    "editor.rulers": [100],
+    "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
+    "rust-analyzer.cargo.features": ["bsp_rpi3"],
+    "rust-analyzer.checkOnSave.allTargets": false,
+    "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
+    "rust-analyzer.lens.debug": false,
+    "rust-analyzer.lens.run": false
 }
diff --git a/13_exceptions_part2_peripheral_IRQs/Makefile b/13_exceptions_part2_peripheral_IRQs/Makefile
index 88d106f89..4e2efeff3 100644
--- a/13_exceptions_part2_peripheral_IRQs/Makefile
+++ b/13_exceptions_part2_peripheral_IRQs/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/docker.mk
 include ../common/format.mk
diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md
index 944001e7a..5be659147 100644
--- a/13_exceptions_part2_peripheral_IRQs/README.md
+++ b/13_exceptions_part2_peripheral_IRQs/README.md
@@ -791,7 +791,7 @@ diff -uNr 12_integrated_testing/kernel/src/_arch/aarch64/cpu/smp.rs 13_exception
 @@ -0,0 +1,30 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Architectural symmetric multiprocessing.
 +//!
@@ -934,7 +934,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs 1
 @@ -0,0 +1,141 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! GICC Driver - GIC CPU interface.
 +
@@ -1080,7 +1080,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs 1
 @@ -0,0 +1,199 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! GICD Driver - GIC Distributor.
 +//!
@@ -1284,7 +1284,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/arm/gicv2.rs 13_exc
 @@ -0,0 +1,226 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! GICv2 Driver - ARM Generic Interrupt Controller v2.
 +//!
@@ -1515,7 +1515,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/arm.rs 13_exception
 @@ -0,0 +1,9 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! ARM driver top level.
 +
@@ -1571,7 +1571,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interru
 @@ -0,0 +1,170 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Peripheral Interrupt Controller Driver.
 +//!
@@ -1746,7 +1746,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/device_driver/bcm/bcm2xxx_interru
 @@ -0,0 +1,152 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Interrupt Controller Driver.
 +
@@ -2247,7 +2247,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/raspberrypi/exception/asynchronou
 @@ -0,0 +1,28 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! BSP asynchronous exception handling.
 +
@@ -2280,7 +2280,7 @@ diff -uNr 12_integrated_testing/kernel/src/bsp/raspberrypi/exception.rs 13_excep
 @@ -0,0 +1,7 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! BSP synchronous and asynchronous exception handling.
 +
@@ -2374,7 +2374,7 @@ diff -uNr 12_integrated_testing/kernel/src/cpu/smp.rs 13_exceptions_part2_periph
 @@ -0,0 +1,14 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Symmetric multiprocessing.
 +
@@ -2611,7 +2611,7 @@ diff -uNr 12_integrated_testing/kernel/src/exception/asynchronous/null_irq_manag
 @@ -0,0 +1,42 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Null IRQ Manager.
 +
@@ -2946,7 +2946,7 @@ diff -uNr 12_integrated_testing/kernel/src/state.rs 13_exceptions_part2_peripher
 @@ -0,0 +1,92 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! State information about the kernel itself.
 +
@@ -3178,7 +3178,7 @@ diff -uNr 12_integrated_testing/kernel/tests/04_exception_irq_sanity.rs 13_excep
 @@ -0,0 +1,66 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! IRQ handling sanity tests.
 +
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu.rs
index 7eb7f010c..2d0104736 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 //!
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/boot.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/boot.rs
index b458f0db5..c80f3ebbc 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/boot.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/smp.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/smp.rs
index 9d304d657..491920389 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/smp.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
 //!
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception.rs
index 71831178e..730198009 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural synchronous and asynchronous exception handling.
 //!
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception/asynchronous.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception/asynchronous.rs
index f545a3e19..811ef138e 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception/asynchronous.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural asynchronous exception handling.
 //!
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/memory/mmu.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/memory/mmu.rs
index fbd4992f1..99ecaa2bf 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/memory/mmu.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit Driver.
 //!
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
index 78776126b..5e45a5fdf 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural translation table.
 //!
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/time.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/time.rs
index 94d023795..ee1c3ef72 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/time.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
 //!
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp.rs
index 824787f65..246973bc0 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver.rs
index eafaf7754..2dfaec8d6 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm.rs
index e83e24c92..8d1cbfbd8 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! ARM driver top level.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2.rs
index 2623c305f..d8744fec4 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICv2 Driver - ARM Generic Interrupt Controller v2.
 //!
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
index 2d2eebc6d..ce8ffa72f 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICC Driver - GIC CPU interface.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
index 2d18be9c4..1d528ca5e 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICD Driver - GIC Distributor.
 //!
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm.rs
index 5a7cc23be..7b7c288b7 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 336cc8f7a..353bcc8ca 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
index 22298f1c1..dfcbbaa78 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Interrupt Controller Driver.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index 1af6f22f2..b4c56f44e 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Peripheral Interrupt Controller Driver.
 //!
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 71b3e2545..fbbbee560 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 //!
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/common.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/common.rs
index c368534ab..90027e473 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/common.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi.rs
index 474419f4e..30421dfa6 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/cpu.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/cpu.rs
index 85fb89e49..65cf5abbe 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/cpu.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/driver.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/driver.rs
index 91dd61331..d17272dda 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/driver.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/exception.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/exception.rs
index aa6c5a63f..a9eaa6ac4 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/exception.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP synchronous and asynchronous exception handling.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/exception/asynchronous.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
index 06a675588..776182fd0 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP asynchronous exception handling.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory.rs
index be13bb7a8..44cefe338 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 //!
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory/mmu.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory/mmu.rs
index f8cdc82f9..563c8ba9b 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory/mmu.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/bsp/raspberrypi/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management Unit.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/common.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/common.rs
index 27679aead..782a5da15 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/common.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! General purpose code.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/console.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/console.rs
index a85bcffe7..f03634649 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/console.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/console/null_console.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/console/null_console.rs
index 2c64d499c..e92a022b6 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/console/null_console.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/console/null_console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Null console.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/cpu.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/cpu.rs
index e1493d1dd..8716a918b 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/cpu.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/cpu/boot.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/cpu/boot.rs
index 8091dac36..b1e98328a 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/cpu/boot.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/cpu/smp.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/cpu/smp.rs
index 57386f79b..de612d589 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/cpu/smp.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Symmetric multiprocessing.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/driver.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/driver.rs
index 18066c313..2edf8b854 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/driver.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/exception.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/exception.rs
index 7ea7cd806..3d5f219f3 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/exception.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronous and asynchronous exception handling.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.rs
index c1f2a27b3..2c874dd60 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Asynchronous exception handling.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous/null_irq_manager.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous/null_irq_manager.rs
index 438f96496..38919ffe4 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous/null_irq_manager.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/exception/asynchronous/null_irq_manager.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Null IRQ Manager.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
index 93b863d73..a8783f6c3 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs
index d3bdf394a..e524322d8 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/memory.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/memory.rs
index ac6663b36..6dd8f186b 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/memory.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu.rs
index b313d7d40..7c7fc3974 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit.
 //!
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/translation_table.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/translation_table.rs
index 88e3fe48d..1a2581aac 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/translation_table.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/translation_table.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Translation table.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/panic_wait.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/panic_wait.rs
index ae4651e7f..c6f3a9c7b 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/panic_wait.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/print.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/print.rs
index fe13b334c..8e3030466 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/print.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/state.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/state.rs
index 0af3688c2..6d99beedb 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/state.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/state.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! State information about the kernel itself.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/synchronization.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/synchronization.rs
index ab2b86e6f..5740b63e5 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/synchronization.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/time.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/time.rs
index a6c0c5b6b..a9d501204 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/src/time.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer primitives.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/tests/00_console_sanity.rb b/13_exceptions_part2_peripheral_IRQs/kernel/tests/00_console_sanity.rb
index 4dde55762..8be7a2f14 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/tests/00_console_sanity.rb
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/tests/00_console_sanity.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'console_io_test'
 
@@ -40,9 +40,9 @@ def run(qemu_out, _qemu_in)
     end
 end
 
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 ## Test registration
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 def subtest_collection
     [TxRxHandshakeTest.new, TxStatisticsTest.new, RxStatisticsTest.new]
 end
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/tests/00_console_sanity.rs b/13_exceptions_part2_peripheral_IRQs/kernel/tests/00_console_sanity.rs
index 693134287..982c61708 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/tests/00_console_sanity.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/tests/00_console_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Console sanity tests - RX, TX and statistics.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/tests/01_timer_sanity.rs b/13_exceptions_part2_peripheral_IRQs/kernel/tests/01_timer_sanity.rs
index b86016b61..3b065f13f 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/tests/01_timer_sanity.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/tests/01_timer_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer sanity tests.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/tests/02_exception_sync_page_fault.rs b/13_exceptions_part2_peripheral_IRQs/kernel/tests/02_exception_sync_page_fault.rs
index 465019604..bf5b7d711 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/tests/02_exception_sync_page_fault.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/tests/02_exception_sync_page_fault.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Page faults must result in synchronous exceptions.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/tests/03_exception_restore_sanity.rb b/13_exceptions_part2_peripheral_IRQs/kernel/tests/03_exception_restore_sanity.rb
index 5f52e0c7c..02f51f741 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/tests/03_exception_restore_sanity.rb
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/tests/03_exception_restore_sanity.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'console_io_test'
 
@@ -17,9 +17,9 @@ def run(qemu_out, _qemu_in)
     end
 end
 
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 ## Test registration
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 def subtest_collection
     [ExceptionRestoreTest.new]
 end
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/tests/03_exception_restore_sanity.rs b/13_exceptions_part2_peripheral_IRQs/kernel/tests/03_exception_restore_sanity.rs
index cba9285fc..e22f49775 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/tests/03_exception_restore_sanity.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/tests/03_exception_restore_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A simple sanity test to see if exception restore code works.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/tests/04_exception_irq_sanity.rs b/13_exceptions_part2_peripheral_IRQs/kernel/tests/04_exception_irq_sanity.rs
index 8f2b924ee..e37896b8c 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/tests/04_exception_irq_sanity.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/tests/04_exception_irq_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! IRQ handling sanity tests.
 
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/tests/panic_exit_success/mod.rs b/13_exceptions_part2_peripheral_IRQs/kernel/tests/panic_exit_success/mod.rs
index 908fac51c..449ad6f9f 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/tests/panic_exit_success/mod.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/tests/panic_exit_success/mod.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 /// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
 #[no_mangle]
diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/tests/panic_wait_forever/mod.rs b/13_exceptions_part2_peripheral_IRQs/kernel/tests/panic_wait_forever/mod.rs
index 7a4effa50..9ac191446 100644
--- a/13_exceptions_part2_peripheral_IRQs/kernel/tests/panic_wait_forever/mod.rs
+++ b/13_exceptions_part2_peripheral_IRQs/kernel/tests/panic_wait_forever/mod.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 /// Overwrites libkernel's `panic_wait::_panic_exit()` with wait_forever.
 #[no_mangle]
diff --git a/13_exceptions_part2_peripheral_IRQs/libraries/test-macros/src/lib.rs b/13_exceptions_part2_peripheral_IRQs/libraries/test-macros/src/lib.rs
index 9879677cf..52cf893dd 100644
--- a/13_exceptions_part2_peripheral_IRQs/libraries/test-macros/src/lib.rs
+++ b/13_exceptions_part2_peripheral_IRQs/libraries/test-macros/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 use proc_macro::TokenStream;
 use proc_macro2::Span;
diff --git a/13_exceptions_part2_peripheral_IRQs/libraries/test-types/src/lib.rs b/13_exceptions_part2_peripheral_IRQs/libraries/test-types/src/lib.rs
index 922c2a1c3..38961a9ce 100644
--- a/13_exceptions_part2_peripheral_IRQs/libraries/test-types/src/lib.rs
+++ b/13_exceptions_part2_peripheral_IRQs/libraries/test-types/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Types for the `custom_test_frameworks` implementation.
 
diff --git a/14_virtual_mem_part2_mmio_remap/.vscode/settings.json b/14_virtual_mem_part2_mmio_remap/.vscode/settings.json
index 292bf2a93..9ef30cd06 100644
--- a/14_virtual_mem_part2_mmio_remap/.vscode/settings.json
+++ b/14_virtual_mem_part2_mmio_remap/.vscode/settings.json
@@ -1,10 +1,10 @@
 {
-  "editor.formatOnSave": true,
-  "editor.rulers": [100],
-  "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.allTargets": false,
-  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
-  "rust-analyzer.lens.debug": false,
-  "rust-analyzer.lens.run": false
+    "editor.formatOnSave": true,
+    "editor.rulers": [100],
+    "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
+    "rust-analyzer.cargo.features": ["bsp_rpi3"],
+    "rust-analyzer.checkOnSave.allTargets": false,
+    "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
+    "rust-analyzer.lens.debug": false,
+    "rust-analyzer.lens.run": false
 }
diff --git a/14_virtual_mem_part2_mmio_remap/Makefile b/14_virtual_mem_part2_mmio_remap/Makefile
index 88d106f89..4e2efeff3 100644
--- a/14_virtual_mem_part2_mmio_remap/Makefile
+++ b/14_virtual_mem_part2_mmio_remap/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/docker.mk
 include ../common/format.mk
diff --git a/14_virtual_mem_part2_mmio_remap/README.md b/14_virtual_mem_part2_mmio_remap/README.md
index 7d16e69c1..e21ad5017 100644
--- a/14_virtual_mem_part2_mmio_remap/README.md
+++ b/14_virtual_mem_part2_mmio_remap/README.md
@@ -1928,7 +1928,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/mapping_reco
 @@ -0,0 +1,238 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! A record of mapped pages.
 +
@@ -2171,7 +2171,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/page_alloc.r
 @@ -0,0 +1,70 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Page allocation.
 +
@@ -2343,7 +2343,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu/types.rs 14_
 @@ -0,0 +1,373 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Memory Management Unit types.
 +
@@ -2719,7 +2719,7 @@ diff -uNr 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu.rs 14_virtua
 --- 13_exceptions_part2_peripheral_IRQs/kernel/src/memory/mmu.rs
 +++ 14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu.rs
 @@ -3,30 +3,24 @@
- // Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+ // Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
  //! Memory Management Unit.
 -//!
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu.rs
index 7eb7f010c..2d0104736 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 //!
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.rs
index b458f0db5..c80f3ebbc 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/smp.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/smp.rs
index 9d304d657..491920389 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/smp.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
 //!
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception.rs
index 71831178e..730198009 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural synchronous and asynchronous exception handling.
 //!
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception/asynchronous.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception/asynchronous.rs
index f545a3e19..811ef138e 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception/asynchronous.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural asynchronous exception handling.
 //!
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/memory/mmu.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/memory/mmu.rs
index aaec19252..e0717a7f5 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/memory/mmu.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit Driver.
 //!
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
index cc31b3023..2d87543c8 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural translation table.
 //!
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/time.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/time.rs
index 94d023795..ee1c3ef72 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/time.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
 //!
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp.rs
index 824787f65..246973bc0 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver.rs
index eafaf7754..2dfaec8d6 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm.rs
index e83e24c92..8d1cbfbd8 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! ARM driver top level.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2.rs
index 3cc35b5ee..256de7041 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICv2 Driver - ARM Generic Interrupt Controller v2.
 //!
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
index 1a02fc650..0fd16bb38 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICC Driver - GIC CPU interface.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
index 8aebcf2b6..1fc9d70e9 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICD Driver - GIC Distributor.
 //!
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm.rs
index 5a7cc23be..7b7c288b7 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index fb61a6510..812156f44 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
index c93a9fa1f..62f078002 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Interrupt Controller Driver.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index 0a20bd874..a26bff8d0 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Peripheral Interrupt Controller Driver.
 //!
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 0ee7feb78..b424d4be7 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 //!
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/common.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/common.rs
index ca7aeb76a..3ce1d8d81 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/common.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi.rs
index 474419f4e..30421dfa6 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/cpu.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/cpu.rs
index 85fb89e49..65cf5abbe 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/cpu.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/driver.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/driver.rs
index ca3435aae..a1f55b170 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/driver.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/exception.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/exception.rs
index aa6c5a63f..a9eaa6ac4 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/exception.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP synchronous and asynchronous exception handling.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/exception/asynchronous.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
index 06a675588..776182fd0 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP asynchronous exception handling.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/memory.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/memory.rs
index 7d6e7911d..0d963aa30 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/memory.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 //!
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/memory/mmu.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/memory/mmu.rs
index 8d395a58b..86a118c3f 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/memory/mmu.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management Unit.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/common.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/common.rs
index f32f650fb..2ad7e4c1e 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/common.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! General purpose code.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/console.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/console.rs
index a85bcffe7..f03634649 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/console.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/console/null_console.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/console/null_console.rs
index 2c64d499c..e92a022b6 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/console/null_console.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/console/null_console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Null console.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/cpu.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/cpu.rs
index e1493d1dd..8716a918b 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/cpu.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/cpu/boot.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/cpu/boot.rs
index 8091dac36..b1e98328a 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/cpu/boot.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/cpu/smp.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/cpu/smp.rs
index 57386f79b..de612d589 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/cpu/smp.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Symmetric multiprocessing.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/driver.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/driver.rs
index 18066c313..2edf8b854 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/driver.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/exception.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/exception.rs
index 7ea7cd806..3d5f219f3 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/exception.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronous and asynchronous exception handling.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous.rs
index c1f2a27b3..2c874dd60 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Asynchronous exception handling.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous/null_irq_manager.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous/null_irq_manager.rs
index 438f96496..38919ffe4 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous/null_irq_manager.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/exception/asynchronous/null_irq_manager.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Null IRQ Manager.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
index 25f66be31..fef85dfbe 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/main.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/main.rs
index 045d1200e..b76b003c7 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/main.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/memory.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/memory.rs
index 64d8cf64e..b2638470d 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/memory.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu.rs
index bd1f56ff2..20e35def2 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/mapping_record.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/mapping_record.rs
index b893fee3f..0e0792201 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/mapping_record.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/mapping_record.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A record of mapped pages.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/page_alloc.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/page_alloc.rs
index 347fcd343..344afd200 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/page_alloc.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/page_alloc.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Page allocation.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/translation_table.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/translation_table.rs
index 7eb46ebfc..0445ab296 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/translation_table.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/translation_table.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Translation table.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/types.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/types.rs
index 362438fd1..8feee064b 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/types.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/memory/mmu/types.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit types.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/panic_wait.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/panic_wait.rs
index ae4651e7f..c6f3a9c7b 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/panic_wait.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/print.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/print.rs
index fe13b334c..8e3030466 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/print.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/state.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/state.rs
index 0af3688c2..6d99beedb 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/state.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/state.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! State information about the kernel itself.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/synchronization.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/synchronization.rs
index ab2b86e6f..5740b63e5 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/synchronization.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/time.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/time.rs
index a6c0c5b6b..a9d501204 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/src/time.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/src/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer primitives.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rb b/14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rb
index 4dde55762..8be7a2f14 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rb
+++ b/14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'console_io_test'
 
@@ -40,9 +40,9 @@ def run(qemu_out, _qemu_in)
     end
 end
 
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 ## Test registration
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 def subtest_collection
     [TxRxHandshakeTest.new, TxStatisticsTest.new, RxStatisticsTest.new]
 end
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rs b/14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rs
index b27822d57..d74091734 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/tests/00_console_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Console sanity tests - RX, TX and statistics.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/tests/01_timer_sanity.rs b/14_virtual_mem_part2_mmio_remap/kernel/tests/01_timer_sanity.rs
index 691b511d1..c0a570e4a 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/tests/01_timer_sanity.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/tests/01_timer_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer sanity tests.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fault.rs b/14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fault.rs
index c30539614..3abe91fcf 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fault.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/tests/02_exception_sync_page_fault.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Page faults must result in synchronous exceptions.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rb b/14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rb
index 5f52e0c7c..02f51f741 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rb
+++ b/14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'console_io_test'
 
@@ -17,9 +17,9 @@ def run(qemu_out, _qemu_in)
     end
 end
 
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 ## Test registration
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 def subtest_collection
     [ExceptionRestoreTest.new]
 end
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rs b/14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rs
index 6351e80c6..77ec2d417 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/tests/03_exception_restore_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A simple sanity test to see if exception restore code works.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.rs b/14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.rs
index 35bf51b69..ac7c8ae4b 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/tests/04_exception_irq_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! IRQ handling sanity tests.
 
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/tests/panic_exit_success/mod.rs b/14_virtual_mem_part2_mmio_remap/kernel/tests/panic_exit_success/mod.rs
index 908fac51c..449ad6f9f 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/tests/panic_exit_success/mod.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/tests/panic_exit_success/mod.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 /// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
 #[no_mangle]
diff --git a/14_virtual_mem_part2_mmio_remap/kernel/tests/panic_wait_forever/mod.rs b/14_virtual_mem_part2_mmio_remap/kernel/tests/panic_wait_forever/mod.rs
index 7a4effa50..9ac191446 100644
--- a/14_virtual_mem_part2_mmio_remap/kernel/tests/panic_wait_forever/mod.rs
+++ b/14_virtual_mem_part2_mmio_remap/kernel/tests/panic_wait_forever/mod.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 /// Overwrites libkernel's `panic_wait::_panic_exit()` with wait_forever.
 #[no_mangle]
diff --git a/14_virtual_mem_part2_mmio_remap/libraries/test-macros/src/lib.rs b/14_virtual_mem_part2_mmio_remap/libraries/test-macros/src/lib.rs
index 9879677cf..52cf893dd 100644
--- a/14_virtual_mem_part2_mmio_remap/libraries/test-macros/src/lib.rs
+++ b/14_virtual_mem_part2_mmio_remap/libraries/test-macros/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 use proc_macro::TokenStream;
 use proc_macro2::Span;
diff --git a/14_virtual_mem_part2_mmio_remap/libraries/test-types/src/lib.rs b/14_virtual_mem_part2_mmio_remap/libraries/test-types/src/lib.rs
index 922c2a1c3..38961a9ce 100644
--- a/14_virtual_mem_part2_mmio_remap/libraries/test-types/src/lib.rs
+++ b/14_virtual_mem_part2_mmio_remap/libraries/test-types/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Types for the `custom_test_frameworks` implementation.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/.vscode/settings.json b/15_virtual_mem_part3_precomputed_tables/.vscode/settings.json
index 292bf2a93..9ef30cd06 100644
--- a/15_virtual_mem_part3_precomputed_tables/.vscode/settings.json
+++ b/15_virtual_mem_part3_precomputed_tables/.vscode/settings.json
@@ -1,10 +1,10 @@
 {
-  "editor.formatOnSave": true,
-  "editor.rulers": [100],
-  "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.allTargets": false,
-  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
-  "rust-analyzer.lens.debug": false,
-  "rust-analyzer.lens.run": false
+    "editor.formatOnSave": true,
+    "editor.rulers": [100],
+    "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
+    "rust-analyzer.cargo.features": ["bsp_rpi3"],
+    "rust-analyzer.checkOnSave.allTargets": false,
+    "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
+    "rust-analyzer.lens.debug": false,
+    "rust-analyzer.lens.run": false
 }
diff --git a/15_virtual_mem_part3_precomputed_tables/Makefile b/15_virtual_mem_part3_precomputed_tables/Makefile
index 0f5c4870a..bc23270d0 100644
--- a/15_virtual_mem_part3_precomputed_tables/Makefile
+++ b/15_virtual_mem_part3_precomputed_tables/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/docker.mk
 include ../common/format.mk
diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index 23210265c..3fdc23854 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -637,7 +637,7 @@ def kernel_map_binary
     mapping_descriptors.each do |i|
         print 'Generating'.rjust(12).green.bold
         print ' '
-        puts i.to_s
+        puts i
 
         TRANSLATION_TABLES.map_at(i.virt_region, i.phys_region, i.attributes)
     end
@@ -1081,7 +1081,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/kernel.ld 1
 --- 14_virtual_mem_part2_mmio_remap/kernel/src/bsp/raspberrypi/kernel.ld
 +++ 15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/kernel.ld
 @@ -3,6 +3,8 @@
-  * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+  * Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
   */
 
 +INCLUDE kernel_virt_addr_space_size.ld;
@@ -1924,7 +1924,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/tools/translation_table_tool/arch.rb 1
 +
 +# SPDX-License-Identifier: MIT OR Apache-2.0
 +#
-+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
++# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +# Bitfield manipulation.
 +class BitField
@@ -2241,7 +2241,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/tools/translation_table_tool/bsp.rb 15
 +
 +# SPDX-License-Identifier: MIT OR Apache-2.0
 +#
-+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
++# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +# Raspberry Pi 3 + 4
 +class RaspberryPi
@@ -2295,7 +2295,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/tools/translation_table_tool/generic.r
 +
 +# SPDX-License-Identifier: MIT OR Apache-2.0
 +#
-+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
++# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +module Granule64KiB
 +    SIZE = 64 * 1024
@@ -2444,7 +2444,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/tools/translation_table_tool/generic.r
 +    mapping_descriptors.each do |i|
 +        print 'Generating'.rjust(12).green.bold
 +        print ' '
-+        puts i.to_s
++        puts i
 +
 +        TRANSLATION_TABLES.map_at(i.virt_region, i.phys_region, i.attributes)
 +    end
@@ -2479,7 +2479,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/tools/translation_table_tool/kernel_el
 +
 +# SPDX-License-Identifier: MIT OR Apache-2.0
 +#
-+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
++# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +# KernelELF
 +class KernelELF
@@ -2581,7 +2581,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/tools/translation_table_tool/main.rb 1
 +
 +# SPDX-License-Identifier: MIT OR Apache-2.0
 +#
-+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
++# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +require 'rubygems'
 +require 'bundler/setup'
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/Cargo.toml b/15_virtual_mem_part3_precomputed_tables/kernel/Cargo.toml
index 73b6feef1..a0652b4f3 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/Cargo.toml
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/Cargo.toml
@@ -10,9 +10,9 @@ bsp_rpi3 = ["tock-registers"]
 bsp_rpi4 = ["tock-registers"]
 test_build = ["qemu-exit"]
 
-##--------------------------------------------------------------------------------------------------
+##-------------------------------------------------------------------------------------------------
 ## Dependencies
-##--------------------------------------------------------------------------------------------------
+##-------------------------------------------------------------------------------------------------
 
 [dependencies]
 test-types = { path = "../libraries/test-types" }
@@ -25,9 +25,9 @@ qemu-exit = { version = "3.x.x", optional = true }
 [target.'cfg(target_arch = "aarch64")'.dependencies]
 aarch64-cpu = { version = "9.x.x" }
 
-##--------------------------------------------------------------------------------------------------
+##-------------------------------------------------------------------------------------------------
 ## Testing
-##--------------------------------------------------------------------------------------------------
+##-------------------------------------------------------------------------------------------------
 
 [dev-dependencies]
 test-macros = { path = "../libraries/test-macros" }
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu.rs
index 7eb7f010c..2d0104736 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 //!
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.rs
index fc70fe7f3..b76176df5 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/smp.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/smp.rs
index 9d304d657..491920389 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/smp.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
 //!
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception.rs
index 71831178e..730198009 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural synchronous and asynchronous exception handling.
 //!
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception/asynchronous.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception/asynchronous.rs
index f545a3e19..811ef138e 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception/asynchronous.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural asynchronous exception handling.
 //!
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/memory/mmu.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/memory/mmu.rs
index aaec19252..e0717a7f5 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/memory/mmu.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit Driver.
 //!
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
index 53f592162..8cba4cd7c 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural translation table.
 //!
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/time.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/time.rs
index 94d023795..ee1c3ef72 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/time.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
 //!
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp.rs
index 824787f65..246973bc0 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver.rs
index eafaf7754..2dfaec8d6 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm.rs
index e83e24c92..8d1cbfbd8 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! ARM driver top level.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2.rs
index 3cc35b5ee..256de7041 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICv2 Driver - ARM Generic Interrupt Controller v2.
 //!
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
index 1a02fc650..0fd16bb38 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICC Driver - GIC CPU interface.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
index 8aebcf2b6..1fc9d70e9 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICD Driver - GIC Distributor.
 //!
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm.rs
index 5a7cc23be..7b7c288b7 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index fb61a6510..812156f44 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
index c93a9fa1f..62f078002 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Interrupt Controller Driver.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index 0a20bd874..a26bff8d0 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Peripheral Interrupt Controller Driver.
 //!
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 0ee7feb78..b424d4be7 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 //!
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/common.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/common.rs
index ca7aeb76a..3ce1d8d81 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/common.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi.rs
index 474419f4e..30421dfa6 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/cpu.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/cpu.rs
index 85fb89e49..65cf5abbe 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/cpu.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/driver.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/driver.rs
index ca3435aae..a1f55b170 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/driver.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/exception.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/exception.rs
index aa6c5a63f..a9eaa6ac4 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/exception.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP synchronous and asynchronous exception handling.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/exception/asynchronous.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
index 06a675588..776182fd0 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP asynchronous exception handling.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/memory.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/memory.rs
index 7d6e7911d..0d963aa30 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/memory.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 //!
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/memory/mmu.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/memory/mmu.rs
index f78b57d11..ce3d67506 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/memory/mmu.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/bsp/raspberrypi/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management Unit.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/common.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/common.rs
index f32f650fb..2ad7e4c1e 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/common.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! General purpose code.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/console.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/console.rs
index a85bcffe7..f03634649 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/console.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/console/null_console.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/console/null_console.rs
index 2c64d499c..e92a022b6 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/console/null_console.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/console/null_console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Null console.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/cpu.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/cpu.rs
index e1493d1dd..8716a918b 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/cpu.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/cpu/boot.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/cpu/boot.rs
index 8091dac36..b1e98328a 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/cpu/boot.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/cpu/smp.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/cpu/smp.rs
index 57386f79b..de612d589 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/cpu/smp.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Symmetric multiprocessing.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/driver.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/driver.rs
index 18066c313..2edf8b854 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/driver.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/exception.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/exception.rs
index 7ea7cd806..3d5f219f3 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/exception.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronous and asynchronous exception handling.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/exception/asynchronous.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/exception/asynchronous.rs
index c1f2a27b3..2c874dd60 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/exception/asynchronous.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Asynchronous exception handling.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/exception/asynchronous/null_irq_manager.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/exception/asynchronous/null_irq_manager.rs
index 438f96496..38919ffe4 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/exception/asynchronous/null_irq_manager.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/exception/asynchronous/null_irq_manager.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Null IRQ Manager.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs
index 197b1f419..71350bd09 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/main.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/main.rs
index 659052588..e41cfaa0d 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/main.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/memory.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory.rs
index 3b6868e7a..6131bdb6c 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/memory.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu.rs
index 698f2095e..f19758c19 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/mapping_record.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/mapping_record.rs
index b893fee3f..0e0792201 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/mapping_record.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/mapping_record.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A record of mapped pages.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/page_alloc.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/page_alloc.rs
index 347fcd343..344afd200 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/page_alloc.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/page_alloc.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Page allocation.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/translation_table.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/translation_table.rs
index c36fb3d63..41368daed 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/translation_table.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/translation_table.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Translation table.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/types.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/types.rs
index 362438fd1..8feee064b 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/types.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/memory/mmu/types.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit types.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/panic_wait.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/panic_wait.rs
index ae4651e7f..c6f3a9c7b 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/panic_wait.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/print.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/print.rs
index fe13b334c..8e3030466 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/print.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/state.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/state.rs
index 0af3688c2..6d99beedb 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/state.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/state.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! State information about the kernel itself.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/synchronization.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/synchronization.rs
index ab2b86e6f..5740b63e5 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/synchronization.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/time.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/time.rs
index a6c0c5b6b..a9d501204 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/src/time.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer primitives.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/tests/00_console_sanity.rb b/15_virtual_mem_part3_precomputed_tables/kernel/tests/00_console_sanity.rb
index 4dde55762..8be7a2f14 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/tests/00_console_sanity.rb
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/tests/00_console_sanity.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'console_io_test'
 
@@ -40,9 +40,9 @@ def run(qemu_out, _qemu_in)
     end
 end
 
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 ## Test registration
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 def subtest_collection
     [TxRxHandshakeTest.new, TxStatisticsTest.new, RxStatisticsTest.new]
 end
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/tests/00_console_sanity.rs b/15_virtual_mem_part3_precomputed_tables/kernel/tests/00_console_sanity.rs
index 2c0225b7a..682ea9b8a 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/tests/00_console_sanity.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/tests/00_console_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Console sanity tests - RX, TX and statistics.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/tests/01_timer_sanity.rs b/15_virtual_mem_part3_precomputed_tables/kernel/tests/01_timer_sanity.rs
index 8188b9424..1581a02e0 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/tests/01_timer_sanity.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/tests/01_timer_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer sanity tests.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/tests/02_exception_sync_page_fault.rs b/15_virtual_mem_part3_precomputed_tables/kernel/tests/02_exception_sync_page_fault.rs
index c4b801ce3..da64739c8 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/tests/02_exception_sync_page_fault.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/tests/02_exception_sync_page_fault.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Page faults must result in synchronous exceptions.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/tests/03_exception_restore_sanity.rb b/15_virtual_mem_part3_precomputed_tables/kernel/tests/03_exception_restore_sanity.rb
index 5f52e0c7c..02f51f741 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/tests/03_exception_restore_sanity.rb
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/tests/03_exception_restore_sanity.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'console_io_test'
 
@@ -17,9 +17,9 @@ def run(qemu_out, _qemu_in)
     end
 end
 
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 ## Test registration
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 def subtest_collection
     [ExceptionRestoreTest.new]
 end
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/tests/03_exception_restore_sanity.rs b/15_virtual_mem_part3_precomputed_tables/kernel/tests/03_exception_restore_sanity.rs
index f176c6a67..1a3029112 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/tests/03_exception_restore_sanity.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/tests/03_exception_restore_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A simple sanity test to see if exception restore code works.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/tests/04_exception_irq_sanity.rs b/15_virtual_mem_part3_precomputed_tables/kernel/tests/04_exception_irq_sanity.rs
index e6f94c91f..fcace8979 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/tests/04_exception_irq_sanity.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/tests/04_exception_irq_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! IRQ handling sanity tests.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/tests/panic_exit_success/mod.rs b/15_virtual_mem_part3_precomputed_tables/kernel/tests/panic_exit_success/mod.rs
index 908fac51c..449ad6f9f 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/tests/panic_exit_success/mod.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/tests/panic_exit_success/mod.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 /// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
 #[no_mangle]
diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/tests/panic_wait_forever/mod.rs b/15_virtual_mem_part3_precomputed_tables/kernel/tests/panic_wait_forever/mod.rs
index 7a4effa50..9ac191446 100644
--- a/15_virtual_mem_part3_precomputed_tables/kernel/tests/panic_wait_forever/mod.rs
+++ b/15_virtual_mem_part3_precomputed_tables/kernel/tests/panic_wait_forever/mod.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 /// Overwrites libkernel's `panic_wait::_panic_exit()` with wait_forever.
 #[no_mangle]
diff --git a/15_virtual_mem_part3_precomputed_tables/libraries/test-macros/src/lib.rs b/15_virtual_mem_part3_precomputed_tables/libraries/test-macros/src/lib.rs
index 9879677cf..52cf893dd 100644
--- a/15_virtual_mem_part3_precomputed_tables/libraries/test-macros/src/lib.rs
+++ b/15_virtual_mem_part3_precomputed_tables/libraries/test-macros/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 use proc_macro::TokenStream;
 use proc_macro2::Span;
diff --git a/15_virtual_mem_part3_precomputed_tables/libraries/test-types/src/lib.rs b/15_virtual_mem_part3_precomputed_tables/libraries/test-types/src/lib.rs
index 922c2a1c3..38961a9ce 100644
--- a/15_virtual_mem_part3_precomputed_tables/libraries/test-types/src/lib.rs
+++ b/15_virtual_mem_part3_precomputed_tables/libraries/test-types/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Types for the `custom_test_frameworks` implementation.
 
diff --git a/15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/arch.rb b/15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/arch.rb
index 07b06f13d..44b8531eb 100644
--- a/15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/arch.rb
+++ b/15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/arch.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 # Bitfield manipulation.
 class BitField
diff --git a/15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/bsp.rb b/15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/bsp.rb
index 0b76b403b..49e6fae91 100644
--- a/15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/bsp.rb
+++ b/15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/bsp.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 # Raspberry Pi 3 + 4
 class RaspberryPi
diff --git a/15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/generic.rb b/15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/generic.rb
index 13df06588..743840e00 100644
--- a/15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/generic.rb
+++ b/15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/generic.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 module Granule64KiB
     SIZE = 64 * 1024
@@ -151,7 +151,7 @@ def kernel_map_binary
     mapping_descriptors.each do |i|
         print 'Generating'.rjust(12).green.bold
         print ' '
-        puts i.to_s
+        puts i
 
         TRANSLATION_TABLES.map_at(i.virt_region, i.phys_region, i.attributes)
     end
diff --git a/15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/kernel_elf.rb b/15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/kernel_elf.rb
index f2d5b0b72..5ba78d9df 100644
--- a/15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/kernel_elf.rb
+++ b/15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/kernel_elf.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 # KernelELF
 class KernelELF
diff --git a/15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/main.rb b/15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/main.rb
index 6419e364e..22ab24fd5 100755
--- a/15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/main.rb
+++ b/15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/main.rb
@@ -3,7 +3,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'rubygems'
 require 'bundler/setup'
diff --git a/16_virtual_mem_part4_higher_half_kernel/.vscode/settings.json b/16_virtual_mem_part4_higher_half_kernel/.vscode/settings.json
index 292bf2a93..9ef30cd06 100644
--- a/16_virtual_mem_part4_higher_half_kernel/.vscode/settings.json
+++ b/16_virtual_mem_part4_higher_half_kernel/.vscode/settings.json
@@ -1,10 +1,10 @@
 {
-  "editor.formatOnSave": true,
-  "editor.rulers": [100],
-  "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.allTargets": false,
-  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
-  "rust-analyzer.lens.debug": false,
-  "rust-analyzer.lens.run": false
+    "editor.formatOnSave": true,
+    "editor.rulers": [100],
+    "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
+    "rust-analyzer.cargo.features": ["bsp_rpi3"],
+    "rust-analyzer.checkOnSave.allTargets": false,
+    "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
+    "rust-analyzer.lens.debug": false,
+    "rust-analyzer.lens.run": false
 }
diff --git a/16_virtual_mem_part4_higher_half_kernel/Makefile b/16_virtual_mem_part4_higher_half_kernel/Makefile
index 0f5c4870a..bc23270d0 100644
--- a/16_virtual_mem_part4_higher_half_kernel/Makefile
+++ b/16_virtual_mem_part4_higher_half_kernel/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/docker.mk
 include ../common/format.mk
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu.rs
index 7eb7f010c..2d0104736 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 //!
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.rs
index 2cad1ab61..4d7b77357 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/smp.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/smp.rs
index 9d304d657..491920389 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/smp.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
 //!
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception.rs
index 71831178e..730198009 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural synchronous and asynchronous exception handling.
 //!
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception/asynchronous.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception/asynchronous.rs
index f545a3e19..811ef138e 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception/asynchronous.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural asynchronous exception handling.
 //!
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/memory/mmu.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/memory/mmu.rs
index 74a71d114..984b2e04f 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/memory/mmu.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit Driver.
 //!
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
index f0b4ac85f..21fae3b82 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural translation table.
 //!
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/time.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/time.rs
index 94d023795..ee1c3ef72 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/time.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
 //!
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp.rs
index 824787f65..246973bc0 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver.rs
index eafaf7754..2dfaec8d6 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm.rs
index e83e24c92..8d1cbfbd8 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! ARM driver top level.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2.rs
index 3cc35b5ee..256de7041 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICv2 Driver - ARM Generic Interrupt Controller v2.
 //!
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
index 1a02fc650..0fd16bb38 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICC Driver - GIC CPU interface.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
index 8aebcf2b6..1fc9d70e9 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICD Driver - GIC Distributor.
 //!
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm.rs
index 5a7cc23be..7b7c288b7 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index fb61a6510..812156f44 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
index c93a9fa1f..62f078002 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Interrupt Controller Driver.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index 0a20bd874..a26bff8d0 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Peripheral Interrupt Controller Driver.
 //!
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 0ee7feb78..b424d4be7 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 //!
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/common.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/common.rs
index ca7aeb76a..3ce1d8d81 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/common.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi.rs
index 474419f4e..30421dfa6 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/cpu.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/cpu.rs
index 85fb89e49..65cf5abbe 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/cpu.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/driver.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/driver.rs
index ca3435aae..a1f55b170 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/driver.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/exception.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/exception.rs
index aa6c5a63f..a9eaa6ac4 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/exception.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP synchronous and asynchronous exception handling.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/exception/asynchronous.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
index 06a675588..776182fd0 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP asynchronous exception handling.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/memory.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/memory.rs
index f34009dea..3a33126c3 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/memory.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 //!
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/memory/mmu.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/memory/mmu.rs
index bfebd8b29..3c0368b91 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/memory/mmu.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/bsp/raspberrypi/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management Unit.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/common.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/common.rs
index f32f650fb..2ad7e4c1e 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/common.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! General purpose code.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/console.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/console.rs
index a85bcffe7..f03634649 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/console.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/console/null_console.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/console/null_console.rs
index 2c64d499c..e92a022b6 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/console/null_console.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/console/null_console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Null console.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/cpu.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/cpu.rs
index e1493d1dd..8716a918b 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/cpu.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/cpu/boot.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/cpu/boot.rs
index 8091dac36..b1e98328a 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/cpu/boot.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/cpu/smp.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/cpu/smp.rs
index 57386f79b..de612d589 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/cpu/smp.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Symmetric multiprocessing.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/driver.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/driver.rs
index 18066c313..2edf8b854 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/driver.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception.rs
index 7ea7cd806..3d5f219f3 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronous and asynchronous exception handling.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception/asynchronous.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception/asynchronous.rs
index c1f2a27b3..2c874dd60 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception/asynchronous.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Asynchronous exception handling.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception/asynchronous/null_irq_manager.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception/asynchronous/null_irq_manager.rs
index 438f96496..38919ffe4 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception/asynchronous/null_irq_manager.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/exception/asynchronous/null_irq_manager.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Null IRQ Manager.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
index f595b587d..d883d354e 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/main.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/main.rs
index 659052588..e41cfaa0d 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/main.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory.rs
index 3b6868e7a..6131bdb6c 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu.rs
index 7f02dad91..404e2a8a9 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/mapping_record.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/mapping_record.rs
index b893fee3f..0e0792201 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/mapping_record.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/mapping_record.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A record of mapped pages.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/page_alloc.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/page_alloc.rs
index 347fcd343..344afd200 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/page_alloc.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/page_alloc.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Page allocation.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/translation_table.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/translation_table.rs
index 9301bb0cd..341ffc5c8 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/translation_table.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/translation_table.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Translation table.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/types.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/types.rs
index 62f3926ea..f6ac8d598 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/types.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/memory/mmu/types.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit types.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/panic_wait.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/panic_wait.rs
index ae4651e7f..c6f3a9c7b 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/panic_wait.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/print.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/print.rs
index fe13b334c..8e3030466 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/print.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/state.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/state.rs
index 0af3688c2..6d99beedb 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/state.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/state.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! State information about the kernel itself.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/synchronization.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/synchronization.rs
index ab2b86e6f..5740b63e5 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/synchronization.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/time.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/time.rs
index a6c0c5b6b..a9d501204 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/time.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer primitives.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/00_console_sanity.rb b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/00_console_sanity.rb
index 4dde55762..8be7a2f14 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/00_console_sanity.rb
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/00_console_sanity.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'console_io_test'
 
@@ -40,9 +40,9 @@ def run(qemu_out, _qemu_in)
     end
 end
 
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 ## Test registration
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 def subtest_collection
     [TxRxHandshakeTest.new, TxStatisticsTest.new, RxStatisticsTest.new]
 end
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/00_console_sanity.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/00_console_sanity.rs
index 2c0225b7a..682ea9b8a 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/00_console_sanity.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/00_console_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Console sanity tests - RX, TX and statistics.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/01_timer_sanity.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/01_timer_sanity.rs
index 8188b9424..1581a02e0 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/01_timer_sanity.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/01_timer_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer sanity tests.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/02_exception_sync_page_fault.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/02_exception_sync_page_fault.rs
index fab44c8f0..09d177981 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/02_exception_sync_page_fault.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/02_exception_sync_page_fault.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Page faults must result in synchronous exceptions.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/03_exception_restore_sanity.rb b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/03_exception_restore_sanity.rb
index 5f52e0c7c..02f51f741 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/03_exception_restore_sanity.rb
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/03_exception_restore_sanity.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'console_io_test'
 
@@ -17,9 +17,9 @@ def run(qemu_out, _qemu_in)
     end
 end
 
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 ## Test registration
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 def subtest_collection
     [ExceptionRestoreTest.new]
 end
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/03_exception_restore_sanity.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/03_exception_restore_sanity.rs
index f176c6a67..1a3029112 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/03_exception_restore_sanity.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/03_exception_restore_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A simple sanity test to see if exception restore code works.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/04_exception_irq_sanity.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/04_exception_irq_sanity.rs
index e6f94c91f..fcace8979 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/04_exception_irq_sanity.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/04_exception_irq_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! IRQ handling sanity tests.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/panic_exit_success/mod.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/panic_exit_success/mod.rs
index 908fac51c..449ad6f9f 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/panic_exit_success/mod.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/panic_exit_success/mod.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 /// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
 #[no_mangle]
diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/panic_wait_forever/mod.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/panic_wait_forever/mod.rs
index 7a4effa50..9ac191446 100644
--- a/16_virtual_mem_part4_higher_half_kernel/kernel/tests/panic_wait_forever/mod.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/kernel/tests/panic_wait_forever/mod.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 /// Overwrites libkernel's `panic_wait::_panic_exit()` with wait_forever.
 #[no_mangle]
diff --git a/16_virtual_mem_part4_higher_half_kernel/libraries/test-macros/src/lib.rs b/16_virtual_mem_part4_higher_half_kernel/libraries/test-macros/src/lib.rs
index 9879677cf..52cf893dd 100644
--- a/16_virtual_mem_part4_higher_half_kernel/libraries/test-macros/src/lib.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/libraries/test-macros/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 use proc_macro::TokenStream;
 use proc_macro2::Span;
diff --git a/16_virtual_mem_part4_higher_half_kernel/libraries/test-types/src/lib.rs b/16_virtual_mem_part4_higher_half_kernel/libraries/test-types/src/lib.rs
index 922c2a1c3..38961a9ce 100644
--- a/16_virtual_mem_part4_higher_half_kernel/libraries/test-types/src/lib.rs
+++ b/16_virtual_mem_part4_higher_half_kernel/libraries/test-types/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Types for the `custom_test_frameworks` implementation.
 
diff --git a/16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/arch.rb b/16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/arch.rb
index deceb6d0c..61a6d6ca6 100644
--- a/16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/arch.rb
+++ b/16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/arch.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 # Bitfield manipulation.
 class BitField
diff --git a/16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/bsp.rb b/16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/bsp.rb
index 536a2f21d..93bcedd94 100644
--- a/16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/bsp.rb
+++ b/16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/bsp.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 # Raspberry Pi 3 + 4
 class RaspberryPi
diff --git a/16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/generic.rb b/16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/generic.rb
index 13df06588..743840e00 100644
--- a/16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/generic.rb
+++ b/16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/generic.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 module Granule64KiB
     SIZE = 64 * 1024
@@ -151,7 +151,7 @@ def kernel_map_binary
     mapping_descriptors.each do |i|
         print 'Generating'.rjust(12).green.bold
         print ' '
-        puts i.to_s
+        puts i
 
         TRANSLATION_TABLES.map_at(i.virt_region, i.phys_region, i.attributes)
     end
diff --git a/16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/kernel_elf.rb b/16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/kernel_elf.rb
index f2d5b0b72..5ba78d9df 100644
--- a/16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/kernel_elf.rb
+++ b/16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/kernel_elf.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 # KernelELF
 class KernelELF
diff --git a/16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/main.rb b/16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/main.rb
index 6419e364e..22ab24fd5 100755
--- a/16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/main.rb
+++ b/16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/main.rb
@@ -3,7 +3,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'rubygems'
 require 'bundler/setup'
diff --git a/17_kernel_symbols/.vscode/settings.json b/17_kernel_symbols/.vscode/settings.json
index 292bf2a93..9ef30cd06 100644
--- a/17_kernel_symbols/.vscode/settings.json
+++ b/17_kernel_symbols/.vscode/settings.json
@@ -1,10 +1,10 @@
 {
-  "editor.formatOnSave": true,
-  "editor.rulers": [100],
-  "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.allTargets": false,
-  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
-  "rust-analyzer.lens.debug": false,
-  "rust-analyzer.lens.run": false
+    "editor.formatOnSave": true,
+    "editor.rulers": [100],
+    "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
+    "rust-analyzer.cargo.features": ["bsp_rpi3"],
+    "rust-analyzer.checkOnSave.allTargets": false,
+    "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
+    "rust-analyzer.lens.debug": false,
+    "rust-analyzer.lens.run": false
 }
diff --git a/17_kernel_symbols/Makefile b/17_kernel_symbols/Makefile
index ce1d165b6..3c33cd66a 100644
--- a/17_kernel_symbols/Makefile
+++ b/17_kernel_symbols/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/docker.mk
 include ../common/format.mk
diff --git a/17_kernel_symbols/README.md b/17_kernel_symbols/README.md
index aec53437d..78962bd80 100644
--- a/17_kernel_symbols/README.md
+++ b/17_kernel_symbols/README.md
@@ -346,7 +346,7 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel/src/symbols.rs 17_kerne
 @@ -0,0 +1,88 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Debug symbol support.
 +
@@ -478,7 +478,7 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel_symbols/kernel_symbols.
 @@ -0,0 +1,15 @@
 +/* SPDX-License-Identifier: MIT OR Apache-2.0
 + *
-+ * Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++ * Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 + */
 +
 +SECTIONS
@@ -498,7 +498,7 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel_symbols/src/main.rs 17_
 @@ -0,0 +1,16 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Generation of kernel symbols.
 +
@@ -519,7 +519,7 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/kernel_symbols.mk 17_kernel_sy
 @@ -0,0 +1,117 @@
 +## SPDX-License-Identifier: MIT OR Apache-2.0
 +##
-+## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
++## Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +include ../common/format.mk
 +include ../common/docker.mk
@@ -650,7 +650,7 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/libraries/debug-symbol-types/s
 @@ -0,0 +1,45 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Types for implementing debug symbol support.
 +
@@ -783,7 +783,7 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/tools/kernel_symbols_tool/cmds
 +
 +# SPDX-License-Identifier: MIT OR Apache-2.0
 +#
-+# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++# Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +def generate_symbols(kernel_elf, output_file)
 +    File.open(output_file, 'w') do |file|
@@ -833,7 +833,7 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/tools/kernel_symbols_tool/kern
 +
 +# SPDX-License-Identifier: MIT OR Apache-2.0
 +#
-+# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
++# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +# KernelELF
 +class KernelELF
@@ -913,7 +913,7 @@ diff -uNr 16_virtual_mem_part4_higher_half_kernel/tools/kernel_symbols_tool/main
 +
 +# SPDX-License-Identifier: MIT OR Apache-2.0
 +#
-+# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++# Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +require 'rubygems'
 +require 'bundler/setup'
diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/cpu.rs b/17_kernel_symbols/kernel/src/_arch/aarch64/cpu.rs
index 7eb7f010c..2d0104736 100644
--- a/17_kernel_symbols/kernel/src/_arch/aarch64/cpu.rs
+++ b/17_kernel_symbols/kernel/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 //!
diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.rs b/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.rs
index 2cad1ab61..4d7b77357 100644
--- a/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.rs
+++ b/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/smp.rs b/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/smp.rs
index 9d304d657..491920389 100644
--- a/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/smp.rs
+++ b/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
 //!
diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/exception.rs b/17_kernel_symbols/kernel/src/_arch/aarch64/exception.rs
index 926d6d38b..d7863a1e6 100644
--- a/17_kernel_symbols/kernel/src/_arch/aarch64/exception.rs
+++ b/17_kernel_symbols/kernel/src/_arch/aarch64/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural synchronous and asynchronous exception handling.
 //!
diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/exception/asynchronous.rs b/17_kernel_symbols/kernel/src/_arch/aarch64/exception/asynchronous.rs
index f545a3e19..811ef138e 100644
--- a/17_kernel_symbols/kernel/src/_arch/aarch64/exception/asynchronous.rs
+++ b/17_kernel_symbols/kernel/src/_arch/aarch64/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural asynchronous exception handling.
 //!
diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/memory/mmu.rs b/17_kernel_symbols/kernel/src/_arch/aarch64/memory/mmu.rs
index 74a71d114..984b2e04f 100644
--- a/17_kernel_symbols/kernel/src/_arch/aarch64/memory/mmu.rs
+++ b/17_kernel_symbols/kernel/src/_arch/aarch64/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit Driver.
 //!
diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs b/17_kernel_symbols/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
index f0b4ac85f..21fae3b82 100644
--- a/17_kernel_symbols/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/17_kernel_symbols/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural translation table.
 //!
diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/time.rs b/17_kernel_symbols/kernel/src/_arch/aarch64/time.rs
index 94d023795..ee1c3ef72 100644
--- a/17_kernel_symbols/kernel/src/_arch/aarch64/time.rs
+++ b/17_kernel_symbols/kernel/src/_arch/aarch64/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
 //!
diff --git a/17_kernel_symbols/kernel/src/bsp.rs b/17_kernel_symbols/kernel/src/bsp.rs
index 824787f65..246973bc0 100644
--- a/17_kernel_symbols/kernel/src/bsp.rs
+++ b/17_kernel_symbols/kernel/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver.rs b/17_kernel_symbols/kernel/src/bsp/device_driver.rs
index eafaf7754..2dfaec8d6 100644
--- a/17_kernel_symbols/kernel/src/bsp/device_driver.rs
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/arm.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/arm.rs
index e83e24c92..8d1cbfbd8 100644
--- a/17_kernel_symbols/kernel/src/bsp/device_driver/arm.rs
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/arm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! ARM driver top level.
 
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2.rs
index 3cc35b5ee..256de7041 100644
--- a/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2.rs
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICv2 Driver - ARM Generic Interrupt Controller v2.
 //!
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
index 1a02fc650..0fd16bb38 100644
--- a/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICC Driver - GIC CPU interface.
 
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
index 8aebcf2b6..1fc9d70e9 100644
--- a/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICD Driver - GIC Distributor.
 //!
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm.rs
index 5a7cc23be..7b7c288b7 100644
--- a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm.rs
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index fb61a6510..812156f44 100644
--- a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
index c93a9fa1f..62f078002 100644
--- a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Interrupt Controller Driver.
 
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index 0a20bd874..a26bff8d0 100644
--- a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Peripheral Interrupt Controller Driver.
 //!
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 0ee7feb78..b424d4be7 100644
--- a/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 //!
diff --git a/17_kernel_symbols/kernel/src/bsp/device_driver/common.rs b/17_kernel_symbols/kernel/src/bsp/device_driver/common.rs
index ca7aeb76a..3ce1d8d81 100644
--- a/17_kernel_symbols/kernel/src/bsp/device_driver/common.rs
+++ b/17_kernel_symbols/kernel/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/17_kernel_symbols/kernel/src/bsp/raspberrypi.rs b/17_kernel_symbols/kernel/src/bsp/raspberrypi.rs
index 474419f4e..30421dfa6 100644
--- a/17_kernel_symbols/kernel/src/bsp/raspberrypi.rs
+++ b/17_kernel_symbols/kernel/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/17_kernel_symbols/kernel/src/bsp/raspberrypi/cpu.rs b/17_kernel_symbols/kernel/src/bsp/raspberrypi/cpu.rs
index 85fb89e49..65cf5abbe 100644
--- a/17_kernel_symbols/kernel/src/bsp/raspberrypi/cpu.rs
+++ b/17_kernel_symbols/kernel/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/17_kernel_symbols/kernel/src/bsp/raspberrypi/driver.rs b/17_kernel_symbols/kernel/src/bsp/raspberrypi/driver.rs
index ca3435aae..a1f55b170 100644
--- a/17_kernel_symbols/kernel/src/bsp/raspberrypi/driver.rs
+++ b/17_kernel_symbols/kernel/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/17_kernel_symbols/kernel/src/bsp/raspberrypi/exception.rs b/17_kernel_symbols/kernel/src/bsp/raspberrypi/exception.rs
index aa6c5a63f..a9eaa6ac4 100644
--- a/17_kernel_symbols/kernel/src/bsp/raspberrypi/exception.rs
+++ b/17_kernel_symbols/kernel/src/bsp/raspberrypi/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP synchronous and asynchronous exception handling.
 
diff --git a/17_kernel_symbols/kernel/src/bsp/raspberrypi/exception/asynchronous.rs b/17_kernel_symbols/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
index 06a675588..776182fd0 100644
--- a/17_kernel_symbols/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
+++ b/17_kernel_symbols/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP asynchronous exception handling.
 
diff --git a/17_kernel_symbols/kernel/src/bsp/raspberrypi/memory.rs b/17_kernel_symbols/kernel/src/bsp/raspberrypi/memory.rs
index 32416e6cf..96a4d8c1c 100644
--- a/17_kernel_symbols/kernel/src/bsp/raspberrypi/memory.rs
+++ b/17_kernel_symbols/kernel/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 //!
diff --git a/17_kernel_symbols/kernel/src/bsp/raspberrypi/memory/mmu.rs b/17_kernel_symbols/kernel/src/bsp/raspberrypi/memory/mmu.rs
index bfebd8b29..3c0368b91 100644
--- a/17_kernel_symbols/kernel/src/bsp/raspberrypi/memory/mmu.rs
+++ b/17_kernel_symbols/kernel/src/bsp/raspberrypi/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management Unit.
 
diff --git a/17_kernel_symbols/kernel/src/common.rs b/17_kernel_symbols/kernel/src/common.rs
index f32f650fb..2ad7e4c1e 100644
--- a/17_kernel_symbols/kernel/src/common.rs
+++ b/17_kernel_symbols/kernel/src/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! General purpose code.
 
diff --git a/17_kernel_symbols/kernel/src/console.rs b/17_kernel_symbols/kernel/src/console.rs
index a85bcffe7..f03634649 100644
--- a/17_kernel_symbols/kernel/src/console.rs
+++ b/17_kernel_symbols/kernel/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/17_kernel_symbols/kernel/src/console/null_console.rs b/17_kernel_symbols/kernel/src/console/null_console.rs
index 2c64d499c..e92a022b6 100644
--- a/17_kernel_symbols/kernel/src/console/null_console.rs
+++ b/17_kernel_symbols/kernel/src/console/null_console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Null console.
 
diff --git a/17_kernel_symbols/kernel/src/cpu.rs b/17_kernel_symbols/kernel/src/cpu.rs
index e1493d1dd..8716a918b 100644
--- a/17_kernel_symbols/kernel/src/cpu.rs
+++ b/17_kernel_symbols/kernel/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/17_kernel_symbols/kernel/src/cpu/boot.rs b/17_kernel_symbols/kernel/src/cpu/boot.rs
index 8091dac36..b1e98328a 100644
--- a/17_kernel_symbols/kernel/src/cpu/boot.rs
+++ b/17_kernel_symbols/kernel/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/17_kernel_symbols/kernel/src/cpu/smp.rs b/17_kernel_symbols/kernel/src/cpu/smp.rs
index 57386f79b..de612d589 100644
--- a/17_kernel_symbols/kernel/src/cpu/smp.rs
+++ b/17_kernel_symbols/kernel/src/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Symmetric multiprocessing.
 
diff --git a/17_kernel_symbols/kernel/src/driver.rs b/17_kernel_symbols/kernel/src/driver.rs
index 18066c313..2edf8b854 100644
--- a/17_kernel_symbols/kernel/src/driver.rs
+++ b/17_kernel_symbols/kernel/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/17_kernel_symbols/kernel/src/exception.rs b/17_kernel_symbols/kernel/src/exception.rs
index 7ea7cd806..3d5f219f3 100644
--- a/17_kernel_symbols/kernel/src/exception.rs
+++ b/17_kernel_symbols/kernel/src/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronous and asynchronous exception handling.
 
diff --git a/17_kernel_symbols/kernel/src/exception/asynchronous.rs b/17_kernel_symbols/kernel/src/exception/asynchronous.rs
index c1f2a27b3..2c874dd60 100644
--- a/17_kernel_symbols/kernel/src/exception/asynchronous.rs
+++ b/17_kernel_symbols/kernel/src/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Asynchronous exception handling.
 
diff --git a/17_kernel_symbols/kernel/src/exception/asynchronous/null_irq_manager.rs b/17_kernel_symbols/kernel/src/exception/asynchronous/null_irq_manager.rs
index 438f96496..38919ffe4 100644
--- a/17_kernel_symbols/kernel/src/exception/asynchronous/null_irq_manager.rs
+++ b/17_kernel_symbols/kernel/src/exception/asynchronous/null_irq_manager.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Null IRQ Manager.
 
diff --git a/17_kernel_symbols/kernel/src/lib.rs b/17_kernel_symbols/kernel/src/lib.rs
index 225727098..54e581a27 100644
--- a/17_kernel_symbols/kernel/src/lib.rs
+++ b/17_kernel_symbols/kernel/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(
diff --git a/17_kernel_symbols/kernel/src/main.rs b/17_kernel_symbols/kernel/src/main.rs
index 659052588..e41cfaa0d 100644
--- a/17_kernel_symbols/kernel/src/main.rs
+++ b/17_kernel_symbols/kernel/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(
diff --git a/17_kernel_symbols/kernel/src/memory.rs b/17_kernel_symbols/kernel/src/memory.rs
index 3b6868e7a..6131bdb6c 100644
--- a/17_kernel_symbols/kernel/src/memory.rs
+++ b/17_kernel_symbols/kernel/src/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management.
 
diff --git a/17_kernel_symbols/kernel/src/memory/mmu.rs b/17_kernel_symbols/kernel/src/memory/mmu.rs
index 7f02dad91..404e2a8a9 100644
--- a/17_kernel_symbols/kernel/src/memory/mmu.rs
+++ b/17_kernel_symbols/kernel/src/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit.
 
diff --git a/17_kernel_symbols/kernel/src/memory/mmu/mapping_record.rs b/17_kernel_symbols/kernel/src/memory/mmu/mapping_record.rs
index b893fee3f..0e0792201 100644
--- a/17_kernel_symbols/kernel/src/memory/mmu/mapping_record.rs
+++ b/17_kernel_symbols/kernel/src/memory/mmu/mapping_record.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A record of mapped pages.
 
diff --git a/17_kernel_symbols/kernel/src/memory/mmu/page_alloc.rs b/17_kernel_symbols/kernel/src/memory/mmu/page_alloc.rs
index 347fcd343..344afd200 100644
--- a/17_kernel_symbols/kernel/src/memory/mmu/page_alloc.rs
+++ b/17_kernel_symbols/kernel/src/memory/mmu/page_alloc.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Page allocation.
 
diff --git a/17_kernel_symbols/kernel/src/memory/mmu/translation_table.rs b/17_kernel_symbols/kernel/src/memory/mmu/translation_table.rs
index 9301bb0cd..341ffc5c8 100644
--- a/17_kernel_symbols/kernel/src/memory/mmu/translation_table.rs
+++ b/17_kernel_symbols/kernel/src/memory/mmu/translation_table.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Translation table.
 
diff --git a/17_kernel_symbols/kernel/src/memory/mmu/types.rs b/17_kernel_symbols/kernel/src/memory/mmu/types.rs
index 62f3926ea..f6ac8d598 100644
--- a/17_kernel_symbols/kernel/src/memory/mmu/types.rs
+++ b/17_kernel_symbols/kernel/src/memory/mmu/types.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit types.
 
diff --git a/17_kernel_symbols/kernel/src/panic_wait.rs b/17_kernel_symbols/kernel/src/panic_wait.rs
index ae4651e7f..c6f3a9c7b 100644
--- a/17_kernel_symbols/kernel/src/panic_wait.rs
+++ b/17_kernel_symbols/kernel/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/17_kernel_symbols/kernel/src/print.rs b/17_kernel_symbols/kernel/src/print.rs
index fe13b334c..8e3030466 100644
--- a/17_kernel_symbols/kernel/src/print.rs
+++ b/17_kernel_symbols/kernel/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing.
 
diff --git a/17_kernel_symbols/kernel/src/state.rs b/17_kernel_symbols/kernel/src/state.rs
index 0af3688c2..6d99beedb 100644
--- a/17_kernel_symbols/kernel/src/state.rs
+++ b/17_kernel_symbols/kernel/src/state.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! State information about the kernel itself.
 
diff --git a/17_kernel_symbols/kernel/src/symbols.rs b/17_kernel_symbols/kernel/src/symbols.rs
index 680b8eaf6..fdc1d084c 100644
--- a/17_kernel_symbols/kernel/src/symbols.rs
+++ b/17_kernel_symbols/kernel/src/symbols.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Debug symbol support.
 
diff --git a/17_kernel_symbols/kernel/src/synchronization.rs b/17_kernel_symbols/kernel/src/synchronization.rs
index ab2b86e6f..5740b63e5 100644
--- a/17_kernel_symbols/kernel/src/synchronization.rs
+++ b/17_kernel_symbols/kernel/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/17_kernel_symbols/kernel/src/time.rs b/17_kernel_symbols/kernel/src/time.rs
index a6c0c5b6b..a9d501204 100644
--- a/17_kernel_symbols/kernel/src/time.rs
+++ b/17_kernel_symbols/kernel/src/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer primitives.
 
diff --git a/17_kernel_symbols/kernel/tests/00_console_sanity.rb b/17_kernel_symbols/kernel/tests/00_console_sanity.rb
index 4dde55762..8be7a2f14 100644
--- a/17_kernel_symbols/kernel/tests/00_console_sanity.rb
+++ b/17_kernel_symbols/kernel/tests/00_console_sanity.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'console_io_test'
 
@@ -40,9 +40,9 @@ def run(qemu_out, _qemu_in)
     end
 end
 
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 ## Test registration
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 def subtest_collection
     [TxRxHandshakeTest.new, TxStatisticsTest.new, RxStatisticsTest.new]
 end
diff --git a/17_kernel_symbols/kernel/tests/00_console_sanity.rs b/17_kernel_symbols/kernel/tests/00_console_sanity.rs
index 2c0225b7a..682ea9b8a 100644
--- a/17_kernel_symbols/kernel/tests/00_console_sanity.rs
+++ b/17_kernel_symbols/kernel/tests/00_console_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Console sanity tests - RX, TX and statistics.
 
diff --git a/17_kernel_symbols/kernel/tests/01_timer_sanity.rs b/17_kernel_symbols/kernel/tests/01_timer_sanity.rs
index 8188b9424..1581a02e0 100644
--- a/17_kernel_symbols/kernel/tests/01_timer_sanity.rs
+++ b/17_kernel_symbols/kernel/tests/01_timer_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer sanity tests.
 
diff --git a/17_kernel_symbols/kernel/tests/02_exception_sync_page_fault.rs b/17_kernel_symbols/kernel/tests/02_exception_sync_page_fault.rs
index fab44c8f0..09d177981 100644
--- a/17_kernel_symbols/kernel/tests/02_exception_sync_page_fault.rs
+++ b/17_kernel_symbols/kernel/tests/02_exception_sync_page_fault.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Page faults must result in synchronous exceptions.
 
diff --git a/17_kernel_symbols/kernel/tests/03_exception_restore_sanity.rb b/17_kernel_symbols/kernel/tests/03_exception_restore_sanity.rb
index 5f52e0c7c..02f51f741 100644
--- a/17_kernel_symbols/kernel/tests/03_exception_restore_sanity.rb
+++ b/17_kernel_symbols/kernel/tests/03_exception_restore_sanity.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'console_io_test'
 
@@ -17,9 +17,9 @@ def run(qemu_out, _qemu_in)
     end
 end
 
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 ## Test registration
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 def subtest_collection
     [ExceptionRestoreTest.new]
 end
diff --git a/17_kernel_symbols/kernel/tests/03_exception_restore_sanity.rs b/17_kernel_symbols/kernel/tests/03_exception_restore_sanity.rs
index f176c6a67..1a3029112 100644
--- a/17_kernel_symbols/kernel/tests/03_exception_restore_sanity.rs
+++ b/17_kernel_symbols/kernel/tests/03_exception_restore_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A simple sanity test to see if exception restore code works.
 
diff --git a/17_kernel_symbols/kernel/tests/04_exception_irq_sanity.rs b/17_kernel_symbols/kernel/tests/04_exception_irq_sanity.rs
index e6f94c91f..fcace8979 100644
--- a/17_kernel_symbols/kernel/tests/04_exception_irq_sanity.rs
+++ b/17_kernel_symbols/kernel/tests/04_exception_irq_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! IRQ handling sanity tests.
 
diff --git a/17_kernel_symbols/kernel/tests/panic_exit_success/mod.rs b/17_kernel_symbols/kernel/tests/panic_exit_success/mod.rs
index 908fac51c..449ad6f9f 100644
--- a/17_kernel_symbols/kernel/tests/panic_exit_success/mod.rs
+++ b/17_kernel_symbols/kernel/tests/panic_exit_success/mod.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 /// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
 #[no_mangle]
diff --git a/17_kernel_symbols/kernel/tests/panic_wait_forever/mod.rs b/17_kernel_symbols/kernel/tests/panic_wait_forever/mod.rs
index 7a4effa50..9ac191446 100644
--- a/17_kernel_symbols/kernel/tests/panic_wait_forever/mod.rs
+++ b/17_kernel_symbols/kernel/tests/panic_wait_forever/mod.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 /// Overwrites libkernel's `panic_wait::_panic_exit()` with wait_forever.
 #[no_mangle]
diff --git a/17_kernel_symbols/kernel_symbols.mk b/17_kernel_symbols/kernel_symbols.mk
index d496ea8ae..d38b7785a 100644
--- a/17_kernel_symbols/kernel_symbols.mk
+++ b/17_kernel_symbols/kernel_symbols.mk
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/format.mk
 include ../common/docker.mk
diff --git a/17_kernel_symbols/kernel_symbols/src/main.rs b/17_kernel_symbols/kernel_symbols/src/main.rs
index bd90b535d..38ce18f8f 100644
--- a/17_kernel_symbols/kernel_symbols/src/main.rs
+++ b/17_kernel_symbols/kernel_symbols/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Generation of kernel symbols.
 
diff --git a/17_kernel_symbols/libraries/debug-symbol-types/src/lib.rs b/17_kernel_symbols/libraries/debug-symbol-types/src/lib.rs
index b6dff082f..81c897bfa 100644
--- a/17_kernel_symbols/libraries/debug-symbol-types/src/lib.rs
+++ b/17_kernel_symbols/libraries/debug-symbol-types/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Types for implementing debug symbol support.
 
diff --git a/17_kernel_symbols/libraries/test-macros/src/lib.rs b/17_kernel_symbols/libraries/test-macros/src/lib.rs
index 9879677cf..52cf893dd 100644
--- a/17_kernel_symbols/libraries/test-macros/src/lib.rs
+++ b/17_kernel_symbols/libraries/test-macros/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 use proc_macro::TokenStream;
 use proc_macro2::Span;
diff --git a/17_kernel_symbols/libraries/test-types/src/lib.rs b/17_kernel_symbols/libraries/test-types/src/lib.rs
index 922c2a1c3..38961a9ce 100644
--- a/17_kernel_symbols/libraries/test-types/src/lib.rs
+++ b/17_kernel_symbols/libraries/test-types/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Types for the `custom_test_frameworks` implementation.
 
diff --git a/17_kernel_symbols/tools/kernel_symbols_tool/cmds.rb b/17_kernel_symbols/tools/kernel_symbols_tool/cmds.rb
index fe66ea71c..c43acb24c 100644
--- a/17_kernel_symbols/tools/kernel_symbols_tool/cmds.rb
+++ b/17_kernel_symbols/tools/kernel_symbols_tool/cmds.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 def generate_symbols(kernel_elf, output_file)
     File.open(output_file, 'w') do |file|
diff --git a/17_kernel_symbols/tools/kernel_symbols_tool/kernel_elf.rb b/17_kernel_symbols/tools/kernel_symbols_tool/kernel_elf.rb
index b16497673..32b5460aa 100644
--- a/17_kernel_symbols/tools/kernel_symbols_tool/kernel_elf.rb
+++ b/17_kernel_symbols/tools/kernel_symbols_tool/kernel_elf.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 # KernelELF
 class KernelELF
diff --git a/17_kernel_symbols/tools/kernel_symbols_tool/main.rb b/17_kernel_symbols/tools/kernel_symbols_tool/main.rb
index 30a8be6f5..899f96464 100755
--- a/17_kernel_symbols/tools/kernel_symbols_tool/main.rb
+++ b/17_kernel_symbols/tools/kernel_symbols_tool/main.rb
@@ -3,7 +3,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'rubygems'
 require 'bundler/setup'
diff --git a/17_kernel_symbols/tools/translation_table_tool/arch.rb b/17_kernel_symbols/tools/translation_table_tool/arch.rb
index deceb6d0c..61a6d6ca6 100644
--- a/17_kernel_symbols/tools/translation_table_tool/arch.rb
+++ b/17_kernel_symbols/tools/translation_table_tool/arch.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 # Bitfield manipulation.
 class BitField
diff --git a/17_kernel_symbols/tools/translation_table_tool/bsp.rb b/17_kernel_symbols/tools/translation_table_tool/bsp.rb
index 536a2f21d..93bcedd94 100644
--- a/17_kernel_symbols/tools/translation_table_tool/bsp.rb
+++ b/17_kernel_symbols/tools/translation_table_tool/bsp.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 # Raspberry Pi 3 + 4
 class RaspberryPi
diff --git a/17_kernel_symbols/tools/translation_table_tool/generic.rb b/17_kernel_symbols/tools/translation_table_tool/generic.rb
index 13df06588..743840e00 100644
--- a/17_kernel_symbols/tools/translation_table_tool/generic.rb
+++ b/17_kernel_symbols/tools/translation_table_tool/generic.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 module Granule64KiB
     SIZE = 64 * 1024
@@ -151,7 +151,7 @@ def kernel_map_binary
     mapping_descriptors.each do |i|
         print 'Generating'.rjust(12).green.bold
         print ' '
-        puts i.to_s
+        puts i
 
         TRANSLATION_TABLES.map_at(i.virt_region, i.phys_region, i.attributes)
     end
diff --git a/17_kernel_symbols/tools/translation_table_tool/kernel_elf.rb b/17_kernel_symbols/tools/translation_table_tool/kernel_elf.rb
index f2d5b0b72..5ba78d9df 100644
--- a/17_kernel_symbols/tools/translation_table_tool/kernel_elf.rb
+++ b/17_kernel_symbols/tools/translation_table_tool/kernel_elf.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 # KernelELF
 class KernelELF
diff --git a/17_kernel_symbols/tools/translation_table_tool/main.rb b/17_kernel_symbols/tools/translation_table_tool/main.rb
index 6419e364e..22ab24fd5 100755
--- a/17_kernel_symbols/tools/translation_table_tool/main.rb
+++ b/17_kernel_symbols/tools/translation_table_tool/main.rb
@@ -3,7 +3,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'rubygems'
 require 'bundler/setup'
diff --git a/18_backtrace/.vscode/settings.json b/18_backtrace/.vscode/settings.json
index 292bf2a93..9ef30cd06 100644
--- a/18_backtrace/.vscode/settings.json
+++ b/18_backtrace/.vscode/settings.json
@@ -1,10 +1,10 @@
 {
-  "editor.formatOnSave": true,
-  "editor.rulers": [100],
-  "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.allTargets": false,
-  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
-  "rust-analyzer.lens.debug": false,
-  "rust-analyzer.lens.run": false
+    "editor.formatOnSave": true,
+    "editor.rulers": [100],
+    "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
+    "rust-analyzer.cargo.features": ["bsp_rpi3"],
+    "rust-analyzer.checkOnSave.allTargets": false,
+    "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
+    "rust-analyzer.lens.debug": false,
+    "rust-analyzer.lens.run": false
 }
diff --git a/18_backtrace/Makefile b/18_backtrace/Makefile
index fbd96e64e..7edf4edf6 100644
--- a/18_backtrace/Makefile
+++ b/18_backtrace/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/docker.mk
 include ../common/format.mk
diff --git a/18_backtrace/README.md b/18_backtrace/README.md
index 542fdfbb2..00a156d7b 100644
--- a/18_backtrace/README.md
+++ b/18_backtrace/README.md
@@ -400,7 +400,7 @@ diff -uNr 17_kernel_symbols/kernel/src/_arch/aarch64/backtrace.rs 18_backtrace/k
 @@ -0,0 +1,136 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Architectural backtracing support.
 +//!
@@ -728,7 +728,7 @@ diff -uNr 17_kernel_symbols/kernel/src/backtrace.rs 18_backtrace/kernel/src/back
 @@ -0,0 +1,114 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Backtracing support.
 +
@@ -1010,7 +1010,7 @@ diff -uNr 17_kernel_symbols/kernel/tests/05_backtrace_sanity.rb 18_backtrace/ker
 +
 +# SPDX-License-Identifier: MIT OR Apache-2.0
 +#
-+# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++# Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +require 'console_io_test'
 +
@@ -1052,7 +1052,7 @@ diff -uNr 17_kernel_symbols/kernel/tests/05_backtrace_sanity.rs 18_backtrace/ker
 @@ -0,0 +1,31 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Test if backtracing code detects an invalid frame pointer.
 +
@@ -1090,7 +1090,7 @@ diff -uNr 17_kernel_symbols/kernel/tests/06_backtrace_invalid_frame.rb 18_backtr
 +
 +# SPDX-License-Identifier: MIT OR Apache-2.0
 +#
-+# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++# Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +require 'console_io_test'
 +
@@ -1119,7 +1119,7 @@ diff -uNr 17_kernel_symbols/kernel/tests/06_backtrace_invalid_frame.rs 18_backtr
 @@ -0,0 +1,33 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Test if backtracing code detects an invalid frame pointer.
 +
@@ -1159,7 +1159,7 @@ diff -uNr 17_kernel_symbols/kernel/tests/07_backtrace_invalid_link.rb 18_backtra
 +
 +# SPDX-License-Identifier: MIT OR Apache-2.0
 +#
-+# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++# Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +require 'console_io_test'
 +
@@ -1187,7 +1187,7 @@ diff -uNr 17_kernel_symbols/kernel/tests/07_backtrace_invalid_link.rs 18_backtra
 @@ -0,0 +1,38 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Test if backtracing code detects an invalid link.
 +
diff --git a/18_backtrace/kernel/src/_arch/aarch64/backtrace.rs b/18_backtrace/kernel/src/_arch/aarch64/backtrace.rs
index 3511c9184..c2fb8dcb4 100644
--- a/18_backtrace/kernel/src/_arch/aarch64/backtrace.rs
+++ b/18_backtrace/kernel/src/_arch/aarch64/backtrace.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural backtracing support.
 //!
diff --git a/18_backtrace/kernel/src/_arch/aarch64/cpu.rs b/18_backtrace/kernel/src/_arch/aarch64/cpu.rs
index 7eb7f010c..2d0104736 100644
--- a/18_backtrace/kernel/src/_arch/aarch64/cpu.rs
+++ b/18_backtrace/kernel/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 //!
diff --git a/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.rs b/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.rs
index d9662d3ac..b8033fbe8 100644
--- a/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.rs
+++ b/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.s b/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.s
index 1a8c88010..65d71b1a7 100644
--- a/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.s
+++ b/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.s
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //--------------------------------------------------------------------------------------------------
 // Definitions
diff --git a/18_backtrace/kernel/src/_arch/aarch64/cpu/smp.rs b/18_backtrace/kernel/src/_arch/aarch64/cpu/smp.rs
index 9d304d657..491920389 100644
--- a/18_backtrace/kernel/src/_arch/aarch64/cpu/smp.rs
+++ b/18_backtrace/kernel/src/_arch/aarch64/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
 //!
diff --git a/18_backtrace/kernel/src/_arch/aarch64/exception.rs b/18_backtrace/kernel/src/_arch/aarch64/exception.rs
index a8bc0d2f3..ab4640815 100644
--- a/18_backtrace/kernel/src/_arch/aarch64/exception.rs
+++ b/18_backtrace/kernel/src/_arch/aarch64/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural synchronous and asynchronous exception handling.
 //!
diff --git a/18_backtrace/kernel/src/_arch/aarch64/exception/asynchronous.rs b/18_backtrace/kernel/src/_arch/aarch64/exception/asynchronous.rs
index f545a3e19..811ef138e 100644
--- a/18_backtrace/kernel/src/_arch/aarch64/exception/asynchronous.rs
+++ b/18_backtrace/kernel/src/_arch/aarch64/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural asynchronous exception handling.
 //!
diff --git a/18_backtrace/kernel/src/_arch/aarch64/memory/mmu.rs b/18_backtrace/kernel/src/_arch/aarch64/memory/mmu.rs
index 74a71d114..984b2e04f 100644
--- a/18_backtrace/kernel/src/_arch/aarch64/memory/mmu.rs
+++ b/18_backtrace/kernel/src/_arch/aarch64/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit Driver.
 //!
diff --git a/18_backtrace/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs b/18_backtrace/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
index f0b4ac85f..21fae3b82 100644
--- a/18_backtrace/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/18_backtrace/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural translation table.
 //!
diff --git a/18_backtrace/kernel/src/_arch/aarch64/time.rs b/18_backtrace/kernel/src/_arch/aarch64/time.rs
index 94d023795..ee1c3ef72 100644
--- a/18_backtrace/kernel/src/_arch/aarch64/time.rs
+++ b/18_backtrace/kernel/src/_arch/aarch64/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
 //!
diff --git a/18_backtrace/kernel/src/backtrace.rs b/18_backtrace/kernel/src/backtrace.rs
index 22de6c48e..a6af2fccc 100644
--- a/18_backtrace/kernel/src/backtrace.rs
+++ b/18_backtrace/kernel/src/backtrace.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Backtracing support.
 
diff --git a/18_backtrace/kernel/src/bsp.rs b/18_backtrace/kernel/src/bsp.rs
index 824787f65..246973bc0 100644
--- a/18_backtrace/kernel/src/bsp.rs
+++ b/18_backtrace/kernel/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/18_backtrace/kernel/src/bsp/device_driver.rs b/18_backtrace/kernel/src/bsp/device_driver.rs
index eafaf7754..2dfaec8d6 100644
--- a/18_backtrace/kernel/src/bsp/device_driver.rs
+++ b/18_backtrace/kernel/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/18_backtrace/kernel/src/bsp/device_driver/arm.rs b/18_backtrace/kernel/src/bsp/device_driver/arm.rs
index e83e24c92..8d1cbfbd8 100644
--- a/18_backtrace/kernel/src/bsp/device_driver/arm.rs
+++ b/18_backtrace/kernel/src/bsp/device_driver/arm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! ARM driver top level.
 
diff --git a/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2.rs b/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2.rs
index 3cc35b5ee..256de7041 100644
--- a/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2.rs
+++ b/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICv2 Driver - ARM Generic Interrupt Controller v2.
 //!
diff --git a/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs b/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
index 1a02fc650..0fd16bb38 100644
--- a/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
+++ b/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICC Driver - GIC CPU interface.
 
diff --git a/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs b/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
index 8aebcf2b6..1fc9d70e9 100644
--- a/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
+++ b/18_backtrace/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICD Driver - GIC Distributor.
 //!
diff --git a/18_backtrace/kernel/src/bsp/device_driver/bcm.rs b/18_backtrace/kernel/src/bsp/device_driver/bcm.rs
index 5a7cc23be..7b7c288b7 100644
--- a/18_backtrace/kernel/src/bsp/device_driver/bcm.rs
+++ b/18_backtrace/kernel/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index fb61a6510..812156f44 100644
--- a/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
index c93a9fa1f..62f078002 100644
--- a/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+++ b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Interrupt Controller Driver.
 
diff --git a/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index 0a20bd874..a26bff8d0 100644
--- a/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Peripheral Interrupt Controller Driver.
 //!
diff --git a/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 0ee7feb78..b424d4be7 100644
--- a/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/18_backtrace/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 //!
diff --git a/18_backtrace/kernel/src/bsp/device_driver/common.rs b/18_backtrace/kernel/src/bsp/device_driver/common.rs
index ca7aeb76a..3ce1d8d81 100644
--- a/18_backtrace/kernel/src/bsp/device_driver/common.rs
+++ b/18_backtrace/kernel/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/18_backtrace/kernel/src/bsp/raspberrypi.rs b/18_backtrace/kernel/src/bsp/raspberrypi.rs
index 474419f4e..30421dfa6 100644
--- a/18_backtrace/kernel/src/bsp/raspberrypi.rs
+++ b/18_backtrace/kernel/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/18_backtrace/kernel/src/bsp/raspberrypi/cpu.rs b/18_backtrace/kernel/src/bsp/raspberrypi/cpu.rs
index 85fb89e49..65cf5abbe 100644
--- a/18_backtrace/kernel/src/bsp/raspberrypi/cpu.rs
+++ b/18_backtrace/kernel/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/18_backtrace/kernel/src/bsp/raspberrypi/driver.rs b/18_backtrace/kernel/src/bsp/raspberrypi/driver.rs
index ca3435aae..a1f55b170 100644
--- a/18_backtrace/kernel/src/bsp/raspberrypi/driver.rs
+++ b/18_backtrace/kernel/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/18_backtrace/kernel/src/bsp/raspberrypi/exception.rs b/18_backtrace/kernel/src/bsp/raspberrypi/exception.rs
index aa6c5a63f..a9eaa6ac4 100644
--- a/18_backtrace/kernel/src/bsp/raspberrypi/exception.rs
+++ b/18_backtrace/kernel/src/bsp/raspberrypi/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP synchronous and asynchronous exception handling.
 
diff --git a/18_backtrace/kernel/src/bsp/raspberrypi/exception/asynchronous.rs b/18_backtrace/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
index 06a675588..776182fd0 100644
--- a/18_backtrace/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
+++ b/18_backtrace/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP asynchronous exception handling.
 
diff --git a/18_backtrace/kernel/src/bsp/raspberrypi/memory.rs b/18_backtrace/kernel/src/bsp/raspberrypi/memory.rs
index 32416e6cf..96a4d8c1c 100644
--- a/18_backtrace/kernel/src/bsp/raspberrypi/memory.rs
+++ b/18_backtrace/kernel/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 //!
diff --git a/18_backtrace/kernel/src/bsp/raspberrypi/memory/mmu.rs b/18_backtrace/kernel/src/bsp/raspberrypi/memory/mmu.rs
index 160c188f4..c6263245a 100644
--- a/18_backtrace/kernel/src/bsp/raspberrypi/memory/mmu.rs
+++ b/18_backtrace/kernel/src/bsp/raspberrypi/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management Unit.
 
diff --git a/18_backtrace/kernel/src/common.rs b/18_backtrace/kernel/src/common.rs
index f32f650fb..2ad7e4c1e 100644
--- a/18_backtrace/kernel/src/common.rs
+++ b/18_backtrace/kernel/src/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! General purpose code.
 
diff --git a/18_backtrace/kernel/src/console.rs b/18_backtrace/kernel/src/console.rs
index a85bcffe7..f03634649 100644
--- a/18_backtrace/kernel/src/console.rs
+++ b/18_backtrace/kernel/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/18_backtrace/kernel/src/console/null_console.rs b/18_backtrace/kernel/src/console/null_console.rs
index 2c64d499c..e92a022b6 100644
--- a/18_backtrace/kernel/src/console/null_console.rs
+++ b/18_backtrace/kernel/src/console/null_console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Null console.
 
diff --git a/18_backtrace/kernel/src/cpu.rs b/18_backtrace/kernel/src/cpu.rs
index e1493d1dd..8716a918b 100644
--- a/18_backtrace/kernel/src/cpu.rs
+++ b/18_backtrace/kernel/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/18_backtrace/kernel/src/cpu/boot.rs b/18_backtrace/kernel/src/cpu/boot.rs
index 8091dac36..b1e98328a 100644
--- a/18_backtrace/kernel/src/cpu/boot.rs
+++ b/18_backtrace/kernel/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/18_backtrace/kernel/src/cpu/smp.rs b/18_backtrace/kernel/src/cpu/smp.rs
index 57386f79b..de612d589 100644
--- a/18_backtrace/kernel/src/cpu/smp.rs
+++ b/18_backtrace/kernel/src/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Symmetric multiprocessing.
 
diff --git a/18_backtrace/kernel/src/driver.rs b/18_backtrace/kernel/src/driver.rs
index 18066c313..2edf8b854 100644
--- a/18_backtrace/kernel/src/driver.rs
+++ b/18_backtrace/kernel/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/18_backtrace/kernel/src/exception.rs b/18_backtrace/kernel/src/exception.rs
index 7ea7cd806..3d5f219f3 100644
--- a/18_backtrace/kernel/src/exception.rs
+++ b/18_backtrace/kernel/src/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronous and asynchronous exception handling.
 
diff --git a/18_backtrace/kernel/src/exception/asynchronous.rs b/18_backtrace/kernel/src/exception/asynchronous.rs
index c1f2a27b3..2c874dd60 100644
--- a/18_backtrace/kernel/src/exception/asynchronous.rs
+++ b/18_backtrace/kernel/src/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Asynchronous exception handling.
 
diff --git a/18_backtrace/kernel/src/exception/asynchronous/null_irq_manager.rs b/18_backtrace/kernel/src/exception/asynchronous/null_irq_manager.rs
index 438f96496..38919ffe4 100644
--- a/18_backtrace/kernel/src/exception/asynchronous/null_irq_manager.rs
+++ b/18_backtrace/kernel/src/exception/asynchronous/null_irq_manager.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Null IRQ Manager.
 
diff --git a/18_backtrace/kernel/src/lib.rs b/18_backtrace/kernel/src/lib.rs
index 5b79ebfe8..512894f7c 100644
--- a/18_backtrace/kernel/src/lib.rs
+++ b/18_backtrace/kernel/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(
diff --git a/18_backtrace/kernel/src/main.rs b/18_backtrace/kernel/src/main.rs
index 659052588..e41cfaa0d 100644
--- a/18_backtrace/kernel/src/main.rs
+++ b/18_backtrace/kernel/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(
diff --git a/18_backtrace/kernel/src/memory.rs b/18_backtrace/kernel/src/memory.rs
index 840db396b..0434b13c7 100644
--- a/18_backtrace/kernel/src/memory.rs
+++ b/18_backtrace/kernel/src/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management.
 
diff --git a/18_backtrace/kernel/src/memory/mmu.rs b/18_backtrace/kernel/src/memory/mmu.rs
index 7f02dad91..404e2a8a9 100644
--- a/18_backtrace/kernel/src/memory/mmu.rs
+++ b/18_backtrace/kernel/src/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit.
 
diff --git a/18_backtrace/kernel/src/memory/mmu/mapping_record.rs b/18_backtrace/kernel/src/memory/mmu/mapping_record.rs
index b893fee3f..0e0792201 100644
--- a/18_backtrace/kernel/src/memory/mmu/mapping_record.rs
+++ b/18_backtrace/kernel/src/memory/mmu/mapping_record.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A record of mapped pages.
 
diff --git a/18_backtrace/kernel/src/memory/mmu/page_alloc.rs b/18_backtrace/kernel/src/memory/mmu/page_alloc.rs
index 347fcd343..344afd200 100644
--- a/18_backtrace/kernel/src/memory/mmu/page_alloc.rs
+++ b/18_backtrace/kernel/src/memory/mmu/page_alloc.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Page allocation.
 
diff --git a/18_backtrace/kernel/src/memory/mmu/translation_table.rs b/18_backtrace/kernel/src/memory/mmu/translation_table.rs
index 9301bb0cd..341ffc5c8 100644
--- a/18_backtrace/kernel/src/memory/mmu/translation_table.rs
+++ b/18_backtrace/kernel/src/memory/mmu/translation_table.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Translation table.
 
diff --git a/18_backtrace/kernel/src/memory/mmu/types.rs b/18_backtrace/kernel/src/memory/mmu/types.rs
index 62f3926ea..f6ac8d598 100644
--- a/18_backtrace/kernel/src/memory/mmu/types.rs
+++ b/18_backtrace/kernel/src/memory/mmu/types.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit types.
 
diff --git a/18_backtrace/kernel/src/panic_wait.rs b/18_backtrace/kernel/src/panic_wait.rs
index bc95f77c4..389eb2c88 100644
--- a/18_backtrace/kernel/src/panic_wait.rs
+++ b/18_backtrace/kernel/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/18_backtrace/kernel/src/print.rs b/18_backtrace/kernel/src/print.rs
index fe13b334c..8e3030466 100644
--- a/18_backtrace/kernel/src/print.rs
+++ b/18_backtrace/kernel/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing.
 
diff --git a/18_backtrace/kernel/src/state.rs b/18_backtrace/kernel/src/state.rs
index 6a261b34f..becdd1b65 100644
--- a/18_backtrace/kernel/src/state.rs
+++ b/18_backtrace/kernel/src/state.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! State information about the kernel itself.
 
diff --git a/18_backtrace/kernel/src/symbols.rs b/18_backtrace/kernel/src/symbols.rs
index 680b8eaf6..fdc1d084c 100644
--- a/18_backtrace/kernel/src/symbols.rs
+++ b/18_backtrace/kernel/src/symbols.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Debug symbol support.
 
diff --git a/18_backtrace/kernel/src/synchronization.rs b/18_backtrace/kernel/src/synchronization.rs
index ab2b86e6f..5740b63e5 100644
--- a/18_backtrace/kernel/src/synchronization.rs
+++ b/18_backtrace/kernel/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/18_backtrace/kernel/src/time.rs b/18_backtrace/kernel/src/time.rs
index a6c0c5b6b..a9d501204 100644
--- a/18_backtrace/kernel/src/time.rs
+++ b/18_backtrace/kernel/src/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer primitives.
 
diff --git a/18_backtrace/kernel/tests/00_console_sanity.rb b/18_backtrace/kernel/tests/00_console_sanity.rb
index 4dde55762..8be7a2f14 100644
--- a/18_backtrace/kernel/tests/00_console_sanity.rb
+++ b/18_backtrace/kernel/tests/00_console_sanity.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'console_io_test'
 
@@ -40,9 +40,9 @@ def run(qemu_out, _qemu_in)
     end
 end
 
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 ## Test registration
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 def subtest_collection
     [TxRxHandshakeTest.new, TxStatisticsTest.new, RxStatisticsTest.new]
 end
diff --git a/18_backtrace/kernel/tests/00_console_sanity.rs b/18_backtrace/kernel/tests/00_console_sanity.rs
index 2c0225b7a..682ea9b8a 100644
--- a/18_backtrace/kernel/tests/00_console_sanity.rs
+++ b/18_backtrace/kernel/tests/00_console_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Console sanity tests - RX, TX and statistics.
 
diff --git a/18_backtrace/kernel/tests/01_timer_sanity.rs b/18_backtrace/kernel/tests/01_timer_sanity.rs
index 8188b9424..1581a02e0 100644
--- a/18_backtrace/kernel/tests/01_timer_sanity.rs
+++ b/18_backtrace/kernel/tests/01_timer_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer sanity tests.
 
diff --git a/18_backtrace/kernel/tests/02_exception_sync_page_fault.rs b/18_backtrace/kernel/tests/02_exception_sync_page_fault.rs
index fab44c8f0..09d177981 100644
--- a/18_backtrace/kernel/tests/02_exception_sync_page_fault.rs
+++ b/18_backtrace/kernel/tests/02_exception_sync_page_fault.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Page faults must result in synchronous exceptions.
 
diff --git a/18_backtrace/kernel/tests/03_exception_restore_sanity.rb b/18_backtrace/kernel/tests/03_exception_restore_sanity.rb
index 5f52e0c7c..02f51f741 100644
--- a/18_backtrace/kernel/tests/03_exception_restore_sanity.rb
+++ b/18_backtrace/kernel/tests/03_exception_restore_sanity.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'console_io_test'
 
@@ -17,9 +17,9 @@ def run(qemu_out, _qemu_in)
     end
 end
 
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 ## Test registration
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 def subtest_collection
     [ExceptionRestoreTest.new]
 end
diff --git a/18_backtrace/kernel/tests/03_exception_restore_sanity.rs b/18_backtrace/kernel/tests/03_exception_restore_sanity.rs
index f176c6a67..1a3029112 100644
--- a/18_backtrace/kernel/tests/03_exception_restore_sanity.rs
+++ b/18_backtrace/kernel/tests/03_exception_restore_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A simple sanity test to see if exception restore code works.
 
diff --git a/18_backtrace/kernel/tests/04_exception_irq_sanity.rs b/18_backtrace/kernel/tests/04_exception_irq_sanity.rs
index e6f94c91f..fcace8979 100644
--- a/18_backtrace/kernel/tests/04_exception_irq_sanity.rs
+++ b/18_backtrace/kernel/tests/04_exception_irq_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! IRQ handling sanity tests.
 
diff --git a/18_backtrace/kernel/tests/05_backtrace_sanity.rb b/18_backtrace/kernel/tests/05_backtrace_sanity.rb
index 5650f97c5..243e2fc86 100644
--- a/18_backtrace/kernel/tests/05_backtrace_sanity.rb
+++ b/18_backtrace/kernel/tests/05_backtrace_sanity.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'console_io_test'
 
@@ -31,9 +31,9 @@ def run(qemu_out, _qemu_in)
     end
 end
 
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 ## Test registration
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 def subtest_collection
     [PanicBacktraceTest.new, BacktraceCorrectnessTest.new]
 end
diff --git a/18_backtrace/kernel/tests/05_backtrace_sanity.rs b/18_backtrace/kernel/tests/05_backtrace_sanity.rs
index f75c0ea3e..66fd0a3e7 100644
--- a/18_backtrace/kernel/tests/05_backtrace_sanity.rs
+++ b/18_backtrace/kernel/tests/05_backtrace_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Test if backtracing code detects an invalid frame pointer.
 
diff --git a/18_backtrace/kernel/tests/06_backtrace_invalid_frame.rb b/18_backtrace/kernel/tests/06_backtrace_invalid_frame.rb
index 7601cf971..806954682 100644
--- a/18_backtrace/kernel/tests/06_backtrace_invalid_frame.rb
+++ b/18_backtrace/kernel/tests/06_backtrace_invalid_frame.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'console_io_test'
 
@@ -18,9 +18,9 @@ def run(qemu_out, _qemu_in)
     end
 end
 
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 ## Test registration
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 def subtest_collection
     [InvalidFramePointerTest.new]
 end
diff --git a/18_backtrace/kernel/tests/06_backtrace_invalid_frame.rs b/18_backtrace/kernel/tests/06_backtrace_invalid_frame.rs
index 33d3c02df..38411af69 100644
--- a/18_backtrace/kernel/tests/06_backtrace_invalid_frame.rs
+++ b/18_backtrace/kernel/tests/06_backtrace_invalid_frame.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Test if backtracing code detects an invalid frame pointer.
 
diff --git a/18_backtrace/kernel/tests/07_backtrace_invalid_link.rb b/18_backtrace/kernel/tests/07_backtrace_invalid_link.rb
index 0fabcf4c4..6b6f04132 100644
--- a/18_backtrace/kernel/tests/07_backtrace_invalid_link.rb
+++ b/18_backtrace/kernel/tests/07_backtrace_invalid_link.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'console_io_test'
 
@@ -17,9 +17,9 @@ def run(qemu_out, _qemu_in)
     end
 end
 
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 ## Test registration
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 def subtest_collection
     [InvalidLinkTest.new]
 end
diff --git a/18_backtrace/kernel/tests/07_backtrace_invalid_link.rs b/18_backtrace/kernel/tests/07_backtrace_invalid_link.rs
index bcb0538a6..6e0873dd1 100644
--- a/18_backtrace/kernel/tests/07_backtrace_invalid_link.rs
+++ b/18_backtrace/kernel/tests/07_backtrace_invalid_link.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Test if backtracing code detects an invalid link.
 
diff --git a/18_backtrace/kernel/tests/panic_exit_success/mod.rs b/18_backtrace/kernel/tests/panic_exit_success/mod.rs
index 908fac51c..449ad6f9f 100644
--- a/18_backtrace/kernel/tests/panic_exit_success/mod.rs
+++ b/18_backtrace/kernel/tests/panic_exit_success/mod.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 /// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
 #[no_mangle]
diff --git a/18_backtrace/kernel/tests/panic_wait_forever/mod.rs b/18_backtrace/kernel/tests/panic_wait_forever/mod.rs
index 7a4effa50..9ac191446 100644
--- a/18_backtrace/kernel/tests/panic_wait_forever/mod.rs
+++ b/18_backtrace/kernel/tests/panic_wait_forever/mod.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 /// Overwrites libkernel's `panic_wait::_panic_exit()` with wait_forever.
 #[no_mangle]
diff --git a/18_backtrace/kernel_symbols.mk b/18_backtrace/kernel_symbols.mk
index d496ea8ae..d38b7785a 100644
--- a/18_backtrace/kernel_symbols.mk
+++ b/18_backtrace/kernel_symbols.mk
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/format.mk
 include ../common/docker.mk
diff --git a/18_backtrace/kernel_symbols/src/main.rs b/18_backtrace/kernel_symbols/src/main.rs
index bd90b535d..38ce18f8f 100644
--- a/18_backtrace/kernel_symbols/src/main.rs
+++ b/18_backtrace/kernel_symbols/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Generation of kernel symbols.
 
diff --git a/18_backtrace/libraries/debug-symbol-types/src/lib.rs b/18_backtrace/libraries/debug-symbol-types/src/lib.rs
index b6dff082f..81c897bfa 100644
--- a/18_backtrace/libraries/debug-symbol-types/src/lib.rs
+++ b/18_backtrace/libraries/debug-symbol-types/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Types for implementing debug symbol support.
 
diff --git a/18_backtrace/libraries/test-macros/src/lib.rs b/18_backtrace/libraries/test-macros/src/lib.rs
index 9879677cf..52cf893dd 100644
--- a/18_backtrace/libraries/test-macros/src/lib.rs
+++ b/18_backtrace/libraries/test-macros/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 use proc_macro::TokenStream;
 use proc_macro2::Span;
diff --git a/18_backtrace/libraries/test-types/src/lib.rs b/18_backtrace/libraries/test-types/src/lib.rs
index 922c2a1c3..38961a9ce 100644
--- a/18_backtrace/libraries/test-types/src/lib.rs
+++ b/18_backtrace/libraries/test-types/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Types for the `custom_test_frameworks` implementation.
 
diff --git a/18_backtrace/tools/kernel_symbols_tool/cmds.rb b/18_backtrace/tools/kernel_symbols_tool/cmds.rb
index fe66ea71c..c43acb24c 100644
--- a/18_backtrace/tools/kernel_symbols_tool/cmds.rb
+++ b/18_backtrace/tools/kernel_symbols_tool/cmds.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 def generate_symbols(kernel_elf, output_file)
     File.open(output_file, 'w') do |file|
diff --git a/18_backtrace/tools/kernel_symbols_tool/kernel_elf.rb b/18_backtrace/tools/kernel_symbols_tool/kernel_elf.rb
index b16497673..32b5460aa 100644
--- a/18_backtrace/tools/kernel_symbols_tool/kernel_elf.rb
+++ b/18_backtrace/tools/kernel_symbols_tool/kernel_elf.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 # KernelELF
 class KernelELF
diff --git a/18_backtrace/tools/kernel_symbols_tool/main.rb b/18_backtrace/tools/kernel_symbols_tool/main.rb
index 30a8be6f5..899f96464 100755
--- a/18_backtrace/tools/kernel_symbols_tool/main.rb
+++ b/18_backtrace/tools/kernel_symbols_tool/main.rb
@@ -3,7 +3,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'rubygems'
 require 'bundler/setup'
diff --git a/18_backtrace/tools/translation_table_tool/arch.rb b/18_backtrace/tools/translation_table_tool/arch.rb
index deceb6d0c..61a6d6ca6 100644
--- a/18_backtrace/tools/translation_table_tool/arch.rb
+++ b/18_backtrace/tools/translation_table_tool/arch.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 # Bitfield manipulation.
 class BitField
diff --git a/18_backtrace/tools/translation_table_tool/bsp.rb b/18_backtrace/tools/translation_table_tool/bsp.rb
index dbab5ab6a..5887d7745 100644
--- a/18_backtrace/tools/translation_table_tool/bsp.rb
+++ b/18_backtrace/tools/translation_table_tool/bsp.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 # Raspberry Pi 3 + 4
 class RaspberryPi
diff --git a/18_backtrace/tools/translation_table_tool/generic.rb b/18_backtrace/tools/translation_table_tool/generic.rb
index eee8ccda2..941e2226f 100644
--- a/18_backtrace/tools/translation_table_tool/generic.rb
+++ b/18_backtrace/tools/translation_table_tool/generic.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 module Granule64KiB
     SIZE = 64 * 1024
@@ -161,7 +161,7 @@ def kernel_map_binary
     mapping_descriptors.each do |i|
         print 'Generating'.rjust(12).green.bold
         print ' '
-        puts i.to_s
+        puts i
 
         TRANSLATION_TABLES.map_at(i.virt_region, i.phys_region, i.attributes)
     end
diff --git a/18_backtrace/tools/translation_table_tool/kernel_elf.rb b/18_backtrace/tools/translation_table_tool/kernel_elf.rb
index f2d5b0b72..5ba78d9df 100644
--- a/18_backtrace/tools/translation_table_tool/kernel_elf.rb
+++ b/18_backtrace/tools/translation_table_tool/kernel_elf.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 # KernelELF
 class KernelELF
diff --git a/18_backtrace/tools/translation_table_tool/main.rb b/18_backtrace/tools/translation_table_tool/main.rb
index 6419e364e..22ab24fd5 100755
--- a/18_backtrace/tools/translation_table_tool/main.rb
+++ b/18_backtrace/tools/translation_table_tool/main.rb
@@ -3,7 +3,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'rubygems'
 require 'bundler/setup'
diff --git a/19_kernel_heap/.vscode/settings.json b/19_kernel_heap/.vscode/settings.json
index 292bf2a93..9ef30cd06 100644
--- a/19_kernel_heap/.vscode/settings.json
+++ b/19_kernel_heap/.vscode/settings.json
@@ -1,10 +1,10 @@
 {
-  "editor.formatOnSave": true,
-  "editor.rulers": [100],
-  "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.allTargets": false,
-  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
-  "rust-analyzer.lens.debug": false,
-  "rust-analyzer.lens.run": false
+    "editor.formatOnSave": true,
+    "editor.rulers": [100],
+    "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
+    "rust-analyzer.cargo.features": ["bsp_rpi3"],
+    "rust-analyzer.checkOnSave.allTargets": false,
+    "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
+    "rust-analyzer.lens.debug": false,
+    "rust-analyzer.lens.run": false
 }
diff --git a/19_kernel_heap/Makefile b/19_kernel_heap/Makefile
index 43f5ad1f3..f9704a44c 100644
--- a/19_kernel_heap/Makefile
+++ b/19_kernel_heap/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/docker.mk
 include ../common/format.mk
diff --git a/19_kernel_heap/README.md b/19_kernel_heap/README.md
index 54bca4ef6..eedf82c78 100644
--- a/19_kernel_heap/README.md
+++ b/19_kernel_heap/README.md
@@ -563,7 +563,7 @@ diff -uNr 18_backtrace/kernel/src/console/buffer_console.rs 19_kernel_heap/kerne
 @@ -0,0 +1,108 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! A console that buffers input during the init phase.
 +
@@ -676,7 +676,7 @@ diff -uNr 18_backtrace/kernel/src/console/null_console.rs 19_kernel_heap/kernel/
 @@ -1,41 +0,0 @@
 -// SPDX-License-Identifier: MIT OR Apache-2.0
 -//
--// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+-// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 -
 -//! Null console.
 -
@@ -1010,7 +1010,7 @@ diff -uNr 18_backtrace/kernel/src/memory/heap_alloc.rs 19_kernel_heap/kernel/src
 @@ -0,0 +1,147 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Heap allocation.
 +
diff --git a/19_kernel_heap/kernel/src/_arch/aarch64/backtrace.rs b/19_kernel_heap/kernel/src/_arch/aarch64/backtrace.rs
index 3511c9184..c2fb8dcb4 100644
--- a/19_kernel_heap/kernel/src/_arch/aarch64/backtrace.rs
+++ b/19_kernel_heap/kernel/src/_arch/aarch64/backtrace.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural backtracing support.
 //!
diff --git a/19_kernel_heap/kernel/src/_arch/aarch64/cpu.rs b/19_kernel_heap/kernel/src/_arch/aarch64/cpu.rs
index 7eb7f010c..2d0104736 100644
--- a/19_kernel_heap/kernel/src/_arch/aarch64/cpu.rs
+++ b/19_kernel_heap/kernel/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 //!
diff --git a/19_kernel_heap/kernel/src/_arch/aarch64/cpu/boot.rs b/19_kernel_heap/kernel/src/_arch/aarch64/cpu/boot.rs
index d9662d3ac..b8033fbe8 100644
--- a/19_kernel_heap/kernel/src/_arch/aarch64/cpu/boot.rs
+++ b/19_kernel_heap/kernel/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/19_kernel_heap/kernel/src/_arch/aarch64/cpu/smp.rs b/19_kernel_heap/kernel/src/_arch/aarch64/cpu/smp.rs
index 9d304d657..491920389 100644
--- a/19_kernel_heap/kernel/src/_arch/aarch64/cpu/smp.rs
+++ b/19_kernel_heap/kernel/src/_arch/aarch64/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
 //!
diff --git a/19_kernel_heap/kernel/src/_arch/aarch64/exception.rs b/19_kernel_heap/kernel/src/_arch/aarch64/exception.rs
index a8bc0d2f3..ab4640815 100644
--- a/19_kernel_heap/kernel/src/_arch/aarch64/exception.rs
+++ b/19_kernel_heap/kernel/src/_arch/aarch64/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural synchronous and asynchronous exception handling.
 //!
diff --git a/19_kernel_heap/kernel/src/_arch/aarch64/exception/asynchronous.rs b/19_kernel_heap/kernel/src/_arch/aarch64/exception/asynchronous.rs
index f545a3e19..811ef138e 100644
--- a/19_kernel_heap/kernel/src/_arch/aarch64/exception/asynchronous.rs
+++ b/19_kernel_heap/kernel/src/_arch/aarch64/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural asynchronous exception handling.
 //!
diff --git a/19_kernel_heap/kernel/src/_arch/aarch64/memory/mmu.rs b/19_kernel_heap/kernel/src/_arch/aarch64/memory/mmu.rs
index 74a71d114..984b2e04f 100644
--- a/19_kernel_heap/kernel/src/_arch/aarch64/memory/mmu.rs
+++ b/19_kernel_heap/kernel/src/_arch/aarch64/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit Driver.
 //!
diff --git a/19_kernel_heap/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs b/19_kernel_heap/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
index f0b4ac85f..21fae3b82 100644
--- a/19_kernel_heap/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/19_kernel_heap/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural translation table.
 //!
diff --git a/19_kernel_heap/kernel/src/_arch/aarch64/time.rs b/19_kernel_heap/kernel/src/_arch/aarch64/time.rs
index 94d023795..ee1c3ef72 100644
--- a/19_kernel_heap/kernel/src/_arch/aarch64/time.rs
+++ b/19_kernel_heap/kernel/src/_arch/aarch64/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
 //!
diff --git a/19_kernel_heap/kernel/src/backtrace.rs b/19_kernel_heap/kernel/src/backtrace.rs
index 22de6c48e..a6af2fccc 100644
--- a/19_kernel_heap/kernel/src/backtrace.rs
+++ b/19_kernel_heap/kernel/src/backtrace.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Backtracing support.
 
diff --git a/19_kernel_heap/kernel/src/bsp.rs b/19_kernel_heap/kernel/src/bsp.rs
index 824787f65..246973bc0 100644
--- a/19_kernel_heap/kernel/src/bsp.rs
+++ b/19_kernel_heap/kernel/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/19_kernel_heap/kernel/src/bsp/device_driver.rs b/19_kernel_heap/kernel/src/bsp/device_driver.rs
index eafaf7754..2dfaec8d6 100644
--- a/19_kernel_heap/kernel/src/bsp/device_driver.rs
+++ b/19_kernel_heap/kernel/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/19_kernel_heap/kernel/src/bsp/device_driver/arm.rs b/19_kernel_heap/kernel/src/bsp/device_driver/arm.rs
index e83e24c92..8d1cbfbd8 100644
--- a/19_kernel_heap/kernel/src/bsp/device_driver/arm.rs
+++ b/19_kernel_heap/kernel/src/bsp/device_driver/arm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! ARM driver top level.
 
diff --git a/19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2.rs b/19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2.rs
index fee8bb4cc..7dabf7934 100644
--- a/19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2.rs
+++ b/19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICv2 Driver - ARM Generic Interrupt Controller v2.
 //!
diff --git a/19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs b/19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
index 1a02fc650..0fd16bb38 100644
--- a/19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
+++ b/19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICC Driver - GIC CPU interface.
 
diff --git a/19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs b/19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
index 8aebcf2b6..1fc9d70e9 100644
--- a/19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
+++ b/19_kernel_heap/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICD Driver - GIC Distributor.
 //!
diff --git a/19_kernel_heap/kernel/src/bsp/device_driver/bcm.rs b/19_kernel_heap/kernel/src/bsp/device_driver/bcm.rs
index 5a7cc23be..7b7c288b7 100644
--- a/19_kernel_heap/kernel/src/bsp/device_driver/bcm.rs
+++ b/19_kernel_heap/kernel/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index fb61a6510..812156f44 100644
--- a/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
index a03b472ae..66c395972 100644
--- a/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+++ b/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Interrupt Controller Driver.
 
diff --git a/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index 238088a8c..029c1e742 100644
--- a/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Peripheral Interrupt Controller Driver.
 //!
diff --git a/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 3e7e1812c..3d5809755 100644
--- a/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 //!
diff --git a/19_kernel_heap/kernel/src/bsp/device_driver/common.rs b/19_kernel_heap/kernel/src/bsp/device_driver/common.rs
index ca7aeb76a..3ce1d8d81 100644
--- a/19_kernel_heap/kernel/src/bsp/device_driver/common.rs
+++ b/19_kernel_heap/kernel/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/19_kernel_heap/kernel/src/bsp/raspberrypi.rs b/19_kernel_heap/kernel/src/bsp/raspberrypi.rs
index 474419f4e..30421dfa6 100644
--- a/19_kernel_heap/kernel/src/bsp/raspberrypi.rs
+++ b/19_kernel_heap/kernel/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/19_kernel_heap/kernel/src/bsp/raspberrypi/cpu.rs b/19_kernel_heap/kernel/src/bsp/raspberrypi/cpu.rs
index 85fb89e49..65cf5abbe 100644
--- a/19_kernel_heap/kernel/src/bsp/raspberrypi/cpu.rs
+++ b/19_kernel_heap/kernel/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/19_kernel_heap/kernel/src/bsp/raspberrypi/driver.rs b/19_kernel_heap/kernel/src/bsp/raspberrypi/driver.rs
index ca3435aae..a1f55b170 100644
--- a/19_kernel_heap/kernel/src/bsp/raspberrypi/driver.rs
+++ b/19_kernel_heap/kernel/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/19_kernel_heap/kernel/src/bsp/raspberrypi/exception.rs b/19_kernel_heap/kernel/src/bsp/raspberrypi/exception.rs
index aa6c5a63f..a9eaa6ac4 100644
--- a/19_kernel_heap/kernel/src/bsp/raspberrypi/exception.rs
+++ b/19_kernel_heap/kernel/src/bsp/raspberrypi/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP synchronous and asynchronous exception handling.
 
diff --git a/19_kernel_heap/kernel/src/bsp/raspberrypi/exception/asynchronous.rs b/19_kernel_heap/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
index 06a675588..776182fd0 100644
--- a/19_kernel_heap/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
+++ b/19_kernel_heap/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP asynchronous exception handling.
 
diff --git a/19_kernel_heap/kernel/src/bsp/raspberrypi/memory.rs b/19_kernel_heap/kernel/src/bsp/raspberrypi/memory.rs
index 760128d37..8507dfc7e 100644
--- a/19_kernel_heap/kernel/src/bsp/raspberrypi/memory.rs
+++ b/19_kernel_heap/kernel/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 //!
diff --git a/19_kernel_heap/kernel/src/bsp/raspberrypi/memory/mmu.rs b/19_kernel_heap/kernel/src/bsp/raspberrypi/memory/mmu.rs
index bb2f82083..ef52e3686 100644
--- a/19_kernel_heap/kernel/src/bsp/raspberrypi/memory/mmu.rs
+++ b/19_kernel_heap/kernel/src/bsp/raspberrypi/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management Unit.
 
diff --git a/19_kernel_heap/kernel/src/common.rs b/19_kernel_heap/kernel/src/common.rs
index f32f650fb..2ad7e4c1e 100644
--- a/19_kernel_heap/kernel/src/common.rs
+++ b/19_kernel_heap/kernel/src/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! General purpose code.
 
diff --git a/19_kernel_heap/kernel/src/console.rs b/19_kernel_heap/kernel/src/console.rs
index ff1d8ddc3..5efa9395b 100644
--- a/19_kernel_heap/kernel/src/console.rs
+++ b/19_kernel_heap/kernel/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/19_kernel_heap/kernel/src/console/buffer_console.rs b/19_kernel_heap/kernel/src/console/buffer_console.rs
index c3259f898..05903e7cf 100644
--- a/19_kernel_heap/kernel/src/console/buffer_console.rs
+++ b/19_kernel_heap/kernel/src/console/buffer_console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A console that buffers input during the init phase.
 
diff --git a/19_kernel_heap/kernel/src/cpu.rs b/19_kernel_heap/kernel/src/cpu.rs
index e1493d1dd..8716a918b 100644
--- a/19_kernel_heap/kernel/src/cpu.rs
+++ b/19_kernel_heap/kernel/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/19_kernel_heap/kernel/src/cpu/boot.rs b/19_kernel_heap/kernel/src/cpu/boot.rs
index 8091dac36..b1e98328a 100644
--- a/19_kernel_heap/kernel/src/cpu/boot.rs
+++ b/19_kernel_heap/kernel/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/19_kernel_heap/kernel/src/cpu/smp.rs b/19_kernel_heap/kernel/src/cpu/smp.rs
index 57386f79b..de612d589 100644
--- a/19_kernel_heap/kernel/src/cpu/smp.rs
+++ b/19_kernel_heap/kernel/src/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Symmetric multiprocessing.
 
diff --git a/19_kernel_heap/kernel/src/driver.rs b/19_kernel_heap/kernel/src/driver.rs
index 2f22fd205..88b41b818 100644
--- a/19_kernel_heap/kernel/src/driver.rs
+++ b/19_kernel_heap/kernel/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/19_kernel_heap/kernel/src/exception.rs b/19_kernel_heap/kernel/src/exception.rs
index 7ea7cd806..3d5f219f3 100644
--- a/19_kernel_heap/kernel/src/exception.rs
+++ b/19_kernel_heap/kernel/src/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronous and asynchronous exception handling.
 
diff --git a/19_kernel_heap/kernel/src/exception/asynchronous.rs b/19_kernel_heap/kernel/src/exception/asynchronous.rs
index c1f2a27b3..2c874dd60 100644
--- a/19_kernel_heap/kernel/src/exception/asynchronous.rs
+++ b/19_kernel_heap/kernel/src/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Asynchronous exception handling.
 
diff --git a/19_kernel_heap/kernel/src/exception/asynchronous/null_irq_manager.rs b/19_kernel_heap/kernel/src/exception/asynchronous/null_irq_manager.rs
index 438f96496..38919ffe4 100644
--- a/19_kernel_heap/kernel/src/exception/asynchronous/null_irq_manager.rs
+++ b/19_kernel_heap/kernel/src/exception/asynchronous/null_irq_manager.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Null IRQ Manager.
 
diff --git a/19_kernel_heap/kernel/src/lib.rs b/19_kernel_heap/kernel/src/lib.rs
index bba0fcc7d..317bcc727 100644
--- a/19_kernel_heap/kernel/src/lib.rs
+++ b/19_kernel_heap/kernel/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(
diff --git a/19_kernel_heap/kernel/src/main.rs b/19_kernel_heap/kernel/src/main.rs
index 9a5fd58a0..ae2ea8a7b 100644
--- a/19_kernel_heap/kernel/src/main.rs
+++ b/19_kernel_heap/kernel/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(
diff --git a/19_kernel_heap/kernel/src/memory.rs b/19_kernel_heap/kernel/src/memory.rs
index a64bfbae8..bc6113366 100644
--- a/19_kernel_heap/kernel/src/memory.rs
+++ b/19_kernel_heap/kernel/src/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management.
 
diff --git a/19_kernel_heap/kernel/src/memory/heap_alloc.rs b/19_kernel_heap/kernel/src/memory/heap_alloc.rs
index c0f56d8d6..cf4298fa4 100644
--- a/19_kernel_heap/kernel/src/memory/heap_alloc.rs
+++ b/19_kernel_heap/kernel/src/memory/heap_alloc.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Heap allocation.
 
diff --git a/19_kernel_heap/kernel/src/memory/mmu.rs b/19_kernel_heap/kernel/src/memory/mmu.rs
index 8d204a4ef..abe3b1813 100644
--- a/19_kernel_heap/kernel/src/memory/mmu.rs
+++ b/19_kernel_heap/kernel/src/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit.
 
diff --git a/19_kernel_heap/kernel/src/memory/mmu/mapping_record.rs b/19_kernel_heap/kernel/src/memory/mmu/mapping_record.rs
index 4e9395da4..9c17258d1 100644
--- a/19_kernel_heap/kernel/src/memory/mmu/mapping_record.rs
+++ b/19_kernel_heap/kernel/src/memory/mmu/mapping_record.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A record of mapped pages.
 
diff --git a/19_kernel_heap/kernel/src/memory/mmu/page_alloc.rs b/19_kernel_heap/kernel/src/memory/mmu/page_alloc.rs
index 347fcd343..344afd200 100644
--- a/19_kernel_heap/kernel/src/memory/mmu/page_alloc.rs
+++ b/19_kernel_heap/kernel/src/memory/mmu/page_alloc.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Page allocation.
 
diff --git a/19_kernel_heap/kernel/src/memory/mmu/translation_table.rs b/19_kernel_heap/kernel/src/memory/mmu/translation_table.rs
index 9301bb0cd..341ffc5c8 100644
--- a/19_kernel_heap/kernel/src/memory/mmu/translation_table.rs
+++ b/19_kernel_heap/kernel/src/memory/mmu/translation_table.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Translation table.
 
diff --git a/19_kernel_heap/kernel/src/memory/mmu/types.rs b/19_kernel_heap/kernel/src/memory/mmu/types.rs
index 62f3926ea..f6ac8d598 100644
--- a/19_kernel_heap/kernel/src/memory/mmu/types.rs
+++ b/19_kernel_heap/kernel/src/memory/mmu/types.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit types.
 
diff --git a/19_kernel_heap/kernel/src/panic_wait.rs b/19_kernel_heap/kernel/src/panic_wait.rs
index bc95f77c4..389eb2c88 100644
--- a/19_kernel_heap/kernel/src/panic_wait.rs
+++ b/19_kernel_heap/kernel/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/19_kernel_heap/kernel/src/print.rs b/19_kernel_heap/kernel/src/print.rs
index 8d56d2e4a..a89f8201d 100644
--- a/19_kernel_heap/kernel/src/print.rs
+++ b/19_kernel_heap/kernel/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing.
 
diff --git a/19_kernel_heap/kernel/src/state.rs b/19_kernel_heap/kernel/src/state.rs
index 0af3688c2..6d99beedb 100644
--- a/19_kernel_heap/kernel/src/state.rs
+++ b/19_kernel_heap/kernel/src/state.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! State information about the kernel itself.
 
diff --git a/19_kernel_heap/kernel/src/symbols.rs b/19_kernel_heap/kernel/src/symbols.rs
index 680b8eaf6..fdc1d084c 100644
--- a/19_kernel_heap/kernel/src/symbols.rs
+++ b/19_kernel_heap/kernel/src/symbols.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Debug symbol support.
 
diff --git a/19_kernel_heap/kernel/src/synchronization.rs b/19_kernel_heap/kernel/src/synchronization.rs
index ab2b86e6f..5740b63e5 100644
--- a/19_kernel_heap/kernel/src/synchronization.rs
+++ b/19_kernel_heap/kernel/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/19_kernel_heap/kernel/src/time.rs b/19_kernel_heap/kernel/src/time.rs
index a6c0c5b6b..a9d501204 100644
--- a/19_kernel_heap/kernel/src/time.rs
+++ b/19_kernel_heap/kernel/src/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer primitives.
 
diff --git a/19_kernel_heap/kernel/tests/00_console_sanity.rb b/19_kernel_heap/kernel/tests/00_console_sanity.rb
index 4dde55762..8be7a2f14 100644
--- a/19_kernel_heap/kernel/tests/00_console_sanity.rb
+++ b/19_kernel_heap/kernel/tests/00_console_sanity.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'console_io_test'
 
@@ -40,9 +40,9 @@ def run(qemu_out, _qemu_in)
     end
 end
 
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 ## Test registration
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 def subtest_collection
     [TxRxHandshakeTest.new, TxStatisticsTest.new, RxStatisticsTest.new]
 end
diff --git a/19_kernel_heap/kernel/tests/00_console_sanity.rs b/19_kernel_heap/kernel/tests/00_console_sanity.rs
index 2c0225b7a..682ea9b8a 100644
--- a/19_kernel_heap/kernel/tests/00_console_sanity.rs
+++ b/19_kernel_heap/kernel/tests/00_console_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Console sanity tests - RX, TX and statistics.
 
diff --git a/19_kernel_heap/kernel/tests/01_timer_sanity.rs b/19_kernel_heap/kernel/tests/01_timer_sanity.rs
index 8188b9424..1581a02e0 100644
--- a/19_kernel_heap/kernel/tests/01_timer_sanity.rs
+++ b/19_kernel_heap/kernel/tests/01_timer_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer sanity tests.
 
diff --git a/19_kernel_heap/kernel/tests/02_exception_sync_page_fault.rs b/19_kernel_heap/kernel/tests/02_exception_sync_page_fault.rs
index fab44c8f0..09d177981 100644
--- a/19_kernel_heap/kernel/tests/02_exception_sync_page_fault.rs
+++ b/19_kernel_heap/kernel/tests/02_exception_sync_page_fault.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Page faults must result in synchronous exceptions.
 
diff --git a/19_kernel_heap/kernel/tests/03_exception_restore_sanity.rb b/19_kernel_heap/kernel/tests/03_exception_restore_sanity.rb
index 5f52e0c7c..02f51f741 100644
--- a/19_kernel_heap/kernel/tests/03_exception_restore_sanity.rb
+++ b/19_kernel_heap/kernel/tests/03_exception_restore_sanity.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'console_io_test'
 
@@ -17,9 +17,9 @@ def run(qemu_out, _qemu_in)
     end
 end
 
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 ## Test registration
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 def subtest_collection
     [ExceptionRestoreTest.new]
 end
diff --git a/19_kernel_heap/kernel/tests/03_exception_restore_sanity.rs b/19_kernel_heap/kernel/tests/03_exception_restore_sanity.rs
index f176c6a67..1a3029112 100644
--- a/19_kernel_heap/kernel/tests/03_exception_restore_sanity.rs
+++ b/19_kernel_heap/kernel/tests/03_exception_restore_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A simple sanity test to see if exception restore code works.
 
diff --git a/19_kernel_heap/kernel/tests/04_exception_irq_sanity.rs b/19_kernel_heap/kernel/tests/04_exception_irq_sanity.rs
index e6f94c91f..fcace8979 100644
--- a/19_kernel_heap/kernel/tests/04_exception_irq_sanity.rs
+++ b/19_kernel_heap/kernel/tests/04_exception_irq_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! IRQ handling sanity tests.
 
diff --git a/19_kernel_heap/kernel/tests/05_backtrace_sanity.rb b/19_kernel_heap/kernel/tests/05_backtrace_sanity.rb
index 5650f97c5..243e2fc86 100644
--- a/19_kernel_heap/kernel/tests/05_backtrace_sanity.rb
+++ b/19_kernel_heap/kernel/tests/05_backtrace_sanity.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'console_io_test'
 
@@ -31,9 +31,9 @@ def run(qemu_out, _qemu_in)
     end
 end
 
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 ## Test registration
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 def subtest_collection
     [PanicBacktraceTest.new, BacktraceCorrectnessTest.new]
 end
diff --git a/19_kernel_heap/kernel/tests/05_backtrace_sanity.rs b/19_kernel_heap/kernel/tests/05_backtrace_sanity.rs
index f75c0ea3e..66fd0a3e7 100644
--- a/19_kernel_heap/kernel/tests/05_backtrace_sanity.rs
+++ b/19_kernel_heap/kernel/tests/05_backtrace_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Test if backtracing code detects an invalid frame pointer.
 
diff --git a/19_kernel_heap/kernel/tests/06_backtrace_invalid_frame.rb b/19_kernel_heap/kernel/tests/06_backtrace_invalid_frame.rb
index 7601cf971..806954682 100644
--- a/19_kernel_heap/kernel/tests/06_backtrace_invalid_frame.rb
+++ b/19_kernel_heap/kernel/tests/06_backtrace_invalid_frame.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'console_io_test'
 
@@ -18,9 +18,9 @@ def run(qemu_out, _qemu_in)
     end
 end
 
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 ## Test registration
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 def subtest_collection
     [InvalidFramePointerTest.new]
 end
diff --git a/19_kernel_heap/kernel/tests/06_backtrace_invalid_frame.rs b/19_kernel_heap/kernel/tests/06_backtrace_invalid_frame.rs
index 33d3c02df..38411af69 100644
--- a/19_kernel_heap/kernel/tests/06_backtrace_invalid_frame.rs
+++ b/19_kernel_heap/kernel/tests/06_backtrace_invalid_frame.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Test if backtracing code detects an invalid frame pointer.
 
diff --git a/19_kernel_heap/kernel/tests/07_backtrace_invalid_link.rb b/19_kernel_heap/kernel/tests/07_backtrace_invalid_link.rb
index 0fabcf4c4..6b6f04132 100644
--- a/19_kernel_heap/kernel/tests/07_backtrace_invalid_link.rb
+++ b/19_kernel_heap/kernel/tests/07_backtrace_invalid_link.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'console_io_test'
 
@@ -17,9 +17,9 @@ def run(qemu_out, _qemu_in)
     end
 end
 
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 ## Test registration
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 def subtest_collection
     [InvalidLinkTest.new]
 end
diff --git a/19_kernel_heap/kernel/tests/07_backtrace_invalid_link.rs b/19_kernel_heap/kernel/tests/07_backtrace_invalid_link.rs
index bcb0538a6..6e0873dd1 100644
--- a/19_kernel_heap/kernel/tests/07_backtrace_invalid_link.rs
+++ b/19_kernel_heap/kernel/tests/07_backtrace_invalid_link.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Test if backtracing code detects an invalid link.
 
diff --git a/19_kernel_heap/kernel/tests/panic_exit_success/mod.rs b/19_kernel_heap/kernel/tests/panic_exit_success/mod.rs
index 908fac51c..449ad6f9f 100644
--- a/19_kernel_heap/kernel/tests/panic_exit_success/mod.rs
+++ b/19_kernel_heap/kernel/tests/panic_exit_success/mod.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 /// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
 #[no_mangle]
diff --git a/19_kernel_heap/kernel/tests/panic_wait_forever/mod.rs b/19_kernel_heap/kernel/tests/panic_wait_forever/mod.rs
index 7a4effa50..9ac191446 100644
--- a/19_kernel_heap/kernel/tests/panic_wait_forever/mod.rs
+++ b/19_kernel_heap/kernel/tests/panic_wait_forever/mod.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 /// Overwrites libkernel's `panic_wait::_panic_exit()` with wait_forever.
 #[no_mangle]
diff --git a/19_kernel_heap/kernel_symbols.mk b/19_kernel_heap/kernel_symbols.mk
index d496ea8ae..d38b7785a 100644
--- a/19_kernel_heap/kernel_symbols.mk
+++ b/19_kernel_heap/kernel_symbols.mk
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/format.mk
 include ../common/docker.mk
diff --git a/19_kernel_heap/kernel_symbols/src/main.rs b/19_kernel_heap/kernel_symbols/src/main.rs
index bd90b535d..38ce18f8f 100644
--- a/19_kernel_heap/kernel_symbols/src/main.rs
+++ b/19_kernel_heap/kernel_symbols/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Generation of kernel symbols.
 
diff --git a/19_kernel_heap/libraries/debug-symbol-types/src/lib.rs b/19_kernel_heap/libraries/debug-symbol-types/src/lib.rs
index b6dff082f..81c897bfa 100644
--- a/19_kernel_heap/libraries/debug-symbol-types/src/lib.rs
+++ b/19_kernel_heap/libraries/debug-symbol-types/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Types for implementing debug symbol support.
 
diff --git a/19_kernel_heap/libraries/test-macros/src/lib.rs b/19_kernel_heap/libraries/test-macros/src/lib.rs
index 9879677cf..52cf893dd 100644
--- a/19_kernel_heap/libraries/test-macros/src/lib.rs
+++ b/19_kernel_heap/libraries/test-macros/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 use proc_macro::TokenStream;
 use proc_macro2::Span;
diff --git a/19_kernel_heap/libraries/test-types/src/lib.rs b/19_kernel_heap/libraries/test-types/src/lib.rs
index 922c2a1c3..38961a9ce 100644
--- a/19_kernel_heap/libraries/test-types/src/lib.rs
+++ b/19_kernel_heap/libraries/test-types/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Types for the `custom_test_frameworks` implementation.
 
diff --git a/19_kernel_heap/tools/kernel_symbols_tool/cmds.rb b/19_kernel_heap/tools/kernel_symbols_tool/cmds.rb
index fe66ea71c..c43acb24c 100644
--- a/19_kernel_heap/tools/kernel_symbols_tool/cmds.rb
+++ b/19_kernel_heap/tools/kernel_symbols_tool/cmds.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 def generate_symbols(kernel_elf, output_file)
     File.open(output_file, 'w') do |file|
diff --git a/19_kernel_heap/tools/kernel_symbols_tool/kernel_elf.rb b/19_kernel_heap/tools/kernel_symbols_tool/kernel_elf.rb
index b16497673..32b5460aa 100644
--- a/19_kernel_heap/tools/kernel_symbols_tool/kernel_elf.rb
+++ b/19_kernel_heap/tools/kernel_symbols_tool/kernel_elf.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 # KernelELF
 class KernelELF
diff --git a/19_kernel_heap/tools/kernel_symbols_tool/main.rb b/19_kernel_heap/tools/kernel_symbols_tool/main.rb
index 30a8be6f5..899f96464 100755
--- a/19_kernel_heap/tools/kernel_symbols_tool/main.rb
+++ b/19_kernel_heap/tools/kernel_symbols_tool/main.rb
@@ -3,7 +3,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'rubygems'
 require 'bundler/setup'
diff --git a/19_kernel_heap/tools/translation_table_tool/arch.rb b/19_kernel_heap/tools/translation_table_tool/arch.rb
index deceb6d0c..61a6d6ca6 100644
--- a/19_kernel_heap/tools/translation_table_tool/arch.rb
+++ b/19_kernel_heap/tools/translation_table_tool/arch.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 # Bitfield manipulation.
 class BitField
diff --git a/19_kernel_heap/tools/translation_table_tool/bsp.rb b/19_kernel_heap/tools/translation_table_tool/bsp.rb
index dbab5ab6a..5887d7745 100644
--- a/19_kernel_heap/tools/translation_table_tool/bsp.rb
+++ b/19_kernel_heap/tools/translation_table_tool/bsp.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 # Raspberry Pi 3 + 4
 class RaspberryPi
diff --git a/19_kernel_heap/tools/translation_table_tool/generic.rb b/19_kernel_heap/tools/translation_table_tool/generic.rb
index eee8ccda2..941e2226f 100644
--- a/19_kernel_heap/tools/translation_table_tool/generic.rb
+++ b/19_kernel_heap/tools/translation_table_tool/generic.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 module Granule64KiB
     SIZE = 64 * 1024
@@ -161,7 +161,7 @@ def kernel_map_binary
     mapping_descriptors.each do |i|
         print 'Generating'.rjust(12).green.bold
         print ' '
-        puts i.to_s
+        puts i
 
         TRANSLATION_TABLES.map_at(i.virt_region, i.phys_region, i.attributes)
     end
diff --git a/19_kernel_heap/tools/translation_table_tool/kernel_elf.rb b/19_kernel_heap/tools/translation_table_tool/kernel_elf.rb
index f2d5b0b72..5ba78d9df 100644
--- a/19_kernel_heap/tools/translation_table_tool/kernel_elf.rb
+++ b/19_kernel_heap/tools/translation_table_tool/kernel_elf.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 # KernelELF
 class KernelELF
diff --git a/19_kernel_heap/tools/translation_table_tool/main.rb b/19_kernel_heap/tools/translation_table_tool/main.rb
index 6419e364e..22ab24fd5 100755
--- a/19_kernel_heap/tools/translation_table_tool/main.rb
+++ b/19_kernel_heap/tools/translation_table_tool/main.rb
@@ -3,7 +3,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'rubygems'
 require 'bundler/setup'
diff --git a/20_timer_callbacks/.vscode/settings.json b/20_timer_callbacks/.vscode/settings.json
index 292bf2a93..9ef30cd06 100644
--- a/20_timer_callbacks/.vscode/settings.json
+++ b/20_timer_callbacks/.vscode/settings.json
@@ -1,10 +1,10 @@
 {
-  "editor.formatOnSave": true,
-  "editor.rulers": [100],
-  "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.allTargets": false,
-  "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
-  "rust-analyzer.lens.debug": false,
-  "rust-analyzer.lens.run": false
+    "editor.formatOnSave": true,
+    "editor.rulers": [100],
+    "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
+    "rust-analyzer.cargo.features": ["bsp_rpi3"],
+    "rust-analyzer.checkOnSave.allTargets": false,
+    "rust-analyzer.checkOnSave.extraArgs": ["--lib", "--bins"],
+    "rust-analyzer.lens.debug": false,
+    "rust-analyzer.lens.run": false
 }
diff --git a/20_timer_callbacks/Makefile b/20_timer_callbacks/Makefile
index 43f5ad1f3..f9704a44c 100644
--- a/20_timer_callbacks/Makefile
+++ b/20_timer_callbacks/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/docker.mk
 include ../common/format.mk
diff --git a/20_timer_callbacks/README.md b/20_timer_callbacks/README.md
index da5a5510f..062d5912e 100644
--- a/20_timer_callbacks/README.md
+++ b/20_timer_callbacks/README.md
@@ -90,7 +90,7 @@ diff -uNr 19_kernel_heap/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_cont
 @@ -0,0 +1,173 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
-+// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
++// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 +
 +//! Local Interrupt Controller Driver.
 +//!
@@ -472,7 +472,7 @@ diff -uNr 19_kernel_heap/kernel/src/time.rs 20_timer_callbacks/kernel/src/time.r
 --- 19_kernel_heap/kernel/src/time.rs
 +++ 20_timer_callbacks/kernel/src/time.rs
 @@ -3,19 +3,54 @@
- // Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+ // Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
  //! Timer primitives.
 +//!
diff --git a/20_timer_callbacks/kernel/Cargo.toml b/20_timer_callbacks/kernel/Cargo.toml
index 87c9cbb6b..4a3b76d3e 100644
--- a/20_timer_callbacks/kernel/Cargo.toml
+++ b/20_timer_callbacks/kernel/Cargo.toml
@@ -11,9 +11,9 @@ bsp_rpi3 = ["tock-registers"]
 bsp_rpi4 = ["tock-registers"]
 test_build = ["qemu-exit"]
 
-##--------------------------------------------------------------------------------------------------
+##-------------------------------------------------------------------------------------------------
 ## Dependencies
-##--------------------------------------------------------------------------------------------------
+##-------------------------------------------------------------------------------------------------
 
 [dependencies]
 test-types = { path = "../libraries/test-types" }
@@ -28,9 +28,9 @@ qemu-exit = { version = "3.x.x", optional = true }
 [target.'cfg(target_arch = "aarch64")'.dependencies]
 aarch64-cpu = { version = "9.x.x" }
 
-##--------------------------------------------------------------------------------------------------
+##-------------------------------------------------------------------------------------------------
 ## Testing
-##--------------------------------------------------------------------------------------------------
+##-------------------------------------------------------------------------------------------------
 
 [dev-dependencies]
 test-macros = { path = "../libraries/test-macros" }
diff --git a/20_timer_callbacks/kernel/src/_arch/aarch64/backtrace.rs b/20_timer_callbacks/kernel/src/_arch/aarch64/backtrace.rs
index 3511c9184..c2fb8dcb4 100644
--- a/20_timer_callbacks/kernel/src/_arch/aarch64/backtrace.rs
+++ b/20_timer_callbacks/kernel/src/_arch/aarch64/backtrace.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural backtracing support.
 //!
diff --git a/20_timer_callbacks/kernel/src/_arch/aarch64/cpu.rs b/20_timer_callbacks/kernel/src/_arch/aarch64/cpu.rs
index 7eb7f010c..2d0104736 100644
--- a/20_timer_callbacks/kernel/src/_arch/aarch64/cpu.rs
+++ b/20_timer_callbacks/kernel/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 //!
diff --git a/20_timer_callbacks/kernel/src/_arch/aarch64/cpu/boot.rs b/20_timer_callbacks/kernel/src/_arch/aarch64/cpu/boot.rs
index d9662d3ac..b8033fbe8 100644
--- a/20_timer_callbacks/kernel/src/_arch/aarch64/cpu/boot.rs
+++ b/20_timer_callbacks/kernel/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/20_timer_callbacks/kernel/src/_arch/aarch64/cpu/boot.s b/20_timer_callbacks/kernel/src/_arch/aarch64/cpu/boot.s
index 1a8c88010..65d71b1a7 100644
--- a/20_timer_callbacks/kernel/src/_arch/aarch64/cpu/boot.s
+++ b/20_timer_callbacks/kernel/src/_arch/aarch64/cpu/boot.s
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //--------------------------------------------------------------------------------------------------
 // Definitions
diff --git a/20_timer_callbacks/kernel/src/_arch/aarch64/cpu/smp.rs b/20_timer_callbacks/kernel/src/_arch/aarch64/cpu/smp.rs
index 9d304d657..491920389 100644
--- a/20_timer_callbacks/kernel/src/_arch/aarch64/cpu/smp.rs
+++ b/20_timer_callbacks/kernel/src/_arch/aarch64/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural symmetric multiprocessing.
 //!
diff --git a/20_timer_callbacks/kernel/src/_arch/aarch64/exception.rs b/20_timer_callbacks/kernel/src/_arch/aarch64/exception.rs
index a8bc0d2f3..ab4640815 100644
--- a/20_timer_callbacks/kernel/src/_arch/aarch64/exception.rs
+++ b/20_timer_callbacks/kernel/src/_arch/aarch64/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural synchronous and asynchronous exception handling.
 //!
diff --git a/20_timer_callbacks/kernel/src/_arch/aarch64/exception.s b/20_timer_callbacks/kernel/src/_arch/aarch64/exception.s
index cdef8c586..a806a276b 100644
--- a/20_timer_callbacks/kernel/src/_arch/aarch64/exception.s
+++ b/20_timer_callbacks/kernel/src/_arch/aarch64/exception.s
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //--------------------------------------------------------------------------------------------------
 // Definitions
diff --git a/20_timer_callbacks/kernel/src/_arch/aarch64/exception/asynchronous.rs b/20_timer_callbacks/kernel/src/_arch/aarch64/exception/asynchronous.rs
index f545a3e19..811ef138e 100644
--- a/20_timer_callbacks/kernel/src/_arch/aarch64/exception/asynchronous.rs
+++ b/20_timer_callbacks/kernel/src/_arch/aarch64/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural asynchronous exception handling.
 //!
diff --git a/20_timer_callbacks/kernel/src/_arch/aarch64/memory/mmu.rs b/20_timer_callbacks/kernel/src/_arch/aarch64/memory/mmu.rs
index 74a71d114..984b2e04f 100644
--- a/20_timer_callbacks/kernel/src/_arch/aarch64/memory/mmu.rs
+++ b/20_timer_callbacks/kernel/src/_arch/aarch64/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit Driver.
 //!
diff --git a/20_timer_callbacks/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs b/20_timer_callbacks/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
index f0b4ac85f..21fae3b82 100644
--- a/20_timer_callbacks/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
+++ b/20_timer_callbacks/kernel/src/_arch/aarch64/memory/mmu/translation_table.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural translation table.
 //!
diff --git a/20_timer_callbacks/kernel/src/_arch/aarch64/time.rs b/20_timer_callbacks/kernel/src/_arch/aarch64/time.rs
index 2807bc322..37ebf44be 100644
--- a/20_timer_callbacks/kernel/src/_arch/aarch64/time.rs
+++ b/20_timer_callbacks/kernel/src/_arch/aarch64/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
 //!
diff --git a/20_timer_callbacks/kernel/src/backtrace.rs b/20_timer_callbacks/kernel/src/backtrace.rs
index 22de6c48e..a6af2fccc 100644
--- a/20_timer_callbacks/kernel/src/backtrace.rs
+++ b/20_timer_callbacks/kernel/src/backtrace.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Backtracing support.
 
diff --git a/20_timer_callbacks/kernel/src/bsp.rs b/20_timer_callbacks/kernel/src/bsp.rs
index 824787f65..246973bc0 100644
--- a/20_timer_callbacks/kernel/src/bsp.rs
+++ b/20_timer_callbacks/kernel/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/20_timer_callbacks/kernel/src/bsp/device_driver.rs b/20_timer_callbacks/kernel/src/bsp/device_driver.rs
index eafaf7754..2dfaec8d6 100644
--- a/20_timer_callbacks/kernel/src/bsp/device_driver.rs
+++ b/20_timer_callbacks/kernel/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/20_timer_callbacks/kernel/src/bsp/device_driver/arm.rs b/20_timer_callbacks/kernel/src/bsp/device_driver/arm.rs
index e83e24c92..8d1cbfbd8 100644
--- a/20_timer_callbacks/kernel/src/bsp/device_driver/arm.rs
+++ b/20_timer_callbacks/kernel/src/bsp/device_driver/arm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! ARM driver top level.
 
diff --git a/20_timer_callbacks/kernel/src/bsp/device_driver/arm/gicv2.rs b/20_timer_callbacks/kernel/src/bsp/device_driver/arm/gicv2.rs
index fee8bb4cc..7dabf7934 100644
--- a/20_timer_callbacks/kernel/src/bsp/device_driver/arm/gicv2.rs
+++ b/20_timer_callbacks/kernel/src/bsp/device_driver/arm/gicv2.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICv2 Driver - ARM Generic Interrupt Controller v2.
 //!
diff --git a/20_timer_callbacks/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs b/20_timer_callbacks/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
index 1a02fc650..0fd16bb38 100644
--- a/20_timer_callbacks/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
+++ b/20_timer_callbacks/kernel/src/bsp/device_driver/arm/gicv2/gicc.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICC Driver - GIC CPU interface.
 
diff --git a/20_timer_callbacks/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs b/20_timer_callbacks/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
index 8aebcf2b6..1fc9d70e9 100644
--- a/20_timer_callbacks/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
+++ b/20_timer_callbacks/kernel/src/bsp/device_driver/arm/gicv2/gicd.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GICD Driver - GIC Distributor.
 //!
diff --git a/20_timer_callbacks/kernel/src/bsp/device_driver/bcm.rs b/20_timer_callbacks/kernel/src/bsp/device_driver/bcm.rs
index 5a7cc23be..7b7c288b7 100644
--- a/20_timer_callbacks/kernel/src/bsp/device_driver/bcm.rs
+++ b/20_timer_callbacks/kernel/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index fb61a6510..812156f44 100644
--- a/20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs b/20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
index 6c2cd451b..d32bd8db4 100644
--- a/20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
+++ b/20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Interrupt Controller Driver.
 
diff --git a/20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/local_ic.rs b/20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/local_ic.rs
index ac382e953..b5e4974be 100644
--- a/20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/local_ic.rs
+++ b/20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/local_ic.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Local Interrupt Controller Driver.
 //!
diff --git a/20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs b/20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
index 238088a8c..029c1e742 100644
--- a/20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
+++ b/20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_interrupt_controller/peripheral_ic.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Peripheral Interrupt Controller Driver.
 //!
diff --git a/20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index 3e7e1812c..3d5809755 100644
--- a/20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/20_timer_callbacks/kernel/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 //!
diff --git a/20_timer_callbacks/kernel/src/bsp/device_driver/common.rs b/20_timer_callbacks/kernel/src/bsp/device_driver/common.rs
index ca7aeb76a..3ce1d8d81 100644
--- a/20_timer_callbacks/kernel/src/bsp/device_driver/common.rs
+++ b/20_timer_callbacks/kernel/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/20_timer_callbacks/kernel/src/bsp/raspberrypi.rs b/20_timer_callbacks/kernel/src/bsp/raspberrypi.rs
index 474419f4e..30421dfa6 100644
--- a/20_timer_callbacks/kernel/src/bsp/raspberrypi.rs
+++ b/20_timer_callbacks/kernel/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/20_timer_callbacks/kernel/src/bsp/raspberrypi/cpu.rs b/20_timer_callbacks/kernel/src/bsp/raspberrypi/cpu.rs
index 85fb89e49..65cf5abbe 100644
--- a/20_timer_callbacks/kernel/src/bsp/raspberrypi/cpu.rs
+++ b/20_timer_callbacks/kernel/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/20_timer_callbacks/kernel/src/bsp/raspberrypi/driver.rs b/20_timer_callbacks/kernel/src/bsp/raspberrypi/driver.rs
index a23b08c07..d02909e3a 100644
--- a/20_timer_callbacks/kernel/src/bsp/raspberrypi/driver.rs
+++ b/20_timer_callbacks/kernel/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/20_timer_callbacks/kernel/src/bsp/raspberrypi/exception.rs b/20_timer_callbacks/kernel/src/bsp/raspberrypi/exception.rs
index aa6c5a63f..a9eaa6ac4 100644
--- a/20_timer_callbacks/kernel/src/bsp/raspberrypi/exception.rs
+++ b/20_timer_callbacks/kernel/src/bsp/raspberrypi/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP synchronous and asynchronous exception handling.
 
diff --git a/20_timer_callbacks/kernel/src/bsp/raspberrypi/exception/asynchronous.rs b/20_timer_callbacks/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
index b2cb955ef..82935adbe 100644
--- a/20_timer_callbacks/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
+++ b/20_timer_callbacks/kernel/src/bsp/raspberrypi/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP asynchronous exception handling.
 
diff --git a/20_timer_callbacks/kernel/src/bsp/raspberrypi/memory.rs b/20_timer_callbacks/kernel/src/bsp/raspberrypi/memory.rs
index d07c9695c..f8c9b6a1a 100644
--- a/20_timer_callbacks/kernel/src/bsp/raspberrypi/memory.rs
+++ b/20_timer_callbacks/kernel/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 //!
diff --git a/20_timer_callbacks/kernel/src/bsp/raspberrypi/memory/mmu.rs b/20_timer_callbacks/kernel/src/bsp/raspberrypi/memory/mmu.rs
index bb2f82083..ef52e3686 100644
--- a/20_timer_callbacks/kernel/src/bsp/raspberrypi/memory/mmu.rs
+++ b/20_timer_callbacks/kernel/src/bsp/raspberrypi/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management Unit.
 
diff --git a/20_timer_callbacks/kernel/src/common.rs b/20_timer_callbacks/kernel/src/common.rs
index f32f650fb..2ad7e4c1e 100644
--- a/20_timer_callbacks/kernel/src/common.rs
+++ b/20_timer_callbacks/kernel/src/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! General purpose code.
 
diff --git a/20_timer_callbacks/kernel/src/console.rs b/20_timer_callbacks/kernel/src/console.rs
index ff1d8ddc3..5efa9395b 100644
--- a/20_timer_callbacks/kernel/src/console.rs
+++ b/20_timer_callbacks/kernel/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/20_timer_callbacks/kernel/src/console/buffer_console.rs b/20_timer_callbacks/kernel/src/console/buffer_console.rs
index c3259f898..05903e7cf 100644
--- a/20_timer_callbacks/kernel/src/console/buffer_console.rs
+++ b/20_timer_callbacks/kernel/src/console/buffer_console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A console that buffers input during the init phase.
 
diff --git a/20_timer_callbacks/kernel/src/cpu.rs b/20_timer_callbacks/kernel/src/cpu.rs
index e1493d1dd..8716a918b 100644
--- a/20_timer_callbacks/kernel/src/cpu.rs
+++ b/20_timer_callbacks/kernel/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/20_timer_callbacks/kernel/src/cpu/boot.rs b/20_timer_callbacks/kernel/src/cpu/boot.rs
index 8091dac36..b1e98328a 100644
--- a/20_timer_callbacks/kernel/src/cpu/boot.rs
+++ b/20_timer_callbacks/kernel/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/20_timer_callbacks/kernel/src/cpu/smp.rs b/20_timer_callbacks/kernel/src/cpu/smp.rs
index 57386f79b..de612d589 100644
--- a/20_timer_callbacks/kernel/src/cpu/smp.rs
+++ b/20_timer_callbacks/kernel/src/cpu/smp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Symmetric multiprocessing.
 
diff --git a/20_timer_callbacks/kernel/src/driver.rs b/20_timer_callbacks/kernel/src/driver.rs
index 2f22fd205..88b41b818 100644
--- a/20_timer_callbacks/kernel/src/driver.rs
+++ b/20_timer_callbacks/kernel/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/20_timer_callbacks/kernel/src/exception.rs b/20_timer_callbacks/kernel/src/exception.rs
index 7ea7cd806..3d5f219f3 100644
--- a/20_timer_callbacks/kernel/src/exception.rs
+++ b/20_timer_callbacks/kernel/src/exception.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronous and asynchronous exception handling.
 
diff --git a/20_timer_callbacks/kernel/src/exception/asynchronous.rs b/20_timer_callbacks/kernel/src/exception/asynchronous.rs
index c1f2a27b3..2c874dd60 100644
--- a/20_timer_callbacks/kernel/src/exception/asynchronous.rs
+++ b/20_timer_callbacks/kernel/src/exception/asynchronous.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Asynchronous exception handling.
 
diff --git a/20_timer_callbacks/kernel/src/exception/asynchronous/null_irq_manager.rs b/20_timer_callbacks/kernel/src/exception/asynchronous/null_irq_manager.rs
index 438f96496..38919ffe4 100644
--- a/20_timer_callbacks/kernel/src/exception/asynchronous/null_irq_manager.rs
+++ b/20_timer_callbacks/kernel/src/exception/asynchronous/null_irq_manager.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Null IRQ Manager.
 
diff --git a/20_timer_callbacks/kernel/src/lib.rs b/20_timer_callbacks/kernel/src/lib.rs
index bba0fcc7d..317bcc727 100644
--- a/20_timer_callbacks/kernel/src/lib.rs
+++ b/20_timer_callbacks/kernel/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(
diff --git a/20_timer_callbacks/kernel/src/main.rs b/20_timer_callbacks/kernel/src/main.rs
index 28b75340e..249b27180 100644
--- a/20_timer_callbacks/kernel/src/main.rs
+++ b/20_timer_callbacks/kernel/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(
diff --git a/20_timer_callbacks/kernel/src/memory.rs b/20_timer_callbacks/kernel/src/memory.rs
index a64bfbae8..bc6113366 100644
--- a/20_timer_callbacks/kernel/src/memory.rs
+++ b/20_timer_callbacks/kernel/src/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management.
 
diff --git a/20_timer_callbacks/kernel/src/memory/heap_alloc.rs b/20_timer_callbacks/kernel/src/memory/heap_alloc.rs
index c0f56d8d6..cf4298fa4 100644
--- a/20_timer_callbacks/kernel/src/memory/heap_alloc.rs
+++ b/20_timer_callbacks/kernel/src/memory/heap_alloc.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Heap allocation.
 
diff --git a/20_timer_callbacks/kernel/src/memory/mmu.rs b/20_timer_callbacks/kernel/src/memory/mmu.rs
index 8d204a4ef..abe3b1813 100644
--- a/20_timer_callbacks/kernel/src/memory/mmu.rs
+++ b/20_timer_callbacks/kernel/src/memory/mmu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit.
 
diff --git a/20_timer_callbacks/kernel/src/memory/mmu/mapping_record.rs b/20_timer_callbacks/kernel/src/memory/mmu/mapping_record.rs
index 4e9395da4..9c17258d1 100644
--- a/20_timer_callbacks/kernel/src/memory/mmu/mapping_record.rs
+++ b/20_timer_callbacks/kernel/src/memory/mmu/mapping_record.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A record of mapped pages.
 
diff --git a/20_timer_callbacks/kernel/src/memory/mmu/page_alloc.rs b/20_timer_callbacks/kernel/src/memory/mmu/page_alloc.rs
index 347fcd343..344afd200 100644
--- a/20_timer_callbacks/kernel/src/memory/mmu/page_alloc.rs
+++ b/20_timer_callbacks/kernel/src/memory/mmu/page_alloc.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Page allocation.
 
diff --git a/20_timer_callbacks/kernel/src/memory/mmu/translation_table.rs b/20_timer_callbacks/kernel/src/memory/mmu/translation_table.rs
index 9301bb0cd..341ffc5c8 100644
--- a/20_timer_callbacks/kernel/src/memory/mmu/translation_table.rs
+++ b/20_timer_callbacks/kernel/src/memory/mmu/translation_table.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Translation table.
 
diff --git a/20_timer_callbacks/kernel/src/memory/mmu/types.rs b/20_timer_callbacks/kernel/src/memory/mmu/types.rs
index 62f3926ea..f6ac8d598 100644
--- a/20_timer_callbacks/kernel/src/memory/mmu/types.rs
+++ b/20_timer_callbacks/kernel/src/memory/mmu/types.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Memory Management Unit types.
 
diff --git a/20_timer_callbacks/kernel/src/panic_wait.rs b/20_timer_callbacks/kernel/src/panic_wait.rs
index bc95f77c4..389eb2c88 100644
--- a/20_timer_callbacks/kernel/src/panic_wait.rs
+++ b/20_timer_callbacks/kernel/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/20_timer_callbacks/kernel/src/print.rs b/20_timer_callbacks/kernel/src/print.rs
index 8d56d2e4a..a89f8201d 100644
--- a/20_timer_callbacks/kernel/src/print.rs
+++ b/20_timer_callbacks/kernel/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing.
 
diff --git a/20_timer_callbacks/kernel/src/state.rs b/20_timer_callbacks/kernel/src/state.rs
index 0af3688c2..6d99beedb 100644
--- a/20_timer_callbacks/kernel/src/state.rs
+++ b/20_timer_callbacks/kernel/src/state.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! State information about the kernel itself.
 
diff --git a/20_timer_callbacks/kernel/src/symbols.rs b/20_timer_callbacks/kernel/src/symbols.rs
index 680b8eaf6..fdc1d084c 100644
--- a/20_timer_callbacks/kernel/src/symbols.rs
+++ b/20_timer_callbacks/kernel/src/symbols.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Debug symbol support.
 
diff --git a/20_timer_callbacks/kernel/src/synchronization.rs b/20_timer_callbacks/kernel/src/synchronization.rs
index ab2b86e6f..5740b63e5 100644
--- a/20_timer_callbacks/kernel/src/synchronization.rs
+++ b/20_timer_callbacks/kernel/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/20_timer_callbacks/kernel/src/time.rs b/20_timer_callbacks/kernel/src/time.rs
index 801941827..5767a3e63 100644
--- a/20_timer_callbacks/kernel/src/time.rs
+++ b/20_timer_callbacks/kernel/src/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer primitives.
 //!
diff --git a/20_timer_callbacks/kernel/tests/00_console_sanity.rb b/20_timer_callbacks/kernel/tests/00_console_sanity.rb
index 4dde55762..8be7a2f14 100644
--- a/20_timer_callbacks/kernel/tests/00_console_sanity.rb
+++ b/20_timer_callbacks/kernel/tests/00_console_sanity.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'console_io_test'
 
@@ -40,9 +40,9 @@ def run(qemu_out, _qemu_in)
     end
 end
 
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 ## Test registration
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 def subtest_collection
     [TxRxHandshakeTest.new, TxStatisticsTest.new, RxStatisticsTest.new]
 end
diff --git a/20_timer_callbacks/kernel/tests/00_console_sanity.rs b/20_timer_callbacks/kernel/tests/00_console_sanity.rs
index 2c0225b7a..682ea9b8a 100644
--- a/20_timer_callbacks/kernel/tests/00_console_sanity.rs
+++ b/20_timer_callbacks/kernel/tests/00_console_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Console sanity tests - RX, TX and statistics.
 
diff --git a/20_timer_callbacks/kernel/tests/01_timer_sanity.rs b/20_timer_callbacks/kernel/tests/01_timer_sanity.rs
index 8188b9424..1581a02e0 100644
--- a/20_timer_callbacks/kernel/tests/01_timer_sanity.rs
+++ b/20_timer_callbacks/kernel/tests/01_timer_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer sanity tests.
 
diff --git a/20_timer_callbacks/kernel/tests/02_exception_sync_page_fault.rs b/20_timer_callbacks/kernel/tests/02_exception_sync_page_fault.rs
index fab44c8f0..09d177981 100644
--- a/20_timer_callbacks/kernel/tests/02_exception_sync_page_fault.rs
+++ b/20_timer_callbacks/kernel/tests/02_exception_sync_page_fault.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Page faults must result in synchronous exceptions.
 
diff --git a/20_timer_callbacks/kernel/tests/03_exception_restore_sanity.rb b/20_timer_callbacks/kernel/tests/03_exception_restore_sanity.rb
index 5f52e0c7c..02f51f741 100644
--- a/20_timer_callbacks/kernel/tests/03_exception_restore_sanity.rb
+++ b/20_timer_callbacks/kernel/tests/03_exception_restore_sanity.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'console_io_test'
 
@@ -17,9 +17,9 @@ def run(qemu_out, _qemu_in)
     end
 end
 
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 ## Test registration
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 def subtest_collection
     [ExceptionRestoreTest.new]
 end
diff --git a/20_timer_callbacks/kernel/tests/03_exception_restore_sanity.rs b/20_timer_callbacks/kernel/tests/03_exception_restore_sanity.rs
index f176c6a67..1a3029112 100644
--- a/20_timer_callbacks/kernel/tests/03_exception_restore_sanity.rs
+++ b/20_timer_callbacks/kernel/tests/03_exception_restore_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A simple sanity test to see if exception restore code works.
 
diff --git a/20_timer_callbacks/kernel/tests/04_exception_irq_sanity.rs b/20_timer_callbacks/kernel/tests/04_exception_irq_sanity.rs
index e6f94c91f..fcace8979 100644
--- a/20_timer_callbacks/kernel/tests/04_exception_irq_sanity.rs
+++ b/20_timer_callbacks/kernel/tests/04_exception_irq_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! IRQ handling sanity tests.
 
diff --git a/20_timer_callbacks/kernel/tests/05_backtrace_sanity.rb b/20_timer_callbacks/kernel/tests/05_backtrace_sanity.rb
index 5650f97c5..243e2fc86 100644
--- a/20_timer_callbacks/kernel/tests/05_backtrace_sanity.rb
+++ b/20_timer_callbacks/kernel/tests/05_backtrace_sanity.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'console_io_test'
 
@@ -31,9 +31,9 @@ def run(qemu_out, _qemu_in)
     end
 end
 
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 ## Test registration
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 def subtest_collection
     [PanicBacktraceTest.new, BacktraceCorrectnessTest.new]
 end
diff --git a/20_timer_callbacks/kernel/tests/05_backtrace_sanity.rs b/20_timer_callbacks/kernel/tests/05_backtrace_sanity.rs
index f75c0ea3e..66fd0a3e7 100644
--- a/20_timer_callbacks/kernel/tests/05_backtrace_sanity.rs
+++ b/20_timer_callbacks/kernel/tests/05_backtrace_sanity.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Test if backtracing code detects an invalid frame pointer.
 
diff --git a/20_timer_callbacks/kernel/tests/06_backtrace_invalid_frame.rb b/20_timer_callbacks/kernel/tests/06_backtrace_invalid_frame.rb
index 7601cf971..806954682 100644
--- a/20_timer_callbacks/kernel/tests/06_backtrace_invalid_frame.rb
+++ b/20_timer_callbacks/kernel/tests/06_backtrace_invalid_frame.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'console_io_test'
 
@@ -18,9 +18,9 @@ def run(qemu_out, _qemu_in)
     end
 end
 
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 ## Test registration
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 def subtest_collection
     [InvalidFramePointerTest.new]
 end
diff --git a/20_timer_callbacks/kernel/tests/06_backtrace_invalid_frame.rs b/20_timer_callbacks/kernel/tests/06_backtrace_invalid_frame.rs
index 33d3c02df..38411af69 100644
--- a/20_timer_callbacks/kernel/tests/06_backtrace_invalid_frame.rs
+++ b/20_timer_callbacks/kernel/tests/06_backtrace_invalid_frame.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Test if backtracing code detects an invalid frame pointer.
 
diff --git a/20_timer_callbacks/kernel/tests/07_backtrace_invalid_link.rb b/20_timer_callbacks/kernel/tests/07_backtrace_invalid_link.rb
index 0fabcf4c4..6b6f04132 100644
--- a/20_timer_callbacks/kernel/tests/07_backtrace_invalid_link.rb
+++ b/20_timer_callbacks/kernel/tests/07_backtrace_invalid_link.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'console_io_test'
 
@@ -17,9 +17,9 @@ def run(qemu_out, _qemu_in)
     end
 end
 
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 ## Test registration
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 def subtest_collection
     [InvalidLinkTest.new]
 end
diff --git a/20_timer_callbacks/kernel/tests/07_backtrace_invalid_link.rs b/20_timer_callbacks/kernel/tests/07_backtrace_invalid_link.rs
index bcb0538a6..6e0873dd1 100644
--- a/20_timer_callbacks/kernel/tests/07_backtrace_invalid_link.rs
+++ b/20_timer_callbacks/kernel/tests/07_backtrace_invalid_link.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Test if backtracing code detects an invalid link.
 
diff --git a/20_timer_callbacks/kernel/tests/panic_exit_success/mod.rs b/20_timer_callbacks/kernel/tests/panic_exit_success/mod.rs
index 908fac51c..449ad6f9f 100644
--- a/20_timer_callbacks/kernel/tests/panic_exit_success/mod.rs
+++ b/20_timer_callbacks/kernel/tests/panic_exit_success/mod.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 /// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
 #[no_mangle]
diff --git a/20_timer_callbacks/kernel/tests/panic_wait_forever/mod.rs b/20_timer_callbacks/kernel/tests/panic_wait_forever/mod.rs
index 7a4effa50..9ac191446 100644
--- a/20_timer_callbacks/kernel/tests/panic_wait_forever/mod.rs
+++ b/20_timer_callbacks/kernel/tests/panic_wait_forever/mod.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 /// Overwrites libkernel's `panic_wait::_panic_exit()` with wait_forever.
 #[no_mangle]
diff --git a/20_timer_callbacks/kernel_symbols.mk b/20_timer_callbacks/kernel_symbols.mk
index d496ea8ae..d38b7785a 100644
--- a/20_timer_callbacks/kernel_symbols.mk
+++ b/20_timer_callbacks/kernel_symbols.mk
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/format.mk
 include ../common/docker.mk
diff --git a/20_timer_callbacks/kernel_symbols/kernel_symbols.ld b/20_timer_callbacks/kernel_symbols/kernel_symbols.ld
index 0625f0086..16724a07d 100644
--- a/20_timer_callbacks/kernel_symbols/kernel_symbols.ld
+++ b/20_timer_callbacks/kernel_symbols/kernel_symbols.ld
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT OR Apache-2.0
  *
- * Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+ * Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
  */
 
 SECTIONS
diff --git a/20_timer_callbacks/kernel_symbols/src/main.rs b/20_timer_callbacks/kernel_symbols/src/main.rs
index bd90b535d..38ce18f8f 100644
--- a/20_timer_callbacks/kernel_symbols/src/main.rs
+++ b/20_timer_callbacks/kernel_symbols/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Generation of kernel symbols.
 
diff --git a/20_timer_callbacks/libraries/debug-symbol-types/src/lib.rs b/20_timer_callbacks/libraries/debug-symbol-types/src/lib.rs
index b6dff082f..81c897bfa 100644
--- a/20_timer_callbacks/libraries/debug-symbol-types/src/lib.rs
+++ b/20_timer_callbacks/libraries/debug-symbol-types/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Types for implementing debug symbol support.
 
diff --git a/20_timer_callbacks/libraries/test-macros/src/lib.rs b/20_timer_callbacks/libraries/test-macros/src/lib.rs
index 9879677cf..52cf893dd 100644
--- a/20_timer_callbacks/libraries/test-macros/src/lib.rs
+++ b/20_timer_callbacks/libraries/test-macros/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 use proc_macro::TokenStream;
 use proc_macro2::Span;
diff --git a/20_timer_callbacks/libraries/test-types/src/lib.rs b/20_timer_callbacks/libraries/test-types/src/lib.rs
index 922c2a1c3..38961a9ce 100644
--- a/20_timer_callbacks/libraries/test-types/src/lib.rs
+++ b/20_timer_callbacks/libraries/test-types/src/lib.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Types for the `custom_test_frameworks` implementation.
 
diff --git a/20_timer_callbacks/tools/kernel_symbols_tool/cmds.rb b/20_timer_callbacks/tools/kernel_symbols_tool/cmds.rb
index fe66ea71c..c43acb24c 100644
--- a/20_timer_callbacks/tools/kernel_symbols_tool/cmds.rb
+++ b/20_timer_callbacks/tools/kernel_symbols_tool/cmds.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 def generate_symbols(kernel_elf, output_file)
     File.open(output_file, 'w') do |file|
diff --git a/20_timer_callbacks/tools/kernel_symbols_tool/kernel_elf.rb b/20_timer_callbacks/tools/kernel_symbols_tool/kernel_elf.rb
index b16497673..32b5460aa 100644
--- a/20_timer_callbacks/tools/kernel_symbols_tool/kernel_elf.rb
+++ b/20_timer_callbacks/tools/kernel_symbols_tool/kernel_elf.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 # KernelELF
 class KernelELF
diff --git a/20_timer_callbacks/tools/kernel_symbols_tool/main.rb b/20_timer_callbacks/tools/kernel_symbols_tool/main.rb
index 30a8be6f5..899f96464 100755
--- a/20_timer_callbacks/tools/kernel_symbols_tool/main.rb
+++ b/20_timer_callbacks/tools/kernel_symbols_tool/main.rb
@@ -3,7 +3,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'rubygems'
 require 'bundler/setup'
diff --git a/20_timer_callbacks/tools/translation_table_tool/arch.rb b/20_timer_callbacks/tools/translation_table_tool/arch.rb
index deceb6d0c..61a6d6ca6 100644
--- a/20_timer_callbacks/tools/translation_table_tool/arch.rb
+++ b/20_timer_callbacks/tools/translation_table_tool/arch.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 # Bitfield manipulation.
 class BitField
diff --git a/20_timer_callbacks/tools/translation_table_tool/bsp.rb b/20_timer_callbacks/tools/translation_table_tool/bsp.rb
index dbab5ab6a..5887d7745 100644
--- a/20_timer_callbacks/tools/translation_table_tool/bsp.rb
+++ b/20_timer_callbacks/tools/translation_table_tool/bsp.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 # Raspberry Pi 3 + 4
 class RaspberryPi
diff --git a/20_timer_callbacks/tools/translation_table_tool/generic.rb b/20_timer_callbacks/tools/translation_table_tool/generic.rb
index eee8ccda2..941e2226f 100644
--- a/20_timer_callbacks/tools/translation_table_tool/generic.rb
+++ b/20_timer_callbacks/tools/translation_table_tool/generic.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 module Granule64KiB
     SIZE = 64 * 1024
@@ -161,7 +161,7 @@ def kernel_map_binary
     mapping_descriptors.each do |i|
         print 'Generating'.rjust(12).green.bold
         print ' '
-        puts i.to_s
+        puts i
 
         TRANSLATION_TABLES.map_at(i.virt_region, i.phys_region, i.attributes)
     end
diff --git a/20_timer_callbacks/tools/translation_table_tool/kernel_elf.rb b/20_timer_callbacks/tools/translation_table_tool/kernel_elf.rb
index f2d5b0b72..5ba78d9df 100644
--- a/20_timer_callbacks/tools/translation_table_tool/kernel_elf.rb
+++ b/20_timer_callbacks/tools/translation_table_tool/kernel_elf.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 # KernelELF
 class KernelELF
diff --git a/20_timer_callbacks/tools/translation_table_tool/main.rb b/20_timer_callbacks/tools/translation_table_tool/main.rb
index 6419e364e..22ab24fd5 100755
--- a/20_timer_callbacks/tools/translation_table_tool/main.rb
+++ b/20_timer_callbacks/tools/translation_table_tool/main.rb
@@ -3,7 +3,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'rubygems'
 require 'bundler/setup'
diff --git a/LICENSE-MIT b/LICENSE-MIT
index d36a7e184..af7f918ff 100644
--- a/LICENSE-MIT
+++ b/LICENSE-MIT
@@ -1,6 +1,6 @@
 MIT License
 
-Copyright (C) 2018-2022 by the respective authors
+Copyright (C) 2018-2023 by the respective authors
 
 Permission is hereby granted, free of charge, to any person obtaining a copy
 of this software and associated documentation files (the "Software"), to deal
diff --git a/X1_JTAG_boot/.vscode/settings.json b/X1_JTAG_boot/.vscode/settings.json
index d1916456a..bfa278e9a 100644
--- a/X1_JTAG_boot/.vscode/settings.json
+++ b/X1_JTAG_boot/.vscode/settings.json
@@ -1,10 +1,10 @@
 {
-  "editor.formatOnSave": true,
-  "editor.rulers": [100],
-  "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
-  "rust-analyzer.cargo.features": ["bsp_rpi3"],
-  "rust-analyzer.checkOnSave.allTargets": false,
-  "rust-analyzer.checkOnSave.extraArgs": ["--bins"],
-  "rust-analyzer.lens.debug": false,
-  "rust-analyzer.lens.run": false
+    "editor.formatOnSave": true,
+    "editor.rulers": [100],
+    "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
+    "rust-analyzer.cargo.features": ["bsp_rpi3"],
+    "rust-analyzer.checkOnSave.allTargets": false,
+    "rust-analyzer.checkOnSave.extraArgs": ["--bins"],
+    "rust-analyzer.lens.debug": false,
+    "rust-analyzer.lens.run": false
 }
diff --git a/X1_JTAG_boot/Makefile b/X1_JTAG_boot/Makefile
index 23de6557b..b13f0dfb7 100644
--- a/X1_JTAG_boot/Makefile
+++ b/X1_JTAG_boot/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 include ../common/docker.mk
 include ../common/format.mk
diff --git a/X1_JTAG_boot/src/_arch/aarch64/cpu.rs b/X1_JTAG_boot/src/_arch/aarch64/cpu.rs
index bbe7687ae..602c9789c 100644
--- a/X1_JTAG_boot/src/_arch/aarch64/cpu.rs
+++ b/X1_JTAG_boot/src/_arch/aarch64/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural processor code.
 //!
diff --git a/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.rs b/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.rs
index 8390c0132..2a6c46492 100644
--- a/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.rs
+++ b/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural boot code.
 //!
diff --git a/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s b/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s
index aa701fd1b..78f8c321d 100644
--- a/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s
+++ b/X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //--------------------------------------------------------------------------------------------------
 // Definitions
diff --git a/X1_JTAG_boot/src/_arch/aarch64/time.rs b/X1_JTAG_boot/src/_arch/aarch64/time.rs
index 400b3dcca..eb97b8be9 100644
--- a/X1_JTAG_boot/src/_arch/aarch64/time.rs
+++ b/X1_JTAG_boot/src/_arch/aarch64/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Architectural timer primitives.
 //!
diff --git a/X1_JTAG_boot/src/bsp.rs b/X1_JTAG_boot/src/bsp.rs
index 824787f65..246973bc0 100644
--- a/X1_JTAG_boot/src/bsp.rs
+++ b/X1_JTAG_boot/src/bsp.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Conditional reexporting of Board Support Packages.
 
diff --git a/X1_JTAG_boot/src/bsp/device_driver.rs b/X1_JTAG_boot/src/bsp/device_driver.rs
index 6e9bf8f39..64049a4cf 100644
--- a/X1_JTAG_boot/src/bsp/device_driver.rs
+++ b/X1_JTAG_boot/src/bsp/device_driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Device driver.
 
diff --git a/X1_JTAG_boot/src/bsp/device_driver/bcm.rs b/X1_JTAG_boot/src/bsp/device_driver/bcm.rs
index b4b7906e5..1c343d1d7 100644
--- a/X1_JTAG_boot/src/bsp/device_driver/bcm.rs
+++ b/X1_JTAG_boot/src/bsp/device_driver/bcm.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BCM driver top level.
 
diff --git a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
index 24e537cff..8e57dfedb 100644
--- a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
+++ b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! GPIO Driver.
 
diff --git a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
index b034e92e5..d92612ea8 100644
--- a/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ b/X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! PL011 UART driver.
 //!
diff --git a/X1_JTAG_boot/src/bsp/device_driver/common.rs b/X1_JTAG_boot/src/bsp/device_driver/common.rs
index fd9e988ea..dfe7d8ef3 100644
--- a/X1_JTAG_boot/src/bsp/device_driver/common.rs
+++ b/X1_JTAG_boot/src/bsp/device_driver/common.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Common device driver code.
 
diff --git a/X1_JTAG_boot/src/bsp/raspberrypi.rs b/X1_JTAG_boot/src/bsp/raspberrypi.rs
index 7bda8a4da..b6d48fddc 100644
--- a/X1_JTAG_boot/src/bsp/raspberrypi.rs
+++ b/X1_JTAG_boot/src/bsp/raspberrypi.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Top-level BSP file for the Raspberry Pi 3 and 4.
 
diff --git a/X1_JTAG_boot/src/bsp/raspberrypi/cpu.rs b/X1_JTAG_boot/src/bsp/raspberrypi/cpu.rs
index 85fb89e49..65cf5abbe 100644
--- a/X1_JTAG_boot/src/bsp/raspberrypi/cpu.rs
+++ b/X1_JTAG_boot/src/bsp/raspberrypi/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Processor code.
 
diff --git a/X1_JTAG_boot/src/bsp/raspberrypi/driver.rs b/X1_JTAG_boot/src/bsp/raspberrypi/driver.rs
index ea8430660..2a80ee2c5 100644
--- a/X1_JTAG_boot/src/bsp/raspberrypi/driver.rs
+++ b/X1_JTAG_boot/src/bsp/raspberrypi/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP driver support.
 
diff --git a/X1_JTAG_boot/src/bsp/raspberrypi/kernel.ld b/X1_JTAG_boot/src/bsp/raspberrypi/kernel.ld
index f6c188434..32f6defa1 100644
--- a/X1_JTAG_boot/src/bsp/raspberrypi/kernel.ld
+++ b/X1_JTAG_boot/src/bsp/raspberrypi/kernel.ld
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT OR Apache-2.0
  *
- * Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+ * Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
  */
 
 __rpi_phys_dram_start_addr = 0;
diff --git a/X1_JTAG_boot/src/bsp/raspberrypi/memory.rs b/X1_JTAG_boot/src/bsp/raspberrypi/memory.rs
index 27be8590e..cdca14b8a 100644
--- a/X1_JTAG_boot/src/bsp/raspberrypi/memory.rs
+++ b/X1_JTAG_boot/src/bsp/raspberrypi/memory.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! BSP Memory Management.
 
diff --git a/X1_JTAG_boot/src/console.rs b/X1_JTAG_boot/src/console.rs
index 02b43df9f..a83f86fe0 100644
--- a/X1_JTAG_boot/src/console.rs
+++ b/X1_JTAG_boot/src/console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! System console.
 
diff --git a/X1_JTAG_boot/src/console/null_console.rs b/X1_JTAG_boot/src/console/null_console.rs
index 2c64d499c..e92a022b6 100644
--- a/X1_JTAG_boot/src/console/null_console.rs
+++ b/X1_JTAG_boot/src/console/null_console.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2022-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Null console.
 
diff --git a/X1_JTAG_boot/src/cpu.rs b/X1_JTAG_boot/src/cpu.rs
index 62503fb40..67ab79c08 100644
--- a/X1_JTAG_boot/src/cpu.rs
+++ b/X1_JTAG_boot/src/cpu.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Processor code.
 
diff --git a/X1_JTAG_boot/src/cpu/boot.rs b/X1_JTAG_boot/src/cpu/boot.rs
index 8091dac36..b1e98328a 100644
--- a/X1_JTAG_boot/src/cpu/boot.rs
+++ b/X1_JTAG_boot/src/cpu/boot.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Boot code.
 
diff --git a/X1_JTAG_boot/src/driver.rs b/X1_JTAG_boot/src/driver.rs
index fb44bbd9d..53592c66b 100644
--- a/X1_JTAG_boot/src/driver.rs
+++ b/X1_JTAG_boot/src/driver.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Driver support.
 
diff --git a/X1_JTAG_boot/src/main.rs b/X1_JTAG_boot/src/main.rs
index 8d244c77e..7ab191f5c 100644
--- a/X1_JTAG_boot/src/main.rs
+++ b/X1_JTAG_boot/src/main.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 // Rust embedded logo for `make doc`.
 #![doc(
diff --git a/X1_JTAG_boot/src/panic_wait.rs b/X1_JTAG_boot/src/panic_wait.rs
index ccf54f61f..5776aca87 100644
--- a/X1_JTAG_boot/src/panic_wait.rs
+++ b/X1_JTAG_boot/src/panic_wait.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! A panic handler that infinitely waits.
 
diff --git a/X1_JTAG_boot/src/print.rs b/X1_JTAG_boot/src/print.rs
index fe13b334c..8e3030466 100644
--- a/X1_JTAG_boot/src/print.rs
+++ b/X1_JTAG_boot/src/print.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Printing.
 
diff --git a/X1_JTAG_boot/src/synchronization.rs b/X1_JTAG_boot/src/synchronization.rs
index d3937b0de..94c83de1c 100644
--- a/X1_JTAG_boot/src/synchronization.rs
+++ b/X1_JTAG_boot/src/synchronization.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Synchronization primitives.
 //!
diff --git a/X1_JTAG_boot/src/time.rs b/X1_JTAG_boot/src/time.rs
index c6b40068c..19a48a885 100644
--- a/X1_JTAG_boot/src/time.rs
+++ b/X1_JTAG_boot/src/time.rs
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+// Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 //! Timer primitives.
 
diff --git a/common/serial/minipush.rb b/common/serial/minipush.rb
index 262ce20a0..2b90dd71d 100755
--- a/common/serial/minipush.rb
+++ b/common/serial/minipush.rb
@@ -3,7 +3,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require_relative 'miniterm'
 require 'ruby-progressbar'
@@ -113,9 +113,9 @@ def run
     end
 end
 
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 ## Execution starts here
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 if __FILE__ == $PROGRAM_NAME
     puts
     puts 'Minipush 1.0'.cyan
diff --git a/common/serial/minipush/progressbar_patch.rb b/common/serial/minipush/progressbar_patch.rb
index 1862a234c..e90b9bd14 100644
--- a/common/serial/minipush/progressbar_patch.rb
+++ b/common/serial/minipush/progressbar_patch.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 # Monkey-patch ruby-progressbar so that it supports reporting the progress in KiB instead of Byte.
 
diff --git a/common/serial/miniterm.rb b/common/serial/miniterm.rb
index 038ed978f..db2ddac5f 100755
--- a/common/serial/miniterm.rb
+++ b/common/serial/miniterm.rb
@@ -3,7 +3,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'rubygems'
 require 'bundler/setup'
@@ -126,9 +126,9 @@ def run
     end
 end
 
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 ## Execution starts here
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 if __FILE__ == $PROGRAM_NAME
     puts
     puts 'Miniterm 1.0'.cyan
diff --git a/common/tests/boot_test.rb b/common/tests/boot_test.rb
index 0dbef3df2..5885c7272 100644
--- a/common/tests/boot_test.rb
+++ b/common/tests/boot_test.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require_relative 'console_io_test'
 
diff --git a/common/tests/console_io_test.rb b/common/tests/console_io_test.rb
index 002fb895d..ea9d93e2d 100644
--- a/common/tests/console_io_test.rb
+++ b/common/tests/console_io_test.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'expect'
 require 'pty'
diff --git a/common/tests/dispatch.rb b/common/tests/dispatch.rb
index b6223418b..967937107 100755
--- a/common/tests/dispatch.rb
+++ b/common/tests/dispatch.rb
@@ -3,7 +3,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 file_dir = File.dirname(__FILE__)
 $LOAD_PATH.unshift(file_dir) unless $LOAD_PATH.include?(file_dir)
diff --git a/common/tests/exit_code_test.rb b/common/tests/exit_code_test.rb
index 4bcdc7afe..900510d41 100644
--- a/common/tests/exit_code_test.rb
+++ b/common/tests/exit_code_test.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'English'
 require_relative 'test'
diff --git a/common/tests/test.rb b/common/tests/test.rb
index d102ecd99..65afad0b2 100644
--- a/common/tests/test.rb
+++ b/common/tests/test.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 # Test base class.
 class Test
diff --git a/docker/rustembedded-osdev-utils/Dockerfile b/docker/rustembedded-osdev-utils/Dockerfile
index 7aa705df2..e8cb2cb52 100644
--- a/docker/rustembedded-osdev-utils/Dockerfile
+++ b/docker/rustembedded-osdev-utils/Dockerfile
@@ -1,7 +1,7 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2017-2022 Andre Richter <andre.o.richter@gmail.com>
-## Copyright (c) 2019-2022 Nao Taco <naotaco@gmail.com>
+## Copyright (c) 2017-2023 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2019-2023 Nao Taco <naotaco@gmail.com>
 FROM ubuntu:20.04
 
 ARG VCS_REF
diff --git a/docker/rustembedded-osdev-utils/Makefile b/docker/rustembedded-osdev-utils/Makefile
index 8127375d6..57acd9956 100644
--- a/docker/rustembedded-osdev-utils/Makefile
+++ b/docker/rustembedded-osdev-utils/Makefile
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: MIT OR Apache-2.0
 ##
-## Copyright (c) 2019-2022 Andre Richter <andre.o.richter@gmail.com>
+## Copyright (c) 2019-2023 Andre Richter <andre.o.richter@gmail.com>
 
 # Reference followed: https://www.docker.com/blog/getting-started-with-docker-for-arm-on-linux
 
diff --git a/utils/devtool.rb b/utils/devtool.rb
index fdbcf3a5d..2b120d6bc 100755
--- a/utils/devtool.rb
+++ b/utils/devtool.rb
@@ -3,7 +3,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2020-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'rubygems'
 require 'bundler/setup'
@@ -329,9 +329,9 @@ def copyright_source_files
     end
 end
 
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 ## Execution starts here
-##--------------------------------------------------------------------------------------------------
+## -------------------------------------------------------------------------------------------------
 tool = DevTool.new
 cmd = ARGV[0]
 commands = tool.public_methods(false).sort
diff --git a/utils/devtool/copyright.rb b/utils/devtool/copyright.rb
index e1741554a..d1aed8512 100644
--- a/utils/devtool/copyright.rb
+++ b/utils/devtool/copyright.rb
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'rubygems'
 require 'bundler/setup'
diff --git a/utils/diff_tut_folders.bash b/utils/diff_tut_folders.bash
index d93ca57d0..cdd9880e1 100755
--- a/utils/diff_tut_folders.bash
+++ b/utils/diff_tut_folders.bash
@@ -2,7 +2,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2018-2023 Andre Richter <andre.o.richter@gmail.com>
 
 DIFF=$(
     diff -uNr \
diff --git a/utils/update_copyright.rb b/utils/update_copyright.rb
index 2bfd28959..dc1abbf42 100755
--- a/utils/update_copyright.rb
+++ b/utils/update_copyright.rb
@@ -3,7 +3,7 @@
 
 # SPDX-License-Identifier: MIT OR Apache-2.0
 #
-# Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+# Copyright (c) 2021-2023 Andre Richter <andre.o.richter@gmail.com>
 
 require 'date'
 

From daee880368ef7d3b3a18e611c6b75c4beb00b5b0 Mon Sep 17 00:00:00 2001
From: James Zow <jameszow@163.com>
Date: Mon, 25 Sep 2023 20:22:34 +0800
Subject: [PATCH 204/214] Translate Chapter 5 and modify the source file format
 (#187)

* Translation Chapter 05

* Modify RPi3 and RPi4 unified formats
---
 05_drivers_gpio_uart/README.CN.md | 138 ++++++++++++++++++++++++++++++
 05_drivers_gpio_uart/README.md    |  18 ++--
 2 files changed, 147 insertions(+), 9 deletions(-)
 create mode 100644 05_drivers_gpio_uart/README.CN.md

diff --git a/05_drivers_gpio_uart/README.CN.md b/05_drivers_gpio_uart/README.CN.md
new file mode 100644
index 000000000..7999da7b3
--- /dev/null
+++ b/05_drivers_gpio_uart/README.CN.md
@@ -0,0 +1,138 @@
+# 教程 05 - 驱动程序: GPIO和UART
+
+## tl;dr
+
+- 添加了用于真实`UART`和`GPIO`控制器的驱动程序。
+- **我们将首次能够在真实硬件上运行代码** (请向下滚动查看说明)。
+
+## 简介
+
+在上一篇教程中，我们启用了全局安全变量，为添加第一个真实设备驱动程序奠定了基础。
+我们放弃了神奇的QEMU控制台，并引入了一个`驱动程序管理器`，允许`BSP`将设备驱动程序注册到`内核`中。
+
+## 驱动程序管理器
+
+第一步是向内核添加一个`driver subsystem`。相应的代码将位于`src/driver.rs`中。
+该子系统引入了`interface::DeviceDriver`，这是每个设备驱动程序都需要实现的通用特征，并为内核所知。
+在同一文件中实例化的全局`DRIVER_MANAGER`实例（类型为`DriverManager`）作为一个中央实体，可以被调用来管理内核中的所有设备驱动程序。
+例如，通过使用全局可访问的`crate::driver::driver_manager().register_driver(...)`，任何代码都可以注册一个实现了`interface::DeviceDriver`特征的具有静态生命周期的对象。
+
+在内核初始化期间，调用`crate::driver::driver_manager().init_drivers(...)`将使驱动程序管理器遍历所有已注册的驱动程序，
+并启动它们的初始化，并执行可选的`post-init callback`，该回调可以与驱动程序一起注册。
+例如，此机制用于在`UART`驱动程序初始化后将其切换为主系统控制台的驱动程序。
+
+## BSP驱动程序实现
+
+在`src/bsp/raspberrypi/driver.rs`中，函数`init()`负责注册`UART`和`GPIO`驱动程序。
+因此，在内核初始化期间，按照以下来自`main.rs`的代码，正确的顺序是：
+（i）首先初始化BSP驱动程序子系统，然后（ii）调用`driver_manager()`。
+
+```rust
+unsafe fn kernel_init() -> ! {
+    // Initialize the BSP driver subsystem.
+    if let Err(x) = bsp::driver::init() {
+        panic!("Error initializing BSP driver subsystem: {}", x);
+    }
+
+    // Initialize all device drivers.
+    driver::driver_manager().init_drivers();
+    // println! is usable from here on.
+```
+
+
+
+驱动程序本身存储在`src/bsp/device_driver`中，并且可以在不同的`BSP`之间重复使用
+在这些教程中添加的第一个驱动程序是`PL011Uart`驱动程序：它实现了`console::interface::*`特征，并且从现在开始用作主系统控制台。
+第二个驱动程序是`GPIO`驱动程序，它根据需要将`RPii's`的`UART`映射（即将来自`SoC`内部的信号路由到实际的硬件引脚）。
+请注意，`GPIO`驱动程序区分**RPi 3**和**RPi 4**。它们的硬件不同，因此我们必须在软件中进行适配。
+
+现在，`BSP`还包含了一个内存映射表，位于`src/bsp/raspberrypi/memory.rs`中。它提供了树莓派的`MMIO`地址，
+`BSP`使用这些地址来实例化相应的设备驱动程序，以便驱动程序代码知道在内存中找到设备的寄存器的位置。
+
+## SD卡启动
+
+由于我们现在有了真实的`UART`输出，我们可以在真实的硬件上运行代码。
+由于前面提到的`GPIO`驱动程序的差异，构建过程在**RPi 3**和**RPi 4**之间有所区别。
+默认情况下，所有的`Makefile`目标都将为**RPi 3**构建。
+为了**RPi 4**构建，需要在每个目标前加上`BSP=rpi4`。例如：
+
+```console
+$ BSP=rpi4 make
+$ BSP=rpi4 make doc
+```
+
+不幸的是，QEMU目前还不支持**RPi 4**，因此`BSP=rpi4 make qemu`无法工作。
+
+**准备SD卡的一些步骤在RPi3和RPi4之间有所不同，请在以下操作中小心。**
+
+### 通用步骤
+
+1. 创建一个名为`boot`的`FAT32`分区。
+2. 在SD卡上生成一个名为`config.txt`的文件，并将以下内容写入其中：
+
+```txt
+arm_64bit=1
+init_uart_clock=48000000
+```
+### RPi 3
+
+3. 从[Raspberry Pi firmware repo](https://github.com/raspberrypi/firmware/tree/master/boot)中将以下文件复制到SD卡上：
+    - [bootcode.bin](https://github.com/raspberrypi/firmware/raw/master/boot/bootcode.bin)
+    - [fixup.dat](https://github.com/raspberrypi/firmware/raw/master/boot/fixup.dat)
+    - [start.elf](https://github.com/raspberrypi/firmware/raw/master/boot/start.elf)
+4. 运行`make`命令。
+
+### RPi 4
+
+3. 从[Raspberry Pi firmware repo](https://github.com/raspberrypi/firmware/tree/master/boot)中将以下文件复制到SD卡上：
+    - [fixup4.dat](https://github.com/raspberrypi/firmware/raw/master/boot/fixup4.dat)
+    - [start4.elf](https://github.com/raspberrypi/firmware/raw/master/boot/start4.elf)
+    - [bcm2711-rpi-4-b.dtb](https://github.com/raspberrypi/firmware/raw/master/boot/bcm2711-rpi-4-b.dtb)
+4. 运行`BSP=rpi4 make`命令。
+
+
+_**注意**: 如果在您的RPi4上无法正常工作，请尝试将`start4.elf`重命名为`start.elf` (不带4)
+并复制到SD卡上。_
+
+### 再次通用步骤
+
+5. 将`kernel8.img`复制到SD卡上，并将SD卡插入RPi。
+6. 运行`miniterm` target，在主机上打开UART设备：
+
+```console
+$ make miniterm
+```
+
+> ❗ **注意**: `Miniterm`假设默认的串行设备名称为`/dev/ttyUSB0`。Depending on your
+> 根据您的主机操作系统，设备名称可能会有所不同。例如，在`macOS`上，它可能是
+> `/dev/tty.usbserial-0001`之类的。在这种情况下，请明确提供设备名称：
+
+
+```console
+$ DEV_SERIAL=/dev/tty.usbserial-0001 make miniterm
+```
+
+7. 将USB串口连接到主机PC。
+    - 请参考[top-level README](../README.md#-usb-serial-output)中的接线图。
+    - **注意**: TX（发送）线连接到RX（接收）引脚。
+    - 确保您**没有**连接USB串口的电源引脚，只连接RX/TX和GND引脚。
+8. 将RPi连接到（USB）电源线，并观察输出。
+
+```console
+Miniterm 1.0
+
+[MT] ⏳ Waiting for /dev/ttyUSB0
+[MT] ✅ Serial connected
+[0] mingo version 0.5.0
+[1] Booting on: Raspberry Pi 3
+[2] Drivers loaded:
+      1. BCM PL011 UART
+      2. BCM GPIO
+[3] Chars written: 117
+[4] Echoing input now
+```
+
+8. 通过按下<kbd>ctrl-c</kbd>退出。
+
+## 相比之前的变化（diff）
+请检查[英文版本](README.md#diff-to-previous)，这是最新的。
diff --git a/05_drivers_gpio_uart/README.md b/05_drivers_gpio_uart/README.md
index e6e5dd648..5e96d40a0 100644
--- a/05_drivers_gpio_uart/README.md
+++ b/05_drivers_gpio_uart/README.md
@@ -54,8 +54,8 @@ The drivers themselves are stored in `src/bsp/device_driver`, and can be reused
 first driver added in these tutorials is the `PL011Uart` driver: It implements the
 `console::interface::*` traits and is from now on used as the main system console. The second driver
 is the `GPIO` driver, which pinmuxes (that is, routing signals from inside the `SoC` to actual HW
-pins) the RPi's PL011 UART accordingly. Note how the `GPIO` driver differentiates between **RPi3**
-and **RPi4**. Their HW is different, so we have to account for it in SW.
+pins) the RPi's PL011 UART accordingly. Note how the `GPIO` driver differentiates between **RPi 3**
+and **RPi 4**. Their HW is different, so we have to account for it in SW.
 
 The `BSP`s now also contain a memory map in `src/bsp/raspberrypi/memory.rs`. It provides the
 Raspberry's `MMIO` addresses which are used by the `BSP` to instantiate the respective device
@@ -64,18 +64,18 @@ drivers, so that the driver code knows where to find the device's registers in m
 ## Boot it from SD card
 
 Since we have real `UART` output now, we can run the code on the real hardware. Building is
-differentiated between the **RPi 3** and the **RPi4** due to before mentioned differences in the
+differentiated between the **RPi 3** and the **RPi 4** due to before mentioned differences in the
 `GPIO` driver. By default, all `Makefile` targets will build for the **RPi 3**. In order to build
-for the the **RPi4**, prepend `BSP=rpi4` to each target. For example:
+for the the **RPi 4**, prepend `BSP=rpi4` to each target. For example:
 
 ```console
 $ BSP=rpi4 make
 $ BSP=rpi4 make doc
 ```
 
-Unfortunately, QEMU does not yet support the **RPi4**, so `BSP=rpi4 make qemu` won't work.
+Unfortunately, QEMU does not yet support the **RPi 4**, so `BSP=rpi4 make qemu` won't work.
 
-**Some steps for preparing the SD card differ between RPi3 and RPi4, so be careful in the
+**Some steps for preparing the SD card differ between RPi 3 and RPi 4, so be careful in the
 following.**
 
 ### Common for both
@@ -87,7 +87,7 @@ following.**
 arm_64bit=1
 init_uart_clock=48000000
 ```
-### Pi 3
+### RPi 3
 
 3. Copy the following files from the [Raspberry Pi firmware repo](https://github.com/raspberrypi/firmware/tree/master/boot) onto the SD card:
     - [bootcode.bin](https://github.com/raspberrypi/firmware/raw/master/boot/bootcode.bin)
@@ -95,7 +95,7 @@ init_uart_clock=48000000
     - [start.elf](https://github.com/raspberrypi/firmware/raw/master/boot/start.elf)
 4. Run `make`.
 
-### Pi 4
+### RPi 4
 
 3. Copy the following files from the [Raspberry Pi firmware repo](https://github.com/raspberrypi/firmware/tree/master/boot) onto the SD card:
     - [fixup4.dat](https://github.com/raspberrypi/firmware/raw/master/boot/fixup4.dat)
@@ -104,7 +104,7 @@ init_uart_clock=48000000
 4. Run `BSP=rpi4 make`.
 
 
-_**Note**: Should it not work on your RPi4, try renaming `start4.elf` to `start.elf` (without the 4)
+_**Note**: Should it not work on your RPi 4, try renaming `start4.elf` to `start.elf` (without the 4)
 on the SD card._
 
 ### Common again

From 9fd529ff808f489a1b7d41c4a06885dabe6f2489 Mon Sep 17 00:00:00 2001
From: James Zow <jameszow@163.com>
Date: Mon, 25 Sep 2023 20:23:11 +0800
Subject: [PATCH 205/214] Translation Chapter 6 (#186)

---
 06_uart_chainloader/README.CN.md | 116 +++++++++++++++++++++++++++++++
 1 file changed, 116 insertions(+)
 create mode 100644 06_uart_chainloader/README.CN.md

diff --git a/06_uart_chainloader/README.CN.md b/06_uart_chainloader/README.CN.md
new file mode 100644
index 000000000..de7f51114
--- /dev/null
+++ b/06_uart_chainloader/README.CN.md
@@ -0,0 +1,116 @@
+# 教程06 - UART链加载器
+
+## tl;dr
+
+- 从SD卡上运行是一次不错的体验，但是每次都为每个新的二进制文件这样做将非常繁琐。
+  因此，让我们编写一个[chainloader]。
+- 这将是您需要放在SD卡上的最后一个二进制文件。
+  每个后续的教程都将在`Makefile`中提供一个`chainboot`，让您方便地通过`UART`加载内核。
+
+[chainloader]: https://en.wikipedia.org/wiki/Chain_loading
+
+
+## 注意
+
+请注意，这个教程中有一些内容仅通过查看源代码很难理解。
+
+大致的意思是，在`boot.s`中，我们编写了一段[position independent code]代码，
+它会自动确定固件加载二进制文件的位置（`0x8_0000`），以及链接到的位置（`0x200_0000`，参见 `kernel.ld`）。
+然后，二进制文件将自身从加载地址复制到链接地址（也就是"重定位"自身），然后跳转到`_start_rust()`的重定位版本。
+
+由于链加载程序现在已经"脱离了路径"，它现在可以从`UART`接收另一个内核二进制文件，并将其复制到RPi固件的标准加载地址`0x8_0000`。
+最后，它跳转到`0x8_0000`，新加载的二进制文件会透明地执行，就好像它一直从SD卡加载一样。
+
+在我有时间详细写下这些内容之前，请耐心等待。目前，请将这个教程视为一种便利功能的启用程序，它允许快速启动以下教程。
+_对于那些渴望深入了解的人，可以直接跳到第[15章](../15_virtual_mem_part3_precomputed_tables)，阅读README的前半部分，
+其中讨论了`Load Address != Link Address`的问题_。
+
+[position independent code]: https://en.wikipedia.org/wiki/Position-independent_code
+
+## 安装并测试它
+
+我们的链加载程序称为`MiniLoad`，受到了[raspbootin]的启发。
+
+您可以按照以下教程尝试它：
+1. 根据您的目标硬件运行命令：`make`或`BSP=rpi4 make`。
+1. 将`kernel8.img`复制到SD卡中，并将SD卡重新插入您的RPi。
+1. 运行命令`make chainboot`或`BSP=rpi4 make chainboot`。
+1. 将USB串口连接到您的主机PC上。
+    - 请参考[top-level README](../README.md#-usb-serial-output)中的接线图。
+    - 确保您**没有**连接USB串口的电源引脚，只连接RX/TX和GND。
+1. 将RPi连接到（USB）电源线。
+1. 观察加载程序通过`UART`获取内核：
+
+> ❗ **注意**: `make chainboot`假设默认的串行设备名称为`/dev/ttyUSB0`。根据您的主机操作系统，设备名称可能会有所不同。
+> 例如，在`macOS`上，它可能是类似于`/dev/tty.usbserial-0001`的名称。
+> 在这种情况下，请明确给出设备名称：
+
+
+```console
+$ DEV_SERIAL=/dev/tty.usbserial-0001 make chainboot
+```
+
+[raspbootin]: https://github.com/mrvn/raspbootin
+
+```console
+$ make chainboot
+[...]
+Minipush 1.0
+
+[MP] ⏳ Waiting for /dev/ttyUSB0
+[MP] ✅ Serial connected
+[MP] 🔌 Please power the target now
+
+ __  __ _      _ _                 _
+|  \/  (_)_ _ (_) |   ___  __ _ __| |
+| |\/| | | ' \| | |__/ _ \/ _` / _` |
+|_|  |_|_|_||_|_|____\___/\__,_\__,_|
+
+           Raspberry Pi 3
+
+[ML] Requesting binary
+[MP] ⏩ Pushing 7 KiB ==========================================🦀 100% 0 KiB/s Time: 00:00:00
+[ML] Loaded! Executing the payload now
+
+[0] mingo version 0.5.0
+[1] Booting on: Raspberry Pi 3
+[2] Drivers loaded:
+      1. BCM PL011 UART
+      2. BCM GPIO
+[3] Chars written: 117
+[4] Echoing input now
+```
+
+在这个教程中，为了演示目的，加载了上一个教程中的内核版本。在后续的教程中，将使用工作目录的内核。
+
+## 测试它
+
+这个教程中的`Makefile`有一个额外的目标`qemuasm`，它可以让你很好地观察到内核在重新定位后如何从加载地址区域（`0x80_XXX`）
+跳转到重新定位的代码（`0x0200_0XXX`）：
+
+```console
+$ make qemuasm
+[...]
+N:
+0x00080030:  58000140  ldr      x0, #0x80058
+0x00080034:  9100001f  mov      sp, x0
+0x00080038:  58000141  ldr      x1, #0x80060
+0x0008003c:  d61f0020  br       x1
+
+----------------
+IN:
+0x02000070:  9400044c  bl       #0x20011a0
+
+----------------
+IN:
+0x020011a0:  90000008  adrp     x8, #0x2001000
+0x020011a4:  90000009  adrp     x9, #0x2001000
+0x020011a8:  f9446508  ldr      x8, [x8, #0x8c8]
+0x020011ac:  f9446929  ldr      x9, [x9, #0x8d0]
+0x020011b0:  eb08013f  cmp      x9, x8
+0x020011b4:  54000109  b.ls     #0x20011d4
+[...]
+```
+
+## 相比之前的变化（diff）
+请检查[英文版本](README.md#diff-to-previous)，这是最新的。
\ No newline at end of file

From 2dfb9e788772945e6bdfb0d41ce5dfecd6bd6c2e Mon Sep 17 00:00:00 2001
From: James Zow <jameszow@163.com>
Date: Mon, 25 Sep 2023 20:23:39 +0800
Subject: [PATCH 206/214] Translation Chapter 7 (#189)

---
 07_timestamps/README.CN.md | 45 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 45 insertions(+)
 create mode 100644 07_timestamps/README.CN.md

diff --git a/07_timestamps/README.CN.md b/07_timestamps/README.CN.md
new file mode 100644
index 000000000..1192996d3
--- /dev/null
+++ b/07_timestamps/README.CN.md
@@ -0,0 +1,45 @@
+# 教程 07 - 时间戳
+
+## tl;dr
+
+- 我们为计时器硬件添加了抽象，并在`_arch/aarch64`中实现了ARM架构计时器。
+- 新的计时器函数用于给UART打印添加时间戳，并且用于消除`GPIO`设备驱动中基于周期的延迟，从而提高准确性。
+- 添加了`warn!()`宏。
+
+## 测试它
+
+请通过 chainboot 进行检查（在上一个教程中添加）。
+```console
+$ make chainboot
+[...]
+Minipush 1.0
+
+[MP] ⏳ Waiting for /dev/ttyUSB0
+[MP] ✅ Serial connected
+[MP] 🔌 Please power the target now
+
+ __  __ _      _ _                 _
+|  \/  (_)_ _ (_) |   ___  __ _ __| |
+| |\/| | | ' \| | |__/ _ \/ _` / _` |
+|_|  |_|_|_||_|_|____\___/\__,_\__,_|
+
+           Raspberry Pi 3
+
+[ML] Requesting binary
+[MP] ⏩ Pushing 12 KiB =========================================🦀 100% 0 KiB/s Time: 00:00:00
+[ML] Loaded! Executing the payload now
+
+[    0.143123] mingo version 0.7.0
+[    0.143323] Booting on: Raspberry Pi 3
+[    0.143778] Architectural timer resolution: 52 ns
+[    0.144352] Drivers loaded:
+[    0.144688]       1. BCM PL011 UART
+[    0.145110]       2. BCM GPIO
+[W   0.145469] Spin duration smaller than architecturally supported, skipping
+[    0.146313] Spinning for 1 second
+[    1.146715] Spinning for 1 second
+[    2.146938] Spinning for 1 second
+```
+
+## 相比之前的变化（diff）
+请检查[英文版本](README.md#diff-to-previous)，这是最新的。

From aa7413fe797e9623a35684561cb3616b50d47ecb Mon Sep 17 00:00:00 2001
From: James Zow <jameszow@163.com>
Date: Mon, 25 Sep 2023 20:25:30 +0800
Subject: [PATCH 207/214] Translation Chapter 09 (#191)

---
 09_privilege_level/README.CN.md | 182 ++++++++++++++++++++++++++++++++
 1 file changed, 182 insertions(+)
 create mode 100644 09_privilege_level/README.CN.md

diff --git a/09_privilege_level/README.CN.md b/09_privilege_level/README.CN.md
new file mode 100644
index 000000000..80773a690
--- /dev/null
+++ b/09_privilege_level/README.CN.md
@@ -0,0 +1,182 @@
+# 教程 09 - 特权级别
+
+## tl;dr
+
+- 在早期引导代码中，我们从`Hypervisor`特权级别（AArch64中的`EL2`）过渡到`Kernel` （`EL1`）特权级别。
+
+## 目录
+
+- [介绍](#介绍)
+- [本教程的范围](#本教程的范围)
+- [在入口点检查EL2](#在入口点检查EL2)
+- [过渡准备](#过渡准备)
+- [从未发生的异常中返回](#从未发生的异常中返回)
+- [测试](#测试)
+- [相比之前的变化（diff）](#相比之前的变化（diff）)
+
+## 介绍
+
+应用级别的CPU具有所谓的`privilege levels`，它们具有不同的目的：
+
+| Typically used for | AArch64 | RISC-V | x86 |
+| ------------- | ------------- | ------------- | ------------- |
+| Userspace applications | EL0 | U/VU | Ring 3 |
+| OS Kernel | EL1 | S/VS | Ring 0 |
+| Hypervisor | EL2 | HS | Ring -1 |
+| Low-Level Firmware | EL3 | M | |
+
+在AArch64中，`EL`代表`Exception Level`（异常级别）。如果您想获取有关其他体系结构的更多信息，请查看以下链接：
+- [x86 privilege rings](https://en.wikipedia.org/wiki/Protection_ring).
+- [RISC-V privilege modes](https://content.riscv.org/wp-content/uploads/2017/12/Tue0942-riscv-hypervisor-waterman.pdf).
+
+在继续之前，我强烈建议您先浏览一下[Programmer’s Guide for ARMv8-A]`的第3章`。它提供了关于该主题的简明概述。
+
+[Programmer’s Guide for ARMv8-A]: http://infocenter.arm.com/help/topic/com.arm.doc.den0024a/DEN0024A_v8_architecture_PG.pdf
+
+## 本教程的范围
+
+默认情况下，树莓派将始终在`EL2`中开始执行。由于我们正在编写一个传统的`Kernel`，我们需要过渡到更合适的`EL1`。
+
+## 在入口点检查EL2
+
+首先，我们需要确保我们实际上是在`EL2`中执行，然后才能调用相应的代码过渡到`EL1`。
+因此，我们在`boot.s`的顶部添加了一个新的检查，如果CPU核心不在`EL2`中，则将其停止。
+
+```
+// Only proceed if the core executes in EL2. Park it otherwise.
+mrs	x0, CurrentEL
+cmp	x0, {CONST_CURRENTEL_EL2}
+b.ne	.L_parking_loop
+```
+
+接下来，在`boot.rs`中继续准备从`EL2`到`EL1`的过渡，通过调用`prepare_el2_to_el1_transition()`函数。
+
+```rust
+#[no_mangle]
+pub unsafe extern "C" fn _start_rust(phys_boot_core_stack_end_exclusive_addr: u64) -> ! {
+    prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr);
+
+    // Use `eret` to "return" to EL1. This results in execution of kernel_init() in EL1.
+    asm::eret()
+}
+```
+
+## 过渡准备
+
+由于`EL2`比`EL1`更具特权，它可以控制各种处理器功能，并允许或禁止`EL1`代码使用它们。
+其中一个例子是访问计时器和计数器寄存器。我们已经在[tutorial 07](../07_timestamps/)中使用了它们，所以当然我们希望保留它们。
+因此，我们在[Counter-timer Hypervisor Control register]中设置相应的标志，并将虚拟偏移量设置为零，以获取真实的物理值。
+
+[Counter-timer Hypervisor Control register]:  https://docs.rs/aarch64-cpu/9.0.0/src/aarch64_cpu/registers/cnthctl_el2.rs.html
+
+```rust
+// Enable timer counter registers for EL1.
+CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
+
+// No offset for reading the counters.
+CNTVOFF_EL2.set(0);
+```
+
+接下来，我们配置[Hypervisor Configuration Register]，使`EL1`在`AArch64`模式下运行，而不是在`AArch32`模式下运行，这也是可能的。
+
+[Hypervisor Configuration Register]: https://docs.rs/aarch64-cpu/9.0.0/src/aarch64_cpu/registers/hcr_el2.rs.html
+
+```rust
+// Set EL1 execution state to AArch64.
+HCR_EL2.write(HCR_EL2::RW::EL1IsAarch64);
+```
+
+## 从未发生的异常中返回
+
+实际上，从较高的EL过渡到较低的EL只有一种方式，即通过执行[ERET]指令。
+
+[ERET]: https://docs.rs/aarch64-cpu/9.0.0/src/aarch64_cpu/asm.rs.html#92-101
+
+在这个指令中，它将会将[Saved Program Status Register - EL2]的内容复制到`Current Program Status Register - EL1`，并跳转到存储在[Exception Link Register - EL2]。
+
+这基本上是在发生异常时所发生的相反过程。您将在即将发布的教程中了解更多相关内容。
+
+[Saved Program Status Register - EL2]: https://docs.rs/aarch64-cpu/9.0.0/src/aarch64_cpu/registers/spsr_el2.rs.html
+[Exception Link Register - EL2]: https://docs.rs/aarch64-cpu/9.0.0/src/aarch64_cpu/registers/elr_el2.rs.html
+
+```rust
+// Set up a simulated exception return.
+//
+// First, fake a saved program status where all interrupts were masked and SP_EL1 was used as a
+// stack pointer.
+SPSR_EL2.write(
+    SPSR_EL2::D::Masked
+        + SPSR_EL2::A::Masked
+        + SPSR_EL2::I::Masked
+        + SPSR_EL2::F::Masked
+        + SPSR_EL2::M::EL1h,
+);
+
+// Second, let the link register point to kernel_init().
+ELR_EL2.set(crate::kernel_init as *const () as u64);
+
+// Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it. Since there
+// are no plans to ever return to EL2, just re-use the same stack.
+SP_EL1.set(phys_boot_core_stack_end_exclusive_addr);
+```
+
+正如您所看到的，我们将`ELR_EL2`的值设置为之前直接从入口点调用的`kernel_init()`函数的地址。最后，我们设置了`SP_EL1`的堆栈指针。
+
+您可能已经注意到，堆栈的地址作为函数参数进行了传递。正如您可能记得的，在`boot.s`的`_start()`函数中，
+我们已经为`EL2`设置了堆栈。由于没有计划返回到`EL2`，我们可以直接重用相同的堆栈作为`EL1`的堆栈，
+因此使用函数参数将其地址传递。
+
+最后，在`_start_rust()`函数中调用了`ERET`指令。
+
+```rust
+#[no_mangle]
+pub unsafe extern "C" fn _start_rust(phys_boot_core_stack_end_exclusive_addr: u64) -> ! {
+    prepare_el2_to_el1_transition(phys_boot_core_stack_end_exclusive_addr);
+
+    // Use `eret` to "return" to EL1. This results in execution of kernel_init() in EL1.
+    asm::eret()
+}
+```
+
+## 测试
+
+在`main.rs`中，我们打印`current privilege level`，并额外检查`SPSR_EL2`中的掩码位是否传递到了`EL1`：
+
+```console
+$ make chainboot
+[...]
+Minipush 1.0
+
+[MP] ⏳ Waiting for /dev/ttyUSB0
+[MP] ✅ Serial connected
+[MP] 🔌 Please power the target now
+
+ __  __ _      _ _                 _
+|  \/  (_)_ _ (_) |   ___  __ _ __| |
+| |\/| | | ' \| | |__/ _ \/ _` / _` |
+|_|  |_|_|_||_|_|____\___/\__,_\__,_|
+
+           Raspberry Pi 3
+
+[ML] Requesting binary
+[MP] ⏩ Pushing 14 KiB =========================================🦀 100% 0 KiB/s Time: 00:00:00
+[ML] Loaded! Executing the payload now
+
+[    0.162546] mingo version 0.9.0
+[    0.162745] Booting on: Raspberry Pi 3
+[    0.163201] Current privilege level: EL1
+[    0.163677] Exception handling state:
+[    0.164122]       Debug:  Masked
+[    0.164511]       SError: Masked
+[    0.164901]       IRQ:    Masked
+[    0.165291]       FIQ:    Masked
+[    0.165681] Architectural timer resolution: 52 ns
+[    0.166255] Drivers loaded:
+[    0.166592]       1. BCM PL011 UART
+[    0.167014]       2. BCM GPIO
+[    0.167371] Timer test, spinning for 1 second
+[    1.167904] Echoing input now
+```
+
+## 相比之前的变化（diff）
+请检查[英文版本](README.md#diff-to-previous)，这是最新的。

From 502935c6768dea726aad15d1e5a9dd4c7360e92c Mon Sep 17 00:00:00 2001
From: James Zow <jameszow@163.com>
Date: Mon, 25 Sep 2023 20:25:58 +0800
Subject: [PATCH 208/214] Translation Chapter 10 (#192)

---
 .../README.CN.md                              | 319 ++++++++++++++++++
 1 file changed, 319 insertions(+)
 create mode 100644 10_virtual_mem_part1_identity_mapping/README.CN.md

diff --git a/10_virtual_mem_part1_identity_mapping/README.CN.md b/10_virtual_mem_part1_identity_mapping/README.CN.md
new file mode 100644
index 000000000..2b840e28c
--- /dev/null
+++ b/10_virtual_mem_part1_identity_mapping/README.CN.md
@@ -0,0 +1,319 @@
+# 教程10 - 虚拟内存第一部分：将所有内容进行身份映射！
+
+## tl;dr
+
+- 打开`MMU`。
+- 使用简单的方案：静态的`64 KiB`转换表。
+- 为了教学目的，我们将数据写入重新映射的`UART`，并对其他所有内容进行`identity map`。
+
+## 目录
+
+- [介绍](#introduction)
+- [MMU和分页理论](#MMU和分页理论)
+- [方法](#方法)
+  * [通用内核代码：`memory/mmu.rs`](#通用内核代码：`memory/mmu.rs`)
+  * [BSP：`bsp/raspberrypi/memory/mmu.rs`](#bsp-bspraspberrypimemorymmurs)
+  * [AArch64：`_arch/aarch64/memory/*`](#aarch64-_archaarch64memory)
+  * [`kernel.ld`](#kernelld)
+- [地址转换示例](#地址转换示例)
+  * [使用64 KiB页描述符进行地址转换](#使用64KiB页描述符进行地址转换)
+- [零成本抽象](#零成本抽象)
+- [测试](#测试)
+- [相比之前的变化（diff）](#相比之前的变化（diff）)
+
+## 介绍
+
+虚拟内存是一个非常复杂但重要且强大的主题。在本教程中，我们从简单易懂的方式开始，
+通过打开`MMU`，使用静态转换表和一次性进行`identity-map`
+（除了为教育目的而重新映射的`UART`之外；在下一个教程中，这将被取消）。
+
+## MMU和分页理论
+
+在这一点上，我们不会重新发明轮子并详细描述现代应用级处理器中分页的工作原理。
+互联网上有很多关于这个主题的优秀资源，我们鼓励您阅读其中一些以获得对该主题的高层理解。
+
+继续阅读本`AArch64`特定的教程，我强烈建议您在此处停下来，首先阅读[ARM Cortex-A Series Programmer's Guide for ARMv8-A]的`第12章`，
+以便在继续之前获得所有所需的`AArch64`特定知识。
+
+已经阅读完`第12章`了吗？做得好 :+1:!
+
+[ARM Cortex-A Series Programmer's Guide for ARMv8-A]: http://infocenter.arm.com/help/topic/com.arm.doc.den0024a/DEN0024A_v8_architecture_PG.pdf
+
+## 方法
+
+1. 通用的`kernel`部分：`src/memory/mmu.rs`及其子模块提供了与体系结构无关的描述符类型，
+   用于组合一个高级数据结构，描述内核的虚拟内存布局：`memory::mmu::KernelVirtualLayout`。
+2. `BSP`部分：`src/bsp/raspberrypi/memory/mmu.rs`包含一个`KernelVirtualLayout`的静态实例，并通过函数
+   `bsp::memory::mmu::virt_mem_layout()`使其可访问。
+3. `aarch64`部分：`src/_arch/aarch64/memory/mmu.rs`及其子模块包含实际的`MMU`驱动程序。它使用`64 KiB`粒度获取
+   `BSP`的高级`KernelVirtualLayout`并进行映射。
+
+### 通用内核代码：`memory/mmu.rs`
+
+在这个文件中提供的描述符类型是构建块，用于描述不同内存区域的属性。
+例如，`R/W`（读/写）、`no-execute`（不执行）、`cached/uncached`（缓存/非缓存）等等。
+
+这些描述符与硬件`MMU`的实际描述符无关。不同的`BSP`可以使用这些类型来生成内核虚拟内存布局的高级描述。
+真实硬件的实际`MMU`驱动程序将使用这些类型作为输入。
+
+通过这种方式，我们在`BSP`和`_arch`代码之间实现了清晰的抽象，这样可以在不需要调整另一个的情况下进行交换。
+
+### BSP: `bsp/raspberrypi/memory/mmu.rs`
+
+这个文件包含了一个`KernelVirtualLayout`的实例，用于存储先前提到的描述符。
+将其放在`BSP`中是正确的位置，因为它具有目标板的内存映射知识。
+
+策略是只描述**不是**普通的、可缓存的DRAM的区域。然而，如果您希望，也可以定义这些区域。
+这里是一个设备MMIO区域的示例：
+
+```rust
+TranslationDescriptor {
+    name: "Device MMIO",
+    virtual_range: mmio_range_inclusive,
+    physical_range_translation: Translation::Identity,
+    attribute_fields: AttributeFields {
+        mem_attributes: MemAttributes::Device,
+        acc_perms: AccessPermissions::ReadWrite,
+        execute_never: true,
+    },
+},
+```
+
+`KernelVirtualLayout`本身实现了以下方法：
+
+```rust
+pub fn virt_addr_properties(
+    &self,
+    virt_addr: usize,
+) -> Result<(usize, AttributeFields), &'static str>
+```
+
+它将被`_arch/aarch64`的`MMU`代码使用，用于请求虚拟地址和转换的属性，该转换提供物理输出地址
+（返回元组中的`usize`）。该函数扫描包含查询地址的描述符，并返回第一个匹配的条目的相应结果。
+如果找不到条目，则返回普通可缓存DRAM的默认属性和输入地址，从而告诉`MMU`代码请求的地址应该是`identity mapped`。
+
+由于这种默认行为，不需要定义普通可缓存DRAM区域。
+
+### AArch64: `_arch/aarch64/memory/*`
+
+这些模块包含了`AArch64`的`MMU`驱动程序。粒度在这里被硬编码为（`64 KiB`页描述符）。
+
+在`translation_table.rs`中，有一个实际的转换表结构的定义，它对`LVL2`表的数量进行了泛化。
+后者取决于目标板的内存大小。自然地，`BSP`了解目标板的这些细节，并通过常量
+`bsp::memory::mmu::KernelAddrSpace::SIZE`提供大小信息。
+
+`translation_table.rs`使用这些信息来计算所需的`LVL2`表的数量。由于在`64 KiB`配置中，
+一个`LVL2`表可以覆盖`512 MiB`，所以只需要将`KernelAddrSpace::SIZE`除以`512 MiB`
+（有几个编译时检查确保`KernelAddrSpace::SIZE`是`512 MiB`的倍数）。
+
+最终的表类型被导出为`KernelTranslationTable`。以下是来自`translation_table.rs`的相关代码：
+
+```rust
+/// A table descriptor for 64 KiB aperture.
+///
+/// The output points to the next table.
+#[derive(Copy, Clone)]
+#[repr(C)]
+struct TableDescriptor {
+    value: u64,
+}
+
+/// A page descriptor with 64 KiB aperture.
+///
+/// The output points to physical memory.
+#[derive(Copy, Clone)]
+#[repr(C)]
+struct PageDescriptor {
+    value: u64,
+}
+
+const NUM_LVL2_TABLES: usize = bsp::memory::mmu::KernelAddrSpace::SIZE >> Granule512MiB::SHIFT;
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Big monolithic struct for storing the translation tables. Individual levels must be 64 KiB
+/// aligned, hence the "reverse" order of appearance.
+#[repr(C)]
+#[repr(align(65536))]
+pub struct FixedSizeTranslationTable<const NUM_TABLES: usize> {
+    /// Page descriptors, covering 64 KiB windows per entry.
+    lvl3: [[PageDescriptor; 8192]; NUM_TABLES],
+
+    /// Table descriptors, covering 512 MiB windows.
+    lvl2: [TableDescriptor; NUM_TABLES],
+}
+
+/// A translation table type for the kernel space.
+pub type KernelTranslationTable = FixedSizeTranslationTable<NUM_LVL2_TABLES>;
+```
+
+在`mmu.rs`中，`KernelTranslationTable`用于创建内核表的最终实例：
+
+```rust
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+/// The kernel translation tables.
+static mut KERNEL_TABLES: KernelTranslationTable = KernelTranslationTable::new();
+```
+
+它们在`MMU::init()`期间通过调用`KERNEL_TABLES.populate_tt_entries()`进行填充，
+该函数利用`bsp::memory::mmu::virt_mem_layout().virt_addr_properties()`和一系列实用函数，将内核通用描述符转换为
+`AArch64 MMU`硬件所需的实际`64 bit`整数条目，用于填充转换表数组。
+
+一个值得注意的事情是，每个页描述符都有一个索引（`AttrIndex`），它索引到[MAIR_EL1]寄存器，
+该寄存器保存了有关相应页面的缓存属性的信息。我们目前定义了普通可缓存内存和设备内存（不被缓存）。
+
+[MAIR_EL1]: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0500d/CIHDHJBB.html
+
+```rust
+impl MemoryManagementUnit {
+    /// Setup function for the MAIR_EL1 register.
+    fn set_up_mair(&self) {
+        // Define the memory types being mapped.
+        MAIR_EL1.write(
+            // Attribute 1 - Cacheable normal DRAM.
+            MAIR_EL1::Attr1_Normal_Outer::WriteBack_NonTransient_ReadWriteAlloc +
+        MAIR_EL1::Attr1_Normal_Inner::WriteBack_NonTransient_ReadWriteAlloc +
+
+        // Attribute 0 - Device.
+        MAIR_EL1::Attr0_Device::nonGathering_nonReordering_EarlyWriteAck,
+        );
+    }
+```
+
+然后，[Translation Table Base Register 0 - EL1]使用`lvl2`表的基地址进行设置，同时配置[Translation Control Register - EL1]：
+
+```rust
+// Set the "Translation Table Base Register".
+TTBR0_EL1.set_baddr(KERNEL_TABLES.phys_base_address());
+
+self.configure_translation_control();
+```
+
+最后，通过[System Control Register - EL1]打开`MMU`。最后一步还启用了数据和指令的缓存。
+
+[Translation Table Base Register 0 - EL1]: https://docs.rs/aarch64-cpu/9.0.0/src/aarch64_cpu/registers/ttbr0_el1.rs.html
+[Translation Control Register - EL1]: https://docs.rs/aarch64-cpu/9.0.0/src/aarch64_cpu/registers/tcr_el1.rs.html
+[System Control Register - EL1]: https://docs.rs/aarch64-cpu/9.0.0/src/aarch64_cpu/registers/sctlr_el1.rs.html
+
+### `kernel.ld`
+
+我们需要将`code`段对齐到`64 KiB`，这样它就不会与下一个需要读/写属性而不是读/执行属性的部分重叠。
+
+```ld.s
+. = ALIGN(PAGE_SIZE);
+__code_end_exclusive = .;
+```
+
+这会增加二进制文件的大小，但考虑到与传统的`4 KiB`粒度相比，它显著减少了静态分页条目的数量，这是一个小小的代价。
+
+## 地址转换示例
+
+出于教育目的，定义了一个布局，允许通过两个不同的虚拟地址访问`UART`
+- 由于我们对整个`Device MMIO`区域进行了身份映射，所以在`MMU`打开后，可以通过断言其物理基地址
+  （`0x3F20_1000`或`0xFA20_1000`，取决于使用的是哪个RPi版本）来访问它。
+- 此外，它还映射到第一个`512 MiB`中的最后一个`64 KiB`槽位，使其可以通过基地址`0x1FFF_1000`访问。
+
+以下块图可视化了第二个映射的底层转换。
+
+### 使用64KiB页描述符进行地址转换
+
+<img src="../doc/11_page_tables_64KiB.png" alt="Page Tables 64KiB" width="90%">
+
+## 零成本抽象
+
+初始化代码再次是展示Rust零成本抽象在嵌入式编程中巨大潜力的一个很好的例子[[1]][[2]]。
+
+让我们再次看一下使用[aarch64-cpu]crate设置`MAIR_EL1`寄存器的代码片段：
+
+[1]: https://blog.rust-lang.org/2015/05/11/traits.html
+[2]: https://ruudvanasseldonk.com/2016/11/30/zero-cost-abstractions
+[aarch64-cpu]: https://crates.io/crates/aarch64-cpu
+
+```rust
+/// Setup function for the MAIR_EL1 register.
+fn set_up_mair(&self) {
+    // Define the memory types being mapped.
+    MAIR_EL1.write(
+        // Attribute 1 - Cacheable normal DRAM.
+        MAIR_EL1::Attr1_Normal_Outer::WriteBack_NonTransient_ReadWriteAlloc +
+    MAIR_EL1::Attr1_Normal_Inner::WriteBack_NonTransient_ReadWriteAlloc +
+
+    // Attribute 0 - Device.
+    MAIR_EL1::Attr0_Device::nonGathering_nonReordering_EarlyWriteAck,
+    );
+}
+```
+
+这段代码具有超强的表达能力，它利用`traits`，不同的`types`和`constants`来提供类型安全的寄存器操作。
+
+最后，此代码根据数据表将寄存器的前四个字节设置为特定值。查看生成的代码，
+我们可以看到，尽管有所有的类型安全和抽象，但它可以归结为两条汇编指令：
+
+```text
+   800a8:       529fe089        mov     w9, #0xff04                     // #65284
+   800ac:       d518a209        msr     mair_el1, x9
+```
+
+## 测试
+
+打开虚拟内存现在是我们在内核初始化过程中要做的第一件事：
+
+```rust
+unsafe fn kernel_init() -> ! {
+    use memory::mmu::interface::MMU;
+
+    if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
+        panic!("MMU: {}", string);
+    }
+```
+
+稍后在引导过程中，可以观察到有关映射的打印：
+
+```console
+$ make chainboot
+[...]
+Minipush 1.0
+
+[MP] ⏳ Waiting for /dev/ttyUSB0
+[MP] ✅ Serial connected
+[MP] 🔌 Please power the target now
+
+ __  __ _      _ _                 _
+|  \/  (_)_ _ (_) |   ___  __ _ __| |
+| |\/| | | ' \| | |__/ _ \/ _` / _` |
+|_|  |_|_|_||_|_|____\___/\__,_\__,_|
+
+           Raspberry Pi 3
+
+[ML] Requesting binary
+[MP] ⏩ Pushing 64 KiB =========================================🦀 100% 0 KiB/s Time: 00:00:00
+[ML] Loaded! Executing the payload now
+
+[    0.811167] mingo version 0.10.0
+[    0.811374] Booting on: Raspberry Pi 3
+[    0.811829] MMU online. Special regions:
+[    0.812306]       0x00080000 - 0x0008ffff |  64 KiB | C   RO PX  | Kernel code and RO data
+[    0.813324]       0x1fff0000 - 0x1fffffff |  64 KiB | Dev RW PXN | Remapped Device MMIO
+[    0.814310]       0x3f000000 - 0x4000ffff |  17 MiB | Dev RW PXN | Device MMIO
+[    0.815198] Current privilege level: EL1
+[    0.815675] Exception handling state:
+[    0.816119]       Debug:  Masked
+[    0.816509]       SError: Masked
+[    0.816899]       IRQ:    Masked
+[    0.817289]       FIQ:    Masked
+[    0.817679] Architectural timer resolution: 52 ns
+[    0.818253] Drivers loaded:
+[    0.818589]       1. BCM PL011 UART
+[    0.819011]       2. BCM GPIO
+[    0.819369] Timer test, spinning for 1 second
+[     !!!    ] Writing through the remapped UART at 0x1FFF_1000
+[    1.820409] Echoing input now
+```
+
+## 相比之前的变化（diff）
+请检查[英文版本](README.md#diff-to-previous)，这是最新的。

From 93e108f1b4eba360032411f2dc91aade3a94721b Mon Sep 17 00:00:00 2001
From: James Zow <jameszow@163.com>
Date: Mon, 25 Sep 2023 21:35:15 +0800
Subject: [PATCH 209/214] Translation Chapter 08 (#190)

* Translation Chapter 08

* error correction symbol

* Update 08_hw_debug_JTAG/README.md

---------

Co-authored-by: Diego Barrios Romero <eldruin@gmail.com>
---
 08_hw_debug_JTAG/README.CN.md | 288 ++++++++++++++++++++++++++++++++++
 1 file changed, 288 insertions(+)
 create mode 100644 08_hw_debug_JTAG/README.CN.md

diff --git a/08_hw_debug_JTAG/README.CN.md b/08_hw_debug_JTAG/README.CN.md
new file mode 100644
index 000000000..b77032101
--- /dev/null
+++ b/08_hw_debug_JTAG/README.CN.md
@@ -0,0 +1,288 @@
+# 教程 08 - 使用JTAG进行硬件调试
+
+## tl;dr
+
+按照以下顺序进行操作：
+
+1. 运行`make jtagboot`并保持终端打开。
+2. 连接USB串行设备。
+3. 连接`JTAG`调试器的USB设备。
+4. 在新的终端中，运行`make openocd`并保持终端打开。
+5. 在新的终端中，运行`make gdb`或者运行`make gdb-opt0`。
+
+![Demo](../doc/09_demo.gif)
+
+## 目录
+
+- [简介](#简介)
+- [大纲](#大纲)
+- [软件设置](#软件设置)
+- [硬件设置](#硬件设置)
+  * [线路](#线路)
+- [准备连接](#准备连接)
+- [OpenOCD](#openocd)
+- [GDB](#gdb)
+  * [备注](#备注)
+    + [优化](#优化)
+    + [GDB控制](#GDB控制)
+- [关于USB连接限制的注意事项](#关于USB连接限制的注意事项)
+- [额外资料](#额外资料)
+- [致谢](#致谢)
+- [相比之前的变化（diff）](#相比之前的变化（diff）)
+
+## 简介
+
+在即将到来的教程中，我们将涉及RPi的SoC（系统芯片）的敏感区域，这可能会让我们的调试工作变得非常困难。
+例如，改变处理器的`Privilege Level`或引入`Virtual Memory`。
+
+硬件调试器有时可以成为寻找棘手错误的最后手段。特别是对于调试复杂的、与体系结构相关的硬件问题，它将非常有用，
+因为在这个领域，`QEMU`有时无法提供帮助，因为它对硬件的某些特性进行了抽象，并没有模拟到最后一位。
+
+那么，让我们介绍一下`JTAG`调试。一旦设置好，它将允许我们在真实的硬件上逐步执行我们的内核。这是多么酷啊！
+
+## 大纲
+
+从内核的角度来看，这个教程与之前的教程相同。我们只是在其周围添加了用于JTAG调试的基础设施。
+
+## 软件设置
+
+我们需要在SD卡的`config.txt`文件中添加另一行：
+
+```toml
+arm_64bit=1
+init_uart_clock=48000000
+enable_jtag_gpio=1
+```
+
+## 硬件设置
+
+与我们WG的[Embedded Rust Book]书籍中使用的`STM32F3DISCOVERY`等微控制器板不同，RPi没有在其板上内置调试器。
+因此，您需要购买一个。
+
+在本教程中，我们将使用OLIMEX的[ARM-USB-TINY-H]。它具有标准的[ARM JTAG 20 connector]。
+不幸的是，RPi没有这个连接器，所以我们必须通过跳线连接它。
+
+[Embedded Rust Book]: https://rust-embedded.github.io/book/start/hardware.html
+[ARM-USB-TINY-H]: https://www.olimex.com/Products/ARM/JTAG/ARM-USB-TINY-H
+[ARM JTAG 20 connector]: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0499dj/BEHEIHCE.html
+
+### 线路
+
+<table>
+    <thead>
+        <tr>
+            <th>GPIO #</th>
+			<th>Name</th>
+			<th>JTAG #</th>
+			<th>Note</th>
+			<th width="60%">Diagram</th>
+        </tr>
+    </thead>
+    <tbody>
+        <tr>
+            <td></td>
+            <td>VTREF</td>
+            <td>1</td>
+            <td>to 3.3V</td>
+            <td rowspan="8"><img src="../doc/09_wiring_jtag.png"></td>
+        </tr>
+        <tr>
+            <td></td>
+            <td>GND</td>
+            <td>4</td>
+            <td>to GND</td>
+        </tr>
+        <tr>
+            <td>22</td>
+            <td>TRST</td>
+            <td>3</td>
+            <td></td>
+        </tr>
+        <tr>
+            <td>26</td>
+            <td>TDI</td>
+            <td>5</td>
+            <td></td>
+        </tr>
+        <tr>
+            <td>27</td>
+            <td>TMS</td>
+            <td>7</td>
+            <td></td>
+        </tr>
+        <tr>
+            <td>25</td>
+            <td>TCK</td>
+            <td>9</td>
+            <td></td>
+        </tr>
+        <tr>
+            <td>23</td>
+            <td>RTCK</td>
+            <td>11</td>
+            <td></td>
+        </tr>
+        <tr>
+            <td>24</td>
+            <td>TDO</td>
+            <td>13</td>
+            <td></td>
+        </tr>
+    </tbody>
+</table>
+
+<p align="center"><img src="../doc/09_image_jtag_connected.jpg" width="50%"></p>
+
+## 准备连接
+
+在启动时，由于我们对`config.txt`进行的更改，RPi的固件将配置相应的GPIO引脚以实现`JTAG`功能。
+
+现在剩下的要做的就是暂停RPi的执行，然后通过`JTAG`进行连接。因此，我们添加了一个新的`Makefile` target，
+`make jtagboot`，它使用`chainboot`方法将一个小型辅助二进制文件加载到RPi上，
+该文件只是将执行核心置于等待状态。
+
+文件夹中单独[X1_JTAG_boot]文件夹中单独维护，并且是我们迄今为止在教程中使用的内核的修改版本。
+
+[X1_JTAG_boot]: ../X1_JTAG_boot
+
+```console
+$ make jtagboot
+Minipush 1.0
+
+[MP] ⏳ Waiting for /dev/ttyUSB0
+[MP] ✅ Serial connected
+[MP] 🔌 Please power the target now
+ __  __ _      _ _                 _
+|  \/  (_)_ _ (_) |   ___  __ _ __| |
+| |\/| | | ' \| | |__/ _ \/ _` / _` |
+|_|  |_|_|_||_|_|____\___/\__,_\__,_|
+
+           Raspberry Pi 3
+
+[ML] Requesting binary
+[MP] ⏩ Pushing 7 KiB ==========================================🦀 100% 0 KiB/s Time: 00:00:00
+[ML] Loaded! Executing the payload now
+
+[    0.394532] Parking CPU core. Please connect over JTAG now.
+```
+
+保持USB串口连接和打开运行`jtagboot`的终端非常重要。当我们稍后加载实际的内核时，`UART`输出将显示在这里。
+
+## OpenOCD
+
+接下来，我们需要启动开放式片上调试器 [Open On-Chip Debugger]，也称为`OpenOCD`，以实际连接`JTAG`。
+
+[Open On-Chip Debugger]: http://openocd.org
+
+一如既往，我们的教程力求使开发工具的使用尽可能简单，
+这就是为什么我们将所有内容打包到了[dedicated Docker container]中，该容器已经用于链式引导和`QEMU`。
+
+[dedicated Docker container]: ../docker/rustembedded-osdev-utils
+
+连接Olimex USB JTAG调试器，在同一个文件夹中打开一个新的终端窗口，然后按顺序输入
+`make openocd`命令。你将会看到一些初始输出：
+
+```console
+$ make openocd
+[...]
+Open On-Chip Debugger 0.10.0
+[...]
+Info : Listening on port 6666 for tcl connections
+Info : Listening on port 4444 for telnet connections
+Info : clock speed 1000 kHz
+Info : JTAG tap: rpi3.tap tap/device found: 0x4ba00477 (mfg: 0x23b (ARM Ltd.), part: 0xba00, ver: 0x4)
+Info : rpi3.core0: hardware has 6 breakpoints, 4 watchpoints
+Info : rpi3.core1: hardware has 6 breakpoints, 4 watchpoints
+Info : rpi3.core2: hardware has 6 breakpoints, 4 watchpoints
+Info : rpi3.core3: hardware has 6 breakpoints, 4 watchpoints
+Info : Listening on port 3333 for gdb connections
+Info : Listening on port 3334 for gdb connections
+Info : Listening on port 3335 for gdb connections
+Info : Listening on port 3336 for gdb connections
+```
+
+`OpenOCD`已检测到RPi的四个核心，并打开了四个网络端口，`gdb`现在可以连接到这些端口来调试各自的核心。
+
+## GDB
+
+最后，我们需要一个支持`AArch64`的`gdb`版本。你猜对了，它已经打包在osdev容器中。
+可以通过`make gdb`命令启动它。
+
+实际上，这个Makefile target做了更多的事情。它构建了一个包含调试信息的特殊版本的内核。
+这使得`gdb`能够显示我们当前正在调试的`Rust`源代码行。
+它还启动了`gdb`，以便它已经加载了这个调试构建（`kernel_for_jtag`）。
+
+现在我们可以使用`gdb`命令行来进行以下操作：
+  1. 在我们的内核中设置断点。
+  2. 通过JTAG将内核加载到内存中（请记住，当前RPi仍在执行最小的JTAG引导二进制文件）。
+  3. 操纵RPi的程序计数器，使其从我们内核的入口点开始执行。
+  4. 逐步执行内核的执行过程。
+
+```console
+$ make gdb
+[...]
+>>> target remote :3333                          # Connect to OpenOCD, core0
+>>> load                                         # Load the kernel into the RPi's DRAM over JTAG.
+Loading section .text, size 0x2454 lma 0x80000
+Loading section .rodata, size 0xa1d lma 0x82460
+Loading section .got, size 0x10 lma 0x82e80
+Loading section .data, size 0x20 lma 0x82e90
+Start address 0x0000000000080000, load size 11937
+Transfer rate: 63 KB/sec, 2984 bytes/write.
+>>> set $pc = 0x80000                            # Set RPI's program counter to the start of the
+                                                 # kernel binary.
+>>> break main.rs:158
+Breakpoint 1 at 0x8025c: file src/main.rs, line 158.
+>>> cont
+>>> step                                         # Single-step through the kernel
+>>> step
+>>> ...
+```
+
+### 备注
+
+#### 优化
+
+在调试操作系统二进制文件时，您需要在可以逐步执行源代码粒度和生成的二进制文件的优化级别之间进行权衡。
+`make`和`make gdb`targets生成一个`--release`二进制文件，其中包含优化级别为3（`-opt-level=3`）。
+然而，在这种情况下，编译器会非常积极地进行内联，并尽可能地将读取和写入操作打包在一起。
+因此，不总是能够在源代码文件的特定行上准确命中断点。
+
+因此，Makefile还提供了`make gdb-opt0` target，它使用了`-opt-level=0`。
+因此，它将允许您拥有更精细的调试粒度。然而，请记住，当调试与硬件密切相关的代码时，
+编译器对易失性寄存器的读取或写入进行压缩的优化可能会对执行产生重大影响。
+请注意，上面的演示GIF是使用`gdb-opt0`录制的。
+
+#### GDB控制
+
+在某些情况下，您可能会遇到延迟循环或等待串行输入的代码。在这种情况下，
+逐步执行可能不可行或无法正常工作。您可以通过在这些区域之外设置其他断点，从而跳过这些障碍。
+并使用`cont`命令到达它们。
+
+在`gdb`中按下`ctrl+c`将再次停止RPi的执行，以防止您在没有进一步断点的情况下继续执行。
+
+## 关于USB连接限制的注意事项
+
+如果您按照教程从头到尾进行操作，关于USB连接的一切应该都没问题。
+
+但是，请注意，根据当前的形式，我们的`Makefile`对连接的USB设备的命名做出了隐含的假设。
+它期望`/dev/ttyUSB0`是`UART`设备。
+
+因此，请确保按照以下顺序将设备连接到您的计算机：
+  1. 首先连接USB串行设备。
+  2. 然后连接Olimex调试器。
+
+这样，主机操作系统会相应地枚举这些设备。这只需要做一次即可。
+可以多次断开和连接串行设备，例如在保持调试器连接的情况下启动不同的`make jtagboot`运行。
+
+## 额外资料
+
+- https://metebalci.com/blog/bare-metal-raspberry-pi-3b-jtag
+- https://www.suse.com/c/debugging-raspberry-pi-3-with-jtag
+
+## 致谢
+
+感谢[@naotaco](https://github.com/naotaco)为本教程奠定了基础。
+
+## 相比之前的变化（diff）
+请检查[英文版本](README.md#diff-to-previous)，这是最新的。

From 53074bb82244d912fa85af51d92b17d829692fad Mon Sep 17 00:00:00 2001
From: Natalia Pluta <80521103+nmpluta@users.noreply.github.com>
Date: Mon, 2 Oct 2023 12:14:10 +0200
Subject: [PATCH 210/214] fix depracated link to the rust-toolchain.toml file
 (#199)

---
 README.ES.md | 2 +-
 README.md    | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/README.ES.md b/README.ES.md
index 0ed0634f6..16619dd0c 100644
--- a/README.ES.md
+++ b/README.ES.md
@@ -64,7 +64,7 @@ Muchas de las cosas vistas aquí también funcionan en **macOS**, pero esto solo
 
 2. (**Solo para Linux**) Asegúrate de que la cuenta de tu usuario está en el [grupo `docker`][docker group].
 
-3. Prepara la `Rust` toolchain. La mayor parte se hará automáticamente durante el primer uso del archivo [rust-toolchain](rust-toolchain). 
+3. Prepara la `Rust` toolchain. La mayor parte se hará automáticamente durante el primer uso del archivo [rust-toolchain.toml](rust-toolchain.toml). 
    Todo lo que nos queda hacer a nosotros es: 
    
    i. Si ya tienes una versión de Rust instalada:
diff --git a/README.md b/README.md
index 7267f4405..c528b6845 100644
--- a/README.md
+++ b/README.md
@@ -64,7 +64,7 @@ The tutorials are primarily targeted at **Linux**-based distributions. Most stuf
 1. [Install Docker Engine][install_docker].
 1. (**Linux only**) Ensure your user account is in the [docker group].
 1. Prepare the `Rust` toolchain. Most of it will be handled on first use through the
-   [rust-toolchain](rust-toolchain) file. What's left for us to do is:
+   [rust-toolchain.toml](rust-toolchain.toml) file. What's left for us to do is:
    1. If you already have a version of Rust installed:
       ```bash
       cargo install cargo-binutils rustfilt

From 98147b7b50b6e02d37321fe7878fc24fbe3441d3 Mon Sep 17 00:00:00 2001
From: Diego Barrios Romero <eldruin@gmail.com>
Date: Tue, 14 Nov 2023 09:33:12 +0100
Subject: [PATCH 211/214] Use https in links.

---
 README.md | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/README.md b/README.md
index c528b6845..c31b549e8 100644
--- a/README.md
+++ b/README.md
@@ -164,8 +164,8 @@ RPi3](https://github.com/bztsrc/raspi3-tutorial) in `C`. Thanks for giving me a
 
 Licensed under either of
 
-- Apache License, Version 2.0, ([LICENSE-APACHE](LICENSE-APACHE) or http://www.apache.org/licenses/LICENSE-2.0)
-- MIT license ([LICENSE-MIT](LICENSE-MIT) or http://opensource.org/licenses/MIT)
+- Apache License, Version 2.0, ([LICENSE-APACHE](LICENSE-APACHE) or <https://www.apache.org/licenses/LICENSE-2.0>)
+- MIT license ([LICENSE-MIT](LICENSE-MIT) or <https://opensource.org/licenses/MIT>)
 
 at your option.
 

From 8856331be9449d7fc7a56726ccc176b0f31c55e1 Mon Sep 17 00:00:00 2001
From: James Zow <jameszow@163.com>
Date: Thu, 14 Dec 2023 16:26:17 +0800
Subject: [PATCH 212/214] Modify outdated translations (#201)

* Modify outdated translations

* Update README.CN.md

Co-authored-by: Devin-Yeung <53309384+Devin-Yeung@users.noreply.github.com>

---------

Co-authored-by: Devin-Yeung <53309384+Devin-Yeung@users.noreply.github.com>
---
 README.CN.md | 34 ++++++++++++++++++++++------------
 1 file changed, 22 insertions(+), 12 deletions(-)

diff --git a/README.CN.md b/README.CN.md
index b8cba52aa..1b44067b6 100644
--- a/README.CN.md
+++ b/README.CN.md
@@ -48,8 +48,8 @@ _带上我最诚挚的问候,<br>Andre ([@andre-richter])_
 ### 🚀 tl;dr 版本
 
 1. [安装 Docker][install_docker]。
-2. 确保你的用户在 [docker group] 中。
-3. 安装正确的`Rust`工具链:
+2. **(仅限Linux)** 确保您的用户帐户在 [docker group] 中。
+3. 准备Rust工具链。其中大部分将在首次使用时通过[rust-toolchain.toml](rust-toolchain.toml)文件进行处理。我们要做的是：
    1. 如果你已经安装了一个版本的Rust:
       ```bash
       cargo install cargo-binutils rustfilt
@@ -63,12 +63,17 @@ _带上我最诚挚的问候,<br>Andre ([@andre-richter])_
       cargo install cargo-binutils rustfilt
       ```
 
-1. 如果你使用 `Visual Studio Code`，我强烈推荐你安装[Rust Analyzer 扩展]。
-1. 如果你使用的**不是**Linux，那么你还需要安装一些`Ruby` gems。
+4. 如果你使用 `Visual Studio Code`，我强烈推荐你安装[Rust Analyzer 扩展]。
+5. **(仅限macOS)** 安装一些`Ruby` gems。
+
+这是作者最后一次在`macOS Monterey`上用`Ruby 3.0.2`版本进行测试。如果您正在使用`rbenv`，那么相应的`.ruby-version`文件已经就位。
+如果你从未听说过`rbenv`，请尝试使用[这个指南](https://stackoverflow.com/a/68118750)。
+
+在存储库根文件夹中运行此操作：
 
 ```bash
-sudo gem install bundler
-bundle config set path '.vendor/bundle'
+bundle config set --local path '.vendor/bundle'
+bundle config set --local without 'development'
 bundle install
 ```
 
@@ -78,9 +83,10 @@ bundle install
 
 ## 🧰 长期版本: 消除工具链烦恼
 
-这个系列的教程会着重关注用户体验的友好性。因此，我尽量消除嵌入式开发中的最大痛点：工具链的问题。
+这个系列的教程会着重关注用户体验的友好性。因此，我尽量消除嵌入式开发中的最大痛点：`Toolchain hassle`。
 
 Rust内置的交叉编译支持在这方面帮了我们大忙。我们只需要使用`rustup`安装目标工具链就可以在`x86`宿主机上交叉编译支持树莓派的目标文件。然而，除了Rust编译器，我们还需要更多的工具。例如：
+Rust本身在这方面已经起到了很大的作用，因为它内置了对交叉编译的支持。从`x86`宿主机到树莓派的`AArch64`架构的交叉编译所需的一切都将由`rustup`自动安装。然而，除了Rust编译器，我们还将使用更多的工具。例如：
 
 - 用于在我们的宿主系统上模拟我们内核运行环境的`QEMU`。
 - 一个叫`Minipush`的自制工具，可以通过`UART`将内核加载到树莓派上。
@@ -96,14 +102,18 @@ Rust内置的交叉编译支持在这方面帮了我们大忙。我们只需要
 
 由于教程中开发的内核是在真实的硬件上运行的，因此强烈建议您使用 USB 串行调试线来进行试验。连接调试线后，树莓派需要通过额外电源供电。
 
-- 淘宝搜索"USB 转串口"
-- 如下图连接 GPIO 串口的 14/15 号引脚
-- [第六章](06_drivers_gpio_uart) 是这个设备第一次需要使用的地方。找到如何准备 SD 卡来引导你自制的内核的说明。
-- [第七章](07_uart_chainloader)开始，在树莓派上启动内核变得非常舒适。在这章，会开发出一个叫`chainloader`的文件。
-  这将是您暂时需要在 SD 卡上手动复制的最后一个文件。这将使您能够在通过 UART 按需引导期间加载教程内核。
+- 您可以在[\[1\]] [\[2\]]中或者[淘宝]上找到USB转串口线，但许多其他线材也可以工作。理想情况下，您的线材应基于`CP2102`芯片。
+- 您将其连接到`GND`和GPIO引脚`14/15`，如下所示。
+- [教程5](05_drivers_gpio_uart/README.CN.md)是这个设备第一次需要使用的地方。查看它了解如何准备SD卡以从中启动自制内核的说明。
+- 从[教程6](06_uart_chainloader/README.CN.md)开始，在树莓派上启动内核变得非常舒适。在本教程中开发了一个所谓的`chainloader`，。
+  这将是您暂时需要在SD卡上手动复制的最后一个文件。这将使您能够在通过`UART`按需引导期间加载教程内核。
 
 ![UART wiring diagram](doc/wiring.png)
 
+[\[1\]]: https://www.amazon.de/dp/B0757FQ5CX/ref=cm_sw_r_tw_dp_U_x_ozGRDbVTJAG4Q
+[\[2\]]: https://www.adafruit.com/product/954
+[淘宝]: https://www.taobao.com/
+
 ## 🙌 致谢
 
 这个教程最初是由[Zoltan Baldaszti](https://github.com/bztsrc)的[项目](https://github.com/bztsrc/raspi3-tutorial)衍生出来的，感谢它给我开了一个头。

From 42a1f7ad56811dd5928b0e60254dcf180e192356 Mon Sep 17 00:00:00 2001
From: James Zow <jameszow@163.com>
Date: Thu, 14 Dec 2023 16:43:46 +0800
Subject: [PATCH 213/214] Fix pdf reference page for errors #200 (#202)

Because the latest version is the JA version dated April 27, 2023, we will use this version of information as a reference in the future.
---
 11_exceptions_part1_groundwork/README.md | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/11_exceptions_part1_groundwork/README.md b/11_exceptions_part1_groundwork/README.md
index 7de4e306c..a9c9b3179 100644
--- a/11_exceptions_part1_groundwork/README.md
+++ b/11_exceptions_part1_groundwork/README.md
@@ -55,7 +55,7 @@ In `AArch64`, it is differentiated between four types of exceptions. These are:
 
 ## Exception entry
 
-I recommend to read pages 1874-1876 of the [ARMv8 Architecture Reference Manual][ARMv8_Manual] to
+I recommend to read pages D1-5355 of the [ARMv8 Architecture Reference Manual][ARMv8_Manual Ja] to
 understand the mechanisms of taking an exception.
 
 Here's an excerpt of important features for this tutorial:
@@ -65,8 +65,8 @@ Here's an excerpt of important features for this tutorial:
 - The preferred return address is saved in the `ELR_ELx` register.
   - "Preferred" here means that `ELR_ELx` may hold the instruction address of the instructions that
     caused the exception (`synchronous case`) or the first instruction that did not complete due to
-    an `asynchronous` exception. Details in Chapter D1.10.1 of the [ARMv8 Architecture Reference
-    Manual][ARMv8_Manual].
+    an `asynchronous` exception. Details in pages D1-5357 of the [ARMv8 Architecture Reference
+    Manual][ARMv8_Manual Ja].
 - All kinds of exceptions are turned off upon taking an exception, so that by default, exception
   handlers can not get interrupted themselves.
 - Taking an exception will select the dedicated stack pointer of the target `EL`.
@@ -81,10 +81,10 @@ Here's an excerpt of important features for this tutorial:
 introduced already, and additionally, it is taken into account _where_ the exception was taken from
 and what the circumstances were.
 
-Here is a copy of the decision table as shown in Chapter D1.10.2 of the [ARMv8 Architecture
-Reference Manual][ARMv8_Manual]:
+Here is a copy of the decision table as shown in pages D1-5358 of the [ARMv8 Architecture
+Reference Manual][ARMv8_Manual Ja]:
 
-[ARMv8_Manual]: https://developer.arm.com/docs/ddi0487/latest/arm-architecture-reference-manual-armv8-for-armv8-a-architecture-profile
+[ARMv8_Manual Ja]: https://developer.arm.com/documentation/ddi0487/ja/
 
 <table>
     <thead>

From 644474cc09f755249f9c55d99a5d1e07a2562fc7 Mon Sep 17 00:00:00 2001
From: James Zow <jameszow@163.com>
Date: Thu, 14 Dec 2023 19:22:23 +0800
Subject: [PATCH 214/214] fix:simplify self assignment and use Ruby to simplify
 syntax (#211)

---
 15_virtual_mem_part3_precomputed_tables/README.md             | 4 ++--
 .../tools/translation_table_tool/arch.rb                      | 4 ++--
 .../tools/translation_table_tool/arch.rb                      | 4 ++--
 17_kernel_symbols/tools/translation_table_tool/arch.rb        | 4 ++--
 18_backtrace/tools/translation_table_tool/arch.rb             | 4 ++--
 19_kernel_heap/tools/translation_table_tool/arch.rb           | 4 ++--
 20_timer_callbacks/tools/translation_table_tool/arch.rb       | 4 ++--
 7 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md
index 3fdc23854..989301e0e 100644
--- a/15_virtual_mem_part3_precomputed_tables/README.md
+++ b/15_virtual_mem_part3_precomputed_tables/README.md
@@ -2006,7 +2006,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/tools/translation_table_tool/arch.rb 1
 +    attr_bitfield(:valid, Valid::OFFSET, Valid::NUMBITS)
 +
 +    def next_level_table_addr=(addr)
-+        addr = addr >> Granule64KiB::SHIFT
++        addr >>= Granule64KiB::SHIFT
 +
 +        self.__next_level_table_addr = addr
 +    end
@@ -2092,7 +2092,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/tools/translation_table_tool/arch.rb 1
 +    attr_bitfield(:valid, Valid::OFFSET, Valid::NUMBITS)
 +
 +    def output_addr=(addr)
-+        addr = addr >> Granule64KiB::SHIFT
++        addr >>= Granule64KiB::SHIFT
 +
 +        self.__output_addr = addr
 +    end
diff --git a/15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/arch.rb b/15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/arch.rb
index 44b8531eb..d8b5d04a1 100644
--- a/15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/arch.rb
+++ b/15_virtual_mem_part3_precomputed_tables/tools/translation_table_tool/arch.rb
@@ -84,7 +84,7 @@ module Valid
     attr_bitfield(:valid, Valid::OFFSET, Valid::NUMBITS)
 
     def next_level_table_addr=(addr)
-        addr = addr >> Granule64KiB::SHIFT
+        addr >>= Granule64KiB::SHIFT
 
         self.__next_level_table_addr = addr
     end
@@ -170,7 +170,7 @@ module Valid
     attr_bitfield(:valid, Valid::OFFSET, Valid::NUMBITS)
 
     def output_addr=(addr)
-        addr = addr >> Granule64KiB::SHIFT
+        addr >>= Granule64KiB::SHIFT
 
         self.__output_addr = addr
     end
diff --git a/16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/arch.rb b/16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/arch.rb
index 61a6d6ca6..053cac194 100644
--- a/16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/arch.rb
+++ b/16_virtual_mem_part4_higher_half_kernel/tools/translation_table_tool/arch.rb
@@ -84,7 +84,7 @@ module Valid
     attr_bitfield(:valid, Valid::OFFSET, Valid::NUMBITS)
 
     def next_level_table_addr=(addr)
-        addr = addr >> Granule64KiB::SHIFT
+        addr >>= Granule64KiB::SHIFT
 
         self.__next_level_table_addr = addr
     end
@@ -170,7 +170,7 @@ module Valid
     attr_bitfield(:valid, Valid::OFFSET, Valid::NUMBITS)
 
     def output_addr=(addr)
-        addr = addr >> Granule64KiB::SHIFT
+        addr >>= Granule64KiB::SHIFT
 
         self.__output_addr = addr
     end
diff --git a/17_kernel_symbols/tools/translation_table_tool/arch.rb b/17_kernel_symbols/tools/translation_table_tool/arch.rb
index 61a6d6ca6..053cac194 100644
--- a/17_kernel_symbols/tools/translation_table_tool/arch.rb
+++ b/17_kernel_symbols/tools/translation_table_tool/arch.rb
@@ -84,7 +84,7 @@ module Valid
     attr_bitfield(:valid, Valid::OFFSET, Valid::NUMBITS)
 
     def next_level_table_addr=(addr)
-        addr = addr >> Granule64KiB::SHIFT
+        addr >>= Granule64KiB::SHIFT
 
         self.__next_level_table_addr = addr
     end
@@ -170,7 +170,7 @@ module Valid
     attr_bitfield(:valid, Valid::OFFSET, Valid::NUMBITS)
 
     def output_addr=(addr)
-        addr = addr >> Granule64KiB::SHIFT
+        addr >>= Granule64KiB::SHIFT
 
         self.__output_addr = addr
     end
diff --git a/18_backtrace/tools/translation_table_tool/arch.rb b/18_backtrace/tools/translation_table_tool/arch.rb
index 61a6d6ca6..053cac194 100644
--- a/18_backtrace/tools/translation_table_tool/arch.rb
+++ b/18_backtrace/tools/translation_table_tool/arch.rb
@@ -84,7 +84,7 @@ module Valid
     attr_bitfield(:valid, Valid::OFFSET, Valid::NUMBITS)
 
     def next_level_table_addr=(addr)
-        addr = addr >> Granule64KiB::SHIFT
+        addr >>= Granule64KiB::SHIFT
 
         self.__next_level_table_addr = addr
     end
@@ -170,7 +170,7 @@ module Valid
     attr_bitfield(:valid, Valid::OFFSET, Valid::NUMBITS)
 
     def output_addr=(addr)
-        addr = addr >> Granule64KiB::SHIFT
+        addr >>= Granule64KiB::SHIFT
 
         self.__output_addr = addr
     end
diff --git a/19_kernel_heap/tools/translation_table_tool/arch.rb b/19_kernel_heap/tools/translation_table_tool/arch.rb
index 61a6d6ca6..053cac194 100644
--- a/19_kernel_heap/tools/translation_table_tool/arch.rb
+++ b/19_kernel_heap/tools/translation_table_tool/arch.rb
@@ -84,7 +84,7 @@ module Valid
     attr_bitfield(:valid, Valid::OFFSET, Valid::NUMBITS)
 
     def next_level_table_addr=(addr)
-        addr = addr >> Granule64KiB::SHIFT
+        addr >>= Granule64KiB::SHIFT
 
         self.__next_level_table_addr = addr
     end
@@ -170,7 +170,7 @@ module Valid
     attr_bitfield(:valid, Valid::OFFSET, Valid::NUMBITS)
 
     def output_addr=(addr)
-        addr = addr >> Granule64KiB::SHIFT
+        addr >>= Granule64KiB::SHIFT
 
         self.__output_addr = addr
     end
diff --git a/20_timer_callbacks/tools/translation_table_tool/arch.rb b/20_timer_callbacks/tools/translation_table_tool/arch.rb
index 61a6d6ca6..053cac194 100644
--- a/20_timer_callbacks/tools/translation_table_tool/arch.rb
+++ b/20_timer_callbacks/tools/translation_table_tool/arch.rb
@@ -84,7 +84,7 @@ module Valid
     attr_bitfield(:valid, Valid::OFFSET, Valid::NUMBITS)
 
     def next_level_table_addr=(addr)
-        addr = addr >> Granule64KiB::SHIFT
+        addr >>= Granule64KiB::SHIFT
 
         self.__next_level_table_addr = addr
     end
@@ -170,7 +170,7 @@ module Valid
     attr_bitfield(:valid, Valid::OFFSET, Valid::NUMBITS)
 
     def output_addr=(addr)
-        addr = addr >> Granule64KiB::SHIFT
+        addr >>= Granule64KiB::SHIFT
 
         self.__output_addr = addr
     end